Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\01fed173e32d_6090.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6090.asy)
R2 N001 N002 16.2K
XU1 NC_01 N002 IN NC_02 NC_03 OUT NC_04 NC_05 LTC6090 ;pnba COM)IN-)IN+)V-)_TF)OUT)V+)_OD
V3 N001 0 2.5
V1 -V 0 -70
C1 OUT N002 10p
V4 IN 0 SINE(1.25 1.35 10K)
R3 N002 0 16.9K
R1 OUT N002 435K
V2 +V 0 70
.tran 250u
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1128 680
WIRE 208 -96 96 -96
WIRE 384 -96 320 -96
WIRE 528 -96 448 -96
WIRE -160 -80 -160 -96
WIRE -32 -80 -32 -96
WIRE 96 -80 96 -96
WIRE 208 -80 208 -96
WIRE -160 16 -160 0
WIRE -32 16 -32 0
WIRE 96 16 96 0
WIRE 208 16 208 0
WIRE 320 16 320 -96
WIRE 320 16 208 16
WIRE 384 16 320 16
WIRE 528 16 528 -96
WIRE 528 16 464 16
WIRE 208 32 208 16
WIRE 368 112 368 96
WIRE 208 128 208 112
WIRE 320 160 320 16
WIRE 352 160 320 160
WIRE 528 192 528 16
WIRE 528 192 512 192
WIRE 576 192 528 192
WIRE 352 224 48 224
WIRE 48 240 48 224
WIRE 368 304 368 272
WIRE 48 336 48 320
SYMBOL res 192 16 R0
SYMATTR InstName R3
SYMATTR Value 16.9K
SYMBOL voltage -32 -96 R0
SYMATTR InstName V1
SYMATTR Value -70
SYMBOL voltage -160 -96 R0
SYMATTR InstName V2
SYMATTR Value 70
SYMBOL LTC6090 416 192 R0
SYMATTR InstName U1
SYMBOL cap 448 -112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 96 -96 R0
SYMATTR InstName V3
SYMATTR Value 2.5
SYMBOL res 480 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 435K
SYMBOL voltage 48 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value SINE(1.25 1.35 10K)
SYMBOL res 192 -96 R0
SYMATTR InstName R2
SYMATTR Value 16.2K
FLAG -32 16 0
FLAG -32 -96 -V
FLAG -160 16 0
FLAG -160 -96 +V
FLAG 368 304 -V
FLAG 368 96 +V
FLAG 576 192 OUT
FLAG 96 16 0
FLAG 208 128 0
FLAG 48 336 0
FLAG 48 224 IN
TEXT 528 328 Left 2 !.tran 250u
* Z:\home\khalils\Downloads\files\data\raw_asc\325473ac3ebb_hpf_freq_analysis.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N001 vin 10e-9
C2 N002 N001 10e-9
XU1 N002 vout vcc 0 vout level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R2 N002 0 375k
R1 vout N001 750k
V2 vcc 0 5
V3 vin 0 SINE(0 1 450) AC 1
.ac dec 100 10 2000k
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 48 176 48
WIRE 176 144 176 48
WIRE 224 144 176 144
WIRE 304 160 304 48
WIRE 304 160 288 160
WIRE 352 160 304 160
WIRE 0 176 -48 176
WIRE 96 176 0 176
WIRE 176 176 160 176
WIRE 224 176 176 176
WIRE 0 304 0 176
WIRE 64 304 0 304
WIRE 304 304 304 160
WIRE 304 304 144 304
FLAG 176 256 0
FLAG 416 96 0
FLAG 416 16 vcc
FLAG 256 128 vcc
FLAG 256 192 0
FLAG 400 336 0
FLAG 400 256 vin
FLAG -112 176 vin
FLAG 352 160 vout
SYMBOL cap -48 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10e-9
SYMBOL cap 160 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10e-9
SYMBOL OpAmps\\UniversalOpAmp 256 160 R0
SYMATTR InstName U1
SYMBOL res 160 160 R0
SYMATTR InstName R2
SYMATTR Value 375k
SYMBOL res 160 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 750k
SYMBOL voltage 416 0 R0
WINDOW 0 14 15 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 400 240 R0
WINDOW 3 -26 146 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 450)
SYMATTR Value2 AC 1
TEXT -160 408 Left 2 !.ac dec 100 10 2000k
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1693-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1693-2.asy)
V1 N001 0 5
XU1 N002 0 N002 0 N004 N001 N003 N001 LTC1693-2 ;pnba IN1)GND1)IN2)GND2)_OUT2)Vcc2)OUT1)Vcc1
V2 N002 0 PULSE(0 5 0 1n 1n 5u 10u)
.tran 100u
.lib LTC1693-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2388 1428
WIRE 1632 1008 1504 1008
WIRE 1856 1008 1632 1008
WIRE 1856 1024 1856 1008
WIRE 1504 1040 1504 1008
WIRE 1632 1040 1632 1008
WIRE 1440 1120 1104 1120
WIRE 1712 1120 1696 1120
WIRE 1856 1120 1856 1104
WIRE 1104 1216 1104 1120
WIRE 1440 1216 1104 1216
WIRE 1712 1216 1696 1216
WIRE 1104 1232 1104 1216
WIRE 1504 1312 1504 1296
WIRE 1632 1312 1632 1296
WIRE 1104 1328 1104 1312
SYMBOL voltage 1856 1008 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LTC1693-2 1568 1168 R0
SYMATTR InstName U1
SYMBOL voltage 1104 1216 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1n 1n 5u 10u)
FLAG 1856 1120 0
FLAG 1632 1312 0
FLAG 1504 1312 0
FLAG 1104 1328 0
TEXT 1616 1400 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8055-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8055-1.asy)
C3 N002 0 4700p Rser=5.11K
C1 OUT 0 22 V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
R3 N001 0 11K
Rload OUT 0 2
XU1 NC_01 NC_02 MP_03 0 MP_04 MP_05 NC_06 NC_07 IN IN IN IN MP_08 MP_09 MP_10 MP_11 MP_12 MP_13 MP_14 MP_15 MP_16 MP_17 MP_18 MP_19 OUT OUT MP_20 MP_21 MP_22 0 MP_23 NC_24 NC_25 NC_26 N003 N002 N001 LTM8055-1 ;pnba CTL)SS))LL)))IOUTmon)IINmon)Run)Iin)Vin)SVin)))))))))))))Vout)Iout))))GND))Mode)CLKout)Sync)RT)Comp)FB
R2 OUT N001 100K
V1 IN 0 24
R1 N003 0 36.5K
C2 OUT 0 68 V=50 Irms=410m Rser=0.2 Lser=0 mfg="Nichicon" pn="UPL1H680MPH" type="Al electrolytic"
.tran 1m startup
.lib LTM8055-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 728
WIRE -32 -192 -128 -192
WIRE -16 -192 -32 -192
WIRE 416 -192 400 -192
WIRE 464 -192 416 -192
WIRE 576 -192 464 -192
WIRE 672 -192 576 -192
WIRE 768 -192 672 -192
WIRE -128 -176 -128 -192
WIRE 464 -176 464 -192
WIRE 576 -176 576 -192
WIRE 672 -176 672 -192
WIRE 768 -176 768 -192
WIRE -32 -96 -32 -192
WIRE -16 -96 -32 -96
WIRE 416 -96 416 -192
WIRE 416 -96 400 -96
WIRE -128 -80 -128 -96
WIRE 576 -80 576 -112
WIRE 672 -80 672 -112
WIRE 768 -80 768 -96
WIRE -32 0 -32 -96
WIRE -16 0 -32 0
WIRE 464 0 464 -96
WIRE 464 0 400 0
WIRE 464 16 464 0
WIRE -32 96 -32 0
WIRE -16 96 -32 96
WIRE 464 112 464 96
WIRE 480 288 400 288
WIRE 480 304 480 288
WIRE 480 400 480 368
WIRE -16 480 -32 480
WIRE -112 576 -128 576
WIRE -16 576 -32 576
WIRE 416 576 400 576
SYMBOL LTM8055-1 192 192 R0
SYMATTR InstName U1
SYMBOL res 448 -192 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL res 448 0 R0
SYMATTR InstName R3
SYMATTR Value 11K
SYMBOL res -16 560 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 36.5K
SYMBOL polcap 656 -176 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 68
SYMATTR InstName C2
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=50 Irms=410m Rser=0.2 Lser=0 mfg="Nichicon" pn="UPL1H680MPH" type="Al electrolytic"
SYMBOL res 752 -192 R0
SYMATTR InstName Rload
SYMATTR Value 2
SYMBOL voltage -128 -192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 464 304 R0
WINDOW 3 40 36 Left 2
WINDOW 39 26 68 Left 2
SYMATTR InstName C3
SYMATTR Value 4700p
SYMATTR SpiceLine Rser=5.11K
SYMBOL cap 560 -176 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
FLAG -128 576 0
FLAG -32 480 0
FLAG -128 -80 0
FLAG 416 576 0
FLAG 464 112 0
FLAG 576 -80 0
FLAG 672 -80 0
FLAG 768 -80 0
FLAG 768 -192 OUT
FLAG -128 -192 IN
FLAG 480 400 0
TEXT 576 560 Left 2 !.tran 1m startup
* Z:\tmp\asc_dec_bjh7r6w2\054357143c3c_exp-1_2_c1_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V4 PRE N001 PULSE(0 1 {delay_test_pre} 1u 1u 10m 1)
V1 N002 N003 PULSE(0 -0.5 {delay_down_pre} 1u 50m)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3028 680
WIRE 224 -16 80 -16
WIRE 496 -16 224 -16
WIRE 80 16 80 -16
WIRE 80 128 80 96
WIRE 80 256 80 208
WIRE 80 384 80 336
WIRE 816 384 80 384
SYMBOL voltage 80 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 1 {delay_test_pre} 1u 1u 10m 1)
SYMBOL voltage 80 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 -0.5 {delay_down_pre} 1u 50m)
FLAG 224 -16 PRE
* Z:\home\khalils\Downloads\files\data\raw_asc\e1012823245d__csr_p_lsr_.asc
* Generated by LTspice 26.0.1 for Windows.
L1 IN N001 {L} Rser=0
C1 N002 0 {C}
R2 N002 IN {rC}
V1 IN 0 AC 1
R1 N001 0 {rL}
.ac oct 50 1k 30meg
.param L=1m rL=1m
.param C=1m rC=1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 0 -144 0
WIRE 48 0 -48 0
WIRE 208 0 48 0
WIRE 48 32 48 0
WIRE 208 32 208 0
WIRE -144 128 -144 0
WIRE 48 128 48 112
WIRE 208 144 208 112
WIRE -144 240 -144 208
WIRE 48 240 48 208
WIRE 48 240 -144 240
WIRE 208 240 208 208
WIRE 208 240 48 240
WIRE -144 256 -144 240
SYMBOL ind 32 16 R0
SYMATTR InstName L1
SYMATTR Value {L}
SYMATTR SpiceLine Rser=0
SYMBOL res 32 112 R0
SYMATTR InstName R1
SYMATTR Value {rL}
SYMBOL voltage -144 112 R0
WINDOW 123 41 58 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL cap 192 144 R0
SYMATTR InstName C1
SYMATTR Value {C}
SYMBOL res 224 128 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value {rC}
FLAG -144 256 0
FLAG -48 0 IN
TEXT -160 312 Left 2 !.ac oct 50 1k 30meg
TEXT -168 352 Left 2 !.param L=1m rL=1m\n.param C=1m rC=1m
* Z:\home\khalils\Downloads\files\data\raw_asc\742e3e4ecd8f_Draft5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
V1 N003 0 AC 1 0
C1 N002 N001 6.03185
XU1 0 N001 NC_01 NC_02 N002 LT1001 ;pnba In+)In-)V+)V-)OUT
R1 N001 N003 10K
.ac dec 1000 1 100K
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1032
WIRE 32 736 -48 736
WIRE 176 736 96 736
WIRE -176 816 -240 816
WIRE -48 816 -48 736
WIRE -48 816 -96 816
WIRE 48 816 -48 816
WIRE 176 832 176 736
WIRE 176 832 112 832
WIRE 240 832 176 832
SYMBOL Res -80 800 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL OpAmps/LT1001 80 768 R0
SYMATTR InstName U1
SYMBOL Voltage -240 800 R0
WINDOW 3 24 96 Invisible 2
WINDOW 123 24 118 Left 2
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMBOL Cap 96 720 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 6.03185
FLAG -240 896 0
FLAG 48 848 0
TEXT -160 1016 Left 2 !.ac dec 1000 1 100K
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2503-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 N002 1.5 Rser=80m
C1 OUT 0 10
V1 IN 0 3.3
Rload OUT 0 50
XU1 N001 N002 OUT IN IN 0 OUT NC_01 ADP2503-3.3 ;pnba SW1)SW2)FB)EN)PVin)GND)Vout)Sync
.tran 400u startup
* PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2503-3.3.asy)
.lib ADP2503-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 48 64 32 64
WIRE 336 64 304 64
WIRE -64 80 -64 64
WIRE 32 144 32 64
WIRE 48 144 32 144
WIRE 336 144 304 144
WIRE -64 176 -64 160
WIRE 320 224 304 224
WIRE 368 224 320 224
WIRE 480 224 368 224
WIRE 368 240 368 224
WIRE 480 240 480 224
WIRE 48 304 32 304
WIRE 320 304 320 224
WIRE 320 304 304 304
WIRE 368 336 368 304
WIRE 480 336 480 320
FLAG 368 336 0
FLAG 32 304 0
FLAG -64 176 0
FLAG 480 336 0
FLAG -64 64 IN
FLAG 480 224 OUT
SYMBOL ind 320 48 R0
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=80m
SYMBOL cap 352 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage -64 64 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 464 224 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL ADP2503-3.3 176 176 R0
SYMATTR InstName U1
TEXT 432 392 Left 2 !.tran 400u startup
TEXT 168 -8 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7172-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7172-1.8.asy)
V1 IN 0 2.3
Rload OUT 0 1.5
XU1 IN OUT IN N001 OUT 0 ADM7172-1.8 ;pnba Vin)Sense)EN)SS)Vout)GND
C1 OUT 0 4.7 Rser=1.5m
C2 N001 0 1n
.tran 5m startup
.lib ADM7172-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL ADM7172-1.8 224 128 R0
SYMATTR InstName U1
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.3
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 1.5
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\a08af1711506_opamp_send.asc
* Generated by LTspice 26.0.1 for Windows.
V1 V_plus 0 5V
XU1 N003 N001 V_plus V_minus N002 MC33079/ON ;pnba In+)In-)V+)V-)OUT
C1 N001 N004 10n
R2 N003 0 100k
RTransducer N002 N005 1k
XU2 N001 N003 V_plus V_minus N005 MC33079/ON ;pnba In+)In-)V+)V-)OUT
V3 N004 0 PULSE(0 5 500u 1u 1u 12.5u 25u 10)
R3 N003 N001 47k
R1 V_plus N003 100k
V2 0 V_minus 5V
.lib on_amp.lib
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -16 -112 -16
WIRE 16 0 0 0
WIRE 464 0 224 0
WIRE 16 16 16 0
WIRE 160 16 128 16
WIRE -640 80 -640 48
WIRE 192 80 192 32
WIRE 464 80 464 0
WIRE -192 96 -272 96
WIRE -112 96 -112 -16
WIRE -112 96 -128 96
WIRE -96 96 -112 96
WIRE 16 96 -16 96
WIRE 128 96 128 16
WIRE 128 96 16 96
WIRE -272 128 -272 96
WIRE -640 192 -640 160
WIRE -640 192 -720 192
WIRE 16 192 16 176
WIRE -720 224 -720 192
WIRE -640 240 -640 192
WIRE -272 240 -272 208
WIRE 128 256 128 96
WIRE 240 256 128 256
WIRE 464 272 464 160
WIRE 464 272 304 272
WIRE -112 288 -112 96
WIRE 240 288 -112 288
WIRE 272 336 272 304
WIRE -640 368 -640 320
SYMBOL cap -128 80 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 0 0 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage -272 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -239 167 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 500u 1u 1u 12.5u 25u 10)
SYMBOL res 448 64 R0
SYMATTR InstName Transducer
SYMATTR Value 1k
SYMBOL Opamps\\opamp2 272 208 R0
SYMATTR InstName U2
SYMATTR Value MC33079/ON
SYMBOL voltage -640 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5V
SYMBOL res 0 80 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res 0 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 47k
SYMBOL voltage -640 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5V
SYMBOL Opamps\\opamp2 192 -64 R0
SYMATTR InstName U1
SYMATTR Value MC33079/ON
FLAG -720 224 0
FLAG -640 48 V_plus
FLAG -640 368 V_minus
FLAG 272 336 V_minus
FLAG 192 80 V_minus
FLAG 192 -32 V_plus
FLAG 272 240 V_plus
FLAG 16 192 0
FLAG 0 0 V_plus
FLAG -272 240 0
TEXT -992 336 Left 0 !.lib on_amp.lib
TEXT -992 304 Left 0 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\17f3914b9985_5400-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\LT5400-3.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1468.asy)
V3 IN 0 AC 1
XU2 N002 N001 +V -V OUT LT1468 ;pnba In+)In-)V+)V-)OUT
XU1 OUT IN 0 0 N002 N002 N001 N001 NC_01 LT5400-3 ;pnba 1)2)3)4)5)6)7)8)PAD
V1 +V 0 15
C1 N001 OUT 4.7p
V2 -V 0 -15
C2 N002 0 4.7p
.ac oct 10 1K 10Meg
.lib LT5400.lib
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1472
WIRE 2304 624 1936 624
WIRE 1936 688 1936 624
WIRE 2016 688 1936 688
WIRE 2192 688 2080 688
WIRE 1936 816 1936 688
WIRE 1952 816 1936 816
WIRE 2192 816 2192 688
WIRE 2192 816 2144 816
WIRE 1952 880 1744 880
WIRE 2192 880 2192 816
WIRE 2192 880 2144 880
WIRE 1392 896 1392 880
WIRE 1520 896 1520 880
WIRE 1744 896 1744 880
WIRE 2192 896 2192 880
WIRE 2208 896 2192 896
WIRE 2304 912 2304 624
WIRE 2304 912 2272 912
WIRE 2336 912 2304 912
WIRE 2208 928 2192 928
WIRE 1952 944 1936 944
WIRE 2192 944 2192 928
WIRE 2192 944 2144 944
WIRE 1392 992 1392 976
WIRE 1520 992 1520 976
WIRE 1744 992 1744 976
WIRE 1920 1008 1872 1008
WIRE 1952 1008 1920 1008
WIRE 2192 1008 2192 944
WIRE 2192 1008 2144 1008
WIRE 1920 1120 1920 1008
WIRE 2016 1120 1920 1120
WIRE 2192 1120 2192 1008
WIRE 2192 1120 2080 1120
SYMBOL voltage 1520 880 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 1744 880 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL opamps\\LT1468 2240 848 R0
SYMATTR InstName U2
SYMBOL voltage 1392 880 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL misc\\LT5400-3 2048 912 R0
SYMATTR InstName U1
SYMBOL cap 2080 672 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7p
SYMBOL cap 2080 1104 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7p
FLAG 2240 880 +V
FLAG 2240 944 -V
FLAG 2336 912 OUT
FLAG 1520 992 0
FLAG 1520 880 +V
FLAG 1392 992 0
FLAG 1392 880 -V
FLAG 1744 992 0
FLAG 1744 880 IN
FLAG 1872 1008 0
FLAG 1936 944 0
TEXT 2312 1064 Left 2 !.ac oct 10 1K 10Meg
* Z:\tmp\asc_dec_bjh7r6w2\04a67a4f4cf8_6002_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V3 IN 0 PULSE(-.1 .1 0 1u 1u 100m 200m)
V1 +V 0 2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 756
WIRE 32 400 16 400
WIRE 128 400 112 400
WIRE 192 400 128 400
WIRE -288 448 -288 432
WIRE -192 448 -192 432
WIRE 128 512 128 400
WIRE 160 512 128 512
WIRE -288 544 -288 528
WIRE -192 544 -192 528
WIRE 160 544 -64 544
WIRE -64 560 -64 544
WIRE -64 656 -64 640
SYMBOL voltage -64 544 R0
SYMATTR InstName V3
SYMATTR Value PULSE(-.1 .1 0 1u 1u 100m 200m)
SYMBOL voltage -288 432 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2
FLAG -288 544 0
FLAG -192 544 0
FLAG -64 656 0
FLAG -64 544 IN
FLAG -288 432 +V
FLAG -192 432 -V
FLAG 16 400 0
* Z:\home\khalils\Downloads\files\data\raw_asc\0e861aacf56e_autoreset_wroom.asc
* Generated by LTspice 26.0.1 for Windows.
R4 N001 EN 50k
V2 N003 0 PULSE(0 3.3 0 0.01 0.01 2 6 2)
R6 N003 RTS 10K
V1 N001 0 3.3
M1 EN DTS RTS RTS BSS123
R7 N001 BM 50k
V4 N002 0 PULSE(0 3.3 2 0.01 0.01 2 4 2)
R3 DTS N002 10K
M2 BM RTS DTS DTS BSS123
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 5 0 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 816
WIRE 400 -80 288 -80
WIRE 544 -80 400 -80
WIRE 288 -32 288 -80
WIRE 544 -16 544 -80
WIRE 288 144 288 48
WIRE 288 144 224 144
WIRE 784 144 288 144
WIRE -32 224 -144 224
WIRE 96 224 -32 224
WIRE 176 224 96 224
WIRE 224 272 224 240
WIRE 224 272 144 272
WIRE -272 320 -336 320
WIRE -144 320 -144 304
WIRE -144 320 -192 320
WIRE -336 432 -336 320
WIRE -272 432 -336 432
WIRE -144 432 -192 432
WIRE 400 432 400 -80
WIRE -144 512 -144 432
WIRE 400 512 224 512
WIRE 784 512 400 512
WIRE -32 592 -144 592
WIRE 144 592 144 272
WIRE 144 592 -32 592
WIRE 176 592 144 592
WIRE 96 656 96 224
WIRE 224 656 224 608
WIRE 224 656 96 656
WIRE -336 784 -336 432
WIRE 544 784 544 64
WIRE 544 784 -336 784
IOPIN 784 144 Out
IOPIN 784 512 Out
IOPIN -32 224 Out
IOPIN -32 592 Out
SYMBOL voltage -176 432 R90
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 0 0.01 0.01 2 6 2)
SYMBOL voltage 544 -32 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage -176 320 R90
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 3.3 2 0.01 0.01 2 4 2)
SYMBOL res -160 208 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL nmos 176 144 R0
SYMATTR InstName M1
SYMATTR Value BSS123
SYMBOL res 384 416 R0
SYMATTR InstName R7
SYMATTR Value 50k
SYMBOL nmos 176 512 R0
SYMATTR InstName M2
SYMATTR Value BSS123
SYMBOL res -160 496 R0
SYMATTR InstName R6
SYMATTR Value 10K
SYMBOL res 272 -48 R0
SYMATTR InstName R4
SYMATTR Value 50k
FLAG 544 784 0
FLAG 784 144 EN
FLAG 784 512 BM
FLAG -32 224 DTS
FLAG -32 592 RTS
TEXT -1002 -248 Left 2 !.tran 0 5 0 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5695R.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5695R.asy)
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
CLOAD vOUT 0 10n
XU1 vDAC Vdd 0 vOUT AD5695R Gain=2 ;pnba Vdac)Vdd)GND)Vout
I1 0 0 100 AC 1
Vdac1 NC_01 0 1.25
V1 Vdd 0 5
.tran 200u
.lib AD5695R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 272 112 192 112
WIRE 464 112 272 112
WIRE -800 144 -800 112
WIRE 272 160 272 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
SYMBOL AD5695R -208 112 R0
SYMATTR InstName U1
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 100
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2