Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\007e4987a9c7_eje3_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
I1 0 o AC 1e-3
L1 o 0 {L1}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 64 -32 64
WIRE 144 64 64 64
WIRE 224 64 144 64
WIRE 304 64 224 64
WIRE 384 64 304 64
WIRE 416 64 384 64
WIRE -32 112 -32 64
WIRE 64 112 64 64
WIRE 144 112 144 64
WIRE 224 112 224 64
WIRE 304 112 304 64
WIRE -32 240 -32 192
WIRE 64 240 64 192
WIRE 144 240 144 176
WIRE 224 240 224 192
WIRE 304 240 304 192
SYMBOL current -32 192 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 24 -28 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value ""
SYMATTR Value2 AC 1e-3
SYMBOL ind 208 96 R0
SYMATTR InstName L1
SYMATTR Value {L1}
FLAG -32 240 0
FLAG 64 240 0
FLAG 144 240 0
FLAG 224 240 0
FLAG 304 240 0
FLAG 384 64 o
* Z:\home\khalils\Downloads\files\data\raw_asc\1a777516f1d7_1001S8.asc
* Generated by LTspice 26.0.1 for Windows.
* Precision Absolute Value Circuit
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001S8.asy)
R3 N005 N001 10K
R1 N002 N001 10K
XU2 N005 N003 +V -V OUT LT1001 ;pnba In+)In-)V+)V-)OUT
D1 N002 N004 1N4148
V3 IN 0 SINE(0 10 100)
V2 -V 0 -15
R5 OUT N003 10K
V1 +V 0 15
R2 N001 IN 10K
XU1 0 N001 +V -V N004 LT1001 ;pnba In+)In-)V+)V-)OUT
D2 N004 N005 1N4148
R4 N003 N002 10K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -16 96 -128 96
WIRE 112 96 64 96
WIRE 160 96 112 96
WIRE 336 96 240 96
WIRE 384 96 336 96
WIRE 480 96 464 96
WIRE 496 96 480 96
WIRE 608 96 576 96
WIRE -128 112 -128 96
WIRE 336 128 336 96
WIRE -128 208 -128 192
WIRE 192 208 192 192
WIRE 528 208 528 192
WIRE 112 224 112 96
WIRE 160 224 112 224
WIRE 480 224 480 96
WIRE 496 224 480 224
WIRE 336 240 336 192
WIRE 336 240 224 240
WIRE 608 240 608 96
WIRE 608 240 560 240
WIRE 640 240 608 240
WIRE 160 256 144 256
WIRE 496 256 480 256
WIRE 192 288 192 272
WIRE 336 288 336 240
WIRE 528 288 528 272
WIRE -96 336 -96 320
WIRE 0 336 0 320
WIRE 112 384 112 224
WIRE 160 384 112 384
WIRE 336 384 336 352
WIRE 336 384 240 384
WIRE 480 384 480 256
WIRE 480 384 336 384
WIRE -96 432 -96 416
WIRE 0 432 0 416
SYMBOL voltage -96 320 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 592 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10K
SYMBOL opamps\\LT1001S8 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -128 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 10 100)
SYMBOL diode 320 128 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 80 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL opamps\\LT1001S8 528 176 R0
SYMATTR InstName U2
SYMBOL diode 320 288 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL res 256 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL voltage 0 320 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 480 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10K
FLAG 0 432 0
FLAG 192 192 +V
FLAG 0 320 +V
FLAG 192 288 -V
FLAG -96 432 0
FLAG -96 320 -V
FLAG -128 208 0
FLAG 528 192 +V
FLAG 528 288 -V
FLAG 144 256 0
FLAG -128 96 IN
FLAG 640 240 OUT
TEXT 536 352 Left 2 !.tran 30m
TEXT 256 40 Bottom 2 ;Precision Absolute Value Circuit
* Z:\home\khalils\Downloads\files\data\raw_asc\4678a20a3692_Assignment_4b__v_.asc
* Generated by LTspice 26.0.1 for Windows.
* Full Wave Rectifier (Diode Bridge) (with 10microF Capacitor) (Ideal)
V1 0 N002 SINE(0 311 50) Rser=0.001
D2 N003 0 1N4148
R1 N001 N003 1000
D1 0 N001 1N4148
D4 N003 N002 1N4148
D3 N002 N001 1N4148
C1 N001 N003 0.00001
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 368 80 64 80
WIRE 512 80 368 80
WIRE 64 96 64 80
WIRE 64 96 -96 96
WIRE 224 96 64 96
WIRE 224 128 224 96
WIRE -96 144 -96 96
WIRE 368 208 368 80
WIRE 512 224 512 80
WIRE -96 256 -96 208
WIRE -16 256 -96 256
WIRE 64 256 -16 256
WIRE 224 256 224 192
WIRE 224 256 144 256
WIRE -16 288 -16 256
WIRE 224 288 224 256
WIRE -96 304 -96 256
WIRE -96 400 -96 368
WIRE 64 400 -96 400
WIRE 224 400 224 352
WIRE 224 400 64 400
WIRE 64 416 64 400
WIRE 368 416 368 288
WIRE 368 416 64 416
WIRE 512 416 512 288
WIRE 512 416 368 416
SYMBOL cap 496 224 R0
SYMATTR InstName C1
SYMATTR Value 0.00001
SYMBOL diode 240 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL diode -80 368 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL voltage 48 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 -60 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value SINE(0 311 50)
SYMATTR SpiceLine Rser=0.001
SYMBOL diode 240 352 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL res 352 192 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL diode -80 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG -16 288 0
TEXT -64 424 Left 2 !.tran 0.05
TEXT -160 40 Left 2 ;Full Wave Rectifier (Diode Bridge) (with 10microF Capacitor) (Ideal)
* Z:\home\khalils\Downloads\files\data\raw_asc\06bf507b6e5a_1217.asc
* Generated by LTspice 26.0.1 for Windows.
* Cable Driver
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1217.asy)
R4 0 OUT 75
R3 N003 N002 75
V1 +V 0 15
V3 IN 0 AC 1
T1 N003 0 OUT 0 Td=75n Z0=75
XU1 IN N001 +V -V N002 LT1217 ;pnba In+)In-)V+)V-)OUT
R1 N002 N001 3K
V2 -V 0 -15
R2 N001 0 3K
.ac oct 10 10K 100Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 416 64 416 48
WIRE 544 64 544 48
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE 416 160 416 144
WIRE 544 160 544 144
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 304 240 256 240
WIRE 432 240 384 240
WIRE 624 240 528 240
WIRE 160 256 0 256
WIRE 624 256 624 240
WIRE 0 272 0 256
WIRE 432 272 416 272
WIRE 544 272 528 272
WIRE 192 288 192 272
WIRE 624 352 624 336
WIRE 0 368 0 352
SYMBOL tline 480 256 R0
WINDOW 3 -69 48 Left 2
SYMATTR Value Td=75n Z0=75
SYMATTR InstName T1
SYMBOL res 608 352 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 75
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 3K
SYMBOL opamps\\LT1217 192 176 R0
SYMATTR InstName U1
SYMBOL res 400 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 75
SYMBOL voltage 544 48 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 416 48 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3K
FLAG 544 160 0
FLAG 192 192 +V
FLAG 544 48 +V
FLAG 192 288 -V
FLAG 416 160 0
FLAG 416 48 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 624 352 0
FLAG 416 272 0
FLAG 544 272 0
FLAG 624 240 OUT
FLAG 0 256 IN
TEXT 320 400 Left 2 !.ac oct 10 10K 100Meg
TEXT 248 40 Bottom 2 ;Cable Driver
* Z:\tmp\asc_dec_bjh7r6w2\01b8bc9aabb5_analogX_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N003 in 100
V- V- 0 -3.3
V+ V+ 0 3.3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 692
WIRE 704 0 368 0
WIRE 416 64 416 48
WIRE 368 80 368 0
WIRE 384 80 368 80
WIRE 704 96 448 96
WIRE 224 112 208 112
WIRE 256 112 224 112
WIRE 384 112 336 112
WIRE 48 144 48 128
WIRE 128 144 128 128
WIRE 208 144 208 112
WIRE 416 144 416 128
WIRE 48 256 48 224
WIRE 128 256 128 224
WIRE 208 256 208 224
SYMBOL res 352 96 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL voltage 48 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -12 58 Left 0
WINDOW 3 12 10 Left 0
SYMATTR InstName V-
SYMATTR Value -3.3
SYMBOL voltage 128 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -16 59 Left 0
WINDOW 3 8 11 Left 0
SYMATTR InstName V+
SYMATTR Value 3.3
FLAG 208 256 0
FLAG 416 48 V+
FLAG 128 128 V+
FLAG 416 144 V-
FLAG 48 128 V-
FLAG 128 256 0
FLAG 48 256 0
FLAG 224 112 in
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX42402B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX42402B.asy)
V1 vIN 0 12
XU1 0 0 vIN vIN N002 N001 N003 N003 N004 PGOOD N003 MAX42402B ;pnba GND)PGND)EN)SUP)LX)BST)BIAS)SPS)FB)PGOOD)SYNC
C3 vOUT 0 47 Rser=2m
R1 PGOOD N003 20k
Rload vOUT 0 1.32
R2 vOUT N004 49.9k
C2 N001 N002 0.1
C4 vOUT N004 47p
R3 N004 0 15.8k
L1 N002 vOUT 2.2 Rser=13.5m
C1 N003 0 2.2
.tran 4m startup
.lib MAX42402B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 680
WIRE 64 -144 48 -144
WIRE 144 -144 64 -144
WIRE 176 -144 144 -144
WIRE 512 -144 464 -144
WIRE 48 -128 48 -144
WIRE 512 -128 512 -144
WIRE 144 -96 144 -144
WIRE 176 -96 144 -96
WIRE 48 -32 48 -48
WIRE 512 -32 512 -64
WIRE 512 -32 464 -32
WIRE 608 -32 512 -32
WIRE 736 -32 688 -32
WIRE 832 -32 736 -32
WIRE 960 -32 832 -32
WIRE 1024 -32 960 -32
WIRE 1056 -32 1024 -32
WIRE 736 -16 736 -32
WIRE 1056 -16 1056 -32
WIRE 832 0 832 -32
WIRE 960 0 960 -32
WIRE 176 16 112 16
WIRE 736 64 736 48
WIRE 1056 80 1056 64
WIRE 832 96 832 80
WIRE 832 96 464 96
WIRE 960 96 960 64
WIRE 960 96 832 96
WIRE 112 128 112 16
WIRE 176 128 112 128
WIRE 832 128 832 96
WIRE 480 224 464 224
WIRE 832 224 832 208
WIRE 112 272 112 128
WIRE 112 272 32 272
WIRE 176 272 112 272
WIRE 32 288 32 272
WIRE 512 288 464 288
WIRE 608 288 512 288
WIRE 320 352 320 336
WIRE 32 368 32 352
WIRE 112 400 112 272
WIRE 496 400 112 400
WIRE 608 400 608 288
WIRE 608 400 576 400
SYMBOL res 592 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20k
SYMBOL cap 496 -128 R0
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL res 816 -16 R0
SYMATTR InstName R2
SYMATTR Value 49.9k
SYMBOL cap 720 -16 R0
SYMATTR InstName C3
SYMATTR Value 47
SYMATTR SpiceLine Rser=2m
SYMBOL cap 16 288 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL cap 944 0 R0
SYMATTR InstName C4
SYMATTR Value 47p
SYMBOL voltage 48 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ind 592 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=13.5m
SYMBOL res 816 112 R0
SYMATTR InstName R3
SYMATTR Value 15.8k
SYMBOL res 1040 -32 R0
SYMATTR InstName Rload
SYMATTR Value 1.32
SYMBOL MAX42402B 320 96 R0
SYMATTR InstName U1
FLAG 48 -32 0
FLAG 32 368 0
FLAG 320 352 0
FLAG 736 64 0
FLAG 1056 80 0
FLAG 64 -144 vIN
FLAG 1024 -32 vOUT
FLAG 480 224 0
FLAG 832 224 0
FLAG 512 288 PGOOD
TEXT 648 376 Left 2 !.tran 4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5679R.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5679R.asy)
XU1 vDAC Vdd 0 vOUT AD5679R Gain=2 ;pnba Vdac)Vdd)GND)Vout
Vdac vDAC 0 PWL(0 0 10u 0 +1u 1.875)
RLOAD NC_01 0 1k
V1 Vdd 0 5.5
CLOAD vOUT 0 10n
.tran 50u
.lib AD5679R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -800 128 R0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0 10u 0 +1u 1.875)
SYMBOL AD5679R -208 112 R0
SYMATTR InstName U1
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -240 -80 Vdd
TEXT -160 312 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8304.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8304.asy)
C1 INPT N002 1n
CV2 VSUM 0 100n
XU1 VSUM INPT VPDB VREF 0 VLOG VLOG VOUT VPS N001 N003 0 AD8304 ;pnba VSUM)INPT)VPDB)VREF)ACOM)VLOG)BFIN)VOUT)VPS)BFNG)VNEG)PWDN
R2 0 N001 10k
Ipd VPDB INPT {Ipd}
V3 N003 0 -0.5
V1 VPS 0 5
R3 N001 VOUT 15k
R1 N002 0 750
.op
.step dec param Ipd 100p 10m 10
.lib AD8304.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1144 680
WIRE 320 -112 288 -112
WIRE 416 -112 400 -112
WIRE 416 -96 416 -112
WIRE 288 -32 288 -112
WIRE 32 0 -176 0
WIRE 80 0 32 0
WIRE 528 0 480 0
WIRE 544 0 528 0
WIRE -176 16 -176 0
WIRE 32 64 -64 64
WIRE 80 64 32 64
WIRE 528 64 480 64
WIRE 544 64 528 64
WIRE -176 128 -176 96
WIRE 32 128 -176 128
WIRE 80 128 32 128
WIRE 544 128 544 64
WIRE 544 128 480 128
WIRE -176 144 -176 128
WIRE 80 192 48 192
WIRE 592 192 480 192
WIRE 640 192 592 192
WIRE 752 192 720 192
WIRE 48 208 48 192
WIRE 592 208 592 192
WIRE -176 224 -176 208
WIRE 752 224 752 192
WIRE -64 240 -64 64
WIRE 528 304 480 304
WIRE 592 304 592 288
WIRE 592 304 528 304
WIRE -176 320 -176 304
WIRE -64 320 -64 304
WIRE 224 384 224 368
WIRE 352 384 352 368
WIRE 224 480 224 464
SYMBOL cap -80 240 R0
SYMATTR InstName V2
SYMATTR Value 100n
SYMBOL res -192 208 R0
SYMATTR InstName R1
SYMATTR Value 750
SYMBOL current -176 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Ipd
SYMATTR Value {Ipd}
SYMBOL cap -192 144 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 576 192 R0
SYMATTR InstName R3
SYMATTR Value 15k
SYMBOL AD8304 288 160 R0
SYMATTR InstName U1
SYMBOL voltage 224 368 R0
SYMATTR InstName V3
SYMATTR Value -0.5
SYMBOL voltage 304 -112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 736 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
FLAG 352 384 0
FLAG 528 0 VREF
FLAG 416 -96 0
FLAG 288 -112 VPS
FLAG -64 320 0
FLAG -176 320 0
FLAG 752 224 0
FLAG 48 208 0
FLAG 528 64 VLOG
FLAG 528 304 VOUT
FLAG 32 128 INPT
FLAG 32 64 VSUM
FLAG 32 0 VPDB
FLAG 224 480 0
TEXT -184 376 Left 2 !.op
TEXT -176 -80 Left 2 !.step dec param Ipd 100p 10m 10
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1211.asc
* Generated by LTspice 26.0.1 for Windows.
* Input Bias Current Cancellation
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1211.asy)
XU2 N001 N003 +V 0 N002 LT1211 ;pnba In+)In-)V+)V-)OUT
C1 N003 N002 22p
R4 N002 IN 1Meg
R3 N003 N002 1Meg
R1 OUT N001 5K
V1 +V 0 15
XU1 IN N001 +V 0 OUT LT1211 ;pnba In+)In-)V+)V-)OUT
V3 IN 0 PWL(0 1 1 5)
R2 N001 0 5K
.tran 1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 704
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 336 240 256 240
WIRE 64 256 -160 256
WIRE 160 256 64 256
WIRE -288 272 -288 256
WIRE -160 272 -160 256
WIRE 192 288 192 272
WIRE 64 320 64 256
WIRE 128 336 128 224
WIRE 288 336 128 336
WIRE -288 368 -288 352
WIRE -160 368 -160 352
WIRE 224 400 224 384
WIRE 288 416 288 336
WIRE 288 416 256 416
WIRE 64 432 64 400
WIRE 192 432 64 432
WIRE 288 448 256 448
WIRE 224 480 224 464
WIRE 64 528 64 432
WIRE 96 528 64 528
WIRE 288 528 288 448
WIRE 288 528 176 528
WIRE 64 592 64 528
WIRE 192 592 64 592
WIRE 288 592 288 528
WIRE 288 592 256 592
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL opamps\\LT1211 224 496 R180
WINDOW 0 16 95 Left 2
WINDOW 3 14 36 Left 2
SYMATTR InstName U2
SYMBOL cap 256 576 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 22p
SYMBOL res 192 512 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL voltage -288 256 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL opamps\\LT1211 192 176 R0
SYMATTR InstName U1
SYMBOL res 48 416 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL voltage -160 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 1 1 5)
FLAG -288 368 0
FLAG 192 192 +V
FLAG -288 256 +V
FLAG 16 96 0
FLAG -160 368 0
FLAG 224 480 +V
FLAG 192 288 0
FLAG 224 384 0
FLAG 336 240 OUT
FLAG -160 256 IN
TEXT 384 568 Left 2 !.tran 1
TEXT 176 48 Bottom 2 ;Input Bias Current Cancellation
* Z:\home\khalils\Downloads\files\data\raw_asc\a659e1f2d340_exp3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
Va Va 0 SINE(0 5 100)
XU1 0 N001 Vs+ Vs- Vo LT1001 ;pnba In+)In-)V+)V-)OUT
V1 Vb 0 -0
Rf Vo N001 500
Vs+ Vs+ 0 +12
R2 N001 Vb 1k
R1 N001 Va 1k
Vs- Vs- 0 -12
.tran 0 50ms 0 10u
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 680
WIRE 1184 -112 1184 -160
WIRE 1408 -112 1408 -176
WIRE 1632 -112 1632 -192
WIRE 896 -96 896 -160
WIRE 896 48 896 -16
WIRE 1184 48 1184 -32
WIRE 1408 48 1408 -32
WIRE 1632 48 1632 -32
WIRE 336 64 240 64
WIRE 464 64 416 64
WIRE 128 96 64 96
WIRE 224 96 208 96
WIRE 384 208 384 160
WIRE 128 224 16 224
WIRE 224 224 224 96
WIRE 224 224 208 224
WIRE 240 224 240 64
WIRE 240 224 224 224
WIRE 352 224 240 224
WIRE 464 240 464 64
WIRE 464 240 416 240
WIRE 512 240 464 240
WIRE 352 256 272 256
WIRE 384 320 384 272
WIRE 272 384 272 256
SYMBOL res 432 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rf
SYMATTR Value 500
SYMBOL voltage 896 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Va
SYMATTR Value SINE(0 5 100)
SYMBOL res 224 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 1184 -128 R0
SYMATTR InstName Vs+
SYMATTR Value +12
SYMBOL res 224 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 1408 -128 R0
SYMATTR InstName Vs-
SYMATTR Value -12
SYMBOL voltage 1632 -128 R0
SYMATTR InstName V1
SYMATTR Value -0
SYMBOL OpAmps\\OP07 384 176 R0
SYMATTR InstName U1
FLAG 896 48 0
FLAG 1184 48 0
FLAG 1408 48 0
FLAG 384 160 Vs+
FLAG 384 320 Vs-
FLAG 512 240 Vo
FLAG 896 -160 Va
FLAG 1184 -160 Vs+
FLAG 1408 -176 Vs-
FLAG 64 96 Vb
FLAG 1632 -192 Vb
FLAG 1632 48 0
FLAG 272 384 0
FLAG 16 224 Va
TEXT 256 440 Left 2 !.tran 0 50ms 0 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1176-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1176-5.asy)
L1 N001 OUT 100
D1 0 N001 1N5819
Rload OUT 0 5
R3 N005 N006 2.8K
V1 IN 0 10
C1 OUT 0 470 Rser=.1
XU1 IN N004 0 OUT N003 N002 N005 N001 LT1176 top=2.8K bot=2.2K ;pnba Vin)Ilim)GND)Sense)_SHDN)Status)Vc)SW
C2 N006 0 .01
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
.lib LT1176.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2728 1608
WIRE 1792 1104 1504 1104
WIRE 1504 1120 1504 1104
WIRE 1792 1136 1792 1104
WIRE 2032 1136 1984 1136
WIRE 2096 1136 2032 1136
WIRE 2224 1136 2176 1136
WIRE 2288 1136 2224 1136
WIRE 2288 1152 2288 1136
WIRE 2032 1168 2032 1136
WIRE 1632 1200 1616 1200
WIRE 1984 1200 1984 1136
WIRE 1984 1200 1952 1200
WIRE 1504 1216 1504 1200
WIRE 2032 1248 2032 1232
WIRE 2288 1248 2288 1232
WIRE 1632 1280 1616 1280
WIRE 2224 1280 2224 1136
WIRE 2224 1280 1952 1280
WIRE 2224 1296 2224 1280
WIRE 1632 1360 1616 1360
WIRE 1968 1360 1952 1360
WIRE 2064 1360 2048 1360
WIRE 2144 1360 2128 1360
WIRE 2224 1376 2224 1360
WIRE 1792 1440 1792 1424
SYMBOL PowerProducts\\LT1176-5 1792 1280 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1504 1104 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL ind 2080 1152 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMBOL res 1952 1376 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 2.8K
SYMBOL res 2272 1136 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL cap 2064 1376 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL schottky 2016 1232 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMBOL polcap 2208 1296 R0
SYMATTR SpiceLine Rser=.1
SYMATTR InstName C1
SYMATTR Value 470
FLAG 1792 1440 0
FLAG 1504 1216 0
FLAG 2032 1248 0
FLAG 2224 1376 0
FLAG 2144 1360 0
FLAG 2288 1248 0
FLAG 2288 1136 OUT
FLAG 1504 1104 IN
TEXT 2024 1440 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2a229a56276b_scheme5.asc
* Generated by LTspice 26.0.1 for Windows.
* Vout
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1037.asy)
R5 N001 0 {R2}
XU1 N005 N001 N003 N007 N002 LT1037 ;pnba In+)In-)V+)V-)OUT
R1 N005 N004 {R2/k1}
V4 0 N007 {Vcc}
V2 N006 0 0.5
R3 N005 N006 {R2/k2}
R2 N002 N001 {R2*(k1+k2)}
V1 N004 0 0
V3 N003 0 {Vcc}
R4 N005 0 {R2}
.param k1=1.5
.param k2=3.5
.param R2=100k
.param Vcc=15
.tran 1ms 100ms
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 160 32 128 32
WIRE 288 32 240 32
WIRE 464 64 208 64
WIRE 464 80 464 64
WIRE 208 128 208 64
WIRE 128 144 128 32
WIRE 176 144 128 144
WIRE 288 160 288 32
WIRE 288 160 240 160
WIRE 368 160 288 160
WIRE -176 176 -208 176
WIRE -64 176 -96 176
WIRE 48 176 16 176
WIRE 176 176 48 176
WIRE 464 192 464 160
WIRE 464 192 400 192
WIRE -208 208 -208 176
WIRE 400 208 400 192
WIRE 464 224 464 192
WIRE -176 288 -208 288
WIRE -64 288 -96 288
WIRE 48 288 48 176
WIRE 48 288 16 288
WIRE -208 320 -208 288
WIRE 208 336 208 192
WIRE 464 336 464 304
WIRE 464 336 208 336
WIRE 48 368 48 288
WIRE 128 368 128 144
WIRE 48 464 48 448
WIRE 128 464 128 448
SYMBOL res 112 352 R0
SYMATTR InstName R5
SYMATTR Value {R2}
SYMBOL voltage 464 208 R0
SYMATTR InstName V4
SYMATTR Value {Vcc}
SYMBOL voltage -80 288 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value 0.5
SYMBOL res 32 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value {R2/k2}
SYMBOL res 256 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 -56 60 VTop 2
SYMATTR InstName R2
SYMATTR Value {R2*(k1+k2)}
SYMBOL OpAmps\\LT1037 208 96 R0
SYMATTR InstName U1
SYMBOL voltage 464 64 R0
SYMATTR InstName V3
SYMATTR Value {Vcc}
SYMBOL voltage -80 176 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL res 32 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R2/k1}
SYMBOL res 32 352 R0
WINDOW 0 -36 28 Left 2
WINDOW 3 -63 78 Left 2
SYMATTR InstName R4
SYMATTR Value {R2}
FLAG -208 320 0
FLAG -208 208 0
FLAG 400 208 0
FLAG 48 464 0
FLAG 128 464 0
TEXT 328 144 Left 2 ;Vout
TEXT 272 416 Left 2 !.param k1=1.5
TEXT 272 448 Left 2 !.param k2=3.5
TEXT 272 384 Left 2 !.param R2=100k
TEXT 272 352 Left 2 !.param Vcc=15
TEXT 272 480 Left 2 !.tran 1ms 100ms