Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7185-1.asc
* Generated by LTspice 26.0.1 for Windows.
C2 OUT 0 4.7 Rser=5m
V1 IN 0 -2
R3 OUT 0 2
C1 N001 N002 10n
C3 N001 0 1
C4 N003 0 1
XU1 OUT OUT N001 N002 IN 0 N003 IN ADP7185-1 ;pnba Vout)Sense)VA)VAFB)EN)GND)Vreg)Vin
.tran 200m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7185-1.asy)
.lib ADP7185-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 16 -48
WIRE 96 -48 32 -48
WIRE 112 -48 96 -48
WIRE 400 -48 368 -48
WIRE 432 -48 400 -48
WIRE 496 -48 432 -48
WIRE 512 -48 496 -48
WIRE 16 -32 16 -48
WIRE 432 -32 432 -48
WIRE 512 -32 512 -48
WIRE 400 16 400 -48
WIRE 400 16 368 16
WIRE 432 48 432 32
WIRE 16 64 16 48
WIRE 512 64 512 48
WIRE 96 80 96 -48
WIRE 112 80 96 80
WIRE 464 80 368 80
WIRE 384 144 368 144
WIRE 464 144 464 80
WIRE 464 144 448 144
WIRE 464 160 464 144
WIRE 176 224 176 208
WIRE 304 224 304 208
WIRE 464 240 464 224
WIRE 176 320 176 288
FLAG 16 64 0
FLAG 432 48 0
FLAG 304 224 0
FLAG 512 64 0
FLAG 32 -48 IN
FLAG 496 -48 OUT
FLAG 464 240 0
FLAG 176 320 0
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=5m
SYMBOL voltage 16 -48 R0
SYMATTR InstName V1
SYMATTR Value -2
SYMBOL res 496 -48 R0
SYMATTR InstName R3
SYMATTR Value 2
SYMBOL cap 448 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap 448 160 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 160 224 R0
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL ADP7185-1 240 48 R0
SYMATTR InstName U1
TEXT 144 360 Left 2 !.tran 200m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6905-96.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6905-96.asy)
V2 N002 0 PULSE(0 3 100n 10n 10n 200n 300n)
V1 N001 0 3
V3 N003 0 PWL(0 3 .35u 3 +10n 1.5 .65u 1.5 +10n 0)
XU1 N001 0 N002 N003 OUT LTC6905-96 ;pnba V+)GND)0E)DIV)OUT
.tran 1u
.lib LTC6905-96.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 680
WIRE 32 160 -80 160
WIRE 288 160 256 160
WIRE -80 176 -80 160
WIRE 32 240 16 240
WIRE -80 272 -80 256
WIRE 32 320 -176 320
WIRE 368 320 256 320
WIRE -176 336 -176 320
WIRE 368 336 368 320
WIRE -176 432 -176 416
WIRE 368 432 368 416
SYMBOL LTC6905-96 144 240 R0
SYMATTR InstName U1
SYMBOL voltage 368 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 3 .35u 3 +10n 1.5 .65u 1.5 +10n 0)
SYMBOL voltage -176 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 3 100n 10n 10n 200n 300n)
SYMBOL voltage -80 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3
FLAG -80 272 0
FLAG 16 240 0
FLAG -176 432 0
FLAG 368 432 0
FLAG 288 160 OUT
TEXT 576 472 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\13ffa81864d1_g_min100_bw_50k.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8602.asy)
VSOURCE IN 0 AC 1
R2 N001 IN 470
R3 OUT N001 47k
XU1 0 N001 +5V -5V OUT AD8602 ;pnba In+)In-)V+)V-)OUT
C1 OUT N001 68p V=50
V1 +5V 0 5
V2 -5V 0 -5
.ac dec 100 10 10Meg
.OPTIONS cshunt=1e-14 gshunt=1e-14
.measure ac Gmax FIND mag(V(out)/V(in)) AT=10
.measure ac F3dB WHEN mag(V(out)/V(in)) = {Gmax/SQRT(2)}
.lib AD8602.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 96 -128 96 -192
WIRE 240 -128 240 -192
WIRE -288 -96 -288 -160
WIRE 416 0 384 0
WIRE 512 0 480 0
WIRE 96 32 96 -48
WIRE 240 32 240 -48
WIRE -288 48 -288 -16
WIRE 384 96 384 0
WIRE 400 96 384 96
WIRE 512 96 512 0
WIRE 512 96 480 96
WIRE 272 240 96 240
WIRE 384 240 384 96
WIRE 384 240 352 240
WIRE 400 240 384 240
WIRE 512 256 512 96
WIRE 512 256 464 256
WIRE 704 256 512 256
WIRE 400 272 384 272
WIRE 384 352 384 272
IOPIN 96 240 In
IOPIN 704 256 Out
IOPIN -288 -160 In
SYMBOL voltage 96 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -288 -112 R0
WINDOW 123 43 44 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 43 72 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName SOURCE
SYMATTR Value ""
SYMBOL res 496 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 47k
SYMBOL res 368 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 470
SYMBOL OpAmps\\AD8602 432 192 R0
SYMATTR InstName U1
SYMBOL cap 480 -16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 68p
SYMATTR SpiceLine V=50
SYMBOL voltage 240 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
FLAG 96 -192 +5V
FLAG 240 -192 -5V
FLAG 96 32 0
FLAG 240 32 0
FLAG 96 240 IN
FLAG 384 352 0
FLAG 432 288 -5V
FLAG 432 224 +5V
FLAG 704 256 OUT
FLAG -288 -160 IN
FLAG -288 48 0
TEXT -336 424 Left 2 !.ac dec 100 10 10Meg
TEXT -336 456 Left 2 !.OPTIONS cshunt=1e-14 gshunt=1e-14
TEXT -336 488 Left 2 !.measure ac Gmax FIND mag(V(out)/V(in)) AT=10\n.measure ac F3dB WHEN mag(V(out)/V(in)) = {Gmax/SQRT(2)}
* Z:\home\khalils\Downloads\files\data\raw_asc\2d12beae84be_exer1_10_Dcust01.asc
* Generated by LTspice 26.0.1 for Windows.
VPS vps 0 0
R1 vd1 vps 20k
D1 vd1 0 Dcust01
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc VPS 0 10 .01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 80 96 80
WIRE 320 80 272 80
WIRE 96 144 96 80
WIRE 320 144 320 80
WIRE 96 256 96 224
WIRE 320 256 320 208
WIRE 320 256 96 256
WIRE 96 272 96 256
FLAG 96 272 0
FLAG 320 80 vd1
IOPIN 320 80 Out
FLAG 96 80 vps
IOPIN 96 80 Out
SYMBOL voltage 96 128 R0
WINDOW 3 24 96 Left 1
SYMATTR InstName VPS
SYMATTR Value 0
SYMBOL res 288 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20k
SYMBOL diode 304 144 R0
SYMATTR InstName D1
SYMATTR Value Dcust01
TEXT -96 32 Left 2 !.dc VPS 0 10 .01
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2164-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2164-1.5.asy)
L1 N002 OUT 1 Rser=6m
R3 OUT N004 100K
C3 OUT 0 83 Rser=2m
R5 IN N001 10
V1 IN 0 5
XU1 N001 N003 IN OUT 0 0 N002 IN N001 N001 N004 ADP2164-x.x Rtop=600K Rbot=400K ;pnba Sync)Rt)TRK)FB)GND)PGND)SW)Pvin)Vin)EN)Pgood
R4 N003 0 45.3K
Rload OUT 0 0.5
C1 N001 0 100n
.tran 2m startup
.lib ADP2164-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 728
WIRE -80 -112 -304 -112
WIRE 176 -112 -80 -112
WIRE 400 -112 176 -112
WIRE -304 -96 -304 -112
WIRE -80 -96 -80 -112
WIRE 176 -80 176 -112
WIRE -304 0 -304 -16
WIRE -160 0 -176 0
WIRE -80 0 -80 -16
WIRE -80 0 -96 0
WIRE 0 0 -80 0
WIRE 400 0 400 -112
WIRE 400 0 352 0
WIRE -80 112 -80 0
WIRE 0 112 -80 112
WIRE 368 112 352 112
WIRE 480 112 448 112
WIRE 544 112 480 112
WIRE 640 112 544 112
WIRE 544 128 544 112
WIRE 640 128 640 112
WIRE -80 224 -80 112
WIRE 0 224 -80 224
WIRE 480 224 480 112
WIRE 480 224 352 224
WIRE 544 224 544 192
WIRE 640 224 640 208
WIRE -96 368 -112 368
WIRE 0 368 -16 368
WIRE 368 368 352 368
WIRE 480 368 480 224
WIRE 480 368 448 368
WIRE 112 496 112 480
WIRE 240 496 240 480
SYMBOL ADP2164-1.5 176 192 R0
SYMATTR InstName U1
SYMBOL ind 352 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=6m
SYMBOL res 464 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 528 128 R0
SYMATTR InstName C3
SYMATTR Value 83
SYMATTR SpiceLine Rser=2m
SYMBOL res -96 -112 R0
SYMATTR InstName R5
SYMATTR Value 10
SYMBOL voltage -304 -112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 624 112 R0
SYMATTR InstName Rload
SYMATTR Value 0.5
SYMBOL res 0 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 45.3K
SYMBOL cap -96 16 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 100n
FLAG 112 496 0
FLAG -112 368 0
FLAG -304 0 0
FLAG 544 224 0
FLAG 640 224 0
FLAG 640 112 OUT
FLAG -304 -112 IN
FLAG 240 496 0
FLAG -176 0 0
TEXT 488 464 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\OP491.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP491.asy)
R1 N001 0 10K
R2 OUT N001 10K
Vin IN 0 SINE(0 1 10K)
XU1 IN N001 +V -V OUT OP491 ;pnba In+)In-)V+)V-)OUT
Rload OUT 0 10K
V1 +V 0 5
V2 -V 0 -5
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 160 -1152 160 -1168
WIRE 288 -1152 288 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 160 -1056 160 -1072
WIRE 288 -1056 288 -1072
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL Opamps\\OP491 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 288 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 160 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 160 -1168 +V
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 288 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 288 -1056 0
FLAG 160 -1056 0
TEXT 744 -952 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3406-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3406-1.8.asy)
L1 N001 OUT 4.7
V1 IN 0 5
XU1 IN 0 N001 IN OUT LTC3406-x.x top=360K bot=180K ;pnba Run)GND)SW)Vin)Vout
C1 OUT 0 22
Rload OUT 0 10
.tran 500u startup
.lib LTC3406-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 700
WIRE 192 64 64 64
WIRE 352 64 192 64
WIRE 64 80 64 64
WIRE 352 80 352 64
WIRE 192 144 192 64
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 624 144 592 144
WIRE 672 144 624 144
WIRE 768 144 672 144
WIRE 672 160 672 144
WIRE 768 160 768 144
WIRE 64 176 64 160
WIRE 672 256 672 224
WIRE 768 256 768 240
WIRE 624 304 624 144
WIRE 624 304 496 304
WIRE 352 384 352 368
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL RES 752 144 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL PowerProducts\\LTC3406-1.8 352 224 R0
SYMATTR InstName U1
SYMBOL polcap 656 160 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL VOLTAGE 64 64 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 64 176 0
FLAG 352 384 0
FLAG 672 256 0
FLAG 768 256 0
FLAG 768 144 OUT
FLAG 64 64 IN
TEXT 576 352 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8031.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 IN N003 NC_01 IN NC_02 N001 N002 OUT N002 NC_03 LTM8031 ;pnba GND)Vin)Adj)Share)Run/SS)Pgood)Rt)BIAS)Out)AUX)Fin
V1 IN 0 24
R1 N001 0 44.2K
R2 N003 0 47.5K
C1 OUT 0 10
Rload OUT 0 5
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8031.asy)
.lib LTM8031.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 64 -96 64
WIRE 160 64 64 64
WIRE -96 80 -96 64
WIRE 160 80 160 64
WIRE 64 144 64 64
WIRE 80 144 64 144
WIRE 448 144 368 144
WIRE 544 144 448 144
WIRE 448 160 448 144
WIRE 544 160 544 144
WIRE -96 176 -96 160
WIRE -16 208 -32 208
WIRE 80 208 64 208
WIRE 384 208 368 208
WIRE 448 256 448 224
WIRE 544 256 544 240
WIRE 384 272 384 208
WIRE 384 272 368 272
WIRE -16 336 -32 336
WIRE 80 336 64 336
WIRE 224 400 224 384
FLAG -96 176 0
FLAG -32 208 0
FLAG -32 336 0
FLAG 224 400 0
FLAG 448 256 0
FLAG 544 256 0
FLAG -96 64 IN
FLAG 544 144 OUT
SYMBOL PowerProducts\\LTM8031 224 240 R0
SYMATTR InstName U1
SYMBOL voltage -96 64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 80 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 44.2K
SYMBOL res 80 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 47.5K
SYMBOL cap 432 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 528 144 R0
SYMATTR InstName Rload
SYMATTR Value 5
TEXT 448 352 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1336.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1336.asy)
XU1 N001 N003 N007 N009 N006 0 0 N008 N008 N003 0 N005 N005 N004 0 N002 LT1336 ;pnba Isense)SV+)InTop)InBottom)_UVOUT)SGND)PGND)BgateFB)BgateDR)PV+)Tsource)TgateFB)TgateDR)Boost)SWGND)Switch
V3 N009 0 PULSE(0 3 2.5u 0 0 5u 10u)
C2 N005 0 10000p
V2 N007 0 PULSE(0 3 0 0 0 5u 10u)
R2 N003 N006 10K
D1 N002 N004 1N4148
R1 N001 N003 2
C3 N008 0 10000p
V1 N003 0 10
L1 N001 N002 200
C1 0 N004 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m
.lib LT1336.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2404 1860
WIRE 1696 1072 1472 1072
WIRE 1744 1072 1696 1072
WIRE 1888 1072 1824 1072
WIRE 2064 1072 1888 1072
WIRE 1472 1088 1472 1072
WIRE 2064 1088 2064 1072
WIRE 1696 1168 1696 1072
WIRE 1888 1168 1888 1072
WIRE 1472 1232 1472 1168
WIRE 1472 1232 1328 1232
WIRE 1568 1232 1472 1232
WIRE 2064 1232 2064 1152
WIRE 2064 1232 2016 1232
WIRE 2080 1232 2064 1232
WIRE 2160 1232 2144 1232
WIRE 1328 1248 1328 1232
WIRE 1472 1296 1472 1232
WIRE 1568 1296 1472 1296
WIRE 2224 1296 2016 1296
WIRE 1472 1312 1472 1296
WIRE 2224 1328 2224 1296
WIRE 2304 1328 2224 1328
WIRE 1328 1344 1328 1328
WIRE 2304 1344 2304 1328
WIRE 2224 1360 2224 1328
WIRE 2224 1360 2016 1360
WIRE 1472 1424 1472 1392
WIRE 1568 1424 1472 1424
WIRE 2160 1424 2160 1232
WIRE 2160 1424 2016 1424
WIRE 2304 1424 2304 1408
WIRE 2304 1424 2160 1424
WIRE 2160 1440 2160 1424
WIRE 1568 1488 1376 1488
WIRE 2064 1488 2016 1488
WIRE 2064 1520 2064 1488
WIRE 2144 1520 2064 1520
WIRE 1568 1552 1504 1552
WIRE 2064 1552 2064 1520
WIRE 2064 1552 2016 1552
WIRE 2144 1568 2144 1520
WIRE 1504 1632 1504 1552
WIRE 1648 1632 1648 1616
WIRE 1792 1632 1792 1616
WIRE 1936 1632 1936 1616
WIRE 2144 1664 2144 1632
WIRE 1376 1712 1376 1488
WIRE 1504 1744 1504 1712
WIRE 1376 1808 1376 1792
SYMBOL RES 1456 1072 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL VOLTAGE 1328 1232 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL cap 2128 1568 R0
SYMATTR InstName C3
SYMATTR Value 10000p
SYMBOL cap 2288 1344 R0
SYMATTR InstName C2
SYMATTR Value 10000p
SYMBOL POWERPRODUCTS\\LT1336 1792 1392 R0
SYMATTR InstName U1
SYMBOL voltage 1376 1696 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3 0 0 0 5u 10u)
SYMBOL res 1456 1296 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL ind 1728 1088 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 200
SYMBOL diode 2048 1088 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 1504 1616 R0
SYMATTR InstName V3
SYMATTR Value PULSE(0 3 2.5u 0 0 5u 10u)
SYMBOL cap 2144 1216 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10
FLAG 1648 1632 0
FLAG 1792 1632 0
FLAG 1936 1632 0
FLAG 2144 1664 0
FLAG 1328 1344 0
FLAG 1376 1808 0
FLAG 1504 1744 0
FLAG 2160 1440 0
TEXT 1968 1784 Left 2 !.tran 1m
* Z:\tmp\asc_dec_bjh7r6w2\0c6b576e1d4a_Power_Transistors_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N001 N002 3300
V2 N001 N005 V
M1 N006 N008 N010 N010 NMOS
Q1 N002 N003 N004 0 NPN
V6 N009 N011 V
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2488 1304
WIRE 464 0 240 0
WIRE 464 80 464 0
WIRE 240 96 240 0
WIRE 240 208 240 176
WIRE 176 256 0 256
WIRE 240 464 240 304
WIRE 464 464 464 160
WIRE 576 816 240 816
WIRE 240 960 240 816
WIRE 1472 976 1472 816
WIRE 192 1040 128 1040
WIRE 1472 1152 1472 1056
WIRE 240 1296 240 1056
WIRE 1472 1296 1472 1232
WIRE 1472 1296 1136 1296
SYMBOL res 224 80 R0
SYMATTR InstName R2
SYMATTR Value 3300
SYMBOL voltage 464 64 R0
SYMATTR InstName V2
SYMBOL nmos 192 960 R0
SYMATTR InstName M1
SYMBOL npn 176 208 R0
SYMATTR InstName Q1
SYMBOL voltage 1472 1136 R0
SYMATTR InstName V6
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3028.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3028.asy)
V1 N005 0 PWL(0 0 1 20)
R3 N002 0 6.6
R5 N008 0 249K
R6 N006 0 25
R1 N002 N004 422K
C2 N006 N007 .01
C3 N002 0 10
XU1 N003 MP_01 N002 MP_02 0 N006 MP_03 N007 N008 N005 N005 MP_04 N001 MP_05 N001 N004 LT3028 ;pnba BYP1))OUT1))GND)OUT2))BYP2)ADJ2)_SHDN2)IN2))IN1))_SHDN1)ADJ1
V2 N001 0 PWL(0 0 1 20)
R2 N004 0 249K
C4 N006 0 10
R4 N006 N008 261K
C1 N002 N003 .01
.tran 1
.lib LT3028.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 96 -224 96
WIRE 16 96 -16 96
WIRE 336 96 304 96
WIRE 448 96 336 96
WIRE 560 96 448 96
WIRE 656 96 560 96
WIRE 560 112 560 96
WIRE 656 112 656 96
WIRE 336 160 304 160
WIRE -16 176 -16 96
WIRE 16 176 -16 176
WIRE -224 192 -224 176
WIRE 448 208 448 176
WIRE 448 208 304 208
WIRE 560 208 560 176
WIRE 656 208 656 192
WIRE -16 272 -224 272
WIRE 16 272 -16 272
WIRE 336 336 304 336
WIRE 448 336 336 336
WIRE 560 336 448 336
WIRE 656 336 560 336
WIRE -16 352 -16 272
WIRE 16 352 -16 352
WIRE 560 352 560 336
WIRE 656 352 656 336
WIRE -224 368 -224 352
WIRE 336 400 304 400
WIRE 16 448 -16 448
WIRE 448 448 448 416
WIRE 448 448 304 448
WIRE 560 448 560 416
WIRE 656 448 656 432
SYMBOL cap 544 112 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res 432 320 R0
SYMATTR InstName R4
SYMATTR Value 261K
SYMBOL cap 320 96 R0
WINDOW 0 27 14 Left 2
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL res 640 336 R0
SYMATTR InstName R6
SYMATTR Value 25
SYMBOL res 432 432 R0
SYMATTR InstName R5
SYMATTR Value 249K
SYMBOL cap 320 336 R0
WINDOW 0 29 12 Left 2
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL voltage -224 80 R0
WINDOW 0 28 35 Left 2
WINDOW 3 9 97 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 1 20)
SYMBOL res 432 80 R0
SYMATTR InstName R1
SYMATTR Value 422K
SYMBOL res 432 192 R0
SYMATTR InstName R2
SYMATTR Value 249K
SYMBOL voltage -224 256 R0
WINDOW 0 28 35 Left 2
WINDOW 3 9 97 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 20)
SYMBOL res 640 96 R0
SYMATTR InstName R3
SYMATTR Value 6.6
SYMBOL cap 544 352 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL PowerProducts\\LT3028 160 272 R0
SYMATTR InstName U1
FLAG -16 448 0
FLAG -224 192 0
FLAG 448 288 0
FLAG 560 208 0
FLAG 656 208 0
FLAG 448 528 0
FLAG 560 448 0
FLAG 656 448 0
FLAG -224 368 0
TEXT 104 536 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\34db140b21c4_3PhaseRect.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N003 N005 SINE(0 170 60)
V3 N002 N005 SINE(0 170 60 0 0 -120)
R1 N001 0 10
V2 N004 N005 SINE(0 170 60 0 0 120)
D1 N002 N001 D
D2 0 N002 D
D3 N003 N001 D
D4 0 N003 D
D5 N004 N001 D
D6 0 N004 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 33.3333e-3
* This is a 3-Phase rectifier circuit.\nReference: Schuler, 7th edition, page 71.\nRun the simulation and probe the waveform across R1.\nLeft-click the vertical axis and change the bottom axis limit to 0 V.\nThe low ripple content of three-phase rectification is apparent.
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 932 680
WIRE 416 48 336 48
WIRE 496 48 416 48
WIRE 544 48 496 48
WIRE 336 64 336 48
WIRE 416 64 416 48
WIRE 496 64 496 48
WIRE 272 80 -80 80
WIRE 224 128 80 128
WIRE 544 144 544 48
WIRE 272 160 272 80
WIRE 336 160 336 128
WIRE 336 160 272 160
WIRE 224 176 224 128
WIRE 416 176 416 128
WIRE 416 176 224 176
WIRE -80 192 -80 80
WIRE 80 192 80 128
WIRE 496 192 496 128
WIRE 496 192 288 192
WIRE 336 224 336 160
WIRE 416 224 416 176
WIRE 496 224 496 192
WIRE 496 240 496 224
WIRE -80 288 -80 272
WIRE 80 288 80 272
WIRE 80 288 -80 288
WIRE 336 304 336 288
WIRE 416 304 416 288
WIRE 416 304 336 304
WIRE 496 304 496 288
WIRE 496 304 416 304
WIRE 544 304 544 224
WIRE 544 304 496 304
WIRE 544 336 544 304
WIRE 80 352 80 288
WIRE 80 464 80 432
WIRE 288 464 288 192
WIRE 288 464 80 464
FLAG 544 336 0
SYMBOL voltage 80 176 R0
WINDOW 3 -76 -69 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 40 56 Left 0
SYMATTR Value SINE(0 170 60)
SYMATTR InstName V1
SYMBOL voltage -80 176 R0
WINDOW 3 -105 139 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 38 57 Left 0
SYMATTR Value SINE(0 170 60 0 0 -120)
SYMATTR InstName V3
SYMBOL res 528 128 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage 80 448 R180
WINDOW 0 36 54 Left 0
WINDOW 3 -122 -39 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 170 60 0 0 120)
SYMBOL diode 352 128 R180
WINDOW 0 27 63 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D1
SYMBOL diode 352 288 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D2
SYMBOL diode 432 128 R180
WINDOW 0 28 64 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D3
SYMBOL diode 432 288 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D4
SYMBOL diode 512 128 R180
WINDOW 0 24 64 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D5
SYMBOL diode 512 288 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D6
TEXT 344 408 Left 0 !.tran 33.3333e-3
TEXT -128 -104 Left 0 ;This is a 3-Phase rectifier circuit.\nReference: Schuler, 7th edition, page 71.\nRun the simulation and probe the waveform across R1.\nLeft-click the vertical axis and change the bottom axis limit to 0 V.\nThe low ripple content of three-phase rectification is apparent.
* Z:\tmp\asc_dec_bjh7r6w2\0887e90f665f_Fig22_17_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M6T N004 Vbias3 N005 0 N_50n l=100n w=5u
M4 VDD N001 N002 VDD P_50n l=100n w=5u
M1 N001 N003 N004 0 N_50n l=100n w=2.5u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1792 680
WIRE 1088 -48 1088 -128
WIRE 1088 -16 1088 -48
WIRE 1136 -128 1088 -128
WIRE 1184 -256 1184 -288
WIRE 1184 -208 1184 -256
WIRE 1184 -80 1184 -112
WIRE 1248 -304 1232 -304
WIRE 1248 -256 1184 -256
WIRE 1248 -256 1248 -304
WIRE 1328 64 1312 64
WIRE 1328 176 1312 176
WIRE 1376 -80 1184 -80
WIRE 1376 -16 1376 -80
WIRE 1376 96 1376 80
WIRE 1504 -304 1248 -304
WIRE 1552 -240 1552 -288
WIRE 1552 -208 1552 -240
WIRE 1552 -80 1376 -80
WIRE 1680 -48 1088 -48
WIRE 1712 -240 1552 -240
SYMBOL nmos4 1328 -16 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=100n w=5u
SYMATTR InstName M6T
SYMATTR Value N_50n
SYMBOL pmos4 1504 -384 R0
WINDOW 123 58 102 Left 0
WINDOW 0 56 16 Left 0
SYMATTR Value2 l=100n w=5u
SYMATTR InstName M4
SYMATTR Value P_50n
SYMBOL nmos4 1136 -208 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=100n w=2.5u
SYMATTR InstName M1
SYMATTR Value N_50n
FLAG 1184 -160 0
FLAG 1552 -384 VDD
FLAG 1552 -336 VDD
FLAG 1184 -336 VDD
FLAG 944 -176 Vbias1
FLAG 944 -144 Vhigh
FLAG 944 -112 Vbias2
FLAG 944 -16 Vbias3
FLAG 944 -80 Vpcas
FLAG 944 -48 Vncas
FLAG 1184 -384 VDD
FLAG 1376 32 0
FLAG 1376 144 0
FLAG 1312 64 Vbias3
FLAG 1312 176 Vbias4