Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\184fc93836a8_AD8548.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8548.asy)
R2 OUT N001 10K
XU1 IN N001 +V -V OUT AD8548 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 1K
Vin IN 0 SINE(0 .1 10K)
V1 +V 0 5
V2 -V 0 -5
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1432 700
WIRE 368 -1184 352 -1184
WIRE 464 -1184 448 -1184
WIRE 480 -1184 464 -1184
WIRE 576 -1184 560 -1184
WIRE 128 -1088 128 -1104
WIRE 224 -1088 224 -1104
WIRE 464 -1072 464 -1184
WIRE 480 -1072 464 -1072
WIRE 576 -1056 576 -1184
WIRE 576 -1056 544 -1056
WIRE 624 -1056 576 -1056
WIRE 480 -1040 368 -1040
WIRE 368 -1024 368 -1040
WIRE 128 -992 128 -1008
WIRE 224 -992 224 -1008
WIRE 368 -928 368 -944
SYMBOL voltage 128 -1104 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL Opamps\\AD8548 512 -1120 R0
SYMATTR InstName U1
SYMBOL res 576 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 368 -1040 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 .1 10K)
SYMBOL voltage 224 -1104 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 464 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG 368 -928 0
FLAG 624 -1056 OUT
FLAG 368 -1040 IN
FLAG 512 -1088 +V
FLAG 512 -1024 -V
FLAG 352 -1184 0
FLAG 128 -1104 +V
FLAG 128 -992 0
FLAG 224 -1104 -V
FLAG 224 -992 0
TEXT 712 -960 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\527b8d02f47d_q1b.asc
* Generated by LTspice 26.0.1 for Windows.
V_ds N001 0 -1.8
V_gs N002 0 0
M231EC147 N001 N002 0 0 PMOS L=0.18u W=1.8u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include "tsmc180.txt"
.dc V_gs -1.8 0 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 -176 160 -176
WIRE 224 -160 224 -176
WIRE 160 -112 160 -176
WIRE 160 -112 64 -112
WIRE 64 -80 64 -112
WIRE 160 -32 64 -32
WIRE 16 0 -64 0
WIRE 64 32 64 16
WIRE 160 32 160 -32
WIRE 160 32 64 32
WIRE 64 48 64 32
SYMBOL pmos4 16 -80 R0
SYMATTR InstName 231EC147
SYMATTR Value2 L=0.18u W=1.8u
SYMBOL voltage -64 -16 R0
SYMATTR InstName V_gs
SYMATTR Value 0
SYMBOL voltage 224 -176 R0
SYMATTR InstName V_ds
SYMATTR Value -1.8
FLAG 64 48 0
FLAG -64 80 0
FLAG 224 -80 0
TEXT -128 -184 Left 2 !.include "tsmc180.txt"
TEXT -240 104 Left 2 !.dc V_gs -1.8 0 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\137d88119ecd_CMOS_Invert.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Vin 0 PULSE(0 5 0 5n 5n 10m 20m)
M1 Vdd Vin Vout Vdd PMOS
M2 Vout Vin 0 0 NMOS
V2 Vdd 0 5v
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 80ms
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 224 64 208 64
WIRE 256 64 224 64
WIRE 256 112 256 64
WIRE 256 112 208 112
WIRE 160 144 144 144
WIRE 288 160 208 160
WIRE 144 192 144 144
WIRE 144 192 128 192
WIRE 144 240 144 192
WIRE 160 240 144 240
IOPIN 288 160 Out
IOPIN -80 144 In
IOPIN 128 192 In
IOPIN -192 144 In
IOPIN 224 64 In
SYMBOL nmos4 160 160 R0
SYMATTR InstName M2
SYMBOL voltage -192 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5v
SYMBOL pmos4 160 64 R0
SYMATTR InstName M1
SYMBOL voltage -80 128 R0
WINDOW 3 -96 139 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 5n 5n 10m 20m)
FLAG 208 256 0
FLAG 208 208 0
FLAG 288 160 Vout
FLAG -80 224 0
FLAG -80 144 Vin
FLAG 128 192 Vin
FLAG -192 224 0
FLAG -192 144 Vdd
FLAG 224 64 Vdd
TEXT 24 368 Left 2 !.tran 80ms
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3541-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3541-2.asy)
XU1 IN IN OUT1 MP_01 OUT2 OUT1 0 0 IN N001 LTC3541-2 ;pnba Vin)ENBuck)Vout))LVout)LVin)GND)Mode)ENVLDO)SW
L1 N001 OUT1 2.2
Rload2 OUT2 0 5
C2 OUT2 0 2.2
V1 IN 0 3.6
C1 OUT1 0 10
Rload1 OUT1 0 9.375
.tran 1m startup
.lib LTC3541-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 924 680
WIRE 96 -48 0 -48
WIRE 256 -48 96 -48
WIRE 416 -48 256 -48
WIRE 0 -32 0 -48
WIRE 256 -32 256 -48
WIRE 96 32 96 -48
WIRE 112 32 96 32
WIRE 416 32 416 -48
WIRE 416 32 400 32
WIRE 0 64 0 48
WIRE 112 144 96 144
WIRE 416 144 400 144
WIRE 512 144 496 144
WIRE 576 144 512 144
WIRE 656 144 576 144
WIRE 576 160 576 144
WIRE 656 160 656 144
WIRE 0 256 -128 256
WIRE 112 256 0 256
WIRE 512 256 512 144
WIRE 512 256 400 256
WIRE 576 256 576 224
WIRE 656 256 656 240
WIRE -128 272 -128 256
WIRE 0 272 0 256
WIRE -128 368 -128 352
WIRE 0 368 0 336
WIRE 112 368 96 368
WIRE 512 368 512 256
WIRE 512 368 400 368
SYMBOL res -144 256 R0
SYMATTR InstName Rload2
SYMATTR Value 5
SYMBOL cap -16 272 R0
SYMATTR InstName C2
SYMATTR Value 2.2
SYMBOL voltage 0 -48 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL ind 400 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL cap 560 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 640 144 R0
SYMATTR InstName Rload1
SYMATTR Value 9.375
SYMBOL PowerProducts\\LTC3541-2 256 192 R0
SYMATTR InstName U1
FLAG 96 368 0
FLAG 0 64 0
FLAG 0 -48 IN
FLAG 96 144 0
FLAG 656 256 0
FLAG 576 256 0
FLAG 656 144 OUT1
FLAG -128 368 0
FLAG 0 368 0
FLAG -128 256 OUT2
TEXT 560 344 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD3530R.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD3530R.asy)
RLOAD vOUT 0 1k
Vdac vDAC 0 PWL(10u 0 +1u 1.875)
CLOAD vOUT 0 15n
XU1 vDAC Vdd 0 vOUT AD3530R Gain=1 ;pnba Vdac)Vdd)GND)Vout
V1 Vdd 0 3.3
.tran 50u
.lib AD3530R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 952 680
WIRE -528 -96 -832 -96
WIRE -240 -96 -528 -96
WIRE -832 -48 -832 -96
WIRE -240 -32 -240 -96
WIRE -832 64 -832 32
WIRE -528 112 -832 112
WIRE -368 112 -528 112
WIRE 112 112 0 112
WIRE 192 112 112 112
WIRE 272 112 192 112
WIRE -832 144 -832 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -832 256 -832 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 15n
SYMBOL voltage -832 -64 M0
WINDOW 0 -61 27 Left 2
WINDOW 3 -55 97 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL AD3530R -208 112 R0
SYMATTR InstName U1
SYMATTR SpiceLine Gain=1
SYMBOL voltage -832 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(10u 0 +1u 1.875)
FLAG 192 112 vOUT
FLAG -832 256 0
FLAG -528 112 vDAC
FLAG -832 64 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -528 -96 Vdd
TEXT -160 312 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\179459bf8752_Versuch4_Lab1.asc
* Generated by LTspice 26.0.1 for Windows.
D Si 0 1N4148
RD Si N001 100
Vi N001 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc Vi 0 5 0.01
.temp 0 20 40 60 80 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1456 680
WIRE 144 32 64 32
WIRE 272 32 224 32
WIRE 64 112 64 32
WIRE 272 112 272 32
WIRE 64 240 64 192
WIRE 208 240 64 240
WIRE 272 240 272 176
WIRE 272 240 208 240
SYMBOL res 240 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RD
SYMATTR Value 100
SYMBOL voltage 64 96 R0
SYMATTR InstName Vi
SYMATTR Value 5
SYMBOL diode 256 112 R0
SYMATTR InstName D
SYMATTR Value 1N4148
FLAG 272 32 Si
FLAG 208 240 0
TEXT 32 296 Left 2 !.dc Vi 0 5 0.01
TEXT 32 272 Left 2 !.temp 0 20 40 60 80 100
* Z:\home\khalils\Downloads\files\data\raw_asc\057738be7c0a_ADG1222.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1222.asy)
V4 N003 0 pulse(0 3.3 0 1u 1u 5m 10m)
C1 N002 0 35p
R1 N002 0 300
V3 N001 0 10
V1 +V 0 15
XU1 N003 N002 N001 -V 0 +V ADG1222 ;pnba IN)D)S)Vss)GND)Vdd
V2 -V 0 -15
.tran 30m
.lib ADG1222.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -112 -128 -112 -144
WIRE -464 -48 -464 -64
WIRE -336 -48 -368 -48
WIRE -208 -48 -256 -48
WIRE 48 -48 -16 -48
WIRE 144 -48 48 -48
WIRE 48 -16 48 -48
WIRE 144 0 144 -48
WIRE -208 16 -336 16
WIRE -464 48 -464 32
WIRE 48 80 48 64
WIRE 144 80 144 64
WIRE -336 96 -336 16
WIRE -464 144 -464 128
WIRE -176 144 -176 128
WIRE -48 144 -48 128
WIRE -464 240 -464 224
WIRE -336 240 -336 176
SYMBOL voltage -464 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -336 80 R0
WINDOW 3 19 116 Left 2
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMATTR InstName V4
SYMBOL voltage -464 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL voltage -240 -48 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL ADG1222 -112 0 R0
SYMATTR InstName U1
SYMBOL cap 128 0 R0
SYMATTR InstName C1
SYMATTR Value 35p
FLAG -464 240 0
FLAG -464 48 0
FLAG -464 -64 +V
FLAG -464 128 -V
FLAG -368 -48 0
FLAG -176 144 -V
FLAG -112 -144 +V
FLAG -48 144 0
FLAG -336 240 0
FLAG 48 80 0
FLAG 144 80 0
TEXT 40 232 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1751.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1751.asy)
R2 N001 0 31K
Rload OUT 0 50
R1 OUT N001 100K
C2 N002 0 .001
V1 IN 0 3
C3 OUT 0 10
XU1 N001 OUT IN 0 N004 N003 IN N002 LTC1751 ;pnba FB)Vout)Vin)GND)C-)C+)_SHDN)SS
C1 N003 N004 1
.tran 1m startup
.lib LTC1751.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 680
WIRE 96 160 -32 160
WIRE 128 160 96 160
WIRE 496 160 384 160
WIRE 608 160 496 160
WIRE 704 160 608 160
WIRE -32 176 -32 160
WIRE 608 176 608 160
WIRE 704 176 704 160
WIRE 96 240 96 160
WIRE 128 240 96 240
WIRE 496 240 384 240
WIRE 496 256 496 240
WIRE -32 272 -32 256
WIRE 608 272 608 240
WIRE 704 272 704 256
WIRE 48 320 32 320
WIRE 128 320 112 320
WIRE 416 320 384 320
WIRE 496 352 496 336
WIRE 128 400 96 400
WIRE 416 400 416 384
WIRE 416 400 384 400
SYMBOL res 688 160 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL cap 400 320 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -32 160 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL cap 112 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .001
SYMBOL cap 592 176 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL PowerProducts\\LTC1751 256 288 R0
SYMATTR InstName U1
SYMBOL res 480 144 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 480 240 R0
SYMATTR InstName R2
SYMATTR Value 31K
FLAG 496 352 0
FLAG -32 272 0
FLAG 96 400 0
FLAG 32 320 0
FLAG 608 272 0
FLAG 704 272 0
FLAG 704 160 OUT
FLAG -32 160 IN
TEXT 472 400 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1170HV.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
C1 N004 0 1
R1 N003 N004 1K
R2 N002 0 1.24K
R3 OUT N002 10.7K
D1 N001 OUT MBRS360
L1 IN N001 150 Rser=0.02 Rpar=5000
C2 OUT 0 500 Rser=0.05
XU1 N003 N002 0 N001 IN LT1170 ;pnba Vc)FB)GND)SW)Vin
Rload OUT 0 12
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 15m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1170HV.asy)
.lib LT1170.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 896 1616 896
WIRE 1888 896 1824 896
WIRE 2048 896 1968 896
WIRE 2096 896 2048 896
WIRE 2224 896 2160 896
WIRE 2352 896 2224 896
WIRE 2464 896 2352 896
WIRE 1616 912 1616 896
WIRE 2352 912 2352 896
WIRE 2464 912 2464 896
WIRE 1824 944 1824 896
WIRE 2224 960 2224 896
WIRE 1616 1008 1616 992
WIRE 2352 1008 2352 976
WIRE 2464 1008 2464 992
WIRE 2048 1024 2048 896
WIRE 2048 1024 1952 1024
WIRE 2224 1088 2224 1040
WIRE 2224 1088 1952 1088
WIRE 2224 1104 2224 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2224 1200 2224 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
FLAG 1616 1008 0
FLAG 1824 1248 0
FLAG 2064 1248 0
FLAG 2464 1008 0
FLAG 2352 1008 0
FLAG 2224 1200 0
FLAG 2464 896 OUT
FLAG 1616 896 IN
SYMBOL VOLTAGE 1616 896 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL RES 2208 1088 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
SYMBOL RES 2208 944 R0
SYMATTR InstName R3
SYMATTR Value 10.7K
SYMBOL schottky 2096 912 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL IND 1872 912 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL polcap 2336 912 R0
SYMATTR InstName C2
SYMATTR Value 500
SYMATTR SpiceLine Rser=0.05
SYMBOL PowerProducts\\LT1170HV 1824 1088 R0
SYMATTR InstName U1
SYMBOL RES 2448 896 R0
SYMATTR InstName Rload
SYMATTR Value 12
TEXT 2152 1248 Left 2 !.tran 15m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP165-2.3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
C1 OUT 0 1
Rload OUT 0 230
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
XU1 IN 0 N001 OUT ADP16xfd K=434.8u ;pnba Vin)GND)En)Vout
.tran 4m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP165-2.3.asy)
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -48 96
WIRE 432 96 352 96
WIRE 528 96 432 96
WIRE -48 112 -48 96
WIRE 432 112 432 96
WIRE 528 112 528 96
WIRE -48 208 -48 192
WIRE 160 208 16 208
WIRE 432 208 432 176
WIRE 528 208 528 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
FLAG -48 208 0
FLAG 256 272 0
FLAG 432 208 0
FLAG 528 208 0
FLAG 528 96 OUT
FLAG -48 96 IN
FLAG 16 320 0
SYMBOL voltage -48 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 416 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 512 96 R0
SYMATTR InstName Rload
SYMATTR Value 230
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL ADP165-2.3 256 208 R0
SYMATTR InstName U1
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1521-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1521-3.3.asy)
V1 IN 0 PWL(0 0 1 10)
XU1 OUT OUT 0 MP_01 N001 MP_02 MP_03 IN LT1521-3.3 ;pnba OUT)Sense)GND))_SHDN)))IN
Rload OUT 0 500
C1 OUT 0 1.5
.tran 1
.lib LT1521.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 176 -192 176
WIRE 368 176 320 176
WIRE 432 176 368 176
WIRE 528 176 432 176
WIRE -192 192 -192 176
WIRE 432 192 432 176
WIRE 528 192 528 176
WIRE 32 272 16 272
WIRE 368 272 368 176
WIRE 368 272 320 272
WIRE -192 288 -192 272
WIRE 432 288 432 256
WIRE 528 288 528 272
WIRE 176 368 176 336
SYMBOL res 512 176 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL cap 416 192 R0
SYMATTR InstName C1
SYMATTR Value 1.5
SYMBOL PowerProducts\\LT1521-3.3 176 224 R0
SYMATTR InstName U1
SYMBOL voltage -192 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -192 288 0
FLAG 176 368 0
FLAG 432 288 0
FLAG 528 288 0
FLAG 528 176 OUT
FLAG -192 176 IN
TEXT 440 352 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3061.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3061.asy)
V1 IN 0 2.2
Rload OUT 0 18
XU1 N002 N001 OUT MP_01 IN MP_02 IN 0 LT3061 ;pnba BYP)ADJ)OUT))IN))_SHDN)GND
R2 N001 0 59K
R1 OUT N001 118K
C2 OUT 0 10 Rser=3m
C1 N002 0 10n
.tran .1 startup
.lib LT3061.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 112 -16 112
WIRE 112 112 96 112
WIRE 480 112 368 112
WIRE 608 112 480 112
WIRE 688 112 608 112
WIRE -16 128 -16 112
WIRE 480 128 480 112
WIRE 608 128 608 112
WIRE 688 128 688 112
WIRE -16 224 -16 208
WIRE 96 224 96 112
WIRE 112 224 96 224
WIRE 480 224 480 208
WIRE 480 224 368 224
WIRE 608 224 608 192
WIRE 688 224 688 208
WIRE 480 240 480 224
WIRE 112 336 80 336
WIRE 400 336 368 336
WIRE 480 336 480 320
WIRE 400 352 400 336
WIRE 400 432 400 416
SYMBOL cap 592 128 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMATTR SpiceLine Rser=3m
SYMBOL res 672 112 R0
SYMATTR InstName Rload
SYMATTR Value 18
SYMBOL res 464 112 R0
SYMATTR InstName R1
SYMATTR Value 118K
SYMBOL PowerProducts\\LT3061 240 224 R0
SYMATTR InstName U1
SYMBOL voltage -16 112 R0
SYMATTR InstName V1
SYMATTR Value 2.2
SYMBOL res 464 224 R0
SYMATTR InstName R2
SYMATTR Value 59K
SYMBOL cap 384 352 R0
SYMATTR InstName C1
SYMATTR Value 10n
FLAG 80 336 0
FLAG -16 224 0
FLAG 480 336 0
FLAG 400 432 0
FLAG 608 224 0
FLAG 688 224 0
FLAG 688 112 OUT
FLAG -16 112 IN
TEXT 552 368 Left 2 !.tran .1 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0046ec7e49c5_question13.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 PULSE(0 1 1u 0.1u 0.1u 0.4u 1u)
C2 out 0 2n
C1 out N001 1n
.tran 2u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 48 96
WIRE 240 96 224 96
WIRE 304 96 240 96
WIRE 48 128 48 96
WIRE 304 128 304 96
IOPIN 240 96 Out
SYMBOL cap 224 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL cap 288 128 R0
SYMATTR InstName C2
SYMATTR Value 2n
SYMBOL voltage 48 112 R0
WINDOW 3 -170 130 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 1 1u 0.1u 0.1u 0.4u 1u)
SYMATTR InstName V1
FLAG 48 208 0
FLAG 304 192 0
FLAG 240 96 out
TEXT 40 320 Left 2 !.tran 2u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3026.asc
* Generated by LTspice 26.0.1 for Windows.
L1 IN N001 10
V1 IN 0 1.5
C1 N002 0 4.7
R1 OUT N004 100K
XU1 IN MP_01 0 N001 N002 IN N004 N003 OUT LTC3026 ;pnba IN))GND)SW)BST)_SHDN)PG)ADJ)OUT
R2 OUT N003 8.06K
R3 OUT 0 .8
R4 N003 0 4.02K
C2 OUT 0 10
.tran .1 startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3026.asy)
.lib LTC3026.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
WIRE 32 112 -32 112
WIRE 336 112 320 112
WIRE 416 112 400 112
WIRE -32 208 -32 192
WIRE -32 208 -128 208
WIRE 32 208 -32 208
WIRE 352 208 320 208
WIRE 544 208 352 208
WIRE 592 208 544 208
WIRE 672 208 592 208
WIRE -128 224 -128 208
WIRE 592 224 592 208
WIRE 672 224 672 208
WIRE -32 304 -32 208
WIRE 32 304 -32 304
WIRE 352 304 352 288
WIRE 352 304 320 304
WIRE 416 304 352 304
WIRE 512 304 496 304
WIRE -128 320 -128 304
WIRE 592 320 592 288
WIRE 672 320 672 304
WIRE 32 400 16 400
WIRE 336 400 320 400
WIRE 544 400 544 208
WIRE 544 400 416 400
FLAG -128 320 0
FLAG 16 400 0
FLAG 512 304 0
FLAG 592 320 0
FLAG 416 112 0
FLAG 672 320 0
FLAG -128 208 IN
FLAG 672 208 OUT
SYMBOL ind -16 208 R180
WINDOW 0 -2 77 Right 2
WINDOW 3 0 38 Right 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL voltage -128 208 R0
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL cap 336 128 R270
WINDOW 3 0 32 VBottom 2
WINDOW 0 32 32 VTop 2
SYMATTR Value 4.7
SYMATTR InstName C1
SYMBOL res 432 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL PowerProducts\\LTC3026 176 256 R0
SYMATTR InstName U1
SYMBOL res 336 192 R0
SYMATTR InstName R2
SYMATTR Value 8.06K
SYMBOL res 656 208 R0
SYMATTR InstName R3
SYMATTR Value .8
SYMBOL res 400 320 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 4.02K
SYMBOL cap 576 224 R0
SYMATTR InstName C2
SYMATTR Value 10
TEXT 504 440 Left 2 !.tran .1 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1239ccccabfd_NOR_gate.asc
* Generated by LTspice 26.0.1 for Windows.
M3 N002 V1 N001 N001 PMOS
M2 OUT V2 0 0 NMOS
M1 OUT V1 0 0 NMOS
V2 V2 0 PULSE(0 5 0 10ns 10ns 3ms 6ms)
V3 N001 0 5
V1 V1 0 PULSE(0 5 0 10ns 10ns 1ms 2ms)
M4 OUT V2 N002 N002 PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 20ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1464 680
WIRE 1040 -304 1040 -352
WIRE 992 -288 880 -288
WIRE 1040 -144 1040 -208
WIRE 992 -128 880 -128
WIRE 1040 32 1040 -48
WIRE 1216 32 1040 32
WIRE 144 64 -128 64
WIRE 144 96 0 96
WIRE 1040 128 1040 32
WIRE 1040 128 896 128
WIRE 1184 128 1040 128
WIRE -128 192 -128 64
WIRE 0 192 0 96
WIRE 848 208 752 208
WIRE 1376 208 1232 208
WIRE 1040 224 896 224
WIRE 1184 224 1040 224
WIRE 1040 256 1040 224
IOPIN 144 64 Out
IOPIN 144 96 Out
IOPIN 880 -288 In
IOPIN 880 -128 In
IOPIN 1376 208 In
IOPIN 752 208 In
IOPIN 1216 32 Out
SYMBOL nmos 1232 128 M0
SYMATTR InstName M2
SYMBOL voltage -128 176 R0
WINDOW 3 -408 54 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 10ns 10ns 1ms 2ms)
SYMBOL voltage 0 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 10ns 10ns 3ms 6ms)
SYMBOL nmos 848 128 R0
SYMATTR InstName M1
SYMBOL pmos 992 -208 M180
SYMATTR InstName M3
SYMBOL pmos 992 -48 M180
SYMATTR InstName M4
SYMBOL voltage 1040 -336 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
FLAG -128 272 0
FLAG 0 272 0
FLAG 144 64 V1
FLAG 144 96 V2
FLAG 1040 256 0
FLAG 1040 -432 0
FLAG 880 -288 V1
FLAG 880 -128 V2
FLAG 1376 208 V2
FLAG 752 208 V1
FLAG 1216 32 OUT
TEXT -538 296 Left 2 !.tran 20ms