Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\38e5b8463fa6__Fig4_51_MSD.asc
* Generated by LTspice 26.0.1 for Windows.
T1 N002 0 N003 0 Td=10n Z0=50
Eadd1 N002 0 N005 N006 1
Vin N005 0 AC 1
R1 N001 0 50
T2 N004 0 N001 0 Td=10n Z0=50
Esum1 N006 0 N007 N008 -1
EA1 N007 0 N004 0 1.859
EA2 N008 0 N001 0 0.869
E1 Vout 0 N001 0 0.01
R2 N003 0 50
E2 N004 0 N003 0 1
.AC DEC 100 10k 200MEG
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2740 696
WIRE 1776 -880 1680 -880
WIRE 1680 -864 1680 -880
WIRE 1632 -848 1568 -848
WIRE 816 -736 688 -736
WIRE 1008 -736 912 -736
WIRE 1056 -736 1008 -736
WIRE 1280 -736 1168 -736
WIRE 1312 -736 1280 -736
WIRE 1488 -736 1408 -736
WIRE 1552 -736 1488 -736
WIRE 1568 -736 1568 -848
WIRE 1568 -736 1552 -736
WIRE 688 -720 688 -736
WIRE 1056 -720 1056 -736
WIRE 1120 -720 1056 -720
WIRE 640 -704 512 -704
WIRE 1008 -704 1008 -736
WIRE 1552 -704 1552 -736
WIRE 512 -688 512 -704
WIRE 1008 -592 1008 -624
WIRE 1552 -592 1552 -624
WIRE 512 -576 512 -608
WIRE 640 -496 640 -656
WIRE 848 -480 688 -480
WIRE 1280 -464 1280 -736
WIRE 1280 -464 896 -464
WIRE 720 -432 688 -432
WIRE 720 -352 720 -432
WIRE 848 -352 720 -352
WIRE 1488 -336 1488 -736
WIRE 1488 -336 896 -336
FLAG 912 -704 0
FLAG 816 -704 0
FLAG 688 -640 0
FLAG 512 -576 0
FLAG 1776 -880 Vout
FLAG 1552 -592 0
FLAG 1408 -704 0
FLAG 1312 -704 0
FLAG 640 -416 0
FLAG 848 -400 0
FLAG 896 -416 0
FLAG 848 -272 0
FLAG 896 -288 0
FLAG 1632 -800 0
FLAG 1680 -784 0
FLAG 1008 -592 0
FLAG 1168 -656 0
FLAG 1120 -672 0
SYMBOL tline 864 -720 R0
WINDOW 0 -18 -31 Left 0
WINDOW 3 -63 53 Left 0
SYMATTR InstName T1
SYMATTR Value Td=10n Z0=50
SYMBOL e 688 -736 R0
WINDOW 0 43 43 Left 0
WINDOW 3 44 74 Left 0
SYMATTR InstName Eadd1
SYMATTR Value 1
SYMBOL voltage 512 -704 R0
WINDOW 0 38 56 Left 0
WINDOW 123 35 82 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMBOL res 1536 -720 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL tline 1360 -720 R0
WINDOW 0 -18 -31 Left 0
WINDOW 3 -63 53 Left 0
SYMATTR InstName T2
SYMATTR Value Td=10n Z0=50
SYMBOL e 640 -512 M0
SYMATTR InstName Esum1
SYMATTR Value -1
SYMBOL e 848 -496 M0
WINDOW 0 42 44 Left 0
SYMATTR InstName EA1
SYMATTR Value 1.859
SYMBOL e 848 -368 M0
WINDOW 0 42 44 Left 0
SYMATTR InstName EA2
SYMATTR Value 0.869
SYMBOL e 1680 -880 R0
SYMATTR InstName E1
SYMATTR Value 0.01
SYMBOL res 992 -720 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL e 1168 -752 R0
WINDOW 0 39 43 Left 0
WINDOW 3 42 71 Left 0
SYMATTR InstName E2
SYMATTR Value 1
TEXT 952 -376 Left 0 !.AC DEC 100 10k 200MEG
* Z:\home\khalils\Downloads\files\data\raw_asc\c8416f1d3179_Assignment_3b__v_.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 SINE(0 311 50) Rser=0.001
R1 N002 0 1000
D1 N002 N001 1N4148
C1 N002 0 0.00001
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05
* Negative Half Wave Rectifier Circuit (with 10microF Capacitor) (Ideal)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 304 80 192 80
WIRE 464 80 368 80
WIRE 592 80 464 80
WIRE 192 128 192 80
WIRE 464 128 464 80
WIRE 592 144 592 80
WIRE 192 256 192 208
WIRE 288 256 192 256
WIRE 464 256 464 208
WIRE 464 256 288 256
WIRE 592 256 592 208
WIRE 592 256 464 256
WIRE 288 288 288 256
FLAG 288 288 0
SYMBOL voltage 192 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.001
SYMATTR InstName V1
SYMATTR Value SINE(0 311 50)
SYMBOL res 448 112 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL diode 368 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL cap 576 144 R0
SYMATTR InstName C1
SYMATTR Value 0.00001
TEXT 128 288 Left 2 !.tran 0.05
TEXT -8 8 Left 2 ;Negative Half Wave Rectifier Circuit (with 10microF Capacitor) (Ideal)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1079A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1079A.asy)
V1 +V 0 10
R2 N001 0 5K
V3 N003 0 SINE(0 1 1K)
XU1 N003 N001 +V -V N002 LT1078 ;pnba In+)In-)V+)V-)OUT
R1 N002 N001 5K
V2 -V 0 -10
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -272 128 -272 112
WIRE -144 128 -144 112
WIRE 192 208 192 192
WIRE -272 224 -272 208
WIRE -144 224 -144 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL voltage -144 112 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL opamps\\LT1079A 192 176 R0
SYMATTR InstName U1
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL voltage -272 112 R0
SYMATTR InstName V2
SYMATTR Value -10
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
FLAG -144 224 0
FLAG 192 192 +V
FLAG -144 112 +V
FLAG 192 288 -V
FLAG -272 224 0
FLAG -272 112 -V
FLAG 16 96 0
FLAG 0 368 0
TEXT 240 368 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\57dd37ed1955_Inverter.asc
* Generated by LTspice 26.0.1 for Windows.
* Joel Brigida
* A
* Y
* 0
* 0
* 1
* 1
* Inverter [NOT]
+ TOX = 200E-10
+ PHI = 0.7
+ UO = 250
+ KP = 40E-6
+ RSH = 0
+ XJ = 500E-9
+ CGDO = 200E-12
+ CJ = 400E-6
+ CJSW = 300E-12 NSUB = 1E17 VTO = -0.9 ETA = 0
+ VMAX = 5E4 NFS = 1E12 LD = 100E-9 CGSO = 200E-12
+ PB = 1 MJSW = 0.5 GAMMA = 0.6 DELTA = 0.1
+ THETA = 0.1 KAPPA = 1 TPG = -1 CGBO = 1E-10 MJ= 0.5
+ TOX = 200E-10
+ PHI = 0.7
+ UO = 250
+ KP = 120E-6
+ RSH = 0
+ XJ = 500E-9
+ CGDO = 200E-12
+ CJ = 400E-6
+ CJSW = 300E-12
+ NSUB = 1E17 VTO = -1.0 ETA = 3.0E-6 VMAX = 1E5 NFS = 1E12
+ LD = 100E-9 CGSO = 200E-12 PB = 1 MJSW = 0.5
+ GAMMA = 0.5 DELTA = 3.0 THETA = 0.1
+ KAPPA = 0.3 TPG = 1 CGBO = 1E-10 MJ = 0.5
V1 N002 0 5
V2 A 0 PULSE(0 5 0 1n 1n 50m 100m 2)
M1 N002 A Y N002 PMOS
M2 Y A 0 0 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.MODEL PMOS PMOS LEVEL = 3
.MODEL PMOS PMOS LEVEL = 3
.tran 200m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 680
WIRE -112 -32 -160 -32
WIRE -64 -32 -112 -32
WIRE 224 -32 0 -32
WIRE -160 0 -160 -32
WIRE -64 0 -64 -32
WIRE -64 0 -160 0
WIRE 0 0 0 -32
WIRE 224 48 224 -32
WIRE 272 48 224 48
WIRE -160 80 -160 0
WIRE -112 80 -112 -32
WIRE -112 80 -160 80
WIRE -64 80 -64 0
WIRE -64 80 -112 80
WIRE 272 96 272 48
WIRE 272 96 224 96
WIRE 0 112 0 80
WIRE 176 128 128 128
WIRE 128 144 128 128
WIRE 128 144 0 144
WIRE 0 176 0 144
WIRE 224 176 224 144
WIRE 368 176 224 176
WIRE 224 192 224 176
WIRE 272 240 224 240
WIRE 128 272 128 144
WIRE 176 272 128 272
WIRE 0 288 0 256
WIRE 272 288 272 240
WIRE 272 288 224 288
WIRE 224 320 224 288
SYMBOL voltage 0 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 32 30 Left 2
WINDOW 3 -193 100 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1n 1n 50m 100m 2)
SYMBOL nmos4 176 192 R0
SYMATTR InstName M2
SYMBOL pmos4 176 48 R0
SYMATTR InstName M1
SYMBOL voltage 0 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 32 86 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 224 320 0
FLAG 0 112 0
FLAG 0 288 0
FLAG 368 176 Y
FLAG 0 144 A
TEXT 336 200 Left 2 !.MODEL PMOS PMOS LEVEL = 3\n+ TOX = 200E-10\n+ PHI = 0.7\n+ UO = 250 \n+ KP = 40E-6\n+ RSH = 0\n+ XJ = 500E-9 \n+ CGDO = 200E-12 \n+ CJ = 400E-6\n+ CJSW = 300E-12 NSUB = 1E17 VTO = -0.9 ETA = 0\n+ VMAX = 5E4 NFS = 1E12  LD = 100E-9 CGSO = 200E-12\n+ PB = 1  MJSW = 0.5  GAMMA  = 0.6  DELTA  = 0.1\n+ THETA  = 0.1 KAPPA = 1 TPG = -1  CGBO = 1E-10  MJ= 0.5
TEXT 336 -40 Left 2 !.MODEL PMOS PMOS LEVEL = 3\n+ TOX = 200E-10\n+ PHI = 0.7\n+ UO = 250\n+ KP = 120E-6\n+ RSH = 0\n+ XJ = 500E-9\n+ CGDO = 200E-12\n+ CJ = 400E-6\n+ CJSW = 300E-12\n+ NSUB = 1E17   VTO = -1.0    ETA = 3.0E-6  VMAX = 1E5 NFS = 1E12   \n+ LD = 100E-9   CGSO = 200E-12   PB = 1  MJSW = 0.5\n+ GAMMA  = 0.5  DELTA  = 3.0  THETA  = 0.1\n+ KAPPA  = 0.3  TPG = 1  CGBO = 1E-10  MJ = 0.5
TEXT 8 -56 Left 4 ;Joel Brigida
TEXT -144 -16 Left 3 ;A
TEXT -96 -16 Left 3 ;Y
TEXT -144 24 Left 3 ;0
TEXT -96 56 Left 3 ;0
TEXT -144 56 Left 3 ;1
TEXT -96 24 Left 3 ;1
TEXT -152 -48 Left 2 ;Inverter [NOT]
TEXT 38 310 Left 2 !.tran 200m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1118-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1118-2.5.asy)
XU1 0 MP_01 N001 MP_02 N001 N002 LT1118-2.5 ;pnba GND))EN))IN)OUT
V1 N001 0 5
C1 N002 0 1
.tran 3m startup
.lib LT1118.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 112 -32 112
WIRE 96 112 80 112
WIRE 448 112 352 112
WIRE -32 128 -32 112
WIRE 448 128 448 112
WIRE 448 208 448 192
WIRE -32 224 -32 208
WIRE 80 224 80 112
WIRE 96 224 80 224
WIRE 224 288 224 272
SYMBOL voltage -32 112 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LT1118-2.5 224 176 R0
SYMATTR InstName U1
SYMBOL cap 432 128 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 224 288 0
FLAG -32 224 0
FLAG 448 208 0
TEXT 376 320 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP165-2.2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
C1 OUT 0 1
Rload OUT 0 220
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
XU1 IN 0 N001 OUT ADP16xfd K=454.5u ;pnba Vin)GND)En)Vout
.tran 4m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP165-2.2.asy)
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -32 96
WIRE 416 96 352 96
WIRE 512 96 416 96
WIRE -32 112 -32 96
WIRE 416 112 416 96
WIRE 512 112 512 96
WIRE -32 208 -32 192
WIRE 160 208 16 208
WIRE 416 208 416 176
WIRE 512 208 512 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
FLAG -32 208 0
FLAG 256 272 0
FLAG 416 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG -32 96 IN
FLAG 16 320 0
SYMBOL voltage -32 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 220
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL ADP165-2.2 256 208 R0
SYMATTR InstName U1
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\73718b5d97cb_lab3a.asc
* Generated by LTspice 26.0.1 for Windows.
* Bn/Bp=1
* Bn/Bp=3
* Bn/Bp=0.333
M2 Vout1 Vin VDD VDD P_1u l=1u w=10u
M1 Vout Vin VDD VDD P_1u l=1u w=30u
M6 Vout2 Vin 0 0 N_1u l=1u w=10u
VDD VDD 0 5
M3 Vout2 Vin VDD VDD P_1u l=1u w=90u
M4 Vout Vin 0 0 N_1u l=1u w=10u
M5 Vout1 Vin 0 0 N_1u l=1u w=10u
Vin Vin 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib C:\Users\Sarthak\Desktop\CMOS_PRO\pure_models.txt
.dc Vin 0 5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 176 -96 112
WIRE 224 176 224 112
WIRE 528 176 528 112
WIRE -144 192 -176 192
WIRE 176 192 144 192
WIRE 480 192 448 192
WIRE 256 224 224 224
WIRE -176 320 -176 192
WIRE -176 320 -208 320
WIRE -96 320 -96 272
WIRE -48 320 -96 320
WIRE 144 320 144 192
WIRE 144 320 96 320
WIRE 224 320 224 272
WIRE 272 320 224 320
WIRE 448 320 448 192
WIRE 448 320 416 320
WIRE 528 320 528 272
WIRE 608 320 528 320
WIRE -96 384 -96 320
WIRE 224 384 224 320
WIRE 528 384 528 320
WIRE 64 432 -96 432
WIRE 400 432 224 432
WIRE 704 432 528 432
WIRE -176 464 -176 320
WIRE -144 464 -176 464
WIRE 144 464 144 320
WIRE 176 464 144 464
WIRE 448 464 448 320
WIRE 480 464 448 464
WIRE -96 512 -96 480
WIRE 64 512 64 432
WIRE 400 512 400 432
WIRE 528 512 528 480
WIRE 704 512 704 432
WIRE 224 528 224 480
IOPIN -48 320 Out
IOPIN 272 320 Out
IOPIN 608 320 Out
SYMBOL nmos4 -144 384 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=1u w=10u
SYMATTR InstName M4
SYMATTR Value N_1u
SYMBOL voltage -288 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL voltage -288 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 0
SYMBOL pmos4 480 272 M180
WINDOW 3 56 4 Left 2
WINDOW 123 56 -24 Left 2
WINDOW 0 54 27 Left 2
SYMATTR Value P_1u
SYMATTR Value2 l=1u w=90u
SYMATTR InstName M3
SYMBOL pmos4 -144 272 M180
WINDOW 0 49 27 Left 2
WINDOW 3 85 66 Top 2
WINDOW 123 124 -14 Top 2
SYMATTR InstName M1
SYMATTR Value P_1u
SYMATTR Value2 l=1u w=30u
SYMBOL nmos4 176 384 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=1u w=10u
SYMATTR InstName M5
SYMATTR Value N_1u
SYMBOL nmos4 480 384 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=1u w=10u
SYMATTR InstName M6
SYMATTR Value N_1u
SYMBOL pmos4 176 272 M180
WINDOW 3 109 21 Left 2
WINDOW 123 78 80 Left 2
WINDOW 0 60 24 Left 2
SYMATTR Value P_1u
SYMATTR Value2 l=1u w=10u
SYMATTR InstName M2
FLAG 224 528 0
FLAG -96 512 0
FLAG 64 512 0
FLAG 400 512 0
FLAG 528 512 0
FLAG 704 512 0
FLAG -288 256 0
FLAG -288 448 0
FLAG -288 368 Vin
FLAG -208 320 Vin
FLAG 96 320 Vin
FLAG 416 320 Vin
FLAG -96 112 VDD
FLAG 224 112 VDD
FLAG 528 112 VDD
FLAG -96 224 VDD
FLAG 528 224 VDD
FLAG 256 224 VDD
FLAG -288 176 VDD
FLAG -48 320 Vout
FLAG 272 320 Vout1
FLAG 608 320 Vout2
TEXT -128 16 Left 1 !.lib C:\\Users\\Sarthak\\Desktop\\CMOS_PRO\\pure_models.txt
TEXT -336 552 Left 2 !.dc Vin 0 5
TEXT -136 544 Left 2 ;Bn/Bp=1
TEXT 272 544 Left 2 ;Bn/Bp=3
TEXT 520 544 Left 2 ;Bn/Bp=0.333
* Z:\tmp\asc_dec_bjh7r6w2\112cedc87c2c_oscillator_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
Q6 OUT N010 N011 0 2N3904
R1 N006 N005 220
Q8 N004 N006 N008 0 2N3904
R20 N004 OUT 100
D3 N010 OUT BAT54
L3 OUT N003 23.21588m
D4 N009 N005 BAT54
R25 N009 0 220
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 14868 11268
WIRE -3024 8272 -3232 8272
WIRE -2848 8272 -2960 8272
WIRE -2848 8320 -2848 8272
WIRE -2784 8320 -2848 8320
WIRE -2192 8320 -2784 8320
WIRE -2784 8368 -2784 8320
WIRE -3072 8384 -3120 8384
WIRE -2976 8384 -3008 8384
WIRE -2848 8384 -2848 8320
WIRE -2848 8384 -2896 8384
WIRE -2784 8464 -2784 8432
WIRE -2192 8608 -2192 8320
WIRE -2192 8608 -2544 8608
WIRE -2640 8736 -3264 8736
WIRE -2352 8736 -2640 8736
WIRE -2352 8816 -2352 8736
WIRE -2640 8864 -2640 8736
WIRE -3264 8912 -3264 8848
WIRE -3120 8912 -3120 8608
WIRE -3120 8912 -3264 8912
WIRE -3040 8912 -3120 8912
WIRE -2880 8912 -2880 8608
WIRE -2880 8912 -2960 8912
WIRE -2704 8912 -2880 8912
WIRE -2352 8960 -2352 8896
WIRE -2256 8960 -2352 8960
WIRE -2192 8960 -2192 8608
WIRE -2192 8960 -2256 8960
WIRE -3552 9008 -3552 8960
WIRE -2640 9008 -2640 8960
WIRE -3360 9072 -3424 9072
WIRE -3264 9072 -3264 8912
WIRE -3264 9072 -3296 9072
WIRE -2448 9072 -2512 9072
WIRE -2352 9072 -2352 8960
WIRE -2352 9072 -2384 9072
WIRE -3264 9120 -3264 9072
WIRE -2352 9120 -2352 9072
WIRE -3552 9168 -3552 9088
WIRE -3424 9168 -3424 9072
WIRE -3424 9168 -3552 9168
WIRE -3328 9168 -3424 9168
WIRE -2640 9168 -2640 9088
WIRE -2512 9168 -2512 9072
WIRE -2512 9168 -2640 9168
WIRE -2416 9168 -2512 9168
WIRE -3552 9232 -3552 9168
WIRE -2640 9232 -2640 9168
WIRE -3552 9360 -3552 9312
WIRE -3552 9360 -3664 9360
WIRE -3264 9360 -3264 9216
WIRE -3264 9360 -3552 9360
WIRE -2352 9360 -2352 9216
WIRE -3664 9408 -3664 9360
SYMBOL npn -2416 9120 R0
SYMATTR InstName Q6
SYMATTR Value 2N3904
SYMBOL res -2944 8896 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 220
SYMBOL npn -2704 8864 R0
SYMATTR InstName Q8
SYMATTR Value 2N3904
SYMBOL res -2368 8800 R0
SYMATTR InstName R20
SYMATTR Value 100
SYMBOL schottky -2448 9088 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D3
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL ind -2880 8368 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L3
SYMATTR Value 23.21588m
SYMBOL schottky -3360 9088 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D4
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res -3568 9216 R0
SYMATTR InstName R25
SYMATTR Value 220
FLAG -2256 8960 OUT
FLAG -3664 9408 0
FLAG -2784 8464 0
* Z:\home\khalils\Downloads\files\data\raw_asc\17ec18105af3_Notch.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vin Vout 50
C1 N001 0 0.000000047
V1 Vin 0 SINE() AC 1 0
L1 Vout N001 0.001
.ac dec 10000 1 1Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 32 16 32
WIRE 352 32 192 32
WIRE 16 112 16 32
WIRE 352 112 352 32
WIRE 352 256 352 192
WIRE 16 400 16 192
WIRE 352 400 352 320
WIRE 352 400 16 400
WIRE 352 432 352 400
SYMBOL cap 336 256 R0
SYMATTR InstName C1
SYMATTR Value 0.000000047
SYMBOL res 96 16 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL voltage 16 96 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE()
SYMATTR Value2 AC 1 0
SYMBOL ind 336 96 R0
SYMATTR InstName L1
SYMATTR Value 0.001
FLAG 352 432 0
FLAG 16 32 Vin
FLAG 352 32 Vout
TEXT 16 440 Left 2 !.ac dec 10000 1 1Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\424d4bec47c8_Parte3.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N003 0 N002 N_1u l=1.5u w=9.6u
Vds N001 0 2
Vgs N003 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.dc Vds 0 5 0.01 Vgs 0 5 0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 64 144 64
WIRE 144 96 144 64
WIRE 384 112 384 64
WIRE 208 144 144 144
WIRE 96 176 -80 176
WIRE 208 176 208 144
WIRE 208 176 144 176
WIRE -80 208 -80 176
WIRE 144 256 144 192
WIRE 384 272 384 192
WIRE -80 352 -80 288
SYMBOL voltage 384 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vds
SYMATTR Value 2
SYMBOL voltage -80 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vgs
SYMATTR Value 1
SYMBOL nmos4 96 96 R0
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=1.5u w=9.6u
FLAG 144 256 0
FLAG 384 272 0
FLAG -80 352 0
TEXT 0 -8 Left 2 !.include cmosedu_models.txt
TEXT -8 408 Left 2 !.dc Vds 0 5 0.01 Vgs 0 5 0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\2a47b0c88fa7_JT-11P-1HPC-Dhiru.asc
* Generated by LTspice 26.0.1 for Windows.
* Jensen\nLine Input Transformer
* JT-11P-1HPC
;tran 0 1000m 995m 1u
Ls 0 Eo 2.8 Ipk=12m Rser=66 Cpar=115p
VS Ei 0 SINE(10 2 1K) AC 1.7362 Rser=600
Lp 0 N001 2.8 Ipk=12m Rser=66 Cpar=105p
Rload Eo 0 10k
C1 N001 Ei 100nF
K1 Lp Ls 0.9999884
R1 N001 0 5k
.ac lin 100 500 10k
.option plotwinsize=0
.options numdgt=7
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2372 788
WIRE 0 48 -32 48
WIRE 48 48 0 48
WIRE 128 48 112 48
WIRE 224 48 128 48
WIRE 512 48 288 48
WIRE 544 48 512 48
WIRE 0 128 0 48
WIRE 128 128 128 48
WIRE 224 128 224 48
WIRE 288 128 288 48
WIRE 512 128 512 48
WIRE 0 288 0 208
WIRE 128 288 128 208
WIRE 128 288 0 288
WIRE 224 288 224 208
WIRE 224 288 128 288
WIRE 288 288 288 208
WIRE 512 288 512 208
WIRE 512 288 288 288
WIRE 0 336 0 288
WIRE 512 336 512 288
SYMBOL ind2 272 224 M180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName Ls
SYMATTR Value 2.8
SYMATTR Type ind
SYMATTR SpiceLine Ipk=12m Rser=66 Cpar=115p
SYMBOL Misc\\EuropeanResistor 496 112 R0
SYMATTR InstName Rload
SYMATTR Value 10k
SYMBOL ind2 240 224 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName Lp
SYMATTR Value 2.8
SYMATTR Type ind
SYMATTR SpiceLine Ipk=12m Rser=66 Cpar=105p
SYMBOL res 112 112 R0
WINDOW 0 36 40 Left 0
WINDOW 3 36 76 Left 0
SYMATTR InstName R1
SYMATTR Value 5k
SYMBOL cap 112 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100nF
SYMBOL Misc\\signal 0 112 M0
WINDOW 0 -52 55 Left 2
WINDOW 3 53 26 Left 2
WINDOW 123 56 56 Left 2
WINDOW 39 55 86 Left 2
SYMATTR InstName S
SYMATTR Value SINE(10 2 1K)
SYMATTR Value2 AC 1.7362
SYMATTR SpiceLine Rser=600
FLAG 512 336 0
FLAG 544 48 Eo
FLAG -32 48 Ei
FLAG 0 336 0
TEXT 168 336 Left 2 !K1 Lp Ls 0.9999884
TEXT 640 152 Left 2 !.ac lin 100 500 10k
TEXT 256 -120 Center 4 ;Jensen\nLine Input Transformer
TEXT 160 -24 Left 3 ;JT-11P-1HPC
TEXT 640 120 Left 2 !;tran 0 1000m 995m 1u
TEXT 640 216 Left 2 !.option plotwinsize=0
TEXT 640 184 Left 2 !.options numdgt=7
* Z:\home\khalils\Downloads\files\data\raw_asc\01fc23406ef9_memristor.asc
* Generated by LTspice 26.0.1 for Windows.
* L(y) is the length of the doped area
* dr/dt ( y ) is the derivative of the resistance
* Ron (doped) : .\n \nRoff (undoped) : .\n \nLength of the Device (D) : Lo
* Latex equations:\nL_{(y)} = L_0 - L_0 \\cdot \\frac{m}{y}\nR = 10^3 \\cdot \\frac{f_0}{L_0} \\cdot e^{2 \\cdot L_0}\n \nI = \\frac{d r( V_{(+)} -V_{(-)} )}{d t} \\cdot u(V_{(+)} - V_{(-)}) \\cdot u(V_{(r)} - r_{min}) + u(-(V_{(+)} - V_{(-)} )) \\cdot u(r_{max}-V_{(r)})\nI = \\frac{V_{(+)} - V_{(-)}}{ \\frac{ f_0 }{ L_{V_{r}} } \\cdot e^{2 \\cdot L_{V_{(r)}} } }
Cr r 0 1
Raux r 0 1e12
Br 0 r I={dr_dt(V(plus)-V(minus))*(u(V(plus)-V(minus))*u(V(r)-rmin)+u(-(V(plus)-V(minus)))*u(rmax-V(r)))}
Bpm plus minus I={(V(plus)-V(minus))/((fo*exp(2*L(V(r))))/L(V(r)))}
Rpm plus minus {1000*((fo*exp(2*Lo))/Lo)}
.ic v(r)={rinit}
.func dr_dt(y) {-alpha *((y-VtL)/(gamma+abs(y-VtL)))*u(-y+VtL)-beta*y*u(y-VtL)*u(-y+VtR)-alpha*((y-VtR)/(gamma+abs(y-VtR)))*u(y-VtR)}
.func L(y) {Lo-Lo*m/y}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3888 680
WIRE 1872 32 1664 32
WIRE 1936 32 1872 32
WIRE 2224 32 1936 32
WIRE 1664 128 1664 32
WIRE 1936 144 1936 32
WIRE 2224 144 2224 32
WIRE 496 176 496 16
WIRE 720 176 496 176
WIRE 496 256 496 176
WIRE 720 256 720 176
WIRE 1664 320 1664 208
WIRE 1936 320 1936 208
WIRE 1936 320 1664 320
WIRE 2224 320 2224 224
WIRE 2224 320 1936 320
WIRE 1936 384 1936 320
WIRE 496 448 496 336
WIRE 720 448 720 336
WIRE 720 448 496 448
WIRE 496 512 496 448
SYMBOL cap 1920 144 R0
SYMATTR InstName Cr
SYMATTR Value 1
SYMBOL bi 1664 208 R180
WINDOW 0 24 80 Left 2
WINDOW 3 -60 -298 Left 2
SYMATTR InstName Br
SYMATTR Value I={dr_dt(V(plus)-V(minus))*(u(V(plus)-V(minus))*u(V(r)-rmin)+u(-(V(plus)-V(minus)))*u(rmax-V(r)))}
SYMBOL res 704 240 R0
SYMATTR InstName Rpm
SYMATTR Value {1000*((fo*exp(2*Lo))/Lo)}
SYMBOL bi 496 256 R0
WINDOW 3 74 298 Left 2
SYMATTR Value I={(V(plus)-V(minus))/((fo*exp(2*L(V(r))))/L(V(r)))}
SYMATTR InstName Bpm
SYMBOL res 2208 128 R0
SYMATTR InstName Raux
SYMATTR Value 1e12
FLAG 496 16 plus
FLAG 496 512 minus
FLAG 1936 384 0
FLAG 1872 32 r
TEXT 1752 -24 Left 2 !.ic v(r)={rinit}
TEXT 808 -232 Left 2 !.func dr_dt(y) {-alpha *((y-VtL)/(gamma+abs(y-VtL)))*u(-y+VtL)-beta*y*u(y-VtL)*u(-y+VtR)-alpha*((y-VtR)/(gamma+abs(y-VtR)))*u(y-VtR)}\n.func L(y) {Lo-Lo*m/y}
TEXT 808 -168 Left 2 ;L(y) is the length of the doped area
TEXT 808 -272 Left 2 ;dr/dt ( y  ) is the derivative of the resistance
TEXT 208 -264 Left 2 ;Ron (doped) : .\n \nRoff (undoped) : .\n \nLength of the Device (D) : Lo
TEXT 2136 408 Left 2 ;Latex equations:\nL_{(y)} = L_0 - L_0 \\cdot \\frac{m}{y}\nR = 10^3 \\cdot \\frac{f_0}{L_0} \\cdot e^{2 \\cdot L_0}\n \nI = \\frac{d r( V_{(+)} -V_{(-)} )}{d t} \\cdot u(V_{(+)} - V_{(-)}) \\cdot u(V_{(r)} - r_{min}) + u(-(V_{(+)} - V_{(-)} )) \\cdot u(r_{max}-V_{(r)})\nI = \\frac{V_{(+)} - V_{(-)}}{ \\frac{ f_0 }{ L_{V_{r}} } \\cdot e^{2 \\cdot L_{V_{(r)}} } }