Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0b386f3d3f5a_bjt_modelo.asc
* Generated by LTspice 26.0.1 for Windows.
;.tran 100e-3
R1 N002 N001 10
V3 N005 0 SINE(0 1e-3 1e6) AC 0
V1 N001 0 0.4
C4 NC_01 N007 1e-6
R2 N006 b 0.1
V4 o 0 0 AC 1e-3
C2 N006 N005 1e-6
R4 N004 c 0.1
C5 o 0 1e-9
R3 N007 0 50
C1 N002 0 1e-6
L2 N003 N004 10e-6
Q1 c b 0 0 2N3904
L1 N002 N006 10e-6
C3 o N004 10e-6
V2 N003 0 6
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.ac dec 100 100e3 20e6
.step param R list 1 10 1e3 10e3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -272 -112 -304 -112
WIRE -160 -112 -192 -112
WIRE -64 -112 -160 -112
WIRE 560 -96 352 -96
WIRE -160 -80 -160 -112
WIRE -304 -48 -304 -112
WIRE -64 -48 -64 -112
WIRE 352 -48 352 -96
WIRE 560 -48 560 -96
WIRE -160 16 -160 -16
WIRE 560 48 560 32
WIRE -304 64 -304 32
WIRE 208 112 192 112
WIRE 240 112 208 112
WIRE 352 112 352 32
WIRE 352 112 320 112
WIRE 416 112 352 112
WIRE 544 112 480 112
WIRE 592 112 544 112
WIRE 656 112 592 112
WIRE -160 160 -304 160
WIRE -64 160 -64 32
WIRE -64 160 -96 160
WIRE -32 160 -64 160
WIRE 80 160 48 160
WIRE 128 160 80 160
WIRE -304 192 -304 160
WIRE 544 192 544 112
WIRE 656 208 656 176
WIRE 80 272 80 256
WIRE -304 288 -304 272
WIRE 192 288 192 208
WIRE 544 288 544 272
WIRE 80 368 80 352
SYMBOL res -176 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL cap 640 112 R0
SYMATTR InstName C5
SYMATTR Value 1e-9
SYMBOL cap -176 -80 R0
SYMATTR InstName C1
SYMATTR Value 1e-6
SYMBOL voltage 560 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 6
SYMBOL ind 336 -64 R0
SYMATTR InstName L2
SYMATTR Value 10e-6
SYMBOL npn 128 112 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL cap 480 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 10e-6
SYMBOL voltage 544 176 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 0
SYMATTR Value2 AC 1e-3
SYMBOL cap -96 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1e-6
SYMBOL voltage -304 176 R0
WINDOW 3 24 152 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1e-3 1e6)
SYMATTR Value2 AC 0
SYMBOL res 64 256 R0
SYMATTR InstName R3
SYMATTR Value 50
SYMBOL voltage -304 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0.4
SYMBOL res 336 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 0.1
SYMBOL res -48 176 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 0.1
SYMBOL cap 64 192 R0
SYMATTR InstName C4
SYMATTR Value 1e-6
SYMBOL ind -80 -64 R0
SYMATTR InstName L1
SYMATTR Value 10e-6
FLAG 192 288 0
FLAG -304 64 0
FLAG 560 48 0
FLAG 544 288 0
FLAG -304 288 0
FLAG -160 16 0
FLAG 80 160 b
FLAG 208 112 c
FLAG 80 368 0
FLAG 656 208 0
FLAG 592 112 o
TEXT -258 440 Left 2 !.ac dec 100 100e3 20e6
TEXT -248 488 Left 2 !;.tran 100e-3
TEXT -256 392 Left 2 !.step param R list  1 10 1e3 10e3
* Z:\tmp\asc_dec_bjh7r6w2\0eb0c6eecc84_Demonstration_circuit_Step_ac_BF_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N003 N005 225
R2 N001 Vout 2500
R4 N004 N005 225
V1 N001 0 15
Q1 N002 Vin N003 0 2N5551C
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 764
WIRE 160 64 0 64
WIRE 272 64 160 64
WIRE 400 64 272 64
WIRE 0 112 0 64
WIRE 160 112 160 64
WIRE 272 112 272 64
WIRE 400 144 400 64
WIRE 160 208 160 192
WIRE 208 208 160 208
WIRE 272 208 272 176
WIRE 272 208 208 208
WIRE 0 256 0 192
WIRE 160 256 160 208
WIRE 400 288 400 224
WIRE 480 288 400 288
WIRE -128 304 -176 304
WIRE -64 304 -128 304
WIRE 400 304 400 288
WIRE 400 304 224 304
WIRE 480 304 480 288
WIRE 400 352 400 304
WIRE -176 368 -176 304
WIRE 0 384 0 352
WIRE 160 384 160 352
WIRE -176 496 -176 448
WIRE 0 496 0 464
WIRE 80 496 0 496
WIRE 160 496 160 464
WIRE 160 496 80 496
WIRE 80 512 80 496
SYMBOL res -16 368 R0
SYMATTR InstName R3
SYMATTR Value 225
SYMBOL res 144 96 R0
WINDOW 0 37 30 Left 0
WINDOW 3 36 62 Left 0
SYMATTR InstName R2
SYMATTR Value 2500
SYMBOL res 144 368 R0
SYMATTR InstName R4
SYMATTR Value 225
SYMBOL voltage 400 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 40 44 Left 0
WINDOW 3 40 79 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL npn -64 256 R0
WINDOW 3 26 40 Left 0
WINDOW 0 67 10 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q1
FLAG 480 304 0
FLAG -176 496 0
FLAG -128 304 Vin
FLAG 208 208 Vout
* Z:\tmp\asc_dec_bjh7r6w2\17b6a739896a_negative_gm_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
Vbias2 N005 N004 0
Rd2 Vdd N011 15.5k
XM1 N002 N006 N009 2n7000 ;pnba D)G)S
Vss Vss 0 -9
Vgs N004 0 PULSE(0 0.1 0 0.5m 0.5m 0 1m)
Vbias N001 0 3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1940 1232
WIRE 400 -176 400 -208
WIRE 496 -176 496 -208
WIRE 400 -64 400 -96
WIRE 496 -64 496 -96
WIRE 1392 0 1392 -32
WIRE 1392 32 1392 0
WIRE 1344 112 1248 112
WIRE 1248 208 1248 192
WIRE 1392 352 1392 128
WIRE 1392 352 928 352
WIRE 704 416 704 304
WIRE 928 416 928 352
WIRE 528 496 256 496
WIRE 656 496 608 496
WIRE 1088 496 976 496
WIRE 1184 496 1168 496
WIRE 704 560 704 512
WIRE 928 576 928 512
WIRE 528 624 528 592
WIRE 704 704 704 640
WIRE 928 704 704 704
WIRE 528 736 528 704
WIRE 592 736 528 736
WIRE 528 752 528 736
WIRE 704 752 704 704
WIRE 592 832 592 736
WIRE 256 1104 256 496
WIRE 256 1216 256 1184
SYMBOL battery 624 496 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Vbias2
SYMATTR Value 0
SYMBOL res 512 608 R0
SYMATTR InstName Rd2
SYMATTR Value 15.5k
SYMBOL nmos 976 416 M0
SYMATTR InstName M1
SYMATTR Value 2n7000
SYMATTR Prefix X
SYMBOL voltage 496 -192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vss
SYMATTR Value -9
SYMBOL voltage 256 1088 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vgs
SYMATTR Value PULSE(0 0.1 0 0.5m 0.5m 0 1m)
SYMBOL voltage 1248 96 R0
WINDOW 0 -82 18 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vbias
SYMATTR Value 3
FLAG 256 1216 0
FLAG 400 -64 0
FLAG 400 -208 Vdd
FLAG 1248 208 0
FLAG 496 -64 0
FLAG 496 -208 Vss
FLAG 528 592 Vdd
FLAG 1392 0 output
* Z:\home\khalils\Downloads\files\data\raw_asc\2e425a585fa0_PT2_selfmade.asc
* Generated by LTspice 26.0.1 for Windows.
* PT2 test
G1 0 N001 1 0 {k}
R1 0 N001 1
R3 N002 N001 {R}
L1 N003 N002 {L}
C1 N003 0 {C}
R2 2 0 1
G2 0 2 N003 0 1
.param L=1
.param C={T**2/L}
.param R={2*d*sqrt(L*C)/C+L}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1168 680
WIRE 352 112 272 112
WIRE 512 112 400 112
WIRE 544 112 512 112
WIRE 656 112 624 112
WIRE 784 112 736 112
WIRE 880 112 784 112
WIRE 1008 112 928 112
WIRE 1104 112 1008 112
WIRE 1120 112 1104 112
WIRE 400 128 400 112
WIRE 928 128 928 112
WIRE 352 144 352 112
WIRE 512 144 512 112
WIRE 784 144 784 112
WIRE 880 144 880 112
WIRE 1008 160 1008 112
WIRE 352 224 352 192
WIRE 400 224 400 208
WIRE 400 224 352 224
WIRE 512 224 512 208
WIRE 880 224 880 192
WIRE 928 224 928 208
WIRE 928 224 880 224
WIRE 400 256 400 224
WIRE 512 256 512 224
WIRE 784 256 784 208
WIRE 928 256 928 224
WIRE 1008 256 1008 240
IOPIN 272 112 In
IOPIN 1104 112 Out
RECTANGLE Normal 1072 368 312 40 2
SYMBOL res 992 144 R0
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL g 400 112 R0
WINDOW 3 11 101 Left 2
SYMATTR Value {k}
SYMATTR InstName G1
SYMBOL cap 768 144 R0
WINDOW 3 25 58 Left 2
SYMATTR Value {C}
SYMATTR InstName C1
SYMBOL g 928 112 R0
SYMATTR InstName G2
SYMATTR Value 1
SYMBOL res 528 240 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL ind 752 96 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value {L}
SYMBOL res 640 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value {R}
FLAG 400 256 0
FLAG 928 256 0
FLAG 512 256 0
FLAG 1008 256 0
FLAG 784 256 0
FLAG 272 112 1
FLAG 1104 112 2
TEXT 664 64 Left 2 ;PT2 test
TEXT 528 232 Left 2 !.param L=1\n.param C={T**2/L}\n.param R={2*d*sqrt(L*C)/C+L}
* Z:\home\khalils\Downloads\files\data\raw_asc\18cb12741fe3_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 N002 0 0 2N2222
VCE N001 0 V
IB 0 N002
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VCE 0 5 0.01 IB 0uA 50uA 10uA
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 16 272 16
WIRE 272 48 272 16
WIRE 208 96 96 96
WIRE 96 112 96 96
WIRE 384 112 384 16
WIRE 96 240 96 192
WIRE 272 240 272 144
WIRE 272 240 96 240
WIRE 384 240 384 192
WIRE 384 240 272 240
WIRE 272 272 272 240
SYMBOL npn 208 48 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL voltage 384 96 R0
SYMATTR InstName VCE
SYMBOL current 96 192 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName IB
SYMATTR Value ""
FLAG 272 272 0
TEXT -48 304 Left 2 !.dc VCE 0 5 0.01 IB 0uA 50uA 10uA
* Z:\tmp\asc_dec_bjh7r6w2\1895853d91a4_Draft2_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
A13 N007 N016 N009 N002 N017 N016 N008 N016 DFLOP Vhigh = 1.8 Vlow = 0 Trise = {tff_rise} Tfall = {tff_rise} Td = {td_DFF}
A1 N003 N010 VCLK N001 N010 ~PRBS_OUT PRBS_OUT N010 DFLOP Vhigh = 1.8 Vlow = 0 Trise = {tff_rise} Tfall = {tff_rise} Td = {td_DFF}
A3 N004 N011 VCLK N001 N012 N011 N005 N011 DFLOP Vhigh = 1.8 Vlow = 0 Trise = {tff_rise} Tfall = {tff_rise} Td = {td_DFF}
V2 VCLK 0 PULSE({VSS} {VDD} {Tp} 500p 500p {Tp} {T})
A12 N006 N014 N009 N002 N015 N014 N007 N014 DFLOP Vhigh = 1.8 Vlow = 0 Trise = {tff_rise} Tfall = {tff_rise} Td = {td_DFF}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2628 680
WIRE -1536 -304 -1536 -320
WIRE -1536 -304 -1552 -304
WIRE -1584 -272 -1584 -304
WIRE -1568 -272 -1584 -272
WIRE -1536 -272 -1536 -304
WIRE -1536 -272 -1568 -272
WIRE -1344 -176 -1696 -176
WIRE -1024 -176 -1344 -176
WIRE -752 -176 -1024 -176
WIRE 1024 -176 704 -176
WIRE 1296 -176 1024 -176
WIRE -1696 -112 -1696 -176
WIRE -1024 -112 -1024 -176
WIRE 1024 -112 1024 -176
WIRE 1296 -112 1296 -176
WIRE -1856 -64 -1856 -320
WIRE -1776 -64 -1856 -64
WIRE -1536 -64 -1616 -64
WIRE -1424 -64 -1536 -64
WIRE -1104 -64 -1264 -64
WIRE -832 -64 -944 -64
WIRE 848 -64 848 -352
WIRE 848 -64 784 -64
WIRE 944 -64 848 -64
WIRE 1216 -64 1104 -64
WIRE 1504 -64 1376 -64
WIRE -1776 -16 -1872 -16
WIRE -1536 -16 -1600 -16
WIRE -1504 -16 -1536 -16
WIRE -1104 -16 -1136 -16
WIRE -832 -16 -848 -16
WIRE 944 -16 912 -16
WIRE 1216 -16 1200 -16
WIRE -1872 64 -1872 -16
WIRE -1872 64 -1952 64
WIRE -1456 64 -1872 64
WIRE -1184 64 -1456 64
WIRE -1136 64 -1136 -16
WIRE -1136 64 -1184 64
WIRE -848 64 -848 -16
WIRE -848 64 -1136 64
WIRE -560 64 -848 64
WIRE 912 64 912 -16
WIRE 912 64 592 64
WIRE 1200 64 1200 -16
WIRE 1200 64 912 64
WIRE -1872 80 -1872 64
WIRE -1776 96 -1776 32
WIRE -1696 96 -1696 32
WIRE -1696 96 -1776 96
WIRE -1424 96 -1696 96
WIRE -1104 96 -1104 32
WIRE -1024 96 -1024 32
WIRE -832 96 -832 32
WIRE 944 96 944 32
WIRE 1024 96 1024 32
WIRE 1216 96 1216 32
WIRE 1296 96 1296 32
WIRE -1952 224 -1952 64
SYMBOL Digital\\dflop 1296 -112 R0
SYMATTR InstName A13
SYMATTR SpiceLine Trise = {tff_rise} Tfall = {tff_rise} Td = {td_DFF}
SYMATTR Value2 Vhigh = 1.8 Vlow = 0
SYMBOL Digital\\dflop -1696 -112 R0
SYMATTR InstName A1
SYMATTR SpiceLine Trise = {tff_rise} Tfall = {tff_rise} Td = {td_DFF}
SYMATTR Value2 Vhigh = 1.8 Vlow = 0
SYMBOL Digital\\dflop -1024 -112 R0
SYMATTR InstName A3
SYMATTR SpiceLine Trise = {tff_rise} Tfall = {tff_rise} Td = {td_DFF}
SYMATTR Value2 Vhigh = 1.8 Vlow = 0
SYMBOL voltage -1872 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE({VSS} {VDD} {Tp} 500p 500p {Tp} {T})
SYMBOL Digital\\dflop 1024 -112 R0
SYMATTR InstName A12
SYMATTR SpiceLine Trise = {tff_rise} Tfall = {tff_rise} Td = {td_DFF}
SYMATTR Value2 Vhigh = 1.8 Vlow = 0
FLAG -1872 160 0
FLAG -1568 -272 VSS
FLAG -1536 -64 PRBS_OUT
FLAG -1536 -16 ~PRBS_OUT
FLAG -1184 64 VCLK
FLAG -2000 -128 0
* Z:\tmp\asc_dec_bjh7r6w2\06eb19f8d5e2_scheme4_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N007 N006 84
V3 N006 N001 SINE(0 63.6396 50 0 0 120 0)
V1 N002 N001 SINE(0 63.6396 50 0 0 0 0)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 964 680
WIRE 352 0 272 0
WIRE 624 0 432 0
WIRE 928 96 544 96
WIRE 272 144 272 0
WIRE 272 144 208 144
WIRE 352 144 272 144
WIRE 544 144 544 96
WIRE 544 144 432 144
WIRE 624 144 544 144
WIRE 768 144 704 144
WIRE 928 144 848 144
WIRE 272 288 272 144
WIRE 352 288 272 288
WIRE 624 288 432 288
WIRE 768 288 704 288
WIRE 960 288 848 288
SYMBOL res 720 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 84
SYMBOL voltage 448 288 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 63.6396 50 0 0 120 0)
SYMBOL voltage 448 0 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 63.6396 50 0 0 0 0)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1764A-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1764A-1.8.asy)
XU1 IN IN 0 OUT OUT LT1764-1.8 ;pnba _SHDN)IN)GND)OUT)Sense
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 10 Rser=.1
Rload OUT 0 500
.tran 1
.lib LT1764.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -224 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 512 48 384 48
WIRE -224 64 -224 48
WIRE 384 64 384 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -224 160 -224 144
WIRE 384 160 384 128
WIRE 512 160 512 144
WIRE 160 240 160 208
SYMBOL cap 368 64 R0
WINDOW 39 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=.1
SYMBOL PowerProducts\\LT1764A-1.8 160 96 R0
SYMATTR InstName U1
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -224 160 0
FLAG 384 160 0
FLAG 512 160 0
FLAG 160 240 0
FLAG -224 48 IN
FLAG 512 48 OUT
TEXT 360 248 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3532.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3532.asy)
L1 N001 N002 4.7 Rpar=1K
C4 OUT 0 10
Rload OUT 0 30
XU1 N006 N004 N001 N002 0 OUT IN IN N003 N005 LTC3532 ;pnba Rt)Burst)SW1)SW2)GND)Vout)Vin)_SHDN/SS)FB)Vc
R3 OUT N003 340K
R4 N003 0 200K
R1 N006 0 43.2K
V1 IN 0 3.2
R2 N004 0 200K
C5 OUT N003 33p Rser=1K
C1 N004 0 .01
C3 N005 N003 330p Rser=12.1K
.tran 500u startup
.lib LTC3532.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 892 680
WIRE 128 32 80 32
WIRE 240 32 208 32
WIRE 80 80 80 32
WIRE 240 80 240 32
WIRE -16 144 -128 144
WIRE 16 144 -16 144
WIRE 416 144 304 144
WIRE 560 144 416 144
WIRE 656 144 560 144
WIRE 752 144 656 144
WIRE -128 160 -128 144
WIRE 416 160 416 144
WIRE 656 160 656 144
WIRE 752 160 752 144
WIRE 560 176 560 144
WIRE -16 240 -16 144
WIRE 16 240 -16 240
WIRE 416 240 416 224
WIRE 416 240 304 240
WIRE -128 256 -128 240
WIRE 656 256 656 224
WIRE 752 256 752 240
WIRE -144 336 -240 336
WIRE 16 336 -144 336
WIRE 336 336 304 336
WIRE 416 336 416 240
WIRE 416 336 400 336
WIRE 560 336 560 256
WIRE 560 336 416 336
WIRE -240 352 -240 336
WIRE -144 352 -144 336
WIRE 560 352 560 336
WIRE 16 432 -48 432
WIRE 336 432 304 432
WIRE -240 448 -240 432
WIRE -144 448 -144 416
WIRE -48 448 -48 432
WIRE 560 448 560 432
WIRE -48 544 -48 528
SYMBOL res 544 160 R0
WINDOW 3 27 97 Left 2
SYMATTR Value 340K
SYMATTR InstName R3
SYMBOL cap 640 160 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL res 736 144 R0
SYMATTR InstName Rload
SYMATTR Value 30
SYMBOL res -64 432 R0
SYMATTR InstName R1
SYMATTR Value 43.2K
SYMBOL res 544 336 R0
WINDOW 3 30 87 Left 2
SYMATTR Value 200K
SYMATTR InstName R4
SYMBOL cap 400 160 R0
WINDOW 3 40 35 Left 2
WINDOW 39 27 64 Left 2
SYMATTR Value 33p
SYMATTR SpiceLine Rser=1K
SYMATTR InstName C5
SYMBOL ind 112 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=1K
SYMBOL PowerProducts\\LTC3532 160 272 R0
SYMATTR InstName U1
SYMBOL cap 336 352 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 3 32 VBottom 2
WINDOW 39 -21 41 VBottom 2
SYMATTR InstName C3
SYMATTR Value 330p
SYMATTR SpiceLine Rser=12.1K
SYMBOL cap -160 352 R0
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL res -256 336 R0
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL voltage -128 144 R0
SYMATTR InstName V1
SYMATTR Value 3.2
FLAG 336 432 0
FLAG -128 256 0
FLAG -48 544 0
FLAG -144 448 0
FLAG -240 448 0
FLAG 560 448 0
FLAG 656 256 0
FLAG 752 256 0
FLAG 752 144 OUT
FLAG -128 144 IN
TEXT 480 520 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\4dddce6bf5d0_E3a.asc
* Generated by LTspice 26.0.1 for Windows.
M2 Vout N002 N004 N003 NMOS l=0.36u w=18u
VB N002 0 1.1
VDD N001 0 3.3
M1 N004 N005 0 N006 NMOS l=0.18u w=18u
VIN N005 0 V
RD N001 Vout 8000
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VIN 0 3.3 0.01
.model NMOS NMOS (LEVEL=1 KP=150u VTO=0.5 LAMBDA=0 GAMMA=0 PHI=0.6)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 -256 0 -256
WIRE 96 -128 96 -176
WIRE 96 -96 96 -128
WIRE 48 -16 -48 -16
WIRE 96 -16 96 -48
WIRE 96 32 96 0
WIRE 48 112 -48 112
WIRE 96 112 96 80
WIRE 96 128 96 128
IOPIN 96 -128 Out
SYMBOL voltage -48 96 R0
SYMATTR InstName VIN
SYMBOL voltage -48 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value 1.1
SYMBOL nmos4 48 32 R0
SYMATTR InstName M1
SYMATTR Value2 l=0.18u w=18u
SYMBOL res 80 -272 R0
SYMATTR InstName RD
SYMATTR Value 8000
SYMBOL voltage 0 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 3.3
SYMBOL nmos4 48 -96 R0
SYMATTR InstName M2
SYMATTR Value2 l=0.36u w=18u
FLAG 96 128 0
FLAG -48 64 0
FLAG -48 192 0
FLAG 0 -176 0
FLAG 96 -128 Vout
TEXT -88 -384 Left 2 !.dc VIN 0 3.3 0.01
TEXT -88 -360 Left 2 !.model NMOS NMOS (LEVEL=1 KP=150u VTO=0.5 LAMBDA=0 GAMMA=0 PHI=0.6)
* Z:\home\khalils\Downloads\files\data\raw_asc\3f9dfa2b91a4_1013.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1013.asy)
XU1 N003 N001 +V -V N002 LT1013 ;pnba In+)In-)V+)V-)OUT
V3 N003 0 sine(0 .5 10K)
R2 N001 0 5K
V1 +V 0 15
R1 N002 N001 50K
V2 -V 0 -15
.tran 1m
.lib LT1013.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 680
WIRE 192 0 176 0
WIRE 288 0 272 0
WIRE 352 0 288 0
WIRE 448 0 432 0
WIRE -80 64 -80 48
WIRE 32 64 32 48
WIRE 336 96 336 80
WIRE 288 112 288 0
WIRE 304 112 288 112
WIRE 448 128 448 0
WIRE 448 128 368 128
WIRE 304 144 160 144
WIRE -80 160 -80 144
WIRE 32 160 32 144
WIRE 160 160 160 144
WIRE 336 176 336 160
WIRE 160 256 160 240
SYMBOL voltage -80 48 R0
WINDOW 39 24 125 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT1013 336 64 R0
SYMATTR InstName U1
SYMBOL voltage 160 144 R0
SYMATTR InstName V3
SYMATTR Value sine(0 .5 10K)
SYMBOL res 288 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL res 448 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50K
SYMBOL voltage 32 48 R0
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
FLAG -80 160 0
FLAG 336 80 +V
FLAG -80 48 +V
FLAG 176 0 0
FLAG 160 256 0
FLAG 32 160 0
FLAG 32 48 -V
FLAG 336 176 -V
TEXT 384 240 Left 2 !.tran 1m
* Z:\tmp\asc_dec_bjh7r6w2\0342a27b9114_DiscrNorForLG1465_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N002 N009 125
R4 N001 24OutNor 1k2 tol=1 pwr=0.1
R1 N002 N004 75K tol=1 pwr=0.1
V5 N001 N007 12
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -880 256 -880 112
WIRE -880 480 -880 336
WIRE -784 240 -784 176
WIRE -784 368 -784 240
WIRE -688 288 -688 256
WIRE -688 368 -688 288
WIRE -656 176 -784 176
WIRE -512 256 -688 256
WIRE -464 368 -560 368
WIRE -352 176 -576 176
WIRE -352 256 -432 256
WIRE -352 256 -352 176
WIRE -352 368 -384 368
WIRE -352 368 -352 256
WIRE -320 368 -352 368
WIRE -256 112 -880 112
WIRE -256 192 -256 112
WIRE -256 304 -256 272
WIRE -256 320 -256 304
WIRE -192 304 -256 304
WIRE -144 304 -192 304
WIRE -32 304 -64 304
WIRE 32 144 32 112
WIRE 32 256 32 224
WIRE 32 480 32 352
WIRE 192 112 32 112
WIRE 192 256 192 112
WIRE 192 480 192 336
SYMBOL voltage 192 240 R0
WINDOW 3 -21 58 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 125
SYMATTR InstName V1
SYMBOL res -272 176 R0
SYMATTR InstName R4
SYMATTR Value 1k2
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL res 16 128 R0
SYMATTR InstName R1
SYMATTR Value 75K
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL voltage -880 240 R0
WINDOW 3 -16 56 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 12
SYMATTR InstName V5
FLAG -192 304 24OutNor
FLAG -784 240 23
FLAG -688 288 29
* Z:\home\khalils\Downloads\files\data\raw_asc\2405d99f9224_TRR-3.asc
* Generated by LTspice 26.0.1 for Windows.
D1 a b D1N4934RL
R1 b 0 100
V1 a 0 PULSE(100 -100 0.2u 5n 5n 9u 20u) Rser=10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 15u
.lib 1N4934RL.LIB
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -176 128 -208 128
WIRE -112 128 -176 128
WIRE 16 128 -48 128
WIRE 32 128 16 128
WIRE -208 176 -208 128
WIRE 32 176 32 128
WIRE -208 304 -208 256
WIRE -80 304 -208 304
WIRE 32 304 32 256
WIRE 32 304 -80 304
WIRE -80 320 -80 304
FLAG -80 320 0
FLAG -176 128 a
FLAG 16 128 b
SYMBOL diode -112 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value D1N4934RL
SYMBOL Misc\\EuropeanResistor 16 160 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage -208 160 R0
WINDOW 3 10 105 Invisible 2
WINDOW 123 0 0 Left 2
SYMATTR Value PULSE(100 -100 0.2u 5n 5n 9u 20u)
SYMATTR SpiceLine Rser=10
SYMATTR InstName V1
TEXT -208 320 Left 2 !.tran 15u
TEXT -48 320 Left 2 !.lib 1N4934RL.LIB