Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC693.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1086-5.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC693.asy)
R3 N001 N003 10K
R2 N007 0 10K
R1 IN N007 51K
R4 N001 N006 10K
XU1 0 N001 IN LT1086-5 ;pnba ADJ)OUT)IN
Rload OUT 0 100
V3 N004 N005 PULSE(0 2 0 1u 1u 20m 40m 6) Rser=0.1
C1 N001 0 100
V2 N002 0 3 Rser=10m
XU2 N002 OUT N001 0 NC_01 NC_02 NC_03 NC_04 N007 N006 N004 NC_05 NC_06 NC_07 N003 NC_08 LTC693 ;pnba Vbatt)Vout)Vcc)GND)Batt_On)_Low_Line)Osc In)Osc Sel)PFI)_PFO)WDI)_CE Out)_CE In)_WDO)_Reset)Reset
V4 N005 0 PULSE(0 2 0.4 1u 1u 20m 40m) Rser=0.1
V1 IN 0 PWL(20u 0 25u 7.5) Rser=10m
.tran 0.7
.lib LT1083.lib
.lib LTC693.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1644 680
WIRE 512 -224 -304 -224
WIRE 1200 -224 512 -224
WIRE -176 -128 -256 -128
WIRE -48 -128 -96 -128
WIRE -240 -48 -256 -48
WIRE -80 -48 -160 -48
WIRE -48 -48 -80 -48
WIRE 416 -48 400 -48
WIRE 512 -48 512 -224
WIRE 512 -48 496 -48
WIRE 1200 0 1200 -224
WIRE -624 32 -928 32
WIRE -608 32 -624 32
WIRE -304 32 -304 -224
WIRE -304 32 -352 32
WIRE -48 32 -304 32
WIRE -928 48 -928 32
WIRE -304 64 -304 32
WIRE -48 112 -64 112
WIRE -928 144 -928 128
WIRE -304 144 -304 128
WIRE -480 160 -480 128
WIRE 576 272 400 272
WIRE 944 272 656 272
WIRE 1056 272 1024 272
WIRE 1200 352 1200 80
WIRE 1200 352 400 352
WIRE -624 400 -624 32
WIRE 464 432 400 432
WIRE -624 496 -624 480
WIRE 464 496 464 432
WIRE 464 496 -624 496
WIRE -624 512 -624 496
WIRE -624 608 -624 592
SYMBOL LTC693 176 160 R0
SYMATTR InstName U2
SYMBOL VOLTAGE -80 -128 R90
WINDOW 123 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value 3
SYMATTR SpiceLine Rser=10m
SYMBOL VOLTAGE 928 272 R270
WINDOW 123 -53 56 VBottom 2
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 2 0.4 1u 1u 20m 40m)
SYMATTR SpiceLine Rser=0.1
SYMBOL res -640 384 R0
SYMATTR InstName R1
SYMATTR Value 51K
SYMBOL cap -320 64 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMBOL res -640 496 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL VOLTAGE -928 32 R0
WINDOW 123 24 117 Left 2
SYMATTR Value PWL(20u 0 25u 7.5)
SYMATTR InstName V1
SYMATTR SpiceLine Rser=10m
SYMBOL res 1184 -16 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL PowerProducts\\LT1086-5 -480 32 R0
SYMATTR InstName U1
SYMBOL res 512 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL VOLTAGE 560 272 R270
WINDOW 123 -53 56 VBottom 2
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 2 0 1u 1u 20m 40m 6)
SYMATTR SpiceLine Rser=0.1
SYMBOL res -144 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rload
SYMATTR Value 100
FLAG -64 112 0
FLAG -80 -48 OUT
FLAG -928 144 0
FLAG -304 144 0
FLAG -480 160 0
FLAG -928 32 IN
FLAG -256 -128 0
FLAG -256 -48 0
FLAG -624 608 0
FLAG 1056 272 0
TEXT 584 488 Left 2 !.tran 0.7
* Z:\home\khalils\Downloads\files\data\raw_asc\0741e45c04d2_pMOS_currentMirror_array.asc
* Generated by LTspice 26.0.1 for Windows.
XM5 out8 in VDD VDD PMOS_mobius m=8 ;pnba D)G)S)B
XM6 out16 in VDD VDD PMOS_mobius m=16 ;pnba D)G)S)B
XM1 in in VDD VDD PMOS_mobius m=1 ;pnba D)G)S)B
XM3 out2 in VDD VDD PMOS_mobius m=2 ;pnba D)G)S)B
XM4 out4 in VDD VDD PMOS_mobius m=4 ;pnba D)G)S)B
XM2 out1 in VDD VDD PMOS_mobius m=1 ;pnba D)G)S)B
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1572 680
WIRE 640 112 416 112
WIRE 864 112 640 112
WIRE 1088 112 864 112
WIRE 1312 112 1088 112
WIRE 336 160 288 160
WIRE 368 160 336 160
WIRE 512 160 368 160
WIRE 576 160 512 160
WIRE 720 160 576 160
WIRE 784 160 720 160
WIRE 944 160 784 160
WIRE 1008 160 944 160
WIRE 1168 160 1008 160
WIRE 1232 160 1168 160
WIRE 1392 160 1232 160
WIRE 1456 160 1392 160
WIRE 336 192 336 160
WIRE 512 192 512 160
WIRE 720 192 720 160
WIRE 944 192 944 160
WIRE 1168 192 1168 160
WIRE 1392 192 1392 160
WIRE 416 208 416 112
WIRE 416 208 384 208
WIRE 464 208 416 208
WIRE 640 208 640 112
WIRE 672 208 640 208
WIRE 864 208 864 112
WIRE 896 208 864 208
WIRE 1088 208 1088 112
WIRE 1120 208 1088 208
WIRE 1312 208 1312 112
WIRE 1344 208 1312 208
WIRE 288 240 288 160
WIRE 336 240 288 240
WIRE 576 240 576 160
WIRE 576 240 512 240
WIRE 784 240 784 160
WIRE 784 240 720 240
WIRE 1008 240 1008 160
WIRE 1008 240 944 240
WIRE 1232 240 1232 160
WIRE 1232 240 1168 240
WIRE 1456 240 1456 160
WIRE 1456 240 1392 240
WIRE 336 304 336 288
WIRE 416 304 416 208
WIRE 416 304 336 304
WIRE 336 336 336 304
WIRE 512 336 512 288
WIRE 720 336 720 288
WIRE 944 336 944 288
WIRE 1168 336 1168 288
WIRE 1392 336 1392 288
IOPIN 336 336 BiDir
IOPIN 512 336 BiDir
IOPIN 720 336 BiDir
IOPIN 944 336 BiDir
IOPIN 1168 336 BiDir
IOPIN 1392 336 BiDir
SYMBOL pmos4 672 288 M180
WINDOW 123 56 94 Left 2
SYMATTR Value2 m=2
SYMATTR InstName M3
SYMATTR Value PMOS_mobius
SYMATTR Prefix X
SYMBOL pmos4 1344 288 M180
WINDOW 123 56 94 Left 2
SYMATTR Value2 m=16
SYMATTR InstName M6
SYMATTR Value PMOS_mobius
SYMATTR Prefix X
SYMBOL pmos4 464 288 M180
WINDOW 123 56 94 Left 2
SYMATTR Value2 m=1
SYMATTR InstName M2
SYMATTR Value PMOS_mobius
SYMATTR Prefix X
SYMBOL pmos4 896 288 M180
WINDOW 123 56 94 Left 2
SYMATTR Value2 m=4
SYMATTR InstName M4
SYMATTR Value PMOS_mobius
SYMATTR Prefix X
SYMBOL pmos4 384 288 R180
WINDOW 123 56 94 Left 2
SYMATTR Value2 m=1
SYMATTR InstName M1
SYMATTR Value PMOS_mobius
SYMATTR Prefix X
SYMBOL pmos4 1120 288 M180
WINDOW 123 56 94 Left 2
SYMATTR Value2 m=8
SYMATTR InstName M5
SYMATTR Value PMOS_mobius
SYMATTR Prefix X
FLAG 368 160 VDD
FLAG 336 336 in
FLAG 512 336 out1
FLAG 720 336 out2
FLAG 944 336 out4
FLAG 1168 336 out8
FLAG 1392 336 out16
* Z:\home\khalils\Downloads\files\data\raw_asc\cbefa532b44e_1077.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 3
R1 OUT N001 2Meg
R2 N001 IN 1Meg
V3 IN 0 SINE(0 1 100)
XU1 N002 N001 +V 0 OUT LT1078 ;pnba In+)In-)V+)V-)OUT
R3 N002 0 1Meg
.tran .1
* Half-Wave Rectifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1077.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -96 96 -128 96
WIRE 16 96 -16 96
WIRE 48 96 16 96
WIRE 144 96 128 96
WIRE 160 96 144 96
WIRE 256 96 240 96
WIRE 192 208 192 192
WIRE 144 224 144 96
WIRE 160 224 144 224
WIRE -96 240 -96 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 288 240 256 240
WIRE 64 256 48 256
WIRE 160 256 144 256
WIRE 192 288 192 272
WIRE -96 336 -96 320
FLAG -96 336 0
FLAG 192 192 +V
FLAG -96 224 +V
FLAG -128 96 0
FLAG 48 256 0
FLAG 192 288 0
FLAG 16 96 IN
FLAG 288 240 OUT
SYMBOL voltage -96 224 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 2Meg
SYMBOL res 144 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL voltage 0 96 R90
WINDOW 0 -32 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
SYMBOL opamps\\LT1077 192 176 R0
SYMATTR InstName U1
SYMBOL res 160 240 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 1Meg
TEXT 294 322 Left 0 !.tran .1
TEXT 152 32 Bottom 0 ;Half-Wave Rectifier
* Z:\home\khalils\Downloads\files\data\raw_asc\296c265b1005_AC-equiv__Q1_Rin.asc
* Generated by LTspice 26.0.1 for Windows.
* Rin
* Rb
R11 vb 0
Vs N002 0
Rs vb N002 1k
R21 vb 0
RQ1re vb P001
IQ1Beta-ib N001 vb
RE1 P001 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 512 -32 512 -64
WIRE 288 96 160 96
WIRE 368 96 288 96
WIRE 512 96 512 48
WIRE 512 96 368 96
WIRE 80 128 80 96
WIRE 288 128 288 96
WIRE 368 128 368 96
WIRE 512 128 512 96
WIRE 512 160 512 128
WIRE 80 240 80 208
WIRE 288 240 288 208
WIRE 288 240 80 240
WIRE 368 240 368 208
WIRE 368 240 288 240
WIRE 288 272 288 240
WIRE 512 336 512 320
IOPIN 512 128 Out
LINE Normal 240 144 240 32 2
LINE Normal 448 144 448 32 2
LINE Normal 272 64 176 64
LINE Normal 480 64 400 64
LINE Normal 480 64 480 64
LINE Normal 272 64 256 48
LINE Normal 256 80 272 64
LINE Normal 480 64 464 48
LINE Normal 464 80 480 64
SYMBOL voltage 80 112 R0
WINDOW 0 -12 56 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vs
SYMATTR Value ""
SYMBOL res 496 224 R0
SYMATTR InstName RE1
SYMATTR Value ""
SYMBOL res 352 112 R0
WINDOW 0 -36 97 Left 2
SYMATTR InstName R21
SYMATTR Value ""
SYMBOL current 512 -32 R0
SYMATTR InstName Q1Beta-ib
SYMATTR Value ""
SYMBOL res 272 112 R0
WINDOW 0 -34 99 Left 2
SYMATTR InstName R11
SYMATTR Value ""
SYMBOL res 176 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rs
SYMATTR Value 1k
SYMBOL res 496 144 R0
WINDOW 0 36 49 Left 2
SYMATTR InstName Q1re
SYMATTR Value ""
FLAG 288 272 0
FLAG 512 336 0
FLAG 512 128 vb
TEXT 184 40 Left 2 ;Rin
TEXT 400 40 Left 2 ;Rb
* Z:\tmp\asc_dec_bjh7r6w2\187e809de97d_exp1_2_16014022050_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
F1 N002 N001 Vzero 3
Vzero N004 N001 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 -48 304 -48
WIRE 464 -48 416 -48
WIRE 48 96 -96 96
WIRE 176 96 128 96
WIRE 304 96 304 -48
WIRE 304 96 256 96
WIRE 336 96 304 96
WIRE 464 96 464 -48
WIRE 464 96 416 96
WIRE 640 96 464 96
WIRE 304 176 304 96
WIRE 464 176 464 96
WIRE 304 352 304 256
SYMBOL f 416 -48 R90
WINDOW 0 -32 40 VBottom 2
WINDOW 3 32 40 VTop 2
SYMATTR InstName F1
SYMATTR Value Vzero 3
SYMBOL voltage 160 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vzero
SYMATTR Value 0
* Z:\home\khalils\Downloads\files\data\raw_asc\17041e3d44b2_quantizer.asc
* Generated by LTspice 26.0.1 for Windows.
B1 OUT 0 V=int( (N_DIGITS_PER_VOLT+.1)*V(X))*1/N_DIGITS_PER_VOLT
V1 X 0 SINE(0 1 1k 0 0 0 3)
R1 X 0 1k
R2 OUT 0 1k
.tran 0 .005 0 1u
.param N_DIGITS_PER_VOLT = 8
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1036 680
WIRE 48 48 0 48
WIRE 112 48 48 48
WIRE 384 48 320 48
WIRE 432 48 384 48
WIRE 0 96 0 48
WIRE 112 112 112 48
WIRE 320 112 320 48
WIRE 432 128 432 48
WIRE 0 224 0 176
WIRE 112 224 112 192
WIRE 320 240 320 192
WIRE 432 240 432 208
SYMBOL res 96 96 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 0 80 R0
WINDOW 3 16 199 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 1 1k 0 0 0 3)
SYMATTR InstName V1
SYMBOL bv 320 96 R0
WINDOW 3 -222 258 Left 2
SYMATTR Value V=int( (N_DIGITS_PER_VOLT+.1)*V(X))*1/N_DIGITS_PER_VOLT
SYMATTR InstName B1
SYMBOL res 416 112 R0
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 0 224 0
FLAG 320 240 0
FLAG 112 224 0
FLAG 432 240 0
FLAG 48 48 X
FLAG 384 48 OUT
TEXT 144 40 Left 2 !.tran 0 .005 0 1u
TEXT 208 400 Left 2 !.param N_DIGITS_PER_VOLT = 8
* Z:\home\khalils\Downloads\files\data\raw_asc\06ef66cb7476_outputFilter.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N004 0 {R}
V1 N003 0 AC 1
C1 N001 N004 {C}
R2 N005 0 {R}
C5 N005 0 {C}
C2 N002 N005 {C}
L1 N003 N001 {L}
R3 N002 N001 4
C4 N004 0 {C}
L2 N002 0 {L}
.ac dec 100 1 2Meg
.param L=80u C=20u R=1.4
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 920 680
WIRE 160 -128 144 -128
WIRE 224 -128 160 -128
WIRE 368 -128 304 -128
WIRE 400 -128 368 -128
WIRE 160 -96 160 -128
WIRE 368 -96 368 -128
WIRE 64 -48 64 -128
WIRE 240 -32 160 -32
WIRE 368 -32 304 -32
WIRE 160 -16 160 -32
WIRE 368 -16 368 -32
WIRE 240 0 240 -32
WIRE 304 0 304 -32
WIRE 64 96 64 32
WIRE 160 96 160 64
WIRE 160 96 64 96
WIRE 240 96 240 64
WIRE 240 96 160 96
WIRE 272 96 240 96
WIRE 304 96 304 64
WIRE 304 96 272 96
WIRE 368 96 368 64
WIRE 368 96 304 96
WIRE 480 96 480 -128
WIRE 480 96 368 96
WIRE 272 112 272 96
SYMBOL ind 384 -112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value {L}
SYMBOL cap 288 0 R0
SYMATTR InstName C5
SYMATTR Value {C}
SYMBOL cap 224 0 R0
SYMATTR InstName C4
SYMATTR Value {C}
SYMBOL res 320 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 4
SYMBOL ind 48 -112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value {L}
SYMBOL res 352 -32 R0
SYMATTR InstName R2
SYMATTR Value {R}
SYMBOL res 144 -32 R0
SYMATTR InstName R1
SYMATTR Value {R}
SYMBOL cap 144 -96 R0
SYMATTR InstName C1
SYMATTR Value {C}
SYMBOL voltage 64 -64 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL cap 352 -96 R0
SYMATTR InstName C2
SYMATTR Value {C}
FLAG 272 112 0
TEXT 32 136 Left 2 !.ac dec 100 1 2Meg
TEXT 544 -96 Left 2 !.param L=80u C=20u R=1.4
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1740-1.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1740-1.3.asy)
R1 IN N001 100k
C2 N002 0 10n
Rload OUT 0 0.65
XU1 IN OUT IN N002 OUT N001 MP_01 0 ADP1740-1.3 ;pnba Vin)Sense)EN)SS)Vout)PG))GND
C1 OUT 0 4.7 Rser=3m
V1 IN 0 1.8
.tran 10m startup
.lib ADP1740-1.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE -112 32 -128 32
WIRE -16 32 -112 32
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 416 32 368 32
WIRE 496 32 416 32
WIRE 528 32 496 32
WIRE -128 48 -128 32
WIRE -16 48 -16 32
WIRE 416 48 416 32
WIRE 528 48 528 32
WIRE 80 96 80 32
WIRE 96 96 80 96
WIRE -128 144 -128 128
WIRE 416 144 416 112
WIRE 528 144 528 128
WIRE -16 176 -16 128
WIRE 96 176 -16 176
WIRE 16 240 0 240
WIRE 96 240 80 240
WIRE 368 240 368 32
WIRE 368 240 352 240
WIRE 224 304 224 288
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 0.65
SYMBOL cap 80 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL ADP1740-1.3 224 128 R0
SYMATTR InstName U1
SYMBOL cap 400 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=3m
SYMBOL res -32 32 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage -128 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
FLAG 224 304 0
FLAG -128 144 0
FLAG 0 240 0
FLAG -112 32 IN
FLAG 528 144 0
FLAG 416 144 0
FLAG 496 32 OUT
TEXT 128 352 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3400.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3400.asy)
Rload OUT 0 50
L1 IN N001 4.7 Rser=0.1
V1 IN 0 1.4
R2 N003 0 604K
R1 OUT N003 1.02Meg
C1 OUT 0 4.7
R3 IN N002 1Meg
XU1 N001 0 N003 N002 OUT IN LTC3400 ;pnba SW)GND)FB)_SHDN)Vout)Vin
.tran 250u startup
.lib LTC3400.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2552 1624
WIRE 1632 1136 1536 1136
WIRE 1872 1136 1632 1136
WIRE 1920 1136 1872 1136
WIRE 2048 1136 2000 1136
WIRE 1536 1168 1536 1136
WIRE 1632 1184 1632 1136
WIRE 1872 1184 1872 1136
WIRE 2048 1248 2048 1136
WIRE 2048 1248 2016 1248
WIRE 1536 1280 1536 1248
WIRE 1632 1328 1632 1264
WIRE 1728 1328 1632 1328
WIRE 2080 1328 2016 1328
WIRE 2240 1328 2080 1328
WIRE 2336 1328 2240 1328
WIRE 2336 1344 2336 1328
WIRE 2240 1360 2240 1328
WIRE 2080 1408 2016 1408
WIRE 2080 1424 2080 1408
WIRE 2240 1456 2240 1424
WIRE 2336 1456 2336 1424
WIRE 1872 1488 1872 1472
WIRE 2080 1520 2080 1504
SYMBOL cap 2224 1360 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL ind 1904 1152 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=0.1
SYMBOL VOLTAGE 1536 1152 R0
SYMATTR InstName V1
SYMATTR Value 1.4
SYMBOL POWERPRODUCTS\\LTC3400 1872 1328 R0
SYMATTR InstName U1
SYMBOL res 2320 1328 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL RES 1616 1168 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL res 2064 1408 R0
SYMATTR InstName R2
SYMATTR Value 604K
SYMBOL RES 2064 1312 R0
SYMATTR InstName R1
SYMATTR Value 1.02Meg
FLAG 1872 1488 0
FLAG 2080 1520 0
FLAG 1536 1280 0
FLAG 2240 1456 0
FLAG 2336 1456 0
FLAG 2336 1328 OUT
FLAG 1536 1136 IN
TEXT 2176 1520 Left 2 !.tran 250u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0ad3a1bba5f2_current_mirror_model_nmos.asc
* Generated by LTspice 26.0.1 for Windows.
;.step param wn 1u 70u 1u
M1 vgs vgs 0 0 NMOS l=0.36u w=10u
vdd vdd 0 0.6
vgs vgs 0 0.6
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.op
.include tsmc180.txt
.param wn=1
.dc vgs 0 0.9 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 80 16 16
WIRE 112 96 112 16
WIRE 288 144 288 0
WIRE 16 192 16 160
WIRE 288 192 240 192
WIRE 112 208 112 176
WIRE 368 224 368 128
WIRE 368 224 336 224
WIRE 240 256 240 192
WIRE 288 256 288 240
WIRE 288 256 240 256
WIRE 288 320 288 256
SYMBOL nmos4 336 144 M0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=0.36u w=10u
SYMATTR InstName M1
SYMBOL voltage 112 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vgs
SYMATTR Value 0.6
SYMBOL voltage 16 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vdd
SYMATTR Value 0.6
FLAG 288 320 0
FLAG 16 192 0
FLAG 112 208 0
FLAG 16 16 vdd
FLAG 368 128 vgs
FLAG 112 16 vgs
FLAG 288 0 vgs
TEXT -16 264 Left 2 !.op
TEXT -336 -40 Left 2 !.include tsmc180.txt
TEXT -352 80 Left 2 !;.step param wn 1u 70u 1u\n.param wn=1
TEXT -336 144 Left 2 !.dc vgs 0 0.9 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1521-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1521-3.3.asy)
Rload OUT 0 500
XU1 OUT OUT 0 MP_01 N001 MP_02 MP_03 IN LT1521-3.3 ;pnba OUT)Sense)GND))_SHDN)))IN
C1 OUT 0 1.5
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT1521.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 176 -192 176
WIRE 368 176 320 176
WIRE 432 176 368 176
WIRE 528 176 432 176
WIRE -192 192 -192 176
WIRE 432 192 432 176
WIRE 528 192 528 176
WIRE 32 272 16 272
WIRE 368 272 368 176
WIRE 368 272 320 272
WIRE -192 288 -192 272
WIRE 432 288 432 256
WIRE 528 288 528 272
WIRE 176 368 176 336
SYMBOL cap 416 192 R0
SYMATTR InstName C1
SYMATTR Value 1.5
SYMBOL voltage -192 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL PowerProducts\\LT1521-3.3 176 224 R0
SYMATTR InstName U1
SYMBOL res 512 176 R0
SYMATTR InstName Rload
SYMATTR Value 500
FLAG -192 288 0
FLAG 176 368 0
FLAG 432 288 0
FLAG 528 288 0
FLAG 528 176 OUT
FLAG -192 176 IN
TEXT 440 352 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\24ec339d7365_Fig6_13_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1)
VSD 0 N003 2
M1 0 N002 N003 N001 P_1u L=1u W=10u
VBS N001 0 0
VSG 0 N002 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSG 0 2 1m VBS 0 5 1
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 688
WIRE 320 96 320 80
WIRE 320 192 320 176
WIRE 400 192 320 192
WIRE 448 80 320 80
WIRE 448 112 448 80
WIRE 448 304 448 208
WIRE 528 160 448 160
WIRE 672 80 448 80
WIRE 672 160 608 160
WIRE 672 160 672 80
WIRE 672 208 672 160
WIRE 672 304 448 304
WIRE 672 304 672 288
WIRE 720 80 672 80
WIRE 720 112 720 80
SYMBOL voltage 320 80 R0
WINDOW 0 -89 56 Left 0
WINDOW 3 24 104 Invisible 0
SYMATTR InstName VSG
SYMATTR Value 0
SYMBOL pmos4 400 112 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 L=1u W=10u
SYMATTR InstName M1
SYMATTR Value P_1u
SYMBOL voltage 672 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 41 57 Left 0
WINDOW 3 24 104 Invisible 0
SYMATTR InstName VSD
SYMATTR Value 2
SYMBOL voltage 512 160 M90
WINDOW 0 -32 56 VBottom 0
WINDOW 3 46 56 Invisible 0
SYMATTR InstName VBS
SYMATTR Value 0
FLAG 720 112 0
TEXT 424 336 Left 0 !.dc VSG 0 2 1m VBS 0 5 1
TEXT 424 360 Left 0 !.lib cmosedu_models.txt
TEXT 488 56 Left 0 ;Plot Id(M1)
* Z:\home\khalils\Downloads\files\data\raw_asc\f618eb4f1ee2_inverter.asc
* Generated by LTspice 26.0.1 for Windows.
M2 Vout Vin VLOW VLOW NMOS l=50n w=0.5u
M1 Vout Vin VHIGH VHIGH PMOS l=50n w=1u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include models.txt
.tran 20u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 -32 336 -32
WIRE 336 0 336 -32
WIRE 400 0 336 0
WIRE 336 16 336 0
WIRE 288 32 240 32
WIRE 400 64 400 0
WIRE 400 64 336 64
WIRE 336 144 336 112
WIRE 512 144 336 144
WIRE 240 160 240 32
WIRE 240 160 176 160
WIRE 336 160 336 144
WIRE 432 208 336 208
WIRE 240 240 240 160
WIRE 288 240 240 240
WIRE 336 272 336 256
WIRE 432 272 432 208
WIRE 432 272 336 272
WIRE 336 288 336 272
WIRE 352 288 336 288
SYMBOL nmos4 288 160 R0
SYMATTR InstName M2
SYMATTR Value2 l=50n w=0.5u
SYMBOL pmos4 288 112 M180
SYMATTR InstName M1
SYMATTR Value2 l=50n w=1u
FLAG 352 -32 VHIGH
FLAG 352 288 VLOW
FLAG 176 160 Vin
FLAG 512 144 Vout
TEXT -256 -56 Left 2 !.include models.txt
TEXT -248 -24 Left 2 !.tran 20u
* Z:\home\khalils\Downloads\files\data\raw_asc\100e44504354_Triangle_osc_fm_am1.asc
* Generated by LTspice 26.0.1 for Windows.
* TRIANGLE OSCILLATOR\n \nFrequency and amplitude contol:\nFreq: 100KHz/Volt\nAmplitude: +/-1V / Volt
* Frequency control
* Amplitude control
* TRIANGLE OSCILLATOR \nInput: freq frequency control, 100KHz / Volt\nInput: ampl amplitude control, +/-1V / Volt
* Output
A1 tri_c 0 0 0 0 0 tri_cmp 0 SCHMITT Vt=0 Vh=1 trise=10n tripdt=10n
R1 tri_c 0 1G
C1 tri_c 0 1n
V1 freq 0 PWL(0 1 1m 1 2m 0.2)
V2 ampl 0 PWL(0 1 5m 1 6m 0.2)
B1 tri_c 0 I=-V(freq)*(1-2*V(tri_cmp))*4e-4
B2 tri_out 0 V=V(ampl)*V(tri_c) tripdt=0.1u
.tran 0 10m 0 1u
.ic V(tri_c)=10m
.options plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 932
WIRE -464 -240 -544 -240
WIRE 32 -240 -48 -240
WIRE -544 -208 -544 -240
WIRE -48 -208 -48 -240
WIRE -544 -96 -544 -128
WIRE -48 -96 -48 -128
WIRE -192 176 -544 176
WIRE -128 176 -192 176
WIRE -96 176 -128 176
WIRE 16 176 -96 176
WIRE 176 176 80 176
WIRE 16 208 -32 208
WIRE -32 240 -32 208
WIRE -192 256 -192 176
WIRE -544 272 -544 176
WIRE -96 272 -96 176
WIRE 176 288 112 288
WIRE 112 320 112 288
WIRE -544 416 -544 352
WIRE -192 416 -192 336
WIRE -96 416 -96 336
WIRE 112 416 112 400
IOPIN 176 176 Out
IOPIN 176 288 Out
IOPIN -464 -240 Out
IOPIN 32 -240 Out
RECTANGLE Normal 384 512 -608 0
SYMBOL Digital\\diffschmitt 16 128 R0
SYMATTR InstName A1
SYMATTR SpiceLine Vt=0 Vh=1
SYMATTR SpiceLine2 trise=10n tripdt=10n
SYMBOL bi -544 272 R0
SYMATTR InstName B1
SYMATTR Value I=-V(freq)*(1-2*V(tri_cmp))*4e-4
SYMBOL voltage -48 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 1 5m 1 6m 0.2)
SYMBOL res -208 240 R0
SYMATTR InstName R1
SYMATTR Value 1G
SYMBOL cap -112 272 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL voltage -544 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 1 1m 1 2m 0.2)
SYMBOL bv 112 304 R0
SYMATTR InstName B2
SYMATTR Value V=V(ampl)*V(tri_c)
SYMATTR Value2 tripdt=0.1u
FLAG -96 416 0
FLAG -32 240 0
FLAG 176 176 tri_cmp
FLAG -544 416 0
FLAG -192 416 0
FLAG -128 176 tri_c
FLAG 176 288 tri_out
FLAG 112 416 0
FLAG -544 -96 0
FLAG -464 -240 freq
FLAG -48 -96 0
FLAG 32 -240 ampl
TEXT -560 -392 Left 0 !.tran 0 10m 0 1u
TEXT -456 208 Left 0 !.ic V(tri_c)=10m
TEXT -560 -368 Left 0 !.options plotwinsize=0
TEXT -216 -432 Left 0 ;TRIANGLE OSCILLATOR\n \nFrequency and amplitude contol:\nFreq: 100KHz/Volt\nAmplitude: +/-1V / Volt
TEXT -472 -192 Left 0 ;Frequency control
TEXT 24 -184 Left 0 ;Amplitude control
TEXT -552 40 Left 0 ;TRIANGLE OSCILLATOR \nInput: freq        frequency control, 100KHz / Volt\nInput: ampl      amplitude control, +/-1V / Volt
TEXT 296 288 Left 0 ;Output