Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\AD4003.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\AD4003.asy)
V3 N001 0 5
V6 N002 0 1.8
V2 N007 0 PWL(0 5 100u 0)
XU1 N001 N002 N004 MP_01 0 N006 N005 N008 AD4003 EN_Hi_Z=1 ;pnba REF)Vdd)IN+))GND)IN-)Vout)CNV
C1 0 N005 10p
V4 N008 0 PULSE(0 1.8 227n 0.1n 0.1n 40n 500n)
R1 N004 N003 10
R2 N006 N007 10
V1 N003 0 PWL(0 0 100u 5)
.tran 110u
.lib AD4003.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1252
WIRE 704 224 368 224
WIRE 832 224 784 224
WIRE 368 288 368 224
WIRE 704 336 496 336
WIRE 832 336 784 336
WIRE -192 368 -240 368
WIRE -80 368 -112 368
WIRE 80 368 0 368
WIRE 80 416 80 368
WIRE 144 416 80 416
WIRE 560 432 496 432
WIRE 688 432 624 432
WIRE 144 448 80 448
WIRE -192 496 -240 496
WIRE -80 496 -112 496
WIRE 80 496 80 448
WIRE 80 496 0 496
WIRE 704 528 496 528
WIRE 816 528 784 528
WIRE 368 608 368 576
SYMBOL voltage -96 368 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 100u 5)
SYMBOL AD4003 400 432 R0
SYMATTR InstName U1
SYMBOL voltage 688 528 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 1.8 227n 0.1n 0.1n 40n 500n)
SYMBOL res 16 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage -96 496 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 5 100u 0)
SYMBOL res 16 480 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL cap 624 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 688 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage 688 336 M90
WINDOW 0 47 41 VRight 2
WINDOW 3 -44 39 VRight 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V6
SYMATTR Value 1.8
FLAG 368 608 0
FLAG 832 336 0
FLAG -240 368 0
FLAG 688 432 0
FLAG 816 528 0
FLAG 832 224 0
FLAG -240 496 0
TEXT 192 616 Left 2 !.tran 110u
* Z:\home\khalils\Downloads\files\data\raw_asc\05c5ff344c4b_LSK170.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Vg 0 {Vg}
J1 N001 Vg 0 LSK170A
V2 N001 0 PULSE(0 5 1n 1m 1m 2m 5m 1)
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.tran 0 1m 1n
.param Vg=0
.step param Vg 0 -1.5 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 964 680
WIRE 256 -32 -64 -32
WIRE -64 80 -64 -32
WIRE 256 96 256 -32
WIRE 144 160 48 160
WIRE 208 160 144 160
WIRE 48 192 48 160
WIRE 432 192 256 192
WIRE -64 288 -64 160
WIRE 48 288 48 272
WIRE 48 288 -64 288
WIRE 144 288 48 288
WIRE 256 288 256 192
WIRE 256 288 144 288
WIRE 144 320 144 288
SYMBOL voltage 48 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vg}
SYMBOL njf 208 96 R0
SYMATTR InstName J1
SYMATTR Value LSK170A
SYMBOL voltage -64 64 R0
WINDOW 3 -395 138 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 1n 1m 1m 2m 5m 1)
FLAG 144 320 0
FLAG 432 192 Vs
FLAG 144 160 Vg
TEXT -64 312 Left 2 !.tran 0 1m 1n
TEXT 656 88 Left 2 !.param Vg=0
TEXT 656 128 Left 2 !.step param Vg 0 -1.5 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6993-2.asc
* Generated by LTspice 26.0.1 for Windows.
* LTC6993-2 Retriggerable 10ms One Shot\nRising Edge Triggered, Positive Output Pulse\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6993-2.asy)
R1 N003 0 121K
R2 N002 N004 1000K
XU1 N001 0 N003 N004 N002 OUT LTC6993-2 ;pnba TRIG)GND)SET)DIV)V+)OUT
V2 N001 0 PULSE(0 3.3 1m 1n 1n 1m 8m 3)
R4 OUT 0 100K
R3 N004 0 392K
V1 N002 0 5
.tran 50m startup
.lib LTC6993-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -192 96 -208 96
WIRE 96 96 -112 96
WIRE 608 96 320 96
WIRE 608 112 608 96
WIRE 96 176 80 176
WIRE 384 176 320 176
WIRE 512 176 384 176
WIRE 384 192 384 176
WIRE 512 192 512 176
WIRE 608 208 608 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 336 256 320 256
WIRE 336 288 336 256
WIRE 384 288 384 272
WIRE 384 288 336 288
WIRE 512 288 512 272
WIRE 384 304 384 288
WIRE 384 400 384 384
SYMBOL voltage 512 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 368 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL res 592 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 121K
SYMBOL voltage -96 96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 1m 1n 1n 1m 8m 3)
SYMATTR InstName V2
SYMBOL res 368 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
SYMBOL SpecialFunctions\\LTC6993-2 208 176 R0
SYMATTR InstName U1
FLAG -208 96 0
FLAG 512 288 0
FLAG 608 96 OUT
FLAG 80 176 0
FLAG 608 208 0
FLAG 384 400 0
FLAG -16 256 0
TEXT 512 360 Left 2 !.tran 50m startup
TEXT 216 56 Bottom 2 ;LTC6993-2 Retriggerable 10ms One Shot\nRising Edge Triggered, Positive Output Pulse\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\137c63cc823d_LTC6101_AC.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc Iload 0 1 0.01
* AC-response
* DC-Sweep
* Step Response
* .tran 0 .5m 0 .1u
* Idc=0.5A for .AC-analysis
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6101.asy)
R2 N002 N003 100
V1 N002 0 12
XU1 OUT 0 N003 N001 N002 LTC6101 ;pnba OUT)VEE)IN-)IN+)VCC
Iload N001 0 PULSE(0.5 1 10n 100n 100n 50u 100u) AC 1
R1 N002 N001 .1
R3 OUT 0 5K
.op
.ac dec 100 10 1e6
.options plotwinsize=0
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 96 -496 96
WIRE 64 96 -64 96
WIRE 256 96 144 96
WIRE 336 96 256 96
WIRE 400 96 336 96
WIRE 256 112 256 96
WIRE 400 112 400 96
WIRE -496 128 -496 96
WIRE -64 208 -64 96
WIRE -32 208 -64 208
WIRE 256 208 256 192
WIRE 256 208 224 208
WIRE 400 224 400 192
WIRE -496 240 -496 208
WIRE -32 320 -64 320
WIRE 336 320 336 96
WIRE 336 320 224 320
WIRE -64 352 -64 320
WIRE 272 480 224 480
WIRE 272 496 272 480
WIRE 272 592 272 576
SYMBOL current -496 128 R0
WINDOW 123 24 116 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName Iload
SYMATTR Value PULSE(0.5 1 10n 100n 100n 50u 100u)
SYMBOL LTC6101 96 336 R0
SYMATTR InstName U1
SYMBOL res 160 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value .1
SYMBOL res 240 96 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL voltage 400 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 256 480 R0
SYMATTR InstName R3
SYMATTR Value 5K
FLAG 400 224 0
FLAG -496 240 0
FLAG -64 352 0
FLAG 272 592 0
FLAG 272 480 OUT
TEXT -488 -32 Left 0 ;.dc Iload 0 1 0.01
TEXT -488 16 Left 0 !.op
TEXT -208 -32 Left 0 !.ac dec 100 10 1e6
TEXT -208 -64 Left 0 ;AC-response
TEXT -488 -64 Left 0 ;DC-Sweep
TEXT 72 -64 Left 0 ;Step Response
TEXT 64 -32 Left 0 ;.tran 0 .5m 0 .1u
TEXT 64 0 Left 0 !.options plotwinsize=0
TEXT -448 176 Left 0 ;Idc=0.5A for .AC-analysis
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1572.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1572.asy)
Rload OUT 0 25
V1 IN 0 5
R3 N003 N002 1K
L1 IN N001 150 Rser=0.02 Rpar=5000
C2 N002 0 1
R1 OUT N004 10.7K
XU1 N003 N004 0 N001 IN N001 OUT LT1572 ;pnba Vc)FB)GND)SW)Vin)Anode)Cathode
R2 N004 0 1.24K
C1 OUT 0 100 Rser=0.05
.tran 15m startup
.lib LT1572.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2608 1416
WIRE 1712 880 1552 880
WIRE 1728 880 1712 880
WIRE 1824 880 1808 880
WIRE 1936 880 1824 880
WIRE 1552 896 1552 880
WIRE 1712 944 1712 880
WIRE 1824 944 1824 880
WIRE 1936 944 1936 880
WIRE 1552 992 1552 976
WIRE 2048 1024 2000 1024
WIRE 2176 1024 2048 1024
WIRE 2288 1024 2176 1024
WIRE 2048 1040 2048 1024
WIRE 2176 1040 2176 1024
WIRE 2288 1040 2288 1024
WIRE 1552 1088 1520 1088
WIRE 1648 1088 1632 1088
WIRE 1520 1104 1520 1088
WIRE 2176 1136 2176 1104
WIRE 2288 1136 2288 1120
WIRE 2048 1152 2048 1120
WIRE 2048 1152 2000 1152
WIRE 2048 1168 2048 1152
WIRE 1520 1184 1520 1168
WIRE 2048 1264 2048 1248
WIRE 1824 1280 1824 1232
SYMBOL CAP 1504 1104 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL polcap 2160 1040 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.05
SYMBOL VOLTAGE 1552 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL IND 1712 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL RES 2272 1024 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL POWERPRODUCTS\\LT1572 1824 1088 R0
WINDOW 3 8 168 Left 2
SYMATTR InstName U1
SYMBOL RES 1648 1072 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL RES 2032 1024 R0
SYMATTR InstName R1
SYMATTR Value 10.7K
SYMBOL RES 2032 1152 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
FLAG 2288 1024 OUT
FLAG 2048 1264 0
FLAG 2176 1136 0
FLAG 2288 1136 0
FLAG 1520 1184 0
FLAG 1824 1280 0
FLAG 1552 992 0
FLAG 1552 880 IN
TEXT 2192 1208 Left 2 !.tran 15m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX4239.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX4239.asy)
Vcc Vcc 0 2.5
CL OUT 0 15p
V1 IN 0 SINE(0 50m 10k)
XU1 IN OUT Vcc Vee OUT Vcc MAX4239 ;pnba In+)In-)V+)V-)OUT)SHDN
RL OUT 0 10k
Vee 0 Vee 2.5
.tran 100u
.lib MAX4239.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 64 288 64 272
WIRE 416 352 416 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 64 448 64 400
WIRE 416 448 416 416
WIRE 448 448 448 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 64 544 64 528
WIRE 304 592 304 576
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 10k)
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 10k
SYMBOL MAX4239 432 400 R0
SYMATTR InstName U1
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
FLAG 720 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
FLAG 448 448 Vcc
TEXT 16 632 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\30db4be036bf_Offset_generisk.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
V3 Vcc 0 5.5
Rd N004 0 100k
Vb N003 0 .
Va N002 0 1.6325
XU1 N004 N001 Vcc Vdd Vout level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
Rc N003 N004 100k
Rb N001 Vout 100k
Ra N002 N001 100k
V4 Vdd 0 -5.5
.tran 0 5 0.001
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 512 -16 480 -16
WIRE 640 -16 592 -16
WIRE 224 48 144 48
WIRE 480 48 480 -16
WIRE 480 48 304 48
WIRE 480 96 480 48
WIRE 512 96 480 96
WIRE 640 112 640 -16
WIRE 640 112 576 112
WIRE 672 112 640 112
WIRE 144 128 144 48
WIRE 368 128 336 128
WIRE 464 128 448 128
WIRE 512 128 464 128
WIRE 464 160 464 128
WIRE 336 192 336 128
IOPIN 672 112 Out
SYMBOL Opamps\\UniversalOpamp2 544 112 R0
SYMATTR InstName U1
SYMBOL voltage 720 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value -5.5
SYMBOL res 208 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Ra
SYMATTR Value 100k
SYMBOL voltage 144 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Va
SYMATTR Value 1.6325
SYMBOL voltage 624 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 5.5
SYMBOL res 352 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rc
SYMATTR Value 100k
SYMBOL res 496 0 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rb
SYMATTR Value 100k
SYMBOL voltage 336 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vb
SYMATTR Value .
SYMBOL res 448 144 R0
WINDOW 0 36 49 Left 2
SYMATTR InstName Rd
SYMATTR Value 100k
FLAG 336 272 0
FLAG 144 208 0
FLAG 624 336 0
FLAG 720 336 0
FLAG 544 80 Vcc
FLAG 624 256 Vcc
FLAG 544 144 Vdd
FLAG 720 256 Vdd
FLAG 672 112 Vout
FLAG 464 240 0
TEXT 48 392 Left 2 !.tran 0 5 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\a1b4efda2280_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
Vsupply vdd N003 {vdd}
V2 N004 0 PULSE(0 {Vdd} 0 15n 15n 100n 200n)
R1 N001 N004 R
C1 N002 N003 2p
M1 N002 N001 N003 N003 PMOS
M2 vdd N001 N002 N002 PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.param vdd=5
.tran 300n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 -16 48 -16
WIRE 320 -16 176 -16
WIRE 272 64 240 64
WIRE 240 112 240 64
WIRE 240 112 192 112
WIRE 320 112 320 80
WIRE 464 112 320 112
WIRE 48 144 48 -16
WIRE 192 160 192 112
WIRE 320 160 320 112
WIRE 464 160 464 112
WIRE 240 240 240 112
WIRE 272 240 240 240
WIRE 48 288 48 224
WIRE 320 288 320 256
WIRE 320 288 48 288
WIRE 464 288 464 224
WIRE 464 288 320 288
WIRE 192 320 192 240
SYMBOL cap 448 160 R0
SYMATTR InstName C1
SYMATTR Value 2p
SYMBOL pmos 272 160 R0
SYMATTR InstName M1
SYMBOL res 176 144 R0
SYMATTR InstName R1
SYMBOL voltage 192 304 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 {Vdd} 0 15n 15n 100n 200n)
SYMBOL voltage 48 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vsupply
SYMATTR Value {vdd}
SYMBOL pmos 272 -16 R0
SYMATTR InstName M2
FLAG 192 400 0
FLAG 176 -16 vdd
TEXT 560 248 Left 2 !.param vdd=5
TEXT 560 288 Left 2 !.tran 300n
* Z:\home\khalils\Downloads\files\data\raw_asc\0bbd10d4eccf_loop_probe.asc
* Generated by LTspice 26.0.1 for Windows.
Vinj probe in AC {0.5*lpvar*(lpvar+1)}
Vprobe probe out 0
Iinj 0 probe AC {0.5*lpvar*(lpvar-1)}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -160 144 -80 144
WIRE 0 144 112 144
WIRE 112 224 112 144
WIRE 112 144 160 144
WIRE 112 352 112 304
WIRE 288 144 368 144
WIRE 160 144 208 144
IOPIN -160 144 In
IOPIN 368 144 Out
SYMBOL voltage 16 144 M270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 VBottom 0
WINDOW 123 -32 56 VBottom 0
WINDOW 39 -32 56 VBottom 0
SYMATTR InstName Vinj
SYMATTR Value ""
SYMATTR Value2 AC {0.5*lpvar*(lpvar+1)}
SYMBOL current 112 304 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
WINDOW 123 23 -4 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Iinj
SYMATTR Value ""
SYMATTR Value2 AC {0.5*lpvar*(lpvar-1)}
SYMBOL voltage 192 144 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 VBottom 0
WINDOW 123 -32 56 VBottom 0
WINDOW 39 -32 56 VBottom 0
SYMATTR InstName Vprobe
SYMATTR Value 0
FLAG 112 352 0
FLAG -160 144 in
FLAG 368 144 out
FLAG 160 144 probe
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG858.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nCharge Injection not included\nOnly One channel included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG858.asy)
C1 N002 0 36p
R1 N002 0 49.9
V2 N001 0 3
V4 N003 0 0
V1 N004 0 PULSE(0 3 25u 1n 1n 20u)
V3 +V 0 5
XU1 N004 N001 N002 N003 +V 0 ADG858 ;pnba IN)SA)D)SB)Vdd)GND
.tran 75u
.lib ADG858.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 0 -48 -48
WIRE -144 64 -512 64
WIRE -512 96 -512 64
WIRE 128 96 48 96
WIRE 256 96 128 96
WIRE -144 128 -400 128
WIRE 128 128 128 96
WIRE 256 128 256 96
WIRE -512 192 -512 176
WIRE -400 192 -400 128
WIRE -144 192 -288 192
WIRE 128 240 128 208
WIRE 256 240 256 192
WIRE -400 304 -400 272
WIRE -288 304 -288 192
WIRE -512 320 -512 304
WIRE -48 336 -48 304
WIRE -512 416 -512 400
WIRE -288 448 -288 384
SYMBOL voltage -512 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 112 112 R0
SYMATTR InstName R1
SYMATTR Value 49.9
SYMBOL cap 240 128 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -288 288 R0
WINDOW 3 24 102 Left 2
SYMATTR Value PULSE(0 3 25u 1n 1n 20u)
SYMATTR InstName V1
SYMBOL ADG858 -48 144 R0
SYMATTR InstName U1
SYMBOL voltage -512 80 R0
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL voltage -400 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 0
FLAG 128 240 0
FLAG 256 240 0
FLAG -48 336 0
FLAG -288 448 0
FLAG -512 192 0
FLAG -48 -48 +V
FLAG -512 416 0
FLAG -512 304 +V
FLAG -400 304 0
TEXT -264 416 Left 2 !.tran 75u
TEXT -536 -112 Left 2 ;Note:\nCharge Injection not included\nOnly One channel included\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6253.asc
* Generated by LTspice 26.0.1 for Windows.
* Single-ended in to differential out
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6253.asy)
R1 OUT+ N001 1K
R3 OUT- N002 1K
C1 N003 0 0.1
R2 N001 IN 1K
XU1 OUT+ 0 IN N001 +V LTC6253 ;pnba 1)2)3)4)5
V4 IN 0 SINE(2.5 1 250K)
R5 N003 +V 1K
XU2 OUT- 0 N003 N002 +V LTC6253 ;pnba 1)2)3)4)5
R4 N002 IN 1K
V2 +V 0 5
R6 0 N003 1K
.tran 25u
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 416 -1232 400 -1232
WIRE 512 -1232 496 -1232
WIRE 544 -1232 512 -1232
WIRE 656 -1232 624 -1232
WIRE 576 -1136 576 -1152
WIRE 512 -1120 512 -1232
WIRE 544 -1120 512 -1120
WIRE 656 -1104 656 -1232
WIRE 656 -1104 608 -1104
WIRE 704 -1104 656 -1104
WIRE 400 -1088 400 -1232
WIRE 400 -1088 96 -1088
WIRE 544 -1088 400 -1088
WIRE 96 -1072 96 -1088
WIRE 576 -1056 576 -1072
WIRE 96 -976 96 -992
WIRE 400 -976 400 -1088
WIRE 416 -976 400 -976
WIRE 512 -976 496 -976
WIRE 544 -976 512 -976
WIRE 656 -976 624 -976
WIRE 704 -976 656 -976
WIRE 576 -880 576 -896
WIRE 512 -864 512 -976
WIRE 544 -864 512 -864
WIRE 656 -848 656 -976
WIRE 656 -848 608 -848
WIRE 128 -832 128 -848
WIRE 288 -832 272 -832
WIRE 400 -832 368 -832
WIRE 480 -832 400 -832
WIRE 544 -832 480 -832
WIRE 400 -816 400 -832
WIRE 480 -816 480 -832
WIRE 576 -800 576 -816
WIRE 128 -736 128 -752
WIRE 400 -720 400 -736
WIRE 480 -720 480 -752
SYMBOL voltage 128 -848 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 640 -992 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL res 384 -848 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1K
SYMBOL res 512 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 512 -992 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL opamps\\LTC6253 576 -848 R0
SYMATTR InstName U2
SYMBOL voltage 96 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V4
SYMATTR Value SINE(2.5 1 250K)
SYMBOL cap 464 -816 R0
SYMATTR InstName C1
SYMATTR Value 0.1
SYMBOL opamps\\LTC6253 576 -1104 R0
SYMATTR InstName U1
SYMBOL res 384 -720 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R6
SYMATTR Value 1K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG 128 -848 +V
FLAG 128 -736 0
FLAG 96 -976 0
FLAG 704 -1104 OUT+
FLAG 576 -1056 0
FLAG 96 -1088 IN
FLAG 576 -800 0
FLAG 704 -976 OUT-
FLAG 400 -720 0
FLAG 480 -720 0
FLAG 576 -896 +V
FLAG 576 -1152 +V
FLAG 272 -832 +V
TEXT 744 -768 Left 2 !.tran 25u
TEXT 520 -1288 Bottom 2 ;Single-ended in to differential out
* Z:\home\khalils\Downloads\files\data\raw_asc\1d5ea0425c4a_transistor.asc
* Generated by LTspice 26.0.1 for Windows.
* Example of DC sweep in LTSpice
R1 N002 N001 1k
D1 N002 0 1N4148
V1 N001 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -10 10 3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 80 80 80
WIRE 272 80 240 80
WIRE 80 112 80 80
WIRE 272 128 272 80
WIRE 80 224 80 192
WIRE 272 224 272 192
SYMBOL res 256 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 256 128 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 80 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value ""
FLAG 80 224 0
FLAG 272 224 0
TEXT 344 72 Left 2 !.dc V1 -10 10 3
TEXT 128 -8 Left 2 ;Example of DC sweep in LTSpice
* Z:\home\khalils\Downloads\files\data\raw_asc\3d9c700a6305_ADA4841.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4841.asy)
XU1 IN OUT +V 0 OUT NC_01 ADA4841 ;pnba NI)IN)+V)-V)OUT)_D
V2 +V 0 5
V4 IN 0 SINE(2.5 1 250K)
.tran 500u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1244 700
WIRE 640 -1200 528 -1200
WIRE 560 -1136 560 -1152
WIRE 240 -1120 240 -1136
WIRE 528 -1120 528 -1200
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1200
WIRE 640 -1104 608 -1104
WIRE 736 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 432 -1072 432 -1088
WIRE 560 -1056 560 -1072
WIRE 240 -1024 240 -1040
WIRE 432 -976 432 -992
SYMBOL voltage 240 -1136 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL Opamps\\ADA4841 576 -1104 R0
SYMATTR InstName U1
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V4
SYMATTR Value SINE(2.5 1 250K)
FLAG 240 -1136 +V
FLAG 240 -1024 0
FLAG 432 -976 0
FLAG 736 -1104 OUT
FLAG 560 -1056 0
FLAG 432 -1088 IN
FLAG 560 -1152 +V
TEXT 720 -992 Left 2 !.tran 500u