* Z:\home\khalils\Downloads\files\data\raw_asc\290a437a16f5_IP3_adapter-3.asc
* Generated by LTspice 26.0.1 for Windows.
* source frequencies, should be set in higher level
* source level in volts per carrier
* source resistance in Ohms
* input resistance in Ohms
* DUT connected here
* lowpass filters at multiplier outputs
* derived parameters:
* start time for analysis; give circuit some time to settle
* stop time for analysis
* (The +13.01 converts dbV to dBm @50 Ohms)
* timing gate for measurements
* amplitude measurements
* min/max and Vrms conversion
* IP3 extrapolation and dBm scaling
* @Title\nIP3 measurement text box
* @Author\n2008-04-20 Andreas Czechanowski, DL4SDC
* NOTE:\nThe LC-lowpasses are probably not necessary\nand will soon be removed
R2 N005 source {Rsrc}
L10 N002 prod_l {L_lp} Rser=50
B11 N003 0 V=(idt(v(test)*sin(w2*time)*v(gate))**2+idt(v(test)*cos(w2*time)*v(gate))**2)/((tstp-tsta)**2)
C12 prod_1 0 {C_lp}
C9 prod_h 0 {C_lp}
L12 N004 prod_1 {L_lp} Rser=50
B12 N004 0 V=(idt(v(test)*sin(w1*time)*v(gate))**2+idt(v(test)*cos(w1*time)*v(gate))**2)/((tstp-tsta)**2)
Bsrc N005 0 V={Usrc}*(sin(w1*time)+sin(w2*time))
R1 test 0 {Rload}
C11 prod_2 0 {C_lp}
B3 ip3 0 V=u(time-tstp)*(30*log10(v(amp_12))-10*log10(v(amp_hl))+13.01)
B2 amp_12 0 V=sqrt(2*min(v(prod_2), v(prod_1)))
C10 prod_l 0 {C_lp}
B1 amp_hl 0 V=sqrt(2*max(v(prod_h), v(prod_l)))
L11 N003 prod_2 {L_lp} Rser=50
B13 gate 0 V=u(time-tsta)*u(tstp-time)
L9 N001 prod_h {L_lp} Rser=50
B9 N001 0 V=(idt(v(test)*sin(wh*time)*v(gate))**2+idt(v(test)*cos(wh*time)*v(gate))**2)/((tstp-tsta)**2)
B10 N002 0 V=(idt(v(test)*sin(wl*time)*v(gate))**2+idt(v(test)*cos(wl*time)*v(gate))**2)/((tstp-tsta)**2)
.param f1 = 1.0Meg f2 = 1.1Meg
.param fh = (2*f2)-f1 fl = (2*f1)-f2
.param Usrc = 1.0V
.param Rsrc = 50
.para, Rload = 1G
.param L_lp = (3.979H * 0.2) / abs(f2-f1)
.param C_lp = (6.366m * 0.2) / abs(f2-f1)
.param w1=2*pi*f1 w2=2*pi*f2
.param wh=2*pi*fh wl=2*pi*fl
.param tsta=1/abs(f2-f1)
.param tstp=11*tsta
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -736 -512 -800 -512
WIRE -624 -512 -656 -512
WIRE -576 -512 -624 -512
WIRE -800 -480 -800 -512
WIRE -624 -480 -624 -512
WIRE 32 -416 -16 -416
WIRE -16 -384 -16 -416
WIRE -800 -368 -800 -400
WIRE -624 -368 -624 -416
WIRE -736 -304 -800 -304
WIRE -624 -304 -656 -304
WIRE -576 -304 -624 -304
WIRE -800 -272 -800 -304
WIRE -624 -272 -624 -304
WIRE -16 -272 -16 -304
WIRE 32 -208 -16 -208
WIRE -1136 -176 -1136 -208
WIRE -16 -176 -16 -208
WIRE -800 -160 -800 -192
WIRE -624 -160 -624 -208
WIRE -736 -96 -800 -96
WIRE -624 -96 -656 -96
WIRE -576 -96 -624 -96
WIRE -1136 -64 -1136 -96
WIRE -800 -64 -800 -96
WIRE -624 -64 -624 -96
WIRE -16 -64 -16 -96
WIRE -800 48 -800 16
WIRE -624 48 -624 0
WIRE 16 80 -16 80
WIRE -16 112 -16 80
WIRE -736 128 -800 128
WIRE -624 128 -656 128
WIRE -576 128 -624 128
WIRE -800 160 -800 128
WIRE -624 160 -624 128
WIRE -16 224 -16 192
WIRE -800 272 -800 240
WIRE -624 272 -624 224
WIRE -896 416 -928 416
WIRE -704 416 -816 416
WIRE -304 416 -400 416
WIRE -928 448 -928 416
WIRE -304 448 -304 416
WIRE -928 560 -928 528
WIRE -304 560 -304 528
IOPIN -704 416 Out
IOPIN -400 416 In
IOPIN -576 -512 Out
IOPIN -576 -304 Out
IOPIN -576 -96 Out
IOPIN -576 128 Out
IOPIN 32 -416 Out
IOPIN 32 -208 Out
IOPIN 16 80 Out
RECTANGLE Normal -896 0 -1184 -272 2
RECTANGLE Normal -112 336 -848 -560 2
RECTANGLE Normal 336 -32 -64 -472 2
RECTANGLE Normal 512 288 -64 32 2
RECTANGLE Normal -192 592 -976 368 2
SYMBOL ind -752 -496 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
WINDOW 39 -13 56 VBottom 0
SYMATTR InstName L9
SYMATTR Value {L_lp}
SYMATTR SpiceLine Rser=50
SYMBOL ind -752 144 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
WINDOW 39 -13 56 VBottom 0
SYMATTR InstName L12
SYMATTR Value {L_lp}
SYMATTR SpiceLine Rser=50
SYMBOL bv -928 432 R0
WINDOW 0 39 43 Left 0
WINDOW 3 38 82 Left 0
SYMATTR InstName Bsrc
SYMATTR Value V={Usrc}*(sin(w1*time)+sin(w2*time))
SYMBOL bv -16 -400 R0
SYMATTR InstName B1
SYMATTR Value V=sqrt(2*max(v(prod_h), v(prod_l)))
SYMBOL Misc\\EuropeanResistor -912 432 R270
WINDOW 0 27 56 VTop 0
WINDOW 3 5 56 VBottom 0
SYMATTR InstName R2
SYMATTR Value {Rsrc}
SYMBOL cap -640 -64 R0
SYMATTR InstName C11
SYMATTR Value {C_lp}
SYMBOL bv -800 -496 R0
SYMATTR InstName B9
SYMATTR Value V=(idt(v(test)*sin(wh*time)*v(gate))**2+idt(v(test)*cos(wh*time)*v(gate))**2)/((tstp-tsta)**2)
SYMBOL bv -800 -80 R0
SYMATTR InstName B11
SYMATTR Value V=(idt(v(test)*sin(w2*time)*v(gate))**2+idt(v(test)*cos(w2*time)*v(gate))**2)/((tstp-tsta)**2)
SYMBOL Misc\\EuropeanResistor -320 432 R0
SYMATTR InstName R1
SYMATTR Value {Rload}
SYMBOL cap -640 -272 R0
SYMATTR InstName C10
SYMATTR Value {C_lp}
SYMBOL bv -800 144 R0
SYMATTR InstName B12
SYMATTR Value V=(idt(v(test)*sin(w1*time)*v(gate))**2+idt(v(test)*cos(w1*time)*v(gate))**2)/((tstp-tsta)**2)
SYMBOL bv -16 -192 R0
SYMATTR InstName B2
SYMATTR Value V=sqrt(2*min(v(prod_2), v(prod_1)))
SYMBOL cap -640 160 R0
SYMATTR InstName C12
SYMATTR Value {C_lp}
SYMBOL bv -16 96 R0
SYMATTR InstName B3
SYMATTR Value V=u(time-tstp)*(30*log10(v(amp_12))-10*log10(v(amp_hl))+13.01)
SYMBOL cap -640 -480 R0
SYMATTR InstName C9
SYMATTR Value {C_lp}
SYMBOL bv -800 -288 R0
SYMATTR InstName B10
SYMATTR Value V=(idt(v(test)*sin(wl*time)*v(gate))**2+idt(v(test)*cos(wl*time)*v(gate))**2)/((tstp-tsta)**2)
SYMBOL ind -752 -288 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
WINDOW 39 -13 56 VBottom 0
SYMATTR InstName L10
SYMATTR Value {L_lp}
SYMATTR SpiceLine Rser=50
SYMBOL ind -752 -80 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
WINDOW 39 -13 56 VBottom 0
SYMATTR InstName L11
SYMATTR Value {L_lp}
SYMATTR SpiceLine Rser=50
SYMBOL bv -1136 -192 R0
SYMATTR InstName B13
SYMATTR Value V=u(time-tsta)*u(tstp-time)
FLAG -928 560 0
FLAG -704 416 source
FLAG -304 560 0
FLAG -400 416 test
FLAG -800 -368 0
FLAG -624 -368 0
FLAG -576 -512 prod_h
FLAG -800 -160 0
FLAG -624 -160 0
FLAG -576 -304 prod_l
FLAG -800 48 0
FLAG -624 48 0
FLAG -576 -96 prod_2
FLAG -800 272 0
FLAG -624 272 0
FLAG -576 128 prod_1
FLAG -1136 -64 0
FLAG -1136 -208 gate
FLAG -16 -272 0
FLAG 32 -416 amp_hl
FLAG -16 -64 0
FLAG 32 -208 amp_12
FLAG -16 224 0
FLAG 16 80 ip3
TEXT -832 -768 Left 0 !* source frequencies, should be set in higher level\n.param f1 = 1.0Meg  f2 = 1.1Meg\n.param fh = (2*f2)-f1  fl = (2*f1)-f2\n* source level in volts per carrier\n.param Usrc = 1.0V\n* source resistance in Ohms\n.param Rsrc = 50\n* input resistance in Ohms\n.para, Rload = 1G
TEXT -536 416 Center 0 ;DUT connected here
TEXT 40 -768 Left 0 !* lowpass filters at multiplier outputs\n.param L_lp = (3.979H * 0.2) / abs(f2-f1)\n.param C_lp = (6.366m * 0.2) / abs(f2-f1)
TEXT -416 -768 Left 0 !* derived parameters:\n.param w1=2*pi*f1  w2=2*pi*f2\n.param wh=2*pi*fh  wl=2*pi*fl\n* start time for analysis; give circuit some time to settle\n.param tsta=1/abs(f2-f1)\n* stop time for analysis\n.param tstp=11*tsta
TEXT 8 232 Left 0 ;(The +13.01 converts dbV to dBm @50 Ohms)
TEXT -1168 -288 Left 0 ;timing gate for measurements
TEXT -832 -576 Left 0 ;amplitude measurements
TEXT -56 -488 Left 0 ;min/max and Vrms conversion
TEXT -48 16 Left 0 ;IP3 extrapolation and dBm scaling
TEXT -840 -832 Left 0 ;@Title\nIP3 measurement text box
TEXT -48 488 Left 0 ;@Author\n2008-04-20 Andreas Czechanowski, DL4SDC
TEXT 40 -680 Left 0 ;NOTE:\nThe LC-lowpasses are probably not necessary\nand will soon be removed