* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4370.asc
* Generated by LTspice 26.0.1 for Windows.
MQ2 N007 N011 IN2 IN2 Si4864DY
C1 N010 IN2 33n
V2 IN2 0 PWL(0 0 1m 12)
C2 N009 0 0.15
R1 N008 0 301K
R2 N007 N006 100K
I1 OUT 0 PULSE(0 6 10u 100u 100u 10 20)
R3 N007 OUT 2m
R4 N001 OUT 2m
R5 N005 N001 100K
C3 OUT 0 100
MQ1 N001 N003 IN1 IN1 Si4864DY
C4 N002 IN1 33n
V1 IN1 0 PWL(0 0 1m 11 100m 11 9.9 13)
C5 N004 0 0.1
XU1 0 N008 N009 IN2 N011 N010 N007 N006 N005 N001 N002 N003 IN1 N004 0 0 LTC4370 ;pnba _EN2)RANGE)COMP)Vin2)GATE2)CPO2)OUT2)FETON2)FETON1)OUT1)CPO1)GATE1)Vin1)Vcc)GND)_EN1
C6 N008 0 1p
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 10
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4370.asy)
.lib LTC4370.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2404 680
WIRE 144 -80 -368 -80
WIRE 240 -80 144 -80
WIRE 352 -80 240 -80
WIRE 704 -80 448 -80
WIRE -368 -64 -368 -80
WIRE 144 -64 144 -80
WIRE -368 32 -368 16
WIRE 144 32 144 0
WIRE 240 32 240 -80
WIRE 368 32 368 -32
WIRE 16 80 0 80
WIRE 704 80 704 -80
WIRE 704 80 496 80
WIRE 736 80 704 80
WIRE 832 80 816 80
WIRE 912 80 832 80
WIRE 1072 80 912 80
WIRE 912 96 912 80
WIRE 1072 96 1072 80
WIRE -80 128 -96 128
WIRE 16 128 -16 128
WIRE 592 128 496 128
WIRE 704 128 704 80
WIRE 704 128 672 128
WIRE 16 176 0 176
WIRE 528 176 496 176
WIRE 704 176 608 176
WIRE 912 192 912 160
WIRE 1072 192 1072 176
WIRE -128 224 -224 224
WIRE 16 224 -128 224
WIRE 704 224 704 176
WIRE 704 224 496 224
WIRE 736 224 704 224
WIRE 832 224 832 80
WIRE 832 224 816 224
WIRE -224 240 -224 224
WIRE -128 240 -128 224
WIRE 16 272 0 272
WIRE 544 272 496 272
WIRE 544 288 544 272
WIRE -224 336 -224 304
WIRE -128 336 -128 320
WIRE 144 336 144 320
WIRE 544 368 544 352
WIRE 368 384 368 320
WIRE 144 432 144 400
WIRE 144 432 -96 432
WIRE 240 432 240 320
WIRE 240 432 144 432
WIRE 352 432 240 432
WIRE 704 432 704 224
WIRE 704 432 448 432
WIRE -96 448 -96 432
WIRE -96 544 -96 528
FLAG -96 544 0
FLAG 544 368 0
FLAG 0 272 0
FLAG -128 336 0
FLAG 912 192 0
FLAG 1072 192 0
FLAG -368 32 0
FLAG 0 176 0
FLAG 0 80 0
FLAG -96 432 IN2
FLAG -368 -80 IN1
FLAG 1072 80 OUT
FLAG -224 336 0
FLAG -96 128 0
SYMBOL nmos 448 384 R90
WINDOW 0 -13 64 VLeft 2
WINDOW 3 55 37 VTop 2
SYMATTR InstName Q2
SYMATTR Value Si4864DY
SYMBOL cap 128 336 R0
SYMATTR InstName C1
SYMATTR Value 33n
SYMBOL voltage -96 432 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 1m 12)
SYMBOL cap 528 288 R0
SYMATTR InstName C2
SYMATTR Value 0.15
SYMBOL res -144 224 R0
SYMATTR InstName R1
SYMATTR Value 301K
SYMBOL res 624 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL current 1072 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value PULSE(0 6 10u 100u 100u 10 20)
SYMBOL res 720 208 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2m
SYMBOL res 720 64 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2m
SYMBOL res 576 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 100K
SYMBOL cap 896 96 R0
WINDOW 39 24 84 Left 2
SYMATTR InstName C3
SYMATTR Value 100
SYMBOL nmos 448 -32 M270
WINDOW 0 52 49 VTop 2
WINDOW 3 -12 71 VLeft 2
SYMATTR InstName Q1
SYMATTR Value Si4864DY
SYMBOL cap 128 0 M180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C4
SYMATTR Value 33n
SYMBOL voltage -368 -80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1m 11 100m 11 9.9 13)
SYMBOL cap -16 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 0.1
SYMBOL SpecialFunctions\\LTC4370 240 192 R0
SYMATTR InstName U1
SYMBOL cap -240 240 R0
SYMATTR InstName C6
SYMATTR Value 1p
TEXT 800 392 Left 2 !.tran 10