Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0266092db54e_lpf_2nd_ord_1khz_cutoff.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N003 0 100n
C1 N002 0 100n
R1 N002 N001 595.6201131
V1 N001 0 AC 1
R2 N003 N002 595.6201131
D1 0 N003 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.ac oct 1000 1 2meg
.meas AC f FIND frequency WHEN mag(V(n003))=0.7079457843841379
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 48 112 -32 112
WIRE 208 112 128 112
WIRE 256 112 208 112
WIRE 384 112 336 112
WIRE 512 112 384 112
WIRE -32 144 -32 112
WIRE 208 144 208 112
WIRE 384 144 384 112
WIRE 512 144 512 112
WIRE -32 256 -32 224
WIRE 208 256 208 208
WIRE 384 256 384 208
WIRE 512 256 512 208
SYMBOL res 144 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 595.6201131
SYMBOL res 352 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 595.6201131
SYMBOL voltage -32 128 R0
WINDOW 3 24 152 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL cap 368 144 R0
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL diode 528 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL cap 192 144 R0
SYMATTR InstName C1
SYMATTR Value 100n
FLAG 208 256 0
FLAG -32 256 0
FLAG 384 256 0
FLAG 512 256 0
TEXT -56 56 Left 2 !.ac oct 1000 1 2meg
TEXT -136 -32 Left 2 !.meas AC f FIND frequency WHEN mag(V(n003))=0.7079457843841379
* Z:\home\khalils\Downloads\files\data\raw_asc\2cedc5ce6258_AD8565.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8565.asy)
Vin IN 0 SINE(0 1 10K)
V2 -V 0 -15
R1 N001 0 10K
XU1 IN N001 +V -V OUT AD8565 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
R2 OUT N001 10K
Rload OUT 0 10K
.tran 1m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL AD8565 576 -1168 R0
SYMATTR InstName U1
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
TEXT 704 -960 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1084.asc
* Generated by LTspice 26.0.1 for Windows.
R1 OUT N001 121
R2 N001 0 365
V1 IN 0 PWL(0 0 1 10) Rser=0.1
Rload OUT 0 10
C1 OUT 0 10
XU1 N001 OUT IN LT1084 ;pnba ADJ)OUT)IN
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1084.asy)
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1424 896
WIRE 1856 896 1808 896
WIRE 1952 896 1856 896
WIRE 2080 896 1952 896
WIRE 1856 912 1856 896
WIRE 2080 912 2080 896
WIRE 1424 928 1424 896
WIRE 1952 928 1952 896
WIRE 1952 1008 1952 992
WIRE 2080 1008 2080 992
WIRE 1680 1024 1680 992
WIRE 1856 1024 1856 992
WIRE 1856 1024 1680 1024
WIRE 1424 1040 1424 1008
WIRE 1856 1040 1856 1024
WIRE 1856 1136 1856 1120
FLAG 2080 896 OUT
FLAG 1856 1136 0
FLAG 2080 1008 0
FLAG 1424 1040 0
FLAG 1952 1008 0
FLAG 1424 896 IN
SYMBOL RES 1840 896 R0
SYMATTR InstName R1
SYMATTR Value 121
SYMBOL RES 1840 1024 R0
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL VOLTAGE 1424 912 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMATTR SpiceLine Rser=0.1
SYMBOL RES 2064 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL cap 1936 928 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LT1084 1680 896 R0
SYMATTR InstName U1
TEXT 1976 1096 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ISO16750-2_example.asc
* Generated by LTspice 26.0.1 for Windows.
* For documentation see:\n LTspice Models of ISO 7637-2 & ISO 16750-2 Transients\n http://www.linear.com/solutions/7719
* ISO 16750-2 Transients
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ISO16750-2.asy)
XU1 N001 0 4-6-3_12V_StartingProfile ;pnba +)-
XU2 N002 0 4-6-3_24V_StartingProfile ;pnba +)-
.tran 0 20 0 1m
.lib ISO16750-2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 904 680
WIRE 128 -64 128 -96
WIRE 544 -64 544 -96
WIRE 128 48 128 16
WIRE 544 48 544 16
SYMBOL ISO16750-2 544 -64 R0
SYMATTR InstName U2
SYMATTR SpiceModel 4-6-3_24V_StartingProfile
SYMBOL ISO16750-2 128 -64 R0
SYMATTR InstName U1
FLAG 128 48 0
FLAG 544 48 0
TEXT 408 144 Left 2 !.tran 0 20 0 1m
TEXT 128 -192 Left 2 ;For documentation see:\n  LTspice Models of ISO 7637-2 & ISO 16750-2 Transients\n  http://www.linear.com/solutions/7719
TEXT 128 -240 Left 4 ;ISO 16750-2 Transients
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8003-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* 1MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8003-3.3.asy)
XU1 0 NC_01 NC_02 MP_03 N002 MP_04 MP_05 MP_06 MP_07 0 N001 IN IN OUT LTM8003-3.3 ;pnba GND)Bias)PG))RT)))))Sync)TR/SS)Run)Vin)Vout
R2 OUT 0 3
R1 N002 0 41.2K
V1 IN 0 24
C1 OUT 0 47
C2 N001 0 0.001
.tran 750u startup
.lib LTM8003-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 -64 -96 -64
WIRE 192 -64 16 -64
WIRE -96 -48 -96 -64
WIRE 192 -32 192 -64
WIRE 16 0 16 -64
WIRE 32 0 16 0
WIRE -96 48 -96 32
WIRE 32 80 16 80
WIRE 416 80 352 80
WIRE 512 80 416 80
WIRE 416 96 416 80
WIRE 512 96 512 80
WIRE -48 160 -80 160
WIRE 32 160 16 160
WIRE 416 192 416 160
WIRE 512 192 512 176
WIRE -64 256 -80 256
WIRE 32 256 16 256
WIRE 192 320 192 304
SYMBOL cap 400 96 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMBOL LTM8003-3.3 192 144 R0
SYMATTR InstName U1
SYMBOL cap 16 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 0.001
SYMBOL res 496 80 R0
SYMATTR InstName R2
SYMATTR Value 3
SYMBOL voltage -96 -64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 32 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 41.2K
FLAG -96 48 0
FLAG -80 256 0
FLAG 192 320 0
FLAG 512 192 0
FLAG -96 -64 IN
FLAG 512 80 OUT
FLAG 416 192 0
FLAG 16 80 0
FLAG -80 160 0
TEXT 376 272 Left 2 !.tran 750u startup
TEXT -24 304 Top 2 ;1MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\26a69dee91e7_Draft17.asc
* Generated by LTspice 26.0.1 for Windows.
* Doesn't work. trying to make something working with negative voltage
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
;dc V1 0 10 0.01
V2 VCC2 VGND 15
R3 N003 N001 10k
V4 VEE2 0 50
Q4 N006 VCC2 VOUT 0 2N3904
V1 VGND VEE2 15
XU1 N003 VGND VCC2 VEE2 N004 LT1001 ;pnba In+)In-)V+)V-)OUT
C1 N004 N007 20p
R5 VGND VGND 10k
R1 VOUT 0 10k
Q3 N002 N004 N006 0 2N3906
R4 N002 N003 10k
VIN N001 VGND SINE(0 10 50)
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0.1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1896 680
WIRE 256 -32 0 -32
WIRE 672 -32 416 -32
WIRE 912 -32 672 -32
WIRE 0 32 0 -32
WIRE 672 48 672 -32
WIRE 912 48 912 -32
WIRE 336 80 336 -32
WIRE 384 80 336 80
WIRE 496 96 448 96
WIRE 848 96 496 96
WIRE 336 112 256 112
WIRE 384 112 336 112
WIRE 672 192 672 144
WIRE 912 192 912 144
WIRE -64 224 -192 224
WIRE 912 288 672 288
WIRE -64 304 -192 304
WIRE 384 336 336 336
WIRE 496 336 496 96
WIRE 496 336 448 336
WIRE 672 368 672 288
WIRE 736 368 672 368
WIRE 752 368 736 368
WIRE -64 384 -192 384
WIRE 672 416 672 368
SYMBOL OpAmps\\OP07 416 160 M180
SYMATTR InstName U1
SYMBOL voltage 0 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value SINE(0 10 50)
SYMATTR InstName VIN
SYMBOL res 352 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL cap 448 320 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 20p
SYMBOL voltage -192 288 R0
WINDOW 0 54 29 Left 2
WINDOW 3 50 56 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 432 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL res 656 400 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL pnp 848 48 R0
SYMATTR InstName Q3
SYMATTR Value 2N3906
SYMBOL res 320 96 R0
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL npn 848 192 R0
SYMATTR InstName Q4
SYMATTR Value 2N3904
SYMBOL voltage -192 368 R0
WINDOW 0 54 29 Left 2
WINDOW 3 50 56 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 50
SYMBOL voltage -192 208 R0
WINDOW 0 54 29 Left 2
WINDOW 3 50 56 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
FLAG -192 464 0
FLAG -64 384 VEE2
FLAG -64 224 VCC2
FLAG 672 496 0
FLAG 416 64 VEE2
FLAG 416 128 VCC2
FLAG 736 368 VOUT
FLAG -64 304 VGND
FLAG 0 112 VGND
FLAG 336 192 VGND
FLAG 608 240 VEE2
FLAG 256 112 VGND
FLAG 848 240 VCC2
TEXT -336 -112 Left 2 !;dc V1 0 10 0.01
TEXT 304 448 Left 2 !.tran 0.1
TEXT 888 -128 Left 2 ;Doesn't work. trying to make something working with negative voltage
* Z:\home\khalils\Downloads\files\data\raw_asc\2e19ad06ee12_Flicker1.asc
* Generated by LTspice 26.0.1 for Windows.
* Shows how to make a resistor noiseless.
* Flicker Noise\n---------------------\nHelmut Sennewald\n \nThis example schematic shows how to get the flicker noise.\n \n1. Run the simulation with and without the NMOS noise \nparameter for flicker noise.\n \n2. Plot the difference in V(onoise) to get the flicker noise.\n@1 is the first run. @2 is the second run.\nPlot the following expression: \nsqrt(V(onoise)@2*V(onoise)@2-V(onoise)@1*V(onoise)@1)
M1 OUT N003 0 0 NMOS1
V2 N001 0 5
R6 N003 N002 6k noiseless
V1 N002 0 1.8 AC 1
R3 N001 OUT 6k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.NOISE V(out) V1 oct 10 10 100K
.model NMOS1 NMOS(Vto=1 Kp=1m Kf={KF1} Af=1)
.op
.step param KF1 list 0 1e-25
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3088 1688
WIRE 1568 1136 1568 1104
WIRE 1568 1248 1568 1216
WIRE 1664 1104 1568 1104
WIRE 1760 832 1760 816
WIRE 1760 928 1760 912
WIRE 1952 1104 1744 1104
WIRE 2000 816 1760 816
WIRE 2000 832 2000 816
WIRE 2000 1008 2000 912
WIRE 2000 1024 2000 1008
WIRE 2000 1312 2000 1120
WIRE 2240 1008 2000 1008
LINE Normal 1785 1046 1504 1046
LINE Normal 1785 1316 1785 1046
LINE Normal 1785 1316 1504 1316
LINE Normal 1504 1316 1504 1046
SYMBOL voltage 1568 1120 R0
WINDOW 3 37 57 Left 0
WINDOW 123 24 104 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 1.8
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL res 1984 816 R0
SYMATTR InstName R3
SYMATTR Value 6k
SYMBOL res 1760 1088 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
WINDOW 123 60 56 VTop 0
SYMATTR InstName R6
SYMATTR Value 6k
SYMATTR Value2 noiseless
SYMBOL voltage 1760 816 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL nmos 1952 1024 R0
SYMATTR InstName M1
SYMATTR Value NMOS1
FLAG 1760 928 0
FLAG 1568 1248 0
FLAG 2240 1008 OUT
FLAG 2000 1312 0
TEXT 1464 720 Left 0 !.NOISE V(out) V1 oct 10 10 100K
TEXT 1464 1016 Left 0 ;Shows how to make a resistor noiseless.
TEXT 1472 264 Left 0 ;Flicker Noise\n---------------------\nHelmut Sennewald\n \nThis example schematic shows how to get the flicker noise.\n \n1. Run the simulation with and without the NMOS noise \nparameter for flicker noise.\n \n2. Plot the difference in V(onoise) to get the flicker noise.\n@1 is the first run. @2 is the second run.\nPlot the following expression: \nsqrt(V(onoise)@2*V(onoise)@2-V(onoise)@1*V(onoise)@1)
TEXT 1464 760 Left 0 !.model NMOS1 NMOS(Vto=1 Kp=1m Kf={KF1} Af=1)
TEXT 1464 680 Left 0 !.op
TEXT 1464 640 Left 0 !.step param KF1 list 0 1e-25
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP124-2.85.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5.5
C2 OUT 0 1
Rload OUT 0 100
C1 IN 0 1
XU1 OUT MP_01 OUT 0 IN MP_02 MP_03 IN ADP124 K=42553.2 ;pnba Vout))Sense)GND)En)))Vin
.tran 10m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP124-2.85.asy)
.lib ADP124.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 384 96 352 96
WIRE 432 96 384 96
WIRE 512 96 432 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 432 112 432 96
WIRE 512 112 512 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 384 208 384 96
WIRE 384 208 352 208
WIRE 432 208 432 176
WIRE 512 208 512 192
WIRE 256 272 256 256
FLAG 0 208 0
FLAG 256 272 0
FLAG 432 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL cap 416 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ADP124-2.85 256 208 R0
SYMATTR InstName U1
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\e4bfa502e27c_LAB_5.asc
* Generated by LTspice 26.0.1 for Windows.
L3 N003 N001 4
V1 N001 N004 SINE(0 70.7 1.59 0 0 0)
K1 L1 L2 3
L1 N003 N004 8
L2 N003 N002 6
K3 L2 L3 2
K2 L1 L3 1
R1 N002 N004 100
C1 N002 N001 2m
.tran 0.1666 0.0833
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 96 -80 -80 -80
WIRE 336 -80 160 -80
WIRE -80 64 -80 -80
WIRE -48 64 -80 64
WIRE 128 64 32 64
WIRE 224 64 128 64
WIRE 336 64 336 -80
WIRE 336 64 304 64
WIRE -80 112 -80 64
WIRE 128 112 128 64
WIRE 336 112 336 64
WIRE -80 224 -80 192
WIRE 128 224 128 192
WIRE 128 224 -80 224
WIRE 336 224 336 192
WIRE 336 224 128 224
SYMBOL ind 112 96 R0
SYMATTR InstName L1
SYMATTR Value 8
SYMATTR Type ind
SYMBOL ind 48 48 R90
WINDOW 0 4 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L3
SYMATTR Value 4
SYMATTR Type ind
SYMBOL ind 208 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 4 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 6
SYMATTR Type ind
SYMBOL voltage -80 96 R0
WINDOW 3 -315 102 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 70.7 1.59 0 0 0)
SYMBOL res 320 96 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL cap 160 -96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2m
TEXT 64 280 Left 2 !K1 L1 L2 3\nK2 L1 L3 1\nK3 L2 L3 2
TEXT -232 -184 Left 2 !.tran 0.1666 0.0833
* Z:\home\khalils\Downloads\files\data\raw_asc\1bd192eea262_Voltage_subtractor.asc
* Generated by LTspice 26.0.1 for Windows.
* Voltage substractor
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8032.asy)
V1 IN2 0 3.7
V2 IN1 IN2 4.2
R2 N003 0 100k
XU1 N003 N002 N001 0 OUT AD8031 ;pnba In+)In-)V+)V-)OUT
V3 N001 0 5
R1 N003 IN1 100k
R4 N002 OUT 100k
R3 IN2 N002 100k
.tran 0 1 0 0.01
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 -80 -144 -80
WIRE 560 -80 208 -80
WIRE -144 -48 -144 -80
WIRE -144 48 -144 32
WIRE -32 48 -144 48
WIRE 16 48 -32 48
WIRE 144 48 96 48
WIRE 288 48 144 48
WIRE 416 48 368 48
WIRE 208 112 208 -80
WIRE 144 128 144 48
WIRE 176 128 144 128
WIRE 416 144 416 48
WIRE 416 144 240 144
WIRE -96 160 -96 -80
WIRE -32 160 -96 160
WIRE 16 160 -32 160
WIRE 144 160 96 160
WIRE 176 160 144 160
WIRE -144 192 -144 48
WIRE 560 192 560 -80
WIRE 144 208 144 160
WIRE -144 304 -144 272
WIRE 144 304 144 288
WIRE 144 304 -144 304
WIRE 208 304 208 176
WIRE 208 304 144 304
WIRE 560 304 560 272
WIRE 560 304 208 304
WIRE 208 320 208 304
SYMBOL res 160 192 M0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res 112 176 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage 560 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -144 -64 R0
WINDOW 0 -79 41 Left 2
WINDOW 3 -82 66 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 4.2
SYMBOL res 0 32 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 272 32 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL voltage -144 176 R0
WINDOW 0 -80 29 Left 2
WINDOW 3 -82 58 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.7
SYMBOL OpAmps\\AD8032 208 80 R0
SYMATTR InstName U1
FLAG 208 320 0
FLAG 416 144 OUT
FLAG -32 160 IN1
FLAG -32 48 IN2
TEXT -160 -192 Left 2 ;Voltage substractor
TEXT -160 -160 Left 2 !.tran 0 1 0 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2109-1.82.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2109-1.82.asy)
L1 N001 OUT 1
Rload OUT 0 5
V1 IN 0 5
XU1 IN IN N001 OUT 0 ADP2109-x.x Rtop=211.2K ;pnba Vin)EN)SW)FB)GND
C1 OUT 0 10
.tran .5m startup
.lib ADP2109-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 144
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ADP2109-1.82 352 224 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 5
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
TEXT 552 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1501-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1501-3.3.asy)
Rload OUT 0 10
L1 N001 N002 33
V1 IN 0 2.5
C1 OUT 0 220 Rser=0.05
XU1 IN IN N001 0 N002 N003 N004 OUT LT1501-3.3 ;pnba _SHDN)Vin)Isense)GND)SW)LBO)LBI)FB
D1 N002 OUT 1N5818
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
.lib LT1501-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2080 1544
WIRE 1296 1072 1264 1072
WIRE 1424 1072 1376 1072
WIRE 1456 1072 1424 1072
WIRE 1552 1072 1520 1072
WIRE 1632 1072 1552 1072
WIRE 1632 1088 1632 1072
WIRE 992 1120 896 1120
WIRE 1104 1120 992 1120
WIRE 896 1136 896 1120
WIRE 1104 1136 1104 1120
WIRE 1264 1136 1264 1072
WIRE 1632 1184 1632 1168
WIRE 1424 1200 1424 1072
WIRE 1424 1200 1360 1200
WIRE 992 1216 992 1120
WIRE 1008 1216 992 1216
WIRE 896 1232 896 1216
WIRE 1392 1264 1360 1264
WIRE 1008 1312 992 1312
WIRE 1552 1328 1552 1072
WIRE 1552 1328 1360 1328
WIRE 1552 1344 1552 1328
WIRE 1184 1408 1184 1392
WIRE 1552 1424 1552 1408
SYMBOL polcap 1536 1344 R0
SYMATTR InstName C1
SYMATTR Value 220
SYMATTR SpiceLine Rser=0.05
SYMBOL ind 1280 1088 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMBOL schottky 1456 1088 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5818
SYMBOL res 1616 1072 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL PowerProducts\\LT1501-3.3 1184 1264 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 896 1120 R0
SYMATTR InstName V1
SYMATTR Value 2.5
FLAG 1184 1408 0
FLAG 896 1232 0
FLAG 1632 1184 0
FLAG 1552 1424 0
FLAG 1632 1072 OUT
FLAG 896 1120 IN
TEXT 1616 1456 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\65cca94cd735_2020_current_sense_sin_drive_osc_v07.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU7 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1711.asy)
XU7 ESD1 N001 COM 0 0 OUT N001 0 LT1711 ;pnba In+)In-)V+)V-)GND)OUT+)OUT-)LATCH
R47 ESD1 N001 12
L1 ANT ESD1 1.5mH Rser=32 Rpar=20Meg
C10 COM ESD1 0.5pF
D1 0 ESD1 D
C_hand ANT 0 0.0001pF
D2 ESD1 COM D
R_loss ANT 0 2400K
C7 ESD1 0 0.5pF
C_ant ANT 0 8pF
V1 COM 0 3.3V
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 1.2m 0.2m 0.00001m
.IC V(ANT)=1u
.lib LT1711.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3920 3748
WIRE -592 496 -592 448
WIRE -416 496 -592 496
WIRE -240 496 -416 496
WIRE -128 496 -240 496
WIRE 16 496 16 432
WIRE 16 496 -48 496
WIRE 96 496 16 496
WIRE 128 496 96 496
WIRE 240 496 208 496
WIRE 416 496 240 496
WIRE -592 544 -592 496
WIRE -416 544 -416 496
WIRE -240 560 -240 496
WIRE 320 624 320 576
WIRE 240 656 240 496
WIRE 288 656 240 656
WIRE 480 656 368 656
WIRE 96 688 96 496
WIRE 288 688 96 688
WIRE 416 688 416 496
WIRE 416 688 368 688
WIRE -592 704 -592 608
WIRE -416 704 -416 608
WIRE -240 704 -240 640
WIRE 304 752 304 720
WIRE 320 752 320 720
WIRE 320 752 304 752
WIRE 336 752 336 720
WIRE 336 752 320 752
WIRE 320 800 320 752
WIRE -240 832 -240 784
WIRE -240 832 -352 832
WIRE -352 864 -352 832
WIRE -240 864 -240 832
WIRE -544 944 -544 912
WIRE -352 976 -352 928
WIRE -240 976 -240 928
WIRE -240 976 -352 976
WIRE -176 976 -240 976
WIRE -352 1024 -352 976
WIRE -240 1024 -240 976
WIRE -544 1056 -544 1024
WIRE -352 1136 -352 1088
WIRE -240 1136 -240 1088
WIRE -240 1136 -352 1136
WIRE -240 1184 -240 1136
SYMBOL Comparators\\LT1711 320 672 R0
SYMATTR InstName U7
SYMBOL diode -224 1088 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL cap -608 544 R0
SYMATTR InstName C_hand
SYMATTR Value 0.0001pF
SYMBOL res -256 544 R0
SYMATTR InstName R_loss
SYMATTR Value 2400K
SYMBOL diode -224 928 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMBOL cap -432 544 R0
SYMATTR InstName C_ant
SYMATTR Value 8pF
SYMBOL cap -368 1024 R0
SYMATTR InstName C7
SYMATTR Value 0.5pF
SYMBOL cap -368 864 R0
SYMATTR InstName C10
SYMATTR Value 0.5pF
SYMBOL res 112 512 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R47
SYMATTR Value 12
SYMBOL ind -144 512 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.5mH
SYMATTR SpiceLine Rser=32 Rpar=20Meg
SYMBOL voltage -544 928 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3V
FLAG -544 1056 0
FLAG -544 912 COM
FLAG -240 1184 0
FLAG -240 784 COM
FLAG -176 976 ESD1
FLAG -592 448 ANT
FLAG -592 704 0
FLAG -416 704 0
FLAG -240 704 0
FLAG 16 432 ESD1
FLAG 320 800 0
FLAG 320 576 COM
FLAG 480 656 OUT
TEXT -600 240 Left 2 !.tran 0 1.2m 0.2m 0.00001m
TEXT -600 344 Left 2 !.IC V(ANT)=1u