Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\bfa8710f6fc7_IRFBG30_test.asc
* Generated by LTspice 26.0.1 for Windows.
* Source: http://www.duncanamps.com/spice/mosfets/nemos3t.mod
*IRFBG30 MCE 4-9-96
*1000V 3.1A 5 ohm HEXFET pkg:TO-220 2,1,3
* This Mosfet model requires a 4pin-symbol,\nbecause of the 4pins defined in the subcircuit.\n.SUBCKT XIRFBG30 10 20 40 40\n \n1. Add a symbol "nmos4" to your schematic. \nIt's now named a component or instance.\n2. Ctrl-RightMouseClick on the component \n3. Change Prefix:MN to Prefix:X\n4. OK\n5. Change NMOS to XIRFBG30
* Plot drain current Ix(M1:D)
* * If you have a model file nemos3t.mod from \n* http://www.duncanamps.com/spice/mosfets/nemos3t.mod\n \n.include nemos3t.mod
* symbol nmos4
R1 13 0 1
EGD 12 0 2 1 1
DDG 15 14 DCGD
M1 1 2 3 3 DMOS L=1U W=1U
CGS 2 3 930P
VFB 14 0 0
D2 15 0 DLIM
R2 12 15 1
RD 10 1 2.37
LS 30 40 7.5N
FFB 2 1 VFB 1
XM1 N001 N002 0 0 XIRFBG30 ;pnba D)G)S)B
V1 N002 0 2
D1 12 13 DLIM
CGD 13 14 642P
DSD 3 10 DSUB
V2 N001 0 100
RG 20 2 48.4
RS 30 3 .126
.SUBCKT XIRFBG30 10 20 40 40
.MODEL DMOS NMOS (LEVEL=1 LAMBDA=2M VTO=3 KP=1.62)
.MODEL DCGD D (CJO=642P VJ=.6 M=.68)
.MODEL DSUB D (IS=12.8N N=1.5 RS=.338 BV=1K CJO=387P VJ=.8 M=.42 TT=410N)
.MODEL DLIM D (IS=100U)
.ENDS XIRFBG30
.dc V2 0 100 1 V1 0 6 2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1624 724
WIRE 80 144 80 112
WIRE 80 256 80 224
WIRE 80 400 80 368
WIRE 80 512 80 480
WIRE 224 368 80 368
WIRE 272 112 80 112
WIRE 272 288 272 112
WIRE 272 512 272 384
WIRE 288 336 272 336
WIRE 288 384 272 384
WIRE 288 384 288 336
SYMBOL nmos4 224 288 R0
WINDOW 3 75 72 Left 0
SYMATTR InstName M1
SYMATTR Value XIRFBG30
SYMATTR Prefix X
SYMBOL voltage 80 384 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL voltage 80 128 R0
SYMATTR InstName V2
SYMATTR Value 100
FLAG 272 512 0
FLAG 80 256 0
FLAG 80 512 0
TEXT 560 -64 Left 0 !* Source: http://www.duncanamps.com/spice/mosfets/nemos3t.mod\n \n*IRFBG30 MCE 4-9-96\n*1000V 3.1A 5 ohm HEXFET pkg:TO-220 2,1,3\n.SUBCKT XIRFBG30  10 20 40 40\nM1   1  2  3  3  DMOS L=1U W=1U\nRD  10  1  2.37\nRS  30  3  .126\nRG  20  2  48.4\nCGS  2  3  930P\nEGD 12  0  2  1  1\nVFB 14  0  0\nFFB  2  1  VFB  1\nCGD 13 14  642P\nR1  13  0  1\nD1  12 13  DLIM\nDDG 15 14  DCGD\nR2  12 15  1\nD2  15  0  DLIM\nDSD  3 10  DSUB\nLS  30 40  7.5N\n.MODEL DMOS NMOS (LEVEL=1 LAMBDA=2M VTO=3 KP=1.62)\n.MODEL DCGD D (CJO=642P VJ=.6 M=.68)\n.MODEL DSUB D (IS=12.8N N=1.5 RS=.338 BV=1K CJO=387P VJ=.8 M=.42 TT=410N)\n.MODEL DLIM D (IS=100U)\n.ENDS XIRFBG30
TEXT 792 -352 Left 0 ;This Mosfet model requires a 4pin-symbol,\nbecause of the 4pins defined in the subcircuit.\n.SUBCKT XIRFBG30  10 20 40 40\n \n1. Add a symbol "nmos4" to your schematic. \nIt's now named a component or instance.\n2. Ctrl-RightMouseClick on the component \n3. Change Prefix:MN to Prefix:X\n4. OK\n5. Change NMOS to XIRFBG30
TEXT 88 -72 Left 0 !.dc V2 0 100 1 V1 0 6 2
TEXT 88 -32 Left 0 ;Plot drain current Ix(M1:D)
TEXT 88 -352 Left 0 ;* If you have a model file nemos3t.mod from \n* http://www.duncanamps.com/spice/mosfets/nemos3t.mod\n \n.include nemos3t.mod
TEXT 288 264 Left 0 ;symbol nmos4
* Z:\home\khalils\Downloads\files\data\raw_asc\1bafc8b9f6a7_10MhzDiplexer.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N005 0 50R
L2 N003 N002 8200n
R2 N003 0 50R
R4 N004 N001 50R
R5 N003 N004 50R
C1 N002 N001 27p
C4 0 N004 2700p
V1 N001 N005 AC 1.
C3 N002 N001 3.9p
L1 N004 0 82n
C2 0 N004 390p
.ac oct 30 900000 110000000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -144 -224 -208 -224
WIRE -48 -224 -80 -224
WIRE -352 -144 -656 -144
WIRE -208 -144 -208 -224
WIRE -208 -144 -352 -144
WIRE -144 -144 -208 -144
WIRE -48 -144 -48 -224
WIRE -48 -144 -80 -144
WIRE -16 -144 -48 -144
WIRE 208 -144 64 -144
WIRE 592 -144 208 -144
WIRE -656 -64 -656 -144
WIRE 592 -16 592 -144
WIRE -352 0 -352 -144
WIRE -288 0 -352 0
WIRE -144 0 -208 0
WIRE -48 0 -144 0
WIRE 16 0 -48 0
WIRE 64 0 16 0
WIRE 208 0 208 -144
WIRE 208 0 144 0
WIRE -144 16 -144 0
WIRE -48 16 -48 0
WIRE 16 16 16 0
WIRE -656 64 -656 16
WIRE -656 192 -656 144
WIRE -624 192 -656 192
WIRE -144 192 -144 80
WIRE -144 192 -624 192
WIRE -48 192 -48 80
WIRE -48 192 -144 192
WIRE 16 192 16 96
WIRE 16 192 -48 192
WIRE 592 192 592 64
WIRE 592 192 16 192
WIRE -624 224 -624 192
SYMBOL cap -32 80 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 390p
SYMBOL ind 0 0 R0
SYMATTR InstName L1
SYMATTR Value 82n
SYMBOL cap -128 80 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C4
SYMATTR Value 2700p
SYMBOL res 576 -32 R0
SYMATTR InstName R2
SYMATTR Value 50R
SYMBOL cap -80 -240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 3.9p
SYMBOL res 160 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 50R
SYMBOL cap -80 -160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 27p
SYMBOL res -192 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 50R
SYMBOL ind 80 -160 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L2
SYMATTR Value 8200n
SYMBOL res -672 48 R0
SYMATTR InstName R3
SYMATTR Value 50R
SYMBOL voltage -656 -80 R0
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1.
FLAG -624 224 0
TEXT -690 248 Left 2 !.ac oct 30 900000 110000000
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1936.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1936.asy)
R3 IN N002 100K
C3 N002 0 .1
C1 OUT 0 22
V1 IN 0 10
D2 0 N003 MBRS340
R1 OUT N005 17.4K
Rload OUT 0 2.75
L1 N003 OUT 10
C2 N001 N003 .22
D1 OUT N001 1N4148
XU1 N001 IN N003 0 N002 N005 N004 N004 LT1936 ;pnba Boost)Vin)SW)GND)_SHDN)FB)Vc)Comp
R2 N005 0 10K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
.lib LT1936.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 64 -144 64
WIRE 112 64 -48 64
WIRE 336 64 240 64
WIRE 400 64 336 64
WIRE 512 64 464 64
WIRE -144 80 -144 64
WIRE -48 80 -48 64
WIRE 336 96 336 64
WIRE 112 112 112 64
WIRE 240 112 240 64
WIRE -144 176 -144 160
WIRE -48 176 -48 160
WIRE 48 176 -48 176
WIRE 336 176 336 160
WIRE 336 176 304 176
WIRE 400 176 336 176
WIRE 512 176 512 64
WIRE 512 176 480 176
WIRE 592 176 512 176
WIRE -48 192 -48 176
WIRE 336 192 336 176
WIRE 592 192 592 176
WIRE -48 272 -48 256
WIRE 336 272 336 256
WIRE 592 288 592 272
WIRE 48 304 32 304
WIRE 352 304 304 304
WIRE 416 304 352 304
WIRE 512 304 512 176
WIRE 512 304 496 304
WIRE 352 320 352 304
WIRE 512 320 512 304
WIRE 32 400 32 304
WIRE 112 400 112 384
WIRE 112 400 32 400
WIRE 512 400 512 384
WIRE 240 416 240 384
WIRE 352 416 352 400
SYMBOL cap 320 96 R0
SYMATTR InstName C2
SYMATTR Value .22
SYMBOL res -64 64 R0
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL PowerProducts\\LT1936 176 240 R0
SYMATTR InstName U1
SYMBOL schottky 320 256 M180
WINDOW 0 41 57 Left 2
WINDOW 3 32 4 Left 2
SYMATTR InstName D2
SYMATTR Value MBRS340
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 576 176 R0
SYMATTR InstName Rload
SYMATTR Value 2.75
SYMBOL ind 384 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL res 512 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 17.4K
SYMBOL cap -64 192 R0
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL diode 464 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage -144 64 R0
WINDOW 0 26 19 Left 2
WINDOW 3 24 99 Left 2
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL cap 496 320 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 336 304 R0
SYMATTR InstName R2
SYMATTR Value 10K
FLAG -144 176 0
FLAG 240 416 0
FLAG 512 400 0
FLAG 352 416 0
FLAG 592 288 0
FLAG -48 272 0
FLAG 336 272 0
FLAG 592 176 OUT
FLAG -144 64 IN
TEXT 368 456 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\a1a8bff9a2de_FET06op.asc
* Generated by LTspice 26.0.1 for Windows.
Rd N001 N002 {Rd}
Rg g N003 {Rg}
M1 N002 g 0 0 MOSFET
Vdd N001 0 {Vdd}
Vgg N003 0 {Vgg}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.op
.model MOSFET nmos(Kp=1m Vto=4)
.param Vdd=50 Vgg=6 Rd=330 Rg=1Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1608 1076
WIRE 384 -128 192 -128
WIRE 192 -80 192 -128
WIRE 192 32 192 0
WIRE 384 48 384 -128
WIRE 16 112 -32 112
WIRE 112 112 96 112
WIRE 144 112 112 112
WIRE -32 144 -32 112
WIRE 192 176 192 128
WIRE 384 176 384 128
WIRE 384 176 192 176
WIRE 192 208 192 176
WIRE -32 272 -32 224
SYMBOL voltage 384 32 R0
WINDOW 0 55 34 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdd
SYMATTR Value {Vdd}
SYMBOL res 176 -96 R0
SYMATTR InstName Rd
SYMATTR Value {Rd}
SYMBOL res 112 96 R90
WINDOW 0 -10 57 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rg
SYMATTR Value {Rg}
SYMBOL voltage -32 128 R0
WINDOW 0 -69 6 Left 2
SYMATTR InstName Vgg
SYMATTR Value {Vgg}
SYMBOL nmos 144 32 R0
SYMATTR InstName M1
SYMATTR Value MOSFET
FLAG 192 208 0
FLAG -32 272 0
FLAG 112 112 g
TEXT 240 208 Left 2 !.op
TEXT 72 328 Left 2 !.model MOSFET nmos(Kp=1m Vto=4)
TEXT 80 376 Left 2 !.param Vdd=50 Vgg=6 Rd=330 Rg=1Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\04a7602332df_pwm-tuning.asc
* Generated by LTspice 26.0.1 for Windows.
XM1 N001 N002 N006 BS250 ;pnba D)G)S
Q1 N002 N005 0 0 2N2222
R1 N002 N006 1k
V1 N006 0 9V
V2 N004 0 PULSE(0 5 0 1n 1n {DutyCycle} 100u)
R2 N003 N001 10k
C1 out 0 470nF
R4 N005 N004 10k
XM2 N001 N002 0 2N7000 ;pnba D)G)S
C2 N003 0 470nF
R3 out N003 10k
C3 0 N006 100n
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0.4
.inc 2N7000.onsemi.lib
.inc BS250.philips.lib
.meas TRAN rippel PP V(out) FROM 180ms TO 230ms
.meas TRAN medel AVG V(out) FROM 180ms TO 230ms
.param ideal=4.5
.meas TRAN diff PARAM medel-ideal
.param DutyCycle=50u
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1088 680
WIRE 288 -128 192 -128
WIRE 144 -48 0 -48
WIRE 192 -32 192 -48
WIRE 192 -16 192 -32
WIRE 288 80 288 -128
WIRE 288 80 176 80
WIRE 304 80 288 80
WIRE 480 80 384 80
WIRE 544 80 480 80
WIRE 672 80 672 -32
WIRE 672 80 624 80
WIRE 480 96 480 80
WIRE 672 112 672 80
WIRE 0 160 0 -48
WIRE 0 160 -192 160
WIRE 128 160 0 160
WIRE 480 192 480 160
WIRE 672 192 672 176
WIRE -368 208 -416 208
WIRE -256 208 -288 208
WIRE 176 208 176 176
WIRE 208 208 176 208
WIRE 304 208 272 208
WIRE 304 240 304 208
WIRE -192 304 -192 256
WIRE 0 304 0 240
WIRE 80 304 0 304
WIRE 176 304 176 208
WIRE 176 304 80 304
WIRE 80 400 80 384
FLAG -416 288 0
FLAG 672 192 0
FLAG -192 304 0
FLAG 80 400 0
FLAG 192 -16 0
FLAG 480 192 0
FLAG 672 -32 out
IOPIN 672 -32 Out
FLAG 304 240 0
SYMBOL pmos 128 80 R0
SYMATTR InstName M1
SYMATTR Value BS250
SYMATTR Prefix X
SYMBOL npn -256 160 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL res -16 144 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 80 288 R0
WINDOW 0 44 55 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9V
SYMBOL voltage -416 192 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1n 1n {DutyCycle} 100u)
SYMBOL res 400 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL cap 656 112 R0
SYMATTR InstName C1
SYMATTR Value 470nF
SYMBOL res -272 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL nmos 144 -128 R0
SYMATTR InstName M2
SYMATTR Value 2N7000
SYMATTR Prefix X
SYMBOL cap 464 96 R0
SYMATTR InstName C2
SYMATTR Value 470nF
SYMBOL res 640 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL cap 272 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 100n
TEXT -864 432 Left 2 !.tran 0.4
TEXT -512 -104 Left 2 !.inc 2N7000.onsemi.lib
TEXT -512 -64 Left 2 !.inc BS250.philips.lib
TEXT -464 -432 Left 2 !.meas TRAN rippel PP V(out) FROM 180ms TO 230ms\n.meas TRAN medel AVG V(out) FROM 180ms TO 230ms
TEXT -464 -376 Left 2 !.param ideal=4.5\n.meas TRAN diff PARAM medel-ideal
TEXT -464 -320 Left 2 !.param DutyCycle=50u
* Z:\home\khalils\Downloads\files\data\raw_asc\phaseshift2.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
Q1 OUT N004 0 0 2N3904
C3 0 N004 .1
C1 0 N002 .1
R4 N004 N003 {R}
V1 N001 0 10
R2 N002 OUT {R}
R1 N001 OUT 20K
C2 0 N003 .1
R3 N003 N002 {R}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 100m startup
.params R=10K
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2124 2568
WIRE 2032 2016 1856 2016
WIRE 1856 2032 1856 2016
WIRE 2032 2032 2032 2016
WIRE 2032 2128 2032 2112
WIRE 1856 2144 1856 2112
WIRE 1856 2144 1360 2144
WIRE 1920 2144 1856 2144
WIRE 1856 2176 1856 2144
WIRE 1360 2224 1360 2144
WIRE 1376 2224 1360 2224
WIRE 1472 2224 1456 2224
WIRE 1504 2224 1472 2224
WIRE 1616 2224 1584 2224
WIRE 1648 2224 1616 2224
WIRE 1760 2224 1728 2224
WIRE 1792 2224 1760 2224
WIRE 1472 2256 1472 2224
WIRE 1616 2256 1616 2224
WIRE 1760 2256 1760 2224
WIRE 1856 2288 1856 2272
WIRE 1472 2336 1472 2320
WIRE 1616 2336 1616 2320
WIRE 1760 2336 1760 2320
SYMBOL res 1472 2208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R}
SYMBOL cap 1456 2320 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL res 1744 2208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value {R}
SYMBOL res 1840 2016 R0
SYMATTR InstName R1
SYMATTR Value 20K
SYMBOL npn 1792 2176 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage 2032 2016 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL cap 1744 2320 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL cap 1600 2320 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL res 1600 2208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value {R}
FLAG 1856 2288 0
FLAG 1760 2336 0
FLAG 1616 2336 0
FLAG 1472 2336 0
FLAG 2032 2128 0
FLAG 1920 2144 OUT
TEXT 1760 2408 Left 2 !.tran 100m startup
TEXT 1296 2392 Left 2 !.params R=10K
TEXT 1624 2456 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\1e6ebb6df8bb_diode-va-reverse.asc
* Generated by LTspice 26.0.1 for Windows.
D1 b a 1SR154-400
R1 b 0 1k
V1 a 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 20V
.step temp list 0 25 50 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 208 -64 208
WIRE 160 208 80 208
WIRE -64 240 -64 208
WIRE 160 240 160 208
WIRE -64 352 -64 320
WIRE 48 352 -64 352
WIRE 160 352 160 320
WIRE 160 352 48 352
WIRE 48 368 48 352
SYMBOL voltage -64 224 R0
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL diode 80 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1SR154-400
SYMBOL Misc\\EuropeanResistor 144 224 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG -64 208 a
FLAG 160 208 b
FLAG 48 368 0
TEXT -64 400 Left 2 !.dc V1 0 20V
TEXT -64 424 Left 2 !.step temp list 0 25 50 100
* Z:\home\khalils\Downloads\files\data\raw_asc\1705fc5c693a_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N006 0 0V
V1 N001 0 5V
V3 N004 0 0V
R1 N001 N003 2m2
Q1 N003 N006 0 0 NPN
R2 N001 N005 22
R4 N002 0 68
M2 N005 N004 0 0 NMOS
M1 N002 N003 N001 N001 PMOS
R3 N006 0 10k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 64 -240 64
WIRE 80 64 -64 64
WIRE 208 64 80 64
WIRE 464 64 304 64
WIRE 80 80 80 64
WIRE -64 144 -64 64
WIRE 80 176 80 160
WIRE 224 176 224 112
WIRE 224 176 80 176
WIRE -240 256 -240 64
WIRE 768 256 32 256
WIRE -64 288 -64 224
WIRE 224 288 224 176
WIRE 352 336 288 336
WIRE 608 336 352 336
WIRE 32 368 32 256
WIRE 32 368 -16 368
WIRE 352 400 352 336
WIRE 464 400 464 64
WIRE 608 416 608 336
WIRE 768 416 768 256
WIRE -240 560 -240 336
WIRE -64 560 -64 384
WIRE -64 560 -240 560
WIRE 224 560 224 384
WIRE 224 560 -64 560
WIRE 352 560 352 480
WIRE 352 560 224 560
WIRE 464 560 464 480
WIRE 464 560 352 560
WIRE 608 560 608 496
WIRE 608 560 464 560
WIRE 768 560 768 496
WIRE 768 560 608 560
WIRE -64 576 -64 560
SYMBOL res 64 64 R0
SYMATTR InstName R1
SYMATTR Value 2m2
SYMBOL voltage -240 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5V
SYMBOL npn 288 288 M0
SYMATTR InstName Q1
SYMBOL nmos -16 288 M0
SYMATTR InstName M2
SYMBOL pmos 304 112 M270
SYMATTR InstName M1
SYMBOL res 336 384 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL voltage 608 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0V
SYMBOL voltage 768 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 0V
SYMBOL res -80 128 R0
SYMATTR InstName R2
SYMATTR Value 22
SYMBOL res 448 384 R0
SYMATTR InstName R4
SYMATTR Value 68
FLAG -64 576 0
* Z:\home\khalils\Downloads\files\data\raw_asc\2e06da00a839_Overvoltage.asc
* Generated by LTspice 26.0.1 for Windows.
R2 VOUT 0 1Meg
R1 VOUT N001 1
D1 0 VOUT BZX84B10VL
V1 N001 0 PWL(0 5 0.0002 5 0.00025 25 0.0003 5)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 0.005 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1128 680
WIRE 544 64 48 64
WIRE 704 64 624 64
WIRE 880 64 704 64
WIRE 1008 64 880 64
WIRE 1104 64 1008 64
WIRE 48 128 48 64
WIRE 880 128 880 64
WIRE 1008 144 1008 64
WIRE 1104 144 1104 64
WIRE 48 256 48 208
WIRE 880 256 880 208
WIRE 880 256 48 256
WIRE 1008 256 1008 208
WIRE 1104 256 1104 208
WIRE 48 272 48 256
SYMBOL voltage 48 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 5 0.0002 5 0.00025 25 0.0003 5)
SYMBOL res 640 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL res 864 112 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL zener 1120 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BZX84B10VL
SYMATTR Description Diode
SYMATTR Type diode
FLAG 48 272 0
FLAG 704 64 VOUT
FLAG 1008 256 0
FLAG 1104 256 0
TEXT 16 296 Left 2 !.tran 0 0.005 0
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX74810.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 25
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10k
R2 OUT N001 10k
V2 -V 0 -25
Rload OUT 0 10k
XU1 IN N001 +V -V OUT MAX74810 ;pnba In+)In-)V+)V-)OUT
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX74810.asy)
.lib MAX74810.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1152 144 -1168
WIRE 272 -1152 272 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 272 -1056 272 -1072
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 272 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 272 -1056 0
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 25
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 272 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -25
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10k
SYMBOL MAX74810 576 -1168 R0
SYMATTR InstName U1
TEXT 720 -944 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\AD4058.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N002 0 PWL(30n 0 40n 1.8)
V3 CNV 0 PULSE(0 1.8 1u 10n 10n 20n 2u)
V1 N001 0 2.5
VinP1 input+ 0 SINE(1.25 1.25 2k)
Cfilt1 vIN+ 0 1n
Rfilt1 input+ vIN+ 301
Rfilt2 vIN- input- 301
Cfilt2 0 vIN- 1n
VinN1 input- 0 SINE(1.25 1.25 2k 0 0 180)
XU1 vIN+ vIN- 0 N001 CNV N002 VOrti VOrto AD4058 ;pnba IN+)IN-)GND)REF)CNV)_RST)VOrti)VOrto
.tran 0.5m
* Notes:\n \nVOrti: Analog output \nVOrto: "Digital" representation of the input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\AD4058.asy)
.lib AD4058.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1072 680
WIRE 256 -80 256 -112
WIRE -384 48 -560 48
WIRE -288 48 -384 48
WIRE -176 48 -208 48
WIRE -48 48 -176 48
WIRE 256 48 256 0
WIRE -560 80 -560 48
WIRE -176 96 -176 48
WIRE 448 96 384 96
WIRE 640 96 448 96
WIRE 640 128 640 96
WIRE -48 144 -48 48
WIRE 0 144 -48 144
WIRE 64 144 0 144
WIRE 432 144 384 144
WIRE -560 192 -560 160
WIRE -560 192 -608 192
WIRE 432 192 384 192
WIRE -608 208 -608 192
WIRE -560 224 -560 192
WIRE -176 224 -176 160
WIRE -128 224 -176 224
WIRE -128 240 -128 224
WIRE 0 240 -48 240
WIRE 64 240 0 240
WIRE 640 240 640 208
WIRE -176 288 -176 224
WIRE 448 288 384 288
WIRE 448 336 448 288
WIRE 256 368 256 336
WIRE -560 384 -560 304
WIRE -384 384 -560 384
WIRE -288 384 -384 384
WIRE -176 384 -176 352
WIRE -176 384 -208 384
WIRE -48 384 -48 240
WIRE -48 384 -176 384
WIRE 448 448 448 416
FLAG 256 368 0
FLAG 448 448 0
FLAG 640 240 0
FLAG 256 -112 0
FLAG 0 144 vIN+
FLAG 0 240 vIN-
FLAG 432 192 VOrti
FLAG -384 48 input+
FLAG -384 384 input-
FLAG -128 240 0
FLAG -608 208 0
FLAG 432 144 VOrto
FLAG 448 96 CNV
SYMBOL voltage 448 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 16 105 Left 2
SYMATTR Value PWL(30n 0 40n 1.8)
SYMATTR InstName V2
SYMBOL voltage 640 112 R0
WINDOW 0 28 -5 Top 2
WINDOW 3 184 118 Bottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 1.8 1u 10n 10n 20n 2u)
SYMBOL voltage 256 16 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage -560 64 M0
WINDOW 0 -29 15 Right 2
WINDOW 3 -20 90 Right 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VinP1
SYMATTR Value SINE(1.25 1.25 2k)
SYMBOL cap -192 96 R0
SYMATTR InstName Cfilt1
SYMATTR Value 1n
SYMBOL res -304 32 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rfilt1
SYMATTR Value 301
SYMBOL res -192 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rfilt2
SYMATTR Value 301
SYMBOL cap -192 288 R0
SYMATTR InstName Cfilt2
SYMATTR Value 1n
SYMBOL voltage -560 320 M180
WINDOW 0 84 95 Right 2
WINDOW 3 291 13 Right 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VinN1
SYMATTR Value SINE(1.25 1.25 2k 0 0 180)
SYMBOL AD4058 288 192 R0
SYMATTR InstName U1
TEXT 144 456 Left 2 !.tran 0.5m
TEXT -560 -128 Left 2 ;Notes:\n \nVOrti: Analog output \nVOrto: "Digital" representation of the input