Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0fc3fe4d1e6b_Fig13_30.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Vout Vin
M2 VDD Vin N001 VDD P_50n l=50n w=500n
VDD VDD 0 1
M4 VDD N001 Vout VDD P_50n l=50n w=500n
M3 Vout N001 0 0 N_50n l=50n w=5u
Cload Vout 0 50f
V1 Vin 0 PULSE(0 1 500p 1p 1p 1n 6n)
M1 N001 Vin 0 0 N_50n l=50n w=500n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 2n 0 1p
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3172 680
WIRE 192 -368 192 -384
WIRE 192 -352 192 -368
WIRE 192 -240 192 -272
WIRE 192 -160 192 -176
WIRE 192 -32 192 -80
WIRE 272 -176 192 -176
WIRE 368 -176 272 -176
WIRE 368 -176 368 -224
WIRE 368 -96 368 -176
WIRE 400 -224 368 -224
WIRE 400 -96 368 -96
WIRE 448 -304 448 -352
WIRE 448 -176 448 -208
WIRE 448 -32 448 -80
WIRE 624 -176 448 -176
WIRE 624 -176 624 -224
WIRE 624 -96 624 -176
WIRE 656 -224 624 -224
WIRE 656 -96 624 -96
WIRE 704 -304 704 -352
WIRE 704 -192 704 -208
WIRE 704 -176 704 -192
WIRE 704 -32 704 -80
WIRE 896 -192 704 -192
WIRE 960 -192 896 -192
WIRE 960 -48 960 -128
SYMBOL voltage 192 -368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL nmos4 400 -176 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL cap 944 -192 R0
SYMATTR InstName Cload
SYMATTR Value 50f
SYMBOL voltage 192 -176 R0
WINDOW 3 -102 180 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 1 500p 1p 1p 1n 6n)
SYMATTR InstName V1
SYMBOL pmos4 400 -304 R0
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M2
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 656 -176 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M3
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=5u
SYMBOL pmos4 656 -304 R0
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M4
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=500n
FLAG 448 -128 0
FLAG 192 -240 0
FLAG 192 -368 VDD
FLAG 448 -256 VDD
FLAG 448 -32 0
FLAG 448 -352 VDD
FLAG 704 -128 0
FLAG 704 -256 VDD
FLAG 704 -32 0
FLAG 704 -352 VDD
FLAG 960 -48 0
FLAG 192 -32 0
FLAG 896 -192 Vout
FLAG 272 -176 Vin
TEXT 88 48 Left 0 !.tran 0 2n 0 1p
TEXT 88 88 Left 0 !.lib cmosedu_models.txt
TEXT 264 -392 Left 0 ;Plot Vout Vin
* Z:\home\khalils\Downloads\files\data\raw_asc\5ca0263121e0_quiz_q5.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 0 1n
V1 N001 0 PULSE(0 5 1u 1n 1n 19u 20u)
R1 N002 N001 1k
.tran 20u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 80 128 80
WIRE 608 80 432 80
WIRE 608 96 608 80
WIRE 128 192 128 160
WIRE 608 208 608 160
SYMBOL voltage 128 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 1u 1n 1n 19u 20u)
SYMBOL cap 592 96 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 448 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 128 192 0
FLAG 608 208 0
TEXT 88 232 Left 2 !.tran 20u
* Z:\home\khalils\Downloads\files\data\raw_asc\06dc1445f1cc_Prob_4a.asc
* Generated by LTspice 26.0.1 for Windows.
;.dc V1 0 1 1m
V2 Vds 0 1.8V
M1 Vds Vgs 0 0 nch_tt
V1 Vgs 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.dc V2 0 1.8 0.01 V1 0 1 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 928 680
WIRE 400 64 368 64
WIRE 368 80 368 64
WIRE 368 80 224 80
WIRE 224 96 224 80
WIRE 368 96 368 80
WIRE 48 176 16 176
WIRE 176 176 48 176
WIRE 48 192 48 176
WIRE 224 208 224 192
WIRE 368 208 368 176
WIRE 48 288 48 272
IOPIN 16 176 In
IOPIN 400 64 Out
SYMBOL nmos 176 96 R0
SYMATTR InstName M1
SYMATTR Value nch_tt
SYMBOL voltage 368 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.8V
SYMBOL voltage 48 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1
FLAG 48 288 0
FLAG 224 208 0
FLAG 368 208 0
FLAG 16 176 Vgs
FLAG 400 64 Vds
TEXT -144 56 Left 2 !.include TSMC180.lib
TEXT -146 112 Left 2 !.dc V2 0 1.8 0.01 V1 0 1 0.2
TEXT -144 88 Left 2 !;.dc  V1 0 1 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP124-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP124-3.3.asy)
V1 IN 0 5.5
XU1 OUT MP_01 OUT 0 IN MP_02 MP_03 IN ADP124 K=35714.3 ;pnba Vout))Sense)GND)En)))Vin
C2 OUT 0 1
C1 IN 0 1
Rload OUT 0 100
.tran 10m startup
.lib ADP124.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 384 96 352 96
WIRE 432 96 384 96
WIRE 512 96 432 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 432 112 432 96
WIRE 512 112 512 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 384 208 384 96
WIRE 384 208 352 208
WIRE 432 208 432 176
WIRE 512 208 512 192
WIRE 256 272 256 256
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL ADP124-3.3 256 208 R0
SYMATTR InstName U1
SYMBOL cap 416 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
FLAG 0 208 0
FLAG 256 272 0
FLAG 432 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\459423b66e8c_1b.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 0
D1 vout N001 D
R1 vout 0 1000
V1 N002 0 -1
D2 vout N002 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -80 -32 -256 -32
WIRE 0 -32 -16 -32
WIRE 0 64 0 -32
WIRE 48 64 0 64
WIRE 128 64 48 64
WIRE -80 96 -128 96
WIRE 0 96 0 64
WIRE 0 96 -16 96
WIRE -256 160 -256 -32
WIRE -128 160 -128 96
WIRE 48 160 48 64
WIRE -256 272 -256 240
WIRE -128 272 -128 240
WIRE 48 272 48 240
IOPIN 128 64 Out
SYMBOL res 32 144 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL voltage -128 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -1
SYMBOL diode -16 -48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL diode -16 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMBOL voltage -256 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
FLAG 48 272 0
FLAG -128 272 0
FLAG -256 272 0
FLAG 128 64 vout
TEXT -290 296 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\a68cc9acac32_Draft1P.asc
* Generated by LTspice 26.0.1 for Windows.
VUDS N001 N002 0.9
V1 N001 0 1.8
VGS N001 VG 1
M1 N001 VG N002 N001 pch l=lset w=wset
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib cmos018.txt
.STEP param lset list 0.18u, 0.3u, 0.5u, 0.8u, 1u, 2u, 3u, 5u, 10u
.param wset = 5*lset
.dc VGS 0.1 0.6 1m
.MEAS DC UTH FIND V(VG) WHEN Id(M1)=500n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1356 680
WIRE 224 176 32 176
WIRE 544 176 224 176
WIRE 752 176 544 176
WIRE 32 192 32 176
WIRE 224 224 224 176
WIRE 240 224 224 224
WIRE 544 224 544 176
WIRE 752 240 752 176
WIRE 240 272 240 224
WIRE 240 272 224 272
WIRE 32 304 32 272
WIRE 80 304 32 304
WIRE 176 304 80 304
WIRE 224 416 224 320
WIRE 544 416 544 304
WIRE 544 416 224 416
SYMBOL voltage 752 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL voltage 544 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName UDS
SYMATTR Value 0.9
SYMBOL pmos4 176 224 R0
WINDOW 123 75 75 Left 2
WINDOW 0 75 14 Left 2
WINDOW 3 75 45 Left 2
SYMATTR Value2 l=lset w=wset
SYMATTR InstName M1
SYMATTR Value pch
SYMBOL voltage 32 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 1
FLAG 80 304 VG
FLAG 752 320 0
TEXT -40 -64 Left 2 !.lib cmos018.txt
TEXT -40 -16 Left 2 !.STEP param lset list 0.18u, 0.3u, 0.5u, 0.8u, 1u, 2u, 3u, 5u, 10u
TEXT -40 8 Left 2 !.param wset = 5*lset
TEXT -40 64 Left 2 !.dc VGS 0.1 0.6 1m
TEXT -40 88 Left 2 !.MEAS DC UTH FIND V(VG) WHEN Id(M1)=500n
* Z:\home\khalils\Downloads\files\data\raw_asc\0efe78f44b1e_AmpSimp.asc
* Generated by LTspice 26.0.1 for Windows.
R nAmp 0 {REq}
C nAmp 0 {CEq}
EOut N001 0 Value={Limit(V(nAmp),{VHigh},{VLow})}
R1 nOut N001 {RsOut}
GAmp 0 nAmp nP nN {Trans}
Rin nP nN 1G
.Param Gain=30000 Pole=30
.Param VHigh=4V VLow=-4V
.Param Trans=100u RsOut=10
.Param REq=Gain/Trans CEq=1/(2*pi*REq*Pole)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 680
WIRE 0 64 -64 64
WIRE 96 64 0 64
WIRE 272 96 144 96
WIRE 416 96 272 96
WIRE 624 96 544 96
WIRE 768 96 704 96
WIRE 0 128 0 64
WIRE 144 128 144 96
WIRE 272 128 272 96
WIRE 544 128 544 96
WIRE 96 144 96 64
WIRE 416 144 416 96
WIRE 144 240 144 208
WIRE 272 240 272 208
WIRE 272 240 144 240
WIRE 416 240 416 208
WIRE 416 240 272 240
WIRE 544 240 544 208
WIRE 544 240 416 240
WIRE 0 272 0 208
WIRE 0 272 -64 272
WIRE 96 272 96 192
WIRE 96 272 0 272
WIRE 272 272 272 240
IOPIN -64 64 In
IOPIN -64 272 In
IOPIN 768 96 Out
SYMBOL res 256 112 R0
SYMATTR InstName R
SYMATTR Value {REq}
SYMBOL res -16 112 R0
SYMATTR InstName Rin
SYMATTR Value 1G
SYMBOL g 144 112 R0
SYMATTR InstName GAmp
SYMATTR Value {Trans}
SYMBOL res 720 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {RsOut}
SYMBOL Misc\\Epoly 544 112 R0
WINDOW 0 32 96 Left 2
WINDOW 3 -208 160 Left 2
SYMATTR InstName EOut
SYMATTR Value Value={Limit(V(nAmp),{VHigh},{VLow})}
SYMBOL cap 400 144 R0
SYMATTR InstName C
SYMATTR Value {CEq}
FLAG -64 64 nP
FLAG -64 272 nN
FLAG 272 272 0
FLAG 272 96 nAmp
FLAG 768 96 nOut
TEXT -32 -80 Left 2 !.Param Gain=30000 Pole=30\n.Param VHigh=4V VLow=-4V\n.Param Trans=100u RsOut=10\n.Param REq=Gain/Trans CEq=1/(2*pi*REq*Pole)
* Z:\home\khalils\Downloads\files\data\raw_asc\d72e4590c633_1227.asc
* Generated by LTspice 26.0.1 for Windows.
* 3.58MHz Oscillator
* 3.579545MHz
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1227.asy)
XU2 0 N004 +V -V N005 LT1227 ;pnba In+)In-)V+)V-)OUT
C3 N001 N003 75p
V2 -V 0 -15
Q1 +V N001 N002 0 2N3904
R1 N005 N004 1K
R3 N002 0 150K
C1 N001 N002 100p
V1 +V 0 15
R4 +V N001 100K
D1 +V N001 1N4148
C2 N002 0 68p
C4 N004 N003 2p Rser=45 Lser=1026u Cpar=10p
R2 OUT N005 51
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 250u startup
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -32 -48 -32 -64
WIRE -32 -48 -160 -48
WIRE 64 -48 -32 -48
WIRE -32 -32 -32 -48
WIRE 64 -16 64 -48
WIRE -160 32 -160 -48
WIRE -384 64 -384 48
WIRE -272 64 -272 48
WIRE -32 80 -32 48
WIRE -32 80 -96 80
WIRE 64 80 64 48
WIRE 64 80 -32 80
WIRE -32 96 -32 80
WIRE 64 96 64 80
WIRE -384 176 -384 144
WIRE -272 176 -272 144
WIRE -160 176 -160 128
WIRE -32 176 -32 160
WIRE -32 176 -160 176
WIRE 64 176 64 160
WIRE 128 176 64 176
WIRE 256 176 192 176
WIRE 272 176 256 176
WIRE 384 176 352 176
WIRE -160 192 -160 176
WIRE -32 192 -32 176
WIRE 320 272 320 256
WIRE -160 288 -160 272
WIRE -32 288 -32 256
WIRE 256 288 256 176
WIRE 288 288 256 288
WIRE 384 304 384 176
WIRE 384 304 352 304
WIRE 416 304 384 304
WIRE 528 304 496 304
WIRE 288 320 256 320
WIRE 320 352 320 336
SYMBOL diode 48 -16 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage -384 48 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL cap -48 96 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL cap 48 96 R0
SYMATTR InstName C3
SYMATTR Value 75p
SYMBOL voltage -272 48 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res -176 176 R0
SYMATTR InstName R3
SYMATTR Value 150K
SYMBOL npn -96 32 M0
WINDOW 0 45 -8 Right 0
WINDOW 3 53 109 Right 0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL cap -48 192 R0
SYMATTR InstName C2
SYMATTR Value 68p
SYMBOL opamps\\LT1227 320 240 R0
SYMATTR InstName U2
SYMBOL res 512 288 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 51
SYMBOL misc\\xtal 192 160 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 Invisible 0
SYMATTR InstName C4
SYMATTR Value 2p
SYMATTR SpiceLine Rser=45 Lser=1026u Cpar=10p
SYMBOL res -48 -48 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL res 368 160 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1K
FLAG -272 176 0
FLAG 320 256 +V
FLAG -272 48 +V
FLAG 320 352 -V
FLAG -384 176 0
FLAG -384 48 -V
FLAG -160 288 0
FLAG -32 288 0
FLAG 256 320 0
FLAG -32 -64 +V
FLAG 528 304 OUT
TEXT -18 346 Left 0 !.tran 250u startup
TEXT 160 -64 Bottom 0 ;3.58MHz Oscillator
TEXT 168 200 Top 0 ;3.579545MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\4cd4e21e6f09_E3c.asc
* Generated by LTspice 26.0.1 for Windows.
;dc VIN 0 3.3 0.01
VB N002 0 1.1
VIN N005 0 0.6 AC 1
M1 N004 N005 0 N006 NMOS l=0.18u w=18u
VDD N001 0 3.3
RD N001 Vout 8000
M2 Vout N002 N004 N003 NMOS l=0.36u w=18u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.ac dec 10 1 10Meg
.model NMOS NMOS (LEVEL=1 KP=150u VTO=0.5 LAMBDA=0 GAMMA=0 PHI=0.6)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 892 680
WIRE 96 -256 -48 -256
WIRE 96 -128 96 -176
WIRE 96 -96 96 -128
WIRE 48 -16 -48 -16
WIRE 96 -16 96 -48
WIRE 96 32 96 0
WIRE 48 112 -48 112
WIRE 96 112 96 80
IOPIN 96 -128 Out
SYMBOL nmos4 48 32 R0
SYMATTR InstName M1
SYMATTR Value2 l=0.18u w=18u
SYMBOL voltage -48 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value 1.1
SYMBOL voltage -48 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 3.3
SYMBOL nmos4 48 -96 R0
SYMATTR InstName M2
SYMATTR Value2 l=0.36u w=18u
SYMBOL voltage -48 96 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName VIN
SYMATTR Value 0.6
SYMBOL res 80 -272 R0
SYMATTR InstName RD
SYMATTR Value 8000
FLAG 96 128 0
FLAG -48 64 0
FLAG -48 192 0
FLAG -48 -176 0
FLAG 96 -128 Vout
TEXT -88 -384 Left 2 !;dc VIN 0 3.3 0.01
TEXT -88 -360 Left 2 !.ac dec 10 1 10Meg
TEXT -88 -336 Left 2 !.model NMOS NMOS (LEVEL=1 KP=150u VTO=0.5 LAMBDA=0 GAMMA=0 PHI=0.6)
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX20316.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX20316.asy)
C2 OUT 0 150
V3 N001 0 PULSE(0 1 10m 1m 1m 30m)
V1 IN 0 5
V4 N002 0 0
XU1 IN N005 0 N003 N002 OUT MAX20316 ;pnba IN)SETI)GND)_FLAG)_EN)OUT
S1 0 OUT N001 0 SHORT
R8 N005 0 681
R6 N004 N003 20K
V2 N004 0 5
.model SHORT SW(Ron=0.05 Roff=1K Vt=.5 Vh=-.4)
.tran 50m startup
.lib MAX20316.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1800 680
WIRE -16 -352 -224 -352
WIRE 400 -352 272 -352
WIRE 512 -352 400 -352
WIRE 672 -352 560 -352
WIRE -224 -336 -224 -352
WIRE 400 -336 400 -352
WIRE 512 -336 512 -352
WIRE 672 -336 672 -352
WIRE 560 -320 560 -352
WIRE -224 -240 -224 -256
WIRE 400 -240 400 -272
WIRE 512 -240 512 -256
WIRE 672 -240 672 -256
WIRE -16 -160 -224 -160
WIRE 384 -160 272 -160
WIRE 576 -160 464 -160
WIRE -224 -144 -224 -160
WIRE 576 -128 576 -160
WIRE -16 -64 -128 -64
WIRE 336 -64 272 -64
WIRE -224 -48 -224 -64
WIRE -128 -48 -128 -64
WIRE 336 -32 336 -64
WIRE 576 -32 576 -48
WIRE -128 80 -128 32
SYMBOL cap 384 -336 R0
SYMATTR InstName C2
SYMATTR Value 150
SYMBOL voltage 672 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 10m 1m 1m 30m)
SYMBOL res -144 -64 R0
SYMATTR InstName R8
SYMATTR Value 681
SYMBOL voltage -224 -160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 0
SYMBOL voltage -224 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 576 -144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL sw 512 -240 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL MAX20316 128 -208 R0
SYMATTR InstName U1
SYMBOL res 480 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 20K
FLAG -224 -240 0
FLAG 400 -240 0
FLAG 512 -352 OUT
FLAG -224 -352 IN
FLAG 512 -240 0
FLAG 560 -272 0
FLAG 672 -240 0
FLAG -128 80 0
FLAG 576 -32 0
FLAG -224 -48 0
FLAG 336 -32 0
TEXT 480 144 Left 2 !.model SHORT SW(Ron=0.05 Roff=1K Vt=.5 Vh=-.4)
TEXT 480 184 Left 2 !.tran 50m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1763-1.25.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N004 0 1
V1 IN 0 1.6
R2 N001 IN 50K
C3 N002 0 1
C4 OUT 0 10
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1763 Radj=8333.33 m=1.5 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
C2 N003 0 10n
R1 OUT 0 .6
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1763-1.25.asy)
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -128 -32 R0
SYMATTR InstName V1
SYMATTR Value 1.6
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL ADP1763-1.25 224 176 R0
SYMATTR InstName U1
SYMATTR Value2 ADP1763 Radj=8333.33 m=1.5
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value .6
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\28d7336c1c20_low_voltage_cutoff.asc
* Generated by LTspice 26.0.1 for Windows.
* V1 = 13.2V
* V1 = 9.6V
* V1 = 7.2V
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1017.asy)
V1 N001 0 PULSE(0 13.2 0 1e-3 5s 1s)
R3 N006 0 150K
R2 N003 N004 61.9K
R7 N004 N006 37.4K
XU1 N009 N006 N005 0 N007 LT1017 ;pnba In+)In-)V+)V-)OUT
R6 N007 N009 1E6
M2 N002 N007 N001 N001 IRF7404
R9 N001 N005 1
R1 N009 N008 1000
R5 N001 N003 412K
V2 N008 0 2.5
R8 N007 0 1e6
R4 N002 0 6.6
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 30
.lib LT1017.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 944 680
WIRE -400 0 -624 0
WIRE 64 0 -400 0
WIRE 240 0 64 0
WIRE 432 0 336 0
WIRE -400 32 -400 0
WIRE 64 96 64 0
WIRE -400 128 -400 112
WIRE -368 128 -400 128
WIRE -400 144 -400 128
WIRE -624 256 -624 0
WIRE -400 256 -400 224
WIRE -368 256 -400 256
WIRE 64 256 64 176
WIRE 432 256 432 0
WIRE 32 272 -272 272
WIRE 128 288 96 288
WIRE 256 288 256 48
WIRE 256 288 128 288
WIRE -400 304 -400 256
WIRE -176 304 -224 304
WIRE -64 304 -96 304
WIRE 32 304 -64 304
WIRE -64 368 -64 304
WIRE -48 368 -64 368
WIRE 128 368 128 288
WIRE 128 368 32 368
WIRE 256 384 256 288
WIRE -400 400 -400 384
WIRE -272 400 -272 272
WIRE -272 400 -400 400
WIRE -400 432 -400 400
WIRE -224 432 -224 304
WIRE -624 576 -624 336
WIRE -400 576 -400 512
WIRE -400 576 -624 576
WIRE -224 576 -224 512
WIRE -224 576 -400 576
WIRE 64 576 64 320
WIRE 64 576 -224 576
WIRE 256 576 256 464
WIRE 256 576 64 576
WIRE 432 576 432 336
WIRE 432 576 256 576
WIRE -624 640 -624 576
SYMBOL res -416 16 R0
SYMATTR InstName R5
SYMATTR Value 412K
SYMBOL res 240 368 R0
SYMATTR InstName R8
SYMATTR Value 1e6
SYMBOL res 416 240 R0
SYMATTR InstName R4
SYMATTR Value 6.6
SYMBOL res 48 80 R0
SYMATTR InstName R9
SYMATTR Value 1
SYMBOL voltage -224 416 R0
WINDOW 0 -51 101 Left 0
WINDOW 3 -60 132 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 2.5
SYMBOL res -80 288 R90
WINDOW 0 61 59 VBottom 0
WINDOW 3 68 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL voltage -624 240 R0
WINDOW 3 24 104 Invisible 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 13.2 0 1e-3 5s 1s)
SYMATTR InstName V1
SYMBOL res -416 288 R0
SYMATTR InstName R7
SYMATTR Value 37.4K
SYMBOL res -416 416 R0
SYMATTR InstName R3
SYMATTR Value 150K
SYMBOL Comparators\\LT1017 64 288 R0
WINDOW 0 -76 -59 Left 0
WINDOW 3 -96 -91 Left 0
SYMATTR InstName U1
SYMBOL res 48 352 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R6
SYMATTR Value 1E6
SYMBOL pmos 336 48 M270
WINDOW 0 30 124 VLeft 0
WINDOW 3 28 -1 VLeft 0
SYMATTR InstName M2
SYMATTR Value IRF7404
SYMBOL res -416 128 R0
SYMATTR InstName R2
SYMATTR Value 61.9K
FLAG -624 640 0
TEXT -592 600 Left 0 !.tran 30
TEXT -520 400 Left 0 ;V1 = 13.2V
TEXT -512 256 Left 0 ;V1 = 9.6V
TEXT -512 128 Left 0 ;V1 = 7.2V
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4054L-4.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4054L-4.2.asy)
V2 IN 0 PWL(0 0 20u 5)
XU1 NC_01 0 OUT IN N001 LTC4054L-4.2 ;pnba _CHRG)GND)BAT)Vcc)Prog
CBAT OUT 0 1
R1 N001 0 1.69K
.tran 600
.lib LTC4054L-4.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2932 680
WIRE 1424 -576 1056 -576
WIRE 1056 -560 1056 -576
WIRE 1424 -560 1424 -576
WIRE 1056 -464 1056 -480
WIRE 1696 -464 1568 -464
WIRE 1696 -448 1696 -464
WIRE 1696 -368 1696 -384
WIRE 1616 -272 1568 -272
WIRE 1616 -256 1616 -272
WIRE 1424 -160 1424 -176
WIRE 1616 -160 1616 -176
SYMBOL cap 1680 -448 R0
SYMATTR InstName CBAT
SYMATTR Value 1
SYMBOL LTC4054L-4.2 1424 -368 R0
SYMATTR InstName U1
SYMBOL res 1600 -272 R0
SYMATTR InstName R1
SYMATTR Value 1.69K
SYMBOL voltage 1056 -576 R0
SYMATTR Value PWL(0 0 20u 5)
SYMATTR InstName V2
FLAG 1056 -464 0
FLAG 1424 -160 0
FLAG 1696 -368 0
FLAG 1616 -160 0
FLAG 1056 -576 IN
FLAG 1696 -464 OUT
TEXT 1744 -160 Left 2 !.tran 600
* Z:\home\khalils\Downloads\files\data\raw_asc\1e730635d042_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 0 1k
V1 N001 0 PULSE(0 3 5u 1n 1n 5u 10u)
C1 N002 N001 470p
.tran 50u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 128 64 128
WIRE 224 128 192 128
WIRE 64 160 64 128
WIRE 224 160 224 128
WIRE 64 256 64 240
WIRE 224 256 224 240
SYMBOL cap 192 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 470p
SYMBOL voltage 64 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 3 5u 1n 1n 5u 10u)
SYMBOL res 208 144 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 64 256 0
FLAG 224 256 0
TEXT 96 280 Left 2 !.tran 50u