Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4362-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4362-2.asy)
R1 N004 0 10
V3 N005 0 PWL(0u 0 1200m 0 +5n 1 1201m 1 +5n 0)
XU1 N006 N003 NC_01 N004 0 N007 0 LTC4362-2 ;pnba GP)In)Sense)Out)_On)_Pwrgd)Gnd
MQ1 N002 N006 N003 N003 FDS4953
V2 N001 0 PWL(0u 0 100m 0 +1u 20 150m 20 +10u 0 200m 0 +1u -20 250m -20 +10u 0 400m 0 +1u 5 800m 5 +3u 20 900m 20 +10u 5)
R2 N008 N007 1K
S1 0 N004 N005 0 SHORT
L1 N001 N002 1 Rser=150m
V1 N008 0 5
C1 N004 0 10
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1500m startup
.model SHORT SW (Ron=1 Roff=1T Vt=0.5 Vh=-0.4)
.lib LTC4362-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 9052 3716
WIRE 5344 -1520 5104 -1520
WIRE 5520 -1520 5424 -1520
WIRE 5648 -1520 5616 -1520
WIRE 6000 -1520 5936 -1520
WIRE 6096 -1520 6000 -1520
WIRE 6224 -1520 6096 -1520
WIRE 6000 -1504 6000 -1520
WIRE 6096 -1504 6096 -1520
WIRE 6224 -1504 6224 -1520
WIRE 6528 -1488 6272 -1488
WIRE 6656 -1488 6608 -1488
WIRE 6288 -1440 6272 -1440
WIRE 6000 -1408 6000 -1440
WIRE 6096 -1408 6096 -1424
WIRE 6224 -1408 6224 -1424
WIRE 5600 -1360 5600 -1472
WIRE 5648 -1360 5600 -1360
WIRE 6016 -1360 5936 -1360
WIRE 6160 -1360 6096 -1360
WIRE 6160 -1344 6160 -1360
WIRE 5648 -1296 5600 -1296
WIRE 6160 -1248 6160 -1264
WIRE 5792 -1216 5792 -1232
WIRE 5104 -1168 5104 -1520
WIRE 5104 -1072 5104 -1088
SYMBOL ind 5328 -1504 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
WINDOW 39 -16 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=150m
SYMBOL cap 5984 -1504 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage 6512 -1488 M90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PWL(0u 0 1200m 0 +5n 1 1201m 1 +5n 0)
SYMATTR InstName V3
SYMBOL LTC4362-2 5792 -1392 R0
SYMATTR InstName U1
SYMBOL sw 6224 -1408 R180
WINDOW 0 -15 114 Right 2
WINDOW 3 -29 1 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL res 6112 -1344 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 5104 -1184 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR Value PWL(0u 0 100m 0 +1u 20 150m 20 +10u 0 200m 0 +1u -20 250m -20 +10u 0 400m 0 +1u 5 800m 5 +3u 20 900m 20 +10u 5)
SYMATTR InstName V2
SYMBOL voltage 6160 -1360 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value 5
SYMATTR InstName V1
SYMBOL res 6080 -1520 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL pmos 5520 -1472 R270
WINDOW 0 52 46 VTop 2
WINDOW 3 -10 60 VLeft 2
SYMATTR InstName Q1
SYMATTR Value FDS4953
FLAG 5792 -1216 0
FLAG 5104 -1072 0
FLAG 6160 -1248 0
FLAG 6000 -1408 0
FLAG 6096 -1408 0
FLAG 6656 -1488 0
FLAG 6288 -1440 0
FLAG 6224 -1408 0
FLAG 5600 -1296 0
TEXT 5904 -1200 Left 2 !.tran 1500m startup\n.model SHORT SW (Ron=1 Roff=1T Vt=0.5 Vh=-0.4)
* Z:\home\khalils\Downloads\files\data\raw_asc\4dddce6bf5d0_E3a.asc
* Generated by LTspice 26.0.1 for Windows.
RD N001 Vout 8000
M2 Vout N002 N004 N003 NMOS l=0.36u w=18u
VDD N001 0 3.3
VB N002 0 1.1
M1 N004 N005 0 N006 NMOS l=0.18u w=18u
VIN N005 0 V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VIN 0 3.3 0.01
.model NMOS NMOS (LEVEL=1 KP=150u VTO=0.5 LAMBDA=0 GAMMA=0 PHI=0.6)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 -256 0 -256
WIRE 96 -128 96 -176
WIRE 96 -96 96 -128
WIRE 48 -16 -48 -16
WIRE 96 -16 96 -48
WIRE 96 32 96 0
WIRE 48 112 -48 112
WIRE 96 112 96 80
WIRE 96 128 96 128
IOPIN 96 -128 Out
SYMBOL voltage -48 96 R0
SYMATTR InstName VIN
SYMBOL res 80 -272 R0
SYMATTR InstName RD
SYMATTR Value 8000
SYMBOL nmos4 48 32 R0
SYMATTR InstName M1
SYMATTR Value2 l=0.18u w=18u
SYMBOL voltage -48 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value 1.1
SYMBOL voltage 0 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 3.3
SYMBOL nmos4 48 -96 R0
SYMATTR InstName M2
SYMATTR Value2 l=0.36u w=18u
FLAG 96 128 0
FLAG -48 64 0
FLAG -48 192 0
FLAG 0 -176 0
FLAG 96 -128 Vout
TEXT -88 -384 Left 2 !.dc VIN 0 3.3 0.01
TEXT -88 -360 Left 2 !.model NMOS NMOS (LEVEL=1 KP=150u VTO=0.5 LAMBDA=0 GAMMA=0 PHI=0.6)
* Z:\home\khalils\Downloads\files\data\raw_asc\378588726926_1b.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
A1 N004 N006 0 0 0 Output N002 0 SRFLOP
XU1 N003 N005 V -V N004 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R3 V N005 5k
R5 N007 0 5k
V2 -V 0 -15
XU2 N007 N003 V -V N006 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
Q1 N001 N002 0 0 NPN
R1 V N001 30k
C N003 0 1n
R4 N005 N007 5k
R2 N001 N003 15k
V1 V 0 15
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1m
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1260 680
WIRE 464 -288 -288 -288
WIRE 816 -240 528 -240
WIRE -288 -128 -288 -288
WIRE -288 64 -288 -48
WIRE 256 64 -288 64
WIRE 416 80 320 80
WIRE -32 96 -32 80
WIRE 256 96 -32 96
WIRE 416 192 416 80
WIRE 528 192 416 192
WIRE 816 192 816 -240
WIRE 816 192 624 192
WIRE 528 240 416 240
WIRE 848 240 640 240
WIRE -32 256 -32 96
WIRE 256 336 -32 336
WIRE 416 352 416 240
WIRE 416 352 320 352
WIRE -288 368 -288 64
WIRE 256 368 -288 368
WIRE -288 464 -288 368
WIRE -32 464 -32 336
WIRE -32 640 -32 544
IOPIN 848 240 Out
SYMBOL OpAmps\\UniversalOpAmp2 288 80 M180
SYMATTR InstName U1
SYMBOL voltage 1072 -416 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL OpAmps\\UniversalOpAmp2 288 352 M180
SYMATTR InstName U2
SYMBOL res -48 -16 R0
SYMATTR InstName R3
SYMATTR Value 5k
SYMBOL Digital\\srflop 576 144 R0
SYMATTR InstName A1
SYMBOL res -304 -144 R0
SYMATTR InstName R2
SYMATTR Value 15k
SYMBOL res -48 448 R0
SYMATTR InstName R5
SYMATTR Value 5k
SYMBOL res -48 240 R0
SYMATTR InstName R4
SYMATTR Value 5k
SYMBOL voltage 1184 -416 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL cap -304 464 R0
SYMATTR InstName C
SYMATTR Value 1n
SYMBOL npn 528 -288 M0
SYMATTR InstName Q1
SYMBOL res -304 -384 R0
SYMATTR InstName R1
SYMATTR Value 30k
FLAG -32 640 0
FLAG -32 0 V
FLAG 288 112 V
FLAG 288 384 V
FLAG -288 528 0
FLAG 464 -192 0
FLAG -288 -368 V
FLAG 848 240 Output
FLAG 288 320 -V
FLAG 288 48 -V
FLAG 1072 -320 0
FLAG 1184 -320 0
FLAG 1072 -400 V
FLAG 1184 -400 -V
TEXT -312 664 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\0b23676cab27_LightDetector.asc
* Generated by LTspice 26.0.1 for Windows.
R4 out 0 1Meg
V1 N001 0 5
I1 N001 out PULSE(20u 200u 0 4 1 0 5)
C2 out 0 14p
R1 out 0 24k
.tran 0 10 0 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 48 32 48
WIRE 32 80 32 48
WIRE 224 80 224 48
WIRE 224 208 224 160
WIRE 592 208 224 208
WIRE 672 208 592 208
WIRE 704 208 672 208
WIRE 224 240 224 208
IOPIN 224 208 In
IOPIN 704 208 Out
SYMBOL current 224 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value PULSE(20u 200u 0 4 1 0 5)
SYMBOL voltage 32 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 208 224 R0
SYMATTR InstName R1
SYMATTR Value 24k
SYMBOL cap 576 208 R0
SYMATTR InstName C2
SYMATTR Value 14p
SYMBOL res 656 192 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
FLAG 32 160 0
FLAG 224 320 0
FLAG 224 208 phototransistor
FLAG 592 272 0
FLAG 704 208 out
FLAG 672 288 0
TEXT 0 344 Left 2 !.tran 0 10 0 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5671R.asc
* Generated by LTspice 26.0.1 for Windows.
RLOAD vOUT 0 1k
CLOAD vOUT 0 10n
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
V1 Vdd 0 5
XU2 vDAC Vdd 0 vOUT AD5671R Gain=2 ;pnba Vdac)Vdd)GND)Vout
.tran 50u
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5671R.asy)
.lib AD5671R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 112 112 0 112
WIRE 192 112 112 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -240 -80 Vdd
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL AD5671R -208 112 R0
SYMATTR InstName U2
TEXT -160 312 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\0f074258da7e_1734L-4.2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 7
R1 N004 0 1K
C1 BAT 0 .1
Q1 BAT N003 N002 0 2N2907
XU1 N002 0 N001 N004 BAT N003 LTC1734L-x.x Ref=4.2 ;pnba Isense)GND)Vcc)Prog)BAT)Drive
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 5 startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1734L-4.2.asy)
.lib LTC1734L-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2284 1688
WIRE 1680 1280 1536 1280
WIRE 2096 1280 1968 1280
WIRE 1536 1312 1536 1280
WIRE 2096 1328 2096 1280
WIRE 1680 1376 1632 1376
WIRE 2032 1376 1968 1376
WIRE 1536 1424 1536 1392
WIRE 1584 1472 1568 1472
WIRE 1680 1472 1664 1472
WIRE 2032 1472 1968 1472
WIRE 2096 1472 2096 1424
WIRE 2096 1472 2032 1472
WIRE 2096 1504 2096 1472
WIRE 2096 1584 2096 1568
FLAG 1568 1472 0
FLAG 1632 1376 0
FLAG 1536 1424 0
FLAG 2096 1584 0
FLAG 2032 1472 BAT
SYMBOL VOLTAGE 1536 1296 R0
SYMATTR InstName V1
SYMATTR Value 7
SYMBOL RES 1680 1456 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL cap 2080 1504 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL PNP 2032 1424 M180
WINDOW 0 76 72 Left 0
WINDOW 3 76 36 Left 0
SYMATTR InstName Q1
SYMATTR Value 2N2907
SYMBOL PowerProducts\\LTC1734L-4.2 1824 1376 R0
SYMATTR InstName U1
TEXT 1888 1560 Left 0 !.tran 5 startup
* Z:\tmp\asc_dec_bjh7r6w2\06d122a902dd_CPL_AND_NAND_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
A3 A 0 0 0 0 A1 0 0 BUF
V1 A 0 PULSE(0 5 0 0 0 1n 2n)
A1 N003 0 0 0 0 AND 0 0 BUF
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -320 48 -352 48
WIRE -288 48 -320 48
WIRE -160 48 -224 48
WIRE -320 80 -320 48
WIRE 288 240 288 48
WIRE -320 256 -352 256
WIRE -288 256 -320 256
WIRE -160 256 -224 256
WIRE -320 288 -320 256
WIRE 240 320 32 320
WIRE 608 320 240 320
WIRE 144 352 144 160
WIRE 208 352 144 352
WIRE 288 352 288 336
WIRE 288 352 208 352
WIRE 208 384 208 352
SYMBOL Digital\\inv -288 -16 R0
SYMATTR InstName A3
SYMBOL voltage -320 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 0 0 1n 2n)
SYMBOL Digital\\inv 272 384 R90
SYMATTR InstName A1
FLAG 288 288 0
FLAG -352 48 A
FLAG -160 48 A1
FLAG -352 256 B
FLAG -160 256 B1
FLAG -320 160 0
FLAG 208 448 AND
* Z:\tmp\asc_dec_bjh7r6w2\071d43a8b810_6248_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V4 N008 0 1
V1 +V 0 3
R6 IN- N007 1K
E1 IN+ 0 N002 0 0.5
V3 N005 0 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 688
WIRE -10976 -3072 -11040 -3072
WIRE -11136 -2976 -11216 -2976
WIRE -11040 -2976 -11040 -3072
WIRE -11040 -2976 -11056 -2976
WIRE -10992 -2976 -11040 -2976
WIRE -11216 -2960 -11216 -2976
WIRE -11568 -2944 -11584 -2944
WIRE -11312 -2944 -11488 -2944
WIRE -11264 -2944 -11312 -2944
WIRE -11264 -2896 -11280 -2896
WIRE -10768 -2896 -10768 -2976
WIRE -10736 -2896 -10768 -2896
WIRE -10592 -2880 -10592 -2976
WIRE -10592 -2880 -10672 -2880
WIRE -10736 -2864 -10768 -2864
WIRE -11216 -2848 -11216 -2880
WIRE -11216 -2848 -11280 -2848
WIRE -11216 -2832 -11216 -2848
WIRE -10704 -2832 -10704 -2848
WIRE -11312 -2816 -11312 -2944
WIRE -11264 -2816 -11312 -2816
WIRE -11040 -2816 -11040 -2976
WIRE -10992 -2816 -11040 -2816
WIRE -10880 -2800 -10880 -2976
WIRE -10880 -2800 -10928 -2800
WIRE -10560 -2800 -10880 -2800
WIRE -10992 -2784 -11040 -2784
WIRE -11440 -2768 -11440 -2784
WIRE -11264 -2768 -11312 -2768
WIRE -11312 -2752 -11312 -2768
WIRE -10960 -2752 -10960 -2768
WIRE -11216 -2720 -11216 -2752
WIRE -11136 -2720 -11216 -2720
WIRE -11040 -2720 -11040 -2784
WIRE -11040 -2720 -11056 -2720
WIRE -10928 -2720 -11040 -2720
WIRE -10592 -2720 -10592 -2880
WIRE -10592 -2720 -10848 -2720
WIRE -11040 -2688 -11040 -2720
WIRE -10768 -2688 -10768 -2864
WIRE -11440 -2672 -11440 -2688
WIRE -11312 -2656 -11312 -2672
WIRE -11040 -2608 -11040 -2624
WIRE -10768 -2592 -10768 -2608
SYMBOL voltage -11312 -2768 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V4
SYMATTR Value 1
SYMBOL voltage -11440 -2784 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL RES -11152 -2736 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 1K
SYMBOL e -11216 -2976 R0
WINDOW 0 31 30 Left 2
WINDOW 3 30 84 Left 2
SYMATTR InstName E1
SYMATTR Value 0.5
SYMBOL voltage -10768 -2704 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V3
SYMATTR Value 1
FLAG -11440 -2672 0
FLAG -11440 -2784 +V
FLAG -10960 -2752 0
FLAG -10704 -2832 0
FLAG -11040 -2608 0
FLAG -10768 -2592 0
FLAG -11312 -2656 0
FLAG -11584 -2944 0
FLAG -11280 -2848 0
FLAG -11280 -2896 0
FLAG -11216 -2976 IN+
FLAG -11216 -2720 IN-
FLAG -10960 -2832 +V
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3309B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3309B.asy)
R3 N002 0 70.7K
R2 N004 0 100K
R1 OUT N004 260K
R4 OUT N001 500K
Rload OUT 0 .4
V1 IN 0 4
C3 OUT N004 2.2p
XU1 IN IN N003 N004 0 0 N002 N001 0 LTC3309B ;pnba Vin)EN)SW)FB)AGND)PGND)RT)Pgood)Mode/Sync
L1 N003 OUT 150n Rser=3m
C1 OUT 0 47
.tran 1.5m startup
.lib LTC3309B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2652 1736
WIRE 1536 1280 1440 1280
WIRE 1712 1280 1536 1280
WIRE 1440 1296 1440 1280
WIRE 1712 1296 1712 1280
WIRE 1536 1360 1536 1280
WIRE 1552 1360 1536 1360
WIRE 1920 1360 1872 1360
WIRE 2064 1360 2000 1360
WIRE 1440 1392 1440 1376
WIRE 1440 1472 1424 1472
WIRE 1552 1472 1520 1472
WIRE 1920 1472 1872 1472
WIRE 2064 1472 2064 1360
WIRE 2064 1472 2000 1472
WIRE 2160 1472 2064 1472
WIRE 2240 1472 2160 1472
WIRE 2320 1472 2240 1472
WIRE 2064 1488 2064 1472
WIRE 2160 1488 2160 1472
WIRE 2240 1488 2240 1472
WIRE 2320 1488 2320 1472
WIRE 1552 1584 1536 1584
WIRE 2064 1584 2064 1568
WIRE 2064 1584 1872 1584
WIRE 2160 1584 2160 1552
WIRE 2160 1584 2064 1584
WIRE 2240 1584 2240 1552
WIRE 2320 1584 2320 1568
WIRE 2064 1600 2064 1584
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
WIRE 2064 1696 2064 1680
SYMBOL VOLTAGE 1440 1280 R0
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL res 2048 1584 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL res 1536 1456 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 70.7K
SYMBOL cap 2224 1488 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMBOL LTC3309B 1712 1456 R0
SYMATTR InstName U1
SYMBOL res 2016 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 500K
SYMBOL cap 2144 1488 R0
SYMATTR InstName C3
SYMATTR Value 2.2p
SYMBOL res 2304 1472 R0
SYMATTR InstName Rload
SYMATTR Value .4
SYMBOL RES 2048 1472 R0
SYMATTR InstName R1
SYMATTR Value 260K
SYMBOL ind 1904 1488 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150n
SYMATTR SpiceLine Rser=3m
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1440 1392 0
FLAG 1536 1584 0
FLAG 2320 1584 0
FLAG 2064 1696 0
FLAG 2240 1584 0
FLAG 1424 1472 0
FLAG 1440 1280 IN
FLAG 2320 1472 OUT
TEXT 2200 1696 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\553324c7bb65_Draft_Diode_1N4148.asc
* Generated by LTspice 26.0.1 for Windows.
* Analyse
* Bibliothek
* Parameter
V1 IN1 0 PULSE(0 1 0 .5m .5m 0 1m)
D1 IN2 0 1N4148
R1 IN1 IN2 {R1}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m
.lib elk.lib
.param R1=10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 64 96 64
WIRE 192 64 144 64
WIRE 336 64 272 64
WIRE 400 64 336 64
WIRE 144 80 144 64
WIRE 336 80 336 64
WIRE 144 176 144 160
WIRE 336 176 336 144
WIRE 336 176 144 176
WIRE 144 192 144 176
IOPIN 96 64 In
IOPIN 400 64 Out
SYMBOL voltage 144 64 R0
WINDOW 3 -323 96 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 17 19 Left 2
SYMATTR Value PULSE(0 1 0 .5m .5m 0 1m)
SYMATTR InstName V1
SYMBOL diode 320 80 R0
WINDOW 0 38 31 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 176 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 1 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value {R1}
FLAG 144 192 0
FLAG 96 64 IN1
FLAG 400 64 IN2
TEXT -8 -48 Left 2 !.tran 2m
TEXT 168 -48 Left 2 !.lib elk.lib
TEXT 344 -48 Left 2 !.param R1=10
TEXT -8 -72 Left 2 ;Analyse
TEXT 168 -72 Left 2 ;Bibliothek
TEXT 344 -72 Left 2 ;Parameter
* Z:\home\khalils\Downloads\files\data\raw_asc\c6b1ca35c5d5_osc_impedance.asc
* Generated by LTspice 26.0.1 for Windows.
* Run ".ac analysis" and plot "Z", (Vgate/I(I1)), in "cartesion coordinate" mode.\nNote that as {R} is decreased, the real part of Z becomes more and more negative.\nAs {R} is further decreased, the real part of Z becomes more positive. A this point,\nthe oscillator fails to start.\nRun ".transient analysis" to see what effect decreasing {R} has on oscillator startup.
;tran 0 50uS 0S 200pS
R2 Vgate 0 {R}
C1 Vgate N002 31.8pF
C2 N002 0 31.8pF
I2 N002 0 1mA
I1 0 Vgate AC 1uA
J1 N001 Vgate N002 MPF102
L2 Vgate 0 159nH Rser=0
V1 N001 0 9V
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.ac oct 10k 98e6 102e6
.step param R 3k 1.5k 500
.meas ac Re find re(V(vgate)/I(I1)) at 100e6
.meas ac Im find im(V(vgate)/I(I1)) at 100e6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 884
WIRE -736 416 -736 272
WIRE -736 624 -736 496
WIRE -656 272 -736 272
WIRE -656 272 -656 208
WIRE -576 272 -656 272
WIRE -576 416 -576 272
WIRE -576 624 -736 624
WIRE -576 624 -576 496
WIRE -432 272 -576 272
WIRE -432 416 -432 272
WIRE -432 624 -576 624
WIRE -432 624 -432 496
WIRE -304 272 -432 272
WIRE -304 304 -304 272
WIRE -304 416 -304 368
WIRE -304 480 -304 416
WIRE -304 624 -432 624
WIRE -304 624 -304 544
WIRE -224 272 -304 272
WIRE -176 208 -176 176
WIRE -176 416 -304 416
WIRE -176 416 -176 304
WIRE -176 480 -176 416
WIRE -176 624 -304 624
WIRE -176 624 -176 560
WIRE 0 176 -176 176
WIRE 0 288 0 176
WIRE 0 624 -176 624
WIRE 0 624 0 368
WIRE 0 656 0 624
SYMBOL voltage 0 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9V
SYMBOL cap -320 304 R0
SYMATTR InstName C1
SYMATTR Value 31.8pF
SYMBOL current -736 496 R180
WINDOW 123 -101 105 Left 0
WINDOW 3 24 88 Invisible 0
SYMATTR Value2 AC 1uA
SYMATTR Value ""
SYMATTR InstName I1
SYMBOL current -176 480 R0
WINDOW 123 24 116 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 43 47 Left 0
SYMATTR Value 1mA
SYMATTR InstName I2
SYMBOL ind -448 400 R0
SYMATTR InstName L2
SYMATTR Value 159nH
SYMATTR SpiceLine Rser=0
SYMBOL cap -320 480 R0
SYMATTR InstName C2
SYMATTR Value 31.8pF
SYMBOL njf -224 208 R0
SYMATTR InstName J1
SYMATTR Value MPF102
SYMBOL res -592 400 R0
SYMATTR InstName R2
SYMATTR Value {R}
FLAG 0 656 0
FLAG -656 208 Vgate
TEXT -1000 224 Left 0 !;tran 0 50uS 0S 200pS
TEXT -1000 272 Left 0 !.ac oct 10k 98e6 102e6
TEXT -1024 320 Left 0 !.step param R 3k 1.5k 500
TEXT -816 -80 Left 0 ;Run ".ac analysis" and plot "Z", (Vgate/I(I1)), in "cartesion coordinate" mode.\nNote that as {R} is decreased, the real part of Z becomes more and more negative.\nAs {R} is further decreased, the real part of Z becomes more positive. A this point,\nthe oscillator fails to start.\nRun ".transient analysis" to see what effect decreasing {R} has on oscillator startup.
TEXT -1336 392 Left 0 !.meas ac Re find re(V(vgate)/I(I1)) at 100e6\n.meas ac Im find im(V(vgate)/I(I1)) at 100e6
* Z:\home\khalils\Downloads\files\data\raw_asc\055c327d6dc0_nand.asc
* Generated by LTspice 26.0.1 for Windows.
M1 out in1 vdd N001 PMOS l=90n w=400n
M5 P001 in2 0 N003 NMOS l=90n w=200n
M2 out in2 vdd N002 PMOS l=90n w=400n
M3 out in1 P001 0 NMOS l=90n w=200n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 -208 -176 -208
WIRE -64 -176 -64 -240
WIRE 80 -176 80 -240
WIRE -144 -160 -208 -160
WIRE -112 -160 -144 -160
WIRE 16 -160 16 -208
WIRE 32 -160 16 -160
WIRE -64 -128 -64 -160
WIRE 80 -128 80 -160
WIRE -176 -64 -176 -208
WIRE -176 -64 -208 -64
WIRE -64 -48 -64 -80
WIRE 0 -48 -64 -48
WIRE 80 -48 80 -80
WIRE 80 -48 0 -48
WIRE 176 -48 80 -48
WIRE 0 -16 0 -48
WIRE 80 32 0 32
WIRE -144 64 -144 -160
WIRE -48 64 -144 64
WIRE -176 160 -176 -64
WIRE -48 160 -176 160
WIRE 0 160 0 128
WIRE 0 192 0 176
WIRE 80 192 80 32
WIRE 80 192 0 192
WIRE 0 240 0 192
IOPIN -208 -160 In
IOPIN -208 -64 In
IOPIN 176 -48 Out
IOPIN 80 -240 In
IOPIN -64 -240 In
SYMBOL nmos4 -48 80 R0
SYMATTR InstName M5
SYMATTR Value2 l=90n w=200n
SYMBOL nmos4 -48 -16 R0
SYMATTR InstName M3
SYMATTR Value2 l=90n w=200n
SYMBOL pmos4 32 -80 M180
SYMATTR InstName M2
SYMATTR Value2 l=90n w=400n
SYMBOL pmos4 -112 -80 M180
SYMATTR InstName M1
SYMATTR Value2 l=90n w=400n
FLAG -208 -160 in1
FLAG -208 -64 in2
FLAG 176 -48 out
FLAG 80 -240 vdd
FLAG -64 -240 vdd
FLAG 0 240 0