Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2641-14.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N005 0 PULSE(0 3.3 0 0.1n 0.1n 19.8n 40n)
V2 N002 0 5
V3 N003 0 2.5
V4 N004 0 PULSE(0 3.3 0 0.1n 0.1n 9.9n 20n)
V5 N001 0 PWL(0 3.3 0.6u 3.3 +2n 0 +0.31u 0 +2n 3.3)
V6 N006 0 PWL(0 3.3 2u 3.3 +2n 0 +30n 0 +2n 3.3)
C1 OUT 0 10p
XU1 N003 N001 N004 N005 N006 OUT N002 0 LTC2641-14 ;pnba REF)_CS)SCLK)DIN)_CLR)Vout)Vdd)GND
.tran 3u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2641-14.asy)
.lib LTC2641-14.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 932
WIRE 336 16 336 -16
WIRE 448 16 448 -16
WIRE -32 48 -48 48
WIRE 192 48 48 48
WIRE 336 128 336 96
WIRE 448 128 448 96
WIRE -32 176 -48 176
WIRE 160 176 48 176
WIRE 192 176 192 48
WIRE 240 176 192 176
WIRE 160 240 160 176
WIRE 240 240 160 240
WIRE 608 272 528 272
WIRE 608 288 608 272
WIRE -32 304 -48 304
WIRE 240 304 48 304
WIRE 240 368 176 368
WIRE 608 368 608 352
WIRE 384 416 384 400
WIRE -32 448 -48 448
WIRE 176 448 176 368
WIRE 176 448 48 448
FLAG 384 416 0
FLAG -48 304 0
FLAG 336 -16 0
FLAG 448 -16 0
FLAG -48 176 0
FLAG -48 48 0
FLAG -48 448 0
FLAG 608 272 OUT
FLAG 608 368 0
SYMBOL voltage 64 304 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -99 VRight 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 0.1n 0.1n 19.8n 40n)
SYMBOL voltage 336 112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 448 112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 2.5
SYMBOL voltage 64 176 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -89 VRight 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 3.3 0 0.1n 0.1n 9.9n 20n)
SYMBOL voltage 64 48 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -122 VRight 2
SYMATTR InstName V5
SYMATTR Value PWL(0 3.3 0.6u 3.3 +2n 0 +0.31u 0 +2n 3.3)
SYMBOL voltage 64 448 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -99 VRight 2
SYMATTR InstName V6
SYMATTR Value PWL(0 3.3 2u 3.3 +2n 0 +30n 0 +2n 3.3)
SYMBOL cap 592 288 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL LTC2641-14 384 272 R0
WINDOW 0 0 -48 Center 2
WINDOW 3 0 53 Center 2
SYMATTR InstName U1
TEXT 576 472 Left 2 !.tran 3u
* Z:\home\khalils\Downloads\files\data\raw_asc\453467b897ef_DelayOff.asc
* Generated by LTspice 26.0.1 for Windows.
* Inverter with delay to off
A1 N001 0 0 0 0 0 OUT 0 SCHMITT VT=1 Vh=0.1
I1 0 N001 {100n/Td}
S1 0 N001 IN 0 SW
C1 N001 0 100n Rpar=100Meg
.model SW SW(Roff=1G Vt=0.5)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 80 16 80
WIRE 272 80 160 80
WIRE 368 80 272 80
WIRE 480 80 432 80
WIRE 16 96 16 80
WIRE 272 96 272 80
WIRE -32 112 -144 112
WIRE 160 112 160 80
WIRE -32 160 -48 160
WIRE -48 192 -48 160
WIRE 16 192 16 176
WIRE 160 192 160 176
WIRE 272 192 272 176
IOPIN -144 112 In
IOPIN 480 80 Out
SYMBOL cap 176 112 M0
SYMATTR InstName C1
SYMATTR Value 100n
SYMATTR SpiceLine Rpar=100Meg
SYMBOL current 272 176 M180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value {100n/Td}
SYMBOL sw 16 192 M180
SYMATTR InstName S1
SYMBOL Digital\\schmtbuf 368 144 M180
WINDOW 3 8 60 Invisible 2
SYMATTR Value VT=1 Vh=0.1
SYMATTR InstName A1
FLAG 272 192 0
FLAG 160 192 0
FLAG 16 192 0
FLAG -48 192 0
FLAG -144 112 IN
FLAG 480 80 OUT
TEXT 0 32 Left 2 !.model SW SW(Roff=1G Vt=0.5)
TEXT 72 -40 Left 2 ;Inverter with delay to off
* Z:\home\khalils\Downloads\files\data\raw_asc\30ef2326443d_ADA4625.asc
* Generated by LTspice 26.0.1 for Windows.
* PhotoDiode
* PDB-C134
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4625.asy)
XU1 0 N001 +V -V OUT ADA4625-1 ;pnba In+)In-)V+)V-)OUT
Id N001 0 PULSE(0 200u 1u 1p 1p 2u 3u 2)
Cd N001 0 6p
V1 +V 0 18
Rf OUT N001 49.9K
Cf OUT N001 3p
V2 -V 0 -18
Rsh N001 0 2G
.tran 6u
.lib ADA4625-1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4472 1028
WIRE -2368 -608 -2384 -608
WIRE -2272 -608 -2304 -608
WIRE -2896 -512 -3008 -512
WIRE -2800 -512 -2896 -512
WIRE -2384 -512 -2384 -608
WIRE -2384 -512 -2800 -512
WIRE -2368 -512 -2384 -512
WIRE -2272 -512 -2272 -608
WIRE -2272 -512 -2288 -512
WIRE -3008 -496 -3008 -512
WIRE -2800 -496 -2800 -512
WIRE -3216 -480 -3216 -496
WIRE -2896 -480 -2896 -512
WIRE -2384 -416 -2384 -512
WIRE -2352 -416 -2384 -416
WIRE -3008 -400 -3008 -416
WIRE -2896 -400 -2896 -416
WIRE -2800 -400 -2800 -416
WIRE -2272 -400 -2272 -512
WIRE -2272 -400 -2288 -400
WIRE -2240 -400 -2272 -400
WIRE -3216 -384 -3216 -400
WIRE -2352 -384 -2384 -384
WIRE -2384 -352 -2384 -384
WIRE -3216 -288 -3216 -304
WIRE -3216 -192 -3216 -208
CIRCLE Normal -2400 -272 -3088 -624 2
SYMBOL ADA4625 -2320 -464 R0
SYMATTR InstName U1
SYMBOL cap -2912 -480 R0
SYMATTR InstName Cd
SYMATTR Value 6p
SYMBOL res -3024 -512 R0
SYMATTR InstName Rsh
SYMATTR Value 2G
SYMBOL voltage -3216 -304 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value -18
SYMBOL res -2272 -528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rf
SYMATTR Value 49.9K
SYMBOL current -2800 -496 R0
WINDOW 123 24 116 Left 2
WINDOW 39 24 98 Left 2
SYMATTR Value PULSE(0 200u 1u 1p 1p 2u 3u 2)
SYMATTR InstName Id
SYMBOL voltage -3216 -496 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 18
SYMBOL cap -2304 -624 R90
WINDOW 0 -1 29 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName Cf
SYMATTR Value 3p
FLAG -3216 -384 0
FLAG -3216 -496 +V
FLAG -2240 -400 OUT
FLAG -2320 -432 +V
FLAG -2384 -352 0
FLAG -2320 -368 -V
FLAG -2800 -400 0
FLAG -2896 -400 0
FLAG -3008 -400 0
FLAG -3216 -192 0
FLAG -3216 -304 -V
TEXT -2760 -560 Center 2 ;PhotoDiode
TEXT -2904 -368 Center 2 ;PDB-C134
TEXT -2224 -256 Left 2 !.tran 6u
* Z:\home\khalils\Downloads\files\data\raw_asc\18bf4eb87265_temperature_stepping1.asc
* Generated by LTspice 26.0.1 for Windows.
D1 vf 0 1N4148
I1 0 vf 1m
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.OP
* .temp 0 50 100
.step temp 0 100 1
* Plot the forward voltage V(vf) versus temperature.\nEither use ".TEMP" or ".step TEMP".
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 160 -16 160
WIRE 144 160 80 160
WIRE -16 192 -16 160
WIRE 144 192 144 160
WIRE -16 288 -16 272
WIRE 144 288 144 256
FLAG -16 288 0
FLAG 144 288 0
FLAG 80 160 vf
SYMBOL diode 128 192 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL current -16 272 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName I1
SYMATTR Value 1m
TEXT -48 80 Left 0 !.OP
TEXT -48 0 Left 0 ;.temp 0 50 100
TEXT -48 32 Left 0 !.step temp 0 100 1
TEXT -48 -72 Left 0 ;Plot the forward voltage V(vf) versus temperature.\nEither  use ".TEMP" or  ".step TEMP".
* Z:\home\khalils\Downloads\files\data\raw_asc\0ac51af00db0_flickernoise2a.asc
* Generated by LTspice 26.0.1 for Windows.
* taken from "low noise electronic system designs" by Mothenbacher &Connelly
* Modeling 1/f and white voltage noise in LTspice (enoise [V/sqrHz] and fce [Hz])
H1 out 0 Vesen {enoise/iref}
Cen N001 N002 1
Vesen N002 0 0
D1 N001 0 Denoise
Ien 0 N001 {iref**2/q/2}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model Denoise D(kf ={2*q*fce}, af =1)
.noise v(out) Vesen dec 10 0.001 10k
.op
.params iref = 1e-12 q=1.602e-19 enoise=20e-9 fce=200
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 176 -64 128
WIRE -64 320 -64 256
WIRE 32 128 -64 128
WIRE 32 144 32 128
WIRE 32 224 32 208
WIRE 32 320 -64 320
WIRE 32 320 32 304
WIRE 32 352 32 320
WIRE 128 128 32 128
WIRE 128 192 128 128
WIRE 128 320 32 320
WIRE 128 320 128 256
WIRE 336 176 336 144
WIRE 336 352 336 256
WIRE 464 144 336 144
IOPIN 464 144 Out
SYMBOL diode 112 192 R0
SYMATTR InstName D1
SYMATTR Value Denoise
SYMBOL cap 16 144 R0
WINDOW 0 -36 6 Left 0
WINDOW 3 27 6 Left 0
SYMATTR InstName Cen
SYMATTR Value 1
SYMBOL h 336 160 R0
WINDOW 38 -43 56 Left 0
SYMATTR InstName H1
SYMATTR Value {enoise/iref}
SYMATTR SpiceModel Vesen
SYMBOL voltage 32 208 R0
WINDOW 0 -83 89 Left 0
WINDOW 3 32 89 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vesen
SYMATTR Value 0
SYMBOL current -64 256 R180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Ien
SYMATTR Value {iref**2/q/2}
FLAG 32 352 0
FLAG 336 352 0
FLAG 464 144 out
TEXT -56 416 Left 0 !.model Denoise D(kf ={2*q*fce}, af =1)
TEXT -56 472 Left 0 !.noise v(out) Vesen dec 10 0.001 10k
TEXT -56 448 Left 0 !.op
TEXT -56 384 Left 0 !.params iref = 1e-12 q=1.602e-19 enoise=20e-9 fce=200
TEXT -200 80 Left 0 ;taken from "low noise electronic system designs" by Mothenbacher &Connelly
TEXT -200 48 Left 0 ;Modeling 1/f and white voltage noise in LTspice (enoise [V/sqrHz] and fce [Hz])
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6236.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6236.asy)
R2 N001 0 1K
V2 -V 0 -5
XU1 N003 N001 N002 +V -V NC_01 LT6236 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN
V1 +V 0 5
R1 N002 N001 5K
V3 N003 0 SINE(0 .1 1K)
.tran 3m
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -112 48 -128 48
WIRE 0 48 -32 48
WIRE 96 48 0 48
WIRE 208 48 176 48
WIRE -368 112 -368 96
WIRE -240 112 -240 96
WIRE 64 112 64 96
WIRE 0 160 0 48
WIRE 32 160 0 160
WIRE 208 192 208 48
WIRE 208 192 176 192
WIRE -368 208 -368 192
WIRE -240 208 -240 192
WIRE 32 224 -144 224
WIRE -144 240 -144 224
WIRE 64 288 64 272
WIRE -144 336 -144 320
SYMBOL LT6236 64 192 R0
SYMATTR InstName U1
SYMBOL voltage -144 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 .1 1K)
SYMBOL voltage -240 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -368 96 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 192 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL res -16 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
FLAG -240 208 0
FLAG 64 96 +V
FLAG -240 96 +V
FLAG 64 288 -V
FLAG -368 208 0
FLAG -368 96 -V
FLAG -128 48 0
FLAG -144 336 0
TEXT 136 344 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\60497fbc538e_SOS_pasabajo_simple.asc
* Generated by LTspice 26.0.1 for Windows.
C Vo 0 {1/(Q*wo*Ro)}
V1 Vi 0 SINE(0 1 0 0 0 0 1000) AC 1 0
R1 N001 Vi {Ro}
L N001 Vo {Q*Ro/wo}
.ac dec 100 .01 100
.param Q=sqrt(2)/2 wo=1 Ro=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -224 112 -256 112
WIRE -80 112 -224 112
WIRE 80 112 0 112
WIRE 240 112 160 112
WIRE 400 112 240 112
WIRE -224 176 -224 112
WIRE 240 192 240 112
WIRE -224 336 -224 256
WIRE 240 336 240 256
WIRE 240 336 -224 336
WIRE 240 368 240 336
IOPIN -256 112 In
IOPIN 400 112 Out
SYMBOL voltage -224 160 R0
WINDOW 3 24 96 Invisible 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 1 0 0 0 0 1000)
SYMATTR InstName V1
SYMATTR Value2 AC 1 0
SYMBOL ind 64 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -29 66 VTop 2
SYMATTR InstName L
SYMATTR Value {Q*Ro/wo}
SYMBOL cap 224 192 R0
WINDOW 3 26 54 Left 2
SYMATTR Value {1/(Q*wo*Ro)}
SYMATTR InstName C
SYMBOL res 16 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {Ro}
FLAG -256 112 Vi
FLAG 400 112 Vo
FLAG 240 368 0
TEXT -336 392 Left 2 !.ac dec 100 .01 100
TEXT -336 424 Left 2 !.param Q=sqrt(2)/2 wo=1 Ro=1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1013A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1013A.asy)
V3 N003 0 sine(0 .5 10K)
R2 N001 0 5K
V2 -V 0 -15
XU1 N003 N001 +V -V N002 LT1013 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
R1 N002 N001 50K
.tran 1m
.lib LT1013.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 680
WIRE 192 0 176 0
WIRE 288 0 272 0
WIRE 352 0 288 0
WIRE 448 0 432 0
WIRE -80 64 -80 48
WIRE 32 64 32 48
WIRE 336 96 336 80
WIRE 288 112 288 0
WIRE 304 112 288 112
WIRE 448 128 448 0
WIRE 448 128 368 128
WIRE 304 144 160 144
WIRE -80 160 -80 144
WIRE 32 160 32 144
WIRE 160 160 160 144
WIRE 336 176 336 160
WIRE 160 256 160 240
SYMBOL voltage 32 48 R0
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 160 144 R0
SYMATTR InstName V3
SYMATTR Value sine(0 .5 10K)
SYMBOL res 288 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL voltage -80 48 R0
WINDOW 39 24 125 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT1013A 336 64 R0
SYMATTR InstName U1
SYMBOL res 448 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50K
FLAG -80 160 0
FLAG 336 80 +V
FLAG -80 48 +V
FLAG 176 0 0
FLAG 160 256 0
FLAG 32 160 0
FLAG 32 48 -V
FLAG 336 176 -V
TEXT 384 240 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2120-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2120-1.8.asy)
C1 OUT 0 10
V1 IN 0 5
R1 OUT N001 100K
C2 OUT 0 10
XU1 IN IN N002 0 0 OUT IN N001 IN IN ADP2120-1.8 ;pnba Vin)Pvin)SW)PGND)GND)FB)TRK)Pgood)Sync/Mode)EN
L1 N002 OUT 2.2
Rload OUT 0 1.8
.tran 1m
.lib ADP2120-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 0 48 0
WIRE 288 0 128 0
WIRE 48 16 48 0
WIRE 288 16 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 688 64 576 64
WIRE 48 112 48 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 624 144 560 144
WIRE 688 144 688 64
WIRE 688 144 624 144
WIRE 768 144 688 144
WIRE 560 160 560 144
WIRE 624 160 624 144
WIRE 768 160 768 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 624 224 560 224
WIRE 560 256 560 224
WIRE 768 256 768 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 688 304 688 144
WIRE 688 304 416 304
WIRE 288 368 288 352
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL voltage 48 0 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 608 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res 752 144 R0
SYMATTR Value 1.8
SYMATTR InstName Rload
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL ADP2120-1.8 288 272 R0
SYMATTR InstName U1
FLAG 560 256 0
FLAG 288 368 0
FLAG 48 112 0
FLAG 768 144 OUT
FLAG 768 256 0
FLAG 48 0 IN
TEXT 504 344 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\36fdb28edcf8_2ndOrderBandpass.asc
* Generated by LTspice 26.0.1 for Windows.
* f0 and Q set by parameters
* R1 is arbitary
* This version puts 1/2 the R1 resistance in the capacitor
* Vout
* Vin
* The parameter "H" sets the midband gain
G2 0 2 N003 0 {10*H}
R3 2 0 .1
G1 0 N002 1 0 {2/R1}
R2 N003 N002 {R1/2}
V1 1 0 AC 1
R4 2 0 1Meg
R1 N002 0 {R1/2}
L1 N003 0 {L1} Cpar={C1}
.param f0= 1k Q=0.5
.param R1=1k
.param L1=1/(C1*(2*pi*f0)**2)
.param C1=Q/(R1*2*pi*f0)
.param H=1
.ac dec 101 100 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE -384 -128 -448 -128
WIRE -288 -128 -320 -128
WIRE -112 -128 -240 -128
WIRE -64 -128 -112 -128
WIRE 64 -128 16 -128
WIRE 240 -128 64 -128
WIRE 400 -128 288 -128
WIRE 464 -128 400 -128
WIRE 496 -128 464 -128
WIRE 624 -128 560 -128
WIRE -448 -112 -448 -128
WIRE -240 -96 -240 -128
WIRE -288 -80 -288 -128
WIRE -112 -64 -112 -128
WIRE 64 -64 64 -128
WIRE 288 -64 288 -128
WIRE 400 -64 400 -128
WIRE 624 -64 624 -128
WIRE 240 -48 240 -128
WIRE -448 0 -448 -32
WIRE -288 0 -288 -32
WIRE -240 16 -240 -16
WIRE 240 32 240 0
WIRE 288 32 288 16
WIRE 400 32 400 16
WIRE 624 32 624 16
WIRE -112 48 -112 16
WIRE 64 48 64 16
SYMBOL res -128 -80 R0
SYMATTR InstName R1
SYMATTR Value {R1/2}
SYMBOL g -240 -112 R0
SYMATTR InstName G1
SYMATTR Value {2/R1}
SYMBOL res 384 -80 R0
SYMATTR InstName R3
SYMATTR Value .1
SYMBOL ind 48 -80 R0
WINDOW 0 59 45 Bottom 2
WINDOW 3 61 50 Top 2
WINDOW 123 102 107 Bottom 2
SYMATTR InstName L1
SYMATTR Value {L1}
SYMATTR Value2 Cpar={C1}
SYMBOL res 32 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R1/2}
SYMBOL Misc\\jumper 528 -192 R0
SYMATTR InstName J2
SYMBOL voltage -448 -128 R0
WINDOW 0 35 41 Left 2
WINDOW 123 33 80 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMBOL g 288 -80 R0
SYMATTR InstName G2
SYMATTR Value {10*H}
SYMBOL res 608 -80 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL Misc\\jumper -352 -192 M0
SYMATTR InstName J1
FLAG 64 48 0
FLAG -112 48 0
FLAG -240 16 0
FLAG -288 0 0
FLAG 240 32 0
FLAG 288 32 0
FLAG 400 32 0
FLAG 464 -128 2
FLAG -288 -128 1
FLAG -448 0 0
FLAG 624 32 0
TEXT -96 136 Left 2 !.param f0= 1k Q=0.5
TEXT -264 176 Left 2 !.param R1=1k
TEXT -440 296 Left 2 !.param L1=1/(C1*(2*pi*f0)**2)
TEXT -432 136 Left 2 ;f0 and Q set by parameters
TEXT -432 176 Left 2 ;R1 is arbitary
TEXT -328 -200 Left 2 ;This version puts 1/2 the R1 resistance in the capacitor
TEXT -440 256 Left 2 !.param C1=Q/(R1*2*pi*f0)
TEXT 576 -144 Left 2 ;Vout
TEXT -400 -144 Right 2 ;Vin
TEXT -432 216 Left 2 ;The parameter "H" sets the midband gain
TEXT 64 216 Left 2 !.param H=1
TEXT -440 336 Left 2 !.ac dec 101 100 10k
* Z:\home\khalils\Downloads\files\data\raw_asc\1ddc805be4cb_1214.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V3 IN 0 3.75 AC 1
R1 OUT N001 4.12K
C1 OUT N001 5p
R2 N001 0 4.12K
R3 N004 N003 680
R4 N003 N002 680
C2 N004 0 150p
C3 OUT N003 200p
R5 N002 IN 680
C4 N002 0 390p
XU1 N004 N001 +V 0 OUT LT1213 ;pnba In+)In-)V+)V-)OUT
* Single Supply 3-Pole 1MHz Filter
.ac oct 100 1K 10Meg
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1214.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 176 0 144 0
WIRE 304 0 240 0
WIRE -224 48 -224 32
WIRE 48 96 32 96
WIRE 144 96 144 0
WIRE 144 96 128 96
WIRE 176 96 144 96
WIRE 304 96 304 0
WIRE 304 96 256 96
WIRE -224 144 -224 128
WIRE 192 208 192 192
WIRE 144 224 144 96
WIRE 160 224 144 224
WIRE 304 240 304 96
WIRE 304 240 224 240
WIRE 320 240 304 240
WIRE -240 256 -384 256
WIRE -144 256 -160 256
WIRE -112 256 -144 256
WIRE -16 256 -32 256
WIRE 0 256 -16 256
WIRE 112 256 80 256
WIRE 160 256 112 256
WIRE -384 272 -384 256
WIRE -144 272 -144 256
WIRE 112 272 112 256
WIRE 192 288 192 272
WIRE 112 352 112 336
WIRE -384 368 -384 352
WIRE -144 368 -144 336
WIRE -16 384 -16 256
WIRE 192 384 -16 384
WIRE 304 384 304 240
WIRE 304 384 256 384
FLAG -224 144 0
FLAG 192 192 +V
FLAG -224 32 +V
FLAG -384 368 0
FLAG 192 288 0
FLAG 32 96 0
FLAG 112 352 0
FLAG -144 368 0
FLAG 320 240 OUT
FLAG -384 256 IN
SYMBOL voltage -224 32 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -384 256 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value 3.75
SYMBOL res 272 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 4.12K
SYMBOL cap 240 -16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 5p
SYMBOL res 144 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.12K
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 680
SYMBOL res -16 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 680
SYMBOL cap 96 272 R0
SYMATTR InstName C2
SYMATTR Value 150p
SYMBOL cap 256 368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 200p
SYMBOL res -144 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 680
SYMBOL cap -160 272 R0
SYMATTR InstName C4
SYMATTR Value 390p
SYMBOL opamps\\LT1214 192 176 R0
SYMATTR InstName U1
TEXT 16 -48 Bottom 2 ;Single Supply 3-Pole 1MHz Filter
TEXT -128 424 Left 2 !.ac oct 100 1K 10Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\24fae5d7ee28_differential.asc
* Generated by LTspice 26.0.1 for Windows.
Q6 N005 N005 vcc- 0 NPN
R1 vcc N005 100k
Q5 N004 N005 vcc- 0 NPN
V3 in 0 SINE(0 0.460 1k)
V1 vcc 0 30
Q1 N001 in N004 0 NPN
Q2 N002 N003 N004 0 NPN
R4 N002 N003 2.88k
R2 out 0 450k
R3 0 N003 1k
Q3 N001 N001 vcc 0 PNP
C1 out N002 100n
Q4 N002 N001 vcc 0 PNP
V2 vcc- 0 -30
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran {t}
.param f = 1k n=16 t=n/f
.four {f} 10 8 V(out)
.meas TRAN power_Output AVG I(R_load)*V(Out) TRIG time=0 TARG time={t}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 -64 160 -64
WIRE 320 -64 240 -64
WIRE 160 -32 160 -64
WIRE 320 -32 320 -64
WIRE 240 16 224 16
WIRE 256 16 240 16
WIRE 320 80 320 64
WIRE 400 80 320 80
WIRE 464 80 400 80
WIRE 544 80 528 80
WIRE 160 96 160 64
WIRE 240 96 240 16
WIRE 240 96 160 96
WIRE 160 112 160 96
WIRE 320 112 320 80
WIRE 96 160 48 160
WIRE 400 160 384 160
WIRE 432 160 400 160
WIRE 528 160 512 160
WIRE 576 160 528 160
WIRE 576 192 576 160
WIRE 160 320 160 208
WIRE 240 320 160 320
WIRE 320 320 320 208
WIRE 320 320 240 320
WIRE 144 336 48 336
WIRE 48 352 48 336
WIRE 240 352 240 320
WIRE 144 400 144 336
WIRE 144 400 112 400
WIRE 176 400 144 400
SYMBOL npn 96 112 R0
SYMATTR InstName Q1
SYMBOL pnp 224 64 R180
SYMATTR InstName Q3
SYMBOL npn 384 112 M0
SYMATTR InstName Q2
SYMBOL voltage -640 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 30
SYMBOL npn 112 352 M0
SYMATTR InstName Q6
SYMBOL res 512 64 R0
SYMATTR InstName R2
SYMATTR Value 450k
SYMBOL res 528 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 384 64 R0
SYMATTR InstName R4
SYMATTR Value 2.88k
SYMBOL res 32 240 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL npn 176 352 R0
SYMATTR InstName Q5
SYMBOL cap 528 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL pnp 256 64 M180
SYMATTR InstName Q4
SYMBOL voltage -528 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -30
SYMBOL voltage -640 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 0.460 1k)
FLAG 544 80 out
FLAG -640 -16 0
FLAG -528 -16 0
FLAG -640 -96 vcc
FLAG -528 -96 vcc-
FLAG 240 -64 vcc
FLAG 576 192 0
FLAG 48 160 in
FLAG -640 144 0
FLAG -640 64 in
FLAG 48 448 vcc-
FLAG 240 448 vcc-
FLAG 48 256 vcc
TEXT -672 496 Left 2 !.tran {t}
TEXT -320 -112 Left 2 !.param f = 1k n=16 t=n/f
TEXT -320 -72 Left 2 !.four {f} 10 8 V(out)
TEXT -320 -144 Left 2 !.meas TRAN power_Output AVG I(R_load)*V(Out) TRIG time=0 TARG time={t}