Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\07b2f6ebb731_Series_Voltage_Regulator_1.asc
* Generated by LTspice 26.0.1 for Windows.
D1 0 N003 EDZV6_2B
R2 N002 0 10K
V1 N001 0 10V
R1 N003 N001 1000
Q1 N001 N003 N002 0 2N2222
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0V 20V 1V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -176 32
WIRE 80 32 -32 32
WIRE 320 32 176 32
WIRE 320 112 320 32
WIRE -32 128 -32 32
WIRE 128 128 128 96
WIRE 128 128 48 128
WIRE -176 144 -176 32
WIRE 128 176 128 128
WIRE -176 240 -176 208
WIRE 128 240 -176 240
WIRE 320 240 320 192
WIRE 320 240 128 240
WIRE 128 304 128 240
SYMBOL res 304 96 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL zener 144 240 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value EDZV6_2B
SYMBOL npn 80 96 R270
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL Misc\\cell -176 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10V
SYMBOL res 64 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1000
FLAG 128 304 0
TEXT -392 240 Left 2 !.dc V1 0V 20V 1V
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1613.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1613.asy)
V1 N001 0 3.3
L1 N001 N002 4.7 Rser=0.02 Rpar=5000
C1 OUT 0 22 Rser=0.02
Rload OUT 0 25
R2 N003 0 121K
XU1 N002 0 N003 N001 N001 LT1613 ;pnba SW)GND)FB)_SHDN)Vin
D1 N002 OUT MBRS140
R1 OUT N003 374K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LT1613.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1396 936
WIRE 416 464 304 464
WIRE 512 464 416 464
WIRE 560 464 512 464
WIRE 672 464 640 464
WIRE 720 464 672 464
WIRE 864 464 784 464
WIRE 976 464 864 464
WIRE 1072 464 976 464
WIRE 304 480 304 464
WIRE 976 480 976 464
WIRE 1072 480 1072 464
WIRE 864 512 864 464
WIRE 512 560 512 464
WIRE 672 560 672 464
WIRE 304 576 304 560
WIRE 976 576 976 544
WIRE 1072 576 1072 560
WIRE 416 656 416 464
WIRE 432 656 416 656
WIRE 864 656 864 592
WIRE 864 656 752 656
WIRE 864 672 864 656
WIRE 592 768 592 752
WIRE 864 768 864 752
SYMBOL IND 544 480 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL RES 848 496 R0
SYMATTR InstName R1
SYMATTR Value 374K
SYMBOL POWERPRODUCTS\\LT1613 592 656 R0
WINDOW 0 0 -120 Center 2
WINDOW 3 46 113 Left 2
SYMATTR InstName U1
SYMBOL POLCAP 960 480 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine Rser=0.02
SYMBOL SCHOTTKY 720 480 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL RES 848 656 R0
SYMATTR InstName R2
SYMATTR Value 121K
SYMBOL res 1056 464 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL VOLTAGE 304 464 R0
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG 1072 464 OUT
FLAG 864 768 0
FLAG 976 576 0
FLAG 1072 576 0
FLAG 592 768 0
FLAG 304 576 0
TEXT 888 816 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0f56ab335a3d_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
* NMOS Output Characteristics
M1 N001 N002 0 0 TSMC35N l=0.5u w=5u
V1 N002 0 1.65V
V2 N001 0 3.3V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include /home/akash/.wine/dosdevices/c:/users/akash/Desktop/ActiveFiltersPractice/tsmc035.lib
.dc V2 0 3.3 0.001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1052 680
WIRE 544 208 384 208
WIRE 384 288 384 208
WIRE 544 304 544 208
WIRE 464 336 384 336
WIRE 240 368 208 368
WIRE 336 368 320 368
WIRE 384 400 384 384
WIRE 464 400 464 336
WIRE 464 400 384 400
WIRE 208 448 208 368
WIRE 256 448 208 448
WIRE 384 448 384 400
WIRE 544 448 544 384
SYMBOL voltage 336 368 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value 1.65V
SYMBOL nmos4 336 288 R0
WINDOW 0 51 66 Left 2
WINDOW 3 49 29 Left 2
SYMATTR InstName M1
SYMATTR Value TSMC35N
SYMATTR Value2 l=0.5u w=5u
SYMBOL voltage 544 288 R0
SYMATTR InstName V2
SYMATTR Value 3.3V
FLAG 256 448 0
FLAG 384 448 0
FLAG 544 448 0
TEXT -112 16 Left 2 !.include /home/akash/.wine/dosdevices/c:/users/akash/Desktop/ActiveFiltersPractice/tsmc035.lib
TEXT 344 616 Left 2 !.dc V2 0 3.3 0.001
TEXT 288 568 Left 2 ;NMOS Output Characteristics
* Z:\home\khalils\Downloads\files\data\raw_asc\1e9c7087c5e6_1843.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1843.asy)
V2 N002 0 PULSE(0 3.3 0 .5m .5m 0 1m)
R1 N001 N003 10K
V1 N001 0 5
XU1 N004 0 N002 N002 N006 N005 N001 N003 LTC1843 ;pnba OUTA)GND)INA+)INB-)Hyst)Ref)Vcc)OUTB
R2 N001 N004 10K
.tran 3m
.lib LTC1843.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1264 800
WIRE 928 64 736 64
WIRE 1040 64 928 64
WIRE 1136 64 1040 64
WIRE 736 80 736 64
WIRE 1040 80 1040 64
WIRE 1136 80 1136 64
WIRE 928 112 928 64
WIRE 848 160 816 160
WIRE 736 176 736 160
WIRE 1040 176 1040 160
WIRE 1040 176 1008 176
WIRE 560 240 528 240
WIRE 816 240 816 160
WIRE 816 240 640 240
WIRE 848 240 816 240
WIRE 1136 256 1136 160
WIRE 1136 256 1008 256
WIRE 848 304 832 304
WIRE 976 400 976 384
WIRE 880 416 880 384
SYMBOL res 1120 64 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 1024 64 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 656 240 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0 .5m .5m 0 1m)
SYMATTR InstName V2
SYMBOL Comparators\\LTC1843 928 240 R0
SYMATTR InstName U1
SYMBOL voltage 736 64 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 736 176 0
FLAG 528 240 0
FLAG 880 416 0
TEXT 1120 344 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\68fb78ea5166_09A-16.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 Vout N001 0 0 2N3904
V1 Vin 0
R1 Vout Vin 100
D1 N001 Vout 1N750
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 10 0.001
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 16 128 -32 128
WIRE 96 128 16 128
WIRE 208 128 176 128
WIRE 336 128 208 128
WIRE 384 128 336 128
WIRE -32 176 -32 128
WIRE 208 192 208 128
WIRE 336 208 336 128
WIRE 272 256 208 256
WIRE 336 320 336 304
SYMBOL diode 224 256 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N750
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 192 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage -32 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL npn 272 208 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
FLAG 336 320 0
FLAG -32 256 0
FLAG 384 128 Vout
FLAG 16 128 Vin
TEXT -24 312 Left 2 !.dc V1 0 10 0.001
* Z:\tmp\asc_dec_bjh7r6w2\037613c107d3_NE55501fig_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
RL N001 N005 {RL}
RB N002 N004 {RB}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 -64 -16 -64
WIRE 384 -64 64 -64
WIRE 512 -64 384 -64
WIRE 688 -64 512 -64
WIRE 512 -16 512 -64
WIRE -16 32 -16 -64
WIRE 512 80 512 64
WIRE 512 80 432 80
WIRE 512 96 512 80
WIRE 128 112 96 112
WIRE 384 112 384 -64
WIRE 384 112 352 112
WIRE 688 128 688 -64
WIRE 128 176 96 176
WIRE 432 176 432 80
WIRE 432 176 352 176
WIRE 512 208 512 176
WIRE 512 208 464 208
WIRE -16 240 -16 112
WIRE 464 240 464 208
WIRE 464 240 352 240
WIRE 512 240 512 208
WIRE 64 304 64 -64
WIRE 96 368 96 176
WIRE 464 368 464 240
WIRE 688 384 688 208
SYMBOL res -32 16 R0
WINDOW 0 -55 38 Left 2
WINDOW 3 -68 67 Left 2
SYMATTR InstName RL
SYMATTR Value {RL}
SYMBOL res 496 80 R0
SYMATTR InstName RB
SYMATTR Value {RB}
FLAG 96 112 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3539-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3539-2.asy)
C2 OUT N002 22p
V1 IN 0 2
R1 OUT N002 1Meg
XU1 N001 0 0 IN IN N002 IN OUT LTC3539-2 ;pnba SW)PGND)GND)Vin)_SHDN)FB)Mode)Vout
R2 N002 0 562K
Rload OUT 0 5.5
C1 OUT 0 22 Rser=1m
L1 IN N001 2.7 Rser=5m Rpar=5K
.tran 750u startup
.lib LTC3539-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 64 -128 64
WIRE 80 64 -32 64
WIRE 288 64 160 64
WIRE -128 80 -128 64
WIRE -32 144 -32 64
WIRE -16 144 -32 144
WIRE 288 144 288 64
WIRE 288 144 272 144
WIRE -128 176 -128 160
WIRE -32 240 -32 144
WIRE -16 240 -32 240
WIRE 304 240 272 240
WIRE 384 240 304 240
WIRE 496 240 384 240
WIRE 576 240 496 240
WIRE 304 256 304 240
WIRE 384 256 384 240
WIRE 576 256 576 240
WIRE 496 272 496 240
WIRE -32 336 -32 240
WIRE -16 336 -32 336
WIRE 304 336 304 320
WIRE 304 336 272 336
WIRE 384 336 304 336
WIRE 384 352 384 336
WIRE 496 352 496 336
WIRE 576 352 576 336
WIRE -16 432 -32 432
WIRE 288 432 272 432
WIRE 384 448 384 432
SYMBOL res 560 240 R0
SYMATTR InstName Rload
SYMATTR Value 5.5
SYMBOL ind 64 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.7
SYMATTR SpiceLine Rser=5m Rpar=5K
SYMBOL res 368 240 R0
WINDOW 3 28 84 Left 2
SYMATTR Value 1Meg
SYMATTR InstName R1
SYMBOL res 368 336 R0
WINDOW 3 29 81 Left 2
SYMATTR Value 562K
SYMATTR InstName R2
SYMBOL voltage -128 64 R0
WINDOW 0 20 15 Left 2
WINDOW 3 25 97 Left 2
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL cap 288 256 R0
SYMATTR InstName C2
SYMATTR Value 22p
SYMBOL PowerProducts\\LTC3539-2 128 288 R0
SYMATTR InstName U1
SYMBOL cap 480 272 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine Rser=1m
FLAG -128 176 0
FLAG -32 432 0
FLAG 384 448 0
FLAG 496 352 0
FLAG 576 352 0
FLAG 288 432 0
FLAG 576 240 OUT
FLAG -128 64 IN
TEXT 424 480 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4084-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4084-2.asy)
R2 N001 0 10k
V2 V+ 0 15
R3 N002 0 10k
R1 N002 N001 10k
V3 0 V- 15
V1 N003 0 SINE(0 1 1k)
XU1 N003 N001 V+ V- N002 ADA4084-2 ;pnba In+)In-)V+)V-)OUT
.tran 5m
.lib ADA4084-2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 32 -16 32
WIRE 160 32 128 32
WIRE 208 32 160 32
WIRE 368 32 288 32
WIRE -16 80 -16 32
WIRE -192 96 -192 64
WIRE 160 144 160 32
WIRE 208 144 160 144
WIRE 368 160 368 32
WIRE 368 160 272 160
WIRE 432 160 368 160
WIRE 208 176 96 176
WIRE 432 192 432 160
WIRE -192 208 -192 176
WIRE -112 208 -192 208
WIRE 96 208 96 176
WIRE -112 224 -112 208
WIRE -192 240 -192 208
WIRE 96 336 96 288
WIRE 432 336 432 272
WIRE -192 368 -192 320
SYMBOL res 304 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 96 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1k)
SYMBOL res 416 176 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 144 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL ADA4084-2 240 96 R0
SYMATTR InstName U1
SYMBOL voltage -192 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage -192 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15
FLAG 96 336 0
FLAG 432 336 0
FLAG -16 80 0
FLAG 240 128 V+
FLAG 240 192 V-
FLAG -112 224 0
FLAG -192 64 V+
FLAG -192 368 V-
TEXT 480 384 Left 2 !.tran 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1443.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1443.asy)
V1 N001 0 3.3
V2 IN 0 PULSE(1 1.3 0 50m 50m 0 100m)
XU1 OUT N001 IN N002 N002 0 0 LTC1443 ;pnba OUT)V+)In-)In+)REF)V-)GND
.tran 300m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1144 800
WIRE 832 112 576 112
WIRE 832 128 832 112
WIRE 576 144 576 112
WIRE 192 192 176 192
WIRE 384 192 272 192
WIRE 512 192 384 192
WIRE 688 208 640 208
WIRE 512 224 496 224
WIRE 832 224 832 208
WIRE 496 288 496 224
WIRE 512 288 496 288
WIRE 544 368 544 336
WIRE 608 368 608 336
SYMBOL voltage 832 112 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL Comparators\\LTC1443 576 144 R0
SYMATTR InstName U1
SYMBOL voltage 288 192 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(1 1.3 0 50m 50m 0 100m)
SYMATTR InstName V2
FLAG 832 224 0
FLAG 176 192 0
FLAG 608 368 0
FLAG 544 368 0
FLAG 688 208 OUT
FLAG 384 192 IN
TEXT 704 392 Left 2 !.tran 300m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1612.asc
* Generated by LTspice 26.0.1 for Windows.
V1 vS 0 SINE(0 5 20)
R1 vD 0 301
V2 vIN 0 PULSE(0 2.5 20n 20n 20n 150m 300m)
C1 vD 0 36p
V3 v+ 0 5
V4 v- 0 -5
XU1 vIN vS vD v- v+ 0 ADG1612 ;pnba IN)S)D)Vss)Vdd)GND
.tran 1
* Note:\nSwitch shown for a logic 0 input\nPin capacitance and Qinj not included\nParameter performance modeled at 5V supply\nOny one channel is modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1612.asy)
.lib ADG1612.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 832
WIRE 256 112 240 112
WIRE 240 144 240 112
WIRE -80 224 -112 224
WIRE 112 224 0 224
WIRE 144 224 112 224
WIRE 368 224 336 224
WIRE 416 224 368 224
WIRE 528 224 416 224
WIRE 416 256 416 224
WIRE 528 256 528 224
WIRE 112 288 48 288
WIRE 144 288 112 288
WIRE -272 304 -288 304
WIRE -176 304 -192 304
WIRE -288 336 -288 304
WIRE -192 336 -192 304
WIRE 48 336 48 288
WIRE 416 352 416 336
WIRE 528 352 528 320
WIRE 304 416 304 400
WIRE 176 432 176 400
WIRE 192 432 176 432
WIRE -288 464 -288 416
WIRE -192 464 -192 416
WIRE 48 464 48 416
FLAG -112 224 0
FLAG 48 464 0
FLAG 416 352 0
FLAG 304 416 0
FLAG 368 224 vD
FLAG 112 224 vS
FLAG 112 288 vIN
FLAG 528 352 0
FLAG -272 304 v+
FLAG 256 112 v+
FLAG -288 464 0
FLAG -192 464 0
FLAG -176 304 v-
FLAG 192 432 v-
SYMBOL voltage 16 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 20)
SYMBOL res 400 240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage 48 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 30 177 Left 2
SYMATTR Value PULSE(0 2.5 20n 20n 20n 150m 300m)
SYMATTR InstName V2
SYMBOL cap 512 256 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -288 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -5
SYMBOL ADG1612 240 272 R0
SYMATTR InstName U1
TEXT 80 528 Left 2 !.tran 1
TEXT -360 -40 Left 2 ;Note:\nSwitch shown for a logic 0 input\nPin capacitance and Qinj not included\nParameter performance modeled at 5V supply\nOny one channel is modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3204-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3204-3.3.asy)
C2 OUT 0 2.2
XU1 0 IN OUT N001 N002 IN LTC3204-3.3 ;pnba GND)Vin)Vout)C+)C-)_SHDN
V1 IN 0 2.4
C1 N001 N002 2.2
Rload OUT 0 100
.tran 1m startup
.lib LTC3204-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 160 -96 160
WIRE 16 160 0 160
WIRE 384 160 272 160
WIRE 480 160 384 160
WIRE -96 176 -96 160
WIRE 384 176 384 160
WIRE 480 176 480 160
WIRE 0 240 0 160
WIRE 16 240 0 240
WIRE 304 240 272 240
WIRE 384 272 384 240
WIRE 480 272 480 256
WIRE -96 288 -96 256
WIRE 16 320 0 320
WIRE 304 320 304 304
WIRE 304 320 272 320
SYMBOL cap 368 176 R0
SYMATTR InstName C2
SYMATTR Value 2.2
SYMBOL PowerProducts\\LTC3204-3.3 144 240 R0
SYMATTR InstName U1
SYMBOL cap 288 240 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL res 464 160 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL voltage -96 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.4
FLAG 384 272 0
FLAG 480 272 0
FLAG 0 320 0
FLAG -96 288 0
FLAG -96 160 IN
FLAG 480 160 OUT
TEXT 384 320 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD4008.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\AD4008.asy)
V3 N002 0 1.8
R1 IN N003 10
C1 0 Vout 10p
XU1 N001 N002 IN MP_01 0 N004 MP_02 MP_03 Vout AD4008 EN_Hi_Z=1 ;pnba REF)Vdd)IN))GND)CNV)))Vout
V2 N001 0 5
V1 N003 0 PWL(0 0 100u 5)
V4 N004 0 PULSE(0 1.8 227n 0.1n 0.1n 40n 2u)
.tran 110u
.lib AD4008.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1252
WIRE 704 208 368 208
WIRE 832 208 784 208
WIRE 368 288 368 208
WIRE 704 336 496 336
WIRE 832 336 784 336
WIRE -144 432 -208 432
WIRE -16 432 -64 432
WIRE 96 432 64 432
WIRE 128 432 96 432
WIRE 544 432 496 432
WIRE 576 432 544 432
WIRE 672 432 640 432
WIRE 704 528 496 528
WIRE 832 528 784 528
WIRE 368 608 368 576
SYMBOL cap 640 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 688 336 R270
WINDOW 0 47 41 VRight 2
WINDOW 3 -44 39 VRight 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 1.8
SYMBOL voltage -48 432 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 100u 5)
SYMBOL voltage 688 208 R270
WINDOW 0 45 70 VLeft 2
WINDOW 3 -46 68 VLeft 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 80 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL AD4008 400 432 R0
SYMATTR InstName U1
SYMBOL voltage 688 528 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 1.8 227n 0.1n 0.1n 40n 2u)
FLAG 368 608 0
FLAG 832 336 0
FLAG -208 432 0
FLAG 672 432 0
FLAG 832 528 0
FLAG 832 208 0
FLAG 96 432 IN
FLAG 544 432 Vout
TEXT 208 616 Left 2 !.tran 110u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADGS2414D.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input\nQinj not included\nSPI functionality is not modelled\nOny one channel is modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADGS2414D.asy)
XU1 vIN vD vS v- 0 v+ ADGS2414D ;pnba IN)D)S)Vss)GND)Vdd
V1 vS 0 SINE(0 10 20)
V2 vIN 0 PULSE(0 2.5 20n 20n 20n 150m 300m)
R1 vD 0 301
C1 vD 0 36p
V3 v+ 0 15
V4 v- 0 -15
.tran 1
.lib ADGS2414D.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 832
WIRE 240 160 240 128
WIRE -80 224 -112 224
WIRE 112 224 0 224
WIRE 144 224 112 224
WIRE 384 224 336 224
WIRE 464 224 384 224
WIRE 576 224 464 224
WIRE 464 256 464 224
WIRE 576 256 576 224
WIRE 112 288 48 288
WIRE 144 288 112 288
WIRE -288 336 -288 304
WIRE -192 336 -192 304
WIRE 48 336 48 288
WIRE 464 352 464 336
WIRE 576 352 576 320
WIRE 288 416 288 400
WIRE 192 432 192 400
WIRE -288 464 -288 416
WIRE -192 464 -192 416
WIRE 48 464 48 416
SYMBOL ADGS2414D 240 272 R0
SYMATTR InstName U1
SYMBOL voltage -288 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL voltage 16 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 20)
SYMBOL cap 560 256 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL res 448 240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage 48 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 30 177 Left 2
SYMATTR Value PULSE(0 2.5 20n 20n 20n 150m 300m)
SYMATTR InstName V2
SYMBOL voltage -192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -15
FLAG -112 224 0
FLAG 48 464 0
FLAG 464 352 0
FLAG 288 416 0
FLAG 384 224 vD
FLAG 112 224 vS
FLAG 112 288 vIN
FLAG 576 352 0
FLAG -288 304 v+
FLAG 240 128 v+
FLAG -288 464 0
FLAG -192 464 0
FLAG -192 304 v-
FLAG 192 432 v-
TEXT 80 528 Left 2 !.tran 1
TEXT -288 8 Left 2 ;Note:\nSwitch shown for a logic 0 input\nQinj not included\nSPI functionality is not modelled\nOny one channel is modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5689R.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5689R.asy)
I1 0 0 100 AC 1
V1 Vdd 0 5
CLOAD vOUT 0 10n
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
XU1 vDAC Vdd 0 vOUT AD5689R Gain=2 ;pnba Vdac)Vdd)GND)Vout
Vdac1 NC_01 0 1.25
.tran 200u
.lib AD5689R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 272 112 192 112
WIRE 464 112 272 112
WIRE -800 144 -800 112
WIRE 272 160 272 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL AD5689R -208 112 R0
SYMATTR InstName U1
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 100
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2