Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX38912.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX38912.asy)
R1 OUT 0 3.6
V1 IN 0 2.1
R2 OUT N003 604k
XU1 IN OUT IN N003 N002 N001 IN 0 MAX38912 ;pnba IN)OUT)EN)FB)POK)BYP)MODE)GND
C3 OUT 0 4.7
R3 N003 0 301k
R4 IN N002 100k
C2 OUT N001 10n
.tran 0.8 startup
.lib MAX38912.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1988 1664
WIRE -80 1104 -144 1104
WIRE -32 1104 -80 1104
WIRE 80 1104 -32 1104
WIRE 96 1104 80 1104
WIRE 352 1104 320 1104
WIRE 432 1104 352 1104
WIRE 544 1104 432 1104
WIRE 592 1104 544 1104
WIRE 640 1104 592 1104
WIRE -144 1120 -144 1104
WIRE 352 1120 352 1104
WIRE 544 1120 544 1104
WIRE 640 1120 640 1104
WIRE -32 1136 -32 1104
WIRE 432 1152 432 1104
WIRE 80 1200 80 1104
WIRE 96 1200 80 1200
WIRE 352 1200 352 1184
WIRE 352 1200 320 1200
WIRE -144 1216 -144 1200
WIRE 544 1216 544 1184
WIRE 640 1216 640 1200
WIRE -32 1280 -32 1216
WIRE 96 1280 -32 1280
WIRE 432 1280 432 1232
WIRE 432 1280 320 1280
WIRE 432 1312 432 1280
WIRE -80 1344 -80 1104
WIRE 96 1344 -80 1344
WIRE 208 1424 208 1392
WIRE 432 1424 432 1392
SYMBOL cap 528 1120 R0
SYMATTR InstName C3
SYMATTR Value 4.7
SYMBOL res -48 1120 R0
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL res 624 1104 R0
SYMATTR InstName R1
SYMATTR Value 3.6
SYMBOL cap 336 1120 R0
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -144 1104 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.1
SYMBOL res 416 1296 R0
SYMATTR InstName R3
SYMATTR Value 301k
SYMBOL res 416 1136 R0
SYMATTR InstName R2
SYMATTR Value 604k
SYMBOL MAX38912 208 1184 R0
SYMATTR InstName U1
FLAG -144 1216 0
FLAG -144 1104 IN
FLAG 544 1216 0
FLAG 640 1216 0
FLAG 592 1104 OUT
FLAG 432 1424 0
FLAG 208 1424 0
TEXT 112 1464 Left 2 !.tran 0.8 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\14f9c003e5b2_Q1b.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vout N003 1k
V3 N002 0 SINE(0 10 500)
D_ideal N001 P001 D_ideal D
V2 N003 0 2
R4 Vout P002 1k
R2 Vout P001 1k
R3 Vout N004 1k
D_ideal1 N002 P002 D_ideal D
V1 N001 0 SINE(0 10 500)
V4 0 N004 2
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model D_ideal D(Ron=0.1n Roff=1G Vfwd=0)
.tran .02
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 680
WIRE 80 80 32 80
WIRE 320 80 224 80
WIRE 416 80 320 80
WIRE 736 80 688 80
WIRE 976 80 880 80
WIRE 1072 80 976 80
WIRE 320 96 320 80
WIRE 976 96 976 80
WIRE 32 208 32 80
WIRE 320 208 320 176
WIRE 688 208 688 80
WIRE 976 208 976 176
WIRE 32 352 32 288
WIRE 320 352 320 288
WIRE 688 352 688 288
WIRE 976 352 976 288
IOPIN 416 80 Out
IOPIN 1072 80 Out
SYMBOL res 304 80 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 736 96 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D_ideal1
SYMATTR SpiceModel D_ideal
SYMBOL voltage 976 304 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 2
SYMBOL voltage 32 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 500)
SYMBOL voltage 320 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 2
SYMBOL res 960 80 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 896 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL voltage 688 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 10 500)
SYMBOL diode 80 96 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D_ideal
SYMATTR SpiceModel D_ideal
SYMBOL res 240 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 32 352 0
FLAG 320 352 0
FLAG 416 80 Vout
FLAG 688 352 0
FLAG 976 352 0
FLAG 1072 80 Vout
TEXT 32 408 Left 2 !.model D_ideal D(Ron=0.1n Roff=1G Vfwd=0)
TEXT -2 428 Left 2 !.tran .02
* Z:\home\khalils\Downloads\files\data\raw_asc\08e96ae65e70_nor2tg.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Y N001 N003 Vdd PMOS
M5 Vdd N001 N004 Vdd PMOS
M3 Y N004 N003 0 NMOS
M7 N003 N002 0 0 NMOS
M6 N004 N001 0 0 NMOS
M8 Vdd N002 N003 Vdd PMOS
V2 N001 0 PULSE(0 5 0 10us 10us 2ms 4ms)
V3 N002 0 PULSE(0 5 0 10us 10us 1ms 2ms)
M2 Y N004 0 Vdd PMOS
V1 Vdd 0 5
M4 Y N001 0 0 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 4ms 10us
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 -288 -224 -288
WIRE -96 -208 -176 -208
WIRE 0 -208 -96 -208
WIRE 0 -192 0 -208
WIRE 176 -192 176 -288
WIRE -48 -112 -64 -112
WIRE 256 -112 256 -144
WIRE 368 -112 256 -112
WIRE 416 -112 368 -112
WIRE -176 -96 -176 -128
WIRE 160 -96 160 -144
WIRE 160 -96 0 -96
WIRE 160 -80 160 -96
WIRE 256 -80 256 -112
WIRE -96 -64 -96 -208
WIRE -96 -64 -192 -64
WIRE -64 -32 -64 -112
WIRE -64 -32 -144 -32
WIRE -64 -16 -64 -32
WIRE -48 -16 -64 -16
WIRE 176 16 176 -32
WIRE 176 16 96 16
WIRE 16 48 -80 48
WIRE 176 64 176 16
WIRE -192 80 -192 -64
WIRE -80 80 -80 48
WIRE -80 80 -192 80
WIRE -32 128 -64 128
WIRE 160 128 160 112
WIRE 160 128 128 128
WIRE 256 128 256 112
WIRE 368 128 368 -112
WIRE 368 128 256 128
WIRE -224 144 -224 -288
WIRE -128 144 -224 144
WIRE 96 144 96 16
WIRE 96 144 16 144
WIRE 16 160 16 144
WIRE -128 176 -128 144
WIRE -64 176 -64 128
WIRE -64 176 -128 176
WIRE 160 176 160 128
WIRE 256 176 256 128
WIRE -64 240 -64 176
WIRE -32 240 -64 240
WIRE -224 288 -224 144
WIRE 176 288 176 224
WIRE 176 288 -224 288
SYMBOL nmos4 256 -32 M270
WINDOW 0 1 -37 Left 2
WINDOW 3 -25 -14 Left 2
SYMATTR InstName M3
SYMBOL voltage -144 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 39 1 Left 2
WINDOW 3 -46 -269 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 10us 10us 1ms 2ms)
SYMBOL nmos4 -48 -96 R0
SYMATTR InstName M7
SYMBOL voltage -128 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 0 -7 Left 2
WINDOW 3 -55 158 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 10us 10us 2ms 4ms)
SYMBOL pmos4 256 -192 R90
WINDOW 0 -9 -36 Left 2
WINDOW 3 -28 -13 Left 2
SYMATTR InstName M1
SYMBOL voltage -176 -224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 28 -1 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL pmos4 -32 48 R0
SYMATTR InstName M5
SYMBOL nmos4 256 224 M270
WINDOW 0 134 -43 Left 2
WINDOW 3 -24 -20 Left 2
SYMATTR InstName M4
SYMBOL pmos4 256 64 R90
WINDOW 0 131 -48 Left 2
WINDOW 3 -27 -14 Left 2
SYMATTR InstName M2
SYMBOL pmos4 -48 -192 R0
SYMATTR InstName M8
SYMBOL nmos4 -32 160 R0
SYMATTR InstName M6
FLAG 16 256 0
FLAG -128 256 0
FLAG -144 48 0
FLAG 416 -112 Y
FLAG 0 0 0
FLAG 16 208 0
FLAG -176 -208 Vdd
FLAG 0 -144 Vdd
FLAG 208 -144 Vdd
FLAG 208 112 Vdd
FLAG 16 96 Vdd
FLAG 208 -80 0
FLAG 208 176 0
FLAG 0 -48 0
FLAG 128 128 0
FLAG -176 -96 0
TEXT 288 -144 Left 2 !.tran 0 4ms 10us
* Z:\home\khalils\Downloads\files\data\raw_asc\34766a8205cf_Assignment_5b__i_.asc
* Generated by LTspice 26.0.1 for Windows.
* Input Characteristics of Common Collector Configuration for NPN Transistor
Re N002 N001 100
Vbc N004 0 3.5
Q1 0 N003 N002 0 BC547B
Vec N001 0 15
Rb N004 N003 100000
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Vbc 0 15 1 Vec 0 5 1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -32 64 -160 64
WIRE 208 64 48 64
WIRE 400 112 272 112
WIRE 608 112 480 112
WIRE -160 224 -160 64
WIRE 608 224 608 112
WIRE -160 384 -160 304
WIRE 208 384 208 160
WIRE 208 384 -160 384
WIRE 608 384 608 304
WIRE 608 384 208 384
WIRE 208 432 208 384
SYMBOL npn 272 160 R180
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL voltage 608 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vbc
SYMATTR Value 3.5
SYMBOL res 64 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Re
SYMATTR Value 100
SYMBOL voltage -160 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vec
SYMATTR Value 15
SYMBOL res 496 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rb
SYMATTR Value 100000
FLAG 208 432 0
TEXT -192 -32 Left 2 ;Input Characteristics of Common Collector Configuration for NPN Transistor
TEXT -192 448 Left 2 !.dc Vbc 0 15 1 Vec 0 5 1
* Z:\home\khalils\Downloads\files\data\raw_asc\b187263299fc_scheme6.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1014.asy)
XU1 N006 N002 N003 N007 N005 LT1013 ;pnba In+)In-)V+)V-)OUT
V2 0 N007 {Vcc}
V1 N003 0 {Vcc}
R2 N002 N004 500
R1 N002 N001 100
Vin N001 0 DC 0
V4 N004 0 10
R3 N006 0 83.33
.param Vcc=22
.dc Vin {-1.1*Vcc} {1.1*Vcc} 0.01
.lib LT1013.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 48 32 -112 32
WIRE 176 32 128 32
WIRE 464 32 272 32
WIRE -112 48 -112 32
WIRE 464 48 464 32
WIRE 272 128 272 32
WIRE 48 144 -32 144
WIRE 176 144 176 32
WIRE 176 144 128 144
WIRE 240 144 176 144
WIRE 384 160 304 160
WIRE 464 160 464 128
WIRE 544 160 464 160
WIRE -32 176 -32 144
WIRE 240 176 192 176
WIRE 544 176 544 160
WIRE 192 192 192 176
WIRE 464 192 464 160
WIRE 192 288 192 272
WIRE 272 304 272 192
WIRE 464 304 464 272
WIRE 464 304 272 304
SYMBOL voltage -32 160 R0
SYMATTR InstName V4
SYMATTR Value 10
SYMBOL res 144 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 500
SYMBOL res 176 176 R0
WINDOW 3 -71 61 Left 2
SYMATTR InstName R3
SYMATTR Value 83.33
SYMBOL res 144 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage -112 32 R0
SYMATTR InstName Vin
SYMATTR Value DC 0
SYMBOL voltage 464 32 R0
SYMATTR InstName V1
SYMATTR Value {Vcc}
SYMBOL OpAmps\\LT1014 272 96 R0
SYMATTR InstName U1
SYMBOL voltage 464 176 R0
SYMATTR InstName V2
SYMATTR Value {Vcc}
FLAG 544 176 0
FLAG 192 288 0
FLAG -112 128 0
FLAG -32 256 0
TEXT -128 304 Left 2 !.param Vcc=22
TEXT -128 344 Left 2 !.dc Vin {-1.1*Vcc} {1.1*Vcc} 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\14fd1ddf0f99_ResistorWithTimeConstant.asc
* Generated by LTspice 26.0.1 for Windows.
Rp pwr 0 1
Bp 0 pwr I=abs(I(V1)*V(VCC))
Cp pwr 0 {CVP}
V1 vcc 0 PULSE(0 3 0 1m 1m 1k 2k)
R1 vcc 0 R={R0*(1+K1*V(pwr))}
.param CVP=TAU/1
.param TAU=5 ; sec
.param R0=10 K1=0.5
.tran 20
* Lowpass
.options plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 692
WIRE -96 288 -96 240
WIRE -96 400 -96 368
WIRE -96 560 -96 528
WIRE -96 672 -96 640
WIRE 96 240 -96 240
WIRE 96 528 -96 528
WIRE 192 240 96 240
WIRE 192 272 192 240
WIRE 192 400 192 352
WIRE 304 240 192 240
WIRE 304 288 304 240
WIRE 304 400 304 352
WIRE 304 528 96 528
WIRE 304 560 304 528
WIRE 304 672 304 640
FLAG 192 400 0
FLAG -96 400 0
FLAG 304 400 0
FLAG 304 672 0
FLAG -96 672 0
FLAG 96 240 pwr
FLAG 96 528 vcc
SYMBOL res 176 256 R0
SYMATTR InstName Rp
SYMATTR Value 1
SYMBOL bi -96 368 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName Bp
SYMATTR Value I=abs(I(V1)*V(VCC))
SYMBOL cap 288 288 R0
SYMATTR InstName Cp
SYMATTR Value {CVP}
SYMBOL voltage -96 544 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 3 0 1m 1m 1k 2k)
SYMBOL res 288 544 R0
SYMATTR InstName R1
SYMATTR Value R={R0*(1+K1*V(pwr))}
TEXT -112 8 Left 0 !.param CVP=TAU/1
TEXT -112 -32 Left 0 !.param TAU=5  ; sec
TEXT -112 48 Left 0 !.param R0=10  K1=0.5
TEXT -112 96 Left 0 !.tran 20
TEXT 184 184 Left 0 ;Lowpass
TEXT -112 128 Left 0 !.options plotwinsize=0
* Z:\home\khalils\Downloads\files\data\raw_asc\0eb0c6eecc84_Demonstration_circuit_Step_ac_BF.asc
* Generated by LTspice 26.0.1 for Windows.
* Demonstration Circuit step BF of transistor
* Step AC Transistor BF
* plot FR for different BF
* copyright Cordell Audio 12/03/2010
;op
V2 0 N006 15
I1 N005 N006 2mA
R3 N003 N005 225
R4 N004 N005 225
V1 N001 0 15
C1 N001 Vout 50pF
V3 Vin 0 SINE(0 0.1 1000 0 0 0 10) AC 1
R2 N001 Vout 2500
Q1 N002 Vin N003 0 2N5551C
R1 N001 N002 2500
Q2 Vout 0 N004 0 2N5551C
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.ac dec 10 10k 1Meg
.step NPN 2N5551C (BF) 10 100 10
.include Cordell_Mods
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 764
WIRE 160 64 0 64
WIRE 272 64 160 64
WIRE 400 64 272 64
WIRE 0 112 0 64
WIRE 160 112 160 64
WIRE 272 112 272 64
WIRE 400 144 400 64
WIRE 160 208 160 192
WIRE 208 208 160 208
WIRE 272 208 272 176
WIRE 272 208 208 208
WIRE 0 256 0 192
WIRE 160 256 160 208
WIRE 400 288 400 224
WIRE 480 288 400 288
WIRE -128 304 -176 304
WIRE -64 304 -128 304
WIRE 400 304 400 288
WIRE 400 304 224 304
WIRE 480 304 480 288
WIRE 400 352 400 304
WIRE -176 368 -176 304
WIRE 0 384 0 352
WIRE 160 384 160 352
WIRE -176 496 -176 448
WIRE 0 496 0 464
WIRE 80 496 0 496
WIRE 160 496 160 464
WIRE 160 496 80 496
WIRE 80 512 80 496
WIRE 80 624 80 592
WIRE 400 624 400 432
WIRE 400 624 80 624
SYMBOL voltage 400 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 40 43 Left 0
WINDOW 3 43 76 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL current 80 512 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 45 26 Left 0
WINDOW 3 33 64 Left 0
SYMATTR InstName I1
SYMATTR Value 2mA
SYMBOL npn -64 256 R0
WINDOW 3 26 40 Left 0
WINDOW 0 67 10 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q1
SYMBOL npn 224 256 M0
WINDOW 3 26 42 Left 0
WINDOW 0 68 13 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q2
SYMBOL res 144 96 R0
WINDOW 0 37 30 Left 0
WINDOW 3 36 62 Left 0
SYMATTR InstName R2
SYMATTR Value 2500
SYMBOL res -16 368 R0
SYMATTR InstName R3
SYMATTR Value 225
SYMBOL voltage -176 352 R0
WINDOW 3 -327 107 Left 0
WINDOW 123 33 84 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 43 43 Left 0
SYMATTR Value SINE(0 0.1 1000 0 0 0 10)
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMBOL res 144 368 R0
SYMATTR InstName R4
SYMATTR Value 225
SYMBOL res -16 96 R0
WINDOW 0 38 31 Left 0
WINDOW 3 35 63 Left 0
SYMATTR InstName R1
SYMATTR Value 2500
SYMBOL voltage 400 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 40 44 Left 0
WINDOW 3 40 79 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL cap 256 112 R0
WINDOW 3 33 46 Left 0
WINDOW 0 29 11 Left 0
SYMATTR Value 50pF
SYMATTR InstName C1
FLAG 480 304 0
FLAG -176 496 0
FLAG -128 304 Vin
FLAG 208 208 Vout
TEXT -584 96 Left 0 !;op
TEXT -584 128 Left 0 !.ac dec 10 10k 1Meg
TEXT -280 -104 Left 0 ;Demonstration Circuit step BF of transistor
TEXT -584 168 Left 0 !.step NPN 2N5551C (BF) 10 100 10
TEXT -184 -64 Left 0 ;Step AC Transistor BF
TEXT -184 -24 Left 0 ;plot FR for different BF
TEXT -584 64 Left 0 !.include Cordell_Mods
TEXT 104 720 Left 0 ;copyright Cordell Audio 12/03/2010
* Z:\home\khalils\Downloads\files\data\raw_asc\389c7d8eed7a_Experiment-1.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac dec 20 0.1 1T
* .tran 5ms
V1 N001 0 1.8
V2 N003 0 0.6
M1 N002 N003 0 0 CMOSN l=180n w=1.12u
R1 N001 N002 1k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib tsmc018.lib
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -160 -112 -304 -112
WIRE -160 -16 -160 -112
WIRE -304 0 -304 -112
WIRE -160 96 -160 64
WIRE -304 112 -304 80
WIRE -48 144 -160 144
WIRE -208 176 -304 176
WIRE -304 192 -304 176
WIRE -160 240 -160 192
WIRE -48 240 -48 144
WIRE -48 240 -160 240
WIRE -160 320 -160 240
WIRE -304 336 -304 272
SYMBOL voltage -304 176 R0
WINDOW 123 11 106 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 20 95 Left 2
SYMATTR Value 0.6
SYMATTR InstName V2
SYMBOL voltage -304 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL nmos4 -208 96 R0
SYMATTR InstName M1
SYMATTR Value CMOSN
SYMATTR Value2 l=180n w=1.12u
SYMBOL res -176 -32 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG -160 320 0
FLAG -304 112 0
FLAG -304 336 0
TEXT -624 24 Left 2 !.lib tsmc018.lib
TEXT -624 48 Left 2 !.op
TEXT -624 96 Left 2 ;.ac dec 20 0.1 1T
TEXT -624 72 Left 2 ;.tran 5ms
* Z:\home\khalils\Downloads\files\data\raw_asc\0910a6a4f16b_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N002 N001 Vcc -Vcc Vout LM741/NS ;pnba In+)In-)V+)V-)OUT
R1 0 N001 2.2k
V1 Vcc 0 12
R2 Vout N001 100k
V3 N002 0 SINE(0 1 1k)
V2 0 -Vcc 12
.include C:\Users\domin\OneDrive - VietNam National University - HCM INTERNATIONAL UNIVERSITY\Documents\LM741.MOD
.tran 5m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 988 680
WIRE -112 -128 -192 -128
WIRE -192 -64 -192 -128
WIRE -112 16 -112 -128
WIRE 208 16 64 16
WIRE -272 128 -272 112
WIRE -112 128 -112 96
WIRE -16 128 -16 16
WIRE -16 128 -112 128
WIRE 0 128 -16 128
WIRE 208 144 208 16
WIRE 208 144 64 144
WIRE 0 160 -112 160
WIRE -272 192 -272 128
WIRE -272 304 -272 272
WIRE -112 336 -112 160
WIRE -272 352 -272 304
WIRE -112 464 -112 416
WIRE -272 528 -272 432
SYMBOL voltage -272 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL voltage -272 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL OpAmps\\opamp2 32 80 R0
SYMATTR InstName U1
SYMATTR Value LM741/NS
SYMBOL voltage -112 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1k)
SYMBOL res 80 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res -128 0 R0
SYMATTR InstName R1
SYMATTR Value 2.2k
FLAG -272 304 0
FLAG -272 128 Vcc
FLAG -272 528 -Vcc
FLAG 32 112 Vcc
FLAG 32 176 -Vcc
FLAG -112 464 0
FLAG -192 -64 0
FLAG 208 144 Vout
TEXT -504 608 Left 2 !.include C:\\Users\\domin\\OneDrive - VietNam National University - HCM INTERNATIONAL UNIVERSITY\\Documents\\LM741.MOD
TEXT -504 632 Left 2 !.tran 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\21a36851d8c7_Fig_2-145_Lossy-Transmission-Line.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PULSE(0 10 10u 100n 100n 10u 40u) Rser=10
R1 OUT 0 200
O1 IN 0 OUT 0 MyLossyTline
.tran 60u
.model MyLossyTline LTRA(len=1 R=10 L=1u C=10n)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 112 64 112
WIRE 176 112 96 112
WIRE 352 112 272 112
WIRE 400 112 352 112
WIRE 64 128 64 112
WIRE 400 128 400 112
WIRE 176 144 160 144
WIRE 288 144 272 144
WIRE 160 192 160 144
WIRE 288 192 288 144
WIRE 64 224 64 208
WIRE 400 224 400 208
FLAG 64 224 0
FLAG 400 224 0
FLAG 160 192 0
FLAG 288 192 0
FLAG 352 112 OUT
FLAG 96 112 IN
SYMBOL voltage 64 112 R0
WINDOW 3 -17 148 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 24 122 Left 2
SYMATTR Value PULSE(0 10 10u 100n 100n 10u 40u)
SYMATTR SpiceLine Rser=10
SYMATTR InstName V1
SYMBOL res 384 112 R0
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL ltline 224 128 R0
SYMATTR InstName O1
SYMATTR Value MyLossyTline
TEXT 40 288 Left 2 !.tran 60u
TEXT 40 320 Left 2 !.model MyLossyTline LTRA(len=1 R=10 L=1u C=10n)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2108-1.82.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2108-1.82.asy)
C1 OUT 0 10
Rload OUT 0 5
XU1 IN IN N001 OUT 0 ADP2108-x.x Rtop=211.2K ;pnba Vin)EN)SW)FB)GND
V1 IN 0 5
L1 N001 OUT 1
.tran .5m startup
.lib ADP2108-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 144
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL ADP2108-1.82 352 224 R0
SYMATTR InstName U1
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
TEXT 552 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4649.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4649.asy)
C2 OUT 0 100 x2 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C575OX5ROJI07M" type="X5R"
XU1 N002 NC_01 N003 MP_02 MP_03 MP_04 MP_05 MP_06 N001 OUT 0 N001 MP_07 OUT MP_08 NC_09 MP_10 0 MP_11 0 MP_12 MP_13 MP_14 MP_15 NC_16 IN MP_17 MP_18 MP_19 MP_20 NC_21 NC_22 NC_23 NC_24 NC_25 MP_26 MP_27 NC_28 LTM4649 ;pnba Track/SS)COMP)FB))))))Vout_lcl)Diffp)Diffn)Diffout))Vout))Pgood))GND))Mode)))))INTVcc)Vin)))))SW)CLKout)PHmode)CLKin)FREQ)))Run
V1 IN 0 12
R1 N003 0 6.65K
C1 N002 0 .001
Rload OUT 0 .15
.tran 1m startup
.lib LTM4649.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 712
WIRE 64 -80 -48 -80
WIRE 480 -80 448 -80
WIRE 560 -80 480 -80
WIRE 688 -80 560 -80
WIRE -48 -64 -48 -80
WIRE 560 -64 560 -80
WIRE 688 -64 688 -80
WIRE 464 16 448 16
WIRE -48 32 -48 16
WIRE 560 32 560 0
WIRE 688 32 688 16
WIRE 64 112 48 112
WIRE 464 112 464 16
WIRE 464 112 448 112
WIRE 480 208 480 -80
WIRE 480 208 448 208
WIRE 464 304 448 304
WIRE -32 496 -48 496
WIRE 64 496 32 496
WIRE 464 496 448 496
WIRE 560 496 544 496
WIRE 256 672 256 656
SYMBOL voltage -48 -80 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 672 -80 R0
SYMATTR InstName Rload
SYMATTR Value .15
SYMBOL cap 544 -64 R0
WINDOW 123 30 76 Left 2
SYMATTR Value2 x2
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C575OX5ROJI07M" type="X5R"
SYMBOL res 448 512 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 6.65K
SYMBOL cap 32 480 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .001
SYMBOL PowerProducts\\LTM4649 256 256 R0
SYMATTR InstName U1
FLAG 256 672 0
FLAG -48 32 0
FLAG 48 112 0
FLAG -48 496 0
FLAG 560 496 0
FLAG 560 32 0
FLAG 688 32 0
FLAG 464 304 0
FLAG -48 -80 IN
FLAG 688 -80 OUT
TEXT 560 616 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3b3b6803f903_1477.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1477.asy)
V1 IN 0 5
Iload OUT 0 0
XU1 OUT IN IN N001 0 IN IN LTC1477 ;pnba VOUT)Vin1)Vins)EN)GND)Vin3)Vin2
V2 N001 0 5
.dc Iload 0 1.5 10m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4400 2940
WIRE 2976 992 2864 992
WIRE 3152 992 2976 992
WIRE 2864 1008 2864 992
WIRE 3152 1008 3152 992
WIRE 2976 1040 2976 992
WIRE 3008 1040 2976 1040
WIRE 2864 1104 2864 1088
WIRE 2976 1104 2976 1040
WIRE 3008 1104 2976 1104
WIRE 3376 1136 3296 1136
WIRE 3376 1152 3376 1136
WIRE 2976 1168 2976 1104
WIRE 3008 1168 2976 1168
WIRE 3008 1232 2912 1232
WIRE 2912 1248 2912 1232
WIRE 3376 1248 3376 1232
WIRE 3152 1280 3152 1264
WIRE 2912 1344 2912 1328
SYMBOL voltage 2864 992 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL LTC1477 3152 1136 R0
SYMATTR InstName U1
SYMBOL current 3376 1152 R0
WINDOW 123 24 122 Left 2
WINDOW 39 24 101 Left 2
SYMATTR InstName Iload
SYMATTR Value 0
SYMBOL voltage 2912 1232 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
FLAG 2864 1104 0
FLAG 3152 1280 0
FLAG 2912 1344 0
FLAG 3376 1248 0
FLAG 2864 992 IN
FLAG 3376 1136 OUT
TEXT 3280 1312 Left 2 !.dc Iload 0 1.5 10m