Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC7050.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC7050.asy)
Rload2 OUT2 0 100m
V5 N008 0 1
V2 N002 0 5
V3 N005 0 PULSE(0 5 0 1n 1n 100n 1u)
XU1 N002 N005 N002 0 N006 N007 N009 N002 N002 IN N001 0 N003 NC_01 NC_02 LTC7050 RTon=5m RBon=1.2m OV=14.8 ;pnba VCC)PWM1)RUN1)SGND)SW2)ISNS2)PWM2)RUN2)PVCC)VIN)SW1)PGND)ISNS1)FLTB1)FLTB2
C2 OUT2 0 200
L1 N001 OUT1 0.1
V6 N004 0 1
Rload1 OUT1 0 100m
R2 N007 N008 100
V4 N009 0 PULSE(0 5 0 1n 1n 100n 1u)
V1 IN 0 12
L2 N006 OUT2 0.1
R1 N003 N004 100
C1 OUT1 0 200
.tran 300u
.lib LTC7050.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 920 728
WIRE 192 -16 -32 -16
WIRE 560 -16 480 -16
WIRE 720 -16 640 -16
WIRE 816 -16 720 -16
WIRE -32 0 -32 -16
WIRE 720 0 720 -16
WIRE 816 0 816 -16
WIRE 160 80 48 80
WIRE 192 80 160 80
WIRE 512 80 480 80
WIRE 624 80 592 80
WIRE -32 96 -32 80
WIRE 48 96 48 80
WIRE 624 96 624 80
WIRE 720 96 720 64
WIRE 816 96 816 80
WIRE 160 176 160 80
WIRE 192 176 160 176
WIRE 48 192 48 176
WIRE 624 192 624 176
WIRE 192 272 -224 272
WIRE 560 272 480 272
WIRE 720 272 640 272
WIRE 816 272 720 272
WIRE -224 288 -224 272
WIRE 720 288 720 272
WIRE 816 288 816 272
WIRE 160 368 160 176
WIRE 192 368 160 368
WIRE 512 368 480 368
WIRE 624 368 592 368
WIRE -224 384 -224 368
WIRE 624 384 624 368
WIRE 720 384 720 352
WIRE 816 384 816 368
WIRE 192 464 -224 464
WIRE -224 480 -224 464
WIRE 624 480 624 464
WIRE 160 560 160 368
WIRE 192 560 160 560
WIRE 496 560 480 560
WIRE -224 576 -224 560
WIRE 336 624 336 608
SYMBOL voltage 48 80 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL ind 544 0 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 0.1
SYMBOL res 496 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 800 -16 R0
SYMATTR InstName Rload1
SYMATTR Value 100m
SYMBOL cap 704 0 R0
SYMATTR InstName C1
SYMATTR Value 200
SYMBOL ind 544 288 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 0.1
SYMBOL LTC7050 336 272 R0
SYMATTR InstName U1
SYMBOL voltage 624 80 R0
SYMATTR InstName V6
SYMATTR Value 1
SYMBOL voltage 624 368 R0
SYMATTR InstName V5
SYMATTR Value 1
SYMBOL res 496 384 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL res 800 272 R0
SYMATTR InstName Rload2
SYMATTR Value 100m
SYMBOL cap 704 288 R0
SYMATTR InstName C2
SYMATTR Value 200
SYMBOL voltage -224 272 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 1n 1n 100n 1u)
SYMBOL voltage -32 -16 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL voltage -224 464 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 5 0 1n 1n 100n 1u)
FLAG -32 96 0
FLAG 48 192 0
FLAG -224 384 0
FLAG 624 480 0
FLAG 496 560 0
FLAG 336 624 0
FLAG 624 192 0
FLAG 720 96 0
FLAG 720 384 0
FLAG 816 96 0
FLAG 816 384 0
FLAG -224 576 0
FLAG -32 -16 IN
FLAG 816 -16 OUT1
FLAG 816 272 OUT2
TEXT 704 568 Left 2 !.tran 300u
* Z:\home\khalils\Downloads\files\data\raw_asc\19abd5b24485_tsmcInverter_ring_osc.asc
* Generated by LTspice 26.0.1 for Windows.
C2 out2 0 2.18p
R1 vcc out1 823.7
M2 out2 out1 0 0 cmosn l=0.2u w={x}
C1 out1 0 2.18p
M1 out1 out3 0 0 cmosn l=0.2u w={x}
R2 vcc out2 823.7
M3 out3 out2 0 0 cmosn l=0.2u w={x}
V1 vcc 0 2.5
R3 vcc out3 823.7
C3 out3 0 2.18p
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include pretendTsmcModels_18.lib
.tran 0 200n 0 .1n
.options plotwinsize=0
.param x=10u
.ic V(out3)=2 ; quick startup
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 680
WIRE 976 -96 -48 -96
WIRE 64 -32 -176 -32
WIRE 432 -32 64 -32
WIRE 800 -32 432 -32
WIRE 64 0 64 -32
WIRE 432 0 432 -32
WIRE 800 0 800 -32
WIRE -176 16 -176 -32
WIRE 64 112 64 80
WIRE 144 112 64 112
WIRE 240 112 144 112
WIRE 336 112 240 112
WIRE 432 112 432 80
WIRE 512 112 432 112
WIRE 608 112 512 112
WIRE 704 112 608 112
WIRE 800 112 800 80
WIRE 880 112 800 112
WIRE 976 112 976 -96
WIRE 976 112 880 112
WIRE -176 128 -176 96
WIRE 64 160 64 112
WIRE 432 160 432 112
WIRE 800 160 800 112
WIRE 240 176 240 112
WIRE 608 176 608 112
WIRE 976 176 976 112
WIRE 128 208 64 208
WIRE 496 208 432 208
WIRE 864 208 800 208
WIRE -48 240 -48 -96
WIRE 16 240 -48 240
WIRE 336 240 336 112
WIRE 384 240 336 240
WIRE 704 240 704 112
WIRE 752 240 704 240
WIRE 64 288 64 256
WIRE 240 288 240 240
WIRE 432 288 432 256
WIRE 608 288 608 240
WIRE 800 288 800 256
WIRE 976 288 976 240
SYMBOL nmos4 16 160 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=0.2u w={x}
SYMATTR InstName M1
SYMATTR Value cmosn
SYMBOL cap 224 176 R0
SYMATTR InstName C1
SYMATTR Value 2.18p
SYMBOL cap 592 176 R0
SYMATTR InstName C2
SYMATTR Value 2.18p
SYMBOL nmos4 752 160 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=0.2u w={x}
SYMATTR InstName M3
SYMATTR Value cmosn
SYMBOL res 48 -16 R0
SYMATTR InstName R1
SYMATTR Value 823.7
SYMBOL cap 960 176 R0
SYMATTR InstName C3
SYMATTR Value 2.18p
SYMBOL res 416 -16 R0
SYMATTR InstName R2
SYMATTR Value 823.7
SYMBOL res 784 -16 R0
SYMATTR InstName R3
SYMATTR Value 823.7
SYMBOL nmos4 384 160 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=0.2u w={x}
SYMATTR InstName M2
SYMATTR Value cmosn
SYMBOL voltage -176 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.5
FLAG 64 288 0
FLAG 144 112 out1
FLAG -176 128 0
FLAG 240 288 0
FLAG 128 208 0
FLAG 432 -32 vcc
FLAG 432 288 0
FLAG 512 112 out2
FLAG 608 288 0
FLAG 496 208 0
FLAG 800 288 0
FLAG 880 112 out3
FLAG 976 288 0
FLAG 864 208 0
TEXT -64 -272 Left 0 !.include pretendTsmcModels_18.lib
TEXT -64 -232 Left 0 !.tran 0 200n 0 .1n
TEXT -64 -184 Left 0 !.options plotwinsize=0
TEXT 264 -224 Left 0 !.param x=10u
TEXT 272 -184 Left 0 !.ic V(out3)=2 ; quick startup
TEXT -48 -136 Left 0 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1008.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1008.asy)
C1 N003 N002 1000p
V1 +V 0 15
XU1 N005 N001 +V -V N001 N002 N003 LT1008 ;pnba In+)In-)V+)V-)OUT)COMP1)COMP2
V2 -V 0 -15
R1 N005 N004 100K
V3 N004 0 SINE(0 1 1K)
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 272 80 64 80
WIRE -288 112 -288 96
WIRE -160 112 -160 96
WIRE 112 128 96 128
WIRE 192 128 176 128
WIRE 96 192 96 128
WIRE 176 192 96 192
WIRE -288 208 -288 192
WIRE -160 208 -160 192
WIRE 176 208 176 192
WIRE 192 208 192 128
WIRE 208 208 208 192
WIRE 64 224 64 80
WIRE 160 224 64 224
WIRE 272 240 272 80
WIRE 272 240 224 240
WIRE -32 256 -112 256
WIRE 160 256 48 256
WIRE -112 272 -112 256
WIRE 192 288 192 272
WIRE -112 368 -112 352
SYMBOL voltage -112 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 64 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL voltage -160 96 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT1008 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -288 96 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL cap 176 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000p
FLAG -160 208 0
FLAG 208 192 +V
FLAG -160 96 +V
FLAG 192 288 -V
FLAG -288 208 0
FLAG -288 96 -V
FLAG -112 368 0
TEXT 256 336 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\0d9abb519d5b_pdt-projeto-com-transistores.asc
* Generated by LTspice 26.0.1 for Windows.
* Vc
* Vb
* Ve
* Vce
* Vbe
* V1
* V2
Q1 N002 N003 N004 0 2N2222
Rc N001 N002 480R
R2 N003 0 240R
R1 N001 N003 1k2
Vcc N001 0 12V
Re N004 0 120R
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 10ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -112 -48 -112
WIRE 304 -112 160 -112
WIRE 160 -64 160 -112
WIRE 304 -64 304 -112
WIRE 304 112 304 16
WIRE -48 128 -48 -112
WIRE 160 160 160 16
WIRE 240 160 160 160
WIRE 160 304 160 160
WIRE 304 304 304 208
WIRE -48 416 -48 208
WIRE 160 416 160 384
WIRE 160 416 -48 416
WIRE 304 416 304 384
WIRE 304 416 160 416
WIRE -48 448 -48 416
SYMBOL npn 240 112 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL res 288 -80 R0
SYMATTR InstName Rc
SYMATTR Value 480R
SYMBOL res 144 -80 R0
SYMATTR InstName R1
SYMATTR Value 1k2
SYMBOL voltage -48 112 R0
WINDOW 0 39 39 Left 2
WINDOW 3 38 70 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vcc
SYMATTR Value 12V
SYMBOL res 144 288 R0
SYMATTR InstName R2
SYMATTR Value 240R
SYMBOL res 288 288 R0
SYMATTR InstName Re
SYMATTR Value 120R
FLAG -48 448 0
TEXT -8 208 Left 0 !.tran 10ms
TEXT 280 104 Left 1 ;Vc
TEXT 224 152 Left 1 ;Vb
TEXT 280 216 Left 1 ;Ve
TEXT 280 144 VRight 1 ;Vce
TEXT 248 184 VRight 1 ;Vbe
TEXT 120 -24 Left 1 ;V1
TEXT 120 344 Left 1 ;V2
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1419.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1419.asy)
V4 vSA 0 10
XU1 0 V+ vIN vEN vD vSA vSB V- ADG1419 ;pnba GND)VDD)IN)EN)D)SA)SB)VSS
V5 vIN 0 PULSE(0 3.3 0 10n 10n 10u 20u)
V6 vEN 0 3.3
C1 vD 0 36p
V2 V- 0 {-Vdd}
V1 V+ 0 {Vdd}
R1 vD 0 301
V3 vSB 0 -10
.tran 100u
.param Vdd = 15
.lib ADG1419.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2244 1360
WIRE 1088 -288 1072 -288
WIRE 1072 -224 1072 -288
WIRE 256 -208 240 -208
WIRE 272 -208 256 -208
WIRE 464 -208 448 -208
WIRE 480 -208 464 -208
WIRE 800 -160 736 -160
WIRE 928 -160 880 -160
WIRE 976 -160 928 -160
WIRE 240 -144 240 -208
WIRE 448 -144 448 -208
WIRE 1200 -128 1168 -128
WIRE 1360 -128 1200 -128
WIRE 1456 -128 1360 -128
WIRE 640 -96 592 -96
WIRE 928 -96 720 -96
WIRE 976 -96 928 -96
WIRE 1360 -48 1360 -128
WIRE 928 -32 768 -32
WIRE 976 -32 928 -32
WIRE 1200 -32 1168 -32
WIRE 1264 -32 1200 -32
WIRE 1456 -32 1456 -128
WIRE 240 -16 240 -64
WIRE 448 -16 448 -64
WIRE 1264 -16 1264 -32
WIRE 768 0 768 -32
WIRE 768 112 768 80
WIRE 1008 112 1008 80
WIRE 1008 112 976 112
WIRE 1136 112 1136 80
WIRE 1264 112 1264 64
WIRE 1360 112 1360 32
WIRE 1456 112 1456 32
RECTANGLE Normal 768 -432 16 -720 2
SYMBOL res 1344 -64 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage 240 -160 R0
WINDOW 0 61 59 Bottom 2
WINDOW 3 65 84 Top 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value {-Vdd}
SYMBOL voltage 736 -96 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -10
SYMBOL voltage 768 -16 R0
WINDOW 0 18 8 Left 2
WINDOW 3 -485 107 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value PULSE(0 3.3 0 10n 10n 10u 20u)
SYMBOL voltage 448 -160 R0
WINDOW 0 64 60 Bottom 2
WINDOW 3 70 85 Top 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vdd}
SYMBOL voltage 896 -160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 10
SYMBOL voltage 1264 -32 R0
WINDOW 0 18 8 Left 2
WINDOW 3 15 104 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 3.3
SYMBOL ADG1419 1072 -80 R0
SYMATTR InstName U1
SYMBOL cap 1440 -32 R0
SYMATTR InstName C1
SYMATTR Value 36p
FLAG 448 -16 0
FLAG 1264 112 0
FLAG 1360 112 0
FLAG 1456 112 0
FLAG 1136 112 0
FLAG 240 -16 0
FLAG 768 112 0
FLAG 736 -160 0
FLAG 592 -96 0
FLAG 464 -208 V+
FLAG 256 -208 V-
FLAG 1088 -288 V+
FLAG 976 112 V-
FLAG 1200 -128 vD
FLAG 928 -160 vSA
FLAG 928 -96 vSB
FLAG 928 -32 vIN
FLAG 1200 -32 vEN
TEXT 1416 224 Left 2 !.tran 100u
TEXT 32 -696 Left 2 ;Notes:
TEXT 32 -392 Left 2 !.param Vdd = 15
* Z:\home\khalils\Downloads\files\data\raw_asc\2dc1dfb7be5a_1HalfRectirie.asc
* Generated by LTspice 26.0.1 for Windows.
* 1 Half Wave Rectifier
R1 N002 0 1
V1 N001 0 SINE(0 230 60)
D1 N001 N002 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 50m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 208 96 112 96
WIRE 368 96 272 96
WIRE 368 128 368 96
WIRE 112 144 112 96
WIRE 112 272 112 224
WIRE 368 272 368 208
SYMBOL voltage 112 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 230 60)
SYMBOL res 352 112 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL diode 208 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
FLAG 112 272 0
FLAG 368 272 0
TEXT -264 16 Left 2 ;1 Half Wave Rectifier
TEXT -264 296 Left 2 !.tran 50m
* Z:\home\khalils\Downloads\files\data\raw_asc\d8b0b5331e60_Experiment1_NPN_Ib.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 Vce Vbe 0 0 NPN
R2 Vbe N001 10k
I1 0 N001 0
V2 VcIN 0 0
R1 VcIN Vce 200
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V2 0 3 0.01 I1 0 0.02m 0.005m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 368 -48 208 -48
WIRE 208 -32 208 -48
WIRE 208 80 208 48
WIRE 288 80 208 80
WIRE 208 96 208 80
WIRE 0 144 -48 144
WIRE 128 144 80 144
WIRE 144 144 128 144
WIRE 208 272 208 192
SYMBOL current -128 144 R270
WINDOW 0 32 40 VTop 2
WINDOW 3 -32 40 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 0
SYMBOL res 192 -48 R0
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL npn 144 96 R0
SYMATTR InstName Q1
SYMBOL voltage 592 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL res 96 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
FLAG 208 272 0
FLAG 368 -48 VcIN
FLAG 128 144 Vbe
FLAG 288 80 Vce
FLAG 592 80 VcIN
FLAG 592 160 0
FLAG -128 144 0
TEXT 376 280 Left 2 !.dc V2 0 3 0.01 I1 0 0.02m 0.005m
* Z:\home\khalils\Downloads\files\data\raw_asc\2457b9765153_2.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 0 efremov
V1 N002 0 V
V2 N001 0 0.9
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model efremov nmos VTO=0.34 LAMBDA=0.05 TOX=3.6n UO=353 l=0.18u w=9u
.dc V1 0 2.34 0.01 V2 0 2 0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 96 144 96
WIRE 384 144 384 96
WIRE 96 176 -48 176
WIRE -48 208 -48 176
WIRE -48 320 -48 288
WIRE -16 320 -48 320
WIRE 144 320 144 192
WIRE 144 320 -16 320
WIRE 384 320 384 224
WIRE 384 320 144 320
SYMBOL voltage -48 192 R0
SYMATTR InstName V1
SYMBOL voltage 384 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0.9
SYMBOL nmos 96 96 R0
SYMATTR InstName M1
SYMATTR Value efremov
FLAG -16 320 0
TEXT -72 360 Left 2 !.model efremov nmos VTO=0.34 LAMBDA=0.05 TOX=3.6n UO=353 l=0.18u w=9u
TEXT -72 392 Left 2 !.dc V1 0 2.34 0.01 V2 0 2 0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\47227c302b60_lab12.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N002 0 3
V2 N001 0 10
M1 N001 N002 0 0 Si7336ADP
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 0 12 0.1 V1 2.9 6 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 144 240 16
WIRE 192 224 48 224
WIRE 48 288 48 224
WIRE 240 352 240 240
SYMBOL voltage 240 32 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 10
SYMBOL voltage 48 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL nmos 192 144 R0
SYMATTR InstName M1
SYMATTR Value Si7336ADP
FLAG 240 352 0
FLAG 48 368 0
FLAG 240 -64 0
TEXT 304 72 Left 2 !.dc V2 0 12 0.1 V1 2.9 6 1
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8565.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8565.asy)
R1 N001 0 10K
XU1 IN N001 +V -V OUT AD8565 ;pnba In+)In-)V+)V-)OUT
Rload OUT 0 10K
V1 +V 0 15
V2 -V 0 -15
Vin IN 0 SINE(0 1 10K)
R2 OUT N001 10K
.tran 1m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL AD8565 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
TEXT 704 -960 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\05b522f62527_TP1_3.asc
* Generated by LTspice 26.0.1 for Windows.
* .tran 0.004
XU2 Vin N003 Vcc Vss Vo2 LM324 ;pnba In+)In-)V+)V-)OUT
D1 N002 Vo1 1N4148
Vin Vin 0 SINE(0 4 1k)
XU1 Vin N001 Vcc Vss Vo1 LM324 ;pnba In+)In-)V+)V-)OUT
R1 N001 N002 10k tol=1
Vss 0 Vss 10
R4 Vo2 N003 10k tol=1
D2 Vo1 N001 1N4148
R3 N001 0 10k tol=1
R2 N003 N002 5k tol=1
Vcc Vcc 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.include LM324.txt
.dc Vin -10 10 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 -128 -32 -128
WIRE 160 -128 96 -128
WIRE 240 -128 160 -128
WIRE 384 -128 320 -128
WIRE 448 -128 384 -128
WIRE 592 -128 528 -128
WIRE 160 -80 160 -128
WIRE -432 -64 -432 -128
WIRE -288 -64 -288 -128
WIRE 480 16 480 -32
WIRE -160 32 -192 32
WIRE -32 32 -32 -128
WIRE -32 32 -80 32
WIRE 32 32 -32 32
WIRE 160 32 160 -16
WIRE 160 32 96 32
WIRE 384 32 384 -128
WIRE 448 32 384 32
WIRE 592 48 592 -128
WIRE 592 48 512 48
WIRE 640 48 592 48
WIRE -432 64 -432 16
WIRE -432 64 -528 64
WIRE -192 64 -192 32
WIRE 448 64 384 64
WIRE -528 80 -528 64
WIRE -288 80 -288 16
WIRE -432 112 -432 64
WIRE 480 128 480 80
WIRE 64 176 64 128
WIRE -32 192 -32 32
WIRE 32 192 -32 192
WIRE 160 208 160 32
WIRE 160 208 96 208
WIRE -48 224 -80 224
WIRE 32 224 -48 224
WIRE -432 288 -432 192
WIRE 64 288 64 240
WIRE -48 368 -48 224
WIRE 384 368 384 64
WIRE 384 368 -48 368
IOPIN 160 208 Out
IOPIN 640 48 Out
SYMBOL OpAmps\\opamp2 64 144 R0
SYMATTR InstName U1
SYMATTR Value LM324
SYMBOL OpAmps\\opamp2 480 -16 R0
SYMATTR InstName U2
SYMATTR Value LM324
SYMBOL voltage -432 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vss
SYMATTR Value 10
SYMBOL diode 96 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL res 544 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMATTR SpiceLine tol=1
SYMBOL res 0 -112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMATTR SpiceLine tol=1
SYMBOL voltage -432 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vcc
SYMATTR Value 10
SYMBOL diode 144 -80 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage -288 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value SINE(0 4 1k)
SYMBOL res -64 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMATTR SpiceLine tol=1
SYMBOL res 336 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5k
SYMATTR SpiceLine tol=1
FLAG -528 80 0
FLAG -432 -128 Vcc
FLAG -432 288 Vss
FLAG -288 -128 Vin
FLAG -288 80 0
FLAG 64 128 Vcc
FLAG 480 -32 Vcc
FLAG 64 288 Vss
FLAG 480 128 Vss
FLAG -80 224 Vin
FLAG -192 64 0
FLAG 160 208 Vo1
FLAG 640 48 Vo2
TEXT -536 408 Left 2 !.include LM324.txt
TEXT -528 376 Left 2 !.dc Vin -10 10 0.01
TEXT -528 344 Left 2 ;.tran 0.004
* Z:\home\khalils\Downloads\files\data\raw_asc\2e982158bcab_inverting__ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
R1 N001 VIN 1k
XU1 0 N001 VCC VEE Vout LT1001 ;pnba In+)In-)V+)V-)OUT
V3 0 VEE 15V
V2 VCC 0 15V
R2 Vout N001 2k
V1 VIN 0 SINE(0 2 1k)
.tran 3ms
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 0 144 0
WIRE 352 0 272 0
WIRE 496 16 496 -16
WIRE 496 64 496 16
WIRE 224 112 224 96
WIRE 224 128 224 112
WIRE 144 144 144 0
WIRE 144 144 96 144
WIRE 192 144 144 144
WIRE 352 160 352 0
WIRE 352 160 256 160
WIRE 400 160 352 160
WIRE 416 160 400 160
WIRE 192 176 160 176
WIRE 496 176 496 144
WIRE 672 176 496 176
WIRE 16 192 16 144
WIRE 672 192 672 176
WIRE 16 208 16 192
WIRE 224 208 224 192
WIRE 496 208 496 176
WIRE 224 224 224 208
WIRE 160 240 160 176
WIRE 16 304 16 288
WIRE 496 304 496 288
WIRE 496 320 496 304
SYMBOL voltage 16 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 2 1k)
SYMBOL res 112 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL OpAmps\\OP07 224 96 R0
SYMATTR InstName U1
SYMBOL res 288 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2k
SYMBOL voltage 496 48 R0
SYMATTR InstName V2
SYMATTR Value 15V
SYMBOL voltage 496 192 R0
SYMATTR InstName V3
SYMATTR Value 15V
FLAG 16 304 0
FLAG 160 240 0
FLAG 16 192 VIN
FLAG 400 160 Vout
FLAG 224 208 VEE
FLAG 496 304 VEE
FLAG 672 192 0
FLAG 224 112 VCC
FLAG 496 16 VCC
TEXT -24 376 Left 2 !.tran 3ms
* Z:\home\khalils\Downloads\files\data\raw_asc\211db467f9c9_trigger_sine_damped.asc
* Generated by LTspice 26.0.1 for Windows.
V2 trig 0 PULSE(0 1 .3 1n 1n 1 2)
V1 dsine 0 SINE(0 1 10 1n 5 ) TRIGGER V(trig)>0.5
.tran 4
* Triggered Damped SINE
.options plotwinsize=0
* any trigger source
* sine source
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1312 680
WIRE -112 144 -176 144
WIRE 272 144 208 144
WIRE -176 192 -176 144
WIRE 208 192 208 144
WIRE -176 320 -176 272
WIRE 208 320 208 272
FLAG -176 320 0
FLAG -112 144 trig
IOPIN -112 144 Out
FLAG 208 320 0
FLAG 272 144 dsine
IOPIN 272 144 Out
SYMBOL voltage -176 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 .3 1n 1n 1 2)
SYMBOL voltage 208 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 10 1n 5    ) TRIGGER V(trig)>0.5
TEXT -240 -8 Left 0 !.tran 4
TEXT -56 -48 Left 0 ;Triggered Damped SINE
TEXT -240 16 Left 0 !.options plotwinsize=0
TEXT -216 104 Left 0 ;any trigger source
TEXT 200 104 Left 0 ;sine source