Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1100.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC1100.asy)
C1 OUT N002 .01
V1 +V 0 5
V2 -V 0 -5
V3 IN 0 SINE(0 10m 10)
XU1 0 N001 0 -V +V IN N002 OUT LTC1100 ;pnba GND)CMRR)In-)V-)V+)In+)Comp)Out
.tran .3
.lib LTC1100.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -192 32 -208 32
WIRE 96 32 64 32
WIRE 176 32 96 32
WIRE -480 80 -480 64
WIRE -368 80 -368 64
WIRE -192 96 -208 96
WIRE 96 96 64 96
WIRE -192 160 -208 160
WIRE 192 160 64 160
WIRE -480 176 -480 160
WIRE -368 176 -368 160
WIRE 192 176 192 160
WIRE -192 224 -208 224
WIRE 80 224 64 224
WIRE 192 272 192 256
SYMBOL cap 80 32 R0
WINDOW 0 30 16 Left 2
WINDOW 3 28 55 Left 2
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL voltage -368 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -480 64 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 192 160 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 10m 10)
SYMBOL opamps\\LTC1100 -64 128 R0
SYMATTR InstName U1
FLAG -368 176 0
FLAG -368 64 +V
FLAG 192 272 0
FLAG -208 32 0
FLAG 80 224 +V
FLAG -480 176 0
FLAG -208 224 -V
FLAG -480 64 -V
FLAG -208 160 0
FLAG 176 32 OUT
FLAG 192 160 IN
TEXT 312 336 Left 2 !.tran .3
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1223.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1223.asy)
V1 +V 0 15
V2 -V 0 -15
V3 IN 0 ac 1
R2 N001 0 {Rg}
R1 OUT N001 1K
XU1 IN N001 +V -V OUT LT1223 ;pnba In+)In-)V+)V-)OUT
.ac oct 100 100K 1G
.step PARAM Rg list 10 33 110 470 1e308
.lib LT1223.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -48 96 -64 96
WIRE 48 96 32 96
WIRE 64 96 48 96
WIRE 176 96 144 96
WIRE -320 160 -320 144
WIRE -208 160 -208 144
WIRE 112 208 112 192
WIRE 48 224 48 96
WIRE 80 224 48 224
WIRE 176 240 176 96
WIRE 176 240 144 240
WIRE 240 240 176 240
WIRE -320 256 -320 240
WIRE -208 256 -208 240
WIRE 80 256 -80 256
WIRE -80 272 -80 256
WIRE 112 288 112 272
WIRE -80 368 -80 352
SYMBOL voltage -320 144 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 160 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL opamps\\LT1223 112 176 R0
SYMATTR InstName U1
SYMBOL res 48 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {Rg}
SYMBOL voltage -208 144 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -80 256 R0
SYMATTR InstName V3
SYMATTR Value ac 1
FLAG -208 256 0
FLAG 112 192 +V
FLAG -208 144 +V
FLAG 112 288 -V
FLAG -320 256 0
FLAG -320 144 -V
FLAG -64 96 0
FLAG -80 368 0
FLAG 240 240 OUT
FLAG -80 256 IN
TEXT 40 360 Left 2 !.ac oct 100 100K  1G\n.step PARAM Rg list 10 33 110 470 1e308
* Z:\home\khalils\Downloads\files\data\raw_asc\46707cacbc79_Input_Voltage_Polarity_Protection.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 -5.5
D1 N003 N002 1N5819
R1 N003 0 100
M1 N001 N003 N002 N002 PMOS
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 5 0.1 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 64 0 64
WIRE 304 64 272 64
WIRE 384 64 304 64
WIRE 304 80 304 64
WIRE 0 96 0 64
WIRE 256 176 256 112
WIRE 304 176 304 144
WIRE 304 176 256 176
WIRE 0 288 0 176
WIRE 256 288 256 256
SYMBOL schottky 320 144 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMATTR Description Zener Diode
SYMATTR Type zener
SYMBOL res 240 160 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage 0 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -5.5
SYMBOL pmos 176 112 R270
SYMATTR InstName M1
FLAG 256 288 0
FLAG 0 288 0
TEXT -34 312 Left 2 !.tran 0 5 0.1 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8610AC.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8610AC.asy)
R1 N006 0 60.4K
R3 N007 0 191K
C2 N001 0 1
L1 N005 OUT 4.7 Rser=3m
V1 IN 0 24
R2 OUT N007 1Meg
Rload OUT 0 1.42
C3 N003 N005 .1
C4 OUT 0 47 x2 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
C5 OUT N007 10p
XU1 N002 N004 N006 IN IN MP_01 0 MP_02 N005 MP_03 MP_04 N003 N001 OUT NC_05 N007 0 LT8610AC ;pnba Mode)TR/SS)Rt)EN/UV)Vin))PGND))SW)))BST)INTVcc)Bias)PG)FB)GND
C1 N004 0 .001
.tran 750u startup
.lib LT8610AC.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 996 680
WIRE 96 -64 0 -64
WIRE 256 -64 96 -64
WIRE 0 -48 0 -64
WIRE 256 -48 256 -64
WIRE 96 0 96 -64
WIRE 112 0 96 0
WIRE 416 0 400 0
WIRE 496 0 480 0
WIRE 0 48 0 32
WIRE 112 96 96 96
WIRE 592 96 400 96
WIRE 432 192 400 192
WIRE 432 208 432 192
WIRE 32 288 16 288
WIRE 112 288 96 288
WIRE 432 288 432 272
WIRE 432 288 400 288
WIRE 480 288 432 288
WIRE 592 288 592 96
WIRE 592 288 560 288
WIRE 704 288 592 288
WIRE 800 288 704 288
WIRE 896 288 800 288
WIRE 592 304 592 288
WIRE 704 304 704 288
WIRE 800 304 800 288
WIRE 896 304 896 288
WIRE 112 384 32 384
WIRE 592 384 400 384
WIRE 704 384 704 368
WIRE 704 384 592 384
WIRE 32 400 32 384
WIRE 592 400 592 384
WIRE 800 400 800 368
WIRE 896 400 896 384
WIRE 192 448 192 432
WIRE 320 448 320 432
WIRE 32 496 32 480
WIRE 592 496 592 480
SYMBOL res 880 288 R0
SYMATTR InstName Rload
SYMATTR Value 1.42
SYMBOL res 16 384 R0
SYMATTR InstName R1
SYMATTR Value 60.4K
SYMBOL PowerProducts\\LT8610AC 256 192 R0
SYMATTR InstName U1
SYMBOL cap 416 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 96 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .001
SYMBOL res 576 384 R0
SYMATTR InstName R3
SYMATTR Value 191K
SYMBOL ind 464 304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=3m
SYMBOL voltage 0 -64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 576 288 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL cap 416 208 R0
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL cap 784 304 R0
WINDOW 123 23 63 Left 2
WINDOW 3 38 34 Left 2
SYMATTR Value2 x2
SYMATTR Value 47
SYMATTR InstName C4
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL cap 688 304 R0
SYMATTR InstName C5
SYMATTR Value 10p
FLAG 192 448 0
FLAG 320 448 0
FLAG 32 496 0
FLAG 16 288 0
FLAG 0 48 0
FLAG 496 0 0
FLAG 800 400 0
FLAG 592 496 0
FLAG 896 400 0
FLAG 896 288 OUT
FLAG 0 -64 IN
TEXT 736 464 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\05217138f05a_eje2.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N001 N004 7.797e-09 Rser=0
C2 N003 N005 30p
R2 N001 0 50
L1 N001 N002 2.1187e-04 Rser=0
I1 0 N001 AC 4
R1 N003 N002 1
RL1 N005 0 2
rpc1 N004 0 0.2
.ac dec 10000 1.9e6 2.1e6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 -48 -272 -48
WIRE -16 -48 -112 -48
WIRE 112 -48 -16 -48
WIRE 240 -48 192 -48
WIRE 352 -48 320 -48
WIRE -16 -32 -16 -48
WIRE 352 -16 352 -48
WIRE -272 0 -272 -48
WIRE -112 16 -112 -48
WIRE -16 64 -16 32
WIRE 352 64 352 48
WIRE -272 160 -272 80
WIRE -112 160 -112 96
WIRE -112 160 -272 160
WIRE -16 160 -16 144
WIRE -16 160 -112 160
WIRE 352 160 352 144
WIRE 352 160 -16 160
SYMBOL ind 96 -32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.1187e-04
SYMATTR SpiceLine Rser=0
SYMBOL res -128 0 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL current -272 80 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 24 52 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value ""
SYMATTR Value2 AC 4
SYMBOL res 336 48 R0
SYMATTR InstName RL1
SYMATTR Value 2
SYMBOL res -32 48 R0
SYMATTR InstName rpc1
SYMATTR Value 0.2
SYMBOL cap -32 -32 R0
SYMATTR InstName C1
SYMATTR Value 7.797e-09
SYMATTR SpiceLine Rser=0
SYMBOL res 336 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL cap 336 -16 R0
SYMATTR InstName C2
SYMATTR Value 30p
FLAG 352 160 0
TEXT -304 152 Left 2 !.ac dec 10000 1.9e6 2.1e6
* Z:\home\khalils\Downloads\files\data\raw_asc\ADGM1001.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADGM1001.asy)
V1 N001 0 2
R1 N002 0 300
V2 N003 0 PULSE(3.3 0 0 10u 10u 10m 20m)
V3 +V 0 3.3
XU2 +V N003 N001 N002 0 ADGM1001 ;pnba VDD)IN)RF1)RFC)GND
.tran 100m
.lib ADGM1001.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2144 2724
WIRE 912 32 880 32
WIRE 912 96 912 32
WIRE 704 176 672 176
WIRE 816 176 784 176
WIRE 1088 176 1008 176
WIRE 1088 192 1088 176
WIRE 816 240 736 240
WIRE 560 272 528 272
WIRE 1088 288 1088 272
WIRE 560 304 560 272
WIRE 736 304 736 240
WIRE 912 368 912 352
WIRE 560 416 560 384
WIRE 736 432 736 384
SYMBOL ADGM1001 912 224 R0
SYMATTR InstName U2
SYMBOL voltage 736 288 R0
WINDOW 3 33 134 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(3.3 0 0 10u 10u 10m 20m)
SYMATTR InstName V2
SYMBOL voltage 560 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL voltage 800 176 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL res 1072 176 R0
SYMATTR InstName R1
SYMATTR Value 300
FLAG 672 176 0
FLAG 1088 288 0
FLAG 912 368 0
FLAG 736 432 0
FLAG 912 32 +V
FLAG 560 416 0
FLAG 560 272 +V
TEXT 1088 352 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL40502-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL40502-1.5.asy)
C1 vOUT 0 1 Rser=1m
V1 vIN 0 2.3
Rload vOUT 0 7.5
XU1 vIN 0 vIN vOUT ADPL40502-1.5 ;pnba Vin)GND)EN)Vout
.tran 1m startup
.lib ADPL40502-1.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2808 1464
WIRE 1824 880 1728 880
WIRE 1984 880 1824 880
WIRE 1728 896 1728 880
WIRE 1984 896 1984 880
WIRE 1728 992 1728 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL VOLTAGE 1728 880 R0
SYMATTR InstName V1
SYMATTR Value 2.3
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMATTR SpiceLine Rser=1m
SYMBOL ADPL40502-1.5 1984 1024 R0
SYMATTR InstName U1
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 7.5
FLAG 2256 1024 vOUT
FLAG 2256 1136 0
FLAG 1728 992 0
FLAG 1728 880 vIN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\stepAC.asc
* Generated by LTspice 26.0.1 for Windows.
L1 OUT 0 1
C1 OUT 0 420p
L2 IN 0 1
C2 IN 0 420p
C3 OUT IN {C}
R1 OUT 0 300
I1 0 IN 0 AC 5m
R2 IN 0 300
.ac oct 200 5Meg 10Meg
.step param C 50p 150p 50p
* This example schematic is supplied for informational/educational purposes only.
* This example demonstrates .stepping a global parameter,\nC, while computing the transfer function of the filter.
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2412 1664
WIRE 1520 1248 1376 1248
WIRE 1664 1248 1520 1248
WIRE 1776 1248 1664 1248
WIRE 1856 1248 1776 1248
WIRE 1984 1248 1920 1248
WIRE 2096 1248 1984 1248
WIRE 2256 1248 2096 1248
WIRE 1376 1280 1376 1248
WIRE 1520 1280 1520 1248
WIRE 1664 1280 1664 1248
WIRE 1776 1280 1776 1248
WIRE 1984 1280 1984 1248
WIRE 2096 1280 2096 1248
WIRE 2256 1280 2256 1248
WIRE 1376 1392 1376 1360
WIRE 1520 1392 1520 1360
WIRE 1664 1392 1664 1360
WIRE 1776 1392 1776 1344
WIRE 1984 1392 1984 1344
WIRE 2096 1392 2096 1360
WIRE 2256 1392 2256 1360
FLAG 2096 1392 0
FLAG 1984 1392 0
FLAG 1664 1392 0
FLAG 1776 1392 0
FLAG 2256 1392 0
FLAG 1520 1392 0
FLAG 1376 1392 0
FLAG 1376 1248 IN
FLAG 2256 1248 OUT
SYMBOL ind 2080 1264 R0
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL cap 1968 1280 R0
SYMATTR InstName C1
SYMATTR Value 420p
SYMBOL ind 1648 1264 R0
SYMATTR InstName L2
SYMATTR Value 1
SYMBOL cap 1760 1280 R0
SYMATTR InstName C2
SYMATTR Value 420p
SYMBOL cap 1920 1232 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value {C}
SYMBOL RES 2240 1264 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL CURRENT 1376 1360 M180
WINDOW 0 24 88 Left 2
WINDOW 3 38 36 Left 2
WINDOW 39 0 0 Left 2
WINDOW 123 8 -8 Left 2
SYMATTR InstName I1
SYMATTR Value 0
SYMATTR Value2 AC 5m
SYMBOL res 1504 1264 R0
SYMATTR InstName R2
SYMATTR Value 300
TEXT 1656 1440 Left 2 !.ac oct 200 5Meg 10Meg
TEXT 1656 1472 Left 2 !.step param C 50p 150p 50p
TEXT 1824 1584 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT 1504 1520 Left 2 ;This example demonstrates .stepping a global parameter,\nC, while computing the transfer function of the filter.
* Z:\home\khalils\Downloads\files\data\raw_asc\5f6e728057d7_bias_inverter.asc
* Generated by LTspice 26.0.1 for Windows.
;.dc V1 0 1.2 0.1
V3 N001 0 650m
M2 Vdd N001 vout Vdd PMOS l=400n w=Wp
M1 vout vin 0 0 NMOS l=1u w=Wn
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.param Wp=1u Wn=700n vb=0.5 vin=0.4
.step param vb 0 1.2 0.1
.tran 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -2992 -32416 -2992 -32432
WIRE -2928 -32416 -2992 -32416
WIRE -2992 -32400 -2992 -32416
WIRE -2512 -32400 -2512 -32416
WIRE -2928 -32352 -2928 -32416
WIRE -2928 -32352 -2992 -32352
WIRE -3040 -32320 -3392 -32320
WIRE -3392 -32288 -3392 -32320
WIRE -2992 -32256 -2992 -32304
WIRE -2880 -32256 -2992 -32256
WIRE -2992 -32240 -2992 -32256
WIRE -2992 -32240 -3040 -32240
WIRE -3040 -32224 -3040 -32240
WIRE -3392 -32192 -3392 -32208
WIRE -2912 -32176 -3040 -32176
WIRE -2912 -32160 -2912 -32176
WIRE -3088 -32144 -3168 -32144
WIRE -3040 -32112 -3040 -32128
IOPIN -2512 -32416 In
IOPIN -3168 -32144 In
IOPIN -2880 -32256 Out
SYMBOL nmos4 -3088 -32224 R0
SYMATTR InstName M1
SYMATTR Value2 l=1u w=Wn
SYMBOL voltage -3392 -32304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 650m
SYMBOL pmos4 -3040 -32400 R0
SYMATTR InstName M2
SYMATTR Value2 l=400n w=Wp
FLAG -3040 -32112 0
FLAG -2912 -32160 0
FLAG -2992 -32432 Vdd
FLAG -2512 -32416 Vdd
FLAG -3392 -32192 0
FLAG -3168 -32144 vin
FLAG -2880 -32256 vout
FLAG -2512 -32400 Vdd
TEXT -3714 -32480 Left 2 !;.dc V1 0 1.2 0.1
TEXT -3712 -32448 Left 2 !.param Wp=1u Wn=700n vb=0.5 vin=0.4
TEXT -3720 -32392 Left 2 !.step param vb 0 1.2 0.1
TEXT -3722 -31976 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\07a0ceefbb5d_17-comparator.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
V4 N001 0 0.5
V3 in 0 SINE(0 1 100)
V2 0 vee +18
XU1 in N001 vcc vee out LT1001 ;pnba In+)In-)V+)V-)OUT
V1 vcc 0 +18
.tran 30m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 0 224 -16
WIRE -128 16 -128 -16
WIRE 192 16 16 16
WIRE 368 32 256 32
WIRE 384 32 368 32
WIRE 160 48 144 48
WIRE 192 48 160 48
WIRE 16 80 16 16
WIRE 144 80 144 48
WIRE 224 80 224 64
WIRE -128 112 -128 96
WIRE -128 112 -192 112
WIRE -128 128 -128 112
WIRE -192 144 -192 112
WIRE 16 176 16 160
WIRE 144 176 144 160
WIRE -128 240 -128 208
SYMBOL voltage 144 64 R0
WINDOW 0 43 73 Left 2
WINDOW 3 26 98 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
SYMBOL voltage -128 0 R0
WINDOW 3 24 85 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value +18
SYMATTR InstName V1
SYMBOL voltage -128 112 R0
WINDOW 3 19 88 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value +18
SYMATTR InstName V2
SYMBOL OpAmps\\OP07 224 -32 R0
SYMATTR InstName U1
SYMBOL voltage 16 64 R0
WINDOW 0 37 72 Left 2
WINDOW 3 22 96 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 0.5
FLAG -192 144 0
FLAG -128 -16 vcc
FLAG -128 240 vee
FLAG 16 176 0
FLAG 160 48 in
FLAG 224 80 vee
FLAG 224 -16 vcc
FLAG 368 32 out
FLAG 144 176 0
TEXT -40 240 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\074aa3742c8c_ej1_d.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N005 N002 0.5
C3 N004 N003 0.33
C2 0 N005 2
RL N004 0 1
V1 N001 0 AC 1 Rser=1
L2 N003 N002 1
C1 N001 N002 1
.ac dec 1k 0.01 100
.net I(RL) V1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 64 16 64
WIRE 208 64 144 64
WIRE 256 64 208 64
WIRE 368 64 336 64
WIRE 464 64 432 64
WIRE 208 96 208 64
WIRE 16 144 16 64
WIRE 464 144 464 64
WIRE 208 208 208 176
WIRE 16 288 16 224
WIRE 208 288 208 272
WIRE 208 288 16 288
WIRE 464 288 464 224
WIRE 464 288 208 288
WIRE 208 304 208 288
SYMBOL cap 80 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 224 272 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 2
SYMBOL voltage 16 128 R0
WINDOW 0 -73 5 Left 2
WINDOW 123 -94 39 Left 2
WINDOW 39 -126 70 Left 2
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMATTR SpiceLine Rser=1
SYMBOL res 448 128 R0
SYMATTR InstName RL
SYMATTR Value 1
SYMBOL cap 432 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 0.33
SYMBOL ind 224 192 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value 0.5
SYMBOL ind 352 48 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L2
SYMATTR Value 1
FLAG 208 304 0
TEXT -80 320 Left 2 !.ac dec 1k 0.01 100
TEXT -80 344 Left 2 !.net I(RL) V1
* Z:\home\khalils\Downloads\files\data\raw_asc\AD711.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD711.asy)
R1 N001 0 10K
R2 OUT N001 10K
XU1 IN N001 +V -V OUT AD712 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
V2 -V 0 -15
Vin IN 0 SINE(0 1 10K)
.tran 1m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 688 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 432 -976 432 -992
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL opamps\\AD711 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 688 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 256 -1056 0
TEXT 776 -952 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\b187263299fc_scheme6.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 100
R2 N002 N004 500
R3 N006 0 83.33
XU1 N006 N002 N003 N007 N005 LT1013 ;pnba In+)In-)V+)V-)OUT
V1 N003 0 {Vcc}
V2 0 N007 {Vcc}
Vin N001 0 DC 0
V4 N004 0 10
.param Vcc=22
.dc Vin {-1.1*Vcc} {1.1*Vcc} 0.01
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1014.asy)
.lib LT1013.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 48 32 -112 32
WIRE 176 32 128 32
WIRE 464 32 272 32
WIRE -112 48 -112 32
WIRE 464 48 464 32
WIRE 272 128 272 32
WIRE 48 144 -32 144
WIRE 176 144 176 32
WIRE 176 144 128 144
WIRE 240 144 176 144
WIRE 384 160 304 160
WIRE 464 160 464 128
WIRE 544 160 464 160
WIRE -32 176 -32 144
WIRE 240 176 192 176
WIRE 544 176 544 160
WIRE 192 192 192 176
WIRE 464 192 464 160
WIRE 192 288 192 272
WIRE 272 304 272 192
WIRE 464 304 464 272
WIRE 464 304 272 304
FLAG 544 176 0
FLAG 192 288 0
FLAG -112 128 0
FLAG -32 256 0
SYMBOL res 144 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 144 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 500
SYMBOL res 176 176 R0
WINDOW 3 -71 61 Left 2
SYMATTR InstName R3
SYMATTR Value 83.33
SYMBOL OpAmps\\LT1014 272 96 R0
SYMATTR InstName U1
SYMBOL voltage 464 32 R0
SYMATTR InstName V1
SYMATTR Value {Vcc}
SYMBOL voltage 464 176 R0
SYMATTR InstName V2
SYMATTR Value {Vcc}
SYMBOL voltage -112 32 R0
SYMATTR InstName Vin
SYMATTR Value DC 0
SYMBOL voltage -32 160 R0
SYMATTR InstName V4
SYMATTR Value 10
TEXT -128 304 Left 2 !.param Vcc=22
TEXT -128 344 Left 2 !.dc Vin {-1.1*Vcc} {1.1*Vcc} 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2118-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2118-1.8.asy)
Rload OUT 0 .6
L1 N002 OUT 1
V1 IN 0 5
C1 OUT 0 100
XU1 IN IN IN OUT 0 0 N002 IN IN IN N001 ADP2118-x.x Rtop=666.7k Rbot=333.3k Ctop=4p ;pnba Sync/Mode)FREQ)TRK)FB)GND)PGND)SW)Pvin)Vin)EN)Pgood
R1 OUT N001 100K
.tran 2m startup
.lib ADP2118-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1104 680
WIRE 128 0 48 0
WIRE 288 0 128 0
WIRE 48 16 48 0
WIRE 288 32 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 640 64 576 64
WIRE 48 112 48 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 640 144 640 64
WIRE 640 144 560 144
WIRE 704 144 640 144
WIRE 560 160 560 144
WIRE 704 160 704 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 560 256 560 224
WIRE 704 256 704 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 640 304 640 144
WIRE 640 304 416 304
WIRE 128 384 128 304
WIRE 160 384 128 384
WIRE 288 432 288 416
SYMBOL res 688 144 R0
SYMATTR InstName Rload
SYMATTR Value .6
SYMBOL voltage 48 0 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL ADP2118-1.8 288 272 R0
SYMATTR InstName U1
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 100
FLAG 560 256 0
FLAG 288 432 0
FLAG 48 112 0
FLAG 704 144 OUT
FLAG 704 256 0
FLAG 48 0 IN
TEXT 552 392 Left 2 !.tran 2m startup