Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0bd2b3ddf299_npn_ic_ib.asc
* Generated by LTspice 26.0.1 for Windows.
V4 ve vss 0
V2 vss 0 0
Q1 vc vb ve 0 NPN
Ib vss vb 0
Vce vc ve {vce}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Ib 0 100e-6 10e-6
.step param vce 0 3 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 800 -160 800 -240
WIRE 736 -112 688 -112
WIRE 144 -96 144 -144
WIRE 272 -96 272 -144
WIRE 400 -96 400 -144
WIRE 544 -96 544 -144
WIRE 144 32 144 -16
WIRE 272 32 272 -16
WIRE 400 32 400 -16
WIRE 544 32 544 -16
WIRE 800 48 800 -64
SYMBOL voltage 400 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 0
SYMBOL voltage 144 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL npn 736 -160 R0
SYMATTR InstName Q1
SYMBOL current 544 -16 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Ib
SYMATTR Value 0
SYMBOL voltage 272 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vce
SYMATTR Value {vce}
FLAG 144 32 0
FLAG 144 -144 vss
FLAG 800 48 ve
FLAG 688 -112 vb
FLAG 800 -240 vc
FLAG 272 32 ve
FLAG 272 -144 vc
FLAG 400 32 vss
FLAG 400 -144 ve
FLAG 544 -144 vb
FLAG 544 32 vss
TEXT 352 -336 Left 2 !.dc Ib 0 100e-6 10e-6
TEXT 352 -304 Left 2 !.step param vce 0 3 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\1af8a85453be_Flash_cells_parasitic_R.asc
* Generated by LTspice 26.0.1 for Windows.
VDD VDD 0 1
M1 VDD 0 0 0 N750 l=50n w=150n
M2 VDD 0 P001 0 N750 l=50n w=150n
R1 P001 0 100k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include flash_models.txt
.dc VDD 0 1 100u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2620 680
WIRE 432 -1520 432 -1552
WIRE 704 -1472 704 -1552
WIRE 960 -1472 960 -1552
WIRE 752 -1424 704 -1424
WIRE 1056 -1424 960 -1424
WIRE 432 -1408 432 -1440
WIRE 656 -1392 640 -1392
WIRE 912 -1392 896 -1392
WIRE 640 -1344 640 -1392
WIRE 704 -1344 704 -1376
WIRE 752 -1344 752 -1424
WIRE 896 -1344 896 -1392
WIRE 1056 -1344 1056 -1424
WIRE 960 -1280 960 -1296
FLAG 432 -1408 0
FLAG 432 -1552 VDD
FLAG 704 -1344 0
FLAG 640 -1344 0
FLAG 752 -1344 0
FLAG 704 -1552 VDD
FLAG 960 -1280 0
FLAG 896 -1344 0
FLAG 1056 -1344 0
FLAG 960 -1552 VDD
SYMBOL voltage 432 -1536 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 40 53 Left 0
SYMATTR Value 1
SYMATTR InstName VDD
SYMBOL nmos4 656 -1472 R0
WINDOW 0 64 -33 Left 0
WINDOW 3 65 -6 Left 0
WINDOW 123 65 19 Left 0
SYMATTR InstName M1
SYMATTR Value N750
SYMATTR Value2 l=50n w=150n
SYMBOL nmos4 912 -1472 R0
WINDOW 0 64 -33 Left 0
WINDOW 3 65 -6 Left 0
WINDOW 123 65 19 Left 0
SYMATTR InstName M2
SYMATTR Value N750
SYMATTR Value2 l=50n w=150n
SYMBOL res 944 -1392 R0
SYMATTR InstName R1
SYMATTR Value 100k
TEXT 344 -1304 Left 0 !.include flash_models.txt
TEXT 344 -1368 Left 0 !.dc VDD 0 1 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6911-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6911-2.asy)
V5 N007 0 PULSE(0 5 0 1u 1u 10m 20m)
V4 N005 0 PULSE(0 5 0 1u 1u 5m 10m)
V3 N001 0 SINE(2.5 10m 1K)
C2 N003 0 1
V2 +V 0 +5
V6 N006 0 PULSE(0 5 0 1u 1u 20m 40m)
XU1 N001 N003 N001 N005 N007 N006 +V N004 0 N002 LTC6911-2 ;pnba INA)AGND)INB)G0)G1)G2)V+)OUTB)V-)OUTA
.tran 40m
.lib LTC6911-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1156 680
WIRE -912 -432 -912 -448
WIRE -560 -432 -560 -448
WIRE -464 -432 -464 -448
WIRE -608 -368 -736 -368
WIRE -400 -368 -416 -368
WIRE -912 -336 -912 -352
WIRE -736 -304 -736 -368
WIRE -736 -304 -912 -304
WIRE -688 -304 -704 -304
WIRE -608 -304 -624 -304
WIRE -912 -288 -912 -304
WIRE -736 -240 -736 -304
WIRE -608 -240 -736 -240
WIRE -400 -240 -416 -240
WIRE -912 -192 -912 -208
WIRE -576 -128 -576 -144
WIRE -576 -128 -624 -128
WIRE -448 -128 -448 -144
WIRE -400 -128 -448 -128
WIRE -400 -112 -400 -128
WIRE -512 -48 -512 -144
WIRE -400 -16 -400 -32
WIRE -624 16 -624 -128
WIRE -512 48 -512 32
WIRE -624 112 -624 96
SYMBOL voltage -512 -64 R0
WINDOW 0 28 27 Left 2
WINDOW 3 19 96 Left 2
SYMATTR InstName V5
SYMATTR Value PULSE(0 5 0 1u 1u 10m 20m)
SYMBOL voltage -400 -128 R0
WINDOW 0 28 27 Left 2
WINDOW 3 25 94 Left 2
SYMATTR InstName V6
SYMATTR Value PULSE(0 5 0 1u 1u 20m 40m)
SYMBOL LTC6911-2 -496 -304 R0
SYMATTR InstName U1
SYMBOL voltage -912 -304 R0
WINDOW 0 28 27 Left 2
WINDOW 3 25 94 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(2.5 10m 1K)
SYMBOL voltage -912 -448 R0
WINDOW 3 27 93 Left 2
SYMATTR Value +5
SYMATTR InstName V2
SYMBOL cap -624 -320 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL voltage -624 0 R0
WINDOW 0 28 27 Left 2
WINDOW 3 28 87 Left 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 5 0 1u 1u 5m 10m)
FLAG -912 -336 0
FLAG -912 -192 0
FLAG -912 -448 +V
FLAG -560 -448 +V
FLAG -624 112 0
FLAG -512 48 0
FLAG -400 -16 0
FLAG -704 -304 0
FLAG -464 -448 0
TEXT -144 96 Left 2 !.tran 40m
* Z:\tmp\asc_dec_bjh7r6w2\080e79659ed5_IL300_example_2_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R4 N005 0 30K
V2 N001 0 SINE(2.5 2.5 10)
C1 N003 N002 22p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -304 16 -400 16
WIRE -304 32 -304 16
WIRE -400 48 -400 16
WIRE 32 48 0 48
WIRE 0 64 0 48
WIRE -160 80 -160 64
WIRE -192 96 -224 96
WIRE -96 112 -128 112
WIRE -80 112 -96 112
WIRE 32 112 0 112
WIRE -304 128 -304 112
WIRE -192 128 -304 128
WIRE -96 128 -96 112
WIRE -400 144 -400 128
WIRE -160 160 -160 144
WIRE 32 160 0 160
WIRE -224 224 -224 96
WIRE -96 224 -96 192
WIRE -96 224 -224 224
WIRE 32 224 -96 224
WIRE -304 256 -304 128
WIRE -224 256 -224 224
WIRE -400 272 -400 256
WIRE -400 368 -400 352
WIRE -304 368 -304 336
WIRE -224 368 -224 336
SYMBOL res -320 240 R0
SYMATTR InstName R4
SYMATTR Value 30K
SYMBOL voltage -400 32 R0
WINDOW 3 -225 54 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(2.5 2.5 10)
SYMBOL cap -112 128 R0
SYMATTR InstName C1
SYMATTR Value 22p
FLAG -400 256 VCC
FLAG -160 64 VCC
FLAG -160 160 0
FLAG -400 368 0
FLAG -400 144 0
FLAG 0 160 VCC
FLAG 0 64 0
FLAG -304 368 0
FLAG -224 368 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3605.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3605.asy)
C1 N002 0 .001
D1 N001 N003 CMDSH2-3
C5 OUT 0 100
XU1 N006 NC_01 NC_02 N005 N002 N007 IN NC_03 OUT 0 N004 MP_04 MP_05 MP_06 MP_07 MP_08 IN MP_09 IN N003 N001 0 NC_10 0 LTC3605 ;pnba Rt)PhMode)Mode)FB)Track/SS)Ith)Run)Pgood)Von)PGND)SW))))))PVin))SVin)Boost)INTVcc)SGND)CLKOUT)CLKIN
R3 N005 0 4.99K
C3 N003 N004 .1
R2 OUT N005 22.6K
L1 N004 OUT 1
C2 N001 0 2.2
C4 N007 0 220p Rser=16K
R1 N006 0 162K
Rload OUT 0 .66
V1 IN 0 12
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 400u startup
.lib LTC3605.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 944 680
WIRE 48 -64 -64 -64
WIRE 176 -64 48 -64
WIRE 304 -64 176 -64
WIRE -64 -48 -64 -64
WIRE 176 -48 176 -64
WIRE 304 -48 304 -64
WIRE 48 0 48 -64
WIRE 64 0 48 0
WIRE -64 48 -64 32
WIRE 448 80 416 80
WIRE 496 80 448 80
WIRE 576 80 560 80
WIRE 448 96 448 80
WIRE -16 160 -32 160
WIRE 64 160 48 160
WIRE 448 160 416 160
WIRE 448 176 448 160
WIRE 64 240 48 240
WIRE 448 240 416 240
WIRE 512 240 448 240
WIRE 608 240 592 240
WIRE 720 240 608 240
WIRE 816 240 720 240
WIRE 720 256 720 240
WIRE 816 256 816 240
WIRE 608 288 608 240
WIRE 608 288 448 288
WIRE 608 304 608 288
WIRE 448 320 448 288
WIRE 448 320 416 320
WIRE 720 352 720 320
WIRE 816 352 816 336
WIRE 608 400 608 384
WIRE 608 400 416 400
WIRE 608 416 608 400
WIRE -32 480 -48 480
WIRE 64 480 48 480
WIRE 448 480 416 480
WIRE 544 480 512 480
WIRE 608 512 608 496
WIRE 176 544 176 528
WIRE 304 544 304 528
SYMBOL res 592 288 R0
SYMATTR InstName R2
SYMATTR Value 22.6K
SYMBOL cap 432 176 R0
WINDOW 3 26 50 Left 2
WINDOW 0 24 12 Left 2
SYMATTR Value .1
SYMATTR InstName C3
SYMBOL res 800 240 R0
SYMATTR InstName Rload
SYMATTR Value .66
SYMBOL res 592 400 R0
SYMATTR InstName R3
SYMATTR Value 4.99K
SYMBOL schottky 432 96 R0
WINDOW 0 26 5 Left 2
WINDOW 3 37 49 Left 2
SYMATTR InstName D1
SYMATTR Value CMDSH2-3
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 48 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .001
SYMBOL voltage -64 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 64 464 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 162K
SYMBOL ind 496 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL PowerProducts\\LTC3605 240 240 R0
SYMATTR InstName U1
SYMBOL cap 448 496 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
WINDOW 39 -28 32 VBottom 2
SYMATTR InstName C4
SYMATTR Value 220p
SYMATTR SpiceLine Rser=16K
SYMBOL cap 704 256 R0
SYMATTR InstName C5
SYMATTR Value 100
SYMBOL cap 496 96 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 2.2
FLAG -64 48 0
FLAG 176 544 0
FLAG 304 544 0
FLAG -48 480 0
FLAG 48 240 0
FLAG -32 160 0
FLAG 576 80 0
FLAG 608 512 0
FLAG 544 480 0
FLAG 720 352 0
FLAG 816 352 0
FLAG -64 -64 IN
FLAG 816 240 OUT
TEXT 712 440 Left 2 !.tran 400u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7118-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7118-2.5.asy)
V1 IN 0 3.5
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=2.5 ;pnba Vin)Sense)EN)SS)Vout)GND
C1 OUT 0 2.2 Rser=1.5m
C2 N001 0 4.7n
Rload OUT 0 20
.tran 6m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL ADP7118-2.5 224 128 R0
SYMATTR InstName U1
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.5
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\63fc67c049bb_Fig9_32.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 0 N_50n l=100n w=2.5u
VGS N002 0 350m
VDS N001 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VDS 0 1
.include cmosedu_models.txt
* Plot 1/d(Id(M1)) to get ro
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 640 80 448 80
WIRE 448 112 448 80
WIRE 640 112 640 80
WIRE 496 160 448 160
WIRE 400 192 288 192
WIRE 288 208 288 192
WIRE 448 224 448 208
WIRE 640 224 640 192
WIRE 288 304 288 288
FLAG 288 304 0
FLAG 448 224 0
FLAG 640 224 0
FLAG 496 160 0
SYMBOL nmos4 400 112 R0
WINDOW 0 59 18 Left 0
WINDOW 3 64 75 Left 0
WINDOW 123 64 103 Left 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=100n w=2.5u
SYMBOL voltage 288 192 R0
WINDOW 0 -90 57 Left 0
WINDOW 3 -90 85 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 350m
SYMBOL voltage 640 96 R0
WINDOW 0 41 55 Left 0
WINDOW 3 41 83 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 0
TEXT 384 272 Left 0 !.dc VDS 0 1 
TEXT 384 296 Left 0 !.include cmosedu_models.txt
TEXT 416 56 Left 0 ;Plot 1/d(Id(M1)) to get ro
* Z:\home\khalils\Downloads\files\data\raw_asc\25cfb85bd944_Exp_4.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N004 N003 1K
R2 N002 N001 1K
Q1 N001 N004 0 0 BC547B
VCE N002 0 5 Rser=0.001
VBE N003 0 3
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VBE 0 1 0.1 VCE 0 5 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 -16 224 -16
WIRE 512 -16 416 -16
WIRE 224 96 224 -16
WIRE 512 96 512 -16
WIRE 16 144 -128 144
WIRE 160 144 96 144
WIRE -128 192 -128 144
WIRE -128 304 -128 272
WIRE 224 304 224 192
WIRE 224 304 -128 304
WIRE 368 304 224 304
WIRE 512 304 512 176
WIRE 512 304 368 304
SYMBOL voltage -128 176 R0
SYMATTR InstName VBE
SYMATTR Value 3
SYMBOL res 112 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 512 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName VCE
SYMATTR Value 5
SYMATTR SpiceLine Rser=0.001
SYMBOL npn 160 96 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL res 432 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
FLAG 368 304 0
TEXT -162 328 Left 2 !.dc VBE 0 1 0.1 VCE 0 5 1
* Z:\home\khalils\Downloads\files\data\raw_asc\367abc4dfab6_IdealDiode.asc
* Generated by LTspice 26.0.1 for Windows.
Q2 N002 N001 vload 0 2N3906
RLOAD vload 0 500
R2 N002 0 100k
Q1 N001 N001 vin 0 2N3906
R1 N001 0 65k
M1 vin N002 vload vload FDS6575
VEXT vout 0 PULSE(4.3 5 1m 4m 4m 1m 12 1)
VUSB vin 0 4.5
D1 vout vload 1N5817
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 12m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1132 680
WIRE 96 -128 -96 -128
WIRE 144 -128 96 -128
WIRE 304 -128 240 -128
WIRE 544 -128 304 -128
WIRE 608 -128 544 -128
WIRE 720 -128 672 -128
WIRE -96 -32 -96 -128
WIRE 544 -16 544 -128
WIRE 720 -16 720 -128
WIRE 96 16 96 -128
WIRE 304 16 304 -128
WIRE 176 64 160 64
WIRE 240 64 176 64
WIRE 96 128 96 112
WIRE 176 128 176 64
WIRE 176 128 96 128
WIRE 224 144 224 -80
WIRE 304 144 304 112
WIRE 304 144 224 144
WIRE 96 176 96 128
WIRE 304 176 304 144
SYMBOL res 288 160 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res 80 160 R0
SYMATTR InstName R1
SYMATTR Value 65k
SYMBOL pnp 240 112 M180
SYMATTR InstName Q2
SYMATTR Value 2N3906
SYMBOL pmos 144 -80 R270
SYMATTR InstName M1
SYMATTR Value FDS6575
SYMBOL voltage -96 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VUSB
SYMATTR Value 4.5
SYMBOL schottky 672 -144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL pnp 160 112 R180
SYMATTR InstName Q1
SYMATTR Value 2N3906
SYMBOL res 528 -32 R0
SYMATTR InstName RLOAD
SYMATTR Value 500
SYMBOL voltage 720 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VEXT
SYMATTR Value PULSE(4.3 5 1m 4m 4m 1m 12 1)
FLAG 96 256 0
FLAG 304 256 0
FLAG -96 48 0
FLAG 544 64 0
FLAG 720 64 0
FLAG -96 -128 vin
FLAG 720 -128 vout
FLAG 544 -128 vload
TEXT -128 280 Left 2 !.tran 12m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3410.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3410.asy)
XU1 IN 0 N001 IN MP_01 N002 LTC3410 ;pnba Run)GND)SW)Vin))FB
R2 N002 0 412K
C2 OUT 0 4.7
Rload OUT 0 100
R1 OUT N002 887K
V1 IN 0 5
L1 N001 OUT 4.7
C1 OUT N002 10p
.tran 250u startup
.lib LTC3410.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 700
WIRE 192 64 112 64
WIRE 352 64 192 64
WIRE 112 80 112 64
WIRE 352 80 352 64
WIRE 192 144 192 64
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 608 144 592 144
WIRE 704 144 608 144
WIRE 800 144 704 144
WIRE 896 144 800 144
WIRE 800 160 800 144
WIRE 896 160 896 144
WIRE 112 176 112 160
WIRE 608 176 608 144
WIRE 704 176 704 144
WIRE 800 256 800 224
WIRE 896 256 896 240
WIRE 608 304 608 256
WIRE 608 304 496 304
WIRE 704 304 704 240
WIRE 704 304 608 304
WIRE 608 320 608 304
WIRE 352 384 352 368
WIRE 608 416 608 400
SYMBOL res 592 304 R0
SYMATTR InstName R2
SYMATTR Value 412K
SYMBOL res 592 160 R0
SYMATTR InstName R1
SYMATTR Value 887K
SYMBOL RES 880 144 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL PowerProducts\\LTC3410 352 224 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 112 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL cap 688 176 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL cap 784 160 R0
SYMATTR InstName C2
SYMATTR Value 4.7
FLAG 112 176 0
FLAG 352 384 0
FLAG 800 256 0
FLAG 896 256 0
FLAG 608 416 0
FLAG 112 64 IN
FLAG 896 144 OUT
TEXT 728 352 Left 2 !.tran 250u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1001S8.asc
* Generated by LTspice 26.0.1 for Windows.
* Precision Absolute Value Circuit
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001S8.asy)
R5 OUT N003 10K
V1 +V 0 15
XU1 0 N001 +V -V N004 LT1001 ;pnba In+)In-)V+)V-)OUT
D2 N004 N005 1N4148
R3 N005 N001 10K
V2 -V 0 -15
XU2 N005 N003 +V -V OUT LT1001 ;pnba In+)In-)V+)V-)OUT
R1 N002 N001 10K
R4 N003 N002 10K
R2 N001 IN 10K
D1 N002 N004 1N4148
V3 IN 0 SINE(0 10 100)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -16 96 -128 96
WIRE 112 96 64 96
WIRE 160 96 112 96
WIRE 336 96 240 96
WIRE 384 96 336 96
WIRE 480 96 464 96
WIRE 496 96 480 96
WIRE 608 96 576 96
WIRE -128 112 -128 96
WIRE 336 128 336 96
WIRE -128 208 -128 192
WIRE 192 208 192 192
WIRE 528 208 528 192
WIRE 112 224 112 96
WIRE 160 224 112 224
WIRE 480 224 480 96
WIRE 496 224 480 224
WIRE 336 240 336 192
WIRE 336 240 224 240
WIRE 608 240 608 96
WIRE 608 240 560 240
WIRE 640 240 608 240
WIRE 160 256 144 256
WIRE 496 256 480 256
WIRE 192 288 192 272
WIRE 336 288 336 240
WIRE 528 288 528 272
WIRE -96 336 -96 320
WIRE 0 336 0 320
WIRE 112 384 112 224
WIRE 160 384 112 384
WIRE 336 384 336 352
WIRE 336 384 240 384
WIRE 480 384 480 256
WIRE 480 384 336 384
WIRE -96 432 -96 416
WIRE 0 432 0 416
SYMBOL res 592 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10K
SYMBOL voltage 0 320 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 480 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 256 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL voltage -96 320 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL diode 320 128 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage -128 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 10 100)
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL diode 320 288 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL opamps\\LT1001S8 192 176 R0
SYMATTR InstName U1
SYMBOL opamps\\LT1001S8 528 176 R0
SYMATTR InstName U2
SYMBOL res 80 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 0 432 0
FLAG 192 192 +V
FLAG 0 320 +V
FLAG 192 288 -V
FLAG -96 432 0
FLAG -96 320 -V
FLAG -128 208 0
FLAG 528 192 +V
FLAG 528 288 -V
FLAG 144 256 0
FLAG -128 96 IN
FLAG 640 240 OUT
TEXT 536 352 Left 2 !.tran 30m
TEXT 256 40 Bottom 2 ;Precision Absolute Value Circuit
* Z:\home\khalils\Downloads\files\data\raw_asc\085024c4c043_SM881K04L_Model.asc
* Generated by LTspice 26.0.1 for Windows.
B1 0 N001 I=ipv_t*V(illu)/1000
V1 illu 0 {illu}
I1 vout 0 PULSE(0 365m 0 1 1)
R1 illu 0 100Meg
R3 0 N001 R=rsh_t
R2 vout N001 R=rs_t
D1 N001 0 pvdiode2
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model PVDiode2 D(Is=io_t N=a_n Tnom=temp)
.param temp 25
.param rs_t 9.67e-2
.param rsh_t 5.02e2
.param io_t 2.86e-10
.param a_n 5.13
.param ipv_t 3.65e-1
.step param illu 100 1000 100
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1892 756
WIRE 976 80 640 80
WIRE 1280 80 976 80
WIRE 1408 80 1280 80
WIRE 1584 80 1488 80
WIRE 1616 80 1584 80
WIRE 208 96 128 96
WIRE 288 96 208 96
WIRE 640 144 640 80
WIRE 1616 144 1616 80
WIRE 976 160 976 80
WIRE 1280 160 1280 80
WIRE 128 176 128 96
WIRE 288 176 288 96
WIRE 640 288 640 224
WIRE 976 288 976 224
WIRE 1280 288 1280 240
WIRE 128 304 128 256
WIRE 288 304 288 256
WIRE 1616 304 1616 224
SYMBOL res 272 160 R0
SYMATTR InstName R1
SYMATTR Value 100Meg
SYMBOL diode 960 160 R0
SYMATTR InstName D1
SYMATTR Value pvdiode2
SYMBOL voltage 128 160 R0
SYMATTR InstName V1
SYMATTR Value {illu}
SYMBOL bi2 640 144 R0
SYMATTR InstName B1
SYMATTR Value I=ipv_t*V(illu)/1000
SYMBOL current 1616 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value PULSE(0 365m 0 1 1)
SYMBOL res 1296 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value R=rsh_t
SYMBOL res 1504 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value R=rs_t
FLAG 128 304 0
FLAG 288 304 0
FLAG 208 96 illu
FLAG 1616 304 0
FLAG 1280 288 0
FLAG 976 288 0
FLAG 640 288 0
FLAG 1584 80 vout
TEXT 904 -104 Left 2 !.model PVDiode2 D(Is=io_t N=a_n Tnom=temp)
TEXT 408 -200 Left 2 !.param temp 25\n \n.param rs_t 9.67e-2\n.param rsh_t 5.02e2 \n.param io_t 2.86e-10\n.param a_n 5.13\n.param ipv_t 3.65e-1
TEXT 864 -256 Left 2 !.step param illu 100 1000 100
TEXT 480 -392 Left 2 !.tran 1