Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\39c920823f0c_Trabalho2.asc
* Generated by LTspice 26.0.1 for Windows.
Rd N001 Vout 10k
Vgs N002 0 SINE(0 0 1k)
M1 Vout N002 0 N003 N_1u l=1.5u w=3u
Vd N001 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vgs 0 5 0.01
.include cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 -160 144 -160
WIRE 144 -144 144 -160
WIRE 192 -96 144 -96
WIRE 288 -16 288 -160
WIRE 288 -16 192 -16
WIRE 144 16 144 -96
WIRE 144 128 144 96
WIRE 224 128 144 128
WIRE 64 176 -32 176
WIRE 176 176 144 176
WIRE 64 208 64 176
WIRE 96 208 64 208
WIRE 176 208 176 176
WIRE 176 208 144 208
WIRE 144 272 144 224
WIRE -32 304 -32 256
SYMBOL voltage 192 -112 R0
SYMATTR InstName Vd
SYMATTR Value 5
SYMBOL voltage -32 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vgs
SYMATTR Value SINE(0 0 1k)
SYMBOL res 128 0 R0
SYMATTR InstName Rd
SYMATTR Value 10k
SYMBOL nmos4 96 128 R0
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=1.5u w=3u
FLAG -32 304 0
FLAG 144 272 0
FLAG 144 -144 0
FLAG 224 128 Vout
TEXT 64 336 Left 2 !.dc Vgs 0 5 0.01
TEXT -240 -32 Left 2 !.include cmosedu_models.txt
* Z:\home\khalils\Downloads\files\data\raw_asc\01fc23406ef9_memristor.asc
* Generated by LTspice 26.0.1 for Windows.
* L(y) is the length of the doped area
* dr/dt ( y ) is the derivative of the resistance
* Ron (doped) : .\n \nRoff (undoped) : .\n \nLength of the Device (D) : Lo
* Latex equations:\nL_{(y)} = L_0 - L_0 \\cdot \\frac{m}{y}\nR = 10^3 \\cdot \\frac{f_0}{L_0} \\cdot e^{2 \\cdot L_0}\n \nI = \\frac{d r( V_{(+)} -V_{(-)} )}{d t} \\cdot u(V_{(+)} - V_{(-)}) \\cdot u(V_{(r)} - r_{min}) + u(-(V_{(+)} - V_{(-)} )) \\cdot u(r_{max}-V_{(r)})\nI = \\frac{V_{(+)} - V_{(-)}}{ \\frac{ f_0 }{ L_{V_{r}} } \\cdot e^{2 \\cdot L_{V_{(r)}} } }
Bpm plus minus I={(V(plus)-V(minus))/((fo*exp(2*L(V(r))))/L(V(r)))}
Br 0 r I={dr_dt(V(plus)-V(minus))*(u(V(plus)-V(minus))*u(V(r)-rmin)+u(-(V(plus)-V(minus)))*u(rmax-V(r)))}
Rpm plus minus {1000*((fo*exp(2*Lo))/Lo)}
Raux r 0 1e12
Cr r 0 1
.ic v(r)={rinit}
.func dr_dt(y) {-alpha *((y-VtL)/(gamma+abs(y-VtL)))*u(-y+VtL)-beta*y*u(y-VtL)*u(-y+VtR)-alpha*((y-VtR)/(gamma+abs(y-VtR)))*u(y-VtR)}
.func L(y) {Lo-Lo*m/y}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3888 680
WIRE 1872 32 1664 32
WIRE 1936 32 1872 32
WIRE 2224 32 1936 32
WIRE 1664 128 1664 32
WIRE 1936 144 1936 32
WIRE 2224 144 2224 32
WIRE 496 176 496 16
WIRE 720 176 496 176
WIRE 496 256 496 176
WIRE 720 256 720 176
WIRE 1664 320 1664 208
WIRE 1936 320 1936 208
WIRE 1936 320 1664 320
WIRE 2224 320 2224 224
WIRE 2224 320 1936 320
WIRE 1936 384 1936 320
WIRE 496 448 496 336
WIRE 720 448 720 336
WIRE 720 448 496 448
WIRE 496 512 496 448
SYMBOL cap 1920 144 R0
SYMATTR InstName Cr
SYMATTR Value 1
SYMBOL bi 496 256 R0
WINDOW 3 74 298 Left 2
SYMATTR Value I={(V(plus)-V(minus))/((fo*exp(2*L(V(r))))/L(V(r)))}
SYMATTR InstName Bpm
SYMBOL res 704 240 R0
SYMATTR InstName Rpm
SYMATTR Value {1000*((fo*exp(2*Lo))/Lo)}
SYMBOL res 2208 128 R0
SYMATTR InstName Raux
SYMATTR Value 1e12
SYMBOL bi 1664 208 R180
WINDOW 0 24 80 Left 2
WINDOW 3 -60 -298 Left 2
SYMATTR InstName Br
SYMATTR Value I={dr_dt(V(plus)-V(minus))*(u(V(plus)-V(minus))*u(V(r)-rmin)+u(-(V(plus)-V(minus)))*u(rmax-V(r)))}
FLAG 496 16 plus
FLAG 496 512 minus
FLAG 1936 384 0
FLAG 1872 32 r
TEXT 1752 -24 Left 2 !.ic v(r)={rinit}
TEXT 808 -232 Left 2 !.func dr_dt(y) {-alpha *((y-VtL)/(gamma+abs(y-VtL)))*u(-y+VtL)-beta*y*u(y-VtL)*u(-y+VtR)-alpha*((y-VtR)/(gamma+abs(y-VtR)))*u(y-VtR)}\n.func L(y) {Lo-Lo*m/y}
TEXT 808 -168 Left 2 ;L(y) is the length of the doped area
TEXT 808 -272 Left 2 ;dr/dt ( y  ) is the derivative of the resistance
TEXT 208 -264 Left 2 ;Ron (doped) : .\n \nRoff (undoped) : .\n \nLength of the Device (D) : Lo
TEXT 2136 408 Left 2 ;Latex equations:\nL_{(y)} = L_0 - L_0 \\cdot \\frac{m}{y}\nR = 10^3 \\cdot \\frac{f_0}{L_0} \\cdot e^{2 \\cdot L_0}\n \nI = \\frac{d r( V_{(+)} -V_{(-)} )}{d t} \\cdot u(V_{(+)} - V_{(-)}) \\cdot u(V_{(r)} - r_{min}) + u(-(V_{(+)} - V_{(-)} )) \\cdot u(r_{max}-V_{(r)})\nI = \\frac{V_{(+)} - V_{(-)}}{ \\frac{ f_0 }{ L_{V_{r}} } \\cdot e^{2 \\cdot L_{V_{(r)}} } }
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2935-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2935-3.asy)
V1 N001 0 PWL(0 0 3.6 3.6 16 3.6 19.6 0 20.1 0 23.7 3.6)
XU1 0 0 0 0 N003 N002 N004 N001 LTC2935-3 ;pnba S2)S1)S0)GND)_PFO)_RST)MR)VCC
V2 N005 0 PWL(0 0 9.499 0 9.5 5 10.5 5 10.501 0)
MQ1 N004 N005 0 0 BSS123
R1 N001 N002 10K
R2 N001 N003 10K
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 20
.lib LTC2935-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1064 680
WIRE 240 -16 -208 -16
WIRE 368 -16 240 -16
WIRE 464 -16 368 -16
WIRE 368 0 368 -16
WIRE 464 0 464 -16
WIRE 240 48 240 -16
WIRE 144 96 128 96
WIRE 368 96 368 80
WIRE 368 96 336 96
WIRE 144 176 128 176
WIRE 464 176 464 80
WIRE 464 176 336 176
WIRE 144 256 128 256
WIRE 384 256 336 256
WIRE 384 272 384 256
WIRE -208 320 -208 -16
WIRE 240 320 240 304
WIRE 528 352 432 352
WIRE 384 384 384 368
WIRE 528 384 528 352
WIRE -208 416 -208 400
WIRE 528 480 528 464
SYMBOL voltage -208 304 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 3.6 3.6 16 3.6 19.6 0 20.1 0 23.7 3.6)
SYMBOL res 352 -16 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL LTC2935-3 240 176 R0
SYMATTR InstName U1
SYMBOL res 448 -16 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL nmos 432 272 M0
WINDOW 0 26 -6 Right 2
WINDOW 3 20 104 Right 2
SYMATTR InstName Q1
SYMATTR Value BSS123
SYMBOL voltage 528 368 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR Value PWL(0 0 9.499 0 9.5 5 10.5 5 10.501 0)
SYMATTR InstName V2
FLAG 240 320 0
FLAG -208 416 0
FLAG 384 384 0
FLAG 528 480 0
FLAG 128 96 0
FLAG 128 176 0
FLAG 128 256 0
TEXT 248 488 Left 2 !.tran 20
* Z:\home\khalils\Downloads\files\data\raw_asc\193bb0400c8d_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp1.asy)
V1 +5v 0 5
V2 -5v 0 -5
XU1 out N001 +5v -5v out level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V3 N001 0 PWL(0 0 1m 1 3m 3)
.tran 1s
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 160 272 144
WIRE 240 176 32 176
WIRE 32 192 32 176
WIRE 416 192 304 192
WIRE 464 192 416 192
WIRE 480 192 464 192
WIRE 240 208 176 208
WIRE 272 240 272 224
WIRE 176 288 176 208
WIRE 416 288 416 192
WIRE 416 288 176 288
WIRE 32 304 32 272
SYMBOL voltage 224 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL OpAmps\\UniversalOpAmp1 272 192 R0
SYMATTR InstName U1
SYMBOL voltage 368 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 32 176 R0
WINDOW 3 -110 159 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PWL(0 0 1m 1 3m 3)
FLAG 224 96 0
FLAG 368 96 0
FLAG 224 16 +5v
FLAG 368 16 -5v
FLAG 272 240 -5v
FLAG 272 144 +5v
FLAG 32 304 0
FLAG 464 192 out
TEXT -72 360 Left 2 !.tran 1s
* Z:\home\khalils\Downloads\files\data\raw_asc\5bc275d26aba_1002.asc
* Generated by LTspice 26.0.1 for Windows.
* Two Op Amp Instrumentation Amplifier
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1002.asy)
V3 IN- IN+ SINE(0 1m 100)
XU1 IN- N001 +V -V N003 LT1001 ;pnba In+)In-)V+)V-)OUT
XU2 IN+ N002 +V -V OUT LT1001 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
R2 N001 0 100K
R5 OUT N002 100K
R4 N002 N003 10K
V4 IN+ 0 SINE(0 1 10)
V2 -V 0 -15
R3 N002 N001 2.2K
R1 N003 N001 10K
.tran 300m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 272 48 128 48
WIRE 384 48 352 48
WIRE 416 48 384 48
WIRE 528 48 496 48
WIRE -256 64 -256 48
WIRE -128 64 -128 48
WIRE 32 112 16 112
WIRE 128 112 128 48
WIRE 128 112 112 112
WIRE 160 112 128 112
WIRE 272 112 240 112
WIRE -256 160 -256 144
WIRE -128 160 -128 144
WIRE 192 208 192 192
WIRE 128 224 128 112
WIRE 160 224 128 224
WIRE 432 224 432 208
WIRE 272 240 272 112
WIRE 272 240 224 240
WIRE 288 240 272 240
WIRE 384 240 384 48
WIRE 384 240 368 240
WIRE 400 240 384 240
WIRE 48 256 -96 256
WIRE 160 256 48 256
WIRE 528 256 528 48
WIRE 528 256 464 256
WIRE 560 256 528 256
WIRE -96 272 -96 256
WIRE 400 272 384 272
WIRE 192 288 192 272
WIRE 432 304 432 288
WIRE -96 384 -96 352
WIRE 192 384 -96 384
WIRE 384 384 384 272
WIRE 384 384 192 384
WIRE -96 400 -96 384
WIRE -96 496 -96 480
SYMBOL res 384 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 368 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2.2K
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -128 48 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL voltage -256 48 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -96 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1m 100)
SYMBOL voltage -96 384 R0
SYMATTR InstName V4
SYMATTR Value SINE(0 1 10)
SYMBOL res 512 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 100K
SYMBOL opamps\\LT1002 432 192 R0
SYMATTR InstName U2
SYMBOL opamps\\LT1002 192 176 R0
SYMATTR InstName U1
FLAG -128 160 0
FLAG 192 192 +V
FLAG -128 48 +V
FLAG 192 288 -V
FLAG -256 160 0
FLAG -256 48 -V
FLAG 16 112 0
FLAG -96 496 0
FLAG 432 208 +V
FLAG 432 304 -V
FLAG 48 256 IN-
FLAG 192 384 IN+
FLAG 560 256 OUT
TEXT 440 392 Left 2 !.tran 300m
TEXT -32 -32 Left 2 ;Two Op Amp Instrumentation Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8627SP.asc
* Generated by LTspice 26.0.1 for Windows.
* 2MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8627SP.asy)
XU1 SW N004 0 CLKout IN NC_01 IN IN N004 N004 SET N003 OUT PGFB N001 PG LT8627SP ;pnba SW)Sync/Mode)GND)CLKout)PVin)BST)SVin)EN/UVLO)INTVcc)PHMode)SET)Vc)OUTS)PGFB)RT)PG
Rload OUT 0 62.5m
C1 SET 0 1
R3 OUT PGFB 49.9k
R2 PGFB 0 49.9k
R1 N001 0 47k
R4 N002 N003 2k
R6 OUT PG 100k
C3 N002 0 2.2n
V1 IN 0 12
L1 SW OUT 330n Rser=6m
C2 OUT 0 470 Rser=5m
R5 SET 0 10k
.tran 1.5m startup
.lib LT8627SP.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1080 680
WIRE 96 -128 -64 -128
WIRE 272 -128 96 -128
WIRE -64 -112 -64 -128
WIRE 272 -112 272 -128
WIRE 96 -64 96 -128
WIRE 128 -64 96 -64
WIRE -64 -16 -64 -32
WIRE 96 32 96 -64
WIRE 128 32 96 32
WIRE 448 32 416 32
WIRE 512 32 448 32
WIRE 688 32 592 32
WIRE -32 128 -64 128
WIRE 128 128 48 128
WIRE 448 128 416 128
WIRE 512 128 448 128
WIRE 688 128 688 32
WIRE 688 128 592 128
WIRE 768 128 688 128
WIRE 880 128 768 128
WIRE 976 128 880 128
WIRE 976 144 976 128
WIRE 880 160 880 128
WIRE 768 176 768 128
WIRE -80 224 -96 224
WIRE 16 224 -16 224
WIRE 128 224 96 224
WIRE 688 224 688 128
WIRE 688 224 416 224
WIRE 880 240 880 224
WIRE 976 240 976 224
WIRE 128 320 96 320
WIRE 464 320 416 320
WIRE 768 320 768 256
WIRE 768 320 464 320
WIRE 768 336 768 320
WIRE 96 416 96 320
WIRE 128 416 96 416
WIRE 448 416 416 416
WIRE 560 416 448 416
WIRE 672 416 560 416
WIRE 672 432 672 416
WIRE 768 432 768 416
WIRE 560 448 560 416
WIRE 96 512 96 416
WIRE 128 512 96 512
WIRE 448 512 416 512
WIRE 560 528 560 512
WIRE 672 528 672 512
WIRE 272 592 272 576
SYMBOL res 752 320 R0
SYMATTR InstName R2
SYMATTR Value 49.9k
SYMBOL voltage -64 -128 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 544 448 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ind 496 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 330n
SYMATTR SpiceLine Rser=6m
SYMBOL LT8627SP 272 192 R0
SYMATTR InstName U1
SYMBOL res 0 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 2k
SYMBOL cap -16 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 2.2n
SYMBOL res 656 416 R0
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL cap 864 160 R0
SYMATTR InstName C2
SYMATTR Value 470
SYMATTR SpiceLine Rser=5m
SYMBOL res 64 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 47k
SYMBOL res 752 160 R0
SYMATTR InstName R3
SYMATTR Value 49.9k
SYMBOL res 608 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 100k
SYMBOL res 960 128 R0
SYMATTR InstName Rload
SYMATTR Value 62.5m
FLAG -64 -16 0
FLAG -64 128 0
FLAG 272 592 0
FLAG 768 432 0
FLAG 976 240 0
FLAG -96 224 0
FLAG 976 128 OUT
FLAG -64 -128 IN
FLAG 672 528 0
FLAG 560 528 0
FLAG 880 240 0
FLAG 448 512 CLKout
FLAG 448 32 PG
FLAG 448 128 SW
FLAG 464 320 PGFB
FLAG 448 416 SET
TEXT 728 552 Left 2 !.tran 1.5m startup
TEXT 56 112 Left 2 ;2MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4099-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4099-1.asy)
R3 N002 N003 1.25k
R4 N002 N004 5k
R2 N001 0 5k
Vref N003 0 2.5
XU1 N002 N001 V+ 0 OUT 0 ADA4099-1 ;pnba In+)In-)V+)V-)OUT)SD
V1 V+ 0 5
Vin N004 0 SINE(0 10 2k)
R1 N001 OUT 1.25k
.tran 2000u
.lib ADA4099-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 704
WIRE 336 -32 -176 -32
WIRE -304 64 -304 32
WIRE -64 64 -128 64
WIRE 80 64 16 64
WIRE 160 160 160 144
WIRE -304 176 -304 144
WIRE -176 176 -176 -32
WIRE -64 176 -176 176
WIRE 80 176 80 64
WIRE 80 176 16 176
WIRE 144 176 80 176
WIRE 336 192 336 -32
WIRE 336 192 208 192
WIRE 400 192 336 192
WIRE 432 192 400 192
WIRE 144 208 80 208
WIRE 160 240 160 224
WIRE 192 240 192 224
WIRE 192 240 160 240
WIRE 160 256 160 240
WIRE -64 320 -304 320
WIRE 80 320 80 208
WIRE 80 320 16 320
WIRE -64 432 -176 432
WIRE 80 432 80 320
WIRE 80 432 16 432
WIRE -304 496 -304 320
WIRE -176 496 -176 432
WIRE -304 624 -304 576
WIRE -176 624 -176 576
SYMBOL res 32 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5k
SYMBOL voltage -304 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 32 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1.25k
SYMBOL voltage -176 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value SINE(0 10 2k)
SYMBOL res 32 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 5k
SYMBOL res 32 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1.25k
SYMBOL ADA4099-1 176 192 R0
SYMATTR InstName U1
SYMBOL voltage -304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vref
SYMATTR Value 2.5
FLAG -304 176 0
FLAG -304 32 V+
FLAG 160 144 V+
FLAG -176 624 0
FLAG 400 192 OUT
FLAG -128 64 0
FLAG 160 256 0
FLAG -304 624 0
TEXT -336 688 Left 2 !.tran 2000u
* Z:\home\khalils\Downloads\files\data\raw_asc\1d9b6b8aa757_inv_20_10.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Out In 0 0 nfet l=180n w=360n
V1 N001 0 1.8
M2 Out In N001 N001 pfet l=180n w=720n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib osu018.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1196 680
WIRE 448 -432 256 -432
WIRE 256 -400 256 -432
WIRE 448 -304 448 -432
WIRE 464 -304 448 -304
WIRE 400 -288 368 -288
WIRE 464 -256 464 -304
WIRE 464 -256 448 -256
WIRE 368 -176 368 -288
WIRE 368 -176 304 -176
WIRE 448 -176 448 -208
WIRE 624 -176 448 -176
WIRE 464 -128 448 -128
WIRE 368 -96 368 -176
WIRE 400 -96 368 -96
WIRE 464 -80 464 -128
WIRE 464 -80 448 -80
WIRE 448 -32 448 -80
IOPIN 304 -176 In
IOPIN 624 -176 Out
SYMBOL pmos4 400 -208 M180
WINDOW 0 116 21 Right 2
WINDOW 3 151 49 Right 2
WINDOW 123 206 76 Right 2
SYMATTR InstName M2
SYMATTR Value pfet
SYMATTR Value2 l=180n w=720n
SYMBOL voltage 256 -416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL nmos4 400 -176 R0
WINDOW 0 119 20 Right 2
WINDOW 3 157 46 Right 2
WINDOW 123 238 76 Right 2
SYMATTR InstName M1
SYMATTR Value nfet
SYMATTR Value2 l=180n w=360n
FLAG 304 -176 In
FLAG 624 -176 Out
FLAG 448 -32 0
FLAG 256 -320 0
TEXT 504 8 Left 2 !.lib osu018.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\1008ca164cd9_1.3.1.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N004 N003 0 0 MC14007_N
VDD N001 0 5
Vi N003 0
M2 N002 N003 N004 N004 MC14007_P
R1 N001 N002 1K
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model MC14007_N NMOS (Vto=1.6 Kp=1.1m
.model MC14007_P PMOS (Vto=-1.3 Kp=1.4m)
.dc Vi 0 5 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -128 -432 -432 -432
WIRE -432 -400 -432 -432
WIRE -432 -256 -432 -320
WIRE -352 -256 -432 -256
WIRE -432 -240 -432 -256
WIRE -480 -160 -624 -160
WIRE -432 -80 -432 -144
WIRE -352 -80 -432 -80
WIRE -128 -64 -128 -432
WIRE -432 -32 -432 -80
WIRE -624 48 -624 -160
WIRE -480 48 -624 48
WIRE -624 176 -624 48
WIRE -624 320 -624 256
WIRE -432 320 -432 64
WIRE -432 320 -624 320
WIRE -128 320 -128 16
WIRE -128 320 -432 320
WIRE -432 368 -432 320
FLAG -432 368 0
SYMBOL nmos -480 -32 R0
SYMATTR InstName M1
SYMATTR Value MC14007_N
SYMBOL voltage -128 -80 R0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL voltage -624 160 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value ""
SYMATTR InstName Vi
SYMBOL pmos -480 -240 R0
SYMATTR InstName M2
SYMATTR Value MC14007_P
SYMBOL res -448 -416 R0
SYMATTR InstName R1
SYMATTR Value 1K
TEXT 144 -16 Left 1 !.model MC14007_N NMOS (Vto=1.6 Kp=1.1m
TEXT 144 40 Left 1 !.model MC14007_P PMOS (Vto=-1.3 Kp=1.4m)
TEXT -656 392 Left 2 !.dc Vi 0 5 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\0e09fff953b6_rtl.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 5
Q1 Vo N003 0 0 BC547C
V1 N002 0 5
R2 Vo N001 10k
R1 N003 N002 470k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 -16 -176 -16
WIRE 240 0 240 -16
WIRE 400 80 240 80
WIRE 240 96 240 80
WIRE 80 144 16 144
WIRE 176 144 160 144
WIRE -176 208 -176 -16
WIRE 16 208 16 144
WIRE -176 320 -176 288
WIRE 16 320 16 288
WIRE 240 320 240 192
SYMBOL res 176 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 470k
SYMBOL res 256 96 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage -176 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL npn 176 96 R0
SYMATTR InstName Q1
SYMATTR Value BC547C
SYMBOL voltage 16 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -176 320 0
FLAG 16 320 0
FLAG 240 320 0
FLAG 400 80 Vo
TEXT -210 344 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1118-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1118-5.asy)
XU1 0 MP_01 N001 MP_02 N001 N002 LT1118-5 ;pnba GND))EN))IN)OUT
C1 N002 0 1
V1 N001 0 10
.tran 3m startup
.lib LT1118.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 112 -32 112
WIRE 96 112 80 112
WIRE 416 112 352 112
WIRE -32 128 -32 112
WIRE 416 128 416 112
WIRE 416 208 416 192
WIRE -32 224 -32 208
WIRE 80 224 80 112
WIRE 96 224 80 224
WIRE 224 288 224 272
SYMBOL PowerProducts\\LT1118-5 224 176 R0
SYMATTR InstName U1
SYMBOL cap 400 128 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -32 112 R0
SYMATTR InstName V1
SYMATTR Value 10
FLAG 224 288 0
FLAG -32 224 0
FLAG 416 208 0
TEXT 408 312 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3ccb2135891b_1178A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1178A.asy)
R2 N001 0 5K
XU1 N003 N001 +V 0 N002 LT1178 ;pnba In+)In-)V+)V-)OUT
V3 N003 0 SINE(1.25 .1 1K)
R1 N002 N001 5K
V1 +V 0 5
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -192 176 -192 160
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE -192 288 -192 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL voltage -192 160 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL opamps\\LT1178A 192 176 R0
SYMATTR InstName U1
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(1.25 .1 1K)
FLAG -192 288 0
FLAG 192 192 +V
FLAG -192 160 +V
FLAG 16 96 0
FLAG 0 368 0
FLAG 192 288 0
TEXT 246 322 Left 0 !.tran 3m