Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1078A.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
R1 N002 N001 200K
R2 N001 IN 200K
V3 IN 0 SINE(0 1 100)
D1 N003 N002 1N4148
XU1 0 N001 +V 0 N003 LT1078 ;pnba In+)In-)V+)V-)OUT
XU2 N002 OUT +V 0 OUT LT1078 ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
* Absolute Value Circuit(Full-Wave Rectifier)
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1078A.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 -80 96
WIRE 128 96 112 96
WIRE 224 96 128 96
WIRE 416 96 304 96
WIRE -80 112 -80 96
WIRE 544 128 432 128
WIRE -192 160 -192 144
WIRE 480 192 480 176
WIRE -80 208 -80 192
WIRE 192 208 192 192
WIRE 432 208 432 128
WIRE 448 208 432 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 544 224 544 128
WIRE 544 224 512 224
WIRE 576 224 544 224
WIRE 336 240 224 240
WIRE 416 240 416 96
WIRE 416 240 400 240
WIRE 448 240 416 240
WIRE -192 256 -192 240
WIRE 160 256 128 256
WIRE 480 272 480 256
WIRE 192 288 192 272
FLAG -192 256 0
FLAG 192 192 +V
FLAG -192 144 +V
FLAG -80 208 0
FLAG 192 288 0
FLAG 480 176 +V
FLAG 480 272 0
FLAG -80 96 IN
FLAG 576 224 OUT
FLAG 128 256 0
SYMBOL voltage -192 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 320 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200K
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL voltage -80 96 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
SYMBOL diode 336 256 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL opamps\\LT1078A 192 176 R0
SYMATTR InstName U1
SYMBOL opamps\\LT1078A 480 160 R0
SYMATTR InstName U2
TEXT 448 336 Left 2 !.tran 30m
TEXT 392 32 Bottom 2 ;Absolute Value Circuit(Full-Wave Rectifier)
* Z:\home\khalils\Downloads\files\data\raw_asc\1813c96015ff_AD8336.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8336.asy)
R2 INPN 0 100
V1 INPP 0 0 AC 1
V4 VPOS 0 5
R3 PRAO INPN 301
R1 OUT 0 500
V2 N002 0 {Vgain}
XU1 OUT PWRA 0 INPP INPN PRAO PRAO N001 N002 0 VPOS AD8336 ;pnba VOUT)PWRA)VCOM)INPP)INPN)PRAO)VGAI)VNEG)GPOS)GNEG)VPOS
V3 PWRA 0 0
V5 N001 0 -5
.op
.ac dec 20 100k 500Meg
.step param Vgain list -0.7 -0.5 -0.2 0 0.2 0.5 0.7
.lib AD8336.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -192 -160 -208 -160
WIRE -32 -160 -112 -160
WIRE 16 -160 0 -160
WIRE 112 -160 96 -160
WIRE -208 -144 -208 -160
WIRE 112 -144 112 -160
WIRE -32 -112 -32 -160
WIRE 0 -112 0 -160
WIRE -32 -64 -32 -112
WIRE 0 -64 0 -112
WIRE -416 -16 -432 -16
WIRE -112 -16 -336 -16
WIRE -64 -16 -112 -16
WIRE 208 0 160 0
WIRE 352 0 208 0
WIRE -432 16 -432 -16
WIRE -112 16 -304 16
WIRE -64 16 -112 16
WIRE -304 64 -304 16
WIRE -272 64 -304 64
WIRE -176 64 -192 64
WIRE -112 64 -176 64
WIRE -64 64 -112 64
WIRE 352 64 352 0
WIRE -176 96 -176 64
WIRE 32 96 32 64
WIRE 32 96 -176 96
WIRE 48 96 48 64
WIRE 48 96 32 96
WIRE 80 96 80 64
WIRE 112 96 112 64
WIRE 112 96 80 96
WIRE -304 112 -304 64
WIRE 80 112 80 96
WIRE -16 128 -16 64
WIRE 144 128 144 64
WIRE 352 160 352 144
WIRE -304 224 -304 192
WIRE -16 224 -16 208
WIRE 144 224 144 208
SYMBOL AD8336 -16 -48 R0
SYMATTR InstName U1
SYMBOL res 336 48 R0
SYMATTR InstName R1
SYMATTR Value 500
SYMBOL voltage 0 -160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V3
SYMATTR Value 0
SYMBOL res -176 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 301
SYMBOL res -320 96 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL voltage -16 112 R0
SYMATTR InstName V5
SYMATTR Value -5
SYMBOL voltage -96 -160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL voltage 144 112 R0
SYMATTR InstName V2
SYMATTR Value {Vgain}
SYMBOL voltage -320 -16 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value 0 AC 1
FLAG 352 160 0
FLAG 208 0 OUT
FLAG -432 16 0
FLAG 144 224 0
FLAG 112 -144 0
FLAG -208 -144 0
FLAG -32 -112 VPOS
FLAG -16 224 0
FLAG 80 112 0
FLAG -112 16 INPN
FLAG -112 64 PRAO
FLAG -304 224 0
FLAG -112 -16 INPP
FLAG 0 -112 PWRA
TEXT -160 -352 Left 2 !.op\n.ac dec 20 100k 500Meg
TEXT -160 -296 Left 2 !.step param Vgain list -0.7 -0.5 -0.2 0 0.2 0.5 0.7
* Z:\home\khalils\Downloads\files\data\raw_asc\2746870d7706_ADA4805.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4805.asy)
Vref N001 0 2.5
V2 IN 0 SINE(2.5 0.5 250K)
R1 N002 N001 1K
V1 +V 0 5
R2 OUT N002 1K
XU1 IN N002 +V 0 OUT +V ADA4805 ;pnba 100)101)102)103)104)106
.tran 50u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 400 -1232 288 -1232
WIRE 496 -1232 480 -1232
WIRE 544 -1232 496 -1232
WIRE 640 -1232 624 -1232
WIRE 288 -1216 288 -1232
WIRE 560 -1152 560 -1168
WIRE 560 -1152 528 -1152
WIRE 560 -1136 560 -1152
WIRE 288 -1120 288 -1136
WIRE 496 -1120 496 -1232
WIRE 544 -1120 496 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 704 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 208 -1072 208 -1088
WIRE 432 -1072 432 -1088
WIRE 528 -1056 528 -1152
WIRE 592 -1056 592 -1072
WIRE 592 -1056 528 -1056
WIRE 560 -1024 560 -1072
WIRE 208 -976 208 -992
WIRE 432 -976 432 -992
SYMBOL Opamps\\ADA4805 576 -1104 R0
SYMATTR InstName U1
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 208 -1088 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 496 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 288 -1232 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vref
SYMATTR Value 2.5
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(2.5 0.5 250K)
FLAG 208 -1088 +V
FLAG 208 -976 0
FLAG 432 -976 0
FLAG 704 -1104 OUT
FLAG 560 -1024 0
FLAG 432 -1088 IN
FLAG 560 -1168 +V
FLAG 288 -1120 0
TEXT 720 -992 Left 2 !.tran 50u
* Z:\tmp\asc_dec_bjh7r6w2\01b8cf9bb0c7_relais_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
D1 VCE 12V 1N4148
Q7 VCE N003 0 0 NPN
R24 VOUT2 0 100
R25 VOUT1 0 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 1292
WIRE -544 128 -672 128
WIRE -768 144 -1072 144
WIRE -768 160 -768 144
WIRE -736 160 -768 160
WIRE -624 176 -672 176
WIRE -544 176 -544 128
WIRE -816 224 -880 224
WIRE -784 224 -816 224
WIRE -736 224 -784 224
WIRE -816 256 -816 224
WIRE -736 256 -752 256
WIRE -816 352 -816 320
WIRE -752 352 -752 256
WIRE -752 352 -816 352
WIRE -688 352 -752 352
WIRE -752 368 -752 352
WIRE -992 416 -1072 416
WIRE -864 416 -912 416
WIRE -816 416 -864 416
WIRE -864 448 -864 416
WIRE -864 544 -864 528
WIRE -752 544 -752 464
SYMBOL diode -800 320 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL npn -816 368 R0
SYMATTR InstName Q7
SYMBOL res -640 160 R0
SYMATTR InstName R24
SYMATTR Value 100
SYMBOL res -560 160 R0
SYMATTR InstName R25
SYMATTR Value 100
FLAG -752 544 0
FLAG -864 544 0
FLAG -624 256 0
FLAG -544 256 0
FLAG -544 128 VOUT1
FLAG -624 176 VOUT2
FLAG -688 352 VCE
FLAG -784 224 12V
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1444.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
V2 N002 0 PULSE(0 3.3 0 5m 5m 0 10m)
XU1 N003 N001 N002 N004 N004 0 N004 LTC1444 ;pnba OUT)V+)In-)In+)REF)V-)HYST
R1 N001 N003 10K
.tran 30m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1444.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1144 800
WIRE 688 96 576 96
WIRE 816 96 688 96
WIRE 688 112 688 96
WIRE 816 112 816 96
WIRE 576 144 576 96
WIRE 224 192 208 192
WIRE 512 192 304 192
WIRE 688 208 688 192
WIRE 688 208 640 208
WIRE 816 208 816 192
WIRE 512 224 496 224
WIRE 496 256 496 224
WIRE 512 256 496 256
WIRE 496 288 496 256
WIRE 512 288 496 288
WIRE 544 368 544 336
FLAG 816 208 0
FLAG 208 192 0
FLAG 544 368 0
SYMBOL voltage 816 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 320 192 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0 5m 5m 0 10m)
SYMATTR InstName V2
SYMBOL Comparators\\LTC1444 576 144 R0
SYMATTR InstName U1
SYMBOL res 672 96 R0
SYMATTR InstName R1
SYMATTR Value 10K
TEXT 648 400 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\55cd9deb0441_NOR_gate.asc
* Generated by LTspice 26.0.1 for Windows.
* NOR Gate
R1 +Vcc nor 1k
V2 nor1 0 PWL(0 0 2 0 4 0 4.005 4)
Q1 nor nor1 0 0 2N2222
R2 +Vcc nor 1k
V3 nor2 0 PWL(0 0 2 0 2.005 4 4 4 4.005 0 6 0 6.005 4)
V1 +Vcc 0 5
Q2 0 nor2 nor 0 2N2222
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 8
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1284 680
WIRE 448 -112 448 -144
WIRE 448 -112 288 -112
WIRE 608 -112 448 -112
WIRE 288 -32 288 -112
WIRE 608 -32 608 -112
WIRE 48 80 48 -32
WIRE 288 112 288 48
WIRE 416 112 288 112
WIRE 608 112 608 48
WIRE 608 112 416 112
WIRE 416 160 416 112
WIRE 448 160 416 160
WIRE 288 176 288 112
WIRE 608 176 608 112
WIRE 144 224 96 224
WIRE 224 224 144 224
WIRE 736 224 672 224
WIRE 816 224 736 224
WIRE 144 288 144 224
WIRE 736 288 736 224
WIRE 48 304 48 160
WIRE 288 416 288 272
WIRE 608 416 608 272
WIRE 144 432 144 368
WIRE 736 432 736 368
IOPIN 96 224 In
IOPIN 816 224 In
IOPIN 448 160 Out
SYMBOL res 272 -48 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 48 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL npn 224 176 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL npn 672 272 R180
SYMATTR InstName Q2
SYMATTR Value 2N2222
SYMBOL voltage 736 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PWL(0 0 2 0 2.005 4 4 4 4.005 0 6 0 6.005 4)
SYMBOL res 592 -48 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 144 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 0 2 0 4 0 4.005 4)
FLAG 48 304 0
FLAG 288 416 0
FLAG 608 416 0
FLAG 48 -32 +Vcc
FLAG 448 -144 +Vcc
FLAG 144 432 0
FLAG 736 432 0
FLAG 96 224 nor1
FLAG 816 224 nor2
FLAG 448 160 nor
TEXT 184 552 Left 2 !.tran 8
TEXT 400 624 Left 2 ;NOR Gate
* Z:\home\khalils\Downloads\files\data\raw_asc\60839bc9c5a4_Driverx.asc
* Generated by LTspice 26.0.1 for Windows.
C3 OUT N002 270p
C5 HV OUT 725p
R1 N001 TOP 10
C6 OUT CS 725p
D3 N001 TOP D
S1 OUT HV N001 0 SW
S2 CS OUT N002 0 SW
R2 N002 BOT 10
C1 N001 0 4000p
C4 HV N001 270p
C2 N002 0 4000p
D2 OUT HV D
D1 CS OUT D
D4 N002 BOT D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model SW SW(Ron=0.0039 Roff=10G Vt=0 Vh=-.5)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 80 144 64
WIRE 144 80 64 80
WIRE 240 80 144 80
WIRE 320 80 240 80
WIRE -160 96 -192 96
WIRE -64 96 -96 96
WIRE 64 96 64 80
WIRE 144 160 144 80
WIRE 320 160 320 80
WIRE -192 176 -192 96
WIRE -192 176 -224 176
WIRE -176 176 -192 176
WIRE -64 176 -64 96
WIRE -64 176 -96 176
WIRE 64 176 64 160
WIRE 64 176 -64 176
WIRE 96 176 64 176
WIRE 240 176 240 80
WIRE -64 192 -64 176
WIRE 96 224 16 224
WIRE -64 272 -64 256
WIRE 16 272 16 224
WIRE 16 272 -64 272
WIRE 144 272 144 240
WIRE 144 272 64 272
WIRE 240 272 240 240
WIRE 240 272 144 272
WIRE 320 272 320 224
WIRE 320 272 240 272
WIRE 400 272 320 272
WIRE -160 288 -192 288
WIRE -64 288 -96 288
WIRE 64 288 64 272
WIRE 144 352 144 272
WIRE 320 352 320 272
WIRE -192 368 -192 288
WIRE -192 368 -224 368
WIRE -176 368 -192 368
WIRE -64 368 -64 288
WIRE -64 368 -96 368
WIRE 64 368 64 352
WIRE 64 368 -64 368
WIRE 96 368 64 368
WIRE -64 384 -64 368
WIRE 240 384 240 272
WIRE 96 416 64 416
WIRE -64 464 -64 448
WIRE 16 464 16 272
WIRE 16 464 -64 464
WIRE 64 464 64 416
WIRE 64 464 16 464
WIRE 144 464 144 432
WIRE 240 464 240 448
WIRE 240 464 144 464
WIRE 320 464 320 416
WIRE 320 464 240 464
WIRE 400 464 320 464
WIRE 16 496 16 464
IOPIN -224 176 In
IOPIN -224 368 In
IOPIN 400 272 Out
IOPIN 144 64 BiDir
IOPIN 400 464 Out
SYMBOL cap -80 384 R0
SYMATTR InstName C2
SYMATTR Value 4000p
SYMBOL cap 48 288 R0
SYMATTR InstName C3
SYMATTR Value 270p
SYMBOL cap 224 176 R0
SYMATTR InstName C5
SYMATTR Value 725p
SYMBOL cap 224 384 R0
SYMATTR InstName C6
SYMATTR Value 725p
SYMBOL diode 304 416 M180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D1
SYMBOL sw 144 256 M180
SYMATTR InstName S1
SYMBOL sw 144 448 M180
SYMATTR InstName S2
SYMBOL diode -96 80 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName D3
SYMBOL diode -96 272 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName D4
SYMBOL diode 304 224 M180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D2
SYMBOL res -80 352 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL cap 48 96 R0
SYMATTR InstName C4
SYMATTR Value 270p
SYMBOL res -80 160 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL cap -80 192 R0
SYMATTR InstName C1
SYMATTR Value 4000p
FLAG 16 496 0
FLAG -224 176 TOP
FLAG -224 368 BOT
FLAG 400 272 OUT
FLAG 144 64 HV
FLAG 400 464 CS
TEXT -168 -64 Left 0 !.model SW SW(Ron=0.0039 Roff=10G Vt=0 Vh=-.5)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4611.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4611.asy)
C1 OUT 0 500
V1 IN 0 3.3
Rload OUT 0 67m
R1 N005 0 240K
C2 N004 0 .001
XU1 0 NC_01 OUT 0 OUT N001 N001 NC_02 0 N002 N005 N003 N004 IN IN 0 LTM4611 ;pnba Mode_PLLin)Pgood)Vosns+)Vosns-)Vout)Vout_lcl)DiffVout)IntVcc)SGND)PLLFLTR/Fset)FB)Comp)Track/SS)Run)Vin)PGND
.tran 1m startup
.lib LTM4611.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 -96 -112 -96
WIRE 144 -96 0 -96
WIRE -112 -80 -112 -96
WIRE 144 -80 144 -96
WIRE 0 -32 0 -96
WIRE 16 -32 0 -32
WIRE 416 -32 368 -32
WIRE 496 -32 416 -32
WIRE 592 -32 496 -32
WIRE 496 -16 496 -32
WIRE 592 -16 592 -32
WIRE -112 16 -112 0
WIRE 384 64 368 64
WIRE 496 80 496 48
WIRE 592 80 592 64
WIRE 16 160 0 160
WIRE 384 160 384 64
WIRE 384 160 368 160
WIRE 16 256 -16 256
WIRE 416 256 416 -32
WIRE 416 256 368 256
WIRE 16 352 0 352
WIRE 400 352 368 352
WIRE -64 448 -80 448
WIRE 16 448 0 448
WIRE 384 448 368 448
WIRE 480 448 464 448
WIRE 144 512 144 496
WIRE 240 512 240 496
SYMBOL PowerProducts\\LTM4611 192 208 R0
SYMATTR InstName U1
SYMBOL res 576 -32 R0
SYMATTR InstName Rload
SYMATTR Value 67m
SYMBOL voltage -112 -96 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 368 464 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 240K
SYMBOL cap 0 432 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .001
SYMBOL cap 480 -16 R0
SYMATTR InstName C1
SYMATTR Value 500
FLAG -112 16 0
FLAG 400 352 0
FLAG 240 512 0
FLAG 144 512 0
FLAG 480 448 0
FLAG 496 80 0
FLAG 592 80 0
FLAG 592 -32 OUT
FLAG -112 -96 IN
FLAG -80 448 0
FLAG -16 256 0
TEXT 480 312 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\RHP50000-CSL.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\RHP50000-CSL.asy)
R1 OUT N004 140K
XU1 IN IN N002 N004 0 0 N007 N001 IN N006 N003 RHP50000-CSL ;pnba VIN)EN)SW)FB)AGND)PGND)RT)PGOOD)MODE/SYNC)ITH)SSTT
R2 N004 0 100K
C2 N003 0 4.7n
Rload OUT 0 0.1
R3 OUT N001 500K
L1 N002 OUT 100n Rser=2m
V1 IN 0 5
C1 OUT 0 47 m=3 Rser=10m
C3 N005 0 470p
R5 N007 0 274K
R4 N006 N005 15K
C5 OUT N004 10p
.tran 0.6m startup
.lib RHP50000-CSL.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2648 1864
WIRE 1408 1248 1376 1248
WIRE 1520 1248 1408 1248
WIRE 1712 1248 1520 1248
WIRE 1376 1280 1376 1248
WIRE 1712 1280 1712 1248
WIRE 1520 1328 1520 1248
WIRE 1552 1328 1520 1328
WIRE 1904 1328 1872 1328
WIRE 2016 1328 1984 1328
WIRE 1376 1376 1376 1360
WIRE 1520 1424 1520 1328
WIRE 1552 1424 1520 1424
WIRE 1904 1424 1872 1424
WIRE 2016 1424 2016 1328
WIRE 2016 1424 1984 1424
WIRE 2144 1424 2016 1424
WIRE 2256 1424 2144 1424
WIRE 2336 1424 2256 1424
WIRE 2384 1424 2336 1424
WIRE 2144 1440 2144 1424
WIRE 2256 1440 2256 1424
WIRE 2384 1440 2384 1424
WIRE 1424 1520 1408 1520
WIRE 1552 1520 1488 1520
WIRE 2016 1520 2016 1504
WIRE 2016 1520 1872 1520
WIRE 2144 1520 2144 1504
WIRE 2144 1520 2016 1520
WIRE 2016 1536 2016 1520
WIRE 2256 1536 2256 1504
WIRE 2384 1536 2384 1520
WIRE 1424 1616 1360 1616
WIRE 1552 1616 1504 1616
WIRE 1904 1616 1872 1616
WIRE 1360 1632 1360 1616
WIRE 1904 1632 1904 1616
WIRE 2016 1632 2016 1616
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
WIRE 1360 1712 1360 1696
WIRE 1904 1728 1904 1712
SYMBOL RES 2000 1408 R0
SYMATTR InstName R1
SYMATTR Value 140K
SYMBOL cap 1344 1632 R0
SYMATTR InstName C3
SYMATTR Value 470p
SYMBOL cap 2128 1440 R0
SYMATTR InstName C5
SYMATTR Value 10p
SYMBOL res 2368 1424 R0
SYMATTR InstName Rload
SYMATTR Value 0.1
SYMBOL res 1520 1600 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 15K
SYMBOL res 2000 1520 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL res 2000 1312 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 500K
SYMBOL cap 1488 1504 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL res 1888 1616 R0
SYMATTR InstName R5
SYMATTR Value 274K
SYMBOL VOLTAGE 1376 1264 R0
SYMATTR Value 5
SYMATTR InstName V1
SYMBOL ind 1888 1440 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100n
SYMATTR SpiceLine Rser=2m
SYMBOL RHP50000-CSL 1712 1472 R0
WINDOW 0 0 -80 Center 2
WINDOW 3 0 112 Center 2
SYMATTR InstName U1
SYMBOL cap 2240 1440 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 m=3
SYMATTR InstName C1
SYMATTR Value 47
SYMATTR SpiceLine Rser=10m
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1376 1376 0
FLAG 2384 1536 0
FLAG 2016 1632 0
FLAG 1408 1520 0
FLAG 2336 1424 OUT
FLAG 1408 1248 IN
FLAG 1360 1712 0
FLAG 2256 1536 0
FLAG 1904 1728 0
TEXT 1624 1792 Left 2 !.tran 0.6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1169675232a1_WaveOut.asc
* Generated by LTspice 26.0.1 for Windows.
B1 SYN 0 V=2.5*V(a)*V(b)*V(c)
V2 A 0 SINE(0 .4 20 10m)
V3 B 0 SIN(0 1 455)
V4 C 0 PWL( Repeat for 2 Repeat for 2 0 0 10m 0 11m 1 440m 1 480m 0 700m 0 endrepeat 2.5 0 endrepeat)
.tran 3.7
.wave .\ring.wav 8 11025 V(syn) ; This means save node V(syn) as a .wav file, 8 bit resolution, 11025 samples per second
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2868 848
WIRE 1008 560 1008 512
WIRE 1360 560 1360 512
WIRE 1664 560 1664 512
WIRE 2144 560 2144 512
WIRE 1008 688 1008 640
WIRE 1360 688 1360 640
WIRE 1664 688 1664 640
WIRE 2144 688 2144 640
SYMBOL voltage 1360 544 R0
SYMATTR InstName V3
SYMATTR Value SIN(0 1 455)
SYMBOL voltage 1664 544 R0
WINDOW 3 42 55 Left 0
WINDOW 40 43 145 Left 0
WINDOW 39 38 117 Left 0
WINDOW 123 42 87 Left 0
SYMATTR Value PWL( Repeat for 2 Repeat for 2
SYMATTR SpiceLine2 2.5 0 endrepeat)
SYMATTR SpiceLine 480m 0 700m 0 endrepeat
SYMATTR Value2 0 0 10m 0 11m 1 440m 1
SYMATTR InstName V4
SYMBOL BV 2144 544 R0
SYMATTR InstName B1
SYMATTR Value V=2.5*V(a)*V(b)*V(c)
SYMBOL VOLTAGE 1008 544 R0
WINDOW 39 0 0 Left 0
WINDOW 123 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 .4 20 10m)
FLAG 1008 688 0
FLAG 1360 688 0
FLAG 1008 512 A
FLAG 1360 512 B
FLAG 2144 688 0
FLAG 1664 688 0
FLAG 1664 512 C
FLAG 2144 512 SYN
TEXT 992 744 Left 0 !.tran 3.7
TEXT 960 784 Left 0 !.wave .\\ring.wav 8 11025 V(syn) ; This means save node V(syn) as a .wav file, 8 bit resolution, 11025 samples per second
* Z:\home\khalils\Downloads\files\data\raw_asc\100ec9b23e07_Pre-charge_FET.asc
* Generated by LTspice 26.0.1 for Windows.
* Battery simulation\nInternal resistance: ~100mOhm per cell, *10/2 (because 10S2P) = 500mOhm
* Pre-charge FET
* Analysis Setup\n1000ms simulation in 1ms increments
* 15V Linear regulator
* System Load
* Operating point:\nCurrent draw (battery engaged): 15uA\nCurrent draw (battery not engaged): 0
M2 Vd PRECHG_FET_EN 0 0 BSS123
R_SYSTEM CELL_10_POS SYSTEM_GND 10
V1 CELL_10_POS 0 30 Rser=500m
V2 15VO 0 15
R5 SYSTEM_GND Vd 1k
R4 PRECHG_FET_EN 0 1Meg
V3 PRECHG_FET_EN 0 PWL(0 0 .005 0 .0051 15 .05 15 .0501 0)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m 150m uic
.step param R5 list 100 1k 2k 5k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 5144 2508
WIRE 352 416 112 416
WIRE 112 560 112 416
WIRE 1216 656 1072 656
WIRE 112 720 112 640
WIRE 224 720 112 720
WIRE 224 736 224 720
WIRE 1072 768 1072 656
WIRE 112 800 112 720
WIRE 352 800 112 800
WIRE 3024 928 2896 928
WIRE 1072 1024 1072 848
WIRE 1216 1024 1072 1024
WIRE 3024 1104 3024 928
WIRE 464 1216 176 1216
WIRE 1488 1232 1296 1232
WIRE 1664 1232 1488 1232
WIRE 1488 1312 1488 1232
WIRE 176 1360 176 1216
WIRE 3024 1376 3024 1184
WIRE 3024 1376 2896 1376
WIRE 1664 1472 1664 1232
WIRE 1488 1520 1488 1392
WIRE 1488 1520 1296 1520
WIRE 1648 1520 1488 1520
WIRE 1792 1520 1744 1520
WIRE 1872 1520 1792 1520
WIRE 2144 1520 1952 1520
WIRE 176 1584 176 1440
WIRE 464 1584 176 1584
DATAFLAG 1488 1232 "$"
RECTANGLE Normal 60 1088 996 1644 2
RECTANGLE Normal 1068 1084 2372 1648 2
RECTANGLE Normal 40 872 564 1064 2
RECTANGLE Normal 32 300 592 832 2
RECTANGLE Normal 2580 824 3200 1448 2
SYMBOL voltage 1072 752 R0
SYMATTR InstName V3
SYMATTR Value PWL(0 0 .005 0 .0051 15 .05 15 .0501 0)
SYMBOL voltage 112 544 R0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL battery 176 1344 R0
SYMATTR InstName V1
SYMATTR Value 30
SYMATTR SpiceLine Rser=500m
SYMBOL res 1472 1296 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL res 3008 1088 R0
SYMATTR InstName R_SYSTEM
SYMATTR Value 10
SYMBOL res 1968 1504 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL nmos 1744 1472 R90
SYMATTR InstName M2
SYMATTR Value BSS123
FLAG 1296 1520 BMS_GND
FLAG 1296 1232 PRECHG_FET_EN
FLAG 2144 1520 SYSTEM_GND
FLAG 464 1216 CELL_10_POS
FLAG 464 1584 BMS_GND
FLAG 352 416 15VO
FLAG 352 800 BMS_GND
FLAG 1216 656 PRECHG_FET_EN
FLAG 1216 1024 BMS_GND
FLAG 2896 1376 SYSTEM_GND
FLAG 2896 928 CELL_10_POS
FLAG 224 736 0
FLAG 1792 1520 Vd
TEXT 88 968 Left 2 !.tran 1m 150m uic
TEXT 88 1128 Left 2 ;Battery simulation\nInternal resistance: ~100mOhm per cell, *10/2 (because 10S2P) = 500mOhm
TEXT 1120 1120 Left 2 ;Pre-charge FET
TEXT 80 888 Left 2 ;Analysis Setup\n1000ms simulation in 1ms increments
TEXT 72 336 Left 2 ;15V Linear regulator
TEXT 2616 848 Left 2 ;System Load
TEXT 1864 1392 Left 2 !.step param R5 list 100 1k 2k 5k
TEXT 1800 600 Left 2 ;Operating point:\nCurrent draw (battery engaged): 15uA\nCurrent draw (battery not engaged): 0