Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\85c928810a0c_Circuito6.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 AC 1
R1 N003 0 50
L1 N001 N002 1m
C1 N002 N003 10n
.ac dec 10000 1 10Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 112 0 112
WIRE 160 112 128 112
WIRE 288 112 224 112
WIRE 0 144 0 112
WIRE 288 144 288 112
WIRE 0 256 0 224
WIRE 288 256 288 224
WIRE 288 256 0 256
WIRE 0 288 0 256
SYMBOL ind 32 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1m
SYMBOL voltage 0 128 R0
WINDOW 123 24 100 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL cap 160 128 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 272 128 R0
SYMATTR InstName R1
SYMATTR Value 50
FLAG 0 288 0
TEXT -32 312 Left 2 !.ac dec 10000 1 10Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\143c00045872_laboE1_1.asc
* Generated by LTspice 26.0.1 for Windows.
;.tran .001
;.dc V_ID -.25 .25 .01
Q1a N001 Vp N002 0 2N3904
V_id Vp Vm SINE(0 {VID} 10k 0.5m) AC {VID} 0
Q1b Vo1 Vm N002 0 2N3904
R1 VCC N001 1k
Vpola VCC 0 15
Vpolb 0 VEE 15
Iref VCC N003 1m
R2 VCC Vo1 1k
V_cm Vm 0 SINE({VCMdc} {VCMac} 0 0.5m) AC {VCMac} 0
Q2b N003 N003 VEE 0 2N3904
Q2a N002 N003 VEE 0 2N3904
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.ac dec 101 1 10meg
.param VCMdc=0 VCMac=1 VID=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2404 1432
WIRE -400 16 -400 -80
WIRE 288 32 80 32
WIRE 512 32 288 32
WIRE 80 48 80 32
WIRE 512 48 512 32
WIRE -400 144 -400 96
WIRE -400 192 -400 144
WIRE 512 208 512 128
WIRE 80 320 80 128
WIRE 512 320 512 208
WIRE -400 368 -400 272
WIRE -32 368 -48 368
WIRE 16 368 -32 368
WIRE 608 368 576 368
WIRE -48 480 -48 368
WIRE 80 480 80 416
WIRE 288 480 80 480
WIRE 512 480 512 416
WIRE 512 480 288 480
WIRE 800 512 800 464
WIRE -48 608 -48 560
WIRE 32 608 -48 608
WIRE 608 608 608 368
WIRE 608 608 32 608
WIRE 800 656 800 592
WIRE 800 656 672 656
WIRE 32 672 32 608
WIRE 288 704 288 480
WIRE 800 704 800 656
WIRE 672 752 672 656
WIRE 672 752 352 752
WIRE 736 752 672 752
WIRE 32 816 32 752
WIRE 288 912 288 800
WIRE 800 912 800 800
LINE Normal -144 512 -208 512 2
LINE Normal -144 704 -208 704 2
LINE Normal -144 704 -144 704 2
LINE Normal -128 704 -144 688 2
LINE Normal -144 720 -128 704 2
LINE Normal -128 512 -144 496 2
LINE Normal -144 528 -128 512 2
SYMBOL npn 736 704 R0
SYMATTR InstName Q2b
SYMATTR Value 2N3904
SYMBOL npn 16 320 R0
SYMATTR InstName Q1a
SYMATTR Value 2N3904
SYMBOL res 496 32 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 32 656 R0
WINDOW 123 -445 62 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 -654 34 Left 2
SYMATTR Value2 AC {VCMac} 0
SYMATTR Value SINE({VCMdc} {VCMac} 0 0.5m)
SYMATTR InstName V_cm
SYMBOL current 800 512 R0
SYMATTR InstName Iref
SYMATTR Value 1m
SYMBOL npn 576 320 M0
SYMATTR InstName Q1b
SYMATTR Value 2N3904
SYMBOL voltage -400 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vpola
SYMATTR Value 15
SYMBOL res 64 32 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -400 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vpolb
SYMATTR Value 15
SYMBOL npn 352 704 M0
SYMATTR InstName Q2a
SYMATTR Value 2N3904
SYMBOL voltage -48 464 R0
WINDOW 123 -316 62 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 -466 32 Left 2
SYMATTR Value2 AC {VID} 0
SYMATTR Value SINE(0 {VID} 10k 0.5m)
SYMATTR InstName V_id
FLAG 288 32 VCC
FLAG -400 -80 VCC
FLAG -400 368 VEE
FLAG -400 144 0
FLAG 288 912 VEE
FLAG 512 208 Vo1
FLAG 800 464 VCC
FLAG 608 368 Vm
FLAG -32 368 Vp
FLAG 800 912 VEE
FLAG 32 816 0
TEXT -504 1000 Left 2 !.op
TEXT -504 1032 Left 2 !.ac dec 101 1 10meg
TEXT -504 968 Left 2 !;.tran .001
TEXT -624 928 Left 2 !.param VCMdc=0 VCMac=1 VID=0
TEXT -496 1072 Left 2 !;.dc V_ID -.25 .25 .01
* Z:\home\khalils\Downloads\files\data\raw_asc\211488120338_primeiraOrdem.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N003 0 C
XU1 N003 N001 NC_01 NC_02 N001 opamp2 ;pnba In+)In-)V+)V-)OUT
R1 N003 N002 R
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 96 0 96
WIRE 0 160 0 96
WIRE 32 160 0 160
WIRE 128 176 128 96
WIRE 128 176 96 176
WIRE 176 176 128 176
WIRE -112 192 -144 192
WIRE 0 192 -32 192
WIRE 32 192 0 192
WIRE 0 224 0 192
SYMBOL cap -16 224 R0
SYMATTR InstName C1
SYMBOL res -16 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMBOL OpAmps\\opamp2 64 112 R0
SYMATTR InstName U1
FLAG 0 288 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP121-1.65.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP121-1.65.asy)
XU1 OUT MP_01 0 IN MP_02 IN ADP121 K=2/4125 ;pnba Vout))GND)En))Vin
C2 OUT 0 1
V1 IN 0 5.5
C1 IN 0 1
Rload OUT 0 22
.tran 10m startup
.lib ADP121.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 22
SYMBOL ADP121-1.65 256 208 R0
SYMATTR InstName U1
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\77f487000f45_noms_sc.asc
* Generated by LTspice 26.0.1 for Windows.
VDS N001 0 5
M1 N001 N002 0 0 N_50n l=50n w=100n
VGS N002 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include pure_models.txt
.dc VDS 0 1 0.01 VGS 0 1 0.25
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 48 144 48
WIRE 144 96 144 48
WIRE 320 144 144 144
WIRE 416 160 416 48
WIRE 96 176 -64 176
WIRE 144 256 144 192
WIRE 144 256 -64 256
WIRE 320 256 320 144
WIRE 320 256 144 256
WIRE 416 256 416 240
WIRE 416 256 320 256
WIRE 144 288 144 256
SYMBOL voltage -64 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 1
SYMBOL voltage 416 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 5
SYMBOL nmos4 96 96 R0
WINDOW 0 62 33 Left 2
WINDOW 3 62 61 Left 2
WINDOW 123 62 89 Left 2
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=100n
FLAG 144 288 0
TEXT -232 32 Left 2 !.include pure_models.txt
TEXT -234 312 Left 2 !.dc VDS 0 1 0.01 VGS 0 1 0.25
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3803-3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 30
L1 IN N003 50
L2 0 N002 2
MQ1 N003 N005 N006 N006 BSS123
R1 N006 0 68m
R2 IN N001 10K
C1 N001 0 10
R3 OUT N004 105K
R4 N004 0 20K
D1 N002 OUT 1N5817
C2 OUT 0 300 Rser=50m
Rload OUT 0 2.5
C3 N007 0 .001
XU1 N007 0 N004 N006 N001 N005 LTC3803-3 ;pnba Ith/Run)GND)FB)Sense)Vcc)Ngate
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
K1 L1 L2 1.
.tran 0 50m 25m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3803-3.asy)
.lib LTC3803-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1212 680
WIRE 144 16 80 16
WIRE 176 16 144 16
WIRE 320 16 256 16
WIRE 464 16 320 16
WIRE 592 16 512 16
WIRE 704 16 656 16
WIRE 816 16 704 16
WIRE 912 16 816 16
WIRE 80 32 80 16
WIRE 320 32 320 16
WIRE 464 32 464 16
WIRE 512 32 512 16
WIRE 704 32 704 16
WIRE 816 32 816 16
WIRE 912 32 912 16
WIRE 80 112 80 96
WIRE 320 128 320 112
WIRE 464 128 464 112
WIRE 512 128 512 112
WIRE 704 128 704 112
WIRE 704 128 624 128
WIRE 816 128 816 96
WIRE 912 128 912 112
WIRE 704 144 704 128
WIRE 144 160 144 16
WIRE 416 208 272 208
WIRE 464 240 464 224
WIRE 464 240 320 240
WIRE 704 240 704 224
WIRE 464 256 464 240
WIRE -64 272 -80 272
WIRE 16 272 0 272
WIRE 320 272 320 240
WIRE 320 272 272 272
WIRE 320 336 272 336
WIRE 464 352 464 336
WIRE 320 384 320 336
WIRE 624 384 624 128
WIRE 624 384 320 384
WIRE 144 400 144 384
FLAG 464 352 0
FLAG 320 128 0
FLAG 80 112 0
FLAG 144 400 0
FLAG 512 128 0
FLAG 704 240 0
FLAG 816 128 0
FLAG 912 128 0
FLAG -80 272 0
FLAG 320 16 IN
FLAG 912 16 OUT
SYMBOL voltage 320 16 R0
SYMATTR InstName V1
SYMATTR Value 30
SYMBOL ind2 448 16 R0
WINDOW 0 -1 36 Right 2
WINDOW 3 -5 69 Right 2
SYMATTR InstName L1
SYMATTR Value 50
SYMATTR Type ind
SYMBOL ind2 528 128 R180
WINDOW 0 -6 76 Right 2
WINDOW 3 -6 40 Right 2
SYMATTR InstName L2
SYMATTR Value 2
SYMATTR Type ind
SYMBOL nmos 416 128 R0
SYMATTR InstName Q1
SYMATTR Value BSS123
SYMBOL res 448 240 R0
SYMATTR InstName R1
SYMATTR Value 68m
SYMBOL res 272 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL cap 64 32 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 688 16 R0
SYMATTR InstName R3
SYMATTR Value 105K
SYMBOL res 688 128 R0
SYMATTR InstName R4
SYMATTR Value 20K
SYMBOL schottky 592 32 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 800 32 R0
SYMATTR InstName C2
SYMATTR Value 300
SYMATTR SpiceLine Rser=50m
SYMBOL res 896 16 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL cap 0 256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL LTC3803-3 144 272 R0
SYMATTR InstName U1
TEXT 488 16 Bottom 2 !K1 L1 L2 1.
TEXT 496 416 Left 2 !.tran 0 50m 25m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6227.asc
* Generated by LTspice 26.0.1 for Windows.
V1 V+ 0 5
V2 V- 0 -2.5
XU1 In1 N001 N001 V+ V- V+ LTC6226 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN_L
XU2 In2 N004 N004 V+ V- V+ LTC6226 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN_L
R1 N002 N001 33
R2 N005 N004 33
C1 N002 0 68p
C2 0 N005 68p
C3 N002 N005 330p
V3 N003 0 SINE(0 1.65 50k)
E1 In1 0 N003 0 1
E2 In2 0 0 N003 1
.tran .5m
* To ADC IN+
* To ADC IN-
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6227.asy)
.lib LTC6226.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4472 1028
WIRE -2384 -384 -2688 -384
WIRE -2592 -320 -2592 -336
WIRE -2688 -272 -2688 -384
WIRE -2624 -272 -2688 -272
WIRE -2384 -240 -2384 -384
WIRE -2384 -240 -2480 -240
WIRE -2288 -240 -2384 -240
WIRE -2128 -240 -2208 -240
WIRE -1952 -240 -2128 -240
WIRE -1872 -240 -1952 -240
WIRE -2624 -208 -2832 -208
WIRE -2128 -208 -2128 -240
WIRE -2832 -176 -2832 -208
WIRE -2880 -160 -2944 -160
WIRE -2592 -144 -2592 -160
WIRE -2880 -112 -2896 -112
WIRE -1952 -112 -1952 -240
WIRE -2128 -96 -2128 -144
WIRE -2048 -96 -2128 -96
WIRE -2832 -80 -2832 -96
WIRE -2384 -80 -2688 -80
WIRE -2128 -48 -2128 -96
WIRE -2592 -16 -2592 -32
WIRE -2944 0 -2944 -160
WIRE -2944 0 -3200 0
WIRE -2688 32 -2688 -80
WIRE -2624 32 -2688 32
WIRE -3200 48 -3200 0
WIRE -3696 64 -3696 16
WIRE -3520 64 -3520 16
WIRE -2384 64 -2384 -80
WIRE -2384 64 -2480 64
WIRE -2288 64 -2384 64
WIRE -2128 64 -2128 16
WIRE -2128 64 -2208 64
WIRE -1952 64 -1952 -48
WIRE -1952 64 -2128 64
WIRE -1872 64 -1952 64
WIRE -2624 96 -2832 96
WIRE -2832 128 -2832 96
WIRE -2944 144 -2944 0
WIRE -2880 144 -2944 144
WIRE -3200 160 -3200 128
WIRE -2592 160 -2592 144
WIRE -3696 192 -3696 144
WIRE -3520 192 -3520 144
WIRE -2880 192 -2896 192
WIRE -2832 224 -2832 208
FLAG -3696 192 0
FLAG -3520 192 0
FLAG -3696 16 V+
FLAG -3520 16 V-
FLAG -2592 -336 V+
FLAG -2592 -144 V-
FLAG -2832 -80 0
FLAG -2544 -160 V+
FLAG -2832 -208 In1
FLAG -2592 -32 V+
FLAG -2592 160 V-
FLAG -2832 224 0
FLAG -2544 144 V+
FLAG -2048 -96 0
FLAG -2832 96 In2
FLAG -2896 -112 0
FLAG -3200 160 0
FLAG -2896 192 0
SYMBOL voltage -3696 48 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -3520 48 R0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL LTC6227 -2592 -240 R0
SYMATTR InstName U1
SYMBOL LTC6227 -2592 64 R0
SYMATTR InstName U2
SYMBOL res -2192 -256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 33
SYMBOL res -2192 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 33
SYMBOL cap -2144 -208 R0
SYMATTR InstName C1
SYMATTR Value 68p
SYMBOL cap -2144 -48 R0
SYMATTR InstName C2
SYMATTR Value 68p
SYMBOL cap -1968 -112 R0
SYMATTR InstName C3
SYMATTR Value 330p
SYMBOL voltage -3200 32 R0
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1.65 50k)
SYMBOL e -2832 -192 R0
SYMATTR InstName E1
SYMATTR Value 1
SYMBOL e2 -2832 112 R0
SYMATTR InstName E2
SYMATTR Value 1
TEXT -2048 272 Left 2 !.tran .5m
TEXT -1848 -240 Left 2 ;To ADC IN+
TEXT -1848 64 Left 2 ;To ADC IN-
* Z:\home\khalils\Downloads\files\data\raw_asc\3ebc97d4b157_current.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
R1 N001 0 10k
R4 0 N003 100k
V2 N002 0 12V
R3 N003 IN 10k
XU1 N003 N001 N002 0 OUT LT1001 ;pnba In+)In-)V+)V-)OUT
R7 0 IN 1R
I1 0 IN PULSE(0 1 0 10)
R2 OUT N001 100k
R6 N004 0 1k
R5 OUT N004 1k
.tran 0 10 0 .01
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 964 680
WIRE -96 16 -160 16
WIRE -32 16 -96 16
WIRE 352 48 304 48
WIRE 480 48 432 48
WIRE -96 96 -96 16
WIRE 528 96 384 96
WIRE -32 112 -32 16
WIRE 160 112 -32 112
WIRE 304 112 304 48
WIRE 304 112 240 112
WIRE -160 128 -160 16
WIRE 384 128 384 96
WIRE -32 144 -32 112
WIRE 304 144 304 112
WIRE 352 144 304 144
WIRE 480 160 480 48
WIRE 480 160 416 160
WIRE 608 160 480 160
WIRE 640 160 608 160
WIRE 352 176 304 176
WIRE 640 192 640 160
WIRE -32 240 -32 224
WIRE -32 256 -32 240
WIRE 160 256 -32 256
WIRE 304 256 304 176
WIRE 304 256 240 256
WIRE 304 272 304 256
WIRE -160 304 -160 208
WIRE -32 304 -32 256
WIRE -32 304 -160 304
WIRE 528 304 528 96
WIRE 640 304 640 272
WIRE 384 416 384 192
WIRE 416 416 384 416
WIRE 528 416 528 384
WIRE 528 416 416 416
WIRE 304 432 304 352
WIRE 416 432 416 416
WIRE 640 432 640 384
SYMBOL res 624 176 R0
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL voltage 528 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12V
SYMBOL res -48 128 R0
SYMATTR InstName R7
SYMATTR Value 1R
SYMBOL res 624 288 R0
SYMATTR InstName R6
SYMATTR Value 1k
SYMBOL res 256 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL current -160 128 R0
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value PULSE(0 1 0 10)
SYMBOL Opamps\\LT1001 384 96 R0
SYMATTR InstName U1
SYMBOL res 320 368 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 -48 59 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 448 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
FLAG -96 96 0
FLAG 416 432 0
FLAG 608 160 OUT
FLAG 304 432 0
FLAG 640 432 0
FLAG -32 240 IN
TEXT -184 328 Left 2 !.tran 0 10 0 .01
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8642.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8642.asy)
XU1 IN N001 +V -V OUT AD8642 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 10K
Rload OUT 0 10K
R1 N001 0 10K
Vin IN 0 SINE(0 1 100K)
V1 +V 0 12
V2 -V 0 -12
.tran 100u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 176 -1152 176 -1168
WIRE 288 -1152 288 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 176 -1056 176 -1072
WIRE 288 -1056 288 -1072
WIRE 576 -1056 576 -1072
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 288 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 176 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100K)
SYMBOL Opamps\\AD8642 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 576 -1056 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 176 -1168 +V
FLAG 288 -1168 -V
FLAG 288 -1056 0
FLAG 176 -1056 0
TEXT 728 -936 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\1325ff37aabf_sweep-diagram.asc
* Generated by LTspice 26.0.1 for Windows.
* To find Width by Sweep
* EDIC WINTER INTERNSHIP\nMOHAMMED AHMED MAJID\nGP5405
* Common Source Amplifier with Resistive Load
;.step param wp 1u 50u 1u
M1 N003 N002 N001 N001 PMOS l=0.36u w={wp}
V1 N003 0 0.9
V2 N002 0 1.26
V3 N001 0 1.8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include tsmc180.txt
.param wp 1u
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 16 256 16
WIRE 416 48 416 16
WIRE 256 64 256 16
WIRE 336 64 256 64
WIRE 256 80 256 64
WIRE 208 96 64 96
WIRE 336 128 336 64
WIRE 336 128 256 128
WIRE 64 176 64 96
WIRE 416 192 416 128
WIRE 256 224 256 176
WIRE 64 304 64 256
WIRE 256 368 256 304
SYMBOL pmos4 208 176 M180
WINDOW 123 29 114 Right 2
SYMATTR InstName M1
SYMATTR Value2 l=0.36u w={wp}
SYMBOL voltage 256 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0.9
SYMBOL voltage 64 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.26
SYMBOL voltage 416 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 1.8
FLAG 64 304 0
FLAG 256 368 0
FLAG 416 192 0
TEXT -400 -56 Left 2 ;To find Width by Sweep
TEXT -400 -16 Left 2 !.include tsmc180.txt
TEXT -400 16 Left 2 !.param wp 1u
TEXT -400 48 Left 2 !;.step param wp 1u 50u 1u
TEXT -400 72 Left 2 !.op
TEXT -408 -160 Left 2 ;EDIC WINTER INTERNSHIP\nMOHAMMED AHMED MAJID\nGP5405
TEXT 16 -64 Left 2 ;Common Source Amplifier with Resistive Load
* Z:\home\khalils\Downloads\files\data\raw_asc\PLL2.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
A1 IN 0 0 0 0 0 N001 0 MODULATOR mark=1.1K space=.9K
A3 N003 0 0 0 0 0 N004 0 MODULATOR mark=1.1K space=.9K
A4 signal 0 0 0 0 0 out 0 SCHMITT Vt=.5 Vh=100m
A5 N002 N004 0 0 0 0 N003 0 PHASEDET Iout=15u Vlow=-.5 Vhigh=2.5 Ref=0
;.options baudrate=250 delay=1.4m
B1 IN 0 V=rand(time*250) >= .5
C2 N005 0 .0025
E1 N002 0 N001 0 Laplace={w0/Q}*s /(s*s + {w0/Q}*s + {w0*w0}) window=.1 nfft=4096
E2 signal 0 N003 0 Laplace=1./(1+.0007*s)**3
R1 N003 N005 1K
.tran 0 300m 10m
.params w0=2*pi*1K Q=5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1812 1620
WIRE 32 880 -400 880
WIRE -400 896 -400 880
WIRE 1408 896 1328 896
WIRE 1520 896 1408 896
WIRE 1632 896 1584 896
WIRE 368 912 176 912
WIRE 848 912 432 912
WIRE 1328 912 1328 896
WIRE 432 928 432 912
WIRE 1056 928 976 928
WIRE 1136 928 1056 928
WIRE 1280 928 1136 928
WIRE 368 944 368 912
WIRE 384 944 368 944
WIRE 848 944 816 944
WIRE 1136 944 1136 928
WIRE 1280 976 1264 976
WIRE -400 992 -400 976
WIRE 384 992 368 992
WIRE 1328 1008 1328 992
WIRE 368 1024 368 992
WIRE 432 1024 432 1008
WIRE 1136 1040 1136 1024
WIRE 1136 1120 1136 1104
WIRE 1056 1184 1056 928
WIRE 1056 1184 1024 1184
WIRE 816 1216 816 944
WIRE 880 1216 816 1216
SYMBOL E 1328 896 R0
WINDOW 0 32 28 Left 2
SYMATTR InstName E2
SYMATTR Value Laplace=1./(1+.0007*s)**3
SYMBOL e 432 912 R0
WINDOW 3 -25 150 Center 2
WINDOW 39 -31 183 Center 2
SYMATTR Value Laplace={w0/Q}*s /(s*s  + {w0/Q}*s + {w0*w0})
SYMATTR SpiceLine window=.1 nfft=4096
SYMATTR InstName E1
SYMBOL BV -400 880 R0
SYMATTR InstName B1
SYMATTR Value V=rand(time*250) >= .5
SYMBOL DIGITAL\\PHIDET 880 928 R0
WINDOW 3 -16 72 Left 2
WINDOW 39 -28 140 Left 2
WINDOW 40 -16 176 Left 2
WINDOW 123 -16 104 Left 2
SYMATTR Value Iout=15u
SYMATTR SpiceLine Vhigh=2.5
SYMATTR SpiceLine2 Ref=0
SYMATTR Value2 Vlow=-.5
SYMATTR InstName A5
SYMBOL res 1120 928 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL SPECIALFUNCTIONS\\MODULATE 1024 1184 M0
WINDOW 0 55 -43 Right 2
WINDOW 3 57 119 Center 2
SYMATTR InstName A3
SYMATTR Value mark=1.1K space=.9K
SYMBOL cap 1120 1040 R0
SYMATTR InstName C2
SYMATTR Value .0025
SYMBOL SPECIALFUNCTIONS\\MODULATE 32 880 R0
WINDOW 0 37 -55 Left 2
WINDOW 3 57 119 Center 2
SYMATTR InstName A1
SYMATTR Value mark=1.1K space=.9K
SYMBOL DIGITAL\\SCHMTBUF 1520 832 R0
WINDOW 0 1 33 Left 2
WINDOW 3 12 105 Center 2
SYMATTR InstName A4
SYMATTR Value Vt=.5 Vh=100m
FLAG -400 992 0
FLAG -400 880 IN
FLAG 1264 976 0
FLAG 1328 1008 0
FLAG 368 1024 0
FLAG 432 1024 0
FLAG 1632 896 out
FLAG 1408 896 signal
FLAG 1136 1120 0
TEXT -224 1240 Left 2 !.tran 0 300m 10m
TEXT -224 1200 Left 2 !.params w0=2*pi*1K Q=5
TEXT -224 1280 Left 2 !;.options baudrate=250 delay=1.4m
TEXT 568 1336 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1715.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1715.asy)
XU1 N003 N001 +V 0 +V 0 N002 LT1715 ;pnba In+)In-)Vcc)Vee)VS+)GND)OUT
V1 +V 0 5
V3 N003 0 1
V2 N001 0 PULSE(0 2 0 .5u .5u 0 1u)
.tran 3u
.lib LT1715.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 800
WIRE 224 224 224 208
WIRE 256 224 224 224
WIRE 224 240 224 224
WIRE 256 240 256 224
WIRE -400 272 -400 256
WIRE 208 272 -272 272
WIRE -272 288 -272 272
WIRE 384 288 288 288
WIRE 208 304 96 304
WIRE 96 320 96 304
WIRE 224 352 224 336
WIRE 240 352 224 352
WIRE 256 352 256 336
WIRE 256 352 240 352
WIRE -400 368 -400 352
WIRE 240 384 240 352
WIRE -272 400 -272 368
WIRE 96 416 96 400
SYMBOL voltage 96 304 R0
SYMATTR InstName V3
SYMATTR Value 1
SYMBOL voltage -400 256 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL LT1715 240 288 R0
SYMATTR InstName U1
SYMBOL voltage -272 272 R0
WINDOW 3 17 101 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 2 0 .5u .5u 0 1u)
SYMATTR InstName V2
FLAG -400 368 0
FLAG -400 256 +V
FLAG 224 208 +V
FLAG -272 400 0
FLAG 96 416 0
FLAG 240 384 0
TEXT 232 448 Left 2 !.tran 3u