Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADAQ23878.asc
* Generated by LTspice 26.0.1 for Windows.
* Simulation Settings:
* Power Supplies:
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\ADAQ23878.asy)
;.tran 10u
;.ac dec 100 100 10G
V4 N003 N002 SINE(0 1.8189 100k) AC 1
XU2 N001 N002 N002 NC_01 NC_02 N003 N003 N005 NC_03 NC_04 VS_P VS_P VS_N NC_05 NC_06 NC_07 VDD Vout N004 0 ADAQ23878 ;pnba OUT+)IN-_2)IN-_1)SJ-)SJ+)IN+_1)IN+_2)OUT-)ADCIN+)ADCIN-)VS+)PDB_AMP)VS-)REF_IN)VCMO)REFBUF)VDD)Vout)CNV)ADC_GND
V2 N004 0 PULSE(0 1.8 66.6n .2n .2n 5n 66.6n)
V1 VS_P 0 6.5
V5 VDD 0 5
V3 VS_N 0 -2
.noise V(Vout) V1 dec 500 100 10G
.lib ADAQ23878.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1496 700
WIRE -144 -480 -144 -560
WIRE 432 -480 432 -560
WIRE -560 -336 -640 -336
WIRE -688 -288 -816 -288
WIRE -560 -288 -688 -288
WIRE -688 -240 -688 -288
WIRE -560 -240 -688 -240
WIRE 656 -240 544 -240
WIRE 704 -240 656 -240
WIRE -816 -208 -816 -288
WIRE -1488 -112 -1488 -160
WIRE -1344 -112 -1344 -160
WIRE -1200 -112 -1200 -160
WIRE -1488 -80 -1488 -112
WIRE -1344 -80 -1344 -112
WIRE -1200 -80 -1200 -112
WIRE -560 -64 -688 -64
WIRE 704 -64 544 -64
WIRE -816 -16 -816 -128
WIRE -688 -16 -688 -64
WIRE -688 -16 -816 -16
WIRE -560 -16 -688 -16
WIRE 704 -16 704 -64
WIRE -1488 32 -1488 0
WIRE -1344 32 -1344 0
WIRE -1344 32 -1488 32
WIRE -1200 32 -1200 0
WIRE -1200 32 -1344 32
WIRE -560 32 -640 32
WIRE -1488 64 -1488 32
WIRE 704 144 704 64
WIRE -192 256 -192 176
WIRE -144 256 -144 176
WIRE 128 272 128 176
RECTANGLE Normal -1104 128 -1600 -400 2
SYMBOL voltage -1344 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 6.5
SYMBOL voltage 704 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1.8 66.6n .2n .2n 5n 66.6n)
SYMBOL voltage -1200 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 5
SYMBOL voltage -816 -112 R180
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V4
SYMATTR Value SINE(0 1.8189 100k)
SYMBOL voltage -1488 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -2
SYMBOL ADAQ23878 -192 -176 R0
SYMATTR InstName U2
FLAG 704 144 0
FLAG -1488 64 0
FLAG -1488 -112 VS_N
FLAG -1344 -112 VS_P
FLAG -1200 -112 VDD
FLAG 656 -240 Vout
FLAG 432 -560 VDD
FLAG -192 256 VS_P
FLAG -144 -560 VS_P
FLAG -144 256 VS_N
FLAG 128 272 0
TEXT -1568 -376 Left 2 ;Simulation Settings:
TEXT -1552 -336 Left 2 !.noise V(Vout) V1 dec 500 100 10G
TEXT -1552 -272 Left 2 !;.tran 10u
TEXT -1552 -304 Left 2 !;.ac dec 100 100 10G
TEXT -1568 -216 Left 2 ;Power Supplies:
* Z:\home\khalils\Downloads\files\data\raw_asc\1c415020ec99_Non-Inverting_Summing.asc
* Generated by LTspice 26.0.1 for Windows.
* NON-INVERTING SUMMING
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
Ri N006 0 5k
Rf N005 N006 10k
V4 0 N001 12
R3 N003 N008 1k
V5 N007 0 12
V2 0 N004 3
R2 N003 N004 1k
V1 0 N002 2
V3 0 N008 5
Rl N005 0 1k
XU1 N003 N006 N007 N001 N005 LT1001 ;pnba In+)In-)V+)V-)OUT
R1 N003 N002 1k
.tran 0 10m 1m 50
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 400 -80 320 -80
WIRE 400 -32 400 -80
WIRE -32 64 -272 64
WIRE 128 64 48 64
WIRE 400 64 400 48
WIRE 320 144 320 -80
WIRE -32 160 -176 160
WIRE 128 160 128 64
WIRE 128 160 48 160
WIRE 288 160 128 160
WIRE 448 176 352 176
WIRE 512 176 448 176
WIRE 288 192 240 192
WIRE 512 208 512 176
WIRE 320 240 320 208
WIRE -272 256 -272 64
WIRE -176 256 -176 160
WIRE -32 256 -80 256
WIRE 128 256 128 160
WIRE 128 256 48 256
WIRE -80 304 -80 256
WIRE 512 320 512 288
WIRE 320 336 320 320
WIRE -272 416 -272 336
WIRE -176 416 -176 336
WIRE -176 416 -272 416
WIRE -80 416 -80 384
WIRE -80 416 -176 416
WIRE 240 432 240 192
WIRE 304 432 240 432
WIRE 448 432 448 176
WIRE 448 432 384 432
WIRE -272 448 -272 416
WIRE 240 480 240 432
WIRE 240 592 240 560
SYMBOL res 64 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 496 192 R0
SYMATTR InstName Rl
SYMATTR Value 1k
SYMBOL voltage 320 224 R0
SYMATTR InstName V5
SYMATTR Value 12
SYMBOL voltage -272 352 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL OpAmps\\OP07 320 240 M180
SYMATTR InstName U1
SYMBOL res 64 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 224 464 R0
SYMATTR InstName Ri
SYMATTR Value 5k
SYMBOL voltage -176 352 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL voltage 400 64 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V4
SYMATTR Value 12
SYMBOL res 400 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rf
SYMATTR Value 10k
SYMBOL voltage -80 400 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 64 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1k
FLAG 512 320 0
FLAG -272 448 0
FLAG 320 336 0
FLAG 400 64 0
FLAG 240 592 0
TEXT -216 456 Left 2 !.tran 0 10m 1m 50
TEXT -144 -32 Left 2 ;NON-INVERTING SUMMING
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4896.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4896.asy)
V1 +V 0 5
V2 -V 0 -5
XU1 IN N001 +V -V OUT ADA4896-2 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 249
R2 OUT N001 249
Vin IN 0 SINE(0 1 10K)
Rload OUT 0 10K
.tran 1m
.lib ADA4896-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1168 144 -1184
WIRE 256 -1168 256 -1184
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 144 -1072 144 -1088
WIRE 256 -1072 256 -1088
WIRE 432 -1072 432 -1088
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 256 -1184 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 249
SYMBOL Opamps\\ADA4896 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 144 -1184 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 249
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
FLAG 144 -1184 +V
FLAG 144 -1072 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1184 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 256 -1072 0
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\39ee6612ff9b_112.asc
* Generated by LTspice 26.0.1 for Windows.
* .tran 200u
Vi N001 0 0
R1 N002 0 1K
D1 N001 N002 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc Vi -8 8 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 96 64 96
WIRE 384 96 256 96
WIRE 64 176 64 96
WIRE 384 176 384 96
WIRE 64 320 64 256
WIRE 240 320 64 320
WIRE 384 320 384 256
WIRE 384 320 240 320
WIRE 240 368 240 320
SYMBOL voltage 64 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vi
SYMATTR Value 0
SYMBOL res 368 160 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL diode 192 80 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG 240 368 0
TEXT 72 -64 Left 2 ;.tran 200u
TEXT 72 -16 Left 2 !.dc Vi -8 8 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1574-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 9
L1 N001 OUT 100 Rser=0.02 Rpar=5000
C2 OUT 0 100 Rser=0.02
XU1 OUT MP_01 MP_02 0 N001 IN IN IN LTC1574 top=51K bot=31.5K ;pnba Sense)))GND)SW)Vin)Ipgm)_SHDN
Rload OUT 0 10
.tran 3m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1574-3.3.asy)
.lib LTC1574.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1492 912
WIRE 464 528 352 528
WIRE 624 528 464 528
WIRE 352 544 352 528
WIRE 624 544 624 528
WIRE 464 608 464 528
WIRE 496 608 464 608
WIRE 784 608 752 608
WIRE 896 608 864 608
WIRE 976 608 896 608
WIRE 976 624 976 608
WIRE 352 640 352 624
WIRE 464 672 464 608
WIRE 496 672 464 672
WIRE 896 672 896 608
WIRE 896 672 752 672
WIRE 896 688 896 672
WIRE 976 720 976 704
WIRE 624 768 624 736
WIRE 896 768 896 752
FLAG 976 608 OUT
FLAG 896 768 0
FLAG 976 720 0
FLAG 624 768 0
FLAG 352 640 0
FLAG 352 528 IN
SYMBOL VOLTAGE 352 528 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL IND 768 624 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL POLCAP 880 688 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL PowerProducts\\LTC1574-3.3 624 624 R0
SYMATTR InstName U1
SYMBOL res 960 608 R0
SYMATTR InstName Rload
SYMATTR Value 10
TEXT 792 824 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\varistor.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
A1 IN 0 0 0 0 0 OUT 0 VARISTOR Rclamp=1
V1 N001 0 SIN(0 5 10K)
R1 N001 OUT 1K
V2 IN 0 PULSE(-3 3 0 .5m .5m 0 1m)
.tran 1u 3m 0 1u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1700 736
WIRE 1312 304 704 304
WIRE 704 320 704 304
WIRE 1312 320 1312 304
WIRE 704 416 704 400
WIRE 1312 416 1312 400
WIRE 1376 416 1312 416
WIRE 1312 448 1312 416
WIRE 1168 464 704 464
WIRE 1296 464 1168 464
WIRE 704 480 704 464
WIRE 1296 496 1264 496
WIRE 1312 544 1312 512
WIRE 704 576 704 560
SYMBOL SPECIALFUNCTIONS\\VARISTOR 1328 416 R0
WINDOW 0 -4 28 Left 2
WINDOW 3 0 96 Left 2
SYMATTR InstName A1
SYMATTR Value Rclamp=1
SYMBOL RES 1296 304 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL VOLTAGE 704 464 R0
SYMATTR InstName V2
SYMATTR Value PULSE(-3 3 0 .5m .5m 0 1m)
SYMBOL VOLTAGE 704 304 R0
SYMATTR InstName V1
SYMATTR Value SIN(0 5 10K)
FLAG 704 416 0
FLAG 704 576 0
FLAG 1264 496 0
FLAG 1312 544 0
FLAG 1168 464 IN
FLAG 1376 416 OUT
TEXT 1376 568 Left 2 !.tran 1u 3m 0 1u
TEXT 1080 600 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\tmp\asc_dec_bjh7r6w2\0dcb295ebd90_CH03-KP2-14_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N004 N005 1
V1 N002 N004 3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 208 32 208
WIRE 304 208 224 208
WIRE 400 208 304 208
WIRE 592 208 480 208
WIRE 304 272 304 208
WIRE 304 384 304 352
WIRE 304 512 304 464
WIRE 304 512 32 512
WIRE 592 512 304 512
SYMBOL res 288 368 R0
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL voltage 304 256 R0
SYMATTR InstName V1
SYMATTR Value 3
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1581-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Vout
* +
* -
* Remote Load Sensing
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1581-2.5.asy)
Rpar1 N003 N002 10m
C1 N003 N006 22
V2 N001 0 5
XU1 N005 N006 N003 N002 N001 N004 LT1581-2.5 ;pnba ADJ)GND)SENSE)OUTPUT)POWER)CONTROL
Iload N003 N006 PULSE(400m 7 150u 100n 100n 200u 600u)
C2 N005 N006 20
V1 N004 0 12
Rpar2 N006 0 10m
.tran 500u
.lib LT1584.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1492 680
WIRE 16 -96 -192 -96
WIRE -192 -80 -192 -96
WIRE 16 -48 16 -96
WIRE -192 16 -192 0
WIRE 272 16 256 16
WIRE 368 16 352 16
WIRE -96 96 -192 96
WIRE -192 112 -192 96
WIRE 368 176 368 16
WIRE 368 176 256 176
WIRE 560 176 368 176
WIRE -192 208 -192 192
WIRE 368 208 368 176
WIRE 560 208 560 176
WIRE 144 256 144 240
WIRE 16 336 16 240
WIRE 144 336 144 320
WIRE 144 336 16 336
WIRE 368 336 368 272
WIRE 368 336 144 336
WIRE 560 336 560 288
WIRE 560 336 368 336
WIRE 368 352 368 336
WIRE 368 448 368 432
SYMBOL voltage -192 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL PowerProducts\\LT1581-2.5 80 96 R0
SYMATTR InstName U1
SYMBOL cap 352 208 R0
WINDOW 39 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL cap 128 256 R0
SYMATTR InstName C2
SYMATTR Value 20
SYMBOL current 560 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 108 Left 2
SYMATTR InstName Iload
SYMATTR Value PULSE(400m 7 150u 100n 100n 200u 600u)
SYMBOL res 368 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rpar1
SYMATTR Value 10m
SYMBOL voltage -192 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 352 336 R0
SYMATTR InstName Rpar2
SYMATTR Value 10m
FLAG -192 208 0
FLAG -192 16 0
FLAG 368 448 0
TEXT 616 400 Left 2 !.tran 500u
TEXT 464 248 Left 2 ;Vout
TEXT 480 200 Left 2 ;+
TEXT 488 296 Left 2 ;-
TEXT 88 -120 Bottom 2 ;Remote Load Sensing
* Z:\home\khalils\Downloads\files\data\raw_asc\188fed4475f8_MOS-OUT-3.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 0 IRF7220
Vds N001 0
Vgs N002 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vds 0 -10V Vgs -0.8V -1.1V 0.1V
.meas dc Id_5V find Id(M1) when Vds=5V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1292 680
WIRE -560 -144 -720 -144
WIRE -720 -64 -720 -144
WIRE -560 -16 -560 -144
WIRE -768 16 -912 16
WIRE -912 32 -912 16
WIRE -912 128 -912 112
WIRE -720 128 -720 32
WIRE -560 128 -560 64
SYMBOL voltage -560 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 37 60 Left 2
SYMATTR InstName Vds
SYMATTR Value ""
SYMBOL pmos -768 -64 R0
SYMATTR InstName M1
SYMATTR Value IRF7220
SYMBOL voltage -912 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 53 Left 2
WINDOW 3 40 69 Left 2
WINDOW 0 36 56 Left 2
SYMATTR Value ""
SYMATTR InstName Vgs
FLAG -560 128 0
FLAG -912 128 0
FLAG -720 128 0
TEXT -920 160 Left 2 !.dc Vds 0 -10V  Vgs -0.8V -1.1V 0.1V
TEXT -920 184 Left 2 !.meas dc Id_5V find Id(M1) when Vds=5V
* Z:\home\khalils\Downloads\files\data\raw_asc\38c50db22a55_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
D4 N001 N002 1N4148
D1 N002 N003 1N4148
D3 N001 0 1N4148
D2 0 N003 1N4148
Vi N002 0 SINE(0 10V 10K)
R1 N003 N001 1K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 200u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 224 64 96 64
WIRE 336 64 224 64
WIRE 496 64 400 64
WIRE 224 144 224 64
WIRE -64 176 -64 64
WIRE -64 176 -112 176
WIRE 496 176 496 64
WIRE 608 176 496 176
WIRE 608 272 608 176
WIRE -64 304 -64 176
WIRE 32 304 -64 304
WIRE 224 304 224 224
WIRE 224 304 96 304
WIRE 336 304 224 304
WIRE 496 304 496 176
WIRE 496 304 400 304
WIRE 224 368 224 304
WIRE -112 448 -112 176
WIRE 608 448 608 352
WIRE 608 448 -112 448
SYMBOL res 592 256 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL diode 32 320 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL diode 336 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 224 128 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vi
SYMATTR Value SINE(0 10V 10K)
SYMBOL diode 336 320 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL diode 32 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D4
SYMATTR Value 1N4148
FLAG 224 368 0
TEXT -114 454 Left 2 !.tran 200u
* Z:\home\khalils\Downloads\files\data\raw_asc\1162e5051175_eje1_sch.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N003 0 ?
vg N001 0 Pdisp = 10nW
rg N002 N001 10
L1 N002 N003 ?
RL N003 0 100
f =100MHz
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 96 -48 96
WIRE 160 96 96 96
WIRE 288 96 240 96
WIRE 384 96 288 96
WIRE -48 128 -48 96
WIRE 288 128 288 96
WIRE 384 128 384 96
WIRE -48 240 -48 208
WIRE 288 240 288 192
WIRE 384 240 384 208
SYMBOL cap 272 128 R0
SYMATTR InstName C1
SYMATTR Value ?
SYMBOL ind 144 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value ?
SYMBOL voltage -48 112 R0
SYMATTR InstName vg
SYMATTR Value Pdisp = 10nW
SYMBOL res 368 112 R0
SYMATTR InstName RL
SYMATTR Value 100
SYMBOL res 112 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName rg
SYMATTR Value 10
FLAG -48 240 0
FLAG 288 240 0
FLAG 384 240 0
TEXT 24 232 Left 2 !f =100MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4221-1B.asc
* Generated by LTspice 26.0.1 for Windows.
* GND1 is modeled as common GND
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4221-1B.asy)
C2 Gate_B 0 2.2n
C1 Gate_A 0 2.2n
R3 Gate_B N007 5.11
V4 N004 0 15
V2 N003 0 5
XU1 Vin N003 0 N005 N006 0 N007 N004 0 N001 N002 ADuM4221-1B ;pnba PWM)VDD1)GND1)DISABLE)DT)GNDB)VOB)VDDB)GNDA)VOA)VDDA
R1 N006 0 10K
V5 N002 0 15
R2 Gate_A N001 5.11
V3 N005 0 0
V1 Vin 0 PULSE(0 5 0 2n 2n 5u 10u)
.tran 50u
.lib ADuM4221-1B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 3080 680
WIRE -1824 -432 -2208 -432
WIRE -1728 -432 -1824 -432
WIRE -1136 -432 -1424 -432
WIRE -1008 -432 -1056 -432
WIRE -880 -432 -1008 -432
WIRE -832 -432 -880 -432
WIRE -1008 -400 -1008 -432
WIRE -2208 -384 -2208 -432
WIRE -1248 -368 -1424 -368
WIRE -1728 -352 -2096 -352
WIRE -1248 -352 -1248 -368
WIRE -1008 -320 -1008 -336
WIRE -1392 -304 -1424 -304
WIRE -2096 -288 -2096 -352
WIRE -1728 -272 -1760 -272
WIRE -1248 -224 -1424 -224
WIRE -1248 -208 -1248 -224
WIRE -1728 -176 -1984 -176
WIRE -1392 -160 -1424 -160
WIRE -1728 -112 -1872 -112
WIRE -1136 -96 -1424 -96
WIRE -1008 -96 -1056 -96
WIRE -880 -96 -1008 -96
WIRE -832 -96 -880 -96
WIRE -1984 -80 -1984 -176
WIRE -1872 -64 -1872 -112
WIRE -1008 -64 -1008 -96
WIRE -1008 32 -1008 0
WIRE -2208 128 -2208 -304
WIRE -2096 128 -2096 -208
WIRE -1984 128 -1984 0
WIRE -1872 128 -1872 16
SYMBOL voltage -2096 -304 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -2208 -400 R0
WINDOW 0 26 98 Left 2
WINDOW 3 33 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 2n 2n 5u 10u)
SYMBOL res -1040 -448 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5.11
SYMBOL res -1888 -80 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -1248 -368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 43 29 Left 2
WINDOW 3 46 61 Left 2
SYMATTR InstName V5
SYMATTR Value 15
SYMBOL cap -1024 -400 R0
SYMATTR InstName C1
SYMATTR Value 2.2n
SYMBOL ADuM4221-1B -1568 -336 R0
SYMATTR InstName U1
SYMBOL voltage -1984 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 0
SYMBOL cap -1024 -64 R0
SYMATTR InstName C2
SYMATTR Value 2.2n
SYMBOL res -1040 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5.11
SYMBOL voltage -1248 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 34 Left 2
WINDOW 3 45 64 Left 2
SYMATTR InstName V4
SYMATTR Value 15
FLAG -1984 128 0
FLAG -1392 -160 0
FLAG -2208 128 0
FLAG -2096 128 0
FLAG -1824 -432 Vin
FLAG -1392 -304 0
FLAG -1760 -272 0
FLAG -1872 128 0
FLAG -1248 -128 0
FLAG -880 -96 Gate_B
FLAG -880 -432 Gate_A
FLAG -1008 32 0
FLAG -1008 -320 0
FLAG -1248 -272 0
TEXT -1728 8 Left 2 !.tran 50u
TEXT -1728 -16 Left 1 ;GND1 is modeled as common GND
* Z:\home\khalils\Downloads\files\data\raw_asc\4649b5ccb3c4_1844-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1844-1.5.asy)
V1 IN 0 5
I1 OUT 0 {iload} load
XU1 IN 0 IN OUT LTC1844-1.5 ;pnba IN)GND)_SHDN)OUT
.dc v1 5 0 10m
.measure DC vdrop WHEN V(out)=1.4
.measure DC dropout param Vdrop-1.4
.param iload=150m
.lib LTC1844-1.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1940 1316
WIRE 64 80 -48 80
WIRE 80 80 64 80
WIRE 464 80 368 80
WIRE -48 96 -48 80
WIRE 464 96 464 80
WIRE -48 192 -48 176
WIRE 464 192 464 176
WIRE 64 240 64 80
WIRE 80 240 64 240
WIRE 224 304 224 288
SYMBOL current 464 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 25 81 Left 2
WINDOW 3 36 48 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMATTR Value {iload}
SYMBOL voltage -48 80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL LTC1844-1.5 224 160 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -48 192 0
FLAG 464 192 0
FLAG 464 80 OUT
FLAG -48 80 IN
TEXT 648 120 Left 2 !.dc v1 5 0 10m
TEXT 648 208 Left 2 !.measure DC vdrop WHEN V(out)=1.4\n.measure DC dropout param Vdrop-1.4
TEXT 648 160 Left 2 !.param iload=150m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1726-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1726-2.5.asy)
V6 N009 0 PULSE(0 2 5000ms 1u 1u 800ms 1600m 6)
R3 N007 N006 10K
XU1 N002 N003 N004 0 N009 N006 N008 N005 LTC1726-2.5 ;pnba VCC3)VCC25)VCCA)GND)WDI)_RST)WT)RT
C2 N008 0 47n
V2 N002 0 PWL(0 0 250m 3.3 3 3.3 3.5 0 4 0 4.5 3.3 100 3.3)
R2 N004 0 100K
V1 N001 0 PWL(0 0 100m 1.8V 5s 1.8V 5.5s 0V 6s 0V 6.5s 1.8V 6.8s 1.8V 6.8001s 0V 6.8002s 1.8V 6.9s 1.8V 6.9001s 0V 6.9002s 1.8V 100s 1.8V)
V4 N007 0 5
V3 N003 0 PWL(0 0 350m 2.5 1 2.5 1.5 0 2 0 2.5 2.5 100 2.5)
C1 N005 0 47n
R1 N001 N004 66.5K
.tran 17
.lib LTC1726-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2616 848
WIRE 768 48 592 48
WIRE 592 64 592 48
WIRE 224 128 -320 128
WIRE 768 128 768 48
WIRE 128 160 -224 160
WIRE 592 160 592 144
WIRE 592 160 320 160
WIRE 592 176 592 160
WIRE 128 192 128 160
WIRE 224 192 224 128
WIRE 320 192 320 160
WIRE 768 240 768 208
WIRE 592 272 592 256
WIRE 0 304 -16 304
WIRE 80 304 64 304
WIRE 400 304 368 304
WIRE 528 304 480 304
WIRE 528 336 528 304
WIRE 0 432 -16 432
WIRE 80 432 64 432
WIRE 448 432 368 432
WIRE 528 432 528 416
WIRE 448 464 448 432
WIRE -224 480 -224 160
WIRE 224 496 224 480
WIRE -320 560 -320 128
WIRE 448 560 448 544
WIRE -224 576 -224 560
WIRE -320 656 -320 640
SYMBOL cap 64 288 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 47n
SYMBOL voltage -320 544 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PWL(0 0 250m 3.3 3 3.3 3.5 0 4 0 4.5 3.3 100 3.3)
SYMATTR InstName V2
SYMBOL res 576 48 R0
SYMATTR InstName R1
SYMATTR Value 66.5K
SYMBOL voltage 768 112 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PWL(0 0 100m 1.8V 5s 1.8V 5.5s 0V 6s 0V 6.5s 1.8V 6.8s 1.8V 6.8001s 0V 6.8002s 1.8V 6.9s 1.8V 6.9001s 0V 6.9002s 1.8V 100s 1.8V)
SYMATTR InstName V1
SYMBOL res 576 160 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL voltage 448 448 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V6
SYMATTR Value PULSE(0 2 5000ms 1u 1u 800ms 1600m 6)
SYMBOL voltage 528 320 R0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL LTC1726-2.5 224 400 R0
SYMATTR InstName U1
SYMBOL cap 64 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 47n
SYMBOL res 496 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL voltage -224 464 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PWL(0 0 350m 2.5 1 2.5 1.5 0 2 0 2.5 2.5 100 2.5)
SYMATTR InstName V3
FLAG 448 560 0
FLAG 528 432 0
FLAG 768 240 0
FLAG -224 576 0
FLAG -320 656 0
FLAG 224 496 0
FLAG -16 304 0
FLAG -16 432 0
FLAG 592 272 0
TEXT 872 608 Left 2 !.tran 17