Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1614-1.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1614-1.3.asy)
R2 N003 0 60.4k
Rload OUT 0 20
C3 N006 0 33n
R1 N005 N006 12.1k
L1 IN N001 15 Rser=200m
R3 N002 0 10k
C1 N004 0 47n
V1 IN 0 5
XU1 N005 N002 IN 0 MP_01 N001 MP_02 IN N003 N004 ADP1614-1.3 ;pnba Comp)FB)EN)Gnd))SW))Vin)Clres)SS
C4 N005 0 10p
R4 OUT N002 71.5k
D1 N001 OUT MBRS340
C2 OUT 0 33 Rser=2m
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 8m startup
.lib ADP1614-1.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1096 680
WIRE 32 -48 -112 -48
WIRE 240 -48 32 -48
WIRE 288 -48 240 -48
WIRE 416 -48 368 -48
WIRE 464 -48 416 -48
WIRE 560 -48 528 -48
WIRE 672 -48 560 -48
WIRE 816 -48 672 -48
WIRE -112 -16 -112 -48
WIRE 672 -16 672 -48
WIRE 816 0 816 -48
WIRE 560 16 560 -48
WIRE 240 32 240 -48
WIRE -112 80 -112 64
WIRE 32 96 32 -48
WIRE 96 96 32 96
WIRE 416 96 416 -48
WIRE 416 96 384 96
WIRE 672 96 672 48
WIRE 816 96 816 80
WIRE 560 128 560 96
WIRE 560 128 480 128
WIRE 560 160 560 128
WIRE 0 208 -16 208
WIRE 96 208 80 208
WIRE 480 208 480 128
WIRE 480 208 384 208
WIRE 560 256 560 240
WIRE 96 320 16 320
WIRE 432 320 384 320
WIRE 544 320 432 320
WIRE 432 336 432 320
WIRE 16 352 16 320
WIRE 544 352 544 320
WIRE 240 416 240 384
WIRE 432 432 432 416
WIRE 16 448 16 416
WIRE 544 448 544 416
WIRE 432 528 432 496
SYMBOL cap 0 352 R0
SYMATTR InstName C1
SYMATTR Value 47n
SYMBOL res 544 144 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 416 320 R0
SYMATTR InstName R1
SYMATTR Value 12.1k
SYMBOL cap 416 432 R0
WINDOW 39 24 80 Left 2
SYMATTR InstName C3
SYMATTR Value 33n
SYMBOL cap 528 352 R0
SYMATTR InstName C4
SYMATTR Value 10p
SYMBOL res 800 -16 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL VOLTAGE -112 -32 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 272 -32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
WINDOW 39 -53 63 VTop 2
SYMATTR InstName L1
SYMATTR Value 15
SYMATTR SpiceLine Rser=200m
SYMBOL res 544 0 R0
SYMATTR InstName R4
SYMATTR Value 71.5k
SYMBOL schottky 464 -64 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 96 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 60.4k
SYMBOL cap 656 -16 R0
SYMATTR SpiceLine Rser=2m
SYMATTR InstName C2
SYMATTR Value 33
SYMBOL ADP1614-1.3 240 208 R0
SYMATTR InstName U1
FLAG -112 80 0
FLAG -112 -48 IN
FLAG 816 -48 OUT
FLAG 560 256 0
FLAG 672 96 0
FLAG 432 528 0
FLAG -16 208 0
FLAG 816 96 0
FLAG 240 416 0
FLAG 16 448 0
FLAG 544 448 0
TEXT 8 504 Left 2 !.tran 8m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1a27daebfc20_spark_gap.asc
* Generated by LTspice 26.0.1 for Windows.
B1 current_check 0 V=IF(I(S1) < -500m, 100V, -10V)
B2 voltage_check 0
S1 N001 SPARK[B] spark_control P001 SW
RLeakage1 SPARK[T] SPARK[B] 100Meg
RFlux_Losses1 SPARK[T] sgt 2.5K
RSpark_Resistance_guess1 sgt N001 -0.5
Lead_Inductance1 sgt SPARK[T] 130n
Carc_capacitance1 SPARK[T] SPARK[B] 3p
R1 spark_control voltage_check 100
R2 spark_control current_check 100
R3 0 P001 100
.model sw sw
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2128 820
WIRE 192 -144 -80 -144
WIRE 256 -144 192 -144
WIRE 432 -144 256 -144
WIRE 464 -144 432 -144
WIRE 192 -128 192 -144
WIRE 256 -128 256 -144
WIRE 432 -64 432 -144
WIRE 224 -48 192 -48
WIRE 256 -48 224 -48
WIRE 464 48 464 -144
WIRE 224 96 224 -48
WIRE 224 144 224 96
WIRE -288 272 -288 256
WIRE -272 272 -288 272
WIRE -288 288 -288 272
WIRE 224 304 224 224
WIRE -176 368 -288 368
WIRE 176 368 -176 368
WIRE -288 464 -288 448
WIRE -272 464 -288 464
WIRE -288 480 -288 464
WIRE 224 608 224 384
WIRE 224 608 -80 608
WIRE 432 608 432 16
WIRE 432 608 224 608
WIRE 464 608 464 112
WIRE 464 608 432 608
FLAG -80 -144 SPARK[T]
IOPIN -80 -144 BiDir
FLAG -80 608 SPARK[B]
IOPIN -80 608 BiDir
FLAG -288 176 0
FLAG -288 560 0
FLAG 96 320 0
FLAG -272 272 voltage_check
FLAG -272 464 current_check
FLAG -176 368 spark_control
FLAG 224 96 sgt
SYMBOL bv -288 464 R0
WINDOW 0 24 16 Invisible 2
WINDOW 3 -42 54 Right 2
SYMATTR InstName B1
SYMATTR Value V=IF(I(S1) < -500m, 100V, -10V)
SYMBOL bv -288 272 R180
WINDOW 0 24 96 Invisible 2
WINDOW 3 42 56 Left 2
SYMATTR InstName B2
SYMATTR Value ""
SYMBOL sw 224 288 R0
SYMATTR InstName S1
SYMBOL res 416 -80 R0
WINDOW 0 -100 46 Left 2
WINDOW 3 -121 76 Left 2
SYMATTR InstName Leakage1
SYMATTR Value 100MEG
SYMBOL res 240 -144 R0
WINDOW 0 38 39 Left 2
WINDOW 3 39 66 Left 2
SYMATTR InstName Flux_Losses1
SYMATTR Value 2.5K
SYMBOL res 208 128 R0
WINDOW 0 -11 38 Right 2
WINDOW 3 -14 65 Right 2
SYMATTR InstName Spark_Resistance_guess1
SYMATTR Value -0.5
SYMBOL ind 208 -32 R180
WINDOW 0 41 70 Left 2
WINDOW 3 43 43 Left 2
SYMATTR InstName Lead_Inductance1
SYMATTR Value 130n
SYMBOL cap 448 48 R0
WINDOW 0 51 24 Left 2
WINDOW 3 51 51 Left 2
SYMATTR InstName arc_capacitance1
SYMATTR Value 3p
SYMBOL res -272 384 R180
WINDOW 0 36 76 Invisible 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res -304 352 R0
WINDOW 0 -34 43 Invisible 2
WINDOW 3 -41 51 Left 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL res 80 336 R270
WINDOW 0 32 56 Invisible 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100
TEXT 56 392 Left 2 !.model sw sw
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1084.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1084.asy)
V1 IN 0 PWL(0 0 1 10) Rser=0.1
R2 N001 0 365
Rload OUT 0 10
R1 OUT N001 121
C1 OUT 0 10
XU1 N001 OUT IN LT1084 ;pnba ADJ)OUT)IN
.tran 1
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1424 896
WIRE 1856 896 1808 896
WIRE 1952 896 1856 896
WIRE 2080 896 1952 896
WIRE 1856 912 1856 896
WIRE 2080 912 2080 896
WIRE 1424 928 1424 896
WIRE 1952 928 1952 896
WIRE 1952 1008 1952 992
WIRE 2080 1008 2080 992
WIRE 1680 1024 1680 992
WIRE 1856 1024 1856 992
WIRE 1856 1024 1680 1024
WIRE 1424 1040 1424 1008
WIRE 1856 1040 1856 1024
WIRE 1856 1136 1856 1120
SYMBOL VOLTAGE 1424 912 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMATTR SpiceLine Rser=0.1
SYMBOL RES 2064 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL cap 1936 928 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL RES 1840 896 R0
SYMATTR InstName R1
SYMATTR Value 121
SYMBOL RES 1840 1024 R0
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL PowerProducts\\LT1084 1680 896 R0
SYMATTR InstName U1
FLAG 2080 896 OUT
FLAG 1856 1136 0
FLAG 2080 1008 0
FLAG 1424 1040 0
FLAG 1952 1008 0
FLAG 1424 896 IN
TEXT 1976 1096 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6233-10.asc
* Generated by LTspice 26.0.1 for Windows.
* Single Supply, Low Noise, Low Power, Bandpass Filter with Gain=10
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6233-10.asy)
R4 N003 0 10K
V2 IN 0 ac 1
R3 +V N003 10K
C2 OUT N002 47p
XU1 N003 N002 OUT +V 0 0 LT6233-10 ;pnba IN+)IN-)OUT)VCC)VEE)EN_L
R5 N002 N001 732
V1 +V 0 10
R1 OUT N001 732
C3 N001 IN 1000p
C1 N003 0 .1
.ac oct 100 100K 10Meg
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -192 -64 -224 -64
WIRE 208 -64 -112 -64
WIRE -336 -48 -336 -64
WIRE 96 -16 -96 -16
WIRE 208 -16 208 -64
WIRE 208 -16 160 -16
WIRE -336 48 -336 32
WIRE -32 64 -48 64
WIRE 80 64 80 48
WIRE 80 64 48 64
WIRE 80 128 80 64
WIRE -320 176 -400 176
WIRE -224 176 -224 -64
WIRE -224 176 -256 176
WIRE -208 176 -224 176
WIRE -96 176 -96 -16
WIRE -96 176 -128 176
WIRE 48 176 -96 176
WIRE -400 192 -400 176
WIRE 208 208 208 -16
WIRE 208 208 192 208
WIRE 224 208 208 208
WIRE -48 240 -48 64
WIRE -48 240 -128 240
WIRE 48 240 -48 240
WIRE -128 256 -128 240
WIRE -48 256 -48 240
WIRE -400 288 -400 272
WIRE -128 352 -128 320
WIRE -48 352 -48 336
SYMBOL cap -256 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1000p
SYMBOL res -112 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 732
SYMBOL res 64 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res -64 240 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL opamps\\LT6233-10 80 208 R0
WINDOW 0 42 -60 Left 2
WINDOW 3 69 43 Left 2
SYMATTR InstName U1
SYMBOL cap -144 256 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage -400 176 R0
SYMATTR InstName V2
SYMATTR Value ac 1
SYMBOL res -96 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 732
SYMBOL cap 160 -32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 47p
SYMBOL voltage -336 -64 R0
SYMATTR InstName V1
SYMATTR Value 10
FLAG -336 48 0
FLAG 80 48 +V
FLAG -336 -64 +V
FLAG -48 352 0
FLAG -128 352 0
FLAG -400 288 0
FLAG 224 208 OUT
FLAG -400 176 IN
FLAG 128 288 0
FLAG 80 288 0
TEXT 80 352 Left 2 !.ac oct 100 100K 10Meg
TEXT -56 -168 Bottom 2 ;Single Supply, Low Noise, Low Power, Bandpass Filter with Gain=10
* Z:\home\khalils\Downloads\files\data\raw_asc\14b5a1b91e42_16V_EXT_simplified.asc
* Generated by LTspice 26.0.1 for Windows.
S1 N002 N001 16V_Enable 0 SWH
B2 System_PWR 0 I={if(V(System_PWR) > 0, V(16V_EXT)*(-1)*I(B1)/V(System_PWR), 0)}
R2 N002 16V_EXT 0.002
B1 N001 0 V={if(V(System_PWR)>16, 16+0.006*sin(2*pi*400E3*time), V(System_PWR))}
R5 16V_Enable 0 10k
S2 0 N002 16V_Enable 0 SWL
.model SWH SW(Ron=0.0001 Roff=10Meg Vt=1.5 Vh=-.4)
.model SWL SW(Ron=10Meg Roff=0.0001 Vt=1.5 Vh=-.4)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2004 680
WIRE 368 -144 336 -144
WIRE 480 -144 448 -144
WIRE 480 -48 480 -144
WIRE 432 16 384 16
WIRE 480 64 480 32
WIRE 640 64 480 64
WIRE 848 64 720 64
WIRE 480 96 480 64
WIRE -160 160 -160 96
WIRE 432 160 416 160
WIRE -288 176 -288 96
WIRE 480 224 480 176
WIRE -288 304 -288 256
WIRE -160 304 -160 240
IOPIN 848 64 Out
IOPIN -288 96 In
IOPIN 432 -32 In
IOPIN 432 112 In
IOPIN -160 96 In
SYMBOL res -176 144 R0
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL sw 480 192 M180
SYMATTR InstName S2
SYMATTR Value SWL
SYMBOL bv 464 -144 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName B1
SYMATTR Value V={if(V(System_PWR)>16, 16+0.006*sin(2*pi*400E3*time), V(System_PWR))}
SYMBOL sw 480 48 M180
SYMATTR InstName S1
SYMATTR Value SWH
SYMBOL bi -288 176 R0
WINDOW 3 527 205 Right 2
SYMATTR Value I={if(V(System_PWR) > 0, V(16V_EXT)*(-1)*I(B1)/V(System_PWR), 0)}
SYMATTR InstName B2
SYMBOL res 624 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 0.002
FLAG 848 64 16V_EXT
FLAG 336 -144 0
FLAG -288 304 0
FLAG -288 96 System_PWR
FLAG 432 -32 16V_Enable
FLAG 432 112 16V_Enable
FLAG 384 16 0
FLAG 416 160 0
FLAG 480 224 0
FLAG -160 96 16V_Enable
FLAG -160 304 0
TEXT 296 304 Left 2 !.model SWH SW(Ron=0.0001 Roff=10Meg Vt=1.5 Vh=-.4)
TEXT 296 328 Left 2 !.model SWL SW(Ron=10Meg Roff=0.0001 Vt=1.5 Vh=-.4)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3027.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3027.asy)
R6 N006 0 25
R2 N004 0 249K
C4 N006 0 10
XU1 N007 N008 N005 N004 N003 N002 N001 N001 N005 N006 0 LT3027 ;pnba BYP2)ADJ2)_SHDN2)ADJ1)BYP1)OUT1)_SHDN1)IN1)IN2)OUT2)GND
R5 N008 0 249K
R1 N002 N004 422K
C3 N002 0 10
C2 N006 N007 .01
R4 N006 N008 261K
R3 N002 0 33
V2 N001 0 PWL(0 0 1 10)
V1 N005 0 PWL(0 0 1 10)
C1 N002 N003 .01
.tran 1
.lib LT3027.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 96 -224 96
WIRE 16 96 -32 96
WIRE 336 96 304 96
WIRE 448 96 336 96
WIRE 560 96 448 96
WIRE 656 96 560 96
WIRE 560 112 560 96
WIRE 656 112 656 96
WIRE 336 160 304 160
WIRE -32 176 -32 96
WIRE 16 176 -32 176
WIRE -224 192 -224 176
WIRE 448 208 448 176
WIRE 448 208 304 208
WIRE 560 208 560 176
WIRE 656 208 656 192
WIRE -32 272 -224 272
WIRE 16 272 -32 272
WIRE 336 336 304 336
WIRE 448 336 336 336
WIRE 560 336 448 336
WIRE 656 336 560 336
WIRE -32 352 -32 272
WIRE 16 352 -32 352
WIRE 560 352 560 336
WIRE 656 352 656 336
WIRE -224 368 -224 352
WIRE 336 400 304 400
WIRE 16 448 -48 448
WIRE 448 448 448 416
WIRE 448 448 304 448
WIRE 560 448 560 416
WIRE 656 448 656 432
SYMBOL voltage -224 256 R0
WINDOW 0 28 35 Left 2
WINDOW 3 9 97 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 544 112 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL PowerProducts\\LT3027 160 272 R0
SYMATTR InstName U1
SYMBOL res 432 432 R0
SYMATTR InstName R5
SYMATTR Value 249K
SYMBOL res 432 320 R0
SYMATTR InstName R4
SYMATTR Value 261K
SYMBOL voltage -224 80 R0
WINDOW 0 28 35 Left 2
WINDOW 3 9 97 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 432 80 R0
SYMATTR InstName R1
SYMATTR Value 422K
SYMBOL cap 544 352 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL cap 320 336 R0
WINDOW 0 30 13 Left 2
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL res 432 192 R0
SYMATTR InstName R2
SYMATTR Value 249K
SYMBOL res 640 336 R0
SYMATTR InstName R6
SYMATTR Value 25
SYMBOL cap 320 96 R0
WINDOW 0 30 18 Left 2
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL res 640 96 R0
SYMATTR InstName R3
SYMATTR Value 33
FLAG -48 448 0
FLAG -224 192 0
FLAG 448 288 0
FLAG 560 208 0
FLAG 656 208 0
FLAG 448 528 0
FLAG 560 448 0
FLAG 656 448 0
FLAG -224 368 0
TEXT 104 536 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\0dbf49616583_sim1_ID_nmos.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N002 0 3.3
V2 N001 0 3.3
M1 N001 N002 0 0 MOSFET-N l=0.6u w=10.8u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 0 5 10m
.include modelos.sp
.meas corriente1 find id(m1) at 0.5
.meas dc r1 param=0.5/corriente1
.meas corriente2 find id(m1) at 1
.meas dc r2 param=1/corriente2
.meas corriente3 find id(m1) at 2
.meas dc r3 param=2/corriente3
.meas corriente4 find id(m1) at 3.3
.meas dc r4 param=3.3/corriente4
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 192 128 192
WIRE 368 208 368 192
WIRE 176 240 128 240
WIRE 80 272 -64 272
WIRE -64 288 -64 272
WIRE 128 304 128 288
WIRE 176 304 176 240
WIRE 176 304 128 304
WIRE 128 336 128 304
WIRE 368 352 368 288
WIRE -64 416 -64 368
SYMBOL voltage -64 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage 368 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL nmos4 80 192 R0
SYMATTR InstName M1
SYMATTR Value MOSFET-N
SYMATTR Value2 l=0.6u w=10.8u
FLAG -64 416 0
FLAG 368 352 0
FLAG 128 336 0
TEXT 120 152 Left 2 !.dc V2 0 5 10m
TEXT -96 96 Left 2 !.include modelos.sp
TEXT -96 -120 Left 2 !.meas corriente1 find id(m1) at 0.5\n.meas dc r1 param=0.5/corriente1\n.meas corriente2 find id(m1) at 1\n.meas dc r2 param=1/corriente2\n.meas corriente3 find id(m1) at 2\n.meas dc r3 param=2/corriente3\n.meas corriente4 find id(m1) at 3.3\n.meas dc r4 param=3.3/corriente4
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1174-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1174-3.3.asy)
L1 N001 OUT 100 Rser=0.02 Rpar=5000
Rload OUT 0 10
XU1 OUT N003 N002 0 N001 IN IN IN LTC1174 top=51K bot=31.5K ;pnba FB)LBout)LBin)GND)SW)Vin)Ipgm)_SHDN
V1 IN 0 9
C1 OUT 0 100 Rser=0.02
D1 0 N001 MBRS140
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100m startup
.lib LTC1174.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1584 1140
WIRE 448 480 320 480
WIRE 624 480 448 480
WIRE 320 496 320 480
WIRE 624 512 624 480
WIRE 448 560 448 480
WIRE 496 560 448 560
WIRE 816 560 752 560
WIRE 864 560 816 560
WIRE 976 560 944 560
WIRE 1072 560 976 560
WIRE 816 576 816 560
WIRE 1072 576 1072 560
WIRE 320 592 320 576
WIRE 496 624 480 624
WIRE 768 624 752 624
WIRE 816 656 816 640
WIRE 1072 672 1072 656
WIRE 448 688 448 560
WIRE 496 688 448 688
WIRE 976 688 976 560
WIRE 976 688 752 688
WIRE 976 704 976 688
WIRE 624 752 624 736
WIRE 976 784 976 768
SYMBOL VOLTAGE 320 480 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL SCHOTTKY 800 640 M180
WINDOW 0 30 60 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL POLCAP 960 704 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL res 1056 560 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL PowerProducts\\LTC1174-3.3 624 624 R0
SYMATTR InstName U1
SYMBOL IND 848 576 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02 Rpar=5000
FLAG 1072 560 OUT
FLAG 976 784 0
FLAG 1072 672 0
FLAG 816 656 0
FLAG 624 752 0
FLAG 320 592 0
FLAG 320 480 IN
TEXT 704 792 Left 2 !.tran 100m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3522.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 3
R1 OUT1 N008 1Meg
R2 N008 0 422K
C2 OUT1 0 10
XU1 N006 N001 0 N002 N008 N003 N001 N001 0 N007 N005 OUT1 0 N004 N001 N001 LTC3522 ;pnba FB2)PWM)GND)Pgood2)FB1)Pgood1)_SHDN1)PVin1)PGND2)SW1B)SW1A)Vout1)PGND1)SW2)PVin2)_SHDN2
L1 N004 OUT2 4.7
R3 OUT2 N006 137K
R4 N006 0 68.1K
C3 OUT2 0 10
L2 N005 N007 4.7
R5 N001 N002 511K
R6 N001 N003 511K
Rload2 OUT2 0 9
Rload1 OUT1 0 11
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3522.asy)
.lib LTC3522.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1160 916
WIRE 128 128 32 128
WIRE 240 128 128 128
WIRE 352 128 240 128
WIRE 544 128 352 128
WIRE 672 128 544 128
WIRE 32 144 32 128
WIRE 128 144 128 128
WIRE 672 144 672 128
WIRE 352 160 352 128
WIRE 544 160 544 128
WIRE 32 240 32 224
WIRE 128 240 128 224
WIRE 272 240 128 240
WIRE 672 240 672 224
WIRE 672 240 624 240
WIRE -16 352 -144 352
WIRE 80 352 -16 352
WIRE 128 352 80 352
WIRE 272 352 208 352
WIRE 672 352 624 352
WIRE -144 368 -144 352
WIRE -16 368 -16 352
WIRE 80 368 80 352
WIRE 672 368 672 352
WIRE -144 464 -144 448
WIRE -16 464 -16 432
WIRE 80 464 80 448
WIRE 272 464 80 464
WIRE 672 464 672 448
WIRE 672 464 624 464
WIRE 80 480 80 464
WIRE 80 576 80 560
WIRE 240 576 240 128
WIRE 272 576 240 576
WIRE 672 576 624 576
WIRE 768 576 672 576
WIRE 848 576 768 576
WIRE 672 592 672 576
WIRE 768 592 768 576
WIRE 848 592 848 576
WIRE 240 688 240 576
WIRE 272 688 240 688
WIRE 672 688 672 672
WIRE 672 688 624 688
WIRE 768 688 768 656
WIRE 848 688 848 672
WIRE 672 704 672 688
WIRE 240 800 240 688
WIRE 272 800 240 800
WIRE 672 800 672 784
WIRE 352 896 352 880
WIRE 448 896 448 880
WIRE 544 896 544 880
FLAG 32 240 0
FLAG 848 688 0
FLAG 672 800 0
FLAG 768 688 0
FLAG 80 576 0
FLAG -16 464 0
FLAG -144 464 0
FLAG 352 896 0
FLAG 448 896 0
FLAG 544 896 0
FLAG -144 352 OUT2
FLAG 848 576 OUT1
SYMBOL voltage 32 128 R0
WINDOW 3 26 96 Left 2
SYMATTR Value 3
SYMATTR InstName V1
SYMBOL res 656 576 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL res 656 688 R0
SYMATTR InstName R2
SYMATTR Value 422K
SYMBOL cap 752 592 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL PowerProducts\\LTC3522 448 512 R0
SYMATTR InstName U1
SYMBOL ind 224 368 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL res 64 352 R0
SYMATTR InstName R3
SYMATTR Value 137K
SYMBOL res 64 464 R0
SYMATTR InstName R4
SYMATTR Value 68.1K
SYMBOL cap -32 368 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL ind 656 352 R0
SYMATTR InstName L2
SYMATTR Value 4.7
SYMBOL res 112 128 R0
SYMATTR InstName R5
SYMATTR Value 511K
SYMBOL res 656 128 R0
SYMATTR InstName R6
SYMATTR Value 511K
SYMBOL res -160 352 R0
SYMATTR InstName Rload2
SYMATTR Value 9
SYMBOL res 832 576 R0
SYMATTR InstName Rload1
SYMATTR Value 11
TEXT 696 872 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2f75cb6ac2fc_bss83.asc
* Generated by LTspice 26.0.1 for Windows.
* GAMMA added
* Enhanced model of the BSS83 from Philips\n \nSweep of Vgs from 0 to 5V at Vsb=-8, -4, 0V\n.dc V1 0 5 .1 V2 -8 0 4\nPlot Id(M1) to see how Vsb changes the behaviour.\n \nI added GAMMA=0.2 to the model to get the correct Ids(Vgs, Vsb).\nThe simulated drain current is independent of Vsb if GAMMA is \nomitted. This was clearly a missing parameter in the original model.\n \nThe complete ".model"-statement can be also put into a file \nlike BSS83.mod and added with a SPICEdirective.\n.include BSS83.mod
* * Philips model\n.MODEL BSS83 NMOS\n+ LEVEL=3\n+ W=1E-3\n+ L=1E-6\n+ VTO=2\n+ VMAX=1E6\n+ RS=3\n+ RD=3\n+ CJ=0.001396\n+ MJ=0.3936\n+ THETA=1E-6\n+ ETA=0.009307\n+ KAPPA=2.226
+ LEVEL=3
+ W=1E-3
+ L=1E-6
+ VTO=2
+ VMAX=1E6
+ RS=3
+ RD=3
+ CJ=0.001396
+ MJ=0.3936
+ THETA=1E-6
+ ETA=0.009307
+ KAPPA=2.226
+ GAMMA=0.2
M1 N001 N003 0 N002 BSS83
V1 N003 0 2
V3 N001 0 5
V2 N002 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.MODEL BSS83 NMOS
.dc V1 0 5 .1 V2 -8 0 4
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1088 680
WIRE 32 256 32 224
WIRE 32 384 32 336
WIRE 128 224 32 224
WIRE 176 144 176 -32
WIRE 176 384 176 240
WIRE 288 -32 176 -32
WIRE 288 0 288 -32
WIRE 288 112 288 80
WIRE 288 192 176 192
WIRE 288 224 288 192
WIRE 288 384 288 304
SYMBOL voltage 288 208 R0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL nmos4 128 144 R0
SYMATTR InstName M1
SYMATTR Value BSS83
SYMBOL voltage 32 240 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL voltage 288 -16 R0
SYMATTR InstName V3
SYMATTR Value 5
FLAG 288 112 0
FLAG 288 384 0
FLAG 32 384 0
FLAG 176 384 0
TEXT 448 0 Left 0 !* GAMMA added\n.MODEL BSS83 NMOS\n+ LEVEL=3\n+ W=1E-3\n+ L=1E-6\n+ VTO=2\n+ VMAX=1E6\n+ RS=3\n+ RD=3\n+ CJ=0.001396\n+ MJ=0.3936\n+ THETA=1E-6\n+ ETA=0.009307\n+ KAPPA=2.226\n+ GAMMA=0.2
TEXT 32 -112 Left 0 !.dc V1 0 5  .1 V2 -8 0 4
TEXT 32 -72 Left 0 !.op
TEXT 32 -496 Left 0 ;Enhanced model of the BSS83 from Philips\n \nSweep of Vgs from 0 to 5V at Vsb=-8, -4, 0V\n.dc V1 0 5  .1 V2 -8 0 4\nPlot Id(M1) to see how Vsb changes the behaviour.\n \nI added GAMMA=0.2 to the model to get the correct Ids(Vgs, Vsb).\nThe simulated drain current is independent of Vsb if GAMMA is \nomitted. This was clearly a missing parameter in the original model.\n \nThe complete ".model"-statement can be also put into a file \nlike BSS83.mod and added with a SPICEdirective.\n.include BSS83.mod
TEXT 720 0 Left 0 ;* Philips model\n.MODEL BSS83 NMOS\n+ LEVEL=3\n+ W=1E-3\n+ L=1E-6\n+ VTO=2\n+ VMAX=1E6\n+ RS=3\n+ RD=3\n+ CJ=0.001396\n+ MJ=0.3936\n+ THETA=1E-6\n+ ETA=0.009307\n+ KAPPA=2.226
* Z:\home\khalils\Downloads\files\data\raw_asc\496b73df4e49_EJ2.asc
* Generated by LTspice 26.0.1 for Windows.
* Respuesta en frecuencia
V1 N001 0 AC 1
R2 N003 N004 0.25
C3 N003 0 2
R1 N002 N001 1
C2 N004 0 4
C1 N003 N002 0.4
.ac dec 100 0.001 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 96 -80 96
WIRE 64 96 32 96
WIRE 192 96 128 96
WIRE 304 96 192 96
WIRE 192 128 192 96
WIRE -80 176 -80 96
WIRE 304 192 304 96
WIRE 192 240 192 208
WIRE -80 336 -80 256
WIRE 192 336 192 304
WIRE 192 336 -80 336
WIRE 304 336 304 256
WIRE 304 336 192 336
WIRE 192 352 192 336
SYMBOL cap 288 192 R0
WINDOW 0 -34 30 Left 2
WINDOW 3 39 32 Left 2
SYMATTR InstName C3
SYMATTR Value 2
SYMBOL cap 128 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.4
SYMBOL res 176 112 R0
WINDOW 0 -38 57 Left 2
WINDOW 3 41 59 Left 2
SYMATTR InstName R2
SYMATTR Value 0.25
SYMBOL res 48 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL cap 176 240 R0
WINDOW 0 -34 31 Left 2
WINDOW 3 40 31 Left 2
SYMATTR InstName C2
SYMATTR Value 4
SYMBOL voltage -80 160 R0
WINDOW 0 -66 56 Left 2
WINDOW 3 42 57 Left 2
WINDOW 123 42 85 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
FLAG 192 352 0
TEXT 328 128 Left 2 ;Respuesta en frecuencia
TEXT 332 154 Left 2 !.ac dec 100 0.001 100