Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\24abba9b8c63_R1D1C1.asc
* Generated by LTspice 26.0.1 for Windows.
C1 VOUT 0 100n
D1 N001 VOUT D
V1 VIN 0 SINE(0 5 1k)
R1 N001 VIN 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 0.01 0 0.001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 -288 16 -288
WIRE 176 -288 128 -288
WIRE 288 -288 240 -288
WIRE 368 -288 288 -288
WIRE 16 -224 16 -288
WIRE 288 -208 288 -288
WIRE 16 -64 16 -144
WIRE 288 -64 288 -144
WIRE 288 -64 16 -64
WIRE 288 -32 288 -64
SYMBOL res 144 -304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 16 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1k)
SYMBOL cap 272 -208 R0
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL diode 176 -272 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
FLAG 368 -288 VOUT
FLAG 288 -32 0
FLAG 288 -64 GROUND
FLAG 16 -288 VIN
TEXT 24 -48 Left 2 !.tran 0 0.01 0 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP165-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
C1 OUT 0 1
Rload OUT 0 120
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
XU1 IN 0 N001 OUT ADP16xfd K=833.3u ;pnba Vin)GND)En)Vout
.tran 4m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP165-1.2.asy)
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 416 96 352 96
WIRE 528 96 416 96
WIRE -64 112 -64 96
WIRE 416 112 416 96
WIRE 528 112 528 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 416 208 416 176
WIRE 528 208 528 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
FLAG -64 208 0
FLAG 256 272 0
FLAG 416 208 0
FLAG 528 208 0
FLAG 528 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 512 96 R0
SYMATTR InstName Rload
SYMATTR Value 120
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL ADP165-1.2 256 208 R0
SYMATTR InstName U1
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8641.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8641.asy)
V1 +V 0 12
V2 -V 0 -12
Rload OUT 0 10K
R1 N001 0 10K
Vin IN 0 SINE(0 1 100K)
XU1 IN N001 +V -V OUT AD8641 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 10K
.tran 100u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1200 144 -1216
WIRE 256 -1200 256 -1216
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 144 -1104 144 -1120
WIRE 256 -1104 256 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 384 -1088
WIRE 752 -1088 752 -1104
WIRE 384 -1072 384 -1088
WIRE 752 -992 752 -1008
WIRE 384 -976 384 -992
SYMBOL voltage 384 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100K)
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 256 -1216 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL Opamps\\AD8641 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 144 -1216 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
FLAG 384 -976 0
FLAG 752 -1104 OUT
FLAG 384 -1088 IN
FLAG 576 -1136 +V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 752 -992 0
FLAG 144 -1216 +V
FLAG 256 -1216 -V
FLAG 256 -1104 0
FLAG 144 -1104 0
TEXT 728 -944 Left 2 !.tran 100u
* Z:\tmp\asc_dec_bjh7r6w2\0fcb3e02eb2a_BandPassSKSecondOrder_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N005 10k
V2 0 V-- 9
R4 N002 N001 1k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 592 96 368 96
WIRE 720 96 672 96
WIRE 272 208 224 208
WIRE 592 208 496 208
WIRE 496 224 496 208
WIRE 720 224 720 96
WIRE 720 224 656 224
WIRE 784 224 720 224
WIRE 128 240 128 224
WIRE 128 240 112 240
WIRE 592 240 544 240
WIRE 720 240 720 224
WIRE 128 256 128 240
WIRE 224 304 224 208
WIRE 544 336 544 240
WIRE 720 336 720 320
WIRE 720 336 544 336
WIRE 720 352 720 336
WIRE 224 432 224 384
SYMBOL Res 704 224 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL Voltage 128 240 R0
SYMATTR InstName V2
SYMATTR Value 9
SYMBOL Res 688 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1k
FLAG 112 240 0
FLAG 128 144 V++
FLAG 128 336 V--
FLAG 224 432 0
FLAG 624 192 V--
FLAG 624 256 V++
* Z:\home\khalils\Downloads\files\data\raw_asc\9ae900010772_labor2_4_4RD.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N003 N004 2.2k
R1 N001 N002 120
D1 N002 N001 1N4148
V2 N001 0 20
M1 N002 N004 0 0 2N7002
V1 N003 0 PULSE(0 5 0 1p 1p 5u 10u)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 -144 -192 -144
WIRE 256 -96 256 -144
WIRE 368 -96 256 -96
WIRE 368 0 368 -96
WIRE 256 48 256 -96
WIRE 256 144 256 128
WIRE 368 144 368 64
WIRE 368 144 256 144
WIRE 256 160 256 144
WIRE 96 240 -96 240
WIRE 208 240 176 240
WIRE -192 272 -192 -144
WIRE -96 272 -96 240
WIRE -192 384 -192 352
WIRE -96 384 -96 352
WIRE -96 384 -192 384
WIRE 256 384 256 256
WIRE 256 384 -96 384
WIRE -96 416 -96 384
SYMBOL voltage -192 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 20
SYMBOL nmos 208 160 R0
SYMATTR InstName M1
SYMATTR Value 2N7002
SYMBOL voltage -96 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 1p 1p 5u 10u)
SYMBOL diode 352 64 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 80 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 2.2k
SYMBOL res 240 32 R0
SYMATTR InstName R1
SYMATTR Value 120
FLAG -96 416 0
TEXT -224 440 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3225.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:\n \n1. To emulate the supercapacitor charging process within acceptable \ntime interval, the capcitance is scaled down from its real value.\n \n2. Load capcitor initial condion can be given to mimic the specific \nresidual voltage at the beginning of the charging.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3225.asy)
XU1 N001 N002 Cx IN NC_01 0 N003 0 IN OUT LTC3225 ;pnba C+)C-)Cx)_SHDN)Pgood)Vsel)Prog)GND)Vin)Cout
C2 OUT Cx .1m
V1 IN 0 3.2
C1 N001 N002 1
C3 Cx 0 .1m
R1 N003 0 12K
.tran 1m startup
.ic V(cx)=2 V(out)=3.5
.lib LTC3225.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 704
WIRE 112 0 -16 0
WIRE 240 0 112 0
WIRE -16 16 -16 0
WIRE 240 16 240 0
WIRE 112 80 112 0
WIRE 128 80 112 80
WIRE 400 80 352 80
WIRE 400 96 400 80
WIRE -16 112 -16 96
WIRE 400 176 400 160
WIRE 400 176 352 176
WIRE 128 272 112 272
WIRE 400 272 352 272
WIRE 400 288 400 272
WIRE 32 368 16 368
WIRE 128 368 112 368
WIRE 400 368 400 352
WIRE 400 368 352 368
WIRE 400 384 400 368
WIRE 240 448 240 432
WIRE 400 464 400 448
SYMBOL voltage -16 0 R0
SYMATTR InstName V1
SYMATTR Value 3.2
SYMBOL res 128 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 12K
SYMBOL PowerProducts\\LTC3225 240 224 R0
SYMATTR InstName U1
SYMBOL cap 384 384 R0
WINDOW 0 27 13 Left 2
WINDOW 3 25 55 Left 2
SYMATTR InstName C3
SYMATTR Value .1m
SYMBOL cap 384 96 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 384 288 R0
WINDOW 3 28 51 Left 2
SYMATTR Value .1m
SYMATTR InstName C2
FLAG 240 448 0
FLAG -16 112 0
FLAG 400 464 0
FLAG 16 368 0
FLAG 112 272 0
FLAG -16 0 IN
FLAG 400 272 OUT
FLAG 400 368 Cx
TEXT 544 384 Left 2 !.tran 1m startup\n.ic V(cx)=2 V(out)=3.5
TEXT -112 464 Left 2 ;Notes:\n \n1. To emulate the supercapacitor charging process within acceptable \ntime interval, the capcitance is scaled down from its real value.\n \n2. Load capcitor initial condion can be given to mimic the specific \nresidual voltage at the beginning of the charging.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1615-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1615-1.asy)
R1 OUT N002 1Meg
Rload OUT 0 1K
D1 N001 OUT BAT54
V1 IN 0 4
L1 IN N001 10 Rpar=20K
R2 N002 0 130K
XU1 N001 0 N002 IN IN LT1615-1 ;pnba SW)GND)FB)_SHDN)Vin
C2 OUT 0 1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LT1615-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1360 904
WIRE 416 464 304 464
WIRE 512 464 416 464
WIRE 560 464 512 464
WIRE 672 464 640 464
WIRE 720 464 672 464
WIRE 848 464 784 464
WIRE 944 464 848 464
WIRE 1040 464 944 464
WIRE 304 480 304 464
WIRE 944 480 944 464
WIRE 1040 480 1040 464
WIRE 512 528 512 464
WIRE 672 528 672 464
WIRE 848 560 848 464
WIRE 304 576 304 560
WIRE 944 576 944 544
WIRE 1040 576 1040 560
WIRE 416 656 416 464
WIRE 448 656 416 656
WIRE 848 656 848 640
WIRE 848 656 736 656
WIRE 848 672 848 656
WIRE 848 768 848 752
WIRE 592 800 592 784
SYMBOL POLCAP 928 480 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL ind 544 480 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rpar=20K
SYMBOL RES 832 656 R0
SYMATTR InstName R2
SYMATTR Value 130K
SYMBOL RES 1024 464 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL RES 832 544 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL VOLTAGE 304 464 R0
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL SCHOTTKY 720 480 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value BAT54
SYMBOL PowerProducts\\LT1615-1 592 656 R0
SYMATTR InstName U1
FLAG 304 576 0
FLAG 592 800 0
FLAG 1040 576 0
FLAG 944 576 0
FLAG 848 768 0
FLAG 1040 464 OUT
FLAG 304 464 IN
TEXT 904 808 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\36fdb28edcf8_2ndOrderBandpass.asc
* Generated by LTspice 26.0.1 for Windows.
* f0 and Q set by parameters
* R1 is arbitary
* This version puts 1/2 the R1 resistance in the capacitor
* Vout
* Vin
* The parameter "H" sets the midband gain
L1 N003 0 {L1} Cpar={C1}
R1 N002 0 {R1/2}
G1 0 N002 1 0 {2/R1}
V1 1 0 AC 1
R3 2 0 .1
R4 2 0 1Meg
G2 0 2 N003 0 {10*H}
R2 N003 N002 {R1/2}
.param f0= 1k Q=0.5
.param R1=1k
.param L1=1/(C1*(2*pi*f0)**2)
.param C1=Q/(R1*2*pi*f0)
.param H=1
.ac dec 101 100 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE -384 -128 -448 -128
WIRE -288 -128 -320 -128
WIRE -112 -128 -240 -128
WIRE -64 -128 -112 -128
WIRE 64 -128 16 -128
WIRE 240 -128 64 -128
WIRE 400 -128 288 -128
WIRE 464 -128 400 -128
WIRE 496 -128 464 -128
WIRE 624 -128 560 -128
WIRE -448 -112 -448 -128
WIRE -240 -96 -240 -128
WIRE -288 -80 -288 -128
WIRE -112 -64 -112 -128
WIRE 64 -64 64 -128
WIRE 288 -64 288 -128
WIRE 400 -64 400 -128
WIRE 624 -64 624 -128
WIRE 240 -48 240 -128
WIRE -448 0 -448 -32
WIRE -288 0 -288 -32
WIRE -240 16 -240 -16
WIRE 240 32 240 0
WIRE 288 32 288 16
WIRE 400 32 400 16
WIRE 624 32 624 16
WIRE -112 48 -112 16
WIRE 64 48 64 16
SYMBOL Misc\\jumper -352 -192 M0
SYMATTR InstName J1
SYMBOL ind 48 -80 R0
WINDOW 0 59 45 Bottom 2
WINDOW 3 61 50 Top 2
WINDOW 123 102 107 Bottom 2
SYMATTR InstName L1
SYMATTR Value {L1}
SYMATTR Value2 Cpar={C1}
SYMBOL res -128 -80 R0
SYMATTR InstName R1
SYMATTR Value {R1/2}
SYMBOL res 384 -80 R0
SYMATTR InstName R3
SYMATTR Value .1
SYMBOL Misc\\jumper 528 -192 R0
SYMATTR InstName J2
SYMBOL g -240 -112 R0
SYMATTR InstName G1
SYMATTR Value {2/R1}
SYMBOL g 288 -80 R0
SYMATTR InstName G2
SYMATTR Value {10*H}
SYMBOL res 32 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R1/2}
SYMBOL voltage -448 -128 R0
WINDOW 0 35 41 Left 2
WINDOW 123 33 80 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMBOL res 608 -80 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
FLAG 64 48 0
FLAG -112 48 0
FLAG -240 16 0
FLAG -288 0 0
FLAG 240 32 0
FLAG 288 32 0
FLAG 400 32 0
FLAG 464 -128 2
FLAG -288 -128 1
FLAG -448 0 0
FLAG 624 32 0
TEXT -96 136 Left 2 !.param f0= 1k Q=0.5
TEXT -264 176 Left 2 !.param R1=1k
TEXT -440 296 Left 2 !.param L1=1/(C1*(2*pi*f0)**2)
TEXT -432 136 Left 2 ;f0 and Q set by parameters
TEXT -432 176 Left 2 ;R1 is arbitary
TEXT -328 -200 Left 2 ;This version puts 1/2 the R1 resistance in the capacitor
TEXT -440 256 Left 2 !.param C1=Q/(R1*2*pi*f0)
TEXT 576 -144 Left 2 ;Vout
TEXT -400 -144 Right 2 ;Vin
TEXT -432 216 Left 2 ;The parameter "H" sets the midband gain
TEXT 64 216 Left 2 !.param H=1
TEXT -440 336 Left 2 !.ac dec 101 100 10k
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3313-0.75.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3313-0.75.asy)
C3 N004 0 330p
Rload OUT 0 94m
C2 N003 0 3.3n
V1 IN 0 3.3
C1 OUT 0 47 x2
R3 OUT N001 500K
R4 N005 N004 4.99k
L1 N002 OUT 80n Rser=2m
R5 N006 0 274K
XU1 IN IN N002 OUT 0 0 N006 N001 IN N005 N003 LTC3313-0.75 ;pnba Vin)EN)SW)OUT)Agnd)Pgnd)Rt)Pgood)Mode/Sync)Ith)SSTT
.tran .4m startup
.lib LTC3313-0.75.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2648 1864
WIRE 1536 1248 1376 1248
WIRE 1712 1248 1536 1248
WIRE 1376 1264 1376 1248
WIRE 1712 1280 1712 1248
WIRE 1536 1328 1536 1248
WIRE 1552 1328 1536 1328
WIRE 1904 1328 1872 1328
WIRE 2016 1328 1984 1328
WIRE 1376 1360 1376 1344
WIRE 1536 1424 1536 1328
WIRE 1552 1424 1536 1424
WIRE 1904 1424 1872 1424
WIRE 2016 1424 2016 1328
WIRE 2016 1424 1984 1424
WIRE 2096 1424 2016 1424
WIRE 2208 1424 2096 1424
WIRE 2096 1440 2096 1424
WIRE 2208 1440 2208 1424
WIRE 1472 1520 1456 1520
WIRE 1552 1520 1536 1520
WIRE 2016 1520 2016 1424
WIRE 2016 1520 1872 1520
WIRE 2096 1536 2096 1504
WIRE 2208 1536 2208 1520
WIRE 1424 1616 1360 1616
WIRE 1552 1616 1504 1616
WIRE 1904 1616 1872 1616
WIRE 1360 1632 1360 1616
WIRE 1904 1632 1904 1616
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
WIRE 1360 1712 1360 1696
WIRE 1904 1728 1904 1712
SYMBOL res 2000 1312 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 500K
SYMBOL VOLTAGE 1376 1248 R0
SYMATTR Value 3.3
SYMATTR InstName V1
SYMBOL cap 2080 1440 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 x2
SYMATTR InstName C1
SYMATTR Value 47
SYMBOL res 2192 1424 R0
SYMATTR InstName Rload
SYMATTR Value 94m
SYMBOL res 1520 1600 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 4.99k
SYMBOL ind 1888 1440 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 80n
SYMATTR SpiceLine Rser=2m
SYMBOL cap 1536 1504 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 3.3n
SYMBOL cap 1344 1632 R0
SYMATTR InstName C3
SYMATTR Value 330p
SYMBOL res 1888 1616 R0
SYMATTR InstName R5
SYMATTR Value 274K
SYMBOL LTC3313-0.75 1712 1456 R0
SYMATTR InstName U1
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1376 1360 0
FLAG 2208 1536 0
FLAG 1456 1520 0
FLAG 2208 1424 OUT
FLAG 1376 1248 IN
FLAG 1360 1712 0
FLAG 2096 1536 0
FLAG 1904 1728 0
TEXT 2048 1616 Left 2 !.tran .4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\26f453159205_ltc5566_matching_374MHz.asc
* Generated by LTspice 26.0.1 for Windows.
C1 P001 N001 18p
L1 P001 OUT 1.8n
C2 N001 IN 10n
R2 IN 0 50
R1 OUT 0 9.9
L2 N001 0 11n
I1 0 IN AC 1
.ac oct 1000 10Meg 1000Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -128 112 -176 112
WIRE -48 112 -128 112
WIRE 48 112 16 112
WIRE 128 112 48 112
WIRE 288 112 272 112
WIRE -176 128 -176 112
WIRE -128 128 -128 112
WIRE 48 128 48 112
WIRE 288 128 288 112
SYMBOL res -144 112 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL cap 16 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL ind 32 112 R0
SYMATTR InstName L2
SYMATTR Value 11n
SYMBOL res 272 112 R0
SYMATTR InstName R1
SYMATTR Value 9.9
SYMBOL ind 176 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.8n
SYMBOL cap 192 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 18p
SYMBOL current -176 208 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 24 -28 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value ""
SYMATTR Value2 AC 1
FLAG 288 208 0
FLAG -176 208 0
FLAG -128 208 0
FLAG -176 112 IN
FLAG 288 112 OUT
FLAG 48 208 0
TEXT -80 256 Left 2 !.ac oct 1000 10Meg 1000Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\62bdc00b1dee_ideal_mult.asc
* Generated by LTspice 26.0.1 for Windows.
* input signals
* internally generated signals
* output signals
* Simulation of analog multiplier
* V1 and V2 represent input signals A and B
* B1 is the inverter for the signal A
* V2 is the internal triangle wave generator
* B2 represents the analog switch which is controlled by a comparator
* B3 generates a reference signal which is the real multiplication of A and B
* ----------------------------------------------
V3 ref 0 PULSE(-1 1 0 0.5u 0.5u 0 1u)
C1 out 0 1n
R1 N001 out 1k
V1 A 0 SINE(0 1 41k)
B2 N001 0 V=if(V(B)>V(ref),V(A),V(Aneg))
V2 B 0 SINE(0 1 40k)
B3 out_mult 0 V=V(A)*V(B)
B1 Aneg 0 V=-V(A)
.tran 0 10m 0 10n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1716 680
WIRE 592 32 416 32
WIRE 928 32 720 32
WIRE 1408 32 1120 32
WIRE 1520 32 1488 32
WIRE 1584 32 1520 32
WIRE 416 48 416 32
WIRE 720 48 720 32
WIRE 1120 48 1120 32
WIRE 1520 48 1520 32
WIRE 1520 128 1520 112
WIRE 592 176 416 176
WIRE 928 176 720 176
WIRE 1584 176 1120 176
WIRE 416 192 416 176
WIRE 720 192 720 176
WIRE 1120 192 1120 176
SYMBOL bv 1120 32 R0
SYMATTR InstName B2
SYMATTR Value V=if(V(B)>V(ref),V(A),V(Aneg))
SYMBOL bv 1120 176 R0
SYMATTR InstName B3
SYMATTR Value V=V(A)*V(B)
SYMBOL voltage 720 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(-1 1 0 0.5u 0.5u 0 1u)
SYMBOL voltage 416 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 1 40k)
SYMBOL cap 1504 48 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 1392 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL bv 720 32 R0
SYMATTR InstName B1
SYMATTR Value V=-V(A)
SYMBOL voltage 416 32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 1 41k)
FLAG 416 128 0
FLAG 416 272 0
FLAG 592 32 A
FLAG 592 176 B
FLAG 720 128 0
FLAG 720 272 0
FLAG 928 176 ref
FLAG 928 32 Aneg
FLAG 1120 128 0
FLAG 1120 272 0
FLAG 1584 32 out
FLAG 1584 176 out_mult
FLAG 1520 128 0
TEXT 424 -48 Left 2 ;input signals
TEXT 704 -48 Left 2 ;internally generated signals
TEXT 1256 -48 Left 2 ;output signals
TEXT 382 360 Left 2 !.tran 0 10m 0 10n
TEXT 384 -160 Left 3 ;Simulation of analog multiplier
TEXT 384 464 Left 2 ;V1 and V2 represent input signals A and B
TEXT 384 496 Left 2 ;B1 is the inverter for the signal A
TEXT 384 528 Left 2 ;V2 is the internal triangle wave generator
TEXT 384 560 Left 2 ;B2 represents the analog switch which is controlled by a comparator
TEXT 384 592 Left 2 ;B3 generates a reference signal which is the real multiplication of A and B
TEXT 384 -136 Left 3 ;----------------------------------------------
* Z:\tmp\asc_dec_bjh7r6w2\174153407447_SPC572L_ADC_ESD_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
C1 Vout 0 8p5
S1 N004 N003 N001 0 ChargeSW
S2 N005 N004 N002 0 DischargeSW
R2 NC_01 NC_02 850
R7 NC_03 NC_04 330
R1 NC_05 NC_06 850
D1 N008 N006 1N4148
R6 NC_07 NC_08 2k2
C4 Vp 0 10n
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 920 680
WIRE -320 -448 -368 -448
WIRE 80 -448 32 -448
WIRE -320 -368 -320 -448
WIRE 80 -368 80 -448
WIRE -448 -320 -448 -448
WIRE -432 -320 -448 -320
WIRE -368 -320 -368 -448
WIRE -368 -320 -384 -320
WIRE -48 -320 -48 -448
WIRE -32 -320 -48 -320
WIRE 32 -320 32 -448
WIRE 32 -320 16 -320
WIRE -448 -272 -608 -272
WIRE -256 -272 -368 -272
WIRE -48 -272 -256 -272
WIRE 128 -272 32 -272
WIRE 400 -272 208 -272
WIRE -256 -224 -256 -272
WIRE -256 -96 -256 -160
WIRE 400 -96 -256 -96
WIRE -256 -80 -256 -96
WIRE -256 -80 -608 -80
WIRE -256 -48 -256 -80
WIRE -480 32 -608 32
WIRE -352 32 -480 32
WIRE -480 48 -480 32
WIRE -608 64 -608 32
WIRE -352 64 -352 32
WIRE -480 144 -480 128
WIRE -608 208 -608 144
WIRE -608 208 -896 208
WIRE -592 208 -608 208
WIRE -560 208 -592 208
WIRE -416 208 -480 208
WIRE -352 208 -352 128
WIRE -352 208 -416 208
WIRE -288 208 -352 208
WIRE -208 208 -288 208
WIRE -48 208 -128 208
WIRE 0 208 -48 208
WIRE 96 208 0 208
WIRE 176 208 96 208
WIRE 320 208 256 208
WIRE 352 208 320 208
WIRE 496 208 432 208
WIRE 592 208 496 208
WIRE 752 208 672 208
WIRE 848 208 752 208
WIRE -592 256 -592 208
WIRE -288 256 -288 208
WIRE -48 256 -48 208
WIRE 96 256 96 208
WIRE 320 256 320 208
WIRE 496 256 496 208
WIRE 752 256 752 208
WIRE -416 272 -416 208
WIRE 96 368 96 320
WIRE 320 368 320 320
WIRE 496 368 496 320
WIRE 752 368 752 320
WIRE -592 384 -592 320
WIRE -416 384 -416 336
WIRE -288 384 -288 320
WIRE -48 384 -48 320
SYMBOL cap 736 256 R0
SYMATTR InstName C1
SYMATTR Value 8p5
SYMBOL sw -352 -272 R90
SYMATTR InstName S1
SYMATTR Value ChargeSW
SYMBOL sw 48 -272 R90
SYMATTR InstName S2
SYMATTR Value DischargeSW
SYMBOL res 272 176 R90
WINDOW 0 24 56 VBottom 2
WINDOW 3 40 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 850
SYMBOL res 224 -304 R90
WINDOW 0 24 56 VBottom 2
WINDOW 3 40 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 330
SYMBOL res 448 176 R90
WINDOW 0 24 56 VBottom 2
WINDOW 3 40 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 850
SYMBOL diode -336 128 R180
WINDOW 0 24 64 Left 2
WINDOW 3 -74 -1 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res -576 160 R180
WINDOW 0 36 76 Left 2
WINDOW 3 41 47 Left 2
SYMATTR InstName R6
SYMATTR Value 2k2
SYMBOL cap -64 256 R0
SYMATTR InstName C4
SYMATTR Value 10n
FLAG 320 368 0
FLAG 752 368 0
FLAG 848 208 Vout
FLAG 96 368 0
FLAG -48 384 0
FLAG 496 368 0
FLAG 0 208 Vp
FLAG -480 144 0
FLAG -256 -48 0
FLAG 400 -272 Vs
FLAG -320 -368 0
FLAG 80 -368 0