Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1841.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1841.asy)
V1 +V 0 5
V2 N001 0 PULSE(0 3.3 0 .5m .5m 0 1m)
R1 +V N002 10K
V3 N003 0 1
XU1 N003 N001 +V 0 N002 LTC1841 ;pnba In+)In-)V+)V-)OUT
.tran 3m
.lib LTC1841.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1144 800
WIRE 544 96 544 80
WIRE 640 96 544 96
WIRE 640 112 640 96
WIRE 0 144 0 128
WIRE 544 176 544 96
WIRE 192 192 128 192
WIRE 512 192 272 192
WIRE 640 208 640 192
WIRE 640 208 576 208
WIRE 512 224 448 224
WIRE 0 240 0 224
WIRE 448 256 448 224
WIRE 544 272 544 240
WIRE 448 352 448 336
SYMBOL voltage 448 240 R0
WINDOW 3 22 93 Left 2
SYMATTR Value 1
SYMATTR InstName V3
SYMBOL voltage 0 128 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 624 96 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL LTC1841 544 208 R0
SYMATTR InstName U1
SYMBOL voltage 288 192 R90
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 3.3 0 .5m .5m 0 1m)
SYMATTR InstName V2
FLAG 0 240 0
FLAG 0 128 +V
FLAG 128 192 0
FLAG 544 80 +V
FLAG 544 272 0
FLAG 448 352 0
TEXT 608 360 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6234.asc
* Generated by LTspice 26.0.1 for Windows.
* Single Supply, Low Noise, Low Power, Bandpass Filter with Gain=10
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6234.asy)
V1 +V 0 10
XU1 N003 N002 OUT +V 0 LT6234 ;pnba IN+)IN-)OUT)VCC)VEE
R1 OUT N001 732
R5 N002 N001 732
C3 N001 IN 1000p
R4 N003 0 10K
C1 N003 0 .1
R3 +V N003 10K
C2 OUT N002 47p
V2 IN 0 ac 1
.ac oct 100 100K 10Meg
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -336 -32 -336 -48
WIRE -192 0 -224 0
WIRE 144 0 -112 0
WIRE -80 48 -96 48
WIRE 144 48 144 0
WIRE 144 48 -16 48
WIRE -336 64 -336 48
WIRE -32 128 -48 128
WIRE 80 128 80 112
WIRE 80 128 48 128
WIRE 80 160 80 128
WIRE -320 176 -400 176
WIRE -224 176 -224 0
WIRE -224 176 -256 176
WIRE -208 176 -224 176
WIRE -96 176 -96 48
WIRE -96 176 -128 176
WIRE 48 176 -96 176
WIRE -400 192 -400 176
WIRE 144 192 144 48
WIRE 144 192 112 192
WIRE 160 192 144 192
WIRE -48 208 -48 128
WIRE -48 208 -128 208
WIRE 48 208 -48 208
WIRE -128 224 -128 208
WIRE -48 224 -48 208
WIRE 80 240 80 224
WIRE -400 288 -400 272
WIRE -128 320 -128 288
WIRE -48 320 -48 304
SYMBOL voltage -400 176 R0
SYMATTR InstName V2
SYMATTR Value ac 1
SYMBOL res -96 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 732
SYMBOL cap -256 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1000p
SYMBOL opamps\\LT6234 80 192 R0
SYMATTR InstName U1
SYMBOL res -64 208 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL cap -16 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 47p
SYMBOL voltage -336 -48 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL cap -144 224 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL res 64 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res -112 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 732
FLAG -336 64 0
FLAG 80 112 +V
FLAG -336 -48 +V
FLAG -48 320 0
FLAG -128 320 0
FLAG -400 288 0
FLAG 160 192 OUT
FLAG -400 176 IN
FLAG 80 240 0
TEXT 96 320 Left 2 !.ac oct 100 100K 10Meg
TEXT -56 -104 Bottom 2 ;Single Supply, Low Noise, Low Power, Bandpass Filter with Gain=10
* Z:\home\khalils\Downloads\files\data\raw_asc\a1737be6ba6f_example.asc
* Generated by LTspice 26.0.1 for Windows.
* "Oscilloscope"
* PMT Capacitance
* finite rise time filter
* detector pulse mock-up
* total pulse charge
* detector capacitance
* step voltage
* simulation length
V3 N001 0 PULSE(0 {U} 10n 10p 10p 1)
R1 N002 N001 0.1
R7 output 0 50
B1 output_charge 0 V=idt(V(output))/50
C2 output N002 {C_PMT}
C1 0 N002 30n
.tran 0 200n 0
.param Q -50p
.param C_PMT 200p
.param U Q/C_PMT
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 19840
WIRE -5840 1488 -6000 1488
WIRE -5712 1488 -5840 1488
WIRE -6000 1568 -6000 1488
WIRE -6000 1728 -6000 1648
WIRE -6752 1840 -6912 1840
WIRE -6544 1840 -6672 1840
WIRE -6320 1840 -6544 1840
WIRE -6000 1840 -6256 1840
WIRE -5808 1840 -6000 1840
WIRE -5648 1840 -5808 1840
WIRE -6544 1904 -6544 1840
WIRE -6912 1920 -6912 1840
WIRE -6000 1920 -6000 1840
WIRE -6912 2080 -6912 2000
WIRE -6544 2080 -6544 1968
WIRE -6000 2080 -6000 2000
SYMBOL voltage -6912 1904 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -442 107 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 {U} 10n 10p 10p 1)
SYMBOL cap -6256 1824 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {C_PMT}
SYMBOL bv -6000 1552 R0
SYMATTR InstName B1
SYMATTR Value V=idt(V(output))/50
SYMBOL res -6016 1904 R0
SYMATTR InstName R7
SYMATTR Value 50
SYMBOL res -6656 1824 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 0.1
SYMBOL cap -6528 1968 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 30n
FLAG -6912 2080 0
FLAG -6000 2080 0
FLAG -5808 1840 output
FLAG -6544 2080 0
FLAG -6000 1728 0
FLAG -5840 1488 output_charge
TEXT -6576 1624 Left 2 !.tran 0 200n 0
TEXT -5888 1960 Left 2 ;"Oscilloscope"
TEXT -6368 1752 Left 2 ;PMT Capacitance
TEXT -6784 1752 Left 2 ;finite rise time filter
TEXT -6960 1448 Left 5 ;detector pulse mock-up
TEXT -6904 1536 Left 2 ;total pulse charge
TEXT -6576 1536 Left 2 !.param Q -50p
TEXT -6904 1576 Left 2 ;detector capacitance
TEXT -6576 1576 Left 2 !.param C_PMT 200p
TEXT -7376 1952 Left 2 ;step voltage
TEXT -7200 1952 Left 2 !.param U Q/C_PMT
TEXT -6904 1624 Left 2 ;simulation length
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1179A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1179A.asy)
XU1 N003 N001 +V 0 N002 LT1178 ;pnba In+)In-)V+)V-)OUT
R1 N002 N001 10K
V3 N003 0 SINE(1.25 .1 1K)
V1 +V 0 5
R2 N001 0 10K
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -128 160 -128 144
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE -128 256 -128 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage -128 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL opamps\\LT1179A 192 176 R0
SYMATTR InstName U1
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(1.25 .1 1K)
FLAG -128 256 0
FLAG 192 192 +V
FLAG -128 144 +V
FLAG 16 96 0
FLAG 0 368 0
FLAG 192 288 0
TEXT 256 360 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\2fce557217ca_fig-01-03-12.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4077-2.asy)
D1 VOP VOUT 1N4148
R1 VOUT 0 1k
XU1 NC_01 NC_02 NC_03 NC_04 NC_05 NC_06 NC_07 NC_08 ADA4077-2 ;pnba +INA)-INA)OUTA)V+)V-)+INB)-INB)OUTB
V1 VIN 0 SINE(0 1 1k)
VS1 VCC 0 15
VS2 0 VEE 15
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 2m 0 1u
.lib ADA4077-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 400 80 144 80
WIRE 208 112 208 96
WIRE 208 144 208 112
WIRE 144 160 144 80
WIRE 176 160 144 160
WIRE 288 176 240 176
WIRE 304 176 288 176
WIRE 400 176 400 80
WIRE 400 176 368 176
WIRE 432 176 400 176
WIRE 96 192 48 192
WIRE 176 192 96 192
WIRE 48 208 48 192
WIRE 400 208 400 176
WIRE 208 240 208 208
WIRE 208 256 208 240
WIRE 256 288 256 272
WIRE 320 288 320 272
WIRE 400 320 400 288
WIRE 48 336 48 288
WIRE 256 336 256 288
WIRE 320 336 320 288
WIRE 256 432 256 416
WIRE 320 432 320 416
IOPIN 432 176 Out
SYMBOL diode 304 192 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL Opamps\\ADA4077-2 208 112 R0
WINDOW 3 14 122 Left 2
SYMATTR InstName U1
SYMBOL Misc\\battery 320 320 R0
WINDOW 0 12 6 Left 2
WINDOW 3 15 95 Left 2
SYMATTR InstName VS1
SYMATTR Value 15
SYMBOL res 384 192 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL Misc\\battery 256 432 R180
WINDOW 0 24 104 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName VS2
SYMATTR Value 15
SYMBOL voltage 48 192 R0
WINDOW 0 10 99 Left 2
WINDOW 3 -60 179 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1k)
FLAG 48 336 0
FLAG 432 176 VOUT
FLAG 96 192 VIN
FLAG 288 176 VOP
FLAG 256 432 0
FLAG 320 432 0
FLAG 256 288 VEE
FLAG 320 288 VCC
FLAG 208 112 VCC
FLAG 208 240 VEE
FLAG 400 320 0
TEXT -40 64 Left 2 !.tran 0 2m 0 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\ee5634535041_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
* DAQ OUTPUT (STAIRCASE FUNCTION)
* LINEAR RAMP OUTPUT
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
C1 OUT N001 C
R2 N001 IN R
XU2 NC_03 NC_04 NC_05 NC_06 NC_07 LT1001 ;pnba In+)In-)V+)V-)OUT
XU1 0 N001 NC_01 NC_02 OUT LT1001 ;pnba In+)In-)V+)V-)OUT
R1 OUT N001 R
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -32 80 -32
WIRE 304 -32 224 -32
WIRE 80 64 80 -32
WIRE 144 64 80 64
WIRE 304 64 304 -32
WIRE 304 64 208 64
WIRE -64 144 -96 144
WIRE 80 144 80 64
WIRE 80 144 16 144
WIRE 160 144 80 144
WIRE 304 160 304 64
WIRE 304 160 224 160
WIRE 416 160 304 160
WIRE 160 176 128 176
WIRE 128 224 128 176
WIRE 128 224 32 224
WIRE 32 256 32 224
SYMBOL OpAmps\\OP07 -656 16 R0
SYMATTR InstName U2
SYMBOL OpAmps\\OP07 192 96 R0
SYMATTR InstName U1
SYMBOL res 32 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMBOL cap 208 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMBOL res 240 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
FLAG 32 256 0
FLAG -96 144 IN
FLAG 416 160 OUT
TEXT -400 24 Left 2 ;DAQ OUTPUT (STAIRCASE FUNCTION)
TEXT 344 128 Left 2 ;LINEAR RAMP OUTPUT
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7150-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7150-5.0.asy)
C2 N002 0 1
C4 N003 0 1
C3 OUT 0 10
V1 IN 0 6.2
R3 IN N001 100K
R5 OUT 0 18
XU1 N004 OUT N002 0 N003 N003 N001 IN ADM7150-5.0 ;pnba Vreg)Vout)Byp)GND)Ref_Sense)Ref)EN)Vin
C1 N004 0 10 Rser=10m Lser=1n
.tran 5m startup
.lib ADM7150-5.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 856
WIRE -32 32 -160 32
WIRE 80 32 -32 32
WIRE 464 32 400 32
WIRE 560 32 464 32
WIRE -160 48 -160 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE -160 144 -160 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE 0 224 -16 224
WIRE 80 224 64 224
WIRE 416 224 400 224
WIRE 464 224 416 224
WIRE 464 240 464 224
WIRE 0 320 -16 320
WIRE 80 320 64 320
WIRE 416 320 416 224
WIRE 416 320 400 320
WIRE 464 320 464 304
WIRE 240 400 240 384
SYMBOL res 544 32 R0
SYMATTR InstName R5
SYMATTR Value 18
SYMBOL cap 448 48 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 448 240 R0
WINDOW 0 36 14 Left 2
WINDOW 3 36 50 Left 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL ADM7150-5.0 240 176 R0
SYMATTR InstName U1
SYMBOL cap 64 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR Value2 Rser=10m
SYMATTR SpiceLine Lser=1n
SYMBOL voltage -160 32 R0
SYMATTR InstName V1
SYMATTR Value 6.2
FLAG 240 400 0
FLAG 464 320 0
FLAG 464 144 0
FLAG -16 320 0
FLAG -16 224 0
FLAG -160 144 0
FLAG 560 144 0
FLAG -160 32 IN
FLAG 560 32 OUT
TEXT 552 448 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5676R.asc
* Generated by LTspice 26.0.1 for Windows.
RLOAD vOUT 0 1k
CLOAD vOUT 0 10n
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
V1 Vdd 0 5
XU1 vDAC Vdd 0 vOUT AD5676R Gain=2 ;pnba Vdac)Vdd)GND)Vout
.tran 50u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5676R.asy)
.lib AD5676R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 112 112 0 112
WIRE 192 112 112 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -240 -80 Vdd
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL AD5676R -208 112 R0
SYMATTR InstName U1
TEXT -160 312 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\7b56e2991210_sawgen.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R3 5V N003 10k
M1 0 N002 N004 N004 PMOS
R2 N001 N004 3
C2 N003 N002 100pF
R1 12V N001 330k
V3 5V 0 5V
V2 -12V 0 -12
V1 12V 0 12
C1 N001 0 100pF
XU1 N003 N001 12V -12V N002 level2 Avol=10Meg GBW=100Meg Slew=100Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran .01
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1140 680
WIRE 544 -16 496 -16
WIRE 624 -16 544 -16
WIRE 624 32 624 -16
WIRE 0 48 0 32
WIRE 96 48 96 32
WIRE 208 48 208 32
WIRE 864 48 864 32
WIRE 1056 64 1056 48
WIRE 0 80 0 48
WIRE 96 80 96 48
WIRE 208 80 208 48
WIRE 864 80 864 48
WIRE 832 96 704 96
WIRE 848 96 832 96
WIRE 912 112 896 112
WIRE 1056 112 1056 64
WIRE 624 128 624 112
WIRE 704 128 704 96
WIRE 704 128 624 128
WIRE 736 128 704 128
WIRE 832 128 784 128
WIRE 864 160 864 144
WIRE 864 176 864 160
WIRE 736 192 736 128
WIRE 784 192 784 128
WIRE 1056 192 784 192
WIRE 784 224 784 192
WIRE 656 240 352 240
WIRE 864 288 784 288
WIRE 912 288 912 112
WIRE 912 288 864 288
WIRE 592 320 592 304
WIRE 608 320 592 320
WIRE 736 336 736 272
WIRE 736 336 656 336
WIRE 352 400 352 240
WIRE 592 448 592 320
WIRE 864 448 864 288
WIRE 864 448 592 448
SYMBOL pmos 608 240 R0
SYMATTR InstName M1
SYMBOL voltage 96 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL res 608 16 R0
SYMATTR InstName R1
SYMATTR Value 330k
SYMBOL cap 608 128 R0
SYMATTR InstName C1
SYMATTR Value 100pF
SYMBOL voltage 0 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 720 176 R0
SYMATTR InstName R2
SYMATTR Value 3
SYMBOL Opamps\\UniversalOpamp2 864 112 R0
SYMATTR InstName U1
SYMATTR Value2 Avol=10Meg GBW=100Meg Slew=100Meg
SYMBOL res 1040 96 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL cap 768 224 R0
SYMATTR InstName C2
SYMATTR Value 100pF
SYMBOL voltage 208 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 5V
FLAG 0 160 0
FLAG 96 160 0
FLAG 208 160 0
FLAG 0 48 12V
FLAG 96 48 -12V
FLAG 208 48 5V
FLAG 624 192 0
FLAG 544 -16 12V
FLAG 864 48 12V
FLAG 864 160 -12V
FLAG 352 400 0
FLAG 1056 64 5V
TEXT -44 440 Left 2 !.tran .01
* Z:\home\khalils\Downloads\files\data\raw_asc\3cd0e81b719b_rectificador_monofasico_de_onda_completa_1N5408.asc
* Generated by LTspice 26.0.1 for Windows.
D2 N003 N001 1N5408
D4 0 N003 1N5408
D3 0 N002 1N5408
V1 N002 N003 SINE(0 155.56 60 0 0) AC 155 0
D1 N002 N001 1N5408
R1 N001 0 1000R
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 100m 0 0.1m
.model 1N5408 D (IS=1.41E-6 RS=0.0339 N=1.9011 BV=1000 IBV=5E-6 CJO=4.5E-11 M=0.4061 VJ=0.5 FC=0.5 TT=4.761E-6 EG=1.11 XTI=3)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1496 680
WIRE 384 -16 256 -16
WIRE 544 -16 384 -16
WIRE 112 32 -176 32
WIRE 256 64 256 -16
WIRE 384 64 384 -16
WIRE 544 112 544 -16
WIRE -176 144 -176 32
WIRE 112 160 112 32
WIRE 256 160 256 128
WIRE 256 160 112 160
WIRE 384 176 384 128
WIRE 384 176 144 176
WIRE 384 192 384 176
WIRE 256 208 256 160
WIRE -176 224 -176 208
WIRE -176 336 -176 224
WIRE 144 336 144 176
WIRE 144 336 -176 336
WIRE 256 336 256 272
WIRE 384 336 384 256
WIRE 384 336 256 336
WIRE 544 336 544 192
WIRE 544 336 384 336
WIRE 384 400 384 336
SYMBOL diode 400 256 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMATTR Value 1N5408
SYMBOL diode 400 128 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N5408
SYMBOL voltage -176 128 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 155 0
SYMATTR InstName V1
SYMATTR Value SINE(0 155.56 60 0 0)
SYMBOL res 528 96 R0
SYMATTR InstName R1
SYMATTR Value 1000R
SYMBOL diode 272 272 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value 1N5408
SYMBOL diode 272 128 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5408
FLAG 384 400 0
TEXT -176 344 Left 2 !.tran 0 100m 0 0.1m
TEXT -176 368 Left 2 !.model 1N5408 D (IS=1.41E-6 RS=0.0339 N=1.9011 BV=1000 IBV=5E-6 CJO=4.5E-11 M=0.4061 VJ=0.5 FC=0.5 TT=4.761E-6 EG=1.11 XTI=3)
* Z:\home\khalils\Downloads\files\data\raw_asc\44bc52c0737d_BT-CE-TRAN.asc
* Generated by LTspice 26.0.1 for Windows.
Ibb 0 N002 0
Q1 N001 N002 0 0 BC547B
V2 N001 0 {Uce}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Ibb 0 200uA 10uA
.step param Uce list 5V 20V
.meas dc Ib find Ib(Q1) when Ic(Q1)=20mA
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 16 208 16
WIRE 208 80 208 16
WIRE 368 96 368 16
WIRE 144 128 32 128
WIRE 32 144 32 128
WIRE 32 256 32 224
WIRE 208 256 208 176
WIRE 368 256 368 176
SYMBOL voltage 368 80 R0
WINDOW 3 35 85 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 35 57 Left 2
SYMATTR Value {Uce}
SYMATTR InstName V2
SYMBOL current 32 224 R180
WINDOW 0 -63 0 Left 2
WINDOW 3 -66 28 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Ibb
SYMATTR Value 0
SYMBOL npn 144 80 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
FLAG 208 256 0
FLAG 32 256 0
FLAG 368 256 0
TEXT 56 272 Left 2 !.dc Ibb 0 200uA 10uA
TEXT 56 288 Left 2 !.step param Uce list 5V 20V
TEXT 56 304 Left 2 !.meas dc Ib find Ib(Q1) when Ic(Q1)=20mA
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1789-10.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1789-10.asy)
V2 -V 0 -5
V1 +V 0 5
XU1 N001 0 IN -V 0 OUT +V N002 LT1789-10 ;pnba RG1)IN-)IN+)VEE)REF)OUT)VCC)RG2
R1 N001 N002 {R}
V3 IN 0 AC 1
.ac dec 100 100 1Meg
.step PARAM R list 1e308 22.22K 2.0202K
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 788
WIRE -224 448 -224 432
WIRE -256 464 -464 464
WIRE -464 480 -464 464
WIRE -256 496 -352 496
WIRE -704 512 -704 496
WIRE -608 512 -608 496
WIRE 16 544 -80 544
WIRE -464 576 -464 560
WIRE -352 592 -352 576
WIRE -256 592 -352 592
WIRE -704 608 -704 592
WIRE -608 608 -608 592
WIRE -256 624 -288 624
WIRE -144 624 -144 608
WIRE -288 656 -288 624
WIRE -224 656 -224 640
SYMBOL res -368 480 R0
SYMATTR InstName R1
SYMATTR Value {R}
SYMBOL voltage -608 496 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL LT1789-10 -224 544 R0
SYMATTR InstName U1
SYMBOL voltage -464 464 R0
WINDOW 123 26 105 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value ""
SYMBOL voltage -704 496 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -704 608 0
FLAG -608 608 0
FLAG -608 496 -V
FLAG -464 576 0
FLAG -464 464 IN
FLAG -144 624 0
FLAG 16 544 OUT
FLAG -288 656 0
FLAG -224 432 +V
FLAG -704 496 +V
FLAG -224 656 -V
TEXT -160 680 Left 2 !.ac dec 100 100 1Meg\n.step PARAM R list 1e308 22.22K 2.0202K
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2138-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2138-2.5.asy)
L1 N001 OUT 1 Rser=60m
Rload OUT 0 5
C1 OUT 0 10
XU1 IN IN N001 OUT 0 IN ADP2138-x.x Rtop=320K ;pnba Vin)EN)SW)Vout)GND)Mode
V1 IN 0 5
.tran .5m startup
.lib ADP2138-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 192 224 192 144
WIRE 208 224 192 224
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 224
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ADP2138-2.5 352 224 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=60m
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 5
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
TEXT 600 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2120-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2120-2.5.asy)
V1 IN 0 5
C1 OUT 0 20
XU1 IN IN N002 0 0 OUT IN N001 IN IN ADP2120-2.5 ;pnba Vin)Pvin)SW)PGND)GND)FB)TRK)Pgood)Sync/Mode)EN
Rload OUT 0 2.5
R1 OUT N001 100K
L1 N002 OUT 2.2
.tran 1m
.lib ADP2120-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 0 48 0
WIRE 288 0 128 0
WIRE 48 16 48 0
WIRE 288 16 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 640 64 576 64
WIRE 48 112 48 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 640 144 640 64
WIRE 640 144 560 144
WIRE 704 144 640 144
WIRE 560 160 560 144
WIRE 704 160 704 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 560 256 560 224
WIRE 704 256 704 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 640 304 640 144
WIRE 640 304 416 304
WIRE 288 368 288 352
SYMBOL voltage 48 0 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL ADP2120-2.5 288 272 R0
SYMATTR InstName U1
SYMBOL res 688 144 R0
SYMATTR Value 2.5
SYMATTR InstName Rload
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 20
FLAG 560 256 0
FLAG 288 368 0
FLAG 48 112 0
FLAG 704 144 OUT
FLAG 704 256 0
FLAG 48 0 IN
TEXT 504 344 Left 2 !.tran 1m