Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8236.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N004 N003 N002 N001 0 N005 OUT +V AD8236 ;pnba FB)RG2)RG1)In+)V-)REF)OUT)V+
Vcm N004 0 2.5
Vref N005 0 2.5
V1 +V 0 5
Rload OUT 0 10K
Vdiff N001 N004 SINE(0 .1 1K)
Rgain N002 N003 84.5K
.tran 100m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8236.asy)
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 80 -208 80
WIRE 208 80 208 64
WIRE 96 96 -16 96
WIRE 128 96 128 80
WIRE 144 96 128 96
WIRE -352 112 -352 96
WIRE -208 112 -208 80
WIRE -16 112 -16 96
WIRE 96 128 96 96
WIRE 144 128 96 128
WIRE 400 144 272 144
WIRE 144 160 96 160
WIRE 400 160 400 144
WIRE 144 192 128 192
WIRE -352 208 -352 192
WIRE -16 208 -16 192
WIRE 96 208 96 160
WIRE 96 208 -16 208
WIRE -208 224 -208 192
WIRE 128 224 128 192
WIRE 128 224 -208 224
WIRE 176 224 176 208
WIRE 240 224 240 208
WIRE -208 240 -208 224
WIRE 400 256 400 240
WIRE 240 320 240 304
WIRE -208 336 -208 320
FLAG -352 208 0
FLAG -208 336 0
FLAG 240 320 0
FLAG 400 256 0
FLAG 176 224 0
FLAG 400 144 OUT
FLAG 208 64 +V
FLAG -352 96 +V
SYMBOL AD8236 208 144 R0
WINDOW 3 43 34 Left 2
SYMATTR InstName U1
SYMBOL voltage -208 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vcm
SYMATTR Value 2.5
SYMBOL voltage 240 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vref
SYMATTR Value 2.5
SYMBOL voltage -352 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 384 144 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage -208 96 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR Value SINE(0 .1 1K)
SYMATTR InstName Vdiff
SYMBOL res -32 96 R0
SYMATTR InstName Rgain
SYMATTR Value 84.5K
TEXT 360 360 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\65c8916293ad_Draft26.asc
* Generated by LTspice 26.0.1 for Windows.
V2 VCC 0 15
V3 0 VEE 15
D1 VOUT N001 D
D2 N001 VOUT D
R2 N001 N003 10k
R3 VOUT N001 50k
XU2 0 N001 VCC VEE VOUT OP27 ;pnba In+)In-)V+)V-)OUT
V1 CP3V3 0 3.3
V4 0 CN3V3 3.3
XU1 0 N002 VCC VEE N003 OP27 ;pnba In+)In-)V+)V-)OUT
C1 N003 N002 10n
R1 N002 VOUT 10k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
;dc V1 0 10 0.01
.tran 0.1
* Library below included based on ModelFile attribute of instance XU2, XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP27.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 904 680
WIRE 384 -64 384 -112
WIRE 384 -64 368 -64
WIRE 448 -64 448 -112
WIRE 160 -16 128 -16
WIRE 368 0 368 -64
WIRE 448 0 448 -64
WIRE -240 32 -304 32
WIRE -64 32 -144 32
WIRE -144 48 -144 32
WIRE -64 48 -64 32
WIRE 128 64 128 -16
WIRE 160 64 128 64
WIRE 224 80 224 -16
WIRE 288 80 224 80
WIRE 368 80 368 0
WIRE 384 80 368 80
WIRE 160 96 112 96
WIRE 448 96 448 0
WIRE 528 96 448 96
WIRE 608 96 528 96
WIRE 112 112 112 96
WIRE 384 112 368 112
WIRE 368 144 368 112
WIRE 48 192 48 64
WIRE 608 192 608 96
WIRE 608 192 48 192
FLAG 112 112 0
FLAG -64 48 0
FLAG 528 96 VOUT
FLAG -144 -48 VCC
FLAG 416 64 VCC
FLAG -144 128 VEE
FLAG 416 128 VEE
FLAG 368 144 0
FLAG -240 32 0
FLAG -304 -48 CP3V3
FLAG -304 112 CN3V3
FLAG 192 48 VCC
FLAG 192 112 VEE
SYMBOL voltage -144 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 38 43 Left 2
SYMATTR Value 15
SYMATTR InstName V2
SYMBOL voltage -144 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL diode 448 -128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL diode 384 -48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL res 384 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 464 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 50k
SYMBOL OpAmps\\OP27 416 32 R0
SYMATTR InstName U2
SYMBOL voltage -304 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 38 43 Left 2
SYMATTR Value 3.3
SYMATTR InstName V1
SYMBOL voltage -304 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 3.3
SYMBOL OpAmps\\OP27 192 16 R0
SYMATTR InstName U1
SYMBOL cap 224 -32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 144 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
TEXT -72 264 Left 2 !;dc V1 0 10 0.01
TEXT 136 320 Left 2 !.tran 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL42002-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL42002-1.8.asy)
XU1 IN OUT IN N001 OUT 0 ADPL42002-1.8 ;pnba Vin)Sense)EN)SS)Vout)GND
Rload OUT 0 9
C2 N001 0 4.7n
C1 OUT 0 2.2 Rser=1.5m
V1 IN 0 7
.tran 6m startup
.lib ADPL42002-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 9
SYMBOL ADPL42002-1.8 224 128 R0
SYMATTR InstName U1
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 7
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\IGBT.asc
* Generated by LTspice 26.0.1 for Windows.
Z1 N001 N002 0 NIGBT
V2 N002 0 0
V1 N001 0 0
.model NIGBT NIGBT
.dc V1 0 25 1m V2 0 20 5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 144 272 144
WIRE 272 160 272 144
WIRE 416 160 416 144
WIRE 224 240 128 240
WIRE 128 256 128 240
WIRE 272 272 272 256
WIRE 416 272 416 240
WIRE 128 352 128 336
SYMBOL voltage 128 240 R0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL misc\\nigbt 224 160 R0
SYMATTR InstName Z1
SYMATTR Prefix Z
SYMBOL voltage 416 144 R0
SYMATTR InstName V1
SYMATTR Value 0
FLAG 416 272 0
FLAG 272 272 0
FLAG 128 352 0
TEXT 216 336 Left 2 !.model NIGBT NIGBT
TEXT 192 392 Left 2 !.dc V1 0 25 1m V2 0 20 5
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX1853.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX1853.asy)
XU1 IN OUT N001 N002 0 IN MAX1853 ;pnba IN)OUT)C1+)C1-)GND)_SHDN
Rload OUT 0 50
C1 N001 N002 1
C2 OUT 0 10
V1 IN 0 5
.tran 2m startup
.lib MAX1853.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2884 1464
WIRE 2416 1008 2080 1008
WIRE 2576 1008 2416 1008
WIRE 2080 1024 2080 1008
WIRE 2416 1024 2416 1008
WIRE 2272 1088 2208 1088
WIRE 2576 1088 2576 1008
WIRE 2576 1088 2560 1088
WIRE 2080 1120 2080 1104
WIRE 2208 1136 2208 1088
WIRE 2208 1248 2208 1200
WIRE 2272 1248 2208 1248
WIRE 2624 1248 2560 1248
WIRE 2736 1248 2624 1248
WIRE 2624 1264 2624 1248
WIRE 2736 1264 2736 1248
WIRE 2416 1328 2416 1312
WIRE 2624 1360 2624 1328
WIRE 2736 1360 2736 1344
SYMBOL VOLTAGE 2080 1008 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL MAX1853 2416 1168 R0
SYMATTR InstName U1
SYMBOL cap 2608 1264 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL RES 2720 1248 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL cap 2192 1136 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 2416 1328 0
FLAG 2624 1360 0
FLAG 2080 1120 0
FLAG 2736 1360 0
FLAG 2736 1248 OUT
FLAG 2080 1008 IN
TEXT 2352 1376 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX1523.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX1523.asy)
L1 IN N001 33 Rser=180m
R1 OUT N003 866K
XU2 0 N003 IN IN N002 IN MAX1523 ;pnba GND)FB)SET)_SHDN)EXT)Vcc
C2 OUT N003 100p
C3 N003 0 300p
C4 OUT 0 33 Rser=150m
R2 N003 0 100K
D1 N001 OUT MBR0530L
C1 IN 0 0.1
R3 OUT 0 59.7
V1 IN 0 2.7
M1 N001 N002 0 0 FDC637AN
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 5m startup
.lib MAX1523.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 940 680
WIRE -128 -160 -160 -160
WIRE 48 -160 -128 -160
WIRE 208 -160 48 -160
WIRE 400 -160 288 -160
WIRE 464 -160 400 -160
WIRE 656 -160 528 -160
WIRE 768 -160 656 -160
WIRE 848 -160 768 -160
WIRE 880 -160 848 -160
WIRE -160 -128 -160 -160
WIRE 768 -128 768 -160
WIRE 880 -128 880 -160
WIRE 400 -96 400 -160
WIRE 656 -64 656 -160
WIRE 656 -64 560 -64
WIRE 656 -32 656 -64
WIRE 768 -32 768 -64
WIRE 880 -32 880 -48
WIRE -32 -16 -48 -16
WIRE 48 -16 48 -160
WIRE 48 -16 32 -16
WIRE 64 -16 48 -16
WIRE 352 -16 320 -16
WIRE 560 -16 560 -64
WIRE -160 0 -160 -48
WIRE 400 48 400 0
WIRE 48 80 48 -16
WIRE 64 80 48 80
WIRE 560 80 560 48
WIRE 560 80 320 80
WIRE 656 80 656 48
WIRE 656 80 560 80
WIRE 560 112 560 80
WIRE 656 112 656 80
WIRE 48 176 48 80
WIRE 64 176 48 176
WIRE 336 176 320 176
WIRE 560 224 560 176
WIRE 656 224 656 192
SYMBOL res 640 96 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL nmos 352 -96 R0
SYMATTR InstName M1
SYMATTR Value FDC637AN
SYMBOL cap 32 -32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.1
SYMBOL cap 544 112 R0
SYMATTR InstName C3
SYMATTR Value 300p
SYMBOL voltage -160 -144 R0
SYMATTR InstName V1
SYMATTR Value 2.7
SYMBOL ind 192 -144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=180m
SYMBOL cap 544 -16 R0
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL schottky 464 -144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBR0530L
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 640 -48 R0
SYMATTR InstName R1
SYMATTR Value 866K
SYMBOL cap 752 -128 R0
SYMATTR InstName C4
SYMATTR Value 33
SYMATTR SpiceLine Rser=150m
SYMBOL res 864 -144 R0
SYMATTR InstName R3
SYMATTR Value 59.7
SYMBOL MAX1523 192 80 R0
SYMATTR InstName U2
FLAG 400 48 0
FLAG -160 0 0
FLAG -48 -16 0
FLAG 656 224 0
FLAG 560 224 0
FLAG 768 -32 0
FLAG 880 -32 0
FLAG -128 -160 IN
FLAG 848 -160 OUT
FLAG 336 176 0
TEXT 112 280 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL54203.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL54203.asy)
C1 N004 0 1
R1 N002 N003 154K
V1 IN 0 24
K1 L1 L2 1
C2 OUT 0 220
R2 N005 0 10K
D1 N001 OUT B520C
R3 N005 N006 115K
C3 IN N002 470p Rser=39
L1 IN N002 9 Rser=36m
XU1 IN N004 IN 0 N002 N003 N005 N006 ADPL54203 ;pnba EN/UVLO)INTVcc)Vin)GND)SW)RFB)Rref)Tc
L2 0 N001 1 Rser=7m
Rload OUT 0 1.7
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 7m startup
.lib ADPL54203.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 996 680
WIRE 368 -64 -16 -64
WIRE 544 -64 368 -64
WIRE 656 -64 592 -64
WIRE 784 -64 720 -64
WIRE 896 -64 784 -64
WIRE 368 -48 368 -64
WIRE 544 -48 544 -64
WIRE 592 -48 592 -64
WIRE 784 -48 784 -64
WIRE 896 -48 896 -64
WIRE -16 48 -16 -64
WIRE 64 48 -16 48
WIRE 80 48 64 48
WIRE 368 48 368 16
WIRE 368 48 304 48
WIRE 544 48 544 32
WIRE 544 48 368 48
WIRE 592 48 592 32
WIRE 784 48 784 16
WIRE 784 48 592 48
WIRE 896 48 896 32
WIRE 896 48 784 48
WIRE -16 64 -16 48
WIRE 368 64 368 48
WIRE 896 64 896 48
WIRE 64 144 64 48
WIRE 80 144 64 144
WIRE 368 144 304 144
WIRE -16 160 -16 144
WIRE 0 240 -16 240
WIRE 80 240 64 240
WIRE 352 240 304 240
WIRE 416 240 352 240
WIRE 512 240 496 240
WIRE 80 336 64 336
WIRE 352 336 352 320
WIRE 352 336 304 336
SYMBOL ind2 528 -64 R0
WINDOW 0 1 27 Right 2
WINDOW 3 1 80 Right 2
SYMATTR InstName L1
SYMATTR Value 9
SYMATTR Type ind
SYMATTR SpiceLine Rser=36m
SYMBOL cap 352 -48 R0
WINDOW 39 23 64 Left 2
WINDOW 3 41 35 Left 2
SYMATTR SpiceLine Rser=39
SYMATTR Value 470p
SYMATTR InstName C3
SYMBOL res 400 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL ind2 608 48 R180
WINDOW 0 1 84 Right 2
WINDOW 3 4 34 Right 2
SYMATTR InstName L2
SYMATTR Value 1
SYMATTR Type ind
SYMATTR SpiceLine Rser=7m
SYMBOL res 352 48 R0
SYMATTR InstName R1
SYMATTR Value 154K
SYMBOL cap 64 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL schottky 656 -48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value B520C
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 768 -48 R0
SYMATTR InstName C2
SYMATTR Value 220
SYMBOL voltage -16 48 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL ADPL54203 192 192 R0
SYMATTR InstName U1
SYMBOL res 336 224 R0
SYMATTR InstName R3
SYMATTR Value 115K
SYMBOL res 880 -64 R0
SYMATTR InstName Rload
SYMATTR Value 1.7
FLAG 64 336 0
FLAG -16 160 0
FLAG -16 240 0
FLAG 512 240 0
FLAG 896 64 0
FLAG -16 -64 IN
FLAG 896 -64 OUT
TEXT 504 -88 Left 2 !K1 L1 L2 1
TEXT 640 304 Left 2 !.tran 7m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\a0e8c7a92a59_XtalTest_1Mhz_Osc.asc
* Generated by LTspice 26.0.1 for Windows.
* 1MHz Crystal Oscillator
* Unbuffered Gate
* NOTE: for ac loop gain is V(4)/V(1)
C2 2 0 100p
R2 4 3 3.3Meg
C3 3 0 10p
Di 0 i Clamp
I2 2 3 PULSE(0 23 100n 10n 10n 10n 1u 1)
V1 4 1 AC 1
CX1 3 2 .0127pF Lser=2H Rser=200 Cpar=4pF
R1 2 1 3k3
Bo 0 4 I=limit(30*(2.5-V(i)),0,5) Rpar=1 tripdt=1n
Ri i 3 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 10m 100u 10n
.model Clamp D(Vfwd=.5 Vrev=5.5)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1656 1100
WIRE 528 304 576 304
WIRE 320 304 384 304
WIRE 608 304 608 336
WIRE 608 400 608 416
WIRE 384 336 384 304
WIRE 384 304 416 304
WIRE 208 304 240 304
WIRE 576 304 608 304
WIRE 176 304 208 304
WIRE 928 416 928 400
WIRE 800 304 832 304
WIRE 848 304 848 336
WIRE 848 400 848 416
WIRE 928 208 928 320
WIRE 832 304 848 304
WIRE 384 208 384 304
WIRE 544 208 608 208
WIRE 608 208 608 304
WIRE 416 304 464 304
WIRE 464 208 384 208
WIRE 672 208 672 304
WIRE 672 304 720 304
WIRE 928 208 848 208
WIRE 768 208 672 208
WIRE 176 304 176 240
WIRE 176 96 208 96
WIRE 928 96 928 208
WIRE 384 416 384 400
WIRE 608 304 672 304
WIRE 176 160 176 96
WIRE 208 96 928 96
SYMBOL bi 928 400 M180
WINDOW 0 39 48 Left 0
WINDOW 3 40 24 Left 0
WINDOW 123 40 0 Left 0
SYMATTR InstName Bo
SYMATTR Value I=limit(30*(2.5-V(i)),0,5)
SYMATTR Value2 Rpar=1 tripdt=1n
SYMBOL voltage 176 144 R0
WINDOW 0 40 48 Left 0
WINDOW 3 40 71 Left 0
WINDOW 123 40 72 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL Misc\\xtal 528 288 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
WINDOW 39 80 32 VTop 0
WINDOW 123 56 32 VTop 0
WINDOW 40 104 32 VTop 0
SYMATTR InstName X1
SYMATTR Value .0127pF
SYMATTR SpiceLine Rser=200
SYMATTR Value2 Lser=2H
SYMATTR SpiceLine2 Cpar=4pF
SYMBOL cap 592 336 R0
WINDOW 0 32 16 Left 0
WINDOW 3 32 48 Left 0
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL current 464 208 M90
WINDOW 0 -32 32 VBottom 0
WINDOW 3 -56 32 VBottom 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I2
SYMATTR Value PULSE(0 23 100n 10n 10n 10n 1u 1)
SYMBOL zener 864 400 R180
WINDOW 0 40 48 Left 0
WINDOW 3 40 16 Left 0
SYMATTR InstName Di
SYMATTR Value Clamp
SYMBOL res 336 288 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 3k3
SYMBOL cap 400 336 M0
WINDOW 0 32 16 Left 0
WINDOW 3 32 48 Left 0
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL res 864 192 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 3.3Meg
SYMBOL res 816 288 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName Ri
SYMATTR Value 100
FLAG 384 416 0
FLAG 608 416 0
FLAG 208 304 1
FLAG 416 304 2
FLAG 576 304 3
FLAG 928 416 0
FLAG 848 416 0
FLAG 832 304 i
FLAG 208 96 4
TEXT 128 464 Left 0 !.tran 0 10m 100u 10n
TEXT 128 496 Left 0 !.ac lin 1000 990k 1010k
TEXT 848 464 Center 0 !.model Clamp D(Vfwd=.5 Vrev=5.5)
TEXT 560 16 Center 0 ;1MHz Crystal Oscillator
TEXT 976 288 Left 0 ;Unbuffered Gate
TEXT 560 64 Center 0 ;NOTE: for ac loop gain is V(4)/V(1)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1101A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1101A.asy)
V3 IN 0 SINE(0 .1 1K)
V2 -V 0 -15
XU1 0 N001 IN -V +V 0 N002 OUT LT1101 ;pnba GND)Tap1)In-)V-)V+)In+)Tap2)Out
V1 +V 0 15
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 80 64 64 64
WIRE 352 64 336 64
WIRE 80 128 64 128
WIRE 352 128 336 128
WIRE -416 160 -416 144
WIRE -288 160 -288 144
WIRE 80 192 -128 192
WIRE 352 192 336 192
WIRE -128 208 -128 192
WIRE -416 256 -416 240
WIRE -288 256 -288 240
WIRE 80 256 64 256
WIRE 352 256 336 256
WIRE -128 304 -128 288
SYMBOL voltage -416 144 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT1101A 208 160 R0
SYMATTR InstName U1
SYMBOL voltage -128 192 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 .1 1K)
FLAG -288 256 0
FLAG -288 144 +V
FLAG 64 256 -V
FLAG -416 256 0
FLAG -416 144 -V
FLAG -128 304 0
FLAG 352 256 +V
FLAG 64 64 0
FLAG 352 192 0
FLAG 352 64 OUT
FLAG -128 192 IN
TEXT 312 352 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\095fb84c3a44_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 0 5n
R1 N001 N002 10k
C3 N004 0 5n
V1 N001 0 PULSE(0 5 0 10n 10n 15u 33u 0)
R2 N002 N003 10k
C2 N003 0 5n
R3 N003 N004 10k
.tran 0 5ms 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 48 0 48
WIRE 208 48 160 48
WIRE 304 48 288 48
WIRE 384 48 304 48
WIRE 480 48 464 48
WIRE 560 48 480 48
WIRE 160 96 160 48
WIRE 304 96 304 48
WIRE 480 96 480 48
WIRE 0 160 0 128
WIRE 160 160 0 160
WIRE 304 160 160 160
WIRE 480 160 304 160
WIRE 0 176 0 160
WIRE 0 176 -32 176
WIRE -32 208 -32 176
SYMBOL res 192 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 64 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL cap 144 96 R0
WINDOW 0 47 31 Left 2
SYMATTR InstName C1
SYMATTR Value 5n
SYMBOL res 368 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL voltage 0 32 R0
WINDOW 0 -73 51 Left 2
WINDOW 3 4 116 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 10n 10n 15u 33u 0)
SYMBOL cap 464 96 R0
SYMATTR InstName C3
SYMATTR Value 5n
SYMBOL cap 288 96 R0
SYMATTR InstName C2
SYMATTR Value 5n
FLAG -32 208 0
TEXT -52 232 Left 2 !.tran 0 5ms 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL42002-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N001 0 4.7n
V1 IN 0 7
Rload OUT 0 9
C1 OUT 0 2.2 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADPL42002-1.8 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 6m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL42002-1.8.asy)
.lib ADPL42002-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 7
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 9
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADPL42002-1.8 224 128 R0
SYMATTR InstName U1
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1085-12.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1085-12.asy)
XU1 0 OUT IN LT1085-12 ;pnba GND)OUT)IN
C1 OUT 0 10
V1 IN 0 PWL(0 0 1 20) Rser=0.1
Rload OUT 0 10
.tran 1
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1344 896
WIRE 1952 896 1808 896
WIRE 2064 896 1952 896
WIRE 1344 912 1344 896
WIRE 1952 912 1952 896
WIRE 2064 912 2064 896
WIRE 1344 1008 1344 992
WIRE 1952 1008 1952 976
WIRE 2064 1008 2064 992
WIRE 1680 1024 1680 992
SYMBOL PowerProducts\\LT1085-12 1680 896 R0
SYMATTR InstName U1
SYMBOL cap 1936 912 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL RES 2048 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL VOLTAGE 1344 896 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 20)
SYMATTR SpiceLine Rser=0.1
FLAG 2064 896 OUT
FLAG 2064 1008 0
FLAG 1344 1008 0
FLAG 1952 1008 0
FLAG 1344 896 IN
FLAG 1680 1024 0
TEXT 1968 1088 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG849.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nCharge Injection not included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG849.asy)
V3 N004 0 PULSE(0 5 25u 20n 20n 25u)
V2 N003 0 5
V4 +V 0 5
XU1 N004 N001 N002 N003 +V 0 ADG849 ;pnba IN)SA)D)SB)Vdd)GND
V1 N001 0 0
R1 N002 0 49.9
C1 N002 0 36p
.tran 75u
.lib ADG849.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1696 -272 -2032 -272
WIRE -2032 -256 -2032 -272
WIRE -1424 -240 -1504 -240
WIRE -1312 -240 -1424 -240
WIRE -1424 -224 -1424 -240
WIRE -1312 -224 -1312 -240
WIRE -1696 -208 -1920 -208
WIRE -1920 -192 -1920 -208
WIRE -2032 -160 -2032 -176
WIRE -1696 -144 -1776 -144
WIRE -1424 -128 -1424 -144
WIRE -1312 -128 -1312 -160
WIRE -1920 -96 -1920 -112
WIRE -1776 -80 -1776 -144
WIRE -1600 -16 -1600 -32
WIRE -1776 32 -1776 0
SYMBOL cap -1328 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -2032 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL voltage -1920 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL ADG849 -1600 -192 R0
SYMATTR InstName U1
SYMBOL voltage -2032 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL voltage -1776 -96 R0
WINDOW 3 24 136 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 25u 20n 20n 25u)
SYMATTR InstName V3
SYMBOL res -1440 -240 R0
SYMATTR InstName R1
SYMATTR Value 49.9
FLAG -2032 -160 0
FLAG -1920 -96 0
FLAG -1776 32 0
FLAG -1600 -368 +V
FLAG -1424 -128 0
FLAG -1600 -16 0
FLAG -1312 -128 0
FLAG -2032 32 0
FLAG -2032 -48 +V
TEXT -1968 0 Left 2 !.tran 75u
TEXT -2088 -456 Left 2 ;Note:\nCharge Injection not included\nSwitch shown for a logic 0 input