* Z:\home\khalils\Downloads\files\data\raw_asc\LT7171.asc
* Generated by LTspice 26.0.1 for Windows.
* Please read the following notes carefully since all the LT7171 features and programmability choices are not modelled\n \n(1) PMBus communication and memory address related functions and pins are not modeled, \nincluding SDA, SCL, WP. The pins shown in the symbol is only for representation \n(2) Changes to parameter values while the simulation is running will not take effect unless the\nsimulation is stopped and restarted. This is different from the way the part operates which will\nrespond to the changes while running. \n(3) Resistor Configuration pins are not modelled (VOUT_CFG,ASEL, PWM_CFG). The pins shown in the symbol is only for representation \n(4) Only default fault responses are modelled. The part offers diffeent fault responses choices\n(5) Initialization time is not modelled.\n \nThe following parameters can be defined by right-clicking on the LT7171 symbol.\nThe nomenclature used here may differ from the one in the data sheet. If any value of these parameters is\nset beyond the scope described in the data sheet, the resulting simulation will not be meaningful.:\n \nFrequency_switch -- in Hz, sets switching frequency\n \nVout_range -- sets maximum output range, 0 for 1.375V, 1 for 2.75V, 2 for 5.5V\n \nVout_command -- in volt, sets output voltage\n \nTon_delay & Ton_rise -- in sec, set ON delay and soft-start time\nToff_delay & Toff_fall -- in sec, set OFF delay and soft-off time \n \nIlim_range -- sets current limit options:\n 0 positive valley current limit of 9A per phase, negative valley current limit of -6A\n 1 positive valley current limit of 13A per phase, negative valley current limit of -7.6A\n 2 positive valley current limit of 15.6A per phase, negative valley current limit of -9.4A\n 3 positive valley current limit of 21.4A per phase, negative valley current limit of -12A \n \n \n \nGMEA_control--Sets Error Amp parameters, N=0 to 31\n GmEA = 0.15mS*(n+1)/(2^VOUT_RANGE) (relative to VSENSE inputs)\n \n \nRITH--in ohm, programmable internal compensation\n \nCITH--in Farad, programmable internal compensation\n \n \nMFR_PWM_PHASE-- in degree, sets the SW0 phase delay in 15-degree increments with respect to the SYNC frequency if present.\n \n \n \nVout_UV_Fault_Limit and Vout_OV_Fault_Limit --- in volt, set the undervoltage and overvoltage fault limit.\nVout_UV_Warn_Limit and Vout_OV_Warn_Limit-- in volt, set the undervoltage and overvoltage warning limit.\n \n \nMFR_DISCHARGE_THRESHOLD--Output voltage threshold to determine that the output has decayed sufficiently to enable the channel\n \nMFR_RETRY_DELAY -- sets the time in milliseconds to retry the LT7171_verify_2025JAN09 after shuts down due to a fault\n \nEN_SYNC_OUT ---1 Output SYNC Pulses, 0 SYNC works as input.\n \nTON_MAX_FAULT_LIMIT-- Determines how long the LT7171 can attempt to soft-start the output without reaching the output undervoltage fault limit.\n \nTo simulate Polyphase load-sharing operation \n \nTie RUN, VIN, SHARE_CLK, _FAULT, _ALERT, PGOOD, ITH pins of all the parts together\nset EN_SYNC_OUT = 1 for only one part and set EN_SYNC_OUT = 0 for all other parts\nThe parameters set in both the part should be identical other than EN_SYNC_OUT
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT7171.asy)
I1 VSENSP 0 PULSE(0 20 0.8m 100n 100n 300u)
C1 0 VDD182 4.7
R6 EXTVCC PGOOD 100k
C4 VSENSP 0 100 x2 Rser=2.5m
C3 BOOST01 SW1 0.1
R5 EXTVCC _ALERT 100k
C14 0 INTVCC 10
C16 ITH 0 66p
C7 0 DRVCC2 10
V5 EXTVCC 0 5
L1 SW1 VSENSP 330n Rser=2.5m
C15 ITH P001 2200p
R2 P001 0 3.3k
R1 SHARE_CLK EXTVCC 11.4k
V1 IN 0 12
C13 BOOST02 SW2 0.1
R8 VSENSP 0 0.1
XU1 IN SW1 0 SW1 BOOST01 BOOST11 DRVCC1 INTVCC EXTVCC VDD181 _ALERT 0 VSENSP 0 RUN PGOOD ITH SYNC 0 0 _FAULT SHARE_CLK NC_01 0 LT7171 FREQUENCY_SWITCH=1000k VOUT_RANGE=0 VOUT_COMMAND=1 VIN_ON= 1.4 VIN_OFF=1.35 TON_DELAY=.01m TON_RISE=.5m TOFF_DELAY=.2m TOFF_FALL=.3m ILIM_RANGE=3 EN_SYNC_OUT=1 GMEA_CONTROL=10 RITH=7k CITH=320p MFR_PWM_PHASE=0 VOUT_UV_FAULT_LIMIT=0.6 VOUT_OV_FAULT_LIMIT=1.5 VOUT_UV_WARN_LIMIT=0.7 VOUT_OV_WARN_LIMIT=1.2 MFR_DISCHARGE_THRESHOLD=0.2 MFR_RETRY_DELAY=10m TON_MAX_FAULT_LIMIT=5m ;pnba PVIN)SW0)SGND)SW1)BOOST0)BOOST1)DRVCC)INTVCC)EXTVCC)VDD18)_ALERT)PGND)VSENSEP)VSENSEN)RUN)PGOOD)ITH)SYNC)PWM_CFG)VOUT_CFG)_FAULT)SHARE_CLK)ASEL)WP
C8 0 INTVCC 10
C6 VSENSP 0 100 x2 Rser=2.5m
C10 VSENSP 0 100 x2 Rser=2.5m
XU2 IN SW2 0 SW2 BOOST02 BOOST12 DRVCC2 INTVCC EXTVCC VDD182 _ALERT 0 VSENSP 0 RUN PGOOD ITH SYNC 0 0 _FAULT SHARE_CLK NC_02 0 LT7171 FREQUENCY_SWITCH=1000k VOUT_RANGE=0 VOUT_COMMAND=1 VIN_ON= 1.4 VIN_OFF=1.35 TON_DELAY=.01m TON_RISE=.5m TOFF_DELAY=.2m TOFF_FALL=.3m ILIM_RANGE=3 EN_SYNC_OUT=1 GMEA_CONTROL=10 RITH=7k CITH=320p MFR_PWM_PHASE=180 VOUT_UV_FAULT_LIMIT=0.6 VOUT_OV_FAULT_LIMIT=1.5 VOUT_UV_WARN_LIMIT=0.7 VOUT_OV_WARN_LIMIT=1.2 MFR_DISCHARGE_THRESHOLD=0.2 MFR_RETRY_DELAY=10m TON_MAX_FAULT_LIMIT=5m ;pnba PVIN)SW0)SGND)SW1)BOOST0)BOOST1)DRVCC)INTVCC)EXTVCC)VDD18)_ALERT)PGND)VSENSEP)VSENSEN)RUN)PGOOD)ITH)SYNC)PWM_CFG)VOUT_CFG)_FAULT)SHARE_CLK)ASEL)WP
R7 EXTVCC _FAULT 6.8k
C9 0 DRVCC1 10
L2 SW2 VSENSP 330n Rser=2.5m
V2 RUN 0 PWL(500u 5 500.001u 5 2500u 5 2500.001u 0)
C2 SW1 BOOST11 0.1
C12 SW2 BOOST12 0.1
C5 0 VDD181 4.7
.tran 2m startup
.lib LT7171.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4588 1188
WIRE -416 -1392 -496 -1392
WIRE 32 -1392 -416 -1392
WIRE 512 -1392 448 -1392
WIRE 512 -1376 512 -1392
WIRE -496 -1344 -496 -1392
WIRE -16 -1296 -320 -1296
WIRE 32 -1296 -16 -1296
WIRE 512 -1296 512 -1312
WIRE 512 -1296 448 -1296
WIRE -496 -1248 -496 -1264
WIRE -320 -1248 -320 -1296
WIRE 512 -1248 512 -1296
WIRE 592 -1248 512 -1248
WIRE 752 -1248 672 -1248
WIRE 848 -1248 752 -1248
WIRE 912 -1248 848 -1248
WIRE 1040 -1248 912 -1248
WIRE 752 -1232 752 -1248
WIRE 848 -1232 848 -1248
WIRE -208 -1200 -256 -1200
WIRE -48 -1200 -128 -1200
WIRE 32 -1200 -48 -1200
WIRE 512 -1200 512 -1248
WIRE 512 -1200 448 -1200
WIRE 512 -1184 512 -1200
WIRE -320 -1136 -320 -1168
WIRE 752 -1136 752 -1168
WIRE 848 -1136 848 -1168
WIRE 512 -1104 512 -1120
WIRE 512 -1104 448 -1104
WIRE 32 -1008 -32 -1008
WIRE 896 -1008 448 -1008
WIRE 1040 -1008 1040 -1248
WIRE 1040 -1008 896 -1008
WIRE 1296 -1008 1040 -1008
WIRE 1296 -992 1296 -1008
WIRE -352 -912 -384 -912
WIRE -256 -912 -256 -1200
WIRE -256 -912 -272 -912
WIRE -32 -912 -256 -912
WIRE 32 -912 -32 -912
WIRE 896 -912 448 -912
WIRE 1040 -912 1040 -928
WIRE 1040 -912 896 -912
WIRE 1296 -912 1040 -912
WIRE 1040 -896 1040 -912
WIRE -16 -816 -32 -816
WIRE 32 -816 -16 -816
WIRE 528 -816 448 -816
WIRE 608 -816 528 -816
WIRE 784 -816 688 -816
WIRE 32 -720 -16 -720
WIRE 528 -720 448 -720
WIRE 608 -720 528 -720
WIRE 784 -720 784 -816
WIRE 784 -720 688 -720
WIRE -16 -672 -16 -720
WIRE -16 -672 -64 -672
WIRE -16 -624 -16 -672
WIRE 32 -624 -16 -624
WIRE 528 -624 448 -624
WIRE 608 -624 528 -624
WIRE 784 -624 784 -720
WIRE 784 -624 688 -624
WIRE -224 -528 -240 -528
WIRE -112 -528 -160 -528
WIRE 32 -528 -112 -528
WIRE 528 -528 448 -528
WIRE 640 -528 528 -528
WIRE 720 -528 704 -528
WIRE -48 -432 -112 -432
WIRE 32 -432 -48 -432
WIRE 528 -432 448 -432
WIRE 640 -432 528 -432
WIRE 720 -432 704 -432
WIRE 160 -336 160 -352
WIRE 320 -336 320 -352
WIRE -112 -272 -112 -288
WIRE -16 -160 -64 -160
WIRE 32 -160 -16 -160
WIRE 512 -160 448 -160
WIRE 512 -144 512 -160
WIRE -32 -64 -64 -64
WIRE 32 -64 -32 -64
WIRE 512 -64 512 -80
WIRE 512 -64 448 -64
WIRE 512 -16 512 -64
WIRE 640 -16 512 -16
WIRE 848 -16 720 -16
WIRE 912 -16 848 -16
WIRE 848 0 848 -16
WIRE -48 32 -64 32
WIRE 32 32 -48 32
WIRE 512 32 512 -16
WIRE 512 32 448 32
WIRE 512 48 512 32
WIRE 848 96 848 64
WIRE 512 128 512 112
WIRE 512 128 448 128
WIRE 32 224 -48 224
WIRE 512 224 448 224
WIRE 560 224 512 224
WIRE -32 320 -48 320
WIRE 32 320 -32 320
WIRE 512 320 448 320
WIRE 560 320 512 320
WIRE -32 416 -48 416
WIRE 32 416 -32 416
WIRE 512 416 448 416
WIRE 544 416 512 416
WIRE 32 512 -16 512
WIRE 512 512 448 512
WIRE 560 512 512 512
WIRE -16 560 -16 512
WIRE -16 560 -64 560
WIRE -16 608 -16 560
WIRE 32 608 -16 608
WIRE 512 608 448 608
WIRE 560 608 512 608
WIRE -224 704 -240 704
WIRE -112 704 -160 704
WIRE 32 704 -112 704
WIRE 512 704 448 704
WIRE 608 704 512 704
WIRE 688 704 672 704
WIRE -16 800 -48 800
WIRE 32 800 -16 800
WIRE 496 800 448 800
WIRE 608 800 496 800
WIRE 688 800 672 800
WIRE -48 880 -48 864
WIRE 160 896 160 880
WIRE 320 896 320 880
SYMBOL res 704 -736 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 100k
SYMBOL cap 496 -1184 R0
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL cap 496 48 R0
SYMATTR InstName C12
SYMATTR Value 0.1
SYMBOL res 1024 -1024 R0
SYMATTR InstName R8
SYMATTR Value 0.1
SYMBOL cap -224 -544 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C14
SYMATTR Value 10
SYMBOL cap -224 688 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C8
SYMATTR Value 10
SYMBOL cap -64 800 R0
WINDOW 0 -60 35 Left 2
SYMATTR InstName C16
SYMATTR Value 66p
SYMBOL res -128 -384 R0
SYMATTR InstName R2
SYMATTR Value 3.3k
SYMBOL voltage -256 -912 M270
WINDOW 123 -74 56 VBottom 2
WINDOW 39 -53 56 VBottom 2
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V5
SYMATTR Value 5
SYMBOL res 704 -832 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 6.8k
SYMBOL LT7171 240 128 R0
SYMATTR InstName U2
SYMATTR SpiceLine FREQUENCY_SWITCH=1000k VOUT_RANGE=0 VOUT_COMMAND=1 VIN_ON= 1.4 VIN_OFF=1.35 TON_DELAY=.01m TON_RISE=.5m TOFF_DELAY=.2m TOFF_FALL=.3m ILIM_RANGE=3
SYMATTR SpiceLine2 EN_SYNC_OUT=1 GMEA_CONTROL=10 RITH=7k CITH=320p MFR_PWM_PHASE=180 VOUT_UV_FAULT_LIMIT=0.6 VOUT_OV_FAULT_LIMIT=1.5 VOUT_UV_WARN_LIMIT=0.7 VOUT_OV_WARN_LIMIT=1.2 MFR_DISCHARGE_THRESHOLD=0.2 MFR_RETRY_DELAY=10m TON_MAX_FAULT_LIMIT=5m
SYMBOL res 704 -640 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 100k
SYMBOL ind 576 -1232 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 330n
SYMATTR SpiceLine Rser=2.5m
SYMBOL cap -128 -432 R0
WINDOW 0 -60 38 Left 2
SYMATTR InstName C15
SYMATTR Value 2200p
SYMBOL cap 672 720 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C7
SYMATTR Value 10
SYMBOL res -112 -1216 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 11.4k
SYMBOL voltage -320 -1264 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(500u 5 500.001u 5 2500u 5 2500.001u 0)
SYMBOL LT7171 240 -1104 R0
SYMATTR InstName U1
SYMATTR SpiceLine FREQUENCY_SWITCH=1000k VOUT_RANGE=0 VOUT_COMMAND=1 VIN_ON= 1.4 VIN_OFF=1.35 TON_DELAY=.01m TON_RISE=.5m TOFF_DELAY=.2m TOFF_FALL=.3m ILIM_RANGE=3
SYMATTR SpiceLine2 EN_SYNC_OUT=1 GMEA_CONTROL=10 RITH=7k CITH=320p MFR_PWM_PHASE=0 VOUT_UV_FAULT_LIMIT=0.6 VOUT_OV_FAULT_LIMIT=1.5 VOUT_UV_WARN_LIMIT=0.7 VOUT_OV_WARN_LIMIT=1.2 MFR_DISCHARGE_THRESHOLD=0.2 MFR_RETRY_DELAY=10m TON_MAX_FAULT_LIMIT=5m
SYMBOL cap 496 -144 R0
SYMATTR InstName C13
SYMATTR Value 0.1
SYMBOL voltage -496 -1360 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 704 -416 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C5
SYMATTR Value 4.7
SYMBOL cap 672 816 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL cap 496 -1376 R0
SYMATTR InstName C3
SYMATTR Value 0.1
SYMBOL cap 832 -1232 R0
WINDOW 123 24 77 Left 2
SYMATTR Value2 x2
SYMATTR InstName C4
SYMATTR Value 100
SYMATTR SpiceLine Rser=2.5m
SYMBOL current 1296 -992 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -208 114 Left 2
SYMATTR Value PULSE(0 20 0.8m 100n 100n 300u)
SYMATTR InstName I1
SYMBOL cap 736 -1232 R0
WINDOW 123 24 77 Left 2
SYMATTR Value2 x2
SYMATTR InstName C10
SYMATTR Value 100
SYMATTR SpiceLine Rser=2.5m
SYMBOL cap 704 -512 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C9
SYMATTR Value 10
SYMBOL ind 624 0 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 330n
SYMATTR SpiceLine Rser=2.5m
SYMBOL cap 832 0 R0
WINDOW 123 24 77 Left 2
SYMATTR Value2 x2
SYMATTR InstName C6
SYMATTR Value 100
SYMATTR SpiceLine Rser=2.5m
FLAG 320 -336 0
FLAG 160 -336 0
FLAG -416 -1392 IN
FLAG -496 -1248 0
FLAG -16 -1296 RUN
FLAG 720 -432 0
FLAG 528 -432 VDD181
FLAG -320 -1136 0
FLAG 784 -720 EXTVCC
FLAG 528 -624 _ALERT
FLAG 528 -720 PGOOD
FLAG 720 -528 0
FLAG 528 -528 DRVCC1
FLAG 528 -816 _FAULT
FLAG 848 -1136 0
FLAG 912 -1248 OUT
FLAG 512 -160 BOOST02
FLAG 1040 -896 0
FLAG -112 -528 INTVCC
FLAG -240 -528 0
FLAG -32 -912 EXTVCC
FLAG -384 -912 0
FLAG -32 -1008 0
FLAG -64 -672 0
FLAG 512 128 BOOST12
FLAG 512 -16 SW2
FLAG 320 896 0
FLAG 160 896 0
FLAG 688 800 0
FLAG 496 800 VDD182
FLAG -48 -1200 SHARE_CLK
FLAG 512 608 _ALERT
FLAG 512 512 PGOOD
FLAG 512 416 _FAULT
FLAG 512 -1392 BOOST01
FLAG 512 -1104 BOOST11
FLAG 512 -1248 SW1
FLAG 848 96 0
FLAG 912 -16 OUT
FLAG 896 -1008 VSENSP
FLAG 896 -912 VSENSN
FLAG 512 224 VSENSP
FLAG 512 320 VSENSN
FLAG 688 704 0
FLAG 512 704 DRVCC2
FLAG -32 -64 RUN
FLAG -48 32 SHARE_CLK
FLAG -48 224 0
FLAG -32 320 EXTVCC
FLAG -16 -160 IN
FLAG -32 416 SYNC
FLAG -16 -816 SYNC
FLAG -64 560 0
FLAG -112 704 INTVCC
FLAG -240 704 0
FLAG -112 -272 0
FLAG -48 -432 ITH
FLAG -16 800 ITH
FLAG -48 880 0
FLAG 752 -1136 0
TEXT 848 576 Left 2 !.tran 2m startup
TEXT 1552 -1472 Left 2 ;Please read the following notes carefully since all the LT7171 features and programmability choices are not modelled\n \n(1) PMBus communication and memory address related functions and pins are not modeled, \nincluding SDA, SCL, WP. The pins shown in the symbol is only for representation \n(2) Changes to parameter values while the simulation is running will not take effect unless the\nsimulation is stopped and restarted. This is different from the way the part operates which will\nrespond to the changes while running.  \n(3) Resistor Configuration pins are not modelled (VOUT_CFG,ASEL, PWM_CFG). The pins shown in the symbol is only for representation \n(4) Only default fault responses are modelled. The part offers diffeent fault responses choices\n(5) Initialization time is not modelled.\n \nThe following parameters can be defined by right-clicking on the LT7171 symbol.\nThe nomenclature used here may differ from the one in the data sheet. If any value of these parameters is\nset beyond the scope described in the data sheet, the resulting simulation will not be meaningful.:\n \nFrequency_switch -- in Hz, sets switching frequency\n \nVout_range -- sets maximum output range, 0 for 1.375V, 1 for 2.75V, 2 for 5.5V\n \nVout_command -- in volt, sets output voltage\n \nTon_delay & Ton_rise -- in sec, set ON delay and soft-start time\nToff_delay & Toff_fall -- in sec, set OFF delay and soft-off time \n \nIlim_range -- sets current limit options:\n   0 positive valley current limit of 9A per phase, negative valley current limit of -6A\n   1 positive valley current limit of 13A per phase, negative valley current limit of -7.6A\n   2 positive valley current limit of 15.6A per phase, negative valley current limit of -9.4A\n   3 positive valley current limit of 21.4A per phase, negative valley current limit of -12A         \n \n \n     \nGMEA_control--Sets Error Amp parameters, N=0 to 31\n     GmEA = 0.15mS*(n+1)/(2^VOUT_RANGE)   (relative to VSENSE inputs)\n     \n \nRITH--in ohm, programmable internal compensation\n \nCITH--in Farad, programmable internal compensation\n \n \nMFR_PWM_PHASE-- in degree, sets the SW0 phase delay in 15-degree increments with respect to the SYNC frequency if present.\n \n \n \nVout_UV_Fault_Limit and Vout_OV_Fault_Limit --- in volt, set the undervoltage and overvoltage fault limit.\nVout_UV_Warn_Limit and Vout_OV_Warn_Limit-- in volt, set the undervoltage and overvoltage warning limit.\n \n \nMFR_DISCHARGE_THRESHOLD--Output voltage threshold to determine that the output has decayed sufficiently to enable the channel\n \nMFR_RETRY_DELAY -- sets the time in milliseconds to retry the LT7171_verify_2025JAN09 after shuts down due to a fault\n \nEN_SYNC_OUT ---1 Output SYNC Pulses, 0 SYNC works as input.\n \nTON_MAX_FAULT_LIMIT--  Determines how long the LT7171 can attempt to soft-start the output without reaching the output undervoltage fault limit.\n \nTo simulate Polyphase load-sharing operation \n \nTie RUN, VIN, SHARE_CLK, _FAULT, _ALERT, PGOOD, ITH pins of all the parts together\nset EN_SYNC_OUT = 1 for only one part and set EN_SYNC_OUT = 0 for all other parts\nThe parameters set in both the part should be identical other than EN_SYNC_OUT