Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4636.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4636.asy)
R4 N003 N006 15K
R3 OUT 0 25m
C3 OUT 0 100 x4 Rser=1m
C4 N006 0 .1
R2 N008 0 7.5K
C1 N007 0 100p
C2 OUT 0 470 x3 Rser=5m
R1 N002 0 34.8K
XU1 IN N004 0 N008 N007 N001 N001 N004 N006 0 OUT N005 N005 NC_01 N003 IN NC_02 NC_03 OUT NC_04 0 0 N002 NC_05 LTM4636 ;pnba Vin)COMPA)VoutS1-)VFB)TK/SS)HiZReg)IntVcc)COMPB)RunC)SGND)VOUT)SNSP2)SNSP1)PGood)PVCC)RunP)SW)PWM2)VoutS1+)Clkout)PGND)Mode/PLLIN)Freq)PhaseMD
V1 IN 0 12
.tran 1.2m startup
.lib LTM4636.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1268 728
WIRE 64 -208 -272 -208
WIRE 192 -208 64 -208
WIRE 448 -208 320 -208
WIRE -272 -192 -272 -208
WIRE 64 -176 64 -208
WIRE 192 -176 192 -208
WIRE 320 -176 320 -208
WIRE 448 -176 448 -208
WIRE -144 -112 -160 -112
WIRE -32 -112 -64 -112
WIRE -272 -96 -272 -112
WIRE -32 -16 -48 -16
WIRE 640 80 544 80
WIRE 752 80 640 80
WIRE 928 80 752 80
WIRE 640 96 640 80
WIRE 752 96 752 80
WIRE 928 160 928 80
WIRE 928 160 880 160
WIRE -32 176 -224 176
WIRE 576 176 544 176
WIRE 640 176 640 160
WIRE 752 176 752 160
WIRE 928 192 928 160
WIRE 592 208 576 176
WIRE 848 208 880 160
WIRE 848 208 592 208
WIRE 848 240 592 240
WIRE -32 272 -64 272
WIRE 576 272 592 240
WIRE 576 272 544 272
WIRE 880 288 848 240
WIRE 928 288 928 272
WIRE 928 288 880 288
WIRE 928 304 928 288
WIRE -224 352 -224 176
WIRE -64 368 -64 272
WIRE -32 368 -64 368
WIRE 576 368 544 368
WIRE -224 464 -224 432
WIRE -32 464 -224 464
WIRE 576 464 576 368
WIRE 576 464 544 464
WIRE -224 480 -224 464
WIRE -224 560 -224 544
WIRE -112 560 -128 560
WIRE -32 560 -48 560
WIRE 576 560 544 560
WIRE 672 560 656 560
WIRE 192 640 192 624
WIRE 320 640 320 624
SYMBOL cap 624 96 R0
WINDOW 3 35 32 Left 2
WINDOW 123 25 59 Left 2
SYMATTR Value 470
SYMATTR Value2 x3
SYMATTR InstName C2
SYMATTR SpiceLine Rser=5m
SYMBOL res -240 336 R0
SYMATTR InstName R4
SYMATTR Value 15K
SYMBOL res 912 176 R0
SYMATTR InstName R3
SYMATTR Value 25m
SYMBOL cap 736 96 R0
WINDOW 3 37 30 Left 2
WINDOW 123 26 57 Left 2
SYMATTR Value 100
SYMATTR Value2 x4
SYMATTR InstName C3
SYMATTR SpiceLine Rser=1m
SYMBOL res 560 576 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 7.5K
SYMBOL voltage -272 -208 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res -48 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 34.8K
SYMBOL PowerProducts\\LTM4636 272 224 R0
SYMATTR InstName U1
SYMBOL cap -48 544 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL cap -240 480 R0
SYMATTR InstName C4
SYMATTR Value .1
FLAG -272 -96 0
FLAG 672 560 0
FLAG 192 640 0
FLAG 320 640 0
FLAG -160 -112 0
FLAG -224 560 0
FLAG -128 560 0
FLAG 640 176 0
FLAG 928 304 0
FLAG -48 -16 0
FLAG 928 80 OUT
FLAG 752 176 0
FLAG -272 -208 IN
TEXT 680 640 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1306.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1306.asy)
L1 IN N002 10 Rpar=1K
R3 N004 N003 118K
Rload OUT 0 15
D1 IN N001 MBR0530L
C3 N004 0 68p
R2 N005 0 249K
R1 OUT N005 768K
V1 IN 0 3
C4 OUT 0 220
XU1 N004 N005 OUT 0 N002 N001 IN IN LT1306 ;pnba Vc)FB)OUT)GND)SW)CAP)Vin)_SHDN
C1 N002 N001 1
C2 N003 0 680p
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LT1306.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2592 1680
WIRE 1920 1040 1840 1040
WIRE 2064 1040 1984 1040
WIRE 1744 1136 1632 1136
WIRE 1840 1136 1840 1040
WIRE 1840 1136 1744 1136
WIRE 1856 1136 1840 1136
WIRE 1952 1136 1936 1136
WIRE 1984 1136 1952 1136
WIRE 2064 1136 2064 1040
WIRE 2064 1136 2048 1136
WIRE 1632 1152 1632 1136
WIRE 1840 1200 1840 1136
WIRE 1952 1200 1952 1136
WIRE 2064 1200 2064 1136
WIRE 1632 1248 1632 1232
WIRE 1744 1296 1744 1136
WIRE 1792 1296 1744 1296
WIRE 2176 1296 2112 1296
WIRE 2288 1296 2176 1296
WIRE 2400 1296 2288 1296
WIRE 2176 1312 2176 1296
WIRE 2288 1312 2288 1296
WIRE 2400 1312 2400 1296
WIRE 2288 1408 2288 1376
WIRE 2400 1408 2400 1392
WIRE 1616 1424 1584 1424
WIRE 1728 1424 1696 1424
WIRE 1792 1424 1728 1424
WIRE 2176 1424 2176 1392
WIRE 2176 1424 2112 1424
WIRE 1584 1456 1584 1424
WIRE 1728 1456 1728 1424
WIRE 2176 1456 2176 1424
WIRE 1584 1552 1584 1520
WIRE 1728 1552 1728 1520
WIRE 1952 1552 1952 1520
WIRE 2176 1552 2176 1536
SYMBOL cap 1568 1456 R0
SYMATTR InstName C2
SYMATTR Value 680p
SYMBOL cap 1712 1456 R0
SYMATTR InstName C3
SYMATTR Value 68p
SYMBOL POWERPRODUCTS\\LT1306 1952 1360 R0
SYMATTR InstName U1
SYMBOL RES 2160 1296 R0
SYMATTR InstName R1
SYMATTR Value 768K
SYMBOL polcap 1984 1120 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL VOLTAGE 1632 1136 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL schottky 1920 1056 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBR0530L
SYMBOL polcap 2272 1312 R0
SYMATTR InstName C4
SYMATTR Value 220
SYMBOL RES 1712 1408 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 118K
SYMBOL RES 2160 1440 R0
SYMATTR InstName R2
SYMATTR Value 249K
SYMBOL RES 2384 1296 R0
SYMATTR InstName Rload
SYMATTR Value 15
SYMBOL ind 1840 1152 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rpar=1K
FLAG 2176 1552 0
FLAG 1952 1552 0
FLAG 1584 1552 0
FLAG 1728 1552 0
FLAG 1632 1248 0
FLAG 2288 1408 0
FLAG 2400 1408 0
FLAG 2400 1296 OUT
FLAG 1632 1136 IN
TEXT 2296 1520 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4096.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
Vin IN 0 SINE(0 10m 100k)
R1 N001 0 1k
R2 OUT N001 1k
V2 -V 0 -5
R3 OUT 0 10k
C1 OUT 0 10p
XU1 IN N001 +V -V OUT ADA4096 ;pnba In+)In-)V+)V-)OUT
.tran 100u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4096.asy)
.lib ADA4096.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 752 -1216 624 -1216
WIRE 160 -1152 160 -1168
WIRE 272 -1152 272 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 704 -1104 608 -1104
WIRE 752 -1104 752 -1216
WIRE 752 -1104 704 -1104
WIRE 848 -1104 752 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 848 -1072 848 -1104
WIRE 160 -1040 160 -1072
WIRE 272 -1040 272 -1072
WIRE 432 -976 432 -992
WIRE 752 -976 752 -1008
WIRE 848 -976 848 -1008
FLAG 160 -1168 +V
FLAG 432 -976 0
FLAG 704 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 272 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 272 -1040 0
FLAG 160 -1040 0
FLAG 752 -976 0
FLAG 848 -976 0
SYMBOL voltage 160 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 10m 100k)
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 272 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 736 -1104 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL cap 832 -1072 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL ADA4096 576 -1168 R0
SYMATTR InstName U1
TEXT 680 -936 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1151.asc
* Generated by LTspice 26.0.1 for Windows.
* High Voltage Instrumentation Amplifier
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC1151.asy)
V4 -V 0 -15
V3 IN- IN+ SINE(0 1m 100)
XU2 IN+ N003 +V -V OUT LTC1151 ;pnba In+)In-)V+)V-)OUT
R4 OUT N003 1Meg
R1 N002 N001 1K
R2 N001 0 1Meg
V2 IN+ 0 SINE(0 1 10)
V1 +V 0 15
XU1 IN- N001 +V -V N002 LTC1151 ;pnba In+)In-)V+)V-)OUT
R3 N003 N002 1K
.tran .3
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 160 96 128 96
WIRE 272 96 240 96
WIRE 416 96 400 96
WIRE 512 96 496 96
WIRE -192 112 -192 96
WIRE -96 112 -96 96
WIRE -192 208 -192 192
WIRE -96 208 -96 192
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 448 224 448 208
WIRE 272 240 272 96
WIRE 272 240 224 240
WIRE 304 240 272 240
WIRE 400 240 400 96
WIRE 400 240 384 240
WIRE 416 240 400 240
WIRE 112 256 -16 256
WIRE 160 256 112 256
WIRE 512 256 512 96
WIRE 512 256 480 256
WIRE 576 256 512 256
WIRE -16 272 -16 256
WIRE 416 272 400 272
WIRE 192 288 192 272
WIRE 448 304 448 288
WIRE -16 384 -16 352
WIRE 352 384 -16 384
WIRE 400 384 400 272
WIRE 400 384 352 384
WIRE -16 400 -16 384
WIRE -16 496 -16 480
SYMBOL voltage -96 96 R0
SYMATTR InstName V4
SYMATTR Value -15
SYMBOL opamps\\LTC1151 448 192 R0
SYMATTR InstName U2
SYMBOL opamps\\LTC1151 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -16 256 R0
WINDOW 0 24 24 Left 2
WINDOW 3 24 94 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1m 100)
SYMBOL voltage -192 96 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 512 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -16 384 R0
WINDOW 3 26 93 Left 2
SYMATTR Value SINE(0 1 10)
SYMATTR InstName V2
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 400 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
FLAG -192 208 0
FLAG 192 192 +V
FLAG -192 96 +V
FLAG 16 96 0
FLAG -16 496 0
FLAG 448 208 +V
FLAG 576 256 OUT
FLAG 112 256 IN-
FLAG 352 384 IN+
FLAG -96 208 0
FLAG -96 96 -V
FLAG 192 288 -V
FLAG 448 304 -V
TEXT 432 416 Left 2 !.tran .3
TEXT 304 48 Bottom 2 ;High Voltage Instrumentation Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\2d0afc21679a_sys_pr_kl_ws0809.asc
* Generated by LTspice 26.0.1 for Windows.
S3 N004 N003 N001 0 SWr
V3 N001 0 PULSE(0 5 90m 1n 1n)
Cs N007 0 150n
Cr N003 0 100n
Rs N005 N007 100
V2 N002 0 10
S4 N003 N002 N001 0 SWl
S1 N006 N005 N001 0 SWl
Rp N007 0 20k
V1 0 N006 10
S2 N005 N004 N001 0 SWr
.model swr sw(Ron=10m Roff=10meg vt=1 vh=0.6)
.model swl sw(Ron=1meg Roff=10m vt=1 vh=0.6)
.tran 0 100m 90m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 976 680
WIRE -512 -256 -800 -256
WIRE -96 -256 -512 -256
WIRE -800 -208 -800 -256
WIRE -512 -112 -512 -256
WIRE -512 -112 -592 -112
WIRE -400 -112 -512 -112
WIRE -96 -112 -96 -256
WIRE -96 -112 -208 -112
WIRE -32 -112 -96 -112
WIRE -800 -96 -800 -128
WIRE -464 -80 -544 -80
WIRE -352 -80 -464 -80
WIRE -80 -80 -160 -80
WIRE 16 -80 -80 -80
WIRE -592 -48 -592 -112
WIRE -544 -48 -544 -80
WIRE -400 -48 -400 -112
WIRE -352 -48 -352 -80
WIRE -208 -48 -208 -112
WIRE -160 -48 -160 -80
WIRE -32 -48 -32 -112
WIRE 16 -48 16 -80
WIRE -608 0 -656 0
WIRE -480 0 -528 0
WIRE -416 0 -480 0
WIRE -224 0 -336 0
WIRE -112 0 -144 0
WIRE -48 0 -112 0
WIRE 288 0 32 0
WIRE -112 32 -112 0
WIRE -480 128 -480 0
WIRE -656 160 -656 0
WIRE -112 160 -112 112
WIRE -112 160 -272 160
WIRE 288 160 288 0
WIRE -112 192 -112 160
WIRE -272 208 -272 160
WIRE -656 384 -656 240
WIRE -480 384 -480 192
WIRE -480 384 -656 384
WIRE -272 384 -272 272
WIRE -272 384 -480 384
WIRE -112 384 -112 272
WIRE -112 384 -272 384
WIRE 288 384 288 240
WIRE 288 384 -112 384
SYMBOL sw -320 0 R90
SYMATTR InstName S3
SYMATTR Value SWr
SYMBOL voltage -656 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 10
SYMBOL voltage 288 256 R180
WINDOW 0 24 104 Left 0
WINDOW 3 24 16 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL cap -288 208 R0
SYMATTR InstName Cs
SYMATTR Value 150n
SYMBOL sw 48 0 R90
SYMATTR InstName S1
SYMATTR Value SWl
SYMBOL voltage -800 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 90m 1n 1n)
SYMBOL sw -128 0 R90
SYMATTR InstName S2
SYMATTR Value SWr
SYMBOL cap -496 128 R0
SYMATTR InstName Cr
SYMATTR Value 100n
SYMBOL sw -512 0 R90
SYMATTR InstName S4
SYMATTR Value SWl
SYMBOL res -128 176 R0
SYMATTR InstName Rp
SYMATTR Value 20k
SYMBOL res -128 16 R0
SYMATTR InstName Rs
SYMATTR Value 100
FLAG -800 -96 0
FLAG -480 384 0
FLAG -464 -80 0
FLAG -80 -80 0
TEXT 344 16 Left 0 !.model swr sw(Ron=10m Roff=10meg vt=1 vh=0.6)\n.model swl sw(Ron=1meg Roff=10m vt=1 vh=0.6)
TEXT -834 408 Left 0 !.tran 0 100m 90m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1517-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N002 N001 .1
C1 OUT 0 6.8
V1 IN 0 3
Rload OUT 0 500
XU1 IN 0 OUT N002 N001 LTC1517-3.3 ;pnba Vin)GND)Vout)Cap+)Cap-
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1517-3.3.asy)
.lib LTC1517-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3300 2376
WIRE 2832 1872 2784 1872
WIRE 2944 1872 2896 1872
WIRE 2784 1936 2784 1872
WIRE 2944 1936 2944 1872
WIRE 2736 2048 2624 2048
WIRE 3056 2048 2992 2048
WIRE 3152 2048 3056 2048
WIRE 2624 2064 2624 2048
WIRE 3056 2064 3056 2048
WIRE 3152 2064 3152 2048
WIRE 2624 2160 2624 2144
WIRE 3056 2160 3056 2128
WIRE 3152 2160 3152 2144
WIRE 2864 2192 2864 2160
FLAG 3056 2160 0
FLAG 2864 2192 0
FLAG 2624 2160 0
FLAG 3152 2160 0
FLAG 3152 2048 OUT
FLAG 2624 2048 IN
SYMBOL cap 2896 1856 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL cap 3040 2064 R0
SYMATTR InstName C1
SYMATTR Value 6.8
SYMBOL VOLTAGE 2624 2048 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL RES 3136 2048 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LTC1517-3.3 2864 2048 R0
SYMATTR InstName U1
TEXT 3000 2232 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1634.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:\nSwitch shown for a logic 0 input\nOnly one channel is modeled\nQinj is not modeled \nModeled at 5V specification\n_EN is not available on the TSSOP package
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1634.asy)
XU1 vIN vSA vD vSB +V 0 0 -V ADG1634 ;pnba IN)SA)D)SB)Vdd)GND)_EN)Vss
V4 vIN 0 PULSE(0 3 0 10n 10n 10u 20u)
C1 vD 0 36p
V5 vSA 0 2
V2 -V 0 -5
R1 vD 0 301
V1 +V 0 5
V6 vSB 0 0
.tran 120u
.lib ADG1634.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -800 -320 -800 -352
WIRE -1040 -256 -1056 -256
WIRE -928 -256 -960 -256
WIRE -896 -256 -928 -256
WIRE -672 -224 -704 -224
WIRE -608 -224 -672 -224
WIRE -528 -224 -608 -224
WIRE -1136 -192 -1152 -192
WIRE -928 -192 -1056 -192
WIRE -896 -192 -928 -192
WIRE -608 -192 -608 -224
WIRE -528 -176 -528 -224
WIRE -1376 -144 -1376 -160
WIRE -1280 -144 -1280 -160
WIRE -928 -128 -1072 -128
WIRE -896 -128 -928 -128
WIRE -672 -128 -704 -128
WIRE -672 -112 -672 -128
WIRE -608 -96 -608 -112
WIRE -528 -96 -528 -112
WIRE -1376 -48 -1376 -64
WIRE -1280 -48 -1280 -64
WIRE -1072 0 -1072 -128
WIRE -864 16 -864 -16
WIRE -736 16 -736 -16
SYMBOL voltage -1040 -192 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 0
SYMBOL voltage -1072 -16 R0
WINDOW 3 33 91 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 10n 10n 10u 20u)
SYMATTR InstName V4
SYMBOL cap -544 -176 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL ADG1634 -800 -176 R0
SYMATTR InstName U1
SYMBOL voltage -1280 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -1376 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -624 -208 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage -944 -256 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 2
FLAG -1280 -48 0
FLAG -1376 -48 0
FLAG -1376 -160 +V
FLAG -1280 -160 -V
FLAG -1072 80 0
FLAG -1056 -256 0
FLAG -1152 -192 0
FLAG -800 -352 +V
FLAG -736 16 0
FLAG -864 16 -V
FLAG -608 -96 0
FLAG -528 -96 0
FLAG -672 -112 0
FLAG -928 -256 vSA
FLAG -928 -192 vSB
FLAG -928 -128 vIN
FLAG -672 -224 vD
TEXT -688 24 Left 2 !.tran 120u
TEXT -1408 -552 Left 2 ;Notes:\nSwitch shown for a logic 0 input\nOnly one channel is modeled\nQinj is not modeled \nModeled at 5V specification\n_EN is not available on the TSSOP package
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP160-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP160-1.8.asy)
XU1 IN 0 N001 OUT ADP16xfd K=555.6u ;pnba Vin)GND)En)Vout
C1 OUT 0 1
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
Rload OUT 0 180
V1 IN 0 5
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -48 96
WIRE 400 96 352 96
WIRE 496 96 400 96
WIRE -48 112 -48 96
WIRE 400 112 400 96
WIRE 496 112 496 96
WIRE -48 208 -48 192
WIRE 160 208 16 208
WIRE 400 208 400 176
WIRE 496 208 496 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL cap 384 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 480 96 R0
SYMATTR InstName Rload
SYMATTR Value 180
SYMBOL voltage -48 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL ADP160-1.8 256 208 R0
SYMATTR InstName U1
FLAG -48 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 496 208 0
FLAG 496 96 OUT
FLAG -48 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6202.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6202.asy)
R2 N001 0 1K
V2 -V 0 -5
R1 OUT N001 1K
V3 N002 0 SINE(0 1 1Meg)
XU1 N002 N001 OUT +V -V LT6202 ;pnba IN+)IN-)OUT)VCC)VEE
V1 +V 0 5
.tran 10u
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -208 144 -208 128
WIRE -80 144 -80 128
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE -208 240 -208 224
WIRE -80 240 -80 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 304 240 256 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL opamps\\LT6202 192 240 R0
SYMATTR InstName U1
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1Meg)
SYMBOL voltage -208 128 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -80 128 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
FLAG -80 240 0
FLAG 192 192 +V
FLAG -80 128 +V
FLAG 192 288 -V
FLAG -208 240 0
FLAG -208 128 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 304 240 OUT
TEXT 280 344 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\0d53d4698b7d_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N002 N001 0 0 NMOS
M2 VDD N001 N002 VDD PMOS
VDD NC_01 0 1.8
Vin N001 0 V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vin 0 3 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 32 416 16
WIRE 496 32 416 32
WIRE 416 48 416 32
WIRE 496 96 496 32
WIRE 496 96 416 96
WIRE 368 128 336 128
WIRE 336 192 336 128
WIRE 336 192 192 192
WIRE 416 192 416 144
WIRE 192 208 192 192
WIRE 496 240 416 240
WIRE 336 272 336 192
WIRE 368 272 336 272
WIRE 416 304 416 288
WIRE 496 304 496 240
WIRE 496 304 416 304
WIRE 416 336 416 304
SYMBOL Voltage 192 192 R0
SYMATTR InstName Vin
SYMBOL pmos4 368 48 R0
SYMATTR InstName M2
SYMBOL Voltage 112 16 R0
SYMATTR InstName VDD
SYMATTR Value 1.8
SYMBOL nmos4 368 192 R0
SYMATTR InstName M1
FLAG 416 336 0
FLAG 192 288 0
FLAG 112 112 0
FLAG 416 16 VDD
TEXT 568 -32 Left 2 !.dc Vin 0 3 0.1
* Z:\tmp\asc_dec_bjh7r6w2\01bdb1ffaaa0_Z_filter_4_freq_laplace_a_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
BSUM2 out 0 V=B0*V(sum) + B1*V(z_1) + B2*V(z_2) + B3*V(z_3) + B4*V(z_4)
B3 z_3 0 V=V(z_2) LAPLACE(exp(-s*{TS}))
B1 z_1 0 V=V(sum) LAPLACE(exp(-s*{TS}))
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2816 1348
WIRE 944 1024 944 992
WIRE 944 912 944 864
WIRE 944 864 1024 864
WIRE 16 576 80 576
WIRE 848 576 912 576
WIRE 848 624 848 576
WIRE 848 704 848 736
WIRE 16 624 16 576
WIRE 16 704 16 736
SYMBOL bv 944 896 R0
SYMATTR InstName SUM2
SYMATTR Value V=B0*V(sum)  + B1*V(z_1) + B2*V(z_2) + B3*V(z_3) + B4*V(z_4)
SYMBOL bv 848 608 R0
SYMATTR InstName B3
SYMATTR Value V=V(z_2)   LAPLACE(exp(-s*{TS}))
SYMBOL bv 16 608 R0
SYMATTR InstName B1
SYMATTR Value V=V(sum)   LAPLACE(exp(-s*{TS}))
FLAG 944 1024 0
FLAG 1024 864 out
FLAG 80 576 z_1
FLAG 912 576 z_3
FLAG 16 736 0
FLAG 848 736 0
* Z:\home\khalils\Downloads\files\data\raw_asc\a9087e894228_highpass2.asc
* Generated by LTspice 26.0.1 for Windows.
;tran 1
R1 P001 0 5k
V1 N001 0 0 AC 1
C1 N001 P001 0.001micro
.ac dec 100 10 1meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 64 80 64
WIRE 80 144 80 64
WIRE 80 256 80 224
WIRE 256 256 256 208
SYMBOL voltage 80 128 R0
WINDOW 3 14 105 Invisible 2
WINDOW 123 14 133 Left 1
WINDOW 39 0 0 Left 0
WINDOW 0 24 16 Left 0
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL res 240 112 R0
WINDOW 0 58 40 Right 1
WINDOW 3 36 76 Left 1
SYMATTR InstName R1
SYMATTR Value 5k
SYMBOL cap 240 64 R0
WINDOW 0 24 8 Left 1
WINDOW 3 127 40 Right 1
SYMATTR InstName C1
SYMATTR Value 0.001micro
FLAG 80 256 0
FLAG 256 256 0
TEXT 48 280 Left 2 !;tran 1
TEXT 64 -8 Left 2 !.ac dec 100 10 1meg
* Z:\home\khalils\Downloads\files\data\raw_asc\d9ebef71586b_bjt_output_characteristics.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 N001 1
Q1 N001 N004 0 0 BC547B
VCE N002 0 20
VBE N003 0 500m
R1 N004 N003 10k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VCE 0 20 2 VBE 500m 4000m 500m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 240 0 160 0
WIRE 416 0 320 0
WIRE 160 112 160 0
WIRE 416 112 416 0
WIRE -64 160 -160 160
WIRE 96 160 16 160
WIRE -160 208 -160 160
WIRE -160 352 -160 288
WIRE 160 352 160 208
WIRE 160 352 -160 352
WIRE 416 352 416 192
WIRE 416 352 160 352
WIRE 160 384 160 352
SYMBOL npn 96 112 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL voltage 416 96 R0
SYMATTR InstName VCE
SYMATTR Value 20
SYMBOL res 32 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -160 192 R0
SYMATTR InstName VBE
SYMATTR Value 500m
SYMBOL res 336 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
FLAG 160 384 0
TEXT -80 432 Left 2 !.dc VCE 0 20 2 VBE 500m 4000m 500m
* Z:\home\khalils\Downloads\files\data\raw_asc\136dca42c4fa_Fig1_16.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vin Vout 1k
Vin Vin 0 1
R2 Vout 0 2k
.dc Vin 0 1 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 48 224 0 224
WIRE 112 224 48 224
WIRE 256 224 192 224
WIRE 288 224 256 224
WIRE 0 240 0 224
WIRE 288 240 288 224
WIRE 0 336 0 320
WIRE 288 336 288 320
SYMBOL res 96 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 0 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 1
SYMBOL res 272 224 R0
SYMATTR InstName R2
SYMATTR Value 2k
FLAG 0 336 0
FLAG 288 336 0
FLAG 256 224 Vout
FLAG 48 224 Vin
TEXT 40 400 Left 0 !.dc Vin 0 1 1m