* Z:\home\khalils\Downloads\files\data\raw_asc\2cccfe4d794a_time_mod_PWM.asc
* Generated by LTspice 26.0.1 for Windows.
* difference control V in delta_V_hold with idtmod relaxation oscillator sawtooth\nand get unit PWM output\n \nduty cycle controlled by BV_delta time on, normalized with .param t_norm
* roll all into one line
* create a unit height pulse with duration: start=a>0 rising, stop=b>0 rising
* integrate pulse to turn normalized delta pulse time into V, reset at next control pulse start
* integral to implement Sample&Hold function
* test sources
B6 a_edge 0 V=u(ddt(u(V(a))))
R1 PWM fltr 1
C1 fltr 0 .1
B5 delta 0 V=u(idt(V(a_edge),0,V(b_edge)))
B14 b_edge 0 V=u(ddt(u(V(b))))
B4 delta_V_hold 0 V=idt(0,V(delta_V),V(b_edge))
B12 PWM 0 V=u(V(delta_V_hold)-idtmod(f_pwm,0,1))
V6 b 0 SINE(0 1 1.2 0 0 0 0)
B3 delta_V 0 V=idt(V(delta)/t_norm,0,V(a_edge))
B2 PWM_too 0 V=u(idt(0,idt(u(idt(u(ddt(u(V(a)))),0,u(ddt(u(V(b))))))/t_norm,0,u(ddt(u(V(a))))),u(ddt(u(V(b)))))-idtmod(f_pwm,0,1))
V5 a 0 SINE(0 1 1 0 0 0 0)
.tran 0 10 0 1m
.param t_norm=1, f_pwm=10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1856 852
WIRE -1120 -400 -1120 -432
WIRE -912 -400 -912 -432
WIRE -1120 -304 -1120 -320
WIRE -912 -304 -912 -320
WIRE -1120 -160 -1152 -160
WIRE -864 -160 -896 -160
WIRE -1152 -144 -1152 -160
WIRE -896 -144 -896 -160
WIRE -608 -80 -640 -80
WIRE -640 -64 -640 -80
WIRE -1152 -48 -1152 -64
WIRE -896 -48 -896 -64
WIRE -640 32 -640 16
WIRE -1120 160 -1152 160
WIRE -1152 176 -1152 160
WIRE -720 208 -752 208
WIRE -752 224 -752 208
WIRE -1152 272 -1152 256
WIRE -752 320 -752 304
WIRE -1104 496 -1152 496
WIRE -352 496 -352 464
WIRE -1152 512 -1152 496
WIRE -352 592 -352 576
WIRE -240 592 -352 592
WIRE -1152 608 -1152 592
WIRE -352 608 -352 592
WIRE -1104 704 -1152 704
WIRE -1152 720 -1152 704
WIRE -1152 816 -1152 800
SYMBOL bv -1152 704 R0
WINDOW 0 -13 58 Left 0
SYMATTR InstName B2
SYMATTR Value V=u(idt(0,idt(u(idt(u(ddt(u(V(a)))),0,u(ddt(u(V(b))))))/t_norm,0,u(ddt(u(V(a))))),u(ddt(u(V(b)))))-idtmod(f_pwm,0,1))
SYMBOL voltage -1120 -416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value SINE(0 1 1 0 0 0 0)
SYMBOL bv -640 -80 R0
WINDOW 0 -14 60 Left 0
SYMATTR InstName B5
SYMATTR Value V=u(idt(V(a_edge),0,V(b_edge)))
SYMBOL bv -1152 160 R0
WINDOW 0 -16 57 Left 0
SYMATTR InstName B3
SYMATTR Value V=idt(V(delta)/t_norm,0,V(a_edge))
SYMBOL voltage -912 -416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value SINE(0 1 1.2 0 0 0 0)
SYMBOL bv -752 208 R0
WINDOW 0 -14 60 Left 0
SYMATTR InstName B4
SYMATTR Value V=idt(0,V(delta_V),V(b_edge))
SYMBOL res -368 480 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL cap -368 608 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL bv -896 -160 R0
WINDOW 0 -14 59 Left 0
SYMATTR InstName B14
SYMATTR Value V=u(ddt(u(V(b))))
SYMBOL bv -1152 496 R0
WINDOW 0 -13 58 Left 0
SYMATTR InstName B12
SYMATTR Value V=u(V(delta_V_hold)-idtmod(f_pwm,0,1))
SYMBOL bv -1152 -160 R0
WINDOW 0 -14 59 Left 0
SYMATTR InstName B6
SYMATTR Value V=u(ddt(u(V(a))))
FLAG -1152 608 0
FLAG -1104 496 PWM
FLAG -1120 -304 0
FLAG -1120 -432 a
FLAG -912 -304 0
FLAG -912 -432 b
FLAG -1152 272 0
FLAG -1120 160 delta_V
FLAG -752 320 0
FLAG -720 208 delta_V_hold
FLAG -640 32 0
FLAG -608 -80 delta
FLAG -1152 -48 0
FLAG -1120 -160 a_edge
FLAG -896 -48 0
FLAG -864 -160 b_edge
FLAG -1152 816 0
FLAG -1104 704 PWM_too
FLAG -352 672 0
FLAG -352 464 PWM
FLAG -240 592 fltr
TEXT -752 -416 Left 0 !.tran 0 10 0 1m
TEXT -1216 384 Left 0 ;difference control V in delta_V_hold with idtmod relaxation oscillator sawtooth\nand get unit PWM output\n \nduty cycle controlled by BV_delta time on, normalized with .param t_norm
TEXT -1216 672 Left 0 ;roll all into one line
TEXT -1216 -208 Left 0 ;create a unit height pulse with duration: start=a>0 rising, stop=b>0 rising
TEXT -1216 104 Left 0 ;integrate pulse to turn normalized delta pulse time into V, reset at next control pulse start
TEXT -824 160 Left 0 ;integral to implement Sample&Hold function
TEXT -1192 -248 Left 0 !.param t_norm=1, f_pwm=10
TEXT -1064 -440 Left 0 ;test sources