* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4366-2.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N007 N011 10n
MQ1 N001 N003 N002 N002 IRLHS6342
V1 N001 0 PWL(0 0 0.8u 30 340m 30 341m 12 500m 12 500.8m 30)
C2 N002 0 220
C3 N006 0 0.01
R1 N002 N008 12.4K
R2 N011 0 1.91K
R3 N003 N006 10
R4 N008 0 169K
R5 N002 0 100
R6 N001 N004 29.4K
C4 N002 N011 0.47
V2 N010 0 PWL(0 0 340m 0 340.01m 1 340.8m 1 340.81m 0)
S1 0 N009 N010 0 X
R7 N005 N009 470K
XU1 N004 N005 N007 N011 N011 N008 N002 N006 LTC4366-2 ;pnba VDD)_SD)TIMER)VSS)BASE)FB)OUT)GATE
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 11
.model X SW(Ron=87 Roff=1T Vt=0.5 Vh=-.4)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4366-2.asy)
.lib LTC4366-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1592 680
WIRE 144 -128 -608 -128
WIRE 256 -128 144 -128
WIRE 512 -128 352 -128
WIRE 560 -128 512 -128
WIRE 624 -128 560 -128
WIRE 720 -128 624 -128
WIRE -608 -112 -608 -128
WIRE 624 -112 624 -128
WIRE 720 -112 720 -128
WIRE 144 -80 144 -128
WIRE -608 -16 -608 -32
WIRE 336 -16 336 -80
WIRE 624 -16 624 -48
WIRE 720 -16 720 -32
WIRE 144 16 144 0
WIRE 0 80 -160 80
WIRE 336 80 336 64
WIRE 336 80 288 80
WIRE 384 80 336 80
WIRE 464 80 448 80
WIRE 560 80 560 -128
WIRE -160 96 -160 80
WIRE 0 128 -64 128
WIRE 416 128 288 128
WIRE 512 128 512 -128
WIRE 512 128 416 128
WIRE -64 160 -64 128
WIRE 560 176 560 160
WIRE 560 176 288 176
WIRE -160 192 -160 176
WIRE 416 192 416 128
WIRE 560 192 560 176
WIRE -608 208 -736 208
WIRE -208 208 -528 208
WIRE -208 256 -224 256
WIRE -64 256 -64 224
WIRE 96 256 96 224
WIRE 96 256 -64 256
WIRE 144 256 96 256
WIRE 192 256 192 224
WIRE 192 256 144 256
WIRE 416 256 192 256
WIRE 144 272 144 256
WIRE -160 288 -160 272
WIRE 560 288 560 272
WIRE 144 368 144 352
FLAG 144 368 0
FLAG -608 -16 0
FLAG 464 80 0
FLAG 560 288 0
FLAG -160 288 0
FLAG -224 256 0
FLAG -736 208 0
FLAG 624 -16 0
FLAG 720 -16 0
SYMBOL cap -80 160 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL nmos 256 -80 R270
WINDOW 0 52 42 VTop 2
WINDOW 3 -8 73 VLeft 2
SYMATTR InstName Q1
SYMATTR Value IRLHS6342
SYMBOL voltage -608 -128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 44 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 0.8u 30 340m 30 341m 12 500m 12 500.8m 30)
SYMBOL cap 608 -112 R0
SYMATTR InstName C2
SYMATTR Value 220
SYMBOL cap 384 96 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value 0.01
SYMBOL res 544 64 R0
SYMATTR InstName R1
SYMATTR Value 12.4K
SYMBOL res 128 256 R0
SYMATTR InstName R2
SYMATTR Value 1.91K
SYMBOL res 320 -32 R0
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL res 544 176 R0
SYMATTR InstName R4
SYMATTR Value 169K
SYMBOL res 704 -128 R0
SYMATTR InstName R5
SYMATTR Value 100
SYMBOL res 128 -96 R0
SYMATTR InstName R6
SYMATTR Value 29.4K
SYMBOL cap 400 192 R0
SYMATTR InstName C4
SYMATTR Value 0.47
SYMBOL voltage -512 208 R90
WINDOW 123 68 56 VTop 2
WINDOW 39 50 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PWL(0 0 340m 0 340.01m 1 340.8m 1 340.81m 0)
SYMATTR InstName V2
SYMBOL sw -160 288 M180
WINDOW 0 21 93 Left 2
WINDOW 3 7 16 Left 2
SYMATTR InstName S1
SYMATTR Value X
SYMBOL res -176 80 R0
SYMATTR InstName R7
SYMATTR Value 470K
SYMBOL LTC4366-2 144 160 R0
SYMATTR InstName U1
TEXT 432 336 Left 2 !.tran 11
TEXT -448 336 Left 2 !.model X SW(Ron=87 Roff=1T Vt=0.5 Vh=-.4)