Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0b3c7cb09f1d_CSAmp_DiffPair.asc
* Generated by LTspice 26.0.1 for Windows.
* COMMON SOURCE AMPLIFIER FOR DESIGNING DIFFERENTIAL PAIR USING LUT FROM ADT
;tran 5u
;ac dec 10 1MEG 40G
vs vs 0 0.45
vgs vg 0 SINE(1.1816 10m 1meg) AC 1
M2 vout vb vdd vdd pch l=0.36u w=3.42u
C1 vout 0 20f
Vb vb 0 1.048
vdd vdd 0 1.8
M1 vout vg vs 0 nch l=0.36u w=3.6u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include CMOS180.txt
.op
.tf V(vout) vgs
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 732
WIRE 352 64 352 16
WIRE 448 64 352 64
WIRE 352 80 352 64
WIRE 304 96 256 96
WIRE 448 128 448 64
WIRE 448 128 352 128
WIRE 32 256 32 176
WIRE 352 256 352 176
WIRE 608 256 352 256
WIRE 656 256 608 256
WIRE -256 272 -256 224
WIRE -96 272 -96 224
WIRE 352 272 352 256
WIRE -368 288 -368 256
WIRE 464 320 352 320
WIRE 608 336 608 256
WIRE 304 352 240 352
WIRE -368 416 -368 368
WIRE -256 416 -256 352
WIRE -96 416 -96 352
WIRE 32 416 32 336
WIRE 352 416 352 368
WIRE 608 432 608 400
IOPIN 240 352 In
IOPIN 656 256 In
SYMBOL voltage -256 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vdd
SYMATTR Value 1.8
SYMBOL cap 592 336 R0
SYMATTR InstName C1
SYMATTR Value 20f
SYMBOL voltage -96 256 R0
WINDOW 3 -41 -81 VRight 2
WINDOW 123 28 97 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(1.1816 10m 1meg)
SYMATTR Value2 AC 1
SYMATTR InstName vgs
SYMBOL voltage 32 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vb
SYMATTR Value 1.048
SYMBOL nmos4 304 272 R0
WINDOW 123 55 116 Left 2
SYMATTR Value2 l=0.36u w=3.6u
SYMATTR InstName M1
SYMATTR Value nch
SYMBOL voltage -368 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vs
SYMATTR Value 0.45
SYMBOL pmos4 304 176 M180
WINDOW 123 120 23 Left 2
SYMATTR Value2 l=0.36u w=3.42u
SYMATTR InstName M2
SYMATTR Value pch
FLAG -96 416 0
FLAG -256 416 0
FLAG -368 416 0
FLAG -368 256 vs
FLAG -256 224 vdd
FLAG -96 224 vg
FLAG 240 352 vg
FLAG 656 256 vout
FLAG 608 432 0
FLAG 352 16 vdd
FLAG 32 416 0
FLAG 32 176 vb
FLAG 256 96 vb
FLAG 352 416 vs
FLAG 464 320 0
TEXT -376 16 Left 2 !.include CMOS180.txt
TEXT -376 64 Left 2 !.op
TEXT -376 40 Left 2 !.tf V(vout) vgs
TEXT -376 88 Left 2 !;tran 5u
TEXT -376 -80 Left 2 ;COMMON SOURCE AMPLIFIER FOR DESIGNING DIFFERENTIAL PAIR USING LUT FROM ADT
TEXT -376 112 Left 2 !;ac dec 10 1MEG 40G
* Z:\home\khalils\Downloads\files\data\raw_asc\044a6beec16e_ADG1612.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1612.asy)
V1 +V 0 5
V3 N001 0 4
R1 N002 0 1k
V2 -V 0 -5
XU1 N003 N001 N002 -V +V 0 ADG1612 ;pnba IN)S)D)Vss)Vdd)GND
V4 N003 0 pulse(0 3.3 0 1u 1u 5m 10m)
.tran 30m
.lib ADG1612.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -96
WIRE -544 -16 -544 -32
WIRE -400 0 -432 0
WIRE -240 0 -320 0
WIRE 0 0 -48 0
WIRE 0 16 0 0
WIRE -240 64 -336 64
WIRE -544 80 -544 64
WIRE 0 112 0 96
WIRE -544 176 -544 160
WIRE -336 192 -336 64
WIRE -208 192 -208 176
WIRE -80 192 -80 176
WIRE -544 272 -544 256
WIRE -336 304 -336 272
SYMBOL Switches\\ADG1612 -144 48 R0
SYMATTR InstName U1
SYMBOL voltage -544 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -336 176 R0
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMBOL voltage -304 0 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 4
SYMBOL voltage -544 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG -544 272 0
FLAG -544 80 0
FLAG -544 -32 +V
FLAG -544 160 -V
FLAG -432 0 0
FLAG -208 192 -V
FLAG -144 -96 +V
FLAG -80 192 0
FLAG -336 304 0
FLAG 0 112 0
TEXT 16 176 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7172-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N001 0 1n
V1 IN 0 3.5
Rload OUT 0 2.5
C1 OUT 0 4.7 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADM7172-3.0 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7172-3.0.asy)
.lib ADM7172-3.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
SYMBOL cap 80 240 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.5
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADM7172-3.0 224 128 R0
SYMATTR InstName U1
TEXT 376 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2935-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2935-3.asy)
R2 N001 N003 10K
V2 N005 0 PWL(0 0 9.499 0 9.5 5 10.5 5 10.501 0)
MQ1 N004 N005 0 0 BSS123
R1 N001 N002 10K
V1 N001 0 PWL(0 0 3.6 3.6 16 3.6 19.6 0 20.1 0 23.7 3.6)
XU1 0 0 0 0 N003 N002 N004 N001 LTC2935-3 ;pnba S2)S1)S0)GND)_PFO)_RST)MR)VCC
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 20
.lib LTC2935-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1064 680
WIRE 240 -16 -208 -16
WIRE 368 -16 240 -16
WIRE 464 -16 368 -16
WIRE 368 0 368 -16
WIRE 464 0 464 -16
WIRE 240 48 240 -16
WIRE 144 96 128 96
WIRE 368 96 368 80
WIRE 368 96 336 96
WIRE 144 176 128 176
WIRE 464 176 464 80
WIRE 464 176 336 176
WIRE 144 256 128 256
WIRE 384 256 336 256
WIRE 384 272 384 256
WIRE -208 320 -208 -16
WIRE 240 320 240 304
WIRE 528 352 432 352
WIRE 384 384 384 368
WIRE 528 384 528 352
WIRE -208 416 -208 400
WIRE 528 480 528 464
SYMBOL voltage 528 368 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR Value PWL(0 0 9.499 0 9.5 5 10.5 5 10.501 0)
SYMATTR InstName V2
SYMBOL res 352 -16 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 448 -16 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL nmos 432 272 M0
WINDOW 0 26 -6 Right 2
WINDOW 3 20 104 Right 2
SYMATTR InstName Q1
SYMATTR Value BSS123
SYMBOL voltage -208 304 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 3.6 3.6 16 3.6 19.6 0 20.1 0 23.7 3.6)
SYMBOL LTC2935-3 240 176 R0
SYMATTR InstName U1
FLAG 240 320 0
FLAG -208 416 0
FLAG 384 384 0
FLAG 528 480 0
FLAG 128 96 0
FLAG 128 176 0
FLAG 128 256 0
TEXT 248 488 Left 2 !.tran 20
* Z:\home\khalils\Downloads\files\data\raw_asc\2fadaa9870cc_transformer-antena.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 SINE(0 1 30meg) AC 1
R1 N002 N001 100k
L2 0 N002 500n
L3 0 N003 100n
R2 N003 0 1k
k l2 l3 .5
.tran {30/30meg}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 80 48 80
WIRE 384 80 208 80
WIRE 512 80 384 80
WIRE 816 80 624 80
WIRE 48 144 48 80
WIRE 384 144 384 80
WIRE 512 144 512 80
WIRE 624 144 624 80
WIRE 816 144 816 80
WIRE 48 272 48 224
WIRE 368 272 48 272
WIRE 384 272 384 224
WIRE 384 272 368 272
WIRE 512 272 512 224
WIRE 512 272 384 272
WIRE 624 272 624 224
WIRE 672 272 624 272
WIRE 816 272 816 224
WIRE 816 272 672 272
FLAG 368 272 0
FLAG 672 272 0
SYMBOL voltage 48 128 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 30meg)
SYMATTR Value2 AC 1
SYMBOL res 224 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL ind2 496 240 M180
WINDOW 0 36 80 Left 2
WINDOW 3 -12 -3 Left 2
SYMATTR InstName L2
SYMATTR Value 500n
SYMATTR Type ind
SYMBOL ind2 640 240 R180
WINDOW 0 36 80 Left 2
WINDOW 3 -17 -1 Left 2
SYMATTR InstName L3
SYMATTR Value 100n
SYMATTR Type ind
SYMBOL res 800 128 R0
SYMATTR InstName R2
SYMATTR Value 1k
TEXT 200 320 Left 2 !k l2 l3 .5
TEXT 8 344 Left 2 !.tran {30/30meg}
* Z:\home\khalils\Downloads\files\data\raw_asc\5813604aaf50_Wien-oscillator.asc
* Generated by LTspice 26.0.1 for Windows.
* Wien oscillator
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
V2 B 0 -10
R4 N003 0 10k
C1 N002 N004 10n
V1 A 0 10
XU2 N003 N001 A B N002 LT1001 ;pnba In+)In-)V+)V-)OUT
C2 0 N003 10n
R1 0 N001 10k
R2 N002 N001 20k
R3 N004 N003 10k
.tran 10ms startup
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 0 32 0
WIRE 32 16 32 0
WIRE 80 32 80 0
WIRE -256 112 -256 64
WIRE -144 112 -144 64
WIRE 240 112 80 112
WIRE 80 160 80 112
WIRE 128 160 80 160
WIRE 320 176 320 112
WIRE 320 176 192 176
WIRE 128 192 112 192
WIRE -256 208 -256 192
WIRE -144 208 -144 192
WIRE 48 272 0 272
WIRE 112 272 112 192
WIRE 112 272 48 272
WIRE 144 272 112 272
WIRE 240 272 224 272
WIRE 320 272 320 176
WIRE 320 272 304 272
WIRE 0 352 0 336
WIRE 48 352 0 352
WIRE 48 400 48 352
SYMBOL res 336 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 20k
SYMBOL Opamps\\LT1001 160 112 R0
SYMATTR InstName U2
SYMBOL cap 16 336 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 240 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL voltage -256 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value -10
SYMBOL res 32 256 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL cap 304 256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 64 16 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -144 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 10
FLAG 160 144 A
FLAG 32 16 0
FLAG 48 400 0
FLAG -144 208 0
FLAG -144 64 A
FLAG -256 64 B
FLAG 160 208 B
FLAG -256 208 0
TEXT -272 272 Left 2 !.tran 10ms startup
TEXT -136 -64 Left 4 ;Wien oscillator
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3008-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3008-2.5.asy)
XU1 IN OUT OUT 0 IN LT3008-2.5 ;pnba IN)OUT)Sense)GND)_SHDN
V1 IN 0 PWL(0 0 1 10)
Rload OUT 0 250
C1 OUT 0 1
.tran 1
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL PowerProducts\\LT3008-2.5 176 96 R0
SYMATTR InstName U1
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 250
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 336 248 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1084-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1084-3.3.asy)
C1 OUT 0 10
XU1 0 OUT IN LT1084-3.3 ;pnba GND)OUT)IN
Rload OUT 0 10
V1 IN 0 PWL(0 0 1 10) Rser=0.1
.tran 1
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1344 896
WIRE 1872 896 1808 896
WIRE 2000 896 1872 896
WIRE 1344 912 1344 896
WIRE 1872 912 1872 896
WIRE 2000 912 2000 896
WIRE 1344 1008 1344 992
WIRE 1872 1008 1872 976
WIRE 2000 1008 2000 992
WIRE 1680 1024 1680 992
SYMBOL RES 1984 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL PowerProducts\\LT1084-3.3 1680 896 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1344 896 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMATTR SpiceLine Rser=0.1
SYMBOL cap 1856 912 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 2000 896 OUT
FLAG 2000 1008 0
FLAG 1344 1008 0
FLAG 1872 1008 0
FLAG 1344 896 IN
FLAG 1680 1024 0
TEXT 1960 1064 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\0544a8b8304e_calculs_amplification_2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
V4 N004 0 8
R3 N006 N005 22k
R2 N002 N001 8k
V5 N003 0 SINE(1.024 1.024 1)
XU3 N005 N001 N004 N007 N002 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V3 0 N007 10
V1 N006 0 3.3
R4 N005 0 8350
R1 N001 N003 1k
.tran 10
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE 368 -32 320 -32
WIRE 592 -32 448 -32
WIRE 144 48 144 -64
WIRE 192 48 144 48
WIRE 320 48 320 -32
WIRE 320 48 272 48
WIRE 912 80 432 80
WIRE 432 112 432 80
WIRE 320 128 320 48
WIRE 400 128 320 128
WIRE 592 144 592 -32
WIRE 592 144 464 144
WIRE 912 144 912 80
WIRE 400 160 224 160
WIRE 48 192 -128 192
WIRE 224 192 224 160
WIRE 224 192 128 192
WIRE -128 208 -128 192
WIRE 224 224 224 192
WIRE 912 272 912 224
WIRE 912 272 832 272
WIRE 832 288 832 272
WIRE 912 320 912 272
WIRE 432 464 432 176
WIRE 912 464 912 400
WIRE 912 464 432 464
SYMBOL voltage 912 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL res 288 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL OpAmps\\UniversalOpAmp 432 144 R0
SYMATTR InstName U3
SYMBOL voltage 912 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 8
SYMBOL res 32 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 22k
SYMBOL res 464 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 8k
SYMBOL res 208 208 R0
SYMATTR InstName R4
SYMATTR Value 8350
SYMBOL voltage 144 -48 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value SINE(1.024 1.024 1)
SYMBOL voltage -128 192 R0
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG 224 304 0
FLAG -128 288 0
FLAG 144 -144 0
FLAG 832 288 0
TEXT -160 328 Left 2 !.tran 10
* Z:\home\khalils\Downloads\files\data\raw_asc\16ad8f61cd3b_NOR.asc
* Generated by LTspice 26.0.1 for Windows.
M4 Vdd B N001 Vdd PMOS l=0.6u w=6u
V2 A 0 PULSE(5 0 0 60ps 60ps 2ns 4ns)
M1 out A 0 0 NMOS l=0.6u w=3u
M2 out B 0 0 NMOS l=0.6u w=3u
M3 N001 A out Vdd PMOS l=0.6u w=6u
V3 B 0 PULSE(5 0 0 60ps 60ps 4ns 8ns)
V1 Vdd 0 5v
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 20ns 0 0.001ns
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 964 680
WIRE 384 -320 384 -384
WIRE 384 -320 192 -320
WIRE 560 -320 384 -320
WIRE 192 -240 192 -320
WIRE 560 -224 560 -320
WIRE 384 -160 240 -160
WIRE 192 -80 192 -144
WIRE 560 -32 560 -144
WIRE 144 0 -16 0
WIRE 640 16 192 16
WIRE 192 64 192 16
WIRE 192 64 80 64
WIRE 288 64 192 64
WIRE 80 96 80 64
WIRE 288 96 288 64
WIRE -64 176 -64 144
WIRE -16 176 -16 0
WIRE -16 176 -64 176
WIRE 32 176 -16 176
WIRE 384 176 384 -160
WIRE 384 176 336 176
WIRE 560 176 560 144
WIRE 560 176 384 176
WIRE -64 208 -64 176
WIRE 560 208 560 176
WIRE -64 320 -64 288
WIRE 80 320 80 192
WIRE 80 320 -64 320
WIRE 192 320 80 320
WIRE 288 320 288 192
WIRE 288 320 192 320
WIRE 560 320 560 288
WIRE 560 320 288 320
WIRE 192 368 192 320
SYMBOL voltage -64 192 R0
WINDOW 3 -55 -157 VRight 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(5 0 0 60ps 60ps 2ns 4ns)
SYMATTR InstName V2
SYMBOL voltage 560 192 R0
WINDOW 3 73 -165 VRight 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(5 0 0 60ps 60ps 4ns 8ns)
SYMATTR InstName V3
SYMBOL nmos4 336 96 M0
WINDOW 0 55 6 Left 2
WINDOW 3 56 84 Left 2
SYMATTR InstName M2
SYMATTR Value2 l=0.6u w=3u
SYMBOL nmos4 32 96 R0
WINDOW 0 56 6 Left 2
WINDOW 3 54 85 Left 2
SYMATTR InstName M1
SYMATTR Value2 l=0.6u w=3u
SYMBOL pmos4 240 -240 M0
WINDOW 0 56 13 Left 2
WINDOW 3 56 83 Left 2
SYMATTR InstName M4
SYMATTR Value2 l=0.6u w=6u
SYMBOL voltage 560 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5v
SYMBOL pmos4 144 -80 R0
WINDOW 0 59 5 Left 2
WINDOW 3 56 82 Left 2
SYMATTR InstName M3
SYMATTR Value2 l=0.6u w=6u
FLAG 192 368 0
FLAG 560 -32 0
FLAG 384 -384 Vdd
FLAG 192 -192 Vdd
FLAG 192 -32 Vdd
FLAG 80 144 0
FLAG 288 144 0
FLAG 640 16 out
FLAG -64 144 A
FLAG 560 144 B
TEXT -96 392 Left 2 !.tran 0 20ns 0 0.001ns
* Z:\home\khalils\Downloads\files\data\raw_asc\1af8a85453be_Flash_cells_parasitic_R.asc
* Generated by LTspice 26.0.1 for Windows.
M1 VDD 0 0 0 N750 l=50n w=150n
R1 P001 0 100k
M2 VDD 0 P001 0 N750 l=50n w=150n
VDD VDD 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include flash_models.txt
.dc VDD 0 1 100u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2620 680
WIRE 432 -1520 432 -1552
WIRE 704 -1472 704 -1552
WIRE 960 -1472 960 -1552
WIRE 752 -1424 704 -1424
WIRE 1056 -1424 960 -1424
WIRE 432 -1408 432 -1440
WIRE 656 -1392 640 -1392
WIRE 912 -1392 896 -1392
WIRE 640 -1344 640 -1392
WIRE 704 -1344 704 -1376
WIRE 752 -1344 752 -1424
WIRE 896 -1344 896 -1392
WIRE 1056 -1344 1056 -1424
WIRE 960 -1280 960 -1296
SYMBOL nmos4 912 -1472 R0
WINDOW 0 64 -33 Left 0
WINDOW 3 65 -6 Left 0
WINDOW 123 65 19 Left 0
SYMATTR InstName M2
SYMATTR Value N750
SYMATTR Value2 l=50n w=150n
SYMBOL res 944 -1392 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL nmos4 656 -1472 R0
WINDOW 0 64 -33 Left 0
WINDOW 3 65 -6 Left 0
WINDOW 123 65 19 Left 0
SYMATTR InstName M1
SYMATTR Value N750
SYMATTR Value2 l=50n w=150n
SYMBOL voltage 432 -1536 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 40 53 Left 0
SYMATTR Value 1
SYMATTR InstName VDD
FLAG 432 -1408 0
FLAG 432 -1552 VDD
FLAG 704 -1344 0
FLAG 640 -1344 0
FLAG 752 -1344 0
FLAG 704 -1552 VDD
FLAG 960 -1280 0
FLAG 896 -1344 0
FLAG 1056 -1344 0
FLAG 960 -1552 VDD
TEXT 344 -1304 Left 0 !.include flash_models.txt
TEXT 344 -1368 Left 0 !.dc VDD 0 1 100u
* Z:\tmp\asc_dec_bjh7r6w2\0834349f129f_LTC1043_ltspice_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R2 W1 N002 1k
R1 N002 N001 1k
V1 W1 0 SINE(0 1 250k)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -368 -304 -400 -304
WIRE -176 -304 -288 -304
WIRE -256 -208 -256 -224
WIRE -176 -192 -176 -304
WIRE -176 -192 -224 -192
WIRE -128 -192 -176 -192
WIRE -400 -176 -400 -304
WIRE -400 -176 -480 -176
WIRE -288 -176 -400 -176
WIRE -176 -160 -224 -160
WIRE -256 -128 -256 -144
WIRE -1472 -112 -1472 -128
WIRE -176 -112 -176 -160
WIRE -1312 -96 -1312 -112
WIRE -1472 0 -1472 -32
WIRE -1312 16 -1312 -16
SYMBOL res -32 -208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res -272 -320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -1312 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 250k)
FLAG -1312 16 0
FLAG -1312 -112 W1
FLAG -176 -112 0
FLAG -1472 0 0
FLAG -1472 -128 V-
FLAG -48 -192 W1
FLAG -256 -128 V-
FLAG -256 -224 V+
* Z:\home\khalils\Downloads\files\data\raw_asc\04f4281e996b_AD8667.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8667.asy)
Vin IN 0 SINE(0 1 10K)
R2 OUT N001 10K
V1 +V 0 5
XU1 IN N001 +V -V OUT AD8667 ;pnba In+)In-)V+)V-)OUT
Rload OUT 0 10K
R1 N001 0 10K
V2 -V 0 -5
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 592 -976 576 -976
WIRE 688 -976 672 -976
WIRE 704 -976 688 -976
WIRE 800 -976 784 -976
WIRE 336 -880 336 -896
WIRE 432 -880 432 -896
WIRE 688 -864 688 -976
WIRE 704 -864 688 -864
WIRE 800 -848 800 -976
WIRE 800 -848 768 -848
WIRE 928 -848 800 -848
WIRE 704 -832 592 -832
WIRE 928 -832 928 -848
WIRE 592 -816 592 -832
WIRE 336 -784 336 -800
WIRE 432 -784 432 -800
WIRE 928 -736 928 -752
WIRE 592 -720 592 -736
SYMBOL Opamps\\AD8667 736 -912 R0
SYMATTR InstName U1
SYMBOL res 912 -848 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 336 -896 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 800 -992 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 432 -896 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 592 -832 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 688 -992 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 336 -896 +V
FLAG 336 -784 0
FLAG 592 -720 0
FLAG 928 -848 OUT
FLAG 592 -832 IN
FLAG 736 -880 +V
FLAG 432 -896 -V
FLAG 736 -816 -V
FLAG 576 -976 0
FLAG 928 -736 0
FLAG 432 -784 0
TEXT 848 -696 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1150.asc
* Generated by LTspice 26.0.1 for Windows.
* Single Supply Instrumentation Amplifier
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC1150.asy)
R2 N001 0 1Meg
XU1 IN- N001 +V 0 N002 LTC1150 ;pnba In+)In-)V+)V-)OUT
V3 IN- IN+ SINE(-7.5m 1m 100)
V2 IN+ 0 SINE(7.5 1 10)
XU2 IN+ N003 +V 0 OUT LTC1150 ;pnba In+)In-)V+)V-)OUT
R3 N003 N002 1K
R4 OUT N003 1Meg
R1 N002 N001 1K
V1 +V 0 15
.tran .3
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 160 96 128 96
WIRE 272 96 240 96
WIRE 416 96 400 96
WIRE 512 96 496 96
WIRE -96 112 -96 96
WIRE -96 208 -96 192
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 448 224 448 208
WIRE 272 240 272 96
WIRE 272 240 224 240
WIRE 304 240 272 240
WIRE 400 240 400 96
WIRE 400 240 384 240
WIRE 416 240 400 240
WIRE 112 256 -16 256
WIRE 160 256 112 256
WIRE 512 256 512 96
WIRE 512 256 480 256
WIRE 576 256 512 256
WIRE -16 272 -16 256
WIRE 416 272 400 272
WIRE 192 288 192 272
WIRE 448 304 448 288
WIRE -16 384 -16 352
WIRE 352 384 -16 384
WIRE 400 384 400 272
WIRE 400 384 352 384
WIRE -16 400 -16 384
WIRE -16 496 -16 480
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL voltage -96 96 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 512 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL opamps\\LTC1150 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -16 384 R0
WINDOW 3 26 93 Left 2
SYMATTR Value SINE(7.5 1 10)
SYMATTR InstName V2
SYMBOL res 400 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL opamps\\LTC1150 448 192 R0
SYMATTR InstName U2
SYMBOL voltage -16 256 R0
WINDOW 0 24 24 Left 2
WINDOW 3 24 94 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(-7.5m 1m 100)
FLAG -96 208 0
FLAG 192 192 +V
FLAG -96 96 +V
FLAG 16 96 0
FLAG -16 496 0
FLAG 448 208 +V
FLAG 576 256 OUT
FLAG 192 288 0
FLAG 448 304 0
FLAG 112 256 IN-
FLAG 352 384 IN+
TEXT 432 416 Left 2 !.tran .3
TEXT 304 48 Bottom 2 ;Single Supply Instrumentation Amplifier