Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\31b759698308_BridgeRectifier.asc
* Generated by LTspice 26.0.1 for Windows.
D2 0 N001 D
D3 0 Vin D
V1 Vin N001 SINE(0 5 1K)
R1 0 Vout 1k
D1 Vin Vout D
D4 N001 Vout D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m
.model D D(Ron=0 Roff=100G Vfwd=0)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1176 680
WIRE 512 -128 464 -128
WIRE 640 -128 592 -128
WIRE 304 -16 160 -16
WIRE 352 -16 304 -16
WIRE 464 -16 464 -128
WIRE 464 -16 416 -16
WIRE 304 32 304 -16
WIRE 464 32 464 -16
WIRE 160 112 160 -16
WIRE 304 144 304 96
WIRE 352 144 304 144
WIRE 464 144 464 96
WIRE 464 144 416 144
WIRE 304 208 304 144
WIRE 640 208 640 -128
WIRE 640 208 304 208
WIRE 640 240 640 208
WIRE 160 320 160 192
WIRE 464 320 464 144
WIRE 464 320 160 320
SYMBOL diode 352 0 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL diode 480 96 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMBOL res 608 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 352 160 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL Misc\\signal 160 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -10 99 Right 2
SYMATTR Value SINE(0 5 1K)
SYMATTR InstName V1
SYMBOL diode 320 96 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
FLAG 464 -128 Vout
FLAG 160 -16 Vin
FLAG 640 240 0
TEXT 728 -56 Left 2 !.tran 5m
TEXT 712 0 Left 2 !.model D D(Ron=0 Roff=100G Vfwd=0)
* Z:\tmp\asc_dec_bjh7r6w2\119f7e297169_Filter02_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
RL o 0 {RL}
XU1 0 N001 Vpp Vnn o level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 Vpp 0 {Vs}
R2 o N001 {R2}
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE 144 64 64 64
WIRE 320 64 224 64
WIRE 64 128 64 64
WIRE 64 128 -16 128
WIRE 512 144 464 144
WIRE 464 160 464 144
WIRE 512 176 512 144
WIRE 64 208 64 128
WIRE 128 208 64 208
WIRE 320 224 320 64
WIRE 320 224 192 224
WIRE 128 240 64 240
WIRE 320 256 320 224
WIRE 64 288 64 240
WIRE 320 368 320 336
SYMBOL res 304 240 R0
SYMATTR InstName RL
SYMATTR Value {RL}
SYMBOL Opamps\\UniversalOpamp2 160 224 R0
SYMATTR InstName U1
SYMBOL voltage 512 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vs}
SYMBOL res 240 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R2}
FLAG 512 64 Vpp
FLAG 464 160 0
FLAG 320 368 0
FLAG 160 192 Vpp
FLAG 160 256 Vnn
FLAG 64 288 0
FLAG 320 224 o
* Z:\home\khalils\Downloads\files\data\raw_asc\2eb9a2fc9221_hw7_prob4.asc
* Generated by LTspice 26.0.1 for Windows.
* Phasor-domain testbench schematic for checking your work on Problem 4:\n \nuse the .ac results report to verify your phasor-domain work; the results\nlisted in the report are given in polar format, i.e., magnitude and phase\n \nV(vout) in the report is the phasor voltage Vout (Vo in the assignment)\n \nthere is nothing to plot for this verification testbench\n \nthe capacitor value is chosen to give the impedance listed in Problem 4\nat an angular frequency of 50 rps; note that there is nothing particularly\nspecial about 50 rps, but I needed to choose something for ac simulation\npurposes; 50 rps angular frequency of operation for this testbench is \n50/(2*pi) ~ 7.9578 Hz
I1 0 N001 0 AC 5 30
R2 vout N001 1
R1 N001 0 15
C1 vout 0 1.6667m
.options plotwinsize=0 numdgt=15 measdgt=15
.ac list {50/(2*pi)}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1040 692
WIRE -176 -80 -384 -80
WIRE -112 -80 -176 -80
WIRE 0 -80 -32 -80
WIRE 16 -80 0 -80
WIRE -384 -32 -384 -80
WIRE -176 -32 -176 -80
WIRE 16 -16 16 -80
WIRE -384 128 -384 48
WIRE -208 128 -384 128
WIRE -176 128 -176 48
WIRE -176 128 -208 128
WIRE 16 128 16 48
WIRE 16 128 -176 128
WIRE -208 160 -208 128
SYMBOL current -176 48 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 24 52 Left 2
SYMATTR InstName I1
SYMATTR Value 0
SYMATTR Value2 AC 5 30
SYMBOL cap 0 -16 R0
SYMATTR InstName C1
SYMATTR Value 1.6667m
SYMBOL res -400 -48 R0
SYMATTR InstName R1
SYMATTR Value 15
SYMBOL res -16 -96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
FLAG -208 160 0
FLAG 0 -80 vout
TEXT -432 304 Left 2 !.options plotwinsize=0 numdgt=15 measdgt=15\n.ac list {50/(2*pi)}
TEXT -544 -648 Left 2 ;Phasor-domain testbench schematic for checking your work on Problem 4:\n \nuse the .ac results report to verify your phasor-domain work; the results\nlisted in the report are given in polar format, i.e., magnitude and phase\n \nV(vout) in the report is the phasor voltage Vout (Vo in the assignment)\n \nthere is nothing to plot for this verification testbench\n \nthe capacitor value is chosen to give the impedance listed in Problem 4\nat an angular frequency of 50 rps; note that there is nothing particularly\nspecial about 50 rps, but I needed to choose something for ac simulation\npurposes; 50 rps angular frequency of operation for this testbench is \n50/(2*pi) ~ 7.9578 Hz
* Z:\tmp\asc_dec_bjh7r6w2\17cb0f6cf0e3_current-sensing-common-mode_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N004 0 10
R3 N002 N001 200
R4 N004 N003 200
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 496 32 272 32
WIRE 112 48 -112 48
WIRE 112 80 112 48
WIRE 176 80 112 80
WIRE 272 80 272 32
WIRE 272 80 256 80
WIRE 112 96 112 80
WIRE 336 96 336 80
WIRE 272 112 272 80
WIRE 304 112 272 112
WIRE 304 144 272 144
WIRE 112 192 112 176
WIRE 176 192 112 192
WIRE 272 192 272 144
WIRE 272 192 256 192
WIRE 336 208 336 160
WIRE 112 256 112 192
WIRE 336 304 336 288
WIRE 112 352 112 336
SYMBOL res 96 240 R0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL res 160 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 200
SYMBOL res 160 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 200
FLAG 112 352 0
FLAG 336 304 0
FLAG 336 80 0
* Z:\home\khalils\Downloads\files\data\raw_asc\136dca42c4fa_Fig1_16.asc
* Generated by LTspice 26.0.1 for Windows.
R2 Vout 0 2k
Vin Vin 0 1
R1 Vin Vout 1k
.dc Vin 0 1 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 48 224 0 224
WIRE 112 224 48 224
WIRE 256 224 192 224
WIRE 288 224 256 224
WIRE 0 240 0 224
WIRE 288 240 288 224
WIRE 0 336 0 320
WIRE 288 336 288 320
SYMBOL res 96 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 272 224 R0
SYMATTR InstName R2
SYMATTR Value 2k
SYMBOL voltage 0 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 1
FLAG 0 336 0
FLAG 288 336 0
FLAG 256 224 Vout
FLAG 48 224 Vin
TEXT 40 400 Left 0 !.dc Vin 0 1 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6411.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6411.asy)
V1 +V 0 5
V2 -V 0 -5
XU1 -V OUTG +V OUTR 0 0 N001 0 0 N001 LT6411 ;pnba Vee)OUT2)Vcc)OUT1)_EN)DGND)IN1+)IN1-)IN2-)IN2+
R1 0 OUTR 150
V3 N001 0 SIN(0 1 10Meg)
.tran 1u
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 912 868
WIRE 368 432 368 400
WIRE -80 480 -80 464
WIRE 32 480 32 464
WIRE 272 480 192 480
WIRE 608 496 464 496
WIRE 656 496 608 496
WIRE 608 512 608 496
WIRE 272 528 256 528
WIRE 256 544 256 528
WIRE 256 544 240 544
WIRE 256 560 256 544
WIRE 272 560 256 560
WIRE -80 576 -80 560
WIRE 32 576 32 560
WIRE 496 592 464 592
WIRE 192 608 192 480
WIRE 272 608 192 608
WIRE 608 608 608 592
WIRE 192 656 192 608
WIRE 304 672 304 656
WIRE 368 672 368 656
WIRE 368 672 304 672
WIRE 432 672 432 656
WIRE 368 688 368 672
WIRE 192 768 192 736
SYMBOL LT6411 368 528 R0
SYMATTR InstName U1
SYMBOL res 592 608 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 150
SYMBOL voltage -80 464 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 192 640 R0
SYMATTR Value SIN(0 1 10Meg)
SYMATTR InstName V3
SYMBOL voltage 32 464 R0
SYMATTR InstName V2
SYMATTR Value -5
FLAG -80 576 0
FLAG 32 576 0
FLAG 368 400 +V
FLAG 368 688 0
FLAG 192 768 0
FLAG 656 496 OUTR
FLAG 496 592 OUTG
FLAG 608 608 0
FLAG -80 464 +V
FLAG 32 464 -V
FLAG 432 672 -V
FLAG 240 544 0
TEXT 496 688 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\ec94c09a04c4_diode_brige_rectifier_bb.asc
* Generated by LTspice 26.0.1 for Windows.
* Diode Bridge Rectifier
D2 CA-V N002 1N914
D4 N003 N002 1N914
V1 N003 0 2.5
R1 N002 N001 100
D3 N001 N003 1N914
D1 N001 CA-V 1N914
V2 CA-V 0 SINE(2.5 2.5 100)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 64 -144 64
WIRE -144 128 -144 64
WIRE 128 128 112 128
WIRE 224 128 224 64
WIRE 224 128 192 128
WIRE 240 128 224 128
WIRE 320 128 304 128
WIRE 112 224 112 128
WIRE 176 224 112 224
WIRE 320 224 320 128
WIRE 320 224 256 224
WIRE 112 320 112 224
WIRE 128 320 112 320
WIRE 208 320 192 320
WIRE 240 320 208 320
WIRE 320 320 320 224
WIRE 320 320 304 320
WIRE 208 384 208 320
SYMBOL diode 128 336 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D3
SYMATTR Value 1N914
SYMBOL voltage 208 368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage -144 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(2.5 2.5 100)
SYMBOL diode 128 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL res 272 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL diode 240 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL diode 240 336 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D4
SYMATTR Value 1N914
FLAG 208 464 0
FLAG -144 208 0
FLAG -144 64 CA-V
TEXT 24 8 Left 2 ;Diode Bridge Rectifier
TEXT -188 488 Left 2 !.tran 2m
* Z:\home\khalils\Downloads\files\data\raw_asc\f41f9ae4d06a_HW2_4109061012.asc
* Generated by LTspice 26.0.1 for Windows.
+ LD=0.08e-6 UO=350 LAMBDA=0.1 TOX=9e-9 PB=0.9 CJ=0.56e-3 CJSW=0.35e-11
+ MJ=0.45 MJSW=0.2 CGDO=0.4e-9 JS=1.0e-8)
;.dc VDD 1.62 1.98 0.01
;.ac dec 100 1 1G
;.tran 5ms
RL Vout 0 50
Rx VDD N001 9k
Vin Vin 0 SINE(0.76 0.04 6.283e3) AC 1 0
VDD VDD 0 1.8
M2 VDD N001 Vout Vout NMOS l=0.5u w=1949u
M1 N001 Vin 0 0 NMOS l=0.5u w=61u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model NMOS NMOS (LEVEL=1 VTO=0.7 GAMMA=0.45 PHI=0.9 NSUB=9e+14
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1840 944
WIRE 368 16 112 16
WIRE 672 16 368 16
WIRE 112 96 112 16
WIRE 368 160 368 16
WIRE 448 208 368 208
WIRE 112 240 112 176
WIRE 320 240 112 240
WIRE 672 256 672 16
WIRE 368 288 368 256
WIRE 448 288 448 208
WIRE 448 288 368 288
WIRE 112 304 112 240
WIRE 176 352 112 352
WIRE 368 368 368 288
WIRE 496 368 368 368
WIRE 64 384 -16 384
WIRE 112 432 112 400
WIRE 176 432 176 352
WIRE 176 432 112 432
WIRE 368 448 368 368
WIRE -16 464 -16 384
WIRE -16 608 -16 544
WIRE 112 608 112 432
WIRE 368 608 368 528
WIRE 672 608 672 336
IOPIN 496 368 Out
IOPIN -16 384 In
DATAFLAG 448 368 ""
DATAFLAG 16 384 ""
SYMBOL voltage 672 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1.8
SYMBOL res 352 432 R0
SYMATTR InstName RL
SYMATTR Value 50
SYMBOL nmos4 320 160 R0
SYMATTR InstName M2
SYMATTR Value2 l=0.5u w=1949u
SYMBOL voltage -16 448 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1 0
SYMATTR InstName Vin
SYMATTR Value SINE(0.76 0.04 6.283e3)
SYMBOL res 96 80 R0
SYMATTR InstName Rx
SYMATTR Value 9k
SYMBOL nmos4 64 304 R0
SYMATTR InstName M1
SYMATTR Value2 l=0.5u w=61u
FLAG 496 368 Vout
FLAG 368 608 0
FLAG 112 608 0
FLAG -16 384 Vin
FLAG 672 608 0
FLAG -16 608 0
FLAG 368 16 VDD
TEXT 800 384 Left 2 !.model NMOS NMOS (LEVEL=1 VTO=0.7 GAMMA=0.45 PHI=0.9 NSUB=9e+14 \n+ LD=0.08e-6 UO=350 LAMBDA=0.1 TOX=9e-9 PB=0.9 CJ=0.56e-3 CJSW=0.35e-11 \n+ MJ=0.45 MJSW=0.2 CGDO=0.4e-9 JS=1.0e-8)
TEXT 800 192 Left 2 !;.dc VDD 1.62 1.98 0.01
TEXT 800 240 Left 2 !;.ac dec 100 1 1G
TEXT 800 288 Left 2 !;.tran 5ms
* Z:\home\khalils\Downloads\files\data\raw_asc\ADGS5414.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
V3 N001 0 10
V4 N003 0 pulse(0 5 0 20n 20n 10u 20u)
R1 N002 0 300
C1 N002 0 35p
XU1 N003 N002 N001 -V 0 +V ADGS5414 ;pnba IN)D)S)Vss)GND)Vdd
.tran 0.0001
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADGS5414.asy)
.lib ADGS5414.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -528 -32 -528 -48
WIRE -368 -16 -400 -16
WIRE -240 -16 -288 -16
WIRE 48 -16 -48 -16
WIRE 160 -16 48 -16
WIRE 48 16 48 -16
WIRE 160 32 160 -16
WIRE -240 48 -368 48
WIRE -528 64 -528 48
WIRE -368 112 -368 48
WIRE 48 112 48 96
WIRE 160 112 160 96
WIRE -528 160 -528 144
WIRE -192 176 -192 160
WIRE -96 176 -96 160
WIRE -528 256 -528 240
WIRE -368 272 -368 192
FLAG -528 256 0
FLAG -528 64 0
FLAG -528 -48 +V
FLAG -528 144 -V
FLAG -400 -16 0
FLAG -192 176 -V
FLAG -144 -112 +V
FLAG -96 176 0
FLAG -368 272 0
FLAG 48 112 0
FLAG 160 112 0
SYMBOL voltage -528 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -528 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -272 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL voltage -368 96 R0
WINDOW 3 30 136 Left 2
SYMATTR Value pulse(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V4
SYMBOL res 32 0 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL cap 144 32 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL ADGS5414 -144 32 R0
SYMATTR InstName U1
TEXT -344 264 Left 2 !.tran 0.0001
* Z:\tmp\asc_dec_bjh7r6w2\0fa32e6727b3_Draft14_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
XU3 VIN N001 +V -V V1 OP482 ;pnba In+)In-)V+)V-)OUT
R4 N002 0 1K
V2 0 -V 9
C1 V2 0 1n
V1 +V 0 9
* Library below included based on ModelFile attribute of instance XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP482.asy)
.lib OP482.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE -112 -128 -128 -128
WIRE 0 -128 -32 -128
WIRE 32 -128 0 -128
WIRE 656 -128 112 -128
WIRE 64 16 64 -16
WIRE 0 32 0 -128
WIRE 32 32 0 32
WIRE -368 48 -368 16
WIRE 224 48 96 48
WIRE 464 48 448 48
WIRE 496 48 464 48
WIRE 656 48 656 -128
WIRE 656 48 576 48
WIRE 32 64 -48 64
WIRE 64 112 64 80
WIRE -368 144 -368 128
WIRE -368 144 -416 144
WIRE -368 160 -368 144
WIRE 528 192 528 160
WIRE 464 208 464 48
WIRE 496 208 464 208
WIRE 656 224 656 48
WIRE 656 224 560 224
WIRE 800 224 656 224
WIRE 912 224 800 224
WIRE 224 240 224 48
WIRE -368 272 -368 240
WIRE 800 288 800 224
WIRE 912 304 912 224
WIRE 800 384 800 368
WIRE 912 384 912 368
WIRE 912 384 800 384
WIRE 800 400 800 384
SYMBOL OpAmps\\OP482 64 -16 R0
SYMATTR InstName U3
SYMBOL res 464 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL voltage -368 144 R0
SYMATTR InstName V2
SYMATTR Value 9
SYMBOL cap 896 304 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL voltage -368 32 R0
SYMATTR InstName V1
SYMATTR Value 9
FLAG -416 144 0
FLAG -368 16 +V
FLAG -368 272 -V
FLAG 64 112 -V
FLAG 64 -16 +V
FLAG 528 160 +V
FLAG -48 64 VIN
FLAG -128 -128 0
FLAG 224 48 V1
FLAG 656 224 V2
FLAG 368 48 0
FLAG 800 400 0
* Z:\home\khalils\Downloads\files\data\raw_asc\wavein.asc
* Generated by LTspice 26.0.1 for Windows.
V1 X 0 wavefile=.\ring.wav chan=0
.tran .5
* This example schematic is supplied for informational/educational purposes only.
* This demonstrates using a .wav file into an LTspice simulation.
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2236 1128
WIRE 1184 896 1184 864
WIRE 1184 1008 1184 976
FLAG 1184 1008 0
FLAG 1184 864 X
SYMBOL VOLTAGE 1184 880 R0
SYMATTR InstName V1
SYMATTR Value wavefile=.\ring.wav chan=0
TEXT 1264 1048 Left 2 !.tran .5
TEXT 1288 1096 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT 976 792 Left 2 ;This demonstrates using a .wav file into an LTspice simulation.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1706-63.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1706-63.asy)
V5 N005 0 PULSE(0 2.4 0 1n 1n 2m 4m)
V4 N003 0 PULSE(0 2.4 0 1n 1n 1m 2m)
V1 N001 0 3.3
G1 0 OUT N007 N004 1
V7 N008 0 PULSE(0 2.4 0 1n 1n 8m 16m)
V2 N007 0 .6
XU1 N005 N006 N001 0 N004 OUT N002 N003 N008 LTC1706-63 ;pnba VID2)VID3)Vcc)GND)FB)Sense)VID0)VID1)VID4
V3 N002 0 PULSE(0 2.4 0 1n 1n .5m 1m)
V6 N006 0 PULSE(0 2.4 0 1n 1n 4m 8m)
C1 OUT 0 .1
.tran 16m
.lib LTC1706-63.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2536 1332
WIRE 944 720 864 720
WIRE 1328 720 944 720
WIRE 864 736 864 720
WIRE 1168 784 1008 784
WIRE 1008 800 1008 784
WIRE 864 816 864 800
WIRE 1168 816 1168 784
WIRE 1328 816 1328 720
WIRE 1856 880 1392 880
WIRE 1008 896 1008 880
WIRE 1856 896 1856 880
WIRE 1744 928 1392 928
WIRE 1744 960 1744 928
WIRE 1104 976 992 976
WIRE 1632 976 1392 976
WIRE 944 992 944 720
WIRE 1856 992 1856 976
WIRE 992 1008 992 976
WIRE 1632 1008 1632 976
WIRE 1536 1024 1392 1024
WIRE 1536 1056 1536 1024
WIRE 1744 1056 1744 1040
WIRE 992 1072 992 1056
WIRE 1440 1072 1392 1072
WIRE 1632 1104 1632 1088
WIRE 1440 1120 1440 1072
WIRE 1248 1136 1248 1120
WIRE 1536 1152 1536 1136
WIRE 944 1184 944 1072
WIRE 992 1184 992 1152
WIRE 1440 1216 1440 1200
SYMBOL voltage 1440 1104 R0
SYMATTR InstName V7
SYMATTR Value PULSE(0 2.4 0 1n 1n 8m 16m)
SYMBOL g2 944 976 M0
SYMATTR InstName G1
SYMATTR Value 1
SYMBOL PowerProducts\\LTC1706-63 1248 976 R0
SYMATTR InstName U1
SYMBOL voltage 1856 880 R0
SYMATTR InstName V3
SYMATTR Value PULSE(0 2.4 0 1n 1n .5m 1m)
SYMBOL voltage 1632 992 R0
SYMATTR InstName V5
SYMATTR Value PULSE(0 2.4 0 1n 1n 2m 4m)
SYMBOL voltage 1008 784 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap 848 736 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage 992 1056 R0
SYMATTR InstName V2
SYMATTR Value .6
SYMBOL voltage 1536 1040 R0
SYMATTR InstName V6
SYMATTR Value PULSE(0 2.4 0 1n 1n 4m 8m)
SYMBOL voltage 1744 944 R0
SYMATTR InstName V4
SYMATTR Value PULSE(0 2.4 0 1n 1n 1m 2m)
FLAG 1008 896 0
FLAG 1248 1136 0
FLAG 992 1184 0
FLAG 944 1184 0
FLAG 1856 992 0
FLAG 1744 1056 0
FLAG 1632 1104 0
FLAG 1536 1152 0
FLAG 864 816 0
FLAG 864 720 OUT
FLAG 1440 1216 0
TEXT 1912 1184 Left 2 !.tran 16m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1584-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1584-3.3.asy)
Rload OUT 0 500
C1 OUT 0 22
V1 IN 0 PWL(0 0 1 10)
XU1 0 OUT IN LT1584-3.3 ;pnba GND)OUT)IN
.tran 1
.lib LT1584.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 176 -160 176
WIRE 384 176 288 176
WIRE 480 176 384 176
WIRE -160 192 -160 176
WIRE 384 192 384 176
WIRE 480 192 480 176
WIRE -160 288 -160 272
WIRE 384 288 384 256
WIRE 480 288 480 272
WIRE 160 304 160 272
SYMBOL cap 368 192 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 464 176 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL voltage -160 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL PowerProducts\\LT1584-3.3 160 176 R0
SYMATTR InstName U1
FLAG -160 288 0
FLAG 384 288 0
FLAG 480 288 0
FLAG 160 304 0
FLAG -160 176 IN
FLAG 480 176 OUT
TEXT 320 336 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ee5c0a9b03eb_1116.asc
* Generated by LTspice 26.0.1 for Windows.
* Single Supply Crystal Oscillator 10MHz to 15MHz
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1116.asy)
R2 +V N003 1K
XU2 +V N003 N001 0 0 0 N002 OUT LT1116 ;pnba V+)In+)In-)V-)LATCH)GND)OUT+)OUT-
R1 N002 N001 2K
CY1 N002 N003 .32p Rser=45 Lser=.78m Cpar=18p
V1 +V 0 5
C1 N001 0 24p
R3 N003 0 1K
.tran 50u startup
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -240 80 -256 80
WIRE -160 80 -176 80
WIRE -112 80 -160 80
WIRE 32 80 -32 80
WIRE -304 160 -304 144
WIRE -432 192 -432 176
WIRE -96 192 -96 160
WIRE -160 224 -160 80
WIRE -128 224 -160 224
WIRE 32 224 32 80
WIRE 32 224 -48 224
WIRE -304 256 -304 240
WIRE -192 256 -304 256
WIRE -128 256 -192 256
WIRE 64 256 -48 256
WIRE -304 272 -304 256
WIRE -432 288 -432 272
WIRE -112 304 -112 288
WIRE -96 304 -96 288
WIRE -96 304 -112 304
WIRE -80 304 -80 288
WIRE -80 304 -96 304
WIRE -96 320 -96 304
WIRE -192 352 -192 256
WIRE -64 352 -192 352
WIRE 32 352 32 224
WIRE 32 352 0 352
WIRE -304 368 -304 352
SYMBOL res -320 144 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -432 176 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL Comparators\\LT1116 -96 176 R0
SYMATTR InstName U2
SYMBOL res -16 64 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL misc\\xtal 0 336 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 Invisible 0
SYMATTR InstName Y1
SYMATTR Value .32p
SYMATTR SpiceLine Rser=45 Lser=.78m Cpar=18p
SYMBOL cap -176 64 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C1
SYMATTR Value 24p
SYMBOL res -320 256 R0
SYMATTR InstName R3
SYMATTR Value 1K
FLAG -432 288 0
FLAG -432 176 +V
FLAG -96 160 +V
FLAG -96 320 0
FLAG -256 80 0
FLAG -304 368 0
FLAG -304 144 +V
FLAG 64 256 OUT
TEXT 64 376 Left 0 !.tran 50u startup
TEXT -120 24 Bottom 0 ;Single Supply Crystal Oscillator 10MHz to 15MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3080.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3080.asy)
R1 N003 0 100K
XU1 MP_01 N003 N002 N001 N001 LT3080 ;pnba )SET)OUT)Vcntrl)IN
C2 N001 0 200
V1 N001 0 PWL(1u 0 1.1u 4.5) Rser=5m
R2 N002 0 1
C1 N002 0 2.2
.tran 10u startup
.lib LT3080.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -288 80 -400 80
WIRE 16 80 -288 80
WIRE 176 80 16 80
WIRE 176 112 176 80
WIRE -400 128 -400 80
WIRE -288 128 -288 80
WIRE 16 224 16 80
WIRE 48 224 16 224
WIRE 368 224 304 224
WIRE 464 224 368 224
WIRE 464 240 464 224
WIRE -400 256 -400 192
WIRE -288 256 -288 208
WIRE 368 256 368 224
WIRE 176 352 176 336
WIRE 368 352 368 320
WIRE 464 352 464 320
WIRE 176 448 176 432
SYMBOL res 160 336 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 448 224 R0
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL cap 352 256 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL PowerProducts\\LT3080 176 224 R0
SYMATTR InstName U1
SYMBOL cap -416 128 R0
SYMATTR InstName C2
SYMATTR Value 200
SYMBOL voltage -288 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 132 Left 2
SYMATTR SpiceLine Rser=5m
SYMATTR InstName V1
SYMATTR Value PWL(1u 0 1.1u 4.5)
FLAG 176 448 0
FLAG -288 256 0
FLAG 464 352 0
FLAG 368 352 0
FLAG -400 256 0
TEXT 488 440 Left 2 !.tran 10u startup