Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2165-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2165-3.3.asy)
XU1 N002 N005 N002 OUT 0 0 N004 IN IN IN N001 N008 N007 N003 N002 ADP2165-x.x Rtop=818K Rbot=182K ;pnba SYNC)Rt)TRK)FB)Gnd)Pgnd)SW)Pvin)Avin)EN)Pgood)SS)Comp)Bst)Vreg
R1 N005 0 100K
C1 N008 0 2n
R3 OUT N001 100K
R2 N007 N006 36K
C2 N003 N004 .1
C6 N007 0 1p
V1 IN 0 5
C5 N006 0 680p
C3 OUT 0 60 Rser=2m
Rload OUT 0 .66
C4 N002 0 1
L1 N004 OUT 1.5 Rser=6m
.tran 1m startup
.lib ADP2165-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 680
WIRE 48 -96 -128 -96
WIRE 176 -96 48 -96
WIRE 272 -96 176 -96
WIRE -128 -80 -128 -96
WIRE 176 -80 176 -96
WIRE 272 -80 272 -96
WIRE 48 -16 48 -96
WIRE 64 -16 48 -16
WIRE 448 -16 384 -16
WIRE 608 -16 528 -16
WIRE -128 16 -128 0
WIRE -32 64 -48 64
WIRE 48 64 32 64
WIRE 64 64 48 64
WIRE 432 64 384 64
WIRE 48 144 48 64
WIRE 64 144 48 144
WIRE 432 144 432 128
WIRE 432 144 384 144
WIRE 480 144 432 144
WIRE 608 144 608 -16
WIRE 608 144 560 144
WIRE 720 144 608 144
WIRE 832 144 720 144
WIRE 720 160 720 144
WIRE 832 160 832 144
WIRE 48 224 48 144
WIRE 64 224 48 224
WIRE 720 256 720 224
WIRE 832 256 832 240
WIRE -32 304 -48 304
WIRE 64 304 48 304
WIRE 608 304 608 144
WIRE 608 304 384 304
WIRE -160 384 -224 384
WIRE -32 384 -80 384
WIRE 64 384 -32 384
WIRE 400 384 384 384
WIRE 480 384 464 384
WIRE -224 400 -224 384
WIRE -32 400 -32 384
WIRE 176 464 176 448
WIRE 272 464 272 448
WIRE -224 480 -224 464
WIRE -32 480 -32 464
SYMBOL cap 704 160 R0
WINDOW 40 24 74 Left 2
SYMATTR Value 60
SYMATTR InstName C3
SYMATTR SpiceLine Rser=2m
SYMBOL res 64 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res -64 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 36K
SYMBOL cap 32 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap 400 368 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL cap -240 400 R0
SYMATTR InstName C5
SYMATTR Value 680p
SYMBOL ADP2165-3.3 224 176 R0
SYMATTR InstName U1
SYMBOL voltage -128 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 544 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 416 64 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL ind 464 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=6m
SYMBOL res 816 144 R0
SYMATTR InstName Rload
SYMATTR Value .66
SYMBOL cap -48 400 R0
SYMATTR InstName C6
SYMATTR Value 1p
FLAG 480 384 0
FLAG 272 464 0
FLAG -48 304 0
FLAG -224 480 0
FLAG -128 16 0
FLAG 720 256 0
FLAG 832 256 0
FLAG 832 144 OUT
FLAG -128 -96 IN
FLAG -48 64 0
FLAG -32 480 0
FLAG 176 464 0
TEXT 696 424 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6702.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6650.asy)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC6702.asy)
C1 N004 N005 .1
V5 N001 0 3
V2 N005 0 SINE(0 100m 3.2Meg)
XU1 N004 N002 N001 0 N003 LTC6702 ;pnba In+)In-)V+)GND)OUT
XU2 N001 0 N002 N002 LT6650 ;pnba IN)GND)OUT)FB
R1 N002 N004 1K
.tran 10u
.lib LT6650.sub
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1548 852
WIRE -144 32 -304 32
WIRE 288 32 -144 32
WIRE -304 48 -304 32
WIRE -144 64 -144 32
WIRE 0 112 -32 112
WIRE 144 112 0 112
WIRE 224 112 144 112
WIRE 144 128 144 112
WIRE 288 128 288 32
WIRE -304 144 -304 128
WIRE 224 160 224 112
WIRE 256 160 224 160
WIRE 0 176 0 112
WIRE 0 176 -32 176
WIRE 432 176 336 176
WIRE 256 192 224 192
WIRE 64 224 0 224
WIRE 144 224 144 208
WIRE 144 224 128 224
WIRE 224 224 224 192
WIRE 224 224 144 224
WIRE -144 240 -144 224
WIRE 0 240 0 224
WIRE 288 240 288 224
WIRE 0 336 0 320
SYMBOL LT6650 -144 144 R0
SYMATTR InstName U2
SYMBOL voltage -304 32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V5
SYMATTR Value 3
SYMBOL Comparators\\LTC6702 288 176 R0
SYMATTR InstName U1
SYMBOL res 128 112 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 0 224 R0
WINDOW 3 35 115 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 100m 3.2Meg)
SYMATTR InstName V2
SYMBOL cap 128 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
FLAG 288 240 0
FLAG -304 144 0
FLAG -144 240 0
FLAG 0 336 0
TEXT 392 384 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8057.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8057.asy)
XU1 0 OUT 0 N002 IN N001 IN NC_01 LTM8057 ;pnba GND)Vout1)Vout-)ADJ)Vin)Bias)Run)SS
C2 OUT 0 22 Rser=10m
Rload OUT 0 16.7
C1 N001 0 4.7
V1 IN 0 24
R1 N002 0 6.98K
.tran 2m startup
.lib LTM8057.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 32 -96 32
WIRE 0 32 -16 32
WIRE 384 32 320 32
WIRE 480 32 384 32
WIRE -96 48 -96 32
WIRE 384 48 384 32
WIRE 480 48 480 32
WIRE -16 128 -16 32
WIRE 0 128 -16 128
WIRE 384 128 384 112
WIRE 384 128 320 128
WIRE -96 144 -96 128
WIRE 384 144 384 128
WIRE 480 144 480 128
WIRE -80 224 -96 224
WIRE 0 224 -16 224
WIRE 336 224 320 224
WIRE 432 224 416 224
WIRE 336 320 320 320
SYMBOL res 320 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 6.98K
SYMBOL cap -16 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL PowerProducts\\LTM8057 160 176 R0
SYMATTR InstName U1
SYMBOL voltage -96 32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 464 32 R0
SYMATTR InstName Rload
SYMATTR Value 16.7
SYMBOL cap 368 48 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMATTR SpiceLine Rser=10m
FLAG 336 320 0
FLAG -96 144 0
FLAG -96 224 0
FLAG 432 224 0
FLAG 480 144 0
FLAG -96 32 IN
FLAG 480 32 OUT
FLAG 384 144 0
TEXT 416 328 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1519.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 -V 0 -8
V4 N004 0 PULSE(0 5 0 20n 20n 10u 20u)
R2 N001 0 300
V5 N002 0 3
V3 N005 0 5;PULSE(0 5 0 20n 20n 10u 20u)
V6 N003 0 0
C1 0 N001 35p
XU1 N004 N002 N001 N003 N005 -V 0 +V ADG1519 ;pnba IN)SA)D)SB)EN)Vss)GND)Vdd
.tran 0.0001
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1519.asy)
.lib ADG1519.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -752 -368 -800 -368
WIRE -592 -336 -656 -336
WIRE -464 -336 -528 -336
WIRE -800 -320 -800 -368
WIRE -1040 -256 -1072 -256
WIRE -896 -256 -960 -256
WIRE -1552 -240 -1552 -256
WIRE -1440 -240 -1440 -256
WIRE -656 -224 -656 -336
WIRE -656 -224 -704 -224
WIRE -608 -224 -656 -224
WIRE -464 -224 -528 -224
WIRE -1152 -192 -1184 -192
WIRE -896 -192 -1072 -192
WIRE -1552 -144 -1552 -160
WIRE -1440 -144 -1440 -160
WIRE -896 -128 -960 -128
WIRE -624 -128 -704 -128
WIRE -624 -96 -624 -128
WIRE -960 -80 -960 -128
WIRE -736 0 -736 -16
WIRE -624 0 -624 -16
WIRE -1184 16 -1184 -192
WIRE -960 16 -960 0
WIRE -864 16 -864 -16
WIRE -832 16 -864 16
FLAG -1552 -144 0
FLAG -1440 -144 0
FLAG -1440 -256 +V
FLAG -1552 -256 -V
FLAG -1072 -256 0
FLAG -960 16 0
FLAG -464 -224 0
FLAG -752 -368 +V
FLAG -736 0 0
FLAG -832 16 -V
FLAG -624 0 0
FLAG -1184 16 0
FLAG -464 -336 0
SYMBOL voltage -1440 -256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -1552 -256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -8
SYMBOL voltage -960 -96 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 5 0 20n 20n 10u 20u)
SYMBOL res -624 -240 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 300
SYMBOL voltage -944 -256 R90
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 47 41 VRight 2
WINDOW 3 -46 -22 VRight 2
SYMATTR InstName V5
SYMATTR Value 3
SYMBOL voltage -624 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5;PULSE(0 5 0 20n 20n 10u 20u)
SYMBOL voltage -1056 -192 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 0
SYMBOL cap -528 -352 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL Switches\\ADG1519 -800 -176 R0
SYMATTR InstName U1
TEXT -1592 8 Left 2 !.tran 0.0001
* Z:\home\khalils\Downloads\files\data\raw_asc\5a989c92049f_90nm_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
vsd N001 0 -1.2
vsg N003 0 -1.2
M1 N001 N003 0 N002 PMOS l=90nm w=405nm
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc vsg 0 -1.2 .1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 64 224 64
WIRE 224 96 224 64
WIRE 368 96 368 64
WIRE 224 144 224 112
WIRE 176 176 80 176
WIRE 80 192 80 176
WIRE 208 272 80 272
WIRE 224 272 224 192
WIRE 224 272 208 272
WIRE 368 272 368 176
WIRE 368 272 224 272
WIRE 208 288 208 272
SYMBOL voltage 368 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vsd
SYMATTR Value -1.2
SYMBOL voltage 80 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vsg
SYMATTR Value -1.2
SYMBOL pmos4 176 96 R0
SYMATTR InstName M1
SYMATTR Value2 l=90nm w=405nm
FLAG 208 288 0
TEXT 48 312 Left 2 !.dc vsg 0 -1.2 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3631-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3631-3.3.asy)
C1 OUT 0 10
V1 IN 0 36
XU1 N001 IN NC_01 NC_02 IN OUT NC_03 0 LTC3631-3.3 ;pnba SW)Vin)Iset)SS)Run)OUT)Hyst)GND
Rload OUT 0 33
L1 N001 OUT 100
.tran 1.5m startup
.lib LTC3631-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 80 0 80
WIRE 112 80 96 80
WIRE 352 80 336 80
WIRE 448 80 432 80
WIRE 512 80 448 80
WIRE 592 80 512 80
WIRE 0 96 0 80
WIRE 512 96 512 80
WIRE 592 96 592 80
WIRE 96 176 96 80
WIRE 112 176 96 176
WIRE 448 176 448 80
WIRE 448 176 336 176
WIRE 0 192 0 176
WIRE 512 192 512 160
WIRE 592 192 592 176
WIRE 352 368 336 368
SYMBOL ind 336 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMBOL res 576 80 R0
SYMATTR InstName Rload
SYMATTR Value 33
SYMBOL voltage 0 80 R0
SYMATTR InstName V1
SYMATTR Value 36
SYMBOL cap 496 96 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LTC3631-3.3 224 224 R0
SYMATTR InstName U1
FLAG 0 192 0
FLAG 352 368 0
FLAG 512 192 0
FLAG 592 192 0
FLAG 0 80 IN
FLAG 592 80 OUT
TEXT 448 360 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6078.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6078.asy)
C1 N004 IN 270p
R1 OUT N001 10Meg
C2 N003 N004 270p
R2 N001 0 10Meg
R4 N003 N002 10Meg
V1 +V 0 2.5
R5 0 N004 5Meg
XU1 N003 N001 +V -V OUT LTC6078 ;pnba IN+)IN-)VCC)VEE)OUT
V2 -V 0 -2.5
C3 N002 0 540p
R3 N002 IN 10Meg
V3 IN 0 ac 1
.ac oct 1000 1 1K
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 820
WIRE 48 320 16 320
WIRE 144 320 128 320
WIRE 256 320 144 320
WIRE 368 320 336 320
WIRE -496 384 -496 368
WIRE -384 384 -384 368
WIRE 224 384 224 368
WIRE 144 400 144 320
WIRE 192 400 144 400
WIRE 368 416 368 320
WIRE 368 416 256 416
WIRE 400 416 368 416
WIRE -128 432 -240 432
WIRE -112 432 -128 432
WIRE 0 432 -32 432
WIRE 48 432 0 432
WIRE 144 432 128 432
WIRE 192 432 144 432
WIRE -240 448 -240 432
WIRE 0 448 0 432
WIRE 224 464 224 448
WIRE -496 480 -496 464
WIRE -384 480 -384 464
WIRE 0 528 0 512
WIRE -240 544 -240 528
WIRE -128 576 -128 432
WIRE -96 576 -128 576
WIRE 0 576 -32 576
WIRE 48 576 0 576
WIRE 144 576 144 432
WIRE 144 576 112 576
WIRE 0 608 0 576
WIRE 0 704 0 688
SYMBOL voltage -496 368 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 352 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10Meg
SYMBOL cap 112 560 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 270p
SYMBOL voltage -384 368 R0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL LTC6078 224 416 R0
SYMATTR InstName U1
SYMATTR Description Micropower Precision, CMOS Rail-to-Rail Amplifier
SYMBOL res -16 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10Meg
SYMBOL res 144 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10Meg
SYMBOL cap -32 560 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 270p
SYMBOL res -16 704 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 5Meg
SYMBOL res 144 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10Meg
SYMBOL cap -16 448 R0
SYMATTR InstName C3
SYMATTR Value 540p
SYMBOL voltage -240 432 R0
SYMATTR InstName V3
SYMATTR Value ac 1
FLAG -496 480 0
FLAG -496 368 +V
FLAG -384 480 0
FLAG -384 368 -V
FLAG -240 544 0
FLAG 16 320 0
FLAG 0 704 0
FLAG 0 528 0
FLAG 400 416 OUT
FLAG -240 432 IN
FLAG 224 368 +V
FLAG 224 464 -V
TEXT 216 592 Left 2 !.ac oct  1000 1 1K
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4627.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4627.asy)
XU1 IN N001 +V -V OUT ADA4627 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -15
R2 OUT N001 10K
Rload OUT 0 10K
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
V1 +V 0 15
.tran 1m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL ADA4627 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
TEXT 720 -944 Left 2 !.tran 1m
* Z:\tmp\asc_dec_bjh7r6w2\0f54e9a3181f_Nand2_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 PULSE(0 1 1n 10p 10p 20n 40n)
M4 VDD N001 N002 VDD PMOS l=1u w=10u
M2 N003 N001 N004 0 NMOS l=1u w=10u
V2 VDD 0 PULSE(0 1 1n 10p 10p 10n 20n)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE 256 -160 96 -160
WIRE 512 -160 480 -160
WIRE 752 -160 720 -160
WIRE 96 -128 96 -160
WIRE 480 -128 480 -160
WIRE 480 -128 96 -128
WIRE 720 -128 720 -160
WIRE 720 -128 480 -128
WIRE 304 -96 304 -144
WIRE 560 -96 560 -144
WIRE 560 -96 304 -96
WIRE 800 -96 800 -144
WIRE 800 -96 560 -96
WIRE 928 -96 800 -96
WIRE 256 -16 208 -16
WIRE 96 48 96 -128
WIRE 96 48 0 48
WIRE 208 48 208 -16
WIRE 208 48 96 48
WIRE 304 64 304 0
WIRE 208 144 208 48
WIRE 256 144 208 144
WIRE 304 224 304 160
WIRE 208 304 208 144
SYMBOL voltage 0 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 1n 10p 10p 20n 40n)
SYMBOL pmos4 256 -240 R0
WINDOW 123 75 -34 Left 2
SYMATTR InstName M4
SYMATTR Value2 l=1u w=10u
SYMBOL nmos4 256 64 R0
WINDOW 123 56 100 Left 2
SYMATTR InstName M2
SYMATTR Value2 l=1u w=10u
SYMBOL voltage 640 0 R0
WINDOW 3 35 76 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 1n 10p 10p 10n 20n)
FLAG 304 112 0
FLAG 304 -48 0
FLAG 640 96 0
FLAG 0 128 0
FLAG 640 16 VDD
FLAG 304 -192 VDD
FLAG 560 -192 VDD
FLAG 800 -192 VDD
FLAG 304 -240 VDD
* Z:\home\khalils\Downloads\files\data\raw_asc\1c9f63d1f46c_StageC_HighPassFirstOrder_LT6004.asc
* Generated by LTspice 26.0.1 for Windows.
* This subcircuit is not simulatable. \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6004.asy)
XU1 N001 OUT V+ V- OUT LT6003 ;pnba IN+)IN-)VCC)VEE)OUT
C1 N001 IN 390n
R1 N001 REF 1.2Meg
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 4112 860
WIRE 528 -64 240 -64
WIRE 320 112 320 0
WIRE 240 128 240 -64
WIRE 288 128 288 112
WIRE 288 128 240 128
WIRE 304 128 288 128
WIRE 528 144 352 144
WIRE 528 144 528 -64
WIRE -160 160 -176 160
WIRE -112 160 -160 160
WIRE 144 160 -48 160
WIRE 288 160 144 160
WIRE 304 160 288 160
WIRE 528 160 528 144
WIRE 592 160 528 160
WIRE 624 160 592 160
WIRE 144 176 144 160
WIRE 288 176 288 160
WIRE 320 272 320 176
WIRE 144 272 144 256
SYMBOL res 128 160 R0
SYMATTR InstName R1
SYMATTR Value 1.2Meg
SYMBOL cap -48 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 390n
SYMBOL Opamps\\LT6004 320 144 R0
SYMATTR InstName U1
FLAG 320 0 V+
FLAG 320 272 V-
FLAG 592 160 OUT
FLAG -160 160 IN
FLAG 144 272 REF
TEXT -176 504 Left 4 ;This subcircuit is not simulatable.  \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP166-ADJ.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP166-ADJ.asy)
C1 OUT 0 1
R2 N002 0 100K
V1 IN 0 5
XU1 IN 0 N001 OUT N002 ADP16xa ;pnba Vin)GND)En)Vout)Adj
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
R1 OUT N002 230K
Rload OUT 0 330
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 432 96 352 96
WIRE 544 96 432 96
WIRE 624 96 544 96
WIRE -64 112 -64 96
WIRE 432 112 432 96
WIRE 544 112 544 96
WIRE 624 112 624 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 432 208 432 192
WIRE 432 208 352 208
WIRE 544 208 544 176
WIRE 624 208 624 192
WIRE 16 224 16 208
WIRE 432 224 432 208
WIRE 256 272 256 256
WIRE 16 320 16 304
WIRE 432 320 432 304
SYMBOL cap 528 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 416 208 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL res 416 96 R0
SYMATTR InstName R1
SYMATTR Value 230K
SYMBOL ADP166-ADJ 256 208 R0
SYMATTR InstName U1
SYMBOL res 608 96 R0
SYMATTR InstName Rload
SYMATTR Value 330
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -64 208 0
FLAG 256 272 0
FLAG 432 320 0
FLAG 544 208 0
FLAG 624 208 0
FLAG 624 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8301.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8301.asy)
L2 0 N001 4.4 Rser=20m Cpar=.2p
V1 IN 0 24
K1 L1 L2 1
XU1 IN 0 N003 N002 IN LT8301 ;pnba EN/UVLO)GND)RFB)SW)Vin
Rload OUT 0 5
R3 N002 N003 154K
C1 OUT 0 100 V=10 Irms=2.2 Rser=0.025 Lser=0 mfg="KEMET" pn="T520V107M010ASE025" type="Tantalum"
D1 N001 OUT MBRS360
L1 IN N002 40 Rser=500m Cpar=1p
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
.lib LT8301.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 48 16 -48 16
WIRE 416 16 48 16
WIRE 560 16 464 16
WIRE 688 16 624 16
WIRE 784 16 688 16
WIRE -48 32 -48 16
WIRE 416 32 416 16
WIRE 464 32 464 16
WIRE 688 32 688 16
WIRE 784 32 784 16
WIRE -48 128 -48 112
WIRE 464 128 464 112
WIRE 688 128 688 96
WIRE 784 128 784 112
WIRE 48 144 48 16
WIRE 96 144 48 144
WIRE 416 144 416 112
WIRE 416 144 320 144
WIRE 416 176 416 144
WIRE 48 272 48 144
WIRE 96 272 48 272
WIRE 416 272 416 256
WIRE 416 272 320 272
WIRE 208 336 208 320
SYMBOL res 400 160 R0
SYMATTR InstName R3
SYMATTR Value 154K
SYMBOL schottky 560 32 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage -48 16 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL polcap 672 32 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 100
SYMATTR InstName C1
SYMATTR SpiceLine V=10 Irms=2.2 Rser=0.025 Lser=0 mfg="KEMET" pn="T520V107M010ASE025" type="Tantalum"
SYMATTR Description Capacitor
SYMATTR Type cap
SYMBOL ind2 480 128 R180
WINDOW 0 -4 72 Right 2
WINDOW 3 -1 33 Right 2
SYMATTR InstName L2
SYMATTR Value 4.4
SYMATTR Type ind
SYMATTR SpiceLine Rser=20m Cpar=.2p
SYMBOL ind2 400 16 R0
WINDOW 0 0 39 Right 2
WINDOW 3 0 77 Right 2
SYMATTR InstName L1
SYMATTR Value 40
SYMATTR Type ind
SYMATTR SpiceLine Rser=500m Cpar=1p
SYMBOL res 768 16 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL PowerProducts\\LT8301 208 208 R0
SYMATTR InstName U1
FLAG 208 336 0
FLAG -48 128 0
FLAG -48 16 IN
FLAG 464 128 0
FLAG 688 128 0
FLAG 784 128 0
FLAG 784 16 OUT
TEXT 440 8 Bottom 2 !K1 L1 L2 1
TEXT 560 312 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG842.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input.\nCharge injection not included.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG842.asy)
V1 +V 0 3.3
V2 IN 0 PULSE(0 2.4 0 10n 10n 980n 2u)
XU1 +V IN S D 0 ADG842 ;pnba Vdd)IN)S)D)GND
VS S 0 3
R1 D 0 47
C1 D 0 33p
.tran 10u
.lib ADG842.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2844 1336
WIRE -144 -96 -144 -112
WIRE -368 -16 -400 -16
WIRE -272 -16 -288 -16
WIRE -240 -16 -272 -16
WIRE -32 -16 -48 -16
WIRE 0 -16 -32 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE -480 32 -480 16
WIRE 112 32 112 -16
WIRE -272 48 -368 48
WIRE -240 48 -272 48
WIRE -368 112 -368 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -480 128 -480 112
WIRE -144 176 -144 160
WIRE -368 272 -368 192
SYMBOL voltage -272 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL ADG842 -144 32 R0
SYMATTR InstName U1
SYMBOL voltage -480 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 33p
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 47
SYMBOL voltage -368 96 R0
WINDOW 3 17 129 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 2.4 0 10n 10n 980n 2u)
SYMATTR InstName V2
FLAG -480 128 0
FLAG -480 16 +V
FLAG -400 -16 0
FLAG -144 -112 +V
FLAG -144 176 0
FLAG -368 272 0
FLAG 0 112 0
FLAG 112 112 0
FLAG -272 -16 S
FLAG -272 48 IN
FLAG -32 -16 D
TEXT 24 184 Left 2 !.tran 10u
TEXT -592 -232 Left 2 ;Note:\nSwitch shown for a logic 0 input.\nCharge injection not included.