Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2909-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2909-3.3.asy)
V1 N002 0 PWL (0,0 10m,12)
C2 0 _RST 1000p
R3 N003 0 10K
R1 N005 N001 57.6K
R4 N001 _RST 10K
C1 0 N004 22n
I1 REF 0 PWL(0 0 1 0 1.001 1m 2 1m 2.001 -1m 3 -1m 4 -5m 4.001 -5m 5 5m)
V3 N006 0 PWL(0 0 5010m 0 5011m 0.9 10010m 0.9 10011m 5)
XU1 0 REF N003 N005 N006 N004 N002 _RST LTC2909-3.3 ;pnba GND)REF)ADJ2)ADJ1)SEL)TMR)Vcc)_RST
V2 N001 0 PULSE(2.5 5 0 1000m 1000m 3000m 5000m)
R2 N005 N003 1.1K
.tran 15
.lib LTC2909-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1152 788
WIRE -176 80 -256 80
WIRE 272 80 -96 80
WIRE 304 80 272 80
WIRE 16 160 0 160
WIRE 304 160 304 80
WIRE 304 160 272 160
WIRE 320 160 304 160
WIRE 432 160 384 160
WIRE -736 224 -784 224
WIRE -16 224 -656 224
WIRE 16 224 -16 224
WIRE 496 224 272 224
WIRE 592 224 576 224
WIRE -192 288 -208 288
WIRE -96 288 -112 288
WIRE 16 288 -96 288
WIRE 304 288 272 288
WIRE 400 288 368 288
WIRE -96 304 -96 288
WIRE 16 352 0 352
WIRE 352 352 272 352
WIRE 352 368 352 352
WIRE -256 400 -256 80
WIRE -224 400 -256 400
WIRE -96 400 -96 384
WIRE -96 400 -144 400
WIRE 0 400 0 352
WIRE 0 400 -96 400
WIRE -256 464 -256 400
WIRE 352 464 352 448
WIRE -256 560 -256 544
SYMBOL cap 368 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL current -656 224 R90
WINDOW 0 -32 40 VBottom 2
WINDOW 3 32 40 VTop 2
SYMATTR InstName I1
SYMATTR Value PWL(0 0 1 0 1.001 1m 2 1m 2.001 -1m 3 -1m 4 -5m 4.001 -5m 5 5m)
SYMBOL res -96 304 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res -192 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL voltage 352 352 R0
WINDOW 3 30 89 Left 2
SYMATTR Value PWL(0 0 5010m 0 5011m 0.9 10010m 0.9 10011m 5)
SYMATTR InstName V3
SYMBOL LTC2909-3.3 144 256 R0
SYMATTR InstName U1
SYMBOL res -112 400 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 1.1K
SYMBOL cap 384 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL voltage 480 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value PWL (0,0 10m,12)
SYMBOL res -128 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 57.6K
SYMBOL voltage -256 448 R0
SYMATTR InstName V2
SYMATTR Value PULSE(2.5 5 0 1000m 1000m 3000m 5000m)
FLAG 0 160 0
FLAG 592 224 0
FLAG -256 560 0
FLAG -208 288 0
FLAG -784 224 0
FLAG 400 288 0
FLAG 432 160 0
FLAG 352 464 0
FLAG -16 224 REF
FLAG 272 80 _RST
TEXT 432 544 Left 2 !.tran 15
* Z:\home\khalils\Downloads\files\data\raw_asc\11cc29062bca_Ideal_differential_op_amp.asc
* Generated by LTspice 26.0.1 for Windows.
E2 N001 Outm Vinp Vinm 1e9
E3 N001 0 VCM 0 1
E1 Outp N001 Vinp Vinm 1e9
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 6300 692
WIRE 1392 336 1360 336
WIRE 1392 512 1392 336
WIRE 1408 288 1360 288
WIRE 1408 464 1408 288
WIRE 1424 288 1408 288
WIRE 1424 336 1392 336
WIRE 1424 464 1408 464
WIRE 1424 512 1392 512
WIRE 1472 272 1472 240
WIRE 1472 384 1472 352
WIRE 1472 448 1472 384
WIRE 1472 576 1472 528
WIRE 1584 240 1472 240
WIRE 1584 576 1472 576
WIRE 1696 384 1472 384
WIRE 1696 400 1696 384
WIRE 1696 512 1696 480
WIRE 1744 416 1744 384
WIRE 1760 464 1744 464
WIRE 1760 512 1760 464
IOPIN 1584 240 Out
IOPIN 1360 288 In
IOPIN 1360 336 In
IOPIN 1584 576 Out
IOPIN 1744 384 In
SYMBOL e 1472 256 R0
SYMATTR InstName E1
SYMATTR Value 1e9
SYMBOL e 1472 432 R0
SYMATTR InstName E2
SYMATTR Value 1e9
SYMBOL e 1696 384 M0
WINDOW 0 37 43 Left 0
WINDOW 3 36 75 Left 0
SYMATTR InstName E3
SYMATTR Value 1
FLAG 1584 240 Outp
FLAG 1360 288 Vinp
FLAG 1360 336 Vinm
FLAG 1584 576 Outm
FLAG 1696 512 0
FLAG 1760 512 0
FLAG 1744 384 VCM
* Z:\home\khalils\Downloads\files\data\raw_asc\28a98e7bd159_05-invertin_amplifier.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
Rf out N001 {fb_val}
R1 N001 in {r1_val}
V1 vcc 0 +18
V3 in 0 SINE(0 1 1k)
V2 0 vee +18
XU1 0 N001 vcc vee out LT1001 ;pnba In+)In-)V+)V-)OUT
.param fb_val=2k r1_val=1k
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -64 128 -64
WIRE 288 -64 240 -64
WIRE -128 16 -128 -16
WIRE 192 48 192 32
WIRE 0 64 -16 64
WIRE 16 64 0 64
WIRE 128 64 128 -64
WIRE 128 64 96 64
WIRE 160 64 128 64
WIRE 288 80 288 -64
WIRE 288 80 224 80
WIRE 336 80 288 80
WIRE 352 80 336 80
WIRE 160 96 144 96
WIRE -128 112 -128 96
WIRE -128 112 -192 112
WIRE -16 112 -16 64
WIRE -128 128 -128 112
WIRE 144 128 144 96
WIRE 192 128 192 112
WIRE -192 144 -192 112
WIRE -16 224 -16 192
WIRE -128 240 -128 208
SYMBOL res 256 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 45 VTop 2
SYMATTR InstName Rf
SYMATTR Value {fb_val}
SYMBOL voltage -128 112 R0
WINDOW 3 19 88 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value +18
SYMBOL voltage -16 96 R0
WINDOW 0 43 66 Left 2
WINDOW 3 20 91 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1k)
SYMBOL voltage -128 0 R0
WINDOW 3 24 85 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value +18
SYMBOL OpAmps\\OP07 192 16 R0
SYMATTR InstName U1
SYMBOL res 112 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {r1_val}
FLAG -192 144 0
FLAG -128 -16 vcc
FLAG -128 240 vee
FLAG -16 224 0
FLAG 0 64 in
FLAG 192 128 vee
FLAG 192 32 vcc
FLAG 336 80 out
FLAG 144 128 0
TEXT 16 240 Left 2 !.param fb_val=2k r1_val=1k
TEXT 16 272 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\81181dfd0248_1441.asc
* Generated by LTspice 26.0.1 for Windows.
* 32.768KHz "Watch Crystal" Oscillator
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1441.asy)
XU1 OUT 0 N002 N001 +V LTC1441 ;pnba OUT)V-)In+)In-)V+
V1 +V 0 3.3
C1 OUT N002 .39p Rser=5K Lser=60 Cpar=3.9p
R3 OUT N001 1.2Meg
C2 N001 0 10p
R2 +V N002 1Meg
R1 N002 0 470K
.tran 3m startup
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 800
WIRE 304 112 256 112
WIRE 464 112 384 112
WIRE 0 224 0 208
WIRE 336 240 336 208
WIRE 176 256 160 256
WIRE 256 256 256 112
WIRE 256 256 240 256
WIRE 304 256 256 256
WIRE 464 272 464 112
WIRE 464 272 368 272
WIRE 496 272 464 272
WIRE 304 288 256 288
WIRE 0 320 0 304
WIRE 128 320 128 304
WIRE 336 336 336 304
WIRE 128 416 128 400
WIRE 256 416 256 288
WIRE 256 416 128 416
WIRE 352 416 256 416
WIRE 464 416 464 272
WIRE 464 416 416 416
WIRE 128 432 128 416
WIRE 128 528 128 512
SYMBOL misc\\xtal 416 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 Invisible 2
SYMATTR InstName C1
SYMATTR Value .39p
SYMATTR SpiceLine Rser=5K Lser=60 Cpar=3.9p
SYMBOL voltage 0 208 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 112 304 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL Comparators\\LTC1441 336 208 R0
SYMATTR InstName U1
SYMBOL cap 240 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL res 400 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1.2Meg
SYMBOL res 112 416 R0
SYMATTR InstName R1
SYMATTR Value 470K
FLAG 0 320 0
FLAG 0 208 +V
FLAG 336 208 +V
FLAG 336 336 0
FLAG 128 528 0
FLAG 128 304 +V
FLAG 160 256 0
FLAG 496 272 OUT
TEXT 400 472 Left 2 !.tran 3m startup
TEXT 368 64 Bottom 2 ;32.768KHz "Watch Crystal" Oscillator
* Z:\home\khalils\Downloads\files\data\raw_asc\d3fc4b6b1431_Draft3N.asc
* Generated by LTspice 26.0.1 for Windows.
VDS N001 0 0.9
M1 N001 VG P001 0 nch l=1u w=1u
VBS P001 0 1
VGS VG 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib cmos018.txt
.STEP VBS 0 1 1m
.MEAS DC UTH FIND V(VG) WHEN Id(M1)=500n
.DC VGS 0 2 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 928 680
WIRE 576 64 256 64
WIRE 256 112 256 64
WIRE 576 112 576 64
WIRE 320 160 256 160
WIRE 160 192 64 192
WIRE 208 192 160 192
WIRE 64 208 64 192
WIRE 64 304 64 288
WIRE 256 304 256 288
WIRE 320 304 320 160
WIRE 576 304 576 192
SYMBOL voltage 64 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 1
SYMBOL voltage 576 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 0.9
SYMBOL nmos4 208 112 R0
WINDOW 0 123 22 Left 2
WINDOW 3 123 47 Left 2
WINDOW 123 124 75 Left 2
SYMATTR InstName M1
SYMATTR Value nch
SYMATTR Value2 l=1u w=1u
SYMBOL voltage 256 192 R0
WINDOW 0 -85 35 Left 2
WINDOW 3 -69 68 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VBS
SYMATTR Value 1
FLAG 256 304 0
FLAG 576 304 0
FLAG 64 304 0
FLAG 160 192 VG
FLAG 320 304 0
TEXT 32 -112 Left 2 !.lib cmos018.txt
TEXT 32 -80 Left 2 !.STEP VBS 0 1 1m
TEXT 32 -16 Left 2 !.MEAS DC UTH FIND V(VG) WHEN Id(M1)=500n
TEXT 32 -48 Left 2 !.DC VGS 0 2 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1818.asc
* Generated by LTspice 26.0.1 for Windows.
* 80MHz, 20dB Gain Block
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1818.asy)
V1 +V 0 5
XU1 IN N002 N003 +V -V LT1818 ;pnba IN+)IN-)OUT)VCC)VEE
R1 N003 N002 432
R2 N002 0 200
V2 -V 0 -5
R4 N001 0 200
R3 OUT N001 432
V3 IN 0 AC 1
XU2 N003 N001 OUT +V -V LT1818 ;pnba IN+)IN-)OUT)VCC)VEE
.ac oct 10 100K 500Meg
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 240 32 224 32
WIRE 336 32 320 32
WIRE 352 32 336 32
WIRE 464 32 432 32
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -160 160 -160 144
WIRE -64 160 -64 144
WIRE 400 192 400 176
WIRE 192 208 192 192
WIRE 336 208 336 32
WIRE 368 208 336 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 464 224 464 32
WIRE 464 224 432 224
WIRE 496 224 464 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 368 240 256 240
WIRE -160 256 -160 240
WIRE -64 256 -64 240
WIRE 160 256 32 256
WIRE 32 272 32 256
WIRE 400 272 400 256
WIRE 192 288 192 272
WIRE 32 368 32 352
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 432
SYMBOL opamps\\LT1818 400 224 R0
SYMATTR InstName U2
SYMBOL voltage -160 144 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 336 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 200
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL voltage -64 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 32 256 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL opamps\\LT1818 192 240 R0
SYMATTR InstName U1
SYMBOL res 448 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 432
FLAG -64 256 0
FLAG 192 192 +V
FLAG -64 144 +V
FLAG 192 288 -V
FLAG -160 256 0
FLAG -160 144 -V
FLAG 16 96 0
FLAG 32 368 0
FLAG 400 176 +V
FLAG 400 272 -V
FLAG 224 32 0
FLAG 496 224 OUT
FLAG 32 256 IN
TEXT 232 344 Left 2 !.ac oct 10 100K 500Meg
TEXT 264 -32 Bottom 2 ;80MHz, 20dB Gain Block
* Z:\home\khalils\Downloads\files\data\raw_asc\07b6c965795f_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 N003 1N4001
R1 N002 N001 1k
V2 N004 0 -1V
J1 N003 N004 0 2N3819
V1 N001 0 0V
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.dc V1 0 10 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 176 128 176
WIRE 400 176 304 176
WIRE 560 176 464 176
WIRE 512 240 352 240
WIRE 128 272 128 176
WIRE 352 272 352 240
WIRE 128 400 128 352
WIRE 352 400 352 352
WIRE 352 400 128 400
WIRE 560 400 560 272
WIRE 560 400 352 400
WIRE 128 432 128 400
SYMBOL njf 512 176 R0
SYMATTR InstName J1
SYMATTR Value 2N3819
SYMBOL diode 400 192 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4001
SYMBOL voltage 352 256 R0
SYMATTR InstName V2
SYMATTR Value -1V
SYMBOL voltage 128 256 R0
SYMATTR InstName V1
SYMATTR Value 0V
SYMBOL res 320 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 128 432 0
TEXT 8 120 Left 2 !.dc V1 0 10 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1963A-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1963A-2.5.asy)
V1 IN 0 PWL(0 0 1 10)
XU1 IN IN 0 OUT OUT LT1963-2.5 ;pnba _SHDN)IN)GND)OUT)SENSE
C1 OUT 0 1
Rload OUT 0 1K
.tran 1
.lib LT1963.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 48 -208 48
WIRE 32 48 16 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 16 144 16 48
WIRE 32 144 16 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE -208 176 -208 144
WIRE 176 240 176 208
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL PowerProducts\\LT1963A-2.5 176 96 R0
SYMATTR InstName U1
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -208 176 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 392 224 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\f9cf656128b1_3ph_gen.asc
* Generated by LTspice 26.0.1 for Windows.
B1 U 0 V=SIN(V(T))*V(A)
B3 W 0 V=SIN(V(T)+PI*4/3)*V(A)
B2 V 0 V=SIN(V(T)+PI*2/3)*V(A)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 512 32 240 32
WIRE 512 64 336 64
WIRE 512 96 432 96
WIRE 16 144 -16 144
WIRE 16 208 -16 208
WIRE 240 208 240 32
WIRE 336 208 336 64
WIRE 432 208 432 96
WIRE 240 320 240 288
WIRE 336 320 336 288
WIRE 336 320 240 320
WIRE 432 320 432 288
WIRE 432 320 336 320
WIRE 336 352 336 320
IOPIN 512 32 Out
IOPIN 512 64 Out
IOPIN 512 96 Out
IOPIN -16 144 In
IOPIN -16 208 In
SYMBOL bv 336 192 R0
WINDOW 3 -101 246 Left 2
SYMATTR InstName B2
SYMATTR Value V=SIN(V(T)+PI*2/3)*V(A)
SYMBOL bv 240 192 R0
WINDOW 3 -5 213 Left 2
SYMATTR InstName B1
SYMATTR Value V=SIN(V(T))*V(A)
SYMBOL bv 432 192 R0
WINDOW 3 -197 279 Left 2
SYMATTR InstName B3
SYMATTR Value V=SIN(V(T)+PI*4/3)*V(A)
FLAG 336 352 0
FLAG 512 32 U
FLAG 512 64 V
FLAG 512 96 W
FLAG -16 144 A
FLAG -16 208 T
* Z:\home\khalils\Downloads\files\data\raw_asc\302433c4271e_Something-With-Transistors.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6090.asy)
XU1 NC_01 fb in NC_02 NC_03 fb NC_04 NC_05 LTC6090 ;pnba COM)IN-)IN+)V-)_TF)OUT)V+)_OD
Q2 Vcc- fb out 0 PNP
Q1 Vcc+ fb out 0 NPN
V6 Vcc+ 0 70V
C1 out 0 3e-10
R1 out fb 1k
V5 in 0 SINE(0 6V 40k)
V7 Vcc- 0 -70V
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 1s
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1264 680
WIRE 576 64 576 32
WIRE 576 80 576 64
WIRE 512 128 416 128
WIRE 240 144 240 128
WIRE 240 176 240 144
WIRE 1056 208 1056 192
WIRE 1184 208 1184 192
WIRE 144 224 96 224
WIRE 224 224 144 224
WIRE 1056 224 1056 208
WIRE 1184 224 1184 208
WIRE 416 256 416 128
WIRE 416 256 384 256
WIRE 464 256 416 256
WIRE 576 256 576 176
WIRE 576 256 544 256
WIRE 688 256 576 256
WIRE 736 256 688 256
WIRE 752 256 736 256
WIRE 176 288 96 288
WIRE 224 288 176 288
WIRE 576 336 576 256
WIRE 688 336 688 256
WIRE 1056 336 1056 304
WIRE 1184 336 1184 304
WIRE 240 368 240 336
WIRE 96 384 96 288
WIRE 240 384 240 368
WIRE 416 384 416 256
WIRE 432 384 416 384
WIRE 512 384 432 384
WIRE 688 464 688 400
WIRE 576 480 576 432
WIRE 576 496 576 480
WIRE 96 512 96 464
SYMBOL Misc/signal 96 368 R0
SYMATTR InstName V5
SYMATTR Value SINE(0 6V 40k)
SYMBOL npn 512 80 R0
SYMATTR InstName Q1
SYMBOL res 560 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 1056 208 R0
SYMATTR InstName V6
SYMATTR Value 70V
SYMBOL voltage 1184 208 R0
SYMATTR InstName V7
SYMATTR Value -70V
SYMBOL pnp 512 432 M180
SYMATTR InstName Q2
SYMBOL cap 672 336 R0
SYMATTR InstName C1
SYMATTR Value 3e-10
SYMBOL Opamps/LTC6090 288 256 R0
SYMATTR InstName U1
FLAG 176 288 in
FLAG 96 512 0
FLAG 736 256 out
FLAG 432 384 fb
FLAG 1056 336 0
FLAG 1056 208 Vcc+
FLAG 1184 336 0
FLAG 1184 208 Vcc-
FLAG 576 64 Vcc+
FLAG 576 480 Vcc-
FLAG 240 144 Vcc+
FLAG 240 368 Vcc-
FLAG 688 464 0
FLAG 144 224 fb
TEXT 248 592 Left 2 !.tran 0 1s
* Z:\home\khalils\Downloads\files\data\raw_asc\164c3f565789_lpf.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
;tran 0 100m 0 100n
V2 N006 0 SINE(0 200m 100k 0 0 0 0)
V1 Vin N006 SINE(0 1 100 0 0 0 10)
C1 N002 0 0.02p
C2 N005 0 0.02p
V4 N001 0 AC 1
V3 VDD 0 1
M2 N002 N002 N005 N004 NMOS l=0.05u w=5u
M1 N001 N001 N002 N003 NMOS l=0.05u w=5u
XU2 N005 Vout VDD 0 Vout level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include C:\Users\HP\Downloads\p045\p045_cmos_models_tt.inc
.ac dec 1000 1 10G
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1080 680
WIRE 336 -64 208 -64
WIRE -128 32 -240 32
WIRE 80 32 -32 32
WIRE -128 64 -128 32
WIRE 80 64 80 32
WIRE 272 64 272 48
WIRE 208 80 208 -64
WIRE 240 80 208 80
WIRE 336 96 336 -64
WIRE 336 96 304 96
WIRE 384 96 336 96
WIRE 528 96 528 64
WIRE 736 96 736 48
WIRE -240 112 -240 32
WIRE -240 112 -320 112
WIRE -208 112 -240 112
WIRE -128 112 -160 112
WIRE -80 112 -112 112
WIRE -32 112 -32 32
WIRE -32 112 -80 112
WIRE 0 112 -32 112
WIRE 80 112 48 112
WIRE 160 112 96 112
WIRE 240 112 160 112
WIRE 272 144 272 128
WIRE -320 160 -320 112
WIRE -80 176 -80 112
WIRE 160 176 160 112
WIRE 528 208 528 176
WIRE 736 224 736 176
WIRE -320 288 -320 240
WIRE -80 320 -80 240
WIRE 160 320 160 240
WIRE 736 352 736 304
IOPIN 384 96 Out
IOPIN 736 48 In
IOPIN 272 48 BiDir
IOPIN 528 64 BiDir
SYMBOL cap -96 176 R0
SYMATTR InstName C1
SYMATTR Value 0.02p
SYMBOL voltage -320 144 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V4
SYMATTR Value ""
SYMBOL nmos4 0 64 M90
WINDOW 3 56 60 Left 2
SYMATTR InstName M2
SYMATTR Value2 l=0.05u w=5u
SYMBOL voltage 528 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 1
SYMBOL cap 144 176 R0
SYMATTR InstName C2
SYMATTR Value 0.02p
SYMBOL nmos4 -208 64 M90
WINDOW 3 56 60 Left 2
SYMATTR InstName M1
SYMATTR Value2 l=0.05u w=5u
SYMBOL voltage 736 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 200m 100k 0 0 0 0)
SYMBOL OpAmps\\UniversalOpAmp 272 96 R0
SYMATTR InstName U2
SYMBOL voltage 736 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 100 0 0 0 10)
FLAG -80 320 0
FLAG 160 320 0
FLAG 384 96 Vout
FLAG 736 48 Vin
FLAG 736 352 0
FLAG 272 144 0
FLAG 272 48 VDD
FLAG 528 208 0
FLAG 528 64 VDD
FLAG -320 288 0
TEXT -416 416 Left 2 !;tran 0 100m 0 100n
TEXT -416 384 Left 2 !.include C:\\Users\\HP\\Downloads\\p045\\p045_cmos_models_tt.inc
TEXT -416 448 Left 2 !.ac dec 1000 1 10G
* Z:\home\khalils\Downloads\files\data\raw_asc\897c122cd02b_320531-real_channel.asc
* Generated by LTspice 26.0.1 for Windows.
* TODO: Include power supply
* Convergence Aid
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5676R.asy)
V1 N001 0 SINE(0 5 1)
R_coil Vout N003 0.5
V3 0 Vee 5
V2 Vcc 0 5
XU1 N001 Vcc 0 N002 AD5676R Gain=2 ;pnba Vdac)Vdd)GND)Vout
XU2 N002 N003 Vcc Vee Vout TCA0372 ;pnba In+)In-)V+)V-)OUT
R1 N003 0 2.45
.include TCA0372.mod
.tran 0 2 0
.options gmin=1e-11 abstol=1e-11
.lib AD5676R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1596 680
WIRE 112 -48 112 -96
WIRE 608 -48 608 -80
WIRE 1008 80 1008 64
WIRE 112 96 112 32
WIRE 112 96 48 96
WIRE 480 96 320 96
WIRE 976 96 848 96
WIRE 48 112 48 96
WIRE 1120 112 1040 112
WIRE 1152 112 1120 112
WIRE 976 128 928 128
WIRE 112 144 112 96
WIRE 320 144 320 96
WIRE 1120 144 1120 112
WIRE 1008 160 1008 144
WIRE 928 256 928 128
WIRE 1120 256 1120 224
WIRE 1120 256 928 256
WIRE 112 272 112 224
WIRE 320 272 320 224
WIRE 608 272 608 240
WIRE 1120 288 1120 256
WIRE 1120 400 1120 368
IOPIN 1152 112 Out
IOPIN 608 -80 In
IOPIN 112 -96 In
IOPIN 112 272 In
IOPIN 1008 160 Out
IOPIN 1008 64 Out
SYMBOL voltage 320 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1)
SYMBOL voltage 112 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 1104 272 R0
SYMATTR InstName R1
SYMATTR Value 2.45
SYMBOL voltage 112 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL OpAmps\\opamp2 1008 176 M180
SYMATTR InstName U2
SYMATTR Value TCA0372
SYMBOL res 1104 128 R0
SYMATTR InstName R_coil
SYMATTR Value 0.5
SYMBOL DAC\\AD5676R 640 96 R0
SYMATTR InstName U1
FLAG 48 112 0
FLAG 320 272 0
FLAG 608 272 0
FLAG 1120 400 0
FLAG 1152 112 Vout
FLAG 608 -80 Vcc
FLAG 112 -96 Vcc
FLAG 112 272 Vee
FLAG 1008 160 Vcc
FLAG 1008 64 Vee
TEXT -56 -184 Left 2 ;TODO: Include power supply
TEXT 872 -144 Left 2 !.include TCA0372.mod
TEXT -58 424 Left 2 !.tran 0 2 0
TEXT 872 -72 Left 2 !.options gmin=1e-11 abstol=1e-11
TEXT 872 -96 Left 2 ;Convergence Aid
* Z:\home\khalils\Downloads\files\data\raw_asc\60f360e5a20a_Difference_Amplifier.asc
* Generated by LTspice 26.0.1 for Windows.
* DIFFERENCE AMPLIFIER
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
V2 N006 0 5
R3 N005 N006 1k
R5 N005 0 1k
V4 0 N007 12
R2 N001 N004 1k
V1 N004 0 2
XU1 N005 N001 N003 N007 N002 LT1001 ;pnba In+)In-)V+)V-)OUT
V3 N003 0 12
R4 N002 N001 1k
Rl N002 0 10k
.tran 0 10m 1m 50
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -64 224 -64
WIRE 528 -64 352 -64
WIRE 432 -16 320 -16
WIRE 432 16 432 -16
WIRE -48 112 -80 112
WIRE 80 112 32 112
WIRE 432 128 432 96
WIRE 320 160 320 -16
WIRE 80 176 80 112
WIRE 224 176 224 -64
WIRE 224 176 80 176
WIRE 288 176 224 176
WIRE -80 192 -80 112
WIRE 528 192 528 -64
WIRE 528 192 352 192
WIRE 576 192 528 192
WIRE 288 208 192 208
WIRE 576 224 576 192
WIRE 64 240 48 240
WIRE 192 240 192 208
WIRE 192 240 144 240
WIRE 192 288 192 240
WIRE 320 288 320 224
WIRE -80 304 -80 272
WIRE 48 304 48 240
WIRE 576 336 576 304
WIRE 48 400 48 384
WIRE 112 400 48 400
WIRE 192 400 192 368
WIRE 192 400 112 400
WIRE 320 400 320 368
WIRE 112 432 112 400
SYMBOL res 160 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 48 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 368 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL voltage 48 288 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 320 384 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V4
SYMATTR Value 12
SYMBOL voltage -80 176 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL res 560 208 R0
SYMATTR InstName Rl
SYMATTR Value 10k
SYMBOL res 176 272 R0
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL OpAmps\\OP07 320 128 R0
SYMATTR InstName U1
SYMBOL voltage 432 0 R0
SYMATTR InstName V3
SYMATTR Value 12
FLAG 432 128 0
FLAG 576 336 0
FLAG -80 304 0
FLAG 112 432 0
FLAG 320 400 0
TEXT -208 360 Left 2 !.tran 0 10m 1m 50
TEXT -80 0 Left 2 ;DIFFERENCE AMPLIFIER