Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\40ee0e7b2def_Fig9_30_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Is(M1)
VSG 0 N001 0
VSD 0 N003 1
VBS N002 0 0
M1 N003 N001 0 N002 P_50n l=100n w=5u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSG 0 1
.include cmosedu_models.txt
.temp 0 50 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 688
WIRE 448 16 320 16
WIRE 672 16 448 16
WIRE 720 16 672 16
WIRE 320 32 320 16
WIRE 720 48 720 16
WIRE 448 112 448 16
WIRE 320 128 320 112
WIRE 400 128 320 128
WIRE 528 160 448 160
WIRE 672 160 672 16
WIRE 672 160 608 160
WIRE 672 208 672 160
WIRE 448 304 448 208
WIRE 672 304 672 288
WIRE 672 304 448 304
SYMBOL voltage 672 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 41 57 Left 2
WINDOW 3 41 85 Left 2
SYMATTR InstName VSD
SYMATTR Value 1
SYMBOL pmos4 400 208 M180
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=100n w=5u
SYMATTR InstName M1
SYMATTR Value P_50n
SYMBOL voltage 512 160 M90
WINDOW 0 64 48 VBottom 2
WINDOW 3 52 90 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VBS
SYMATTR Value 0
SYMBOL voltage 320 16 R0
WINDOW 0 -89 56 Left 2
WINDOW 3 24 104 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VSG
SYMATTR Value 0
FLAG 720 48 0
TEXT 424 344 Left 2 !.dc VSG 0 1
TEXT 424 392 Left 2 !.include cmosedu_models.txt
TEXT 488 -8 Left 2 ;Plot Is(M1)
TEXT 424 368 Left 2 !.temp 0 50 100
* Z:\home\khalils\Downloads\files\data\raw_asc\0e09fff953b6_rtl.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 Vo N003 0 0 BC547C
R1 N003 N002 470k
R2 Vo N001 10k
V1 N002 0 5
V2 N001 0 5
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 -16 -176 -16
WIRE 240 0 240 -16
WIRE 400 80 240 80
WIRE 240 96 240 80
WIRE 80 144 16 144
WIRE 176 144 160 144
WIRE -176 208 -176 -16
WIRE 16 208 16 144
WIRE -176 320 -176 288
WIRE 16 320 16 288
WIRE 240 320 240 192
FLAG -176 320 0
FLAG 16 320 0
FLAG 240 320 0
FLAG 400 80 Vo
SYMBOL npn 176 96 R0
SYMATTR InstName Q1
SYMATTR Value BC547C
SYMBOL res 176 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 470k
SYMBOL res 256 96 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 16 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -176 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
TEXT -210 344 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\430af1d5518a_Draft1_copy.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac oct 10K 100K 500000K
RL1 Vout 0 50
R1 Limiter_Output RX_SIG 50
C1 Limiter_Output 0 0.3979nC
D1 0 Limiter_Output 1N4148
C2 Vout 0 0.3979nC
L3 Limiter_Output 0 497.39nH
L2 Vout 0 497.39nH
L1 N001 Limiter_Output 1989.55nH
VAntenna RX_SIG 0 SINE(0 5 10000000) AC 0
D2 Limiter_Output 0 1N4148
C3 Vout N001 0.0994787nC
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5us
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1440 680
WIRE 80 240 -16 240
WIRE 256 240 160 240
WIRE 864 240 256 240
WIRE 912 240 864 240
WIRE 1040 240 992 240
WIRE 1152 240 1104 240
WIRE 1312 240 1152 240
WIRE -16 288 -16 240
WIRE 256 288 256 240
WIRE 256 288 208 288
WIRE 288 288 256 288
WIRE 864 288 864 240
WIRE 864 288 800 288
WIRE 1152 288 1152 240
WIRE 1152 288 1104 288
WIRE 1312 288 1312 240
WIRE 864 304 864 288
WIRE 1152 304 1152 288
WIRE 256 352 208 352
WIRE 288 352 256 352
WIRE 864 368 800 368
WIRE 1152 368 1104 368
WIRE -16 400 -16 368
WIRE 128 400 -16 400
WIRE 256 400 256 352
WIRE 256 400 128 400
WIRE 864 416 864 368
WIRE 912 416 864 416
WIRE 1152 416 1152 368
WIRE 1152 416 912 416
WIRE 1312 416 1312 368
WIRE 1312 416 1152 416
SYMBOL Res 1296 272 R0
SYMATTR InstName RL1
SYMATTR Value 50
SYMBOL Cap 1104 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 0.0994787nC
SYMBOL Cap 1136 304 R0
SYMATTR InstName C2
SYMATTR Value 0.3979nC
SYMBOL diode 224 352 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL Voltage -16 272 R0
WINDOW 123 24 118 Left 2
SYMATTR Value2 AC 0
SYMATTR InstName Antenna
SYMATTR Value SINE(0 5 10000000)
SYMBOL Cap 848 304 R0
SYMATTR InstName C1
SYMATTR Value 0.3979nC
SYMBOL ind 1088 272 R0
WINDOW 0 -31 35 Left 2
WINDOW 3 -51 86 Left 2
SYMATTR InstName L2
SYMATTR Value 497.39nH
SYMBOL Ind 1008 224 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value 1989.55nH
SYMBOL diode 272 288 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL Ind 784 272 R0
WINDOW 0 -43 38 Left 2
WINDOW 3 -55 81 Left 2
SYMATTR InstName L3
SYMATTR Value 497.39nH
SYMBOL Res 176 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
FLAG 128 400 0
FLAG 256 240 Limiter_Output
FLAG -16 240 RX_SIG
FLAG 912 416 0
FLAG 1312 240 Vout
TEXT 368 464 Left 2 ;.ac oct 10K 100K 500000K
TEXT 368 536 Left 2 !.tran 5us
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6406.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6406.asy)
V1 +V 0 3
C1 N005 0 .1
R1 N003 N002 402
R2 N008 N007 402
XU1 N007 N005 +V N008 N003 0 NC_01 N002 N004 N006 LTC6406 ;pnba IN-)Vocm)V+)OUT+)OUT-)V-)_SHDN)IN+)OUTF+)OUTF-
R3 N007 0 100
R4 N002 N001 100
V2 N001 0 sine(0 .2 1Meg)
.tran 10u
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 980 680
WIRE -48 0 -240 0
WIRE 48 0 32 0
WIRE 272 0 48 0
WIRE 416 0 352 0
WIRE -240 16 -240 0
WIRE 192 64 192 48
WIRE -240 112 -240 96
WIRE 416 112 416 0
WIRE 416 112 384 112
WIRE 48 160 48 0
WIRE 80 160 48 160
WIRE 400 176 384 176
WIRE -16 208 -32 208
WIRE 80 208 48 208
WIRE 400 240 384 240
WIRE 80 256 48 256
WIRE -240 288 -240 272
WIRE 416 304 384 304
WIRE -240 384 -240 368
WIRE 192 384 192 352
WIRE -48 416 -64 416
WIRE 48 416 48 256
WIRE 48 416 32 416
WIRE 256 416 48 416
WIRE 416 416 416 304
WIRE 416 416 336 416
SYMBOL voltage -240 272 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL cap 48 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL res 48 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL res 48 400 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL opamps\\LTC6406 208 208 R0
SYMATTR InstName U1
SYMBOL res 352 400 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 402
SYMBOL voltage -240 0 R0
SYMATTR InstName V2
SYMATTR Value sine(0 .2 1Meg)
SYMBOL res 368 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 402
FLAG -240 272 +V
FLAG 192 48 +V
FLAG -240 384 0
FLAG 192 384 0
FLAG -64 416 0
FLAG -240 112 0
FLAG -32 208 0
TEXT 240 496 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1728-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1728-3.3.asy)
V1 N001 0 5
V4 N003 0 PWL(0 3.3 1 3.3 2 3 3 3.3)
R1 N002 N001 10K
XU1 N002 0 N004 N005 N003 LTC1728-3.3 ;pnba _RST)GND)VccA)Vcc1.8)Vcc3
V3 N005 0 PWL(0 1.8 4 1.8 5 1.5 6 1.8)
V2 N004 0 PWL(0 1.05 7 1.05 8 .95 9 1.05)
.tran 10
.lib LTC1728-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1100 756
WIRE -160 144 -224 144
WIRE 48 144 -80 144
WIRE 464 144 272 144
WIRE 464 160 464 144
WIRE -224 176 -224 144
WIRE 48 208 16 208
WIRE 464 256 464 240
WIRE 48 272 -64 272
WIRE 384 272 272 272
WIRE -224 288 -224 256
WIRE 384 288 384 272
WIRE -64 304 -64 272
WIRE 384 384 384 368
WIRE -64 416 -64 384
SYMBOL voltage -64 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 1.05 7 1.05 8 .95 9 1.05)
SYMBOL voltage 384 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 1.8 4 1.8 5 1.5 6 1.8)
SYMBOL LTC1728-3.3 160 240 R0
SYMATTR InstName U1
SYMBOL voltage 464 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value PWL(0 3.3 1 3.3 2 3 3 3.3)
SYMBOL res -64 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -224 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 16 208 0
FLAG -224 288 0
FLAG -64 416 0
FLAG 384 384 0
FLAG 464 256 0
TEXT 528 432 Left 2 !.tran 10
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6658-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6658-1.2.asy)
C2 OUT2 0 1
C1 N001 0 1
C3 OUT1 0 1
V3 IN 0 PWL(0 0 100u 0 +2u 4.5)
XU1 IN IN IN IN N001 OUT1 OUT1 OUT2 OUT2 0 N002 LT6658-1.2 ;pnba Vin)Vin1)Vin2)_OD)Bypass)Vout1_F)Vout1_S)Vout2_F)Vout2_S)Gnd)NR
.tran 500u
.lib LT6658.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1448 1048
WIRE 16 -32 -336 -32
WIRE 128 -32 16 -32
WIRE 224 -32 128 -32
WIRE 320 -32 224 -32
WIRE -336 0 -336 -32
WIRE 128 0 128 -32
WIRE 224 0 224 -32
WIRE 320 0 320 -32
WIRE 432 64 416 64
WIRE 496 64 432 64
WIRE 496 80 496 64
WIRE -336 96 -336 80
WIRE 432 144 432 64
WIRE 432 144 416 144
WIRE 496 160 496 144
WIRE 16 192 16 -32
WIRE 48 192 16 192
WIRE 432 224 416 224
WIRE 480 224 432 224
WIRE 480 240 480 224
WIRE 432 304 432 224
WIRE 432 304 416 304
WIRE 480 320 480 304
WIRE 128 400 128 384
WIRE 224 400 224 384
WIRE 320 400 320 384
WIRE 224 480 224 464
SYMBOL cap 480 80 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL LT6658-1.2 224 192 R0
SYMATTR InstName U1
SYMBOL cap 208 400 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 464 240 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL voltage -336 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 0 100u 0 +2u 4.5)
FLAG 128 400 0
FLAG 224 480 0
FLAG -336 96 0
FLAG 496 160 0
FLAG 480 320 0
FLAG -336 -32 IN
FLAG 496 64 OUT2
FLAG 480 224 OUT1
TEXT 464 464 Left 2 !.tran 500u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3443.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3443.asy)
L1 N001 N002 6
C1 N003 N005 560p Rser=15K
R2 N003 0 200K
XU1 N004 0 0 N001 N002 MP_01 0 OUT IN IN N005 N003 LTC3443 ;pnba _SHDN/SS)GND)PGND)SW1)SW2))MODE)Vout)PVin)Vin)Vc)FB
Rload OUT 0 3.3
C3 N004 0 .001
C2 OUT 0 22 Rser=10m
C4 N003 OUT 220p Rser=2.2K
V1 IN 0 3
R3 IN N004 500K
R1 OUT N003 340K
.tran 1m startup
.lib LTC3443.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2728 2324
WIRE 1824 1232 1664 1232
WIRE 2048 1232 1904 1232
WIRE 1664 1328 1664 1232
WIRE 1696 1328 1664 1328
WIRE 2048 1328 2048 1232
WIRE 2048 1328 2016 1328
WIRE 1568 1408 1456 1408
WIRE 1664 1408 1568 1408
WIRE 1696 1408 1664 1408
WIRE 2160 1408 2016 1408
WIRE 2320 1408 2160 1408
WIRE 2416 1408 2320 1408
WIRE 2496 1408 2416 1408
WIRE 1456 1424 1456 1408
WIRE 2160 1424 2160 1408
WIRE 2416 1424 2416 1408
WIRE 2496 1424 2496 1408
WIRE 2320 1440 2320 1408
WIRE 1568 1456 1568 1408
WIRE 1664 1488 1664 1408
WIRE 1696 1488 1664 1488
WIRE 2160 1488 2016 1488
WIRE 1456 1520 1456 1504
WIRE 2416 1520 2416 1488
WIRE 2496 1520 2496 1504
WIRE 1568 1568 1568 1536
WIRE 1696 1568 1568 1568
WIRE 2080 1568 2016 1568
WIRE 2160 1568 2160 1488
WIRE 2160 1568 2144 1568
WIRE 2320 1568 2320 1520
WIRE 2320 1568 2160 1568
WIRE 1568 1584 1568 1568
WIRE 2320 1584 2320 1568
WIRE 1696 1648 1680 1648
WIRE 2032 1648 2016 1648
WIRE 1568 1664 1568 1648
WIRE 2320 1680 2320 1664
WIRE 1856 1728 1856 1712
SYMBOL cap 2144 1552 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 123 56 33 VTop 2
SYMATTR InstName C1
SYMATTR Value 560p
SYMATTR Value2 Rser=15K
SYMBOL cap 2144 1488 M180
WINDOW 0 24 64 Left 2
WINDOW 3 42 32 Left 2
WINDOW 123 25 -3 Left 2
SYMATTR InstName C4
SYMATTR Value 220p
SYMATTR Value2 Rser=2.2K
SYMBOL cap 2400 1424 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMATTR SpiceLine Rser=10m
SYMBOL VOLTAGE 1456 1408 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res 2304 1424 R0
SYMATTR InstName R1
SYMATTR Value 340K
SYMBOL res 2480 1408 R0
SYMATTR InstName Rload
SYMATTR Value 3.3
SYMBOL res 2304 1568 R0
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL cap 1552 1584 R0
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL PowerProducts\\LTC3443 1856 1520 R0
SYMATTR InstName U1
SYMBOL res 1552 1440 R0
SYMATTR InstName R3
SYMATTR Value 500K
SYMBOL ind 1808 1248 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6
FLAG 2032 1648 0
FLAG 1456 1520 0
FLAG 2320 1680 0
FLAG 2416 1520 0
FLAG 2496 1520 0
FLAG 1568 1664 0
FLAG 2496 1408 OUT
FLAG 1680 1648 0
FLAG 1856 1728 0
FLAG 1456 1408 IN
TEXT 2072 1696 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\02550086b105_Fig14_5.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Vout
VDDby2 P001 0 500m
C1 Vout 0 50f
M1 Vout 0 P001 0 N_50n l=50n w=500n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 40u
.lib cmosedu_models.txt
.ic v(vout)=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3172 680
WIRE 272 -128 272 -176
WIRE 400 -176 272 -176
WIRE 448 -256 448 -304
WIRE 592 -304 448 -304
WIRE 720 -304 592 -304
WIRE 720 -288 720 -304
WIRE 720 -192 720 -224
SYMBOL cap 704 -288 R0
SYMATTR InstName C1
SYMATTR Value 50f
SYMBOL voltage 448 -176 R0
WINDOW 0 36 40 Left 0
WINDOW 3 38 69 Left 0
SYMATTR InstName VDDby2
SYMATTR Value 500m
SYMBOL nmos4 400 -256 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
FLAG 448 -208 0
FLAG 448 -80 0
FLAG 272 -128 0
FLAG 720 -192 0
FLAG 592 -304 Vout
TEXT 448 -40 Left 0 !.tran 40u
TEXT 448 -16 Left 0 !.lib cmosedu_models.txt
TEXT 288 -272 Left 0 ;Plot Vout
TEXT 592 -40 Left 0 !.ic v(vout)=1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT4423.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT4423.asy)
XU1 IN IN OUT NC_01 0 LT4423 ;pnba SHDN#)IN)OUT)STATUS)GND
V1 IN 0 12
C1 IN 0 0.1
R1 OUT 0 1
C2 OUT 0 47
.tran 1m startup
.lib LT4423.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -192 96 -208 96
WIRE -96 96 -192 96
WIRE -32 96 -96 96
WIRE 16 96 -32 96
WIRE 608 96 480 96
WIRE 688 96 608 96
WIRE 720 96 688 96
WIRE -208 144 -208 96
WIRE 608 144 608 96
WIRE 720 144 720 96
WIRE -96 160 -96 96
WIRE -32 176 -32 96
WIRE 16 176 -32 176
WIRE 608 256 608 208
WIRE 720 256 720 224
WIRE -208 272 -208 224
WIRE -96 272 -96 224
WIRE 240 336 240 272
SYMBOL res 704 128 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL voltage -208 128 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap -112 160 R0
SYMATTR InstName C1
SYMATTR Value 0.1
SYMBOL cap 592 144 R0
SYMATTR InstName C2
SYMATTR Value 47
SYMBOL LT4423 240 160 R0
SYMATTR InstName U1
FLAG 240 336 0
FLAG -96 272 0
FLAG 608 256 0
FLAG -208 272 0
FLAG -192 96 IN
FLAG 688 96 OUT
FLAG 720 256 0
TEXT -216 360 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\395a7f0428dd_Fig16_65.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot -I(VGS)
VGS VGS 0 1
M1 0 VGS N001 0 N_50n l=50n w=500n
R1 N001 0 1G
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib cmosedu_models.txt
.dc VGS 0 2 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1748 680
WIRE 384 -128 384 -144
WIRE 384 -96 384 -128
WIRE 384 16 384 -16
WIRE 576 -144 384 -144
WIRE 624 -224 624 -256
WIRE 624 -96 624 -128
WIRE 624 16 624 -16
WIRE 848 -256 624 -256
WIRE 848 -192 848 -256
SYMBOL res 608 -112 R0
SYMATTR InstName R1
SYMATTR Value 1G
SYMBOL voltage 384 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 40 53 Invisible 0
WINDOW 0 39 62 Left 0
SYMATTR Value 1
SYMATTR InstName VGS
SYMBOL nmos4 576 -224 R0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
WINDOW 123 72 66 Left 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
FLAG 624 -176 0
FLAG 384 16 0
FLAG 384 -128 VGS
FLAG 848 -192 0
FLAG 624 16 0
TEXT 368 88 Left 0 !.lib cmosedu_models.txt
TEXT 368 64 Left 0 !.dc VGS 0 2 1m
TEXT 416 -264 Left 0 ;Plot -I(VGS)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1550LCS8-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1550LCS8-2.5.asy)
C3 OUT 0 10
C1 N001 0 .1
V1 IN 0 4.5
Rload OUT 0 1K
C2 N003 N002 .1
XU1 IN IN N002 OUT N003 0 N001 OUT LTC1550LCS8-2.5 ;pnba _SHDN)Vin)C+)Vout)C-)GND)CPout)REG
.tran 1m startup
.lib LTC1550LCS8-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1600 1220
WIRE 576 720 144 720
WIRE 208 784 32 784
WIRE 240 784 208 784
WIRE 576 784 576 720
WIRE 576 784 528 784
WIRE 32 800 32 784
WIRE 208 848 208 784
WIRE 240 848 208 848
WIRE 560 848 528 848
WIRE 656 848 624 848
WIRE 32 896 32 880
WIRE 240 912 208 912
WIRE 544 912 528 912
WIRE 144 976 144 720
WIRE 144 976 32 976
WIRE 240 976 144 976
WIRE 544 976 528 976
WIRE 32 992 32 976
WIRE 144 992 144 976
WIRE 32 1088 32 1072
WIRE 144 1104 144 1056
WIRE 208 1104 208 912
WIRE 352 1104 208 1104
WIRE 544 1104 544 976
WIRE 544 1104 416 1104
SYMBOL cap 128 992 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL PowerProducts\\LTC1550LCS8-2.5 384 880 R0
SYMATTR InstName U1
SYMBOL cap 560 864 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL RES 16 976 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL VOLTAGE 32 784 R0
SYMATTR InstName V1
SYMATTR Value 4.5
SYMBOL cap 416 1088 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .1
FLAG 656 848 0
FLAG 544 912 0
FLAG 32 896 0
FLAG 32 1088 0
FLAG 144 1104 0
FLAG 32 784 IN
FLAG 32 976 OUT
TEXT 616 1064 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1565.asc
* Generated by LTspice 26.0.1 for Windows.
* SCHEMATIC PARAMETERS-\nvvar controls the offset voltage\nfvar controls the frequency response\ngvar controls the gain\n \nEach parameter can be varied from -1 to +1 to see variations in the filter.\nFor "typical" performance, set the paramters to 0.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\FilterProducts\LTC1565.asy)
E2 OUT 0 OUTP OUTM 1
E3 N001 CMI IN 0 0.5
V2 IN 0 PWL(0 -1 10u -1 11u 1) AC 1 0
XU1 N001 N002 N003 0 SDX N004 OUTM OUTP LTC1565 vvar={vvar} fvar={fvar} gvar={gvar} ;pnba +IN)-IN)GND)V-)_SHDN)V+)-OUT)+OUT
C1 N003 0 .1
V1 N004 0 5
E1 N002 CMI IN 0 -0.5
V3 CMI 0 2.0
.ac oct 100 10e3 5e6
.param fvar=0 vvar=0 gvar=0
.step param fvar list -1 0 1
.lib LTC1565.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1160 692
WIRE -96 80 -256 80
WIRE 464 80 416 80
WIRE -256 96 -256 80
WIRE -352 112 -672 112
WIRE -304 112 -352 112
WIRE -96 112 -96 80
WIRE -32 112 -96 112
WIRE 304 112 256 112
WIRE 368 112 304 112
WIRE 416 112 416 80
WIRE -672 128 -672 112
WIRE 368 128 368 112
WIRE -304 176 -304 160
WIRE -32 192 -96 192
WIRE 304 192 256 192
WIRE 368 192 368 176
WIRE 368 192 304 192
WIRE -256 208 -256 176
WIRE -176 208 -256 208
WIRE 416 208 416 192
WIRE -96 224 -96 192
WIRE -96 224 -256 224
WIRE -672 240 -672 208
WIRE -256 240 -256 224
WIRE -352 256 -352 112
WIRE -304 256 -352 256
WIRE -32 272 -96 272
WIRE 416 272 256 272
WIRE -176 288 -176 208
WIRE -96 288 -96 272
WIRE 416 288 416 272
WIRE -304 320 -304 304
WIRE -256 352 -256 320
WIRE -176 352 -176 288
WIRE -176 352 -256 352
WIRE -32 352 -96 352
WIRE 288 352 256 352
WIRE -256 384 -256 352
WIRE 416 384 416 368
WIRE -96 400 -96 352
WIRE -256 480 -256 464
SYMBOL voltage -256 368 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 2.0
SYMBOL cap -112 288 R0
WINDOW 3 29 47 Left 2
SYMATTR Value .1
SYMATTR InstName C1
SYMBOL voltage 416 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL e 416 96 R0
SYMATTR InstName E2
SYMATTR Value 1
SYMBOL voltage -672 112 R0
WINDOW 123 41 58 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1 0
SYMATTR InstName V2
SYMATTR Value PWL(0 -1 10u -1 11u 1)
SYMBOL e -256 224 R0
SYMATTR InstName E1
SYMATTR Value -0.5
SYMBOL e -256 80 R0
SYMATTR InstName E3
SYMATTR Value 0.5
SYMBOL FilterProducts\\LTC1565 112 224 R0
SYMATTR InstName U1
SYMATTR SpiceLine vvar={vvar} fvar={fvar} gvar={gvar}
FLAG -96 400 0
FLAG 416 384 0
FLAG -672 240 0
FLAG -256 480 0
FLAG 416 208 0
FLAG 304 112 OUTP
FLAG 304 192 OUTM
FLAG 464 80 OUT
FLAG -672 112 IN
FLAG -176 288 CMI
FLAG 288 352 SDX
FLAG -304 176 0
FLAG -304 320 0
TEXT -712 -80 Left 2 !.ac oct 100 10e3 5e6\n.param fvar=0 vvar=0 gvar=0\n.step param fvar list  -1 0 1
TEXT -232 -192 Left 2 ;SCHEMATIC PARAMETERS-\nvvar controls the offset voltage\nfvar controls the frequency response\ngvar controls the gain\n \nEach parameter can be varied from -1 to +1 to see variations in the filter.\nFor "typical" performance, set the paramters to 0.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8061-8.4.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8061-8.4.asy)
C1 OUT 0 .1m
C3 N001 0 4.7
V1 IN 0 12
XU1 N001 N001 N001 N002 N003 0 N005 N004 OUT IN OUT MP_01 0 LTM8061-8.4 ;pnba Vin)VinC/CLP)RUN)_CHRG)_Fault)TMR)RNG/SS)NTC)BAT)VinA)Bias))GND
.tran 3m startup
.lib LTM8061-8.4.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 80 -64 -32 -64
WIRE 384 -64 368 -64
WIRE 496 -64 384 -64
WIRE -32 -48 -32 -64
WIRE 496 -48 496 -64
WIRE 80 32 64 32
WIRE 384 32 384 -64
WIRE 384 32 368 32
WIRE 496 32 496 16
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 80 128 64 128
WIRE 384 128 368 128
WIRE -16 224 -32 224
WIRE 64 224 64 128
WIRE 64 224 48 224
WIRE 80 224 64 224
WIRE 384 224 368 224
WIRE 80 320 64 320
WIRE 384 320 368 320
WIRE 80 416 64 416
WIRE 384 416 368 416
SYMBOL PowerProducts\\LTM8061-8.4 224 176 R0
SYMATTR InstName U1
SYMBOL voltage -32 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 48 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 4.7
SYMBOL cap 480 -48 R0
SYMATTR InstName C1
SYMATTR Value .1m
FLAG 64 416 0
FLAG -32 48 0
FLAG 496 32 0
FLAG -32 -64 IN
FLAG 496 -64 OUT
FLAG -32 224 0
FLAG 64 320 0
TEXT 472 416 Left 2 !.tran 3m startup
* Z:\tmp\asc_dec_bjh7r6w2\033f19c81984_Draft1_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
Vbn N004 0 0.6
Vpb VDD N001 0.8
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 680
WIRE -272 32 -352 32
WIRE -176 32 -272 32
WIRE -96 32 -176 32
WIRE -16 32 -96 32
WIRE -96 96 -96 32
WIRE -144 112 -272 112
WIRE -16 144 -96 144
WIRE -352 224 -352 176
WIRE -96 256 -96 192
WIRE -272 416 -352 416
WIRE -144 416 -192 416
WIRE -352 512 -352 416
SYMBOL voltage -352 496 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vbn
SYMATTR Value 0.6
SYMBOL voltage -272 16 R0
SYMATTR InstName Vpb
SYMATTR Value 0.8
FLAG -352 592 0
FLAG -352 304 0
FLAG -352 176 VDD
FLAG -176 32 VDD