Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1767-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1767-2.5.asy)
D1 0 N002 MBRS130L
C3 OUT 0 2.2
C2 N005 0 4000p
C1 N001 N002 .1
XU1 N001 IN N002 0 N003 OUT N004 LT1767-x.x top=10.92 bot=10.08 ;pnba Boost)Vin)SW)GND)_SHDN)FB)Vc
V1 IN 0 5
L1 N002 OUT 5
Rload OUT 0 5
R1 N005 N004 1K
D2 OUT N001 1N914
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 200u startup
.lib LT1767-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2972 1416
WIRE 2160 912 1824 912
WIRE 2224 912 2160 912
WIRE 2336 912 2288 912
WIRE 2160 928 2160 912
WIRE 1824 992 1824 912
WIRE 2160 1008 2160 992
WIRE 2160 1008 2128 1008
WIRE 2224 1008 2160 1008
WIRE 2336 1008 2336 912
WIRE 2336 1008 2304 1008
WIRE 2400 1008 2336 1008
WIRE 2400 1024 2400 1008
WIRE 1680 1056 1552 1056
WIRE 2128 1056 2128 1008
WIRE 2128 1056 1968 1056
WIRE 2160 1056 2160 1008
WIRE 1552 1072 1552 1056
WIRE 1680 1120 1664 1120
WIRE 2128 1120 1968 1120
WIRE 2400 1120 2400 1104
WIRE 2160 1136 2160 1120
WIRE 1552 1168 1552 1152
WIRE 2128 1168 2128 1120
WIRE 2336 1168 2336 1008
WIRE 2336 1168 2128 1168
WIRE 1984 1184 1968 1184
WIRE 2080 1184 2064 1184
WIRE 2336 1184 2336 1168
WIRE 2080 1200 2080 1184
WIRE 1824 1264 1824 1248
WIRE 2336 1264 2336 1248
WIRE 2080 1280 2080 1264
SYMBOL RES 2080 1168 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL diode 2288 896 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL VOLTAGE 1552 1056 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2064 1200 R0
SYMATTR InstName C2
SYMATTR Value 4000p
SYMBOL cap 2144 928 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL schottky 2144 1120 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS130L
SYMBOL res 2384 1008 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL cap 2320 1184 R0
WINDOW 3 27 54 Left 2
SYMATTR Value 2.2
SYMATTR InstName C3
SYMBOL PowerProducts\\LT1767-2.5 1824 1120 R0
SYMATTR InstName U1
SYMBOL ind 2208 1024 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 5
FLAG 2080 1280 0
FLAG 1824 1264 0
FLAG 2160 1136 0
FLAG 2336 1264 0
FLAG 1552 1168 0
FLAG 2400 1120 0
FLAG 2400 1008 OUT
FLAG 1552 1056 IN
TEXT 2184 1312 Left 2 !.tran 200u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\130a9fff8c2b_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 N004 0 0 BC547B
R2 N002 N001 99
V2 N002 0 10
R1 N004 N003 99k
V1 N003 0 9
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V2 0 10 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 80 224 80
WIRE 544 80 464 80
WIRE -32 96 -144 96
WIRE 128 96 48 96
WIRE 224 112 224 80
WIRE -144 144 -144 96
WIRE 544 144 544 80
WIRE 128 160 128 96
WIRE 160 160 128 160
WIRE -144 288 -144 224
WIRE 224 288 224 208
WIRE 544 288 544 224
SYMBOL voltage 544 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 10
SYMBOL res 64 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 99k
SYMBOL npn 160 112 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL voltage -144 128 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL res 480 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 99
FLAG 224 288 0
FLAG 544 288 0
FLAG -144 288 0
TEXT 112 -112 Left 2 !.dc V2 0 10 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\0e3b1b8edb5f_BPF_Chebyshev.asc
* Generated by LTspice 26.0.1 for Windows.
* 3rd Order Chebyshev Bandpass\nConventional, Shunt First\nLower Cutoff Freq. = 6.9 MHz; Upper Cutoff Freq. = 7.1802 MHz\nPassband Ripple = 0.10 dB\n\nrf-tools.com | May 02 2022 16:16
L1 N001 0 43.20n
C2 N001 N002 15.80p
L3 N003 0 43.20n
L2 N002 N003 32.40
RL N003 0 50
C1 N001 0 11.80n
C3 N003 0 11.80n
V1 N001 0 AC 1 0 Rser=50.00
.ac dec 1001 5.098Meg 9.719Meg
.net I(RL) V1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1200 400
WIRE 0 0 0 64
WIRE 0 144 0 208
WIRE 0 0 208 0
WIRE 208 0 208 64
WIRE 208 128 208 208
WIRE 208 0 416 0
WIRE 416 0 416 64
WIRE 416 144 416 208
WIRE 416 0 480 0
WIRE 544 0 608 0
WIRE 688 0 752 0
WIRE 736 0 736 64
WIRE 736 128 736 208
WIRE 736 0 944 0
WIRE 944 0 944 64
WIRE 944 144 944 208
WIRE 944 0 1152 0
WIRE 1152 0 1152 64
WIRE 1152 144 1152 208
SYMBOL voltage 0 48 R0
WINDOW 123 40 48 Left 2
WINDOW 39 39 77 Left 2
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMATTR SpiceLine Rser=50.00
SYMBOL ind 592 16 R270
SYMATTR InstName L2
SYMATTR Value 32.40u
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMBOL cap 480 16 R270
SYMATTR InstName C2
SYMATTR Value 15.80p
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMBOL res 1136 48 R0
SYMATTR InstName RL
SYMATTR Value 50
SYMBOL ind 400 48 R0
SYMATTR InstName L1
SYMATTR Value 43.20n
SYMBOL ind 928 48 R0
SYMATTR InstName L3
SYMATTR Value 43.20n
SYMBOL cap 720 64 R0
SYMATTR InstName C3
SYMATTR Value 11.80n
SYMBOL cap 192 64 R0
SYMATTR InstName C1
SYMATTR Value 11.80n
FLAG 0 208 0
FLAG 208 208 0
FLAG 416 208 0
FLAG 736 208 0
FLAG 944 208 0
FLAG 1152 208 0
TEXT 16 -288 Left 2 !.ac dec 1001 5.098Meg 9.719Meg
TEXT 16 -240 Left 2 !.net I(RL) V1
TEXT 480 -288 Left 2 ;3rd Order Chebyshev Bandpass\nConventional, Shunt First\nLower Cutoff Freq. = 6.9 MHz; Upper Cutoff Freq. = 7.1802 MHz\nPassband Ripple = 0.10 dB\n\nrf-tools.com | May 02 2022 16:16
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3013.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3013.asy)
C2 0 N004 1000p
R2 N002 0 249K
V1 N001 0 PWL(0 0 1 10)
R3 N001 N003 1.6Meg
XU2 MP_01 OUT MP_02 N002 0 N003 N004 N001 MP_03 N001 LT3013 ;pnba )OUT))ADJ)GND)PwrGD)Ct)_SHDN))IN
R1 OUT N002 750K
Rload OUT 0 100
C1 OUT 0 3.3
.tran 1
.lib LT3013.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 80 -208 80
WIRE 80 80 0 80
WIRE 112 80 80 80
WIRE 576 80 400 80
WIRE 688 80 576 80
WIRE 784 80 688 80
WIRE 784 96 784 80
WIRE -208 112 -208 80
WIRE 688 112 688 80
WIRE 0 128 0 80
WIRE 80 160 80 80
WIRE 112 160 80 160
WIRE 576 160 400 160
WIRE 576 176 576 160
WIRE 688 192 688 176
WIRE 784 192 784 176
WIRE -208 224 -208 192
WIRE 0 240 0 208
WIRE 112 240 0 240
WIRE 416 240 400 240
WIRE 512 240 480 240
WIRE 576 272 576 256
WIRE 256 304 256 288
SYMBOL res 768 80 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 672 112 R0
SYMATTR InstName C1
SYMATTR Value 3.3
SYMBOL LT3013 256 160 R0
SYMATTR InstName U2
SYMBOL voltage -208 96 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 560 160 R0
SYMATTR InstName R2
SYMATTR Value 249K
SYMBOL cap 480 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL res 560 64 R0
SYMATTR InstName R1
SYMATTR Value 750K
SYMBOL res -16 112 R0
SYMATTR InstName R3
SYMATTR Value 1.6Meg
FLAG 256 304 0
FLAG -208 224 0
FLAG 784 192 0
FLAG 688 192 0
FLAG 576 272 0
FLAG 784 80 OUT
FLAG 512 240 0
TEXT 728 264 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\024ac841a257_Fig9_24_pmos.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1) and 1/d(Id(M1)) (to get ro)
VSD 0 N002 0
M1 0 N001 N002 0 P_1u l=2u w=30u
VSG 0 N001 1.15
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSD 0 5 1m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 688
WIRE 320 96 320 80
WIRE 320 192 320 176
WIRE 400 192 320 192
WIRE 448 80 320 80
WIRE 448 112 448 80
WIRE 448 304 448 208
WIRE 672 80 448 80
WIRE 672 160 448 160
WIRE 672 160 672 80
WIRE 672 192 672 160
WIRE 672 304 448 304
WIRE 672 304 672 272
WIRE 848 80 672 80
WIRE 848 112 848 80
SYMBOL pmos4 400 112 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=2u w=30u
SYMATTR InstName M1
SYMATTR Value P_1u
SYMBOL voltage 320 80 R0
WINDOW 0 -93 54 Left 0
WINDOW 3 -93 82 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VSG
SYMATTR Value 1.15
SYMBOL voltage 672 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 38 54 Left 0
WINDOW 3 24 104 Invisible 0
SYMATTR InstName VSD
SYMATTR Value 0
FLAG 848 112 0
TEXT 384 336 Left 0 !.dc VSD 0 5 1m
TEXT 384 360 Left 0 !.lib cmosedu_models.txt
TEXT 368 48 Left 0 ;Plot Id(M1) and 1/d(Id(M1)) (to get ro)
* Z:\tmp\asc_dec_bjh7r6w2\0ec10bfb3a6e_Lab_1_Circ_3__Vin_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R4 N002 V_02 10k
XU1 V1 V_01 Vcc Vss V_01 LM324 ;pnba In+)In-)V+)V-)OUT
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1560 680
WIRE 192 -320 176 -320
WIRE 400 -320 272 -320
WIRE 528 -320 480 -320
WIRE 64 -208 48 -208
WIRE 176 -208 176 -320
WIRE 176 -208 144 -208
WIRE 352 -208 176 -208
WIRE 528 -208 528 -320
WIRE 592 -208 528 -208
WIRE 704 -208 672 -208
WIRE 48 -192 48 -208
WIRE 176 -96 176 -208
WIRE 192 -96 176 -96
WIRE 528 -96 528 -208
WIRE 544 -96 528 -96
WIRE 352 -80 352 -208
WIRE 352 -80 256 -80
WIRE 368 -80 352 -80
WIRE 704 -80 704 -208
WIRE 704 -80 608 -80
WIRE 720 -80 704 -80
WIRE 192 -64 160 -64
WIRE 544 -64 528 -64
SYMBOL res 576 -192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL OpAmps\\opamp2 224 -144 R0
SYMATTR InstName U1
SYMATTR Value LM324
FLAG 48 -192 0
FLAG 224 -112 Vcc
FLAG 224 -48 Vss
FLAG 720 -80 V_02
FLAG 160 -64 V1
FLAG 368 -80 V_01
FLAG 576 -112 Vcc
FLAG 576 -48 Vss
FLAG 528 -64 V2
* Z:\home\khalils\Downloads\files\data\raw_asc\126d185ee445_Simulation_Bonus.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N002 N002 N003 N003 Mosfet1
V2 N005 0 -15
M4 N001 N002 N004 N004 Mosfet4
R1 N001 N002 5.3k
M3 N004 N003 N005 N005 Mosfet3
V1 N001 0 15
M2 N003 N003 N005 N005 Mosfet2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model Mosfet1 NMOS(Kp = 0.02, Vto= 1, Lambda = 0)
.model Mosfet2 NMOS(Kp = 0.02, Vto= 1, Lambda = 0)
.model Mosfet3 NMOS(Kp = 0.02, Vto= 1, Lambda = 0)
.model Mosfet4 NMOS(Kp = 0.02, Vto= 1, Lambda = 0)
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1464 868
WIRE 480 -192 432 -192
WIRE 432 -176 432 -192
WIRE 480 -176 480 -192
WIRE 432 -64 432 -96
WIRE 432 -64 160 -64
WIRE 704 -64 432 -64
WIRE 160 112 160 -64
WIRE 160 224 160 192
WIRE 432 224 160 224
WIRE 160 272 160 224
WIRE 704 272 704 -64
WIRE 160 320 96 320
WIRE 768 320 704 320
WIRE 432 352 432 224
WIRE 432 352 208 352
WIRE 656 352 432 352
WIRE 96 384 96 320
WIRE 160 384 160 368
WIRE 160 384 96 384
WIRE 704 384 704 368
WIRE 768 384 768 320
WIRE 768 384 704 384
WIRE 160 432 160 384
WIRE 432 432 160 432
WIRE 160 464 160 432
WIRE 704 464 704 384
WIRE 160 512 96 512
WIRE 768 512 704 512
WIRE 432 544 432 432
WIRE 432 544 208 544
WIRE 656 544 432 544
WIRE 96 576 96 512
WIRE 160 576 160 560
WIRE 160 576 96 576
WIRE 704 576 704 560
WIRE 768 576 768 512
WIRE 768 576 704 576
WIRE 160 624 160 576
WIRE 432 624 160 624
WIRE 704 624 704 576
WIRE 704 624 432 624
WIRE 432 672 432 624
WIRE 432 816 432 752
SYMBOL nmos4 208 272 M0
SYMATTR InstName M1
SYMATTR Value Mosfet1
SYMBOL nmos4 208 464 M0
SYMATTR InstName M2
SYMATTR Value Mosfet2
SYMBOL res 144 96 R0
SYMATTR InstName R1
SYMATTR Value 5.3k
SYMBOL voltage 432 656 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL nmos4 656 272 R0
SYMATTR InstName M4
SYMATTR Value Mosfet4
SYMBOL voltage 432 -80 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL nmos4 656 464 R0
SYMATTR InstName M3
SYMATTR Value Mosfet3
FLAG 432 816 0
FLAG 480 -176 0
TEXT 824 296 Left 2 !.model Mosfet1 NMOS(Kp = 0.02, Vto= 1, Lambda = 0)
TEXT 824 320 Left 2 !.model Mosfet2 NMOS(Kp = 0.02, Vto= 1, Lambda = 0)
TEXT 824 344 Left 2 !.model Mosfet3 NMOS(Kp = 0.02, Vto= 1, Lambda = 0)
TEXT 824 368 Left 2 !.model Mosfet4 NMOS(Kp = 0.02, Vto= 1, Lambda = 0)
TEXT 824 280 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1819.asc
* Generated by LTspice 26.0.1 for Windows.
* 80MHz, 20dB Gain Block
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1819.asy)
R2 N002 0 200
XU2 N003 N001 OUT +V -V LT1818 ;pnba IN+)IN-)OUT)VCC)VEE
XU1 IN N002 N003 +V -V LT1818 ;pnba IN+)IN-)OUT)VCC)VEE
V3 IN 0 AC 1
V1 +V 0 5
V2 -V 0 -5
R4 N001 0 200
R3 OUT N001 432
R1 N003 N002 432
.ac oct 10 100K 100Meg
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 240 32 224 32
WIRE 336 32 320 32
WIRE 352 32 336 32
WIRE 464 32 432 32
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -160 160 -160 144
WIRE -64 160 -64 144
WIRE 400 192 400 176
WIRE 192 208 192 192
WIRE 336 208 336 32
WIRE 368 208 336 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 464 224 464 32
WIRE 464 224 432 224
WIRE 496 224 464 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 368 240 256 240
WIRE -160 256 -160 240
WIRE -64 256 -64 240
WIRE 160 256 32 256
WIRE 32 272 32 256
WIRE 400 272 400 256
WIRE 192 288 192 272
WIRE 32 368 32 352
SYMBOL res 336 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 200
SYMBOL res 448 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 432
SYMBOL voltage -160 144 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL opamps\\LT1819 192 240 R0
SYMATTR InstName U1
SYMBOL opamps\\LT1819 400 224 R0
SYMATTR InstName U2
SYMBOL voltage -64 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 432
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL voltage 32 256 R0
SYMATTR InstName V3
SYMATTR Value AC 1
FLAG -64 256 0
FLAG 192 192 +V
FLAG -64 144 +V
FLAG 192 288 -V
FLAG -160 256 0
FLAG -160 144 -V
FLAG 16 96 0
FLAG 32 368 0
FLAG 400 176 +V
FLAG 400 272 -V
FLAG 224 32 0
FLAG 496 224 OUT
FLAG 32 256 IN
TEXT 232 344 Left 2 !.ac oct 10 100K 100Meg
TEXT 264 -32 Bottom 2 ;80MHz, 20dB Gain Block
* Z:\home\khalils\Downloads\files\data\raw_asc\18509b00a11e_led-driver.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N003 N005 0 0 BC847B
D1 N001 N003 D
R3 N005 N004 4.7k
V1 N002 0 5
R2 N002 N001 330
V2 N004 0 PULSE(0 3 1 0 0 1 2 5)
R1 N005 0 4.7k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 5s 100ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 924 680
WIRE 608 16 544 16
WIRE 864 16 688 16
WIRE 864 48 864 16
WIRE 544 128 544 16
WIRE 864 192 864 128
WIRE 544 256 544 192
WIRE 224 304 48 304
WIRE 384 304 304 304
WIRE 480 304 384 304
WIRE 48 352 48 304
WIRE 384 352 384 304
WIRE 48 528 48 432
WIRE 384 528 384 432
WIRE 544 528 544 352
SYMBOL LED 528 128 R0
SYMATTR InstName D1
SYMBOL res 368 336 R0
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL voltage 864 32 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 48 336 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3 1 0 0 1 2 5)
SYMBOL npn 480 256 R0
SYMATTR InstName Q1
SYMATTR Value BC847B
SYMBOL res 704 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 330
SYMBOL Res 320 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 4.7k
FLAG 864 192 0
FLAG 544 528 0
FLAG 384 528 0
FLAG 48 528 0
TEXT 80 72 Left 2 !.tran 0 5s 100ms
* Z:\home\khalils\Downloads\files\data\raw_asc\3ccb2135891b_1178A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1178A.asy)
R2 N001 0 5K
XU1 N003 N001 +V 0 N002 LT1178 ;pnba In+)In-)V+)V-)OUT
R1 N002 N001 5K
V3 N003 0 SINE(1.25 .1 1K)
V1 +V 0 5
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -192 176 -192 160
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE -192 288 -192 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL voltage -192 160 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(1.25 .1 1K)
SYMBOL opamps\\LT1178A 192 176 R0
SYMATTR InstName U1
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 5K
FLAG -192 288 0
FLAG 192 192 +V
FLAG -192 160 +V
FLAG 16 96 0
FLAG 0 368 0
FLAG 192 288 0
TEXT 246 322 Left 0 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\1bbb0c3108a2_clamp_cir.asc
* Generated by LTspice 26.0.1 for Windows.
* Limiter / Clamp circuit
D1 W2 +2 1N914
R1 +2 W1 10k
D2 +2 0 1N914
V1 W1 0 SINE(0 3 100 0 0 0)
V2 W2 0 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 -16 64 -48
WIRE 64 -16 48 -16
WIRE 208 -16 64 -16
WIRE 432 -16 288 -16
WIRE 448 -16 432 -16
WIRE 64 32 64 -16
WIRE 64 144 64 112
WIRE 432 144 432 -16
WIRE 432 144 240 144
WIRE 240 192 240 144
WIRE 432 192 432 144
WIRE 240 304 240 256
WIRE 240 304 192 304
WIRE 240 320 240 304
WIRE 432 320 432 256
WIRE 240 432 240 400
IOPIN 48 -16 In
IOPIN 64 -48 In
IOPIN 448 -16 In
IOPIN 192 304 In
SYMBOL diode 256 256 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL res 304 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 240 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL diode 416 192 R0
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL voltage 64 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 3 100 0 0 0)
FLAG 432 320 0
FLAG 64 144 0
FLAG 240 432 0
FLAG 48 -16 W1
FLAG 64 -48 +1
FLAG 448 -16 +2
FLAG 192 304 W2
TEXT 40 -136 Left 2 ;Limiter / Clamp circuit
TEXT -56 240 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1012S8.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
R1 N003 N002 10Meg
R2 N002 N001 100Meg
V3 N001 N004 SINE(0 100m 10)
R3 0 N003 100
R4 N003 OUT 100K
R5 N005 N004 100Meg
R6 N005 0 10Meg
V4 N004 0 SINE(0 100 1)
XU1 N005 N002 +V -V OUT LT1012 ;pnba In+)In-)V+)V-)OUT
.tran 3
* Instrumentation Amplifier with 100V Common Mode Range
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1012S8.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -16 112 -256 112
WIRE 96 112 64 112
WIRE 144 112 96 112
WIRE 272 112 224 112
WIRE 304 112 272 112
WIRE 400 112 384 112
WIRE -256 128 -256 112
WIRE 272 128 272 112
WIRE -496 192 -496 176
WIRE -368 192 -368 176
WIRE 192 208 192 192
WIRE 96 224 96 112
WIRE 160 224 96 224
WIRE 272 240 272 208
WIRE 272 240 224 240
WIRE 304 240 272 240
WIRE -256 256 -256 208
WIRE -32 256 -256 256
WIRE 96 256 48 256
WIRE 160 256 96 256
WIRE -256 272 -256 256
WIRE 96 272 96 256
WIRE -496 288 -496 272
WIRE -368 288 -368 272
WIRE 192 288 192 272
WIRE -256 368 -256 352
WIRE 96 368 96 352
FLAG -368 288 0
FLAG 192 192 +V
FLAG -368 176 +V
FLAG 192 288 -V
FLAG -496 288 0
FLAG -496 176 -V
FLAG -256 368 0
FLAG 400 112 0
FLAG 96 368 0
FLAG 304 240 OUT
SYMBOL voltage -368 176 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -496 176 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 240 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10Meg
SYMBOL res 80 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100Meg
SYMBOL voltage -256 112 R0
WINDOW 3 19 100 Left 2
SYMATTR Value SINE(0 100m 10)
SYMATTR InstName V3
SYMBOL res 400 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL res 256 112 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL res 64 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 100Meg
SYMBOL res 80 256 R0
SYMATTR InstName R6
SYMATTR Value 10Meg
SYMBOL voltage -256 256 R0
SYMATTR InstName V4
SYMATTR Value SINE(0 100 1)
SYMBOL opamps\\LT1012S8 192 176 R0
SYMATTR InstName U1
TEXT 408 320 Left 2 !.tran 3
TEXT 120 56 Bottom 2 ;Instrumentation Amplifier with 100V Common Mode Range
* Z:\home\khalils\Downloads\files\data\raw_asc\26cf5cfadc66_HW05P04.asc
* Generated by LTspice 26.0.1 for Windows.
VI0 N001 N002 0
R3 0 N005 1k
V1 N003 0 10
R1 N004 0 1k
E1 N001 0 N003 N004 100Meg
R2 N005 N004 1k
R4 N005 N002 1k
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1368 680
WIRE 496 -144 432 -144
WIRE 640 -144 576 -144
WIRE 432 -112 432 -144
WIRE 384 -96 64 -96
WIRE 384 -48 224 -48
WIRE 224 48 224 -48
WIRE 288 48 224 48
WIRE 432 48 368 48
WIRE 496 48 432 48
WIRE 640 48 640 -144
WIRE 640 48 576 48
WIRE 64 112 64 -96
WIRE 224 112 224 48
WIRE 432 112 432 48
DATAFLAG 640 -144 ""
SYMBOL res 384 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 64 96 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 208 96 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 448 208 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL voltage 480 -144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName I0
SYMATTR Value 0
SYMBOL res 480 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL e 432 -128 R0
SYMATTR InstName E1
SYMATTR Value 100Meg
FLAG 432 -32 0
FLAG 432 192 0
FLAG 224 192 0
FLAG 64 192 0
TEXT 1328 272 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\2f122752a649_current_mirror_model_pmos.asc
* Generated by LTspice 26.0.1 for Windows.
vd vd 0 0.64
M1 vd vd vdd vdd PMOS l=0.36u w={wp}
vdd vdd 0 1.8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.op
.include tsmc180.txt
.step param wp 1u 15u 1u
.param wp=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 80 64 -32
WIRE 128 80 64 80
WIRE 64 112 64 80
WIRE 16 128 -16 128
WIRE 128 160 128 80
WIRE 128 160 64 160
WIRE -304 224 -304 176
WIRE -176 224 -176 176
WIRE -16 224 -16 128
WIRE 64 224 64 208
WIRE 64 224 -16 224
WIRE 64 288 64 224
WIRE -304 336 -304 304
WIRE -176 336 -176 304
SYMBOL pmos4 16 208 M180
WINDOW 123 64 6 Left 2
SYMATTR Value2 l=0.36u w={wp}
SYMATTR InstName M1
SYMBOL voltage -176 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vdd
SYMATTR Value 1.8
SYMBOL voltage -304 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vd
SYMATTR Value 0.64
FLAG -176 336 0
FLAG -176 176 vdd
FLAG -304 176 vd
FLAG -304 336 0
FLAG 64 288 vd
FLAG 64 -32 vdd
TEXT -400 48 Left 2 !.op
TEXT -408 -48 Left 2 !.include tsmc180.txt
TEXT -408 -8 Left 2 !.step param wp 1u 15u 1u\n.param wp=1