Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\258a29aa42c3_Ex8_10.asc
* Generated by LTspice 26.0.1 for Windows.
* The waveform viewer can integrate noise over a bandwidth \nby <Ctrl-Key> + left mouse button clicking on the corresponding \ndata trace label (at the top of the waveform viewer).
* A voltage-controlled current source, G,\nis used to model a noiseless resistor, \nsee page 238.
GR1 Vout 0 Vout 0 1e-3
Vs Vs 0 0 AC 1
R1 Vs Vout 10k
.noise v(vout,0) vs dec 100 1 1k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1072 704
WIRE 272 208 224 208
WIRE 400 208 352 208
WIRE 224 240 224 208
WIRE 400 272 400 208
WIRE 400 272 304 272
WIRE 352 288 320 288
WIRE 304 336 304 272
WIRE 352 336 304 336
WIRE 320 352 320 288
WIRE 400 352 320 352
WIRE 224 400 224 320
WIRE 400 400 400 352
SYMBOL voltage 224 224 R0
WINDOW 0 -82 58 Left 2
WINDOW 3 24 104 Invisible 2
WINDOW 123 -82 86 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vs
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMBOL g 400 368 M180
WINDOW 0 43 42 Left 2
WINDOW 3 42 73 Left 2
SYMATTR InstName GR1
SYMATTR Value 1e-3
SYMBOL res 256 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 10k
FLAG 400 400 0
FLAG 224 400 0
FLAG 400 208 Vout
FLAG 224 208 Vs
TEXT 160 448 Left 2 !.noise v(vout,0) vs dec 100 1 1k
TEXT 200 88 Left 2 ;The waveform viewer can integrate noise over a bandwidth \nby <Ctrl-Key> + left mouse button clicking on the corresponding \ndata trace label (at the top of the waveform viewer).
TEXT 504 296 Left 2 ;A voltage-controlled current source, G,\nis used to model a noiseless resistor, \nsee page 238.
* Z:\home\khalils\Downloads\files\data\raw_asc\2e982158bcab_inverting__ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N001 VCC VEE Vout LT1001 ;pnba In+)In-)V+)V-)OUT
R2 Vout N001 2k
R1 N001 VIN 1k
V1 VIN 0 SINE(0 2 1k)
V2 VCC 0 15V
V3 0 VEE 15V
.tran 3ms
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 0 144 0
WIRE 352 0 272 0
WIRE 496 16 496 -16
WIRE 496 64 496 16
WIRE 224 112 224 96
WIRE 224 128 224 112
WIRE 144 144 144 0
WIRE 144 144 96 144
WIRE 192 144 144 144
WIRE 352 160 352 0
WIRE 352 160 256 160
WIRE 400 160 352 160
WIRE 416 160 400 160
WIRE 192 176 160 176
WIRE 496 176 496 144
WIRE 672 176 496 176
WIRE 16 192 16 144
WIRE 672 192 672 176
WIRE 16 208 16 192
WIRE 224 208 224 192
WIRE 496 208 496 176
WIRE 224 224 224 208
WIRE 160 240 160 176
WIRE 16 304 16 288
WIRE 496 304 496 288
WIRE 496 320 496 304
FLAG 16 304 0
FLAG 160 240 0
FLAG 16 192 VIN
FLAG 400 160 Vout
FLAG 224 208 VEE
FLAG 496 304 VEE
FLAG 672 192 0
FLAG 224 112 VCC
FLAG 496 16 VCC
SYMBOL OpAmps\\OP07 224 96 R0
SYMATTR InstName U1
SYMBOL res 288 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2k
SYMBOL res 112 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 16 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 2 1k)
SYMBOL voltage 496 48 R0
SYMATTR InstName V2
SYMATTR Value 15V
SYMBOL voltage 496 192 R0
SYMATTR InstName V3
SYMATTR Value 15V
TEXT -24 376 Left 2 !.tran 3ms
* Z:\home\khalils\Downloads\files\data\raw_asc\d8b2b3e3698e_openloop_gain.asc
* Generated by LTspice 26.0.1 for Windows.
R3 V_open N002 10k
V1 V_plus 0 5V
R5 N003 V_open 100k
XU1 N004 0 V_plus V_minus N003 MC33079/ON ;pnba In+)In-)V+)V-)OUT
V2 0 V_minus 5V
R2 N001 0 1k
V3 N004 0 AC 1
C1 N002 N001 470p
.lib on_amp.lib
.ac dec 8 1 100MEG
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 920 840
WIRE -1024 -448 -1232 -448
WIRE -1024 -384 -1024 -448
WIRE -1024 -272 -1024 -304
WIRE -1024 -272 -1104 -272
WIRE -1104 -240 -1104 -272
WIRE -1024 -224 -1024 -272
WIRE -560 -128 -608 -128
WIRE -1024 -96 -1024 -144
WIRE -1024 -96 -1248 -96
WIRE -864 -48 -880 -48
WIRE -752 -48 -800 -48
WIRE -608 -48 -608 -128
WIRE -608 -48 -672 -48
WIRE -560 -48 -608 -48
WIRE -448 -48 -480 -48
WIRE -880 16 -880 -48
WIRE -528 80 -544 80
WIRE -528 112 -528 80
WIRE -880 128 -880 96
WIRE -560 128 -672 128
WIRE -448 144 -448 -48
WIRE -448 144 -496 144
WIRE -560 160 -608 160
WIRE -672 208 -672 128
WIRE -528 208 -528 176
WIRE -512 208 -528 208
WIRE -608 224 -608 160
WIRE -608 320 -608 304
SYMBOL voltage -1024 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5V
SYMBOL res -656 -64 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL voltage -1024 -400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5V
SYMBOL voltage -608 208 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value ""
SYMBOL res -464 -64 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R5
SYMATTR Value 100k
SYMBOL Opamps\\opamp2 -528 80 R0
SYMATTR InstName U1
SYMATTR Value MC33079/ON
SYMBOL cap -800 -64 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C1
SYMATTR Value 470p
SYMBOL res -896 0 R0
SYMATTR InstName R2
SYMATTR Value 1k
FLAG -1104 -240 0
FLAG -1232 -448 V_plus
FLAG -1248 -96 V_minus
FLAG -512 208 V_minus
FLAG -544 80 V_plus
FLAG -608 320 0
FLAG -672 208 0
FLAG -880 128 0
FLAG -560 -128 V_open
TEXT -1256 544 Left 0 !.lib on_amp.lib
TEXT -1256 512 Left 0 !.ac dec 8 1 100MEG
* Z:\home\khalils\Downloads\files\data\raw_asc\5fe3bbe1638b_Draft5.asc
* Generated by LTspice 26.0.1 for Windows.
VE a 0 6.0
D 0 b D
R b a 220 tol=1 pwr=0.1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 64 80 64
WIRE 208 64 144 64
WIRE 352 64 288 64
WIRE 400 64 352 64
WIRE 80 144 80 64
WIRE 400 144 400 64
WIRE 400 224 400 208
WIRE 80 240 80 224
WIRE 400 240 400 224
WIRE 400 240 80 240
WIRE 80 256 80 240
SYMBOL res 304 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R
SYMATTR Value 220
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL voltage 80 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName E
SYMATTR Value 6.0
SYMBOL diode 416 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D
FLAG 80 256 0
FLAG 144 64 a
FLAG 352 64 b
FLAG 400 224 c
TEXT 46 280 Left 2 !.tran 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6102.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6102.asy)
R3 OUT 0 4.99K
V1 N002 0 50
XU1 OUT 0 N003 N001 N002 N003 LTC6102 ;pnba OUT)VEE)-INS)IN+)VCC)-INF
Iload N001 0 SINE(1 1 10)
R1 N002 N001 1m
R2 N002 N003 20
.tran 300m
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1084 680
WIRE 480 -48 272 -48
WIRE 576 -48 480 -48
WIRE 736 -48 656 -48
WIRE 800 -48 736 -48
WIRE 880 -48 800 -48
WIRE 272 -32 272 -48
WIRE 736 -32 736 -48
WIRE 880 -32 880 -48
WIRE 272 64 272 48
WIRE 480 64 480 -48
WIRE 512 64 480 64
WIRE 736 64 736 48
WIRE 736 64 704 64
WIRE 880 64 880 48
WIRE 736 112 736 64
WIRE 736 112 704 112
WIRE 512 160 480 160
WIRE 800 160 800 -48
WIRE 800 160 704 160
WIRE 784 320 704 320
WIRE 784 336 784 320
WIRE 784 432 784 416
SYMBOL res 720 -48 R0
SYMATTR InstName R2
SYMATTR Value 20
SYMBOL LTC6102 608 176 R0
SYMATTR InstName U1
SYMBOL res 672 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1m
SYMBOL res 768 320 R0
SYMATTR InstName R3
SYMATTR Value 4.99K
SYMBOL current 272 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Iload
SYMATTR Value SINE(1 1 10)
SYMBOL voltage 880 -48 R0
WINDOW 3 26 96 Left 2
SYMATTR Value 50
SYMATTR InstName V1
FLAG 880 64 0
FLAG 272 64 0
FLAG 784 432 0
FLAG 480 160 0
FLAG 784 320 OUT
TEXT 536 400 Left 2 !.tran 300m
* Z:\home\khalils\Downloads\files\data\raw_asc\caccc3daf8b2_Lowpass.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 0 50
R2 N002 N001 50
C1 N002 0 14.6349p
V1 N001 0 AC 1
.ac dec 20 1MEG 10G
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -608 112 -640 112
WIRE -480 112 -528 112
WIRE -48 112 -480 112
WIRE -640 144 -640 112
WIRE -480 144 -480 112
WIRE -48 144 -48 112
WIRE -640 256 -640 224
WIRE -560 256 -640 256
WIRE -480 256 -480 208
WIRE -480 256 -560 256
WIRE -48 256 -48 224
WIRE -48 256 -480 256
WIRE -560 272 -560 256
FLAG -560 272 0
SYMBOL res -64 128 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL res -512 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL cap -496 144 R0
SYMATTR InstName C1
SYMATTR Value 14.6349p
SYMBOL voltage -640 128 R0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
TEXT -552 328 Left 2 !.ac dec 20 1MEG 10G
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1606.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 0.9
Cout OUT 0 6 Rser=2m
L1 IN N001 2.2 Rser=22m
Rload OUT 0 22
XU1 OUT 0 IN MP_01 N001 MP_02 IN MP_03 MP_04 MP_05 0 ADP1606 ;pnba Vout)Mode)Vin))SW))EN))))GND
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1606.asy)
.lib ADP1606.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 -16 32 -16
WIRE 320 -16 208 -16
WIRE 32 80 32 -16
WIRE 32 80 -48 80
WIRE 48 80 32 80
WIRE 320 80 320 -16
WIRE 320 80 304 80
WIRE -48 96 -48 80
WIRE 32 176 32 80
WIRE 48 176 32 176
WIRE 384 176 304 176
WIRE 544 176 384 176
WIRE -48 192 -48 176
WIRE 384 192 384 176
WIRE 544 192 544 176
WIRE 48 272 32 272
WIRE 320 272 304 272
WIRE 384 288 384 256
WIRE 544 288 544 272
FLAG -48 80 IN
FLAG 544 176 OUT
FLAG 32 272 0
FLAG -48 192 0
FLAG 544 288 0
FLAG 320 272 0
FLAG 384 288 0
SYMBOL voltage -48 80 R0
SYMATTR InstName V1
SYMATTR Value 0.9
SYMBOL cap 368 192 R0
WINDOW 3 40 38 Left 2
WINDOW 39 25 61 Left 2
SYMATTR Value 6
SYMATTR SpiceLine Rser=2m
SYMATTR InstName Cout
SYMBOL ind 112 0 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 7 58 VBottom 2
WINDOW 39 -45 59 VTop 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=22m
SYMBOL res 528 176 R0
SYMATTR InstName Rload
SYMATTR Value 22
SYMBOL ADP1606 176 176 R0
SYMATTR InstName U1
TEXT 384 360 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2f2560bee019_DP_nMOS_4x_B.asc
* Generated by LTspice 26.0.1 for Windows.
XM1 drain gate source substrate NMOS_mobius m=4 ;pnba D)G)S)B
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 192 288 128
WIRE 416 240 288 240
WIRE 432 240 416 240
WIRE 240 272 160 272
WIRE 288 368 288 288
FLAG 288 128 drain
IOPIN 288 128 BiDir
FLAG 288 368 source
IOPIN 288 368 BiDir
FLAG 160 272 gate
IOPIN 160 272 BiDir
FLAG 416 240 substrate
IOPIN 416 240 BiDir
SYMBOL nmos4 240 192 R0
WINDOW 123 56 94 Left 2
SYMATTR Value2 m=4
SYMATTR InstName M1
SYMATTR Value NMOS_mobius
SYMATTR Prefix X
* Z:\home\khalils\Downloads\files\data\raw_asc\1f2e89d1f931_op_amp_max_swing.asc
* Generated by LTspice 26.0.1 for Windows.
V2 Vcc 0 15V
R1 N001 0 2k
C1 N001 0 100pF
XU1 Vin N001 Vcc Vee N001 LM741 ;pnba In+)In-)V+)V-)OUT
V3 0 Vee 15V
V1 Vin 0 PULSE(0 20mV 0 0 0 5u 5u 1)
.tran 0 5u 0 100n
.lib LM741.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 240 -208 224 -208
WIRE 272 -208 240 -208
WIRE 240 -144 240 -208
WIRE 256 48 96 48
WIRE 96 144 96 48
WIRE 144 144 96 144
WIRE 256 160 256 48
WIRE 256 160 208 160
WIRE 320 160 256 160
WIRE 400 160 320 160
WIRE 448 160 400 160
WIRE 144 176 112 176
WIRE 320 192 320 160
WIRE 400 192 400 160
WIRE 368 272 320 272
WIRE 400 272 400 256
WIRE 400 272 368 272
WIRE 368 288 368 272
IOPIN 144 -208 Out
IOPIN 352 -208 Out
IOPIN -416 144 Out
IOPIN 176 128 In
IOPIN 176 192 In
IOPIN 112 176 In
SYMBOL res 304 176 R0
SYMATTR InstName R1
SYMATTR Value 2k
SYMBOL OpAmps\\opamp2 176 96 R0
SYMATTR InstName U1
SYMATTR Value LM741
SYMBOL voltage -416 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 20mV 0 0 0 5u 5u 1)
SYMBOL voltage 128 -208 R270
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15V
SYMBOL voltage 256 -208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15V
SYMBOL cap 384 192 R0
SYMATTR InstName C1
SYMATTR Value 100pF
FLAG -416 224 0
FLAG 144 -208 Vcc
FLAG 352 -208 Vee
FLAG 240 -144 0
FLAG -416 144 Vin
FLAG 176 128 Vcc
FLAG 176 192 Vee
FLAG 112 176 Vin
FLAG 368 288 0
TEXT -296 -168 Left 2 !.tran 0 5u 0 100n
TEXT 216 -456 Left 2 !.lib LM741.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\4f7a4ce1ee20_Zener_Breakdown.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 vout BZX84B6V8L
R1 vout 0 1k
V1 N001 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -10 10 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 400 48 272 48
WIRE 560 48 464 48
WIRE 576 48 560 48
WIRE 272 112 272 48
WIRE 576 112 576 48
WIRE 272 256 272 192
WIRE 448 256 272 256
WIRE 576 256 576 192
WIRE 576 256 448 256
WIRE 448 272 448 256
SYMBOL zener 400 64 R270
WINDOW 0 36 32 VTop 2
WINDOW 3 -4 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value BZX84B6V8L
SYMBOL res 560 96 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 272 96 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 448 272 0
FLAG 560 48 vout
TEXT 208 272 Left 2 !.dc V1 -10 10 0.2
* Z:\home\khalils\Downloads\files\data\raw_asc\06e6db310b37_ADC_R_2R_bit_1__mismatch.asc
* Generated by LTspice 26.0.1 for Windows.
R4 VDD Vtrip 100Meg
S3 N001 Vrefp Bin Vtrip switmod
S4 Vrefm N001 Vtrip Bin switmod
R1 Out_top N001 20.1k
R2 Out_top Out_bot 10k
R3 Vtrip 0 100Meg
.model switmod SW
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2740 696
WIRE 944 -752 912 -752
WIRE 1008 -784 912 -784
WIRE 1008 -784 1008 -864
WIRE 1008 -688 1008 -784
WIRE 1024 -864 1008 -864
WIRE 1024 -752 944 -752
WIRE 1024 -752 1024 -816
WIRE 1024 -736 1024 -752
WIRE 1024 -688 1008 -688
WIRE 1072 -1392 912 -1392
WIRE 1072 -1328 1072 -1392
WIRE 1072 -1216 1072 -1248
WIRE 1072 -1184 1072 -1216
WIRE 1072 -1040 1072 -1104
WIRE 1072 -928 1008 -928
WIRE 1072 -880 1072 -928
WIRE 1072 -784 1072 -800
WIRE 1072 -752 1072 -784
WIRE 1072 -624 1008 -624
WIRE 1072 -624 1072 -672
WIRE 1152 -1216 1072 -1216
WIRE 1184 -1216 1152 -1216
WIRE 1280 -784 1072 -784
WIRE 1408 -784 1360 -784
WIRE 1408 -768 1408 -784
WIRE 1408 -640 1408 -688
WIRE 1584 -784 1408 -784
WIRE 1584 -640 1408 -640
IOPIN 912 -1392 In
IOPIN 1008 -624 In
IOPIN 1008 -928 In
IOPIN 912 -784 In
IOPIN 1584 -784 Out
IOPIN 1584 -640 Out
SYMBOL res 1056 -1344 R0
SYMATTR InstName R4
SYMATTR Value 100MEG
SYMBOL res 1392 -784 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 1376 -800 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 20.1k
SYMBOL sw 1072 -784 M180
WINDOW 3 24 -12 Left 0
WINDOW 38 39 67 Left 0
WINDOW 0 38 33 Left 0
SYMATTR Value ""
SYMATTR SpiceModel switmod
SYMATTR InstName S3
SYMBOL sw 1072 -656 M180
WINDOW 3 24 -12 Left 0
WINDOW 38 39 67 Left 0
WINDOW 0 38 33 Left 0
SYMATTR Value ""
SYMATTR SpiceModel switmod
SYMATTR InstName S4
SYMBOL res 1056 -1200 R0
SYMATTR InstName R3
SYMATTR Value 100MEG
FLAG 1152 -1216 Vtrip
FLAG 1072 -1040 0
FLAG 912 -1392 VDD
FLAG 1008 -624 Vrefm
FLAG 1008 -928 Vrefp
FLAG 912 -784 Bin
FLAG 1584 -784 Out_top
FLAG 1584 -640 Out_bot
FLAG 944 -752 Vtrip
TEXT 1264 -1048 Left 0 !.model switmod SW
* Z:\home\khalils\Downloads\files\data\raw_asc\348e9928ca7b_gmoverid.asc
* Generated by LTspice 26.0.1 for Windows.
M1 vds vgs 0 0 CMOSN l={ln} w=5u
vgs vgs 0 0.7
vds vds 0 0.9
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include tsmc180.txt
.dc vds 0 1.8 15m
.step param ln 0.18u 0.9u 0.18u
.param ln=1u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -320 32 -320 -32
WIRE -144 32 -144 -48
WIRE 208 96 208 -48
WIRE 400 144 208 144
WIRE 160 176 16 176
WIRE -480 192 -480 80
WIRE -320 192 -320 112
WIRE -144 208 -144 112
WIRE 208 320 208 192
IOPIN 16 176 In
SYMBOL nmos4 160 96 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l={ln} w=5u
SYMATTR InstName M1
SYMATTR Value CMOSN
SYMBOL voltage -144 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vds
SYMATTR Value 0.9
SYMBOL voltage -320 16 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 0.7
SYMATTR InstName vgs
FLAG -320 192 0
FLAG -480 192 0
FLAG -144 208 0
FLAG -480 80 vss
FLAG 400 144 vss
FLAG 208 320 vss
FLAG -320 -32 vgs
FLAG -144 -48 vds
FLAG 16 176 vgs
FLAG 208 -48 vds
TEXT -456 320 Left 2 !.include tsmc180.txt
TEXT -448 344 Left 2 !.dc vds 0  1.8  15m
TEXT -496 384 Left 2 !.step param ln 0.18u 0.9u 0.18u
TEXT -432 432 Left 2 !.param ln=1u
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8429.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8429.asy)
Rload OUT 0 10K
XU1 N004 N002 N003 N001 -V N005 OUT +V AD8429 ;pnba IN-)RG1)RG2)IN+)VEE)REF)OUT)VCC
Vref N005 0 0.5
V2 -V 0 -15
Vcm N004 0 1
Vin N001 N004 SINE(0 100m 10K)
R1 N002 N003 665
V1 +V 0 15
.tran 1m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 640 -1264 640 -1280
WIRE 752 -1264 752 -1280
WIRE 464 -1184 112 -1184
WIRE 640 -1168 640 -1184
WIRE 752 -1168 752 -1184
WIRE 112 -1152 112 -1184
WIRE 464 -1152 368 -1152
WIRE 752 -1104 640 -1104
WIRE 752 -1088 752 -1104
WIRE 368 -1056 368 -1072
WIRE 464 -1056 368 -1056
WIRE 112 -1024 112 -1072
WIRE 464 -1024 112 -1024
WIRE 576 -1024 576 -1040
WIRE 112 -1008 112 -1024
WIRE 752 -992 752 -1008
WIRE 576 -928 576 -944
WIRE 112 -912 112 -928
SYMBOL res 352 -1168 R0
SYMATTR InstName R1
SYMATTR Value 665
SYMBOL voltage 112 -1024 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName Vcm
SYMATTR Value 1
SYMBOL voltage 576 -1040 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName Vref
SYMATTR Value 0.5
SYMBOL voltage 112 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 100m 10K)
SYMBOL voltage 752 -1280 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL AD8429 496 -1104 R0
SYMATTR InstName U1
SYMBOL voltage 640 -1280 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
FLAG 640 -1280 +V
FLAG 640 -1168 0
FLAG 752 -1104 OUT
FLAG 496 -1200 +V
FLAG 752 -1280 -V
FLAG 496 -1008 -V
FLAG 752 -992 0
FLAG 752 -1168 0
FLAG 112 -912 0
FLAG 576 -928 0
TEXT 696 -936 Left 2 !.tran 1m
* Z:\tmp\asc_dec_bjh7r6w2\02d35b3a50fb_103_lec_exercise_diode_bruecke_parallelStabi_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
D4 0 N001 1N4001
C1 N003 0 50e-6
D1 N001 N003 1N4001
D5 0 N004 EDZV6_2B
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2120 680
WIRE 416 0 384 0
WIRE 544 0 480 0
WIRE 288 48 272 48
WIRE 384 48 384 0
WIRE 384 48 368 48
WIRE 416 48 384 48
WIRE 496 48 480 48
WIRE 512 48 496 48
WIRE 608 48 512 48
WIRE 720 48 688 48
WIRE 816 48 720 48
WIRE 272 80 272 48
WIRE 512 80 512 48
WIRE 816 80 816 48
WIRE 720 96 720 48
WIRE 416 144 384 144
WIRE 496 144 496 48
WIRE 496 144 480 144
WIRE 272 192 272 160
WIRE 384 192 384 144
WIRE 384 192 272 192
WIRE 416 192 384 192
WIRE 512 192 512 144
WIRE 512 192 480 192
WIRE 544 192 544 0
WIRE 544 192 512 192
WIRE 720 192 720 160
WIRE 720 192 544 192
WIRE 720 208 720 192
WIRE 816 208 816 160
WIRE 816 208 720 208
WIRE 512 240 512 192
SYMBOL diode 480 -16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D4
SYMATTR Value 1N4001
SYMBOL cap 496 80 R0
SYMATTR InstName C1
SYMATTR Value 50e-6
SYMBOL diode 416 64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4001
SYMBOL zener 736 160 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D5
SYMATTR Value EDZV6_2B
SYMATTR Description Diode
SYMATTR Type diode
FLAG 512 240 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4233.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4233.asy)
R3 N004 0 20K
R2 N003 IN 20K
R1 N006 0 20K
R5 OUT N005 20K
R4 OUT N004 150K
V3 N002 0 PULSE(0 1 240m 1m 1m 10m)
C2 OUT 0 680
V1 IN 0 12
S1 0 OUT N002 0 SHORT
XU1 N007 IN N003 0 N008 N008 0 OUT TjFET N007 MP_01 MP_02 N001 N005 N003 N004 N006 NC_03 LTC4233 Rpcb=15 Tamb=25 ;pnba Sense)Vdd)UV)OV)Timer)IntVcc)GND)Out)Tj)Sense-)))Gate)PG)_FLT)FB)Imon)Iset
C1 N008 0 1
.model SHORT SW(Ron=10m Roff=1K Vt=.5 Vh=-.4)
.tran 1.4 startup
.lib LTC4233.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1800 680
WIRE -128 -352 -256 -352
WIRE -48 -352 -128 -352
WIRE 128 -352 128 -384
WIRE 480 -352 432 -352
WIRE 592 -352 480 -352
WIRE 688 -352 592 -352
WIRE 800 -352 688 -352
WIRE -256 -336 -256 -352
WIRE -128 -336 -128 -352
WIRE 480 -336 480 -352
WIRE 688 -336 688 -352
WIRE 800 -336 800 -352
WIRE 960 -320 848 -320
WIRE -48 -304 -48 -352
WIRE -16 -304 -48 -304
WIRE 432 -304 432 -352
WIRE 432 -304 272 -304
WIRE 592 -304 592 -352
WIRE 960 -304 960 -320
WIRE -256 -240 -256 -256
WIRE -128 -240 -128 -256
WIRE -16 -240 -128 -240
WIRE 480 -240 480 -256
WIRE 480 -240 272 -240
WIRE 688 -240 688 -272
WIRE 800 -240 800 -256
WIRE 480 -224 480 -240
WIRE 960 -208 960 -224
WIRE -16 -176 -32 -176
WIRE 432 -176 272 -176
WIRE 480 -128 480 -144
WIRE -128 -112 -128 -240
WIRE -16 -112 -128 -112
WIRE 288 -112 272 -112
WIRE 384 -112 368 -112
WIRE 432 -96 432 -176
WIRE 592 -96 592 -224
WIRE 592 -96 432 -96
WIRE -16 -48 -48 -48
WIRE 320 -48 272 -48
WIRE -48 16 -48 -48
WIRE -16 16 -48 16
WIRE 320 16 320 -48
WIRE 320 16 272 16
WIRE 320 80 272 80
WIRE 320 112 320 80
WIRE 336 208 272 208
SYMBOL res 272 -96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 20K
SYMBOL LTC4233 128 -144 R0
SYMATTR InstName U1
SYMBOL res 464 -352 R0
SYMATTR InstName R4
SYMATTR Value 150K
SYMBOL cap 304 16 R0
WINDOW 0 28 11 Left 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL sw 800 -240 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL res 464 -240 R0
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL res -144 -240 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 20K
SYMBOL voltage 960 -320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 240m 1m 1m 10m)
SYMBOL cap 672 -336 R0
SYMATTR InstName C2
SYMATTR Value 680
SYMBOL res 576 -320 R0
SYMATTR InstName R5
SYMATTR Value 20K
SYMBOL voltage -256 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
FLAG 480 -128 0
FLAG 320 112 0
FLAG 384 -112 0
FLAG -256 -240 0
FLAG 688 -240 0
FLAG 800 -352 OUT
FLAG -256 -352 IN
FLAG 336 208 TjFET
FLAG 800 -240 0
FLAG 848 -272 0
FLAG 960 -208 0
FLAG -32 -176 0
TEXT 464 0 Left 2 !.model SHORT SW(Ron=10m Roff=1K Vt=.5 Vh=-.4)
TEXT 536 208 Left 2 !.tran 1.4 startup