Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2165-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2165-3.3.asy)
R1 N005 0 100K
C6 N007 0 1p
C1 N008 0 2n
XU1 N002 N005 N002 OUT 0 0 N004 IN IN IN N001 N008 N007 N003 N002 ADP2165-x.x Rtop=818K Rbot=182K ;pnba SYNC)Rt)TRK)FB)Gnd)Pgnd)SW)Pvin)Avin)EN)Pgood)SS)Comp)Bst)Vreg
C2 N003 N004 .1
L1 N004 OUT 1.5 Rser=6m
V1 IN 0 5
C4 N002 0 1
R3 OUT N001 100K
Rload OUT 0 .66
C3 OUT 0 60 Rser=2m
R2 N007 N006 36K
C5 N006 0 680p
.tran 1m startup
.lib ADP2165-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 680
WIRE 48 -96 -128 -96
WIRE 176 -96 48 -96
WIRE 272 -96 176 -96
WIRE -128 -80 -128 -96
WIRE 176 -80 176 -96
WIRE 272 -80 272 -96
WIRE 48 -16 48 -96
WIRE 64 -16 48 -16
WIRE 448 -16 384 -16
WIRE 608 -16 528 -16
WIRE -128 16 -128 0
WIRE -32 64 -48 64
WIRE 48 64 32 64
WIRE 64 64 48 64
WIRE 432 64 384 64
WIRE 48 144 48 64
WIRE 64 144 48 144
WIRE 432 144 432 128
WIRE 432 144 384 144
WIRE 480 144 432 144
WIRE 608 144 608 -16
WIRE 608 144 560 144
WIRE 720 144 608 144
WIRE 832 144 720 144
WIRE 720 160 720 144
WIRE 832 160 832 144
WIRE 48 224 48 144
WIRE 64 224 48 224
WIRE 720 256 720 224
WIRE 832 256 832 240
WIRE -32 304 -48 304
WIRE 64 304 48 304
WIRE 608 304 608 144
WIRE 608 304 384 304
WIRE -160 384 -224 384
WIRE -32 384 -80 384
WIRE 64 384 -32 384
WIRE 400 384 384 384
WIRE 480 384 464 384
WIRE -224 400 -224 384
WIRE -32 400 -32 384
WIRE 176 464 176 448
WIRE 272 464 272 448
WIRE -224 480 -224 464
WIRE -32 480 -32 464
SYMBOL cap 704 160 R0
WINDOW 40 24 74 Left 2
SYMATTR Value 60
SYMATTR InstName C3
SYMATTR SpiceLine Rser=2m
SYMBOL cap -48 400 R0
SYMATTR InstName C6
SYMATTR Value 1p
SYMBOL cap 400 368 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL res 544 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res -64 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 36K
SYMBOL res 64 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 416 64 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL res 816 144 R0
SYMATTR InstName Rload
SYMATTR Value .66
SYMBOL cap -240 400 R0
SYMATTR InstName C5
SYMATTR Value 680p
SYMBOL voltage -128 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 464 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=6m
SYMBOL ADP2165-3.3 224 176 R0
SYMATTR InstName U1
SYMBOL cap 32 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
FLAG 480 384 0
FLAG 272 464 0
FLAG -48 304 0
FLAG -224 480 0
FLAG -128 16 0
FLAG 720 256 0
FLAG 832 256 0
FLAG 832 144 OUT
FLAG -128 -96 IN
FLAG -48 64 0
FLAG -32 480 0
FLAG 176 464 0
TEXT 696 424 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX22702D.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 VDDA IN+ IN- 0 VDDB OUT NC_01 0 MAX22702D ;pnba VDDA)IN+)IN-)GNDA)VDDB)OUT)ADJ)VSSB
V1 VDDA 0 5
V2 IN+ 0 PULSE(0 5 0 2n 2n 6u 12u)
V3 IN- 0 PULSE(0 5 0 2n 2n 3u 5u)
C1 OUT 0 200p
V4 VDDB 0 20
.tran 50u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX22702D.asy)
.lib MAX22702D.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2212 708
WIRE 16 64 -592 64
WIRE 64 64 16 64
WIRE 448 64 384 64
WIRE 640 64 448 64
WIRE -592 112 -592 64
WIRE 640 128 640 64
WIRE 16 144 -464 144
WIRE 64 144 16 144
WIRE 448 144 384 144
WIRE 512 144 448 144
WIRE 512 160 512 144
WIRE -464 176 -464 144
WIRE 16 224 -304 224
WIRE 64 224 16 224
WIRE 512 224 512 208
WIRE 512 224 384 224
WIRE -592 272 -592 192
WIRE -304 272 -304 224
WIRE 512 272 512 224
WIRE 640 272 640 208
WIRE -464 288 -464 256
WIRE 64 304 16 304
WIRE -304 384 -304 352
WIRE 16 384 16 304
FLAG 16 384 0
FLAG -304 384 0
FLAG -464 288 0
FLAG 16 144 IN+
FLAG 16 224 IN-
FLAG 448 144 OUT
FLAG 16 64 VDDA
FLAG 448 64 VDDB
FLAG 512 272 0
FLAG -592 272 0
FLAG 640 272 0
SYMBOL MAX22702D 224 144 R0
SYMATTR InstName U1
SYMBOL voltage -592 96 R0
WINDOW 0 21 107 Left 2
WINDOW 3 22 -9 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -464 160 R0
WINDOW 3 32 1 Left 2
WINDOW 0 28 101 Left 2
SYMATTR Value PULSE(0 5 0 2n 2n 6u 12u)
SYMATTR InstName V2
SYMBOL voltage -304 256 R0
WINDOW 3 22 -12 Left 2
WINDOW 0 25 96 Left 2
SYMATTR Value PULSE(0 5 0 2n 2n 3u 5u)
SYMATTR InstName V3
SYMBOL cap 496 160 R0
SYMATTR InstName C1
SYMATTR Value 200p
SYMBOL voltage 640 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 20
TEXT 280 408 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\07b6c965795f_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 0V
R1 N002 N001 1k
J1 N003 N004 0 2N3819
D1 N002 N003 1N4001
V2 N004 0 -1V
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.dc V1 0 10 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 176 128 176
WIRE 400 176 304 176
WIRE 560 176 464 176
WIRE 512 240 352 240
WIRE 128 272 128 176
WIRE 352 272 352 240
WIRE 128 400 128 352
WIRE 352 400 352 352
WIRE 352 400 128 400
WIRE 560 400 560 272
WIRE 560 400 352 400
WIRE 128 432 128 400
SYMBOL diode 400 192 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4001
SYMBOL voltage 352 256 R0
SYMATTR InstName V2
SYMATTR Value -1V
SYMBOL voltage 128 256 R0
SYMATTR InstName V1
SYMATTR Value 0V
SYMBOL njf 512 176 R0
SYMATTR InstName J1
SYMATTR Value 2N3819
SYMBOL res 320 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 128 432 0
TEXT 8 120 Left 2 !.dc V1 0 10 1
* Z:\home\khalils\Downloads\files\data\raw_asc\0af7497facfb_reseauRhel.asc
* Generated by LTspice 26.0.1 for Windows.
Ryhel4 G4 G5 {0.081*Rbm}
Ryhel5 G5 G6 {0.081*Rbm}
Ryhel1 G1 G2 {0.081*Rbm}
Ryhel6 G6 G7 {0.081*Rbm}
Ryhel2 G2 G3 {0.081*Rbm}
Ryhel3 G3 G4 {0.081*Rbm}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 880
WIRE 64 32 -32 32
WIRE 64 144 64 112
WIRE 64 144 -32 144
WIRE 64 256 64 224
WIRE 64 256 -32 256
WIRE 64 368 64 336
WIRE 64 368 -32 368
WIRE 64 480 64 448
WIRE 64 480 -32 480
WIRE 64 592 64 560
WIRE 64 592 -32 592
WIRE 64 704 64 672
WIRE 64 704 -32 704
IOPIN -32 32 BiDir
IOPIN -32 144 BiDir
IOPIN -32 256 BiDir
IOPIN -32 368 BiDir
IOPIN -32 480 BiDir
IOPIN -32 592 BiDir
IOPIN -32 704 BiDir
SYMBOL res 48 240 R0
SYMATTR InstName Ryhel3
SYMATTR Value {0.081*Rbm}
SYMBOL res 48 16 R0
SYMATTR InstName Ryhel1
SYMATTR Value {0.081*Rbm}
SYMBOL res 48 576 R0
SYMATTR InstName Ryhel6
SYMATTR Value {0.081*Rbm}
SYMBOL res 48 464 R0
SYMATTR InstName Ryhel5
SYMATTR Value {0.081*Rbm}
SYMBOL res 48 352 R0
SYMATTR InstName Ryhel4
SYMATTR Value {0.081*Rbm}
SYMBOL res 48 128 R0
SYMATTR InstName Ryhel2
SYMATTR Value {0.081*Rbm}
FLAG -32 32 G1
FLAG -32 144 G2
FLAG -32 256 G3
FLAG -32 368 G4
FLAG -32 480 G5
FLAG -32 592 G6
FLAG -32 704 G7
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3526B-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3526B-2.asy)
XU1 N002 0 N001 N001 N003 OUT LTC3526B-2 ;pnba SW)GND)Vin)_SHDN)FB)Vout
R1 OUT N003 1.78Meg
Rload OUT 0 250
V1 N001 0 2
L1 N001 N002 2.2 Rpar=5K
C1 OUT 0 4.7 Rser=1m
R2 N003 0 1Meg
.tran 350u startup
.lib LTC3526B-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 80 -144 80
WIRE 0 80 -48 80
WIRE 128 80 80 80
WIRE -144 96 -144 80
WIRE 128 128 128 80
WIRE -144 192 -144 176
WIRE -48 192 -48 80
WIRE -16 192 -48 192
WIRE 320 192 272 192
WIRE 464 192 320 192
WIRE 576 192 464 192
WIRE 320 208 320 192
WIRE 464 208 464 192
WIRE 576 208 576 192
WIRE 464 304 464 272
WIRE 576 304 576 288
WIRE -48 320 -48 192
WIRE -16 320 -48 320
WIRE 320 320 320 288
WIRE 320 320 272 320
WIRE 320 336 320 320
WIRE 128 416 128 384
WIRE 320 432 320 416
SYMBOL voltage -144 80 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL cap 448 208 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1m
SYMBOL res 560 192 R0
SYMATTR InstName Rload
SYMATTR Value 250
SYMBOL ind -16 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rpar=5K
SYMBOL res 304 320 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL PowerProducts\\LTC3526B-2 128 256 R0
SYMATTR InstName U1
SYMBOL res 304 192 R0
SYMATTR InstName R1
SYMATTR Value 1.78Meg
FLAG -144 192 0
FLAG 128 416 0
FLAG 320 432 0
FLAG 464 304 0
FLAG 576 304 0
FLAG 576 192 OUT
TEXT 448 376 Left 2 !.tran 350u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\9287eb02b211_diode2.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 0 1N4148
R1 N002 N001 1000
V1 N001 0 3
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -0.5 0.7 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 144 -16 64 -16
WIRE 288 -16 224 -16
WIRE 64 16 64 -16
WIRE 288 32 288 -16
WIRE 64 128 64 96
WIRE 288 128 288 96
WIRE 288 128 64 128
WIRE 288 176 288 128
SYMBOL res 240 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL diode 272 32 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 64 0 R0
WINDOW 123 15 127 Left 2
WINDOW 39 24 124 Left 2
WINDOW 3 15 99 Left 2
SYMATTR Value 3
SYMATTR InstName V1
FLAG 288 176 0
TEXT 64 152 Left 2 !.dc V1 -0.5 0.7 1m
* Z:\tmp\asc_dec_bjh7r6w2\124000622116_CmosLinTest_1_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
C2 Out N002 10n
V1 N003 0 SINE(0 10m 1e6) AC 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -256 80 -272 80
WIRE -256 128 -256 80
WIRE -256 224 -256 192
WIRE -256 368 -256 304
WIRE -160 80 -256 80
WIRE -160 192 -160 80
WIRE -160 304 -160 192
WIRE -128 192 -160 192
WIRE -48 80 -160 80
WIRE -48 304 -160 304
WIRE 0 64 0 48
WIRE 0 192 -48 192
WIRE 0 192 0 160
WIRE 0 224 0 192
WIRE 0 368 -256 368
WIRE 0 368 0 320
WIRE 32 192 0 192
WIRE 112 192 96 192
WIRE 112 192 112 176
WIRE 160 336 160 320
WIRE 192 48 0 48
WIRE 192 176 192 48
WIRE 192 320 160 320
WIRE 192 320 192 256
WIRE 192 368 0 368
WIRE 192 368 192 320
SYMBOL cap 96 176 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -256 208 M0
WINDOW 0 -15 57 Left 0
WINDOW 3 51 161 VLeft 0
WINDOW 123 -81 108 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10m 1e6)
SYMATTR Value2 AC 1
FLAG -272 80 In
FLAG 160 336 0
FLAG 112 176 Out
* Z:\home\khalils\Downloads\files\data\raw_asc\906c5064f7b3_Set_unit.asc
* Generated by LTspice 26.0.1 for Windows.
V1 LM35 0 PWL(0 0 0.2 0 0.8 1 1 1)
V2 12V 0 12
V3 -12V 0 -12V
V4 5V 0 5V
XU3 N002 Vset 12V -12V Vset LM741/NS ;pnba In+)In-)V+)V-)OUT
R_POT_1 N002 N003 R=V(R_POT_1)
R_POT2 N001 N002 R= 100k-V(R_POT_1)
R2 12V N001 40k
R1 0 N003 3k
V5 R_POT_1 0
.include D:\GITHUB\EE313-Term-project\Simulation\Sensing Unit\LM741.MOD
;tran 0 1 0
.dc V5 1 100000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4272 2160
WIRE -912 320 -912 256
WIRE -624 320 -624 256
WIRE -480 320 -480 256
WIRE -336 320 -336 256
WIRE -912 448 -912 400
WIRE -624 448 -624 400
WIRE -480 448 -480 400
WIRE -336 448 -336 400
WIRE 416 1392 336 1392
WIRE 512 1392 496 1392
WIRE 880 1392 672 1392
WIRE 336 1456 336 1392
WIRE 752 1504 752 1456
WIRE 672 1520 672 1392
WIRE 720 1520 672 1520
WIRE 880 1536 880 1392
WIRE 880 1536 784 1536
WIRE 928 1536 880 1536
WIRE 176 1552 176 1536
WIRE 336 1552 336 1536
WIRE 720 1552 336 1552
WIRE 336 1584 336 1552
WIRE 752 1648 752 1568
WIRE 176 1664 176 1632
WIRE 336 1712 336 1664
WIRE 400 1712 336 1712
WIRE 512 1712 480 1712
FLAG -912 448 0
FLAG -912 256 LM35
FLAG -624 448 0
FLAG -624 256 12V
FLAG -480 448 0
FLAG -480 256 -12V
FLAG -336 448 0
FLAG -336 256 5V
FLAG 752 1456 12V
FLAG 752 1648 -12V
FLAG 928 1536 Vset
FLAG 512 1392 12V
FLAG 512 1712 0
FLAG 176 1664 0
FLAG 176 1536 R_POT_1
SYMBOL voltage -912 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 0.2 0 0.8 1 1 1)
SYMBOL voltage -624 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL voltage -480 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -12V
SYMBOL voltage -336 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5V
SYMBOL OpAmps\\opamp2 752 1472 R0
SYMATTR InstName U3
SYMATTR Value LM741/NS
SYMBOL res 320 1568 R0
SYMATTR InstName R_POT_1
SYMATTR Value R=V(R_POT_1)
SYMBOL res 320 1440 R0
SYMATTR InstName R_POT2
SYMATTR Value R= 100k-V(R_POT_1)
SYMBOL res 512 1376 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 40k
SYMBOL res 496 1696 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3k
SYMBOL voltage 176 1536 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value ""
TEXT -160 352 Left 2 !.include D:\\GITHUB\\EE313-Term-project\\Simulation\\Sensing Unit\\LM741.MOD
TEXT -1096 352 Left 2 !;tran 0 1 0
TEXT 128 1480 VRight 2 !.dc V5 1 100000
* Z:\home\khalils\Downloads\files\data\raw_asc\a659e1f2d340_exp3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
V1 Vb 0 -0
R1 N001 Va 1k
Vs+ Vs+ 0 +12
Va Va 0 SINE(0 5 100)
XU1 0 N001 Vs+ Vs- Vo LT1001 ;pnba In+)In-)V+)V-)OUT
R2 N001 Vb 1k
Vs- Vs- 0 -12
Rf Vo N001 500
.tran 0 50ms 0 10u
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 680
WIRE 1184 -112 1184 -160
WIRE 1408 -112 1408 -176
WIRE 1632 -112 1632 -192
WIRE 896 -96 896 -160
WIRE 896 48 896 -16
WIRE 1184 48 1184 -32
WIRE 1408 48 1408 -32
WIRE 1632 48 1632 -32
WIRE 336 64 240 64
WIRE 464 64 416 64
WIRE 128 96 64 96
WIRE 224 96 208 96
WIRE 384 208 384 160
WIRE 128 224 16 224
WIRE 224 224 224 96
WIRE 224 224 208 224
WIRE 240 224 240 64
WIRE 240 224 224 224
WIRE 352 224 240 224
WIRE 464 240 464 64
WIRE 464 240 416 240
WIRE 512 240 464 240
WIRE 352 256 272 256
WIRE 384 320 384 272
WIRE 272 384 272 256
SYMBOL res 224 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 224 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 1632 -128 R0
SYMATTR InstName V1
SYMATTR Value -0
SYMBOL res 432 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rf
SYMATTR Value 500
SYMBOL voltage 896 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Va
SYMATTR Value SINE(0 5 100)
SYMBOL voltage 1408 -128 R0
SYMATTR InstName Vs-
SYMATTR Value -12
SYMBOL voltage 1184 -128 R0
SYMATTR InstName Vs+
SYMATTR Value +12
SYMBOL OpAmps\\OP07 384 176 R0
SYMATTR InstName U1
FLAG 896 48 0
FLAG 1184 48 0
FLAG 1408 48 0
FLAG 384 160 Vs+
FLAG 384 320 Vs-
FLAG 512 240 Vo
FLAG 896 -160 Va
FLAG 1184 -160 Vs+
FLAG 1408 -176 Vs-
FLAG 64 96 Vb
FLAG 1632 -192 Vb
FLAG 1632 48 0
FLAG 272 384 0
FLAG 16 224 Va
TEXT 256 440 Left 2 !.tran 0 50ms 0 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\2b84cdc5a60b_pmos_90.asc
* Generated by LTspice 26.0.1 for Windows.
VDS N001 0 -1.2
M1 N001 N002 0 N001 PMOS l=90n w=405n
VGS N002 0 -1.2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VGS 0 -1.2 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 384 80 256 80
WIRE 160 96 32 96
WIRE 256 96 256 80
WIRE 256 96 240 96
WIRE 272 96 256 96
WIRE 32 112 32 96
WIRE 384 112 384 80
WIRE 272 144 272 96
WIRE 272 144 240 144
WIRE 160 176 160 96
WIRE 192 176 160 176
WIRE 32 256 32 192
WIRE 240 256 240 192
WIRE 240 256 32 256
WIRE 384 256 384 192
WIRE 384 256 240 256
WIRE 240 272 240 256
SYMBOL voltage 384 96 R0
SYMATTR InstName VDS
SYMATTR Value -1.2
SYMBOL pmos4 192 96 R0
SYMATTR InstName M1
SYMATTR Value2 l=90n w=405n
SYMBOL voltage 32 96 R0
SYMATTR InstName VGS
SYMATTR Value -1.2
FLAG 240 272 0
TEXT -200 296 Left 2 !.dc VGS 0 -1.2 0.2
* Z:\home\khalils\Downloads\files\data\raw_asc\20c7332366bc_BJTTransistorSwitch.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N002 0 PULSE(0 1 0 1n 1n 10u 20u)
R2 N003 N002 50k
Q1 Vout N003 0 0 NPN
R1 N001 Vout 0.7k
V1 N001 0 5
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 50m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 384 -128 320 -128
WIRE 496 -128 464 -128
WIRE 496 -80 496 -128
WIRE 320 -32 320 -128
WIRE 320 112 320 48
WIRE 560 112 320 112
WIRE 320 144 320 112
WIRE 128 192 -32 192
WIRE 256 192 208 192
WIRE -32 240 -32 192
WIRE -32 384 -32 320
WIRE 320 384 320 240
SYMBOL voltage -32 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 0 1n 1n 10u 20u)
SYMBOL npn 256 144 R0
SYMATTR InstName Q1
SYMBOL res 224 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50k
SYMBOL voltage 368 -128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 304 -48 R0
SYMATTR InstName R1
SYMATTR Value 0.7k
FLAG 496 -80 0
FLAG 320 384 0
FLAG -32 384 0
FLAG 560 112 Vout
TEXT -64 408 Left 2 !.tran 50m
* Z:\home\khalils\Downloads\files\data\raw_asc\6e583d2288c1_Assignment_3b__vi_.asc
* Generated by LTspice 26.0.1 for Windows.
* Negative Half Wave Rectifier Circuit (with 10microF Capacitor) (Practical)
D1 N002 N001 1N4148
C1 N002 0 0.00001
V1 N001 0 SINE(0 5 1000) Rser=0.001
R1 N002 0 1000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5ms
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 320 80 208 80
WIRE 480 80 384 80
WIRE 592 80 480 80
WIRE 208 128 208 80
WIRE 480 128 480 80
WIRE 592 144 592 80
WIRE 208 256 208 208
WIRE 304 256 208 256
WIRE 480 256 480 208
WIRE 480 256 304 256
WIRE 592 256 592 208
WIRE 592 256 480 256
WIRE 304 288 304 256
SYMBOL diode 384 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL cap 576 144 R0
SYMATTR InstName C1
SYMATTR Value 0.00001
SYMBOL res 464 112 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL voltage 208 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.001
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1000)
FLAG 304 288 0
TEXT 144 288 Left 2 !.tran 5ms
TEXT -24 8 Left 2 ;Negative Half Wave Rectifier Circuit (with 10microF Capacitor) (Practical)
* Z:\home\khalils\Downloads\files\data\raw_asc\3b4a4f3b3f59_lab1Scheme.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1097.asy)
;dc V3 -400m 400m .1m
;tran 10ms
V1 N001 0 12
R2 N003 N002 50.42k
R1 N002 N004 990.3
V2 0 N005 12
XU1 0 N002 N001 N005 N003 LT1097 ;pnba In+)In-)V+)V-)OUT
V3 N004 0 SINE(0 80m 1k) AC 1
.ac dec 100 1 10e6
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 916 680
WIRE 560 -272 384 -272
WIRE 256 -192 192 -192
WIRE 432 -192 336 -192
WIRE 560 -160 560 -272
WIRE 384 -96 384 -272
WIRE 384 -96 304 -96
WIRE 304 -48 304 -96
WIRE -48 -32 -368 -32
WIRE 192 -32 192 -192
WIRE 192 -32 32 -32
WIRE 272 -32 192 -32
WIRE 432 -16 432 -192
WIRE 432 -16 336 -16
WIRE 560 -16 560 -80
WIRE 912 -16 560 -16
WIRE 272 0 192 0
WIRE -368 32 -368 -32
WIRE 560 48 560 -16
WIRE 304 192 304 16
WIRE 560 192 560 128
WIRE 560 192 304 192
WIRE -368 432 -368 112
WIRE 192 432 192 0
WIRE 192 432 -368 432
WIRE 912 432 912 -16
WIRE 912 432 192 432
WIRE 192 480 192 432
SYMBOL Misc\\battery 560 -176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL Misc\\battery 560 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL OpAmps\\LT1097 304 -80 R0
SYMATTR InstName U1
SYMBOL res 352 -208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50.42k
SYMBOL res 48 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 990.3
SYMBOL voltage -368 16 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value SINE(0 80m 1k)
FLAG 192 480 0
TEXT -736 224 Left 2 !;dc V3 -400m 400m .1m
TEXT -728 32 Left 2 !;tran 10ms
TEXT -712 112 Left 2 !.ac dec 100 1 10e6
* Z:\home\khalils\Downloads\files\data\raw_asc\1e266ca3f564_mult.asc
* Generated by LTspice 26.0.1 for Windows.
B1 out 0 V={gain}*V(in)*V(fb)
.param gain=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 48 112 48
WIRE 112 48 112 80
WIRE 112 160 112 192
WIRE 16 48 -64 48
WIRE 16 112 -64 112
FLAG 112 192 0
FLAG 192 48 out
IOPIN 192 48 Out
FLAG -64 48 in
IOPIN -64 48 In
FLAG -64 112 fb
IOPIN -64 112 In
SYMBOL bv 112 64 R0
SYMATTR InstName B1
SYMATTR Value V={gain}*V(in)*V(fb)
TEXT -8 -16 Left 0 !.param gain=1
* Z:\home\khalils\Downloads\files\data\raw_asc\1354898defe3_Voltage_clamping.asc
* Generated by LTspice 26.0.1 for Windows.
* https://electronics.stackexchange.com/questions/660780/how-can-i-clip-a-voltage-upper-limit-in-an-analog-signal
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R2 Vout_Clamp_zener Vin 220
V2 Vcc 0 3.3V
V1 Vin 0 SINE(2.5 2.5 300 0 50)
D1 0 Vout_Clamp_zener BZX85C3V3
XU1 Vin Vout_clamp_opamp Vcc 0 Vout_clamp_opamp level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 0.1 0 1u
.model BZX85C3V3 D ( IS=5n RS=5m BV=3.3 IBV=5m N=1.2 Cjo=200p Vj=0.75 M=0.33 TT=10n )
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1752 720
WIRE 272 112 240 112
WIRE 336 112 272 112
WIRE 272 128 272 112
WIRE 272 208 272 192
WIRE 1280 352 1280 336
WIRE 1248 368 1168 368
WIRE 1344 384 1312 384
WIRE 1376 384 1344 384
WIRE 1248 400 1232 400
WIRE 1168 496 1168 368
WIRE 1344 496 1344 384
WIRE 1344 496 1168 496
SYMBOL zener 288 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BZX85C3V3
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 220
SYMBOL OpAmps\\UniversalOpAmp2 1280 384 R0
SYMATTR InstName U1
SYMBOL voltage 1056 336 R0
WINDOW 3 -49 -38 VRight 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(2.5 2.5 300 0 50)
SYMATTR InstName V1
SYMBOL voltage 896 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3.3V
FLAG 1056 352 Vin
FLAG 1056 432 0
FLAG 272 208 0
FLAG 160 112 Vin
FLAG 1280 416 0
FLAG 896 448 0
FLAG 1232 400 Vin
FLAG 896 368 Vcc
FLAG 1280 336 Vcc
FLAG 336 112 Vout_Clamp_zener
FLAG 1376 384 Vout_clamp_opamp
TEXT 1088 584 Left 2 !.tran 0 0.1 0 1u
TEXT -168 -480 Left 2 ;https://electronics.stackexchange.com/questions/660780/how-can-i-clip-a-voltage-upper-limit-in-an-analog-signal
TEXT -424 40 Left 2 !.model BZX85C3V3 D ( IS=5n RS=5m BV=3.3 IBV=5m N=1.2 Cjo=200p Vj=0.75 M=0.33 TT=10n )