* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4218.asc
* Generated by LTspice 26.0.1 for Windows.
MQ1 N001 N003 OUT OUT Si4410DY
V1 IN 0 12
C1 OUT 0 330
C2 N005 0 .01
R1 N009 0 20K
R2 N006 0 20K
R3 OUT N008 20K
R4 OUT N006 150K
R5 N004 N005 1K
R6 N003 N004 10
R7 N001 IN .002
R8 IN N007 20K
C3 N010 0 .1
XU1 MP_01 IN N007 0 N010 N011 0 OUT N004 N008 N007 N006 N009 NC_02 N001 IN LTC4218 ;pnba )Vdd)UV)OV)Timer)IntVcc)GND)Source)Gate)PG)_FLT)FB)Imon)Iset)Sense-)Sense+
C4 N011 0 .1
S1 0 OUT N002 0 SHORT
V2 N002 0 PULSE(0 1 240m 1m 1m 10m)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 600m startup
.model SHORT SW(Ron=10m Roff=1K Vt=.5 Vh=-.4)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4218.asy)
.lib LTC4218.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1632 788
WIRE -64 -192 -176 -192
WIRE -48 -192 -64 -192
WIRE 48 -192 32 -192
WIRE 144 -192 48 -192
WIRE 464 -192 240 -192
WIRE 528 -192 464 -192
WIRE 624 -192 528 -192
WIRE 720 -192 624 -192
WIRE 832 -192 720 -192
WIRE -176 -176 -176 -192
WIRE 720 -176 720 -192
WIRE 832 -176 832 -192
WIRE 1056 -160 880 -160
WIRE 1152 -160 1136 -160
WIRE 224 -128 224 -144
WIRE -176 -80 -176 -96
WIRE 624 -80 624 -192
WIRE 720 -80 720 -112
WIRE 832 -80 832 -96
WIRE 224 -16 224 -48
WIRE 240 -16 224 -16
WIRE 336 -16 320 -16
WIRE 416 -16 400 -16
WIRE 224 32 224 -16
WIRE 528 32 528 -192
WIRE 48 80 48 -192
WIRE 80 80 48 80
WIRE 464 80 464 -192
WIRE 464 80 368 80
WIRE 528 128 528 112
WIRE 528 128 480 128
WIRE 80 144 48 144
WIRE 480 144 480 128
WIRE 480 144 368 144
WIRE 528 144 528 128
WIRE -64 208 -64 -192
WIRE 48 208 48 144
WIRE 48 208 -64 208
WIRE 80 208 48 208
WIRE 528 240 528 224
WIRE -64 272 -64 208
WIRE 80 272 32 272
WIRE 624 272 624 0
WIRE 624 272 368 272
WIRE 80 336 64 336
WIRE 384 336 368 336
WIRE 528 336 464 336
WIRE -64 400 -64 352
WIRE 32 400 32 272
WIRE 32 400 -64 400
WIRE 80 400 32 400
WIRE 448 400 368 400
WIRE 528 400 512 400
WIRE 384 464 368 464
WIRE 528 464 448 464
WIRE 224 528 224 512
FLAG 528 240 0
FLAG 64 336 0
FLAG 224 528 0
FLAG 528 336 0
FLAG -176 -80 0
FLAG 416 -16 0
FLAG 528 400 0
FLAG 528 464 0
FLAG 720 -80 0
FLAG 832 -80 0
FLAG 880 -112 0
FLAG 1152 -160 0
FLAG 832 -192 OUT
FLAG -176 -192 IN
SYMBOL nmos 144 -144 R270
WINDOW 0 55 50 VTop 2
WINDOW 3 -12 67 VLeft 2
SYMATTR InstName Q1
SYMATTR Value Si4410DY
SYMBOL voltage -176 -192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 704 -176 R0
SYMATTR InstName C1
SYMATTR Value 330
SYMBOL cap 336 -32 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL res 368 352 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 20K
SYMBOL res 512 128 R0
SYMATTR InstName R2
SYMATTR Value 20K
SYMBOL res 608 -96 R0
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL res 512 16 R0
SYMATTR InstName R4
SYMATTR Value 150K
SYMBOL res 224 -32 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1K
SYMBOL res 208 -144 R0
SYMATTR InstName R6
SYMATTR Value 10
SYMBOL res 48 -208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value .002
SYMBOL res -80 256 R0
SYMATTR InstName R8
SYMATTR Value 20K
SYMBOL cap 448 416 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL LTC4218 224 272 R0
SYMATTR InstName U1
SYMBOL cap 384 480 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C4
SYMATTR Value .1
SYMBOL sw 832 -80 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL voltage 1040 -160 R270
WINDOW 123 -74 56 VBottom 2
WINDOW 39 -53 56 VBottom 2
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 240m 1m 1m 10m)
TEXT 696 288 Left 2 !.tran 600m startup\n.model SHORT SW(Ron=10m Roff=1K Vt=.5 Vh=-.4)