Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\f0c785433263_lab05a-Trans-switch.asc
* Generated by LTspice 26.0.1 for Windows.
* Transistor\nSwitch
V1 VIN 0 SINE(0 5 100)
R1 N001 VOUT 1000
R3 VOUT 0 1000000
R2 VBE VIN 2200
V2 N001 0 9
Q1 VOUT VBE 0 0 NPN
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 .05 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 16 240 16
WIRE 240 48 240 16
WIRE 384 48 384 16
WIRE 64 112 -16 112
WIRE 240 144 240 128
WIRE 240 160 240 144
WIRE 512 160 240 160
WIRE -16 176 -16 112
WIRE 64 208 64 112
WIRE 160 208 144 208
WIRE 176 208 160 208
WIRE -16 288 -16 256
WIRE 240 288 240 256
WIRE 512 288 512 240
SYMBOL Misc\\battery 384 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 9
SYMBOL npn 176 160 R0
SYMATTR InstName Q1
SYMBOL res 224 32 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL res 496 144 R0
SYMATTR InstName R3
SYMATTR Value 1000000
SYMBOL res 160 192 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 2200
SYMBOL voltage -16 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 100)
FLAG 240 288 0
FLAG -16 288 0
FLAG -16 112 VIN
FLAG 240 144 VOUT
FLAG 512 288 0
FLAG 384 128 0
FLAG 160 208 VBE
TEXT -56 312 Left 0 !.tran 0 .05 0
TEXT 480 64 Left 0 ;Transistor\nSwitch
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7104-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7104-1.8.asy)
XU1 IN OUT IN N001 OUT 0 ADP7104-1.8 ;pnba Vin)Sense)EN)PG)Vout)GND
C1 OUT 0 2.2 Rser=1.5m
Rload OUT 0 6
R1 OUT N001 100K
V1 IN 0 PWL(0 0 20u 3.3)
.tran 3m startup
.lib ADP7104-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -224 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -224 48 -224 32
WIRE 368 128 352 128
WIRE 464 128 464 32
WIRE 464 128 368 128
WIRE 560 128 464 128
WIRE -224 144 -224 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 368 224 368 128
WIRE 368 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL ADP7104-1.8 224 128 R0
SYMATTR InstName U1
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 6
SYMBOL voltage -224 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 20u 3.3)
FLAG 224 304 0
FLAG -224 144 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -224 32 IN
FLAG 560 128 OUT
TEXT 432 288 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6226.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6226.asy)
R2 N001 0 11
V2 V- 0 -5
V1 V+ 0 5
XU1 In N001 Out V+ V- V+ LTC6226 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN_L
R1 Out N001 100
V3 In 0 PULSE(-75m 75m 100n 1n 1n 400n 800n)
.tran 1u
.lib LTC6226.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 4472 1028
WIRE -2800 -528 -2832 -528
WIRE -2688 -528 -2720 -528
WIRE -2544 -528 -2688 -528
WIRE -2384 -528 -2464 -528
WIRE -2576 -416 -2592 -416
WIRE -2592 -400 -2592 -416
WIRE -2688 -352 -2688 -528
WIRE -2624 -352 -2688 -352
WIRE -2384 -320 -2384 -528
WIRE -2384 -320 -2480 -320
WIRE -2352 -320 -2384 -320
WIRE -2624 -288 -2832 -288
WIRE -3184 -256 -3200 -256
WIRE -3008 -256 -3024 -256
WIRE -2544 -224 -2544 -240
WIRE -2528 -224 -2544 -224
WIRE -3200 -208 -3200 -256
WIRE -3024 -208 -3024 -256
WIRE -2832 -208 -2832 -288
WIRE -2592 -208 -2592 -240
WIRE -2576 -208 -2592 -208
WIRE -3200 -80 -3200 -128
WIRE -3024 -80 -3024 -128
WIRE -2832 -80 -2832 -128
SYMBOL res -2448 -544 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage -3200 -224 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL LTC6226 -2592 -320 R0
SYMATTR InstName U1
SYMBOL voltage -2832 -224 R0
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(-75m 75m 100n 1n 1n 400n 800n)
SYMBOL res -2704 -544 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 11
SYMBOL voltage -3024 -224 R0
SYMATTR InstName V2
SYMATTR Value -5
FLAG -3200 -80 0
FLAG -3024 -80 0
FLAG -3184 -256 V+
FLAG -3008 -256 V-
FLAG -2576 -416 V+
FLAG -2576 -208 V-
FLAG -2832 -80 0
FLAG -2528 -224 V+
FLAG -2352 -320 Out
FLAG -2832 -288 In
FLAG -2832 -528 0
TEXT -2392 -56 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\004111f42170_BJT-TRAN-REGIONS.asc
* Generated by LTspice 26.0.1 for Windows.
Ibb 0 N002 0
Q1 CE N002 0 0 BC547B
R1 N001 CE 1k
V2 N001 0 {Ucc}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Ibb 0 100uA 1uA
.step param Ucc list 5V 10V
.meas dc Ic1 find Ic(Q1) when Ib(Q1)=10uA
.meas dc Ic2 find Ic(Q1) when Ib(Q1)=50uA
.meas beta1 param Ic1/10uA
.meas beta2 param Ic2/50uA
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 16 208 16
WIRE 368 16 320 16
WIRE 208 64 208 16
WIRE 208 80 208 64
WIRE 368 96 368 16
WIRE 144 128 32 128
WIRE 32 144 32 128
WIRE 32 256 32 224
WIRE 208 256 208 176
WIRE 368 256 368 176
SYMBOL voltage 368 80 R0
WINDOW 3 35 85 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 35 57 Left 2
SYMATTR Value {Ucc}
SYMATTR InstName V2
SYMBOL Misc\\EuropeanResistor 336 0 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL npn 144 80 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL current 32 224 R180
WINDOW 0 -63 0 Left 2
WINDOW 3 -66 28 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Ibb
SYMATTR Value 0
FLAG 208 256 0
FLAG 32 256 0
FLAG 368 256 0
FLAG 208 64 CE
TEXT 56 272 Left 2 !.dc Ibb 0 100uA 1uA
TEXT 56 288 Left 2 !.step param Ucc list 5V 10V
TEXT 56 344 Left 2 !.meas dc Ic1 find Ic(Q1) when Ib(Q1)=10uA\n.meas dc Ic2 find Ic(Q1) when Ib(Q1)=50uA\n.meas beta1 param Ic1/10uA\n.meas beta2 param Ic2/50uA
* Z:\home\khalils\Downloads\files\data\raw_asc\35b0aec911b9_5400-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\LT5400-3.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1468.asy)
V1 +V 0 15
V3 IN 0 AC 1
C1 N001 OUT 4.7p
C2 N002 0 4.7p
XU1 OUT IN 0 0 N002 N002 N001 N001 NC_01 LT5400-3 ;pnba 1)2)3)4)5)6)7)8)PAD
XU2 N002 N001 +V -V OUT LT1468 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -15
.ac oct 10 1K 10Meg
.lib LT5400.lib
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1472
WIRE 2304 624 1936 624
WIRE 1936 688 1936 624
WIRE 2016 688 1936 688
WIRE 2192 688 2080 688
WIRE 1936 816 1936 688
WIRE 1952 816 1936 816
WIRE 2192 816 2192 688
WIRE 2192 816 2144 816
WIRE 1952 880 1744 880
WIRE 2192 880 2192 816
WIRE 2192 880 2144 880
WIRE 1392 896 1392 880
WIRE 1520 896 1520 880
WIRE 1744 896 1744 880
WIRE 2192 896 2192 880
WIRE 2208 896 2192 896
WIRE 2304 912 2304 624
WIRE 2304 912 2272 912
WIRE 2336 912 2304 912
WIRE 2208 928 2192 928
WIRE 1952 944 1936 944
WIRE 2192 944 2192 928
WIRE 2192 944 2144 944
WIRE 1392 992 1392 976
WIRE 1520 992 1520 976
WIRE 1744 992 1744 976
WIRE 1920 1008 1872 1008
WIRE 1952 1008 1920 1008
WIRE 2192 1008 2192 944
WIRE 2192 1008 2144 1008
WIRE 1920 1120 1920 1008
WIRE 2016 1120 1920 1120
WIRE 2192 1120 2192 1008
WIRE 2192 1120 2080 1120
SYMBOL voltage 1744 880 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL misc\\LT5400-3 2048 912 R0
SYMATTR InstName U1
SYMBOL cap 2080 672 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7p
SYMBOL opamps\\LT1468 2240 848 R0
SYMATTR InstName U2
SYMBOL voltage 1392 880 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 1520 880 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL cap 2080 1104 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7p
FLAG 2240 880 +V
FLAG 2240 944 -V
FLAG 2336 912 OUT
FLAG 1520 992 0
FLAG 1520 880 +V
FLAG 1392 992 0
FLAG 1392 880 -V
FLAG 1744 992 0
FLAG 1744 880 IN
FLAG 1872 1008 0
FLAG 1936 944 0
TEXT 2312 1064 Left 2 !.ac oct 10 1K 10Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\1588b1e4d3b0_booster_power_sequencer.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\TLV431.asy)
XU1 N002 0 NC_01 TLV431 ;pnba K)A)R
R4 OUT N003 100k
R1 N001 N002 3.3k
R5 OUT 0 100
XM1 OUT N002 N001 AO3401A ;pnba D)G)S
V1 N001 0 5
R3 N003 0 3.3k
V2 N004 0 PWL(0 0 50m 3.3 100m 0)
R2 N004 N003 5k
.inc "AO3401A.mod"
.tran 100m
.lib TLV431.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 144 48 16 48
WIRE 208 48 144 48
WIRE 352 48 304 48
WIRE 432 48 352 48
WIRE 528 48 432 48
WIRE 352 112 352 48
WIRE 528 112 528 48
WIRE 224 128 224 96
WIRE 224 128 144 128
WIRE 352 192 160 192
WIRE 64 224 -96 224
WIRE -96 240 -96 224
WIRE 224 272 224 128
WIRE 160 304 160 192
WIRE 160 304 64 304
WIRE 192 304 160 304
WIRE 64 352 64 304
WIRE 224 464 224 336
SYMBOL pmos 304 96 M270
SYMATTR InstName M1
SYMATTR Value AO3401A
SYMATTR Prefix X
SYMBOL res 128 32 R0
SYMATTR InstName R1
SYMATTR Value 3.3k
SYMBOL res 336 96 R0
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL res 48 336 R0
SYMATTR InstName R3
SYMATTR Value 3.3k
SYMBOL Parts_TCO\\TLV431 224 304 M0
SYMATTR InstName U1
SYMBOL voltage -96 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 0 50m 3.3 100m 0)
SYMBOL res 512 96 R0
SYMATTR InstName R5
SYMATTR Value 100
SYMBOL voltage 16 32 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 48 208 R0
SYMATTR InstName R2
SYMATTR Value 5k
FLAG 224 464 0
FLAG 16 128 0
FLAG -96 320 0
FLAG 64 432 0
FLAG 528 192 0
FLAG 432 48 OUT
TEXT 656 40 Left 2 !.inc "AO3401A.mod"
TEXT -130 488 Left 2 !.tran 100m
* Z:\tmp\asc_dec_bjh7r6w2\186abea15bd3_Fig13_23_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M2 VDD N002 N005 VDD P_50n l=50n w=1u
M5 N003 N005 0 0 N_50n l=50n w=500n
M12 VDD N004 N001 VDD P_50n l=50n w=1u
M11 N001 N004 0 0 N_50n l=50n w=500n
M8 N003 clock_b N002 VDD P_50n l=50n w=1u
VD D 0 PULSE 0 1 300p 10p 10p 700p 1.9n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1820 680
WIRE 1632 -688 1216 -688
WIRE 272 -640 272 -672
WIRE 272 -640 240 -640
WIRE 368 -640 368 -672
WIRE 768 -640 368 -640
WIRE 272 -608 272 -640
WIRE 368 -608 368 -640
WIRE 1504 -544 1472 -544
WIRE 448 -496 416 -496
WIRE 656 -496 624 -496
WIRE 1344 -496 1344 -528
WIRE 1440 -496 1344 -496
WIRE 1472 -496 1472 -544
WIRE 1472 -496 1440 -496
WIRE 1552 -496 1552 -528
WIRE 1632 -496 1632 -688
WIRE 1632 -496 1552 -496
WIRE 1728 -496 1632 -496
WIRE 912 -480 800 -480
WIRE 240 -448 240 -640
WIRE 416 -448 416 -496
WIRE 416 -448 240 -448
WIRE 496 -448 496 -480
WIRE 576 -448 496 -448
WIRE 624 -448 624 -496
WIRE 624 -448 576 -448
WIRE 704 -448 704 -480
WIRE 768 -448 768 -640
WIRE 768 -448 704 -448
WIRE 1472 -416 1472 -496
WIRE 1504 -416 1472 -416
WIRE 416 -368 416 -448
WIRE 624 -368 624 -448
WIRE 656 -368 624 -368
WIRE 1344 -352 1344 -400
WIRE 1552 -352 1552 -400
WIRE 496 -304 496 -352
WIRE 704 -304 704 -352
WIRE 1440 -304 1440 -496
WIRE 1728 -304 1440 -304
WIRE 576 -256 576 -448
WIRE 800 -256 800 -480
WIRE 800 -256 576 -256
WIRE 16 -240 16 -256
WIRE 16 -224 16 -240
WIRE 160 -176 160 -192
WIRE 160 -160 160 -176
WIRE 352 -160 352 -192
WIRE 16 -112 16 -144
WIRE 160 -48 160 -80
WIRE 352 -48 352 -80
SYMBOL pmos4 448 -576 R0
WINDOW 0 88 9 Invisible 0
WINDOW 3 168 20 Invisible 0
SYMATTR InstName M2
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL nmos4 656 -448 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M5
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL pmos4 1504 -624 R0
WINDOW 0 88 9 Invisible 0
WINDOW 3 168 20 Invisible 0
SYMATTR InstName M12
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL nmos4 1504 -496 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M11
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL pmos4 368 -720 R90
WINDOW 0 71 26 Invisible 0
WINDOW 3 75 133 Invisible 0
SYMATTR InstName M8
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL voltage 160 -176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -161 204 Left 0
SYMATTR Value PULSE 0 1 300p 10p 10p 700p 1.9n
SYMATTR InstName VD
FLAG 496 -400 0
FLAG 16 -112 0
FLAG 16 -240 VDD
FLAG 496 -528 VDD
FLAG 496 -304 0
FLAG 496 -576 VDD
FLAG 704 -400 0
FLAG 704 -528 VDD
FLAG 704 -304 0
FLAG 704 -576 VDD
FLAG 144 -352 clock_b
FLAG 160 -48 0
FLAG 160 -176 D
FLAG 352 -48 0
FLAG 352 -192 clock
FLAG 320 -608 0
FLAG 352 -560 clock
FLAG 320 -672 VDD
FLAG 288 -720 clock_b
FLAG 1344 -448 0
FLAG 1344 -576 VDD
FLAG 1344 -352 0
FLAG 1344 -624 VDD
FLAG 1552 -448 0
FLAG 1552 -576 VDD
FLAG 1552 -352 0
FLAG 1552 -624 VDD
* Z:\home\khalils\Downloads\files\data\raw_asc\17d13ebce7da_Diode-Rectifier-demo.asc
* Generated by LTspice 26.0.1 for Windows.
V1 a 0 SINE(0 50 100k)
D1 b a EMN11
R1 b 0 50
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -256 144 -272 144
WIRE -112 144 -256 144
WIRE 80 144 -48 144
WIRE 96 144 80 144
WIRE -272 192 -272 144
WIRE 96 192 96 144
WIRE -272 320 -272 272
WIRE -80 320 -272 320
WIRE 96 320 96 272
WIRE 96 320 -80 320
WIRE -80 336 -80 320
SYMBOL Misc\\EuropeanResistor 80 176 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL Misc\\signal -272 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 50 100k)
SYMBOL diode -48 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value EMN11
FLAG -80 336 0
FLAG -256 144 a
FLAG 80 144 b
TEXT -272 344 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG702.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG702.asy)
C1 N002 0 35p
V1 +V 0 5
XU2 N003 N002 N001 0 +V ADG702 ;pnba IN)D)S)GND)Vdd
V4 N003 0 PULSE(0 3 0 10n 10n 980n 2u)
VS N001 0 3
R1 N002 0 300
.tran 10u
.lib ADG702.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -368 -16 -400 -16
WIRE -240 -16 -288 -16
WIRE 0 -16 -48 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE -480 32 -480 16
WIRE 112 32 112 -16
WIRE -240 48 -368 48
WIRE -368 112 -368 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -480 128 -480 112
WIRE -144 176 -144 160
WIRE -368 272 -368 192
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL voltage -368 96 R0
WINDOW 3 17 129 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 10n 10n 980n 2u)
SYMATTR InstName V4
SYMBOL voltage -272 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL voltage -480 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL ADG702 -144 32 R0
SYMATTR InstName U2
FLAG -480 128 0
FLAG -480 16 +V
FLAG -400 -16 0
FLAG -144 -112 +V
FLAG -144 176 0
FLAG -368 272 0
FLAG 0 112 0
FLAG 112 112 0
TEXT -536 200 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\AD4003.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\AD4003.asy)
R2 N006 N007 10
V3 N001 0 5
XU1 N001 N002 N004 MP_01 0 N006 N005 N008 AD4003 EN_Hi_Z=1 ;pnba REF)Vdd)IN+))GND)IN-)Vout)CNV
V6 N002 0 1.8
V2 N007 0 PWL(0 5 100u 0)
C1 0 N005 10p
V4 N008 0 PULSE(0 1.8 227n 0.1n 0.1n 40n 500n)
R1 N004 N003 10
V1 N003 0 PWL(0 0 100u 5)
.tran 110u
.lib AD4003.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1252
WIRE 704 224 368 224
WIRE 832 224 784 224
WIRE 368 288 368 224
WIRE 704 336 496 336
WIRE 832 336 784 336
WIRE -192 368 -240 368
WIRE -80 368 -112 368
WIRE 80 368 0 368
WIRE 80 416 80 368
WIRE 144 416 80 416
WIRE 560 432 496 432
WIRE 688 432 624 432
WIRE 144 448 80 448
WIRE -192 496 -240 496
WIRE -80 496 -112 496
WIRE 80 496 80 448
WIRE 80 496 0 496
WIRE 704 528 496 528
WIRE 816 528 784 528
WIRE 368 608 368 576
SYMBOL res 16 480 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL voltage 688 336 M90
WINDOW 0 47 41 VRight 2
WINDOW 3 -44 39 VRight 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V6
SYMATTR Value 1.8
SYMBOL voltage 688 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL AD4003 400 432 R0
SYMATTR InstName U1
SYMBOL res 16 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage -96 496 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 5 100u 0)
SYMBOL voltage -96 368 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 100u 5)
SYMBOL voltage 688 528 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 1.8 227n 0.1n 0.1n 40n 500n)
SYMBOL cap 624 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
FLAG 368 608 0
FLAG 832 336 0
FLAG -240 368 0
FLAG 688 432 0
FLAG 816 528 0
FLAG 832 224 0
FLAG -240 496 0
TEXT 192 616 Left 2 !.tran 110u
* Z:\home\khalils\Downloads\files\data\raw_asc\1422f4c9158b_101_lec_exercise_diode_einweg.asc
* Generated by LTspice 26.0.1 for Windows.
* Steckernetzteil
D1 N004 N005 1N4001
K Lp Ls 1
C1 N005 0 {C}
V1 N001 0 SINE(0 325 50)
R2 N005 0 1200
Ri N004 N003 7.2
R1 N002 N001 1e-12
Lp N002 0 {Lp}
Ls N003 0 {Ls}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.parameter Lp=100u
.parameter Ls=0.1531190926275993u
.tran 0 100m 60m
.param C = 100e-6
.model 1N4001 D(Is=14.11n N=1.984 Rs=33.89m Ikf=94.81 Xti=3 Eg=1.11 Cjo=25.89p M=.44 Vj=.3245 Fc=.5 Bv=75 Ibv=10u Tt=5.7u Iave=1 Vpk=50 mfg=GI type=silicon)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2120 680
WIRE -48 48 -96 48
WIRE 112 48 32 48
WIRE 288 48 272 48
WIRE 416 48 368 48
WIRE 512 48 480 48
WIRE 608 48 512 48
WIRE -96 64 -96 48
WIRE 112 80 112 48
WIRE 272 80 272 48
WIRE 512 80 512 48
WIRE 608 80 608 48
WIRE -96 192 -96 144
WIRE 112 192 112 160
WIRE 112 192 -96 192
WIRE 272 192 272 160
WIRE 448 192 272 192
WIRE 512 192 512 144
WIRE 512 192 448 192
WIRE 608 192 608 160
WIRE 608 192 512 192
WIRE -96 208 -96 192
WIRE 448 208 448 192
RECTANGLE Normal 368 240 80 0 2
SYMBOL res 48 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1e-12
SYMBOL res 384 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Ri
SYMATTR Value 7.2
SYMBOL ind2 256 64 R0
SYMATTR InstName Ls
SYMATTR Value {Ls}
SYMATTR Type ind
SYMBOL voltage -96 48 R0
WINDOW 0 8 103 Left 2
WINDOW 3 -54 144 VLeft 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 325 50)
SYMBOL ind2 96 64 R0
SYMATTR InstName Lp
SYMATTR Value {Lp}
SYMATTR Type ind
SYMBOL res 592 64 R0
SYMATTR InstName R2
SYMATTR Value 1200
SYMBOL diode 416 64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4001
SYMBOL cap 496 80 R0
SYMATTR InstName C1
SYMATTR Value {C}
FLAG -96 208 0
FLAG 448 208 0
TEXT 136 24 Left 2 !K Lp Ls 1
TEXT 80 -24 Left 2 ;Steckernetzteil
TEXT 80 288 Left 2 !.parameter Lp=100u
TEXT 80 320 Left 2 !.parameter Ls=0.1531190926275993u
TEXT -152 320 Left 2 !.tran 0 100m 60m
TEXT 80 352 Left 2 !.param C = 100e-6
TEXT 80 384 Left 2 !.model 1N4001 D(Is=14.11n N=1.984 Rs=33.89m Ikf=94.81 Xti=3 Eg=1.11 Cjo=25.89p M=.44 Vj=.3245 Fc=.5 Bv=75 Ibv=10u Tt=5.7u Iave=1 Vpk=50 mfg=GI type=silicon)
* Z:\tmp\asc_dec_bjh7r6w2\107f2aa32e23_DAC_Filter_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
XU2 0 N002 +5V -5V N003 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R1 N001 DAC_Out 3.3k
B2 DAC_Out 0 V={floor(V(vs0)/vrange*nlevels)/nlevels*vrange}
V1 vs0 0 SINE(0 1 {f0})
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1152 680
WIRE -320 -320 -416 -320
WIRE -192 -320 -272 -320
WIRE -416 -256 -416 -320
WIRE -272 -256 -272 -320
WIRE -416 -128 -416 -176
WIRE -272 -128 -272 -176
WIRE 496 -32 336 -32
WIRE 208 80 176 80
WIRE 336 80 336 -32
WIRE 336 80 288 80
WIRE 384 80 336 80
WIRE 512 80 464 80
WIRE 624 80 512 80
WIRE 736 80 736 -32
WIRE 736 80 688 80
WIRE 816 80 736 80
WIRE 336 128 336 80
WIRE 592 176 592 144
WIRE 512 192 512 80
WIRE 560 192 512 192
WIRE 736 208 736 80
WIRE 736 208 624 208
WIRE 336 224 336 192
WIRE 560 224 496 224
WIRE 496 272 496 224
WIRE 592 272 592 240
SYMBOL OpAmps\\UniversalOpAmp 592 208 R0
WINDOW 0 -40 -46 Left 2
SYMATTR InstName U2
SYMBOL res 304 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3.3k
SYMBOL bv -272 -272 R0
SYMATTR InstName B2
SYMATTR Value V={floor(V(vs0)/vrange*nlevels)/nlevels*vrange}
SYMBOL voltage -416 -272 R0
WINDOW 3 -83 185 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 {f0})
FLAG -416 -128 0
FLAG 336 224 0
FLAG 496 272 0
FLAG 176 80 DAC_Out
FLAG 592 144 +5V
FLAG 592 272 -5V
FLAG -272 -128 0
FLAG -320 -320 vs0
FLAG -192 -320 DAC_Out
* Z:\tmp\asc_dec_bjh7r6w2\19abd5b24485_tsmcInverter_ring_osc_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M3 out3 out2 0 0 cmosn l=0.2u w={x}
C2 out2 0 2.18p
R2 vcc out2 823.7
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 680
WIRE 432 -32 64 -32
WIRE 800 -32 432 -32
WIRE 432 0 432 -32
WIRE 800 0 800 -32
WIRE 240 112 144 112
WIRE 336 112 240 112
WIRE 432 112 432 80
WIRE 512 112 432 112
WIRE 608 112 512 112
WIRE 704 112 608 112
WIRE 800 112 800 80
WIRE 880 112 800 112
WIRE 976 112 880 112
WIRE 432 160 432 112
WIRE 800 160 800 112
WIRE 240 176 240 112
WIRE 608 176 608 112
WIRE 496 208 432 208
WIRE 864 208 800 208
WIRE 336 240 336 112
WIRE 704 240 704 112
WIRE 752 240 704 240
WIRE 432 288 432 256
WIRE 608 288 608 240
WIRE 800 288 800 256
SYMBOL nmos4 752 160 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=0.2u w={x}
SYMATTR InstName M3
SYMATTR Value cmosn
SYMBOL cap 592 176 R0
SYMATTR InstName C2
SYMATTR Value 2.18p
SYMBOL res 416 -16 R0
SYMATTR InstName R2
SYMATTR Value 823.7
FLAG 432 -32 vcc
FLAG 432 288 0
FLAG 512 112 out2
FLAG 608 288 0
FLAG 496 208 0
FLAG 800 288 0
FLAG 880 112 out3
FLAG 864 208 0