Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1cad1d4c5921_tut4_ii.asc
* Generated by LTspice 26.0.1 for Windows.
* Op Amp
* Haricharan B EP21B015
* .ac dec 100 10 1G
E1 N003 0 N002 0 1
R4 N007 0 1k
G1 N001 0 N004 N006 {gm1}
C2 N002 0 {C2}
G2 N002 0 N001 0 {gm2}
C1 N001 0 {C1}
E2 N004 N006 N005 N007 1
V1 N005 0 1 AC 1
R3 N003 N007 9k
R2 N002 0 {R2}
R1 N001 0 {R1}
.params r1=1000k r2=1000k gm1=0.1m gm2=0.1m
.tran 0 5m 0 startup
.step param K list 1 2 3 4 5 6 7 8 9 10
.param c1=table(K, 1, 1n, 2, 10n, 3, 40n, 4, 100n, 5, 141.42n, 6, 200n, 7, 500n, 8, 1u, 9, 2u, 10, 10u)
.param c2=table(K, 1, 1n, 2, 0.1n, 3, 25p, 4, 10p, 5, 7.07p, 6, 5p, 7, 2p, 8, 1p, 9, 0.5p, 10, 0.1p)
.options gshunt=1e-12
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1236 680
WIRE 352 48 256 48
WIRE 432 48 352 48
WIRE 464 48 432 48
WIRE 640 48 544 48
WIRE 720 48 640 48
WIRE 800 48 720 48
WIRE 1008 48 848 48
WIRE 848 80 848 48
WIRE 352 96 352 48
WIRE 432 96 432 48
WIRE 640 96 640 48
WIRE 720 96 720 48
WIRE 800 96 800 48
WIRE 160 112 112 112
WIRE 256 112 256 48
WIRE 64 128 16 128
WIRE 208 128 192 128
WIRE 544 128 544 48
WIRE 1008 128 1008 48
WIRE 64 176 16 176
WIRE 160 176 160 112
WIRE 208 176 160 176
WIRE 192 192 192 128
WIRE 192 192 112 192
WIRE 464 192 464 48
WIRE 496 192 464 192
WIRE 256 208 256 192
WIRE 352 208 352 176
WIRE 352 208 256 208
WIRE 432 208 432 160
WIRE 432 208 352 208
WIRE 544 208 432 208
WIRE 640 208 640 176
WIRE 640 208 544 208
WIRE 720 208 720 160
WIRE 720 208 640 208
WIRE 848 208 848 160
WIRE 848 208 720 208
WIRE 352 224 352 208
WIRE 464 224 352 224
WIRE 464 256 464 224
WIRE 16 272 16 176
WIRE 1008 272 1008 208
WIRE 1008 272 16 272
WIRE 16 288 16 272
WIRE 1008 352 1008 272
RECTANGLE Normal 960 304 -16 16 1
SYMBOL g 544 224 M180
SYMATTR InstName G2
SYMATTR Value {gm2}
SYMBOL res 992 112 R0
SYMATTR InstName R3
SYMATTR Value 9k
SYMBOL res 992 336 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL voltage 16 144 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 24 -12 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1
SYMATTR Value2 AC 1
SYMBOL e 112 96 R0
SYMATTR InstName E2
SYMATTR Value 1
SYMBOL cap 704 96 R0
SYMATTR InstName C2
SYMATTR Value {C2}
SYMBOL g 256 208 M180
SYMATTR InstName G1
SYMATTR Value {gm1}
SYMBOL res 336 80 R0
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL res 624 80 R0
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL cap 416 96 R0
SYMATTR InstName C1
SYMATTR Value {C1}
SYMBOL e 848 64 R0
SYMATTR InstName E1
SYMATTR Value 1
FLAG 496 144 0
FLAG 16 48 0
FLAG 464 256 0
FLAG 800 144 0
FLAG 1008 432 0
TEXT 448 -8 Left 2 ;Op Amp
TEXT 168 408 Left 2 !.params r1=1000k r2=1000k gm1=0.1m gm2=0.1m
TEXT 480 448 Left 2 !.tran 0 5m 0 startup
TEXT 320 -56 Left 2 ;Haricharan B EP21B015
TEXT -24 384 Left 2 ;.ac dec 100 10 1G
TEXT -56 504 Left 2 !.step param K list 1 2 3 4 5 6 7 8 9 10
TEXT -56 536 Left 2 !.param c1=table(K, 1, 1n, 2, 10n, 3, 40n, 4, 100n, 5, 141.42n, 6, 200n, 7, 500n, 8, 1u, 9, 2u, 10, 10u)
TEXT -56 568 Left 2 !.param c2=table(K, 1, 1n, 2, 0.1n, 3, 25p, 4, 10p, 5, 7.07p, 6, 5p, 7, 2p, 8, 1p, 9, 0.5p, 10, 0.1p)
TEXT 424 632 Left 2 !.options gshunt=1e-12
* Z:\home\khalils\Downloads\files\data\raw_asc\5f20b6ab39f4_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 0 0.5R
R1 N001 N004 10K
S1 N007 N001 N003 0 SW
D2 N005 N004 MURS120
R4 N007 N008 1K
Q1 NC_01 NC_02 NC_03 0 2N2907
M1 N002 N004 N001 N001 Si7137DP
V2 N003 0 SINE(0 12 1 0.01)
Q2 N006 N008 0 0 BC817-40
R3 0 N007 10K
R5 N006 N004 470R
D1 N005 N001 BZX84C10L
V1 N001 0 15
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model SW SW(Ron=1 Roff=1Meg Vt=5 Vh=-4)
.tran 2s startup
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 680
WIRE -32 96 -224 96
WIRE 80 96 -32 96
WIRE 128 96 80 96
WIRE 192 96 128 96
WIRE 400 96 288 96
WIRE 128 112 128 96
WIRE -80 144 -144 144
WIRE 80 144 80 96
WIRE -224 176 -224 96
WIRE -144 176 -144 144
WIRE -32 176 -32 96
WIRE 400 176 400 96
WIRE -80 192 -80 144
WIRE 128 208 128 192
WIRE 208 208 208 144
WIRE 208 208 128 208
WIRE 80 240 80 208
WIRE 112 240 80 240
WIRE 208 240 208 208
WIRE 208 240 176 240
WIRE 208 256 208 240
WIRE -224 288 -224 256
WIRE 400 288 400 256
WIRE -144 304 -144 256
WIRE -80 304 -80 240
WIRE -80 304 -144 304
WIRE -144 336 -144 304
WIRE 208 352 208 336
WIRE 208 352 192 352
WIRE -32 400 -32 256
WIRE 0 400 -32 400
WIRE 128 400 80 400
WIRE -32 432 -32 400
WIRE 224 448 192 448
WIRE -32 560 -32 512
WIRE 224 608 224 448
SYMBOL sw -32 272 M180
SYMATTR InstName S1
SYMBOL voltage -144 160 R0
SYMATTR InstName V2
SYMATTR Value SINE(0 12 1 0.01)
SYMBOL pnp 848 464 M180
SYMATTR InstName Q1
SYMATTR Value 2N2907
SYMBOL diode 112 256 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value MURS120
SYMATTR Description Zener Diode
SYMATTR Type zener
SYMBOL res 384 160 R0
SYMATTR InstName R2
SYMATTR Value 0.5R
SYMBOL res -16 416 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL npn 128 352 R0
SYMATTR InstName Q2
SYMATTR Value BC817-40
SYMBOL res 224 352 R180
WINDOW 0 36 76 Left 0
WINDOW 3 36 40 Left 0
SYMATTR InstName R5
SYMATTR Value 470R
SYMBOL res 112 96 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -224 160 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res -16 528 R180
WINDOW 0 36 76 Left 0
WINDOW 3 36 40 Left 0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL zener 96 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 -37 98 Left 2
SYMATTR InstName D1
SYMATTR Value BZX84C10L
SYMBOL pmos 288 144 M270
SYMATTR InstName M1
SYMATTR Value Si7137DP
FLAG 224 608 0
FLAG -144 336 0
FLAG -224 288 0
FLAG -32 560 0
FLAG 400 288 0
TEXT -312 16 Left 2 !.model SW SW(Ron=1 Roff=1Meg Vt=5 Vh=-4)
TEXT -304 40 Left 2 !.tran 2s startup
* Z:\home\khalils\Downloads\files\data\raw_asc\14fd1ddf0f99_ResistorWithTimeConstant.asc
* Generated by LTspice 26.0.1 for Windows.
* Lowpass
Cp pwr 0 {CVP}
V1 vcc 0 PULSE(0 3 0 1m 1m 1k 2k)
R1 vcc 0 R={R0*(1+K1*V(pwr))}
Rp pwr 0 1
Bp 0 pwr I=abs(I(V1)*V(VCC))
.param CVP=TAU/1
.param TAU=5 ; sec
.param R0=10 K1=0.5
.tran 20
.options plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 692
WIRE -96 288 -96 240
WIRE -96 400 -96 368
WIRE -96 560 -96 528
WIRE -96 672 -96 640
WIRE 96 240 -96 240
WIRE 96 528 -96 528
WIRE 192 240 96 240
WIRE 192 272 192 240
WIRE 192 400 192 352
WIRE 304 240 192 240
WIRE 304 288 304 240
WIRE 304 400 304 352
WIRE 304 528 96 528
WIRE 304 560 304 528
WIRE 304 672 304 640
SYMBOL res 176 256 R0
SYMATTR InstName Rp
SYMATTR Value 1
SYMBOL voltage -96 544 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 3 0 1m 1m 1k 2k)
SYMBOL bi -96 368 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName Bp
SYMATTR Value I=abs(I(V1)*V(VCC))
SYMBOL res 288 544 R0
SYMATTR InstName R1
SYMATTR Value R={R0*(1+K1*V(pwr))}
SYMBOL cap 288 288 R0
SYMATTR InstName Cp
SYMATTR Value {CVP}
FLAG 192 400 0
FLAG -96 400 0
FLAG 304 400 0
FLAG 304 672 0
FLAG -96 672 0
FLAG 96 240 pwr
FLAG 96 528 vcc
TEXT -112 8 Left 0 !.param CVP=TAU/1
TEXT -112 -32 Left 0 !.param TAU=5  ; sec
TEXT -112 48 Left 0 !.param R0=10  K1=0.5
TEXT -112 96 Left 0 !.tran 20
TEXT 184 184 Left 0 ;Lowpass
TEXT -112 128 Left 0 !.options plotwinsize=0
* Z:\home\khalils\Downloads\files\data\raw_asc\2d660fed7918_6600-10.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\FilterProducts\LT6600-10.asy)
E2 0 N002 N001 0 .5
XU1 N006 0 N008 N010 N011 N009 0 N007 LT6600-10 ;pnba IM)VOCM)VCC)OP)OM)VEE)VMID)IP
R4 N003 N005 200
R1 N004 N006 200
R2 N005 N007 200
C1 N005 N004 82p
R3 N002 N004 200
V1 N008 0 2.5
V3 0 N009 2.5
E1 N003 0 N001 0 .5
V2 N001 0 PULSE(0 .5 300n 10n 10n 50u 100u)
.tran 900n
.lib LT6600-10.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2436 800
WIRE 1056 -16 1024 -16
WIRE 1424 -16 1136 -16
WIRE 1600 -16 1424 -16
WIRE 1376 32 1376 16
WIRE 1424 32 1424 -16
WIRE 1552 32 1552 16
WIRE 1600 32 1600 -16
WIRE 1360 80 1296 80
WIRE 1488 80 1488 48
WIRE 1488 80 1440 80
WIRE 1536 80 1488 80
WIRE 1664 80 1616 80
WIRE 1296 96 1296 80
WIRE 1664 96 1664 80
WIRE 1296 192 1296 176
WIRE 1440 192 1296 192
WIRE 1664 192 1664 176
WIRE 1664 192 1504 192
WIRE 1296 208 1296 192
WIRE 1664 208 1664 192
WIRE 1296 304 1296 288
WIRE 1376 304 1296 304
WIRE 1664 304 1664 288
WIRE 1664 304 1600 304
WIRE 1376 384 1344 384
WIRE 1632 384 1600 384
WIRE 1264 464 1248 464
WIRE 1376 464 1344 464
WIRE 1616 464 1600 464
WIRE 1712 464 1696 464
WIRE 1376 544 1344 544
WIRE 1632 544 1600 544
SYMBOL LT6600-10 1488 432 R0
SYMATTR InstName U1
SYMBOL cap 1504 176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 82p
SYMBOL res 1648 80 R0
SYMATTR InstName R4
SYMATTR Value 200
SYMBOL res 1280 80 R0
SYMATTR InstName R3
SYMATTR Value 200
SYMBOL e 1456 80 R90
WINDOW 0 -23 25 VLeft 2
WINDOW 3 32 26 VLeft 2
SYMATTR InstName E2
SYMATTR Value .5
SYMBOL voltage 1712 464 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
SYMATTR InstName V3
SYMATTR Value 2.5
SYMBOL voltage 1360 464 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 1152 -16 R90
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
SYMATTR Value PULSE(0 .5 300n 10n 10n 50u 100u)
SYMATTR InstName V2
SYMBOL res 1280 192 R0
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL res 1648 192 R0
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL e 1632 80 R90
WINDOW 0 -25 24 VLeft 2
WINDOW 3 20 20 VLeft 2
SYMATTR InstName E1
SYMATTR Value .5
FLAG 1248 464 0
FLAG 1024 -16 0
FLAG 1376 16 0
FLAG 1552 16 0
FLAG 1712 464 0
FLAG 1488 48 0
FLAG 1344 384 0
FLAG 1632 384 0
TEXT 1720 576 Left 2 !.tran 900n
* Z:\home\khalils\Downloads\files\data\raw_asc\1b066b48e646_Draft59.asc
* Generated by LTspice 26.0.1 for Windows.
* leakage very low. even in overvoltage situation.
V2 PV 0 100V
R1 PV P001 100k
J1 P001 N001 0 J201
V1 0 N001 10V
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.tran 10ms
.include 74hc.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2756 1020
WIRE -112 80 -128 80
WIRE -64 80 -112 80
WIRE -112 224 -112 80
WIRE -112 224 -192 224
SYMBOL njf -64 16 R0
WINDOW 0 132 56 Right 2
WINDOW 3 158 82 Right 2
SYMATTR InstName J1
SYMATTR Value J201
SYMBOL voltage -336 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
WINDOW 3 32 8 Left 2
SYMATTR InstName V2
SYMATTR Value 100V
SYMBOL voltage -192 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
WINDOW 3 32 8 Left 2
SYMATTR InstName V1
SYMATTR Value 10V
SYMBOL res -32 -80 R0
SYMATTR InstName R1
SYMATTR Value 100k
FLAG -336 48 PV
FLAG -336 128 0
FLAG -16 -64 PV
FLAG -16 112 0
FLAG -192 144 0
TEXT -376 -200 Left 2 !.tran 10ms
TEXT -376 -120 Left 2 !.include 74hc.lib
TEXT 224 -104 Left 2 ;leakage very low. even in overvoltage situation.
* Z:\home\khalils\Downloads\files\data\raw_asc\002a86ca3041_Fig6_13_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Is(M1)
M1 N003 N001 0 N002 P_1u L=1u W=10u
VSG 0 N001 0
VBS N002 0 0
VSD 0 N003 2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSG 0 2 VBS 0 5 1
.include cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 688
WIRE 448 16 320 16
WIRE 672 16 448 16
WIRE 720 16 672 16
WIRE 320 32 320 16
WIRE 720 48 720 16
WIRE 448 112 448 16
WIRE 320 128 320 112
WIRE 400 128 320 128
WIRE 528 160 448 160
WIRE 672 160 672 16
WIRE 672 160 608 160
WIRE 672 208 672 160
WIRE 448 304 448 208
WIRE 672 304 672 288
WIRE 672 304 448 304
SYMBOL voltage 320 16 R0
WINDOW 0 -89 56 Left 2
WINDOW 3 -89 84 Left 2
SYMATTR InstName VSG
SYMATTR Value 0
SYMBOL pmos4 400 208 M180
WINDOW 123 56 100 Left 2
SYMATTR Value2 L=1u W=10u
SYMATTR InstName M1
SYMATTR Value P_1u
SYMBOL voltage 672 192 R0
WINDOW 0 41 57 Left 2
WINDOW 3 41 85 Left 2
SYMATTR InstName VSD
SYMATTR Value 2
SYMBOL voltage 512 160 M90
WINDOW 0 64 52 VBottom 2
WINDOW 3 62 93 VBottom 2
SYMATTR InstName VBS
SYMATTR Value 0
FLAG 720 48 0
TEXT 424 328 Left 2 !.dc VSG 0 2  VBS 0 5 1
TEXT 424 360 Left 2 !.include cmosedu_models.txt
TEXT 488 -8 Left 2 ;Plot Is(M1)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7182-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7182-1.5.asy)
XU1 OUT MP_01 MP_02 N001 MP_03 0 IN ADP7182-x.x Rset=300k ;pnba Vout)))EN))GND)Vin
V2 N001 0 PULSE(0 2 200u 1n 1n 10m)
C2 OUT 0 2.2
V1 IN 0 -8
R1 OUT 0 50
C1 IN 0 2.2
.tran 1m
.lib ADP7182-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 -80 -48
WIRE 112 -48 32 -48
WIRE 432 -48 368 -48
WIRE 544 -48 432 -48
WIRE -80 -32 -80 -48
WIRE 32 -32 32 -48
WIRE 432 -32 432 -48
WIRE 544 -32 544 -48
WIRE -80 64 -80 48
WIRE 32 64 32 32
WIRE 432 64 432 32
WIRE 544 64 544 48
WIRE 112 144 32 144
WIRE 32 160 32 144
WIRE 32 256 32 240
WIRE 240 256 240 208
SYMBOL voltage -80 -48 R0
SYMATTR InstName V1
SYMATTR Value -8
SYMBOL res 528 -48 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL cap 16 -32 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 2.2
SYMBOL voltage 32 144 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 200u 1n 1n 10m)
SYMBOL ADP7182-1.5 240 48 R0
SYMATTR InstName U1
FLAG -80 64 0
FLAG 32 64 0
FLAG 432 64 0
FLAG 32 256 0
FLAG 240 256 0
FLAG 544 64 0
FLAG 32 -48 IN
FLAG 432 -48 OUT
TEXT 528 248 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3204B-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3204B-3.3.asy)
Rload OUT 0 100
C2 OUT 0 2.2
C1 N001 N002 2.2
V1 IN 0 2.4
XU1 0 IN OUT N001 N002 IN LTC3204B-3.3 ;pnba GND)Vin)Vout)C+)C-)_SHDN
.tran 1m startup
.lib LTC3204B-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 160 -96 160
WIRE 16 160 0 160
WIRE 384 160 272 160
WIRE 480 160 384 160
WIRE -96 176 -96 160
WIRE 384 176 384 160
WIRE 480 176 480 160
WIRE 0 240 0 160
WIRE 16 240 0 240
WIRE 304 240 272 240
WIRE 384 272 384 240
WIRE 480 272 480 256
WIRE -96 288 -96 256
WIRE 16 320 0 320
WIRE 304 320 304 304
WIRE 304 320 272 320
SYMBOL voltage -96 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.4
SYMBOL PowerProducts\\LTC3204B-3.3 144 240 R0
SYMATTR InstName U1
SYMBOL res 464 160 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 368 176 R0
SYMATTR InstName C2
SYMATTR Value 2.2
SYMBOL cap 288 240 R0
SYMATTR InstName C1
SYMATTR Value 2.2
FLAG 384 272 0
FLAG 480 272 0
FLAG 0 320 0
FLAG -96 288 0
FLAG 480 160 OUT
FLAG -96 160 IN
TEXT 312 352 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7112-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7112-1.8.asy)
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=1.8 ;pnba Vin)Sense)EN)SS)Vout)GND
C1 OUT 0 2.2 Rser=1.5m
Rload OUT 0 10
V1 IN 0 2.7
C2 N001 0 4.7n
.tran 6m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.7
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADP7112-1.8 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\271839e17489_ls_cpr_.asc
* Generated by LTspice 26.0.1 for Windows.
R2 0 N001 {rC}
C1 N001 0 {C}
L1 IN N001 {L} Rser=0
V1 IN 0 AC 1
.ac oct 50 1k 30meg
.param L=1m rL=1m
.param C=1m rC=1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 96 -144 96
WIRE -16 96 -96 96
WIRE 144 96 64 96
WIRE 208 96 144 96
WIRE -144 128 -144 96
WIRE 144 128 144 96
WIRE 208 128 208 96
WIRE -144 240 -144 208
WIRE 144 240 144 208
WIRE 144 240 -144 240
WIRE 208 240 208 192
WIRE 208 240 144 240
WIRE -144 256 -144 240
SYMBOL voltage -144 112 R0
WINDOW 123 41 58 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL cap 192 128 R0
SYMATTR InstName C1
SYMATTR Value {C}
SYMBOL ind -32 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value {L}
SYMATTR SpiceLine Rser=0
SYMBOL res 160 224 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value {rC}
FLAG -144 256 0
FLAG -96 96 IN
TEXT -160 312 Left 2 !.ac oct 50 1k 30meg
TEXT -168 352 Left 2 !.param L=1m rL=1m\n.param C=1m rC=1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4899.asc
* Generated by LTspice 26.0.1 for Windows.
* ADA4899\nUnity-Gain Operation
* Disable: _DISABLE pin = -Vs\nEnable: _DISABLE pin = open\nLow Ib: _DISABLE pin = +Vs
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4899.asy)
Rin N002 Vin 24.9
RL Vout 0 1k
VIN Vin 0 PULSE(-1 1 20n 1n 1n 50n 100n)
VS+ +Vs 0 5
XU1 N002 N001 +Vs -Vs Vout N001 NC_01 ADA4899 ;pnba IN+)IN-)V+)V-)OUT)FB)PD
VS- 0 -Vs 5
.tran 100n
.lib ADA4899.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -336 32 -336 16
WIRE 208 64 112 64
WIRE 208 128 208 64
WIRE 224 128 224 64
WIRE 112 144 112 64
WIRE 192 144 112 144
WIRE -336 160 -336 112
WIRE -336 160 -368 160
WIRE 432 160 256 160
WIRE 480 160 432 160
WIRE -368 176 -368 160
WIRE -48 176 -160 176
WIRE 16 176 -48 176
WIRE 192 176 96 176
WIRE -336 192 -336 160
WIRE 432 192 432 160
WIRE -160 240 -160 176
WIRE 224 240 224 192
WIRE -336 288 -336 272
WIRE 432 304 432 272
WIRE -160 352 -160 320
SYMBOL res 416 176 R0
SYMATTR InstName RL
SYMATTR Value 1k
SYMBOL voltage -336 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName VS-
SYMATTR Value 5
SYMBOL ADA4899 224 176 R0
SYMATTR InstName U1
SYMBOL voltage -336 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName VS+
SYMATTR Value 5
SYMBOL voltage -160 224 R0
WINDOW 0 42 50 Left 2
WINDOW 3 42 78 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 42 106 Left 2
SYMATTR InstName VIN
SYMATTR Value PULSE(-1 1 20n 1n 1n 50n 100n)
SYMBOL res 112 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rin
SYMATTR Value 24.9
FLAG -48 176 Vin
FLAG 224 64 +Vs
FLAG 224 240 -Vs
FLAG 480 160 Vout
FLAG 432 304 0
FLAG -336 16 +Vs
FLAG -336 288 -Vs
FLAG -368 176 0
FLAG -160 352 0
TEXT -160 56 Left 2 !.tran 100n
TEXT -160 -24 Left 2 ;ADA4899\nUnity-Gain Operation
TEXT 48 384 Left 2 ;Disable: _DISABLE pin = -Vs\nEnable: _DISABLE pin = open\nLow Ib: _DISABLE pin = +Vs
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4603.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4603.asy)
V1 IN 0 6
R2 N008 0 392K
Rload OUT 0 .25
R1 N004 0 40.2K
C2 OUT 0 100 Rser=5m
XU1 IN 0 OUT 0 N006 N006 OUT 0 N002 N004 N007 N012 N010 N009 N008 N005 N003 N011 N001 N007 LTM4603 ;pnba Vin)PGND)Vout)Vosns-)Vout_LCL)DiffVout)Vosns+)SGND)Pgood)FB)DRVcc)MARG1)MARG0)Fset)MPGM)Comp)Run)Track/SS)PLLIN)INTVcc
C3 N011 0 .001
R3 IN N002 100K
R4 IN N003 10K
C1 OUT N004 100p
.tran 750u startup
.lib LTM4603.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1032 680
WIRE -160 -16 -256 -16
WIRE 128 -16 -160 -16
WIRE -256 0 -256 -16
WIRE 128 0 128 -16
WIRE 272 0 272 -16
WIRE -160 48 -160 -16
WIRE -144 48 -160 48
WIRE 16 48 -64 48
WIRE 432 48 400 48
WIRE 640 48 432 48
WIRE 704 48 640 48
WIRE 704 64 704 48
WIRE -256 96 -256 80
WIRE -160 112 -160 48
WIRE -80 112 -160 112
WIRE 16 112 0 112
WIRE 432 112 400 112
WIRE 512 112 432 112
WIRE 608 112 592 112
WIRE 704 144 704 128
WIRE 16 176 0 176
WIRE 432 176 400 176
WIRE 16 240 0 240
WIRE 432 240 432 176
WIRE 432 240 400 240
WIRE 640 288 640 48
WIRE 736 288 640 288
WIRE 0 304 0 240
WIRE 16 304 0 304
WIRE 640 304 640 288
WIRE 640 304 400 304
WIRE 736 304 736 288
WIRE -80 368 -96 368
WIRE 16 368 0 368
WIRE 640 368 400 368
WIRE 640 400 640 368
WIRE 736 400 736 384
WIRE 736 400 640 400
WIRE 736 416 736 400
WIRE 16 432 0 432
WIRE 416 432 400 432
WIRE -64 496 -80 496
WIRE 16 496 0 496
WIRE 416 496 400 496
WIRE 128 576 128 560
WIRE 288 576 288 560
SYMBOL cap 416 48 R0
WINDOW 0 34 18 Left 2
WINDOW 3 35 47 Left 2
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL res -96 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 496 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 40.2K
SYMBOL cap 688 64 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=5m
SYMBOL res -160 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 0 480 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL res 720 288 R0
SYMATTR InstName Rload
SYMATTR Value .25
SYMBOL voltage -256 -16 R0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL res 16 384 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 392K
SYMBOL PowerProducts\\LTM4603 208 256 R0
SYMATTR InstName U1
FLAG 128 576 0
FLAG 288 576 0
FLAG 608 112 0
FLAG -96 368 0
FLAG 704 144 0
FLAG 736 416 0
FLAG -256 96 0
FLAG -80 496 0
FLAG 736 288 OUT
FLAG -256 -16 IN
TEXT 472 496 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\392df41256cf_6553.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6553.asy)
R1 0 OUTR 150
XU1 0 0 IN 0 0 0 0 -V OUTB +V OUTG OUTR LT6553 ;pnba _EN)DGND)INR)AGND1)ING)AGND2)INB)V-)OUTB)V+)OUTG)OUTR
V2 -V 0 -5
V3 IN 0 AC 1
V1 +V 0 5
.ac dec 100 100K 1G
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 924 868
WIRE 336 432 336 384
WIRE 240 480 32 480
WIRE 32 496 32 480
WIRE 592 496 432 496
WIRE 640 496 592 496
WIRE 592 512 592 496
WIRE -240 528 -240 512
WIRE -128 528 -128 512
WIRE 240 544 192 544
WIRE 32 592 32 576
WIRE 464 592 432 592
WIRE 192 608 192 544
WIRE 240 608 192 608
WIRE 592 608 592 592
WIRE -240 624 -240 608
WIRE -128 624 -128 608
WIRE 192 640 192 608
WIRE 240 640 192 640
WIRE 464 672 432 672
WIRE 192 688 192 640
WIRE 240 688 192 688
WIRE 192 720 192 688
WIRE 272 768 272 736
WIRE 336 768 336 736
WIRE 400 768 400 736
SYMBOL LT6553 336 512 R0
SYMATTR InstName U1
SYMBOL voltage 32 480 R0
WINDOW 123 20 100 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value ""
SYMBOL voltage -128 512 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 576 608 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 150
SYMBOL voltage -240 512 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -240 624 0
FLAG -128 624 0
FLAG 336 384 +V
FLAG 192 720 0
FLAG 32 592 0
FLAG 32 480 IN
FLAG 640 496 OUTR
FLAG 464 592 OUTG
FLAG 464 672 OUTB
FLAG 592 608 0
FLAG -240 512 +V
FLAG -128 512 -V
FLAG 400 768 -V
FLAG 272 768 0
FLAG 336 768 0
TEXT 504 784 Left 2 !.ac dec 100 100K 1G