Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8058.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8058.asy)
C3 OUT2 0 10
R2 N004 0 162K
Rload1 OUT1 0 64
R1 N005 0 6.19K
XU1 0 OUT1 0 N005 IN N001 IN N003 N002 OUT2 N004 LTM8058 ;pnba GND)Vout1)Vout-)Adj1)Vin)Bias)Run)SS)BYP)Vout2)Adj2
C1 N001 0 4.7
C2 OUT1 0 22
V1 IN 0 16
Rload2 OUT2 0 64
.tran 2m startup
.lib LTM8058.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1108 752
WIRE 112 48 0 48
WIRE 128 48 112 48
WIRE 576 48 448 48
WIRE 864 48 576 48
WIRE 0 64 0 48
WIRE 864 112 864 48
WIRE 112 144 112 48
WIRE 128 144 112 144
WIRE 672 144 448 144
WIRE 752 144 672 144
WIRE 0 160 0 144
WIRE 576 192 576 48
WIRE 48 240 32 240
WIRE 128 240 112 240
WIRE 464 240 448 240
WIRE 672 240 672 144
WIRE 752 240 752 144
WIRE 128 336 112 336
WIRE 480 336 448 336
WIRE 32 432 16 432
WIRE 128 432 112 432
WIRE 480 432 480 416
WIRE 480 432 448 432
WIRE 576 432 576 256
WIRE 576 432 480 432
WIRE 672 432 672 304
WIRE 672 432 576 432
WIRE 752 432 752 320
WIRE 752 432 672 432
WIRE 864 432 864 192
WIRE 864 432 752 432
WIRE 864 448 864 432
WIRE 288 496 288 480
SYMBOL res 848 96 R0
SYMATTR InstName Rload1
SYMATTR Value 64
SYMBOL cap 656 240 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res 736 224 R0
SYMATTR InstName Rload2
SYMATTR Value 64
SYMBOL PowerProducts\\LTM8058 288 240 R0
SYMATTR InstName U1
SYMBOL voltage 0 48 R0
SYMATTR InstName V1
SYMATTR Value 16
SYMBOL res 128 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 6.19K
SYMBOL cap 560 192 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL cap 112 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL res 464 320 R0
SYMATTR InstName R2
SYMATTR Value 162K
FLAG 0 160 0
FLAG 32 240 0
FLAG 16 432 0
FLAG 288 496 0
FLAG 864 448 0
FLAG 864 48 OUT1
FLAG 0 48 IN
FLAG 752 144 OUT2
TEXT 584 472 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0448b87b92d8_sallen-key.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
XU1 N003 OUT NC_01 NC_02 OUT level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 N001 0 AC 1 0
C1 N003 0 1n
R1 N003 N002 15k
C2 OUT N002 2n
R2 N002 N001 10k
.ac dec 100 1 10e6
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 0 224 0
WIRE 512 0 384 0
WIRE 224 16 224 0
WIRE 384 64 384 0
WIRE 416 64 384 64
WIRE 512 80 512 0
WIRE 512 80 480 80
WIRE 560 80 512 80
WIRE 96 96 -16 96
WIRE 224 96 224 80
WIRE 224 96 176 96
WIRE 256 96 224 96
WIRE 368 96 336 96
WIRE 416 96 368 96
WIRE -16 112 -16 96
WIRE 368 128 368 96
WIRE -16 224 -16 192
WIRE 368 224 368 192
IOPIN 560 80 Out
SYMBOL OpAmps\\UniversalOpAmp 448 80 R0
SYMATTR InstName U1
SYMBOL res 352 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 15k
SYMBOL cap 352 128 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 192 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL cap 208 16 R0
SYMATTR InstName C2
SYMATTR Value 2n
SYMBOL voltage -16 96 R0
WINDOW 123 -125 85 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1 0
FLAG -16 224 0
FLAG 368 224 0
FLAG 560 80 OUT
TEXT 480 184 Left 2 !.ac dec 100 1 10e6
* Z:\tmp\asc_dec_bjh7r6w2\0ef218ae2ea2_2nd_Multipule_FeedBack_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N005 N001 8.2k
V1 N004 0 PULSE(-1 1 0 2.5u 2.5u 0 5u) AC 1
R1 N001 N004 {Ra}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -160 48 -192 48
WIRE -48 48 -80 48
WIRE 128 48 -48 48
WIRE -48 64 -48 48
WIRE -528 80 -544 80
WIRE -448 80 -464 80
WIRE -464 96 -464 80
WIRE -288 144 -336 144
WIRE -192 144 -192 48
WIRE -192 144 -208 144
WIRE -160 144 -192 144
WIRE -48 144 -48 128
WIRE -48 144 -80 144
WIRE 32 144 -48 144
WIRE 128 160 128 48
WIRE 128 160 96 160
WIRE 160 160 128 160
WIRE -336 176 -336 144
WIRE -192 176 -192 144
WIRE 32 176 -16 176
WIRE -464 208 -464 176
WIRE -336 272 -336 256
WIRE -192 272 -192 240
WIRE -16 272 -16 176
SYMBOL res -64 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 8.2k
SYMBOL voltage -336 160 R0
WINDOW 3 -23 162 Left 2
WINDOW 123 -23 190 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(-1 1 0 2.5u 2.5u 0 5u)
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL res -192 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {Ra}
FLAG -336 272 0
FLAG -192 272 0
FLAG -16 272 0
FLAG -464 208 0
FLAG -464 80 VEE
FLAG 64 128 VCC
FLAG 64 192 VEE
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1995.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1995.asy)
V1 +V 0 +15
V3 N001 N002 PULSE(-1 1 0 1n 1n .5u 1u)
V2 -V 0 -15
XU1 N002 NC_01 NC_02 -V 0 OUT +V NC_03 NC_04 N001 LT1995 ;pnba P1)P2)P4)Vee)Ref)OUT)VCC)M4)M2)M1
.tran 3u
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 48 -256 48
WIRE 400 48 352 48
WIRE 96 64 96 48
WIRE 272 64 272 48
WIRE 352 64 352 48
WIRE -496 144 -496 128
WIRE -384 144 -384 128
WIRE -256 144 -256 48
WIRE -496 240 -496 224
WIRE -384 240 -384 224
WIRE -256 336 -256 224
WIRE 96 336 96 320
WIRE 96 336 -256 336
WIRE 272 336 272 320
WIRE 352 352 352 320
SYMBOL voltage -256 128 R0
WINDOW 0 14 8 Left 2
WINDOW 3 15 104 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(-1 1 0 1n 1n .5u 1u)
SYMBOL voltage -496 128 R0
SYMATTR InstName V1
SYMATTR Value +15
SYMBOL voltage -384 128 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL opamps\\LT1995 272 192 R0
SYMATTR InstName U1
FLAG 352 352 0
FLAG 272 48 +V
FLAG 272 336 -V
FLAG -496 128 +V
FLAG -496 240 0
FLAG -384 240 0
FLAG -384 128 -V
FLAG 400 48 OUT
TEXT 400 296 Left 2 !.tran 3u
* Z:\tmp\asc_dec_bjh7r6w2\01727687af30_1_WPZ_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N004 47.4k
M1 N004 N005 0 0 nch l=2u w=5u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1180 952
WIRE 176 480 -112 480
WIRE 176 512 176 480
WIRE 416 576 416 480
WIRE 432 624 416 624
WIRE 176 656 176 592
WIRE 368 656 176 656
WIRE 416 688 416 672
WIRE 416 688 336 688
WIRE 176 704 176 656
WIRE 416 704 416 688
WIRE 176 752 160 752
WIRE 432 752 416 752
WIRE 336 784 336 688
WIRE 336 784 224 784
WIRE 368 784 336 784
WIRE 160 800 160 752
WIRE 176 800 160 800
WIRE 432 800 416 800
WIRE 176 832 176 800
WIRE 416 832 416 800
SYMBOL res 160 496 R0
SYMATTR InstName R1
SYMATTR Value 47.4k
SYMBOL nmos4 224 704 M0
WINDOW 123 82 67 Left 2
WINDOW 0 81 19 Left 2
WINDOW 3 82 45 Left 2
SYMATTR Value2 l=2u w=5u
SYMATTR InstName M1
SYMATTR Value nch
FLAG 416 832 0
FLAG 176 832 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADR3425.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR3425.asy)
XU1 0 0 vIN vIN vOUT vOUT ADR3425 ;pnba GNDF)GNDS)EN)IN)OUTS)OUTF
S1 0 vOUT N002 0 5mA
C1 vOUT 0 1
I1 vOUT 0 3.5mA
S2 vOUT vIN N001 0 5mA
V1 vIN 0 4
C2 vIN 0 0.1
V3 N001 0 PULSE(0 1 100u 100n 100n 0.6m 2m)
V2 N002 0 PULSE(0 1 1m 100n 100n 0.6m 2m)
.tran 2m
.model 5mA SW(Ron=10 Roff=1G Vt=.5 Vh=-.2 Ilimit=5m level=2)
.lib ADR3425.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4212 1120
WIRE 2208 256 1584 256
WIRE 2208 272 2208 256
WIRE 2464 288 2256 288
WIRE 2576 288 2544 288
WIRE 2288 336 2256 336
WIRE 1584 352 1584 256
WIRE 1696 352 1584 352
WIRE 2080 352 1952 352
WIRE 1584 416 1584 352
WIRE 1584 416 1488 416
WIRE 1696 416 1584 416
WIRE 2080 416 2080 352
WIRE 2080 416 1952 416
WIRE 2208 416 2208 352
WIRE 2208 416 2080 416
WIRE 2256 416 2208 416
WIRE 2464 416 2256 416
WIRE 2576 416 2544 416
WIRE 1488 432 1488 416
WIRE 1584 464 1584 416
WIRE 2080 464 2080 416
WIRE 1776 512 1776 464
WIRE 1824 512 1776 512
WIRE 1872 512 1872 464
WIRE 1872 512 1824 512
WIRE 2208 528 2208 416
WIRE 1488 544 1488 512
WIRE 1584 544 1584 528
WIRE 1824 544 1824 512
WIRE 2080 544 2080 528
WIRE 2464 544 2256 544
WIRE 2576 544 2544 544
WIRE 2288 592 2256 592
WIRE 2208 624 2208 608
SYMBOL voltage 2448 544 M90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 34 72 VTop 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 1m 100n 100n 0.6m 2m)
SYMBOL current 2464 416 R270
WINDOW 0 32 40 VTop 2
WINDOW 3 -35 41 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 3.5mA
SYMBOL ADR3425 1824 368 R0
SYMATTR InstName U1
SYMBOL cap 1568 464 R0
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL voltage 1488 416 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL sw 2208 368 R180
WINDOW 0 -11 104 Right 2
WINDOW 3 -15 14 Right 2
SYMATTR InstName S2
SYMATTR Value 5mA
SYMBOL cap 2064 464 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL sw 2208 624 R180
WINDOW 0 -7 103 Right 2
WINDOW 3 -10 16 Right 2
SYMATTR InstName S1
SYMATTR Value 5mA
SYMBOL voltage 2448 288 M90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 35 86 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 1 100u 100n 100n 0.6m 2m)
SYMATTR InstName V3
FLAG 1824 544 0
FLAG 2256 416 vOUT
FLAG 1488 416 vIN
FLAG 1488 544 0
FLAG 2080 544 0
FLAG 2208 624 0
FLAG 2288 592 0
FLAG 2576 544 0
FLAG 2288 336 0
FLAG 2576 288 0
FLAG 2576 416 0
FLAG 1584 544 0
TEXT 1456 656 Left 2 !.tran 2m\n.model 5mA SW(Ron=10 Roff=1G Vt=.5 Vh=-.2 Ilimit=5m level=2)
* Z:\home\khalils\Downloads\files\data\raw_asc\b0cc69cb88f5_PMOSvtc.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 -1.8
M1 N001 N002 0 N003 PMOS l=1080nm w=1080nm
V2 N002 0 -1.8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V1 0 -1.80 0.1 V2 0 -1.8 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 64 176 64
WIRE 176 96 176 64
WIRE 176 208 176 176
WIRE 128 288 0 288
WIRE 176 288 176 256
WIRE 0 352 0 288
WIRE 176 368 176 304
WIRE 0 496 0 432
SYMBOL pmos4 128 208 R0
SYMATTR InstName M1
SYMATTR Value2 l=1080nm w=1080nm
SYMBOL voltage 176 192 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -1.8
SYMBOL voltage 0 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -1.8
FLAG 0 496 0
FLAG 176 368 0
FLAG 272 64 0
TEXT -272 80 Left 2 !.dc V1 0 -1.80 0.1 V2 0 -1.8 0.2
* Z:\home\khalils\Downloads\files\data\raw_asc\28756803e66b_E4-FPB-RC.asc
* Generated by LTspice 26.0.1 for Windows.
C1 Vo 0 100n
V1 N001 0 AC 1V
R1 Vo N001 4.7k
.ac dec 50 1Hz 100kHz
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -240 -160 -320 -160
WIRE -96 -160 -160 -160
WIRE -48 -160 -96 -160
WIRE -320 -112 -320 -160
WIRE -96 -112 -96 -160
WIRE -320 0 -320 -32
WIRE -96 0 -96 -48
WIRE -96 0 -320 0
WIRE -320 32 -320 0
SYMBOL res -144 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL cap -112 -112 R0
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL voltage -320 -128 R0
WINDOW 123 26 97 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1V
FLAG -320 32 0
FLAG -48 -160 Vo
TEXT -354 56 Left 2 !.ac dec 50 1Hz 100kHz
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8068.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8068.asy)
C1 OUT2 0 10 Rser=5m
Rload OUT2 0 16.67
XU1 IN 0 IN 0 OUT1 OUT2 N002 N001 MP_01 NC_02 LTM8068 ;pnba RUN)Voutn)Vin)GND)Vout1)Vout2)Rref)FB2))BYP
C2 OUT1 0 22 Rser=30m
R1 N002 0 7.32K
R2 N001 0 162K
V1 IN 0 24
.tran 7m startup
.lib LTM8068.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 964 680
WIRE 64 48 -16 48
WIRE 80 48 64 48
WIRE 352 48 304 48
WIRE 384 48 352 48
WIRE -16 64 -16 48
WIRE 64 144 64 48
WIRE 80 144 64 144
WIRE 480 144 304 144
WIRE 560 144 480 144
WIRE -16 160 -16 144
WIRE 480 160 480 144
WIRE 560 160 560 144
WIRE 320 240 304 240
WIRE 416 240 400 240
WIRE 480 256 480 224
WIRE 560 256 560 240
WIRE -16 336 -32 336
WIRE 80 336 64 336
WIRE 80 432 64 432
WIRE 320 432 304 432
SYMBOL cap 464 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=5m
SYMBOL voltage -16 48 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 304 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 162K
SYMBOL cap 384 64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 22
SYMATTR SpiceLine Rser=30m
SYMBOL res 80 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 7.32K
SYMBOL res 544 144 R0
SYMATTR InstName Rload
SYMATTR Value 16.67
SYMBOL PowerProducts\\LTM8068 192 240 R0
SYMATTR InstName U1
FLAG 64 432 0
FLAG -16 160 0
FLAG -16 48 IN
FLAG 352 48 OUT1
FLAG -32 336 0
FLAG 560 144 OUT2
FLAG 320 432 0
FLAG 416 240 0
FLAG 448 48 0
FLAG 480 256 0
FLAG 560 256 0
TEXT 432 424 Left 2 !.tran 7m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL42005.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 6
Rload OUT 0 8.6
C1 OUT 0 2.2 Rser=1.5m
R1 OUT N002 25k
R2 N002 0 10k
R3 OUT N001 100k
XU1 IN N002 IN N001 OUT 0 ADPL42005 ;pnba Vin)ADJ)EN)PG)Vout)GND
.tran 3m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL42005.asy)
.lib ADPL42005.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 400 32 352 32
WIRE 528 32 480 32
WIRE -16 48 -16 32
WIRE 400 128 352 128
WIRE 528 128 528 32
WIRE 528 128 400 128
WIRE 608 128 528 128
WIRE 624 128 608 128
WIRE -16 144 -16 128
WIRE 528 144 528 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 400 224 400 208
WIRE 400 224 352 224
WIRE 528 224 528 208
WIRE 624 224 624 208
WIRE 400 240 400 224
WIRE 224 304 224 288
WIRE 400 336 400 320
FLAG 224 304 0
FLAG -16 144 0
FLAG -16 32 IN
FLAG 624 224 0
FLAG 528 224 0
FLAG 608 128 OUT
FLAG 400 336 0
SYMBOL voltage -16 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL res 608 112 R0
SYMATTR InstName Rload
SYMATTR Value 8.6
SYMBOL cap 512 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 384 112 R0
SYMATTR InstName R1
SYMATTR Value 25k
SYMBOL res 384 224 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 496 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL ADPL42005 224 128 R0
SYMATTR InstName U1
TEXT 512 304 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\edfd2651496d_mos_param_visibility.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc V1 0 5 .01
* How to make L and W visible, but not the other like AD, PS ...\n \nAdd symbols "nmos4" and "pmos4" to the schematic.\nThe Mosfets become an instance after you you placed it.\nChange NMOS to the model name, e.g. NMOS1.\nChange PMOS to the model name, e.g. PMOS2. \nCtrl-RightMouseClick on the body of a Mosfet.\nAdd L= ... W= ... into the field "Value2". Enable visibility!\nAdd AD= PS= ......... into the field "SpiceLine".\n \nLook in the Spice Error Log file for results after a RUN.\nView->SPICE Error Log\n \nSome parameters are from here:\nhttp://myqu.qu.edu.qa/malani/VLSI/2-Input%20NOR%20Gate.doc
M2 out in vdd vdd PMOS1 L=2u W=10u AD=80p PD=25u AS=80p PS=25u
M3 out in 0 0 NMOS1 L=2u W=10u AD=80p PD=25u AS=80p PS=25u
V1 in 0 2.5
V2 vdd 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.op
.model PMOS1 pmos level=2 nsub=4e15 tox=50n
.model NMOS1 nmos level=2 nsub=4e15 tox=50n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1404 948
WIRE 48 400 48 320
WIRE 48 544 48 480
WIRE 64 32 64 -32
WIRE 64 176 64 112
WIRE 112 320 48 320
WIRE 256 320 112 320
WIRE 256 320 256 160
WIRE 256 464 256 320
WIRE 352 160 256 160
WIRE 352 464 256 464
WIRE 400 -32 64 -32
WIRE 400 80 400 -32
WIRE 400 144 400 80
WIRE 400 320 400 240
WIRE 400 384 400 320
WIRE 400 544 400 480
WIRE 496 192 400 192
WIRE 496 432 400 432
WIRE 560 320 400 320
SYMBOL voltage 48 384 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL nmos4 352 384 R0
WINDOW 123 56 100 Left 0
SYMATTR InstName M3
SYMATTR Value NMOS1
SYMATTR Value2 L=2u W=10u
SYMATTR SpiceLine AD=80p PD=25u AS=80p PS=25u
SYMBOL voltage 64 16 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL pmos4 352 240 M180
WINDOW 0 59 69 Left 0
WINDOW 3 57 27 Left 0
WINDOW 123 57 -1 Left 0
SYMATTR InstName M2
SYMATTR Value PMOS1
SYMATTR Value2 L=2u W=10u
SYMATTR SpiceLine AD=80p PD=25u AS=80p PS=25u
FLAG 112 320 in
FLAG 400 544 0
FLAG 496 432 0
FLAG 496 192 vdd
FLAG 400 80 vdd
FLAG 560 320 out
FLAG 64 176 0
FLAG 48 544 0
TEXT 24 -104 Left 0 !.op
TEXT 24 624 Left 0 !.model PMOS1 pmos level=2 nsub=4e15 tox=50n\n.model NMOS1 nmos level=2 nsub=4e15 tox=50n
TEXT 24 -136 Left 0 ;.dc V1 0 5 .01
TEXT 16 -608 Left 0 ;How to make L and W visible, but not the other like AD, PS ...\n \nAdd symbols "nmos4" and "pmos4" to the schematic.\nThe Mosfets become an instance after you you placed it.\nChange NMOS to the model name, e.g. NMOS1.\nChange PMOS to the model name, e.g. PMOS2. \nCtrl-RightMouseClick on the body of a Mosfet.\nAdd L= ... W= ... into the field "Value2". Enable visibility!\nAdd AD= PS= ......... into the field "SpiceLine".\n \nLook in the Spice Error Log file for results after a RUN.\nView->SPICE Error Log\n \nSome parameters are from here:\nhttp://myqu.qu.edu.qa/malani/VLSI/2-Input%20NOR%20Gate.doc
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2139-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
L1 N001 OUT 1 Rser=60m
Rload OUT 0 5
C1 OUT 0 10
XU1 IN IN N001 OUT 0 IN ADP2139-x.x Rtop=448K ;pnba Vin)EN)SW)Vout)GND)Mode
.tran .5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2139-3.3.asy)
.lib ADP2139-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 192 224 192 144
WIRE 208 224 192 224
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 224
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=60m
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ADP2139-3.3 352 224 R0
SYMATTR InstName U1
TEXT 600 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\33105ad9e0dd_q2a.asc
* Generated by LTspice 26.0.1 for Windows.
M231EC147 N001 N002 0 0 NMOS L=0.18u W=1.8u
V_GS N002 0 0
V_DS N001 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include "tsmc180.txt"
.dc V_DS 0 1.8 0.01 V_GS 0.2 1.8 0.4
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -144 64 -144
WIRE 64 -80 64 -144
WIRE 160 -32 64 -32
WIRE 16 0 -96 0
WIRE 160 16 160 -32
WIRE 160 16 64 16
WIRE 64 32 64 16
FLAG 64 32 0
FLAG -96 80 0
FLAG 208 -64 0
SYMBOL nmos4 16 -80 R0
SYMATTR InstName 231EC147
SYMATTR Value2 L=0.18u W=1.8u
SYMBOL voltage -96 -16 R0
SYMATTR InstName V_GS
SYMATTR Value 0
SYMBOL voltage 208 -160 R0
SYMATTR InstName V_DS
SYMATTR Value 0
TEXT -128 -184 Left 2 !.include "tsmc180.txt"
TEXT -240 104 Left 2 !.dc V_DS 0 1.8 0.01 V_GS 0.2 1.8 0.4
* Z:\home\khalils\Downloads\files\data\raw_asc\0ba33cfe1a89_Gummel_Plot.asc
* Generated by LTspice 26.0.1 for Windows.
* Gummel Plot
* linear sweep of Vbe
* plot Ib(Q1) and Ic(Q1) on log scale
* base and collector currents as a function of Vbe
* copyright Cordell Audio 11/30/2010
;op
Q1 N001 Vbe 0 0 mjl21194C
Vbe Vbe 0 0.6
Vce N001 0 15
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Vbe 0.4 0.9 0.01
.include Cordell_Mods
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 744
WIRE 160 256 0 256
WIRE -96 304 -176 304
WIRE -64 304 -96 304
WIRE 160 336 160 256
WIRE -176 368 -176 304
WIRE 0 384 0 352
WIRE -176 496 -176 448
WIRE 160 496 160 416
SYMBOL npn -64 256 R0
SYMATTR InstName Q1
SYMATTR Value mjl21194C
SYMBOL voltage -176 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 39 40 Left 0
WINDOW 3 39 80 Left 0
SYMATTR InstName Vbe
SYMATTR Value 0.6
SYMBOL voltage 160 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 43 Left 0
WINDOW 3 44 77 Left 0
SYMATTR InstName Vce
SYMATTR Value 15
FLAG 160 496 0
FLAG -176 496 0
FLAG -96 304 Vbe
FLAG 0 384 0
TEXT -472 200 Left 0 !;op
TEXT -96 40 Left 0 ;Gummel Plot
TEXT -472 240 Left 0 !.dc Vbe 0.4 0.9 0.01
TEXT -472 168 Left 0 !.include Cordell_Mods
TEXT -456 560 Left 0 ;linear sweep of Vbe
TEXT -456 592 Left 0 ;plot Ib(Q1) and Ic(Q1) on log scale
TEXT -312 96 Left 0 ;base and collector currents as a function of Vbe
TEXT -104 728 Left 0 ;copyright Cordell Audio 11/30/2010
* Z:\home\khalils\Downloads\files\data\raw_asc\325c20281a66_Transistor_ckt_for_bat_full_charge.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N004 N003 47K
D2 In N001 NSPW500BS
V1 In 0 SINE(11 1.6 1)
R3 N001 N002 330
Q1 N002 N004 0 0 NPN
R1 N003 0 10K
D1 N003 In BZX84C12L
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 1 0 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -496 -208 -496 -240
WIRE -64 -208 -496 -208
WIRE 192 -208 -64 -208
WIRE 192 -144 192 -208
WIRE 192 -16 192 -80
WIRE -64 32 -64 -208
WIRE -496 48 -496 -208
WIRE 192 112 192 64
WIRE -64 160 -64 96
WIRE -16 160 -64 160
WIRE 128 160 64 160
WIRE -64 224 -64 160
WIRE -496 352 -496 128
WIRE -64 352 -64 304
WIRE -64 352 -496 352
WIRE 192 352 192 208
WIRE 192 352 -64 352
WIRE 192 368 192 352
SYMBOL npn2 128 112 R0
SYMATTR InstName Q1
SYMBOL res -80 208 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 80 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 47K
SYMBOL LED 176 -144 R0
SYMATTR InstName D2
SYMATTR Value NSPW500BS
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 176 -32 R0
SYMATTR InstName R3
SYMATTR Value 330
SYMBOL voltage -496 32 R0
SYMATTR InstName V1
SYMATTR Value SINE(11 1.6 1)
SYMBOL zener -48 96 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BZX84C12L
SYMATTR Description Diode
SYMATTR Type diode
FLAG 192 368 0
FLAG -496 -240 In
TEXT -720 -56 Left 2 !.tran 0 1 0 0.1