Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\5440f6578709_Calcular_rd.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 0 D
D2 N003 0 D
V1 N001 0 5
R2 N001 N003 1k
R1 N001 N002 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 4.5 5.5 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -16 0 -16
WIRE 304 -16 160 -16
WIRE 160 32 160 -16
WIRE 304 32 304 -16
WIRE 0 96 0 -16
WIRE 160 160 160 112
WIRE 304 160 304 112
WIRE 0 272 0 176
WIRE 160 272 160 224
WIRE 160 272 0 272
WIRE 304 272 304 224
WIRE 304 272 160 272
SYMBOL res 288 16 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 144 16 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 144 160 R0
SYMATTR InstName D1
SYMBOL diode 288 160 R0
SYMATTR InstName D2
SYMBOL voltage 0 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 160 272 0
TEXT -34 296 Left 2 !.dc V1 4.5 5.5 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\0ec10bfb3a6e_Lab_1_Circ_3__Vin.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 V1 V_01 Vcc Vss V_01 LM324 ;pnba In+)In-)V+)V-)OUT
R1 V_01 N001 10k
R2 N001 N002 5k
R3 V_01 0 10k
R4 N002 V_02 10k
XU2 V2 N002 Vcc Vss V_02 LM324 ;pnba In+)In-)V+)V-)OUT
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1560 680
WIRE 192 -320 176 -320
WIRE 400 -320 272 -320
WIRE 528 -320 480 -320
WIRE 64 -208 48 -208
WIRE 176 -208 176 -320
WIRE 176 -208 144 -208
WIRE 352 -208 176 -208
WIRE 528 -208 528 -320
WIRE 592 -208 528 -208
WIRE 704 -208 672 -208
WIRE 48 -192 48 -208
WIRE 176 -96 176 -208
WIRE 192 -96 176 -96
WIRE 528 -96 528 -208
WIRE 544 -96 528 -96
WIRE 352 -80 352 -208
WIRE 352 -80 256 -80
WIRE 368 -80 352 -80
WIRE 704 -80 704 -208
WIRE 704 -80 608 -80
WIRE 720 -80 704 -80
WIRE 192 -64 160 -64
WIRE 544 -64 528 -64
FLAG 48 -192 0
FLAG 224 -112 Vcc
FLAG 224 -48 Vss
FLAG 720 -80 V_02
IOPIN 720 -80 Out
FLAG 160 -64 V1
IOPIN 160 -64 In
FLAG 368 -80 V_01
IOPIN 368 -80 Out
FLAG 576 -112 Vcc
FLAG 576 -48 Vss
FLAG 528 -64 V2
IOPIN 528 -64 In
SYMBOL OpAmps\\opamp2 224 -144 R0
SYMATTR InstName U1
SYMATTR Value LM324
SYMBOL res 176 -304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 384 -304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 5k
SYMBOL res 160 -224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 576 -192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL OpAmps\\opamp2 576 -144 R0
SYMATTR InstName U2
SYMATTR Value LM324
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP122-2.7.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP122-2.7.asy)
C2 OUT 0 1
XU1 OUT MP_01 0 IN MP_02 IN ADP122 K=1/5400 ;pnba Vout))GND)En))Vin
Rload OUT 0 100
V1 IN 0 5.5
C1 IN 0 1
.tran 10m startup
.lib ADP122.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL ADP122-2.7 256 208 R0
SYMATTR InstName U1
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4051.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4051.asy)
R1 N001 0 10K
Vin IN 0 SINE(0 1 1K)
V2 -V 0 -2.5
V1 +V 0 2.5
XU1 IN N001 +V -V OUT ADA4051 ;pnba In+)In-)V+)V-)OUT
Rload OUT 0 10K
R2 OUT N001 10K
.tran 10m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 128 -1152 128 -1168
WIRE 240 -1152 240 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 128 -1056 128 -1072
WIRE 240 -1056 240 -1072
WIRE 576 -1056 576 -1072
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 240 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 1K)
SYMBOL Opamps\\ADA4051 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 128 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
FLAG 128 -1168 +V
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 240 -1168 -V
FLAG 576 -1056 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 240 -1056 0
FLAG 128 -1056 0
TEXT 784 -896 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\166c3f2ffea1_1.2.2.asc
* Generated by LTspice 26.0.1 for Windows.
VCC N001 0 5
Q1 N002 N004 0 0 2N2222
Rb N004 N003 1K
Rc N002 N001 1K
Vi N003 0 PULSE(0 5 0 50us 50us 0 100us)
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 400us
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 544 -128 368 -128
WIRE 368 -32 368 -48
WIRE 368 -32 336 -32
WIRE 336 128 336 -32
WIRE 544 128 544 -128
WIRE 112 176 -16 176
WIRE 272 176 192 176
WIRE -16 272 -16 176
WIRE -16 496 -16 352
WIRE 336 496 336 224
WIRE 336 496 -16 496
WIRE 544 496 544 208
WIRE 544 496 336 496
WIRE 336 528 336 496
SYMBOL res 384 -32 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName Rc
SYMATTR Value 1K
SYMBOL voltage 544 112 R0
SYMATTR InstName VCC
SYMATTR Value 5
SYMBOL npn 272 128 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL res 208 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rb
SYMATTR Value 1K
SYMBOL voltage -16 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vi
SYMATTR Value PULSE(0 5 0 50us 50us 0 100us)
FLAG 336 528 0
TEXT -50 552 Left 2 !.tran 400us
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1764A-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1764A-3.3.asy)
Rload OUT 0 500
XU1 IN IN 0 OUT OUT LT1764-3.3 ;pnba _SHDN)IN)GND)OUT)Sense
C1 OUT 0 10 Rser=.1
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT1764.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -224 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 512 48 384 48
WIRE -224 64 -224 48
WIRE 384 64 384 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -224 160 -224 144
WIRE 384 160 384 128
WIRE 512 160 512 144
WIRE 160 240 160 208
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 368 64 R0
WINDOW 39 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=.1
SYMBOL PowerProducts\\LT1764A-3.3 160 96 R0
SYMATTR InstName U1
FLAG -224 160 0
FLAG 384 160 0
FLAG 512 160 0
FLAG 160 240 0
FLAG 512 48 OUT
FLAG -224 48 IN
TEXT 368 240 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1252.asc
* Generated by LTspice 26.0.1 for Windows.
* Single Supply AC-Coupled Amplifier, Noninverting
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1252.asy)
R4 N003 0 10K
C2 N003 IN 22
R1 OUT N002 510
V3 IN 0 AC 1
C1 N001 0 220
V1 +V 0 5
XU1 N003 N002 +V 0 OUT LT1252 ;pnba In+)In-)V+)V-)OUT
R2 N002 N001 51
R3 +V N003 10K
.ac oct 10 1 200Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -48 64 -64 64
WIRE 32 64 16 64
WIRE 128 64 112 64
WIRE 144 64 128 64
WIRE 256 64 224 64
WIRE -176 96 -176 80
WIRE 32 160 32 144
WIRE -176 192 -176 176
WIRE 192 208 192 192
WIRE 128 224 128 64
WIRE 160 224 128 224
WIRE 256 240 256 64
WIRE 256 240 224 240
WIRE 272 240 256 240
WIRE -48 256 -128 256
WIRE 32 256 32 240
WIRE 32 256 16 256
WIRE 160 256 32 256
WIRE -128 272 -128 256
WIRE 32 272 32 256
WIRE 192 288 192 272
WIRE -128 368 -128 352
WIRE 32 368 32 352
SYMBOL res 240 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 510
SYMBOL res 16 256 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL voltage -176 80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 16 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL opamps\\LT1252 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -128 256 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL res 16 144 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL cap 16 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 220
SYMBOL res 128 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 51
FLAG -176 192 0
FLAG 192 192 +V
FLAG -176 80 +V
FLAG -64 64 0
FLAG -128 368 0
FLAG 32 368 0
FLAG 32 144 +V
FLAG 192 288 0
FLAG 272 240 OUT
FLAG -128 256 IN
TEXT 128 360 Left 2 !.ac oct 10 1 200Meg
TEXT 48 0 Bottom 2 ;Single Supply AC-Coupled Amplifier, Noninverting
* Z:\home\khalils\Downloads\files\data\raw_asc\775050b44bde_1227.asc
* Generated by LTspice 26.0.1 for Windows.
* 3.58MHz Oscillator
* 3.579545MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1227.asy)
C3 N001 N003 75p
CY1 N004 N003 2p Rser=45 Lser=1026u Cpar=10p
R3 +V N001 100K
D1 +V N001 1N4148
R4 OUT N005 51
Q1 +V N001 N002 0 2N3904
R1 N005 N004 1K
C1 N001 N002 100p
C2 N002 0 68p
R2 N002 0 150K
V1 +V 0 15
V2 -V 0 -15
XU1 0 N004 +V -V N005 LT1227 ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 250u startup
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -32 -48 -32 -64
WIRE -32 -48 -160 -48
WIRE 64 -48 -32 -48
WIRE -32 -32 -32 -48
WIRE 64 -16 64 -48
WIRE -160 32 -160 -48
WIRE -384 64 -384 48
WIRE -272 64 -272 48
WIRE -32 80 -32 48
WIRE -32 80 -96 80
WIRE 64 80 64 48
WIRE 64 80 -32 80
WIRE -32 96 -32 80
WIRE 64 96 64 80
WIRE -384 160 -384 144
WIRE -272 160 -272 144
WIRE -160 176 -160 128
WIRE -32 176 -32 160
WIRE -32 176 -160 176
WIRE 64 176 64 160
WIRE 128 176 64 176
WIRE 256 176 192 176
WIRE 272 176 256 176
WIRE 384 176 352 176
WIRE -160 192 -160 176
WIRE -32 192 -32 176
WIRE 320 272 320 256
WIRE -160 288 -160 272
WIRE -32 288 -32 256
WIRE 256 288 256 176
WIRE 288 288 256 288
WIRE 384 304 384 176
WIRE 384 304 352 304
WIRE 416 304 384 304
WIRE 528 304 496 304
WIRE 288 320 256 320
WIRE 320 352 320 336
SYMBOL misc\\xtal 192 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 Invisible 2
SYMATTR InstName Y1
SYMATTR Value 2p
SYMATTR SpiceLine Rser=45 Lser=1026u Cpar=10p
SYMBOL res -48 -48 R0
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL npn -96 32 M0
WINDOW 0 45 -8 Right 2
WINDOW 3 53 109 Right 2
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL diode 48 -16 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL cap 48 96 R0
SYMATTR InstName C3
SYMATTR Value 75p
SYMBOL res -176 176 R0
SYMATTR InstName R2
SYMATTR Value 150K
SYMBOL opamps\\LT1227 320 240 R0
SYMATTR InstName U1
SYMBOL cap -48 192 R0
SYMATTR InstName C2
SYMATTR Value 68p
SYMBOL cap -48 96 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL res 368 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 512 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 51
SYMBOL voltage -272 48 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -384 48 R0
SYMATTR InstName V2
SYMATTR Value -15
FLAG -272 160 0
FLAG 320 256 +V
FLAG -272 48 +V
FLAG 320 352 -V
FLAG -384 160 0
FLAG -384 48 -V
FLAG -160 288 0
FLAG -32 288 0
FLAG 256 320 0
FLAG -32 -64 +V
FLAG 528 304 OUT
TEXT -16 344 Left 2 !.tran 250u startup
TEXT 160 -64 Bottom 2 ;3.58MHz Oscillator
TEXT 168 200 Top 2 ;3.579545MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\2611e1f8693f_318A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT318A.asy)
XU1 N003 N001 +V -V N002 LT118A ;pnba In+)In-)V+)V-)OUT
V3 N003 0 SINE(0 1 1K)
R2 N001 0 1K
V1 +V 0 15
R1 N002 N001 1K
V2 -V 0 -15
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -32 96 -48 96
WIRE 64 96 48 96
WIRE 80 96 64 96
WIRE 192 96 160 96
WIRE -256 112 -256 96
WIRE -160 112 -160 96
WIRE 128 208 128 192
WIRE -256 224 -256 192
WIRE -160 224 -160 192
WIRE 64 224 64 96
WIRE 96 224 64 224
WIRE 192 240 192 96
WIRE 192 240 160 240
WIRE 96 256 -64 256
WIRE -64 272 -64 256
WIRE 128 288 128 272
WIRE -64 368 -64 352
SYMBOL opamps\\LT318A 128 240 R0
SYMATTR InstName U1
SYMBOL res 64 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -64 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL voltage -160 96 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -256 96 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 176 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG -160 224 0
FLAG 128 192 +V
FLAG -160 96 +V
FLAG 128 288 -V
FLAG -256 224 0
FLAG -256 96 -V
FLAG -48 96 0
FLAG -64 368 0
TEXT 136 344 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1071.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1071.asy)
C1 OUT 0 500 Rser=15m
V1 IN 0 5
R1 OUT N002 10.7K
R3 N003 N004 1K
XU1 N003 N002 0 N001 IN LT1071 ;pnba Vc)FB)GND)SW)Vin
Rload OUT 0 24
L1 IN N001 150 Rser=0.02 Rpar=5000
D1 N001 OUT MBRS360
R2 N002 0 1.24K
C2 N004 0 1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 20m startup
.lib LT1071.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1480
WIRE 1824 880 1584 880
WIRE 1872 880 1824 880
WIRE 1984 880 1952 880
WIRE 2048 880 1984 880
WIRE 2160 880 2112 880
WIRE 2288 880 2160 880
WIRE 2400 880 2288 880
WIRE 1584 896 1584 880
WIRE 2288 896 2288 880
WIRE 2400 896 2400 880
WIRE 1824 944 1824 880
WIRE 2160 960 2160 880
WIRE 1584 992 1584 976
WIRE 2288 992 2288 960
WIRE 2400 992 2400 976
WIRE 1984 1024 1984 880
WIRE 1984 1024 1952 1024
WIRE 2160 1088 2160 1040
WIRE 2160 1088 1952 1088
WIRE 2160 1104 2160 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2160 1200 2160 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
SYMBOL RES 2144 1088 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL POWERPRODUCTS\\LT1071 1824 1088 R0
SYMATTR InstName U1
SYMBOL res 2384 880 R0
SYMATTR InstName Rload
SYMATTR Value 24
SYMBOL schottky 2048 896 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL IND 1856 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL RES 2144 944 R0
SYMATTR InstName R1
SYMATTR Value 10.7K
SYMBOL VOLTAGE 1584 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL polcap 2272 896 R0
SYMATTR InstName C1
SYMATTR Value 500
SYMATTR SpiceLine Rser=15m
FLAG 2400 880 OUT
FLAG 2160 1200 0
FLAG 2288 992 0
FLAG 2400 992 0
FLAG 2064 1248 0
FLAG 1824 1248 0
FLAG 1584 992 0
FLAG 1584 880 IN
TEXT 2104 1312 Left 2 !.tran 20m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\b32356e49ed9_3l_2_.asc
* Generated by LTspice 26.0.1 for Windows.
VDS DS 0 50m
VGS N002 0 V
VBS N001 0 900m
M1 DS N002 0 N001 CMOSN l=0.18u w=1.8u ad=0.81p as=0.81p pd=4.5u ps=4.5u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC_180nm.txt
.dc VGS 0 1.8 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 988 680
WIRE 496 64 336 64
WIRE 496 80 496 64
WIRE 496 192 496 160
WIRE 336 240 336 64
WIRE 512 288 336 288
WIRE 288 320 176 320
WIRE 176 352 176 320
WIRE 512 448 512 288
WIRE 176 496 176 432
WIRE 336 496 336 336
WIRE 336 496 176 496
WIRE 336 560 336 496
WIRE 512 576 512 528
SYMBOL voltage 496 64 R0
SYMATTR InstName VDS
SYMATTR Value 50m
SYMBOL voltage 176 336 R0
SYMATTR InstName VGS
SYMBOL voltage 512 432 R0
SYMATTR InstName VBS
SYMATTR Value 900m
SYMBOL nmos4 288 240 R0
SYMATTR InstName M1
SYMATTR Value CMOSN
SYMATTR Value2 l=0.18u w=1.8u ad=0.81p as=0.81p pd=4.5u ps=4.5u
FLAG 336 560 0
FLAG 512 576 0
FLAG 496 192 0
FLAG 496 64 DS
TEXT 616 192 Left 2 !.include TSMC_180nm.txt
TEXT 624 256 Left 2 !.dc VGS 0 1.8 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\34c5c32c0db0_nand.asc
* Generated by LTspice 26.0.1 for Windows.
* Parametres requis: \nll=longueur \nwn=largeur_nmos \nwp=largeur_pmos
M1 vdd in1 Q N001 PMOS l={ll} w={wp} ad={450n*{wp}} as={450n*{wp}} pd={900n+{wp}} ps={1080n+{wp}}
M2 Q in1 N004 N003 NMOS l={ll} w={2*wn} ad={450n*{wn}} as={450n*{wn}} pd={900n+{wn}} ps={1080n+{wn}}
M4 N004 in2 vss N005 NMOS l={ll} w={2*wn} ad={450n*{wn}} as={450n*{wn}} pd={900n+{wn}} ps={1080n+{wn}}
M3 vdd in2 Q N002 PMOS l={ll} w={wp} ad={450n*{wp}} as={450n*{wp}} pd={900n+{wp}} ps={1080n+{wp}}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib BU_180nm.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1192 836
WIRE 608 160 448 160
WIRE 448 176 448 160
WIRE 448 240 448 176
WIRE 608 240 608 160
WIRE 448 288 448 256
WIRE 608 288 608 256
WIRE 448 384 448 336
WIRE 608 384 608 336
WIRE 608 384 448 384
WIRE 448 416 448 384
WIRE 448 464 448 416
WIRE 448 544 448 512
WIRE 448 624 448 560
WIRE 448 704 448 672
WIRE 448 752 448 720
SYMBOL pmos4 560 240 R0
SYMATTR InstName M3
SYMATTR Value2 l={ll} w={wp} ad={450n*{wp}} as={450n*{wp}} pd={900n+{wp}} ps={1080n+{wp}}
SYMBOL pmos4 400 240 R0
SYMATTR InstName M1
SYMATTR Value2 l={ll} w={wp} ad={450n*{wp}} as={450n*{wp}} pd={900n+{wp}} ps={1080n+{wp}}
SYMBOL nmos4 400 624 R0
SYMATTR InstName M4
SYMATTR Value2 l={ll} w={2*wn} ad={450n*{wn}} as={450n*{wn}} pd={900n+{wn}} ps={1080n+{wn}}
SYMBOL nmos4 400 464 R0
SYMATTR InstName M2
SYMATTR Value2 l={ll} w={2*wn} ad={450n*{wn}} as={450n*{wn}} pd={900n+{wn}} ps={1080n+{wn}}
FLAG 448 176 vdd
FLAG 448 416 Q
FLAG 400 320 in1
FLAG 560 320 in2
FLAG 400 544 in1
FLAG 400 704 in2
FLAG 448 752 vss
TEXT -264 120 Left 2 !.lib BU_180nm.lib
TEXT 936 136 Left 2 ;Parametres requis: \nll=longueur \nwn=largeur_nmos \nwp=largeur_pmos
* Z:\home\khalils\Downloads\files\data\raw_asc\897c122cd02b_320531-real_channel.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 SINE(0 5 1)
V2 Vcc 0 5
V3 0 Vee 5
R1 N003 0 2.45
R_coil Vout N003 0.5
XU1 N001 Vcc 0 N002 AD5676R Gain=2 ;pnba Vdac)Vdd)GND)Vout
XU2 N002 N003 Vcc Vee Vout TCA0372 ;pnba In+)In-)V+)V-)OUT
* TODO: Include power supply
.include TCA0372.mod
.tran 0 2 0
.options gmin=1e-11 abstol=1e-11
* Convergence Aid
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5676R.asy)
.lib AD5676R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1596 680
WIRE 112 -48 112 -96
WIRE 608 -48 608 -80
WIRE 1008 80 1008 64
WIRE 112 96 112 32
WIRE 112 96 48 96
WIRE 480 96 320 96
WIRE 976 96 848 96
WIRE 48 112 48 96
WIRE 1120 112 1040 112
WIRE 1152 112 1120 112
WIRE 976 128 928 128
WIRE 112 144 112 96
WIRE 320 144 320 96
WIRE 1120 144 1120 112
WIRE 1008 160 1008 144
WIRE 928 256 928 128
WIRE 1120 256 1120 224
WIRE 1120 256 928 256
WIRE 112 272 112 224
WIRE 320 272 320 224
WIRE 608 272 608 240
WIRE 1120 288 1120 256
WIRE 1120 400 1120 368
FLAG 48 112 0
FLAG 320 272 0
FLAG 608 272 0
FLAG 1120 400 0
FLAG 1152 112 Vout
IOPIN 1152 112 Out
FLAG 608 -80 Vcc
IOPIN 608 -80 In
FLAG 112 -96 Vcc
IOPIN 112 -96 In
FLAG 112 272 Vee
IOPIN 112 272 In
FLAG 1008 160 Vcc
IOPIN 1008 160 Out
FLAG 1008 64 Vee
IOPIN 1008 64 Out
SYMBOL voltage 320 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1)
SYMBOL voltage 112 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 112 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 1104 272 R0
SYMATTR InstName R1
SYMATTR Value 2.45
SYMBOL res 1104 128 R0
SYMATTR InstName R_coil
SYMATTR Value 0.5
SYMBOL DAC\\AD5676R 640 96 R0
SYMATTR InstName U1
SYMBOL OpAmps\\opamp2 1008 176 M180
SYMATTR InstName U2
SYMATTR Value TCA0372
TEXT -56 -184 Left 2 ;TODO: Include power supply
TEXT 872 -144 Left 2 !.include TCA0372.mod
TEXT -58 424 Left 2 !.tran 0 2 0
TEXT 872 -72 Left 2 !.options gmin=1e-11 abstol=1e-11
TEXT 872 -96 Left 2 ;Convergence Aid
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1720.asc
* Generated by LTspice 26.0.1 for Windows.
* 2.7 to 6V Crystal Oscillator with TTL/CMOS Output
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1720.asy)
R1 N002 0 620
R5 N001 0 1.8K
C1 P001 N002 1.6p Rser=45 Lser=15.6m Cpar=6p
R4 OUT P001 220
XU1 N002 N001 +V 0 OUT LT1720 ;pnba In+)In-)V+)V-)OUT
C2 N001 0 .1
R3 OUT N001 2K
R2 +V N002 2K
V1 +V 0 3.3
.tran 250u startup
.lib LT1720.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1236 800
WIRE 144 64 128 64
WIRE 240 64 208 64
WIRE 144 160 128 160
WIRE 240 160 240 64
WIRE 240 160 224 160
WIRE 320 160 240 160
WIRE 416 160 400 160
WIRE 48 256 48 240
WIRE 304 256 304 224
WIRE 240 272 240 160
WIRE 272 272 240 272
WIRE 416 288 416 160
WIRE 416 288 336 288
WIRE 448 288 416 288
WIRE 272 304 240 304
WIRE 160 320 160 304
WIRE 304 336 304 320
WIRE 48 352 48 336
WIRE 160 416 160 400
WIRE 240 416 240 304
WIRE 240 416 160 416
WIRE 256 416 240 416
WIRE 416 416 416 288
WIRE 416 416 400 416
WIRE 160 432 160 416
WIRE 160 528 160 512
SYMBOL voltage 48 240 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap 208 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL misc\\xtal 320 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1.6p
SYMATTR SpiceLine Rser=45 Lser=15.6m Cpar=6p
SYMBOL res 144 416 R0
SYMATTR InstName R1
SYMATTR Value 620
SYMBOL Comparators\\LT1720 304 224 R0
SYMATTR InstName U1
SYMBOL res 416 400 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 220
SYMBOL res 144 304 R0
SYMATTR InstName R2
SYMATTR Value 2K
SYMBOL res 416 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2K
SYMBOL res 240 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1.8K
FLAG 48 352 0
FLAG 48 240 +V
FLAG 304 224 +V
FLAG 160 304 +V
FLAG 160 528 0
FLAG 128 64 0
FLAG 304 336 0
FLAG 128 160 0
FLAG 448 288 OUT
TEXT 336 488 Left 2 !.tran 250u startup
TEXT 392 16 Bottom 2 ;2.7 to 6V Crystal Oscillator with TTL/CMOS Output