* Z:\home\khalils\Downloads\files\data\raw_asc\a2f4cd052d10_fa2.asc
* Generated by LTspice 26.0.1 for Windows.
XX1 N001 XOR $G_VDD $G_VDD pmos_t1 ;pnba D)G)S)B
XX2 S _Cin N001 $G_VDD pmos_t1 ;pnba D)G)S)B
XX4 _Cin N002 S $G_VDD pmos_t1 ;pnba D)G)S)B
XX3 _Cin XOR S 0 nmos_t1 ;pnba D)G)S)B
XX5 S _Cin XOR 0 nmos_t1 ;pnba D)G)S)B
XX6 N002 XOR $G_VDD $G_VDD pmos_t1 ;pnba D)G)S)B
XX7 N002 XOR 0 0 nmos_t1 ;pnba D)G)S)B
XX17 _Cin _XOR _Cout $G_VDD pmos_t1 ;pnba D)G)S)B
XX18 _Cin XOR _Cout 0 nmos_t1 ;pnba D)G)S)B
XX19 N004 A $G_VDD $G_VDD pmos_t1 ;pnba D)G)S)B
XX20 _Cout B N004 $G_VDD pmos_t1 ;pnba D)G)S)B
XX21 _Cout B N006 0 nmos_t1 ;pnba D)G)S)B
XX22 N006 A 0 0 nmos_t1 ;pnba D)G)S)B
XX15 XOR _XOR $G_VDD $G_VDD pmos_t1 ;pnba D)G)S)B
XX16 XOR _XOR 0 0 nmos_t1 ;pnba D)G)S)B
XX11 N005 B $G_VDD $G_VDD pmos_t1 ;pnba D)G)S)B
XX12 N005 B 0 0 nmos_t1 ;pnba D)G)S)B
XX10 _XOR A B 0 nmos_t1 ;pnba D)G)S)B
XX8 A B _XOR 0 nmos_t1 ;pnba D)G)S)B
XX9 A N005 _XOR $G_VDD pmos_t1 ;pnba D)G)S)B
XX14 _XOR A N003 $G_VDD pmos_t1 ;pnba D)G)S)B
XX13 N003 B $G_VDD $G_VDD pmos_t1 ;pnba D)G)S)B
.lib '../../lib/cfg.lib'
* _XOR
* Full adder with complemented carries\nfrom "The VLSI Handbook. Chen. 2007", p.41-5, Figure 41.5\n \n-22 transistors\n-pass transistor logic
.backanno
.end

* LTspice schematic (.asc):
Version 4
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FLAG -1600 -560 $G_VDD
FLAG -1440 -128 S
IOPIN -1440 -128 Out
FLAG -1824 96 $G_VDD
FLAG -1824 512 0
FLAG -3136 848 _Cin
IOPIN -3136 848 In
FLAG -1312 1024 $G_VDD
FLAG -1312 1664 0
FLAG -1488 1104 A
IOPIN -1488 1104 In
FLAG -1488 1232 B
IOPIN -1488 1232 In
FLAG -976 848 _Cout
IOPIN -976 848 Out
FLAG -1776 1248 $G_VDD
FLAG -1776 1664 0
FLAG -2656 1600 $G_VDD
FLAG -2656 2032 0
FLAG -3328 1792 B
IOPIN -3328 1792 In
FLAG -3328 1648 A
IOPIN -3328 1648 In
FLAG -2400 1008 $G_VDD
FLAG -1536 992 XOR
IOPIN -1536 992 BiDir
FLAG -1536 704 _XOR
IOPIN -1536 704 BiDir
FLAG -3008 1008 $G_VDD
FLAG -1840 880 0
FLAG -1808 816 $G_VDD
FLAG -1888 -560 $G_VDD
FLAG -1920 16 0
FLAG -2336 1456 _XOR
IOPIN -2336 1456 Out
FLAG -2144 1456 _XOR
IOPIN -2144 1456 In
SYMBOL pmos4 -1648 -400 M180
WINDOW 0 51 80 Left 2
WINDOW 3 52 23 Invisible 2
SYMATTR InstName X1
SYMATTR Value pmos_t1
SYMATTR Prefix X
SYMBOL pmos4 -1648 -272 M180
WINDOW 0 51 80 Left 2
WINDOW 3 52 23 Invisible 2
SYMATTR InstName X2
SYMATTR Value pmos_t1
SYMATTR Prefix X
SYMBOL pmos4 -1808 -304 M0
WINDOW 0 51 80 Left 2
WINDOW 3 52 23 Invisible 2
SYMATTR InstName X4
SYMATTR Value pmos_t1
SYMATTR Prefix X
SYMBOL nmos4 -2000 -304 R0
WINDOW 0 53 82 Left 2
WINDOW 3 53 23 Invisible 2
SYMATTR InstName X3
SYMATTR Value nmos_t1
SYMATTR Prefix X
SYMBOL nmos4 -2048 -64 R0
WINDOW 0 53 82 Left 2
WINDOW 3 53 23 Invisible 2
SYMATTR InstName X5
SYMATTR Value nmos_t1
SYMATTR Prefix X
SYMBOL pmos4 -1872 256 M180
WINDOW 0 51 80 Left 2
WINDOW 3 52 23 Invisible 2
SYMATTR InstName X6
SYMATTR Value pmos_t1
SYMATTR Prefix X
SYMBOL nmos4 -1872 352 R0
WINDOW 0 53 82 Left 2
WINDOW 3 53 23 Invisible 2
SYMATTR InstName X7
SYMATTR Value nmos_t1
SYMATTR Prefix X
SYMBOL pmos4 -1728 752 M90
WINDOW 0 72 102 VLeft 2
WINDOW 3 52 23 Invisible 2
SYMATTR InstName X17
SYMATTR Value pmos_t1
SYMATTR Prefix X
SYMBOL nmos4 -1728 944 R270
WINDOW 0 75 61 VRight 2
WINDOW 3 53 23 Invisible 2
SYMATTR InstName X18
SYMATTR Value nmos_t1
SYMATTR Prefix X
SYMBOL pmos4 -1360 1184 M180
WINDOW 0 51 80 Left 2
WINDOW 3 52 23 Invisible 2
SYMATTR InstName X19
SYMATTR Value pmos_t1
SYMATTR Prefix X
SYMBOL pmos4 -1360 1312 M180
WINDOW 0 51 80 Left 2
WINDOW 3 52 23 Invisible 2
SYMATTR InstName X20
SYMATTR Value pmos_t1
SYMATTR Prefix X
SYMBOL nmos4 -1360 1376 R0
WINDOW 0 53 82 Left 2
WINDOW 3 53 23 Invisible 2
SYMATTR InstName X21
SYMATTR Value nmos_t1
SYMATTR Prefix X
SYMBOL nmos4 -1360 1504 R0
WINDOW 0 53 82 Left 2
WINDOW 3 53 23 Invisible 2
SYMATTR InstName X22
SYMATTR Value nmos_t1
SYMATTR Prefix X
SYMBOL pmos4 -1824 1408 M180
WINDOW 0 51 80 Left 2
WINDOW 3 52 23 Invisible 2
SYMATTR InstName X15
SYMATTR Value pmos_t1
SYMATTR Prefix X
SYMBOL nmos4 -1824 1504 R0
WINDOW 0 53 82 Left 2
WINDOW 3 53 23 Invisible 2
SYMATTR InstName X16
SYMATTR Value nmos_t1
SYMATTR Prefix X
SYMBOL pmos4 -2704 1744 M180
WINDOW 0 51 80 Left 2
WINDOW 3 52 23 Invisible 2
SYMATTR InstName X11
SYMATTR Value pmos_t1
SYMATTR Prefix X
SYMBOL nmos4 -2704 1840 R0
WINDOW 0 53 82 Left 2
WINDOW 3 53 23 Invisible 2
SYMATTR InstName X12
SYMATTR Value nmos_t1
SYMATTR Prefix X
SYMBOL nmos4 -3136 1568 R0
WINDOW 0 53 82 Left 2
WINDOW 3 53 23 Invisible 2
SYMATTR InstName X10
SYMATTR Value nmos_t1
SYMATTR Prefix X
SYMBOL nmos4 -3136 1280 R0
WINDOW 0 53 82 Left 2
WINDOW 3 53 23 Invisible 2
SYMATTR InstName X8
SYMATTR Value nmos_t1
SYMATTR Prefix X
SYMBOL pmos4 -2912 1280 M0
WINDOW 0 51 80 Left 2
WINDOW 3 52 23 Invisible 2
SYMATTR InstName X9
SYMATTR Value pmos_t1
SYMATTR Prefix X
SYMBOL pmos4 -2448 1312 M180
WINDOW 0 51 80 Left 2
WINDOW 3 52 23 Invisible 2
SYMATTR InstName X14
SYMATTR Value pmos_t1
SYMATTR Prefix X
SYMBOL pmos4 -2448 1152 M180
WINDOW 0 51 80 Left 2
WINDOW 3 52 23 Invisible 2
SYMATTR InstName X13
SYMATTR Value pmos_t1
SYMATTR Prefix X
TEXT -3296 2272 Left 2 !.lib '../../lib/cfg.lib'
TEXT -3280 928 Left 4 ;_XOR
TEXT -3296 2352 Left 4 ;Full adder with complemented carries\nfrom "The VLSI Handbook. Chen. 2007", p.41-5, Figure 41.5\n \n-22 transistors\n-pass transistor logic
RECTANGLE Normal -2240 2176 -3296 880 1