Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0c8c9fe3f4ad_08H-06.asc
* Generated by LTspice 26.0.1 for Windows.
Q2 N001 Vin- N003 0 2N3904
R6 V+ N001 100k
Q4 N004 N004 0 0 2N3904
R1 V+ N004 10k
V1 V+ 0 5
R2 V+ Vin+ 100k
V2 Vin+ 0 SINE(2.5 3 5k)
Q5 Vout P001 0 0 2N3904
V3 Vin- 0 2.5
Q6 N002 N001 V+ 0 2N3906
R8 P001 N002 1k
R5 V+ Vin- 100k
R4 Vin- 0 100k
R3 Vin+ 0 100k
Q1 V+ Vin+ N003 0 2N3904
Q3 N003 N004 0 0 2N3904
R7 N002 0 10k
R9 Vout V+ 10k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 1 .999 0.001
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1384 680
WIRE 640 -176 640 -192
WIRE 992 -128 992 -192
WIRE 1216 -128 1216 -192
WIRE 640 -80 640 -96
WIRE 928 -80 640 -80
WIRE 1312 -48 1216 -48
WIRE 1216 -32 1216 -48
WIRE 992 16 992 -32
WIRE 1072 16 992 16
WIRE 288 32 288 -192
WIRE 640 32 640 -80
WIRE 992 48 992 16
WIRE 112 80 64 80
WIRE 128 80 128 64
WIRE 128 80 112 80
WIRE 224 80 128 80
WIRE 736 80 704 80
WIRE 752 80 752 64
WIRE 752 80 736 80
WIRE 816 80 752 80
WIRE 112 96 112 80
WIRE 736 96 736 80
WIRE 1216 128 1216 64
WIRE 288 160 288 128
WIRE 448 160 288 160
WIRE 640 160 640 128
WIRE 640 160 448 160
WIRE 384 336 320 336
WIRE 320 352 320 336
WIRE 448 352 448 160
WIRE 384 400 384 336
WIRE 320 480 320 448
WIRE 448 480 448 448
SYMBOL pnp 928 -32 M180
SYMATTR InstName Q6
SYMATTR Value 2N3906
SYMBOL res 96 80 R0
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 976 32 R0
SYMATTR InstName R7
SYMATTR Value 10k
SYMBOL res 720 80 R0
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL npn 224 32 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL npn 384 352 M0
SYMATTR InstName Q4
SYMATTR Value 2N3904
SYMBOL voltage 144 -400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 1168 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R8
SYMATTR Value 1k
SYMBOL voltage 432 -400 R0
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(2.5 3 5k)
SYMBOL npn 1152 -32 R0
SYMATTR InstName Q5
SYMATTR Value 2N3904
SYMBOL res 1232 -32 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R9
SYMATTR Value 10k
SYMBOL voltage 304 -400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 2.5
SYMBOL res 624 -192 R0
SYMATTR InstName R6
SYMATTR Value 100k
SYMBOL npn 704 32 M0
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL res 112 -32 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL npn 384 352 R0
SYMATTR InstName Q3
SYMATTR Value 2N3904
SYMBOL res 736 -32 R0
SYMATTR InstName R5
SYMATTR Value 100k
SYMBOL res 304 240 R0
SYMATTR InstName R1
SYMATTR Value 10k
FLAG 144 -304 0
FLAG 432 -304 0
FLAG 432 -384 Vin+
FLAG 144 -384 V+
FLAG 320 256 V+
FLAG 992 128 0
FLAG 736 176 0
FLAG 112 176 0
FLAG 320 480 0
FLAG 448 480 0
FLAG 128 -16 V+
FLAG 288 -192 V+
FLAG 640 -192 V+
FLAG 992 -192 V+
FLAG 1216 -192 V+
FLAG 752 -16 V+
FLAG 1216 128 0
FLAG 64 80 Vin+
FLAG 816 80 Vin-
FLAG 304 -304 0
FLAG 304 -384 Vin-
FLAG 1312 -48 Vout
TEXT 456 -272 Left 2 !.tran 0 1 .999 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\750e2a5e40e5_diodo.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N003 0 1.59e-6
C2 N003 0 63e-9
D1 N002 N003 MMSD4148
C1 N002 N004 1e-6
V2 N001 0 SINE(0 2 4e6)
C3 N002 N001 1e-6
V1 N004 0 SINE(0 50e-3 3.5e6)
R2 N003 0 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 410e-6 400e-6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 -32 -160 -32
WIRE 128 -32 -48 -32
WIRE -160 0 -160 -32
WIRE 448 48 336 48
WIRE 544 48 448 48
WIRE -160 96 -160 80
WIRE -112 144 -160 144
WIRE 128 144 128 -32
WIRE 128 144 -48 144
WIRE 208 144 128 144
WIRE 336 144 336 48
WIRE 336 144 272 144
WIRE 448 144 448 48
WIRE 544 160 544 48
WIRE -160 176 -160 144
WIRE 336 176 336 144
WIRE -160 272 -160 256
WIRE 336 272 336 256
WIRE 448 320 448 224
WIRE 544 320 544 224
SYMBOL ind 432 128 R0
SYMATTR InstName L1
SYMATTR Value 1.59e-6
SYMBOL res 320 160 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL diode 208 160 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MMSD4148
SYMBOL cap -48 -48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1e-6
SYMBOL voltage -160 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 2 4e6)
SYMBOL voltage -160 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50e-3 3.5e6)
SYMBOL cap -48 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1e-6
SYMBOL cap 528 160 R0
SYMATTR InstName C2
SYMATTR Value 63e-9
FLAG -160 96 0
FLAG -160 272 0
FLAG 336 272 0
FLAG 448 320 0
FLAG 544 320 0
TEXT -192 296 Left 2 !.tran 0 410e-6 400e-6
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3441.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3441.asy)
XU1 N004 0 0 N001 N002 MP_01 0 OUT IN IN N005 N003 LTC3441 ;pnba _SHDN)GND)PGND)SW1)SW2))MODE)Vout)PVin)Vin)Vc)FB
Rload OUT 0 10
C2 OUT 0 22 Rser=10m
C4 N003 OUT 150p
R2 N003 0 200K
R4 IN N004 500K
R3 N006 N005 5K
L1 N001 N002 4.7
V1 IN 0 3
C3 N004 0 .001
C1 N003 N006 250p
R1 OUT N003 340K
.tran 1m startup
.lib LTC3441.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2728 2324
WIRE 1824 1232 1664 1232
WIRE 2048 1232 1904 1232
WIRE 1664 1328 1664 1232
WIRE 1696 1328 1664 1328
WIRE 2048 1328 2048 1232
WIRE 2048 1328 2016 1328
WIRE 1568 1408 1456 1408
WIRE 1664 1408 1568 1408
WIRE 1696 1408 1664 1408
WIRE 2208 1408 2016 1408
WIRE 2304 1408 2208 1408
WIRE 2416 1408 2304 1408
WIRE 2528 1408 2416 1408
WIRE 1456 1424 1456 1408
WIRE 2208 1424 2208 1408
WIRE 2416 1424 2416 1408
WIRE 2528 1424 2528 1408
WIRE 2304 1440 2304 1408
WIRE 1568 1456 1568 1408
WIRE 1664 1488 1664 1408
WIRE 1696 1488 1664 1488
WIRE 2208 1488 2016 1488
WIRE 1456 1520 1456 1504
WIRE 2416 1520 2416 1488
WIRE 2528 1520 2528 1504
WIRE 1568 1568 1568 1536
WIRE 1696 1568 1568 1568
WIRE 2032 1568 2016 1568
WIRE 2128 1568 2112 1568
WIRE 2208 1568 2208 1488
WIRE 2208 1568 2192 1568
WIRE 2304 1568 2304 1520
WIRE 2304 1568 2208 1568
WIRE 1568 1584 1568 1568
WIRE 2304 1584 2304 1568
WIRE 1696 1648 1680 1648
WIRE 2048 1648 2016 1648
WIRE 1568 1680 1568 1648
WIRE 2304 1680 2304 1664
WIRE 1856 1744 1856 1712
SYMBOL ind 1808 1248 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL cap 1552 1584 R0
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL cap 2192 1488 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C4
SYMATTR Value 150p
SYMBOL cap 2192 1552 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 250p
SYMBOL res 2288 1568 R0
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL res 2128 1552 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5K
SYMBOL res 2288 1424 R0
SYMATTR InstName R1
SYMATTR Value 340K
SYMBOL res 2512 1408 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL res 1552 1440 R0
SYMATTR InstName R4
SYMATTR Value 500K
SYMBOL VOLTAGE 1456 1408 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL cap 2400 1424 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMATTR SpiceLine Rser=10m
SYMBOL PowerProducts\\LTC3441 1856 1520 R0
SYMATTR InstName U1
FLAG 2048 1648 0
FLAG 1456 1520 0
FLAG 2304 1680 0
FLAG 2416 1520 0
FLAG 2528 1520 0
FLAG 1568 1680 0
FLAG 2528 1408 OUT
FLAG 1680 1648 0
FLAG 1856 1744 0
FLAG 1456 1408 IN
TEXT 2392 1720 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\25a8f467a146_adaq23875.asc
* Generated by LTspice 26.0.1 for Windows.
* Simulation Settings:
* Power Supplies:
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\ADAQ23875.asy)
;.tran 10u
;.ac dec 100 100 10G
V3 VS_N 0 -2
XU1 N001 N002 PDB PDB VS_N NC_01 NC_02 NC_03 VDD Vout N003 0 ADAQ23875 ;pnba IN-)IN+)VS+)PDB_AMP)VS-)REF_IN)VCMO)REFBUF)VDD)Vout)CNV)ADC_GND
V5 VDD 0 5
V2 N003 0 PULSE(0 1.8 66.6n .2n .2n 5n 66.6n)
V1 PDB 0 6.5
V4 N002 N001 SINE(0 1.8189 100k) AC 1
.noise V(Vout) V1 dec 500 100 10G
.lib ADAQ23875.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1496 700
WIRE -144 -480 -144 -560
WIRE 432 -480 432 -560
WIRE -640 -288 -816 -288
WIRE 656 -240 544 -240
WIRE 704 -240 656 -240
WIRE -816 -208 -816 -288
WIRE -640 -192 -640 -288
WIRE -560 -192 -640 -192
WIRE -1696 -112 -1696 -160
WIRE -1552 -112 -1552 -160
WIRE -1504 -112 -1504 -160
WIRE -1504 -112 -1552 -112
WIRE -1408 -112 -1408 -160
WIRE -560 -112 -640 -112
WIRE -1696 -80 -1696 -112
WIRE -1552 -80 -1552 -112
WIRE -1408 -80 -1408 -112
WIRE 704 -64 544 -64
WIRE -816 -16 -816 -128
WIRE -640 -16 -640 -112
WIRE -640 -16 -816 -16
WIRE 704 -16 704 -64
WIRE -1696 32 -1696 0
WIRE -1552 32 -1552 0
WIRE -1552 32 -1696 32
WIRE -1408 32 -1408 0
WIRE -1408 32 -1552 32
WIRE -1696 64 -1696 32
WIRE 704 144 704 64
WIRE -192 256 -192 176
WIRE -144 256 -144 176
WIRE 128 272 128 176
RECTANGLE Normal -1200 112 -1808 -400 2
SYMBOL voltage -816 -112 R180
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V4
SYMATTR Value SINE(0 1.8189 100k)
SYMBOL voltage -1696 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -2
SYMBOL ADAQ23875 -192 -176 R0
SYMATTR InstName U1
SYMBOL voltage -1408 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 5
SYMBOL voltage 704 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1.8 66.6n .2n .2n 5n 66.6n)
SYMBOL voltage -1552 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 6.5
FLAG 704 144 0
FLAG -1696 64 0
FLAG -1696 -112 VS_N
FLAG -1408 -112 VDD
FLAG 656 -240 Vout
FLAG 432 -560 VDD
FLAG -144 -560 VS_P
FLAG -144 256 VS_N
FLAG 128 272 0
FLAG -192 256 PDB
FLAG -1504 -160 PDB
FLAG -1552 -160 VS_P
TEXT -1776 -376 Left 2 ;Simulation Settings:
TEXT -1760 -336 Left 2 !.noise V(Vout) V1 dec 500 100 10G
TEXT -1760 -272 Left 2 !;.tran 10u
TEXT -1760 -304 Left 2 !;.ac dec 100 100 10G
TEXT -1776 -216 Left 2 ;Power Supplies:
* Z:\home\khalils\Downloads\files\data\raw_asc\2d01a3a9cf4a_ChebyshevII_2nd.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N004 0 AC
XU1 N005 N003 Vcc -Vcc N002 TL072 ;pnba In+)In-)V+)V-)OUT
V1 Vcc 0 12
R5 0 N002 10k
V2 0 -Vcc 12
C2 N005 0 11n
R1 N005 N001 4.7k
R3 N003 N002 2.2k
R4 0 N003 220k
R2 N001 N004 4.7k
C1 N001 N002 11n
.ac oct 100 1 150k
.lib ..\..\01_models\TL072.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 -32 -144 -32
WIRE 320 -32 -48 -32
WIRE 688 0 688 -16
WIRE 224 16 48 16
WIRE 688 96 688 80
WIRE 768 96 688 96
WIRE 768 112 768 96
WIRE 688 128 688 96
WIRE 48 144 48 16
WIRE 96 144 48 144
WIRE 320 160 320 -32
WIRE 320 160 160 160
WIRE 528 160 320 160
WIRE -256 176 -320 176
WIRE -144 176 -144 -32
WIRE -144 176 -176 176
WIRE -112 176 -144 176
WIRE 16 176 -32 176
WIRE 96 176 16 176
WIRE 320 192 320 160
WIRE -320 240 -320 176
WIRE 688 240 688 208
WIRE 528 256 528 160
WIRE 16 272 16 176
WIRE 224 320 224 16
WIRE 320 320 320 272
WIRE 320 320 224 320
WIRE 320 352 320 320
WIRE -320 464 -320 320
WIRE 16 464 16 336
WIRE 16 464 -320 464
WIRE 320 464 320 432
WIRE 320 464 16 464
WIRE 528 464 528 336
WIRE 528 464 320 464
WIRE 16 496 16 464
SYMBOL res 336 288 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 2.2k
SYMBOL cap 0 272 R0
SYMATTR InstName C2
SYMATTR Value 11n
SYMBOL res 336 448 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 220k
SYMBOL voltage 688 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL Opamps\\opamp2 128 96 R0
SYMATTR InstName U1
SYMATTR Value TL072
SYMBOL voltage -320 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value AC
SYMBOL res -160 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.7k
SYMBOL voltage 688 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL res -16 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL cap -112 -16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 11n
SYMBOL res 544 352 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 10k
FLAG 16 496 0
FLAG 768 112 0
FLAG 688 -16 Vcc
FLAG 688 240 -Vcc
FLAG 128 128 Vcc
FLAG 128 192 -Vcc
TEXT -352 520 Left 2 !.ac oct 100 1 150k
TEXT -472 -32 Left 2 !.lib ..\\..\\01_models\\TL072.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\TransmissionLineInverter.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax. The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors. A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements. One for the normal(differential) mode and\nthe other for the common mode. Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world. These modes\nwith have different propagation speeds and impedances. If both modes\nare modeled, then you can simulate a transmission line inverter.
T2 0 0 OUT 0 Td=30n Z0=150
T1 IN 0 0 OUT Td=50n Z0=50
V1 IN 0 PULSE(0 1 0 1n 1n 10n) Rser=50
.tran 0 500n 0 1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 680
WIRE 128 192 -368 192
WIRE 320 192 224 192
WIRE -368 208 -368 192
WIRE 128 224 64 224
WIRE 288 224 224 224
WIRE 64 272 64 224
WIRE 64 272 16 272
WIRE 288 272 288 224
WIRE 336 272 288 272
WIRE -368 304 -368 288
WIRE 64 304 64 272
WIRE 128 304 64 304
WIRE 288 304 288 272
WIRE 288 304 224 304
WIRE 128 336 64 336
WIRE 288 336 224 336
WIRE 64 368 64 336
WIRE 288 368 288 336
SYMBOL tline 176 320 R0
WINDOW 0 -1 -21 Bottom 2
WINDOW 3 0 21 Top 2
SYMATTR InstName T2
SYMATTR Value Td=30n Z0=150
SYMBOL voltage -368 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 56 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1n 1n 10n)
SYMBOL tline 176 208 R0
WINDOW 0 2 -19 Bottom 2
WINDOW 3 3 20 Top 2
SYMATTR InstName T1
FLAG 64 368 0
FLAG 288 368 0
FLAG -368 304 0
FLAG 16 272 0
FLAG 320 192 0
FLAG -368 192 IN
FLAG 336 272 OUT
TEXT 376 368 Left 2 !.tran 0 500n 0 1n
TEXT 0 408 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT -376 -200 Left 2 ;This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax.  The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors.  A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements.  One for the normal(differential) mode and\nthe other for the common mode.  Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world.  These modes\nwith have different propagation speeds and impedances.  If both modes\nare modeled, then you can simulate a transmission line inverter.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1174HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1174HV.asy)
C2 OUT 0 100 Rser=0.02
R2 N004 0 31.5K
XU1 N004 N003 N002 0 N001 IN IN IN LTC1174 top=1K bot=1T ;pnba FB)LBout)LBin)GND)SW)Vin)Ipgm)_SHDN
V1 IN 0 9
D1 0 N001 MBRS140
R1 OUT N004 93.5K
Rload OUT 0 20
L1 N001 OUT 100 Rser=0.02 Rpar=5000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
.lib LTC1174.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1584 1140
WIRE 464 480 352 480
WIRE 624 480 464 480
WIRE 352 496 352 480
WIRE 624 512 624 480
WIRE 464 560 464 480
WIRE 496 560 464 560
WIRE 816 560 752 560
WIRE 864 560 816 560
WIRE 976 560 944 560
WIRE 1088 560 976 560
WIRE 1184 560 1088 560
WIRE 816 576 816 560
WIRE 976 576 976 560
WIRE 1088 576 1088 560
WIRE 1184 576 1184 560
WIRE 352 592 352 576
WIRE 496 624 480 624
WIRE 768 624 752 624
WIRE 816 656 816 640
WIRE 1088 672 1088 640
WIRE 1184 672 1184 656
WIRE 464 688 464 560
WIRE 496 688 464 688
WIRE 976 688 976 656
WIRE 976 688 752 688
WIRE 976 704 976 688
WIRE 624 752 624 736
WIRE 976 800 976 784
SYMBOL RES 960 688 R0
SYMATTR InstName R2
SYMATTR Value 31.5K
SYMBOL RES 1168 560 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL POLCAP 1072 576 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL RES 960 560 R0
SYMATTR InstName R1
SYMATTR Value 93.5K
SYMBOL IND 848 576 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL VOLTAGE 352 480 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL PowerProducts\\LTC1174HV 624 624 R0
SYMATTR InstName U1
SYMBOL SCHOTTKY 800 640 M180
WINDOW 0 33 63 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS140
FLAG 1184 560 OUT
FLAG 1088 672 0
FLAG 1184 672 0
FLAG 816 656 0
FLAG 624 752 0
FLAG 976 800 0
FLAG 352 592 0
FLAG 352 480 IN
TEXT 704 776 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2908-A1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2908-A1.asy)
V2 N002 0 PWL(0 0 1m 12)
V7 N001 0 PWL(0 0 1m 1)
XU1 0 _RST V4 V2 V1 N003 V3 N004 LTC2908-A1 ;pnba GND)_RST)V4)V2)V1)Vadj1)V3)Vadj2
R4 N001 N004 86.6K
V4 V2 0 PWL(0 0 1m 3.3)
V3 N005 0 5
V1 V1 0 PWL(0 0 1m 5)
R1 N005 _RST 100K
R3 N003 0 100K
R5 N004 0 100K
V5 V3 0 PWL(0 0 1m 2.5)
R2 N002 N003 2.15Meg
V6 V4 0 PWL(0 0 1m 1.8)
.tran 300m
.lib LTC2908-A1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 940 680
WIRE 544 -16 -576 -16
WIRE -576 0 -576 -16
WIRE 336 48 -304 48
WIRE -304 64 -304 48
WIRE 336 80 336 48
WIRE -576 96 -576 80
WIRE 544 128 544 -16
WIRE -304 160 -304 144
WIRE -32 192 -752 192
WIRE 0 192 -32 192
WIRE 336 192 336 160
WIRE 336 192 288 192
WIRE 384 192 336 192
WIRE 480 192 464 192
WIRE -752 208 -752 192
WIRE -32 240 -512 240
WIRE 0 240 -32 240
WIRE 544 240 544 208
WIRE 544 240 288 240
WIRE 592 240 544 240
WIRE 688 240 672 240
WIRE -512 256 -512 240
WIRE -32 288 -256 288
WIRE 0 288 -32 288
WIRE -752 304 -752 288
WIRE -256 304 -256 288
WIRE -16 336 -32 336
WIRE 0 336 -16 336
WIRE 320 336 288 336
WIRE 352 336 320 336
WIRE 512 336 432 336
WIRE -512 352 -512 336
WIRE 512 352 512 336
WIRE -16 384 -16 336
WIRE 144 384 144 368
WIRE -256 400 -256 384
WIRE 512 448 512 432
WIRE -16 480 -16 464
SYMBOL voltage -304 48 R0
WINDOW 3 27 89 Left 2
SYMATTR Value PWL(0 0 1m 12)
SYMATTR InstName V2
SYMBOL res 528 112 R0
SYMATTR InstName R4
SYMATTR Value 86.6K
SYMBOL voltage -256 288 R0
WINDOW 0 28 31 Left 2
SYMATTR InstName V5
SYMATTR Value PWL(0 0 1m 2.5)
SYMBOL voltage -576 -16 R0
WINDOW 3 27 89 Left 2
SYMATTR Value PWL(0 0 1m 1)
SYMATTR InstName V7
SYMBOL res 576 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 100K
SYMBOL voltage -512 240 R0
WINDOW 0 23 24 Left 2
SYMATTR InstName V4
SYMATTR Value PWL(0 0 1m 3.3)
SYMBOL res 320 64 R0
SYMATTR InstName R2
SYMATTR Value 2.15Meg
SYMBOL voltage -16 368 R0
WINDOW 0 28 31 Left 2
WINDOW 3 24 99 Left 2
SYMATTR InstName V6
SYMATTR Value PWL(0 0 1m 1.8)
SYMBOL res 368 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL voltage -752 192 R0
WINDOW 0 23 24 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1m 5)
SYMBOL res 448 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL LTC2908-A1 144 256 R0
SYMATTR InstName U1
SYMBOL voltage 512 336 R0
SYMATTR InstName V3
SYMATTR Value 5
FLAG 144 384 0
FLAG -752 304 0
FLAG -304 160 0
FLAG 512 448 0
FLAG 480 192 0
FLAG -512 352 0
FLAG -256 400 0
FLAG -16 480 0
FLAG 688 240 0
FLAG -576 96 0
FLAG -32 192 V1
FLAG -32 240 V2
FLAG -32 288 V3
FLAG -32 336 V4
FLAG 320 336 _RST
TEXT 320 496 Left 2 !.tran 300m
* Z:\home\khalils\Downloads\files\data\raw_asc\1f0ba00062a6_Tflipflop.asc
* Generated by LTspice 26.0.1 for Windows.
A1 N001 0 clk 0 clr _Q Q 0 DFLOP
A2 T Q 0 0 0 0 N001 0 XOR td=2n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1396 984
WIRE 592 224 496 224
WIRE 688 224 656 224
WIRE 672 240 656 240
WIRE 672 256 672 240
WIRE 672 256 656 256
WIRE 672 272 672 256
WIRE 672 272 656 272
WIRE 624 288 624 272
WIRE 640 288 624 288
WIRE 672 288 672 272
WIRE 672 288 640 288
WIRE 496 368 496 224
WIRE 512 368 496 368
WIRE 688 368 688 224
WIRE 688 368 672 368
WIRE 704 368 688 368
WIRE 704 416 688 416
FLAG 704 368 Q
IOPIN 704 368 Out
FLAG 704 416 _Q
IOPIN 704 416 Out
FLAG 592 464 clr
IOPIN 592 464 In
FLAG 656 208 T
IOPIN 656 208 In
FLAG 512 416 clk
IOPIN 512 416 In
FLAG 592 320 0
FLAG 640 288 0
FLAG 576 256 0
FLAG 512 464 0
SYMBOL Digital\\dflop 592 320 R0
SYMATTR InstName A1
SYMBOL Digital\\xor 608 176 M0
WINDOW 3 1 109 Left 2
SYMATTR Value td=2n
SYMATTR InstName A2
* Z:\home\khalils\Downloads\files\data\raw_asc\0c3e845da91d_circuitoRLC.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac list 0.318309886
L1 N003 N002 6
R2 N003 N005 3
L4 N006 N008 4
C2 N008 0 0.5
R3 N004 N003 2
L2 N005 N007 2
V1 N001 0 SINE(0 9 0.318309886 0 0 120)
C1 N007 N009 0.3333
R4 A N006 7
L3 A N004 5
V2 N009 0 SINE(0 4 0.318309886 0 0 45)
R1 N002 N001 3
.tran 0 40 20 5m
.meas TRAN Pinst param V(a)*I(R4)
.meas TRAN Pprom AVG V(a)*I(R4) FROM 20 TO 30
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1592 1044
WIRE 80 96 -32 96
WIRE 224 96 160 96
WIRE 368 96 304 96
WIRE 448 96 368 96
WIRE 576 96 528 96
WIRE 720 96 656 96
WIRE 368 144 368 96
WIRE 720 144 720 96
WIRE 368 256 368 224
WIRE -32 288 -32 96
WIRE 720 304 720 224
WIRE 368 368 368 336
WIRE 720 416 720 384
WIRE 368 480 368 432
WIRE -32 608 -32 368
WIRE 368 608 368 560
WIRE 368 608 -32 608
WIRE 720 608 720 480
WIRE 720 608 368 608
WIRE 368 656 368 608
SYMBOL voltage -32 272 R0
WINDOW 3 -380 2 Left 2
WINDOW 123 13 -25 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value ""
SYMATTR Value2 SINE(0 9 0.318309886 0 0 120)
SYMATTR InstName V1
SYMBOL res 544 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2
SYMBOL cap 352 368 R0
SYMATTR InstName C1
SYMATTR Value 0.3333
SYMBOL ind 672 80 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L3
SYMATTR Value 5
SYMBOL cap 704 416 R0
SYMATTR InstName C2
SYMATTR Value 0.5
SYMBOL res 176 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3
SYMBOL voltage 368 464 R0
WINDOW 3 -11 244 Invisible 2
WINDOW 123 5 109 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value ""
SYMATTR Value2 SINE(0 4 0.318309886 0 0 45)
SYMATTR InstName V2
SYMBOL ind 704 288 R0
SYMATTR InstName L4
SYMATTR Value 4
SYMBOL res 704 128 R0
SYMATTR InstName R4
SYMATTR Value 7
SYMBOL res 352 128 R0
SYMATTR InstName R2
SYMATTR Value 3
SYMBOL ind 320 80 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value 6
SYMBOL ind 352 240 R0
SYMATTR InstName L2
SYMATTR Value 2
FLAG 368 656 0
FLAG 720 96 A
FLAG 720 608 B
TEXT 24 536 Left 2 ;.ac list 0.318309886
TEXT 24 560 Left 2 !.tran 0 40 20 5m
TEXT 968 352 Left 2 !.meas TRAN Pinst param V(a)*I(R4)
TEXT 968 424 Left 2 !.meas TRAN Pprom AVG V(a)*I(R4) FROM 20 TO 30