Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1583978718c8_transmission_Gate.asc
* Generated by LTspice 26.0.1 for Windows.
M6 Vout N002 0 N003 NMOS
M2 N004 B 0 0 NMOS
M3 N001 N002 Vout N001 PMOS
V1 A 0 PULSE(0 5 0 5n 5n 40m 80m)
V3 N001 0 5
M1 N002 A N004 0 NMOS
M5 N001 B N002 N001 PMOS
M4 N001 A N002 N001 PMOS
V2 B 0 PULSE(0 5 0 5n 5n 20m 40m)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 80m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 48 -2848 -176 -2848
WIRE 112 -2848 48 -2848
WIRE -176 -2832 -176 -2848
WIRE -48 -2832 -176 -2832
WIRE -176 -2816 -176 -2832
WIRE -176 -2816 -272 -2816
WIRE -80 -2816 -176 -2816
WIRE -176 -2768 -176 -2816
WIRE -176 -2768 -272 -2768
WIRE -48 -2768 -48 -2832
WIRE -48 -2768 -80 -2768
WIRE 112 -2752 112 -2848
WIRE 224 -2752 112 -2752
WIRE -128 -2736 -224 -2736
WIRE -192 -2720 -272 -2720
WIRE -80 -2720 -192 -2720
WIRE 112 -2720 112 -2752
WIRE -224 -2704 -224 -2736
WIRE -224 -2704 -288 -2704
WIRE 224 -2672 224 -2752
WIRE 224 -2672 112 -2672
WIRE -192 -2640 -192 -2720
WIRE 64 -2640 -192 -2640
WIRE 160 -2624 112 -2624
WIRE -192 -2608 -192 -2640
WIRE -192 -2608 -208 -2608
WIRE -320 -2576 -320 -2736
WIRE -320 -2576 -368 -2576
WIRE 208 -2576 112 -2576
WIRE -112 -2560 -208 -2560
WIRE 64 -2544 64 -2640
WIRE 208 -2544 208 -2576
WIRE 208 -2544 112 -2544
WIRE -320 -2528 -320 -2576
WIRE -256 -2528 -320 -2528
WIRE -208 -2496 -208 -2512
WIRE -288 -2464 -288 -2704
WIRE -288 -2464 -368 -2464
WIRE -112 -2448 -112 -2560
WIRE -112 -2448 -208 -2448
WIRE -288 -2416 -288 -2464
WIRE -256 -2416 -288 -2416
WIRE -208 -2384 -208 -2400
WIRE -112 -2384 -112 -2448
WIRE -112 -2384 -208 -2384
WIRE -208 -2368 -208 -2384
IOPIN -528 -2576 In
IOPIN -368 -2464 In
IOPIN -528 -2784 In
IOPIN -368 -2576 In
IOPIN 160 -2624 Out
SYMBOL nmos4 -256 -2608 R0
SYMATTR InstName M1
SYMBOL voltage -528 -2592 R0
WINDOW 3 -154 191 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 0 5n 5n 20m 40m)
SYMATTR InstName V2
SYMBOL pmos4 -320 -2816 R0
SYMATTR InstName M4
SYMBOL voltage 48 -2864 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -528 -2800 R0
WINDOW 0 56 16 Right 2
WINDOW 3 -177 -43 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 5n 5n 40m 80m)
SYMBOL nmos4 64 -2624 R0
SYMATTR InstName M6
SYMBOL pmos4 64 -2720 R0
SYMATTR InstName M3
SYMBOL nmos4 -256 -2496 R0
SYMATTR InstName M2
SYMBOL pmos4 -128 -2816 R0
SYMATTR InstName M5
FLAG -208 -2368 0
FLAG -528 -2576 B
FLAG -368 -2464 B
FLAG -528 -2784 A
FLAG -368 -2576 A
FLAG -528 -2496 0
FLAG -528 -2704 0
FLAG 48 -2768 0
FLAG 112 -2528 0
FLAG 160 -2624 Vout
TEXT -40 -2504 Left 2 !.tran 80m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6401-20.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6401-20.asy)
V2 N007 0 -1.5
V4 N001 0 1.5
XU1 0 0 N001 N002 N006 N007 N007 N004 N005 N003 LTC6401-20 ;pnba IN-)Vocm)V+)OUT+)OUT-)V-)_EN)IN+)OUTF-)OUTF+
V1 N004 0 SINE(0 10m 100Meg)
.tran 100n
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 112 -48 112
WIRE -48 128 -48 112
WIRE 192 128 192 112
WIRE 352 160 336 160
WIRE 80 208 64 208
WIRE 352 208 336 208
WIRE -48 224 -48 208
WIRE -160 272 -176 272
WIRE 80 272 -80 272
WIRE 352 272 336 272
WIRE 352 320 336 320
WIRE 240 384 240 368
WIRE 144 400 144 368
WIRE 192 400 192 368
WIRE 192 400 144 400
WIRE 192 416 192 400
WIRE 192 512 192 496
SYMBOL voltage -48 112 R0
SYMATTR InstName V4
SYMATTR Value 1.5
SYMBOL voltage -64 272 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10m 100Meg)
SYMBOL voltage 192 400 R0
SYMATTR InstName V2
SYMATTR Value -1.5
SYMBOL LTC6401-20 208 240 R0
WINDOW 3 62 144 Left 2
SYMATTR InstName U1
FLAG 192 512 0
FLAG -176 272 0
FLAG 64 208 0
FLAG -48 224 0
FLAG 240 384 0
TEXT 320 448 Left 2 !.tran 100n
* Z:\home\khalils\Downloads\files\data\raw_asc\68d7ee0d1d92_1633.asc
* Generated by LTspice 26.0.1 for Windows.
* Single Supply, 40dB Gain, 550KHz Instrumentation Amplifier
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1633.asy)
V1 +V 0 3
XU2 IN+ N002 +V 0 OUT LT1632 ;pnba In+)In-)V+)V-)OUT
R3 N002 N003 2K
R2 N001 0 20K
V2 IN+ IN- SINE(14.5m 10m 500K)
R5 OUT N002 20K
R4 N002 N001 432
XU1 IN- N001 +V 0 N003 LT1632 ;pnba In+)In-)V+)V-)OUT
R1 N003 N001 2K
V3 IN+ 0 SINE(1.5 .1 50K)
.tran 50u
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 240 48 128 48
WIRE 400 48 320 48
WIRE 432 48 400 48
WIRE 544 48 512 48
WIRE 32 112 16 112
WIRE 128 112 128 48
WIRE 128 112 112 112
WIRE 160 112 128 112
WIRE 256 112 240 112
WIRE -128 176 -128 160
WIRE 192 208 192 192
WIRE 128 224 128 112
WIRE 160 224 128 224
WIRE 480 224 480 208
WIRE 256 240 256 112
WIRE 256 240 224 240
WIRE 288 240 256 240
WIRE 400 240 400 48
WIRE 400 240 368 240
WIRE 448 240 400 240
WIRE 128 256 0 256
WIRE 160 256 128 256
WIRE 544 256 544 48
WIRE 544 256 512 256
WIRE 592 256 544 256
WIRE -128 272 -128 256
WIRE 448 272 400 272
WIRE 0 288 0 256
WIRE 192 288 192 272
WIRE 480 304 480 288
WIRE 0 400 0 368
WIRE 352 400 0 400
WIRE 400 400 400 272
WIRE 400 400 352 400
WIRE 0 416 0 400
WIRE 0 512 0 496
SYMBOL opamps\\LT1633 480 192 R0
SYMATTR InstName U2
SYMBOL res 336 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 432
SYMBOL voltage 0 400 R0
SYMATTR InstName V3
SYMATTR Value SINE(1.5 .1 50K)
SYMBOL res 528 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 20K
SYMBOL voltage -128 160 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL voltage 0 384 M180
WINDOW 0 24 104 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(14.5m 10m 500K)
SYMBOL opamps\\LT1633 192 176 R0
SYMATTR InstName U1
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 20K
SYMBOL res 384 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2K
FLAG -128 272 0
FLAG 192 192 +V
FLAG -128 160 +V
FLAG 16 112 0
FLAG 192 288 0
FLAG 480 208 +V
FLAG 480 304 0
FLAG 128 256 IN-
FLAG 352 400 IN+
FLAG 0 512 0
FLAG 592 256 OUT
TEXT 480 384 Left 2 !.tran 50u
TEXT 352 -8 Bottom 2 ;Single Supply, 40dB Gain, 550KHz Instrumentation Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1763-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1763-1.5.asy)
V1 IN 0 PWL(0 0 1 10)
C2 OUT N001 .01
XU1 OUT OUT 0 N001 IN MP_01 MP_02 IN LT1763-1.5 ;pnba OUT)Sense)GND)BYP)_SHDN)))IN
Rload OUT 0 500
C1 OUT 0 10
.tran 1
.lib LT1763.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 32 304 32
WIRE 352 32 320 32
WIRE 432 32 352 32
WIRE 528 32 432 32
WIRE 0 48 -208 48
WIRE 16 48 0 48
WIRE 432 48 432 32
WIRE 528 48 528 32
WIRE -208 64 -208 48
WIRE 352 64 352 32
WIRE 320 96 320 32
WIRE 320 96 304 96
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 432 144 432 112
WIRE 528 144 528 128
WIRE -208 160 -208 144
WIRE 352 160 352 128
WIRE 352 160 304 160
WIRE 160 240 160 208
SYMBOL cap 336 64 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 416 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LT1763-1.5 160 96 R0
SYMATTR InstName U1
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 500
FLAG -208 160 0
FLAG 432 144 0
FLAG 528 144 0
FLAG 160 240 0
FLAG 528 32 OUT
FLAG -208 48 IN
TEXT 376 240 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\561472fe72a9_MiModelo_N_2500mua.asc
* Generated by LTspice 26.0.1 for Windows.
;dc VG 0 5 0.1
M1 N001 N002 0 0 MiModelo
VD N001 0 5
VG N002 0 3.88878
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.INCLUDE CD4007.lib
.dc VD 0 5 0.1
.MODEL MiModelo NMOS (LEVEL=1 KP=7.5581e-04 VT0=1.1703 LAMBDA=0.0085116)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1296 680
WIRE 416 128 224 128
WIRE 176 208 32 208
WIRE 32 224 32 208
WIRE 32 368 32 304
WIRE 224 368 224 224
WIRE 416 368 416 208
SYMBOL nmos 176 128 R0
SYMATTR InstName M1
SYMATTR Value MiModelo
SYMBOL voltage 416 112 R0
SYMATTR InstName VD
SYMATTR Value 5
SYMBOL voltage 32 208 R0
SYMATTR InstName VG
SYMATTR Value 3.88878
FLAG 32 368 0
FLAG 224 368 0
FLAG 416 368 0
TEXT 72 48 Left 2 !.INCLUDE CD4007.lib
TEXT 80 -24 Left 2 !;dc VG 0 5 0.1
TEXT 88 8 Left 2 !.dc VD 0 5 0.1
TEXT 72 80 Left 2 !.MODEL MiModelo NMOS (LEVEL=1 KP=7.5581e-04 VT0=1.1703 LAMBDA=0.0085116)
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8418A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8418A.asy)
VDIFF N002 N003 SINE(0 0.1 1k)
V1 N001 0 5
XU1 N003 0 0 OUT N001 N001 N002 AD8418A ;pnba IN-)GND)REF2)OUT)VS)REF1)IN+
VCM N003 0 4
.tran 10m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 80 -240 80
WIRE 192 80 160 80
WIRE -240 96 -240 80
WIRE 160 96 160 80
WIRE 192 96 192 80
WIRE 112 128 -112 128
WIRE -112 144 -112 128
WIRE 112 144 112 128
WIRE 128 144 112 144
WIRE 320 176 272 176
WIRE -240 192 -240 176
WIRE 128 208 112 208
WIRE -112 240 -112 224
WIRE 112 240 112 208
WIRE 112 240 -112 240
WIRE -112 272 -112 240
WIRE 160 272 160 256
WIRE 192 272 192 256
WIRE 192 272 160 272
WIRE 160 288 160 272
WIRE -112 368 -112 352
SYMBOL voltage -240 80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -112 256 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName VCM
SYMATTR Value 4
SYMBOL AD8418A 160 176 R0
SYMATTR InstName U1
SYMBOL voltage -112 128 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR Value SINE(0 0.1 1k)
SYMATTR InstName VDIFF
FLAG 160 288 0
FLAG -112 368 0
FLAG -240 192 0
FLAG 320 176 OUT
TEXT 208 304 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1761-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1761-1.5.asy)
XU1 IN 0 IN N001 OUT LT1761-1.5 ;pnba IN)GND)_SHDN)BYP)OUT
C1 OUT 0 10
Rload OUT 0 500
V1 IN 0 PWL(0 0 1 10)
C2 OUT N001 .01
.tran 1
.lib LT1761.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 48 -224 48
WIRE 16 48 -16 48
WIRE 336 48 304 48
WIRE 416 48 336 48
WIRE 512 48 416 48
WIRE -224 64 -224 48
WIRE 336 64 336 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE -16 144 -16 48
WIRE 16 144 -16 144
WIRE 336 144 336 128
WIRE 336 144 304 144
WIRE -224 160 -224 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 160 240 160 208
SYMBOL PowerProducts\\LT1761-1.5 160 96 R0
SYMATTR InstName U1
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 320 64 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
FLAG -224 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 160 240 0
FLAG -224 48 IN
FLAG 512 48 OUT
TEXT 352 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\8a830226c7ad_Or.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vds A N002 Vds PMOS
M2 N002 B N001 Vds PMOS
M3 Vds N001 Output Vds PMOS
M4 Output N001 0 0 NMOS
M5 N001 B 0 0 NMOS
M6 N001 A 0 0 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1052 680
WIRE 320 16 208 16
WIRE 464 16 464 -16
WIRE 464 16 320 16
WIRE 608 16 464 16
WIRE 672 16 608 16
WIRE 208 64 208 16
WIRE 608 80 608 16
WIRE 320 112 320 16
WIRE 320 112 208 112
WIRE 672 128 672 16
WIRE 672 128 608 128
WIRE 80 144 32 144
WIRE 160 144 80 144
WIRE 560 160 512 160
WIRE 208 192 208 160
WIRE 320 240 320 112
WIRE 320 240 208 240
WIRE 608 256 608 176
WIRE 912 256 608 256
WIRE 128 272 32 272
WIRE 160 272 128 272
WIRE 208 304 208 288
WIRE 400 304 208 304
WIRE 512 304 512 160
WIRE 512 304 400 304
WIRE 208 336 208 304
WIRE 400 336 400 304
WIRE 608 336 608 256
WIRE 304 384 208 384
WIRE 496 384 400 384
WIRE 720 384 608 384
WIRE 80 416 80 144
WIRE 160 416 80 416
WIRE 352 416 320 416
WIRE 512 416 512 304
WIRE 560 416 512 416
WIRE 128 448 128 272
WIRE 320 448 320 416
WIRE 320 448 128 448
WIRE 208 480 208 432
WIRE 304 480 304 384
WIRE 304 480 208 480
WIRE 400 480 400 432
WIRE 400 480 304 480
WIRE 496 480 496 384
WIRE 496 480 400 480
WIRE 608 480 608 432
WIRE 608 480 496 480
WIRE 720 480 720 384
WIRE 720 480 608 480
WIRE 496 512 496 480
FLAG 912 256 Output
IOPIN 912 256 Out
FLAG 464 -16 Vds
IOPIN 464 -16 In
FLAG 32 144 A
IOPIN 32 144 In
FLAG 32 272 B
IOPIN 32 272 In
FLAG 496 512 GND
IOPIN 496 512 In
SYMBOL pmos4 160 64 R0
SYMATTR InstName M1
SYMBOL pmos4 160 192 R0
SYMATTR InstName M2
SYMBOL pmos4 560 80 R0
SYMATTR InstName M3
SYMBOL nmos4 560 336 R0
SYMATTR InstName M4
SYMBOL nmos4 352 336 R0
SYMATTR InstName M5
SYMBOL nmos4 160 336 R0
SYMATTR InstName M6
* Z:\home\khalils\Downloads\files\data\raw_asc\3e8daef4268c_Combination_Biased_Circuit.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 1k
R2 0 N002 1k
V1 N001 0 SINE(0 30 1000)
V2 N003 0 5
V3 0 N004 5
D1 N002 N003 1N4148
D2 N004 N002 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 10m 0 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 144 64 144
WIRE 352 144 224 144
WIRE 560 144 352 144
WIRE 720 144 560 144
WIRE 352 208 352 144
WIRE 560 208 560 144
WIRE 720 256 720 144
WIRE 64 272 64 144
WIRE 352 336 352 272
WIRE 560 336 560 272
WIRE 64 496 64 352
WIRE 224 496 64 496
WIRE 352 496 352 416
WIRE 352 496 224 496
WIRE 560 496 560 416
WIRE 560 496 352 496
WIRE 720 496 720 336
WIRE 720 496 560 496
WIRE 224 512 224 496
FLAG 224 512 0
SYMBOL res 240 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 736 352 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 64 256 R0
SYMATTR InstName V1
SYMATTR Value SINE(0 30 1000)
SYMBOL voltage 352 320 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 560 432 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL diode 336 208 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL diode 576 272 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N4148
TEXT 72 384 Left 2 !.tran 0 10m 0 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3525-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3525-3.3.asy)
L1 IN N001 10
V1 IN 0 1
C1 OUT 0 10
XU1 IN 0 IN OUT MP_01 N001 LTC3525-3.3 ;pnba _SHDN)GND)Vin)Vout))SW
Rload OUT 0 55
.tran 1m startup
.lib LTC3525-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 64 0 64
WIRE 320 64 192 64
WIRE 0 160 0 64
WIRE 0 160 -112 160
WIRE 32 160 0 160
WIRE 320 160 320 64
WIRE 320 160 288 160
WIRE -112 176 -112 160
WIRE -112 288 -112 256
WIRE 0 304 0 160
WIRE 32 304 0 304
WIRE 320 304 288 304
WIRE 416 304 320 304
WIRE 320 320 320 304
WIRE 416 320 416 304
WIRE 160 384 160 368
WIRE 320 416 320 384
WIRE 416 416 416 400
SYMBOL ind 96 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL cap 304 320 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LTC3525-3.3 160 208 R0
SYMATTR InstName U1
SYMBOL voltage -112 160 R0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL res 400 304 R0
SYMATTR InstName Rload
SYMATTR Value 55
FLAG 320 416 0
FLAG 160 384 0
FLAG -112 288 0
FLAG 416 416 0
FLAG -112 160 IN
FLAG 416 304 OUT
TEXT 40 416 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\a80616183516_ts2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N004 Vbp {R}
R6 N001 Vi {R/Klp}
XU1 N001 0 Vbp opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
C1 N002 N004 {1/(R*wo)}
R5 Vlp N003 {R}
C2 Vbp N001 {1/(R*wo)}
R2 Vbp N001 {Q*R}
XU2 0 N004 Vlp opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
XU3 N003 0 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R3 Vlp N001 {R}
R4 N003 N002 {R}
V1 Vi 0 AC 1 0
.lib opamp.sub
.ac dec 100 {f0/100} {f0*100}
.param Klp=10 Q=3 f0={1/(2*pi)} wo={f0*2*pi}
.param R 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 96 -48 96
WIRE 624 96 256 96
WIRE -48 144 -48 96
WIRE -16 144 -48 144
WIRE 112 144 64 144
WIRE 352 144 320 144
WIRE 496 144 432 144
WIRE 496 208 496 144
WIRE 496 208 400 208
WIRE 512 208 496 208
WIRE 624 208 624 96
WIRE 624 208 592 208
WIRE 688 208 624 208
WIRE -48 224 -48 144
WIRE 0 224 -48 224
WIRE 112 224 112 144
WIRE 112 224 64 224
WIRE 240 224 224 224
WIRE 320 224 320 144
WIRE 320 224 304 224
WIRE 336 224 320 224
WIRE 448 240 400 240
WIRE 448 256 448 240
WIRE -176 304 -240 304
WIRE -48 304 -48 224
WIRE -48 304 -96 304
WIRE 16 304 -48 304
WIRE 112 320 112 224
WIRE 112 320 80 320
WIRE 128 320 112 320
WIRE 224 320 224 224
WIRE 224 320 208 320
WIRE 240 320 224 320
WIRE 16 336 -48 336
WIRE 624 336 624 208
WIRE 624 336 304 336
WIRE -240 352 -240 304
WIRE 240 352 192 352
WIRE -48 384 -48 336
WIRE 192 384 192 352
WIRE 112 400 112 320
WIRE 688 400 688 208
WIRE -240 448 -240 432
SYMBOL OpAmps\\opamp 272 400 M180
SYMATTR InstName U2
SYMBOL cap 304 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {1/(R*wo)}
SYMBOL voltage -240 336 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1 0
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL res -80 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value {R/Klp}
SYMBOL OpAmps\\opamp 368 160 M0
SYMATTR InstName U3
SYMBOL res 272 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value {R}
SYMBOL res 80 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {Q*R}
SYMBOL res 448 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value {R}
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {1/(R*wo)}
SYMBOL res 224 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R}
SYMBOL OpAmps\\opamp 48 256 R0
SYMATTR InstName U1
SYMBOL res 608 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value {R}
FLAG 448 256 0
FLAG -240 448 0
FLAG -48 384 0
FLAG 192 384 0
FLAG -240 304 Vi
FLAG 112 400 Vbp
FLAG 688 400 Vlp
TEXT 152 488 Left 2 !.lib opamp.sub
TEXT -240 544 Left 2 !.ac dec 100 {f0/100} {f0*100}
TEXT -272 24 Left 2 !.param Klp=10 Q=3 f0={1/(2*pi)} wo={f0*2*pi}
TEXT -272 64 Left 2 !.param R 1
* Z:\tmp\asc_dec_bjh7r6w2\0d4899474c15__Fig8_1_MSD_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
Vin1 Vin_Q 0 SINE(0 0.5 25MEG)
E1 IQ 0 Vin_I N001 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -464 160 -496 160
WIRE -240 160 -272 160
WIRE -208 160 -240 160
WIRE -96 160 -128 160
WIRE 272 160 160 160
WIRE 160 176 160 160
WIRE -272 192 -272 160
WIRE -464 224 -464 160
WIRE -96 224 -96 160
WIRE 112 288 112 240
WIRE -272 304 -272 272
SYMBOL voltage -272 176 R0
WINDOW 0 44 54 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin1
SYMATTR Value SINE(0 0.5 25MEG)
SYMBOL e 160 160 R0
WINDOW 0 40 40 Left 0
WINDOW 3 43 68 Left 0
SYMATTR InstName E1
SYMATTR Value 1
FLAG -464 224 0
FLAG -272 304 0
FLAG -240 160 Vin_Q
FLAG -96 224 0
FLAG 112 192 Vin_I
FLAG 64 352 Vin_Q
FLAG 64 304 0
FLAG 160 256 0
FLAG 272 160 IQ
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP121-1.65.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP121-1.65.asy)
XU1 OUT MP_01 0 IN MP_02 IN ADP121 K=2/4125 ;pnba Vout))GND)En))Vin
C2 OUT 0 1
Rload OUT 0 22
C1 IN 0 1
V1 IN 0 5.5
.tran 10m startup
.lib ADP121.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 22
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL ADP121-1.65 256 208 R0
SYMATTR InstName U1
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup