Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG742.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG742.asy)
R1 N002 0 300
VS N001 0 3
XU2 N003 N002 N001 0 +V ADG742 ;pnba IN)D)S)GND)Vdd
V1 +V 0 5
V4 N003 0 PULSE(0 3 0 10n 10n 980n 2u)
C1 N002 0 35p
.tran 10u
.lib ADG742.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -368 -16 -400 -16
WIRE -240 -16 -288 -16
WIRE 0 -16 -48 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE -480 32 -480 16
WIRE 112 32 112 -16
WIRE -240 48 -368 48
WIRE -368 112 -368 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -480 128 -480 112
WIRE -144 176 -144 160
WIRE -368 272 -368 192
SYMBOL voltage -368 96 R0
WINDOW 3 17 129 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 10n 10n 980n 2u)
SYMATTR InstName V4
SYMBOL voltage -480 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -272 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL ADG742 -144 32 R0
SYMATTR InstName U2
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 35p
FLAG -480 128 0
FLAG -480 16 +V
FLAG -400 -16 0
FLAG -144 -112 +V
FLAG -144 176 0
FLAG -368 272 0
FLAG 0 112 0
FLAG 112 112 0
TEXT -536 200 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX14774.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input\nOnly one channel included\nCharge Injection not included
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\MAX14774.asy)
R1 vB 0 10k
C1 vB 0 15p
V3 vA 0 10
V1 +V 0 5
C2 vVP 0 10n
XU1 vEN vB vA VL vVP vVN +V 0 MAX14774 ;pnba IN)D)S)VL)VP)VN)Vdd)GND
C3 vVN 0 10n
V4 vEN 0 PULSE(0 3.3 10n 20n 20n 5m 10m)
V2 VL 0 3.3
.tran 30m
.lib MAX14774.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 80 176 48
WIRE 272 80 272 48
WIRE -208 144 -208 128
WIRE -48 160 -80 160
WIRE 96 160 32 160
WIRE 128 160 96 160
WIRE 352 160 320 160
WIRE 528 160 352 160
WIRE 624 160 528 160
WIRE 528 192 528 160
WIRE 352 208 320 208
WIRE 448 208 352 208
WIRE 624 208 624 160
WIRE 96 224 -16 224
WIRE 128 224 96 224
WIRE 448 224 448 208
WIRE -208 240 -208 224
WIRE 352 240 320 240
WIRE 368 240 352 240
WIRE 368 256 368 240
WIRE 528 288 528 272
WIRE 624 288 624 272
WIRE 448 304 448 288
WIRE -208 336 -208 320
WIRE -16 336 -16 224
WIRE 368 336 368 320
WIRE 224 368 224 352
WIRE -208 432 -208 416
WIRE -16 464 -16 416
SYMBOL voltage -208 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -208 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL cap 352 256 R0
SYMATTR InstName C3
SYMATTR Value 10n
SYMBOL MAX14774 224 208 R0
SYMATTR InstName U1
SYMBOL voltage 48 160 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL cap 608 208 R0
SYMATTR InstName C1
SYMATTR Value 15p
SYMBOL res 512 176 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL cap 432 224 R0
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -16 320 R0
WINDOW 3 19 116 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3.3 10n 20n 20n 5m 10m)
SYMATTR InstName V4
FLAG -208 432 0
FLAG -208 240 0
FLAG -208 128 +V
FLAG -208 320 VL
FLAG -80 160 0
FLAG -16 464 0
FLAG 528 288 0
FLAG 624 288 0
FLAG 272 48 +V
FLAG 176 48 VL
FLAG 224 368 0
FLAG 96 160 vA
FLAG 96 224 vEN
FLAG 352 160 vB
FLAG 448 304 0
FLAG 368 336 0
FLAG 352 208 vVP
FLAG 352 240 vVN
TEXT -32 512 Left 2 !.tran 30m
TEXT -256 -88 Left 2 ;Note:\nSwitch shown for a logic 0 input\nOnly one channel included\nCharge Injection not included
* Z:\home\khalils\Downloads\files\data\raw_asc\13baa262fff0_LT6550.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6550.asy)
XU1 N001 0 +V -V N002 LT6550 ;pnba IN)GND)VCC)VEE)OUT
V3 N001 0 SINE(0 1 1K)
V1 +V 0 5
V2 -V 0 -5
.tran 3m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -96 80 -96 64
WIRE -208 144 -416 144
WIRE -416 160 -416 144
WIRE 80 160 0 160
WIRE -640 176 -640 160
WIRE -512 176 -512 160
WIRE -416 256 -416 240
WIRE -640 272 -640 256
WIRE -512 272 -512 256
WIRE -176 272 -176 256
WIRE -96 272 -96 256
SYMBOL voltage -416 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL voltage -512 160 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -640 160 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL opamps\\LT6550 -96 160 R0
SYMATTR InstName U1
FLAG -512 272 0
FLAG -96 64 +V
FLAG -512 160 +V
FLAG -96 272 -V
FLAG -640 272 0
FLAG -640 160 -V
FLAG -176 272 0
FLAG -416 256 0
TEXT -208 336 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\0834349f129f_LTC1043_ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP37.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC1043.asy)
V3 V+ 0 5
V4 V- 0 -5
R2 1+ N001 1k
R1 N001 -W1 1k
V1 1+ 0 SINE(0 1 250k)
XU1 0 N001 V+ V- -W1 OP37 ;pnba In+)In-)V+)V-)OUT
XU2 1+ -W1 2+ 0 0 0 osc V+ 0 LTC1043 ;pnba S1A)S2A)Ca+)S3A)S4A)Ca-)Cosc)Vdd)Vss
.tran 0 150u 0u 1u
.lib ADI.lib
.lib LTC1043.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -368 -304 -400 -304
WIRE -176 -304 -288 -304
WIRE -704 -240 -704 -288
WIRE -256 -208 -256 -224
WIRE -176 -192 -176 -304
WIRE -176 -192 -224 -192
WIRE -128 -192 -176 -192
WIRE -864 -176 -896 -176
WIRE -832 -176 -864 -176
WIRE -480 -176 -576 -176
WIRE -400 -176 -400 -304
WIRE -400 -176 -480 -176
WIRE -288 -176 -400 -176
WIRE -176 -160 -224 -160
WIRE -256 -128 -256 -144
WIRE -1472 -112 -1472 -128
WIRE -832 -112 -880 -112
WIRE -560 -112 -576 -112
WIRE -176 -112 -176 -160
WIRE -1312 -96 -1312 -112
WIRE -512 -48 -576 -48
WIRE -480 -48 -512 -48
WIRE -1472 0 -1472 -32
WIRE -1632 16 -1632 -32
WIRE -1312 16 -1312 -16
WIRE -544 16 -576 16
WIRE -544 112 -544 16
WIRE -704 144 -704 80
IOPIN -1312 -112 In
IOPIN -480 -48 Out
IOPIN -1632 -112 In
IOPIN -1472 -128 In
IOPIN -896 -176 In
IOPIN -48 -192 In
IOPIN -256 -128 In
IOPIN -256 -224 In
IOPIN -704 -288 In
IOPIN -864 -176 In
IOPIN -512 -48 In
SYMBOL voltage -1312 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 250k)
SYMBOL voltage -1632 -128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -1472 -128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -5
SYMBOL Opamps\\LTC1043 -704 -80 R0
SYMATTR InstName U2
SYMBOL res -32 -208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res -272 -320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL Opamps\\OP37 -256 -240 M0
SYMATTR InstName U1
FLAG -1312 16 0
FLAG -1312 -112 W1
FLAG -176 -112 0
FLAG -480 -48 out
FLAG -1472 0 0
FLAG -1632 16 0
FLAG -1632 -112 V+
FLAG -1472 -128 V-
FLAG -880 -112 0
FLAG -560 -112 0
FLAG -544 112 0
FLAG -896 -176 W1
FLAG -48 -192 W1
FLAG -256 -128 V-
FLAG -256 -224 V+
FLAG -704 -288 V+
FLAG -480 -176 -W1
FLAG -864 -176 1+
FLAG -512 -48 2+
FLAG -704 144 0
FLAG -832 16 osc
TEXT -1560 128 Left 2 !.tran 0 150u 0u 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6238.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6238.asy)
V3 N003 0 SINE(0 1 1K)
V1 +V 0 5
XU1 N003 N001 N002 +V -V LT6237 ;pnba IN+)IN-)OUT)VCC)VEE
R2 N001 0 1K
R1 N002 N001 1K
V2 -V 0 -5
.tran 3m
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -80 80 -96 80
WIRE 16 80 0 80
WIRE 32 80 16 80
WIRE 144 80 112 80
WIRE -336 160 -336 144
WIRE -208 160 -208 144
WIRE 80 192 80 176
WIRE 16 208 16 80
WIRE 48 208 16 208
WIRE 144 224 144 80
WIRE 144 224 112 224
WIRE 48 240 -64 240
WIRE -336 256 -336 240
WIRE -208 256 -208 240
WIRE -64 256 -64 240
WIRE 80 272 80 256
WIRE -64 352 -64 336
SYMBOL voltage -208 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -336 144 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -64 240 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL opamps\\LT6238 80 224 R0
SYMATTR InstName U1
SYMBOL res 16 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 128 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG -208 256 0
FLAG 80 176 +V
FLAG -208 144 +V
FLAG 80 272 -V
FLAG -336 256 0
FLAG -336 144 -V
FLAG -96 80 0
FLAG -64 352 0
TEXT 160 360 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\302c1f161d2f_lab_4.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP113.asy)
V2 0 N009 12
XU1 N007 N001 N004 N009 N001 OP113 ;pnba In+)In-)V+)V-)OUT
C3 N003 N002 2.25n
V1 N004 0 12
C1 N007 N006 100n
R3 0 N007 22.5k
R2 N002 N001 10k
C2 N006 N005 100n
V3 N005 0 SINE(0 12 100000) AC 12
XU2 N008 N003 N004 N009 N003 OP113 ;pnba In+)In-)V+)V-)OUT
C4 0 N008 1.13n
R1 N008 N002 10k
R4 N006 N001 11k
.ac dec 100 10 100000k
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 96 48 96
WIRE 320 96 304 96
WIRE 400 96 384 96
WIRE 496 96 400 96
WIRE 464 128 464 80
WIRE 464 128 112 128
WIRE 48 144 48 96
WIRE 80 144 48 144
WIRE 400 144 400 96
WIRE 432 144 400 144
WIRE 192 160 192 96
WIRE 192 160 144 160
WIRE 208 160 192 160
WIRE 496 160 496 96
WIRE -112 176 -192 176
WIRE -32 176 -32 96
WIRE -32 176 -48 176
WIRE -16 176 -32 176
WIRE 64 176 48 176
WIRE 80 176 64 176
WIRE 208 176 208 160
WIRE 304 176 304 96
WIRE 304 176 288 176
WIRE 320 176 304 176
WIRE 416 176 400 176
WIRE 432 176 416 176
WIRE 464 192 112 192
WIRE 64 208 64 176
WIRE 416 224 416 176
WIRE 464 224 464 192
SYMBOL res 80 304 R180
WINDOW 0 -40 72 Left 2
WINDOW 3 -26 43 Left 2
SYMATTR InstName R3
SYMATTR Value 22.5k
SYMBOL cap 432 288 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C4
SYMATTR Value 1.13n
SYMBOL cap -48 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL cap 48 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL OpAmps\\OP113 112 96 R0
SYMATTR InstName U1
SYMBOL cap 384 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 -53 54 VTop 2
SYMATTR InstName C3
SYMATTR Value 2.25n
SYMBOL voltage 464 320 R180
WINDOW 0 -64 79 Left 2
WINDOW 3 -55 45 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL res -48 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 87 49 VBottom 2
SYMATTR InstName R4
SYMATTR Value 11k
SYMBOL res 304 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 464 96 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL voltage -192 160 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 12 100000)
SYMATTR Value2 AC 12
SYMBOL res 416 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL OpAmps\\OP113 464 96 R0
SYMATTR InstName U2
FLAG 64 288 0
FLAG 416 288 0
FLAG 464 304 0
FLAG 464 0 0
FLAG -192 256 0
TEXT -226 328 Left 2 !.ac dec 100 10 100000k
* Z:\home\khalils\Downloads\files\data\raw_asc\0e861aacf56e_autoreset_wroom.asc
* Generated by LTspice 26.0.1 for Windows.
R6 N003 RTS 10K
V2 N003 0 PULSE(0 3.3 0 0.01 0.01 2 6 2)
V1 N001 0 3.3
M2 BM RTS DTS DTS BSS123
V4 N002 0 PULSE(0 3.3 2 0.01 0.01 2 4 2)
R4 N001 EN 50k
R7 N001 BM 50k
M1 EN DTS RTS RTS BSS123
R3 DTS N002 10K
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 5 0 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 816
WIRE 400 -80 288 -80
WIRE 544 -80 400 -80
WIRE 288 -32 288 -80
WIRE 544 -16 544 -80
WIRE 288 144 288 48
WIRE 288 144 224 144
WIRE 784 144 288 144
WIRE -32 224 -144 224
WIRE 96 224 -32 224
WIRE 176 224 96 224
WIRE 224 272 224 240
WIRE 224 272 144 272
WIRE -272 320 -336 320
WIRE -144 320 -144 304
WIRE -144 320 -192 320
WIRE -336 432 -336 320
WIRE -272 432 -336 432
WIRE -144 432 -192 432
WIRE 400 432 400 -80
WIRE -144 512 -144 432
WIRE 400 512 224 512
WIRE 784 512 400 512
WIRE -32 592 -144 592
WIRE 144 592 144 272
WIRE 144 592 -32 592
WIRE 176 592 144 592
WIRE 96 656 96 224
WIRE 224 656 224 608
WIRE 224 656 96 656
WIRE -336 784 -336 432
WIRE 544 784 544 64
WIRE 544 784 -336 784
IOPIN 784 144 Out
IOPIN 784 512 Out
IOPIN -32 224 Out
IOPIN -32 592 Out
SYMBOL res 272 -48 R0
SYMATTR InstName R4
SYMATTR Value 50k
SYMBOL nmos 176 144 R0
SYMATTR InstName M1
SYMATTR Value BSS123
SYMBOL nmos 176 512 R0
SYMATTR InstName M2
SYMATTR Value BSS123
SYMBOL res -160 208 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL voltage -176 320 R90
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 3.3 2 0.01 0.01 2 4 2)
SYMBOL voltage -176 432 R90
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 0 0.01 0.01 2 6 2)
SYMBOL res 384 416 R0
SYMATTR InstName R7
SYMATTR Value 50k
SYMBOL voltage 544 -32 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res -160 496 R0
SYMATTR InstName R6
SYMATTR Value 10K
FLAG 544 784 0
FLAG 784 144 EN
FLAG 784 512 BM
FLAG -32 224 DTS
FLAG -32 592 RTS
TEXT -1002 -248 Left 2 !.tran 0 5 0 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1585.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1585.asy)
V1 IN 0 PWL(0 0 1 10)
Rload OUT 0 500
R2 N001 0 500
C1 OUT 0 22
R1 OUT N001 500
XU1 N001 OUT IN LT1585 ;pnba ADJ)OUT)IN
.tran 1
.lib LT1584.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 176 -176 176
WIRE 336 176 288 176
WIRE 432 176 336 176
WIRE 528 176 432 176
WIRE -176 192 -176 176
WIRE 336 192 336 176
WIRE 432 192 432 176
WIRE 528 192 528 176
WIRE -176 288 -176 272
WIRE 432 288 432 256
WIRE 528 288 528 272
WIRE 160 304 160 272
WIRE 336 304 336 272
WIRE 336 304 160 304
WIRE 336 320 336 304
WIRE 336 416 336 400
SYMBOL res 320 304 R0
SYMATTR InstName R2
SYMATTR Value 500
SYMBOL res 512 176 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL res 320 176 R0
SYMATTR InstName R1
SYMATTR Value 500
SYMBOL cap 416 192 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL PowerProducts\\LT1585 160 176 R0
SYMATTR InstName U1
SYMBOL voltage -176 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -176 288 0
FLAG 432 288 0
FLAG 528 288 0
FLAG 336 416 0
FLAG 528 176 OUT
FLAG -176 176 IN
TEXT 464 352 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\242e6cb9ee88_6000.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6000.asy)
R1 OUT N001 90.9K
V1 +V 0 2
V3 IN 0 PULSE(-.1 .1 0 1u 1u 100m 200m)
XU1 IN N001 +V -V OUT NC_01 LT6000 ;pnba IN+)IN-)VCC)VEE)OUT)SHDN_L
V2 -V 0 -2
R2 N001 0 10K
.tran 1
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 756
WIRE 32 416 16 416
WIRE 128 416 112 416
WIRE 192 416 128 416
WIRE 288 416 272 416
WIRE -288 448 -288 432
WIRE -192 448 -192 432
WIRE 176 480 176 464
WIRE 128 512 128 416
WIRE 160 512 128 512
WIRE 288 528 288 416
WIRE 288 528 240 528
WIRE 336 528 288 528
WIRE -288 544 -288 528
WIRE -192 544 -192 528
WIRE 160 544 -64 544
WIRE -64 560 -64 544
WIRE 176 592 176 576
WIRE -64 656 -64 640
SYMBOL res 288 400 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 90.9K
SYMBOL res 128 400 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage -288 432 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL voltage -192 432 R0
SYMATTR InstName V2
SYMATTR Value -2
SYMBOL LT6000 176 528 R0
SYMATTR InstName U1
SYMBOL voltage -64 544 R0
SYMATTR InstName V3
SYMATTR Value PULSE(-.1 .1 0 1u 1u 100m 200m)
FLAG -288 544 0
FLAG -192 544 0
FLAG -64 656 0
FLAG -64 544 IN
FLAG 336 528 OUT
FLAG 176 464 +V
FLAG -288 432 +V
FLAG -192 432 -V
FLAG 176 592 -V
FLAG 16 416 0
TEXT 320 696 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2503-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
* PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2503-2.8.asy)
V1 IN 0 3.3
Rload OUT 0 10
C1 OUT 0 18
L1 N001 N002 1.5 Rser=80m
XU1 N001 N002 OUT IN IN 0 OUT NC_01 ADP2503-2.8 ;pnba SW1)SW2)FB)EN)PVin)GND)Vout)Sync
.tran 400u startup
.lib ADP2503-2.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 48 64 32 64
WIRE 336 64 304 64
WIRE -64 80 -64 64
WIRE 32 144 32 64
WIRE 48 144 32 144
WIRE 336 144 304 144
WIRE -64 176 -64 160
WIRE 320 224 304 224
WIRE 368 224 320 224
WIRE 480 224 368 224
WIRE 368 240 368 224
WIRE 480 240 480 224
WIRE 48 304 32 304
WIRE 320 304 320 224
WIRE 320 304 304 304
WIRE 368 336 368 304
WIRE 480 336 480 320
SYMBOL cap 352 240 R0
SYMATTR InstName C1
SYMATTR Value 18
SYMBOL voltage -64 64 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL ADP2503-2.8 176 176 R0
SYMATTR InstName U1
SYMBOL res 464 224 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL ind 320 48 R0
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=80m
FLAG 368 336 0
FLAG 32 304 0
FLAG -64 176 0
FLAG 480 336 0
FLAG -64 64 IN
FLAG 480 224 OUT
TEXT 400 400 Left 2 !.tran 400u startup
TEXT 184 0 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\4d01eca751b2_2.asc
* Generated by LTspice 26.0.1 for Windows.
R10 N001 0 10
V2 N001 N002 5
V1 N002 0 5
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 -80 -160 -80
WIRE -160 -48 -160 -80
WIRE 96 64 96 -80
WIRE -160 128 -160 32
WIRE -160 256 -160 208
WIRE -96 256 -160 256
WIRE 96 256 96 144
WIRE 96 256 -96 256
WIRE -96 320 -96 256
WIRE 0 0 0 0
SYMBOL voltage -160 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 80 48 R0
SYMATTR InstName 10
SYMATTR Value 10
SYMBOL voltage -160 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -96 320 0
TEXT -200 344 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4891-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4891-2.asy)
V1 +V 0 2.5
Rload OUT 0 10K
V2 -V 0 -2.5
XU1 IN N001 +V -V OUT ADA4891-1 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 10K
R1 N001 0 10K
Vin IN 0 SINE(0 1 10K)
.tran 1m
.lib ADA4891-1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1136 144 -1152
WIRE 256 -1136 256 -1152
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1040 144 -1056
WIRE 256 -1040 256 -1056
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL ADA4891-2 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 144 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 256 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
FLAG 144 -1152 +V
FLAG 144 -1040 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1152 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 768 -992 0
FLAG 256 -1040 0
TEXT 752 -936 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\11e72c785e4f_FET09op.asc
* Generated by LTspice 26.0.1 for Windows.
Vdd N001 0 {Vdd}
M1 N002 g 0 0 MOSFET
Rg g N002 {Rg}
Rd N001 N002 {Rd}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.op
.model MOSFET pmos(Kp=1m Vto=-4)
.param Vdd=-50 Rd=330 Rg=1Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1608 1076
WIRE 384 -128 192 -128
WIRE 192 -80 192 -128
WIRE 192 16 192 0
WIRE 192 16 -16 16
WIRE 192 32 192 16
WIRE 384 48 384 -128
WIRE -16 112 -16 16
WIRE 16 112 -16 112
WIRE 112 112 96 112
WIRE 144 112 112 112
WIRE 192 176 192 128
WIRE 384 176 384 128
WIRE 384 176 192 176
WIRE 192 208 192 176
SYMBOL voltage 384 32 R0
WINDOW 0 55 34 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdd
SYMATTR Value {Vdd}
SYMBOL pmos 144 32 R0
SYMATTR InstName M1
SYMATTR Value MOSFET
SYMBOL res 176 -96 R0
SYMATTR InstName Rd
SYMATTR Value {Rd}
SYMBOL res 112 96 R90
WINDOW 0 -10 57 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rg
SYMATTR Value {Rg}
FLAG 192 208 0
FLAG 112 112 g
TEXT 240 208 Left 2 !.op
TEXT 72 328 Left 2 !.model MOSFET pmos(Kp=1m Vto=-4)
TEXT 80 376 Left 2 !.param Vdd=-50 Rd=330 Rg=1Meg