Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0921a35a87c9_let_the_sun_shine.asc
* Generated by LTspice 26.0.1 for Windows.
* a smaller photo diode
* Let The Sun Shine
V1 VLUX 0 PWL(0 10 1 10 2 100 3 100 4 1000 6 1000 7 100)
RLOAD N001 0 1k
R1 vdi 0 1e6
D1 0 vdi D
R2 vdi N001 10
B1 vdi 0 I=V(VLUX)*1u
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 10 0 .01
.options plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 964 680
WIRE 368 128 320 128
WIRE 432 128 368 128
WIRE 528 128 432 128
WIRE 576 128 528 128
WIRE 848 128 656 128
WIRE -128 160 -128 144
WIRE 528 160 528 128
WIRE 320 176 320 128
WIRE 432 176 432 128
WIRE 848 176 848 128
WIRE -128 256 -128 240
WIRE 320 288 320 256
WIRE 432 288 432 240
WIRE 432 288 320 288
WIRE 528 288 528 240
WIRE 528 288 432 288
WIRE 848 288 848 256
WIRE 432 320 432 288
LINE Normal -128 -64 -128 -16
LINE Normal -352 192 -400 192
LINE Normal -128 400 -128 448
LINE Normal 144 192 96 192
LINE Normal -335 282 -376 302
LINE Normal -272 352 -304 384
LINE Normal 64 16 32 48
LINE Normal 64 368 32 336
LINE Normal -288 48 -320 16
LINE Normal 122 92 81 112
LINE Normal -204 -3 -224 -44
LINE Normal -16 422 -36 381
LINE Normal -196 387 -217 433
LINE Normal -20 -45 -41 1
LINE Normal -339 108 -385 87
LINE Normal 123 291 77 270
RECTANGLE Normal 688 368 208 48
CIRCLE Normal 96 400 -352 -16
SYMBOL voltage -128 144 R0
WINDOW 3 -238 356 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 10 1 10 2 100  3 100 4 1000 6 1000 7 100)
SYMBOL res 832 160 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
SYMBOL diode 416 240 M180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D1
SYMBOL bi 320 176 R0
WINDOW 3 -80 136 Left 0
SYMATTR InstName B1
SYMATTR Value I=V(VLUX)*1u
SYMBOL res 560 144 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL res 512 144 R0
SYMATTR InstName R1
SYMATTR Value 1e6
FLAG 432 320 0
FLAG 368 128 vdi
FLAG 848 288 0
FLAG -128 144 VLUX
FLAG -128 256 0
TEXT 230 -76 Left 0 !.tran 0 10 0 .01
TEXT 240 72 Left 0 ;a smaller photo diode
TEXT 232 -48 Left 0 !.options plotwinsize=0
TEXT -208 -120 Left 0 ;Let The Sun Shine
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3689-5.asc
* Generated by LTspice 26.0.1 for Windows.
C1 0 N007 0.1n
C2 0 N006 0.68n
R3 0 N008 20.5K
D1 N003 N002 1N5818
L1 N002 OUT 12 Rpar=2K
C3 OUT N005 10p
C4 OUT 0 22
C5 N001 N002 0.1
V1 IN 0 12
Rload OUT 0 1K
V2 N004 0 pulse(0 2 0 1u 1u 250u 500u)
XU1 NC_01 N007 N006 N008 0 OUT N001 IN N002 N003 IN N005 0 IN N004 NC_02 0 LT3689-5 ;pnba _WDO)Cwdt)Cpor)Rt)SYNC)OUT)Boost)Vin)SW)DA)EN/UVLO)FB)_WDE)_W/T)WDI)_RST)GND
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3689-5.asy)
.lib LT3689-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1556 680
WIRE 80 -144 -16 -144
WIRE 96 -144 80 -144
WIRE 608 -144 416 -144
WIRE -16 -128 -16 -144
WIRE 80 -48 80 -144
WIRE 96 -48 80 -48
WIRE 464 -48 416 -48
WIRE -16 -32 -16 -48
WIRE 464 -32 464 -48
WIRE 80 48 80 -48
WIRE 96 48 80 48
WIRE 464 48 464 32
WIRE 464 48 416 48
WIRE 512 48 464 48
WIRE 608 48 608 -144
WIRE 608 48 592 48
WIRE 656 48 608 48
WIRE 736 48 656 48
WIRE 464 64 464 48
WIRE 656 64 656 48
WIRE 736 64 736 48
WIRE 96 144 80 144
WIRE 464 144 464 128
WIRE 464 144 416 144
WIRE 656 160 656 128
WIRE 736 160 736 144
WIRE -128 240 -208 240
WIRE 96 240 -48 240
WIRE 464 240 416 240
WIRE 608 240 608 48
WIRE 608 240 528 240
WIRE 432 352 416 352
WIRE 528 352 496 352
WIRE 432 464 416 464
WIRE 528 464 496 464
WIRE 96 576 80 576
WIRE 432 576 416 576
WIRE 528 576 512 576
WIRE 256 624 256 608
FLAG 256 624 0
FLAG 528 352 0
FLAG 528 464 0
FLAG 528 576 0
FLAG 656 160 0
FLAG 80 576 0
FLAG -16 -32 0
FLAG 736 160 0
FLAG -208 240 0
FLAG 80 144 0
FLAG 736 48 OUT
FLAG -16 -144 IN
SYMBOL cap 496 448 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.1n
SYMBOL cap 496 336 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 0.68n
SYMBOL res 528 560 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 20.5K
SYMBOL schottky 448 128 M180
WINDOW 0 30 65 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5818
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL ind 496 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 12
SYMATTR SpiceLine Rpar=2K
SYMBOL cap 528 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL cap 640 64 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMBOL cap 448 -32 R0
WINDOW 3 27 56 Left 2
SYMATTR Value 0.1
SYMATTR InstName C5
SYMBOL voltage -16 -144 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 720 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL voltage -32 240 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value pulse(0 2 0 1u 1u 250u 500u)
SYMBOL PowerProducts\\LT3689-5 256 192 R0
SYMATTR InstName U1
TEXT 632 520 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3378ff32a5b9_pin_diode_ac.asc
* Generated by LTspice 26.0.1 for Windows.
* the next resistance helps convergence
* two different junction diodes
* 10th order H(s) approximation
* .dc dec I1 10u 10m 20
* Prefix:X
* PIN-Diode Model For AC-Simulations\n \nhttp://rcaverly.ee.villanova.edu/papers/Vi_282.pdf
+ n=1, ikf=3, phi=.7, ie=6,
+ rmin=1.8m, rmax=800k, cj=0.1pf,
+ tau=.116u, w=10u
rp2 3 4 5
v1 30 31 0
rmin 10 11 {rmin}
cp4 4 5 {tau/9}
rs7 7 0 {af/19}
rp6 5 6 13
XD1 d 0 pin ;pnba +)-
rp1 2 3 1
din 32 0 dj2
rs1 3 0 {af/3}
ej 30 0 value={v(12,20)}
cjunc 10 20 {cj}
cp1 2 3 {tau}
e0 1 0 value={i(v1)}
rp4 4 5 9
rmax 10 12 {rmax}
rs6 6 0 {af/15}
grmod 11 12 value={2*(v(11,12)*v(2,3)/va)}
rp7 6 7 17
dpi 31 32 dj1
rs3 4 0 {af/7}
cp7 6 7 {tau/17}
cp2 3 4 {tau/5}
gpin 12 20 value={i(v2)}
rs5 5 0 {af/11}
v2 1 2 0
rpin 10 20 1e12
I1 0 d 1m AC 1
cp6 5 6 {tau/13}
.subckt pin 10 20 params: is=1e-10,
.param to={w*w/.001935/4}
.param va={w*w/tau/0.075}
.param af={to/tau}
.model dj1 d (is={is},ikf={ikf}, n={n})
.model dj2 d (is={is},ikf={ikf},n={n})
.ends
.ac dec 100 100K 10G
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1164
WIRE -128 64 -224 64
WIRE -80 64 -128 64
WIRE -224 96 -224 64
WIRE -80 112 -80 64
WIRE -224 224 -224 176
WIRE -80 224 -80 176
SYMBOL current -224 176 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
WINDOW 123 24 -28 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 1m
SYMATTR Value2 AC 1
SYMBOL diode -96 112 R0
SYMATTR InstName D1
SYMATTR Value pin
SYMATTR Prefix X
FLAG -224 224 0
FLAG -80 224 0
FLAG -128 64 d
TEXT 96 -48 Left 0 !.subckt pin 10 20 params: is=1e-10,\n+ n=1, ikf=3, phi=.7, ie=6,\n+ rmin=1.8m, rmax=800k, cj=0.1pf,\n+ tau=.116u, w=10u\n.param to={w*w/.001935/4}\n.param va={w*w/tau/0.075}\n.param af={to/tau}\ncjunc 10 20 {cj}\nrmax 10 12 {rmax}\nrmin 10 11 {rmin}\ngrmod 11 12 value={2*(v(11,12)*v(2,3)/va)}\ngpin 12 20 value={i(v2)}\n* the next resistance helps convergence\nrpin 10 20 1e12\nej 30 0 value={v(12,20)}\nv1 30 31 0\n* two different junction diodes\ndpi 31 32 dj1\ndin 32 0 dj2\n.model dj1 d (is={is},ikf={ikf}, n={n})\n.model dj2 d (is={is},ikf={ikf},n={n})\n* 10th order H(s) approximation\ne0 1 0 value={i(v1)}\nv2 1 2 0\nrp1 2 3 1\ncp1 2 3 {tau}\nrs1 3 0 {af/3}\nrp2 3 4 5\ncp2 3 4 {tau/5}\nrs3 4 0 {af/7}\nrp4 4 5 9\ncp4 4 5 {tau/9}\nrs5 5 0 {af/11}\nrp6 5 6 13\ncp6 5 6 {tau/13}\nrs6 6 0 {af/15}\nrp7 6 7 17\ncp7 6 7 {tau/17}\nrs7 7 0 {af/19}\n.ends
TEXT -256 -32 Left 0 ;.dc dec I1 10u 10m 20
TEXT -256 0 Left 0 !.ac dec 100 100K 10G
TEXT -56 144 Left 0 ;Prefix:X
TEXT -248 -160 Left 0 ;PIN-Diode Model For AC-Simulations\n \nhttp://rcaverly.ee.villanova.edu/papers/Vi_282.pdf
* Z:\home\khalils\Downloads\files\data\raw_asc\39179e14db7a_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
VDD1 VDD 0 3.3
XU1 VDD_2 VDD_2 VDD 0 OUT TLV354 ;pnba In+)In-)V+)V-)OUT
VDD2 VDD_2 0 1.65
.ac dec 1000 0.01 100
.lib TLV354.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 64 -64 16
WIRE 48 64 48 16
WIRE 448 112 400 112
SYMBOL Opamps\\opamp2 368 48 R0
SYMATTR InstName U1
SYMATTR Value TLV354
SYMBOL voltage 48 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD2
SYMATTR Value 1.65
SYMBOL voltage -64 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD1
SYMATTR Value 3.3
FLAG -64 144 0
FLAG -64 16 VDD
FLAG 48 144 0
FLAG 48 16 VDD_2
FLAG 368 80 VDD
FLAG 336 96 VDD_2
FLAG 336 128 VDD_2
FLAG 368 144 0
FLAG 448 112 OUT
TEXT 264 216 Left 2 !.ac dec 1000 0.01 100
TEXT 264 248 Left 2 !.lib TLV354.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\66618429e336_mos_cs_vgs.asc
* Generated by LTspice 26.0.1 for Windows.
* .op
* .dc Vin 1.9 2.1 1m
Vin VG 0 SINE(2.01 1m 30)
RD N001 VD 2k
VDD N001 0 10
M1 VD VG 0 0 SQJ910AEP_Q2
RL VD 0 2k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 0.5 1m 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 288 -16 176 -16
WIRE 400 -16 368 -16
WIRE 176 16 176 -16
WIRE 400 16 400 -16
WIRE 176 128 176 96
WIRE 416 128 176 128
WIRE 176 144 176 128
WIRE 416 144 416 128
WIRE 112 208 32 208
WIRE 128 208 112 208
WIRE 32 240 32 208
WIRE 176 240 176 224
WIRE 416 240 416 224
WIRE 32 336 32 320
SYMBOL voltage 32 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 10 101 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(2.01 1m 30)
SYMBOL nmos 128 128 R0
SYMATTR InstName M1
SYMATTR Value SQJ910AEP_Q2
SYMBOL voltage 272 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 10
SYMBOL res 160 0 R0
SYMATTR InstName RD
SYMATTR Value 2k
SYMBOL res 400 128 R0
SYMATTR InstName RL
SYMATTR Value 2k
FLAG 176 240 0
FLAG 176 128 VD
FLAG 400 16 0
FLAG 32 336 0
FLAG 416 240 0
FLAG 112 208 VG
TEXT 224 280 Left 2 ;.op
TEXT 224 304 Left 2 ;.dc Vin 1.9 2.1 1m
TEXT 232 352 Left 2 !.tran 0 0.5 1m 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4120-1C.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4120-1C.asy)
R1 GATE N004 5
V3 N003 0 PULSE(0 5 0 2n 2n 998n 2u)
C1 GATE 0 2n
V2 N002 0 15
XU1 N001 N003 0 0 N004 N002 ADuM4120xx Glitch=0 Vrun2=11.2 ;pnba Vdd1)Vin)GND1)GND2)Vout)Vdd2
V1 N001 0 5
.tran 10u
.lib ADuM4120xx.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 16 16 16
WIRE 512 16 320 16
WIRE 16 32 16 16
WIRE 512 32 512 16
WIRE 160 48 160 16
WIRE 320 48 320 16
WIRE 16 128 16 112
WIRE 512 128 512 112
WIRE -112 160 -144 160
WIRE 112 160 -32 160
WIRE 400 160 368 160
WIRE 512 160 480 160
WIRE 544 160 512 160
WIRE 512 176 512 160
WIRE 160 288 160 272
WIRE 320 288 320 272
SYMBOL voltage 512 16 R0
WINDOW 0 29 30 Left 2
WINDOW 3 31 84 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL res 496 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL voltage -16 160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 2n 2n 998n 2u)
SYMBOL cap 496 176 R0
WINDOW 0 35 16 Left 2
WINDOW 3 36 51 Left 2
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL ADuM4120-1C 240 160 R0
SYMATTR InstName U1
SYMBOL voltage 16 16 R0
WINDOW 0 25 25 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 160 288 0
FLAG 320 288 0
FLAG 512 240 0
FLAG 544 160 GATE
FLAG 512 128 0
FLAG 16 128 0
FLAG -144 160 0
TEXT 400 280 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3542.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N002 IN 0 N001 0 IN LTC3542 ;pnba FB)Vin)GND)SW)Mode)Run
V1 IN 0 3.6
L1 N001 OUT 2.2
R1 OUT N002 150K
R2 N002 0 75K
C1 OUT N002 22p
C2 OUT 0 10
Rload OUT 0 3.6
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3542.asy)
.lib LTC3542.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 16 -32 16
WIRE 224 16 64 16
WIRE -32 32 -32 16
WIRE 224 32 224 16
WIRE 64 96 64 16
WIRE 80 96 64 96
WIRE 384 96 368 96
WIRE 480 96 464 96
WIRE 576 96 480 96
WIRE 656 96 576 96
WIRE 736 96 656 96
WIRE 656 112 656 96
WIRE 736 112 736 96
WIRE -32 128 -32 112
WIRE 480 128 480 96
WIRE 576 128 576 96
WIRE 656 208 656 176
WIRE 736 208 736 192
WIRE 80 256 64 256
WIRE 480 256 480 208
WIRE 480 256 368 256
WIRE 576 256 576 192
WIRE 576 256 480 256
WIRE 480 272 480 256
WIRE 224 336 224 320
WIRE 480 368 480 352
FLAG -32 128 0
FLAG 64 256 0
FLAG 224 336 0
FLAG 480 368 0
FLAG 736 208 0
FLAG 656 208 0
FLAG 736 96 OUT
FLAG -32 16 IN
SYMBOL PowerProducts\\LTC3542 224 176 R0
SYMATTR InstName U1
SYMBOL voltage -32 16 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL ind 368 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL res 464 112 R0
SYMATTR InstName R1
SYMATTR Value 150K
SYMBOL res 464 256 R0
SYMATTR InstName R2
SYMATTR Value 75K
SYMBOL cap 560 128 R0
SYMATTR InstName C1
SYMATTR Value 22p
SYMBOL cap 640 112 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res 720 96 R0
SYMATTR InstName Rload
SYMATTR Value 3.6
TEXT 600 328 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0260e9b226ac_MyComparator.asc
* Generated by LTspice 26.0.1 for Windows.
R3 pos 0 1e6
R2 neg 0 1e6
E1 out 0 value={if(V(in+,in-)>0, V(pos),V(neg))}
R1 in- in+ 1e6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 976 680
WIRE 608 -288 528 -288
WIRE 672 -288 608 -288
WIRE 256 -272 160 -272
WIRE 304 -272 256 -272
WIRE 304 -240 304 -272
WIRE 672 -240 672 -288
WIRE 304 -128 304 -160
WIRE 672 -128 672 -160
WIRE 544 -64 480 -64
WIRE 640 -64 544 -64
WIRE 208 0 128 0
WIRE 336 0 208 0
WIRE 480 0 480 -64
WIRE 336 16 336 0
WIRE 224 112 144 112
WIRE 336 112 336 96
WIRE 336 112 224 112
WIRE 480 144 480 80
IOPIN 528 -288 In
IOPIN 160 -272 In
IOPIN 144 112 In
IOPIN 128 0 In
IOPIN 640 -64 Out
SYMBOL res 656 -256 R0
SYMATTR InstName R3
SYMATTR Value 1e6
SYMBOL Misc\\Epoly 480 -16 R0
SYMATTR InstName E1
SYMATTR Value value={if(V(in+,in-)>0, V(pos),V(neg))}
SYMBOL res 288 -256 R0
SYMATTR InstName R2
SYMATTR Value 1e6
SYMBOL res 320 0 R0
SYMATTR InstName R1
SYMATTR Value 1e6
FLAG 480 144 0
FLAG 224 112 in+
FLAG 208 0 in-
FLAG 544 -64 pwm
FLAG 608 -288 pos
FLAG 256 -272 neg
FLAG 528 -288 pos
FLAG 160 -272 neg
FLAG 144 112 in+
FLAG 128 0 in-
FLAG 640 -64 out
FLAG 304 -128 0
FLAG 672 -128 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1790-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1790-3.asy)
C1 OUT 0 1
V1 IN 0 PWL(0 0 1 10)
XU1 IN 0 OUT LT1790-3 ;pnba IN)GND)OUT
Rload OUT 0 1K
.tran 1
.lib LT1790.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 48 -208 48
WIRE 352 48 288 48
WIRE 448 48 352 48
WIRE -208 64 -208 48
WIRE 352 64 352 48
WIRE 448 64 448 48
WIRE -208 160 -208 144
WIRE 352 160 352 128
WIRE 448 160 448 144
WIRE 160 176 160 160
SYMBOL res 432 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL cap 336 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LT1790-3 160 48 R0
SYMATTR InstName U1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -208 160 0
FLAG 352 160 0
FLAG 448 160 0
FLAG 160 176 0
FLAG 448 48 OUT
FLAG -208 48 IN
TEXT 232 200 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\04124479edb2_erroramp.asc
* Generated by LTspice 26.0.1 for Windows.
XErrorAmp Vnon FB V+ V- COMP level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 V+ 0 5
V2 V- 0 -5
V3 Vnon 0 2.5
V4 Vref 0 4.8
Rcomp COMP FB 10k
R2 Vref FB 4.99k
R3 0 Vref 12.7k
.dc V4 0 10
* Library below included based on ModelFile attribute of instance XErrorAmp (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 112 -64 112
WIRE 272 128 208 128
WIRE 400 128 272 128
WIRE 144 144 80 144
WIRE 80 256 80 144
WIRE 80 304 80 256
WIRE 160 304 80 304
WIRE 272 304 272 128
WIRE 272 304 240 304
WIRE 80 352 80 304
WIRE 80 480 80 432
WIRE 80 480 -80 480
WIRE 80 512 80 480
FLAG 336 16 0
FLAG 416 16 0
FLAG 512 16 0
FLAG 336 -64 V+
FLAG 416 -64 V-
FLAG 512 -64 Vnon
FLAG 592 16 0
FLAG 592 -64 Vref
FLAG 80 592 0
FLAG -80 480 Vref
FLAG 400 128 Vout
FLAG -64 112 Vnon
FLAG 176 96 V-
FLAG 176 160 V+
FLAG 80 256 FB
FLAG 272 304 COMP
SYMBOL OpAmps\\UniversalOpAmp 176 128 M180
SYMATTR InstName ErrorAmp
SYMBOL voltage 336 -80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 416 -80 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 512 -80 R0
SYMATTR InstName V3
SYMATTR Value 2.5
SYMBOL voltage 592 -80 R0
SYMATTR InstName V4
SYMATTR Value 4.8
SYMBOL res 256 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rcomp
SYMATTR Value 10k
SYMBOL res 96 448 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 4.99k
SYMBOL res 96 608 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 12.7k
TEXT -138 616 Left 2 !.dc V4 0 10
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL26001.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N003 0 1
V1 IN 0 12
L1 IN N001 6.8 Rser=.1
R1 OUT N002 1Meg
R2 N002 0 34.8K
C2 OUT N002 4.7p
C3 OUT 0 4.7 Rser=10m
Rload OUT 0 355
D1 N001 OUT BAT46WJ
XU1 N002 MP_01 N001 MP_02 0 IN N003 IN ADPL26001 ;pnba FBX))SW))GND)Vin)INTVcc)EN/UVLO
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL26001.asy)
.lib ADPL26001.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 48 -48 48
WIRE 128 48 32 48
WIRE 176 48 128 48
WIRE 288 48 256 48
WIRE 336 48 288 48
WIRE 448 48 400 48
WIRE 560 48 448 48
WIRE 672 48 560 48
WIRE 768 48 672 48
WIRE -48 64 -48 48
WIRE 672 64 672 48
WIRE 768 64 768 48
WIRE 448 80 448 48
WIRE 128 96 128 48
WIRE 288 96 288 48
WIRE 560 96 560 48
WIRE -48 160 -48 144
WIRE 672 160 672 128
WIRE 768 160 768 144
WIRE 32 208 32 48
WIRE 48 208 32 208
WIRE 448 208 448 160
WIRE 448 208 368 208
WIRE 560 208 560 160
WIRE 560 208 448 208
WIRE 448 224 448 208
WIRE 448 320 448 304
WIRE 128 336 128 320
WIRE 288 336 288 320
WIRE 128 416 128 400
FLAG 128 416 0
FLAG 288 336 0
FLAG -48 160 0
FLAG 448 320 0
FLAG 768 160 0
FLAG 672 160 0
FLAG -48 48 IN
FLAG 768 48 OUT
SYMBOL cap 112 336 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -48 48 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ind 160 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMATTR SpiceLine Rser=.1
SYMBOL res 432 64 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL res 432 208 R0
SYMATTR InstName R2
SYMATTR Value 34.8K
SYMBOL cap 544 96 R0
SYMATTR InstName C2
SYMATTR Value 4.7p
SYMBOL cap 656 64 R0
SYMATTR InstName C3
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=10m
SYMBOL res 752 48 R0
SYMATTR InstName Rload
SYMATTR Value 355
SYMBOL schottky 336 64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value BAT46WJ
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL ADPL26001 208 208 R0
SYMATTR InstName U1
TEXT 464 392 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\8580b87e18f9_regulator_v1_ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
* Regulator Version 1
R2 N002 N003 100
Q3 2+ N001 W1 0 2N3906
Q2 N001 N003 0 0 2N3904
Q1 N003 N002 0 0 2N3904
Q4 N001 N001 W1 0 2N3906
V1 W1 0 PWL REPEAT FOREVER (0 2 0.25m 4 0.5m 2 0.75m 0 1m 2) ENDREPEAT
R1 2+ N002 2.2k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -480 -368 -480 -400
WIRE -96 -368 -96 -400
WIRE -96 -368 -128 -368
WIRE -64 -368 -96 -368
WIRE 256 -368 -64 -368
WIRE -64 -320 -64 -368
WIRE 256 -320 256 -368
WIRE -480 -272 -480 -288
WIRE 32 -272 0 -272
WIRE 192 -272 32 -272
WIRE -64 -192 -64 -224
WIRE 32 -192 32 -272
WIRE 32 -192 -64 -192
WIRE 256 -176 256 -224
WIRE 320 -176 256 -176
WIRE 256 -144 256 -176
WIRE 256 -48 256 -64
WIRE 384 -48 256 -48
WIRE 256 -16 256 -48
WIRE -64 80 -64 -192
WIRE 256 128 256 64
WIRE 256 128 0 128
WIRE 256 144 256 128
WIRE 384 192 384 -48
WIRE 384 192 320 192
WIRE -64 272 -64 176
WIRE 256 272 256 240
WIRE 256 272 -64 272
WIRE 256 288 256 272
IOPIN -128 -368 In
IOPIN -96 -400 In
IOPIN 320 -176 In
IOPIN -480 -400 In
SYMBOL pnp 0 -224 R180
SYMATTR InstName Q4
SYMATTR Value 2N3906
SYMBOL npn 0 80 M0
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL res 240 -32 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL npn 320 144 M0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage -480 -384 R0
WINDOW 3 -625 148 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL REPEAT FOREVER (0 2 0.25m 4 0.5m 2 0.75m 0 1m 2) ENDREPEAT
SYMBOL pnp 192 -224 M180
SYMATTR InstName Q3
SYMATTR Value 2N3906
SYMBOL res 240 -160 R0
SYMATTR InstName R1
SYMATTR Value 2.2k
FLAG 256 288 0
FLAG -128 -368 W1
FLAG -96 -400 1+
FLAG 320 -176 2+
FLAG -480 -272 0
FLAG -480 -400 W1
TEXT -520 224 Left 2 !.tran 10m
TEXT -136 -552 Left 2 ;Regulator Version 1
* Z:\home\khalils\Downloads\files\data\raw_asc\56a2d4e2fe0b_Draft81.asc
* Generated by LTspice 26.0.1 for Windows.
* Note current spike 1A, for 6ns.
* fdn360p/fdn337n switch time about 1us/3.6A
* DMP/ switch time about 30ns/ 200mA.
* CMOS - compare fets. for cross-conduction
V2 VCC 0 5
XM1 N003 N001 0 DMN63D8L ;pnba D)G)S
R3 N003 0 50R
R2 VCC P001 0.01R
XM3 N004 N002 P002 FDN360P VTEMP=30 ;pnba D)G)S
R4 N004 0 50R
R5 N002 SW1 200R
R1 VCC P002 0.01R
XM2 N003 N001 P001 DMP31D7L ;pnba D)G)S
XM4 N004 N002 0 FDN337N ;pnba D)G)S
R6 N001 SW1 200R
V1 SW1 0 PULSE(0 5 1us 10ns 10ns 25us 50us 20)
.tran 1.2ms
.include my.lib
.param temperature=25
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4244 1268
WIRE 896 -304 848 -304
WIRE 1536 -304 1504 -304
WIRE 512 -224 224 -224
WIRE 1216 -224 944 -224
WIRE 1760 -224 1584 -224
WIRE 848 -144 848 -304
WIRE 896 -144 848 -144
WIRE 1504 -144 1504 -304
WIRE 1536 -144 1504 -144
SYMBOL pmos 896 -224 M180
SYMATTR InstName M2
SYMATTR Value DMP31D7L
SYMATTR Prefix X
SYMBOL res 928 -416 R0
SYMATTR InstName R2
SYMATTR Value 0.01R
SYMBOL res 864 -160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 200R
SYMBOL voltage 384 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 48 40 Left 2
SYMATTR Value 5
SYMATTR InstName V2
SYMBOL res 1568 -416 R0
SYMATTR InstName R1
SYMATTR Value 0.01R
SYMBOL res 1744 -240 R0
SYMATTR InstName R4
SYMATTR Value 50R
SYMBOL nmos 1536 -224 R0
SYMATTR InstName M4
SYMATTR Value FDN337N
SYMATTR Prefix X
SYMBOL res 1200 -240 R0
SYMATTR InstName R3
SYMATTR Value 50R
SYMBOL res 1520 -160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 200R
SYMBOL nmos 896 -224 R0
SYMATTR InstName M1
SYMATTR Value DMN63D8L
SYMATTR Prefix X
SYMBOL pmos 1536 -224 M180
SYMATTR InstName M3
SYMATTR Value FDN360P
SYMATTR Prefix X
SYMATTR Value2 VTEMP=30
SYMBOL voltage 224 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 48 40 Left 2
SYMATTR Value PULSE(0 5 1us 10ns 10ns 25us 50us 20)
SYMATTR InstName V1
FLAG 384 -16 0
FLAG 384 -96 VCC
FLAG 224 -144 0
FLAG 512 -224 SW1
FLAG 944 -400 VCC
FLAG 944 -128 0
FLAG 768 -144 SW1
FLAG 1216 -144 0
FLAG 1584 -400 VCC
FLAG 1424 -144 SW1
FLAG 1584 -128 0
FLAG 1760 -144 0
TEXT 392 -288 Left 2 !.tran 1.2ms
TEXT 512 -520 Left 2 !.include my.lib
TEXT 1024 -576 Left 2 ;Note current spike 1A, for 6ns.
TEXT 432 -456 Left 2 !.param temperature=25
TEXT 1888 -368 Left 2 ;fdn360p/fdn337n switch time about 1us/3.6A
TEXT 744 -8 Left 2 ;DMP/  switch time about 30ns/ 200mA.
TEXT 1168 -720 Left 2 ;CMOS - compare fets. for cross-conduction