Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1394.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1394.asy)
V1 +V 0 5
XU1 +V N002 N004 0 0 0 N003 N001 LT1394 ;pnba V+)In+)In-)V-)LE)GND)Q)_Q
V2 N004 0 1
V3 N002 0 pulse(0 2 0 .5m .5m 0 1m)
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 192 224 192
WIRE 544 192 496 192
WIRE -128 256 -176 256
WIRE 240 256 -48 256
WIRE 544 256 496 256
WIRE 112 320 96 320
WIRE 240 320 192 320
WIRE 512 320 496 320
WIRE -48 384 -48 368
WIRE 240 384 224 384
WIRE 512 384 496 384
WIRE -48 480 -48 464
SYMBOL voltage -32 256 R90
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value pulse(0 2 0 .5m .5m 0 1m)
SYMATTR InstName V3
SYMBOL voltage -48 368 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 208 320 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL Comparators\\LT1394 368 288 R0
SYMATTR InstName U1
FLAG -48 480 0
FLAG -48 368 +V
FLAG 224 192 +V
FLAG -176 256 0
FLAG 96 320 0
FLAG 512 320 0
FLAG 224 384 0
FLAG 512 384 0
TEXT 472 480 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3311-0.875.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N002 OUT 80n Rser=2m
V1 IN 0 3.3
Rload OUT 0 0.146
C2 N003 0 3.3n
C3 N004 0 330p
R4 N005 N004 4.99k
C1 OUT 0 47 x2
R3 OUT N001 500K
R5 N006 0 274K
XU1 IN IN N002 OUT 0 0 N006 N001 IN N005 N003 LTC3311-0.875 ;pnba Vin)EN)SW)OUT)Agnd)Pgnd)Rt)Pgood)Mode/Sync)Ith)SSTT
.tran .4m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3311-0.875.asy)
.lib LTC3311-0.875.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2648 1864
WIRE 1536 1248 1376 1248
WIRE 1712 1248 1536 1248
WIRE 1376 1264 1376 1248
WIRE 1712 1280 1712 1248
WIRE 1536 1328 1536 1248
WIRE 1552 1328 1536 1328
WIRE 1904 1328 1872 1328
WIRE 2016 1328 1984 1328
WIRE 1376 1360 1376 1344
WIRE 1536 1424 1536 1328
WIRE 1552 1424 1536 1424
WIRE 1904 1424 1872 1424
WIRE 2016 1424 2016 1328
WIRE 2016 1424 1984 1424
WIRE 2096 1424 2016 1424
WIRE 2208 1424 2096 1424
WIRE 2096 1440 2096 1424
WIRE 2208 1440 2208 1424
WIRE 1472 1520 1456 1520
WIRE 1552 1520 1536 1520
WIRE 2016 1520 2016 1424
WIRE 2016 1520 1872 1520
WIRE 2096 1536 2096 1504
WIRE 2208 1536 2208 1520
WIRE 1424 1616 1360 1616
WIRE 1552 1616 1504 1616
WIRE 1904 1616 1872 1616
WIRE 1360 1632 1360 1616
WIRE 1904 1632 1904 1616
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
WIRE 1360 1712 1360 1696
WIRE 1904 1728 1904 1712
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1376 1360 0
FLAG 2208 1536 0
FLAG 1456 1520 0
FLAG 2208 1424 OUT
FLAG 1376 1248 IN
FLAG 1360 1712 0
FLAG 2096 1536 0
FLAG 1904 1728 0
SYMBOL ind 1888 1440 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 80n
SYMATTR SpiceLine Rser=2m
SYMBOL VOLTAGE 1376 1248 R0
SYMATTR Value 3.3
SYMATTR InstName V1
SYMBOL res 2192 1424 R0
SYMATTR InstName Rload
SYMATTR Value 0.146
SYMBOL cap 1536 1504 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 3.3n
SYMBOL cap 1344 1632 R0
SYMATTR InstName C3
SYMATTR Value 330p
SYMBOL res 1520 1600 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 4.99k
SYMBOL cap 2080 1440 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 x2
SYMATTR InstName C1
SYMATTR Value 47
SYMBOL res 2000 1312 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 500K
SYMBOL res 1888 1616 R0
SYMATTR InstName R5
SYMATTR Value 274K
SYMBOL LTC3311-0.875 1712 1456 R0
SYMATTR InstName U1
TEXT 2048 1616 Left 2 !.tran .4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1762.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1762.asy)
C2 OUT N001 .01
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 10
XU1 OUT OUT N001 0 IN MP_01 MP_02 IN LT1762 ;pnba OUT)ADJ)BYP)GND)_SHDN)))IN
Rload OUT 0 500
.tran 1
.lib LT1762.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 32 304 32
WIRE 352 32 320 32
WIRE 432 32 352 32
WIRE 528 32 432 32
WIRE 0 48 -208 48
WIRE 16 48 0 48
WIRE 432 48 432 32
WIRE 528 48 528 32
WIRE -208 64 -208 48
WIRE 352 64 352 32
WIRE 320 96 320 32
WIRE 320 96 304 96
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 432 144 432 112
WIRE 528 144 528 128
WIRE -208 160 -208 144
WIRE 352 160 352 128
WIRE 352 160 304 160
WIRE 160 240 160 208
SYMBOL cap 336 64 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 416 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LT1762 160 96 R0
SYMATTR InstName U1
FLAG -208 160 0
FLAG 432 144 0
FLAG 528 144 0
FLAG 160 240 0
FLAG 528 32 OUT
FLAG -208 48 IN
TEXT 384 216 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\06986fcd7f4e_Draft1a.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 0 2
L1 N002 N003 72e-6
M1 N001 N004 N002 N002 BSC060N10NS3
D2 N002 N001 D
V1 N001 0 15
D1 0 N002 D
V2 N004 N002 PULSE(0 5 0 0 0 1e-6 2e-6)
C1 N003 0 1000e-6
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 10e-3 0 1e-9
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 -432 -80 -432
WIRE 176 -432 64 -432
WIRE -80 -352 -80 -432
WIRE -80 -352 -240 -352
WIRE 0 -352 -80 -352
WIRE 176 -352 176 -432
WIRE 176 -352 96 -352
WIRE 224 -352 176 -352
WIRE 304 -352 224 -352
WIRE 496 -352 384 -352
WIRE 720 -352 496 -352
WIRE 112 -304 80 -304
WIRE 112 -224 112 -304
WIRE -240 -208 -240 -352
WIRE 496 -208 496 -352
WIRE 720 -208 720 -352
WIRE 224 -192 224 -352
WIRE 176 -144 176 -352
WIRE 176 -144 112 -144
WIRE -240 -32 -240 -128
WIRE 224 -32 224 -128
WIRE 224 -32 -240 -32
WIRE 496 -32 496 -144
WIRE 496 -32 224 -32
WIRE 720 -32 720 -128
WIRE 720 -32 496 -32
WIRE 736 -32 720 -32
WIRE 224 0 224 -32
SYMBOL diode 208 -128 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL cap 480 -208 R0
SYMATTR InstName C1
SYMATTR Value 1000e-6
SYMBOL ind 288 -336 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 72e-6
SYMBOL diode 64 -448 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMBOL res 704 -224 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL voltage -240 -224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 112 -240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 0 0 1e-6 2e-6)
SYMBOL nmos 0 -304 R270
WINDOW 3 -196 46 Left 2
SYMATTR Value BSC060N10NS3
SYMATTR InstName M1
FLAG 224 0 0
TEXT -272 -24 Left 2 !.tran 0 10e-3 0 1e-9
* Z:\home\khalils\Downloads\files\data\raw_asc\09b13bdfce89_AD8604.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8604.asy)
Rload OUT 0 10K
R2 OUT N001 10K
V2 -V 0 -2.5
V1 +V 0 2.5
XU1 IN N001 +V -V OUT AD8604 ;pnba In+)In-)V+)V-)OUT
Vin IN 0 SINE(0 1 100K)
R1 N001 0 10K
.tran 100u
.lib AD8604.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 480 -880 464 -880
WIRE 576 -880 560 -880
WIRE 592 -880 576 -880
WIRE 688 -880 672 -880
WIRE 240 -768 240 -784
WIRE 352 -768 352 -784
WIRE 576 -768 576 -880
WIRE 592 -768 576 -768
WIRE 688 -752 688 -880
WIRE 688 -752 656 -752
WIRE 816 -752 688 -752
WIRE 592 -736 480 -736
WIRE 816 -736 816 -752
WIRE 480 -720 480 -736
WIRE 240 -672 240 -688
WIRE 352 -672 352 -688
WIRE 816 -640 816 -656
WIRE 480 -624 480 -640
SYMBOL voltage 480 -736 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100K)
SYMBOL res 800 -752 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL Opamps\\AD8604 624 -816 R0
SYMATTR InstName U1
SYMBOL voltage 352 -784 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 688 -896 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 240 -784 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 576 -896 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 240 -784 +V
FLAG 240 -672 0
FLAG 480 -624 0
FLAG 816 -752 OUT
FLAG 480 -736 IN
FLAG 624 -784 +V
FLAG 352 -784 -V
FLAG 624 -720 -V
FLAG 464 -880 0
FLAG 816 -640 0
FLAG 352 -672 0
TEXT 752 -592 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2120-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2120-2.5.asy)
C1 OUT 0 20
R1 OUT N001 100K
XU1 IN IN N002 0 0 OUT IN N001 IN IN ADP2120-2.5 ;pnba Vin)Pvin)SW)PGND)GND)FB)TRK)Pgood)Sync/Mode)EN
V1 IN 0 5
L1 N002 OUT 2.2
Rload OUT 0 2.5
.tran 1m
.lib ADP2120-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 0 48 0
WIRE 288 0 128 0
WIRE 48 16 48 0
WIRE 288 16 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 640 64 576 64
WIRE 48 112 48 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 640 144 640 64
WIRE 640 144 560 144
WIRE 704 144 640 144
WIRE 560 160 560 144
WIRE 704 160 704 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 560 256 560 224
WIRE 704 256 704 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 640 304 640 144
WIRE 640 304 416 304
WIRE 288 368 288 352
SYMBOL res 688 144 R0
SYMATTR Value 2.5
SYMATTR InstName Rload
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL ADP2120-2.5 288 272 R0
SYMATTR InstName U1
SYMBOL voltage 48 0 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 20
FLAG 560 256 0
FLAG 288 368 0
FLAG 48 112 0
FLAG 704 144 OUT
FLAG 704 256 0
FLAG 48 0 IN
TEXT 504 344 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADR4533.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR4533.asy)
S2 OUT vIN N001 0 5mA
V3 N001 0 PULSE(0 1 100u 10n 10n 0.3m 1m)
S1 0 OUT N002 0 5mA
I1 OUT 0 0mA
C2 vIN 0 1
V2 N002 0 PULSE(0 1 0.51m 10n 10n 0.3m 1m)
C1 OUT 0 1
V1 vIN 0 5
XU1 vIN 0 OUT ADR4533 ;pnba IN)GND)OUT
.tran 1m
.model 5mA SW(Ron=1 Roff=1G Vt=.5 Vh=-.2 Ilimit=5m level=2)
.lib ADR4533.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4212 1120
WIRE 2208 256 1584 256
WIRE 2208 272 2208 256
WIRE 2464 288 2256 288
WIRE 2576 288 2544 288
WIRE 2288 336 2256 336
WIRE 1584 416 1584 256
WIRE 1584 416 1488 416
WIRE 1696 416 1584 416
WIRE 2064 416 1952 416
WIRE 2208 416 2208 352
WIRE 2208 416 2064 416
WIRE 2256 416 2208 416
WIRE 2464 416 2256 416
WIRE 2576 416 2544 416
WIRE 1488 432 1488 416
WIRE 1584 464 1584 416
WIRE 2064 464 2064 416
WIRE 2208 496 2208 416
WIRE 2464 512 2256 512
WIRE 2576 512 2544 512
WIRE 1488 544 1488 512
WIRE 1584 544 1584 528
WIRE 1824 544 1824 512
WIRE 2064 544 2064 528
WIRE 2288 560 2256 560
WIRE 2208 608 2208 576
SYMBOL cap 1568 464 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL voltage 1488 416 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADR4533 1824 416 R0
SYMATTR InstName U1
SYMBOL sw 2208 368 R180
WINDOW 0 -11 104 Right 2
WINDOW 3 -15 14 Right 2
SYMATTR InstName S2
SYMATTR Value 5mA
SYMBOL current 2464 416 R270
WINDOW 0 32 40 VTop 2
WINDOW 3 60 99 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 0mA
SYMBOL voltage 2448 512 M90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 34 77 VTop 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 0.51m 10n 10n 0.3m 1m)
SYMBOL cap 2048 464 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage 2448 288 M90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 35 67 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 1 100u 10n 10n 0.3m 1m)
SYMATTR InstName V3
SYMBOL sw 2208 592 R180
WINDOW 0 -7 103 Right 2
WINDOW 3 -10 16 Right 2
SYMATTR InstName S1
SYMATTR Value 5mA
FLAG 1824 544 0
FLAG 2256 416 OUT
FLAG 1488 416 vIN
FLAG 1488 544 0
FLAG 2064 544 0
FLAG 2208 608 0
FLAG 2288 560 0
FLAG 2576 512 0
FLAG 2288 336 0
FLAG 2576 288 0
FLAG 2576 416 0
FLAG 1584 544 0
TEXT 1464 648 Left 2 !.tran 1m\n.model 5mA SW(Ron=1 Roff=1G Vt=.5 Vh=-.2 Ilimit=5m level=2)
* Z:\home\khalils\Downloads\files\data\raw_asc\0a218dff55db_1218.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Supply Current Sense
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1218.asy)
V1 +V 0 5
R2 +V N003 .2
XU1 N003 N001 +V 0 N002 NC_01 LT1218 ;pnba In+)In-)V+)V-)OUT)SHDN
MQ1 OUT N002 N001 N001 BSS84
I1 N003 0 SINE(100m 100m 1K)
R1 N001 +V 200
R3 OUT 0 20K
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 0 96 -144 96
WIRE 32 96 0 96
WIRE 128 96 112 96
WIRE 368 96 128 96
WIRE -144 112 -144 96
WIRE 0 128 0 96
WIRE -144 208 -144 192
WIRE 176 208 176 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 368 224 368 96
WIRE 320 240 224 240
WIRE 0 256 0 208
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 176 288 176 272
WIRE 480 320 368 320
WIRE 368 336 368 320
WIRE 0 368 0 352
WIRE 368 432 368 416
SYMBOL current 0 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value SINE(100m 100m 1K)
SYMBOL opamps\\LT1218 192 240 R0
SYMATTR InstName U1
SYMBOL pmos 320 320 M180
WINDOW 0 63 69 Left 2
WINDOW 3 65 35 Left 2
SYMATTR InstName Q1
SYMATTR Value BSS84
SYMBOL res 352 320 R0
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL voltage -144 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -16 112 R0
SYMATTR InstName R2
SYMATTR Value .2
FLAG -144 208 0
FLAG 176 192 +V
FLAG -144 96 +V
FLAG 0 368 0
FLAG 176 288 0
FLAG 368 432 0
FLAG 480 320 OUT
TEXT 24 416 Left 2 !.tran 3m
TEXT 88 48 Bottom 2 ;Positive Supply Current Sense
* Z:\home\khalils\Downloads\files\data\raw_asc\0be2f2ae710c_or_block.asc
* Generated by LTspice 26.0.1 for Windows.
* Power
* A
* B
* A B | Y\n-----|---\n0 0 | 0\n0 1 | 1\n1 0 | 1\n1 1 | 1
AU1 0 0 0 0 0 0 0 0 OR
V1 Vdd 0 5V
V2 A 0 PULSE(0 5 0 1p 1p 10m 20m)
V3 B 0 PULSE(0 5 0 1p 1p 20m 40m)
.tran 80m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -560 -416 -560 -448
WIRE -384 -416 -384 -448
WIRE -208 -416 -208 -448
WIRE -560 -304 -560 -336
WIRE -384 -304 -384 -336
WIRE -208 -304 -208 -336
WIRE -80 -112 -80 -160
WIRE -96 -96 -176 -96
WIRE 48 -80 -48 -80
WIRE -96 -64 -176 -64
WIRE -80 16 -80 -48
RECTANGLE Normal -496 -496 -608 -224 2
RECTANGLE Normal -320 -496 -464 -224 2
RECTANGLE Normal -144 -496 -288 -224 2
SYMBOL or -112 -48 R0
SYMATTR InstName U1
SYMBOL voltage -208 -432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 1p 1p 20m 40m)
SYMBOL voltage -384 -432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -82 -86 Left 2
SYMATTR Value PULSE(0 5 0 1p 1p 10m 20m)
SYMATTR InstName V2
SYMBOL voltage -560 -432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5V
FLAG 48 -80 out
FLAG -176 -96 A
FLAG -80 -160 Vdd
FLAG -80 16 0
FLAG -560 -304 0
FLAG -560 -448 Vdd
FLAG -384 -304 0
FLAG -384 -448 A
FLAG -176 -64 B
FLAG -208 -304 0
FLAG -208 -448 B
TEXT -592 -256 Left 2 ;Power
TEXT -408 -248 Left 2 ;A
TEXT -608 40 Left 2 !.tran 80m
TEXT -232 -248 Left 2 ;B
TEXT 256 -240 Left 2 ;A B  | Y\n-----|---\n0  0 | 0\n0  1 | 1\n1  0 | 1\n1  1 | 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4440-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4440-5.asy)
XU1 N001 0 N002 0 N003 N001 LTC4440-5 ;pnba VCC)GND)INP)TS)TG)BOOST
V2 N002 0 PULSE(0 8 0 1n 1n 1u 2u)
V1 N001 0 5
.tran 50u
.lib LTC4440-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2336 1256
WIRE 1424 -144 1104 -144
WIRE 1008 -80 976 -80
WIRE 1104 -80 1104 -144
WIRE 1104 -80 1088 -80
WIRE 1136 -80 1104 -80
WIRE 1424 -80 1424 -144
WIRE 1424 -80 1392 -80
WIRE 1136 0 976 0
WIRE 1424 0 1392 0
WIRE 976 64 976 0
WIRE 1136 80 1104 80
WIRE 1424 80 1392 80
WIRE 976 160 976 144
SYMBOL PowerProducts\\LTC4440-5 1264 0 R0
SYMATTR InstName U1
SYMBOL voltage 1104 -80 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 976 48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 8 0 1n 1n 1u 2u)
FLAG 1104 80 0
FLAG 976 -80 0
FLAG 1424 80 0
FLAG 976 160 0
TEXT 1376 176 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\MAXM17900.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAXM17900.asy)
XU1 0 IN IN NC_01 N002 OUT NC_02 NC_03 N003 N001 MAXM17900 ;pnba GND)IN)EN/UVLO)MODE)FB)OUT)_RESET)LX)SS)RT/SYNC
Rload OUT 0 50
C1 OUT 0 10 Rser=4.6m
R3 N001 0 69.8K
C2 N003 0 5.6n
V1 IN 0 12
R2 N002 0 49.9K
R1 OUT N002 261K
.tran 2m startup
.lib MAXM17900.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2328 864
WIRE 1232 240 1200 240
WIRE 1328 240 1232 240
WIRE 1392 240 1328 240
WIRE 1808 240 1712 240
WIRE 1904 240 1808 240
WIRE 1984 240 1904 240
WIRE 2016 240 1984 240
WIRE 1808 256 1808 240
WIRE 2016 256 2016 240
WIRE 1200 272 1200 240
WIRE 1328 352 1328 240
WIRE 1392 352 1328 352
WIRE 1808 352 1808 320
WIRE 1808 352 1712 352
WIRE 2016 352 2016 336
WIRE 1200 384 1200 352
WIRE 1808 384 1808 352
WIRE 1904 480 1904 240
WIRE 1392 576 1280 576
WIRE 1904 576 1904 560
WIRE 1904 576 1712 576
WIRE 1280 592 1280 576
WIRE 1904 592 1904 576
WIRE 1808 688 1712 688
WIRE 1280 704 1280 672
WIRE 1808 704 1808 688
WIRE 1904 704 1904 672
WIRE 1808 800 1808 768
SYMBOL MAXM17900 1552 464 R0
SYMATTR InstName U1
SYMBOL res 2000 240 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL res 1888 576 R0
SYMATTR InstName R2
SYMATTR Value 49.9K
SYMBOL cap 1792 256 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=4.6m
SYMBOL res 1264 576 R0
SYMATTR InstName R3
SYMATTR Value 69.8K
SYMBOL res 1888 464 R0
SYMATTR InstName R1
SYMATTR Value 261K
SYMBOL cap 1792 704 R0
SYMATTR InstName C2
SYMATTR Value 5.6n
SYMBOL voltage 1200 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 1200 384 0
FLAG 1280 704 0
FLAG 1808 384 0
FLAG 2016 352 0
FLAG 1232 240 IN
FLAG 1984 240 OUT
FLAG 1808 800 0
FLAG 1904 704 0
TEXT 1488 848 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1994.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1994.asy)
R1 N003 N002 499
V3 N001 0 SINE(0 .5 10K)
R2 N002 N001 499
XU1 N002 N004 +V N003 N006 -V +V N005 LT1994 ;pnba IN-)VOCM)V+)OUT+)OUT-)V-)SHDN)IN+
C1 N004 0 .1
V2 -V 0 -5
V1 +V 0 5
R4 N005 0 499
R3 N006 N005 499
.tran 1m
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 80 -240 80
WIRE 16 80 -32 80
WIRE 112 80 16 80
WIRE 240 80 192 80
WIRE -240 96 -240 80
WIRE 80 160 80 144
WIRE -240 192 -240 176
WIRE 16 208 16 80
WIRE 48 208 16 208
WIRE 240 208 240 80
WIRE 240 208 208 208
WIRE -64 240 -96 240
WIRE 48 240 0 240
WIRE 48 272 16 272
WIRE 240 272 208 272
WIRE -368 304 -368 288
WIRE -256 304 -256 288
WIRE 80 336 80 320
WIRE 112 336 112 320
WIRE -368 400 -368 384
WIRE -256 400 -256 384
WIRE -112 400 -160 400
WIRE 16 400 16 272
WIRE 16 400 -32 400
WIRE 112 400 16 400
WIRE 240 400 240 272
WIRE 240 400 192 400
SYMBOL res -16 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 499
SYMBOL res 208 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 499
SYMBOL voltage -368 288 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 208 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 499
SYMBOL res -16 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 499
SYMBOL cap 0 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage -256 288 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -240 80 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 .5 10K)
SYMBOL LT1994 112 240 R0
SYMATTR InstName U1
FLAG -240 192 0
FLAG -368 400 0
FLAG -256 400 0
FLAG -368 288 +V
FLAG -256 288 -V
FLAG -160 400 0
FLAG -96 240 0
FLAG 112 336 +V
FLAG 80 144 +V
FLAG 80 336 -V
TEXT 368 352 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\1929cd84c71d_nr31.asc
* Generated by LTspice 26.0.1 for Windows.
M2 NC_12 NC_13 NC_14 NC_15 pch w=12.6u l=1u
M4 NC_04 NC_05 NC_06 NC_07 nch w=2u l=1u
M3 NC_08 NC_09 NC_10 NC_11 nch w=2u l=1u
M5 NC_01 VSS NC_02 NC_03 nch w=2u l=1u
M0 NC_20 NC_21 NC_22 NC_23 pch w=12.6u l=1u
M1 NC_16 NC_17 NC_18 NC_19 pch w=12.6u l=1u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1040 1344
WIRE 224 928 224 416
WIRE 224 928 512 928
WIRE 224 416 672 416
WIRE 96 928 224 928
WIRE 160 256 672 256
WIRE 160 768 160 256
WIRE 160 768 352 768
WIRE 96 768 160 768
WIRE 736 528 736 464
WIRE 736 656 960 656
WIRE 736 656 736 624
WIRE 736 688 736 656
WIRE 576 880 576 688
WIRE 576 688 736 688
WIRE 736 1040 736 688
WIRE 416 688 576 688
WIRE 416 720 416 688
WIRE 736 368 736 304
WIRE 768 1248 768 1168
WIRE 576 1168 576 1008
WIRE 576 1168 736 1168
WIRE 416 1168 576 1168
WIRE 416 1168 416 848
WIRE 416 768 448 768
WIRE 448 848 448 768
WIRE 416 848 448 848
WIRE 736 1168 736 1136
WIRE 736 1168 768 1168
WIRE 416 848 416 816
WIRE 768 1168 768 1088
WIRE 736 1088 768 1088
WIRE 576 1008 576 976
WIRE 576 1008 608 1008
WIRE 608 1008 608 928
WIRE 576 928 608 928
WIRE 768 176 768 96
WIRE 736 416 768 416
WIRE 768 416 768 256
WIRE 736 256 768 256
WIRE 768 256 768 176
WIRE 736 208 736 176
WIRE 736 176 768 176
WIRE 768 576 768 416
WIRE 736 576 768 576
WIRE 288 576 672 576
WIRE 288 1088 288 576
WIRE 288 1088 672 1088
WIRE 96 1088 288 1088
IOPIN 960 656 Out
IOPIN 768 1248 BiDir
IOPIN 768 96 BiDir
IOPIN 96 1088 In
IOPIN 96 928 In
IOPIN 96 768 In
SYMBOL PMOS 672 416 R0
SYMATTR InstName M1
SYMATTR Value pch
SYMATTR Value2 w=12.6u l=1u
SYMBOL NMOS 672 1088 R0
SYMATTR InstName M5
SYMATTR Value nch
SYMATTR Value2 w=2u l=1u
SYMBOL NMOS 352 768 R0
SYMATTR InstName M3
SYMATTR Value nch
SYMATTR Value2 w=2u l=1u
SYMBOL NMOS 512 928 R0
SYMATTR InstName M4
SYMATTR Value nch
SYMATTR Value2 w=2u l=1u
SYMBOL PMOS 672 256 R0
SYMATTR InstName M0
SYMATTR Value pch
SYMATTR Value2 w=12.6u l=1u
SYMBOL PMOS 672 576 R0
SYMATTR InstName M2
SYMATTR Value pch
SYMATTR Value2 w=12.6u l=1u
FLAG 960 656 YB
FLAG 768 1248 VSS
FLAG 768 96 VDD
FLAG 96 1088 C
FLAG 96 928 B
FLAG 96 768 A