Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1a777516f1d7_1001S8.asc
* Generated by LTspice 26.0.1 for Windows.
* Precision Absolute Value Circuit
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001S8.asy)
R4 N003 N002 10K
R5 OUT N003 10K
D2 N004 N005 1N4148
R1 N002 N001 10K
XU2 N005 N003 +V -V OUT LT1001 ;pnba In+)In-)V+)V-)OUT
R2 N001 IN 10K
R3 N005 N001 10K
D1 N002 N004 1N4148
V2 -V 0 -15
XU1 0 N001 +V -V N004 LT1001 ;pnba In+)In-)V+)V-)OUT
V3 IN 0 SINE(0 10 100)
V1 +V 0 15
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -16 96 -128 96
WIRE 112 96 64 96
WIRE 160 96 112 96
WIRE 336 96 240 96
WIRE 384 96 336 96
WIRE 480 96 464 96
WIRE 496 96 480 96
WIRE 608 96 576 96
WIRE -128 112 -128 96
WIRE 336 128 336 96
WIRE -128 208 -128 192
WIRE 192 208 192 192
WIRE 528 208 528 192
WIRE 112 224 112 96
WIRE 160 224 112 224
WIRE 480 224 480 96
WIRE 496 224 480 224
WIRE 336 240 336 192
WIRE 336 240 224 240
WIRE 608 240 608 96
WIRE 608 240 560 240
WIRE 640 240 608 240
WIRE 160 256 144 256
WIRE 496 256 480 256
WIRE 192 288 192 272
WIRE 336 288 336 240
WIRE 528 288 528 272
WIRE -96 336 -96 320
WIRE 0 336 0 320
WIRE 112 384 112 224
WIRE 160 384 112 384
WIRE 336 384 336 352
WIRE 336 384 240 384
WIRE 480 384 480 256
WIRE 480 384 336 384
WIRE -96 432 -96 416
WIRE 0 432 0 416
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 0 320 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 80 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL diode 320 128 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage -128 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 10 100)
SYMBOL opamps\\LT1001S8 528 176 R0
SYMATTR InstName U2
SYMBOL res 256 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL opamps\\LT1001S8 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -96 320 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 480 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 592 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10K
SYMBOL diode 320 288 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
FLAG 0 432 0
FLAG 192 192 +V
FLAG 0 320 +V
FLAG 192 288 -V
FLAG -96 432 0
FLAG -96 320 -V
FLAG -128 208 0
FLAG 528 192 +V
FLAG 528 288 -V
FLAG 144 256 0
FLAG -128 96 IN
FLAG 640 240 OUT
TEXT 536 352 Left 2 !.tran 30m
TEXT 256 40 Bottom 2 ;Precision Absolute Value Circuit
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1107-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1107-5.asy)
C2 OUT 0 100 Rser=0.02
V1 IN 0 3
D1 N001 OUT MBRS140
L1 IN N001 33 Rser=0.02 Rpar=5000
XU1 IN IN N001 0 0 N002 N003 OUT LT1107 top=220K bot=73.5K ;pnba Ilim)Vin)SW1)SW2)GND)AO)SET)Sense
Rload OUT 0 30
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
.lib LT1107.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2488 1440
WIRE 1472 912 1312 912
WIRE 1600 912 1472 912
WIRE 1632 912 1600 912
WIRE 1744 912 1712 912
WIRE 1792 912 1744 912
WIRE 1920 912 1856 912
WIRE 1984 912 1920 912
WIRE 1312 928 1312 912
WIRE 1984 928 1984 912
WIRE 1472 960 1472 912
WIRE 1600 960 1600 912
WIRE 1312 1024 1312 1008
WIRE 1392 1024 1376 1024
WIRE 1744 1024 1744 912
WIRE 1744 1024 1680 1024
WIRE 1984 1024 1984 1008
WIRE 1920 1104 1920 912
WIRE 1920 1104 1680 1104
WIRE 1920 1120 1920 1104
WIRE 1392 1184 1376 1184
WIRE 1712 1184 1680 1184
WIRE 1920 1200 1920 1184
WIRE 1536 1264 1536 1248
SYMBOL VOLTAGE 1312 912 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL PowerProducts\\LT1107-5 1536 1104 R0
SYMATTR InstName U1
SYMBOL IND 1616 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL schottky 1792 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL res 1968 912 R0
SYMATTR InstName Rload
SYMATTR Value 30
SYMBOL POLCAP 1904 1120 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
FLAG 1536 1264 0
FLAG 1712 1184 0
FLAG 1920 1200 0
FLAG 1312 1024 0
FLAG 1984 1024 0
FLAG 1984 912 OUT
FLAG 1312 912 IN
TEXT 1688 1272 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8066.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8066.asy)
C1 OUT N001 2.2p
Rload OUT 0 1K
V3 N005 0 -12
XU2 N004 N001 OUT N002 N005 0 N003 N003 AD8066 ;pnba +INA)-INA)OUTA)V+)V-)+INB)-INB)OUTB
R2 OUT N001 499
R4 N004 IN 249
V1 N002 0 12
R1 N001 0 499
Vin IN 0 SINE(0 1 10Meg) Rser=50
.tran 1u
.lib AD8066.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE 240 -1056 208 -1056
WIRE 320 -1056 304 -1056
WIRE 400 -1056 320 -1056
WIRE 400 -1040 400 -1056
WIRE 96 -944 80 -944
WIRE 208 -944 208 -1056
WIRE 208 -944 176 -944
WIRE 224 -944 208 -944
WIRE 320 -944 320 -1056
WIRE 320 -944 304 -944
WIRE 400 -944 400 -960
WIRE 320 -896 320 -944
WIRE 464 -896 320 -896
WIRE 832 -896 736 -896
WIRE 832 -864 832 -896
WIRE 208 -800 208 -944
WIRE 464 -800 208 -800
WIRE 768 -800 736 -800
WIRE 832 -768 832 -784
WIRE 336 -704 112 -704
WIRE 464 -704 416 -704
WIRE 768 -704 768 -800
WIRE 768 -704 736 -704
WIRE 112 -688 112 -704
WIRE 464 -608 368 -608
WIRE 768 -608 736 -608
WIRE 112 -592 112 -608
WIRE 368 -592 368 -608
WIRE 368 -496 368 -512
SYMBOL res 320 -960 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 499
SYMBOL res 384 -1056 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL voltage 112 -704 R0
WINDOW 123 24 146 Left 2
WINDOW 39 47 45 Left 2
WINDOW 3 48 73 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR Value SINE(0 1 10Meg)
SYMATTR InstName Vin
SYMBOL res 192 -960 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 499
SYMBOL voltage 832 -880 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 432 -720 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 249
SYMBOL AD8066 608 -704 R0
SYMATTR InstName U2
SYMBOL voltage 368 -608 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V3
SYMATTR Value -12
SYMBOL cap 304 -1072 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2.2p
FLAG 112 -592 0
FLAG 400 -1056 OUT
FLAG 80 -944 0
FLAG 400 -944 0
FLAG 832 -768 0
FLAG 112 -704 IN
FLAG 368 -496 0
FLAG 768 -608 0
TEXT 552 -456 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1764-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1764-1.5.asy)
V1 IN 0 PWL(0 0 1 10)
Rload OUT 0 500
XU1 IN IN 0 OUT OUT LT1764-1.5 ;pnba _SHDN)IN)GND)OUT)Sense
C1 OUT 0 10 Rser=100m
.tran 1
.lib LT1764.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 560 48 384 48
WIRE -208 64 -208 48
WIRE 384 64 384 48
WIRE 560 64 560 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -208 160 -208 144
WIRE 384 160 384 128
WIRE 560 160 560 144
WIRE 160 240 160 208
SYMBOL res 544 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL cap 368 64 R0
WINDOW 39 24 84 Left 2
SYMATTR SpiceLine Rser=100m
SYMATTR InstName C1
SYMATTR Value 10u
SYMBOL PowerProducts\\LT1764-1.5 160 96 R0
SYMATTR InstName U1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -208 160 0
FLAG 384 160 0
FLAG 560 160 0
FLAG 160 240 0
FLAG -208 48 IN
FLAG 560 48 OUT
TEXT 376 216 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\00eeff80479d_Projeto1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 V+ 0 1.2
M1 N001 N002 Vp 0 NMOS l=120n w=120n
Idx Vp 0 1.9594519962321935e-07
I2 N003 0 4.7444254e-05
R1 N001 N003 10k
XU1 Vp N003 V+ 0 N001 opamp2 ;pnba In+)In-)V+)V-)OUT
VG N002 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VG 0.0 0.6 1e-3
.inc "C:\Users\guibe\Documents\EDAN\EDAn\Labs\modelos\modelo_130n_L120.txt"
.meas TRAN I2_avg AVG I(R1) FROM=0 TO=1m
.SUBCKT opamp2 in+ in- v+ v- out
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1468 680
WIRE 944 64 448 64
WIRE 448 128 448 64
WIRE 480 176 448 176
WIRE 400 208 144 208
WIRE 944 224 944 64
WIRE 944 224 800 224
WIRE 448 240 448 224
WIRE 480 240 480 176
WIRE 544 240 480 240
WIRE 800 240 800 224
WIRE 448 272 448 240
WIRE 944 272 944 224
WIRE 144 304 144 208
WIRE 1008 304 976 304
WIRE 1008 320 1008 304
WIRE 800 368 800 320
WIRE 864 368 800 368
WIRE 928 368 928 336
WIRE 928 368 864 368
WIRE 864 384 864 368
WIRE 144 400 144 384
WIRE 448 400 448 352
WIRE 448 400 144 400
WIRE 544 400 544 240
WIRE 544 400 448 400
WIRE 448 416 448 400
SYMBOL current 448 272 R0
SYMATTR InstName Idx
SYMATTR Value 1.9594519962321935e-07
SYMBOL voltage 144 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value 0
SYMATTR InstName VG
SYMBOL current 864 384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I2
SYMATTR Value 4.7444254e-05
SYMBOL res 784 224 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL nmos4 400 128 R0
SYMATTR InstName M1
SYMATTR Value2 l=120n w=120n
SYMBOL OpAmps\\opamp2 880 304 R270
SYMATTR InstName U1
SYMBOL voltage 1312 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.2
FLAG 448 416 0
FLAG 1008 320 0
FLAG 864 464 0
FLAG 912 304 V+
FLAG 448 240 Vp
FLAG 960 336 Vp
FLAG 1312 192 0
FLAG 1312 112 V+
TEXT 256 0 Left 2 !.dc VG 0.0 0.6 1e-3
TEXT 456 -80 Left 2 !.inc "C:\\Users\\guibe\\Documents\\EDAN\\EDAn\\Labs\\modelos\\modelo_130n_L120.txt"
TEXT 864 560 Left 2 !.meas TRAN I2_avg AVG I(R1) FROM=0 TO=1m
TEXT 776 -224 Left 2 !.SUBCKT opamp2 in+ in- v+ v- out
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1071HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1071HV.asy)
L1 IN N001 150 Rser=0.02 Rpar=5000
C1 OUT 0 500 Rser=15m
D1 N001 OUT MBRS360
V1 IN 0 5
R2 N002 0 1.24K
XU1 N003 N002 0 N001 IN LT1071 ;pnba Vc)FB)GND)SW)Vin
R3 N003 N004 1K
C2 N004 0 1
R1 OUT N002 10.7K
Rload OUT 0 24
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 20m startup
.lib LT1071.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1480
WIRE 1824 880 1616 880
WIRE 1872 880 1824 880
WIRE 1984 880 1952 880
WIRE 2032 880 1984 880
WIRE 2144 880 2096 880
WIRE 2272 880 2144 880
WIRE 2384 880 2272 880
WIRE 1616 896 1616 880
WIRE 2272 896 2272 880
WIRE 2384 896 2384 880
WIRE 1824 944 1824 880
WIRE 2144 960 2144 880
WIRE 1616 992 1616 976
WIRE 2272 992 2272 960
WIRE 2384 992 2384 976
WIRE 1984 1024 1984 880
WIRE 1984 1024 1952 1024
WIRE 2144 1088 2144 1040
WIRE 2144 1088 1952 1088
WIRE 2144 1104 2144 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2144 1200 2144 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
SYMBOL RES 2128 1088 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
SYMBOL RES 2128 944 R0
SYMATTR InstName R1
SYMATTR Value 10.7K
SYMBOL VOLTAGE 1616 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL polcap 2256 896 R0
SYMATTR InstName C1
SYMATTR Value 500
SYMATTR SpiceLine Rser=15m
SYMBOL IND 1856 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL res 2368 880 R0
SYMATTR InstName Rload
SYMATTR Value 24
SYMBOL schottky 2032 896 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL PowerProducts\\LT1071HV 1824 1088 R0
SYMATTR InstName U1
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1K
FLAG 2384 880 OUT
FLAG 2144 1200 0
FLAG 2272 992 0
FLAG 2384 992 0
FLAG 2064 1248 0
FLAG 1824 1248 0
FLAG 1616 992 0
FLAG 1616 880 IN
TEXT 2248 1232 Left 2 !.tran 20m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\145b6d545836_Current_Mirror.asc
* Generated by LTspice 26.0.1 for Windows.
* From https://hardware.buspirate.com/#programmable-power-supply-unit\nR1 R2 imbalance makes the circuit more sensitive to a higher V2.\nR5 decouples both transistors.\nD1 protects Q1 from reverse BE voltage.
R3 v1 e1 1m
R4 v2 e2 1m
V1 v1 0 10
Q2 out N001 e2 0 BC857B
R1 base 0 75k
R2 out 0 100k
V2 v2 0 PWL(0 10 1m 10 1.1m 10.01 2m 10.01 2.1m 9.99 3m 9.99 3.1m 10)
R5 N001 base 10k
Q1 base base e1 0 BC857B
D1 base v1 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 4m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1416 680
WIRE -192 -32 -208 -32
WIRE 16 -32 -192 -32
WIRE 160 -32 16 -32
WIRE 592 -32 384 -32
WIRE 608 -32 592 -32
WIRE 16 -16 16 -32
WIRE 384 -16 384 -32
WIRE 160 64 160 -32
WIRE 16 112 16 64
WIRE 384 112 384 64
WIRE 16 160 16 112
WIRE 384 160 384 112
WIRE -208 192 -208 -32
WIRE 608 192 608 -32
WIRE 112 208 80 208
WIRE 160 208 160 128
WIRE 160 208 112 208
WIRE 208 208 160 208
WIRE 320 208 288 208
WIRE 16 272 16 256
WIRE 160 272 160 208
WIRE 160 272 16 272
WIRE 384 272 384 256
WIRE 432 272 384 272
WIRE -208 288 -208 272
WIRE 16 288 16 272
WIRE 384 288 384 272
WIRE 608 288 608 272
WIRE 16 400 16 368
WIRE 192 400 16 400
WIRE 384 400 384 368
WIRE 384 400 192 400
WIRE 192 416 192 400
SYMBOL res 0 -32 R0
SYMATTR InstName R3
SYMATTR Value 1m
SYMBOL res 304 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL voltage -208 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 368 -32 R0
SYMATTR InstName R4
SYMATTR Value 1m
SYMBOL pnp 320 256 M180
SYMATTR InstName Q2
SYMATTR Value BC857B
SYMBOL pnp 80 256 R180
SYMATTR InstName Q1
SYMATTR Value BC857B
SYMBOL voltage 608 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 10 1m 10 1.1m 10.01 2m 10.01 2.1m 9.99 3m 9.99 3.1m 10)
SYMBOL diode 176 128 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 368 272 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res 0 272 R0
SYMATTR InstName R1
SYMATTR Value 75k
FLAG 192 416 0
FLAG 112 208 base
FLAG -208 288 0
FLAG -192 -32 v1
FLAG 432 272 out
FLAG 608 288 0
FLAG 592 -32 v2
FLAG 16 112 e1
FLAG 384 112 e2
TEXT -242 440 Left 2 !.tran 4m
TEXT -176 -176 Left 2 ;From https://hardware.buspirate.com/#programmable-power-supply-unit\nR1 R2 imbalance makes the circuit more sensitive to a higher V2.\nR5 decouples both transistors.\nD1 protects Q1 from reverse BE voltage.
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8551.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8551.asy)
R2 OUT N001 10K
V2 -V 0 -2.5
R1 N001 0 10K
XU1 IN N001 +V -V OUT AD8551 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 2.5
Vin IN 0 SINE(0 1 10K)
Rload OUT 0 10K
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 160 -1136 160 -1152
WIRE 272 -1136 272 -1152
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 736 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 736 -1088 736 -1104
WIRE 432 -1072 432 -1088
WIRE 160 -1040 160 -1056
WIRE 272 -1040 272 -1056
WIRE 736 -992 736 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 160 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 720 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 272 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL Opamps\\AD8551 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 432 -976 0
FLAG 736 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 736 -992 0
FLAG 160 -1152 +V
FLAG 160 -1040 0
FLAG 272 -1152 -V
FLAG 272 -1040 0
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC7050.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 12
V2 N002 0 5
V3 N005 0 PULSE(0 5 0 1n 1n 100n 1u)
L1 N001 OUT1 0.1
L2 N006 OUT2 0.1
V5 N008 0 1
R1 N003 N004 100
R2 N007 N008 100
V6 N004 0 1
C1 OUT1 0 200
C2 OUT2 0 200
Rload1 OUT1 0 100m
Rload2 OUT2 0 100m
V4 N009 0 PULSE(0 5 0 1n 1n 100n 1u)
XU1 N002 N005 N002 0 N006 N007 N009 N002 N002 IN N001 0 N003 NC_01 NC_02 LTC7050 RTon=5m RBon=1.2m OV=14.8 ;pnba VCC)PWM1)RUN1)SGND)SW2)ISNS2)PWM2)RUN2)PVCC)VIN)SW1)PGND)ISNS1)FLTB1)FLTB2
.tran 300u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC7050.asy)
.lib LTC7050.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 920 728
WIRE 192 -16 -32 -16
WIRE 560 -16 480 -16
WIRE 720 -16 640 -16
WIRE 816 -16 720 -16
WIRE -32 0 -32 -16
WIRE 720 0 720 -16
WIRE 816 0 816 -16
WIRE 160 80 48 80
WIRE 192 80 160 80
WIRE 512 80 480 80
WIRE 624 80 592 80
WIRE -32 96 -32 80
WIRE 48 96 48 80
WIRE 624 96 624 80
WIRE 720 96 720 64
WIRE 816 96 816 80
WIRE 160 176 160 80
WIRE 192 176 160 176
WIRE 48 192 48 176
WIRE 624 192 624 176
WIRE 192 272 -224 272
WIRE 560 272 480 272
WIRE 720 272 640 272
WIRE 816 272 720 272
WIRE -224 288 -224 272
WIRE 720 288 720 272
WIRE 816 288 816 272
WIRE 160 368 160 176
WIRE 192 368 160 368
WIRE 512 368 480 368
WIRE 624 368 592 368
WIRE -224 384 -224 368
WIRE 624 384 624 368
WIRE 720 384 720 352
WIRE 816 384 816 368
WIRE 192 464 -224 464
WIRE -224 480 -224 464
WIRE 624 480 624 464
WIRE 160 560 160 368
WIRE 192 560 160 560
WIRE 496 560 480 560
WIRE -224 576 -224 560
WIRE 336 624 336 608
FLAG -32 96 0
FLAG 48 192 0
FLAG -224 384 0
FLAG 624 480 0
FLAG 496 560 0
FLAG 336 624 0
FLAG 624 192 0
FLAG 720 96 0
FLAG 720 384 0
FLAG 816 96 0
FLAG 816 384 0
FLAG -224 576 0
FLAG -32 -16 IN
FLAG 816 -16 OUT1
FLAG 816 272 OUT2
SYMBOL voltage -32 -16 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL voltage 48 80 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -224 272 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 1n 1n 100n 1u)
SYMBOL ind 544 0 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 0.1
SYMBOL ind 544 288 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 0.1
SYMBOL voltage 624 368 R0
SYMATTR InstName V5
SYMATTR Value 1
SYMBOL res 496 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 496 384 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL voltage 624 80 R0
SYMATTR InstName V6
SYMATTR Value 1
SYMBOL cap 704 0 R0
SYMATTR InstName C1
SYMATTR Value 200
SYMBOL cap 704 288 R0
SYMATTR InstName C2
SYMATTR Value 200
SYMBOL res 800 -16 R0
SYMATTR InstName Rload1
SYMATTR Value 100m
SYMBOL res 800 272 R0
SYMATTR InstName Rload2
SYMATTR Value 100m
SYMBOL voltage -224 464 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 5 0 1n 1n 100n 1u)
SYMBOL LTC7050 336 272 R0
SYMATTR InstName U1
TEXT 704 568 Left 2 !.tran 300u
* Z:\home\khalils\Downloads\files\data\raw_asc\4d7afa1f6e04_1007CS.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain 1000 Amplifier with .01% Accuracy
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1007CS.asy)
R1 OUT N001 355K
R2 N001 0 365
V2 -V 0 -15
XU1 IN N001 +V -V OUT LT1007 ;pnba In+)In-)V+)V-)OUT
V3 IN 0 SINE(0 1m .01)
V1 +V 0 15
.tran 300
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 160 96 128 96
WIRE 272 96 240 96
WIRE -272 176 -272 160
WIRE -144 176 -144 160
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 272 240 272 96
WIRE 272 240 224 240
WIRE 304 240 272 240
WIRE 160 256 0 256
WIRE -272 272 -272 256
WIRE -144 272 -144 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1m .01)
SYMBOL voltage -144 160 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -272 160 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL opamps\\LT1007CS 192 176 R0
SYMATTR InstName U1
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 355K
FLAG -144 272 0
FLAG 192 192 +V
FLAG -144 160 +V
FLAG 192 288 -V
FLAG -272 272 0
FLAG -272 160 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 304 240 OUT
FLAG 0 256 IN
TEXT 232 352 Left 0 !.tran 300
TEXT 136 48 Bottom 0 ;Gain 1000 Amplifier with .01% Accuracy