Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6657-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6657-2.5.asy)
C2 IN 0 .1
C1 OUT 0 1
R1 OUT 0 250
V1 IN 0 PWL(0 0 3m 3 7m 3 10m 0)
XU1 IN IN OUT 0 LT6657-2.5 ;pnba IN)_SHDN)OUT)GND
.tran 10m
.lib LT6657.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1652 680
WIRE 208 96 -208 96
WIRE 304 96 208 96
WIRE 320 96 304 96
WIRE 656 96 608 96
WIRE 752 96 656 96
WIRE -208 112 -208 96
WIRE 208 112 208 96
WIRE 656 112 656 96
WIRE 752 112 752 96
WIRE 208 192 208 176
WIRE -208 208 -208 192
WIRE 304 208 304 96
WIRE 320 208 304 208
WIRE 656 208 656 176
WIRE 752 208 752 192
WIRE 464 272 464 256
SYMBOL voltage -208 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 3m 3 7m 3 10m 0)
SYMBOL res 736 96 R0
SYMATTR InstName R1
SYMATTR Value 250
SYMBOL LT6657-2.5 464 128 R0
WINDOW 0 0 -48 Center 2
WINDOW 3 0 48 Center 2
SYMATTR InstName U1
SYMBOL cap 192 112 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL cap 640 112 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 656 208 0
FLAG 464 272 0
FLAG -208 208 0
FLAG 752 96 OUT
FLAG 752 208 0
FLAG 208 192 0
FLAG -208 96 IN
TEXT 672 360 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADTL084.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
R2 OUT N001 10K
V2 -V 0 -15
Rload OUT 0 10K
XU1 IN N001 +V -V OUT ADTL084 ;pnba In+)In-)V+)V-)OUT
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADTL084.asy)
.lib ADTL084.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 720 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 720 -1088 720 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 720 -992 720 -1008
WIRE 432 -976 432 -992
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 720 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 720 -992 0
FLAG 256 -1056 0
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 704 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL opamps\\ADTL084 576 -1168 R0
SYMATTR InstName U1
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\147ba198650c_P1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vdd Vo1 3.2k
V2 0 Vss 1
V3 Vin1 0 SINE(0 1m 1k)
B1 N001 Vss I = 1m * limit((V(n001, 0) + 0.8)/0.0001, 0, 1)
M1 Vo1 Vin1 N001 N001 mnm
R2 Vdd Vo2 3.2k
M2 Vo2 Vin1 N001 N001 mnm
V1 Vdd 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V3 -0.3 0.3 10u
.model mpm PMOS(Kp=80u vto=-0.6 lambda=0.05 W=18u L=0.18u gamma=0 phi=0)
.model mnm NMOS(Kp=250u vto=0.6 lambda=0.05 W=18u L=0.18u gamma=0 phi=0)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 740
WIRE -160 -592 -160 -640
WIRE -160 -592 -288 -592
WIRE -48 -592 -160 -592
WIRE -288 -528 -288 -592
WIRE -48 -528 -48 -592
WIRE -288 -416 -288 -448
WIRE -288 -416 -336 -416
WIRE -48 -416 -48 -448
WIRE 0 -416 -48 -416
WIRE -288 -384 -288 -416
WIRE -48 -384 -48 -416
WIRE -400 -304 -416 -304
WIRE -336 -304 -400 -304
WIRE 64 -304 0 -304
WIRE 80 -304 64 -304
WIRE -288 -240 -288 -288
WIRE -160 -240 -288 -240
WIRE -48 -240 -48 -288
WIRE -48 -240 -160 -240
WIRE -160 -160 -160 -240
WIRE -160 -16 -160 -80
WIRE -832 384 -832 352
WIRE -832 384 -864 384
WIRE -832 496 -832 384
SYMBOL voltage -688 112 R0
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL res -64 -544 R0
SYMATTR InstName R2
SYMATTR Value 3.2k
SYMBOL bi -160 -160 R0
SYMATTR InstName B1
SYMATTR Value I = 1m * limit((V(n001, 0) + 0.8)/0.0001, 0, 1)
SYMBOL voltage -832 112 R0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL nmos 0 -384 M0
SYMATTR InstName M2
SYMATTR Value mnm
SYMBOL voltage -832 256 R0
WINDOW 3 24 44 Left 2
WINDOW 123 24 72 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 1m 1k)
SYMATTR InstName V3
SYMBOL res -304 -544 R0
SYMATTR InstName R1
SYMATTR Value 3.2k
SYMBOL nmos -336 -384 R0
SYMATTR InstName M1
SYMATTR Value mnm
FLAG -832 208 0
FLAG -688 128 0
FLAG -832 272 Vin1
FLAG -832 128 Vdd
FLAG -688 208 Vss
FLAG -400 -304 Vin1
FLAG 64 -304 Vin1
FLAG -160 -640 Vdd
FLAG -160 -16 Vss
FLAG -864 384 0
FLAG -336 -416 Vo1
FLAG 0 -416 Vo2
FLAG -832 496 Vin2
TEXT -824 -88 Left 2 !.dc V3 -0.3 0.3 10u
TEXT -560 304 Left 2 !.model mpm PMOS(Kp=80u vto=-0.6 lambda=0.05 W=18u L=0.18u gamma=0 phi=0)
TEXT -560 336 Left 2 !.model mnm NMOS(Kp=250u vto=0.6 lambda=0.05 W=18u L=0.18u gamma=0 phi=0)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1761-0.95.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N004 0 1
V1 IN 0 1.3
R2 N001 IN 50K
C3 N002 0 1
R1 OUT 0 2
C4 OUT 0 10
C2 N003 0 10n
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1761 Radj=6333.33 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1761-0.95.asy)
.lib ADP1761.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.3
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL ADP1761-0.95 224 176 R0
SYMATTR InstName U1
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\14c6d654d743_R_cMeter.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 PWL(0 -25 1m 25)
R1 N002 N001 100
Dut 0 N002 1N4148
XU1 N002 0 N001 R C capometer current=1m freq=3Meg C=.5 Q=.25 ;pnba DUT+)DUT-)bias)Resistance)Capacitance
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 1m .5m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -432 256 -432 192
WIRE -432 272 -432 256
WIRE -432 384 -432 352
WIRE -352 256 -432 256
WIRE -224 256 -272 256
WIRE -224 288 -224 256
WIRE -224 384 -432 384
WIRE -224 384 -224 352
WIRE -160 384 -224 384
WIRE -160 384 -160 320
WIRE -160 416 -160 384
WIRE -96 192 -432 192
WIRE -96 256 -224 256
WIRE -96 320 -160 320
WIRE 304 224 272 224
WIRE 304 288 272 288
SYMBOL diode -208 352 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName Dut
SYMATTR Value 1N4148
SYMBOL res -256 240 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL SpecialFunctions\\capmeter -16 224 R0
WINDOW 0 86 -48 Left 0
WINDOW 3 49 112 Left 0
SYMATTR InstName U1
SYMBOL voltage -432 256 M0
WINDOW 3 -182 147 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -15 61 Left 0
SYMATTR Value PWL(0 -25 1m 25)
SYMATTR InstName V1
FLAG -160 416 0
FLAG 304 224 R
FLAG 304 288 C
TEXT -450 450 Left 0 !.tran 0 1m .5m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3971A.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N005 0 49.9K
R2 N007 0 309K
L1 N006 OUT 4.7
R3 OUT N007 1Meg
C1 OUT 0 22
Rload OUT 0 3.84
V1 IN 0 24
D1 0 N006 DFLS220L
C2 N004 N006 .47
R5 N001 0 1Meg
R6 IN N001 5Meg
C3 N003 0 .001
C4 OUT N007 10p
XU1 OUT N004 N006 IN N001 N007 N003 N005 N002 MP_01 0 LT3971 ;pnba BD)Boost)SW)Vin)EN)FB)SS)Rt)PG))GND
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3971A.asy)
.lib LT3971.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1004 680
WIRE -48 -64 -160 -64
WIRE 400 -64 -48 -64
WIRE -160 -48 -160 -64
WIRE -48 -48 -48 -64
WIRE -160 48 -160 32
WIRE -48 48 -48 32
WIRE 80 48 -48 48
WIRE 400 48 400 -64
WIRE 400 48 368 48
WIRE -48 64 -48 48
WIRE 80 144 64 144
WIRE 592 144 368 144
WIRE -48 160 -48 144
WIRE 0 240 -32 240
WIRE 80 240 64 240
WIRE 400 240 368 240
WIRE 400 256 400 240
WIRE -16 336 -32 336
WIRE 80 336 64 336
WIRE 400 336 400 320
WIRE 400 336 368 336
WIRE 448 336 400 336
WIRE 544 336 528 336
WIRE 592 336 592 144
WIRE 592 336 544 336
WIRE 704 336 592 336
WIRE 784 336 704 336
WIRE 400 352 400 336
WIRE 544 352 544 336
WIRE 592 352 592 336
WIRE 784 352 784 336
WIRE 704 368 704 336
WIRE 80 432 64 432
WIRE 544 432 544 416
WIRE 544 432 368 432
WIRE 592 432 544 432
WIRE 400 448 400 416
WIRE 592 448 592 432
WIRE 704 448 704 432
WIRE 784 448 784 432
WIRE 592 544 592 528
FLAG 64 432 0
FLAG -32 336 0
FLAG 784 448 0
FLAG 704 448 0
FLAG 592 544 0
FLAG -160 48 0
FLAG 400 448 0
FLAG -48 160 0
FLAG -32 240 0
FLAG -160 -64 IN
FLAG 784 336 OUT
SYMBOL res 80 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 49.9K
SYMBOL res 576 432 R0
SYMATTR InstName R2
SYMATTR Value 309K
SYMBOL ind 432 352 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL res 576 336 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL cap 688 368 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 768 336 R0
SYMATTR InstName Rload
SYMATTR Value 3.84
SYMBOL voltage -160 -64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL schottky 384 416 M180
WINDOW 0 26 68 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value DFLS220L
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 384 256 R0
WINDOW 3 24 54 Left 2
SYMATTR Value .47
SYMATTR InstName C2
SYMBOL res -64 48 R0
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL res -64 -64 R0
SYMATTR InstName R6
SYMATTR Value 5Meg
SYMBOL cap 64 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL cap 528 352 R0
SYMATTR InstName C4
SYMATTR Value 10p
SYMBOL PowerProducts\\LT3971A 224 240 R0
SYMATTR InstName U1
TEXT 752 536 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7171-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7171-3.0.asy)
V1 IN 0 3.5
Rload OUT 0 5
XU1 IN OUT IN N001 OUT 0 ADM7171-3.0 ;pnba Vin)Sense)EN)SS)Vout)GND
C2 N001 0 1n
C1 OUT 0 4.7 Rser=1.5m
.tran 5m startup
.lib ADM7171-3.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL cap 80 240 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL ADM7171-3.0 224 128 R0
SYMATTR InstName U1
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.5
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 376 264 Left 2 !.tran 5m startup
* Z:\tmp\asc_dec_bjh7r6w2\055338b6f575_ADA4522-4_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
Rload OUT 0 10K
Vin IN 0 SINE(0 1 10K)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 272 -1152 272 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 272 -1056 272 -1072
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 272 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 272 -1056 0
* Z:\home\khalils\Downloads\files\data\raw_asc\0247c717ecb3_Pasatodo_Activo.asc
* Generated by LTspice 26.0.1 for Windows.
R3 Vo N001 1
XU1 N001 N002 Vo opamp Aol=100K GBW=100Meg ;pnba invin)noninvin)out
R2 N001 Vi 1
C1 N002 Vi 0.131
R1 N002 0 1
V1 Vi 0 AC 1 0
.inc opamp.sub
.ac dec 1000 0.01 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1328 680
WIRE 416 -16 368 -16
WIRE 448 -16 416 -16
WIRE 544 -16 528 -16
WIRE 560 -16 544 -16
WIRE 672 -16 640 -16
WIRE 368 0 368 -16
WIRE 544 48 544 -16
WIRE 576 48 544 48
WIRE 672 64 672 -16
WIRE 672 64 640 64
WIRE 704 64 672 64
WIRE 416 80 416 -16
WIRE 448 80 416 80
WIRE 544 80 512 80
WIRE 576 80 544 80
WIRE 368 96 368 80
WIRE 544 112 544 80
WIRE 544 224 544 192
SYMBOL res 544 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL voltage 368 -16 R0
WINDOW 123 -97 94 Left 2
WINDOW 39 0 0 Left 0
WINDOW 0 -60 14 Left 2
SYMATTR Value2 AC 1 0
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL res 656 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL Opamps\\opamp 608 0 R0
SYMATTR InstName U1
SYMATTR SpiceLine2 GBW=100Meg
SYMBOL cap 512 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.131
SYMBOL res 528 96 R0
SYMATTR InstName R1
SYMATTR Value 1
FLAG 368 96 0
FLAG 368 -16 Vi
FLAG 704 64 Vo
FLAG 544 224 0
TEXT 248 200 Left 2 !.inc opamp.sub
TEXT 248 176 Left 2 !.ac dec 1000 0.01 100
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7172-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N001 0 1n
V1 IN 0 5.5
Rload OUT 0 4
C1 OUT 0 4.7 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADM7172-5.0 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7172-5.0.asy)
.lib ADM7172-5.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 4
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADM7172-5.0 224 128 R0
SYMATTR InstName U1
TEXT 408 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\05f5df6dea2e_SolDrive6.asc
* Generated by LTspice 26.0.1 for Windows.
R2 P001 N002 11
V1 N001 0 12
M1 N002 N004 N005 N005 AP9465GEM
L1 N001 P001 {L} Rser=1
V2 N003 0 PULSE(0 5 1m 1u 1u {Duty} 5m)
R3 N005 0 1
D1 N002 N001 MBRS1100
R1 N003 N004 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 20ms 1m
.step param L list 25m 27m 29m 31m
.step param Duty list 0.5m 1m 1.5m 2m 2.5m 3m 3.5m 4m 4.5m 4.7m 5m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1196 680
WIRE 416 80 368 80
WIRE 640 80 416 80
WIRE 416 96 416 80
WIRE 368 160 368 80
WIRE 640 256 640 80
WIRE 368 272 368 224
WIRE 416 272 416 256
WIRE 416 272 368 272
WIRE 416 304 416 272
WIRE 192 336 96 336
WIRE 192 352 192 336
WIRE 224 352 192 352
WIRE 336 352 304 352
WIRE 336 384 336 352
WIRE 368 384 336 384
WIRE 416 416 416 400
WIRE 416 432 416 416
WIRE 96 496 96 416
WIRE 320 496 96 496
WIRE 416 496 320 496
WIRE 640 496 640 336
WIRE 640 496 416 496
WIRE 320 544 320 496
SYMBOL nmos 368 304 R0
SYMATTR InstName M1
SYMATTR Value AP9465GEM
SYMBOL ind 400 80 R0
SYMATTR InstName L1
SYMATTR Value {L}
SYMATTR SpiceLine Rser=1
SYMBOL voltage 96 320 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 1m 1u 1u {Duty} 5m)
SYMBOL Res 208 368 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL schottky 384 224 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS1100
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL Res 400 400 R0
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL Res 400 160 R0
SYMATTR InstName R2
SYMATTR Value 11
SYMBOL voltage 640 240 R0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 320 544 0
TEXT 368 648 Left 2 !.tran 0 20ms 1m
TEXT 368 592 Left 2 !.step param L list 25m 27m 29m 31m\n.step param  Duty list 0.5m 1m 1.5m 2m 2.5m 3m 3.5m 4m 4.5m  4.7m 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\0597132f86fb_Control_Amp_ADA4625__Experimental_.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4622.asy)
R1 CE RE 10000
R2 0 RE 46392
V1 DAC_OUT 0 0
XU1 DAC_OUT RE 5V 0 CE ADA4622 ;pnba In+)In-)V+)V-)OUT
V2 5V 0 5
.dc V1 0 3.3 0.01
.lib ADA4622.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 -48 128 -48
WIRE 288 -48 256 -48
WIRE 208 96 208 48
WIRE 128 112 128 -48
WIRE 128 112 64 112
WIRE 176 112 128 112
WIRE 288 128 288 -48
WIRE 288 128 240 128
WIRE 336 128 288 128
WIRE 176 144 64 144
WIRE 128 160 128 112
WIRE 208 208 208 160
WIRE 128 272 128 240
SYMBOL voltage -144 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -272 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL res 272 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10000
SYMBOL OpAmps\\ADA4622 208 64 R0
SYMATTR InstName U1
SYMBOL res 144 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 46392
FLAG 208 208 0
FLAG 208 48 5V
FLAG 336 128 CE
FLAG 64 144 DAC_OUT
FLAG 64 112 RE
FLAG 128 272 0
FLAG -144 64 0
FLAG -272 64 0
FLAG -272 -16 DAC_OUT
FLAG -144 -16 5V
TEXT -312 240 Left 2 !.dc V1 0 3.3 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\1aaa47e213cf_Apartado_B1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Vcc 0 12
V2 0 Vee 12
R1 N001 0 1K
RL N003 N002 4,7K
R2 Lpf N001 1K
CL N003 0 100n
XU1 N003 N001 Vcc Vee Lpf level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V3 N002 0 SINE() AC 1 0
.ac dec 100000 10 100000
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 0 224 0
WIRE 464 0 400 0
WIRE 544 0 464 0
WIRE 688 0 624 0
WIRE 224 16 224 0
WIRE 32 96 32 48
WIRE 592 160 592 144
WIRE 464 176 464 0
WIRE 560 176 464 176
WIRE 688 192 688 0
WIRE 688 192 624 192
WIRE 720 192 688 192
WIRE 336 208 224 208
WIRE 464 208 416 208
WIRE 560 208 464 208
WIRE 32 224 32 176
WIRE 32 224 -16 224
WIRE 592 240 592 224
WIRE -16 256 -16 224
WIRE 464 256 464 208
WIRE 32 288 32 224
WIRE 224 288 224 208
WIRE 464 352 464 320
WIRE 32 384 32 368
FLAG 224 368 0
FLAG 464 352 0
FLAG 224 16 0
FLAG -16 256 0
FLAG 32 48 Vcc
FLAG 592 144 Vcc
FLAG 720 192 Lpf
FLAG 32 384 Vee
FLAG 592 240 Vee
SYMBOL voltage 32 80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL voltage 32 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL res 416 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 432 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RL
SYMATTR Value 4,7K
SYMBOL res 640 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL cap 448 256 R0
SYMATTR InstName CL
SYMATTR Value 100n
SYMBOL Opamps\\UniversalOpamp2 592 192 R0
SYMATTR InstName U1
SYMBOL voltage 224 272 R0
WINDOW 3 24 96 Invisible 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE()
SYMATTR Value2 AC 1 0
TEXT 128 104 Left 2 !.ac dec 100000 10 100000
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG782.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG782.asy)
C1 N002 0 36p
V1 N003 0 PULSE(0 3 25u 1n 1n 20u)
V3 +V 0 5
V2 N001 0 3
R1 N002 0 301
XU2 N003 N002 N001 0 +V ADG782 ;pnba IN)D)S)GND)Vdd
.tran 75u
.lib ADG782.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 16 -48 -32
WIRE -144 96 -400 96
WIRE 128 96 48 96
WIRE 256 96 128 96
WIRE -512 128 -512 80
WIRE -400 128 -400 96
WIRE 128 128 128 96
WIRE 256 128 256 96
WIRE -144 160 -288 160
WIRE -512 224 -512 208
WIRE -400 224 -400 208
WIRE 128 240 128 208
WIRE 256 240 256 192
WIRE -288 272 -288 160
WIRE -48 304 -48 272
WIRE -288 416 -288 352
SYMBOL voltage -288 256 R0
WINDOW 3 24 102 Left 2
SYMATTR Value PULSE(0 3 25u 1n 1n 20u)
SYMATTR InstName V1
SYMBOL cap 240 128 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL res 112 112 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage -512 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -400 112 R0
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL ADG782 -48 144 R0
SYMATTR InstName U2
FLAG 128 240 0
FLAG 256 240 0
FLAG -48 304 0
FLAG -288 416 0
FLAG -400 224 0
FLAG -48 -32 +V
FLAG -512 224 0
FLAG -512 80 +V
TEXT -264 392 Left 2 !.tran 75u