Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1411.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input\nPin capacitance and Qinj not included\nParameter performance modeled at 15V supply\nOny one channel is modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1411.asy)
XU1 vIN vS vD v- v+ 0 ADG1411 ;pnba IN)S)D)Vss)Vdd)GND
V3 v+ 0 15
V4 v- 0 -15
R1 vD 0 301
V2 vIN 0 PULSE(0 2.5 20n 20n 20n 150m 300m)
V1 vS 0 SINE(0 5 20)
C1 vD 0 36p
.tran 1
.lib ADG1411.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 832
WIRE 256 112 240 112
WIRE 240 144 240 112
WIRE -80 224 -112 224
WIRE 112 224 0 224
WIRE 144 224 112 224
WIRE 368 224 336 224
WIRE 416 224 368 224
WIRE 528 224 416 224
WIRE 416 256 416 224
WIRE 528 256 528 224
WIRE 112 288 48 288
WIRE 144 288 112 288
WIRE -272 304 -288 304
WIRE -176 304 -192 304
WIRE -288 336 -288 304
WIRE -192 336 -192 304
WIRE 48 336 48 288
WIRE 416 352 416 336
WIRE 528 352 528 320
WIRE 304 416 304 400
WIRE 176 432 176 400
WIRE 192 432 176 432
WIRE -288 464 -288 416
WIRE -192 464 -192 416
WIRE 48 464 48 416
SYMBOL voltage 48 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 30 177 Left 2
SYMATTR Value PULSE(0 2.5 20n 20n 20n 150m 300m)
SYMATTR InstName V2
SYMBOL voltage -288 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL ADG1411 240 272 R0
SYMATTR InstName U1
SYMBOL voltage 16 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 20)
SYMBOL res 400 240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL cap 512 256 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -15
FLAG -112 224 0
FLAG 48 464 0
FLAG 416 352 0
FLAG 304 416 0
FLAG 368 224 vD
FLAG 112 224 vS
FLAG 112 288 vIN
FLAG 528 352 0
FLAG -272 304 v+
FLAG 256 112 v+
FLAG -288 464 0
FLAG -192 464 0
FLAG -176 304 v-
FLAG 192 432 v-
TEXT 80 528 Left 2 !.tran 1
TEXT -360 -40 Left 2 ;Note:\nSwitch shown for a logic 0 input\nPin capacitance and Qinj not included\nParameter performance modeled at 15V supply\nOny one channel is modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2109-2.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2109-2.3.asy)
XU1 IN IN N001 OUT 0 ADP2109-x.x Rtop=288K ;pnba Vin)EN)SW)FB)GND
C1 OUT 0 10
Rload OUT 0 5
V1 IN 0 5
L1 N001 OUT 1
.tran .5m startup
.lib ADP2109-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 144
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ADP2109-2.3 352 224 R0
SYMATTR InstName U1
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 5
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
TEXT 560 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0606629b8cc0_Fig14_2.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot log10(Id(M1))
M1 VDD VGS 0 0 N_50n l=50n w=500n
VDD VDD 0 1
VGS VGS 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VGS 0 1 1m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3172 680
WIRE 192 -160 192 -176
WIRE 192 -32 192 -80
WIRE 272 -176 192 -176
WIRE 400 -176 272 -176
WIRE 448 -256 448 -304
WIRE 448 -112 448 -160
WIRE 576 -304 448 -304
WIRE 704 -304 576 -304
WIRE 704 -224 704 -304
WIRE 704 -112 704 -144
SYMBOL nmos4 400 -256 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 192 -176 R0
WINDOW 3 37 90 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 0
SYMATTR InstName VGS
SYMBOL voltage 704 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
FLAG 448 -208 0
FLAG 704 -112 0
FLAG 576 -304 VDD
FLAG 448 -112 0
FLAG 192 -32 0
FLAG 272 -176 VGS
TEXT 304 -56 Left 0 !.dc VGS 0 1 1m
TEXT 304 -32 Left 0 !.lib cmosedu_models.txt
TEXT 216 -280 Left 0 ;Plot log10(Id(M1))
* Z:\home\khalils\Downloads\files\data\raw_asc\0abe1ff46769_Irwin_Nelms_11e_8_56_Io_4A.asc
* Generated by LTspice 26.0.1 for Windows.
I1 N004 N001 AC 2 0
R4 N004 0 1
L1 N002 0 1
C1 N003 0 1
V1 N001 N003 AC 12 0
R1 N001 N002 1
R5 N001 N005 1
R2 N003 N002 1
I2 N003 N004 AC 4 0
V2 N005 0 AC 4 0
.ac list {1/(2*pi))}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 916 680
WIRE 352 64 112 64
WIRE 592 64 352 64
WIRE 800 64 592 64
WIRE 112 96 112 64
WIRE 352 96 352 64
WIRE 592 96 592 64
WIRE 800 96 800 64
WIRE 112 208 112 176
WIRE 192 208 112 208
WIRE 352 208 352 176
WIRE 352 208 272 208
WIRE 448 208 352 208
WIRE 592 208 592 176
WIRE 592 208 528 208
WIRE 112 240 112 208
WIRE 352 256 352 208
WIRE 592 256 592 208
WIRE 800 256 800 176
WIRE 112 352 112 320
WIRE 352 352 352 320
WIRE 592 352 592 336
WIRE 800 352 800 336
SYMBOL res 576 240 R0
SYMATTR InstName R4
SYMATTR Value 1
SYMBOL ind 96 224 R0
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL res 96 80 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL voltage 352 80 R0
WINDOW 123 39 58 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 12 0
SYMBOL voltage 800 240 R0
WINDOW 123 37 87 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value ""
SYMATTR Value2 AC 4 0
SYMBOL cap 336 256 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 288 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL current 592 176 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 -110 37 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value ""
SYMATTR Value2 AC 2 0
SYMBOL current 448 208 R270
WINDOW 0 32 40 VTop 2
WINDOW 3 -32 40 VBottom 2
WINDOW 123 -60 40 VBottom 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I2
SYMATTR Value ""
SYMATTR Value2 AC 4 0
SYMBOL res 784 80 R0
SYMATTR InstName R5
SYMATTR Value 1
FLAG 112 352 0
FLAG 352 352 0
FLAG 592 352 0
FLAG 800 352 0
TEXT 80 448 Left 2 !.ac list {1/(2*pi))}
* Z:\home\khalils\Downloads\files\data\raw_asc\2f756506191d_RN-6.asc
* Generated by LTspice 26.0.1 for Windows.
R1 b 0 10
D1 b a RFN5TF6S
V1 a 0 SINE(0 14 5k)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 600u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -176 144 -208 144
WIRE -112 144 -176 144
WIRE 32 144 -48 144
WIRE 48 144 32 144
WIRE -208 192 -208 144
WIRE 48 192 48 144
WIRE -208 320 -208 272
WIRE -80 320 -208 320
WIRE 48 320 48 272
WIRE 48 320 -80 320
WIRE -80 336 -80 320
SYMBOL Misc\\signal -208 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 14 5k)
SYMBOL diode -48 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value RFN5TF6S
SYMBOL Misc\\EuropeanResistor 32 176 R0
SYMATTR InstName R1
SYMATTR Value 10
FLAG -80 336 0
FLAG -176 144 a
FLAG 32 144 b
TEXT -232 352 Left 2 !.tran 600u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4097-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4097-2.asy)
C1 OUT 0 10p
Vin IN 0 SINE(0 10m 1k)
R2 OUT N001 1k
V1 +V 0 5
R1 N001 0 1k
V2 -V 0 -5
R3 OUT 0 10k
XU1 IN N001 +V -V OUT NC_01 ADA4097-1 ;pnba In+)In-)V+)V-)OUT)SD
.tran 2m
.lib ADA4097-1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 752 -1216 624 -1216
WIRE 160 -1152 160 -1168
WIRE 272 -1152 272 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 704 -1104 608 -1104
WIRE 752 -1104 752 -1216
WIRE 752 -1104 704 -1104
WIRE 848 -1104 752 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 848 -1072 848 -1104
WIRE 560 -1056 560 -1072
WIRE 160 -1040 160 -1072
WIRE 272 -1040 272 -1072
WIRE 432 -976 432 -992
WIRE 752 -976 752 -1008
WIRE 848 -976 848 -1008
SYMBOL OpAmps\\ADA4097-2 576 -1104 R0
SYMATTR InstName U1
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 10m 1k)
SYMBOL cap 832 -1072 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 160 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 272 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 736 -1104 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 160 -1168 +V
FLAG 432 -976 0
FLAG 704 -1104 OUT
FLAG 432 -1088 IN
FLAG 560 -1136 +V
FLAG 272 -1168 -V
FLAG 560 -1056 -V
FLAG 416 -1216 0
FLAG 272 -1040 0
FLAG 160 -1040 0
FLAG 752 -976 0
FLAG 848 -976 0
TEXT 680 -936 Left 2 !.tran 2m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3531.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3531.asy)
XU1 N001 IN 0 IN N003 OUT N002 0 LTC3531 ;pnba SW1)Vin)GND)_SHDN)FB)OUT)SW2)PGND
C1 OUT 0 10
R1 OUT N003 340K
Rload OUT 0 40
R2 N003 0 200K
V1 IN 0 2
L1 N001 N002 10
.tran 500u startup
.lib LTC3531.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 96 128 96
WIRE 288 96 256 96
WIRE 128 144 128 96
WIRE 288 144 288 96
WIRE 48 224 -32 224
WIRE 64 224 48 224
WIRE 384 224 352 224
WIRE 496 224 384 224
WIRE 608 224 496 224
WIRE -32 240 -32 224
WIRE 384 240 384 224
WIRE 496 240 496 224
WIRE 608 240 608 224
WIRE -32 336 -32 320
WIRE 48 336 48 224
WIRE 64 336 48 336
WIRE 384 336 384 320
WIRE 384 336 352 336
WIRE 496 336 496 304
WIRE 608 336 608 320
WIRE 384 352 384 336
WIRE 128 432 128 416
WIRE 288 432 288 416
SYMBOL cap 480 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 368 336 R0
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL LTC3531 208 272 R0
SYMATTR InstName U1
SYMBOL res 368 224 R0
SYMATTR InstName R1
SYMATTR Value 340K
SYMBOL voltage -32 224 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL ind 160 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL res 592 224 R0
SYMATTR InstName Rload
SYMATTR Value 40
FLAG -32 336 0
FLAG 288 432 0
FLAG 384 432 0
FLAG 128 432 0
FLAG 496 336 0
FLAG 608 336 0
FLAG -32 224 IN
FLAG 608 224 OUT
TEXT 512 400 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3526LB.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3526LB.asy)
C1 OUT 0 4.7 Rser=1m
V1 IN 0 2
R1 OUT N002 1.78Meg
Rload OUT 0 16.5
L1 IN N001 4.7 Rpar=5K
XU1 N001 0 IN IN N002 OUT LTC3526LB ;pnba SW)GND)Vin)_SHDN)FB)Vout
R2 N002 0 1Meg
.tran .5m startup
.lib LTC3526LB.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 80 -144 80
WIRE 0 80 -48 80
WIRE 128 80 80 80
WIRE -144 96 -144 80
WIRE 128 128 128 80
WIRE -144 192 -144 176
WIRE -48 192 -48 80
WIRE -16 192 -48 192
WIRE 320 192 272 192
WIRE 480 192 320 192
WIRE 576 192 480 192
WIRE 320 208 320 192
WIRE 480 208 480 192
WIRE 576 208 576 192
WIRE 480 304 480 272
WIRE 576 304 576 288
WIRE -48 320 -48 192
WIRE -16 320 -48 320
WIRE 320 320 320 288
WIRE 320 320 272 320
WIRE 320 336 320 320
WIRE 128 400 128 384
WIRE 320 432 320 416
SYMBOL ind -16 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=5K
SYMBOL res 304 192 R0
SYMATTR InstName R1
SYMATTR Value 1.78Meg
SYMBOL res 304 320 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 560 192 R0
SYMATTR InstName Rload
SYMATTR Value 16.5
SYMBOL voltage -144 80 R0
SYMATTR Value 2
SYMATTR InstName V1
SYMBOL cap 464 208 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1m
SYMBOL PowerProducts\\LTC3526LB 128 256 R0
SYMATTR InstName U1
FLAG -144 192 0
FLAG 128 400 0
FLAG 320 432 0
FLAG 480 304 0
FLAG 576 304 0
FLAG -144 80 IN
FLAG 576 192 OUT
TEXT 456 376 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2b0549bdce96_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 AC 1
R1 N002 0 {R1}
C1 N002 N001 10n
.ac oct 1100 1 100E4
.step param R1 1k 100k 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 304 96 304
WIRE 368 304 320 304
WIRE 96 320 96 304
SYMBOL res 352 288 R0
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL cap 320 288 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL voltage 96 304 R0
SYMATTR InstName V1
SYMATTR Value AC 1
FLAG 96 400 0
FLAG 368 384 0
TEXT 520 328 Left 2 !.ac oct 1100 1 100E4
TEXT 528 360 Left 2 !.step param R1 1k 100k 10k
* Z:\home\khalils\Downloads\files\data\raw_asc\166bab3509f7_01_CrystalModel_10MHz_0Z_load.asc
* Generated by LTspice 26.0.1 for Windows.
Ls N002 N003 1.03450713
Cp N001 N004 3e-12
VOut N004 0 0
Vs N001 0 AC 1
Cs N003 N004 .244853759f
Rs N001 N002 65
.ac lin 1e3 9.99999Meg 10.00001Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 176 0 176
WIRE 160 176 112 176
WIRE 304 176 240 176
WIRE 416 176 368 176
WIRE 0 272 0 176
WIRE 160 272 0 272
WIRE 416 272 416 176
WIRE 416 272 224 272
WIRE 0 288 0 272
WIRE 416 288 416 272
WIRE 0 384 0 368
WIRE 416 384 416 368
SYMBOL ind 144 192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
SYMATTR InstName Ls
SYMATTR Value 1.03450713
SYMBOL voltage 0 272 R0
WINDOW 123 38 45 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName Vs
SYMATTR Value ""
SYMBOL res 16 192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName Rs
SYMATTR Value 65
SYMBOL voltage 416 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 38 48 Left 0
SYMATTR Value 0
SYMATTR InstName Out
SYMBOL cap 304 192 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName Cs
SYMATTR Value .244853759f
SYMBOL cap 160 288 R270
WINDOW 0 36 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName Cp
SYMATTR Value 3e-12
FLAG 0 384 0
FLAG 416 384 0
TEXT 8 368 Left 0 !.ac lin 1e3 9.99999Meg 10.00001Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1121-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Note Abs. Max SHDN pin voltage 6.5
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1121-3.3.asy)
C1 OUT 0 1
XU1 OUT MP_01 0 MP_02 NC_03 MP_04 MP_05 IN LT1121-3.3 ;pnba OUT))GND))_SHDN)))IN
V1 IN 0 PWL(0 0 1 10)
Rload OUT 0 100
.tran 1
.lib LT1121.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 192 -176 192
WIRE 368 192 320 192
WIRE 464 192 368 192
WIRE 368 208 368 192
WIRE 464 208 464 192
WIRE -176 224 -176 192
WIRE 368 304 368 272
WIRE 464 304 464 288
WIRE -176 352 -176 304
WIRE 176 384 176 352
SYMBOL voltage -176 208 R0
WINDOW 3 11 117 Left 2
SYMATTR Value PWL(0 0 1 10)
SYMATTR InstName V1
SYMBOL PowerProducts\\LT1121-3.3 176 240 R0
SYMATTR InstName U1
SYMBOL res 448 192 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 352 208 R0
SYMATTR InstName C1
SYMATTR Value 1u
FLAG -176 352 0
FLAG 176 384 0
FLAG 368 304 0
FLAG 464 304 0
FLAG 464 192 OUT
FLAG -176 192 IN
TEXT 392 408 Left 2 !.tran 1
TEXT -392 400 Left 2 ;Note Abs. Max SHDN pin voltage 6.5
* Z:\home\khalils\Downloads\files\data\raw_asc\3113c817ea31_5A.asc
* Generated by LTspice 26.0.1 for Windows.
* 1.1V
* 5.6W
V1 N001 0 1V
XQ1 N002 N003 0 TIP122 ;pnba C)B)E
I2 N001 N002 5A
I1 N001 N003 15mA
.lib TIP122.onsemi.lib
.tran 0 0.001 0 0.000001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -96 16 -96
WIRE 272 -96 144 -96
WIRE 144 -48 144 -96
WIRE 272 -48 272 -96
WIRE 16 128 16 -96
WIRE 272 128 272 32
WIRE 144 176 144 32
WIRE 208 176 144 176
WIRE 16 272 16 208
WIRE 112 272 16 272
WIRE 272 272 272 224
WIRE 272 272 112 272
WIRE 112 304 112 272
SYMBOL voltage 16 112 R0
SYMATTR InstName V1
SYMATTR Value 1V
SYMBOL current 144 -48 R0
SYMATTR InstName I1
SYMATTR Value 15mA
SYMBOL npn 208 128 R0
SYMATTR InstName Q1
SYMATTR Value TIP122
SYMATTR Prefix X
SYMBOL current 272 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I2
SYMATTR Value 5A
FLAG 112 304 0
TEXT 24 360 Left 2 !.lib TIP122.onsemi.lib
TEXT 16 400 Left 2 !.tran 0 0.001 0 0.000001
TEXT 280 120 Left 2 ;1.1V
TEXT 280 232 Left 2 ;5.6W
* Z:\home\khalils\Downloads\files\data\raw_asc\ab72fef28ab3_1_1.asc
* Generated by LTspice 26.0.1 for Windows.
;tran 1
D1 N001 N002 MURS120
V1 N001 0 SINE(0 10 50)
R N002 0 10k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 96 -32 96
WIRE -32 144 -32 96
WIRE 144 144 144 96
WIRE 144 240 144 208
WIRE -32 272 -32 224
WIRE 144 336 144 320
SYMBOL diode 128 144 R0
SYMATTR InstName D1
SYMATTR Value MURS120
SYMBOL res 128 224 R0
SYMATTR InstName R
SYMATTR Value 10k
SYMBOL voltage -32 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 50)
FLAG -32 272 0
FLAG 144 336 0
TEXT -64 296 Left 2 !;tran 1
TEXT -66 360 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\1f4e1ff6bc2a_1037CS.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain 1000 Amplifier with .01% Accuracy
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1037CS.asy)
V3 IN 0 SINE(0 1m 1)
V2 -V 0 -15
V1 +V 0 15
XU1 IN N001 +V -V OUT LT1037 ;pnba In+)In-)V+)V-)OUT
R2 N001 0 365
R1 OUT N001 355K
.tran 3
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 160 96 128 96
WIRE 272 96 240 96
WIRE -272 176 -272 160
WIRE -144 176 -144 160
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 272 240 272 96
WIRE 272 240 224 240
WIRE 304 240 272 240
WIRE 160 256 0 256
WIRE -272 272 -272 256
WIRE -144 272 -144 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL voltage -144 160 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -272 160 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL opamps\\LT1037CS 192 176 R0
SYMATTR InstName U1
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1m 1)
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 355K
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 365
FLAG -144 272 0
FLAG 192 192 +V
FLAG -144 160 +V
FLAG 192 288 -V
FLAG -272 272 0
FLAG -272 160 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 304 240 OUT
FLAG 0 256 IN
TEXT 232 352 Left 2 !.tran 3
TEXT 136 48 Bottom 2 ;Gain 1000 Amplifier with .01% Accuracy
* Z:\home\khalils\Downloads\files\data\raw_asc\623e7ae4d4cf_Assignment_3b__iv_.asc
* Generated by LTspice 26.0.1 for Windows.
* Negative Half Wave Rectifier Circuit (with 1microF Capacitor) (Practical)
R1 N002 0 1000
C1 N002 0 0.000001
V1 N001 0 SINE(0 5 1000) Rser=0.001
D1 N002 N001 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5ms
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 320 80 208 80
WIRE 480 80 384 80
WIRE 592 80 480 80
WIRE 208 128 208 80
WIRE 480 128 480 80
WIRE 592 144 592 80
WIRE 208 256 208 208
WIRE 304 256 208 256
WIRE 480 256 480 208
WIRE 480 256 304 256
WIRE 592 256 592 208
WIRE 592 256 480 256
WIRE 304 288 304 256
SYMBOL voltage 208 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.001
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1000)
SYMBOL diode 384 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 464 112 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL cap 576 144 R0
SYMATTR InstName C1
SYMATTR Value 0.000001
FLAG 304 288 0
TEXT 144 288 Left 2 !.tran 5ms
TEXT -24 8 Left 2 ;Negative Half Wave Rectifier Circuit (with 1microF Capacitor) (Practical)
* Z:\home\khalils\Downloads\files\data\raw_asc\1bf9cef0cbfb_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
Vdd Vdd 0 10
Vin Vin 0 PULSE(-5 5 0 0 0 2m 10m 100000)
Vss Vss 0 -10
R Vout V- 12k
R1 V+ 0 12k
D V- 0 D
R2 Vout V+ 12k
C V- 0 150n
XU1 V+ V- Vdd Vss Vout level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R_T Vt 0 12k
C_T Vt Vin 1n
I1 0 V- PULSE(0 10m 0 0 0 1n 10000 1)
D_T V+ Vt D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 10.01m 0 0.1m
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -32 16 -32
WIRE 208 -32 144 -32
WIRE 368 -32 288 -32
WIRE 16 0 16 -32
WIRE 16 96 16 64
WIRE -560 112 -560 0
WIRE -400 112 -400 0
WIRE 240 128 240 112
WIRE 64 144 -32 144
WIRE 144 144 144 -32
WIRE 144 144 64 144
WIRE 208 144 144 144
WIRE 64 160 64 144
WIRE 368 160 368 -32
WIRE 368 160 272 160
WIRE 432 160 368 160
WIRE 208 176 144 176
WIRE 240 208 240 192
WIRE -560 272 -560 192
WIRE -400 272 -400 192
WIRE -144 320 -208 320
WIRE -16 320 -80 320
WIRE 32 320 -16 320
WIRE 144 320 144 176
WIRE 144 320 96 320
WIRE 208 320 144 320
WIRE 368 320 368 160
WIRE 368 320 288 320
WIRE -208 384 -208 320
WIRE -16 384 -16 320
WIRE 144 416 144 320
WIRE -16 512 -16 464
WIRE -208 528 -208 464
WIRE 144 528 144 496
IOPIN 240 112 In
IOPIN 240 208 In
IOPIN 432 160 Out
IOPIN -560 0 Out
IOPIN -400 0 Out
SYMBOL res 304 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 12k
SYMBOL current -32 224 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value PULSE(0 10m 0 0 0 1n 10000 1)
SYMBOL OpAmps\\UniversalOpAmp2 240 160 R0
SYMATTR InstName U1
SYMBOL diode 0 0 R0
SYMATTR InstName D
SYMBOL cap 48 160 R0
SYMATTR InstName C
SYMATTR Value 150n
SYMBOL res 304 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R
SYMATTR Value 12k
SYMBOL voltage -400 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vss
SYMATTR Value -10
SYMBOL voltage -208 368 R0
WINDOW 0 -97 52 Left 2
WINDOW 3 -344 103 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(-5 5 0 0 0 2m 10m 100000)
SYMBOL cap -80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C_T
SYMATTR Value 1n
SYMBOL voltage -560 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdd
SYMATTR Value 10
SYMBOL res 128 400 R0
SYMATTR InstName R1
SYMATTR Value 12k
SYMBOL diode 96 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D_T
SYMBOL res -32 368 R0
SYMATTR InstName R_T
SYMATTR Value 12k
FLAG 64 224 0
FLAG 16 96 0
FLAG 144 528 0
FLAG -16 512 0
FLAG -208 528 0
FLAG 240 112 Vdd
FLAG 240 208 Vss
FLAG 432 160 Vout
FLAG -560 272 0
FLAG -400 272 0
FLAG -560 0 Vdd
FLAG -400 0 Vss
FLAG -32 224 0
FLAG 144 144 V-
FLAG 144 320 V+
FLAG -208 320 Vin
FLAG -16 320 Vt
TEXT -632 552 Left 2 !.tran 0 10.01m 0 0.1m