Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\31fb91408a68_Draft5.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N003 1k
XU1 N006 N004 +Vs 0 N005 LT1001 ;pnba In+)In-)V+)V-)OUT
D1 N005 Ipv 1N4148
R2 Ipv N004 3k
R3 N004 0 1k
R4 N003 N006 200
V1 +Vs 0 5
C1 N001 N003 2.5m IC = 0
D2 0 N003 D
V2 N001 N002 0.25
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 20
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE 336 96 80 96
WIRE 80 144 80 96
WIRE 336 144 336 96
WIRE 80 256 80 208
WIRE 192 256 80 256
WIRE 336 256 336 208
WIRE 336 256 272 256
WIRE 416 256 336 256
WIRE 336 288 336 256
WIRE 416 304 416 256
WIRE 336 384 336 352
WIRE 512 448 480 448
WIRE 656 464 576 464
WIRE 736 464 720 464
WIRE 752 464 736 464
WIRE 416 480 416 384
WIRE 512 480 416 480
WIRE 384 592 368 592
WIRE 480 592 480 448
WIRE 480 592 464 592
WIRE 576 592 480 592
WIRE 736 592 736 464
WIRE 736 592 656 592
WIRE 368 624 368 592
FLAG 544 432 +Vs
FLAG 544 496 0
FLAG 336 384 0
FLAG 368 624 0
FLAG 896 240 0
FLAG 896 176 +Vs
FLAG 752 464 Ipv
IOPIN 752 464 Out
SYMBOL res 176 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL OpAmps\\OP07 544 400 R0
SYMATTR InstName U1
SYMBOL diode 656 480 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 672 576 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 3k
SYMBOL res 480 576 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 400 288 R0
SYMATTR InstName R4
SYMATTR Value 200
SYMBOL Misc\\cell 896 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 320 144 R0
WINDOW 39 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 2.5m
SYMATTR SpiceLine IC =  0
SYMBOL zener 352 352 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMBOL Misc\\cell 80 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0.25
TEXT 72 648 Left 2 !.tran 20
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4411.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4411.asy)
XU1 N001 0 0 N003 N002 LTC4411 ;pnba Vin)GND)CTL)STAT)OUT
VBattery N001 0 3.6
R2 N003 N004 470K
C1 N002 0 4.7
Vcc N004 0 5
RLoad N002 0 10
.tran 1m startup
.lib LTC4411.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 144 -144 144
WIRE 320 144 272 144
WIRE 416 144 320 144
WIRE -144 160 -144 144
WIRE 320 160 320 144
WIRE 416 160 416 144
WIRE 16 224 0 224
WIRE -144 256 -144 240
WIRE 320 256 320 224
WIRE 416 256 416 240
WIRE 16 304 0 304
WIRE 320 304 272 304
WIRE 432 304 400 304
WIRE 432 320 432 304
WIRE 432 416 432 400
SYMBOL res 304 320 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 470K
SYMBOL voltage 432 304 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 5
SYMBOL cap 304 160 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL res 400 144 R0
SYMATTR InstName Load
SYMATTR Value 10
SYMBOL LTC4411 144 224 R0
SYMATTR InstName U1
SYMBOL voltage -144 144 R0
WINDOW 0 17 15 Left 2
WINDOW 3 21 97 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Battery
SYMATTR Value 3.6
FLAG 0 224 0
FLAG -144 256 0
FLAG 0 304 0
FLAG 320 256 0
FLAG 416 256 0
FLAG 432 416 0
TEXT 104 392 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3651-8.4.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3651-8.4.asy)
C2 BAT 0 100 V=6.3 Irms=3.2 Rser=0.012 Lser=0 mfg="KEMET" pn="T520V107M006ASE012" type="Tantalum"
V1 IN 0 16
XU1 NC_01 NC_02 BAT N003 N002 0 N001 0 NC_03 IN IN NC_04 IN IN IN NC_05 N004 LT3651-8.4 ;pnba NTC)_ACPR)BAT)Sense)Boost)GND)SW)Timer)_Fault)_CHRG)_SHDN)Ilim)CLP)CLN)Vin)RNG/SS)Rt
CBATT BAT 0 1m
C1 N001 N002 1
R2 N003 BAT 24m
L1 N001 N003 6.5 Rser=10m
R1 N004 0 301K
D1 BAT N002 1N5819
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 15m startup
.lib LT3651-8.4.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 -160 -64 -160
WIRE 160 -160 32 -160
WIRE 256 -160 160 -160
WIRE 384 -160 256 -160
WIRE -64 -144 -64 -160
WIRE 160 -144 160 -160
WIRE 256 -144 256 -160
WIRE 32 -80 32 -160
WIRE 48 -80 32 -80
WIRE 384 -80 384 -160
WIRE 384 -80 368 -80
WIRE -64 -48 -64 -64
WIRE 416 16 368 16
WIRE 576 16 416 16
WIRE 416 32 416 16
WIRE 576 48 576 16
WIRE 32 112 32 -80
WIRE 48 112 32 112
WIRE 416 112 416 96
WIRE 416 112 368 112
WIRE 416 128 416 112
WIRE 576 208 576 128
WIRE 576 208 368 208
WIRE 416 304 416 192
WIRE 416 304 368 304
WIRE 576 304 576 288
WIRE 576 304 416 304
WIRE 704 304 576 304
WIRE 576 320 576 304
WIRE 704 320 704 304
WIRE -48 400 -64 400
WIRE 48 400 32 400
WIRE 576 400 576 384
WIRE 704 400 704 384
WIRE 48 496 16 496
WIRE 208 576 208 560
SYMBOL cap 400 32 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -64 -160 R0
SYMATTR InstName V1
SYMATTR Value 16
SYMBOL cap 688 320 R0
SYMATTR InstName BATT
SYMATTR Value 1m
SYMBOL PowerProducts\\LT3651-8.4 208 208 R0
SYMATTR InstName U1
SYMBOL schottky 400 192 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL ind 560 32 R0
SYMATTR InstName L1
SYMATTR Value 6.5
SYMATTR SpiceLine Rser=10m
SYMBOL res 560 192 R0
SYMATTR InstName R2
SYMATTR Value 24m
SYMBOL res 48 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 301K
SYMBOL polcap 560 320 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 100
SYMATTR InstName C2
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=6.3 Irms=3.2 Rser=0.012 Lser=0 mfg="KEMET" pn="T520V107M006ASE012" type="Tantalum"
FLAG 208 576 0
FLAG 16 496 0
FLAG -64 400 0
FLAG -64 -48 0
FLAG -64 -160 IN
FLAG 704 304 BAT
FLAG 576 400 0
FLAG 704 400 0
TEXT 496 512 Left 2 !.tran 15m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2139-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2139-1.5.asy)
L1 N001 OUT 1 Rser=60m
V1 IN 0 5
XU1 IN IN N001 OUT 0 IN ADP2139-x.x Rtop=160K ;pnba Vin)EN)SW)Vout)GND)Mode
Rload OUT 0 3
C1 OUT 0 10
.tran .5m startup
.lib ADP2139-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 192 224 192 144
WIRE 208 224 192 224
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 224
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADP2139-1.5 352 224 R0
SYMATTR InstName U1
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 3
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=60m
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
TEXT 600 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\459423b66e8c_1b.asc
* Generated by LTspice 26.0.1 for Windows.
D2 vout N002 D
V1 N002 0 -1
R1 vout 0 1000
V2 N001 0 0
D1 vout N001 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -80 -32 -256 -32
WIRE 0 -32 -16 -32
WIRE 0 64 0 -32
WIRE 48 64 0 64
WIRE 128 64 48 64
WIRE -80 96 -128 96
WIRE 0 96 0 64
WIRE 0 96 -16 96
WIRE -256 160 -256 -32
WIRE -128 160 -128 96
WIRE 48 160 48 64
WIRE -256 272 -256 240
WIRE -128 272 -128 240
WIRE 48 272 48 240
IOPIN 128 64 Out
SYMBOL res 32 144 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL voltage -128 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -1
SYMBOL diode -16 -48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL voltage -256 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL diode -16 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
FLAG 48 272 0
FLAG -128 272 0
FLAG -256 272 0
FLAG 128 64 vout
TEXT -290 296 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2120-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2120-1.5.asy)
R1 OUT N001 100K
C1 OUT 0 22
Rload OUT 0 1.5
XU1 IN IN N002 0 0 OUT IN N001 IN IN ADP2120-1.5 ;pnba Vin)Pvin)SW)PGND)GND)FB)TRK)Pgood)Sync/Mode)EN
L1 N002 OUT 2.2
C2 OUT 0 10
V1 IN 0 5
.tran 1m
.lib ADP2120-1.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 0 32 0
WIRE 288 0 128 0
WIRE 32 16 32 0
WIRE 288 16 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 688 64 576 64
WIRE 32 112 32 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 624 144 560 144
WIRE 688 144 688 64
WIRE 688 144 624 144
WIRE 752 144 688 144
WIRE 560 160 560 144
WIRE 624 160 624 144
WIRE 752 160 752 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 624 224 560 224
WIRE 560 256 560 224
WIRE 752 256 752 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 688 304 688 144
WIRE 688 304 416 304
WIRE 288 368 288 352
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 736 144 R0
SYMATTR Value 1.5
SYMATTR InstName Rload
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL voltage 32 0 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADP2120-1.5 288 272 R0
SYMATTR InstName U1
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL cap 608 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C2
SYMATTR Value 10
FLAG 560 256 0
FLAG 288 368 0
FLAG 32 112 0
FLAG 752 144 OUT
FLAG 752 256 0
FLAG 32 0 IN
TEXT 504 344 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\3c3562e84cb3_BJT_character.asc
* Generated by LTspice 26.0.1 for Windows.
Vce N001 0 1
Q1 IC N003 0 0 BC547B
R1 N001 IC 62k
Vbe N002 0 0
R2 N003 N002 2k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Vbe 0 1 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 96 240 96
WIRE 320 96 256 96
WIRE 432 96 400 96
WIRE 432 128 432 96
WIRE 64 144 16 144
WIRE 176 144 144 144
WIRE 16 160 16 144
WIRE 16 288 16 240
WIRE 240 288 240 192
WIRE 432 288 432 208
SYMBOL voltage 432 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vce
SYMATTR Value 1
SYMBOL res 416 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 62k
SYMBOL voltage 16 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vbe
SYMATTR Value 0
SYMBOL res 160 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2k
SYMBOL npn 176 96 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
FLAG 432 288 0
FLAG 240 288 0
FLAG 16 288 0
FLAG 256 96 IC
TEXT 24 336 Left 2 !.dc Vbe 0 1 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG802.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
VS S 0 3
V2 IN 0 PULSE(3 0 0 10n 10n 980n 2u)
R1 D 0 47
C1 D 0 33p
XU1 +V IN D S 0 ADG802 ;pnba Vdd)IN)D)S)GND
.tran 10u
* Note:\nSwitch shown for a logic 1 input.\nPin Capacitance and Charge Injection are not included.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG802.asy)
.lib ADG802.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -368 -16 -400 -16
WIRE -272 -16 -288 -16
WIRE -240 -16 -272 -16
WIRE -32 -16 -48 -16
WIRE 0 -16 -32 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE -480 32 -480 16
WIRE 112 32 112 -16
WIRE -272 48 -368 48
WIRE -240 48 -272 48
WIRE -368 112 -368 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -480 128 -480 112
WIRE -144 176 -144 160
WIRE -368 272 -368 192
FLAG -480 128 0
FLAG -480 16 +V
FLAG -400 -16 0
FLAG -144 -112 +V
FLAG -144 176 0
FLAG -368 272 0
FLAG 0 112 0
FLAG 112 112 0
FLAG -272 -16 S
FLAG -272 48 IN
FLAG -32 -16 D
SYMBOL voltage -480 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -272 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL voltage -368 96 R0
WINDOW 3 17 129 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(3 0 0 10n 10n 980n 2u)
SYMATTR InstName V2
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 47
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 33p
SYMBOL ADG802 -144 32 R0
SYMATTR InstName U1
TEXT 64 224 Left 2 !.tran 10u
TEXT -592 -232 Left 2 ;Note:\nSwitch shown for a logic 1 input.\nPin Capacitance and Charge Injection are not included.
* Z:\home\khalils\Downloads\files\data\raw_asc\4799cabe5749_Ex8_13.asc
* Generated by LTspice 26.0.1 for Windows.
Vs Vs 0 1.7
Rs Vs Vout 1k
D1 0 Vout Diode
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.noise v(vout,0) vs dec 100 1 100G
* The waveform viewer can integrate noise over a bandwidth \nby <Ctrl-Key> + left mouse button clicking on the corresponding \ndata trace label (at the top of the waveform viewer).
.model Diode D TT=10n Rs=0 CJ0=25f
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1072 704
WIRE 240 224 240 192
WIRE 240 352 240 304
WIRE 304 192 240 192
WIRE 368 192 304 192
WIRE 544 192 448 192
WIRE 576 192 544 192
WIRE 576 224 576 192
WIRE 576 352 576 288
FLAG 240 352 0
FLAG 576 352 0
FLAG 544 192 Vout
FLAG 304 192 Vs
SYMBOL voltage 240 208 R0
WINDOW 0 -75 34 Left 0
WINDOW 3 -73 77 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vs
SYMATTR Value 1.7
SYMBOL res 352 208 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName Rs
SYMATTR Value 1k
SYMBOL diode 592 288 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D1
SYMATTR Value Diode
TEXT 240 432 Left 0 !.noise v(vout,0) vs dec 100 1 100G
TEXT 192 32 Left 0 ;The waveform viewer can integrate noise over a bandwidth \nby <Ctrl-Key> + left mouse button clicking on the corresponding \ndata trace label (at the top of the waveform viewer).
TEXT 240 408 Left 0 !.model Diode D TT=10n Rs=0 CJ0=25f
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2108-2.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2108-2.3.asy)
C1 OUT 0 10
L1 N001 OUT 1
V1 IN 0 5
Rload OUT 0 5
XU1 IN IN N001 OUT 0 ADP2108-x.x Rtop=288K ;pnba Vin)EN)SW)FB)GND
.tran .5m startup
.lib ADP2108-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 144
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL ADP2108-2.3 352 224 R0
SYMATTR InstName U1
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
TEXT 560 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\4a32ddbe0f03_ampl_op.asc
* Generated by LTspice 26.0.1 for Windows.
* https://vpayaem.ru/inf_transistor_oe.html?ysclid=m2sxfrgcad778345452
* .STEP temp list 20 50
+ BF={BF} IKF=0.3 XTB=1.5 BR=3
+ CJC=8E-12 CJE=25E-12 TR=100E-9 TF=400E-12
+ ITF=1 VTF=2 XTF=3 RB=10 RC=.3 RE=.2 Vceo=30 Icrating=800m mfg=NXP)
VCC N001 0 {VCC}
Q1 out N002 0 0 2N2222
R1 N001 out 99
R2 N001 N002 38.5k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.param BF=240
.model 2N2222 NPN(IS=1E-14 VAF=100
.param VCC=4.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 680
WIRE 240 -48 144 -48
WIRE 352 -48 240 -48
WIRE 240 -32 240 -48
WIRE 144 0 144 -48
WIRE 352 16 352 -48
WIRE 240 64 240 48
WIRE 240 80 240 64
WIRE 144 128 144 80
WIRE 176 128 144 128
WIRE 240 192 240 176
WIRE 352 192 352 96
WIRE 352 192 240 192
WIRE 240 208 240 192
SYMBOL voltage 352 0 R0
WINDOW 0 34 52 Left 2
WINDOW 3 35 93 Left 2
SYMATTR InstName VCC
SYMATTR Value {VCC}
SYMBOL npn 176 80 R0
WINDOW 3 34 50 Left 2
SYMATTR Value 2N2222
SYMATTR InstName Q1
SYMBOL res 128 -16 R0
WINDOW 3 -74 69 Left 2
SYMATTR Value 38.5k
SYMATTR InstName R2
SYMBOL res 224 -48 R0
WINDOW 3 36 61 Left 2
SYMATTR Value 99
SYMATTR InstName R1
FLAG 240 208 0
FLAG 240 64 out
TEXT 216 248 Left 2 !.op
TEXT -48 -80 Left 2 ;https://vpayaem.ru/inf_transistor_oe.html?ysclid=m2sxfrgcad778345452
TEXT 360 216 Left 2 !.param BF=240
TEXT 16 304 Left 2 !.model 2N2222 NPN(IS=1E-14 VAF=100\n+   BF={BF} IKF=0.3 XTB=1.5 BR=3\n+   CJC=8E-12 CJE=25E-12 TR=100E-9 TF=400E-12\n+   ITF=1 VTF=2 XTF=3 RB=10 RC=.3 RE=.2 Vceo=30 Icrating=800m  mfg=NXP)
TEXT 104 432 Left 2 ;.STEP temp list 20 50
TEXT 368 248 Left 2 !.param VCC=4.5
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2139-0.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2139-0.8.asy)
V1 IN 0 4
C1 OUT 0 10
XU1 IN IN N001 OUT 0 IN ADP2139-x.x Rtop=48K ;pnba Vin)EN)SW)Vout)GND)Mode
Rload OUT 0 2
L1 N001 OUT 1 Rser=60m
.tran .5m startup
.lib ADP2139-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 192 224 192 144
WIRE 208 224 192 224
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 224
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL ADP2139-0.8 352 224 R0
SYMATTR InstName U1
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 2
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=60m
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
TEXT 600 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3048-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3048-3.3.asy)
L1 IN N002 3.3 Rser=.285
XU1 N002 IN 0 N003 OUT N001 IN N001 LT3048-3.3 ;pnba SW)Vin)GND)BYP)LDOOUT)LDOIN)EN)BSTOUT
C3 OUT 0 1 Rser=10m
Rload OUT 0 82.5
C2 OUT N003 .1n
V1 IN 0 3.3
C1 N001 0 4.7
.tran 1m startup
.lib LT3048-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 48 256 48
WIRE 464 48 416 48
WIRE 256 64 256 48
WIRE 464 64 464 48
WIRE 112 128 80 128
WIRE 416 128 416 48
WIRE 416 128 400 128
WIRE 464 144 464 128
WIRE 80 224 80 208
WIRE 80 224 -32 224
WIRE 112 224 80 224
WIRE 448 224 400 224
WIRE 528 224 448 224
WIRE 608 224 528 224
WIRE -32 240 -32 224
WIRE 448 240 448 224
WIRE 528 240 528 224
WIRE 608 240 608 224
WIRE 80 320 80 224
WIRE 112 320 80 320
WIRE 448 320 448 304
WIRE 448 320 400 320
WIRE -32 336 -32 320
WIRE 528 336 528 304
WIRE 608 336 608 320
WIRE 256 400 256 384
SYMBOL cap 512 240 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMATTR SpiceLine Rser=10m
SYMBOL ind 96 224 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=.285
SYMBOL voltage -32 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL PowerProducts\\LT3048-3.3 256 224 R0
SYMATTR InstName U1
SYMBOL cap 432 240 R0
SYMATTR InstName C2
SYMATTR Value .1n
SYMBOL res 592 224 R0
SYMATTR InstName Rload
SYMATTR Value 82.5
SYMBOL cap 448 64 R0
SYMATTR InstName C1
SYMATTR Value 4.7
FLAG 256 400 0
FLAG -32 336 0
FLAG 464 144 0
FLAG 528 336 0
FLAG 608 336 0
FLAG -32 224 IN
FLAG 608 224 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7171-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7171-2.5.asy)
C1 OUT 0 4.7 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADM7171-2.5 ;pnba Vin)Sense)EN)SS)Vout)GND
C2 N001 0 1n
Rload OUT 0 4
V1 IN 0 3
.tran 5m startup
.lib ADM7171-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 4
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL ADM7171-2.5 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 5m startup
* Z:\tmp\asc_dec_bjh7r6w2\0118652cfe79_NAND_3_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
M10 N003 C 0 0 N_50n l=50n w=500n
M11 N002 B N003 0 N_50n l=50n w=500n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 6288 680
WIRE 1168 -400 912 -400
WIRE 1168 -400 1168 -416
WIRE 1168 -368 1168 -400
WIRE 1168 -256 1168 -272
WIRE 1168 -144 1168 -160
WIRE 1168 0 1168 -48
WIRE 1456 -416 1168 -416
SYMBOL nmos4 1120 -144 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M10
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 1120 -256 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M11
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
FLAG 1168 -96 0
FLAG 1168 -208 0
FLAG 1168 -320 0
FLAG 1168 0 GND
FLAG 1120 -288 A
FLAG 1120 -176 B
FLAG 1120 -64 C