* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4218-12.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N010 0 .1
MQ1 N001 N003 OUT OUT Si4410DY
V1 IN 0 12
C2 OUT 0 330
C3 N005 0 .01
XU1 MP_01 IN N006 NC_02 N009 N010 0 OUT N004 N007 N006 NC_03 N008 NC_04 N001 IN LTC4218-12 ;pnba )Vdd)UV)OV)Timer)IntVcc)GND)Source)Gate)PG)_FLT)FB)Imon)Iset)Sense-)Sense+
R1 N001 IN .002
R2 OUT N007 20K
R3 N008 0 20K
R4 N003 N004 10
R5 N004 N005 1K
C4 N009 0 .1
S1 0 OUT N002 0 SHORT
V2 N002 0 PULSE(0 1 240m 1m 1m 10m)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 600m startup
.model SHORT SW(Ron=10m Roff=1K Vt=.5 Vh=-.4)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4218-12.asy)
.lib LTC4218-12.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2240 884
WIRE 32 -256 -48 -256
WIRE 48 -256 32 -256
WIRE 160 -256 128 -256
WIRE 256 -256 160 -256
WIRE 576 -256 352 -256
WIRE 624 -256 576 -256
WIRE 672 -256 624 -256
WIRE 784 -256 672 -256
WIRE -48 -240 -48 -256
WIRE 672 -240 672 -256
WIRE 784 -240 784 -256
WIRE 1008 -224 832 -224
WIRE 1104 -224 1088 -224
WIRE 336 -192 336 -208
WIRE -48 -144 -48 -160
WIRE 672 -144 672 -176
WIRE 784 -144 784 -160
WIRE 336 -96 336 -112
WIRE 368 -96 336 -96
WIRE 464 -96 448 -96
WIRE 544 -96 528 -96
WIRE 336 -48 336 -96
WIRE 160 0 160 -256
WIRE 192 0 160 0
WIRE 576 0 576 -256
WIRE 576 0 480 0
WIRE 624 48 624 -256
WIRE 32 64 32 -256
WIRE 160 64 32 64
WIRE 192 64 160 64
WIRE 160 128 160 64
WIRE 192 128 160 128
WIRE 192 192 160 192
WIRE 624 192 624 128
WIRE 624 192 480 192
WIRE 496 256 480 256
WIRE 640 256 576 256
WIRE 160 320 160 192
WIRE 192 320 160 320
WIRE 560 320 480 320
WIRE 640 320 624 320
WIRE 496 384 480 384
WIRE 640 384 560 384
WIRE 336 464 336 432
FLAG 640 384 0
FLAG 336 464 0
FLAG 640 256 0
FLAG -48 -144 0
FLAG 544 -96 0
FLAG 640 320 0
FLAG 672 -144 0
FLAG 784 -144 0
FLAG 832 -176 0
FLAG 1104 -224 0
FLAG 784 -256 OUT
FLAG -48 -256 IN
SYMBOL cap 496 400 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL nmos 256 -208 R270
WINDOW 0 60 43 VTop 2
WINDOW 3 -12 69 VLeft 2
SYMATTR InstName Q1
SYMATTR Value Si4410DY
SYMBOL voltage -48 -256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 656 -240 R0
SYMATTR InstName C2
SYMATTR Value 330
SYMBOL cap 464 -112 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .01
SYMBOL LTC4218-12 336 192 R0
SYMATTR InstName U1
SYMBOL res 144 -272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value .002
SYMBOL res 608 32 R0
SYMATTR InstName R2
SYMATTR Value 20K
SYMBOL res 480 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL res 320 -208 R0
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL res 352 -112 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1K
SYMBOL cap 560 336 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C4
SYMATTR Value .1
SYMBOL sw 784 -144 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL voltage 992 -224 R270
WINDOW 123 -74 56 VBottom 2
WINDOW 39 -53 56 VBottom 2
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 240m 1m 1m 10m)
TEXT 776 16 Left 2 !.tran 600m startup\n.model SHORT SW(Ron=10m Roff=1K Vt=.5 Vh=-.4)