Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0c0f24846e6a_GmC.asc
* Generated by LTspice 26.0.1 for Windows.
G1 0 N001 N005 0 1m
C4 N003 0 3.6788p
G5 0 N005 N001 0 -1m
C2 N001 0 3.6788p
C1 N005 0 1.4052p
G4 0 N004 N003 0 1m
G8 0 N003 N004 0 -1m
G9 0 N004 N004 0 -1m
G10 0 N005 N005 0 -1m
G6 0 N001 N002 0 -1m
G11 0 N005 N006 0 1m
V1 N006 0 AC 1
G2 0 N002 N001 0 1m
C5 N004 0 1.4052p
G3 0 N003 N002 0 1m
C3 N002 0 4.5473p
G7 0 N002 N003 0 -1m
.ac dec 1000 1 2G
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1176 680
WIRE 288 16 240 16
WIRE 496 16 448 16
WIRE 704 16 656 16
WIRE 912 16 880 16
WIRE 192 64 192 32
WIRE 192 64 128 64
WIRE 400 64 400 32
WIRE 400 64 336 64
WIRE 608 64 608 32
WIRE 608 64 528 64
WIRE 832 64 832 32
WIRE 832 64 736 64
WIRE 1104 80 1040 80
WIRE 1104 96 1104 80
WIRE 288 112 288 16
WIRE 288 112 192 112
WIRE 496 112 496 16
WIRE 496 112 400 112
WIRE 704 112 704 16
WIRE 704 112 608 112
WIRE 912 112 912 16
WIRE 912 112 816 112
WIRE 1040 112 1040 80
WIRE 1040 112 912 112
WIRE 1056 112 1040 112
WIRE -256 128 -352 128
WIRE -96 128 -208 128
WIRE -48 128 -96 128
WIRE 64 128 -48 128
WIRE 128 128 128 64
WIRE 128 128 64 128
WIRE 144 128 128 128
WIRE 288 128 288 112
WIRE 336 128 336 64
WIRE 336 128 288 128
WIRE 352 128 336 128
WIRE 496 128 496 112
WIRE 528 128 528 64
WIRE 528 128 496 128
WIRE 560 128 528 128
WIRE 704 128 704 112
WIRE 736 128 736 64
WIRE 736 128 704 128
WIRE 768 128 736 128
WIRE 912 128 912 112
WIRE -256 144 -256 128
WIRE -96 144 -96 128
WIRE 912 144 912 128
SYMBOL g 816 96 R0
SYMATTR InstName G4
SYMATTR Value 1m
SYMBOL g 192 96 R0
SYMATTR InstName G1
SYMATTR Value 1m
SYMBOL g 192 48 R180
SYMATTR InstName G5
SYMATTR Value -1m
SYMBOL g 608 48 R180
SYMATTR InstName G7
SYMATTR Value -1m
SYMBOL g 400 48 R180
SYMATTR InstName G6
SYMATTR Value -1m
SYMBOL cap 480 128 R0
SYMATTR InstName C3
SYMATTR Value 4.5473p
SYMBOL cap 896 128 R0
SYMATTR InstName C5
SYMATTR Value 1.4052p
SYMBOL cap 688 128 R0
SYMATTR InstName C4
SYMATTR Value 3.6788p
SYMBOL g 832 48 R180
SYMATTR InstName G8
SYMATTR Value -1m
SYMBOL voltage -352 112 M0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL g -48 112 R0
SYMATTR InstName G10
SYMATTR Value -1m
SYMBOL g 400 96 R0
SYMATTR InstName G2
SYMATTR Value 1m
SYMBOL g -208 112 R0
SYMATTR InstName G11
SYMATTR Value 1m
SYMBOL g 1104 80 R0
SYMATTR InstName G9
SYMATTR Value -1m
SYMBOL cap 48 128 R0
SYMATTR InstName C1
SYMATTR Value 1.4052p
SYMBOL g 608 96 R0
SYMATTR InstName G3
SYMATTR Value 1m
SYMBOL cap 272 128 R0
SYMATTR InstName C2
SYMATTR Value 3.6788p
FLAG 144 176 0
FLAG 240 -32 0
FLAG 448 -32 0
FLAG 352 176 0
FLAG 656 -32 0
FLAG 880 -32 0
FLAG 768 176 0
FLAG 560 176 0
FLAG 192 192 0
FLAG 400 192 0
FLAG 608 192 0
FLAG 816 192 0
FLAG 832 -48 0
FLAG 608 -48 0
FLAG 400 -48 0
FLAG 192 -48 0
FLAG 64 192 0
FLAG 288 192 0
FLAG 704 192 0
FLAG 912 192 0
FLAG 496 192 0
FLAG -352 208 0
FLAG 1056 160 0
FLAG 1104 176 0
FLAG -256 192 0
FLAG -96 192 0
FLAG -208 208 0
FLAG -48 208 0
TEXT -144 256 Left 2 !.ac dec 1000 1 2G
* Z:\home\khalils\Downloads\files\data\raw_asc\7091588f3c2f_NAND.asc
* Generated by LTspice 26.0.1 for Windows.
M1 NAND A N001 N001 Sp2025P
M4 N002 B 0 0 Sp2025N
V1 N001 0 5
M3 NAND A N002 N002 Sp2025N
M2 NAND B N001 N001 Sp2025P
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 -160 128 -160
WIRE 560 -160 336 -160
WIRE 128 -96 128 -160
WIRE 336 -96 336 -160
WIRE 32 -80 16 -80
WIRE 80 -80 32 -80
WIRE 240 -80 224 -80
WIRE 288 -80 240 -80
WIRE 128 32 128 0
WIRE 224 32 128 32
WIRE 336 32 336 0
WIRE 336 32 224 32
WIRE 432 32 336 32
WIRE 32 48 -16 48
WIRE 224 64 224 32
WIRE 32 112 -16 112
WIRE 128 144 112 144
WIRE 176 144 128 144
WIRE 224 208 224 160
WIRE 128 288 112 288
WIRE 176 288 128 288
WIRE 224 352 224 304
IOPIN -16 48 In
IOPIN -16 112 In
IOPIN 432 32 Out
SYMBOL pmos 80 0 M180
SYMATTR InstName M1
SYMATTR Value Sp2025P
SYMBOL pmos 288 0 M180
SYMATTR InstName M2
SYMATTR Value Sp2025P
SYMBOL nmos 176 208 R0
SYMATTR InstName M4
SYMATTR Value Sp2025N
SYMBOL voltage 560 -176 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL nmos 176 64 R0
SYMATTR InstName M3
SYMATTR Value Sp2025N
FLAG 224 352 0
FLAG -16 48 A
FLAG -16 112 B
FLAG 128 144 A
FLAG 128 288 B
FLAG 32 -80 A
FLAG 240 -80 B
FLAG 432 32 NAND
FLAG 560 -80 0
* Z:\home\khalils\Downloads\files\data\raw_asc\121e0390bb8a_Apartado_A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
V1 Vcc 0 12
V3 Vin 0 SINE(0) AC 1 0
V2 0 Vee 12
R2 Vout N001 1000
XU1 Vin N001 Vcc Vee Vout level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R1 N001 0 1000
.ac dec 100000 10 1000000
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 680
WIRE 592 -224 528 -224
WIRE 752 -224 672 -224
WIRE 848 -224 752 -224
WIRE 992 -224 928 -224
WIRE 528 -208 528 -224
WIRE 144 -144 144 -192
WIRE 880 -80 880 -112
WIRE 752 -64 752 -224
WIRE 848 -64 752 -64
WIRE 992 -48 992 -224
WIRE 992 -48 912 -48
WIRE 1040 -48 992 -48
WIRE 848 -32 464 -32
WIRE 144 0 144 -64
WIRE 144 0 80 0
WIRE 80 16 80 0
WIRE 464 16 464 -32
WIRE 880 16 880 -16
WIRE 144 64 144 0
WIRE 464 128 464 96
WIRE 144 192 144 144
SYMBOL voltage 144 -160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL voltage 144 48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL Opamps\\UniversalOpamp2 880 -48 R0
SYMATTR InstName U1
SYMBOL res 688 -240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL voltage 464 0 R0
WINDOW 3 24 96 Invisible 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0)
SYMATTR Value2 AC 1 0
SYMATTR InstName V3
SYMBOL res 944 -240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1000
FLAG 528 -208 0
FLAG 464 128 0
FLAG 80 16 0
FLAG 144 -192 Vcc
FLAG 880 -112 Vcc
FLAG 880 16 Vee
FLAG 144 192 Vee
FLAG 464 -32 Vin
FLAG 1040 -48 Vout
TEXT 256 -152 Left 2 !.ac dec 100000 10 1000000
* Z:\home\khalils\Downloads\files\data\raw_asc\026091a8a72e_current_mirror_impedance_tf.asc
* Generated by LTspice 26.0.1 for Windows.
* .step param VDC 0 4.5 .1
* Plot V(vout#Output_impedance) to get the output impedance versus ISET.
I1 N002 0 {ISET}
Q1 N002 N002 N001 0 2N3906
V1 N001 0 5
Q2 out N002 N001 0 2N3906
VOUT out 0 {VDC} AC 1
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.step param ISET .1m 1m .01m
.param VDC=0
.TF I(VOUT) VOUT
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 64 -112 64
WIRE 272 64 64 64
WIRE 64 128 64 64
WIRE 272 128 272 64
WIRE -112 176 -112 64
WIRE 160 176 128 176
WIRE 208 176 160 176
WIRE 64 272 64 224
WIRE 160 272 160 176
WIRE 160 272 64 272
WIRE 272 304 272 224
WIRE 304 304 272 304
WIRE 64 352 64 272
WIRE 272 368 272 304
WIRE -112 464 -112 256
WIRE 64 464 64 432
WIRE 272 464 272 448
SYMBOL pnp 128 224 R180
SYMATTR InstName Q1
SYMATTR Value 2N3906
SYMBOL voltage 272 352 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName VOUT
SYMATTR Value {VDC}
SYMBOL pnp 208 224 M180
SYMATTR InstName Q2
SYMATTR Value 2N3906
SYMBOL voltage -112 160 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL current 64 352 R0
SYMATTR InstName I1
SYMATTR Value {ISET}
FLAG 64 464 0
FLAG -112 464 0
FLAG 272 464 0
FLAG 304 304 out
TEXT -504 24 Left 0 ;.step param VDC 0 4.5 .1
TEXT -504 56 Left 0 !.step param ISET .1m 1m  .01m
TEXT -504 88 Left 0 !.param VDC=0
TEXT -504 120 Left 0 !.TF I(VOUT) VOUT
TEXT -496 -16 Left 0 ;Plot V(vout#Output_impedance) to get the output impedance versus ISET.
* Z:\home\khalils\Downloads\files\data\raw_asc\78987b9b5bfc_transient_ideal.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
C1 Vc 0 2.3p
V2 N001 0 1.8
R1 N002 N003 10k
XU1 N002 Vc N001 0 Vc level2 Avol=1500 GBW=40Meg Slew=10Meg Ilimit=35m Rail=0.2 Vos=200m En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 N003 0 1.25
.tran 70n
.ic V(n002)=1
.ic V(vc)=1
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1008 680
WIRE 160 -48 -80 -48
WIRE 272 64 80 64
WIRE -80 112 -80 -48
WIRE 160 128 160 -48
WIRE 80 144 80 64
WIRE 128 144 80 144
WIRE 272 160 272 64
WIRE 272 160 192 160
WIRE 448 160 272 160
WIRE 128 176 80 176
WIRE 80 208 80 176
WIRE 160 208 160 192
WIRE 448 208 448 160
WIRE -80 224 -80 192
WIRE 448 304 448 272
WIRE 80 320 80 288
WIRE 80 432 80 400
SYMBOL voltage -80 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.8
SYMBOL res 64 192 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL OpAmps\\UniversalOpAmp2 160 160 R0
SYMATTR InstName U1
SYMATTR Value2 Avol=1500 GBW=40Meg Slew=10Meg
SYMATTR SpiceLine Ilimit=35m Rail=0.2 Vos=200m
SYMBOL voltage 80 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.25
SYMBOL cap 432 208 R0
SYMATTR InstName C1
SYMATTR Value 2.3p
FLAG 80 432 0
FLAG 160 208 0
FLAG -80 224 0
FLAG 448 304 0
FLAG 448 160 Vc
TEXT -112 456 Left 2 !.tran 70n
TEXT 360 104 Left 2 !.ic V(n002)=1
TEXT 368 64 Left 2 !.ic V(vc)=1
* Z:\tmp\asc_dec_bjh7r6w2\0af14298bf79_voltagesense_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N006 N002 1.2
J1 N001 N002 N003 2N5484
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 712
WIRE 96 -48 -416 -48
WIRE 96 0 96 -48
WIRE 48 64 0 64
WIRE 96 112 96 96
WIRE 96 256 96 192
WIRE 192 256 96 256
WIRE 304 256 256 256
WIRE 192 352 128 352
WIRE 304 352 304 256
WIRE 304 352 256 352
WIRE 128 384 128 352
WIRE 304 384 304 352
WIRE 0 480 0 64
WIRE 0 480 -416 480
WIRE 128 480 128 464
WIRE 128 480 0 480
WIRE 304 480 304 464
WIRE 304 480 128 480
SYMBOL voltage 128 368 R0
SYMATTR InstName V2
SYMATTR Value 1.2
SYMBOL njf 48 0 R0
SYMATTR InstName J1
SYMATTR Value 2N5484
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1712.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input\nParameter performance modeled at 5V single supply\nOny one channel is modeled
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1712.asy)
V3 v+ 0 5
V1 vS 0 3
V2 vIN 0 PULSE(0 3 0 10n 10n 980n 2u)
XU2 v+ 0 vIN vS vD 0 ADG1712 ;pnba VDD)VSS)IN)S)D)GND
C1 vD 0 36p
R1 vD 0 301
.tran 10u
.lib ADG1712.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 936 832
WIRE 256 96 240 96
WIRE 240 160 240 96
WIRE -80 240 -112 240
WIRE 112 240 0 240
WIRE 144 240 112 240
WIRE 384 240 336 240
WIRE 464 240 384 240
WIRE 576 240 464 240
WIRE 464 272 464 240
WIRE 576 272 576 240
WIRE 112 304 48 304
WIRE 144 304 112 304
WIRE -176 320 -192 320
WIRE -192 352 -192 320
WIRE 48 352 48 304
WIRE 464 368 464 352
WIRE 576 368 576 336
WIRE 176 448 176 416
WIRE 304 448 304 416
WIRE -192 480 -192 432
WIRE 48 480 48 432
SYMBOL cap 560 272 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage 16 240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL voltage 48 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 30 177 Left 2
SYMATTR Value PULSE(0 3 0 10n 10n 980n 2u)
SYMATTR InstName V2
SYMBOL ADG1712 240 288 R0
SYMATTR InstName U2
SYMBOL voltage -192 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 448 256 R0
SYMATTR InstName R1
SYMATTR Value 301
FLAG -112 240 0
FLAG 48 480 0
FLAG 464 368 0
FLAG 176 448 0
FLAG 384 240 vD
FLAG 112 240 vS
FLAG 112 304 vIN
FLAG 576 368 0
FLAG -192 320 v+
FLAG 240 96 v+
FLAG -192 480 0
FLAG 304 448 0
TEXT 576 512 Left 2 !.tran 10u
TEXT -256 -64 Left 2 ;Note:\nSwitch shown for a logic 0 input\nParameter performance modeled at 5V single supply\nOny one channel is modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5687R.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5687R.asy)
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
XU2 vDAC Vdd 0 vOUT AD5687R Gain=2 ;pnba Vdac)Vdd)GND)Vout
I1 0 0 100 AC 1
V1 Vdd 0 5
CLOAD vOUT 0 10n
Vdac1 NC_01 0 1.25
.tran 200u
.lib AD5687R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 272 112 192 112
WIRE 464 112 272 112
WIRE -800 144 -800 112
WIRE 272 160 272 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 100
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL AD5687R -208 112 R0
SYMATTR InstName U2
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1879.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
C1 N005 0 .001
C2 OUT 0 47
L1 N002 OUT 6.2 Rpar=1K
R1 OUT N004 80.6K
R2 N004 0 28K
R3 N006 N005 150K
C3 N008 0 47p
R4 N007 N008 150K
C4 N003 0 .002
R5 IN N003 1Meg
R6 IN N001 10K
XU1 0 N003 N004 N007 N002 N002 0 IN MP_01 MP_02 MP_03 MP_04 IN N001 0 N006 LTC1879 ;pnba SGND)Run/SS)FB)Ith)SWP)SWN)PGND)PVin)))))SVin)Pgood)Sync/Mode)PLL_LPF
Rload OUT 0 3
.tran 1.5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1879.asy)
.lib LTC1879.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 700
WIRE 0 0 -128 0
WIRE 112 0 0 0
WIRE 288 0 112 0
WIRE 416 0 288 0
WIRE -128 16 -128 0
WIRE 112 16 112 0
WIRE 0 48 0 0
WIRE 288 48 288 0
WIRE 416 48 416 0
WIRE -128 112 -128 96
WIRE 112 112 112 96
WIRE 192 112 112 112
WIRE 544 112 512 112
WIRE 576 112 544 112
WIRE 688 112 656 112
WIRE 800 112 688 112
WIRE 896 112 800 112
WIRE 688 128 688 112
WIRE 800 128 800 112
WIRE 896 128 896 112
WIRE 0 176 0 128
WIRE 192 176 0 176
WIRE 544 176 544 112
WIRE 544 176 512 176
WIRE 0 192 0 176
WIRE 800 224 800 192
WIRE 896 224 896 208
WIRE 192 240 176 240
WIRE 688 240 688 208
WIRE 688 240 512 240
WIRE 688 256 688 240
WIRE 0 272 0 256
WIRE 96 304 48 304
WIRE 192 304 176 304
WIRE 528 304 512 304
WIRE 624 304 608 304
WIRE 48 320 48 304
WIRE 624 320 624 304
WIRE 688 352 688 336
WIRE 288 384 288 368
WIRE 416 384 416 368
WIRE 48 400 48 384
WIRE 624 400 624 384
FLAG -128 112 0
FLAG 288 384 0
FLAG 48 400 0
FLAG 800 224 0
FLAG 688 352 0
FLAG 896 224 0
FLAG 896 112 OUT
FLAG 416 384 0
FLAG 624 400 0
FLAG 0 272 0
FLAG 176 240 0
FLAG -128 0 IN
SYMBOL VOLTAGE -128 0 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 32 320 R0
SYMATTR InstName C1
SYMATTR Value .001
SYMBOL polcap 784 128 R0
SYMATTR InstName C2
SYMATTR Value 47
SYMBOL ind 560 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.2
SYMATTR SpiceLine Rpar=1K
SYMBOL RES 672 112 R0
SYMATTR InstName R1
SYMATTR Value 80.6K
SYMBOL res 672 240 R0
SYMATTR InstName R2
SYMATTR Value 28K
SYMBOL res 192 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 150K
SYMBOL cap 608 320 R0
SYMATTR InstName C3
SYMATTR Value 47p
SYMBOL res 512 288 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 150K
SYMBOL cap -16 192 R0
WINDOW 3 23 54 Left 2
SYMATTR Value .002
SYMATTR InstName C4
SYMBOL res -16 32 R0
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL res 96 0 R0
SYMATTR InstName R6
SYMATTR Value 10K
SYMBOL PowerProducts\\LTC1879 352 208 R0
SYMATTR InstName U1
SYMBOL res 880 112 R0
SYMATTR InstName Rload
SYMATTR Value 3
TEXT 808 328 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0b3c7cb09f1d_CSAmp_DiffPair.asc
* Generated by LTspice 26.0.1 for Windows.
* COMMON SOURCE AMPLIFIER FOR DESIGNING DIFFERENTIAL PAIR USING LUT FROM ADT
;tran 5u
;ac dec 10 1MEG 40G
C1 vout 0 20f
vs vs 0 0.45
M2 vout vb vdd vdd pch l=0.36u w=3.42u
vgs vg 0 SINE(1.1816 10m 1meg) AC 1
Vb vb 0 1.048
M1 vout vg vs 0 nch l=0.36u w=3.6u
vdd vdd 0 1.8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include CMOS180.txt
.op
.tf V(vout) vgs
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 732
WIRE 352 64 352 16
WIRE 448 64 352 64
WIRE 352 80 352 64
WIRE 304 96 256 96
WIRE 448 128 448 64
WIRE 448 128 352 128
WIRE 32 256 32 176
WIRE 352 256 352 176
WIRE 608 256 352 256
WIRE 656 256 608 256
WIRE -256 272 -256 224
WIRE -96 272 -96 224
WIRE 352 272 352 256
WIRE -368 288 -368 256
WIRE 464 320 352 320
WIRE 608 336 608 256
WIRE 304 352 240 352
WIRE -368 416 -368 368
WIRE -256 416 -256 352
WIRE -96 416 -96 352
WIRE 32 416 32 336
WIRE 352 416 352 368
WIRE 608 432 608 400
IOPIN 240 352 In
IOPIN 656 256 In
SYMBOL nmos4 304 272 R0
WINDOW 123 55 116 Left 2
SYMATTR Value2 l=0.36u w=3.6u
SYMATTR InstName M1
SYMATTR Value nch
SYMBOL voltage -256 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vdd
SYMATTR Value 1.8
SYMBOL voltage -96 256 R0
WINDOW 3 -41 -81 VRight 2
WINDOW 123 28 97 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(1.1816 10m 1meg)
SYMATTR Value2 AC 1
SYMATTR InstName vgs
SYMBOL voltage -368 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vs
SYMATTR Value 0.45
SYMBOL cap 592 336 R0
SYMATTR InstName C1
SYMATTR Value 20f
SYMBOL pmos4 304 176 M180
WINDOW 123 120 23 Left 2
SYMATTR Value2 l=0.36u w=3.42u
SYMATTR InstName M2
SYMATTR Value pch
SYMBOL voltage 32 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vb
SYMATTR Value 1.048
FLAG -96 416 0
FLAG -256 416 0
FLAG -368 416 0
FLAG -368 256 vs
FLAG -256 224 vdd
FLAG -96 224 vg
FLAG 240 352 vg
FLAG 656 256 vout
FLAG 608 432 0
FLAG 352 16 vdd
FLAG 32 416 0
FLAG 32 176 vb
FLAG 256 96 vb
FLAG 352 416 vs
FLAG 464 320 0
TEXT -376 16 Left 2 !.include CMOS180.txt
TEXT -376 64 Left 2 !.op
TEXT -376 40 Left 2 !.tf V(vout) vgs
TEXT -376 88 Left 2 !;tran 5u
TEXT -376 -80 Left 2 ;COMMON SOURCE AMPLIFIER FOR DESIGNING DIFFERENTIAL PAIR USING LUT FROM ADT
TEXT -376 112 Left 2 !;ac dec 10 1MEG 40G
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4097-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4097-1.asy)
R1 N001 0 1k
R2 OUT N001 1k
XU1 IN N001 +V -V OUT NC_01 ADA4097-1 ;pnba In+)In-)V+)V-)OUT)SD
V1 +V 0 5
Vin IN 0 SINE(0 10m 1k)
C1 OUT 0 10p
R3 OUT 0 10k
V2 -V 0 -5
.tran 2m
.lib ADA4097-1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 752 -1216 624 -1216
WIRE 160 -1152 160 -1168
WIRE 272 -1152 272 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 704 -1104 608 -1104
WIRE 752 -1104 752 -1216
WIRE 752 -1104 704 -1104
WIRE 848 -1104 752 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 848 -1072 848 -1104
WIRE 560 -1056 560 -1072
WIRE 160 -1040 160 -1072
WIRE 272 -1040 272 -1072
WIRE 432 -976 432 -992
WIRE 752 -976 752 -1008
WIRE 848 -976 848 -1008
SYMBOL OpAmps\\ADA4097-1 576 -1104 R0
SYMATTR InstName U1
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL cap 832 -1072 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 160 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 272 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 736 -1104 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 10m 1k)
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 160 -1168 +V
FLAG 432 -976 0
FLAG 704 -1104 OUT
FLAG 432 -1088 IN
FLAG 560 -1136 +V
FLAG 272 -1168 -V
FLAG 560 -1056 -V
FLAG 416 -1216 0
FLAG 272 -1040 0
FLAG 160 -1040 0
FLAG 752 -976 0
FLAG 848 -976 0
TEXT 680 -936 Left 2 !.tran 2m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1004-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1004-2.5.asy)
V1 N001 0 PULSE(0 5 100u 10n 10n 500u 1)
R1 OUT N001 24K
XU1 OUT 0 LT1004-2.5 ;pnba VOUT)GND
.tran 700u
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 980 680
WIRE 96 112 -144 112
WIRE 368 112 176 112
WIRE -144 128 -144 112
WIRE 368 128 368 112
WIRE 368 208 368 192
WIRE -144 224 -144 208
SYMBOL voltage -144 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 100u 10n 10n 500u 1)
SYMBOL LT1004-2.5 368 160 R0
SYMATTR InstName U1
SYMBOL res 192 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 24K
FLAG 368 208 0
FLAG -144 224 0
FLAG 368 112 OUT
TEXT 384 304 Left 2 !.tran 700u
* Z:\home\khalils\Downloads\files\data\raw_asc\384e5114feef_Pranala_Luar_-_Clipper_Circuit_Simulation_in_LTspice.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N004 N005 1k
V3 N005 0 4
R1 N002 0 1k
V2 N003 0 SINE(0 8 1k)
V1 N001 0 SINE(0 8 1k)
D1 N002 N001 D
D2 N004 N003 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model Diode D(Ron=1 Roff=1Meg Vfwd=1 Vrev=2)
.tran 5ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 32 -32 32
WIRE 144 32 96 32
WIRE 416 32 352 32
WIRE 544 32 480 32
WIRE -32 48 -32 32
WIRE 144 48 144 32
WIRE 352 48 352 32
WIRE 544 48 544 32
WIRE -32 144 -32 128
WIRE 64 144 -32 144
WIRE 144 144 144 128
WIRE 144 144 64 144
WIRE 64 160 64 144
WIRE 544 160 544 128
WIRE 352 240 352 128
WIRE 448 240 352 240
WIRE 544 240 448 240
WIRE 448 256 448 240
SYMBOL voltage 544 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 4
SYMBOL res 128 32 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 352 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 8 1k)
SYMBOL diode 480 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMBOL res 528 32 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL diode 96 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 8 1k)
FLAG 64 160 0
FLAG 448 256 0
TEXT -208 -48 Left 2 !.model Diode D(Ron=1 Roff=1Meg Vfwd=1 Vrev=2)
TEXT 160 136 Left 2 !.tran 5ms