Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1559205db2ee_Fig20_13.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Is(M4P) and Id(M2N)
M3N N001 N001 VDD VDD P_1u l=2u w=30u
M2N VDD N002 0 0 N_1u l=2u w=10u
M4P 0 N001 VDD VDD P_1u l=2u w=30u
M1N N001 N001 0 0 N_1u l=270u w=10u
VDD VDD 0 5
M1P N002 N002 0 0 N_1u l=2u w=10u
M3P N002 N002 VDD VDD P_1u l=90u w=10u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.dc vdd 4.5 5.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1296 680
WIRE 592 -32 576 -32
WIRE 624 -32 592 -32
WIRE 1056 -32 1040 -32
WIRE 288 -16 288 -48
WIRE 288 0 288 -16
WIRE 528 64 528 48
WIRE 592 64 592 -32
WIRE 592 64 528 64
WIRE 992 64 992 48
WIRE 1056 64 1056 -32
WIRE 1056 64 992 64
WIRE 528 96 528 64
WIRE 992 96 992 64
WIRE 1136 96 1136 -48
WIRE 592 176 592 64
WIRE 592 176 576 176
WIRE 1056 176 1056 64
WIRE 1056 176 1040 176
WIRE 1088 176 1056 176
WIRE 528 224 528 192
WIRE 672 224 672 48
WIRE 992 224 992 192
WIRE 1136 224 1136 192
SYMBOL voltage 288 -16 R0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL pmos4 1040 48 R180
WINDOW 0 63 16 Left 2
WINDOW 123 56 100 Left 2
SYMATTR InstName M3P
SYMATTR Value2 l=90u w=10u
SYMATTR Value P_1u
SYMBOL nmos4 1088 96 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M2N
SYMATTR Value N_1u
SYMBOL nmos4 1040 96 M0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M1P
SYMATTR Value N_1u
SYMBOL nmos4 576 96 M0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=270u w=10u
SYMATTR InstName M1N
SYMATTR Value N_1u
SYMBOL pmos4 624 48 M180
WINDOW 0 64 16 Left 2
WINDOW 123 56 100 Left 2
SYMATTR InstName M4P
SYMATTR Value2 l=2u w=30u
SYMATTR Value P_1u
SYMBOL pmos4 576 48 R180
WINDOW 0 63 16 Left 2
WINDOW 123 56 100 Left 2
SYMATTR InstName M3N
SYMATTR Value2 l=2u w=30u
SYMATTR Value P_1u
FLAG 288 80 0
FLAG 288 -16 VDD
FLAG 528 0 VDD
FLAG 672 0 VDD
FLAG 528 -48 VDD
FLAG 672 -48 VDD
FLAG 528 224 0
FLAG 672 224 0
FLAG 528 144 0
FLAG 992 0 VDD
FLAG 992 -48 VDD
FLAG 992 224 0
FLAG 1136 224 0
FLAG 992 144 0
FLAG 1136 144 0
FLAG 1136 -48 VDD
TEXT 584 296 Left 2 !.include cmosedu_models.txt
TEXT 592 -136 Left 2 ;Plot Is(M4P) and Id(M2N)
TEXT 584 272 Left 2 !.dc vdd 4.5 5.5
* Z:\home\khalils\Downloads\files\data\raw_asc\1ef1e289887b_2qSwMotorCc_Freno.asc
* Generated by LTspice 26.0.1 for Windows.
D3 0 N006 MURS320
Q2 0 N004 N006 0 BD244A
D1 N004 N006 MURS320
Vcc N001 0 13
Lmotor N006 0 100m Rser=.1
Vctrl N005 0 PULSE(0 1 0 250m 250m 0 .5)
S1 N002 N001 N005 0 SW
R3 N004 0 1k
R2 N003 0 10k
D2 N004 N001 MURS320
R1 N002 N003 100
Q1 N001 N003 N004 0 BD441
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model Sw Sw(Vt=.5 Vh=.1 Ron=1 Roff=1e6)
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 208 0 -48
WIRE 0 448 0 288
WIRE 96 16 96 0
WIRE 96 112 96 96
WIRE 96 240 96 112
WIRE 96 448 0 448
WIRE 96 448 96 320
WIRE 192 0 96 0
WIRE 208 448 96 448
WIRE 208 448 208 48
WIRE 256 208 256 48
WIRE 256 448 208 448
WIRE 256 448 256 288
WIRE 320 336 320 176
WIRE 320 352 320 336
WIRE 320 448 256 448
WIRE 320 448 320 432
WIRE 352 112 96 112
WIRE 352 336 320 336
WIRE 416 -48 0 -48
WIRE 416 0 272 0
WIRE 416 0 416 -48
WIRE 416 64 416 0
WIRE 416 176 320 176
WIRE 416 176 416 160
WIRE 416 192 416 176
WIRE 416 272 416 256
WIRE 416 288 416 272
WIRE 416 448 320 448
WIRE 416 448 416 384
WIRE 416 464 416 448
WIRE 560 272 416 272
WIRE 560 320 560 272
WIRE 560 448 416 448
WIRE 560 448 560 384
WIRE 608 0 416 0
WIRE 608 80 608 0
WIRE 608 176 416 176
WIRE 608 176 608 144
WIRE 672 272 560 272
WIRE 672 304 672 272
WIRE 672 448 560 448
WIRE 672 448 672 384
SYMBOL diode 400 192 R0
WINDOW 3 42 37 Left 0
SYMATTR InstName D1
SYMATTR Value MURS320
SYMBOL res 304 336 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL pnp2 352 384 M180
WINDOW 0 19 47 Left 0
WINDOW 3 -31 111 Left 0
SYMATTR InstName Q2
SYMATTR Value BD244A
SYMBOL diode 576 384 R180
WINDOW 0 39 62 Left 0
WINDOW 3 34 37 Left 0
SYMATTR InstName D3
SYMATTR Value MURS320
SYMBOL npn2 352 64 R0
WINDOW 0 18 49 Left 0
WINDOW 3 -72 75 Left 0
SYMATTR InstName Q1
SYMATTR Value BD441
SYMBOL ind 656 288 R0
WINDOW 0 -73 27 Left 0
WINDOW 3 -55 80 Left 0
SYMATTR InstName Lmotor
SYMATTR Value 100m
SYMATTR SpiceLine Rser=.1
SYMBOL res 80 224 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 80 0 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL diode 624 144 R180
WINDOW 0 39 62 Left 0
WINDOW 3 34 37 Left 0
SYMATTR InstName D2
SYMATTR Value MURS320
SYMBOL sw 176 0 R270
WINDOW 0 -14 42 VRight 0
WINDOW 3 -25 95 VRight 0
SYMATTR InstName S1
SYMBOL voltage 256 192 R0
WINDOW 0 -25 55 Left 0
WINDOW 3 -14 58 Invisible 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vctrl
SYMATTR Value PULSE(0 1 0 250m 250m 0 .5)
SYMBOL voltage 0 192 R0
WINDOW 3 -14 58 Left 0
SYMATTR InstName Vcc
SYMATTR Value 13
FLAG 416 464 0
TEXT 32 -64 Left 0 !.model Sw Sw(Vt=.5 Vh=.1 Ron=1 Roff=1e6)
TEXT 582 -62 Left 0 !.tran 1
* Z:\tmp\asc_dec_bjh7r6w2\11b02168e93e_FET03op_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
Rs s 0 {Rs}
Rd N001 d {Rd}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1608 1076
WIRE 192 -128 16 -128
WIRE 384 -128 192 -128
WIRE 16 -80 16 -128
WIRE 192 -80 192 -128
WIRE 192 32 192 0
WIRE 192 48 192 32
WIRE 16 112 16 0
WIRE 96 112 16 112
WIRE 144 112 96 112
WIRE 192 160 192 144
WIRE 16 176 16 112
WIRE 192 176 192 160
WIRE 16 272 16 256
WIRE 192 272 192 256
WIRE 192 272 16 272
WIRE 384 272 192 272
WIRE 192 288 192 272
SYMBOL res 176 160 R0
SYMATTR InstName Rs
SYMATTR Value {Rs}
SYMBOL res 176 -96 R0
SYMATTR InstName Rd
SYMATTR Value {Rd}
FLAG 192 288 0
FLAG 96 112 g
FLAG 192 32 d
FLAG 192 160 s
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1515-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1515-3.3.asy)
R1 IN N001 5K
C2 OUT 0 10
C1 N002 N003 1
V1 IN 0 3
Rload OUT 0 100
XU1 IN N001 0 0 N003 N002 IN OUT LTC1515-3.3 ;pnba _SHDN)POR)5/3.3)GND)C1-)C1+)Vin)Vout
.tran 2.5m startup
.lib LTC1515-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3112 2708
WIRE 2016 2176 1920 2176
WIRE 2096 2176 2016 2176
WIRE 2448 2176 2096 2176
WIRE 1920 2192 1920 2176
WIRE 2016 2208 2016 2176
WIRE 2096 2256 2096 2176
WIRE 2128 2256 2096 2256
WIRE 2528 2256 2416 2256
WIRE 2624 2256 2528 2256
WIRE 2624 2272 2624 2256
WIRE 1920 2288 1920 2272
WIRE 2528 2288 2528 2256
WIRE 2016 2320 2016 2288
WIRE 2128 2320 2016 2320
WIRE 2448 2320 2448 2176
WIRE 2448 2320 2416 2320
WIRE 2528 2368 2528 2352
WIRE 2624 2368 2624 2352
WIRE 2128 2384 2096 2384
WIRE 2448 2384 2416 2384
WIRE 2128 2448 2096 2448
WIRE 2448 2448 2416 2448
SYMBOL RES 2000 2192 R0
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL res 2608 2256 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 2512 2288 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL PowerProducts\\LTC1515-3.3 2272 2352 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1920 2176 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL cap 2432 2384 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 2528 2368 0
FLAG 2096 2448 0
FLAG 1920 2288 0
FLAG 2624 2368 0
FLAG 2624 2256 OUT
FLAG 2096 2384 0
FLAG 1920 2176 IN
TEXT 2440 2504 Left 2 !.tran 2.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\78bb126095cf_tbjphillips_ICvsVBE_.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 N002 0 0 QBC548C/PLP
V1 N001 0 1.25
V2 N002 0 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.INCLUDE phil_bjt.lib
.dc V2 0 0.9 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 112 288 112
WIRE 288 128 288 112
WIRE 288 128 192 128
WIRE 128 176 32 176
FLAG 192 224 0
FLAG 352 192 0
FLAG 32 256 0
SYMBOL npn 128 128 R0
SYMATTR InstName Q1
SYMATTR Value QBC548C/PLP
SYMBOL voltage 352 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 1.25
SYMBOL voltage 32 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 0
TEXT 0 24 Left 2 !.INCLUDE phil_bjt.lib
TEXT 0 280 Left 2 !.dc V2 0 0.9 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1490.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
R1 OUT N001 50K
XU1 N002 N001 +V 0 OUT LT1490A ;pnba In+)In-)V+)V-)OUT
C1 N001 0 .1
R2 OUT N002 59K
R3 +V N002 100K
R4 N002 0 100K
.tran 1 startup
* Square Wave Oscillator
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1490.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 48 96 32 96
WIRE 128 96 112 96
WIRE 176 96 128 96
WIRE 304 96 256 96
WIRE -32 160 -32 144
WIRE -144 192 -144 176
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 304 240 304 96
WIRE 304 240 224 240
WIRE 352 240 304 240
WIRE -32 256 -32 240
WIRE 128 256 -32 256
WIRE 160 256 128 256
WIRE -32 272 -32 256
WIRE -144 288 -144 272
WIRE 192 288 192 272
WIRE 128 352 128 256
WIRE 192 352 128 352
WIRE 304 352 304 240
WIRE 304 352 272 352
WIRE -32 368 -32 352
FLAG -144 288 0
FLAG 192 192 +V
FLAG -144 176 +V
FLAG 32 96 0
FLAG 192 288 0
FLAG -32 368 0
FLAG 352 240 OUT
FLAG -32 144 +V
SYMBOL voltage -144 176 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 272 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50K
SYMBOL opamps\\LT1490 192 176 R0
SYMATTR InstName U1
SYMBOL cap 112 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL res 288 336 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 59K
SYMBOL res -48 144 R0
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res -48 256 R0
SYMATTR InstName R4
SYMATTR Value 100K
TEXT 360 320 Left 2 !.tran 1 startup
TEXT 160 32 Bottom 2 ;Square Wave Oscillator
* Z:\home\khalils\Downloads\files\data\raw_asc\1d69393d1fce_strong0weak1nmos.asc
* Generated by LTspice 26.0.1 for Windows.
vdd vdd 0 1.8
vgs vgs 0 PULSE(0 1.8 0 500p 500p 4n 10n)
C1 vout 0 50f
M2 vout vgs 0 0 NMOS l=0.18u w=0.36u
R1 vdd vout 1k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.op
.include tsmc180.txt
.tran 30n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -272 48 -272 16
WIRE -272 144 -272 128
WIRE -64 144 -272 144
WIRE -32 144 -64 144
WIRE -272 160 -272 144
WIRE -64 192 -64 144
WIRE -208 208 -272 208
WIRE -672 224 -672 176
WIRE -560 224 -560 176
WIRE -320 240 -368 240
WIRE -272 288 -272 256
WIRE -208 288 -208 208
WIRE -208 288 -272 288
WIRE -64 336 -64 256
WIRE -672 352 -672 304
WIRE -560 352 -560 304
WIRE -272 352 -272 288
IOPIN -672 176 In
IOPIN -368 240 In
IOPIN -560 176 In
IOPIN -272 16 In
IOPIN -32 144 Out
SYMBOL res -288 32 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL cap -80 192 R0
SYMATTR InstName C1
SYMATTR Value 50f
SYMBOL voltage -560 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vdd
SYMATTR Value 1.8
SYMBOL nmos4 -320 160 R0
WINDOW 123 1 100 Left 2
SYMATTR Value2 l=0.18u w=0.36u
SYMATTR InstName M2
SYMBOL voltage -672 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -51 -150 VRight 2
SYMATTR InstName vgs
SYMATTR Value PULSE(0 1.8 0 500p 500p 4n 10n)
FLAG -272 352 0
FLAG -672 352 0
FLAG -672 176 vgs
FLAG -368 240 vgs
FLAG -560 352 0
FLAG -560 176 vdd
FLAG -272 16 vdd
FLAG -64 336 0
FLAG -32 144 vout
TEXT -736 24 Left 2 !.op
TEXT -736 0 Left 2 !.include tsmc180.txt
TEXT -680 24 Left 2 !.tran 30n
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2054.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC2054.asy)
R2 N001 0 10K
V3 N003 0 SINE(0 1 1K)
V1 +V 0 2.5
R1 N002 N001 10K
XU1 N003 N001 N002 +V -V LTC2054 ;pnba IN+)IN-)OUT)VCC)VEE
V2 -V 0 -2.5
.tran 3m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -48 -16 -64 -16
WIRE 48 -16 32 -16
WIRE 112 -16 48 -16
WIRE 208 -16 192 -16
WIRE -256 80 -256 64
WIRE -128 80 -128 64
WIRE 48 80 48 -16
WIRE 80 80 48 80
WIRE 208 96 208 -16
WIRE 208 96 144 96
WIRE 80 112 -16 112
WIRE -16 144 -16 112
WIRE -256 176 -256 160
WIRE -128 176 -128 160
WIRE -16 240 -16 224
SYMBOL voltage -128 64 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL opamps\\LTC2054 112 96 R0
SYMATTR InstName U1
SYMBOL voltage -256 64 R0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 208 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 48 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage -16 128 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
FLAG -128 176 0
FLAG 112 64 +V
FLAG -128 64 +V
FLAG 112 128 -V
FLAG -256 176 0
FLAG -256 64 -V
FLAG -16 240 0
FLAG -64 -16 0
TEXT 232 248 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\1a27daebfc20_spark_gap.asc
* Generated by LTspice 26.0.1 for Windows.
B1 current_check 0 V=IF(I(S1) < -500m, 100V, -10V)
R2 spark_control current_check 100
R3 0 P001 100
S1 N001 SPARK[B] spark_control P001 SW
B2 voltage_check 0
RLeakage1 SPARK[T] SPARK[B] 100Meg
RSpark_Resistance_guess1 sgt N001 -0.5
RFlux_Losses1 SPARK[T] sgt 2.5K
R1 spark_control voltage_check 100
Lead_Inductance1 sgt SPARK[T] 130n
Carc_capacitance1 SPARK[T] SPARK[B] 3p
.model sw sw
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2128 820
WIRE 192 -144 -80 -144
WIRE 256 -144 192 -144
WIRE 432 -144 256 -144
WIRE 464 -144 432 -144
WIRE 192 -128 192 -144
WIRE 256 -128 256 -144
WIRE 432 -64 432 -144
WIRE 224 -48 192 -48
WIRE 256 -48 224 -48
WIRE 464 48 464 -144
WIRE 224 96 224 -48
WIRE 224 144 224 96
WIRE -288 272 -288 256
WIRE -272 272 -288 272
WIRE -288 288 -288 272
WIRE 224 304 224 224
WIRE -176 368 -288 368
WIRE 176 368 -176 368
WIRE -288 464 -288 448
WIRE -272 464 -288 464
WIRE -288 480 -288 464
WIRE 224 608 224 384
WIRE 224 608 -80 608
WIRE 432 608 432 16
WIRE 432 608 224 608
WIRE 464 608 464 112
WIRE 464 608 432 608
IOPIN -80 -144 BiDir
IOPIN -80 608 BiDir
SYMBOL ind 208 -32 R180
WINDOW 0 41 70 Left 2
WINDOW 3 43 43 Left 2
SYMATTR InstName Lead_Inductance1
SYMATTR Value 130n
SYMBOL res -304 352 R0
WINDOW 0 -34 43 Invisible 2
WINDOW 3 -41 51 Left 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL res 208 128 R0
WINDOW 0 -11 38 Right 2
WINDOW 3 -14 65 Right 2
SYMATTR InstName Spark_Resistance_guess1
SYMATTR Value -0.5
SYMBOL bv -288 464 R0
WINDOW 0 24 16 Invisible 2
WINDOW 3 -42 54 Right 2
SYMATTR InstName B1
SYMATTR Value V=IF(I(S1) < -500m, 100V, -10V)
SYMBOL res 80 336 R270
WINDOW 0 32 56 Invisible 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL res -272 384 R180
WINDOW 0 36 76 Invisible 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 240 -144 R0
WINDOW 0 38 39 Left 2
WINDOW 3 39 66 Left 2
SYMATTR InstName Flux_Losses1
SYMATTR Value 2.5K
SYMBOL sw 224 288 R0
SYMATTR InstName S1
SYMBOL bv -288 272 R180
WINDOW 0 24 96 Invisible 2
WINDOW 3 42 56 Left 2
SYMATTR InstName B2
SYMATTR Value ""
SYMBOL res 416 -80 R0
WINDOW 0 -100 46 Left 2
WINDOW 3 -121 76 Left 2
SYMATTR InstName Leakage1
SYMATTR Value 100MEG
SYMBOL cap 448 48 R0
WINDOW 0 51 24 Left 2
WINDOW 3 51 51 Left 2
SYMATTR InstName arc_capacitance1
SYMATTR Value 3p
FLAG -80 -144 SPARK[T]
FLAG -80 608 SPARK[B]
FLAG -288 176 0
FLAG -288 560 0
FLAG 96 320 0
FLAG -272 272 voltage_check
FLAG -272 464 current_check
FLAG -176 368 spark_control
FLAG 224 96 sgt
TEXT 56 392 Left 2 !.model sw sw
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1843.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1843.asy)
R2 N001 N004 10K
V2 N002 0 PULSE(0 3.3 0 .5m .5m 0 1m)
R1 N001 N003 10K
XU1 N004 0 N002 N002 N006 N005 N001 N003 LTC1843 ;pnba OUTA)GND)INA+)INB-)Hyst)Ref)Vcc)OUTB
V1 N001 0 5
.tran 3m
.lib LTC1843.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1264 800
WIRE 928 64 736 64
WIRE 1040 64 928 64
WIRE 1136 64 1040 64
WIRE 736 80 736 64
WIRE 1040 80 1040 64
WIRE 1136 80 1136 64
WIRE 928 112 928 64
WIRE 848 160 816 160
WIRE 736 176 736 160
WIRE 1040 176 1040 160
WIRE 1040 176 1008 176
WIRE 560 240 528 240
WIRE 816 240 816 160
WIRE 816 240 640 240
WIRE 848 240 816 240
WIRE 1136 256 1136 160
WIRE 1136 256 1008 256
WIRE 848 304 832 304
WIRE 976 400 976 384
WIRE 880 416 880 384
SYMBOL LTC1843 928 240 R0
SYMATTR InstName U1
SYMBOL voltage 656 240 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0 .5m .5m 0 1m)
SYMATTR InstName V2
SYMBOL res 1024 64 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 1120 64 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 736 64 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 736 176 0
FLAG 528 240 0
FLAG 880 416 0
TEXT 1120 344 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\8fdb9b12733d_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
;ac dec 20 10 10k
R3 N006 N001 16k
C3 N001 N002 10.7n
R2 N001 N005 16k
R4 N003 N002 16k
C2 0 N006 9n
R1 N008 N005 16k
V1 N005 0 SINE(0 1 700) AC 1
XU1 N004 N007 N004 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
XU2 N002 N006 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
C1 0 N008 10n
R5 N007 N003 16k
C4 0 N007 3n8
C5 N003 N004 26n
.lib opamp.sub
.tran 5m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1160 680
WIRE 512 -368 288 -368
WIRE 624 -368 576 -368
WIRE 1040 -368 816 -368
WIRE 1152 -368 1104 -368
WIRE 144 -208 0 -208
WIRE 288 -208 288 -368
WIRE 288 -208 224 -208
WIRE 320 -208 288 -208
WIRE 464 -208 400 -208
WIRE 544 -208 464 -208
WIRE 624 -208 624 -368
WIRE 672 -208 624 -208
WIRE 816 -208 816 -368
WIRE 816 -208 752 -208
WIRE 848 -208 816 -208
WIRE 992 -208 928 -208
WIRE 1072 -208 992 -208
WIRE 624 -192 624 -208
WIRE 624 -192 608 -192
WIRE 1152 -192 1152 -368
WIRE 1152 -192 1136 -192
WIRE 544 -176 528 -176
WIRE 1072 -176 1056 -176
WIRE 464 -160 464 -208
WIRE 992 -160 992 -208
WIRE 528 -128 528 -176
WIRE 624 -128 624 -192
WIRE 624 -128 528 -128
WIRE 1056 -128 1056 -176
WIRE 1152 -128 1152 -192
WIRE 1152 -128 1056 -128
WIRE 464 -80 464 -96
WIRE 992 -80 992 -96
WIRE 0 176 0 -208
WIRE 144 176 0 176
WIRE 272 176 224 176
WIRE 0 208 0 176
WIRE 272 208 272 176
SYMBOL cap 512 -352 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value 10.7n
SYMBOL res 944 -224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 16k
SYMBOL voltage 0 192 R0
WINDOW 3 24 152 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 1 700)
SYMATTR Value2 AC 1
SYMBOL cap 1008 -96 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C4
SYMATTR Value 3n8
SYMBOL res 768 -224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 16k
SYMBOL Opamps\\opamp 576 -128 M180
SYMATTR InstName U2
SYMBOL res 240 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 16k
SYMBOL cap 288 272 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 240 -224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 16k
SYMBOL Opamps\\opamp 1104 -128 M180
SYMATTR InstName U1
SYMBOL res 416 -224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 16k
SYMBOL cap 1040 -352 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C5
SYMATTR Value 26n
SYMBOL cap 480 -96 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 9n
FLAG 0 288 0
FLAG 272 272 0
FLAG 464 -80 0
FLAG 992 -80 0
TEXT -34 344 Left 2 !;ac dec 20 10 10k
TEXT 392 360 Left 2 !.lib opamp.sub
TEXT 384 288 Left 2 !.tran 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\1a3ac9fe88fb_Q2_ii__-_PartA.asc
* Generated by LTspice 26.0.1 for Windows.
I1 0 N001 10
C N001 0 0.25
R N001 0 2
L N001 0 2
.tran 0 30s 0 0.00002s
.ic V(n001) = 0
.ic I(L) = 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1360 680
WIRE 208 -208 48 -208
WIRE 368 -208 208 -208
WIRE 528 -208 368 -208
WIRE 48 -160 48 -208
WIRE 208 -144 208 -208
WIRE 368 -144 368 -208
WIRE 528 -144 528 -208
WIRE 48 0 48 -80
WIRE 208 0 208 -64
WIRE 208 0 48 0
WIRE 304 0 208 0
WIRE 368 0 368 -64
WIRE 368 0 304 0
WIRE 528 0 528 -80
WIRE 528 0 368 0
WIRE 304 32 304 0
SYMBOL cap 512 -144 R0
SYMATTR InstName C
SYMATTR Value 0.25
SYMBOL ind 352 -160 R0
SYMATTR InstName L
SYMATTR Value 2
SYMBOL current 48 -80 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName I1
SYMATTR Value 10
SYMBOL res 192 -160 R0
SYMATTR InstName R
SYMATTR Value 2
FLAG 304 32 0
TEXT -72 40 Left 2 !.tran 0 30s 0 0.00002s
TEXT 600 -16 Left 2 !.ic V(n001) = 0
TEXT 600 16 Left 2 !.ic I(L) = 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8334.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8334.asy)
R2 N005 N006 39k
R4 OUT 0 240
R5 N003 0 71.5k
R1 N004 0 20k
V3 N008 0 5
C4 N002 0 1
C1 N007 0 10n
C3 OUT 0 10 X2
L1 IN N001 2.2 Rser=19.5m
D1 N001 OUT PMEG3010BEA
V1 IN 0 6
XU2 0 IN IN N002 N008 N005 N003 N004 N007 0 N001 LT8334 ;pnba GND)EN/UVLO)Vin)INTVcc)Bias)Vc)FBX)Rt)SS)Sync/Mode)SW
C2 N006 0 1n
R3 OUT N003 1Meg
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m startup
.lib LT8334.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1416 868
WIRE 0 -64 -128 -64
WIRE 128 -64 0 -64
WIRE 176 -64 128 -64
WIRE 288 -64 256 -64
WIRE 432 -64 288 -64
WIRE 608 -64 496 -64
WIRE 720 -64 608 -64
WIRE 848 -64 720 -64
WIRE 608 -48 608 -64
WIRE -128 -32 -128 -64
WIRE 848 -32 848 -64
WIRE 720 -16 720 -64
WIRE 128 0 128 -64
WIRE 288 0 288 -64
WIRE 608 32 608 16
WIRE 0 64 0 -64
WIRE 48 64 0 64
WIRE 384 64 368 64
WIRE 464 64 448 64
WIRE -128 80 -128 48
WIRE 848 80 848 48
WIRE 48 160 16 160
WIRE 720 160 720 64
WIRE 720 160 368 160
WIRE 720 192 720 160
WIRE -48 256 -80 256
WIRE 48 256 32 256
WIRE 416 256 368 256
WIRE 528 256 496 256
WIRE 608 256 592 256
WIRE 720 288 720 272
WIRE -48 352 -80 352
WIRE 48 352 16 352
WIRE 432 352 368 352
WIRE 432 400 432 352
WIRE 208 448 208 416
WIRE 432 496 432 480
SYMBOL cap 592 -48 R0
WINDOW 123 42 54 Left 2
WINDOW 0 41 3 Left 2
WINDOW 3 37 29 Left 2
SYMATTR Value2 X2
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL VOLTAGE -128 -48 R0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL ind2 160 -48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=19.5m
SYMATTR Type ind
SYMBOL res 832 -48 R0
SYMATTR InstName R4
SYMATTR Value 240
SYMBOL res 704 -32 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL res 400 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 39k
SYMBOL cap 384 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL LT8334 208 208 R0
SYMATTR InstName U2
SYMBOL schottky 432 -48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 -6 35 VBottom 2
SYMATTR InstName D1
SYMATTR Value PMEG3010BEA
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 48 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20k
SYMBOL res 704 176 R0
SYMATTR InstName R5
SYMATTR Value 71.5k
SYMBOL cap 16 336 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap 528 272 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL VOLTAGE 432 384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
FLAG -80 352 0
FLAG -80 256 0
FLAG -128 80 0
FLAG 720 288 0
FLAG 608 32 0
FLAG 848 80 0
FLAG 464 64 0
FLAG -128 -64 IN
FLAG 848 -64 OUT
FLAG 208 448 0
FLAG 608 256 0
FLAG 16 160 0
FLAG 432 496 0
TEXT 128 520 Left 2 !.tran 10m startup