Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\14698f87b9c4_TransPump.asc
* Generated by LTspice 26.0.1 for Windows.
RTransPump N005 0 100
M1 N005 N002 N001 N001 AONR21305C
R1 N001 N002 10k
V5V N001 0 5
R2 N004 N003 2k
VGPIO N004 0 0
Q1 N002 N003 0 0 BC547B
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 900 680
WIRE 240 -160 -16 -160
WIRE 464 -160 240 -160
WIRE 240 -32 240 -160
WIRE 464 -16 464 -80
WIRE 464 -16 288 -16
WIRE 560 32 528 32
WIRE 656 32 640 32
WIRE 240 96 240 64
WIRE -16 144 -16 -160
WIRE 656 160 656 32
WIRE 240 240 240 176
WIRE 464 240 464 80
SYMBOL res 224 80 R0
SYMATTR InstName TransPump
SYMATTR Value 100
SYMBOL res 656 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2k
SYMBOL voltage -16 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName 5V
SYMATTR Value 5
SYMBOL pmos 288 64 R180
SYMATTR InstName M1
SYMATTR Value AONR21305C
SYMBOL res 448 -176 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 656 144 R0
SYMATTR InstName GPIO
SYMATTR Value 0
SYMBOL npn 528 -16 M0
SYMATTR InstName Q1
SYMATTR Value BC547B
FLAG 240 240 0
FLAG -16 224 0
FLAG 656 240 0
FLAG 464 240 0
TEXT -48 264 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG888.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG888.asy)
V4 +V 0 5
V3 IN 0 PULSE(0 5 5u 20n 20n 25u 50u)
V1 SA 0 3
V2 SB 0 0
R1 D 0 49.9
C1 D 0 36p
XU2 IN SA D SB +V 0 ADG888 ;pnba IN)S1)D)S2)Vdd)GND
.tran 75u
.lib ADG888.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1744 -272 -2032 -272
WIRE -1696 -272 -1744 -272
WIRE -2032 -256 -2032 -272
WIRE -1424 -240 -1504 -240
WIRE -1312 -240 -1424 -240
WIRE -1424 -224 -1424 -240
WIRE -1312 -224 -1312 -240
WIRE -1744 -208 -1920 -208
WIRE -1696 -208 -1744 -208
WIRE -1920 -192 -1920 -208
WIRE -2160 -160 -2160 -176
WIRE -2032 -160 -2032 -176
WIRE -1744 -144 -1776 -144
WIRE -1696 -144 -1744 -144
WIRE -1424 -128 -1424 -144
WIRE -1312 -128 -1312 -160
WIRE -1920 -96 -1920 -112
WIRE -1776 -80 -1776 -144
WIRE -2160 -64 -2160 -80
WIRE -1600 -16 -1600 -32
WIRE -1776 32 -1776 0
SYMBOL voltage -1920 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL cap -1328 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -2160 -176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL voltage -2032 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL ADG888 -1600 -192 R0
SYMATTR InstName U2
SYMBOL res -1440 -240 R0
SYMATTR InstName R1
SYMATTR Value 49.9
SYMBOL voltage -1776 -96 R0
WINDOW 3 24 136 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 5u 20n 20n 25u 50u)
SYMATTR InstName V3
FLAG -2032 -160 0
FLAG -1920 -96 0
FLAG -1776 32 0
FLAG -1600 -368 +V
FLAG -1424 -128 0
FLAG -1600 -16 0
FLAG -1312 -128 0
FLAG -2160 -64 0
FLAG -2160 -176 +V
FLAG -1424 -240 D
FLAG -1744 -272 SA
FLAG -1744 -208 SB
FLAG -1744 -144 IN
TEXT -1416 -24 Left 2 !.tran 75u
* Z:\tmp\asc_dec_bjh7r6w2\146930fe736d_Level_shift_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V2 input 0 SINE(0 1.25 1)
R7 output N002 100K
V3 Vref 0 2.5V
R5 0 N005 100K
V1 V+ 0 15V
R1 N001 input 10K
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2216 948
WIRE 528 48 448 48
WIRE 640 48 608 48
WIRE 688 48 640 48
WIRE 816 48 768 48
WIRE 928 48 816 48
WIRE 448 80 448 48
WIRE 928 144 928 128
WIRE 992 144 928 144
WIRE 640 160 640 48
WIRE 656 160 640 160
WIRE 928 160 928 144
WIRE 816 176 816 48
WIRE 816 176 720 176
WIRE 656 192 640 192
WIRE 448 224 448 160
WIRE 928 256 928 240
WIRE 640 288 640 192
WIRE 928 288 768 288
WIRE 1072 288 928 288
WIRE 928 416 928 288
WIRE 960 416 928 416
WIRE 1072 432 1072 288
WIRE 1072 432 1024 432
WIRE 848 448 848 432
WIRE 960 448 848 448
WIRE 848 464 848 448
WIRE 848 560 848 544
SYMBOL voltage 448 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 1.25 1)
SYMBOL res 944 144 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R7
SYMATTR Value 100K
SYMBOL voltage 816 -160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 2.5V
SYMBOL res 864 560 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 100K
SYMBOL voltage 512 -160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15V
SYMBOL res 624 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 512 -64 0
FLAG 512 -144 V+
FLAG 656 -64 0
FLAG 656 -144 V-
FLAG 816 -64 0
FLAG 816 -144 Vref
FLAG 448 224 0
FLAG 848 560 0
FLAG 448 48 input
FLAG 688 144 V+
FLAG 688 208 V-
FLAG 992 464 V-
FLAG 992 400 V+
FLAG 992 144 output
FLAG 928 256 0
* Z:\home\khalils\Downloads\files\data\raw_asc\PLL.asc
* Generated by LTspice 26.0.1 for Windows.
A1 IN 0 0 0 0 0 N001 0 MODULATOR mark=1.1K space=.9K
R3 N004 N003 1K
C2 N004 0 1
A3 N004 0 0 0 0 0 N005 0 MODULATOR mark=2K space=0
A2 0 N002 0 N005 0 0 N003 0 XOR Ref=0
A4 signal 0 0 0 0 0 out 0 SCHMITT Vt=.5 Vh=1m
E2 signal 0 N004 0 Laplace=1./(1+.0005*s)**3 cache=2
E1 N002 0 N001 0 Laplace={w0/Q}*s/(s*s+{w0/Q}*s+{w0*w0}) mtol=10 cache=2
B1 IN 0 V=rand(time*500) >= .5
.tran 300m
.params w0=2*pi*1K Q=5
* .options baudrate=500
* This example schematic is supplied for informational/educational purposes only.
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1732 1576
WIRE 192 880 -256 880
WIRE -256 912 -256 880
WIRE 528 912 336 912
WIRE 896 912 592 912
WIRE 992 912 960 912
WIRE 1104 912 1072 912
WIRE 1168 912 1104 912
WIRE 1216 912 1168 912
WIRE 1392 912 1312 912
WIRE 1504 912 1392 912
WIRE 1616 912 1568 912
WIRE 1104 928 1104 912
WIRE 592 944 592 912
WIRE 896 944 864 944
WIRE 1312 944 1312 912
WIRE 528 960 528 912
WIRE 544 960 528 960
WIRE 1216 960 1216 912
WIRE 1264 960 1216 960
WIRE 544 1008 528 1008
WIRE 1104 1008 1104 992
WIRE 1264 1008 1232 1008
WIRE -256 1024 -256 992
WIRE 528 1040 528 1008
WIRE 592 1040 592 1024
WIRE 1232 1040 1232 1008
WIRE 1312 1040 1312 1024
WIRE 1168 1056 1168 912
WIRE 1168 1056 1056 1056
WIRE 864 1088 864 944
WIRE 912 1088 864 1088
FLAG -256 1024 0
FLAG -256 880 IN
FLAG 1104 1008 0
FLAG 1232 1040 0
FLAG 1312 1040 0
FLAG 528 1040 0
FLAG 592 1040 0
FLAG 1616 912 out
FLAG 1392 912 signal
SYMBOL SPECIALFUNCTIONS\\MODULATE 192 880 R0
WINDOW 0 37 -55 Left 2
WINDOW 3 55 119 Center 2
SYMATTR InstName A1
SYMATTR Value mark=1.1K space=.9K
SYMBOL RES 1088 896 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL cap 1088 928 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL SPECIALFUNCTIONS\\MODULATE 1056 1056 M0
WINDOW 0 55 -48 Right 2
WINDOW 3 61 119 Center 2
SYMATTR InstName A3
SYMATTR Value mark=2K space=0
SYMBOL DIGITAL\\XOR 944 864 R0
WINDOW 0 -33 16 Left 2
WINDOW 3 -43 120 Left 2
SYMATTR InstName A2
SYMATTR Value Ref=0
SYMBOL DIGITAL\\SCHMTBUF 1504 848 R0
WINDOW 0 3 36 Left 2
WINDOW 3 22 97 Center 2
SYMATTR InstName A4
SYMATTR Value Vt=.5 Vh=1m
SYMBOL E 1312 928 R0
WINDOW 123 24 132 Left 2
SYMATTR Value2 cache=2
SYMATTR InstName E2
SYMATTR Value Laplace=1./(1+.0005*s)**3
SYMBOL e 592 928 R0
WINDOW 3 -28 147 Center 2
WINDOW 39 -116 176 Left 2
SYMATTR Value Laplace={w0/Q}*s/(s*s+{w0/Q}*s+{w0*w0})
SYMATTR SpiceLine mtol=10 cache=2
SYMATTR InstName E1
SYMBOL BV -256 896 R0
SYMATTR InstName B1
SYMATTR Value V=rand(time*500) >= .5
TEXT -96 1240 Left 2 !.tran 300m
TEXT -96 1208 Left 2 !.params w0=2*pi*1K Q=5
TEXT -96 1280 Left 2 ;.options baudrate=500
TEXT 624 1336 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\e712da531b7a_pfet_as_diode.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vcpu 0 150
M1 Vperiph 0 Vcpu Vcpu Si4403DY
V1 Vcpu 0 3.3
D1 Vperiph Vcpu D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 3 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 400 -64 -208 -64
WIRE 192 32 144 32
WIRE 304 32 256 32
WIRE 144 80 144 32
WIRE 144 80 -32 80
WIRE 176 80 144 80
WIRE 304 80 304 32
WIRE 304 80 272 80
WIRE 400 80 400 -64
WIRE 400 80 304 80
WIRE 432 80 400 80
WIRE 496 80 432 80
WIRE -208 128 -208 -64
WIRE 32 128 -208 128
WIRE 432 128 432 80
WIRE 32 160 32 128
WIRE 32 288 32 240
WIRE 256 288 256 128
WIRE 256 288 32 288
WIRE 432 288 432 208
WIRE 432 288 256 288
WIRE 32 320 32 288
WIRE 0 0 0 0
IOPIN 496 80 Out
IOPIN -32 80 In
SYMBOL pmos 176 128 R270
SYMATTR InstName M1
SYMATTR Value Si4403DY
SYMBOL Misc\\battery 32 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 416 112 R0
SYMATTR InstName R1
SYMATTR Value 150
SYMBOL diode 192 48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
FLAG 32 320 0
FLAG 496 80 Vcpu
FLAG -32 80 Vperiph
TEXT -190 344 Left 2 !.tran 0 3 0
* Z:\home\khalils\Downloads\files\data\raw_asc\AD3531R.asc
* Generated by LTspice 26.0.1 for Windows.
RLOAD vOUT 0 1k
CLOAD vOUT 0 15n
Vdac vDAC 0 PWL(0 0.625 1u 0.625 +0.5u 1.875)
V1 Vdd 0 5
XU1 vDAC Vdd 0 vOUT AD3531R Gain=1 ;pnba Vdac)Vdd)GND)Vout
.tran 10u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD3531R.asy)
.lib AD3531R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 952 680
WIRE -512 -144 -800 -144
WIRE -240 -144 -512 -144
WIRE -800 -112 -800 -144
WIRE -240 -32 -240 -144
WIRE -800 0 -800 -32
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 112 112 0 112
WIRE 192 112 112 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -800 0 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -512 -144 Vdd
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 15n
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 1u 0.625 +0.5u 1.875)
SYMBOL voltage -800 -128 R0
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL AD3531R -208 112 R0
SYMATTR InstName U1
SYMATTR SpiceLine Gain=1
TEXT -160 312 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\566458f84f4f_dc_ideal.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc lin V2 0 1.8 0.001
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
XU1 VREF_in VREF_out N001 0 VREF_out level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V2 VREF_in 0 1.25
V1 N001 0 1.8
.op
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 -128 -240 -128
WIRE 352 -64 -64 -64
WIRE 112 80 112 -128
WIRE -240 96 -240 -128
WIRE -64 96 -64 -64
WIRE 0 96 -64 96
WIRE 80 96 0 96
WIRE 288 112 144 112
WIRE 352 112 352 -64
WIRE 352 112 288 112
WIRE 0 128 -64 128
WIRE 80 128 0 128
WIRE -64 208 -64 128
WIRE -240 320 -240 176
WIRE -64 320 -64 288
WIRE -64 320 -240 320
WIRE -240 336 -240 320
WIRE 112 352 112 144
SYMBOL voltage -64 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.25
SYMBOL OpAmps\\UniversalOpAmp 112 112 R0
SYMATTR InstName U1
SYMBOL voltage -240 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
FLAG 112 352 0
FLAG -240 336 0
FLAG 0 128 VREF_in
FLAG 288 112 VREF_out
FLAG 0 96 V_feedback
TEXT 336 184 Left 2 !.op
TEXT 336 216 Left 2 ;.dc lin V2 0 1.8 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1946.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1946.asy)
R2 N002 0 5.23K
XU1 N003 N002 IN 0 N001 IN N003 N004 LT1946 ;pnba Vc)FB)_SHDN)GND)SW)Vin)Comp)SS
C3 N004 0 .005
L1 IN N001 5.4 Rser=.05
Rload OUT 0 20
R1 OUT N002 28.7K
D1 N001 OUT MBRS340
C2 OUT 0 20 Rser=50m
V1 IN 0 3.3
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 750u startup
.lib LT1946.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2688 1672
WIRE 1568 1200 1472 1200
WIRE 1680 1200 1568 1200
WIRE 1696 1200 1680 1200
WIRE 1808 1200 1776 1200
WIRE 1888 1200 1808 1200
WIRE 2032 1200 1952 1200
WIRE 2192 1200 2032 1200
WIRE 2304 1200 2192 1200
WIRE 1472 1216 1472 1200
WIRE 2192 1216 2192 1200
WIRE 2304 1216 2304 1200
WIRE 2032 1232 2032 1200
WIRE 1680 1264 1680 1200
WIRE 1808 1264 1808 1200
WIRE 1472 1312 1472 1296
WIRE 2192 1312 2192 1280
WIRE 2304 1312 2304 1296
WIRE 1568 1344 1568 1200
WIRE 1600 1344 1568 1344
WIRE 2032 1344 2032 1312
WIRE 2032 1344 1888 1344
WIRE 2032 1360 2032 1344
WIRE 1600 1408 1568 1408
WIRE 2032 1456 2032 1440
WIRE 1568 1472 1568 1408
WIRE 1600 1472 1568 1472
WIRE 1904 1472 1888 1472
WIRE 1984 1472 1968 1472
WIRE 1744 1568 1744 1552
SYMBOL RES 2288 1200 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL cap 1904 1488 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value .005
SYMBOL RES 2016 1216 R0
SYMATTR InstName R1
SYMATTR Value 28.7K
SYMBOL VOLTAGE 1472 1200 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL schottky 1888 1184 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMBOL cap 2176 1216 R0
SYMATTR InstName C2
SYMATTR Value 20
SYMATTR SpiceLine Rser=50m
SYMBOL res 2016 1344 R0
SYMATTR InstName R2
SYMATTR Value 5.23K
SYMBOL POWERPRODUCTS\\LT1946 1744 1408 R0
SYMATTR InstName U1
SYMBOL ind 1680 1216 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 5.4
SYMATTR SpiceLine Rser=.05
FLAG 2032 1456 0
FLAG 1744 1568 0
FLAG 1984 1472 0
FLAG 2192 1312 0
FLAG 1472 1312 0
FLAG 2304 1312 0
FLAG 2304 1200 OUT
FLAG 1472 1200 IN
TEXT 2112 1512 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8050.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8050.asy)
R2 N002 0 57.6K
V1 IN 0 48
XU1 N001 OUT N001 IN IN MP_01 NC_02 N003 NC_03 N002 0 LTM8050 ;pnba BIAS)Vout)AUX)Vin)Run/SS))Pgood)FB)Share)Rt)GND
Rload OUT 0 6
R1 N003 0 34.8K
C1 OUT 0 22
.tran 500u startup
.lib LTM8050.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1104 740
WIRE -48 64 -160 64
WIRE 96 64 -48 64
WIRE -160 80 -160 64
WIRE 96 96 96 64
WIRE -48 144 -48 64
WIRE -32 144 -48 144
WIRE 240 144 224 144
WIRE -160 176 -160 160
WIRE 240 224 240 144
WIRE 240 224 224 224
WIRE -128 304 -144 304
WIRE -32 304 -48 304
WIRE 384 304 224 304
WIRE 480 304 384 304
WIRE 384 320 384 304
WIRE 480 320 480 304
WIRE 272 384 224 384
WIRE 272 400 272 384
WIRE 384 416 384 384
WIRE 480 416 480 400
WIRE 96 448 96 432
WIRE 272 496 272 480
SYMBOL res 256 384 R0
SYMATTR InstName R1
SYMATTR Value 34.8K
SYMBOL voltage -160 64 R0
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL res 464 304 R0
SYMATTR InstName Rload
SYMATTR Value 6
SYMBOL PowerProducts\\LTM8050 96 272 R0
SYMATTR InstName U1
SYMBOL cap 368 320 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res -32 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 57.6K
FLAG 384 416 0
FLAG 272 496 0
FLAG -160 176 0
FLAG 96 448 0
FLAG 480 416 0
FLAG -144 304 0
FLAG 480 304 OUT
FLAG -160 64 IN
TEXT 384 488 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\dde0577ca642_diff_opamp.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp1.asy)
R6 N008 0 10e+6
XU3 N008 N005 NC_01 NC_02 N001 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R3 N005 N004 10e+5
VS+N N002 0 SINE(5 15 1)
R4 N008 N007 10e+5
VN N006 0 5
R5 N001 N005 10e+6
RTransducer N002 N003 10e+3
RWire1 N004 N003 10e+4
RWire2 N007 N006 10e+4
.tran 5
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 592 112 512 112
WIRE -32 128 -128 128
WIRE 112 128 48 128
WIRE 192 144 192 128
WIRE 320 144 192 144
WIRE 320 192 320 144
WIRE 336 192 320 192
WIRE 432 192 432 112
WIRE 432 192 416 192
WIRE 448 192 432 192
WIRE 592 208 592 112
WIRE 592 208 512 208
WIRE 224 224 80 224
WIRE 336 224 304 224
WIRE 432 224 416 224
WIRE 448 224 432 224
WIRE 80 240 80 224
WIRE 432 256 432 224
SYMBOL voltage 80 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName N
SYMATTR Value 5
SYMBOL res 432 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10e+5
SYMBOL OpAmps\\UniversalOpAmp1 480 208 R0
SYMATTR InstName U3
SYMBOL res 432 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10e+5
SYMBOL voltage -128 144 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName S+N
SYMATTR Value SINE(5 15 1)
SYMBOL res 528 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10e+6
SYMBOL res 208 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RWire1
SYMATTR Value 10e+4
SYMBOL res 416 240 R0
SYMATTR InstName R6
SYMATTR Value 10e+6
SYMBOL res 320 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RWire2
SYMATTR Value 10e+4
SYMBOL res -48 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Transducer
SYMATTR Value 10e+3
FLAG 80 320 0
FLAG -128 48 0
FLAG 432 336 0
FLAG -32 208 0
TEXT 0 368 Left 2 !.tran 5
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX49918.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX49918.asy)
XU2 RS+ RS- 0 OUT VDD 0 VDD G0 G1 G2 MAX49918 ;pnba RS+)RS-)GND)OUT)VDD)REF2)REF1)G0)G1)G2
C1 OUT 0 10p
Vcm RS- 0 50
VG1 G1 0 0
Vsense RS+ RS- SINE(0 10m 1k) AC 1
VG0 G0 0 0
VG2 G2 0 0
V1 VDD 0 5
R1 OUT 0 10k
.op
.tran 2m
.lib MAX49918.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1584 1196
WIRE 560 -112 480 -112
WIRE 688 -112 640 -112
WIRE 688 -96 688 -112
WIRE 480 0 480 -112
WIRE 352 32 -32 32
WIRE 384 32 352 32
WIRE -32 48 -32 32
WIRE 704 80 576 80
WIRE 800 80 704 80
WIRE 704 112 704 80
WIRE 800 128 800 80
WIRE -32 144 -32 128
WIRE 352 144 -32 144
WIRE 384 144 352 144
WIRE -32 176 -32 144
WIRE 352 208 80 208
WIRE 384 208 352 208
WIRE 624 208 576 208
WIRE 656 208 624 208
WIRE 704 208 704 192
WIRE 800 208 800 192
WIRE 352 256 192 256
WIRE 384 256 352 256
WIRE -32 272 -32 256
WIRE 352 304 304 304
WIRE 384 304 352 304
WIRE 608 304 576 304
WIRE 608 320 608 304
WIRE 80 336 80 208
WIRE 192 336 192 256
WIRE 304 336 304 304
WIRE 480 368 480 352
WIRE 80 432 80 416
WIRE 192 432 192 416
WIRE 304 432 304 416
SYMBOL voltage -32 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vcm
SYMATTR Value 50
SYMBOL cap 784 128 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage -32 32 R0
WINDOW 3 40 50 Left 2
WINDOW 123 42 85 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 10m 1k)
SYMATTR Value2 AC 1
SYMATTR InstName Vsense
SYMBOL voltage 192 320 R0
SYMATTR InstName VG1
SYMATTR Value 0
SYMBOL voltage 544 -112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 80 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VG2
SYMATTR Value 0
SYMBOL res 688 96 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL MAX49918 480 176 R0
SYMATTR InstName U2
SYMBOL voltage 304 320 R0
SYMATTR InstName VG0
SYMATTR Value 0
FLAG 480 368 0
FLAG 688 -96 0
FLAG 480 -112 VDD
FLAG 624 208 VDD
FLAG 608 320 0
FLAG -32 272 0
FLAG 80 432 0
FLAG 192 432 0
FLAG 304 432 0
FLAG 704 208 0
FLAG 800 208 0
FLAG 800 80 OUT
FLAG 352 32 RS+
FLAG 352 144 RS-
FLAG 352 208 G2
FLAG 352 256 G1
FLAG 352 304 G0
TEXT 720 368 Left 2 !.op\n.tran 2m
* Z:\home\khalils\Downloads\files\data\raw_asc\5031a30ca5ce_Exp_3__Half-wave_.asc
* Generated by LTspice 26.0.1 for Windows.
Vin N001 0 SINE(0 5 4 0 0 0)
D1 N001 Vout D
R1 Vout 0 10K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2 startup
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 -192 -16 -192
WIRE 240 -192 192 -192
WIRE 256 -192 240 -192
WIRE -16 -144 -16 -192
WIRE 256 -144 256 -192
WIRE -16 0 -16 -64
WIRE 48 0 -16 0
WIRE 256 0 256 -64
WIRE 256 0 48 0
SYMBOL voltage -16 -160 R0
WINDOW 3 -4 201 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 5 4 0 0 0)
SYMATTR InstName Vin
SYMBOL diode 128 -176 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL res 240 -160 R0
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 48 0 0
FLAG 240 -192 Vout
TEXT -16 80 Left 2 !.tran 2 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1334.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 1 input\nOnly one channel modeled\nRon modeled at 15V\nCrosstalk at -90 dB at 1MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1334.asy)
XU1 IN SA D SB -V 0 +V ADG1334 ;pnba IN)SA)D)SB)Vss)GND)Vdd
V5 SA 0 12
R1 D 0 300
V6 SB 0 0
V1 +V 0 15
V2 -V 0 -15
V4 IN 0 PULSE(0 5 0 20n 20n 10u 20u)
C1 D 0 35p
.tran 120u
.lib ADG1334.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -800 -320 -800 -336
WIRE -1040 -256 -1056 -256
WIRE -928 -256 -960 -256
WIRE -896 -256 -928 -256
WIRE -672 -224 -704 -224
WIRE -640 -224 -672 -224
WIRE -544 -224 -640 -224
WIRE -1456 -192 -1456 -208
WIRE -1344 -192 -1344 -208
WIRE -1152 -192 -1184 -192
WIRE -928 -192 -1072 -192
WIRE -896 -192 -928 -192
WIRE -640 -192 -640 -224
WIRE -544 -192 -544 -224
WIRE -928 -128 -992 -128
WIRE -896 -128 -928 -128
WIRE -1456 -96 -1456 -112
WIRE -1344 -96 -1344 -112
WIRE -640 -96 -640 -112
WIRE -544 -96 -544 -128
WIRE -992 -80 -992 -128
WIRE -864 0 -864 -16
WIRE -736 0 -736 -16
WIRE -992 32 -992 0
SYMBOL voltage -1056 -192 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 0
SYMBOL Switches\\ADG1334 -800 -176 R0
SYMATTR InstName U1
SYMBOL voltage -944 -256 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 12
SYMBOL voltage -1344 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -1456 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL cap -560 -192 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL voltage -992 -96 M0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PULSE(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V4
SYMBOL res -656 -208 R0
SYMATTR InstName R1
SYMATTR Value 300
FLAG -1456 -96 0
FLAG -1344 -96 0
FLAG -1344 -208 +V
FLAG -1456 -208 -V
FLAG -992 32 0
FLAG -1056 -256 0
FLAG -1184 -192 0
FLAG -800 -336 +V
FLAG -736 0 0
FLAG -864 0 -V
FLAG -640 -96 0
FLAG -544 -96 0
FLAG -928 -256 SA
FLAG -928 -192 SB
FLAG -928 -128 IN
FLAG -672 -224 D
TEXT -616 16 Left 2 !.tran 120u
TEXT -1448 -464 Left 2 ;Note:\nSwitch shown for a logic 1 input\nOnly one channel modeled\nRon modeled at 15V\nCrosstalk at -90 dB at 1MHz