Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\8f89e744c3b9_OP-Amp_Inverting_Amplifier.asc
* Generated by LTspice 26.0.1 for Windows.
* Op_Amp_Non_Inverting_Amplifier
Vin Vp 0 SINE(0 1 1K)
Rf N001 Vn 10K
XU1 Vp Vn N002 N003 N001 LM741/NS ;pnba In+)In-)V+)V-)OUT
Ri Vn 0 1.1K
V-Vdd N003 0 -12V
V+Vss N002 0 12V
.tran 0 100ms 85ms 10ms
.include C:\Users\Vinod\Documents\LTspiceXVII\LM741.MOD
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 0 144 0
WIRE 432 0 256 0
WIRE 544 96 224 96
WIRE 224 128 224 96
WIRE 16 144 -80 144
WIRE 144 144 144 0
WIRE 144 144 96 144
WIRE 160 144 144 144
WIRE 192 144 160 144
WIRE 432 160 432 0
WIRE 432 160 256 160
WIRE 480 160 432 160
WIRE 144 176 112 176
WIRE 192 176 144 176
WIRE 544 208 544 176
WIRE 656 208 544 208
WIRE -80 224 -80 144
WIRE 544 240 544 208
WIRE 656 240 656 208
WIRE 112 272 112 176
WIRE 224 336 224 192
WIRE 544 336 544 320
WIRE 544 336 224 336
WIRE 112 416 112 352
DATAFLAG 416 160 ""
DATAFLAG 416 160 ""
SYMBOL OpAmps\\opamp2 224 96 R0
SYMATTR InstName U1
SYMATTR Value LM741/NS
SYMBOL res 112 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Ri
SYMATTR Value 1.1K
SYMBOL res 272 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rf
SYMATTR Value 10K
SYMBOL voltage 544 80 R0
SYMATTR InstName +Vss
SYMATTR Value 12V
SYMBOL Misc\\signal 112 256 R0
SYMATTR InstName Vin
SYMBOL voltage 544 336 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName -Vdd
SYMATTR Value -12V
FLAG -80 224 0
FLAG 112 416 0
FLAG 656 240 0
FLAG 160 144 Vn
FLAG 144 176 Vp
FLAG 448 192 Vout
TEXT -104 440 Left 2 !.tran 0 100ms 85ms 10ms
TEXT -144 -80 Left 5 ;Op_Amp_Non_Inverting_Amplifier
TEXT -104 512 Left 2 !.include C:\\Users\\Vinod\\Documents\\LTspiceXVII\\LM741.MOD
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3410-1.875.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
L1 N001 OUT 4.7
Rload OUT 0 10
C2 OUT 0 4.7
XU1 IN 0 N001 IN MP_01 OUT LTC3410-x.x top=484K bot=360K ;pnba Run)GND)SW)Vin))Vsense
.tran 250u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3410-1.875.asy)
.lib LTC3410-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 700
WIRE 192 64 96 64
WIRE 352 64 192 64
WIRE 96 80 96 64
WIRE 352 80 352 64
WIRE 192 144 192 64
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 624 144 592 144
WIRE 672 144 624 144
WIRE 768 144 672 144
WIRE 672 160 672 144
WIRE 768 160 768 144
WIRE 96 176 96 160
WIRE 672 256 672 224
WIRE 768 256 768 240
WIRE 624 304 624 144
WIRE 624 304 496 304
WIRE 352 384 352 368
FLAG 96 176 0
FLAG 352 384 0
FLAG 672 256 0
FLAG 768 256 0
FLAG 768 144 OUT
FLAG 96 64 IN
SYMBOL VOLTAGE 96 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL RES 752 144 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL cap 656 160 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL PowerProducts\\LTC3410-1.875 352 224 R0
SYMATTR InstName U1
TEXT 536 352 Left 2 !.tran 250u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1693-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1693-1.asy)
XU1 N002 0 N002 0 N004 N001 N003 N001 LTC1693-1 ;pnba IN1)GND1)IN2)GND2)OUT2)Vcc2)OUT1)Vcc1
V2 N002 0 PULSE(0 5 0 1n 1n 5u 10u)
V1 N001 0 5
.tran 100u
.lib LTC1693-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2388 1428
WIRE 1632 1024 1504 1024
WIRE 1808 1024 1632 1024
WIRE 1504 1040 1504 1024
WIRE 1632 1040 1632 1024
WIRE 1808 1040 1808 1024
WIRE 1440 1120 1120 1120
WIRE 1712 1120 1696 1120
WIRE 1808 1136 1808 1120
WIRE 1120 1216 1120 1120
WIRE 1440 1216 1120 1216
WIRE 1712 1216 1696 1216
WIRE 1120 1232 1120 1216
WIRE 1504 1312 1504 1296
WIRE 1632 1312 1632 1296
WIRE 1120 1328 1120 1312
SYMBOL PowerProducts\\LTC1693-1 1568 1168 R0
SYMATTR InstName U1
SYMBOL voltage 1808 1024 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 1120 1216 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1n 1n 5u 10u)
FLAG 1808 1136 0
FLAG 1632 1312 0
FLAG 1504 1312 0
FLAG 1120 1328 0
TEXT 1720 1344 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1336.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1336.asy)
V2 N007 0 PULSE(0 3 0 0 0 5u 10u)
V1 N003 0 10
R2 N003 N006 10K
R1 N001 N003 2
C1 0 N004 10
C2 N005 0 10000p
D1 N002 N004 1N4148
L1 N001 N002 200
XU1 N001 N003 N007 N009 N006 0 0 N008 N008 N003 0 N005 N005 N004 0 N002 LT1336 ;pnba Isense)SV+)InTop)InBottom)_UVOUT)SGND)PGND)BgateFB)BgateDR)PV+)Tsource)TgateFB)TgateDR)Boost)SWGND)Switch
V3 N009 0 PULSE(0 3 2.5u 0 0 5u 10u)
C3 N008 0 10000p
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m
.lib LT1336.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2404 1860
WIRE 1696 1072 1472 1072
WIRE 1744 1072 1696 1072
WIRE 1888 1072 1824 1072
WIRE 2064 1072 1888 1072
WIRE 1472 1088 1472 1072
WIRE 2064 1088 2064 1072
WIRE 1696 1168 1696 1072
WIRE 1888 1168 1888 1072
WIRE 1472 1232 1472 1168
WIRE 1472 1232 1328 1232
WIRE 1568 1232 1472 1232
WIRE 2064 1232 2064 1152
WIRE 2064 1232 2016 1232
WIRE 2080 1232 2064 1232
WIRE 2160 1232 2144 1232
WIRE 1328 1248 1328 1232
WIRE 1472 1296 1472 1232
WIRE 1568 1296 1472 1296
WIRE 2224 1296 2016 1296
WIRE 1472 1312 1472 1296
WIRE 2224 1328 2224 1296
WIRE 2304 1328 2224 1328
WIRE 1328 1344 1328 1328
WIRE 2304 1344 2304 1328
WIRE 2224 1360 2224 1328
WIRE 2224 1360 2016 1360
WIRE 1472 1424 1472 1392
WIRE 1568 1424 1472 1424
WIRE 2160 1424 2160 1232
WIRE 2160 1424 2016 1424
WIRE 2304 1424 2304 1408
WIRE 2304 1424 2160 1424
WIRE 2160 1440 2160 1424
WIRE 1568 1488 1376 1488
WIRE 2064 1488 2016 1488
WIRE 2064 1520 2064 1488
WIRE 2144 1520 2064 1520
WIRE 1568 1552 1504 1552
WIRE 2064 1552 2064 1520
WIRE 2064 1552 2016 1552
WIRE 2144 1568 2144 1520
WIRE 1504 1632 1504 1552
WIRE 1648 1632 1648 1616
WIRE 1792 1632 1792 1616
WIRE 1936 1632 1936 1616
WIRE 2144 1664 2144 1632
WIRE 1376 1712 1376 1488
WIRE 1504 1744 1504 1712
WIRE 1376 1808 1376 1792
SYMBOL cap 2128 1568 R0
SYMATTR InstName C3
SYMATTR Value 10000p
SYMBOL VOLTAGE 1328 1232 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL ind 1728 1088 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 200
SYMBOL cap 2288 1344 R0
SYMATTR InstName C2
SYMATTR Value 10000p
SYMBOL RES 1456 1072 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL cap 2144 1216 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage 1504 1616 R0
SYMATTR InstName V3
SYMATTR Value PULSE(0 3 2.5u 0 0 5u 10u)
SYMBOL voltage 1376 1696 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3 0 0 0 5u 10u)
SYMBOL POWERPRODUCTS\\LT1336 1792 1392 R0
SYMATTR InstName U1
SYMBOL res 1456 1296 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL diode 2048 1088 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG 1648 1632 0
FLAG 1792 1632 0
FLAG 1936 1632 0
FLAG 2144 1664 0
FLAG 1328 1344 0
FLAG 1376 1808 0
FLAG 1504 1744 0
FLAG 2160 1440 0
TEXT 1968 1784 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\1ed6ccec8ddc__Fig2_23_T_H_MSD.asc
* Generated by LTspice 26.0.1 for Windows.
* Run simulation\nMake waveforms active window\nGo to View -> FFT (note signals are displayed in RMS)\nPress OK then \ngo to Plot Settings -> Reload Plot Settings
A1 Vin 0 0 clock 0 0 Vout 0 SAMPLEHOLD REF=0.5
Vclock clock 0 PULSE(0 1 0 0 0 4.9n 10n)
Vin Vin 0 SINE(0.5 0.5 3MEG)
.tran 0 2000n 0 .1n uic
.model switmod SW
.options plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1344 696
WIRE 384 208 320 208
WIRE 736 208 384 208
WIRE 736 240 672 240
WIRE 992 256 912 256
WIRE 320 272 320 208
WIRE 736 304 608 304
WIRE 608 336 608 304
WIRE 320 416 320 352
WIRE 608 480 608 416
SYMBOL SpecialFunctions\\sample 816 240 R0
WINDOW 3 -31 111 Left 0
SYMATTR InstName A1
SYMATTR Value REF=0.5
SYMBOL voltage 608 320 R0
WINDOW 0 36 42 Left 0
WINDOW 3 35 69 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vclock
SYMATTR Value PULSE(0 1 0 0 0 4.9n 10n)
SYMBOL voltage 320 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value SINE(0.5 0.5 3MEG)
FLAG 320 416 0
FLAG 384 208 Vin
FLAG 608 480 0
FLAG 608 304 clock
FLAG 992 256 Vout
FLAG 672 240 0
TEXT 920 144 Left 0 !.tran 0 2000n 0 .1n uic
TEXT 920 176 Left 0 !.model switmod SW\n.options plotwinsize=0
TEXT 296 8 Left 0 ;Run simulation\nMake waveforms active window\nGo to View -> FFT (note signals are displayed in RMS)\nPress OK then \ngo to Plot Settings -> Reload Plot Settings
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8607.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N006 0 18.2K
C1 N004 0 .001
V1 IN 0 24
C2 N001 0 1
L1 N003 OUT 4.7 Rser=3m
C3 N002 N003 0.1
C4 OUT 0 22 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
R2 OUT N005 1Meg
R3 N005 0 187K
C5 OUT N005 10p
Rload OUT 0 6.67
XU1 N002 N003 N001 N006 NC_01 N005 N004 NC_02 IN IN 0 LT8607 ;pnba BST)SW)INTVcc)Rt)Sync)FB)TR/SS)PG)Vin)EN/UV)GND
.tran 500u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8607.asy)
.lib LT8607.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1044 680
WIRE 96 -64 0 -64
WIRE 256 -64 96 -64
WIRE 0 -48 0 -64
WIRE 256 -48 256 -64
WIRE 96 0 96 -64
WIRE 112 0 96 0
WIRE 416 0 400 0
WIRE 496 0 480 0
WIRE 0 48 0 32
WIRE 432 96 400 96
WIRE 432 112 432 96
WIRE 432 192 432 176
WIRE 432 192 400 192
WIRE 496 192 432 192
WIRE 608 192 576 192
WIRE 720 192 608 192
WIRE 816 192 720 192
WIRE 896 192 816 192
WIRE 912 192 896 192
WIRE 608 208 608 192
WIRE 720 208 720 192
WIRE 816 208 816 192
WIRE 912 208 912 192
WIRE 32 288 0 288
WIRE 112 288 96 288
WIRE 608 288 400 288
WIRE 720 288 720 272
WIRE 720 288 608 288
WIRE 608 304 608 288
WIRE 816 304 816 272
WIRE 912 304 912 288
WIRE 16 384 0 384
WIRE 112 384 96 384
WIRE 416 384 400 384
WIRE 608 400 608 384
FLAG 0 384 0
FLAG 0 288 0
FLAG 0 48 0
FLAG 496 0 0
FLAG 816 304 0
FLAG 608 400 0
FLAG 912 304 0
FLAG 896 192 OUT
FLAG 0 -64 IN
FLAG 416 384 0
SYMBOL res 112 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 18.2K
SYMBOL cap 96 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .001
SYMBOL voltage 0 -64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 416 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL ind 480 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=3m
SYMBOL cap 416 112 R0
SYMATTR InstName C3
SYMATTR Value 0.1
SYMBOL cap 800 208 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL res 592 192 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 592 288 R0
SYMATTR InstName R3
SYMATTR Value 187K
SYMBOL cap 704 208 R0
SYMATTR InstName C5
SYMATTR Value 10p
SYMBOL res 896 192 R0
SYMATTR InstName Rload
SYMATTR Value 6.67
SYMBOL LT8607 256 192 R0
SYMATTR InstName U1
TEXT 736 384 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\f6acf7870d97_Assignment_3a__vi_.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Half Wave Rectifier Circuit (with 10microF Capacitor) (Practical)
R1 N002 0 1000
V1 N001 0 SINE(0 5 1000) Rser=0.001
C1 N002 0 0.00001
D1 N001 N002 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5ms
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 304 80 192 80
WIRE 464 80 368 80
WIRE 576 80 464 80
WIRE 192 128 192 80
WIRE 464 128 464 80
WIRE 576 144 576 80
WIRE 192 256 192 208
WIRE 288 256 192 256
WIRE 464 256 464 208
WIRE 464 256 288 256
WIRE 576 256 576 208
WIRE 576 256 464 256
WIRE 288 288 288 256
SYMBOL diode 304 96 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 448 112 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL cap 560 144 R0
SYMATTR InstName C1
SYMATTR Value 0.00001
SYMBOL voltage 192 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.001
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1000)
FLAG 288 288 0
TEXT 128 288 Left 2 !.tran 5ms
TEXT -24 8 Left 2 ;Positive Half Wave Rectifier Circuit (with 10microF Capacitor) (Practical)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1201.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 1 input\nParameter performance modeled at 15V dual supply\nBandwidth modeled at 520 MHz only\nPin Capacitance not included
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1201.asy)
V1 vS 0 SINE(0 15 1k)
V4 v- 0 -15
XU1 v+ v- vIN vS vD 0 ADG1201 ;pnba Vdd)Vss)IN)S)D)GND
V2 vIN 0 PULSE(0 3 0 1u 1u 5m 10m)
V3 v+ 0 15
R1 vD 0 301
.tran 15m
.lib ADG1201.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 936 832
WIRE 240 144 240 96
WIRE -80 224 -112 224
WIRE 112 224 0 224
WIRE 144 224 112 224
WIRE 384 224 336 224
WIRE 464 224 384 224
WIRE 464 256 464 224
WIRE 112 288 48 288
WIRE 144 288 112 288
WIRE -320 336 -320 304
WIRE -192 336 -192 304
WIRE 48 336 48 288
WIRE 464 352 464 336
WIRE 304 448 304 400
WIRE -320 464 -320 416
WIRE -192 464 -192 416
WIRE 48 464 48 416
WIRE 176 464 176 400
SYMBOL voltage -320 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL voltage 16 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 15 1k)
SYMBOL voltage 48 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -20 198 Left 2
SYMATTR Value PULSE(0 3 0 1u 1u 5m 10m)
SYMATTR InstName V2
SYMBOL ADG1201 240 272 R0
SYMATTR InstName U1
SYMBOL res 448 240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage -192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -15
FLAG -112 224 0
FLAG 48 464 0
FLAG 464 352 0
FLAG 304 448 0
FLAG 384 224 vD
FLAG 112 224 vS
FLAG 112 288 vIN
FLAG -192 304 v-
FLAG 240 96 v+
FLAG -192 464 0
FLAG 176 464 v-
FLAG -320 304 v+
FLAG -320 464 0
TEXT 400 416 Left 2 !.tran 15m
TEXT -360 -16 Left 2 ;Note:\nSwitch shown for a logic 1 input\nParameter performance modeled at 15V dual supply\nBandwidth modeled at 520 MHz only\nPin Capacitance not included
* Z:\home\khalils\Downloads\files\data\raw_asc\330593b7c86d_dual_osc.asc
* Generated by LTspice 26.0.1 for Windows.
A1 N006 0 0 0 0 N003 0 0 SCHMITT Vhigh=3, Vt=1.35, Vh=0.3, trise=20n, tfall=20n
A2 N001 0 0 0 0 N002 0 0 SCHMITT Vhigh=3, Vt=1.35, Vh=0.3, trise=20n, tfall=20n
A3 N002 N003 N004 N004 N004 N005 N004 N004 AND trise=20n, tfall=20n, Vt=1.35
C3 N001 0 1p
R3 V_out N005 4.7k
C2 N001 0 200p
C4 V_out 0 26p
R2 N002 N001 4.7k
R1 N003 N006 4.7k
C1 N006 0 200p
.tran 0 1us 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 904 756
WIRE 16 0 -64 0
WIRE 64 0 16 0
WIRE 112 0 64 0
WIRE 208 0 176 0
WIRE 272 0 208 0
WIRE 16 16 16 0
WIRE 64 64 64 0
WIRE 96 64 64 64
WIRE 208 64 208 0
WIRE 208 64 176 64
WIRE 272 80 272 0
WIRE 352 80 272 80
WIRE -64 96 -64 64
WIRE 16 96 16 80
WIRE 16 96 -64 96
WIRE 352 96 272 96
WIRE 448 96 416 96
WIRE 16 112 16 96
WIRE 352 112 336 112
WIRE 336 128 336 112
WIRE 352 128 336 128
WIRE 464 128 416 128
WIRE 592 128 544 128
WIRE 608 128 592 128
WIRE 336 160 336 128
WIRE 352 160 352 144
WIRE 352 160 336 160
WIRE 368 160 368 144
WIRE 368 160 352 160
WIRE 448 160 448 96
WIRE 448 160 368 160
WIRE 592 160 592 128
WIRE 64 224 16 224
WIRE 112 224 64 224
WIRE 208 224 176 224
WIRE 272 224 272 96
WIRE 272 224 208 224
WIRE 16 240 16 224
WIRE 592 240 592 224
WIRE 64 288 64 224
WIRE 96 288 64 288
WIRE 208 288 208 224
WIRE 208 288 176 288
WIRE 16 336 16 304
SYMBOL cap 0 16 R0
SYMATTR InstName C2
SYMATTR Value 200p
SYMBOL cap 576 160 R0
SYMATTR InstName C4
SYMATTR Value 26p
SYMBOL Digital\\and 384 48 R0
WINDOW 3 0 0 Invisible 0
SYMATTR Value trise=20n, tfall=20n, Vt=1.35
SYMATTR InstName A3
SYMBOL Digital\\schmtinv 112 160 R0
WINDOW 3 -71 111 Invisible 0
SYMATTR Value Vhigh=3, Vt=1.35, Vh=0.3, trise=20n, tfall=20n
SYMATTR InstName A1
SYMBOL Digital\\schmtinv 112 -64 R0
WINDOW 3 -71 111 Invisible 0
SYMATTR Value Vhigh=3, Vt=1.35, Vh=0.3, trise=20n, tfall=20n
SYMATTR InstName A2
SYMBOL cap -80 0 R0
SYMATTR InstName C3
SYMATTR Value 1p
SYMBOL cap 0 240 R0
SYMATTR InstName C1
SYMATTR Value 200p
SYMBOL res 192 48 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 4.7k
SYMBOL res 192 272 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL res 560 112 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 4.7k
FLAG 16 336 0
FLAG 16 112 0
FLAG 608 128 V_out
FLAG 592 240 0
TEXT 328 480 Left 0 !.tran 0 1us 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3130.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3130.asy)
C2 N002 N004 22n
C3 N006 0 4.7
C1 N001 N003 22n
R1 OUT N005 3.83Meg
V1 IN 0 3.6
L1 N001 N002 10 Rser=50m Rpar=10K
R5 OUT N007 1Meg
Rload OUT 0 240
XU1 0 N003 N001 IN IN IN N006 N006 N005 N006 0 0 N007 OUT N004 N002 LTC3130 ;pnba GND)BST1)SW1)PVin)Vin)Run)Vcc)MPPC)FB)Ilim)Mode)EXTVcc)Pgood)Vout)BST2)SW2
C4 OUT N005 10p Rser=200K
R2 N005 0 348K
C5 OUT 0 10 Rser=7m
.tran 8m startup
.lib LTC3130.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 680
WIRE 144 -160 -16 -160
WIRE 160 -160 144 -160
WIRE 400 -160 240 -160
WIRE -16 -112 -16 -160
WIRE 400 -112 400 -160
WIRE 144 -80 144 -160
WIRE 240 -80 240 -160
WIRE -16 0 -16 -48
WIRE 48 0 -16 0
WIRE 400 0 400 -48
WIRE 400 0 336 0
WIRE -16 80 -112 80
WIRE 48 80 -16 80
WIRE 400 80 336 80
WIRE 560 80 400 80
WIRE 688 80 560 80
WIRE 736 80 688 80
WIRE 848 80 736 80
WIRE -112 96 -112 80
WIRE 736 96 736 80
WIRE 848 96 848 80
WIRE -16 160 -16 80
WIRE 48 160 -16 160
WIRE 400 160 400 144
WIRE 400 160 336 160
WIRE 560 160 400 160
WIRE 560 176 560 160
WIRE -112 192 -112 176
WIRE 736 192 736 160
WIRE 848 192 848 176
WIRE 48 240 32 240
WIRE 400 240 336 240
WIRE 560 272 560 256
WIRE -16 320 -16 160
WIRE 48 320 -16 320
WIRE 352 320 336 320
WIRE 48 400 16 400
WIRE 528 400 336 400
WIRE 688 400 688 80
WIRE 688 400 608 400
WIRE -64 480 -80 480
WIRE 16 480 16 400
WIRE 16 480 0 480
WIRE 48 480 16 480
WIRE 352 480 336 480
WIRE 16 560 16 480
WIRE 400 560 400 240
WIRE 400 560 16 560
SYMBOL voltage -112 80 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL cap 720 96 R0
SYMATTR Value 10
SYMATTR SpiceLine Rser=7m
SYMATTR InstName C5
SYMBOL LTC3130 192 224 R0
SYMATTR InstName U1
SYMBOL cap 0 464 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 4.7
SYMBOL cap 384 -112 R0
SYMATTR InstName C2
SYMATTR Value 22n
SYMBOL res 832 80 R0
SYMATTR InstName Rload
SYMATTR Value 240
SYMBOL res 544 64 R0
WINDOW 3 31 75 Left 2
SYMATTR Value 3.83Meg
SYMATTR InstName R1
SYMBOL res 544 160 R0
WINDOW 3 34 78 Left 2
SYMATTR Value 348K
SYMATTR InstName R2
SYMBOL cap -32 -112 R0
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL ind 144 -144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=50m Rpar=10K
SYMBOL res 624 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL cap 384 80 R0
WINDOW 3 34 34 Left 2
WINDOW 39 21 57 Left 2
WINDOW 0 28 11 Left 2
SYMATTR Value 10p
SYMATTR SpiceLine Rser=200K
SYMATTR InstName C4
FLAG 352 480 0
FLAG -112 192 0
FLAG -80 480 0
FLAG 560 272 0
FLAG 736 192 0
FLAG 848 192 0
FLAG 848 80 OUT
FLAG -112 80 IN
FLAG 32 240 0
FLAG 352 320 0
TEXT 680 536 Left 2 !.tran 8m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1086-3.6.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1086-3.6.asy)
C1 OUT 0 10
V1 IN 0 PWL(0 0 1 10) Rser=0.1
Rload OUT 0 10
XU1 0 OUT IN LT1086-3.6 ;pnba ADJ)OUT)IN
.tran 1
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1328 896
WIRE 1888 896 1808 896
WIRE 1984 896 1888 896
WIRE 1328 912 1328 896
WIRE 1888 912 1888 896
WIRE 1984 912 1984 896
WIRE 1328 1008 1328 992
WIRE 1888 1008 1888 976
WIRE 1984 1008 1984 992
WIRE 1680 1040 1680 992
SYMBOL RES 1968 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL VOLTAGE 1328 896 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMATTR SpiceLine Rser=0.1
SYMBOL cap 1872 912 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LT1086-3.6 1680 896 R0
SYMATTR InstName U1
FLAG 1984 896 OUT
FLAG 1984 1008 0
FLAG 1328 1008 0
FLAG 1888 1008 0
FLAG 1680 1040 0
FLAG 1328 896 IN
TEXT 1856 1096 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\2236ff8f50c0_1799.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1799.asy)
R1 N001 N002 10K
XU1 N001 0 N002 0 OUT LTC1799 ;pnba V+)GND)SET)DIV)OUT
V1 N001 0 3
.tran 10u
.lib LTC1799.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 80 -112 80
WIRE 96 80 -16 80
WIRE 352 80 320 80
WIRE -112 112 -112 80
WIRE -16 112 -16 80
WIRE 96 160 80 160
WIRE -112 208 -112 192
WIRE -16 240 -16 192
WIRE 96 240 -16 240
WIRE 336 240 320 240
SYMBOL voltage -112 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL SpecialFunctions\\LTC1799 208 160 R0
SYMATTR InstName U1
SYMBOL res -32 96 R0
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 80 160 0
FLAG 336 240 0
FLAG -112 208 0
FLAG 352 80 OUT
TEXT 408 256 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1964-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1964-5.asy)
C1 OUT 0 1
Rload OUT 0 1K
XU1 0 IN N001 IN OUT LT1964-5 ;pnba GND)IN)BYP)_SHDN)OUT
V1 IN 0 PWL(0 0 1 -10)
.tran 1
.lib LT1964.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 48 -208 48
WIRE 32 48 16 48
WIRE 400 48 320 48
WIRE 496 48 400 48
WIRE -208 64 -208 48
WIRE 400 64 400 48
WIRE 496 64 496 48
WIRE 16 144 16 48
WIRE 32 144 16 144
WIRE 336 144 320 144
WIRE -208 160 -208 144
WIRE 400 160 400 128
WIRE 496 160 496 144
WIRE 176 240 176 208
SYMBOL res 480 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL cap 384 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 -10)
SYMBOL PowerProducts\\LT1964-5 176 96 R0
SYMATTR InstName U1
FLAG -208 160 0
FLAG 400 160 0
FLAG 496 160 0
FLAG 176 240 0
FLAG 496 48 OUT
FLAG -208 48 IN
TEXT 384 216 Left 2 !.tran 1