Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1764.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1764.asy)
C4 OUT 0 10
C3 N002 0 1
R2 N001 IN 50K
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1764 Radj=1T ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
V1 IN 0 1.8
R1 OUT 0 .6
C1 N004 0 1
R3 0 N005 10K
C2 N003 0 10n
.tran 1m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 464 320 448 320
WIRE 224 384 224 368
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value .6
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL ADP1764 224 176 R0
SYMATTR InstName U1
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL res 464 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 320 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\39ade6f37727_Cpia_de_Ex_02_AnaliseDC.asc
* Generated by LTspice 26.0.1 for Windows.
R2 V11 N002 470
VX1 N001 0 15V
R3 V11 0 220
R1 V11 N001 1k
VX2 N002 0 0V
.DC Vx1 0V 20V 0.1V Vx2 -1V 2V 1V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 16 304 16
WIRE -64 64 -176 64
WIRE 160 64 16 64
WIRE 304 64 304 16
WIRE 304 64 160 64
WIRE 336 64 304 64
WIRE 160 96 160 64
WIRE -176 144 -176 64
WIRE 336 144 336 64
WIRE 160 208 160 176
WIRE -176 320 -176 224
WIRE 160 320 160 288
WIRE 336 320 336 224
SYMBOL res 320 128 R0
SYMATTR InstName R3
SYMATTR Value 220
SYMBOL voltage 160 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -49 5 Left 0
WINDOW 3 -44 96 Left 0
SYMATTR InstName VX2
SYMATTR Value 0V
SYMBOL res 144 80 R0
SYMATTR InstName R2
SYMATTR Value 470
SYMBOL res 32 48 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -176 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -52 7 Left 0
WINDOW 3 -60 100 Left 0
SYMATTR InstName VX1
SYMATTR Value 15V
FLAG -176 320 0
FLAG 160 320 0
FLAG 336 320 0
FLAG 320 16 V11
TEXT -192 392 Left 0 !.DC Vx1 0V 20V 0.1V   Vx2 -1V 2V 1V
* Z:\home\khalils\Downloads\files\data\raw_asc\29a3595432bf_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2, XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
V2 2V5 0 2.5
R2 N002 Vosc 20k
XU1 2V5 N001 5V 0 Vosc level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 5V 0 5
C1 Vosc N001 2n
R6 Vosc 0 1k
XU2 N002 2V5 5V 0 Vd level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R5 Vd N002 100k
V4 Vsqr 0 PULSE(0 5 0 100n 100n 10u 20u)
V3 Vtri 0 PULSE(1 4 0 10u 10u 1u 22u)
R1 N001 Vd 10k
.tran 0 1m 0 10n uic ;
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 884
WIRE -736 -208 -816 -208
WIRE -544 -208 -672 -208
WIRE -688 -80 -688 -112
WIRE -896 -64 -944 -64
WIRE -816 -64 -816 -208
WIRE -720 -64 -816 -64
WIRE -160 -64 -224 -64
WIRE -592 -48 -656 -48
WIRE -544 -48 -544 -208
WIRE -544 -48 -592 -48
WIRE -480 -48 -544 -48
WIRE 0 -48 -96 -48
WIRE -720 -32 -768 -32
WIRE -160 -32 -224 -32
WIRE -592 -16 -592 -48
WIRE -768 0 -768 -32
WIRE -304 0 -336 0
WIRE -224 0 -224 -32
WIRE -688 16 -688 -16
WIRE -224 64 -224 0
WIRE -176 64 -224 64
WIRE 0 64 0 -48
WIRE 0 64 -96 64
WIRE -336 240 -336 208
WIRE -144 240 -144 208
WIRE -336 496 -336 464
WIRE -336 784 -336 736
SYMBOL res -800 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL OpAmps\\UniversalOpAmp2 -688 -48 R0
SYMATTR InstName U1
SYMBOL res -208 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 20k
SYMBOL res -608 -32 R0
SYMATTR InstName R6
SYMATTR Value 1k
SYMBOL voltage -336 768 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 5 0 100n 100n 10u 20u)
SYMBOL voltage -336 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(1 4 0 10u 10u 1u 22u)
SYMBOL res -80 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 100k
SYMBOL OpAmps\\UniversalOpAmp2 -128 -48 R0
SYMATTR InstName U2
SYMBOL voltage -144 224 R0
SYMATTR InstName V2
SYMATTR Value 2.5
SYMBOL voltage -336 224 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap -672 -224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2n
FLAG -336 0 Vosc
FLAG -224 -64 2V5
FLAG -128 -16 0
FLAG -128 -80 5V
FLAG 0 -48 Vd
FLAG -336 576 0
FLAG -336 464 Vtri
FLAG -336 320 0
FLAG -336 208 5V
FLAG -144 320 0
FLAG -144 208 2V5
FLAG -768 0 2V5
FLAG -688 16 0
FLAG -688 -112 5V
FLAG -592 64 0
FLAG -480 -48 Vosc
FLAG -944 -64 Vd
FLAG -336 736 Vsqr
FLAG -336 864 0
TEXT -1144 -152 Left 2 !.tran 0 1m 0 10n uic ;
* Z:\tmp\asc_dec_bjh7r6w2\0785d0e341a4_2934-2_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 PWL(0 0 3.6 3.6 16 3.6 19.6 0 20.1 0 23.7 3.6)
MQ1 N004 N005 0 0 BSS123
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 892 680
WIRE -48 -32 -592 -32
WIRE -592 -16 -592 -32
WIRE -592 80 -592 64
WIRE -48 96 -48 80
WIRE -48 192 -48 176
WIRE 128 192 -48 192
WIRE -48 208 -48 192
WIRE 128 272 96 272
WIRE 96 288 96 272
WIRE -48 320 -48 288
WIRE 240 336 240 304
WIRE 48 368 -16 368
WIRE -16 384 -16 368
WIRE 96 400 96 384
WIRE -16 480 -16 464
SYMBOL voltage -592 -32 R0
WINDOW 123 24 146 Left 0
WINDOW 39 24 125 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 3.6 3.6 16 3.6 19.6 0 20.1 0 23.7 3.6)
SYMBOL nmos 48 288 R0
SYMATTR InstName Q1
SYMATTR Value BSS123
FLAG -48 320 0
FLAG 240 336 0
FLAG -16 480 0
FLAG -592 80 0
FLAG 96 400 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3971-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N005 0 49.9K
L1 N006 OUT 4.7
C1 OUT 0 22
Rload OUT 0 2.75
V1 IN 0 24
D1 0 N006 DFLS220L
C2 N004 N006 .47
R5 N001 0 1Meg
R6 IN N001 5Meg
C3 N003 0 .001
XU1 OUT N004 N006 IN N001 OUT N003 N005 N002 MP_01 0 LT3971-3.3 ;pnba BD)Boost)SW)Vin)EN)Vout)SS)Rt)PG))GND
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3971-3.3.asy)
.lib LT3971-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE -48 -64 -160 -64
WIRE 400 -64 -48 -64
WIRE -160 -48 -160 -64
WIRE -48 -48 -48 -64
WIRE -160 48 -160 32
WIRE -48 48 -48 32
WIRE 80 48 -48 48
WIRE 400 48 400 -64
WIRE 400 48 368 48
WIRE -48 64 -48 48
WIRE 80 144 64 144
WIRE 592 144 368 144
WIRE -48 160 -48 144
WIRE 0 240 -32 240
WIRE 80 240 64 240
WIRE 400 240 368 240
WIRE 400 256 400 240
WIRE -16 336 -32 336
WIRE 80 336 64 336
WIRE 400 336 400 320
WIRE 400 336 368 336
WIRE 480 336 400 336
WIRE 592 336 592 144
WIRE 592 336 560 336
WIRE 656 336 592 336
WIRE 736 336 656 336
WIRE 400 352 400 336
WIRE 736 352 736 336
WIRE 656 368 656 336
WIRE 80 432 64 432
WIRE 592 432 592 336
WIRE 592 432 368 432
WIRE 400 448 400 416
WIRE 656 448 656 432
WIRE 736 448 736 432
FLAG 64 432 0
FLAG -32 336 0
FLAG 736 448 0
FLAG 656 448 0
FLAG -160 48 0
FLAG 400 448 0
FLAG -48 160 0
FLAG -32 240 0
FLAG -160 -64 IN
FLAG 736 336 OUT
SYMBOL res 80 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 49.9K
SYMBOL ind 464 352 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL cap 640 368 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 720 336 R0
SYMATTR InstName Rload
SYMATTR Value 2.75
SYMBOL voltage -160 -64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL schottky 384 416 M180
WINDOW 0 26 68 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value DFLS220L
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 384 256 R0
WINDOW 3 24 54 Left 2
SYMATTR Value .47
SYMATTR InstName C2
SYMBOL res -64 48 R0
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL res -64 -64 R0
SYMATTR InstName R6
SYMATTR Value 5Meg
SYMBOL cap 64 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL PowerProducts\\LT3971-3.3 224 240 R0
SYMATTR InstName U1
TEXT 648 488 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0741e45c04d2_pMOS_currentMirror_array.asc
* Generated by LTspice 26.0.1 for Windows.
XM1 in in VDD VDD PMOS_mobius m=1 ;pnba D)G)S)B
XM2 out1 in VDD VDD PMOS_mobius m=1 ;pnba D)G)S)B
XM3 out2 in VDD VDD PMOS_mobius m=2 ;pnba D)G)S)B
XM4 out4 in VDD VDD PMOS_mobius m=4 ;pnba D)G)S)B
XM5 out8 in VDD VDD PMOS_mobius m=8 ;pnba D)G)S)B
XM6 out16 in VDD VDD PMOS_mobius m=16 ;pnba D)G)S)B
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1572 680
WIRE 640 112 416 112
WIRE 864 112 640 112
WIRE 1088 112 864 112
WIRE 1312 112 1088 112
WIRE 336 160 288 160
WIRE 368 160 336 160
WIRE 512 160 368 160
WIRE 576 160 512 160
WIRE 720 160 576 160
WIRE 784 160 720 160
WIRE 944 160 784 160
WIRE 1008 160 944 160
WIRE 1168 160 1008 160
WIRE 1232 160 1168 160
WIRE 1392 160 1232 160
WIRE 1456 160 1392 160
WIRE 336 192 336 160
WIRE 512 192 512 160
WIRE 720 192 720 160
WIRE 944 192 944 160
WIRE 1168 192 1168 160
WIRE 1392 192 1392 160
WIRE 416 208 416 112
WIRE 416 208 384 208
WIRE 464 208 416 208
WIRE 640 208 640 112
WIRE 672 208 640 208
WIRE 864 208 864 112
WIRE 896 208 864 208
WIRE 1088 208 1088 112
WIRE 1120 208 1088 208
WIRE 1312 208 1312 112
WIRE 1344 208 1312 208
WIRE 288 240 288 160
WIRE 336 240 288 240
WIRE 576 240 576 160
WIRE 576 240 512 240
WIRE 784 240 784 160
WIRE 784 240 720 240
WIRE 1008 240 1008 160
WIRE 1008 240 944 240
WIRE 1232 240 1232 160
WIRE 1232 240 1168 240
WIRE 1456 240 1456 160
WIRE 1456 240 1392 240
WIRE 336 304 336 288
WIRE 416 304 416 208
WIRE 416 304 336 304
WIRE 336 336 336 304
WIRE 512 336 512 288
WIRE 720 336 720 288
WIRE 944 336 944 288
WIRE 1168 336 1168 288
WIRE 1392 336 1392 288
FLAG 368 160 VDD
FLAG 336 336 in
IOPIN 336 336 BiDir
FLAG 512 336 out1
IOPIN 512 336 BiDir
FLAG 720 336 out2
IOPIN 720 336 BiDir
FLAG 944 336 out4
IOPIN 944 336 BiDir
FLAG 1168 336 out8
IOPIN 1168 336 BiDir
FLAG 1392 336 out16
IOPIN 1392 336 BiDir
SYMBOL pmos4 384 288 R180
WINDOW 123 56 94 Left 2
SYMATTR Value2 m=1
SYMATTR InstName M1
SYMATTR Value PMOS_mobius
SYMATTR Prefix X
SYMBOL pmos4 464 288 M180
WINDOW 123 56 94 Left 2
SYMATTR Value2 m=1
SYMATTR InstName M2
SYMATTR Value PMOS_mobius
SYMATTR Prefix X
SYMBOL pmos4 672 288 M180
WINDOW 123 56 94 Left 2
SYMATTR Value2 m=2
SYMATTR InstName M3
SYMATTR Value PMOS_mobius
SYMATTR Prefix X
SYMBOL pmos4 896 288 M180
WINDOW 123 56 94 Left 2
SYMATTR Value2 m=4
SYMATTR InstName M4
SYMATTR Value PMOS_mobius
SYMATTR Prefix X
SYMBOL pmos4 1120 288 M180
WINDOW 123 56 94 Left 2
SYMATTR Value2 m=8
SYMATTR InstName M5
SYMATTR Value PMOS_mobius
SYMATTR Prefix X
SYMBOL pmos4 1344 288 M180
WINDOW 123 56 94 Left 2
SYMATTR Value2 m=16
SYMATTR InstName M6
SYMATTR Value PMOS_mobius
SYMATTR Prefix X
* Z:\tmp\asc_dec_bjh7r6w2\1513269bf28e_tc3_sim_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
I1 0 N001 5A
R4 N005 N003 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 -16 112 -16
WIRE 352 -16 240 -16
WIRE 528 -16 432 -16
WIRE 240 48 240 -16
WIRE -48 208 -48 -16
WIRE 32 208 -48 208
WIRE 240 208 240 128
WIRE 240 208 112 208
WIRE 352 208 240 208
WIRE 528 208 432 208
WIRE 240 256 240 208
WIRE -48 384 -48 208
WIRE 32 384 -48 384
WIRE 240 384 240 336
WIRE 240 384 112 384
WIRE 352 384 240 384
SYMBOL current 240 128 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 5A
SYMBOL res 128 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10
FLAG 240 208 0
* Z:\home\khalils\Downloads\files\data\raw_asc\83dea122c2ca_hpf.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
V3 Vin 0 AC 1.
C2 N003 N002 1n
V1 +Vcc 0 12
C1 Vin N003 1n
R3 N002 0 10k
R4 N003 Vout 10k
R2 N001 0 10k
XU1 N002 N001 +Vcc -Vcc Vout level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R1 Vout N001 4.7k
V2 -Vcc 0 -12
.ac dec 1000 1000 30k
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 224 256 224
WIRE 384 224 368 224
WIRE 256 352 256 224
WIRE 256 352 224 352
WIRE 304 352 256 352
WIRE 384 368 384 224
WIRE 384 368 368 368
WIRE 304 384 272 384
WIRE 272 416 272 384
WIRE 32 432 0 432
WIRE 96 432 80 432
WIRE 128 432 96 432
WIRE 160 432 128 432
WIRE 272 432 272 416
WIRE 272 432 224 432
WIRE 128 448 128 432
WIRE 128 544 128 528
WIRE 384 544 384 368
WIRE 384 544 128 544
SYMBOL cap 160 448 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL res 240 336 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 256 400 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 112 432 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL voltage -64 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL OpAmps\\UniversalOpAmp 336 368 R0
SYMATTR InstName U1
SYMBOL cap 32 448 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL voltage 16 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL res 384 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL voltage 96 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value AC 1.
FLAG 16 256 0
FLAG -64 256 0
FLAG 96 256 0
FLAG -64 176 +Vcc
FLAG 16 176 -Vcc
FLAG 96 176 Vin
FLAG 336 336 +Vcc
FLAG 336 400 -Vcc
FLAG 272 496 0
FLAG 144 352 0
FLAG 384 368 Vout
FLAG 0 432 Vin
TEXT -88 568 Left 2 !.ac dec 1000 1000 30k
* Z:\home\khalils\Downloads\files\data\raw_asc\46faddf66dc0_final_schematic.asc
* Generated by LTspice 26.0.1 for Windows.
* DC Sweeping
* .op
* .tran 5m
* .tf V(Vout) V2
* EDIC Winter Internship Assignment\nCommon Source Amplifier with Resistive(Passive) Load\nMohammed Ahmed Majid\nGP5405, 23EEBEA666
;.step param w 0.18u 7.2u 0.18u
CL Vout 0 1p
M1 Vout Vin 0 0 NMOS l=0.36u w={w}
V1 Vdd 0 1.8
Rd Vdd Vout 31.8k
V2 Vin 0 SINE(0.65 1m 1k) AC 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include tsmc180.txt
.param w 3.97u
.ac dec 10 10 1gig
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 -32 240 -80
WIRE 240 80 240 48
WIRE 464 80 240 80
WIRE 528 80 464 80
WIRE 240 96 240 80
WIRE 464 112 464 80
WIRE -400 144 -400 96
WIRE -256 144 -256 96
WIRE 336 144 240 144
WIRE 192 176 112 176
WIRE 240 224 240 192
WIRE 336 224 336 144
WIRE 336 224 240 224
WIRE 464 224 464 176
WIRE -400 288 -400 224
WIRE -256 288 -256 224
WIRE 240 288 240 224
IOPIN 528 80 Out
SYMBOL voltage -256 128 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0.65 1m 1k)
SYMATTR Value2 AC 1
SYMBOL res 224 -48 R0
SYMATTR InstName Rd
SYMATTR Value 31.8k
SYMBOL nmos4 192 96 R0
WINDOW 123 248 144 Right 2
SYMATTR InstName M1
SYMATTR Value2 l=0.36u w={w}
SYMBOL cap 448 112 R0
SYMATTR InstName CL
SYMATTR Value 1p
SYMBOL voltage -400 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
FLAG 240 288 0
FLAG 464 224 0
FLAG 528 80 Vout
FLAG 112 176 Vin
FLAG 240 -80 Vdd
FLAG -256 96 Vin
FLAG -400 96 Vdd
FLAG -400 288 0
FLAG -256 288 0
TEXT -376 -144 Left 2 !.include tsmc180.txt
TEXT -376 -120 Left 2 !.param w 3.97u
TEXT -384 -96 Left 2 !;.step param w 0.18u 7.2u 0.18u
TEXT -552 -120 Left 2 ;DC Sweeping
TEXT -376 -72 Left 2 ;.op
TEXT -376 -48 Left 2 ;.tran 5m
TEXT -376 -24 Left 2 ;.tf V(Vout) V2
TEXT -376 0 Left 2 !.ac dec 10 10 1gig
TEXT -552 -304 Left 2 ;EDIC Winter Internship Assignment\nCommon Source Amplifier with Resistive(Passive) Load\nMohammed Ahmed Majid\nGP5405, 23EEBEA666
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4609.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4609.asy)
C1 OUT 0 330
R3 N006 N004 100K
C2 N011 0 .002
R1 N003 0 7.5m
V1 IN 0 18
XU1 N009 OUT 0 N001 IN N002 N003 N003 0 N006 N004 N010 N005 N011 IN N007 N008 0 0 NC_01 LTM4609 ;pnba FB)Vout)SGND)SW2)Vin)SW1)Rsense)Sense+)Sense-)Pgood)INTVcc)PLLFLTR)STBYMD)SS)Run)Comp)PLLIN)FCB)PGND)EXTVcc
Rload OUT 0 15
R2 0 N009 2.74K
L1 N001 N002 5.6
.tran 100m startup
.lib LTM4609.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1268 680
WIRE 208 -96 176 -96
WIRE 320 -96 288 -96
WIRE 176 -48 176 -96
WIRE 320 -48 320 -96
WIRE 32 16 -80 16
WIRE 64 16 32 16
WIRE 560 16 448 16
WIRE 656 16 560 16
WIRE -80 32 -80 16
WIRE 560 32 560 16
WIRE 656 32 656 16
WIRE 32 80 32 16
WIRE 64 80 32 80
WIRE 464 80 448 80
WIRE -80 128 -80 112
WIRE 560 128 560 96
WIRE 656 128 656 112
WIRE 480 144 448 144
WIRE 512 144 480 144
WIRE 512 160 512 144
WIRE 64 208 -48 208
WIRE 480 208 480 144
WIRE 480 208 448 208
WIRE -48 240 -48 208
WIRE 64 272 48 272
WIRE 512 272 512 240
WIRE 512 272 448 272
WIRE 512 288 512 272
WIRE -48 336 -48 320
WIRE 64 336 -48 336
WIRE 464 336 448 336
WIRE 64 400 48 400
WIRE 464 400 448 400
WIRE 560 400 544 400
WIRE 64 464 48 464
WIRE 496 464 448 464
WIRE 496 480 496 464
WIRE 176 544 176 528
WIRE 320 544 320 528
WIRE 496 560 496 544
SYMBOL voltage -80 16 R0
SYMATTR InstName V1
SYMATTR Value 18
SYMBOL res 560 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2.74K
SYMBOL res 496 144 R0
SYMATTR InstName R1
SYMATTR Value 7.5m
SYMBOL PowerProducts\\LTM4609 256 240 R0
SYMATTR InstName U1
SYMBOL res -64 336 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 544 32 R0
SYMATTR InstName C1
SYMATTR Value 330
SYMBOL cap 480 480 R0
SYMATTR InstName C2
SYMATTR Value .002
SYMBOL ind 192 -80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 5.6
SYMBOL res 640 16 R0
SYMATTR InstName Rload
SYMATTR Value 15
FLAG 464 80 0
FLAG 560 128 0
FLAG 656 128 0
FLAG 560 400 0
FLAG 512 288 0
FLAG 320 544 0
FLAG 176 544 0
FLAG -80 128 0
FLAG 496 560 0
FLAG -80 16 IN
FLAG 656 16 OUT
TEXT 584 480 Left 2 !.tran 100m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5676R.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5676R.asy)
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
RLOAD vOUT 0 1k
V1 Vdd 0 5
CLOAD vOUT 0 10n
XU1 vDAC Vdd 0 vOUT AD5676R Gain=2 ;pnba Vdac)Vdd)GND)Vout
.tran 50u
.lib AD5676R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 112 112 0 112
WIRE 192 112 112 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL AD5676R -208 112 R0
SYMATTR InstName U1
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -240 -80 Vdd
TEXT -160 312 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6402-6.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6402-6.asy)
V2 N003 0 2.2
XU1 N001 N003 N001 0 _OUT NC_01 NC_02 OUT 0 N001 0 0 N002 N002 N004 N004 LT6402-6 ;pnba VccC)VOCM)VccA)VeeA)+OUT)+OUTFILT)-OUTFILT)-OUT)VeeB)VccB)_EN)VeeC)-INB)-INA)+INB)+INA
V1 N001 0 5
V3 N002 N004 SINE(0 .1 10Meg)
.tran 1u
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1892
WIRE 160 304 -240 304
WIRE 240 304 160 304
WIRE 320 304 240 304
WIRE -240 320 -240 304
WIRE 160 336 160 304
WIRE 240 336 240 304
WIRE 320 336 320 304
WIRE 400 336 400 288
WIRE -240 416 -240 400
WIRE 64 416 -144 416
WIRE 96 416 64 416
WIRE 480 432 448 432
WIRE 64 448 64 416
WIRE 96 448 64 448
WIRE -144 464 -144 416
WIRE 512 512 448 512
WIRE 624 512 592 512
WIRE 96 576 64 576
WIRE 480 592 448 592
WIRE -144 608 -144 544
WIRE 64 608 64 576
WIRE 64 608 -144 608
WIRE 96 608 64 608
WIRE 192 720 192 688
WIRE 272 720 272 688
WIRE 352 720 352 688
SYMBOL voltage -240 304 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -144 448 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 .1 10Meg)
SYMBOL LT6402-6 272 512 R0
SYMATTR InstName U1
SYMBOL voltage 496 512 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value 2.2
FLAG -240 416 0
FLAG 624 512 0
FLAG 480 432 _OUT
FLAG 480 592 OUT
FLAG 400 288 0
FLAG 192 720 0
FLAG 272 720 0
FLAG 352 720 0
TEXT 528 680 Left 2 !.tran 1u
* Z:\tmp\asc_dec_bjh7r6w2\09ccbffef365_Key_Input_LTspice_Model_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vled Vz 510
XU1 Vled N001 Vmcu 0 PC817 Igain=1m ;pnba A)K)C)E
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Optos\PC817A.asy)
.lib PC817.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -192 128 -256 128
WIRE -160 128 -192 128
WIRE -48 128 -80 128
WIRE -16 128 -48 128
WIRE 256 128 176 128
WIRE 336 128 256 128
WIRE -192 144 -192 128
WIRE -192 224 -192 208
WIRE -192 224 -368 224
WIRE -16 224 -192 224
WIRE 240 224 176 224
WIRE 464 224 240 224
WIRE 240 272 240 224
SYMBOL res -64 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 510
SYMBOL Optos\\PC817A 80 176 R0
SYMATTR InstName U1
FLAG 240 272 0
FLAG 256 128 Vmcu
FLAG -192 128 Vz
FLAG -48 128 Vled