Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8643S.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8643S.asy)
R4 N001 0 8.45K
XU1 OUT N003 NC_01 IN NC_02 0 N002 N005 0 0 N007 NC_03 IN IN N004 N006 NC_04 LT8643S ;pnba BIAS)INTVcc)BST)VIN1)CLKOUT)GND1)VC)SW)GND)GND2)FB)PG)VIN2)EN/UV)RT)TR/SS)SYNC/MODE
C6 N002 N001 330p
C4 OUT 0 47 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
C2 N003 0 1
R1 N004 0 41.2K
V1 IN 0 24
L1 N005 OUT 3.3 Rser=10m
R2 OUT N007 1Meg
C5 OUT N007 4.7p
Rload OUT 0 835m
C1 N006 0 1n
R3 N007 0 243K
.tran 1m startup
.lib LT8643S.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1848 740
WIRE 80 -80 -32 -80
WIRE 256 -80 80 -80
WIRE 432 -80 256 -80
WIRE -32 -64 -32 -80
WIRE 256 -64 256 -80
WIRE 80 0 80 -80
WIRE 112 0 80 0
WIRE 432 0 432 -80
WIRE 432 0 400 0
WIRE -32 32 -32 16
WIRE 112 80 80 80
WIRE 432 80 400 80
WIRE -64 160 -80 160
WIRE 32 160 16 160
WIRE 112 160 96 160
WIRE 32 240 0 240
WIRE 112 240 96 240
WIRE 544 240 400 240
WIRE 16 400 0 400
WIRE 112 400 96 400
WIRE 432 400 400 400
WIRE 544 400 544 240
WIRE 544 400 512 400
WIRE 656 400 544 400
WIRE 752 400 656 400
WIRE 848 400 752 400
WIRE 656 416 656 400
WIRE 752 416 752 400
WIRE 848 416 848 400
WIRE 32 480 0 480
WIRE 112 480 96 480
WIRE 544 480 400 480
WIRE 656 480 656 464
WIRE 656 480 544 480
WIRE 544 496 544 480
WIRE 752 512 752 480
WIRE 848 512 848 496
WIRE 304 560 304 544
WIRE 544 592 544 576
SYMBOL res 528 384 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL LT8643S 256 240 R0
SYMATTR InstName U1
SYMBOL res 112 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 41.2K
SYMBOL res 832 400 R0
SYMATTR InstName Rload
SYMATTR Value 835m
SYMBOL ind 416 416 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=10m
SYMBOL cap 96 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C6
SYMATTR Value 330p
SYMBOL cap 736 416 R0
WINDOW 0 40 17 Left 2
SYMATTR InstName C4
SYMATTR Value 47
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL res 528 480 R0
SYMATTR InstName R3
SYMATTR Value 243K
SYMBOL cap 96 256 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 96 496 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 32 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 8.45K
SYMBOL voltage -32 -80 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 640 400 R0
WINDOW 0 32 17 Left 2
SYMATTR InstName C5
SYMATTR Value 4.7p
FLAG 304 560 0
FLAG 0 400 0
FLAG -32 32 0
FLAG 752 512 0
FLAG 544 592 0
FLAG 848 512 0
FLAG 848 400 OUT
FLAG -32 -80 IN
FLAG 80 80 0
FLAG 432 80 0
FLAG 0 480 0
FLAG -80 160 0
FLAG 0 240 0
TEXT 704 576 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1996ad7a2b18_Prob_4b3.asc
* Generated by LTspice 26.0.1 for Windows.
* Short Channel
* l=0.18u w= 0.27u
;dc V1 0 1 1m
M1 Vds Vgs 0 0 pch_tt l=0.18u w= 0.27u
V2 0 Vds 1.8V
V1 0 Vgs 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.dc V2 0 1.8 0.01 V1 0 1 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 80 384 80
WIRE 384 96 384 80
WIRE 384 96 240 96
WIRE 240 112 240 96
WIRE 384 112 384 96
WIRE 64 192 32 192
WIRE 192 192 64 192
WIRE 64 208 64 192
WIRE 240 224 240 208
WIRE 384 224 384 192
WIRE 64 304 64 288
IOPIN 32 192 In
IOPIN 416 80 Out
SYMBOL voltage 384 208 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.8V
SYMBOL voltage 64 304 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL pmos 192 112 R0
SYMATTR InstName M1
SYMATTR Value pch_tt
SYMATTR Value2 l=0.18u w= 0.27u
FLAG 64 304 0
FLAG 240 224 0
FLAG 384 224 0
FLAG 32 192 Vgs
FLAG 416 80 Vds
TEXT -120 64 Left 2 !.include TSMC180.lib
TEXT -128 112 Left 2 !.dc V2 0 1.8 0.01 V1 0 1 0.2
TEXT -120 88 Left 2 !;dc  V1 0 1 1m
TEXT 168 64 Left 2 ;Short Channel
TEXT 152 248 Left 2 ;l=0.18u w= 0.27u
* Z:\home\khalils\Downloads\files\data\raw_asc\9938aa264b12_diy-vna2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 SINE(0 4 1000) Rser=50
R1 N001 N002 10Meg
C1 N002 0 15p
R2 N001 0 1k
.tran 0 30ms 0.01ns
.measure tran time_1 trig V(v1)=0 rise=2 targ V(v1)=0 rise=3
.measure frequency param 1/time_1
.measure tran tdelay trig V(v1)=0 rise=2 targ V(v2)=0 rise=2
.measure phase param 360* tdelay/time_1
.measure tran mag_v1 rms V(v1) trig V(v1)=0 rise=2 targ V(V1)=0 rise=3
.measure tran mag_v2 rms V(v2) trig V(v2)=0 rise=2 targ V(V1)=0 rise=3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1200 680
WIRE 176 48 -144 48
WIRE 272 48 176 48
WIRE 272 176 272 48
WIRE 176 192 176 48
WIRE -144 304 -144 48
WIRE 272 336 272 256
WIRE -144 528 -144 384
WIRE 112 528 -144 528
WIRE 176 528 176 272
WIRE 176 528 112 528
WIRE 272 528 272 400
WIRE 272 528 176 528
WIRE 112 560 112 528
FLAG 112 560 0
SYMBOL Misc/signal -144 288 R0
WINDOW 39 24 126 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V1
SYMATTR Value SINE(0 4 1000)
SYMBOL res 256 160 R0
SYMATTR InstName R1
SYMATTR Value 10Meg
SYMBOL cap 256 336 R0
SYMATTR InstName C1
SYMATTR Value 15p
SYMBOL res 160 176 R0
SYMATTR InstName R2
SYMATTR Value 1k
TEXT -152 544 Left 2 !.tran 0 30ms 0.01ns
TEXT 352 96 Left 2 !.measure tran time_1 trig V(v1)=0 rise=2 targ V(v1)=0 rise=3\n.measure frequency param 1/time_1\n.measure tran tdelay trig V(v1)=0 rise=2 targ V(v2)=0 rise=2\n.measure phase param 360* tdelay/time_1
TEXT 392 440 Left 2 !.measure tran mag_v1 rms V(v1) trig V(v1)=0 rise=2 targ V(V1)=0 rise=3\n.measure tran mag_v2 rms V(v2) trig V(v2)=0 rise=2 targ V(V1)=0 rise=3
* Z:\tmp\asc_dec_bjh7r6w2\0ee497f66acf_Design_A_Transistor_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 N003 NSPW500BS
Q1 N003 N004 0 0 BC547C
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 3268 680
WIRE 400 -160 400 -224
WIRE 400 -32 400 -80
WIRE 400 -32 304 -32
WIRE 496 -32 400 -32
WIRE 304 0 304 -32
WIRE 496 0 496 -32
WIRE 304 96 304 64
WIRE 400 96 304 96
WIRE 496 96 496 64
WIRE 496 96 400 96
WIRE 400 144 400 96
WIRE 336 192 96 192
WIRE 400 336 400 240
SYMBOL LED 480 0 R0
SYMATTR InstName D1
SYMATTR Value NSPW500BS
SYMBOL npn 336 144 R0
SYMATTR InstName Q1
SYMATTR Value BC547C
FLAG 400 336 0
* Z:\home\khalils\Downloads\files\data\raw_asc\154e68d59ace_5b.asc
* Generated by LTspice 26.0.1 for Windows.
VGP VsP N002 0.5
M2 VsP N002 0 VsP pch l=0.18u w=3u
V1 VsP 0 1.2
M1 VsP N001 0 0 nch l=0.18u w=3u
VG N001 0 0.5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib 'C:\Program Files\LTC\LTspiceXVII\lib\cmp\log018.l' TT
.dc V1 0 1.2 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 48 176 48
WIRE 416 48 288 48
WIRE 480 48 416 48
WIRE 480 144 480 48
WIRE 176 176 176 48
WIRE 288 176 288 48
WIRE 176 192 176 176
WIRE 480 192 480 144
WIRE 528 192 480 192
WIRE 416 208 416 48
WIRE 416 208 352 208
WIRE 224 240 176 240
WIRE 528 240 528 192
WIRE 528 240 480 240
WIRE 352 256 352 208
WIRE 128 272 -64 272
WIRE 432 272 432 256
WIRE 224 288 224 240
WIRE 224 288 176 288
WIRE -64 304 -64 272
WIRE 176 320 176 288
WIRE 352 352 352 336
WIRE 432 352 432 272
WIRE 432 352 352 352
WIRE 0 0 0 0
SYMBOL voltage 288 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.2
SYMBOL nmos4 128 192 R0
SYMATTR InstName M1
SYMATTR Value2 l=0.18u w=3u
SYMATTR Value nch
SYMBOL pmos4 432 192 R0
SYMATTR InstName M2
SYMATTR Value2 l=0.18u w=3u
SYMATTR Value pch
SYMBOL voltage -64 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VG
SYMATTR Value 0.5
SYMBOL voltage 352 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGP
SYMATTR Value 0.5
FLAG 288 256 0
FLAG 176 320 0
FLAG 480 288 0
FLAG -64 384 0
FLAG 176 176 VdN
FLAG 480 144 VsP
TEXT 40 -80 Left 2 !.lib 'C:\\Program Files\\LTC\\LTspiceXVII\\lib\\cmp\\log018.l' TT
TEXT 40 -56 Left 2 !.dc V1 0 1.2 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1613.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1613.asy)
XU1 N002 0 N003 N001 N001 LT1613 ;pnba SW)GND)FB)_SHDN)Vin
C1 OUT 0 22 Rser=0.02
D1 N002 OUT MBRS140
V1 N001 0 3.3
L1 N001 N002 4.7 Rser=0.02 Rpar=5000
R2 N003 0 121K
R1 OUT N003 374K
Rload OUT 0 25
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LT1613.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1396 936
WIRE 416 464 304 464
WIRE 512 464 416 464
WIRE 560 464 512 464
WIRE 672 464 640 464
WIRE 720 464 672 464
WIRE 864 464 784 464
WIRE 976 464 864 464
WIRE 1072 464 976 464
WIRE 304 480 304 464
WIRE 976 480 976 464
WIRE 1072 480 1072 464
WIRE 864 512 864 464
WIRE 512 560 512 464
WIRE 672 560 672 464
WIRE 304 576 304 560
WIRE 976 576 976 544
WIRE 1072 576 1072 560
WIRE 416 656 416 464
WIRE 432 656 416 656
WIRE 864 656 864 592
WIRE 864 656 752 656
WIRE 864 672 864 656
WIRE 592 768 592 752
WIRE 864 768 864 752
SYMBOL POLCAP 960 480 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine Rser=0.02
SYMBOL POWERPRODUCTS\\LT1613 592 656 R0
WINDOW 0 0 -120 Center 2
WINDOW 3 46 113 Left 2
SYMATTR InstName U1
SYMBOL SCHOTTKY 720 480 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL res 1056 464 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL RES 848 496 R0
SYMATTR InstName R1
SYMATTR Value 374K
SYMBOL RES 848 656 R0
SYMATTR InstName R2
SYMATTR Value 121K
SYMBOL VOLTAGE 304 464 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL IND 544 480 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=0.02 Rpar=5000
FLAG 1072 464 OUT
FLAG 864 768 0
FLAG 976 576 0
FLAG 1072 576 0
FLAG 592 768 0
FLAG 304 576 0
TEXT 888 816 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1db2a9c6a30b_Comparador.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 3 2 4 11 1 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
XU2 5 6 4 11 7 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
XU3 10 9 4 11 8 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
XU4 12 13 4 11 14 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
* Library below included based on ModelFile attribute of instance XU1, XU2, XU3, XU4 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 0 -16 0
WIRE 96 32 96 0
WIRE 96 32 48 32
WIRE 96 48 96 32
WIRE 64 64 -16 64
WIRE 192 80 128 80
WIRE 64 96 -16 96
WIRE 96 112 0 112
WIRE 48 128 48 32
WIRE 96 128 48 128
WIRE 96 144 96 128
WIRE 64 160 -16 160
WIRE 192 176 128 176
WIRE 64 192 -16 192
WIRE 0 208 0 112
WIRE 96 208 0 208
WIRE 48 224 48 128
WIRE 96 224 48 224
WIRE 96 240 96 224
WIRE 64 256 -16 256
WIRE 192 272 128 272
WIRE 64 288 -16 288
WIRE 0 304 0 208
WIRE 96 304 0 304
WIRE 48 320 48 224
WIRE 96 320 48 320
WIRE 96 336 96 320
WIRE 64 352 -16 352
WIRE 192 368 128 368
WIRE 64 384 -16 384
WIRE 0 416 0 304
WIRE 96 416 96 400
WIRE 96 416 0 416
WIRE 0 464 0 416
FLAG 192 80 1
IOPIN 192 80 Out
FLAG 192 176 7
IOPIN 192 176 Out
FLAG 192 272 8
IOPIN 192 272 Out
FLAG 192 368 14
IOPIN 192 368 Out
FLAG -16 96 3
IOPIN -16 96 In
FLAG -16 64 2
IOPIN -16 64 In
FLAG -16 160 6
IOPIN -16 160 In
FLAG -16 192 5
IOPIN -16 192 In
FLAG -16 256 9
IOPIN -16 256 In
FLAG -16 288 10
IOPIN -16 288 In
FLAG -16 352 13
IOPIN -16 352 In
FLAG -16 384 12
IOPIN -16 384 In
FLAG -16 0 4
IOPIN -16 0 In
FLAG 0 464 11
IOPIN 0 464 In
SYMBOL Opamps\\UniversalOpamp2 96 80 R0
SYMATTR InstName U1
SYMBOL Opamps\\UniversalOpamp2 96 176 R0
SYMATTR InstName U2
SYMBOL Opamps\\UniversalOpamp2 96 272 R0
SYMATTR InstName U3
SYMBOL Opamps\\UniversalOpamp2 96 368 R0
SYMATTR InstName U4
* Z:\home\khalils\Downloads\files\data\raw_asc\ADR5040.asc
* Generated by LTspice 26.0.1 for Windows.
Rload OUT 0 10k
Rbias IN OUT 2.67k
Vin IN 0 3
XU1 OUT 0 ADR5040 ;pnba 1)2
.dc TEMP -40 125 .1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR5040.asy)
.lib ADR5040.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 960
WIRE 32 64 -80 64
WIRE 208 64 112 64
WIRE 464 64 208 64
WIRE -80 112 -80 64
WIRE 208 112 208 64
WIRE 464 112 464 64
WIRE -80 224 -80 192
WIRE 208 224 208 176
WIRE 208 224 -80 224
WIRE 464 224 464 192
WIRE 464 224 208 224
WIRE -80 256 -80 224
FLAG -80 64 IN
FLAG -80 256 0
FLAG 464 64 OUT
SYMBOL res 448 96 R0
SYMATTR InstName Rload
SYMATTR Value 10k
SYMBOL res 16 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rbias
SYMATTR Value 2.67k
SYMBOL voltage -80 96 R0
WINDOW 3 36 62 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 30 32 Left 2
SYMATTR Value 3
SYMATTR InstName Vin
SYMBOL ADR5040 208 144 R0
SYMATTR InstName U1
TEXT -88 -32 Left 2 !.dc TEMP -40 125 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\1e6881a44c78_ground_up.asc
* Generated by LTspice 26.0.1 for Windows.
R1 0 0 R
R2 0 0 R
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
FLAG 112 64 0
FLAG 112 144 0
FLAG 320 112 0
FLAG 240 112 0
SYMBOL res 96 48 R0
SYMATTR InstName R1
SYMBOL res 336 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
* Z:\home\khalils\Downloads\files\data\raw_asc\2036df799a04_1634-1.25.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1634-1.25.asy)
R1 N001 N002 150K
V1 N001 0 3
XU1 N002 0 LT1634-1.25 ;pnba VCC)VEE
.dc temp -40 80 .1
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 144 48 144
WIRE 272 144 208 144
WIRE 48 160 48 144
WIRE 272 176 272 144
WIRE 48 256 48 240
WIRE 272 256 272 240
SYMBOL References\\LT1634-1.25 272 208 R0
SYMATTR InstName U1
SYMBOL voltage 48 144 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res 112 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 150K
FLAG 272 256 0
FLAG 48 256 0
TEXT 72 312 Left 2 !.dc temp -40 80 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\14fd1ddf0f99_ResistorWithTimeConstant.asc
* Generated by LTspice 26.0.1 for Windows.
* Lowpass
Bp 0 pwr I=abs(I(V1)*V(VCC))
V1 vcc 0 PULSE(0 3 0 1m 1m 1k 2k)
R1 vcc 0 R={R0*(1+K1*V(pwr))}
Rp pwr 0 1
Cp pwr 0 {CVP}
.param CVP=TAU/1
.param TAU=5 ; sec
.param R0=10 K1=0.5
.tran 20
.options plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 692
WIRE -96 288 -96 240
WIRE -96 400 -96 368
WIRE -96 560 -96 528
WIRE -96 672 -96 640
WIRE 96 240 -96 240
WIRE 96 528 -96 528
WIRE 192 240 96 240
WIRE 192 272 192 240
WIRE 192 400 192 352
WIRE 304 240 192 240
WIRE 304 288 304 240
WIRE 304 400 304 352
WIRE 304 528 96 528
WIRE 304 560 304 528
WIRE 304 672 304 640
SYMBOL voltage -96 544 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 3 0 1m 1m 1k 2k)
SYMBOL bi -96 368 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName Bp
SYMATTR Value I=abs(I(V1)*V(VCC))
SYMBOL res 288 544 R0
SYMATTR InstName R1
SYMATTR Value R={R0*(1+K1*V(pwr))}
SYMBOL res 176 256 R0
SYMATTR InstName Rp
SYMATTR Value 1
SYMBOL cap 288 288 R0
SYMATTR InstName Cp
SYMATTR Value {CVP}
FLAG 192 400 0
FLAG -96 400 0
FLAG 304 400 0
FLAG 304 672 0
FLAG -96 672 0
FLAG 96 240 pwr
FLAG 96 528 vcc
TEXT -112 8 Left 0 !.param CVP=TAU/1
TEXT -112 -32 Left 0 !.param TAU=5  ; sec
TEXT -112 48 Left 0 !.param R0=10  K1=0.5
TEXT -112 96 Left 0 !.tran 20
TEXT 184 184 Left 0 ;Lowpass
TEXT -112 128 Left 0 !.options plotwinsize=0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1303.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1303.asy)
Rload OUT 0 25
C2 OUT 0 100 Rser=0.02
V1 IN 0 3.2
R1 OUT N003 474K
D1 N001 OUT MBRS140
XU1 0 N004 0 N003 N002 IN N001 0 LT1303 top=1K bot=1T ;pnba GND)LBO)SHDN)FB)LBI)Vin)SW)PGND
L1 IN N001 22 Rser=0.02 Rpar=5000
R2 N003 0 156K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib LT1303.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1620 936
WIRE 704 448 448 448
WIRE 752 448 704 448
WIRE 880 448 832 448
WIRE 928 448 880 448
WIRE 1040 448 992 448
WIRE 1152 448 1040 448
WIRE 1264 448 1152 448
WIRE 448 464 448 448
WIRE 1152 464 1152 448
WIRE 1264 464 1264 448
WIRE 704 512 704 448
WIRE 448 560 448 544
WIRE 1040 560 1040 448
WIRE 1152 560 1152 528
WIRE 1264 560 1264 544
WIRE 560 576 544 576
WIRE 880 576 880 448
WIRE 880 576 848 576
WIRE 1040 656 1040 640
WIRE 1040 656 848 656
WIRE 1040 672 1040 656
WIRE 560 736 544 736
WIRE 864 736 848 736
WIRE 1040 768 1040 752
WIRE 640 816 640 800
WIRE 768 816 768 800
SYMBOL RES 1248 448 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL RES 1024 544 R0
SYMATTR InstName R1
SYMATTR Value 474K
SYMBOL IND 736 464 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 22
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL VOLTAGE 448 448 R0
SYMATTR InstName V1
SYMATTR Value 3.2
SYMBOL POWERPRODUCTS\\LT1303 704 656 R0
WINDOW 0 -88 -168 Left 2
WINDOW 3 -4 48 Center 2
SYMATTR InstName U1
SYMBOL RES 1024 656 R0
SYMATTR InstName R2
SYMATTR Value 156K
SYMBOL SCHOTTKY 928 464 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL POLCAP 1136 464 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
FLAG 1264 448 OUT
FLAG 448 560 0
FLAG 1264 560 0
FLAG 640 816 0
FLAG 768 816 0
FLAG 1040 768 0
FLAG 1152 560 0
FLAG 544 736 0
FLAG 448 448 IN
TEXT 1096 808 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1501.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1501.asy)
L1 N001 N002 33
R2 N005 0 127K
Rload OUT 0 20
D1 N002 OUT 1N5818
V1 IN 0 2.5
R1 OUT N005 204K
C1 OUT 0 220 Rser=0.05
XU1 IN IN N001 0 N002 N003 N004 N005 LT1501 ;pnba _SHDN)Vin)Isense)GND)SW)LBO)LBI)FB
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
.lib LT1501.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2080 1544
WIRE 1296 1088 1264 1088
WIRE 1408 1088 1376 1088
WIRE 1440 1088 1408 1088
WIRE 1536 1088 1504 1088
WIRE 1600 1088 1536 1088
WIRE 1712 1088 1600 1088
WIRE 1712 1104 1712 1088
WIRE 992 1120 912 1120
WIRE 1104 1120 992 1120
WIRE 1600 1120 1600 1088
WIRE 912 1136 912 1120
WIRE 1104 1136 1104 1120
WIRE 1264 1136 1264 1088
WIRE 1408 1200 1408 1088
WIRE 1408 1200 1360 1200
WIRE 1600 1200 1600 1184
WIRE 1712 1200 1712 1184
WIRE 992 1216 992 1120
WIRE 1008 1216 992 1216
WIRE 1536 1216 1536 1088
WIRE 912 1232 912 1216
WIRE 1376 1264 1360 1264
WIRE 1008 1312 992 1312
WIRE 1536 1328 1536 1296
WIRE 1536 1328 1360 1328
WIRE 1536 1344 1536 1328
WIRE 1184 1408 1184 1392
WIRE 1536 1440 1536 1424
SYMBOL VOLTAGE 912 1120 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL RES 1520 1200 R0
SYMATTR InstName R1
SYMATTR Value 204K
SYMBOL res 1696 1088 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL POWERPRODUCTS\\LT1501 1184 1264 R0
SYMATTR InstName U1
SYMBOL res 1520 1328 R0
SYMATTR InstName R2
SYMATTR Value 127K
SYMBOL polcap 1584 1120 R0
SYMATTR InstName C1
SYMATTR Value 220
SYMATTR SpiceLine Rser=0.05
SYMBOL ind 1280 1104 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMBOL schottky 1440 1104 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5818
FLAG 1536 1440 0
FLAG 1184 1408 0
FLAG 912 1232 0
FLAG 1712 1200 0
FLAG 1600 1200 0
FLAG 1712 1088 OUT
FLAG 912 1120 IN
TEXT 1688 1416 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM3223B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM3223B.asy)
XU1 VIA VIB N001 0 0 0 VOB VDDB 0 VOA VDDA ADuM3223B ;pnba VIA)VIB)VDD1)GND1)DISABLE)GNDB)VOB)VDDB)GNDA)VOA)VDDA
C5 VOB 0 2n
C1 0 N001 10n
V1 VIA 0 PULSE(0 5 0 2n 2n 5u 10u)
V5 VDDB 0 12
V2 VIB 0 PULSE(5 0 0 2n 2n 5u 10u)
V3 N001 0 5
V6 VDDA 0 12
C3 VOA 0 2n
.tran 50u
.lib ADuM3223B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1108 680
WIRE 416 16 368 16
WIRE 672 16 416 16
WIRE 32 32 -560 32
WIRE 64 32 32 32
WIRE 672 48 672 16
WIRE -560 80 -560 32
WIRE 416 80 368 80
WIRE 560 80 416 80
WIRE 32 112 -400 112
WIRE 64 112 32 112
WIRE 560 112 560 80
WIRE 672 128 672 112
WIRE 448 144 368 144
WIRE -176 192 -288 192
WIRE 64 192 -176 192
WIRE -560 224 -560 160
WIRE -400 224 -400 192
WIRE -288 224 -288 192
WIRE 416 224 368 224
WIRE 560 224 416 224
WIRE 560 240 560 224
WIRE -176 272 -176 192
WIRE -160 272 -176 272
WIRE -48 272 -96 272
WIRE 64 272 -48 272
WIRE 448 288 368 288
WIRE -288 336 -288 304
WIRE -48 352 -48 272
WIRE 64 352 -48 352
WIRE 416 352 368 352
WIRE 672 352 416 352
WIRE -48 384 -48 352
WIRE 672 384 672 352
WIRE 672 464 672 448
SYMBOL voltage -288 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL cap 656 384 R0
SYMATTR InstName C5
SYMATTR Value 2n
SYMBOL voltage 560 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 12
SYMBOL cap -96 256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL ADuM3223B 224 112 R0
SYMATTR InstName U1
SYMBOL voltage -560 64 R0
WINDOW 0 30 80 Left 2
WINDOW 3 22 -14 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 2n 2n 5u 10u)
SYMBOL cap 656 48 R0
SYMATTR InstName C3
SYMATTR Value 2n
SYMBOL voltage 560 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 12
SYMBOL voltage -400 96 R0
WINDOW 0 32 102 Left 2
WINDOW 3 33 33 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(5 0 0 2n 2n 5u 10u)
FLAG -288 336 0
FLAG -48 384 0
FLAG -560 224 0
FLAG -400 224 0
FLAG 672 128 0
FLAG 672 464 0
FLAG 560 320 0
FLAG 416 352 VOB
FLAG 416 16 VOA
FLAG 448 288 0
FLAG 448 144 0
FLAG 560 192 0
FLAG 32 32 VIA
FLAG 32 112 VIB
FLAG 416 80 VDDA
FLAG 416 224 VDDB
TEXT 64 440 Left 2 !.tran 50u