Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\08d976d09b9f_Assignment_4b__iii_.asc
* Generated by LTspice 26.0.1 for Windows.
* Full Wave Rectifier (Diode Bridge) (with 1microF Capacitor) (Ideal)
D4 N003 N002 1N4148
D2 N003 0 1N4148
D1 0 N001 1N4148
C1 N001 N003 0.000001
D3 N002 N001 1N4148
R1 N001 N003 1000
V1 0 N002 SINE(0 311 50) Rser=0.001
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 368 80 64 80
WIRE 512 80 368 80
WIRE 64 96 64 80
WIRE 64 96 -96 96
WIRE 224 96 64 96
WIRE 224 128 224 96
WIRE -96 144 -96 96
WIRE 368 208 368 80
WIRE 512 224 512 80
WIRE -96 256 -96 208
WIRE -16 256 -96 256
WIRE 64 256 -16 256
WIRE 224 256 224 192
WIRE 224 256 144 256
WIRE -16 288 -16 256
WIRE 224 288 224 256
WIRE -96 304 -96 256
WIRE -96 400 -96 368
WIRE 64 400 -96 400
WIRE 224 400 224 352
WIRE 224 400 64 400
WIRE 64 416 64 400
WIRE 368 416 368 288
WIRE 368 416 64 416
WIRE 512 416 512 288
WIRE 512 416 368 416
SYMBOL res 352 192 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL cap 496 224 R0
SYMATTR InstName C1
SYMATTR Value 0.000001
SYMBOL voltage 48 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 -60 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value SINE(0 311 50)
SYMATTR SpiceLine Rser=0.001
SYMBOL diode -80 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL diode 240 352 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL diode 240 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL diode -80 368 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N4148
FLAG -16 288 0
TEXT -64 424 Left 2 !.tran 0.05
TEXT -160 40 Left 2 ;Full Wave Rectifier (Diode Bridge) (with 1microF Capacitor) (Ideal)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4177-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4177-1.asy)
R2 OUT N001 10K
Vin IN 0 SINE(0 1 10K)
XU1 IN N001 +V -V OUT ADA4177 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 10K
V1 +V 0 15
V2 -V 0 -15
.tran 1m
.lib ADA4177.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 416 -1232 400 -1232
WIRE 512 -1232 496 -1232
WIRE 544 -1232 512 -1232
WIRE 656 -1232 624 -1232
WIRE 128 -1136 128 -1152
WIRE 240 -1136 240 -1152
WIRE 512 -1120 512 -1232
WIRE 544 -1120 512 -1120
WIRE 656 -1104 656 -1232
WIRE 656 -1104 608 -1104
WIRE 720 -1104 656 -1104
WIRE 544 -1088 432 -1088
WIRE 432 -1072 432 -1088
WIRE 128 -1040 128 -1056
WIRE 240 -1040 240 -1056
WIRE 432 -976 432 -992
SYMBOL voltage 240 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL opamps\\ADA4177-1 576 -1104 R0
SYMATTR InstName U1
SYMBOL voltage 128 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 512 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 128 -1152 +V
FLAG 128 -1040 0
FLAG 432 -976 0
FLAG 720 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 240 -1152 -V
FLAG 576 -1072 -V
FLAG 400 -1232 0
FLAG 240 -1040 0
TEXT 704 -992 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\3e1498122574_Fig6_19_NMOS_ID_VDS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1)
M1 N001 N002 0 0 N_50n L=50n W=500n
VGS N002 0 0
VDS N001 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VDS 0 1 1m VGS 0 1 250m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 288 208 288 192
WIRE 288 304 288 288
WIRE 400 192 288 192
WIRE 448 112 448 80
WIRE 448 224 448 208
WIRE 496 160 448 160
WIRE 640 80 448 80
WIRE 640 112 640 80
WIRE 640 224 640 192
SYMBOL voltage 640 96 R0
WINDOW 0 41 55 Left 0
WINDOW 3 24 104 Invisible 0
SYMATTR InstName VDS
SYMATTR Value 0
SYMBOL nmos4 400 112 R0
WINDOW 0 59 18 Left 0
WINDOW 3 64 75 Left 0
WINDOW 123 64 103 Left 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 L=50n W=500n
SYMBOL voltage 288 192 R0
WINDOW 0 -90 57 Left 0
WINDOW 3 24 104 Invisible 0
SYMATTR InstName VGS
SYMATTR Value 0
FLAG 288 304 0
FLAG 448 224 0
FLAG 640 224 0
FLAG 496 160 0
TEXT 384 272 Left 0 !.dc VDS 0 1 1m VGS 0 1 250m
TEXT 384 296 Left 0 !.lib cmosedu_models.txt
TEXT 488 56 Left 0 ;Plot Id(M1)
* Z:\tmp\asc_dec_bjh7r6w2\10c124995249_power_amp_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
C3 N006 N002 1
D2 N004 N006 D
D1 N003 N004 D
R2 N006 Vee 100k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1704 680
WIRE 32 -160 32 -352
WIRE -240 -112 -272 -112
WIRE -128 -112 -128 -240
WIRE -128 -112 -176 -112
WIRE -32 -112 -128 -112
WIRE -128 -80 -128 -112
WIRE -272 -16 -272 -112
WIRE -272 -16 -384 -16
WIRE -128 0 -128 -16
WIRE 32 0 32 -64
WIRE 80 0 32 0
WIRE 32 64 32 0
WIRE -272 112 -272 -16
WIRE -224 112 -272 112
WIRE -128 112 -128 64
WIRE -128 112 -160 112
WIRE -32 112 -128 112
WIRE -128 144 -128 112
WIRE -128 256 -128 224
WIRE 32 256 32 160
WIRE 32 256 -128 256
SYMBOL cap -160 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1u
SYMBOL diode -144 0 R0
SYMATTR InstName D2
SYMBOL diode -144 -80 R0
SYMATTR InstName D1
SYMBOL res -144 128 R0
SYMATTR InstName R2
SYMATTR Value 100k
FLAG -128 256 Vee
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4121A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4121A.asy)
V1 N001 0 5
C3 N002 0 10
C2 N001 0 0.1
C4 N002 0 0.1
XU1 N001 VI+ 0 0 0 OUT N003 N002 ADuM4121A ;pnba Vdd1)VI+)VI-)GND1)GND2)Clamp)Vout)Vdd2
V2 N002 0 15
V3 VI+ 0 PULSE(0 5 0 2n 2n 9.998u 20u)
R1 OUT N003 10
C1 OUT 0 2n
.tran 100u
.lib ADuM4121A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1064 680
WIRE 16 -80 -112 -80
WIRE 160 -80 16 -80
WIRE 464 -80 320 -80
WIRE 560 -80 464 -80
WIRE 704 -80 560 -80
WIRE -112 -64 -112 -80
WIRE 704 -64 704 -80
WIRE 16 -48 16 -80
WIRE 464 -48 464 -80
WIRE 560 -48 560 -80
WIRE -112 32 -112 16
WIRE 16 32 16 16
WIRE 464 32 464 16
WIRE 560 32 560 16
WIRE 704 32 704 16
WIRE 160 64 160 -80
WIRE 320 64 320 -80
WIRE 48 128 -352 128
WIRE 112 128 48 128
WIRE 464 128 368 128
WIRE 592 128 544 128
WIRE 688 128 592 128
WIRE 688 144 688 128
WIRE -352 160 -352 128
WIRE 112 192 48 192
WIRE 592 192 592 128
WIRE 592 192 368 192
WIRE 688 224 688 208
WIRE -352 288 -352 240
WIRE 160 304 160 256
WIRE 320 304 320 256
SYMBOL cap 0 -48 R0
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL cap 544 -48 R0
SYMATTR InstName C4
SYMATTR Value 0.1
SYMBOL cap 448 -48 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL voltage -112 -80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 704 -80 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL res 560 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage -352 144 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 2n 2n 9.998u 20u)
SYMBOL cap 672 144 R0
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL ADuM4121A 240 160 R0
SYMATTR InstName U1
FLAG 160 304 0
FLAG 320 304 0
FLAG 688 224 0
FLAG 688 128 OUT
FLAG 704 32 0
FLAG -112 32 0
FLAG -352 288 0
FLAG 48 192 0
FLAG 16 32 0
FLAG 464 32 0
FLAG 560 32 0
FLAG 48 128 VI+
TEXT 384 344 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\RH117H.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 SINE(10 100m 100K)
R1 OUT N001 121
R2 N001 N002 121
Rload OUT 0 10
XU2 N002 0 NC_01 LT1009 ;pnba VCC)VEE)ADJ
XU1 N001 OUT IN RH117H ;pnba ADJ)OUT)IN
.tran 50u
.options plotwinsize=0
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\RH117H.asy)
.lib LTC.lib
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1009.asy)
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 680
WIRE 64 128 -256 128
WIRE 368 128 320 128
WIRE 512 128 368 128
WIRE -256 144 -256 128
WIRE 512 144 512 128
WIRE 368 160 368 128
WIRE -256 240 -256 224
WIRE 512 240 512 224
WIRE 192 256 192 224
WIRE 368 256 368 240
WIRE 368 256 192 256
WIRE 368 288 368 256
WIRE 368 384 368 368
WIRE 368 464 368 448
FLAG -256 240 0
FLAG 512 240 0
FLAG 368 464 0
FLAG -256 128 IN
FLAG 512 128 OUT
SYMBOL voltage -256 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(10 100m 100K)
SYMBOL res 352 144 R0
SYMATTR InstName R1
SYMATTR Value 121
SYMBOL res 352 272 R0
SYMATTR InstName R2
SYMATTR Value 121
SYMBOL res 496 128 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL References\\LT1009 368 416 R0
SYMATTR InstName U2
SYMBOL RH117H 192 128 R0
SYMATTR InstName U1
TEXT 496 336 Left 2 !.tran 50u\n.options plotwinsize=0
* Z:\home\khalils\Downloads\files\data\raw_asc\0be2f2ae710c_or_block.asc
* Generated by LTspice 26.0.1 for Windows.
* Power
* A
* B
* A B | Y\n-----|---\n0 0 | 0\n0 1 | 1\n1 0 | 1\n1 1 | 1
AU1 0 0 0 0 0 0 0 0 OR
V2 A 0 PULSE(0 5 0 1p 1p 10m 20m)
V3 B 0 PULSE(0 5 0 1p 1p 20m 40m)
V1 Vdd 0 5V
.tran 80m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -560 -416 -560 -448
WIRE -384 -416 -384 -448
WIRE -208 -416 -208 -448
WIRE -560 -304 -560 -336
WIRE -384 -304 -384 -336
WIRE -208 -304 -208 -336
WIRE -80 -112 -80 -160
WIRE -96 -96 -176 -96
WIRE 48 -80 -48 -80
WIRE -96 -64 -176 -64
WIRE -80 16 -80 -48
RECTANGLE Normal -496 -496 -608 -224 2
RECTANGLE Normal -320 -496 -464 -224 2
RECTANGLE Normal -144 -496 -288 -224 2
SYMBOL or -112 -48 R0
SYMATTR InstName U1
SYMBOL voltage -384 -432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -82 -86 Left 2
SYMATTR Value PULSE(0 5 0 1p 1p 10m 20m)
SYMATTR InstName V2
SYMBOL voltage -560 -432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5V
SYMBOL voltage -208 -432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 1p 1p 20m 40m)
FLAG 48 -80 out
FLAG -176 -96 A
FLAG -80 -160 Vdd
FLAG -80 16 0
FLAG -560 -304 0
FLAG -560 -448 Vdd
FLAG -384 -304 0
FLAG -384 -448 A
FLAG -176 -64 B
FLAG -208 -304 0
FLAG -208 -448 B
TEXT -592 -256 Left 2 ;Power
TEXT -408 -248 Left 2 ;A
TEXT -608 40 Left 2 !.tran 80m
TEXT -232 -248 Left 2 ;B
TEXT 256 -240 Left 2 ;A B  | Y\n-----|---\n0  0 | 0\n0  1 | 1\n1  0 | 1\n1  1 | 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1946A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1946A.asy)
XU1 N003 N002 IN 0 N001 IN N003 N004 LT1946A ;pnba Vc)FB)_SHDN)GND)SW)Vin)Comp)SS
C3 N004 0 .005
L1 IN N001 5.4 Rser=.05
Rload OUT 0 20
R2 N002 0 5.23K
D1 N001 OUT MBRS340
R1 OUT N002 28.7K
V1 IN 0 3.3
C2 OUT 0 20 Rser=50m
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 750u startup
.lib LT1946A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2688 1672
WIRE 1568 1200 1456 1200
WIRE 1680 1200 1568 1200
WIRE 1696 1200 1680 1200
WIRE 1808 1200 1776 1200
WIRE 1888 1200 1808 1200
WIRE 2032 1200 1952 1200
WIRE 2160 1200 2032 1200
WIRE 2272 1200 2160 1200
WIRE 1456 1216 1456 1200
WIRE 2160 1216 2160 1200
WIRE 2272 1216 2272 1200
WIRE 2032 1248 2032 1200
WIRE 1680 1264 1680 1200
WIRE 1808 1264 1808 1200
WIRE 1456 1312 1456 1296
WIRE 2160 1312 2160 1280
WIRE 2272 1312 2272 1296
WIRE 1568 1344 1568 1200
WIRE 1600 1344 1568 1344
WIRE 2032 1344 2032 1328
WIRE 2032 1344 1888 1344
WIRE 2032 1360 2032 1344
WIRE 1600 1408 1568 1408
WIRE 2032 1456 2032 1440
WIRE 1568 1472 1568 1408
WIRE 1600 1472 1568 1472
WIRE 1904 1472 1888 1472
WIRE 1984 1472 1968 1472
WIRE 1744 1568 1744 1552
SYMBOL PowerProducts\\LT1946A 1744 1408 R0
SYMATTR InstName U1
SYMBOL cap 1904 1488 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value .005
SYMBOL res 2016 1344 R0
SYMATTR InstName R2
SYMATTR Value 5.23K
SYMBOL cap 2144 1216 R0
SYMATTR InstName C2
SYMATTR Value 20
SYMATTR SpiceLine Rser=50m
SYMBOL RES 2016 1232 R0
SYMATTR InstName R1
SYMATTR Value 28.7K
SYMBOL VOLTAGE 1456 1200 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL schottky 1888 1184 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMBOL ind 1680 1216 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 5.4
SYMATTR SpiceLine Rser=.05
SYMBOL RES 2256 1200 R0
SYMATTR InstName Rload
SYMATTR Value 20
FLAG 2032 1456 0
FLAG 1744 1568 0
FLAG 1984 1472 0
FLAG 2160 1312 0
FLAG 1456 1312 0
FLAG 2272 1312 0
FLAG 2272 1200 OUT
FLAG 1456 1200 IN
TEXT 2104 1488 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\9a8fada80f92_Clase_B.asc
* Generated by LTspice 26.0.1 for Windows.
**********
*SRC=ARF463AB;ARF463AB;MOSFETs N;Enh;500V 9.0A 1.1ohms PPG Microsemi RF MOSFET
*SYM=POWMOSN
*09-14-09 Rev A GJK PPG Microsemi
* TERMINALS: D G S
*****
LS 30 29 2n
R1 VDD N001 4
CGS 2 3 1200p
RS 29 3 2.25m
LG 20 19 2.8n
R2 G 0 50
D2 5 2 DGD
VDD VDD 0 125
B1 G 0 V=V(p)*V(r)
V3 p 0 PULSE(0 1 0 1p 1p 1.25e-05 250e-6)
DSD 3 1 DSUB
RG 19 2 .5
D1 5 1 DGD
M1 1 2 3 3 DMOS L=1U W=1U
V2 r 0 PWL(0 0 10e-3 8)
RD 11 1 1.1
LD 10 11 2n
XM1 N001 G 0 ARF463AB ;pnba D)G)S
.tran 0 10e-3 0 1e-06
.SUBCKT ARF463AB 10 20 30
.MODEL DMOS NMOS(LEVEL=3 VMAX=1.04Meg THETA=100.0m ETA=2.00m VTO=3.00 KP=2.60)
.MODEL DSUB D (IS=1.27u N=1.50 RS=5.00m BV=500 CJO=799p VJ=0.800 M=0.420 TT=311n)
.MODEL DGD D (IS=100n N=1.5 RS=10m BV=500 CJO=81.7p M=.5 VJ=.700 TT=1n)
.ENDS
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -480 -784 -624 -784
WIRE -432 -784 -480 -784
WIRE -384 -784 -432 -784
WIRE -480 -736 -480 -784
WIRE -624 -720 -624 -784
WIRE -624 -624 -624 -640
WIRE -1408 -576 -1408 -592
WIRE -1152 -560 -1152 -592
WIRE -480 -560 -480 -656
WIRE -1408 -544 -1408 -576
WIRE -1152 -544 -1152 -560
WIRE -752 -480 -960 -480
WIRE -576 -480 -752 -480
WIRE -528 -480 -576 -480
WIRE -1408 -448 -1408 -464
WIRE -1152 -448 -1152 -464
WIRE -752 -432 -752 -480
WIRE -480 -400 -480 -464
WIRE -960 -384 -960 -480
WIRE -752 -320 -752 -352
WIRE -960 -272 -960 -304
SYMBOL voltage -1152 -560 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 0 1p 1p 1.25e-05 250e-6)
SYMBOL res -768 -448 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL nmos -528 -560 R0
SYMATTR InstName M1
SYMATTR Value ARF463AB
SYMATTR Prefix X
SYMBOL voltage -624 -736 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VDD
SYMATTR Value 125
SYMBOL res -496 -752 R0
SYMATTR InstName R1
SYMATTR Value 4
SYMBOL bv -960 -400 R0
SYMATTR InstName B1
SYMATTR Value V=V(p)*V(r)
SYMBOL voltage -1408 -560 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 10e-3 8)
FLAG -480 -400 0
FLAG -624 -624 0
FLAG -432 -784 VDD
FLAG -576 -480 G
FLAG -752 -320 0
FLAG -960 -272 0
FLAG -1408 -448 0
FLAG -1152 -448 0
FLAG -1152 -560 p
FLAG -1408 -576 r
TEXT -2144 -96 Left 2 !.tran 0 10e-3 0 1e-06
TEXT -2152 -752 Left 2 !**********\n*SRC=ARF463AB;ARF463AB;MOSFETs N;Enh;500V 9.0A 1.1ohms PPG Microsemi RF MOSFET\n*SYM=POWMOSN\n*09-14-09 Rev A GJK PPG Microsemi\n.SUBCKT ARF463AB   10 20 30\n*     TERMINALS:  D  G  S\nM1   1  2  3  3  DMOS L=1U W=1U\nLD  10  11  2n\nRD  11          1   1.1\nLG  20  19  2.8n\nRG  19  2   .5\nD1   5  1   DGD\nD2   5  2   DGD\nCGS  2  3   1200p\nDSD  3  1   DSUB\nRS  29  3   2.25m\nLS  30  29  2n\n.MODEL DMOS NMOS(LEVEL=3 VMAX=1.04Meg THETA=100.0m ETA=2.00m VTO=3.00 KP=2.60)\n.MODEL DSUB D (IS=1.27u N=1.50 RS=5.00m BV=500 CJO=799p VJ=0.800 M=0.420 TT=311n)\n.MODEL DGD  D (IS=100n N=1.5 RS=10m BV=500 CJO=81.7p M=.5 VJ=.700 TT=1n)\n.ENDS\n*****
* Z:\home\khalils\Downloads\files\data\raw_asc\10edf969c578_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD795.asy)
R3 N005 N003 R
R1 N004 0 R
R4 N002 N001 R
XU2 N007 N006 NC_03 NC_04 N006 AD795 ;pnba In+)In-)V+)V-)OUT
C3 N006 N005 C
XU1 N004 N002 NC_01 NC_02 N002 AD795 ;pnba In+)In-)V+)V-)OUT
R2 N007 N005 R
C4 0 N007 C
C2 N004 N001 C
C1 N001 N003 C
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 -144 -176 -144
WIRE 256 -144 64 -144
WIRE -320 -16 -384 -16
WIRE -176 -16 -176 -144
WIRE -176 -16 -256 -16
WIRE -112 -16 -176 -16
WIRE 16 -16 -48 -16
WIRE 144 -16 16 -16
WIRE 256 0 256 -144
WIRE 256 0 208 0
WIRE 16 16 16 -16
WIRE 144 16 96 16
WIRE 96 112 96 16
WIRE 256 112 256 0
WIRE 256 112 96 112
WIRE 16 128 16 96
WIRE -16 304 -176 304
WIRE 256 304 48 304
WIRE -384 432 -384 -16
WIRE -320 432 -384 432
WIRE -176 432 -176 304
WIRE -176 432 -240 432
WIRE -128 432 -176 432
WIRE 16 432 -48 432
WIRE 144 432 16 432
WIRE 256 448 256 304
WIRE 256 448 208 448
WIRE 16 464 16 432
WIRE 144 464 96 464
WIRE 16 560 16 528
WIRE 96 576 96 464
WIRE 256 576 256 448
WIRE 256 576 96 576
SYMBOL cap -48 -32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMBOL res -224 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMBOL res 0 0 R0
SYMATTR InstName R1
SYMBOL res -32 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMBOL cap 32 528 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C4
SYMBOL cap 48 288 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMBOL cap -256 -32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMBOL OpAmps\\AD795 176 512 M180
SYMATTR InstName U2
SYMBOL OpAmps\\AD795 176 64 M180
SYMATTR InstName U1
SYMBOL res 80 -160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
FLAG 16 128 0
FLAG 16 560 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6400-14.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6400-14.asy)
XU1 0 0 N001 N002 N006 N007 N007 N004 N005 N003 LTC6400-14 ;pnba IN-)Vocm)V+)OUT+)OUT-)V-)_EN)IN+)OUTF-)OUTF+
V4 N001 0 1.5
V2 N007 0 -1.5
V1 N004 0 SINE(0 100m 100Meg)
.tran 100n
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 112 -176 112
WIRE -176 128 -176 112
WIRE 192 128 192 112
WIRE 352 160 336 160
WIRE 80 208 64 208
WIRE 352 208 336 208
WIRE -176 224 -176 208
WIRE -112 272 -128 272
WIRE 80 272 -32 272
WIRE 352 272 336 272
WIRE 352 320 336 320
WIRE 144 384 144 368
WIRE 192 384 192 368
WIRE 192 384 144 384
WIRE 240 384 240 368
WIRE 192 416 192 384
WIRE 192 512 192 496
SYMBOL voltage -176 112 R0
SYMATTR InstName V4
SYMATTR Value 1.5
SYMBOL opamps\\LTC6400-14 208 240 R0
WINDOW 3 53 143 Left 2
SYMATTR InstName U1
SYMBOL voltage 192 400 R0
SYMATTR InstName V2
SYMATTR Value -1.5
SYMBOL voltage -16 272 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value SINE(0 100m 100Meg)
FLAG 192 512 0
FLAG -128 272 0
FLAG 64 208 0
FLAG -176 224 0
FLAG 240 384 0
TEXT 344 472 Left 2 !.tran 100n
* Z:\home\khalils\Downloads\files\data\raw_asc\145d4243cb99_ammeter_as_0V.asc
* Generated by LTspice 26.0.1 for Windows.
VAmmeter nVA nVR2 0V Rser=0
R2 nVR2 0 1k
V1 nV1 0 10
R1 nV1 nVA 1k
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 680
WIRE 80 -224 0 -224
WIRE 160 -224 80 -224
WIRE 160 -176 160 -224
WIRE 160 -80 160 -96
WIRE 0 -48 0 -224
WIRE 160 -48 160 -80
WIRE 160 48 160 32
WIRE 160 64 160 48
WIRE 0 176 0 32
WIRE 80 176 0 176
WIRE 160 176 160 144
WIRE 160 176 80 176
WIRE 80 208 80 176
IOPIN 160 -80 Out
IOPIN 160 48 Out
SYMBOL res 144 -192 R0
WINDOW 0 40 42 Left 2
WINDOW 3 45 73 Left 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 160 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 96 60 Left 2
WINDOW 0 37 32 Left 2
WINDOW 3 44 61 Left 2
SYMATTR SpiceLine Rser=0
SYMATTR InstName Ammeter
SYMATTR Value 0V
SYMBOL voltage 0 -64 R0
WINDOW 3 31 86 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 10
SYMATTR InstName V1
SYMBOL res 144 48 R0
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 80 208 0
FLAG 80 -224 nV1
FLAG 160 -80 nVA
FLAG 160 48 nVR2
TEXT -32 232 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1740-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1740-1.8.asy)
R1 IN N001 100k
Rload OUT 0 0.9
C2 N002 0 10n
C1 OUT 0 4.7 Rser=3m
XU1 IN OUT IN N002 OUT N001 MP_01 0 ADP1740-1.8 ;pnba Vin)Sense)EN)SS)Vout)PG))GND
V1 IN 0 2.1
.tran 10m startup
.lib ADP1740-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE -112 32 -128 32
WIRE -16 32 -112 32
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 416 32 368 32
WIRE 496 32 416 32
WIRE 528 32 496 32
WIRE -128 48 -128 32
WIRE -16 48 -16 32
WIRE 416 48 416 32
WIRE 528 48 528 32
WIRE 80 96 80 32
WIRE 96 96 80 96
WIRE -128 144 -128 128
WIRE 416 144 416 112
WIRE 528 144 528 128
WIRE -16 176 -16 128
WIRE 96 176 -16 176
WIRE 16 240 0 240
WIRE 96 240 80 240
WIRE 368 240 368 32
WIRE 368 240 352 240
WIRE 224 304 224 288
SYMBOL ADP1740-1.8 224 128 R0
SYMATTR InstName U1
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 0.9
SYMBOL cap 80 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res -32 32 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL cap 400 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=3m
SYMBOL voltage -128 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.1
FLAG 224 304 0
FLAG -128 144 0
FLAG 0 240 0
FLAG -112 32 IN
FLAG 528 144 0
FLAG 416 144 0
FLAG 496 32 OUT
TEXT 128 352 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2be5b598b7d1_RHV-N.asc
* Generated by LTspice 26.0.1 for Windows.
R1 b 0 1000
V1 a 0 SINE(0 6 60)
D1 b a RR2L6S
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 50m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -176 144 -208 144
WIRE -112 144 -176 144
WIRE 32 144 -48 144
WIRE 48 144 32 144
WIRE -208 192 -208 144
WIRE 48 192 48 144
WIRE -208 320 -208 272
WIRE -80 320 -208 320
WIRE 48 320 48 272
WIRE 48 320 -80 320
WIRE -80 336 -80 320
SYMBOL Misc\\signal -208 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 6 60)
SYMBOL Misc\\EuropeanResistor 32 176 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL diode -48 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value RR2L6S
FLAG -80 336 0
FLAG -176 144 a
FLAG 32 144 b
TEXT -208 336 Left 2 !.tran 50m