Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0dfd12ecc166_preamp.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU7, XU8 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R1 V1st N003 6.2K
R6 N002 V2nd 8.6K tol=5
R2 N003 0 62K
XU7 0 N001 +V -V V2nd level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
XU1 Vi N003 +V -V V1st LF411/MC ;pnba In+)In-)V+)V-)OUT
R4 V2nd N001 56K tol=5
XU8 0 N002 +V -V Vout level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R3 N001 V1st 8.6K tol=5
R5 Vout N002 56K tol=5
.tran .0005
.inc MJE15034.LIB
.inc MJE15035.LIB
.inc LF411.LIB
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3868 1556
WIRE 864 144 848 144
WIRE 976 144 944 144
WIRE 1344 144 1312 144
WIRE 1472 144 1424 144
WIRE 272 176 208 176
WIRE 272 240 272 176
WIRE 448 240 272 240
WIRE 768 240 736 240
WIRE 848 240 848 144
WIRE 864 240 848 240
WIRE 1200 240 1184 240
WIRE 1312 240 1312 144
WIRE 1312 240 1280 240
WIRE 1344 240 1312 240
WIRE 608 256 512 256
WIRE 688 256 608 256
WIRE 736 256 736 240
WIRE 736 256 688 256
WIRE 976 256 976 144
WIRE 976 256 928 256
WIRE 1056 256 976 256
WIRE 1184 256 1184 240
WIRE 1184 256 1056 256
WIRE 1472 256 1472 144
WIRE 1472 256 1408 256
WIRE 1568 256 1472 256
WIRE 448 272 416 272
WIRE 864 272 832 272
WIRE 1344 272 1312 272
WIRE 608 304 608 256
WIRE 832 320 832 272
WIRE 1312 320 1312 272
WIRE 416 400 416 272
WIRE 608 400 608 384
WIRE 608 400 416 400
WIRE 608 416 608 400
IOPIN 208 176 In
IOPIN 1568 256 Out
IOPIN 496 -48 In
IOPIN 496 0 In
SYMBOL res 592 400 R0
SYMATTR InstName R2
SYMATTR Value 62K
SYMBOL Opamps\\UniversalOpamp2 1376 256 R0
SYMATTR InstName U8
SYMBOL Opamps\\opamp2 480 320 M180
SYMATTR InstName U1
SYMATTR Value LF411/MC
SYMBOL res 1440 128 R90
WINDOW 0 0 56 Invisible 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 56K
SYMATTR SpiceLine tol=5
SYMBOL Opamps\\UniversalOpamp2 896 256 R0
SYMATTR InstName U7
SYMBOL res 864 224 R90
WINDOW 0 0 56 Invisible 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 8.6K
SYMATTR SpiceLine tol=5
SYMBOL res 960 128 R90
WINDOW 0 0 56 Invisible 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 56K
SYMATTR SpiceLine tol=5
SYMBOL res 592 288 R0
SYMATTR InstName R1
SYMATTR Value 6.2K
SYMBOL res 1296 224 R90
WINDOW 0 0 56 Invisible 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 8.6K
SYMATTR SpiceLine tol=5
FLAG 208 176 Vi
FLAG 688 256 V1st
FLAG 832 320 0
FLAG 1056 256 V2nd
FLAG 1312 320 0
FLAG 608 496 0
FLAG 480 288 +V
FLAG 480 224 -V
FLAG 896 288 -V
FLAG 1376 288 -V
FLAG 896 224 +V
FLAG 1376 224 +V
FLAG 1568 256 Vout
FLAG 496 -48 +V
FLAG 496 0 -V
TEXT 168 520 Left 2 !.tran .0005
TEXT 176 592 Left 2 !.inc MJE15034.LIB\n.inc MJE15035.LIB
TEXT 448 576 Left 2 !.inc LF411.LIB
* Z:\home\khalils\Downloads\files\data\raw_asc\28a98e7bd159_05-invertin_amplifier.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
V3 in 0 SINE(0 1 1k)
R1 N001 in {r1_val}
XU1 0 N001 vcc vee out LT1001 ;pnba In+)In-)V+)V-)OUT
V2 0 vee +18
V1 vcc 0 +18
Rf out N001 {fb_val}
.param fb_val=2k r1_val=1k
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -64 128 -64
WIRE 288 -64 240 -64
WIRE -128 16 -128 -16
WIRE 192 48 192 32
WIRE 0 64 -16 64
WIRE 16 64 0 64
WIRE 128 64 128 -64
WIRE 128 64 96 64
WIRE 160 64 128 64
WIRE 288 80 288 -64
WIRE 288 80 224 80
WIRE 336 80 288 80
WIRE 352 80 336 80
WIRE 160 96 144 96
WIRE -128 112 -128 96
WIRE -128 112 -192 112
WIRE -16 112 -16 64
WIRE -128 128 -128 112
WIRE 144 128 144 96
WIRE 192 128 192 112
WIRE -192 144 -192 112
WIRE -16 224 -16 192
WIRE -128 240 -128 208
SYMBOL voltage -128 0 R0
WINDOW 3 24 85 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value +18
SYMBOL voltage -128 112 R0
WINDOW 3 19 88 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value +18
SYMBOL voltage -16 96 R0
WINDOW 0 43 66 Left 2
WINDOW 3 20 91 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1k)
SYMBOL res 256 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 45 VTop 2
SYMATTR InstName Rf
SYMATTR Value {fb_val}
SYMBOL OpAmps\\OP07 192 16 R0
SYMATTR InstName U1
SYMBOL res 112 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {r1_val}
FLAG -192 144 0
FLAG -128 -16 vcc
FLAG -128 240 vee
FLAG -16 224 0
FLAG 0 64 in
FLAG 192 128 vee
FLAG 192 32 vcc
FLAG 336 80 out
FLAG 144 128 0
TEXT 16 240 Left 2 !.param fb_val=2k r1_val=1k
TEXT 16 272 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\20c17da87076_TASK2.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 N003 N003 NMOS
R2 N001 0 10k
M2 N001 N002 N003 N003 NMOS
R1 N001 0 10k
V1 N003 0 -25
Vgs N002 N003 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model nmos NMOS(kp=100u, vt0=0.5, L=10u, W=20u)
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 400 16 224 16
WIRE 528 16 400 16
WIRE 624 16 528 16
WIRE 224 96 224 16
WIRE 400 96 400 16
WIRE 528 96 528 16
WIRE 624 96 624 16
WIRE 176 176 16 176
WIRE 16 208 16 176
WIRE 352 208 352 176
WIRE 352 208 16 208
WIRE 16 224 16 208
WIRE 224 224 224 192
WIRE 224 224 112 224
WIRE 400 224 400 192
WIRE 400 224 224 224
WIRE 224 288 224 224
WIRE 16 336 16 304
WIRE 112 336 112 224
WIRE 112 336 16 336
WIRE 224 384 224 368
WIRE 528 384 528 176
WIRE 528 384 224 384
WIRE 624 384 624 176
WIRE 624 384 528 384
WIRE 624 416 624 384
SYMBOL res 512 80 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL nmos 352 96 R0
SYMATTR InstName M2
SYMBOL nmos 176 96 R0
SYMATTR InstName M1
SYMBOL res 608 80 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 16 208 R0
SYMATTR InstName Vgs
SYMATTR Value 5
SYMBOL voltage 224 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -25
FLAG 624 416 0
TEXT -24 416 Left 2 !.model nmos NMOS(kp=100u, vt0=0.5, L=10u, W=20u)
TEXT -8 464 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\20600b2f3629_Fan.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 0 Si4862DY
V2 VCC 0 5V
R_Load 12V N001 50
R3 N003 DO_X 2K
V3 DO_X 0 PULSE(3.3V 0V 0.1 0 0 0.1 0.2 1)
Q1 N002 N003 0 0 BC817-40
R2 N002 0 10K
R1 12V N002 4.7K
V1 12V 0 12V
D1 N001 12V D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0.3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1984 864
WIRE 1552 -656 1552 -688
WIRE 1552 -656 1488 -656
WIRE 1552 -608 1552 -656
WIRE 1488 -592 1488 -656
WIRE 1056 -496 1056 -592
WIRE 1488 -496 1488 -528
WIRE 1552 -496 1552 -528
WIRE 1552 -496 1488 -496
WIRE 1552 -464 1552 -496
WIRE 1056 -384 1056 -416
WIRE 1392 -384 1056 -384
WIRE 1504 -384 1392 -384
WIRE 1056 -352 1056 -384
WIRE 1552 -304 1552 -368
WIRE 1056 -224 1056 -272
WIRE 1392 -144 1392 -384
WIRE -48 -112 -48 -128
WIRE 432 -112 432 -128
WIRE 432 -96 432 -112
WIRE 1184 -96 432 -96
WIRE 1328 -96 1264 -96
WIRE -48 -48 -48 -112
WIRE 432 -48 432 -96
WIRE -48 64 -48 32
WIRE 432 64 432 32
WIRE 1392 96 1392 -48
WIRE -48 272 -48 240
WIRE -48 400 -48 352
SYMBOL voltage -48 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5V
SYMBOL nmos 1504 -464 R0
SYMATTR InstName M1
SYMATTR Value Si4862DY
SYMBOL res 1040 -368 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 1280 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2K
SYMBOL voltage -48 -64 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 12V
SYMATTR InstName V1
SYMBOL npn 1328 -144 R0
SYMATTR InstName Q1
SYMATTR Value BC817-40
SYMBOL res 1536 -624 R0
SYMATTR InstName R_Load
SYMATTR Value 50
SYMBOL res 1040 -512 R0
SYMATTR InstName R1
SYMATTR Value 4.7K
SYMBOL diode 1504 -528 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL voltage 432 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(3.3V 0V 0.1 0 0 0.1 0.2 1)
FLAG -48 240 VCC
FLAG -48 400 0
FLAG -48 64 0
FLAG -48 -112 12V
FLAG 432 64 0
FLAG 432 -112 DO_X
FLAG 1056 -224 0
FLAG 1392 96 0
FLAG 1552 -304 0
FLAG 1552 -688 12V
FLAG 1056 -592 12V
TEXT -80 424 Left 2 !.tran 0.3
* Z:\home\khalils\Downloads\files\data\raw_asc\045f2d9d22d8_TS12_2_YRC.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N003 0 AC 1
R2 N002 N001 4
C1 N002 N001 0.25
C2 N002 0 1
R1 N001 N003 2
R3 N002 0 0.4
.ac dec 1k 0.01 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 32 176 32
WIRE 336 32 288 32
WIRE 32 96 0 96
WIRE 176 96 176 32
WIRE 176 96 112 96
WIRE 336 96 336 32
WIRE 416 96 336 96
WIRE 512 96 416 96
WIRE 576 96 512 96
WIRE 176 160 176 96
WIRE 208 160 176 160
WIRE 336 160 336 96
WIRE 336 160 272 160
WIRE 416 192 416 96
WIRE 512 192 512 96
WIRE 0 208 0 96
WIRE 0 368 0 288
WIRE 304 368 0 368
WIRE 416 368 416 272
WIRE 416 368 304 368
WIRE 512 368 512 256
WIRE 512 368 416 368
WIRE 560 368 512 368
SYMBOL res 400 176 R0
SYMATTR InstName R3
SYMATTR Value 0.4
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL res 304 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4
SYMBOL cap 496 192 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 272 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.25
SYMBOL voltage 0 192 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
FLAG 304 368 0
TEXT 152 440 Left 2 !.ac dec 1k 0.01 10
* Z:\home\khalils\Downloads\files\data\raw_asc\29f0f9bb4241_Diode-trr-1.asc
* Generated by LTspice 26.0.1 for Windows.
D1 a N001 RRE02VSM4S
V1 a 0 PULSE(-200 200 1u 5n 5n 3u 10u) Rser=10
R1 N001 0 150
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -176 128 -208 128
WIRE -112 128 -176 128
WIRE 32 128 -48 128
WIRE -208 176 -208 128
WIRE 32 176 32 128
WIRE -208 304 -208 256
WIRE -80 304 -208 304
WIRE 32 304 32 256
WIRE 32 304 -80 304
WIRE -80 320 -80 304
SYMBOL voltage -208 160 R0
WINDOW 3 10 105 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 0 -71 54 Left 2
SYMATTR Value PULSE(-200 200 1u 5n 5n 3u 10u)
SYMATTR InstName V1
SYMATTR SpiceLine Rser=10
SYMBOL diode -112 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value RRE02VSM4S
SYMBOL Misc\\EuropeanResistor 16 160 R0
SYMATTR InstName R1
SYMATTR Value 150
FLAG -80 320 0
FLAG -176 128 a
TEXT -208 320 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\401cb315ac2f_diode.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
D1 N001 0 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 10 .1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 112 32 112
WIRE 288 112 256 112
WIRE 32 144 32 112
WIRE 32 272 32 224
WIRE 288 272 288 112
WIRE 288 272 32 272
FLAG 288 272 0
SYMBOL voltage 32 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL diode 192 128 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
TEXT 24 328 Left 2 !.dc V1 0 10 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1529.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1529.asy)
V1 IN 0 PWL(0 0 1 10)
R1 OUT N001 500
R2 N001 0 500
C1 OUT 0 47
XU1 OUT N001 0 IN IN LT1529 ;pnba OUT)ADJ)GND)_SHDN)Vin
Rload OUT 0 500
.tran 1
.lib LT1529.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 176 -192 176
WIRE 32 176 16 176
WIRE 368 176 320 176
WIRE 480 176 368 176
WIRE 576 176 480 176
WIRE -192 192 -192 176
WIRE 480 192 480 176
WIRE 576 192 576 176
WIRE 368 224 368 176
WIRE 16 272 16 176
WIRE 32 272 16 272
WIRE -192 288 -192 272
WIRE 480 288 480 256
WIRE 576 288 576 272
WIRE 112 368 112 336
WIRE 240 368 240 336
WIRE 368 368 368 304
WIRE 368 368 240 368
WIRE 368 384 368 368
WIRE 368 480 368 464
SYMBOL res 352 368 R0
SYMATTR InstName R2
SYMATTR Value 500
SYMBOL PowerProducts\\LT1529 176 224 R0
SYMATTR InstName U1
SYMBOL voltage -192 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 464 192 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMBOL res 560 176 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL res 352 208 R0
SYMATTR InstName R1
SYMATTR Value 500
FLAG -192 288 0
FLAG 112 368 0
FLAG 480 288 0
FLAG 576 288 0
FLAG 368 480 0
FLAG 576 176 OUT
FLAG -192 176 IN
TEXT 456 360 Left 2 !.tran 1
* Z:\tmp\asc_dec_bjh7r6w2\13745d7bc05c_LTSpice_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
I2 0 N003 1
R1 N002 0 280
R3 +5V N001 8k2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 43944 804
WIRE 160 -32 144 -32
WIRE -112 -16 -112 -48
WIRE 32 -16 32 -48
WIRE 208 96 208 80
WIRE 32 112 32 64
WIRE 144 112 144 -32
WIRE 144 112 32 112
WIRE 176 112 144 112
WIRE -112 144 -112 64
WIRE 176 144 -112 144
WIRE -736 160 -912 160
WIRE 208 176 208 160
WIRE -912 192 -912 160
WIRE -736 192 -736 160
WIRE -112 192 -112 144
WIRE 32 192 32 112
WIRE -912 304 -912 272
WIRE -736 304 -736 272
WIRE -112 304 -112 272
WIRE 32 304 32 272
SYMBOL current -912 272 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I2
SYMATTR Value 1
SYMBOL res -128 176 R0
SYMATTR InstName R1
SYMATTR Value 280
SYMBOL res 16 -32 R0
SYMATTR InstName R3
SYMATTR Value 8k2
FLAG -912 304 0
FLAG -736 304 0
FLAG -112 304 0
FLAG 32 304 0
FLAG 208 80 +5V
FLAG -112 -48 +5V
FLAG 32 -48 +5V
* Z:\home\khalils\Downloads\files\data\raw_asc\05ed3dd5cbcc_VA-R3-DEMO.asc
* Generated by LTspice 26.0.1 for Windows.
D1 b a RR2L4S
R1 b 0 500
V1 a 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 100
.step temp list -13 37
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 128 -144 128
WIRE 240 128 80 128
WIRE -144 192 -144 128
WIRE 240 192 240 128
WIRE -144 352 -144 272
WIRE 48 352 -144 352
WIRE 240 352 240 272
WIRE 240 352 48 352
WIRE 48 368 48 352
SYMBOL voltage -144 176 R0
WINDOW 3 24 96 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value ""
SYMATTR InstName V1
SYMBOL Misc\\EuropeanResistor 224 176 R0
SYMATTR InstName R1
SYMATTR Value 500
SYMBOL diode 80 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value RR2L4S
FLAG -144 128 a
FLAG 240 128 b
FLAG 48 368 0
TEXT -144 392 Left 2 !.dc V1 0 100
TEXT -152 424 Left 2 !.step temp list -13 37
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1082.asc
* Generated by LTspice 26.0.1 for Windows.
L1 IN N001 150 Rser=0.02 Rpar=5000
D1 N001 OUT MBRS1100
R1 OUT N002 10.7K
R2 N002 0 1.24K
R3 N003 N004 1K
C1 OUT 0 250 Rser=.1
C3 N004 0 1
V1 IN 0 5
XU1 N003 N002 0 N001 IN LT1082 ;pnba Vc)FB)GND)SW)Vin
Rload OUT 0 60
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 25m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1082.asy)
.lib LT1082.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1480
WIRE 1824 896 1600 896
WIRE 1888 896 1824 896
WIRE 2000 896 1968 896
WIRE 2064 896 2000 896
WIRE 2192 896 2128 896
WIRE 2320 896 2192 896
WIRE 2416 896 2320 896
WIRE 1600 912 1600 896
WIRE 2320 912 2320 896
WIRE 2416 912 2416 896
WIRE 1824 944 1824 896
WIRE 2192 944 2192 896
WIRE 1600 1008 1600 992
WIRE 2320 1008 2320 976
WIRE 2416 1008 2416 992
WIRE 2000 1024 2000 896
WIRE 2000 1024 1952 1024
WIRE 2192 1088 2192 1024
WIRE 2192 1088 1952 1088
WIRE 2192 1104 2192 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2192 1200 2192 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
FLAG 2416 896 OUT
FLAG 2192 1200 0
FLAG 2320 1008 0
FLAG 2416 1008 0
FLAG 2064 1248 0
FLAG 1824 1248 0
FLAG 1600 1008 0
FLAG 1600 896 IN
SYMBOL IND 1872 912 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL schottky 2064 912 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS1100
SYMBOL RES 2176 928 R0
SYMATTR InstName R1
SYMATTR Value 10.7K
SYMBOL RES 2176 1088 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL polcap 2304 912 R0
SYMATTR InstName C1
SYMATTR Value 250
SYMATTR SpiceLine Rser=.1
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL VOLTAGE 1600 896 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL POWERPRODUCTS\\LT1082 1824 1088 R0
SYMATTR InstName U1
SYMBOL res 2400 896 R0
SYMATTR InstName Rload
SYMATTR Value 60
TEXT 2248 1280 Left 2 !.tran 25m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP121-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP121-3.3.asy)
V1 IN 0 5.5
C2 OUT 0 1
Rload OUT 0 22
XU1 OUT MP_01 0 IN MP_02 IN ADP121 K=1/4125 ;pnba Vout))GND)En))Vin
C1 IN 0 1
.tran 10m startup
.lib ADP121.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL ADP121-3.3 256 208 R0
SYMATTR InstName U1
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 22
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\eaf10b87da7f_PWM.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N002 0 47n
R3 N003 N002 1k
R1 N001 PWM 1k
C3 N003 0 47n
Vpwm PWM 0 PULSE(0 5 0 30n 30n 16u 32u 100)
R2 N002 N001 1k
C1 N001 0 47n
.tran 0 1m 0 5n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 680
WIRE 560 96 496 96
WIRE 672 96 640 96
WIRE 736 96 672 96
WIRE 848 96 816 96
WIRE 912 96 848 96
WIRE 1024 96 992 96
WIRE 80 128 80 96
WIRE 672 144 672 96
WIRE 848 144 848 96
WIRE 1024 144 1024 96
WIRE 80 240 80 208
WIRE 672 256 672 208
WIRE 848 256 848 208
WIRE 1024 256 1024 208
SYMBOL res 1008 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL cap 1008 144 R0
SYMATTR InstName C3
SYMATTR Value 47n
SYMBOL res 832 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 80 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vpwm
SYMATTR Value PULSE(0 5 0 30n 30n 16u 32u 100)
SYMBOL res 656 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL cap 832 144 R0
SYMATTR InstName C2
SYMATTR Value 47n
SYMBOL cap 656 144 R0
SYMATTR InstName C1
SYMATTR Value 47n
FLAG 80 240 0
FLAG 80 96 PWM
FLAG 672 256 0
FLAG 496 96 PWM
FLAG 848 256 0
FLAG 1024 256 0
TEXT 184 272 Left 2 !.tran 0 1m 0 5n
* Z:\home\khalils\Downloads\files\data\raw_asc\2e11542f3298_MOS-OUT-1.asc
* Generated by LTspice 26.0.1 for Windows.
Vgs N002 0
Vds N001 0
M1 N001 N002 0 0 IRF530
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vds 0 10V Vgs list 4.5V 5V 6V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1292 680
WIRE -560 -144 -720 -144
WIRE -720 -64 -720 -144
WIRE -560 -16 -560 -144
WIRE -768 16 -912 16
WIRE -912 32 -912 16
WIRE -912 128 -912 112
WIRE -720 128 -720 32
WIRE -560 128 -560 64
SYMBOL voltage -560 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 37 60 Left 2
SYMATTR InstName Vds
SYMATTR Value ""
SYMBOL nmos -768 -64 R0
SYMATTR InstName M1
SYMATTR Value IRF530
SYMBOL voltage -912 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 53 Left 2
WINDOW 3 40 69 Left 2
WINDOW 0 36 56 Left 2
SYMATTR Value ""
SYMATTR InstName Vgs
FLAG -560 128 0
FLAG -912 128 0
FLAG -720 128 0
TEXT -856 208 Left 2 !.dc Vds 0 10V  Vgs list 4.5V 5V 6V
* Z:\home\khalils\Downloads\files\data\raw_asc\6c28b3ac8ad1_Nand_gate.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N001 0 5
V2 B 0 PULSE(0 5 0 5n 5n 20m 40m)
M5 N001 B vout N001 PMOS
V1 A 0 PULSE(0 5 0 5n 5n 40m 80m)
M2 N002 B 0 0 NMOS
M1 vout A N002 0 NMOS
M4 N001 A vout N001 PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 80m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 48 -2848 -176 -2848
WIRE -176 -2832 -176 -2848
WIRE -48 -2832 -176 -2832
WIRE -176 -2816 -176 -2832
WIRE -176 -2816 -272 -2816
WIRE -80 -2816 -176 -2816
WIRE -176 -2768 -176 -2816
WIRE -176 -2768 -272 -2768
WIRE -48 -2768 -48 -2832
WIRE -48 -2768 -80 -2768
WIRE -128 -2736 -224 -2736
WIRE -192 -2720 -272 -2720
WIRE -80 -2720 -192 -2720
WIRE -224 -2704 -224 -2736
WIRE -224 -2704 -288 -2704
WIRE -192 -2640 -192 -2720
WIRE -16 -2640 -192 -2640
WIRE -192 -2608 -192 -2640
WIRE -192 -2608 -208 -2608
WIRE -320 -2576 -320 -2736
WIRE -320 -2576 -368 -2576
WIRE -112 -2560 -208 -2560
WIRE -320 -2528 -320 -2576
WIRE -256 -2528 -320 -2528
WIRE -208 -2496 -208 -2512
WIRE -288 -2464 -288 -2704
WIRE -288 -2464 -368 -2464
WIRE -112 -2448 -112 -2560
WIRE -112 -2448 -208 -2448
WIRE -288 -2416 -288 -2464
WIRE -256 -2416 -288 -2416
WIRE -208 -2384 -208 -2400
WIRE -112 -2384 -112 -2448
WIRE -112 -2384 -208 -2384
WIRE -208 -2368 -208 -2384
IOPIN -16 -2640 Out
IOPIN -528 -2576 In
IOPIN -368 -2464 In
IOPIN -528 -2784 In
IOPIN -368 -2576 In
SYMBOL voltage -528 -2800 R0
WINDOW 0 56 16 Right 2
WINDOW 3 -177 -43 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 5n 5n 40m 80m)
SYMBOL voltage 48 -2864 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL pmos4 -320 -2816 R0
SYMATTR InstName M4
SYMBOL nmos4 -256 -2496 R0
SYMATTR InstName M2
SYMBOL pmos4 -128 -2816 R0
SYMATTR InstName M5
SYMBOL voltage -528 -2592 R0
WINDOW 3 -154 191 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 0 5n 5n 20m 40m)
SYMATTR InstName V2
SYMBOL nmos4 -256 -2608 R0
SYMATTR InstName M1
FLAG -208 -2368 0
FLAG -16 -2640 vout
FLAG -528 -2576 B
FLAG -368 -2464 B
FLAG -528 -2784 A
FLAG -368 -2576 A
FLAG -528 -2496 0
FLAG -528 -2704 0
FLAG 48 -2768 0
TEXT -40 -2504 Left 2 !.tran 80m