* Z:\home\khalils\Downloads\files\data\raw_asc\0ac64165dd67_standard_hold.asc
* Generated by LTspice 26.0.1 for Windows.
M3 Qneg Q 0 0 EECMOSN l={l_nmos_q_neg} w={w_nmos_q_neg}
M4 VDD Q Qneg VDD EECMOSP l={l_pmos_q_neg} w={w_pmos_q_neg}
Vdd VDD 0 {vdd}
Vsweep Qneg 0 {vsweep}
M5 Q Qneg 0 0 EECMOSN l={l_nmos_q} w={w_nmos_q}
M6 VDD Qneg Q VDD EECMOSP l={l_pmos_q} w={w_pmos_q}
M7 Q WL BL 0 EECMOSN l={l_ax} w={w_ax}
M8 BLneg WL Qneg 0 EECMOSN l={l_ax} w={w_ax}
Vblneg BLneg 0 {vblneg}
Vbl BL 0 {vbl}
Vwl WL 0 {vwl}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
* Simulation setup to get the SNM of an SRAM cell. Butterfly curve plotted manually
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -1024 0 -1024 -64
WIRE -1024 0 -1072 0
WIRE -512 0 -512 -64
WIRE -512 0 -560 0
WIRE -1072 48 -1072 0
WIRE -1024 48 -1072 48
WIRE -512 48 -512 0
WIRE -512 48 -560 48
WIRE -1360 64 -1360 -80
WIRE -272 64 -272 -80
WIRE -944 80 -976 80
WIRE -608 80 -640 80
WIRE -1456 112 -1584 112
WIRE -1376 112 -1456 112
WIRE -1040 112 -1280 112
WIRE -1024 112 -1024 96
WIRE -1024 112 -1040 112
WIRE -640 112 -640 80
WIRE -640 112 -1024 112
WIRE -560 112 -560 96
WIRE -512 112 -560 112
WIRE -288 112 -512 112
WIRE -272 112 -288 112
WIRE -32 112 -192 112
WIRE 80 112 -32 112
WIRE -1024 128 -1024 112
WIRE -944 128 -944 80
WIRE -560 128 -560 112
WIRE -560 128 -944 128
WIRE -1024 176 -1072 176
WIRE -512 176 -560 176
WIRE -240 176 -240 112
WIRE -1328 192 -1328 112
WIRE -944 208 -944 128
WIRE -944 208 -976 208
WIRE -640 208 -640 112
WIRE -608 208 -640 208
WIRE -1072 224 -1072 176
WIRE -1024 224 -1072 224
WIRE -512 224 -512 176
WIRE -512 224 -560 224
WIRE -1024 256 -1024 224
WIRE -560 256 -560 224
WIRE -768 272 -800 272
WIRE -736 272 -768 272
WIRE -800 304 -800 272
WIRE -800 432 -800 384
FLAG -560 256 0
FLAG -864 0 0
FLAG -800 432 0
FLAG -1024 256 0
FLAG -240 176 0
FLAG -1328 192 0
FLAG 80 192 0
FLAG -1584 192 0
FLAG -1456 112 BL
FLAG -32 112 BLneg
FLAG -1040 112 Q
FLAG -512 112 Qneg
FLAG -768 272 Qneg
FLAG -688 0 0
FLAG -864 -80 VDD
FLAG -1024 -64 VDD
FLAG -512 -64 VDD
FLAG -272 -80 WL
FLAG -688 -80 WL
FLAG -1360 -80 WL
SYMBOL nmos4 -608 128 R0
WINDOW 123 79 185 Left 2
WINDOW 3 77 149 Left 2
SYMATTR Value2 l={l_nmos_q_neg} w={w_nmos_q_neg}
SYMATTR Value EECMOSN
SYMATTR InstName M3
SYMBOL pmos4 -608 0 R0
WINDOW 3 134 15 Left 2
WINDOW 123 137 -28 Left 2
SYMATTR Value EECMOSP
SYMATTR Value2 l={l_pmos_q_neg} w={w_pmos_q_neg}
SYMATTR InstName M4
SYMBOL voltage -864 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vdd
SYMATTR Value {vdd}
SYMBOL voltage -800 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vsweep
SYMATTR Value {vsweep}
SYMBOL nmos4 -976 128 M0
WINDOW 123 71 168 Left 2
WINDOW 3 126 144 Left 2
SYMATTR Value2 l={l_nmos_q} w={w_nmos_q}
SYMATTR Value EECMOSN
SYMATTR InstName M5
SYMBOL pmos4 -976 0 M0
WINDOW 3 119 -14 Left 2
WINDOW 123 103 -46 Left 2
SYMATTR Value EECMOSP
SYMATTR Value2 l={l_pmos_q} w={w_pmos_q}
SYMATTR InstName M6
SYMBOL nmos4 -1280 64 R90
WINDOW 123 79 185 Left 2
WINDOW 3 77 149 Left 2
SYMATTR Value2 l={l_ax} w={w_ax}
SYMATTR Value EECMOSN
SYMATTR InstName M7
SYMBOL nmos4 -192 64 R90
WINDOW 123 81 -61 Left 2
WINDOW 3 79 -22 Left 2
SYMATTR Value2 l={l_ax} w={w_ax}
SYMATTR Value EECMOSN
SYMATTR InstName M8
SYMBOL voltage 80 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vblneg
SYMATTR Value {vblneg}
SYMBOL voltage -1584 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vbl
SYMATTR Value {vbl}
SYMBOL voltage -688 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vwl
SYMATTR Value {vwl}
TEXT -1288 -224 Left 2 ;Simulation setup to get the SNM of an SRAM cell. Butterfly curve plotted manually