Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\103324341d24_Draft1_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N004 N001 N003 N005 Vout AD549 ;pnba In+)In-)V+)V-)OUT
V2 N003 0 15
V3 N005 0 -15
R2 N004 0 10k
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD549.asy)
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 -16 0 -16
WIRE 480 -16 304 -16
WIRE 224 96 32 96
WIRE 224 128 224 96
WIRE -160 144 -176 144
WIRE -112 144 -160 144
WIRE 0 144 0 -16
WIRE 0 144 -32 144
WIRE 192 144 0 144
WIRE 320 160 256 160
WIRE 480 160 320 160
WIRE 192 176 128 176
WIRE 32 240 32 96
WIRE 128 240 128 176
WIRE 224 240 224 192
WIRE 32 368 32 320
WIRE 128 368 128 320
WIRE 224 368 224 320
SYMBOL OpAmps\\AD549 224 96 R0
SYMATTR InstName U1
SYMBOL voltage 32 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage 224 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -15
SYMBOL res 112 224 R0
SYMATTR InstName R2
SYMATTR Value 10k
FLAG 128 368 0
FLAG -160 144 Vin
FLAG 320 160 Vout
FLAG 32 368 0
FLAG 224 368 0
* Z:\home\khalils\Downloads\files\data\raw_asc\05af980a17e8_alpf_gain_2nd.asc
* Generated by LTspice 26.0.1 for Windows.
* Second-order Active Low Pass Filter
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP27.asy)
V1 1+ 0 AC 1
R4 N003 N002 10k
R2 2+ N001 9k
R1 N001 0 1k
XU1 N003 N001 Vp Vn 2+ OP27 ;pnba In+)In-)V+)V-)OUT
V2 Vp 0 5
R3 N002 1+ 10k
V3 Vn 0 -5
C2 N003 0 1n
C1 2+ N002 1n
R5 2+ 0 10k
.ac dec 100 500 500k
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 464 64 384 64
WIRE 512 64 464 64
WIRE 656 64 592 64
WIRE 384 80 384 64
WIRE -96 128 -96 96
WIRE 0 128 0 96
WIRE 384 176 384 160
WIRE 544 176 544 160
WIRE 464 192 464 64
WIRE 512 192 464 192
WIRE 624 208 576 208
WIRE 656 208 656 64
WIRE 656 208 624 208
WIRE 704 208 656 208
WIRE 176 224 160 224
WIRE 256 224 176 224
WIRE 368 224 336 224
WIRE 384 224 368 224
WIRE 480 224 464 224
WIRE 512 224 480 224
WIRE 656 224 656 208
WIRE -96 240 -96 208
WIRE 0 240 0 208
WIRE 176 256 176 224
WIRE 544 256 544 240
WIRE 656 320 656 304
WIRE 176 352 176 336
WIRE 368 368 368 224
WIRE 496 368 368 368
WIRE 624 368 624 208
WIRE 624 368 560 368
WIRE 480 416 480 224
WIRE 480 496 480 480
IOPIN -96 96 In
IOPIN 0 96 In
IOPIN 544 160 In
IOPIN 544 256 In
IOPIN 704 208 In
IOPIN 160 224 In
IOPIN 176 224 In
SYMBOL res 480 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL voltage -96 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 0 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL res 608 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 9k
SYMBOL cap 464 416 R0
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL res 352 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 640 208 R0
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL voltage 176 240 R0
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL Opamps\\OP27 544 144 R0
SYMATTR InstName U1
SYMBOL res 368 64 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL cap 560 352 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
FLAG 176 352 0
FLAG -96 240 0
FLAG 0 240 0
FLAG -96 96 Vp
FLAG 0 96 Vn
FLAG 544 160 Vp
FLAG 544 256 Vn
FLAG 656 320 0
FLAG 704 208 2+
FLAG 160 224 W1
FLAG 176 224 1+
FLAG 384 176 0
FLAG 480 496 0
TEXT -152 304 Left 2 !.ac dec 100 500 500k
TEXT 80 -16 Left 2 ;Second-order Active Low Pass Filter
* Z:\home\khalils\Downloads\files\data\raw_asc\4d42780cab03_H3_-_dari_materi.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 0.
Q1 N001 N002 0 0 2N2222
I1 N002 0 0.
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 5 10m I1 0 100u 20u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 432 112 272 112
WIRE 208 160 96 160
WIRE 96 288 96 240
WIRE 272 288 272 208
WIRE 432 288 432 192
SYMBOL current 96 160 R0
WINDOW 0 24 0 Left 1
WINDOW 3 24 80 Left 1
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 0.
SYMBOL voltage 432 96 R0
WINDOW 0 24 16 Left 1
WINDOW 3 24 96 Left 1
SYMATTR InstName V1
SYMATTR Value 0.
SYMBOL npn 208 112 R0
WINDOW 0 56 32 Left 1
WINDOW 3 56 68 Left 1
SYMATTR InstName Q1
SYMATTR Value 2N2222
FLAG 272 288 0
FLAG 432 288 0
FLAG 96 288 0
TEXT 56 360 Left 1 !.dc V1 0 5 10m I1 0 100u 20u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4122B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4122B.asy)
V2 N002 0 15
R1 OUT N003 10
XU1 N001 IN 0 0 N003 N002 0 N004 ADuM4122x Vrun2=7.2 ;pnba Vdd1)Vin)GND1)GND2)Vout)Vdd2)_SRC)Vout_SRC
V1 N001 0 5
V3 IN 0 PULSE(0 5 0 2n 2n 998n 2u)
R2 OUT N004 10
C1 OUT 0 2n
.tran 10u
.lib ADuM4122x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -16 0 -16
WIRE 448 -16 320 -16
WIRE 0 0 0 -16
WIRE 448 0 448 -16
WIRE 160 48 160 -16
WIRE 320 48 320 -16
WIRE 0 96 0 80
WIRE 448 96 448 80
WIRE 112 160 -288 160
WIRE 400 160 368 160
WIRE 496 160 480 160
WIRE 544 160 496 160
WIRE 576 160 544 160
WIRE -288 176 -288 160
WIRE 544 176 544 160
WIRE 112 240 96 240
WIRE 400 240 368 240
WIRE 496 240 496 160
WIRE 496 240 480 240
WIRE 544 256 544 240
WIRE -288 272 -288 256
WIRE 160 352 160 336
WIRE 320 352 320 336
SYMBOL res 496 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL voltage 448 -16 R0
WINDOW 0 29 30 Left 2
WINDOW 3 31 84 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL res 496 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL cap 528 176 R0
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL ADuM4122B 240 160 R0
SYMATTR InstName U1
SYMBOL voltage -288 160 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 2n 2n 998n 2u)
SYMBOL voltage 0 -16 R0
WINDOW 0 25 25 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 544 256 0
FLAG 576 160 OUT
FLAG 448 96 0
FLAG 0 96 0
FLAG -288 272 0
FLAG 320 352 0
FLAG 160 352 0
FLAG 96 240 0
FLAG -288 160 IN
TEXT 416 336 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\e075b24d89db_ts14.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 SINE(0 1 1 0 0 0 1000) AC 1 0 Rser=1
L2 N002 N003 1
C1 N002 0 2
R1 N003 0 1
L1 N001 N002 1
.net I(R1) V1
.ac dec 1000 0.001 1000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 960 680
WIRE 336 32 80 32
WIRE 496 32 416 32
WIRE 608 32 496 32
WIRE 784 32 688 32
WIRE 496 80 496 32
WIRE 784 96 784 32
WIRE 80 112 80 32
WIRE 80 304 80 192
WIRE 496 304 496 144
WIRE 496 304 80 304
WIRE 784 304 784 176
WIRE 784 304 496 304
WIRE 496 320 496 304
SYMBOL ind 320 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL cap 480 80 R0
SYMATTR InstName C1
SYMATTR Value 2
SYMBOL voltage 80 96 R0
WINDOW 3 24 152 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 24 180 Left 2
SYMATTR Value SINE(0 1 1 0 0 0 1000)
SYMATTR Value2 AC 1 0
SYMATTR SpiceLine Rser=1
SYMATTR InstName V1
SYMBOL res 768 80 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL ind 592 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 1
FLAG 496 320 0
TEXT 72 424 Left 2 !.net I(R1) V1
TEXT 64 448 Left 2 !.ac dec 1000 0.001 1000
* Z:\home\khalils\Downloads\files\data\raw_asc\02797441fc65_MOSFET_Switch_alt.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N002 N004 0 0 BC547B
R3 N003 N002 100
R2 N004 control 1k
M1 out N003 0 0 BS170
V2 N001 0 12V
R4 N001 N002 1k
V1 control 0 PULSE(0 5 0 10n 10n 1.666u 3.333u)
R1 N001 out 120
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 33u
.meas TRAN TotalLoss INTEGRAL V(out)*Id(M1)
.meas TRAN AvgPower AVG V(out)*Id(M1)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1292 680
WIRE -832 -336 -1088 -336
WIRE -688 -336 -832 -336
WIRE -1088 -288 -1088 -336
WIRE -832 -288 -832 -336
WIRE -832 -192 -832 -208
WIRE -832 -176 -832 -192
WIRE -688 -176 -688 -336
WIRE -1088 -144 -1088 -208
WIRE -1024 -144 -1088 -144
WIRE -1088 -112 -1088 -144
WIRE -1024 -96 -1024 -144
WIRE -992 -96 -1024 -96
WIRE -880 -96 -912 -96
WIRE -1344 -64 -1376 -64
WIRE -1264 -64 -1344 -64
WIRE -1152 -64 -1184 -64
WIRE -1376 -32 -1376 -64
WIRE -1376 96 -1376 48
WIRE -1088 96 -1088 -16
WIRE -1088 96 -1376 96
WIRE -832 96 -832 -80
WIRE -832 96 -1088 96
WIRE -688 96 -688 -96
WIRE -688 96 -832 96
WIRE -832 128 -832 96
SYMBOL Misc\\EuropeanResistor -1168 -80 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL Misc\\EuropeanResistor -848 -304 R0
SYMATTR InstName R1
SYMATTR Value 120
SYMBOL npn -1152 -112 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL nmos -880 -176 R0
SYMATTR InstName M1
SYMATTR Value BS170
SYMBOL voltage -688 -192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 36 82 Left 2
SYMATTR InstName V2
SYMATTR Value 12V
SYMBOL voltage -1376 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 3 8 102 Left 2
WINDOW 0 35 44 Left 2
WINDOW 39 -81 178 Left 2
SYMATTR Value PULSE(0 5 0 10n 10n 1.666u 3.333u)
SYMATTR InstName V1
SYMBOL Misc\\EuropeanResistor -896 -112 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL Misc\\EuropeanResistor -1104 -304 R0
SYMATTR InstName R4
SYMATTR Value 1k
FLAG -832 128 0
FLAG -1344 -64 control
FLAG -832 -192 out
TEXT -1384 120 Left 2 !.tran 33u
TEXT -1384 160 Left 2 !.meas TRAN TotalLoss INTEGRAL V(out)*Id(M1)
TEXT -1384 184 Left 2 !.meas TRAN AvgPower AVG V(out)*Id(M1)
* Z:\home\khalils\Downloads\files\data\raw_asc\0ea86558b792_up_5bitcounter-clamp.asc
* Generated by LTspice 26.0.1 for Windows.
A1 clk_buf clr 0 0 0 B[0] 0 0 counter cycles=2*{k}
A2 clk_buf clr 0 0 0 B[1] 0 0 counter cycles=4*{k}
A3 clk_buf clr 0 0 0 B[2] 0 0 counter cycles=8*{k}
A4 clk_buf clr 0 0 0 B[3] 0 0 counter cycles=16*{k}
A5 clk_buf clr 0 0 0 B[4] 0 0 counter cycles=32*{k}
A6 clk N001 0 0 0 0 clk_buf 0 AND
A7 B[0] B[1] B[2] B[3] B[4] N001 0 0 AND
.param k=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -160 -160 -208 -160
WIRE -160 -144 -160 -160
WIRE -144 -144 -160 -144
WIRE -144 -128 -208 -128
WIRE -144 -112 -192 -112
WIRE -192 -96 -192 -112
WIRE -192 -96 -208 -96
WIRE -144 -96 -176 -96
WIRE -32 -96 -80 -96
WIRE -144 -80 -160 -80
WIRE -32 -80 -48 -80
WIRE -176 -64 -176 -96
WIRE -176 -64 -208 -64
WIRE -48 -64 -48 -80
WIRE -32 -64 -48 -64
WIRE -48 -48 -48 -64
WIRE -32 -48 -48 -48
WIRE -160 -32 -160 -80
WIRE -160 -32 -208 -32
WIRE -48 -32 -48 -48
WIRE -32 -32 -48 -32
WIRE -16 -32 -16 -48
WIRE -16 -32 -32 -32
IOPIN 320 272 Out
IOPIN 320 112 Out
IOPIN -32 -112 In
IOPIN 320 -48 Out
IOPIN 64 272 Out
IOPIN 64 112 Out
IOPIN -48 272 In
IOPIN 208 -48 In
IOPIN 208 112 In
IOPIN 208 272 In
IOPIN -48 112 In
IOPIN -208 -96 Out
IOPIN -208 -32 Out
IOPIN -208 -64 Out
IOPIN -208 -128 Out
IOPIN -208 -160 Out
SYMBOL Digital\\and 0 -144 R0
SYMATTR InstName A6
SYMBOL Digital\\srflop 0 16 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=32*{k}
SYMATTR InstName A5
SYMATTR SpiceModel counter
SYMBOL Digital\\srflop 0 176 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=16*{k}
SYMATTR InstName A4
SYMATTR SpiceModel counter
SYMBOL Digital\\srflop 256 16 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=4*{k}
SYMATTR InstName A2
SYMATTR SpiceModel counter
SYMBOL Digital\\srflop 256 176 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=2*{k}
SYMATTR InstName A1
SYMATTR SpiceModel counter
SYMBOL Digital\\srflop 256 -144 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=8*{k}
SYMATTR InstName A3
SYMATTR SpiceModel counter
SYMBOL Digital\\and -112 -176 R0
SYMATTR InstName A7
FLAG 208 304 0
FLAG 304 224 0
FLAG 320 272 B[0]
FLAG 208 144 0
FLAG 304 64 0
FLAG 320 112 B[1]
FLAG 208 -16 0
FLAG -32 -112 clk
FLAG 304 -96 0
FLAG 320 -48 B[2]
FLAG -48 304 0
FLAG 48 224 0
FLAG 64 272 B[3]
FLAG -48 144 0
FLAG 48 64 0
FLAG 64 112 B[4]
FLAG -48 272 clr
FLAG 208 -48 clr
FLAG 208 112 clr
FLAG 208 272 clr
FLAG -48 112 clr
FLAG -48 64 clk_buf
FLAG -48 224 clk_buf
FLAG 208 64 clk_buf
FLAG 208 -96 clk_buf
FLAG 208 224 clk_buf
FLAG -32 -32 0
FLAG 32 -64 0
FLAG 32 -96 clk_buf
FLAG -128 -80 0
FLAG -80 -128 0
FLAG -208 -96 B[2]
FLAG -208 -32 B[4]
FLAG -208 -64 B[3]
FLAG -208 -128 B[1]
FLAG -208 -160 B[0]
TEXT 48 -160 Left 2 !.param k=1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL42002-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL42002-5.0.asy)
V1 IN 0 7
C2 N001 0 4.7n
C1 OUT 0 2.2 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADPL42002-5.0 ;pnba Vin)Sense)EN)SS)Vout)GND
Rload OUT 0 25
.tran 6m startup
.lib ADPL42002-5.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 7
SYMBOL ADPL42002-5.0 224 128 R0
SYMATTR InstName U1
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 25
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\e075b24d89db_ts14.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 0 2
L1 N001 N002 1
L2 N002 N003 1
R1 N003 0 1
V1 N001 0 SINE(0 1 1 0 0 0 1000) AC 1 0 Rser=1
.net I(R1) V1
.ac dec 1000 0.001 1000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 960 680
WIRE 336 32 80 32
WIRE 496 32 416 32
WIRE 608 32 496 32
WIRE 784 32 688 32
WIRE 496 80 496 32
WIRE 784 96 784 32
WIRE 80 112 80 32
WIRE 80 304 80 192
WIRE 496 304 496 144
WIRE 496 304 80 304
WIRE 784 304 784 176
WIRE 784 304 496 304
WIRE 496 320 496 304
SYMBOL res 768 80 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL ind 320 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL cap 480 80 R0
SYMATTR InstName C1
SYMATTR Value 2
SYMBOL ind 592 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 1
SYMBOL voltage 80 96 R0
WINDOW 3 24 152 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 24 180 Left 2
SYMATTR Value SINE(0 1 1 0 0 0 1000)
SYMATTR Value2 AC 1 0
SYMATTR SpiceLine Rser=1
SYMATTR InstName V1
FLAG 496 320 0
TEXT 72 424 Left 2 !.net I(R1) V1
TEXT 64 448 Left 2 !.ac dec 1000 0.001 1000
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5684R.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5684R.asy)
XU1 vDAC Vdd 0 vOUT AD5684R Gain=2 ;pnba Vdac)Vdd)GND)Vout
V1 Vdd 0 5
CLOAD vOUT 0 10n
Vdac1 NC_01 0 1.25
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
I1 0 0 100 AC 1
.tran 200u
.lib AD5684R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 272 112 192 112
WIRE 464 112 272 112
WIRE -800 144 -800 112
WIRE 272 160 272 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL AD5684R -208 112 R0
SYMATTR InstName U1
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 100
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2
* Z:\home\khalils\Downloads\files\data\raw_asc\30de2612192e_3PhaseRect.asc
* Generated by LTspice 26.0.1 for Windows.
* This is a 3-Phase rectifier circuit.\nReference: Schuler, 7th edition, page 71.\nRun the simulation and probe the waveform across R1.\nLeft-click the vertical axis and change the bottom axis limit to 0 V.\nThe low ripple content of three-phase rectification is apparent.
V2 N004 N005 SINE(0 170 60 0 0 120)
V1 N003 N005 SINE(0 170 60)
D1 N002 N001 D
D5 N004 N001 D
R1 N001 0 10
D6 0 N004 D
D2 0 N002 D
D3 N003 N001 D
D4 0 N003 D
V3 N002 N005 SINE(0 170 60 0 0 -120)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 33.3333e-3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 932 680
WIRE 416 48 336 48
WIRE 496 48 416 48
WIRE 544 48 496 48
WIRE 336 64 336 48
WIRE 416 64 416 48
WIRE 496 64 496 48
WIRE 272 80 -80 80
WIRE 224 128 80 128
WIRE 544 144 544 48
WIRE 272 160 272 80
WIRE 336 160 336 128
WIRE 336 160 272 160
WIRE 224 176 224 128
WIRE 416 176 416 128
WIRE 416 176 224 176
WIRE -80 192 -80 80
WIRE 80 192 80 128
WIRE 496 192 496 128
WIRE 496 192 288 192
WIRE 336 224 336 160
WIRE 416 224 416 176
WIRE 496 224 496 192
WIRE 496 240 496 224
WIRE -80 288 -80 272
WIRE 80 288 80 272
WIRE 80 288 -80 288
WIRE 336 304 336 288
WIRE 416 304 416 288
WIRE 416 304 336 304
WIRE 496 304 496 288
WIRE 496 304 416 304
WIRE 544 304 544 224
WIRE 544 304 496 304
WIRE 544 336 544 304
WIRE 80 352 80 288
WIRE 80 464 80 432
WIRE 288 464 288 192
WIRE 288 464 80 464
SYMBOL diode 352 288 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D2
SYMBOL diode 512 288 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D6
SYMBOL diode 512 128 R180
WINDOW 0 24 64 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D5
SYMBOL diode 352 128 R180
WINDOW 0 27 63 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D1
SYMBOL diode 432 128 R180
WINDOW 0 28 64 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D3
SYMBOL diode 432 288 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D4
SYMBOL voltage 80 176 R0
WINDOW 3 -76 -69 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 40 56 Left 0
SYMATTR Value SINE(0 170 60)
SYMATTR InstName V1
SYMBOL voltage -80 176 R0
WINDOW 3 -105 139 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 38 57 Left 0
SYMATTR Value SINE(0 170 60 0 0 -120)
SYMATTR InstName V3
SYMBOL voltage 80 448 R180
WINDOW 0 36 54 Left 0
WINDOW 3 -122 -39 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 170 60 0 0 120)
SYMBOL res 528 128 R0
SYMATTR InstName R1
SYMATTR Value 10
FLAG 544 336 0
TEXT 344 408 Left 0 !.tran 33.3333e-3
TEXT -128 -104 Left 0 ;This is a 3-Phase rectifier circuit.\nReference: Schuler, 7th edition, page 71.\nRun the simulation and probe the waveform across R1.\nLeft-click the vertical axis and change the bottom axis limit to 0 V.\nThe low ripple content of three-phase rectification is apparent.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3590.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3590.asy)
V1 IN 0 48
D1 N002 N001 QTLP690C N=4
XU1 N003 0 N004 IN N002 N003 LT3590 ;pnba CTRL)GND)SW)Vin)LED)Vreg
C1 IN N001 1
C2 N003 0 .1
R1 IN N002 4
L1 N001 N004 470
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 300u startup
.lib LT3590.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 -96 176 -96
WIRE 512 -96 368 -96
WIRE 176 0 176 -96
WIRE 176 0 -48 0
WIRE 208 0 176 0
WIRE 336 0 288 0
WIRE 400 0 336 0
WIRE 512 0 512 -96
WIRE 512 0 464 0
WIRE -48 16 -48 0
WIRE 176 64 176 0
WIRE 336 64 336 0
WIRE 512 80 512 0
WIRE -48 112 -48 96
WIRE 112 144 48 144
WIRE 512 208 512 160
WIRE 512 208 400 208
WIRE 48 272 48 144
WIRE 112 272 48 272
WIRE 48 288 48 272
WIRE 48 368 48 352
WIRE 256 368 256 352
SYMBOL cap 32 288 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL LED 400 16 R270
WINDOW 0 75 35 VTop 2
WINDOW 3 0 32 VBottom 2
WINDOW 123 -35 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value QTLP690C
SYMATTR Value2 N=4
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 192 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 4
SYMBOL ind 496 64 R0
SYMATTR InstName L1
SYMATTR Value 470
SYMBOL voltage -48 0 R0
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL cap 304 -80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LT3590 256 208 R0
SYMATTR InstName U1
FLAG 256 368 0
FLAG 48 368 0
FLAG -48 112 0
FLAG -48 0 IN
TEXT 432 320 Left 2 !.tran 300u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2d4b2ffad8ce_Mod_Generator.asc
* Generated by LTspice 26.0.1 for Windows.
B1 mod 0 V=V(low_freq)*V(high_freq)
R2 N001 0 10k
V1 low_freq 0 PULSE(0 1.3 0 1n 1n 50u 100u)
C2 N001 0 2n
V2 high_freq 0 SINE(0 1 1Meg 0 0 90)
D2 mod N001 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.5e-3
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1668 680
WIRE 1168 -16 1088 -16
WIRE 1296 -16 1168 -16
WIRE 1168 16 1168 -16
WIRE 1296 16 1296 -16
WIRE -208 112 -208 16
WIRE 256 128 256 32
WIRE 640 144 640 32
WIRE 1168 160 1168 80
WIRE 1248 160 1168 160
WIRE 1296 160 1296 96
WIRE 1296 160 1248 160
WIRE 1248 208 1248 160
WIRE -208 288 -208 192
WIRE 256 304 256 208
WIRE 640 304 640 224
SYMBOL diode 1024 0 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL voltage -208 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1.3 0 1n 1n 50u 100u)
SYMBOL res 1280 0 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL bv 640 128 R0
SYMATTR InstName B1
SYMATTR Value V=V(low_freq)*V(high_freq)
SYMBOL voltage 256 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 1 1Meg 0 0 90)
SYMBOL cap 1152 16 R0
SYMATTR InstName C2
SYMATTR Value 2n
FLAG -208 288 0
FLAG 256 304 0
FLAG -208 16 low_freq
FLAG 256 32 high_freq
FLAG 640 304 0
FLAG 640 32 mod
FLAG 1024 -16 mod
FLAG 1248 208 0
TEXT -240 312 Left 2 !.tran 0.5e-3