Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\058f8c9d6702_BoyleNoise1001_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N006 N005 10K
R4 N005 0 10
S2 OUT N002 0 N004 SW
S1 N006 OUT N004 0 SW
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 680
WIRE 352 32 352 16
WIRE 288 48 288 -64
WIRE 320 48 288 48
WIRE 416 64 416 -64
WIRE 416 64 384 64
WIRE 656 64 416 64
WIRE 320 80 112 80
WIRE 656 96 656 64
WIRE 352 112 352 96
WIRE 608 160 592 160
WIRE 192 192 160 192
WIRE 288 192 272 192
WIRE 304 192 288 192
WIRE 416 192 384 192
WIRE 496 192 480 192
WIRE 592 192 592 160
WIRE 592 192 576 192
WIRE 656 192 656 176
WIRE 720 192 656 192
WIRE 656 208 656 192
WIRE 592 224 592 192
WIRE 608 224 592 224
WIRE 352 288 352 272
WIRE 288 304 288 192
WIRE 320 304 288 304
WIRE 416 320 416 192
WIRE 416 320 384 320
WIRE 656 320 656 288
WIRE 656 320 416 320
WIRE 112 336 112 80
WIRE 320 336 112 336
WIRE 112 352 112 336
WIRE 352 368 352 352
SYMBOL res 400 176 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res 288 176 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL sw 656 192 M180
WINDOW 0 29 92 Left 0
WINDOW 3 18 22 Left 0
SYMATTR InstName S2
SYMBOL sw 656 304 M180
WINDOW 0 28 89 Left 0
WINDOW 3 18 22 Left 0
SYMATTR InstName S1
FLAG 352 16 +V
FLAG 352 112 -V
FLAG 352 272 +V
FLAG 352 368 -V
FLAG 608 112 0
FLAG 608 272 0
FLAG 480 192 0
FLAG 720 192 OUT
FLAG 160 192 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG722.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG722.asy)
V1 +V 0 5
C1 N002 0 35p
R1 N002 0 300
XU1 N003 N002 N001 0 +V ADG722 ;pnba IN)D)S)GND)Vdd
VS N001 0 3
V4 N003 0 PULSE(0 3 0 10n 10n 980n 2u)
.tran 10u
.lib ADG722.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -368 -16 -400 -16
WIRE -240 -16 -288 -16
WIRE 0 -16 -48 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE -480 32 -480 16
WIRE 112 32 112 -16
WIRE -240 48 -368 48
WIRE -368 112 -368 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -480 128 -480 112
WIRE -144 176 -144 160
WIRE -368 272 -368 192
SYMBOL voltage -272 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL voltage -480 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL ADG722 -144 32 R0
SYMATTR InstName U1
SYMBOL voltage -368 96 R0
WINDOW 3 17 129 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 10n 10n 980n 2u)
SYMATTR InstName V4
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 300
FLAG -480 128 0
FLAG -480 16 +V
FLAG -400 -16 0
FLAG -144 -112 +V
FLAG -144 176 0
FLAG -368 272 0
FLAG 0 112 0
FLAG 112 112 0
TEXT -536 200 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL83200.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 OUT 1N5819
MQ1 N002 N003 OUT OUT FDC638P
R1 OUT N004 470K
C1 OUT 0 10
Rload OUT 0 100
V1 N002 0 PWL(0 0 20u 5)
V2 N001 0 PWL(0 0 1 7)
XU1 N002 0 0 N004 N003 OUT ADPL83200 ;pnba VIN)GND)CTL)STAT)GATE)SENSE
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 1 100u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL83200.asy)
.lib ADPL83200.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2500 1444
WIRE 1760 1024 1216 1024
WIRE 2064 1024 1824 1024
WIRE 1216 1040 1216 1024
WIRE 1936 1104 1408 1104
WIRE 2064 1104 2064 1024
WIRE 2064 1104 2032 1104
WIRE 2112 1104 2064 1104
WIRE 2240 1104 2112 1104
WIRE 2336 1104 2240 1104
WIRE 2240 1120 2240 1104
WIRE 2336 1120 2336 1104
WIRE 1216 1136 1216 1120
WIRE 2112 1184 2112 1104
WIRE 1408 1216 1408 1104
WIRE 1680 1216 1408 1216
WIRE 2064 1216 2064 1104
WIRE 2064 1216 1936 1216
WIRE 2240 1216 2240 1184
WIRE 2336 1216 2336 1200
WIRE 1408 1232 1408 1216
WIRE 1680 1296 1648 1296
WIRE 2016 1296 2016 1152
WIRE 2016 1296 1936 1296
WIRE 1408 1328 1408 1312
WIRE 1680 1376 1648 1376
WIRE 2112 1376 2112 1264
WIRE 2112 1376 1936 1376
FLAG 1648 1376 0
FLAG 1648 1296 0
FLAG 2240 1216 0
FLAG 2336 1216 0
FLAG 1408 1328 0
FLAG 1216 1136 0
FLAG 2336 1104 OUT
SYMBOL schottky 1760 1040 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMBOL PMOS 1936 1152 R270
WINDOW 0 90 48 VCenter 2
WINDOW 3 63 45 VCenter 2
SYMATTR InstName Q1
SYMATTR Value FDC638P
SYMBOL RES 2096 1168 R0
SYMATTR InstName R1
SYMATTR Value 470K
SYMBOL cap 2224 1120 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 2320 1104 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL VOLTAGE 1408 1216 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 20u 5)
SYMBOL voltage 1216 1024 R0
SYMATTR InstName V2
SYMATTR Value PWL(0 0 1 7)
SYMBOL ADPL83200 1808 1296 R0
SYMATTR InstName U1
TEXT 2176 1408 Left 2 !.tran 0 1 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17561.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17561.asy)
XU1 IN N007 0 0 N002 N004 0 OUT N003 N006 MAX17561 ;pnba IN)SETI)GND)_HVEN)EN)_FLAG)_RIEN)OUT)UVLO)OVLO
R1 IN N003 2.1Meg
R3 N006 IN 499K
V1 IN 0 24
R4 0 N006 20K
R8 N007 0 2.87K
S1 0 OUT N001 0 SHORT
R2 N003 0 200K
C2 OUT 0 150
V4 N002 0 2
R6 N005 N004 20K
V2 N005 0 5
V3 N001 0 PULSE(0 1 70m 1m 1m 100m)
.model SHORT SW(Ron=4 Roff=100K Vt=.5 Vh=-.4)
.tran 0.8 startup
.lib MAX17561.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1800 680
WIRE -304 -352 -432 -352
WIRE -192 -352 -304 -352
WIRE -16 -352 -192 -352
WIRE 400 -352 272 -352
WIRE 512 -352 400 -352
WIRE 672 -352 560 -352
WIRE -432 -336 -432 -352
WIRE 400 -336 400 -352
WIRE 512 -336 512 -352
WIRE 672 -336 672 -352
WIRE 560 -320 560 -352
WIRE -16 -304 -96 -304
WIRE -96 -288 -96 -304
WIRE -304 -272 -304 -352
WIRE -432 -240 -432 -256
WIRE 400 -240 400 -272
WIRE 512 -240 512 -256
WIRE 672 -240 672 -256
WIRE -96 -192 -96 -208
WIRE -304 -160 -304 -192
WIRE -16 -160 -304 -160
WIRE 384 -160 272 -160
WIRE 576 -160 464 -160
WIRE -304 -144 -304 -160
WIRE 576 -128 576 -160
WIRE -192 -96 -192 -352
WIRE 400 -64 272 -64
WIRE -304 -32 -304 -64
WIRE 400 -32 400 -64
WIRE 576 -32 576 -48
WIRE -192 16 -192 -16
WIRE -16 16 -192 16
WIRE 336 16 272 16
WIRE -192 32 -192 16
WIRE 336 32 336 16
WIRE -16 128 -80 128
WIRE 336 128 336 112
WIRE 336 128 272 128
WIRE -192 160 -192 112
WIRE -80 160 -80 128
WIRE 336 160 336 128
SYMBOL res 320 16 R0
SYMATTR InstName R8
SYMATTR Value 2.87K
SYMBOL voltage 576 -144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res -320 -160 R0
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL sw 512 -240 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL res -208 0 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 499K
SYMBOL res -208 128 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 20K
SYMBOL voltage -96 -304 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 2
SYMBOL cap 384 -336 R0
SYMATTR InstName C2
SYMATTR Value 150
SYMBOL res -320 -288 R0
SYMATTR InstName R1
SYMATTR Value 2.1Meg
SYMBOL voltage -432 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 480 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 20K
SYMBOL voltage 672 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 70m 1m 1m 100m)
SYMBOL MAX17561 128 -112 R0
SYMATTR InstName U1
FLAG -432 -240 0
FLAG 400 -240 0
FLAG 512 -352 OUT
FLAG -432 -352 IN
FLAG 512 -240 0
FLAG 560 -272 0
FLAG 672 -240 0
FLAG -192 160 0
FLAG 336 160 0
FLAG 576 -32 0
FLAG -96 -192 0
FLAG -304 -32 0
FLAG -80 160 0
FLAG 400 -32 0
TEXT 480 144 Left 2 !.model SHORT SW(Ron=4 Roff=100K Vt=.5 Vh=-.4)
TEXT 480 184 Left 2 !.tran 0.8 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1763-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1763-3.asy)
Rload OUT 0 500
C1 OUT 0 10
C2 OUT N001 .01
V1 IN 0 PWL(0 0 1 10)
XU1 OUT OUT 0 N001 IN MP_01 MP_02 IN LT1763-3 ;pnba OUT)Sense)GND)BYP)_SHDN)))IN
.tran 1
.lib LT1763.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 32 304 32
WIRE 352 32 320 32
WIRE 432 32 352 32
WIRE 528 32 432 32
WIRE 0 48 -208 48
WIRE 16 48 0 48
WIRE 432 48 432 32
WIRE 528 48 528 32
WIRE -208 64 -208 48
WIRE 352 64 352 32
WIRE 320 96 320 32
WIRE 320 96 304 96
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 432 144 432 112
WIRE 528 144 528 128
WIRE -208 160 -208 144
WIRE 352 160 352 128
WIRE 352 160 304 160
WIRE 160 240 160 208
SYMBOL cap 416 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 336 64 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT1763-3 160 96 R0
SYMATTR InstName U1
FLAG -208 160 0
FLAG 432 144 0
FLAG 528 144 0
FLAG 160 240 0
FLAG 528 32 OUT
FLAG -208 48 IN
TEXT 376 200 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1017.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
XU1 N002 N001 +V 0 OUT LT1017 ;pnba In+)In-)V+)V-)OUT
R1 N002 0 100K
R2 +V N002 1K
R3 N001 0 20K
C1 +V N001 1
.tran 5m startup
* Delay On Power Up
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1017.asy)
.lib LT1017.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -208 112 -208 96
WIRE -208 112 -304 112
WIRE -96 112 -208 112
WIRE -208 128 -208 112
WIRE -304 144 -304 112
WIRE -432 192 -432 176
WIRE -96 208 -96 112
WIRE -304 224 -304 208
WIRE -128 224 -304 224
WIRE -304 240 -304 224
WIRE 0 240 -64 240
WIRE -208 256 -208 208
WIRE -128 256 -208 256
WIRE -208 272 -208 256
WIRE -432 288 -432 272
WIRE -96 304 -96 272
WIRE -304 336 -304 320
WIRE -208 368 -208 352
FLAG -432 288 0
FLAG -432 176 +V
FLAG -208 96 +V
FLAG -96 304 0
FLAG -208 368 0
FLAG -304 336 0
FLAG 0 240 OUT
SYMBOL voltage -432 176 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL LT1017 -96 240 R0
SYMATTR InstName U1
SYMBOL res -224 256 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res -224 112 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res -320 224 R0
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL cap -320 144 R0
SYMATTR InstName C1
SYMATTR Value 1
TEXT 0 352 Left 2 !.tran 5m startup
TEXT -184 56 Bottom 2 ;Delay On Power Up
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3616.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3616.asy)
XU2 0 IN 0 MP_01 MP_02 MP_03 MP_04 IN MP_05 MP_06 N001 MP_07 MP_08 IN IN NC_09 0 N002 IN IN 0 LTC3616 ;pnba SRLIM/DDR)Rt/SYNC)SGND)))))PVin)))SW)))SVin)Run)Pgood)Mode)FB)Ith)Trk/SS)PGND
R2 N002 0 210K
L1 N001 OUT .22 Rser=5m Rpar=5K
Rload OUT 0 .41
C1 OUT 0 47 x2 Rser=5m
R1 OUT N002 665K
V1 IN 0 3.6
.tran 1.2m startup
.lib LTC3616.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1272 680
WIRE -16 -80 -112 -80
WIRE 128 -80 -16 -80
WIRE 256 -80 128 -80
WIRE 384 -80 256 -80
WIRE -112 -48 -112 -80
WIRE 128 -48 128 -80
WIRE 256 -48 256 -80
WIRE 32 16 16 16
WIRE 416 16 352 16
WIRE 528 16 496 16
WIRE 640 16 528 16
WIRE 736 16 640 16
WIRE 528 32 528 16
WIRE 640 32 640 16
WIRE 736 32 736 16
WIRE -112 48 -112 32
WIRE 528 128 528 112
WIRE 528 128 352 128
WIRE 640 128 640 96
WIRE 736 128 736 112
WIRE 528 144 528 128
WIRE -16 240 -16 -80
WIRE 32 240 -16 240
WIRE 384 240 384 -80
WIRE 384 240 352 240
WIRE 528 240 528 224
WIRE 32 352 16 352
WIRE 384 352 384 240
WIRE 384 352 352 352
WIRE -16 464 -16 240
WIRE 32 464 -16 464
WIRE 368 464 352 464
WIRE 192 544 192 528
SYMBOL voltage -112 -64 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL res 512 16 R0
SYMATTR InstName R1
SYMATTR Value 665K
SYMBOL LTC3616 192 240 R0
SYMATTR InstName U2
SYMBOL cap 624 32 R0
WINDOW 123 31 69 Left 2
WINDOW 3 37 37 Left 2
SYMATTR Value2 x2
SYMATTR Value 47
SYMATTR InstName C1
SYMATTR SpiceLine Rser=5m
SYMBOL res 720 16 R0
SYMATTR InstName Rload
SYMATTR Value .41
SYMBOL ind 400 32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value .22
SYMATTR SpiceLine Rser=5m Rpar=5K
SYMBOL res 512 128 R0
SYMATTR InstName R2
SYMATTR Value 210K
FLAG -112 48 0
FLAG 16 16 0
FLAG 16 352 0
FLAG 368 464 0
FLAG 192 544 0
FLAG 640 128 0
FLAG 528 240 0
FLAG 736 128 0
FLAG 736 16 OUT
FLAG -112 -80 IN
TEXT 528 448 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\NoiseFigure.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 15
Q1 N002 N004 N005 0 2N2222
R3 N001 N002 1K
R5 N005 0 100
R1 N001 N004 75K
R2 N004 0 10K
C1 N004 N003 .1
C2 N005 0 10
R4 OUT 0 100K
C3 OUT N002 1
V1 N003 0 AC 1 Rser=1K
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.noise V(out) V1 oct 10 1K 100K
* To plot NF vs. Frequency:\n 10*log10(V(inoise)*V(inoise)/(4*k*300.15*1K))\n Note that the units are dB but will be labeled V/sqrt(Hz)\n If you add the line\n .func NF(R) 10*log10(V(inoise)*V(inoise)/(4*k*300.15*R))\n to your plot.defs file, then you can conveniently plot the quantity NF(1K)
* 1K Source Impedance
* This example schematic is supplied for informational/educational purposes only.
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3088 1688
WIRE 1888 912 1792 912
WIRE 2000 912 1888 912
WIRE 1792 928 1792 912
WIRE 2000 928 2000 912
WIRE 1888 976 1888 912
WIRE 1792 1024 1792 1008
WIRE 2000 1024 2000 1008
WIRE 2064 1024 2000 1024
WIRE 2160 1024 2128 1024
WIRE 2240 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2000 1056 2000 1024
WIRE 1792 1104 1568 1104
WIRE 1888 1104 1888 1056
WIRE 1888 1104 1856 1104
WIRE 1936 1104 1888 1104
WIRE 1568 1120 1568 1104
WIRE 1888 1120 1888 1104
WIRE 2160 1136 2160 1120
WIRE 2000 1184 2000 1152
WIRE 2096 1184 2000 1184
WIRE 2000 1200 2000 1184
WIRE 1568 1216 1568 1200
WIRE 1888 1216 1888 1200
WIRE 2096 1216 2096 1184
WIRE 2000 1296 2000 1280
WIRE 2096 1296 2096 1280
FLAG 1792 1024 0
FLAG 1568 1216 0
FLAG 2240 1024 OUT
FLAG 2000 1296 0
FLAG 1888 1216 0
FLAG 2096 1296 0
FLAG 2160 1136 0
SYMBOL voltage 1792 912 R0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL npn 1936 1056 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL res 1984 912 R0
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL res 1984 1184 R0
SYMATTR InstName R5
SYMATTR Value 100
SYMBOL res 1872 960 R0
SYMATTR InstName R1
SYMATTR Value 75K
SYMBOL res 1872 1104 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL cap 1856 1088 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL cap 2080 1216 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res 2144 1024 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL cap 2128 1008 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL voltage 1568 1104 R0
WINDOW 123 40 57 Left 2
WINDOW 39 22 97 Left 2
SYMATTR Value2 AC 1
SYMATTR SpiceLine Rser=1K
SYMATTR InstName V1
SYMATTR Value ""
TEXT 2120 1336 Left 2 !.noise V(out) V1 oct 10 1K 100K
TEXT 1480 1336 Left 2 ;To plot NF vs. Frequency:\n  10*log10(V(inoise)*V(inoise)/(4*k*300.15*1K))\n  Note that the units are dB but will be labeled V/sqrt(Hz)\n  If you add the line\n  .func NF(R) 10*log10(V(inoise)*V(inoise)/(4*k*300.15*R))\n  to your plot.defs file, then you can conveniently plot the quantity NF(1K)
TEXT 1624 1240 Top 2 ;1K Source Impedance
TEXT 1952 1504 Top 1 ;This example schematic is supplied for informational/educational purposes only.
RECTANGLE Normal 1776 1280 1488 1072 2
* Z:\tmp\asc_dec_bjh7r6w2\1363f2cac00d_Half_Wave_Rectifier_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V3 0 N005 15
V1 N004 0 SINE(0 100m 100)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 128 80 128
WIRE 176 144 176 -16
WIRE 80 160 80 128
WIRE 144 160 80 160
WIRE 272 176 208 176
WIRE 144 192 48 192
WIRE 48 208 48 192
WIRE 176 304 176 208
WIRE 256 304 176 304
WIRE 384 304 384 272
WIRE 256 320 256 304
SYMBOL voltage 256 416 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL voltage 48 192 R0
WINDOW 0 -72 30 Left 2
WINDOW 3 -267 63 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 100m 100)
FLAG 48 288 0
FLAG 256 400 0
FLAG 384 304 0
* Z:\home\khalils\Downloads\files\data\raw_asc\31b759698308_BridgeRectifier.asc
* Generated by LTspice 26.0.1 for Windows.
D4 N001 Vout D
D1 Vin Vout D
V1 Vin N001 SINE(0 5 1K)
D2 0 N001 D
D3 0 Vin D
R1 0 Vout 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m
.model D D(Ron=0 Roff=100G Vfwd=0)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1176 680
WIRE 512 -128 464 -128
WIRE 640 -128 592 -128
WIRE 304 -16 160 -16
WIRE 352 -16 304 -16
WIRE 464 -16 464 -128
WIRE 464 -16 416 -16
WIRE 304 32 304 -16
WIRE 464 32 464 -16
WIRE 160 112 160 -16
WIRE 304 144 304 96
WIRE 352 144 304 144
WIRE 464 144 464 96
WIRE 464 144 416 144
WIRE 304 208 304 144
WIRE 640 208 640 -128
WIRE 640 208 304 208
WIRE 640 240 640 208
WIRE 160 320 160 192
WIRE 464 320 464 144
WIRE 464 320 160 320
SYMBOL diode 480 96 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMBOL diode 352 160 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL diode 320 96 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMBOL res 608 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL Misc\\signal 160 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -10 99 Right 2
SYMATTR Value SINE(0 5 1K)
SYMATTR InstName V1
SYMBOL diode 352 0 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
FLAG 464 -128 Vout
FLAG 160 -16 Vin
FLAG 640 240 0
TEXT 728 -56 Left 2 !.tran 5m
TEXT 712 0 Left 2 !.model D D(Ron=0 Roff=100G Vfwd=0)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1734L-4.1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1734L-4.1.asy)
Q1 N005 N003 N002 0 2N2907
V1 N001 0 7
XU1 N002 0 N001 N004 N005 N003 LTC1734L-x.x Ref=4.1 ;pnba Isense)GND)Vcc)Prog)BAT)Drive
R1 N004 0 1K
C1 N005 0 .1
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 5 startup
.lib LTC1734L-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2284 1688
WIRE 1680 1280 1536 1280
WIRE 2096 1280 1968 1280
WIRE 1536 1296 1536 1280
WIRE 2096 1328 2096 1280
WIRE 1680 1376 1632 1376
WIRE 2032 1376 1968 1376
WIRE 1536 1392 1536 1376
WIRE 1584 1472 1568 1472
WIRE 1680 1472 1664 1472
WIRE 2096 1472 2096 1424
WIRE 2096 1472 1968 1472
WIRE 2096 1488 2096 1472
WIRE 2096 1568 2096 1552
SYMBOL PowerProducts\\LTC1734L-4.1 1824 1376 R0
SYMATTR InstName U1
SYMBOL RES 1680 1456 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL VOLTAGE 1536 1280 R0
SYMATTR InstName V1
SYMATTR Value 7
SYMBOL cap 2080 1488 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL PNP 2032 1424 M180
WINDOW 0 76 72 Left 2
WINDOW 3 76 36 Left 2
SYMATTR InstName Q1
SYMATTR Value 2N2907
FLAG 1568 1472 0
FLAG 1632 1376 0
FLAG 1536 1392 0
FLAG 2096 1568 0
TEXT 1824 1600 Left 2 !.tran 5 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\qztst.asc
* Generated by LTspice 26.0.1 for Windows.
* Crystal model from easily measurable parameters
*serial freq
*difference between serial and // freq
* This example schematic is supplied for informational/educational purposes only.\nContributed by Dominique Szymik.
R1 N002 N001 50
R2 0 OUT 50
CY1 N002 OUT {Cs} Rser={Rs} Lser={Ls} Cpar={Cp}
V1 N001 0 AC 2
.ac lin 1001 3.95e6 4.05e6
.params fs=4e6
.params df=10e3
.params Rs=50
.params Cp=4e-12
.params Cs=2.0*cp*df/fs
.params Ls=1/(4*pi*pi*fs*fs*Cs)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3040 2464
WIRE 1712 2192 1632 2192
WIRE 1824 2192 1792 2192
WIRE 2000 2192 1888 2192
WIRE 2048 2192 2000 2192
WIRE 1632 2208 1632 2192
WIRE 2000 2208 2000 2192
WIRE 1632 2304 1632 2288
WIRE 2000 2320 2000 2288
SYMBOL MISC\\XTAL 1824 2208 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName Y1
SYMATTR Value {Cs}
SYMATTR SpiceLine Rser={Rs} Lser={Ls} Cpar={Cp}
SYMBOL res 1808 2176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL res 2016 2304 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL VOLTAGE 1632 2192 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 2
SYMATTR InstName V1
SYMATTR Value ""
FLAG 2000 2320 0
FLAG 1632 2304 0
FLAG 2048 2192 OUT
TEXT 1672 2104 Left 2 !.ac lin 1001 3.95e6 4.05e6
TEXT 1184 2048 Left 2 ;Crystal model from easily measurable parameters
TEXT 1136 2112 Left 2 !*serial freq\n.params fs=4e6  \n*difference between serial and // freq \n.params df=10e3  \n.params Rs=50\n.params Cp=4e-12\n.params Cs=2.0*cp*df/fs\n.params Ls=1/(4*pi*pi*fs*fs*Cs)
TEXT 1592 2392 Top 1 ;This example schematic is supplied for informational/educational purposes only.\nContributed by Dominique Szymik.