* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4260.asc
* Generated by LTspice 26.0.1 for Windows.
* Simulate shorts
* simulate board detection
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4260.asy)
C1 N007 0 6.8n
R8 0 N003 10
R7 N003 N012 24K
R2 N001 N010 49.9K
R3 N011 N010 1.74K
R4 N011 0 2.67K
MQ1 N002 N005 N003 N003 IRL530NS_L
MQ2 N003 N006 N004 N004 IRL530NS_L
V2 N001 0 PWL(0 0 10u 0 100u 48 )
C4 N003 0 330
C2 N015 0 .1
C3 N016 0 68n
C5 N010 0 0.1
XU1 N002 N001 MP_01 N010 N011 0 N013 MP_02 MP_03 MP_04 MP_05 N016 MP_06 N014 MP_07 MP_08 MP_09 N009 N015 N012 MP_10 MP_11 N003 N008 LTC4260 uvautoretry=1 ovautoretry=1 ocautoretry=1 ;pnba Sense)Vdd))UV)OV)GND)ON)))))Timer))_BD_PRST))))FB)INTVcc)GPIO)))Source)Gate
R11 N007 N008 100K
V1 N013 0 PWL(0 3.1 1 3.1 1.0001 3.1)
R1 N001 N002 5m
V3 N006 0 PWL(0 0 4 0 4.0001 0)
V4 N014 0 PWL(0 3.1 1 3.1 1.0001 0 1.2 0 1.20001 0)
R9 N005 N008 10
R10 0 N004 .05
R6 0 N009 3.57K
R5 N003 N009 43.5K
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 2
.lib LTC4260.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1508 1092
WIRE -384 -128 -720 -128
WIRE -96 -128 -384 -128
WIRE -80 -128 -96 -128
WIRE 16 -128 0 -128
WIRE 160 -128 16 -128
WIRE 352 -128 256 -128
WIRE 624 -128 352 -128
WIRE 736 -128 624 -128
WIRE 832 -128 736 -128
WIRE 944 -128 832 -128
WIRE 1024 -128 944 -128
WIRE 1216 -128 1120 -128
WIRE -720 -112 -720 -128
WIRE 832 -112 832 -128
WIRE 944 -112 944 -128
WIRE 1216 -112 1216 -128
WIRE 240 -64 240 -80
WIRE 1104 -32 1104 -80
WIRE -720 -16 -720 -32
WIRE 832 -16 832 -48
WIRE 944 -16 944 -32
WIRE 1216 -16 1216 -32
WIRE -384 0 -384 -128
WIRE 624 0 624 -128
WIRE 128 32 96 32
WIRE 240 32 240 16
WIRE 240 32 208 32
WIRE 96 48 96 32
WIRE 736 48 736 -128
WIRE 1104 64 1104 48
WIRE 624 96 624 80
WIRE 624 96 544 96
WIRE 624 112 624 96
WIRE -384 128 -384 80
WIRE -384 128 -480 128
WIRE -272 128 -384 128
WIRE 96 128 96 112
WIRE -384 160 -384 128
WIRE -96 160 -96 -128
WIRE 16 160 16 -128
WIRE 240 160 240 32
WIRE 352 160 352 -128
WIRE -480 176 -480 128
WIRE -272 208 -272 128
WIRE -192 208 -272 208
WIRE 544 208 544 96
WIRE 544 208 464 208
WIRE 624 208 624 192
WIRE -480 256 -480 240
WIRE -384 272 -384 240
WIRE -192 272 -384 272
WIRE 736 272 736 128
WIRE 736 272 464 272
WIRE -384 304 -384 272
WIRE -192 336 -272 336
WIRE 512 336 464 336
WIRE 512 352 512 336
WIRE -384 400 -384 384
WIRE -272 432 -272 336
WIRE 144 448 144 432
WIRE 304 448 304 432
WIRE 512 448 512 432
WIRE -16 464 -16 432
WIRE -272 528 -272 512
WIRE 144 528 144 512
WIRE 304 528 304 512
SYMBOL voltage 512 336 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value PWL(0 3.1 1 3.1 1.0001 0 1.2 0 1.20001 0)
SYMBOL res 608 -16 R0
SYMATTR InstName R5
SYMATTR Value 43.5K
SYMBOL res -400 -16 R0
SYMATTR InstName R2
SYMATTR Value 49.9K
SYMBOL voltage -720 -128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 10u 0 100u 48 )
SYMBOL res 720 32 R0
SYMATTR InstName R7
SYMATTR Value 24K
SYMBOL res 112 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R11
SYMATTR Value 100K
SYMBOL res 608 208 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R6
SYMATTR Value 3.57K
SYMBOL cap 80 48 R0
SYMATTR InstName C1
SYMATTR Value 6.8n
SYMBOL res -400 288 R0
SYMATTR InstName R4
SYMATTR Value 2.67K
SYMBOL cap -496 176 R0
SYMATTR InstName C5
SYMATTR Value 0.1
SYMBOL res 1200 -16 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R10
SYMATTR Value .05
SYMBOL cap 288 448 R0
SYMATTR InstName C3
SYMATTR Value 68n
SYMBOL nmos 160 -80 R270
WINDOW 0 82 51 VTop 2
WINDOW 3 51 49 VTop 2
SYMATTR InstName Q1
SYMATTR Value IRL530NS_L
SYMBOL nmos 1024 -80 R270
WINDOW 0 88 50 VTop 2
WINDOW 3 55 55 VTop 2
SYMATTR InstName Q2
SYMATTR Value IRL530NS_L
SYMBOL res 224 -80 R0
SYMATTR InstName R9
SYMATTR Value 10
SYMBOL PowerProducts\\LTC4260 128 288 R0
SYMATTR InstName U1
SYMATTR SpiceLine uvautoretry=1 ovautoretry=1 ocautoretry=1
SYMBOL res -400 256 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 1.74K
SYMBOL res 928 -16 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R8
SYMATTR Value 10
SYMBOL voltage 1104 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 0 4 0 4.0001 0)
SYMBOL cap 816 -112 R0
SYMATTR InstName C4
SYMATTR Value 330
SYMBOL cap 128 448 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL res -96 -112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 5m
SYMBOL voltage -272 416 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 3.1 1 3.1 1.0001 3.1)
FLAG -384 400 0
FLAG -16 464 0
FLAG 624 208 0
FLAG 144 528 0
FLAG 304 528 0
FLAG -272 528 0
FLAG -720 -16 0
FLAG 832 -16 0
FLAG 944 -16 0
FLAG 1216 -16 0
FLAG 1104 64 0
FLAG 512 448 0
FLAG 96 128 0
FLAG -480 256 0
TEXT 936 280 Left 2 !.tran 2
TEXT 1152 104 Left 2 ;Simulate shorts
TEXT 560 392 Left 2 ;simulate board detection