Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\4a86ae608df0_Draft16.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP747.asy)
V3 N005 0 12
V2 N007 0 -12
C1 0 N006 10n
V5 Vout 0 PULSE(0 0.1 1m 0.1u 0.1u 2u 0 1)
R1 N001 Vout 100k
XU2 0 N003 N005 N007 Vout OP747 ;pnba In+)In-)V+)V-)OUT
V1 N008 0 -12
R3 N003 N002 5k
V4 N004 0 12
XU1 N006 N001 N004 N008 N002 OP747 ;pnba In+)In-)V+)V-)OUT
R4 N006 Vout 10k
R2 N002 N001 7.9k
C2 Vout N003 1.5814n
.tran 10m
.step param r2 list 8k 15k 20k 50k 100k
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 688 -384 -48 -384
WIRE -48 -176 -48 -384
WIRE 32 -176 -48 -176
WIRE 128 -176 112 -176
WIRE 208 -176 128 -176
WIRE 336 -176 288 -176
WIRE 368 -176 336 -176
WIRE 464 -176 448 -176
WIRE 560 -176 464 -176
WIRE 688 -176 688 -384
WIRE 688 -176 624 -176
WIRE -48 16 -48 -176
WIRE 192 128 192 64
WIRE 512 128 512 64
WIRE 128 144 128 -176
WIRE 160 144 128 144
WIRE 464 144 464 -176
WIRE 480 144 464 144
WIRE 336 160 336 -176
WIRE 336 160 224 160
WIRE 688 160 688 -176
WIRE 688 160 544 160
WIRE -48 176 -48 16
WIRE 96 176 32 176
WIRE 160 176 96 176
WIRE 480 176 464 176
WIRE 512 256 512 192
WIRE 192 272 192 192
WIRE 96 336 96 176
WIRE 96 448 96 400
WIRE 272 448 96 448
WIRE 464 448 464 176
WIRE 464 448 272 448
WIRE 688 448 464 448
SYMBOL OpAmps\\OP747 192 96 R0
SYMATTR InstName U1
SYMBOL OpAmps\\OP747 512 96 R0
SYMATTR InstName U2
SYMBOL cap 112 400 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap 624 -192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1.5814n
SYMBOL voltage 192 256 R0
SYMATTR InstName V1
SYMATTR Value -12
SYMBOL voltage 192 80 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 12
SYMBOL res 464 -192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5k
SYMBOL res 128 -192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage 512 240 R0
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL res 48 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL voltage -32 16 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value PULSE(0 0.1 1m 0.1u 0.1u 2u 0 1)
SYMBOL voltage 512 80 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 12
SYMBOL res 304 -192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 7.9k
FLAG 272 448 0
FLAG 688 160 Vout
FLAG 192 352 0
FLAG 512 336 0
FLAG 512 -16 0
FLAG 192 -16 0
FLAG -128 16 0
TEXT -48 480 Left 2 !.tran 10m
TEXT -944 -104 Left 2 !.step param r2 list 8k 15k 20k 50k 100k
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7171-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7171-3.0.asy)
C2 N001 0 1n
V1 IN 0 3.5
Rload OUT 0 5
C1 OUT 0 4.7 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADM7171-3.0 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 5m startup
.lib ADM7171-3.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL cap 80 240 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL ADM7171-3.0 224 128 R0
SYMATTR InstName U1
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.5
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 376 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8605.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8605.asy)
R1 N001 0 10K
Rload OUT 0 10K
V1 +V 0 2.5
Vin IN 0 SINE(0 1 100K)
V2 -V 0 -2.5
R2 OUT N001 10K
XU1 IN N001 +V -V OUT AD8605 ;pnba In+)In-)V+)V-)OUT
.tran 100u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 464 -1168 448 -1168
WIRE 560 -1168 544 -1168
WIRE 576 -1168 560 -1168
WIRE 672 -1168 656 -1168
WIRE 224 -1056 224 -1072
WIRE 336 -1056 336 -1072
WIRE 560 -1056 560 -1168
WIRE 576 -1056 560 -1056
WIRE 672 -1040 672 -1168
WIRE 672 -1040 640 -1040
WIRE 800 -1040 672 -1040
WIRE 576 -1024 464 -1024
WIRE 800 -1024 800 -1040
WIRE 464 -1008 464 -1024
WIRE 224 -960 224 -976
WIRE 336 -960 336 -976
WIRE 800 -928 800 -944
WIRE 464 -912 464 -928
SYMBOL res 784 -1040 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 336 -1072 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 560 -1184 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 224 -1072 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 672 -1184 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Opamps\\AD8605 608 -1104 R0
SYMATTR InstName U1
SYMBOL voltage 464 -1024 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100K)
FLAG 224 -1072 +V
FLAG 224 -960 0
FLAG 464 -912 0
FLAG 800 -1040 OUT
FLAG 464 -1024 IN
FLAG 608 -1072 +V
FLAG 336 -1072 -V
FLAG 608 -1008 -V
FLAG 448 -1168 0
FLAG 800 -928 0
FLAG 336 -960 0
TEXT 704 -872 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4500.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4500.asy)
R1 N001 0 10K
R2 OUT N001 10K
V2 -V 0 -2.5
Rload OUT 0 10K
Vin IN 0 SINE(0 1 10K)
XU1 IN N001 +V -V OUT ADA4500 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 2.5
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1152 144 -1168
WIRE 272 -1152 272 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 272 -1056 272 -1072
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 272 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL Opamps\\ADA4500 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 144 -1168 +V
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 272 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 272 -1056 0
FLAG 144 -1056 0
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\19099e73d83a_2.4_Practical__real__diode_model_.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
R1 N002 N001 1k
D1 N002 0 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 1 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 432 224 224 224
WIRE 576 224 512 224
WIRE 224 272 224 224
WIRE 576 288 576 224
WIRE 224 400 224 352
WIRE 576 400 576 352
WIRE 576 400 224 400
WIRE 224 448 224 400
SYMBOL Res 528 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL Voltage 224 256 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL diode 560 288 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG 224 448 0
TEXT 224 136 Left 2 !.dc V1 0 1 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1783.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Supply Rail Current Sense
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1783.asy)
XU1 N001 N003 +V 0 N004 NC_01 LT1783 ;pnba In+)In-)V+)V-)OUT)SHDN
V1 +V 0 10
Q1 N001 N004 OUT 0 2N3904
R2 N001 +V 200
I1 N002 0 SINE(1 1 1K)
R3 N003 N002 200
R1 +V N002 .2
R4 OUT 0 2K
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -32 32 -32 16
WIRE 0 32 -32 32
WIRE 128 32 80 32
WIRE 400 32 128 32
WIRE -32 64 -32 32
WIRE -192 112 -192 96
WIRE 192 112 192 96
WIRE 400 144 400 32
WIRE -32 160 -32 144
WIRE 16 160 -32 160
WIRE 160 160 96 160
WIRE 336 192 304 192
WIRE -192 208 -192 192
WIRE -32 208 -32 160
WIRE 128 224 128 32
WIRE 160 224 128 224
WIRE 400 256 400 240
WIRE 448 256 400 256
WIRE 400 272 400 256
WIRE 192 288 192 272
WIRE -32 304 -32 288
WIRE 400 368 400 352
SYMBOL opamps\\LT1783 192 192 R0
SYMATTR InstName U1
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 200
SYMBOL npn 336 144 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage -192 96 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 384 256 R0
SYMATTR InstName R4
SYMATTR Value 2K
SYMBOL res 96 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL current -32 208 R0
SYMATTR InstName I1
SYMATTR Value SINE(1 1 1K)
SYMBOL res -48 48 R0
SYMATTR InstName R1
SYMATTR Value .2
FLAG -192 208 0
FLAG 192 96 +V
FLAG -192 96 +V
FLAG 192 288 0
FLAG 400 368 0
FLAG -32 304 0
FLAG -32 16 +V
FLAG 448 256 OUT
TEXT 488 320 Left 2 !.tran 3m
TEXT 184 -24 Bottom 2 ;Positive Supply Rail Current Sense
* Z:\home\khalils\Downloads\files\data\raw_asc\1c948790554a_1004-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1004-2.5.asy)
XU1 OUT 0 LT1004-2.5 ;pnba VOUT)GND
V1 N001 0 PULSE(0 5 100u 10n 10n 500u 1)
R1 OUT N001 24K
.tran 700u
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 980 680
WIRE 96 112 -144 112
WIRE 368 112 176 112
WIRE -144 128 -144 112
WIRE 368 128 368 112
WIRE 368 208 368 192
WIRE -144 224 -144 208
SYMBOL LT1004-2.5 368 160 R0
SYMATTR InstName U1
SYMBOL voltage -144 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 100u 10n 10n 500u 1)
SYMBOL res 192 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 24K
FLAG 368 208 0
FLAG -144 224 0
FLAG 368 112 OUT
TEXT 384 304 Left 2 !.tran 700u
* Z:\tmp\asc_dec_bjh7r6w2\0773169c8a00_body_diode_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
D2 dVDmos N003 clamp
R2 N004 0 1m
D1 d N001 clamp
M2 dVDmos N004 0 0 20n60c3
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2916 916
WIRE 176 176 112 176
WIRE 272 176 176 176
WIRE 320 176 272 176
WIRE 400 176 384 176
WIRE 272 224 272 176
WIRE 400 224 400 176
WIRE 272 336 272 304
WIRE 272 336 112 336
WIRE 400 336 400 304
WIRE 400 336 272 336
WIRE 176 560 112 560
WIRE 272 560 176 560
WIRE 320 560 272 560
WIRE 400 560 384 560
WIRE 112 592 112 560
WIRE 272 608 272 560
WIRE 400 608 400 560
WIRE 32 624 -32 624
WIRE -32 640 -32 624
WIRE 32 672 32 624
WIRE 64 672 32 672
WIRE 112 720 112 688
WIRE 112 720 -32 720
WIRE 272 720 272 688
WIRE 272 720 112 720
WIRE 400 720 400 688
WIRE 400 720 272 720
WIRE 112 752 112 720
SYMBOL diode 320 576 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D2
SYMATTR Value clamp
SYMBOL res -48 624 R0
SYMATTR InstName R2
SYMATTR Value 1m
SYMBOL diode 320 192 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D1
SYMATTR Value clamp
SYMBOL nmos 64 592 R0
SYMATTR InstName M2
SYMATTR Value 20n60c3
FLAG 176 176 d
FLAG 112 752 0
FLAG 176 560 dVDmos
* Z:\home\khalils\Downloads\files\data\raw_asc\2636a812d706_Week1_Ex1A.asc
* Generated by LTspice 26.0.1 for Windows.
VGS N002 0 1.8
VDS N001 0 1.8
M1 N001 N002 0 0 nch l=2u w=4u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib 'C:\Program Files\LTC\LTspiceXVII\lib\cmp\log018.l' TT
.dc VGS 0 1.8 1m
.step param W list 4u 2u 0.4u
.step param L list 2u 1u 0.2u
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 240 208 240
WIRE 208 336 208 240
WIRE 304 384 208 384
WIRE 160 416 -48 416
WIRE 416 416 416 240
WIRE -48 432 -48 416
WIRE -48 576 -48 512
WIRE 208 576 208 432
WIRE 208 576 -48 576
WIRE 304 576 304 384
WIRE 304 576 208 576
WIRE 416 576 416 496
WIRE 416 576 304 576
WIRE 208 608 208 576
SYMBOL voltage -48 416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 1.8
SYMBOL voltage 416 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 1.8
SYMBOL nmos4 160 336 R0
SYMATTR InstName M1
SYMATTR Value nch
SYMATTR Value2 l=2u w=4u
FLAG 208 608 0
TEXT -32 120 Left 2 !.lib 'C:\\Program Files\\LTC\\LTspiceXVII\\lib\\cmp\\log018.l' TT
TEXT -32 168 Left 2 !.dc VGS 0 1.8 1m
TEXT -16 72 Left 2 !.step param W list 4u 2u 0.4u
TEXT -8 24 Left 2 !.step param L list 2u 1u 0.2u
TEXT -24 200 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1433.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N002 MP_01 N002 MP_02 0 N006 N001 N003 0 OUT N005 MP_03 N007 IN MP_04 IN LTC1433 ;pnba SSW))BSW))GND)Run/SS)LBO)LBI)Vprog)Vosense)Ith))Cosc)SVin))PWRVin
C1 N007 0 100p
C2 N006 0 .01
C3 N004 0 6800p
C4 N005 0 680p
L1 N002 OUT 100
R1 N005 N004 5.1K
V1 IN 0 6
C5 OUT 0 100
D1 0 N002 1N5818
Rload OUT 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1433.asy)
.lib LTC1433.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2352 2168
WIRE 1568 1616 1360 1616
WIRE 1728 1616 1568 1616
WIRE 1360 1632 1360 1616
WIRE 1568 1648 1568 1616
WIRE 1728 1648 1728 1616
WIRE 1360 1728 1360 1712
WIRE 1472 1728 1456 1728
WIRE 1856 1728 1824 1728
WIRE 1888 1728 1856 1728
WIRE 1968 1728 1888 1728
WIRE 2096 1728 2048 1728
WIRE 2192 1728 2096 1728
WIRE 1888 1744 1888 1728
WIRE 2192 1744 2192 1728
WIRE 1472 1792 1456 1792
WIRE 1856 1792 1856 1728
WIRE 1856 1792 1824 1792
WIRE 1888 1824 1888 1808
WIRE 2192 1840 2192 1824
WIRE 1216 1856 1168 1856
WIRE 1328 1856 1296 1856
WIRE 1472 1856 1328 1856
WIRE 2096 1856 2096 1728
WIRE 2096 1856 1824 1856
WIRE 2096 1872 2096 1856
WIRE 1168 1888 1168 1856
WIRE 1328 1888 1328 1856
WIRE 1472 1920 1408 1920
WIRE 1856 1920 1824 1920
WIRE 1408 1936 1408 1920
WIRE 2096 1952 2096 1936
WIRE 1168 1984 1168 1952
WIRE 1328 1984 1328 1952
WIRE 1408 2016 1408 2000
WIRE 1568 2016 1568 2000
WIRE 1728 2016 1728 2000
WIRE 1568 2096 1568 2080
FLAG 1168 1984 0
FLAG 1408 2016 0
FLAG 1568 2096 0
FLAG 1728 2016 0
FLAG 2192 1840 0
FLAG 2096 1952 0
FLAG 1360 1728 0
FLAG 1888 1824 0
FLAG 2192 1728 OUT
FLAG 1856 1920 0
FLAG 1328 1984 0
FLAG 1360 1616 IN
SYMBOL POWERPRODUCTS\\LTC1433 1648 1824 R0
SYMATTR InstName U1
SYMBOL cap 1552 2016 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL cap 1392 1936 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL cap 1152 1888 R0
SYMATTR InstName C3
SYMATTR Value 6800p
SYMBOL cap 1312 1888 R0
SYMATTR InstName C4
SYMATTR Value 680p
SYMBOL ind 1952 1744 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMBOL RES 1312 1840 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5.1K
SYMBOL VOLTAGE 1360 1616 R0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL polcap 2080 1872 R0
SYMATTR InstName C5
SYMATTR Value 100
SYMBOL schottky 1872 1808 M180
WINDOW 0 37 60 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5818
SYMBOL res 2176 1728 R0
SYMATTR InstName Rload
SYMATTR Value 10
TEXT 1880 2000 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2504-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2504-5.0.asy)
C1 OUT 0 10
L1 N001 N002 1.5 Rser=80m
XU1 N001 N002 OUT IN IN 0 OUT NC_01 ADP2504-5.0 ;pnba SW1)SW2)FB)EN)PVin)GND)Vout)Sync
V1 IN 0 3.3
Rload OUT 0 50
.tran 400u startup
.lib ADP2504-5.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 48 64 32 64
WIRE 336 64 304 64
WIRE -64 80 -64 64
WIRE 32 144 32 64
WIRE 48 144 32 144
WIRE 336 144 304 144
WIRE -64 176 -64 160
WIRE 320 224 304 224
WIRE 368 224 320 224
WIRE 480 224 368 224
WIRE 368 240 368 224
WIRE 480 240 480 224
WIRE 48 304 32 304
WIRE 320 304 320 224
WIRE 320 304 304 304
WIRE 368 336 368 304
WIRE 480 336 480 320
SYMBOL res 464 224 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL voltage -64 64 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL ADP2504-5.0 176 176 R0
SYMATTR InstName U1
SYMBOL cap 352 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ind 320 48 R0
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=80m
FLAG 368 336 0
FLAG 32 304 0
FLAG -64 176 0
FLAG 480 336 0
FLAG -64 64 IN
FLAG 480 224 OUT
TEXT 392 384 Left 2 !.tran 400u startup
TEXT 176 0 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2960-4.asc
* Generated by LTspice 26.0.1 for Windows.
* Window Comparator for High Voltage Input
* 6V to 8.4V
* 5V
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3008-5.asy)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2960-4.asy)
R1 IN N001 118K
R2 N005 0 182K
XU1 N003 OUT _FAULT N002 0 N002 N004 N005 LTC2960-4 ;pnba Vin)DVCC)_RST)OUT)GND)_MR)ADJ)IN-
C1 OUT 0 1
R3 IN N003 10K
C2 IN 0 1
R5 N001 N004 7.32Meg
Vbat IN 0 PWL(0 0 10m 14 200 20 220 14 300 14 400 0)
R4 N004 N005 68K
XU2 IN OUT OUT 0 IN LT3008-5 ;pnba IN)OUT)Sense)GND)_SHDN
.tran 400
.lib LT3009.lib
.lib LTC2960-4.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3200 984
WIRE -2832 -3712 -2944 -3712
WIRE -2352 -3712 -2832 -3712
WIRE -2192 -3712 -2352 -3712
WIRE -2064 -3712 -2192 -3712
WIRE -1936 -3712 -2064 -3712
WIRE -1904 -3712 -1936 -3712
WIRE -1568 -3712 -1616 -3712
WIRE -1456 -3712 -1568 -3712
WIRE -2944 -3696 -2944 -3712
WIRE -1456 -3696 -1456 -3712
WIRE -2352 -3680 -2352 -3712
WIRE -2192 -3680 -2192 -3712
WIRE -2064 -3664 -2064 -3712
WIRE -1936 -3616 -1936 -3712
WIRE -1904 -3616 -1936 -3616
WIRE -1568 -3616 -1568 -3712
WIRE -1568 -3616 -1616 -3616
WIRE -1456 -3616 -1456 -3632
WIRE -2944 -3600 -2944 -3616
WIRE -2192 -3600 -2192 -3616
WIRE -2352 -3584 -2352 -3600
WIRE -1936 -3568 -2192 -3568
WIRE -2064 -3536 -2064 -3584
WIRE -1760 -3520 -1760 -3552
WIRE -2352 -3488 -2352 -3504
WIRE -2224 -3488 -2352 -3488
WIRE -2192 -3488 -2192 -3568
WIRE -2176 -3488 -2192 -3488
WIRE -1568 -3488 -1568 -3616
WIRE -1568 -3488 -1952 -3488
WIRE -2352 -3472 -2352 -3488
WIRE -2352 -3376 -2352 -3392
WIRE -2176 -3376 -2352 -3376
WIRE -1936 -3376 -1936 -3568
WIRE -1936 -3376 -1952 -3376
WIRE -2352 -3344 -2352 -3376
WIRE -2224 -3264 -2224 -3488
WIRE -2176 -3264 -2224 -3264
WIRE -1904 -3264 -1952 -3264
WIRE -2352 -3248 -2352 -3264
WIRE -2064 -3200 -2064 -3216
SYMBOL PowerProducts\\LT3008-5 -1760 -3664 R0
SYMATTR InstName U2
SYMBOL LTC2960-4 -2064 -3376 R0
SYMATTR InstName U1
SYMBOL cap -2208 -3680 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res -2368 -3600 R0
SYMATTR InstName R5
SYMATTR Value 7.32Meg
SYMBOL res -2368 -3360 R0
SYMATTR InstName R2
SYMATTR Value 182K
SYMBOL cap -1472 -3696 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res -2080 -3680 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res -2368 -3488 R0
SYMATTR InstName R4
SYMATTR Value 68K
SYMBOL res -2368 -3696 R0
SYMATTR InstName R1
SYMATTR Value 118K
SYMBOL voltage -2944 -3712 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PWL(0 0 10m 14 200 20 220 14 300 14 400 0)
SYMATTR InstName Vbat
FLAG -2064 -3200 0
FLAG -1456 -3616 0
FLAG -2352 -3248 0
FLAG -1904 -3264 _FAULT
FLAG -1456 -3712 OUT
FLAG -2944 -3600 0
FLAG -1760 -3520 0
FLAG -2832 -3712 IN
FLAG -2192 -3600 0
TEXT -2088 -3784 Bottom 2 ;Window Comparator for High Voltage Input
TEXT -2832 -3736 Bottom 2 ;6V to 8.4V
TEXT -1456 -3736 Bottom 2 ;5V
TEXT -1632 -3240 Left 2 !.tran 400
* Z:\home\khalils\Downloads\files\data\raw_asc\205cac93c815_4054-4.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4054-4.2.asy)
CBAT OUT 0 1500m
D1 IN N001 NSCW100
R1 N003 0 1.5K
XU1 N002 0 OUT IN N003 LTC4054-4.2 ;pnba _CHRG)GND)BAT)Vcc)Prog
R2 N001 N002 330
V1 IN 0 PWL(0 0 20u 5)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 900
.lib LTC4054-4.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2740 680
WIRE 1136 -576 880 -576
WIRE 1424 -576 1136 -576
WIRE 880 -560 880 -576
WIRE 1136 -560 1136 -576
WIRE 1424 -560 1424 -576
WIRE 880 -464 880 -480
WIRE 1136 -464 1136 -496
WIRE 1680 -464 1568 -464
WIRE 1680 -448 1680 -464
WIRE 1136 -368 1136 -384
WIRE 1280 -368 1136 -368
WIRE 1680 -368 1680 -384
WIRE 1584 -272 1568 -272
WIRE 1680 -272 1664 -272
WIRE 1424 -160 1424 -176
SYMBOL res 1568 -256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1.5K
SYMBOL voltage 880 -576 R0
SYMATTR Value PWL(0 0 20u 5)
SYMATTR InstName V1
SYMBOL cap 1664 -448 R0
SYMATTR InstName CBAT
SYMATTR Value 1500m
SYMBOL res 1120 -480 R0
SYMATTR InstName R2
SYMATTR Value 330
SYMBOL LED 1120 -560 R0
SYMATTR InstName D1
SYMATTR Value NSCW100
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL LTC4054-4.2 1424 -368 R0
SYMATTR InstName U1
FLAG 880 -464 0
FLAG 1424 -160 0
FLAG 1680 -368 0
FLAG 1680 -272 0
FLAG 880 -576 IN
FLAG 1680 -464 OUT
TEXT 1656 -200 Left 2 !.tran 900