Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1e3b2fb1f432_sim2.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N001 0 {27/17}
C3 N002 0 {7/17}
C2 N002 N001 {27/289}
I1 0 N001 AC 1
RL N002 0 1
L1 N001 N002 {289/243}
.ac dec 1000 0.01 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 96 -80 96
WIRE 64 96 16 96
WIRE -144 144 -304 144
WIRE -80 144 -80 96
WIRE -80 144 -144 144
WIRE 64 144 64 96
WIRE 112 144 64 144
WIRE 320 144 112 144
WIRE -304 192 -304 144
WIRE -80 192 -80 144
WIRE -48 192 -80 192
WIRE 64 192 64 144
WIRE 64 192 32 192
WIRE 112 208 112 144
WIRE -144 224 -144 144
WIRE 320 224 320 144
WIRE -304 320 -304 272
WIRE -144 320 -144 288
WIRE -144 320 -304 320
WIRE 112 320 112 272
WIRE 112 320 -144 320
WIRE 320 320 320 304
WIRE 320 320 112 320
WIRE 320 368 320 320
RECTANGLE Normal 272 352 -192 48 2
SYMBOL current -304 272 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 24 -28 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL res 304 208 R0
SYMATTR InstName RL
SYMATTR Value 1
SYMBOL cap 96 208 R0
SYMATTR InstName C3
SYMATTR Value {7/17}
SYMBOL cap -160 224 R0
SYMATTR InstName C1
SYMATTR Value {27/17}
SYMBOL ind -64 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value {289/243}
SYMBOL cap 16 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {27/289}
FLAG 320 368 0
TEXT -382 358 Left 2 !.ac dec 1000 0.01 10
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1475-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1475-3.3.asy)
D1 0 N001 MBR0530L
L1 N001 OUT 100
C1 OUT 0 100
V1 IN 0 10
XU1 OUT N002 IN 0 N001 IN IN N003 LTC1475 top=1.68Meg bot=1Meg ;pnba FB)LBO)_OFF)GND)SW)Sense)Vin)_ON
Rload OUT 0 20
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m startup
.lib LTC1475.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2764 1608
WIRE 1584 1184 1440 1184
WIRE 1776 1184 1584 1184
WIRE 1440 1200 1440 1184
WIRE 1776 1200 1776 1184
WIRE 1584 1264 1584 1184
WIRE 1632 1264 1584 1264
WIRE 2000 1264 1920 1264
WIRE 2048 1264 2000 1264
WIRE 2176 1264 2128 1264
WIRE 2240 1264 2176 1264
WIRE 2352 1264 2240 1264
WIRE 2240 1280 2240 1264
WIRE 2352 1280 2352 1264
WIRE 1440 1296 1440 1280
WIRE 2000 1312 2000 1264
WIRE 1584 1344 1584 1264
WIRE 1632 1344 1584 1344
WIRE 1936 1344 1920 1344
WIRE 2240 1376 2240 1344
WIRE 2352 1376 2352 1360
WIRE 2000 1392 2000 1376
WIRE 1632 1424 1616 1424
WIRE 2176 1424 2176 1264
WIRE 2176 1424 1920 1424
WIRE 1776 1504 1776 1488
SYMBOL VOLTAGE 1440 1184 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL polcap 2224 1280 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMBOL PowerProducts\\LTC1475-3.3 1776 1344 R0
SYMATTR InstName U1
SYMBOL res 2336 1264 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL schottky 1984 1376 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBR0530L
SYMBOL ind 2032 1280 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
FLAG 1440 1296 0
FLAG 2000 1392 0
FLAG 2240 1376 0
FLAG 2352 1376 0
FLAG 1776 1504 0
FLAG 2352 1264 OUT
FLAG 1440 1184 IN
TEXT 2016 1496 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7118.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7118.asy)
R2 N002 0 10K
V1 IN 0 4.3
R1 OUT N002 17.4k
XU1 IN N002 IN N001 OUT 0 ADP7118 Vref=1.2 ;pnba Vin)ADJ)EN)SS)Vout)GND
C1 OUT 0 2.2 Rser=3m
Rload OUT 0 22
C2 N001 0 4.7n
.tran 6m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 400 32 352 32
WIRE 528 32 400 32
WIRE 624 32 528 32
WIRE -32 48 -32 32
WIRE 528 48 528 32
WIRE 624 48 624 32
WIRE 400 80 400 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 528 144 528 112
WIRE 624 144 624 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 400 224 400 160
WIRE 400 224 352 224
WIRE 400 240 400 224
WIRE 224 304 224 288
WIRE 400 336 400 320
SYMBOL cap 512 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=3m
SYMBOL res 384 224 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.3
SYMBOL res 608 32 R0
SYMATTR InstName Rload
SYMATTR Value 22
SYMBOL res 384 64 R0
SYMATTR InstName R1
SYMATTR Value 17.4k
SYMBOL ADP7118 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG -32 32 IN
FLAG 624 144 0
FLAG 528 144 0
FLAG 624 32 OUT
FLAG 400 336 0
TEXT 520 272 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1765.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1765.asy)
R1 OUT 0 .6
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1765 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
C4 OUT 0 22
C2 N003 0 10n
R2 N001 IN 50K
C3 N002 0 1
V1 IN 0 1.8
R3 0 N005 10K
C1 N004 0 1
.tran 2m startup
.lib ADP1765.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 464 320 448 320
WIRE 224 384 224 368
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value .6
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ADP1765 224 176 R0
SYMATTR InstName U1
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 464 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 320 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 504 392 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3603.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3603.asy)
C3 N003 N005 .22
R3 N007 0 105K
C1 N008 0 1n Rser=4.32K
XU1 N007 N001 N004 N008 N007 IN N006 0 MP_01 MP_02 N005 MP_03 MP_04 N003 IN N002 0 LTC3603 ;pnba Mode)Pgood)Rt)Ith)FB)Run)Track/SS)PGND)))SW)))Boost)PVin)IntVcc)GND
R2 OUT N007 475K
V1 IN 0 5
C4 OUT N007 22p
D1 N002 N003 CMDSH2-3
R1 N004 0 105K
C5 OUT 0 100
L1 N005 OUT 2.2
C2 N002 0 1
Rload OUT 0 1.3
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.2m startup
.lib LTC3603.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1132 680
WIRE 80 -64 -16 -64
WIRE 256 -64 80 -64
WIRE -16 -48 -16 -64
WIRE 256 -48 256 -64
WIRE 112 0 96 0
WIRE 432 0 400 0
WIRE 592 0 432 0
WIRE 592 16 592 0
WIRE 432 32 432 0
WIRE -16 48 -16 32
WIRE 592 96 592 80
WIRE 80 112 80 -64
WIRE 112 112 80 112
WIRE 432 112 432 96
WIRE 432 112 400 112
WIRE 432 128 432 112
WIRE 16 224 0 224
WIRE 112 224 96 224
WIRE 432 224 432 192
WIRE 432 224 400 224
WIRE 480 224 432 224
WIRE 608 224 560 224
WIRE 704 224 608 224
WIRE 784 224 704 224
WIRE 880 224 784 224
WIRE 608 240 608 224
WIRE 704 240 704 224
WIRE 784 240 784 224
WIRE 880 240 880 224
WIRE 112 336 96 336
WIRE 560 336 400 336
WIRE 608 336 608 320
WIRE 608 336 560 336
WIRE 704 336 704 304
WIRE 704 336 608 336
WIRE 784 336 784 304
WIRE 880 336 880 320
WIRE 608 352 608 336
WIRE 112 448 96 448
WIRE 448 448 400 448
WIRE 608 448 608 432
WIRE 208 512 208 496
WIRE 304 512 304 496
WIRE 96 544 96 448
WIRE 560 544 560 336
WIRE 560 544 96 544
SYMBOL res 112 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 105K
SYMBOL PowerProducts\\LTC3603 256 224 R0
SYMATTR InstName U1
SYMBOL cap 768 240 R0
SYMATTR InstName C5
SYMATTR Value 100
SYMBOL schottky 416 32 R0
SYMATTR InstName D1
SYMATTR Value CMDSH2-3
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 576 16 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 448 464 R270
WINDOW 3 0 32 VBottom 2
WINDOW 39 -24 35 VBottom 2
WINDOW 0 32 32 VTop 2
SYMATTR Value 1n
SYMATTR SpiceLine Rser=4.32K
SYMATTR InstName C1
SYMBOL ind 464 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL res 592 336 R0
SYMATTR InstName R3
SYMATTR Value 105K
SYMBOL res 592 224 R0
SYMATTR InstName R2
SYMATTR Value 475K
SYMBOL voltage -16 -64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 864 224 R0
SYMATTR InstName Rload
SYMATTR Value 1.3
SYMBOL cap 688 240 R0
SYMATTR InstName C4
SYMATTR Value 22p
SYMBOL cap 416 128 R0
SYMATTR InstName C3
SYMATTR Value .22
FLAG -16 48 0
FLAG 0 224 0
FLAG 304 512 0
FLAG 512 448 0
FLAG 592 96 0
FLAG 608 448 0
FLAG 784 336 0
FLAG 880 336 0
FLAG -16 -64 IN
FLAG 880 224 OUT
FLAG 208 512 0
TEXT 680 504 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3d8035b7f281_rectification-v2.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N003 0 19m
D1 N001 N002 D
V1 N001 0 SINE(0 10 50 0 0 0 0)
R1 N003 N002 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 176 96 16 96
WIRE 400 96 240 96
WIRE 624 96 480 96
WIRE 16 160 16 96
WIRE 624 208 624 96
WIRE 16 384 16 240
WIRE 624 384 624 288
WIRE 624 384 16 384
WIRE 624 432 624 384
SYMBOL diode 176 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL res 496 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL ind 608 192 R0
SYMATTR InstName L1
SYMATTR Value 19m
SYMBOL voltage 16 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 50 0 0 0 0)
FLAG 624 432 0
TEXT -16 392 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\2036df799a04_1634-1.25.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1634-1.25.asy)
V1 N001 0 3
XU1 N002 0 LT1634-1.25 ;pnba VCC)VEE
R1 N001 N002 150K
.dc temp -40 80 .1
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 144 48 144
WIRE 272 144 208 144
WIRE 48 160 48 144
WIRE 272 176 272 144
WIRE 48 256 48 240
WIRE 272 256 272 240
SYMBOL References\\LT1634-1.25 272 208 R0
SYMATTR InstName U1
SYMBOL res 112 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 150K
SYMBOL voltage 48 144 R0
SYMATTR InstName V1
SYMATTR Value 3
FLAG 272 256 0
FLAG 48 256 0
TEXT 72 312 Left 2 !.dc temp -40 80 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4602HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4602HV.asy)
Rload OUT 0 .41
R1 N004 0 31.6K
XU1 N001 N006 N002 N003 N005 N007 N008 N004 0 0 OUT IN LTM4602 ;pnba Fset)SVin)EXTVcc)FCB)Run)Comp)PwrGD)FB)SGND)PGND)Vout)Vin
V1 IN 0 12
R2 OUT N008 100K
.tran 2.5m startup
.lib LTM4602.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1260 692
WIRE 384 64 160 64
WIRE 160 80 160 64
WIRE 384 80 384 64
WIRE 512 80 512 64
WIRE 272 128 256 128
WIRE 768 128 624 128
WIRE 816 128 768 128
WIRE 816 144 816 128
WIRE 160 176 160 160
WIRE 272 176 256 176
WIRE 640 176 624 176
WIRE 736 176 720 176
WIRE 272 224 256 224
WIRE 640 224 624 224
WIRE 816 240 816 224
WIRE 272 272 256 272
WIRE 640 272 624 272
WIRE 768 272 768 128
WIRE 768 272 720 272
WIRE 384 336 384 320
WIRE 512 336 512 320
SYMBOL res 800 128 R0
SYMATTR InstName Rload
SYMATTR Value .41
SYMBOL PowerProducts\\LTM4602HV 448 192 R0
SYMATTR InstName U1
SYMBOL voltage 160 64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 624 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 31.6K
SYMBOL res 736 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100K
FLAG 160 176 0
FLAG 384 336 0
FLAG 512 336 0
FLAG 816 240 0
FLAG 736 176 0
FLAG 816 128 OUT
FLAG 160 64 IN
TEXT 736 336 Left 2 !.tran 2.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1071HV.asc
* Generated by LTspice 26.0.1 for Windows.
L1 IN N001 150 Rser=0.02 Rpar=5000
D1 N001 OUT MBRS360
R1 OUT N002 10.7K
R2 N002 0 1.24K
R3 N003 N004 1K
C1 OUT 0 500 Rser=15m
C2 N004 0 1
V1 IN 0 5
XU1 N003 N002 0 N001 IN LT1071 ;pnba Vc)FB)GND)SW)Vin
Rload OUT 0 24
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 20m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1071HV.asy)
.lib LT1071.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1480
WIRE 1824 880 1616 880
WIRE 1872 880 1824 880
WIRE 1984 880 1952 880
WIRE 2032 880 1984 880
WIRE 2144 880 2096 880
WIRE 2272 880 2144 880
WIRE 2384 880 2272 880
WIRE 1616 896 1616 880
WIRE 2272 896 2272 880
WIRE 2384 896 2384 880
WIRE 1824 944 1824 880
WIRE 2144 960 2144 880
WIRE 1616 992 1616 976
WIRE 2272 992 2272 960
WIRE 2384 992 2384 976
WIRE 1984 1024 1984 880
WIRE 1984 1024 1952 1024
WIRE 2144 1088 2144 1040
WIRE 2144 1088 1952 1088
WIRE 2144 1104 2144 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2144 1200 2144 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
FLAG 2384 880 OUT
FLAG 2144 1200 0
FLAG 2272 992 0
FLAG 2384 992 0
FLAG 2064 1248 0
FLAG 1824 1248 0
FLAG 1616 992 0
FLAG 1616 880 IN
SYMBOL IND 1856 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL schottky 2032 896 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL RES 2128 944 R0
SYMATTR InstName R1
SYMATTR Value 10.7K
SYMBOL RES 2128 1088 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL polcap 2256 896 R0
SYMATTR InstName C1
SYMATTR Value 500
SYMATTR SpiceLine Rser=15m
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL VOLTAGE 1616 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LT1071HV 1824 1088 R0
SYMATTR InstName U1
SYMBOL res 2368 880 R0
SYMATTR InstName Rload
SYMATTR Value 24
TEXT 2248 1232 Left 2 !.tran 20m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3468-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3468-2.asy)
R3 N002 IN 10K
K1 L1 L2 1
D1 N001 OUT D
D2 0 N003 1N5817
C1 OUT 0 .1
V1 IN 0 5
L2 0 N001 {20u*10.2*10.2} Rpar=1Meg
L1 IN N003 20 Rpar=2K Rser=.1
C3 N001 0 10p
XU1 N003 0 N002 IN IN LT3468-2 ;pnba SW)GND)_Done)Charge)Vin
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m startup
.lib LT3468-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2740 1752
WIRE 1872 1264 1616 1264
WIRE 2064 1264 1872 1264
WIRE 2368 1264 2112 1264
WIRE 2416 1264 2368 1264
WIRE 2528 1264 2480 1264
WIRE 2064 1280 2064 1264
WIRE 2112 1280 2112 1264
WIRE 1872 1296 1872 1264
WIRE 2368 1296 2368 1264
WIRE 2528 1296 2528 1264
WIRE 1616 1360 1616 1264
WIRE 1648 1360 1616 1360
WIRE 1760 1360 1728 1360
WIRE 2112 1376 2112 1360
WIRE 2368 1376 2368 1360
WIRE 2528 1376 2528 1360
WIRE 2064 1408 2064 1360
WIRE 2064 1408 1984 1408
WIRE 2064 1424 2064 1408
WIRE 1616 1456 1616 1360
WIRE 1760 1456 1616 1456
WIRE 1616 1472 1616 1456
WIRE 2064 1504 2064 1488
WIRE 1872 1536 1872 1520
WIRE 1616 1568 1616 1552
SYMBOL cap 2512 1296 R0
WINDOW 3 27 55 Left 2
SYMATTR Value .1
SYMATTR InstName C1
SYMBOL diode 2416 1280 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL ind2 2128 1376 R180
WINDOW 0 -3 72 Right 2
WINDOW 3 0 43 Right 2
SYMATTR InstName L2
SYMATTR Value {20u*10.2*10.2}
SYMATTR SpiceLine Rpar=1Meg
SYMBOL ind2 2048 1264 R0
WINDOW 0 -6 35 Right 2
WINDOW 3 -4 73 Right 2
SYMATTR InstName L1
SYMATTR Value 20
SYMATTR SpiceLine Rpar=2K Rser=.1
SYMBOL cap 2352 1296 R0
WINDOW 3 28 53 Left 2
SYMATTR Value 10p
SYMATTR InstName C3
SYMBOL PowerProducts\\LT3468-2 1872 1408 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1616 1456 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 1744 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL schottky 2048 1488 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
FLAG 2528 1376 0
FLAG 1872 1536 0
FLAG 1616 1568 0
FLAG 2368 1376 0
FLAG 2112 1376 0
FLAG 2064 1504 0
FLAG 2528 1264 OUT
FLAG 1616 1264 IN
TEXT 2240 1480 Left 2 !.tran 10m startup
TEXT 2088 1264 Bottom 2 !K1 L1 L2 1
* Z:\home\khalils\Downloads\files\data\raw_asc\15cf75534f92_part3_a_vds_sweep.asc
* Generated by LTspice 26.0.1 for Windows.
M1 drain gate 0 0 NMOS
VGS gate 0 7
VDS drain 0 10
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model nmos NMOS (kp=100u, vt0=0.5, l={x}, w=.36u)
.dc VDS 0 10 0.01
.step param X list .09u .13u .2u .3u .6u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 48 96 48
WIRE 240 48 160 48
WIRE 96 112 96 48
WIRE 240 144 240 48
WIRE -64 192 -96 192
WIRE 48 192 -64 192
WIRE -96 208 -96 192
WIRE -96 336 -96 288
WIRE 96 336 96 208
WIRE 96 336 -96 336
WIRE 176 336 96 336
WIRE 240 336 240 224
WIRE 240 336 176 336
SYMBOL voltage -96 192 R0
SYMATTR InstName VGS
SYMATTR Value 7
SYMBOL nmos 48 112 R0
SYMATTR InstName M1
SYMBOL voltage 240 128 R0
SYMATTR InstName VDS
SYMATTR Value 10
FLAG 96 336 0
FLAG -64 192 gate
FLAG 160 48 drain
FLAG 176 336 source
TEXT -104 376 Left 2 !.model nmos NMOS (kp=100u, vt0=0.5, l={x}, w=.36u)
TEXT -104 408 Left 2 !.dc VDS 0 10 0.01
TEXT -104 440 Left 2 !.step param X list .09u .13u .2u .3u .6u
* Z:\home\khalils\Downloads\files\data\raw_asc\453467b897ef_DelayOff.asc
* Generated by LTspice 26.0.1 for Windows.
* Inverter with delay to off
A1 N001 0 0 0 0 0 OUT 0 SCHMITT VT=1 Vh=0.1
S1 0 N001 IN 0 SW
C1 N001 0 100n Rpar=100Meg
I1 0 N001 {100n/Td}
.model SW SW(Roff=1G Vt=0.5)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 80 16 80
WIRE 272 80 160 80
WIRE 368 80 272 80
WIRE 480 80 432 80
WIRE 16 96 16 80
WIRE 272 96 272 80
WIRE -32 112 -144 112
WIRE 160 112 160 80
WIRE -32 160 -48 160
WIRE -48 192 -48 160
WIRE 16 192 16 176
WIRE 160 192 160 176
WIRE 272 192 272 176
IOPIN -144 112 In
IOPIN 480 80 Out
SYMBOL Digital\\schmtbuf 368 144 M180
WINDOW 3 8 60 Invisible 2
SYMATTR Value VT=1 Vh=0.1
SYMATTR InstName A1
SYMBOL sw 16 192 M180
SYMATTR InstName S1
SYMBOL current 272 176 M180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value {100n/Td}
SYMBOL cap 176 112 M0
SYMATTR InstName C1
SYMATTR Value 100n
SYMATTR SpiceLine Rpar=100Meg
FLAG 272 192 0
FLAG 160 192 0
FLAG 16 192 0
FLAG -48 192 0
FLAG -144 112 IN
FLAG 480 80 OUT
TEXT 0 32 Left 2 !.model SW SW(Roff=1G Vt=0.5)
TEXT 72 -40 Left 2 ;Inverter with delay to off
* Z:\tmp\asc_dec_bjh7r6w2\16189616f927_BatCutoff_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N006 N002 N001 N001 IRF7204
XU1 N004 NC_01 N007 NC_02 0 0 NC_03 N005 LT1431 ;pnba Coll)Comp)V+)Rtop)GND-S)GND-F)Rmid)Ref
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1431.asy)
.lib LT1431.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1364 680
WIRE 1152 -80 1152 -384
WIRE 1360 -64 1360 -192
WIRE 1360 -64 1200 -64
WIRE 1008 0 1008 -192
WIRE 1008 0 944 0
WIRE 16 64 16 -128
WIRE 16 64 -96 64
WIRE 48 64 16 64
WIRE 368 64 368 -48
WIRE 368 64 304 64
WIRE 1152 112 1152 16
WIRE 48 192 -96 192
WIRE 368 192 304 192
WIRE 368 256 368 192
WIRE 368 256 304 256
WIRE 1152 272 1152 192
WIRE 368 336 368 256
SYMBOL pmos 1200 16 R180
SYMATTR InstName M1
SYMATTR Value IRF7204
SYMBOL References\\LT1431 176 160 R0
SYMATTR InstName U1
FLAG 368 336 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1006.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
R1 OUT N001 99K
R2 N001 0 1K
V3 IN 0 SINE(5m 1m 1K)
XU1 IN N001 +V 0 OUT LT1006 ;pnba In+)In-)V+)V-)OUT
R3 OUT 0 660
.tran 3m
* Gain 100 Amplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1006.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 128 16 128
WIRE 128 128 112 128
WIRE 208 128 128 128
WIRE 304 128 288 128
WIRE 192 208 192 192
WIRE 128 224 128 128
WIRE 160 224 128 224
WIRE -80 240 -80 224
WIRE 304 240 304 128
WIRE 304 240 224 240
WIRE 368 240 304 240
WIRE 160 256 48 256
WIRE 368 256 368 240
WIRE 48 272 48 256
WIRE 192 288 192 272
WIRE -80 336 -80 320
WIRE 368 352 368 336
WIRE 48 368 48 352
FLAG -80 336 0
FLAG 192 192 +V
FLAG -80 224 +V
FLAG 16 128 0
FLAG 48 368 0
FLAG 192 288 0
FLAG 368 352 0
FLAG 48 256 IN
FLAG 368 240 OUT
SYMBOL voltage -80 224 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 304 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 99K
SYMBOL res 128 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 48 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(5m 1m 1K)
SYMBOL opamps\\LT1006 192 176 R0
SYMATTR InstName U1
SYMBOL res 352 240 R0
SYMATTR InstName R3
SYMATTR Value 660
TEXT 288 400 Left 2 !.tran 3m
TEXT 152 64 Bottom 2 ;Gain 100 Amplifier
* Z:\tmp\asc_dec_bjh7r6w2\0247c717ecb3_Pasatodo_Activo_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 Vi 0.131
V1 Vi 0 AC 1 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1328 680
WIRE 416 -16 368 -16
WIRE 448 -16 416 -16
WIRE 544 -16 528 -16
WIRE 560 -16 544 -16
WIRE 672 -16 640 -16
WIRE 368 0 368 -16
WIRE 544 48 544 -16
WIRE 576 48 544 48
WIRE 672 64 672 -16
WIRE 672 64 640 64
WIRE 704 64 672 64
WIRE 416 80 416 -16
WIRE 448 80 416 80
WIRE 544 80 512 80
WIRE 576 80 544 80
WIRE 368 96 368 80
WIRE 544 112 544 80
WIRE 544 224 544 192
SYMBOL cap 512 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.131
SYMBOL voltage 368 -16 R0
WINDOW 123 -97 94 Left 2
WINDOW 39 0 0 Left 0
WINDOW 0 -60 14 Left 2
SYMATTR Value2 AC 1 0
SYMATTR InstName V1
SYMATTR Value ""
FLAG 368 96 0
FLAG 368 -16 Vi
FLAG 704 64 Vo
FLAG 544 224 0