* Z:\home\khalils\Downloads\files\data\raw_asc\82f223fea398_Driver_schematic.asc
* Generated by LTspice 26.0.1 for Windows.
M2 out gate Vss Vss NMOS
M1 out gate Vdd Vdd PMOS
B1 gate Vss V=if(v(cdelayed)-v(Vss)>2.5 & v(Vdd)-v(Vss)>{Vuvl}, 0, v(Vdd)-v(Vss))
Ibias Vdd Vss {IQ}
E1 cisolated Vss c Vssin 1
R1 cdelayed cisolated {Rdelay}
C1 cdelayed Vss {Cdelay}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model NMOS NMOS (LEVEL=1 VTO={VT} KP={2*Imax/(Vddrated-VT)/(Vddrated-VT)})
.model PMOS PMOS (LEVEL=1 VTO=-{VT} KP={1.4*Imax/(Vddrated-VT)/(Vddrated-VT)})
.param Vddrated = 12V
.param Imax=3A
.param VT = 2V
.param Vuvl = 9V
* Gate-driver parameters
.param IQ = 1mA
* Gate-driver supply
* Gate-driver power ground\ntypically tied to \npower MOSFET source
* Control input (0-5V)
* Control input ground\ntypically tied to \ncommon ground
* Gate-driver\ndelay
.param Tdelay = 30ns
* Fixed parameters and output stage MOSFET models
.param Rdelay=100
.param Cdelay={Tdelay/Rdelay/0.69}
* Output stage
* maximum output current (approx)
* quiescent supply current
* propagation delay
* under-voltage lockout
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1384 680
WIRE 64 16 -304 16
WIRE 320 16 64 16
WIRE 320 48 320 16
WIRE 336 48 320 48
WIRE 272 64 240 64
WIRE 64 80 64 16
WIRE 336 96 336 48
WIRE 336 96 320 96
WIRE 192 144 160 144
WIRE 240 144 240 64
WIRE 240 144 192 144
WIRE -208 160 -320 160
WIRE 320 160 320 144
WIRE 640 160 320 160
WIRE -128 208 -160 208
WIRE -96 208 -128 208
WIRE 0 208 -16 208
WIRE 160 208 160 144
WIRE 320 208 320 160
WIRE -160 240 -160 208
WIRE 0 240 0 208
WIRE -208 256 -208 160
WIRE 336 256 320 256
WIRE 240 288 240 144
WIRE 272 288 240 288
WIRE -208 304 -304 304
WIRE 336 304 336 256
WIRE 336 304 320 304
WIRE -160 352 -160 320
WIRE 0 352 0 304
WIRE 0 352 -160 352
WIRE 64 352 64 160
WIRE 64 352 0 352
WIRE 160 352 160 288
WIRE 160 352 64 352
WIRE 320 352 320 304
WIRE 320 352 160 352
WIRE -160 464 -160 352
WIRE -160 464 -320 464
FLAG 640 160 out
IOPIN 640 160 Out
FLAG -320 160 c
IOPIN -320 160 In
FLAG -304 16 Vdd
IOPIN -304 16 In
FLAG -320 464 Vss
IOPIN -320 464 In
FLAG 0 208 cdelayed
FLAG -304 304 Vssin
IOPIN -304 304 In
FLAG -128 208 cisolated
FLAG 192 144 gate
SYMBOL nmos4 272 208 R0
WINDOW 0 77 54 Left 2
WINDOW 3 -31 112 Left 2
SYMATTR InstName M2
SYMBOL pmos4 272 144 M180
WINDOW 0 79 52 Left 2
WINDOW 3 -32 104 Left 2
SYMATTR InstName M1
SYMBOL bv 160 192 R0
WINDOW 3 -185 185 Left 2
SYMATTR Value V=if(v(cdelayed)-v(Vss)>2.5 & v(Vdd)-v(Vss)>{Vuvl}, 0, v(Vdd)-v(Vss))
SYMATTR InstName B1
SYMBOL current 64 80 R0
WINDOW 3 39 37 Left 2
SYMATTR Value {IQ}
SYMATTR InstName Ibias
SYMBOL e -160 224 R0
WINDOW 0 38 54 Left 2
SYMATTR InstName E1
SYMATTR Value 1
SYMBOL res 0 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {Rdelay}
SYMBOL cap -16 240 R0
WINDOW 3 23 54 Left 2
SYMATTR Value {Cdelay}
SYMATTR InstName C1
TEXT -72 600 Left 2 !.model NMOS NMOS (LEVEL=1 VTO={VT} KP={2*Imax/(Vddrated-VT)/(Vddrated-VT)})
TEXT -72 632 Left 2 !.model PMOS PMOS (LEVEL=1 VTO=-{VT} KP={1.4*Imax/(Vddrated-VT)/(Vddrated-VT)})
TEXT 104 512 Left 2 !.param Vddrated = 12V
TEXT -368 -168 Left 2 !.param Imax=3A
TEXT 104 488 Left 2 !.param VT = 2V
TEXT -368 -72 Left 2 !.param Vuvl = 9V
TEXT -400 -200 Left 2 ;Gate-driver parameters
TEXT -368 -136 Left 2 !.param IQ = 1mA
TEXT -400 48 Left 2 ;Gate-driver supply
TEXT -424 496 Left 2 ;Gate-driver power ground\ntypically tied to \npower MOSFET source
TEXT -392 128 Left 2 ;Control input (0-5V)
TEXT -424 336 Left 2 ;Control input ground\ntypically tied to \ncommon ground
TEXT -144 128 Left 2 ;Gate-driver\ndelay
TEXT -368 -104 Left 2 !.param Tdelay = 30ns
TEXT 8 464 Left 2 ;Fixed parameters and output stage MOSFET models
TEXT 104 536 Left 2 !.param Rdelay=100
TEXT 104 560 Left 2 !.param Cdelay={Tdelay/Rdelay/0.69}
TEXT 240 -8 Left 2 ;Output stage
TEXT -96 -168 Left 2 ;maximum output current (approx)
TEXT -96 -136 Left 2 ;quiescent supply current
TEXT -96 -104 Left 2 ;propagation delay
TEXT -96 -72 Left 2 ;under-voltage lockout