Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3600.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3600.asy)
C1 OUT 0 22 Rser=10m
C3 0 N001 1
C2 N003 0 .002
R1 N003 0 49.9K
C4 N002 N004 .1
V1 IN 0 12
XU1 N003 N001 N001 N001 IN N001 N004 IN N002 N001 OUT NC_01 0 LTC3600 ;pnba Iset)Ith)Rt)PGFB)Run)Mode/SYNC)SW)Vin)Boost)INTVcc)Vout)Pgood)GND
L1 N004 OUT 2.2 Rser=2m
Rload OUT 0 1.6
.tran 1m startup
.lib LTC3600.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1260 708
WIRE 208 -48 208 -64
WIRE -64 16 -144 16
WIRE 80 16 -64 16
WIRE -144 32 -144 16
WIRE 208 32 208 16
WIRE 208 32 -48 32
WIRE 336 32 208 32
WIRE 80 48 80 16
WIRE 208 48 208 32
WIRE -64 112 -64 16
WIRE -32 112 -64 112
WIRE 432 112 320 112
WIRE 544 112 432 112
WIRE 640 112 544 112
WIRE -144 128 -144 112
WIRE 640 128 640 112
WIRE 544 144 544 112
WIRE 432 160 432 112
WIRE 368 208 320 208
WIRE 368 224 368 208
WIRE 544 224 544 208
WIRE 640 224 640 208
WIRE -176 304 -288 304
WIRE -32 304 -176 304
WIRE 368 304 368 288
WIRE 368 304 320 304
WIRE 432 304 432 240
WIRE 432 304 368 304
WIRE -288 320 -288 304
WIRE -176 320 -176 304
WIRE -48 400 -48 32
WIRE -32 400 -48 400
WIRE 336 400 336 32
WIRE 336 400 320 400
WIRE -288 416 -288 384
WIRE -176 416 -176 400
WIRE -48 496 -48 400
WIRE -32 496 -48 496
WIRE 336 496 336 400
WIRE 336 496 320 496
WIRE 144 576 144 560
SYMBOL res -192 304 R0
SYMATTR InstName R1
SYMATTR Value 49.9K
SYMBOL PowerProducts\\LTC3600 144 304 R0
SYMATTR InstName U1
SYMBOL cap 192 -48 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 352 224 R0
SYMATTR InstName C4
SYMATTR Value .1
SYMBOL cap -304 320 R0
SYMATTR InstName C2
SYMATTR Value .002
SYMBOL cap 528 144 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine Rser=10m
SYMBOL res 624 112 R0
SYMATTR InstName Rload
SYMATTR Value 1.6
SYMBOL ind 416 256 M180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=2m
SYMBOL voltage -144 16 R0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 144 576 0
FLAG -144 128 0
FLAG 544 224 0
FLAG 640 224 0
FLAG 640 112 OUT
FLAG -144 16 IN
FLAG -288 416 0
FLAG -176 416 0
FLAG 208 -64 0
TEXT 448 424 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3502A.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
R1 IN N003 15K
C1 N003 0 .1
L1 N002 OUT 6.8
R2 OUT N005 31.6K
R3 N005 0 10K
C2 OUT 0 10
R4 OUT 0 6.6
D1 N004 N002 MBR0520L
C3 N001 N002 .1
XU1 IN OUT N005 N003 0 N004 N001 N002 LT3502A ;pnba Vin)BD)FB)_SHDN)GND)DA)Boost)SW
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3502A.asy)
.lib LT3502A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 464 16 -48 16
WIRE -48 80 -48 16
WIRE -32 80 -48 80
WIRE 304 80 256 80
WIRE 304 96 304 80
WIRE -144 176 -240 176
WIRE -32 176 -144 176
WIRE 304 176 304 160
WIRE 304 176 256 176
WIRE 352 176 304 176
WIRE 464 176 464 16
WIRE 464 176 432 176
WIRE 592 176 464 176
WIRE 688 176 592 176
WIRE -240 192 -240 176
WIRE -144 192 -144 176
WIRE 304 192 304 176
WIRE 592 192 592 176
WIRE 688 192 688 176
WIRE 464 240 464 176
WIRE -32 272 -144 272
WIRE 304 272 304 256
WIRE 304 272 256 272
WIRE -240 288 -240 272
WIRE -144 288 -144 272
WIRE 592 288 592 256
WIRE 688 288 688 272
WIRE -144 368 -144 352
WIRE -32 368 -48 368
WIRE 464 368 464 320
WIRE 464 368 256 368
WIRE 464 384 464 368
WIRE 464 480 464 464
FLAG -240 288 0
FLAG -48 368 0
FLAG -144 368 0
FLAG 464 480 0
FLAG 688 288 0
FLAG 592 288 0
FLAG 688 176 OUT
FLAG -240 176 IN
SYMBOL voltage -240 176 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -160 176 R0
SYMATTR InstName R1
SYMATTR Value 15K
SYMBOL cap -160 288 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL ind 336 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMBOL res 448 224 R0
SYMATTR InstName R2
SYMATTR Value 31.6K
SYMBOL res 448 368 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL cap 576 192 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res 672 176 R0
SYMATTR InstName R4
SYMATTR Value 6.6
SYMBOL schottky 288 256 M180
WINDOW 0 22 62 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBR0520L
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 288 96 R0
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL LT3502A 112 224 R0
SYMATTR InstName U1
TEXT 160 480 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3081.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 0 1K
XU1 N003 N004 N002 OUT N001 IN LT3081 ;pnba Ilim)SET)Imon)OUT)Temp)IN
R2 N002 0 1K
R3 N004 0 30.1K
R4 OUT N003 6.04K
V1 IN 0 5
C1 OUT 0 10 V=6.3 Irms=0 Rser=0.001 Lser=0 mfg="TDK" pn="C3216X5ROJ106M" type="X5R"
Rload OUT 0 1
.tran .1 startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3081.asy)
.lib LT3081.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 64 -96 64
WIRE -96 80 -96 64
WIRE 224 96 224 64
WIRE 0 160 -16 160
WIRE 96 160 80 160
WIRE 400 160 352 160
WIRE 528 160 400 160
WIRE 544 160 528 160
WIRE 608 160 544 160
WIRE -96 176 -96 160
WIRE 400 176 400 160
WIRE 608 176 608 160
WIRE 528 192 528 160
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 400 256 352 256
WIRE 528 272 528 256
WIRE 608 272 608 256
WIRE 224 336 224 320
WIRE 224 432 224 416
FLAG -16 160 0
FLAG -16 256 0
FLAG 224 432 0
FLAG -96 176 0
FLAG -96 64 IN
FLAG 544 160 OUT
FLAG 528 272 0
FLAG 608 272 0
SYMBOL res 96 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL PowerProducts\\LT3081 224 208 R0
SYMATTR InstName U1
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 208 320 R0
SYMATTR InstName R3
SYMATTR Value 30.1K
SYMBOL res 384 160 R0
SYMATTR InstName R4
SYMATTR Value 6.04K
SYMBOL voltage -96 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 512 192 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.001 Lser=0 mfg="TDK" pn="C3216X5ROJ106M" type="X5R"
SYMBOL res 592 160 R0
SYMATTR InstName Rload
SYMATTR Value 1
TEXT 432 352 Left 2 !.tran .1 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\12a307d57a59_AD8552.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8552.asy)
R2 OUT N001 10K
V2 -V 0 -5
R1 N001 0 10K
Rload OUT 0 10K
Vin IN 0 SINE(0 1 10K)
XU1 IN N001 +V -V OUT AD8552 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 240 -992 224 -992
WIRE 336 -992 320 -992
WIRE 352 -992 336 -992
WIRE 448 -992 432 -992
WIRE -16 -896 -16 -912
WIRE 80 -896 80 -912
WIRE 336 -880 336 -992
WIRE 352 -880 336 -880
WIRE 448 -864 448 -992
WIRE 448 -864 416 -864
WIRE 560 -864 448 -864
WIRE 352 -848 240 -848
WIRE 560 -848 560 -864
WIRE 240 -832 240 -848
WIRE -16 -800 -16 -816
WIRE 80 -800 80 -816
WIRE 560 -752 560 -768
WIRE 240 -736 240 -752
SYMBOL res 336 -1008 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL Opamps\\AD8552 384 -928 R0
SYMATTR InstName U1
SYMBOL res 448 -1008 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 240 -848 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 544 -864 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 80 -912 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -16 -912 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG -16 -912 +V
FLAG -16 -800 0
FLAG 240 -736 0
FLAG 560 -864 OUT
FLAG 240 -848 IN
FLAG 384 -896 +V
FLAG 80 -912 -V
FLAG 384 -832 -V
FLAG 224 -992 0
FLAG 560 -752 0
FLAG 80 -800 0
TEXT 496 -712 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\2bc2982a780f_ex3.asc
* Generated by LTspice 26.0.1 for Windows.
R4 1 0 2
R1 2 4 2
V2 2 3 6
R2 1 3 2
R3 2 1 2
V1 0 4 12
G1 1 0 4 2 1
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 544 -16 192 -16
WIRE -160 64 -336 64
WIRE -32 64 -160 64
WIRE 192 64 192 -16
WIRE 192 64 48 64
WIRE 384 64 192 64
WIRE 384 80 384 64
WIRE -160 128 -160 64
WIRE 192 176 192 144
WIRE 192 192 192 176
WIRE -160 320 -160 208
WIRE -48 320 -160 320
WIRE 192 320 192 272
WIRE 192 320 32 320
WIRE 384 320 384 160
WIRE 384 320 192 320
WIRE -160 448 -160 320
WIRE -80 448 -160 448
WIRE 192 448 192 320
WIRE 192 448 0 448
WIRE -336 496 -336 64
WIRE -64 496 -336 496
WIRE 544 496 544 -16
WIRE 544 496 -16 496
SYMBOL res 48 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2
SYMBOL g -96 448 R270
SYMATTR InstName G1
SYMATTR Value 1
SYMBOL res 368 64 R0
SYMATTR InstName R3
SYMATTR Value 2
SYMBOL res 64 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL voltage -160 224 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 208 288 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 2
SYMBOL voltage 192 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 6
FLAG -160 320 0
FLAG 192 320 1
FLAG 192 64 2
FLAG 192 176 3
FLAG -160 64 4
TEXT -338 506 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\08eed9aae009_Fig10_20.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Vout Vin
Vin Vin 0 PULSE(0 1 500p 0 0 1n 3n)
VDD VDD 0 1
M1 Vin VDD Vout 0 N_50n l=50n w=500n
C1 Vout 0 50f
M2 Vout 0 Vin VDD P_50n l=50n w=1u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 2.5n
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 680
WIRE 208 -96 208 -112
WIRE 208 0 208 -16
WIRE 272 -112 208 -112
WIRE 272 -112 272 -272
WIRE 368 -112 272 -112
WIRE 384 -272 272 -272
WIRE 400 -320 400 -336
WIRE 432 -240 432 -272
WIRE 432 -224 432 -240
WIRE 448 -32 448 -64
WIRE 448 -16 448 -32
WIRE 528 -272 480 -272
WIRE 528 -112 464 -112
WIRE 528 -112 528 -272
WIRE 544 -336 400 -336
WIRE 560 -112 528 -112
WIRE 672 -112 560 -112
WIRE 672 -80 672 -112
WIRE 672 16 672 -16
WIRE 784 -192 784 -208
WIRE 784 -176 784 -192
WIRE 784 -64 784 -96
SYMBOL pmos4 480 -320 R90
WINDOW 0 71 -7 VRight 0
WINDOW 3 66 101 VRight 0
WINDOW 123 91 79 VRight 0
SYMATTR InstName M2
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL voltage 208 -112 R0
WINDOW 0 -85 56 Left 0
WINDOW 3 -119 152 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(0 1 500p 0 0 1n 3n)
SYMBOL nmos4 368 -64 R270
WINDOW 0 70 70 VRight 0
WINDOW 3 99 70 VRight 0
WINDOW 123 99 -86 VRight 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 784 -192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL cap 656 -80 R0
SYMATTR InstName C1
SYMATTR Value 50f
FLAG 208 0 0
FLAG 672 16 0
FLAG 560 -112 Vout
FLAG 208 -112 Vin
FLAG 416 -112 0
FLAG 784 -64 0
FLAG 784 -192 VDD
FLAG 448 -32 VDD
FLAG 544 -336 0
FLAG 432 -240 VDD
TEXT 392 40 Left 0 !.tran 2.5n
TEXT 392 64 Left 0 !.lib cmosedu_models.txt
TEXT 576 -272 Left 0 ;Plot Vout Vin
* Z:\home\khalils\Downloads\files\data\raw_asc\52fd6b277807_10234.asc
* Generated by LTspice 26.0.1 for Windows.
VCE N002 0
R2 N002 N001 1K
Q1 N001 N004 0 0 BC547B
R1 N004 N003 1K
VBE N003 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VBE 0 1 0.1 VCE 0 5 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 16 224 16
WIRE 432 16 352 16
WIRE 224 48 224 16
WIRE 0 96 -64 96
WIRE 160 96 80 96
WIRE 432 96 432 16
WIRE -64 144 -64 96
WIRE -64 256 -64 224
WIRE 224 256 224 144
WIRE 224 256 -64 256
WIRE 272 256 224 256
WIRE 432 256 432 176
WIRE 432 256 272 256
SYMBOL npn 160 48 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL res 368 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 432 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VCE
SYMATTR Value ""
SYMBOL voltage -64 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VBE
SYMATTR Value ""
SYMBOL res 96 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG 272 256 0
TEXT -96 280 Left 2 !.dc VBE 0 1 0.1 VCE 0 5 1
* Z:\home\khalils\Downloads\files\data\raw_asc\2b723713759f_ADGS2414D.asc
* Generated by LTspice 26.0.1 for Windows.
V1 vS 0 SINE(0 10 20)
R1 vD 0 301
V2 vIN 0 PULSE(0 2.5 20n 20n 20n 150m 300m)
C1 vD 0 36p
V3 v+ 0 15
V4 v- 0 -15
XU1 vIN vD vS v- 0 v+ ADGS2414D ;pnba IN)D)S)Vss)GND)Vdd
.tran 1
* Note:\nSwitch shown for a logic 0 input\nQinj not included\nSPI functionality is not modelled\nOny one channel is modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADGS2414D.asy)
.lib ADGS2414D.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 832
WIRE 240 160 240 128
WIRE -80 224 -112 224
WIRE 112 224 0 224
WIRE 144 224 112 224
WIRE 384 224 336 224
WIRE 464 224 384 224
WIRE 576 224 464 224
WIRE 464 256 464 224
WIRE 576 256 576 224
WIRE 112 288 48 288
WIRE 144 288 112 288
WIRE -288 336 -288 304
WIRE -192 336 -192 304
WIRE 48 336 48 288
WIRE 464 352 464 336
WIRE 576 352 576 320
WIRE 288 416 288 400
WIRE 192 432 192 400
WIRE -288 464 -288 416
WIRE -192 464 -192 416
WIRE 48 464 48 416
FLAG -112 224 0
FLAG 48 464 0
FLAG 464 352 0
FLAG 288 416 0
FLAG 384 224 vD
FLAG 112 224 vS
FLAG 112 288 vIN
FLAG 576 352 0
FLAG -288 304 v+
FLAG 240 128 v+
FLAG -288 464 0
FLAG -192 464 0
FLAG -192 304 v-
FLAG 192 432 v-
SYMBOL voltage 16 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 20)
SYMBOL res 448 240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage 48 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 30 177 Left 2
SYMATTR Value PULSE(0 2.5 20n 20n 20n 150m 300m)
SYMATTR InstName V2
SYMBOL cap 560 256 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -288 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL voltage -192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -15
SYMBOL ADGS2414D 240 272 R0
SYMATTR InstName U1
TEXT 80 528 Left 2 !.tran 1
TEXT -288 8 Left 2 ;Note:\nSwitch shown for a logic 0 input\nQinj not included\nSPI functionality is not modelled\nOny one channel is modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\ab72fef28ab3_1_1.asc
* Generated by LTspice 26.0.1 for Windows.
;tran 1
R N002 0 10k
V1 N001 0 SINE(0 10 50)
D1 N001 N002 MURS120
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 96 -32 96
WIRE -32 144 -32 96
WIRE 144 144 144 96
WIRE 144 240 144 208
WIRE -32 272 -32 224
WIRE 144 336 144 320
SYMBOL voltage -32 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 50)
SYMBOL diode 128 144 R0
SYMATTR InstName D1
SYMATTR Value MURS120
SYMBOL res 128 224 R0
SYMATTR InstName R
SYMATTR Value 10k
FLAG -32 272 0
FLAG 144 336 0
TEXT -64 296 Left 2 !;tran 1
TEXT -66 360 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\f5c7bf9ca7f6_Draft7.asc
* Generated by LTspice 26.0.1 for Windows.
D4 N001 N003 1N4148
D3 0 N003 1N4148
R1 N003 N002 1000k
D1 N002 N001 1N4148
V1 N001 0 SINE(0 1 1k)
D2 N002 0 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1716 680
WIRE 240 32 16 32
WIRE 240 96 240 32
WIRE 240 96 144 96
WIRE 368 96 240 96
WIRE 16 144 16 32
WIRE 144 176 144 160
WIRE 144 176 96 176
WIRE 368 176 368 160
WIRE 464 176 368 176
WIRE 544 176 464 176
WIRE 144 192 144 176
WIRE 368 192 368 176
WIRE 256 256 144 256
WIRE 368 256 256 256
WIRE 464 256 432 256
WIRE 544 256 464 256
WIRE 96 304 96 176
WIRE 432 304 432 256
WIRE 432 304 96 304
WIRE 16 336 16 224
WIRE 176 336 16 336
WIRE 256 336 256 256
WIRE 256 336 176 336
SYMBOL diode 128 192 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL res 448 160 R0
SYMATTR InstName R1
SYMATTR Value 1000k
SYMBOL diode 160 160 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL diode 352 96 R0
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL voltage 16 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1k)
SYMBOL diode 384 256 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value 1N4148
FLAG 176 336 0
TEXT -16 360 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8418A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8418A.asy)
XU1 N003 0 0 OUT N001 N001 N002 AD8418A ;pnba IN-)GND)REF2)OUT)VS)REF1)IN+
V1 N001 0 5
VDIFF N002 N003 SINE(0 0.1 1k)
VCM N003 0 4
.tran 10m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 80 -240 80
WIRE 192 80 160 80
WIRE -240 96 -240 80
WIRE 160 96 160 80
WIRE 192 96 192 80
WIRE 112 128 -112 128
WIRE -112 144 -112 128
WIRE 112 144 112 128
WIRE 128 144 112 144
WIRE 320 176 272 176
WIRE -240 192 -240 176
WIRE 128 208 112 208
WIRE -112 240 -112 224
WIRE 112 240 112 208
WIRE 112 240 -112 240
WIRE -112 272 -112 240
WIRE 160 272 160 256
WIRE 192 272 192 256
WIRE 192 272 160 272
WIRE 160 288 160 272
WIRE -112 368 -112 352
SYMBOL voltage -112 256 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName VCM
SYMATTR Value 4
SYMBOL voltage -240 80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -112 128 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR Value SINE(0 0.1 1k)
SYMATTR InstName VDIFF
SYMBOL AD8418A 160 176 R0
SYMATTR InstName U1
FLAG 160 288 0
FLAG -112 368 0
FLAG -240 192 0
FLAG 320 176 OUT
TEXT 208 304 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\1067bd1d61c5_1c.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
V2 N002 0 0
R1 vout N003 1000
V3 N003 0 5
D2 vout N002 D
D1 vout N001 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -80 64 -80
WIRE 304 -80 272 -80
WIRE 304 0 304 -80
WIRE 432 0 304 0
WIRE 576 0 432 0
WIRE 208 80 176 80
WIRE 304 80 304 0
WIRE 304 80 272 80
WIRE 432 80 432 0
WIRE 64 144 64 -80
WIRE 176 144 176 80
WIRE 432 192 432 160
WIRE 64 336 64 224
WIRE 176 336 176 224
WIRE 432 336 432 272
FLAG 432 336 0
FLAG 176 336 0
FLAG 64 336 0
FLAG 576 0 vout
IOPIN 576 0 Out
SYMBOL voltage 64 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 176 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL res 416 64 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL voltage 432 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL diode 272 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMBOL diode 272 -96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
TEXT 30 360 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\697e63469ce5_1844-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
I1 OUT 0 {iload} load
XU1 IN 0 IN OUT LTC1844-1.8 ;pnba IN)GND)_SHDN)OUT
.dc v1 5 1 10m
.measure DC vdrop WHEN V(out)=1.7
.measure DC dropout param Vdrop-1.7
.param iload=150m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1844-1.8.asy)
.lib LTC1844-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1940 1316
WIRE 64 80 -32 80
WIRE 80 80 64 80
WIRE 448 80 368 80
WIRE -32 96 -32 80
WIRE 448 96 448 80
WIRE -32 192 -32 176
WIRE 448 192 448 176
WIRE 64 240 64 80
WIRE 80 240 64 240
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -32 192 0
FLAG 448 192 0
FLAG 448 80 OUT
FLAG -32 80 IN
SYMBOL voltage -32 80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL current 448 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 25 80 Left 2
WINDOW 3 41 44 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMATTR Value {iload}
SYMBOL LTC1844-1.8 224 160 R0
SYMATTR InstName U1
TEXT 648 88 Left 2 !.dc v1 5 1 10m
TEXT 648 176 Left 2 !.measure DC vdrop WHEN V(out)=1.7\n.measure DC dropout param Vdrop-1.7
TEXT 648 128 Left 2 !.param iload=150m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8052A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8052A.asy)
R3 N004 0 9.09K
V1 IN 0 24
R2 N007 0 90.9K
R1 IN N001 510K
XU1 0 N001 N002 N002 OUT N002 MP_01 N006 MP_02 N004 MP_03 MP_04 MP_05 N005 N007 MP_06 MP_07 MP_08 MP_09 MP_10 MP_11 MP_12 MP_13 MP_14 MP_15 MP_16 MP_17 IN LTM8052A ;pnba GND)RUN)Vref)CTL_T)Vout)CTL_I))SS))ADJ))))Comp)Rt)))))))))))))Vin
C1 OUT 0 330 V=6.3 Irms=3.9 Rser=0.01 Lser=0 mfg="KEMET" pn="T520D337M006ASE010" type="Tantalum"
C2 OUT 0 100 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C575OX5ROJI07M" type="X5R"
Rload OUT 0 .5
.tran 1.2m startup
.lib LTM8052A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 -80 -144 -80
WIRE 208 -80 -32 -80
WIRE -144 -64 -144 -80
WIRE -32 -64 -32 -80
WIRE 208 -32 208 -80
WIRE -144 32 -144 16
WIRE -32 32 -32 16
WIRE 64 32 -32 32
WIRE 432 32 352 32
WIRE 528 32 432 32
WIRE 624 32 528 32
WIRE 432 48 432 32
WIRE 528 48 528 32
WIRE 624 48 624 32
WIRE 64 128 48 128
WIRE 368 128 352 128
WIRE 432 144 432 112
WIRE 528 144 528 112
WIRE 624 144 624 128
WIRE 48 224 48 128
WIRE 64 224 48 224
WIRE 368 224 352 224
WIRE 464 224 448 224
WIRE 48 320 48 224
WIRE 64 320 48 320
WIRE 368 320 352 320
WIRE 64 416 48 416
WIRE 368 416 352 416
WIRE 464 416 448 416
WIRE 208 496 208 480
SYMBOL res 352 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 9.09K
SYMBOL PowerProducts\\LTM8052A 208 224 R0
SYMATTR InstName U1
SYMBOL voltage -144 -80 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 512 48 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C575OX5ROJI07M" type="X5R"
SYMBOL res 608 32 R0
SYMATTR InstName Rload
SYMATTR Value .5
SYMBOL polcap 416 48 R0
WINDOW 3 24 64 Left 2
SYMATTR Value 330
SYMATTR InstName C1
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=6.3 Irms=3.9 Rser=0.01 Lser=0 mfg="KEMET" pn="T520D337M006ASE010" type="Tantalum"
SYMBOL res 352 432 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 90.9K
SYMBOL res -48 -80 R0
SYMATTR InstName R1
SYMATTR Value 510K
FLAG 208 496 0
FLAG -144 32 0
FLAG -144 -80 IN
FLAG 464 416 0
FLAG 464 224 0
FLAG 624 144 0
FLAG 432 144 0
FLAG 624 32 OUT
FLAG 528 144 0
TEXT 472 320 Left 2 !.tran 1.2m startup