Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\3e897243c102_zero_gain_ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
* Zero Gain Amplifier
R2 2+ 2_+ 47
V1 W1 0 PWL REPEAT FOREVER (0 0 0.5m 3 1m 0) ENDREPEAT
R1 W1 2+ 2.2k
Q1 2_+ 2+ 0 0 2N3904
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -224 208 -272
WIRE 208 -224 128 -224
WIRE -240 -176 -240 -224
WIRE 208 -176 208 -224
WIRE -240 -48 -240 -96
WIRE 208 -48 208 -96
WIRE 208 -48 96 -48
WIRE 208 -32 208 -48
WIRE 288 -32 208 -32
WIRE 208 -16 208 -32
WIRE 208 80 208 64
WIRE 288 80 208 80
WIRE 208 112 208 80
WIRE 96 160 96 -48
WIRE 144 160 96 160
WIRE 208 288 208 208
IOPIN 128 -224 In
IOPIN -240 -224 In
IOPIN 208 -272 In
IOPIN 288 -32 In
IOPIN 288 80 In
SYMBOL res 192 -192 R0
SYMATTR InstName R1
SYMATTR Value 2.2k
SYMBOL res 192 -32 R0
SYMATTR InstName R2
SYMATTR Value 47
SYMBOL voltage -240 -192 R0
WINDOW 3 -455 192 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PWL REPEAT FOREVER (0 0 0.5m 3 1m 0) ENDREPEAT
SYMATTR InstName V1
SYMBOL npn 144 112 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
FLAG 208 288 0
FLAG 128 -224 W1
FLAG -240 -48 0
FLAG -240 -224 W1
FLAG 208 -272 1+
FLAG 288 -32 2+
FLAG 288 80 2_+
TEXT -136 296 Left 2 !.tran 10m
TEXT -32 -416 Left 2 ;Zero Gain Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3012.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3012.asy)
R2 N001 0 249K
Rload OUT 0 100
C1 OUT 0 3.3
XU1 IN OUT IN N001 0 LT3012 ;pnba IN)OUT)_SHDN)ADJ)GND
V1 IN 0 PWL(0 0 1 10)
R1 OUT N001 750K
.tran 1
.lib LT3012.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 128 -96 128
WIRE 80 128 -64 128
WIRE 112 128 80 128
WIRE 432 128 400 128
WIRE 576 128 432 128
WIRE 624 128 576 128
WIRE 672 128 624 128
WIRE 432 144 432 128
WIRE 672 144 672 128
WIRE -96 160 -96 128
WIRE 576 160 576 128
WIRE 80 224 80 128
WIRE 112 224 80 224
WIRE 432 224 400 224
WIRE 432 240 432 224
WIRE 576 240 576 224
WIRE 672 240 672 224
WIRE -96 272 -96 240
WIRE 256 304 256 288
WIRE 432 336 432 320
SYMBOL res 656 128 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL res 416 128 R0
SYMATTR InstName R1
SYMATTR Value 750K
SYMBOL res 416 224 R0
SYMATTR InstName R2
SYMATTR Value 249K
SYMBOL cap 560 160 R0
SYMATTR InstName C1
SYMATTR Value 3.3
SYMBOL voltage -96 144 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL LT3012 256 160 R0
SYMATTR InstName U1
FLAG 256 304 0
FLAG -96 272 0
FLAG 672 240 0
FLAG 576 240 0
FLAG 432 336 0
FLAG 624 128 OUT
FLAG -64 128 IN
TEXT 584 312 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1011.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1011.asy)
R1 +V N002 2K
V4 N004 0 PULSE(0 2.7 0 1u 1u 5m 10m)
Q1 N003 N004 N005 0 2N3904
XU1 0 0 N001 -V NC_01 N003 N002 +V LT1011 ;pnba GND)In+)In-)V-)BAL)STROBE)OUT)V+
R2 N005 0 3K
V3 N001 0 PULSE(-100m 100m 0 .5m .5m 0 1m)
V2 -V 0 -15
V1 +V 0 15
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 30m
.lib LT1011.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -384 96 -384 80
WIRE -288 96 -288 80
WIRE -96 128 -96 112
WIRE 0 128 -96 128
WIRE 0 144 0 128
WIRE -384 192 -384 176
WIRE -288 192 -288 176
WIRE -96 192 -96 128
WIRE -128 224 -656 224
WIRE -656 240 -656 224
WIRE 0 240 0 224
WIRE 0 240 -48 240
WIRE -128 256 -144 256
WIRE -112 304 -112 288
WIRE -112 304 -144 304
WIRE -144 320 -144 304
WIRE -656 336 -656 320
WIRE -80 336 -80 288
WIRE -144 384 -496 384
WIRE -496 400 -496 384
WIRE -80 448 -80 432
WIRE -496 496 -496 480
WIRE -80 544 -80 528
SYMBOL res -96 432 R0
SYMATTR InstName R2
SYMATTR Value 3K
SYMBOL npn -144 336 R0
WINDOW 0 58 22 Left 2
WINDOW 3 54 66 Left 2
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage -496 384 R0
SYMATTR InstName V4
SYMATTR Value PULSE(0 2.7 0 1u 1u 5m 10m)
SYMBOL voltage -384 80 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL LT1011 -96 240 R0
SYMATTR InstName U1
SYMBOL voltage -656 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(-100m 100m 0 .5m .5m 0 1m)
SYMBOL res -16 128 R0
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL voltage -288 80 R0
SYMATTR InstName V2
SYMATTR Value -15
FLAG -288 192 0
FLAG -384 192 0
FLAG -384 80 +V
FLAG -96 288 -V
FLAG -288 80 -V
FLAG -96 112 +V
FLAG -656 336 0
FLAG -144 256 0
FLAG -80 544 0
FLAG -496 496 0
FLAG -144 320 0
TEXT 48 488 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\184fc93836a8_AD8548.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8548.asy)
Vin IN 0 SINE(0 .1 10K)
R1 N001 0 1K
V2 -V 0 -5
V1 +V 0 5
R2 OUT N001 10K
XU1 IN N001 +V -V OUT AD8548 ;pnba In+)In-)V+)V-)OUT
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1432 700
WIRE 368 -1184 352 -1184
WIRE 464 -1184 448 -1184
WIRE 480 -1184 464 -1184
WIRE 576 -1184 560 -1184
WIRE 128 -1088 128 -1104
WIRE 224 -1088 224 -1104
WIRE 464 -1072 464 -1184
WIRE 480 -1072 464 -1072
WIRE 576 -1056 576 -1184
WIRE 576 -1056 544 -1056
WIRE 624 -1056 576 -1056
WIRE 480 -1040 368 -1040
WIRE 368 -1024 368 -1040
WIRE 128 -992 128 -1008
WIRE 224 -992 224 -1008
WIRE 368 -928 368 -944
SYMBOL voltage 224 -1104 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL Opamps\\AD8548 512 -1120 R0
SYMATTR InstName U1
SYMBOL voltage 128 -1104 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 576 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 368 -1040 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 .1 10K)
SYMBOL res 464 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG 368 -928 0
FLAG 624 -1056 OUT
FLAG 368 -1040 IN
FLAG 512 -1088 +V
FLAG 512 -1024 -V
FLAG 352 -1184 0
FLAG 128 -1104 +V
FLAG 128 -992 0
FLAG 224 -1104 -V
FLAG 224 -992 0
TEXT 712 -960 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\2d0afc21679a_sys_pr_kl_ws0809.asc
* Generated by LTspice 26.0.1 for Windows.
Rs N005 N007 100
Rp N007 0 20k
Cs N007 0 150n
V1 0 N006 10
V2 N002 0 10
Cr N003 0 100n
V3 N001 0 PULSE(0 5 90m 1n 1n)
S1 N006 N005 N001 0 SWl
S2 N005 N004 N001 0 SWr
S3 N004 N003 N001 0 SWr
S4 N003 N002 N001 0 SWl
.model swr sw(Ron=10m Roff=10meg vt=1 vh=0.6)
.model swl sw(Ron=1meg Roff=10m vt=1 vh=0.6)
.tran 0 100m 90m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 976 680
WIRE -512 -256 -800 -256
WIRE -96 -256 -512 -256
WIRE -800 -208 -800 -256
WIRE -512 -112 -512 -256
WIRE -512 -112 -592 -112
WIRE -400 -112 -512 -112
WIRE -96 -112 -96 -256
WIRE -96 -112 -208 -112
WIRE -32 -112 -96 -112
WIRE -800 -96 -800 -128
WIRE -464 -80 -544 -80
WIRE -352 -80 -464 -80
WIRE -80 -80 -160 -80
WIRE 16 -80 -80 -80
WIRE -592 -48 -592 -112
WIRE -544 -48 -544 -80
WIRE -400 -48 -400 -112
WIRE -352 -48 -352 -80
WIRE -208 -48 -208 -112
WIRE -160 -48 -160 -80
WIRE -32 -48 -32 -112
WIRE 16 -48 16 -80
WIRE -608 0 -656 0
WIRE -480 0 -528 0
WIRE -416 0 -480 0
WIRE -224 0 -336 0
WIRE -112 0 -144 0
WIRE -48 0 -112 0
WIRE 288 0 32 0
WIRE -112 32 -112 0
WIRE -480 128 -480 0
WIRE -656 160 -656 0
WIRE -112 160 -112 112
WIRE -112 160 -272 160
WIRE 288 160 288 0
WIRE -112 192 -112 160
WIRE -272 208 -272 160
WIRE -656 384 -656 240
WIRE -480 384 -480 192
WIRE -480 384 -656 384
WIRE -272 384 -272 272
WIRE -272 384 -480 384
WIRE -112 384 -112 272
WIRE -112 384 -272 384
WIRE 288 384 288 240
WIRE 288 384 -112 384
FLAG -800 -96 0
FLAG -480 384 0
FLAG -464 -80 0
FLAG -80 -80 0
SYMBOL res -128 16 R0
SYMATTR InstName Rs
SYMATTR Value 100
SYMBOL res -128 176 R0
SYMATTR InstName Rp
SYMATTR Value 20k
SYMBOL cap -288 208 R0
SYMATTR InstName Cs
SYMATTR Value 150n
SYMBOL voltage 288 256 R180
WINDOW 0 24 104 Left 0
WINDOW 3 24 16 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL voltage -656 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 10
SYMBOL cap -496 128 R0
SYMATTR InstName Cr
SYMATTR Value 100n
SYMBOL voltage -800 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 90m 1n 1n)
SYMBOL sw 48 0 R90
SYMATTR InstName S1
SYMATTR Value SWl
SYMBOL sw -128 0 R90
SYMATTR InstName S2
SYMATTR Value SWr
SYMBOL sw -320 0 R90
SYMATTR InstName S3
SYMATTR Value SWr
SYMBOL sw -512 0 R90
SYMATTR InstName S4
SYMATTR Value SWl
TEXT 344 16 Left 0 !.model swr sw(Ron=10m Roff=10meg vt=1 vh=0.6)\n.model swl sw(Ron=1meg Roff=10m vt=1 vh=0.6)
TEXT -834 408 Left 0 !.tran 0 100m 90m
* Z:\home\khalils\Downloads\files\data\raw_asc\043fdc83e779_MAX9638.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX9638.asy)
XU1 IN OUT Vcc Vee OUT Vcc MAX9638 ;pnba In+)In-)V+)V-)OUT)SHDN
V1 IN 0 SINE(0 50m 10k)
Vee 0 Vee 2.5
CL OUT 0 15p
RL OUT 0 10k
Vcc Vcc 0 2.5
.tran 100u
.lib MAX9638.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 64 288 64 272
WIRE 416 352 416 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 64 448 64 400
WIRE 416 448 416 416
WIRE 448 448 448 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 64 544 64 528
WIRE 304 592 304 576
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 10k
SYMBOL MAX9638 432 400 R0
SYMATTR InstName U1
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 10k)
FLAG 720 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
FLAG 448 448 Vcc
TEXT 16 632 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\7e9b22f24db3_lab6.asc
* Generated by LTspice 26.0.1 for Windows.
R3 VDD N001 0.1k
V2 A 0 PULSE(0 5 0 1n 1n .5m 1m)
Q1 N006 N005 A 0 NPN
M4 out N003 N002 N002 RIT4007P7
Q2 N004 N006 N009 0 NPN
D1 N007 N008 D
C1 N008 0 20p
C2 out 0 20p
Q3 N001 N004 N007 0 NPN
Q4 N008 N009 0 0 NPN
V1 VDD 0 5
R1 VDD N005 3.9k
R2 VDD N004 1.5k
R4 N009 0 1.0k
M3 out N003 0 0 RIT4007N7
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc CMOS/CD4007.mod
.tran 0 10m 0
.ic V(out)=5
.meas avg(V(out)*(Id(M4))
.inc CA3086.mod
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1624 680
WIRE 1200 -144 1200 -176
WIRE 1200 -144 1088 -144
WIRE 1232 -144 1200 -144
WIRE 1424 -144 1232 -144
WIRE 1088 -128 1088 -144
WIRE 80 -48 48 -48
WIRE 192 -48 160 -48
WIRE 1424 -32 1424 -64
WIRE 48 0 48 -48
WIRE 528 0 528 -32
WIRE 528 0 448 0
WIRE 400 16 352 16
WIRE 1232 16 1232 -64
WIRE 1360 16 1232 16
WIRE 1088 80 1088 -48
WIRE 512 96 448 96
WIRE 1232 96 1232 16
WIRE 512 112 512 96
WIRE 688 112 512 112
WIRE 512 128 512 112
WIRE 1168 144 1136 144
WIRE 1424 144 1424 64
WIRE 352 208 352 16
WIRE 464 208 352 208
WIRE 688 224 688 112
WIRE 1424 272 1424 208
WIRE 1568 272 1424 272
WIRE 1424 288 1424 272
WIRE 1232 336 1232 192
WIRE 1360 336 1232 336
WIRE 1232 352 1232 336
WIRE 512 384 512 224
WIRE 1568 384 1568 272
WIRE 1424 400 1424 384
WIRE 1232 464 1232 432
IOPIN 16 144 In
IOPIN 512 96 In
IOPIN 1200 -176 In
IOPIN 1040 144 In
SYMBOL nmos 464 128 R0
SYMATTR InstName M3
SYMATTR Value RIT4007N7
SYMBOL res 1408 -160 R0
SYMATTR InstName R3
SYMATTR Value 0.1k
SYMBOL pmos 400 96 M180
SYMATTR InstName M4
SYMATTR Value RIT4007P7
SYMBOL cap 672 224 R0
SYMATTR InstName C2
SYMATTR Value 20p
SYMBOL voltage 16 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1n 1n .5m 1m)
SYMBOL cap 1552 384 R0
SYMATTR InstName C1
SYMATTR Value 20p
SYMBOL npn 1136 80 R90
SYMATTR InstName Q1
SYMBOL res 1216 336 R0
SYMATTR InstName R4
SYMATTR Value 1.0k
SYMBOL npn 1360 288 R0
SYMATTR InstName Q4
SYMBOL voltage 176 -48 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL npn 1360 -32 R0
SYMATTR InstName Q3
SYMBOL diode 1408 144 R0
SYMATTR InstName D1
SYMBOL res 1216 -160 R0
SYMATTR InstName R2
SYMATTR Value 1.5k
SYMBOL res 1072 -144 R0
SYMATTR InstName R1
SYMATTR Value 3.9k
SYMBOL npn 1168 96 R0
SYMATTR InstName Q2
FLAG 48 0 0
FLAG 512 384 0
FLAG 192 -48 VDD
FLAG 16 144 A
FLAG 16 224 0
FLAG 512 96 out
FLAG 688 288 0
FLAG 1232 464 0
FLAG 1424 400 0
FLAG 1200 -176 VDD
FLAG 1568 448 0
FLAG 1040 144 A
TEXT 104 480 Left 2 !.inc CMOS/CD4007.mod
TEXT -56 500 Left 2 !.tran 0 10m 0
TEXT 96 328 Left 2 !.ic V(out)=5
TEXT -176 312 Left 2 !.meas avg(V(out)*(Id(M4))
TEXT 104 520 Left 2 !.inc CA3086.mod
* Z:\home\khalils\Downloads\files\data\raw_asc\147f3b4d5da9_SR_Latch.asc
* Generated by LTspice 26.0.1 for Windows.
A2 0 Din 0 Q 0 Q` 0 0 AND VHigh=5
A1 0 N001 0 Q` 0 Q 0 0 AND VHigh=5
A3 Din 0 0 0 0 N001 0 0 BUF VHigh=5
V1 Vdd 0 5
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 208 -80 208
WIRE 368 208 0 208
WIRE 368 240 256 240
WIRE 464 240 432 240
WIRE 496 240 464 240
WIRE 0 304 0 208
WIRE 256 320 256 240
WIRE 432 320 256 320
WIRE 464 352 464 240
WIRE 464 352 256 352
WIRE 256 448 256 352
WIRE 368 448 256 448
WIRE 432 448 432 320
WIRE 496 448 432 448
WIRE 0 480 0 368
WIRE 368 480 0 480
IOPIN -80 208 In
IOPIN 496 240 Out
IOPIN 496 448 Out
SYMBOL Digital\\inv 64 304 R90
WINDOW 123 8 60 Left 2
SYMATTR InstName A3
SYMATTR Value2 VHigh=5
SYMBOL Digital\\and 400 528 M180
WINDOW 123 16 -4 Left 2
SYMATTR InstName A1
SYMATTR Value2 VHigh=5
SYMBOL Digital\\and 400 160 R0
WINDOW 123 16 52 Left 2
SYMATTR InstName A2
SYMATTR Value2 VHigh=5
SYMBOL voltage -176 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -176 400 0
FLAG -176 320 Vdd
FLAG -80 208 Din
FLAG 496 240 Q`
FLAG 496 448 Q
TEXT -208 592 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\2a695cf79bd3_divider.asc
* Generated by LTspice 26.0.1 for Windows.
* right click on counter\nSet "Value" field to "cycles=n" where n is the divisor.
A9 N001 0 0 0 0 Div10_OUT_n Div10_OUT 0 COUNTER cycles=10
V1 N001 0 PULSE(0 1 0 1n 1n 0.5u 1u)
.tran 0 20u 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2156 856
WIRE 784 400 640 400
WIRE 416 432 192 432
WIRE 768 464 640 464
WIRE 192 624 192 432
WIRE 192 752 192 704
IOPIN 784 400 Out
IOPIN 768 464 Out
SYMBOL counter 496 400 R0
WINDOW 3 -64 -52 Left 2
SYMATTR Value cycles=10
SYMATTR InstName A9
SYMBOL voltage 192 608 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1n 1n 0.5u 1u)
FLAG 192 752 0
FLAG 784 400 Div10_OUT
FLAG 768 464 Div10_OUT_n
TEXT -224 -232 Left 2 !.tran 0 20u 0
TEXT 328 552 Left 2 ;right click on counter\nSet "Value" field to "cycles=n" where n is the divisor.
* Z:\home\khalils\Downloads\files\data\raw_asc\3246344028f2_Fig26_18_ID_VDS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1) and 1/d(Id(M1)) for output resistance
VGS N002 0 400m
VDS N001 0 0
M1 N001 N002 0 0 N_50n l=50n w=500n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VDS 0 1
.include cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 640 80 448 80
WIRE 448 112 448 80
WIRE 640 112 640 80
WIRE 496 160 448 160
WIRE 400 192 288 192
WIRE 288 208 288 192
WIRE 448 224 448 208
WIRE 640 224 640 192
WIRE 288 304 288 288
SYMBOL voltage 640 96 R0
WINDOW 0 41 55 Left 0
WINDOW 3 41 83 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 0
SYMBOL nmos4 400 112 R0
WINDOW 0 59 18 Left 0
WINDOW 3 64 75 Left 0
WINDOW 123 64 103 Left 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 288 192 R0
WINDOW 0 -90 57 Left 0
WINDOW 3 -90 85 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 400m
FLAG 288 304 0
FLAG 448 224 0
FLAG 640 224 0
FLAG 496 160 0
TEXT 384 272 Left 0 !.dc VDS 0 1
TEXT 384 296 Left 0 !.include cmosedu_models.txt
TEXT 224 56 Left 0 ;Plot Id(M1) and 1/d(Id(M1)) for output resistance
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4932.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4932.asy)
RL2 OUT+ 0 499
RF1 OUT- N001 1k
VS- N005 0 -2.5
R1 OUT_DIFF 0 1k
XU1 NC_01 N001 N004 NC_02 N002 N005 OUT- OUT+ NC_03 N003 ADA4932 ;pnba FBN)VinP)VinN)FBP)VCC)VEE)VoN)VoP)PD)VOCM
Vin IN 0 PULSE(-50m 50m 20n 1n 1n 100n)
G1 0 OUT_DIFF OUT- OUT+ -1m
RL1 0 OUT- 499
RG1 N001 IN 1k
Vocm N003 0 0
RG2 N004 0 1k
RF2 OUT+ N004 1k
VS+ N002 0 2.5
.tran 150n
.lib ADA4932.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 956 680
WIRE 224 -144 80 -144
WIRE 400 -144 304 -144
WIRE 160 -64 144 -64
WIRE 320 -64 240 -64
WIRE 320 -48 320 -64
WIRE 448 32 448 0
WIRE 224 48 176 48
WIRE 320 48 304 48
WIRE 320 64 320 48
WIRE 144 80 144 -64
WIRE 176 80 176 48
WIRE 720 96 624 96
WIRE -32 128 -320 128
WIRE 80 128 80 -144
WIRE 80 128 48 128
WIRE 112 128 80 128
WIRE 624 128 624 96
WIRE 720 128 720 96
WIRE -320 144 -320 128
WIRE 400 144 400 -144
WIRE 400 144 272 144
WIRE 448 144 448 112
WIRE 448 144 400 144
WIRE 528 144 448 144
WIRE 576 144 528 144
WIRE -32 192 -64 192
WIRE 80 192 48 192
WIRE 112 192 80 192
WIRE 400 208 272 208
WIRE 448 208 400 208
WIRE 528 208 448 208
WIRE 576 208 576 192
WIRE 576 208 528 208
WIRE -64 224 -64 192
WIRE 448 240 448 208
WIRE 624 240 624 208
WIRE 720 240 720 208
WIRE -320 256 -320 224
WIRE 144 352 144 272
WIRE 160 352 144 352
WIRE 304 352 240 352
WIRE 448 352 448 320
WIRE 304 368 304 352
WIRE 80 448 80 192
WIRE 224 448 80 448
WIRE 400 448 400 208
WIRE 400 448 304 448
SYMBOL res 320 432 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RF2
SYMATTR Value 1k
SYMBOL voltage -320 128 R0
WINDOW 0 76 31 Right 2
WINDOW 3 -124 -42 Left 2
WINDOW 123 90 88 Right 2
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(-50m 50m 20n 1n 1n 100n)
SYMBOL voltage 144 352 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName VS-
SYMATTR Value -2.5
SYMBOL ADA4932 144 176 R0
SYMATTR InstName U1
SYMBOL res 704 112 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL g 624 112 R0
SYMATTR InstName G1
SYMATTR Value -1m
SYMBOL voltage 208 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName Vocm
SYMATTR Value 0
SYMBOL res 64 112 R90
WINDOW 0 -26 54 VBottom 2
WINDOW 3 -28 55 VTop 2
SYMATTR InstName RG1
SYMATTR Value 1k
SYMBOL res 64 176 R90
WINDOW 0 65 57 VBottom 2
WINDOW 3 65 58 VTop 2
SYMATTR InstName RG2
SYMATTR Value 1k
SYMBOL res 320 -160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 36 57 VTop 2
SYMATTR InstName RF1
SYMATTR Value 1k
SYMBOL voltage 144 -64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName VS+
SYMATTR Value 2.5
SYMBOL res 432 16 R0
SYMATTR InstName RL1
SYMATTR Value 499
SYMBOL res 432 224 R0
SYMATTR InstName RL2
SYMATTR Value 499
FLAG 448 352 0
FLAG 720 96 OUT_DIFF
FLAG 320 64 0
FLAG 320 -48 0
FLAG 304 368 0
FLAG 448 0 0
FLAG -64 224 0
FLAG -320 128 IN
FLAG -320 256 0
FLAG 528 144 OUT-
FLAG 528 208 OUT+
FLAG 624 240 0
FLAG 720 240 0
TEXT 520 416 Left 2 !.tran 150n
* Z:\home\khalils\Downloads\files\data\raw_asc\3aa40318d6a5_400_PushPull.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 BTot N004 0 BC337-25
Q2 0 BTot N004 0 BC327-25
XM1 N003 G 0 IRF520 ;pnba D)G)S
RG G N004 220
V1 N002 0 12
V1 N005 0 PULSE(0 3 0 1e-9 1e-9 2e-6 4e-6)
R2 N001 N003 100
Q3 BTot B 0 0 BC337-25
R3 N002 BTot {Rc}
R4 B N005 300
V3 N001 0 30
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 010e-6
.include irf520.lib
;.step param Rc list 1e3 10e3 100e3
.param Rc=12/90e-3
* RG based on requierd switching times\nRc based on maximum allowed Current through Transistor
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -224 -160 -256 -160
WIRE 256 -160 -144 -160
WIRE -256 -32 -256 -160
WIRE -256 -32 -288 -32
WIRE -224 -32 -256 -32
WIRE 16 -32 -144 -32
WIRE 256 -32 256 -160
WIRE 512 -32 256 -32
WIRE 512 -16 512 -32
WIRE 16 16 16 -32
WIRE 256 64 256 -32
WIRE 512 96 512 64
WIRE 192 112 128 112
WIRE 16 144 16 96
WIRE 80 144 16 144
WIRE 128 144 128 112
WIRE 128 144 80 144
WIRE 256 176 256 160
WIRE 336 176 256 176
WIRE 448 176 416 176
WIRE 464 176 448 176
WIRE -304 192 -320 192
WIRE -176 192 -224 192
WIRE -48 192 -176 192
WIRE 128 224 128 144
WIRE 192 224 128 224
WIRE -320 240 -320 192
WIRE 256 288 256 272
WIRE 512 288 512 192
WIRE 512 288 256 288
WIRE -320 352 -320 320
WIRE 16 352 16 240
WIRE 16 352 -320 352
WIRE -320 384 -320 352
WIRE 256 384 256 288
FLAG 256 384 0
FLAG -288 -32 0
FLAG -320 384 0
FLAG 448 176 G
FLAG 80 144 BTot
FLAG -176 192 B
SYMBOL npn 192 64 R0
WINDOW 3 31 59 Left 2
SYMATTR Value BC337-25
SYMATTR InstName Q1
SYMBOL pnp 192 272 M180
WINDOW 3 29 50 Left 2
SYMATTR Value BC327-25
SYMATTR InstName Q2
SYMBOL nmos 464 96 R0
SYMATTR InstName M1
SYMATTR Value IRF520
SYMATTR Prefix X
SYMBOL res 432 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RG
SYMATTR Value 220
SYMBOL voltage -128 -32 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL voltage -320 224 R0
WINDOW 3 -7 259 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 1e-9 1e-9 2e-6 4e-6)
SYMATTR InstName 1
SYMBOL res 496 -32 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL npn -48 144 R0
SYMATTR InstName Q3
SYMATTR Value BC337-25
SYMBOL res 0 0 R0
SYMATTR InstName R3
SYMATTR Value {Rc}
SYMBOL res -208 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 300
SYMBOL voltage -128 -160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 30
TEXT -328 464 Left 2 !.tran 010e-6
TEXT 120 488 Left 2 !.include irf520.lib
TEXT -328 552 Left 2 !;.step param Rc list 1e3 10e3 100e3\n.param Rc=12/90e-3
TEXT 152 576 Left 2 ;RG based on requierd switching times\nRc based on maximum allowed Current through Transistor