Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1acdc89331fe_FourierReiheRectangular.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Rect 0 PULSE(-0.5 0.5 0 1p 1p 500n 1000n)
R1 Rect 0 50
.tran 0 10000u 0 1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 64 48 64
WIRE 512 64 160 64
WIRE 512 128 512 64
WIRE 48 144 48 64
WIRE 48 272 48 224
WIRE 512 272 512 208
FLAG 48 272 0
FLAG 160 64 Rect
FLAG 512 272 0
SYMBOL voltage 48 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(-0.5 0.5 0 1p 1p 500n 1000n)
SYMBOL Misc\\EuropeanResistor 496 112 R0
SYMATTR InstName R1
SYMATTR Value 50
TEXT 14 296 Left 2 !.tran 0 10000u 0 1n
* Z:\home\khalils\Downloads\files\data\raw_asc\LT83402.asc
* Generated by LTspice 26.0.1 for Windows.
* 2MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT83402.asy)
L1 N004 OUT 1 Rser=6m
R3 OUT N008 280k
R5 N009 0 33.2k
Rload OUT 0 1.6
C3 N005 0 2n
XU1 N004 N007 0 IN N001 IN N007 N009 N006 OUT N008 N003 N002 LT83402 ;pnba SW)Sync/Mode)GND)Vin)BST)EN/UVLO)INTVcc)SET)Vc)OUTS)PGFB)RT)PG
R1 N003 0 47k
R2 N008 0 49.9k
C4 N001 N002 .1
R4 N005 N006 500
C1 N009 0 1
C2 OUT 0 120 Rser=5m
R6 OUT N002 100k
V1 IN 0 12
.tran 1.5m startup
.lib LT83402.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1080 680
WIRE 96 -128 -64 -128
WIRE 272 -128 96 -128
WIRE -64 -112 -64 -128
WIRE 272 -112 272 -128
WIRE 96 -64 96 -128
WIRE 128 -64 96 -64
WIRE 448 -64 416 -64
WIRE 448 -48 448 -64
WIRE -64 -16 -64 -32
WIRE 96 32 96 -64
WIRE 128 32 96 32
WIRE 448 32 448 16
WIRE 448 32 416 32
WIRE 512 32 448 32
WIRE 688 32 592 32
WIRE -32 128 -64 128
WIRE 128 128 48 128
WIRE 512 128 416 128
WIRE 688 128 688 32
WIRE 688 128 592 128
WIRE 768 128 688 128
WIRE 880 128 768 128
WIRE 976 128 880 128
WIRE 976 144 976 128
WIRE 880 160 880 128
WIRE 768 176 768 128
WIRE -80 224 -96 224
WIRE 16 224 -16 224
WIRE 128 224 96 224
WIRE 688 224 688 128
WIRE 688 224 416 224
WIRE 880 240 880 224
WIRE 976 240 976 224
WIRE 128 320 96 320
WIRE 768 320 768 256
WIRE 768 320 416 320
WIRE 768 336 768 320
WIRE 96 416 96 320
WIRE 128 416 96 416
WIRE 448 416 416 416
WIRE 528 416 448 416
WIRE 528 432 528 416
WIRE 768 432 768 416
WIRE 448 448 448 416
WIRE 272 496 272 480
WIRE 448 528 448 512
WIRE 528 528 528 512
SYMBOL res 64 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 47k
SYMBOL res 752 160 R0
SYMATTR InstName R3
SYMATTR Value 280k
SYMBOL res 608 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 100k
SYMBOL cap 864 160 R0
SYMATTR InstName C2
SYMATTR Value 120u
SYMATTR SpiceLine Rser=5m
SYMBOL ind 496 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1u
SYMATTR SpiceLine Rser=6m
SYMBOL res 0 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 500
SYMBOL cap 432 448 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMBOL voltage -64 -128 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 752 320 R0
SYMATTR InstName R2
SYMATTR Value 49.9k
SYMBOL cap 432 -48 R0
SYMATTR InstName C4
SYMATTR Value .1u
SYMBOL res 960 128 R0
SYMATTR InstName Rload
SYMATTR Value 1.6
SYMBOL LT83402 272 192 R0
SYMATTR InstName U1
SYMBOL res 512 416 R0
SYMATTR InstName R5
SYMATTR Value 33.2k
SYMBOL cap -16 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 2n
FLAG -64 -16 0
FLAG -64 128 0
FLAG 272 496 0
FLAG 768 432 0
FLAG 976 240 0
FLAG -96 224 0
FLAG 976 128 OUT
FLAG -64 -128 IN
FLAG 528 528 0
FLAG 448 528 0
FLAG 880 240 0
TEXT 728 552 Left 2 !.tran 1.5m startup
TEXT 48 104 Left 2 ;2MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1101.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1101.asy)
V1 +V 0 15
XU1 0 N001 IN -V +V 0 N002 OUT LT1101 ;pnba GND)Tap1)In-)V-)V+)In+)Tap2)Out
V3 IN 0 SINE(0 .1 1K)
V2 -V 0 -15
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 80 64 64 64
WIRE 352 64 336 64
WIRE -368 96 -368 80
WIRE -240 96 -240 80
WIRE 80 128 64 128
WIRE 352 128 336 128
WIRE -368 192 -368 176
WIRE -240 192 -240 176
WIRE 80 192 -112 192
WIRE 352 192 336 192
WIRE -112 208 -112 192
WIRE 80 256 64 256
WIRE 368 256 336 256
WIRE -112 304 -112 288
SYMBOL voltage -368 80 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -112 192 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 .1 1K)
SYMBOL voltage -240 80 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT1101 208 160 R0
SYMATTR InstName U1
FLAG -240 192 0
FLAG -240 80 +V
FLAG 64 256 -V
FLAG -368 192 0
FLAG -368 80 -V
FLAG -112 304 0
FLAG 368 256 +V
FLAG 64 64 0
FLAG 352 192 0
FLAG 352 64 OUT
FLAG -112 192 IN
TEXT 328 328 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\0fb67c0b17e4_Fig_20_15.asc
* Generated by LTspice 26.0.1 for Windows.
* start-up ckt
MSU3 VDD N001 Vbiasn 0 N_1u l=1u w=10u
R1 N002 0 6.5k TC1=0.002
M2 Vbiasp Vbiasn N002 0 N_1u l=2u w=40u
M4 VDD Vbiasp Vbiasp VDD P_1u l=2u w=30u
MSU1 N001 Vbiasn 0 0 N_1u l=2u w=10u
M1 Vbiasn Vbiasn 0 0 N_1u l=2u w=10u
M3 VDD Vbiasp Vbiasn VDD P_1u l=2u w=30u
MSU2 VDD N001 N001 VDD P_1u l=100u w=10u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1548 680
WIRE 544 16 544 0
WIRE 544 80 544 16
WIRE 544 176 544 160
WIRE 608 -16 592 -16
WIRE 608 16 544 16
WIRE 608 16 608 -16
WIRE 640 16 608 16
WIRE 688 -64 688 -96
WIRE 688 160 592 160
WIRE 688 160 688 32
WIRE 848 160 688 160
WIRE 848 160 848 32
WIRE 1008 32 848 32
WIRE 1008 32 1008 0
WIRE 1008 48 1008 32
WIRE 1008 64 1008 48
WIRE 1008 192 1008 160
WIRE 1072 48 1008 48
WIRE 1072 144 1056 144
WIRE 1072 144 1072 48
WIRE 1104 -16 1056 -16
WIRE 1104 16 1104 -16
WIRE 1120 -16 1104 -16
WIRE 1120 144 1072 144
WIRE 1168 16 1104 16
WIRE 1168 16 1168 0
WIRE 1168 64 1168 16
WIRE 1168 176 1168 160
WIRE 1168 288 1168 256
WIRE 1408 16 1168 16
WIRE 1408 48 1072 48
IOPIN 544 -96 In
IOPIN 1408 16 Out
IOPIN 1408 48 Out
IOPIN 1168 288 In
SYMBOL nmos4 1120 64 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=2u w=40u
SYMATTR InstName M2
SYMATTR Value N_1u
SYMBOL pmos4 592 -96 M0
WINDOW 0 63 16 Left 0
WINDOW 123 56 100 Left 0
SYMATTR InstName MSU2
SYMATTR Value2 l=100u w=10u
SYMATTR Value P_1u
SYMBOL pmos4 1120 -96 R0
WINDOW 0 63 16 Left 0
WINDOW 123 56 100 Left 0
SYMATTR InstName M4
SYMATTR Value2 l=2u w=30u
SYMATTR Value P_1u
SYMBOL pmos4 1056 -96 M0
WINDOW 0 63 16 Left 0
WINDOW 123 56 100 Left 0
SYMATTR InstName M3
SYMATTR Value2 l=2u w=30u
SYMATTR Value P_1u
SYMBOL nmos4 592 80 M0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=2u w=10u
SYMATTR InstName MSU1
SYMATTR Value N_1u
SYMBOL res 1152 160 R0
SYMATTR InstName R1
SYMATTR Value 6.5k TC1=0.002
SYMBOL nmos4 1056 64 M0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M1
SYMATTR Value N_1u
SYMBOL nmos4 640 -64 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=1u w=10u
SYMATTR InstName MSU3
SYMATTR Value N_1u
FLAG 544 -48 VDD
FLAG 544 128 0
FLAG 688 -16 0
FLAG 688 -96 VDD
FLAG 1008 -48 VDD
FLAG 1008 -96 VDD
FLAG 1168 -48 VDD
FLAG 1168 -96 VDD
FLAG 1008 192 0
FLAG 1008 112 0
FLAG 1168 112 0
FLAG 544 -96 VDD
FLAG 544 176 0
FLAG 1408 16 Vbiasp
FLAG 1408 48 Vbiasn
FLAG 1168 288 GND
TEXT 552 48 Left 0 ;start-up ckt
TEXT 616 216 Left 0 !.lib cmosedu_models.txt
* Z:\home\khalils\Downloads\files\data\raw_asc\AD3531R.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD3531R.asy)
XU1 vDAC Vdd 0 vOUT AD3531R Gain=1 ;pnba Vdac)Vdd)GND)Vout
V1 Vdd 0 5
CLOAD vOUT 0 15n
Vdac vDAC 0 PWL(0 0.625 1u 0.625 +0.5u 1.875)
RLOAD vOUT 0 1k
.tran 10u
.lib AD3531R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 952 680
WIRE -512 -144 -800 -144
WIRE -240 -144 -512 -144
WIRE -800 -112 -800 -144
WIRE -240 -32 -240 -144
WIRE -800 0 -800 -32
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 112 112 0 112
WIRE 192 112 112 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 1u 0.625 +0.5u 1.875)
SYMBOL AD3531R -208 112 R0
SYMATTR InstName U1
SYMATTR SpiceLine Gain=1
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 15n
SYMBOL voltage -800 -128 R0
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -800 0 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -512 -144 Vdd
TEXT -160 312 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\339ff444f934_LTC6228.asc
* Generated by LTspice 26.0.1 for Windows.
* Differential to Single-Ended Converter
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6228.asy)
XU1 N005 N001 N002 +V -V +V LTC6228 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN_L
R7 0 N005 101
V1 +V 0 5
R6 N005 N007 150
R5 N007 N006 49.9
R1 N002 N001 200
R3 N001 N004 348
V2 -V 0 -5
R2 OUT N002 49.9
V3 N003 N006 AC 1
C2 N004 N007 18p
C1 N002 N001 18p
R4 N004 N003 49.9
.ac oct 8 100K 200Meg
.lib LTC6228.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4472 1028
WIRE -2592 -624 -2688 -624
WIRE -2464 -624 -2528 -624
WIRE -3136 -528 -3136 -544
WIRE -2976 -528 -2976 -544
WIRE -2688 -512 -2688 -624
WIRE -2608 -512 -2688 -512
WIRE -2464 -512 -2464 -624
WIRE -2464 -512 -2528 -512
WIRE -3136 -432 -3136 -448
WIRE -2976 -432 -2976 -448
WIRE -2592 -400 -2592 -416
WIRE -2960 -352 -3024 -352
WIRE -2848 -352 -2880 -352
WIRE -2816 -352 -2848 -352
WIRE -2688 -352 -2688 -512
WIRE -2688 -352 -2736 -352
WIRE -2624 -352 -2688 -352
WIRE -2464 -320 -2464 -512
WIRE -2464 -320 -2480 -320
WIRE -2448 -320 -2464 -320
WIRE -2352 -320 -2368 -320
WIRE -3024 -304 -3024 -352
WIRE -2848 -304 -2848 -352
WIRE -2624 -288 -2720 -288
WIRE -2592 -224 -2592 -240
WIRE -2544 -224 -2544 -240
WIRE -3024 -160 -3024 -224
WIRE -2960 -160 -3024 -160
WIRE -2848 -160 -2848 -240
WIRE -2848 -160 -2880 -160
WIRE -2816 -160 -2848 -160
WIRE -2720 -160 -2720 -288
WIRE -2720 -160 -2736 -160
WIRE -2688 -160 -2720 -160
WIRE -2576 -160 -2608 -160
WIRE -2576 -128 -2576 -160
SYMBOL res -2864 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 49.9
SYMBOL res -2512 -528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL LTC6228 -2592 -320 R0
SYMATTR InstName U1
SYMBOL res -2864 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 49.9
SYMBOL voltage -3136 -544 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -2352 -336 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 49.9
SYMBOL res -2720 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 348
SYMBOL res -2592 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 101
SYMBOL voltage -3024 -320 R0
WINDOW 123 19 102 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value ""
SYMBOL res -2720 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 150
SYMBOL voltage -2976 -544 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL cap -2864 -304 R0
SYMATTR InstName C2
SYMATTR Value 18p
SYMBOL cap -2528 -640 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 18p
FLAG -3136 -432 0
FLAG -2976 -432 0
FLAG -3136 -544 +V
FLAG -2976 -544 -V
FLAG -2352 -320 OUT
FLAG -2576 -128 0
FLAG -2592 -416 +V
FLAG -2544 -224 +V
FLAG -2592 -224 -V
TEXT -2424 -136 Left 2 !.ac oct 8 100K 200Meg
TEXT -2944 -624 Bottom 2 ;Differential to Single-Ended Converter
* Z:\home\khalils\Downloads\files\data\raw_asc\204563ade8a8_3048-12.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3048-12.asy)
V1 IN 0 3.3
C2 OUT N003 .1n
XU1 N002 IN 0 N003 OUT N001 IN N001 LT3048-12 ;pnba SW)Vin)GND)BYP)LDOOUT)LDOIN)EN)BSTOUT
C3 OUT 0 1 Rser=10m
L1 IN N002 10 Rser=.65
Rload OUT 0 413.8
C1 N001 0 4.7
.tran 1.5m startup
.lib LT3048-12.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 48 256 48
WIRE 464 48 416 48
WIRE 256 64 256 48
WIRE 464 64 464 48
WIRE 112 128 80 128
WIRE 416 128 416 48
WIRE 416 128 400 128
WIRE 464 144 464 128
WIRE 80 224 80 208
WIRE 80 224 -32 224
WIRE 112 224 80 224
WIRE 448 224 400 224
WIRE 528 224 448 224
WIRE 608 224 528 224
WIRE -32 240 -32 224
WIRE 448 240 448 224
WIRE 528 240 528 224
WIRE 608 240 608 224
WIRE 80 320 80 224
WIRE 112 320 80 320
WIRE 448 320 448 304
WIRE 448 320 400 320
WIRE -32 336 -32 320
WIRE 528 336 528 304
WIRE 608 336 608 320
WIRE 256 400 256 384
SYMBOL cap 448 64 R0
SYMATTR InstName C1
SYMATTR Value 4.7u
SYMBOL cap 512 240 R0
SYMATTR InstName C3
SYMATTR Value 1u
SYMATTR SpiceLine Rser=10m
SYMBOL ind 96 224 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value 10u
SYMATTR SpiceLine Rser=.65
SYMBOL res 592 224 R0
SYMATTR InstName Rload
SYMATTR Value 413.8
SYMBOL cap 432 240 R0
SYMATTR InstName C2
SYMATTR Value .1n
SYMBOL voltage -32 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL PowerProducts\\LT3048-12 256 224 R0
SYMATTR InstName U1
FLAG 256 400 0
FLAG -32 336 0
FLAG 464 144 0
FLAG 528 336 0
FLAG 608 336 0
FLAG -32 224 IN
FLAG 608 224 OUT
TEXT 432 384 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\24d77fc4e763_Wein_Bridge_OSC.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1413.asy)
D1 Vout N002 1N4148
R3 Vout N002 25k
C3 N003 0 18p
R5 Vout N005 10.2k
R4 N004 0 10.2k
R1 N003 0 47.5k
D2 N002 Vout 1N4148
R2 N002 N003 75k
C2 N005 N004 3n
XU1 N004 N003 N001 N006 Vout LT1413 ;pnba In+)In-)V+)V-)OUT
V2 0 N006 15
C1 N004 0 3n
V1 N001 0 15
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 20ms 0 1u uic
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1120 680
WIRE 272 -192 208 -192
WIRE 272 -176 272 -192
WIRE 512 -176 432 -176
WIRE 672 -176 592 -176
WIRE 272 -80 272 -96
WIRE 432 -80 432 -176
WIRE 512 -80 432 -80
WIRE 672 -80 672 -176
WIRE 672 -80 576 -80
WIRE 304 0 80 0
WIRE 432 0 432 -80
WIRE 432 0 384 0
WIRE 512 0 432 0
WIRE 672 0 672 -80
WIRE 672 0 576 0
WIRE 208 80 208 -192
WIRE -32 96 -96 96
WIRE 80 96 80 0
WIRE 80 96 48 96
WIRE 176 96 80 96
WIRE 672 112 672 0
WIRE 672 112 240 112
WIRE 864 112 672 112
WIRE 1008 112 864 112
WIRE 176 128 144 128
WIRE -96 144 -96 96
WIRE 80 144 80 96
WIRE 80 240 80 208
WIRE 144 256 144 128
WIRE 400 256 144 256
WIRE 528 256 400 256
WIRE 640 256 528 256
WIRE 752 256 704 256
WIRE 864 256 864 112
WIRE 864 256 832 256
WIRE 528 272 528 256
WIRE 400 288 400 256
WIRE 208 304 208 144
WIRE 400 384 400 352
WIRE 464 384 400 384
WIRE 528 384 528 352
WIRE 528 384 464 384
WIRE 208 400 208 384
WIRE 464 400 464 384
IOPIN 1008 112 Out
SYMBOL diode 576 -96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL diode 512 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL res 848 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10.2k
SYMBOL cap 384 288 R0
SYMATTR InstName C1
SYMATTR Value 3n
SYMBOL res 400 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 75k
SYMBOL OpAmps\\LT1413 208 48 R0
SYMATTR InstName U1
SYMBOL res 608 -192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 25k
SYMBOL res 512 256 R0
SYMATTR InstName R4
SYMATTR Value 10.2k
SYMBOL res 64 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 47.5k
SYMBOL cap 704 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 3n
SYMBOL cap 64 144 R0
SYMATTR InstName C3
SYMATTR Value 18p
SYMBOL voltage 208 400 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage 272 -192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
FLAG -96 144 0
FLAG 464 400 0
FLAG 1008 112 Vout
FLAG 208 400 0
FLAG 272 -80 0
FLAG 80 240 0
TEXT -188 232 Left 2 !.tran 0 20ms 0 1u uic
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3650-4.2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 12
L1 N001 N002 6.8
R1 N002 OUT 50m
C1 OUT 0 .2m
C2 N001 N003 1
D1 OUT N003 1N5817
D2 0 N001 MBRS340
XU1 IN IN IN NC_01 NC_02 0 NC_03 NC_04 OUT N002 N003 N001 0 LT3650-4.2 ;pnba Vin)CLP)_SHDN)_CHRG)_Fault)Timer)RNG/SS)NTC)BAT)Sense)Boost)SW)GND
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3650-4.2.asy)
.lib LT3650-4.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 400 -160 400 -176
WIRE 64 -64 -32 -64
WIRE 80 -64 64 -64
WIRE 400 -64 400 -96
WIRE 400 -64 368 -64
WIRE 432 -64 400 -64
WIRE 544 -64 512 -64
WIRE 560 -64 544 -64
WIRE 656 -64 640 -64
WIRE 720 -64 656 -64
WIRE -32 -48 -32 -64
WIRE 400 -48 400 -64
WIRE 720 -48 720 -64
WIRE 64 32 64 -64
WIRE 80 32 64 32
WIRE 400 32 400 16
WIRE 400 32 368 32
WIRE 448 32 400 32
WIRE 656 32 656 -64
WIRE 656 32 512 32
WIRE 720 32 720 16
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 80 128 64 128
WIRE 544 128 544 -64
WIRE 544 128 368 128
WIRE 656 224 656 32
WIRE 656 224 368 224
WIRE 80 416 64 416
WIRE 224 480 224 464
FLAG 224 480 0
FLAG 64 416 0
FLAG -32 48 0
FLAG 720 32 0
FLAG -32 -64 IN
FLAG 720 -64 OUT
FLAG 400 -176 0
SYMBOL voltage -32 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ind 416 -48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMBOL res 544 -48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 50m
SYMBOL cap 704 -48 R0
SYMATTR InstName C1
SYMATTR Value .2m
SYMBOL cap 384 -48 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL schottky 512 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL schottky 384 -160 R0
WINDOW 3 36 46 Left 2
SYMATTR Value MBRS340
SYMATTR InstName D2
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL PowerProducts\\LT3650-4.2 224 176 R0
SYMATTR InstName U1
TEXT 552 296 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4412HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4412HV.asy)
MQ1 N003 N004 N002 N002 FDC638P
D1 N001 N002 1N5819
R1 N002 N005 470K
R2 N002 0 100
V2 N001 0 PWL(0 0 1 7)
XU1 N003 0 0 N005 N004 N002 LTC4412 ;pnba Vin)GND)CTL)STAT)Gate)Sense
V1 N003 0 5
C1 N002 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1
.lib LTC4412.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2500 1716
WIRE 1760 1024 1360 1024
WIRE 2096 1024 1824 1024
WIRE 1360 1040 1360 1024
WIRE 1968 1104 1552 1104
WIRE 2096 1104 2096 1024
WIRE 2096 1104 2064 1104
WIRE 2144 1104 2096 1104
WIRE 2272 1104 2144 1104
WIRE 2368 1104 2272 1104
WIRE 2272 1120 2272 1104
WIRE 2368 1120 2368 1104
WIRE 1360 1136 1360 1120
WIRE 2144 1184 2144 1104
WIRE 1552 1216 1552 1104
WIRE 1680 1216 1552 1216
WIRE 2096 1216 2096 1104
WIRE 2096 1216 1936 1216
WIRE 2272 1216 2272 1184
WIRE 2368 1216 2368 1200
WIRE 1552 1232 1552 1216
WIRE 1680 1296 1664 1296
WIRE 2048 1296 2048 1152
WIRE 2048 1296 1936 1296
WIRE 1552 1328 1552 1312
WIRE 1680 1376 1664 1376
WIRE 2144 1376 2144 1264
WIRE 2144 1376 1936 1376
SYMBOL VOLTAGE 1552 1216 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2256 1120 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LTC4412HV 1808 1296 R0
SYMATTR InstName U1
SYMBOL res 2352 1104 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL voltage 1360 1024 R0
SYMATTR InstName V2
SYMATTR Value PWL(0 0 1 7)
SYMBOL PMOS 1968 1152 R270
WINDOW 0 90 48 VCenter 2
WINDOW 3 63 45 VCenter 2
SYMATTR InstName Q1
SYMATTR Value FDC638P
SYMBOL RES 2128 1168 R0
SYMATTR InstName R1
SYMATTR Value 470K
SYMBOL schottky 1760 1040 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5819
FLAG 1664 1376 0
FLAG 1664 1296 0
FLAG 2272 1216 0
FLAG 2368 1216 0
FLAG 1552 1328 0
FLAG 1360 1136 0
TEXT 2208 1368 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1507.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1507.asy)
C2 OUT 0 100 Rser=0.05
V1 IN 0 12
C6 N001 N003 .22
C1 OUT 0 1
R2 OUT N006 5.36K
R1 N006 0 4.99K
XU1 N001 IN N003 N002 MP_01 0 N006 N005 LT1507 top=1K bot=1T ;pnba Boost)Vin)SW)_SHDN))GND)FB)Vc
Rload OUT 0 5
R3 N005 N004 1K
C5 N004 0 25n
D1 0 N003 MBRS340
L1 N003 OUT 10 Rser=0.02 Rpar=5000
D2 IN N001 1N914
C4 N005 0 1n
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib LT1507.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2468 1192
WIRE 1312 640 1152 640
WIRE 1360 640 1312 640
WIRE 1472 640 1424 640
WIRE 1600 640 1472 640
WIRE 1152 656 1152 640
WIRE 1600 656 1600 640
WIRE 1312 704 1312 640
WIRE 1472 704 1472 640
WIRE 1152 752 1152 736
WIRE 1248 784 1232 784
WIRE 1600 784 1600 720
WIRE 1600 784 1536 784
WIRE 1664 784 1600 784
WIRE 1776 784 1744 784
WIRE 1904 784 1776 784
WIRE 2000 784 1904 784
WIRE 2096 784 2000 784
WIRE 1600 800 1600 784
WIRE 1904 800 1904 784
WIRE 2000 800 2000 784
WIRE 2096 800 2096 784
WIRE 1776 816 1776 784
WIRE 1600 880 1600 864
WIRE 1904 896 1904 864
WIRE 2000 896 2000 864
WIRE 2096 896 2096 880
WIRE 1072 912 1024 912
WIRE 1200 912 1152 912
WIRE 1248 912 1200 912
WIRE 1776 912 1776 896
WIRE 1776 912 1536 912
WIRE 1024 928 1024 912
WIRE 1200 928 1200 912
WIRE 1776 928 1776 912
WIRE 1024 1024 1024 992
WIRE 1200 1024 1200 992
WIRE 1392 1024 1392 992
WIRE 1776 1024 1776 1008
SYMBOL schottky 1584 864 M180
WINDOW 0 38 57 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMBOL POLCAP 1984 800 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 1760 800 R0
SYMATTR InstName R2
SYMATTR Value 5.36K
SYMBOL POWERPRODUCTS\\LT1507 1392 848 R0
SYMATTR InstName U1
SYMBOL diode 1360 624 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL cap 1008 928 R0
SYMATTR InstName C5
SYMATTR Value 25n
SYMBOL IND 1648 800 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL res 1168 896 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL cap 1184 928 R0
SYMATTR InstName C4
SYMATTR Value 1n
SYMBOL POLCAP 1888 800 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.05
SYMBOL RES 1760 912 R0
SYMATTR InstName R1
SYMATTR Value 4.99K
SYMBOL VOLTAGE 1152 640 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 2080 784 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL cap 1584 656 R0
SYMATTR InstName C6
SYMATTR Value .22
FLAG 1776 1024 0
FLAG 2000 896 0
FLAG 1600 880 0
FLAG 1200 1024 0
FLAG 2096 896 0
FLAG 1904 896 0
FLAG 1392 1024 0
FLAG 1152 752 0
FLAG 1024 1024 0
FLAG 2096 784 OUT
FLAG 1152 640 IN
TEXT 1904 984 Left 2 !.tran 1m startup