Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\78bb126095cf_tbjphillips_ICvsVBE_.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 N002 0 0 QBC548C/PLP
V2 N002 0 0
V1 N001 0 1.25
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.INCLUDE phil_bjt.lib
.dc V2 0 0.9 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 112 288 112
WIRE 288 128 288 112
WIRE 288 128 192 128
WIRE 128 176 32 176
SYMBOL voltage 32 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage 352 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 1.25
SYMBOL npn 128 128 R0
SYMATTR InstName Q1
SYMATTR Value QBC548C/PLP
FLAG 192 224 0
FLAG 352 192 0
FLAG 32 256 0
TEXT 0 24 Left 2 !.INCLUDE phil_bjt.lib
TEXT 0 280 Left 2 !.dc V2 0 0.9 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\09ce5669062e_1398.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1398.asy)
R2 N001 0 200
V2 -V 0 -5
V3 IN 0 SINE(0 1 10K)
R1 OUT N001 324
V1 +V 0 5
XU1 IN N001 +V -V OUT _SHDN LT1398 ;pnba In+)In-)V+)V-)OUT)SHDN
V4 _SHDN 0 PULSE(0 5 0 1u 1u .5m 1m)
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 48 64 32 64
WIRE 144 64 128 64
WIRE 224 64 144 64
WIRE 352 64 304 64
WIRE -208 112 -208 96
WIRE -80 112 -80 96
WIRE 208 128 208 112
WIRE 144 176 144 64
WIRE 176 176 144 176
WIRE 352 208 352 64
WIRE 352 208 320 208
WIRE 416 208 352 208
WIRE -208 224 -208 192
WIRE -80 224 -80 192
WIRE 176 240 16 240
WIRE 16 256 16 240
WIRE 208 304 208 288
WIRE 256 336 256 288
WIRE 400 336 256 336
WIRE 16 352 16 336
WIRE 400 352 400 336
WIRE 400 448 400 432
SYMBOL voltage 16 240 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage -80 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 320 48 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 324
SYMBOL res 144 48 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL voltage 400 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 5 0 1u 1u .5m 1m)
SYMBOL voltage -208 96 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL opamps\\LT1398 208 208 R0
SYMATTR InstName U1
FLAG -80 224 0
FLAG 208 112 +V
FLAG -80 96 +V
FLAG 208 304 -V
FLAG -208 224 0
FLAG -208 96 -V
FLAG 32 64 0
FLAG 16 352 0
FLAG 400 448 0
FLAG 16 240 IN
FLAG 416 208 OUT
FLAG 400 336 _SHDN
TEXT 166 402 Left 0 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1514-5.asc
* Generated by LTspice 26.0.1 for Windows.
C5 N003 N004 1
V2 IN 0 3
C1 OUT 0 100
Rload OUT 0 100
XU1 IN N001 N002 0 N004 N003 IN OUT LTC1514-5 ;pnba _SHDN)LBO)LBI)GND)C1-)C1+)Vin)Vout
.tran 5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1514-5.asy)
.lib LTC1514-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2792 2672
WIRE 2336 2272 1936 2272
WIRE 1936 2352 1936 2272
WIRE 1984 2352 1936 2352
WIRE 2528 2352 2272 2352
WIRE 2640 2352 2528 2352
WIRE 2528 2368 2528 2352
WIRE 2640 2368 2640 2352
WIRE 1984 2416 1952 2416
WIRE 2336 2416 2336 2272
WIRE 2336 2416 2272 2416
WIRE 2432 2416 2336 2416
WIRE 2432 2432 2432 2416
WIRE 2528 2464 2528 2432
WIRE 2640 2464 2640 2448
WIRE 1984 2480 1952 2480
WIRE 2336 2480 2272 2480
WIRE 1984 2544 1952 2544
WIRE 2336 2544 2272 2544
WIRE 2432 2544 2432 2512
WIRE 1952 2576 1952 2544
FLAG 2432 2544 0
FLAG 1952 2576 0
FLAG 2528 2464 0
FLAG 2640 2464 0
FLAG 2640 2352 OUT
FLAG 2432 2416 IN
SYMBOL cap 2320 2480 R0
SYMATTR InstName C5
SYMATTR Value 1
SYMBOL voltage 2432 2416 R0
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL cap 2512 2368 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMBOL res 2624 2352 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL PowerProducts\\LTC1514-5 2128 2448 R0
SYMATTR InstName U1
TEXT 2448 2608 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG801.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 1 input.\nPin Capacitance and Charge Injection are not included.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG801.asy)
XU1 +V IN S D 0 ADG801 ;pnba Vdd)IN)S)D)GND
V2 IN 0 PULSE(0 3 0 10n 10n 980n 2u)
V1 +V 0 5
R1 D 0 47
C1 D 0 33p
VS S 0 3
.tran 10u
.lib ADG801.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -368 -16 -400 -16
WIRE -272 -16 -288 -16
WIRE -240 -16 -272 -16
WIRE -32 -16 -48 -16
WIRE 0 -16 -32 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE -480 32 -480 16
WIRE 112 32 112 -16
WIRE -272 48 -368 48
WIRE -240 48 -272 48
WIRE -368 112 -368 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -480 128 -480 112
WIRE -144 176 -144 160
WIRE -368 272 -368 192
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 33p
SYMBOL voltage -480 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -272 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 47
SYMBOL voltage -368 96 R0
WINDOW 3 17 129 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 10n 10n 980n 2u)
SYMATTR InstName V2
SYMBOL ADG801 -144 32 R0
SYMATTR InstName U1
FLAG -480 128 0
FLAG -480 16 +V
FLAG -400 -16 0
FLAG -144 -112 +V
FLAG -144 176 0
FLAG -368 272 0
FLAG 0 112 0
FLAG 112 112 0
FLAG -272 -16 S
FLAG -272 48 IN
FLAG -32 -16 D
TEXT 72 224 Left 2 !.tran 10u
TEXT -592 -232 Left 2 ;Note:\nSwitch shown for a logic 1 input.\nPin Capacitance and Charge Injection are not included.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8061-8.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8061-8.2.asy)
XU1 N001 N001 N001 N002 N003 0 N005 N004 OUT IN OUT MP_01 0 LTM8061-8.2 ;pnba Vin)VinC/CLP)RUN)_CHRG)_Fault)TMR)RNG/SS)NTC)BAT)VinA)Bias))GND
C1 OUT 0 .1m
C3 N001 0 4.7
V1 IN 0 12
.tran 3m startup
.lib LTM8061-8.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 80 -64 -32 -64
WIRE 384 -64 368 -64
WIRE 496 -64 384 -64
WIRE -32 -48 -32 -64
WIRE 496 -48 496 -64
WIRE 80 32 64 32
WIRE 384 32 384 -64
WIRE 384 32 368 32
WIRE 496 32 496 16
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 80 128 64 128
WIRE 384 128 368 128
WIRE -16 224 -32 224
WIRE 64 224 64 128
WIRE 64 224 48 224
WIRE 80 224 64 224
WIRE 384 224 368 224
WIRE 80 320 64 320
WIRE 384 320 368 320
WIRE 80 416 64 416
WIRE 384 416 368 416
SYMBOL PowerProducts\\LTM8061-8.2 224 176 R0
SYMATTR InstName U1
SYMBOL cap 480 -48 R0
SYMATTR InstName C1
SYMATTR Value .1m
SYMBOL voltage -32 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 48 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 4.7
FLAG 64 416 0
FLAG -32 48 0
FLAG 496 32 0
FLAG -32 -64 IN
FLAG 496 -64 OUT
FLAG -32 224 0
FLAG 64 320 0
TEXT 488 416 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\67d700f8ac95_Diode_Clipping_Circuit.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 SINE(0 15 50 0 0)
R1 N002 N001 2860
D1 N002 0 1N914
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 0 -64 0
WIRE 224 0 128 0
WIRE 256 0 224 0
WIRE -64 32 -64 0
WIRE 224 32 224 0
WIRE -64 128 -64 112
WIRE 224 128 224 96
WIRE 224 128 -64 128
WIRE 256 128 224 128
WIRE -64 144 -64 128
SYMBOL res 144 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2860
SYMBOL voltage -64 16 R0
WINDOW 0 24 16 Left 1
WINDOW 3 33 86 Top 1
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 15 50 0 0)
SYMBOL diode 208 32 R0
WINDOW 0 36 1 VBottom 0
WINDOW 3 49 54 Top 1
SYMATTR InstName D1
SYMATTR Value 1N914
FLAG -64 144 0
TEXT 184 176 Left 2 !.tran 100ms
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP161.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP161.asy)
V1 IN 0 5
R2 N002 0 100K
R1 OUT N002 230K
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
XU1 IN 0 N001 OUT N002 ADP16xad ;pnba Vin)GND)En)Vout)Adj
Rload OUT 0 330
C1 OUT 0 1
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 432 96 352 96
WIRE 544 96 432 96
WIRE 624 96 544 96
WIRE -64 112 -64 96
WIRE 432 112 432 96
WIRE 544 112 544 96
WIRE 624 112 624 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 432 208 432 192
WIRE 432 208 352 208
WIRE 544 208 544 176
WIRE 624 208 624 192
WIRE 16 224 16 208
WIRE 432 224 432 208
WIRE 256 272 256 256
WIRE 16 320 16 304
WIRE 432 320 432 304
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 608 96 R0
SYMATTR InstName Rload
SYMATTR Value 330
SYMBOL cap 528 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 416 96 R0
SYMATTR InstName R1
SYMATTR Value 230K
SYMBOL res 416 208 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL ADP161 256 208 R0
SYMATTR InstName U1
FLAG -64 208 0
FLAG 256 272 0
FLAG 432 320 0
FLAG 544 208 0
FLAG 624 208 0
FLAG 624 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\11d14571c72b_AD8546.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8546.asy)
Vin IN 0 SINE(0 .1 10K)
R1 N001 0 1K
V2 -V 0 -5
R2 OUT N001 10K
XU1 IN N001 +V -V OUT AD8546 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1336 700
WIRE 448 -1200 432 -1200
WIRE 544 -1200 528 -1200
WIRE 560 -1200 544 -1200
WIRE 656 -1200 640 -1200
WIRE 208 -1104 208 -1120
WIRE 304 -1104 304 -1120
WIRE 544 -1088 544 -1200
WIRE 560 -1088 544 -1088
WIRE 656 -1072 656 -1200
WIRE 656 -1072 624 -1072
WIRE 736 -1072 656 -1072
WIRE 560 -1056 448 -1056
WIRE 448 -1040 448 -1056
WIRE 208 -1008 208 -1024
WIRE 304 -1008 304 -1024
WIRE 448 -944 448 -960
SYMBOL res 656 -1216 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 544 -1216 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL Opamps\\AD8546 592 -1136 R0
SYMATTR InstName U1
SYMBOL voltage 304 -1120 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 208 -1120 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 448 -1056 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 .1 10K)
FLAG 448 -944 0
FLAG 736 -1072 OUT
FLAG 448 -1056 IN
FLAG 592 -1104 +V
FLAG 592 -1040 -V
FLAG 432 -1200 0
FLAG 208 -1120 +V
FLAG 208 -1008 0
FLAG 304 -1120 -V
FLAG 304 -1008 0
TEXT 688 -912 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\f6cc17f2664d_Balancer_voltage.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
+ Nfs=1000000000 Eta=0 Level=3 L=1e-4 W=1e-4
+ Gamma=0 Phi=0.6 Is=1e-24 Js=0 Pb=0.8 Cj=0
+ Cjsw=0 Cgso=0 Cgdo=0 Cgbo=0 Tox=1e-07 Xj=0
+ U0=600 Vmax=3000)
R1 N001 N002 4.7k
C4 Vd 0 100n
V1 N001 N003 PWL(0 2.5 100m 2.5 400m 4.5 480m 4.5 490m 2.5 600m 2.5 900m 4.5 1 4.5) AC 1
R4 Vd 0 4.7k
R3 N001 Vs 4.7k
C2 N002 N003 100n
M1 Vd Vg Vs Vs P-MOS
V2 N003 0 PWL(0 0 510m 0 520m 20 1 20)
C1 N001 N002 00n
R2 N002 N003 22k
XU1 N002 Vs N001 N003 Vg level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.ac dec 100 1 1meg
.MODEL P-MOS PMOS(Vto=-1.66 Kp=1.3807e-01
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 680
WIRE 128 -16 -80 -16
WIRE 224 -16 128 -16
WIRE 320 -16 224 -16
WIRE 464 -16 320 -16
WIRE 128 0 128 -16
WIRE 224 0 224 -16
WIRE 464 0 464 -16
WIRE 400 96 256 96
WIRE 464 96 464 80
WIRE 464 96 400 96
WIRE -80 112 -80 -16
WIRE 320 112 320 -16
WIRE 256 128 256 96
WIRE 288 128 256 128
WIRE 464 128 464 96
WIRE 400 144 352 144
WIRE 416 144 400 144
WIRE 128 160 128 80
WIRE 224 160 224 64
WIRE 224 160 128 160
WIRE 288 160 224 160
WIRE 128 176 128 160
WIRE 224 176 224 160
WIRE 464 256 464 224
WIRE -80 272 -80 192
WIRE 128 272 128 256
WIRE 128 272 -80 272
WIRE 224 272 224 240
WIRE 224 272 128 272
WIRE 320 272 320 176
WIRE 320 272 224 272
WIRE -80 352 -80 272
WIRE 464 384 464 256
WIRE 576 384 464 384
WIRE 464 400 464 384
WIRE 576 416 576 384
WIRE -80 496 -80 432
WIRE 464 496 464 480
WIRE 576 496 576 480
SYMBOL cap 560 416 R0
SYMATTR InstName C4
SYMATTR Value 100n
SYMBOL res 448 -16 R0
SYMATTR InstName R3
SYMATTR Value 4.7k
SYMBOL voltage -80 96 R0
WINDOW 3 -444 62 Invisible 2
WINDOW 39 0 0 Left 0
SYMATTR Value PWL(0 2.5 100m 2.5 400m 4.5 480m 4.5 490m 2.5 600m 2.5 900m 4.5 1 4.5)
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL res 112 160 R0
SYMATTR InstName R2
SYMATTR Value 22k
SYMBOL voltage -80 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 0 510m 0 520m 20 1 20)
SYMBOL res 448 384 R0
SYMATTR InstName R4
SYMATTR Value 4.7k
SYMBOL OpAmps\\UniversalOpAmp2 320 144 R0
SYMATTR InstName U1
SYMBOL cap 208 0 R0
SYMATTR InstName C1
SYMATTR Value 00n
SYMBOL res 112 -16 R0
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL cap 208 176 R0
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL pmos 416 224 M180
SYMATTR InstName M1
SYMATTR Value P-MOS
FLAG 464 496 0
FLAG -80 496 0
FLAG 400 144 Vg
FLAG 400 96 Vs
FLAG 464 256 Vd
FLAG 576 496 0
TEXT -112 520 Left 2 !.ac dec 100 1 1meg
TEXT -896 152 Left 2 !.MODEL P-MOS PMOS(Vto=-1.66 Kp=1.3807e-01\n+ Nfs=1000000000 Eta=0 Level=3 L=1e-4 W=1e-4 \n+ Gamma=0 Phi=0.6 Is=1e-24 Js=0 Pb=0.8  Cj=0 \n+ Cjsw=0 Cgso=0 Cgdo=0 Cgbo=0 Tox=1e-07 Xj=0\n+ U0=600 Vmax=3000)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4930-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4930-1.asy)
Vref N005 0 0.9
RG3 OUTn N001 301
RG1 N001 N002 301
XU1 N001 N004 NC_01 NC_02 VS 0 N003 OUTp OUTn VS ADA4930-1 ;pnba 1)2)3)4)5)6)7)8)9)10
Vocm N003 0 0.9
Vcc VS 0 5
RG4 OUTp N004 301
RG2 N004 N005 301
Vin N002 N005 SINE(0 10m 1Meg)
R1 OUTn OUTp 200
.tran 2u
.lib ADA4930-1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1052 904
WIRE 128 -96 -160 -96
WIRE 240 -96 208 -96
WIRE -16 -16 -32 -16
WIRE 80 -16 64 -16
WIRE -272 64 -384 64
WIRE -160 64 -160 -96
WIRE -160 64 -192 64
WIRE -32 64 -32 -16
WIRE 80 80 0 80
WIRE 176 80 160 80
WIRE -32 96 -32 64
WIRE 0 96 0 80
WIRE -384 112 -384 64
WIRE -160 144 -160 64
WIRE -64 144 -160 144
WIRE 240 160 240 -96
WIRE 240 160 96 160
WIRE 304 160 240 160
WIRE 384 160 304 160
WIRE 384 192 384 160
WIRE -64 208 -160 208
WIRE 240 224 96 224
WIRE -384 272 -384 192
WIRE -272 272 -384 272
WIRE -160 272 -160 208
WIRE -160 272 -192 272
WIRE 64 288 0 288
WIRE -384 304 -384 272
WIRE -32 304 -32 288
WIRE 240 304 240 224
WIRE 304 304 240 304
WIRE 384 304 384 272
WIRE 384 304 304 304
WIRE -384 400 -384 384
WIRE -160 416 -160 272
WIRE 128 416 -160 416
WIRE 240 416 240 304
WIRE 240 416 208 416
SYMBOL voltage 64 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vocm
SYMATTR Value 0.9
SYMBOL res -176 256 R90
WINDOW 0 -2 58 VBottom 2
WINDOW 3 41 57 VTop 2
SYMATTR InstName RG2
SYMATTR Value 301
SYMBOL res -176 48 R90
WINDOW 0 -3 55 VBottom 2
WINDOW 3 36 55 VTop 2
SYMATTR InstName RG1
SYMATTR Value 301
SYMBOL ADA4930-1 -32 192 R0
SYMATTR InstName U1
SYMBOL res 224 400 R90
WINDOW 0 -4 53 VBottom 2
WINDOW 3 35 56 VTop 2
SYMATTR InstName RG4
SYMATTR Value 301
SYMBOL voltage -384 288 R0
WINDOW 0 86 39 Right 2
WINDOW 3 43 68 Left 2
WINDOW 123 -124 -14 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName Vref
SYMATTR Value 0.9
SYMBOL voltage -384 96 R0
WINDOW 0 75 36 Right 2
WINDOW 3 43 69 Left 2
WINDOW 123 -124 -14 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value SINE(0 10m 1Meg)
SYMBOL res 368 176 R0
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL res 224 -112 R90
WINDOW 0 -1 53 VBottom 2
WINDOW 3 38 55 VTop 2
SYMATTR InstName RG3
SYMATTR Value 301
SYMBOL voltage -32 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vcc
SYMATTR Value 5
FLAG 80 -16 0
FLAG 176 80 0
FLAG 304 160 OUTn
FLAG 304 304 OUTp
FLAG -32 64 VS
FLAG -384 400 0
FLAG 64 288 VS
FLAG -32 304 0
TEXT -418 468 Left 2 !.tran 2u
* Z:\tmp\asc_dec_bjh7r6w2\0d060f09a934_MRF9411_AC_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 o i N004 0 MRF9411
Co N003 o 10n
L2 N002 o 1m
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -80 -96 -144 -96
WIRE 64 -96 0 -96
WIRE 176 -96 64 -96
WIRE 64 -80 64 -96
WIRE 176 -32 176 -96
WIRE -144 0 -144 -96
WIRE 64 16 64 0
WIRE 128 64 64 64
WIRE 176 64 176 48
WIRE 176 64 128 64
WIRE 256 64 176 64
WIRE 448 64 320 64
WIRE 448 80 448 64
WIRE -144 112 -144 80
WIRE -144 112 -208 112
WIRE -64 112 -144 112
WIRE 0 112 -64 112
WIRE 64 176 64 160
WIRE 144 176 64 176
WIRE 64 208 64 176
WIRE 448 208 448 160
WIRE 144 224 144 176
SYMBOL npn 0 64 R0
SYMATTR InstName Q1
SYMATTR Value MRF9411
SYMBOL cap 320 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName Co
SYMATTR Value 10n
SYMBOL ind 160 -48 R0
SYMATTR InstName L2
SYMATTR Value 1m
FLAG 64 16 0
FLAG 448 208 0
FLAG -64 112 i
FLAG 128 64 o
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8618A-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8618A-3.3.asy)
C4 N004 0 10n
V1 IN 0 12
R2 N005 0 110K
Rload OUT 0 33
C3 N003 0 1
R3 OUT N006 100k
XU1 N001 N002 OUT N003 N005 OUT N004 N006 IN IN 0 LT8618A-3.3 ;pnba BST)SW)BIAS)INTVcc)RT)OUT)TR/SS)PG)EN/UV)VIN)GND
C1 OUT 0 22 Rser=2m
C2 N001 N002 47n
L1 N002 OUT 120 Rser=0.8
.tran 10m startup
.lib LT8618A-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1748 780
WIRE -80 48 -144 48
WIRE -48 48 -80 48
WIRE 16 48 -48 48
WIRE 368 48 304 48
WIRE -144 64 -144 48
WIRE 368 64 368 48
WIRE -48 144 -48 48
WIRE 16 144 -48 144
WIRE 368 144 368 128
WIRE 368 144 304 144
WIRE 464 144 368 144
WIRE 576 144 544 144
WIRE 640 144 576 144
WIRE 752 144 640 144
WIRE 784 144 752 144
WIRE -144 160 -144 144
WIRE 640 160 640 144
WIRE 784 160 784 144
WIRE 16 240 -48 240
WIRE 576 240 576 144
WIRE 576 240 304 240
WIRE -48 256 -48 240
WIRE 640 256 640 224
WIRE 784 256 784 240
WIRE -48 336 -48 320
WIRE 576 336 576 240
WIRE 576 336 304 336
WIRE 16 432 -144 432
WIRE -144 448 -144 432
WIRE -144 528 -144 512
WIRE 16 528 -48 528
WIRE 336 528 304 528
WIRE 576 528 576 336
WIRE 576 528 416 528
WIRE -48 544 -48 528
WIRE 160 592 160 576
WIRE -48 640 -48 624
SYMBOL cap -160 448 R0
SYMATTR InstName C4
SYMATTR Value 10n
SYMBOL res -64 528 R0
SYMATTR InstName R2
SYMATTR Value 110K
SYMBOL voltage -144 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap -64 256 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 768 144 R0
SYMATTR InstName Rload
SYMATTR Value 33
SYMBOL ind 448 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 120
SYMATTR SpiceLine Rser=0.8
SYMBOL res 432 512 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL LT8618A-3.3 160 240 R0
SYMATTR InstName U1
SYMBOL cap 624 160 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine Rser=2m
SYMBOL cap 352 64 R0
SYMATTR InstName C2
SYMATTR Value 47n
FLAG 640 256 0
FLAG 752 144 OUT
FLAG -48 640 0
FLAG -144 160 0
FLAG 160 592 0
FLAG 784 256 0
FLAG -48 336 0
FLAG -80 48 IN
FLAG -144 528 0
TEXT 272 632 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4693.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4693.asy)
XU1 NC_01 NC_02 OUT IN IN N002 N001 0 NC_03 IN 0 LTM4693 ;pnba SW1)SW2)Vout)Run)SS)Comp)FB)GND)Rt)Vin)Mode
C5 N003 0 2.2n
C6 OUT 0 22 x3 Rser=1m
Rload OUT 0 1
R1 N001 0 26.4k
R2 N003 N002 10k
C1 OUT N001 100p
V1 IN 0 2.8
.tran 2.5m startup
.lib LTM4693.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1736 680
WIRE 48 16 -48 16
WIRE 64 16 48 16
WIRE 464 16 384 16
WIRE 560 16 464 16
WIRE 656 16 560 16
WIRE -48 32 -48 16
WIRE 464 32 464 16
WIRE 656 32 656 16
WIRE 560 48 560 16
WIRE 48 112 48 16
WIRE 64 112 48 112
WIRE 464 112 464 96
WIRE 464 112 384 112
WIRE -48 128 -48 112
WIRE 464 128 464 112
WIRE 560 144 560 112
WIRE 656 144 656 112
WIRE 656 144 560 144
WIRE 656 160 656 144
WIRE 48 208 48 112
WIRE 64 208 48 208
WIRE 464 224 464 208
WIRE 64 304 48 304
WIRE 416 304 384 304
WIRE 512 304 496 304
WIRE 592 304 576 304
WIRE 224 384 224 368
SYMBOL LTM4693 224 144 R0
WINDOW 3 1 71 Center 2
SYMATTR InstName U1
SYMBOL res 512 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 448 112 R0
SYMATTR InstName R1
SYMATTR Value 26.4k
SYMBOL cap 544 48 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 x3
SYMATTR InstName C6
SYMATTR Value 22
SYMATTR SpiceLine Rser=1m
SYMBOL voltage -48 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.8
SYMBOL cap 448 32 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL res 640 16 R0
SYMATTR InstName Rload
SYMATTR Value 1
SYMBOL cap 512 320 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
WINDOW 39 -21 32 VBottom 2
SYMATTR InstName C5
SYMATTR Value 2.2n
FLAG 224 384 0
FLAG -48 128 0
FLAG 48 304 0
FLAG 656 160 0
FLAG -48 16 IN
FLAG 656 16 OUT
FLAG 592 304 0
FLAG 464 224 0
TEXT 432 384 Left 2 !.tran 2.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3be8c8bec459_E3.asc
* Generated by LTspice 26.0.1 for Windows.
I1 0 N002 1m
Q1 N001 N002 0 0 2N2222
V1 N001 0 1
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 10 0.1 i1 0 20m 0.002m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 304 80 304
WIRE 416 400 416 304
WIRE 80 416 80 304
WIRE 352 448 240 448
WIRE 240 496 240 448
WIRE 80 608 80 496
WIRE 240 608 240 576
WIRE 240 608 80 608
WIRE 416 608 416 496
WIRE 416 608 240 608
WIRE 240 640 240 608
SYMBOL voltage 80 400 R0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL current 240 576 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName I1
SYMATTR Value 1m
SYMBOL npn 352 400 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
FLAG 240 640 0
TEXT -24 176 Left 2 !.dc V1 0 10 0.1 i1 0 20m 0.002m
* Z:\tmp\asc_dec_bjh7r6w2\16ad8f61cd3b_NOR_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
M4 Vdd N001 N002 Vdd PMOS l=0.6u w=6u
V1 Vdd N003 5v
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 964 680
WIRE 384 -320 384 -384
WIRE 384 -320 192 -320
WIRE 560 -320 384 -320
WIRE 192 -240 192 -320
WIRE 560 -224 560 -320
WIRE 384 -160 240 -160
WIRE 192 -80 192 -144
WIRE 560 -32 560 -144
WIRE 384 176 384 -160
SYMBOL pmos4 240 -240 M0
WINDOW 0 56 13 Left 2
WINDOW 3 56 83 Left 2
SYMATTR InstName M4
SYMATTR Value2 l=0.6u w=6u
SYMBOL voltage 560 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5v
FLAG 384 -384 Vdd
FLAG 192 -192 Vdd