* Z:\home\khalils\Downloads\files\data\raw_asc\f6ef0bd70846_FF.asc
* Generated by LTspice 26.0.1 for Windows.
M7 VDD N001 ~Q VDD PMOS l=200n w=1u
M5 N003 N004 N005 0 NMOS l=300n w=800n
M10 VDD ~R ~Q VDD PMOS l=200n w=1u
M8 N006 N001 0 0 NMOS l=300n w=800n
M1 N004 D 0 0 NMOS l=300n w=800n
M6 VDD CLK N003 VDD PMOS l=200n w=1u
M9 ~Q CLK N006 0 NMOS l=300n w=800n
M3 VDD D N002 VDD PMOS l=200n w=1u
M12 Q ~Q 0 0 NMOS l=300n w=800n
M11 VDD ~Q Q VDD PMOS l=200n w=1u
M2 N002 CLK N004 VDD PMOS l=200n w=1u
M4 N005 CLK 0 0 NMOS l=300n w=800n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1728 680
WIRE 48 -272 48 -304
WIRE 160 -272 48 -272
WIRE 736 -256 736 -304
WIRE 816 -256 736 -256
WIRE 1120 -256 1120 -304
WIRE 1264 -256 1120 -256
WIRE 1472 -256 1472 -288
WIRE 1552 -256 1472 -256
WIRE 384 -240 384 -304
WIRE 480 -240 384 -240
WIRE 48 -208 48 -272
WIRE 384 -208 384 -240
WIRE 736 -208 736 -256
WIRE 1120 -208 1120 -256
WIRE 1472 -208 1472 -256
WIRE 160 -160 160 -272
WIRE 160 -160 48 -160
WIRE 480 -160 480 -240
WIRE 480 -160 384 -160
WIRE 816 -160 816 -256
WIRE 816 -160 736 -160
WIRE 1264 -160 1264 -256
WIRE 1264 -160 1120 -160
WIRE 1552 -160 1552 -256
WIRE 1552 -160 1472 -160
WIRE -240 -128 -384 -128
WIRE 0 -128 -240 -128
WIRE 336 -128 256 -128
WIRE 688 -128 592 -128
WIRE 1072 -128 1008 -128
WIRE 1424 -128 1312 -128
WIRE 736 -48 736 -112
WIRE 1120 -48 1120 -112
WIRE 1120 -48 736 -48
WIRE 1312 -48 1312 -128
WIRE 1312 -48 1120 -48
WIRE 1472 -48 1472 -112
WIRE 1648 -48 1472 -48
WIRE 48 -16 48 -112
WIRE 384 -16 384 -112
WIRE 736 -16 736 -48
WIRE 1472 -16 1472 -48
WIRE 160 32 160 -160
WIRE 160 32 48 32
WIRE 512 32 384 32
WIRE 848 32 736 32
WIRE 1584 32 1472 32
WIRE 512 48 512 32
WIRE 0 64 -384 64
WIRE 336 64 176 64
WIRE 1312 64 1312 -48
WIRE 1424 64 1312 64
WIRE 1472 128 1472 80
WIRE 1584 128 1584 32
WIRE 48 144 48 80
WIRE 176 144 176 64
WIRE 176 144 48 144
WIRE 48 160 48 144
WIRE 384 160 384 80
WIRE 736 160 736 80
WIRE 160 208 48 208
WIRE 512 208 384 208
WIRE 848 208 848 32
WIRE 848 208 736 208
WIRE -240 240 -240 -128
WIRE 0 240 -240 240
WIRE 336 240 288 240
WIRE 592 240 592 -128
WIRE 688 240 592 240
WIRE 1120 272 1120 -48
WIRE 1232 272 1120 272
WIRE 48 288 48 256
WIRE 160 288 160 208
WIRE 384 288 384 256
WIRE 512 288 512 208
WIRE 736 288 736 256
WIRE 848 288 848 208
IOPIN -384 -128 In
IOPIN 48 -304 In
IOPIN 384 -304 In
IOPIN -384 64 In
IOPIN 288 240 In
IOPIN 688 64 In
IOPIN 256 -128 In
IOPIN 736 -304 In
IOPIN 1008 -128 In
IOPIN 1120 -304 In
IOPIN 1648 -48 Out
IOPIN 1232 272 Out
IOPIN 1472 -288 In
SYMBOL nmos4 688 160 R0
SYMATTR InstName M8
SYMATTR Value2 l=300n w=800n
SYMBOL pmos4 0 -16 R0
SYMATTR InstName M2
SYMATTR Value2 l=200n w=1u
SYMBOL nmos4 336 -16 R0
SYMATTR InstName M5
SYMATTR Value2 l=300n w=800n
SYMBOL pmos4 1424 -208 R0
SYMATTR InstName M11
SYMATTR Value2 l=200n w=1u
SYMBOL nmos4 336 160 R0
SYMATTR InstName M4
SYMATTR Value2 l=300n w=800n
SYMBOL pmos4 1072 -208 R0
SYMATTR InstName M10
SYMATTR Value2 l=200n w=1u
SYMBOL pmos4 0 -208 R0
SYMATTR InstName M3
SYMATTR Value2 l=200n w=1u
SYMBOL nmos4 688 -16 R0
SYMATTR InstName M9
SYMATTR Value2 l=300n w=800n
SYMBOL nmos4 0 160 R0
SYMATTR InstName M1
SYMATTR Value2 l=300n w=800n
SYMBOL pmos4 688 -208 R0
SYMATTR InstName M7
SYMATTR Value2 l=200n w=1u
SYMBOL nmos4 1424 -16 R0
SYMATTR InstName M12
SYMATTR Value2 l=300n w=800n
SYMBOL pmos4 336 -208 R0
SYMATTR InstName M6
SYMATTR Value2 l=200n w=1u
FLAG -384 -128 D
FLAG 48 -304 VDD
FLAG 384 -304 VDD
FLAG -384 64 CLK
FLAG 288 240 CLK
FLAG 688 64 CLK
FLAG 256 -128 CLK
FLAG 512 288 0
FLAG 512 48 0
FLAG 736 -304 VDD
FLAG 848 288 0
FLAG 736 288 0
FLAG 48 288 0
FLAG 160 288 0
FLAG 1008 -128 ~R
FLAG 1120 -304 VDD
FLAG 1472 128 0
FLAG 1584 128 0
FLAG 1648 -48 Q
FLAG 1232 272 ~Q
FLAG 1472 -288 VDD
FLAG 384 288 0