Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7102-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7102-5.0.asy)
V1 IN 0 6
R1 OUT N001 100k
C1 OUT 0 2.2 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADP7102 Vref=5 ;pnba Vin)Sense)EN)PG)Vout)GND
Rload OUT 0 25
.tran 3m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -16 48 -16 32
WIRE 384 128 352 128
WIRE 464 128 464 32
WIRE 464 128 384 128
WIRE 560 128 464 128
WIRE -16 144 -16 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 384 224 384 128
WIRE 384 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
SYMBOL ADP7102-5.0 224 128 R0
SYMATTR InstName U1
SYMBOL voltage -16 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
FLAG 224 304 0
FLAG -16 144 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -16 32 IN
FLAG 560 128 OUT
TEXT 432 296 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0c8c9fe3f4ad_08H-06.asc
* Generated by LTspice 26.0.1 for Windows.
V1 V+ 0 5
V2 Vin+ 0 SINE(2.5 3 5k)
Q1 V+ Vin+ N003 0 2N3904
Q2 N001 Vin- N003 0 2N3904
Q3 N003 N004 0 0 2N3904
Q4 N004 N004 0 0 2N3904
R1 V+ N004 10k
R2 V+ Vin+ 100k
R3 Vin+ 0 100k
R4 Vin- 0 100k
R5 V+ Vin- 100k
R6 V+ N001 100k
R7 N002 0 10k
R8 P001 N002 1k
R9 Vout V+ 10k
Q5 Vout P001 0 0 2N3904
Q6 N002 N001 V+ 0 2N3906
V3 Vin- 0 2.5
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 1 .999 0.001
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1384 680
WIRE 640 -176 640 -192
WIRE 992 -128 992 -192
WIRE 1216 -128 1216 -192
WIRE 640 -80 640 -96
WIRE 928 -80 640 -80
WIRE 1312 -48 1216 -48
WIRE 1216 -32 1216 -48
WIRE 992 16 992 -32
WIRE 1072 16 992 16
WIRE 288 32 288 -192
WIRE 640 32 640 -80
WIRE 992 48 992 16
WIRE 112 80 64 80
WIRE 128 80 128 64
WIRE 128 80 112 80
WIRE 224 80 128 80
WIRE 736 80 704 80
WIRE 752 80 752 64
WIRE 752 80 736 80
WIRE 816 80 752 80
WIRE 112 96 112 80
WIRE 736 96 736 80
WIRE 1216 128 1216 64
WIRE 288 160 288 128
WIRE 448 160 288 160
WIRE 640 160 640 128
WIRE 640 160 448 160
WIRE 384 336 320 336
WIRE 320 352 320 336
WIRE 448 352 448 160
WIRE 384 400 384 336
WIRE 320 480 320 448
WIRE 448 480 448 448
FLAG 144 -304 0
FLAG 432 -304 0
FLAG 432 -384 Vin+
FLAG 144 -384 V+
FLAG 320 256 V+
FLAG 992 128 0
FLAG 736 176 0
FLAG 112 176 0
FLAG 320 480 0
FLAG 448 480 0
FLAG 128 -16 V+
FLAG 288 -192 V+
FLAG 640 -192 V+
FLAG 992 -192 V+
FLAG 1216 -192 V+
FLAG 752 -16 V+
FLAG 1216 128 0
FLAG 64 80 Vin+
FLAG 816 80 Vin-
FLAG 304 -304 0
FLAG 304 -384 Vin-
FLAG 1312 -48 Vout
SYMBOL voltage 144 -400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 432 -400 R0
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(2.5 3 5k)
SYMBOL npn 224 32 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL npn 704 32 M0
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL npn 384 352 R0
SYMATTR InstName Q3
SYMATTR Value 2N3904
SYMBOL npn 384 352 M0
SYMATTR InstName Q4
SYMATTR Value 2N3904
SYMBOL res 304 240 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 112 -32 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res 96 80 R0
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 720 80 R0
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL res 736 -32 R0
SYMATTR InstName R5
SYMATTR Value 100k
SYMBOL res 624 -192 R0
SYMATTR InstName R6
SYMATTR Value 100k
SYMBOL res 976 32 R0
SYMATTR InstName R7
SYMATTR Value 10k
SYMBOL res 1168 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R8
SYMATTR Value 1k
SYMBOL res 1232 -32 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R9
SYMATTR Value 10k
SYMBOL npn 1152 -32 R0
SYMATTR InstName Q5
SYMATTR Value 2N3904
SYMBOL pnp 928 -32 M180
SYMATTR InstName Q6
SYMATTR Value 2N3906
SYMBOL voltage 304 -400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 2.5
TEXT 456 -272 Left 2 !.tran 0 1 .999 0.001
* Z:\tmp\asc_dec_bjh7r6w2\1409eda8be43_SSR_simulation_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R5 N007 N009 39
C1 N006 N008 120pF
R3 N002 N001 40
XU2 N002 N005 N008 Q601E3 ;pnba MT2)G)MT1
R4 N002 N004 210k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2192 680
WIRE 1056 -128 992 -128
WIRE 1216 -128 1136 -128
WIRE 1456 -128 1216 -128
WIRE 1696 -128 1456 -128
WIRE 1968 -128 1696 -128
WIRE 1696 -112 1696 -128
WIRE 1216 -80 1216 -128
WIRE 992 0 992 -128
WIRE 992 0 880 0
WIRE 1456 0 1456 -128
WIRE 1968 0 1968 -32
WIRE 1696 64 1696 -32
WIRE 1408 80 1408 64
WIRE 1408 80 880 80
WIRE 1216 96 1216 0
WIRE 1968 112 1968 80
WIRE 1216 208 1216 160
WIRE 1456 208 1456 64
WIRE 1456 208 1216 208
WIRE 1968 208 1968 192
WIRE 1968 208 1696 208
SYMBOL res 1952 96 R0
SYMATTR InstName R5
SYMATTR Value 39
SYMBOL cap 1200 96 R0
SYMATTR InstName C1
SYMATTR Value 120pF
SYMBOL res 1152 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 40
SYMBOL Misc\\TRIAC 1424 0 R0
SYMATTR InstName U2
SYMATTR Value Q601E3
SYMBOL res 1680 -128 R0
SYMATTR InstName R4
SYMATTR Value 210k
* Z:\home\khalils\Downloads\files\data\raw_asc\phaseshift.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
C4 N002 OUT .01
R4 N003 0 10K
V1 N001 0 12
C2 N004 N003 .01
C3 N003 N002 .01
C1 N005 0 1
R6 N005 0 1K
Q1 OUT N004 N005 0 2N2222
R5 N002 0 10K
R3 N004 0 10K
R1 N001 OUT 10K
R2 N001 N004 100K
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 100m startup
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2252 2552
WIRE 1856 2032 1696 2032
WIRE 2064 2032 1856 2032
WIRE 1696 2048 1696 2032
WIRE 1856 2048 1856 2032
WIRE 2064 2048 2064 2032
WIRE 2064 2144 2064 2128
WIRE 1856 2160 1856 2128
WIRE 1856 2160 1296 2160
WIRE 1920 2160 1856 2160
WIRE 1856 2176 1856 2160
WIRE 1296 2224 1296 2160
WIRE 1312 2224 1296 2224
WIRE 1392 2224 1376 2224
WIRE 1456 2224 1392 2224
WIRE 1552 2224 1520 2224
WIRE 1600 2224 1552 2224
WIRE 1696 2224 1696 2128
WIRE 1696 2224 1664 2224
WIRE 1792 2224 1696 2224
WIRE 1392 2256 1392 2224
WIRE 1552 2256 1552 2224
WIRE 1696 2256 1696 2224
WIRE 1856 2288 1856 2272
WIRE 1952 2288 1856 2288
WIRE 1856 2304 1856 2288
WIRE 1952 2320 1952 2288
WIRE 1392 2352 1392 2336
WIRE 1552 2352 1552 2336
WIRE 1696 2352 1696 2336
WIRE 1856 2400 1856 2384
WIRE 1952 2400 1952 2384
SYMBOL cap 1520 2208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .01
SYMBOL cap 1376 2208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value .01
SYMBOL cap 1936 2320 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 1536 2240 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL voltage 2064 2032 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL npn 1792 2176 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL cap 1664 2208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL res 1840 2032 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 1840 2288 R0
SYMATTR InstName R6
SYMATTR Value 1K
SYMBOL res 1680 2240 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res 1376 2240 R0
SYMATTR InstName R5
SYMATTR Value 10K
SYMBOL res 1680 2032 R0
SYMATTR InstName R2
SYMATTR Value 100K
FLAG 1856 2400 0
FLAG 1952 2400 0
FLAG 1696 2352 0
FLAG 1552 2352 0
FLAG 1392 2352 0
FLAG 2064 2144 0
FLAG 1920 2160 OUT
TEXT 1992 2424 Left 2 !.tran 100m startup
TEXT 1704 2448 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3410B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3410B.asy)
L1 N001 OUT 4.7
R2 N002 0 412K
V1 IN 0 5
R1 OUT N002 887K
Rload OUT 0 20
C1 OUT N002 10p
XU1 IN 0 N001 IN MP_01 N002 LTC3410B ;pnba Run)GND)SW)Vin))FB
C2 OUT 0 4.7
.tran 250u startup
.lib LTC3410B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 700
WIRE 192 64 112 64
WIRE 352 64 192 64
WIRE 112 80 112 64
WIRE 352 80 352 64
WIRE 192 144 192 64
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 608 144 592 144
WIRE 704 144 608 144
WIRE 800 144 704 144
WIRE 896 144 800 144
WIRE 800 160 800 144
WIRE 896 160 896 144
WIRE 112 176 112 160
WIRE 608 176 608 144
WIRE 704 176 704 144
WIRE 800 256 800 224
WIRE 896 256 896 240
WIRE 608 304 608 256
WIRE 608 304 496 304
WIRE 704 304 704 240
WIRE 704 304 608 304
WIRE 608 320 608 304
WIRE 352 400 352 368
WIRE 608 416 608 400
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL VOLTAGE 112 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 880 144 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL cap 784 160 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL res 592 304 R0
SYMATTR InstName R2
SYMATTR Value 412K
SYMBOL cap 688 176 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL res 592 160 R0
SYMATTR InstName R1
SYMATTR Value 887K
SYMBOL PowerProducts\\LTC3410B 352 224 R0
SYMATTR InstName U1
FLAG 112 176 0
FLAG 352 400 0
FLAG 800 256 0
FLAG 896 256 0
FLAG 608 416 0
FLAG 112 64 IN
FLAG 896 144 OUT
TEXT 720 352 Left 2 !.tran 250u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6360.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6360.asy)
XU1 N003 N003 N001 N001 N002 N002 NC_01 IN 0 LTC6360 ;pnba -IN)OUT)Vcc)Vdd)CPO)CPI)_SHDN)+IN)GND
R1 N003 OUT 10
V2 N001 0 5
V1 IN 0 SINE(2.5 1 300K)
C1 OUT 0 330p
C2 N002 0 1.1
.tran 50u
.lib LTC6360.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2244 1252
WIRE 1328 496 1216 496
WIRE 1504 496 1328 496
WIRE 1056 512 720 512
WIRE 1504 512 1504 496
WIRE 720 528 720 512
WIRE 1056 528 1056 512
WIRE 1216 528 1216 496
WIRE 1328 528 1328 496
WIRE 1456 592 1408 592
WIRE 1504 608 1504 592
WIRE 720 624 720 608
WIRE 1456 688 1456 592
WIRE 1456 688 1408 688
WIRE 1456 704 1456 688
WIRE 1216 768 1216 752
WIRE 1056 784 1056 752
WIRE 1152 784 1152 752
WIRE 1152 784 1056 784
WIRE 1456 784 1456 768
WIRE 1152 800 1152 784
WIRE 1152 896 1152 880
WIRE 1216 896 1152 896
WIRE 1152 912 1152 896
WIRE 1152 992 1152 976
SYMBOL LTC6360 1216 640 R0
SYMATTR InstName U1
SYMBOL res 1136 784 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL cap 1136 912 R0
SYMATTR InstName C1
SYMATTR Value 330p
SYMBOL cap 1440 704 R0
SYMATTR InstName C2
SYMATTR Value 1.1
SYMBOL voltage 1504 496 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 720 512 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(2.5 1 300K)
FLAG 720 624 0
FLAG 1504 608 0
FLAG 1216 768 0
FLAG 1152 992 0
FLAG 1456 784 0
FLAG 720 512 IN
FLAG 1216 896 OUT
TEXT 1440 896 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2165-1.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2165-1.0.asy)
L1 N004 OUT .47 Rser=6m
V1 IN 0 5
R1 N005 0 100K
C1 N008 0 2n
C6 N007 0 1p
R3 OUT N001 100K
XU1 N002 N005 N002 OUT 0 0 N004 IN IN IN N001 N008 N007 N003 N002 ADP2165-x.x Rtop=400K Rbot=600K ;pnba SYNC)Rt)TRK)FB)Gnd)Pgnd)SW)Pvin)Avin)EN)Pgood)SS)Comp)Bst)Vreg
C5 N006 0 820p
C2 N003 N004 .1
Rload OUT 0 .2
C3 OUT 0 90 Rser=2m
C4 N002 0 1
R2 N007 N006 27.4K
.tran 1m startup
.lib ADP2165-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 680
WIRE 32 -96 -144 -96
WIRE 176 -96 32 -96
WIRE 272 -96 176 -96
WIRE -144 -80 -144 -96
WIRE 176 -80 176 -96
WIRE 272 -80 272 -96
WIRE 32 -16 32 -96
WIRE 64 -16 32 -16
WIRE 448 -16 384 -16
WIRE 608 -16 528 -16
WIRE -144 16 -144 0
WIRE -32 64 -48 64
WIRE 48 64 32 64
WIRE 64 64 48 64
WIRE 432 64 384 64
WIRE 48 144 48 64
WIRE 64 144 48 144
WIRE 432 144 432 128
WIRE 432 144 384 144
WIRE 480 144 432 144
WIRE 608 144 608 -16
WIRE 608 144 560 144
WIRE 720 144 608 144
WIRE 832 144 720 144
WIRE 720 160 720 144
WIRE 832 160 832 144
WIRE 48 224 48 144
WIRE 64 224 48 224
WIRE 720 256 720 224
WIRE 832 256 832 240
WIRE -32 304 -48 304
WIRE 64 304 48 304
WIRE 608 304 608 144
WIRE 608 304 384 304
WIRE -160 384 -224 384
WIRE -32 384 -80 384
WIRE 64 384 -32 384
WIRE 400 384 384 384
WIRE 480 384 464 384
WIRE -224 400 -224 384
WIRE -32 400 -32 384
WIRE 176 464 176 448
WIRE 272 464 272 448
WIRE -224 480 -224 464
WIRE -32 480 -32 464
SYMBOL ADP2165-1.0 224 176 R0
SYMATTR InstName U1
SYMBOL cap 416 64 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL res -64 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 27.4K
SYMBOL res 64 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL ind 464 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value .47
SYMATTR SpiceLine Rser=6m
SYMBOL voltage -144 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 704 160 R0
WINDOW 40 24 74 Left 2
SYMATTR Value 90
SYMATTR InstName C3
SYMATTR SpiceLine Rser=2m
SYMBOL res 544 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 32 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap -240 400 R0
SYMATTR InstName C5
SYMATTR Value 820p
SYMBOL cap -48 400 R0
SYMATTR InstName C6
SYMATTR Value 1p
SYMBOL cap 400 368 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL res 816 144 R0
SYMATTR InstName Rload
SYMATTR Value .2
FLAG 480 384 0
FLAG 272 464 0
FLAG -48 304 0
FLAG -224 480 0
FLAG -144 16 0
FLAG 720 256 0
FLAG 832 256 0
FLAG 832 144 OUT
FLAG -144 -96 IN
FLAG -48 64 0
FLAG -32 480 0
FLAG 176 464 0
TEXT 696 424 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3528-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3528-2.asy)
C1 OUT 0 10 Rser=1m
R1 OUT N002 499K
L1 IN N001 2.2 Rpar=5K
R2 N002 0 287K
XU1 IN N002 NC_01 OUT N001 0 0 IN LTC3528-2 ;pnba _SHDN)FB)Pgood)Vout)SW)PGND)SGND)Vin
C2 OUT N002 68p
Rload OUT 0 8.25
V1 IN 0 2
.tran .5m startup
.lib LTC3528-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 80 -96 80
WIRE 64 80 -32 80
WIRE 96 80 64 80
WIRE 192 80 176 80
WIRE -96 96 -96 80
WIRE 64 128 64 80
WIRE 192 128 192 80
WIRE -96 192 -96 176
WIRE -32 208 -32 80
WIRE -16 208 -32 208
WIRE 320 208 272 208
WIRE 416 208 320 208
WIRE 528 208 416 208
WIRE 608 208 528 208
WIRE 320 224 320 208
WIRE 416 224 416 208
WIRE 528 224 528 208
WIRE 608 224 608 208
WIRE 320 320 320 304
WIRE 320 320 272 320
WIRE 416 320 416 288
WIRE 416 320 320 320
WIRE 528 320 528 288
WIRE 608 320 608 304
WIRE 320 336 320 320
WIRE 64 416 64 400
WIRE 192 416 192 400
WIRE 320 432 320 416
SYMBOL LTC3528-2 128 272 R0
SYMATTR InstName U1
SYMBOL cap 512 224 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=1m
SYMBOL res 304 320 R0
SYMATTR InstName R2
SYMATTR Value 287K
SYMBOL voltage -96 80 R0
WINDOW 0 20 15 Left 2
WINDOW 3 25 97 Left 2
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL res 592 208 R0
SYMATTR InstName Rload
SYMATTR Value 8.25
SYMBOL ind 80 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rpar=5K
SYMBOL res 304 208 R0
SYMATTR InstName R1
SYMATTR Value 499K
SYMBOL cap 400 224 R0
SYMATTR InstName C2
SYMATTR Value 68p
FLAG -96 192 0
FLAG 64 416 0
FLAG 320 432 0
FLAG 528 320 0
FLAG 608 320 0
FLAG 192 416 0
FLAG 608 208 OUT
FLAG -96 80 IN
TEXT 456 392 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7102-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 3.5
Rload OUT 0 12
C1 OUT 0 2.2 Rser=1.5m
R1 OUT N001 100k
XU1 IN OUT IN N001 OUT 0 ADP7102 Vref=2.5 ;pnba Vin)Sense)EN)PG)Vout)GND
.tran 3m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7102-2.5.asy)
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -16 48 -16 32
WIRE 368 128 352 128
WIRE 464 128 464 32
WIRE 464 128 368 128
WIRE 560 128 464 128
WIRE -16 144 -16 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 368 224 368 128
WIRE 368 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -16 144 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -16 32 IN
FLAG 560 128 OUT
SYMBOL voltage -16 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.5
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 12
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL ADP7102-2.5 224 128 R0
SYMATTR InstName U1
TEXT 432 288 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\092a1e9b3fa5_mos_param_visibility.asc
* Generated by LTspice 26.0.1 for Windows.
M2 out in vdd vdd PMOS1 L=2u W=10u AD=80p PD=25u AS=80p PS=25u
M3 out in 0 0 NMOS1 L=2u W=10u AD=80p PD=25u AS=80p PS=25u
V2 vdd 0 5
V1 in 0 2.5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.op
.model PMOS1 pmos level=2 nsub=4e15 tox=50n
.model NMOS1 nmos level=2 nsub=4e15 tox=50n
* .dc V1 0 5 .01
* How to make L and W visible, but not the other like AD, PS ...\n \nAdd symbols "nmos4" and "pmos4" to the schematic.\nThe Mosfets become an instance after you you placed it.\nChange NMOS to the model name, e.g. NMOS1.\nChange PMOS to the model name, e.g. PMOS2. \nCtrl-RightMouseClick on the body of a Mosfet.\nAdd L= ... W= ... into the field "Value2". Enable visibility!\nAdd AD= PS= ......... into the field "SpiceLine".\n \nLook in the Spice Error Log file for results after a RUN.\nView->SPICE Error Log\n \nSome parameters are from here:\nhttp://myqu.qu.edu.qa/malani/VLSI/2-Input%20NOR%20Gate.doc
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1404 948
WIRE 48 400 48 320
WIRE 48 544 48 480
WIRE 64 32 64 -32
WIRE 64 176 64 112
WIRE 112 320 48 320
WIRE 256 320 112 320
WIRE 256 320 256 160
WIRE 256 464 256 320
WIRE 352 160 256 160
WIRE 352 464 256 464
WIRE 400 -32 64 -32
WIRE 400 80 400 -32
WIRE 400 144 400 80
WIRE 400 320 400 240
WIRE 400 384 400 320
WIRE 400 544 400 480
WIRE 496 192 400 192
WIRE 496 432 400 432
WIRE 560 320 400 320
FLAG 112 320 in
FLAG 400 544 0
FLAG 496 432 0
FLAG 496 192 vdd
FLAG 400 80 vdd
FLAG 560 320 out
FLAG 64 176 0
FLAG 48 544 0
SYMBOL pmos4 352 240 M180
WINDOW 0 59 69 Left 0
WINDOW 3 57 27 Left 0
WINDOW 123 57 -1 Left 0
SYMATTR InstName M2
SYMATTR Value PMOS1
SYMATTR Value2 L=2u W=10u
SYMATTR SpiceLine AD=80p PD=25u AS=80p PS=25u
SYMBOL nmos4 352 384 R0
WINDOW 123 56 100 Left 0
SYMATTR InstName M3
SYMATTR Value NMOS1
SYMATTR Value2 L=2u W=10u
SYMATTR SpiceLine AD=80p PD=25u AS=80p PS=25u
SYMBOL voltage 64 16 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 48 384 R0
SYMATTR InstName V1
SYMATTR Value 2.5
TEXT 24 -104 Left 0 !.op
TEXT 24 624 Left 0 !.model PMOS1 pmos level=2 nsub=4e15 tox=50n\n.model NMOS1 nmos level=2 nsub=4e15 tox=50n
TEXT 24 -136 Left 0 ;.dc V1 0 5 .01
TEXT 16 -608 Left 0 ;How to make L and W visible, but not the other like AD, PS ...\n \nAdd symbols "nmos4" and "pmos4" to the schematic.\nThe Mosfets become an instance after you you placed it.\nChange NMOS to the model name, e.g. NMOS1.\nChange PMOS to the model name, e.g. PMOS2. \nCtrl-RightMouseClick on the body of a Mosfet.\nAdd L= ... W= ... into the field "Value2". Enable visibility!\nAdd AD= PS= ......... into the field "SpiceLine".\n \nLook in the Spice Error Log file for results after a RUN.\nView->SPICE Error Log\n \nSome parameters are from here:\nhttp://myqu.qu.edu.qa/malani/VLSI/2-Input%20NOR%20Gate.doc
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG788.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG788.asy)
V3 N004 0 PULSE(0 3.3 0 20n 20n 10u 20u)
V2 N003 0 0
XU1 N004 N001 N002 N003 +V 0 ADG788 ;pnba IN)SA)D)SB)Vdd)GND
C1 N002 0 35p
R1 N002 0 300
V1 N001 0 3
.tran 100u
.lib ADG788.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1696 -272 -1936 -272
WIRE -1936 -256 -1936 -272
WIRE -1424 -240 -1504 -240
WIRE -1312 -240 -1424 -240
WIRE -1424 -224 -1424 -240
WIRE -1312 -224 -1312 -240
WIRE -1696 -208 -1856 -208
WIRE -1936 -160 -1936 -176
WIRE -1856 -144 -1856 -208
WIRE -1696 -144 -1776 -144
WIRE -1424 -128 -1424 -144
WIRE -1312 -128 -1312 -160
WIRE -1856 -48 -1856 -64
WIRE -1776 -32 -1776 -144
WIRE -1600 -16 -1600 -32
WIRE -1776 64 -1776 48
SYMBOL voltage -1936 -272 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL cap -1328 -224 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL voltage -1776 -48 R0
WINDOW 3 25 92 Left 2
SYMATTR Value PULSE(0 3.3 0 20n 20n 10u 20u)
SYMATTR InstName V3
SYMBOL res -1440 -240 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL voltage -1856 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL ADG788 -1600 -192 R0
SYMATTR InstName U1
FLAG -1936 -160 0
FLAG -1856 -48 0
FLAG -1776 64 0
FLAG -1600 -368 +V
FLAG -1424 -128 0
FLAG -1600 -16 0
FLAG -1312 -128 0
TEXT -1560 0 Left 2 !.tran 100u