Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7171-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7171-1.8.asy)
XU1 IN OUT IN N001 OUT 0 ADM7171-1.8 ;pnba Vin)Sense)EN)SS)Vout)GND
V1 IN 0 2.3
Rload OUT 0 3
C1 OUT 0 4.7 Rser=1.5m
C2 N001 0 1n
.tran 5m startup
.lib ADM7171-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.3
SYMBOL ADM7171-1.8 224 128 R0
SYMATTR InstName U1
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 3
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3008-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3008-2.5.asy)
XU1 IN OUT OUT 0 IN LT3008-2.5 ;pnba IN)OUT)Sense)GND)_SHDN
Rload OUT 0 250
C1 OUT 0 1
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL PowerProducts\\LT3008-2.5 176 96 R0
SYMATTR InstName U1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 250
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 336 248 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7185-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7185-1.5.asy)
C1 N001 N002 10n
R3 OUT 0 3
C2 OUT 0 4.7 Rser=5m
C4 N003 0 1
V1 IN 0 -2
C3 N001 0 1
XU1 OUT OUT N001 N002 IN 0 N003 IN ADP7185-1.5 ;pnba Vout)Sense)VA)VAFB)EN)GND)Vreg)Vin
.tran 200m startup
.lib ADP7185-1.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 16 -48
WIRE 96 -48 32 -48
WIRE 112 -48 96 -48
WIRE 400 -48 368 -48
WIRE 432 -48 400 -48
WIRE 496 -48 432 -48
WIRE 512 -48 496 -48
WIRE 16 -32 16 -48
WIRE 432 -32 432 -48
WIRE 512 -32 512 -48
WIRE 400 16 400 -48
WIRE 400 16 368 16
WIRE 432 48 432 32
WIRE 16 64 16 48
WIRE 512 64 512 48
WIRE 96 80 96 -48
WIRE 112 80 96 80
WIRE 464 80 368 80
WIRE 384 144 368 144
WIRE 464 144 464 80
WIRE 464 144 448 144
WIRE 464 160 464 144
WIRE 176 224 176 208
WIRE 304 224 304 208
WIRE 464 240 464 224
WIRE 176 320 176 288
SYMBOL res 496 -48 R0
SYMATTR InstName R3
SYMATTR Value 3
SYMBOL cap 160 224 R0
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL ADP7185-1.5 240 48 R0
SYMATTR InstName U1
SYMBOL cap 448 160 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 448 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=5m
SYMBOL voltage 16 -48 R0
SYMATTR InstName V1
SYMATTR Value -2
FLAG 16 64 0
FLAG 432 48 0
FLAG 304 224 0
FLAG 512 64 0
FLAG 32 -48 IN
FLAG 496 -48 OUT
FLAG 464 240 0
FLAG 176 320 0
TEXT 144 360 Left 2 !.tran 200m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1529-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1529-3.3.asy)
C1 OUT 0 47
XU1 OUT OUT 0 IN IN LT1529-3.3 ;pnba OUT)Sense)GND)_SHDN)Vin
Rload OUT 0 500
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT1529.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 176 -192 176
WIRE 32 176 16 176
WIRE 368 176 320 176
WIRE 432 176 368 176
WIRE 528 176 432 176
WIRE -192 192 -192 176
WIRE 432 192 432 176
WIRE 528 192 528 176
WIRE 16 272 16 176
WIRE 32 272 16 272
WIRE 368 272 368 176
WIRE 368 272 320 272
WIRE -192 288 -192 272
WIRE 432 288 432 256
WIRE 528 288 528 272
WIRE 176 368 176 336
SYMBOL PowerProducts\\LT1529-3.3 176 224 R0
SYMATTR InstName U1
SYMBOL voltage -192 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 512 176 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL cap 416 192 R0
SYMATTR InstName C1
SYMATTR Value 47
FLAG -192 288 0
FLAG 176 368 0
FLAG 432 288 0
FLAG 528 288 0
FLAG -192 176 IN
FLAG 528 176 OUT
TEXT 384 376 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\734fca7c7439_LT_CALIF_BJT.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N002 0 0.7
Q1 N001 N002 0 0 2N3904
V3 N001 N003 0.7
V1 N001 0 0.7V
Q2 0 N003 N001 0 2N3906
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 2 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2404 1432
WIRE 768 -352 464 -352
WIRE 992 -352 768 -352
WIRE 1136 -352 992 -352
WIRE 1136 -320 1136 -352
WIRE 768 -256 768 -352
WIRE 992 -240 992 -352
WIRE 704 -208 640 -208
WIRE 1136 -192 1136 -240
WIRE 1136 -192 1056 -192
WIRE 464 -144 464 -352
WIRE 640 -144 640 -208
WIRE 464 0 464 -64
WIRE 560 0 464 0
WIRE 640 0 640 -64
WIRE 640 0 560 0
WIRE 768 0 768 -160
WIRE 768 0 640 0
WIRE 992 0 992 -144
WIRE 992 0 768 0
WIRE 560 16 560 0
SYMBOL pnp 1056 -144 R180
SYMATTR InstName Q2
SYMATTR Value 2N3906
SYMBOL voltage 1136 -336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 0.7
SYMBOL /voltage 464 -160 R0
SYMATTR InstName V1
SYMATTR Value 0.7V
SYMBOL /npn 704 -256 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage 640 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0.7
FLAG 560 16 0
TEXT 576 96 Left 2 !.dc V1 0 2 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\e8dc6e4c905d_mosfet.asc
* Generated by LTspice 26.0.1 for Windows.
XM1 N001 G 0 ARF463AB ;pnba D)G)S
VDD VDD 0 125
R1 VDD N001 4
R2 G 0 50
B1 G 0 V=V(p)*V(r)
V2 r 0 PWL(0 0 10e-3 8)
V3 p 0 PULSE(0 1 0 1p 1p 1.25e-05 250e-6)
.tran 0 10e-3 0
**********
*SRC=ARF463AB;ARF463AB;MOSFETs N;Enh;500V 9.0A 1.1ohms PPG Microsemi RF MOSFET
*SYM=POWMOSN
*09-14-09 Rev A GJK PPG Microsemi
.SUBCKT ARF463AB 10 20 30
* TERMINALS: D G S
M1 1 2 3 3 DMOS L=1U W=1U
LD 10 11 2n
RD 11 1 1.1
LG 20 19 2.8n
RG 19 2 .5
D1 5 1 DGD
D2 5 2 DGD
CGS 2 3 1200p
DSD 3 1 DSUB
RS 29 3 2.25m
LS 30 29 2n
.MODEL DMOS NMOS(LEVEL=3 VMAX=1.04Meg THETA=100.0m ETA=2.00m VTO=3.00 KP=2.60)
.MODEL DSUB D (IS=1.27u N=1.50 RS=5.00m BV=500 CJO=799p VJ=0.800 M=0.420 TT=311n)
.MODEL DGD D (IS=100n N=1.5 RS=10m BV=500 CJO=81.7p M=.5 VJ=.700 TT=1n)
.ENDS
*****
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -480 -784 -624 -784
WIRE -432 -784 -480 -784
WIRE -384 -784 -432 -784
WIRE -480 -736 -480 -784
WIRE -624 -720 -624 -784
WIRE -624 -624 -624 -640
WIRE -1408 -576 -1408 -592
WIRE -1152 -560 -1152 -592
WIRE -480 -560 -480 -656
WIRE -1408 -544 -1408 -576
WIRE -1152 -544 -1152 -560
WIRE -752 -480 -960 -480
WIRE -576 -480 -752 -480
WIRE -528 -480 -576 -480
WIRE -1408 -448 -1408 -464
WIRE -1152 -448 -1152 -464
WIRE -752 -432 -752 -480
WIRE -480 -400 -480 -464
WIRE -960 -384 -960 -480
WIRE -752 -320 -752 -352
WIRE -960 -272 -960 -304
FLAG -480 -400 0
FLAG -624 -624 0
FLAG -432 -784 VDD
FLAG -576 -480 G
FLAG -752 -320 0
FLAG -960 -272 0
FLAG -1408 -448 0
FLAG -1152 -448 0
FLAG -1152 -560 p
FLAG -1408 -576 r
SYMBOL nmos -528 -560 R0
SYMATTR InstName M1
SYMATTR Value ARF463AB
SYMATTR Prefix X
SYMBOL voltage -624 -736 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VDD
SYMATTR Value 125
SYMBOL res -496 -752 R0
SYMATTR InstName R1
SYMATTR Value 4
SYMBOL res -768 -448 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL bv -960 -400 R0
SYMATTR InstName B1
SYMATTR Value V=V(p)*V(r)
SYMBOL voltage -1408 -560 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 10e-3 8)
SYMBOL voltage -1152 -560 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 0 1p 1p 1.25e-05 250e-6)
TEXT -2144 -96 Left 2 !.tran 0 10e-3 0
TEXT -2152 -752 Left 2 !**********\n*SRC=ARF463AB;ARF463AB;MOSFETs N;Enh;500V 9.0A 1.1ohms PPG Microsemi RF MOSFET\n*SYM=POWMOSN\n*09-14-09 Rev A GJK PPG Microsemi\n.SUBCKT ARF463AB   10 20 30\n*     TERMINALS:  D  G  S\nM1   1  2  3  3  DMOS L=1U W=1U\nLD  10  11  2n\nRD  11          1   1.1\nLG  20  19  2.8n\nRG  19  2   .5\nD1   5  1   DGD\nD2   5  2   DGD\nCGS  2  3   1200p\nDSD  3  1   DSUB\nRS  29  3   2.25m\nLS  30  29  2n\n.MODEL DMOS NMOS(LEVEL=3 VMAX=1.04Meg THETA=100.0m ETA=2.00m VTO=3.00 KP=2.60)\n.MODEL DSUB D (IS=1.27u N=1.50 RS=5.00m BV=500 CJO=799p VJ=0.800 M=0.420 TT=311n)\n.MODEL DGD  D (IS=100n N=1.5 RS=10m BV=500 CJO=81.7p M=.5 VJ=.700 TT=1n)\n.ENDS\n*****
* Z:\tmp\asc_dec_bjh7r6w2\1a302c25cc51_PassiveActive_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 0 2.81e-6
R7 N007 0 1k
V2 0 N014 12
C6 N011 0 100n
R1 N004 0 600
XU1 N013 N006 N009 N005 N014 LT1457 ;pnba IN+)IN-)OUT)VCC)VEE
R9 N009 N006 582
L3 N003 N004 .1844
L1 N001 N002 .92222
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1457.asy)
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -224 -112 -304 -112
WIRE -128 -112 -144 -112
WIRE -112 -112 -128 -112
WIRE -16 -112 -32 -112
WIRE 0 -112 -16 -112
WIRE 112 -112 80 -112
WIRE 400 -112 112 -112
WIRE 112 -96 112 -112
WIRE -304 -32 -304 -112
WIRE -304 -32 -352 -32
WIRE -128 -32 -128 -112
WIRE -16 -32 -16 -112
WIRE -304 -16 -304 -32
WIRE 112 0 112 -16
WIRE 352 32 256 32
WIRE 352 48 352 32
WIRE -304 64 -304 48
WIRE -304 80 -304 64
WIRE -128 80 -128 32
WIRE -128 80 -304 80
WIRE -16 80 -16 32
WIRE -16 80 -128 80
WIRE -304 96 -304 80
WIRE 256 96 256 32
WIRE 256 96 -16 96
WIRE -224 144 -240 144
WIRE -128 144 -144 144
WIRE -112 144 -128 144
WIRE 96 144 80 144
WIRE 192 144 176 144
WIRE 224 144 192 144
WIRE 320 144 304 144
WIRE 352 144 352 128
WIRE -240 160 -240 144
WIRE 80 160 80 144
WIRE 256 160 256 96
WIRE -16 176 -16 96
WIRE -16 176 -80 176
WIRE 192 176 192 144
WIRE 224 176 192 176
WIRE -128 192 -128 144
WIRE -112 192 -128 192
WIRE 320 192 320 144
WIRE 320 192 288 192
WIRE 400 192 320 192
WIRE -32 208 -32 144
WIRE -32 208 -48 208
WIRE -16 208 -32 208
WIRE 80 208 64 208
WIRE 96 208 80 208
WIRE 192 208 176 208
WIRE 224 208 192 208
WIRE -352 224 -352 -32
WIRE -240 224 -256 224
WIRE -224 224 -240 224
WIRE -128 224 -144 224
WIRE -112 224 -128 224
WIRE 80 240 80 208
WIRE 192 240 192 208
WIRE -240 256 -240 224
WIRE -128 256 -128 224
WIRE -80 272 -80 240
WIRE 32 272 -80 272
WIRE 32 288 32 272
WIRE 256 288 256 224
WIRE 256 288 32 288
WIRE 32 304 32 288
WIRE -240 320 -240 304
WIRE -128 320 -128 304
WIRE 32 320 32 304
WIRE 192 320 192 304
WIRE -240 352 -240 320
WIRE -32 352 -32 208
WIRE -32 352 -240 352
WIRE 80 352 80 304
WIRE 320 352 320 192
WIRE 320 352 80 352
WIRE 32 400 32 384
SYMBOL cap -144 -32 R0
SYMATTR InstName C1
SYMATTR Value 2.81e-6
SYMBOL res 192 128 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R7
SYMATTR Value 1k
SYMBOL voltage 32 400 R180
WINDOW 0 24 104 Left 0
WINDOW 3 24 16 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL cap 176 240 R0
WINDOW 0 40 31 Left 0
SYMATTR InstName C6
SYMATTR Value 100n
SYMBOL res 96 -112 R0
SYMATTR InstName R1
SYMATTR Value 600
SYMBOL Opamps\\LT1457 -80 208 R0
WINDOW 0 -21 0 Left 0
SYMATTR InstName U1
SYMBOL res -16 128 R90
WINDOW 0 3 100 VBottom 0
WINDOW 3 -25 50 VTop 0
SYMATTR InstName R9
SYMATTR Value 582
SYMBOL ind -16 -96 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
SYMATTR InstName L3
SYMATTR Value .1844
SYMBOL ind -240 -96 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
SYMATTR InstName L1
SYMATTR Value .92222
FLAG -240 160 0
FLAG 80 160 0
FLAG -128 320 0
FLAG 192 320 0
FLAG 352 144 0
FLAG 32 400 0
FLAG -304 96 0
FLAG 112 0 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1956-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1956-5.asy)
XU1 0 N002 MP_01 IN MP_02 N001 MP_03 MP_04 MP_05 OUT N004 OUT MP_06 MP_07 N003 LT1956-5 ;pnba GND)SW))Vin))Boost))))BIAS)Vc)Sense)))_SHDN
C3 OUT 0 100 Rser=.1
Rload OUT 0 10
L1 N002 OUT 5
D1 0 N002 1N5819
C1 N004 0 1000p
D2 OUT N001 1N914
C2 N002 N001 .33
V1 IN 0 20
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
.lib LT1956-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2712 1832
WIRE 2096 1296 1984 1296
WIRE 2192 1296 2096 1296
WIRE 2384 1296 2256 1296
WIRE 1824 1328 1600 1328
WIRE 2096 1328 2096 1296
WIRE 1600 1344 1600 1328
WIRE 1824 1360 1824 1328
WIRE 1984 1360 1984 1296
WIRE 2208 1376 2176 1376
WIRE 2272 1376 2208 1376
WIRE 2384 1376 2384 1296
WIRE 2384 1376 2352 1376
WIRE 2432 1376 2384 1376
WIRE 2544 1376 2432 1376
WIRE 2208 1392 2208 1376
WIRE 2432 1392 2432 1376
WIRE 2544 1392 2544 1376
WIRE 1600 1440 1600 1424
WIRE 1744 1440 1728 1440
WIRE 2096 1440 2096 1392
WIRE 2096 1440 2064 1440
WIRE 2176 1440 2176 1376
WIRE 2176 1440 2096 1440
WIRE 2208 1488 2208 1456
WIRE 2432 1488 2432 1456
WIRE 2544 1488 2544 1472
WIRE 2384 1520 2384 1376
WIRE 2384 1520 2064 1520
WIRE 1648 1600 1616 1600
WIRE 1744 1600 1712 1600
WIRE 2384 1600 2384 1520
WIRE 2384 1600 2064 1600
WIRE 1904 1696 1904 1680
SYMBOL res 2528 1376 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL cap 1712 1584 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000p
SYMBOL polcap 2416 1392 R0
SYMATTR InstName C3
SYMATTR Value 100
SYMATTR SpiceLine Rser=.1
SYMBOL schottky 2192 1456 M180
WINDOW 0 34 63 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMBOL PowerProducts\\LT1956-5 1904 1520 R0
SYMATTR InstName U1
SYMBOL cap 2080 1392 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value .33
SYMBOL VOLTAGE 1600 1328 R0
SYMATTR InstName V1
SYMATTR Value 20
SYMBOL ind 2256 1392 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 5
SYMBOL diode 2256 1280 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N914
FLAG 2208 1488 0
FLAG 2432 1488 0
FLAG 2544 1488 0
FLAG 1904 1696 0
FLAG 1616 1600 0
FLAG 1600 1440 0
FLAG 2544 1376 OUT
FLAG 1600 1328 IN
TEXT 2112 1640 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\093148bae00b_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
R6 N003 N005 R=V(alpha_lin)*{Rlin}
R3 ve 0 22k
Q1 vc vb ve 0 NPN
R8 N002 N001 1e-3
R5 N001 N003 R=(1-V(alpha_lin))*{Rlin}
Vcc N004 0 9
R1 N002 vc 22k
V1 alpha_lin 0 PWL(0 0.1 2 1)
R4 vb 0 50k
R2 N003 vb 220k
R9 N005 0 1e-3
R7 N002 N004 1e-3
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.param Rlin 10k
.param Rvol 50k
.param duration=2
.tran 0 2 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -128 -272 -192 -272
WIRE 256 -272 -48 -272
WIRE 384 -272 256 -272
WIRE -192 -240 -192 -272
WIRE 384 -224 384 -272
WIRE -192 -144 -192 -160
WIRE 128 -144 -192 -144
WIRE -192 -112 -192 -144
WIRE 128 -112 128 -144
WIRE 256 -112 256 -272
WIRE 384 -112 384 -144
WIRE -192 16 -192 -32
WIRE 256 48 256 -32
WIRE 256 96 256 48
WIRE -192 128 -192 96
WIRE 128 144 128 -32
WIRE 176 144 128 144
WIRE 192 144 176 144
WIRE -448 160 -528 160
WIRE -528 208 -528 160
WIRE 256 240 256 192
WIRE 128 288 128 144
WIRE 256 288 256 240
WIRE 128 416 128 368
WIRE 256 416 256 368
WIRE 256 416 128 416
WIRE 128 464 128 416
SYMBOL res 240 272 R0
SYMATTR InstName R3
SYMATTR Value 22k
SYMBOL voltage -528 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0.1 2 1)
SYMBOL res 240 -128 R0
SYMATTR InstName R1
SYMATTR Value 22k
SYMBOL npn 192 96 R0
SYMATTR InstName Q1
SYMBOL res 112 272 R0
SYMATTR InstName R4
SYMATTR Value 50k
SYMBOL res 368 -240 R0
SYMATTR InstName R7
SYMATTR Value 1e-3
SYMBOL res -208 -128 R0
SYMATTR InstName R6
SYMATTR Value R=V(alpha_lin)*{Rlin}
SYMBOL res -208 -256 R0
SYMATTR InstName R5
SYMATTR Value R=(1-V(alpha_lin))*{Rlin}
SYMBOL res -32 -288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R8
SYMATTR Value 1e-3
SYMBOL res 112 -128 R0
SYMATTR InstName R2
SYMATTR Value 220k
SYMBOL voltage 384 -128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vcc
SYMATTR Value 9
SYMBOL res -208 0 R0
SYMATTR InstName R9
SYMATTR Value 1e-3
FLAG 384 -32 0
FLAG 128 464 0
FLAG 176 144 vb
FLAG 256 48 vc
FLAG 256 240 ve
FLAG -528 288 0
FLAG -448 160 alpha_lin
FLAG -192 128 0
TEXT -496 -248 Left 2 !.param Rlin 10k
TEXT -496 -216 Left 2 !.param Rvol 50k
TEXT -496 -320 Left 2 !.param duration=2
TEXT -498 -280 Left 2 !.tran 0 2 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1474-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1474-3.3.asy)
V1 IN 0 10
C1 OUT 0 100
XU1 OUT N003 N002 0 N001 IN IN N004 LTC1474 top=1.68Meg bot=1Meg ;pnba FB)LBO)LBI)GND)SW)Sense)Vin)Run
D1 0 N001 MBR0530L
Rload OUT 0 25
L1 N001 OUT 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
.lib LTC1474.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2704 1608
WIRE 1600 1168 1504 1168
WIRE 1776 1168 1600 1168
WIRE 1504 1184 1504 1168
WIRE 1776 1200 1776 1168
WIRE 1600 1264 1600 1168
WIRE 1632 1264 1600 1264
WIRE 2000 1264 1920 1264
WIRE 2064 1264 2000 1264
WIRE 2176 1264 2144 1264
WIRE 2240 1264 2176 1264
WIRE 2352 1264 2240 1264
WIRE 1504 1280 1504 1264
WIRE 2240 1280 2240 1264
WIRE 2352 1280 2352 1264
WIRE 2000 1296 2000 1264
WIRE 1632 1344 1616 1344
WIRE 1936 1344 1920 1344
WIRE 2000 1376 2000 1360
WIRE 2240 1376 2240 1344
WIRE 2352 1376 2352 1360
WIRE 1632 1424 1616 1424
WIRE 2176 1424 2176 1264
WIRE 2176 1424 1920 1424
WIRE 1776 1504 1776 1488
SYMBOL schottky 1984 1360 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBR0530L
SYMBOL PowerProducts\\LTC1474-3.3 1776 1344 R0
SYMATTR InstName U1
SYMBOL res 2336 1264 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL VOLTAGE 1504 1168 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL ind 2048 1280 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMBOL polcap 2224 1280 R0
SYMATTR InstName C1
SYMATTR Value 100
FLAG 1504 1280 0
FLAG 2000 1376 0
FLAG 2240 1376 0
FLAG 2352 1376 0
FLAG 1776 1504 0
FLAG 2352 1264 OUT
FLAG 1504 1168 IN
TEXT 2008 1480 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\a2d0f9f5de57_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
* .tran 0 1 0.5
M1 D N002 N003 N003 mMOS
V1 N002 0 4
V2 N001 0 9
R2 N001 D 1k
R1 N003 0 300
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model mMOS NMOS (VT0=1 KP=2m)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 932 680
WIRE 224 32 32 32
WIRE 224 64 224 32
WIRE 32 96 32 32
WIRE 224 160 224 144
WIRE 32 176 -64 176
WIRE 176 240 32 240
WIRE 32 272 32 240
WIRE 224 288 224 256
WIRE -64 400 -64 176
WIRE 32 400 32 352
WIRE 32 400 -64 400
WIRE 224 400 224 368
WIRE 224 400 32 400
SYMBOL res 208 272 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL res 208 48 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL nmos 176 160 R0
SYMATTR InstName M1
SYMATTR Value mMOS
SYMBOL voltage 32 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL voltage 32 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 9
FLAG 32 400 0
FLAG 224 160 D
TEXT 464 200 Left 2 !.model mMOS NMOS (VT0=1 KP=2m)
TEXT 472 232 Left 2 ;.tran 0 1 0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8643S.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8643S.asy)
R4 N001 0 8.45K
Rload OUT 0 835m
C1 N006 0 1n
R3 N007 0 243K
C6 N002 N001 330p
C4 OUT 0 47 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
XU1 OUT N003 NC_01 IN NC_02 0 N002 N005 0 0 N007 NC_03 IN IN N004 N006 NC_04 LT8643S ;pnba BIAS)INTVcc)BST)VIN1)CLKOUT)GND1)VC)SW)GND)GND2)FB)PG)VIN2)EN/UV)RT)TR/SS)SYNC/MODE
L1 N005 OUT 3.3 Rser=10m
R1 N004 0 41.2K
R2 OUT N007 1Meg
C5 OUT N007 4.7p
V1 IN 0 24
C2 N003 0 1
.tran 1m startup
.lib LT8643S.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1848 740
WIRE 80 -80 -32 -80
WIRE 256 -80 80 -80
WIRE 432 -80 256 -80
WIRE -32 -64 -32 -80
WIRE 256 -64 256 -80
WIRE 80 0 80 -80
WIRE 112 0 80 0
WIRE 432 0 432 -80
WIRE 432 0 400 0
WIRE -32 32 -32 16
WIRE 112 80 80 80
WIRE 432 80 400 80
WIRE -64 160 -80 160
WIRE 32 160 16 160
WIRE 112 160 96 160
WIRE 32 240 0 240
WIRE 112 240 96 240
WIRE 544 240 400 240
WIRE 16 400 0 400
WIRE 112 400 96 400
WIRE 432 400 400 400
WIRE 544 400 544 240
WIRE 544 400 512 400
WIRE 656 400 544 400
WIRE 752 400 656 400
WIRE 848 400 752 400
WIRE 656 416 656 400
WIRE 752 416 752 400
WIRE 848 416 848 400
WIRE 32 480 0 480
WIRE 112 480 96 480
WIRE 544 480 400 480
WIRE 656 480 656 464
WIRE 656 480 544 480
WIRE 544 496 544 480
WIRE 752 512 752 480
WIRE 848 512 848 496
WIRE 304 560 304 544
WIRE 544 592 544 576
SYMBOL res 832 400 R0
SYMATTR InstName Rload
SYMATTR Value 835m
SYMBOL cap 96 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C6
SYMATTR Value 330p
SYMBOL cap 736 416 R0
WINDOW 0 40 17 Left 2
SYMATTR InstName C4
SYMATTR Value 47
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL LT8643S 256 240 R0
SYMATTR InstName U1
SYMBOL ind 416 416 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=10m
SYMBOL res 112 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 41.2K
SYMBOL voltage -32 -80 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 528 384 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 528 480 R0
SYMATTR InstName R3
SYMATTR Value 243K
SYMBOL res 32 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 8.45K
SYMBOL cap 640 400 R0
WINDOW 0 32 17 Left 2
SYMATTR InstName C5
SYMATTR Value 4.7p
SYMBOL cap 96 496 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL cap 96 256 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
FLAG 304 560 0
FLAG 0 400 0
FLAG -32 32 0
FLAG 752 512 0
FLAG 544 592 0
FLAG 848 512 0
FLAG 848 400 OUT
FLAG -32 -80 IN
FLAG 80 80 0
FLAG 432 80 0
FLAG 0 480 0
FLAG -80 160 0
FLAG 0 240 0
TEXT 704 576 Left 2 !.tran 1m startup