Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0e006c79e836_lamp1.asc
* Generated by LTspice 26.0.1 for Windows.
* .param Kc=120 Kf=.7p CTf=5m RTf=10k\n.param Ka=temp-kelvin; ambient temp in deg K
* .param Kc=120 Kf=.7p CTf=5m RTf=10k\n.param Ka=temp-Kelvin ; ambient temp converted to degrees K\nBCf 1 2 I=V(1,2)*Kc/V(Tf)**1.2 ; conductance of filament\nBTf 0 Tf I=V(1,2)*I(BCf)-Kf*(V(Tf)**4-{Ka**4}) ; temp of filament\nCfa Tf Ta {CTf} Rpar={RTf} ; thermal capacitance and res of filament\nVa Ta 0 {Ka} ; ambient temperature in degrees K
* Incandescent Lamp Model by analog@ieee.org
* Lamp 20W, 12V
* My guess is Ramb=Rn/10, but you can enter here your measured resistance
* if lamp is not powered(cold resistance).
*.PARAM Tfil=1800
*.PARAM Tfilk=Tfil+273.15
* Adjust time constant with CTf
Va Tambk 0 {Tambk}
Cfa Tfilk Tambk {CTf} Rpar={RTf}
BCf 1 2 I=V(1,2)*Kc/V(Tfilk)**1.2
BTf 0 Tfilk I=V(1,2)*I(BCf)-{Kf*(V(Tfilk)**4-V(tambk)**4)}
.PARAM Pn=20
.PARAM Vn=12
.PARAM Rn=Vn*Vn/Pn
.PARAM Ramb=Rn/10
.PARAM Tamb=25
.PARAM Tambk=Tamb+273.15
.PARAM Tfilk=Tambk*(Rn/Ramb)**(1/1.2)
.PARAM Kc=1/Ramb*Tambk**1.2
.PARAM Kf=(Pn+(Tambk-Tfilk)/RTF)/(Tfilk**4-Tambk**4)
.param CTf=100m RTf=1k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 680
WIRE 0 432 0 384
WIRE 0 304 0 256
WIRE 240 384 240 432
WIRE -256 256 -256 304
WIRE -256 384 -256 432
WIRE -256 432 -288 432
WIRE -288 256 -256 256
WIRE 240 256 240 304
WIRE 80 256 32 256
WIRE 240 256 208 256
WIRE 32 256 0 256
WIRE 208 256 144 256
IOPIN -288 256 In
IOPIN -288 432 In
SYMBOL bi -256 304 R0
WINDOW 3 41 -98 Center 0
SYMATTR Value I=V(1,2)*Kc/V(Tfilk)**1.2
SYMATTR InstName BCf
SYMBOL voltage 240 288 R0
WINDOW 3 45 60 Left 0
SYMATTR Value {Tambk}
SYMATTR InstName Va
SYMBOL bi 0 384 R180
WINDOW 0 24 88 Left 0
WINDOW 3 50 199 Right 0
SYMATTR InstName BTf
SYMATTR Value I=V(1,2)*I(BCf)-{Kf*(V(Tfilk)**4-V(tambk)**4)}
SYMBOL cap 80 272 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
WINDOW 39 -28 32 VBottom 0
SYMATTR InstName Cfa
SYMATTR Value {CTf}
SYMATTR SpiceLine Rpar={RTf}
FLAG 0 432 0
FLAG 240 432 0
FLAG 32 256 Tfilk
FLAG 208 256 Tambk
FLAG -288 256 1
FLAG -288 432 2
TEXT -392 64 Left 0 ;.param Kc=120 Kf=.7p CTf=5m RTf=10k\n.param Ka=temp-kelvin; ambient temp in deg K
TEXT -392 -120 Left 0 ;.param Kc=120 Kf=.7p CTf=5m RTf=10k\n.param Ka=temp-Kelvin ; ambient temp converted to degrees K\nBCf 1 2 I=V(1,2)*Kc/V(Tf)**1.2 ; conductance of filament\nBTf 0 Tf I=V(1,2)*I(BCf)-Kf*(V(Tf)**4-{Ka**4}) ; temp of filament\nCfa Tf Ta {CTf} Rpar={RTf} ; thermal capacitance and res of filament\nVa Ta 0 {Ka} ; ambient temperature in degrees K
TEXT -144 -152 Center 0 ;Incandescent Lamp Model by analog@ieee.org
TEXT -400 -680 Left 0 !* Lamp 20W, 12V\n.PARAM Pn=20\n.PARAM Vn=12\n.PARAM Rn=Vn*Vn/Pn\n* My guess is Ramb=Rn/10, but you can enter here your measured resistance\n* if lamp is not powered(cold resistance).\n.PARAM Ramb=Rn/10\n \n.PARAM Tamb=25\n.PARAM Tambk=Tamb+273.15\n*.PARAM Tfil=1800\n*.PARAM Tfilk=Tfil+273.15\n.PARAM Tfilk=Tambk*(Rn/Ramb)**(1/1.2)\n.PARAM Kc=1/Ramb*Tambk**1.2\n.PARAM Kf=(Pn+(Tambk-Tfilk)/RTF)/(Tfilk**4-Tambk**4)\n \n * Adjust time constant with CTf\n.param   CTf=100m RTf=1k
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4691.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4691.asy)
Vcc Vcc 0 2.5
Vcm N002 0 SINE(0 1 1k)
Vee 0 Vee 2.5
XU1 N002 N001 Vcc Vee N001 Vcc ADA4691 ;pnba In+)In-)V+)V-)OUT)6
R1 N001 0 2k
.tran 5m
.lib ADA4691.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1704 1132
WIRE 352 160 64 160
WIRE -192 208 -192 192
WIRE 208 272 208 256
WIRE 64 288 64 160
WIRE 176 288 64 288
WIRE 352 304 352 160
WIRE 352 304 240 304
WIRE -192 320 -192 288
WIRE -192 320 -240 320
WIRE 176 320 64 320
WIRE -240 336 -240 320
WIRE -192 336 -192 320
WIRE 208 352 208 336
WIRE 272 352 240 352
WIRE 288 352 272 352
WIRE 64 368 64 320
WIRE 352 368 352 304
WIRE -192 432 -192 416
WIRE 64 464 64 448
WIRE 352 480 352 448
DATAFLAG 352 304 ""
SYMBOL voltage -192 192 R0
WINDOW 123 0 0 Left 2
WINDOW 0 34 37 Left 2
WINDOW 3 34 66 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL res 336 352 R0
SYMATTR InstName R1
SYMATTR Value 2k
SYMBOL voltage 64 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vcm
SYMATTR Value SINE(0 1 1k)
SYMBOL voltage -192 320 R0
WINDOW 123 0 0 Left 2
WINDOW 0 37 40 Left 2
WINDOW 3 38 73 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL ADA4691 208 240 R0
SYMATTR InstName U1
FLAG -240 336 0
FLAG 208 256 Vcc
FLAG 208 352 Vee
FLAG -192 192 Vcc
FLAG -192 432 Vee
FLAG 64 464 0
FLAG 352 480 0
FLAG 272 352 Vcc
TEXT -216 32 Left 2 !.tran 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1102A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1102A.asy)
XU1 0 N001 IN -V +V 0 N002 OUT LT1102 ;pnba GND)Tap1)In-)V-)V+)In+)Tap2)Out
V3 IN 0 SINE(0 10m 1K)
V2 -V 0 -15
V1 +V 0 15
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 80 64 64 64
WIRE 352 64 336 64
WIRE 80 128 64 128
WIRE 352 128 336 128
WIRE -400 160 -400 144
WIRE -288 160 -288 144
WIRE 80 192 -176 192
WIRE 352 192 336 192
WIRE -176 208 -176 192
WIRE -400 256 -400 240
WIRE -288 256 -288 240
WIRE 80 256 64 256
WIRE 352 256 336 256
WIRE -176 304 -176 288
SYMBOL voltage -400 144 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -176 192 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 10m 1K)
SYMBOL opamps\\LT1102A 208 160 R0
SYMATTR InstName U1
FLAG -288 256 0
FLAG -288 144 +V
FLAG 64 256 -V
FLAG -400 256 0
FLAG -400 144 -V
FLAG -176 304 0
FLAG 352 256 +V
FLAG 64 64 0
FLAG 352 192 0
FLAG 352 64 OUT
FLAG -176 192 IN
TEXT 352 328 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2641-12.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2641-12.asy)
V5 N001 0 PWL(0 3.3 0.6u 3.3 +2n 0 +0.31u 0 +2n 3.3)
V3 N003 0 2.5
V4 N004 0 PULSE(0 3.3 0 0.1n 0.1n 9.9n 20n)
XU1 N003 N001 N004 N005 N006 OUT N002 0 LTC2641-12 ;pnba REF)_CS)SCLK)DIN)_CLR)Vout)Vdd)GND
V1 N005 0 PULSE(0 3.3 0 0.1n 0.1n 19.8n 40n)
V2 N002 0 5
V6 N006 0 PWL(0 3.3 2u 3.3 +2n 0 +30n 0 +2n 3.3)
C1 OUT 0 10p
.tran 3u
.lib LTC2641-12.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 932
WIRE 320 16 320 -16
WIRE 432 16 432 -16
WIRE -32 48 -48 48
WIRE 208 48 48 48
WIRE 320 128 320 96
WIRE 432 128 432 96
WIRE -32 176 -48 176
WIRE 160 176 48 176
WIRE 208 176 208 48
WIRE 240 176 208 176
WIRE 160 240 160 176
WIRE 240 240 160 240
WIRE 592 256 512 256
WIRE 592 272 592 256
WIRE -32 304 -48 304
WIRE 240 304 48 304
WIRE 592 352 592 336
WIRE 240 368 176 368
WIRE 384 416 384 400
WIRE -32 448 -48 448
WIRE 176 448 176 368
WIRE 176 448 48 448
SYMBOL cap 576 272 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 64 48 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -122 VRight 2
SYMATTR InstName V5
SYMATTR Value PWL(0 3.3 0.6u 3.3 +2n 0 +0.31u 0 +2n 3.3)
SYMBOL voltage 64 448 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -99 VRight 2
SYMATTR InstName V6
SYMATTR Value PWL(0 3.3 2u 3.3 +2n 0 +30n 0 +2n 3.3)
SYMBOL voltage 432 112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 2.5
SYMBOL voltage 64 176 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -89 VRight 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 3.3 0 0.1n 0.1n 9.9n 20n)
SYMBOL voltage 320 112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL LTC2641-12 384 272 R0
WINDOW 0 0 -48 Center 2
WINDOW 3 0 53 Center 2
SYMATTR InstName U1
SYMBOL voltage 64 304 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -99 VRight 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 0.1n 0.1n 19.8n 40n)
FLAG 384 416 0
FLAG -48 304 0
FLAG 320 -16 0
FLAG 432 -16 0
FLAG -48 176 0
FLAG -48 48 0
FLAG -48 448 0
FLAG 592 256 OUT
FLAG 592 352 0
TEXT 256 456 Left 2 !.tran 3u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG452.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
V3 N001 0 SINE(0 15 1k)
V4 N003 0 pulse(0 3.3 0 1u 1u 5m 10m)
R1 N002 0 1K
XU2 N003 N002 N001 -V 0 +V ADG452 ;pnba IN)D)S)Vss)GND)Vdd
.tran 30m
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG452.asy)
.lib ADG452.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -96
WIRE -528 -32 -528 -48
WIRE -368 0 -400 0
WIRE -240 0 -288 0
WIRE 0 0 -48 0
WIRE 0 16 0 0
WIRE -528 64 -528 48
WIRE -240 64 -336 64
WIRE 0 112 0 96
WIRE -528 160 -528 144
WIRE -336 160 -336 64
WIRE -208 192 -208 176
WIRE -80 192 -80 176
WIRE -528 256 -528 240
WIRE -336 256 -336 240
FLAG -528 256 0
FLAG -528 64 0
FLAG -528 -48 +V
FLAG -528 144 -V
FLAG -400 0 0
FLAG -208 192 -V
FLAG -144 -96 +V
FLAG -80 192 0
FLAG -336 256 0
FLAG 0 112 0
SYMBOL voltage -528 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -528 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -272 0 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 15 1k)
SYMBOL voltage -336 144 R0
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL ADG452 -144 48 R0
SYMATTR InstName U2
TEXT 16 176 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\105d39cda4dd_assig4_q2.asc
* Generated by LTspice 26.0.1 for Windows.
L1 0 N001 1
C N002 0 0.5
S1 0 N001 N003 N004 SW
R N002 N001 3
VC N003 N004 PULSE(1 0 1 1e-6 1e-6 10 10)
IS 0 N001 1
.model sw sw vt=0.5 ron=1e-6
.tran 0 6 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 80 -16 80
WIRE 416 80 240 80
WIRE 464 80 416 80
WIRE 576 80 544 80
WIRE 192 112 96 112
WIRE 416 128 416 80
WIRE -16 144 -16 80
WIRE 96 144 96 112
WIRE 240 144 240 80
WIRE 576 144 576 80
WIRE 192 160 192 112
WIRE 96 240 96 224
WIRE 192 240 192 208
WIRE 192 240 96 240
WIRE -16 272 -16 224
WIRE 240 272 240 224
WIRE 240 272 -16 272
WIRE 352 272 240 272
WIRE 416 272 416 208
WIRE 416 272 352 272
WIRE 576 272 576 208
WIRE 576 272 416 272
WIRE 352 288 352 272
SYMBOL ind 432 224 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL cap 560 144 R0
SYMATTR InstName C
SYMATTR Value 0.5
SYMBOL voltage 96 128 R0
WINDOW 3 -116 -106 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(1 0 1 1e-6 1e-6 10 10)
SYMATTR InstName VC
SYMBOL res 560 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R
SYMATTR Value 3
SYMBOL sw 240 240 M180
SYMATTR InstName S1
SYMBOL current -16 224 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName IS
SYMATTR Value 1
FLAG 352 288 0
TEXT -64 304 Left 2 !.model sw sw vt=0.5 ron=1e-6
TEXT -64 352 Left 2 !.tran 0 6 0
* Z:\home\khalils\Downloads\files\data\raw_asc\2ffdb1ab515b_LossyTransmLineRG58U.asc
* Generated by LTspice 26.0.1 for Windows.
* .AC LIN 10 100MEG 1G
* RG58U 4.7mm coaxial cable\nFrequency att.(100m) Ohms/m\n(20MHz R'=0.8Ohm extrapolated)\n50MHz 10.5dB R'=1.2 Ohm\n100MHz 15.2dB R'=1.75 Ohm\n200MHz 22.2dB R'=2.55 Ohm\n400MHz 32.5dB R'=3.5 Ohm\n800MHz 48.5dB R'=5.6 Ohm\n1GHz 55.2dB R'=6.35 Ohm
* Z0 = sqrt(L/C) impedance\nC = 1/(Vp*Z0) F/m capacitance per meter\nL = Z0/Vp H/m inductance per meter\nVp = c0 / sqrt(e0) velocity\nt/m = sqrt(L*C) propagation time(delay) per meter
* Cable RG58U/C, length 100m : R = const*sqrt(f) R'=0.8Ohm/m at 20MHz.
* This example:\nL=100m\nZ=sqrt(L/C)=50 Ohm \ntpd = L*sqrt(L*C) = 100m * 5ns/m = 500ns
* A Lossy TRansmission Line Example
O1 in1 0 out 0 mytr
R1 N001 in1 50
V1 N001 0 PULSE(0 1 0 1n 1n 200n 1000n) AC 2
R2 out 0 50
.tran 0 2000n 0 0.5n
.model mytr ltra(R=1.75 C=100p L=250n Len=100)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2544 1412
WIRE 1328 1248 1392 1248
WIRE 1488 1248 1520 1248
WIRE 1056 1216 1136 1216
WIRE 1488 1216 1568 1216
WIRE 1056 1376 1056 1344
WIRE 1056 1264 1056 1216
WIRE 1216 1216 1264 1216
WIRE 1264 1216 1392 1216
WIRE 1568 1216 1600 1216
WIRE 1600 1248 1600 1216
WIRE 1600 1328 1600 1376
SYMBOL res 1584 1232 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL LTLINE 1440 1232 R0
WINDOW 0 -24 -40 Left 0
SYMATTR InstName O1
SYMATTR Value mytr
SYMBOL RES 1120 1232 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL VOLTAGE 1056 1248 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1n 1n 200n 1000n)
FLAG 1520 1248 GND
FLAG 1328 1248 GND
FLAG 1056 1376 GND
FLAG 1264 1216 in1
FLAG 1568 1216 out
FLAG 1600 1376 0
TEXT 912 960 Left 0 !.tran 0 2000n 0 0.5n
TEXT 912 992 Left 0 !.model mytr ltra(R=1.75 C=100p L=250n Len=100)
TEXT 912 928 Left 0 ;.AC LIN 10 100MEG 1G
TEXT 1568 896 Left 0 ;RG58U 4.7mm coaxial cable\nFrequency  att.(100m)  Ohms/m\n(20MHz                          R'=0.8Ohm extrapolated)\n50MHz        10.5dB        R'=1.2 Ohm\n100MHz      15.2dB        R'=1.75 Ohm\n200MHz      22.2dB        R'=2.55 Ohm\n400MHz      32.5dB        R'=3.5 Ohm\n800MHz      48.5dB        R'=5.6 Ohm\n1GHz           55.2dB       R'=6.35 Ohm
TEXT 912 744 Left 0 ;Z0 = sqrt(L/C)               impedance\nC = 1/(Vp*Z0) F/m        capacitance per meter\nL = Z0/Vp H/m              inductance per meter\nVp = c0 / sqrt(e0)          velocity\nt/m = sqrt(L*C)              propagation time(delay) per meter
TEXT 912 704 Left 0 ;Cable RG58U/C, length 100m :  R = const*sqrt(f)  R'=0.8Ohm/m at 20MHz.
TEXT 912 1032 Left 0 ;This example:\nL=100m\nZ=sqrt(L/C)=50 Ohm \ntpd = L*sqrt(L*C) = 100m * 5ns/m = 500ns
TEXT 912 640 Left 0 ;A Lossy TRansmission Line Example
* Z:\home\khalils\Downloads\files\data\raw_asc\2b56015ff4d6_ADA4000-2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
Vin IN 0 SINE(0 1 500K)
R1 N001 0 10K
R2 OUT N001 10K
XU1 IN N001 +V -V OUT ADA4000 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -15
.tran 20u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4000-2.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 736 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 432 -976 432 -992
FLAG 144 -1168 +V
FLAG 432 -976 0
FLAG 736 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 256 -1056 0
FLAG 144 -1056 0
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 500K)
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Opamps\\ADA4000-2 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
TEXT 704 -1000 Left 2 !.tran 20u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1412L.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1412L.asy)
V3 S 0 10
V4 IN 0 pulse(0 1.8 0 1u 1u 5m 10m)
C1 D 0 36p
XU1 IN D S -V 0 +V VL ADG1412L ;pnba IN)D)S)Vss)GND)Vdd)VL
V1 +V 0 15
R1 D 0 301
V5 VL 0 1.8
V2 -V 0 -15
.tran 30m
.lib ADG1412L.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -160 -112 -160 -128
WIRE -64 -112 -64 -128
WIRE -336 -48 -368 -48
WIRE -224 -48 -256 -48
WIRE -208 -48 -224 -48
WIRE 0 -48 -16 -48
WIRE 48 -48 0 -48
WIRE 144 -48 48 -48
WIRE 48 -16 48 -48
WIRE 144 0 144 -48
WIRE -224 16 -288 16
WIRE -208 16 -224 16
WIRE 48 80 48 64
WIRE 144 80 144 64
WIRE -624 96 -624 80
WIRE -528 96 -528 80
WIRE -416 96 -416 80
WIRE -288 96 -288 16
WIRE -160 144 -160 128
WIRE -64 144 -64 128
WIRE -624 192 -624 176
WIRE -528 192 -528 176
WIRE -416 192 -416 176
WIRE -288 192 -288 176
SYMBOL cap 128 0 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -240 -48 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL voltage -624 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -416 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 1.8
SYMBOL voltage -288 80 R0
WINDOW 3 50 115 Left 2
SYMATTR Value pulse(0 1.8 0 1u 1u 5m 10m)
SYMATTR InstName V4
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage -528 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL ADG1412L -112 0 R0
SYMATTR InstName U1
FLAG -528 192 0
FLAG -624 192 0
FLAG -624 80 +V
FLAG -528 80 -V
FLAG -368 -48 0
FLAG -160 144 -V
FLAG -64 -128 +V
FLAG -64 144 0
FLAG -288 192 0
FLAG 48 80 0
FLAG -416 192 0
FLAG -416 80 VL
FLAG -160 -128 VL
FLAG 144 80 0
FLAG -224 -48 S
FLAG -224 16 IN
FLAG 0 -48 D
TEXT -632 240 Left 2 !.tran 30m
TEXT -664 -216 Left 2 ;Note:\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\1bf9cef0cbfb_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R_T Vt 0 12k
D V- 0 D
Vin Vin 0 PULSE(-5 5 0 0 0 2m 10m 100000)
I1 0 V- PULSE(0 10m 0 0 0 1n 10000 1)
C_T Vt Vin 1n
Vdd Vdd 0 10
R2 Vout V+ 12k
C V- 0 150n
R1 V+ 0 12k
R Vout V- 12k
D_T V+ Vt D
XU1 V+ V- Vdd Vss Vout level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
Vss Vss 0 -10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 10.01m 0 0.1m
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -32 16 -32
WIRE 208 -32 144 -32
WIRE 368 -32 288 -32
WIRE 16 0 16 -32
WIRE 16 96 16 64
WIRE -560 112 -560 0
WIRE -400 112 -400 0
WIRE 240 128 240 112
WIRE 64 144 -32 144
WIRE 144 144 144 -32
WIRE 144 144 64 144
WIRE 208 144 144 144
WIRE 64 160 64 144
WIRE 368 160 368 -32
WIRE 368 160 272 160
WIRE 432 160 368 160
WIRE 208 176 144 176
WIRE 240 208 240 192
WIRE -560 272 -560 192
WIRE -400 272 -400 192
WIRE -144 320 -208 320
WIRE -16 320 -80 320
WIRE 32 320 -16 320
WIRE 144 320 144 176
WIRE 144 320 96 320
WIRE 208 320 144 320
WIRE 368 320 368 160
WIRE 368 320 288 320
WIRE -208 384 -208 320
WIRE -16 384 -16 320
WIRE 144 416 144 320
WIRE -16 512 -16 464
WIRE -208 528 -208 464
WIRE 144 528 144 496
IOPIN 240 112 In
IOPIN 240 208 In
IOPIN 432 160 Out
IOPIN -560 0 Out
IOPIN -400 0 Out
SYMBOL cap -80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C_T
SYMATTR Value 1n
SYMBOL current -32 224 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value PULSE(0 10m 0 0 0 1n 10000 1)
SYMBOL res 128 400 R0
SYMATTR InstName R1
SYMATTR Value 12k
SYMBOL res -32 368 R0
SYMATTR InstName R_T
SYMATTR Value 12k
SYMBOL voltage -208 368 R0
WINDOW 0 -97 52 Left 2
WINDOW 3 -344 103 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(-5 5 0 0 0 2m 10m 100000)
SYMBOL res 304 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R
SYMATTR Value 12k
SYMBOL OpAmps\\UniversalOpAmp2 240 160 R0
SYMATTR InstName U1
SYMBOL res 304 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 12k
SYMBOL voltage -400 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vss
SYMATTR Value -10
SYMBOL diode 96 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D_T
SYMBOL voltage -560 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdd
SYMATTR Value 10
SYMBOL diode 0 0 R0
SYMATTR InstName D
SYMBOL cap 48 160 R0
SYMATTR InstName C
SYMATTR Value 150n
FLAG 64 224 0
FLAG 16 96 0
FLAG 144 528 0
FLAG -16 512 0
FLAG -208 528 0
FLAG 240 112 Vdd
FLAG 240 208 Vss
FLAG 432 160 Vout
FLAG -560 272 0
FLAG -400 272 0
FLAG -560 0 Vdd
FLAG -400 0 Vss
FLAG -32 224 0
FLAG 144 144 V-
FLAG 144 320 V+
FLAG -208 320 Vin
FLAG -16 320 Vt
TEXT -632 552 Left 2 !.tran 0 10.01m 0 0.1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8054.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 0 36.5K
V1 IN 0 24
R2 OUT N001 100K
R3 N001 0 11K
C1 OUT 0 22 V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
C2 OUT 0 68 V=50 Irms=410m Rser=0.2 Lser=0 mfg="Nichicon" pn="UPL1H680MPH" type="Al electrolytic"
Rload OUT 0 2.5
XU1 NC_01 NC_02 MP_03 0 MP_04 MP_05 NC_06 NC_07 IN IN IN IN MP_08 MP_09 MP_10 MP_11 MP_12 MP_13 MP_14 MP_15 MP_16 MP_17 MP_18 MP_19 OUT OUT MP_20 MP_21 MP_22 0 MP_23 NC_24 NC_25 NC_26 N002 NC_27 N001 LTM8054 ;pnba CTL)SS))LL)))IOUTmon)IINmon)Run)Iin)Vin)SVin)))))))))))))Vout)Iout))))GND))Mode)CLKout)Sync)RT)Comp)FB
.tran 1.5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8054.asy)
.lib LTM8054.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 728
WIRE -32 -192 -128 -192
WIRE -16 -192 -32 -192
WIRE 416 -192 400 -192
WIRE 464 -192 416 -192
WIRE 576 -192 464 -192
WIRE 656 -192 576 -192
WIRE 736 -192 656 -192
WIRE -128 -176 -128 -192
WIRE 464 -176 464 -192
WIRE 576 -176 576 -192
WIRE 656 -176 656 -192
WIRE 736 -176 736 -192
WIRE -32 -96 -32 -192
WIRE -16 -96 -32 -96
WIRE 416 -96 416 -192
WIRE 416 -96 400 -96
WIRE -128 -80 -128 -96
WIRE 576 -80 576 -112
WIRE 656 -80 656 -112
WIRE 736 -80 736 -96
WIRE -32 0 -32 -96
WIRE -16 0 -32 0
WIRE 464 0 464 -96
WIRE 464 0 400 0
WIRE 464 16 464 0
WIRE -32 96 -32 0
WIRE -16 96 -32 96
WIRE 464 112 464 96
WIRE -16 480 -32 480
WIRE -112 576 -128 576
WIRE -16 576 -32 576
WIRE 416 576 400 576
FLAG -128 576 0
FLAG -32 480 0
FLAG -128 -80 0
FLAG 416 576 0
FLAG 464 112 0
FLAG 576 -80 0
FLAG 656 -80 0
FLAG 736 -80 0
FLAG 736 -192 OUT
FLAG -128 -192 IN
SYMBOL res -16 560 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 36.5K
SYMBOL voltage -128 -192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 448 -192 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL res 448 0 R0
SYMATTR InstName R3
SYMATTR Value 11K
SYMBOL cap 560 -176 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
SYMBOL polcap 640 -176 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 68
SYMATTR InstName C2
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=50 Irms=410m Rser=0.2 Lser=0 mfg="Nichicon" pn="UPL1H680MPH" type="Al electrolytic"
SYMBOL res 720 -192 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL PowerProducts\\LTM8054 192 192 R0
SYMATTR InstName U1
TEXT 576 560 Left 2 !.tran 1.5m startup