Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8615.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8615.asy)
XU1 IN N001 +V -V OUT AD8615 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -2.5
R1 N001 0 1K
R2 OUT N001 1K
Rload OUT 0 2K
Vin IN 0 SINE(0 1 500K)
V1 +V 0 2.5
.tran 20u
.lib AD8615.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE 416 -1184 400 -1184
WIRE 512 -1184 496 -1184
WIRE 528 -1184 512 -1184
WIRE 624 -1184 608 -1184
WIRE 176 -1088 176 -1104
WIRE 272 -1088 272 -1104
WIRE 512 -1072 512 -1184
WIRE 528 -1072 512 -1072
WIRE 624 -1056 624 -1184
WIRE 624 -1056 592 -1056
WIRE 752 -1056 624 -1056
WIRE 528 -1040 416 -1040
WIRE 752 -1040 752 -1056
WIRE 416 -1024 416 -1040
WIRE 176 -992 176 -1008
WIRE 272 -992 272 -1008
WIRE 752 -944 752 -960
WIRE 416 -928 416 -944
SYMBOL voltage 176 -1104 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL AD8615 560 -1120 R0
SYMATTR InstName U1
SYMBOL res 512 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 624 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 736 -1056 R0
SYMATTR InstName Rload
SYMATTR Value 2K
SYMBOL voltage 416 -1040 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 500K)
SYMBOL voltage 272 -1104 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
FLAG 416 -928 0
FLAG 752 -1056 OUT
FLAG 416 -1040 IN
FLAG 560 -1088 +V
FLAG 560 -1024 -V
FLAG 400 -1184 0
FLAG 752 -944 0
FLAG 176 -1104 +V
FLAG 176 -992 0
FLAG 272 -1104 -V
FLAG 272 -992 0
TEXT 736 -856 Left 2 !.tran 20u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6902.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6902.asy)
R1 PH N002 20K
XU1 PH DIV PH OUT1 OUT2 OUT3 OUT4 0 N001 N002 LTC6902 ;pnba V+)DIV)PH)OUT1)OUT2)OUT3)OUT4)GND)MOD)SET
V1 PH 0 5
R2 PH N001 10K
.tran .5m startup
.lib LTC6902.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 -112 -32 -112
WIRE 400 -112 176 -112
WIRE -32 -48 -32 -112
WIRE 48 -48 -32 -48
WIRE 224 -48 48 -48
WIRE 384 -48 304 -48
WIRE -32 -16 -32 -48
WIRE 48 32 48 -48
WIRE 144 32 48 32
WIRE 384 32 384 -48
WIRE 384 32 368 32
WIRE -32 80 -32 64
WIRE 144 128 112 128
WIRE 400 128 400 -112
WIRE 400 128 368 128
WIRE 48 224 48 32
WIRE 96 224 48 224
WIRE 144 224 96 224
WIRE 384 224 368 224
WIRE 144 320 112 320
WIRE 400 320 368 320
WIRE 144 416 112 416
WIRE 400 416 368 416
SYMBOL res 80 -96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage -32 -32 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL LTC6902 256 224 R0
SYMATTR InstName U1
SYMBOL res 208 -32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 20K
FLAG 384 224 0
FLAG -32 80 0
FLAG 112 320 OUT1
FLAG 112 416 OUT2
FLAG 400 320 OUT4
FLAG 400 416 OUT3
FLAG 96 224 PH
FLAG 112 128 DIV
TEXT 520 416 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\17043509cc49_HALF_ADDER.asc
* Generated by LTspice 26.0.1 for Windows.
AX1 0 0 0 0 0 0 0 0 XOR
AX2 0 0 0 0 0 0 0 0 AND
V1 A 0 PULSE(0 2 4 0.001 0.001 4 8)
V2 B 0 PULSE(0 2 2 0.001 0.001 2 4)
V3 vdd 0 2
.tran 8
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
IOPIN -144 48 In
IOPIN 208 80 In
IOPIN 544 80 In
IOPIN 32 48 In
IOPIN 304 32 In
IOPIN 624 48 In
IOPIN -144 240 In
IOPIN 208 112 In
IOPIN 544 112 In
IOPIN 368 96 Out
IOPIN 704 96 Out
SYMBOL and 640 96 R0
SYMATTR InstName X2
SYMBOL xor 352 80 R0
SYMATTR InstName X1
SYMBOL voltage -144 32 R0
WINDOW 3 24 96 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 2 4 0.001 0.001 4 8)
SYMBOL voltage 32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 2
SYMBOL voltage -144 224 R0
WINDOW 3 24 96 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 2 0.001 0.001 2 4)
FLAG -144 128 0
FLAG 304 176 0
FLAG 624 144 0
FLAG -144 320 0
FLAG -144 48 A
FLAG 208 80 A
FLAG 544 80 A
FLAG 32 128 0
FLAG 32 48 vdd
FLAG 304 32 vdd
FLAG 624 48 vdd
FLAG -144 240 B
FLAG 208 112 B
FLAG 544 112 B
FLAG 368 96 Sum
FLAG 704 96 Carry
TEXT -256 384 Left 2 !.tran 8
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1807.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
R1 N002 N001 1K
R2 N001 N003 1K
XU1 N004 N001 +V 0 N002 LT1807 ;pnba In+)In-)V+)V-)OUT
C1 N002 N001 3p
C2 N003 0 150
R3 +V N004 5K
R4 N004 0 5K
C3 N004 IN 33
R5 IN 0 75
C4 N005 N002 1000
R6 N005 N006 75
T1 N006 0 OUT 0 Td=50n Z0=75
R7 OUT 0 75
V2 IN 0 AC 2 Rser=75
.ac oct 20 200K 200Meg
* 5V Single Supply Video Line Driver
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1807.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 160 -16 128 -16
WIRE 256 -16 224 -16
WIRE -192 48 -192 32
WIRE -48 80 -64 80
WIRE 32 80 16 80
WIRE 128 80 128 -16
WIRE 128 80 112 80
WIRE 144 80 128 80
WIRE 256 80 256 -16
WIRE 256 80 224 80
WIRE -192 144 -192 128
WIRE 32 192 16 192
WIRE 192 192 192 176
WIRE 192 192 112 192
WIRE 192 208 192 192
WIRE 128 224 128 80
WIRE 160 224 128 224
WIRE 256 240 256 80
WIRE 256 240 224 240
WIRE 304 240 256 240
WIRE 384 240 368 240
WIRE 512 240 464 240
WIRE 704 240 608 240
WIRE -112 256 -272 256
WIRE -64 256 -112 256
WIRE 16 256 16 192
WIRE 16 256 0 256
WIRE 160 256 16 256
WIRE 704 256 704 240
WIRE -272 272 -272 256
WIRE -112 272 -112 256
WIRE 16 272 16 256
WIRE 512 272 496 272
WIRE 624 272 608 272
WIRE 192 288 192 272
WIRE 704 352 704 336
WIRE -272 368 -272 352
WIRE -112 368 -112 352
WIRE 16 368 16 352
FLAG -192 144 0
FLAG 192 176 +V
FLAG -192 32 +V
FLAG -64 80 0
FLAG 192 288 0
FLAG 16 368 0
FLAG -112 368 0
FLAG 496 272 0
FLAG 624 272 0
FLAG 704 352 0
FLAG -272 368 0
FLAG 704 240 OUT
FLAG -272 256 IN
SYMBOL voltage -192 32 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 240 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 128 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL opamps\\LT1807 192 176 R0
SYMATTR InstName U1
SYMBOL cap 224 -32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 3p
SYMBOL cap 16 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 150
SYMBOL res 128 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5K
SYMBOL res 0 256 R0
SYMATTR InstName R4
SYMATTR Value 5K
SYMBOL cap 0 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 33
SYMBOL res -128 256 R0
SYMATTR InstName R5
SYMATTR Value 75
SYMBOL cap 368 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1000
SYMBOL res 368 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R6
SYMATTR Value 75
SYMBOL tline 560 256 R0
WINDOW 3 -71 46 Left 2
SYMATTR Value Td=50n Z0=75
SYMATTR InstName T1
SYMBOL res 688 240 R0
SYMATTR InstName R7
SYMATTR Value 75
SYMBOL voltage -272 256 R0
WINDOW 3 24 104 Invisible 2
WINDOW 123 39 60 Left 2
WINDOW 39 26 99 Left 2
SYMATTR Value ""
SYMATTR Value2 AC 2
SYMATTR SpiceLine Rser=75
SYMATTR InstName V2
TEXT 192 368 Left 2 !.ac oct 20 200K 200Meg
TEXT 272 -64 Bottom 2 ;5V Single Supply Video Line Driver
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP5300-4.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP5300-4.asy)
XU1 IN IN IN IN OUT N001 0 0 N002 0 ADP5300-4 ;pnba EN)PVin)Sync/Mode)VID)FB)VoutOK)Pgnd)Agnd)SW)Stop
Rload OUT 0 80
V1 IN 0 5
L1 N002 OUT 2.2 Rser=80m
C1 OUT 0 10
R1 OUT N001 1Meg
.tran 3.5m startup
.lib ADP5300-4.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 64 16 64
WIRE 160 64 112 64
WIRE 496 64 416 64
WIRE 608 64 576 64
WIRE 16 80 16 64
WIRE 112 144 112 64
WIRE 160 144 112 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 608 144 608 64
WIRE 608 144 560 144
WIRE 688 144 608 144
WIRE 608 160 608 144
WIRE 688 160 688 144
WIRE 16 176 16 160
WIRE 160 224 144 224
WIRE 560 224 560 144
WIRE 560 224 416 224
WIRE 608 256 608 224
WIRE 688 256 688 240
WIRE 112 304 112 144
WIRE 160 304 112 304
WIRE 432 304 416 304
WIRE 240 384 240 368
WIRE 336 384 336 368
WIRE 112 416 112 304
WIRE 432 416 432 304
WIRE 432 416 112 416
SYMBOL res 672 144 R0
SYMATTR Value 80
SYMATTR InstName Rload
SYMBOL ADP5300-4 288 192 R0
SYMATTR InstName U1
SYMBOL cap 592 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL voltage 16 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=80m
FLAG 608 256 0
FLAG 240 384 0
FLAG 16 176 0
FLAG 688 144 OUT
FLAG 688 256 0
FLAG 16 64 IN
FLAG 336 384 0
FLAG 144 224 0
TEXT 528 400 Left 2 !.tran 3.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1762-1.1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1762-1.1.asy)
R1 OUT 0 1
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1762 Radj=7333.33 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
C2 N003 0 10n
C1 N004 0 1
C4 OUT 0 10
R2 N001 IN 50K
V1 IN 0 1.6
C3 N002 0 1
.tran 1m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -128 -32 R0
SYMATTR InstName V1
SYMATTR Value 1.6
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL ADP1762-1.1 224 176 R0
SYMATTR InstName U1
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1581.asc
* Generated by LTspice 26.0.1 for Windows.
* Vout
* +
* -
* Remote Load Sensing
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1581.asy)
V2 N001 0 5
Iload N003 N006 PULSE(400m 10 150u 100n 100n 200u 600u)
R1 N003 N005 156
Rpar1 N003 N002 10m
Rpar2 N006 0 10m
V1 N004 0 12
R2 N005 N006 254
C1 N003 N006 22
XU1 N005 MP_01 N003 N002 N001 N004 LT1581 ;pnba ADJ))SENSE)OUTPUT)POWER)CONTROL
.tran 500u
.lib LT1584.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1492 680
WIRE 80 -96 -208 -96
WIRE -208 -80 -208 -96
WIRE 80 -48 80 -96
WIRE -208 16 -208 0
WIRE 272 16 256 16
WIRE 384 16 352 16
WIRE -96 96 -208 96
WIRE -208 112 -208 96
WIRE 288 176 256 176
WIRE 384 176 384 16
WIRE 384 176 288 176
WIRE 560 176 384 176
WIRE 288 192 288 176
WIRE -208 208 -208 192
WIRE 560 240 560 176
WIRE 384 256 384 176
WIRE 80 288 80 240
WIRE 288 288 288 272
WIRE 288 288 80 288
WIRE 288 304 288 288
WIRE 288 400 288 384
WIRE 384 400 384 320
WIRE 384 400 288 400
WIRE 560 400 560 320
WIRE 560 400 384 400
WIRE 384 416 384 400
WIRE 384 512 384 496
SYMBOL voltage -208 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL cap 368 256 R0
WINDOW 39 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 272 176 R0
SYMATTR InstName R1
SYMATTR Value 156
SYMBOL voltage -208 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL current 560 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 108 Left 2
SYMATTR InstName Iload
SYMATTR Value PULSE(400m 10 150u 100n 100n 200u 600u)
SYMBOL res 368 400 R0
SYMATTR InstName Rpar2
SYMATTR Value 10m
SYMBOL LT1581 80 96 R0
SYMATTR InstName U1
SYMBOL res 272 288 R0
SYMATTR InstName R2
SYMATTR Value 254
SYMBOL res 368 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rpar1
SYMATTR Value 10m
FLAG -208 208 0
FLAG -208 16 0
FLAG 384 512 0
TEXT 536 448 Left 2 !.tran 500u
TEXT 464 280 Left 2 ;Vout
TEXT 480 232 Left 2 ;+
TEXT 488 328 Left 2 ;-
TEXT 96 -120 Bottom 2 ;Remote Load Sensing
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG772.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:\nSwitch shown for a logic 0 input\nOnly one channel is modeled\nBandwidth is 424 MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG772.asy)
R1 vD 0 301
C1 vD 0 36p
V3 vIN 0 PULSE(0 3 0 1n 1n 20u 40u)
V2 vSB 0 0
XU1 vIN vSA vD vSB +V 0 ADG772 ;pnba IN)SA)D)SB)Vdd)GND
V1 vSA 0 2
V4 +V 0 3.3
.tran 100u
.lib ADG772.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1728 -272 -2032 -272
WIRE -1696 -272 -1728 -272
WIRE -2032 -256 -2032 -272
WIRE -1472 -240 -1504 -240
WIRE -1424 -240 -1472 -240
WIRE -1312 -240 -1424 -240
WIRE -1424 -224 -1424 -240
WIRE -1312 -224 -1312 -240
WIRE -1728 -208 -1920 -208
WIRE -1696 -208 -1728 -208
WIRE -1920 -192 -1920 -208
WIRE -2032 -160 -2032 -176
WIRE -1728 -144 -1776 -144
WIRE -1696 -144 -1728 -144
WIRE -1424 -128 -1424 -144
WIRE -1312 -128 -1312 -160
WIRE -1920 -96 -1920 -112
WIRE -1776 -80 -1776 -144
WIRE -1600 -16 -1600 -32
WIRE -1776 32 -1776 0
SYMBOL voltage -2208 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 3.3
SYMBOL voltage -2032 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL voltage -1920 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL ADG772 -1600 -192 R0
SYMATTR InstName U1
SYMBOL voltage -1776 -96 R0
WINDOW 3 24 136 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 1n 1n 20u 40u)
SYMATTR InstName V3
SYMBOL res -1440 -240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL cap -1328 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
FLAG -2032 -160 0
FLAG -1920 -96 0
FLAG -1776 32 0
FLAG -1600 -368 +V
FLAG -1424 -128 0
FLAG -1600 -16 0
FLAG -1312 -128 0
FLAG -2208 -176 0
FLAG -2208 -256 +V
FLAG -1728 -272 vSA
FLAG -1728 -208 vSB
FLAG -1728 -144 vIN
FLAG -1472 -240 vD
TEXT -1480 -24 Left 2 !.tran 100u
TEXT -2056 -584 Left 2 ;Notes:\nSwitch shown for a logic 0 input\nOnly one channel is modeled\nBandwidth is 424 MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\029814c98fc3_Fig13_32.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Vout Vin
Cload Vout 0 50f
M5 N002 VDD 0 0 N_50n l=50n w=500n
V1 Vin 0 PULSE(0 1 500p 1p 1p 1n 6n)
M2 VDD Vin N001 VDD P_50n l=50n w=1u
M4 VDD N001 Vout VDD P_50n l=50n w=1u
M3 Vout N001 N002 0 N_50n l=50n w=500n
M1 N001 Vin 0 0 N_50n l=50n w=500n
VDD VDD 0 1
M6 VDD VDD Vout VDD P_50n l=50n w=1u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 2.5n 0 1p
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3172 680
WIRE 192 -368 192 -384
WIRE 192 -352 192 -368
WIRE 192 -240 192 -272
WIRE 192 -160 192 -176
WIRE 192 -32 192 -80
WIRE 272 -176 192 -176
WIRE 368 -176 272 -176
WIRE 368 -176 368 -224
WIRE 368 -96 368 -176
WIRE 400 -224 368 -224
WIRE 400 -96 368 -96
WIRE 448 -304 448 -352
WIRE 448 -176 448 -208
WIRE 448 -32 448 -80
WIRE 624 -176 448 -176
WIRE 624 -176 624 -224
WIRE 624 -96 624 -176
WIRE 656 -224 624 -224
WIRE 656 -96 624 -96
WIRE 704 -304 704 -352
WIRE 704 -192 704 -208
WIRE 704 -176 704 -192
WIRE 704 -64 704 -80
WIRE 704 80 704 32
WIRE 944 -240 912 -240
WIRE 992 -320 992 -368
WIRE 992 -192 704 -192
WIRE 992 -192 992 -224
WIRE 1120 -192 992 -192
WIRE 1184 -192 1120 -192
WIRE 1184 -48 1184 -128
SYMBOL nmos4 656 -176 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M3
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 400 -176 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 192 -368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL pmos4 656 -304 R0
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M4
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL cap 1168 -192 R0
SYMATTR InstName Cload
SYMATTR Value 50f
SYMBOL pmos4 944 -320 R0
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M6
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL nmos4 656 -64 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M5
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL pmos4 400 -304 R0
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M2
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL voltage 192 -176 R0
WINDOW 3 -52 288 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 1 500p 1p 1p 1n 6n)
SYMATTR InstName V1
FLAG 448 -128 0
FLAG 192 -240 0
FLAG 192 -368 VDD
FLAG 448 -256 VDD
FLAG 448 -32 0
FLAG 448 -352 VDD
FLAG 704 -128 0
FLAG 704 -256 VDD
FLAG 704 80 0
FLAG 704 -352 VDD
FLAG 1184 -48 0
FLAG 192 -32 0
FLAG 1120 -192 Vout
FLAG 272 -176 Vin
FLAG 704 -16 0
FLAG 656 16 VDD
FLAG 992 -272 VDD
FLAG 992 -368 VDD
FLAG 912 -240 VDD
TEXT 136 144 Left 0 !.tran 0 2.5n 0 1p
TEXT 136 184 Left 0 !.lib cmosedu_models.txt
TEXT 264 -392 Left 0 ;Plot Vout Vin
* Z:\home\khalils\Downloads\files\data\raw_asc\98ffc836e112_LT1468.asc
* Generated by LTspice 26.0.1 for Windows.
* 100KHz Low Distortion Bandpass Filter
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1468.asy)
C1 N002 N001 1000p
C2 OUT N001 1000p
XU1 0 N002 +V -V OUT LT1468 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
V2 -V 0 -15
V3 IN 0 AC 1
R1 OUT N002 22.1K
R3 0 N001 121
R2 N001 IN 11K
.ac oct 100 10K 1Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -224 16 -224 0
WIRE -96 16 -96 0
WIRE 80 32 0 32
WIRE 304 32 144 32
WIRE 192 96 176 96
WIRE 304 96 304 32
WIRE 304 96 272 96
WIRE -224 112 -224 96
WIRE -96 112 -96 96
WIRE 240 208 240 192
WIRE -144 224 -208 224
WIRE 0 224 0 32
WIRE 0 224 -64 224
WIRE 80 224 0 224
WIRE 176 224 176 96
WIRE 176 224 144 224
WIRE 208 224 176 224
WIRE -208 240 -208 224
WIRE 0 240 0 224
WIRE 304 240 304 96
WIRE 304 240 272 240
WIRE 352 240 304 240
WIRE 208 256 176 256
WIRE 240 288 240 272
WIRE -208 336 -208 320
WIRE 0 336 0 320
SYMBOL res -16 336 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 121
SYMBOL cap 144 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL res 288 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 22.1K
SYMBOL voltage -208 224 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL res -48 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 11K
SYMBOL opamps\\LT1468 240 176 R0
SYMATTR InstName U1
SYMBOL cap 144 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000p
SYMBOL voltage -96 0 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -224 0 R0
SYMATTR InstName V2
SYMATTR Value -15
FLAG -96 112 0
FLAG 240 192 +V
FLAG -96 0 +V
FLAG 240 288 -V
FLAG -224 112 0
FLAG -224 0 -V
FLAG -208 336 0
FLAG 176 256 0
FLAG 0 336 0
FLAG 352 240 OUT
FLAG -208 224 IN
TEXT 96 352 Left 2 !.ac oct 100 10K 1Meg
TEXT 80 -56 Bottom 2 ;100KHz Low Distortion Bandpass Filter
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG842.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 3.3
VS S 0 3
V2 IN 0 PULSE(0 2.4 0 10n 10n 980n 2u)
R1 D 0 47
C1 D 0 33p
XU1 +V IN S D 0 ADG842 ;pnba Vdd)IN)S)D)GND
.tran 10u
* Note:\nSwitch shown for a logic 0 input.\nCharge injection not included.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG842.asy)
.lib ADG842.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2844 1336
WIRE -144 -96 -144 -112
WIRE -368 -16 -400 -16
WIRE -272 -16 -288 -16
WIRE -240 -16 -272 -16
WIRE -32 -16 -48 -16
WIRE 0 -16 -32 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE -480 32 -480 16
WIRE 112 32 112 -16
WIRE -272 48 -368 48
WIRE -240 48 -272 48
WIRE -368 112 -368 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -480 128 -480 112
WIRE -144 176 -144 160
WIRE -368 272 -368 192
FLAG -480 128 0
FLAG -480 16 +V
FLAG -400 -16 0
FLAG -144 -112 +V
FLAG -144 176 0
FLAG -368 272 0
FLAG 0 112 0
FLAG 112 112 0
FLAG -272 -16 S
FLAG -272 48 IN
FLAG -32 -16 D
SYMBOL voltage -480 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage -272 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL voltage -368 96 R0
WINDOW 3 17 129 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 2.4 0 10n 10n 980n 2u)
SYMATTR InstName V2
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 47
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 33p
SYMBOL ADG842 -144 32 R0
SYMATTR InstName U1
TEXT 24 184 Left 2 !.tran 10u
TEXT -592 -232 Left 2 ;Note:\nSwitch shown for a logic 0 input.\nCharge injection not included.