* Z:\home\khalils\Downloads\files\data\raw_asc\AD4696.asc
* Generated by LTspice 26.0.1 for Windows.
* Simulation Setup
* Kickback Filter
* OSR - Oversampling ratio\nSEQ_EN - Sequencer enable\nCNV_FREQ_NOISE - sampling frequency for noise analysis (must be 0 for transient simulations)\nCNV_CH_NOISE - sampled channel for noise analsis\nCOM_OPT: optional conversion reference COMM instead of REFGND\nHIZ: Input precharge enable
* Sampling Frequency
* IN7 Channel RC Kickback Filter
* IN7 Channel Stimulus
* Part parameters:
* IN6 Channel RC Kickback Filter
* IN6 Channel Stimulus
* IN5 Channel RC Kickback Filter
* IN5 Channel Stimulus
* IN4 Channel RC Kickback Filter
* IN4 Channel Stimulus
* IN3 Channel RC Kickback Filter
* IN3 Channel Stimulus
* IN2 Channel RC Kickback Filter
* IN2 Channel Stimulus
* IN1 Channel RC Kickback Filter
* IN1 Channel Stimulus
* IN0 Channel RC Kickback Filter
* IN0 Channel Stimulus
* .noise v(vsample) V14 dec 100 0.001u 10000000\n.measure noise NOISERMS integ V(onoise) from 0.1 to 10Meg\n.measure noise NOISEFLCIK integ V(onoise) from 0.1 to 10
* Set the following text as SPICE directive for Noise Simulation
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\AD4696.asy)
A1 vsample 0 in0_sampled 0 0 0 vsampled_in0 0 SAMPLEHOLD
A4 vsample 0 in1_sampled 0 0 0 vsampled_in1 0 SAMPLEHOLD
A3 CH_OUT0 0 0 0 0 in0_sampled in1_sampled 0 BUF td=400n trise = 1n
V_RESET RESET 0 PULSE(0 1.8 10u 10n 10n 10n 1 1)
C2 vsampled_in0 0 1p
XU1 IN0 IN1 IN2 IN3 IN4 IN5 IN6 IN7 0 N004 N005 N006 0 CH_OUT0 NC_09 NC_10 vsample RESET CNV N003 N002 N002 REF REF AD4696 OSR=1 SEQ_EN=0 CNV_FREQ_NOISE=0 CNV_CH_NOISE=0 COM_OPT=0 ;pnba IN0)IN1)IN2)IN3)IN4)IN5)IN6)IN7)COMM)SLCT0)SLCT1)SLCT2)REFGND)CH_OUT0)CH_OUT1)CH_OUT2)VSAMPLE)RESET)CNV)VDD)LDO_IN)AVDD)REF)REFIN
C8 vsampled_in1 0 1p
R4 IN7 VS7 {Rext} noiseless
V_AVDD N002 0 5
V10 VS4 0 3
C16 IN1 0 {Cext}
CREF REF 0 1F
V4 VS7 0 4.8
R12 IN2 VS2 {Rext} noiseless
V_SLCT1 N005 0 PULSE(0 1.8 {110u-0.5*t_cnv+2*t_cnv} 10n 10n {2*t_cnv-20n} {t_cnv*4})
C14 IN3 0 {Cext}
C17 IN0 0 {Cext}
V_SLCT0 N004 0 PULSE(0 1.8 {110u+0.5*t_cnv} 10n 10n {t_cnv-20n} {t_cnv*2})
RREF REF N001 1
V3 VS5 0 3.6
V13 VS1 0 1.2
R9 IN6 VS6 {Rext} noiseless
R11 IN3 VS3 {Rext} noiseless
C4 IN5 0 {Cext}
C13 IN4 0 {Cext}
V_SLCT2 N006 0 PULSE(0 1.8 {110u-0.5*t_cnv+4*t_cnv} 10n 10n {4*t_cnv-20n} {t_cnv*8})
V14 VS0 0 0.6
V_CNV CNV 0 PULSE(0 1.8 110u 10n 10n 10n {t_cnv})
V_VDD N003 0 1.8
V11 VS3 0 2.4
R14 IN0 VS0 {Rext} noiseless
R13 IN1 VS1 {Rext} noiseless
C12 IN6 0 {Cext}
V12 VS2 0 1.8
V_REF N001 0 5
R3 IN5 VS5 {Rext} noiseless
C5 IN7 0 {Cext}
C6 vsample 0 1p
R10 IN4 VS4 {Rext} noiseless
C15 IN2 0 {Cext}
V9 VS6 0 4.2
.tran 0 {t_cnv*64+110u}
.param f_cnv=1Meg
.param t_cnv=1/f_cnv
.param Rext=4.12k
.param Cext=1n
.lib AD4696.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 5928 2704
WIRE -816 -256 -832 -256
WIRE -608 -256 -816 -256
WIRE -448 -256 -528 -256
WIRE -384 -256 -448 -256
WIRE -352 -256 -384 -256
WIRE -832 -208 -832 -256
WIRE -448 -208 -448 -256
WIRE -448 -128 -448 -144
WIRE -832 -96 -832 -128
WIRE -816 48 -832 48
WIRE -608 48 -816 48
WIRE -448 48 -528 48
WIRE -384 48 -448 48
WIRE -352 48 -384 48
WIRE -832 96 -832 48
WIRE -448 96 -448 48
WIRE -448 176 -448 160
WIRE -832 208 -832 176
WIRE -96 240 -208 240
WIRE 16 240 -96 240
WIRE -96 256 -96 240
WIRE -208 320 -208 240
WIRE -816 352 -832 352
WIRE -608 352 -816 352
WIRE -448 352 -528 352
WIRE -384 352 -448 352
WIRE -352 352 -384 352
WIRE -96 352 -96 336
WIRE 208 352 208 320
WIRE -832 400 -832 352
WIRE -448 400 -448 352
WIRE 304 416 304 400
WIRE -208 448 -208 384
WIRE -144 448 -208 448
WIRE -96 448 -96 432
WIRE -96 448 -144 448
WIRE -448 480 -448 464
WIRE -144 480 -144 448
WIRE 16 496 16 240
WIRE 16 496 -16 496
WIRE -832 512 -832 480
WIRE 208 512 208 432
WIRE 256 512 208 512
WIRE -16 528 -16 496
WIRE 16 528 16 496
WIRE 208 528 208 512
WIRE 256 528 256 512
WIRE 304 528 304 496
WIRE -128 544 -208 544
WIRE -128 576 -208 576
WIRE -128 608 -208 608
WIRE 480 624 384 624
WIRE 848 624 480 624
WIRE -128 640 -208 640
WIRE 848 640 848 624
WIRE -816 656 -832 656
WIRE -608 656 -816 656
WIRE -448 656 -528 656
WIRE -384 656 -448 656
WIRE -352 656 -384 656
WIRE 480 656 384 656
WIRE 656 656 480 656
WIRE -128 672 -208 672
WIRE 656 688 656 656
WIRE -832 704 -832 656
WIRE -448 704 -448 656
WIRE -128 704 -208 704
WIRE -128 736 -208 736
WIRE 448 736 384 736
WIRE 512 736 448 736
WIRE 848 736 848 720
WIRE 448 752 448 736
WIRE -128 768 -208 768
WIRE -448 784 -448 768
WIRE 656 784 656 768
WIRE -832 816 -832 784
WIRE -128 816 -208 816
WIRE 448 832 448 816
WIRE -128 848 -256 848
WIRE 912 864 848 864
WIRE -128 880 -208 880
WIRE 672 896 592 896
WIRE -128 912 -160 912
WIRE 448 912 384 912
WIRE 528 912 448 912
WIRE 1136 912 1088 912
WIRE 1216 912 1136 912
WIRE 816 928 592 928
WIRE 912 928 816 928
WIRE 1136 928 1136 912
WIRE -816 960 -832 960
WIRE -608 960 -816 960
WIRE -448 960 -528 960
WIRE -384 960 -448 960
WIRE -352 960 -384 960
WIRE 128 960 128 944
WIRE 528 960 528 944
WIRE -832 1008 -832 960
WIRE -448 1008 -448 960
WIRE 912 1008 912 992
WIRE 1136 1008 1136 992
WIRE -448 1088 -448 1072
WIRE -160 1104 -160 912
WIRE 912 1104 848 1104
WIRE -832 1120 -832 1088
WIRE 1136 1152 1088 1152
WIRE 1216 1152 1136 1152
WIRE 672 1168 672 896
WIRE 816 1168 672 1168
WIRE 912 1168 816 1168
WIRE 1136 1168 1136 1152
WIRE -160 1200 -160 1184
WIRE -208 1232 -208 880
WIRE 912 1248 912 1232
WIRE 1136 1248 1136 1232
WIRE -816 1264 -832 1264
WIRE -608 1264 -816 1264
WIRE -448 1264 -528 1264
WIRE -384 1264 -448 1264
WIRE -352 1264 -384 1264
WIRE -832 1312 -832 1264
WIRE -448 1312 -448 1264
WIRE -208 1328 -208 1312
WIRE -256 1360 -256 848
WIRE -448 1392 -448 1376
WIRE -832 1424 -832 1392
WIRE -256 1472 -256 1440
WIRE -816 1568 -832 1568
WIRE -608 1568 -816 1568
WIRE -448 1568 -528 1568
WIRE -384 1568 -448 1568
WIRE -352 1568 -384 1568
WIRE -832 1616 -832 1568
WIRE -448 1616 -448 1568
WIRE -448 1696 -448 1680
WIRE -832 1728 -832 1696
WIRE -816 1872 -832 1872
WIRE -608 1872 -816 1872
WIRE -448 1872 -528 1872
WIRE -384 1872 -448 1872
WIRE -352 1872 -384 1872
WIRE -832 1920 -832 1872
WIRE -448 1920 -448 1872
WIRE -448 2000 -448 1984
WIRE -832 2032 -832 2000
RECTANGLE Normal -336 2064 -752 1808 4
RECTANGLE Normal -864 2064 -768 1808 4
RECTANGLE Normal -336 1760 -752 1504 4
RECTANGLE Normal -864 1760 -768 1504 4
RECTANGLE Normal -336 1456 -752 1200 4
RECTANGLE Normal -864 1456 -768 1200 4
RECTANGLE Normal -336 1152 -752 896 4
RECTANGLE Normal -864 1152 -768 896 4
RECTANGLE Normal -336 848 -752 592 4
RECTANGLE Normal -864 848 -768 592 4
RECTANGLE Normal -336 544 -752 288 4
RECTANGLE Normal -864 544 -768 288 4
RECTANGLE Normal -336 240 -752 -16 4
RECTANGLE Normal -864 240 -768 -16 4
RECTANGLE Normal -336 -64 -752 -320 4
RECTANGLE Normal -864 -64 -768 -320 4
SYMBOL voltage -832 1296 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 19 101 Left 2
SYMATTR Value 3.6
SYMATTR InstName V3
SYMBOL cap -464 1008 R0
WINDOW 3 28 54 Left 2
SYMATTR Value {Cext}
SYMATTR InstName C13
SYMBOL res -112 240 R0
SYMATTR InstName RREF
SYMATTR Value 1
SYMBOL voltage -160 1088 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PULSE(0 1.8 {110u-0.5*t_cnv+4*t_cnv} 10n 10n {4*t_cnv-20n} {t_cnv*8})
SYMATTR InstName V_SLCT2
SYMBOL voltage -832 1600 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 19 101 Left 2
SYMATTR Value 4.2
SYMATTR InstName V9
SYMBOL voltage -832 384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 19 101 Left 2
SYMATTR Value 1.8
SYMATTR InstName V12
SYMBOL cap -464 96 R0
WINDOW 3 28 52 Left 2
SYMATTR Value {Cext}
SYMATTR InstName C16
SYMBOL cap -464 -208 R0
WINDOW 3 28 52 Left 2
SYMATTR Value {Cext}
SYMATTR InstName C17
SYMBOL cap 1120 1168 R0
SYMATTR InstName C8
SYMATTR Value 1p
SYMBOL res -512 1856 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value {Rext} noiseless
SYMBOL res -512 1552 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R9
SYMATTR Value {Rext} noiseless
SYMBOL cap -464 1312 R0
WINDOW 3 30 54 Left 2
SYMATTR Value {Cext}
SYMATTR InstName C4
SYMBOL cap -224 320 R0
SYMATTR InstName CREF
SYMATTR Value 1F
SYMBOL cap -464 400 R0
WINDOW 3 30 51 Left 2
SYMATTR Value {Cext}
SYMATTR InstName C15
SYMBOL voltage 208 448 M180
WINDOW 123 24 -26 Left 2
WINDOW 39 24 -5 Left 2
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V_AVDD
SYMATTR Value 5
SYMBOL SpecialFunctions\\sample 992 1136 R0
WINDOW 0 17 -45 Left 2
SYMATTR InstName A4
SYMBOL voltage -208 1216 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PULSE(0 1.8 {110u-0.5*t_cnv+2*t_cnv} 10n 10n {2*t_cnv-20n} {t_cnv*4})
SYMATTR InstName V_SLCT1
SYMBOL voltage 656 672 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V_RESET
SYMATTR Value PULSE(0 1.8 10u 10n 10n 10n 1 1)
SYMBOL cap -464 1920 R0
WINDOW 3 26 52 Left 2
SYMATTR Value {Cext}
SYMATTR InstName C5
SYMBOL voltage -832 688 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 19 101 Left 2
SYMATTR Value 2.4
SYMATTR InstName V11
SYMBOL voltage -96 336 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V_REF
SYMATTR Value 5
SYMBOL res -512 640 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R11
SYMATTR Value {Rext} noiseless
SYMBOL voltage -832 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 19 101 Left 2
SYMATTR Value 0.6
SYMATTR InstName V14
SYMBOL Digital\\buf 528 848 R0
WINDOW 3 33 127 Left 2
WINDOW 0 20 26 Left 2
WINDOW 123 33 104 Left 2
SYMATTR Value td=400n
SYMATTR InstName A3
SYMATTR Value2 trise = 1n
SYMBOL res -512 944 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R10
SYMATTR Value {Rext} noiseless
SYMBOL cap 1120 928 R0
SYMATTR InstName C2
SYMATTR Value 1p
SYMBOL res -512 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R13
SYMATTR Value {Rext} noiseless
SYMBOL AD4696 -48 816 R0
SYMATTR InstName U1
SYMBOL voltage -832 1904 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 19 101 Left 2
SYMATTR Value 4.8
SYMATTR InstName V4
SYMBOL cap 432 752 R0
WINDOW 0 31 16 Left 2
WINDOW 3 32 51 Left 2
SYMATTR InstName C6
SYMATTR Value 1p
SYMBOL cap -464 704 R0
WINDOW 3 28 54 Left 2
SYMATTR Value {Cext}
SYMATTR InstName C14
SYMBOL voltage -832 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 19 101 Left 2
SYMATTR Value 1.2
SYMATTR InstName V13
SYMBOL res -512 336 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R12
SYMATTR Value {Rext} noiseless
SYMBOL voltage 304 512 M180
WINDOW 123 24 -26 Left 2
WINDOW 39 24 -5 Left 2
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V_VDD
SYMATTR Value 1.8
SYMBOL res -512 -272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R14
SYMATTR Value {Rext} noiseless
SYMBOL voltage 848 624 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PULSE(0 1.8 110u 10n 10n 10n {t_cnv})
SYMATTR InstName V_CNV
SYMBOL cap -464 1616 R0
WINDOW 3 29 53 Left 2
SYMATTR Value {Cext}
SYMATTR InstName C12
SYMBOL voltage -256 1344 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PULSE(0 1.8 {110u+0.5*t_cnv} 10n 10n {t_cnv-20n} {t_cnv*2})
SYMATTR InstName V_SLCT0
SYMBOL voltage -832 992 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 19 101 Left 2
SYMATTR Value 3
SYMATTR InstName V10
SYMBOL res -512 1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value {Rext} noiseless
SYMBOL SpecialFunctions\\sample 992 896 R0
WINDOW 0 13 -43 Left 2
SYMATTR InstName A1
FLAG 304 400 0
FLAG -144 480 0
FLAG 848 736 0
FLAG 656 784 0
FLAG 848 864 vsample
FLAG 816 928 in0_sampled
FLAG 1216 912 vsampled_in0
FLAG 1136 1008 0
FLAG 448 832 0
FLAG 848 1104 vsample
FLAG 816 1168 in1_sampled
FLAG 1216 1152 vsampled_in1
FLAG 1136 1248 0
FLAG -208 544 IN0
FLAG -208 576 IN1
FLAG -256 1472 0
FLAG 128 960 0
FLAG 480 656 RESET
FLAG -16 496 REF
FLAG 480 624 CNV
FLAG 448 912 CH_OUT0
FLAG 512 736 vsample
FLAG 208 320 0
FLAG -208 1328 0
FLAG -160 1200 0
FLAG -448 2000 0
FLAG -384 1872 IN7
FLAG -816 1872 VS7
FLAG -832 2032 0
FLAG -208 608 IN2
FLAG -208 640 IN3
FLAG -208 672 IN4
FLAG -208 704 IN5
FLAG -208 736 IN6
FLAG -208 768 IN7
FLAG -208 816 0
FLAG -448 1696 0
FLAG -384 1568 IN6
FLAG -816 1568 VS6
FLAG -832 1728 0
FLAG -448 1392 0
FLAG -384 1264 IN5
FLAG -816 1264 VS5
FLAG -832 1424 0
FLAG -448 1088 0
FLAG -384 960 IN4
FLAG -816 960 VS4
FLAG -832 1120 0
FLAG -448 784 0
FLAG -384 656 IN3
FLAG -816 656 VS3
FLAG -832 816 0
FLAG -448 480 0
FLAG -384 352 IN2
FLAG -816 352 VS2
FLAG -832 512 0
FLAG -448 176 0
FLAG -384 48 IN1
FLAG -816 48 VS1
FLAG -832 208 0
FLAG -448 -128 0
FLAG -384 -256 IN0
FLAG -816 -256 VS0
FLAG -832 -96 0
FLAG 528 960 0
FLAG 912 1008 0
FLAG 912 1248 0
TEXT 600 1416 Left 3 ;Simulation Setup
TEXT 64 144 Left 2 ;Kickback Filter
TEXT 600 1456 Left 2 !.tran 0 {t_cnv*64+110u}
TEXT -184 -104 Left 2 ;OSR - Oversampling ratio\nSEQ_EN - Sequencer enable\nCNV_FREQ_NOISE - sampling frequency for noise analysis (must be 0 for transient simulations)\nCNV_CH_NOISE - sampled channel for noise analsis\nCOM_OPT: optional conversion reference COMM instead of REFGND\nHIZ: Input precharge enable
TEXT -192 88 Left 2 !.param f_cnv=1Meg\n.param t_cnv=1/f_cnv\n.param Rext=4.12k\n.param Cext=1n
TEXT 64 88 Left 2 ;Sampling Frequency
TEXT -752 2040 Left 2 ;IN7 Channel RC Kickback Filter
TEXT -952 2088 Left 2 ;IN7 Channel Stimulus
TEXT -184 -144 Left 3 ;Part parameters:
TEXT -752 1736 Left 2 ;IN6 Channel RC Kickback Filter
TEXT -952 1784 Left 2 ;IN6 Channel Stimulus
TEXT -752 1432 Left 2 ;IN5 Channel RC Kickback Filter
TEXT -952 1480 Left 2 ;IN5 Channel Stimulus
TEXT -752 1128 Left 2 ;IN4 Channel RC Kickback Filter
TEXT -952 1176 Left 2 ;IN4 Channel Stimulus
TEXT -752 824 Left 2 ;IN3 Channel RC Kickback Filter
TEXT -952 872 Left 2 ;IN3 Channel Stimulus
TEXT -752 520 Left 2 ;IN2 Channel RC Kickback Filter
TEXT -952 568 Left 2 ;IN2 Channel Stimulus
TEXT -752 216 Left 2 ;IN1 Channel RC Kickback Filter
TEXT -952 264 Left 2 ;IN1 Channel Stimulus
TEXT -752 -88 Left 2 ;IN0 Channel RC Kickback Filter
TEXT -952 -40 Left 2 ;IN0 Channel Stimulus
TEXT 600 1552 Left 2 ;.noise v(vsample) V14 dec 100 0.001u 10000000\n.measure noise NOISERMS integ V(onoise) from 0.1 to 10Meg\n.measure noise NOISEFLCIK integ V(onoise) from 0.1 to 10
TEXT 600 1512 Left 3 ;Set the following text as SPICE directive for Noise Simulation