Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\13ffcecf19f0_Howland.asc
* Generated by LTspice 26.0.1 for Windows.
* Iout = V(in)/1K
* This example schematic is supplied for informational/educational purposes only.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
XU2 N003 N001 +V -V N002 LT1001 ;pnba In+)In-)V+)V-)OUT
R3 N002 N003 1K
V3 IN 0 SINE(0 1 1K)
Rload N003 0 {x}
V2 -V 0 -15
R2 N001 IN 1K
R4 N003 0 1K
V1 +V 0 +15
R1 N002 N001 1K
.tran 3m
.step param X list 1 10 100 1K
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 696
WIRE 32 160 -96 160
WIRE 144 160 112 160
WIRE 192 160 144 160
WIRE 304 160 272 160
WIRE -96 176 -96 160
WIRE 144 256 144 160
WIRE 160 256 144 256
WIRE -96 272 -96 256
WIRE 304 272 304 160
WIRE 304 272 224 272
WIRE 160 288 144 288
WIRE -304 336 -304 320
WIRE -176 336 -176 320
WIRE 16 368 -16 368
WIRE 144 368 144 288
WIRE 144 368 96 368
WIRE 192 368 144 368
WIRE 304 368 304 272
WIRE 304 368 272 368
WIRE 144 416 144 368
WIRE 544 416 144 416
WIRE 656 416 624 416
WIRE -304 432 -304 416
WIRE -176 432 -176 416
SYMBOL res 128 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 288 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 112 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL voltage -304 320 R0
SYMATTR InstName V1
SYMATTR Value +15
SYMBOL voltage -176 320 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 288 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL res 528 432 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rload
SYMATTR Value {x}
SYMBOL opamps\\LT1001 192 208 R0
SYMATTR InstName U2
SYMBOL voltage -96 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
FLAG -176 432 0
FLAG -304 432 0
FLAG 192 240 +V
FLAG -304 320 +V
FLAG -176 320 -V
FLAG 192 304 -V
FLAG -96 272 0
FLAG -96 160 IN
FLAG -16 368 0
FLAG 656 416 0
TEXT 344 472 Left 2 !.tran 3m
TEXT 344 504 Left 2 !.step param X list 1 10 100 1K
TEXT 400 416 Bottom 2 ;Iout = V(in)/1K
TEXT 128 528 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7171-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7171-2.5.asy)
Rload OUT 0 4
V1 IN 0 3
C1 OUT 0 4.7 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADM7171-2.5 ;pnba Vin)Sense)EN)SS)Vout)GND
C2 N001 0 1n
.tran 5m startup
.lib ADM7171-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 4
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL ADM7171-2.5 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP5304-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP5304-2.asy)
Rload OUT 0 80
XU1 IN IN 0 0 OUT N001 0 0 N002 ADP5304-2 ;pnba EN)PVin)Mode)VID)FB)VinOK)Pgnd)Agnd)SW
V1 IN 0 5
L1 N002 OUT 2.2 Rser=80m
C1 OUT 0 10
R1 OUT N001 1Meg
.tran .6m startup
.lib ADP5304-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 64 64 64
WIRE 160 64 144 64
WIRE 480 64 416 64
WIRE 608 64 560 64
WIRE 64 80 64 64
WIRE 144 144 144 64
WIRE 160 144 144 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 608 144 608 64
WIRE 608 144 560 144
WIRE 688 144 608 144
WIRE 608 160 608 144
WIRE 688 160 688 144
WIRE 64 176 64 160
WIRE 160 224 144 224
WIRE 560 224 560 144
WIRE 560 224 416 224
WIRE 608 256 608 224
WIRE 688 256 688 240
WIRE 160 304 144 304
WIRE 432 304 416 304
WIRE 288 384 288 368
SYMBOL ADP5304-2 288 192 R0
SYMATTR InstName U1
SYMBOL res 672 144 R0
SYMATTR Value 80
SYMATTR InstName Rload
SYMBOL voltage 64 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 576 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=80m
SYMBOL cap 592 160 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 608 256 0
FLAG 432 304 0
FLAG 64 176 0
FLAG 688 144 OUT
FLAG 688 256 0
FLAG 64 64 IN
FLAG 288 384 0
FLAG 144 304 0
FLAG 144 224 0
TEXT 440 384 Left 2 !.tran .6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\279850fd073f_pad_buffer.asc
* Generated by LTspice 26.0.1 for Windows.
AX1 N008 vss vss vss vss vss vss vss BUF wn={wpad* fac * fac * fac * fac * fac * fac * fac } wp={wpad * mp * fac * fac * fac* fac * fac* fac * fac }
AX2 N009 vss vss vss vss vss vss vss BUF wn={wpad* fac * fac * fac * fac * fac * fac } wp={wpad * mp * fac * fac * fac* fac * fac* fac}
AX3 N010 vss vss vss vss vss vss vss BUF wn={wpad* fac * fac * fac * fac * fac} wp={wpad * mp * fac * fac * fac* fac * fac}
AX4 N011 vss vss vss vss vss vss vss BUF wn={wpad* fac * fac * fac * fac} wp={wpad * mp * fac * fac * fac* fac}
AX5 N012 vss vss vss vss vss vss vss BUF wn={wpad* fac * fac * fac} wp={wpad * mp * fac * fac * fac}
AX6 N013 vss vss vss vss vss vss vss BUF wn={wpad* fac * fac} wp={wpad * mp * fac* fac}
AX7 N014 vss vss vss vss vss vss vss BUF wn={wpad* fac} wp={wpad * mp * fac}
AX8 N015 vss vss vss vss vss vss vss BUF wn={wpad} wp={wpad * mp}
.param wpad=360u mp=2.16 fac=0.401
.lib BU_180nm.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1168 680
WIRE 176 224 -16 224
WIRE 256 224 176 224
WIRE 336 224 256 224
WIRE 416 224 336 224
WIRE 496 224 416 224
WIRE 576 224 496 224
WIRE 656 224 576 224
WIRE 736 224 656 224
WIRE 176 304 176 224
WIRE 256 304 256 224
WIRE 336 304 336 224
WIRE 416 304 416 224
WIRE 496 304 496 224
WIRE 576 304 576 224
WIRE 656 304 656 224
WIRE 736 304 736 224
WIRE 160 320 -16 320
WIRE 240 320 208 320
WIRE 320 320 288 320
WIRE 400 320 368 320
WIRE 480 320 448 320
WIRE 560 320 528 320
WIRE 640 320 608 320
WIRE 720 320 688 320
WIRE 896 320 768 320
WIRE 176 416 176 336
WIRE 176 416 -16 416
WIRE 256 416 256 336
WIRE 256 416 176 416
WIRE 336 416 336 336
WIRE 336 416 256 416
WIRE 416 416 416 336
WIRE 416 416 336 416
WIRE 496 416 496 336
WIRE 496 416 416 416
WIRE 576 416 576 336
WIRE 576 416 496 416
WIRE 656 416 656 336
WIRE 656 416 576 416
WIRE 736 416 736 336
WIRE 736 416 656 416
SYMBOL inv 656 320 R0
SYMATTR InstName X7
SYMATTR SpiceLine wn={wpad* fac} wp={wpad * mp * fac}
SYMBOL inv 496 320 R0
SYMATTR InstName X5
SYMATTR SpiceLine wn={wpad* fac * fac * fac} wp={wpad * mp * fac * fac * fac}
SYMBOL inv 576 320 R0
SYMATTR InstName X6
SYMATTR SpiceLine wn={wpad* fac * fac} wp={wpad * mp * fac* fac}
SYMBOL inv 736 320 R0
SYMATTR InstName X8
SYMATTR SpiceLine wn={wpad} wp={wpad * mp}
SYMBOL inv 336 320 R0
SYMATTR InstName X3
SYMATTR SpiceLine wn={wpad* fac * fac * fac * fac * fac} wp={wpad * mp * fac * fac * fac* fac * fac}
SYMBOL inv 176 320 R0
SYMATTR InstName X1
SYMATTR SpiceLine wn={wpad* fac * fac * fac * fac * fac * fac * fac } wp={wpad * mp * fac * fac * fac* fac * fac* fac * fac }
SYMBOL inv 256 320 R0
SYMATTR InstName X2
SYMATTR SpiceLine wn={wpad* fac * fac * fac * fac * fac * fac } wp={wpad * mp * fac * fac * fac* fac * fac* fac}
SYMBOL inv 416 320 R0
SYMATTR InstName X4
SYMATTR SpiceLine wn={wpad* fac * fac * fac * fac} wp={wpad * mp * fac * fac * fac* fac}
FLAG -16 224 vdd
FLAG -16 320 in
FLAG 896 320 out
FLAG -16 416 vss
TEXT -40 128 Left 2 !.param wpad=360u mp=2.16 fac=0.401\n.lib BU_180nm.lib
* Z:\tmp\asc_dec_bjh7r6w2\03e42dc53998_Out_Rect_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
B1 Vb 0 V=.6*{vpeak-2*vf}-.4244*{vpeak-2*vf}*cos (628.31853*time)
D4 N002 Vrect MURS120
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 916 680
WIRE -224 64 -320 64
WIRE -192 64 -224 64
WIRE -112 64 -128 64
WIRE -320 96 -320 64
WIRE 160 96 112 96
WIRE 112 112 112 96
WIRE -224 128 -224 64
WIRE -192 128 -224 128
WIRE -96 128 -128 128
WIRE -80 128 -96 128
WIRE -192 208 -224 208
WIRE -112 208 -112 64
WIRE -112 208 -128 208
WIRE 112 208 112 192
WIRE 112 208 -112 208
WIRE -320 272 -320 176
WIRE -224 272 -224 208
WIRE -224 272 -320 272
WIRE -192 272 -224 272
WIRE -96 272 -96 128
WIRE -96 272 -128 272
WIRE 112 272 112 208
SYMBOL bv 112 96 R0
WINDOW 3 34 41 Left 0
SYMATTR InstName B1
SYMATTR Value V=.6*{vpeak-2*vf}-.4244*{vpeak-2*vf}*cos (628.31853*time)
SYMBOL diode -192 256 M90
WINDOW 0 16 -6 VBottom 0
WINDOW 3 32 32 Invisible 0
SYMATTR InstName D4
SYMATTR Value MURS120
FLAG 112 272 0
FLAG -80 128 Vrect
FLAG 160 96 Vb
* Z:\home\khalils\Downloads\files\data\raw_asc\1fb796f51013_tp2_rlc_desnormalizado_1db.asc
* Generated by LTspice 26.0.1 for Windows.
C Vo 0 80.28n
R Vo 0 1k
L Vi Vo 161m
V1 Vi 0 SINE(0 1 0 0 0 0 1000) AC 1 0
.ac dec 100 1 100k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 112 -80 112
WIRE 80 112 -48 112
WIRE 240 112 160 112
WIRE 352 112 240 112
WIRE 400 112 352 112
WIRE -48 176 -48 112
WIRE 352 176 352 112
WIRE 240 192 240 112
WIRE -48 336 -48 256
WIRE 240 336 240 256
WIRE 240 336 -48 336
WIRE 352 336 352 256
WIRE 352 336 240 336
WIRE 240 368 240 336
IOPIN -80 112 In
IOPIN 400 112 Out
SYMBOL cap 224 192 R0
WINDOW 3 26 54 Left 2
SYMATTR Value 80.28n
SYMATTR InstName C
SYMBOL ind 64 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 31 106 VTop 2
SYMATTR InstName L
SYMATTR Value 161m
SYMBOL res 336 160 R0
WINDOW 0 46 38 Left 2
WINDOW 3 46 66 Left 2
SYMATTR InstName R
SYMATTR Value 1k
SYMBOL voltage -48 160 R0
WINDOW 3 24 96 Invisible 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 1 0 0 0 0 1000)
SYMATTR InstName V1
SYMATTR Value2 AC 1 0
FLAG -80 112 Vi
FLAG 400 112 Vo
FLAG 240 368 0
TEXT -160 392 Left 2 !.ac dec 100 1 100k
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8643SA.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8643SA.asy)
R3 N007 0 243K
C2 N003 0 1
R2 OUT N007 1Meg
L1 N005 OUT 3.3 Rser=10m
Rload OUT 0 835m
XU1 OUT N003 NC_01 IN NC_02 0 N002 N005 0 0 N007 NC_03 IN IN N004 N006 NC_04 LT8643SA ;pnba BIAS)INTVcc)BST)VIN1)CLKOUT)GND1)VC)SW)GND)GND2)FB)PG)VIN2)EN/UV)RT)TR/SS)SYNC/MODE
C6 N002 N001 330p
V1 IN 0 24
C5 OUT N007 4.7p
R4 N001 0 8.45K
C4 OUT 0 47 Rser=2m
R1 N004 0 41.2K
C1 N006 0 1n
.tran 1m startup
.lib LT8643SA.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1848 740
WIRE 80 -80 -32 -80
WIRE 256 -80 80 -80
WIRE 432 -80 256 -80
WIRE -32 -64 -32 -80
WIRE 256 -64 256 -80
WIRE 80 0 80 -80
WIRE 112 0 80 0
WIRE 432 0 432 -80
WIRE 432 0 400 0
WIRE -32 32 -32 16
WIRE 112 80 80 80
WIRE 432 80 400 80
WIRE -80 160 -96 160
WIRE 32 160 0 160
WIRE 112 160 96 160
WIRE -16 240 -48 240
WIRE 112 240 48 240
WIRE 544 240 400 240
WIRE -32 400 -48 400
WIRE 112 400 48 400
WIRE 432 400 400 400
WIRE 544 400 544 240
WIRE 544 400 512 400
WIRE 656 400 544 400
WIRE 752 400 656 400
WIRE 848 400 752 400
WIRE 656 416 656 400
WIRE 752 416 752 400
WIRE 848 416 848 400
WIRE 32 480 0 480
WIRE 112 480 96 480
WIRE 544 480 400 480
WIRE 656 480 656 464
WIRE 656 480 544 480
WIRE 544 496 544 480
WIRE 752 512 752 480
WIRE 848 512 848 496
WIRE 304 560 304 544
WIRE 544 592 544 576
SYMBOL cap 736 416 R0
WINDOW 0 40 17 Left 2
SYMATTR InstName C4
SYMATTR Value 47
SYMATTR SpiceLine Rser=2m
SYMBOL cap 96 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C6
SYMATTR Value 330p
SYMBOL res 64 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 41.2K
SYMBOL res 16 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 8.45K
SYMBOL res 528 480 R0
SYMATTR InstName R3
SYMATTR Value 243K
SYMBOL res 832 400 R0
SYMATTR InstName Rload
SYMATTR Value 835m
SYMBOL voltage -32 -80 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 96 496 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL cap 640 400 R0
WINDOW 0 32 17 Left 2
SYMATTR InstName C5
SYMATTR Value 4.7p
SYMBOL LT8643SA 256 240 R0
SYMATTR InstName U1
SYMBOL ind 416 416 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=10m
SYMBOL cap 48 256 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 528 384 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
FLAG 304 560 0
FLAG -48 400 0
FLAG -32 32 0
FLAG 752 512 0
FLAG 544 592 0
FLAG 848 512 0
FLAG 848 400 OUT
FLAG -32 -80 IN
FLAG 80 80 0
FLAG 432 80 0
FLAG 0 480 0
FLAG -96 160 0
FLAG -48 240 0
TEXT 704 576 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\f410f62417ec_exp-3lpf.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R3 N003 N004 10k
XU1 N004 N002 vcc vee N003 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V3 0 vee 14
C1 N002 0 47n
R1 N002 N001 20k
R2 N004 0 1k
V1 N001 0 SINE(0 1 1k) AC 1
V2 vcc 0 14
.ac dec 10 10 30k
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 112 80 112
WIRE 240 112 208 112
WIRE 320 112 240 112
WIRE 240 128 240 112
WIRE 464 128 384 128
WIRE 320 144 304 144
WIRE 80 160 80 112
WIRE 512 176 512 160
WIRE 592 176 512 176
WIRE 512 192 512 176
WIRE 240 208 240 192
WIRE 592 208 592 176
WIRE 304 224 304 144
WIRE 384 224 304 224
WIRE 464 224 464 128
WIRE 80 256 80 240
SYMBOL cap 224 128 R0
SYMATTR InstName C1
SYMATTR Value 47n
SYMBOL voltage 512 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 14
SYMBOL voltage 512 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 14
SYMBOL res 480 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 224 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20k
SYMBOL res 288 208 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 80 144 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1k)
SYMATTR Value2 AC 1
SYMBOL Opamps\\UniversalOpamp2 352 128 R0
SYMATTR InstName U1
FLAG 80 256 0
FLAG 240 208 0
FLAG 304 304 0
FLAG 592 208 0
FLAG 352 96 vcc
FLAG 512 80 vcc
FLAG 352 160 vee
FLAG 512 272 vee
TEXT 46 360 Left 2 !.ac dec 10 10 30k
* Z:\tmp\asc_dec_bjh7r6w2\034ba90c7c29_Astable_Clock_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
VRegulator N003 N008 5
A1 0 R 0 ~Q 0 N005 0 0 OR Vhigh=5
RU2 N003 S 10k
R1 N002 N004 4.7k
A2 0 S 0 N005 0 ~Q 0 0 OR Vhigh=5
RA N002 N001 8.2k
RQ ~Q N007 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1620 816
WIRE 960 -64 -336 -64
WIRE -272 0 -400 0
WIRE 16 0 -272 0
WIRE 112 0 16 0
WIRE 208 0 112 0
WIRE 432 0 352 0
WIRE 512 0 432 0
WIRE -272 48 -272 0
WIRE 16 48 16 0
WIRE 352 48 352 0
WIRE 512 48 512 0
WIRE 16 160 16 128
WIRE 16 160 -80 160
WIRE 176 160 16 160
WIRE -336 176 -336 -64
WIRE -272 176 -272 128
WIRE -272 176 -336 176
WIRE 352 176 352 128
WIRE 352 176 240 176
WIRE 576 176 352 176
WIRE 656 176 576 176
WIRE 176 192 -176 192
WIRE 656 208 624 208
WIRE 752 208 720 208
WIRE 1040 208 752 208
WIRE -400 224 -400 0
WIRE -272 224 -272 176
WIRE 16 224 16 160
WIRE 432 224 432 0
WIRE -400 240 -400 224
WIRE 304 240 208 240
WIRE 752 240 752 208
WIRE 752 240 592 240
WIRE 960 240 960 -64
WIRE 112 288 112 0
WIRE 624 288 624 208
WIRE 752 288 624 288
WIRE 768 288 752 288
WIRE 800 288 768 288
WIRE 896 288 880 288
WIRE 592 320 592 240
WIRE 656 320 592 320
WIRE 752 320 752 288
WIRE 752 320 720 320
WIRE -176 336 -176 192
WIRE 432 352 432 304
WIRE 432 352 240 352
WIRE 576 352 432 352
WIRE 656 352 576 352
WIRE -80 400 -80 160
WIRE 304 416 304 240
WIRE 512 528 512 128
WIRE 512 528 304 528
WIRE 960 528 960 336
WIRE 960 528 512 528
SYMBOL voltage 512 32 R0
SYMATTR InstName Regulator
SYMATTR Value 5
SYMBOL Digital\\or 688 128 R0
WINDOW 3 -8 16 Left 2
WINDOW 0 -7 -11 Left 2
SYMATTR Value Vhigh=5
SYMATTR InstName A1
SYMBOL res 416 208 R0
SYMATTR InstName RU2
SYMATTR Value 10k
SYMBOL res 0 32 R0
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL Digital\\or 688 400 M180
WINDOW 3 -8 -20 Left 2
SYMATTR Value Vhigh=5
SYMATTR InstName A2
SYMBOL res -288 32 R0
SYMATTR InstName RA
SYMATTR Value 8.2k
SYMBOL res 784 304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName RQ
SYMATTR Value 10k
FLAG -176 192 Threshold
FLAG 576 176 R
FLAG 576 352 S
FLAG 768 288 ~Q
* Z:\home\khalils\Downloads\files\data\raw_asc\3da1a457051d_Rectificador_de_onda_completa.asc
* Generated by LTspice 26.0.1 for Windows.
D1 AC1 V+ 1N4007
D2 AC2 V+ 1N4007
D3 V- AC2 1N4007
D4 V- AC1 1N4007
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 32 -32 32
WIRE 160 128 160 32
WIRE 160 128 112 128
WIRE 208 128 160 128
WIRE 304 128 272 128
WIRE 368 128 304 128
WIRE 48 256 48 128
WIRE 48 256 -32 256
WIRE 160 256 112 256
WIRE 208 256 160 256
WIRE 304 256 304 128
WIRE 304 256 272 256
WIRE 160 336 160 256
FLAG -32 32 AC1
FLAG -32 256 V-
FLAG 368 128 V+
FLAG 160 336 AC2
SYMBOL diode 208 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4007
SYMBOL diode 208 272 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N4007
SYMBOL diode 48 240 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D3
SYMATTR Value 1N4007
SYMBOL diode 48 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D4
SYMATTR Value 1N4007
* Z:\home\khalils\Downloads\files\data\raw_asc\0342a27b9114_DiscrNorForLG1465.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N004 N005 0 0 BF420P
R1 N002 N004 75K tol=1 pwr=0.1
R2 N005 24OutNor 10k tol=1 pwr=0.1
V1 N002 0 125
Q2 24OutNor N003 0 0 BC548a
R3 N003 15 100k tol=1 pwr=0.1
V2 15 0 2.3
R4 N001 24OutNor 1k2 tol=1 pwr=0.1
R5 N003 29 100k tol=1 pwr=0.1
V3 29 0 2.3
R6 N003 23 100k tol=1 pwr=0.1
V4 23 0 2.4
V5 N001 0 12
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -880 256 -880 112
WIRE -880 480 -880 336
WIRE -784 240 -784 176
WIRE -784 368 -784 240
WIRE -784 480 -880 480
WIRE -784 480 -784 448
WIRE -688 288 -688 256
WIRE -688 368 -688 288
WIRE -688 480 -784 480
WIRE -688 480 -688 448
WIRE -656 176 -784 176
WIRE -592 384 -592 368
WIRE -592 480 -688 480
WIRE -592 480 -592 464
WIRE -560 368 -592 368
WIRE -512 256 -688 256
WIRE -464 368 -560 368
WIRE -352 176 -576 176
WIRE -352 256 -432 256
WIRE -352 256 -352 176
WIRE -352 368 -384 368
WIRE -352 368 -352 256
WIRE -320 368 -352 368
WIRE -256 112 -880 112
WIRE -256 192 -256 112
WIRE -256 304 -256 272
WIRE -256 320 -256 304
WIRE -256 480 -592 480
WIRE -256 480 -256 416
WIRE -192 304 -256 304
WIRE -144 304 -192 304
WIRE -32 304 -64 304
WIRE 32 144 32 112
WIRE 32 256 32 224
WIRE 32 480 -256 480
WIRE 32 480 32 352
WIRE 32 496 32 480
WIRE 192 112 32 112
WIRE 192 256 192 112
WIRE 192 480 32 480
WIRE 192 480 192 336
FLAG 32 496 0
FLAG -192 304 24OutNor
FLAG -784 240 23
FLAG -688 288 29
FLAG -560 368 15
SYMBOL npn2 -32 256 R0
SYMATTR InstName Q1
SYMATTR Value BF420P
SYMBOL res 16 128 R0
SYMATTR InstName R1
SYMATTR Value 75K
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL res -48 288 R90
WINDOW 0 -26 75 VRight 0
WINDOW 3 -24 10 VRight 0
SYMATTR InstName R2
SYMATTR Value 10k
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL voltage 192 240 R0
WINDOW 3 -21 58 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 125
SYMATTR InstName V1
SYMBOL npn2 -320 320 R0
SYMATTR InstName Q2
SYMATTR Value BC548a
SYMBOL res -368 352 R90
WINDOW 0 -24 77 VRight 0
WINDOW 3 -24 10 VRight 0
SYMATTR InstName R3
SYMATTR Value 100k
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL voltage -592 368 R0
WINDOW 3 -13 58 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 2.3
SYMATTR InstName V2
SYMBOL res -272 176 R0
SYMATTR InstName R4
SYMATTR Value 1k2
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL res -416 240 R90
WINDOW 0 1 101 VRight 0
WINDOW 3 1 -44 VRight 0
SYMATTR InstName R5
SYMATTR Value 100k
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL voltage -688 352 R0
WINDOW 3 -17 59 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 2.3
SYMATTR InstName V3
SYMBOL res -560 160 R90
WINDOW 0 -1 92 VRight 0
WINDOW 3 -1 -30 VRight 0
SYMATTR InstName R6
SYMATTR Value 100k
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL voltage -784 352 R0
WINDOW 3 -17 58 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 2.4
SYMATTR InstName V4
SYMBOL voltage -880 240 R0
WINDOW 3 -16 56 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 12
SYMATTR InstName V5
TEXT -146 394 Left 0 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\134ea54815c5_Experiment_3.asc
* Generated by LTspice 26.0.1 for Windows.
VInputA N001 0
D2 N001 N002 D
VInputB N003 0
RLoad_Resistor N002 0 10k
D1 N003 N002 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 432 -96 -32 -96
WIRE 528 -96 496 -96
WIRE 528 -32 528 -96
WIRE 624 -32 528 -32
WIRE 432 32 272 32
WIRE 528 32 528 -32
WIRE 528 32 496 32
WIRE -32 112 -32 -96
WIRE 272 112 272 32
WIRE 624 112 624 -32
WIRE -32 272 -32 192
WIRE 272 272 272 192
WIRE 624 272 624 192
SYMBOL voltage -32 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName InputA
SYMATTR Value ""
SYMBOL voltage 272 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName InputB
SYMATTR Value ""
SYMBOL diode 432 -80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL diode 432 48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL res 608 96 R0
SYMATTR InstName Load_Resistor
SYMATTR Value 10k
FLAG -32 272 0
FLAG 272 272 0
FLAG 624 272 0