Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC692.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1086-5.asy)
* Library below included based on ModelFile attribute of instance XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC692.asy)
V3 N005 0 PULSE(0 2 0.4 1u 1u 20m 40m) Rser=0.1
R3 N001 N007 10K
R4 N001 N003 10K
R2 N006 0 20K
XU1 0 N001 IN LT1086-5 ;pnba ADJ)OUT)IN
C1 N001 0 22
R1 IN N006 51K
Rload OUT 0 100
V2 N004 N005 PULSE(0 2 0 1u 1u 20m 40m 6) Rser=0.1
XU3 OUT N001 0 N006 N007 N004 N003 N002 LTC692 ;pnba Vout)Vcc)GND)PFI)_PFO)WDI)_Reset)Vbatt
V4 IN 0 PWL(0 0 25u 7.5 510m 7.5 +1u 2 +50m 2 +1u 7.5) Rser=10m
V1 N002 0 3 Rser=10m
.tran 100m
.lib LT1083.lib
.lib LTC692.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1388 680
WIRE 496 -128 -336 -128
WIRE 1056 -128 496 -128
WIRE -288 -64 -304 -64
WIRE -160 -64 -208 -64
WIRE -112 -64 -160 -64
WIRE 288 -64 240 -64
WIRE 400 -64 368 -64
WIRE 496 -64 496 -128
WIRE 1056 -64 1056 -128
WIRE -704 32 -1440 32
WIRE -624 32 -704 32
WIRE -336 32 -336 -128
WIRE -336 32 -368 32
WIRE -112 32 -336 32
WIRE 496 32 496 16
WIRE 496 32 240 32
WIRE -1440 48 -1440 32
WIRE -336 48 -336 32
WIRE -704 128 -704 32
WIRE -112 128 -128 128
WIRE 416 128 240 128
WIRE 800 128 496 128
WIRE 912 128 880 128
WIRE -1440 144 -1440 128
WIRE -336 144 -336 112
WIRE -496 160 -496 128
WIRE -704 224 -704 208
WIRE -112 224 -704 224
WIRE 1056 224 1056 16
WIRE 1056 224 240 224
WIRE -704 240 -704 224
WIRE -704 336 -704 320
SYMBOL VOLTAGE 400 128 R270
WINDOW 123 -53 56 VBottom 2
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 0 1u 1u 20m 40m 6)
SYMATTR SpiceLine Rser=0.1
SYMBOL VOLTAGE 784 128 R270
WINDOW 123 -53 56 VBottom 2
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 2 0.4 1u 1u 20m 40m)
SYMATTR SpiceLine Rser=0.1
SYMBOL VOLTAGE 272 -64 R270
WINDOW 123 -53 56 VBottom 2
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value 3
SYMATTR SpiceLine Rser=10m
SYMBOL res -720 112 R0
SYMATTR InstName R1
SYMATTR Value 51K
SYMBOL LTC692 64 96 R0
SYMATTR InstName U3
SYMBOL cap -352 48 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 480 -80 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res -720 224 R0
SYMATTR InstName R2
SYMATTR Value 20K
SYMBOL res 1040 -80 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL VOLTAGE -1440 32 R0
WINDOW 123 24 117 Left 2
SYMATTR Value PWL(0 0 25u 7.5 510m 7.5 +1u 2 +50m 2 +1u 7.5)
SYMATTR InstName V4
SYMATTR SpiceLine Rser=10m
SYMBOL PowerProducts\\LT1086-5 -496 32 R0
SYMATTR InstName U1
SYMBOL res -192 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rload
SYMATTR Value 100
FLAG -128 128 0
FLAG -160 -64 OUT
FLAG -1440 144 0
FLAG -336 144 0
FLAG -496 160 0
FLAG -1440 32 IN
FLAG 400 -64 0
FLAG -304 -64 0
FLAG -704 336 0
FLAG 912 128 0
TEXT 848 280 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\0a2d2285757c_nonInvertingStage.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N004 0 SINE(0 1 1k)
V2 N003 0 12
V3 0 N005 12
R2 N001 0 1k
XU1 N004 N001 N003 N005 N002 LM741 ;pnba In+)In-)V+)V-)OUT
R1 N002 N001 10k
.tran 10u 5m
.include /Users/aaryansharma/Library/Application Support/LTspice/lib/sub/LM741.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 680
WIRE 496 48 432 48
WIRE 384 208 320 208
WIRE 544 208 464 208
WIRE 432 272 432 128
WIRE 176 288 144 288
WIRE 320 288 320 208
WIRE 320 288 256 288
WIRE 400 288 320 288
WIRE 544 304 544 208
WIRE 544 304 464 304
WIRE 624 304 544 304
WIRE 144 320 144 288
WIRE 400 320 304 320
WIRE 304 384 304 320
WIRE 432 448 432 336
SYMBOL voltage 304 368 R0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1k)
SYMBOL OpAmps/opamp2 432 240 R0
SYMATTR InstName U1
SYMATTR Value LM741
SYMBOL voltage 432 144 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL voltage 432 544 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V3
SYMATTR Value 12
SYMBOL res 480 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 272 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 144 320 0
FLAG 304 464 0
FLAG 432 528 0
FLAG 496 48 0
TEXT 792 320 Left 2 !.tran 10u 5m
TEXT 16 -40 Left 2 !.include /Users/aaryansharma/Library/Application Support/LTspice/lib/sub/LM741.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\56e9d143b81a_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
* MOSFET: Transfer Output Characteristics
* ketaki mahajan / A-3 / 16014022050
R2 N001 D 1k
M1 D G 0 0 NMOS1
VGG N002 0
R1 G N002 100k
VDD N001 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model NMOS1 NMOS(Vto=1V L=1um W=1um)
.dc VDD 0 15 0.1 VGG 0 4 0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1756 680
WIRE 640 -144 464 -144
WIRE 800 -144 720 -144
WIRE 464 -96 464 -144
WIRE 464 -48 464 -96
WIRE 208 32 48 32
WIRE 336 32 288 32
WIRE 416 32 336 32
WIRE 800 64 800 -144
WIRE 48 144 48 32
WIRE 464 144 464 48
WIRE 48 352 48 224
WIRE 464 352 464 144
WIRE 464 352 48 352
WIRE 800 352 800 144
WIRE 800 352 464 352
WIRE 464 400 464 352
SYMBOL voltage 800 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value ""
SYMBOL res 304 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage 48 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGG
SYMATTR Value ""
SYMBOL nmos 416 -48 R0
SYMATTR InstName M1
SYMATTR Value NMOS1
SYMBOL res 736 -160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 464 400 0
FLAG 464 144 S
FLAG 464 -96 D
FLAG 336 32 G
TEXT 968 -144 Left 2 !.model NMOS1 NMOS(Vto=1V L=1um W=1um)
TEXT 968 -96 Left 2 !.dc VDD 0 15 0.1 VGG 0 4 0.5
TEXT 224 -240 Left 2 ;MOSFET: Transfer Output Characteristics
TEXT 976 -48 Left 2 ;ketaki mahajan / A-3 / 16014022050
* Z:\home\khalils\Downloads\files\data\raw_asc\242d15c4c8f2_1637.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Supply Rail Current Sense
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1637.asy)
V1 +V 0 5
R1 OUT 0 2K
R3 N001 +V 200
R2 +V N002 .2
I1 N002 0 SINE(1 1 1K)
R4 N003 N002 200
XU1 N001 N003 +V 0 N004 NC_01 LT1637 ;pnba In+)In-)V+)V-)OUT)SHDN
Q1 N001 N004 OUT 0 2N3904
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -80 48 -80 32
WIRE -32 48 -80 48
WIRE 64 48 48 48
WIRE 336 48 64 48
WIRE -80 80 -80 48
WIRE 144 144 144 128
WIRE -288 160 -288 144
WIRE 336 176 336 48
WIRE -80 192 -80 160
WIRE -32 192 -80 192
WIRE 112 192 48 192
WIRE 272 224 256 224
WIRE -288 256 -288 240
WIRE 64 256 64 48
WIRE 112 256 64 256
WIRE -80 272 -80 192
WIRE 336 288 336 272
WIRE 416 288 336 288
WIRE 336 304 336 288
WIRE 144 320 144 304
WIRE -80 384 -80 352
WIRE 336 400 336 384
SYMBOL opamps\\LT1637 144 224 R0
SYMATTR InstName U1
SYMBOL res 64 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 200
SYMBOL res 320 288 R0
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL npn 272 176 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res -96 64 R0
SYMATTR InstName R2
SYMATTR Value .2
SYMBOL current -80 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value SINE(1 1 1K)
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 64 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 200
FLAG -288 256 0
FLAG 144 128 +V
FLAG -288 144 +V
FLAG 144 320 0
FLAG 336 400 0
FLAG -80 32 +V
FLAG -80 384 0
FLAG 416 288 OUT
TEXT 424 392 Left 2 !.tran 3m
TEXT 128 -16 Bottom 2 ;Positive Supply Rail Current Sense
* Z:\home\khalils\Downloads\files\data\raw_asc\1ae695552e20_2_resistenze.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 10
R2 0 N002 2000
R1 N002 N001 1000
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 112 48 112
WIRE 208 112 160 112
WIRE 336 112 288 112
WIRE 48 240 48 112
WIRE 128 240 48 240
WIRE 336 240 336 112
WIRE 336 240 208 240
WIRE 336 272 336 240
SYMBOL voltage 112 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 304 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2000
SYMBOL res 176 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1000
FLAG 336 272 0
TEXT 46 306 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6658-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6658-3.3.asy)
C1 N001 0 1
V3 IN 0 PWL(0 0 100u 0 +2u 5.8)
C3 OUT1 0 1
XU1 IN IN IN IN N001 OUT1 OUT1 OUT2 OUT2 0 N002 LT6658-3.3 ;pnba Vin)Vin1)Vin2)_OD)Bypass)Vout1_F)Vout1_S)Vout2_F)Vout2_S)Gnd)NR
C2 OUT2 0 1
.tran 500u
.lib LT6658.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1448 1048
WIRE 16 -32 -336 -32
WIRE 128 -32 16 -32
WIRE 224 -32 128 -32
WIRE 320 -32 224 -32
WIRE -336 -16 -336 -32
WIRE 128 0 128 -32
WIRE 224 0 224 -32
WIRE 320 0 320 -32
WIRE 432 64 416 64
WIRE 496 64 432 64
WIRE -336 80 -336 64
WIRE 496 80 496 64
WIRE 432 144 432 64
WIRE 432 144 416 144
WIRE 496 160 496 144
WIRE 16 192 16 -32
WIRE 48 192 16 192
WIRE 432 224 416 224
WIRE 480 224 432 224
WIRE 480 240 480 224
WIRE 432 304 432 224
WIRE 432 304 416 304
WIRE 480 320 480 304
WIRE 128 416 128 384
WIRE 224 416 224 384
WIRE 320 416 320 384
WIRE 224 496 224 480
SYMBOL cap 480 80 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 208 416 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL LT6658-3.3 224 192 R0
SYMATTR InstName U1
SYMBOL cap 464 240 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL voltage -336 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 0 100u 0 +2u 5.8)
FLAG 128 416 0
FLAG 224 496 0
FLAG -336 80 0
FLAG 496 160 0
FLAG 480 320 0
FLAG 480 224 OUT1
FLAG 496 64 OUT2
FLAG -336 -32 IN
TEXT 464 464 Left 2 !.tran 500u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1170HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1170HV.asy)
V1 IN 0 5
XU1 N003 N002 0 N001 IN LT1170 ;pnba Vc)FB)GND)SW)Vin
R2 N002 0 1.24K
C1 N004 0 1
Rload OUT 0 12
C2 OUT 0 500 Rser=0.05
L1 IN N001 150 Rser=0.02 Rpar=5000
D1 N001 OUT MBRS360
R3 OUT N002 10.7K
R1 N003 N004 1K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 15m startup
.lib LT1170.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 896 1616 896
WIRE 1888 896 1824 896
WIRE 2048 896 1968 896
WIRE 2096 896 2048 896
WIRE 2224 896 2160 896
WIRE 2352 896 2224 896
WIRE 2464 896 2352 896
WIRE 1616 912 1616 896
WIRE 2352 912 2352 896
WIRE 2464 912 2464 896
WIRE 1824 944 1824 896
WIRE 2224 960 2224 896
WIRE 1616 1008 1616 992
WIRE 2352 1008 2352 976
WIRE 2464 1008 2464 992
WIRE 2048 1024 2048 896
WIRE 2048 1024 1952 1024
WIRE 2224 1088 2224 1040
WIRE 2224 1088 1952 1088
WIRE 2224 1104 2224 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2224 1200 2224 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL RES 2448 896 R0
SYMATTR InstName Rload
SYMATTR Value 12
SYMBOL VOLTAGE 1616 896 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL IND 1872 912 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL PowerProducts\\LT1170HV 1824 1088 R0
SYMATTR InstName U1
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL RES 2208 944 R0
SYMATTR InstName R3
SYMATTR Value 10.7K
SYMBOL schottky 2096 912 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL RES 2208 1088 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
SYMBOL polcap 2336 912 R0
SYMATTR InstName C2
SYMATTR Value 500
SYMATTR SpiceLine Rser=0.05
FLAG 1616 1008 0
FLAG 1824 1248 0
FLAG 2064 1248 0
FLAG 2464 1008 0
FLAG 2352 1008 0
FLAG 2224 1200 0
FLAG 2464 896 OUT
FLAG 1616 896 IN
TEXT 2152 1248 Left 2 !.tran 15m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3021-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3021-1.8.asy)
C1 OUT 0 3.3
V1 N001 0 PWL(0 0 1 10)
Rload OUT 0 100
XU1 MP_01 MP_02 OUT MP_03 MP_04 MP_05 OUT MP_06 N001 0 MP_07 N001 LT3021-1.8 ;pnba ))OUT))))SENSE))_SHDN)GND))IN
.tran 1
.lib LT3021.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 160 -176 160
WIRE 16 160 0 160
WIRE 352 160 304 160
WIRE 464 160 352 160
WIRE 560 160 464 160
WIRE 464 176 464 160
WIRE 560 176 560 160
WIRE -176 192 -176 160
WIRE 0 256 0 160
WIRE 16 256 0 256
WIRE 352 256 352 160
WIRE 352 256 304 256
WIRE 464 272 464 240
WIRE 560 272 560 256
WIRE -176 288 -176 272
WIRE 160 336 160 320
SYMBOL res 544 160 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL PowerProducts\\LT3021-1.8 160 192 R0
SYMATTR InstName U1
SYMBOL voltage -176 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 448 176 R0
SYMATTR InstName C1
SYMATTR Value 3.3
FLAG 160 336 0
FLAG 464 272 0
FLAG 560 272 0
FLAG -176 288 0
FLAG 560 160 OUT
TEXT 480 352 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\43a789d3ad00_6990.asc
* Generated by LTspice 26.0.1 for Windows.
* TimerBlox\n500Hz to 2KHz Voltage Controlled Oscillator\nControl Voltage Ramps from 2V to 1V\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6990.asy)
R4 N003 N002 261K
V2 N002 0 PULSE(2 1 5m 20m 20m 5m 50m)
R3 N003 0 196K
XU1 N001 0 N003 N004 N001 OUT LTC6990 ;pnba OE)GND)SET)DIV)V+)OUT
R2 N004 0 887K
R1 N001 N004 1Meg
V1 N001 0 5
.tran 60m startup
.lib LTC6990.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
WIRE 512 32 80 32
WIRE 80 80 80 32
WIRE 112 80 80 80
WIRE 400 80 336 80
WIRE 112 160 96 160
WIRE 384 160 336 160
WIRE 512 160 512 32
WIRE 512 160 384 160
WIRE 384 176 384 160
WIRE 512 176 512 160
WIRE -336 240 -352 240
WIRE -96 240 -256 240
WIRE 48 240 -16 240
WIRE 112 240 48 240
WIRE 352 240 336 240
WIRE 48 256 48 240
WIRE 352 272 352 240
WIRE 384 272 384 256
WIRE 384 272 352 272
WIRE 512 272 512 256
WIRE 384 288 384 272
WIRE 48 352 48 336
WIRE 384 384 384 368
SYMBOL res 0 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 261K
SYMBOL res 368 160 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL voltage -240 240 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(2 1 5m 20m 20m 5m 50m)
SYMATTR InstName V2
SYMBOL LTC6990 224 160 R0
SYMATTR InstName U1
SYMBOL res 368 272 R0
SYMATTR InstName R2
SYMATTR Value 887K
SYMBOL res 32 240 R0
SYMATTR InstName R3
SYMATTR Value 196K
SYMBOL voltage 512 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 512 272 0
FLAG -352 240 0
FLAG 96 160 0
FLAG 400 80 OUT
FLAG 48 352 0
FLAG 384 384 0
TEXT 224 24 Bottom 2 ;TimerBlox\n500Hz to 2KHz Voltage Controlled Oscillator\nControl Voltage Ramps from 2V to 1V\nStartup Modeled
TEXT 488 368 Left 2 !.tran 60m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1ab1d360b43d_eje3_resuelto.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 AC {vg}
rg1 N001 N002 {rg}
C1 N004 0 {C}
L1 N004 N005 {L}
T1 N002 0 N003 0 Td=50n Z0=50
R1 N006 0 {ra}
C2 N005 N006 {ca}
R2 N003 N004 0.1
.ac dec 1e5 10e6 1e9
.param ra = 20.00
.param rg = 50.00
.param Ca = 4.9122e-10
.param L = 2.9560e-08
.param C = 2.7073e-11
.param vg = 63.25
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -240 -80 -288 -80
WIRE -32 -80 -160 -80
WIRE 16 -80 -32 -80
WIRE 128 -80 64 -80
WIRE 240 -80 208 -80
WIRE 272 -80 240 -80
WIRE 528 -80 352 -80
WIRE -32 -48 -96 -48
WIRE 128 -48 64 -48
WIRE -288 -32 -288 -80
WIRE 240 16 240 -80
WIRE 528 16 528 -16
WIRE -96 32 -96 -48
WIRE 128 32 128 -48
WIRE -288 112 -288 48
WIRE 240 112 240 80
WIRE 528 112 528 96
FLAG -288 112 0
FLAG 240 112 0
FLAG 128 32 0
FLAG -96 32 0
FLAG 528 112 0
SYMBOL voltage -288 -48 R0
WINDOW 3 -129 177 VLeft 2
WINDOW 123 -101 177 VLeft 2
WINDOW 39 0 0 Left 0
SYMATTR Value ""
SYMATTR Value2 AC {vg}
SYMATTR InstName V1
SYMBOL res -256 -64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName rg1
SYMATTR Value {rg}
SYMBOL cap 224 16 R0
SYMATTR InstName C1
SYMATTR Value {C}
SYMBOL ind 256 -64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value {L}
SYMBOL tline 16 -64 R0
SYMATTR InstName T1
SYMBOL res 512 0 R0
SYMATTR InstName R1
SYMATTR Value {ra}
SYMBOL cap 512 -80 R0
SYMATTR InstName C2
SYMATTR Value {ca}
SYMBOL res 112 -64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 0.1
TEXT -392 200 Left 2 !.ac dec 1e5 10e6 1e9
TEXT -48 192 Left 2 !.param ra =  20.00 \n.param rg =  50.00 \n.param Ca  =  4.9122e-10 \n.param L  =  2.9560e-08 \n.param C  =  2.7073e-11 \n.param vg  =  63.25
* Z:\home\khalils\Downloads\files\data\raw_asc\0d21fb3bcc75_model.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 R-PI_GND 3.3
S1 0 N002 pulse 0 SW1
V2 pulse 0 PULSE(0 3.3 250ms 1ns 1ns 10ms 19ms 100)
D3 Reset N001 D
R2 Reset R-PI_GND 10Meg
C2 R-PI_GND VL 1n
R1 N001 Reset 10K
R3 Reset N002 10K
D4 R-PI_GND Reset D
B1 VL 0 V=sqrt(2)*220*max(0,sin(2*pi*50*time))
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1
.model SW1 SW(Ron=1 Roff=100Meg Vt=.3 Vh=-.4)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 680
WIRE 240 32 112 32
WIRE 448 32 240 32
WIRE 112 64 112 32
WIRE 240 96 240 32
WIRE 448 144 448 32
WIRE -32 192 -48 192
WIRE 112 192 112 144
WIRE 112 192 48 192
WIRE 240 192 240 160
WIRE 240 192 112 192
WIRE 320 192 320 160
WIRE 320 192 240 192
WIRE 240 208 240 192
WIRE 320 208 320 192
WIRE 112 240 112 192
WIRE 112 336 112 304
WIRE 240 336 240 272
WIRE 240 336 112 336
WIRE 272 336 240 336
WIRE 320 336 320 288
WIRE 320 336 272 336
WIRE 448 336 448 224
WIRE 448 336 320 336
WIRE -128 352 -128 320
WIRE -128 352 -192 352
WIRE -96 352 -128 352
WIRE 448 368 448 336
WIRE 272 384 272 336
WIRE -192 400 -192 352
WIRE -48 400 -48 192
WIRE -96 416 -96 352
WIRE 400 432 400 416
WIRE 448 432 400 432
WIRE 448 448 448 432
WIRE -192 528 -192 480
WIRE -96 528 -96 464
WIRE -96 528 -192 528
WIRE -48 528 -48 480
WIRE -48 528 -96 528
WIRE -192 576 -192 528
WIRE 448 576 448 528
SYMBOL Misc\\battery 448 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 64 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL cap 432 368 R0
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL res 304 192 R0
SYMATTR InstName R2
SYMATTR Value 10Meg
SYMBOL res 96 48 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL diode 256 272 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMBOL diode 256 160 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMBOL bv 448 432 R0
WINDOW 3 -225 180 Left 2
SYMATTR InstName B1
SYMATTR Value V=sqrt(2)*220*max(0,sin(2*pi*50*time))
SYMBOL sw -48 496 M180
SYMATTR InstName S1
SYMATTR Value SW1
SYMBOL voltage -192 384 R0
WINDOW 3 -216 229 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3.3 250ms 1ns 1ns 10ms 19ms 100)
SYMATTR InstName V2
FLAG -192 576 0
FLAG 448 576 0
FLAG 320 160 Reset
FLAG 272 384 R-PI_GND
FLAG -128 320 pulse
FLAG 400 416 VL
TEXT -248 648 Left 2 !.tran 1
TEXT -64 -32 Left 2 !.model SW1 SW(Ron=1 Roff=100Meg Vt=.3 Vh=-.4)
* Z:\home\khalils\Downloads\files\data\raw_asc\a990b54cbd60_180p_IDVD.asc
* Generated by LTspice 26.0.1 for Windows.
VG N002 0
VD N001 0
M1 N001 N002 0 N001 PMOS l=180n w=270n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib tsmc018.lib
.dc VD -1.8 0 0.01 VG -0.01 -1.8 -0.6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1168 680
WIRE 320 128 240 128
WIRE 416 128 320 128
WIRE 320 176 320 128
WIRE 320 176 240 176
WIRE 192 208 16 208
WIRE 416 208 416 128
WIRE 16 240 16 208
WIRE 16 352 16 320
WIRE 240 352 240 224
WIRE 240 352 16 352
WIRE 416 352 416 288
WIRE 416 352 240 352
WIRE 240 368 240 352
SYMBOL voltage 416 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VD
SYMATTR Value ""
SYMBOL voltage 16 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VG
SYMATTR Value ""
SYMBOL pmos4 192 128 R0
SYMATTR InstName M1
SYMATTR Value2 l=180n w=270n
FLAG 240 368 0
TEXT 744 128 Left 2 !.lib tsmc018.lib
TEXT 744 176 Left 2 !.dc VD -1.8 0 0.01 VG -0.01 -1.8 -0.6
* Z:\home\khalils\Downloads\files\data\raw_asc\1152cc6feb50_DC_analog_to_pulse_wave.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N003 0 SINE(0 5 10)
R1 N004 N003 10k
R2 N001 N002 1k
V1 N001 0 5
Q1 N002 N004 0 0 NPN
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -128 -64 -128
WIRE -64 -80 -64 -128
WIRE -64 32 -64 0
WIRE 144 64 144 -128
WIRE 144 176 144 144
WIRE -32 224 -144 224
WIRE 80 224 48 224
WIRE -144 240 -144 224
WIRE -144 336 -144 320
WIRE 144 336 144 272
SYMBOL voltage -64 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 64 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -144 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 5 10)
SYMBOL npn 80 176 R0
SYMATTR InstName Q1
SYMBOL res 128 48 R0
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 144 336 0
FLAG -64 32 0
FLAG -144 336 0
* Z:\home\khalils\Downloads\files\data\raw_asc\1fc5ecb5334d_External_Library_Example.asc
* Generated by LTspice 26.0.1 for Windows.
* Simulation
*.op
* Spice Directives
* Power Supplies
* Libraries
R2 Vn Vin 1k
V2 V- 0 -15
R1 Vo Vn 2k
V3 Vin 0 SINE(0 1 1k)
XU1 0 Vn V+ V- Vo UA741 ;pnba In+)In-)V+)V-)OUT
V1 V+ 0 15
.inc UA741.lib
.tran 0 5m 0 100u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1432 696
WIRE 384 176 336 176
WIRE 496 176 464 176
WIRE 400 288 400 272
WIRE 224 304 160 304
WIRE 336 304 336 176
WIRE 336 304 304 304
WIRE 368 304 336 304
WIRE 496 320 496 176
WIRE 496 320 432 320
WIRE 528 320 496 320
WIRE 160 336 160 304
WIRE 368 336 336 336
WIRE 400 368 400 352
WIRE 688 368 688 336
WIRE 784 368 784 336
WIRE 336 384 336 336
WIRE 160 448 160 416
WIRE 688 480 688 448
WIRE 784 480 784 448
RECTANGLE Normal 1024 240 640 160 2
RECTANGLE Normal 880 528 640 288 2
RECTANGLE Normal 576 112 352 64 2
RECTANGLE Normal 880 112 640 32 2
SYMBOL OpAmps\\opamp2 400 256 R0
SYMATTR InstName U1
SYMATTR Value UA741
SYMBOL voltage 688 352 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 160 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1k)
SYMBOL voltage 784 352 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 480 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2k
SYMBOL res 320 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 784 480 0
FLAG 688 480 0
FLAG 688 336 V+
FLAG 784 336 V-
FLAG 400 272 V+
FLAG 400 368 V-
FLAG 528 320 Vo
FLAG 336 384 0
FLAG 160 448 0
FLAG 160 304 Vin
FLAG 336 304 Vn
TEXT 640 16 Left 2 ;Simulation
TEXT 368 88 Left 2 !.inc UA741.lib
TEXT 648 56 Left 2 !*.op\n.tran 0 5m 0 100u
TEXT 640 144 Left 2 ;Spice Directives
TEXT 640 272 Left 2 ;Power Supplies
TEXT 352 48 Left 2 ;Libraries