Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\030410841ff9_Draft7.asc
* Generated by LTspice 26.0.1 for Windows.
V2 Y 0 0
M2 N001 Y N002 N002 NMOS
M1 N001 X N002 N002 NMOS
R2 Vcc Vf 100000k
V3 Z 0 0
M3 N001 Z N002 N002 NMOS
M4 N002 W 0 0 NMOS
R1 Vcc N001 9.1k
M5 Vf N001 0 0 NMOS
V5 Vcc 0 5
V1 X 0 0
V4 W 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 704 -208 704 -272
WIRE 272 -80 272 -176
WIRE 704 -80 704 -128
WIRE 832 -80 704 -80
WIRE 704 -64 704 -80
WIRE -704 0 -704 -64
WIRE -544 0 -544 -64
WIRE -416 0 -416 -64
WIRE -272 0 -272 -64
WIRE 272 16 272 0
WIRE 656 16 272 16
WIRE 272 80 272 16
WIRE 272 80 48 80
WIRE 496 80 272 80
WIRE -704 144 -704 80
WIRE -544 144 -544 80
WIRE -416 144 -416 80
WIRE 48 144 48 80
WIRE 272 144 272 80
WIRE 496 144 496 80
WIRE 704 144 704 32
WIRE -272 160 -272 80
WIRE 0 224 -64 224
WIRE 224 224 208 224
WIRE 448 224 416 224
WIRE -512 336 -512 288
WIRE 48 336 48 240
WIRE 272 336 272 240
WIRE 272 336 48 336
WIRE 496 336 496 240
WIRE 496 336 272 336
WIRE 272 368 272 336
WIRE 224 448 192 448
WIRE -512 480 -512 416
WIRE 272 528 272 464
SYMBOL voltage -704 -16 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL nmos 0 144 R0
SYMATTR InstName M1
SYMBOL voltage -416 -16 R0
SYMATTR InstName V3
SYMATTR Value 0
SYMBOL voltage -272 -16 R0
SYMATTR InstName V4
SYMATTR Value 0
SYMBOL nmos 656 -64 R0
SYMATTR InstName M5
SYMBOL nmos 224 144 R0
SYMATTR InstName M2
SYMBOL nmos 448 144 R0
SYMATTR InstName M3
SYMBOL voltage -544 -16 R0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage -512 320 R0
SYMATTR InstName V5
SYMATTR Value 5
SYMBOL res 688 -224 R0
SYMATTR InstName R2
SYMATTR Value 100000k
SYMBOL nmos 224 368 R0
SYMATTR InstName M4
SYMBOL res 256 -96 R0
SYMATTR InstName R1
SYMATTR Value 9.1k
FLAG 272 -176 Vcc
FLAG -64 224 X
FLAG 208 224 Y
FLAG 416 224 Z
FLAG 192 448 W
FLAG 704 144 0
FLAG 832 -80 Vf
FLAG 272 528 0
FLAG -512 288 Vcc
FLAG -704 -64 X
FLAG -544 -64 Y
FLAG -416 -64 Z
FLAG -272 -64 W
FLAG -704 144 0
FLAG -544 144 0
FLAG -416 144 0
FLAG -272 160 0
FLAG -512 480 0
FLAG 704 -272 Vcc
TEXT 400 528 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\26a4773b4411_Diode-VI-2-F.asc
* Generated by LTspice 26.0.1 for Windows.
D1 D1 0 RB085BGE-30
I1 0 D1 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc I1 0 1A
.step temp list 0 50
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 160 -64 160
WIRE 160 160 48 160
WIRE -64 224 -64 160
WIRE 160 224 160 160
WIRE -64 352 -64 304
WIRE 48 352 -64 352
WIRE 160 352 160 288
WIRE 160 352 48 352
WIRE 48 368 48 352
FLAG 48 368 0
FLAG 48 160 D1
SYMBOL diode 144 224 R0
WINDOW 0 44 3 Left 2
WINDOW 3 45 43 Left 2
SYMATTR InstName D1
SYMATTR Value RB085BGE-30
SYMBOL current -64 304 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value 0
TEXT -96 400 Left 2 !.dc I1 0 1A
TEXT -96 424 Left 2 !.step temp list 0 50
* Z:\home\khalils\Downloads\files\data\raw_asc\5721e7e8f7c8_5.1.asc
* Generated by LTspice 26.0.1 for Windows.
* V(n003)
* V(n004)
* V(n001)
* V(n002)
* Ic vs Gain
Q1 N001 N004 0 0 2N2222
V2 N002 0 5
R1 N004 N003 1K
V1 N003 0
R2 N002 N001 100
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0.65 1.6 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
WIRE 608 -176 448 -176
WIRE 768 -176 688 -176
WIRE 448 -48 448 -176
WIRE 160 0 64 0
WIRE 384 0 240 0
WIRE 64 80 64 0
WIRE 768 80 768 -176
WIRE 64 352 64 160
WIRE 272 352 64 352
WIRE 448 352 448 48
WIRE 448 352 272 352
WIRE 768 352 768 160
WIRE 768 352 448 352
WIRE 272 416 272 352
SYMBOL res 256 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 768 64 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 704 -192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL npn 384 -48 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL voltage 64 64 R0
SYMATTR InstName V1
SYMATTR Value ""
FLAG 272 416 0
TEXT -32 -48 Left 2 ;V(n003)
TEXT 288 -72 Left 2 ;V(n004)
TEXT 344 -192 Left 2 ;V(n001)
TEXT 792 -168 Left 2 ;V(n002)
TEXT -216 104 Left 2 !.dc V1 0.65 1.6 0.01
TEXT -608 -184 Left 2 ;Ic vs Gain
* Z:\home\khalils\Downloads\files\data\raw_asc\5136d04fd171_coms_vtc_90nm.asc
* Generated by LTspice 26.0.1 for Windows.
C1 Vout 0 50f
V1 N001 0 1.8
V2 Vin 0 1.2
M2 Vout Vin 0 0 NMOS l=90nm w=405nm
M1 N001 Vin Vout N001 PMOS l=90nm w=135nm
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc v2 0 1.8 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 32 208 32
WIRE 432 32 240 32
WIRE 208 64 208 32
WIRE 240 112 240 32
WIRE 240 112 208 112
WIRE 160 144 80 144
WIRE 432 144 432 112
WIRE 208 208 208 160
WIRE 432 208 208 208
WIRE 80 224 80 144
WIRE 80 224 -48 224
WIRE 208 224 208 208
WIRE -48 272 -48 224
WIRE 224 272 208 272
WIRE 80 304 80 224
WIRE 160 304 80 304
WIRE -48 384 -48 352
WIRE 208 464 208 320
WIRE 224 464 224 272
WIRE 224 464 208 464
WIRE 432 464 432 272
WIRE 432 464 224 464
WIRE 208 480 208 464
IOPIN -48 224 In
IOPIN 432 208 Out
SYMBOL nmos4 160 224 R0
SYMATTR InstName M2
SYMATTR Value2 l=90nm w=405nm
SYMBOL pmos4 160 64 R0
SYMATTR InstName M1
SYMATTR Value2 l=90nm w=135nm
SYMBOL cap 416 208 R0
SYMATTR InstName C1
SYMATTR Value 50f
SYMBOL voltage -48 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.2
SYMBOL voltage 432 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
FLAG 208 480 0
FLAG 432 144 0
FLAG -48 384 0
FLAG -48 224 Vin
FLAG 432 208 Vout
TEXT -40 328 Left 2 !.dc v2 0 1.8 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\1c540fd143c9_2009practica.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N001 0 24
Q1 COLEC BASE EMISOR 0 2N3906
R5 N001 EMISOR 1k
R1 BASE 0 150k
R3 COLEC 0 3900
R2 N002 BASE 27k
V1 N002 0 24
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 -240 -80 -240
WIRE -32 -176 -32 -240
WIRE 208 -176 112 -176
WIRE -80 -128 -80 -240
WIRE 208 -128 208 -176
WIRE 112 -64 112 -96
WIRE -80 0 -80 -48
WIRE 112 64 112 16
WIRE 112 80 112 64
WIRE -80 128 -80 80
WIRE 0 128 -80 128
WIRE 48 128 0 128
WIRE 112 208 112 176
WIRE -80 224 -80 128
WIRE 112 240 112 208
WIRE -80 352 -80 304
WIRE 112 464 112 320
SYMBOL pnp 48 176 M180
SYMATTR InstName Q1
SYMATTR Value 2N3906
SYMBOL res -96 -16 R0
SYMATTR InstName R2
SYMATTR Value 27k
SYMBOL res 96 224 R0
SYMATTR InstName R3
SYMATTR Value 3900
SYMBOL voltage 112 -80 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 24
SYMBOL res 96 -80 R0
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL voltage -80 -32 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res -96 208 R0
SYMATTR InstName R1
SYMATTR Value 150k
FLAG -32 -176 0
FLAG -80 352 0
FLAG 112 464 0
FLAG 208 -128 0
FLAG 0 128 BASE
FLAG 112 64 EMISOR
FLAG 112 208 COLEC
TEXT -128 488 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2052.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC2052.asy)
V2 -V 0 -5
V3 N003 0 SINE(0 1 1K)
R1 N002 N001 10K
V1 +V 0 5
XU1 N003 N001 N002 +V -V LTC2052 ;pnba IN+)IN-)OUT)VCC)VEE
R2 N001 0 10K
.tran 3m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -48 -16 -64 -16
WIRE 48 -16 32 -16
WIRE 112 -16 48 -16
WIRE 208 -16 192 -16
WIRE 112 64 112 48
WIRE -304 80 -304 64
WIRE -176 80 -176 64
WIRE 48 80 48 -16
WIRE 80 80 48 80
WIRE 208 96 208 -16
WIRE 208 96 144 96
WIRE 80 112 -16 112
WIRE -16 144 -16 112
WIRE 112 144 112 128
WIRE -304 176 -304 160
WIRE -176 176 -176 160
WIRE -16 256 -16 224
SYMBOL res 48 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage -176 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 208 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL opamps\\LTC2052 112 96 R0
SYMATTR InstName U1
SYMBOL voltage -16 128 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL voltage -304 64 R0
SYMATTR InstName V2
SYMATTR Value -5
FLAG -176 176 0
FLAG 112 48 +V
FLAG -176 64 +V
FLAG 112 144 -V
FLAG -304 176 0
FLAG -304 64 -V
FLAG -16 256 0
FLAG -64 -16 0
TEXT 232 232 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\1da600ac444e_6432106821-PB4.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP727.asy)
V1 N005 0 PULSE(0.01 0.3 0 0 0 0.05ms 0.1ms)
XU1 N005 N002 VCC VSS N003 OP727 ;pnba In+)In-)V+)V-)OUT
R1 N006 N002 1k
V2 VCC 0 20
R2 N006 0 1
R3 Vsupply N001 10
V3 0 VSS 20
V4 Vsupply 0 12
R4 N004 N003 10k
Q1 N001 N004 N006 0 BC817-40T116
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1ms
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 400 -160 400 -240
WIRE 400 80 400 -80
WIRE 48 96 48 -16
WIRE 16 112 -64 112
WIRE 176 128 80 128
WIRE 336 128 256 128
WIRE 16 144 -192 144
WIRE 400 192 400 176
WIRE 400 192 384 192
WIRE -64 208 -64 112
WIRE 192 208 -64 208
WIRE 384 208 384 192
WIRE 384 208 272 208
WIRE -192 240 -192 144
WIRE 48 240 48 160
WIRE 384 320 384 208
WIRE -192 384 -192 320
WIRE 384 544 384 400
SYMBOL res 272 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL voltage -432 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 20
SYMBOL res 384 -176 R0
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL voltage -192 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 44 0 Left 2
WINDOW 3 -232 109 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0.01 0.3 0 0 0 0.05ms 0.1ms)
SYMBOL res 368 304 R0
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL voltage -176 -176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 12
SYMBOL npn 336 80 R0
SYMATTR InstName Q1
SYMATTR Value BC817-40T116
SYMBOL voltage -304 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 20
SYMBOL res 288 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL Opamps\\OP727 48 64 R0
SYMATTR InstName U1
FLAG -192 384 0
FLAG 48 -16 VCC
FLAG -304 -48 VCC
FLAG -304 32 0
FLAG 48 240 VSS
FLAG -432 -48 0
FLAG -432 32 VSS
FLAG -176 -160 Vsupply
FLAG -176 -80 0
FLAG 400 -240 Vsupply
FLAG 384 544 0
TEXT -224 408 Left 2 !.tran 1ms
* Z:\home\khalils\Downloads\files\data\raw_asc\1cb353d04d7d_1_1-10kohm.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 0 1N4148
V1 N001 0 -5
R1 N002 N001 10k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -5 30 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 64 96 64
WIRE 352 64 256 64
WIRE 96 128 96 64
WIRE 352 128 352 64
WIRE 96 256 96 208
WIRE 304 256 96 256
WIRE 352 256 352 192
WIRE 352 256 304 256
WIRE 304 272 304 256
SYMBOL res 272 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL diode 336 128 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 96 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -5
FLAG 304 272 0
TEXT 62 296 Left 2 !.dc V1 -5 30 1
* Z:\home\khalils\Downloads\files\data\raw_asc\0a17b2107930_Fig28_5a.asc
* Generated by LTspice 26.0.1 for Windows.
* Sample-and-Hold, S/H
A1 Vin 0 clock 0 0 0 Vout 0 SAMPLEHOLD REF=0.5
Vin Vin 0 SINE(0.5 0.5 4MEG)
Vclock clock 0 PULSE(0 1 0 0 0 4.9n 10n)
.tran 500n uic
.options plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1344 696
WIRE 384 208 320 208
WIRE 736 208 384 208
WIRE 736 240 672 240
WIRE 992 256 912 256
WIRE 320 272 320 208
WIRE 736 272 608 272
WIRE 608 336 608 272
WIRE 320 416 320 352
WIRE 608 480 608 416
SYMBOL voltage 608 320 R0
WINDOW 0 36 42 Left 0
WINDOW 3 35 69 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vclock
SYMATTR Value PULSE(0 1 0 0 0 4.9n 10n)
SYMBOL SpecialFunctions\\sample 816 240 R0
WINDOW 3 -28 112 Left 0
SYMATTR Value REF=0.5
SYMATTR InstName A1
SYMBOL voltage 320 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value SINE(0.5 0.5 4MEG)
FLAG 320 416 0
FLAG 384 208 Vin
FLAG 608 480 0
FLAG 608 272 clock
FLAG 992 256 Vout
FLAG 672 240 0
TEXT 920 144 Left 0 !.tran 500n uic
TEXT 920 176 Left 0 !.options plotwinsize=0
TEXT 848 432 Left 0 ;Sample-and-Hold, S/H
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2370-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2370-3.0.asy)
XU1 IN IN IN IN N002 OUT N001 0 ADP2370-3.0 IPSM=440m Rt=366.6666k Rb=133.3333k C1=1.6p Rc1=300k R3=5.92k Rshort=100MEG PD=0 ;pnba FSEL)SYNC)EN)Vin)SW)FB)PG)PGND
R1 OUT N001 10K
L1 N002 OUT 10 Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
Rload OUT 0 20
C1 OUT 0 10
V1 IN 0 12
.tran 500u startup
.lib ADP2370-3.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 692
WIRE 160 96 48 96
WIRE 176 96 160 96
WIRE 480 96 400 96
WIRE 640 96 560 96
WIRE 48 112 48 96
WIRE 160 176 160 96
WIRE 176 176 160 176
WIRE 432 176 400 176
WIRE 560 176 512 176
WIRE 640 176 640 96
WIRE 640 176 560 176
WIRE 704 176 640 176
WIRE 704 192 704 176
WIRE 48 208 48 192
WIRE 160 256 160 176
WIRE 176 256 160 256
WIRE 560 256 560 240
WIRE 560 256 400 256
WIRE 560 272 560 256
WIRE 704 288 704 272
WIRE 160 336 160 256
WIRE 176 336 160 336
WIRE 640 336 640 176
WIRE 640 336 400 336
SYMBOL cap 544 176 R0
WINDOW 0 29 15 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ADP2370-3.0 288 208 R0
SYMATTR InstName U1
SYMBOL res 688 176 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL VOLTAGE 48 96 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ind 416 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
SYMBOL res 576 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 48 208 0
FLAG 48 96 IN
FLAG 560 272 0
FLAG 704 176 OUT
FLAG 704 288 0
TEXT 512 360 Left 2 !.tran 500u startup
* Z:\tmp\asc_dec_bjh7r6w2\179e2ce97062_NOISE_Fig24_9_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M4 VDD N001 N002 VDD P_50n l=100n w=5u
M3 VDD N001 N001 VDD P_50n l=100n w=5u
vp vp 0 500m AC 1
Cc vout N003 100f
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2144 680
WIRE 1184 -256 1184 -288
WIRE 1184 -208 1184 -256
WIRE 1248 -304 1232 -304
WIRE 1248 -256 1184 -256
WIRE 1248 -256 1248 -304
WIRE 1504 -304 1248 -304
WIRE 1552 -240 1552 -288
WIRE 1552 -208 1552 -240
WIRE 1552 -80 1376 -80
WIRE 1552 -80 1552 -112
WIRE 1616 -128 1600 -128
WIRE 1632 -128 1616 -128
WIRE 1824 -240 1552 -240
WIRE 1824 -224 1824 -240
WIRE 1824 -128 1824 -144
WIRE 1872 -240 1824 -240
WIRE 1872 64 1792 64
WIRE 1920 -128 1888 -128
WIRE 1920 -128 1920 -224
WIRE 1920 -112 1920 -128
WIRE 1920 -48 1088 -48
WIRE 1920 -48 1920 -112
WIRE 1920 -16 1920 -48
WIRE 2048 -112 1920 -112
WIRE 2080 -112 2048 -112
SYMBOL pmos4 1504 -384 R0
WINDOW 123 58 102 Left 0
WINDOW 0 56 16 Left 0
SYMATTR Value2 l=100n w=5u
SYMATTR InstName M4
SYMATTR Value P_50n
SYMBOL pmos4 1232 -384 M0
WINDOW 123 58 102 Left 0
WINDOW 0 56 16 Left 0
SYMATTR Value2 l=100n w=5u
SYMATTR InstName M3
SYMATTR Value P_50n
SYMBOL voltage 1616 -128 R270
WINDOW 0 45 42 Left 0
WINDOW 3 37 99 Left 0
WINDOW 123 45 70 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vp
SYMATTR Value 500m
SYMATTR Value2 AC 1
SYMBOL cap 1888 -144 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName Cc
SYMATTR Value 100f
FLAG 1552 -160 0
FLAG 1552 -384 VDD
FLAG 1552 -336 VDD
FLAG 1184 -336 VDD
FLAG 1184 -384 VDD
FLAG 1712 -128 0
FLAG 1616 -128 vp
FLAG 1920 -320 VDD
FLAG 1920 -272 VDD
FLAG 1920 32 0
FLAG 1792 64 Vbias3
FLAG 2048 -112 vout
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6300.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
R1 N002 N001 10K
R2 N001 0 1K
V3 N003 0 SINE(0 .1 1Meg)
XU1 N003 N001 +V -V N002 +V 0 LT6300 ;pnba In+)In-)V+)V-)OUT)S)SR
.tran 3u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6300.asy)
.lib LT6300.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2336 1256
WIRE 960 -176 960 -192
WIRE 1056 -176 1056 -192
WIRE 1296 -176 1280 -176
WIRE 1392 -176 1376 -176
WIRE 1408 -176 1392 -176
WIRE 1520 -176 1488 -176
WIRE 960 -80 960 -96
WIRE 1056 -80 1056 -96
WIRE 1392 -48 1392 -176
WIRE 1408 -48 1392 -48
WIRE 1520 -32 1520 -176
WIRE 1520 -32 1488 -32
WIRE 1408 -16 1136 -16
WIRE 1136 0 1136 -16
WIRE 1424 32 1424 16
WIRE 1424 32 1392 32
WIRE 1440 32 1440 16
WIRE 1456 32 1456 16
WIRE 1488 32 1456 32
WIRE 1488 64 1488 32
WIRE 1392 80 1392 32
WIRE 1136 96 1136 80
FLAG 960 -80 0
FLAG 1056 -80 0
FLAG 1440 -80 +V
FLAG 960 -192 +V
FLAG 1056 -192 -V
FLAG 1440 32 -V
FLAG 1280 -176 0
FLAG 1136 96 0
FLAG 1488 64 0
FLAG 1392 80 +V
SYMBOL voltage 960 -192 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 1056 -192 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 1504 -192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 1392 -192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 1136 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 .1 1Meg)
SYMBOL LT6300 1440 -32 R0
SYMATTR InstName U1
TEXT 1504 144 Left 2 !.tran 3u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2909-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2909-5.asy)
R2 N005 N003 1.1K
R3 N003 0 10K
V3 N006 0 PWL(0 0 5010m 0 5011m 0.9 10010m 0.9 10011m 5)
R1 N005 N001 57.6K
V2 N001 0 PULSE(2.5 5 0 1000m 1000m 3000m 5000m)
XU1 0 REF N003 N005 N006 N004 N002 _RST LTC2909-5 ;pnba GND)REF)ADJ2)ADJ1)SEL)TMR)Vcc)_RST
R4 N001 _RST 10K
C2 0 _RST 1000p
V1 N002 0 PWL (0,0 10m,12)
C1 0 N004 22n
I1 REF 0 PWL(0 0 1 0 1.001 1m 2 1m 2.001 -1m 3 -1m 4 -5m 4.001 -5m 5 5m)
.tran 15
.lib LTC2909-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1152 788
WIRE -176 80 -256 80
WIRE 272 80 -96 80
WIRE 304 80 272 80
WIRE 16 160 0 160
WIRE 304 160 304 80
WIRE 304 160 272 160
WIRE 320 160 304 160
WIRE 432 160 384 160
WIRE -720 224 -768 224
WIRE -32 224 -640 224
WIRE 16 224 -32 224
WIRE 496 224 272 224
WIRE 592 224 576 224
WIRE -192 288 -208 288
WIRE -96 288 -112 288
WIRE 16 288 -96 288
WIRE 304 288 272 288
WIRE 400 288 368 288
WIRE -96 304 -96 288
WIRE 16 352 0 352
WIRE 352 352 272 352
WIRE 352 368 352 352
WIRE -256 400 -256 80
WIRE -224 400 -256 400
WIRE -96 400 -96 384
WIRE -96 400 -144 400
WIRE 0 400 0 352
WIRE 0 400 -96 400
WIRE -256 464 -256 400
WIRE 352 464 352 448
WIRE -256 560 -256 544
SYMBOL voltage 480 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value PWL (0,0 10m,12)
SYMBOL voltage 352 352 R0
WINDOW 3 30 89 Left 2
SYMATTR Value PWL(0 0 5010m 0 5011m 0.9 10010m 0.9 10011m 5)
SYMATTR InstName V3
SYMBOL LTC2909-5 144 256 R0
SYMATTR InstName U1
SYMBOL voltage -256 448 R0
SYMATTR InstName V2
SYMATTR Value PULSE(2.5 5 0 1000m 1000m 3000m 5000m)
SYMBOL res -112 400 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 1.1K
SYMBOL res -96 304 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL cap 384 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL cap 368 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL res -192 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res -128 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 57.6K
SYMBOL current -640 224 R90
WINDOW 0 -32 40 VBottom 2
WINDOW 3 32 40 VTop 2
SYMATTR InstName I1
SYMATTR Value PWL(0 0 1 0 1.001 1m 2 1m 2.001 -1m 3 -1m 4 -5m 4.001 -5m 5 5m)
FLAG 0 160 0
FLAG 592 224 0
FLAG -256 560 0
FLAG -208 288 0
FLAG -768 224 0
FLAG 400 288 0
FLAG 432 160 0
FLAG 352 464 0
FLAG -32 224 REF
FLAG 272 80 _RST
TEXT 432 544 Left 2 !.tran 15
* Z:\home\khalils\Downloads\files\data\raw_asc\592e925ca8cd_current-limiting-npn.asc
* Generated by LTspice 26.0.1 for Windows.
* Sizing:\nR2 sets max current -> set max current through the load: Imax = 20 mA\nFind R2 at max current assuming its voltage drop is Vbe and Q2 is still not conducting -> R2 = 0.6V/Imax = 30 ohm\nFind base current at the limiting condition where Q2 is still not conducting -> Ib = Ic/100 = 200 uA\nFind R1 using KVL -> 12 = R1*Ib + 0.6 + 0.6 -> R1 = (12 - 1.2)/20 u = 54k ohm\n \nNow see what happens when R load changes -> max current through the circuit is fixed at 20 mA\nPossible application -> LED driver circuit\n \nAfter running the simulation:\n1) CTRL + L or View SPICE error log\n2) Right click -> Plot .step ed .meas data
* Current limiting circuit using NPN transistors
V1 Vcc 0 12
Q2 N002 N003 0 0 2N3904
R2 0 N003 30
R3 Vcc N001 {R_load}
R1 N002 Vcc 54k
Q1 N001 N002 N003 0 2N3904
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1
.step param R_load 100 1k 50
.meas Load_current AVG I(R3)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1828 680
WIRE -128 -48 -128 -96
WIRE 288 -16 288 -64
WIRE -128 64 -128 32
WIRE 288 128 288 64
WIRE 48 176 -32 176
WIRE 160 176 128 176
WIRE 224 176 160 176
WIRE 160 256 160 176
WIRE 288 304 288 224
WIRE 288 304 224 304
WIRE 288 352 288 304
WIRE 160 464 160 352
WIRE 288 464 288 432
SYMBOL res 272 -32 R0
SYMATTR InstName R3
SYMATTR Value {R_load}
SYMBOL npn 224 128 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 144 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 54k
SYMBOL npn 224 256 M0
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL res 304 448 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 30
SYMBOL voltage -128 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 288 464 0
FLAG 160 464 0
FLAG -128 64 0
FLAG -128 -96 Vcc
FLAG 288 -64 Vcc
FLAG -32 176 Vcc
TEXT 544 -128 Left 2 ;Sizing:\nR2 sets max current -> set max current through the load: Imax = 20 mA\nFind R2 at max current assuming its voltage drop is Vbe and Q2 is still not conducting -> R2 = 0.6V/Imax = 30 ohm\nFind base current at the limiting condition where Q2 is still not conducting -> Ib = Ic/100 = 200 uA\nFind R1 using KVL -> 12 = R1*Ib + 0.6 + 0.6 -> R1 = (12 - 1.2)/20 u = 54k ohm\n \nNow see what happens when R load changes -> max current through the circuit is fixed at 20 mA\nPossible application -> LED driver circuit\n \nAfter running the simulation:\n1) CTRL + L or View SPICE error log\n2) Right click -> Plot .step ed .meas data
TEXT 544 368 Left 2 !.tran 1
TEXT 544 256 Left 2 !.step param R_load 100 1k 50
TEXT 544 312 Left 2 !.meas Load_current AVG I(R3)
TEXT 56 -288 Left 4 ;Current limiting circuit using NPN transistors