Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\7d420b0c4c4e_ID_vs_UGS-5.asc
* Generated by LTspice 26.0.1 for Windows.
* ID_vs_UGS-5
* Depletion mode P-channel MOSFET
V1 UDS 0 -10V
M1 UDS UGS 0 0 PMOSDEP
V2 UGS 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 -2V 2V
.lib mosfet.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1292 680
WIRE -624 -176 -720 -176
WIRE -560 -176 -624 -176
WIRE -720 -128 -720 -176
WIRE -560 -80 -560 -176
WIRE -880 -48 -896 -48
WIRE -768 -48 -880 -48
WIRE -896 -32 -896 -48
WIRE -896 64 -896 48
WIRE -720 64 -720 -32
WIRE -560 64 -560 0
SYMBOL pmos -768 -128 R0
SYMATTR InstName M1
SYMATTR Value PMOSDEP
SYMBOL voltage -560 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 36 82 Left 2
SYMATTR InstName V1
SYMATTR Value -10V
SYMBOL voltage -896 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 53 Left 2
WINDOW 3 -97 181 Left 2
WINDOW 0 35 44 Left 2
SYMATTR Value ""
SYMATTR InstName V2
FLAG -560 64 0
FLAG -896 64 0
FLAG -720 64 0
FLAG -880 -48 UGS
FLAG -624 -176 UDS
TEXT -904 96 Left 2 !.dc V2 -2V 2V
TEXT -896 -168 Left 2 ;ID_vs_UGS-5
TEXT -904 112 Left 2 !.lib mosfet.lib
TEXT -920 -208 Left 2 ;Depletion mode P-channel MOSFET
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7104-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7104-1.8.asy)
R1 OUT N001 100K
Rload OUT 0 6
V1 IN 0 PWL(0 0 20u 3.3)
XU1 IN OUT IN N001 OUT 0 ADP7104-1.8 ;pnba Vin)Sense)EN)PG)Vout)GND
C1 OUT 0 2.2 Rser=1.5m
.tran 3m startup
.lib ADP7104-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -224 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -224 48 -224 32
WIRE 368 128 352 128
WIRE 464 128 464 32
WIRE 464 128 368 128
WIRE 560 128 464 128
WIRE -224 144 -224 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 368 224 368 128
WIRE 368 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADP7104-1.8 224 128 R0
SYMATTR InstName U1
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 6
SYMBOL voltage -224 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 20u 3.3)
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
FLAG 224 304 0
FLAG -224 144 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -224 32 IN
FLAG 560 128 OUT
TEXT 432 288 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\4985326e9309_RD_series.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 N002 D
V1 N001 0 SINE(0 5 1000)
R1 0 N002 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 0.01 0 0.000001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 112 -16 112
WIRE 208 112 144 112
WIRE 336 112 288 112
WIRE -16 176 -16 112
WIRE -16 336 -16 256
WIRE 320 336 -16 336
WIRE 336 336 336 112
WIRE 336 336 320 336
WIRE 320 368 320 336
SYMBOL voltage -16 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1000)
SYMBOL res 304 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 80 128 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
FLAG 320 368 0
TEXT 392 256 Left 2 !.tran 0 0.01 0 0.000001
* Z:\home\khalils\Downloads\files\data\raw_asc\17e9c4595543_Draft14.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N002 0.5
V1 N003 0 PULSE(0 60 0 0 0 0.01 0.02)
M1 N002 N004 0 0 IRF1310
V2 N001 0 48
R2 N004 N003 22
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 -96 -64 -96
WIRE 320 -80 320 -96
WIRE 320 16 320 0
WIRE 144 96 32 96
WIRE 272 96 224 96
WIRE -64 144 -64 -96
WIRE 32 144 32 96
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 22
SYMBOL nmos 272 16 R0
SYMATTR InstName M1
SYMATTR Value IRF1310
SYMBOL res 304 -96 R0
SYMATTR InstName R1
SYMATTR Value 0.5
SYMBOL voltage -64 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 48
SYMBOL voltage 32 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 60 0 0 0 0.01 0.02)
FLAG 32 224 0
FLAG -64 224 0
FLAG 320 112 0
TEXT -98 248 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\3b3b6803f903_1477.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 OUT IN IN N001 0 IN IN LTC1477 ;pnba VOUT)Vin1)Vins)EN)GND)Vin3)Vin2
V1 IN 0 5
V2 N001 0 5
Iload OUT 0 0
.dc Iload 0 1.5 10m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1477.asy)
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4400 2940
WIRE 2976 992 2864 992
WIRE 3152 992 2976 992
WIRE 2864 1008 2864 992
WIRE 3152 1008 3152 992
WIRE 2976 1040 2976 992
WIRE 3008 1040 2976 1040
WIRE 2864 1104 2864 1088
WIRE 2976 1104 2976 1040
WIRE 3008 1104 2976 1104
WIRE 3376 1136 3296 1136
WIRE 3376 1152 3376 1136
WIRE 2976 1168 2976 1104
WIRE 3008 1168 2976 1168
WIRE 3008 1232 2912 1232
WIRE 2912 1248 2912 1232
WIRE 3376 1248 3376 1232
WIRE 3152 1280 3152 1264
WIRE 2912 1344 2912 1328
FLAG 2864 1104 0
FLAG 3152 1280 0
FLAG 2912 1344 0
FLAG 3376 1248 0
FLAG 2864 992 IN
FLAG 3376 1136 OUT
SYMBOL LTC1477 3152 1136 R0
SYMATTR InstName U1
SYMBOL voltage 2864 992 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 2912 1232 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL current 3376 1152 R0
WINDOW 123 24 122 Left 2
WINDOW 39 24 101 Left 2
SYMATTR InstName Iload
SYMATTR Value 0
TEXT 3280 1312 Left 2 !.dc Iload 0 1.5 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\418a9be28039_boost-converter-ideal.asc
* Generated by LTspice 26.0.1 for Windows.
* Vgs(th) = 3.5 [2.0 to 4.0]
* Voltage in source will be 3.5V greater than voltage in gate
* S
* D
* G
V1 g 0 PULSE(0 10 10u 1n 1n {P * D} {P}) Rser=560
M1 out g N002 N002 IRFZ44N
R1 N002 0 0.01
L1 vcc out 100 Rser=0.35
R2 N001 0 10
D1 out N001 D
C1 N001 0 100
V2 vcc 0 12
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran {P * 100}
.param F 26k
.param P {1 / F}
.param D 0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 948 680
WIRE 416 32 -48 32
WIRE 512 32 416 32
WIRE -48 64 -48 32
WIRE 512 96 512 32
WIRE -48 192 -48 144
WIRE 512 208 512 176
WIRE 576 208 512 208
WIRE 608 208 576 208
WIRE 720 208 672 208
WIRE 832 208 720 208
WIRE 512 240 512 208
WIRE 432 256 224 256
WIRE 448 256 432 256
WIRE 720 256 720 208
WIRE 832 272 832 208
WIRE 224 288 224 256
WIRE 448 320 448 256
WIRE 464 320 448 320
WIRE 512 368 512 336
WIRE 720 384 720 336
WIRE 832 384 832 336
WIRE 224 432 224 368
WIRE 512 496 512 448
SYMBOL nmos 464 240 R0
SYMATTR InstName M1
SYMATTR Value IRFZ44N
SYMBOL voltage 224 272 R0
WINDOW 3 -384 109 Left 2
WINDOW 39 -304 147 Left 2
SYMATTR Value PULSE(0 10 10u 1n 1n {P * D} {P})
SYMATTR SpiceLine Rser=560
SYMATTR InstName V1
SYMBOL voltage -48 48 R0
WINDOW 39 24 38 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL ind 496 80 R0
SYMATTR InstName L1
SYMATTR Value 100u
SYMATTR SpiceLine Rser=0.35
SYMBOL Res 704 240 R0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL Cap 816 272 R0
SYMATTR InstName C1
SYMATTR Value 100u
SYMBOL Diode 608 192 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL Res 496 352 R0
SYMATTR InstName R1
SYMATTR Value 0.01
FLAG 224 432 0
FLAG -48 192 0
FLAG 512 496 0
FLAG 576 208 out
FLAG 432 256 g
FLAG 832 384 0
FLAG 720 384 0
FLAG 416 32 vcc
TEXT 688 48 Left 2 !.tran {P * 100}
TEXT 456 584 Left 2 ;Vgs(th) = 3.5 [2.0 to 4.0]
TEXT 320 632 Left 2 ;Voltage in source will be 3.5V greater than voltage in gate
TEXT 528 344 Left 2 ;S
TEXT 528 224 Left 2 ;D
TEXT 448 232 Left 2 ;G
TEXT 688 88 Left 2 !.param F 26k
TEXT 688 128 Left 2 !.param P {1 / F}
TEXT 688 168 Left 2 !.param D 0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6910-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6910-2.asy)
XU1 OUT N005 N004 0 N003 N002 N001 +V LTC6910-2 ;pnba OUT)AGND)IN)V-)G0)G1)G2)V+
V5 N002 0 PULSE(0 5 0 1u 1u 10m 20m)
V4 N003 0 PULSE(0 5 0 1u 1u 5m 10m)
V2 +V 0 +5
C1 0 N005 1
V6 N001 0 PULSE(0 5 0 1u 1u 20m 40m)
V3 N004 0 SINE(2.5 10m 1K)
.tran 40m
.lib LTC6910-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1156 680
WIRE -144 -128 -1040 -128
WIRE -192 -112 -928 -112
WIRE -240 -96 -816 -96
WIRE -816 -80 -816 -96
WIRE -240 -80 -240 -96
WIRE -192 -80 -192 -112
WIRE -144 -80 -144 -128
WIRE -96 -80 -96 -96
WIRE 240 -64 240 -80
WIRE -928 -16 -928 -112
WIRE -816 16 -816 0
WIRE -272 16 -528 16
WIRE 16 16 -16 16
WIRE -528 32 -528 16
WIRE 240 32 240 16
WIRE -1040 48 -1040 -128
WIRE -928 80 -928 64
WIRE -528 128 -528 112
WIRE -208 128 -208 112
WIRE -96 128 -96 112
WIRE -1040 144 -1040 128
SYMBOL LTC6910-2 -160 16 R0
SYMATTR InstName U1
SYMBOL cap -224 192 M180
WINDOW 0 36 51 Left 2
WINDOW 3 34 17 Left 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -816 -96 R0
WINDOW 0 28 27 Left 2
WINDOW 3 28 87 Left 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 5 0 1u 1u 5m 10m)
SYMBOL voltage -528 16 R0
WINDOW 0 28 27 Left 2
WINDOW 3 25 94 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(2.5 10m 1K)
SYMBOL voltage -928 -32 R0
WINDOW 0 28 27 Left 2
WINDOW 3 19 96 Left 2
SYMATTR InstName V5
SYMATTR Value PULSE(0 5 0 1u 1u 10m 20m)
SYMBOL voltage 240 -80 R0
WINDOW 3 27 93 Left 2
SYMATTR Value +5
SYMATTR InstName V2
SYMBOL voltage -1040 32 R0
WINDOW 0 28 27 Left 2
WINDOW 3 25 94 Left 2
SYMATTR InstName V6
SYMATTR Value PULSE(0 5 0 1u 1u 20m 40m)
FLAG 240 32 0
FLAG -528 128 0
FLAG 240 -80 +V
FLAG -96 -96 +V
FLAG -208 192 0
FLAG -96 128 0
FLAG -816 16 0
FLAG -928 80 0
FLAG -1040 144 0
FLAG 16 16 OUT
TEXT -24 256 Left 2 !.tran 40m
* Z:\home\khalils\Downloads\files\data\raw_asc\11cc2732cd7b_Skinister.asc
* Generated by LTspice 26.0.1 for Windows.
G1 B A B A Laplace= 1 / {Rdc} / ( 1 - (s/(6.2832*{Fskin}))^2)^0.25
* skin/proximity effect\nTo understand, first realize that a conductance \nis just a voltage controlled current source.\nThis voltage controlled current source senses the \nvoltage drop across it and calculates the allowed \ncurrent using the Laplace option.\n \nRdc is the dc resistance of the wire.\nFskin is the frequency where the skin\neffect has in increased the resistance\nby a factor of 1.19
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2904 744
WIRE 1008 -2608 992 -2608
WIRE 1008 -2560 1008 -2608
WIRE 1024 -2560 1008 -2560
WIRE 1088 -2560 1072 -2560
WIRE 1088 -2560 1088 -2608
WIRE 1120 -2608 1088 -2608
FLAG 992 -2608 B
IOPIN 992 -2608 BiDir
FLAG 1120 -2608 A
IOPIN 1120 -2608 BiDir
SYMBOL g2 1104 -2608 M270
WINDOW 0 42 76 VRight 0
WINDOW 3 -89 -347 VRight 0
SYMATTR InstName G1
SYMATTR Value Laplace= 1 / {Rdc} /  ( 1  -  (s/(6.2832*{Fskin}))^2)^0.25
TEXT 824 -2976 Left 0 ;skin/proximity effect\nTo understand, first realize that a conductance \nis just a voltage controlled current source.\nThis voltage controlled current source senses the \nvoltage drop across it and calculates the allowed \ncurrent using the Laplace option.\n \nRdc is the dc resistance of the wire.\nFskin is the frequency where the skin\neffect has in increased the resistance\nby a factor of 1.19
* Z:\home\khalils\Downloads\files\data\raw_asc\ADL5567.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADL5567.asy)
R1 VON 0 100
V5 N001 0 3.3
R2 0 VOP 100
V1 VCOM 0 1.65
E2 VCOM N004 N003 0 0.5
E1 N002 VCOM N003 0 0.5
V2 N003 0 0 AC 1
XU1 N002 N004 N001 0 VOP VON VCOM N001 N005 ADL5567 ;pnba 1)2)3)4)5)6)7)8)9
V6 N005 0 {PM}
.ac dec 20 1Meg 10G
.step param PM list 0 3.3
.lib ADL5567.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 11020 6404
WIRE -3728 480 -3744 480
WIRE -3632 480 -3648 480
WIRE -3632 496 -3632 480
WIRE -3904 560 -4016 560
WIRE -3744 560 -3744 480
WIRE -3712 560 -3744 560
WIRE -3504 560 -3552 560
WIRE -4016 576 -4016 560
WIRE -3744 576 -3744 560
WIRE -3712 576 -3712 560
WIRE -3504 576 -3504 560
WIRE -4064 592 -4128 592
WIRE -3904 624 -3904 560
WIRE -3792 624 -3904 624
WIRE -3552 640 -3552 560
WIRE -3552 640 -3616 640
WIRE -4128 672 -4128 592
WIRE -4128 672 -4208 672
WIRE -4016 672 -4016 656
WIRE -3872 672 -4016 672
WIRE -3840 672 -3872 672
WIRE -3792 672 -3840 672
WIRE -3504 672 -3504 656
WIRE -3440 672 -3504 672
WIRE -4016 688 -4016 672
WIRE -3504 688 -3504 672
WIRE -3440 688 -3440 672
WIRE -4208 704 -4208 672
WIRE -4128 704 -4128 672
WIRE -4064 704 -4128 704
WIRE -3552 704 -3616 704
WIRE -3792 720 -3904 720
WIRE -4016 784 -4016 768
WIRE -3904 784 -3904 720
WIRE -3904 784 -4016 784
WIRE -3872 784 -3872 672
WIRE -3712 784 -3712 768
WIRE -3552 784 -3552 704
WIRE -3504 784 -3504 768
WIRE -3504 784 -3552 784
WIRE -4208 800 -4208 784
WIRE -3872 912 -3872 864
WIRE -3712 912 -3712 864
SYMBOL ADL5567 -3744 672 R0
SYMATTR InstName U1
SYMBOL e -4016 672 R0
SYMATTR InstName E2
SYMATTR Value 0.5
SYMBOL voltage -4208 688 R0
SYMATTR InstName V2
SYMATTR Value 0 AC 1
SYMBOL voltage -3712 768 R0
SYMATTR InstName V6
SYMATTR Value {PM}
SYMBOL res -3520 560 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res -3520 672 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL voltage -3872 768 R0
SYMATTR InstName V1
SYMATTR Value 1.65
SYMBOL e -4016 560 R0
SYMATTR InstName E1
SYMATTR Value 0.5
SYMBOL voltage -3744 480 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V5
SYMATTR Value 3.3
FLAG -3744 768 0
FLAG -3632 496 0
FLAG -3712 912 0
FLAG -3440 688 0
FLAG -3504 784 VOP
FLAG -3504 560 VON
FLAG -4208 800 0
FLAG -3872 912 0
FLAG -3840 672 VCOM
FLAG -4064 640 0
FLAG -4064 752 0
TEXT -4232 856 Left 2 !.ac dec 20 1Meg 10G
TEXT -3672 896 Left 2 !.step param PM list 0 3.3
* Z:\home\khalils\Downloads\files\data\raw_asc\IdealTransformer.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* A ideal transformer with two windings.\nWinding ratio specified with parameter N
V1 N002 0 SINE(0 170 60)
Rload OUT 0 100
G4 OUT 0 N001 0 {N}
Rin N002 IN 1
G3 IN 0 N001 0 1
R2 N001 0 1G
G1 0 N001 IN 0 1
G2 0 N001 OUT 0 {N}
.tran 50m
.param N=4 ; turns ratio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 932 680
WIRE 160 0 112 0
WIRE 544 0 448 0
WIRE 160 16 160 0
WIRE 448 16 448 0
WIRE 304 32 208 32
WIRE 400 32 304 32
WIRE 304 128 304 32
WIRE 304 128 208 128
WIRE 400 128 304 128
WIRE 208 160 208 128
WIRE 304 160 304 128
WIRE 400 160 400 128
WIRE -176 176 -336 176
WIRE 0 176 -96 176
WIRE 160 176 160 96
WIRE 160 176 0 176
WIRE 448 176 448 96
WIRE 720 176 448 176
WIRE -336 192 -336 176
WIRE 720 192 720 176
WIRE 112 224 112 0
WIRE 112 224 0 224
WIRE 160 224 112 224
WIRE 544 224 544 0
WIRE 544 224 448 224
WIRE 624 224 544 224
WIRE 208 256 208 240
WIRE 304 256 304 240
WIRE 400 256 400 240
WIRE -336 288 -336 272
WIRE 720 288 720 272
RECTANGLE Normal 576 312 48 -96 2
SYMBOL g 400 144 M0
WINDOW 0 -10 9 Right 2
WINDOW 3 -15 96 Right 2
SYMATTR InstName G2
SYMATTR Value {N}
SYMBOL res -192 160 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rin
SYMATTR Value 1
SYMBOL res 704 176 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL g 208 144 R0
SYMATTR InstName G1
SYMATTR Value 1
SYMBOL g 160 0 M0
WINDOW 0 -10 10 Right 2
WINDOW 3 -16 104 Right 2
SYMATTR InstName G3
SYMATTR Value 1
SYMBOL g 448 0 R0
WINDOW 0 13 18 Left 2
WINDOW 3 12 101 Left 2
SYMATTR InstName G4
SYMATTR Value {N}
SYMBOL res 288 144 R0
SYMATTR InstName R2
SYMATTR Value 1G
SYMBOL voltage -336 176 R0
SYMATTR InstName V1
SYMATTR Value SINE(0 170 60)
FLAG -336 288 0
FLAG 400 256 0
FLAG 208 256 0
FLAG 208 80 0
FLAG 400 80 0
FLAG 304 256 0
FLAG 0 224 0
FLAG 624 224 0
FLAG 720 288 0
FLAG 0 176 IN
FLAG 720 176 OUT
TEXT 528 336 Left 2 !.tran 50m
TEXT 240 368 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT 312 -24 Bottom 2 ;A ideal transformer with two windings.\nWinding ratio specified with parameter N
TEXT 192 296 Left 2 !.param N=4 ; turns ratio
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5674R.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5674R.asy)
CLOAD vOUT 0 10n
RLOAD vOUT 0 1k
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
XU1 vDAC Vdd 0 vOUT AD5674R Gain=2 ;pnba Vdac)Vdd)GND)Vout
V1 Vdd 0 5
.tran 50u
.lib AD5674R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 112 112 0 112
WIRE 192 112 112 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
SYMBOL AD5674R -208 112 R0
SYMATTR InstName U1
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -240 -80 Vdd
TEXT -160 312 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\4e0d2c7e4bbb_flyback_circuit.asc
* Generated by LTspice 26.0.1 for Windows.
L2 0 N002 10m
V1 N001 0 28
D1 N002 N003 UPSC600
C1 N003 0 10
R1 N003 0 15
K L1 L2 1
V2 N005 0 PULSE(0 5 0 0 0 0.00000554285 0.0000095238)
L1 N001 N004 10m
M1 N004 N005 0 0 BSC060N10NS3
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 50m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 0 -224 0
WIRE 336 0 224 0
WIRE 496 0 400 0
WIRE 640 0 496 0
WIRE 64 48 64 0
WIRE 224 48 224 0
WIRE -224 96 -224 0
WIRE 496 96 496 0
WIRE 640 96 640 0
WIRE 64 208 64 128
WIRE 224 272 224 128
WIRE 496 272 496 160
WIRE 496 272 224 272
WIRE 576 272 496 272
WIRE 640 272 640 176
WIRE 640 272 576 272
WIRE 16 288 -48 288
WIRE 576 304 576 272
WIRE -48 320 -48 288
WIRE -224 432 -224 176
WIRE -144 432 -224 432
WIRE -48 432 -48 400
WIRE -48 432 -144 432
WIRE 64 432 64 304
WIRE 64 432 -48 432
WIRE -144 464 -144 432
SYMBOL ind2 48 32 R0
SYMATTR InstName L1
SYMATTR Value 10m
SYMATTR Type ind
SYMBOL schottky 336 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value UPSC600
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage -48 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 0 0 0.00000554285 0.0000095238)
SYMBOL ind2 240 144 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L2
SYMATTR Value 10m
SYMATTR Type ind
SYMBOL nmos 16 208 R0
SYMATTR InstName M1
SYMATTR Value BSC060N10NS3
SYMBOL cap 480 96 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage -224 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 28
SYMBOL res 624 80 R0
SYMATTR InstName R1
SYMATTR Value 15
FLAG -144 464 0
FLAG 576 304 0
TEXT -256 632 Left 2 !.tran 50m
TEXT -248 576 Left 2 !K L1 L2 1
* Z:\home\khalils\Downloads\files\data\raw_asc\dfd82ec27904_Design1.asc
* Generated by LTspice 26.0.1 for Windows.
* Vout
* Library below included based on ModelFile attribute of instance XU4 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
R21 N001 0 33k
XU4 N003 N001 NC_01 NC_02 N002 LT1001 ;pnba In+)In-)V+)V-)OUT
V4 v1 0 5 AC 5 0
R22 v1 0 47k
R18 N001 0 2.7k
R20 N003 N004 1.5k
R17 N002 N001 1.2k
C4 N003 v1 68nf
R19 N004 0 22k
.ac dec 1000 1 1k
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1264 680
WIRE -1344 -1568 -1376 -1568
WIRE -1232 -1568 -1264 -1568
WIRE -1088 -1552 -1120 -1552
WIRE -960 -1552 -1008 -1552
WIRE -1376 -1472 -1376 -1568
WIRE -1376 -1472 -1472 -1472
WIRE -1344 -1472 -1376 -1472
WIRE -1232 -1472 -1232 -1568
WIRE -1232 -1472 -1264 -1472
WIRE -1200 -1472 -1232 -1472
WIRE -1120 -1472 -1120 -1552
WIRE -1120 -1472 -1200 -1472
WIRE -1200 -1344 -1200 -1472
WIRE -1168 -1344 -1200 -1344
WIRE -960 -1328 -960 -1552
WIRE -960 -1328 -1104 -1328
WIRE -800 -1328 -960 -1328
WIRE -1376 -1312 -1552 -1312
WIRE -1216 -1312 -1312 -1312
WIRE -1168 -1312 -1216 -1312
WIRE -1216 -1296 -1216 -1312
WIRE -1216 -1200 -1216 -1216
WIRE -1552 -1168 -1552 -1312
WIRE -1552 -1056 -1552 -1088
WIRE -1216 -1056 -1216 -1120
WIRE -1216 -1056 -1552 -1056
WIRE -1216 -1040 -1216 -1056
SYMBOL res -1568 -1184 R0
SYMATTR InstName R22
SYMATTR Value 47k
SYMBOL res -1248 -1584 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R21
SYMATTR Value 33k
SYMBOL cap -1312 -1328 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 68nf
SYMBOL voltage -1728 -1344 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 5 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL res -1232 -1312 R0
SYMATTR InstName R20
SYMATTR Value 1.5k
SYMBOL OpAmps\\OP07 -1136 -1392 R0
SYMATTR InstName U4
SYMBOL res -1248 -1488 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R18
SYMATTR Value 2.7k
SYMBOL res -992 -1568 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R17
SYMATTR Value 1.2k
SYMBOL res -1232 -1216 R0
SYMATTR InstName R19
SYMATTR Value 22k
FLAG -1472 -1472 0
FLAG -1216 -1040 0
FLAG -1728 -1248 0
FLAG -1728 -1328 v1
FLAG -1552 -1312 v1
TEXT -800 -1328 Left 2 ;Vout
TEXT -1088 -1232 Left 2 !.ac dec 1000 1 1k