Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6082.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6082.asy)
V2 -V 0 -2.5
R1 N001 0 10K
C1 OUT N001 47p
R4 N003 N002 2Meg
C4 N002 0 8.2p
C3 N003 N004 3.9p
XU1 N003 N001 +V -V OUT LTC6082 ;pnba IN+)IN-)VCC)VEE)OUT
C2 N004 IN 3.9p
R5 0 N004 1Meg
R2 OUT N001 1Meg
V1 +V 0 2.5
V3 IN 0 ac 1
R3 N002 IN 2Meg
.ac oct 10 1 1Meg
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -176 48 -176 32
WIRE -80 48 -80 32
WIRE 96 48 80 48
WIRE 192 48 176 48
WIRE 208 48 192 48
WIRE 352 48 272 48
WIRE 192 112 192 48
WIRE 256 112 192 112
WIRE 352 112 352 48
WIRE 352 112 336 112
WIRE -176 144 -176 128
WIRE -80 144 -80 128
WIRE 48 144 48 128
WIRE 192 192 192 112
WIRE 208 192 192 192
WIRE 352 208 352 112
WIRE 352 208 272 208
WIRE 384 208 352 208
WIRE -64 224 -80 224
WIRE 48 224 48 208
WIRE 48 224 16 224
WIRE 96 224 48 224
WIRE 192 224 176 224
WIRE 208 224 192 224
WIRE -80 272 -80 224
WIRE -80 272 -192 272
WIRE -192 288 -192 272
WIRE -80 320 -80 272
WIRE -48 320 -80 320
WIRE 48 320 16 320
WIRE 96 320 48 320
WIRE 192 320 192 224
WIRE 192 320 160 320
WIRE 48 336 48 320
WIRE -192 384 -192 368
WIRE 48 432 48 416
SYMBOL voltage -80 32 R0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL opamps\\LTC6082 240 208 R0
SYMATTR InstName U1
SYMBOL voltage -176 32 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 192 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2Meg
SYMBOL res 352 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 192 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL cap 16 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 3.9p
SYMBOL res 32 432 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL voltage -192 272 R0
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL cap 272 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 47p
SYMBOL res 32 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2Meg
SYMBOL cap 160 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 3.9p
SYMBOL cap 32 208 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C4
SYMATTR Value 8.2p
FLAG -176 144 0
FLAG -80 144 0
FLAG 240 176 +V
FLAG -176 32 +V
FLAG -80 32 -V
FLAG 240 240 -V
FLAG 80 48 0
FLAG -192 384 0
FLAG 48 432 0
FLAG 48 128 0
FLAG -192 272 IN
FLAG 384 208 OUT
TEXT 192 384 Left 2 !.ac oct 10 1 1Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\604026dbf848_Draft4.asc
* Generated by LTspice 26.0.1 for Windows.
R2 P001 N002 10
Q1 N001 P001 0 0 BC547B
V2 N002 0 5
V1 N001 0 10
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 -100 100 0.001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 176 288 96
WIRE 144 224 48 224
WIRE 48 240 48 224
SYMBOL voltage 288 112 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL npn 224 176 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL voltage 48 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 240 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
FLAG 288 272 0
FLAG 288 16 0
FLAG 48 320 0
TEXT -26 344 Left 2 !.dc V1 -100 100 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8609S.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8609S.asy)
XU1 0 N001 NC_01 N004 NC_02 N003 N002 NC_03 IN IN LT8609S ;pnba GND)SW)INTVcc)RT)SYNC)FB)TR/SS)PG)VIN)EN/UV
R3 N003 0 187K
C5 OUT N003 10p
V1 IN 0 12
R1 N004 0 18.2K
L1 N001 OUT 2.2 Rser=37m
C2 OUT 0 22 Rser=2m
C1 N002 0 1n
Rload OUT 0 2.5
R2 OUT N003 1Meg
.tran 500u startup
.lib LT8609S.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1144 680
WIRE 144 -80 96 -80
WIRE 192 -80 144 -80
WIRE 368 -80 192 -80
WIRE 96 -48 96 -80
WIRE 368 -48 368 -80
WIRE 192 0 192 -80
WIRE 224 0 192 0
WIRE 96 48 96 32
WIRE 544 192 512 192
WIRE 656 192 624 192
WIRE 768 192 656 192
WIRE 864 192 768 192
WIRE 928 192 864 192
WIRE 960 192 928 192
WIRE 656 208 656 192
WIRE 768 208 768 192
WIRE 864 208 864 192
WIRE 960 208 960 192
WIRE 128 288 96 288
WIRE 224 288 192 288
WIRE 656 288 512 288
WIRE 768 288 768 272
WIRE 768 288 656 288
WIRE 656 304 656 288
WIRE 864 304 864 272
WIRE 960 304 960 288
WIRE 112 384 96 384
WIRE 224 384 192 384
WIRE 528 384 512 384
WIRE 656 400 656 384
SYMBOL res 640 288 R0
SYMATTR InstName R3
SYMATTR Value 187K
SYMBOL voltage 96 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ind 528 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=37m
SYMBOL res 208 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 18.2K
SYMBOL cap 192 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL cap 752 208 R0
SYMATTR InstName C5
SYMATTR Value 10p
SYMBOL cap 848 208 R0
SYMATTR Value 22
SYMATTR SpiceLine Rser=2m
SYMATTR InstName C2
SYMBOL res 640 192 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 944 192 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL LT8609S 368 192 R0
SYMATTR InstName U1
FLAG 96 384 0
FLAG 96 288 0
FLAG 96 48 0
FLAG 864 304 0
FLAG 656 400 0
FLAG 960 304 0
FLAG 928 192 OUT
FLAG 144 -80 IN
FLAG 528 384 0
TEXT 656 456 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\astable.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N002 2K
R2 N001 N003 2K
R3 N002 N004 101K
R4 N003 N005 100K
C1 N003 N004 .01
C2 N005 N002 .01
V1 N001 0 5
Q1 N003 N005 0 0 2N3904
Q2 N002 N004 0 0 2N3904
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 25m startup
* This example schematic is supplied for informational/educational purposes only.
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 1240
WIRE -560 768 -720 768
WIRE -96 768 -560 768
WIRE -560 784 -560 768
WIRE -96 784 -96 768
WIRE -720 800 -720 768
WIRE -560 880 -560 864
WIRE -480 880 -560 880
WIRE -368 880 -480 880
WIRE -224 880 -304 880
WIRE -96 880 -96 864
WIRE -96 880 -224 880
WIRE -480 896 -480 880
WIRE -224 896 -224 880
WIRE -720 912 -720 880
WIRE -560 976 -560 880
WIRE -96 976 -96 880
WIRE -480 1024 -480 976
WIRE -480 1024 -496 1024
WIRE -432 1024 -480 1024
WIRE -368 1024 -304 880
WIRE -304 1024 -368 880
WIRE -224 1024 -224 976
WIRE -224 1024 -240 1024
WIRE -160 1024 -224 1024
WIRE -560 1088 -560 1072
WIRE -96 1088 -96 1072
FLAG -96 1088 0
FLAG -560 1088 0
FLAG -720 912 0
SYMBOL RES -576 768 R0
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL res -112 768 R0
SYMATTR InstName R2
SYMATTR Value 2K
SYMBOL res -496 880 R0
SYMATTR InstName R3
SYMATTR Value 101K
SYMBOL res -240 880 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL cap -368 1008 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL cap -240 1008 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL VOLTAGE -720 784 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL NPN -160 976 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL npn -496 976 M0
SYMATTR InstName Q2
SYMATTR Value 2N3904
TEXT -200 1136 Left 2 !.tran 25m startup
TEXT -296 1152 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\f150b28bf64d_dcSweep.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 0 1k
D1 N001 N002 1N750
Vi N001 0 PULSE(-8 8 0 50u 50u 0 100u)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc Vi -8V 8V 0.05V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 48 96
WIRE 352 96 224 96
WIRE 48 144 48 96
WIRE 352 144 352 96
WIRE 48 288 48 224
WIRE 192 288 48 288
WIRE 352 288 352 224
WIRE 352 288 192 288
WIRE 192 304 192 288
SYMBOL voltage 48 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vi
SYMATTR Value PULSE(-8 8 0 50u 50u 0 100u)
SYMBOL zener 160 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N750
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 336 128 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 192 304 0
TEXT 16 328 Left 2 !.dc Vi -8V 8V 0.05V
* Z:\home\khalils\Downloads\files\data\raw_asc\OP296.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP296.asy)
R1 N001 0 10K
V1 +V 0 5
XU1 IN N001 +V -V OUT OP296 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -5
Rload OUT 0 10K
Vin IN 0 SINE(0 1 10K)
R2 OUT N001 10K
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 656 -1232 624 -1232
WIRE 144 -1184 144 -1200
WIRE 288 -1184 288 -1200
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 656 -1104 656 -1232
WIRE 656 -1104 608 -1104
WIRE 752 -1104 656 -1104
WIRE 144 -1088 144 -1104
WIRE 288 -1088 288 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 144 -1200 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 288 -1200 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL Opamps\\OP296 576 -1168 R0
SYMATTR InstName U1
FLAG 144 -1200 +V
FLAG 144 -1088 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 288 -1200 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 752 -992 0
FLAG 288 -1088 0
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3048-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3048-3.3.asy)
Rload OUT 0 82.5
C2 OUT N003 .1n
XU1 N002 IN 0 N003 OUT N001 IN N001 LT3048-3.3 ;pnba SW)Vin)GND)BYP)LDOOUT)LDOIN)EN)BSTOUT
V1 IN 0 3.3
C1 N001 0 4.7
L1 IN N002 3.3 Rser=.285
C3 OUT 0 1 Rser=10m
.tran 1m startup
.lib LT3048-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 48 256 48
WIRE 464 48 416 48
WIRE 256 64 256 48
WIRE 464 64 464 48
WIRE 112 128 80 128
WIRE 416 128 416 48
WIRE 416 128 400 128
WIRE 464 144 464 128
WIRE 80 224 80 208
WIRE 80 224 -32 224
WIRE 112 224 80 224
WIRE 448 224 400 224
WIRE 528 224 448 224
WIRE 608 224 528 224
WIRE -32 240 -32 224
WIRE 448 240 448 224
WIRE 528 240 528 224
WIRE 608 240 608 224
WIRE 80 320 80 224
WIRE 112 320 80 320
WIRE 448 320 448 304
WIRE 448 320 400 320
WIRE -32 336 -32 320
WIRE 528 336 528 304
WIRE 608 336 608 320
WIRE 256 400 256 384
SYMBOL cap 432 240 R0
SYMATTR InstName C2
SYMATTR Value .1n
SYMBOL PowerProducts\\LT3048-3.3 256 224 R0
SYMATTR InstName U1
SYMBOL cap 448 64 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL cap 512 240 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMATTR SpiceLine Rser=10m
SYMBOL voltage -32 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL ind 96 224 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=.285
SYMBOL res 592 224 R0
SYMATTR InstName Rload
SYMATTR Value 82.5
FLAG 256 400 0
FLAG -32 336 0
FLAG 464 144 0
FLAG 528 336 0
FLAG 608 336 0
FLAG -32 224 IN
FLAG 608 224 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1765-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N004 0 1
C2 N003 0 10n
V1 IN 0 1.8
R2 N001 IN 50K
C3 N002 0 1
R1 OUT 0 .8
C4 OUT 0 22
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1765-1.5 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1765-1.5.asy)
.lib ADP1765-1.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value .8
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMBOL ADP1765-1.5 224 176 R0
SYMATTR InstName U1
TEXT 432 384 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1189.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1189.asy)
XU1 N001 0 +V -V N002 0 N003 +V LT1189 ;pnba In+)In-)V+)V-)OUT)REF)FB)_SHDN
R1 N002 N003 1K
V2 -V 0 -5
V1 +V 0 5
V3 N001 0 SINE(0 1m 100K)
R2 N003 0 111
.tran 1m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -288 96 -528 96
WIRE -112 96 -112 80
WIRE -112 96 -144 96
WIRE -528 112 -528 96
WIRE -144 112 -144 96
WIRE -112 112 -112 96
WIRE -288 128 -288 96
WIRE -176 128 -288 128
WIRE -768 160 -768 144
WIRE -640 160 -640 144
WIRE -176 160 -288 160
WIRE 0 176 -48 176
WIRE -176 192 -224 192
WIRE -528 208 -528 192
WIRE -288 208 -288 160
WIRE -288 208 -528 208
WIRE -176 224 -208 224
WIRE -528 240 -528 208
WIRE -768 256 -768 240
WIRE -640 256 -640 240
WIRE -112 256 -112 240
WIRE -304 336 -320 336
WIRE -208 336 -208 224
WIRE -208 336 -224 336
WIRE -144 336 -208 336
WIRE 0 336 0 176
WIRE 0 336 -64 336
SYMBOL voltage -528 96 R0
SYMATTR Value SINE(0 1m 100K)
SYMATTR InstName V3
SYMBOL voltage -640 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -48 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -768 144 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res -208 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 111
SYMBOL LT1189 -112 176 R0
SYMATTR InstName U1
FLAG -640 256 0
FLAG -112 80 +V
FLAG -640 144 +V
FLAG -112 256 -V
FLAG -768 256 0
FLAG -768 144 -V
FLAG -320 336 0
FLAG -528 240 0
FLAG -224 192 0
TEXT 32 360 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG854.asc
* Generated by LTspice 26.0.1 for Windows.
V1 SA 0 5
V2 SB 0 0
V3 IN 0 PULSE(0 5 0 20n 20n 10u 20u)
R1 D 0 300
C1 D 0 35p
V4 +V 0 5
XU2 IN SA D SB +V 0 ADG854 ;pnba IN)S1)D)S2)Vdd)GND
.tran 100u
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG854.asy)
.lib ADG854.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1744 -272 -2032 -272
WIRE -1696 -272 -1744 -272
WIRE -2032 -256 -2032 -272
WIRE -1424 -240 -1504 -240
WIRE -1312 -240 -1424 -240
WIRE -1424 -224 -1424 -240
WIRE -1312 -224 -1312 -240
WIRE -1744 -208 -1920 -208
WIRE -1696 -208 -1744 -208
WIRE -1920 -192 -1920 -208
WIRE -2032 -160 -2032 -176
WIRE -2176 -144 -2176 -160
WIRE -1744 -144 -1776 -144
WIRE -1696 -144 -1744 -144
WIRE -1424 -128 -1424 -144
WIRE -1312 -128 -1312 -160
WIRE -1920 -96 -1920 -112
WIRE -1776 -80 -1776 -144
WIRE -2176 -48 -2176 -64
WIRE -1600 -16 -1600 -32
WIRE -1776 32 -1776 0
FLAG -2032 -160 0
FLAG -1920 -96 0
FLAG -1776 32 0
FLAG -1600 -368 +V
FLAG -1424 -128 0
FLAG -1600 -16 0
FLAG -1312 -128 0
FLAG -2176 -48 0
FLAG -2176 -160 +V
FLAG -1744 -272 SA
FLAG -1744 -208 SB
FLAG -1744 -144 IN
FLAG -1424 -240 D
SYMBOL voltage -2032 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -1920 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage -1776 -96 R0
WINDOW 3 24 136 Left 2
SYMATTR Value PULSE(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V3
SYMBOL res -1440 -240 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL cap -1328 -224 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL voltage -2176 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL ADG854 -1600 -192 R0
SYMATTR InstName U2
TEXT -1360 -40 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\1f056e9e82d7_COMB07op.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
V1 Vpp 0 {Vs}
R2 B E {R2}
J1 C G B JFET
V3 N001 0 {Vi}
R1 0 C {R1}
V2 0 Vnn {Vs}
Q1 C B E 0 TBJ
XU2 C N001 0 Vnn G level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
RL E Vnn {RL}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.op
.model JFET NJF(Beta=4m Vto=-3)
.param Vi=-1.75 Vs=20 R1=100 R2=3.9k RL=36
.model TBJ NPN(IS=10f BF=75)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 1076
WIRE 1200 -16 1200 -64
WIRE 1088 112 880 112
WIRE 1200 112 1200 64
WIRE 1200 112 1088 112
WIRE 1088 144 1088 112
WIRE 1200 176 1200 112
WIRE 1376 176 1328 176
WIRE 880 192 880 112
WIRE 928 192 880 192
WIRE 1328 192 1328 176
WIRE 1008 208 992 208
WIRE 1040 208 1008 208
WIRE 1376 208 1376 176
WIRE 928 224 848 224
WIRE 1200 224 1200 176
WIRE 1088 272 1088 240
WIRE 1136 272 1088 272
WIRE 848 304 848 224
WIRE 1088 320 1088 272
WIRE 848 416 848 384
WIRE 1088 432 1088 400
WIRE 1200 432 1200 320
WIRE 1200 432 1088 432
WIRE 1088 464 1088 432
WIRE 1088 576 1088 544
SYMBOL res 1072 448 R0
SYMATTR InstName RL
SYMATTR Value {RL}
SYMBOL OpAmps\\UniversalOpAmp2 960 208 M180
WINDOW 0 27 36 Left 2
SYMATTR InstName U2
SYMBOL voltage 1376 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value {Vs}
SYMBOL npn 1136 224 R0
SYMATTR InstName Q1
SYMATTR Value TBJ
SYMBOL njf 1040 144 R0
SYMATTR InstName J1
SYMATTR Value JFET
SYMBOL res 1184 -32 R0
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL res 1072 304 R0
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL voltage 1376 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vs}
SYMBOL voltage 848 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value {Vi}
FLAG 1088 272 B
FLAG 1200 176 C
FLAG 1008 208 G
FLAG 1376 96 Vpp
FLAG 1328 192 0
FLAG 1376 288 Vnn
FLAG 1200 432 E
FLAG 848 416 0
FLAG 1088 576 Vnn
FLAG 1200 -64 0
FLAG 960 176 Vnn
FLAG 960 240 0
TEXT 344 -56 Left 2 !.op
TEXT 344 8 Left 2 !.model JFET NJF(Beta=4m Vto=-3)
TEXT 344 -24 Left 2 !.param Vi=-1.75 Vs=20 R1=100 R2=3.9k RL=36
TEXT 344 40 Left 2 !.model TBJ NPN(IS=10f BF=75)
* Z:\home\khalils\Downloads\files\data\raw_asc\faa99329a21d_TransmissionLineInverter.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax. The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors. A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements. One for the normal(differential) mode and\nthe other for the common mode. Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world. These modes\nwith have different propagation speeds and impedances. If both modes\nare modeled, then you can simulate a transmission line inverter.
T2 0 0 N002 0 Td=30n Z0=150
T1 N001 0 0 N002 Td=50n Z0=50
V1 N001 0 PULSE(0 1 0 1n 1n 10n) Rser=50
.tran 0 500n 0 1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 680
WIRE 128 192 -368 192
WIRE 320 192 224 192
WIRE 128 224 64 224
WIRE 288 224 224 224
WIRE -368 240 -368 192
WIRE 64 272 64 224
WIRE 64 272 -16 272
WIRE 288 272 288 224
WIRE 384 272 288 272
WIRE 64 304 64 272
WIRE 128 304 64 304
WIRE 288 304 288 272
WIRE 288 304 224 304
WIRE 128 336 64 336
WIRE 288 336 224 336
WIRE -368 368 -368 320
WIRE -16 368 -16 272
WIRE 64 368 64 336
WIRE 288 368 288 336
SYMBOL voltage -368 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 132 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1n 1n 10n)
SYMBOL tline 176 320 R0
WINDOW 0 -1 -21 Bottom 2
WINDOW 3 0 21 Top 2
SYMATTR InstName T2
SYMATTR Value Td=30n Z0=150
SYMBOL tline 176 208 R0
WINDOW 0 2 -19 Bottom 2
WINDOW 3 3 20 Top 2
SYMATTR InstName T1
FLAG 64 368 0
FLAG 288 368 0
FLAG -368 368 0
FLAG -16 368 0
FLAG 320 192 0
TEXT 264 416 Left 2 !.tran 0 500n 0 1n
TEXT 0 440 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT -376 -200 Left 2 ;This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax.  The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors.  A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements.  One for the normal(differential) mode and\nthe other for the common mode.  Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world.  These modes\nwith have different propagation speeds and impedances.  If both modes\nare modeled, then you can simulate a transmission line inverter.