Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\3317f09d8f4d_ALM_ExpansionBoard_draft.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N001 N004 300 tol=1 pwr=0.1
D3 N004 N010 D
V1 N001 0 3.3
R1 N001 N002 200 tol=1 pwr=0.1
R2 N001 N003 1000 tol=1 pwr=0.1
R6 N011 N006 200 tol=1 pwr=0.1
R5 N009 N006 200 tol=1 pwr=0.1
M3 N010 N011 0 0 2N7002
D1 N002 N005 D
M2 N008 N009 0 0 2N7002
R4 N007 N006 200 tol=1 pwr=0.1
D2 N003 N008 D
M1 N005 N007 0 0 2N7002
V2 N006 0 PULSE(0 3.3 5 5 0 0 5)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 50
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 984 888
WIRE 288 80 0 80
WIRE 464 80 288 80
WIRE 640 80 464 80
WIRE 288 112 288 80
WIRE 464 112 464 80
WIRE 0 128 0 80
WIRE 640 128 640 80
WIRE 288 256 288 192
WIRE 464 256 464 192
WIRE 640 256 640 208
WIRE 288 352 288 320
WIRE 64 432 -448 432
WIRE 128 432 64 432
WIRE 144 432 128 432
WIRE 240 432 224 432
WIRE 464 480 464 320
WIRE -448 496 -448 432
WIRE 64 560 64 432
WIRE 320 560 64 560
WIRE 336 560 320 560
WIRE 416 560 400 560
WIRE 640 592 640 320
WIRE 128 672 128 432
WIRE 496 672 128 672
WIRE 592 672 576 672
WIRE -448 768 -448 576
WIRE 0 768 0 208
WIRE 0 768 -448 768
WIRE 288 768 288 448
WIRE 288 768 0 768
WIRE 464 768 464 576
WIRE 464 768 288 768
WIRE 640 768 640 688
WIRE 640 768 464 768
WIRE 0 832 0 768
SYMBOL nmos 416 480 R0
SYMATTR InstName M2
SYMATTR Value 2N7002
SYMBOL res 240 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 200
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL res 592 656 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 200
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL LED 624 256 R0
SYMATTR InstName D3
SYMBOL res 416 544 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 200
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL res 448 96 R0
SYMATTR InstName R2
SYMATTR Value 1000
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL res 272 96 R0
SYMATTR InstName R1
SYMATTR Value 200
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL res 624 112 R0
SYMATTR InstName R3
SYMATTR Value 300
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL LED 272 256 R0
SYMATTR InstName D1
SYMBOL nmos 240 352 R0
SYMATTR InstName M1
SYMATTR Value 2N7002
SYMBOL LED 448 256 R0
SYMATTR InstName D2
SYMBOL voltage 0 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage -448 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 5 5 0 0 5)
SYMBOL nmos 592 592 R0
SYMATTR InstName M3
SYMATTR Value 2N7002
FLAG 0 832 0
TEXT -32 856 Left 2 !.tran 50
* Z:\home\khalils\Downloads\files\data\raw_asc\2079c96515d0_Inverting_Summer.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
V2 vee 0 -15
R2 N001 N002 10k
XU1 0 N001 vcc vee out level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R1 N001 N003 10k
V1 vcc 0 15
V4 N002 0 1
R3 out N001 10k
V3 N003 0 1
.tran 5m
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 -48 128 -48
WIRE 336 -48 272 -48
WIRE -144 16 -256 16
WIRE 96 16 -64 16
WIRE 208 32 192 32
WIRE -256 64 -256 16
WIRE 192 96 192 32
WIRE -16 112 -128 112
WIRE 96 112 96 16
WIRE 96 112 64 112
WIRE 128 112 128 -48
WIRE 128 112 96 112
WIRE 160 112 128 112
WIRE -128 128 -128 112
WIRE 336 128 336 -48
WIRE 336 128 224 128
WIRE 384 128 336 128
WIRE 160 144 80 144
WIRE -256 192 -256 144
WIRE 192 192 192 160
WIRE 208 192 192 192
WIRE 80 224 80 144
WIRE -128 240 -128 208
WIRE 384 256 352 256
WIRE 496 256 464 256
WIRE 384 288 384 256
WIRE 496 288 496 256
WIRE 384 400 384 368
WIRE 496 400 496 368
SYMBOL voltage 384 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 80 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res -48 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage -256 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 1
SYMBOL voltage -128 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 1
SYMBOL voltage 496 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 288 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL OpAmps\\UniversalOpAmp2 192 128 R0
SYMATTR InstName U1
FLAG 80 224 0
FLAG 384 400 0
FLAG 496 400 0
FLAG 352 256 vcc
FLAG 464 256 vee
FLAG 208 32 vcc
FLAG 208 192 vee
FLAG -128 240 0
FLAG -256 192 0
FLAG 384 128 out
TEXT 200 408 Left 2 !.tran 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG5412BF.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nInterrupt Flag recovery time with pull-up resistor not included\nQinj not included\nOnly one channel included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG5412BF.asy)
XU2 vIN vDrain vSource -V 0 +V vFF ADG5412BF ;pnba IN)D)S)Vss)GND)Vdd)FF
C2 vFF 0 12p
C1 vDrain 0 36p
V4 vIN 0 pulse(0 5 0 20n 20n 10u 20u)
R1 vDrain 0 301
V1 +V 0 15
V2 -V 0 -15
V3 vSource 0 10
.tran 0.1m
.lib ADG5412BF.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -112 -128 -112 -144
WIRE -624 -64 -624 -80
WIRE -400 -48 -432 -48
WIRE -272 -48 -320 -48
WIRE -208 -48 -272 -48
WIRE 48 -48 -16 -48
WIRE 128 -48 48 -48
WIRE 224 -48 128 -48
WIRE 128 -16 128 -48
WIRE 224 0 224 -48
WIRE -240 16 -272 16
WIRE -208 16 -240 16
WIRE 32 16 -16 16
WIRE -624 32 -624 16
WIRE -272 32 -272 16
WIRE 32 48 32 16
WIRE 128 80 128 64
WIRE 224 80 224 64
WIRE -272 112 -272 96
WIRE -624 128 -624 112
WIRE -160 144 -160 128
WIRE -64 144 -64 128
WIRE 32 144 32 128
WIRE -624 224 -624 208
SYMBOL voltage 32 32 R0
WINDOW 3 17 95 Left 2
SYMATTR Value pulse(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V4
SYMBOL ADG5412BF -112 0 R0
SYMATTR InstName U2
SYMBOL res 112 -32 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL cap 208 0 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -624 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -304 -48 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL voltage -624 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL cap -288 32 R0
SYMATTR InstName C2
SYMATTR Value 12p
FLAG -624 224 0
FLAG -624 32 0
FLAG -624 -80 +V
FLAG -624 112 -V
FLAG -432 -48 0
FLAG -160 144 -V
FLAG -112 -144 +V
FLAG -64 144 0
FLAG 32 144 0
FLAG 128 80 0
FLAG 224 80 0
FLAG -272 112 0
FLAG 48 -48 vDrain
FLAG -272 -48 vSource
FLAG -240 16 vFF
FLAG 32 16 vIN
TEXT -368 192 Left 2 !.tran 0.1m
TEXT -648 -320 Left 2 ;Note:\nInterrupt Flag recovery time with pull-up resistor not included\nQinj not included\nOnly one channel included\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\2256c8d9a441_IQAMP.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac dec 1000 1 100k
* .dc V1 1 1 0
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1638.asy)
V1 Vin 0 1 AC 0 0
XU1 0 N001 V+ V- Vout LT1638 ;pnba In+)In-)V+)V-)OUT
V3 0 V- 15
V2 V+ 0 15
R1 N001 Vin 1
R2 Vout N001 10
.tran 10ms
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 192 320 192
WIRE 544 192 464 192
WIRE -160 256 -160 224
WIRE 208 288 144 288
WIRE 320 288 320 192
WIRE 320 288 288 288
WIRE 384 288 320 288
WIRE 544 304 544 192
WIRE 544 304 448 304
WIRE 144 320 144 288
WIRE 384 320 336 320
WIRE -16 352 -16 304
WIRE 336 352 336 320
WIRE 144 416 144 400
SYMBOL Res 480 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL OpAmps/LT1638 416 240 R0
SYMATTR InstName U1
SYMBOL Voltage -160 240 R0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL Voltage -16 208 R0
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL Voltage 144 304 R0
WINDOW 3 24 38 Left 2
SYMATTR Value 1
SYMATTR Value2 AC 0 0
SYMATTR InstName V1
SYMBOL Res 304 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
FLAG 336 352 0
FLAG 144 416 0
FLAG 544 304 Vout
FLAG 144 288 Vin
FLAG -160 336 0
FLAG -160 224 V+
FLAG 416 272 V+
FLAG 416 336 V-
FLAG -16 224 0
FLAG -16 352 V-
TEXT 240 512 Left 2 !.tran 10ms
TEXT 248 552 Left 2 ;.ac dec 1000 1 100k
TEXT 256 472 Left 2 ;.dc V1 1 1 0
* Z:\home\khalils\Downloads\files\data\raw_asc\1404c86f56d8_Temperature-Variation-LTSpice.asc
* Generated by LTspice 26.0.1 for Windows.
* Temperature Variation Analysis with LTSpice
* Temperature sweep from -20 degrees to 100 degrees with 20 degrees steps
* Obtained from:\nhttps://k6jca.blogspot.com/2012/07/monte-carlo-and-worst-case-circuit.html
R1 N002 0 10k
V1 N001 0 12
D1 N002 N001 BZX84C6V2L
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.step temp -20 100 20
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1200 680
WIRE 224 -32 -96 -32
WIRE 224 0 224 -32
WIRE -96 96 -96 -32
WIRE 224 96 224 64
WIRE -96 208 -96 176
WIRE 224 208 224 176
SYMBOL zener 240 64 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BZX84C6V2L
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 208 80 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -96 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 224 208 0
FLAG -96 208 0
TEXT 336 -32 Left 2 !.step temp -20 100 20
TEXT 336 16 Left 2 !.tran 1
TEXT -160 -208 Left 4 ;Temperature Variation Analysis with LTSpice
TEXT 344 -80 Left 2 ;Temperature sweep from -20 degrees to 100 degrees with 20 degrees steps
TEXT 344 72 Left 2 ;Obtained from:\nhttps://k6jca.blogspot.com/2012/07/monte-carlo-and-worst-case-circuit.html
* Z:\home\khalils\Downloads\files\data\raw_asc\a9087e894228_highpass2.asc
* Generated by LTspice 26.0.1 for Windows.
;tran 1
C1 N001 P001 0.001micro
R1 P001 0 5k
V1 N001 0 0 AC 1
.ac dec 100 10 1meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 64 80 64
WIRE 80 144 80 64
WIRE 80 256 80 224
WIRE 256 256 256 208
SYMBOL cap 240 64 R0
WINDOW 0 24 8 Left 1
WINDOW 3 127 40 Right 1
SYMATTR InstName C1
SYMATTR Value 0.001micro
SYMBOL voltage 80 128 R0
WINDOW 3 14 105 Invisible 2
WINDOW 123 14 133 Left 1
WINDOW 39 0 0 Left 0
WINDOW 0 24 16 Left 0
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL res 240 112 R0
WINDOW 0 58 40 Right 1
WINDOW 3 36 76 Left 1
SYMATTR InstName R1
SYMATTR Value 5k
FLAG 80 256 0
FLAG 256 256 0
TEXT 48 280 Left 2 !;tran 1
TEXT 64 -8 Left 2 !.ac dec 100 10 1meg
* Z:\home\khalils\Downloads\files\data\raw_asc\5c0e250f86fb_simulacionDiodo1N4007Inversa.asc
* Generated by LTspice 26.0.1 for Windows.
D1 0 N002 1N4007
R1 N002 N001 1K
V1 N001 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -10 1100 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 128 96 48 96
WIRE 256 96 208 96
WIRE 48 128 48 96
WIRE 256 128 256 96
WIRE 48 208 48 192
WIRE 256 208 256 192
WIRE 256 208 48 208
WIRE 48 256 48 208
SYMBOL res 224 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL diode 272 192 R180
WINDOW 0 -39 68 Left 2
WINDOW 3 -91 5 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4007
SYMBOL Misc\\cell 48 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
FLAG 48 256 0
TEXT 72 264 Left 2 !.dc V1 -10 1100 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6104.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6104.asy)
R1 N002 N001 50m
I1 0 N001 sine(0 2 100)
V2 N006 0 2
R3 N004 N002 100
R4 N005 N006 1K
R2 N003 N001 100
V1 N002 0 12
XU1 N005 MP_01 MP_02 0 N002 N003 N004 N001 LTC6104 ;pnba OUT)))V-)INB+)INB-)INA-)INA+
.tran 30m
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 -128 -64 -128
WIRE 80 -128 32 -128
WIRE 176 -128 80 -128
WIRE 192 -128 176 -128
WIRE 368 -128 272 -128
WIRE 448 -128 368 -128
WIRE 448 -112 448 -128
WIRE 176 -80 176 -128
WIRE 272 -80 272 -128
WIRE 448 -16 448 -32
WIRE 176 16 176 0
WIRE 272 16 272 0
WIRE 176 64 272 16
WIRE 272 64 176 16
WIRE 80 80 80 -128
WIRE 176 80 176 64
WIRE 272 80 272 64
WIRE 368 80 368 -128
WIRE 496 208 416 208
WIRE 496 224 496 208
WIRE 496 320 496 304
WIRE 224 352 224 336
WIRE 496 416 496 400
SYMBOL current -48 -128 M90
WINDOW 0 -32 40 VBottom 2
WINDOW 3 32 40 VTop 2
SYMATTR InstName I1
SYMATTR Value sine(0 2 100)
SYMBOL res 160 16 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL res 288 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50m
SYMBOL opamps\\LTC6104 224 208 R0
SYMATTR InstName U1
SYMBOL res 480 208 R0
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL voltage 496 304 R0
SYMATTR InstName V2
SYMATTR Value 2
SYMBOL voltage 448 -128 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 256 16 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 100
FLAG 224 352 0
FLAG 448 -16 0
FLAG -64 -128 0
FLAG 496 416 0
TEXT 616 384 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\749bd4f5ec2d_driver.asc
* Generated by LTspice 26.0.1 for Windows.
A1 in $G_GND 0 0 0 N006 N005 0 SCHMITT VT=2
S5 N002 _Q N006 0 SW
S6 _Q N003 N005 0 SW
S1 N001 $G_VCC DE 0 SW
D2 N003 N004 D
S2 $G_GND N004 DE 0 SW
S4 N003 Q N006 0 SW
D1 N001 N002 D
S3 Q N002 N005 0 SW
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model SW SW(Vt=.5 Ron=1m)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 832
WIRE 96 -160 96 -192
WIRE 48 -144 16 -144
WIRE 528 -96 256 -96
WIRE 48 -80 48 -96
WIRE 96 -48 96 -80
WIRE 96 32 96 16
WIRE 160 32 96 32
WIRE 256 32 256 -96
WIRE 256 32 240 32
WIRE 288 32 256 32
WIRE 416 32 368 32
WIRE 496 32 416 32
WIRE 592 32 560 32
WIRE 592 80 592 32
WIRE 544 96 512 96
WIRE -32 144 -112 144
WIRE 176 144 176 80
WIRE 176 144 32 144
WIRE 352 144 176 144
WIRE 544 160 544 144
WIRE -32 176 -112 176
WIRE 224 176 32 176
WIRE 304 176 304 80
WIRE 304 176 224 176
WIRE 592 208 592 160
WIRE 224 256 224 176
WIRE 352 256 352 144
WIRE 96 304 96 32
WIRE 160 304 96 304
WIRE 256 304 240 304
WIRE 288 304 256 304
WIRE 416 304 416 32
WIRE 416 304 368 304
WIRE 256 432 256 304
WIRE 528 432 256 432
IOPIN -112 144 In
IOPIN 528 -96 Out
IOPIN 528 432 Out
IOPIN 16 -144 In
IOPIN 512 96 In
SYMBOL sw 144 304 M90
SYMATTR InstName S5
SYMBOL diode 80 -48 R0
SYMATTR InstName D1
SYMBOL diode 496 48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL sw 592 176 M180
SYMATTR InstName S2
SYMBOL sw 384 32 M270
SYMATTR InstName S4
SYMBOL sw 96 -64 M180
SYMATTR InstName S1
SYMBOL Digital\\diffschmitt -32 96 R0
WINDOW 3 8 44 Invisible 2
SYMATTR Value VT=2
SYMATTR InstName A1
SYMBOL sw 256 32 M270
SYMATTR InstName S3
SYMBOL sw 272 304 M90
SYMATTR InstName S6
FLAG -112 144 in
FLAG 528 -96 Q
FLAG 528 432 _Q
FLAG 16 -144 DE
FLAG 96 -192 $G_VCC
FLAG 592 208 $G_GND
FLAG -112 176 $G_GND
FLAG 48 -80 0
FLAG 544 160 0
FLAG 512 96 DE
FLAG 224 80 0
FLAG 352 80 0
FLAG 176 256 0
FLAG 304 256 0
TEXT -240 256 Left 2 !.model SW SW(Vt=.5 Ron=1m)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1228.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N005 0 15
V2 N008 0 -15
R2 N001 0 270
XU1 N001 N004 N006 N008 N009 OUT N005 N002 LT1228 ;pnba Iout)In-)In+)V-)Iset)Vout)V+)Gain
R3 N002 OUT 470
R4 0 N002 10
R5 N008 N010 1.24K
R6 N010 0 6.19K
R7 N010 N009 {R}
R1 N004 0 100
R8 N006 0 100
R9 N004 N003 10K
R10 N006 N007 10K
V3 N003 N007 SINE(0 .1 10K)
.tran 3m
.step param R list 10K 5K 2.5K 1.25K
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1228.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1188 680
WIRE 16 48 16 32
WIRE 224 112 208 112
WIRE 320 112 304 112
WIRE 736 112 576 112
WIRE 768 112 736 112
WIRE 864 112 848 112
WIRE 736 128 736 112
WIRE -96 144 -288 144
WIRE 16 144 16 128
WIRE 16 144 -16 144
WIRE -288 160 -288 144
WIRE 16 176 16 144
WIRE 320 176 16 176
WIRE 592 176 576 176
WIRE 688 176 672 176
WIRE 320 240 16 240
WIRE 736 240 736 208
WIRE 736 240 576 240
WIRE 784 240 736 240
WIRE -288 272 -288 240
WIRE -96 272 -288 272
WIRE 16 272 16 240
WIRE 16 272 -16 272
WIRE 16 288 16 272
WIRE 256 304 144 304
WIRE 320 304 256 304
WIRE 592 304 576 304
WIRE 144 320 144 304
WIRE 256 320 256 304
WIRE 16 384 16 368
WIRE 144 416 144 400
WIRE 256 416 256 400
WIRE 448 416 256 416
WIRE 592 416 592 304
WIRE 592 416 528 416
WIRE 256 432 256 416
WIRE 256 528 256 512
FLAG 688 176 0
FLAG 144 416 0
FLAG 208 112 0
FLAG 864 112 0
FLAG 256 528 0
FLAG 16 32 0
FLAG 16 384 0
FLAG 784 240 OUT
SYMBOL voltage 576 176 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 144 304 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 320 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 270
SYMBOL opamps\\LT1228 448 208 R0
SYMATTR InstName U1
SYMBOL res 720 112 R0
SYMATTR InstName R3
SYMATTR Value 470
SYMBOL res 864 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL res 240 304 R0
SYMATTR InstName R5
SYMATTR Value 1.24K
SYMBOL res 240 416 R0
SYMATTR InstName R6
SYMATTR Value 6.19K
SYMBOL res 432 400 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value {R}
SYMBOL res 0 144 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 0 272 R0
SYMATTR InstName R8
SYMATTR Value 100
SYMBOL res 0 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R9
SYMATTR Value 10K
SYMBOL res 0 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R10
SYMATTR Value 10K
SYMBOL voltage -288 144 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 .1 10K)
TEXT 640 448 Left 2 !.tran 3m\n.step param R list 10K 5K 2.5K 1.25K
* Z:\home\khalils\Downloads\files\data\raw_asc\05f908fd6f51_5400-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\LT5400-2.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1468.asy)
C2 N002 0 4.7p
C1 N001 OUT 4.7p
V1 +V 0 15
V2 -V 0 -15
V3 IN 0 AC 1
XU2 N002 N001 +V -V OUT LT1468 ;pnba In+)In-)V+)V-)OUT
XU1 OUT IN 0 0 N002 N002 N001 N001 NC_01 LT5400-2 ;pnba 1)2)3)4)5)6)7)8)PAD
.ac oct 10 1K 10Meg
.lib LT5400.lib
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1472
WIRE 2304 624 1936 624
WIRE 1936 688 1936 624
WIRE 2016 688 1936 688
WIRE 2192 688 2080 688
WIRE 1936 816 1936 688
WIRE 1952 816 1936 816
WIRE 2192 816 2192 688
WIRE 2192 816 2144 816
WIRE 1952 880 1744 880
WIRE 2192 880 2192 816
WIRE 2192 880 2144 880
WIRE 1392 896 1392 880
WIRE 1520 896 1520 880
WIRE 1744 896 1744 880
WIRE 2192 896 2192 880
WIRE 2208 896 2192 896
WIRE 2304 912 2304 624
WIRE 2304 912 2272 912
WIRE 2336 912 2304 912
WIRE 2208 928 2192 928
WIRE 1952 944 1936 944
WIRE 2192 944 2192 928
WIRE 2192 944 2144 944
WIRE 1392 992 1392 976
WIRE 1520 992 1520 976
WIRE 1744 992 1744 976
WIRE 1920 1008 1872 1008
WIRE 1952 1008 1920 1008
WIRE 2192 1008 2192 944
WIRE 2192 1008 2144 1008
WIRE 1920 1120 1920 1008
WIRE 2016 1120 1920 1120
WIRE 2192 1120 2192 1008
WIRE 2192 1120 2080 1120
SYMBOL cap 2080 1104 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7p
SYMBOL misc\\LT5400-2 2048 912 R0
SYMATTR InstName U1
SYMBOL voltage 1520 880 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT1468 2240 848 R0
SYMATTR InstName U2
SYMBOL voltage 1392 880 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 1744 880 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL cap 2080 672 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7p
FLAG 2240 880 +V
FLAG 2240 944 -V
FLAG 2336 912 OUT
FLAG 1520 992 0
FLAG 1520 880 +V
FLAG 1392 992 0
FLAG 1392 880 -V
FLAG 1744 992 0
FLAG 1744 880 IN
FLAG 1872 1008 0
FLAG 1936 944 0
TEXT 2312 1064 Left 2 !.ac oct 10 1K 10Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8220.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
Vin N001 N004 SINE(0 100m 10K)
R1 N002 N003 5.49K
V2 -V 0 -15
Rload OUT 0 10K
Vcm N004 0 1
Vref N005 0 .5
XU1 N004 N002 N003 N001 -V N005 OUT +V AD8220 ;pnba IN-)RG-)RG+)IN+)VEE)REF)OUT)VCC
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8220.asy)
.lib AD8220.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 640 -1264 640 -1280
WIRE 752 -1264 752 -1280
WIRE 464 -1184 96 -1184
WIRE 640 -1168 640 -1184
WIRE 752 -1168 752 -1184
WIRE 464 -1152 368 -1152
WIRE 96 -1136 96 -1184
WIRE 752 -1104 640 -1104
WIRE 752 -1088 752 -1104
WIRE 368 -1056 368 -1072
WIRE 464 -1056 368 -1056
WIRE 96 -1024 96 -1056
WIRE 464 -1024 96 -1024
WIRE 576 -1024 576 -1040
WIRE 96 -1008 96 -1024
WIRE 752 -992 752 -1008
WIRE 576 -928 576 -944
WIRE 96 -912 96 -928
FLAG 640 -1280 +V
FLAG 640 -1168 0
FLAG 752 -1104 OUT
FLAG 496 -1200 +V
FLAG 752 -1280 -V
FLAG 496 -1008 -V
FLAG 752 -992 0
FLAG 752 -1168 0
FLAG 96 -912 0
FLAG 576 -928 0
SYMBOL voltage 640 -1280 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 96 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 100m 10K)
SYMBOL res 352 -1168 R0
SYMATTR InstName R1
SYMATTR Value 5.49K
SYMBOL voltage 752 -1280 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 96 -1024 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 35 39 Left 2
SYMATTR InstName Vcm
SYMATTR Value 1
SYMBOL voltage 576 -1040 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName Vref
SYMATTR Value .5
SYMBOL AD8220 496 -1104 R0
SYMATTR InstName U1
TEXT 328 -960 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\dd3778b92573_simple_op_amp.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP482.asy)
V1 N002 0 9v
V2 N003 0 AC 1 0
V3 0 N004 9
R2 0 N001 1k
XU1 N003 N001 N002 N004 output OP482 ;pnba In+)In-)V+)V-)OUT
R1 N001 output 1k
.ac dec 10 20 20000
.lib OP482.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -16 0 -64 0
WIRE -16 16 -16 0
WIRE 96 32 0 32
WIRE -64 48 -64 0
WIRE 368 144 32 144
WIRE 32 160 32 144
WIRE -64 176 -64 128
WIRE 0 176 0 32
WIRE 0 176 -64 176
WIRE 96 192 96 112
WIRE 96 192 64 192
WIRE 144 192 96 192
WIRE 0 208 -320 208
WIRE 368 256 368 224
WIRE 400 256 368 256
WIRE 368 272 368 256
WIRE 32 352 32 224
WIRE 368 352 32 352
IOPIN 144 192 Out
SYMBOL res 80 16 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res -80 32 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 368 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9v
SYMBOL voltage -320 192 R0
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1 0
SYMATTR InstName V2
SYMATTR Value ""
SYMBOL OpAmps\\OP482 32 128 R0
SYMATTR InstName U1
SYMBOL voltage 368 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 9
FLAG -320 288 0
FLAG -16 16 0
FLAG 144 192 output
FLAG 400 256 0
TEXT -264 304 Left 2 !.ac dec 10 20 20000