Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1108-12.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1108-12.asy)
D1 N001 OUT MBRS360
C2 OUT 0 100 Rser=0.02
XU1 IN IN N001 0 0 N002 N003 OUT LT1108 top=753K bot=87.4K ;pnba Ilim)Vin)SW1)SW2)GND)AO)SET)Sense
Rload OUT 0 50
L1 IN N001 33 Rser=0.02 Rpar=5000
V1 IN 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
.lib LT1108.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2456 1432
WIRE 1472 912 1264 912
WIRE 1600 912 1472 912
WIRE 1632 912 1600 912
WIRE 1744 912 1712 912
WIRE 1792 912 1744 912
WIRE 1904 912 1856 912
WIRE 1968 912 1904 912
WIRE 1264 928 1264 912
WIRE 1968 928 1968 912
WIRE 1472 960 1472 912
WIRE 1600 960 1600 912
WIRE 1264 1024 1264 1008
WIRE 1392 1024 1376 1024
WIRE 1744 1024 1744 912
WIRE 1744 1024 1680 1024
WIRE 1968 1024 1968 1008
WIRE 1904 1104 1904 912
WIRE 1904 1104 1680 1104
WIRE 1904 1120 1904 1104
WIRE 1392 1184 1376 1184
WIRE 1696 1184 1680 1184
WIRE 1904 1200 1904 1184
WIRE 1536 1264 1536 1248
SYMBOL res 1952 912 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL IND 1616 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL PowerProducts\\LT1108-12 1536 1104 R0
SYMATTR InstName U1
SYMBOL schottky 1792 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL VOLTAGE 1264 912 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL POLCAP 1888 1120 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
FLAG 1968 912 OUT
FLAG 1904 1200 0
FLAG 1968 1024 0
FLAG 1264 1024 0
FLAG 1696 1184 0
FLAG 1536 1264 0
FLAG 1264 912 IN
TEXT 1712 1248 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3007.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 1
Rload OUT 0 60
XU1 IN OUT OUT 0 IN LT3008 ;pnba IN)OUT)ADJ)GND)_SHDN
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3007.asy)
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 60
SYMBOL PowerProducts\\LT3007 176 96 R0
SYMATTR InstName U1
TEXT 336 248 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2066.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC2066.asy)
R4 N003 0 100m
XU1 N004 N001 +V 0 OUT +V LTC2066 ;pnba IN+)IN-)VCC)VEE)OUT)SHDN
R5 N002 N003 {5/Iload}
V3 +V 0 3.3
R1 OUT N001 1Meg
R2 N001 0 10K
R3 N004 N003 10K
V2 N002 0 5
.op
.step dec param Iload .1m 250m 2
.lib LTC2066.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2188 680
WIRE 992 64 976 64
WIRE 1088 64 1072 64
WIRE 1152 64 1088 64
WIRE 1280 64 1232 64
WIRE 848 128 704 128
WIRE 704 144 704 128
WIRE 848 144 848 128
WIRE 1088 192 1088 64
WIRE 1120 192 1088 192
WIRE 576 224 576 208
WIRE 1280 224 1280 64
WIRE 1280 224 1264 224
WIRE 1296 224 1280 224
WIRE 704 240 704 224
WIRE 848 256 848 224
WIRE 976 256 848 256
WIRE 1120 256 1056 256
WIRE 848 272 848 256
WIRE 576 320 576 304
WIRE 1152 336 1152 304
WIRE 848 368 848 352
SYMBOL LTC2066 1152 224 R0
SYMATTR InstName U1
SYMBOL voltage 704 128 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 1072 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res 1088 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 832 256 R0
SYMATTR InstName R4
SYMATTR Value 100m
SYMBOL res 1248 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL voltage 576 208 R0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL res 832 128 R0
SYMATTR InstName R5
SYMATTR Value {5/Iload}
FLAG 1296 224 OUT
FLAG 1152 336 0
FLAG 976 64 0
FLAG 1200 304 +V
FLAG 848 368 0
FLAG 704 240 0
FLAG 576 320 0
FLAG 576 208 +V
FLAG 1152 144 +V
TEXT 1040 344 Left 2 !.op\n.step dec param Iload .1m 250m 2
* Z:\home\khalils\Downloads\files\data\raw_asc\4952259e488b_scheme1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1014.asy)
V2 N003 0 {Vcc}
D1 N002 N001 1N5818
Vin N004 0 DC 0
R1 N001 N004 1k
R2 N002 N001 2k
V3 0 N005 {Vcc}
XU1 0 N001 N003 N005 N002 LT1013 ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.param Vcc=22
.dc Vin {-1.1*Vcc} {1.1*Vcc} 0.01
.lib LT1013.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 176 -48 112 -48
WIRE 272 -48 240 -48
WIRE 112 48 112 -48
WIRE 160 48 112 48
WIRE 272 48 272 -48
WIRE 272 48 240 48
WIRE 512 96 192 96
WIRE 512 112 512 96
WIRE 192 176 192 96
WIRE 0 192 -96 192
WIRE 112 192 112 48
WIRE 112 192 80 192
WIRE 160 192 112 192
WIRE -96 208 -96 192
WIRE 272 208 272 48
WIRE 272 208 224 208
WIRE 384 208 272 208
WIRE 512 208 512 192
WIRE 512 208 432 208
WIRE 160 224 128 224
WIRE 432 224 432 208
WIRE 512 224 512 208
WIRE 128 256 128 224
WIRE -96 304 -96 288
WIRE 192 336 192 240
WIRE 512 336 512 304
WIRE 512 336 192 336
SYMBOL res 256 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2k
SYMBOL voltage -96 192 R0
SYMATTR InstName Vin
SYMATTR Value DC 0
SYMBOL voltage 512 208 R0
SYMATTR InstName V3
SYMATTR Value {Vcc}
SYMBOL diode 240 -64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N5818
SYMBOL res 96 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL OpAmps\\LT1014 192 144 R0
SYMATTR InstName U1
SYMBOL voltage 512 96 R0
SYMATTR InstName V2
SYMATTR Value {Vcc}
FLAG 128 256 0
FLAG -96 304 0
FLAG 432 224 0
TEXT 304 -24 Left 2 !.param Vcc=22
TEXT 304 48 Left 2 !.dc Vin {-1.1*Vcc} {1.1*Vcc} 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1999-50.asc
* Generated by LTspice 26.0.1 for Windows.
C1 0 N005 .1
V1 N002 N004 sine(0 25m 5K)
V2 N004 0 sine(5 1 1K)
V3 N001 0 5
XU1 N001 N002 N004 MP_01 0 N005 OUT N003 LT1999-x Gain=50 ;pnba V+)+IN)-IN))GND)Ref)Vout)_SHDN
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1999-50.asy)
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 256 112 -176 112
WIRE -176 128 -176 112
WIRE 256 128 256 112
WIRE 144 176 -64 176
WIRE 400 176 368 176
WIRE -64 208 -64 176
WIRE -176 224 -176 208
WIRE 400 256 368 256
WIRE -64 336 -64 288
WIRE 144 336 -64 336
WIRE 384 336 368 336
WIRE 480 336 448 336
WIRE -64 352 -64 336
WIRE 256 400 256 384
WIRE -64 448 -64 432
FLAG 256 400 0
FLAG 480 336 0
FLAG -64 448 0
FLAG 400 256 OUT
FLAG -176 224 0
SYMBOL cap 448 320 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage -64 192 R0
SYMATTR InstName V1
SYMATTR Value sine(0 25m 5K)
SYMBOL voltage -64 336 R0
SYMATTR InstName V2
SYMATTR Value sine(5 1 1K)
SYMBOL voltage -176 112 R0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL opamps\\LT1999-50 256 256 R0
SYMATTR InstName U1
TEXT 416 432 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8647.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N004 0 17.8k
V1 vIN 0 7
L1 N002 vOUT 1 Rser=6.3m
C4 vOUT 0 100 Rser=2m
R2 vOUT N005 1Meg
R3 N005 0 243k
C5 vOUT N005 4.7p
Rload vOUT 0 0.714
C1 N006 0 1n
XU1 vOUT N003 N001 vIN PG 0 vIN N002 N004 N005 N006 0 LT8647 ;pnba BIAS)INTVcc)BST)VIN)PG)GND)EN/UV)SW)RT)FB)TR/SS)SYNC/MODE
C2 N002 N001 0.1
R4 vOUT PG 100k
C3 N003 0 1
.tran 800u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8647.asy)
.lib LT8647.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1848 740
WIRE 80 0 -16 0
WIRE 112 0 80 0
WIRE 448 0 400 0
WIRE -16 16 -16 0
WIRE 80 96 80 0
WIRE 112 96 80 96
WIRE 448 96 448 64
WIRE 448 96 400 96
WIRE 512 96 448 96
WIRE 624 96 592 96
WIRE 704 96 624 96
WIRE 816 96 704 96
WIRE 912 96 816 96
WIRE -16 112 -16 96
WIRE 704 112 704 96
WIRE 816 112 816 96
WIRE 912 112 912 96
WIRE 32 192 0 192
WIRE 112 192 96 192
WIRE 432 192 400 192
WIRE 464 192 432 192
WIRE 624 192 624 96
WIRE 624 192 544 192
WIRE 816 208 816 176
WIRE 912 208 912 192
WIRE 112 288 96 288
WIRE 624 288 624 192
WIRE 624 288 400 288
WIRE 624 304 624 288
WIRE 16 384 0 384
WIRE 112 384 96 384
WIRE 624 384 624 368
WIRE 624 384 400 384
WIRE 704 384 704 192
WIRE 704 384 624 384
WIRE 704 400 704 384
WIRE 32 480 0 480
WIRE 112 480 96 480
WIRE 416 480 400 480
WIRE 704 496 704 480
FLAG 0 384 0
FLAG -16 112 0
FLAG 816 208 0
FLAG 704 496 0
FLAG 912 208 0
FLAG 912 96 vOUT
FLAG -16 0 vIN
FLAG 0 480 0
FLAG 0 192 0
FLAG 96 288 0
FLAG 432 192 PG
FLAG 416 480 0
SYMBOL res 112 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 17.8k
SYMBOL voltage -16 0 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 7
SYMBOL ind 496 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=6.3m
SYMBOL cap 800 112 R0
SYMATTR InstName C4
SYMATTR Value 100
SYMATTR SpiceLine Rser=2m
SYMBOL res 688 96 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 688 384 R0
SYMATTR InstName R3
SYMATTR Value 243k
SYMBOL cap 608 304 R0
SYMATTR InstName C5
SYMATTR Value 4.7p
SYMBOL res 896 96 R0
SYMATTR InstName Rload
SYMATTR Value 0.714
SYMBOL cap 96 496 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL LT8647 256 240 R0
SYMATTR InstName U1
SYMBOL cap 432 64 M180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL res 560 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL cap 96 176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
TEXT 400 584 Left 2 !.tran 800u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0126e48143ec_resonator.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 IN {L}
C2 IN OUT {Cb}
C1 N001 N002 {Ca}
R1 OUT N002 {R}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 48 96
WIRE 352 96 224 96
WIRE 48 160 48 96
WIRE 48 160 0 160
WIRE 352 160 352 96
WIRE 400 160 352 160
WIRE 48 272 48 160
WIRE 160 272 128 272
WIRE 256 272 224 272
WIRE 352 272 352 160
WIRE 352 272 336 272
IOPIN 0 160 In
IOPIN 400 160 Out
SYMBOL cap 160 288 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value {Ca}
SYMBOL res 352 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R}
SYMBOL cap 160 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value {Cb}
SYMBOL ind 144 256 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value {L}
FLAG 0 160 IN
FLAG 400 160 OUT
* Z:\home\khalils\Downloads\files\data\raw_asc\a2159a600724_sine_wave.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 0 1k
R3 N002 N001 1m
R1 N002 0 1k
V1 N002 0 SINE(0 2 1k)
V2 N001 0 SINE(0 1 1k)
.tran 0 1m 0 100
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -144 96 -160 96
WIRE -16 96 -64 96
WIRE 288 96 -16 96
WIRE 400 96 288 96
WIRE -16 144 -16 96
WIRE 288 160 288 96
WIRE 400 160 400 96
WIRE -160 176 -160 96
WIRE -160 288 -160 256
WIRE -160 288 -176 288
WIRE -16 288 -16 224
WIRE -16 288 -160 288
WIRE 288 288 288 240
WIRE 288 288 -16 288
WIRE 400 288 400 240
WIRE 400 288 288 288
WIRE 288 304 288 288
SYMBOL res 272 144 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 384 144 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res -48 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1m
SYMBOL voltage -16 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 2 1k)
SYMBOL voltage -160 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 1 1k)
FLAG 288 304 0
TEXT -8 312 Left 2 !.tran 0 1m 0 100
* Z:\home\khalils\Downloads\files\data\raw_asc\6b98faf2c76b_1632.asc
* Generated by LTspice 26.0.1 for Windows.
* Single Supply, 40dB Gain, 550KHz Instrumentation Amplifier
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1632.asy)
R2 N001 0 20K
V1 +V 0 3
R4 N002 N001 432
XU2 IN+ N002 +V 0 OUT LT1632 ;pnba In+)In-)V+)V-)OUT
V3 IN+ 0 SINE(1.5 .1 50K)
R5 OUT N002 20K
R3 N002 N003 2K
V2 IN+ IN- SINE(14.5m 10m 500K)
R1 N003 N001 2K
XU1 IN- N001 +V 0 N003 LT1632 ;pnba In+)In-)V+)V-)OUT
.tran 50u
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 240 48 128 48
WIRE 400 48 320 48
WIRE 432 48 400 48
WIRE 544 48 512 48
WIRE 32 112 16 112
WIRE 128 112 128 48
WIRE 128 112 112 112
WIRE 160 112 128 112
WIRE 256 112 240 112
WIRE -128 176 -128 160
WIRE 192 208 192 192
WIRE 128 224 128 112
WIRE 160 224 128 224
WIRE 480 224 480 208
WIRE 256 240 256 112
WIRE 256 240 224 240
WIRE 288 240 256 240
WIRE 400 240 400 48
WIRE 400 240 368 240
WIRE 448 240 400 240
WIRE 128 256 0 256
WIRE 160 256 128 256
WIRE 544 256 544 48
WIRE 544 256 512 256
WIRE 592 256 544 256
WIRE -128 272 -128 256
WIRE 448 272 400 272
WIRE 0 288 0 256
WIRE 192 288 192 272
WIRE 480 304 480 288
WIRE 0 400 0 368
WIRE 352 400 0 400
WIRE 400 400 400 272
WIRE 400 400 352 400
WIRE 0 416 0 400
WIRE 0 512 0 496
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL voltage 0 384 M180
WINDOW 0 24 104 Left 0
WINDOW 3 24 16 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(14.5m 10m 500K)
SYMBOL opamps\\LT1632 480 192 R0
SYMATTR InstName U2
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 20K
SYMBOL res 384 224 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 2K
SYMBOL voltage 0 400 R0
SYMATTR InstName V3
SYMATTR Value SINE(1.5 .1 50K)
SYMBOL res 528 32 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R5
SYMATTR Value 20K
SYMBOL opamps\\LT1632 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -128 160 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res 336 32 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R4
SYMATTR Value 432
FLAG -128 272 0
FLAG 192 192 +V
FLAG -128 160 +V
FLAG 16 112 0
FLAG 192 288 0
FLAG 480 208 +V
FLAG 480 304 0
FLAG 128 256 IN-
FLAG 352 400 IN+
FLAG 0 512 0
FLAG 592 256 OUT
TEXT 478 386 Left 0 !.tran 50u
TEXT 352 -8 Bottom 0 ;Single Supply, 40dB Gain, 550KHz Instrumentation Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX16171.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX16171.asy)
V1 IN 0 12
C1 IN 0 0.1
XU1 N002 IN IN IN 0 OUT MAX16171 ;pnba GATE)SRC)IN)EN)GND)OUT
MQ1 OUT N002 IN IN IPD068N10N3
S1 0 OUT N001 0 SCSW
C2 OUT 0 100
V2 N001 0 PWL(0 0 6m 0 +1m 1)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 20m startup
.model SCSW SW(Ron=2 Roff=200 Vt=.5 Vh=-.4)
.lib MAX16171.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1532 680
WIRE -208 -192 -224 -192
WIRE -32 -192 -208 -192
WIRE 160 -192 -32 -192
WIRE 304 -192 160 -192
WIRE 512 -192 400 -192
WIRE 640 -192 512 -192
WIRE 816 -192 640 -192
WIRE 832 -192 816 -192
WIRE 832 -176 832 -192
WIRE 992 -160 880 -160
WIRE -224 -144 -224 -192
WIRE 640 -144 640 -192
WIRE 992 -144 992 -160
WIRE 832 -80 832 -96
WIRE 992 -48 992 -64
WIRE 640 -32 640 -80
WIRE -224 -16 -224 -64
WIRE 160 0 160 -192
WIRE 320 0 320 -144
WIRE -32 96 -32 -192
WIRE -32 96 -96 96
WIRE 64 96 -32 96
WIRE 512 144 512 -192
WIRE 512 144 416 144
WIRE -96 160 -96 96
WIRE -32 192 -32 96
WIRE 64 192 -32 192
WIRE -96 272 -96 224
WIRE 240 336 240 288
SYMBOL voltage -224 -160 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 624 -144 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMBOL nmos 400 -144 M270
WINDOW 0 52 47 VTop 2
WINDOW 3 -16 79 VLeft 2
SYMATTR InstName Q1
SYMATTR Value IPD068N10N3
SYMBOL sw 832 -80 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SCSW
SYMBOL voltage 992 -160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 6m 0 +1m 1)
SYMBOL cap -112 160 R0
SYMATTR InstName C1
SYMATTR Value 0.1
SYMBOL MAX16171 240 144 R0
SYMATTR InstName U1
FLAG 240 336 0
FLAG -96 272 0
FLAG 640 -32 0
FLAG -224 -16 0
FLAG -208 -192 IN
FLAG 816 -192 OUT
FLAG 832 -80 0
FLAG 880 -112 0
FLAG 992 -48 0
TEXT 560 272 Left 2 !.tran 20m startup
TEXT 560 232 Left 2 !.model SCSW SW(Ron=2 Roff=200 Vt=.5 Vh=-.4)
* Z:\home\khalils\Downloads\files\data\raw_asc\c4f645a4b9ab_1.2.1.asc
* Generated by LTspice 26.0.1 for Windows.
Vi N003 0 0
Rb N004 N003 1K
Rc N001 N002 1K
Vcc N001 0 5
Q1 N002 N004 0 0 NPN
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Vi 0 5 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 432 -80 240 -80
WIRE 240 64 240 0
WIRE 432 96 432 -80
WIRE 32 112 -32 112
WIRE 176 112 112 112
WIRE -32 176 -32 112
WIRE -32 272 -32 256
WIRE 240 272 240 160
WIRE 240 272 -32 272
WIRE 256 272 240 272
WIRE 432 272 432 176
WIRE 432 272 256 272
WIRE 256 304 256 272
SYMBOL voltage 432 80 R0
SYMATTR InstName Vcc
SYMATTR Value 5
SYMBOL npn 176 64 R0
SYMATTR InstName Q1
SYMBOL voltage -32 160 R0
SYMATTR InstName Vi
SYMATTR Value 0
SYMBOL res 224 -96 R0
SYMATTR InstName Rc
SYMATTR Value 1K
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rb
SYMATTR Value 1K
FLAG 256 304 0
TEXT -66 328 Left 2 !.dc Vi 0 5 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\3b1e6f6321a0_half_wave_rectifier.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 SINE(0 12 50)
D1 N001 N002 1N4148
R1 N002 0 10kR
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 80 32 80
WIRE 336 80 224 80
WIRE 32 144 32 80
WIRE 336 160 336 80
WIRE 32 288 32 224
WIRE 240 288 32 288
WIRE 336 288 336 240
WIRE 336 288 240 288
FLAG 240 288 0
SYMBOL voltage 32 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 12 50)
SYMBOL diode 160 96 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 320 144 R0
SYMATTR InstName R1
SYMATTR Value 10kR
TEXT 0 312 Left 2 !.tran 0.05
* Z:\tmp\asc_dec_bjh7r6w2\12819e02b06a_ideal_diode_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 in 4.7k
R3 N003 0 10k
V2 0 V- 10
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 112 -112 112 -224
WIRE 240 -112 112 -112
WIRE -304 -96 -304 -128
WIRE -304 0 -304 -16
WIRE -304 0 -384 0
WIRE -304 16 -304 0
WIRE 192 16 192 -16
WIRE -384 32 -384 0
WIRE -96 32 -112 32
WIRE -16 32 -96 32
WIRE 112 32 112 -112
WIRE 112 32 64 32
WIRE 160 32 112 32
WIRE -96 48 -96 32
WIRE 288 48 224 48
WIRE 160 64 96 64
WIRE 96 80 96 64
WIRE 192 112 192 80
WIRE -304 144 -304 96
WIRE -96 144 -96 128
WIRE 96 192 96 160
SYMBOL res 80 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL res 80 64 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL voltage -304 0 R0
WINDOW 0 29 15 Left 2
WINDOW 3 34 36 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 10
FLAG -384 32 0
FLAG 192 112 V-
FLAG 192 -16 V+
FLAG -304 -128 V+
FLAG -304 144 V-
FLAG 96 192 0
FLAG -112 32 in
FLAG -96 144 0
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5672R.asc
* Generated by LTspice 26.0.1 for Windows.
RLOAD vOUT 0 1k
CLOAD vOUT 0 10n
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
V1 Vdd 0 5
XU1 vDAC Vdd 0 vOUT AD5672R Gain=2 ;pnba Vdac)Vdd)GND)Vout
.tran 50u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5672R.asy)
.lib AD5672R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 112 112 0 112
WIRE 192 112 112 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -240 -80 Vdd
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL AD5672R -208 112 R0
SYMATTR InstName U1
TEXT -160 312 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\19109452a74e_1991.asc
* Generated by LTspice 26.0.1 for Windows.
V1 -V 0 -5
V2 +V 0 +5
XU1 N001 NC_01 NC_02 -V 0 OUT +V NC_03 NC_04 0 LT1991 ;pnba P1)P3)P9)Vee)Ref)OUT)VCC)M9)M3)M1
V4 N001 0 SINE(0 .1 100)
.tran .1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1991.asy)
.lib LT1991.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1156 980
WIRE 496 400 400 400
WIRE 144 432 144 400
WIRE 320 432 320 416
WIRE 400 432 400 400
WIRE -144 528 -144 512
WIRE -16 528 -16 512
WIRE -144 624 -144 608
WIRE -16 624 -16 608
WIRE 320 704 320 688
WIRE 400 720 400 688
WIRE 144 752 144 688
WIRE 144 848 144 832
FLAG -16 624 0
FLAG -144 624 0
FLAG -144 512 -V
FLAG -16 512 +V
FLAG 320 416 +V
FLAG 320 704 -V
FLAG 400 720 0
FLAG 144 400 0
FLAG 144 848 0
FLAG 496 400 OUT
SYMBOL voltage -144 512 R0
SYMATTR InstName V1
SYMATTR Value -5
SYMBOL voltage -16 512 R0
SYMATTR InstName V2
SYMATTR Value +5
SYMBOL opamps\\LT1991 320 560 R0
SYMATTR InstName U1
SYMBOL voltage 144 736 R0
SYMATTR InstName V4
SYMATTR Value SINE(0 .1 100)
TEXT 328 784 Left 0 !.tran .1