Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4601A-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4601A-1.asy)
XU1 IN 0 OUT MP_01 OUT MP_02 MP_03 0 N001 N004 N005 N007 N006 N011 N008 N003 N002 N009 N010 N005 LTM4601-1 ;pnba Vin)PGND)Vout))Vout_LCL)))SGND)Pgood)FB)DRVcc)MARG1)MARG0)Fset)MPGM)Comp)Run)Track/SS)PLLIN)INTVcc
R1 N004 0 8.25K
R5 N011 0 100K
Rload OUT 0 .625
C1 OUT N004 100p
C2 OUT 0 100
R2 N008 0 392K
V1 IN 0 15
R4 IN N002 100K
C3 N009 0 .001
R3 OUT N001 100K
.tran 750u startup
.lib LTM4601-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1084 680
WIRE 432 -32 -144 -32
WIRE -160 -16 -256 -16
WIRE 208 -16 -160 -16
WIRE -256 0 -256 -16
WIRE 208 0 208 -16
WIRE -144 48 -144 -32
WIRE -128 48 -144 48
WIRE 16 48 -48 48
WIRE 432 48 432 -32
WIRE 432 48 400 48
WIRE -256 96 -256 80
WIRE -160 112 -160 -16
WIRE -80 112 -160 112
WIRE 16 112 0 112
WIRE 432 112 432 48
WIRE 432 112 400 112
WIRE 640 112 432 112
WIRE 736 112 640 112
WIRE 640 128 640 112
WIRE 736 128 736 112
WIRE 16 176 0 176
WIRE 432 176 400 176
WIRE 480 176 432 176
WIRE 480 192 480 176
WIRE 640 224 640 192
WIRE 736 224 736 208
WIRE 16 240 0 240
WIRE 416 240 400 240
WIRE 480 288 480 272
WIRE 0 304 0 240
WIRE 16 304 0 304
WIRE 416 304 400 304
WIRE -80 368 -96 368
WIRE 16 368 0 368
WIRE 416 368 400 368
WIRE 496 368 480 368
WIRE 16 432 0 432
WIRE 480 432 400 432
WIRE 576 432 560 432
WIRE 128 512 128 496
WIRE 288 512 288 496
SYMBOL res 16 384 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 392K
SYMBOL cap 624 128 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMBOL voltage -256 -16 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 720 112 R0
SYMATTR InstName Rload
SYMATTR Value .625
SYMBOL res 464 448 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 100K
SYMBOL res 464 176 R0
SYMATTR InstName R1
SYMATTR Value 8.25K
SYMBOL PowerProducts\\LTM4601A-1 208 256 R0
SYMATTR InstName U1
SYMBOL cap 416 112 R0
WINDOW 0 34 18 Left 2
WINDOW 3 35 47 Left 2
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL cap 416 352 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL res -144 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res -96 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 100K
FLAG 128 512 0
FLAG 288 512 0
FLAG 480 288 0
FLAG -96 368 0
FLAG 640 224 0
FLAG 736 224 0
FLAG -256 96 0
FLAG 496 368 0
FLAG 736 112 OUT
FLAG -256 -16 IN
FLAG 576 432 0
TEXT 600 336 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3621-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3621-2.asy)
XU1 N001 IN IN NC_01 N003 N002 N002 0 0 LTC3621-2 ;pnba SW)Vin)Run)Pgood)FB)INTVcc)Mode)SGND)GND
Rload OUT 0 5
L1 N001 OUT 3.3 Rser=20m
R1 OUT N003 187K
R2 N003 0 25.5K
C2 OUT N003 22p
C3 OUT 0 22 Rser=10m
C1 N002 0 1
V1 IN 0 12
.tran 1m startup
.lib LTC3621-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 32 -64 32
WIRE 208 32 48 32
WIRE -64 48 -64 32
WIRE 208 48 208 32
WIRE 48 112 48 32
WIRE 64 112 48 112
WIRE 384 112 352 112
WIRE 496 112 464 112
WIRE 592 112 496 112
WIRE 672 112 592 112
WIRE 752 112 672 112
WIRE 496 128 496 112
WIRE 592 128 592 112
WIRE 672 128 672 112
WIRE 752 128 752 112
WIRE -64 144 -64 128
WIRE 64 208 48 208
WIRE 496 208 352 208
WIRE 592 208 592 192
WIRE 592 208 496 208
WIRE 496 224 496 208
WIRE 672 224 672 192
WIRE 752 224 752 208
WIRE -32 304 -48 304
WIRE 48 304 48 208
WIRE 48 304 32 304
WIRE 64 304 48 304
WIRE 496 320 496 304
WIRE 160 384 160 368
WIRE 256 384 256 368
SYMBOL res 736 112 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL cap 656 128 R0
SYMATTR InstName C3
SYMATTR Value 22
SYMATTR SpiceLine Rser=10m
SYMBOL res 480 208 R0
SYMATTR InstName R2
SYMATTR Value 25.5K
SYMBOL cap 576 128 R0
SYMATTR InstName C2
SYMATTR Value 22p
SYMBOL cap 32 288 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 480 112 R0
SYMATTR InstName R1
SYMATTR Value 187K
SYMBOL ind 368 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=20m
SYMBOL PowerProducts\\LTC3621-2 208 208 R0
SYMATTR InstName U1
SYMBOL voltage -64 32 R0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 160 384 0
FLAG 256 384 0
FLAG -48 304 0
FLAG -64 144 0
FLAG 496 320 0
FLAG 672 224 0
FLAG 752 224 0
FLAG -64 32 IN
FLAG 752 112 OUT
TEXT 592 312 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5676R.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5676R.asy)
RLOAD vOUT 0 1k
V1 Vdd 0 5
XU1 vDAC Vdd 0 vOUT AD5676R Gain=2 ;pnba Vdac)Vdd)GND)Vout
CLOAD vOUT 0 10n
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
.tran 50u
.lib AD5676R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 112 112 0 112
WIRE 192 112 112 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL AD5676R -208 112 R0
SYMATTR InstName U1
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -240 -80 Vdd
TEXT -160 312 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\34917b905307_fig-02-02-02.asc
* Generated by LTspice 26.0.1 for Windows.
V1 VP 0 AC 1
E2 N001 0 N002 0 1
E1 VDIFF 0 VP 0 39810
RP N002 VDIFF 176.8k
RO VOUT N001 100
CP N002 0 1n
.ac dec 100 100 100meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1740 680
WIRE 192 0 144 0
WIRE 544 16 480 16
WIRE 656 16 624 16
WIRE 480 48 480 16
WIRE 144 64 144 0
WIRE 224 64 144 64
WIRE 352 64 304 64
WIRE 432 64 352 64
WIRE 432 112 400 112
WIRE 144 128 144 64
WIRE 16 144 0 144
WIRE 96 144 16 144
WIRE 400 144 400 112
WIRE 352 160 352 64
WIRE 480 160 480 128
WIRE 80 192 0 192
WIRE 96 192 80 192
WIRE 16 240 16 144
WIRE 144 272 144 208
WIRE 352 272 352 224
WIRE 80 288 80 192
WIRE 16 368 16 320
IOPIN 656 16 Out
IOPIN 0 144 In
IOPIN 0 192 In
IOPIN 192 0 Out
SYMBOL cap 336 160 R0
SYMATTR InstName CP
SYMATTR Value 1n
SYMBOL e 144 112 R0
SYMATTR InstName E1
SYMATTR Value 39810
SYMBOL res 320 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RP
SYMATTR Value 176.8k
SYMBOL e 480 32 R0
SYMATTR InstName E2
SYMATTR Value 1
SYMBOL res 640 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RO
SYMATTR Value 100
SYMBOL voltage 16 224 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
FLAG 144 272 0
FLAG 16 368 0
FLAG 352 272 0
FLAG 400 144 0
FLAG 480 160 0
FLAG 80 288 0
FLAG 656 16 VOUT
FLAG 0 144 VP
FLAG 0 192 VN
FLAG 192 0 VDIFF
TEXT 176 336 Left 2 !.ac dec 100 100 100meg
* Z:\home\khalils\Downloads\files\data\raw_asc\3309646b562e_fft.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IP 0 SINE(0 10 100)
D1 0 OP 1N4148
D2 OP 0 1N4148
R1 OP IP 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 64 48 64
WIRE 96 64 64 64
WIRE 240 64 176 64
WIRE 304 64 240 64
WIRE 384 64 304 64
WIRE 416 64 384 64
WIRE 240 96 240 64
WIRE 304 96 304 64
WIRE 48 144 48 64
WIRE 240 176 240 160
WIRE 304 176 304 160
FLAG 48 224 0
FLAG 240 176 0
FLAG 304 176 0
FLAG 384 64 OP
FLAG 64 64 IP
SYMBOL voltage 48 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 100)
SYMBOL diode 256 160 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL diode 288 96 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL res 192 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
TEXT 14 248 Left 2 !.tran 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\681cffe3d9a1_not_gate.asc
* Generated by LTspice 26.0.1 for Windows.
* out
V1 N002 0 PULSE(0 5 0 0.01m 0.01m 1m 2m)
V2 N001 0 5
M1 N001 N002 N003 N001 PMOS
M2 N003 N002 N004 N004 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 32 320 32
WIRE 320 128 320 32
WIRE 320 128 224 128
WIRE 320 176 320 128
WIRE 320 176 224 176
WIRE 112 208 32 208
WIRE 176 208 112 208
WIRE 256 224 224 224
WIRE 256 240 256 224
WIRE 320 240 256 240
WIRE 400 288 256 288
WIRE 112 320 112 208
WIRE 208 320 112 320
WIRE 400 336 400 288
WIRE 400 336 256 336
SYMBOL voltage 384 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL nmos4 208 240 R0
SYMATTR InstName M2
SYMBOL pmos4 176 128 R0
SYMATTR InstName M1
SYMBOL voltage 32 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 0.01m 0.01m 1m 2m)
FLAG 384 112 0
FLAG 32 288 0
TEXT 0 352 Left 2 !.tran 10m
TEXT 320 240 Left 2 ;out
* Z:\home\khalils\Downloads\files\data\raw_asc\08d976d09b9f_Assignment_4b__iii_.asc
* Generated by LTspice 26.0.1 for Windows.
* Full Wave Rectifier (Diode Bridge) (with 1microF Capacitor) (Ideal)
D4 N003 N002 1N4148
D2 N003 0 1N4148
D3 N002 N001 1N4148
R1 N001 N003 1000
D1 0 N001 1N4148
C1 N001 N003 0.000001
V1 0 N002 SINE(0 311 50) Rser=0.001
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 368 80 64 80
WIRE 512 80 368 80
WIRE 64 96 64 80
WIRE 64 96 -96 96
WIRE 224 96 64 96
WIRE 224 128 224 96
WIRE -96 144 -96 96
WIRE 368 208 368 80
WIRE 512 224 512 80
WIRE -96 256 -96 208
WIRE -16 256 -96 256
WIRE 64 256 -16 256
WIRE 224 256 224 192
WIRE 224 256 144 256
WIRE -16 288 -16 256
WIRE 224 288 224 256
WIRE -96 304 -96 256
WIRE -96 400 -96 368
WIRE 64 400 -96 400
WIRE 224 400 224 352
WIRE 224 400 64 400
WIRE 64 416 64 400
WIRE 368 416 368 288
WIRE 368 416 64 416
WIRE 512 416 512 288
WIRE 512 416 368 416
SYMBOL cap 496 224 R0
SYMATTR InstName C1
SYMATTR Value 0.000001
SYMBOL res 352 192 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL diode 240 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL voltage 48 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 -60 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value SINE(0 311 50)
SYMATTR SpiceLine Rser=0.001
SYMBOL diode 240 352 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL diode -80 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL diode -80 368 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N4148
FLAG -16 288 0
TEXT -64 424 Left 2 !.tran 0.05
TEXT -160 40 Left 2 ;Full Wave Rectifier (Diode Bridge) (with 1microF Capacitor) (Ideal)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3649.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3649.asy)
C1 N006 0 1n
R2 N004 0 200K
R1 N006 0 100K
L1 N003 OUT 6.8 Rser=10m
C5 OUT 0 47 x2 Rser=20m
C2 0 N001 2.2 Rser=10m
XU1 0 N003 IN N002 IN 0 0 NC_01 0 N005 N001 N004 OUT N006 N001 OUT N001 LTC3649 ;pnba PGND)SW)Vin)Boost)Run)SGND)Mode/SYNC)Pgood)PGDFB)IMON)VinREG)Rt)Vout)Iset)Ith)EXTVcc)INTVcc
V1 IN 0 24
R3 N005 0 10K
C4 N002 N003 .1
Rload OUT 0 1.25
C3 N005 0 10n
.tran 1m startup
.lib LTC3649.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 224 -144 224 -160
WIRE -48 -80 -160 -80
WIRE 112 -80 -48 -80
WIRE -160 -64 -160 -80
WIRE 224 -64 224 -80
WIRE 224 -64 -32 -64
WIRE 448 -64 336 -64
WIRE 112 -48 112 -80
WIRE 224 -48 224 -64
WIRE 336 -48 336 -64
WIRE -32 16 -32 -64
WIRE 16 16 -32 16
WIRE 448 16 448 -64
WIRE 448 16 432 16
WIRE 624 16 448 16
WIRE -160 32 -160 16
WIRE -48 112 -48 -80
WIRE 16 112 -48 112
WIRE 464 112 432 112
WIRE 464 128 464 112
WIRE 464 208 464 192
WIRE 464 208 432 208
WIRE 512 208 464 208
WIRE 624 208 624 16
WIRE 624 208 592 208
WIRE 736 208 624 208
WIRE 624 224 624 208
WIRE 736 224 736 208
WIRE -128 304 -144 304
WIRE 16 304 -48 304
WIRE 464 304 432 304
WIRE 624 320 624 288
WIRE 736 320 736 304
WIRE 16 400 0 400
WIRE 464 400 432 400
WIRE 544 400 464 400
WIRE 544 416 544 400
WIRE 464 432 464 400
WIRE 96 480 96 464
WIRE 272 480 272 464
WIRE 272 480 208 480
WIRE 352 480 352 464
WIRE 272 496 272 480
WIRE -32 512 -32 16
WIRE 176 512 176 464
WIRE 176 512 -32 512
WIRE 208 512 208 480
WIRE 464 512 464 496
WIRE 544 512 544 496
WIRE 208 592 208 576
WIRE 272 592 272 576
SYMBOL cap 448 432 R0
SYMATTR InstName C3
SYMATTR Value 10n
SYMBOL ind 496 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMATTR SpiceLine Rser=10m
SYMBOL LTC3649 224 208 R0
SYMATTR InstName U1
SYMBOL res 528 400 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL cap 608 224 R0
WINDOW 123 27 58 Left 2
WINDOW 3 36 34 Left 2
SYMATTR Value2 x2
SYMATTR Value 47
SYMATTR InstName C5
SYMATTR SpiceLine Rser=20m
SYMBOL res 256 480 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 208 -144 R0
SYMATTR InstName C2
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=10m
SYMBOL cap 192 512 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res -32 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL res 720 208 R0
SYMATTR InstName Rload
SYMATTR Value 1.25
SYMBOL VOLTAGE -160 -80 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 448 128 R0
SYMATTR InstName C4
SYMATTR Value .1
FLAG 96 480 0
FLAG 272 592 0
FLAG 208 592 0
FLAG -144 304 0
FLAG 0 400 0
FLAG -160 32 0
FLAG 224 -160 0
FLAG 352 480 0
FLAG 544 512 0
FLAG 464 512 0
FLAG 464 304 0
FLAG 624 320 0
FLAG 736 320 0
FLAG 736 208 OUT
FLAG -160 -80 IN
TEXT 600 400 Left 2 !.tran 1m startup
* Z:\tmp\asc_dec_bjh7r6w2\1067bd1d61c5_1c_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N003 N006 0
D2 N002 N003 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -80 64 -80
WIRE 304 -80 272 -80
WIRE 304 0 304 -80
WIRE 432 0 304 0
WIRE 576 0 432 0
WIRE 208 80 176 80
WIRE 304 80 304 0
WIRE 304 80 272 80
WIRE 432 80 432 0
WIRE 64 144 64 -80
WIRE 176 144 176 80
WIRE 432 192 432 160
WIRE 64 336 64 224
WIRE 176 336 176 224
SYMBOL voltage 176 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL diode 272 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1882.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1882.asy)
XU1 N003 N001 +V -V N002 LT1881 ;pnba In+)In-)V+)V-)OUT
R2 N001 0 1K
V2 -V 0 -10
V1 +V 0 10
R1 N002 N001 1K
V3 N003 0 SINE(0 1 1K)
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -224 128 -224 112
WIRE -96 128 -96 112
WIRE 192 208 192 192
WIRE -224 224 -224 208
WIRE -96 224 -96 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL opamps\\LT1882 192 240 R0
SYMATTR InstName U1
SYMBOL voltage -224 112 R0
SYMATTR InstName V2
SYMATTR Value -10
SYMBOL voltage -96 112 R0
SYMATTR InstName V1
SYMATTR Value 10
FLAG -96 224 0
FLAG 192 192 +V
FLAG -96 112 +V
FLAG 192 288 -V
FLAG -224 224 0
FLAG -224 112 -V
FLAG 16 96 0
FLAG 0 368 0
TEXT 256 360 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4601HV.asc
* Generated by LTspice 26.0.1 for Windows.
C1 OUT N004 100p
R1 N004 0 40.2K
R2 N008 0 392K
C2 OUT 0 100
R3 IN N002 100K
R4 IN N003 100K
C3 N011 0 .001
V1 IN 0 6
Rload OUT 0 .25
XU1 IN 0 OUT 0 N006 N006 OUT 0 N002 N004 N007 N012 N010 N009 N008 N005 N003 N011 N001 N007 LTM4601 ;pnba Vin)PGND)Vout)Vosns-)Vout_LCL)DiffVout)Vosns+)SGND)Pgood)FB)DRVcc)MARG1)MARG0)Fset)MPGM)Comp)Run)Track/SS)PLLIN)INTVcc
.tran 750u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4601HV.asy)
.lib LTM4601.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1032 680
WIRE -160 -16 -256 -16
WIRE 128 -16 -160 -16
WIRE -256 0 -256 -16
WIRE 128 0 128 -16
WIRE 272 0 272 -16
WIRE -160 48 -160 -16
WIRE -144 48 -160 48
WIRE 16 48 -64 48
WIRE 432 48 400 48
WIRE 576 48 432 48
WIRE 656 48 576 48
WIRE 576 64 576 48
WIRE -256 96 -256 80
WIRE -160 112 -160 48
WIRE -80 112 -160 112
WIRE 16 112 0 112
WIRE 432 112 400 112
WIRE 480 112 432 112
WIRE 480 128 480 112
WIRE 576 144 576 128
WIRE 16 176 0 176
WIRE 432 176 400 176
WIRE 480 224 480 208
WIRE 16 240 0 240
WIRE 432 240 432 176
WIRE 432 240 400 240
WIRE 656 272 656 48
WIRE 656 272 576 272
WIRE 720 272 656 272
WIRE 720 288 720 272
WIRE 0 304 0 240
WIRE 16 304 0 304
WIRE 576 304 576 272
WIRE 576 304 400 304
WIRE -80 368 -96 368
WIRE 16 368 0 368
WIRE 576 368 400 368
WIRE 576 384 576 368
WIRE 720 384 720 368
WIRE 720 384 576 384
WIRE 720 400 720 384
WIRE 16 432 0 432
WIRE 416 432 400 432
WIRE -64 496 -80 496
WIRE 16 496 0 496
WIRE 416 496 400 496
WIRE 128 576 128 560
WIRE 288 576 288 560
FLAG 128 576 0
FLAG 288 576 0
FLAG 480 224 0
FLAG -96 368 0
FLAG 576 144 0
FLAG 720 400 0
FLAG -256 96 0
FLAG -80 496 0
FLAG 720 272 OUT
FLAG -256 -16 IN
SYMBOL cap 416 48 R0
WINDOW 0 34 18 Left 2
WINDOW 3 35 47 Left 2
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL res 464 112 R0
SYMATTR InstName R1
SYMATTR Value 40.2K
SYMBOL res 16 384 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 392K
SYMBOL cap 560 64 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMBOL res -160 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res -96 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL cap 0 480 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL voltage -256 -16 R0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL res 704 272 R0
SYMATTR InstName Rload
SYMATTR Value .25
SYMBOL PowerProducts\\LTM4601HV 208 256 R0
SYMATTR InstName U1
TEXT 472 496 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\7db40aa0e673_E3d.asc
* Generated by LTspice 26.0.1 for Windows.
;ac dec 10 1 10Meg
M1 N004 N005 0 N006 NMOS l=0.18u w=18u
M2 Vout N002 N004 N003 NMOS l=0.36u w=18u
VIN N005 0 0.6 AC 1
VB N002 0 1.1
VDD N001 0 3.3
RD N001 Vout 8000
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VIN 0 3.3 0.001
.model NMOS NMOS (LEVEL=1 KP=150u VTO=0.5 LAMBDA=0 GAMMA=0 PHI=0.6)
.meas DC Av_0p6 FIND deriv(V(vout))/deriv(V(vin)) WHEN V(vout)=0.6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 892 680
WIRE 96 -256 -64 -256
WIRE 96 -128 96 -176
WIRE 96 -96 96 -128
WIRE 48 -16 -48 -16
WIRE 96 -16 96 -48
WIRE 96 32 96 0
WIRE 48 112 -48 112
WIRE 96 112 96 80
IOPIN 96 -128 Out
SYMBOL nmos4 48 32 R0
SYMATTR InstName M1
SYMATTR Value2 l=0.18u w=18u
SYMBOL voltage -48 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value 1.1
SYMBOL voltage -48 96 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName VIN
SYMATTR Value 0.6
SYMBOL voltage -64 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 3.3
SYMBOL res 80 -272 R0
SYMATTR InstName RD
SYMATTR Value 8000
SYMBOL nmos4 48 -96 R0
SYMATTR InstName M2
SYMATTR Value2 l=0.36u w=18u
FLAG 96 128 0
FLAG -48 64 0
FLAG -48 192 0
FLAG -64 -176 0
FLAG 96 -128 Vout
TEXT -88 -384 Left 2 !.dc VIN 0 3.3 0.001
TEXT -88 -360 Left 2 !;ac dec 10 1 10Meg
TEXT -88 -336 Left 2 !.model NMOS NMOS (LEVEL=1 KP=150u VTO=0.5 LAMBDA=0 GAMMA=0 PHI=0.6)
TEXT -88 -312 Left 2 !.meas DC Av_0p6 FIND deriv(V(vout))/deriv(V(vin)) WHEN V(vout)=0.6
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6703-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT6703-3.asy)
R2 N002 0 154K
R3 N001 N003 1Meg
V1 N001 0 PWL(0 0 1 3.3)
R1 N001 N002 1Meg
XU1 N003 0 N002 N001 LT6703-3 ;pnba OUT)GND)+IN)Vs
.tran 1
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 16 -208 16
WIRE 208 16 16 16
WIRE 336 16 208 16
WIRE -208 32 -208 16
WIRE 16 32 16 16
WIRE 336 32 336 16
WIRE 208 80 208 16
WIRE -208 128 -208 112
WIRE 16 128 16 112
WIRE 128 128 16 128
WIRE 16 144 16 128
WIRE 336 144 336 112
WIRE 336 144 288 144
WIRE 16 240 16 224
WIRE 208 288 208 256
SYMBOL res 320 16 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL res 0 128 R0
SYMATTR InstName R2
SYMATTR Value 154K
SYMBOL voltage -208 16 R0
WINDOW 3 26 96 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PWL(0 0 1 3.3)
SYMATTR InstName V1
SYMBOL LT6703-3 208 144 R0
SYMATTR InstName U1
SYMBOL res 0 16 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
FLAG -208 128 0
FLAG 208 288 0
FLAG 16 240 0
TEXT 360 208 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\28c6af5b4b1f_RC-square-wave-response.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 PULSE(0 80 0 0.001u 0.001u 10ms 20ms 20)
R1 N002 N001 20
R2 0 N002 60
C1 N002 0 0.4m
.tran 400ms
* Square wave. Set Vinitial to -200 for on and off simmetry
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 680
WIRE 160 80 80 80
WIRE 304 80 240 80
WIRE 352 80 304 80
WIRE 448 80 432 80
WIRE 80 112 80 80
WIRE 304 112 304 80
WIRE 80 208 80 192
WIRE 304 208 304 176
WIRE 304 208 80 208
WIRE 448 208 448 80
WIRE 448 208 304 208
WIRE 80 224 80 208
FLAG 80 224 0
SYMBOL voltage 80 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 141 166 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 80 0 0.001u 0.001u 10ms 20ms 20)
SYMBOL res 256 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20
SYMBOL res 448 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 60
SYMBOL cap 288 112 R0
SYMATTR InstName C1
SYMATTR Value 0.4m
TEXT 48 248 Left 2 !.tran 400ms
TEXT 120 8 Left 2 ;Square wave. Set Vinitial to -200 for on and off simmetry