Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1a0c86f65149_Two_Input_H-Bridge.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N008 N012 0 0 BC547B
Q2 N009 N013 0 0 BC547B
Q3 N008 N003 N001 0 BC557C
Q4 N009 N004 N001 0 BC557C
R1 N009 N008 1
V1 N001 0 5
Q5 N003 N006 N010 0 BC547B
Q6 N004 N007 N011 0 BC547B
R2 N002 N006 1
R3 N005 N007 1
V2 N002 0 PULSE(0 3.3 0 0 0 1)
V3 N005 0 PULSE(0 3.3 1 0 0 1)
R4 N010 N013 100
R5 N011 N012 100
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 10
* NOTE :- Don't need those 1k resistors
* Dual Input H-Bridge
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1548 680
WIRE 288 -464 -144 -464
WIRE 784 -464 288 -464
WIRE -16 -352 -80 -352
WIRE 288 -352 288 -464
WIRE 784 -352 784 -464
WIRE -80 -304 -80 -352
WIRE 400 -304 352 -304
WIRE 992 -304 848 -304
WIRE 1280 -208 848 -208
WIRE -16 -192 -16 -352
WIRE 848 -176 848 -208
WIRE -80 -160 -80 -224
WIRE 1280 -144 1280 -208
WIRE -144 -112 -144 -464
WIRE 400 -112 400 -304
WIRE 400 -112 112 -112
WIRE 992 -112 992 -304
WIRE 992 -112 976 -112
WIRE -16 -64 -16 -112
WIRE 48 -64 -16 -64
WIRE 848 -64 848 -96
WIRE 912 -64 848 -64
WIRE 288 -32 288 -256
WIRE 512 -32 288 -32
WIRE 784 -32 784 -256
WIRE 784 -32 592 -32
WIRE 1280 -32 1280 -64
WIRE 112 48 112 -16
WIRE 560 48 112 48
WIRE 976 112 976 -16
WIRE 976 112 80 112
WIRE 80 144 80 112
WIRE 560 144 560 48
WIRE 288 208 288 -32
WIRE 784 208 784 -32
WIRE 80 256 80 224
WIRE 224 256 80 256
WIRE 560 256 560 224
WIRE 720 256 560 256
WIRE -144 432 -144 -32
WIRE 80 432 -144 432
WIRE 288 432 288 304
WIRE 288 432 80 432
WIRE 784 432 784 304
WIRE 784 432 288 432
WIRE 80 480 80 432
FLAG 80 480 0
FLAG -80 -160 0
FLAG 1280 -32 0
SYMBOL npn 224 208 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL npn 720 208 R0
SYMATTR InstName Q2
SYMATTR Value BC547B
SYMBOL pnp 352 -256 R180
SYMATTR InstName Q3
SYMATTR Value BC557C
SYMBOL pnp 848 -256 R180
SYMATTR InstName Q4
SYMATTR Value BC557C
SYMBOL res 608 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL voltage -144 -128 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL npn 48 -112 R0
SYMATTR InstName Q5
SYMATTR Value BC547B
SYMBOL npn 912 -112 R0
SYMATTR InstName Q6
SYMATTR Value BC547B
SYMBOL res -32 -208 R0
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL res 832 -192 R0
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL voltage -80 -320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 0 0 0 1)
SYMBOL voltage 1280 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 3.3 1 0 0 1)
SYMBOL res 544 128 R0
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL res 64 128 R0
SYMATTR InstName R5
SYMATTR Value 100
TEXT -176 504 Left 2 !.tran 10
TEXT -816 200 Left 2 ;NOTE :- Don't need those 1k resistors
TEXT 192 -536 Left 3 ;Dual Input H-Bridge
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4120-1A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4120-1A.asy)
R1 GATE N004 5
XU1 N001 N003 0 0 N004 N002 ADuM4120xx Glitch=0 Vrun2=4.3 ;pnba Vdd1)Vin)GND1)GND2)Vout)Vdd2
V1 N001 0 5
V3 N003 0 PULSE(0 5 0 2n 2n 998n 2u)
V2 N002 0 15
C1 GATE 0 2n
.tran 10u
.lib ADuM4120xx.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 16 0 16
WIRE 512 16 320 16
WIRE 0 32 0 16
WIRE 512 32 512 16
WIRE 160 48 160 16
WIRE 320 48 320 16
WIRE 0 128 0 112
WIRE 512 128 512 112
WIRE 112 160 -64 160
WIRE 400 160 368 160
WIRE 512 160 480 160
WIRE 544 160 512 160
WIRE 512 176 512 160
WIRE 160 288 160 272
WIRE 320 288 320 272
SYMBOL ADuM4120-1A 240 160 R0
SYMATTR InstName U1
SYMBOL cap 496 176 R0
WINDOW 0 35 16 Left 2
WINDOW 3 36 51 Left 2
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL voltage 0 16 R0
WINDOW 0 25 25 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 512 16 R0
WINDOW 0 29 30 Left 2
WINDOW 3 31 84 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL res 496 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL voltage -48 160 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 -74 56 VBottom 2
WINDOW 39 -53 56 VBottom 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 2n 2n 998n 2u)
FLAG 160 288 0
FLAG 320 288 0
FLAG 512 240 0
FLAG 544 160 GATE
FLAG 512 128 0
FLAG 0 128 0
FLAG -144 160 0
TEXT 400 280 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7185.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7185.asy)
R1 N002 N003 100k
RLOAD OUT 0 5
C3 N002 0 1
C1 N002 N003 10n
XU1 OUT OUT N002 N003 N001 0 N004 IN ADP7185 ;pnba Vout)Sense)VA)VAFB)EN)GND)Vreg)Vin
R2 N003 0 24.9k
V1 IN 0 -3.8
V2 N001 0 1.5
C2 OUT 0 4.7
C4 N004 0 1
.tran 20m startup
.lib ADP7185.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE 16 -48 0 -48
WIRE 112 -48 16 -48
WIRE 384 -48 368 -48
WIRE 416 -48 384 -48
WIRE 512 -48 416 -48
WIRE 528 -48 512 -48
WIRE 0 -32 0 -48
WIRE 416 -32 416 -48
WIRE 384 16 384 -48
WIRE 384 16 368 16
WIRE 416 48 416 32
WIRE 528 48 528 32
WIRE 0 64 0 48
WIRE 112 80 48 80
WIRE 416 80 368 80
WIRE 512 80 416 80
WIRE 576 80 512 80
WIRE 416 96 416 80
WIRE 512 96 512 80
WIRE 576 96 576 80
WIRE 48 112 48 80
WIRE 384 144 368 144
WIRE 384 192 384 144
WIRE 416 192 416 176
WIRE 416 192 384 192
WIRE 512 192 512 160
WIRE 512 192 416 192
WIRE 576 192 576 160
WIRE 48 208 48 192
WIRE 416 208 416 192
WIRE 176 224 176 208
WIRE 304 224 304 208
WIRE 176 304 176 288
WIRE 416 304 416 288
SYMBOL cap 400 -32 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL ADP7185 240 48 R0
SYMATTR InstName U1
SYMBOL cap 496 96 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 512 -64 R0
SYMATTR InstName RLOAD
SYMATTR Value 5
SYMBOL voltage 48 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.5
SYMBOL cap 160 224 R0
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL res 400 80 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL cap 560 96 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL voltage 0 -48 R0
SYMATTR InstName V1
SYMATTR Value -3.8
SYMBOL res 400 192 R0
SYMATTR InstName R2
SYMATTR Value 24.9k
FLAG 0 64 0
FLAG 416 48 0
FLAG 48 208 0
FLAG 304 224 0
FLAG 528 48 0
FLAG 16 -48 IN
FLAG 512 -48 OUT
FLAG 576 192 0
FLAG 176 304 0
FLAG 416 304 0
TEXT 240 352 Center 2 !.tran 20m startup
* Z:\tmp\asc_dec_bjh7r6w2\0baa0343fce2_RXinputFilterSim_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N004 N003 50
C1 N002 N001 1pF
R2 N005 0 50
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1020 680
WIRE -112 192 -160 192
WIRE 112 192 -32 192
WIRE 192 192 112 192
WIRE 320 192 256 192
WIRE 384 192 320 192
WIRE 480 192 448 192
WIRE 640 192 560 192
WIRE 112 208 112 192
WIRE 640 224 640 192
WIRE 640 224 624 224
WIRE -160 288 -160 192
WIRE -112 288 -160 288
WIRE 112 288 -32 288
WIRE 240 288 112 288
WIRE 320 288 320 192
WIRE 112 320 112 288
WIRE -160 384 -160 288
WIRE 112 384 -160 384
WIRE 624 384 624 304
WIRE 624 384 112 384
WIRE 112 416 112 384
SYMBOL res 576 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 50
SYMBOL cap 256 176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1pF
SYMBOL res -16 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50
FLAG 112 416 0
* Z:\home\khalils\Downloads\files\data\raw_asc\00b063172045_118A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT118A.asy)
R2 N001 0 5K
V2 -V 0 -15
V1 +V 0 15
V3 N003 0 SINE(0 1 1Meg)
R1 N002 N001 5K
XU1 N003 N001 +V -V N002 LT118A ;pnba In+)In-)V+)V-)OUT
.tran 3u
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -256 160 -256 144
WIRE -128 160 -128 144
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE -256 256 -256 240
WIRE -128 256 -128 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL voltage -256 144 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL voltage -128 144 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT118A 192 240 R0
SYMATTR InstName U1
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1Meg)
FLAG -128 256 0
FLAG 192 192 +V
FLAG -128 144 +V
FLAG 192 288 -V
FLAG -256 256 0
FLAG -256 144 -V
FLAG 16 96 0
FLAG 0 368 0
TEXT 240 392 Left 2 !.tran 3u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC7103.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC7103.asy)
V1 IN 0 50
C2 N001 N002 0.1
C6 N003 0 1
L1 N001 OUT 18 Rser=5m
XU1 N002 MP_01 IN MP_02 MP_03 0 0 NC_04 N003 OUT 0 0 NC_05 NC_06 NC_07 NC_08 NC_09 NC_10 0 OUT N003 MP_11 MP_12 N001 MP_13 MP_14 MP_15 MP_16 MP_17 IN MP_18 MP_19 MP_20 MP_21 0 LTC7103 ;pnba Boost))Run)))SGND)OVLO)Rind)Ith)Vfb)Freq)PLLin/Mode)CLKOut)PGood)SS)ICTRL)Imon)VPRG1)VPRG2)EXTVcc)INTVcc)))SW))))))Vin)))))PGND
C1 OUT 0 100 Rser=15m
Rload OUT 0 4.99
.tran 1.8m startup
.lib LTC7103.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 6140 3124
WIRE 608 -192 496 -192
WIRE 624 -192 608 -192
WIRE 1136 -192 1008 -192
WIRE 1168 -192 1136 -192
WIRE 1280 -192 1248 -192
WIRE 1376 -192 1280 -192
WIRE 496 -176 496 -192
WIRE 1376 -176 1376 -192
WIRE 1040 -144 1008 -144
WIRE 1136 -144 1136 -192
WIRE 1136 -144 1104 -144
WIRE 608 -112 608 -192
WIRE 624 -112 608 -112
WIRE 1040 -112 1008 -112
WIRE 1280 -112 1280 -192
WIRE 1280 -112 1040 -112
WIRE 1280 -96 1280 -112
WIRE 496 -80 496 -96
WIRE 1376 -80 1376 -96
WIRE 624 -32 608 -32
WIRE 1040 -32 1040 -112
WIRE 1040 -32 1008 -32
WIRE 1280 16 1280 -32
WIRE 624 48 608 48
WIRE 1072 48 1008 48
WIRE 1072 128 1072 48
WIRE 1072 128 1008 128
WIRE 1072 144 1072 128
WIRE 1072 224 1072 208
WIRE 624 288 608 288
WIRE 1024 288 1008 288
WIRE 688 400 688 384
WIRE 816 400 816 384
SYMBOL ind 1152 -176 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
WINDOW 39 -47 55 VTop 2
SYMATTR InstName L1
SYMATTR Value 18
SYMATTR SpiceLine Rser=5m
SYMBOL cap 1264 -96 R0
WINDOW 39 24 84 Left 2
SYMATTR SpiceLine Rser=15m
SYMATTR Value 100
SYMATTR InstName C1
SYMBOL LTC7103 816 48 R0
SYMATTR InstName U1
SYMBOL cap 1104 -160 R90
WINDOW 0 16 1 VBottom 2
WINDOW 3 16 -7 VTop 2
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL res 1360 -192 R0
SYMATTR InstName Rload
SYMATTR Value 4.99
SYMBOL cap 1056 144 R0
SYMATTR Value 1
SYMATTR InstName C6
SYMBOL voltage 496 -192 R0
SYMATTR InstName V1
SYMATTR Value 50
FLAG 496 -80 0
FLAG 496 -192 IN
FLAG 1376 -192 OUT
FLAG 608 -32 0
FLAG 608 288 0
FLAG 1376 -80 0
FLAG 1280 16 0
FLAG 688 400 0
FLAG 816 400 0
FLAG 1024 288 0
FLAG 1072 224 0
FLAG 608 48 0
TEXT 1152 336 Left 2 !.tran 1.8m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\37203ea3c5e2_6230.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 -V 0 -5
R1 N002 N001 5K
R2 N001 0 1K
V3 N003 0 SINE(0 .1 1K)
XU1 N003 N001 N002 +V -V NC_01 LT6230 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6230.asy)
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -112 48 -128 48
WIRE 0 48 -32 48
WIRE 96 48 0 48
WIRE 208 48 176 48
WIRE 64 112 64 96
WIRE -416 160 -416 144
WIRE -288 160 -288 144
WIRE 0 160 0 48
WIRE 32 160 0 160
WIRE 208 192 208 48
WIRE 208 192 176 192
WIRE 32 224 -160 224
WIRE -160 240 -160 224
WIRE -416 256 -416 240
WIRE -288 256 -288 240
WIRE 64 288 64 272
WIRE -160 336 -160 320
FLAG -288 256 0
FLAG 64 96 +V
FLAG -288 144 +V
FLAG 64 288 -V
FLAG -416 256 0
FLAG -416 144 -V
FLAG -128 48 0
FLAG -160 336 0
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -416 144 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 192 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL res -16 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -160 224 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 .1 1K)
SYMBOL opamps\\LT6230 64 192 R0
SYMATTR InstName U1
TEXT 152 344 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4425.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4425.asy)
C2 VOUT N001 1
C1 VIN 0 2.2
R4 VIN N004 475k
R1 VIN N002 1.5Meg
R3 N005 0 2k
R2 N003 N002 1.21Meg
XU1 VOUT N005 0 VIN VIN N003 N004 N002 N001 VIN 0 LTC4425 ;pnba VOUT)PROG)SEL)FB)EN)PFI_RET)_PFO)PFI)VMID)VIN)GND
V1 VIN 0 4.2
C3 N001 0 1
.tran 40 startup
.lib LTC4425.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -192 -176 -304 -176
WIRE -80 -176 -192 -176
WIRE 16 -176 -80 -176
WIRE 48 -176 16 -176
WIRE 416 -176 368 -176
WIRE 448 -176 416 -176
WIRE -192 -160 -192 -176
WIRE -80 -160 -80 -176
WIRE 448 -160 448 -176
WIRE -304 -144 -304 -176
WIRE -192 -80 -192 -96
WIRE 448 -80 448 -96
WIRE 448 -80 368 -80
WIRE -80 -64 -80 -80
WIRE 48 -64 -80 -64
WIRE 448 -64 448 -80
WIRE -304 -48 -304 -64
WIRE -80 -48 -80 -64
WIRE 448 16 448 0
WIRE -80 48 -80 32
WIRE 48 48 -80 48
WIRE 400 80 368 80
WIRE 448 80 400 80
WIRE 448 96 448 80
WIRE 448 192 448 176
WIRE 448 192 368 192
WIRE 48 208 16 208
WIRE 448 272 368 272
WIRE 16 288 0 288
WIRE 48 288 16 288
WIRE 448 288 448 272
WIRE 448 384 448 368
WIRE 208 400 208 368
SYMBOL res -96 48 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 1.21Meg
SYMBOL voltage -304 -160 R0
WINDOW 3 21 99 Left 2
WINDOW 39 -3 193 Left 2
SYMATTR Value 4.2
SYMATTR InstName V1
SYMBOL LTC4425 208 80 R0
SYMATTR InstName U1
SYMBOL res 432 80 R0
SYMATTR InstName R4
SYMATTR Value 475k
SYMBOL res 432 272 R0
SYMATTR InstName R3
SYMATTR Value 2k
SYMBOL cap 432 -160 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap -208 -160 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL cap 432 -64 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res -96 -176 R0
SYMATTR InstName R1
SYMATTR Value 1.5Meg
FLAG 208 400 0
FLAG 16 208 0
FLAG -192 -80 0
FLAG -304 -48 0
FLAG 16 -176 VIN
FLAG 416 -176 VOUT
FLAG 448 384 0
FLAG 16 288 VIN
FLAG 448 16 0
FLAG 400 80 VIN
TEXT -240 384 Left 2 !.tran 40 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ISO7637-2_example.asc
* Generated by LTspice 26.0.1 for Windows.
XU2 N002 0 Pulse1_24V ;pnba +)-
XU1 N001 0 Pulse1_12V ;pnba +)-
.tran 0 10 0 1m
* For documentation see:\n LTspice Models of ISO 7637-2 & ISO 16750-2 Transients\n http://www.linear.com/solutions/7719
* ISO 7637-2 Transients
* Library below included based on ModelFile attribute of instance XU2, XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ISO7637-2.asy)
.lib ISO7637-2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1544 680
WIRE 80 -64 80 -96
WIRE 368 -64 368 -96
WIRE 80 48 80 16
WIRE 368 48 368 16
FLAG 80 48 0
FLAG 368 48 0
SYMBOL ISO7637-2 368 -64 R0
SYMATTR InstName U2
SYMATTR SpiceModel Pulse1_24V
SYMBOL ISO7637-2 80 -64 R0
SYMATTR InstName U1
TEXT 144 144 Left 2 !.tran 0 10 0 1m
TEXT 24 -216 Left 2 ;For documentation see:\n  LTspice Models of ISO 7637-2 & ISO 16750-2 Transients\n  http://www.linear.com/solutions/7719
TEXT 24 -256 Left 4 ;ISO 7637-2 Transients
* Z:\home\khalils\Downloads\files\data\raw_asc\384146d80754_Bpuntasx10.asc
* Generated by LTspice 26.0.1 for Windows.
R3 PuntaIn 0 10Meg
C2 PuntaIn 0 20p
V3 0 V- 12
XU1 0 N001 V+ V- PuntaOut LM741 ;pnba In+)In-)V+)V-)OUT
V2 V+ 0 12
C3 PuntaOut 0 20p
C1 PuntaOut N001 100n
R2 PuntaIn N002 50
V1 N002 0 PULSE(-0.2 0.2 0 10n 10n 0.5m 1m)
R1 N001 PuntaIn 1K
R5 PuntaOut 0 10Meg
.lib LM741.sub
.tran 0 6m 4m 1u
.meas Vmedio AVG V(PuntaOut) from 0ms to 1ms
.meas Vmin MIN V(PuntaOut) from 0 to 1m
.meas Vpp PP V(PuntaOut) from 0ms to 1ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1128 680
WIRE 544 32 528 32
WIRE 560 32 544 32
WIRE 528 64 528 32
WIRE 160 80 80 80
WIRE 320 80 224 80
WIRE 768 80 768 32
WIRE 768 112 768 80
WIRE 768 112 720 112
WIRE 816 112 768 112
WIRE 720 144 720 112
WIRE 1008 144 1008 112
WIRE 1008 144 944 144
WIRE 1056 144 1008 144
WIRE 528 160 528 144
WIRE 528 160 464 160
WIRE 816 160 816 112
WIRE 464 176 464 160
WIRE 128 192 128 144
WIRE 320 192 320 80
WIRE -176 208 -224 208
WIRE -80 208 -96 208
WIRE -64 208 -80 208
WIRE 80 208 80 80
WIRE 80 208 16 208
WIRE 96 208 80 208
WIRE 528 208 528 160
WIRE 320 224 320 192
WIRE 320 224 160 224
WIRE -224 240 -224 208
WIRE 96 240 0 240
WIRE 720 272 720 224
WIRE 768 272 720 272
WIRE 816 272 816 224
WIRE 816 272 768 272
WIRE 944 272 944 224
WIRE 1008 272 944 272
WIRE 1056 272 1056 208
WIRE 1056 272 1008 272
WIRE 128 288 128 256
WIRE 768 304 768 272
WIRE 1008 304 1008 272
WIRE 528 336 528 288
WIRE 544 336 528 336
WIRE 560 336 544 336
WIRE -224 384 -224 320
WIRE 0 384 0 240
SYMBOL res -80 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL cap 1040 144 R0
SYMATTR InstName C3
SYMATTR Value 20p
SYMBOL voltage -224 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(-0.2 0.2 0 10n 10n 0.5m 1m)
SYMBOL cap 224 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL voltage 528 48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL voltage 528 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 12
SYMBOL Opamps\\opamp2 128 160 R0
SYMATTR InstName U1
SYMATTR Value LM741
SYMBOL res 32 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 704 128 R0
SYMATTR InstName R3
SYMATTR Value 10MEG
SYMBOL cap 800 160 R0
SYMATTR InstName C2
SYMATTR Value 20p
SYMBOL res 928 128 R0
SYMATTR InstName R5
SYMATTR Value 10MEG
FLAG 0 384 0
FLAG -224 384 0
FLAG 464 176 0
FLAG 544 32 V+
FLAG 544 336 V-
FLAG 128 288 V-
FLAG 128 144 V+
FLAG 768 304 0
FLAG 768 80 PuntaIn
FLAG 1008 304 0
FLAG 1008 112 PuntaOut
FLAG -80 208 PuntaIn
FLAG 320 192 PuntaOut
TEXT -264 -24 Left 2 !.lib LM741.sub
TEXT -264 432 Left 2 !.tran 0 6m 4m 1u
TEXT -264 8 Left 2 !.meas Vmedio AVG V(PuntaOut) from 0ms to 1ms
TEXT -264 -64 Left 2 !.meas Vmin MIN V(PuntaOut) from 0 to 1m
TEXT -264 -96 Left 2 !.meas Vpp PP V(PuntaOut) from 0ms to 1ms
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP172-1.7.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP172-1.7.asy)
V1 IN 0 3.6
RLOAD OUT 0 5.69
XU1 OUT IN IN 0 ADP172-1.7 ;pnba Vout)Vin)En)GND
C1 OUT 0 1
.tran 2m startup
.lib ADP172-1.7.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 80 -48 80
WIRE 48 80 -32 80
WIRE 64 80 48 80
WIRE 304 80 256 80
WIRE 336 80 304 80
WIRE 384 80 336 80
WIRE -48 96 -48 80
WIRE 304 96 304 80
WIRE 304 176 304 160
WIRE 384 176 384 160
WIRE -48 192 -48 176
WIRE 48 192 48 80
WIRE 64 192 48 192
WIRE 272 192 256 192
SYMBOL res 368 64 R0
SYMATTR InstName RLOAD
SYMATTR Value 5.69
SYMBOL voltage -48 80 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL ADP172-1.7 160 192 R0
SYMATTR InstName U1
SYMBOL cap 288 96 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG -48 192 0
FLAG 304 176 0
FLAG 272 192 0
FLAG 384 176 0
FLAG -32 80 IN
FLAG 336 80 OUT
TEXT 160 256 Center 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1818.asc
* Generated by LTspice 26.0.1 for Windows.
* 80MHz, 20dB Gain Block
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1818.asy)
XU1 IN N002 N003 +V -V LT1818 ;pnba IN+)IN-)OUT)VCC)VEE
R3 OUT N001 432
V1 +V 0 5
XU2 N003 N001 OUT +V -V LT1818 ;pnba IN+)IN-)OUT)VCC)VEE
V2 -V 0 -5
V3 IN 0 AC 1
R4 N001 0 200
R1 N003 N002 432
R2 N002 0 200
.ac oct 10 100K 500Meg
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 240 32 224 32
WIRE 336 32 320 32
WIRE 352 32 336 32
WIRE 464 32 432 32
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -160 160 -160 144
WIRE -64 160 -64 144
WIRE 400 192 400 176
WIRE 192 208 192 192
WIRE 336 208 336 32
WIRE 368 208 336 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 464 224 464 32
WIRE 464 224 432 224
WIRE 496 224 464 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 368 240 256 240
WIRE -160 256 -160 240
WIRE -64 256 -64 240
WIRE 160 256 32 256
WIRE 32 272 32 256
WIRE 400 272 400 256
WIRE 192 288 192 272
WIRE 32 368 32 352
SYMBOL opamps\\LT1818 400 224 R0
SYMATTR InstName U2
SYMBOL voltage -160 144 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 448 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 432
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL opamps\\LT1818 192 240 R0
SYMATTR InstName U1
SYMBOL voltage 32 256 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL res 336 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 200
SYMBOL voltage -64 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 432
FLAG -64 256 0
FLAG 192 192 +V
FLAG -64 144 +V
FLAG 192 288 -V
FLAG -160 256 0
FLAG -160 144 -V
FLAG 16 96 0
FLAG 32 368 0
FLAG 400 176 +V
FLAG 400 272 -V
FLAG 224 32 0
FLAG 496 224 OUT
FLAG 32 256 IN
TEXT 232 344 Left 2 !.ac oct 10 100K 500Meg
TEXT 264 -32 Bottom 2 ;80MHz, 20dB Gain Block
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4440.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4440.asy)
V2 N002 0 PULSE(0 8 0 1n 1n 1u 2u)
XU1 N001 0 N002 0 N003 N001 LTC4440 ;pnba VCC)GND)INP)TS)TG)BOOST
V1 N001 0 8
.tran 50u
.lib LTC4440.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2336 1256
WIRE 1424 -144 1104 -144
WIRE 1008 -80 992 -80
WIRE 1104 -80 1104 -144
WIRE 1104 -80 1088 -80
WIRE 1136 -80 1104 -80
WIRE 1424 -80 1424 -144
WIRE 1424 -80 1392 -80
WIRE 1136 0 736 0
WIRE 1424 0 1392 0
WIRE 736 16 736 0
WIRE 1136 80 1104 80
WIRE 1424 80 1392 80
WIRE 736 112 736 96
SYMBOL voltage 736 0 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 8 0 1n 1n 1u 2u)
SYMBOL voltage 1104 -80 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value 8
SYMBOL PowerProducts\\LTC4440 1264 0 R0
SYMATTR InstName U1
FLAG 1104 80 0
FLAG 992 -80 0
FLAG 1424 80 0
FLAG 736 112 0
TEXT 1304 176 Left 2 !.tran 50u
* Z:\tmp\asc_dec_bjh7r6w2\189063a42137_InaE_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V4 N002 N004 PWL file=C:\users\andrei\Documents\Licenta\AchizitionareSemnal\ekg_signal2.txt
V5 N003 0 1.65
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1328 680
WIRE 416 224 416 192
WIRE 448 224 448 176
WIRE 480 224 480 176
WIRE 384 288 80 288
WIRE 80 320 80 288
WIRE 384 352 304 352
WIRE 304 384 304 352
WIRE 80 416 80 400
WIRE 416 432 416 416
WIRE 464 448 464 416
WIRE 304 480 304 464
SYMBOL voltage 304 368 R0
WINDOW 3 -431 237 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PWL file=C:\users\andrei\Documents\Licenta\AchizitionareSemnal\ekg_signal2.txt
SYMBOL voltage 80 400 R0
SYMATTR InstName V5
SYMATTR Value 1.65
FLAG 416 432 0
FLAG 480 176 0
FLAG 448 176 0
FLAG 416 192 Vcc
FLAG 464 448 Vcc
FLAG 80 496 0
FLAG 304 560 0