Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT4423.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT4423.asy)
V1 IN 0 12
C1 IN 0 0.1
XU1 IN IN OUT NC_01 0 LT4423 ;pnba SHDN#)IN)OUT)STATUS)GND
C2 OUT 0 47
R1 OUT 0 1
.tran 1m startup
.lib LT4423.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -192 96 -208 96
WIRE -96 96 -192 96
WIRE -32 96 -96 96
WIRE 16 96 -32 96
WIRE 608 96 480 96
WIRE 688 96 608 96
WIRE 720 96 688 96
WIRE -208 144 -208 96
WIRE 608 144 608 96
WIRE 720 144 720 96
WIRE -96 160 -96 96
WIRE -32 176 -32 96
WIRE 16 176 -32 176
WIRE 608 256 608 208
WIRE 720 256 720 224
WIRE -208 272 -208 224
WIRE -96 272 -96 224
WIRE 240 336 240 272
SYMBOL cap -112 160 R0
SYMATTR InstName C1
SYMATTR Value 0.1
SYMBOL res 704 128 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL voltage -208 128 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 592 144 R0
SYMATTR InstName C2
SYMATTR Value 47
SYMBOL LT4423 240 160 R0
SYMATTR InstName U1
FLAG 240 336 0
FLAG -96 272 0
FLAG 608 256 0
FLAG -208 272 0
FLAG -192 96 IN
FLAG 688 96 OUT
FLAG 720 256 0
TEXT -216 360 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\7db40aa0e673_E3d.asc
* Generated by LTspice 26.0.1 for Windows.
;ac dec 10 1 10Meg
VB N002 0 1.1
VIN N005 0 0.6 AC 1
RD N001 Vout 8000
M1 N004 N005 0 N006 NMOS l=0.18u w=18u
M2 Vout N002 N004 N003 NMOS l=0.36u w=18u
VDD N001 0 3.3
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VIN 0 3.3 0.001
.model NMOS NMOS (LEVEL=1 KP=150u VTO=0.5 LAMBDA=0 GAMMA=0 PHI=0.6)
.meas DC Av_0p6 FIND deriv(V(vout))/deriv(V(vin)) WHEN V(vout)=0.6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 892 680
WIRE 96 -256 -64 -256
WIRE 96 -128 96 -176
WIRE 96 -96 96 -128
WIRE 48 -16 -48 -16
WIRE 96 -16 96 -48
WIRE 96 32 96 0
WIRE 48 112 -48 112
WIRE 96 112 96 80
IOPIN 96 -128 Out
SYMBOL nmos4 48 32 R0
SYMATTR InstName M1
SYMATTR Value2 l=0.18u w=18u
SYMBOL voltage -48 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value 1.1
SYMBOL nmos4 48 -96 R0
SYMATTR InstName M2
SYMATTR Value2 l=0.36u w=18u
SYMBOL voltage -48 96 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName VIN
SYMATTR Value 0.6
SYMBOL res 80 -272 R0
SYMATTR InstName RD
SYMATTR Value 8000
SYMBOL voltage -64 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 3.3
FLAG 96 128 0
FLAG -48 64 0
FLAG -48 192 0
FLAG -64 -176 0
FLAG 96 -128 Vout
TEXT -88 -384 Left 2 !.dc VIN 0 3.3 0.001
TEXT -88 -360 Left 2 !;ac dec 10 1 10Meg
TEXT -88 -336 Left 2 !.model NMOS NMOS (LEVEL=1 KP=150u VTO=0.5 LAMBDA=0 GAMMA=0 PHI=0.6)
TEXT -88 -312 Left 2 !.meas DC Av_0p6 FIND deriv(V(vout))/deriv(V(vin)) WHEN V(vout)=0.6
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3225-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Note: \n1. To emulate the supercapacitor charging process within acceptable \ntime interval, the capacitance is scaled down from its real value;\n2. Load capacitor initial condion can be given to represent the specific \nresidual voltage at the beginning of the charging.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3225-1.asy)
V1 IN 0 2.7
C3 N004 0 .3m ic=1.2
R1 N003 0 12K
C2 OUT N004 .1m ic=1.5
C1 N001 N002 1
XU1 N001 N002 N004 IN NC_01 0 N003 0 IN OUT LTC3225-1 ;pnba C+)C-)Cx)_SHDN)Pgood)Vsel)Prog)GND)Vin)Cout
.tran 2m startup
.lib LTC3225-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 680
WIRE 112 0 16 0
WIRE 240 0 112 0
WIRE 240 16 240 0
WIRE 16 32 16 0
WIRE 112 80 112 0
WIRE 128 80 112 80
WIRE 400 80 352 80
WIRE 400 96 400 80
WIRE 16 144 16 112
WIRE 400 176 400 160
WIRE 400 176 352 176
WIRE 128 272 112 272
WIRE 400 272 352 272
WIRE 400 288 400 272
WIRE 32 368 16 368
WIRE 128 368 112 368
WIRE 400 368 400 352
WIRE 400 368 352 368
WIRE 400 384 400 368
WIRE 240 448 240 432
WIRE 400 464 400 448
SYMBOL PowerProducts\\LTC3225-1 240 224 R0
SYMATTR InstName U1
SYMBOL res 128 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 12K
SYMBOL cap 384 384 R0
SYMATTR InstName C3
SYMATTR Value .3m ic=1.2
SYMBOL voltage 16 16 R0
SYMATTR InstName V1
SYMATTR Value 2.7
SYMBOL cap 384 288 R0
SYMATTR InstName C2
SYMATTR Value .1m ic=1.5
SYMBOL cap 384 96 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 240 448 0
FLAG 16 144 0
FLAG 400 464 0
FLAG 16 368 0
FLAG 112 272 0
FLAG 16 0 IN
FLAG 400 272 OUT
TEXT 552 456 Left 2 !.tran 2m startup
TEXT -72 472 Left 2 ;Note: \n1. To emulate the supercapacitor charging process within acceptable \ntime interval, the capacitance is scaled down from its real value;\n2. Load capacitor initial condion can be given to represent the specific \nresidual voltage at the beginning of the charging.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8619-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8619-5.asy)
XU1 0 MP_01 N003 IN IN MP_02 MP_03 MP_04 N004 MP_05 MP_06 N002 N001 OUT NC_07 MP_08 0 OUT LT8619-5 ;pnba Sync))Rt)EN/UV)Vin))))SW)))BST)INTVcc)Bias)PG))GND)OUT
C3 N002 N004 .1
V1 IN 0 48
L1 N004 OUT 10 Rser=3m
Rload OUT 0 4
C4 OUT 0 22 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
C2 N001 0 1
R1 N003 0 60.4K
.tran 350u startup
.lib LT8619-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 680
WIRE 96 -64 0 -64
WIRE 256 -64 96 -64
WIRE 0 -48 0 -64
WIRE 256 -48 256 -64
WIRE 96 0 96 -64
WIRE 112 0 96 0
WIRE 416 0 400 0
WIRE 496 0 480 0
WIRE 0 48 0 32
WIRE 112 96 96 96
WIRE 592 96 400 96
WIRE 432 192 400 192
WIRE 432 208 432 192
WIRE 16 288 0 288
WIRE 112 288 96 288
WIRE 432 288 432 272
WIRE 432 288 400 288
WIRE 480 288 432 288
WIRE 592 288 592 96
WIRE 592 288 560 288
WIRE 624 288 592 288
WIRE 720 288 624 288
WIRE 624 304 624 288
WIRE 720 304 720 288
WIRE 192 352 192 336
WIRE 320 384 320 336
WIRE 592 384 592 288
WIRE 592 384 320 384
WIRE 624 400 624 368
WIRE 720 400 720 384
SYMBOL voltage 0 -64 R0
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL ind 464 304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=3m
SYMBOL cap 416 208 R0
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL cap 608 304 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL PowerProducts\\LT8619-5 256 144 R0
SYMATTR InstName U1
SYMBOL res 704 288 R0
SYMATTR InstName Rload
SYMATTR Value 4
SYMBOL res 112 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 60.4K
SYMBOL cap 416 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
FLAG 192 352 0
FLAG 0 288 0
FLAG 0 48 0
FLAG 496 0 0
FLAG 624 400 0
FLAG 720 400 0
FLAG 720 288 OUT
FLAG 0 -64 IN
FLAG 96 96 0
TEXT 608 448 Left 2 !.tran 350u startup
* Z:\tmp\asc_dec_bjh7r6w2\0cfb06316b97_Impedance_Pt1_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 0 10e-9
L1 N001 0 254e-6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2688 680
WIRE 304 48 16 48
WIRE 1392 48 1104 48
WIRE 304 112 304 48
WIRE 1392 112 1392 48
WIRE 304 256 304 192
WIRE 1392 256 1392 176
SYMBOL cap 1376 112 R0
SYMATTR InstName C1
SYMATTR Value 10e-9
SYMBOL ind 288 96 R0
SYMATTR InstName L1
SYMATTR Value 254e-6
FLAG 304 256 0
FLAG 1392 256 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3070-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3070-1.asy)
R1 N001 N002 50K
V1 N001 0 3
C1 0 N005 .01
C2 0 P001 .01
C3 OUT 0 20
V2 IN 0 1.2
XU1 0 N001 0 0 N001 N005 N004 N003 IN OUT OUT N001 P001 N002 LT3070-1 ;pnba GND)V00)V01)V02)Bias)Ref/BYP)MargTol)MargSel)IN)Sense)Out)En)VIOC)PWRGD
Rload OUT 0 .18
.tran 2m startup
.lib LT3070-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1252 1304
WIRE 480 64 80 64
WIRE 480 80 480 64
WIRE 288 112 -48 112
WIRE -48 128 -48 112
WIRE 288 128 288 112
WIRE 80 176 80 64
WIRE 128 176 80 176
WIRE 480 176 480 160
WIRE 480 176 448 176
WIRE -48 224 -48 208
WIRE 80 288 80 176
WIRE 80 288 -48 288
WIRE 128 288 80 288
WIRE 496 288 448 288
WIRE 592 288 496 288
WIRE -48 304 -48 288
WIRE 592 304 592 288
WIRE -48 400 -48 384
WIRE 80 400 80 288
WIRE 128 400 80 400
WIRE 496 400 496 288
WIRE 496 400 448 400
WIRE 592 400 592 384
WIRE 496 480 496 464
WIRE 128 512 96 512
WIRE 480 512 448 512
WIRE 128 624 96 624
WIRE 480 624 448 624
WIRE 64 736 48 736
WIRE 464 736 448 736
WIRE 544 736 528 736
WIRE 288 816 288 784
SYMBOL cap 480 400 R0
WINDOW 3 26 56 Left 2
SYMATTR Value 20
SYMATTR InstName C3
SYMBOL res 464 64 R0
SYMATTR InstName R1
SYMATTR Value 50K
SYMBOL cap 528 720 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL res 576 288 R0
SYMATTR InstName Rload
SYMATTR Value .18
SYMBOL voltage -48 112 R0
SYMATTR InstName V2
SYMATTR Value 1.2
SYMBOL LT3070-1 288 448 R0
SYMATTR InstName U1
SYMBOL cap 64 752 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL voltage -48 288 R0
SYMATTR InstName V1
SYMATTR Value 3
FLAG 544 736 0
FLAG 96 624 0
FLAG 96 512 0
FLAG -48 224 0
FLAG -48 400 0
FLAG 48 736 0
FLAG 496 480 0
FLAG 592 400 0
FLAG -48 112 IN
FLAG 592 288 OUT
FLAG 288 816 0
TEXT 608 784 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\6de93b7559e2_Draft6.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N005 22k
R3 N005 0 10k
R2 N004 N003 330
R4 N006 0 200
V1 NC_01 0 SINE(1.65 1.65 28Meg)
R5 N001 N002 220
C1 N005 N004 22n
Q1 N002 N005 N006 0 2N3904
V2 N001 0 13.3
V3 N003 0 PULSE(0 3.3 0 2n 2n {0.5/28Meg} {1/28Meg})
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 1u 0 100p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 560 -64 368 -64
WIRE 560 -32 560 -64
WIRE 368 96 368 -64
WIRE 560 128 560 48
WIRE 80 144 -192 144
WIRE -192 176 -192 144
WIRE 80 176 80 144
WIRE 272 176 160 176
WIRE 368 176 336 176
WIRE 496 176 368 176
WIRE 560 288 560 224
SYMBOL res 544 272 R0
SYMATTR InstName R4
SYMATTR Value 200
SYMBOL npn 496 128 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 176 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 330
SYMBOL voltage -16 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(1.65 1.65 28Meg)
SYMBOL cap 336 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL voltage 368 -48 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 13.3
SYMBOL res 352 80 R0
SYMATTR InstName R1
SYMATTR Value 22k
SYMBOL res 352 160 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 544 -48 R0
SYMATTR InstName R5
SYMATTR Value 220
SYMBOL voltage -192 160 R0
WINDOW 3 -575 90 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 3.3 0 2n 2n {0.5/28Meg} {1/28Meg})
FLAG -16 256 0
FLAG 368 256 0
FLAG 368 -144 0
FLAG 560 368 0
FLAG -192 256 0
TEXT -48 280 Left 2 !.tran 0 1u 0 100p
* Z:\home\khalils\Downloads\files\data\raw_asc\26858aa9144a_diode-va-draft.asc
* Generated by LTspice 26.0.1 for Windows.
R1 NC_03 NC_04
D1 NC_01 NC_02 1N4148
V1 NC_05 NC_06
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 20
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 368 48 352
SYMBOL Misc\\battery -64 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL diode 16 224 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL Misc\\EuropeanResistor 144 224 R0
SYMATTR InstName R1
SYMATTR Value ""
FLAG 48 368 0
TEXT -128 392 Left 2 !.dc V1 0 20
* Z:\home\khalils\Downloads\files\data\raw_asc\064795f028c3_EQUATION_SOLVING_BY_SPICE.asc
* Generated by LTspice 26.0.1 for Windows.
* (A)
* (B)
* EQUATION SOLVING BY SPICE
R1 x1 0 1G
Bx2 0 x2 I=v(x2)*v(x2)-10*v(x2)+9
Bx1 0 x1 I=v(x1)*v(x1)-10*v(x1)+9
R2 x2 0 1G
.op
.nodeset v(x1)=0 v(x2)=9
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 772
WIRE -64 96 -128 96
WIRE 0 96 -64 96
WIRE 304 96 240 96
WIRE 368 96 304 96
WIRE -128 128 -128 96
WIRE 0 128 0 96
WIRE 240 128 240 96
WIRE 368 128 368 96
WIRE -128 240 -128 208
WIRE 0 240 0 208
WIRE 240 240 240 208
WIRE 368 240 368 208
SYMBOL res 352 112 R0
SYMATTR InstName R2
SYMATTR Value 1G
SYMBOL bi 240 208 R180
WINDOW 0 24 88 Left 0
WINDOW 3 -218 -79 Left 0
SYMATTR InstName Bx2
SYMATTR Value I=v(x2)*v(x2)-10*v(x2)+9
SYMBOL bi -128 208 R180
WINDOW 0 24 88 Left 0
WINDOW 3 -218 -79 Left 0
SYMATTR InstName Bx1
SYMATTR Value I=v(x1)*v(x1)-10*v(x1)+9
SYMBOL res -16 112 R0
SYMATTR InstName R1
SYMATTR Value 1G
FLAG -128 240 0
FLAG 0 240 0
FLAG -64 96 x1
FLAG 240 240 0
FLAG 368 240 0
FLAG 304 96 x2
TEXT -128 -16 Left 0 !.op
TEXT -128 16 Left 0 !.nodeset v(x1)=0 v(x2)=9
TEXT -80 336 Left 0 ;(A)
TEXT 304 336 Left 0 ;(B)
TEXT 0 -80 Left 0 ;EQUATION SOLVING BY SPICE
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3595.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3595.asy)
R2 N006 N003 100K
V1 IN 0 30
C1 IN N001 .47
R1 0 N005 30.1K
XU1 N003 IN N002 N004 0 N005 N007 N003 N006 LT3595 ;pnba _SHDN)Vin)L1)SW1)GND)Rset)PWM1)Vcc)_OpenLED
D1 N002 N001 QTLP690C N=5
V2 N003 0 3.3
V3 N007 0 PULSE(0 3.3 0 1u 1u 50u 100u)
L1 N001 N004 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 300u startup
.lib LT3595.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1000 804
WIRE 208 -32 0 -32
WIRE 240 -32 208 -32
WIRE 336 -32 304 -32
WIRE 496 -32 336 -32
WIRE 0 -16 0 -32
WIRE 336 -16 336 -32
WIRE 496 0 496 -32
WIRE 208 64 208 -32
WIRE 336 64 336 48
WIRE 0 80 0 64
WIRE 0 128 -96 128
WIRE 112 128 0 128
WIRE 496 128 496 80
WIRE 496 128 432 128
WIRE -96 144 -96 128
WIRE 0 208 0 128
WIRE 112 208 0 208
WIRE 448 208 432 208
WIRE 544 208 528 208
WIRE -96 240 -96 224
WIRE 0 288 0 208
WIRE 16 288 0 288
WIRE 112 288 96 288
WIRE 592 288 432 288
WIRE 704 288 672 288
WIRE 272 368 272 352
SYMBOL res 112 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL PowerProducts\\LT3595 272 208 R0
SYMATTR InstName U1
SYMBOL voltage -96 128 R0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL res 544 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 30.1K
SYMBOL LED 320 48 M180
WINDOW 0 23 62 Left 2
WINDOW 3 25 3 Left 2
WINDOW 123 84 37 Left 2
SYMATTR InstName D1
SYMATTR Value QTLP690C
SYMATTR Value2 N=5
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage 576 288 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 3.3 0 1u 1u 50u 100u)
SYMBOL voltage 0 -32 R0
SYMATTR InstName V1
SYMATTR Value 30
SYMBOL cap 240 -16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value .47
SYMBOL ind 480 -16 R0
SYMATTR InstName L1
SYMATTR Value 100
FLAG 272 368 0
FLAG 0 80 0
FLAG 0 -32 IN
FLAG -96 240 0
FLAG 544 208 0
FLAG 704 288 0
TEXT 504 400 Left 2 !.tran 300u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\varistor.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
A1 IN 0 0 0 0 0 OUT 0 VARISTOR Rclamp=1
R1 N001 OUT 1K
V2 IN 0 PULSE(-3 3 0 .5m .5m 0 1m)
V1 N001 0 SIN(0 5 10K)
.tran 1u 3m 0 1u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1700 736
WIRE 1312 304 704 304
WIRE 704 320 704 304
WIRE 1312 320 1312 304
WIRE 704 416 704 400
WIRE 1312 416 1312 400
WIRE 1376 416 1312 416
WIRE 1312 448 1312 416
WIRE 1168 464 704 464
WIRE 1296 464 1168 464
WIRE 704 480 704 464
WIRE 1296 496 1264 496
WIRE 1312 544 1312 512
WIRE 704 576 704 560
SYMBOL VOLTAGE 704 464 R0
SYMATTR InstName V2
SYMATTR Value PULSE(-3 3 0 .5m .5m 0 1m)
SYMBOL RES 1296 304 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL SPECIALFUNCTIONS\\VARISTOR 1328 416 R0
WINDOW 0 -4 28 Left 2
WINDOW 3 0 96 Left 2
SYMATTR InstName A1
SYMATTR Value Rclamp=1
SYMBOL VOLTAGE 704 304 R0
SYMATTR InstName V1
SYMATTR Value SIN(0 5 10K)
FLAG 704 416 0
FLAG 704 576 0
FLAG 1264 496 0
FLAG 1312 544 0
FLAG 1168 464 IN
FLAG 1376 416 OUT
TEXT 1376 568 Left 2 !.tran 1u 3m 0 1u
TEXT 1080 600 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\0f8aeece1ac7_UniversalOpAmp3b.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp3b.asy)
R1 OUT 0 10k
V1 +V 0 15
V3 N001 0 PULSE(-50m 50m 250n 1n 1n 1u 2u)
V2 -V 0 -15
C1 OUT 0 10p
XU1 N001 OUT +V -V OUT level3b Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 Phimargin=45 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.tran 1.5u
.lib UniversalOpAmp3b.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1112
WIRE 560 560 400 560
WIRE 496 624 496 608
WIRE 400 640 400 560
WIRE 464 640 400 640
WIRE 560 656 560 560
WIRE 560 656 528 656
WIRE 656 656 560 656
WIRE 464 672 400 672
WIRE 560 672 560 656
WIRE 656 672 656 656
WIRE 496 704 496 688
WIRE 176 752 176 736
WIRE 288 752 288 736
WIRE 400 752 400 672
WIRE 560 768 560 752
WIRE 656 768 656 736
WIRE 176 848 176 832
WIRE 288 848 288 832
WIRE 400 848 400 832
SYMBOL res 544 656 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL UniversalOpAmp3b 496 656 R0
WINDOW 123 82 -97 Left 2
WINDOW 39 82 -69 Left 2
WINDOW 40 81 -42 Left 2
SYMATTR InstName U1
SYMBOL voltage 400 736 R0
WINDOW 0 25 13 Left 2
WINDOW 3 27 90 Left 2
WINDOW 123 27 116 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(-50m 50m 250n 1n 1n 1u 2u)
SYMBOL voltage 288 736 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 176 736 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL cap 640 672 R0
SYMATTR InstName C1
SYMATTR Value 10p
FLAG 288 848 0
FLAG 176 848 0
FLAG 176 736 +V
FLAG 288 736 -V
FLAG 400 848 0
FLAG 496 704 -V
FLAG 496 608 +V
FLAG 656 768 0
FLAG 560 768 0
FLAG 656 656 OUT
TEXT 152 904 Left 2 !.tran 1.5u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1167.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1167.asy)
V1 +V 0 15
R1 N002 N001 1K
XU1 N001 N003 0 -V 0 OUT +V N002 LT1167 ;pnba Rg)In-)In+)V-)Ref)Out)V+)Rg
V2 -V 0 -15
V3 N003 0 SINE(0 10m 1K)
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 384 16 288 16
WIRE 576 16 464 16
WIRE 32 32 32 16
WIRE 144 32 144 16
WIRE 32 128 32 112
WIRE 144 128 144 112
WIRE 288 128 288 16
WIRE 304 128 288 128
WIRE 576 128 576 16
WIRE 576 128 560 128
WIRE 224 176 -16 176
WIRE -16 192 -16 176
WIRE 224 192 224 176
WIRE 304 192 224 192
WIRE 592 192 560 192
WIRE 304 256 224 256
WIRE 592 256 560 256
WIRE -16 288 -16 272
WIRE 224 288 224 256
WIRE 224 288 -16 288
WIRE -16 304 -16 288
WIRE 304 320 288 320
WIRE 592 320 560 320
SYMBOL res 480 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -16 176 R0
WINDOW 3 39 86 Left 2
SYMATTR Value SINE(0 10m 1K)
SYMATTR InstName V3
SYMBOL voltage 144 16 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 32 16 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL opamps\\LT1167 432 224 R0
SYMATTR InstName U1
FLAG 144 128 0
FLAG 144 16 +V
FLAG 32 128 0
FLAG 32 16 -V
FLAG 592 192 +V
FLAG 288 320 -V
FLAG -16 304 0
FLAG 592 256 OUT
FLAG 592 320 0
TEXT 584 384 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\OP191.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
R2 OUT N001 10K
XU1 IN N001 +V -V OUT OP191 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -5
Rload OUT 0 10K
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP191.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1136 144 -1152
WIRE 272 -1136 272 -1152
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1040 144 -1056
WIRE 272 -1040 272 -1056
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
FLAG 144 -1152 +V
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 272 -1152 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 272 -1040 0
FLAG 144 -1040 0
SYMBOL voltage 144 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Opamps\\OP191 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 272 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
TEXT 752 -928 Left 2 !.tran 1m
* Z:\tmp\asc_dec_bjh7r6w2\055052a075ed_PhotodiodeAmplifier_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
XU2 N002 N003 Vdd 0 Vout AD8542 ;pnba In+)In-)V+)V-)OUT
R3 N003 0 1k
R1 Vout N003 33k
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8542.asy)
.lib AD8542.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 48 80 48
WIRE 224 48 176 48
WIRE 320 48 288 48
WIRE 432 48 400 48
WIRE 288 160 288 48
WIRE 320 160 288 160
WIRE 80 176 80 48
WIRE 80 176 -16 176
WIRE 112 176 80 176
WIRE 432 176 432 48
WIRE 432 176 384 176
WIRE 496 176 432 176
WIRE 224 192 224 48
WIRE 224 192 176 192
WIRE 320 192 224 192
WIRE 112 208 80 208
WIRE 288 208 288 160
WIRE 80 240 80 208
SYMBOL Opamps\\AD8542 352 112 R0
SYMATTR InstName U2
SYMBOL res 272 192 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 416 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 33k
FLAG 352 208 0
FLAG 144 224 0
FLAG 80 240 0
FLAG 288 288 0
FLAG 496 176 Vout
FLAG 144 160 Vdd
FLAG 352 144 Vdd
* Z:\home\khalils\Downloads\files\data\raw_asc\fc0ee287f09e_2022023_1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 100
D1 N002 0 D
V1 N001 0 SINE(0 15 50)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 15 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -176 -128 -304 -128
WIRE 32 -128 -96 -128
WIRE 128 -128 32 -128
WIRE -304 -48 -304 -128
WIRE 32 -32 32 -128
WIRE -304 64 -304 32
WIRE 16 64 -304 64
WIRE 32 64 32 32
WIRE 32 64 16 64
WIRE 128 64 32 64
SYMBOL res -80 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL diode 16 -32 R0
SYMATTR InstName D1
SYMBOL voltage -304 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 15 50)
FLAG 16 64 0
TEXT 384 -16 Left 2 !.dc V1 0 15 0.01