Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3468-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3468-2.asy)
XU1 N003 0 N002 IN IN LT3468-2 ;pnba SW)GND)_Done)Charge)Vin
R3 N002 IN 10K
K1 L1 L2 1
V1 IN 0 5
C3 N001 0 10p
D2 0 N003 1N5817
D1 N001 OUT D
C1 OUT 0 .1
L1 IN N003 20 Rpar=2K Rser=.1
L2 0 N001 {20u*10.2*10.2} Rpar=1Meg
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m startup
.lib LT3468-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2740 1752
WIRE 1872 1264 1616 1264
WIRE 2064 1264 1872 1264
WIRE 2368 1264 2112 1264
WIRE 2416 1264 2368 1264
WIRE 2528 1264 2480 1264
WIRE 2064 1280 2064 1264
WIRE 2112 1280 2112 1264
WIRE 1872 1296 1872 1264
WIRE 2368 1296 2368 1264
WIRE 2528 1296 2528 1264
WIRE 1616 1360 1616 1264
WIRE 1648 1360 1616 1360
WIRE 1760 1360 1728 1360
WIRE 2112 1376 2112 1360
WIRE 2368 1376 2368 1360
WIRE 2528 1376 2528 1360
WIRE 2064 1408 2064 1360
WIRE 2064 1408 1984 1408
WIRE 2064 1424 2064 1408
WIRE 1616 1456 1616 1360
WIRE 1760 1456 1616 1456
WIRE 1616 1472 1616 1456
WIRE 2064 1504 2064 1488
WIRE 1872 1536 1872 1520
WIRE 1616 1568 1616 1552
SYMBOL VOLTAGE 1616 1456 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind2 2048 1264 R0
WINDOW 0 -6 35 Right 2
WINDOW 3 -4 73 Right 2
SYMATTR InstName L1
SYMATTR Value 20
SYMATTR SpiceLine Rpar=2K Rser=.1
SYMBOL cap 2352 1296 R0
WINDOW 3 28 53 Left 2
SYMATTR Value 10p
SYMATTR InstName C3
SYMBOL schottky 2048 1488 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 1744 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL cap 2512 1296 R0
WINDOW 3 27 55 Left 2
SYMATTR Value .1
SYMATTR InstName C1
SYMBOL diode 2416 1280 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL ind2 2128 1376 R180
WINDOW 0 -3 72 Right 2
WINDOW 3 0 43 Right 2
SYMATTR InstName L2
SYMATTR Value {20u*10.2*10.2}
SYMATTR SpiceLine Rpar=1Meg
SYMBOL PowerProducts\\LT3468-2 1872 1408 R0
SYMATTR InstName U1
FLAG 2528 1376 0
FLAG 1872 1536 0
FLAG 1616 1568 0
FLAG 2368 1376 0
FLAG 2112 1376 0
FLAG 2064 1504 0
FLAG 2528 1264 OUT
FLAG 1616 1264 IN
TEXT 2240 1480 Left 2 !.tran 10m startup
TEXT 2088 1264 Bottom 2 !K1 L1 L2 1
* Z:\home\khalils\Downloads\files\data\raw_asc\1a0b1c811488_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N002 100
V3 N003 N004 PULSE(0 VIN_STEP 1n 1n 1n 800n 1u)
V2 N004 0 VIN_BIAS
C1 0 N002 10n
V1 N001 0 9 Rser=0
Q1 N002 N003 0 0 BFR182
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 -96 32 -96
WIRE 256 -64 256 -96
WIRE 32 16 32 -16
WIRE 256 64 256 16
WIRE 336 64 256 64
WIRE 480 64 400 64
WIRE 480 96 480 64
WIRE 256 112 256 64
WIRE 192 160 -112 160
WIRE -112 192 -112 160
WIRE 256 256 256 208
WIRE -112 304 -112 272
WIRE -112 432 -112 384
SYMBOL voltage -112 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 VIN_STEP 1n 1n 1n 800n 1u)
SYMBOL voltage 32 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 2
SYMATTR InstName V1
SYMATTR Value 9
SYMATTR SpiceLine Rser=0
SYMBOL npn 192 112 R0
SYMATTR InstName Q1
SYMATTR Value BFR182
SYMBOL cap 400 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL voltage -112 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value VIN_BIAS
SYMBOL res 240 -80 R0
SYMATTR InstName R1
SYMATTR Value 100
FLAG 256 256 0
FLAG 480 96 0
FLAG 32 16 0
FLAG -112 432 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1585-3.45.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1585-3.6.asy)
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 22
Rload OUT 0 500
XU1 0 OUT IN LT1585-3.6 ;pnba GND)OUT)IN
.tran 1
.lib LT1584.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 176 -160 176
WIRE 384 176 288 176
WIRE 480 176 384 176
WIRE -160 192 -160 176
WIRE 384 192 384 176
WIRE 480 192 480 176
WIRE -160 288 -160 272
WIRE 384 288 384 256
WIRE 480 288 480 272
WIRE 160 304 160 272
SYMBOL PowerProducts\\LT1585-3.6 160 176 R0
SYMATTR InstName U1
SYMBOL voltage -160 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 368 192 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 464 176 R0
SYMATTR InstName Rload
SYMATTR Value 500
FLAG -160 288 0
FLAG 384 288 0
FLAG 480 288 0
FLAG 160 304 0
FLAG -160 176 IN
FLAG 480 176 OUT
TEXT 272 360 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8056.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8056.asy)
C1 OUT 0 22 V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
R2 OUT N001 100K
R3 N001 0 5.32K
C2 OUT 0 33 V=20 Irms=0 Rser=0.2 Lser=0 mfg="KEMET" pn="T495D336M020AS" type="Tantalum"
V1 IN 0 32
XU1 NC_01 NC_02 MP_03 0 MP_04 MP_05 NC_06 NC_07 IN IN IN IN MP_08 MP_09 MP_10 MP_11 MP_12 MP_13 MP_14 MP_15 MP_16 MP_17 MP_18 MP_19 OUT OUT MP_20 MP_21 MP_22 0 MP_23 NC_24 NC_25 NC_26 N002 NC_27 N001 LTM8056 ;pnba CTL)SS))LL)))IOUTmon)IINmon)Run)Iin)Vin)SVin)))))))))))))Vout)Iout))))GND))Mode)CLKout)Sync)RT)Comp)FB
Rload OUT 0 6
R1 N002 0 43.2K
.tran 1.5m startup
.lib LTM8056.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 728
WIRE -32 -192 -128 -192
WIRE -16 -192 -32 -192
WIRE 416 -192 400 -192
WIRE 464 -192 416 -192
WIRE 576 -192 464 -192
WIRE 656 -192 576 -192
WIRE 736 -192 656 -192
WIRE -128 -176 -128 -192
WIRE 464 -176 464 -192
WIRE 576 -176 576 -192
WIRE 656 -176 656 -192
WIRE 736 -176 736 -192
WIRE -32 -96 -32 -192
WIRE -16 -96 -32 -96
WIRE 416 -96 416 -192
WIRE 416 -96 400 -96
WIRE -128 -80 -128 -96
WIRE 576 -80 576 -112
WIRE 656 -80 656 -112
WIRE 736 -80 736 -96
WIRE -32 0 -32 -96
WIRE -16 0 -32 0
WIRE 464 0 464 -96
WIRE 464 0 400 0
WIRE 464 16 464 0
WIRE -32 96 -32 0
WIRE -16 96 -32 96
WIRE 464 112 464 96
WIRE -16 480 -32 480
WIRE -112 576 -128 576
WIRE -16 576 -32 576
WIRE 416 576 400 576
SYMBOL voltage -128 -192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 32
SYMBOL polcap 640 -176 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 33
SYMATTR InstName C2
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=20 Irms=0 Rser=0.2 Lser=0 mfg="KEMET" pn="T495D336M020AS" type="Tantalum"
SYMBOL res 448 0 R0
SYMATTR InstName R3
SYMATTR Value 5.32K
SYMBOL PowerProducts\\LTM8056 192 192 R0
SYMATTR InstName U1
SYMBOL res 720 -192 R0
SYMATTR InstName Rload
SYMATTR Value 6
SYMBOL res 448 -192 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL cap 560 -176 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
SYMBOL res -16 560 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 43.2K
FLAG -128 576 0
FLAG -32 480 0
FLAG -128 -80 0
FLAG 416 576 0
FLAG 464 112 0
FLAG 576 -80 0
FLAG 656 -80 0
FLAG 736 -80 0
FLAG 736 -192 OUT
FLAG -128 -192 IN
TEXT 632 560 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ac047d49aba9_Assignment_3a__iv_.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 SINE(0 5 1000) Rser=0.001
R1 N002 0 1000
D1 N001 N002 1N4148
C1 N002 0 0.000001
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5ms
* Positive Half Wave Rectifier Circuit (with 1microF Capacitor) (Practical)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 320 64 208 64
WIRE 480 64 384 64
WIRE 592 64 480 64
WIRE 208 112 208 64
WIRE 480 112 480 64
WIRE 592 128 592 64
WIRE 208 240 208 192
WIRE 304 240 208 240
WIRE 480 240 480 192
WIRE 480 240 304 240
WIRE 592 240 592 192
WIRE 592 240 480 240
WIRE 304 272 304 240
FLAG 304 272 0
SYMBOL voltage 208 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.001
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1000)
SYMBOL res 464 96 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL diode 320 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL cap 576 128 R0
SYMATTR InstName C1
SYMATTR Value 0.000001
TEXT 144 272 Left 2 !.tran 5ms
TEXT -24 8 Left 2 ;Positive Half Wave Rectifier Circuit (with 1microF Capacitor) (Practical)
* Z:\tmp\asc_dec_bjh7r6w2\04a67a4f4cf8_6002_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V2 -V 0 -2
XU1 IN N001 +V -V OUT LT6002 ;pnba IN+)IN-)VCC)VEE)OUT
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6002.asy)
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 756
WIRE 32 400 16 400
WIRE 128 400 112 400
WIRE 192 400 128 400
WIRE 288 400 272 400
WIRE -288 448 -288 432
WIRE -192 448 -192 432
WIRE 192 496 192 480
WIRE 128 512 128 400
WIRE 160 512 128 512
WIRE 288 528 288 400
WIRE 288 528 224 528
WIRE 336 528 288 528
WIRE -288 544 -288 528
WIRE -192 544 -192 528
WIRE 160 544 -64 544
WIRE -64 560 -64 544
WIRE 192 576 192 560
SYMBOL voltage -192 432 R0
SYMATTR InstName V2
SYMATTR Value -2
SYMBOL LT6002 192 528 R0
SYMATTR InstName U1
FLAG -288 544 0
FLAG -192 544 0
FLAG -64 544 IN
FLAG 336 528 OUT
FLAG 192 480 +V
FLAG -288 432 +V
FLAG -192 432 -V
FLAG 192 576 -V
FLAG 16 400 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6905-80.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 3
V2 N002 0 PULSE(0 3 100n 10n 10n 200n 300n)
V3 N003 0 PWL(0 3 .35u 3 +10n 1.5 .65u 1.5 +10n 0)
XU1 N001 0 N002 N003 OUT LTC6905-80 ;pnba V+)GND)0E)DIV)OUT
.tran 1u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6905-80.asy)
.lib LTC6905-80.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 680
WIRE 32 160 -80 160
WIRE 288 160 256 160
WIRE -80 176 -80 160
WIRE 32 240 16 240
WIRE -80 272 -80 256
WIRE 32 320 -208 320
WIRE 336 320 256 320
WIRE -208 336 -208 320
WIRE 336 336 336 320
WIRE -208 432 -208 416
WIRE 336 432 336 416
FLAG -80 272 0
FLAG 16 240 0
FLAG -208 432 0
FLAG 336 432 0
FLAG 288 160 OUT
SYMBOL voltage -80 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL voltage -208 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 3 100n 10n 10n 200n 300n)
SYMBOL voltage 336 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 3 .35u 3 +10n 1.5 .65u 1.5 +10n 0)
SYMBOL LTC6905-80 144 240 R0
SYMATTR InstName U1
TEXT 464 472 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1121-5.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 10)
Rload OUT 0 100
C1 OUT 0 1
XU1 OUT MP_01 0 MP_02 NC_03 MP_04 MP_05 IN LT1121-5 ;pnba OUT))GND))_SHDN)))IN
.tran 1
* Note Abs. Max SHDN pin voltage 6.5
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1121-5.asy)
.lib LT1121.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 192 -272 192
WIRE 368 192 320 192
WIRE 464 192 368 192
WIRE -272 208 -272 192
WIRE 368 208 368 192
WIRE 464 208 464 192
WIRE -272 304 -272 288
WIRE 368 304 368 272
WIRE 464 304 464 288
WIRE 176 384 176 352
FLAG -272 304 0
FLAG 176 384 0
FLAG 368 304 0
FLAG 464 304 0
FLAG 464 192 OUT
FLAG -272 192 IN
SYMBOL voltage -272 192 R0
SYMATTR Value PWL(0 0 1 10)
SYMATTR InstName V1
SYMBOL res 448 192 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 352 208 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMBOL PowerProducts\\LT1121-5 176 240 R0
SYMATTR InstName U1
TEXT 368 384 Left 2 !.tran 1
TEXT -424 368 Left 2 ;Note Abs. Max SHDN pin voltage 6.5
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3252.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 N003 1
V1 IN 0 5
XU1 N001 IN IN N002 OUT1 N003 0 N006 OUT2 N004 IN N005 LTC3252 ;pnba FB1)EN1)Vin)C1+)OUT1)C1-)GND)C2-)OUT2)C2+)EN2)FB2
R1 OUT2 N005 261K
R2 N005 0 510K
C2 OUT2 0 4.7
R3 OUT1 N001 470K
R4 N001 0 510K
C3 OUT1 0 4.7
Rload2 OUT2 0 10
C4 N004 N006 1
Rload1 OUT1 0 10
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3252.asy)
.lib LTC3252.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1160 1716
WIRE 736 896 656 896
WIRE 864 896 736 896
WIRE 960 896 864 896
WIRE 736 912 736 896
WIRE 864 912 864 896
WIRE 960 912 960 896
WIRE 304 944 192 944
WIRE 432 944 304 944
WIRE 528 944 432 944
WIRE 192 960 192 944
WIRE 432 976 432 944
WIRE 528 976 528 944
WIRE 864 992 864 976
WIRE 736 1008 736 992
WIRE 736 1008 688 1008
WIRE 960 1008 960 992
WIRE 304 1024 304 944
WIRE 336 1024 304 1024
WIRE 656 1024 656 896
WIRE 656 1024 624 1024
WIRE 736 1024 736 1008
WIRE 192 1056 192 1040
WIRE 336 1088 272 1088
WIRE 688 1088 688 1008
WIRE 688 1088 624 1088
WIRE 736 1120 736 1104
WIRE 336 1152 272 1152
WIRE 736 1152 624 1152
WIRE 864 1152 736 1152
WIRE 976 1152 864 1152
WIRE 736 1168 736 1152
WIRE 864 1168 864 1152
WIRE 976 1168 976 1152
WIRE 336 1216 272 1216
WIRE 688 1216 624 1216
WIRE 864 1248 864 1232
WIRE 688 1264 688 1216
WIRE 736 1264 736 1248
WIRE 736 1264 688 1264
WIRE 976 1264 976 1248
WIRE 336 1280 272 1280
WIRE 656 1280 624 1280
WIRE 736 1280 736 1264
WIRE 736 1376 736 1360
FLAG 960 1008 0
FLAG 192 1056 0
FLAG 960 896 OUT1
FLAG 192 944 IN
FLAG 656 1280 0
FLAG 736 1376 0
FLAG 864 1248 0
FLAG 736 1120 0
FLAG 864 992 0
FLAG 976 1264 0
FLAG 976 1152 OUT2
SYMBOL cap 256 1088 R0
WINDOW 0 36 20 Left 2
WINDOW 3 34 45 Left 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL VOLTAGE 192 944 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LTC3252 480 1152 R0
SYMATTR InstName U1
SYMBOL res 720 1152 R0
SYMATTR InstName R1
SYMATTR Value 261K
SYMBOL res 720 1264 R0
SYMATTR InstName R2
SYMATTR Value 510K
SYMBOL cap 848 1168 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL res 720 896 R0
SYMATTR InstName R3
SYMATTR Value 470K
SYMBOL res 720 1008 R0
SYMATTR InstName R4
SYMATTR Value 510K
SYMBOL cap 848 912 R0
SYMATTR InstName C3
SYMATTR Value 4.7
SYMBOL res 960 1152 R0
SYMATTR InstName Rload2
SYMATTR Value 10
SYMBOL cap 256 1216 R0
WINDOW 0 36 20 Left 2
WINDOW 3 34 45 Left 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL res 944 896 R0
SYMATTR InstName Rload1
SYMATTR Value 10
TEXT 888 1328 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17555A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17555A.asy)
R3 vOUT N003 100k
R1 vIN N002 3.32Meg
C1 vOUT 0 22
R2 N002 0 665k
V1 vIN 0 12
L1 N001 vOUT 180 Rser=2.5
Rload vOUT 0 66
XU1 0 vIN N002 0 vOUT N001 N003 MAX17555A ;pnba GND)IN)EN/UV)HYST)FB/VO)LX)_RESET
.tran 1.6m startup
.lib MAX17555A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 992 680
WIRE -48 -32 -64 -32
WIRE 48 -32 -48 -32
WIRE 176 -32 48 -32
WIRE 512 -32 464 -32
WIRE 624 -32 592 -32
WIRE 704 -32 624 -32
WIRE 752 -32 704 -32
WIRE 784 -32 752 -32
WIRE 48 -16 48 -32
WIRE 624 -16 624 -32
WIRE 784 -16 784 -32
WIRE -64 16 -64 -32
WIRE 624 64 624 48
WIRE 784 80 784 64
WIRE 48 96 48 64
WIRE 176 96 48 96
WIRE 48 112 48 96
WIRE -64 128 -64 96
WIRE 512 128 464 128
WIRE 704 128 704 -32
WIRE 704 128 592 128
WIRE 48 224 48 192
WIRE 176 224 48 224
WIRE 704 224 704 128
WIRE 704 224 464 224
WIRE 48 240 48 224
WIRE 320 384 320 368
SYMBOL ind 496 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 180
SYMATTR SpiceLine Rser=2.5
SYMBOL cap 608 -16 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 768 -32 R0
SYMATTR InstName Rload
SYMATTR Value 66
SYMBOL MAX17555A 320 144 R0
SYMATTR InstName U1
SYMBOL voltage -64 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 3.32Meg
SYMBOL res 32 96 R0
SYMATTR InstName R2
SYMATTR Value 665k
SYMBOL res 608 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
FLAG -64 128 0
FLAG 320 384 0
FLAG 624 64 0
FLAG 784 80 0
FLAG -48 -32 vIN
FLAG 752 -32 vOUT
FLAG 48 240 0
TEXT 472 400 Left 2 !.tran 1.6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\17365492cc70_Fig9_31.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1)
VGS N002 0 350m
M1 N001 N002 0 0 N_50n l=100n w=2.5u
VDS N001 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VDS 0 1 1m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 288 208 288 192
WIRE 288 304 288 288
WIRE 400 192 288 192
WIRE 448 112 448 80
WIRE 448 224 448 208
WIRE 496 160 448 160
WIRE 640 80 448 80
WIRE 640 112 640 80
WIRE 640 224 640 192
SYMBOL nmos4 400 112 R0
WINDOW 0 59 18 Left 0
WINDOW 3 64 75 Left 0
WINDOW 123 64 103 Left 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=100n w=2.5u
SYMBOL voltage 640 96 R0
WINDOW 0 41 55 Left 0
WINDOW 3 41 83 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 0
SYMBOL voltage 288 192 R0
WINDOW 0 -90 57 Left 0
WINDOW 3 -90 85 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 350m
FLAG 288 304 0
FLAG 448 224 0
FLAG 640 224 0
FLAG 496 160 0
TEXT 384 272 Left 0 !.dc VDS 0 1 1m
TEXT 384 296 Left 0 !.lib cmosedu_models.txt
TEXT 488 56 Left 0 ;Plot Id(M1)
* Z:\home\khalils\Downloads\files\data\raw_asc\28d7336c1c20_low_voltage_cutoff.asc
* Generated by LTspice 26.0.1 for Windows.
* V1 = 13.2V
* V1 = 9.6V
* V1 = 7.2V
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1017.asy)
M2 N002 N007 N001 N001 IRF7404
R9 N001 N005 1
V2 N008 0 2.5
R8 N007 0 1e6
R5 N001 N003 412K
R1 N009 N008 1000
R6 N007 N009 1E6
XU1 N009 N006 N005 0 N007 LT1017 ;pnba In+)In-)V+)V-)OUT
R4 N002 0 6.6
R7 N004 N006 37.4K
V1 N001 0 PULSE(0 13.2 0 1e-3 5s 1s)
R3 N006 0 150K
R2 N003 N004 61.9K
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 30
.lib LT1017.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 944 680
WIRE -400 0 -624 0
WIRE 64 0 -400 0
WIRE 240 0 64 0
WIRE 432 0 336 0
WIRE -400 32 -400 0
WIRE 64 96 64 0
WIRE -400 128 -400 112
WIRE -368 128 -400 128
WIRE -400 144 -400 128
WIRE -624 256 -624 0
WIRE -400 256 -400 224
WIRE -368 256 -400 256
WIRE 64 256 64 176
WIRE 432 256 432 0
WIRE 32 272 -272 272
WIRE 128 288 96 288
WIRE 256 288 256 48
WIRE 256 288 128 288
WIRE -400 304 -400 256
WIRE -176 304 -224 304
WIRE -64 304 -96 304
WIRE 32 304 -64 304
WIRE -64 368 -64 304
WIRE -48 368 -64 368
WIRE 128 368 128 288
WIRE 128 368 32 368
WIRE 256 384 256 288
WIRE -400 400 -400 384
WIRE -272 400 -272 272
WIRE -272 400 -400 400
WIRE -400 432 -400 400
WIRE -224 432 -224 304
WIRE -624 576 -624 336
WIRE -400 576 -400 512
WIRE -400 576 -624 576
WIRE -224 576 -224 512
WIRE -224 576 -400 576
WIRE 64 576 64 320
WIRE 64 576 -224 576
WIRE 256 576 256 464
WIRE 256 576 64 576
WIRE 432 576 432 336
WIRE 432 576 256 576
WIRE -624 640 -624 576
SYMBOL res -80 288 R90
WINDOW 0 61 59 VBottom 0
WINDOW 3 68 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL res -416 16 R0
SYMATTR InstName R5
SYMATTR Value 412K
SYMBOL voltage -624 240 R0
WINDOW 3 24 104 Invisible 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 13.2 0 1e-3 5s 1s)
SYMATTR InstName V1
SYMBOL Comparators\\LT1017 64 288 R0
WINDOW 0 -76 -59 Left 0
WINDOW 3 -96 -91 Left 0
SYMATTR InstName U1
SYMBOL res 48 352 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R6
SYMATTR Value 1E6
SYMBOL res 48 80 R0
SYMATTR InstName R9
SYMATTR Value 1
SYMBOL res 416 240 R0
SYMATTR InstName R4
SYMATTR Value 6.6
SYMBOL res -416 128 R0
SYMATTR InstName R2
SYMATTR Value 61.9K
SYMBOL res -416 288 R0
SYMATTR InstName R7
SYMATTR Value 37.4K
SYMBOL voltage -224 416 R0
WINDOW 0 -51 101 Left 0
WINDOW 3 -60 132 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 2.5
SYMBOL res 240 368 R0
SYMATTR InstName R8
SYMATTR Value 1e6
SYMBOL pmos 336 48 M270
WINDOW 0 30 124 VLeft 0
WINDOW 3 28 -1 VLeft 0
SYMATTR InstName M2
SYMATTR Value IRF7404
SYMBOL res -416 416 R0
SYMATTR InstName R3
SYMATTR Value 150K
FLAG -624 640 0
TEXT -592 600 Left 0 !.tran 30
TEXT -520 400 Left 0 ;V1 = 13.2V
TEXT -512 256 Left 0 ;V1 = 9.6V
TEXT -512 128 Left 0 ;V1 = 7.2V
* Z:\tmp\asc_dec_bjh7r6w2\0c298e41e5dc_5k_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
C6 OUT 0 180 x4 Rser=.05
R6 OUT 0 .5
M2 N007 N010 0 0 Si4410DY
C2 N011 0 43p
C3 S/S 0 .001
D1 N002 N005 1N5818
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 3
SHEET 1 1176 688
WIRE 288 372 288 364
WIRE 344 372 344 364
WIRE 260 232 252 232
WIRE 200 296 192 296
WIRE 596 344 596 336
WIRE 680 344 680 320
WIRE 628 344 628 320
WIRE 212 236 212 224
WIRE 444 304 444 300
WIRE 236 328 224 328
WIRE 252 264 240 264
WIRE 260 264 252 264
WIRE 572 332 372 332
WIRE 572 272 572 332
WIRE 568 272 572 272
WIRE 596 272 572 272
WIRE 596 288 596 272
WIRE 628 272 596 272
WIRE 628 304 628 272
WIRE 680 272 628 272
WIRE 680 300 680 272
WIRE 444 228 444 192
WIRE 212 192 280 192
WIRE 212 204 212 192
WIRE 252 296 240 296
WIRE 260 296 252 296
WIRE 420 200 384 200
WIRE 260 328 252 328
WIRE 544 316 372 316
WIRE 544 272 544 316
WIRE 532 272 544 272
WIRE 548 272 544 272
WIRE 584 348 452 348
WIRE 584 312 584 348
WIRE 596 312 584 312
WIRE 596 316 596 312
WIRE 596 308 596 312
WIRE 444 276 444 272
WIRE 444 252 444 272
WIRE 432 296 372 296
WIRE 432 248 372 248
WIRE 420 200 420 204
WIRE 420 220 420 224
WIRE 492 272 492 280
WIRE 492 296 492 304
WIRE 280 212 280 192
WIRE 372 272 384 272
WIRE 512 272 492 272
WIRE 492 272 444 272
WIRE 372 232 384 232
WIRE 384 232 384 252
WIRE 384 268 384 272
WIRE 384 272 444 272
WIRE 352 212 352 200
WIRE 352 200 384 200
WIRE 384 200 384 212
WIRE 384 228 384 232
WIRE 316 212 316 204
WIRE 224 264 192 264
WIRE 224 296 220 296
WIRE 280 192 444 192
WIRE 416 348 396 348
WIRE 396 348 372 348
WIRE 452 348 436 348
SYMBOL polcap 624 304 R0
WINDOW 0 6 2 Left 0
WINDOW 3 6 15 Left 0
WINDOW 39 6 31 Left 0
WINDOW 123 6 23 Left 0
SYMATTR InstName C6
SYMATTR Value 180U
SYMATTR Value2 x4
SYMATTR SpiceLine Rser=.05
SYMBOL res 676 296 R0
WINDOW 0 9 11 Left 0
WINDOW 3 9 20 Left 0
SYMATTR InstName R6
SYMATTR Value .5
SYMBOL nmos 432 276 R0
WINDOW 0 14 8 Left 0
WINDOW 3 14 18 Left 0
SYMATTR InstName M2
SYMATTR Value Si4410DY
SYMBOL cap 252 324 R90
WINDOW 0 0 8 Right 0
WINDOW 3 8 8 Left 0
SYMATTR InstName C2
SYMATTR Value 43p
SYMBOL cap 240 260 R90
WINDOW 0 0 8 Right 0
WINDOW 3 8 8 Left 0
SYMATTR InstName C3
SYMATTR Value .001U
SYMBOL schottky 380 212 R0
WINDOW 0 8 1 Left 0
WINDOW 3 7 20 Left 0
SYMATTR InstName D1
SYMATTR Value 1N5818
FLAG 288 372 GND
FLAG 344 372 GND
FLAG 192 296 GND
FLAG 192 264 GND
FLAG 596 344 GND
FLAG 680 344 GND
FLAG 628 344 GND
FLAG 212 236 GND
FLAG 444 304 GND
FLAG 224 328 GND
FLAG 252 264 S/S
FLAG 628 272 OUT
FLAG 252 296 VC
FLAG 420 224 GND
FLAG 492 304 GND
FLAG 396 348 IN
FLAG 452 348 X