Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3431.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3431.asy)
Rload OUT 0 1.5
R2 N006 0 4.99K
C3 OUT 0 47 Rser=.1
L1 N002 OUT 10
C2 N002 N001 .33
XU1 0 N002 MP_01 IN MP_02 N001 MP_03 MP_04 MP_05 OUT N005 N006 MP_06 MP_07 N003 LT3431 ;pnba GND)SW))Vin))Boost))))BIAS)Vc)FB)))_SHDN
R3 N004 0 1.5K
R1 OUT N006 15.4K
C1 N005 0 250p
C5 N005 N004 .015
V1 IN 0 20
D1 0 N002 MBRS340
D2 OUT N001 1N914
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 750u startup
.lib LT3431.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2716 1784
WIRE 2096 1312 1984 1312
WIRE 2176 1312 2096 1312
WIRE 2416 1312 2240 1312
WIRE 1824 1344 1616 1344
WIRE 2096 1344 2096 1312
WIRE 1616 1360 1616 1344
WIRE 1824 1360 1824 1344
WIRE 1984 1360 1984 1312
WIRE 2224 1392 2176 1392
WIRE 2304 1392 2224 1392
WIRE 2416 1392 2416 1312
WIRE 2416 1392 2384 1392
WIRE 2480 1392 2416 1392
WIRE 2576 1392 2480 1392
WIRE 2224 1408 2224 1392
WIRE 2480 1408 2480 1392
WIRE 2576 1408 2576 1392
WIRE 1744 1440 1728 1440
WIRE 2096 1440 2096 1408
WIRE 2096 1440 2064 1440
WIRE 2176 1440 2176 1392
WIRE 2176 1440 2096 1440
WIRE 1616 1456 1616 1440
WIRE 2224 1488 2224 1472
WIRE 2480 1504 2480 1472
WIRE 2576 1504 2576 1488
WIRE 2416 1520 2416 1392
WIRE 2416 1520 2064 1520
WIRE 1568 1600 1504 1600
WIRE 1664 1600 1632 1600
WIRE 1744 1600 1664 1600
WIRE 2416 1600 2064 1600
WIRE 1504 1616 1504 1600
WIRE 1664 1616 1664 1600
WIRE 2416 1616 2416 1600
WIRE 1904 1696 1904 1680
WIRE 1504 1712 1504 1696
WIRE 1664 1712 1664 1680
WIRE 2416 1712 2416 1696
SYMBOL RES 2400 1504 R0
SYMATTR InstName R1
SYMATTR Value 15.4K
SYMBOL cap 1632 1584 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value .015
SYMBOL VOLTAGE 1616 1344 R0
SYMATTR InstName V1
SYMATTR Value 20
SYMBOL diode 2240 1296 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL schottky 2208 1472 M180
WINDOW 0 35 62 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMBOL res 2560 1392 R0
SYMATTR InstName Rload
SYMATTR Value 1.5
SYMBOL res 1488 1600 R0
SYMATTR InstName R3
SYMATTR Value 1.5K
SYMBOL res 2400 1600 R0
SYMATTR InstName R2
SYMATTR Value 4.99K
SYMBOL cap 2080 1408 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value .33
SYMBOL ind 2288 1408 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL polcap 2464 1408 R0
SYMATTR InstName C3
SYMATTR Value 47
SYMATTR SpiceLine Rser=.1
SYMBOL PowerProducts\\LT3431 1904 1520 R0
SYMATTR InstName U1
SYMBOL cap 1648 1616 R0
SYMATTR InstName C1
SYMATTR Value 250p
FLAG 2224 1488 0
FLAG 2416 1712 0
FLAG 2480 1504 0
FLAG 2576 1504 0
FLAG 1904 1696 0
FLAG 1664 1712 0
FLAG 1616 1456 0
FLAG 1504 1712 0
FLAG 2576 1392 OUT
FLAG 1616 1344 IN
TEXT 2128 1736 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\25a23fe35071_FirstAnd.asc
* Generated by LTspice 26.0.1 for Windows.
A1 0 in1 0 in2 0 out 0 0 AND td=10n trise=10n tfall=10n vhigh=5 Ref=1.5
V1 in1 0 PULSE(0 5 100n 5n 5n 400n 500n)
V2 in2 0 PULSE(0 5 150n 100n 100n 100n 500n)
R2 out N001 1k
V3 N001 0 2.5
.tran 0 1u 0 1n
* 74HCT00
* The following parameters are accepted, but don't have any effect.
* Rout=50 Iout=20m
* Ref = threshhold
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 996 680
WIRE -288 208 -288 144
WIRE -288 320 -288 288
WIRE -128 208 -128 176
WIRE -128 320 -128 288
WIRE 48 144 -288 144
WIRE 48 176 -128 176
WIRE 400 176 112 176
WIRE 400 224 400 176
WIRE 400 352 400 304
WIRE 400 464 400 432
WIRE 480 176 400 176
FLAG -288 320 0
FLAG -128 320 0
FLAG 480 176 out
IOPIN 480 176 Out
FLAG -288 144 in1
FLAG -128 176 in2
FLAG 400 464 0
SYMBOL Digital\\and 80 96 R0
WINDOW 3 -6 114 Left 0
SYMATTR Value td=10n
SYMATTR InstName A1
SYMATTR Value2 trise=10n tfall=10n
SYMATTR SpiceLine vhigh=5 Ref=1.5
SYMBOL voltage -288 192 R0
WINDOW 3 -25 187 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 100n 5n 5n 400n 500n)
SYMATTR InstName V1
SYMBOL voltage -128 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 150n 100n 100n 100n 500n)
SYMBOL res 384 208 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 400 336 R0
SYMATTR InstName V3
SYMATTR Value 2.5
TEXT -304 56 Left 0 !.tran 0 1u 0 1n
TEXT 8 56 Left 0 ;74HCT00
TEXT -296 -24 Left 0 ;The following parameters are accepted, but don't have any effect.
TEXT -296 8 Left 0 ;Rout=50 Iout=20m
TEXT 16 248 Left 0 ;Ref = threshhold
* Z:\home\khalils\Downloads\files\data\raw_asc\006c0adad7a4_CircuitoBS170.asc
* Generated by LTspice 26.0.1 for Windows.
M1 0 Port1 Port2 Port2 BS170
V1 Port1 0 0 AC 1
I1 Port2 0 100m
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model BS170 VDMOS VTO=1.824 RG=270 RS=1.572 RD=1.436 RB=.768 KP=.1233 Cgdmax=20p Cgdmin=3p CGS=28p Cjo=35p Rds=1.2E8 IS=5p Bv=60 Ibv=10u Tt=161.6n
.net V(port2) V1
.ac dec 1000 100 100Meg
.OPTIONS ALLOW_AMBIGUOUS_MODELS
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2096 680
WIRE 384 -16 240 -16
WIRE 464 -16 384 -16
WIRE 464 16 464 -16
WIRE 240 64 240 -16
WIRE 384 64 384 -16
WIRE 80 144 64 144
WIRE 192 144 80 144
WIRE 80 176 80 144
WIRE 240 176 240 160
WIRE 384 176 384 144
WIRE 384 176 240 176
WIRE 432 176 384 176
WIRE 80 288 80 256
IOPIN 64 144 In
IOPIN 432 176 Out
SYMBOL current 384 144 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 100m
SYMBOL nmos 192 64 R0
SYMATTR InstName M1
SYMATTR Value BS170
SYMBOL voltage 80 160 R0
WINDOW 3 24 152 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
FLAG 64 144 Port1
FLAG 432 176 Port2
FLAG 80 288 0
FLAG 464 16 0
TEXT -472 -200 Left 2 !.model BS170 VDMOS VTO=1.824 RG=270 RS=1.572 RD=1.436 RB=.768 KP=.1233 Cgdmax=20p Cgdmin=3p CGS=28p Cjo=35p Rds=1.2E8 IS=5p Bv=60 Ibv=10u Tt=161.6n
TEXT 616 96 Left 2 !.net V(port2) V1
TEXT -472 232 Left 2 !.ac dec 1000 100 100Meg
TEXT -464 -168 Left 2 !.OPTIONS ALLOW_AMBIGUOUS_MODELS
* Z:\home\khalils\Downloads\files\data\raw_asc\09e2d4ebeb7d_1844-SD.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1844-SD.asy)
XU1 IN 0 IN N001 OUT LTC1844-SD ;pnba IN)GND)_SHDN)ADJ)OUT
R2 OUT N001 164K
I1 OUT 0 {iload} load
R1 N001 0 100K
V1 IN 0 5
.dc v1 5 2 10m
.measure DC vdrop WHEN V(out)=3.2
.measure DC dropout param Vdrop-3.2
.step param iload list 1u 10m 25m 50m 75m 100m 125m 150m
.lib LTC1844-SD.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1940 1316
WIRE 64 80 -80 80
WIRE 80 80 64 80
WIRE 416 80 368 80
WIRE 560 80 416 80
WIRE -80 96 -80 80
WIRE 560 96 560 80
WIRE 416 112 416 80
WIRE -80 192 -80 176
WIRE 560 192 560 176
WIRE 64 240 64 80
WIRE 80 240 64 240
WIRE 416 240 416 192
WIRE 416 240 368 240
WIRE 416 256 416 240
WIRE 224 304 224 288
WIRE 416 352 416 336
SYMBOL res 400 96 R0
SYMATTR InstName R2
SYMATTR Value 164K
SYMBOL voltage -80 80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL LTC1844-SD 224 160 R0
SYMATTR InstName U1
SYMBOL current 560 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 19 82 Left 2
WINDOW 3 39 36 Left 2
SYMATTR SpiceLine load
SYMATTR Value {iload}
SYMATTR InstName I1
SYMBOL res 400 240 R0
SYMATTR InstName R1
SYMATTR Value 100K
FLAG 224 304 0
FLAG 416 352 0
FLAG -80 192 0
FLAG 560 192 0
FLAG 560 80 OUT
FLAG -80 80 IN
TEXT 744 120 Left 2 !.dc v1 5 2 10m
TEXT 744 208 Left 2 !.measure DC vdrop WHEN V(out)=3.2\n.measure DC dropout param Vdrop-3.2
TEXT 744 160 Left 2 !.step param iload list 1u 10m 25m 50m 75m 100m 125m 150m
* Z:\home\khalils\Downloads\files\data\raw_asc\a37da04b9564_bridge_rect.asc
* Generated by LTspice 26.0.1 for Windows.
D1 -2 W1 1N914
R1 -2 +2 4.7k
V1 W1 0 SINE(0 3 100 0 0 0)
D2 W1 +2 1N914
D3 -2 0 1N914
D4 0 +2 1N914
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
* Bridge rectifier
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -176 0 -192 0
WIRE 208 0 -176 0
WIRE -176 80 -176 0
WIRE -176 80 -192 80
WIRE 96 160 64 160
WIRE 208 160 208 0
WIRE 208 160 160 160
WIRE 256 160 208 160
WIRE 384 160 320 160
WIRE 64 272 64 160
WIRE 64 272 32 272
WIRE 176 272 64 272
WIRE 384 272 384 160
WIRE 384 272 256 272
WIRE 416 272 384 272
WIRE -176 304 -176 80
WIRE -176 416 -176 384
WIRE 64 416 64 272
WIRE 112 416 64 416
WIRE 240 416 176 416
WIRE 272 416 240 416
WIRE 384 416 384 272
WIRE 384 416 336 416
WIRE 240 464 240 416
FLAG 240 464 0
FLAG -176 416 0
FLAG -192 0 +1
IOPIN -192 0 In
FLAG 32 272 -2
IOPIN 32 272 In
FLAG 416 272 +2
IOPIN 416 272 In
FLAG -192 80 W1
IOPIN -192 80 In
SYMBOL diode 96 176 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL res 160 288 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL voltage -176 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 3 100 0 0 0)
SYMBOL diode 256 176 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL diode 112 432 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D3
SYMATTR Value 1N914
SYMBOL diode 272 432 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D4
SYMATTR Value 1N914
TEXT -208 -56 Left 2 ;Bridge rectifier
TEXT -216 512 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6404-4.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N004 0 SINE(0 10m 10Meg)
V2 N003 0 3.3
R1 N002 N001 400
R2 N009 N008 400
R3 N001 N004 100
R4 N008 0 100
C1 N006 0 .1
XU1 N008 N006 N003 N009 N002 0 N003 N001 N005 N007 LTC6404-4 ;pnba IN-)Vocm)V+)OUT+)OUT-)V-)_SHDN)IN+)OUTF-)OUTF+
.tran 1u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6404-4.asy)
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 732
WIRE 208 -48 32 -48
WIRE 416 -48 288 -48
WIRE 192 32 128 32
WIRE 528 32 192 32
WIRE 128 48 128 32
WIRE 192 48 192 32
WIRE 528 48 528 32
WIRE 416 96 416 -48
WIRE 416 96 384 96
WIRE -304 144 -368 144
WIRE -144 144 -224 144
WIRE 32 144 32 -48
WIRE 32 144 -64 144
WIRE 80 144 32 144
WIRE 528 144 528 128
WIRE 416 160 384 160
WIRE -16 192 -32 192
WIRE 80 192 48 192
WIRE 416 224 384 224
WIRE -144 240 -192 240
WIRE 32 240 -64 240
WIRE 80 240 32 240
WIRE 416 288 384 288
WIRE 192 368 192 336
WIRE 32 432 32 240
WIRE 208 432 32 432
WIRE 416 432 416 288
WIRE 416 432 288 432
FLAG -32 192 0
FLAG -368 144 0
FLAG 528 144 0
FLAG -192 240 0
FLAG 192 368 0
SYMBOL voltage -208 144 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 32 56 VTop 2
WINDOW 39 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10m 10Meg)
SYMBOL voltage 528 32 R0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL res 304 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 400
SYMBOL res 304 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 400
SYMBOL res -48 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL res -48 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL cap 48 176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL LTC6404-4 208 192 R0
SYMATTR InstName U1
TEXT 592 376 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\17365492cc70_Fig9_31.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 0 N_50n l=100n w=2.5u
VGS N002 0 350m
VDS N001 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VDS 0 1 1m
.lib cmosedu_models.txt
* Plot Id(M1)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 288 208 288 192
WIRE 288 304 288 288
WIRE 400 192 288 192
WIRE 448 112 448 80
WIRE 448 224 448 208
WIRE 496 160 448 160
WIRE 640 80 448 80
WIRE 640 112 640 80
WIRE 640 224 640 192
FLAG 288 304 0
FLAG 448 224 0
FLAG 640 224 0
FLAG 496 160 0
SYMBOL nmos4 400 112 R0
WINDOW 0 59 18 Left 0
WINDOW 3 64 75 Left 0
WINDOW 123 64 103 Left 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=100n w=2.5u
SYMBOL voltage 288 192 R0
WINDOW 0 -90 57 Left 0
WINDOW 3 -90 85 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 350m
SYMBOL voltage 640 96 R0
WINDOW 0 41 55 Left 0
WINDOW 3 41 83 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 0
TEXT 384 272 Left 0 !.dc VDS 0 1 1m
TEXT 384 296 Left 0 !.lib cmosedu_models.txt
TEXT 488 56 Left 0 ;Plot Id(M1)
* Z:\home\khalils\Downloads\files\data\raw_asc\3b826e4cc36f_TYPE2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 {R1}
C1 ve N002 {C1}
C2 ve N001 {C2}
B1 N003 0 V=V(fb)
R2 N001 N003 {R2}
XU1 ref N001 +V -V ve level2 Avol={avol} GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V2 +V 0 {vh}
V3 -V 0 {vl}
.lib opamp.sub
.param g=1
.param fz1=1k
.param fp1=20k
.param vh=5
.param vl=0
.param avol=100k
.param R1=({R2}*{g})
.param C1=1/(2*PI*{R1}*{fz1})
.param C2=1/(2*PI*{R1}*{fp1})
* Type 2 Compensator
.param R2=100k
* target gain at fz1\nzero frequency(Hz)\npole frequency(Hz)\nmax ouput voltage(V)\nmin output voltage(V)\nopen loop gain
* feedback
* reference
.ic V(ve)=0
* 2024-12-29
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1008 680
WIRE 464 -144 464 -160
WIRE 576 -144 576 -160
WIRE 464 -48 464 -64
WIRE 576 -48 576 -64
WIRE 192 -32 96 -32
WIRE 368 -32 256 -32
WIRE 96 64 96 -32
WIRE 144 64 96 64
WIRE 256 64 224 64
WIRE 368 64 368 -32
WIRE 368 64 320 64
WIRE 240 128 240 112
WIRE -208 144 -272 144
WIRE -32 144 -144 144
WIRE 96 144 96 64
WIRE 96 144 48 144
WIRE 208 144 96 144
WIRE 368 160 368 64
WIRE 368 160 272 160
WIRE 880 160 368 160
WIRE -144 176 -144 144
WIRE 208 176 128 176
WIRE 240 208 240 192
WIRE -144 272 -144 256
WIRE 128 336 128 176
WIRE 128 336 -256 336
FLAG -272 144 fb
IOPIN -272 144 In
FLAG -256 336 ref
IOPIN -256 336 In
FLAG -144 272 0
FLAG 880 160 ve
IOPIN 880 160 Out
FLAG 576 -48 0
FLAG 464 -48 0
FLAG 464 -160 +V
FLAG 576 -160 -V
FLAG 240 112 +V
FLAG 240 208 -V
SYMBOL res 240 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL cap 320 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {C1}
SYMBOL cap 256 -48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {C2}
SYMBOL bv -144 160 R0
SYMATTR InstName B1
SYMATTR Value V=V(fb)
SYMBOL res 64 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL UniversalOpAmp2 240 160 R0
WINDOW 123 34 49 Left 2
WINDOW 39 36 78 Left 2
WINDOW 40 32 106 Left 2
SYMATTR Value2 Avol={avol} GBW=10Meg Slew=10Meg
SYMATTR InstName U1
SYMBOL voltage 464 -160 R0
SYMATTR InstName V2
SYMATTR Value {vh}
SYMBOL voltage 576 -160 R0
SYMATTR InstName V3
SYMATTR Value {vl}
TEXT 272 184 Left 2 !.lib opamp.sub
TEXT -336 -224 Left 2 !.param g=1\n.param fz1=1k\n.param fp1=20k\n.param vh=5\n.param vl=0\n.param avol=100k
TEXT 416 72 Left 2 !.param R1=({R2}*{g})\n.param C1=1/(2*PI*{R1}*{fz1})\n.param C2=1/(2*PI*{R1}*{fp1})
TEXT -352 -288 Left 4 ;Type 2 Compensator
TEXT -80 208 Left 2 !.param R2=100k
TEXT -104 -224 Left 2 ;target gain at fz1\nzero frequency(Hz)\npole frequency(Hz)\nmax ouput voltage(V)\nmin output voltage(V)\nopen loop gain
TEXT -312 112 Left 2 ;feedback
TEXT -312 304 Left 2 ;reference
TEXT 656 176 Left 2 !.ic V(ve)=0
TEXT 448 -264 Left 2 ;2024-12-29
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6275.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6275.asy)
XU1 0 N002 +V -V N003 LT6275 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -15
V1 +V 0 15
R2 N002 N001 1K
R1 N003 N002 1K
V3 N001 0 SINE(0 10 3Meg)
.tran 10u
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -112 0 -112
WIRE 256 -112 224 -112
WIRE 288 -112 256 -112
WIRE 416 -112 368 -112
WIRE 0 -96 0 -112
WIRE -336 -80 -336 -96
WIRE -176 -80 -176 -96
WIRE 0 0 0 -16
WIRE 336 0 336 -16
WIRE -336 16 -336 0
WIRE -176 16 -176 0
WIRE 256 16 256 -112
WIRE 304 16 256 16
WIRE 416 32 416 -112
WIRE 416 32 368 32
WIRE 304 48 288 48
WIRE 336 80 336 64
SYMBOL voltage -176 -96 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 240 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 0 -112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 10 3Meg)
SYMBOL LT6275 336 32 R0
SYMATTR InstName U1
SYMBOL res 384 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -336 -96 R0
SYMATTR InstName V1
SYMATTR Value 15
FLAG -336 16 0
FLAG -176 16 0
FLAG -336 -96 +V
FLAG -176 -96 -V
FLAG 336 -16 +V
FLAG 336 80 -V
FLAG 0 0 0
FLAG 288 48 0
TEXT 432 136 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6655LN-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LTC6655LN-5.asy)
C2 N001 0 10
C1 OUT 0 10
V1 IN 0 5.5
XU1 IN IN 0 N001 OUT LTC6655LN-5 ;pnba _SHDN)IN)GND)NR)OUT_F
.tran 50m startup
.lib LTC6655LN-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 144 0 144
WIRE 96 144 32 144
WIRE 112 144 96 144
WIRE 528 144 400 144
WIRE 560 144 528 144
WIRE 0 160 0 144
WIRE 560 160 560 144
WIRE 96 208 96 144
WIRE 112 208 96 208
WIRE 448 208 400 208
WIRE 448 224 448 208
WIRE 0 256 0 240
WIRE 256 272 256 240
WIRE 448 320 448 288
WIRE 560 320 560 224
SYMBOL LTC6655LN-5 256 176 R0
SYMATTR InstName U1
SYMBOL cap 544 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage 0 144 R0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL cap 432 224 R0
SYMATTR InstName C2
SYMATTR Value 10
FLAG 560 320 0
FLAG 448 320 0
FLAG 256 272 0
FLAG 0 256 0
FLAG 32 144 IN
FLAG 528 144 OUT
TEXT 168 352 Left 2 !.tran 50m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2b5c5eb908d4_mpbne.asc
* Generated by LTspice 26.0.1 for Windows.
Rg N002 N001 10k
Vin Vin 0 0
R1 Vref N003 10k
Rf Vout N002 10k
XU2 N001 N003 N001 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R2 N003 0 2.5k
V1 Vref 0 5
XU1 N002 Vin Vout opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
.dc Vin -1 1 0.01
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 800
WIRE -304 -64 -384 -64
WIRE -304 -32 -304 -64
WIRE -32 -16 -160 -16
WIRE -160 48 -160 -16
WIRE -128 48 -160 48
WIRE -32 64 -32 -16
WIRE -32 64 -64 64
WIRE 0 64 -32 64
WIRE 144 64 80 64
WIRE 176 64 144 64
WIRE 320 64 256 64
WIRE -304 80 -304 48
WIRE -128 80 -304 80
WIRE -304 112 -304 80
WIRE 144 160 144 64
WIRE 176 160 144 160
WIRE 320 176 320 64
WIRE 320 176 240 176
WIRE 416 176 320 176
WIRE 176 192 144 192
WIRE -304 224 -304 192
WIRE 144 272 144 192
WIRE 144 272 -112 272
WIRE -32 512 -32 480
WIRE 64 512 64 480
WIRE -32 624 -32 592
WIRE 64 624 64 592
SYMBOL voltage -32 496 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -320 -48 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 96 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rg
SYMATTR Value 10k
SYMBOL Opamps\\opamp -96 0 R0
SYMATTR InstName U2
SYMBOL res -320 96 R0
SYMATTR InstName R2
SYMATTR Value 2.5k
SYMBOL voltage 64 496 R0
SYMATTR InstName Vin
SYMATTR Value 0
SYMBOL Opamps\\opamp 208 112 R0
SYMATTR InstName U1
SYMBOL res 272 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rf
SYMATTR Value 10k
FLAG -32 480 Vref
FLAG -32 624 0
FLAG 64 624 0
FLAG -384 -64 Vref
FLAG 416 176 Vout
FLAG -304 224 0
FLAG -112 272 Vin
FLAG 64 480 Vin
TEXT -64 752 Left 2 !.dc Vin -1 1 0.01
TEXT -64 720 Left 2 !.lib opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\069372ce48f3_Aufgabe_2.2.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 0 10e6
XU1 N002 out V+ V- out LM324 ;pnba In+)In-)V+)V-)OUT
V2 0 V- 10
R1 N001 N002 10e6
V1 V+ 0 10
V3 N001 0 10
.include LM324.txt
.tran 20m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 -32 -80 -32
WIRE 560 32 560 16
WIRE 32 48 32 -32
WIRE 304 48 128 48
WIRE 560 48 560 32
WIRE -80 96 -80 -32
WIRE 192 112 192 96
WIRE 128 128 128 48
WIRE 160 128 128 128
WIRE 288 144 224 144
WIRE 304 144 304 48
WIRE 304 144 288 144
WIRE 560 144 560 128
WIRE 560 144 512 144
WIRE 32 160 32 128
WIRE 160 160 32 160
WIRE 512 160 512 144
WIRE 32 176 32 160
WIRE 560 176 560 144
WIRE 192 208 192 176
WIRE -80 256 -80 176
WIRE 32 256 -80 256
WIRE -80 272 -80 256
WIRE 32 272 32 256
WIRE 560 272 560 256
WIRE 560 288 560 272
SYMBOL voltage 560 32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL Opamps\\opamp2 192 80 R0
SYMATTR InstName U1
SYMATTR Value LM324
SYMBOL voltage -80 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL voltage 560 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 10
SYMBOL res 16 32 R0
SYMATTR InstName R1
SYMATTR Value 10e6
SYMBOL res 16 160 R0
SYMATTR InstName R2
SYMATTR Value 10e6
FLAG 512 160 0
FLAG 560 32 V+
FLAG 560 272 V-
FLAG 192 96 V+
FLAG 192 208 V-
FLAG 288 144 out
FLAG -80 272 0
TEXT 616 -48 Left 2 !.include LM324.txt
TEXT -112 336 Left 2 !.tran 20m
* Z:\home\khalils\Downloads\files\data\raw_asc\049d30d04b43_AD8642.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8642.asy)
R2 OUT N001 10K
R1 N001 0 10K
XU1 IN N001 +V -V OUT AD8642 ;pnba In+)In-)V+)V-)OUT
Rload OUT 0 10K
Vin IN 0 SINE(0 1 100K)
V2 -V 0 -12
V1 +V 0 12
.tran 100u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 176 -1152 176 -1168
WIRE 288 -1152 288 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 176 -1056 176 -1072
WIRE 288 -1056 288 -1072
WIRE 576 -1056 576 -1072
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL Opamps\\AD8642 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 288 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL voltage 176 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100K)
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 576 -1056 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 176 -1168 +V
FLAG 288 -1168 -V
FLAG 288 -1056 0
FLAG 176 -1056 0
TEXT 728 -936 Left 2 !.tran 100u