Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\0c083d9f6583_wien1_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V1 VCC 0 10
R2 out N001 110k
R4 0 N002 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 684
WIRE 160 128 112 128
WIRE 96 192 80 192
WIRE 32 208 32 128
WIRE 32 208 0 208
WIRE 48 208 32 208
WIRE -80 224 -80 208
WIRE 160 224 160 128
WIRE 160 224 112 224
WIRE 176 224 160 224
WIRE 192 224 176 224
WIRE -208 240 -240 240
WIRE -192 240 -208 240
WIRE 48 240 16 240
WIRE -240 256 -240 240
WIRE 96 256 80 256
WIRE -240 352 -240 336
WIRE -208 352 -240 352
WIRE -240 368 -240 352
WIRE 16 368 16 240
WIRE 16 368 -80 368
WIRE 32 368 16 368
WIRE 176 368 176 224
WIRE -80 384 -80 368
WIRE 16 400 16 368
WIRE -64 464 -80 464
WIRE 16 464 -64 464
WIRE -240 480 -240 448
WIRE -208 480 -240 480
WIRE -192 480 -208 480
WIRE -64 480 -64 464
SYMBOL voltage -240 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 31 38 Left 0
WINDOW 3 33 68 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 128 112 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 110k
SYMBOL res -64 480 R180
WINDOW 0 36 76 Left 0
WINDOW 3 36 40 Left 0
SYMATTR InstName R4
SYMATTR Value 10k
FLAG -64 480 0
FLAG -80 224 0
FLAG -208 352 0
FLAG -208 240 VCC
FLAG -208 480 Vee
FLAG 96 192 VCC
FLAG 96 256 Vee
FLAG 192 224 out
* Z:\home\khalils\Downloads\files\data\raw_asc\2a917a6260ed_Draft4.asc
* Generated by LTspice 26.0.1 for Windows.
Vin N001 0 48
M4 N002 S23 0 0 NMOS
V2 control 0 SINE(5 5 50)
M1 N003 S14 0 0 NMOS
R1 N002 N003 24
B2 S14 0 v=if(v(control)<v(carrier),10,0)
M3 N001 S14 N002 N002 NMOS
B1 S23 0 v=if(v(control)>=v(carrier),10,0)
V3 carrier 0 PULSE(0 10 0 50u 50u 0ms 100u)
M2 N001 S23 N003 N003 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 200u 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2076 900
WIRE 112 -880 48 -880
WIRE 400 -880 336 -880
WIRE 48 -800 48 -880
WIRE 336 -800 336 -880
WIRE 48 -656 48 -720
WIRE 336 -656 336 -720
WIRE 112 -560 48 -560
WIRE 400 -560 336 -560
WIRE 48 -480 48 -560
WIRE 336 -480 336 -560
WIRE 48 -336 48 -400
WIRE 336 -336 336 -400
WIRE 576 -224 144 -224
WIRE 144 -112 144 -224
WIRE 144 -112 -48 -112
WIRE 336 -112 144 -112
WIRE 336 -96 336 -112
WIRE -48 -80 -48 -112
WIRE 288 -16 208 -16
WIRE -96 0 -176 0
WIRE -48 32 -48 16
WIRE 704 32 -48 32
WIRE 704 48 704 32
WIRE 336 128 336 0
WIRE 704 128 336 128
WIRE -48 144 -48 32
WIRE 336 144 336 128
WIRE -96 224 -176 224
WIRE 288 224 208 224
WIRE -48 256 -48 240
WIRE 128 256 -48 256
WIRE 336 256 336 240
WIRE 336 256 128 256
WIRE 128 320 128 256
SYMBOL bv 48 -496 R0
WINDOW 3 -191 210 Left 2
SYMATTR Value v=if(v(control)<v(carrier),10,0)
SYMATTR InstName B2
SYMBOL nmos -96 -80 R0
SYMATTR InstName M3
SYMBOL nmos -96 144 R0
SYMATTR InstName M4
SYMBOL nmos 288 -96 R0
SYMATTR InstName M2
SYMBOL bv 336 -496 R0
WINDOW 3 -71 210 Left 2
SYMATTR Value v=if(v(control)>=v(carrier),10,0)
SYMATTR InstName B1
SYMBOL nmos 288 144 R0
SYMATTR InstName M1
SYMBOL res 688 32 R0
SYMATTR InstName R1
SYMATTR Value 24
SYMBOL voltage 48 -816 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(5 5 50)
SYMBOL voltage 336 -816 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 10 0 50u 50u 0ms 100u)
SYMBOL voltage 576 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 48
FLAG 128 320 0
FLAG 576 -144 0
FLAG -176 0 S14
FLAG 208 224 S14
FLAG 208 -16 S23
FLAG -176 224 S23
FLAG 48 -656 0
FLAG 112 -880 control
FLAG 48 -336 0
FLAG 112 -560 S14
FLAG 336 -336 0
FLAG 400 -560 S23
FLAG 336 -656 0
FLAG 400 -880 carrier
TEXT 488 200 Left 2 !.tran 0 200u 0
* Z:\home\khalils\Downloads\files\data\raw_asc\111eab4633e4___RC.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 AC 1
C1 Out 0 {mc(10n,0.2)}
R1 Out IN {mc(1k,0.05)}
.meas ac Fc_0 when mag(-3dB)
.step param X 0 999 1
.ac dec 1000 1k 100k
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 80 112 80
WIRE 304 80 272 80
WIRE 432 80 304 80
WIRE 112 112 112 80
WIRE 304 112 304 80
WIRE 112 240 112 192
WIRE 304 240 304 176
SYMBOL cap 288 112 R0
SYMATTR InstName C1
SYMATTR Value {mc(10n,0.2)}
SYMBOL res 288 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 -61 62 VTop 2
SYMATTR InstName R1
SYMATTR Value {mc(1k,0.05)}
SYMBOL voltage 112 96 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
FLAG 112 240 0
FLAG 304 240 0
FLAG 304 80 Out
FLAG 112 80 IN
TEXT 120 328 Left 2 !.meas ac Fc_0 when mag(-3dB)
TEXT 120 360 Left 2 !.step param X 0 999 1
TEXT 120 392 Left 2 !.ac dec 1000 1k 100k
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4660.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4660.asy)
C3 OUT 0 150
V1 IN 0 48
C4 N008 0 10n
C5 N002 0 0.47
R1 0 N009 4.32K
Rload OUT 0 0.499
XU1 NC_01 NC_02 NC_03 NC_04 NC_05 N002 N008 N001 N003 N010 N005 OUT N009 N010 MP_06 NC_07 MP_08 MP_09 N001 N007 MP_10 MP_11 MP_12 MP_13 N006 N006 IN IN N004 MP_14 MP_15 MP_16 0 LTM4660 ;pnba Mode_PLLin)Clkout)Run)_Fault)Pgood)Timer)SS)ExtRef)Hys_prgm)CompA)Freq)Vout)Vfb)CompB))ExtVcc)))IntVcc)C-)))))Mid)Mid_sense)Vin_sense)Vin)C+))))Gnd
C1 N004 N007 10 m=12
R3 N003 0 100K
R2 N005 0 61.9K
C2 N006 0 10 m=12
.tran 0 960m 958m startup
.lib LTM4660.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 924 724
WIRE 0 -448 -336 -448
WIRE 0 -384 0 -448
WIRE -240 -320 -272 -320
WIRE -128 -320 -176 -320
WIRE 432 -320 384 -320
WIRE 576 -320 432 -320
WIRE 576 -304 576 -320
WIRE 432 -224 432 -320
WIRE 432 -224 384 -224
WIRE 576 -208 576 -224
WIRE -240 -128 -272 -128
WIRE -128 -128 -160 -128
WIRE 592 -128 384 -128
WIRE -240 -32 -272 -32
WIRE -128 -32 -160 -32
WIRE 432 -32 384 -32
WIRE 496 -32 432 -32
WIRE 496 -16 496 -32
WIRE 592 -16 592 -128
WIRE 432 64 432 -32
WIRE 432 64 384 64
WIRE 496 112 496 48
WIRE 592 160 592 48
WIRE 592 160 384 160
WIRE -336 256 -336 -448
WIRE -128 256 -336 256
WIRE 576 256 384 256
WIRE 672 256 576 256
WIRE 576 288 576 256
WIRE 672 288 672 256
WIRE 576 384 576 352
WIRE 672 384 672 368
WIRE -240 448 -288 448
WIRE -128 448 -176 448
WIRE 416 448 384 448
WIRE 528 448 496 448
WIRE 128 528 128 512
WIRE 0 560 0 512
WIRE 256 560 256 512
WIRE 256 560 0 560
SYMBOL res 512 432 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 4.32K
SYMBOL res -144 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 480 -16 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 m=12
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL voltage 576 -320 R0
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL res -144 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 61.9K
SYMBOL res 656 272 R0
SYMATTR InstName Rload
SYMATTR Value 0.499
SYMBOL cap -176 -336 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 0.47
SYMBOL cap 560 288 R0
SYMATTR InstName C3
SYMATTR Value 150
SYMBOL cap -176 432 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 10n
SYMBOL LTM4660 128 64 R0
SYMATTR InstName U1
SYMBOL cap 576 -16 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 m=12
SYMATTR InstName C1
SYMATTR Value 10
FLAG 576 -208 0
FLAG 496 112 0
FLAG 576 384 0
FLAG 528 448 0
FLAG 128 528 0
FLAG -288 448 0
FLAG -272 -32 0
FLAG -272 -128 0
FLAG 672 384 0
FLAG 672 256 OUT
FLAG 576 -320 IN
FLAG -272 -320 0
TEXT 512 568 Left 2 !.tran 0 960m 958m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1949-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1949-1.asy)
D1 N001 OUT MBRS130L
R4 IN N002 1Meg
C2 OUT 0 10
V1 IN 0 3.3
R3 N003 0 140K
XU1 N006 N003 N005 0 N001 IN N004 N002 LT1949-1 ;pnba Vc)FB)_SHDN)GND)SW)Vin)LBI)LBO
L1 IN N001 10
R1 N006 N007 68K
Rload OUT 0 57.5
R2 OUT N003 1Meg
C1 N007 0 330p
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib LT1949-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2700 680
WIRE 1728 128 1616 128
WIRE 1888 128 1728 128
WIRE 1936 128 1888 128
WIRE 2048 128 2016 128
WIRE 2112 128 2048 128
WIRE 2272 128 2176 128
WIRE 2384 128 2272 128
WIRE 2496 128 2384 128
WIRE 1616 144 1616 128
WIRE 2384 144 2384 128
WIRE 2496 144 2496 128
WIRE 1728 176 1728 128
WIRE 2272 176 2272 128
WIRE 1888 224 1888 128
WIRE 2048 224 2048 128
WIRE 1616 240 1616 224
WIRE 2384 240 2384 208
WIRE 2496 240 2496 224
WIRE 1728 304 1728 256
WIRE 1824 304 1728 304
WIRE 2272 304 2272 256
WIRE 2272 304 2112 304
WIRE 2272 320 2272 304
WIRE 1824 368 1808 368
WIRE 2272 416 2272 400
WIRE 1824 432 1808 432
WIRE 2128 432 2112 432
WIRE 2224 432 2208 432
WIRE 2224 448 2224 432
WIRE 2224 528 2224 512
WIRE 1968 560 1968 512
SYMBOL res 2256 160 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL RES 2112 448 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 68K
SYMBOL res 2256 304 R0
SYMATTR InstName R3
SYMATTR Value 140K
SYMBOL res 2480 128 R0
SYMATTR InstName Rload
SYMATTR Value 57.5
SYMBOL schottky 2112 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS130L
SYMBOL cap 2208 448 R0
SYMATTR InstName C1
SYMATTR Value 330p
SYMBOL VOLTAGE 1616 128 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 1712 160 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL ind 1920 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL cap 2368 144 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL PowerProducts\\LT1949-1 1968 368 R0
SYMATTR InstName U1
FLAG 1968 560 0
FLAG 2224 528 0
FLAG 2272 416 0
FLAG 2384 240 0
FLAG 1616 240 0
FLAG 2496 240 0
FLAG 1616 128 IN
FLAG 2496 128 OUT
TEXT 2384 480 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\459697b69d18_Fig_3-52_Ex_Machine-1.asc
* Generated by LTspice 26.0.1 for Windows.
* * inverter state machine example \n V1 1 0 pulse(0 1 0 1u 1u .5m 1m) \n R1 2 0 1K ; an impedance for the .output statement \n .machine \n .output (2) V(1) < .5 \n .endmachine \n .tran 3m \n .end
R1 2 0 1k
V1 1 0 pulse(0 1 0 1u 1u .5m 1m)
C1 2 0 10n
.machine
.output (2) V(1) < .5
.endmachine
.tran 3m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 948
WIRE 64 368 32 368
WIRE 512 368 432 368
WIRE 544 368 512 368
WIRE 32 416 32 368
WIRE 432 416 432 368
WIRE 512 432 512 368
WIRE 32 528 32 496
WIRE 432 528 432 496
WIRE 512 528 512 496
SYMBOL voltage 32 400 R0
SYMATTR InstName V1
SYMATTR Value pulse(0 1 0 1u 1u .5m 1m)
SYMBOL cap 496 432 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 416 400 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 32 528 0
FLAG 64 368 1
FLAG 432 528 0
FLAG 544 368 2
FLAG 512 528 0
TEXT 8 720 Left 2 ;* inverter state machine example \n   V1 1 0 pulse(0 1 0 1u 1u .5m 1m) \n   R1 2 0 1K ; an impedance for the .output statement \n   .machine \n   .output (2) V(1) < .5 \n   .endmachine \n   .tran 3m \n   .end
TEXT 32 600 Left 2 !.machine \n.output (2) V(1) < .5 \n.endmachine
TEXT 408 584 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\00a91554a37a_StageB_LowPassSallenKey_LT6003.asc
* Generated by LTspice 26.0.1 for Windows.
* This subcircuit is not simulatable. \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6003.asy)
R1 N001 IN 330k
R2 N002 N001 680k
XU1 N002 OUT V+ V- OUT LT6003 ;pnba IN+)IN-)VCC)VEE)OUT
C1 OUT N001 68n
C2 N002 REF 4.7n
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4112 860
WIRE 512 -128 240 -128
WIRE 320 64 320 -32
WIRE 320 112 320 64
WIRE 240 128 240 -128
WIRE 288 128 288 112
WIRE 288 128 240 128
WIRE 304 128 288 128
WIRE 432 144 352 144
WIRE 512 144 512 -128
WIRE 512 144 432 144
WIRE -160 160 -176 160
WIRE -128 160 -160 160
WIRE -16 160 -48 160
WIRE 16 160 -16 160
WIRE 144 160 96 160
WIRE 288 160 144 160
WIRE 304 160 288 160
WIRE 512 160 512 144
WIRE 576 160 512 160
WIRE 608 160 576 160
WIRE 288 176 288 160
WIRE 144 192 144 160
WIRE 320 224 320 176
WIRE 144 272 144 256
WIRE 320 336 320 224
WIRE -16 400 -16 160
WIRE 176 400 -16 400
WIRE 512 400 512 160
WIRE 512 400 240 400
SYMBOL Opamps\\LT6003 320 144 R0
SYMATTR InstName U1
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 680k
SYMBOL res -32 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 330k
SYMBOL cap 240 384 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 68n
SYMBOL cap 128 192 R0
SYMATTR InstName C2
SYMATTR Value 4.7n
FLAG 320 -32 V+
FLAG 320 336 V-
FLAG 576 160 OUT
FLAG -160 160 IN
FLAG 144 272 REF
TEXT -176 504 Left 4 ;This subcircuit is not simulatable.  \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4896-2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
Vin IN 0 SINE(0 1 10K)
R1 N001 0 249
R2 OUT N001 249
V2 -V 0 -5
Rload OUT 0 10K
XU1 IN N001 +V -V OUT ADA4896-2 ;pnba In+)In-)V+)V-)OUT
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4896-2.asy)
.lib ADA4896-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1168 144 -1184
WIRE 256 -1168 256 -1184
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 144 -1072 144 -1088
WIRE 256 -1072 256 -1088
WIRE 432 -1072 432 -1088
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
FLAG 144 -1184 +V
FLAG 144 -1072 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1184 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 256 -1072 0
SYMBOL voltage 144 -1184 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 249
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 249
SYMBOL voltage 256 -1184 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL ADA4896-2 576 -1168 R0
WINDOW 3 24 91 Left 2
SYMATTR InstName U1
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\2c9605364dc6_transformer_sim.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N004 0 10
K L1 L3 0.99925
R1 0 N003 1
L1 N004 N002 .65
L3 0 N003 .00492
V1 N001 0 SINE(0 3.45 1k) Rser=0.000001
R2 N002 N001 10
.tran .0001 .100
.meas REP MAX((V(N001) - V(N002)) / I(R2))
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1064 680
WIRE 256 240 176 240
WIRE 480 240 336 240
WIRE 800 240 640 240
WIRE 960 240 880 240
WIRE 176 288 176 240
WIRE 480 288 480 240
WIRE 640 288 640 240
WIRE 176 432 176 368
WIRE 240 432 176 432
WIRE 480 432 480 368
WIRE 480 432 336 432
WIRE 640 432 640 368
WIRE 960 432 960 240
WIRE 960 432 640 432
WIRE 336 448 336 432
WIRE 176 464 176 432
WIRE 640 464 640 432
WIRE 640 464 416 464
WIRE 240 560 240 432
WIRE 336 560 336 528
WIRE 336 560 240 560
WIRE 416 560 416 464
WIRE 416 560 336 560
SYMBOL res 320 432 R0
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL Res 896 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL Voltage 176 272 R0
SYMATTR InstName V1
SYMATTR Value SINE(0 3.45 1k)
SYMATTR SpiceLine Rser=0.000001
SYMBOL ind2 656 384 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L3
SYMATTR Value .00492
SYMATTR Type ind
SYMBOL Res 352 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL ind2 496 384 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value .65
SYMATTR Type ind
FLAG 176 464 0
TEXT 504 256 Left 2 !K L1 L3 0.99925
TEXT 480 504 Left 2 !.tran .0001 .100
TEXT 448 576 Left 2 !.meas REP MAX((V(N001) - V(N002)) / I(R2))
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1377.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1377.asy)
XU1 N005 N003 N006 N002 IN MP_01 0 N001 LT1377 ;pnba Vc)FB)NFB)_SHDN)Vin))GND)SW
D1 N001 OUT MBRS340
C4 0 N004 .047
R1 OUT N003 53.6K
C5 OUT 0 .1
R2 N003 0 6.19K
L1 IN N001 4.7 Rser=0.02 Rpar=5000
R3 N004 N005 2K
C2 OUT 0 22 Rser=.05
C3 0 N005 .0047
V1 IN 0 5
Rload OUT 0 50
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LT1377.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2820 1384
WIRE 1824 864 1584 864
WIRE 1888 864 1824 864
WIRE 2016 864 1968 864
WIRE 2064 864 2016 864
WIRE 2192 864 2128 864
WIRE 2304 864 2192 864
WIRE 2384 864 2304 864
WIRE 2464 864 2384 864
WIRE 1584 880 1584 864
WIRE 2304 880 2304 864
WIRE 2384 880 2384 864
WIRE 2464 880 2464 864
WIRE 1824 928 1824 864
WIRE 1584 976 1584 960
WIRE 2192 976 2192 864
WIRE 2304 976 2304 944
WIRE 2384 976 2384 944
WIRE 2464 976 2464 960
WIRE 1680 992 1664 992
WIRE 2016 992 2016 864
WIRE 2016 992 1968 992
WIRE 2192 1072 2192 1056
WIRE 2192 1072 1968 1072
WIRE 2192 1088 2192 1072
WIRE 1504 1152 1456 1152
WIRE 1616 1152 1584 1152
WIRE 1680 1152 1616 1152
WIRE 2000 1152 1968 1152
WIRE 1456 1184 1456 1152
WIRE 1616 1184 1616 1152
WIRE 2192 1184 2192 1168
WIRE 1824 1232 1824 1216
WIRE 1456 1264 1456 1248
WIRE 1616 1264 1616 1248
SYMBOL CAP 1440 1248 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C4
SYMATTR Value .047
SYMBOL VOLTAGE 1584 864 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL CAP 2368 880 R0
SYMATTR InstName C5
SYMATTR Value .1
SYMBOL CAP 1600 1248 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value .0047
SYMBOL polcap 2288 880 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMATTR SpiceLine Rser=.05
SYMBOL RES 2176 960 R0
SYMATTR InstName R1
SYMATTR Value 53.6K
SYMBOL RES 1488 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 2K
SYMBOL IND 1872 880 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL RES 2448 864 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL POWERPRODUCTS\\LT1377 1824 1072 R0
SYMATTR InstName U1
SYMBOL schottky 2064 880 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMBOL RES 2176 1072 R0
SYMATTR InstName R2
SYMATTR Value 6.19K
FLAG 2464 864 OUT
FLAG 2192 1184 0
FLAG 2304 976 0
FLAG 2464 976 0
FLAG 1456 1264 0
FLAG 1824 1232 0
FLAG 1584 976 0
FLAG 1616 1264 0
FLAG 2384 976 0
FLAG 1584 864 IN
TEXT 2112 1248 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\46707cacbc79_Input_Voltage_Polarity_Protection.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N003 N002 1N5819
V1 N001 0 -5.5
R1 N003 0 100
M1 N001 N003 N002 N002 PMOS
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 5 0.1 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 64 0 64
WIRE 304 64 272 64
WIRE 384 64 304 64
WIRE 304 80 304 64
WIRE 0 96 0 64
WIRE 256 176 256 112
WIRE 304 176 304 144
WIRE 304 176 256 176
WIRE 0 288 0 176
WIRE 256 288 256 256
SYMBOL voltage 0 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -5.5
SYMBOL res 240 160 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL schottky 320 144 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMATTR Description Zener Diode
SYMATTR Type zener
SYMBOL pmos 176 112 R270
SYMATTR InstName M1
FLAG 256 288 0
FLAG 0 288 0
TEXT -34 312 Left 2 !.tran 0 5 0.1 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\f59468032ddf_LT1006A.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain 100 Amplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1006A.asy)
R3 OUT 0 660
R1 OUT N001 99K
V3 IN 0 SINE(5m 1m 1K)
XU1 IN N001 +V 0 OUT LT1006 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
R2 N001 0 1K
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 112 16 112
WIRE 128 112 112 112
WIRE 160 112 128 112
WIRE 272 112 240 112
WIRE 192 208 192 192
WIRE 128 224 128 112
WIRE 160 224 128 224
WIRE -80 240 -80 224
WIRE 272 240 272 112
WIRE 272 240 224 240
WIRE 336 240 272 240
WIRE 160 256 48 256
WIRE 336 256 336 240
WIRE 48 272 48 256
WIRE 192 288 192 272
WIRE -80 336 -80 320
WIRE 336 352 336 336
WIRE 48 368 48 352
SYMBOL voltage 48 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(5m 1m 1K)
SYMBOL opamps\\LT1006A 192 176 R0
SYMATTR InstName U1
SYMBOL res 320 240 R0
SYMATTR InstName R3
SYMATTR Value 660
SYMBOL voltage -80 224 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 99K
FLAG -80 336 0
FLAG 192 192 +V
FLAG -80 224 +V
FLAG 16 112 0
FLAG 48 368 0
FLAG 192 288 0
FLAG 336 352 0
FLAG 336 240 OUT
FLAG 48 256 IN
TEXT 288 400 Left 2 !.tran 3m
TEXT 152 56 Bottom 2 ;Gain 100 Amplifier