Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0cd889f7a538_Input_Notch.asc
* Generated by LTspice 26.0.1 for Windows.
XU5 N004 0 Vout opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
V2 N007 0 SINE(0 1 1k) AC AC 1
R6 N003 N001 10k
R3 0 N006 16k
R4 N007 N005 16k
C1 Vout N004 10n
C3 N004 N007 10n
R2 N002 N001 10k
R8 N005 Vout 16k
R1 N004 N003 16k
C2 N002 N005 10n
R5 Vout N006 19k
XU4 N001 N006 N003 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
XU6 N005 0 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
.ac dec 200 1 10k
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1688 680
WIRE 368 -64 -16 -64
WIRE 896 -64 448 -64
WIRE -16 16 -16 -64
WIRE 64 16 -16 16
WIRE 160 16 144 16
WIRE 240 16 160 16
WIRE 352 16 320 16
WIRE 416 16 352 16
WIRE 528 16 480 16
WIRE 608 16 528 16
WIRE 704 16 688 16
WIRE 768 16 704 16
WIRE 896 16 896 -64
WIRE 896 16 832 16
WIRE -16 80 -16 16
WIRE 16 80 -16 80
WIRE 352 80 352 16
WIRE 352 80 256 80
WIRE 384 80 352 80
WIRE 704 80 704 16
WIRE 704 80 640 80
WIRE 736 80 704 80
WIRE 160 96 160 16
WIRE 160 96 80 96
WIRE 528 96 528 16
WIRE 528 96 448 96
WIRE 896 96 896 16
WIRE 896 96 800 96
WIRE 16 112 -16 112
WIRE 384 112 352 112
WIRE 736 112 704 112
WIRE 352 160 352 112
WIRE 704 160 704 112
WIRE -16 224 -16 112
WIRE 48 224 -16 224
WIRE 528 224 528 96
WIRE 528 224 128 224
WIRE 896 224 528 224
WIRE -16 256 -16 224
WIRE 640 256 640 80
WIRE 256 272 256 80
WIRE -16 352 -16 336
WIRE 256 352 256 336
WIRE 256 352 128 352
WIRE 640 352 640 336
WIRE 640 352 256 352
WIRE 128 400 128 352
WIRE 128 544 128 480
IOPIN 896 224 Out
SYMBOL cap 480 0 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL OpAmps\\opamp 768 32 R0
SYMATTR InstName U6
SYMBOL res 160 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 10k
SYMBOL cap 240 272 R0
SYMATTR InstName C3
SYMATTR Value 10n
SYMBOL res 0 352 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 16k
SYMBOL cap 832 0 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL OpAmps\\opamp 48 32 R0
SYMATTR InstName U4
SYMBOL res 464 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 144 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 19k
SYMBOL res 704 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R8
SYMATTR Value 16k
SYMBOL res 656 352 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 16k
SYMBOL res 336 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 16k
SYMBOL OpAmps\\opamp 416 32 R0
SYMATTR InstName U5
SYMBOL voltage 128 384 R0
WINDOW 3 -168 92 Left 2
WINDOW 123 -159 123 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 1 1k)
SYMATTR Value2 AC AC 1
SYMATTR InstName V2
FLAG 352 160 0
FLAG 704 160 0
FLAG 128 544 0
FLAG -16 352 0
FLAG 896 224 Vout
TEXT 176 512 Left 2 !.ac dec 200 1 10k
TEXT 176 488 Left 2 !.lib opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\OP492.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
R2 OUT N001 10K
XU1 IN N001 +V -V OUT OP492 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -15
Rload OUT 0 10K
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP492.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 128 -1168 128 -1184
WIRE 240 -1168 240 -1184
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 736 -1104 640 -1104
WIRE 544 -1088 384 -1088
WIRE 736 -1088 736 -1104
WIRE 128 -1072 128 -1088
WIRE 240 -1072 240 -1088
WIRE 384 -1072 384 -1088
WIRE 736 -992 736 -1008
WIRE 384 -976 384 -992
FLAG 128 -1184 +V
FLAG 128 -1072 0
FLAG 384 -976 0
FLAG 736 -1104 OUT
FLAG 384 -1088 IN
FLAG 576 -1136 +V
FLAG 240 -1184 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 736 -992 0
FLAG 240 -1072 0
SYMBOL voltage 128 -1184 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 384 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Opamps\\OP492 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 240 -1184 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 720 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\29bd96a07291_CMOS_Potential_Divider.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vout Vout 0 N001 NMOS l=5 w=15
M2 Vout Vout VDD VDD PMOS l=5 w=15
V1 VDD 0 5V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.MODEL NMOS NMOS(VT0=0.83 LAMBDA=0.06 KP=50U)
.MODEL PMOS PMOS(VT0=0.91 LAMBDA=0.06 KP=17U)
.tran 600N
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 -48 128 -64
WIRE 144 -48 128 -48
WIRE 144 16 144 -48
WIRE 144 16 128 16
WIRE 80 32 32 32
WIRE 144 64 144 16
WIRE 144 64 128 64
WIRE -176 80 -176 16
WIRE 32 128 32 32
WIRE 128 128 128 112
WIRE 128 128 32 128
WIRE 192 128 128 128
WIRE 128 160 128 128
WIRE 144 208 128 208
WIRE 32 240 32 128
WIRE 80 240 32 240
WIRE 144 240 144 208
WIRE 144 240 128 240
WIRE -176 288 -176 160
WIRE 128 336 128 256
IOPIN 192 128 Out
SYMBOL nmos4 80 160 R0
SYMATTR InstName M1
SYMATTR Value2 l=5 w=15
SYMBOL voltage -176 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5V
SYMBOL pmos4 80 112 M180
SYMATTR InstName M2
SYMATTR Value2 l=5 w=15
FLAG -176 288 0
FLAG -176 16 VDD
FLAG 128 -64 VDD
FLAG 192 128 Vout
FLAG 128 336 0
TEXT -264 -192 Left 2 !.MODEL NMOS NMOS(VT0=0.83 LAMBDA=0.06 KP=50U)\n.MODEL PMOS PMOS(VT0=0.91 LAMBDA=0.06 KP=17U)
TEXT -224 -112 Left 2 !.tran 600N
* Z:\tmp\asc_dec_bjh7r6w2\0f7f1b36d34e_AD8510_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V2 -V 0 -5
V1 +V 0 5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 448 -1088 432 -1088
WIRE 192 -992 192 -1008
WIRE 288 -992 288 -1008
WIRE 560 -944 448 -944
WIRE 448 -928 448 -944
WIRE 192 -896 192 -912
WIRE 288 -896 288 -912
WIRE 448 -832 448 -848
SYMBOL voltage 288 -1008 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 192 -1008 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 192 -1008 +V
FLAG 192 -896 0
FLAG 448 -832 0
FLAG 448 -944 IN
FLAG 288 -1008 -V
FLAG 432 -1088 0
FLAG 288 -896 0
* Z:\home\khalils\Downloads\files\data\raw_asc\66b2ef80f9c0_2960-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Configurable Regulator UVLO and Low Battery Indicator
* 6V to 8.4V
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3008-3.3.asy)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2960-1.asy)
Vbat N001 0 PWL(0 0 20 9 40 0)
XU1 N003 N003 _LOWBAT N002 0 N003 N005 N004 LTC2960-1 ;pnba Vin)RT)_RST)OUT)GND)_MR)ADJ)IN+
R2 OUT _LOWBAT 1Meg
XU2 N001 OUT OUT 0 N002 LT3008-3.3 ;pnba IN)OUT)Sense)GND)_SHDN
R3 N001 N004 5.11Meg
R6 N001 N003 10K
R1 N001 N002 10Meg
R5 N005 0 348K
R4 N004 N005 49.9K
.tran 40
.lib LT3009.lib
.lib LTC2960-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3200 984
WIRE -2576 -4928 -2864 -4928
WIRE -2464 -4928 -2576 -4928
WIRE -2160 -4928 -2464 -4928
WIRE -2032 -4928 -2160 -4928
WIRE -1696 -4928 -1744 -4928
WIRE -1632 -4928 -1696 -4928
WIRE -1616 -4928 -1632 -4928
WIRE -2864 -4912 -2864 -4928
WIRE -2464 -4912 -2464 -4928
WIRE -2160 -4912 -2160 -4928
WIRE -2032 -4832 -2048 -4832
WIRE -1696 -4832 -1696 -4928
WIRE -1696 -4832 -1744 -4832
WIRE -2864 -4816 -2864 -4832
WIRE -2464 -4816 -2464 -4832
WIRE -2320 -4816 -2464 -4816
WIRE -2192 -4816 -2320 -4816
WIRE -2160 -4816 -2160 -4832
WIRE -2048 -4816 -2048 -4832
WIRE -2048 -4816 -2160 -4816
WIRE -2320 -4800 -2320 -4816
WIRE -2576 -4768 -2576 -4928
WIRE -1632 -4768 -1632 -4928
WIRE -2464 -4752 -2464 -4816
WIRE -2432 -4752 -2464 -4752
WIRE -2192 -4752 -2192 -4816
WIRE -2192 -4752 -2208 -4752
WIRE -1888 -4736 -1888 -4768
WIRE -2576 -4640 -2576 -4688
WIRE -2432 -4640 -2576 -4640
WIRE -2160 -4640 -2160 -4816
WIRE -2160 -4640 -2208 -4640
WIRE -2576 -4624 -2576 -4640
WIRE -2576 -4528 -2576 -4544
WIRE -2432 -4528 -2576 -4528
WIRE -1632 -4528 -1632 -4688
WIRE -1632 -4528 -2208 -4528
WIRE -1616 -4528 -1632 -4528
WIRE -2576 -4512 -2576 -4528
WIRE -2320 -4448 -2320 -4480
WIRE -2576 -4416 -2576 -4432
SYMBOL res -1648 -4784 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL LTC2960-1 -2320 -4640 R0
WINDOW 0 -2 -65 Center 2
SYMATTR InstName U1
SYMBOL PowerProducts\\LT3008-3.3 -1888 -4880 R0
SYMATTR InstName U2
SYMBOL res -2592 -4528 R0
SYMATTR InstName R5
SYMATTR Value 348K
SYMBOL voltage -2864 -4928 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PWL(0 0 20 9 40 0)
SYMATTR InstName Vbat
SYMBOL res -2480 -4928 R0
SYMATTR InstName R6
SYMATTR Value 10K
SYMBOL res -2592 -4784 R0
SYMATTR InstName R3
SYMATTR Value 5.11Meg
SYMBOL res -2176 -4928 R0
SYMATTR InstName R1
SYMATTR Value 10Meg
SYMBOL res -2592 -4640 R0
SYMATTR InstName R4
SYMATTR Value 49.9K
FLAG -2864 -4816 0
FLAG -2320 -4448 0
FLAG -1616 -4528 _LOWBAT
FLAG -2576 -4416 0
FLAG -1616 -4928 OUT
FLAG -1888 -4736 0
TEXT -2192 -5008 Bottom 2 ;Configurable Regulator UVLO and Low Battery Indicator
TEXT -2864 -4928 Bottom 2 ;6V to 8.4V
TEXT -1832 -4464 Left 2 !.tran 40
* Z:\home\khalils\Downloads\files\data\raw_asc\13e01a49fd43_kino-pan.asc
* Generated by LTspice 26.0.1 for Windows.
R4 N005 N004 {Ra}
R1 N001 N003 {Rin}
R3 N002 N001 {Ra}
R6 0 N004 {Rp*(1-a) + 0.1}
R2 N004 N003 {Rin}
R7 N002 0 10k
R5 N001 0 5k
R8 N005 0 10k
V1 N003 0 SINE(0 1 1000)
.param Rin=4.7k Rp=10k Ra=0.1
.tran .01
.step param a 0.5 1 .01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 96 208 96
WIRE 384 96 320 96
WIRE 624 96 464 96
WIRE 416 176 320 176
WIRE 128 192 128 96
WIRE 128 192 -64 192
WIRE 416 192 416 176
WIRE 128 288 128 192
WIRE 320 288 320 256
WIRE 320 288 208 288
WIRE 384 288 320 288
WIRE 624 288 464 288
WIRE -64 320 -64 272
SYMBOL res 224 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {Rin}
SYMBOL res 608 272 R0
SYMATTR InstName R8
SYMATTR Value 10k
SYMBOL res 304 160 R0
SYMATTR InstName R6
SYMATTR Value {Rp*(1-a) + 0.1}
SYMBOL res 608 80 R0
SYMATTR InstName R7
SYMATTR Value 10k
SYMBOL res 480 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value {Ra}
SYMBOL res 304 80 R0
SYMATTR InstName R5
SYMATTR Value 5k
SYMBOL res 224 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {Rin}
SYMBOL res 480 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value {Ra}
SYMBOL voltage -64 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1000)
FLAG 416 192 0
FLAG 624 176 0
FLAG 624 368 0
FLAG -64 320 0
TEXT 32 -88 Left 2 !.param Rin=4.7k Rp=10k Ra=0.1
TEXT 32 -56 Left 2 !.tran .01\n.step param a 0.5 1 .01
* Z:\home\khalils\Downloads\files\data\raw_asc\0a3f4ce88a18_Fig1_11.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vin Vout 1k
Vin Vin 0 1
R2 Vout 0 2k
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 48 224 0 224
WIRE 112 224 48 224
WIRE 256 224 192 224
WIRE 288 224 256 224
WIRE 0 240 0 224
WIRE 288 240 288 224
WIRE 0 336 0 320
WIRE 288 336 288 320
SYMBOL res 272 224 R0
SYMATTR InstName R2
SYMATTR Value 2k
SYMBOL voltage 0 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 1
SYMBOL res 96 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 0 336 0
FLAG 288 336 0
FLAG 256 224 Vout
FLAG 48 224 Vin
TEXT 40 400 Left 0 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17761.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17761.asy)
Rload OUT 0 {5/0.6}
R1 OUT N005 95.3k
R2 N005 0 18.2k
L1 N001 OUT 33 Rser=10m
R4 N004 0 105k
C2 OUT 0 22 Rser=4.6m
R3 Vcc N006 10k
C3 N003 0 10n
C1 Vcc 0 1
R5 OUT N002 22
C4 N002 0 100n
V1 IN 0 24
XU1 0 IN EN/UVLO N002 N005 NC_01 N006 N001 N003 N004 Vcc 0 MAX17761 ;pnba GND)VIN)EN/UVLO)EXTVCC)FB)MODE/ILIM)_RESET)LX)SS)RT/SYNC)VCC)PGND
.tran 4m startup
.lib MAX17761.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1252 680
WIRE -96 -128 -112 -128
WIRE 336 -128 -96 -128
WIRE 336 -112 336 -128
WIRE -112 -48 -112 -128
WIRE 176 -48 144 -48
WIRE 560 -48 496 -48
WIRE 704 -48 640 -48
WIRE 832 -48 704 -48
WIRE 928 -48 832 -48
WIRE 992 -48 928 -48
WIRE 1008 -48 992 -48
WIRE 704 -32 704 -48
WIRE 832 -32 832 -48
WIRE 1008 -32 1008 -48
WIRE 832 48 832 32
WIRE -112 64 -112 32
WIRE 48 64 16 64
WIRE 144 64 112 64
WIRE 176 64 144 64
WIRE 704 64 704 48
WIRE 704 64 496 64
WIRE 1008 64 1008 48
WIRE 704 96 704 64
WIRE 928 112 928 -48
WIRE 48 176 0 176
WIRE 176 176 112 176
WIRE 512 176 496 176
WIRE 704 176 704 160
WIRE 32 288 0 288
WIRE 176 288 112 288
WIRE 928 288 928 192
WIRE 928 288 496 288
WIRE 928 304 928 288
WIRE 560 400 496 400
WIRE 672 400 640 400
WIRE 928 400 928 384
WIRE 336 464 336 448
SYMBOL res 656 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL cap 816 -32 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMATTR SpiceLine Rser=4.6m
SYMBOL ind 544 -32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=10m
SYMBOL cap 112 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 912 96 R0
SYMATTR InstName R1
SYMATTR Value 95.3k
SYMBOL MAX17761 336 160 R0
SYMATTR InstName U1
SYMBOL res 992 -48 R0
SYMATTR InstName Rload
SYMATTR Value {5/0.6}
SYMBOL cap 112 192 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value 10n
SYMBOL res 912 288 R0
SYMATTR InstName R2
SYMATTR Value 18.2k
SYMBOL cap 688 96 R0
SYMATTR InstName C4
SYMATTR Value 100n
SYMBOL voltage -112 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 128 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 105k
SYMBOL res 688 -48 R0
SYMATTR InstName R5
SYMATTR Value 22
FLAG -112 64 0
FLAG 0 288 0
FLAG 336 464 0
FLAG 832 48 0
FLAG 1008 64 0
FLAG -96 -128 IN
FLAG 992 -48 OUT
FLAG 0 176 0
FLAG 928 400 0
FLAG 512 176 0
FLAG 16 64 0
FLAG 672 400 Vcc
FLAG 704 176 0
FLAG 144 64 Vcc
FLAG 144 -48 EN/UVLO
TEXT 808 472 Left 2 !.tran 4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\7acf6748c0f8_Transistor_BJT_Beta.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Ic/Ib to find beta
* Transistor's beta
I1 0 N002 {A}
V1 Vcc 0 5
Q1 N001 N002 0 0 2N3904
R1 Vcc N001 1
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.step PARAM A 1m 200m 1m
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 976 680
WIRE 160 96 160 64
WIRE 96 144 64 144
WIRE 160 208 160 192
SYMBOL voltage 304 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL current -16 144 R270
WINDOW 0 32 40 VTop 2
WINDOW 3 -32 40 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value {A}
SYMBOL npn 96 96 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 144 -32 R0
SYMATTR InstName R1
SYMATTR Value 1
FLAG 160 -16 Vcc
FLAG 304 80 Vcc
FLAG -16 144 0
FLAG 160 208 0
FLAG 304 160 0
TEXT 456 56 Left 2 !.step PARAM A 1m 200m 1m
TEXT 264 0 Left 2 !.op
TEXT 456 96 Left 2 ;Plot Ic/Ib to find beta
TEXT 176 -128 Left 4 ;Transistor's beta
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3631-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3631-3.3.asy)
XU1 N001 IN NC_01 NC_02 IN OUT NC_03 0 LTC3631-3.3 ;pnba SW)Vin)Iset)SS)Run)OUT)Hyst)GND
Rload OUT 0 33
L1 N001 OUT 100
C1 OUT 0 10
V1 IN 0 36
.tran 1.5m startup
.lib LTC3631-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 80 0 80
WIRE 112 80 96 80
WIRE 352 80 336 80
WIRE 448 80 432 80
WIRE 512 80 448 80
WIRE 592 80 512 80
WIRE 0 96 0 80
WIRE 512 96 512 80
WIRE 592 96 592 80
WIRE 96 176 96 80
WIRE 112 176 96 176
WIRE 448 176 448 80
WIRE 448 176 336 176
WIRE 0 192 0 176
WIRE 512 192 512 160
WIRE 592 192 592 176
WIRE 352 368 336 368
SYMBOL cap 496 96 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LTC3631-3.3 224 224 R0
SYMATTR InstName U1
SYMBOL voltage 0 80 R0
SYMATTR InstName V1
SYMATTR Value 36
SYMBOL res 576 80 R0
SYMATTR InstName Rload
SYMATTR Value 33
SYMBOL ind 336 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
FLAG 0 192 0
FLAG 352 368 0
FLAG 512 192 0
FLAG 592 192 0
FLAG 0 80 IN
FLAG 592 80 OUT
TEXT 448 360 Left 2 !.tran 1.5m startup
* Z:\tmp\asc_dec_bjh7r6w2\19957f373132_Part_8_-_DYEMC-Combined-CM-DM-CLC_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
SCM1 N004 0 CM 0 SW
SDM1 N004 N005 DM 0 SW
SCM5 VDML VCM CM 0 SW
SCM6 N006 0 CM 0 SW
R1 VDMH VDML 50
C7 VDML N006 2.2n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1616 772
WIRE 1328 -48 1024 -48
WIRE 1424 -48 1328 -48
WIRE 1328 32 1328 -48
WIRE 688 96 688 80
WIRE -448 112 -448 80
WIRE 688 176 688 160
WIRE 688 176 624 176
WIRE 704 176 688 176
WIRE 752 176 704 176
WIRE 640 288 640 80
WIRE 704 288 704 176
WIRE -448 304 -448 192
WIRE -448 304 -848 304
WIRE -336 304 -448 304
WIRE -208 304 -208 160
WIRE -208 304 -256 304
WIRE -48 304 -208 304
WIRE 752 304 752 176
WIRE 1024 304 752 304
WIRE 1328 304 1328 112
WIRE 1328 304 1024 304
WIRE 1424 304 1328 304
WIRE 1328 384 1328 304
WIRE -448 400 -448 304
WIRE 640 432 640 352
WIRE 640 432 400 432
WIRE 672 432 640 432
WIRE 704 432 704 352
WIRE 704 432 672 432
WIRE 912 432 704 432
WIRE 1328 496 1328 464
WIRE 1504 496 1328 496
WIRE 672 528 672 432
WIRE 1328 528 1328 496
WIRE -448 576 -448 480
WIRE 672 640 672 608
SYMBOL sw -448 384 R0
SYMATTR InstName SCM1
SYMBOL sw -352 304 R270
SYMATTR InstName SDM1
SYMBOL sw 1328 368 R0
SYMATTR InstName SCM5
SYMBOL sw 672 512 R0
SYMATTR InstName SCM6
SYMBOL res 1312 16 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL cap 688 288 R0
SYMATTR InstName C7
SYMATTR Value 2.2n
FLAG -320 352 0
FLAG 672 640 0
FLAG 624 544 0
FLAG -448 576 0
FLAG -272 352 DM
FLAG -496 464 CM
FLAG 624 592 CM
FLAG 1280 448 CM
FLAG 1280 400 0
FLAG -256 144 CM
FLAG 1504 496 VCM
FLAG 1424 304 VDML
FLAG 1424 -48 VDMH
FLAG -496 416 0
* Z:\home\khalils\Downloads\files\data\raw_asc\2e32f3159c86_Ideal_Diode.asc
* Generated by LTspice 26.0.1 for Windows.
Q2 gate base out 0 BC857B
R1 base 0 75k
R2 gate 0 100k
D1 N001 out 1N4148
R4 out 0 1k
Q1 base base in 0 BC857B
M1 in gate out out Si4431DY
V2 N001 0 PULSE(0 20 10m 1m 1m 100m 200m)
V1 in 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 250m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1268 680
WIRE -48 0 -64 0
WIRE 192 0 -48 0
WIRE 256 0 192 0
WIRE 416 0 352 0
WIRE 592 0 416 0
WIRE 624 0 592 0
WIRE 688 0 624 0
WIRE 784 0 752 0
WIRE 336 96 336 48
WIRE 192 128 192 0
WIRE 416 128 416 0
WIRE 624 144 624 0
WIRE -64 160 -64 0
WIRE 784 160 784 0
WIRE 272 176 256 176
WIRE 288 176 272 176
WIRE 352 176 288 176
WIRE 192 240 192 224
WIRE 272 240 272 176
WIRE 272 240 192 240
WIRE 336 240 336 96
WIRE 416 240 416 224
WIRE 416 240 336 240
WIRE -64 256 -64 240
WIRE 192 256 192 240
WIRE 416 256 416 240
WIRE 784 256 784 240
WIRE 192 368 192 336
WIRE 304 368 192 368
WIRE 416 368 416 336
WIRE 416 368 304 368
WIRE 624 368 624 224
WIRE 304 384 304 368
SYMBOL pmos 256 48 R270
SYMATTR InstName M1
SYMATTR Value Si4431DY
SYMBOL res 608 128 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL pnp 256 224 R180
SYMATTR InstName Q1
SYMATTR Value BC857B
SYMBOL pnp 352 224 M180
SYMATTR InstName Q2
SYMATTR Value BC857B
SYMBOL diode 752 -16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 176 240 R0
SYMATTR InstName R1
SYMATTR Value 75k
SYMBOL res 400 240 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL voltage -64 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL voltage 784 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 20 10m 1m 1m 100m 200m)
FLAG -64 256 0
FLAG 304 384 0
FLAG -48 0 in
FLAG 288 176 base
FLAG 624 368 0
FLAG 592 0 out
FLAG 784 256 0
FLAG 336 96 gate
TEXT -96 408 Left 2 !.tran 250m
* Z:\home\khalils\Downloads\files\data\raw_asc\37203ea3c5e2_LT6230.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6230.asy)
V3 N003 0 SINE(0 .1 1K)
V2 -V 0 -5
XU1 N003 N001 N002 +V -V NC_01 LT6230 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN
R2 N001 0 1K
V1 +V 0 5
R1 N002 N001 5K
.tran 3m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -112 48 -128 48
WIRE 0 48 -32 48
WIRE 96 48 0 48
WIRE 208 48 176 48
WIRE 64 112 64 96
WIRE -416 160 -416 144
WIRE -288 160 -288 144
WIRE 0 160 0 48
WIRE 32 160 0 160
WIRE 208 192 208 48
WIRE 208 192 176 192
WIRE 32 224 -160 224
WIRE -160 240 -160 224
WIRE -416 256 -416 240
WIRE -288 256 -288 240
WIRE 64 288 64 272
WIRE -160 336 -160 320
SYMBOL opamps\\LT6230 64 192 R0
SYMATTR InstName U1
SYMBOL voltage -160 224 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 .1 1K)
SYMBOL voltage -416 144 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 192 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -16 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
FLAG -288 256 0
FLAG 64 96 +V
FLAG -288 144 +V
FLAG 64 288 -V
FLAG -416 256 0
FLAG -416 144 -V
FLAG -128 48 0
FLAG -160 336 0
TEXT 152 344 Left 2 !.tran 3m