Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6263.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 3.3
V3 IN 0 1.5 AC 1
C2 OUT N002 47p
R1 N002 N001 5.54K
R2 OUT N001 15.4K
R3 N001 N003 7.7K
C1 N001 0 470p
C3 N003 0 470p
R4 N003 IN 7.7K
V4 N004 0 1.5
XU1 N004 N002 OUT +V 0 +V LTC6261 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN_L
* Third Order Butterworth Filter
.ac oct 8 1K 2Meg
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6263.asy)
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4472 1028
WIRE -2752 -576 -2864 -576
WIRE -2464 -576 -2672 -576
WIRE -3200 -528 -3200 -544
WIRE -2608 -496 -2704 -496
WIRE -2464 -496 -2464 -576
WIRE -2464 -496 -2544 -496
WIRE -3200 -432 -3200 -448
WIRE -2624 -400 -2624 -416
WIRE -3136 -352 -3200 -352
WIRE -3024 -352 -3056 -352
WIRE -2976 -352 -3024 -352
WIRE -2864 -352 -2864 -576
WIRE -2864 -352 -2896 -352
WIRE -2816 -352 -2864 -352
WIRE -2704 -352 -2704 -496
WIRE -2704 -352 -2736 -352
WIRE -2656 -352 -2704 -352
WIRE -3200 -336 -3200 -352
WIRE -3024 -320 -3024 -352
WIRE -2864 -320 -2864 -352
WIRE -2464 -320 -2464 -496
WIRE -2464 -320 -2512 -320
WIRE -2432 -320 -2464 -320
WIRE -2656 -288 -2720 -288
WIRE -2720 -272 -2720 -288
WIRE -3200 -240 -3200 -256
WIRE -3024 -224 -3024 -256
WIRE -2864 -224 -2864 -256
WIRE -2720 -176 -2720 -192
FLAG -3200 -432 0
FLAG -3200 -544 +V
FLAG -3200 -240 0
FLAG -2432 -320 OUT
FLAG -2864 -224 0
FLAG -3024 -224 0
FLAG -2720 -176 0
FLAG -2624 -240 0
FLAG -2624 -416 +V
FLAG -2576 -240 +V
FLAG -3200 -352 IN
SYMBOL voltage -3200 -544 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage -3200 -352 R0
WINDOW 123 32 96 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 47 60 Left 2
SYMATTR Value2 AC 1
SYMATTR Value 1.5
SYMATTR InstName V3
SYMBOL cap -2544 -512 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 47p
SYMBOL res -2720 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5.54K
SYMBOL res -2656 -592 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 15.4K
SYMBOL res -2880 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 7.7K
SYMBOL cap -2880 -320 R0
SYMATTR InstName C1
SYMATTR Value 470p
SYMBOL cap -3040 -320 R0
SYMATTR InstName C3
SYMATTR Value 470p
SYMBOL res -3040 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 7.7K
SYMBOL voltage -2720 -288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 1.5
SYMBOL opamps\\LTC6263 -2624 -320 R0
SYMATTR InstName U1
TEXT -2808 -632 Bottom 2 ;Third Order Butterworth Filter
TEXT -2480 -144 Left 2 !.ac oct 8 1K 2Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\03068518691f_StageA_LowPassSallenKey_LT6004.asc
* Generated by LTspice 26.0.1 for Windows.
* This subcircuit is not simulatable. \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6004.asy)
C1 OUT N001 100n
R1 N001 IN 150k
R2 N002 N001 270k
C2 N002 REF 39n
XU1 N002 OUT V+ V- OUT LT6003 ;pnba IN+)IN-)VCC)VEE)OUT
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4112 860
WIRE 512 -128 240 -128
WIRE 320 112 320 -32
WIRE 240 128 240 -128
WIRE 288 128 288 112
WIRE 288 128 240 128
WIRE 304 128 288 128
WIRE 512 144 512 -128
WIRE 512 144 352 144
WIRE -160 160 -176 160
WIRE -128 160 -160 160
WIRE -16 160 -48 160
WIRE 16 160 -16 160
WIRE 144 160 96 160
WIRE 288 160 144 160
WIRE 304 160 288 160
WIRE 512 160 512 144
WIRE 576 160 512 160
WIRE 608 160 576 160
WIRE 288 176 288 160
WIRE 144 192 144 160
WIRE 144 272 144 256
WIRE 320 336 320 176
WIRE -16 400 -16 160
WIRE 176 400 -16 400
WIRE 512 400 512 160
WIRE 512 400 240 400
SYMBOL cap 128 192 R0
SYMATTR InstName C2
SYMATTR Value 39n
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 270k
SYMBOL res -32 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 150k
SYMBOL Opamps\\LT6004 320 144 R0
SYMATTR InstName U1
SYMBOL cap 240 384 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100n
FLAG 320 -32 V+
FLAG 320 336 V-
FLAG 576 160 OUT
FLAG -160 160 IN
FLAG 144 272 REF
TEXT -176 504 Left 4 ;This subcircuit is not simulatable.  \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17562.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17562.asy)
R8 N007 0 2.87K
V1 IN 0 24
R4 0 N006 20K
V4 N002 0 2
XU1 IN N007 0 0 N002 N004 0 OUT N003 N006 MAX17562 ;pnba IN)SETI)GND)_HVEN)EN)_FLAG)_RIEN)OUT)UVLO)OVLO
R6 N005 N004 20K
R2 N003 0 200K
C2 OUT 0 150
R3 N006 IN 499K
R1 IN N003 2.1Meg
V2 N005 0 5
S1 0 OUT N001 0 SHORT
V3 N001 0 PULSE(0 1 70m 1m 1m 100m)
.model SHORT SW(Ron=4 Roff=100K Vt=.5 Vh=-.4)
.tran 0.8 startup
.lib MAX17562.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1800 680
WIRE -304 -352 -432 -352
WIRE -192 -352 -304 -352
WIRE -16 -352 -192 -352
WIRE 400 -352 272 -352
WIRE 512 -352 400 -352
WIRE 672 -352 560 -352
WIRE -432 -336 -432 -352
WIRE 400 -336 400 -352
WIRE 512 -336 512 -352
WIRE 672 -336 672 -352
WIRE 560 -320 560 -352
WIRE -16 -304 -96 -304
WIRE -96 -288 -96 -304
WIRE -304 -272 -304 -352
WIRE -432 -240 -432 -256
WIRE 400 -240 400 -272
WIRE 512 -240 512 -256
WIRE 672 -240 672 -256
WIRE -96 -192 -96 -208
WIRE -304 -160 -304 -192
WIRE -16 -160 -304 -160
WIRE 384 -160 272 -160
WIRE 576 -160 464 -160
WIRE -304 -144 -304 -160
WIRE 576 -128 576 -160
WIRE -192 -96 -192 -352
WIRE 400 -64 272 -64
WIRE -304 -32 -304 -64
WIRE 400 -32 400 -64
WIRE 576 -32 576 -48
WIRE -192 16 -192 -16
WIRE -16 16 -192 16
WIRE 336 16 272 16
WIRE -192 32 -192 16
WIRE 336 32 336 16
WIRE -16 128 -80 128
WIRE 336 128 336 112
WIRE 336 128 272 128
WIRE -192 160 -192 112
WIRE -80 160 -80 128
WIRE 336 160 336 128
SYMBOL res 480 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 20K
SYMBOL MAX17562 128 -112 R0
SYMATTR InstName U1
SYMBOL voltage 576 -144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res -320 -160 R0
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL res -320 -288 R0
SYMATTR InstName R1
SYMATTR Value 2.1Meg
SYMBOL cap 384 -336 R0
SYMATTR InstName C2
SYMATTR Value 150
SYMBOL voltage -432 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL voltage 672 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 70m 1m 1m 100m)
SYMBOL res -208 128 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 20K
SYMBOL voltage -96 -304 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 2
SYMBOL res 320 16 R0
SYMATTR InstName R8
SYMATTR Value 2.87K
SYMBOL sw 512 -240 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL res -208 0 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 499K
FLAG -432 -240 0
FLAG 400 -240 0
FLAG 512 -352 OUT
FLAG -432 -352 IN
FLAG 512 -240 0
FLAG 560 -272 0
FLAG 672 -240 0
FLAG -192 160 0
FLAG 336 160 0
FLAG 576 -32 0
FLAG -96 -192 0
FLAG -304 -32 0
FLAG -80 160 0
FLAG 400 -32 0
TEXT 480 144 Left 2 !.model SHORT SW(Ron=4 Roff=100K Vt=.5 Vh=-.4)
TEXT 480 184 Left 2 !.tran 0.8 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1176-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1176-5.asy)
Rload OUT 0 5
L1 N001 OUT 100
V1 IN 0 10
R3 N005 N006 2.8K
C2 N006 0 .01
D1 0 N001 1N5819
XU1 IN N004 0 OUT N003 N002 N005 N001 LT1176 top=2.8K bot=2.2K ;pnba Vin)Ilim)GND)Sense)_SHDN)Status)Vc)SW
C1 OUT 0 470 Rser=.1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
.lib LT1176.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2728 1608
WIRE 1792 1104 1504 1104
WIRE 1504 1120 1504 1104
WIRE 1792 1136 1792 1104
WIRE 2032 1136 1984 1136
WIRE 2096 1136 2032 1136
WIRE 2224 1136 2176 1136
WIRE 2288 1136 2224 1136
WIRE 2288 1152 2288 1136
WIRE 2032 1168 2032 1136
WIRE 1632 1200 1616 1200
WIRE 1984 1200 1984 1136
WIRE 1984 1200 1952 1200
WIRE 1504 1216 1504 1200
WIRE 2032 1248 2032 1232
WIRE 2288 1248 2288 1232
WIRE 1632 1280 1616 1280
WIRE 2224 1280 2224 1136
WIRE 2224 1280 1952 1280
WIRE 2224 1296 2224 1280
WIRE 1632 1360 1616 1360
WIRE 1968 1360 1952 1360
WIRE 2064 1360 2048 1360
WIRE 2144 1360 2128 1360
WIRE 2224 1376 2224 1360
WIRE 1792 1440 1792 1424
SYMBOL PowerProducts\\LT1176-5 1792 1280 R0
SYMATTR InstName U1
SYMBOL cap 2064 1376 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL VOLTAGE 1504 1104 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 2272 1136 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL ind 2080 1152 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMBOL res 1952 1376 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 2.8K
SYMBOL schottky 2016 1232 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMBOL polcap 2208 1296 R0
SYMATTR SpiceLine Rser=.1
SYMATTR InstName C1
SYMATTR Value 470
FLAG 1792 1440 0
FLAG 1504 1216 0
FLAG 2032 1248 0
FLAG 2224 1376 0
FLAG 2144 1360 0
FLAG 2288 1248 0
FLAG 2288 1136 OUT
FLAG 1504 1104 IN
TEXT 2024 1440 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\IdealTransformer.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* A ideal transformer with two windings.\nWinding ratio specified with parameter N
R2 N001 0 1G
G3 IN 0 N001 0 1
Rload OUT 0 100
G2 0 N001 OUT 0 {N}
G4 OUT 0 N001 0 {N}
V1 N002 0 SINE(0 170 60)
Rin N002 IN 1
G1 0 N001 IN 0 1
.tran 50m
.param N=4 ; turns ratio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 932 680
WIRE 160 0 112 0
WIRE 544 0 448 0
WIRE 160 16 160 0
WIRE 448 16 448 0
WIRE 304 32 208 32
WIRE 400 32 304 32
WIRE 304 128 304 32
WIRE 304 128 208 128
WIRE 400 128 304 128
WIRE 208 160 208 128
WIRE 304 160 304 128
WIRE 400 160 400 128
WIRE -176 176 -336 176
WIRE 0 176 -96 176
WIRE 160 176 160 96
WIRE 160 176 0 176
WIRE 448 176 448 96
WIRE 720 176 448 176
WIRE -336 192 -336 176
WIRE 720 192 720 176
WIRE 112 224 112 0
WIRE 112 224 0 224
WIRE 160 224 112 224
WIRE 544 224 544 0
WIRE 544 224 448 224
WIRE 624 224 544 224
WIRE 208 256 208 240
WIRE 304 256 304 240
WIRE 400 256 400 240
WIRE -336 288 -336 272
WIRE 720 288 720 272
RECTANGLE Normal 576 312 48 -96 2
SYMBOL res 288 144 R0
SYMATTR InstName R2
SYMATTR Value 1G
SYMBOL g 208 144 R0
SYMATTR InstName G1
SYMATTR Value 1
SYMBOL res 704 176 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL g 448 0 R0
WINDOW 0 13 18 Left 2
WINDOW 3 12 101 Left 2
SYMATTR InstName G4
SYMATTR Value {N}
SYMBOL voltage -336 176 R0
SYMATTR InstName V1
SYMATTR Value SINE(0 170 60)
SYMBOL g 160 0 M0
WINDOW 0 -10 10 Right 2
WINDOW 3 -16 104 Right 2
SYMATTR InstName G3
SYMATTR Value 1
SYMBOL g 400 144 M0
WINDOW 0 -10 9 Right 2
WINDOW 3 -15 96 Right 2
SYMATTR InstName G2
SYMATTR Value {N}
SYMBOL res -192 160 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rin
SYMATTR Value 1
FLAG -336 288 0
FLAG 400 256 0
FLAG 208 256 0
FLAG 208 80 0
FLAG 400 80 0
FLAG 304 256 0
FLAG 0 224 0
FLAG 624 224 0
FLAG 720 288 0
FLAG 0 176 IN
FLAG 720 176 OUT
TEXT 528 336 Left 2 !.tran 50m
TEXT 240 368 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT 312 -24 Bottom 2 ;A ideal transformer with two windings.\nWinding ratio specified with parameter N
TEXT 192 296 Left 2 !.param N=4 ; turns ratio
* Z:\home\khalils\Downloads\files\data\raw_asc\47eb607a0c1f_4.1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 15
R1 N002 0 1K
D1 N001 N002 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 2 0.02
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 80 16 80
WIRE 368 80 224 80
WIRE 368 128 368 80
WIRE 16 144 16 80
WIRE 16 288 16 224
WIRE 96 288 16 288
WIRE 368 288 368 208
WIRE 368 288 96 288
WIRE 96 320 96 288
SYMBOL voltage 16 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 352 112 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL diode 160 96 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
FLAG 96 320 0
TEXT 56 184 Left 2 !.dc V1 0 2 0.02
* Z:\home\khalils\Downloads\files\data\raw_asc\0788719d5723_Half_Wave_rectification.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Input 0 SINE(0 10 1)
R1 output Input 2K
D1 0 output BAT46WJ
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1580 876
WIRE 112 144 0 144
WIRE 272 144 192 144
WIRE 304 144 272 144
WIRE 0 192 0 144
WIRE 272 192 272 144
WIRE 0 224 0 192
WIRE 272 320 272 256
WIRE 0 368 0 304
SYMBOL voltage 0 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 40 91 Left 2
SYMATTR Value SINE(0 10 1)
SYMATTR InstName V1
SYMBOL res 208 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL schottky 288 256 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BAT46WJ
SYMATTR Description Diode
SYMATTR Type diode
FLAG 0 368 0
FLAG 0 192 Input
FLAG 304 144 output
FLAG 272 320 0
TEXT 168 376 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\20e84c6067a7_tut1ques3c.asc
* Generated by LTspice 26.0.1 for Windows.
G1 0 Vo Vi Vfb {Gm}
R3 Vo 0 {RL}
R2 Vo Vfb {n_minus_one_R}
V1 Vi 0 SINE(0V 1V 1kHz)
R4 Vo 0 {ro}
R1 Vfb 0 {R}
.params Gm=0.010 ro=100000 R=1000000 n=10 RL=1000
.tran 0 1m .0
.param n_minus_one_R={(n-1)*R}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 -128 -16 -128
WIRE 176 -128 96 -128
WIRE 336 -128 176 -128
WIRE -64 -96 -384 -96
WIRE -16 -80 -16 -128
WIRE 96 -80 96 -128
WIRE 176 -80 176 -128
WIRE -64 -64 -64 -96
WIRE -64 16 -64 -16
WIRE -64 16 -256 16
WIRE -256 96 -256 16
WIRE -112 96 -256 96
WIRE 336 96 336 -128
WIRE 336 96 -32 96
WIRE -256 128 -256 96
SYMBOL res 160 -96 R0
SYMATTR InstName R3
SYMATTR Value {RL}
SYMBOL voltage -384 -112 R0
SYMATTR InstName V1
SYMATTR Value SINE(0V 1V 1kHz)
SYMBOL g -16 -96 R0
SYMATTR InstName G1
SYMATTR Value {Gm}
SYMBOL res -16 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {n_minus_one_R}
SYMBOL res 80 -96 R0
SYMATTR InstName R4
SYMATTR Value {ro}
SYMBOL res -272 112 R0
SYMATTR InstName R1
SYMATTR Value {R}
FLAG -16 0 0
FLAG 96 0 0
FLAG -384 -16 0
FLAG -256 208 0
FLAG -384 -96 Vi
FLAG 336 -128 Vo
FLAG -256 96 Vfb
FLAG 176 0 0
TEXT -384 240 Left 2 !.params Gm=0.010 ro=100000 R=1000000 n=10 RL=1000
TEXT -160 320 Left 2 !.tran 0 1m .0
TEXT -280 280 Left 2 !.param n_minus_one_R={(n-1)*R}
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3071.asc
* Generated by LTspice 26.0.1 for Windows.
C1 0 N006 .01
V1 N001 0 3
V2 IN 0 1.2
R1 OUT 0 .18
C2 0 N005 .01
C3 OUT 0 20
R2 N001 N002 50K
XU1 0 N001 0 0 N001 N006 N004 N003 IN OUT OUT N001 N005 N002 LT3071 ;pnba GND)VO0)VO1)VO2)Bias)REF/BYP)MargA)Imon)IN)Sense)OUT)EN)VIOC)PWRGD
R3 0 N003 1K
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3071.asy)
.lib LT3071.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1156 680
WIRE 432 -48 96 -48
WIRE 576 -48 432 -48
WIRE 432 -32 432 -48
WIRE 576 -32 576 -48
WIRE 256 0 -112 0
WIRE -112 16 -112 0
WIRE 256 16 256 0
WIRE 96 64 96 -48
WIRE 112 64 96 64
WIRE 432 64 432 48
WIRE 432 64 400 64
WIRE 576 64 576 48
WIRE -112 112 -112 96
WIRE 96 128 96 64
WIRE 112 128 96 128
WIRE 928 128 400 128
WIRE 928 144 928 128
WIRE 96 192 96 128
WIRE 112 192 96 192
WIRE 832 192 928 128
WIRE 832 192 400 192
WIRE 832 208 832 192
WIRE 928 240 928 224
WIRE 112 256 96 256
WIRE 416 256 400 256
WIRE 528 256 496 256
WIRE 832 288 832 272
WIRE 112 320 96 320
WIRE 416 320 400 320
WIRE 32 384 16 384
WIRE 112 384 96 384
WIRE 416 384 400 384
WIRE 496 384 480 384
WIRE 256 432 256 416
FLAG 496 384 0
FLAG 256 432 0
FLAG 96 320 0
FLAG 96 256 0
FLAG -112 112 0
FLAG 576 64 0
FLAG 16 384 0
FLAG 832 288 0
FLAG 928 240 0
FLAG -112 0 IN
FLAG 928 128 OUT
FLAG 528 256 0
SYMBOL cap 480 368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL voltage 576 -48 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL voltage -112 0 R0
SYMATTR InstName V2
SYMATTR Value 1.2
SYMBOL res 912 128 R0
SYMATTR InstName R1
SYMATTR Value .18
SYMBOL cap 32 400 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL cap 816 208 R0
WINDOW 3 26 56 Left 2
SYMATTR Value 20
SYMATTR InstName C3
SYMBOL res 416 -48 R0
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL PowerProducts\\LT3071 256 224 R0
SYMATTR InstName U1
SYMBOL res 512 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
TEXT 512 336 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1640aeb0b747_4357.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4357.asy)
XU1 N002 N001 N003 0 N002 LTC4357 ;pnba OUT)IN)Gate)GND)Vdd
Rload N002 0 10
MQ1 N002 N003 N001 N001 IRF530
V2 N004 0 PWL(0 0 50m 48 100m 0)
MQ2 N002 N005 N004 N004 IRF530
XU2 N002 N004 N005 0 N002 LTC4357 ;pnba OUT)IN)Gate)GND)Vdd
V1 N001 0 PWL(0 48 50m 0 100m 48)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m
.lib LTC4357.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 948 1284
WIRE -32 144 -400 144
WIRE 112 144 -32 144
WIRE 304 144 208 144
WIRE -400 160 -400 144
WIRE 128 224 128 192
WIRE -400 256 -400 240
WIRE -32 288 -32 144
WIRE 0 288 -32 288
WIRE 304 288 304 144
WIRE 304 288 256 288
WIRE 304 384 304 288
WIRE 304 384 256 384
WIRE 304 448 304 384
WIRE 448 448 304 448
WIRE 128 464 128 448
WIRE 448 464 448 448
WIRE -32 512 -400 512
WIRE 112 512 -32 512
WIRE 304 512 304 448
WIRE 304 512 208 512
WIRE -400 528 -400 512
WIRE 448 560 448 544
WIRE 128 592 128 560
WIRE -400 624 -400 608
WIRE -32 656 -32 512
WIRE 0 656 -32 656
WIRE 304 656 304 512
WIRE 304 656 256 656
WIRE 304 752 304 656
WIRE 304 752 256 752
WIRE 128 832 128 816
SYMBOL nmos 208 192 M270
WINDOW 0 55 46 VTop 2
WINDOW 3 -13 73 VLeft 2
SYMATTR InstName Q1
SYMATTR Value IRF530
SYMBOL nmos 208 560 M270
WINDOW 0 55 46 VTop 2
WINDOW 3 -13 73 VLeft 2
SYMATTR InstName Q2
SYMATTR Value IRF530
SYMBOL voltage -400 512 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PWL(0 0 50m 48 100m 0)
SYMATTR InstName V2
SYMBOL LTC4357 128 704 R0
SYMATTR InstName U2
SYMBOL LTC4357 128 336 R0
SYMATTR InstName U1
SYMBOL res 432 448 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL voltage -400 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PWL(0 48 50m 0 100m 48)
SYMATTR InstName V1
FLAG 128 464 0
FLAG -400 256 0
FLAG 448 560 0
FLAG 128 832 0
FLAG -400 624 0
TEXT 360 720 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\38b10ae2f794_inv_transfer.asc
* Generated by LTspice 26.0.1 for Windows.
AX1 N001 0 0 0 0 0 0 0 BUF ll=180n wn={nnw} wp={nnw*mp}
V1 vdd 0 {vv}
V2 vin 0 {vv}
.param vv=1.8 nnw=1*180n mp=1
.lib BU_180nm.lib
.dc V2 0 {vv} 0.01
.meas dc vil when d(v(out))=-1 fall 1
.meas dc vih when d(v(out))=-1 rise 1
.meas dc vi_mid param (vil+vih)/2/vv
.meas dc voh find v(out) when d(v(out))=-1 fall 1
.meas dc vol find v(out) when d(v(out))=-1 rise 1
.meas dc vo_mid param (vol+voh)/2/vv
.meas dc NMH param abs(voh-vih)
.meas dc NML param abs(vil-vol)
.meas dc voh_fraction param voh/vv
.meas dc vol_fraction param vol/vv
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1168 680
WIRE 416 224 -64 224
WIRE -64 272 -64 224
WIRE 416 304 416 224
WIRE 400 320 96 320
WIRE 496 320 448 320
WIRE 96 400 96 320
WIRE 416 400 416 336
WIRE 416 400 224 400
WIRE 224 416 224 400
SYMBOL inv 416 320 R0
SYMATTR InstName X1
SYMATTR SpiceLine ll=180n wn={nnw} wp={nnw*mp}
SYMBOL /voltage 96 384 R0
WINDOW 3 18 89 Left 2
SYMATTR InstName V2
SYMATTR Value {vv}
SYMBOL /voltage -64 256 R0
SYMATTR InstName V1
SYMATTR Value {vv}
FLAG -64 352 0
FLAG 96 480 0
FLAG 224 416 0
FLAG -64 224 vdd
FLAG 224 400 vss
FLAG 96 320 vin
FLAG 496 320 out
TEXT -88 72 Left 2 !.param vv=1.8 nnw=1*180n mp=1\n.lib BU_180nm.lib\n.dc V2 0 {vv} 0.01
TEXT 560 72 Left 2 !.meas dc vil when d(v(out))=-1 fall 1\n.meas dc vih when d(v(out))=-1 rise 1\n.meas dc vi_mid param (vil+vih)/2/vv\n.meas dc voh find v(out) when d(v(out))=-1 fall 1\n.meas dc vol find v(out) when d(v(out))=-1 rise 1\n.meas dc vo_mid param (vol+voh)/2/vv\n.meas dc NMH param abs(voh-vih)\n.meas dc NML param abs(vil-vol)\n.meas dc voh_fraction param voh/vv\n.meas dc vol_fraction param vol/vv
* Z:\tmp\asc_dec_bjh7r6w2\07395b800c3f_push-pull_send_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V2 0 V_minus 5V
Q1 V_plus N002 N006 0 NPN
Q3 V_minus N002 N006 0 PNP
R1 N002 N004 1k
V3 N005 0 PULSE(0 5 500u 1u 1u 12.5u 25u 10)
Q2 V_plus N009 N010 0 NPN
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 732
WIRE 64 -64 48 -64
WIRE 64 -32 64 -64
WIRE -544 16 -592 16
WIRE 0 16 -16 16
WIRE -592 32 -592 16
WIRE -992 48 -992 32
WIRE -912 48 -992 48
WIRE -624 48 -912 48
WIRE -992 64 -992 48
WIRE -416 64 -560 64
WIRE -224 64 -336 64
WIRE -16 64 -16 16
WIRE -16 64 -224 64
WIRE -672 80 -784 80
WIRE -624 80 -672 80
WIRE -1152 96 -1152 64
WIRE 64 96 64 64
WIRE 288 96 64 96
WIRE -784 112 -784 80
WIRE -592 128 -592 96
WIRE -560 128 -592 128
WIRE -224 128 -224 64
WIRE 64 128 64 96
WIRE -16 176 -16 64
WIRE 0 176 -16 176
WIRE -992 192 -992 144
WIRE -960 192 -992 192
WIRE -1152 208 -1152 176
WIRE -1152 208 -1232 208
WIRE -784 224 -784 192
WIRE -1232 240 -1232 208
WIRE 64 240 64 224
WIRE 64 240 48 240
WIRE -1152 256 -1152 208
WIRE -224 256 -224 192
WIRE 64 368 48 368
WIRE -1152 384 -1152 336
WIRE 64 400 64 368
WIRE 0 448 -16 448
WIRE -672 480 -672 80
WIRE -16 496 -16 448
WIRE -16 496 -224 496
WIRE -912 512 -912 48
WIRE 64 528 64 496
WIRE 288 528 64 528
WIRE 64 560 64 528
WIRE -16 608 -16 496
SYMBOL voltage -1152 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5V
SYMBOL npn 0 -32 R0
SYMATTR InstName Q1
SYMBOL pnp 0 224 M180
SYMATTR InstName Q3
SYMBOL res -320 48 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -784 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -91 182 Left 0
SYMATTR Value PULSE(0 5 500u 1u 1u 12.5u 25u 10)
SYMATTR InstName V3
SYMBOL npn 0 400 R0
SYMATTR InstName Q2
FLAG -1232 240 0
FLAG -1152 64 V_plus
FLAG -1152 384 V_minus
FLAG -784 224 0
FLAG -960 192 0
FLAG 48 240 V_minus
FLAG 48 -64 V_plus
FLAG 48 368 V_plus