Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\42876a6356e5_tema1.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N005 N008 1N4148
D2 N005 N004 1N4148
D3 N005 N006 1N4148
R1 N001 N005 4k
R2 N007 0 1k
R3 N001 N002 1.6k
QT1 N002 N006 N007 0 2N2222
QT2 Vo N007 0 0 2N2222
V1 N001 0 5
V2 N004 0 5
QT3 N001 N002 N003 0 2N2222
D4 N003 Vo 1N4148
Vi N008 0 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Vi 0 5 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1248 680
WIRE 512 -176 208 -176
WIRE 752 -176 512 -176
WIRE 976 -176 752 -176
WIRE 512 -144 512 -176
WIRE 976 -112 976 -176
WIRE 208 -80 208 -176
WIRE 752 -64 752 -176
WIRE 512 -16 512 -64
WIRE 688 -16 512 -16
WIRE 704 -16 688 -16
WIRE 976 16 976 -32
WIRE 752 64 752 32
WIRE 512 80 512 -16
WIRE 64 128 -80 128
WIRE 208 128 208 0
WIRE 208 128 128 128
WIRE 304 128 208 128
WIRE 448 128 368 128
WIRE -80 160 -80 128
WIRE 752 176 752 128
WIRE 976 176 752 176
WIRE 752 224 752 176
WIRE 512 272 512 176
WIRE 688 272 512 272
WIRE -80 288 -80 240
WIRE 96 320 16 320
WIRE 208 320 208 128
WIRE 208 320 160 320
WIRE 512 352 512 272
WIRE 16 368 16 320
WIRE 512 480 512 432
WIRE 752 480 752 320
WIRE 16 496 16 448
FLAG 512 480 0
FLAG 976 16 0
FLAG 752 480 0
FLAG -80 288 0
FLAG 16 496 0
FLAG 976 176 Vo
IOPIN 976 176 Out
SYMBOL diode 160 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 39 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL diode 128 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 40 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL diode 304 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 -11 32 VBottom 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL res 192 -96 R0
SYMATTR InstName R1
SYMATTR Value 4k
SYMBOL res 496 336 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 496 -160 R0
WINDOW 3 36 75 Left 2
SYMATTR InstName R3
SYMATTR Value 1.6k
SYMBOL npn 448 80 R0
WINDOW 0 6 -10 Left 2
WINDOW 3 39 44 Left 2
SYMATTR InstName T1
SYMATTR Value 2N2222
SYMBOL npn 688 224 R0
WINDOW 0 10 -6 Left 2
WINDOW 3 43 46 Left 2
SYMATTR InstName T2
SYMATTR Value 2N2222
SYMBOL voltage 976 -128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -80 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 39 79 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL npn 688 -64 R0
WINDOW 0 6 -9 Left 2
WINDOW 3 43 46 Left 2
SYMATTR InstName T3
SYMATTR Value 2N2222
SYMBOL diode 736 64 R0
WINDOW 0 42 17 Left 2
WINDOW 3 35 64 Left 2
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL voltage 16 352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -70 83 Left 2
WINDOW 3 39 79 Left 2
SYMATTR InstName Vi
SYMATTR Value 0
TEXT -210 520 Left 2 !.dc Vi 0 5 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\741c054c335d_step.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 1
R1 N001 N002 {upper}
R2 N002 0 {lower}
.step param upper list 1k 10k 100k
.step param lower 1k 10k 1k
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 288 -16 48 -16
WIRE 288 48 288 -16
WIRE 48 160 48 -16
WIRE 288 224 288 128
WIRE 48 384 48 240
WIRE 288 400 288 304
FLAG 288 400 0
FLAG 48 384 0
SYMBOL voltage 48 144 R0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL res 272 32 R0
SYMATTR InstName R1
SYMATTR Value {upper}
SYMBOL res 272 208 R0
SYMATTR InstName R2
SYMATTR Value {lower}
TEXT 40 -192 Left 2 !.step param upper list 1k 10k 100k
TEXT 40 -160 Left 2 !.step param lower  1k 10k 1k
TEXT 8 424 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\f6c5ded04136_5l_a_.asc
* Generated by LTspice 26.0.1 for Windows.
VDD N001 0 500m
M1 Vout N002 0 NC_01 CMOSN l=0.18u w=1u ad=0.45p as=0.45p pd=2.9u ps=2.9u
RL N001 Vout 1k
VGS N002 0 552m
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VGS 500m 552m 0.01
.include TSMC_180nm.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 480 160 336 160
WIRE 336 256 336 240
WIRE 400 256 336 256
WIRE 480 272 480 240
WIRE 288 336 64 336
WIRE 64 368 64 336
WIRE 336 432 336 352
SYMBOL nmos4 288 256 R0
SYMATTR InstName M1
SYMATTR Value CMOSN
SYMATTR Value2 l=0.18u w=1u ad=0.45p as=0.45p pd=2.9u ps=2.9u
SYMBOL voltage 480 144 R0
SYMATTR InstName VDD
SYMATTR Value 500m
SYMBOL res 320 144 R0
SYMATTR InstName RL
SYMATTR Value 1k
SYMBOL voltage 64 352 R0
WINDOW 3 24 38 Left 2
SYMATTR Value 552m
SYMATTR InstName VGS
FLAG 64 448 0
FLAG 336 432 0
FLAG 480 272 0
FLAG 400 256 Vout
TEXT 416 384 Left 2 !.dc VGS 500m 552m 0.01
TEXT 416 416 Left 2 !.include TSMC_180nm.txt
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1155.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1155.asy)
C1 N001 N002 .1
MQ1 N003 N006 N007 N007 Si9936DY
V2 N004 0 PULSE(0 5 0 100n 100n 2.5m 5m)
Rload2 N007 0 10
R1 N001 N003 .03
XU1 N002 N006 0 N004 N005 N001 N008 N002 LTC1155 ;pnba DS1)G1)GND)IN1)IN2)Vs)G2)DS2
Rload1 N009 0 10
MQ2 N003 N008 N009 N009 Si9936DY
V3 N005 0 PULSE(0 5 0 100n 100n 2.5m 5m)
R2 N003 N002 100K
V1 N001 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 20m startup
.lib LTC1155.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 932 680
WIRE 352 64 16 64
WIRE 656 64 352 64
WIRE 656 80 656 64
WIRE 352 96 352 64
WIRE -80 128 -96 128
WIRE 16 128 16 64
WIRE 16 128 0 128
WIRE 48 128 16 128
WIRE 320 128 304 128
WIRE 320 192 320 128
WIRE 352 192 352 160
WIRE 352 192 320 192
WIRE 400 192 352 192
WIRE 496 192 480 192
WIRE 656 192 656 160
WIRE 656 192 496 192
WIRE -208 224 -224 224
WIRE 48 224 -128 224
WIRE 320 224 320 192
WIRE 320 224 304 224
WIRE 656 240 656 192
WIRE -208 320 -224 320
WIRE 48 320 -128 320
WIRE 608 320 304 320
WIRE 496 336 496 192
WIRE 656 352 656 336
WIRE 48 416 16 416
WIRE 448 416 304 416
WIRE 496 448 496 432
WIRE 656 448 656 432
WIRE 496 544 496 528
SYMBOL PowerProducts\\LTC1155 176 272 R0
SYMATTR InstName U1
SYMBOL res 640 336 R0
SYMATTR InstName Rload2
SYMATTR Value 10
SYMBOL res 640 64 R0
SYMATTR InstName R1
SYMATTR Value .03
SYMBOL voltage 16 128 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL nmos 608 240 R0
WINDOW 0 55 5 Left 2
WINDOW 3 54 62 Left 2
SYMATTR InstName Q1
SYMATTR Value Si9936DY
SYMBOL nmos 448 336 R0
WINDOW 0 56 22 Left 2
WINDOW 3 55 77 Left 2
SYMATTR InstName Q2
SYMATTR Value Si9936DY
SYMBOL res 480 432 R0
SYMATTR InstName Rload1
SYMATTR Value 10
SYMBOL cap 336 96 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL res 496 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL voltage -112 224 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 30 53 VTop 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 100n 100n 2.5m 5m)
SYMBOL voltage -112 320 R90
WINDOW 0 -2 6 VBottom 2
WINDOW 3 37 54 VTop 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 100n 100n 2.5m 5m)
FLAG 16 416 0
FLAG -96 128 0
FLAG -224 224 0
FLAG -224 320 0
FLAG 656 448 0
FLAG 496 544 0
TEXT 80 520 Left 2 !.tran 20m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\eb9597d8df02_SCHEMATIC.asc
* Generated by LTspice 26.0.1 for Windows.
* .op
* EDIC WINTER INTERNSHIP\nMohammed Ahmed Majid\nGP5405, 23EEBEA666
* IO Characterstics of PMOS
vsd N001 0 0.9
M1 0 N002 N001 N001 PMOS l=1u w=10u
vsg N001 N002 0.6
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include tsmc180.txt
.dc vsd 0 1.8 0.1 vsg 0.2 1 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 0 96 0
WIRE 416 0 256 0
WIRE 416 32 416 0
WIRE 256 96 256 0
WIRE 336 96 256 96
WIRE 256 112 256 96
WIRE 208 128 192 128
WIRE 336 160 336 96
WIRE 336 160 256 160
WIRE 96 192 96 0
WIRE 256 256 256 208
WIRE 368 256 256 256
WIRE 416 256 416 112
WIRE 416 256 368 256
WIRE 192 272 192 128
WIRE 192 272 96 272
WIRE 368 288 368 256
SYMBOL voltage 416 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vsd
SYMATTR Value 0.9
SYMBOL pmos4 208 208 M180
WINDOW 123 61 8 Left 2
SYMATTR InstName M1
SYMATTR Value2 l=1u w=10u
SYMBOL voltage 96 176 R0
WINDOW 3 23 109 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vsg
SYMATTR Value 0.6
FLAG 368 288 0
TEXT -264 0 Left 2 !.include tsmc180.txt
TEXT -264 24 Left 2 !.dc vsd 0 1.8 0.1 vsg 0.2 1 0.2
TEXT -264 48 Left 2 ;.op
TEXT -264 -96 Left 2 ;EDIC WINTER INTERNSHIP\nMohammed Ahmed Majid\nGP5405, 23EEBEA666
TEXT 104 -56 Left 2 ;IO Characterstics of PMOS
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1429CS8-4.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
C1 N002 N004 .1
C4 OUT 0 3.3
Rload OUT 0 100
R4 IN N003 3.3K
V2 N001 0 PULSE(0 5 0 0 0 .25u .5u)
XU1 IN N002 N004 0 N005 OUT N003 N001 LTC1429CS8-4 ;pnba Vcc)C1+)C1-)GND)COMP)OUT)REG)SYNC
.tran 250u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1429CS8-4.asy)
.lib LTC1429CS8-4.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2680 1852
WIRE 2208 1408 2032 1408
WIRE 1680 1440 1584 1440
WIRE 2080 1440 1680 1440
WIRE 2208 1440 2208 1408
WIRE 1584 1456 1584 1440
WIRE 2080 1472 2080 1440
WIRE 1680 1520 1680 1440
WIRE 1712 1520 1680 1520
WIRE 2032 1520 2032 1408
WIRE 2032 1520 2000 1520
WIRE 1584 1552 1584 1536
WIRE 2208 1552 2208 1520
WIRE 1712 1584 1648 1584
WIRE 2080 1584 2080 1552
WIRE 2080 1584 2000 1584
WIRE 1712 1648 1648 1648
WIRE 2080 1648 2000 1648
WIRE 2176 1648 2080 1648
WIRE 2080 1664 2080 1648
WIRE 2176 1664 2176 1648
WIRE 1712 1712 1696 1712
WIRE 2032 1712 2000 1712
WIRE 2080 1760 2080 1728
WIRE 2176 1760 2176 1744
FLAG 1584 1552 0
FLAG 1696 1712 0
FLAG 2080 1760 0
FLAG 2176 1760 0
FLAG 2208 1552 0
FLAG 2176 1648 OUT
FLAG 1584 1440 IN
SYMBOL VOLTAGE 1584 1440 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 1632 1584 R0
WINDOW 0 39 15 Left 2
WINDOW 3 36 48 Left 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL cap 2064 1664 R0
SYMATTR InstName C4
SYMATTR Value 3.3
SYMBOL RES 2160 1648 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL res 2064 1456 R0
SYMATTR InstName R4
SYMATTR Value 3.3K
SYMBOL VOLTAGE 2208 1424 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 0 0 .25u .5u)
SYMBOL PowerProducts\\LTC1429CS8-4 1856 1616 R0
SYMATTR InstName U1
TEXT 2296 1712 Left 2 !.tran 250u
* Z:\home\khalils\Downloads\files\data\raw_asc\006c0adad7a4_CircuitoBS170.asc
* Generated by LTspice 26.0.1 for Windows.
I1 Port2 0 100m
V1 Port1 0 0 AC 1
M1 0 Port1 Port2 Port2 BS170
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model BS170 VDMOS VTO=1.824 RG=270 RS=1.572 RD=1.436 RB=.768 KP=.1233 Cgdmax=20p Cgdmin=3p CGS=28p Cjo=35p Rds=1.2E8 IS=5p Bv=60 Ibv=10u Tt=161.6n
.net V(port2) V1
.ac dec 1000 100 100Meg
.OPTIONS ALLOW_AMBIGUOUS_MODELS
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2096 680
WIRE 384 -16 240 -16
WIRE 464 -16 384 -16
WIRE 464 16 464 -16
WIRE 240 64 240 -16
WIRE 384 64 384 -16
WIRE 80 144 64 144
WIRE 192 144 80 144
WIRE 80 176 80 144
WIRE 240 176 240 160
WIRE 384 176 384 144
WIRE 384 176 240 176
WIRE 432 176 384 176
WIRE 80 288 80 256
IOPIN 64 144 In
IOPIN 432 176 Out
SYMBOL current 384 144 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 100m
SYMBOL voltage 80 160 R0
WINDOW 3 24 152 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL nmos 192 64 R0
SYMATTR InstName M1
SYMATTR Value BS170
FLAG 64 144 Port1
FLAG 432 176 Port2
FLAG 80 288 0
FLAG 464 16 0
TEXT -472 -200 Left 2 !.model BS170 VDMOS VTO=1.824 RG=270 RS=1.572 RD=1.436 RB=.768 KP=.1233 Cgdmax=20p Cgdmin=3p CGS=28p Cjo=35p Rds=1.2E8 IS=5p Bv=60 Ibv=10u Tt=161.6n
TEXT 616 96 Left 2 !.net V(port2) V1
TEXT -472 232 Left 2 !.ac dec 1000 100 100Meg
TEXT -464 -168 Left 2 !.OPTIONS ALLOW_AMBIGUOUS_MODELS
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1761-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1761-1.2.asy)
C2 OUT N001 .01
Rload OUT 0 500
V1 IN 0 PWL(0 0 1 10)
XU1 IN 0 IN N001 OUT LT1761-1.2 ;pnba IN)GND)_SHDN)BYP)OUT
C1 OUT 0 10
.tran 1
.lib LT1761.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 48 -224 48
WIRE 16 48 -16 48
WIRE 336 48 304 48
WIRE 416 48 336 48
WIRE 512 48 416 48
WIRE -224 64 -224 48
WIRE 336 64 336 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE -16 144 -16 48
WIRE 16 144 -16 144
WIRE 336 144 336 128
WIRE 336 144 304 144
WIRE -224 160 -224 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 160 240 160 208
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT1761-1.2 160 96 R0
SYMATTR InstName U1
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 320 64 R0
SYMATTR InstName C2
SYMATTR Value .01
FLAG -224 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 160 240 0
FLAG -224 48 IN
FLAG 512 48 OUT
TEXT 352 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG811.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 1 input.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG811.asy)
V2 N003 0 PULSE(0 2.4 0 10n 10n 980n 2u)
VS N001 0 3
XU1 +V N003 NC_01 NC_02 NC_03 N001 N002 NC_04 NC_05 NC_06 NC_07 NC_08 NC_09 0 ADG811 ;pnba VDD)IN1)IN2)IN3)IN4)S1)D1)S2)D2)S3)D3)S4)D4)GND
C1 N002 0 33p
R1 N002 0 47
V1 +V 0 3.3
.tran 10u
.lib ADG811.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -432 -16 -464 -16
WIRE -256 -16 -352 -16
WIRE 0 -16 -32 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE 112 32 112 -16
WIRE -256 48 -432 48
WIRE -592 112 -592 64
WIRE -432 112 -432 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -592 272 -592 192
WIRE -432 272 -432 192
WIRE -144 576 -144 560
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 47
SYMBOL voltage -592 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage -432 96 R0
WINDOW 3 -261 238 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 2.4 0 10n 10n 980n 2u)
SYMATTR InstName V2
SYMBOL ADG811 -144 32 R0
SYMATTR InstName U1
SYMBOL voltage -336 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 33p
FLAG -592 272 0
FLAG -592 64 +V
FLAG -464 -16 0
FLAG -144 -112 +V
FLAG -144 576 0
FLAG -432 272 0
FLAG 0 112 0
FLAG 112 112 0
TEXT 104 568 Left 2 !.tran 10u
TEXT -712 -200 Left 2 ;Note:\nSwitch shown for a logic 1 input.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6247.asc
* Generated by LTspice 26.0.1 for Windows.
* 60dB 5.5 MHz Gain Block
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6247.asy)
R1 N004 N003 1K
V1 IN 0 AC 1
R4 OUT N004 30K
XU2 OUT -V N002 N004 +V LTC6247 ;pnba 1)4)3)2)7
R2 N001 0 50
V2 +V 0 2.5
C1 N003 0 660n
XU1 N002 -V IN N001 +V LTC6247 ;pnba 1)4)3)2)7
R3 N002 N001 1.5K
V3 -V 0 -2.5
.ac dec 250 10K 20Meg
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2228 1852
WIRE -960 -368 -960 -384
WIRE -752 -352 -768 -352
WIRE -640 -352 -672 -352
WIRE -592 -352 -640 -352
WIRE -496 -352 -512 -352
WIRE -448 -352 -464 -352
WIRE -368 -352 -384 -352
WIRE -272 -352 -288 -352
WIRE -256 -352 -272 -352
WIRE -144 -352 -176 -352
WIRE -960 -272 -960 -288
WIRE -272 -256 -272 -352
WIRE -240 -256 -272 -256
WIRE -640 -240 -640 -352
WIRE -608 -240 -640 -240
WIRE -144 -240 -144 -352
WIRE -144 -240 -176 -240
WIRE -112 -240 -144 -240
WIRE -496 -224 -496 -352
WIRE -496 -224 -544 -224
WIRE -240 -224 -496 -224
WIRE -608 -208 -800 -208
WIRE -960 -192 -960 -208
WIRE -800 -192 -800 -208
WIRE -208 -192 -208 -208
WIRE -576 -176 -576 -192
WIRE -960 -96 -960 -112
WIRE -800 -96 -800 -112
SYMBOL voltage -800 -208 R0
SYMATTR Value AC 1
SYMATTR InstName V1
SYMBOL res -496 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1.5K
SYMBOL voltage -960 -384 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 2.5
SYMATTR InstName V2
SYMBOL Opamps\\LTC6247 -208 -240 R0
SYMATTR InstName U2
SYMBOL res -656 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL cap -384 -368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 660n
SYMBOL res -272 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res -160 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 30K
SYMBOL voltage -960 -208 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value -2.5
SYMATTR InstName V3
SYMBOL Opamps\\LTC6247 -576 -224 R0
SYMATTR InstName U1
FLAG -800 -96 0
FLAG -576 -256 +V
FLAG -800 -208 IN
FLAG -960 -272 0
FLAG -960 -96 0
FLAG -960 -208 -V
FLAG -768 -352 0
FLAG -464 -352 0
FLAG -112 -240 OUT
FLAG -960 -384 +V
FLAG -576 -176 -V
FLAG -208 -192 -V
FLAG -208 -272 +V
TEXT -464 -112 Left 2 !.ac dec 250 10K 20Meg
TEXT -536 -456 Bottom 2 ;60dB 5.5 MHz Gain Block
* Z:\home\khalils\Downloads\files\data\raw_asc\34c5c32c0db0_nand.asc
* Generated by LTspice 26.0.1 for Windows.
* Parametres requis: \nll=longueur \nwn=largeur_nmos \nwp=largeur_pmos
M2 Q in1 N004 N003 NMOS l={ll} w={2*wn} ad={450n*{wn}} as={450n*{wn}} pd={900n+{wn}} ps={1080n+{wn}}
M1 vdd in1 Q N001 PMOS l={ll} w={wp} ad={450n*{wp}} as={450n*{wp}} pd={900n+{wp}} ps={1080n+{wp}}
M4 N004 in2 vss N005 NMOS l={ll} w={2*wn} ad={450n*{wn}} as={450n*{wn}} pd={900n+{wn}} ps={1080n+{wn}}
M3 vdd in2 Q N002 PMOS l={ll} w={wp} ad={450n*{wp}} as={450n*{wp}} pd={900n+{wp}} ps={1080n+{wp}}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib BU_180nm.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1192 836
WIRE 608 160 448 160
WIRE 448 176 448 160
WIRE 448 240 448 176
WIRE 608 240 608 160
WIRE 448 288 448 256
WIRE 608 288 608 256
WIRE 448 384 448 336
WIRE 608 384 608 336
WIRE 608 384 448 384
WIRE 448 416 448 384
WIRE 448 464 448 416
WIRE 448 544 448 512
WIRE 448 624 448 560
WIRE 448 704 448 672
WIRE 448 752 448 720
SYMBOL pmos4 400 240 R0
SYMATTR InstName M1
SYMATTR Value2 l={ll} w={wp} ad={450n*{wp}} as={450n*{wp}} pd={900n+{wp}} ps={1080n+{wp}}
SYMBOL nmos4 400 624 R0
SYMATTR InstName M4
SYMATTR Value2 l={ll} w={2*wn} ad={450n*{wn}} as={450n*{wn}} pd={900n+{wn}} ps={1080n+{wn}}
SYMBOL pmos4 560 240 R0
SYMATTR InstName M3
SYMATTR Value2 l={ll} w={wp} ad={450n*{wp}} as={450n*{wp}} pd={900n+{wp}} ps={1080n+{wp}}
SYMBOL nmos4 400 464 R0
SYMATTR InstName M2
SYMATTR Value2 l={ll} w={2*wn} ad={450n*{wn}} as={450n*{wn}} pd={900n+{wn}} ps={1080n+{wn}}
FLAG 448 176 vdd
FLAG 448 416 Q
FLAG 400 320 in1
FLAG 560 320 in2
FLAG 400 544 in1
FLAG 400 704 in2
FLAG 448 752 vss
TEXT -264 120 Left 2 !.lib BU_180nm.lib
TEXT 936 136 Left 2 ;Parametres requis: \nll=longueur \nwn=largeur_nmos \nwp=largeur_pmos
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7112-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N001 0 4.7n
V1 IN 0 4.3
C1 OUT 0 2.2 Rser=1.5m
Rload OUT 0 22
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=3.3 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 6m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7112-3.3.asy)
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.3
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 22
SYMBOL ADP7112-3.3 224 128 R0
SYMATTR InstName U1
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8629.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8629.asy)
R1 N001 0 10K
V1 +V 0 2.5
XU1 IN N001 +V -V OUT AD8629 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -2.5
Rload OUT 0 10K
R2 OUT N001 10K
Vin IN 0 SINE(0 1 10K)
.tran 1m
.lib AD8629.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 400 -1312 384 -1312
WIRE 496 -1312 480 -1312
WIRE 512 -1312 496 -1312
WIRE 608 -1312 592 -1312
WIRE 160 -1200 160 -1216
WIRE 272 -1200 272 -1216
WIRE 496 -1200 496 -1312
WIRE 512 -1200 496 -1200
WIRE 608 -1184 608 -1312
WIRE 608 -1184 576 -1184
WIRE 736 -1184 608 -1184
WIRE 512 -1168 400 -1168
WIRE 736 -1168 736 -1184
WIRE 400 -1152 400 -1168
WIRE 160 -1104 160 -1120
WIRE 272 -1104 272 -1120
WIRE 736 -1072 736 -1088
WIRE 400 -1056 400 -1072
SYMBOL Opamps\\AD8629 544 -1248 R0
SYMATTR InstName U1
SYMBOL res 608 -1328 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 400 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 496 -1328 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 720 -1184 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 272 -1216 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL voltage 160 -1216 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
FLAG 160 -1216 +V
FLAG 160 -1104 0
FLAG 400 -1056 0
FLAG 736 -1184 OUT
FLAG 400 -1168 IN
FLAG 544 -1216 +V
FLAG 272 -1216 -V
FLAG 544 -1152 -V
FLAG 384 -1312 0
FLAG 736 -1072 0
FLAG 272 -1104 0
TEXT 752 -976 Left 2 !.tran 1m
* Z:\tmp\asc_dec_bjh7r6w2\10422822d535_ampTest0_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N003 0 53.6k
C1 N002 N001 100p
V1 VDD 0 3.3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 576 -160 512 -160
WIRE 688 -160 656 -160
WIRE 512 -64 512 -160
WIRE 512 -64 480 -64
WIRE 576 -64 512 -64
WIRE 688 -64 688 -160
WIRE 688 -64 640 -64
WIRE 384 -32 384 -64
WIRE 224 48 224 16
WIRE 608 96 608 64
WIRE 512 112 512 -64
WIRE 576 112 512 112
WIRE 688 128 688 -64
WIRE 224 144 224 128
WIRE 512 144 224 144
WIRE 224 160 224 144
WIRE 400 208 368 208
WIRE 224 272 224 240
WIRE 48 288 48 256
WIRE -80 304 -80 272
WIRE -80 400 -80 368
WIRE 48 400 48 368
SYMBOL res 208 144 R0
SYMATTR InstName R3
SYMATTR Value 53.6k
SYMBOL cap 640 -80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL Misc\\cell -80 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG -80 400 0
FLAG -80 272 VDD
FLAG 608 64 VDD
FLAG 224 272 0
FLAG 224 16 VDD
FLAG 384 -32 0
FLAG 368 208 SIG
FLAG 48 400 0
FLAG 48 256 SIG