* Z:\home\khalils\Downloads\files\data\raw_asc\6b4d23f53ce0_xor_1.asc
* Generated by LTspice 26.0.1 for Windows.
M9 notA A Vdd Vdd PMOS
M4 N004 B 0 0 NMOS
M12 notB B 0 0 NMOS
M7 N002 notB Vdd Vdd PMOS
M2 Xor_out A N004 N004 NMOS
V2 A 0 PULSE(0 5 1n 0.1n 0.1n 5n 10n)
M11 notB B Vdd Vdd PMOS
M1 N004 notA 0 0 NMOS
V_cmos N003 Xor_out 0
V3 B 0 PULSE(0 5 11n 0.1n 0.1n 10n 20n)
M8 N003 A N002 N002 PMOS
M6 N001 B Vdd Vdd PMOS
M3 Xor_out notB N004 N004 NMOS
M5 N003 notA N001 N001 PMOS
M10 notA A 0 0 NMOS
V1 Vdd 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 70n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1236 680
WIRE 480 -800 304 -800
WIRE 656 -800 480 -800
WIRE 256 -784 224 -784
WIRE 768 -784 704 -784
WIRE -576 -656 -640 -656
WIRE -560 -656 -576 -656
WIRE -640 -608 -640 -656
WIRE 304 -592 304 -704
WIRE 656 -592 656 -704
WIRE 1008 -592 976 -592
WIRE 1024 -592 1008 -592
WIRE 256 -576 160 -576
WIRE 752 -576 704 -576
WIRE -80 -560 -96 -560
WIRE -48 -560 -80 -560
WIRE 976 -528 976 -592
WIRE 1120 -512 1024 -512
WIRE -640 -496 -640 -528
WIRE -48 -496 -48 -560
WIRE 464 -496 304 -496
WIRE 656 -496 464 -496
WIRE -96 -480 -192 -480
WIRE 464 -448 464 -496
WIRE -656 -432 -704 -432
WIRE -640 -432 -656 -432
WIRE 976 -432 960 -432
WIRE -32 -400 -48 -400
WIRE -704 -384 -704 -432
WIRE 1120 -336 1120 -512
WIRE 1168 -336 1120 -336
WIRE 1232 -336 1168 -336
WIRE -224 -320 -240 -320
WIRE -192 -320 -192 -480
WIRE -192 -320 -224 -320
WIRE 464 -320 464 -368
WIRE 560 -320 464 -320
WIRE 592 -320 560 -320
WIRE 768 -320 768 -784
WIRE 880 -320 768 -320
WIRE 960 -320 960 -432
WIRE 960 -320 880 -320
WIRE -32 -288 -32 -400
WIRE 80 -288 -32 -288
WIRE 160 -288 160 -576
WIRE 160 -288 80 -288
WIRE -704 -256 -704 -304
WIRE 464 -256 464 -320
WIRE 464 -256 304 -256
WIRE 656 -256 464 -256
WIRE 960 -256 960 -320
WIRE -32 -224 -32 -288
WIRE -672 -176 -720 -176
WIRE -640 -176 -672 -176
WIRE 256 -176 224 -176
WIRE 768 -176 768 -320
WIRE 768 -176 704 -176
WIRE 1120 -176 1120 -336
WIRE 1120 -176 1008 -176
WIRE 464 -160 304 -160
WIRE 656 -160 464 -160
WIRE -720 -144 -720 -176
WIRE -192 -144 -192 -320
WIRE -80 -144 -192 -144
WIRE 960 -112 960 -160
WIRE -32 -80 -32 -128
WIRE 464 -64 464 -160
WIRE 464 -64 304 -64
WIRE 656 -64 464 -64
WIRE -720 -32 -720 -64
WIRE 160 16 160 -288
WIRE 256 16 160 16
WIRE 768 16 704 16
WIRE 464 32 304 32
WIRE 656 32 464 32
WIRE 464 80 464 32
SYMBOL nmos 704 -256 M0
SYMATTR InstName M3
SYMBOL voltage 464 -464 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V_cmos
SYMATTR Value 0
SYMBOL pmos 704 -704 R180
SYMATTR InstName M7
SYMBOL pmos -96 -400 M180
SYMATTR InstName M9
SYMBOL nmos 1008 -256 M0
SYMATTR InstName M12
SYMBOL nmos -80 -224 R0
SYMATTR InstName M10
SYMBOL pmos 256 -496 M180
SYMATTR InstName M5
SYMBOL nmos 704 -64 M0
SYMATTR InstName M4
SYMBOL nmos 256 -64 R0
SYMATTR InstName M1
SYMBOL voltage -720 -160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 11n 0.1n 0.1n 10n 20n)
SYMBOL voltage -640 -624 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL pmos 704 -496 R180
SYMATTR InstName M8
SYMBOL voltage -704 -400 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 1n 0.1n 0.1n 5n 10n)
SYMBOL nmos 256 -256 R0
SYMATTR InstName M2
SYMBOL pmos 1024 -432 R180
SYMATTR InstName M11
SYMBOL pmos 256 -704 M180
SYMATTR InstName M6
FLAG 464 80 0
FLAG -32 -80 0
FLAG -80 -560 Vdd
FLAG 960 -112 0
FLAG 1008 -592 Vdd
FLAG -640 -496 0
FLAG -576 -656 Vdd
FLAG -704 -256 0
FLAG -720 -32 0
FLAG -656 -432 A
FLAG -672 -176 B
FLAG 480 -800 Vdd
FLAG 224 -176 A
FLAG -224 -320 A
FLAG 752 -576 A
FLAG 80 -288 notA
FLAG 224 -784 B
FLAG 768 16 B
FLAG 1168 -336 B
FLAG 880 -320 notB
FLAG 560 -320 Xor_out
TEXT -754 104 Left 2 !.tran 70n