Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ad4baf19f321_Draft08.asc
* Generated by LTspice 26.0.1 for Windows.
VIN DRAIN_EXCURSION 0 SINE(10 7 1kHz 0 0 0 5)
XU1 N002 N001 VCC VEE VOUT LT1001 ;pnba In+)In-)V+)V-)OUT
V2 VCC 0 5
V3 0 VEE 0
R2 VOUT N001 20k
C1 N001 DRAIN_EXCURSION 100n
D1 VOUT N001 D
D2 N001 VOUT D
V1 N002 0 2.5
XU2 0 N002 VOUT VEE NC_01 NC_02 VALLEY_DETECT VCC LT1011 ;pnba GND)In+)In-)V-)BAL)STROBE)OUT)V+
R1 VCC VALLEY_DETECT 5k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.007
* a little bit of negative feedback to make unstable. should self start.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1011.asy)
.lib LT1011.sub
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1208 680
WIRE 384 -80 368 -80
WIRE 368 -32 368 -80
WIRE 384 -32 368 -32
WIRE 448 -32 448 -80
WIRE 368 16 368 -32
WIRE 448 16 448 -32
WIRE -192 80 -272 80
WIRE 80 80 -32 80
WIRE 304 80 80 80
WIRE 368 80 368 16
WIRE 384 80 368 80
WIRE -272 96 -272 80
WIRE -192 96 -192 80
WIRE -32 96 -32 80
WIRE 448 96 448 16
WIRE 480 96 448 96
WIRE 592 96 480 96
WIRE 352 112 288 112
WIRE 384 112 352 112
WIRE 752 112 672 112
WIRE 592 128 560 128
WIRE 352 192 352 112
WIRE 560 192 560 128
WIRE 560 192 352 192
FLAG -32 176 0
FLAG -192 96 0
FLAG 480 96 VOUT
FLAG 288 192 0
FLAG -272 0 VCC
FLAG 416 64 VCC
FLAG -272 176 VEE
FLAG 416 128 VEE
FLAG 624 64 VCC
FLAG 624 160 VEE
FLAG 608 160 0
FLAG 672 32 VCC
FLAG 80 80 DRAIN_EXCURSION
FLAG 752 112 VALLEY_DETECT
SYMBOL voltage -32 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value SINE(10 7 1kHz 0 0 0 5)
SYMATTR InstName VIN
SYMBOL OpAmps\\OP07 416 32 R0
WINDOW 0 40 50 Left 2
SYMATTR InstName U1
SYMBOL voltage -272 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 48 40 Left 2
SYMATTR Value 5
SYMATTR InstName V2
SYMBOL voltage -272 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
SYMATTR InstName V3
SYMATTR Value 0
SYMBOL res 464 0 R90
WINDOW 0 -34 85 VBottom 2
WINDOW 3 -28 79 VTop 2
SYMATTR InstName R2
SYMATTR Value 20k
SYMBOL cap 368 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 -19 67 VTop 2
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL diode 448 -96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL diode 384 -16 R270
WINDOW 0 26 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL voltage 288 96 R0
WINDOW 0 35 77 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL Comparators\\LT1011 624 112 R0
SYMATTR InstName U2
SYMBOL res 656 16 R0
SYMATTR InstName R1
SYMATTR Value 5k
TEXT 136 320 Left 2 !.tran 0.007
TEXT 592 -104 Left 0 ;a little bit of negative feedback to make unstable. should self start.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1021-7.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1021-7.asy)
V1 IN 0 12
XU1 IN 0 OUT LT1021-7 ;pnba IN)GND)OUT
.tran 1m startup
.lib LT1021-7.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1164 1128
WIRE -272 576 -384 576
WIRE -16 576 -48 576
WIRE -384 592 -384 576
WIRE -384 688 -384 672
WIRE -160 688 -160 656
SYMBOL voltage -384 576 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL LT1021-7 -160 576 R0
SYMATTR InstName U1
FLAG -384 688 0
FLAG -160 688 0
FLAG -16 576 OUT
FLAG -384 576 IN
TEXT -64 736 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0e0a9eb6f6ce_AD8226.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
Vin N001 N004 SINE(0 100m 10K)
R1 N002 N003 5.49K
V2 -V 0 -15
Rload OUT 0 10K
Vcm N004 0 1
Vref N005 0 .5
XU1 N004 N002 N003 N001 -V N005 OUT +V AD8226 ;pnba IN-)RG1)RG2)IN+)VEE)REF)OUT)VCC
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8226.asy)
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 640 -1264 640 -1280
WIRE 752 -1264 752 -1280
WIRE 464 -1184 96 -1184
WIRE 640 -1168 640 -1184
WIRE 752 -1168 752 -1184
WIRE 96 -1152 96 -1184
WIRE 464 -1152 368 -1152
WIRE 752 -1104 640 -1104
WIRE 752 -1088 752 -1104
WIRE 368 -1056 368 -1072
WIRE 464 -1056 368 -1056
WIRE 96 -1024 96 -1072
WIRE 464 -1024 96 -1024
WIRE 576 -1024 576 -1040
WIRE 96 -1008 96 -1024
WIRE 752 -992 752 -1008
WIRE 576 -928 576 -944
WIRE 96 -912 96 -928
FLAG 640 -1280 +V
FLAG 640 -1168 0
FLAG 752 -1104 OUT
FLAG 496 -1200 +V
FLAG 752 -1280 -V
FLAG 496 -1008 -V
FLAG 752 -992 0
FLAG 752 -1168 0
FLAG 96 -912 0
FLAG 576 -928 0
SYMBOL voltage 640 -1280 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 96 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 100m 10K)
SYMBOL res 352 -1168 R0
SYMATTR InstName R1
SYMATTR Value 5.49K
SYMBOL voltage 752 -1280 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 96 -1024 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 35 39 Left 2
SYMATTR InstName Vcm
SYMATTR Value 1
SYMBOL voltage 576 -1040 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName Vref
SYMATTR Value .5
SYMBOL AD8226 496 -1104 R0
SYMATTR InstName U1
TEXT 696 -920 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\a1737be6ba6f_example.asc
* Generated by LTspice 26.0.1 for Windows.
* "Oscilloscope"
* PMT Capacitance
* finite rise time filter
* detector pulse mock-up
* total pulse charge
* detector capacitance
* step voltage
* simulation length
C2 output N002 {C_PMT}
R1 N002 N001 0.1
R7 output 0 50
C1 0 N002 30n
V3 N001 0 PULSE(0 {U} 10n 10p 10p 1)
B1 output_charge 0 V=idt(V(output))/50
.tran 0 200n 0
.param Q -50p
.param C_PMT 200p
.param U Q/C_PMT
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 19840
WIRE -5840 1488 -6000 1488
WIRE -5712 1488 -5840 1488
WIRE -6000 1568 -6000 1488
WIRE -6000 1728 -6000 1648
WIRE -6752 1840 -6912 1840
WIRE -6544 1840 -6672 1840
WIRE -6320 1840 -6544 1840
WIRE -6000 1840 -6256 1840
WIRE -5808 1840 -6000 1840
WIRE -5648 1840 -5808 1840
WIRE -6544 1904 -6544 1840
WIRE -6912 1920 -6912 1840
WIRE -6000 1920 -6000 1840
WIRE -6912 2080 -6912 2000
WIRE -6544 2080 -6544 1968
WIRE -6000 2080 -6000 2000
SYMBOL cap -6256 1824 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {C_PMT}
SYMBOL voltage -6912 1904 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -442 107 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 {U} 10n 10p 10p 1)
SYMBOL bv -6000 1552 R0
SYMATTR InstName B1
SYMATTR Value V=idt(V(output))/50
SYMBOL res -6016 1904 R0
SYMATTR InstName R7
SYMATTR Value 50
SYMBOL cap -6528 1968 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 30n
SYMBOL res -6656 1824 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 0.1
FLAG -6912 2080 0
FLAG -6000 2080 0
FLAG -5808 1840 output
FLAG -6544 2080 0
FLAG -6000 1728 0
FLAG -5840 1488 output_charge
TEXT -6576 1624 Left 2 !.tran 0 200n 0
TEXT -5888 1960 Left 2 ;"Oscilloscope"
TEXT -6368 1752 Left 2 ;PMT Capacitance
TEXT -6784 1752 Left 2 ;finite rise time filter
TEXT -6960 1448 Left 5 ;detector pulse mock-up
TEXT -6904 1536 Left 2 ;total pulse charge
TEXT -6576 1536 Left 2 !.param Q -50p
TEXT -6904 1576 Left 2 ;detector capacitance
TEXT -6576 1576 Left 2 !.param C_PMT 200p
TEXT -7376 1952 Left 2 ;step voltage
TEXT -7200 1952 Left 2 !.param U Q/C_PMT
TEXT -6904 1624 Left 2 ;simulation length
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1931A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1931A.asy)
C1 N001 N002 1
L1 IN N001 10
C4 0 OUT 22 Rser=50m
R2 OUT N003 29.4K
R1 N003 0 10.0K
XU1 N001 0 N003 IN IN LT1931A ;pnba SW)GND)NFB)_SHDN)Vin
L2 OUT N002 10
V1 IN 0 5
Rload OUT 0 20
C2 OUT N003 220p
D1 N002 0 MBRS140
K1 L1 L2 1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LT1931A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1628 936
WIRE 384 448 288 448
WIRE 512 448 384 448
WIRE 560 448 512 448
WIRE 672 448 640 448
WIRE 704 448 672 448
WIRE 800 448 768 448
WIRE 848 448 800 448
WIRE 960 448 928 448
WIRE 1072 448 960 448
WIRE 1168 448 1072 448
WIRE 1264 448 1168 448
WIRE 288 464 288 448
WIRE 1168 464 1168 448
WIRE 1264 464 1264 448
WIRE 800 480 800 448
WIRE 960 496 960 448
WIRE 1072 512 1072 448
WIRE 288 560 288 544
WIRE 512 560 512 448
WIRE 672 560 672 448
WIRE 1168 560 1168 528
WIRE 1264 560 1264 544
WIRE 800 576 800 544
WIRE 384 656 384 448
WIRE 432 656 384 656
WIRE 960 656 960 576
WIRE 960 656 752 656
WIRE 1072 656 1072 576
WIRE 1072 656 960 656
WIRE 960 672 960 656
WIRE 592 768 592 752
WIRE 960 768 960 752
SYMBOL PowerProducts\\LT1931A 592 656 R0
SYMATTR InstName U1
SYMBOL RES 944 480 R0
SYMATTR InstName R2
SYMATTR Value 29.4K
SYMBOL RES 1248 448 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL polcap 704 432 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ind2 544 464 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 4 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL VOLTAGE 288 448 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind2 944 464 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 4 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 10
SYMBOL RES 944 656 R0
SYMATTR InstName R1
SYMATTR Value 10.0K
SYMBOL cap 1056 512 R0
SYMATTR InstName C2
SYMATTR Value 220p
SYMBOL polcap 1152 528 M180
WINDOW 0 24 57 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C4
SYMATTR Value 22
SYMATTR SpiceLine Rser=50m
SYMBOL schottky 784 480 R0
SYMATTR InstName D1
SYMATTR Value MBRS140
FLAG 288 560 0
FLAG 592 768 0
FLAG 1264 560 0
FLAG 1168 560 0
FLAG 960 768 0
FLAG 800 576 0
FLAG 1264 448 OUT
FLAG 288 448 IN
TEXT 1120 704 Left 2 !.tran 500u startup
TEXT 704 368 Left 2 !K1 L1 L2 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3008.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3008.asy)
XU1 IN OUT OUT 0 IN LT3008 ;pnba IN)OUT)ADJ)GND)_SHDN
V1 IN 0 PWL(0 0 1 10)
Rload OUT 0 60
C1 OUT 0 1
.tran 1
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 60
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LT3008 176 96 R0
SYMATTR InstName U1
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 336 248 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\01fed173e32d_6090.asc
* Generated by LTspice 26.0.1 for Windows.
V1 -V 0 -70
XU1 NC_01 N002 IN NC_02 NC_03 OUT NC_04 NC_05 LTC6090 ;pnba COM)IN-)IN+)V-)_TF)OUT)V+)_OD
V2 +V 0 70
R1 OUT N002 435K
C1 OUT N002 10p
V3 N001 0 2.5
R2 N001 N002 16.2K
R3 N002 0 16.9K
V4 IN 0 SINE(1.25 1.35 10K)
.tran 250u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6090.asy)
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1128 680
WIRE 208 -96 96 -96
WIRE 384 -96 320 -96
WIRE 528 -96 448 -96
WIRE -160 -80 -160 -96
WIRE -32 -80 -32 -96
WIRE 96 -80 96 -96
WIRE 208 -80 208 -96
WIRE -160 16 -160 0
WIRE -32 16 -32 0
WIRE 96 16 96 0
WIRE 208 16 208 0
WIRE 320 16 320 -96
WIRE 320 16 208 16
WIRE 384 16 320 16
WIRE 528 16 528 -96
WIRE 528 16 464 16
WIRE 208 32 208 16
WIRE 368 112 368 96
WIRE 208 128 208 112
WIRE 320 160 320 16
WIRE 352 160 320 160
WIRE 528 192 528 16
WIRE 528 192 512 192
WIRE 576 192 528 192
WIRE 352 224 48 224
WIRE 48 240 48 224
WIRE 368 304 368 272
WIRE 48 336 48 320
FLAG -32 16 0
FLAG -32 -96 -V
FLAG -160 16 0
FLAG -160 -96 +V
FLAG 368 304 -V
FLAG 368 96 +V
FLAG 576 192 OUT
FLAG 96 16 0
FLAG 208 128 0
FLAG 48 336 0
FLAG 48 224 IN
SYMBOL voltage -32 -96 R0
SYMATTR InstName V1
SYMATTR Value -70
SYMBOL LTC6090 416 192 R0
SYMATTR InstName U1
SYMBOL voltage -160 -96 R0
SYMATTR InstName V2
SYMATTR Value 70
SYMBOL res 480 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 435K
SYMBOL cap 448 -112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 96 -96 R0
SYMATTR InstName V3
SYMATTR Value 2.5
SYMBOL res 192 -96 R0
SYMATTR InstName R2
SYMATTR Value 16.2K
SYMBOL res 192 16 R0
SYMATTR InstName R3
SYMATTR Value 16.9K
SYMBOL voltage 48 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value SINE(1.25 1.35 10K)
TEXT 528 328 Left 2 !.tran 250u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6400-8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6400-8.asy)
V2 N007 0 -1.5
V1 N004 0 SINE(0 100m 100Meg)
V4 N001 0 1.5
XU1 0 0 N001 N002 N006 N007 N007 N004 N005 N003 LTC6400-8 ;pnba IN-)Vocm)V+)OUT+)OUT-)V-)_EN)IN+)OUTF-)OUTF+
.tran 100n
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 724
WIRE 192 112 -64 112
WIRE -64 128 -64 112
WIRE 192 128 192 112
WIRE 352 160 336 160
WIRE 80 208 64 208
WIRE 352 208 336 208
WIRE -64 224 -64 208
WIRE -160 272 -176 272
WIRE 80 272 -80 272
WIRE 352 272 336 272
WIRE 352 320 336 320
WIRE 144 400 144 368
WIRE 192 400 192 368
WIRE 192 400 144 400
WIRE 240 400 240 368
WIRE 192 432 192 400
WIRE 192 528 192 512
SYMBOL voltage -64 272 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value SINE(0 100m 100Meg)
SYMBOL opamps\\LTC6400-8 208 240 R0
SYMATTR InstName U1
SYMBOL voltage 192 416 R0
SYMATTR InstName V2
SYMATTR Value -1.5
SYMBOL voltage -64 112 R0
SYMATTR InstName V4
SYMATTR Value 1.5
FLAG 192 528 0
FLAG -176 272 0
FLAG 64 208 0
FLAG -64 224 0
FLAG 240 400 0
TEXT 376 448 Left 2 !.tran 100n
* Z:\home\khalils\Downloads\files\data\raw_asc\100de62ee06a_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 N003 D
R1 N002 N001 2k
D2 N004 0 D
V1 N001 0 2.5
R2 N004 N003 2k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 96 96 96
WIRE 352 96 272 96
WIRE 512 96 416 96
WIRE 96 144 96 96
WIRE 512 160 512 96
WIRE 512 272 512 240
WIRE 96 368 96 224
WIRE 512 368 512 336
SYMBOL res 528 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 2k
SYMBOL diode 352 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL voltage 96 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 288 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2k
SYMBOL diode 496 272 R0
SYMATTR InstName D2
FLAG 96 368 0
FLAG 512 368 0
TEXT 62 392 Left 2 !.tran 10ms
* Z:\tmp\asc_dec_bjh7r6w2\11185db704c9_Fig_20_15_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M3 N002 N001 VDD VDD P_1u l=2u w=30u
M2 N001 N002 N003 0 N_1u l=2u w=40u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1556 680
WIRE 1104 -80 1056 -80
WIRE 1120 -80 1104 -80
WIRE 1168 0 1168 -16
WIRE 1104 16 1104 -80
WIRE 1168 16 1168 0
WIRE 1168 16 1104 16
WIRE 1408 16 1168 16
WIRE 1008 32 1008 0
WIRE 1008 32 848 32
WIRE 1008 48 1008 32
WIRE 1072 48 1008 48
WIRE 1408 48 1072 48
WIRE 1008 64 1008 48
WIRE 1168 64 1168 16
WIRE 1008 80 1008 64
WIRE 1072 144 1072 48
WIRE 1072 144 1056 144
WIRE 1120 144 1072 144
WIRE 1008 160 1008 144
WIRE 1168 160 1168 144
WIRE 1168 176 1168 160
WIRE 1008 192 1008 160
WIRE 1168 288 1168 256
SYMBOL pmos4 1056 0 R180
WINDOW 0 63 16 Left 2
WINDOW 123 56 100 Left 2
SYMATTR InstName M3
SYMATTR Value2 l=2u w=30u
SYMATTR Value P_1u
SYMBOL nmos4 1120 64 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=2u w=40u
SYMATTR InstName M2
SYMATTR Value N_1u
FLAG 1008 -48 VDD
FLAG 1008 -96 VDD
FLAG 1168 -48 VDD
FLAG 1168 -96 VDD
FLAG 1008 192 0
FLAG 1008 112 0
FLAG 1168 112 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3686.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3686.asy)
D1 N004 N002 MBRS140
Rload OUT 0 2.75
C1 N001 N002 0.22
L1 N002 OUT 6.8
C3 N005 0 1n
V1 IN 0 12
R2 N006 0 10K
R1 OUT N006 31.6K
R3 N003 0 15.4K
C2 OUT 0 22 Rser=5m
XU1 IN OUT N006 N005 N003 IN 0 N001 N004 N002 0 LT3686 ;pnba Vin)BD)FB)SS)Rt)EN/UVLO)Mode)Boost)DA)SW)GND
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LT3686.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE 96 16 -16 16
WIRE 112 16 96 16
WIRE 672 16 400 16
WIRE -16 32 -16 16
WIRE 96 112 96 16
WIRE 112 112 96 112
WIRE 432 112 400 112
WIRE -16 128 -16 112
WIRE 432 128 432 112
WIRE 112 208 96 208
WIRE 432 208 432 192
WIRE 432 208 400 208
WIRE 496 208 432 208
WIRE 592 208 576 208
WIRE 672 208 672 16
WIRE 672 208 592 208
WIRE 768 208 672 208
WIRE 432 224 432 208
WIRE 672 224 672 208
WIRE 768 224 768 208
WIRE 16 304 0 304
WIRE 112 304 96 304
WIRE 432 304 432 288
WIRE 432 304 400 304
WIRE 592 304 592 208
WIRE 672 320 672 288
WIRE 768 320 768 304
WIRE 32 400 0 400
WIRE 112 400 96 400
WIRE 592 400 592 384
WIRE 592 400 400 400
WIRE 592 416 592 400
WIRE 256 464 256 448
WIRE 592 512 592 496
SYMBOL PowerProducts\\LT3686 256 208 R0
SYMATTR InstName U1
SYMBOL cap 656 224 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMATTR SpiceLine Rser=5m
SYMBOL ind 480 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMBOL cap 416 128 R0
WINDOW 3 25 53 Left 2
SYMATTR Value 0.22
SYMATTR InstName C1
SYMBOL res 576 288 R0
SYMATTR InstName R1
SYMATTR Value 31.6K
SYMBOL res 752 208 R0
SYMATTR InstName Rload
SYMATTR Value 2.75
SYMBOL res 112 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 15.4K
SYMBOL voltage -16 16 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 576 400 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL cap 96 384 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1n
SYMBOL schottky 416 288 M180
WINDOW 0 35 58 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMATTR Description Diode
SYMATTR Type diode
FLAG 592 512 0
FLAG 256 464 0
FLAG 0 400 0
FLAG 0 304 0
FLAG 96 208 0
FLAG 672 320 0
FLAG 768 320 0
FLAG -16 128 0
FLAG -16 16 IN
FLAG 768 208 OUT
TEXT 720 400 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0250f72b62db_Fig6_13.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N003 0 N002 N_1u L=1u W=10u
VGS N003 0 0
VDS N001 0 5
VSB 0 N002 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VGS 0 2 1m VSB 0 5 1
.lib cmosedu_models.txt
* Plot Id(M1)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 352 208 352 192
WIRE 352 304 352 288
WIRE 400 192 352 192
WIRE 448 112 448 80
WIRE 448 272 448 208
WIRE 704 160 448 160
WIRE 704 272 704 240
WIRE 848 80 448 80
WIRE 848 112 848 80
WIRE 848 224 848 192
FLAG 352 304 0
FLAG 448 272 0
FLAG 848 224 0
FLAG 704 272 0
SYMBOL nmos4 400 112 R0
WINDOW 0 59 18 Left 0
WINDOW 3 64 75 Left 0
WINDOW 123 64 103 Left 0
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 L=1u W=10u
SYMBOL voltage 352 192 R0
WINDOW 0 -91 57 Left 0
WINDOW 3 24 104 Invisible 0
SYMATTR InstName VGS
SYMATTR Value 0
SYMBOL voltage 848 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 40 57 Left 0
WINDOW 3 24 104 Invisible 0
SYMATTR InstName VDS
SYMATTR Value 5
SYMBOL voltage 704 256 R180
WINDOW 0 -37 57 Right 0
WINDOW 3 -49 27 Invisible 0
SYMATTR InstName VSB
SYMATTR Value 0
TEXT 448 320 Left 0 !.dc VGS 0 2 1m VSB 0 5 1
TEXT 448 344 Left 0 !.lib cmosedu_models.txt
TEXT 488 56 Left 0 ;Plot Id(M1)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2371-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2371-1.2.asy)
C1 OUT 0 10
L1 N002 OUT 10 Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
V1 IN 0 12
Rload OUT 0 20
R1 OUT N001 10K
XU1 NC_01 IN IN IN N002 OUT N001 0 ADP2371-1.2 IPSM=320m Rt=166666 Rb=333333 C1=9.6p Rc1=100k R3=5.92k Rshort=100MEG PD=1 ;pnba FSEL)SYNC)EN)Vin)SW)FB)PG)PGND
.tran 500u startup
.lib ADP2371-1.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 936 692
WIRE 144 96 16 96
WIRE 176 96 144 96
WIRE 480 96 400 96
WIRE 688 96 560 96
WIRE 16 112 16 96
WIRE 144 176 144 96
WIRE 176 176 144 176
WIRE 432 176 400 176
WIRE 560 176 512 176
WIRE 688 176 688 96
WIRE 688 176 560 176
WIRE 752 176 688 176
WIRE 752 192 752 176
WIRE 16 208 16 192
WIRE 144 336 144 176
WIRE 560 256 560 240
WIRE 560 256 400 256
WIRE 560 272 560 256
WIRE 752 288 752 272
WIRE 176 336 144 336
WIRE 688 336 688 176
WIRE 688 336 400 336
SYMBOL res 576 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL ind 416 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
SYMBOL VOLTAGE 16 96 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ADP2371-1.2 288 208 R0
SYMATTR InstName U1
SYMBOL cap 544 176 R0
WINDOW 0 29 15 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 736 176 R0
SYMATTR InstName Rload
SYMATTR Value 20
FLAG 16 208 0
FLAG 16 96 IN
FLAG 560 272 0
FLAG 752 176 OUT
FLAG 752 288 0
TEXT 504 384 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\002a86ca3041_Fig6_13_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Is(M1)
VSD 0 N003 2
VSG 0 N001 0
M1 N003 N001 0 N002 P_1u L=1u W=10u
VBS N002 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSG 0 2 VBS 0 5 1
.include cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 688
WIRE 448 16 320 16
WIRE 672 16 448 16
WIRE 720 16 672 16
WIRE 320 32 320 16
WIRE 720 48 720 16
WIRE 448 112 448 16
WIRE 320 128 320 112
WIRE 400 128 320 128
WIRE 528 160 448 160
WIRE 672 160 672 16
WIRE 672 160 608 160
WIRE 672 208 672 160
WIRE 448 304 448 208
WIRE 672 304 672 288
WIRE 672 304 448 304
SYMBOL pmos4 400 208 M180
WINDOW 123 56 100 Left 2
SYMATTR Value2 L=1u W=10u
SYMATTR InstName M1
SYMATTR Value P_1u
SYMBOL voltage 320 16 R0
WINDOW 0 -89 56 Left 2
WINDOW 3 -89 84 Left 2
SYMATTR InstName VSG
SYMATTR Value 0
SYMBOL voltage 672 192 R0
WINDOW 0 41 57 Left 2
WINDOW 3 41 85 Left 2
SYMATTR InstName VSD
SYMATTR Value 2
SYMBOL voltage 512 160 M90
WINDOW 0 64 52 VBottom 2
WINDOW 3 62 93 VBottom 2
SYMATTR InstName VBS
SYMATTR Value 0
FLAG 720 48 0
TEXT 424 328 Left 2 !.dc VSG 0 2  VBS 0 5 1
TEXT 424 360 Left 2 !.include cmosedu_models.txt
TEXT 488 -8 Left 2 ;Plot Is(M1)