Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\56a2d4e2fe0b_Draft81.asc
* Generated by LTspice 26.0.1 for Windows.
V2 VCC 0 5
V1 SW1 0 PULSE(0 5 1us 10ns 10ns 25us 50us 20)
XM2 N003 N001 P001 DMP31D7L ;pnba D)G)S
R2 VCC P001 0.01R
XM1 N003 N001 0 DMN63D8L ;pnba D)G)S
R3 N003 0 50R
XM3 N004 N002 P002 FDN360P VTEMP=30 ;pnba D)G)S
R1 VCC P002 0.01R
XM4 N004 N002 0 FDN337N ;pnba D)G)S
R4 N004 0 50R
R5 N002 SW1 200R
R6 N001 SW1 200R
.tran 1.2ms
.include my.lib
* Note current spike 1A, for 6ns.
.param temperature=25
* fdn360p/fdn337n switch time about 1us/3.6A
* DMP/ switch time about 30ns/ 200mA.
* CMOS - compare fets. for cross-conduction
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4244 1268
WIRE 896 -304 848 -304
WIRE 1536 -304 1504 -304
WIRE 512 -224 224 -224
WIRE 1216 -224 944 -224
WIRE 1760 -224 1584 -224
WIRE 848 -144 848 -304
WIRE 896 -144 848 -144
WIRE 1504 -144 1504 -304
WIRE 1536 -144 1504 -144
FLAG 384 -16 0
FLAG 384 -96 VCC
FLAG 224 -144 0
FLAG 512 -224 SW1
FLAG 944 -400 VCC
FLAG 944 -128 0
FLAG 768 -144 SW1
FLAG 1216 -144 0
FLAG 1584 -400 VCC
FLAG 1424 -144 SW1
FLAG 1584 -128 0
FLAG 1760 -144 0
SYMBOL voltage 384 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 48 40 Left 2
SYMATTR Value 5
SYMATTR InstName V2
SYMBOL voltage 224 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 48 40 Left 2
SYMATTR Value PULSE(0 5 1us 10ns 10ns 25us 50us 20)
SYMATTR InstName V1
SYMBOL pmos 896 -224 M180
SYMATTR InstName M2
SYMATTR Value DMP31D7L
SYMATTR Prefix X
SYMBOL res 928 -416 R0
SYMATTR InstName R2
SYMATTR Value 0.01R
SYMBOL nmos 896 -224 R0
SYMATTR InstName M1
SYMATTR Value DMN63D8L
SYMATTR Prefix X
SYMBOL res 1200 -240 R0
SYMATTR InstName R3
SYMATTR Value 50R
SYMBOL pmos 1536 -224 M180
SYMATTR InstName M3
SYMATTR Value FDN360P
SYMATTR Prefix X
SYMATTR Value2 VTEMP=30
SYMBOL res 1568 -416 R0
SYMATTR InstName R1
SYMATTR Value 0.01R
SYMBOL nmos 1536 -224 R0
SYMATTR InstName M4
SYMATTR Value FDN337N
SYMATTR Prefix X
SYMBOL res 1744 -240 R0
SYMATTR InstName R4
SYMATTR Value 50R
SYMBOL res 1520 -160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 200R
SYMBOL res 864 -160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 200R
TEXT 392 -288 Left 2 !.tran 1.2ms
TEXT 512 -520 Left 2 !.include my.lib
TEXT 1024 -576 Left 2 ;Note current spike 1A, for 6ns.
TEXT 432 -456 Left 2 !.param temperature=25
TEXT 1888 -368 Left 2 ;fdn360p/fdn337n switch time about 1us/3.6A
TEXT 744 -8 Left 2 ;DMP/  switch time about 30ns/ 200mA.
TEXT 1168 -720 Left 2 ;CMOS - compare fets. for cross-conduction
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1503-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1503-1.8.asy)
V1 IN 0 PWL(0 6 5m 2.4)
C3 OUT 0 10
C4 N005 0 100p
C2 N002 N003 1
C1 N001 N004 1
XU1 OUT N002 N003 IN N005 N004 0 N001 LTC1503-1.8 ;pnba Vout)C1-)C1+)Vin)_SHDN)C2+)GND)C2-
Rload OUT 0 18
.tran 5m
.lib LTC1503-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1884 2612
WIRE 1296 2208 1168 2208
WIRE 1440 2208 1296 2208
WIRE 1824 2208 1728 2208
WIRE 1168 2224 1168 2208
WIRE 1296 2224 1296 2208
WIRE 1824 2240 1824 2208
WIRE 1440 2272 1376 2272
WIRE 1744 2272 1728 2272
WIRE 1168 2320 1168 2304
WIRE 1296 2320 1296 2288
WIRE 1440 2336 1376 2336
WIRE 1824 2336 1824 2304
WIRE 1824 2336 1728 2336
WIRE 1440 2400 1232 2400
WIRE 1776 2400 1728 2400
WIRE 1232 2416 1232 2400
WIRE 1776 2416 1776 2400
WIRE 1232 2512 1232 2496
WIRE 1776 2512 1776 2480
SYMBOL cap 1760 2416 R0
SYMATTR InstName C4
SYMATTR Value 100p
SYMBOL cap 1360 2272 R0
WINDOW 0 35 17 Left 2
WINDOW 3 37 48 Left 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 1152 2208 R0
SYMATTR InstName Rload
SYMATTR Value 18
SYMBOL voltage 1232 2400 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 6 5m 2.4)
SYMBOL cap 1808 2240 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LTC1503-1.8 1584 2304 R0
SYMATTR InstName U1
SYMBOL cap 1280 2224 R0
SYMATTR InstName C3
SYMATTR Value 10
FLAG 1232 2512 0
FLAG 1744 2272 0
FLAG 1296 2320 0
FLAG 1168 2320 0
FLAG 1776 2512 0
FLAG 1168 2208 OUT
FLAG 1232 2400 IN
TEXT 1552 2544 Left 2 !.tran 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1300.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1300.asy)
V1 IN 0 2.5
L1 IN N001 10 Rser=0.02 Rpar=5000
D1 N001 OUT MBRS140
Rload OUT 0 25
XU1 0 IN N002 OUT N003 IN N001 0 LT1300 ;pnba GND)Sel)SHDN)FB)Ilim)Vin)SW)PGND
C2 OUT 0 100 Rser=0.02
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LT1300.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1508 960
WIRE 544 448 432 448
WIRE 704 448 544 448
WIRE 752 448 704 448
WIRE 864 448 832 448
WIRE 912 448 864 448
WIRE 1008 448 976 448
WIRE 1088 448 1008 448
WIRE 432 464 432 448
WIRE 1088 464 1088 448
WIRE 704 512 704 448
WIRE 432 560 432 544
WIRE 1088 560 1088 544
WIRE 864 592 864 448
WIRE 864 592 832 592
WIRE 576 608 560 608
WIRE 1008 656 1008 448
WIRE 1008 656 832 656
WIRE 1008 672 1008 656
WIRE 544 704 544 448
WIRE 576 704 544 704
WIRE 848 720 832 720
WIRE 1008 752 1008 736
WIRE 640 816 640 800
WIRE 768 816 768 800
SYMBOL SCHOTTKY 912 464 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL VOLTAGE 432 448 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL POWERPRODUCTS\\LT1300 704 656 R0
SYMATTR InstName U1
SYMBOL res 1072 448 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL IND 736 464 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL POLCAP 992 672 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
FLAG 1088 448 OUT
FLAG 1008 752 0
FLAG 1088 560 0
FLAG 432 560 0
FLAG 640 816 0
FLAG 768 816 0
FLAG 432 448 IN
TEXT 984 816 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\098e90a4a199_ADA4500.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4500.asy)
V1 +V 0 2.5
V2 -V 0 -2.5
R2 OUT N001 10K
Rload OUT 0 10K
Vin IN 0 SINE(0 1 10K)
XU1 IN N001 +V -V OUT ADA4500 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 10K
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1152 144 -1168
WIRE 272 -1152 272 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 272 -1056 272 -1072
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 272 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL Opamps\\ADA4500 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
FLAG 144 -1168 +V
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 272 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 272 -1056 0
FLAG 144 -1056 0
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8026.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8026.asy)
Rload OUT 0 .5
R1 IN N001 100K
V1 IN 0 24
R2 N007 0 90.9K
XU1 0 N001 N002 N002 OUT N002 MP_01 N006 MP_02 N004 MP_03 MP_04 MP_05 N005 N007 MP_06 MP_07 MP_08 MP_09 MP_10 MP_11 MP_12 MP_13 MP_14 MP_15 MP_16 MP_17 IN LTM8026 ;pnba GND)RUN)Vref)CTL_T)Vout)CTL_I))SS))ADJ))))Comp)Rt)))))))))))))Vin
R3 N004 0 9.09K
C2 OUT 0 100 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C575OX5ROJI07M" type="X5R"
C1 OUT 0 330 V=6.3 Irms=3.9 Rser=0.01 Lser=0 mfg="KEMET" pn="T520D337M006ASE010" type="Tantalum"
.tran 1.2m startup
.lib LTM8026.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 -80 -128 -80
WIRE 208 -80 -32 -80
WIRE -128 -64 -128 -80
WIRE -32 -64 -32 -80
WIRE 208 -32 208 -80
WIRE -128 32 -128 16
WIRE -32 32 -32 16
WIRE 64 32 -32 32
WIRE 432 32 352 32
WIRE 512 32 432 32
WIRE 608 32 512 32
WIRE 432 48 432 32
WIRE 512 48 512 32
WIRE 608 48 608 32
WIRE 64 128 48 128
WIRE 368 128 352 128
WIRE 432 144 432 112
WIRE 512 144 512 112
WIRE 608 144 608 128
WIRE 48 224 48 128
WIRE 64 224 48 224
WIRE 368 224 352 224
WIRE 464 224 448 224
WIRE 48 320 48 224
WIRE 64 320 48 320
WIRE 368 320 352 320
WIRE 64 416 48 416
WIRE 368 416 352 416
WIRE 464 416 448 416
WIRE 208 496 208 480
SYMBOL cap 416 48 R0
WINDOW 3 24 64 Left 2
SYMATTR Value 100
SYMATTR InstName C2
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C575OX5ROJI07M" type="X5R"
SYMBOL res 352 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 9.09K
SYMBOL polcap 496 48 R0
WINDOW 3 24 64 Left 2
SYMATTR Value 330
SYMATTR InstName C1
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=6.3 Irms=3.9 Rser=0.01 Lser=0 mfg="KEMET" pn="T520D337M006ASE010" type="Tantalum"
SYMBOL PowerProducts\\LTM8026 208 224 R0
SYMATTR InstName U1
SYMBOL res -48 -80 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 352 432 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 90.9K
SYMBOL res 592 32 R0
SYMATTR InstName Rload
SYMATTR Value .5
SYMBOL voltage -128 -80 R0
SYMATTR InstName V1
SYMATTR Value 24
FLAG 208 496 0
FLAG -128 32 0
FLAG -128 -80 IN
FLAG 464 416 0
FLAG 464 224 0
FLAG 608 144 0
FLAG 512 144 0
FLAG 608 32 OUT
FLAG 432 144 0
TEXT 536 440 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3991.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3991.asy)
C1 OUT 0 22
D1 0 N006 DFLS220L
V1 IN 0 12
R2 N007 0 562K
L1 N006 OUT 4.7
C2 N004 N006 .47
XU1 OUT N004 N006 IN N001 N007 N003 N005 N002 MP_01 0 LT3991 ;pnba BD)Boost)SW)Vin)EN)FB)SS)Rt)PG))GND
R5 N001 0 1Meg
Rout OUT 0 2.75
R6 IN N001 5Meg
R1 N005 0 118K
R3 OUT N007 1Meg
C3 N003 0 .001
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LT3991.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 680
WIRE -48 -64 -208 -64
WIRE 400 -64 -48 -64
WIRE -208 -48 -208 -64
WIRE -48 -48 -48 -64
WIRE -208 48 -208 32
WIRE -48 48 -48 32
WIRE 80 48 -48 48
WIRE 400 48 400 -64
WIRE 400 48 368 48
WIRE -48 64 -48 48
WIRE 80 144 64 144
WIRE 592 144 368 144
WIRE -48 160 -48 144
WIRE 0 240 -32 240
WIRE 80 240 64 240
WIRE 400 240 368 240
WIRE 400 256 400 240
WIRE -16 336 -32 336
WIRE 80 336 64 336
WIRE 400 336 400 320
WIRE 400 336 368 336
WIRE 480 336 400 336
WIRE 592 336 592 144
WIRE 592 336 560 336
WIRE 704 336 592 336
WIRE 800 336 704 336
WIRE 400 352 400 336
WIRE 592 352 592 336
WIRE 800 352 800 336
WIRE 704 368 704 336
WIRE 80 432 64 432
WIRE 592 432 368 432
WIRE 400 448 400 416
WIRE 592 448 592 432
WIRE 704 448 704 432
WIRE 800 448 800 432
WIRE 592 544 592 528
SYMBOL PowerProducts\\LT3991 224 240 R0
SYMATTR InstName U1
SYMBOL cap 688 368 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 80 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 118K
SYMBOL ind 464 352 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL schottky 384 416 M180
WINDOW 0 26 68 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value DFLS220L
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res -64 -64 R0
SYMATTR InstName R6
SYMATTR Value 5Meg
SYMBOL cap 384 256 R0
WINDOW 3 24 54 Left 2
SYMATTR Value .47
SYMATTR InstName C2
SYMBOL res 576 336 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL res -64 48 R0
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL cap 64 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL res 784 336 R0
SYMATTR InstName Rout
SYMATTR Value 2.75
SYMBOL voltage -208 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 576 432 R0
SYMATTR InstName R2
SYMATTR Value 562K
FLAG 64 432 0
FLAG -32 336 0
FLAG 800 448 0
FLAG 704 448 0
FLAG 592 544 0
FLAG -208 48 0
FLAG 400 448 0
FLAG -48 160 0
FLAG -32 240 0
FLAG -208 -64 IN
FLAG 800 336 OUT
TEXT 720 536 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0a31805bec67_circuito_AC_c.asc
* Generated by LTspice 26.0.1 for Windows.
L1a 0 0 Na
V1 v1 0 V
L1b N001 0 Nb
Cn N001 v1 C
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 64 16 64
WIRE 80 64 64 64
WIRE 208 64 144 64
WIRE 416 64 304 64
WIRE 208 80 208 64
WIRE 304 80 304 64
WIRE 16 112 16 64
WIRE 416 128 416 64
WIRE 16 208 16 192
WIRE 208 208 208 160
WIRE 304 208 304 160
SYMBOL voltage 16 96 R0
SYMATTR InstName V1
SYMBOL ind2 192 64 R0
WINDOW 0 -42 33 Left 2
WINDOW 3 -41 74 Left 2
SYMATTR InstName L1b
SYMATTR Value Nb
SYMATTR Type ind
SYMBOL cap 144 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName Cn
SYMBOL ind2 320 176 R180
WINDOW 0 -53 84 Left 2
WINDOW 3 -36 32 Left 2
SYMATTR InstName L1a
SYMATTR Value Na
SYMATTR Type ind
FLAG 208 208 0
FLAG 304 208 0
FLAG 64 64 v1
FLAG 416 64 v2
FLAG 416 128 0
FLAG 16 208 0
* Z:\home\khalils\Downloads\files\data\raw_asc\2387f5be90c0_curvetrace.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
V1 N001 0 0.
Q1 N001 N002 0 0 2N2222
I1 0 N002 0.
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 10 10m I1 0 100u 10u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2472 1528
WIRE 2128 1152 1984 1152
WIRE 1984 1200 1984 1152
WIRE 2128 1216 2128 1152
WIRE 1920 1248 1840 1248
WIRE 1840 1264 1840 1248
WIRE 1840 1360 1840 1344
WIRE 1984 1360 1984 1296
WIRE 2128 1360 2128 1296
SYMBOL current 1840 1344 M180
WINDOW 0 23 79 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName I1
SYMATTR Value 0.
SYMBOL npn 1920 1200 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL voltage 2128 1200 R0
SYMATTR InstName V1
SYMATTR Value 0.
FLAG 2128 1360 0
FLAG 1984 1360 0
FLAG 1840 1360 0
TEXT 1824 1416 Left 0 !.dc V1 0 10 10m I1 0 100u 10u
TEXT 1512 1480 Left 0 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\0ea86558b792_up_5bitcounter-clamp.asc
* Generated by LTspice 26.0.1 for Windows.
A1 clk_buf clr 0 0 0 B[0] 0 0 counter cycles=2*{k}
A2 clk_buf clr 0 0 0 B[1] 0 0 counter cycles=4*{k}
A3 clk_buf clr 0 0 0 B[2] 0 0 counter cycles=8*{k}
A4 clk_buf clr 0 0 0 B[3] 0 0 counter cycles=16*{k}
A5 clk_buf clr 0 0 0 B[4] 0 0 counter cycles=32*{k}
A6 clk N001 0 0 0 0 clk_buf 0 AND
A7 B[0] B[1] B[2] B[3] B[4] N001 0 0 AND
.param k=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -160 -160 -208 -160
WIRE -160 -144 -160 -160
WIRE -144 -144 -160 -144
WIRE -144 -128 -208 -128
WIRE -144 -112 -192 -112
WIRE -192 -96 -192 -112
WIRE -192 -96 -208 -96
WIRE -144 -96 -176 -96
WIRE -32 -96 -80 -96
WIRE -144 -80 -160 -80
WIRE -32 -80 -48 -80
WIRE -176 -64 -176 -96
WIRE -176 -64 -208 -64
WIRE -48 -64 -48 -80
WIRE -32 -64 -48 -64
WIRE -48 -48 -48 -64
WIRE -32 -48 -48 -48
WIRE -160 -32 -160 -80
WIRE -160 -32 -208 -32
WIRE -48 -32 -48 -48
WIRE -32 -32 -48 -32
WIRE -16 -32 -16 -48
WIRE -16 -32 -32 -32
IOPIN 320 272 Out
IOPIN 320 112 Out
IOPIN -32 -112 In
IOPIN 320 -48 Out
IOPIN 64 272 Out
IOPIN 64 112 Out
IOPIN -48 272 In
IOPIN 208 -48 In
IOPIN 208 112 In
IOPIN 208 272 In
IOPIN -48 112 In
IOPIN -208 -96 Out
IOPIN -208 -32 Out
IOPIN -208 -64 Out
IOPIN -208 -128 Out
IOPIN -208 -160 Out
SYMBOL Digital\\srflop 256 176 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=2*{k}
SYMATTR InstName A1
SYMATTR SpiceModel counter
SYMBOL Digital\\srflop 0 16 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=32*{k}
SYMATTR InstName A5
SYMATTR SpiceModel counter
SYMBOL Digital\\srflop 0 176 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=16*{k}
SYMATTR InstName A4
SYMATTR SpiceModel counter
SYMBOL Digital\\and -112 -176 R0
SYMATTR InstName A7
SYMBOL Digital\\and 0 -144 R0
SYMATTR InstName A6
SYMBOL Digital\\srflop 256 -144 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=8*{k}
SYMATTR InstName A3
SYMATTR SpiceModel counter
SYMBOL Digital\\srflop 256 16 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=4*{k}
SYMATTR InstName A2
SYMATTR SpiceModel counter
FLAG 208 304 0
FLAG 304 224 0
FLAG 320 272 B[0]
FLAG 208 144 0
FLAG 304 64 0
FLAG 320 112 B[1]
FLAG 208 -16 0
FLAG -32 -112 clk
FLAG 304 -96 0
FLAG 320 -48 B[2]
FLAG -48 304 0
FLAG 48 224 0
FLAG 64 272 B[3]
FLAG -48 144 0
FLAG 48 64 0
FLAG 64 112 B[4]
FLAG -48 272 clr
FLAG 208 -48 clr
FLAG 208 112 clr
FLAG 208 272 clr
FLAG -48 112 clr
FLAG -48 64 clk_buf
FLAG -48 224 clk_buf
FLAG 208 64 clk_buf
FLAG 208 -96 clk_buf
FLAG 208 224 clk_buf
FLAG -32 -32 0
FLAG 32 -64 0
FLAG 32 -96 clk_buf
FLAG -128 -80 0
FLAG -80 -128 0
FLAG -208 -96 B[2]
FLAG -208 -32 B[4]
FLAG -208 -64 B[3]
FLAG -208 -128 B[1]
FLAG -208 -160 B[0]
TEXT 48 -160 Left 2 !.param k=1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1764-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1764-1.8.asy)
C1 OUT 0 10 Rser=100m
Rload OUT 0 500
V1 IN 0 PWL(0 0 1 10)
XU1 IN IN 0 OUT OUT LT1764-1.8 ;pnba _SHDN)IN)GND)OUT)Sense
.tran 1
.lib LT1764.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -224 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 544 48 384 48
WIRE -224 64 -224 48
WIRE 384 64 384 48
WIRE 544 64 544 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -224 160 -224 144
WIRE 384 160 384 128
WIRE 544 160 544 144
WIRE 160 240 160 208
SYMBOL PowerProducts\\LT1764-1.8 160 96 R0
SYMATTR InstName U1
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 528 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL cap 368 64 R0
WINDOW 123 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 10u
SYMATTR Value2 Rser=100m
FLAG -224 160 0
FLAG 384 160 0
FLAG 544 160 0
FLAG 160 240 0
FLAG 544 48 OUT
FLAG -224 48 IN
TEXT 360 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP165-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
C1 OUT 0 1
Rload OUT 0 330
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
XU1 IN 0 N001 OUT ADP16xfd K=303.0u ;pnba Vin)GND)En)Vout
.tran 4m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP165-3.3.asy)
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 448 96 352 96
WIRE 544 96 448 96
WIRE -64 112 -64 96
WIRE 448 112 448 96
WIRE 544 112 544 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 448 208 448 176
WIRE 544 208 544 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
FLAG -64 208 0
FLAG 256 272 0
FLAG 448 208 0
FLAG 544 208 0
FLAG 544 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 432 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 528 96 R0
SYMATTR InstName Rload
SYMATTR Value 330
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL ADP165-3.3 256 208 R0
SYMATTR InstName U1
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\09afbafb5400_randrandomwhite.asc
* Generated by LTspice 26.0.1 for Windows.
* rectangular 0 to +1.0
* smooth 0 to +1.0
* smoother -0.5 to +0.5
* The Random(Noise) Functions in LTSPICE\n \nThese time domain noise functions have a uniform distribution.\nIt means that every value has the same probability.\nThe time step is defined by the parameter FREQUENCY.\n \n rand(time*FREQUENCY) rectangular transitions 0...1.0\n random(time*FREQUENCY) smooth transitions 0...1.0\n white(time*FREQUENCY) more smoother transitions -0.5...+0.5 \n \nYou may add an offset and gain to the functions if you want \na distribution between other limits.\n Example: -1 < V(noise) <1 with random()\nB2 gorandom 0 V=2*random(time*FREQUENCY) -1\n \nChoose the time step for .TRAN less than 0.01/FREQUENCY.\nSwitch off any data compression of the simulator.
* Outpput data compression off
* Plot step time <0.01*1/FREQUENCY. \nFREQUENCY is 1KHz in this example
B1 random 0 V=random(time*1K)
B3 rand 0 V=rand(time*1K)
B2 white 0 V=white(time*1K)
.tran 0 300m
.options maxstep=10u
.options plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1652 680
WIRE 304 192 304 224
WIRE 592 192 592 224
WIRE 16 192 16 224
WIRE 16 112 16 80
WIRE 592 112 592 80
WIRE 304 112 304 80
WIRE 592 80 656 80
WIRE 304 80 368 80
WIRE 16 80 80 80
IOPIN 368 80 Out
IOPIN 656 80 Out
IOPIN 80 80 Out
SYMBOL bv 592 96 R0
SYMATTR InstName B2
SYMATTR Value V=white(time*1K)
SYMBOL bv 16 96 R0
SYMATTR InstName B3
SYMATTR Value V=rand(time*1K)
SYMBOL bv 304 96 R0
SYMATTR InstName B1
SYMATTR Value V=random(time*1K)
FLAG 304 224 0
FLAG 592 224 0
FLAG 16 224 0
FLAG 368 80 random
FLAG 656 80 white
FLAG 80 80 rand
TEXT -8 -160 Left 0 !.tran 0 300m\n.options maxstep=10u
TEXT -8 32 Left 0 ;rectangular  0 to +1.0
TEXT 296 32 Left 0 ;smooth   0 to +1.0
TEXT 568 32 Left 0 ;smoother   -0.5 to +0.5
TEXT -16 -712 Left 0 ;The Random(Noise) Functions in LTSPICE\n \nThese time domain noise functions have a uniform distribution.\nIt means that every value has the same probability.\nThe time step is defined by the parameter FREQUENCY.\n \n  rand(time*FREQUENCY)               rectangular transitions            0...1.0\n  random(time*FREQUENCY)          smooth transitions                   0...1.0\n  white(time*FREQUENCY)             more smoother transitions  -0.5...+0.5   \n \nYou may add an offset and gain to the functions if you want \na distribution between other limits.\n Example:  -1 < V(noise)  <1     with random()\nB2 gorandom 0  V=2*random(time*FREQUENCY) -1\n \nChoose the time step for .TRAN less than 0.01/FREQUENCY.\nSwitch off any data compression of the simulator.
TEXT -8 -72 Left 0 !.options plotwinsize=0
TEXT 280 -72 Left 0 ;Outpput data compression off
TEXT 280 -128 Left 0 ;Plot step time <0.01*1/FREQUENCY. \nFREQUENCY is 1KHz in this example
* Z:\home\khalils\Downloads\files\data\raw_asc\47eb607a0c1f_4.1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 15
D1 N001 N002 D
R1 N002 0 1K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 2 0.02
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 80 16 80
WIRE 368 80 224 80
WIRE 368 128 368 80
WIRE 16 144 16 80
WIRE 16 288 16 224
WIRE 96 288 16 288
WIRE 368 288 368 208
WIRE 368 288 96 288
WIRE 96 320 96 288
SYMBOL diode 160 96 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL voltage 16 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 352 112 R0
SYMATTR InstName R1
SYMATTR Value 1K
FLAG 96 320 0
TEXT 56 184 Left 2 !.dc V1 0 2 0.02