Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1da71189a8d1_DCLink_Gatedriver.asc
* Generated by LTspice 26.0.1 for Windows.
C3 GATE DCLINK 10n
D1 N001 GATE 1N5819
R1 GATE DCLINK 1Meg
R2 DCLINK N002 1
C1 GATE DCLINK 100p
V1 PWM NC_01 PULSE(0 8 10m 50n 50n 10u 20u)
B1 GATEDRIVER 0 V=V(EN)*V(PWM)
D2 N002 N001 1N5819
V2 DCLINK 0 PULSE(0 6 100m 1m 1m 100m 200m)
V3 EN NC_02 PULSE(0 1 10m 100n 100n 10m 20m)
C2 N001 GATEDRIVER 1n
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1248 680
WIRE -416 -208 -416 -224
WIRE -416 -32 -416 -48
WIRE 128 16 80 16
WIRE 400 16 192 16
WIRE 704 16 400 16
WIRE 752 16 704 16
WIRE 784 16 752 16
WIRE 400 48 400 16
WIRE 784 48 784 16
WIRE 704 64 704 16
WIRE -400 112 -416 112
WIRE -32 112 -400 112
WIRE 80 112 80 16
WIRE 80 112 32 112
WIRE 80 160 80 112
WIRE 144 160 80 160
WIRE 256 160 208 160
WIRE 400 160 400 112
WIRE 400 160 336 160
WIRE 624 160 400 160
WIRE 704 160 704 128
WIRE 704 160 624 160
WIRE 784 160 784 128
WIRE 784 160 704 160
WIRE -416 176 -416 112
WIRE 784 176 784 160
WIRE -416 288 -416 256
WIRE 784 288 784 256
SYMBOL cap 384 48 R0
SYMATTR InstName C3
SYMATTR Value 10n
SYMBOL cap 32 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL schottky 208 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N5819
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage 784 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 6 100m 1m 1m 100m 200m)
SYMBOL cap 688 64 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL res 352 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL voltage -416 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 10m 100n 100n 10m 20m)
SYMBOL res 768 32 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL schottky 128 32 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage -416 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 8 10m 50n 50n 10u 20u)
SYMBOL bv -416 160 R0
SYMATTR InstName B1
SYMATTR Value V=V(EN)*V(PWM)
FLAG 784 288 0
FLAG -416 288 0
FLAG 624 160 DCLINK
FLAG 752 16 GATE
FLAG -400 112 GATEDRIVER
FLAG -416 -112 0
FLAG -416 64 0
FLAG -416 -224 PWM
FLAG -416 -48 EN
TEXT -450 328 Left 2 !.tran 500m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3060.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3060.asy)
C1 N002 0 10n
C2 OUT N001 10n
Rload OUT 0 18
V1 IN 0 12
C3 OUT 0 10
R2 N001 0 124K
XU1 N002 N001 OUT MP_01 IN MP_02 IN 0 LT3060 ;pnba Ref/Byp)ADJ)OUT))IN))_SHDN)GND
R1 OUT N001 249K
.tran .1 startup
.lib LT3060.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 112 -16 112
WIRE 96 112 0 112
WIRE 112 112 96 112
WIRE 400 112 368 112
WIRE 480 112 400 112
WIRE 608 112 480 112
WIRE 688 112 608 112
WIRE -16 128 -16 112
WIRE 480 128 480 112
WIRE 608 128 608 112
WIRE 688 128 688 112
WIRE 400 144 400 112
WIRE -16 224 -16 208
WIRE 96 224 96 112
WIRE 112 224 96 224
WIRE 400 224 400 208
WIRE 400 224 368 224
WIRE 480 224 480 208
WIRE 480 224 400 224
WIRE 608 224 608 192
WIRE 688 224 688 208
WIRE 480 240 480 224
WIRE 112 336 80 336
WIRE 400 336 368 336
WIRE 480 336 480 320
WIRE 400 352 400 336
WIRE 400 432 400 416
SYMBOL res 464 224 R0
SYMATTR InstName R2
SYMATTR Value 124K
SYMBOL PowerProducts\\LT3060 240 224 R0
SYMATTR InstName U1
SYMBOL cap 384 352 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap 384 144 R0
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -16 112 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 672 112 R0
SYMATTR InstName Rload
SYMATTR Value 18
SYMBOL cap 592 128 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res 464 112 R0
SYMATTR InstName R1
SYMATTR Value 249K
FLAG 80 336 0
FLAG -16 224 0
FLAG 480 336 0
FLAG 400 432 0
FLAG 608 224 0
FLAG 688 224 0
FLAG 688 112 OUT
FLAG 0 112 IN
TEXT 552 368 Left 2 !.tran .1 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\9fd2acc6256e_trafo_real_mna.asc
* Generated by LTspice 26.0.1 for Windows.
* 1:1
* Directiva SPICE para transformadores
L1 v3 v1 {L1} Rser=0
C2 v3 0 {C2}
K1 L1 L2 {k1}
V1 v1 0 0 AC 1 0 Rser=0
C1 v2 v1 {C1}
L2 v3 v2 {L2} Rser=0
.param k1=kv L1=lv1 L2=lv2 C1=cv1 C2=cv2
.net V(v2) V1
.ac dec 100 .001 100
.param lv1=1 lv2=4 kv=1 cv1=1 cv2=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1328
WIRE 320 384 192 384
WIRE 512 384 384 384
WIRE 128 464 0 464
WIRE 192 464 192 384
WIRE 192 464 128 464
WIRE 304 464 192 464
WIRE 512 464 512 384
WIRE 512 464 400 464
WIRE 576 464 512 464
WIRE 0 528 0 464
WIRE 304 528 304 464
WIRE 400 528 400 464
WIRE 304 624 304 608
WIRE 352 624 304 624
WIRE 400 624 400 608
WIRE 400 624 352 624
WIRE 0 688 0 608
WIRE 352 688 0 688
WIRE 576 688 352 688
WIRE 0 704 0 688
WIRE 352 704 352 688
SYMBOL voltage 0 512 R0
WINDOW 3 24 96 Invisible 2
SYMATTR Value 0
SYMATTR InstName V1
SYMATTR Value2 AC 1 0
SYMATTR SpiceLine Rser=0
SYMBOL cap 336 624 R0
WINDOW 0 -38 31 Left 2
WINDOW 3 47 30 Left 2
SYMATTR InstName C2
SYMATTR Value {C2}
SYMBOL ind2 288 624 M180
WINDOW 0 -34 90 Left 2
WINDOW 3 -24 44 Invisible 2
SYMATTR InstName L1
SYMATTR Value {L1}
SYMATTR Type ind
SYMATTR SpiceLine Rser=0
SYMBOL ind2 416 624 R180
WINDOW 0 -37 95 Left 2
WINDOW 3 -51 22 Left 2
SYMATTR InstName L2
SYMATTR Value {L2}
SYMATTR Type ind
SYMATTR SpiceLine Rser=0
SYMBOL cap 384 368 R90
WINDOW 0 -7 62 VBottom 2
WINDOW 3 30 65 VTop 2
SYMATTR InstName C1
SYMATTR Value {C1}
FLAG 0 704 0
FLAG 128 464 v1
FLAG 576 464 v2
FLAG 352 704 0
FLAG 352 624 v3
TEXT 0 800 Left 2 !K1 L1 L2 {k1}
TEXT 336 496 Left 2 ;1:1
TEXT 0 768 Left 1 ;Directiva SPICE para transformadores
TEXT 312 800 Left 2 !.param k1=kv L1=lv1 L2=lv2 C1=cv1 C2=cv2
TEXT 8 888 Left 2 !.net V(v2) V1
TEXT 0 848 Left 2 !.ac dec 100 .001 100
TEXT 304 840 Left 2 !.param lv1=1 lv2=4 kv=1 cv1=1 cv2=1
* Z:\home\khalils\Downloads\files\data\raw_asc\1a0b1c811488_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
C1 0 N002 10n
Q1 N002 N003 0 0 BFR182
V1 N001 0 9 Rser=0
V3 N003 N004 PULSE(0 VIN_STEP 1n 1n 1n 800n 1u)
V2 N004 0 VIN_BIAS
R1 N001 N002 100
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 -96 32 -96
WIRE 256 -64 256 -96
WIRE 32 16 32 -16
WIRE 256 64 256 16
WIRE 336 64 256 64
WIRE 480 64 400 64
WIRE 480 96 480 64
WIRE 256 112 256 64
WIRE 192 160 -112 160
WIRE -112 192 -112 160
WIRE 256 256 256 208
WIRE -112 304 -112 272
WIRE -112 432 -112 384
SYMBOL npn 192 112 R0
SYMATTR InstName Q1
SYMATTR Value BFR182
SYMBOL voltage 32 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 2
SYMATTR InstName V1
SYMATTR Value 9
SYMATTR SpiceLine Rser=0
SYMBOL voltage -112 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 VIN_STEP 1n 1n 1n 800n 1u)
SYMBOL voltage -112 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value VIN_BIAS
SYMBOL cap 400 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 240 -80 R0
SYMATTR InstName R1
SYMATTR Value 100
FLAG 256 256 0
FLAG 480 96 0
FLAG 32 16 0
FLAG -112 432 0
* Z:\home\khalils\Downloads\files\data\raw_asc\254130f6df1b_eje1_resuelto.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 AC {vg}
rg1 N002 N001 {rg}
L1 N002 N003 {L1}
C1 o 0 {C1}
RL1 o 0 {RL}
rp o N003 {rp}
.param vg = 8.9e-04
.param rg = 10
.param L1 = 4.775e-08
.param rp = 0.3
.param C1 = 4.775e-11
.param RL = 100
.ac dec 1e4 10e6 1000e6
.net V(o) V1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 80 -96 80
WIRE 112 80 48 80
WIRE 224 80 192 80
WIRE 416 80 304 80
WIRE 496 80 416 80
WIRE 512 80 496 80
WIRE -96 112 -96 80
WIRE 416 112 416 80
WIRE 512 112 512 80
WIRE -96 224 -96 192
WIRE 416 224 416 176
WIRE 512 224 512 192
FLAG -96 224 0
FLAG 416 224 0
FLAG 512 224 0
FLAG 496 80 o
SYMBOL voltage -96 96 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC {vg}
SYMBOL res 64 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName rg1
SYMATTR Value {rg}
SYMBOL ind 96 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value {L1}
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value {C1}
SYMBOL res 496 96 R0
SYMATTR InstName RL1
SYMATTR Value {RL}
SYMBOL res 320 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName rp
SYMATTR Value {rp}
TEXT -104 272 Left 2 !.param vg  =  8.9e-04 \n.param rg  =  10 \n.param L1  =  4.775e-08 \n.param rp  =  0.3 \n.param C1  =  4.775e-11 \n.param RL  =  100
TEXT -130 432 Left 2 !.ac dec 1e4 10e6 1000e6
TEXT 312 280 Left 2 !.net V(o) V1
* Z:\home\khalils\Downloads\files\data\raw_asc\fra_eg1.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N001 +V -V A level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
V2 -V 0 -5
R1 B N001 10K
R2 N001 0 1K
@1 A B delay=100u fstart=100 fend=10Meg oct=4 fcoarse=10k nmax=50k 3 500k 1 pp0=100m pp1=10m f0=50k f1=500k tavgmin=100u tsettle=2u acmag=1
C1 A 0 50n
C2 N001 0 100p
.fra
* .ac oct 4 100 10Meg
* This example shows the basic principle of extracting\nthe small signal AC characteristics from an \nLTspice Frequency Response Analysis (FRA) simulation.
* To use this technique in your own simulations,\n include an fra device and the .fra directive.\nThe fra device controls the frequency analysis parameters.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4156 1252
WIRE 1504 544 1472 544
WIRE 1600 544 1584 544
WIRE 1632 544 1600 544
WIRE 1744 544 1712 544
WIRE 1760 544 1744 544
WIRE 1840 544 1824 544
WIRE 1856 544 1840 544
WIRE 1936 576 1936 560
WIRE 2032 576 2032 560
WIRE 1600 640 1600 544
WIRE 1760 640 1600 640
WIRE 1600 656 1600 640
WIRE 1856 656 1856 544
WIRE 1856 656 1824 656
WIRE 1760 672 1744 672
WIRE 1936 672 1936 656
WIRE 2032 672 2032 656
WIRE 1600 736 1600 720
WIRE 1856 736 1856 720
FLAG 1936 672 0
FLAG 2032 672 0
FLAG 1936 560 +V
FLAG 1792 624 +V
FLAG 2032 560 -V
FLAG 1792 688 -V
FLAG 1744 672 0
FLAG 1472 544 0
FLAG 1856 736 0
FLAG 1600 736 0
FLAG 1840 544 A
FLAG 1744 544 B
SYMBOL Opamps\\UniversalOpamp2 1792 656 R0
SYMATTR InstName U1
SYMBOL voltage 1936 560 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 2032 560 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 1728 528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 1600 528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL fra 1760 544 R90
WINDOW 0 -19 -26 VBottom 2
WINDOW 40 37 -28 VBottom 2
SYMATTR InstName @1
SYMATTR SpiceLine delay=100u fstart=100 fend=10Meg oct=4 fcoarse=10k nmax=50k 3 500k 1 pp0=100m pp1=10m f0=50k f1=500k tavgmin=100u tsettle=2u
SYMATTR SpiceLine2 acmag=1
SYMBOL cap 1840 656 R0
SYMATTR InstName C1
SYMATTR Value 50n
SYMBOL cap 1584 656 R0
SYMATTR InstName C2
SYMATTR Value 100p
TEXT 2200 560 Left 2 !.fra
TEXT 2112 592 Left 2 ;.ac oct 4 100 10Meg
TEXT 1888 288 Center 2 ;This example shows the basic principle of extracting\nthe small signal AC characteristics from an \nLTspice Frequency Response Analysis (FRA) simulation.
TEXT 1576 392 Left 2 ;To use this technique in your own simulations,\n include an fra device and the .fra directive.\nThe fra device controls the frequency analysis parameters.
LINE Normal 1680 672 1680 672 2
LINE Normal 1680 672 1680 672 2
LINE Normal 2128 752 2128 752 2
LINE Normal 2128 752 2128 752 2
LINE Normal 2128 752 2128 752 2
LINE Normal 2128 752 2128 752 2
LINE Normal 1712 464 1760 512 2
LINE Normal 1648 656 1648 656 2
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8415.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N007 N008 604K
V1 IN 0 3.6 Rser=0.1
L1 IN N001 100
C1 N002 0 22000p
C2 N003 0 .1
R2 N008 0 412K
C3 N007 0 .01 Rser=10m
XU1 IN IN 0 N001 N004 N004 N006 N005 N003 N002 N007 N008 LT8415 ;pnba _SHDN)Vcc)GND)SW)IN1)IN2)OUT2)OUT1)Vout)CAP)Vref)FBP
V2 N004 0 PULSE(0 3.3 0 1u 1u 50u 100u) Rser=0.1
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8415.asy)
.lib LT8415.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2836 1572
WIRE 1648 880 1552 880
WIRE 1664 880 1648 880
WIRE 1760 880 1744 880
WIRE 2016 880 1888 880
WIRE 1552 896 1552 880
WIRE 2016 896 2016 880
WIRE 1760 944 1760 880
WIRE 1888 944 1888 880
WIRE 2016 976 2016 960
WIRE 1552 992 1552 976
WIRE 1648 1008 1648 880
WIRE 1680 1008 1648 1008
WIRE 2080 1008 1968 1008
WIRE 2176 1008 2144 1008
WIRE 1680 1088 1248 1088
WIRE 2000 1088 1968 1088
WIRE 1248 1168 1248 1088
WIRE 1680 1168 1248 1168
WIRE 2000 1168 1968 1168
WIRE 1248 1184 1248 1168
WIRE 2000 1248 1968 1248
WIRE 2112 1248 2000 1248
WIRE 2112 1264 2112 1248
WIRE 1248 1280 1248 1264
WIRE 1648 1328 1648 1008
WIRE 1680 1328 1648 1328
WIRE 2000 1328 1968 1328
WIRE 2000 1344 2000 1328
WIRE 2112 1344 2112 1328
WIRE 1824 1408 1824 1392
WIRE 2000 1440 2000 1424
FLAG 1824 1408 0
FLAG 1552 992 0
FLAG 1552 880 IN
FLAG 2016 976 0
FLAG 2176 1008 0
FLAG 2000 1440 0
FLAG 2112 1344 0
FLAG 1248 1280 0
SYMBOL RES 1984 1232 R0
SYMATTR InstName R1
SYMATTR Value 604K
SYMBOL VOLTAGE 1552 880 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMATTR SpiceLine Rser=0.1
SYMBOL ind 1648 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMBOL cap 2000 896 R0
WINDOW 3 24 52 Left 2
SYMATTR Value 22000p
SYMATTR InstName C1
SYMBOL cap 2080 1024 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL RES 1984 1328 R0
SYMATTR InstName R2
SYMATTR Value 412K
SYMBOL cap 2096 1264 R0
SYMATTR InstName C3
SYMATTR Value .01
SYMATTR SpiceLine Rser=10m
SYMBOL PowerProducts\\LT8415 1824 1168 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1248 1168 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 0 1u 1u 50u 100u)
SYMATTR SpiceLine Rser=0.1
TEXT 2192 1400 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0ea86558b792_up_5bitcounter-clamp.asc
* Generated by LTspice 26.0.1 for Windows.
A1 clk_buf clr 0 0 0 B[0] 0 0 counter cycles=2*{k}
A2 clk_buf clr 0 0 0 B[1] 0 0 counter cycles=4*{k}
A3 clk_buf clr 0 0 0 B[2] 0 0 counter cycles=8*{k}
A4 clk_buf clr 0 0 0 B[3] 0 0 counter cycles=16*{k}
A5 clk_buf clr 0 0 0 B[4] 0 0 counter cycles=32*{k}
A6 clk N001 0 0 0 0 clk_buf 0 AND
A7 B[0] B[1] B[2] B[3] B[4] N001 0 0 AND
.param k=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -160 -160 -208 -160
WIRE -160 -144 -160 -160
WIRE -144 -144 -160 -144
WIRE -144 -128 -208 -128
WIRE -144 -112 -192 -112
WIRE -192 -96 -192 -112
WIRE -192 -96 -208 -96
WIRE -144 -96 -176 -96
WIRE -32 -96 -80 -96
WIRE -144 -80 -160 -80
WIRE -32 -80 -48 -80
WIRE -176 -64 -176 -96
WIRE -176 -64 -208 -64
WIRE -48 -64 -48 -80
WIRE -32 -64 -48 -64
WIRE -48 -48 -48 -64
WIRE -32 -48 -48 -48
WIRE -160 -32 -160 -80
WIRE -160 -32 -208 -32
WIRE -48 -32 -48 -48
WIRE -32 -32 -48 -32
WIRE -16 -32 -16 -48
WIRE -16 -32 -32 -32
IOPIN 320 272 Out
IOPIN 320 112 Out
IOPIN -32 -112 In
IOPIN 320 -48 Out
IOPIN 64 272 Out
IOPIN 64 112 Out
IOPIN -48 272 In
IOPIN 208 -48 In
IOPIN 208 112 In
IOPIN 208 272 In
IOPIN -48 112 In
IOPIN -208 -96 Out
IOPIN -208 -32 Out
IOPIN -208 -64 Out
IOPIN -208 -128 Out
IOPIN -208 -160 Out
SYMBOL Digital\\and -112 -176 R0
SYMATTR InstName A7
SYMBOL Digital\\and 0 -144 R0
SYMATTR InstName A6
SYMBOL Digital\\srflop 0 176 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=16*{k}
SYMATTR InstName A4
SYMATTR SpiceModel counter
SYMBOL Digital\\srflop 256 -144 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=8*{k}
SYMATTR InstName A3
SYMATTR SpiceModel counter
SYMBOL Digital\\srflop 256 16 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=4*{k}
SYMATTR InstName A2
SYMATTR SpiceModel counter
SYMBOL Digital\\srflop 256 176 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=2*{k}
SYMATTR InstName A1
SYMATTR SpiceModel counter
SYMBOL Digital\\srflop 0 16 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=32*{k}
SYMATTR InstName A5
SYMATTR SpiceModel counter
FLAG 208 304 0
FLAG 304 224 0
FLAG 320 272 B[0]
FLAG 208 144 0
FLAG 304 64 0
FLAG 320 112 B[1]
FLAG 208 -16 0
FLAG -32 -112 clk
FLAG 304 -96 0
FLAG 320 -48 B[2]
FLAG -48 304 0
FLAG 48 224 0
FLAG 64 272 B[3]
FLAG -48 144 0
FLAG 48 64 0
FLAG 64 112 B[4]
FLAG -48 272 clr
FLAG 208 -48 clr
FLAG 208 112 clr
FLAG 208 272 clr
FLAG -48 112 clr
FLAG -48 64 clk_buf
FLAG -48 224 clk_buf
FLAG 208 64 clk_buf
FLAG 208 -96 clk_buf
FLAG 208 224 clk_buf
FLAG -32 -32 0
FLAG 32 -64 0
FLAG 32 -96 clk_buf
FLAG -128 -80 0
FLAG -80 -128 0
FLAG -208 -96 B[2]
FLAG -208 -32 B[4]
FLAG -208 -64 B[3]
FLAG -208 -128 B[1]
FLAG -208 -160 B[0]
TEXT 48 -160 Left 2 !.param k=1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1740-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1740-1.5.asy)
C2 N002 0 10n
C1 OUT 0 4.7 Rser=3m
R1 IN N001 100k
Rload OUT 0 0.75
XU1 IN OUT IN N002 OUT N001 MP_01 0 ADP1740-1.5 ;pnba Vin)Sense)EN)SS)Vout)PG))GND
V1 IN 0 1.8
.tran 10m startup
.lib ADP1740-1.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE -112 32 -128 32
WIRE -16 32 -112 32
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 416 32 368 32
WIRE 496 32 416 32
WIRE 528 32 496 32
WIRE -128 48 -128 32
WIRE -16 48 -16 32
WIRE 416 48 416 32
WIRE 528 48 528 32
WIRE 80 96 80 32
WIRE 96 96 80 96
WIRE -128 144 -128 128
WIRE 416 144 416 112
WIRE 528 144 528 128
WIRE -16 176 -16 128
WIRE 96 176 -16 176
WIRE 16 240 0 240
WIRE 96 240 80 240
WIRE 368 240 368 32
WIRE 368 240 352 240
WIRE 224 304 224 288
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 0.75
SYMBOL ADP1740-1.5 224 128 R0
SYMATTR InstName U1
SYMBOL cap 80 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res -32 32 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL cap 400 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=3m
SYMBOL voltage -128 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
FLAG 224 304 0
FLAG -128 144 0
FLAG 0 240 0
FLAG -112 32 IN
FLAG 528 144 0
FLAG 416 144 0
FLAG 496 32 OUT
TEXT 128 352 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX9062.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\MAX9062.asy)
Vcc VCC 0 3.3
R1 VCC OUT 10k
XU1 IN VCC 0 OUT MAX9062 ;pnba IN)VCC)GND)OUT
Vin IN 0 PWL(0 250m 500u 150m 1m 250m 1.5m 150m 2m 250m)
.tran 2m
.lib MAX9062.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 32 32 16 32
WIRE 144 32 112 32
WIRE 224 32 144 32
WIRE 288 32 224 32
WIRE 288 48 288 32
WIRE 144 112 144 32
WIRE 64 144 32 144
WIRE 112 144 64 144
WIRE 224 144 176 144
WIRE 288 144 288 128
WIRE 288 144 224 144
WIRE 32 176 32 144
WIRE 144 192 144 176
WIRE 32 272 32 256
SYMBOL MAX9062 144 144 R0
SYMATTR InstName U1
SYMBOL voltage 128 32 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Vcc
SYMATTR Value 3.3
SYMBOL voltage 32 160 R0
WINDOW 123 24 124 Left 2
SYMATTR Value2 250m 1.5m 150m 2m 250m)
SYMATTR InstName Vin
SYMATTR Value PWL(0 250m 500u 150m 1m
SYMBOL res 272 32 R0
SYMATTR InstName R1
SYMATTR Value 10k
FLAG 224 32 VCC
FLAG 224 144 OUT
FLAG 144 192 0
FLAG 16 32 0
FLAG 32 272 0
FLAG 64 144 IN
TEXT -40 328 Left 2 !.tran 2m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1963-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1963-1.8.asy)
C1 OUT 0 10 Rser=50m
V1 IN 0 PWL(0 0 1 10)
XU1 IN IN 0 OUT OUT LT1963-1.8 ;pnba _SHDN)IN)GND)OUT)SENSE
Rload OUT 0 1K
.tran 1
.lib LT1963.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 48 -208 48
WIRE 32 48 16 48
WIRE 352 48 320 48
WIRE 400 48 352 48
WIRE 560 48 400 48
WIRE -208 64 -208 48
WIRE 400 64 400 48
WIRE 560 64 560 48
WIRE 16 144 16 48
WIRE 32 144 16 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 400 160 400 128
WIRE 560 160 560 144
WIRE 176 240 176 208
SYMBOL cap 384 64 R0
WINDOW 3 40 33 Left 2
WINDOW 39 24 59 Left 2
SYMATTR Value 10
SYMATTR SpiceLine Rser=50m
SYMATTR InstName C1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL PowerProducts\\LT1963-1.8 176 96 R0
SYMATTR InstName U1
SYMBOL res 544 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
FLAG -208 160 0
FLAG 400 160 0
FLAG 560 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 560 48 OUT
TEXT 400 224 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\d178110ec813_ivchar.asc
* Generated by LTspice 26.0.1 for Windows.
R1 x N003 500
R2 y x 1k
R3 N002 y 5.6k
R4 N002 0 10k
R5 N002 A 1k
V1 N003 0 10
I1 0 x 5m
R6 N002 N001 3.3k
B1 0 y I=2*(V(x)-V(y))
B2 N001 x V=3*I(R1)
R7 N004 A 1k
Vs N004 0 0
.dc Vs 0 10 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1080 680
WIRE 320 -48 272 -48
WIRE 528 -48 400 -48
WIRE 624 -48 608 -48
WIRE 128 160 96 160
WIRE 272 160 272 -48
WIRE 272 160 208 160
WIRE 320 160 272 160
WIRE 448 160 400 160
WIRE 496 160 448 160
WIRE 624 160 624 -48
WIRE 624 160 576 160
WIRE 688 160 624 160
WIRE 816 160 768 160
WIRE 848 160 816 160
WIRE 1024 160 928 160
WIRE 624 224 624 160
WIRE 448 240 448 160
WIRE 96 256 96 160
WIRE 272 256 272 160
WIRE 1024 256 1024 160
WIRE 96 416 96 336
WIRE 272 416 272 336
WIRE 272 416 96 416
WIRE 448 416 448 320
WIRE 448 416 272 416
WIRE 624 416 624 304
WIRE 624 416 448 416
WIRE 640 416 624 416
WIRE 1024 416 1024 336
WIRE 1024 416 640 416
WIRE 448 432 448 416
FLAG 448 432 0
FLAG 640 416 B
FLAG 272 160 x
FLAG 448 160 y
FLAG 816 160 A
SYMBOL res 224 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 40 58 VTop 2
SYMATTR InstName R1
SYMATTR Value 500
SYMBOL res 416 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 592 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5.6k
SYMBOL res 608 208 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL res 672 176 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL voltage 96 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL current 272 336 R180
WINDOW 0 4 86 Left 2
WINDOW 3 1 1 Left 2
SYMATTR InstName I1
SYMATTR Value 5m
SYMBOL res 624 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 3.3k
SYMBOL bi 448 320 R180
WINDOW 0 24 80 Left 2
WINDOW 3 -93 -17 Left 2
SYMATTR InstName B1
SYMATTR Value I=2*(V(x)-V(y))
SYMBOL bv 416 -48 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName B2
SYMATTR Value V=3*I(R1)
SYMBOL res 944 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 1k
SYMBOL voltage 1024 240 R0
WINDOW 3 19 96 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vs
SYMATTR Value 0
TEXT 104 480 Left 2 !.dc Vs 0 10 0.1