Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1764-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N004 0 1
C2 N003 0 10n
V1 IN 0 1.8
R2 N001 IN 50K
C3 N002 0 1
R1 OUT 0 .8
C4 OUT 0 10
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1764 Radj=10033.44 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1764-1.5.asy)
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value .8
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL ADP1764-1.5 224 176 R0
SYMATTR InstName U1
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2441.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2441.asy)
R4 N008 0 118K
C3 OUT 0 38 Rser=1m
XU1 N009 N005 N007 N003 0 0 N001 IN N002 N010 N006 N004 ADP2441 ;pnba Comp)FB)Vcc)SW)GND)PGND)BST)Vin)EN)Pgood)Freq)SS/TRK
R2 N005 0 10K
R3 N007 N010 50K
C1 N007 0 1
Rload OUT 0 5
R7 IN N002 182K
C2 N001 N003 10n
R6 N006 0 182K
R8 N002 0 10K
C4 N009 N008 270p
L1 N003 OUT 27.3 Rser=89m
R1 OUT N005 73.2K
V1 IN 0 24
.tran 3m startup
.lib ADP2441.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 728
WIRE -208 -32 -320 -32
WIRE 0 -32 -208 -32
WIRE 400 -32 352 -32
WIRE -320 -16 -320 -32
WIRE -208 -16 -208 -32
WIRE 400 -16 400 -32
WIRE -320 80 -320 64
WIRE -208 80 -208 64
WIRE 0 80 -208 80
WIRE 400 80 400 48
WIRE 400 80 352 80
WIRE 464 80 400 80
WIRE 608 80 544 80
WIRE 720 80 608 80
WIRE 816 80 720 80
WIRE -208 96 -208 80
WIRE 608 96 608 80
WIRE 720 96 720 80
WIRE 816 96 816 80
WIRE -208 192 -208 176
WIRE 0 192 -16 192
WIRE 608 192 608 176
WIRE 608 192 352 192
WIRE 720 192 720 160
WIRE 816 192 816 176
WIRE 608 208 608 192
WIRE -96 304 -112 304
WIRE 0 304 -16 304
WIRE 400 304 352 304
WIRE 464 304 400 304
WIRE 544 304 528 304
WIRE 608 304 608 288
WIRE 400 320 400 304
WIRE -176 416 -192 416
WIRE -80 416 -96 416
WIRE 0 416 -16 416
WIRE 400 416 400 400
WIRE 400 416 352 416
WIRE 112 496 112 480
WIRE 240 496 240 480
SYMBOL res 592 80 R0
SYMATTR InstName R1
SYMATTR Value 73.2K
SYMBOL voltage -320 -32 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 384 304 R0
SYMATTR InstName R3
SYMATTR Value 50K
SYMBOL ind 448 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 27.3
SYMATTR SpiceLine Rser=89m
SYMBOL res -224 80 R0
SYMATTR InstName R8
SYMATTR Value 10K
SYMBOL res 592 192 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL ADP2441 176 192 R0
SYMATTR InstName U1
SYMBOL res 800 80 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL cap 464 320 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 384 -16 R0
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL cap -16 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 270p
SYMBOL res -224 -32 R0
SYMATTR InstName R7
SYMATTR Value 182K
SYMBOL cap 704 96 R0
SYMATTR InstName C3
SYMATTR Value 38
SYMATTR SpiceLine Rser=1m
SYMBOL res -80 400 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 118K
SYMBOL res 0 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 182K
FLAG 112 496 0
FLAG 608 304 0
FLAG -192 416 0
FLAG -320 80 0
FLAG 720 192 0
FLAG 816 192 0
FLAG 816 80 OUT
FLAG -320 -32 IN
FLAG 240 496 0
FLAG -112 304 0
FLAG -208 192 0
FLAG 544 304 0
TEXT 592 400 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\19640942f36d_6011.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 10
V2 -V 0 -10
R1 N002 N001 1K
R2 N001 0 1K
V3 N003 0 SINE(0 1 1K)
XU1 N003 N001 N002 +V -V LT6011 ;pnba IN+)IN-)OUT)VCC)VEE
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6011.asy)
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -112 48 -128 48
WIRE 0 48 -32 48
WIRE 96 48 0 48
WIRE 208 48 176 48
WIRE 64 112 64 96
WIRE -416 160 -416 144
WIRE -288 160 -288 144
WIRE 0 160 0 48
WIRE 32 160 0 160
WIRE 208 192 208 48
WIRE 208 192 176 192
WIRE 32 224 -160 224
WIRE -160 240 -160 224
WIRE -416 256 -416 240
WIRE -288 256 -288 240
WIRE 64 288 64 272
WIRE -160 336 -160 320
FLAG -288 256 0
FLAG 64 96 +V
FLAG -288 144 +V
FLAG 64 288 -V
FLAG -416 256 0
FLAG -416 144 -V
FLAG -128 48 0
FLAG -160 336 0
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL voltage -416 144 R0
SYMATTR InstName V2
SYMATTR Value -10
SYMBOL res 192 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res -16 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -160 224 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL opamps\\LT6011 64 192 R0
SYMATTR InstName U1
TEXT 144 360 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\40ee0e7b2def_Fig9_30_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Is(M1)
VSG 0 N001 0
VBS N002 0 0
VSD 0 N003 1
M1 N003 N001 0 N002 P_50n l=100n w=5u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSG 0 1
.include cmosedu_models.txt
.temp 0 50 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 688
WIRE 448 16 320 16
WIRE 672 16 448 16
WIRE 720 16 672 16
WIRE 320 32 320 16
WIRE 720 48 720 16
WIRE 448 112 448 16
WIRE 320 128 320 112
WIRE 400 128 320 128
WIRE 528 160 448 160
WIRE 672 160 672 16
WIRE 672 160 608 160
WIRE 672 208 672 160
WIRE 448 304 448 208
WIRE 672 304 672 288
WIRE 672 304 448 304
SYMBOL pmos4 400 208 M180
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=100n w=5u
SYMATTR InstName M1
SYMATTR Value P_50n
SYMBOL voltage 320 16 R0
WINDOW 0 -89 56 Left 2
WINDOW 3 24 104 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VSG
SYMATTR Value 0
SYMBOL voltage 672 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 41 57 Left 2
WINDOW 3 41 85 Left 2
SYMATTR InstName VSD
SYMATTR Value 1
SYMBOL voltage 512 160 M90
WINDOW 0 64 48 VBottom 2
WINDOW 3 52 90 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VBS
SYMATTR Value 0
FLAG 720 48 0
TEXT 424 344 Left 2 !.dc VSG 0 1
TEXT 424 392 Left 2 !.include cmosedu_models.txt
TEXT 488 -8 Left 2 ;Plot Is(M1)
TEXT 424 368 Left 2 !.temp 0 50 100
* Z:\home\khalils\Downloads\files\data\raw_asc\d3fc4b6b1431_Draft3N.asc
* Generated by LTspice 26.0.1 for Windows.
VDS N001 0 0.9
M1 N001 VG P001 0 nch l=1u w=1u
VBS P001 0 1
VGS VG 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib cmos018.txt
.STEP VBS 0 1 1m
.MEAS DC UTH FIND V(VG) WHEN Id(M1)=500n
.DC VGS 0 2 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 928 680
WIRE 576 64 256 64
WIRE 256 112 256 64
WIRE 576 112 576 64
WIRE 320 160 256 160
WIRE 160 192 64 192
WIRE 208 192 160 192
WIRE 64 208 64 192
WIRE 64 304 64 288
WIRE 256 304 256 288
WIRE 320 304 320 160
WIRE 576 304 576 192
SYMBOL voltage 576 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 0.9
SYMBOL voltage 256 192 R0
WINDOW 0 -85 35 Left 2
WINDOW 3 -69 68 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VBS
SYMATTR Value 1
SYMBOL nmos4 208 112 R0
WINDOW 0 123 22 Left 2
WINDOW 3 123 47 Left 2
WINDOW 123 124 75 Left 2
SYMATTR InstName M1
SYMATTR Value nch
SYMATTR Value2 l=1u w=1u
SYMBOL voltage 64 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 1
FLAG 256 304 0
FLAG 576 304 0
FLAG 64 304 0
FLAG 160 192 VG
FLAG 320 304 0
TEXT 32 -112 Left 2 !.lib cmos018.txt
TEXT 32 -80 Left 2 !.STEP VBS 0 1 1m
TEXT 32 -16 Left 2 !.MEAS DC UTH FIND V(VG) WHEN Id(M1)=500n
TEXT 32 -48 Left 2 !.DC VGS 0 2 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\38b10ae2f794_inv_transfer.asc
* Generated by LTspice 26.0.1 for Windows.
AX1 N001 0 0 0 0 0 0 0 BUF ll=180n wn={nnw} wp={nnw*mp}
V1 vdd 0 {vv}
V2 vin 0 {vv}
.param vv=1.8 nnw=1*180n mp=1
.lib BU_180nm.lib
.dc V2 0 {vv} 0.01
.meas dc vil when d(v(out))=-1 fall 1
.meas dc vih when d(v(out))=-1 rise 1
.meas dc vi_mid param (vil+vih)/2/vv
.meas dc voh find v(out) when d(v(out))=-1 fall 1
.meas dc vol find v(out) when d(v(out))=-1 rise 1
.meas dc vo_mid param (vol+voh)/2/vv
.meas dc NMH param abs(voh-vih)
.meas dc NML param abs(vil-vol)
.meas dc voh_fraction param voh/vv
.meas dc vol_fraction param vol/vv
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1168 680
WIRE 416 224 -64 224
WIRE -64 272 -64 224
WIRE 416 304 416 224
WIRE 400 320 96 320
WIRE 496 320 448 320
WIRE 96 400 96 320
WIRE 416 400 416 336
WIRE 416 400 224 400
WIRE 224 416 224 400
SYMBOL /voltage 96 384 R0
WINDOW 3 18 89 Left 2
SYMATTR InstName V2
SYMATTR Value {vv}
SYMBOL /voltage -64 256 R0
SYMATTR InstName V1
SYMATTR Value {vv}
SYMBOL inv 416 320 R0
SYMATTR InstName X1
SYMATTR SpiceLine ll=180n wn={nnw} wp={nnw*mp}
FLAG -64 352 0
FLAG 96 480 0
FLAG 224 416 0
FLAG -64 224 vdd
FLAG 224 400 vss
FLAG 96 320 vin
FLAG 496 320 out
TEXT -88 72 Left 2 !.param vv=1.8 nnw=1*180n mp=1\n.lib BU_180nm.lib\n.dc V2 0 {vv} 0.01
TEXT 560 72 Left 2 !.meas dc vil when d(v(out))=-1 fall 1\n.meas dc vih when d(v(out))=-1 rise 1\n.meas dc vi_mid param (vil+vih)/2/vv\n.meas dc voh find v(out) when d(v(out))=-1 fall 1\n.meas dc vol find v(out) when d(v(out))=-1 rise 1\n.meas dc vo_mid param (vol+voh)/2/vv\n.meas dc NMH param abs(voh-vih)\n.meas dc NML param abs(vil-vol)\n.meas dc voh_fraction param voh/vv\n.meas dc vol_fraction param vol/vv
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17562.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17562.asy)
S1 0 OUT N001 0 SHORT
R4 0 N006 20K
V3 N001 0 PULSE(0 1 70m 1m 1m 100m)
R6 N005 N004 20K
V4 N002 0 2
V2 N005 0 5
R3 N006 IN 499K
R2 N003 0 200K
R1 IN N003 2.1Meg
R8 N007 0 2.87K
V1 IN 0 24
XU1 IN N007 0 0 N002 N004 0 OUT N003 N006 MAX17562 ;pnba IN)SETI)GND)_HVEN)EN)_FLAG)_RIEN)OUT)UVLO)OVLO
C2 OUT 0 150
.model SHORT SW(Ron=4 Roff=100K Vt=.5 Vh=-.4)
.tran 0.8 startup
.lib MAX17562.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1800 680
WIRE -304 -352 -432 -352
WIRE -192 -352 -304 -352
WIRE -16 -352 -192 -352
WIRE 400 -352 272 -352
WIRE 512 -352 400 -352
WIRE 672 -352 560 -352
WIRE -432 -336 -432 -352
WIRE 400 -336 400 -352
WIRE 512 -336 512 -352
WIRE 672 -336 672 -352
WIRE 560 -320 560 -352
WIRE -16 -304 -96 -304
WIRE -96 -288 -96 -304
WIRE -304 -272 -304 -352
WIRE -432 -240 -432 -256
WIRE 400 -240 400 -272
WIRE 512 -240 512 -256
WIRE 672 -240 672 -256
WIRE -96 -192 -96 -208
WIRE -304 -160 -304 -192
WIRE -16 -160 -304 -160
WIRE 384 -160 272 -160
WIRE 576 -160 464 -160
WIRE -304 -144 -304 -160
WIRE 576 -128 576 -160
WIRE -192 -96 -192 -352
WIRE 400 -64 272 -64
WIRE -304 -32 -304 -64
WIRE 400 -32 400 -64
WIRE 576 -32 576 -48
WIRE -192 16 -192 -16
WIRE -16 16 -192 16
WIRE 336 16 272 16
WIRE -192 32 -192 16
WIRE 336 32 336 16
WIRE -16 128 -80 128
WIRE 336 128 336 112
WIRE 336 128 272 128
WIRE -192 160 -192 112
WIRE -80 160 -80 128
WIRE 336 160 336 128
SYMBOL voltage 576 -144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL sw 512 -240 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL voltage -432 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL voltage 672 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 70m 1m 1m 100m)
SYMBOL res -320 -288 R0
SYMATTR InstName R1
SYMATTR Value 2.1Meg
SYMBOL res -208 0 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 499K
SYMBOL res -208 128 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 20K
SYMBOL res 480 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 20K
SYMBOL MAX17562 128 -112 R0
SYMATTR InstName U1
SYMBOL res 320 16 R0
SYMATTR InstName R8
SYMATTR Value 2.87K
SYMBOL cap 384 -336 R0
SYMATTR InstName C2
SYMATTR Value 150
SYMBOL res -320 -160 R0
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL voltage -96 -304 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 2
FLAG -432 -240 0
FLAG 400 -240 0
FLAG 512 -352 OUT
FLAG -432 -352 IN
FLAG 512 -240 0
FLAG 560 -272 0
FLAG 672 -240 0
FLAG -192 160 0
FLAG 336 160 0
FLAG 576 -32 0
FLAG -96 -192 0
FLAG -304 -32 0
FLAG -80 160 0
FLAG 400 -32 0
TEXT 480 144 Left 2 !.model SHORT SW(Ron=4 Roff=100K Vt=.5 Vh=-.4)
TEXT 480 184 Left 2 !.tran 0.8 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1c948790554a_1004-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
R1 OUT N001 24K
V1 N001 0 PULSE(0 5 100u 10n 10n 500u 1)
XU1 OUT 0 LT1004-2.5 ;pnba VOUT)GND
.tran 700u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1004-2.5.asy)
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 980 680
WIRE 96 112 -144 112
WIRE 368 112 176 112
WIRE -144 128 -144 112
WIRE 368 128 368 112
WIRE 368 208 368 192
WIRE -144 224 -144 208
FLAG 368 208 0
FLAG -144 224 0
FLAG 368 112 OUT
SYMBOL res 192 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 24K
SYMBOL voltage -144 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 100u 10n 10n 500u 1)
SYMBOL LT1004-2.5 368 160 R0
SYMATTR InstName U1
TEXT 384 304 Left 2 !.tran 700u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1819.asc
* Generated by LTspice 26.0.1 for Windows.
* 80MHz, 20dB Gain Block
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1819.asy)
XU1 IN N002 N003 +V -V LT1818 ;pnba IN+)IN-)OUT)VCC)VEE
R3 OUT N001 432
XU2 N003 N001 OUT +V -V LT1818 ;pnba IN+)IN-)OUT)VCC)VEE
V3 IN 0 AC 1
R1 N003 N002 432
R4 N001 0 200
V2 -V 0 -5
V1 +V 0 5
R2 N002 0 200
.ac oct 10 100K 100Meg
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 240 32 224 32
WIRE 336 32 320 32
WIRE 352 32 336 32
WIRE 464 32 432 32
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -160 160 -160 144
WIRE -64 160 -64 144
WIRE 400 192 400 176
WIRE 192 208 192 192
WIRE 336 208 336 32
WIRE 368 208 336 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 464 224 464 32
WIRE 464 224 432 224
WIRE 496 224 464 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 368 240 256 240
WIRE -160 256 -160 240
WIRE -64 256 -64 240
WIRE 160 256 32 256
WIRE 32 272 32 256
WIRE 400 272 400 256
WIRE 192 288 192 272
WIRE 32 368 32 352
SYMBOL voltage -64 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 32 256 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL opamps\\LT1819 192 240 R0
SYMATTR InstName U1
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 432
SYMBOL opamps\\LT1819 400 224 R0
SYMATTR InstName U2
SYMBOL res 336 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 200
SYMBOL voltage -160 144 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 448 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 432
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200
FLAG -64 256 0
FLAG 192 192 +V
FLAG -64 144 +V
FLAG 192 288 -V
FLAG -160 256 0
FLAG -160 144 -V
FLAG 16 96 0
FLAG 32 368 0
FLAG 400 176 +V
FLAG 400 272 -V
FLAG 224 32 0
FLAG 496 224 OUT
FLAG 32 256 IN
TEXT 232 344 Left 2 !.ac oct 10 100K 100Meg
TEXT 264 -32 Bottom 2 ;80MHz, 20dB Gain Block
* Z:\home\khalils\Downloads\files\data\raw_asc\1154c63b0138_6269.asc
* Generated by LTspice 26.0.1 for Windows.
* PhotoDiode
* FCI-125G-006
* 20K Ohm Gain Trans-Impedance Amplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6269.asy)
V2 V- 0 -2.5
I1 V+ N001 0 AC 1
R3 Out N001 20K
C3 V+ N001 700f
Cparasitic Out N001 150f
XU1 NC_01 NC_02 N001 Out NC_03 NC_04 Out NC_05 NC_06 NC_07 LTC6269 ;pnba +INA)-INA)OUTA)V+)V-)+INB)-INB)OUTB)_SDA)_SDB
V1 V+ 0 2.5
.ac oct 10 10k 1G
.lib LTC6269.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4472 1028
WIRE -2784 -656 -2784 -720
WIRE -2784 -656 -2912 -656
WIRE -2784 -624 -2784 -656
WIRE -2912 -608 -2912 -656
WIRE -2576 -608 -2640 -608
WIRE -2448 -608 -2512 -608
WIRE -2912 -512 -2912 -544
WIRE -2784 -512 -2784 -544
WIRE -2784 -512 -2912 -512
WIRE -2640 -512 -2640 -608
WIRE -2640 -512 -2784 -512
WIRE -2576 -512 -2640 -512
WIRE -2448 -512 -2448 -608
WIRE -2448 -512 -2496 -512
WIRE -2960 -352 -2960 -384
WIRE -2832 -352 -2832 -384
WIRE -2640 -352 -2640 -512
WIRE -2624 -352 -2640 -352
WIRE -2448 -320 -2448 -512
WIRE -2448 -320 -2480 -320
WIRE -2416 -320 -2448 -320
WIRE -2624 -288 -2656 -288
WIRE -2960 -240 -2960 -272
WIRE -2832 -240 -2832 -272
RECTANGLE Normal -2696 -464 -2992 -704 2
SYMBOL voltage -2960 -368 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage -2832 -368 R0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res -2480 -528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL opamps\\LTC6269 -2592 -320 R0
SYMATTR InstName U1
SYMBOL cap -2928 -608 R0
SYMATTR InstName C3
SYMATTR Value 700f
SYMBOL current -2784 -624 R0
WINDOW 3 38 44 Left 2
WINDOW 123 16 80 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMBOL cap -2512 -624 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName Cparasitic
SYMATTR Value 150f
FLAG -2960 -240 0
FLAG -2832 -240 0
FLAG -2960 -384 V+
FLAG -2832 -384 V-
FLAG -2592 -400 V+
FLAG -2592 -240 V-
FLAG -2656 -288 0
FLAG -2544 -240 V+
FLAG -2784 -720 V+
FLAG -2416 -320 Out
TEXT -2432 -240 Left 2 !.ac oct 10 10k 1G
TEXT -2872 -680 Center 2 ;PhotoDiode
TEXT -2848 -488 Center 2 ;FCI-125G-006
TEXT -2696 -800 Bottom 2 ;20K Ohm Gain Trans-Impedance Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3246.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3246.asy)
XU1 MP_01 N004 NC_02 N003 IN IN 0 MP_03 MP_04 MP_05 N001 OUT N002 NC_06 0 OUT LTC3246 ;pnba )RT)RSTI)Bias)SEL2)Vin)SEL1))))C+)Vout)C-)RST)GND)OUTS/ADJ
R1 OUT 0 10
C2 OUT 0 10
C1 N001 N002 2.2
C4 N004 0 1n
C3 N003 0 10
V1 IN 0 12
.tran 500u startup
.lib LTC3246.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 -32 176 -32
WIRE 272 -32 256 -32
WIRE 176 16 176 -32
WIRE 272 16 272 -32
WIRE -32 80 -128 80
WIRE 96 80 -32 80
WIRE 384 80 352 80
WIRE 448 80 384 80
WIRE 544 80 448 80
WIRE -128 96 -128 80
WIRE 448 96 448 80
WIRE 544 96 544 80
WIRE 16 176 0 176
WIRE 96 176 80 176
WIRE 384 176 384 80
WIRE 384 176 352 176
WIRE -128 192 -128 176
WIRE 448 192 448 160
WIRE 544 192 544 176
WIRE 16 272 0 272
WIRE 96 272 80 272
WIRE 96 368 64 368
WIRE -32 464 -32 80
WIRE 96 464 -32 464
WIRE 368 464 352 464
SYMBOL PowerProducts\\LTC3246 224 272 R0
SYMATTR InstName U1
SYMATTR Description Wide Vin Range Buck-Boost Charge Pump \n\n Watchdog timer not modeled
SYMBOL cap 80 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res 528 80 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL cap 432 96 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL cap 192 -16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL cap 80 256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1n
SYMBOL voltage -128 80 R0
SYMATTR InstName V1
SYMATTR Value 12
FLAG -128 192 0
FLAG -128 80 IN
FLAG 448 192 0
FLAG 544 192 0
FLAG 368 464 0
FLAG 64 368 0
FLAG 0 176 0
FLAG 0 272 0
FLAG 544 80 OUT
TEXT 440 392 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD4004.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\AD4004.asy)
V1 N003 0 SINE(1 2 10k)
R1 N004 N003 10
V4 N006 0 PULSE(0 1.8 227n 0.1n 0.1n 40n 1u)
XU1 N001 N002 N004 MP_01 0 N006 MP_02 MP_03 N005 AD4004 EN_Hi_Z=1 ;pnba REF)Vdd)IN))GND)CNV)))Vout
C1 0 N005 10p
V2 N001 0 5
V3 N002 0 1.8
.tran 110u
.lib AD4004.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1252
WIRE 704 208 368 208
WIRE 832 208 784 208
WIRE 368 288 368 208
WIRE 704 336 496 336
WIRE 832 336 784 336
WIRE -144 432 -208 432
WIRE -16 432 -64 432
WIRE 128 432 64 432
WIRE 576 432 496 432
WIRE 704 432 640 432
WIRE 704 528 496 528
WIRE 832 528 784 528
WIRE 368 608 368 576
SYMBOL voltage 688 208 R270
WINDOW 0 45 70 VLeft 2
WINDOW 3 -46 68 VLeft 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -48 432 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(1 2 10k)
SYMBOL res 80 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL AD4004 400 432 R0
SYMATTR InstName U1
SYMBOL cap 640 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 688 528 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 1.8 227n 0.1n 0.1n 40n 1u)
SYMBOL voltage 688 336 R270
WINDOW 0 47 41 VRight 2
WINDOW 3 -44 39 VRight 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 1.8
FLAG 368 608 0
FLAG 832 336 0
FLAG -208 432 0
FLAG 704 432 0
FLAG 832 528 0
FLAG 832 208 0
TEXT 184 616 Left 2 !.tran 110u