Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1997-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain = 10 Difference Amplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1997-1.asy)
R2 N001 IN+ 1
Vs IN+ 0 SINE(0 2 1k)
RL IN- 0 1
V1 V+ 0 15
V2 V- 0 -15
XU1 N001 MP_01 NC_02 MP_03 NC_04 0 0 V- OUT NC_05 V+ NC_06 MP_07 NC_08 MP_09 IN- LT1997-1 ;pnba +INA))+INB))+INC)REF1)REF2)V-)OUT)_SHDN)V+)-INC))-INB))-INA
R1 IN+ IN- 1
.tran 2m
.lib LT1997-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1116 932
WIRE 48 48 -16 48
WIRE 416 48 400 48
WIRE -272 80 -496 80
WIRE 48 80 48 48
WIRE 400 80 400 48
WIRE -496 96 -496 80
WIRE -272 128 -272 80
WIRE -240 128 -272 128
WIRE -208 128 -240 128
WIRE -16 128 -16 48
WIRE -16 128 -144 128
WIRE -272 160 -272 128
WIRE -496 192 -496 176
WIRE 544 208 496 208
WIRE 544 256 496 256
WIRE -512 288 -528 288
WIRE -384 288 -400 288
WIRE -272 288 -272 240
WIRE -240 288 -272 288
WIRE -208 288 -144 128
WIRE -208 288 -240 288
WIRE -144 288 -208 128
WIRE -128 288 -144 288
WIRE -16 288 -48 288
WIRE 544 288 544 256
WIRE 544 288 496 288
WIRE -528 304 -528 288
WIRE -400 304 -400 288
WIRE -272 304 -272 288
WIRE 544 304 544 288
WIRE -16 368 -16 288
WIRE 48 368 48 336
WIRE 48 368 -16 368
WIRE 400 384 400 336
WIRE 416 384 400 384
WIRE -528 400 -528 384
WIRE -400 400 -400 384
WIRE -272 400 -272 384
SYMBOL res -32 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL LT1997-1 272 208 R0
SYMATTR InstName U1
SYMBOL voltage -400 288 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res -288 144 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL voltage -528 288 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res -288 288 R0
SYMATTR InstName RL
SYMATTR Value 1
SYMBOL voltage -496 80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vs
SYMATTR Value SINE(0 2 1k)
FLAG -528 400 0
FLAG -400 400 0
FLAG -528 288 V+
FLAG -400 288 V-
FLAG 400 48 V+
FLAG 400 384 V-
FLAG 544 304 0
FLAG -272 400 0
FLAG 544 208 OUT
FLAG -496 192 0
FLAG -240 128 IN+
FLAG -240 288 IN-
TEXT 80 0 Bottom 2 ;Gain = 10 Difference Amplifier
TEXT 88 472 Left 2 !.tran 2m
* Z:\tmp\asc_dec_bjh7r6w2\0099e6b63d18_bus_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V3 IN[3] 0 PULSE(0 3.3 0 5n 5n 4u 8u)
V2 IN[2] 0 PULSE(0 3.3 0 5n 5n 2u 4u)
Vdd Vdd 0 3.3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 960 680
WIRE 224 80 224 64
WIRE 224 176 224 160
WIRE 144 192 64 192
WIRE 208 192 224 176
WIRE 208 192 144 192
WIRE -432 240 -432 208
WIRE -336 240 -336 208
WIRE -240 240 -240 208
WIRE -144 240 -144 208
WIRE -144 288 -144 240
WIRE 240 288 240 272
WIRE -240 368 -240 240
WIRE -144 384 -144 368
WIRE 240 384 240 368
WIRE -336 432 -336 240
WIRE -240 464 -240 448
WIRE -432 512 -432 240
WIRE -336 528 -336 512
WIRE -432 608 -432 592
SYMBOL voltage -432 496 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 23 91 Left 0
SYMATTR Value PULSE(0 3.3 0 5n 5n 4u 8u)
SYMATTR InstName V3
SYMBOL voltage -336 416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 94 Left 0
SYMATTR Value PULSE(0 3.3 0 5n 5n 2u 4u)
SYMATTR InstName V2
SYMBOL voltage 240 272 R0
SYMATTR InstName Vdd
SYMATTR Value 3.3
FLAG -432 608 0
FLAG 240 384 0
FLAG 240 272 Vdd
FLAG 144 192 O[0:3]
FLAG -336 528 0
FLAG -240 464 0
FLAG -144 384 0
FLAG -144 240 IN[0]
FLAG -240 240 IN[1]
FLAG -336 240 IN[2]
FLAG -432 240 IN[3]
* Z:\home\khalils\Downloads\files\data\raw_asc\326f9b8a9852_Peak_Detector_aus_Art_of_Electronics.asc
* Generated by LTspice 26.0.1 for Windows.
* Simuliert nicht bei >4pF und 70MHz.\nCap muss aber >4pF
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4857.asy)
+ M=.20134 VJ=.3905 ISR=12.216E-9 NR=4.9950 FC=0.5 TT=0 XTI=2)
D1 FEEDBACK N001 BAR18
XU2 P001 PEAK VCC5 0 PEAK 0 ADA4857 ;pnba 100)101)102)103)104)106
V1 IN 0 SINE(2.5 1.2 70Meg)
V2 VCC5 0 5
R1 PEAK FEEDBACK 20k
C1 N002 0 4p
XU1 IN FEEDBACK VCC5 0 N001 0 ADA4857 ;pnba 100)101)102)103)104)106
R2 P001 N002 1k
D2 N001 N002 BAR18
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 150n
.model BAR18 D(IS=2.2017E-18 N=.2 RS=48.717 IKF=2.3793 CJO=1.4285E-12
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1892 680
WIRE 496 -128 432 -128
WIRE 640 -128 496 -128
WIRE 736 -128 640 -128
WIRE 912 -128 816 -128
WIRE 1040 -128 912 -128
WIRE 640 -112 640 -128
WIRE 912 0 912 -128
WIRE 928 0 912 0
WIRE 432 16 432 -128
WIRE 464 16 432 16
WIRE 1040 16 1040 -128
WIRE 1040 16 992 16
WIRE 1104 16 1040 16
WIRE 640 32 640 -48
WIRE 640 32 528 32
WIRE 656 32 640 32
WIRE 800 32 720 32
WIRE 848 32 800 32
WIRE 464 48 64 48
WIRE 64 64 64 48
WIRE 800 64 800 32
WIRE 944 64 944 48
WIRE 976 64 976 48
WIRE 480 80 480 64
WIRE 512 80 512 64
WIRE 64 112 64 64
WIRE 800 160 800 128
IOPIN -224 80 Out
IOPIN 480 0 In
IOPIN 944 -16 In
IOPIN 1104 16 Out
SYMBOL OpAmps\\ADA4857 960 16 R0
SYMATTR InstName U2
SYMBOL OpAmps\\ADA4857 496 32 R0
SYMATTR InstName U1
SYMBOL schottky 624 -112 R0
SYMATTR InstName D1
SYMATTR Value BAR18
SYMBOL cap 784 64 R0
SYMATTR InstName C1
SYMATTR Value 4p
SYMBOL voltage 64 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(2.5 1.2 70Meg)
SYMBOL res 832 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20k
SYMBOL schottky 656 48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value BAR18
SYMBOL res 944 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -224 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
FLAG 64 64 IN
FLAG 64 192 0
FLAG -224 160 0
FLAG -224 80 VCC5
FLAG 480 0 VCC5
FLAG 512 80 0
FLAG 480 80 0
FLAG 944 -16 VCC5
FLAG 976 64 0
FLAG 944 64 0
FLAG 800 160 0
FLAG 1104 16 PEAK
FLAG 496 -128 FEEDBACK
TEXT 136 -56 Left 2 !.tran 150n
TEXT -184 -120 Left 0 !.model BAR18 D(IS=2.2017E-18 N=.2 RS=48.717 IKF=2.3793 CJO=1.4285E-12\n+ M=.20134 VJ=.3905 ISR=12.216E-9 NR=4.9950 FC=0.5 TT=0 XTI=2)
TEXT 856 120 Left 2 ;Simuliert nicht bei >4pF und 70MHz.\nCap muss aber >4pF
* Z:\home\khalils\Downloads\files\data\raw_asc\187dc088153d_DAC_Sim.asc
* Generated by LTspice 26.0.1 for Windows.
R3 VOUT N002 523
R5 VOUT 0 75
V1 N002 0 PULSE(0 3.3 .25 1ns 1ns .25 .5 4)
V2 N001 0 PULSE(0 3.3 .5 1ns 1ns 1)
R4 VOUT N001 261
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 -32 -400 -32
WIRE 64 -32 16 -32
WIRE 128 -32 64 -32
WIRE 176 -32 128 -32
WIRE -400 16 -400 -32
WIRE 176 48 176 -32
WIRE -64 80 -272 80
WIRE 64 80 64 -32
WIRE 64 80 16 80
WIRE -272 128 -272 80
WIRE 176 160 176 128
WIRE -400 240 -400 96
WIRE -272 240 -272 208
SYMBOL res 160 32 R0
SYMATTR InstName R5
SYMATTR Value 75
SYMBOL voltage -272 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 .25 1ns 1ns .25 .5 4)
SYMBOL res 32 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 523
SYMBOL voltage -400 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 .5 1ns 1ns 1)
SYMBOL res 32 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 261
FLAG -272 240 0
FLAG -400 240 0
FLAG 176 160 0
FLAG 128 -32 VOUT
TEXT -432 264 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\2de6583df266_expt_1_b.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 N003 N001 CMOSP l=180n w=0.2u
M2 N003 N004 0 0 CMOSN l=700n w=697.5n
VDD N001 0 1.8
Vin N004 0 SINE(0.9 50m 1k) AC 50m
VB N002 0 -5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib tsmc018.lib
* .op
* .tran 5m
* .ac dec 20 0.1 1T
.dc Vin 0 1.8 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 972 680
WIRE 368 32 240 32
WIRE 512 32 368 32
WIRE 240 96 240 32
WIRE 368 144 368 32
WIRE 368 144 240 144
WIRE 512 160 512 32
WIRE 192 176 -80 176
WIRE -80 208 -80 176
WIRE 240 320 240 192
WIRE 400 368 240 368
WIRE 192 400 -32 400
WIRE -32 448 -32 400
WIRE 240 448 240 416
WIRE 400 448 400 368
WIRE 400 448 240 448
WIRE 240 480 240 448
FLAG -32 528 0
FLAG 512 240 0
FLAG -80 288 0
FLAG 240 480 0
SYMBOL pmos4 192 96 R0
SYMATTR InstName M1
SYMATTR Value CMOSP
SYMATTR Value2 l=180n w=0.2u
SYMBOL nmos4 192 320 R0
SYMATTR InstName M2
SYMATTR Value CMOSN
SYMATTR Value2 l=700n w=697.5n
SYMBOL voltage 512 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1.8
SYMBOL voltage -32 432 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 50m
SYMATTR InstName Vin
SYMATTR Value SINE(0.9 50m 1k)
SYMBOL voltage -80 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value -5
TEXT 792 240 Left 2 !.lib tsmc018.lib
TEXT 768 464 Left 2 ;.op
TEXT 816 320 Left 2 ;.tran 5m
TEXT -32 632 Left 2 ;.ac dec 20 0.1 1T
TEXT 512 648 Left 2 !.dc Vin 0 1.8 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\348e9928ca7b_gmoverid.asc
* Generated by LTspice 26.0.1 for Windows.
M1 vds vgs 0 0 CMOSN l={ln} w=5u
vds vds 0 0.9
vgs vgs 0 0.7
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include tsmc180.txt
.dc vds 0 1.8 15m
.step param ln 0.18u 0.9u 0.18u
.param ln=1u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -320 32 -320 -32
WIRE -144 32 -144 -48
WIRE 208 96 208 -48
WIRE 400 144 208 144
WIRE 160 176 16 176
WIRE -480 192 -480 80
WIRE -320 192 -320 112
WIRE -144 208 -144 112
WIRE 208 320 208 192
IOPIN 16 176 In
SYMBOL voltage -144 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vds
SYMATTR Value 0.9
SYMBOL voltage -320 16 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 0.7
SYMATTR InstName vgs
SYMBOL nmos4 160 96 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l={ln} w=5u
SYMATTR InstName M1
SYMATTR Value CMOSN
FLAG -320 192 0
FLAG -480 192 0
FLAG -144 208 0
FLAG -480 80 vss
FLAG 400 144 vss
FLAG 208 320 vss
FLAG -320 -32 vgs
FLAG -144 -48 vds
FLAG 16 176 vgs
FLAG 208 -48 vds
TEXT -456 320 Left 2 !.include tsmc180.txt
TEXT -448 344 Left 2 !.dc vds 0  1.8  15m
TEXT -496 384 Left 2 !.step param ln 0.18u 0.9u 0.18u
TEXT -432 432 Left 2 !.param ln=1u
* Z:\tmp\asc_dec_bjh7r6w2\0d21fb3bcc75_model_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
B1 VL 0 V=sqrt(2)*220*max(0,sin(2*pi*50*time))
R2 Reset R-PI_GND 10Meg
V2 pulse 0 PULSE(0 3.3 250ms 1ns 1ns 10ms 19ms 100)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 680
WIRE 240 32 112 32
WIRE 448 32 240 32
WIRE 112 64 112 32
WIRE 240 96 240 32
WIRE 448 144 448 32
WIRE -32 192 -48 192
WIRE 112 192 112 144
WIRE 112 192 48 192
WIRE 240 192 240 160
WIRE 240 192 112 192
WIRE 320 192 320 160
WIRE 320 192 240 192
WIRE 240 208 240 192
WIRE 320 208 320 192
WIRE 112 240 112 192
WIRE 112 336 112 304
WIRE 240 336 240 272
WIRE 240 336 112 336
WIRE 272 336 240 336
WIRE 320 336 320 288
WIRE 320 336 272 336
WIRE 448 336 448 224
WIRE 448 336 320 336
WIRE -128 352 -128 320
WIRE -128 352 -192 352
WIRE -96 352 -128 352
WIRE 448 368 448 336
WIRE 272 384 272 336
WIRE -192 400 -192 352
WIRE -48 400 -48 192
WIRE -96 416 -96 352
WIRE 400 432 400 416
WIRE 448 432 400 432
WIRE 448 448 448 432
WIRE -192 528 -192 480
WIRE -96 528 -96 464
WIRE -96 528 -192 528
WIRE -48 528 -48 480
WIRE -48 528 -96 528
WIRE -192 576 -192 528
WIRE 448 576 448 528
SYMBOL bv 448 432 R0
WINDOW 3 -225 180 Left 2
SYMATTR InstName B1
SYMATTR Value V=sqrt(2)*220*max(0,sin(2*pi*50*time))
SYMBOL res 304 192 R0
SYMATTR InstName R2
SYMATTR Value 10Meg
SYMBOL voltage -192 384 R0
WINDOW 3 -216 229 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3.3 250ms 1ns 1ns 10ms 19ms 100)
SYMATTR InstName V2
FLAG -192 576 0
FLAG 448 576 0
FLAG 320 160 Reset
FLAG 272 384 R-PI_GND
FLAG -128 320 pulse
FLAG 400 416 VL
* Z:\tmp\asc_dec_bjh7r6w2\10e158f20e2f_4093_4DioPwm_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
Ct Ramp 0 1n Rpar=1e9
D4 Ramp N004 1N914
D2 N004 N002 1N914
D1 N001 N004 1N914
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1156 680
WIRE 304 96 -80 96
WIRE -80 128 -80 96
WIRE 192 128 16 128
WIRE 16 160 16 128
WIRE 224 176 224 160
WIRE -80 256 -80 192
WIRE 16 256 16 224
WIRE 16 256 -80 256
WIRE 32 256 16 256
WIRE 224 272 224 256
WIRE 224 272 144 272
WIRE 240 272 224 272
WIRE -80 288 -80 256
WIRE 16 288 16 256
WIRE 32 288 16 288
WIRE 16 320 16 288
WIRE -80 400 -80 352
WIRE 16 400 16 384
WIRE 16 400 -80 400
WIRE 96 400 16 400
WIRE 128 400 96 400
WIRE 224 400 192 400
WIRE 224 432 224 400
SYMBOL cap 128 416 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName Ct
SYMATTR Value 1n
SYMATTR SpiceLine Rpar=1e9
SYMBOL diode 32 384 R180
WINDOW 0 -22 61 Left 0
WINDOW 3 -81 32 Left 0
SYMATTR InstName D4
SYMATTR Value 1N914
SYMBOL diode 32 224 R180
WINDOW 0 -22 61 Left 0
WINDOW 3 -81 32 Left 0
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL diode -96 128 R0
WINDOW 0 36 35 Left 0
WINDOW 3 20 62 Left 0
SYMATTR InstName D1
SYMATTR Value 1N914
FLAG 224 432 0
FLAG 240 272 Out
FLAG 96 400 Ramp
* Z:\home\khalils\Downloads\files\data\raw_asc\8c4951b30533_1213.asc
* Generated by LTspice 26.0.1 for Windows.
* Single Supply 3-Pole 1MHz Filter
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1213.asy)
C1 OUT N001 5p
R4 N003 N002 680
R2 N001 0 4.12K
C4 N002 0 390p
V3 IN 0 3.75 AC 1
R5 N002 IN 680
C2 N004 0 150p
R1 OUT N001 4.12K
XU1 N004 N001 +V 0 OUT LT1213 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
R3 N004 N003 680
C3 OUT N003 200p
.ac oct 100 1K 10Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 176 0 144 0
WIRE 304 0 240 0
WIRE -224 48 -224 32
WIRE 48 96 32 96
WIRE 144 96 144 0
WIRE 144 96 128 96
WIRE 176 96 144 96
WIRE 304 96 304 0
WIRE 304 96 256 96
WIRE -224 144 -224 128
WIRE 192 208 192 192
WIRE 144 224 144 96
WIRE 160 224 144 224
WIRE 304 240 304 96
WIRE 304 240 224 240
WIRE 320 240 304 240
WIRE -240 256 -384 256
WIRE -144 256 -160 256
WIRE -112 256 -144 256
WIRE -16 256 -32 256
WIRE 0 256 -16 256
WIRE 112 256 80 256
WIRE 160 256 112 256
WIRE -384 272 -384 256
WIRE -144 272 -144 256
WIRE 112 272 112 256
WIRE 192 288 192 272
WIRE 112 352 112 336
WIRE -384 368 -384 352
WIRE -144 368 -144 336
WIRE -16 384 -16 256
WIRE 192 384 -16 384
WIRE 304 384 304 240
WIRE 304 384 256 384
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 680
SYMBOL cap 96 272 R0
SYMATTR InstName C2
SYMATTR Value 150p
SYMBOL res -144 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 680
SYMBOL cap 240 -16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 5p
SYMBOL res -16 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 680
SYMBOL res 144 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.12K
SYMBOL res 272 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 4.12K
SYMBOL cap 256 368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 200p
SYMBOL opamps\\LT1213 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -224 32 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -384 256 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value 3.75
SYMBOL cap -160 272 R0
SYMATTR InstName C4
SYMATTR Value 390p
FLAG -224 144 0
FLAG 192 192 +V
FLAG -224 32 +V
FLAG -384 368 0
FLAG 192 288 0
FLAG 32 96 0
FLAG 112 352 0
FLAG -144 368 0
FLAG 320 240 OUT
FLAG -384 256 IN
TEXT 16 -48 Bottom 2 ;Single Supply 3-Pole 1MHz Filter
TEXT -128 424 Left 2 !.ac oct 100 1K 10Meg
* Z:\tmp\asc_dec_bjh7r6w2\1275d14e8401_SolenoidValveControlCircuit_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 CTL 0 5
D1 CTL 0 STW8B12C
R5 N002 N003 10
D2 N003 12V RR1LAM6S
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 904 680
WIRE 448 -160 320 -160
WIRE 544 -160 544 -208
WIRE 544 -160 448 -160
WIRE 592 -160 544 -160
WIRE 704 -160 672 -160
WIRE 544 -144 544 -160
WIRE 704 -144 704 -160
WIRE 448 -80 448 -160
WIRE 320 -48 320 -80
WIRE 320 -48 192 -48
WIRE 544 -48 544 -64
WIRE 736 -48 544 -48
WIRE 320 -16 320 -48
WIRE 320 64 240 64
WIRE 448 64 448 -16
WIRE 448 64 320 64
WIRE 544 64 544 32
WIRE 544 64 448 64
WIRE -240 96 -288 96
WIRE -288 128 -288 96
WIRE -160 224 -160 96
WIRE -160 224 -192 224
WIRE -128 224 -160 224
WIRE 48 224 -48 224
WIRE 144 224 48 224
WIRE -160 320 -160 224
WIRE -160 432 -160 384
SYMBOL voltage -144 96 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL LED -176 320 R0
SYMATTR InstName D1
SYMATTR Value STW8B12C
SYMBOL res 528 -64 R0
SYMATTR InstName R5
SYMATTR Value 10
SYMBOL diode 464 -16 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value RR1LAM6S
FLAG -192 224 CTL
FLAG 544 -208 12V
FLAG -160 432 0
FLAG -288 128 0
FLAG 704 -144 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8334.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8334.asy)
R1 N004 0 20k
C3 OUT 0 10 X2
XU2 0 IN IN N002 N008 N005 N003 N004 N007 0 N001 LT8334 ;pnba GND)EN/UVLO)Vin)INTVcc)Bias)Vc)FBX)Rt)SS)Sync/Mode)SW
C4 N002 0 1
V3 N008 0 5
R3 OUT N003 1Meg
R5 N003 0 71.5k
C2 N006 0 1n
L1 IN N001 2.2 Rser=19.5m
C1 N007 0 10n
D1 N001 OUT PMEG3010BEA
V1 IN 0 6
R2 N005 N006 39k
R4 OUT 0 240
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m startup
.lib LT8334.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1416 868
WIRE 0 -64 -128 -64
WIRE 128 -64 0 -64
WIRE 176 -64 128 -64
WIRE 288 -64 256 -64
WIRE 432 -64 288 -64
WIRE 608 -64 496 -64
WIRE 720 -64 608 -64
WIRE 848 -64 720 -64
WIRE 608 -48 608 -64
WIRE -128 -32 -128 -64
WIRE 848 -32 848 -64
WIRE 720 -16 720 -64
WIRE 128 0 128 -64
WIRE 288 0 288 -64
WIRE 608 32 608 16
WIRE 0 64 0 -64
WIRE 48 64 0 64
WIRE 384 64 368 64
WIRE 464 64 448 64
WIRE -128 80 -128 48
WIRE 848 80 848 48
WIRE 48 160 16 160
WIRE 720 160 720 64
WIRE 720 160 368 160
WIRE 720 192 720 160
WIRE -48 256 -80 256
WIRE 48 256 32 256
WIRE 416 256 368 256
WIRE 528 256 496 256
WIRE 608 256 592 256
WIRE 720 288 720 272
WIRE -48 352 -80 352
WIRE 48 352 16 352
WIRE 432 352 368 352
WIRE 432 400 432 352
WIRE 208 448 208 416
WIRE 432 496 432 480
SYMBOL cap 16 336 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL VOLTAGE 432 384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 704 -32 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL res 704 176 R0
SYMATTR InstName R5
SYMATTR Value 71.5k
SYMBOL VOLTAGE -128 -48 R0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL cap 592 -48 R0
WINDOW 123 42 54 Left 2
WINDOW 0 41 3 Left 2
WINDOW 3 37 29 Left 2
SYMATTR Value2 X2
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res 832 -48 R0
SYMATTR InstName R4
SYMATTR Value 240
SYMBOL res 400 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 39k
SYMBOL LT8334 208 208 R0
SYMATTR InstName U2
SYMBOL cap 528 272 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL ind2 160 -48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=19.5m
SYMATTR Type ind
SYMBOL schottky 432 -48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 -6 35 VBottom 2
SYMATTR InstName D1
SYMATTR Value PMEG3010BEA
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 48 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20k
SYMBOL cap 384 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C4
SYMATTR Value 1
FLAG -80 352 0
FLAG -80 256 0
FLAG -128 80 0
FLAG 720 288 0
FLAG 608 32 0
FLAG 848 80 0
FLAG 464 64 0
FLAG -128 -64 IN
FLAG 848 -64 OUT
FLAG 208 448 0
FLAG 608 256 0
FLAG 16 160 0
FLAG 432 496 0
TEXT 128 520 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD4056.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:\n \nVOrti: Analog output \nVOrto: "Digital" representation of the input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\AD4056.asy)
Rfilt1 input+ vIN+ 499
VinP1 input+ 0 SINE(1.25 1.25 2k)
V1 N001 0 2.5
VinN1 input- 0 SINE(1.25 1.25 2k 0 0 180)
V2 N002 0 PWL(30n 0 40n 1.8)
Rfilt2 vIN- input- 499
Cfilt1 vIN+ 0 1n
Cfilt2 0 vIN- 1n
XU1 vIN+ vIN- 0 N001 CNV N002 VOrti VOrto AD4056 ;pnba IN+)IN-)GND)REF)CNV)_RST)VOrti)VOrto
V3 CNV 0 PULSE(0 1.8 1u 10n 10n 20n 2u)
.tran 0.5m
.lib AD4056.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1072 680
WIRE 256 -80 256 -112
WIRE -384 48 -560 48
WIRE -288 48 -384 48
WIRE -176 48 -208 48
WIRE -48 48 -176 48
WIRE 256 48 256 0
WIRE -560 80 -560 48
WIRE -176 96 -176 48
WIRE 448 96 384 96
WIRE 640 96 448 96
WIRE 640 128 640 96
WIRE -48 144 -48 48
WIRE 0 144 -48 144
WIRE 64 144 0 144
WIRE 432 144 384 144
WIRE -560 192 -560 160
WIRE -560 192 -608 192
WIRE 432 192 384 192
WIRE -608 208 -608 192
WIRE -560 224 -560 192
WIRE -176 224 -176 160
WIRE -128 224 -176 224
WIRE -128 240 -128 224
WIRE 0 240 -48 240
WIRE 64 240 0 240
WIRE 640 240 640 208
WIRE -176 288 -176 224
WIRE 448 288 384 288
WIRE 448 336 448 288
WIRE 256 368 256 336
WIRE -560 384 -560 304
WIRE -384 384 -560 384
WIRE -288 384 -384 384
WIRE -176 384 -176 352
WIRE -176 384 -208 384
WIRE -48 384 -48 240
WIRE -48 384 -176 384
WIRE 448 448 448 416
SYMBOL voltage 640 112 R0
WINDOW 0 28 -5 Top 2
WINDOW 3 23 97 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 1.8 1u 10n 10n 20n 2u)
SYMBOL voltage 256 16 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage -560 64 M0
WINDOW 0 -29 15 Right 2
WINDOW 3 -20 90 Right 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VinP1
SYMATTR Value SINE(1.25 1.25 2k)
SYMBOL AD4056 288 192 R0
SYMATTR InstName U1
SYMBOL voltage -560 320 M180
WINDOW 0 84 95 Right 2
WINDOW 3 15 11 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VinN1
SYMATTR Value SINE(1.25 1.25 2k 0 0 180)
SYMBOL res -192 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rfilt2
SYMATTR Value 499
SYMBOL voltage 448 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 16 105 Left 2
SYMATTR Value PWL(30n 0 40n 1.8)
SYMATTR InstName V2
SYMBOL cap -192 96 R0
SYMATTR InstName Cfilt1
SYMATTR Value 1n
SYMBOL cap -192 288 R0
SYMATTR InstName Cfilt2
SYMATTR Value 1n
SYMBOL res -304 32 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rfilt1
SYMATTR Value 499
FLAG 256 368 0
FLAG 448 448 0
FLAG 640 240 0
FLAG 256 -112 0
FLAG 0 144 vIN+
FLAG 0 240 vIN-
FLAG 432 192 VOrti
FLAG -384 48 input+
FLAG -384 384 input-
FLAG -128 240 0
FLAG -608 208 0
FLAG 432 144 VOrto
FLAG 448 96 CNV
TEXT 144 456 Left 2 !.tran 0.5m
TEXT -560 -128 Left 2 ;Notes:\n \nVOrti: Analog output \nVOrto: "Digital" representation of the input