Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\06b8d1138544_strom_fb.asc
* Generated by LTspice 26.0.1 for Windows.
R4 0 adc 2.4k
R3 adc N003 470
R2 N003 N002 120
D1 N003 N001 D
C1 adc 0 1n
R5 N002 0 0.5
V1 N002 0 SINE(0.5 0.5 1000 0 0) Rser=1
V2 N001 0 3.3
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 2ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 680
WIRE 896 256 528 256
WIRE 400 336 224 336
WIRE 416 336 400 336
WIRE 528 336 528 320
WIRE 528 336 496 336
WIRE 544 336 528 336
WIRE 640 336 624 336
WIRE 672 336 640 336
WIRE 688 336 672 336
WIRE 224 352 224 336
WIRE 640 352 640 336
WIRE 896 352 896 256
WIRE 672 368 672 336
WIRE 400 432 400 416
WIRE 400 432 224 432
WIRE 640 432 400 432
WIRE 672 432 640 432
WIRE 896 432 672 432
WIRE 912 432 896 432
SYMBOL cap 656 368 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL voltage 224 336 R0
SYMATTR InstName V1
SYMATTR Value SINE(0.5 0.5 1000 0 0)
SYMATTR SpiceLine Rser=1
SYMBOL res 656 448 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 2.4k
SYMBOL res 512 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 120
SYMBOL res 384 320 R0
SYMATTR InstName R5
SYMATTR Value 0.5
SYMBOL res 640 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 470
SYMBOL diode 544 320 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL voltage 896 336 R0
SYMATTR InstName V2
SYMATTR Value 3.3
FLAG 640 336 adc
FLAG 640 432 0
TEXT 168 112 Left 2 !.tran 0 2ms
* Z:\home\khalils\Downloads\files\data\raw_asc\2ae7fb2adc04_6013.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain of 10 Single Ended to Differential Converter
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6013.asy)
R1 OUT- N002 10K
V3 IN 0 SINE(0 1 1K)
R2 N002 IN 2K
V1 +V 0 15
XU2 IN N001 OUT+ +V -V LT6013 ;pnba IN+)IN-)OUT)VCC)VEE
R4 N001 0 2K
R3 OUT+ N001 8.06K
XU1 0 N002 OUT- +V -V LT6013 ;pnba IN+)IN-)OUT)VCC)VEE
V2 -V 0 -15
.tran 3m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 192 -160 192 -176
WIRE -32 -144 -256 -144
WIRE 160 -144 -32 -144
WIRE -256 -128 -256 -144
WIRE 304 -128 224 -128
WIRE 352 -128 304 -128
WIRE 160 -112 128 -112
WIRE 192 -80 192 -96
WIRE -256 -32 -256 -48
WIRE 32 16 16 16
WIRE 128 16 128 -112
WIRE 128 16 112 16
WIRE 160 16 128 16
WIRE 304 16 304 -128
WIRE 304 16 240 16
WIRE -32 112 -32 -144
WIRE 32 112 -32 112
WIRE 128 112 112 112
WIRE 160 112 128 112
WIRE 304 112 240 112
WIRE -240 128 -240 112
WIRE -112 128 -112 112
WIRE -240 224 -240 208
WIRE -112 224 -112 208
WIRE 192 224 192 208
WIRE 128 240 128 112
WIRE 160 240 128 240
WIRE 304 256 304 112
WIRE 304 256 224 256
WIRE 352 256 304 256
WIRE 160 272 128 272
WIRE 192 304 192 288
SYMBOL opamps\\LT6013 192 -128 M180
WINDOW 0 25 22 Left 2
WINDOW 3 21 -21 Left 2
SYMATTR InstName U2
SYMBOL res 128 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2K
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -240 112 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL opamps\\LT6013 192 256 R0
SYMATTR InstName U1
SYMBOL res 256 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 8.06K
SYMBOL voltage -256 -144 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2K
SYMBOL voltage -112 112 R0
SYMATTR InstName V1
SYMATTR Value 15
FLAG -112 224 0
FLAG 192 208 +V
FLAG -112 112 +V
FLAG 192 304 -V
FLAG -240 224 0
FLAG -240 112 -V
FLAG -256 -32 0
FLAG 192 -80 +V
FLAG 192 -176 -V
FLAG 16 16 0
FLAG 128 272 0
FLAG 352 -128 OUT+
FLAG 352 256 OUT-
FLAG -256 -144 IN
TEXT 312 336 Left 2 !.tran 3m
TEXT 72 -208 Bottom 2 ;Gain of 10 Single Ended to Differential Converter
* Z:\home\khalils\Downloads\files\data\raw_asc\5e4dc1f59a50_250p_IDVD.asc
* Generated by LTspice 26.0.1 for Windows.
VG N002 0
VD N001 0
M1 N001 N002 0 N001 PMOS l=240n w=360n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib tsmc025.lib
.dc VD -2.5 0 0.01 VG -0.05 -2.5 -0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 64 208 64
WIRE 368 80 368 64
WIRE 208 112 208 64
WIRE 272 112 208 112
WIRE 208 128 208 112
WIRE 272 176 272 112
WIRE 272 176 208 176
WIRE 160 208 -48 208
WIRE -48 304 -48 288
WIRE 208 304 208 224
WIRE 208 304 -48 304
WIRE 368 304 368 160
WIRE 368 304 208 304
WIRE 208 336 208 304
SYMBOL voltage -48 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VG
SYMATTR Value ""
SYMBOL pmos4 160 128 R0
SYMATTR InstName M1
SYMATTR Value2 l=240n w=360n
SYMBOL voltage 368 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VD
SYMATTR Value ""
FLAG 208 336 0
TEXT -440 144 Left 2 !.lib tsmc025.lib
TEXT -584 192 Left 2 !.dc VD -2.5 0 0.01 VG -0.05 -2.5 -0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\fbfdaccbd13f_Draft15.asc
* Generated by LTspice 26.0.1 for Windows.
Vi Vin 0 AC 1
R Vout 0 220 tol=1 pwr=0.1
L Vout Vin 100m
;tran 100m
.ac dec 100 10 1000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 80 80 80
WIRE 192 80 128 80
WIRE 320 80 272 80
WIRE 352 80 320 80
WIRE 80 144 80 80
WIRE 352 144 352 80
WIRE 80 240 80 224
WIRE 352 240 352 224
WIRE 352 240 80 240
WIRE 80 256 80 240
FLAG 80 256 0
FLAG 128 80 Vin
FLAG 320 80 Vout
SYMBOL voltage 80 128 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName Vi
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL res 336 128 R0
SYMATTR InstName R
SYMATTR Value 220
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL ind 288 64 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L
SYMATTR Value 100m
TEXT 46 280 Left 2 !;tran 100m
TEXT 168 256 Left 2 !.ac dec 100 10 1000
* Z:\home\khalils\Downloads\files\data\raw_asc\05f5df6dea2e_SolDrive6.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 P001 {L} Rser=1
R1 N003 N004 100
M1 N002 N004 N005 N005 AP9465GEM
V2 N003 0 PULSE(0 5 1m 1u 1u {Duty} 5m)
R3 N005 0 1
V1 N001 0 12
D1 N002 N001 MBRS1100
R2 P001 N002 11
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 20ms 1m
.step param L list 25m 27m 29m 31m
.step param Duty list 0.5m 1m 1.5m 2m 2.5m 3m 3.5m 4m 4.5m 4.7m 5m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1196 680
WIRE 416 80 368 80
WIRE 640 80 416 80
WIRE 416 96 416 80
WIRE 368 160 368 80
WIRE 640 256 640 80
WIRE 368 272 368 224
WIRE 416 272 416 256
WIRE 416 272 368 272
WIRE 416 304 416 272
WIRE 192 336 96 336
WIRE 192 352 192 336
WIRE 224 352 192 352
WIRE 336 352 304 352
WIRE 336 384 336 352
WIRE 368 384 336 384
WIRE 416 416 416 400
WIRE 416 432 416 416
WIRE 96 496 96 416
WIRE 320 496 96 496
WIRE 416 496 320 496
WIRE 640 496 640 336
WIRE 640 496 416 496
WIRE 320 544 320 496
SYMBOL Res 400 400 R0
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL voltage 96 320 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 1m 1u 1u {Duty} 5m)
SYMBOL nmos 368 304 R0
SYMATTR InstName M1
SYMATTR Value AP9465GEM
SYMBOL Res 400 160 R0
SYMATTR InstName R2
SYMATTR Value 11
SYMBOL ind 400 80 R0
SYMATTR InstName L1
SYMATTR Value {L}
SYMATTR SpiceLine Rser=1
SYMBOL Res 208 368 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage 640 240 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL schottky 384 224 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS1100
SYMATTR Description Diode
SYMATTR Type diode
FLAG 320 544 0
TEXT 368 648 Left 2 !.tran 0 20ms 1m
TEXT 368 592 Left 2 !.step param L list 25m 27m 29m 31m\n.step param  Duty list 0.5m 1m 1.5m 2m 2.5m 3m 3.5m 4m 4.5m  4.7m 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\1af53002a209_pmos_diode_ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
* PMOS as Diode
V2 V+ 0 5
R1 2+ W1 100
M1 2+ 2+ V+ V+ PMOS
V3 W1 0 PULSE(-5 5 0 5m 5m 0 10m)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 -16 -16 -16
WIRE 224 -16 0 -16
WIRE 0 32 0 -16
WIRE 0 128 0 112
WIRE 224 128 224 -16
WIRE 176 144 160 144
WIRE 160 240 160 144
WIRE 224 240 224 224
WIRE 224 240 160 240
WIRE 224 288 224 240
WIRE 256 288 224 288
WIRE 224 320 224 288
WIRE 256 320 224 320
WIRE 224 336 224 320
WIRE 224 448 224 416
WIRE 256 448 224 448
WIRE 224 480 224 448
WIRE 256 480 224 480
WIRE 384 512 384 464
WIRE 224 528 224 480
WIRE 224 640 224 608
IOPIN 256 480 In
IOPIN 384 464 In
IOPIN -16 -16 In
IOPIN 256 448 In
IOPIN 256 320 In
IOPIN 256 288 In
SYMBOL voltage 0 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL pmos 176 224 M180
SYMATTR InstName M1
SYMBOL res 208 320 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage 224 512 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(-5 5 0 5m 5m 0 10m)
FLAG 224 640 0
FLAG 256 480 W1
FLAG 384 512 0
FLAG 384 464 1+
FLAG 0 128 0
FLAG -16 -16 V+
FLAG 256 448 2-
FLAG 256 320 2+
FLAG 256 288 1-
TEXT -30 568 Left 2 !.tran 100m
TEXT -72 -72 Left 2 ;PMOS as Diode
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6657-1.25.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6657-1.25.asy)
R1 OUT 0 250
XU1 IN IN OUT 0 LT6657-1.25 ;pnba IN)_SHDN)OUT)GND
V1 IN 0 PWL(0 0 3m 3 7m 3 10m 0)
C1 OUT 0 1
C2 IN 0 .1
.tran 10m
.lib LT6657.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1652 680
WIRE 224 96 -176 96
WIRE 288 96 224 96
WIRE 320 96 288 96
WIRE 672 96 608 96
WIRE 768 96 672 96
WIRE -176 112 -176 96
WIRE 224 112 224 96
WIRE 672 112 672 96
WIRE 768 112 768 96
WIRE 224 192 224 176
WIRE -176 208 -176 192
WIRE 288 208 288 96
WIRE 320 208 288 208
WIRE 672 208 672 176
WIRE 768 208 768 192
WIRE 464 288 464 256
SYMBOL cap 208 112 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL res 752 96 R0
SYMATTR InstName R1
SYMATTR Value 250
SYMBOL voltage -176 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 3m 3 7m 3 10m 0)
SYMBOL LT6657-1.25 464 128 R0
SYMATTR InstName U1
SYMBOL cap 656 112 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 672 208 0
FLAG 464 288 0
FLAG -176 208 0
FLAG 768 96 OUT
FLAG 768 208 0
FLAG 224 192 0
FLAG -176 96 IN
TEXT 672 360 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\7044aaf81f88_Demonstration_circuit_DC.asc
* Generated by LTspice 26.0.1 for Windows.
* Demonstration Circuit DC
* copyright Cordell Audio 12/03/2010
* View SPICE error log to see
* transistor operating parameters
V2 0 N006 15
R1 N001 N002 2500
C1 N001 Vout 100pF
I1 N005 N006 2mA
Q2 Vout 0 N004 0 2N5551C
R3 N003 N005 225
V1 N001 0 15
Q1 N002 Vin N003 0 2N5551C
R2 N001 Vout 2500
V3 Vin 0 AC 1
R4 N004 N005 225
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.include Cordell_Mods
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 724
WIRE 160 64 0 64
WIRE 272 64 160 64
WIRE 400 64 272 64
WIRE 0 112 0 64
WIRE 160 112 160 64
WIRE 272 112 272 64
WIRE 400 112 400 64
WIRE 160 224 160 192
WIRE 224 224 160 224
WIRE 272 224 272 176
WIRE 272 224 224 224
WIRE 0 256 0 192
WIRE 160 256 160 224
WIRE -112 304 -160 304
WIRE -64 304 -112 304
WIRE 304 304 224 304
WIRE 400 304 400 192
WIRE 400 304 304 304
WIRE 304 352 304 304
WIRE -160 368 -160 304
WIRE 0 384 0 352
WIRE 160 384 160 352
WIRE -160 496 -160 448
WIRE 0 496 0 464
WIRE 80 496 0 496
WIRE 160 496 160 464
WIRE 160 496 80 496
WIRE 400 496 400 304
WIRE 80 512 80 496
WIRE 80 624 80 592
WIRE 400 624 400 576
WIRE 400 624 80 624
SYMBOL res 144 368 R0
SYMATTR InstName R4
SYMATTR Value 225
SYMBOL res 144 96 R0
WINDOW 0 -42 41 Left 0
WINDOW 3 -63 76 Left 0
SYMATTR InstName R2
SYMATTR Value 2500
SYMBOL res -16 368 R0
WINDOW 0 -42 39 Left 0
WINDOW 3 -52 73 Left 0
SYMATTR InstName R3
SYMATTR Value 225
SYMBOL voltage 400 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 39 44 Left 0
WINDOW 3 41 76 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL res -16 96 R0
WINDOW 0 -42 41 Left 0
WINDOW 3 -60 74 Left 0
SYMATTR InstName R1
SYMATTR Value 2500
SYMBOL npn -64 256 R0
WINDOW 3 22 55 Left 0
WINDOW 0 59 23 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q1
SYMBOL voltage -160 352 R0
WINDOW 3 -181 172 Left 0
WINDOW 123 -101 83 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -77 40 Left 0
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMBOL voltage 400 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 44 Left 0
WINDOW 3 43 76 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL npn 224 256 M0
WINDOW 3 24 55 Left 0
WINDOW 0 61 25 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q2
SYMBOL current 80 512 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 24 Left 0
WINDOW 3 37 62 Left 0
SYMATTR InstName I1
SYMATTR Value 2mA
SYMBOL cap 256 112 R0
WINDOW 3 26 62 Left 0
WINDOW 0 40 25 Left 0
SYMATTR Value 100pF
SYMATTR InstName C1
FLAG 304 352 0
FLAG -160 496 0
FLAG -112 304 Vin
FLAG 224 224 Vout
TEXT -456 120 Left 0 !.op
TEXT -104 -8 Left 0 ;Demonstration Circuit DC
TEXT -456 72 Left 0 !.include Cordell_Mods
TEXT 56 704 Left 0 ;copyright Cordell Audio 12/03/2010
TEXT -456 576 Left 0 ;View SPICE error log to see
TEXT -456 608 Left 0 ;transistor operating parameters
* Z:\tmp\asc_dec_bjh7r6w2\03d122389ff0_or_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
M4 N001 B Vss Vss NMOS L=0.18u W=1.0e-4
M6 Vdd N001 Y Y PMOS L=0.18u W=1.0e-4
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1788 1092
WIRE 256 112 256 64
WIRE 208 192 144 192
WIRE 256 272 256 208
WIRE 352 272 256 272
WIRE -96 304 -96 240
WIRE 144 304 144 192
WIRE 144 304 -96 304
WIRE 256 336 256 272
WIRE -96 368 -96 304
WIRE -96 368 -192 368
WIRE 64 368 -96 368
WIRE 144 416 144 304
WIRE 208 416 144 416
WIRE 64 432 64 368
WIRE 16 512 -32 512
WIRE 64 592 64 528
SYMBOL nmos 16 432 R0
SYMATTR InstName M4
SYMATTR Value2 L=0.18u W=1.0e-4
SYMBOL pmos 208 112 R0
SYMATTR InstName M6
SYMATTR Value2 L=0.18u W=1.0e-4
FLAG -32 512 B
FLAG 352 272 Y
FLAG 256 64 Vdd
FLAG 64 592 Vss
* Z:\home\khalils\Downloads\files\data\raw_asc\0fc6fd281c3a_LowPassFilter_RC.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 1 AC 1
R1 Out N001 1k
C1 Out 0 100n
.ac lin 100 1 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -16 144 -96 144
WIRE 128 144 64 144
WIRE 288 144 128 144
WIRE -96 208 -96 144
WIRE 128 208 128 144
WIRE -96 368 -96 288
WIRE 128 368 128 272
SYMBOL cap 112 208 R0
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL res 80 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -96 192 R0
WINDOW 123 41 101 Left 2
WINDOW 39 0 0 Left 0
WINDOW 0 40 41 Left 2
WINDOW 3 39 70 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value 1
FLAG -96 368 0
FLAG 288 144 Out
FLAG 128 368 0
TEXT -80 416 Left 2 !.ac lin 100 1 10k
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1997-3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 V+ 0 15
V2 V- 0 -15
R1 IN+ IN- 1
R2 N001 IN+ 1
RL IN- 0 1
Vs IN+ 0 SINE(0 20 1k)
XU1 N001 MP_01 NC_02 MP_03 NC_04 0 0 V- OUT NC_05 V+ NC_06 MP_07 NC_08 MP_09 IN- LT1997-3 ;pnba +INA))+INB))+INC)REF1)REF2)V-)OUT)_SHDN)V+)-INC))-INB))-INA
* Gain = 1 Difference Amplifier
.tran 2m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1997-3.asy)
.lib LT1997-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1116 932
WIRE 48 48 -16 48
WIRE 416 48 400 48
WIRE -272 80 -496 80
WIRE 48 80 48 48
WIRE 400 80 400 48
WIRE -496 96 -496 80
WIRE -272 128 -272 80
WIRE -224 128 -272 128
WIRE -192 128 -224 128
WIRE -16 128 -16 48
WIRE -16 128 -128 128
WIRE -272 160 -272 128
WIRE -496 192 -496 176
WIRE 544 208 496 208
WIRE 544 256 496 256
WIRE -512 288 -528 288
WIRE -384 288 -400 288
WIRE -272 288 -272 240
WIRE -224 288 -272 288
WIRE -192 288 -128 128
WIRE -192 288 -224 288
WIRE -128 288 -192 128
WIRE -112 288 -128 288
WIRE -16 288 -32 288
WIRE 544 288 544 256
WIRE 544 288 496 288
WIRE -528 304 -528 288
WIRE -400 304 -400 288
WIRE -272 304 -272 288
WIRE 544 304 544 288
WIRE 400 384 400 336
WIRE 416 384 400 384
WIRE -528 400 -528 384
WIRE -400 400 -400 384
WIRE -272 400 -272 384
WIRE -16 400 -16 288
WIRE 48 400 48 336
WIRE 48 400 -16 400
FLAG -528 400 0
FLAG -400 400 0
FLAG -528 288 V+
FLAG -400 288 V-
FLAG 400 48 V+
FLAG 400 384 V-
FLAG 544 304 0
FLAG -272 400 0
FLAG 544 208 OUT
FLAG -496 192 0
FLAG -224 128 IN+
FLAG -224 288 IN-
SYMBOL voltage -528 288 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -400 288 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res -288 144 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL res -16 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL res -288 288 R0
SYMATTR InstName RL
SYMATTR Value 1
SYMBOL voltage -496 80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vs
SYMATTR Value SINE(0 20 1k)
SYMBOL LT1997-3 272 208 R0
SYMATTR InstName U1
TEXT 80 0 Bottom 2 ;Gain = 1 Difference Amplifier
TEXT 88 472 Left 2 !.tran 2m
* Z:\home\khalils\Downloads\files\data\raw_asc\4d2948d2b4a0_Fig9_24_pmos.asc
* Generated by LTspice 26.0.1 for Windows.
VSG 0 N001 1.15
VSD 0 N002 0
M1 N002 N001 0 0 P_1u l=2u w=30u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSD 0 5
.include cmosedu_models.txt
* Plot Is(M1) and 1/d(Is(M1)) (to get ro)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 688
WIRE 448 0 320 0
WIRE 672 0 448 0
WIRE 848 0 672 0
WIRE 320 32 320 0
WIRE 848 32 848 0
WIRE 448 112 448 0
WIRE 320 128 320 112
WIRE 400 128 320 128
WIRE 672 160 672 0
WIRE 672 160 448 160
WIRE 672 192 672 160
WIRE 448 304 448 208
WIRE 672 304 672 272
WIRE 672 304 448 304
FLAG 848 32 0
SYMBOL voltage 320 16 R0
WINDOW 0 -93 54 Left 2
WINDOW 3 -93 82 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VSG
SYMATTR Value 1.15
SYMBOL voltage 672 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 38 54 Left 2
WINDOW 3 24 104 Invisible 2
SYMATTR InstName VSD
SYMATTR Value 0
SYMBOL pmos4 400 208 M180
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=2u w=30u
SYMATTR InstName M1
SYMATTR Value P_1u
TEXT 384 336 Left 2 !.dc VSD 0 5
TEXT 384 360 Left 2 !.include cmosedu_models.txt
TEXT 368 -32 Left 2 ;Plot Is(M1) and 1/d(Is(M1)) (to get ro)
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX22513.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX22513.asy)
L1 N001 OUT 33
Rload OUT 0 47
R3 N003 0 26.1K
R2 OUT N003 232K
C1 N002 0 1
V1 IN 0 24
XU1 IN N001 N002 N002 0 N003 MAX22513 BUCKDCM=0 BUCKPFM=0 BUCKSS=0 ;pnba PV24)LX)VCCB)FREQ)GND)FB
C2 OUT 0 10
.tran 3.5m startup
.lib MAX22513.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1144 680
WIRE 224 192 16 192
WIRE 544 192 512 192
WIRE 656 192 624 192
WIRE 768 192 656 192
WIRE 816 192 768 192
WIRE 864 192 816 192
WIRE 16 208 16 192
WIRE 656 208 656 192
WIRE 768 208 768 192
WIRE 864 208 864 192
WIRE 128 288 96 288
WIRE 208 288 192 288
WIRE 224 288 208 288
WIRE 656 288 512 288
WIRE 16 304 16 288
WIRE 656 304 656 288
WIRE 768 304 768 272
WIRE 864 304 864 288
WIRE 208 384 208 288
WIRE 224 384 208 384
WIRE 528 384 512 384
WIRE 656 400 656 384
SYMBOL MAX22513 368 288 R0
SYMATTR InstName U1
SYMBOL res 848 192 R0
SYMATTR InstName Rload
SYMATTR Value 47
SYMBOL res 640 192 R0
SYMATTR InstName R2
SYMATTR Value 232K
SYMBOL cap 752 208 R0
SYMATTR Value 10
SYMATTR InstName C2
SYMBOL res 640 288 R0
SYMATTR InstName R3
SYMATTR Value 26.1K
SYMBOL voltage 16 192 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 192 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ind 528 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
FLAG 96 288 0
FLAG 16 304 0
FLAG 768 304 0
FLAG 656 400 0
FLAG 864 304 0
FLAG 816 192 OUT
FLAG 16 192 IN
FLAG 528 384 0
TEXT 296 544 Left 2 !.tran 3.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\56e9d143b81a_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
* MOSFET: Transfer Output Characteristics
* ketaki mahajan / A-3 / 16014022050
R1 G N002 100k
R2 N001 D 1k
M1 D G 0 0 NMOS1
VDD N001 0
VGG N002 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model NMOS1 NMOS(Vto=1V L=1um W=1um)
.dc VDD 0 15 0.1 VGG 0 4 0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1756 680
WIRE 640 -144 464 -144
WIRE 800 -144 720 -144
WIRE 464 -96 464 -144
WIRE 464 -48 464 -96
WIRE 208 32 48 32
WIRE 336 32 288 32
WIRE 416 32 336 32
WIRE 800 64 800 -144
WIRE 48 144 48 32
WIRE 464 144 464 48
WIRE 48 352 48 224
WIRE 464 352 464 144
WIRE 464 352 48 352
WIRE 800 352 800 144
WIRE 800 352 464 352
WIRE 464 400 464 352
SYMBOL voltage 800 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value ""
SYMBOL voltage 48 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGG
SYMATTR Value ""
SYMBOL res 736 -160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL nmos 416 -48 R0
SYMATTR InstName M1
SYMATTR Value NMOS1
SYMBOL res 304 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
FLAG 464 400 0
FLAG 464 144 S
FLAG 464 -96 D
FLAG 336 32 G
TEXT 968 -144 Left 2 !.model NMOS1 NMOS(Vto=1V L=1um W=1um)
TEXT 968 -96 Left 2 !.dc VDD 0 15 0.1 VGG 0 4 0.5
TEXT 224 -240 Left 2 ;MOSFET: Transfer Output Characteristics
TEXT 976 -48 Left 2 ;ketaki mahajan / A-3 / 16014022050