Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\23f2b4f3a241_with_nmos.asc
* Generated by LTspice 26.0.1 for Windows.
* The voltage reading at IN must be equal to the voltage reading at OUT\n \nThis works quite well as long as the RLoad is relatively small (<10 Ohms)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
R3 N006 IN 1K
RL N002 N003 8
V1 IN 0 SINE(0.1 0.1 1)
XU1 N007 N001 N002 0 N004 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R4 OUT 0 1
C2 N007 0 10n
R2 OUT N001 1K
R1 N005 N004 100
R5 N007 N006 1K
M1 N003 N005 OUT OUT NMOS
C1 N006 0 10n
Vs N002 0 12
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 10 0 0.01
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1176 680
WIRE 240 -272 16 -272
WIRE 528 -272 320 -272
WIRE 400 -176 400 -224
WIRE 400 -64 400 -96
WIRE 400 -64 128 -64
WIRE 400 -48 400 -64
WIRE 400 64 400 32
WIRE 128 112 128 -64
WIRE 16 128 16 -272
WIRE 96 128 16 128
WIRE 224 144 160 144
WIRE 352 144 304 144
WIRE -304 160 -368 160
WIRE -160 160 -224 160
WIRE -96 160 -160 160
WIRE 32 160 -16 160
WIRE 96 160 32 160
WIRE -368 192 -368 160
WIRE -160 192 -160 160
WIRE 32 192 32 160
WIRE 400 192 400 160
WIRE 448 192 400 192
WIRE 528 192 528 -272
WIRE 528 192 448 192
WIRE 128 208 128 176
WIRE 400 224 400 192
WIRE -368 304 -368 272
WIRE -160 304 -160 256
WIRE -160 304 -368 304
WIRE 32 304 32 256
WIRE 32 304 -160 304
WIRE 400 336 400 304
WIRE -368 352 -368 304
SYMBOL nmos 352 64 R0
SYMATTR InstName M1
SYMBOL cap -176 192 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 384 -64 R0
SYMATTR InstName RL
SYMATTR Value 8
SYMBOL Misc\\signal -368 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -70 80 Left 2
WINDOW 3 -214 45 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0.1 0.1 1)
SYMBOL res -208 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL res 336 -288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 384 208 R0
SYMATTR InstName R4
SYMATTR Value 1
SYMBOL voltage 400 -80 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vs
SYMATTR Value 12
SYMBOL cap 16 192 R0
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 0 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1K
SYMBOL OpAmps\\UniversalOpAmp 128 144 R0
SYMATTR InstName U1
SYMBOL res 320 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
FLAG -368 352 0
FLAG 128 208 0
FLAG 400 -224 0
FLAG 400 336 0
FLAG -368 160 IN
FLAG 448 192 OUT
TEXT 32 520 Left 2 !.tran 0 10 0 0.01
TEXT -952 -120 Left 2 ;The voltage reading at IN must be equal to the voltage reading at OUT\n \nThis works quite well as long as the RLoad is relatively small (<10 Ohms)
* Z:\home\khalils\Downloads\files\data\raw_asc\42e18b22b3c0_clipper.asc
* Generated by LTspice 26.0.1 for Windows.
* .tran 0 1000m 0 0
D2 Vout 0 1N914
D1 0 Vout 1N914
R1 Vout N001 1k
V1 N001 0 PWL(0 -4 1 4)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.wave /Users/davemollen/Desktop/rat/rat.wav 32 44.1k Vout
.tran 0 1000m 0 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1092 680
WIRE -144 144 -336 144
WIRE 288 144 -64 144
WIRE 368 144 288 144
WIRE 544 144 368 144
WIRE -336 192 -336 144
WIRE 288 192 288 144
WIRE 368 192 368 144
WIRE 288 304 288 256
WIRE 368 304 368 256
WIRE -336 320 -336 272
SYMBOL diode 352 192 R0
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL res -48 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 304 256 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL voltage -336 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 -4 1 4)
FLAG -336 320 0
FLAG 544 144 Vout
FLAG 288 304 0
FLAG 368 304 0
TEXT -88 368 Left 2 ;.tran 0 1000m 0 0
TEXT -88 408 Left 2 !.wave /Users/davemollen/Desktop/rat/rat.wav 32 44.1k Vout\n.tran 0 1000m 0 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3431.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3431.asy)
XU1 0 N002 MP_01 IN MP_02 N001 MP_03 MP_04 MP_05 OUT N005 N006 MP_06 MP_07 N003 LT3431 ;pnba GND)SW))Vin))Boost))))BIAS)Vc)FB)))_SHDN
R3 N004 0 1.5K
R1 OUT N006 15.4K
C3 OUT 0 47 Rser=.1
D2 OUT N001 1N914
R2 N006 0 4.99K
V1 IN 0 20
C1 N005 0 250p
L1 N002 OUT 10
C2 N002 N001 .33
D1 0 N002 MBRS340
C5 N005 N004 .015
Rload OUT 0 1.5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 750u startup
.lib LT3431.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2716 1784
WIRE 2096 1312 1984 1312
WIRE 2176 1312 2096 1312
WIRE 2416 1312 2240 1312
WIRE 1824 1344 1616 1344
WIRE 2096 1344 2096 1312
WIRE 1616 1360 1616 1344
WIRE 1824 1360 1824 1344
WIRE 1984 1360 1984 1312
WIRE 2224 1392 2176 1392
WIRE 2304 1392 2224 1392
WIRE 2416 1392 2416 1312
WIRE 2416 1392 2384 1392
WIRE 2480 1392 2416 1392
WIRE 2576 1392 2480 1392
WIRE 2224 1408 2224 1392
WIRE 2480 1408 2480 1392
WIRE 2576 1408 2576 1392
WIRE 1744 1440 1728 1440
WIRE 2096 1440 2096 1408
WIRE 2096 1440 2064 1440
WIRE 2176 1440 2176 1392
WIRE 2176 1440 2096 1440
WIRE 1616 1456 1616 1440
WIRE 2224 1488 2224 1472
WIRE 2480 1504 2480 1472
WIRE 2576 1504 2576 1488
WIRE 2416 1520 2416 1392
WIRE 2416 1520 2064 1520
WIRE 1568 1600 1504 1600
WIRE 1664 1600 1632 1600
WIRE 1744 1600 1664 1600
WIRE 2416 1600 2064 1600
WIRE 1504 1616 1504 1600
WIRE 1664 1616 1664 1600
WIRE 2416 1616 2416 1600
WIRE 1904 1696 1904 1680
WIRE 1504 1712 1504 1696
WIRE 1664 1712 1664 1680
WIRE 2416 1712 2416 1696
SYMBOL cap 2080 1408 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value .33
SYMBOL RES 2400 1504 R0
SYMATTR InstName R1
SYMATTR Value 15.4K
SYMBOL VOLTAGE 1616 1344 R0
SYMATTR InstName V1
SYMATTR Value 20
SYMBOL cap 1632 1584 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value .015
SYMBOL res 2400 1600 R0
SYMATTR InstName R2
SYMATTR Value 4.99K
SYMBOL res 1488 1600 R0
SYMATTR InstName R3
SYMATTR Value 1.5K
SYMBOL ind 2288 1408 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL diode 2240 1296 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL polcap 2464 1408 R0
SYMATTR InstName C3
SYMATTR Value 47
SYMATTR SpiceLine Rser=.1
SYMBOL PowerProducts\\LT3431 1904 1520 R0
SYMATTR InstName U1
SYMBOL cap 1648 1616 R0
SYMATTR InstName C1
SYMATTR Value 250p
SYMBOL res 2560 1392 R0
SYMATTR InstName Rload
SYMATTR Value 1.5
SYMBOL schottky 2208 1472 M180
WINDOW 0 35 62 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS340
FLAG 2224 1488 0
FLAG 2416 1712 0
FLAG 2480 1504 0
FLAG 2576 1504 0
FLAG 1904 1696 0
FLAG 1664 1712 0
FLAG 1616 1456 0
FLAG 1504 1712 0
FLAG 2576 1392 OUT
FLAG 1616 1344 IN
TEXT 2128 1736 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17760.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17760.asy)
C1 Vcc 0 1
R5 OUT N002 22
V1 IN 0 24
R4 N004 0 69.8k
C3 N003 0 5.6n
C2 OUT 0 5.6 Rser=4.6m
Rload OUT 0 {5/0.3}
R1 OUT N005 95.3k
XU1 0 IN EN/UVLO N002 N005 0 N006 N001 N003 N004 Vcc 0 MAX17760 ;pnba GND)VIN)EN/UVLO)EXTVCC)FB)MODE)_RESET)LX)SS)RT/SYNC)VCC)PGND
R3 Vcc N006 10k
R2 N005 0 18.2k
L1 N001 OUT 56 Rser=0.48
C4 N002 0 100n
.tran 3.5m startup
.lib MAX17760.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1252 680
WIRE -96 -128 -112 -128
WIRE 336 -128 -96 -128
WIRE 336 -112 336 -128
WIRE -112 -48 -112 -128
WIRE 176 -48 144 -48
WIRE 560 -48 496 -48
WIRE 704 -48 640 -48
WIRE 832 -48 704 -48
WIRE 928 -48 832 -48
WIRE 992 -48 928 -48
WIRE 1008 -48 992 -48
WIRE 704 -32 704 -48
WIRE 832 -32 832 -48
WIRE 1008 -32 1008 -48
WIRE 832 48 832 32
WIRE -112 64 -112 32
WIRE 48 64 16 64
WIRE 144 64 112 64
WIRE 176 64 144 64
WIRE 704 64 704 48
WIRE 704 64 496 64
WIRE 1008 64 1008 48
WIRE 704 96 704 64
WIRE 928 112 928 -48
WIRE 48 176 0 176
WIRE 176 176 112 176
WIRE 512 176 496 176
WIRE 704 176 704 160
WIRE 32 288 0 288
WIRE 176 288 112 288
WIRE 928 288 928 192
WIRE 928 288 496 288
WIRE 928 304 928 288
WIRE 176 400 144 400
WIRE 560 400 496 400
WIRE 672 400 640 400
WIRE 928 400 928 384
WIRE 336 464 336 448
SYMBOL res 912 96 R0
SYMATTR InstName R1
SYMATTR Value 95.3k
SYMBOL MAX17760 336 160 R0
SYMATTR InstName U1
SYMBOL res 656 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL cap 816 -32 R0
SYMATTR InstName C2
SYMATTR Value 5.6
SYMATTR SpiceLine Rser=4.6m
SYMBOL res 128 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 69.8k
SYMBOL cap 112 192 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value 5.6n
SYMBOL voltage -112 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 912 288 R0
SYMATTR InstName R2
SYMATTR Value 18.2k
SYMBOL res 688 -48 R0
SYMATTR InstName R5
SYMATTR Value 22
SYMBOL ind 544 -32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 56
SYMATTR SpiceLine Rser=0.48
SYMBOL cap 112 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 688 96 R0
SYMATTR InstName C4
SYMATTR Value 100n
SYMBOL res 992 -48 R0
SYMATTR InstName Rload
SYMATTR Value {5/0.3}
FLAG -112 64 0
FLAG 0 288 0
FLAG 336 464 0
FLAG 832 48 0
FLAG 1008 64 0
FLAG -96 -128 IN
FLAG 992 -48 OUT
FLAG 0 176 0
FLAG 928 400 0
FLAG 512 176 0
FLAG 144 400 0
FLAG 16 64 0
FLAG 672 400 Vcc
FLAG 704 176 0
FLAG 144 64 Vcc
FLAG 144 -48 EN/UVLO
TEXT 808 472 Left 2 !.tran 3.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1783.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Supply Rail Current Sense
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1783.asy)
Q1 N001 N004 OUT 0 2N3904
R4 OUT 0 2K
XU1 N001 N003 +V 0 N004 NC_01 LT1783 ;pnba In+)In-)V+)V-)OUT)SHDN
R1 +V N002 .2
V1 +V 0 10
R2 N001 +V 200
R3 N003 N002 200
I1 N002 0 SINE(1 1 1K)
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -32 32 -32 16
WIRE 0 32 -32 32
WIRE 128 32 80 32
WIRE 400 32 128 32
WIRE -32 64 -32 32
WIRE -192 112 -192 96
WIRE 192 112 192 96
WIRE 400 144 400 32
WIRE -32 160 -32 144
WIRE 16 160 -32 160
WIRE 160 160 96 160
WIRE 336 192 304 192
WIRE -192 208 -192 192
WIRE -32 208 -32 160
WIRE 128 224 128 32
WIRE 160 224 128 224
WIRE 400 256 400 240
WIRE 448 256 400 256
WIRE 400 272 400 256
WIRE 192 288 192 272
WIRE -32 304 -32 288
WIRE 400 368 400 352
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 200
SYMBOL res 384 256 R0
SYMATTR InstName R4
SYMATTR Value 2K
SYMBOL npn 336 144 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 96 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL current -32 208 R0
SYMATTR InstName I1
SYMATTR Value SINE(1 1 1K)
SYMBOL opamps\\LT1783 192 192 R0
SYMATTR InstName U1
SYMBOL res -48 48 R0
SYMATTR InstName R1
SYMATTR Value .2
SYMBOL voltage -192 96 R0
SYMATTR InstName V1
SYMATTR Value 10
FLAG -192 208 0
FLAG 192 96 +V
FLAG -192 96 +V
FLAG 192 288 0
FLAG 400 368 0
FLAG -32 304 0
FLAG -32 16 +V
FLAG 448 256 OUT
TEXT 488 320 Left 2 !.tran 3m
TEXT 184 -24 Bottom 2 ;Positive Supply Rail Current Sense
* Z:\home\khalils\Downloads\files\data\raw_asc\LT4423.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT4423.asy)
C1 IN 0 0.1
XU1 IN IN OUT NC_01 0 LT4423 ;pnba SHDN#)IN)OUT)STATUS)GND
C2 OUT 0 47
R1 OUT 0 1
V1 IN 0 12
.tran 1m startup
.lib LT4423.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -192 96 -208 96
WIRE -96 96 -192 96
WIRE -32 96 -96 96
WIRE 16 96 -32 96
WIRE 608 96 480 96
WIRE 688 96 608 96
WIRE 720 96 688 96
WIRE -208 144 -208 96
WIRE 608 144 608 96
WIRE 720 144 720 96
WIRE -96 160 -96 96
WIRE -32 176 -32 96
WIRE 16 176 -32 176
WIRE 608 256 608 208
WIRE 720 256 720 224
WIRE -208 272 -208 224
WIRE -96 272 -96 224
WIRE 240 336 240 272
SYMBOL voltage -208 128 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 592 144 R0
SYMATTR InstName C2
SYMATTR Value 47
SYMBOL cap -112 160 R0
SYMATTR InstName C1
SYMATTR Value 0.1
SYMBOL res 704 128 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL LT4423 240 160 R0
SYMATTR InstName U1
FLAG 240 336 0
FLAG -96 272 0
FLAG 608 256 0
FLAG -208 272 0
FLAG -192 96 IN
FLAG 688 96 OUT
FLAG 720 256 0
TEXT -216 360 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3531.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3531.asy)
Rload OUT 0 40
XU1 N001 IN 0 IN N003 OUT N002 0 LTC3531 ;pnba SW1)Vin)GND)_SHDN)FB)OUT)SW2)PGND
R1 OUT N003 340K
L1 N001 N002 10
C1 OUT 0 10
R2 N003 0 200K
V1 IN 0 2
.tran 500u startup
.lib LTC3531.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 96 128 96
WIRE 288 96 256 96
WIRE 128 144 128 96
WIRE 288 144 288 96
WIRE 48 224 -32 224
WIRE 64 224 48 224
WIRE 384 224 352 224
WIRE 496 224 384 224
WIRE 608 224 496 224
WIRE -32 240 -32 224
WIRE 384 240 384 224
WIRE 496 240 496 224
WIRE 608 240 608 224
WIRE -32 336 -32 320
WIRE 48 336 48 224
WIRE 64 336 48 336
WIRE 384 336 384 320
WIRE 384 336 352 336
WIRE 496 336 496 304
WIRE 608 336 608 320
WIRE 384 352 384 336
WIRE 128 432 128 416
WIRE 288 432 288 416
SYMBOL LTC3531 208 272 R0
SYMATTR InstName U1
SYMBOL res 592 224 R0
SYMATTR InstName Rload
SYMATTR Value 40
SYMBOL res 368 336 R0
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL ind 160 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL voltage -32 224 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL res 368 224 R0
SYMATTR InstName R1
SYMATTR Value 340K
SYMBOL cap 480 240 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG -32 336 0
FLAG 288 432 0
FLAG 384 432 0
FLAG 128 432 0
FLAG 496 336 0
FLAG 608 336 0
FLAG -32 224 IN
FLAG 608 224 OUT
TEXT 512 400 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3c5aae79c4e0_Cmos_inverter.asc
* Generated by LTspice 26.0.1 for Windows.
* CMOS Inverter
V1 N002 0 PULSE(0 2.5 0 1n 1n 10m 20m)
M1 N003 N002 0 0 NMOS
V2 N001 0 2.5
M2 N003 N002 N001 N001 PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 -208 -112 -208
WIRE 224 -176 224 -208
WIRE 224 -32 224 -96
WIRE 176 -16 112 -16
WIRE 112 96 112 -16
WIRE 112 96 -48 96
WIRE 224 112 224 64
WIRE 368 112 224 112
WIRE -48 128 -48 96
WIRE 224 160 224 112
WIRE 112 240 112 96
WIRE 176 240 112 240
WIRE -112 288 -112 -208
WIRE -48 288 -48 208
WIRE -48 288 -112 288
WIRE 224 288 224 256
WIRE 224 288 -48 288
WIRE 224 336 224 288
SYMBOL voltage 224 -80 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 2.5
SYMBOL nmos 176 160 R0
SYMATTR InstName M1
SYMBOL pmos 176 64 M180
SYMATTR InstName M2
SYMBOL voltage -48 112 R0
WINDOW 3 -372 97 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 2.5 0 1n 1n 10m 20m)
FLAG 224 336 0
TEXT -168 360 Left 2 !.tran 100m
TEXT -304 -48 Left 2 ;CMOS Inverter
* Z:\home\khalils\Downloads\files\data\raw_asc\2a0af1c2c414_wilson_current_mirror.asc
* Generated by LTspice 26.0.1 for Windows.
M3 N002 N003 N004 N004 IRFH5406
V2 0 N004 5
M2 0 N002 N003 N003 IRFH5406
M1 N003 N003 N004 N004 IRFH5406
I1 N001 N002 1m
V1 N001 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc I1 0m 1m 0.1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 708
WIRE 64 64 -128 64
WIRE 528 64 352 64
WIRE -128 96 -128 64
WIRE 64 96 64 64
WIRE 528 96 528 64
WIRE 352 144 352 64
WIRE 64 224 64 176
WIRE 304 224 64 224
WIRE 352 256 352 240
WIRE 352 256 240 256
WIRE 64 320 64 224
WIRE 352 320 352 256
WIRE 240 400 240 256
WIRE 240 400 112 400
WIRE 304 400 240 400
WIRE 64 512 64 416
WIRE 240 512 64 512
WIRE 352 512 352 416
WIRE 352 512 240 512
WIRE 240 528 240 512
WIRE 240 640 240 608
SYMBOL nmos 304 144 R0
SYMATTR InstName M2
SYMATTR Value IRFH5406
SYMBOL voltage 240 624 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL nmos 112 320 M0
SYMATTR InstName M3
SYMATTR Value IRFH5406
SYMBOL current 64 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 1m
SYMBOL nmos 304 320 R0
SYMATTR InstName M1
SYMATTR Value IRFH5406
SYMBOL voltage -128 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -128 176 0
FLAG 240 640 0
FLAG 528 96 0
TEXT -344 216 Left 2 !.dc I1 0m 1m 0.1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6655LN-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
C1 vIN 0 1
V1 vIN 0 5
C2 N001 0 10
C3 vOUT 0 10
XU1 vIN vIN 0 N001 vOUT LTC6655LN-2.5 ;pnba _SHDN)IN)GND)NR)OUT_F
.tran 5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LTC6655LN-2.5.asy)
.lib LTC6655LN-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1144 680
WIRE -64 144 -176 144
WIRE 32 144 -64 144
WIRE 80 144 32 144
WIRE 560 144 368 144
WIRE -176 176 -176 144
WIRE -64 192 -64 144
WIRE 560 192 560 144
WIRE 32 208 32 144
WIRE 80 208 32 208
WIRE 464 208 368 208
WIRE -176 288 -176 256
WIRE -64 288 -64 256
WIRE 224 288 224 240
WIRE 464 288 464 272
WIRE 560 288 560 256
FLAG -64 288 0
FLAG -176 288 0
FLAG 464 288 0
FLAG 560 288 0
FLAG 560 144 vOUT
FLAG -176 144 vIN
FLAG 224 288 0
SYMBOL cap -80 192 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -176 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 448 208 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL cap 544 192 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL LTC6655LN-2.5 224 176 R0
SYMATTR InstName U1
TEXT -192 360 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7105-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7105-5.0.asy)
C2 N002 0 2.7n
Rload OUT 0 15
V1 IN 0 6
C1 OUT 0 2.2 Rser=1.5m
XU1 IN OUT IN N002 OUT 0 N001 ADP7105 Vref=5 ;pnba Vin)Sense)EN)SS)Vout)GND)PG
R1 OUT N001 100k
.tran 6m startup
.lib ADP7105.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE 384 128 352 128
WIRE 464 128 464 32
WIRE 464 128 384 128
WIRE 560 128 464 128
WIRE -32 144 -32 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 128
WIRE 384 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 15
SYMBOL ADP7105-5.0 224 128 R0
SYMATTR InstName U1
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 2.7n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -32 32 IN
FLAG 560 128 OUT
TEXT 432 296 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1226.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1226.asy)
R3 N002 N003 75
T1 N003 0 OUT 0 Td=50n Z0=75
V1 +V 0 15
XU1 IN N001 +V -V N002 LT1226 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -15
V3 IN 0 ac 1
R2 N001 0 50
R1 N002 N001 1.2K
R4 OUT 0 75
.ac oct 10 100K 1G
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -208 96 -208 80
WIRE -96 96 -96 80
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -208 192 -208 176
WIRE -96 192 -96 176
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 288 240 256 240
WIRE 400 240 368 240
WIRE 560 240 496 240
WIRE 160 256 0 256
WIRE 560 256 560 240
WIRE 0 272 0 256
WIRE 400 272 384 272
WIRE 512 272 496 272
WIRE 192 288 192 272
WIRE 560 352 560 336
WIRE 0 368 0 352
SYMBOL opamps\\LT1226 192 176 R0
SYMATTR InstName U1
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL voltage -96 80 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL tline 448 256 R0
WINDOW 3 -3 37 Top 2
SYMATTR Value Td=50n Z0=75
SYMATTR InstName T1
SYMBOL voltage -208 80 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 272 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 75
SYMBOL res 544 240 R0
SYMATTR InstName R4
SYMATTR Value 75
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1.2K
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value ac 1
FLAG -96 192 0
FLAG 192 192 +V
FLAG -96 80 +V
FLAG 192 288 -V
FLAG -208 192 0
FLAG -208 80 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 560 352 0
FLAG 512 272 0
FLAG 384 272 0
FLAG 560 240 OUT
FLAG 0 256 IN
TEXT 224 384 Left 2 !.ac oct 10 100K 1G
* Z:\home\khalils\Downloads\files\data\raw_asc\0a3f4ce88a18_Fig1_11.asc
* Generated by LTspice 26.0.1 for Windows.
Vin Vin 0 1
R2 Vout 0 2k
R1 Vin Vout 1k
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 48 224 0 224
WIRE 112 224 48 224
WIRE 256 224 192 224
WIRE 288 224 256 224
WIRE 0 240 0 224
WIRE 288 240 288 224
WIRE 0 336 0 320
WIRE 288 336 288 320
SYMBOL res 272 224 R0
SYMATTR InstName R2
SYMATTR Value 2k
SYMBOL res 96 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 0 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 1
FLAG 0 336 0
FLAG 288 336 0
FLAG 256 224 Vout
FLAG 48 224 Vin
TEXT 40 400 Left 0 !.op