* Z:\home\khalils\Downloads\files\data\raw_asc\LT6118.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6118.asy)
XU1 N002 N006 N009 0 N010 N007 N001 N004 LT6118 ;pnba SenseLo)LE)OutC)V-)INC)OutA)V+)SenseHi
I1 N003 0 PWL(0 0 515u 0 535u 500m) load
R9 N005 N011 1K
R4 N001 N006 24.9K
V3 N008 0 3.3
R2 N001 N002 .1
C1 N002 0 .1
R5 N010 0 1.6K
R6 N001 N005 1K
R1 N001 N004 100
R3 N007 N010 6.04K
MQ1 N003 N005 N002 N002 IRF9640
C2 N006 0 100n
V1 N001 0 PWL(0 0 4u 12)
D1 N005 N001 BZX84C6V2L
MQ2 N011 N009 0 0 2N7002
R7 N008 N009 10K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 540u 500u
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2204 980
WIRE 288 -96 112 -96
WIRE 352 -96 288 -96
WIRE 480 -96 432 -96
WIRE 528 -96 480 -96
WIRE 576 -96 528 -96
WIRE 784 -96 672 -96
WIRE 288 -80 288 -96
WIRE 784 -80 784 -96
WIRE 528 -64 528 -96
WIRE 288 16 288 0
WIRE 784 16 784 0
WIRE 528 32 528 0
WIRE -384 64 -624 64
WIRE -208 64 -384 64
WIRE -64 64 -208 64
WIRE 112 64 112 -96
WIRE 112 64 -64 64
WIRE 128 64 112 64
WIRE 480 64 480 -96
WIRE 480 64 448 64
WIRE -624 80 -624 64
WIRE -384 80 -384 64
WIRE -208 80 -208 64
WIRE -64 80 -64 64
WIRE -624 176 -624 160
WIRE -384 176 -384 144
WIRE -208 176 -208 160
WIRE -208 176 -384 176
WIRE -64 176 -64 160
WIRE 128 176 -64 176
WIRE 480 176 448 176
WIRE 480 192 480 176
WIRE -384 240 -384 176
WIRE -208 240 -384 240
WIRE -208 256 -208 240
WIRE -64 256 -64 240
WIRE 0 288 -96 288
WIRE 128 288 96 288
WIRE 480 288 480 272
WIRE 480 288 448 288
WIRE -96 304 -96 288
WIRE 0 304 0 288
WIRE 480 336 480 288
WIRE 288 352 288 336
WIRE -208 368 -208 336
WIRE -96 400 -96 384
WIRE 480 432 480 416
WIRE 0 448 0 384
WIRE 0 448 -160 448
WIRE 96 448 96 288
WIRE 96 448 0 448
WIRE -208 480 -208 464
WIRE -384 512 -384 240
WIRE 592 512 592 -48
WIRE 592 512 -384 512
SYMBOL LT6118 288 224 R0
SYMATTR InstName U1
SYMBOL res -16 288 R0
SYMATTR InstName R7
SYMATTR Value 10K
SYMBOL res -224 64 R0
SYMATTR InstName R6
SYMATTR Value 1K
SYMBOL res -224 240 R0
SYMATTR InstName R9
SYMATTR Value 1K
SYMBOL res 272 -96 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL pmos 672 -48 M270
WINDOW 0 54 44 VTop 2
WINDOW 3 -11 71 VLeft 2
SYMATTR InstName Q1
SYMATTR Value IRF9640
SYMBOL res 336 -80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value .1
SYMBOL res 464 320 R0
SYMATTR InstName R5
SYMATTR Value 1.6K
SYMBOL voltage -96 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL zener -400 144 M180
WINDOW 0 31 54 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BZX84C6V2L
SYMBOL nmos -160 368 M0
WINDOW 0 33 -9 Right 2
WINDOW 3 29 99 Right 2
SYMATTR InstName Q2
SYMATTR Value 2N7002
SYMBOL res 464 176 R0
SYMATTR InstName R3
SYMATTR Value 6.04K
SYMBOL cap -80 176 R0
WINDOW 0 28 15 Left 2
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL cap 512 -64 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL current 784 -80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 39 37 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMATTR Value PWL(0 0 515u 0 535u 500m)
SYMBOL res -80 64 R0
WINDOW 0 41 44 Left 2
WINDOW 3 40 71 Left 2
SYMATTR InstName R4
SYMATTR Value 24.9K
SYMBOL voltage -624 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 4u 12)
FLAG 288 352 0
FLAG -624 176 0
FLAG 784 16 0
FLAG 480 432 0
FLAG -208 480 0
FLAG -96 400 0
FLAG 528 32 0
FLAG -64 256 0
TEXT 664 472 Left 2 !.tran 0 540u 500u