Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\2cb2252ddd18_1037.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain 1000 Amplifier with .01% Accuracy
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1037.asy)
V2 -V 0 -15
V1 +V 0 15
R2 N001 0 365
XU1 IN N001 +V -V OUT LT1037 ;pnba In+)In-)V+)V-)OUT
V3 IN 0 SINE(0 1m 1)
R1 OUT N001 355K
.tran 3
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 160 96 128 96
WIRE 272 96 240 96
WIRE -272 176 -272 160
WIRE -144 176 -144 160
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 272 240 272 96
WIRE 272 240 224 240
WIRE 304 240 272 240
WIRE 160 256 0 256
WIRE -272 272 -272 256
WIRE -144 272 -144 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL opamps\\LT1037 192 176 R0
SYMATTR InstName U1
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 355K
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1m 1)
SYMBOL voltage -144 160 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -272 160 R0
SYMATTR InstName V2
SYMATTR Value -15
FLAG -144 272 0
FLAG 192 192 +V
FLAG -144 160 +V
FLAG 192 288 -V
FLAG -272 272 0
FLAG -272 160 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 0 256 IN
FLAG 304 240 OUT
TEXT 232 352 Left 2 !.tran 3
TEXT 136 48 Bottom 2 ;Gain 1000 Amplifier with .01% Accuracy
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8047.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8047.asy)
C2 OUT 0 22
XU1 0 OUT 0 N003 IN N001 IN N002 LTM8047 ;pnba GND)Vout+)Vout-)Adj)Vin)Bias)Run)SS
Rload OUT 0 32
C1 N001 0 4.7
V1 IN 0 10
R1 N003 0 6.19K
.tran 2m startup
.lib LTM8047.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 708
WIRE 112 48 -32 48
WIRE 288 48 112 48
WIRE -32 64 -32 48
WIRE 288 64 288 48
WIRE 112 112 112 48
WIRE 128 112 112 112
WIRE -32 160 -32 144
WIRE 480 192 448 192
WIRE 576 192 480 192
WIRE 48 208 32 208
WIRE 128 208 112 208
WIRE 480 208 480 192
WIRE 576 208 576 192
WIRE 128 304 112 304
WIRE 480 320 480 272
WIRE 480 320 448 320
WIRE 576 320 576 288
WIRE 576 320 480 320
WIRE 576 336 576 320
WIRE 32 400 16 400
WIRE 128 400 112 400
WIRE 288 464 288 448
SYMBOL res 560 192 R0
SYMATTR InstName Rload
SYMATTR Value 32
SYMBOL voltage -32 48 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL PowerProducts\\LTM8047 288 256 R0
SYMATTR InstName U1
SYMBOL cap 464 208 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL res 128 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 6.19K
SYMBOL cap 112 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7
FLAG -32 160 0
FLAG 32 208 0
FLAG 16 400 0
FLAG 288 464 0
FLAG 576 336 0
FLAG 576 192 OUT
FLAG -32 48 IN
TEXT 528 416 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3681.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3681.asy)
R1 OUT N008 590K
Rload OUT 0 2.5
R4 N006 0 60.4K
R3 N004 N003 20K
XU1 OUT N002 N005 IN N001 N007 OUT N008 N004 N006 0 N005 0 LT3681 ;pnba BD)Boost)SW)Vin)Run/SS)Pgood)Bias)FB)Vc)Rt)GND)DC)DA
R6 IN N001 500K
L1 N005 OUT 6.8 Rpar=2K
C3 N003 0 330p
C4 N001 0 .01
C1 OUT 0 22
R2 N008 0 200K
C2 N002 N005 .47
R5 OUT N007 100K
V1 IN 0 30
.tran 500u startup
.lib LT3681.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1104 740
WIRE -352 64 -448 64
WIRE 0 64 -352 64
WIRE 192 64 96 64
WIRE 464 64 192 64
WIRE -448 80 -448 64
WIRE -352 80 -352 64
WIRE 0 96 0 64
WIRE 96 96 96 64
WIRE 192 96 192 64
WIRE -64 160 -352 160
WIRE 288 160 256 160
WIRE -448 176 -448 160
WIRE -352 176 -352 160
WIRE -240 240 -256 240
WIRE -160 240 -176 240
WIRE -64 240 -80 240
WIRE 288 240 288 224
WIRE 288 240 256 240
WIRE 352 240 288 240
WIRE 464 240 464 64
WIRE 464 240 432 240
WIRE 560 240 464 240
WIRE 656 240 560 240
WIRE 752 240 656 240
WIRE -352 256 -352 240
WIRE 656 256 656 240
WIRE 752 256 752 240
WIRE 464 272 464 240
WIRE -208 320 -256 320
WIRE -64 320 -128 320
WIRE 288 320 288 240
WIRE 288 320 256 320
WIRE 560 336 560 240
WIRE 656 352 656 320
WIRE 752 352 752 336
WIRE -64 400 -80 400
WIRE 464 400 464 352
WIRE 464 400 256 400
WIRE 464 416 464 400
WIRE 48 480 48 464
WIRE 144 480 144 464
WIRE 464 512 464 496
WIRE -80 544 -80 400
WIRE 560 544 560 416
WIRE 560 544 -80 544
SYMBOL res 736 240 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL res -368 64 R0
SYMATTR InstName R6
SYMATTR Value 500K
SYMBOL ind 336 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMATTR SpiceLine Rpar=2K
SYMBOL cap 640 256 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL voltage -448 64 R0
SYMATTR InstName V1
SYMATTR Value 30
SYMBOL cap 272 160 R0
WINDOW 3 30 49 Left 2
SYMATTR Value .47
SYMATTR InstName C2
SYMBOL res -112 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 60.4K
SYMBOL res 448 400 R0
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL PowerProducts\\LT3681 96 288 R0
SYMATTR InstName U1
SYMBOL cap -176 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 330p
SYMBOL res 544 320 R0
SYMATTR InstName R5
SYMATTR Value 100K
SYMBOL res -64 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL cap -368 176 R0
SYMATTR InstName C4
SYMATTR Value .01
SYMBOL res 448 256 R0
SYMATTR InstName R1
SYMATTR Value 590K
FLAG 656 352 0
FLAG 464 512 0
FLAG -256 240 0
FLAG -448 176 0
FLAG 144 480 0
FLAG 752 352 0
FLAG -256 320 0
FLAG -352 256 0
FLAG 752 240 OUT
FLAG -448 64 IN
FLAG 48 480 0
TEXT 192 512 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6020-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6020-1.asy)
R3 OUT N003 30K
XU2 N003 N002 +V -V N002 +V -V LT6020-1 ;pnba IN+)IN-)V+)V-)OUT)EN)DGND
C1 OUT N001 10p
R1 N002 N001 10K
XU1 DAC_OUT N001 +V -V OUT +V -V LT6020-1 ;pnba IN+)IN-)V+)V-)OUT)EN)DGND
V4 REF 0 2.5
R2 N001 REF 10K
V3 DAC_OUT 0 PULSE(0 2.5 20u 170n 170n 1m 2m)
V2 -V 0 -15
V1 +V 0 15
R4 N003 0 10K
.tran 200u
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 928 1032
WIRE -96 304 -240 304
WIRE 0 304 -16 304
WIRE 16 304 0 304
WIRE 544 304 96 304
WIRE -240 320 -240 304
WIRE -496 400 -496 384
WIRE -384 400 -384 384
WIRE 0 400 0 304
WIRE 48 400 0 400
WIRE 176 400 112 400
WIRE -240 416 -240 400
WIRE 96 464 64 464
WIRE 96 480 96 464
WIRE -496 496 -496 480
WIRE -384 496 -384 480
WIRE 0 512 0 400
WIRE 48 512 0 512
WIRE 176 528 176 400
WIRE 176 528 160 528
WIRE 272 528 176 528
WIRE 48 544 -224 544
WIRE -224 560 -224 544
WIRE 544 560 544 304
WIRE 544 560 384 560
WIRE 96 592 96 576
WIRE 96 592 64 592
WIRE 272 592 272 528
WIRE 464 608 432 608
WIRE 464 624 464 608
WIRE -224 656 -224 640
WIRE 384 656 384 560
WIRE 416 656 384 656
WIRE 544 672 544 560
WIRE 544 672 528 672
WIRE 272 688 272 672
WIRE 416 688 272 688
WIRE 272 704 272 688
WIRE 464 736 464 720
WIRE 464 736 432 736
WIRE 272 800 272 784
SYMBOL res 256 576 R0
SYMATTR InstName R3
SYMATTR Value 30K
SYMBOL res 112 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL LT6020-1 96 528 R0
SYMATTR InstName U1
SYMBOL voltage -224 544 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 2.5 20u 170n 170n 1m 2m)
SYMBOL LT6020-1 464 672 R0
SYMATTR InstName U2
SYMBOL cap 112 384 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage -240 304 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 2.5
SYMBOL voltage -384 384 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 0 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 256 688 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL voltage -496 384 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
FLAG -496 496 0
FLAG -384 496 0
FLAG -224 656 0
FLAG -224 544 DAC_OUT
FLAG 272 528 OUT
FLAG 96 464 +V
FLAG -496 384 +V
FLAG -384 384 -V
FLAG 96 592 -V
FLAG 464 608 +V
FLAG 464 736 -V
FLAG 272 800 0
FLAG -240 416 0
FLAG -240 304 REF
TEXT 592 784 Left 2 !.tran 200u
* Z:\home\khalils\Downloads\files\data\raw_asc\6dfb044d4233_schematic.asc
* Generated by LTspice 26.0.1 for Windows.
* EDIC Winter Internship (31-12-2024)\nBonus Design\nCommon Source Amplifier with Passive Load and NMOS as a driver
* .op
* .tf V(Vout) V2
* .tran 5m
;.param w 1u
;.step param w 0.13u 7.8u 0.13u
M1 Vout Vin 0 0 NMOS l=0.26u w=7.67u
V2 Vin 0 SINE(0.457 1m 1k) AC 1
V1 Vdd 0 1.8
CL Vout 0 1.5p
Rd Vdd Vout 11k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include IBM130nm.txt
.ac dec 10 10 1gig
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 16 240 -64
WIRE 240 128 240 96
WIRE 480 128 240 128
WIRE 592 128 480 128
WIRE 240 144 240 128
WIRE 480 160 480 128
WIRE 336 192 240 192
WIRE 32 224 16 224
WIRE 192 224 32 224
WIRE 240 256 240 240
WIRE 336 256 336 192
WIRE 336 256 240 256
WIRE -400 304 -400 240
WIRE -256 304 -256 240
WIRE 480 304 480 224
WIRE 240 448 240 256
WIRE -400 480 -400 384
WIRE -256 480 -256 384
SYMBOL res 224 0 R0
SYMATTR InstName Rd
SYMATTR Value 11k
SYMBOL voltage -256 288 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0.457 1m 1k)
SYMATTR Value2 AC 1
SYMBOL cap 464 160 R0
SYMATTR InstName CL
SYMATTR Value 1.5p
SYMBOL nmos4 192 144 R0
WINDOW 123 56 100 Left 2
SYMATTR InstName M1
SYMATTR Value2 l=0.26u w=7.67u
SYMBOL voltage -400 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
FLAG 32 224 Vin
FLAG 240 -64 Vdd
FLAG 592 128 Vout
FLAG 240 448 0
FLAG 480 304 0
FLAG -400 480 0
FLAG -256 480 0
FLAG -400 240 Vdd
FLAG -256 240 Vin
TEXT -608 -128 Left 2 ;EDIC Winter Internship (31-12-2024)\nBonus Design\nCommon Source Amplifier with Passive Load and NMOS as a driver
TEXT -440 -32 Left 2 !.include IBM130nm.txt
TEXT -440 -8 Left 2 !;.param w 1u
TEXT -440 24 Left 2 !;.step param w 0.13u 7.8u 0.13u
TEXT -440 56 Left 2 ;.op
TEXT -440 80 Left 2 ;.tf V(Vout) V2
TEXT -440 104 Left 2 ;.tran 5m
TEXT -440 128 Left 2 !.ac dec 10 10 1gig
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG721.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG721.asy)
V1 +V 0 5
C1 N002 0 35p
XU2 N003 N002 N001 0 +V ADG721 ;pnba IN)D)S)GND)Vdd
R1 N002 0 300
V4 N003 0 PULSE(0 3 0 10n 10n 980n 2u)
VS N001 0 3
.tran 10u
.lib ADG721.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -368 -16 -400 -16
WIRE -240 -16 -288 -16
WIRE 0 -16 -48 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE -480 32 -480 16
WIRE 112 32 112 -16
WIRE -240 48 -368 48
WIRE -368 112 -368 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -480 128 -480 112
WIRE -144 176 -144 160
WIRE -368 272 -368 192
SYMBOL voltage -480 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -272 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL ADG721 -144 32 R0
SYMATTR InstName U2
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL voltage -368 96 R0
WINDOW 3 17 129 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 10n 10n 980n 2u)
SYMATTR InstName V4
FLAG -480 128 0
FLAG -480 16 +V
FLAG -400 -16 0
FLAG -144 -112 +V
FLAG -144 176 0
FLAG -368 272 0
FLAG 0 112 0
FLAG 112 112 0
TEXT -536 200 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1790-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1790-3.3.asy)
C1 OUT 0 1
V1 IN 0 PWL(0 0 1 10)
XU1 IN 0 OUT LT1790-33 ;pnba IN)GND)OUT
Rload OUT 0 1K
.tran 1
.lib LT1790.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 48 -208 48
WIRE 336 48 288 48
WIRE 432 48 336 48
WIRE -208 64 -208 48
WIRE 336 64 336 48
WIRE 432 64 432 48
WIRE -208 160 -208 144
WIRE 336 160 336 128
WIRE 432 160 432 144
WIRE 160 176 160 160
SYMBOL res 416 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL cap 320 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LT1790-3.3 160 48 R0
SYMATTR InstName U1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -208 160 0
FLAG 336 160 0
FLAG 432 160 0
FLAG 160 176 0
FLAG 432 48 OUT
FLAG -208 48 IN
TEXT 256 224 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\9c3540342dc8_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N003 N002 11R
D3 N002 0 D
R1 N001 N004 3K3
D1 N004 0 D
V1 N001 0 3.3
V2 N003 0 12
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 10 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 64 -240 64
WIRE 528 80 496 80
WIRE 752 80 608 80
WIRE 752 144 752 80
WIRE -240 160 -240 64
WIRE 128 176 128 144
WIRE 128 176 -16 176
WIRE 160 176 128 176
WIRE 368 176 224 176
WIRE 432 176 432 80
WIRE 432 176 368 176
WIRE -240 336 -240 240
WIRE 368 336 368 176
WIRE 368 336 -240 336
WIRE 400 336 368 336
WIRE 752 336 752 224
WIRE 752 336 400 336
WIRE 400 352 400 336
SYMBOL voltage 752 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL res 624 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 11R
SYMBOL diode 160 192 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL res 112 48 R0
SYMATTR InstName R1
SYMATTR Value 3K3
SYMBOL schottky 496 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D3
SYMBOL voltage -240 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG 400 352 0
TEXT -272 376 Left 2 !.tran 0 10 0
* Z:\home\khalils\Downloads\files\data\raw_asc\44fc374e21dd_exp_2_electro.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2, XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
R2 N002 N006 1k
XU2 V2 N006 VP VN N007 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R5 N005 N007 1k
R6 0 N005 1k
R3 N006 N007 1k
V5 VP 0 15
V4 0 VN 15
V1 V1 0 SINE(0 1 1k)
XU1 V1 N002 VP VN N003 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V2 V2 0 SINE(0 2 1k)
R1 N003 N002 1k
R7 N004 N001 1k
XU3 N005 N004 VP VN N001 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R4 N004 N003 1k
.tran 0 10msec 0
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1480 680
WIRE 1056 80 880 80
WIRE 160 112 80 112
WIRE 352 128 224 128
WIRE 608 128 352 128
WIRE 608 160 608 128
WIRE 800 160 800 80
WIRE 800 160 688 160
WIRE 832 160 800 160
WIRE 80 208 80 112
WIRE 352 208 80 208
WIRE 832 208 832 160
WIRE 928 208 832 208
WIRE 352 224 352 208
WIRE 1056 224 1056 80
WIRE 1056 224 992 224
WIRE 864 240 736 240
WIRE 928 240 864 240
WIRE 1184 256 1184 176
WIRE 1184 256 1088 256
WIRE 736 272 736 240
WIRE 736 272 688 272
WIRE 352 304 96 304
WIRE 1184 304 1184 256
WIRE 1088 320 1088 256
WIRE 352 336 352 304
WIRE 96 352 96 304
WIRE 160 352 96 352
WIRE 864 352 864 240
WIRE 288 368 224 368
WIRE 288 416 288 368
WIRE 352 416 288 416
WIRE 608 416 608 272
WIRE 608 416 352 416
SYMBOL voltage -112 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 2 1k)
SYMBOL res 336 320 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 880 448 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R6
SYMATTR Value 1k
SYMBOL res 704 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL voltage -112 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1k)
SYMBOL OpAmps\\UniversalOpAmp 192 128 R0
SYMATTR InstName U1
SYMBOL res 704 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL res 336 208 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 1184 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 15
SYMBOL OpAmps\\UniversalOpAmp 192 368 R0
SYMATTR InstName U2
SYMBOL res 784 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R7
SYMATTR Value 1k
SYMBOL res 336 112 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL OpAmps\\UniversalOpAmp 960 224 R0
SYMATTR InstName U3
SYMBOL voltage 1184 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 15
FLAG 864 432 0
FLAG 1088 320 0
FLAG -112 400 0
FLAG -112 208 0
FLAG 192 96 VP
FLAG 192 336 VP
FLAG 960 192 VP
FLAG 1184 96 VP
FLAG 1184 384 VN
FLAG 960 256 VN
FLAG 192 160 VN
FLAG 192 400 VN
FLAG 160 144 V1
FLAG -112 128 V1
FLAG -112 320 V2
FLAG 160 384 V2
TEXT -146 482 Left 2 !.tran 0 10msec 0
* Z:\home\khalils\Downloads\files\data\raw_asc\45f4ef473f35_transistor_Vce_Vbe_and_Vce_Ic_curves.asc
* Generated by LTspice 26.0.1 for Windows.
* Show \n1. Vce vs Vbe\n2. Vce vs Ic\nfor a set of fixed Ib\nLook at the gain with Ic(Q1)/Ib(Q1)
B1 0 Vbe I={Ib}
Q1 Vce Vbe 0 0 2N3904
V1 Vce 0 20
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 20 0.01
.step param Ib 10u 150u 10u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 -32 192 -32
WIRE 384 128 384 -32
WIRE 192 144 192 -32
WIRE 0 192 -48 192
WIRE 80 192 80 96
WIRE 128 192 80 192
WIRE -48 304 -48 192
WIRE 192 304 192 240
WIRE 384 304 384 208
IOPIN 80 96 BiDir
IOPIN 384 -32 BiDir
SYMBOL bi 0 192 R270
WINDOW 0 32 40 VTop 2
WINDOW 3 -32 40 VBottom 2
SYMATTR InstName B1
SYMATTR Value I={Ib}
SYMBOL voltage 384 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 20
SYMBOL npn 128 144 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
FLAG -48 304 0
FLAG 192 304 0
FLAG 384 304 0
FLAG 80 96 Vbe
FLAG 384 -32 Vce
TEXT -72 328 Left 2 !.dc V1 0 20 0.01
TEXT -456 -96 Left 2 ;Show \n1. Vce vs Vbe\n2. Vce vs Ic\nfor a set of fixed Ib\nLook at the gain with Ic(Q1)/Ib(Q1)
TEXT 144 -80 Left 2 !.step param Ib 10u 150u 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\30732fa9c191_Balanced_Input.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N004 N001 +15 -15 N002 NE5532 ;pnba In+)In-)V+)V-)OUT
V1 +15 0 15
V2 -15 0 -15
R1 N001 N003 9K
R2 N004 N005 9K
R3 N002 N001 9K
R4 0 N004 9K
C1 N005 0 1nf
C2 N003 0 1nf
R5 N003 sig+ 1K
R6 N005 sig- 1K
V3 sig- 0 SINE(0 1 100) AC 1
V4 sig+ 0 SINE(0 1 100 0 0 180) AC 1 180
.lib LTC.lib
.ac oct 100 1 100k
* .tran 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 932 864
WIRE 656 144 608 144
WIRE 800 144 736 144
WIRE 160 224 64 224
WIRE 336 224 240 224
WIRE 480 224 336 224
WIRE 608 224 608 144
WIRE 608 224 560 224
WIRE 608 256 608 224
WIRE 672 256 608 256
WIRE 800 272 800 144
WIRE 800 272 736 272
WIRE 672 288 608 288
WIRE 160 320 64 320
WIRE 416 320 240 320
WIRE 480 320 416 320
WIRE 608 320 608 288
WIRE 608 320 560 320
WIRE 336 384 336 224
WIRE 416 384 416 320
WIRE 608 384 608 320
WIRE 336 480 336 448
WIRE 416 480 416 448
WIRE 608 480 608 464
FLAG 704 240 +15
FLAG 704 304 -15
FLAG 224 768 +15
FLAG 320 768 -15
FLAG 224 848 0
FLAG 320 848 0
FLAG 336 480 0
FLAG 416 480 0
FLAG 608 480 0
FLAG 16 768 sig-
FLAG 16 848 0
FLAG -80 768 sig+
FLAG -80 848 0
FLAG 64 224 sig+
FLAG 64 320 sig-
SYMBOL OpAmps/opamp2 704 208 R0
SYMATTR InstName U1
SYMATTR Value NE5532
SYMBOL voltage 224 752 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 320 752 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 576 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 9K
SYMBOL res 576 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 9K
SYMBOL res 752 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 9K
SYMBOL res 624 480 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 9K
SYMBOL cap 400 384 R0
SYMATTR InstName C1
SYMATTR Value 1nf
SYMBOL cap 320 384 R0
SYMATTR InstName C2
SYMATTR Value 1nf
SYMBOL res 256 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1K
SYMBOL res 256 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 1K
SYMBOL voltage 16 752 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
SYMATTR Value2 AC 1
SYMBOL voltage -80 752 R0
WINDOW 3 -278 99 Left 2
SYMATTR InstName V4
SYMATTR Value SINE(0 1 100 0 0 180)
SYMATTR Value2 AC 1 180
TEXT 720 424 Left 2 !.lib LTC.lib
TEXT 720 456 Left 2 !.ac oct 100 1 100k
TEXT 720 488 Left 2 ;.tran 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\00eeff80479d_Projeto1.asc
* Generated by LTspice 26.0.1 for Windows.
VG N002 0 0
M1 N001 N002 Vp 0 NMOS l=120n w=120n
Idx Vp 0 1.9594519962321935e-07
XU1 Vp N003 V+ 0 N001 opamp2 ;pnba In+)In-)V+)V-)OUT
I2 N003 0 4.7444254e-05
R1 N001 N003 10k
V1 V+ 0 1.2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VG 0.0 0.6 1e-3
.inc "C:\Users\guibe\Documents\EDAN\EDAn\Labs\modelos\modelo_130n_L120.txt"
.meas TRAN I2_avg AVG I(R1) FROM=0 TO=1m
.SUBCKT opamp2 in+ in- v+ v- out
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1468 680
WIRE 944 64 448 64
WIRE 448 128 448 64
WIRE 480 176 448 176
WIRE 400 208 144 208
WIRE 944 224 944 64
WIRE 944 224 800 224
WIRE 448 240 448 224
WIRE 480 240 480 176
WIRE 544 240 480 240
WIRE 800 240 800 224
WIRE 448 272 448 240
WIRE 944 272 944 224
WIRE 144 304 144 208
WIRE 1008 304 976 304
WIRE 1008 320 1008 304
WIRE 800 368 800 320
WIRE 864 368 800 368
WIRE 928 368 928 336
WIRE 928 368 864 368
WIRE 864 384 864 368
WIRE 144 400 144 384
WIRE 448 400 448 352
WIRE 448 400 144 400
WIRE 544 400 544 240
WIRE 544 400 448 400
WIRE 448 416 448 400
FLAG 448 416 0
FLAG 1008 320 0
FLAG 864 464 0
FLAG 912 304 V+
FLAG 448 240 Vp
FLAG 960 336 Vp
FLAG 1312 192 0
FLAG 1312 112 V+
SYMBOL voltage 144 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value 0
SYMATTR InstName VG
SYMBOL nmos4 400 128 R0
SYMATTR InstName M1
SYMATTR Value2 l=120n w=120n
SYMBOL current 448 272 R0
SYMATTR InstName Idx
SYMATTR Value 1.9594519962321935e-07
SYMBOL OpAmps\\opamp2 880 304 R270
SYMATTR InstName U1
SYMBOL current 864 384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I2
SYMATTR Value 4.7444254e-05
SYMBOL res 784 224 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 1312 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.2
TEXT 256 0 Left 2 !.dc VG 0.0 0.6 1e-3
TEXT 456 -80 Left 2 !.inc "C:\\Users\\guibe\\Documents\\EDAN\\EDAn\\Labs\\modelos\\modelo_130n_L120.txt"
TEXT 864 560 Left 2 !.meas TRAN I2_avg AVG I(R1) FROM=0 TO=1m
TEXT 776 -224 Left 2 !.SUBCKT opamp2 in+ in- v+ v- out