Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\04124479edb2_erroramp.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XErrorAmp (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
V4 Vref 0 4.8
V3 Vnon 0 2.5
R3 0 Vref 12.7k
Rcomp COMP FB 10k
V2 V- 0 -5
V1 V+ 0 5
XErrorAmp Vnon FB V+ V- COMP level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R2 Vref FB 4.99k
.dc V4 0 10
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 112 -64 112
WIRE 272 128 208 128
WIRE 400 128 272 128
WIRE 144 144 80 144
WIRE 80 256 80 144
WIRE 80 304 80 256
WIRE 160 304 80 304
WIRE 272 304 272 128
WIRE 272 304 240 304
WIRE 80 352 80 304
WIRE 80 480 80 432
WIRE 80 480 -80 480
WIRE 80 512 80 480
SYMBOL res 256 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rcomp
SYMATTR Value 10k
SYMBOL voltage 336 -80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 96 448 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 4.99k
SYMBOL voltage 592 -80 R0
SYMATTR InstName V4
SYMATTR Value 4.8
SYMBOL voltage 512 -80 R0
SYMATTR InstName V3
SYMATTR Value 2.5
SYMBOL voltage 416 -80 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 96 608 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 12.7k
SYMBOL OpAmps\\UniversalOpAmp 176 128 M180
SYMATTR InstName ErrorAmp
FLAG 336 16 0
FLAG 416 16 0
FLAG 512 16 0
FLAG 336 -64 V+
FLAG 416 -64 V-
FLAG 512 -64 Vnon
FLAG 592 16 0
FLAG 592 -64 Vref
FLAG 80 592 0
FLAG -80 480 Vref
FLAG 400 128 Vout
FLAG -64 112 Vnon
FLAG 176 96 V-
FLAG 176 160 V+
FLAG 80 256 FB
FLAG 272 304 COMP
TEXT -138 616 Left 2 !.dc V4 0 10
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3032-5.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 0 10
V1 N005 0 pwl(0 0 1 -10)
V2 N001 0 pwl(0 0 1 10)
C2 N006 0 10
R5 N002 0 100
R6 N006 0 100
C3 N002 N003 .01
C4 N004 N006 .01
XU1 N002 MP_01 N003 0 MP_02 N005 N006 MP_03 MP_04 N001 N004 N001 MP_05 N001 LT3032-5 ;pnba OUTP))BYPP)GND))INN)OUTN)))_SHDNN)BYPN)_SHDNP))INP
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3032-5.asy)
.lib LT3032.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1000 680
WIRE -64 32 -96 32
WIRE 80 32 16 32
WIRE 96 32 80 32
WIRE 400 32 352 32
WIRE 496 32 400 32
WIRE 576 32 496 32
WIRE 400 48 400 32
WIRE 496 48 496 32
WIRE 576 48 576 32
WIRE 80 128 80 32
WIRE 96 128 80 128
WIRE 400 128 400 112
WIRE 400 128 352 128
WIRE 496 144 496 112
WIRE 576 144 576 128
WIRE 368 224 352 224
WIRE 80 320 80 128
WIRE 96 320 80 320
WIRE 400 320 352 320
WIRE 576 320 576 304
WIRE 400 336 400 320
WIRE 496 336 496 304
WIRE -64 416 -96 416
WIRE 96 416 16 416
WIRE 400 416 400 400
WIRE 400 416 352 416
WIRE 496 416 496 400
WIRE 496 416 400 416
WIRE 576 416 576 400
WIRE 576 416 496 416
FLAG 368 224 0
FLAG -96 416 0
FLAG -96 32 0
FLAG 496 144 0
FLAG 496 304 0
FLAG 576 144 0
FLAG 576 304 0
SYMBOL cap 480 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage 32 416 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value pwl(0 0 1 -10)
SYMBOL voltage 32 32 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value pwl(0 0 1 10)
SYMBOL cap 480 400 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res 560 32 R0
SYMATTR InstName R5
SYMATTR Value 100
SYMBOL res 560 416 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R6
SYMATTR Value 100
SYMBOL cap 384 48 R0
SYMATTR InstName C3
SYMATTR Value .01
SYMBOL cap 384 336 R0
SYMATTR InstName C4
SYMATTR Value .01
SYMBOL PowerProducts\\LT3032-5 224 224 R0
SYMATTR InstName U1
TEXT 584 464 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1706-61.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1706-61.asy)
XU1 N005 N006 N001 0 N004 OUT N002 N003 N008 LTC1706-61 ;pnba VID2)VID3)Vcc)GND)FB)Sense)VID0)VID1)VID4
G1 0 OUT N007 N004 1
C1 OUT 0 .1
V7 N008 0 PULSE(0 2.4 0 1n 1n 8m 16m)
V4 N003 0 PULSE(0 2.4 0 1n 1n 1m 2m)
V6 N006 0 PULSE(0 2.4 0 1n 1n 4m 8m)
V5 N005 0 PULSE(0 2.4 0 1n 1n 2m 4m)
V3 N002 0 PULSE(0 2.4 0 1n 1n .5m 1m)
V1 N001 0 3.3
V2 N007 0 .6
.tran 16m
.lib LTC1706-61.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2536 1332
WIRE 944 720 864 720
WIRE 1328 720 944 720
WIRE 864 736 864 720
WIRE 1168 784 1008 784
WIRE 1008 800 1008 784
WIRE 864 816 864 800
WIRE 1168 816 1168 784
WIRE 1328 816 1328 720
WIRE 1856 880 1392 880
WIRE 1008 896 1008 880
WIRE 1856 896 1856 880
WIRE 1744 928 1392 928
WIRE 1744 960 1744 928
WIRE 1104 976 992 976
WIRE 1632 976 1392 976
WIRE 944 992 944 720
WIRE 1856 992 1856 976
WIRE 992 1008 992 976
WIRE 1632 1008 1632 976
WIRE 1536 1024 1392 1024
WIRE 1536 1056 1536 1024
WIRE 1744 1056 1744 1040
WIRE 992 1072 992 1056
WIRE 1440 1072 1392 1072
WIRE 1632 1104 1632 1088
WIRE 1440 1120 1440 1072
WIRE 1248 1136 1248 1120
WIRE 1536 1152 1536 1136
WIRE 944 1168 944 1072
WIRE 992 1168 992 1152
WIRE 1440 1216 1440 1200
SYMBOL cap 848 736 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage 1632 992 R0
SYMATTR InstName V5
SYMATTR Value PULSE(0 2.4 0 1n 1n 2m 4m)
SYMBOL voltage 1856 880 R0
SYMATTR InstName V3
SYMATTR Value PULSE(0 2.4 0 1n 1n .5m 1m)
SYMBOL voltage 1440 1104 R0
SYMATTR InstName V7
SYMATTR Value PULSE(0 2.4 0 1n 1n 8m 16m)
SYMBOL voltage 1008 784 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL g2 944 976 M0
SYMATTR InstName G1
SYMATTR Value 1
SYMBOL voltage 1536 1040 R0
SYMATTR InstName V6
SYMATTR Value PULSE(0 2.4 0 1n 1n 4m 8m)
SYMBOL voltage 1744 944 R0
SYMATTR InstName V4
SYMATTR Value PULSE(0 2.4 0 1n 1n 1m 2m)
SYMBOL voltage 992 1056 R0
SYMATTR InstName V2
SYMATTR Value .6
SYMBOL PowerProducts\\LTC1706-61 1248 976 R0
SYMATTR InstName U1
FLAG 1008 896 0
FLAG 1248 1136 0
FLAG 992 1168 0
FLAG 944 1168 0
FLAG 1856 992 0
FLAG 1744 1056 0
FLAG 1632 1104 0
FLAG 1536 1152 0
FLAG 864 816 0
FLAG 864 720 OUT
FLAG 1440 1216 0
TEXT 1928 1184 Left 2 !.tran 16m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2120-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2120-2.5.asy)
XU1 IN IN N002 0 0 OUT IN N001 IN IN ADP2120-2.5 ;pnba Vin)Pvin)SW)PGND)GND)FB)TRK)Pgood)Sync/Mode)EN
L1 N002 OUT 2.2
V1 IN 0 5
C1 OUT 0 20
Rload OUT 0 2.5
R1 OUT N001 100K
.tran 1m
.lib ADP2120-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 0 48 0
WIRE 288 0 128 0
WIRE 48 16 48 0
WIRE 288 16 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 640 64 576 64
WIRE 48 112 48 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 640 144 640 64
WIRE 640 144 560 144
WIRE 704 144 640 144
WIRE 560 160 560 144
WIRE 704 160 704 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 560 256 560 224
WIRE 704 256 704 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 640 304 640 144
WIRE 640 304 416 304
WIRE 288 368 288 352
SYMBOL res 688 144 R0
SYMATTR Value 2.5
SYMATTR InstName Rload
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 20
SYMBOL ADP2120-2.5 288 272 R0
SYMATTR InstName U1
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL voltage 48 0 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 560 256 0
FLAG 288 368 0
FLAG 48 112 0
FLAG 704 144 OUT
FLAG 704 256 0
FLAG 48 0 IN
TEXT 504 344 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\16ce9646523d_03-sbrt20u60sp5.asc
* Generated by LTspice 26.0.1 for Windows.
D1 anode 0 DI_SBRT20U60SP5
I1 0 anode 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
*SBRT20U60SP5 Spice Model v1.0 Last Revised 05/22/2014 Diodes Inc TRENCH SUPER BARRIER RECTIFIER
*SIMULATOR=SPICE3
.MODEL DI_SBRT20U60SP5 D ( IS=53.48u RS=7.620m BV=66.00 IBV=10.00
+ CJO=14.07n M=529.3m N=1.019 TT=43.20n EG=480.0m VJ=23.66m )
.dc I1 0.1 20 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1556 680
WIRE 320 96 224 96
WIRE 400 96 320 96
WIRE 224 128 224 96
WIRE 400 128 400 96
WIRE 224 240 224 208
WIRE 400 240 400 192
WIRE 400 240 224 240
WIRE 224 272 224 240
FLAG 224 272 0
FLAG 320 96 anode
SYMBOL diode 384 128 R0
SYMATTR InstName D1
SYMATTR Value DI_SBRT20U60SP5
SYMBOL current 224 208 R180
WINDOW 0 42 51 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 10
TEXT -32 -128 Left 2 !*SBRT20U60SP5 Spice Model v1.0 Last Revised 05/22/2014  Diodes Inc TRENCH SUPER BARRIER RECTIFIER\n*SIMULATOR=SPICE3\n \n.MODEL DI_SBRT20U60SP5 D  ( IS=53.48u RS=7.620m BV=66.00 IBV=10.00\n+ CJO=14.07n M=529.3m N=1.019 TT=43.20n EG=480.0m VJ=23.66m )
TEXT 224 320 Left 2 !.dc I1 0.1 20 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\AD4007.asc
* Generated by LTspice 26.0.1 for Windows.
V6 N002 0 1.8
V1 N003 0 PWL(0 0 100u 5)
R1 N004 N003 10
C1 0 N005 10p
V4 N008 0 PULSE(0 1.8 227n 0.1n 0.1n 40n 1u)
V3 N001 0 5
V2 N007 0 PWL(0 5 100u 0)
R2 N006 N007 10
XU1 N001 N002 N004 MP_01 0 N006 N005 N008 AD4007 EN_Hi_Z=1 ;pnba REF)Vdd)IN+))GND)IN-)Vout)CNV
.tran 110u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\AD4007.asy)
.lib AD4007.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1252
WIRE 704 224 368 224
WIRE 832 224 784 224
WIRE 368 288 368 224
WIRE 704 336 496 336
WIRE 832 336 784 336
WIRE -208 368 -240 368
WIRE -80 368 -128 368
WIRE 80 368 0 368
WIRE 80 416 80 368
WIRE 144 416 80 416
WIRE 560 432 496 432
WIRE 688 432 624 432
WIRE 144 448 80 448
WIRE -208 496 -240 496
WIRE -80 496 -128 496
WIRE 80 496 80 448
WIRE 80 496 0 496
WIRE 704 528 496 528
WIRE 832 528 784 528
WIRE 368 608 368 576
FLAG 368 608 0
FLAG 832 336 0
FLAG -240 368 0
FLAG 688 432 0
FLAG 832 528 0
FLAG 832 224 0
FLAG -240 496 0
SYMBOL voltage 688 336 M90
WINDOW 0 47 41 VRight 2
WINDOW 3 -44 39 VRight 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V6
SYMATTR Value 1.8
SYMBOL voltage -112 368 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 100u 5)
SYMBOL res 16 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL cap 624 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 688 528 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 1.8 227n 0.1n 0.1n 40n 1u)
SYMBOL voltage 688 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -112 496 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 5 100u 0)
SYMBOL res 16 480 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL AD4007 400 432 R0
SYMATTR InstName U1
TEXT 176 616 Left 2 !.tran 110u
* Z:\home\khalils\Downloads\files\data\raw_asc\342b9367a938_1101.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1101.asy)
V3 IN 0 SINE(0 .1 1K)
V1 +V 0 15
V2 -V 0 -15
XU1 0 N001 IN -V +V 0 N002 OUT LT1101 ;pnba GND)Tap1)In-)V-)V+)In+)Tap2)Out
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 80 64 64 64
WIRE 352 64 336 64
WIRE -368 96 -368 80
WIRE -240 96 -240 80
WIRE 80 128 64 128
WIRE 352 128 336 128
WIRE -368 192 -368 176
WIRE -240 192 -240 176
WIRE 80 192 -112 192
WIRE 352 192 336 192
WIRE -112 208 -112 192
WIRE 80 256 64 256
WIRE 368 256 336 256
WIRE -112 304 -112 288
SYMBOL voltage -240 80 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT1101 208 160 R0
SYMATTR InstName U1
SYMBOL voltage -112 192 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 .1 1K)
SYMBOL voltage -368 80 R0
SYMATTR InstName V2
SYMATTR Value -15
FLAG -240 192 0
FLAG -240 80 +V
FLAG 64 256 -V
FLAG -368 192 0
FLAG -368 80 -V
FLAG -112 304 0
FLAG 368 256 +V
FLAG 64 64 0
FLAG 352 192 0
FLAG 352 64 OUT
FLAG -112 192 IN
TEXT 328 328 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\10ad88b64f63_mosswitchA4.asc
* Generated by LTspice 26.0.1 for Windows.
* Pull to GND or tristate
Q1 N002 N003 N001 0 BC857C
Q2 N004 0 0 0 BC847C
R1 N002 0 100
R2 N003 N004 1k
R3 N001 0 100k
V1 N001 0 17
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 872
WIRE -240 -208 -480 -208
WIRE -32 -208 -240 -208
WIRE 368 -208 64 -208
WIRE 16 -112 16 -144
WIRE -240 -96 -240 -208
WIRE 16 0 16 -32
WIRE -240 48 -240 -16
WIRE -48 48 -240 48
WIRE 368 160 368 -208
WIRE -480 176 -480 -208
WIRE -480 272 -480 256
WIRE -240 272 -240 48
WIRE -240 272 -480 272
WIRE 16 272 16 96
WIRE 16 272 -240 272
WIRE 368 272 368 240
WIRE 368 272 16 272
WIRE -480 288 -480 272
SYMBOL npn -48 0 R0
SYMATTR InstName Q2
SYMATTR Value BC847C
SYMBOL pnp 64 -144 M270
SYMATTR InstName Q1
SYMATTR Value BC857C
SYMBOL res 352 144 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 0 -128 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -480 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 17
SYMBOL res -256 -112 R0
SYMATTR InstName R3
SYMATTR Value 100k
FLAG -480 288 0
TEXT -456 352 Left 2 !.tran 1
TEXT -264 16 VRight 2 ;Pull to GND or tristate
* Z:\home\khalils\Downloads\files\data\raw_asc\1248933d7701_.asc
* Generated by LTspice 26.0.1 for Windows.
Cth1 T N001 2.5e-13
Rf 1 2 R=Rpf()
B2 0 T I=joule()
B1 N001 0 V=Tamb
Rth1 T N001 1.8e5
.FUNC joule()=Rpf()*i(Rf)**2
.FUNC Rpf()=R0*exp(q*(Ea-delta())/(k*v(T)))
.FUNC delta()=pow(q*E()/(pi*e0*er),0.5)
.FUNC E()=dv()/d
.FUNC dv()=v(1)-v(2)
.PARAM R0=65
.PARAM Ea=0.215
.PARAM Tamb=298
.tran 0 1 0 1e-4
.PARAM q=1.6e-19
.PARAM e0=8.85e-12
.PARAM er=45
.PARAM k=1.38e-23
.PARAM d=1.8e-8
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 -320 -240 -320
WIRE 32 -320 -112 -320
WIRE 32 -288 32 -320
WIRE -112 -272 -112 -320
WIRE -512 -240 -576 -240
WIRE -512 -208 -512 -240
WIRE -240 -208 -240 -320
WIRE -112 -176 -112 -208
WIRE 32 -176 32 -208
WIRE 32 -176 -112 -176
WIRE -112 -144 -112 -176
WIRE -512 -96 -512 -128
WIRE -512 -96 -576 -96
WIRE -240 -32 -240 -128
WIRE -112 -32 -112 -64
WIRE -112 -32 -240 -32
WIRE -240 0 -240 -32
SYMBOL bi -240 -128 R180
WINDOW 0 26 81 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName B2
SYMATTR Value I=joule()
SYMBOL Misc\\EuropeanResistor 16 -304 R0
SYMATTR InstName Rth1
SYMATTR Value 1.8e5
SYMBOL bv -112 -160 R0
SYMATTR InstName B1
SYMATTR Value V=Tamb
SYMBOL Misc\\EuropeanResistor -528 -224 R0
SYMATTR InstName Rf
SYMATTR Value R=Rpf()
SYMBOL cap -128 -272 R0
SYMATTR InstName Cth1
SYMATTR Value 2.5e-13
FLAG -240 0 0
FLAG -112 -320 T
FLAG -576 -240 1
FLAG -576 -96 2
TEXT 224 -280 Left 2 !.FUNC joule()=Rpf()*i(Rf)**2\n \n.FUNC Rpf()=R0*exp(q*(Ea-delta())/(k*v(T)))\n \n.FUNC delta()=pow(q*E()/(pi*e0*er),0.5)\n \n.FUNC E()=dv()/d\n \n.FUNC dv()=v(1)-v(2)
TEXT -688 56 Left 2 !.PARAM R0=65\n.PARAM Ea=0.215\n.PARAM Tamb=298
TEXT -816 -400 Left 2 !.tran 0 1 0 1e-4
TEXT -360 56 Left 2 !.PARAM q=1.6e-19 \n.PARAM e0=8.85e-12 \n.PARAM er=45 \n.PARAM k=1.38e-23 \n.PARAM d=1.8e-8
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7182-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7182-3.0.asy)
XU1 OUT MP_01 MP_02 N001 MP_03 0 IN ADP7182-x.x Rset=600k ;pnba Vout)))EN))GND)Vin
V2 N001 0 PULSE(0 2 200u 1n 1n 10m)
V1 IN 0 -8
R1 OUT 0 50
C1 IN 0 2.2
C2 OUT 0 2.2
.tran 1m
.lib ADP7182-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 -80 -48
WIRE 112 -48 32 -48
WIRE 432 -48 368 -48
WIRE 544 -48 432 -48
WIRE -80 -32 -80 -48
WIRE 32 -32 32 -48
WIRE 432 -32 432 -48
WIRE 544 -32 544 -48
WIRE -80 64 -80 48
WIRE 32 64 32 32
WIRE 432 64 432 32
WIRE 544 64 544 48
WIRE 112 144 32 144
WIRE 32 160 32 144
WIRE 32 256 32 240
WIRE 240 256 240 208
SYMBOL cap 16 -32 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL voltage 32 144 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 200u 1n 1n 10m)
SYMBOL res 528 -48 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 2.2
SYMBOL ADP7182-3.0 240 48 R0
SYMATTR InstName U1
SYMBOL voltage -80 -48 R0
SYMATTR InstName V1
SYMATTR Value -8
FLAG -80 64 0
FLAG 32 64 0
FLAG 432 64 0
FLAG 32 256 0
FLAG 240 256 0
FLAG 544 64 0
FLAG 32 -48 IN
FLAG 432 -48 OUT
TEXT 528 248 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\13201ff6b543_pad_buffer.asc
* Generated by LTspice 26.0.1 for Windows.
AX1 N008 vss vss vss vss vss vss vss BUF wn={wpad* fac * fac * fac * fac * fac * fac * fac } wp={wpad * mp * fac * fac * fac* fac * fac* fac * fac }
AX2 N009 vss vss vss vss vss vss vss BUF wn={wpad* fac * fac * fac * fac * fac * fac } wp={wpad * mp * fac * fac* fac * fac* fac * fac }
AX3 N010 vss vss vss vss vss vss vss BUF wn={wpad* fac * fac * fac * fac * fac } wp={wpad * mp * fac * fac* fac * fac* fac }
AX4 N011 vss vss vss vss vss vss vss BUF wn={wpad* fac * fac * fac * fac } wp={wpad * mp * fac* fac * fac* fac }
AX5 N012 vss vss vss vss vss vss vss BUF wn={wpad* fac * fac * fac } wp={wpad * mp * fac * fac* fac }
AX6 N013 vss vss vss vss vss vss vss BUF wn={wpad* fac * fac } wp={wpad * mp * fac* fac }
AX7 N014 vss vss vss vss vss vss vss BUF wn={wpad * fac } wp={wpad * mp * fac }
AX8 N015 vss vss vss vss vss vss vss BUF wn={wpad } wp={wpad * mp }
.param wpad=360u mp=2.16 fac=0.401
.lib BU_180nm.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1168 680
WIRE 48 224 -16 224
WIRE 144 224 48 224
WIRE 240 224 144 224
WIRE 336 224 240 224
WIRE 432 224 336 224
WIRE 528 224 432 224
WIRE 624 224 528 224
WIRE 720 224 624 224
WIRE 48 304 48 224
WIRE 144 304 144 224
WIRE 240 304 240 224
WIRE 336 304 336 224
WIRE 432 304 432 224
WIRE 528 304 528 224
WIRE 624 304 624 224
WIRE 720 304 720 224
WIRE 32 320 -16 320
WIRE 128 320 80 320
WIRE 224 320 176 320
WIRE 320 320 272 320
WIRE 416 320 368 320
WIRE 512 320 464 320
WIRE 608 320 560 320
WIRE 704 320 656 320
WIRE 800 320 752 320
WIRE 48 432 48 336
WIRE 48 432 -16 432
WIRE 144 432 144 336
WIRE 144 432 48 432
WIRE 240 432 240 336
WIRE 240 432 144 432
WIRE 336 432 336 336
WIRE 336 432 240 432
WIRE 432 432 432 336
WIRE 432 432 336 432
WIRE 528 432 528 336
WIRE 528 432 432 432
WIRE 624 432 624 336
WIRE 624 432 528 432
WIRE 720 432 720 336
WIRE 720 432 624 432
SYMBOL inv 624 320 R0
SYMATTR InstName X7
SYMATTR SpiceLine wn={wpad * fac } wp={wpad * mp * fac }
SYMBOL inv 48 320 R0
SYMATTR InstName X1
SYMATTR SpiceLine wn={wpad* fac * fac * fac * fac * fac * fac * fac } wp={wpad * mp * fac * fac * fac* fac * fac* fac * fac }
SYMBOL inv 720 320 R0
SYMATTR InstName X8
SYMATTR SpiceLine wn={wpad } wp={wpad * mp }
SYMBOL inv 240 320 R0
SYMATTR InstName X3
SYMATTR SpiceLine wn={wpad* fac * fac * fac * fac * fac } wp={wpad * mp * fac * fac* fac * fac* fac }
SYMBOL inv 144 320 R0
SYMATTR InstName X2
SYMATTR SpiceLine wn={wpad* fac * fac * fac * fac * fac * fac } wp={wpad * mp * fac * fac* fac * fac* fac * fac }
SYMBOL inv 528 320 R0
SYMATTR InstName X6
SYMATTR SpiceLine wn={wpad* fac * fac } wp={wpad * mp * fac* fac }
SYMBOL inv 336 320 R0
SYMATTR InstName X4
SYMATTR SpiceLine wn={wpad* fac * fac * fac * fac } wp={wpad * mp * fac* fac * fac* fac }
SYMBOL inv 432 320 R0
SYMATTR InstName X5
SYMATTR SpiceLine wn={wpad* fac * fac * fac } wp={wpad * mp * fac * fac* fac }
FLAG -16 224 vdd
FLAG -16 320 in
FLAG 800 320 out
FLAG -16 432 vss
TEXT -40 128 Left 2 !.param wpad=360u mp=2.16 fac=0.401\n.lib BU_180nm.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\e3e13744c85b_etaj4.asc
* Generated by LTspice 26.0.1 for Windows.
* .op
* .dc V1 -15 15 10mV
* .tran 2.5m
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADTL082.asy)
V1 N006 0 SINE(0 7.87 4k) AC 1
R5 Vout4 N003 10k
D1 N002 N004 D
XU1 0 N001 V+ V- N004 ADTL082 ;pnba In+)In-)V+)V-)OUT
R1 N001 N006 5k
XU2 N005 N003 V+ V- Vout4 ADTL082 ;pnba In+)In-)V+)V-)OUT
R3 N002 N001 5k
V3 V+ 0 15
R4 N003 N002 5k
R2 N005 N001 10k
V2 V- 0 -15
D2 N004 N005 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.ac dec 100 0.1 10Meg
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -496 -304 -576 -304
WIRE -336 -304 -416 -304
WIRE -224 -304 -336 -304
WIRE -112 -304 -144 -304
WIRE 0 -304 -112 -304
WIRE 128 -304 80 -304
WIRE -336 -272 -336 -304
WIRE -576 -112 -576 -304
WIRE -576 -112 -672 -112
WIRE -480 -112 -576 -112
WIRE -112 -112 -112 -304
WIRE -64 -112 -112 -112
WIRE -672 -96 -672 -112
WIRE -336 -96 -336 -208
WIRE -336 -96 -416 -96
WIRE 128 -96 128 -304
WIRE 128 -96 0 -96
WIRE 224 -96 128 -96
WIRE -480 -80 -512 -80
WIRE -64 -80 -112 -80
WIRE -336 -48 -336 -96
WIRE -512 -32 -512 -80
WIRE -672 64 -672 -16
WIRE -576 96 -576 -112
WIRE -512 96 -576 96
WIRE -336 96 -336 16
WIRE -336 96 -432 96
WIRE -112 96 -112 -80
WIRE -112 96 -336 96
WIRE -672 176 -672 144
SYMBOL res -688 -112 R0
SYMATTR InstName R1
SYMATTR Value 5k
SYMBOL res 96 -320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL diode -352 -48 R0
SYMATTR InstName D2
SYMBOL voltage 336 -464 R0
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL OpAmps\\ADTL082 -448 -160 R0
WINDOW 3 17 90 Left 2
SYMATTR InstName U1
SYMBOL voltage 208 -464 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL OpAmps\\ADTL082 -32 -160 R0
SYMATTR InstName U2
SYMBOL res -128 -320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 5k
SYMBOL voltage -672 48 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value SINE(0 7.87 4k)
SYMBOL res -400 -320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5k
SYMBOL res -416 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL diode -352 -272 R0
SYMATTR InstName D1
FLAG -672 176 0
FLAG -512 -32 0
FLAG 208 -368 0
FLAG 336 -368 0
FLAG 336 -448 V+
FLAG 208 -448 V-
FLAG -448 -128 V+
FLAG -32 -128 V+
FLAG -32 -64 V-
FLAG -448 -64 V-
FLAG 224 -96 Vout4
TEXT -624 -488 Left 2 !.ac dec 100 0.1 10Meg
TEXT -616 -520 Left 2 ;.op
TEXT -632 -456 Left 2 ;.dc V1 -15 15 10mV
TEXT -624 -424 Left 2 ;.tran 2.5m