Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1762-1.25.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1762-1.25.asy)
V1 IN 0 1.6
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1762 Radj=8333.33 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
R2 N001 IN 50K
R1 OUT 0 1
C1 N004 0 1
C4 OUT 0 10
C3 N002 0 1
C2 N003 0 10n
.tran 1m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL ADP1762-1.25 224 176 R0
SYMATTR InstName U1
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -128 -32 R0
SYMATTR InstName V1
SYMATTR Value 1.6
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6105.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT6105.asy)
I1 N002 0 SINE(1 .9 1K)
R1 N001 N002 50m
R4 N006 0 100
V2 N005 0 5
R2 N001 N003 100
XU1 N004 N005 0 N006 MP_01 N003 LT6105 ;pnba IN-)V+)V-)Vout))IN+
V1 N001 0 36
R3 N002 N004 100
.tran 3m
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -48 -32 -48
WIRE 208 -48 160 -48
WIRE 320 -48 288 -48
WIRE 480 -48 320 -48
WIRE -32 -32 -32 -48
WIRE 160 -32 160 -48
WIRE 320 -32 320 -48
WIRE 480 -32 480 -48
WIRE -32 64 -32 48
WIRE 160 64 160 48
WIRE 320 64 320 48
WIRE 480 64 480 48
WIRE 112 192 -32 192
WIRE 480 192 368 192
WIRE -32 208 -32 192
WIRE 480 208 480 192
WIRE -32 304 -32 288
WIRE 480 304 480 288
WIRE 240 336 240 320
SYMBOL voltage -32 192 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 304 -48 R0
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL PowerProducts\\LT6105 240 192 R0
SYMATTR InstName U1
SYMBOL voltage -32 -48 R0
SYMATTR InstName V1
SYMATTR Value 36
SYMBOL res 464 192 R0
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL res 192 -32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 50m
SYMBOL res 144 -48 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL current 480 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value SINE(1 .9 1K)
FLAG 480 304 0
FLAG 240 336 0
FLAG -32 64 0
FLAG -32 304 0
FLAG 480 64 0
TEXT 552 328 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\0c48f419f88f_Rbot_bias_sim.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vgate VDC {6*470000}
R2 0 Vgate {Rbot}
D1 0 Vgate BZX84C8V2L
V1 VDC 0 PWL(0 0 100m 100)
I1 Vgate 0 {Ileak}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1
.step param Rbot 100k 1Meg 10k
.param Ileak=100n Rbot=330k
.meas TRAN Vth FIND V(VDC) WHEN V(Vgate)=3.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 112 -64 112
WIRE 16 112 -48 112
WIRE 192 112 96 112
WIRE 240 112 192 112
WIRE 272 112 240 112
WIRE 352 112 272 112
WIRE -64 128 -64 112
WIRE 192 128 192 112
WIRE 272 144 272 112
WIRE 64 208 -64 208
WIRE 192 208 64 208
WIRE 272 208 192 208
WIRE 352 208 352 192
WIRE 352 208 272 208
WIRE 64 224 64 208
FLAG 64 224 0
FLAG 240 112 Vgate
FLAG -48 112 VDC
SYMBOL res 112 96 R90
WINDOW 0 -31 53 VBottom 2
WINDOW 3 -31 53 VTop 2
SYMATTR InstName R1
SYMATTR Value {6*470000}
SYMBOL res 208 224 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value {Rbot}
SYMBOL zener 288 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 -114 -31 Left 2
SYMATTR InstName D1
SYMATTR Value BZX84C8V2L
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage -64 112 R0
WINDOW 0 -69 30 Left 2
WINDOW 3 -147 68 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 100m 100)
SYMBOL current 352 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value {Ileak}
TEXT -98 284 Left 2 !.tran 1
TEXT 24 296 Left 2 !.step param Rbot 100k 1Meg 10k
TEXT 40 352 Left 2 !.param Ileak=100n Rbot=330k
TEXT 48 392 Left 2 !.meas TRAN Vth FIND V(VDC) WHEN V(Vgate)=3.2
* Z:\home\khalils\Downloads\files\data\raw_asc\571c8326d453_zd6v8.asc
* Generated by LTspice 26.0.1 for Windows.
*SRC=1N4736A;DI_1N4736A;Diodes;Zener <=10V; 6.80V 1.00W Diodes Inc. Zener
*SYM=HZEN
* Terminals A K
* You can save the model into a file, e.g. z_diodes.lib.\nThen just add a SPICE-line to your schematic to include this file\n \n.include z_diode.lib
+ CJO=123p VJ=0.750 M=0.330 TT=50.1n )
DZ 3 1 DR
R1 N001 vz 1k
VZ 2 3 6.05
XD1 0 vz DI_1N4736A ;pnba +)-
V1 N001 0 10
D1 1 2 DF
.SUBCKT DI_1N4736A 1 2
.MODEL DF D ( IS=60.6p RS=0.620 N=1.10
.MODEL DR D ( IS=12.1f RS=0.209 N=1.00 )
.ENDS
.op
.dc V1 -10 10 .01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -208 160 -208 80
WIRE -208 288 -208 240
WIRE -128 80 -208 80
WIRE 16 80 -48 80
WIRE 16 176 16 80
WIRE 16 288 16 240
SYMBOL res -144 96 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -208 144 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL zener 0 240 M180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D1
SYMATTR Value DI_1N4736A
SYMATTR Prefix X
FLAG 16 288 0
FLAG -208 288 0
FLAG 16 80 vz
TEXT -272 368 Left 0 !*SRC=1N4736A;DI_1N4736A;Diodes;Zener <=10V; 6.80V 1.00W Diodes Inc. Zener\n*SYM=HZEN\n.SUBCKT DI_1N4736A 1 2\n* Terminals A K\nD1 1 2 DF\nDZ 3 1 DR\nVZ 2 3 6.05\n.MODEL DF D ( IS=60.6p RS=0.620 N=1.10\n+ CJO=123p VJ=0.750 M=0.330 TT=50.1n )\n.MODEL DR D ( IS=12.1f RS=0.209 N=1.00 )\n.ENDS
TEXT -200 -16 Left 0 !.op
TEXT -200 -40 Left 0 !.dc V1 -10 10 .01
TEXT -232 -200 Left 0 ;You can save the model into a file, e.g. z_diodes.lib.\nThen just add a SPICE-line to your schematic to  include this file\n \n.include z_diode.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3525-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3525-3.asy)
C1 OUT 0 10
Rload OUT 0 50
XU1 IN 0 IN OUT MP_01 N001 LTC3525-3 ;pnba _SHDN)GND)Vin)Vout))SW
L1 IN N001 10
V1 IN 0 1
.tran 1m startup
.lib LTC3525-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 64 0 64
WIRE 320 64 192 64
WIRE 0 160 0 64
WIRE 0 160 -112 160
WIRE 32 160 0 160
WIRE 320 160 320 64
WIRE 320 160 288 160
WIRE -112 176 -112 160
WIRE -112 272 -112 256
WIRE 0 304 0 160
WIRE 32 304 0 304
WIRE 320 304 288 304
WIRE 400 304 320 304
WIRE 416 304 400 304
WIRE 320 320 320 304
WIRE 416 320 416 304
WIRE 160 384 160 368
WIRE 320 416 320 384
WIRE 416 416 416 400
SYMBOL voltage -112 160 R0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL PowerProducts\\LTC3525-3 160 208 R0
SYMATTR InstName U1
SYMBOL cap 304 320 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ind 96 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL res 400 304 R0
SYMATTR InstName Rload
SYMATTR Value 50
FLAG 320 416 0
FLAG 160 384 0
FLAG -112 272 0
FLAG 416 416 0
FLAG 400 304 OUT
FLAG -112 160 IN
TEXT 80 424 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\13ddae750e5d_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N002 {RA}
R2 N002 N003 {RB}
R3 N003 N004 {RC}
R4 N004 0 {RD}
V1 N001 0 9
.param RA=table(ram4 , 1,1k, 2,1.5k, 3,2.2k, 4,3.3k, 5,4.7k, 6,6.8k, 7,10k, 8,15k, 9,22k,
+ 10,33k, 11,47k, 12,68k, 13,100k, 14,150k, 15,220k, 16,330k, 17,470k, 18,680k, 19,1meg)
.param ram1=int(mc(6.5,1)+7)
.param ram2=int(mc(6.5,1)+7)
.param ram3=int(mc(6.2,1)+7)
.param ram4=int(mc(6.5,1)+7)
.param RB=table(ram3 , 1,1k, 2,1.5k, 3,2.2k, 4,3.3k, 5,4.7k, 6,6.8k, 7,10k, 8,15k, 9,22k,
+ 10,33k, 11,47k, 12,68k, 13,100k, 14,150k, 15,220k, 16,330k, 17,470k, 18,680k, 19,1meg)
.param RC=table(ram2 , 1,1k, 2,1.5k, 3,2.2k, 4,3.3k, 5,4.7k, 6,6.8k, 7,10k, 8,15k, 9,22k,
+ 10,33k, 11,47k, 12,68k, 13,100k, 14,150k, 15,220k, 16,330k, 17,470k, 18,680k, 19,1meg)
.param RD=table(ram1 , 1,1k, 2,1.5k, 3,2.2k, 4,3.3k, 5,4.7k, 6,6.8k, 7,10k, 8,15k, 9,22k,
+ 10,33k, 11,47k, 12,68k, 13,100k, 14,150k, 15,220k, 16,330k, 17,470k, 18,680k, 19,1meg)
.op
.meas OP RA_val PARAM RA
.step param iterations 0 100 1
.meas OP RB_val PARAM RB
.meas OP RC_val PARAM RC
.meas OP RD_val PARAM RD
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 680
WIRE -1200 -32 -1424 -32
WIRE -1424 -16 -1424 -32
WIRE -1200 112 -1200 48
WIRE -1200 272 -1200 192
WIRE -1200 400 -1200 352
FLAG -1200 480 0
FLAG -1424 64 0
SYMBOL res -1216 -48 R0
SYMATTR InstName R1
SYMATTR Value {RA}
SYMBOL res -1216 96 R0
SYMATTR InstName R2
SYMATTR Value {RB}
SYMBOL res -1216 256 R0
SYMATTR InstName R3
SYMATTR Value {RC}
SYMBOL res -1216 384 R0
SYMATTR InstName R4
SYMATTR Value {RD}
SYMBOL voltage -1424 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9
TEXT -824 64 Left 2 !.param RA=table(ram4 ,  1,1k,  2,1.5k,  3,2.2k,  4,3.3k,  5,4.7k,  6,6.8k,  7,10k,  8,15k,  9,22k,  \n+  10,33k,  11,47k,  12,68k,  13,100k, 14,150k,  15,220k,  16,330k,  17,470k,  18,680k,  19,1meg)
TEXT 688 248 Left 2 !.param ram1=int(mc(6.5,1)+7)
TEXT 688 192 Left 2 !.param ram2=int(mc(6.5,1)+7)
TEXT 688 136 Left 2 !.param ram3=int(mc(6.2,1)+7)
TEXT 688 88 Left 2 !.param ram4=int(mc(6.5,1)+7)
TEXT -824 120 Left 2 !.param RB=table(ram3 ,  1,1k,  2,1.5k,  3,2.2k,  4,3.3k,  5,4.7k,  6,6.8k,  7,10k,  8,15k,  9,22k,  \n+  10,33k,  11,47k,  12,68k,  13,100k, 14,150k,  15,220k,  16,330k,  17,470k,  18,680k,  19,1meg)
TEXT -824 184 Left 2 !.param RC=table(ram2 ,  1,1k,  2,1.5k,  3,2.2k,  4,3.3k,  5,4.7k,  6,6.8k,  7,10k,  8,15k,  9,22k,  \n+  10,33k,  11,47k,  12,68k,  13,100k, 14,150k,  15,220k,  16,330k,  17,470k,  18,680k,  19,1meg)
TEXT -824 240 Left 2 !.param RD=table(ram1 ,  1,1k,  2,1.5k,  3,2.2k,  4,3.3k,  5,4.7k,  6,6.8k,  7,10k,  8,15k,  9,22k,  \n+  10,33k,  11,47k,  12,68k,  13,100k, 14,150k,  15,220k,  16,330k,  17,470k,  18,680k,  19,1meg)
TEXT -488 -216 Left 2 !.op
TEXT -840 440 Left 2 !.meas OP RA_val PARAM RA
TEXT -704 -72 Left 2 !.step param iterations 0 100 1
TEXT -496 440 Left 2 !.meas OP RB_val PARAM RB
TEXT -160 440 Left 2 !.meas OP RC_val PARAM RC
TEXT 176 440 Left 2 !.meas OP RD_val PARAM RD
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3526L.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3526L.asy)
C1 OUT 0 4.7 Rser=1m
R2 N002 0 1Meg
L1 IN N001 4.7 Rpar=5K
XU1 N001 0 IN IN N002 OUT LTC3526L ;pnba SW)GND)Vin)_SHDN)FB)Vout
V1 IN 0 2
R1 OUT N002 1.78Meg
Rload OUT 0 16.5
.tran .5m startup
.lib LTC3526L.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 80 -144 80
WIRE 0 80 -48 80
WIRE 128 80 80 80
WIRE -144 96 -144 80
WIRE 128 128 128 80
WIRE -144 192 -144 176
WIRE -48 192 -48 80
WIRE -16 192 -48 192
WIRE 320 192 272 192
WIRE 480 192 320 192
WIRE 592 192 480 192
WIRE 320 208 320 192
WIRE 480 208 480 192
WIRE 592 208 592 192
WIRE 480 304 480 272
WIRE 592 304 592 288
WIRE -48 320 -48 192
WIRE -16 320 -48 320
WIRE 320 320 320 288
WIRE 320 320 272 320
WIRE 320 336 320 320
WIRE 128 400 128 384
WIRE 320 432 320 416
SYMBOL res 576 192 R0
SYMATTR InstName Rload
SYMATTR Value 16.5
SYMBOL PowerProducts\\LTC3526L 128 256 R0
SYMATTR InstName U1
SYMBOL res 304 320 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL ind -16 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=5K
SYMBOL res 304 192 R0
SYMATTR InstName R1
SYMATTR Value 1.78Meg
SYMBOL cap 464 208 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1m
SYMBOL voltage -144 80 R0
WINDOW 3 24 98 Left 2
SYMATTR Value 2
SYMATTR InstName V1
FLAG -144 192 0
FLAG 128 400 0
FLAG 320 432 0
FLAG 480 304 0
FLAG 592 304 0
FLAG -144 80 IN
FLAG 592 192 OUT
TEXT 472 392 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0f51ff9aa3e0_integratorul_cu_AO.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N003 N001 N002 N004 uo LT1001 ;pnba In+)In-)V+)V-)OUT
V1 N002 0 10
V2 N004 0 -10
C1 uo N001 10n
R1 NC_01 N001 100k
V3 ui 0 SINE(0 1 1k)
R2 N001 ui 10k
R3 N003 0 10k
.tran 0 30m 0 0.1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -48 208 -80
WIRE 336 48 128 48
WIRE 128 112 128 48
WIRE 288 112 128 112
WIRE 464 112 464 48
WIRE 464 112 352 112
WIRE 208 144 208 32
WIRE -144 160 -192 160
WIRE -48 160 -64 160
WIRE -16 160 -48 160
WIRE 128 160 128 112
WIRE 128 160 64 160
WIRE 176 160 128 160
WIRE 464 176 464 112
WIRE 464 176 240 176
WIRE 496 176 464 176
WIRE 512 176 496 176
WIRE 176 192 80 192
WIRE 80 256 80 192
WIRE 208 288 208 208
WIRE 80 400 80 336
WIRE 208 400 208 368
FLAG 208 -80 0
FLAG 208 400 0
FLAG -192 160 0
FLAG 80 400 0
FLAG -48 160 ui
FLAG 496 176 uo
SYMBOL OpAmps\\OP07 208 112 R0
SYMATTR InstName U1
SYMBOL voltage 208 48 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL voltage 208 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -10
SYMBOL cap 352 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 432 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage -48 160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1k)
SYMBOL res 80 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 64 240 R0
SYMATTR InstName R3
SYMATTR Value 10k
TEXT -208 424 Left 2 !.tran 0 30m 0 0.1m
* Z:\home\khalils\Downloads\files\data\raw_asc\14f8df4f25f3_nor_cos.asc
* Generated by LTspice 26.0.1 for Windows.
M4 vdd Vin_a N001 vdd PMOS l=180nm w=810nm
M2 Vout Vin_b 0 0 NMOS l=180nm w=270nm
M3 N001 Vin_b Vout N001 PMOS l=180nm w=810nm
M1 Vout Vin_a 0 0 NMOS l=180nm w=270nm
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 -208 352 -208
WIRE 448 -208 368 -208
WIRE 368 -160 368 -208
WIRE 368 -160 352 -160
WIRE 304 -128 144 -128
WIRE 352 -96 352 -112
WIRE 384 -96 352 -96
WIRE 384 -80 384 -96
WIRE 384 -80 352 -80
WIRE 384 -32 384 -80
WIRE 384 -32 352 -32
WIRE 304 0 96 0
WIRE 384 16 352 16
WIRE 384 64 384 16
WIRE 384 64 368 64
WIRE 576 64 384 64
WIRE 368 128 368 64
WIRE 368 128 240 128
WIRE 432 128 368 128
WIRE 240 176 240 128
WIRE 432 176 432 128
WIRE 256 224 240 224
WIRE 448 224 432 224
WIRE 144 256 144 -128
WIRE 192 256 144 256
WIRE 256 272 256 224
WIRE 256 272 240 272
WIRE 448 272 448 224
WIRE 448 272 432 272
WIRE 96 336 96 0
WIRE 384 336 384 256
WIRE 384 336 96 336
WIRE 256 400 256 272
WIRE 448 400 448 272
WIRE 448 400 256 400
IOPIN 144 -128 In
IOPIN 96 0 In
IOPIN 448 400 Out
IOPIN 448 -208 In
IOPIN 576 64 Out
SYMBOL pmos4 304 -208 R0
SYMATTR InstName M4
SYMATTR Value2 l=180nm w=810nm
SYMBOL nmos4 192 176 R0
SYMATTR InstName M1
SYMATTR Value2 l=180nm w=270nm
SYMBOL pmos4 304 -80 R0
SYMATTR InstName M3
SYMATTR Value2 l=180nm w=810nm
SYMBOL nmos4 384 176 R0
SYMATTR InstName M2
SYMATTR Value2 l=180nm w=270nm
FLAG 144 -128 Vin_a
FLAG 96 0 Vin_b
FLAG 448 400 gnd
FLAG 448 -208 vdd
FLAG 576 64 Vout
* Z:\tmp\asc_dec_bjh7r6w2\02a32e4b5381_Auto_Voltage_Range_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Input 0 SINE(0 12 0.5)
R3 N005 N006 100K
R5 Vdigital range_switch 100
R1 N004 Input 5K
R4 N006 0 10K
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1580 876
WIRE 816 -160 720 -160
WIRE 720 -144 720 -160
WIRE 592 -48 512 -48
WIRE 720 -32 720 -64
WIRE 720 -32 672 -32
WIRE 752 -32 720 -32
WIRE 32 80 -80 80
WIRE 144 80 112 80
WIRE 608 80 608 16
WIRE 32 144 0 144
WIRE 144 144 112 144
WIRE 512 144 512 -48
WIRE 512 144 400 144
WIRE 704 144 512 144
WIRE 0 192 0 144
WIRE 432 208 400 208
WIRE 0 224 0 192
WIRE 512 224 512 144
WIRE 608 240 560 240
WIRE 608 288 560 288
WIRE 432 320 432 208
WIRE -80 336 -80 80
WIRE 0 336 0 304
WIRE 0 336 -80 336
WIRE 512 336 512 304
WIRE 608 336 608 288
WIRE 0 368 0 336
WIRE 512 480 512 416
WIRE 704 480 512 480
WIRE 512 496 512 480
WIRE 352 592 352 528
WIRE 512 608 512 576
SYMBOL voltage 0 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 40 91 Left 2
SYMATTR Value SINE(0 12 0.5)
SYMATTR InstName V1
SYMBOL res 496 320 R0
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res 704 -160 R0
SYMATTR InstName R5
SYMATTR Value 100
SYMBOL res 128 128 R90
WINDOW 0 59 101 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL res 496 480 R0
SYMATTR InstName R4
SYMATTR Value 10K
FLAG 0 368 0
FLAG 0 192 Input
FLAG 144 208 V-
FLAG 432 320 0
FLAG 352 592 0
FLAG 352 448 Vdigital
FLAG 512 608 0
FLAG 592 -16 Vref
FLAG 624 16 V-
FLAG 624 -80 V+
FLAG 816 -160 Vdigital
FLAG 752 -32 range_switch
FLAG 608 336 0
FLAG 608 240 range_switch
* Z:\home\khalils\Downloads\files\data\raw_asc\10209fd48f64_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
RE e 0 {mc(1.3k,tol1)}
RB1 Vcc b {mc(100k,tol1)}
RC Vcc c {mc(4.7k,tol1)}
RL out 0 10k
C1 b in {mc(0.1uF,tol2)}
C2 out c {mc(0.1uF,tol2)}
Rs in s 1k
Vs s 0 0 AC 1
RB2 b 0 {mc(20k,tol1)}
C3 e 0 {mc(10uF,tol2)}
Q1 c b e 0 2N3904
V1 Vcc 0 12V
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.param tol1=0.05
.param tol2=0.1
.step param run 0 9 1
.ac dec 100 10 10Meg
.meas AC gain MAX mag(V(out)/V(s))
.meas AC Low3dB WHEN mag(V(out)/V(s))=gain/sqrt(2) Rise=1
.meas AC High3dB WHEN mag(V(out)/V(s))=gain/sqrt(2) Fall=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1412 680
WIRE 560 48 560 0
WIRE 880 48 880 0
WIRE 880 160 880 128
WIRE 944 160 880 160
WIRE 1088 160 944 160
WIRE 1248 160 1152 160
WIRE 1344 160 1248 160
WIRE 880 192 880 160
WIRE 1344 192 1344 160
WIRE 128 240 80 240
WIRE 176 240 128 240
WIRE 320 240 256 240
WIRE 368 240 320 240
WIRE 560 240 560 128
WIRE 560 240 432 240
WIRE 768 240 560 240
WIRE 816 240 768 240
WIRE 80 288 80 240
WIRE 1344 304 1344 272
WIRE 880 320 880 288
WIRE 944 320 880 320
WIRE 1136 320 944 320
WIRE 560 352 560 240
WIRE 880 352 880 320
WIRE 1136 368 1136 320
WIRE 560 480 560 432
WIRE 880 480 880 432
WIRE 1136 480 1136 432
SYMBOL res 544 336 R0
SYMATTR InstName RB2
SYMATTR Value {mc(20k,tol1)}
SYMBOL res 864 32 R0
SYMATTR InstName RC
SYMATTR Value {mc(4.7k,tol1)}
SYMBOL voltage 80 272 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName Vs
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMBOL res 864 336 R0
SYMATTR InstName RE
SYMATTR Value {mc(1.3k,tol1)}
SYMBOL npn 816 192 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL cap 1120 368 R0
SYMATTR InstName C3
SYMATTR Value {mc(10uF,tol2)}
SYMBOL res 544 32 R0
SYMATTR InstName RB1
SYMATTR Value {mc(100k,tol1)}
SYMBOL res 272 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rs
SYMATTR Value 1k
SYMBOL voltage 80 32 R0
SYMATTR InstName V1
SYMATTR Value 12V
SYMBOL cap 1152 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {mc(0.1uF,tol2)}
SYMBOL res 1328 176 R0
SYMATTR InstName RL
SYMATTR Value 10k
SYMBOL cap 432 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {mc(0.1uF,tol2)}
FLAG 80 128 0
FLAG 80 368 0
FLAG 80 48 Vcc
FLAG 128 240 s
FLAG 320 240 in
FLAG 560 480 0
FLAG 560 0 Vcc
FLAG 880 0 Vcc
FLAG 880 480 0
FLAG 1136 480 0
FLAG 1344 304 0
FLAG 944 160 c
FLAG 1248 160 out
FLAG 944 320 e
FLAG 768 240 b
TEXT 88 568 Left 2 !.param tol1=0.05
TEXT 88 608 Left 2 !.param tol2=0.1
TEXT 96 656 Left 2 !.step param run 0 9 1
TEXT 536 552 Left 2 !.ac dec 100 10 10Meg
TEXT 536 600 Left 2 !.meas AC gain MAX mag(V(out)/V(s))
TEXT 536 632 Left 2 !.meas AC Low3dB WHEN mag(V(out)/V(s))=gain/sqrt(2) Rise=1
TEXT 536 664 Left 2 !.meas AC High3dB WHEN mag(V(out)/V(s))=gain/sqrt(2) Fall=1
* Z:\home\khalils\Downloads\files\data\raw_asc\1eaca87bdaa6_circuito_base.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 0 cs
Cn N001 N004 C
RL N003 0 R
Q1 N002 N004 0 0 NPN
L1a VCC N002 Ls
K1 L1a L1b 1
CA N003 N002 C
L1b N001 VCC L
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 -80 32 -80
WIRE 192 -32 192 -80
WIRE 32 32 32 -80
WIRE 288 48 192 48
WIRE 192 144 192 128
WIRE 304 144 192 144
WIRE 352 144 304 144
WIRE 464 144 416 144
WIRE 192 160 192 144
WIRE 304 176 304 144
WIRE 464 176 464 144
WIRE 32 208 32 96
WIRE 32 208 -48 208
WIRE 128 208 32 208
WIRE 192 304 192 256
WIRE 304 304 304 240
WIRE 464 304 464 256
SYMBOL cap 416 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName CA
SYMBOL ind2 176 -48 R0
SYMATTR InstName L1b
SYMATTR Type ind
SYMBOL npn 128 160 R0
SYMATTR InstName Q1
SYMBOL ind2 176 32 R0
SYMATTR InstName L1a
SYMATTR Value Ls
SYMATTR Type ind
SYMBOL res 448 160 R0
SYMATTR InstName RL
SYMBOL cap 288 176 R0
SYMATTR InstName C1
SYMATTR Value cs
SYMBOL cap 16 32 R0
SYMATTR InstName Cn
FLAG 192 304 0
FLAG 304 304 0
FLAG 464 304 0
FLAG 288 48 VCC
TEXT 256 -48 Left 2 !K1 L1a L1b 1