Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2909-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2909-5.asy)
XU1 0 REF N003 N005 N006 N004 N002 _RST LTC2909-5 ;pnba GND)REF)ADJ2)ADJ1)SEL)TMR)Vcc)_RST
I1 REF 0 PWL(0 0 1 0 1.001 1m 2 1m 2.001 -1m 3 -1m 4 -5m 4.001 -5m 5 5m)
R4 N001 _RST 10K
V3 N006 0 PWL(0 0 5010m 0 5011m 0.9 10010m 0.9 10011m 5)
V1 N002 0 PWL (0,0 10m,12)
R1 N005 N001 57.6K
R2 N005 N003 1.1K
C1 0 N004 22n
R3 N003 0 10K
C2 0 _RST 1000p
V2 N001 0 PULSE(2.5 5 0 1000m 1000m 3000m 5000m)
.tran 15
.lib LTC2909-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1152 788
WIRE -176 80 -256 80
WIRE 272 80 -96 80
WIRE 304 80 272 80
WIRE 16 160 0 160
WIRE 304 160 304 80
WIRE 304 160 272 160
WIRE 320 160 304 160
WIRE 432 160 384 160
WIRE -720 224 -768 224
WIRE -32 224 -640 224
WIRE 16 224 -32 224
WIRE 496 224 272 224
WIRE 592 224 576 224
WIRE -192 288 -208 288
WIRE -96 288 -112 288
WIRE 16 288 -96 288
WIRE 304 288 272 288
WIRE 400 288 368 288
WIRE -96 304 -96 288
WIRE 16 352 0 352
WIRE 352 352 272 352
WIRE 352 368 352 352
WIRE -256 400 -256 80
WIRE -224 400 -256 400
WIRE -96 400 -96 384
WIRE -96 400 -144 400
WIRE 0 400 0 352
WIRE 0 400 -96 400
WIRE -256 464 -256 400
WIRE 352 464 352 448
WIRE -256 560 -256 544
SYMBOL voltage 352 352 R0
WINDOW 3 30 89 Left 2
SYMATTR Value PWL(0 0 5010m 0 5011m 0.9 10010m 0.9 10011m 5)
SYMATTR InstName V3
SYMBOL voltage -256 448 R0
SYMATTR InstName V2
SYMATTR Value PULSE(2.5 5 0 1000m 1000m 3000m 5000m)
SYMBOL res -128 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 57.6K
SYMBOL res -192 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL voltage 480 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value PWL (0,0 10m,12)
SYMBOL res -96 304 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res -112 400 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 1.1K
SYMBOL cap 384 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL cap 368 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL LTC2909-5 144 256 R0
SYMATTR InstName U1
SYMBOL current -640 224 R90
WINDOW 0 -32 40 VBottom 2
WINDOW 3 32 40 VTop 2
SYMATTR InstName I1
SYMATTR Value PWL(0 0 1 0 1.001 1m 2 1m 2.001 -1m 3 -1m 4 -5m 4.001 -5m 5 5m)
FLAG 0 160 0
FLAG 592 224 0
FLAG -256 560 0
FLAG -208 288 0
FLAG -768 224 0
FLAG 400 288 0
FLAG 432 160 0
FLAG 352 464 0
FLAG -32 224 REF
FLAG 272 80 _RST
TEXT 432 544 Left 2 !.tran 15
* Z:\home\khalils\Downloads\files\data\raw_asc\155405efd214_full_adder.asc
* Generated by LTspice 26.0.1 for Windows.
* This EXOR has special function.\nJust only one of all inputs is "H", then output is "H" otherwise "L".
A1 B0 0 0 0 A0 0 N004 0 AND
A2 B0 0 A0 0 0 N008 N006 0 XOR
A3 0 0 N004 0 N005 0 N003 0 AND
A4 N001 0 0 0 C0 0 N002 0 AND
A5 N002 0 0 0 N003 0 Y1 0 OR
A6 N008 0 0 0 C0 0 N009 0 AND
A7 N007 0 0 0 N009 0 Y0 0 OR
A8 N006 0 0 0 N005 0 N007 0 AND
A9 C0 0 0 0 0 N005 0 0 BUF
A10 B0 0 0 0 A0 0 N001 0 OR
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1000 936
WIRE 32 -304 -64 -304
WIRE 304 -288 96 -288
WIRE 400 -272 368 -272
WIRE 32 -240 -16 -240
WIRE 48 -224 48 -240
WIRE 304 -224 160 -224
WIRE 400 -224 400 -272
WIRE 432 -224 400 -224
WIRE 320 -208 320 -224
WIRE 528 -208 496 -208
WIRE 432 -160 400 -160
WIRE 448 -144 448 -160
WIRE -64 -128 -64 -304
WIRE 32 -128 -64 -128
WIRE 400 -128 400 -160
WIRE 400 -128 368 -128
WIRE 304 -112 96 -112
WIRE 304 -80 272 -80
WIRE -16 -64 -16 -240
WIRE 32 -64 -16 -64
WIRE 320 -64 320 -80
WIRE 48 -48 48 -64
WIRE -64 48 -64 -128
WIRE -64 48 -128 48
WIRE 16 48 -64 48
WIRE 304 64 80 64
WIRE -16 80 -16 -64
WIRE -16 80 -128 80
WIRE 16 80 -16 80
WIRE 416 80 368 80
WIRE 112 96 96 96
WIRE 48 128 48 112
WIRE 272 128 272 -80
WIRE 304 128 272 128
WIRE 416 128 416 80
WIRE 448 128 416 128
WIRE 320 144 320 128
WIRE 544 144 512 144
WIRE -16 192 -128 192
WIRE 160 192 160 -224
WIRE 160 192 -16 192
WIRE 192 192 160 192
WIRE 272 192 272 128
WIRE 272 192 256 192
WIRE 448 192 416 192
WIRE 464 208 464 192
WIRE 192 224 192 208
WIRE 112 256 112 96
WIRE 304 256 112 256
WIRE 416 272 416 192
WIRE 416 272 368 272
WIRE -16 320 -16 192
WIRE 304 320 -16 320
WIRE 320 336 320 320
IOPIN -128 80 In
IOPIN -128 48 In
IOPIN 544 144 Out
IOPIN 528 -208 Out
IOPIN -128 192 In
SYMBOL Digital\\or 464 -256 R0
SYMATTR InstName A5
SYMBOL Digital\\and 336 -320 R0
SYMATTR InstName A4
SYMBOL Digital\\or 480 96 R0
SYMATTR InstName A7
SYMBOL Digital\\and 64 -160 R0
SYMATTR InstName A1
SYMBOL Digital\\or 64 -336 R0
SYMATTR InstName A10
SYMBOL Digital\\and 336 32 R0
SYMATTR InstName A8
SYMBOL Digital\\inv 192 128 R0
SYMATTR InstName A9
SYMBOL Digital\\and 336 224 R0
SYMATTR InstName A6
SYMBOL Digital\\and 336 -176 R0
SYMATTR InstName A3
SYMBOL Digital\\xor 64 16 R0
SYMATTR InstName A2
FLAG 48 -48 0
FLAG 48 128 0
FLAG -128 80 A0
FLAG -128 48 B0
FLAG 544 144 Y0
FLAG 528 -208 Y1
FLAG -128 192 C0
FLAG 320 -64 0
FLAG 320 -208 0
FLAG 448 -144 0
FLAG 320 336 0
FLAG 464 208 0
FLAG 320 144 0
FLAG 192 224 0
FLAG 48 -224 0
TEXT -136 376 Left 2 ;This EXOR has special function.\nJust only one of all inputs is "H", then output is "H" otherwise "L".
* Z:\home\khalils\Downloads\files\data\raw_asc\60177209dd3f_STW9N150_test.asc
* Generated by LTspice 26.0.1 for Windows.
XM1 out N003 0 STW9N150 ;pnba D)G)S
R1 N001 out 10k
V1 N002 0 0
V2 N001 0 1000
R2 N002 N003 10
* Ctrl-right-mouse-click on the transistor\nto change the Prefix to X in the full dialog.
.dc V1 0 10 .01
.include STW9N150.lib
.options gmin=1e-10 abstol=1e-10 reltol=0.03
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -80 -16 -80
WIRE -16 -32 -16 -80
WIRE 208 -32 208 -80
WIRE -16 80 -16 48
WIRE 208 80 208 48
WIRE 304 80 208 80
WIRE 208 96 208 80
WIRE 48 176 -16 176
WIRE 160 176 128 176
WIRE -16 208 -16 176
WIRE -16 320 -16 288
WIRE 208 320 208 192
WIRE 208 320 -16 320
WIRE -16 352 -16 320
FLAG -16 352 0
FLAG -16 80 0
FLAG 304 80 out
SYMBOL nmos 160 96 R0
SYMATTR InstName M1
SYMATTR Value STW9N150
SYMATTR Prefix X
SYMBOL res 192 -48 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -16 192 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL voltage -16 -48 R0
SYMATTR InstName V2
SYMATTR Value 1000
SYMBOL res 32 192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R2
SYMATTR Value 10
TEXT -88 -144 Left 0 ;Ctrl-right-mouse-click on the transistor\nto change the Prefix to X in the full dialog.
TEXT -96 -240 Left 0 !.dc V1 0 10 .01
TEXT -96 -272 Left 0 !.include STW9N150.lib
TEXT -96 -208 Left 0 !.options gmin=1e-10 abstol=1e-10 reltol=0.03
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1965B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1965B.asy)
XU1 IN IN 0 OUT N001 LT1965 ;pnba _SHDN)IN)GND)OUT)ADJ
R1 OUT N001 5.11K
V1 IN 0 PWL(0 0 1 5)
Rload OUT 0 2.5
R2 N001 0 4.75K
C1 OUT 0 10
.tran 1 startup
.lib LT1965.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 128 -144 128
WIRE 64 128 48 128
WIRE 400 128 352 128
WIRE 544 128 400 128
WIRE 656 128 544 128
WIRE -144 144 -144 128
WIRE 400 144 400 128
WIRE 544 144 544 128
WIRE 656 144 656 128
WIRE -144 240 -144 224
WIRE 48 240 48 128
WIRE 64 240 48 240
WIRE 400 240 400 224
WIRE 400 240 352 240
WIRE 544 240 544 208
WIRE 656 240 656 224
WIRE 400 256 400 240
WIRE 208 320 208 304
WIRE 400 352 400 336
SYMBOL res 384 240 R0
SYMATTR InstName R2
SYMATTR Value 4.75K
SYMBOL res 384 128 R0
SYMATTR InstName R1
SYMATTR Value 5.11K
SYMBOL PowerProducts\\LT1965B 208 192 R0
SYMATTR InstName U1
SYMBOL voltage -144 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 5)
SYMBOL cap 528 144 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 640 128 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
FLAG 208 320 0
FLAG 400 352 0
FLAG -144 240 0
FLAG 544 240 0
FLAG 656 240 0
FLAG -144 128 IN
FLAG 656 128 OUT
TEXT 504 336 Left 2 !.tran 1 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD4058.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:\n \nVOrti: Analog output \nVOrto: "Digital" representation of the input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\AD4058.asy)
Rfilt2 vIN- input- 301
XU1 vIN+ vIN- 0 N001 CNV N002 VOrti VOrto AD4058 ;pnba IN+)IN-)GND)REF)CNV)_RST)VOrti)VOrto
V3 CNV 0 PULSE(0 1.8 1u 10n 10n 20n 2u)
Cfilt1 vIN+ 0 1n
VinP1 input+ 0 SINE(1.25 1.25 2k)
Cfilt2 0 vIN- 1n
V1 N001 0 2.5
V2 N002 0 PWL(30n 0 40n 1.8)
VinN1 input- 0 SINE(1.25 1.25 2k 0 0 180)
Rfilt1 input+ vIN+ 301
.tran 0.5m
.lib AD4058.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1072 680
WIRE 256 -80 256 -112
WIRE -384 48 -560 48
WIRE -288 48 -384 48
WIRE -176 48 -208 48
WIRE -48 48 -176 48
WIRE 256 48 256 0
WIRE -560 80 -560 48
WIRE -176 96 -176 48
WIRE 448 96 384 96
WIRE 640 96 448 96
WIRE 640 128 640 96
WIRE -48 144 -48 48
WIRE 0 144 -48 144
WIRE 64 144 0 144
WIRE 432 144 384 144
WIRE -560 192 -560 160
WIRE -560 192 -608 192
WIRE 432 192 384 192
WIRE -608 208 -608 192
WIRE -560 224 -560 192
WIRE -176 224 -176 160
WIRE -128 224 -176 224
WIRE -128 240 -128 224
WIRE 0 240 -48 240
WIRE 64 240 0 240
WIRE 640 240 640 208
WIRE -176 288 -176 224
WIRE 448 288 384 288
WIRE 448 336 448 288
WIRE 256 368 256 336
WIRE -560 384 -560 304
WIRE -384 384 -560 384
WIRE -288 384 -384 384
WIRE -176 384 -176 352
WIRE -176 384 -208 384
WIRE -48 384 -48 240
WIRE -48 384 -176 384
WIRE 448 448 448 416
SYMBOL cap -192 288 R0
SYMATTR InstName Cfilt2
SYMATTR Value 1n
SYMBOL res -304 32 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rfilt1
SYMATTR Value 301
SYMBOL voltage 256 16 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL cap -192 96 R0
SYMATTR InstName Cfilt1
SYMATTR Value 1n
SYMBOL voltage 640 112 R0
WINDOW 0 28 -5 Top 2
WINDOW 3 184 118 Bottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 1.8 1u 10n 10n 20n 2u)
SYMBOL voltage -560 320 M180
WINDOW 0 84 95 Right 2
WINDOW 3 291 13 Right 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VinN1
SYMATTR Value SINE(1.25 1.25 2k 0 0 180)
SYMBOL res -192 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rfilt2
SYMATTR Value 301
SYMBOL AD4058 288 192 R0
SYMATTR InstName U1
SYMBOL voltage -560 64 M0
WINDOW 0 -29 15 Right 2
WINDOW 3 -20 90 Right 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VinP1
SYMATTR Value SINE(1.25 1.25 2k)
SYMBOL voltage 448 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 16 105 Left 2
SYMATTR Value PWL(30n 0 40n 1.8)
SYMATTR InstName V2
FLAG 256 368 0
FLAG 448 448 0
FLAG 640 240 0
FLAG 256 -112 0
FLAG 0 144 vIN+
FLAG 0 240 vIN-
FLAG 432 192 VOrti
FLAG -384 48 input+
FLAG -384 384 input-
FLAG -128 240 0
FLAG -608 208 0
FLAG 432 144 VOrto
FLAG 448 96 CNV
TEXT 144 456 Left 2 !.tran 0.5m
TEXT -560 -128 Left 2 ;Notes:\n \nVOrti: Analog output \nVOrto: "Digital" representation of the input
* Z:\home\khalils\Downloads\files\data\raw_asc\b94f65c90bb8_ID_vs_UGS-8.asc
* Generated by LTspice 26.0.1 for Windows.
* ID_vs_UGS-8
* Enhancement mode N-channel MOSFET
M1 UDS UGS 0 0 NMOSENH
V1 UDS 0 10V
V2 UGS 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 0V 2V
.lib mosfet.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1292 680
WIRE -624 -176 -720 -176
WIRE -560 -176 -624 -176
WIRE -720 -128 -720 -176
WIRE -560 -80 -560 -176
WIRE -880 -48 -896 -48
WIRE -768 -48 -880 -48
WIRE -896 -32 -896 -48
WIRE -896 64 -896 48
WIRE -720 64 -720 -32
WIRE -560 64 -560 0
SYMBOL voltage -896 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 53 Left 2
WINDOW 3 -97 181 Left 2
WINDOW 0 35 44 Left 2
SYMATTR Value ""
SYMATTR InstName V2
SYMBOL nmos -768 -128 R0
SYMATTR InstName M1
SYMATTR Value NMOSENH
SYMBOL voltage -560 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 36 82 Left 2
SYMATTR InstName V1
SYMATTR Value 10V
FLAG -560 64 0
FLAG -896 64 0
FLAG -720 64 0
FLAG -880 -48 UGS
FLAG -624 -176 UDS
TEXT -904 96 Left 2 !.dc V2 0V 2V
TEXT -896 -168 Left 2 ;ID_vs_UGS-8
TEXT -904 112 Left 2 !.lib mosfet.lib
TEXT -920 -208 Left 2 ;Enhancement mode N-channel MOSFET
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6656-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6656-5.asy)
V1 N001 0 PWL(0 0 1m 0 +100n 5.5)
C1 N002 0 1
XU1 0 N001 N002 LT6656-5 ;pnba GND)IN)OUT
.tran 50m
.lib LT6656.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 836
WIRE 96 160 -176 160
WIRE 480 160 320 160
WIRE -176 176 -176 160
WIRE 480 176 480 160
WIRE 208 256 208 224
WIRE 480 256 480 240
WIRE -176 272 -176 256
SYMBOL LT6656-5 208 160 R0
SYMATTR InstName U1
SYMBOL voltage -176 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1m 0 +100n 5.5)
SYMBOL cap 464 176 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 480 256 0
FLAG 208 256 0
FLAG -176 272 0
TEXT 392 328 Left 2 !.tran 50m
* Z:\home\khalils\Downloads\files\data\raw_asc\25ddda09b1f6_LTC6269.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 2.5
V2 -V 0 -2.5
R3 Out N001 20K
I1 +V N001 0 AC 1
Cparasitic Out N001 150f
C3 +V N001 700f
XU1 NC_01 NC_02 N001 Out NC_03 NC_04 Out NC_05 NC_06 NC_07 LTC6269 ;pnba +INA)-INA)OUTA)V+)V-)+INB)-INB)OUTB)_SDA)_SDB
.ac oct 10 10K 1G
* PhotoDiode
* FCI-125G-006
* 20K Ohm Gain Trans-Impedance Amplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6269.asy)
.lib LTC6269.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4472 1028
WIRE -2784 -656 -2784 -720
WIRE -2784 -656 -2912 -656
WIRE -2784 -624 -2784 -656
WIRE -2912 -608 -2912 -656
WIRE -2576 -608 -2640 -608
WIRE -2448 -608 -2512 -608
WIRE -2912 -512 -2912 -544
WIRE -2784 -512 -2784 -544
WIRE -2784 -512 -2912 -512
WIRE -2640 -512 -2640 -608
WIRE -2640 -512 -2784 -512
WIRE -2576 -512 -2640 -512
WIRE -2448 -512 -2448 -608
WIRE -2448 -512 -2496 -512
WIRE -2960 -352 -2960 -368
WIRE -2832 -352 -2832 -368
WIRE -2640 -352 -2640 -512
WIRE -2624 -352 -2640 -352
WIRE -2448 -320 -2448 -512
WIRE -2448 -320 -2480 -320
WIRE -2416 -320 -2448 -320
WIRE -2624 -288 -2656 -288
WIRE -2960 -256 -2960 -272
WIRE -2832 -256 -2832 -272
FLAG -2960 -256 0
FLAG -2832 -256 0
FLAG -2960 -368 +V
FLAG -2832 -368 -V
FLAG -2656 -288 0
FLAG -2416 -320 Out
FLAG -2784 -720 +V
FLAG -2592 -400 +V
FLAG -2544 -240 +V
FLAG -2592 -240 -V
SYMBOL voltage -2960 -368 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage -2832 -368 R0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res -2480 -528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL current -2784 -624 R0
WINDOW 3 38 44 Left 2
WINDOW 123 16 80 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMBOL cap -2512 -624 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName Cparasitic
SYMATTR Value 150f
SYMBOL cap -2928 -608 R0
SYMATTR InstName C3
SYMATTR Value 700f
SYMBOL opamps\\LTC6269 -2592 -320 R0
SYMATTR InstName U1
TEXT -2432 -240 Left 2 !.ac oct 10 10K 1G
TEXT -2872 -680 Center 2 ;PhotoDiode
TEXT -2848 -488 Center 2 ;FCI-125G-006
TEXT -2696 -800 Bottom 2 ;20K Ohm Gain Trans-Impedance Amplifier
RECTANGLE Normal -2696 -464 -2992 -704 2
* Z:\tmp\asc_dec_bjh7r6w2\1045ca00a385_1037_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V2 -V 0 -15
V1 +V 0 15
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE -272 176 -272 160
WIRE -144 176 -144 160
WIRE 160 256 0 256
WIRE -272 272 -272 256
WIRE -144 272 -144 256
WIRE 0 272 0 256
WIRE 0 368 0 352
SYMBOL voltage -272 160 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -144 160 R0
SYMATTR InstName V1
SYMATTR Value 15
FLAG -144 272 0
FLAG -144 160 +V
FLAG -272 272 0
FLAG -272 160 -V
FLAG 16 96 0
FLAG 0 256 IN
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8023.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8023.asy)
XU1 IN IN N002 N003 0 N004 N001 N001 OUT LTM8023 ;pnba Vin)Run/SS)Rt)ADJ)GND)Pgood)BIAS)AUX)Vout
C1 OUT 0 22
R2 N003 0 154K
R1 N002 0 49.9K
R3 OUT N004 100K
Rload OUT 0 1.65
V1 IN 0 20
.tran 250u startup
.lib LTM8023.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 96 -160 96
WIRE 96 96 80 96
WIRE 448 96 384 96
WIRE 544 96 448 96
WIRE 640 96 544 96
WIRE -160 112 -160 96
WIRE 544 112 544 96
WIRE 640 112 640 96
WIRE 80 160 80 96
WIRE 96 160 80 160
WIRE 400 160 384 160
WIRE 448 176 448 96
WIRE -160 208 -160 192
WIRE 544 208 544 176
WIRE 640 208 640 192
WIRE -64 224 -80 224
WIRE 96 224 16 224
WIRE 400 224 400 160
WIRE 400 224 384 224
WIRE 0 288 -80 288
WIRE 96 288 80 288
WIRE 448 288 448 256
WIRE 448 288 384 288
WIRE 240 336 240 320
SYMBOL res 32 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 49.9K
SYMBOL PowerProducts\\LTM8023 240 192 R0
SYMATTR InstName U1
SYMBOL res 624 96 R0
SYMATTR InstName Rload
SYMATTR Value 1.65
SYMBOL cap 528 112 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 432 160 R0
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res 96 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 154K
SYMBOL voltage -160 96 R0
SYMATTR InstName V1
SYMATTR Value 20
FLAG 240 336 0
FLAG -160 208 0
FLAG -80 224 0
FLAG -80 288 0
FLAG 640 208 0
FLAG 544 208 0
FLAG -160 96 IN
FLAG 640 96 OUT
TEXT 424 320 Left 2 !.tran 250u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\070f2c501526_electronics_lc_tank_2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 V1 0 PULSE(0 3.3 0 1n 1n 0.1m 0.1m 1)
L1 V1 V2 0.0001
C1 V2 0 0.0001
.tran 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 48 80 0
WIRE 80 48 32 48
WIRE 128 48 80 48
WIRE 256 48 256 0
WIRE 256 48 208 48
WIRE 288 48 256 48
WIRE 32 112 32 48
WIRE 288 112 288 48
WIRE 32 240 32 192
WIRE 160 240 32 240
WIRE 288 240 288 176
WIRE 288 240 160 240
WIRE 160 272 160 240
SYMBOL voltage 32 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 1n 1n 0.1m 0.1m 1)
SYMBOL cap 272 112 R0
SYMATTR InstName C1
SYMATTR Value 0.0001
SYMBOL ind 112 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 0.0001
FLAG 80 0 V1
FLAG 256 0 V2
FLAG 160 272 0
TEXT 0 296 Left 2 !.tran 0.2
* Z:\home\khalils\Downloads\files\data\raw_asc\07f06283736e_StageB_LowPassSallenKey_ADA4177-2.asc
* Generated by LTspice 26.0.1 for Windows.
* This subcircuit is not simulatable. \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4177-2.asy)
R1 N001 P002 68
C3 N002 REF 22n
XU1 N002 OUT V+ V- OUT ADA4177 ;pnba In+)In-)V+)V-)OUT
C2 N002 REF 220n
C1 OUT N001 330n
R4 N002 P001 320
R3 P002 IN 1.8k
R2 P001 N001 3.9k
.lib ADA4177.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 4112 860
WIRE 512 -128 240 -128
WIRE 320 112 320 -32
WIRE 240 128 240 -128
WIRE 288 128 288 112
WIRE 288 128 240 128
WIRE 304 128 288 128
WIRE 512 144 512 -128
WIRE 512 144 352 144
WIRE -208 160 -256 160
WIRE -16 160 -48 160
WIRE 16 160 -16 160
WIRE 208 160 176 160
WIRE 256 160 208 160
WIRE 288 160 256 160
WIRE 304 160 288 160
WIRE 512 160 512 144
WIRE 576 160 512 160
WIRE 608 160 576 160
WIRE 288 176 288 160
WIRE 208 192 208 160
WIRE 256 192 256 160
WIRE 256 256 208 256
WIRE 256 288 256 256
WIRE 320 336 320 176
WIRE -16 400 -16 160
WIRE 176 400 -16 400
WIRE 512 400 512 160
WIRE 512 400 240 400
SYMBOL res -112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1.8k
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 3.9k
SYMBOL cap 240 192 R0
SYMATTR InstName C2
SYMATTR Value 220n
SYMBOL Opamps\\ADA4177-2 320 144 R0
SYMATTR InstName U1
SYMBOL res -32 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 68
SYMBOL cap 192 192 R0
SYMATTR InstName C3
SYMATTR Value 22n
SYMBOL res 192 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 320
SYMBOL cap 240 384 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 330n
FLAG 320 -32 V+
FLAG 320 336 V-
FLAG 576 160 OUT
FLAG -256 160 IN
FLAG 256 288 REF
TEXT -176 504 Left 4 ;This subcircuit is not simulatable.  \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Z:\home\khalils\Downloads\files\data\raw_asc\298886ce3f08_ADG7421F.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nThis part is modeled at 3 V supply operation\nCrosstalk is not included
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG7421F.asy)
V3 N004 0 PULSE(0 1.5 0 10u 10u 10m 20m)
V1 N001 0 2.5
XU1 N001 N004 N007 0 N005 N002 N003 ADG7421F ;pnba Vdd)IN1)Vss)GND)FF)S1)D1
C1 N005 0 10p
V2 N007 0 -2.5
V4 N006 0 2.5
R3 N003 0 301
R1 N005 N006 1k
V5 N002 0 1.5
C2 N003 0 36p
.tran 120m
.lib ADG7421F.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1160 936
WIRE 272 -32 -224 -32
WIRE -224 -16 -224 -32
WIRE 272 32 272 -32
WIRE -224 80 -224 64
WIRE 112 112 -224 112
WIRE 672 112 432 112
WIRE 768 112 672 112
WIRE -224 128 -224 112
WIRE 672 128 672 112
WIRE 768 128 768 112
WIRE -224 224 -224 208
WIRE 672 224 672 208
WIRE 768 224 768 192
WIRE 112 240 -32 240
WIRE 480 240 432 240
WIRE 512 240 480 240
WIRE 624 240 592 240
WIRE 480 272 480 240
WIRE 624 272 624 240
WIRE -32 336 -32 240
WIRE -32 336 -224 336
WIRE 480 352 480 336
WIRE -224 368 -224 336
WIRE 624 368 624 352
WIRE 320 432 320 416
WIRE 224 448 224 416
WIRE -224 464 -224 448
WIRE 224 544 224 528
SYMBOL cap 464 272 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage -224 352 M0
WINDOW 3 -416 90 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -58 27 Left 2
SYMATTR Value PULSE(0 1.5 0 10u 10u 10m 20m)
SYMATTR InstName V3
SYMBOL voltage -224 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 1.5
SYMBOL res 496 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL cap 752 128 R0
SYMATTR InstName C2
SYMATTR Value 36p
SYMBOL ADG7421F 272 224 R0
SYMATTR InstName U1
SYMBOL voltage 624 256 R0
WINDOW 3 26 94 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 2.5
SYMATTR InstName V4
SYMBOL voltage -224 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 656 112 R0
SYMATTR InstName R3
SYMATTR Value 301
SYMBOL voltage 224 432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -2.5
FLAG 224 544 0
FLAG -224 80 0
FLAG -224 464 0
FLAG 320 432 0
FLAG 480 352 0
FLAG 624 368 0
FLAG -224 224 0
FLAG 768 224 0
FLAG 672 224 0
TEXT -232 536 Left 2 !.tran 120m
TEXT 424 496 Left 2 ;Note:\nThis part is modeled at 3 V supply operation\nCrosstalk is not included