Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\430af1d5518a_Draft1_copy.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac oct 10K 100K 500000K
R1 Limiter_Output RX_SIG 50
L2 Vout 0 497.39nH
VAntenna RX_SIG 0 SINE(0 5 10000000) AC 0
D2 Limiter_Output 0 1N4148
C2 Vout 0 0.3979nC
L3 Limiter_Output 0 497.39nH
C1 Limiter_Output 0 0.3979nC
C3 Vout N001 0.0994787nC
D1 0 Limiter_Output 1N4148
RL1 Vout 0 50
L1 N001 Limiter_Output 1989.55nH
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5us
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1440 680
WIRE 80 240 -16 240
WIRE 256 240 160 240
WIRE 864 240 256 240
WIRE 912 240 864 240
WIRE 1040 240 992 240
WIRE 1152 240 1104 240
WIRE 1312 240 1152 240
WIRE -16 288 -16 240
WIRE 256 288 256 240
WIRE 256 288 208 288
WIRE 288 288 256 288
WIRE 864 288 864 240
WIRE 864 288 800 288
WIRE 1152 288 1152 240
WIRE 1152 288 1104 288
WIRE 1312 288 1312 240
WIRE 864 304 864 288
WIRE 1152 304 1152 288
WIRE 256 352 208 352
WIRE 288 352 256 352
WIRE 864 368 800 368
WIRE 1152 368 1104 368
WIRE -16 400 -16 368
WIRE 128 400 -16 400
WIRE 256 400 256 352
WIRE 256 400 128 400
WIRE 864 416 864 368
WIRE 912 416 864 416
WIRE 1152 416 1152 368
WIRE 1152 416 912 416
WIRE 1312 416 1312 368
WIRE 1312 416 1152 416
SYMBOL Cap 1104 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 0.0994787nC
SYMBOL Res 176 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL Cap 848 304 R0
SYMATTR InstName C1
SYMATTR Value 0.3979nC
SYMBOL Cap 1136 304 R0
SYMATTR InstName C2
SYMATTR Value 0.3979nC
SYMBOL Res 1296 272 R0
SYMATTR InstName RL1
SYMATTR Value 50
SYMBOL diode 272 288 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL diode 224 352 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL Ind 784 272 R0
WINDOW 0 -43 38 Left 2
WINDOW 3 -55 81 Left 2
SYMATTR InstName L3
SYMATTR Value 497.39nH
SYMBOL ind 1088 272 R0
WINDOW 0 -31 35 Left 2
WINDOW 3 -51 86 Left 2
SYMATTR InstName L2
SYMATTR Value 497.39nH
SYMBOL Ind 1008 224 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value 1989.55nH
SYMBOL Voltage -16 272 R0
WINDOW 123 24 118 Left 2
SYMATTR Value2 AC 0
SYMATTR InstName Antenna
SYMATTR Value SINE(0 5 10000000)
FLAG 128 400 0
FLAG 256 240 Limiter_Output
FLAG -16 240 RX_SIG
FLAG 912 416 0
FLAG 1312 240 Vout
TEXT 368 464 Left 2 ;.ac oct 10K 100K 500000K
TEXT 368 536 Left 2 !.tran 5us
* Z:\home\khalils\Downloads\files\data\raw_asc\326e6e66796c_4-NAND-111.asc
* Generated by LTspice 26.0.1 for Windows.
M9 OUT IN N006 N006 PMOS
M1 N006 N005 N004 N004 PMOS
M3 N004 N003 N002 N002 PMOS
M5 N002 N001 V+ V+ PMOS
M7 OUT N003 0 0 NMOS
M10 OUT IN 0 0 NMOS
M11 OUT N005 0 0 NMOS
M12 OUT N001 0 0 NMOS
M2 N001 SEL2 V+ V+ PMOS
M4 N001 SEL2 0 0 NMOS
M6 N003 SEL1 V+ V+ PMOS
M8 N003 SEL1 0 0 NMOS
M13 N005 SEL0 V+ V+ PMOS
M14 N005 SEL0 0 0 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1660 728
WIRE 464 -608 192 -608
WIRE 608 -608 464 -608
WIRE 464 -576 464 -608
WIRE 464 -576 384 -576
WIRE 336 -560 320 -560
WIRE 608 -528 608 -608
WIRE 560 -512 544 -512
WIRE 320 -480 320 -560
WIRE 320 -480 192 -480
WIRE 544 -480 544 -512
WIRE 544 -480 384 -480
WIRE 320 -400 320 -480
WIRE 336 -400 320 -400
WIRE 480 -384 384 -384
WIRE 608 -368 608 -432
WIRE 752 -368 608 -368
WIRE 464 -352 464 -576
WIRE 464 -352 384 -352
WIRE 336 -336 320 -336
WIRE 752 -304 752 -368
WIRE 704 -288 688 -288
WIRE 320 -256 320 -336
WIRE 320 -256 192 -256
WIRE 688 -256 688 -288
WIRE 688 -256 384 -256
WIRE 320 -176 320 -256
WIRE 336 -176 320 -176
WIRE 480 -160 480 -384
WIRE 480 -160 384 -160
WIRE 752 -144 752 -208
WIRE 896 -144 752 -144
WIRE 464 -128 464 -352
WIRE 464 -128 384 -128
WIRE 336 -112 320 -112
WIRE 896 -80 896 -144
WIRE 848 -64 832 -64
WIRE 320 -32 320 -112
WIRE 320 -32 192 -32
WIRE 832 -32 832 -64
WIRE 832 -32 384 -32
WIRE 320 48 320 -32
WIRE 336 48 320 48
WIRE 896 48 896 16
WIRE 1040 48 896 48
WIRE 480 64 480 -160
WIRE 480 64 384 64
WIRE 1040 80 1040 48
WIRE 992 96 976 96
WIRE 976 128 976 96
WIRE 976 128 192 128
WIRE 752 192 608 192
WIRE 896 192 752 192
WIRE 1040 192 1040 176
WIRE 1040 192 896 192
WIRE 1184 192 1040 192
WIRE 608 208 608 192
WIRE 752 208 752 192
WIRE 896 208 896 192
WIRE 1040 208 1040 192
WIRE 544 288 544 -480
WIRE 560 288 544 288
WIRE 688 288 688 -256
WIRE 704 288 688 288
WIRE 832 288 832 -32
WIRE 848 288 832 288
WIRE 976 288 976 128
WIRE 992 288 976 288
WIRE 480 320 480 64
WIRE 608 320 608 304
WIRE 608 320 480 320
WIRE 752 320 752 304
WIRE 752 320 608 320
WIRE 896 320 896 304
WIRE 896 320 752 320
WIRE 1040 320 1040 304
WIRE 1040 320 896 320
WIRE 896 352 896 320
FLAG 896 352 0
FLAG 192 128 IN
IOPIN 192 128 In
FLAG 1184 192 OUT
IOPIN 1184 192 Out
FLAG 192 -32 SEL0
IOPIN 192 -32 In
FLAG 192 -256 SEL1
IOPIN 192 -256 In
FLAG 192 -480 SEL2
IOPIN 192 -480 In
FLAG 192 -608 V+
IOPIN 192 -608 In
SYMBOL pmos 992 176 M180
SYMATTR InstName M9
SYMBOL pmos 848 16 M180
SYMATTR InstName M1
SYMBOL pmos 704 -208 M180
SYMATTR InstName M3
SYMBOL pmos 560 -432 M180
SYMATTR InstName M5
SYMBOL nmos 704 208 R0
SYMATTR InstName M7
SYMBOL nmos 992 208 R0
SYMATTR InstName M10
SYMBOL nmos 848 208 R0
SYMATTR InstName M11
SYMBOL nmos 560 208 R0
SYMATTR InstName M12
SYMBOL pmos 336 -480 M180
SYMATTR InstName M2
SYMBOL nmos 336 -480 R0
SYMATTR InstName M4
SYMBOL pmos 336 -256 M180
SYMATTR InstName M6
SYMBOL nmos 336 -256 R0
SYMATTR InstName M8
SYMBOL pmos 336 -32 M180
SYMATTR InstName M13
SYMBOL nmos 336 -32 R0
SYMATTR InstName M14
* Z:\tmp\asc_dec_bjh7r6w2\1661bb8a52ac_nonlinear_capacitance_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V6 Cpoly 0 PWL(0 -0.1 50.1u 50)
Cpoly Cpoly 0 Q=IF(x>0, 125p*(x-0.016*x*x), x*125p)
V4 N001 0 PWL(0 -0.1 50.1u 50)
Csens Csens 0 Q=IF(x>0, 125p*25/24*ln(1+x*24/25), x*125p)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1668 1860
WIRE 512 752 512 704
WIRE 512 624 512 576
WIRE 512 576 784 576
WIRE -464 960 -192 960
WIRE -192 960 -192 1024
WIRE -192 1088 -192 1136
WIRE 512 1136 512 1088
WIRE 512 1008 512 960
WIRE 512 960 784 960
WIRE 784 960 784 1024
WIRE 784 1088 784 1136
SYMBOL voltage 512 992 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value PWL(0 -0.1 50.1u 50)
SYMBOL cap 768 1024 R0
SYMATTR InstName Cpoly
SYMATTR Value Q=IF(x>0, 125p*(x-0.016*x*x), x*125p)
SYMBOL voltage 512 608 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PWL(0 -0.1 50.1u 50)
SYMBOL cap -208 1024 R0
SYMATTR InstName Csens
SYMATTR Value Q=IF(x>0, 125p*25/24*ln(1+x*24/25), x*125p)
FLAG 512 752 0
FLAG -192 1136 0
FLAG -192 960 Csens
FLAG 512 1136 0
FLAG 784 1136 0
FLAG 784 960 Cpoly
* Z:\home\khalils\Downloads\files\data\raw_asc\244c80eba037_hw1p1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 vr1 vl1 30
L1 vl1 0 3e-3
V1 vr1 0 SINE(0 10 1e3)
.tran 0 5m 0 0.1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 32 112 32
WIRE 432 32 368 32
WIRE 368 48 368 32
WIRE 112 96 112 32
WIRE 368 144 368 128
WIRE 432 144 368 144
WIRE 368 160 368 144
WIRE 112 256 112 176
WIRE 368 256 368 240
WIRE 368 256 112 256
WIRE 112 272 112 256
IOPIN 432 32 Out
IOPIN 432 144 Out
SYMBOL res 352 32 R0
SYMATTR InstName R1
SYMATTR Value 30
SYMBOL ind 352 144 R0
SYMATTR InstName L1
SYMATTR Value 3e-3
SYMBOL voltage 112 80 R0
WINDOW 0 -46 10 Left 2
WINDOW 3 -218 106 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10 1e3)
FLAG 112 272 0
FLAG 432 32 vr1
FLAG 432 144 vl1
TEXT 160 296 Left 2 !.tran 0 5m 0 0.1m
* Z:\home\khalils\Downloads\files\data\raw_asc\500c72f8d976_DR03op.asc
* Generated by LTspice 26.0.1 for Windows.
V1 V1 0 {Vcc}
D1 V1 R1 1N4007
R1 R1 0 {R1}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.op
.param Vcc=25 R1=1.2k
.model 1N4007 D(IS=7.02767n RS=0.0341512 N=1.80803 EG=1.05743 XTI=5
+ BV=1000 IBV=5e-08 CJO=1e-11 VJ=0.7 M=0.5 FC=0.5 TT=1e-07)
.meas Vd param V(V1)-V(R1)
.meas Pd param Vd*I(D1)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1372 680
WIRE 128 0 48 0
WIRE 256 0 192 0
WIRE 304 0 256 0
WIRE 48 48 48 0
WIRE 304 48 304 0
WIRE 48 160 48 128
WIRE 304 160 304 128
WIRE 304 160 48 160
WIRE 48 192 48 160
FLAG 48 192 0
FLAG 256 0 R1
FLAG 48 0 V1
SYMBOL voltage 48 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vcc}
SYMBOL diode 128 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4007
SYMBOL res 288 32 R0
SYMATTR InstName R1
SYMATTR Value {R1}
TEXT 88 176 Left 2 !.op
TEXT 88 200 Left 2 !.param Vcc=25 R1=1.2k
TEXT 48 240 Left 1 !.model 1N4007 D(IS=7.02767n RS=0.0341512 N=1.80803 EG=1.05743 XTI=5 \n+ BV=1000 IBV=5e-08 CJO=1e-11 VJ=0.7 M=0.5 FC=0.5 TT=1e-07)
TEXT 408 16 Left 2 !.meas Vd param V(V1)-V(R1)
TEXT 408 56 Left 2 !.meas Pd param Vd*I(D1)
* Z:\home\khalils\Downloads\files\data\raw_asc\4078921f874d_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N002 N004 N005 0 NPN
Q2 N007 N009 N010 0 NPN
Q3 N009 N004 N008 0 PNP
Q4 N007 N002 N003 0 PNP
C1 N007 0 10
R1 N010 0 1k
R2 N009 0 10k
R3 N001 N003 1k
R4 N001 N002 10k
V1 N006 0 PULSE(0 12 0 1u 1u 25m 50m 100)
R5 N004 N006 1k
V2 N005 0 9
V3 N008 0 3
V4 N001 0 12
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 944 680
WIRE 400 16 160 16
WIRE 640 16 400 16
WIRE 400 32 400 16
WIRE 640 32 640 16
WIRE 160 48 160 16
WIRE 160 144 160 128
WIRE 400 144 400 112
WIRE 528 144 400 144
WIRE 640 144 640 112
WIRE 336 192 304 192
WIRE 528 192 528 144
WIRE 576 192 528 192
WIRE 400 256 400 240
WIRE 432 256 400 256
WIRE 528 256 512 256
WIRE 160 320 80 320
WIRE 304 320 304 192
WIRE 304 320 240 320
WIRE 528 320 528 256
WIRE 560 320 528 320
WIRE 640 320 640 240
WIRE 784 320 640 320
WIRE 80 352 80 320
WIRE 560 352 560 320
WIRE 784 352 784 320
WIRE 432 400 400 400
WIRE 528 400 528 320
WIRE 528 400 512 400
WIRE 400 416 400 400
WIRE 640 416 640 320
WIRE 80 464 80 432
WIRE 304 464 304 320
WIRE 336 464 304 464
WIRE 576 464 528 464
WIRE 784 464 784 416
WIRE 528 512 528 464
WIRE 528 512 400 512
WIRE 400 544 400 512
WIRE 640 544 640 512
WIRE 400 640 400 624
WIRE 640 640 640 624
FLAG 400 640 0
FLAG 784 464 0
FLAG 640 640 0
FLAG 80 464 0
FLAG 560 352 0
FLAG 160 144 0
SYMBOL npn 336 144 R0
SYMATTR InstName Q1
SYMBOL npn 576 416 R0
SYMATTR InstName Q2
SYMBOL pnp 336 512 M180
SYMATTR InstName Q3
SYMBOL pnp 576 240 M180
SYMATTR InstName Q4
SYMBOL cap 768 352 R0
SYMATTR InstName C1
SYMATTR Value 10u
SYMBOL Res 624 528 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL Res 384 528 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL Res 624 16 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL Res 384 16 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL Misc/signal 80 336 R0
WINDOW 3 -201 -114 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 12 0 1u 1u 25m 50m 100)
SYMBOL res 256 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL voltage 416 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value 9
SYMBOL voltage 416 400 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V3
SYMATTR Value 3
SYMBOL voltage 160 32 R0
SYMATTR InstName V4
SYMATTR Value 12
TEXT 848 8 Left 2 !.tran 0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\a418f9978849_Assignment_3a__iii_.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Half Wave Rectifier Circuit (with 1microF Capacitor) (Ideal)
C1 N002 0 0.000001
R1 N002 0 1000
V1 N001 0 SINE(0 311 50) Rser=0.001
D1 N001 N002 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 64 80 64
WIRE 352 64 256 64
WIRE 464 64 352 64
WIRE 80 112 80 64
WIRE 352 112 352 64
WIRE 464 128 464 64
WIRE 80 240 80 192
WIRE 176 240 80 240
WIRE 352 240 352 192
WIRE 352 240 176 240
WIRE 464 240 464 192
WIRE 464 240 352 240
WIRE 176 272 176 240
SYMBOL voltage 80 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.001
SYMATTR InstName V1
SYMATTR Value SINE(0 311 50)
SYMBOL res 336 96 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL cap 448 128 R0
SYMATTR InstName C1
SYMATTR Value 0.000001
SYMBOL diode 192 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG 176 272 0
TEXT 16 272 Left 2 !.tran 0.05
TEXT 264 8 Center 2 ;Positive Half Wave Rectifier Circuit (with 1microF Capacitor) (Ideal)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4625.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 12
C1 N002 0 .005
R1 N003 0 40.2K
C2 OUT 0 47 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
Rload OUT 0 .3
XU1 NC_01 NC_02 N001 N003 N002 N004 IN NC_03 OUT 0 MP_04 MP_05 MP_06 MP_07 MP_08 MP_09 IN MP_10 IN MP_11 N001 0 NC_12 NC_13 LTM4625 ;pnba FREQ)PhMode)Mode)FB)Track/SS)COMP)Run)Pgood)Vout)GND)))))))Vin))SVin))INTVcc)SGND)CLKOUT)CLKIN
.tran 1.5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4625.asy)
.lib LTM4625.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 -192 -64 -192
WIRE 192 -192 64 -192
WIRE 320 -192 192 -192
WIRE -64 -176 -64 -192
WIRE 448 -176 48 -176
WIRE 192 -160 192 -192
WIRE 320 -160 320 -192
WIRE 64 -96 64 -192
WIRE 80 -96 64 -96
WIRE -64 -80 -64 -96
WIRE 48 0 48 -176
WIRE 80 0 48 0
WIRE 448 0 448 -176
WIRE 448 0 432 0
WIRE 0 96 -16 96
WIRE 80 96 64 96
WIRE 592 96 432 96
WIRE 688 96 592 96
WIRE 592 112 592 96
WIRE 688 112 688 96
WIRE 496 192 432 192
WIRE 496 208 496 192
WIRE 592 208 592 176
WIRE 688 208 688 192
WIRE 448 288 432 288
WIRE 496 304 496 288
WIRE 192 464 192 448
WIRE 320 464 320 448
FLAG 192 464 0
FLAG 320 464 0
FLAG -64 -80 0
FLAG -64 -192 IN
FLAG -16 96 0
FLAG 496 304 0
FLAG 688 208 0
FLAG 592 208 0
FLAG 688 96 OUT
SYMBOL voltage -64 -192 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 64 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .005
SYMBOL res 480 192 R0
SYMATTR InstName R1
SYMATTR Value 40.2K
SYMBOL cap 576 112 R0
SYMATTR InstName C2
SYMATTR Value 47
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL res 672 96 R0
SYMATTR InstName Rload
SYMATTR Value .3
SYMBOL PowerProducts\\LTM4625 256 144 R0
SYMATTR InstName U1
TEXT 552 408 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\5e4dc1f59a50_250p_IDVD.asc
* Generated by LTspice 26.0.1 for Windows.
VG N002 0
M1 N001 N002 0 N001 PMOS l=240n w=360n
VD N001 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib tsmc025.lib
.dc VD -2.5 0 0.01 VG -0.05 -2.5 -0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 64 208 64
WIRE 368 80 368 64
WIRE 208 112 208 64
WIRE 272 112 208 112
WIRE 208 128 208 112
WIRE 272 176 272 112
WIRE 272 176 208 176
WIRE 160 208 -48 208
WIRE -48 304 -48 288
WIRE 208 304 208 224
WIRE 208 304 -48 304
WIRE 368 304 368 160
WIRE 368 304 208 304
WIRE 208 336 208 304
SYMBOL voltage -48 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VG
SYMATTR Value ""
SYMBOL voltage 368 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VD
SYMATTR Value ""
SYMBOL pmos4 160 128 R0
SYMATTR InstName M1
SYMATTR Value2 l=240n w=360n
FLAG 208 336 0
TEXT -440 144 Left 2 !.lib tsmc025.lib
TEXT -584 192 Left 2 !.dc VD -2.5 0 0.01 VG -0.05 -2.5 -0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8306.asc
* Generated by LTspice 26.0.1 for Windows.
* 60V Low-Iq No-Opto Isolated Flyback Controller\n9V to 36V Input, 12V/4A Output Isolated Flyback Converter
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8306.asy)
R4 N004 0 16.9k
R3 VIN N004 100k
L2 0 N001 1.25 Rser=10m
K1 L1 L2 1
C2 VOUT 0 132
XU1 N006 0 N005 N002 VIN N004 LT8306 ;pnba SENSE)GND)GATE)RFB)Vin)EN/UVLO
M1 N003 N005 N006 N006 IPA180N10N3
D1 N001 VOUT RB085BM-60
L1 VIN N003 5 Rser=10m
V1 VIN 0 PWL(0 0 100u 36)
Rload VOUT 0 3
R1 N003 N002 249K
R2 N006 0 5m
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 5m startup
.lib LT8306.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1000 680
WIRE -320 -64 -336 -64
WIRE 544 -64 -320 -64
WIRE 656 -64 592 -64
WIRE 800 -64 720 -64
WIRE 880 -64 800 -64
WIRE 912 -64 880 -64
WIRE 544 -48 544 -64
WIRE 592 -48 592 -64
WIRE 912 -48 912 -64
WIRE 800 -32 800 -64
WIRE -336 48 -336 -64
WIRE -64 48 -336 48
WIRE 112 48 -64 48
WIRE 384 48 336 48
WIRE 544 48 544 32
WIRE 544 48 464 48
WIRE 592 48 592 32
WIRE 800 48 800 32
WIRE 800 48 592 48
WIRE 912 48 912 32
WIRE 912 48 800 48
WIRE 544 64 544 48
WIRE 912 64 912 48
WIRE -64 80 -64 48
WIRE 112 144 48 144
WIRE 496 144 336 144
WIRE -336 160 -336 48
WIRE -64 192 -64 160
WIRE 48 192 48 144
WIRE 48 192 -64 192
WIRE -64 224 -64 192
WIRE 112 240 48 240
WIRE 544 240 544 160
WIRE 544 240 336 240
WIRE 544 256 544 240
WIRE -336 352 -336 240
WIRE -64 352 -64 304
WIRE 544 352 544 336
SYMBOL LT8306 224 192 R0
SYMATTR InstName U1
SYMBOL res 480 64 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 249K
SYMBOL res -80 64 R0
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 896 -64 R0
SYMATTR InstName Rload
SYMATTR Value 3
SYMBOL res 528 240 R0
SYMATTR InstName R2
SYMATTR Value 5m
SYMBOL NMOS 496 64 R0
SYMATTR InstName M1
SYMATTR Value IPA180N10N3
SYMBOL voltage -336 144 R0
WINDOW 3 16 105 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PWL(0 0 100u 36)
SYMATTR InstName V1
SYMBOL schottky 656 -48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 -3 60 VBottom 2
SYMATTR InstName D1
SYMATTR Value RB085BM-60
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL ind2 528 -64 R0
WINDOW 0 1 27 Right 2
WINDOW 3 1 80 Right 2
SYMATTR InstName L1
SYMATTR Value 5
SYMATTR Type ind
SYMATTR SpiceLine Rser=10m
SYMBOL res -80 208 R0
SYMATTR InstName R4
SYMATTR Value 16.9k
SYMBOL cap 784 -32 R0
SYMATTR InstName C2
SYMATTR Value 132
SYMBOL ind2 608 48 R180
WINDOW 0 1 84 Right 2
WINDOW 3 4 34 Right 2
SYMATTR InstName L2
SYMATTR Value 1.25
SYMATTR Type ind
SYMATTR SpiceLine Rser=10m
FLAG 48 240 0
FLAG -336 352 0
FLAG 544 352 0
FLAG 912 64 0
FLAG -320 -64 VIN
FLAG 880 -64 VOUT
FLAG -64 352 0
TEXT 504 -88 Left 2 !K1 L1 L2 1
TEXT 144 344 Left 2 !.tran 5m startup
TEXT -16 -200 Left 3 ;60V Low-Iq No-Opto Isolated Flyback Controller\n9V to 36V Input, 12V/4A Output Isolated Flyback Converter
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1765-1.25.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1765-1.25.asy)
C4 OUT 0 22
C1 N004 0 1
R2 N001 IN 50K
C3 N002 0 1
R1 OUT 0 .6
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1765-1.25 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
C2 N003 0 10n
V1 IN 0 1.6
.tran 2m startup
.lib ADP1765-1.25.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value .6
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMBOL voltage -128 -32 R0
SYMATTR InstName V1
SYMATTR Value 1.6
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL ADP1765-1.25 224 176 R0
SYMATTR InstName U1
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\09d9c2689d19_FWrecFiltt.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N003 0 SINE(0 170 60) Rser=.01
R1 N002 0 100
D2 N004 N002 MUR460
L2 0 N004 .01
L3 N001 0 .01
C1 N002 0 2m
L1 N003 0 1
D1 N001 N002 MUR460
K1 L1 L2 L3 1.
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 33.33e-3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 64 176 64
WIRE 320 64 272 64
WIRE 384 64 320 64
WIRE 320 144 320 64
WIRE 384 144 384 64
WIRE 80 160 -16 160
WIRE 176 160 176 144
WIRE 224 160 176 160
WIRE -16 176 -16 160
WIRE 80 176 80 160
WIRE 176 176 176 160
WIRE 224 192 224 160
WIRE 320 256 320 208
WIRE 384 256 384 224
WIRE 384 256 320 256
WIRE -16 288 -16 256
WIRE 80 288 80 256
WIRE 176 288 176 256
WIRE 208 288 176 288
WIRE 272 288 272 64
WIRE 320 288 320 256
SYMBOL diode 208 48 M90
WINDOW 0 68 33 VBottom 0
WINDOW 3 -30 29 VTop 0
SYMATTR InstName D1
SYMATTR Value MUR460
SYMBOL ind2 64 160 R0
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR Type ind
SYMBOL cap 304 144 R0
SYMATTR InstName C1
SYMATTR Value 2m
SYMBOL voltage -16 160 R0
WINDOW 3 -204 56 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 -204 84 Left 0
SYMATTR Value SINE(0 170 60)
SYMATTR SpiceLine Rser=.01
SYMATTR InstName V1
SYMBOL res 368 128 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL diode 208 304 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D2
SYMATTR Value MUR460
SYMBOL ind2 192 48 M0
SYMATTR InstName L3
SYMATTR Value .01
SYMATTR Type ind
SYMBOL ind2 192 160 M0
SYMATTR InstName L2
SYMATTR Value .01
SYMATTR Type ind
FLAG -16 288 0
FLAG 80 288 0
FLAG 320 288 0
FLAG 224 192 0
TEXT 56 352 Left 0 !.tran 33.33e-3
TEXT -48 112 Left 0 !K1 L1 L2 L3 1.
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8546.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8546.asy)
R2 OUT N001 10K
V2 -V 0 -5
Vin IN 0 SINE(0 .1 10K)
XU1 IN N001 +V -V OUT AD8546 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
R1 N001 0 1K
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1336 700
WIRE 448 -1200 432 -1200
WIRE 544 -1200 528 -1200
WIRE 560 -1200 544 -1200
WIRE 656 -1200 640 -1200
WIRE 208 -1104 208 -1120
WIRE 304 -1104 304 -1120
WIRE 544 -1088 544 -1200
WIRE 560 -1088 544 -1088
WIRE 656 -1072 656 -1200
WIRE 656 -1072 624 -1072
WIRE 736 -1072 656 -1072
WIRE 560 -1056 448 -1056
WIRE 448 -1040 448 -1056
WIRE 208 -1008 208 -1024
WIRE 304 -1008 304 -1024
WIRE 448 -944 448 -960
SYMBOL voltage 208 -1120 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL Opamps\\AD8546 592 -1136 R0
SYMATTR InstName U1
SYMBOL voltage 304 -1120 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 656 -1216 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 544 -1216 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 448 -1056 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 .1 10K)
FLAG 448 -944 0
FLAG 736 -1072 OUT
FLAG 448 -1056 IN
FLAG 592 -1104 +V
FLAG 592 -1040 -V
FLAG 432 -1200 0
FLAG 208 -1120 +V
FLAG 208 -1008 0
FLAG 304 -1120 -V
FLAG 304 -1008 0
TEXT 688 -912 Left 2 !.tran 1m