Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\592e925ca8cd_current-limiting-npn.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 Vcc 54k
R2 0 N003 30
Q1 N001 N002 N003 0 2N3904
Q2 N002 N003 0 0 2N3904
V1 Vcc 0 12
R3 Vcc N001 {R_load}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
* Sizing:\nR2 sets max current -> set max current through the load: Imax = 20 mA\nFind R2 at max current assuming its voltage drop is Vbe and Q2 is still not conducting -> R2 = 0.6V/Imax = 30 ohm\nFind base current at the limiting condition where Q2 is still not conducting -> Ib = Ic/100 = 200 uA\nFind R1 using KVL -> 12 = R1*Ib + 0.6 + 0.6 -> R1 = (12 - 1.2)/20 u = 54k ohm\n \nNow see what happens when R load changes -> max current through the circuit is fixed at 20 mA\nPossible application -> LED driver circuit\n \nAfter running the simulation:\n1) CTRL + L or View SPICE error log\n2) Right click -> Plot .step ed .meas data
.tran 1
.step param R_load 100 1k 50
.meas Load_current AVG I(R3)
* Current limiting circuit using NPN transistors
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1828 680
WIRE -128 -48 -128 -96
WIRE 288 -16 288 -64
WIRE -128 64 -128 32
WIRE 288 128 288 64
WIRE 48 176 -32 176
WIRE 160 176 128 176
WIRE 224 176 160 176
WIRE 160 256 160 176
WIRE 288 304 288 224
WIRE 288 304 224 304
WIRE 288 352 288 304
WIRE 160 464 160 352
WIRE 288 464 288 432
FLAG 288 464 0
FLAG 160 464 0
FLAG -128 64 0
FLAG -128 -96 Vcc
FLAG 288 -64 Vcc
FLAG -32 176 Vcc
SYMBOL res 144 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 54k
SYMBOL res 304 448 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 30
SYMBOL npn 224 128 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL npn 224 256 M0
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL voltage -128 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 272 -32 R0
SYMATTR InstName R3
SYMATTR Value {R_load}
TEXT 544 -128 Left 2 ;Sizing:\nR2 sets max current -> set max current through the load: Imax = 20 mA\nFind R2 at max current assuming its voltage drop is Vbe and Q2 is still not conducting -> R2 = 0.6V/Imax = 30 ohm\nFind base current at the limiting condition where Q2 is still not conducting -> Ib = Ic/100 = 200 uA\nFind R1 using KVL -> 12 = R1*Ib + 0.6 + 0.6 -> R1 = (12 - 1.2)/20 u = 54k ohm\n \nNow see what happens when R load changes -> max current through the circuit is fixed at 20 mA\nPossible application -> LED driver circuit\n \nAfter running the simulation:\n1) CTRL + L or View SPICE error log\n2) Right click -> Plot .step ed .meas data
TEXT 544 368 Left 2 !.tran 1
TEXT 544 256 Left 2 !.step param R_load 100 1k 50
TEXT 544 312 Left 2 !.meas Load_current AVG I(R3)
TEXT 56 -288 Left 4 ;Current limiting circuit using NPN transistors
* Z:\home\khalils\Downloads\files\data\raw_asc\3ec561a4b677_3S_cell_balancing_circuit.asc
* Generated by LTspice 26.0.1 for Windows.
* Control 1
* Control 2
* Control 3
* 3s Balancing circuit
* 4.3 volt
* 8.6 volt
* 12.9 volt
* (3.3 volt)
* (-1 volt)
* (-5.3 volt)
* current is very low using pull up transistor
* (The Discharge current is very low using IRFZ44N mosfet in mosfet 3)
* NMOS transistor - IRFZ44N
* Discharge Resistor - 10 ohm
* Transistor at control 3 - 13005A
* [We gonna use NPN transistor instead of NMOS]
* the one with head sink
* - 4 power input
* - 3 control input
M1 N002 N003 N004 N004 NMOS
V1 N001 N004 4.2
R1 N007 N008 10
M3 N008 N009 0 0 NMOS
V3 N007 0 4.2
V2 N004 N007 4.2
R2 N004 N005 10
R3 N001 N002 10
M2 N005 N006 N007 N007 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1508 1332
WIRE 672 -208 176 -208
WIRE 672 -96 672 -208
WIRE 176 32 176 -208
WIRE 672 96 672 -16
WIRE 480 176 480 144
WIRE 624 176 480 176
WIRE 176 304 176 112
WIRE 672 304 672 192
WIRE 672 304 176 304
WIRE 672 416 672 304
WIRE 176 480 176 304
WIRE 672 560 672 496
WIRE 480 640 480 608
WIRE 624 640 480 640
WIRE 176 720 176 560
WIRE 672 720 672 656
WIRE 672 720 176 720
WIRE 672 832 672 720
WIRE 176 880 176 720
WIRE 672 1008 672 912
WIRE 480 1088 480 1056
WIRE 624 1088 480 1088
WIRE 176 1232 176 960
WIRE 432 1232 176 1232
WIRE 672 1232 672 1104
WIRE 672 1232 432 1232
WIRE 432 1312 432 1232
SYMBOL voltage 176 464 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 4.2
SYMBOL nmos 624 96 R0
SYMATTR InstName M1
SYMBOL res 656 400 R0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL res 656 816 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL nmos 624 1008 R0
SYMATTR InstName M3
SYMBOL res 656 -112 R0
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL nmos 624 560 R0
SYMATTR InstName M2
SYMBOL voltage 176 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.2
SYMBOL voltage 176 864 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 4.2
FLAG 432 1312 0
TEXT 440 1032 Left 2 ;Control 1
TEXT 432 584 Left 2 ;Control 2
TEXT 432 120 Left 2 ;Control 3
TEXT -640 448 Left 5 ;3s Balancing circuit
TEXT 696 720 Left 2 ;4.3 volt
TEXT 704 320 Left 2 ;8.6 volt
TEXT 696 -184 Left 2 ;12.9 volt
TEXT 416 1008 Left 2 ;(3.3 volt)
TEXT 408 544 Left 2 ;(-1 volt)
TEXT 392 88 Left 2 ;(-5.3 volt)
TEXT 192 -48 Left 2 ;current is very low using pull up transistor
TEXT 696 96 Left 2 ;(The Discharge current is very low using IRFZ44N mosfet in mosfet 3)
TEXT -576 648 Left 3 ;NMOS transistor - IRFZ44N
TEXT -576 704 Left 3 ;Discharge Resistor - 10 ohm
TEXT -576 600 Left 3 ;Transistor at control 3 - 13005A
TEXT 744 144 Left 2 ;[We gonna use NPN transistor instead of NMOS]
TEXT -240 568 Left 2 ;the one with head sink
TEXT -576 824 Left 2 ;- 4 power input
TEXT -576 856 Left 2 ;- 3 control input
* Z:\home\khalils\Downloads\files\data\raw_asc\364a78e875d1_6554.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6554.asy)
V1 +V 0 5
C1 0 OUTR .1p
V3 IN 0 SIN(0 1 10Meg) AC 1
R1 0 OUTR 1K
V2 -V 0 -5
XU1 0 0 +V -V IN 0 0 OUTR OUTG OUTB LT6554 ;pnba _EN)DGND)V+)V-)INR)ING)INB)OUTR)OUTG)OUTB
.ac dec 50 10Meg 1G
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 884
WIRE 336 432 336 384
WIRE 240 480 -80 480
WIRE 640 496 432 496
WIRE 736 496 640 496
WIRE 848 496 736 496
WIRE -80 512 -80 480
WIRE 640 512 640 496
WIRE 736 512 736 496
WIRE 240 544 192 544
WIRE 512 592 432 592
WIRE 240 608 128 608
WIRE 640 608 640 592
WIRE 736 608 736 576
WIRE -80 624 -80 592
WIRE 192 640 192 544
WIRE 240 640 192 640
WIRE 192 672 192 640
WIRE 512 688 432 688
WIRE 128 704 128 608
WIRE 240 704 128 704
WIRE 128 736 128 704
WIRE -176 752 -176 720
WIRE -64 752 -64 720
WIRE 272 784 272 752
WIRE 336 784 336 752
WIRE 400 784 400 752
WIRE -176 864 -176 832
WIRE -64 864 -64 832
SYMBOL LT6554 336 512 R0
SYMATTR InstName U1
SYMBOL voltage -176 736 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 624 608 M180
WINDOW 0 36 76 Left 0
WINDOW 3 36 40 Left 0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -80 496 R0
WINDOW 123 38 64 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR Value SIN(0 1 10Meg)
SYMATTR InstName V3
SYMBOL cap 720 576 M180
WINDOW 0 24 64 Left 0
WINDOW 3 24 8 Left 0
SYMATTR InstName C1
SYMATTR Value .1p
SYMBOL voltage -64 736 R0
SYMATTR InstName V2
SYMATTR Value -5
FLAG -176 864 0
FLAG -64 864 0
FLAG 336 384 +V
FLAG 192 672 0
FLAG -80 624 0
FLAG -80 480 IN
FLAG 848 496 OUTR
FLAG 512 592 OUTG
FLAG 512 688 OUTB
FLAG 128 736 0
FLAG -176 720 +V
FLAG -64 720 -V
FLAG 400 784 -V
FLAG 272 784 0
FLAG 336 784 0
FLAG 640 608 0
FLAG 736 608 0
TEXT 544 776 Left 0 !.ac dec 50 10Meg 1G
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5692R.asc
* Generated by LTspice 26.0.1 for Windows.
CLOAD NC_01 0 10n
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
V1 Vdd 0 5
Vdac1 NC_02 0 1.25
I1 0 0 1m AC 1
XU2 vDAC Vdd 0 vOUT AD5692R Gain=2 ;pnba Vdac)Vdd)GND)Vout
.tran 200u
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5692R.asy)
.lib AD5692R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 464 112 192 112
WIRE -800 144 -800 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 1m
SYMBOL AD5692R -208 112 R0
SYMATTR InstName U2
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2
* Z:\home\khalils\Downloads\files\data\raw_asc\c7086b47e718_shunt_reg.asc
* Generated by LTspice 26.0.1 for Windows.
* Shunt regulator
V1 1+ 0 PULSE(-1 10 0 0.5m 0.5m 0 1m)
R1 1+ 2+ 1k
Q3 2+ N002 0 0 2N3904
Rp 2+ N002 5k
R3 N001 N003 100
Q2 N002 N003 0 0 2N3904
R2 2+ N001 2k
Q1 N003 N001 0 0 2N3904
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 792
WIRE -240 160 -288 160
WIRE 128 160 -240 160
WIRE 176 160 128 160
WIRE -240 192 -240 160
WIRE 128 192 128 160
WIRE -240 304 -240 272
WIRE 128 320 128 272
WIRE 128 320 0 320
WIRE 192 320 128 320
WIRE 416 320 192 320
WIRE 432 320 416 320
WIRE 0 336 0 320
WIRE 192 368 192 320
WIRE 0 448 0 416
WIRE 0 448 -96 448
WIRE 416 448 416 320
WIRE 0 480 0 448
WIRE 192 496 192 448
WIRE 352 496 192 496
WIRE 192 528 192 496
WIRE 0 576 0 560
WIRE 128 576 0 576
WIRE 0 624 0 576
WIRE -96 672 -96 448
WIRE -64 672 -96 672
WIRE 0 736 0 720
WIRE 192 736 192 624
WIRE 192 736 0 736
WIRE 416 736 416 544
WIRE 416 736 192 736
WIRE 0 752 0 736
IOPIN 176 160 In
IOPIN -288 160 In
IOPIN 432 320 In
SYMBOL res -16 464 R0
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL npn 128 528 R0
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL res 176 352 R0
SYMATTR InstName Rp
SYMATTR Value 5k
SYMBOL npn 352 448 R0
SYMATTR InstName Q3
SYMATTR Value 2N3904
SYMBOL res 112 176 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL npn -64 624 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res -16 320 R0
SYMATTR InstName R2
SYMATTR Value 2k
SYMBOL voltage -240 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(-1 10 0 0.5m 0.5m 0 1m)
FLAG 0 752 0
FLAG -240 304 0
FLAG 176 160 1+
FLAG -288 160 W1
FLAG 432 320 2+
TEXT -384 776 Left 2 !.tran 10m
TEXT 32 56 Left 2 ;Shunt regulator
* Z:\home\khalils\Downloads\files\data\raw_asc\2fc95ed4d683_Gates.asc
* Generated by LTspice 26.0.1 for Windows.
A1 0 N001 0 N002 0 V1_NAND_V2 V1_AND_V2 0 AND
A2 0 N001 0 N002 0 V1_NOR_V2 V1_OR_V2 0 OR
A3 N001 0 0 0 0 V1_NOT_V2 0 0 BUF
A4 0 N001 0 N002 0 V1_XNOR_V2 V1_XOR_V2 0 XOR
V2 N002 0 PULSE(0 5 0 5ns 5ns 20ms 40ms)
V1 N001 0 PULSE(0 5 0 5ns 5ns 10ms 20ms)
.tran 240
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 -48 32 -48
WIRE 336 -48 304 -48
WIRE 560 -48 400 -48
WIRE 256 -16 128 -16
WIRE 336 -16 256 -16
WIRE 560 -16 400 -16
WIRE 304 64 304 -48
WIRE 336 64 304 64
WIRE 560 64 400 64
WIRE 256 96 256 -16
WIRE 336 96 256 96
WIRE 560 96 400 96
WIRE 32 192 32 -48
WIRE 304 192 304 64
WIRE 336 192 304 192
WIRE 560 192 400 192
WIRE 128 208 128 -16
WIRE 304 272 304 192
WIRE 336 272 304 272
WIRE 560 272 400 272
WIRE 256 304 256 96
WIRE 336 304 256 304
WIRE 560 304 416 304
IOPIN 560 -48 Out
IOPIN 560 -16 Out
IOPIN 560 64 Out
IOPIN 560 96 Out
IOPIN 560 192 Out
IOPIN 560 272 Out
IOPIN 560 304 Out
SYMBOL Digital\\or 368 16 R0
SYMATTR InstName A2
SYMBOL Digital\\xor 384 224 R0
SYMATTR InstName A4
SYMBOL Digital\\and 368 -96 R0
SYMATTR InstName A1
SYMBOL voltage 128 192 R0
WINDOW 3 -168 113 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 5ns 5ns 20ms 40ms)
SYMBOL Digital\\inv 336 128 R0
SYMATTR InstName A3
SYMBOL voltage 32 176 R0
WINDOW 3 -304 74 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 5ns 5ns 10ms 20ms)
FLAG 32 272 0
FLAG 128 288 0
FLAG 560 -48 V1_AND_V2
FLAG 560 -16 V1_NAND_V2
FLAG 560 64 V1_OR_V2
FLAG 560 96 V1_NOR_V2
FLAG 560 192 V1_NOT_V2
FLAG 560 272 V1_XOR_V2
FLAG 560 304 V1_XNOR_V2
TEXT -308 380 Left 2 !.tran 240
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5696R.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5696R.asy)
XU2 vDAC Vdd 0 vOUT AD5696R Gain=2 ;pnba Vdac)Vdd)GND)Vout
Vdac1 NC_01 0 1.25
V1 Vdd 0 5
CLOAD vOUT 0 10n
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
I1 0 0 100 AC 1
.tran 200u
.lib AD5696R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 272 112 192 112
WIRE 464 112 272 112
WIRE -800 144 -800 112
WIRE 272 160 272 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 100
SYMBOL AD5696R -208 112 R0
SYMATTR InstName U2
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2
* Z:\home\khalils\Downloads\files\data\raw_asc\6fad503e7f57_diodechar_01_02_01_incvs_vd_vr_is.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 N002 1N4001
R1 N002 0 1k
V1 N001 0 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 2 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 48 -16 48
WIRE 288 48 176 48
WIRE -16 128 -16 48
WIRE 288 128 288 48
WIRE -16 272 -16 208
WIRE 144 272 -16 272
WIRE 288 272 288 208
WIRE 288 272 144 272
WIRE 144 288 144 272
SYMBOL voltage -16 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL diode 112 64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4001
SYMBOL res 272 112 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 144 288 0
TEXT -48 312 Left 2 !.dc V1 0 2 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG2412.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input\nOnly one channel included\nCrosstalk parameter not included
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG2412.asy)
R1 vD 0 301
XU1 vIN vD vS -V 0 +V ADG2412 ;pnba IN)D)S)Vss)GND)Vdd
V3 vS 0 10
V2 -V 0 -15
V4 vIN 0 pulse(0 5 0 20n 20n 10u 20u)
C1 vD 0 36p
V1 +V 0 15
.tran 75u
.lib ADG2412.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 80 224 48
WIRE -208 144 -208 128
WIRE -48 160 -80 160
WIRE 96 160 32 160
WIRE 128 160 96 160
WIRE 352 160 320 160
WIRE 400 160 352 160
WIRE 496 160 400 160
WIRE 400 192 400 160
WIRE 496 208 496 160
WIRE 96 224 -16 224
WIRE 128 224 96 224
WIRE -208 240 -208 224
WIRE 400 288 400 272
WIRE 496 288 496 272
WIRE -208 336 -208 320
WIRE -16 336 -16 224
WIRE 288 352 288 336
WIRE 160 368 160 336
WIRE -208 432 -208 416
WIRE -16 480 -16 416
SYMBOL voltage 48 160 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL voltage -16 320 R0
WINDOW 3 19 116 Left 2
SYMATTR Value pulse(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V4
SYMBOL ADG2412 224 208 R0
SYMATTR InstName U1
SYMBOL voltage -208 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -208 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 384 176 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL cap 480 208 R0
SYMATTR InstName C1
SYMATTR Value 36p
FLAG -208 432 0
FLAG -208 240 0
FLAG -208 128 +V
FLAG -208 320 -V
FLAG -80 160 0
FLAG -16 480 0
FLAG 400 288 0
FLAG 496 288 0
FLAG 224 48 +V
FLAG 160 368 -V
FLAG 288 352 0
FLAG 96 160 vS
FLAG 96 224 vIN
FLAG 352 160 vD
TEXT 8 464 Left 2 !.tran 75u
TEXT -224 -56 Left 2 ;Note:\nSwitch shown for a logic 0 input\nOnly one channel included\nCrosstalk parameter not included
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1302.asc
* Generated by LTspice 26.0.1 for Windows.
C1 OUT 0 100 Rser=0.02
D1 N001 OUT MBRS340
L1 IN N001 10 Rser=0.02 Rpar=5000
R1 N005 N006 20K
R2 OUT N003 315K
R3 N003 0 105K
C3 N006 0 .01
V1 IN 0 2.5
XU1 0 N005 N002 N003 N004 IN N001 0 LT1302 top=1K bot=1T ;pnba GND)Vc)SHDN)FB)It)Vin)SW)PGND
R4 OUT 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1302.asy)
.lib LT1302.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1604 1024
WIRE 688 448 416 448
WIRE 736 448 688 448
WIRE 864 448 816 448
WIRE 912 448 864 448
WIRE 1024 448 976 448
WIRE 1152 448 1024 448
WIRE 1280 448 1152 448
WIRE 416 464 416 448
WIRE 1152 464 1152 448
WIRE 1280 464 1280 448
WIRE 688 512 688 448
WIRE 1024 528 1024 448
WIRE 416 560 416 544
WIRE 1152 560 1152 528
WIRE 1280 560 1280 544
WIRE 864 592 864 448
WIRE 864 592 832 592
WIRE 544 608 528 608
WIRE 1024 656 1024 608
WIRE 1024 656 832 656
WIRE 1024 672 1024 656
WIRE 544 704 528 704
WIRE 848 720 832 720
WIRE 944 720 928 720
WIRE 944 736 944 720
WIRE 1024 768 1024 752
WIRE 608 816 608 800
WIRE 768 816 768 800
WIRE 944 816 944 800
FLAG 1024 768 0
FLAG 1152 560 0
FLAG 1280 560 0
FLAG 768 816 0
FLAG 608 816 0
FLAG 944 816 0
FLAG 416 560 0
FLAG 1280 448 OUT
FLAG 416 448 IN
SYMBOL POLCAP 1136 464 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL schottky 912 464 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMBOL IND 720 464 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL RES 832 736 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 20K
SYMBOL RES 1008 512 R0
SYMATTR InstName R2
SYMATTR Value 315K
SYMBOL RES 1008 656 R0
SYMATTR InstName R3
SYMATTR Value 105K
SYMBOL CAP 928 736 R0
SYMATTR InstName C3
SYMATTR Value .01
SYMBOL VOLTAGE 416 448 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL POWERPRODUCTS\\LT1302 688 656 R0
SYMATTR InstName U1
SYMBOL RES 1264 448 R0
SYMATTR InstName R4
SYMATTR Value 10
TEXT 1056 864 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX74810.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX74810.asy)
Vin IN 0 SINE(0 1 10K)
R2 OUT N001 10k
Rload OUT 0 10k
V1 +V 0 25
R1 N001 0 10k
XU1 IN N001 +V -V OUT MAX74810 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -25
.tran 1m
.lib MAX74810.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1152 144 -1168
WIRE 272 -1152 272 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 272 -1056 272 -1072
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 272 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -25
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10k
SYMBOL MAX74810 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 25
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 272 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 272 -1056 0
TEXT 720 -944 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\137c318942d5_meros_4o_C_.asc
* Generated by LTspice 26.0.1 for Windows.
* .step param R list 100 500 1k 2k 5k 10k
RC2 VCC UC2 1k
V2 0 -vcc 10
Vub1 N001 0 AC 1
V1 VCC 0 10
Q1 UC1 N001 N003 0 2N3904
VUB2 N002 0 0
Q2 UC2 N002 N003 0 2N3904
I1 N003 -VCC 2m
RC1 VCC UC1 1k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc UB1 -0.25 0.25 0.01
.step temp 0 120 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1044 680
WIRE -160 -304 -160 -352
WIRE 96 -304 96 -352
WIRE -160 -192 -160 -224
WIRE -160 -192 -224 -192
WIRE 96 -192 96 -224
WIRE 160 -192 96 -192
WIRE -160 -112 -160 -192
WIRE 96 -112 96 -192
WIRE 800 -112 800 -160
WIRE 1008 -112 1008 -160
WIRE -224 -64 -448 -64
WIRE 384 -64 160 -64
WIRE -448 0 -448 -64
WIRE 384 0 384 -64
WIRE 800 48 800 -32
WIRE 1008 48 1008 -32
WIRE -448 160 -448 80
WIRE -160 160 -160 -16
WIRE -32 160 -160 160
WIRE 96 160 96 -16
WIRE 96 160 -32 160
WIRE 384 160 384 80
WIRE -32 192 -32 160
WIRE -32 288 -32 272
SYMBOL res -176 -320 R0
SYMATTR InstName RC1
SYMATTR Value 1k
SYMBOL voltage 384 -16 R0
SYMATTR InstName UB2
SYMATTR Value 0
SYMBOL voltage -448 -16 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMATTR InstName ub1
SYMBOL current -32 192 R0
SYMATTR InstName I1
SYMATTR Value 2m
SYMBOL voltage 1008 -16 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 10
SYMBOL voltage 800 -128 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL npn 160 -112 M0
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL npn -224 -112 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 80 -320 R0
SYMATTR InstName RC2
SYMATTR Value 1k
FLAG 800 48 0
FLAG 800 -160 VCC
FLAG 96 -352 VCC
FLAG -160 -352 VCC
FLAG -160 -192 UC1
FLAG 96 -192 UC2
FLAG -32 288 -VCC
FLAG 1008 -160 -vcc
FLAG 1008 48 0
FLAG 384 160 0
FLAG -448 160 0
TEXT -472 392 Left 2 ;.step param R list 100 500 1k 2k 5k 10k
TEXT -512 416 Left 2 !.dc UB1 -0.25 0.25 0.01
TEXT -512 464 Left 2 !.step temp 0 120 10