Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\690934f64fd3_LED_HV_Det.asc
* Generated by LTspice 26.0.1 for Windows.
V2 HV_DET 0 PULSE(0 3.3 0 100u 100u 2m 4m)
Q1 N004 N005 N006 0 UMT3904
V1 VCC 0 PWL(0 8 49m 8 50m 8.5 99m 8.5 100m 9 149m 9 150m 9.5 199m 9.5 200m 10 249m 10 250m 11 299m 11 300m 12 349m 12 350m 13 399m 13 400m 14 449m 14 450m 15 499m 15)
D5 N002 N003 QTLP690C
I1 N006 0 PULSE(100u 51m 0 40m 1m 9m 50m) load
R3 N006 0 360
D4 N001 N002 QTLP690C
D2 N007 0 BAV199HM
D3 VCC N001 QTLP690C
D1 N005 N007 BAV199HM
R1 N005 HV_DET 2k
D6 N003 N004 QTLP690C
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2568 680
WIRE 608 -400 144 -400
WIRE 1120 -400 608 -400
WIRE 1120 -368 1120 -400
WIRE 1120 -272 1120 -304
WIRE 144 -192 144 -400
WIRE 1120 -176 1120 -208
WIRE 144 -96 144 -112
WIRE 1120 -80 1120 -112
WIRE 1120 32 1120 -16
WIRE 368 80 304 80
WIRE 448 80 368 80
WIRE 880 80 528 80
WIRE 1056 80 880 80
WIRE 880 128 880 80
WIRE 304 144 304 80
WIRE 1120 144 1120 128
WIRE 1248 144 1120 144
WIRE 1120 160 1120 144
WIRE 1248 160 1248 144
WIRE 304 240 304 224
WIRE 880 240 880 192
WIRE 1120 272 1120 240
WIRE 1248 272 1248 240
WIRE 880 336 880 304
WIRE 1120 384 1120 352
SYMBOL load2 1120 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 25 112 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMATTR Value PULSE(100u 51m 0 40m 1m 9m 50m)
SYMBOL voltage 144 -208 R0
WINDOW 3 24 44 Invisible 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PWL(0 8 49m 8 50m 8.5 99m 8.5 100m 9 149m 9 150m 9.5 199m 9.5 200m 10 249m 10 250m 11 299m 11 300m 12 349m 12 350m 13 399m 13 400m 14 449m 14 450m 15 499m 15)
SYMATTR InstName V1
SYMBOL res 1232 144 R0
SYMATTR InstName R3
SYMATTR Value 360
SYMBOL LED 1104 -176 R0
SYMATTR InstName D5
SYMATTR Value QTLP690C
SYMBOL res 1136 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 0
SYMBOL LED 1104 -368 R0
SYMATTR InstName D3
SYMATTR Value QTLP690C
SYMBOL diode 864 128 R0
SYMATTR InstName D1
SYMATTR Value BAV199HM
SYMBOL voltage 304 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 0 100u 100u 2m 4m)
SYMBOL LED 1104 -272 R0
SYMATTR InstName D4
SYMATTR Value QTLP690C
SYMBOL npn 1056 32 R0
SYMATTR InstName Q1
SYMATTR Value UMT3904
SYMBOL res 544 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2k
SYMBOL diode 864 240 R0
SYMATTR InstName D2
SYMATTR Value BAV199HM
SYMBOL LED 1104 -80 R0
SYMATTR InstName D6
SYMATTR Value QTLP690C
FLAG 304 240 0
FLAG 144 -96 0
FLAG 1120 384 0
FLAG 880 336 0
FLAG 608 -400 VCC
FLAG 368 80 HV_DET
FLAG 1248 272 0
TEXT 112 408 Left 2 !.tran 0.5
* Z:\tmp\asc_dec_bjh7r6w2\0ec10bfb3a6e_Lab_1_Circ_3__Vin_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 N003 5k
R3 N001 0 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1560 680
WIRE 192 -320 176 -320
WIRE 400 -320 272 -320
WIRE 528 -320 480 -320
WIRE 64 -208 48 -208
WIRE 176 -208 176 -320
WIRE 176 -208 144 -208
WIRE 352 -208 176 -208
WIRE 528 -208 528 -320
WIRE 592 -208 528 -208
WIRE 48 -192 48 -208
WIRE 176 -96 176 -208
WIRE 192 -96 176 -96
WIRE 528 -96 528 -208
WIRE 352 -80 352 -208
WIRE 352 -80 256 -80
WIRE 368 -80 352 -80
WIRE 192 -64 160 -64
SYMBOL res 384 -304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 5k
SYMBOL res 160 -224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
FLAG 48 -192 0
FLAG 224 -112 Vcc
FLAG 224 -48 Vss
FLAG 160 -64 V1
FLAG 576 -112 Vcc
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1574HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1574HV.asy)
Rload OUT 0 25
R2 N002 0 31.5K
C2 OUT 0 100 Rser=0.02
V1 IN 0 9
XU1 N002 MP_01 MP_02 0 N001 IN IN IN LTC1574 top=1K bot=1T ;pnba FB)))GND)SW)Vin)Ipgm)_SHDN
L1 N001 OUT 100 Rser=0.02 Rpar=5000
R1 OUT N002 93.5K
.tran 3m startup
.lib LTC1574.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1492 1120
WIRE 480 528 368 528
WIRE 624 528 480 528
WIRE 368 544 368 528
WIRE 624 544 624 528
WIRE 832 560 800 560
WIRE 944 560 912 560
WIRE 1056 560 944 560
WIRE 1152 560 1056 560
WIRE 944 576 944 560
WIRE 1056 576 1056 560
WIRE 1152 576 1152 560
WIRE 480 608 480 528
WIRE 496 608 480 608
WIRE 800 608 800 560
WIRE 800 608 752 608
WIRE 368 640 368 624
WIRE 480 672 480 608
WIRE 496 672 480 672
WIRE 944 672 944 656
WIRE 944 672 752 672
WIRE 1056 672 1056 640
WIRE 1152 672 1152 656
WIRE 944 688 944 672
WIRE 624 768 624 736
WIRE 944 784 944 768
SYMBOL IND 816 576 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL RES 928 560 R0
SYMATTR InstName R1
SYMATTR Value 93.5K
SYMBOL RES 928 672 R0
SYMATTR InstName R2
SYMATTR Value 31.5K
SYMBOL PowerProducts\\LTC1574HV 624 624 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 368 528 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL POLCAP 1040 576 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL res 1136 560 R0
SYMATTR InstName Rload
SYMATTR Value 25
FLAG 1152 560 OUT
FLAG 368 528 IN
FLAG 1056 672 0
FLAG 1152 672 0
FLAG 624 768 0
FLAG 944 784 0
FLAG 368 640 0
TEXT 1000 848 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2c966d4ef832_curvetrace.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
Q1 N001 N002 0 0 2N2222
I1 0 N002 0.
V1 N001 0 0.
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 10 10m I1 0 100u 10u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2472 1528
WIRE 2128 1152 1984 1152
WIRE 1984 1200 1984 1152
WIRE 2128 1216 2128 1152
WIRE 1920 1248 1840 1248
WIRE 1840 1264 1840 1248
WIRE 1840 1360 1840 1344
WIRE 1984 1360 1984 1296
WIRE 2128 1360 2128 1296
SYMBOL current 1840 1344 M180
WINDOW 0 23 79 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName I1
SYMATTR Value 0.
SYMBOL voltage 2128 1200 R0
SYMATTR InstName V1
SYMATTR Value 0.
SYMBOL npn 1920 1200 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
FLAG 2128 1360 0
FLAG 1984 1360 0
FLAG 1840 1360 0
TEXT 1824 1416 Left 0 !.dc V1 0 10 10m I1 0 100u 10u
TEXT 1512 1480 Left 0 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3020-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3020-1.2.asy)
V1 N001 0 PWL(0 0 1 10)
C1 OUT 0 2.2
Rload OUT 0 100
XU1 OUT MP_01 MP_02 0 N001 MP_03 N001 LT3020-1.2 ;pnba OUT)))GND)_SHDN))IN
.tran 1
.lib LT3020.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 160 -176 160
WIRE 16 160 0 160
WIRE 368 160 304 160
WIRE 464 160 368 160
WIRE 368 176 368 160
WIRE 464 176 464 160
WIRE -176 192 -176 160
WIRE 0 256 0 160
WIRE 16 256 0 256
WIRE 368 272 368 240
WIRE 464 272 464 256
WIRE -176 288 -176 272
WIRE 160 336 160 320
SYMBOL res 448 160 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL PowerProducts\\LT3020-1.2 160 192 R0
SYMATTR InstName U1
SYMBOL cap 352 176 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL voltage -176 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG 160 336 0
FLAG 368 272 0
FLAG 464 272 0
FLAG -176 288 0
FLAG 464 160 OUT
TEXT 384 352 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\735b5211ed72_IRFPE50_Cxss.asc
* Generated by LTspice 26.0.1 for Windows.
* MOSFET Capacitances Versus Drain-Source Voltage
+CGDMIN=100p CJO=3990p Vj=0.75 M=0.6595 CGS=2610p N=1 IS=1.00E-06 RB=0.1781 TT=936n)
V2 N001 0 0 AC 0
V1 d1 0 { VDS} AC 1
V4 N002 0 0 AC 1
M1 d1 N001 0 0 IRFPE50
V3 d2 0 { VDS} AC 0
M2 d2 N002 0 0 IRFPE50
H1 Coss 0 V1 -1e-3
H2 Crss 0 V2 -1e-3
H3 Ciss 0 V4 -1e-3
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.MODEL IRFPE50 VDMOS(KP=3.3362 RS=0.0114 RD=1.1438 RG=1.0 VTO=3.31 CGDMAX=6810p
.step param VDS 0.1 25 0.1
.ac list {1e3/2/pi} ; jw=1e3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1084 788
WIRE 512 96 480 96
WIRE 176 112 112 112
WIRE 256 112 176 112
WIRE 480 128 480 96
WIRE 112 144 112 112
WIRE 64 224 -16 224
WIRE 256 224 256 112
WIRE -16 240 -16 224
WIRE 480 240 480 208
WIRE 512 304 480 304
WIRE -16 336 -16 320
WIRE 112 336 112 240
WIRE 256 336 256 304
WIRE 480 336 480 304
WIRE 176 432 112 432
WIRE 256 432 176 432
WIRE 480 448 480 416
WIRE 112 464 112 432
WIRE 512 512 480 512
WIRE 64 544 -16 544
WIRE 256 544 256 432
WIRE 480 544 480 512
WIRE -16 560 -16 544
WIRE -16 656 -16 640
WIRE 112 656 112 560
WIRE 256 656 256 624
WIRE 480 656 480 624
SYMBOL voltage 256 528 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 0
SYMATTR InstName V3
SYMATTR Value { VDS}
SYMBOL NMOS 64 464 R0
SYMATTR InstName M2
SYMATTR Value IRFPE50
SYMBOL h 480 528 R0
SYMATTR InstName H3
SYMATTR Value V4 -1e-3
SYMBOL voltage -16 224 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage 256 208 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value { VDS}
SYMBOL h 480 112 R0
SYMATTR InstName H1
SYMATTR Value V1 -1e-3
SYMBOL NMOS 64 144 R0
SYMATTR InstName M1
SYMATTR Value IRFPE50
SYMBOL voltage -16 544 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V4
SYMATTR Value 0
SYMBOL h 480 320 R0
SYMATTR InstName H2
SYMATTR Value V2 -1e-3
FLAG 112 336 0
FLAG -16 336 0
FLAG 256 336 0
FLAG 176 112 d1
FLAG 112 656 0
FLAG -16 656 0
FLAG 256 656 0
FLAG 176 432 d2
FLAG 480 240 0
FLAG 480 448 0
FLAG 480 656 0
FLAG 512 96 Coss
FLAG 512 304 Crss
FLAG 512 512 Ciss
TEXT -376 -8 Left 0 !.MODEL IRFPE50 VDMOS(KP=3.3362 RS=0.0114 RD=1.1438 RG=1.0 VTO=3.31 CGDMAX=6810p\n+CGDMIN=100p CJO=3990p Vj=0.75 M=0.6595 CGS=2610p N=1 IS=1.00E-06 RB=0.1781 TT=936n)
TEXT -376 96 Left 0 !.step param VDS 0.1 25 0.1
TEXT -376 120 Left 0 !.ac list {1e3/2/pi} ; jw=1e3
TEXT -368 -80 Left 0 ;MOSFET Capacitances Versus Drain-Source Voltage
* Z:\home\khalils\Downloads\files\data\raw_asc\63c9d4139b6d_Zero_Cross.asc
* Generated by LTspice 26.0.1 for Windows.
* Serial Input Resistor
D2 OUT VCC 1N4148
V2 VCC 0 5
D1 0 OUT 1N4148
R1 OUT N001 1Mega pwr=0.5
V1 N001 0 SINE(0 310 50)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 40m startup
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1784 680
WIRE 880 -464 880 -512
WIRE 592 -352 496 -352
WIRE 880 -352 880 -400
WIRE 880 -352 672 -352
WIRE 1056 -352 880 -352
WIRE 496 -336 496 -352
WIRE 880 -288 880 -352
WIRE 48 -272 48 -320
WIRE 496 -160 496 -256
WIRE 880 -160 880 -224
WIRE 48 -128 48 -192
WIRE 496 -96 496 -160
WIRE 880 -96 880 -160
WIRE 48 -64 48 -128
IOPIN 1056 -352 Out
IOPIN 48 -320 Out
IOPIN 880 -512 Out
SYMBOL res 688 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1Mega
SYMATTR SpiceLine pwr=0.5
SYMBOL voltage 496 -352 R0
WINDOW 0 -37 7 Left 2
WINDOW 3 -196 101 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 310 50)
SYMBOL voltage 48 -288 R0
WINDOW 0 -46 13 Left 2
WINDOW 3 -41 91 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL diode 896 -224 R180
WINDOW 0 -26 59 Left 2
WINDOW 3 -73 4 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL diode 896 -400 R180
WINDOW 0 -26 59 Left 2
WINDOW 3 -74 3 Left 2
SYMATTR InstName D2
SYMATTR Value 1N4148
FLAG 1056 -352 OUT
FLAG 48 -320 VCC
FLAG 880 -512 VCC
FLAG 48 -64 0
FLAG 880 -96 0
FLAG 496 -160 AC_GND
FLAG 48 -128 VCC_GND
FLAG 880 -160 VCC_GND
FLAG 496 -96 0
TEXT -40 -16 Left 2 !.tran 40m startup
TEXT 536 -416 Left 2 ;Serial Input Resistor
* Z:\home\khalils\Downloads\files\data\raw_asc\3c4666fab615_ssc-vsc-simulation.asc
* Generated by LTspice 26.0.1 for Windows.
V2 V+ 0 9V
R3 N001 Vout 10k
XU1 0 N001 V+ 0 Vout LM358 ;pnba In+)In-)V+)V-)OUT
R2 N002 N001 2.7k
V1 N002 0 SINE(0 0.4 10k 0 0 0 5)
.lib LM358.lib
.tran 0 0.01 0 0.001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 724
WIRE -416 -336 -480 -336
WIRE -144 -336 -336 -336
WIRE -144 -224 -144 -336
WIRE -80 -112 -160 -112
WIRE 96 -112 0 -112
WIRE -464 16 -512 16
WIRE -272 16 -384 16
WIRE -160 16 -160 -112
WIRE -160 16 -192 16
WIRE -80 16 -160 16
WIRE 96 32 96 -112
WIRE 96 32 -16 32
WIRE 208 32 96 32
WIRE -80 48 -160 48
WIRE -48 112 -48 64
WIRE -160 160 -160 48
IOPIN 208 32 Out
IOPIN -480 -336 Out
IOPIN -48 0 In
SYMBOL voltage -368 16 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 0.4 10k 0 0 0 5)
SYMBOL OpAmps\\opamp2 -48 -32 R0
SYMATTR InstName U1
SYMATTR Value LM358
SYMBOL res -288 32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 2.7k
SYMBOL voltage -432 -336 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value 9V
SYMBOL res -96 -96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 10k
FLAG 208 32 Vout
FLAG -512 16 0
FLAG -160 160 0
FLAG -144 -224 0
FLAG -480 -336 V+
FLAG -48 0 V+
FLAG -48 112 0
TEXT -520 288 Left 2 !.lib LM358.lib
TEXT -520 312 Left 2 !.tran 0 0.01 0 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\1e8d69bf0b40_Fig9_24_pmos.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1) and 1/d(Id(M1)) (to get ro)
VSG 0 N001 1.15
M1 0 N001 N002 0 P_1u l=2u w=30u
VSD 0 N002 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSD 0 5 1m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 688
WIRE 320 96 320 80
WIRE 320 192 320 176
WIRE 400 192 320 192
WIRE 448 80 320 80
WIRE 448 112 448 80
WIRE 448 304 448 208
WIRE 672 80 448 80
WIRE 672 160 448 160
WIRE 672 160 672 80
WIRE 672 192 672 160
WIRE 672 304 448 304
WIRE 672 304 672 272
WIRE 848 80 672 80
WIRE 848 112 848 80
SYMBOL voltage 672 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 38 54 Left 0
WINDOW 3 24 104 Invisible 0
SYMATTR InstName VSD
SYMATTR Value 0
SYMBOL voltage 320 80 R0
WINDOW 0 -93 54 Left 0
WINDOW 3 -93 82 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VSG
SYMATTR Value 1.15
SYMBOL pmos4 400 112 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=2u w=30u
SYMATTR InstName M1
SYMATTR Value P_1u
FLAG 848 112 0
TEXT 384 336 Left 0 !.dc VSD 0 5 1m
TEXT 384 360 Left 0 !.lib cmosedu_models.txt
TEXT 368 48 Left 0 ;Plot Id(M1) and 1/d(Id(M1)) (to get ro)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3461.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3461.asy)
Rload OUT 0 300
R1 OUT N003 261K
L1 IN N001 15
C2 N003 OUT 15p
V1 IN 0 5
V2 N002 0 PWL(0 0 1m 5)
C1 0 OUT 2.2
XU1 N001 0 N003 N002 OUT IN LT3461 ;pnba SW)GND)FB)_SHDN)Vout)Vin
R2 N003 0 30.1K
.tran 600u startup
.lib LT3461.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2520 1844
WIRE 1584 1264 1504 1264
WIRE 1648 1264 1584 1264
WIRE 1760 1264 1728 1264
WIRE 1504 1280 1504 1264
WIRE 1760 1312 1760 1264
WIRE 1584 1360 1584 1264
WIRE 1616 1360 1584 1360
WIRE 1968 1360 1904 1360
WIRE 2064 1360 1968 1360
WIRE 2144 1360 2064 1360
WIRE 2240 1360 2144 1360
WIRE 1504 1376 1504 1360
WIRE 2240 1376 2240 1360
WIRE 1968 1392 1968 1360
WIRE 2144 1392 2144 1360
WIRE 2064 1408 2064 1360
WIRE 2144 1472 2144 1456
WIRE 2240 1472 2240 1456
WIRE 1488 1520 1456 1520
WIRE 1616 1520 1568 1520
WIRE 1968 1520 1968 1472
WIRE 1968 1520 1904 1520
WIRE 2064 1520 2064 1472
WIRE 2064 1520 1968 1520
WIRE 1968 1536 1968 1520
WIRE 1760 1600 1760 1568
WIRE 1968 1632 1968 1616
SYMBOL cap 2128 1456 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL VOLTAGE 1584 1520 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 1m 5)
SYMBOL PowerProducts\\LT3461 1760 1440 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1504 1264 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2048 1472 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 15p
SYMBOL res 2224 1360 R0
SYMATTR InstName Rload
SYMATTR Value 300
SYMBOL ind 1632 1280 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 15
SYMBOL res 1952 1376 R0
SYMATTR InstName R1
SYMATTR Value 261K
SYMBOL res 1952 1520 R0
SYMATTR InstName R2
SYMATTR Value 30.1K
FLAG 1760 1600 0
FLAG 1504 1376 0
FLAG 1968 1632 0
FLAG 2144 1472 0
FLAG 2240 1472 0
FLAG 1456 1520 0
FLAG 2240 1360 OUT
FLAG 1504 1264 IN
TEXT 2088 1584 Left 2 !.tran 600u startup
* Z:\tmp\asc_dec_bjh7r6w2\1a27daebfc20_spark_gap_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
S1 N002 N004 N003 NC_01 SW
RFlux_Losses1 N001 sgt 2.5K
RSpark_Resistance_guess1 sgt N002 -0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2128 820
WIRE 192 -144 -80 -144
WIRE 256 -144 192 -144
WIRE 432 -144 256 -144
WIRE 464 -144 432 -144
WIRE 192 -128 192 -144
WIRE 256 -128 256 -144
WIRE 432 -64 432 -144
WIRE 224 -48 192 -48
WIRE 256 -48 224 -48
WIRE 224 96 224 -48
WIRE 224 144 224 96
WIRE 224 304 224 224
WIRE 176 368 -176 368
WIRE 224 608 224 384
WIRE 432 608 432 16
SYMBOL sw 224 288 R0
SYMATTR InstName S1
SYMBOL res 240 -144 R0
WINDOW 0 38 39 Left 2
WINDOW 3 39 66 Left 2
SYMATTR InstName Flux_Losses1
SYMATTR Value 2.5K
SYMBOL res 208 128 R0
WINDOW 0 -11 38 Right 2
WINDOW 3 -14 65 Right 2
SYMATTR InstName Spark_Resistance_guess1
SYMATTR Value -0.5
FLAG 96 320 0
FLAG 224 96 sgt
* Z:\home\khalils\Downloads\files\data\raw_asc\05c5ff344c4b_LSK170.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Vg 0 {Vg}
J1 N001 Vg 0 LSK170A
V2 N001 0 PULSE(0 5 1n 1m 1m 2m 5m 1)
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.tran 0 1m 1n
.param Vg=0
.step param Vg 0 -1.5 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 964 680
WIRE 256 -32 -64 -32
WIRE -64 80 -64 -32
WIRE 256 96 256 -32
WIRE 144 160 48 160
WIRE 208 160 144 160
WIRE 48 192 48 160
WIRE 432 192 256 192
WIRE -64 288 -64 160
WIRE 48 288 48 272
WIRE 48 288 -64 288
WIRE 144 288 48 288
WIRE 256 288 256 192
WIRE 256 288 144 288
WIRE 144 320 144 288
SYMBOL voltage -64 64 R0
WINDOW 3 -395 138 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 1n 1m 1m 2m 5m 1)
SYMBOL njf 208 96 R0
SYMATTR InstName J1
SYMATTR Value LSK170A
SYMBOL voltage 48 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vg}
FLAG 144 320 0
FLAG 432 192 Vs
FLAG 144 160 Vg
TEXT -64 312 Left 2 !.tran 0 1m 1n
TEXT 656 88 Left 2 !.param Vg=0
TEXT 656 128 Left 2 !.step param Vg 0 -1.5 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\ADAQ23875.asc
* Generated by LTspice 26.0.1 for Windows.
* Simulation Settings:
* Power Supplies:
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\ADAQ23875.asy)
;.tran 10u
;.ac dec 100 100 10G
V4 N002 N001 SINE(0 1.8189 100k) AC 1
V2 N003 0 PULSE(0 1.8 66.6n .2n .2n 5n 66.6n)
V1 PDB 0 6.5
V3 VS_N 0 -2
XU1 N001 N002 PDB PDB VS_N NC_01 NC_02 NC_03 VDD Vout N003 0 ADAQ23875 ;pnba IN-)IN+)VS+)PDB_AMP)VS-)REF_IN)VCMO)REFBUF)VDD)Vout)CNV)ADC_GND
V5 VDD 0 5
.noise V(Vout) V1 dec 500 100 10G
.lib ADAQ23875.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1496 700
WIRE -144 -480 -144 -560
WIRE 432 -480 432 -560
WIRE -640 -288 -816 -288
WIRE 656 -240 544 -240
WIRE 704 -240 656 -240
WIRE -816 -208 -816 -288
WIRE -640 -192 -640 -288
WIRE -560 -192 -640 -192
WIRE -1696 -112 -1696 -160
WIRE -1552 -112 -1552 -160
WIRE -1504 -112 -1504 -160
WIRE -1504 -112 -1552 -112
WIRE -1408 -112 -1408 -160
WIRE -560 -112 -640 -112
WIRE -1696 -80 -1696 -112
WIRE -1552 -80 -1552 -112
WIRE -1408 -80 -1408 -112
WIRE 704 -64 544 -64
WIRE -816 -16 -816 -128
WIRE -640 -16 -640 -112
WIRE -640 -16 -816 -16
WIRE 704 -16 704 -64
WIRE -1696 32 -1696 0
WIRE -1552 32 -1552 0
WIRE -1552 32 -1696 32
WIRE -1408 32 -1408 0
WIRE -1408 32 -1552 32
WIRE -1696 64 -1696 32
WIRE 704 144 704 64
WIRE -192 256 -192 176
WIRE -144 256 -144 176
WIRE 128 272 128 176
RECTANGLE Normal -1200 112 -1808 -400 2
SYMBOL ADAQ23875 -192 -176 R0
SYMATTR InstName U1
SYMBOL voltage -816 -112 R180
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V4
SYMATTR Value SINE(0 1.8189 100k)
SYMBOL voltage 704 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1.8 66.6n .2n .2n 5n 66.6n)
SYMBOL voltage -1408 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 5
SYMBOL voltage -1552 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 6.5
SYMBOL voltage -1696 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -2
FLAG 704 144 0
FLAG -1696 64 0
FLAG -1696 -112 VS_N
FLAG -1408 -112 VDD
FLAG 656 -240 Vout
FLAG 432 -560 VDD
FLAG -144 -560 VS_P
FLAG -144 256 VS_N
FLAG 128 272 0
FLAG -192 256 PDB
FLAG -1504 -160 PDB
FLAG -1552 -160 VS_P
TEXT -1776 -376 Left 2 ;Simulation Settings:
TEXT -1760 -336 Left 2 !.noise V(Vout) V1 dec 500 100 10G
TEXT -1760 -272 Left 2 !;.tran 10u
TEXT -1760 -304 Left 2 !;.ac dec 100 100 10G
TEXT -1776 -216 Left 2 ;Power Supplies:
* Z:\home\khalils\Downloads\files\data\raw_asc\1ff4de52d407_power.asc
* Generated by LTspice 26.0.1 for Windows.
V3 usb 0 5
D2 NC_01 out D
M1 bat out out out PMOS
D1 usb out D
V2 bat 0 9
R1 out 0 10k
R2 out 0 1k
V1 wall 0 9
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1s startup
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 432 32 432 -16
WIRE 160 112 -16 112
WIRE 304 112 256 112
WIRE 304 160 304 112
WIRE 432 160 432 96
WIRE 432 160 304 160
WIRE 240 192 240 160
WIRE 240 192 112 192
WIRE 304 192 304 160
WIRE 304 192 240 192
WIRE 240 224 240 192
WIRE 432 224 432 160
WIRE 240 320 240 304
WIRE 432 320 432 304
SYMBOL schottky 48 208 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL voltage 400 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 416 208 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL pmos 160 160 R270
SYMATTR InstName M1
SYMBOL voltage 64 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL res 224 208 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL schottky 416 32 R0
SYMATTR InstName D1
SYMBOL voltage 224 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 9
FLAG 240 320 0
FLAG 432 320 0
FLAG 64 496 0
FLAG 224 496 0
FLAG 400 496 0
FLAG 64 416 wall
FLAG 224 416 bat
FLAG 400 416 usb
FLAG 432 -16 usb
FLAG -16 112 bat
FLAG -16 192 wall
FLAG 432 160 out
TEXT -32 -32 Left 2 !.tran 1s startup