Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4899.asc
* Generated by LTspice 26.0.1 for Windows.
RL Vout 0 1k
Rin N002 Vin 24.9
VS- 0 -Vs 5
VS+ +Vs 0 5
VIN Vin 0 PULSE(-1 1 20n 1n 1n 50n 100n)
XU1 N002 N001 +Vs -Vs Vout N001 NC_01 ADA4899 ;pnba IN+)IN-)V+)V-)OUT)FB)PD
.tran 100n
* ADA4899\nUnity-Gain Operation
* Disable: _DISABLE pin = -Vs\nEnable: _DISABLE pin = open\nLow Ib: _DISABLE pin = +Vs
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4899.asy)
.lib ADA4899.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -336 32 -336 16
WIRE 208 64 112 64
WIRE 208 128 208 64
WIRE 224 128 224 64
WIRE 112 144 112 64
WIRE 192 144 112 144
WIRE -336 160 -336 112
WIRE -336 160 -368 160
WIRE 432 160 256 160
WIRE 480 160 432 160
WIRE -368 176 -368 160
WIRE -48 176 -160 176
WIRE 16 176 -48 176
WIRE 192 176 96 176
WIRE -336 192 -336 160
WIRE 432 192 432 160
WIRE -160 240 -160 176
WIRE 224 240 224 192
WIRE -336 288 -336 272
WIRE 432 304 432 272
WIRE -160 352 -160 320
FLAG -48 176 Vin
FLAG 224 64 +Vs
FLAG 224 240 -Vs
FLAG 480 160 Vout
FLAG 432 304 0
FLAG -336 16 +Vs
FLAG -336 288 -Vs
FLAG -368 176 0
FLAG -160 352 0
SYMBOL res 416 176 R0
SYMATTR InstName RL
SYMATTR Value 1k
SYMBOL res 112 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rin
SYMATTR Value 24.9
SYMBOL voltage -336 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName VS-
SYMATTR Value 5
SYMBOL voltage -336 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName VS+
SYMATTR Value 5
SYMBOL voltage -160 224 R0
WINDOW 0 42 50 Left 2
WINDOW 3 42 78 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 42 106 Left 2
SYMATTR InstName VIN
SYMATTR Value PULSE(-1 1 20n 1n 1n 50n 100n)
SYMBOL ADA4899 224 176 R0
SYMATTR InstName U1
TEXT -160 56 Left 2 !.tran 100n
TEXT -160 -24 Left 2 ;ADA4899\nUnity-Gain Operation
TEXT 48 384 Left 2 ;Disable: _DISABLE pin = -Vs\nEnable: _DISABLE pin = open\nLow Ib: _DISABLE pin = +Vs
* Z:\home\khalils\Downloads\files\data\raw_asc\a7dc8b107f17_EP3_step.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 0 {lower}
V1 N001 0 1
R1 N001 N002 {upper}
.step param upper list 1k 10k 100k
.step param lower 1k 10k 1k
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 224 -32 112 -32
WIRE 224 16 224 -32
WIRE 112 64 112 -32
WIRE 224 112 224 96
WIRE 112 208 112 144
WIRE 224 208 224 192
SYMBOL res 208 0 R0
SYMATTR InstName R1
SYMATTR Value {upper}
SYMBOL res 208 96 R0
SYMATTR InstName R2
SYMATTR Value {lower}
SYMBOL voltage 112 48 R0
SYMATTR InstName V1
SYMATTR Value 1
FLAG 112 208 0
FLAG 224 208 0
TEXT 80 -88 Left 2 !.step param upper list 1k 10k 100k
TEXT 80 -120 Left 2 !.step param lower 1k 10k 1k
TEXT 64 232 Left 2 !.tran 1
* Z:\tmp\asc_dec_bjh7r6w2\0951eaa64682_reverse_polarity_protection_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 N001 1N750
R2 N001 N005 12
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 80 176 80
WIRE 512 80 272 80
WIRE 272 144 272 80
WIRE 512 208 512 80
WIRE 160 256 160 128
WIRE 272 256 272 208
WIRE 272 256 160 256
WIRE 352 256 272 256
WIRE 160 304 160 256
WIRE 352 304 352 256
WIRE 160 416 160 384
WIRE 352 416 352 368
WIRE 512 416 512 288
SYMBOL zener 288 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N750
SYMBOL res 496 192 R0
SYMATTR InstName R2
SYMATTR Value 12
* Z:\home\khalils\Downloads\files\data\raw_asc\d3fc4b6b1431_Draft3N.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 VG P001 0 nch l=1u w=1u
VDS N001 0 0.9
VGS VG 0 1
VBS P001 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib cmos018.txt
.STEP VBS 0 1 1m
.MEAS DC UTH FIND V(VG) WHEN Id(M1)=500n
.DC VGS 0 2 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 928 680
WIRE 576 64 256 64
WIRE 256 112 256 64
WIRE 576 112 576 64
WIRE 320 160 256 160
WIRE 160 192 64 192
WIRE 208 192 160 192
WIRE 64 208 64 192
WIRE 64 304 64 288
WIRE 256 304 256 288
WIRE 320 304 320 160
WIRE 576 304 576 192
FLAG 256 304 0
FLAG 576 304 0
FLAG 64 304 0
FLAG 160 192 VG
FLAG 320 304 0
SYMBOL nmos4 208 112 R0
WINDOW 0 123 22 Left 2
WINDOW 3 123 47 Left 2
WINDOW 123 124 75 Left 2
SYMATTR InstName M1
SYMATTR Value nch
SYMATTR Value2 l=1u w=1u
SYMBOL voltage 576 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 0.9
SYMBOL voltage 64 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 1
SYMBOL voltage 256 192 R0
WINDOW 0 -85 35 Left 2
WINDOW 3 -69 68 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VBS
SYMATTR Value 1
TEXT 32 -112 Left 2 !.lib cmos018.txt
TEXT 32 -80 Left 2 !.STEP VBS 0 1 1m
TEXT 32 -16 Left 2 !.MEAS DC UTH FIND V(VG) WHEN Id(M1)=500n
TEXT 32 -48 Left 2 !.DC VGS 0 2 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6011.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6011.asy)
R1 N002 N001 1K
V2 -V 0 -10
XU1 N003 N001 N002 +V -V LT6011 ;pnba IN+)IN-)OUT)VCC)VEE
V1 +V 0 10
R2 N001 0 1K
V3 N003 0 SINE(0 1 1K)
.tran 3m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -112 48 -128 48
WIRE 0 48 -32 48
WIRE 96 48 0 48
WIRE 208 48 176 48
WIRE 64 112 64 96
WIRE -416 160 -416 144
WIRE -288 160 -288 144
WIRE 0 160 0 48
WIRE 32 160 0 160
WIRE 208 192 208 48
WIRE 208 192 176 192
WIRE 32 224 -160 224
WIRE -160 240 -160 224
WIRE -416 256 -416 240
WIRE -288 256 -288 240
WIRE 64 288 64 272
WIRE -160 336 -160 320
SYMBOL res -16 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 192 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -160 224 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL opamps\\LT6011 64 192 R0
SYMATTR InstName U1
SYMBOL voltage -416 144 R0
SYMATTR InstName V2
SYMATTR Value -10
FLAG -288 256 0
FLAG 64 96 +V
FLAG -288 144 +V
FLAG 64 288 -V
FLAG -416 256 0
FLAG -416 144 -V
FLAG -128 48 0
FLAG -160 336 0
TEXT 144 360 Left 2 !.tran 3m
* Z:\tmp\asc_dec_bjh7r6w2\13492e62e963_current_gain_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N004 0 10m
XU1 N004 N001 N002 N005 N003 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 0 48 0
WIRE 224 0 64 0
WIRE 224 32 224 0
WIRE 144 144 144 112
WIRE 64 160 64 0
WIRE 112 160 64 160
WIRE 224 176 224 112
WIRE 224 176 176 176
WIRE 288 176 224 176
WIRE 112 192 64 192
WIRE 64 240 64 192
WIRE 64 240 48 240
WIRE 144 240 144 208
SYMBOL voltage 64 240 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 10m
SYMBOL Opamps\\UniversalOpamp2 144 176 R0
SYMATTR InstName U1
FLAG -32 240 0
FLAG 144 320 0
FLAG 144 32 0
FLAG -32 0 0
* Z:\home\khalils\Downloads\files\data\raw_asc\2d624d700231_astable.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 {Vcc}
C2 out b2 {Cr}
R1 N001 c1 {Rc}
Q2 c1 b2 0 0 TBJ
R4 N001 b2 {Rr}
C1 b1 c1 {Cr}
R3 N001 b1 {Rr}
Q1 out b1 0 0 TBJ
R2 N001 out {Rc}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1 startup
.meas tran Tf1 find time when V(out)=Vcc/2 fall 3
.meas tran Tr1 find time when V(out)=Vcc/2 rise 3
.meas tran Tf2 find time when V(out)=Vcc/2 fall 4
.meas tran Tr2 find time when V(out)=Vcc/2 rise 4
.meas tran th param Tf1-Tr1
.meas tran tl param Tr2-Tf1
.meas tran fosc param 1/(Tf2-Tf1)
.param Vcc=25 Rc=2k Rr=100k Cr=0.05u
.model TBJ NPN(BF=150 TF=400E-10 TR=400E-10)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1652 1248
WIRE -560 768 -720 768
WIRE -400 768 -560 768
WIRE -240 768 -400 768
WIRE -96 768 -240 768
WIRE -560 784 -560 768
WIRE -400 784 -400 768
WIRE -240 784 -240 768
WIRE -96 784 -96 768
WIRE -720 800 -720 768
WIRE -96 880 -96 864
WIRE -720 912 -720 880
WIRE -560 928 -560 864
WIRE -528 928 -560 928
WIRE -400 928 -400 864
WIRE -400 928 -464 928
WIRE -240 928 -240 864
WIRE -208 928 -240 928
WIRE -96 928 -96 880
WIRE -96 928 -144 928
WIRE -560 976 -560 928
WIRE -96 976 -96 928
WIRE -464 1024 -496 1024
WIRE -368 1024 -240 928
WIRE -368 1024 -464 1024
WIRE -240 1024 -400 928
WIRE -224 1024 -240 1024
WIRE -160 1024 -224 1024
WIRE -560 1088 -560 1072
WIRE -96 1088 -96 1072
SYMBOL VOLTAGE -720 784 R0
SYMATTR InstName V1
SYMATTR Value {Vcc}
SYMBOL res -256 768 R0
SYMATTR InstName R4
SYMATTR Value {Rr}
SYMBOL res -416 768 R0
SYMATTR InstName R3
SYMATTR Value {Rr}
SYMBOL NPN -160 976 R0
SYMATTR InstName Q1
SYMATTR Value TBJ
SYMBOL cap -464 912 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {Cr}
SYMBOL RES -576 768 R0
SYMATTR InstName R1
SYMATTR Value {Rc}
SYMBOL res -112 768 R0
SYMATTR InstName R2
SYMATTR Value {Rc}
SYMBOL cap -144 912 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {Cr}
SYMBOL npn -496 976 M0
SYMATTR InstName Q2
SYMATTR Value TBJ
FLAG -96 1088 0
FLAG -560 1088 0
FLAG -720 912 0
FLAG -96 880 out
FLAG -224 1024 b1
FLAG -464 1024 b2
FLAG -560 928 c1
TEXT -200 1136 Left 2 !.tran 1 startup
TEXT 136 912 Left 2 !.meas tran Tf1 find time when V(out)=Vcc/2 fall 3\n.meas tran Tr1 find time when V(out)=Vcc/2 rise 3\n.meas tran Tf2 find time when V(out)=Vcc/2 fall 4\n.meas tran Tr2 find time when V(out)=Vcc/2 rise 4\n.meas tran th param Tf1-Tr1\n.meas tran tl param Tr2-Tf1\n.meas tran fosc param 1/(Tf2-Tf1)
TEXT -672 1232 Left 2 !.param Vcc=25 Rc=2k Rr=100k Cr=0.05u
TEXT -664 1192 Left 2 !.model TBJ NPN(BF=150 TF=400E-10 TR=400E-10)
* Z:\home\khalils\Downloads\files\data\raw_asc\553324c7bb65_Draft_Diode_1N4148.asc
* Generated by LTspice 26.0.1 for Windows.
* Analyse
* Bibliothek
* Parameter
R1 IN1 IN2 {R1}
V1 IN1 0 PULSE(0 1 0 .5m .5m 0 1m)
D1 IN2 0 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m
.lib elk.lib
.param R1=10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 64 96 64
WIRE 192 64 144 64
WIRE 336 64 272 64
WIRE 400 64 336 64
WIRE 144 80 144 64
WIRE 336 80 336 64
WIRE 144 176 144 160
WIRE 336 176 336 144
WIRE 336 176 144 176
WIRE 144 192 144 176
IOPIN 96 64 In
IOPIN 400 64 Out
SYMBOL res 176 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 1 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL voltage 144 64 R0
WINDOW 3 -323 96 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 17 19 Left 2
SYMATTR Value PULSE(0 1 0 .5m .5m 0 1m)
SYMATTR InstName V1
SYMBOL diode 320 80 R0
WINDOW 0 38 31 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG 144 192 0
FLAG 96 64 IN1
FLAG 400 64 IN2
TEXT -8 -48 Left 2 !.tran 2m
TEXT 168 -48 Left 2 !.lib elk.lib
TEXT 344 -48 Left 2 !.param R1=10
TEXT -8 -72 Left 2 ;Analyse
TEXT 168 -72 Left 2 ;Bibliothek
TEXT 344 -72 Left 2 ;Parameter
* Z:\home\khalils\Downloads\files\data\raw_asc\133871dcc2aa_Triode_plate_current1.asc
* Generated by LTspice 26.0.1 for Windows.
* Plate Current Versus Plate Voltage at Selected Grid Volatges\n \nPlot I(VT1:Plate) to get the plate current versus plate voltage at selected values of the grid voltage.
* The first .STEP command is the x-axis parameter.\nStep from -50V to -10V in steps of 10V
* * Pin oder 1 2 3\n.SUBCKT NH2A3 A G K\n... \n...\n \n*This pin order matches with the pin order \n* of the triode symbol in LTSPICE
* Which curve has which parameters?\n Attach a cursor to the waveform.\n Use up/down keys to step through the sweeps.\n Press the right mouse button while the cursor number "1" or "2 " is visible.
V1 plate 0 {VP}
XVt1 plate grid 0 NH2A3 Triode ;pnba Plate)Grid)Cathode
V2 grid 0 {VG}
.step param VP 0 400 20
.step param VG -50 -10 10
.OP
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1560 724
WIRE 128 128 -96 128
WIRE -96 176 -96 128
WIRE 128 176 128 128
WIRE -96 304 -96 256
WIRE 128 320 128 176
WIRE 80 368 48 368
WIRE 48 400 48 368
WIRE 48 400 -96 400
WIRE -96 448 -96 400
WIRE -96 560 -96 528
WIRE 96 560 96 416
WIRE 96 560 -96 560
WIRE -96 576 -96 560
SYMBOL Valve\\triode 128 368 R0
SYMATTR InstName Vt1
SYMATTR SpiceModel NH2A3
SYMBOL voltage -96 432 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value {VG}
SYMBOL voltage -96 160 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {VP}
FLAG -96 576 0
FLAG -96 304 0
FLAG 128 176 plate
FLAG -96 400 grid
TEXT 120 552 Left 0 !.step param VP 0 400 20\n.step param VG -50 -10 10
TEXT 120 520 Left 0 !.OP
TEXT -112 -72 Left 0 ;Plate Current  Versus Plate Voltage at Selected Grid Volatges\n \nPlot I(VT1:Plate)  to get the plate current versus plate voltage at selected values of the grid voltage.
TEXT 424 544 Left 0 ;The first  .STEP command is the x-axis parameter.\nStep from -50V to -10V in steps of 10V
TEXT 192 296 Left 0 ;* Pin oder              1  2  3\n.SUBCKT NH2A3  A G K\n... \n...\n \n*This pin order matches with the pin order \n* of the triode symbol in LTSPICE
TEXT -112 24 Left 0 ;Which curve has which parameters?\n  Attach a cursor to the waveform.\n  Use up/down keys to step through the sweeps.\n  Press the right mouse button while the cursor number "1" or "2 " is visible.
* Z:\home\khalils\Downloads\files\data\raw_asc\00ccec2cdc4e_2641A-16.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2641A-16.asy)
V6 N006 0 PWL(0 3.3 2u 3.3 +2n 0 +30n 0 +2n 3.3)
V2 N002 0 5
V1 N005 0 PULSE(0 3.3 0 0.1n 0.1n 19.8n 40n)
V4 N004 0 PULSE(0 3.3 0 0.1n 0.1n 9.9n 20n)
V3 N003 0 2.5
C1 OUT 0 10p
V5 N001 0 PWL(0 3.3 0.6u 3.3 +2n 0 +0.31u 0 +2n 3.3)
XU1 N003 N001 N004 N005 N006 OUT N002 0 LTC2641A-16 ;pnba REF)_CS)SCLK)DIN)_CLR)Vout)Vdd)GND
.tran 3u
.lib LTC2641A-16.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 932
WIRE 320 16 320 -16
WIRE 448 16 448 -16
WIRE -32 64 -48 64
WIRE 192 64 48 64
WIRE 320 128 320 96
WIRE 448 128 448 96
WIRE 192 176 192 64
WIRE 240 176 192 176
WIRE -32 192 -48 192
WIRE 160 192 48 192
WIRE 160 240 160 192
WIRE 240 240 160 240
WIRE 608 272 528 272
WIRE 608 288 608 272
WIRE -32 304 -48 304
WIRE 240 304 48 304
WIRE 240 368 176 368
WIRE 608 368 608 352
WIRE 384 416 384 400
WIRE -32 448 -48 448
WIRE 176 448 176 368
WIRE 176 448 48 448
SYMBOL voltage 64 64 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -122 VRight 2
SYMATTR InstName V5
SYMATTR Value PWL(0 3.3 0.6u 3.3 +2n 0 +0.31u 0 +2n 3.3)
SYMBOL voltage 64 192 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -89 VRight 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 3.3 0 0.1n 0.1n 9.9n 20n)
SYMBOL voltage 64 304 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -99 VRight 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 0.1n 0.1n 19.8n 40n)
SYMBOL voltage 448 112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 2.5
SYMBOL voltage 320 112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 64 448 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -99 VRight 2
SYMATTR InstName V6
SYMATTR Value PWL(0 3.3 2u 3.3 +2n 0 +30n 0 +2n 3.3)
SYMBOL cap 592 288 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL LTC2641A-16 384 272 R0
SYMATTR InstName U1
FLAG 384 416 0
FLAG -48 304 0
FLAG 320 -16 0
FLAG 448 -16 0
FLAG -48 192 0
FLAG -48 64 0
FLAG -48 448 0
FLAG 608 272 OUT
FLAG 608 368 0
TEXT 632 432 Left 2 !.tran 3u
* Z:\home\khalils\Downloads\files\data\raw_asc\c0207012c6dd_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N002 0 PULSE(0 5 0 1n 1n 1 2)
V2 P001 0 5
R1 N003 N002 9.9k
R2 P001 N001 998.7
Q1 N001 N003 0 0 BC547C
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 2.00000017 1.9999999 1u
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1344 680
WIRE 304 128 304 64
WIRE 128 176 80 176
WIRE 240 176 208 176
WIRE 80 224 80 176
WIRE 192 304 80 304
WIRE 304 304 304 224
WIRE 304 304 192 304
WIRE 192 336 192 304
FLAG 192 336 0
FLAG 304 -96 0
SYMBOL voltage 80 208 R0
WINDOW 3 -371 48 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 0 1n 1n 1 2)
SYMATTR InstName V1
SYMBOL voltage 304 0 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 224 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 9.9k
SYMBOL res 288 -32 R0
SYMATTR InstName R2
SYMATTR Value 998.7
SYMBOL npn2 240 128 R0
SYMATTR InstName Q1
SYMATTR Value BC547C
TEXT 112 272 Left 2 !.tran 0 2.00000017 1.9999999 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\16ad00035207_linear_inductor.asc
* Generated by LTspice 26.0.1 for Windows.
* G1, C1, E1 models volt-seconds\n applied to inductor
* F1, V1 reflects current resulting\n from applied volt-seconds
* R1 models linear inductance\n with unity gain: L = C1*R1
* V1 senses current drawn by\n applied volt-seconds
* Generalized Impedance Converter Based Linear Inductor Model
* L1: the reference standard\n (compare its current to that\n of the various models)
Vs 1 0 PULSE(-1 1 1m .1u .1u 2m 4m)
L1 1 0 1m
E1 N001 0 2 0 1
F1 1 0 V1 1
C1 2 0 1
R1 3 0 1m
G1 0 2 1 0 1
V1 N001 3 0
.tran 0 10m 1u uic
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1044 680
WIRE -112 -80 -112 -112
WIRE -112 32 -112 0
WIRE -160 -64 -160 -112
WIRE -160 -112 -240 -112
WIRE -304 -112 -304 -80
WIRE -304 0 -304 32
WIRE -160 -16 -160 32
WIRE -240 32 -240 -16
WIRE -240 -80 -240 -112
WIRE -240 -112 -272 -112
WIRE -352 -16 -352 32
WIRE -352 -112 -432 -112
WIRE -352 -112 -352 -64
WIRE -432 -112 -576 -112
WIRE -432 32 -432 0
WIRE -432 -80 -432 -112
WIRE -640 32 -640 0
WIRE -640 -80 -640 -112
WIRE -608 -112 -640 -112
WIRE 48 -112 48 -80
WIRE 48 0 48 32
WIRE 48 -112 16 -112
WIRE -112 -112 -64 -112
WIRE 48 -112 80 -112
WIRE -272 -112 -304 -112
WIRE 80 -112 96 -112
WIRE -576 -112 -576 -80
WIRE -576 0 -576 32
WIRE -576 -112 -608 -112
LINE Normal -96 -160 -288 -160 2
LINE Normal -64 -144 -96 -160 2
LINE Normal -320 -144 -288 -160 2
LINE Normal -384 -80 -320 -144 2
SYMBOL ind -560 -96 M0
WINDOW 0 0 16 Right 0
WINDOW 3 0 96 Right 0
SYMATTR InstName L1
SYMATTR Value 1m
SYMBOL g -304 -96 R0
WINDOW 0 16 16 Left 0
WINDOW 3 16 96 Left 0
SYMATTR InstName G1
SYMATTR Value 1
SYMBOL e -112 -96 R0
WINDOW 0 16 16 Left 0
WINDOW 3 16 96 Left 0
SYMATTR InstName E1
SYMATTR Value 1
SYMBOL f -432 -80 R0
WINDOW 0 16 0 Left 0
WINDOW 3 40 41 Left 0
WINDOW 123 16 80 Left 0
SYMATTR InstName F1
SYMATTR Value V1
SYMATTR Value2 1
SYMBOL cap -256 -80 R0
WINDOW 0 32 0 Left 0
WINDOW 3 32 80 Left 0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -640 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 48 72 Left 0
WINDOW 3 -48 176 Left 0
WINDOW 0 -42 57 Right 0
SYMATTR Value PULSE(-1 1 1m .1u .1u 2m 4m)
SYMATTR InstName Vs
SYMBOL res 32 -96 R0
WINDOW 0 32 16 Left 0
WINDOW 3 32 96 Left 0
SYMATTR InstName R1
SYMATTR Value 1m
SYMBOL voltage -80 -112 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 Invisible 0
SYMATTR InstName V1
SYMATTR Value 0
FLAG -272 -112 2
FLAG -640 32 0
FLAG -608 -112 1
FLAG -304 32 0
FLAG -240 32 0
FLAG -160 32 0
FLAG -112 32 0
FLAG 48 32 0
FLAG 80 -112 3
FLAG -576 32 0
FLAG -432 32 0
FLAG -352 32 0
TEXT -688 -160 Left 0 !.tran 0 10m 1u uic
TEXT -248 -192 VLeft 0 ;G1, C1, E1 models volt-seconds\n applied to inductor
TEXT -432 -192 VLeft 0 ;F1, V1 reflects current resulting\n from applied volt-seconds
TEXT 56 -192 VLeft 0 ;R1 models linear inductance\n with unity gain: L = C1*R1
TEXT -56 -192 VLeft 0 ;V1 senses current drawn by\n applied volt-seconds
TEXT -296 -624 Bottom 0 ;Generalized Impedance Converter Based Linear Inductor Model
TEXT -592 -192 VLeft 0 ;L1: the reference standard\n (compare its current to that\n of the various models)
* Z:\home\khalils\Downloads\files\data\raw_asc\17fc2efa157d_lab2_task1.asc
* Generated by LTspice 26.0.1 for Windows.
VEB N002 0 0
Q1 N001 N002 0 0 2SC4081UB
VEK N001 0 5
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc EB 0 2 0.001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 192 272 192
WIRE 192 256 192 192
WIRE -32 304 -48 304
WIRE 128 304 48 304
WIRE 192 432 192 352
SYMBOL voltage 64 304 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName EB
SYMATTR Value 0
SYMBOL voltage 176 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName EK
SYMATTR Value 5
SYMBOL npn 128 256 R0
SYMATTR InstName Q1
SYMATTR Value 2SC4081UB
FLAG 304 192 0
FLAG -48 304 0
FLAG 192 432 0
TEXT -136 456 Left 2 !.dc EB 0 2 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\b97d0e2a77a3_Draft15.asc
* Generated by LTspice 26.0.1 for Windows.
RB N001 VB 15K
V2 V2 0 2
Q1 Vce N001 0 0 2N2222
V3 VB 0 PWL REPEAT FOREVER (0 0 +999u 0 +1u 1 +999u 1 +1u 2 ++999u 2 +1u 3 +999u 3 +1u 4 +999u 4 +1u 5 +999u 5 +1u 6 +999u 6 +1u 7 +999u 7 +1u 8 +999u 8 +1u 0) ENDREPEAT TRIGGER V(v2)>0
V1 VC 0 PWL REPEAT FOREVER (0 0 0.999m 10 +1u 0) ENDREPEAT TRIGGER V(v2)>0
RC VC Vce 100
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 10m 0 1u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2500 680
WIRE 1536 -160 1536 -192
WIRE 1536 -64 1536 -80
WIRE 1536 -32 1536 -64
WIRE 1344 16 1312 16
WIRE 1472 16 1424 16
WIRE -160 80 -160 32
WIRE 128 80 128 32
WIRE 1536 128 1536 64
WIRE -160 208 -160 160
WIRE 128 208 128 160
WIRE 128 416 128 368
WIRE 128 544 128 496
SYMBOL res 1440 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RB
SYMATTR Value 15K
SYMBOL res 1520 -176 R0
SYMATTR InstName RC
SYMATTR Value 100
SYMBOL voltage 128 400 R0
SYMATTR InstName V3
SYMATTR Value PWL REPEAT FOREVER (0 0 +999u 0 +1u 1 +999u 1 +1u 2 ++999u 2 +1u 3 +999u 3 +1u 4 +999u 4 +1u 5 +999u 5 +1u 6 +999u 6 +1u 7 +999u 7 +1u 8 +999u 8 +1u 0) ENDREPEAT TRIGGER V(v2)>0
SYMBOL voltage 128 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL REPEAT FOREVER (0 0 0.999m 10 +1u 0) ENDREPEAT TRIGGER V(v2)>0
SYMBOL npn 1472 -32 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL voltage -160 64 R0
SYMATTR InstName V2
SYMATTR Value 2
FLAG -160 32 V2
FLAG -160 208 0
FLAG 128 32 VC
FLAG 128 208 0
FLAG 128 368 VB
FLAG 128 544 0
FLAG 1536 128 0
FLAG 1536 -192 VC
FLAG 1312 16 VB
FLAG 1536 -64 Vce
TEXT -176 344 Left 2 !.tran 0 10m 0 1u