Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\d6b5455617bc_E3e.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N004 N005 0 N006 NMOS l=0.18u w=18u
M2 Vout N002 N004 N003 NMOS l=0.36u w=18u
RD N001 Vout 8000
VDD N001 0 3.3
VB N002 0 1.1
VIN N005 0 0.6 AC 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VIN 0 3.3 0.001
;ac dec 10 1 10Meg
.model NMOS NMOS (LEVEL=1 KP=150u VTO=0.5 LAMBDA=0 GAMMA=0 PHI=0.6)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 892 680
WIRE 96 -256 -48 -256
WIRE 96 -128 96 -176
WIRE 96 -96 96 -128
WIRE 48 -16 -48 -16
WIRE 96 -16 96 -48
WIRE 96 32 96 0
WIRE 48 112 -48 112
WIRE 96 112 96 80
FLAG 96 128 0
FLAG -48 64 0
FLAG -48 192 0
FLAG -48 -176 0
FLAG 96 -128 Vout
IOPIN 96 -128 Out
SYMBOL nmos4 48 32 R0
SYMATTR InstName M1
SYMATTR Value2 l=0.18u w=18u
SYMBOL nmos4 48 -96 R0
SYMATTR InstName M2
SYMATTR Value2 l=0.36u w=18u
SYMBOL res 80 -272 R0
SYMATTR InstName RD
SYMATTR Value 8000
SYMBOL voltage -48 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 3.3
SYMBOL voltage -48 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value 1.1
SYMBOL voltage -48 96 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName VIN
SYMATTR Value 0.6
TEXT -88 -384 Left 2 !.dc VIN 0 3.3 0.001
TEXT -88 -360 Left 2 !;ac dec 10 1 10Meg
TEXT -88 -336 Left 2 !.model NMOS NMOS (LEVEL=1 KP=150u VTO=0.5 LAMBDA=0 GAMMA=0 PHI=0.6)
* Z:\home\khalils\Downloads\files\data\raw_asc\4d4f2e108aa5_6078.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6078.asy)
R1 OUT N001 10Meg
R3 N002 IN 10Meg
R5 0 N004 5Meg
V1 V+ 0 2.5
C2 N003 N004 270p
R4 N003 N002 10Meg
C1 N004 IN 270p
XU1 N003 N001 V+ V- OUT LTC6078 ;pnba IN+)IN-)VCC)VEE)OUT
C3 N002 0 540p
V2 V- 0 -2.5
R2 N001 0 10Meg
V3 IN 0 ac 1
.ac oct 1000 1 1K
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 820
WIRE 48 320 16 320
WIRE 144 320 128 320
WIRE 256 320 144 320
WIRE 368 320 336 320
WIRE -480 384 -480 352
WIRE -384 384 -384 352
WIRE 224 384 224 368
WIRE 144 400 144 320
WIRE 192 400 144 400
WIRE 368 416 368 320
WIRE 368 416 256 416
WIRE 400 416 368 416
WIRE -128 432 -240 432
WIRE -112 432 -128 432
WIRE 0 432 -32 432
WIRE 48 432 0 432
WIRE 144 432 128 432
WIRE 192 432 144 432
WIRE 0 448 0 432
WIRE -240 464 -240 432
WIRE 224 464 224 448
WIRE -480 496 -480 464
WIRE -384 496 -384 464
WIRE 0 528 0 512
WIRE -240 560 -240 544
WIRE -128 576 -128 432
WIRE -96 576 -128 576
WIRE 0 576 -32 576
WIRE 48 576 0 576
WIRE 144 576 144 432
WIRE 144 576 112 576
WIRE 0 608 0 576
WIRE 0 704 0 688
SYMBOL res 144 416 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R4
SYMATTR Value 10Meg
SYMBOL LTC6078 224 416 R0
SYMATTR InstName U1
SYMATTR Description Micropower Precision, CMOS Rail-to-Rail Amplifier
SYMBOL res -16 704 M180
WINDOW 0 36 76 Left 0
WINDOW 3 36 40 Left 0
SYMATTR InstName R5
SYMATTR Value 5Meg
SYMBOL voltage -480 368 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL cap -32 560 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C1
SYMATTR Value 270p
SYMBOL cap 112 560 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C2
SYMATTR Value 270p
SYMBOL voltage -384 368 R0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res -16 416 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 10Meg
SYMBOL cap -16 448 R0
SYMATTR InstName C3
SYMATTR Value 540p
SYMBOL res 352 304 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 10Meg
SYMBOL voltage -240 448 R0
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL res 144 304 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 10Meg
FLAG -480 496 0
FLAG -480 352 V+
FLAG -384 496 0
FLAG -384 352 V-
FLAG 224 368 V+
FLAG 224 464 V-
FLAG -240 560 0
FLAG 16 320 0
FLAG 0 704 0
FLAG 0 528 0
FLAG 400 416 OUT
FLAG -240 432 IN
TEXT 216 592 Left 0 !.ac oct  1000 1 1K
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1634L.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1634L.asy)
C1 D 0 36p
V7 VL 0 1.8
V2 -V 0 -5
V3 EN 0 1.8
R1 D 0 301
XU1 IN SA D SB EN VL -V 0 +V ADG1634L ;pnba IN)SA)D)SB)EN)VL)Vss)GND)Vdd
V4 IN 0 PULSE(0 1.8 0 10n 10n 10u 20u)
V5 SA 0 3
V1 +V 0 5
V6 SB 0 -3
.tran 120u
.lib ADG1634L.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -864 -320 -864 -352
WIRE -736 -320 -736 -352
WIRE -1056 -256 -1072 -256
WIRE -928 -256 -976 -256
WIRE -896 -256 -928 -256
WIRE -640 -224 -704 -224
WIRE -560 -224 -640 -224
WIRE -1136 -192 -1168 -192
WIRE -928 -192 -1056 -192
WIRE -896 -192 -928 -192
WIRE -640 -192 -640 -224
WIRE -560 -176 -560 -224
WIRE -1520 -144 -1520 -160
WIRE -1408 -144 -1408 -160
WIRE -1296 -144 -1296 -160
WIRE -928 -128 -1104 -128
WIRE -896 -128 -928 -128
WIRE -640 -96 -640 -112
WIRE -560 -96 -560 -112
WIRE -928 -64 -1024 -64
WIRE -896 -64 -928 -64
WIRE -1520 -48 -1520 -64
WIRE -1408 -48 -1408 -64
WIRE -1296 -48 -1296 -64
WIRE -1104 -48 -1104 -128
WIRE -1024 -48 -1024 -64
WIRE -864 0 -864 -16
WIRE -736 16 -736 -16
WIRE -1104 48 -1104 32
WIRE -1024 48 -1024 32
SYMBOL voltage -1104 -64 M0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PULSE(0 1.8 0 10n 10n 10u 20u)
SYMATTR InstName V4
SYMBOL voltage -1408 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap -576 -176 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -1024 -64 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V3
SYMATTR Value 1.8
SYMBOL voltage -960 -256 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 3
SYMBOL ADG1634L -800 -176 R0
WINDOW 0 5 -143 Bottom 2
SYMATTR InstName U1
SYMBOL voltage -1296 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V7
SYMATTR Value 1.8
SYMBOL voltage -1520 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -1040 -192 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value -3
SYMBOL res -656 -208 R0
SYMATTR InstName R1
SYMATTR Value 301
FLAG -1520 -48 0
FLAG -1408 -48 0
FLAG -1408 -160 +V
FLAG -1520 -160 -V
FLAG -1104 48 0
FLAG -1072 -256 0
FLAG -1168 -192 0
FLAG -736 -352 +V
FLAG -864 0 0
FLAG -736 16 -V
FLAG -1024 48 0
FLAG -640 -96 0
FLAG -560 -96 0
FLAG -1296 -48 0
FLAG -1296 -160 VL
FLAG -864 -352 VL
FLAG -928 -256 SA
FLAG -928 -192 SB
FLAG -928 -128 IN
FLAG -928 -64 EN
FLAG -640 -224 D
TEXT -624 8 Left 2 !.tran 120u
* Z:\home\khalils\Downloads\files\data\raw_asc\0183ffa9370c_pt2.asc
* Generated by LTspice 26.0.1 for Windows.
Vdd vdd 0 5
M1 vd vd 0 0 N_1u l=1.5u w=3u
I1 vdd vd 3.92966e-005
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 -48 176 -80
WIRE 176 80 176 32
WIRE 176 80 128 80
WIRE -32 128 -32 96
WIRE 176 128 176 80
WIRE 208 176 176 176
WIRE 128 208 128 80
WIRE 208 224 208 176
WIRE 208 224 176 224
WIRE -32 256 -32 208
WIRE 176 272 176 224
SYMBOL current 176 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value 3.92966e-005
SYMBOL voltage -32 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vdd
SYMATTR Value 5
SYMBOL nmos4 128 128 R0
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=1.5u w=3u
FLAG 176 272 0
FLAG 176 -80 vdd
FLAG -32 256 0
FLAG -32 96 vdd
FLAG 128 80 vd
TEXT 48 344 Left 2 !.include cmosedu_models.txt
TEXT 48 376 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5695R.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5695R.asy)
I1 0 0 100 AC 1
Vdac1 NC_01 0 1.25
XU1 vDAC Vdd 0 vOUT AD5695R Gain=2 ;pnba Vdac)Vdd)GND)Vout
V1 Vdd 0 5
CLOAD vOUT 0 10n
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
.tran 200u
.lib AD5695R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 272 112 192 112
WIRE 464 112 272 112
WIRE -800 144 -800 112
WIRE 272 160 272 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 100
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL AD5695R -208 112 R0
SYMATTR InstName U1
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3547-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3547-1.asy)
L1 N001 OUT2 4.7
Rload1 OUT1 0 6
V1 IN 0 5
C1 OUT2 0 4.7
Rload2 OUT2 0 4
C2 OUT1 0 4.7
L2 N002 OUT1 4.7
XU1 OUT1 IN IN N002 0 N001 IN OUT2 LTC3547-1 ;pnba FB1)Run1)Vin)SW1)GND)SW2)Run2)FB2
.tran 800u startup
.lib LTC3547-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 700
WIRE 272 48 -240 48
WIRE 352 48 272 48
WIRE 432 48 352 48
WIRE -240 64 -240 48
WIRE 272 80 272 48
WIRE 352 80 352 48
WIRE 432 80 432 48
WIRE 16 144 -128 144
WIRE 96 144 16 144
WIRE 112 144 96 144
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 608 144 592 144
WIRE 672 144 608 144
WIRE 768 144 672 144
WIRE -240 160 -240 144
WIRE -128 160 -128 144
WIRE 16 160 16 144
WIRE 672 160 672 144
WIRE 768 160 768 144
WIRE -128 256 -128 240
WIRE 16 256 16 224
WIRE 672 256 672 224
WIRE 768 256 768 240
WIRE 96 288 96 144
WIRE 208 288 96 288
WIRE 608 288 608 144
WIRE 608 288 496 288
WIRE 352 352 352 336
SYMBOL ind 208 160 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL PowerProducts\\LTC3547-1 352 208 R0
SYMATTR InstName U1
SYMBOL res -144 144 R0
SYMATTR InstName Rload2
SYMATTR Value 4
SYMBOL VOLTAGE -240 48 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL polcap 0 160 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL res 752 144 R0
SYMATTR InstName Rload1
SYMATTR Value 6
SYMBOL polcap 656 160 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 4.7
FLAG -240 160 0
FLAG 352 352 0
FLAG -240 48 IN
FLAG 16 256 0
FLAG -128 256 0
FLAG 672 256 0
FLAG 768 256 0
FLAG 768 144 OUT1
FLAG -128 144 OUT2
TEXT 544 328 Left 2 !.tran 800u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\021270e7ac87_15-logarithmic.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
;.dc V3 0.05 5 0.1
V2 0 vee +18
RIN N001 in 1k
D1 N001 out 1N4148
V3 in 0 PWL(0 0.05 1m 5)
V1 vcc 0 +18
XU1 0 N001 vcc vee out LT1001 ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -64 128 -64
WIRE 288 -64 224 -64
WIRE -128 16 -128 -16
WIRE 192 48 192 32
WIRE 0 64 -16 64
WIRE 16 64 0 64
WIRE 128 64 128 -64
WIRE 128 64 96 64
WIRE 160 64 128 64
WIRE 288 80 288 -64
WIRE 288 80 224 80
WIRE 336 80 288 80
WIRE 352 80 336 80
WIRE 160 96 144 96
WIRE -128 112 -128 96
WIRE -128 112 -192 112
WIRE -16 112 -16 64
WIRE -128 128 -128 112
WIRE 144 128 144 96
WIRE 192 128 192 112
WIRE -192 144 -192 112
WIRE -16 224 -16 192
WIRE -128 240 -128 208
SYMBOL voltage -128 0 R0
WINDOW 3 24 85 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value +18
SYMATTR InstName V1
SYMBOL voltage -16 96 R0
WINDOW 0 43 66 Left 2
WINDOW 3 20 91 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PWL(0 0.05 1m 5)
SYMBOL OpAmps\\OP07 192 16 R0
SYMATTR InstName U1
SYMBOL diode 160 -48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage -128 112 R0
WINDOW 3 19 88 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value +18
SYMATTR InstName V2
SYMBOL res 112 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RIN
SYMATTR Value 1k
FLAG -192 144 0
FLAG -128 -16 vcc
FLAG -128 240 vee
FLAG -16 224 0
FLAG 0 64 in
FLAG 192 128 vee
FLAG 192 32 vcc
FLAG 336 80 out
FLAG 144 128 0
TEXT 16 272 Left 2 !;.dc V3 0.05 5 0.1
TEXT 16 304 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\8cf32c8bc78a_XtalTest_1Mhz_Osc.asc
* Generated by LTspice 26.0.1 for Windows.
* 1MHz Crystal Oscillator
* Unbuffered Gate
* NOTE: for ac loop gain is V(4)/V(1)
CX1 3 2 .0127pF Lser=2H Rser=200 Cpar=4pF
Ri i 3 100
R1 2 1 3k3
C3 3 0 10p
V1 4 1 AC 1
C2 2 0 100p
Bo 0 4 I=limit(30*(2.5-V(i)),0,5) Rpar=1 tripdt=1n
R2 4 3 3.3Meg
Di 0 i Clamp
I2 2 3 PULSE(0 23 100n 10n 10n 10n 1u 1)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 10m 100u 10n
.model Clamp D(Vfwd=.5 Vrev=5.5)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1656 1100
WIRE 528 304 576 304
WIRE 320 304 384 304
WIRE 608 304 608 336
WIRE 608 400 608 416
WIRE 384 336 384 304
WIRE 384 304 416 304
WIRE 208 304 240 304
WIRE 576 304 608 304
WIRE 176 304 208 304
WIRE 928 416 928 400
WIRE 800 304 832 304
WIRE 848 304 848 336
WIRE 848 400 848 416
WIRE 928 208 928 320
WIRE 832 304 848 304
WIRE 384 208 384 304
WIRE 544 208 608 208
WIRE 608 208 608 304
WIRE 416 304 464 304
WIRE 464 208 384 208
WIRE 672 208 672 304
WIRE 672 304 720 304
WIRE 928 208 848 208
WIRE 768 208 672 208
WIRE 176 304 176 240
WIRE 176 96 208 96
WIRE 928 96 928 208
WIRE 384 416 384 400
WIRE 608 304 672 304
WIRE 176 160 176 96
WIRE 208 96 928 96
SYMBOL bi 928 400 M180
WINDOW 0 39 48 Left 0
WINDOW 3 40 24 Left 0
WINDOW 123 40 0 Left 0
SYMATTR InstName Bo
SYMATTR Value I=limit(30*(2.5-V(i)),0,5)
SYMATTR Value2 Rpar=1 tripdt=1n
SYMBOL voltage 176 144 R0
WINDOW 0 40 48 Left 0
WINDOW 3 40 71 Left 0
WINDOW 123 40 72 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL res 336 288 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 3k3
SYMBOL res 816 288 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName Ri
SYMATTR Value 100
SYMBOL current 464 208 M90
WINDOW 0 -32 32 VBottom 0
WINDOW 3 -56 32 VBottom 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I2
SYMATTR Value PULSE(0 23 100n 10n 10n 10n 1u 1)
SYMBOL zener 864 400 R180
WINDOW 0 40 48 Left 0
WINDOW 3 40 16 Left 0
SYMATTR InstName Di
SYMATTR Value Clamp
SYMBOL Misc\\xtal 528 288 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
WINDOW 39 80 32 VTop 0
WINDOW 123 56 32 VTop 0
WINDOW 40 104 32 VTop 0
SYMATTR InstName X1
SYMATTR Value .0127pF
SYMATTR SpiceLine Rser=200
SYMATTR Value2 Lser=2H
SYMATTR SpiceLine2 Cpar=4pF
SYMBOL cap 400 336 M0
WINDOW 0 32 16 Left 0
WINDOW 3 32 48 Left 0
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL cap 592 336 R0
WINDOW 0 32 16 Left 0
WINDOW 3 32 48 Left 0
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL res 864 192 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 3.3Meg
FLAG 384 416 0
FLAG 608 416 0
FLAG 208 304 1
FLAG 416 304 2
FLAG 576 304 3
FLAG 928 416 0
FLAG 848 416 0
FLAG 832 304 i
FLAG 208 96 4
TEXT 128 464 Left 0 !.tran 0 10m 100u 10n
TEXT 128 496 Left 0 !.ac lin 1000 990k 1010k
TEXT 848 464 Center 0 !.model Clamp D(Vfwd=.5 Vrev=5.5)
TEXT 560 16 Center 0 ;1MHz Crystal Oscillator
TEXT 976 288 Left 0 ;Unbuffered Gate
TEXT 560 64 Center 0 ;NOTE: for ac loop gain is V(4)/V(1)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG6412.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input\nOnly one channel included\nCrosstalk parameter not included
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG6412.asy)
R1 vD 0 301
V4 vIN 0 pulse(0 5 0 20n 20n 10u 20u)
V1 +V 0 20
C1 vD 0 36p
V3 vS 0 14
V2 -V 0 -20
XU1 vIN vD vS -V 0 +V ADG6412 ;pnba IN)D)S)Vss)GND)Vdd
.tran 75u
.lib ADG6412.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 80 224 48
WIRE -208 144 -208 128
WIRE -48 160 -80 160
WIRE 96 160 32 160
WIRE 128 160 96 160
WIRE 352 160 320 160
WIRE 400 160 352 160
WIRE 496 160 400 160
WIRE 400 192 400 160
WIRE 496 208 496 160
WIRE 96 224 -16 224
WIRE 128 224 96 224
WIRE -208 240 -208 224
WIRE 400 288 400 272
WIRE 496 288 496 272
WIRE -208 336 -208 320
WIRE -16 336 -16 224
WIRE 288 352 288 336
WIRE 160 368 160 336
WIRE -208 432 -208 416
WIRE -16 480 -16 416
SYMBOL voltage -208 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 20
SYMBOL voltage -16 320 R0
WINDOW 3 19 116 Left 2
SYMATTR Value pulse(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V4
SYMBOL cap 480 208 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -208 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -20
SYMBOL voltage 48 160 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 14
SYMBOL res 384 176 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL ADG6412 224 208 R0
SYMATTR InstName U1
FLAG -208 432 0
FLAG -208 240 0
FLAG -208 128 +V
FLAG -208 320 -V
FLAG -80 160 0
FLAG -16 480 0
FLAG 400 288 0
FLAG 496 288 0
FLAG 224 48 +V
FLAG 160 368 -V
FLAG 288 352 0
FLAG 96 160 vS
FLAG 352 160 vD
FLAG 96 224 vIN
TEXT 8 464 Left 2 !.tran 75u
TEXT -224 -56 Left 2 ;Note:\nSwitch shown for a logic 0 input\nOnly one channel included\nCrosstalk parameter not included
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6658.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 IN IN IN IN N001 OUT1 OUT1 OUT2 OUT2 0 N002 LT6658-2.5 ;pnba Vin)Vin1)Vin2)_OD)Bypass)Vout1_F)Vout1_S)Vout2_F)Vout2_S)Gnd)NR
C1 N001 0 1
C2 OUT1 0 10
V3 IN 0 5
I1 OUT1 0 PULSE(10m 150m 100u 5n 5n 200u 1)
C3 N002 0 .1
C4 OUT2 0 10
.tran 500u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6658.asy)
.lib LT6658.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1464 1048
WIRE 16 -32 -64 -32
WIRE 128 -32 16 -32
WIRE 224 -32 128 -32
WIRE 320 -32 224 -32
WIRE -64 -16 -64 -32
WIRE 128 0 128 -32
WIRE 224 0 224 -32
WIRE 320 0 320 -32
WIRE 448 64 416 64
WIRE 528 64 448 64
WIRE -64 80 -64 64
WIRE 528 80 528 64
WIRE 448 144 448 64
WIRE 448 144 416 144
WIRE 528 160 528 144
WIRE 16 192 16 -32
WIRE 48 192 16 192
WIRE 448 224 416 224
WIRE 528 224 448 224
WIRE 528 240 528 224
WIRE 448 304 448 224
WIRE 448 304 416 304
WIRE 448 320 448 304
WIRE 528 336 528 320
WIRE 224 400 224 384
WIRE 320 400 320 384
WIRE 448 400 448 384
WIRE 128 416 128 384
WIRE 224 480 224 464
WIRE 320 480 320 464
FLAG 128 416 0
FLAG 224 480 0
FLAG 448 400 0
FLAG -64 80 0
FLAG 528 336 0
FLAG 320 480 0
FLAG 528 160 0
FLAG -64 -32 IN
FLAG 528 64 OUT2
FLAG 528 224 OUT1
SYMBOL LT6658 224 192 R0
SYMATTR InstName U1
SYMBOL cap 208 400 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 432 320 R0
WINDOW 39 24 84 Left 2
WINDOW 40 24 112 Left 2
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL voltage -64 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL current 528 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value PULSE(10m 150m 100u 5n 5n 200u 1)
SYMBOL cap 304 400 R0
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL cap 512 80 R0
WINDOW 39 24 84 Left 2
WINDOW 40 24 112 Left 2
SYMATTR InstName C4
SYMATTR Value 10
TEXT 648 496 Left 2 !.tran 500u
* Z:\home\khalils\Downloads\files\data\raw_asc\waveout.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
V3 B 0 SIN(0 1 455)
B1 SYN 0 V=2*V(a)*V(b)*V(c)
V2 A 0 SINE(0 .4 20 10m)
V4 C 0 PWL(0 0 10m 0 11m 1 440m 1 480m 0)
.tran .5
.wave .\ring.wav 8 11025 V(syn) ; This means save node V(syn) as a .wav file, 8 bit resolution, 11025 samples per second
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2680 864
WIRE 1008 560 1008 512
WIRE 1360 560 1360 512
WIRE 1664 560 1664 512
WIRE 2368 560 2368 512
WIRE 1008 688 1008 640
WIRE 1360 688 1360 640
WIRE 1664 688 1664 640
WIRE 2368 688 2368 640
SYMBOL voltage 1360 544 R0
SYMATTR InstName V3
SYMATTR Value SIN(0 1 455)
SYMBOL VOLTAGE 1008 544 R0
WINDOW 39 0 0 Left 2
WINDOW 123 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 .4 20 10m)
SYMBOL BV 2368 544 R0
SYMATTR InstName B1
SYMATTR Value V=2*V(a)*V(b)*V(c)
SYMBOL voltage 1664 544 R0
WINDOW 39 24 117 Left 2
WINDOW 123 24 138 Left 2
SYMATTR InstName V4
SYMATTR Value PWL(0 0 10m 0 11m 1 440m 1 480m 0)
FLAG 1008 688 0
FLAG 1360 688 0
FLAG 1008 512 A
FLAG 1360 512 B
FLAG 2368 688 0
FLAG 1664 688 0
FLAG 1664 512 C
FLAG 2368 512 SYN
TEXT 992 744 Left 2 !.tran .5
TEXT 960 784 Left 2 !.wave .\\ring.wav 8 11025 V(syn) ; This means save node V(syn) as a .wav file, 8 bit resolution, 11025 samples per second
TEXT 1680 840 Top 1 ;This example schematic is supplied for informational/educational purposes only.