* Z:\home\khalils\Downloads\files\data\raw_asc\2d3ec290743f_nmos65_trial.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vds G 0 0 NMOS l={L} w={W} ad='2*65n*{W}' as='2*65n*{W}' pd='2*(2*65n+{W})' ps='2*(2*65n+{W})' m={M}
V3 G 0 1
V1 0 N002 1.1
R1 N003 N002 20k
R2 N001 N003 10k
V2 0 V_low 5
V4 V_high 0 5
XU1 0 N003 V_high V_low N001 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
XU2 N001 Vds V_high V_low Vds level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.PARAM L=65n W=1u M=1
.include 65nm_NMOS_bulk.pm
.dc V3 0 2 0.001
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1892 680
WIRE 1792 80 1792 64
WIRE 160 112 160 96
WIRE 1504 112 1504 48
WIRE 1200 128 1200 64
WIRE 1472 128 1296 128
WIRE 160 144 160 112
WIRE 1120 144 1120 96
WIRE 1168 144 1120 144
WIRE 1584 144 1536 144
WIRE 1296 160 1296 128
WIRE 1296 160 1232 160
WIRE 1472 160 1424 160
WIRE 1024 176 960 176
WIRE 1120 176 1104 176
WIRE 1168 176 1120 176
WIRE 1792 176 1792 160
WIRE 1872 176 1792 176
WIRE 240 192 160 192
WIRE 1792 192 1792 176
WIRE 960 208 960 176
WIRE 1424 208 1424 160
WIRE 1584 208 1584 144
WIRE 1584 208 1424 208
WIRE 32 224 16 224
WIRE 112 224 32 224
WIRE 1120 256 1120 176
WIRE 1184 256 1120 256
WIRE 1296 256 1296 160
WIRE 1296 256 1264 256
WIRE 160 272 160 240
WIRE 208 272 160 272
WIRE 240 272 240 192
WIRE 240 272 208 272
WIRE 160 288 160 272
WIRE 1504 304 1504 176
WIRE 1200 320 1200 192
WIRE 1792 320 1792 272
FLAG 16 224 G
IOPIN 16 224 BiDir
FLAG 160 96 D
IOPIN 160 96 BiDir
FLAG 160 288 S
IOPIN 160 288 BiDir
FLAG 240 192 B
IOPIN 240 192 BiDir
FLAG 32 304 0
FLAG 208 272 0
FLAG 160 112 Vds
IOPIN 160 112 In
FLAG 1120 96 0
FLAG 960 288 0
FLAG 1872 176 0
FLAG 1792 64 V_low
IOPIN 1792 64 In
FLAG 1792 320 V_high
IOPIN 1792 320 In
FLAG 1200 64 V_low
IOPIN 1200 64 In
FLAG 1504 48 V_low
IOPIN 1504 48 In
FLAG 1504 304 V_high
IOPIN 1504 304 In
FLAG 1200 320 V_high
IOPIN 1200 320 In
FLAG 1584 144 Vds
IOPIN 1584 144 In
SYMBOL nmos4 112 144 R0
SYMATTR InstName M1
SYMATTR Value2 l={L} w={W} ad='2*65n*{W}' as='2*65n*{W}' pd='2*(2*65n+{W})' ps='2*(2*65n+{W})' m={M}
SYMBOL voltage 32 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 1
SYMBOL voltage 960 304 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.1
SYMBOL res 1120 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20k
SYMBOL res 1280 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 1792 176 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 1792 288 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL Opamps\\UniversalOpamp2 1200 160 M180
SYMATTR InstName U1
SYMBOL Opamps\\UniversalOpamp2 1504 144 M180
SYMATTR InstName U2
TEXT 88 352 Left 2 !.PARAM L=65n W=1u M=1
TEXT 88 384 Left 2 !.include 65nm_NMOS_bulk.pm
TEXT 88 416 Left 2 !.dc V3 0 2 0.001