Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0583cf9b0028_8062.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8062.asy)
XU1 IN IN IN NC_01 NC_02 0 N001 NC_03 OUT MP_04 OUT IN 0 LTM8062 ;pnba Vin)Vin_reg)Run)_CHRG)_Fault)Timer)ADJ)NTC)BAT))Bias)VinA)GND
R1 OUT N001 274K
C1 OUT 0 .1m
V1 IN 0 12
R2 N001 0 2.87Meg
.tran 2m startup
.lib LTM8062.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 912 680
WIRE 64 -64 -32 -64
WIRE 80 -64 64 -64
WIRE -32 -48 -32 -64
WIRE 64 32 64 -64
WIRE 80 32 64 32
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 80 128 64 128
WIRE 432 128 368 128
WIRE 496 128 432 128
WIRE 496 144 496 128
WIRE 64 224 64 128
WIRE 80 224 64 224
WIRE 432 224 432 128
WIRE 432 224 368 224
WIRE 496 224 496 208
WIRE 432 272 432 224
WIRE 80 320 64 320
WIRE 80 416 64 416
WIRE 432 416 432 352
WIRE 432 416 368 416
WIRE 432 432 432 416
WIRE 432 528 432 512
SYMBOL cap 480 144 R0
SYMATTR InstName C1
SYMATTR Value .1m
SYMBOL PowerProducts\\LTM8062 224 176 R0
SYMATTR InstName U1
SYMBOL res 416 256 R0
SYMATTR InstName R1
SYMATTR Value 274K
SYMBOL res 416 416 R0
SYMATTR InstName R2
SYMATTR Value 2.87Meg
SYMBOL voltage -32 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 64 416 0
FLAG -32 48 0
FLAG 496 224 0
FLAG -32 -64 IN
FLAG 496 128 OUT
FLAG 64 320 0
FLAG 432 528 0
TEXT 584 416 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\11ac91057193_Regulator_UsingZener..asc
* Generated by LTspice 26.0.1 for Windows.
* Raw voltage regulator with zener diode.
* The zener diode regulates the voltage by working in the breakdown region.\nR1 limits the current from the source.\n \nSizing: the load voltage is the nominal zener voltage 4.7V.\nThen IR_2 = 4.7/R2\n \nFrom the datasheet the zener current is found. R1 must be equal to:\n \nR1 = (V1 - Vz)/(Iz + IR_2) = (12 - 4.7)/(20mA + 10mA)
R1 N001 N002 242
R2 N002 0 470
D1 0 N002 1N750
V1 N001 0 12
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1392 680
WIRE 112 112 -16 112
WIRE -16 144 -16 112
WIRE 112 144 112 112
WIRE 112 256 112 224
WIRE 224 256 112 256
WIRE 112 272 112 256
WIRE 224 288 224 256
WIRE 112 400 112 336
WIRE 224 400 224 368
SYMBOL res 96 128 R0
SYMATTR InstName R1
SYMATTR Value 242
SYMBOL res 208 272 R0
SYMATTR InstName R2
SYMATTR Value 470
SYMBOL zener 128 336 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N750
SYMBOL voltage -16 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
FLAG -16 224 0
FLAG 112 400 0
FLAG 224 400 0
TEXT 160 -32 Left 4 ;Raw voltage regulator with zener diode.
TEXT 352 136 Left 2 ;The zener diode regulates the voltage by working in the breakdown region.\nR1 limits the current from the source.\n \nSizing: the load voltage is the nominal zener voltage 4.7V.\nThen IR_2 = 4.7/R2\n \nFrom the datasheet the zener current is found. R1 must be equal to:\n \nR1 = (V1 - Vz)/(Iz + IR_2) = (12 - 4.7)/(20mA + 10mA)
TEXT -48 424 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3405A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3405A.asy)
C2 OUT N002 20p
C1 OUT 0 22
R2 N002 0 280K
R1 OUT N002 887K
V1 IN 0 5
Rload OUT 0 10
XU1 IN 0 N001 IN N002 0 LTC3405A ;pnba Run)GND)SW)Vin)FB)Mode
L1 N001 OUT 4.7
.tran 1m startup
.lib LTC3405A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1072 724
WIRE 192 64 80 64
WIRE 352 64 192 64
WIRE 80 80 80 64
WIRE 352 80 352 64
WIRE 192 144 192 64
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 624 144 592 144
WIRE 720 144 624 144
WIRE 832 144 720 144
WIRE 944 144 832 144
WIRE 832 160 832 144
WIRE 944 160 944 144
WIRE 80 176 80 160
WIRE 624 192 624 144
WIRE 720 192 720 144
WIRE 832 256 832 224
WIRE 944 256 944 240
WIRE 208 304 192 304
WIRE 624 304 624 256
WIRE 624 304 496 304
WIRE 720 304 720 272
WIRE 720 304 624 304
WIRE 720 320 720 304
WIRE 352 384 352 368
WIRE 720 416 720 400
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL polcap 816 160 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL cap 608 192 R0
SYMATTR InstName C2
SYMATTR Value 20p
SYMBOL PowerProducts\\LTC3405A 352 224 R0
SYMATTR InstName U1
SYMBOL res 928 144 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL res 704 304 R0
SYMATTR InstName R2
SYMATTR Value 280K
SYMBOL VOLTAGE 80 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 704 176 R0
SYMATTR InstName R1
SYMATTR Value 887K
FLAG 80 176 0
FLAG 352 384 0
FLAG 832 256 0
FLAG 720 416 0
FLAG 944 256 0
FLAG 944 144 OUT
FLAG 192 304 0
FLAG 80 64 IN
TEXT 880 432 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG636.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG636.asy)
V2 -V 0 -5
R1 SA 0 1K
XU1 IN SA D SB -V 0 +V N001 ADG636 ;pnba IN)SA)D)SB)Vss)GND)Vdd)EN
V1 +V 0 5
V4 IN 0 pulse(0 3.3 0 1u 1u 5m 10m)
R2 SB 0 1K
V3 N001 0 3.3
V5 D 0 SINE(0 4 2k)
.tran 30m
.lib ADG636.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -752 -368 -800 -368
WIRE -800 -320 -800 -368
WIRE -1216 -256 -1216 -272
WIRE -1088 -256 -1104 -256
WIRE -928 -256 -1008 -256
WIRE -896 -256 -928 -256
WIRE -688 -224 -704 -224
WIRE -656 -224 -688 -224
WIRE -544 -224 -576 -224
WIRE -1040 -192 -1104 -192
WIRE -928 -192 -960 -192
WIRE -896 -192 -928 -192
WIRE -1216 -160 -1216 -176
WIRE -896 -128 -1072 -128
WIRE -640 -128 -704 -128
WIRE -640 -112 -640 -128
WIRE -1216 -48 -1216 -64
WIRE -1072 -16 -1072 -128
WIRE -736 0 -736 -16
WIRE -640 0 -640 -32
WIRE -864 16 -864 -16
WIRE -832 16 -864 16
WIRE -1216 48 -1216 32
WIRE -1072 80 -1072 64
SYMBOL voltage -672 -224 R270
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 47 41 VRight 2
WINDOW 3 -46 -22 VRight 2
SYMATTR InstName V5
SYMATTR Value SINE(0 4 2k)
SYMBOL ADG636 -800 -176 R0
SYMATTR InstName U1
SYMBOL res -944 -176 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -640 -128 R0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL res -992 -240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -1216 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -1072 -32 R0
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMBOL voltage -1216 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
FLAG -1216 48 0
FLAG -1216 -160 0
FLAG -1216 -272 +V
FLAG -1216 -64 -V
FLAG -544 -224 0
FLAG -1072 80 0
FLAG -1104 -256 0
FLAG -1104 -192 0
FLAG -752 -368 +V
FLAG -736 0 0
FLAG -832 16 -V
FLAG -640 0 0
FLAG -928 -256 SA
FLAG -928 -192 SB
FLAG -688 -224 D
FLAG -1072 -128 IN
TEXT -664 64 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\0911f24df3f1_TimeDependentResistor3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
RLOAD N002 0 5
RNTC N002 N001 R=(20/(time/1m))+0.5
.tran 30m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 0 144 -48 144
WIRE 272 144 80 144
WIRE 272 192 272 144
WIRE -48 208 -48 144
WIRE -48 336 -48 288
WIRE 272 336 272 272
WIRE 272 336 -48 336
WIRE -48 384 -48 336
FLAG -48 384 0
SYMBOL voltage -48 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 256 176 R0
SYMATTR InstName LOAD
SYMATTR Value 5
SYMBOL res 96 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 -56 -4 VTop 2
SYMATTR InstName NTC
SYMATTR Value R=(20/(time/1m))+0.5
TEXT 48 384 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1963-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1963-2.5.asy)
Rload OUT 0 1K
V1 IN 0 PWL(0 0 1 10)
XU1 IN IN 0 OUT OUT LT1963-2.5 ;pnba _SHDN)IN)GND)OUT)SENSE
C1 OUT 0 10 Rser=50m
.tran 1
.lib LT1963.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 48 -208 48
WIRE 32 48 16 48
WIRE 352 48 320 48
WIRE 400 48 352 48
WIRE 560 48 400 48
WIRE -208 64 -208 48
WIRE 400 64 400 48
WIRE 560 64 560 48
WIRE 16 144 16 48
WIRE 32 144 16 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 400 160 400 128
WIRE 560 160 560 144
WIRE 176 240 176 208
SYMBOL res 544 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 384 64 R0
WINDOW 3 40 33 Left 2
WINDOW 39 24 59 Left 2
SYMATTR Value 10
SYMATTR SpiceLine Rser=50m
SYMATTR InstName C1
SYMBOL PowerProducts\\LT1963-2.5 176 96 R0
SYMATTR InstName U1
FLAG -208 160 0
FLAG 400 160 0
FLAG 560 160 0
FLAG 176 240 0
FLAG 560 48 OUT
FLAG -208 48 IN
TEXT 368 208 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\03e42dc53998_Out_Rect.asc
* Generated by LTspice 26.0.1 for Windows.
B1 Vb 0 V=.6*{vpeak-2*vf}-.4244*{vpeak-2*vf}*cos (628.31853*time)
Vac N001 N002 SINE(0 {vpeak} 50)
D1 0 N001 MURS120
D2 0 N002 MURS120
D3 N001 Vrect MURS120
D4 N002 Vrect MURS120
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1
.param vpeak 100
.param vf 0.7
* V=.6366*{vpeak-2*vf}-.4244*{vpeak-2*vf}*cos (628.31853*time)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 916 680
WIRE -224 64 -320 64
WIRE -192 64 -224 64
WIRE -112 64 -128 64
WIRE -320 96 -320 64
WIRE 160 96 112 96
WIRE 112 112 112 96
WIRE -224 128 -224 64
WIRE -192 128 -224 128
WIRE -96 128 -128 128
WIRE -80 128 -96 128
WIRE -192 208 -224 208
WIRE -112 208 -112 64
WIRE -112 208 -128 208
WIRE 112 208 112 192
WIRE 112 208 -112 208
WIRE -320 272 -320 176
WIRE -224 272 -224 208
WIRE -224 272 -320 272
WIRE -192 272 -224 272
WIRE -96 272 -96 128
WIRE -96 272 -128 272
WIRE 112 272 112 208
FLAG 112 272 0
FLAG -80 128 Vrect
FLAG 160 96 Vb
SYMBOL bv 112 96 R0
WINDOW 3 34 41 Left 0
SYMATTR InstName B1
SYMATTR Value V=.6*{vpeak-2*vf}-.4244*{vpeak-2*vf}*cos (628.31853*time)
SYMBOL voltage -320 80 R0
WINDOW 0 7 9 Left 0
WINDOW 3 69 -18 VRight 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vac
SYMATTR Value SINE(0 {vpeak} 50)
SYMBOL diode -128 48 R90
WINDOW 0 17 73 VBottom 0
WINDOW 3 32 32 Invisible 0
SYMATTR InstName D1
SYMATTR Value MURS120
SYMBOL diode -128 192 R90
WINDOW 0 16 69 VBottom 0
WINDOW 3 32 32 Invisible 0
SYMATTR InstName D2
SYMATTR Value MURS120
SYMBOL diode -192 112 M90
WINDOW 0 16 -9 VBottom 0
WINDOW 3 32 32 Invisible 0
SYMATTR InstName D3
SYMATTR Value MURS120
SYMBOL diode -192 256 M90
WINDOW 0 16 -6 VBottom 0
WINDOW 3 32 32 Invisible 0
SYMATTR InstName D4
SYMATTR Value MURS120
TEXT 136 216 Left 0 !.tran 1
TEXT 136 248 Left 0 !.param vpeak 100\n.param vf 0.7
TEXT 104 64 Left 0 ;V=.6366*{vpeak-2*vf}-.4244*{vpeak-2*vf}*cos (628.31853*time)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7118.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7118.asy)
C1 OUT 0 2.2 Rser=3m
Rload OUT 0 22
R2 N002 0 10K
R1 OUT N002 17.4k
V1 IN 0 4.3
XU1 IN N002 IN N001 OUT 0 ADP7118 Vref=1.2 ;pnba Vin)ADJ)EN)SS)Vout)GND
C2 N001 0 4.7n
.tran 6m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 400 32 352 32
WIRE 528 32 400 32
WIRE 624 32 528 32
WIRE -32 48 -32 32
WIRE 528 48 528 32
WIRE 624 48 624 32
WIRE 400 80 400 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 528 144 528 112
WIRE 624 144 624 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 400 224 400 160
WIRE 400 224 352 224
WIRE 400 240 400 224
WIRE 224 304 224 288
WIRE 400 336 400 320
SYMBOL res 384 224 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 608 32 R0
SYMATTR InstName Rload
SYMATTR Value 22
SYMBOL res 384 64 R0
SYMATTR InstName R1
SYMATTR Value 17.4k
SYMBOL ADP7118 224 128 R0
SYMATTR InstName U1
SYMBOL cap 512 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=3m
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.3
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG -32 32 IN
FLAG 624 144 0
FLAG 528 144 0
FLAG 624 32 OUT
FLAG 400 336 0
TEXT 520 272 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\71ff928fae1f_rectifier_halfwave_DCtransfer.asc
* Generated by LTspice 26.0.1 for Windows.
D1 IN OUT 1N4148
V1 IN 0 5
R1 OUT 0 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -5 5 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 956
WIRE 112 464 96 464
WIRE 208 464 112 464
WIRE 352 464 272 464
WIRE 368 464 352 464
WIRE 96 496 96 464
WIRE 368 496 368 464
WIRE 96 608 96 576
WIRE 368 608 368 576
WIRE 368 608 96 608
WIRE 96 640 96 608
FLAG 96 640 0
FLAG 112 464 IN
FLAG 352 464 OUT
SYMBOL diode 208 480 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 96 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 352 480 R0
SYMATTR InstName R1
SYMATTR Value 100
TEXT 112 696 Left 2 !.dc V1 -5 5 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6656-4.096.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6656-4.096.asy)
XU1 0 N001 N002 LT6656-4.096 ;pnba GND)IN)OUT
C1 N002 0 1
V1 N001 0 PWL(0 0 1m 0 +100n 4.6)
.tran 50m
.lib LT6656.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 836
WIRE 96 160 -176 160
WIRE 480 160 320 160
WIRE -176 176 -176 160
WIRE 480 176 480 160
WIRE 208 256 208 224
WIRE 480 256 480 240
WIRE -176 272 -176 256
SYMBOL cap 464 176 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL LT6656-4.096 208 160 R0
SYMATTR InstName U1
SYMBOL voltage -176 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1m 0 +100n 4.6)
FLAG 480 256 0
FLAG 208 256 0
FLAG -176 272 0
TEXT 400 312 Left 2 !.tran 50m
* Z:\home\khalils\Downloads\files\data\raw_asc\4efd76086f8b_Fig23_4.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot VREF
M6B VREF VREF 0 0 N_1u l=2u w=10u
VDD VDD 0 5
R1 VDD VREF 1Meg TC1=0.002
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.dc VDD 4 6
.step temp 0 100 25
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1784 680
WIRE 1376 -96 1376 -160
WIRE 1104 -32 1104 -64
WIRE 1104 -16 1104 -32
WIRE 1376 0 1376 -16
WIRE 1488 0 1376 0
WIRE 1376 16 1376 0
WIRE 1376 16 1312 16
WIRE 1376 32 1376 16
WIRE 1312 112 1312 16
WIRE 1328 112 1312 112
WIRE 1376 160 1376 128
SYMBOL res 1360 -112 R0
SYMATTR InstName R1
SYMATTR Value 1MEG TC1=0.002
SYMBOL voltage 1104 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL nmos4 1328 32 R0
WINDOW 123 56 100 Left 0
WINDOW 0 69 31 Left 0
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M6B
SYMATTR Value N_1u
FLAG 1104 64 0
FLAG 1104 -32 VDD
FLAG 1376 80 0
FLAG 1376 160 0
FLAG 1376 -160 VDD
FLAG 1488 0 VREF
TEXT 1016 136 Left 0 !.include cmosedu_models.txt
TEXT 1160 -152 Left 0 ;Plot VREF
TEXT 1016 112 Left 0 !.dc VDD 4 6
TEXT 1016 160 Left 0 !.step temp 0 100 25
* Z:\tmp\asc_dec_bjh7r6w2\099093289287_xor_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M12 N003 B` 0 0 NMOS
M7 Y B` N001 N001 PMOS
M8 Y A` N001 N001 PMOS
M9 Y A N002 N002 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 -64 224 -64
WIRE 384 -64 304 -64
WIRE 256 0 224 0
WIRE 304 0 304 -64
WIRE 304 0 256 0
WIRE 352 0 304 0
WIRE 384 0 352 0
WIRE 256 48 256 0
WIRE 256 48 224 48
WIRE 352 48 352 0
WIRE 384 48 352 48
WIRE 304 96 224 96
WIRE 384 96 304 96
WIRE 304 144 304 96
WIRE 528 144 304 144
WIRE 304 192 304 144
WIRE 304 192 192 192
WIRE 416 192 304 192
WIRE 224 240 192 240
WIRE 416 240 368 240
WIRE 224 288 224 240
WIRE 224 288 192 288
WIRE 368 288 368 240
WIRE 416 288 368 288
WIRE 224 336 192 336
WIRE 416 336 384 336
WIRE 224 384 224 336
WIRE 224 384 192 384
WIRE 304 384 224 384
WIRE 384 384 384 336
WIRE 384 384 304 384
WIRE 416 384 384 384
WIRE 304 416 304 384
SYMBOL nmos4 464 288 M0
SYMATTR InstName M12
SYMBOL pmos4 432 96 R180
SYMATTR InstName M7
SYMBOL pmos4 176 96 M180
SYMATTR InstName M8
SYMBOL nmos4 144 192 R0
SYMATTR InstName M9
FLAG 528 144 Y
FLAG 144 368 B
FLAG 176 16 A`
FLAG 464 272 A`
FLAG 432 16 B`
FLAG 464 368 B`
FLAG 144 272 A
FLAG 304 416 gnd
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3313.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3313.asy)
XU1 IN IN N002 N004 0 0 N007 N001 IN N006 N003 LTC3313 ;pnba Vin)EN)SW)FB)Agnd)Pgnd)Rt)Pgood)Mode/Sync)Ith)SSTT
Rload OUT 0 0.15
C3 N005 0 330p
R4 N006 N005 4.99k
C2 N003 0 3.3n
R3 OUT N001 500K
C5 OUT N004 47p
L1 N002 OUT 80n Rser=2m
R1 OUT N004 140k
V1 IN 0 3.3
C1 OUT 0 47 x2
R5 N007 0 274k
R2 N004 0 100k
.tran .4m startup
.lib LTC3313.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2648 1864
WIRE 1536 1248 1376 1248
WIRE 1712 1248 1536 1248
WIRE 1376 1264 1376 1248
WIRE 1712 1280 1712 1248
WIRE 1536 1328 1536 1248
WIRE 1552 1328 1536 1328
WIRE 1904 1328 1872 1328
WIRE 2016 1328 1984 1328
WIRE 1376 1360 1376 1344
WIRE 1536 1424 1536 1328
WIRE 1552 1424 1536 1424
WIRE 1904 1424 1872 1424
WIRE 2016 1424 2016 1328
WIRE 2016 1424 1984 1424
WIRE 2144 1424 2016 1424
WIRE 2240 1424 2144 1424
WIRE 2352 1424 2240 1424
WIRE 2144 1440 2144 1424
WIRE 2240 1440 2240 1424
WIRE 2352 1440 2352 1424
WIRE 1472 1520 1456 1520
WIRE 1552 1520 1536 1520
WIRE 2016 1520 2016 1504
WIRE 2016 1520 1872 1520
WIRE 2144 1520 2144 1504
WIRE 2144 1520 2016 1520
WIRE 2016 1536 2016 1520
WIRE 2240 1536 2240 1504
WIRE 2352 1536 2352 1520
WIRE 1424 1616 1360 1616
WIRE 1552 1616 1504 1616
WIRE 1904 1616 1872 1616
WIRE 1360 1632 1360 1616
WIRE 1904 1632 1904 1616
WIRE 2016 1632 2016 1616
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
WIRE 1360 1712 1360 1696
WIRE 1904 1728 1904 1712
SYMBOL cap 2224 1440 R0
WINDOW 123 24 77 Left 2
SYMATTR Value2 x2
SYMATTR InstName C1
SYMATTR Value 47
SYMBOL cap 2128 1440 R0
SYMATTR InstName C5
SYMATTR Value 47p
SYMBOL res 1888 1616 R0
SYMATTR InstName R5
SYMATTR Value 274k
SYMBOL res 2336 1424 R0
SYMATTR InstName Rload
SYMATTR Value 0.15
SYMBOL res 1520 1600 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 4.99k
SYMBOL RES 2000 1408 R0
SYMATTR InstName R1
SYMATTR Value 140k
SYMBOL cap 1536 1504 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 3.3n
SYMBOL LTC3313 1712 1456 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1376 1248 R0
SYMATTR Value 3.3
SYMATTR InstName V1
SYMBOL res 2000 1520 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res 2000 1312 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 500K
SYMBOL ind 1888 1440 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 80n
SYMATTR SpiceLine Rser=2m
SYMBOL cap 1344 1632 R0
SYMATTR InstName C3
SYMATTR Value 330p
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1376 1360 0
FLAG 2352 1536 0
FLAG 2016 1632 0
FLAG 1456 1520 0
FLAG 2352 1424 OUT
FLAG 1376 1248 IN
FLAG 1360 1712 0
FLAG 2240 1536 0
FLAG 1904 1728 0
TEXT 2152 1640 Left 2 !.tran .4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8436.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\AD8436.asy)
XU1 N003 NC_01 N004 N004 N006 NC_02 IGND 0 N005 N005 DCOUT DCOUT VCC VCC VEE VCC N002 N001 AD8436 ;pnba IBUFINP)IBUFGN)IBUFINM)IBUFOUT)RMS)SUM)IGND)OGND)OUT)OBUFINP)OBUFINM)OBUFOUT)OBUFVP)IBUFVP)VEE)VCC)CCF)CAVG
C3 VCC N002 0.1
V1 IN 0 SINE(0 {1*sqrt(2)} 1k)
V2 VCC 0 2.5
C1 N004 N006 10
C5 N003 IN 0.47
C4 VCC N001 10
R1 N003 IGND 10Meg
C2 0 N005 3.3
V3 VEE 0 -2.5
.tran 1
.lib AD8436.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2488 4284
WIRE -1296 -688 -1312 -688
WIRE -1120 -688 -1232 -688
WIRE -1088 -688 -1120 -688
WIRE -1040 -688 -1088 -688
WIRE -944 -688 -960 -688
WIRE -944 -672 -944 -688
WIRE -1216 -624 -1248 -624
WIRE -1120 -624 -1120 -688
WIRE -1120 -624 -1152 -624
WIRE -1120 -576 -1120 -624
WIRE -1120 -576 -1184 -576
WIRE -1056 -576 -1120 -576
WIRE -1312 -544 -1312 -688
WIRE -1248 -544 -1248 -624
WIRE -1184 -544 -1184 -576
WIRE -1120 -544 -1120 -576
WIRE -1056 -544 -1056 -576
WIRE -1872 -448 -1888 -448
WIRE -1744 -448 -1792 -448
WIRE -1664 -448 -1744 -448
WIRE -1568 -448 -1600 -448
WIRE -1408 -448 -1568 -448
WIRE -1568 -416 -1568 -448
WIRE -800 -384 -848 -384
WIRE -768 -384 -800 -384
WIRE -1440 -320 -1488 -320
WIRE -1408 -320 -1440 -320
WIRE -800 -320 -800 -384
WIRE -800 -320 -848 -320
WIRE -1488 -272 -1488 -320
WIRE -1440 -256 -1440 -320
WIRE -1408 -256 -1440 -256
WIRE -800 -256 -848 -256
WIRE -1488 -192 -1488 -208
WIRE -1408 -192 -1488 -192
WIRE -800 -192 -800 -256
WIRE -800 -192 -848 -192
WIRE -800 -160 -800 -192
WIRE -800 -80 -800 -96
WIRE -1056 -32 -1056 -64
WIRE -1568 -16 -1568 -336
WIRE -1232 -16 -1568 -16
WIRE -1184 -16 -1184 -64
WIRE -1184 -16 -1232 -16
WIRE -1120 -16 -1120 -64
WIRE -1120 32 -1120 -16
WIRE -1120 128 -1120 112
SYMBOL voltage -1120 16 R0
SYMATTR InstName V3
SYMATTR Value -2.5
SYMBOL voltage -1776 -448 R90
WINDOW 3 35 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value SINE(0 {1*sqrt(2)} 1k)
SYMATTR InstName V1
SYMBOL voltage -1056 -688 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value 2.5
SYMBOL cap -1504 -272 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL cap -1232 -704 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL cap -1600 -464 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 0.47
SYMBOL cap -816 -96 M180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 3.3
SYMBOL cap -1152 -640 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 0.1
SYMBOL AD8436 -1120 -320 R0
SYMATTR InstName U1
SYMBOL res -1584 -432 R0
SYMATTR InstName R1
SYMATTR Value 10Meg
FLAG -1744 -448 IN
FLAG -1888 -448 0
FLAG -1120 128 0
FLAG -800 -80 0
FLAG -768 -384 DCOUT
FLAG -1056 -32 0
FLAG -944 -672 0
FLAG -1088 -688 VCC
FLAG -1120 -16 VEE
FLAG -1232 -16 IGND
TEXT -1568 40 Left 2 !.tran 1