Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1dd57b37ff70_trial.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N004 N003 N002 0 BC308
R3 N001 N002 15
V1 N001 0 9
R4 0 N004 10
R2 N003 0 100k
R1 N001 N003 27k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.include BC308.txt
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE 224 16 224 -80
WIRE 224 16 128 16
WIRE 288 16 224 16
WIRE 128 96 128 16
WIRE 288 160 288 96
WIRE 128 208 128 176
WIRE 224 208 128 208
WIRE 128 256 128 208
WIRE 288 272 288 256
WIRE 432 272 288 272
SYMBOL res 528 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL voltage 224 -64 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL res 272 0 R0
SYMATTR InstName R3
SYMATTR Value 15
SYMBOL res 112 80 R0
SYMATTR InstName R1
SYMATTR Value 27k
SYMBOL pnp 224 256 M180
SYMATTR InstName Q1
SYMATTR Value BC308
SYMBOL res 112 240 R0
SYMATTR InstName R2
SYMATTR Value 100k
FLAG 224 -160 0
FLAG 128 336 0
FLAG 512 272 0
TEXT 800 16 Left 2 !.include BC308.txt
TEXT 108 360 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1677.asc
* Generated by LTspice 26.0.1 for Windows.
* 3V Electret Microphone Amplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1677.asy)
V2 -V 0 -1.5
V1 +V 0 1.5
XU1 0 N003 +V -V OUT LT1677 ;pnba In+)In-)V+)V-)OUT
C2 N002 N001 .68
R2 N003 N002 10K
C1 N001 0 Q=100p*sin(2*pi*2K*time)
R1 OUT N003 1Meg
R3 N001 +V 10K
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -224 0 -224 -16
WIRE -448 48 -448 32
WIRE -320 48 -320 32
WIRE -224 96 -224 80
WIRE -64 96 -224 96
WIRE 64 96 0 96
WIRE 160 96 144 96
WIRE 176 96 160 96
WIRE 288 96 256 96
WIRE -224 112 -224 96
WIRE -448 144 -448 128
WIRE -320 144 -320 128
WIRE -224 192 -224 176
WIRE 224 208 224 192
WIRE 160 224 160 96
WIRE 192 224 160 224
WIRE 288 240 288 96
WIRE 288 240 256 240
WIRE 336 240 288 240
WIRE 192 256 160 256
WIRE 224 288 224 272
SYMBOL res -240 96 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL cap -240 112 R0
SYMATTR InstName C1
SYMATTR Value Q=100p*sin(2*pi*2K*time)
SYMBOL opamps\\LT1677 224 176 R0
SYMATTR InstName U1
SYMBOL cap 0 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .68
SYMBOL res 160 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 272 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL voltage -320 32 R0
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL voltage -448 32 R0
SYMATTR InstName V2
SYMATTR Value -1.5
FLAG -320 144 0
FLAG 224 192 +V
FLAG -320 32 +V
FLAG 224 288 -V
FLAG -448 144 0
FLAG -448 32 -V
FLAG 160 256 0
FLAG -224 192 0
FLAG -224 -16 +V
FLAG 336 240 OUT
TEXT 392 280 Left 2 !.tran 3m
TEXT 8 -56 Bottom 2 ;3V Electret Microphone Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8663.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8663.asy)
V1 +V 0 5
Rload OUT 0 10K
Vin IN 0 SINE(0 1 10K)
XU1 IN N001 +V -V OUT AD8663 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 10K
V2 -V 0 -5
R1 N001 0 10K
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 288 -1152 272 -1152
WIRE 384 -1152 368 -1152
WIRE 400 -1152 384 -1152
WIRE 496 -1152 480 -1152
WIRE 32 -1056 32 -1072
WIRE 128 -1056 128 -1072
WIRE 384 -1040 384 -1152
WIRE 400 -1040 384 -1040
WIRE 496 -1024 496 -1152
WIRE 496 -1024 464 -1024
WIRE 624 -1024 496 -1024
WIRE 400 -1008 288 -1008
WIRE 624 -1008 624 -1024
WIRE 288 -992 288 -1008
WIRE 32 -960 32 -976
WIRE 128 -960 128 -976
WIRE 624 -912 624 -928
WIRE 288 -896 288 -912
SYMBOL voltage 288 -1008 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL Opamps\\AD8663 432 -1088 R0
SYMATTR InstName U1
SYMBOL res 496 -1168 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 32 -1072 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 128 -1072 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 608 -1024 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 384 -1168 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 32 -1072 +V
FLAG 32 -960 0
FLAG 288 -896 0
FLAG 624 -1024 OUT
FLAG 288 -1008 IN
FLAG 432 -1056 +V
FLAG 128 -1072 -V
FLAG 432 -992 -V
FLAG 272 -1152 0
FLAG 624 -912 0
FLAG 128 -960 0
TEXT 544 -872 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1022.asc
* Generated by LTspice 26.0.1 for Windows.
* Wide Bandwidth Absolute Value Circuit
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1022.asy)
XU1 0 N001 +V -V N004 LT1022 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
D1 N002 N004 1N4148
V2 -V 0 -15
R1 N002 N001 10K
R5 OUT N003 10K
D2 N004 N005 1N4148
R4 N003 N002 10K
R2 N001 IN 10K
XU2 N005 N003 +V -V OUT LT1022 ;pnba In+)In-)V+)V-)OUT
V3 IN 0 SINE(0 1 10K)
R3 N005 N001 10K
C2 OUT N003 10p
C1 N002 N001 10p
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 176 16 96 16
WIRE 304 16 240 16
WIRE 432 16 416 16
WIRE 528 16 496 16
WIRE 0 112 -128 112
WIRE 96 112 96 16
WIRE 96 112 80 112
WIRE 160 112 96 112
WIRE 304 112 304 16
WIRE 304 112 240 112
WIRE 320 112 304 112
WIRE 416 112 416 16
WIRE 416 112 400 112
WIRE 432 112 416 112
WIRE 528 112 528 16
WIRE 528 112 512 112
WIRE -128 128 -128 112
WIRE 304 160 304 112
WIRE 192 208 192 192
WIRE 464 208 464 192
WIRE -128 224 -128 208
WIRE 96 224 96 112
WIRE 160 224 96 224
WIRE 416 224 416 112
WIRE 432 224 416 224
WIRE 304 240 304 224
WIRE 304 240 224 240
WIRE 528 240 528 112
WIRE 528 240 496 240
WIRE 560 240 528 240
WIRE 160 256 128 256
WIRE 432 256 416 256
WIRE 304 272 304 240
WIRE 192 288 192 272
WIRE 464 288 464 272
WIRE -112 352 -112 336
WIRE -16 352 -16 336
WIRE 96 368 96 224
WIRE 144 368 96 368
WIRE 304 368 304 336
WIRE 304 368 224 368
WIRE 416 368 416 256
WIRE 416 368 304 368
WIRE -112 448 -112 432
WIRE -16 448 -16 432
SYMBOL cap 496 0 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL diode 288 160 R0
WINDOW 3 27 62 Left 2
SYMATTR Value 1N4148
SYMATTR InstName D1
SYMBOL res 240 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL opamps\\LT1022 192 176 R0
SYMATTR InstName U1
SYMBOL opamps\\LT1022 464 176 R0
SYMATTR InstName U2
SYMBOL voltage -128 112 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 10K)
SYMBOL res 416 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL diode 288 272 R0
WINDOW 3 27 62 Left 2
SYMATTR Value 1N4148
SYMATTR InstName D2
SYMBOL res 96 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage -112 336 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL cap 240 0 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage -16 336 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 528 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10K
FLAG -16 448 0
FLAG 192 192 +V
FLAG -16 336 +V
FLAG 192 288 -V
FLAG -112 448 0
FLAG -112 336 -V
FLAG -128 224 0
FLAG 464 192 +V
FLAG 464 288 -V
FLAG 128 256 0
FLAG -128 112 IN
FLAG 560 240 OUT
TEXT 448 400 Left 2 !.tran 1m
TEXT 256 -40 Bottom 2 ;Wide Bandwidth Absolute Value Circuit
* Z:\home\khalils\Downloads\files\data\raw_asc\1559205db2ee_Fig20_13.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Is(M4P) and Id(M2N)
M4P 0 N001 VDD VDD P_1u l=2u w=30u
M2N VDD N002 0 0 N_1u l=2u w=10u
M3P N002 N002 VDD VDD P_1u l=90u w=10u
M3N N001 N001 VDD VDD P_1u l=2u w=30u
M1P N002 N002 0 0 N_1u l=2u w=10u
VDD VDD 0 5
M1N N001 N001 0 0 N_1u l=270u w=10u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.dc vdd 4.5 5.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1296 680
WIRE 592 -32 576 -32
WIRE 624 -32 592 -32
WIRE 1056 -32 1040 -32
WIRE 288 -16 288 -48
WIRE 288 0 288 -16
WIRE 528 64 528 48
WIRE 592 64 592 -32
WIRE 592 64 528 64
WIRE 992 64 992 48
WIRE 1056 64 1056 -32
WIRE 1056 64 992 64
WIRE 528 96 528 64
WIRE 992 96 992 64
WIRE 1136 96 1136 -48
WIRE 592 176 592 64
WIRE 592 176 576 176
WIRE 1056 176 1056 64
WIRE 1056 176 1040 176
WIRE 1088 176 1056 176
WIRE 528 224 528 192
WIRE 672 224 672 48
WIRE 992 224 992 192
WIRE 1136 224 1136 192
SYMBOL pmos4 624 48 M180
WINDOW 0 64 16 Left 2
WINDOW 123 56 100 Left 2
SYMATTR InstName M4P
SYMATTR Value2 l=2u w=30u
SYMATTR Value P_1u
SYMBOL voltage 288 -16 R0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL pmos4 576 48 R180
WINDOW 0 63 16 Left 2
WINDOW 123 56 100 Left 2
SYMATTR InstName M3N
SYMATTR Value2 l=2u w=30u
SYMATTR Value P_1u
SYMBOL nmos4 576 96 M0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=270u w=10u
SYMATTR InstName M1N
SYMATTR Value N_1u
SYMBOL nmos4 1088 96 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M2N
SYMATTR Value N_1u
SYMBOL pmos4 1040 48 R180
WINDOW 0 63 16 Left 2
WINDOW 123 56 100 Left 2
SYMATTR InstName M3P
SYMATTR Value2 l=90u w=10u
SYMATTR Value P_1u
SYMBOL nmos4 1040 96 M0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M1P
SYMATTR Value N_1u
FLAG 288 80 0
FLAG 288 -16 VDD
FLAG 528 0 VDD
FLAG 672 0 VDD
FLAG 528 -48 VDD
FLAG 672 -48 VDD
FLAG 528 224 0
FLAG 672 224 0
FLAG 528 144 0
FLAG 992 0 VDD
FLAG 992 -48 VDD
FLAG 992 224 0
FLAG 1136 224 0
FLAG 992 144 0
FLAG 1136 144 0
FLAG 1136 -48 VDD
TEXT 584 296 Left 2 !.include cmosedu_models.txt
TEXT 592 -136 Left 2 ;Plot Is(M4P) and Id(M2N)
TEXT 584 272 Left 2 !.dc vdd 4.5 5.5
* Z:\home\khalils\Downloads\files\data\raw_asc\5e498846c672_Fig9_24_nmos.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1) and 1/d(Id(m1)) (to get ro)
VGS N002 0 1.05
VDS N001 0 0
M1 N001 N002 0 0 N_1u l=2u w=10u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VDS 0 5
.include cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 680
WIRE 640 80 448 80
WIRE 448 112 448 80
WIRE 640 112 640 80
WIRE 496 160 448 160
WIRE 400 192 288 192
WIRE 288 208 288 192
WIRE 448 224 448 208
WIRE 640 224 640 192
WIRE 288 304 288 288
SYMBOL voltage 288 192 R0
WINDOW 0 -85 56 Left 0
WINDOW 3 -85 84 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 1.05
SYMBOL nmos4 400 112 R0
WINDOW 0 59 18 Left 0
WINDOW 3 64 75 Left 0
WINDOW 123 64 103 Left 0
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=2u w=10u
SYMBOL voltage 640 96 R0
WINDOW 0 40 56 Left 0
WINDOW 3 24 104 Invisible 0
SYMATTR InstName VDS
SYMATTR Value 0
FLAG 288 304 0
FLAG 448 224 0
FLAG 640 224 0
FLAG 496 160 0
TEXT 392 280 Left 0 !.dc VDS 0 5
TEXT 392 304 Left 0 !.include cmosedu_models.txt
TEXT 416 48 Left 0 ;Plot Id(M1) and 1/d(Id(m1)) (to get ro)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2935-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2935-2.asy)
XU1 0 0 0 0 N003 N002 N004 N001 LTC2935-2 ;pnba S2)S1)S0)GND)_PFO)_RST)MR)VCC
MQ1 N004 N005 0 0 BSS123
V2 N005 0 PWL(0 0 9.599 0 9.6 3.6 9.999 3.6 10 0)
V1 N001 0 PWL(0 0 3.6 3.6 16 3.6 19.6 0 20.1 0 23.7 3.6)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 21
.lib LTC2935-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1052 680
WIRE 192 -64 -256 -64
WIRE 192 -48 192 -64
WIRE 96 0 80 0
WIRE 336 0 288 0
WIRE 96 80 80 80
WIRE 336 80 288 80
WIRE 96 160 80 160
WIRE 400 160 288 160
WIRE 400 176 400 160
WIRE -256 192 -256 -64
WIRE 192 224 192 208
WIRE 544 256 448 256
WIRE 544 272 544 256
WIRE -256 304 -256 272
WIRE 400 304 400 272
WIRE 544 368 544 352
SYMBOL voltage 544 256 R0
SYMATTR InstName V2
SYMATTR Value PWL(0 0 9.599 0 9.6 3.6 9.999 3.6 10 0)
SYMBOL LTC2935-2 192 80 R0
SYMATTR InstName U1
SYMBOL voltage -256 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 3.6 3.6 16 3.6 19.6 0 20.1 0 23.7 3.6)
SYMBOL nmos 448 176 M0
WINDOW 0 39 -6 Right 2
WINDOW 3 32 97 Right 2
SYMATTR InstName Q1
SYMATTR Value BSS123
FLAG 192 224 0
FLAG 544 368 0
FLAG -256 304 0
FLAG 400 304 0
FLAG 80 160 0
FLAG 80 80 0
FLAG 80 0 0
TEXT 152 352 Left 2 !.tran 21
* Z:\tmp\asc_dec_bjh7r6w2\0efe78f44b1e_AmpSimp_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
EOut N002 N003 Value={Limit(V(nAmp),{VHigh},{VLow})}
R1 nOut N002 {RsOut}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 680
WIRE 416 96 272 96
WIRE 624 96 544 96
WIRE 768 96 704 96
WIRE 544 128 544 96
WIRE 416 144 416 96
WIRE 416 240 416 208
WIRE 416 240 272 240
WIRE 544 240 544 208
WIRE 544 240 416 240
SYMBOL Misc\\Epoly 544 112 R0
WINDOW 0 32 96 Left 2
WINDOW 3 -208 160 Left 2
SYMATTR InstName EOut
SYMATTR Value Value={Limit(V(nAmp),{VHigh},{VLow})}
SYMBOL res 720 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {RsOut}
FLAG 768 96 nOut
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7118-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7118-3.3.asy)
Rload OUT 0 22
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=3.3 ;pnba Vin)Sense)EN)SS)Vout)GND
C2 N001 0 4.7n
C1 OUT 0 2.2 Rser=1.5m
V1 IN 0 4.3
.tran 6m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADP7118-3.3 224 128 R0
SYMATTR InstName U1
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.3
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 22
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1111-12.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1111-12.asy)
L1 IN N001 22 Rser=0.02 Rpar=5000
XU1 IN IN N001 0 0 N002 N003 OUT LT1111 top=220K bot=25.5K ;pnba Ilim)Vin)SW1)SW2)GND)AO)SET)Sense
D1 N001 OUT MBRS140
C2 OUT 0 33 Rser=0.02
V1 IN 0 5
Rload OUT 0 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LT1111.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2512 1432
WIRE 1472 896 1296 896
WIRE 1600 896 1472 896
WIRE 1648 896 1600 896
WIRE 1776 896 1728 896
WIRE 1824 896 1776 896
WIRE 1936 896 1888 896
WIRE 2000 896 1936 896
WIRE 1296 912 1296 896
WIRE 2000 912 2000 896
WIRE 1472 960 1472 896
WIRE 1600 960 1600 896
WIRE 1296 1008 1296 992
WIRE 2000 1008 2000 992
WIRE 1392 1024 1376 1024
WIRE 1776 1024 1776 896
WIRE 1776 1024 1680 1024
WIRE 1936 1104 1936 896
WIRE 1936 1104 1680 1104
WIRE 1936 1120 1936 1104
WIRE 1392 1184 1376 1184
WIRE 1696 1184 1680 1184
WIRE 1936 1200 1936 1184
WIRE 1536 1264 1536 1248
SYMBOL schottky 1824 912 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL PowerProducts\\LT1111-12 1536 1104 R0
SYMATTR InstName U1
SYMBOL POLCAP 1920 1120 R0
SYMATTR InstName C2
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02
SYMBOL IND 1632 912 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 22
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL VOLTAGE 1296 896 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 1984 896 R0
SYMATTR InstName Rload
SYMATTR Value 100
FLAG 1536 1264 0
FLAG 1696 1184 0
FLAG 1296 1008 0
FLAG 2000 1008 0
FLAG 1936 1200 0
FLAG 2000 896 OUT
FLAG 1296 896 IN
TEXT 1704 1240 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6655LN-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LTC6655LN-5.asy)
C2 N001 0 10
V1 IN 0 5.5
XU1 IN IN 0 N001 OUT LTC6655LN-5 ;pnba _SHDN)IN)GND)NR)OUT_F
C1 OUT 0 10
.tran 50m startup
.lib LTC6655LN-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 144 0 144
WIRE 96 144 32 144
WIRE 112 144 96 144
WIRE 528 144 400 144
WIRE 560 144 528 144
WIRE 0 160 0 144
WIRE 560 160 560 144
WIRE 96 208 96 144
WIRE 112 208 96 208
WIRE 448 208 400 208
WIRE 448 224 448 208
WIRE 0 256 0 240
WIRE 256 272 256 240
WIRE 448 320 448 288
WIRE 560 320 560 224
SYMBOL LTC6655LN-5 256 176 R0
SYMATTR InstName U1
SYMBOL cap 544 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL cap 432 224 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL voltage 0 144 R0
SYMATTR InstName V1
SYMATTR Value 5.5
FLAG 560 320 0
FLAG 448 320 0
FLAG 256 272 0
FLAG 0 256 0
FLAG 32 144 IN
FLAG 528 144 OUT
TEXT 168 352 Left 2 !.tran 50m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2907.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2907.asy)
V1 N002 0 PWL(0 0 1m 2.5)
R3 N003 0 100K
C1 N004 0 .022
C2 N003 0 .1
V2 N001 0 PWL(0 0 1m .8)
V3 N006 0 5
R1 N006 N005 100K
XU1 0 N005 N004 N002 N002 N003 0 0 LTC2907 ;pnba GND)_RST)TMR)Vcc)V1)Vadj)S1)TOL
R2 N001 N003 49.9K
.tran 400m
.lib LTC2907.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 940 680
WIRE 512 64 -368 64
WIRE -368 80 -368 64
WIRE 512 80 512 64
WIRE -368 176 -368 160
WIRE 16 176 -224 176
WIRE 32 176 16 176
WIRE 432 176 288 176
WIRE 512 176 512 160
WIRE 512 176 432 176
WIRE -224 192 -224 176
WIRE 432 192 432 176
WIRE 512 192 512 176
WIRE 16 240 16 176
WIRE 32 240 16 240
WIRE 352 240 288 240
WIRE 432 272 432 256
WIRE -224 288 -224 272
WIRE 512 288 512 272
WIRE 32 304 16 304
WIRE 352 304 288 304
WIRE 352 320 352 304
WIRE 32 368 16 368
WIRE 384 368 288 368
WIRE 544 368 464 368
WIRE 544 384 544 368
WIRE 544 480 544 464
SYMBOL LTC2907 160 272 R0
SYMATTR InstName U1
SYMBOL voltage -224 176 R0
WINDOW 0 23 24 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1m 2.5)
SYMBOL res 480 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL voltage -368 64 R0
WINDOW 3 27 89 Left 2
SYMATTR Value PWL(0 0 1m .8)
SYMATTR InstName V2
SYMBOL cap 416 192 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL res 496 176 R0
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL voltage 544 368 R0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 496 64 R0
SYMATTR InstName R2
SYMATTR Value 49.9K
SYMBOL cap 336 240 R0
SYMATTR InstName C1
SYMATTR Value .022
FLAG -224 288 0
FLAG -368 176 0
FLAG 352 320 0
FLAG 544 480 0
FLAG 16 368 0
FLAG 16 304 0
FLAG 512 288 0
FLAG 432 272 0
TEXT 352 448 Left 2 !.tran 400m
* Z:\home\khalils\Downloads\files\data\raw_asc\1a5752b752b8_Lab1_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 Vgs 0 0 PMOS
Vds N001 0 -5
Vgs Vgs 0 -5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vgs -5 0 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1088 816
WIRE -512 176 -608 176
WIRE -512 192 -512 176
WIRE -512 320 -512 272
WIRE -608 352 -608 176
WIRE -528 400 -608 400
WIRE -720 432 -752 432
WIRE -656 432 -720 432
WIRE -608 464 -608 448
WIRE -528 464 -528 400
WIRE -528 464 -608 464
WIRE -608 480 -608 464
WIRE -752 512 -752 432
SYMBOL voltage -752 496 R0
WINDOW 3 35 81 Left 2
SYMATTR Value -5
SYMATTR InstName Vgs
SYMBOL pmos -656 352 R0
SYMATTR InstName M1
SYMBOL voltage -512 176 R0
SYMATTR InstName Vds
SYMATTR Value -5
FLAG -512 320 0
FLAG -608 480 0
FLAG -752 592 0
FLAG -720 432 Vgs
TEXT -600 624 Left 2 !.dc Vgs  -5 0 1
* Z:\tmp\asc_dec_bjh7r6w2\07fdeeea09fe_Half_Bridge_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N004 N005 {Ron}
V2 N002 0 PULSE(0 13 1u 1n 1n 10u 20u)
S2 N005 0 N005 N003 SW1
C1 N003 0 65n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -368 160 -368 144
WIRE -288 144 -368 144
WIRE -176 144 -208 144
WIRE -176 176 -176 144
WIRE -96 144 -176 144
WIRE -96 464 -96 144
WIRE -48 192 -48 96
WIRE -48 512 -48 432
WIRE -16 96 -48 96
WIRE -16 144 -96 144
WIRE -16 464 -96 464
WIRE -16 512 -48 512
WIRE 32 192 -48 192
WIRE 32 192 32 160
WIRE 32 208 32 192
WIRE 32 304 32 288
WIRE 32 336 32 304
WIRE 32 432 -48 432
WIRE 32 432 32 416
WIRE 32 448 32 432
WIRE 416 304 32 304
SYMBOL res 16 320 R0
SYMATTR InstName R2
SYMATTR Value {Ron}
SYMBOL voltage -368 144 R0
WINDOW 3 -81 147 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 13 1u 1n 1n 10u 20u)
SYMATTR InstName V2
SYMBOL sw 32 432 R0
SYMATTR InstName S2
SYMATTR Value SW1
SYMBOL cap -192 176 R0
SYMATTR InstName C1
SYMATTR Value 65n
FLAG 32 528 0
FLAG -176 240 0
FLAG -368 240 0
* Z:\home\khalils\Downloads\files\data\raw_asc\eba7136ff4d4_3l_3_.asc
* Generated by LTspice 26.0.1 for Windows.
VBS N001 0 -900m
M1 DS N002 0 N001 CMOSN l=0.18u w=1.8u ad=0.81p as=0.81p pd=4.5u ps=4.5u
VGS N002 0 V
VDS DS 0 50m
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC_180nm.txt
.dc VGS 0 1.8 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 996 680
WIRE 496 64 336 64
WIRE 496 80 496 64
WIRE 496 192 496 160
WIRE 336 240 336 64
WIRE 512 288 336 288
WIRE 288 320 176 320
WIRE 176 352 176 320
WIRE 512 448 512 288
WIRE 176 496 176 432
WIRE 336 496 336 336
WIRE 336 496 176 496
WIRE 336 560 336 496
WIRE 512 576 512 528
SYMBOL voltage 176 336 R0
SYMATTR InstName VGS
SYMBOL nmos4 288 240 R0
SYMATTR InstName M1
SYMATTR Value CMOSN
SYMATTR Value2 l=0.18u w=1.8u ad=0.81p as=0.81p pd=4.5u ps=4.5u
SYMBOL voltage 496 64 R0
SYMATTR InstName VDS
SYMATTR Value 50m
SYMBOL voltage 512 432 R0
SYMATTR InstName VBS
SYMATTR Value -900m
FLAG 336 560 0
FLAG 512 576 0
FLAG 496 192 0
FLAG 496 64 DS
TEXT 616 192 Left 2 !.include TSMC_180nm.txt
TEXT 624 256 Left 2 !.dc VGS 0 1.8 0.05