Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8627SP.asc
* Generated by LTspice 26.0.1 for Windows.
* 2MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8627SP.asy)
C2 OUT 0 470 Rser=5m
Rload OUT 0 62.5m
C1 SET 0 1
R4 N002 N003 2k
C3 N002 0 2.2n
R5 SET 0 10k
XU1 SW N004 0 CLKout IN NC_01 IN IN N004 N004 SET N003 OUT PGFB N001 PG LT8627SP ;pnba SW)Sync/Mode)GND)CLKout)PVin)BST)SVin)EN/UVLO)INTVcc)PHMode)SET)Vc)OUTS)PGFB)RT)PG
V1 IN 0 12
R2 PGFB 0 49.9k
R6 OUT PG 100k
R1 N001 0 47k
L1 SW OUT 330n Rser=6m
R3 OUT PGFB 49.9k
.tran 1.5m startup
.lib LT8627SP.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1080 680
WIRE 96 -128 -64 -128
WIRE 272 -128 96 -128
WIRE -64 -112 -64 -128
WIRE 272 -112 272 -128
WIRE 96 -64 96 -128
WIRE 128 -64 96 -64
WIRE -64 -16 -64 -32
WIRE 96 32 96 -64
WIRE 128 32 96 32
WIRE 448 32 416 32
WIRE 512 32 448 32
WIRE 688 32 592 32
WIRE -32 128 -64 128
WIRE 128 128 48 128
WIRE 448 128 416 128
WIRE 512 128 448 128
WIRE 688 128 688 32
WIRE 688 128 592 128
WIRE 768 128 688 128
WIRE 880 128 768 128
WIRE 976 128 880 128
WIRE 976 144 976 128
WIRE 880 160 880 128
WIRE 768 176 768 128
WIRE -80 224 -96 224
WIRE 16 224 -16 224
WIRE 128 224 96 224
WIRE 688 224 688 128
WIRE 688 224 416 224
WIRE 880 240 880 224
WIRE 976 240 976 224
WIRE 128 320 96 320
WIRE 464 320 416 320
WIRE 768 320 768 256
WIRE 768 320 464 320
WIRE 768 336 768 320
WIRE 96 416 96 320
WIRE 128 416 96 416
WIRE 448 416 416 416
WIRE 560 416 448 416
WIRE 672 416 560 416
WIRE 672 432 672 416
WIRE 768 432 768 416
WIRE 560 448 560 416
WIRE 96 512 96 416
WIRE 128 512 96 512
WIRE 448 512 416 512
WIRE 560 528 560 512
WIRE 672 528 672 512
WIRE 272 592 272 576
SYMBOL res 960 128 R0
SYMATTR InstName Rload
SYMATTR Value 62.5m
SYMBOL res 0 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 2k
SYMBOL res 752 160 R0
SYMATTR InstName R3
SYMATTR Value 49.9k
SYMBOL res 608 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 100k
SYMBOL LT8627SP 272 192 R0
SYMATTR InstName U1
SYMBOL res 752 320 R0
SYMATTR InstName R2
SYMATTR Value 49.9k
SYMBOL voltage -64 -128 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap -16 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 2.2n
SYMBOL cap 864 160 R0
SYMATTR InstName C2
SYMATTR Value 470
SYMATTR SpiceLine Rser=5m
SYMBOL res 656 416 R0
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL res 64 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 47k
SYMBOL ind 496 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 330n
SYMATTR SpiceLine Rser=6m
SYMBOL cap 544 448 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG -64 -16 0
FLAG -64 128 0
FLAG 272 592 0
FLAG 768 432 0
FLAG 976 240 0
FLAG -96 224 0
FLAG 976 128 OUT
FLAG -64 -128 IN
FLAG 672 528 0
FLAG 560 528 0
FLAG 880 240 0
FLAG 448 512 CLKout
FLAG 448 32 PG
FLAG 448 128 SW
FLAG 464 320 PGFB
FLAG 448 416 SET
TEXT 728 552 Left 2 !.tran 1.5m startup
TEXT 56 112 Left 2 ;2MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\4440e6c9288c_v1.1.asc
* Generated by LTspice 26.0.1 for Windows.
D3 N003 IN D
R2 OUT N001 4.7k
D2 N002 IN D
S1 0 N001 IN 0 SW
C1 OUT 0 100n Rser=0.05
V3 N003 0 PULSE(0 5 15m 1n 1n 250u 500u 10)
R1 VCC N001 4.7k
V1 VCC 0 3.3
V2 N002 0 PULSE(0 5 20m 1n 1n 30m 80m 1)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100m
.model SW SW(Ron=1u Roff=100Meg Vt=3.3)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 984 680
WIRE 176 32 176 0
WIRE 304 64 304 0
WIRE 176 144 176 112
WIRE 304 192 304 144
WIRE 448 192 304 192
WIRE 592 192 528 192
WIRE 720 192 592 192
WIRE 592 224 592 192
WIRE 304 240 304 192
WIRE 48 256 -64 256
WIRE 192 256 48 256
WIRE 256 256 192 256
WIRE -64 288 -64 256
WIRE 48 288 48 256
WIRE 256 304 160 304
WIRE 592 320 592 288
WIRE 304 368 304 320
WIRE -64 384 -64 352
WIRE 48 384 48 352
WIRE -64 496 -64 464
WIRE 48 496 48 464
WIRE 48 496 -64 496
WIRE 160 496 160 304
WIRE 160 496 48 496
WIRE 48 544 48 496
IOPIN 720 192 Out
SYMBOL res 544 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.7k
SYMBOL voltage 48 368 M0
WINDOW 3 41 64 Invisible 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 15m 1n 1n 250u 500u 10)
SYMATTR InstName V3
SYMBOL diode -80 352 M180
WINDOW 0 49 40 Left 2
WINDOW 3 48 16 Left 2
SYMATTR InstName D2
SYMBOL voltage 176 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL diode 32 352 M180
WINDOW 0 49 40 Left 2
WINDOW 3 48 16 Left 2
SYMATTR InstName D3
SYMBOL voltage -64 368 M0
WINDOW 3 41 64 Invisible 2
WINDOW 123 0 0 Left 0
WINDOW 39 39 69 Left 2
SYMATTR Value PULSE(0 5 20m 1n 1n 30m 80m 1)
SYMATTR InstName V2
SYMBOL res 288 48 R0
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL sw 304 336 M180
WINDOW 0 41 47 Left 2
WINDOW 3 40 70 Left 2
SYMATTR InstName S1
SYMBOL cap 576 224 R0
SYMATTR InstName C1
SYMATTR Value 100n
SYMATTR SpiceLine Rser=0.05
FLAG 176 144 0
FLAG 720 192 OUT
FLAG 192 256 IN
FLAG 304 368 0
FLAG 592 320 0
FLAG 48 544 0
FLAG 176 0 VCC
FLAG 304 0 VCC
TEXT 344 -8 Left 2 !.tran 100m
TEXT 344 16 Left 2 !.model SW SW(Ron=1u Roff=100Meg Vt=3.3)
* Z:\home\khalils\Downloads\files\data\raw_asc\1559205db2ee_Fig20_13.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Is(M4P) and Id(M2N)
M1N N001 N001 0 0 N_1u l=270u w=10u
M1P N002 N002 0 0 N_1u l=2u w=10u
M4P 0 N001 VDD VDD P_1u l=2u w=30u
M3N N001 N001 VDD VDD P_1u l=2u w=30u
M3P N002 N002 VDD VDD P_1u l=90u w=10u
M2N VDD N002 0 0 N_1u l=2u w=10u
VDD VDD 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.dc vdd 4.5 5.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1296 680
WIRE 592 -32 576 -32
WIRE 624 -32 592 -32
WIRE 1056 -32 1040 -32
WIRE 288 -16 288 -48
WIRE 288 0 288 -16
WIRE 528 64 528 48
WIRE 592 64 592 -32
WIRE 592 64 528 64
WIRE 992 64 992 48
WIRE 1056 64 1056 -32
WIRE 1056 64 992 64
WIRE 528 96 528 64
WIRE 992 96 992 64
WIRE 1136 96 1136 -48
WIRE 592 176 592 64
WIRE 592 176 576 176
WIRE 1056 176 1056 64
WIRE 1056 176 1040 176
WIRE 1088 176 1056 176
WIRE 528 224 528 192
WIRE 672 224 672 48
WIRE 992 224 992 192
WIRE 1136 224 1136 192
SYMBOL pmos4 624 48 M180
WINDOW 0 64 16 Left 2
WINDOW 123 56 100 Left 2
SYMATTR InstName M4P
SYMATTR Value2 l=2u w=30u
SYMATTR Value P_1u
SYMBOL nmos4 576 96 M0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=270u w=10u
SYMATTR InstName M1N
SYMATTR Value N_1u
SYMBOL voltage 288 -16 R0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL pmos4 1040 48 R180
WINDOW 0 63 16 Left 2
WINDOW 123 56 100 Left 2
SYMATTR InstName M3P
SYMATTR Value2 l=90u w=10u
SYMATTR Value P_1u
SYMBOL nmos4 1040 96 M0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M1P
SYMATTR Value N_1u
SYMBOL pmos4 576 48 R180
WINDOW 0 63 16 Left 2
WINDOW 123 56 100 Left 2
SYMATTR InstName M3N
SYMATTR Value2 l=2u w=30u
SYMATTR Value P_1u
SYMBOL nmos4 1088 96 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M2N
SYMATTR Value N_1u
FLAG 288 80 0
FLAG 288 -16 VDD
FLAG 528 0 VDD
FLAG 672 0 VDD
FLAG 528 -48 VDD
FLAG 672 -48 VDD
FLAG 528 224 0
FLAG 672 224 0
FLAG 528 144 0
FLAG 992 0 VDD
FLAG 992 -48 VDD
FLAG 992 224 0
FLAG 1136 224 0
FLAG 992 144 0
FLAG 1136 144 0
FLAG 1136 -48 VDD
TEXT 584 296 Left 2 !.include cmosedu_models.txt
TEXT 592 -136 Left 2 ;Plot Is(M4P) and Id(M2N)
TEXT 584 272 Left 2 !.dc vdd 4.5 5.5
* Z:\home\khalils\Downloads\files\data\raw_asc\26c32daa5533_DSO_LTspice.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N003 N002 +5V -5V BFO ADTL082 ;pnba In+)In-)V+)V-)OUT
XU2 N005 N001 +5V -5V OUT ADTL082 ;pnba In+)In-)V+)V-)OUT
R1 N005 +3.3V 15K
R2 N005 0 5K
R3 OUT N001 5K
R4 N001 BFO 5K
V1 0 -5V 5
V2 +5V 0 5
V3 +3.3V 0 3.3V
R5 BFO N002 10K
R7 N003 N004 5K
V4 N004 0 SINE(0 1 10000)
.tran 0.1
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADTL082.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 932 912
WIRE 432 -112 400 -112
WIRE 560 -112 512 -112
WIRE 0 -48 -48 -48
WIRE 112 -48 80 -48
WIRE 32 80 32 32
WIRE -48 96 -48 -48
WIRE 0 96 -48 96
WIRE 112 112 112 -48
WIRE 112 112 64 112
WIRE 192 112 192 32
WIRE 192 112 112 112
WIRE 288 112 192 112
WIRE 400 112 400 -112
WIRE 400 112 368 112
WIRE 0 128 -48 128
WIRE 464 144 464 16
WIRE -160 160 -352 160
WIRE -48 160 -48 128
WIRE -48 160 -80 160
WIRE 400 160 400 112
WIRE 432 160 400 160
WIRE 560 176 560 -112
WIRE 560 176 496 176
WIRE 704 176 560 176
WIRE 432 192 400 192
WIRE -352 208 -352 160
WIRE 288 240 208 240
WIRE 400 240 400 192
WIRE 400 240 368 240
WIRE 32 256 32 144
WIRE 288 336 256 336
WIRE 400 336 400 240
WIRE 400 336 368 336
WIRE 464 336 464 208
WIRE -352 352 -352 288
WIRE 256 384 256 336
WIRE 464 480 400 480
WIRE 400 528 400 480
WIRE 112 592 112 496
WIRE 400 656 400 608
WIRE 512 656 400 656
WIRE 400 688 400 656
WIRE 512 704 512 656
WIRE 112 736 112 672
WIRE 400 832 400 768
WIRE 448 832 400 832
FLAG 256 384 0
FLAG 512 704 0
FLAG 448 832 -5V
FLAG 464 480 +5V
FLAG 464 336 -5V
FLAG 464 16 +5V
FLAG 704 176 OUT
FLAG 112 736 0
FLAG 112 496 +3.3V
FLAG 208 240 +3.3V
FLAG -352 352 0
FLAG 32 32 +5V
FLAG 32 256 -5V
FLAG 192 32 BFO
SYMBOL Opamps\\ADTL082 32 48 R0
SYMATTR InstName U1
SYMBOL Opamps\\ADTL082 464 112 R0
SYMATTR InstName U2
SYMBOL res 384 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 15K
SYMBOL res 384 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL res 528 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5K
SYMBOL res 384 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 5K
SYMBOL voltage 400 672 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 400 512 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 112 576 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 3.3V
SYMBOL res 96 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10K
SYMBOL res -64 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 5K
SYMBOL voltage -352 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value SINE(0 1 10000)
TEXT -386 894 Left 2 !.tran 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\3280cdb5f792_fig-02-06-07.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4077-2.asy)
VS2 0 VEE 15
R2 VOUT N001 1k
XU1 NC_01 NC_02 NC_03 NC_04 NC_05 NC_06 NC_07 NC_08 ADA4077-2 ;pnba +INA)-INA)OUTA)V+)V-)+INB)-INB)OUTB
V2 SFT-IN 0 1.25
R1 VIN N001 1k
VS1 VCC 0 15
V1 VIN 0 SINE(0 1 1k)
.tran 2m
.lib ADA4077-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 32 -32 32
WIRE 48 32 -16 32
WIRE 144 32 128 32
WIRE 224 32 144 32
WIRE 368 32 304 32
WIRE -32 64 -32 32
WIRE 208 112 208 80
WIRE 208 144 208 112
WIRE 144 160 144 32
WIRE 176 160 144 160
WIRE 368 176 368 32
WIRE 368 176 240 176
WIRE 400 176 368 176
WIRE -32 192 -32 144
WIRE 112 192 96 192
WIRE 176 192 112 192
WIRE 96 224 96 192
WIRE 208 256 208 208
WIRE 384 256 384 240
WIRE 448 256 448 240
WIRE 208 272 208 256
WIRE 384 304 384 256
WIRE 448 304 448 256
WIRE 96 336 96 304
WIRE 384 400 384 384
WIRE 448 400 448 384
IOPIN 400 176 Out
SYMBOL Misc\\battery 384 400 R180
WINDOW 0 24 104 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName VS2
SYMATTR Value 15
SYMBOL Misc\\battery 96 208 R0
SYMATTR InstName V2
SYMATTR Value 1.25
SYMBOL res 32 16 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL Misc\\battery 448 288 R0
WINDOW 0 13 6 Left 2
WINDOW 3 18 96 Left 2
SYMATTR InstName VS1
SYMATTR Value 15
SYMBOL voltage -32 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1k)
SYMBOL Opamps\\ADA4077-2 208 112 R0
SYMATTR InstName U1
SYMBOL res 320 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 400 176 VOUT
FLAG 384 400 0
FLAG 448 400 0
FLAG 384 256 VEE
FLAG 448 256 VCC
FLAG 208 112 VCC
FLAG 208 256 VEE
FLAG -32 192 0
FLAG 96 336 0
FLAG 112 192 SFT-IN
FLAG -16 32 VIN
TEXT 384 8 Left 2 !.tran 2m
* Z:\home\khalils\Downloads\files\data\raw_asc\Hartly.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
K1 L1 L2 L3 1.
L3 0 out 3
L4 N003 N005 1m Rser=100
L1 N001 0 30
L2 0 N002 30
C1 N002 N003 500p
C4 N002 N001 250p
C2 N001 N004 30p
V1 N005 0 10.
J1 N003 N004 0 2N5484
D2 0 N004 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.tran 250 startup
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2764 2344
WIRE 2080 1664 1984 1664
WIRE 2400 1664 2160 1664
WIRE 2000 1792 1984 1792
WIRE 2112 1792 2080 1792
WIRE 2144 1792 2112 1792
WIRE 2256 1792 2224 1792
WIRE 2112 1824 2112 1792
WIRE 2256 1856 2256 1792
WIRE 2320 1856 2256 1856
WIRE 2320 1872 2320 1856
WIRE 1984 1920 1984 1792
WIRE 2080 1920 1984 1920
WIRE 2256 1920 2256 1856
WIRE 2256 1920 2144 1920
WIRE 1984 1952 1984 1920
WIRE 2320 1968 2320 1936
WIRE 2320 1968 2192 1968
WIRE 2400 1968 2320 1968
WIRE 2192 1984 2192 1968
WIRE 2400 1984 2400 1968
WIRE 1984 2048 1984 2016
WIRE 2144 2048 1984 2048
WIRE 1984 2080 1984 2048
WIRE 2192 2096 2192 2080
WIRE 2400 2096 2400 2064
WIRE 1984 2176 1984 2144
WIRE 2400 2192 2400 2176
SYMBOL ind 2384 1968 R0
WINDOW 0 36 25 Left 2
WINDOW 3 36 55 Left 2
WINDOW 39 37 81 Left 2
SYMATTR InstName L4
SYMATTR Value 1m
SYMATTR SpiceLine Rser=100
SYMBOL ind2 1984 1808 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 4 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 30
SYMBOL cap 2144 1904 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 250p
SYMBOL ind2 2128 1808 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 4 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 30
SYMBOL cap 1968 1952 R0
SYMATTR InstName C2
SYMATTR Value 30p
SYMBOL diode 1968 2144 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL ind2 2064 1680 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 4 56 VBottom 2
SYMATTR InstName L3
SYMATTR Value 3
SYMBOL njf 2144 1984 R0
SYMATTR InstName J1
SYMATTR Value 2N5484
SYMBOL cap 2304 1872 R0
SYMATTR InstName C1
SYMATTR Value 500p
SYMBOL voltage 2400 2080 R0
SYMATTR InstName V1
SYMATTR Value 10.
FLAG 2400 2192 0
FLAG 2192 2096 0
FLAG 2112 1824 0
FLAG 1984 2176 0
FLAG 1984 1664 0
FLAG 2400 1664 out
TEXT 2120 2208 Left 2 !.tran 250 startup
TEXT 2112 1728 Center 2 !K1 L1 L2 L3 1.
TEXT 2224 2248 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8618-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8618-3.3.asy)
Rload OUT 0 33
V1 N001 0 12
R3 OUT PG 100k
C3 N003 0 1
R2 RT 0 110k
L1 SW OUT 120 Rser=1
XU1 N003 SW OUT N002 RT OUT TRSS PG N001 N001 0 LT8604C LT8604=0 DFN=1 VOUT33=1 ;pnba INTVCC)SW)Bias)BST)Rt)OUT)TR/SS)PG)EN/UV)Vin)GND
C1 OUT 0 22
C2 N002 SW 47n
.tran 3m steady nodiscard
.lib LT8604C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1748 780
WIRE -32 48 -192 48
WIRE 16 48 -32 48
WIRE 368 48 304 48
WIRE 368 64 368 48
WIRE -192 128 -192 48
WIRE -32 144 -32 48
WIRE 16 144 -32 144
WIRE 336 144 304 144
WIRE 368 144 368 128
WIRE 368 144 336 144
WIRE 432 144 368 144
WIRE 528 144 512 144
WIRE 800 144 528 144
WIRE 912 144 800 144
WIRE 944 144 912 144
WIRE 800 160 800 144
WIRE 944 160 944 144
WIRE -64 240 -96 240
WIRE 16 240 0 240
WIRE 528 240 528 144
WIRE 528 240 304 240
WIRE 800 256 800 224
WIRE 944 256 944 240
WIRE -192 272 -192 208
WIRE 528 336 528 240
WIRE 528 336 304 336
WIRE -64 432 -112 432
WIRE 16 432 -64 432
WIRE -48 528 -192 528
WIRE 16 528 -48 528
WIRE 336 528 304 528
WIRE 384 528 336 528
WIRE 528 528 528 336
WIRE 528 528 464 528
WIRE -192 576 -192 528
WIRE 160 624 160 576
WIRE -192 720 -192 656
SYMBOL res -208 560 R0
SYMATTR InstName R2
SYMATTR Value 110k
SYMBOL res 480 512 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL cap 352 64 R0
SYMATTR InstName C2
SYMATTR Value 47n
SYMBOL LT8618-3.3 160 240 R0
SYMATTR InstName U1
SYMBOL voltage -192 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ind 416 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 120
SYMATTR SpiceLine Rser=1
SYMBOL res 928 144 R0
SYMATTR InstName Rload
SYMATTR Value 33
SYMBOL cap 0 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 784 160 R0
SYMATTR InstName C1
SYMATTR Value 22
FLAG 800 256 0
FLAG 912 144 OUT
FLAG -192 720 0
FLAG -192 272 0
FLAG 336 528 PG
FLAG 336 144 SW
FLAG -48 528 RT
FLAG -64 432 TRSS
FLAG 160 624 0
FLAG 944 256 0
FLAG -96 240 0
TEXT 608 616 Left 2 !.tran 3m steady nodiscard
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1734-4.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1734-4.2.asy)
R1 N004 0 1K
C1 N005 0 1
XU1 N002 0 N001 N004 N005 N003 LTC1734-x.x Ref=4.2 ;pnba Isense)GND)Vcc)Prog)BAT)Drive
V1 N001 0 7
Q1 N005 N003 N002 0 2N2907
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 5 startup
.lib LTC1734-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2284 1688
WIRE 1680 1280 1536 1280
WIRE 2096 1280 1968 1280
WIRE 1536 1296 1536 1280
WIRE 2096 1328 2096 1280
WIRE 1680 1376 1632 1376
WIRE 2032 1376 1968 1376
WIRE 1536 1392 1536 1376
WIRE 1584 1472 1568 1472
WIRE 1680 1472 1664 1472
WIRE 2096 1472 2096 1424
WIRE 2096 1472 1968 1472
WIRE 2096 1488 2096 1472
WIRE 2096 1568 2096 1552
SYMBOL VOLTAGE 1536 1280 R0
SYMATTR InstName V1
SYMATTR Value 7
SYMBOL PowerProducts\\LTC1734-4.2 1824 1376 R0
SYMATTR InstName U1
SYMBOL RES 1680 1456 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL PNP 2032 1424 M180
WINDOW 0 76 72 Left 2
WINDOW 3 76 36 Left 2
SYMATTR InstName Q1
SYMATTR Value 2N2907
SYMBOL cap 2080 1488 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 1568 1472 0
FLAG 1632 1376 0
FLAG 1536 1392 0
FLAG 2096 1568 0
TEXT 1872 1568 Left 2 !.tran 5 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT4320-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LT4320-1.asy)
MQ2 OUT N004 N002 N002 IPD220N06L3
V1 N002 N001 SINE(0 36 400) Rser=.5
MQ4 N002 N005 0 0 IPD220N06L3
MQ3 N001 N006 0 0 IPD220N06L3
MQ1 OUT N003 N001 N001 IPD220N06L3
XU1 N001 N003 N005 N006 0 OUT N004 N002 LT4320-1 ;pnba IN2)TG2)BG2)BG1)Outn)Outp)TG1)IN1
Rload OUT 0 32
C1 OUT 0 200
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 12.5m
.lib LT4320-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1320 1428
WIRE 48 -112 0 -112
WIRE 656 -112 144 -112
WIRE -64 -16 -304 -16
WIRE 416 -16 -64 -16
WIRE 448 -16 416 -16
WIRE 656 -16 656 -112
WIRE 656 -16 544 -16
WIRE 720 -16 656 -16
WIRE 848 -16 720 -16
WIRE 720 0 720 -16
WIRE 848 0 848 -16
WIRE -304 16 -304 -16
WIRE 0 48 0 -112
WIRE 96 48 0 48
WIRE 416 48 416 -16
WIRE 416 48 384 48
WIRE 720 96 720 64
WIRE 848 96 848 80
WIRE 64 112 64 -64
WIRE 96 112 64 112
WIRE 464 112 464 32
WIRE 464 112 384 112
WIRE -304 128 -304 96
WIRE -144 128 -304 128
WIRE 0 128 0 48
WIRE 0 128 -144 128
WIRE 96 176 32 176
WIRE 656 176 656 -16
WIRE 656 176 384 176
WIRE 96 240 64 240
WIRE 416 240 384 240
WIRE 32 288 32 176
WIRE 64 288 64 240
WIRE 304 288 64 288
WIRE -64 336 -64 -16
WIRE -48 336 -64 336
WIRE 416 336 416 240
WIRE 416 336 48 336
WIRE 304 384 304 288
WIRE -144 432 -144 128
WIRE 224 432 -144 432
WIRE 416 432 416 336
WIRE 416 432 320 432
WIRE 448 432 416 432
SYMBOL res 832 -16 R0
SYMATTR InstName Rload
SYMATTR Value 32
SYMBOL nmos 224 384 M90
WINDOW 0 5 48 VBottom 2
WINDOW 3 54 48 VTop 2
SYMATTR InstName Q3
SYMATTR Value IPD220N06L3
SYMBOL LT4320-1 240 144 R0
SYMATTR InstName U1
SYMBOL voltage -304 0 R0
WINDOW 123 24 138 Left 2
WINDOW 39 42 56 Left 2
SYMATTR SpiceLine Rser=.5
SYMATTR InstName V1
SYMATTR Value SINE(0 36 400)
SYMBOL nmos 144 -64 M270
WINDOW 0 55 44 VTop 2
WINDOW 3 -14 71 VLeft 2
SYMATTR InstName Q1
SYMATTR Value IPD220N06L3
SYMBOL cap 704 0 R0
SYMATTR InstName C1
SYMATTR Value 200
SYMBOL nmos 544 32 M270
WINDOW 0 56 43 VTop 2
WINDOW 3 -15 73 VLeft 2
SYMATTR InstName Q2
SYMATTR Value IPD220N06L3
SYMBOL nmos -48 288 M90
WINDOW 0 4 52 VBottom 2
WINDOW 3 57 43 VTop 2
SYMATTR InstName Q4
SYMATTR Value IPD220N06L3
FLAG 848 -16 OUT
FLAG 720 96 0
FLAG 848 96 0
FLAG 448 432 0
TEXT 704 384 Left 2 !.tran 12.5m