* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3830-1.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N003 0 .01
C2 N001 0 .01
R1 N004 N003 15K
MQ1 IN N002 N006 N006 Si9428DY
MQ2 N006 N008 0 0 Si9428DY
D1 IN N005 MBR0520L
C3 N006 N005 .1
L1 N006 OUT 3.2
C4 OUT 0 270 Rser=.01
V1 IN 0 5
R2 OUT N007 4.3K
R3 N007 0 10.2K
C5 OUT N007 .0033
XU1 N002 N005 0 N007 N001 N004 IN N008 LTC3830-1 ;pnba G1)PVcc1)GND)FB)SS)Comp)Vcc/PVcc2)G2
Rload OUT 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3830-1.asy)
.lib LTC3830-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2776 1716
WIRE 1904 1136 1728 1136
WIRE 2080 1136 1904 1136
WIRE 2256 1136 2080 1136
WIRE 1904 1152 1904 1136
WIRE 2256 1152 2256 1136
WIRE 2080 1184 2080 1136
WIRE 1728 1200 1728 1136
WIRE 2256 1248 2256 1232
WIRE 1424 1264 1376 1264
WIRE 1568 1264 1488 1264
WIRE 2032 1264 1888 1264
WIRE 1392 1360 1376 1360
WIRE 1472 1360 1456 1360
WIRE 1568 1360 1552 1360
WIRE 1904 1360 1904 1216
WIRE 1904 1360 1888 1360
WIRE 1936 1360 1904 1360
WIRE 2080 1360 2080 1280
WIRE 2080 1360 2000 1360
WIRE 2128 1360 2080 1360
WIRE 2256 1360 2208 1360
WIRE 2352 1360 2256 1360
WIRE 2464 1360 2352 1360
WIRE 2560 1360 2464 1360
WIRE 2080 1376 2080 1360
WIRE 2464 1376 2464 1360
WIRE 2560 1376 2560 1360
WIRE 2256 1408 2256 1360
WIRE 2352 1408 2352 1360
WIRE 1568 1456 1536 1456
WIRE 2032 1456 1888 1456
WIRE 2464 1472 2464 1440
WIRE 2560 1472 2560 1456
WIRE 2080 1488 2080 1472
WIRE 1728 1536 1728 1520
WIRE 1536 1568 1536 1456
WIRE 2256 1568 2256 1488
WIRE 2256 1568 1536 1568
WIRE 2352 1568 2352 1472
WIRE 2352 1568 2256 1568
WIRE 2256 1584 2256 1568
WIRE 2256 1680 2256 1664
FLAG 1376 1360 0
FLAG 1376 1264 0
FLAG 1728 1536 0
FLAG 2080 1488 0
FLAG 2464 1472 0
FLAG 2560 1472 0
FLAG 2256 1248 0
FLAG 2560 1360 OUT
FLAG 2256 1680 0
FLAG 2256 1136 IN
SYMBOL cap 1456 1344 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL cap 1488 1248 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL RES 1568 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 15K
SYMBOL NMOS 2032 1184 R0
SYMATTR InstName Q1
SYMATTR Value Si9428DY
SYMBOL nmos 2032 1376 R0
SYMATTR InstName Q2
SYMATTR Value Si9428DY
SYMBOL schottky 1888 1152 R0
SYMATTR InstName D1
SYMATTR Value MBR0520L
SYMBOL cap 2000 1344 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL ind 2112 1376 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 3.2
SYMBOL cap 2448 1376 R0
SYMATTR InstName C4
SYMATTR Value 270
SYMATTR SpiceLine Rser=.01
SYMBOL VOLTAGE 2256 1136 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 2240 1392 R0
SYMATTR InstName R2
SYMATTR Value 4.3K
SYMBOL RES 2240 1568 R0
SYMATTR InstName R3
SYMATTR Value 10.2K
SYMBOL cap 2336 1408 R0
SYMATTR InstName C5
SYMATTR Value .0033
SYMBOL POWERPRODUCTS\\LTC3830-1 1728 1360 R0
SYMATTR InstName U1
SYMBOL res 2544 1360 R0
SYMATTR InstName Rload
SYMATTR Value 5
TEXT 2000 1616 Left 2 !.tran 1m startup