* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4678.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 12
C5 OUT0 0 330 x2 Rser=5m
R2 OUT0 0 .055
C9 OUT1 0 330 X2 Rser=5m
R12 OUT1 0 .083
C12 0 N001 220p
C13 0 N003 4700p
C14 0 N002 220p
C15 0 N004 2200p
R14 N007 N008 10K
R15 N005 N008 10K
R16 N006 N008 4.99K
C1 OUT0 0 100 x3 Rser=5m
C2 OUT1 0 100 X3 Rser=5m
XU1 OUT0 0 0 NC_01 N004 N002 NC_02 OUT0 IN IN N006 0 0 IN NC_03 OUT1 N007 N005 NC_04 NC_05 NC_06 NC_07 NC_08 NC_09 NC_10 NC_11 OUT1 N008 N001 N003 0 LTM4678 VIN_ON=5.5 VIN_OFF=5 Vout_0=1.6 Vout_1=2.5 Ilim0_range=0 Ilim1_range=0 OC_limit0=1 OC_limit1=1 Mode_ll=1 Fault_response=0 Retry_delay=.1m gm0=3m gm1=3m Rth0=5K Rth1=5K Sync=0 Freq=500K PHs_0=0 PHs_1=180 Ton0_delay=.3m Ton0_rise=.5m Ton1_delay=.3m Ton1_rise=.5m Toff0_delay=.2m Toff0_fall=.3m Toff1_delay=.2m Toff1_fall=.3m Vout0_range=0 Vout1_range=0 ;pnba Vsense0+)Vsense0-)SGND)PGood0)Comp0a)Comp0b)SW0)Vout0)Vin0)Vin1)SYNC)GND)ExtVcc)SVin)IntVcc)Vout1)Run0)Run1)SW1)Vtrim0_cfg)Vout0_cfg)Vout1_cfg)Vtrim1_cfg)Fswph_cfg)VDD25)PGood1)Vsense1+)VDD33)Comp1b)Comp1a)Vsense1-
.tran 1.2m startup
* Please read the following notes carefully, since the model presents different user interface\nthan the real part does.\n \n(1) All PMBus communication and memory address related functions and pins are not modeled. \n \n(2) Changes to all parameter values during the simulation running will not be in effect, unless the\nsimulation is stopped and restarted. This is different from the operation of the part, which will\n respond to the commanded changes while running. \n \n(3) Share_clk is not modeled. The default time reference of LTspice is used as the common time \nbase for all time related parameters.\n \n(4) The following parameters can be defined, by right-clicking the symbol of LTC3880. Different \nnomenclature from the datasheet is adopted here. If any value of these parameters are set beyond \nthe scope discribed in the datasheet, the resulting simulation outcomes are not meaningful.\n \n VIN_ON & VIN_OFF -- in volts, set the unit start/stop input voltages;\n Freq -- in Hz, sets switching frequency as one of values of 250K, 350K, \n 425K, 500K, 575K, 650K, 750K, 1000K. FREQ_CFG pin needs to float \n (or short to VDD25), to make the value be in effect;\n PHs_0 & PHs_1 -- in degree, set phase angle related to SYNC signal. \n Certain combinations are restricted as in datasheet. FREQ_CFG \n pin needs to float (or short to VDD25), to make the value be in effect;\n Ton0_delay & Ton0_rise; Ton1_delay & Ton1_rise -- in sec, set delay and soft-start timers for \n channel0 and channel1. Initialization time is not modeled;\n Toff0_delay & Toff0_fall; Toff1_delay & Toff1_fall -- in sec, set delay and soft-off timers for \n channel0 and channel1;\n Vout_0 & Vout_1 -- in volt, set output voltages respectively;\n Vout0_range & Vout1_range -- set maximum output range, with value 0\n for 3.6V; value 1 for 2.75V\n Ilim0_range & Ilim1_range -- set maximum sensed peak current range, with value 0\n for low, and 1 for high;\n OC_limit0 & OC_limit1 -- set ratio of peak current limit to the maximum value defined\n by Ilimit_range. It must be one of values: 0.5, 0.572, 0.642, \n 0.714, 0.786, 0.858, 0.928, 1;\n Mode_II -- sets light load operation mode: 0 for discontinuous, 1 for forced continuous;\n Fault_response -- sets the response mode of the unit to occuring faults:\n 0 for ignore, 1 for latch up, 2 for Hiccup after Retry_delay time;\n Retry_delay -- in sec, sets the timer before the unit turns on after a fault;\n gm -- transconductance of the error amplifier. It must be between 1m mho and 5.73m mho;\n Rth -- Compensation resistor. It must be set between 0k ohms and 62k ohms;
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4678.asy)
.lib LTM4678.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3120 1720
WIRE 320 -352 176 -352
WIRE 432 -352 320 -352
WIRE 928 -352 432 -352
WIRE 176 -336 176 -352
WIRE 432 -304 432 -352
WIRE 624 -304 624 -320
WIRE 720 -304 720 -320
WIRE 816 -304 816 -320
WIRE 176 -240 176 -256
WIRE 320 -240 320 -352
WIRE 368 -240 320 -240
WIRE 928 -240 928 -352
WIRE 928 -240 880 -240
WIRE 64 -48 -48 -48
WIRE 192 -48 64 -48
WIRE 320 -48 192 -48
WIRE 368 -48 320 -48
WIRE 928 -48 880 -48
WIRE 976 -48 928 -48
WIRE 1088 -48 976 -48
WIRE 1200 -48 1088 -48
WIRE -48 -32 -48 -48
WIRE 64 -32 64 -48
WIRE 192 -32 192 -48
WIRE 976 -32 976 -48
WIRE 1088 -32 1088 -48
WIRE 1200 -32 1200 -48
WIRE 320 48 320 -48
WIRE 368 48 320 48
WIRE 928 48 928 -48
WIRE 928 48 880 48
WIRE -48 64 -48 48
WIRE 64 64 64 32
WIRE 192 64 192 32
WIRE 976 64 976 32
WIRE 1088 64 1088 32
WIRE 1200 64 1200 48
WIRE 368 144 336 144
WIRE 912 144 880 144
WIRE 272 240 240 240
WIRE 368 240 336 240
WIRE 912 240 880 240
WIRE 1008 240 976 240
WIRE 272 336 240 336
WIRE 368 336 336 336
WIRE 912 336 880 336
WIRE 1008 336 976 336
WIRE 432 800 432 784
WIRE 720 800 720 784
WIRE 816 800 816 784
WIRE 432 896 432 880
WIRE 624 896 624 784
WIRE 624 896 432 896
WIRE 720 896 720 880
WIRE 720 896 624 896
WIRE 816 896 816 880
WIRE 816 896 720 896
FLAG 624 -320 0
FLAG 720 -320 0
FLAG 976 64 0
FLAG 1200 64 0
FLAG 1200 -48 OUT0
FLAG 176 -352 IN
FLAG 176 -240 0
FLAG 192 64 0
FLAG -48 64 0
FLAG -48 -48 OUT1
FLAG 816 -320 0
FLAG 336 144 0
FLAG 912 144 0
FLAG 240 240 0
FLAG 240 336 0
FLAG 1008 240 0
FLAG 1008 336 0
FLAG 1088 64 0
FLAG 64 64 0
SYMBOL voltage 176 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 960 -32 R0
WINDOW 123 25 58 Left 2
WINDOW 3 36 33 Left 2
SYMATTR Value2 x2
SYMATTR Value 330
SYMATTR InstName C5
SYMATTR SpiceLine Rser=5m
SYMBOL res 1184 -48 R0
SYMATTR InstName R2
SYMATTR Value .055
SYMBOL cap 176 -32 R0
WINDOW 123 29 59 Left 2
WINDOW 3 39 34 Left 2
SYMATTR Value2 X2
SYMATTR Value 330
SYMATTR InstName C9
SYMATTR SpiceLine Rser=5m
SYMBOL res -64 -48 R0
SYMATTR InstName R12
SYMATTR Value .083
SYMBOL cap 272 224 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C12
SYMATTR Value 220p
SYMBOL cap 272 320 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C13
SYMATTR Value 4700p
SYMBOL cap 976 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C14
SYMATTR Value 220p
SYMBOL cap 976 320 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C15
SYMATTR Value 2200p
SYMBOL res 800 784 R0
SYMATTR InstName R14
SYMATTR Value 10K
SYMBOL res 416 784 R0
SYMATTR InstName R15
SYMATTR Value 10K
SYMBOL res 704 784 R0
SYMATTR InstName R16
SYMATTR Value 4.99K
SYMBOL cap 1072 -32 R0
WINDOW 123 26 58 Left 2
WINDOW 3 37 33 Left 2
SYMATTR Value2 x3
SYMATTR Value 100
SYMATTR InstName C1
SYMATTR SpiceLine Rser=5m
SYMBOL cap 48 -32 R0
WINDOW 123 28 61 Left 2
WINDOW 3 37 33 Left 2
SYMATTR Value2 X3
SYMATTR Value 100
SYMATTR InstName C2
SYMATTR SpiceLine Rser=5m
SYMBOL LTM4678 624 240 R0
SYMATTR InstName U1
TEXT 1112 800 Right 2 !.tran 1.2m startup
TEXT 1168 120 Left 1 ;Please read the following notes carefully, since the model presents different user interface\nthan the real part does.\n \n(1) All PMBus communication and memory address related functions and pins are not modeled. \n \n(2) Changes to all parameter values during the simulation running will not be in effect, unless the\nsimulation is stopped and restarted. This is different from the operation of the part, which will\n respond to the commanded changes while running. \n \n(3) Share_clk is not modeled. The default time reference of LTspice is used as the common time \nbase for all time related parameters.\n \n(4) The following parameters can be defined, by right-clicking the symbol of LTC3880. Different \nnomenclature from the datasheet is adopted here. If any value of these parameters are set beyond \nthe scope discribed in the datasheet, the resulting simulation outcomes are not meaningful.\n \n     VIN_ON & VIN_OFF -- in volts, set the unit start/stop input voltages;\n     Freq -- in Hz, sets switching frequency as one of values of 250K, 350K, \n                425K, 500K, 575K, 650K, 750K, 1000K. FREQ_CFG pin needs to float \n                (or short to VDD25), to make the value be in effect;\n     PHs_0 & PHs_1 -- in degree,  set phase angle related to SYNC signal. \n                Certain combinations are restricted as in datasheet. FREQ_CFG \n                pin needs to float (or short to VDD25), to make the value be in effect;\n     Ton0_delay & Ton0_rise; Ton1_delay & Ton1_rise -- in sec, set delay and soft-start timers for \n                channel0 and channel1. Initialization time is not modeled;\n     Toff0_delay & Toff0_fall; Toff1_delay & Toff1_fall -- in sec, set delay and soft-off timers for \n                channel0 and channel1;\n     Vout_0 & Vout_1 -- in volt, set output voltages respectively;\n     Vout0_range & Vout1_range -- set maximum output range, with value 0\n                                                      for 3.6V; value 1 for 2.75V\n     Ilim0_range & Ilim1_range -- set maximum sensed peak current range, with value 0\n                           for low, and 1 for high;\n     OC_limit0 & OC_limit1 -- set ratio of peak current limit to the maximum value defined\n                      by Ilimit_range. It must be one of values: 0.5, 0.572, 0.642, \n                      0.714, 0.786, 0.858, 0.928, 1;\n     Mode_II -- sets light load operation mode: 0 for discontinuous, 1 for forced continuous;\n     Fault_response -- sets the response mode of the unit to occuring faults:\n                                 0 for ignore, 1 for latch up, 2 for Hiccup after Retry_delay time;\n     Retry_delay -- in sec, sets the timer before the unit turns on after a fault;\n     gm -- transconductance of the error amplifier. It must be between 1m mho and 5.73m mho;\n     Rth -- Compensation resistor. It must be set between 0k ohms and 62k ohms;