Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4217.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4217.asy)
C1 N006 0 .1
R5 OUT N004 20K
V2 N001 0 PULSE(0 1 240m 1m 1m 10m)
S1 0 OUT N001 0 SHORT
R4 OUT N003 150K
R2 N002 IN 20K
R3 N003 0 20K
R1 N005 0 20K
XU1 NC_01 IN N002 0 N006 N006 0 OUT MP_02 MP_03 MP_04 MP_05 NC_06 N004 N002 N003 N005 NC_07 LTC4217 ;pnba Sense)Vdd)UV)OV)Timer)IntVcc)GND)Out)))))Gate)PG)_FLT)FB)Imon)Iset
C2 OUT 0 330
V1 IN 0 12
.model SHORT SW(Ron=10m Roff=1K Vt=.5 Vh=-.4)
.tran 600m startup
.lib LTC4217.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1592 680
WIRE -128 -352 -224 -352
WIRE -48 -352 -128 -352
WIRE 480 -352 368 -352
WIRE 592 -352 480 -352
WIRE 688 -352 592 -352
WIRE 800 -352 688 -352
WIRE -224 -336 -224 -352
WIRE -128 -336 -128 -352
WIRE 480 -336 480 -352
WIRE 688 -336 688 -352
WIRE 800 -336 800 -352
WIRE 1024 -320 848 -320
WIRE 1120 -320 1104 -320
WIRE -48 -304 -48 -352
WIRE -16 -304 -48 -304
WIRE 368 -304 368 -352
WIRE 368 -304 272 -304
WIRE 592 -304 592 -352
WIRE -224 -240 -224 -256
WIRE -128 -240 -128 -256
WIRE -16 -240 -128 -240
WIRE 480 -240 480 -256
WIRE 480 -240 272 -240
WIRE 688 -240 688 -272
WIRE 800 -240 800 -256
WIRE 480 -224 480 -240
WIRE -16 -176 -32 -176
WIRE 432 -176 272 -176
WIRE 480 -128 480 -144
WIRE -128 -112 -128 -240
WIRE -16 -112 -128 -112
WIRE 288 -112 272 -112
WIRE 384 -112 368 -112
WIRE 432 -96 432 -176
WIRE 592 -96 592 -224
WIRE 592 -96 432 -96
WIRE 320 -48 272 -48
WIRE 320 16 320 -48
WIRE 320 16 272 16
WIRE 128 96 128 64
WIRE 320 96 320 80
SYMBOL res 576 -320 R0
SYMATTR InstName R5
SYMATTR Value 20K
SYMBOL res 464 -240 R0
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL voltage -224 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 272 -96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 20K
SYMBOL sw 800 -240 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL cap 304 16 R0
WINDOW 0 28 11 Left 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL cap 672 -336 R0
SYMATTR InstName C2
SYMATTR Value 330
SYMBOL voltage 1008 -320 R270
WINDOW 123 -74 56 VBottom 2
WINDOW 39 -53 56 VBottom 2
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 240m 1m 1m 10m)
SYMBOL res 464 -352 R0
SYMATTR InstName R4
SYMATTR Value 150K
SYMBOL LTC4217 128 -144 R0
SYMATTR InstName U1
SYMBOL res -144 -240 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 20K
FLAG 320 96 0
FLAG 480 -128 0
FLAG -32 -176 0
FLAG 128 96 0
FLAG 384 -112 0
FLAG -224 -240 0
FLAG 688 -240 0
FLAG 800 -240 0
FLAG 848 -272 0
FLAG 1120 -320 0
FLAG 800 -352 OUT
FLAG -224 -352 IN
TEXT 504 64 Left 2 !.model SHORT SW(Ron=10m Roff=1K Vt=.5 Vh=-.4)
TEXT 520 -24 Left 2 !.tran 600m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0d4fdbcbaa8f_diode_ideal.asc
* Generated by LTspice 26.0.1 for Windows.
D1 OUT 0 Dideal
R1 OUT IN 1k
V1 IN 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model Dideal D(Is=1e-20 N=1 Rs=0)
.dc V1 0 5 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 64 64 16 64
WIRE 160 64 64 64
WIRE 288 64 240 64
WIRE 320 64 288 64
WIRE 16 144 16 64
WIRE 320 144 320 64
WIRE 16 272 16 224
WIRE 320 272 320 208
WIRE 320 272 16 272
WIRE 16 304 16 272
SYMBOL res 256 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 304 144 R0
SYMATTR InstName D1
SYMATTR Value Dideal
SYMBOL voltage 16 128 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 16 304 0
FLAG 64 64 IN
FLAG 288 64 OUT
TEXT 16 336 Left 2 !.model Dideal D(Is=1e-20 N=1 Rs=0)
TEXT -16 360 Left 2 !.dc V1 0 5 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\16ed7713c695_EC1_e.asc
* Generated by LTspice 26.0.1 for Windows.
O1 N001 0 N002 0 LTe
V1 N001 0 PULSE 0 10 1n 1n 1n 0.5 1 Rser=27
C1 N002 0 1.786n
.tran 0 1u 0
.model LTe LTRA(len=27.86 R=0.58395 L = 269.2n G=0.10381m C = 47.858p)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 32 -32 32
WIRE 368 32 256 32
WIRE 160 64 96 64
WIRE 320 64 256 64
WIRE -32 176 -32 112
WIRE 96 176 96 64
WIRE 320 176 320 64
WIRE 368 176 368 96
SYMBOL ltline 208 48 R0
SYMATTR InstName O1
SYMATTR Value LTe
SYMBOL cap 352 32 R0
SYMATTR InstName C1
SYMATTR Value 1.786n
SYMBOL voltage -32 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE 0 10 1n 1n 1n 0.5 1
SYMATTR SpiceLine Rser=27
FLAG -32 176 0
FLAG 96 176 0
FLAG 320 176 0
FLAG 368 176 0
TEXT -56 288 Left 2 !.tran 0 1u 0
TEXT -352 240 Left 2 !.model LTe LTRA(len=27.86 R=0.58395 L = 269.2n G=0.10381m C = 47.858p)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7154-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7154-2.5.asy)
C3 N004 0 1
C2 N003 0 1
C4 N002 0 1
C1 OUT 0 10
XU1 N004 OUT N002 0 N003 N003 N001 IN ADM7154_5 Vreg=3.2022 Vref=2.5157 ;pnba Vreg)Vout)Byp)GND)Ref_Sense)Ref)EN)Vin
R1 IN N001 100K
Rload OUT 0 25
V1 IN 0 3.4
.tran 5m startup
.lib ADM7154_5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -144 32
WIRE 80 32 -32 32
WIRE 464 32 400 32
WIRE 560 32 464 32
WIRE -144 48 -144 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE -144 144 -144 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE -16 224 -32 224
WIRE 80 224 48 224
WIRE 416 224 400 224
WIRE 464 224 416 224
WIRE 464 240 464 224
WIRE -16 320 -32 320
WIRE 80 320 48 320
WIRE 416 320 416 224
WIRE 416 320 400 320
WIRE 464 320 464 304
WIRE 240 400 240 384
SYMBOL voltage -144 32 R0
SYMATTR InstName V1
SYMATTR Value 3.4
SYMBOL cap 48 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap 448 240 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL ADM7154-2.5 240 176 R0
SYMATTR InstName U1
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 48 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 544 32 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL cap 448 48 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 240 400 0
FLAG 464 320 0
FLAG 464 144 0
FLAG -32 320 0
FLAG -32 224 0
FLAG -144 144 0
FLAG 560 144 0
FLAG -144 32 IN
FLAG 560 32 OUT
TEXT 432 384 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\4140d433b92c_ttl_inv_ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N005 N003 W1 0 2N3904
Q2 N002 N005 N006 0 2N3904
Q3 2+ N006 0 0 2N3904
Q4 N001 N002 N004 0 2N3904
R1 Vp N003 100k
R2 Vp N002 2.2k
R3 N006 0 470
R4 Vp N001 100
D1 N004 2+ 1N914
V1 Vp 0 5
V2 W1 0 PWL REPEAT FOREVER (0 0 2.5m 3 5m 0 7.5m -3 10m 0) ENDREPEAT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 50m
* TTL Inverter
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 -192 64 -192
WIRE 352 -192 128 -192
WIRE 512 -192 352 -192
WIRE -480 -176 -480 -208
WIRE -336 -176 -336 -208
WIRE 512 -144 512 -192
WIRE 128 -128 128 -192
WIRE 352 -128 352 -192
WIRE -480 -64 -480 -96
WIRE -336 -64 -336 -96
WIRE 512 0 512 -64
WIRE 352 48 352 -48
WIRE 448 48 352 48
WIRE 128 128 128 -48
WIRE 352 144 352 48
WIRE 512 144 512 96
WIRE -16 192 -16 160
WIRE -16 192 -48 192
WIRE 80 192 -16 192
WIRE 288 192 176 192
WIRE 512 240 512 208
WIRE 592 240 512 240
WIRE 512 288 512 240
WIRE 352 336 352 240
WIRE 448 336 352 336
WIRE 352 416 352 336
WIRE 352 528 352 496
WIRE 512 528 512 384
WIRE 512 528 352 528
WIRE 352 576 352 528
FLAG 352 576 0
FLAG 64 -192 Vp
IOPIN 64 -192 In
FLAG -48 192 W1
IOPIN -48 192 In
FLAG 592 240 2+
IOPIN 592 240 In
FLAG -16 160 1+
IOPIN -16 160 In
FLAG -480 -64 0
FLAG -336 -64 0
FLAG -480 -208 Vp
IOPIN -480 -208 In
FLAG -336 -208 W1
IOPIN -336 -208 In
SYMBOL npn 176 128 R90
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL npn 288 144 R0
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL npn 448 288 R0
SYMATTR InstName Q3
SYMATTR Value 2N3904
SYMBOL npn 448 0 R0
SYMATTR InstName Q4
SYMATTR Value 2N3904
SYMBOL res 112 -144 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res 336 -144 R0
SYMATTR InstName R2
SYMATTR Value 2.2k
SYMBOL res 336 400 R0
SYMATTR InstName R3
SYMATTR Value 470
SYMBOL res 496 -160 R0
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL diode 496 144 R0
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL voltage -480 -192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -336 -192 R0
WINDOW 3 -428 188 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL REPEAT FOREVER (0 0 2.5m 3 5m 0 7.5m -3 10m 0) ENDREPEAT
TEXT -256 504 Left 2 !.tran 50m
TEXT 64 -320 Left 2 ;TTL Inverter
* Z:\home\khalils\Downloads\files\data\raw_asc\62fb42dfca64_ideal-diode.asc
* Generated by LTspice 26.0.1 for Windows.
D1 vb1 vin 1N4148
R4 vb2 vb1 25k
R2 N002 0 100k
Q2 N002 vb2 vprot 0 2N3906
R1 vb1 0 65k
R3 vprot N001 2
V2 vin 0 SINE(9 6 1k)
V1 N001 0 9
Q1 vb1 vb1 vin 0 2N3906
M1 vin N002 vprot vprot PMOS
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 3ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1352 680
WIRE -160 -176 -416 -176
WIRE 32 -176 -160 -176
WIRE 128 -176 32 -176
WIRE 176 -176 128 -176
WIRE 384 -176 272 -176
WIRE 464 -176 384 -176
WIRE 560 -176 464 -176
WIRE 784 -176 640 -176
WIRE 128 -64 128 -176
WIRE 256 -16 256 -128
WIRE 352 -16 256 -16
WIRE -416 112 -416 -176
WIRE 32 112 32 -176
WIRE 464 112 464 -176
WIRE 784 128 784 -176
WIRE 128 160 128 0
WIRE 128 160 96 160
WIRE 144 160 128 160
WIRE 160 160 144 160
WIRE 240 160 160 160
WIRE 384 160 320 160
WIRE 400 160 384 160
WIRE 32 240 32 208
WIRE 144 240 144 160
WIRE 144 240 32 240
WIRE 352 256 352 -16
WIRE 464 256 464 208
WIRE 464 256 352 256
WIRE 32 288 32 240
WIRE 464 288 464 256
SYMBOL pmos 176 -128 R270
SYMATTR InstName M1
SYMBOL res 16 272 R0
SYMATTR InstName R1
SYMATTR Value 65k
SYMBOL res 336 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 25k
SYMBOL voltage -416 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(9 6 1k)
SYMBOL res 544 -160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 2
SYMBOL res 448 272 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL pnp 96 208 R180
SYMATTR InstName Q1
SYMATTR Value 2N3906
SYMBOL voltage 784 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL diode 144 0 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL pnp 400 208 M180
SYMATTR InstName Q2
SYMATTR Value 2N3906
FLAG -416 192 0
FLAG 32 368 0
FLAG 464 368 0
FLAG 784 208 0
FLAG 160 160 vb1
FLAG 384 160 vb2
FLAG -160 -176 vin
FLAG 384 -176 vprot
TEXT -416 440 Left 2 !.tran 3ms
* Z:\home\khalils\Downloads\files\data\raw_asc\34b6db8dfbf8_Draft7.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 5
V1 N002 0 5
M1 N001 N002 0 0 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V1 0.1 5 0.2
.lib Model_file.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 64 240 64
WIRE 384 160 384 64
WIRE 192 176 192 144
WIRE 192 176 80 176
WIRE 240 240 240 160
WIRE 384 240 240 240
WIRE 240 256 240 240
WIRE 240 256 80 256
WIRE 240 272 240 256
WIRE 256 272 240 272
SYMBOL nmos 192 64 R0
SYMATTR InstName M1
SYMBOL voltage 384 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 80 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 256 272 0
TEXT 46 296 Left 2 !.dc V1 0.1 5 0.2
TEXT 592 40 Left 2 !.lib Model_file.txt
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7158-2.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7158-2.0.asy)
C1 OUT 0 10
C2 N003 0 1
C4 N002 0 1
Rload OUT 0 2.0
C3 N004 0 1
XU1 OUT MP_01 OUT N002 N001 N003 N003 N004 IN 0 ADP7158_9 Vreg=2.611 Vref=2.016 ;pnba Vout))Vout_Sense)Byp)EN)Ref_Sense)Ref)Vreg)Vin)GND
V1 IN 0 3.0
R1 IN N001 100K
.tran 5m startup
.lib ADP7158_9.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -144 32
WIRE 80 32 -32 32
WIRE 416 32 400 32
WIRE 464 32 416 32
WIRE 560 32 464 32
WIRE -144 48 -144 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE 416 128 416 32
WIRE 416 128 400 128
WIRE -144 144 -144 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE 80 224 64 224
WIRE 416 224 400 224
WIRE 464 224 416 224
WIRE 464 240 464 224
WIRE 0 320 -16 320
WIRE 80 320 64 320
WIRE 416 320 416 224
WIRE 416 320 400 320
WIRE 464 320 464 304
WIRE 240 400 240 384
SYMBOL res 544 32 R0
SYMATTR InstName Rload
SYMATTR Value 2.0
SYMBOL voltage -144 32 R0
SYMATTR InstName V1
SYMATTR Value 3.0
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL ADP7158-2.0 240 176 R0
SYMATTR InstName U1
SYMBOL cap 64 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap 448 240 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 448 48 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 240 400 0
FLAG 464 320 0
FLAG 464 144 0
FLAG -16 320 0
FLAG 0 224 0
FLAG -144 144 0
FLAG 560 144 0
FLAG -144 32 IN
FLAG 560 32 OUT
TEXT 504 368 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3009-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3009-2.5.asy)
Rload OUT 0 250
C1 OUT 0 1
XU1 IN OUT MP_01 0 IN LT3009-2.5 ;pnba IN)OUT))GND)_SHDN
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 416 48 320 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 250
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LT3009-2.5 176 96 R0
SYMATTR InstName U1
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 336 248 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\28072b3c10f7_TS10_3.asc
* Generated by LTspice 26.0.1 for Windows.
* AC = 1\nV = I * Z\n1/Z = I
V2 N001 0 AC 1
E1 TF 0 Vx 0 Laplace{(s^2+s+1)/((s^2+2*s+5)*(s+1))}
R4 N003 N002 {1/16}
R2 N001 0 {1/2}
C2 N003 0 {64/13}
R1 TF 0 1
V1 Vx 0 AC 1
R3 N003 0 {13/48}
C1 N001 0 1
L1 N001 N002 {1/4}
.ac dec 10k 1m 100
.param k1=75/52 k2=4489/4368 t1=6 t2=7/2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 400 -96 224 -96
WIRE 48 -64 48 -96
WIRE 224 -64 224 -96
WIRE 400 -64 400 -96
WIRE 176 16 176 0
WIRE 224 16 176 16
WIRE 48 48 48 16
WIRE 224 48 224 16
WIRE 400 48 400 16
WIRE 176 224 -64 224
WIRE 272 224 176 224
WIRE 384 224 352 224
WIRE 592 224 464 224
WIRE 176 272 176 224
WIRE 176 272 128 272
WIRE 224 272 176 272
WIRE 592 272 592 224
WIRE 592 272 544 272
WIRE 640 272 592 272
WIRE -64 288 -64 224
WIRE 128 288 128 272
WIRE 224 288 224 272
WIRE 544 288 544 272
WIRE 640 288 640 272
WIRE 128 384 128 352
WIRE 176 384 128 384
WIRE 224 384 224 368
WIRE 224 384 176 384
WIRE 544 384 544 352
WIRE 592 384 544 384
WIRE 640 384 640 368
WIRE 640 384 592 384
WIRE -64 432 -64 368
WIRE 176 432 176 384
WIRE 176 432 -64 432
WIRE 592 432 592 384
WIRE 592 432 176 432
WIRE -64 448 -64 432
SYMBOL res 384 -80 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL e 224 -80 R0
WINDOW 3 -137 170 Left 2
SYMATTR Value Laplace{(s^2+s+1)/((s^2+2*s+5)*(s+1))}
SYMATTR InstName E1
SYMBOL res 480 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value {1/16}
SYMBOL cap 528 288 R0
SYMATTR InstName C2
SYMATTR Value {64/13}
SYMBOL res 624 272 R0
SYMATTR InstName R3
SYMATTR Value {13/48}
SYMBOL ind 256 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value {1/4}
SYMBOL voltage 48 -80 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL cap 112 288 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -64 272 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V2
SYMATTR Value ""
SYMBOL res 208 272 R0
SYMATTR InstName R2
SYMATTR Value {1/2}
FLAG 224 48 0
FLAG 48 48 0
FLAG 48 -96 Vx
FLAG 176 -48 Vx
FLAG 400 48 0
FLAG -64 448 0
FLAG 400 -96 TF
TEXT 8 112 Left 2 !.ac dec 10k 1m 100
TEXT -208 344 Left 2 ;AC = 1\nV = I * Z\n1/Z = I
TEXT -248 520 Left 2 !.param k1=75/52 k2=4489/4368 t1=6 t2=7/2
* Z:\home\khalils\Downloads\files\data\raw_asc\3d080408f584_invertor.asc
* Generated by LTspice 26.0.1 for Windows.
M1 d g 0 0 NMOS l=32e-9 w=320e-9 ad=51200e-18 as=51200e-18 pd=960e-9 ps=960e-9
M2 N001 g d N001 PMOS l=32e-9 w=640e-9 ad=51200e-18 as=51200e-18 pd=960e-9 ps=960e-9
V1 N001 0 1
V2 g 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 0 1 0.001
.inc 32nm_bulk.pm
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 680
WIRE 240 -80 192 -80
WIRE 592 -80 240 -80
WIRE 192 -32 192 -80
WIRE 240 16 240 -80
WIRE 240 16 192 16
WIRE 144 48 112 48
WIRE 592 48 592 -80
WIRE 192 112 192 64
WIRE 192 144 192 112
WIRE 240 192 192 192
WIRE 96 224 0 224
WIRE 112 224 112 48
WIRE 112 224 96 224
WIRE 144 224 112 224
WIRE 192 304 192 240
WIRE 192 304 0 304
WIRE 240 304 240 192
WIRE 240 304 192 304
WIRE 336 304 240 304
WIRE 592 304 592 128
WIRE 592 304 336 304
WIRE 336 352 336 304
SYMBOL pmos4 144 -32 R0
SYMATTR InstName M2
SYMATTR Value2 l=32e-9 w=640e-9 ad=51200e-18 as=51200e-18 pd=960e-9 ps=960e-9
SYMBOL voltage 592 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL nmos4 144 144 R0
SYMATTR InstName M1
SYMATTR Value2 l=32e-9 w=320e-9 ad=51200e-18 as=51200e-18 pd=960e-9 ps=960e-9
SYMBOL voltage 0 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -315 130 Left 2
SYMATTR Value 1
SYMATTR InstName V2
FLAG 336 352 0
FLAG 192 112 d
FLAG 96 224 g
TEXT -320 384 Left 2 !.dc V2 0 1 0.001
TEXT -632 0 Left 2 !.inc 32nm_bulk.pm
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6404-2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N004 0 SINE(0 10m 10Meg)
V2 N003 0 3.3
R1 N002 N001 200
R2 N009 N008 200
R3 N001 N004 100
R4 N008 0 100
C1 N006 0 .1
XU1 N008 N006 N003 N009 N002 0 N003 N001 N005 N007 LTC6404-2 ;pnba IN-)Vocm)V+)OUT+)OUT-)V-)_SHDN)IN+)OUTF-)OUTF+
.tran 1u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6404-2.asy)
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 732
WIRE 208 -48 32 -48
WIRE 416 -48 288 -48
WIRE 192 32 128 32
WIRE 528 32 192 32
WIRE 128 48 128 32
WIRE 192 48 192 32
WIRE 528 48 528 32
WIRE 416 96 416 -48
WIRE 416 96 384 96
WIRE -320 144 -368 144
WIRE -144 144 -240 144
WIRE 32 144 32 -48
WIRE 32 144 -64 144
WIRE 80 144 32 144
WIRE 528 144 528 128
WIRE 416 160 384 160
WIRE -16 192 -32 192
WIRE 80 192 48 192
WIRE 416 224 384 224
WIRE -144 240 -192 240
WIRE 32 240 -64 240
WIRE 80 240 32 240
WIRE 416 288 384 288
WIRE 192 368 192 336
WIRE 32 432 32 240
WIRE 208 432 32 432
WIRE 416 432 416 288
WIRE 416 432 288 432
FLAG -32 192 0
FLAG -368 144 0
FLAG 528 144 0
FLAG -192 240 0
FLAG 192 368 0
SYMBOL voltage -224 144 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 32 56 VTop 2
WINDOW 39 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10m 10Meg)
SYMBOL voltage 528 32 R0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL res 304 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL res 304 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL res -48 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL res -48 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL cap 48 176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL opamps\\LTC6404-2 208 192 R0
SYMATTR InstName U1
TEXT 472 344 Left 2 !.tran 1u
* Z:\tmp\asc_dec_bjh7r6w2\012ca27cc9cf_6200_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R1 OUT N001 1K
V2 -V 0 -5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 0 48 -32 48
WIRE 96 48 0 48
WIRE 208 48 176 48
WIRE 64 112 64 96
WIRE -416 160 -416 144
WIRE -288 160 -288 144
WIRE 0 160 0 48
WIRE 32 160 0 160
WIRE 208 192 208 48
WIRE 208 192 176 192
WIRE 256 192 208 192
WIRE 32 224 -112 224
WIRE -416 272 -416 240
WIRE -288 272 -288 240
SYMBOL res 192 32 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -416 144 R0
SYMATTR InstName V2
SYMATTR Value -5
FLAG -288 272 0
FLAG 64 96 +V
FLAG -288 144 +V
FLAG -416 272 0
FLAG -416 144 -V
FLAG 256 192 OUT
* Z:\home\khalils\Downloads\files\data\raw_asc\0a2417ca8467_Select_Source_by_Param_2.asc
* Generated by LTspice 26.0.1 for Windows.
B1 0 out V=V({s})
V1 1 0 SINE(0 1 5)
V2 2 0 PULSE(0 1 0 .1 .2 .1 .5)
V3 3 0 PULSE(0 1 0 .02 .04 .025 .2)
.param s=1 ;switch parameter
;.step param s 1 3 1
.tran 1
* Select a source V1 ... V3 by switch parameter s
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 176 176 128
WIRE 176 336 176 288
WIRE 176 496 176 448
WIRE 240 128 176 128
WIRE 240 288 176 288
WIRE 240 448 176 448
WIRE 416 176 416 128
WIRE 608 128 416 128
FLAG 416 256 0
FLAG 176 256 0
FLAG 240 128 1
FLAG 176 416 0
FLAG 240 288 2
FLAG 608 128 out
IOPIN 608 128 Out
FLAG 176 576 0
FLAG 240 448 3
SYMBOL bi 416 256 R180
WINDOW 0 24 88 Left 0
WINDOW 3 -83 -59 Left 0
SYMATTR InstName B1
SYMATTR Value V=V({s})
SYMBOL voltage 176 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 5)
SYMBOL voltage 176 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 0 .1 .2 .1 .5)
SYMBOL voltage 176 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 0 .02 .04 .025 .2)
TEXT 384 56 Left 0 !.param s=1  ;switch parameter\n;.step param s 1 3 1
TEXT 158 66 Left 0 !.tran 1
TEXT 152 24 Left 0 ;Select a source V1 ... V3 by switch parameter s
* Z:\home\khalils\Downloads\files\data\raw_asc\5c0e250f86fb_simulacionDiodo1N4007Inversa.asc
* Generated by LTspice 26.0.1 for Windows.
D1 0 N002 1N4007
R1 N002 N001 1K
V1 N001 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -10 1100 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 128 96 48 96
WIRE 256 96 208 96
WIRE 48 128 48 96
WIRE 256 128 256 96
WIRE 48 208 48 192
WIRE 256 208 256 192
WIRE 256 208 48 208
WIRE 48 256 48 208
FLAG 48 256 0
SYMBOL diode 272 192 R180
WINDOW 0 -39 68 Left 2
WINDOW 3 -91 5 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4007
SYMBOL res 224 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL Misc\\cell 48 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
TEXT 72 264 Left 2 !.dc V1 -10 1100 0.1