Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\13d76f5a9003_FailedDiodeRisingEdge.asc
* Generated by LTspice 26.0.1 for Windows.
C4 N004 N001 1e-9
C3 N003 N005 1e-9
D4 N003 N004 D
C1 N005 N007 1e-9
D5 N004 N006 D
D3 N001 N003 D
V2 N002 0 PULSE(0 10 0.00159375 0 0 1e-3 2e-3 2)
C2 N001 0 1e-9
S1 N001 N003 N002 0 switchshort
D1 0 N005 D
C5 N006 N003 1e-9
D2 N005 N001 D
V1 0 N007 PULSE(0 15000 0 0 0 3.125e-5 6.25e-5 30)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2e-3
.plot V(C1)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 -144 48 -144
WIRE -16 -128 -64 -128
WIRE 64 -112 64 -144
WIRE -16 -96 -16 -128
WIRE -64 -80 -64 -128
WIRE 192 -80 96 -80
WIRE 48 -64 48 -144
WIRE 48 0 48 -16
WIRE 48 0 -64 0
WIRE 144 0 96 0
WIRE -240 48 -336 48
WIRE -80 48 -240 48
WIRE -32 48 -80 48
WIRE 80 48 32 48
WIRE 192 48 192 -80
WIRE 192 48 80 48
WIRE 224 48 192 48
WIRE 272 48 224 48
WIRE 384 48 336 48
WIRE 528 48 384 48
WIRE 144 64 144 0
WIRE 192 64 144 64
WIRE -80 112 -144 112
WIRE 80 112 -80 112
WIRE 112 112 80 112
WIRE 192 112 192 64
WIRE 192 112 176 112
WIRE 224 112 192 112
WIRE 384 112 224 112
WIRE 416 112 384 112
WIRE 528 112 480 112
WIRE -336 160 -336 128
WIRE -208 160 -208 112
WIRE -208 160 -336 160
SYMBOL diode 512 48 R0
SYMATTR InstName D5
SYMBOL diode 96 112 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMBOL cap -144 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1e-9
SYMBOL diode 208 48 R0
SYMATTR InstName D3
SYMBOL cap 480 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 1e-9
SYMBOL sw 96 -96 R0
SYMATTR InstName S1
SYMATTR Value switchshort
SYMBOL cap 336 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1e-9
SYMBOL cap 176 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1e-9
SYMBOL voltage -336 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 15000 0 0 0 3.125e-5 6.25e-5 30)
SYMBOL voltage -64 16 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 10 0.00159375 0 0 1e-3 2e-3 2)
SYMBOL diode 400 112 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMBOL cap 32 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1e-9
SYMBOL diode -96 48 R0
SYMATTR InstName D1
FLAG -240 48 0
FLAG -16 -96 0
FLAG 64 -112 0
TEXT -368 168 Left 2 !.tran 2e-3
TEXT -856 160 Left 2 !.plot V(C1)
* Z:\home\khalils\Downloads\files\data\raw_asc\032be66a6662_Hysteresis_dc_plot.asc
* Generated by LTspice 26.0.1 for Windows.
* Hysteresis Curve With DC-Analysis\n \nA table is used to map the linear DC-sweep of V1 to a "nonlinear" DC-sweep from -3V to +3V and back to -3V.\n \nPlot V(out) and Ic(Q1) versus V(in)\nTherefore change the x-axis to V(in) after the first simulation run.
* Schmitt trigger
* Translation Table\n-10 ... +10 -> -1 ... +1 ... -1\n \n / / \\ \n / / \\ \n / / \\
Q2 out N002 N003 0 NPN
R4 N002 N004 12k
V1 in0 0 0
R1 N003 N004 10k
V3 N001 0 12
V2 N004 0 -12
R5 _out N002 10k
R3 N001 out 1k
R2 N001 _out 1k
B1 in 0 V=1.0*Table(V(in0), -1, -1, 0, 1, 1, -1)
Q1 _out in N003 0 NPN
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 -1 1 0.001
.options plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -432 240 -432 288
WIRE -432 160 -432 112
WIRE -256 240 -256 288
WIRE -256 160 -256 112
WIRE 400 256 480 256
WIRE 480 256 480 336
WIRE 480 256 576 256
WIRE 400 -16 400 64
WIRE 400 -96 400 -144
WIRE 400 -144 576 -144
WIRE 576 -144 576 -96
WIRE 576 -16 576 16
WIRE 688 256 688 208
WIRE 688 208 640 208
WIRE 400 64 688 64
WIRE 400 64 400 160
WIRE 688 64 688 96
WIRE 688 176 688 208
WIRE 688 336 688 448
WIRE 688 448 480 448
WIRE 480 448 480 416
WIRE 256 -112 256 -144
WIRE 256 -144 400 -144
WIRE 256 -32 256 0
WIRE 480 496 480 448
WIRE 480 608 480 576
WIRE 336 208 288 208
WIRE 576 16 784 16
WIRE 576 16 576 160
WIRE 688 64 784 64
IOPIN 288 208 In
IOPIN 784 16 Out
SYMBOL res 384 -112 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -432 144 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL bv -256 144 R0
SYMATTR InstName B1
SYMATTR Value V=1.0*Table(V(in0),  -1, -1,   0, 1,   1, -1)
SYMBOL res 672 240 R0
SYMATTR InstName R4
SYMATTR Value 12k
SYMBOL npn 336 160 R0
SYMATTR InstName Q1
SYMBOL voltage 256 -128 R0
SYMATTR InstName V3
SYMATTR Value 12
SYMBOL res 560 -112 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 464 320 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 672 80 R0
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL voltage 480 480 R0
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL npn 640 160 M0
SYMATTR InstName Q2
FLAG -432 288 0
FLAG -432 112 in0
FLAG -256 288 0
FLAG -256 112 in
FLAG 256 0 0
FLAG 480 608 0
FLAG 288 208 in
FLAG 784 16 out
FLAG 784 64 _out
TEXT -440 8 Left 0 !.dc V1 -1 1 0.001
TEXT -456 -368 Left 0 ;Hysteresis Curve With DC-Analysis\n \nA table is used to map the linear DC-sweep of V1 to a "nonlinear" DC-sweep from -3V to +3V and back to -3V.\n \nPlot V(out) and Ic(Q1)  versus V(in)\nTherefore change the x-axis to V(in) after the first simulation run.
TEXT 416 -184 Left 0 ;Schmitt trigger
TEXT -160 40 Left 0 ;Translation Table\n-10 ... +10 -> -1 ... +1 ... -1\n \n         /                      / \\      \n      /                      /       \\    \n   /                      /             \\
TEXT -448 -160 Left 0 !.options plotwinsize=0
* Z:\tmp\asc_dec_bjh7r6w2\09ce5669062e_1398_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 -V 0 -5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 48 64 32 64
WIRE -208 112 -208 96
WIRE -80 112 -80 96
WIRE -208 224 -208 192
WIRE -80 224 -80 192
WIRE 176 240 16 240
WIRE 16 256 16 240
SYMBOL voltage -80 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -208 96 R0
SYMATTR InstName V2
SYMATTR Value -5
FLAG -80 224 0
FLAG -80 96 +V
FLAG -208 224 0
FLAG -208 96 -V
FLAG 32 64 0
FLAG 16 240 IN
* Z:\home\khalils\Downloads\files\data\raw_asc\697e63469ce5_1844-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1844-1.8.asy)
V1 IN 0 5
I1 OUT 0 {iload} load
XU1 IN 0 IN OUT LTC1844-1.8 ;pnba IN)GND)_SHDN)OUT
.dc v1 5 1 10m
.measure DC vdrop WHEN V(out)=1.7
.measure DC dropout param Vdrop-1.7
.param iload=150m
.lib LTC1844-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1940 1316
WIRE 64 80 -32 80
WIRE 80 80 64 80
WIRE 448 80 368 80
WIRE -32 96 -32 80
WIRE 448 96 448 80
WIRE -32 192 -32 176
WIRE 448 192 448 176
WIRE 64 240 64 80
WIRE 80 240 64 240
WIRE 224 304 224 288
SYMBOL LTC1844-1.8 224 160 R0
SYMATTR InstName U1
SYMBOL voltage -32 80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL current 448 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 25 80 Left 2
WINDOW 3 41 44 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMATTR Value {iload}
FLAG 224 304 0
FLAG -32 192 0
FLAG 448 192 0
FLAG 448 80 OUT
FLAG -32 80 IN
TEXT 648 88 Left 2 !.dc v1 5 1 10m
TEXT 648 176 Left 2 !.measure DC vdrop WHEN V(out)=1.7\n.measure DC dropout param Vdrop-1.7
TEXT 648 128 Left 2 !.param iload=150m
* Z:\home\khalils\Downloads\files\data\raw_asc\2125bec8d96d_Lab6Pre1.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N002 N003 N004 0 2N3904
R2 N001 N002 3.9k
R3 N004 0 1k
R1 N001 N003 68k
V1 N001 0 10
R4 N003 0 25k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 10 .5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -64 208 -64
WIRE 208 -48 208 -64
WIRE 208 32 16 32
WIRE 272 80 272 -64
WIRE 272 80 64 80
WIRE 352 80 272 80
WIRE 352 224 352 160
WIRE 352 224 304 224
WIRE 64 272 64 160
WIRE 240 272 64 272
WIRE 64 368 64 272
WIRE 304 368 304 320
WIRE 352 368 304 368
WIRE 144 448 64 448
WIRE 240 448 144 448
WIRE 352 448 240 448
WIRE 16 496 16 32
WIRE 144 496 144 448
WIRE 144 496 16 496
WIRE 240 496 240 448
SYMBOL res 336 64 R0
SYMATTR InstName R2
SYMATTR Value 3.9k
SYMBOL voltage 208 -64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 48 64 R0
SYMATTR InstName R1
SYMATTR Value 68k
SYMBOL npn 240 224 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 48 352 R0
SYMATTR InstName R4
SYMATTR Value 25k
SYMBOL res 336 352 R0
SYMATTR InstName R3
SYMATTR Value 1k
FLAG 240 496 0
TEXT 14 520 Left 2 !.dc V1 0 10 .5
* Z:\home\khalils\Downloads\files\data\raw_asc\d84e47dc8ff5_Vi-Converter_Current_Source.asc
* Generated by LTspice 26.0.1 for Windows.
* Voltage to Current converter (with Grounded Load)
R4 N001 Vp 15K
R1 Vn 0 15K
XU1 Vp Vn N002 N004 N001 LM741/NS ;pnba In+)In-)V+)V-)OUT
RL Vp 0 3.3K
V-Vdd 0 N004 12V
Vss N002 0 12V
R2 N001 Vn 15K
R3 Vp N003 15K
Vin N003 0 4V
.dc Vin 1 8 1
.include C:\Users\Vinod\Documents\LTspiceXVII\LM741.MOD
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 0 128 0
WIRE 544 16 192 16
WIRE 544 48 544 16
WIRE 192 128 192 16
WIRE -128 144 -224 144
WIRE 48 144 48 0
WIRE 48 144 -48 144
WIRE 112 144 48 144
WIRE 160 144 112 144
WIRE 336 160 336 0
WIRE 336 160 224 160
WIRE 432 160 336 160
WIRE 112 176 64 176
WIRE 160 176 112 176
WIRE 544 192 544 128
WIRE 672 192 544 192
WIRE 672 208 672 192
WIRE -224 224 -224 144
WIRE 544 272 544 192
WIRE -64 304 -224 304
WIRE 64 304 64 176
WIRE 64 304 16 304
WIRE 96 304 64 304
WIRE 336 304 336 160
WIRE 336 304 176 304
WIRE -224 352 -224 304
WIRE 64 352 64 304
WIRE 192 432 192 192
WIRE 544 432 544 352
WIRE 544 432 192 432
WIRE -224 464 -224 432
WIRE 64 464 64 432
SYMBOL OpAmps\\opamp2 192 96 R0
SYMATTR InstName U1
SYMATTR Value LM741/NS
SYMBOL voltage 544 256 R0
SYMATTR InstName -Vdd
SYMATTR Value 12V
SYMBOL res 144 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 15K
SYMBOL res 32 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 15K
SYMBOL voltage 544 32 R0
SYMATTR InstName Vss
SYMATTR Value 12V
SYMBOL res -32 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 15K
SYMBOL res 48 336 R0
SYMATTR InstName RL
SYMATTR Value 3.3K
SYMBOL res 192 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 15K
SYMBOL voltage -224 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 4V
FLAG 672 208 0
FLAG -224 224 0
FLAG -224 464 0
FLAG 64 464 0
FLAG 112 144 Vn
FLAG 112 176 Vp
TEXT -320 528 Left 2 !.dc Vin 1 8 1
TEXT -320 616 Left 2 !.include C:\\Users\\Vinod\\Documents\\LTspiceXVII\\LM741.MOD
TEXT -576 -120 Left 5 ;Voltage to Current converter (with Grounded Load)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3020-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3020-1.5.asy)
XU1 OUT MP_01 MP_02 0 N001 MP_03 N001 LT3020-1.5 ;pnba OUT)))GND)_SHDN))IN
C1 OUT 0 2.2
Rload OUT 0 100
V1 N001 0 PWL(0 0 1 10)
.tran 1
.lib LT3020.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 160 -176 160
WIRE 16 160 0 160
WIRE 368 160 304 160
WIRE 464 160 368 160
WIRE 368 176 368 160
WIRE 464 176 464 160
WIRE -176 192 -176 160
WIRE 0 256 0 160
WIRE 16 256 0 256
WIRE 368 272 368 240
WIRE 464 272 464 256
WIRE -176 288 -176 272
WIRE 160 336 160 320
SYMBOL cap 352 176 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL voltage -176 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 448 160 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL PowerProducts\\LT3020-1.5 160 192 R0
SYMATTR InstName U1
FLAG 160 336 0
FLAG 368 272 0
FLAG 464 272 0
FLAG -176 288 0
FLAG 464 160 OUT
TEXT 384 352 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6115.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6115.asy)
I1 N002 0 PULSE(0 400m 1u 100n 100n 50u 100u)
V2 +V 0 12
V1 VS 0 5
R4 OutI 0 4.99k
XU1 N001 OutI N002 OutV OutV VS +V +V 0 LTC6115 ;pnba -IN)OUTI)+IN)FB)OUTV)VS)VIN)+V)GND
R2 +V N002 250m
R1 N001 +V 100
.tran 100u
.lib LTC6115.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 824
WIRE 256 0 256 -48
WIRE -96 32 -160 32
WIRE 0 32 -96 32
WIRE 96 32 80 32
WIRE -96 128 -96 112
WIRE 96 128 -96 128
WIRE 608 128 416 128
WIRE 608 144 608 128
WIRE 96 160 48 160
WIRE 480 192 416 192
WIRE 608 240 608 224
WIRE 512 256 416 256
WIRE 96 288 64 288
WIRE 256 352 256 320
WIRE -96 384 -96 128
WIRE 64 400 64 288
WIRE 512 400 512 256
WIRE 512 400 64 400
WIRE -352 448 -352 416
WIRE -224 448 -224 416
WIRE -96 512 -96 464
WIRE -352 560 -352 528
WIRE -224 560 -224 528
SYMBOL res 592 128 R0
SYMATTR InstName R4
SYMATTR Value 4.99k
SYMBOL voltage -224 432 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 96 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res -112 16 R0
SYMATTR InstName R2
SYMATTR Value 250m
SYMBOL voltage -352 432 R0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL current -96 384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value PULSE(0 400m 1u 100n 100n 50u 100u)
SYMBOL LTC6115 256 160 R0
SYMATTR InstName U1
FLAG 256 352 0
FLAG -224 560 0
FLAG 256 -48 +V
FLAG 480 192 VS
FLAG -224 416 VS
FLAG -352 560 0
FLAG -352 416 +V
FLAG 512 256 OutV
FLAG 608 240 0
FLAG 608 128 OutI
FLAG 48 160 +V
FLAG -160 32 +V
FLAG -96 512 0
TEXT 568 536 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1965B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1965B.asy)
Rload OUT 0 2.5
V1 IN 0 PWL(0 0 1 5)
C1 OUT 0 10
R1 OUT N001 5.11K
R2 N001 0 4.75K
XU1 IN IN 0 OUT N001 LT1965 ;pnba _SHDN)IN)GND)OUT)ADJ
.tran 1 startup
.lib LT1965.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 128 -144 128
WIRE 64 128 48 128
WIRE 400 128 352 128
WIRE 544 128 400 128
WIRE 656 128 544 128
WIRE -144 144 -144 128
WIRE 400 144 400 128
WIRE 544 144 544 128
WIRE 656 144 656 128
WIRE -144 240 -144 224
WIRE 48 240 48 128
WIRE 64 240 48 240
WIRE 400 240 400 224
WIRE 400 240 352 240
WIRE 544 240 544 208
WIRE 656 240 656 224
WIRE 400 256 400 240
WIRE 208 320 208 304
WIRE 400 352 400 336
SYMBOL voltage -144 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 5)
SYMBOL res 384 128 R0
SYMATTR InstName R1
SYMATTR Value 5.11K
SYMBOL res 384 240 R0
SYMATTR InstName R2
SYMATTR Value 4.75K
SYMBOL PowerProducts\\LT1965B 208 192 R0
SYMATTR InstName U1
SYMBOL cap 528 144 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 640 128 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
FLAG 208 320 0
FLAG 400 352 0
FLAG -144 240 0
FLAG 544 240 0
FLAG 656 240 0
FLAG -144 128 IN
FLAG 656 128 OUT
TEXT 504 336 Left 2 !.tran 1 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1175d7c89792_1a.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
I1 N001 N002 3
I2 N002 0 2
.tran 3
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 80 64 80 32
WIRE 80 176 80 144
WIRE 80 400 80 256
WIRE 80 576 80 480
FLAG 80 32 0
FLAG 80 576 0
SYMBOL voltage 80 160 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL current 80 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 3
SYMBOL current 80 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I2
SYMATTR Value 2
TEXT 24 600 Left 2 !.tran 3
* Z:\home\khalils\Downloads\files\data\raw_asc\ba977df796df_Assignment_3b__iii_.asc
* Generated by LTspice 26.0.1 for Windows.
* Negative Half Wave Rectifier Circuit (with 1microF Capacitor) (Ideal)
D1 N002 N001 1N4148
V1 N001 0 SINE(0 311 50) Rser=0.001
C1 N002 0 0.000001
R1 N002 0 1000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 320 64 208 64
WIRE 480 64 384 64
WIRE 608 64 480 64
WIRE 208 112 208 64
WIRE 480 112 480 64
WIRE 608 128 608 64
WIRE 208 240 208 192
WIRE 304 240 208 240
WIRE 480 240 480 192
WIRE 480 240 304 240
WIRE 608 240 608 192
WIRE 608 240 480 240
WIRE 304 272 304 240
SYMBOL diode 384 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL cap 592 128 R0
SYMATTR InstName C1
SYMATTR Value 0.000001
SYMBOL voltage 208 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.001
SYMATTR InstName V1
SYMATTR Value SINE(0 311 50)
SYMBOL res 464 96 R0
SYMATTR InstName R1
SYMATTR Value 1000
FLAG 304 272 0
TEXT 144 272 Left 2 !.tran 0.05
TEXT -8 8 Left 2 ;Negative Half Wave Rectifier Circuit (with 1microF Capacitor) (Ideal)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3021.asc
* Generated by LTspice 26.0.1 for Windows.
R1 OUT N002 130K
R2 N002 0 20K
V1 N001 0 PWL(0 0 1 10)
Rload OUT 0 100
C1 OUT 0 3.3
XU1 MP_01 MP_02 OUT MP_03 MP_04 MP_05 N002 MP_06 N001 0 MP_07 N001 LT3021 ;pnba ))OUT))))ADJ))_SHDN)GND))IN
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3021.asy)
.lib LT3021.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 160 -176 160
WIRE 16 160 0 160
WIRE 352 160 304 160
WIRE 464 160 352 160
WIRE 560 160 464 160
WIRE 464 176 464 160
WIRE 560 176 560 160
WIRE -176 192 -176 160
WIRE 0 256 0 160
WIRE 16 256 0 256
WIRE 352 256 352 240
WIRE 352 256 304 256
WIRE 352 272 352 256
WIRE 464 272 464 240
WIRE 560 272 560 256
WIRE -176 288 -176 272
WIRE 160 336 160 320
WIRE 352 368 352 352
FLAG 160 336 0
FLAG 352 368 0
FLAG 464 272 0
FLAG 560 272 0
FLAG -176 288 0
FLAG 560 160 OUT
SYMBOL res 336 144 R0
SYMATTR InstName R1
SYMATTR Value 130K
SYMBOL res 336 256 R0
SYMATTR InstName R2
SYMATTR Value 20K
SYMBOL voltage -176 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 544 160 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 448 176 R0
SYMATTR InstName C1
SYMATTR Value 3.3
SYMBOL PowerProducts\\LT3021 160 192 R0
SYMATTR InstName U1
TEXT 480 352 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1962-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1962-3.3.asy)
V1 IN 0 PWL(0 0 1 10)
Rload OUT 0 1K
C1 OUT 0 1
XU1 OUT OUT N001 0 IN MP_01 MP_02 IN LT1962-3.3 ;pnba OUT)SENSE)BYP)GND)_SHDN)))IN
.tran 1
.lib LT1962-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 352 32 320 32
WIRE 416 32 352 32
WIRE 512 32 416 32
WIRE 16 48 -208 48
WIRE 32 48 16 48
WIRE 416 48 416 32
WIRE 512 48 512 32
WIRE -208 64 -208 48
WIRE 352 96 352 32
WIRE 352 96 320 96
WIRE 16 144 16 48
WIRE 32 144 16 144
WIRE 416 144 416 112
WIRE 512 144 512 128
WIRE -208 160 -208 144
WIRE 352 160 320 160
WIRE 176 240 176 208
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL LT1962-3.3 176 96 R0
SYMATTR InstName U1
SYMBOL cap 400 48 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMBOL res 496 32 R0
SYMATTR InstName Rload
SYMATTR Value 1K
FLAG -208 160 0
FLAG 416 144 0
FLAG 512 144 0
FLAG 176 240 0
FLAG 512 32 OUT
FLAG -208 48 IN
TEXT 384 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\13baa262fff0_LT6550.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6550.asy)
V2 -V 0 -5
V1 +V 0 5
XU1 N001 0 +V -V N002 LT6550 ;pnba IN)GND)VCC)VEE)OUT
V3 N001 0 SINE(0 1 1K)
.tran 3m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -96 80 -96 64
WIRE -208 144 -416 144
WIRE -416 160 -416 144
WIRE 80 160 0 160
WIRE -640 176 -640 160
WIRE -512 176 -512 160
WIRE -416 256 -416 240
WIRE -640 272 -640 256
WIRE -512 272 -512 256
WIRE -176 272 -176 256
WIRE -96 272 -96 256
SYMBOL voltage -416 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL opamps\\LT6550 -96 160 R0
SYMATTR InstName U1
SYMBOL voltage -640 160 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -512 160 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -512 272 0
FLAG -96 64 +V
FLAG -512 160 +V
FLAG -96 272 -V
FLAG -640 272 0
FLAG -640 160 -V
FLAG -176 272 0
FLAG -416 256 0
TEXT -208 336 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1612.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1612.asy)
R2 OUT N004 215K
C2 N005 0 330p
R3 0 N004 232K
C5 OUT 0 68
XU1 N006 N004 IN 0 N002 N001 N003 IN LT1612 ;pnba Vc)FB)Vin)GND)SW)Boost)_Mode)_SHDN
C1 N001 N002 .1
C3 OUT N004 100p
V1 IN 0 2
L1 N002 OUT 10
R1 N006 N005 33.2K
Rload 0 OUT 10
.tran .5m startup
.lib LT1612.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2524 1536
WIRE 1632 1072 1504 1072
WIRE 1840 1072 1632 1072
WIRE 1504 1088 1504 1072
WIRE 1840 1104 1840 1072
WIRE 1632 1168 1632 1072
WIRE 1680 1168 1632 1168
WIRE 2016 1168 2000 1168
WIRE 2112 1168 2080 1168
WIRE 2176 1168 2112 1168
WIRE 2336 1168 2256 1168
WIRE 1504 1184 1504 1168
WIRE 1680 1248 1648 1248
WIRE 2112 1248 2112 1168
WIRE 2112 1248 2000 1248
WIRE 2176 1248 2160 1248
WIRE 2272 1248 2240 1248
WIRE 1568 1328 1504 1328
WIRE 1680 1328 1648 1328
WIRE 2032 1328 2000 1328
WIRE 2160 1328 2160 1248
WIRE 2160 1328 2032 1328
WIRE 2176 1328 2160 1328
WIRE 2272 1328 2272 1248
WIRE 2272 1328 2256 1328
WIRE 2336 1328 2336 1168
WIRE 2336 1328 2272 1328
WIRE 2432 1328 2336 1328
WIRE 1504 1344 1504 1328
WIRE 2032 1344 2032 1328
WIRE 2336 1344 2336 1328
WIRE 2432 1344 2432 1328
WIRE 1840 1408 1840 1392
WIRE 1504 1424 1504 1408
WIRE 2032 1440 2032 1424
WIRE 2336 1440 2336 1408
WIRE 2432 1440 2432 1424
SYMBOL cap 2016 1184 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
WINDOW 38 0 32 VBottom 2
WINDOW 39 0 32 VBottom 2
WINDOW 40 0 32 VBottom 2
WINDOW 123 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL res 2416 1440 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL res 2016 1440 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 232K
SYMBOL VOLTAGE 1504 1072 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL cap 1488 1344 R0
SYMATTR InstName C2
SYMATTR Value 330p
SYMBOL POWERPRODUCTS\\LT1612 1840 1248 R0
SYMATTR InstName U1
SYMBOL RES 1664 1312 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 38 32 56 VTop 2
WINDOW 39 32 56 VTop 2
WINDOW 40 32 56 VTop 2
WINDOW 123 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 33.2K
SYMBOL cap 2240 1232 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 100p
SYMBOL polcap 2320 1344 R0
SYMATTR InstName C5
SYMATTR Value 68
SYMBOL res 2272 1312 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 215K
SYMBOL ind 2160 1184 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
FLAG 1504 1184 0
FLAG 1840 1408 0
FLAG 1504 1424 0
FLAG 2336 1440 0
FLAG 2032 1440 0
FLAG 2432 1440 0
FLAG 2432 1328 OUT
FLAG 1504 1072 IN
TEXT 2216 1480 Left 2 !.tran .5m startup