Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17760.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 24
L1 N001 OUT 56 Rser=0.48
C2 OUT 0 5.6 Rser=4.6m
Rload OUT 0 {5/0.3}
C3 N003 0 5.6n
R1 OUT N005 95.3k
R2 N005 0 18.2k
R4 N004 0 69.8k
C1 Vcc 0 1
R3 Vcc N006 10k
R5 OUT N002 22
C4 N002 0 100n
XU1 0 IN EN/UVLO N002 N005 0 N006 N001 N003 N004 Vcc 0 MAX17760 ;pnba GND)VIN)EN/UVLO)EXTVCC)FB)MODE)_RESET)LX)SS)RT/SYNC)VCC)PGND
.tran 3.5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17760.asy)
.lib MAX17760.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1252 680
WIRE -96 -128 -112 -128
WIRE 336 -128 -96 -128
WIRE 336 -112 336 -128
WIRE -112 -48 -112 -128
WIRE 176 -48 144 -48
WIRE 560 -48 496 -48
WIRE 704 -48 640 -48
WIRE 832 -48 704 -48
WIRE 928 -48 832 -48
WIRE 992 -48 928 -48
WIRE 1008 -48 992 -48
WIRE 704 -32 704 -48
WIRE 832 -32 832 -48
WIRE 1008 -32 1008 -48
WIRE 832 48 832 32
WIRE -112 64 -112 32
WIRE 48 64 16 64
WIRE 144 64 112 64
WIRE 176 64 144 64
WIRE 704 64 704 48
WIRE 704 64 496 64
WIRE 1008 64 1008 48
WIRE 704 96 704 64
WIRE 928 112 928 -48
WIRE 48 176 0 176
WIRE 176 176 112 176
WIRE 512 176 496 176
WIRE 704 176 704 160
WIRE 32 288 0 288
WIRE 176 288 112 288
WIRE 928 288 928 192
WIRE 928 288 496 288
WIRE 928 304 928 288
WIRE 176 400 144 400
WIRE 560 400 496 400
WIRE 672 400 640 400
WIRE 928 400 928 384
WIRE 336 464 336 448
FLAG -112 64 0
FLAG 0 288 0
FLAG 336 464 0
FLAG 832 48 0
FLAG 1008 64 0
FLAG -96 -128 IN
FLAG 992 -48 OUT
FLAG 0 176 0
FLAG 928 400 0
FLAG 512 176 0
FLAG 144 400 0
FLAG 16 64 0
FLAG 672 400 Vcc
FLAG 704 176 0
FLAG 144 64 Vcc
FLAG 144 -48 EN/UVLO
SYMBOL voltage -112 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL ind 544 -32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 56
SYMATTR SpiceLine Rser=0.48
SYMBOL cap 816 -32 R0
SYMATTR InstName C2
SYMATTR Value 5.6
SYMATTR SpiceLine Rser=4.6m
SYMBOL res 992 -48 R0
SYMATTR InstName Rload
SYMATTR Value {5/0.3}
SYMBOL cap 112 192 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value 5.6n
SYMBOL res 912 96 R0
SYMATTR InstName R1
SYMATTR Value 95.3k
SYMBOL res 912 288 R0
SYMATTR InstName R2
SYMATTR Value 18.2k
SYMBOL res 128 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 69.8k
SYMBOL cap 112 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 656 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 688 -48 R0
SYMATTR InstName R5
SYMATTR Value 22
SYMBOL cap 688 96 R0
SYMATTR InstName C4
SYMATTR Value 100n
SYMBOL MAX17760 336 160 R0
SYMATTR InstName U1
TEXT 808 472 Left 2 !.tran 3.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5687R.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5687R.asy)
XU2 vDAC Vdd 0 vOUT AD5687R Gain=2 ;pnba Vdac)Vdd)GND)Vout
V1 Vdd 0 5
I1 0 0 100 AC 1
CLOAD vOUT 0 10n
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
Vdac1 NC_01 0 1.25
.tran 200u
.lib AD5687R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 272 112 192 112
WIRE 464 112 272 112
WIRE -800 144 -800 112
WIRE 272 160 272 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 100
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL AD5687R -208 112 R0
SYMATTR InstName U2
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2
* Z:\home\khalils\Downloads\files\data\raw_asc\1067bd1d61c5_1c.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N003 0 5
V1 N001 0 5
D1 vout N001 D
D2 vout N002 D
V2 N002 0 0
R1 vout N003 1000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -80 64 -80
WIRE 304 -80 272 -80
WIRE 304 0 304 -80
WIRE 432 0 304 0
WIRE 576 0 432 0
WIRE 208 80 176 80
WIRE 304 80 304 0
WIRE 304 80 272 80
WIRE 432 80 432 0
WIRE 64 144 64 -80
WIRE 176 144 176 80
WIRE 432 192 432 160
WIRE 64 336 64 224
WIRE 176 336 176 224
WIRE 432 336 432 272
IOPIN 576 0 Out
SYMBOL diode 272 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMBOL voltage 64 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 176 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL res 416 64 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL voltage 432 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL diode 272 -96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
FLAG 432 336 0
FLAG 176 336 0
FLAG 64 336 0
FLAG 576 0 vout
TEXT 30 360 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\0fd8d47ac126_SQRL_Resonator_HALF_Wave_Bridge_Rectifier_RF_Diode.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N003 0 68p V=50 Irms=6.2m Rser=2.668 Lser=852p
V1 N001 0 SINE(0 4 30MEG)
R2 N003 N002 5k
R1 N003 N004 5k
D1 N001 N002 SMS3922
R3 N001 0 3k
D2 N004 0 SMS3922
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 4u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1508 680
WIRE 624 32 304 32
WIRE 688 32 624 32
WIRE 800 32 752 32
WIRE 944 32 880 32
WIRE 1056 32 944 32
WIRE 1056 48 1056 32
WIRE 304 96 304 32
WIRE 624 112 624 32
WIRE 944 112 944 32
WIRE 1056 160 1056 128
WIRE 304 256 304 176
WIRE 624 272 624 192
WIRE 944 272 944 176
WIRE 1056 272 1056 224
SYMBOL polcap 928 112 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 68p
SYMATTR InstName C1
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=50 Irms=6.2m Rser=2.668 Lser=852p
SYMBOL res 896 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5k
SYMBOL voltage 304 80 R0
WINDOW 3 -168 -37 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 4 30MEG)
SYMATTR InstName V1
SYMBOL res 608 96 R0
SYMATTR InstName R3
SYMATTR Value 3k
SYMBOL res 1040 32 R0
SYMATTR InstName R1
SYMATTR Value 5k
SYMBOL schottky 1040 160 R0
SYMATTR InstName D2
SYMATTR Value SMS3922
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL schottky 688 48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value SMS3922
SYMATTR Description Diode
SYMATTR Type diode
FLAG 304 256 0
FLAG 1056 272 0
FLAG 944 272 0
FLAG 624 272 0
TEXT 392 248 Left 2 !.tran 4u
* Z:\home\khalils\Downloads\files\data\raw_asc\1fac02f085da_bestCase.asc
* Generated by LTspice 26.0.1 for Windows.
* Settling time 24ns
R4 N005 N010 120
T1 N004 N009 N005 N010 Td=8.25n Z0=120
T4 N003 N008 N004 N009 Td=6.25n Z0=120
T3 N002 N007 N003 N008 Td=3.75n Z0=120
R8 N010 0 10G
R3 N008 N003 1Meg
R5 N007 0 10G
V1 N006 0 PULSE(0 4 0 0 0 80000 80000 1)
R1 N001 N006 120
R2 N007 N002 1Meg
R6 N008 0 10G
T2 N001 0 N002 N007 Td=2.5n Z0=120
R7 N009 0 10G
.tran 0 1us 0 1us
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE -48 16 -128 16
WIRE -48 96 -48 16
WIRE 48 96 -48 96
WIRE 176 96 176 32
WIRE 176 96 144 96
WIRE 272 96 176 96
WIRE 400 96 400 32
WIRE 400 96 368 96
WIRE 512 96 400 96
WIRE 720 96 608 96
WIRE 864 96 864 32
WIRE 864 96 816 96
WIRE -128 128 -128 96
WIRE 48 128 -48 128
WIRE 256 128 256 32
WIRE 256 128 144 128
WIRE 272 128 256 128
WIRE 480 128 480 32
WIRE 480 128 368 128
WIRE 512 128 480 128
WIRE 672 128 608 128
WIRE 720 128 672 128
WIRE 944 128 944 32
WIRE 944 128 816 128
WIRE 256 176 256 128
WIRE 480 176 480 128
WIRE 672 176 672 128
WIRE 944 176 944 128
WIRE -48 208 -48 128
WIRE -48 208 -128 208
WIRE -128 256 -128 208
WIRE 256 272 256 256
WIRE 480 272 480 256
WIRE 672 272 672 256
WIRE 944 272 944 256
SYMBOL res 464 160 R0
SYMATTR InstName R6
SYMATTR Value 10G
SYMBOL tline 320 112 R0
SYMATTR InstName T3
SYMATTR Value Td=3.75n Z0=120
SYMBOL res 272 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1MEG
SYMBOL res 496 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1MEG
SYMBOL tline 96 112 R0
SYMATTR InstName T2
SYMATTR Value Td=2.5n Z0=120
SYMBOL res -144 0 R0
SYMATTR InstName R1
SYMATTR Value 120
SYMBOL voltage -128 112 R0
WINDOW 3 377 96 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 4 0 0 0 80000 80000 1)
SYMATTR InstName V1
SYMBOL res 656 160 R0
SYMATTR InstName R7
SYMATTR Value 10G
SYMBOL tline 768 112 R0
SYMATTR InstName T1
SYMATTR Value Td=8.25n Z0=120
SYMBOL res 240 160 R0
SYMATTR InstName R5
SYMATTR Value 10G
SYMBOL res 928 160 R0
SYMATTR InstName R8
SYMATTR Value 10G
SYMBOL tline 560 112 R0
SYMATTR InstName T4
SYMATTR Value Td=6.25n Z0=120
SYMBOL res 848 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 120
FLAG -128 256 0
FLAG 256 272 0
FLAG 480 272 0
FLAG 672 272 0
FLAG 944 272 0
TEXT -160 280 Left 2 !.tran 0 1us 0 1us
TEXT -144 -96 Left 2 ;Settling time 24ns
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP151-2.6.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP151-2.6.asy)
Rload OUT 0 26
C1 OUT 0 1
V1 IN 0 5
XU1 IN 0 IN MP_01 OUT ADP151-x.x T=1.6Meg ;pnba Vin)GND)EN))Vout
.tran 500u startup
.lib ADP151-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 880 1696 880
WIRE 1984 880 1824 880
WIRE 1696 896 1696 880
WIRE 1984 896 1984 880
WIRE 1696 992 1696 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL VOLTAGE 1696 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\ADP151-2.6 1984 1024 R0
SYMATTR InstName U1
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 26
FLAG 2256 1024 OUT
FLAG 2256 1136 0
FLAG 1696 992 0
FLAG 1696 880 IN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\28c6af5b4b1f_RC-square-wave-response.asc
* Generated by LTspice 26.0.1 for Windows.
* Square wave. Set Vinitial to -200 for on and off simmetry
R1 N002 N001 20
C1 N002 0 0.4m
R2 0 N002 60
V1 N001 0 PULSE(0 80 0 0.001u 0.001u 10ms 20ms 20)
.tran 400ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 680
WIRE 160 80 80 80
WIRE 304 80 240 80
WIRE 352 80 304 80
WIRE 448 80 432 80
WIRE 80 112 80 80
WIRE 304 112 304 80
WIRE 80 208 80 192
WIRE 304 208 304 176
WIRE 304 208 80 208
WIRE 448 208 448 80
WIRE 448 208 304 208
WIRE 80 224 80 208
SYMBOL cap 288 112 R0
SYMATTR InstName C1
SYMATTR Value 0.4m
SYMBOL voltage 80 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 141 166 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 80 0 0.001u 0.001u 10ms 20ms 20)
SYMBOL res 448 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 60
SYMBOL res 256 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20
FLAG 80 224 0
TEXT 48 248 Left 2 !.tran 400ms
TEXT 120 8 Left 2 ;Square wave. Set Vinitial to -200 for on and off simmetry
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP150-2.75.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP150-2.75.asy)
Rload OUT 0 28
V1 IN 0 5
C1 OUT 0 1
XU1 IN 0 IN MP_01 OUT ADP150-x.x T=1.55Meg ;pnba Vin)GND)EN))Vout
.tran 500u startup
.lib ADP150-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 880 1696 880
WIRE 1984 880 1824 880
WIRE 1696 896 1696 880
WIRE 1984 896 1984 880
WIRE 1696 992 1696 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL PowerProducts\\ADP150-2.75 1984 1024 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1696 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 28
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 2256 1024 OUT
FLAG 2256 1136 0
FLAG 1696 992 0
FLAG 1696 880 IN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3212.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3212.asy)
R1 N009 0 11.8K
D1 N004 N006 AOT-2015
XU1 N001 N004 N005 N003 N003 N009 N008 N007 N006 0 N002 N003 LTC3212 ;pnba CP)CPO)LEDEN)Isetb)Isetr)Isetg)ILEDg)ILEDr)ILEDb)GND)CM)Vin
V2 N005 0 PULSE(1 0 40u 10n 10n 100n 200n 15)
D3 N004 N008 AOT-2015
V1 N003 0 3
C2 N001 N002 1
D2 N004 N007 AOT-2015
C1 N004 0 1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LTC3212.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 32 80 32
WIRE 176 32 160 32
WIRE 80 80 80 32
WIRE 176 80 176 32
WIRE -144 128 -176 128
WIRE -32 128 -64 128
WIRE -16 128 -32 128
WIRE 560 128 272 128
WIRE 608 128 560 128
WIRE 608 144 608 128
WIRE -16 192 -192 192
WIRE 384 192 272 192
WIRE 560 192 560 128
WIRE 560 192 448 192
WIRE -192 208 -192 192
WIRE 608 224 608 208
WIRE -32 256 -32 128
WIRE -16 256 -32 256
WIRE 288 256 272 256
WIRE 560 256 560 192
WIRE 560 256 352 256
WIRE -192 304 -192 288
WIRE -32 320 -32 256
WIRE -16 320 -32 320
WIRE 384 320 272 320
WIRE 560 320 560 256
WIRE 560 320 448 320
WIRE -16 384 -80 384
WIRE 288 384 272 384
WIRE -80 400 -80 384
WIRE -80 496 -80 480
SYMBOL cap 592 144 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res -96 384 R0
SYMATTR InstName R1
SYMATTR Value 11.8K
SYMBOL voltage -48 128 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL cap 96 48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL LED 352 240 R90
WINDOW 0 1 10 VLeft 2
WINDOW 3 37 13 VLeft 2
SYMATTR InstName D2
SYMATTR Value AOT-2015
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage -192 192 R0
WINDOW 3 -252 143 Left 2
SYMATTR Value PULSE(1 0 40u 10n 10n 100n 200n 15)
SYMATTR InstName V2
SYMBOL LED 448 304 R90
WINDOW 0 1 10 VLeft 2
WINDOW 3 37 13 VLeft 2
SYMATTR InstName D3
SYMATTR Value AOT-2015
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL LED 448 176 R90
WINDOW 0 1 10 VLeft 2
WINDOW 3 37 13 VLeft 2
SYMATTR InstName D1
SYMATTR Value AOT-2015
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL PowerProducts\\LTC3212 128 256 R0
SYMATTR InstName U1
FLAG -176 128 0
FLAG 288 384 0
FLAG 608 224 0
FLAG -80 496 0
FLAG -192 304 0
TEXT 352 440 Left 2 !.tran 1.5m startup
* Z:\tmp\asc_dec_bjh7r6w2\1402efc88fc6_Swept_Sine3_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
Bc1 fh2 0 I=1/V(f)*I(Vs)-I(Vs)
V1 N002 0 PULSE(1 -1 {kd})
R1 fh2 N001 1k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1680 680
WIRE 64 192 -64 192
WIRE 112 192 64 192
WIRE 144 192 112 192
WIRE 352 192 224 192
WIRE -112 256 -192 256
WIRE -192 272 -192 256
WIRE 112 368 112 192
WIRE 128 368 112 368
WIRE 64 432 64 192
WIRE 160 432 64 432
WIRE 160 464 160 432
WIRE 160 576 160 544
SYMBOL bi 160 464 R0
WINDOW 3 13 86 Left 0
SYMATTR Value I=1/V(f)*I(Vs)-I(Vs)
SYMATTR InstName Bc1
SYMBOL voltage -192 256 R0
WINDOW 0 32 42 Left 0
WINDOW 3 -48 129 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(1 -1 {kd})
SYMBOL res 128 176 M90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 352 336 0
FLAG 128 368 fh2
FLAG -112 208 0
FLAG -192 352 0
FLAG -64 352 0
FLAG 160 576 0
FLAG 64 576 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG419.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG419.asy)
V2 -V 0 -15
V4 IN 0 pulse(0 3.3 0 1u 1u 5m 10m)
V5 D 0 SINE(0 10 2k)
R2 S2 0 1K
XU1 IN S1 D S2 +V -V 0 ADG419 ;pnba IN)S1)D)S2)Vdd)Vss)GND
V1 +V 0 15
R1 S1 0 1K
.tran 30m
.lib ADG419.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -752 -368 -800 -368
WIRE -800 -320 -800 -368
WIRE -1216 -256 -1216 -272
WIRE -1056 -256 -1072 -256
WIRE -912 -256 -976 -256
WIRE -896 -256 -912 -256
WIRE -688 -224 -704 -224
WIRE -656 -224 -688 -224
WIRE -544 -224 -576 -224
WIRE -1008 -192 -1072 -192
WIRE -912 -192 -928 -192
WIRE -896 -192 -912 -192
WIRE -1216 -160 -1216 -176
WIRE -1040 -128 -1072 -128
WIRE -896 -128 -1040 -128
WIRE -1216 -48 -1216 -64
WIRE -1072 -16 -1072 -128
WIRE -736 0 -736 -16
WIRE -864 16 -864 -16
WIRE -832 16 -864 16
WIRE -1216 48 -1216 32
WIRE -1072 80 -1072 64
SYMBOL res -960 -240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL ADG419 -800 -176 R0
SYMATTR InstName U1
SYMBOL voltage -672 -224 R270
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 47 41 VRight 2
WINDOW 3 -46 -22 VRight 2
SYMATTR InstName V5
SYMATTR Value SINE(0 10 2k)
SYMBOL res -912 -176 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -1216 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -1216 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -1072 -32 R0
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
FLAG -1216 48 0
FLAG -1216 -160 0
FLAG -1216 -272 +V
FLAG -1216 -64 -V
FLAG -544 -224 0
FLAG -1072 80 0
FLAG -1072 -256 0
FLAG -1072 -192 0
FLAG -752 -368 +V
FLAG -736 0 0
FLAG -832 16 -V
FLAG -912 -256 S1
FLAG -912 -192 S2
FLAG -688 -224 D
FLAG -1040 -128 IN
TEXT -672 24 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\18295fefb96b_Tab9_1_ftp.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1)/I(vsg)
VBS N001 0 0
VSD 0 N003 250m
M1 0 N002 N003 N001 P_1u l=2u w=30u
VSG 0 N002 1.15 AC 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.ac dec 100 10MEG 10G
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 688
WIRE 320 96 320 80
WIRE 320 192 320 176
WIRE 400 192 320 192
WIRE 448 80 320 80
WIRE 448 112 448 80
WIRE 448 304 448 208
WIRE 528 160 448 160
WIRE 672 80 448 80
WIRE 672 160 608 160
WIRE 672 160 672 80
WIRE 672 208 672 160
WIRE 672 304 448 304
WIRE 672 304 672 288
WIRE 720 80 672 80
WIRE 720 112 720 80
SYMBOL voltage 672 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 41 57 Left 0
WINDOW 3 41 85 Left 0
SYMATTR InstName VSD
SYMATTR Value 250m
SYMBOL voltage 320 80 R0
WINDOW 0 -89 56 Left 0
WINDOW 3 -89 84 Left 0
WINDOW 123 -89 112 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VSG
SYMATTR Value 1.15
SYMATTR Value2 AC 1
SYMBOL voltage 512 160 M90
WINDOW 0 -32 56 VBottom 0
WINDOW 3 -6 99 VBottom 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VBS
SYMATTR Value 0
SYMBOL pmos4 400 112 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=2u w=30u
SYMATTR InstName M1
SYMATTR Value P_1u
FLAG 720 112 0
TEXT 424 336 Left 0 !.ac dec 100 10MEG 10G
TEXT 424 360 Left 0 !.lib cmosedu_models.txt
TEXT 448 56 Left 0 ;Plot Id(M1)/I(vsg)
* Z:\home\khalils\Downloads\files\data\raw_asc\20ad8f2bac8b_invertingOpAmp.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
V2 N001 0 100
R1 Out N002 {Gain}
XU1 0 N002 N001 N003 Out level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R3 N002 In 1
V1 N003 0 -100
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 336 48 272 48
WIRE 160 80 128 80
WIRE 288 80 240 80
WIRE 272 128 272 48
WIRE 272 128 208 128
WIRE 208 144 208 128
WIRE 336 144 336 128
WIRE -48 160 -112 160
WIRE 128 160 128 80
WIRE 128 160 32 160
WIRE 176 160 128 160
WIRE 288 176 288 80
WIRE 288 176 240 176
WIRE 384 176 288 176
WIRE 176 192 128 192
WIRE 128 224 128 192
WIRE 208 240 208 208
WIRE 208 336 208 320
IOPIN -112 160 In
IOPIN 384 176 Out
SYMBOL voltage 208 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -100
SYMBOL res 48 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL res 256 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {Gain}
SYMBOL OpAmps\\UniversalOpAmp 208 176 R0
SYMATTR InstName U1
SYMBOL voltage 336 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 100
FLAG 128 224 0
FLAG -112 160 In
FLAG 384 176 Out
FLAG 208 336 0
FLAG 336 144 0