Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\01523992313a_74HC123_221_Example_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V3 in_a 0 PULSE(0 5 20u 10n 10n 3u 70u)
V1 VCC 0 5V
R3 VCC N001 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 1212
WIRE -176 -400 -176 -416
WIRE -176 -304 -176 -320
WIRE -176 -208 -176 -240
WIRE -176 -112 -176 -128
WIRE -176 48 -176 32
WIRE -176 144 -176 128
WIRE -144 -240 -176 -240
WIRE -112 144 -176 144
WIRE -112 144 -112 96
WIRE -96 -416 -176 -416
WIRE -96 144 -112 144
WIRE 0 96 -112 96
WIRE 0 144 -32 144
WIRE 0 208 -112 208
WIRE 256 -208 256 -240
WIRE 256 -112 256 -128
WIRE 288 -240 256 -240
SYMBOL voltage 256 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 20u 10n 10n 3u 70u)
SYMBOL voltage -176 -416 R0
SYMATTR InstName V1
SYMATTR Value 5V
SYMBOL res -192 32 R0
SYMATTR InstName R3
SYMATTR Value 10k
FLAG -176 -304 0
FLAG -96 -416 VCC
FLAG -176 -112 0
FLAG -144 -240 in_b
FLAG -176 32 VCC
FLAG 256 -112 0
FLAG 288 -240 in_a
FLAG -112 208 in_a
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5691R.asc
* Generated by LTspice 26.0.1 for Windows.
CLOAD NC_01 0 10n
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
V1 Vdd 0 5
Vdac1 NC_02 0 1.25
I1 0 0 1m AC 1
XU1 vDAC Vdd 0 vOUT AD5691R Gain=2 ;pnba Vdac)Vdd)GND)Vout
.tran 200u
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5691R.asy)
.lib AD5691R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 464 112 192 112
WIRE -800 144 -800 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 1m
SYMBOL AD5691R -208 112 R0
SYMATTR InstName U1
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7156-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7156-1.2.asy)
C4 N002 0 1
Rload OUT 0 1.2
C1 OUT 0 10 Rser=10m Lser=1n
XU1 OUT MP_01 OUT N002 N001 N003 N003 N004 IN 0 ADP7156_7 Vreg=2.111 Vref=1.216 ;pnba Vout))Vout_Sense)Byp)EN)Ref_Sense)Ref)Vreg)Vin)GND
C2 N003 0 1
R1 IN N001 100K
V1 IN 0 2.4
C3 N004 0 1 Rser=10m Lser=1n
.tran 5m startup
.lib ADP7156_7.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -144 32
WIRE 80 32 -32 32
WIRE 416 32 400 32
WIRE 464 32 416 32
WIRE 560 32 464 32
WIRE -144 48 -144 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE 416 128 416 32
WIRE 416 128 400 128
WIRE -144 144 -144 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE -16 224 -32 224
WIRE 80 224 48 224
WIRE 416 224 400 224
WIRE 464 224 416 224
WIRE 464 240 464 224
WIRE -16 320 -32 320
WIRE 80 320 48 320
WIRE 416 320 416 224
WIRE 416 320 400 320
WIRE 464 320 464 304
WIRE 240 400 240 384
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 448 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR Value2 Rser=10m
SYMATTR SpiceLine Lser=1n
SYMBOL res 544 32 R0
SYMATTR InstName Rload
SYMATTR Value 1.2
SYMBOL cap 48 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMATTR Value2 Rser=10m
SYMATTR SpiceLine Lser=1n
SYMBOL cap 448 240 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL ADP7156-1.2 240 176 R0
SYMATTR InstName U1
SYMBOL voltage -144 32 R0
SYMATTR InstName V1
SYMATTR Value 2.4
SYMBOL cap 48 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
FLAG 240 400 0
FLAG 464 320 0
FLAG 464 144 0
FLAG -32 320 0
FLAG -32 224 0
FLAG -144 144 0
FLAG 560 144 0
FLAG -144 32 IN
FLAG 560 32 OUT
TEXT 504 368 Left 2 !.tran 5m startup
* Z:\tmp\asc_dec_bjh7r6w2\1740be6cf970_211016polarizacion_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 24 0 24
Q2 c2 b2 c1 0 BC548B
R9 b2 -24 18k
R1 24 b1 33k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3576 680
WIRE -64 -16 -64 -32
WIRE -64 -16 -176 -16
WIRE 720 0 688 0
WIRE -176 16 -176 -16
WIRE -64 16 -64 -16
WIRE 720 16 720 0
WIRE 224 32 224 -80
WIRE 480 32 352 32
WIRE 608 32 576 32
WIRE 688 32 688 0
WIRE 688 32 608 32
WIRE 64 80 64 48
WIRE 160 80 64 80
WIRE 64 144 64 80
WIRE 528 144 528 96
WIRE 224 160 224 128
WIRE 352 160 352 32
WIRE 352 160 224 160
WIRE 720 160 720 96
WIRE 528 176 528 144
WIRE 528 176 464 176
WIRE 592 176 528 176
WIRE 464 192 464 176
WIRE 592 192 592 176
SYMBOL voltage -64 -128 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL npn 576 96 M270
SYMATTR InstName Q2
SYMATTR Value BC548B
SYMBOL res 448 176 R0
SYMATTR InstName R9
SYMATTR Value 18k
SYMBOL res 48 -48 R0
SYMATTR InstName R1
SYMATTR Value 33k
FLAG 608 32 c2
FLAG -64 -112 24
FLAG 64 -32 24
FLAG 592 272 24
FLAG 352 32 c1
FLAG 64 80 b1
FLAG 528 144 b2
FLAG -176 16 0
FLAG -64 96 -24
FLAG 720 160 -24
FLAG 464 272 -24
FLAG 224 -80 24
* Z:\home\khalils\Downloads\files\data\raw_asc\8fac1ca8ce29_1784.asc
* Generated by LTspice 26.0.1 for Windows.
* Single Supply Full Wave Rectifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1784.asy)
V1 +V 0 5
V3 IN 0 SINE(0 1 10)
XU1 0 N001 N002 +V 0 NC_01 LT1784 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN
R2 N001 IN 1K
D1 N002 OUT BAT54
R3 OUT N001 1K
R1 N002 +V 1K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 300m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 16 -48 -96 -48
WIRE 128 -48 96 -48
WIRE 192 -48 128 -48
WIRE 336 -48 272 -48
WIRE 416 -48 336 -48
WIRE -96 -32 -96 -48
WIRE 336 -16 336 -48
WIRE -96 64 -96 48
WIRE 192 64 192 48
WIRE 224 64 192 64
WIRE 336 64 336 48
WIRE 336 64 304 64
WIRE 192 112 192 64
WIRE 128 160 128 -48
WIRE 160 160 128 160
WIRE 336 192 336 64
WIRE 336 192 304 192
WIRE -48 208 -48 192
WIRE 160 224 128 224
WIRE 192 288 192 272
WIRE -48 304 -48 288
SYMBOL opamps\\LT1784 192 192 R0
SYMATTR InstName U1
SYMBOL voltage -96 -48 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 10)
SYMBOL schottky 320 48 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 112 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 288 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL voltage -48 192 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 320 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG -48 304 0
FLAG 192 48 +V
FLAG -48 192 +V
FLAG -96 64 0
FLAG 128 224 0
FLAG 416 -48 OUT
FLAG 192 288 0
FLAG -96 -48 IN
TEXT 376 272 Left 2 !.tran 300m
TEXT 224 -104 Bottom 2 ;Single Supply Full Wave Rectifier
* Z:\tmp\asc_dec_bjh7r6w2\097057c10774_1260_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V2 -V 0 -5
XU1 IN N001 +V -V OUT LT1259 ;pnba In+)In-)V+)V-)OUT
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1260.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -288 144 -288 128
WIRE -160 144 -160 128
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE -288 240 -288 224
WIRE -160 240 -160 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 288 240 256 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL voltage -288 128 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL opamps\\LT1260 192 176 R0
SYMATTR InstName U1
FLAG -160 240 0
FLAG 192 192 +V
FLAG -160 128 +V
FLAG 192 288 -V
FLAG -288 240 0
FLAG -288 128 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 288 240 OUT
FLAG 0 256 IN
* Z:\home\khalils\Downloads\files\data\raw_asc\3aa40318d6a5_400_PushPull.asc
* Generated by LTspice 26.0.1 for Windows.
* RG based on requierd switching times\nRc based on maximum allowed Current through Transistor
;.step param Rc list 1e3 10e3 100e3
R2 N001 N003 100
Q1 N001 BTot N004 0 BC337-25
XM1 N003 G 0 IRF520 ;pnba D)G)S
Q3 BTot B 0 0 BC337-25
V1 N002 0 12
R3 N002 BTot {Rc}
V3 N001 0 30
Q2 0 BTot N004 0 BC327-25
R4 B N005 300
V1 N005 0 PULSE(0 3 0 1e-9 1e-9 2e-6 4e-6)
RG G N004 220
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 010e-6
.include irf520.lib
.param Rc=12/90e-3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -224 -160 -256 -160
WIRE 256 -160 -144 -160
WIRE -256 -32 -256 -160
WIRE -256 -32 -288 -32
WIRE -224 -32 -256 -32
WIRE 16 -32 -144 -32
WIRE 256 -32 256 -160
WIRE 512 -32 256 -32
WIRE 512 -16 512 -32
WIRE 16 16 16 -32
WIRE 256 64 256 -32
WIRE 512 96 512 64
WIRE 192 112 128 112
WIRE 16 144 16 96
WIRE 80 144 16 144
WIRE 128 144 128 112
WIRE 128 144 80 144
WIRE 256 176 256 160
WIRE 336 176 256 176
WIRE 448 176 416 176
WIRE 464 176 448 176
WIRE -304 192 -320 192
WIRE -176 192 -224 192
WIRE -48 192 -176 192
WIRE 128 224 128 144
WIRE 192 224 128 224
WIRE -320 240 -320 192
WIRE 256 288 256 272
WIRE 512 288 512 192
WIRE 512 288 256 288
WIRE -320 352 -320 320
WIRE 16 352 16 240
WIRE 16 352 -320 352
WIRE -320 384 -320 352
WIRE 256 384 256 288
SYMBOL npn -48 144 R0
SYMATTR InstName Q3
SYMATTR Value BC337-25
SYMBOL voltage -128 -160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 30
SYMBOL pnp 192 272 M180
WINDOW 3 29 50 Left 2
SYMATTR Value BC327-25
SYMATTR InstName Q2
SYMBOL voltage -320 224 R0
WINDOW 3 -7 259 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 1e-9 1e-9 2e-6 4e-6)
SYMATTR InstName 1
SYMBOL res 496 -32 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL res 432 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RG
SYMATTR Value 220
SYMBOL nmos 464 96 R0
SYMATTR InstName M1
SYMATTR Value IRF520
SYMATTR Prefix X
SYMBOL voltage -128 -32 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL npn 192 64 R0
WINDOW 3 31 59 Left 2
SYMATTR Value BC337-25
SYMATTR InstName Q1
SYMBOL res 0 0 R0
SYMATTR InstName R3
SYMATTR Value {Rc}
SYMBOL res -208 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 300
FLAG 256 384 0
FLAG -288 -32 0
FLAG -320 384 0
FLAG 448 176 G
FLAG 80 144 BTot
FLAG -176 192 B
TEXT -328 464 Left 2 !.tran 010e-6
TEXT 120 488 Left 2 !.include irf520.lib
TEXT -328 552 Left 2 !;.step param Rc list 1e3 10e3 100e3\n.param Rc=12/90e-3
TEXT 152 576 Left 2 ;RG based on requierd switching times\nRc based on maximum allowed Current through Transistor
* Z:\home\khalils\Downloads\files\data\raw_asc\04f4281e996b_AD8667.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8667.asy)
V1 +V 0 5
Vin IN 0 SINE(0 1 10K)
V2 -V 0 -5
R1 N001 0 10K
R2 OUT N001 10K
Rload OUT 0 10K
XU1 IN N001 +V -V OUT AD8667 ;pnba In+)In-)V+)V-)OUT
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 592 -976 576 -976
WIRE 688 -976 672 -976
WIRE 704 -976 688 -976
WIRE 800 -976 784 -976
WIRE 336 -880 336 -896
WIRE 432 -880 432 -896
WIRE 688 -864 688 -976
WIRE 704 -864 688 -864
WIRE 800 -848 800 -976
WIRE 800 -848 768 -848
WIRE 928 -848 800 -848
WIRE 704 -832 592 -832
WIRE 928 -832 928 -848
WIRE 592 -816 592 -832
WIRE 336 -784 336 -800
WIRE 432 -784 432 -800
WIRE 928 -736 928 -752
WIRE 592 -720 592 -736
SYMBOL res 688 -992 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 432 -896 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 912 -848 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 800 -992 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Opamps\\AD8667 736 -912 R0
SYMATTR InstName U1
SYMBOL voltage 592 -832 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 336 -896 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 336 -896 +V
FLAG 336 -784 0
FLAG 592 -720 0
FLAG 928 -848 OUT
FLAG 592 -832 IN
FLAG 736 -880 +V
FLAG 432 -896 -V
FLAG 736 -816 -V
FLAG 576 -976 0
FLAG 928 -736 0
FLAG 432 -784 0
TEXT 848 -696 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1992.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC1992.asy)
R1 N002 N001 30K
V1 +V 0 2.7
R4 N005 N006 30K
V3 N001 N007 SINE(0 0.5 10K)
XU1 N002 N004 +V N003 N005 -V N004 N006 LTC1992 ;pnba IN-)VOCM)V+)OUT+)OUT-)V-)VMID)IN+
V2 -V 0 0
C2 N005 0 10p
R3 N006 N007 30K
R2 N003 N002 30K
C1 N003 0 10p
.tran 1m
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 768
WIRE 16 336 -48 336
WIRE 192 336 96 336
WIRE 320 336 192 336
WIRE 432 336 400 336
WIRE 496 368 496 352
WIRE 240 400 240 384
WIRE -272 432 -272 416
WIRE -160 432 -160 416
WIRE -48 432 -48 336
WIRE 192 432 192 336
WIRE 208 432 192 432
WIRE 432 448 432 336
WIRE 432 448 368 448
WIRE 496 448 496 432
WIRE 496 448 432 448
WIRE 208 464 192 464
WIRE 192 496 192 464
WIRE 208 496 192 496
WIRE 432 512 368 512
WIRE 496 512 432 512
WIRE -272 528 -272 512
WIRE -160 528 -160 512
WIRE 208 528 192 528
WIRE 496 528 496 512
WIRE 240 576 240 560
WIRE 496 608 496 592
WIRE -48 624 -48 512
WIRE 16 624 -48 624
WIRE 192 624 192 528
WIRE 192 624 96 624
WIRE 304 624 192 624
WIRE 432 624 432 512
WIRE 432 624 384 624
SYMBOL res 416 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 30K
SYMBOL res 112 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 30K
SYMBOL voltage -272 416 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.7
SYMBOL LTC1992 272 480 R0
SYMATTR InstName U1
SYMBOL cap 480 432 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage -48 416 R0
WINDOW 123 40 100 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 0.5 10K)
SYMBOL voltage -160 416 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL res 112 608 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 30K
SYMBOL cap 480 528 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL res 400 608 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 30K
FLAG -272 528 0
FLAG -160 528 0
FLAG -272 416 +V
FLAG -160 416 -V
FLAG 496 352 0
FLAG 496 608 0
FLAG 240 384 +V
FLAG 240 576 -V
TEXT 472 672 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\OP37.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP37.asy)
Vin IN 0 SINE(0 1 10K)
R2 OUT N001 10K
XU1 IN N001 +V -V OUT OP37 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -15
Rload OUT 0 10K
V1 +V 0 15
R1 N001 0 1K
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1168 144 -1184
WIRE 256 -1168 256 -1184
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 144 -1072 144 -1088
WIRE 256 -1072 256 -1088
WIRE 432 -1072 432 -1088
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 144 -1184 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 256 -1184 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL Opamps\\OP37 576 -1168 R0
SYMATTR InstName U1
FLAG 144 -1184 +V
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1184 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 256 -1072 0
FLAG 144 -1072 0
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\05fdd6c026aa_Prob_4b1.asc
* Generated by LTspice 26.0.1 for Windows.
* Short Channel
* l=0.18u w=0.27u
;.dc V1 0 1 1m
V2 Vds2 0 1.8V
V1 Vgs2 0 1
M1 Vds2 Vgs2 0 0 nch_tt l=0.18u w=0.27u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.dc V2 0 1.8 0.01 V1 0 1 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 80 256 80
WIRE 256 96 256 80
WIRE 256 96 112 96
WIRE 112 112 112 96
WIRE 256 112 256 96
WIRE -64 192 -96 192
WIRE 64 192 -64 192
WIRE -64 208 -64 192
WIRE 112 224 112 208
WIRE 256 224 256 192
WIRE -64 304 -64 288
IOPIN -96 192 In
IOPIN 288 80 Out
SYMBOL voltage -64 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL nmos 64 112 R0
SYMATTR InstName M1
SYMATTR Value nch_tt
SYMATTR Value2 l=0.18u w=0.27u
SYMBOL voltage 256 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.8V
FLAG -64 304 0
FLAG 112 224 0
FLAG 256 224 0
FLAG -96 192 Vgs2
FLAG 288 80 Vds2
TEXT 0 24 Left 2 ;Short Channel
TEXT 384 144 Left 2 !.include TSMC180.lib
TEXT 384 200 Left 2 !.dc V2 0 1.8 0.01 V1 0 1 0.2
TEXT 384 176 Left 2 !;.dc  V1 0 1 1m
TEXT 112 264 Left 2 ;l=0.18u w=0.27u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1421.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
V3 N001 0 10
V4 N003 0 pulse(0 3.3 0 1u 1u 5m 10m)
R1 N002 0 300
C1 N002 0 35p
XU1 N003 N002 N001 -V 0 +V ADG1421 ;pnba IN)D)S)Vss)GND)Vdd
.tran 30m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1421.asy)
.lib ADG1421.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -112 -112 -112 -128
WIRE -448 -80 -448 -96
WIRE -304 -48 -336 -48
WIRE -208 -48 -224 -48
WIRE 16 -48 -16 -48
WIRE 112 -48 16 -48
WIRE 16 -16 16 -48
WIRE 112 0 112 -48
WIRE -448 16 -448 0
WIRE -208 16 -304 16
WIRE 16 80 16 64
WIRE 112 80 112 64
WIRE -304 96 -304 16
WIRE -448 112 -448 96
WIRE -160 144 -160 128
WIRE -64 144 -64 128
WIRE -448 208 -448 192
WIRE -304 240 -304 176
FLAG -448 208 0
FLAG -448 16 0
FLAG -448 -96 +V
FLAG -448 96 -V
FLAG -336 -48 0
FLAG -160 144 -V
FLAG -112 -128 +V
FLAG -64 144 0
FLAG -304 240 0
FLAG 16 80 0
FLAG 112 80 0
SYMBOL voltage -448 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -448 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -208 -48 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL voltage -304 80 R0
WINDOW 3 19 116 Left 2
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMATTR InstName V4
SYMBOL res 0 -32 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL cap 96 0 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL ADG1421 -112 0 R0
SYMATTR InstName U1
TEXT 8 248 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\fa6d8caf90c3_Adder.asc
* Generated by LTspice 26.0.1 for Windows.
V3 input 0 SINE(0 2 1k) AC 1
R2 N001 input 1k
R3 vout N001 1k
XU1 0 N001 N002 N003 vout LM741/NS ;pnba In+)In-)V+)V-)OUT
R1 N001 input 1k
V2 N002 0 12
V1 N003 0 -12
.include C:\Users\PRANAV ARYA\Documents\GitHub\ECN351-Lab\LM741.MOD
.tran 0 10m 0 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 -208 208 -208
WIRE -112 -128 -160 -128
WIRE 48 -128 -112 -128
WIRE 80 -128 48 -128
WIRE 272 -112 272 -272
WIRE 160 -96 160 -128
WIRE 208 -96 208 -208
WIRE 208 -96 160 -96
WIRE 240 -96 208 -96
WIRE 352 -80 304 -80
WIRE 368 -80 368 -208
WIRE 368 -80 352 -80
WIRE 48 -64 48 -128
WIRE 80 -64 48 -64
WIRE 160 -64 160 -96
WIRE 240 -64 224 -64
WIRE -160 -48 -160 -128
WIRE 272 48 272 -48
WIRE 224 176 224 -64
SYMBOL voltage 272 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -12
SYMBOL res 176 -80 R90
WINDOW 0 -2 60 VBottom 2
WINDOW 3 45 55 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -160 -64 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value SINE(0 2 1k)
SYMBOL OpAmps\\opamp2 272 -144 R0
WINDOW 3 12 6 Left 2
SYMATTR Value LM741/NS
SYMATTR InstName U1
SYMBOL res 384 -224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 -26 18 VTop 2
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL voltage 272 -256 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL res 176 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 -26 18 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 272 128 0
FLAG 272 -352 0
FLAG -160 32 0
FLAG 224 176 0
FLAG 352 -80 vout
FLAG -112 -128 input
TEXT -192 360 Left 2 !.include C:\\Users\\PRANAV ARYA\\Documents\\GitHub\\ECN351-Lab\\LM741.MOD
TEXT 112 312 Left 2 !.tran 0 10m 0 1m