* Z:\home\khalils\Downloads\files\data\raw_asc\LT7182S.asc
* Generated by LTspice 26.0.1 for Windows.
L1 SW0 OUT0 1 Rser=2.5m
C1 BOOST0 SW0 0.1
C2 OUT0 0 200 Rser=2.5m Lser=.2n
I1 OUT0 0 PULSE(0 6 1.4m 1u 50u 100u) load
V1 VIN 0 12
V2 EXTVCC 0 5
V3 RUN0 0 PWL(500u 0 500.001u 5 3000u 5 3000.001u 0)
C3 0 VDD18 4.7
C4 0 DRVCC 10
C5 0 INTVCC 10
V4 CLK_EXT 0 PULSE(0 5 2.5m 1n 1n 500n 1u 500)
C6 CLK_EXT SYNC/PWM_CFG 1.5n
R1 SYNC/PWM_CFG 0 162k
R2 _ALERT EXTVCC 4700
R3 EXTVCC PGOOD1 10k
R6 PGOOD0 EXTVCC 10k
R7 _FAULT EXTVCC 10k
C7 0 N001 470p
R10 ITH1 N001 15k
L2 SW1 OUT1 470n Rser=2.5m
C8 BOOST1 SW1 0.1
C9 OUT1 0 200 Rser=2.5m Lser=.2n
I2 OUT1 0 PULSE(0 4 1.9m 1u 1u 100u) load
XU1 VIN SW0 0 SW1 BOOST0 BOOST1 DRVCC INTVCC EXTVCC VDD18 _ALERT 0 OUT0 0 RUN0 PGOOD0 ITH1 SYNC/PWM_CFG VIN OUT1 0 PGOOD0 INTVCC PGOOD1 _FAULT _FAULT LT7182S FREQUENCY_SWITCH=1Meg MFR_PWM_PHASE_0=0 VOUT_COMMAND_0=3.3 HPLV_0=0 PulseSkipMode_0=1 ILIM_RANGE_0=2 GMEA_CONTROL_0=3 RITH_0=40k CITH_0=80p OUTPUT_DISCHARGE_0=1 VOUT_UV_FAULT_LIMIT_0=3.069 VOUT_OV_FAULT_LIMIT_0=3.63 VOUT_UV_WARN_LIMIT_0=3.086 VOUT_OV_WARN_LIMIT_0=3.5475 VIN_ON_0=1.5 VIN_OFF_0=1.45 TON_DELAY_0=0.01m TON_RISE_0=0.5m TOFF_DELAY_0=0.1m TOFF_FALL_0=0.3m MFR_PWM_PHASE_1=180 VOUT_COMMAND_1=0.8 HPLV_1=1 PulseSkipMode_1=0 ILIM_RANGE_1=2 GMEA_CONTROL_1=7 RITH_1=40k CITH_1=80p OUTPUT_DISCHARGE_1=1 VOUT_UV_FAULT_LIMIT_1=0.744 VOUT_OV_FAULT_LIMIT_1=0.88 VOUT_UV_WARN_LIMIT_1=0.748 VOUT_OV_WARN_LIMIT_1=0.86 VIN_ON_1=1.4 VIN_OFF_1=1.35 TON_DELAY_1=0.1m TON_RISE_1=0.5m TOFF_DELAY_1=0 TOFF_FALL_1=0.3m ;pnba PVIN0)SW0)SGND)SW1)BOOST0)BOOST1)DRVCC)INTVCC)EXTVCC)VDD18)_ALERT)PGND)VSENSE0P)VSENSE0N)RUN0)PGOOD0)ITH1)SYNC/PWM_CFG)PVIN1)VSENSE1P)VSENSE1N)RUN1)ITH0)PGOOD1)_FAULT0)_FAULT1
.tran 3.6m startup
* NOTES FOR SIMULATION\n \nPlease read the following notes carefully since the model behaves differently from the user \ninterface for the LT7182S.\n \n(1) PMBus communication and memory address related functions and pins are not modeled, \nincluding SDA, SCL, WP. \n(2) Changes to parameter values while the simulation is running will not take effect unless the\nsimulation is stopped and restarted. This is different from the way the part operates which will\nrespond to the changes while running. \n(3) SHARE_CLK is not modeled. The default time reference of LTspice is used as the common time \nbase for all time-related parameters.\n(4) Resistor Configuration pins are not modelled (VOUT0_CFG, VOUT1_CFG, ASEL)\n(5) Initialization time is not modelled. After power is applied to PVIN0 or EXTVCC, the real LT7182S\nrequires 13ms (typical) before power conversion or communication can begin.\n \n \nDESCRIPTION OF PARAMETERS\n \nThe following parameters can be defined by right-clicking on the LT7182S symbol.\nThe nomenclature used here differs from the one in the data sheet. If any value of these parameters is\nset beyond the scope described in the data sheet, the resulting simulation will not be meaningful.:\n \nFREQUENCY_SWITCH -- in Hz, sets switching frequency for both channels\n \nThe parameters below are set independantly for each channel (0 and 1): \nVOUT_COMMAND_n -- in volt, sets output voltage\n \nTON_DELAY_n & TON_RISE_n -- in sec, set turn-on delay and soft-start time\nTOFF_DELAY_n & TOFF_FALL_n -- in sec, set turn-off delay and soft-off time \n \nIlim_range_n -- selects inductor valley current limit option:\n 0 positive valley current limit of 3A, negative valley current limit of -2.3A\n 1 positive valley current limit of 4.5A, negative valley current limit of -3.4A\n 2 positive valley current limit of 6.5A, negative valley current limit of -4A\n 3 positive valley current limit of 8.5A, negative valley current limit of -4.25A \n \nPulseSkipMode_n --sets operation mode: 1 for pulse skip mode, 0 for forced continuous conduction mode\n \nFCM_DURING_TOFF_FALL_n -- if set to 1, channels uses FCM during soft-off ramp-down,\n regardless of PulseSkipMode_n\n \nGMEA_control_n --Sets Error Amp parameters, x=0 to 7\n GmEA = 0.15mS*(x+1)*(1+3*HPLV_n) (relative to VSENSE)\n \nHPLV_n -- if set to 1, selects High-Performance Low-Vout mode (max 1.375Vout, GMEA is 4X higher)\n \nRITH_n --in ohm, programmable internal compensation\n \nCITH_n --in Farad, programmable internal compensation\n \nMFR_PWM_PHASE_n -- in degree, sets the channel phase delay in 15-degree increments \n (this is relative to the SYNC input clock if present).\n \nOutput_discharge--0 for disabled, 1 for 250 Ohm discharge engaged when channel is off or ramping off\n \nVout_UV_Fault_Limit and Vout_OV_Fault_Limit --- in volt, set the fault limits for the PGOOD and /FAULT outputs\n Note channel shuts down if VOUT OV FAULT occurs, or VIN>23.2V, or /FAULT pin is pulled low externally\nVout_UV_Warn_Limit and Vout_OV_Warn_Limit-- in volt, set the warning limit for the /ALERT output
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT7182S.asy)
.lib LT7182S.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4452 996
WIRE -224 -576 -240 -576
WIRE 176 -576 -224 -576
WIRE 336 -576 176 -576
WIRE -240 -560 -240 -576
WIRE 176 -528 176 -576
WIRE 336 -528 336 -576
WIRE -240 -464 -240 -480
WIRE 48 -464 -96 -464
WIRE 528 -464 464 -464
WIRE -96 -448 -96 -464
WIRE 528 -448 528 -464
WIRE -256 -368 -656 -368
WIRE -224 -368 -256 -368
WIRE -192 -368 -224 -368
WIRE -96 -368 -96 -384
WIRE -96 -368 -112 -368
WIRE 16 -368 -96 -368
WIRE 48 -368 16 -368
WIRE 496 -368 464 -368
WIRE 528 -368 528 -384
WIRE 528 -368 496 -368
WIRE 592 -368 528 -368
WIRE 736 -368 672 -368
WIRE 752 -368 736 -368
WIRE 800 -368 752 -368
WIRE 800 -304 800 -368
WIRE -656 -272 -656 -368
WIRE -224 -272 -224 -368
WIRE 48 -272 -224 -272
WIRE 736 -272 736 -368
WIRE 736 -272 464 -272
WIRE -224 -256 -224 -272
WIRE 736 -256 736 -272
WIRE -224 -176 -224 -192
WIRE 48 -176 -224 -176
WIRE 736 -176 736 -192
WIRE 736 -176 464 -176
WIRE -656 -160 -656 -192
WIRE -224 -160 -224 -176
WIRE 736 -160 736 -176
WIRE 800 -160 800 -224
WIRE 0 -80 -624 -80
WIRE 48 -80 0 -80
WIRE 512 -80 464 -80
WIRE -144 16 -192 16
WIRE -16 16 -64 16
WIRE 48 16 -16 16
WIRE 528 16 464 16
WIRE 608 16 528 16
WIRE 752 16 688 16
WIRE -192 112 -192 16
WIRE -144 112 -192 112
WIRE 0 112 -64 112
WIRE 48 112 0 112
WIRE 528 112 464 112
WIRE -192 208 -192 112
WIRE -144 208 -192 208
WIRE 0 208 -64 208
WIRE 48 208 0 208
WIRE 512 208 464 208
WIRE 544 208 512 208
WIRE 624 208 608 208
WIRE -352 304 -368 304
WIRE -192 304 -192 208
WIRE -192 304 -272 304
WIRE -16 304 -192 304
WIRE 48 304 -16 304
WIRE 512 304 464 304
WIRE 544 304 512 304
WIRE 624 304 608 304
WIRE -464 400 -608 400
WIRE -272 400 -464 400
WIRE -160 400 -208 400
WIRE -48 400 -160 400
WIRE 48 400 -48 400
WIRE 512 400 464 400
WIRE 544 400 512 400
WIRE 624 400 608 400
WIRE -160 416 -160 400
WIRE -608 464 -608 400
WIRE 48 496 32 496
WIRE 496 496 464 496
WIRE 528 496 496 496
WIRE 624 496 608 496
WIRE 704 496 688 496
WIRE 176 560 176 544
WIRE 336 560 336 544
FLAG -96 -464 BOOST0
FLAG 16 -368 SW0
FLAG -224 -160 0
FLAG -656 -160 0
FLAG -256 -368 OUT0
FLAG -240 -464 0
FLAG -368 304 0
FLAG -624 0 0
FLAG 0 -80 RUN0
FLAG 624 304 0
FLAG 624 208 0
FLAG 512 304 VDD18
FLAG 512 208 DRVCC
FLAG 624 400 0
FLAG 512 400 INTVCC
FLAG 32 496 INTVCC
FLAG -608 544 0
FLAG -464 400 CLK_EXT
FLAG -48 400 SYNC/PWM_CFG
FLAG -160 496 0
FLAG 752 16 EXTVCC
FLAG 0 208 _ALERT
FLAG 528 16 PGOOD1
FLAG 528 112 _FAULT
FLAG -16 16 PGOOD0
FLAG 0 112 _FAULT
FLAG 512 -80 PGOOD0
FLAG 704 496 0
FLAG 336 560 0
FLAG 176 560 0
FLAG 496 496 ITH1
FLAG 528 -464 BOOST1
FLAG 496 -368 SW1
FLAG 736 -160 0
FLAG 800 -160 0
FLAG 752 -368 OUT1
FLAG -224 -576 VIN
FLAG -16 304 EXTVCC
SYMBOL ind -96 -352 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=2.5m
SYMBOL cap -112 -448 R0
SYMATTR InstName C1
SYMATTR Value 0.1
SYMBOL cap -240 -256 R0
WINDOW 39 39 30 Left 2
SYMATTR SpiceLine Rser=2.5m Lser=.2n
SYMATTR InstName C2
SYMATTR Value 200
SYMBOL current -656 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 31 95 Left 2
WINDOW 3 31 67 Left 2
SYMATTR SpiceLine load
SYMATTR Value PULSE(0 6 1.4m 1u 50u 100u)
SYMATTR InstName I1
SYMBOL voltage -240 -576 R0
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -46 69 Bottom 2
WINDOW 3 46 42 Top 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL voltage -256 304 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -624 -96 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -38 58 Right 2
WINDOW 0 -66 31 Left 2
SYMATTR Value PWL(500u 0 500.001u 5 3000u 5 3000.001u 0)
SYMATTR InstName V3
SYMBOL cap 608 320 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value 4.7
SYMBOL cap 608 224 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL cap 608 416 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C5
SYMATTR Value 10
SYMBOL voltage -608 448 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -34 79 Right 2
WINDOW 0 -55 23 Left 2
SYMATTR Value PULSE(0 5 2.5m 1n 1n 500n 1u 500)
SYMATTR InstName V4
SYMBOL cap -272 384 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C6
SYMATTR Value 1.5n
SYMBOL res -176 400 R0
SYMATTR InstName R1
SYMATTR Value 162k
SYMBOL res -48 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4700
SYMBOL res 704 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res -48 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 10k
SYMBOL res -48 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 10k
SYMBOL cap 688 512 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C7
SYMATTR Value 470p
SYMBOL res 512 512 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R10
SYMATTR Value 15k
SYMBOL ind 576 -352 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 470n
SYMATTR SpiceLine Rser=2.5m
SYMBOL cap 512 -448 R0
SYMATTR InstName C8
SYMATTR Value 0.1
SYMBOL cap 752 -256 M0
WINDOW 39 41 28 Left 2
SYMATTR SpiceLine Rser=2.5m Lser=.2n
SYMATTR InstName C9
SYMATTR Value 200
SYMBOL current 800 -304 R0
WINDOW 123 24 122 Left 2
WINDOW 39 24 101 Left 2
SYMATTR SpiceLine load
SYMATTR Value PULSE(0 4 1.9m 1u 1u 100u)
SYMATTR InstName I2
SYMBOL LT7182S 256 16 R0
WINDOW 3 0 140 Invisible 2
WINDOW 38 0 168 Center 2
SYMATTR InstName U1
TEXT 816 544 Left 2 !.tran 3.6m startup
TEXT 1144 -864 Left 2 ;NOTES FOR SIMULATION\n \nPlease read the following notes carefully since the model behaves differently from the user \ninterface for the LT7182S.\n \n(1) PMBus communication and memory address related functions and pins are not modeled, \nincluding SDA, SCL, WP.  \n(2) Changes to parameter values while the simulation is running will not take effect unless the\nsimulation is stopped and restarted. This is different from the way the part operates which will\nrespond to the changes while running.  \n(3) SHARE_CLK is not modeled. The default time reference of LTspice is used as the common time \nbase for all time-related parameters.\n(4) Resistor Configuration pins are not modelled (VOUT0_CFG, VOUT1_CFG, ASEL)\n(5) Initialization time is not modelled.  After power is applied to PVIN0 or EXTVCC, the real LT7182S\nrequires 13ms (typical) before power conversion or communication can begin.\n \n \nDESCRIPTION OF PARAMETERS\n \nThe following parameters can be defined by right-clicking on the LT7182S symbol.\nThe nomenclature used here differs from the one in the data sheet. If any value of these parameters is\nset beyond the scope described in the data sheet, the resulting simulation will not be meaningful.:\n \nFREQUENCY_SWITCH -- in Hz, sets switching frequency for both channels\n \nThe parameters below are set independantly for each channel (0 and 1): \nVOUT_COMMAND_n -- in volt, sets output voltage\n \nTON_DELAY_n & TON_RISE_n -- in sec, set turn-on delay and soft-start time\nTOFF_DELAY_n & TOFF_FALL_n -- in sec, set turn-off delay and soft-off time \n \nIlim_range_n -- selects inductor valley current limit option:\n   0 positive valley current limit of 3A, negative valley current limit of -2.3A\n   1 positive valley current limit of 4.5A, negative valley current limit of -3.4A\n   2 positive valley current limit of 6.5A, negative valley current limit of -4A\n   3 positive valley current limit of 8.5A, negative valley current limit of -4.25A         \n \nPulseSkipMode_n --sets operation mode: 1 for pulse skip mode, 0 for forced continuous conduction mode\n \nFCM_DURING_TOFF_FALL_n -- if set to 1, channels uses FCM during soft-off ramp-down,\n                                                regardless of PulseSkipMode_n\n \nGMEA_control_n --Sets Error Amp parameters, x=0 to 7\n     GmEA = 0.15mS*(x+1)*(1+3*HPLV_n)  (relative to VSENSE)\n \nHPLV_n -- if set to 1, selects High-Performance Low-Vout mode (max 1.375Vout, GMEA is 4X higher)\n \nRITH_n --in ohm, programmable internal compensation\n \nCITH_n --in Farad, programmable internal compensation\n \nMFR_PWM_PHASE_n -- in degree, sets the channel phase delay in 15-degree increments \n                                        (this is relative to the SYNC  input clock if present).\n \nOutput_discharge--0 for disabled, 1 for 250 Ohm discharge engaged when channel is off or ramping off\n \nVout_UV_Fault_Limit and Vout_OV_Fault_Limit --- in volt, set the fault limits for the PGOOD and /FAULT outputs\n      Note channel shuts down if VOUT OV FAULT occurs, or VIN>23.2V, or /FAULT pin is pulled low externally\nVout_UV_Warn_Limit and Vout_OV_Warn_Limit-- in volt, set the warning limit for the /ALERT output