Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\08271f36200e_fds6680a.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 5
R2 N003 N004 100
V1 N003 0 SINE(0 3 1000)
R1 N001 N002 1k
M1 N002 N004 0 0 FDS6680A
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -128 256 -128 304
WIRE -128 384 -128 432
WIRE 80 272 80 432
WIRE 80 176 80 128
WIRE 80 48 80 0
WIRE 320 304 320 432
WIRE 0 256 32 256
WIRE -80 256 -128 256
WIRE 80 0 320 0
WIRE 320 0 320 224
SYMBOL res -96 272 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL res 64 32 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 320 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -128 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -200 106 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 3 1000)
SYMBOL nmos 32 176 R0
SYMATTR InstName M1
SYMATTR Value FDS6680A
FLAG -128 432 0
FLAG 80 432 0
FLAG 320 432 0
TEXT -242 194 Left 0 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\cbe275dc0224_ClaseD_FET.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N004 N003 24.5p
R1 N004 0 2
SW1 N001 N002 0 A SW1
V1 A 0 PULSE(-2 2 0 0 0 1.1545n 2.309n)
L1 N003 N002 5.51n Rser=0.1
VI N001 0 3
SW2 N002 0 A 0 SW2
.model SW1 SW(Ron=0.1, Roff=1Meg Vt=1)
.tran 0 50n 0 .1p
.model SW2 SW(Ron=0.1, Roff=1Meg Vt=-1)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -832 -656 -1328 -656
WIRE -832 -528 -832 -656
WIRE -880 -512 -1008 -512
WIRE -1328 -320 -1328 -656
WIRE -1008 -288 -1008 -512
WIRE -1008 -288 -1072 -288
WIRE -832 -288 -832 -448
WIRE -608 -288 -832 -288
WIRE -368 -288 -528 -288
WIRE -224 -288 -304 -288
WIRE -1072 -272 -1072 -288
WIRE -224 -176 -224 -288
WIRE -832 -112 -832 -288
WIRE -1008 -48 -1008 -288
WIRE -880 -48 -1008 -48
WIRE -1328 80 -1328 -240
WIRE -832 80 -832 -32
WIRE -832 80 -1328 80
WIRE -640 80 -832 80
WIRE -224 80 -224 -96
WIRE -224 80 -640 80
WIRE -640 96 -640 80
SYMBOL res -240 -192 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL voltage -1328 -336 R0
SYMATTR InstName VI
SYMATTR Value 3
SYMBOL sw -832 -544 R0
SYMATTR InstName SW1
SYMATTR Value SW1
SYMBOL sw -832 -128 R0
SYMATTR InstName SW2
SYMATTR Value SW2
SYMBOL ind -512 -304 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value 5.51n
SYMATTR SpiceLine Rser=0.1
SYMBOL cap -304 -304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 24.5p
SYMBOL voltage -144 -736 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(-2 2 0 0 0 1.1545n 2.309n)
FLAG -144 -640 0
FLAG -144 -720 A
FLAG -640 96 0
FLAG -880 -464 0
FLAG -880 -96 0
FLAG -1072 -272 A
TEXT -144 -584 Left 2 !.model SW1 SW(Ron=0.1, Roff=1Meg Vt=1)
TEXT -1360 120 Left 2 !.tran 0 50n 0 .1p
TEXT -144 -552 Left 2 !.model SW2 SW(Ron=0.1, Roff=1Meg Vt=-1)
* Z:\home\khalils\Downloads\files\data\raw_asc\7ba6bcd91749_Draft5.asc
* Generated by LTspice 26.0.1 for Windows.
vgs1 N002 0 1.2
M1 N001 N002 0 0 NMOS l=90nm w=135nm
vds1 N001 0 1.2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc vds1 0 1.2 0.2 vgs1 0 1.2 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 -64 96 -64
WIRE 96 -16 96 -64
WIRE 16 16 -48 16
WIRE -48 32 -48 16
WIRE 160 32 96 32
WIRE 336 32 336 -64
WIRE 16 64 16 16
WIRE 48 64 16 64
WIRE 96 96 96 80
WIRE 96 96 48 96
WIRE 96 112 96 96
WIRE 160 112 160 32
WIRE 336 112 240 112
WIRE -48 160 -48 112
WIRE 48 160 48 96
WIRE 48 160 -48 160
SYMBOL voltage 336 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vds1
SYMATTR Value 1.2
SYMBOL nmos4 48 -16 R0
SYMATTR InstName M1
SYMATTR Value2 l=90nm w=135nm
SYMBOL voltage -48 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vgs1
SYMATTR Value 1.2
FLAG 96 112 0
FLAG 160 112 0
FLAG 240 112 0
TEXT -80 168 Left 2 !.dc vds1 0 1.2 0.2 vgs1 0 1.2 0.2
* Z:\home\khalils\Downloads\files\data\raw_asc\44bc52c0737d_BT-CE-TRAN.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 N002 0 0 BC547B
Ibb 0 N002 0
V2 N001 0 {Uce}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Ibb 0 200uA 10uA
.step param Uce list 5V 20V
.meas dc Ib find Ib(Q1) when Ic(Q1)=20mA
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 16 208 16
WIRE 208 80 208 16
WIRE 368 96 368 16
WIRE 144 128 32 128
WIRE 32 144 32 128
WIRE 32 256 32 224
WIRE 208 256 208 176
WIRE 368 256 368 176
SYMBOL current 32 224 R180
WINDOW 0 -63 0 Left 2
WINDOW 3 -66 28 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Ibb
SYMATTR Value 0
SYMBOL voltage 368 80 R0
WINDOW 3 35 85 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 35 57 Left 2
SYMATTR Value {Uce}
SYMATTR InstName V2
SYMBOL npn 144 80 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
FLAG 208 256 0
FLAG 32 256 0
FLAG 368 256 0
TEXT 56 272 Left 2 !.dc Ibb 0 200uA 10uA
TEXT 56 288 Left 2 !.step param Uce list 5V 20V
TEXT 56 304 Left 2 !.meas dc Ib find Ib(Q1) when Ic(Q1)=20mA
* Z:\home\khalils\Downloads\files\data\raw_asc\25d3a6513107__Fig4_51_MSD.asc
* Generated by LTspice 26.0.1 for Windows.
E2 N004 0 N003 0 1
EA1 N007 0 N004 0 1.859
Eadd1 N002 0 N005 N006 1
R2 N003 0 50
T1 N002 0 N003 0 Td=10n Z0=50
R1 N001 0 50
EA2 N008 0 N001 0 0.869
Vin N005 0 AC 1
Esum1 N006 0 N007 N008 -1
E1 Vout 0 N001 0 0.01
T2 N004 0 N001 0 Td=10n Z0=50
.AC DEC 100 10k 200MEG
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2740 696
WIRE 1776 -880 1680 -880
WIRE 1680 -864 1680 -880
WIRE 1632 -848 1568 -848
WIRE 816 -736 688 -736
WIRE 1008 -736 912 -736
WIRE 1056 -736 1008 -736
WIRE 1280 -736 1168 -736
WIRE 1312 -736 1280 -736
WIRE 1488 -736 1408 -736
WIRE 1552 -736 1488 -736
WIRE 1568 -736 1568 -848
WIRE 1568 -736 1552 -736
WIRE 688 -720 688 -736
WIRE 1056 -720 1056 -736
WIRE 1120 -720 1056 -720
WIRE 640 -704 512 -704
WIRE 1008 -704 1008 -736
WIRE 1552 -704 1552 -736
WIRE 512 -688 512 -704
WIRE 1008 -592 1008 -624
WIRE 1552 -592 1552 -624
WIRE 512 -576 512 -608
WIRE 640 -496 640 -656
WIRE 848 -480 688 -480
WIRE 1280 -464 1280 -736
WIRE 1280 -464 896 -464
WIRE 720 -432 688 -432
WIRE 720 -352 720 -432
WIRE 848 -352 720 -352
WIRE 1488 -336 1488 -736
WIRE 1488 -336 896 -336
SYMBOL e 848 -496 M0
WINDOW 0 42 44 Left 0
SYMATTR InstName EA1
SYMATTR Value 1.859
SYMBOL tline 1360 -720 R0
WINDOW 0 -18 -31 Left 0
WINDOW 3 -63 53 Left 0
SYMATTR InstName T2
SYMATTR Value Td=10n Z0=50
SYMBOL e 688 -736 R0
WINDOW 0 43 43 Left 0
WINDOW 3 44 74 Left 0
SYMATTR InstName Eadd1
SYMATTR Value 1
SYMBOL tline 864 -720 R0
WINDOW 0 -18 -31 Left 0
WINDOW 3 -63 53 Left 0
SYMATTR InstName T1
SYMATTR Value Td=10n Z0=50
SYMBOL e 1168 -752 R0
WINDOW 0 39 43 Left 0
WINDOW 3 42 71 Left 0
SYMATTR InstName E2
SYMATTR Value 1
SYMBOL res 992 -720 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL voltage 512 -704 R0
WINDOW 0 38 56 Left 0
WINDOW 123 35 82 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMBOL e 640 -512 M0
SYMATTR InstName Esum1
SYMATTR Value -1
SYMBOL res 1536 -720 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL e 848 -368 M0
WINDOW 0 42 44 Left 0
SYMATTR InstName EA2
SYMATTR Value 0.869
SYMBOL e 1680 -880 R0
SYMATTR InstName E1
SYMATTR Value 0.01
FLAG 912 -704 0
FLAG 816 -704 0
FLAG 688 -640 0
FLAG 512 -576 0
FLAG 1776 -880 Vout
FLAG 1552 -592 0
FLAG 1408 -704 0
FLAG 1312 -704 0
FLAG 640 -416 0
FLAG 848 -400 0
FLAG 896 -416 0
FLAG 848 -272 0
FLAG 896 -288 0
FLAG 1632 -800 0
FLAG 1680 -784 0
FLAG 1008 -592 0
FLAG 1168 -656 0
FLAG 1120 -672 0
TEXT 952 -376 Left 0 !.AC DEC 100 10k 200MEG
* Z:\home\khalils\Downloads\files\data\raw_asc\263e18db0ff0_4bit_and-fast.asc
* Generated by LTspice 26.0.1 for Windows.
R1 0 B[3] 100k
R5 Q 0 1
R4 0 B[0] 100k
B1 0 Q I=V(B[3])&V(B[2])&V(B[1])&V(B[0])
B2 0 _Q I=!I(B1)
R3 0 B[1] 100k
R2 0 B[2] 100k
R6 _Q 0 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 80 144 80
WIRE 144 96 144 80
WIRE 192 96 192 80
WIRE 192 240 144 240
WIRE 144 256 144 240
WIRE 192 256 192 240
IOPIN 192 80 Out
IOPIN 192 240 Out
IOPIN -16 96 In
IOPIN -16 176 In
IOPIN -16 256 In
IOPIN -16 336 In
SYMBOL res 176 80 R0
SYMATTR InstName R5
SYMATTR Value 1
SYMBOL bi 144 176 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Invisible 2
SYMATTR InstName B1
SYMATTR Value I=V(B[3])&V(B[2])&V(B[1])&V(B[0])
SYMBOL res 80 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL res 176 240 R0
SYMATTR InstName R6
SYMATTR Value 1
SYMBOL res 80 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res 80 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL bi 144 336 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Invisible 2
SYMATTR InstName B2
SYMATTR Value I=!I(B1)
SYMBOL res 80 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
FLAG 192 80 Q
FLAG 192 240 _Q
FLAG -16 96 B[3]
FLAG -16 176 B[2]
FLAG -16 256 B[1]
FLAG -16 336 B[0]
FLAG 64 96 0
FLAG 64 336 0
FLAG 64 256 0
FLAG 64 176 0
FLAG 144 176 0
FLAG 192 176 0
FLAG 144 336 0
FLAG 192 336 0
* Z:\home\khalils\Downloads\files\data\raw_asc\3d8035b7f281_rectification-v2.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 N002 D
R1 N003 N002 10
V1 N001 0 SINE(0 10 50 0 0 0 0)
L1 N003 0 19m
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 176 96 16 96
WIRE 400 96 240 96
WIRE 624 96 480 96
WIRE 16 160 16 96
WIRE 624 208 624 96
WIRE 16 384 16 240
WIRE 624 384 624 288
WIRE 624 384 16 384
WIRE 624 432 624 384
SYMBOL ind 608 192 R0
SYMATTR InstName L1
SYMATTR Value 19m
SYMBOL res 496 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage 16 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 50 0 0 0 0)
SYMBOL diode 176 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
FLAG 624 432 0
TEXT -16 392 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4221-1B.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Vin 0 PULSE(0 5 0 2n 2n 5u 10u)
V3 N005 0 0
V2 N003 0 5
R1 N006 0 10K
XU1 Vin N003 0 N005 N006 0 N007 N004 0 N001 N002 ADuM4221-1B ;pnba PWM)VDD1)GND1)DISABLE)DT)GNDB)VOB)VDDB)GNDA)VOA)VDDA
C1 Gate_A 0 2.2n
C2 Gate_B 0 2.2n
R2 Gate_A N001 5.11
R3 Gate_B N007 5.11
V4 N004 0 15
V5 N002 0 15
.tran 50u
* GND1 is modeled as common GND
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4221-1B.asy)
.lib ADuM4221-1B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 3080 680
WIRE -1824 -432 -2208 -432
WIRE -1728 -432 -1824 -432
WIRE -1136 -432 -1424 -432
WIRE -1008 -432 -1056 -432
WIRE -880 -432 -1008 -432
WIRE -832 -432 -880 -432
WIRE -1008 -400 -1008 -432
WIRE -2208 -384 -2208 -432
WIRE -1248 -368 -1424 -368
WIRE -1728 -352 -2096 -352
WIRE -1248 -352 -1248 -368
WIRE -1008 -320 -1008 -336
WIRE -1392 -304 -1424 -304
WIRE -2096 -288 -2096 -352
WIRE -1728 -272 -1760 -272
WIRE -1248 -224 -1424 -224
WIRE -1248 -208 -1248 -224
WIRE -1728 -176 -1984 -176
WIRE -1392 -160 -1424 -160
WIRE -1728 -112 -1872 -112
WIRE -1136 -96 -1424 -96
WIRE -1008 -96 -1056 -96
WIRE -880 -96 -1008 -96
WIRE -832 -96 -880 -96
WIRE -1984 -80 -1984 -176
WIRE -1872 -64 -1872 -112
WIRE -1008 -64 -1008 -96
WIRE -1008 32 -1008 0
WIRE -2208 128 -2208 -304
WIRE -2096 128 -2096 -208
WIRE -1984 128 -1984 0
WIRE -1872 128 -1872 16
FLAG -1984 128 0
FLAG -1392 -160 0
FLAG -2208 128 0
FLAG -2096 128 0
FLAG -1824 -432 Vin
FLAG -1392 -304 0
FLAG -1760 -272 0
FLAG -1872 128 0
FLAG -1248 -128 0
FLAG -880 -96 Gate_B
FLAG -880 -432 Gate_A
FLAG -1008 32 0
FLAG -1008 -320 0
FLAG -1248 -272 0
SYMBOL voltage -2208 -400 R0
WINDOW 0 26 98 Left 2
WINDOW 3 33 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 2n 2n 5u 10u)
SYMBOL voltage -1984 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 0
SYMBOL voltage -2096 -304 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res -1888 -80 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL ADuM4221-1B -1568 -336 R0
SYMATTR InstName U1
SYMBOL cap -1024 -400 R0
SYMATTR InstName C1
SYMATTR Value 2.2n
SYMBOL cap -1024 -64 R0
SYMATTR InstName C2
SYMATTR Value 2.2n
SYMBOL res -1040 -448 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5.11
SYMBOL res -1040 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5.11
SYMBOL voltage -1248 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 34 Left 2
WINDOW 3 45 64 Left 2
SYMATTR InstName V4
SYMATTR Value 15
SYMBOL voltage -1248 -368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 43 29 Left 2
WINDOW 3 46 61 Left 2
SYMATTR InstName V5
SYMATTR Value 15
TEXT -1728 8 Left 2 !.tran 50u
TEXT -1728 -16 Left 1 ;GND1 is modeled as common GND
* Z:\tmp\asc_dec_bjh7r6w2\135f19817ce7_1678_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R5 N001 N004 3.4K
R1 N003 N002 30K
R7 N004 N006 100
V2 -V 0 -15
V4 N008 0 SINE(0 1 100)
XU3 N006 SHEILD SHEILD +V -V LT1678 ;pnba IN+)IN-)OUT)VCC)VEE
* Library below included based on ModelFile attribute of instance XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1678.asy)
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2696 680
WIRE -256 -288 -256 -304
WIRE -128 -288 -128 -304
WIRE 144 -240 144 -256
WIRE 352 -208 176 -208
WIRE 416 -208 352 -208
WIRE 512 -208 496 -208
WIRE 544 -208 512 -208
WIRE 640 -208 624 -208
WIRE -256 -192 -256 -208
WIRE -128 -192 -128 -208
WIRE 352 -192 352 -208
WIRE 144 -160 144 -176
WIRE 80 -96 80 -192
WIRE 352 -96 352 -112
WIRE 352 -96 80 -96
WIRE 288 -80 176 -80
WIRE 352 -80 352 -96
WIRE 0 -64 -256 -64
WIRE 48 -64 48 -224
WIRE 48 -64 0 -64
WIRE -256 -32 -256 -64
WIRE 576 -32 576 -48
WIRE 240 -16 240 -32
WIRE 512 -16 512 -208
WIRE 544 -16 512 -16
WIRE 288 0 288 -80
WIRE 288 0 272 0
WIRE 640 0 640 -208
WIRE 176 16 176 -80
WIRE 176 16 80 16
WIRE 208 16 176 16
WIRE 352 16 352 0
WIRE 352 16 320 16
WIRE 544 16 512 16
WIRE 320 32 320 16
WIRE 320 32 272 32
WIRE 352 32 352 16
WIRE 240 64 240 48
WIRE -256 80 -256 48
WIRE 0 80 -256 80
WIRE 48 80 0 80
WIRE -256 96 -256 80
WIRE 352 128 352 112
WIRE 352 128 80 128
WIRE 352 144 352 128
WIRE -256 192 -256 176
WIRE 144 208 144 192
WIRE 80 224 80 128
WIRE 512 240 512 16
WIRE 48 256 48 80
SYMBOL res 336 -208 R0
SYMATTR InstName R5
SYMATTR Value 3.4K
SYMBOL res 640 -224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 30K
SYMBOL res 336 -96 R0
SYMATTR InstName R7
SYMATTR Value 100
SYMBOL voltage -256 -304 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -256 80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value SINE(0 1 100)
SYMBOL opamps\\LT1678 240 16 M0
SYMATTR InstName U3
FLAG -128 -192 0
FLAG 144 192 +V
FLAG -128 -304 +V
FLAG -256 -192 0
FLAG -256 -304 -V
FLAG 576 -48 +V
FLAG 240 -32 +V
FLAG 240 64 -V
FLAG 144 -160 +V
FLAG 144 -256 -V
FLAG -256 192 0
FLAG 80 16 SHEILD
* Z:\tmp\asc_dec_bjh7r6w2\14656555c522_Draft2_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V3 0 N015 10
R8 out N006 10k
C1 N013 0 100n
V2 0 N014 10
R11 N011 0 20.63k
C4 N011 N010 10n
R3 N002 N007 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1476 1428
WIRE 240 -112 240 -144
WIRE 880 -96 688 -96
WIRE -48 -80 -336 -80
WIRE 144 -80 16 -80
WIRE -112 -48 -112 -208
WIRE 624 -48 512 -48
WIRE 512 0 512 -48
WIRE 1072 0 992 0
WIRE 992 48 992 0
WIRE 192 64 192 -144
WIRE 624 64 624 32
WIRE 720 64 624 64
WIRE 880 64 880 -96
WIRE 880 64 800 64
WIRE -112 80 -112 32
WIRE -16 80 -112 80
WIRE 144 80 144 -80
WIRE 144 80 64 80
WIRE 992 128 800 128
WIRE 192 144 64 144
WIRE 800 144 800 128
WIRE 64 160 64 144
WIRE 624 160 624 64
WIRE 768 160 624 160
WIRE -112 176 -112 80
WIRE 32 176 -112 176
WIRE 880 176 880 64
WIRE 880 176 832 176
WIRE 944 176 880 176
WIRE 144 192 144 80
WIRE 144 192 96 192
WIRE 288 192 144 192
WIRE 496 192 400 192
WIRE 560 192 496 192
WIRE 672 192 624 192
WIRE 768 192 672 192
WIRE -272 208 -336 208
WIRE -64 208 -192 208
WIRE 32 208 -64 208
WIRE 672 256 672 192
WIRE -64 272 -64 208
WIRE 496 272 496 192
WIRE 800 288 800 208
WIRE 64 320 64 224
WIRE 496 384 496 336
WIRE 672 384 672 336
WIRE 672 384 496 384
WIRE 496 416 496 384
WIRE 800 416 800 368
WIRE -64 432 -64 336
WIRE 64 448 64 400
SYMBOL voltage 64 416 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL res 816 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R8
SYMATTR Value 10k
SYMBOL cap -80 272 R0
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL voltage 800 384 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 10
SYMBOL res 656 240 R0
SYMATTR InstName R11
SYMATTR Value 20.63k
SYMBOL cap 624 176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 10n
SYMBOL res 80 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
FLAG -64 432 0
FLAG 496 416 0
FLAG 512 0 0
FLAG 944 176 out
FLAG 800 416 0
FLAG 64 448 0
FLAG 240 -112 0
* Z:\tmp\asc_dec_bjh7r6w2\106153839186_URL_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
XU2 0 Y1 +V -V X1 LT1013 ;pnba In+)In-)V+)V-)OUT
V3 Y2 X2 ac 1
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1014.asy)
.lib LT1013.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 240 -112 112
WIRE -80 112 -112 112
WIRE -80 240 -112 240
WIRE -80 272 -96 272
WIRE -48 224 -48 208
WIRE -48 304 -48 288
WIRE 16 112 0 112
WIRE 16 256 -16 256
WIRE 16 256 16 112
WIRE 112 240 112 112
WIRE 144 112 112 112
WIRE 144 240 112 240
WIRE 144 272 128 272
WIRE 176 224 176 208
WIRE 176 304 176 288
WIRE 240 112 224 112
WIRE 240 256 208 256
WIRE 240 256 240 112
SYMBOL opamps\\LT1014 -48 192 R0
SYMATTR InstName U2
SYMBOL voltage 128 112 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 VBottom 0
SYMATTR InstName V3
SYMATTR Value ac 1
FLAG 176 208 +V
FLAG 176 304 -V
FLAG 128 272 0
FLAG 240 112 X2
FLAG 112 112 Y2
FLAG -48 208 +V
FLAG -48 304 -V
FLAG -96 272 0
FLAG 16 112 X1
FLAG -112 112 Y1
* Z:\home\khalils\Downloads\files\data\raw_asc\0951eaa64682_reverse_polarity_protection.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N003 0 4.7n
R2 N002 0 12
R1 N003 0 100k
M1 N001 N003 N002 N002 FDS6975
D1 N003 N002 1N750
V1 N001 0 PULSE(-36 36 1 100n 100n 1 2)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 {2+1u} {2-1u}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 80 -112 80
WIRE 272 80 176 80
WIRE 512 80 272 80
WIRE 272 144 272 80
WIRE -112 176 -112 80
WIRE 512 208 512 80
WIRE 160 256 160 128
WIRE 272 256 272 208
WIRE 272 256 160 256
WIRE 352 256 272 256
WIRE 160 304 160 256
WIRE 352 304 352 256
WIRE -112 416 -112 256
WIRE 160 416 160 384
WIRE 352 416 352 368
WIRE 512 416 512 288
SYMBOL res 144 288 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res 496 192 R0
SYMATTR InstName R2
SYMATTR Value 12
SYMBOL zener 288 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N750
SYMBOL cap 336 304 R0
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL pmos 80 128 R270
SYMATTR InstName M1
SYMATTR Value FDS6975
SYMBOL voltage -112 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -368 103 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(-36 36 1 100n 100n 1 2)
FLAG 160 416 0
FLAG -112 416 0
FLAG 512 416 0
FLAG 352 416 0
TEXT -144 440 Left 2 !.tran 0 {2+1u} {2-1u}
* Z:\home\khalils\Downloads\files\data\raw_asc\379f84aee90f_sim.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 N001 10
R3 N001 0 5
R1 N003 N002 2
RL N003 0 1
I1 0 N001 AC 1
C2 N002 N001 0.1
C1 N003 N002 0.125
.ac dec 1000 0.01 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 96 -80 96
WIRE 64 96 32 96
WIRE 128 96 96 96
WIRE 240 96 208 96
WIRE -144 144 -304 144
WIRE -80 144 -80 96
WIRE -80 144 -144 144
WIRE 64 144 64 96
WIRE 96 144 96 96
WIRE 96 144 64 144
WIRE 240 144 240 96
WIRE 320 144 240 144
WIRE -304 192 -304 144
WIRE -80 192 -80 144
WIRE -32 192 -80 192
WIRE 64 192 64 144
WIRE 64 192 32 192
WIRE 96 192 96 144
WIRE 128 192 96 192
WIRE 240 192 240 144
WIRE 240 192 192 192
WIRE -144 224 -144 144
WIRE 320 224 320 144
WIRE -304 320 -304 272
WIRE -144 320 -144 304
WIRE -144 320 -304 320
WIRE 320 320 320 304
WIRE 320 320 -144 320
WIRE 320 368 320 320
RECTANGLE Normal 272 352 -192 48 2
SYMBOL res 304 208 R0
SYMATTR InstName RL
SYMATTR Value 1
SYMBOL res 48 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL res 224 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL cap 192 176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.125
SYMBOL current -304 272 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 24 -28 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL res -160 208 R0
SYMATTR InstName R3
SYMATTR Value 5
SYMBOL cap 32 176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 0.1
FLAG 320 368 0
TEXT -382 358 Left 2 !.ac dec 1000 0.01 10
* Z:\home\khalils\Downloads\files\data\raw_asc\4390d8985897_current_driven_antenna_with_esd.asc
* Generated by LTspice 26.0.1 for Windows.
I1 N001 0 SINE(0 .02 8k)
D3 0 N001 D
V1 NC_01 NC_02 SINE(0 5 8000)
D4 N001 0 D
L1 N001 0 1 Rser=1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran .001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 80 144 80
WIRE 752 80 416 80
WIRE 144 112 144 80
WIRE 704 176 672 176
WIRE 720 176 704 176
WIRE 752 176 752 80
WIRE 752 176 736 176
WIRE 768 176 752 176
WIRE 416 192 416 80
WIRE 736 240 736 176
WIRE 736 240 704 240
WIRE 416 288 416 272
WIRE 496 288 496 240
WIRE 496 288 416 288
WIRE 672 288 672 176
WIRE 672 288 496 288
WIRE 768 288 768 240
WIRE 768 288 672 288
WIRE 144 304 144 192
WIRE 416 304 416 288
WIRE 416 304 144 304
SYMBOL ind 400 176 R0
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=1
SYMBOL voltage 208 320 R0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 8000)
SYMBOL diode 752 176 R0
SYMATTR InstName D4
SYMBOL current 144 112 R0
SYMATTR InstName I1
SYMATTR Value SINE(0 .02 8k)
SYMBOL diode 688 176 R0
SYMATTR InstName D3
FLAG 416 304 0
TEXT 568 256 Left 2 !.tran .001