Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\2b073a265daf_Comparator2.asc
* Generated by LTspice 26.0.1 for Windows.
* Comparators
A1 1 2 0 0 0 _s1 s1 0 SCHMITT Vhigh=5 trise=10n Vt=0 Vh=1m
V1 1 0 PWL(0 -1 200n 1 400n -1)
B1 0 b1 I=IF(V(1,2)>0, .5, 0)
R1 b1 0 10
C1 b1 0 1n
V2 2 0 0
.tran 0 1u 0 2n
.options plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 96 -112 96
WIRE 144 96 0 96
WIRE 240 96 144 96
WIRE 144 144 144 96
WIRE -448 160 -448 128
WIRE -112 160 -112 96
WIRE 240 160 240 96
WIRE -448 272 -448 240
WIRE -112 288 -112 240
WIRE 144 288 144 224
WIRE 240 288 240 224
WIRE -448 352 -448 320
WIRE -32 400 -64 400
WIRE 80 400 32 400
WIRE -32 432 -64 432
WIRE 80 432 32 432
WIRE -448 464 -448 432
SYMBOL res 128 128 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL bi -112 240 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName B1
SYMATTR Value I=IF(V(1,2)>0, .5, 0)
SYMBOL cap 224 160 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL Digital\\diffschmitt -32 352 R0
SYMATTR InstName A1
SYMATTR Value2 Vhigh=5 trise=10n
SYMATTR SpiceLine Vt=0 Vh=1m
SYMBOL voltage -448 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 -1 200n 1 400n -1)
SYMBOL voltage -448 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
FLAG -112 288 0
FLAG 144 288 0
FLAG 240 288 0
FLAG -448 272 0
FLAG -64 432 2
FLAG -64 400 1
FLAG -448 128 1
FLAG -448 464 0
FLAG -448 320 2
FLAG 80 400 s1
FLAG 80 432 _s1
FLAG 0 96 b1
TEXT -464 32 Left 0 !.tran 0 1u 0 2n
TEXT -464 56 Left 0 !.options plotwinsize=0
TEXT -136 -16 Left 0 ;Comparators
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1612.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input\nPin capacitance and Qinj not included\nParameter performance modeled at 5V supply\nOny one channel is modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1612.asy)
V3 v+ 0 5
V4 v- 0 -5
V2 vIN 0 PULSE(0 2.5 20n 20n 20n 150m 300m)
V1 vS 0 SINE(0 5 20)
C1 vD 0 36p
R1 vD 0 301
XU1 vIN vS vD v- v+ 0 ADG1612 ;pnba IN)S)D)Vss)Vdd)GND
.tran 1
.lib ADG1612.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 832
WIRE 256 112 240 112
WIRE 240 144 240 112
WIRE -80 224 -112 224
WIRE 112 224 0 224
WIRE 144 224 112 224
WIRE 368 224 336 224
WIRE 416 224 368 224
WIRE 528 224 416 224
WIRE 416 256 416 224
WIRE 528 256 528 224
WIRE 112 288 48 288
WIRE 144 288 112 288
WIRE -272 304 -288 304
WIRE -176 304 -192 304
WIRE -288 336 -288 304
WIRE -192 336 -192 304
WIRE 48 336 48 288
WIRE 416 352 416 336
WIRE 528 352 528 320
WIRE 304 416 304 400
WIRE 176 432 176 400
WIRE 192 432 176 432
WIRE -288 464 -288 416
WIRE -192 464 -192 416
WIRE 48 464 48 416
SYMBOL cap 512 256 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -5
SYMBOL voltage -288 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage 16 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 20)
SYMBOL ADG1612 240 272 R0
SYMATTR InstName U1
SYMBOL voltage 48 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 30 177 Left 2
SYMATTR Value PULSE(0 2.5 20n 20n 20n 150m 300m)
SYMATTR InstName V2
SYMBOL res 400 240 R0
SYMATTR InstName R1
SYMATTR Value 301
FLAG -112 224 0
FLAG 48 464 0
FLAG 416 352 0
FLAG 304 416 0
FLAG 368 224 vD
FLAG 112 224 vS
FLAG 112 288 vIN
FLAG 528 352 0
FLAG -272 304 v+
FLAG 256 112 v+
FLAG -288 464 0
FLAG -192 464 0
FLAG -176 304 v-
FLAG 192 432 v-
TEXT 80 528 Left 2 !.tran 1
TEXT -360 -40 Left 2 ;Note:\nSwitch shown for a logic 0 input\nPin capacitance and Qinj not included\nParameter performance modeled at 5V supply\nOny one channel is modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\5865a9fca519_3.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Name: Sricharan Vinoth Kumar\nRoll No: 2024112022
M1 D G 0 N001 CMOSN l=l w=w ad=2.5*l*w as=2.5*l*w pd=5*l+2*w ps=5*l+2*w
V_GS G 0 0
V_BS N001 0 {vb}
V_DS D 0 1.8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include "TSMC_180nm.txt"
.param l=0.18u w=1.8u
.dc V_GS 0 1.8 .01
.param vb = 0
.step param vb list 0 0.9 -0.9
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 400 -64 208 -64
WIRE 400 -32 400 -64
WIRE 400 80 400 48
WIRE 208 96 208 -64
WIRE 208 112 208 96
WIRE 400 144 208 144
WIRE 144 176 0 176
WIRE 160 176 144 176
WIRE 0 192 0 176
WIRE 400 192 400 144
WIRE 208 208 208 192
WIRE 0 288 0 272
WIRE 208 288 208 208
WIRE 208 288 0 288
WIRE 208 304 208 288
WIRE 400 304 400 272
SYMBOL voltage 400 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V_BS
SYMATTR Value {vb}
SYMBOL voltage 0 176 R0
SYMATTR InstName V_GS
SYMATTR Value 0
SYMBOL voltage 400 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V_DS
SYMATTR Value 1.8
SYMBOL nmos4 160 96 R0
SYMATTR InstName M1
SYMATTR Value CMOSN
SYMATTR Value2 l=l w=w ad=2.5*l*w as=2.5*l*w pd=5*l+2*w ps=5*l+2*w
FLAG 400 304 0
FLAG 208 304 0
FLAG 400 80 0
FLAG 208 96 D
FLAG 208 208 S
FLAG 144 176 G
TEXT 360 368 Left 2 !.include "TSMC_180nm.txt"
TEXT 360 400 Left 2 !.param l=0.18u w=1.8u
TEXT -112 368 Left 2 !.dc V_GS 0 1.8 .01
TEXT -128 -136 Left 2 ;Name: Sricharan Vinoth Kumar\nRoll No: 2024112022
TEXT -112 400 Left 2 !.param vb = 0
TEXT -112 432 Left 2 !.step param vb list 0 0.9 -0.9
* Z:\home\khalils\Downloads\files\data\raw_asc\4078f3c3a626_1001S8.asc
* Generated by LTspice 26.0.1 for Windows.
* Precision Absolute Value Circuit
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001S8.asy)
R4 N003 N002 10K
R3 N005 N001 10K
V3 IN 0 SINE(0 10 100)
D2 N004 N005 1N4148
R2 N001 IN 10K
V2 -V 0 -15
XU1 0 N001 +V -V N004 LT1001 ;pnba In+)In-)V+)V-)OUT
R1 N002 N001 10K
R5 OUT N003 10K
XU2 N005 N003 +V -V OUT LT1001 ;pnba In+)In-)V+)V-)OUT
D1 N002 N004 1N4148
V1 +V 0 15
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -16 96 -96 96
WIRE 112 96 64 96
WIRE 160 96 112 96
WIRE 336 96 240 96
WIRE 384 96 336 96
WIRE 480 96 464 96
WIRE 496 96 480 96
WIRE 608 96 576 96
WIRE -96 128 -96 96
WIRE 336 128 336 96
WIRE 192 208 192 192
WIRE 528 208 528 192
WIRE 112 224 112 96
WIRE 160 224 112 224
WIRE 480 224 480 96
WIRE 496 224 480 224
WIRE -96 240 -96 208
WIRE 336 240 336 192
WIRE 336 240 224 240
WIRE 608 240 608 96
WIRE 608 240 560 240
WIRE 640 240 608 240
WIRE 160 256 144 256
WIRE 496 256 480 256
WIRE 192 288 192 272
WIRE 336 288 336 240
WIRE 528 288 528 272
WIRE -96 336 -96 320
WIRE 0 336 0 320
WIRE 112 384 112 224
WIRE 160 384 112 384
WIRE 336 384 336 352
WIRE 336 384 240 384
WIRE 480 384 480 256
WIRE 480 384 336 384
WIRE -96 448 -96 416
WIRE 0 448 0 416
SYMBOL res 256 368 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL diode 320 128 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL opamps\\LT1001S8 528 176 R0
SYMATTR InstName U2
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 592 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R5
SYMATTR Value 10K
SYMBOL voltage -96 320 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 80 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL opamps\\LT1001S8 192 176 R0
SYMATTR InstName U1
SYMBOL res 480 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL voltage -96 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 10 100)
SYMBOL diode 320 288 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL voltage 0 320 R0
SYMATTR InstName V1
SYMATTR Value 15
FLAG 0 448 0
FLAG 192 192 +V
FLAG 0 320 +V
FLAG 192 288 -V
FLAG -96 448 0
FLAG -96 320 -V
FLAG -96 240 0
FLAG 528 192 +V
FLAG 528 288 -V
FLAG 144 256 0
FLAG -96 96 IN
FLAG 640 240 OUT
TEXT 536 352 Left 0 !.tran 30m
TEXT 256 40 Bottom 0 ;Precision Absolute Value Circuit
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6605-7.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\FilterProducts\LTC6605-7.asy)
R2 0 N005 300
XU1 N001 N004 +V N004 N006 N005 0 -V +V N003 LTC6605-7 ;pnba IN4+)IN1+)BIAS)IN1-)IN4-)OUT+)Vocm)V-)V+)OUT-1
E2 0 N006 N002 0 .5
E3 OUT 0 N005 N003 1
R1 0 N003 300
V3 N002 0 AC 1
V2 -V 0 -1.5
V1 +V 0 1.5
E1 N001 0 N002 0 .5
.ac oct 20 100K 100Meg
.measure pt1 find V(out) at 3.5Meg
.measure pt2 find V(out) at 5.25Meg
.measure pt3 find V(out) at 7Meg
.measure pt4 find V(out) at 14Meg
.measure pt5 find V(out) at 35Meg
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1756 680
WIRE -304 -32 -304 -48
WIRE -192 -32 -192 -48
WIRE 336 32 336 16
WIRE -304 64 -304 48
WIRE -192 64 -192 48
WIRE 64 64 -64 64
WIRE -64 96 -64 64
WIRE -112 112 -176 112
WIRE 512 112 480 112
WIRE 528 112 512 112
WIRE 624 112 608 112
WIRE 64 128 0 128
WIRE 736 128 672 128
WIRE 672 144 672 128
WIRE -112 160 -128 160
WIRE 480 160 480 112
WIRE 480 160 432 160
WIRE 512 160 512 112
WIRE 624 160 512 160
WIRE -64 192 -64 176
WIRE -64 192 -96 192
WIRE 64 192 48 192
WIRE -64 208 -64 192
WIRE 624 208 512 208
WIRE -176 224 -176 112
WIRE -112 224 -176 224
WIRE 480 224 432 224
WIRE 672 240 672 224
WIRE 0 256 0 128
WIRE 64 256 0 256
WIRE 480 256 480 224
WIRE 512 256 512 208
WIRE 512 256 480 256
WIRE 528 256 512 256
WIRE 624 256 608 256
WIRE -112 272 -128 272
WIRE 448 288 432 288
WIRE -176 320 -176 224
WIRE -64 320 -64 288
WIRE 64 320 -64 320
WIRE 336 368 336 352
WIRE -176 416 -176 400
SYMBOL e2 672 128 R0
SYMATTR InstName E3
SYMATTR Value 1
SYMBOL voltage -304 -48 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL res 624 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 300
SYMBOL voltage -192 -48 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V2
SYMATTR Value -1.5
SYMBOL e -64 192 R0
SYMATTR InstName E2
SYMATTR Value .5
SYMBOL res 624 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL e -64 80 R0
SYMATTR InstName E1
SYMATTR Value .5
SYMBOL voltage -176 304 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL LTC6605-7 256 192 R0
SYMATTR InstName U1
FLAG -304 64 0
FLAG -192 64 0
FLAG 448 288 0
FLAG -304 -48 +V
FLAG -96 192 0
FLAG -128 160 0
FLAG -128 272 0
FLAG -176 416 0
FLAG 672 240 0
FLAG 736 128 OUT
FLAG 624 112 0
FLAG 624 256 0
FLAG -192 -48 -V
FLAG 336 16 +V
FLAG 48 192 +V
FLAG 336 368 -V
TEXT 480 480 Left 2 !.ac oct 20 100K 100Meg
TEXT 472 328 Left 2 !.measure pt1 find V(out) at 3.5Meg\n.measure pt2 find V(out) at 5.25Meg\n.measure pt3 find V(out) at 7Meg\n.measure pt4 find V(out) at 14Meg\n.measure pt5 find V(out) at 35Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\0574390effa5_Trans2.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N002 0 100
L2 0 N003 250m
R1 N002 N001 400
R2 N003 0 0.1m
V1 N001 0 SINE(0 310 50 0 0)
.tran 0 1.1 1 0.1m
K L1 L2 0.9
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 64 -80 64
WIRE 208 64 128 64
WIRE 400 64 272 64
WIRE -80 96 -80 64
WIRE 208 96 208 64
WIRE 272 96 272 64
WIRE 400 96 400 64
WIRE -80 208 -80 176
WIRE 208 208 208 176
WIRE 272 208 272 176
WIRE 400 208 400 176
FLAG -80 208 0
FLAG 208 208 0
FLAG 272 208 0
FLAG 400 208 0
SYMBOL ind2 192 80 R0
WINDOW 0 -29 36 Left 0
WINDOW 3 -43 80 Left 0
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR Type ind
SYMBOL ind2 288 192 R180
WINDOW 0 -38 80 Left 0
WINDOW 3 -69 31 Left 0
SYMATTR InstName L2
SYMATTR Value 250m
SYMATTR Type ind
SYMBOL res 144 48 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 400
SYMBOL res 384 80 R0
SYMATTR InstName R2
SYMATTR Value 0.1m
SYMBOL voltage -80 80 R0
WINDOW 3 21 100 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 310 50 0 0)
SYMATTR InstName V1
TEXT -16 224 Left 0 !.tran 0 1.1 1 0.1m
TEXT 184 40 Left 0 !K L1 L2 0.9
* Z:\tmp\asc_dec_bjh7r6w2\16ca5e4d633a_dsm_step3_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N006 N002 V+ 0 N003 ADA4522-1 ;pnba In+)In-)V+)V-)OUT
V2 V+ 0 3.3
A1 N003 0 0 0 0 0 N005 0 BUF Vhigh=3.3, Vlow=0, Vt=1.6
V3 N006 0 1.6
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4522.asy)
.lib ADA4522-1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1752 680
WIRE 608 -112 544 -112
WIRE 544 -96 544 -112
WIRE 1568 -96 688 -96
WIRE 688 -48 688 -96
WIRE 720 -48 688 -48
WIRE 832 -48 800 -48
WIRE 944 -48 896 -48
WIRE 544 16 544 -16
WIRE 880 32 864 32
WIRE 880 80 880 32
WIRE 720 96 656 96
WIRE 800 96 800 -48
WIRE 848 96 800 96
WIRE 1344 96 1184 96
WIRE 944 112 944 -48
WIRE 944 112 912 112
WIRE 1120 112 944 112
WIRE 656 128 656 96
WIRE 848 128 800 128
WIRE 1344 144 1280 144
WIRE 800 160 800 128
WIRE 1120 160 1120 144
WIRE 1280 160 1280 144
WIRE 880 176 880 144
SYMBOL OpAmps\\ADA4522 880 48 R0
SYMATTR InstName U1
SYMBOL voltage 544 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL Digital\\buf 1120 48 R0
WINDOW 0 8 -1 Left 2
WINDOW 3 -99 19 Left 2
SYMATTR InstName A1
SYMATTR Value Vhigh=3.3, Vlow=0, Vt=1.6
SYMBOL voltage 800 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 1.6
FLAG 656 208 0
FLAG 864 32 V+
FLAG 544 16 0
FLAG 608 -112 V+
FLAG 1120 160 0
FLAG 1280 240 0
FLAG 800 240 0
FLAG 880 176 0
* Z:\home\khalils\Downloads\files\data\raw_asc\37405ac0a07f_AnalogVdivider_noise.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac dec 10 1 10k
D1 analog_out 3v3 BAT54
R3 N002 0 150k
C2 analog_out 0 10n V=50
R2 N001 N002 100k
V1 analog_in 0
C1 N001 0 100n V=50
R1 N001 analog_in 10
R4 analog_out N002 1k
V2 3v3 0 3.3
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.noise V(analog_out) V1 oct 10 1 16k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE 64 112 -160 112
WIRE 208 112 144 112
WIRE 384 112 208 112
WIRE 720 112 720 0
WIRE 208 224 208 176
WIRE 384 256 384 192
WIRE 528 256 384 256
WIRE 720 256 720 176
WIRE 720 256 608 256
WIRE 912 256 720 256
WIRE 384 320 384 256
WIRE 720 320 720 256
WIRE -432 400 -432 336
WIRE -240 400 -240 304
WIRE 384 448 384 400
WIRE 720 448 720 384
WIRE -432 544 -432 480
WIRE -240 544 -240 480
SYMBOL voltage -240 384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL res 368 304 R0
SYMATTR InstName R3
SYMATTR Value 150k
SYMBOL res 160 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL schottky 736 176 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 368 96 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL voltage -432 384 R0
WINDOW 3 24 152 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL res 624 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL cap 192 112 R0
SYMATTR InstName C1
SYMATTR Value 100n
SYMATTR SpiceLine V=50
SYMBOL cap 704 320 R0
SYMATTR InstName C2
SYMATTR Value 10n
SYMATTR SpiceLine V=50
FLAG 912 256 analog_out
FLAG -160 112 analog_in
FLAG 384 448 0
FLAG 720 448 0
FLAG 720 0 3v3
FLAG 208 224 0
FLAG -432 336 3v3
FLAG -432 544 0
FLAG -240 544 0
FLAG -240 304 analog_in
TEXT 480 520 Left 2 ;.ac dec 10 1 10k
TEXT 480 552 Left 2 !.noise V(analog_out) V1 oct 10 1 16k
* Z:\home\khalils\Downloads\files\data\raw_asc\16ecfc1e4410_AD8538.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8538.asy)
Rload OUT 0 10K
V2 -V 0 -2.5
R2 OUT N001 10K
V1 +V 0 2.5
Vin IN 0 SINE(0 1 10K)
XU1 IN N001 +V -V OUT AD8538 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 10K
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 384 -1104 368 -1104
WIRE 480 -1104 464 -1104
WIRE 496 -1104 480 -1104
WIRE 592 -1104 576 -1104
WIRE 144 -992 144 -1008
WIRE 256 -992 256 -1008
WIRE 480 -992 480 -1104
WIRE 496 -992 480 -992
WIRE 592 -976 592 -1104
WIRE 592 -976 560 -976
WIRE 704 -976 592 -976
WIRE 496 -960 384 -960
WIRE 704 -960 704 -976
WIRE 384 -944 384 -960
WIRE 144 -896 144 -912
WIRE 256 -896 256 -912
WIRE 704 -864 704 -880
WIRE 384 -848 384 -864
SYMBOL voltage 384 -960 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 480 -1120 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 144 -1008 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 256 -1008 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 688 -976 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 592 -1120 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Opamps\\AD8538 528 -1040 R0
SYMATTR InstName U1
FLAG 144 -1008 +V
FLAG 144 -896 0
FLAG 384 -848 0
FLAG 704 -976 OUT
FLAG 384 -960 IN
FLAG 528 -1008 +V
FLAG 256 -1008 -V
FLAG 528 -944 -V
FLAG 368 -1104 0
FLAG 704 -864 0
FLAG 256 -896 0
TEXT 736 -768 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\1a27daebfc20_spark_gap.asc
* Generated by LTspice 26.0.1 for Windows.
B1 current_check 0 V=IF(I(S1) < -500m, 100V, -10V)
R1 spark_control voltage_check 100
RFlux_Losses1 SPARK[T] sgt 2.5K
Carc_capacitance1 SPARK[T] SPARK[B] 3p
RSpark_Resistance_guess1 sgt N001 -0.5
S1 N001 SPARK[B] spark_control P001 SW
B2 voltage_check 0
R2 spark_control current_check 100
R3 0 P001 100
Lead_Inductance1 sgt SPARK[T] 130n
RLeakage1 SPARK[T] SPARK[B] 100Meg
.model sw sw
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2128 820
WIRE 192 -144 -80 -144
WIRE 256 -144 192 -144
WIRE 432 -144 256 -144
WIRE 464 -144 432 -144
WIRE 192 -128 192 -144
WIRE 256 -128 256 -144
WIRE 432 -64 432 -144
WIRE 224 -48 192 -48
WIRE 256 -48 224 -48
WIRE 464 48 464 -144
WIRE 224 96 224 -48
WIRE 224 144 224 96
WIRE -288 272 -288 256
WIRE -272 272 -288 272
WIRE -288 288 -288 272
WIRE 224 304 224 224
WIRE -176 368 -288 368
WIRE 176 368 -176 368
WIRE -288 464 -288 448
WIRE -272 464 -288 464
WIRE -288 480 -288 464
WIRE 224 608 224 384
WIRE 224 608 -80 608
WIRE 432 608 432 16
WIRE 432 608 224 608
WIRE 464 608 464 112
WIRE 464 608 432 608
IOPIN -80 -144 BiDir
IOPIN -80 608 BiDir
SYMBOL ind 208 -32 R180
WINDOW 0 41 70 Left 2
WINDOW 3 43 43 Left 2
SYMATTR InstName Lead_Inductance1
SYMATTR Value 130n
SYMBOL res 208 128 R0
WINDOW 0 -11 38 Right 2
WINDOW 3 -14 65 Right 2
SYMATTR InstName Spark_Resistance_guess1
SYMATTR Value -0.5
SYMBOL bv -288 464 R0
WINDOW 0 24 16 Invisible 2
WINDOW 3 -42 54 Right 2
SYMATTR InstName B1
SYMATTR Value V=IF(I(S1) < -500m, 100V, -10V)
SYMBOL res 416 -80 R0
WINDOW 0 -100 46 Left 2
WINDOW 3 -121 76 Left 2
SYMATTR InstName Leakage1
SYMATTR Value 100MEG
SYMBOL sw 224 288 R0
SYMATTR InstName S1
SYMBOL cap 448 48 R0
WINDOW 0 51 24 Left 2
WINDOW 3 51 51 Left 2
SYMATTR InstName arc_capacitance1
SYMATTR Value 3p
SYMBOL res -304 352 R0
WINDOW 0 -34 43 Invisible 2
WINDOW 3 -41 51 Left 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL res 240 -144 R0
WINDOW 0 38 39 Left 2
WINDOW 3 39 66 Left 2
SYMATTR InstName Flux_Losses1
SYMATTR Value 2.5K
SYMBOL res -272 384 R180
WINDOW 0 36 76 Invisible 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 80 336 R270
WINDOW 0 32 56 Invisible 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL bv -288 272 R180
WINDOW 0 24 96 Invisible 2
WINDOW 3 42 56 Left 2
SYMATTR InstName B2
SYMATTR Value ""
FLAG -80 -144 SPARK[T]
FLAG -80 608 SPARK[B]
FLAG -288 176 0
FLAG -288 560 0
FLAG 96 320 0
FLAG -272 272 voltage_check
FLAG -272 464 current_check
FLAG -176 368 spark_control
FLAG 224 96 sgt
TEXT 56 392 Left 2 !.model sw sw
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX9915.asc
* Generated by LTspice 26.0.1 for Windows.
Vee 0 Vee 2.5
Vcc Vcc 0 2.5
RL OUT 0 5k
V1 IN 0 SINE(0 50m 10k)
CL OUT 0 15p
XU1 IN OUT Vcc Vee OUT Vcc MAX9915 ;pnba In+)In-)V+)V-)OUT)SHDN
.tran 100u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX9915.asy)
.lib MAX9915.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 64 288 64 272
WIRE 416 352 416 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 64 448 64 400
WIRE 416 448 416 416
WIRE 448 448 448 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 64 544 64 528
WIRE 304 592 304 576
FLAG 720 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
FLAG 448 448 Vcc
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 5k
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 10k)
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL MAX9915 432 400 R0
SYMATTR InstName U1
TEXT 16 632 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8057.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8057.asy)
Rload OUT 0 16.7
XU1 0 OUT 0 N002 IN N001 IN NC_01 LTM8057 ;pnba GND)Vout1)Vout-)ADJ)Vin)Bias)Run)SS
C2 OUT 0 22 Rser=10m
C1 N001 0 4.7
R1 N002 0 6.98K
V1 IN 0 24
.tran 2m startup
.lib LTM8057.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 32 -96 32
WIRE 0 32 -16 32
WIRE 384 32 320 32
WIRE 480 32 384 32
WIRE -96 48 -96 32
WIRE 384 48 384 32
WIRE 480 48 480 32
WIRE -16 128 -16 32
WIRE 0 128 -16 128
WIRE 384 128 384 112
WIRE 384 128 320 128
WIRE -96 144 -96 128
WIRE 384 144 384 128
WIRE 480 144 480 128
WIRE -80 224 -96 224
WIRE 0 224 -16 224
WIRE 336 224 320 224
WIRE 432 224 416 224
WIRE 336 320 320 320
SYMBOL PowerProducts\\LTM8057 160 176 R0
SYMATTR InstName U1
SYMBOL voltage -96 32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 368 48 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMATTR SpiceLine Rser=10m
SYMBOL cap -16 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL res 464 32 R0
SYMATTR InstName Rload
SYMATTR Value 16.7
SYMBOL res 320 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 6.98K
FLAG 336 320 0
FLAG -96 144 0
FLAG -96 224 0
FLAG 432 224 0
FLAG 480 144 0
FLAG -96 32 IN
FLAG 480 32 OUT
FLAG 384 144 0
TEXT 416 328 Left 2 !.tran 2m startup