* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1871.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1871.asy)
Rload OUT 0 5
V1 IN 0 3.3
D1 N002 OUT MBR735
R3 OUT N007 36.8K
C2 N003 0 6800p
MQ1 N002 N005 0 0 IRF7811
C1 OUT 0 150 Rser=.05 x2
C3 N004 0 50p
C4 N001 0 4.7
R2 N007 0 12K
L1 IN N002 1
XU1 IN N004 N007 N006 0 0 N005 N001 IN N002 LTC1871 ;pnba Run)Ith)FB)Freq)Mode)GND)Gate)INTVcc)Vin)Sense
R4 N004 N003 22K
R1 N006 0 80.6K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 750u startup
.lib LTC1871.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2536 1752
WIRE 1632 1168 1248 1168
WIRE 1824 1168 1632 1168
WIRE 1904 1168 1824 1168
WIRE 1248 1184 1248 1168
WIRE 1632 1184 1632 1168
WIRE 1904 1216 1904 1168
WIRE 1392 1232 1376 1232
WIRE 1472 1232 1456 1232
WIRE 1824 1232 1824 1168
WIRE 1824 1232 1792 1232
WIRE 1248 1280 1248 1264
WIRE 1472 1328 1440 1328
WIRE 1904 1328 1904 1296
WIRE 1904 1328 1792 1328
WIRE 1984 1328 1904 1328
WIRE 2080 1328 2048 1328
WIRE 2192 1328 2080 1328
WIRE 2304 1328 2192 1328
WIRE 1904 1344 1904 1328
WIRE 2192 1344 2192 1328
WIRE 2304 1344 2304 1328
WIRE 2080 1376 2080 1328
WIRE 1168 1424 1120 1424
WIRE 1280 1424 1248 1424
WIRE 1472 1424 1280 1424
WIRE 1856 1424 1792 1424
WIRE 1120 1440 1120 1424
WIRE 1280 1440 1280 1424
WIRE 2192 1440 2192 1408
WIRE 2304 1440 2304 1424
WIRE 1904 1456 1904 1440
WIRE 1120 1520 1120 1504
WIRE 1280 1520 1280 1504
WIRE 1376 1520 1360 1520
WIRE 1472 1520 1456 1520
WIRE 2080 1520 2080 1456
WIRE 2080 1520 1792 1520
WIRE 2080 1536 2080 1520
WIRE 1632 1584 1632 1568
WIRE 2080 1632 2080 1616
SYMBOL schottky 1984 1344 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBR735
SYMBOL res 2064 1520 R0
SYMATTR InstName R2
SYMATTR Value 12K
SYMBOL ind 1888 1200 R0
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL polcap 2176 1344 R0
WINDOW 40 27 64 Left 2
WINDOW 3 40 36 Left 2
SYMATTR SpiceLine2 x2
SYMATTR Value 150
SYMATTR InstName C1
SYMATTR SpiceLine Rser=.05
SYMBOL cap 1264 1440 R0
SYMATTR InstName C3
SYMATTR Value 50p
SYMBOL res 2064 1360 R0
SYMATTR InstName R3
SYMATTR Value 36.8K
SYMBOL NMOS 1856 1344 R0
SYMATTR InstName Q1
SYMATTR Value IRF7811
SYMBOL RES 1472 1504 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 80.6K
SYMBOL VOLTAGE 1248 1168 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap 1104 1440 R0
SYMATTR InstName C2
SYMATTR Value 6800p
SYMBOL res 1264 1408 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 22K
SYMBOL polcap 1456 1216 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 4.7
SYMBOL res 2288 1328 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL POWERPRODUCTS\\LTC1871 1632 1376 R0
SYMATTR InstName U1
FLAG 1904 1456 0
FLAG 1360 1520 0
FLAG 2080 1632 0
FLAG 1632 1584 0
FLAG 2192 1440 0
FLAG 1280 1520 0
FLAG 1120 1520 0
FLAG 2304 1440 0
FLAG 1248 1280 0
FLAG 1440 1328 0
FLAG 1376 1232 0
FLAG 2304 1328 OUT
FLAG 1248 1168 IN
TEXT 2192 1576 Left 2 !.tran 750u startup