Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4120B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4120B.asy)
R1 GATE N004 5
V1 N001 0 5
C1 GATE 0 2n
V3 N003 0 PULSE(0 5 0 2n 2n 998n 2u)
V2 N002 0 15
XU1 N001 N003 0 0 N004 N002 ADuM4120xx Glitch=1 Vrun2=7.2 ;pnba Vdd1)Vin)GND1)GND2)Vout)Vdd2
.tran 10u
.lib ADuM4120xx.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 16 0 16
WIRE 512 16 320 16
WIRE 0 32 0 16
WIRE 512 32 512 16
WIRE 160 48 160 16
WIRE 320 48 320 16
WIRE 0 128 0 112
WIRE 512 128 512 112
WIRE 112 160 -64 160
WIRE 400 160 368 160
WIRE 512 160 480 160
WIRE 544 160 512 160
WIRE 512 176 512 160
WIRE 160 288 160 272
WIRE 320 288 320 272
SYMBOL voltage 0 16 R0
WINDOW 0 25 25 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 496 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL cap 496 176 R0
WINDOW 0 35 16 Left 2
WINDOW 3 36 51 Left 2
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL voltage 512 16 R0
WINDOW 0 29 30 Left 2
WINDOW 3 31 84 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage -48 160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 2n 2n 998n 2u)
SYMBOL ADuM4120B 240 160 R0
SYMATTR InstName U1
FLAG 160 288 0
FLAG 320 288 0
FLAG 512 240 0
FLAG 544 160 GATE
FLAG 512 128 0
FLAG 0 128 0
FLAG -144 160 0
TEXT 400 280 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6905.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6905.asy)
XU1 N001 0 N003 N004 N002 LTC6905 ;pnba V+)GND)SET)DIV)OUT
V1 N001 0 5
R1 N001 N003 25K
.tran 20u
.lib LTC6905.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -80 160 -192 160
WIRE 32 160 -80 160
WIRE 288 160 256 160
WIRE -192 176 -192 160
WIRE -80 208 -80 160
WIRE 32 240 16 240
WIRE -192 272 -192 256
WIRE -80 320 -80 288
WIRE 32 320 -80 320
WIRE 288 320 256 320
SYMBOL res -96 192 R0
SYMATTR InstName R1
SYMATTR Value 25K
SYMBOL SpecialFunctions\\LTC6905 144 240 R0
SYMATTR InstName U1
SYMBOL voltage -192 160 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -192 272 0
FLAG 16 240 0
TEXT 272 392 Left 2 !.tran 20u
* Z:\home\khalils\Downloads\files\data\raw_asc\2d8415d1d7ef_UARTfaker-Glitch.asc
* Generated by LTspice 26.0.1 for Windows.
R1 OUT v+ 10
V1 N001 0 PULSE(12 -0.83 100ms 20ns 20ns 0.3ms 9999 1)
D1 OUT N001 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 200ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1560 944
WIRE -304 144 -400 144
WIRE 688 144 -224 144
WIRE 448 208 -80 208
WIRE 688 208 688 144
WIRE 688 208 512 208
WIRE 752 208 688 208
IOPIN 752 208 Out
IOPIN -400 144 In
SYMBOL diode 512 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL res -208 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage -64 208 R90
WINDOW 0 12 126 VBottom 2
WINDOW 3 -33 -201 VTop 2
SYMATTR InstName V1
SYMATTR Value PULSE(12 -0.83 100ms 20ns 20ns 0.3ms 9999 1)
FLAG -160 208 0
FLAG 752 208 OUT
FLAG -400 144 v+
TEXT -152 120 Left 2 !.tran 200ms
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8054.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8054.asy)
C2 OUT 0 68 V=50 Irms=410m Rser=0.2 Lser=0 mfg="Nichicon" pn="UPL1H680MPH" type="Al electrolytic"
XU1 NC_01 NC_02 MP_03 0 MP_04 MP_05 NC_06 NC_07 IN IN IN IN MP_08 MP_09 MP_10 MP_11 MP_12 MP_13 MP_14 MP_15 MP_16 MP_17 MP_18 MP_19 OUT OUT MP_20 MP_21 MP_22 0 MP_23 NC_24 NC_25 NC_26 N002 NC_27 N001 LTM8054 ;pnba CTL)SS))LL)))IOUTmon)IINmon)Run)Iin)Vin)SVin)))))))))))))Vout)Iout))))GND))Mode)CLKout)Sync)RT)Comp)FB
R2 OUT N001 100K
Rload OUT 0 2.5
R3 N001 0 11K
V1 IN 0 24
R1 N002 0 36.5K
C1 OUT 0 22 V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
.tran 1.5m startup
.lib LTM8054.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 728
WIRE -32 -192 -128 -192
WIRE -16 -192 -32 -192
WIRE 416 -192 400 -192
WIRE 464 -192 416 -192
WIRE 576 -192 464 -192
WIRE 656 -192 576 -192
WIRE 736 -192 656 -192
WIRE -128 -176 -128 -192
WIRE 464 -176 464 -192
WIRE 576 -176 576 -192
WIRE 656 -176 656 -192
WIRE 736 -176 736 -192
WIRE -32 -96 -32 -192
WIRE -16 -96 -32 -96
WIRE 416 -96 416 -192
WIRE 416 -96 400 -96
WIRE -128 -80 -128 -96
WIRE 576 -80 576 -112
WIRE 656 -80 656 -112
WIRE 736 -80 736 -96
WIRE -32 0 -32 -96
WIRE -16 0 -32 0
WIRE 464 0 464 -96
WIRE 464 0 400 0
WIRE 464 16 464 0
WIRE -32 96 -32 0
WIRE -16 96 -32 96
WIRE 464 112 464 96
WIRE -16 480 -32 480
WIRE -112 576 -128 576
WIRE -16 576 -32 576
WIRE 416 576 400 576
SYMBOL res -16 560 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 36.5K
SYMBOL res 448 0 R0
SYMATTR InstName R3
SYMATTR Value 11K
SYMBOL res 720 -192 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL polcap 640 -176 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 68
SYMATTR InstName C2
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=50 Irms=410m Rser=0.2 Lser=0 mfg="Nichicon" pn="UPL1H680MPH" type="Al electrolytic"
SYMBOL cap 560 -176 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
SYMBOL res 448 -192 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL voltage -128 -192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL PowerProducts\\LTM8054 192 192 R0
SYMATTR InstName U1
FLAG -128 576 0
FLAG -32 480 0
FLAG -128 -80 0
FLAG 416 576 0
FLAG 464 112 0
FLAG 576 -80 0
FLAG 656 -80 0
FLAG 736 -80 0
FLAG 736 -192 OUT
FLAG -128 -192 IN
TEXT 576 560 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1109A-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1109A-5.asy)
C1 OUT 0 22 Rser=0.02
L1 IN N001 33 Rser=0.02 Rpar=5000
V1 IN 0 3 Rser=0.1
D1 N001 OUT MBRS140
Rload OUT 0 25
XU1 IN MP_01 N001 0 MP_02 MP_03 N002 OUT LT1109A top=250K bot=83K ;pnba Vin))SW)GND)))_SDN)Sense
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LT1109A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2376 1416
WIRE 1520 944 1296 944
WIRE 1584 944 1520 944
WIRE 1696 944 1664 944
WIRE 1744 944 1696 944
WIRE 1856 944 1808 944
WIRE 1920 944 1856 944
WIRE 1296 960 1296 944
WIRE 1920 960 1920 944
WIRE 1520 1008 1520 944
WIRE 1296 1056 1296 1040
WIRE 1920 1056 1920 1040
WIRE 1696 1072 1696 944
WIRE 1696 1072 1648 1072
WIRE 1392 1104 1376 1104
WIRE 1856 1136 1856 944
WIRE 1856 1136 1648 1136
WIRE 1856 1152 1856 1136
WIRE 1856 1232 1856 1216
WIRE 1520 1248 1520 1200
SYMBOL VOLTAGE 1296 944 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMATTR SpiceLine Rser=0.1
SYMBOL res 1904 944 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL PowerProducts\\LT1109A-5 1520 1088 R0
SYMATTR InstName U1
SYMBOL schottky 1744 960 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL POLCAP 1840 1152 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine Rser=0.02
SYMBOL IND 1568 960 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02 Rpar=5000
FLAG 1920 944 OUT
FLAG 1856 1232 0
FLAG 1920 1056 0
FLAG 1296 1056 0
FLAG 1520 1248 0
FLAG 1296 944 IN
TEXT 1624 1264 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2108-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2108-1.2.asy)
L1 N001 OUT 1
Rload OUT 0 4
C1 OUT 0 10 V=4 Irms=8.88 Rser=0.00522854 Lser=0 mfg="KEMET" pn="C0805C106K7PAC" type="X5R"
V1 IN 0 5
XU1 IN IN N001 OUT 0 ADP2108-x.x Rtop=112K ;pnba Vin)EN)SW)FB)GND
.tran .5m startup
.lib ADP2108-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 144
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 4
SYMBOL ADP2108-1.2 352 224 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine V=4 Irms=8.88 Rser=0.00522854 Lser=0 mfg="KEMET" pn="C0805C106K7PAC" type="X5R"
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
TEXT 552 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2495a3daf3b3_ADA4528-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4528-1.asy)
R1 N001 0 10K
Rload OUT 0 10K
XU1 IN N001 +V -V OUT ADA4528 ;pnba In+)In-)V+)V-)OUT
Vin IN 0 SINE(0 1 10K)
R2 OUT N001 10K
V2 -V 0 -2.5
V1 +V 0 2.5
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 128 -1152 128 -1168
WIRE 240 -1152 240 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 128 -1056 128 -1072
WIRE 240 -1056 240 -1072
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL Opamps\\ADA4528-1 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 128 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 240 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
FLAG 128 -1168 +V
FLAG 128 -1056 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 240 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 240 -1056 0
TEXT 736 -952 Left 2 !.tran 1m
* Z:\tmp\asc_dec_bjh7r6w2\143725117412_Draft17_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
VIN N001 0 SINE(0 10 50)
D1 N002 0 D
D2 N002 VOUT D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 680
WIRE -64 80 -240 80
WIRE 224 80 16 80
WIRE 336 80 224 80
WIRE 224 144 224 80
WIRE 160 176 160 144
WIRE 160 176 112 176
WIRE 288 176 288 144
WIRE 368 176 288 176
WIRE 160 208 160 176
WIRE 288 208 288 176
WIRE 112 256 112 176
WIRE 368 256 112 256
WIRE 224 288 224 208
SYMBOL voltage -240 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value SINE(0 10 50)
SYMATTR InstName VIN
SYMBOL diode 160 224 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL diode 160 160 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
FLAG 336 80 VOUT
FLAG -240 160 0
FLAG 224 288 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6905-133.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6905-133.asy)
V3 N003 0 PWL(0 3 .35u 3 +10n 1.5 .65u 1.5 +10n 0)
V1 N001 0 3
XU1 N001 0 N002 N003 OUT LTC6905-133 ;pnba V+)GND)0E)DIV)OUT
V2 N002 0 PULSE(0 3 100n 10n 10n 200n 300n)
.tran 1u
.lib LTC6905-133.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 680
WIRE 32 160 -80 160
WIRE 288 160 256 160
WIRE -80 176 -80 160
WIRE 32 240 16 240
WIRE -80 272 -80 256
WIRE 32 320 -208 320
WIRE 368 320 256 320
WIRE -208 336 -208 320
WIRE 368 336 368 320
WIRE -208 432 -208 416
WIRE 368 432 368 416
SYMBOL voltage -208 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 3 100n 10n 10n 200n 300n)
SYMBOL LTC6905-133 144 240 R0
SYMATTR InstName U1
SYMBOL voltage 368 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 3 .35u 3 +10n 1.5 .65u 1.5 +10n 0)
SYMBOL voltage -80 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3
FLAG -80 272 0
FLAG 16 240 0
FLAG -208 432 0
FLAG 368 432 0
FLAG 288 160 OUT
TEXT 544 520 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\3f74ea1ed625_lab3b.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vout Vin VDD VDD P_50n l=50n w=1000n
Vin Vin 0 PULSE(0 1 50p 1p 1p 100p)
VDD VDD 0 1
M2 Vout Vin 0 0 N_50n l=50n w=500n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib C:\Users\Sarthak\Desktop\CMOS_PRO\pure_models.txt
.tran 250p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 64 192 16
WIRE 144 80 96 80
WIRE 96 192 96 80
WIRE 96 192 32 192
WIRE 192 192 192 160
WIRE 304 192 192 192
WIRE 192 224 192 192
WIRE 96 304 96 192
WIRE 144 304 96 304
WIRE 192 368 192 320
SYMBOL pmos4 144 160 M180
WINDOW 0 52 21 Left 2
WINDOW 3 57 76 Left 2
WINDOW 123 56 -1 Left 2
SYMATTR InstName M1
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1000n
SYMBOL voltage -160 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL nmos4 144 224 R0
WINDOW 123 56 100 Left 2
SYMATTR InstName M2
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage -160 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(0 1 50p 1p 1p 100p)
FLAG 192 368 0
FLAG 192 272 0
FLAG -160 144 0
FLAG -160 336 0
FLAG -160 64 VDD
FLAG 192 16 VDD
FLAG 304 192 Vout
FLAG 32 192 Vin
FLAG -160 256 Vin
FLAG 192 112 VDD
TEXT -288 -72 Left 2 !.lib C:\\Users\\Sarthak\\Desktop\\CMOS_PRO\\pure_models.txt
TEXT -288 392 Left 2 !.tran 250p
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8062A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8062A.asy)
R1 OUT N001 1.24Meg
V1 IN 0 25
C1 OUT 0 .1m
XU1 IN IN IN NC_01 NC_02 0 N001 NC_03 OUT MP_04 OUT IN 0 LTM8062 ;pnba Vin)Vin_reg)Run)_CHRG)_Fault)Timer)ADJ)NTC)BAT))Bias)VinA)GND
R2 N001 0 312K
.tran 6m startup
.lib LTM8062.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 920 680
WIRE 64 -64 -32 -64
WIRE 80 -64 64 -64
WIRE -32 -48 -32 -64
WIRE 64 32 64 -64
WIRE 80 32 64 32
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 80 128 64 128
WIRE 512 128 368 128
WIRE 576 128 512 128
WIRE 576 144 576 128
WIRE 64 224 64 128
WIRE 80 224 64 224
WIRE 512 224 512 128
WIRE 512 224 368 224
WIRE 576 224 576 208
WIRE 512 288 512 224
WIRE 80 320 64 320
WIRE 80 416 64 416
WIRE 512 416 512 368
WIRE 512 416 368 416
WIRE 512 432 512 416
WIRE 512 528 512 512
SYMBOL PowerProducts\\LTM8062A 224 176 R0
SYMATTR InstName U1
SYMBOL cap 560 144 R0
SYMATTR InstName C1
SYMATTR Value .1m
SYMBOL voltage -32 -64 R0
SYMATTR InstName V1
SYMATTR Value 25
SYMBOL res 496 272 R0
SYMATTR InstName R1
SYMATTR Value 1.24Meg
SYMBOL res 496 416 R0
SYMATTR InstName R2
SYMATTR Value 312K
FLAG 64 416 0
FLAG -32 48 0
FLAG 576 224 0
FLAG -32 -64 IN
FLAG 576 128 OUT
FLAG 64 320 0
FLAG 512 528 0
TEXT 696 512 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\36a278453e73_6247.asc
* Generated by LTspice 26.0.1 for Windows.
* 60dB 5.5 MHz Gain Block
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6247.asy)
XU1 N002 -V IN N001 +V LTC6247 ;pnba 1)4)3)2)7
V1 IN 0 AC 1
R3 N002 N001 1.5K
XU2 OUT -V N002 N004 +V LTC6247 ;pnba 1)4)3)2)7
V2 +V 0 2.5
C1 N003 0 660n
R4 OUT N004 30K
R1 N004 N003 1K
R2 N001 0 50
V3 -V 0 -2.5
.ac dec 250 10K 20Meg
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2228 1852
WIRE -960 -368 -960 -384
WIRE -752 -352 -768 -352
WIRE -640 -352 -672 -352
WIRE -592 -352 -640 -352
WIRE -496 -352 -512 -352
WIRE -448 -352 -464 -352
WIRE -368 -352 -384 -352
WIRE -272 -352 -288 -352
WIRE -256 -352 -272 -352
WIRE -144 -352 -176 -352
WIRE -960 -272 -960 -288
WIRE -272 -256 -272 -352
WIRE -240 -256 -272 -256
WIRE -640 -240 -640 -352
WIRE -608 -240 -640 -240
WIRE -144 -240 -144 -352
WIRE -144 -240 -176 -240
WIRE -112 -240 -144 -240
WIRE -496 -224 -496 -352
WIRE -496 -224 -544 -224
WIRE -240 -224 -496 -224
WIRE -608 -208 -800 -208
WIRE -960 -192 -960 -208
WIRE -800 -192 -800 -208
WIRE -208 -192 -208 -208
WIRE -576 -176 -576 -192
WIRE -960 -96 -960 -112
WIRE -800 -96 -800 -112
SYMBOL voltage -800 -208 R0
SYMATTR Value AC 1
SYMATTR InstName V1
SYMBOL res -160 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 30K
SYMBOL voltage -960 -384 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 2.5
SYMATTR InstName V2
SYMBOL res -272 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -960 -208 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value -2.5
SYMATTR InstName V3
SYMBOL Opamps\\LTC6247 -576 -224 R0
SYMATTR InstName U1
SYMBOL Opamps\\LTC6247 -208 -240 R0
SYMATTR InstName U2
SYMBOL cap -384 -368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 660n
SYMBOL res -656 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL res -496 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1.5K
FLAG -800 -96 0
FLAG -576 -256 +V
FLAG -800 -208 IN
FLAG -960 -272 0
FLAG -960 -96 0
FLAG -960 -208 -V
FLAG -768 -352 0
FLAG -464 -352 0
FLAG -112 -240 OUT
FLAG -960 -384 +V
FLAG -576 -176 -V
FLAG -208 -192 -V
FLAG -208 -272 +V
TEXT -464 -112 Left 2 !.ac dec 250 10K 20Meg
TEXT -536 -456 Bottom 2 ;60dB 5.5 MHz Gain Block
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4703.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4703.asy)
V1 vIN 0 12
R1 N001 0 137k
C1 vOUT 0 100 m=2 Rser=5m
R2 vOUT N002 100k
C2 N005 0 0.33
XU1 NC_01 NC_02 0 NC_03 vIN vOUT vIN vIN NC_04 NC_05 N005 N003 vOUT N004 N001 N002 N003 0 0 LTM4703 ;pnba SW)SYNC)GND)CLKOUT)VIN)VOUT)SVIN)RUN)INTVCC)PHMODE)SET)COMPA)VOSNS)PGSET)RT)PG)COMPB)TSENSE+)TSENSE-
R4 N005 0 10k
Rload vOUT 0 0.125
R3 vOUT N004 49.9k
.tran 5m startup
.lib LTM4703.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2216 900
WIRE -368 -896 -512 -896
WIRE -176 -896 -368 -896
WIRE -512 -848 -512 -896
WIRE -176 -816 -176 -896
WIRE -368 -768 -368 -896
WIRE -320 -768 -368 -768
WIRE 16 -768 -32 -768
WIRE 80 -768 16 -768
WIRE 192 -768 80 -768
WIRE 320 -768 192 -768
WIRE 480 -768 320 -768
WIRE -512 -752 -512 -768
WIRE 480 -736 480 -768
WIRE 80 -720 80 -768
WIRE 192 -720 192 -768
WIRE 320 -720 320 -768
WIRE -368 -672 -368 -768
WIRE -320 -672 -368 -672
WIRE 16 -672 16 -768
WIRE 16 -672 -32 -672
WIRE 320 -608 320 -656
WIRE 480 -608 480 -656
WIRE -464 -576 -496 -576
WIRE -320 -576 -384 -576
WIRE 80 -576 80 -640
WIRE 80 -576 -32 -576
WIRE -320 -480 -368 -480
WIRE 192 -480 192 -640
WIRE 192 -480 -32 -480
WIRE -368 -384 -368 -480
WIRE -320 -384 -368 -384
WIRE 80 -288 -32 -288
WIRE 192 -288 80 -288
WIRE 80 -240 80 -288
WIRE 192 -240 192 -288
WIRE 16 -96 -32 -96
WIRE 16 0 16 -96
WIRE 16 0 -32 0
WIRE -176 80 -176 48
WIRE 16 80 16 0
WIRE 16 80 -176 80
WIRE 80 80 80 -176
WIRE 80 80 16 80
WIRE 192 80 192 -160
WIRE 192 80 80 80
WIRE -176 112 -176 80
SYMBOL res 64 -736 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res 464 -752 R0
SYMATTR InstName Rload
SYMATTR Value 0.125
SYMBOL res -368 -592 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 137k
SYMBOL res 176 -736 R0
SYMATTR InstName R3
SYMATTR Value 49.9k
SYMBOL cap 64 -240 R0
SYMATTR InstName C2
SYMATTR Value 0.33
SYMBOL voltage -512 -864 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 304 -720 R0
WINDOW 3 34 31 Left 2
WINDOW 123 34 59 Left 2
SYMATTR Value 100
SYMATTR Value2 m=2
SYMATTR SpiceLine Rser=5m
SYMATTR InstName C1
SYMBOL res 176 -256 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL LTM4703 -176 -512 R0
SYMATTR InstName U1
FLAG -512 -752 0
FLAG -496 -576 0
FLAG 480 -608 0
FLAG 480 -768 vOUT
FLAG -512 -896 vIN
FLAG 320 -608 0
FLAG -176 112 0
TEXT -32 128 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0c6b576e1d4a_Power_Transistors.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc V5 0 5 0.5
* .dc V6 0 5 0.5
Q2 N004 N008 0 0 NPN
M2 N010 N012 N016 N016 NMOS
V5 N013 N015 V
V6 N014 N016 V
V1 N005 0 V
R2 N001 N003 3300
Q1 N003 N006 0 0 NPN
V4 N002 0 V
M1 N009 N011 N015 N015 NMOS
V2 N001 0 V
R5 N002 N004 330
R3 N009 N013 330
V3 N007 0 V
R1 N006 N005 10k
R4 N010 N014 330
R6 N008 N007 1k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V1 0 100 1 V2 0 100 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2488 1304
WIRE 464 0 240 0
WIRE 1440 0 1216 0
WIRE 464 80 464 0
WIRE 1440 80 1440 0
WIRE 240 96 240 0
WIRE 1216 96 1216 0
WIRE 240 208 240 176
WIRE 1216 208 1216 176
WIRE -80 256 -160 256
WIRE 176 256 0 256
WIRE 896 256 816 256
WIRE 1152 256 976 256
WIRE -160 304 -160 256
WIRE 816 304 816 256
WIRE -160 464 -160 384
WIRE 240 464 240 304
WIRE 240 464 -160 464
WIRE 464 464 464 160
WIRE 464 464 240 464
WIRE 816 464 816 384
WIRE 1216 464 1216 304
WIRE 1216 464 816 464
WIRE 1440 464 1440 160
WIRE 1440 464 1216 464
WIRE 240 528 240 464
WIRE 1216 528 1216 464
WIRE 576 816 240 816
WIRE 1472 816 1136 816
WIRE 240 960 240 816
WIRE 1136 960 1136 816
WIRE 576 976 576 816
WIRE 1472 976 1472 816
WIRE 192 1040 128 1040
WIRE 1088 1040 1008 1040
WIRE 576 1152 576 1056
WIRE 1472 1152 1472 1056
WIRE 240 1296 240 1056
WIRE 240 1296 128 1296
WIRE 576 1296 576 1232
WIRE 576 1296 240 1296
WIRE 1136 1296 1136 1056
WIRE 1136 1296 1008 1296
WIRE 1472 1296 1472 1232
WIRE 1472 1296 1136 1296
SYMBOL nmos 1088 960 R0
SYMATTR InstName M2
SYMBOL voltage -160 288 R0
SYMATTR InstName V1
SYMBOL res 1200 80 R0
SYMATTR InstName R5
SYMATTR Value 330
SYMBOL voltage 816 288 R0
SYMATTR InstName V3
SYMBOL res 992 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 1k
SYMBOL res 224 80 R0
SYMATTR InstName R2
SYMATTR Value 3300
SYMBOL res 1456 960 R0
SYMATTR InstName R4
SYMATTR Value 330
SYMBOL voltage 1440 64 R0
SYMATTR InstName V4
SYMBOL voltage 576 1136 R0
SYMATTR InstName V5
SYMBOL npn 1152 208 R0
SYMATTR InstName Q2
SYMBOL nmos 192 960 R0
SYMATTR InstName M1
SYMBOL voltage 464 64 R0
SYMATTR InstName V2
SYMBOL res 16 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL npn 176 208 R0
SYMATTR InstName Q1
SYMBOL res 560 960 R0
SYMATTR InstName R3
SYMATTR Value 330
SYMBOL voltage 1472 1136 R0
SYMATTR InstName V6
FLAG 240 528 0
FLAG 1216 528 0
TEXT -200 -120 Left 2 !.dc V1 0 100 1 V2 0 100 10
TEXT -168 752 Left 2 ;.dc V5 0 5 0.5
TEXT 912 744 Left 2 ;.dc V6 0 5 0.5