Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4659.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4659.asy)
R5 N003 0 60.4k
R6 IN N001 500K
V2 IN 0 3.3
C6 N002 0 4.7n
Rload OUT 0 0.1
C7 OUT 0 100
XU1 IN IN SW N003 0 0 N004 N001 IN Comp N002 OUT LTM4659 ;pnba Vin)Run)SW)FB)Agnd)GND)Freq)Pgood)Mode/Sync)Comp)SSTT)VOUT
C1 Comp 0 680p Rser=6.8k
R7 N004 0 274K
R4 OUT N003 60.4k
.tran .5m startup
.lib LTM4659.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3680 1972
WIRE 1856 1232 1696 1232
WIRE 1968 1232 1856 1232
WIRE 2096 1232 2080 1232
WIRE 1696 1248 1696 1232
WIRE 1968 1264 1968 1232
WIRE 2096 1264 2096 1232
WIRE 1856 1312 1856 1232
WIRE 1872 1312 1856 1312
WIRE 2224 1312 2192 1312
WIRE 2336 1312 2304 1312
WIRE 1696 1344 1696 1328
WIRE 1856 1408 1856 1312
WIRE 1872 1408 1856 1408
WIRE 2336 1408 2192 1408
WIRE 2448 1408 2336 1408
WIRE 2528 1408 2448 1408
WIRE 2448 1424 2448 1408
WIRE 2528 1424 2528 1408
WIRE 1792 1504 1776 1504
WIRE 1872 1504 1856 1504
WIRE 2336 1504 2336 1488
WIRE 2336 1504 2192 1504
WIRE 2336 1520 2336 1504
WIRE 2448 1520 2448 1488
WIRE 2528 1520 2528 1504
WIRE 1712 1600 1648 1600
WIRE 1872 1600 1712 1600
WIRE 2224 1600 2192 1600
WIRE 1712 1616 1712 1600
WIRE 2224 1616 2224 1600
WIRE 2336 1616 2336 1600
WIRE 1968 1664 1968 1648
WIRE 2096 1664 2096 1648
WIRE 1712 1712 1712 1680
WIRE 2224 1712 2224 1696
SYMBOL LTM4659 2032 1440 R0
SYMATTR InstName U1
SYMBOL cap 2432 1424 R0
SYMATTR InstName C7
SYMATTR Value 100
SYMBOL res 2320 1296 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 500K
SYMBOL cap 1696 1616 R0
WINDOW 3 37 34 Left 2
WINDOW 39 26 61 Left 2
SYMATTR Value 680p
SYMATTR SpiceLine Rser=6.8k
SYMATTR InstName C1
SYMBOL res 2320 1504 R0
SYMATTR InstName R5
SYMATTR Value 60.4k
SYMBOL cap 1856 1488 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C6
SYMATTR Value 4.7n
SYMBOL VOLTAGE 1696 1232 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 3.3
SYMATTR InstName V2
SYMBOL res 2208 1600 R0
SYMATTR InstName R7
SYMATTR Value 274K
SYMBOL RES 2320 1392 R0
SYMATTR InstName R4
SYMATTR Value 60.4k
SYMBOL res 2512 1408 R0
SYMATTR InstName Rload
SYMATTR Value 0.1
FLAG 2096 1664 0
FLAG 1968 1664 0
FLAG 1696 1344 0
FLAG 2528 1520 0
FLAG 2336 1616 0
FLAG 1776 1504 0
FLAG 2528 1408 OUT
FLAG 1696 1232 IN
FLAG 2448 1520 0
FLAG 2224 1712 0
FLAG 2080 1232 SW
FLAG 1648 1600 Comp
FLAG 2336 1312 IN
FLAG 1712 1712 0
TEXT 2384 1688 Left 2 !.tran .5m startup
* Z:\tmp\asc_dec_bjh7r6w2\00ccec2cdc4e_2641A-16_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N003 0 PULSE(0 3.3 0 0.1n 0.1n 19.8n 40n)
V6 N004 0 PWL(0 3.3 2u 3.3 +2n 0 +30n 0 +2n 3.3)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 932
WIRE 192 176 192 64
WIRE 240 176 192 176
WIRE -32 192 -48 192
WIRE 160 192 48 192
WIRE 160 240 160 192
WIRE 240 240 160 240
WIRE -32 304 -48 304
WIRE 240 304 48 304
WIRE 240 368 176 368
WIRE -32 448 -48 448
WIRE 176 448 176 368
WIRE 176 448 48 448
SYMBOL voltage 64 304 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -99 VRight 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 0.1n 0.1n 19.8n 40n)
SYMBOL voltage 64 448 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -99 VRight 2
SYMATTR InstName V6
SYMATTR Value PWL(0 3.3 2u 3.3 +2n 0 +30n 0 +2n 3.3)
FLAG -48 304 0
FLAG -48 192 0
FLAG -48 448 0
* Z:\home\khalils\Downloads\files\data\raw_asc\1221fc20dfe8_common-gate.asc
* Generated by LTspice 26.0.1 for Windows.
Rl N001 out 10k
Vdd N001 0 3V
VGL N002 0 2V
Vin in 0 0
M2 out N002 in in TestN l=10u w=100u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model TestN nmos (kp=90u vt0=0.7 lambda=0.01)
.dc Vin 0V 3.0V 0.01V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1412
WIRE -96 800 -496 800
WIRE -496 880 -496 800
WIRE -96 880 -96 800
WIRE -96 1024 -96 960
WIRE -96 1072 -96 1024
WIRE -80 1120 -96 1120
WIRE -144 1152 -384 1152
WIRE -80 1168 -80 1120
WIRE -80 1168 -96 1168
WIRE -144 1200 -224 1200
WIRE -96 1200 -96 1168
WIRE -96 1200 -144 1200
WIRE -384 1216 -384 1152
WIRE -224 1216 -224 1200
WIRE -496 1328 -496 960
WIRE -384 1328 -384 1296
WIRE -224 1328 -224 1296
SYMBOL voltage -384 1200 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VGL
SYMATTR Value 2V
SYMBOL nmos4 -144 1072 R0
SYMATTR InstName M2
SYMATTR Value TestN
SYMATTR Value2 l=10u w=100u
SYMBOL res -112 864 R0
SYMATTR InstName Rl
SYMATTR Value 10k
SYMBOL voltage -224 1200 R0
WINDOW 3 24 44 Left 2
SYMATTR Value 0
SYMATTR InstName Vin
SYMBOL voltage -496 864 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vdd
SYMATTR Value 3V
FLAG -496 1328 0
FLAG -224 1328 0
FLAG -96 1024 out
FLAG -144 1200 in
FLAG -384 1328 0
TEXT -680 752 Left 2 !.model TestN nmos (kp=90u vt0=0.7 lambda=0.01)\n.dc Vin 0V 3.0V 0.01V
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3681.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3681.asy)
C4 N001 0 .01
R3 N004 N003 20K
R5 OUT N007 100K
V1 IN 0 30
C1 OUT 0 22
R2 N008 0 200K
L1 N005 OUT 6.8 Rpar=2K
XU1 OUT N002 N005 IN N001 N007 OUT N008 N004 N006 0 N005 0 LT3681 ;pnba BD)Boost)SW)Vin)Run/SS)Pgood)Bias)FB)Vc)Rt)GND)DC)DA
R6 IN N001 500K
C2 N002 N005 .47
C3 N003 0 330p
R4 N006 0 60.4K
R1 OUT N008 590K
Rload OUT 0 2.5
.tran 500u startup
.lib LT3681.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1104 740
WIRE -352 64 -448 64
WIRE 0 64 -352 64
WIRE 192 64 96 64
WIRE 464 64 192 64
WIRE -448 80 -448 64
WIRE -352 80 -352 64
WIRE 0 96 0 64
WIRE 96 96 96 64
WIRE 192 96 192 64
WIRE -64 160 -352 160
WIRE 288 160 256 160
WIRE -448 176 -448 160
WIRE -352 176 -352 160
WIRE -240 240 -256 240
WIRE -160 240 -176 240
WIRE -64 240 -80 240
WIRE 288 240 288 224
WIRE 288 240 256 240
WIRE 352 240 288 240
WIRE 464 240 464 64
WIRE 464 240 432 240
WIRE 560 240 464 240
WIRE 656 240 560 240
WIRE 752 240 656 240
WIRE -352 256 -352 240
WIRE 656 256 656 240
WIRE 752 256 752 240
WIRE 464 272 464 240
WIRE -208 320 -256 320
WIRE -64 320 -128 320
WIRE 288 320 288 240
WIRE 288 320 256 320
WIRE 560 336 560 240
WIRE 656 352 656 320
WIRE 752 352 752 336
WIRE -64 400 -80 400
WIRE 464 400 464 352
WIRE 464 400 256 400
WIRE 464 416 464 400
WIRE 48 480 48 464
WIRE 144 480 144 464
WIRE 464 512 464 496
WIRE -80 544 -80 400
WIRE 560 544 560 416
WIRE 560 544 -80 544
SYMBOL cap -368 176 R0
SYMATTR InstName C4
SYMATTR Value .01
SYMBOL res -112 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 60.4K
SYMBOL voltage -448 64 R0
SYMATTR InstName V1
SYMATTR Value 30
SYMBOL ind 336 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMATTR SpiceLine Rpar=2K
SYMBOL cap 272 160 R0
WINDOW 3 30 49 Left 2
SYMATTR Value .47
SYMATTR InstName C2
SYMBOL PowerProducts\\LT3681 96 288 R0
SYMATTR InstName U1
SYMBOL res -64 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL res 448 400 R0
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL res 736 240 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL res 448 256 R0
SYMATTR InstName R1
SYMATTR Value 590K
SYMBOL res 544 320 R0
SYMATTR InstName R5
SYMATTR Value 100K
SYMBOL res -368 64 R0
SYMATTR InstName R6
SYMATTR Value 500K
SYMBOL cap -176 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 330p
SYMBOL cap 640 256 R0
SYMATTR InstName C1
SYMATTR Value 22
FLAG 656 352 0
FLAG 464 512 0
FLAG -256 240 0
FLAG -448 176 0
FLAG 144 480 0
FLAG 752 352 0
FLAG -256 320 0
FLAG -352 256 0
FLAG 752 240 OUT
FLAG -448 64 IN
FLAG 48 480 0
TEXT 192 512 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\24a8adee1d53_exam1_11_ac_transient.asc
* Generated by LTspice 26.0.1 for Windows.
R Vout 0 5k
VPS Vdc 0 5
vi vi Vdc SINE(0 .1 60) AC 1
D1 vi Vout 1N4002
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 120m 0 1000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 64 32 64
WIRE 160 64 48 64
WIRE 320 64 224 64
WIRE 320 80 320 64
WIRE 32 128 32 64
WIRE 320 144 320 80
WIRE 32 256 32 208
WIRE 32 272 32 256
WIRE 32 416 32 352
WIRE 176 416 32 416
WIRE 320 416 320 224
WIRE 320 416 176 416
WIRE 176 448 176 416
IOPIN 320 80 Out
IOPIN 48 64 Out
IOPIN 32 256 Out
SYMBOL diode 160 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4002
SYMBOL voltage 32 112 R0
WINDOW 0 -11 56 Left 2
WINDOW 3 45 55 Left 2
WINDOW 123 43 80 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName vi
SYMATTR Value SINE(0 .1 60)
SYMATTR Value2 AC 1
SYMBOL voltage 32 256 R0
WINDOW 0 -21 56 Left 2
SYMATTR InstName VPS
SYMATTR Value 5
SYMBOL res 304 128 R0
SYMATTR InstName R
SYMATTR Value 5k
FLAG 176 448 0
FLAG 320 80 Vout
FLAG 48 64 vi
FLAG 32 256 Vdc
TEXT 64 -8 Left 2 !.tran 0 120m 0 1000
* Z:\home\khalils\Downloads\files\data\raw_asc\1e9c7087c5e6_1843.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1843.asy)
V2 N002 0 PULSE(0 3.3 0 .5m .5m 0 1m)
XU1 N004 0 N002 N002 N006 N005 N001 N003 LTC1843 ;pnba OUTA)GND)INA+)INB-)Hyst)Ref)Vcc)OUTB
R1 N001 N003 10K
V1 N001 0 5
R2 N001 N004 10K
.tran 3m
.lib LTC1843.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1264 800
WIRE 928 64 736 64
WIRE 1040 64 928 64
WIRE 1136 64 1040 64
WIRE 736 80 736 64
WIRE 1040 80 1040 64
WIRE 1136 80 1136 64
WIRE 928 112 928 64
WIRE 848 160 816 160
WIRE 736 176 736 160
WIRE 1040 176 1040 160
WIRE 1040 176 1008 176
WIRE 560 240 528 240
WIRE 816 240 816 160
WIRE 816 240 640 240
WIRE 848 240 816 240
WIRE 1136 256 1136 160
WIRE 1136 256 1008 256
WIRE 848 304 832 304
WIRE 976 400 976 384
WIRE 880 416 880 384
SYMBOL res 1120 64 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 736 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 656 240 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0 .5m .5m 0 1m)
SYMATTR InstName V2
SYMBOL res 1024 64 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL Comparators\\LTC1843 928 240 R0
SYMATTR InstName U1
FLAG 736 176 0
FLAG 528 240 0
FLAG 880 416 0
TEXT 1120 344 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\colpits.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
C3 N005 N004 200p
D1 0 N003 1N4148
C2 N004 0 500p
C1 N003 N004 500p
R1 N001 N002 500
V1 N001 0 7.
R2 N005 0 1K
JQ1 N002 N003 N005 2N5484
L1 0 N003 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.tran 500 startup
.options method=trap
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2740 2480
WIRE 2208 1872 2064 1872
WIRE 2064 1888 2064 1872
WIRE 2208 1888 2208 1872
WIRE 2064 1984 2064 1968
WIRE 2208 1984 2208 1968
WIRE 1920 2048 1776 2048
WIRE 2032 2048 1920 2048
WIRE 2160 2048 2032 2048
WIRE 2032 2064 2032 2048
WIRE 1776 2080 1776 2048
WIRE 1920 2080 1920 2048
WIRE 2032 2144 2032 2128
WIRE 2112 2144 2032 2144
WIRE 2208 2144 2208 2080
WIRE 2208 2144 2176 2144
WIRE 2032 2160 2032 2144
WIRE 2208 2160 2208 2144
WIRE 1776 2192 1776 2144
WIRE 1920 2192 1920 2160
WIRE 2032 2256 2032 2224
WIRE 2208 2256 2208 2240
SYMBOL NJF 2160 1984 R0
SYMATTR InstName Q1
SYMATTR Value 2N5484
SYMBOL diode 1760 2144 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL ind 1936 2176 R180
WINDOW 0 3 79 Right 2
WINDOW 3 1 40 Right 2
SYMATTR InstName L1
SYMATTR Value 100
SYMBOL VOLTAGE 2064 1872 R0
SYMATTR InstName V1
SYMATTR Value 7.
SYMBOL cap 2016 2160 R0
SYMATTR InstName C2
SYMATTR Value 500p
SYMBOL res 2192 2144 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL RES 2192 1872 R0
SYMATTR InstName R1
SYMATTR Value 500
SYMBOL cap 2176 2128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 200p
SYMBOL cap 2016 2064 R0
SYMATTR InstName C1
SYMATTR Value 500p
FLAG 1920 2192 0
FLAG 2032 2256 0
FLAG 2208 2256 0
FLAG 2064 1984 0
FLAG 1776 2192 0
TEXT 1832 2288 Left 2 !.tran 500 startup
TEXT 1832 2320 Left 2 !.options method=trap
TEXT 2048 2344 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3541-1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 3.6
L1 N001 OUT1 2.2
C1 OUT1 0 10
R1 OUT1 N002 243K
C2 OUT1 N002 22p
R2 N002 0 115K
C3 OUT2 0 2.2
R3 OUT2 N003 412K
R4 N003 0 150K
XU1 IN IN N002 N003 OUT2 OUT1 0 0 IN N001 LTC3541-1 ;pnba Vin)ENBuck)BuckFB)LFB)LVout)LVin)GND)Mode)ENVLDO)SW
Rload1 OUT1 0 12.5
Rload2 OUT2 0 50
.tran 3m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3541-1.asy)
.lib LTC3541-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 988 680
WIRE 96 -48 0 -48
WIRE 256 -48 96 -48
WIRE 416 -48 256 -48
WIRE 0 -32 0 -48
WIRE 256 -32 256 -48
WIRE 96 32 96 -48
WIRE 112 32 96 32
WIRE 416 32 416 -48
WIRE 416 32 400 32
WIRE 0 64 0 48
WIRE 112 144 96 144
WIRE 416 144 400 144
WIRE 512 144 496 144
WIRE 544 144 512 144
WIRE 624 144 544 144
WIRE 720 144 624 144
WIRE 800 144 720 144
WIRE 544 160 544 144
WIRE 624 160 624 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE -96 256 -240 256
WIRE 16 256 -96 256
WIRE 112 256 16 256
WIRE 544 256 544 224
WIRE 544 256 400 256
WIRE 624 256 624 240
WIRE 624 256 544 256
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE -240 272 -240 256
WIRE -96 272 -96 256
WIRE 16 272 16 256
WIRE 624 272 624 256
WIRE -240 368 -240 352
WIRE -96 368 -96 336
WIRE 16 368 16 352
WIRE 112 368 16 368
WIRE 512 368 512 144
WIRE 512 368 400 368
WIRE 624 368 624 352
WIRE 16 384 16 368
WIRE 256 448 256 432
WIRE 16 480 16 464
FLAG 256 448 0
FLAG 0 64 0
FLAG 0 -48 IN
FLAG 96 144 0
FLAG 800 256 0
FLAG 720 256 0
FLAG 800 144 OUT1
FLAG 624 368 0
FLAG -240 368 0
FLAG -96 368 0
FLAG -240 256 OUT2
FLAG 16 480 0
SYMBOL voltage 0 -48 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL ind 400 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 608 144 R0
SYMATTR InstName R1
SYMATTR Value 243K
SYMBOL cap 528 160 R0
SYMATTR InstName C2
SYMATTR Value 22p
SYMBOL res 608 256 R0
SYMATTR InstName R2
SYMATTR Value 115K
SYMBOL cap -112 272 R0
SYMATTR InstName C3
SYMATTR Value 2.2
SYMBOL res 0 256 R0
SYMATTR InstName R3
SYMATTR Value 412K
SYMBOL res 0 368 R0
SYMATTR InstName R4
SYMATTR Value 150K
SYMBOL PowerProducts\\LTC3541-1 256 192 R0
SYMATTR InstName U1
SYMBOL res 784 144 R0
SYMATTR InstName Rload1
SYMATTR Value 12.5
SYMBOL res -256 256 R0
SYMATTR InstName Rload2
SYMATTR Value 50
TEXT 616 448 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6417.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6417.asy)
C1 P002 0 2.2
C2 N003 P001 .1
V3 N004 0 PULSE(0 500m 10n .1n .1n 20n 40n)
V1 N001 0 5
XU1 N001 0 N003 N005 OUT+ OUT- N007 N001 N001 P002 N008 LTC6417 ;pnba V+)GND)IN+)IN-)OUT+)OUT-)VCM)CLHI)PWRADJ)_SHDN)V _OR
R1 P001 N002 50
E2 N006 0 0 N004 .5
E1 N002 0 N004 0 .5
C3 N005 P003 .1
R2 N008 0 1K
R3 P003 N006 50
V2 N007 0 1
.tran 50n
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2172 980
WIRE 96 -48 -80 -48
WIRE 176 -48 96 -48
WIRE 272 -48 176 -48
WIRE -80 -32 -80 -48
WIRE 176 -32 176 -48
WIRE 272 32 272 -48
WIRE -80 64 -80 48
WIRE 96 80 96 -48
WIRE 144 80 96 80
WIRE -96 144 -176 144
WIRE 96 144 48 144
WIRE -176 160 -176 144
WIRE -224 176 -272 176
WIRE 96 176 96 144
WIRE 144 176 96 176
WIRE 560 176 512 176
WIRE -224 224 -240 224
WIRE -176 256 -176 240
WIRE -528 272 -560 272
WIRE -272 272 -272 176
WIRE -272 272 -448 272
WIRE 144 272 96 272
WIRE 560 272 512 272
WIRE -96 304 -176 304
WIRE 96 304 96 272
WIRE 96 304 48 304
WIRE -176 320 -176 304
WIRE -272 336 -272 272
WIRE -224 336 -272 336
WIRE 144 368 64 368
WIRE 368 368 368 352
WIRE 64 400 64 368
WIRE -176 416 -176 400
WIRE 368 464 368 448
WIRE 64 512 64 480
WIRE 176 512 176 480
WIRE 272 512 272 480
SYMBOL cap 48 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL res 0 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL e2 -176 304 R0
SYMATTR InstName E2
SYMATTR Value .5
SYMATTR Type e
SYMBOL voltage -80 -48 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 48 288 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL voltage 64 384 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL cap 256 416 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL res 352 352 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 0 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 50
SYMBOL e -176 144 R0
SYMATTR InstName E1
SYMATTR Value .5
SYMBOL voltage -432 272 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 500m 10n .1n .1n 20n 40n)
SYMBOL opamps\\LTC6417 304 224 R0
SYMATTR InstName U1
FLAG 176 512 0
FLAG -80 64 0
FLAG 560 176 OUT+
FLAG 560 272 OUT-
FLAG 64 512 0
FLAG 368 464 0
FLAG 272 512 0
FLAG -560 272 0
FLAG -176 416 0
FLAG -176 256 0
FLAG -240 224 0
FLAG -224 384 0
TEXT 544 432 Left 2 !.tran 50n
* Z:\home\khalils\Downloads\files\data\raw_asc\c64f82078dab_06-thermalSimulation.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SOAtherm-HeatSink.asy)
XU1 NC_01 NC_02 NC_03 copper Rtheta=10 Tambient=85 Area_Contact_mm2=100 Volume_mm3=1000 ;pnba Tc)Tinterface)Tfin
R3 Tj Tc 1
R4 Tc N003 61
V1 N001 0 100
V2 N002 0 10
F1 0 Tj V(Out) * Id(M1) + V(G) * Ig(M1)
R2 G N002 50
R5 N004 N003 20
R1 N001 Out 5
M1 Out G 0 0 IPB035N08N3 RthetaJA=62 Tambient=25
VTa N003 0 25
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.options SOAaccounting=1 ;turns SOA accounting for MOSFETs that include theremal data
.tran 0 200 0 1
.temp 25
.lib SOAtherm-HeatSink.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2192 960
WIRE 656 -16 144 -16
WIRE 656 32 656 -16
WIRE 144 112 144 -16
WIRE 656 144 656 112
WIRE 816 144 656 144
WIRE 656 176 656 144
WIRE 480 208 336 208
WIRE 576 208 560 208
WIRE 336 224 336 208
WIRE 576 256 576 208
WIRE 608 256 576 256
WIRE 144 304 144 192
WIRE 336 336 336 304
WIRE 656 352 656 272
WIRE 1456 384 1408 384
WIRE 1328 400 1328 384
WIRE 1072 496 1056 496
WIRE 1136 496 1072 496
WIRE 1264 496 1216 496
WIRE 1328 496 1264 496
WIRE 1456 496 1456 384
WIRE 1456 496 1408 496
WIRE 1552 496 1456 496
WIRE 1056 544 1056 496
WIRE 1552 576 1552 496
WIRE 1056 736 1056 624
WIRE 1552 736 1552 656
SYMBOL SOAtherm-HeatSink 1488 208 R0
SYMATTR InstName U1
SYMBOL nmos 608 176 R0
SYMATTR InstName M1
SYMATTR Value IPB035N08N3 RthetaJA=62 Tambient=25
SYMBOL res 1312 400 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 20
SYMBOL voltage 1552 560 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Ta
SYMATTR Value 25
SYMBOL voltage 144 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 100
SYMBOL res 576 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL res 640 16 R0
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL res 1120 512 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL res 1312 512 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 61
SYMBOL voltage 336 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 10
SYMBOL f 1056 624 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName F1
SYMATTR Value V(Out) * Id(M1) + V(G) * Ig(M1)
FLAG 144 304 0
FLAG 336 336 0
FLAG 656 352 0
FLAG 816 144 Out
FLAG 1056 736 0
FLAG 1552 736 0
FLAG 1072 496 Tj
FLAG 1264 496 Tc
FLAG 576 208 G
TEXT 1144 16 Left 2 !.options SOAaccounting=1 ;turns SOA accounting for MOSFETs that include theremal data
TEXT 1144 -32 Left 2 !.tran 0 200 0 1
TEXT 1136 80 Left 2 !.temp 25
* Z:\home\khalils\Downloads\files\data\raw_asc\6e583d2288c1_Assignment_3b__vi_.asc
* Generated by LTspice 26.0.1 for Windows.
* Negative Half Wave Rectifier Circuit (with 10microF Capacitor) (Practical)
V1 N001 0 SINE(0 5 1000) Rser=0.001
D1 N002 N001 1N4148
C1 N002 0 0.00001
R1 N002 0 1000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5ms
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 320 80 208 80
WIRE 480 80 384 80
WIRE 592 80 480 80
WIRE 208 128 208 80
WIRE 480 128 480 80
WIRE 592 144 592 80
WIRE 208 256 208 208
WIRE 304 256 208 256
WIRE 480 256 480 208
WIRE 480 256 304 256
WIRE 592 256 592 208
WIRE 592 256 480 256
WIRE 304 288 304 256
SYMBOL voltage 208 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.001
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1000)
SYMBOL cap 576 144 R0
SYMATTR InstName C1
SYMATTR Value 0.00001
SYMBOL diode 384 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 464 112 R0
SYMATTR InstName R1
SYMATTR Value 1000
FLAG 304 288 0
TEXT 144 288 Left 2 !.tran 5ms
TEXT -24 8 Left 2 ;Negative Half Wave Rectifier Circuit (with 10microF Capacitor) (Practical)
* Z:\home\khalils\Downloads\files\data\raw_asc\0134c8312490_3_pmos_.asc
* Generated by LTspice 26.0.1 for Windows.
VBS N001 0 -900m
VGS N002 0 V
M2 DS N002 0 N001 CMOSP l=0.18u w=1.8u ad=0.81p as=0.81p pd=4.5u ps=4.5u
VDS DS 0 50m
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC_180nm.txt
.dc VGS 0 1.8 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1012 680
WIRE 496 64 336 64
WIRE 496 80 496 64
WIRE 496 192 496 160
WIRE 336 240 336 64
WIRE 512 288 336 288
WIRE 288 320 176 320
WIRE 176 352 176 320
WIRE 512 448 512 288
WIRE 176 496 176 432
WIRE 336 496 336 336
WIRE 336 496 176 496
WIRE 336 560 336 496
WIRE 512 576 512 528
SYMBOL pmos4 288 240 R0
SYMATTR InstName M2
SYMATTR Value CMOSP
SYMATTR Value2 l=0.18u w=1.8u ad=0.81p as=0.81p pd=4.5u ps=4.5u
SYMBOL voltage 176 336 R0
SYMATTR InstName VGS
SYMBOL voltage 496 64 R0
SYMATTR InstName VDS
SYMATTR Value 50m
SYMBOL voltage 512 432 R0
SYMATTR InstName VBS
SYMATTR Value -900m
FLAG 336 560 0
FLAG 512 576 0
FLAG 496 192 0
FLAG 496 64 DS
TEXT 616 192 Left 2 !.include TSMC_180nm.txt
TEXT 624 256 Left 2 !.dc VGS 0 1.8 0.05