* Z:\home\khalils\Downloads\files\data\raw_asc\766b79fa2ec2_fa3.asc
* Generated by LTspice 26.0.1 for Windows.
XM1 N002 A $G_VDD pmos_t2 ;pnba D)G)S
XM7 _Cout Cin N007 nmos_t2 ;pnba D)G)S
XM2 N007 A 0 nmos_t2 ;pnba D)G)S
XM3 N007 B 0 nmos_t2 ;pnba D)G)S
XM4 N009 B 0 nmos_t2 ;pnba D)G)S
XM5 _Cout A N009 nmos_t2 ;pnba D)G)S
XM6 _Cout Cin N002 pmos_t2 ;pnba D)G)S
XM8 N002 B $G_VDD pmos_t2 ;pnba D)G)S
XM9 N004 B $G_VDD pmos_t2 ;pnba D)G)S
XM10 _Cout A N004 pmos_t2 ;pnba D)G)S
XM11 N003 A $G_VDD pmos_t2 ;pnba D)G)S
XM12 N003 B $G_VDD pmos_t2 ;pnba D)G)S
XM13 N003 Cin $G_VDD pmos_t2 ;pnba D)G)S
XM15 _S _Cout N003 pmos_t2 ;pnba D)G)S
XM16 N008 A 0 nmos_t2 ;pnba D)G)S
XM17 N008 B 0 nmos_t2 ;pnba D)G)S
XM18 N008 Cin 0 nmos_t2 ;pnba D)G)S
XM14 N001 A $G_VDD pmos_t2 ;pnba D)G)S
XM19 N005 B N001 pmos_t2 ;pnba D)G)S
XM20 _S Cin N005 pmos_t2 ;pnba D)G)S
XM21 _S Cin N006 nmos_t2 ;pnba D)G)S
XM22 N006 B N010 nmos_t2 ;pnba D)G)S
XM23 N010 A 0 nmos_t2 ;pnba D)G)S
XM24 _S _Cout N008 nmos_t2 ;pnba D)G)S
.lib '../../lib/cfg.lib'
* Full adder\nfrom "Digital Integrated Circuits. Rabaey.", Chapter 11\n \n-24 transistors
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2652 2208
WIRE -4704 912 -4704 864
WIRE -4704 912 -4992 912
WIRE -4432 912 -4704 912
WIRE -3600 912 -3600 864
WIRE -3600 912 -3888 912
WIRE -3328 912 -3600 912
WIRE -3024 912 -3024 848
WIRE -3072 928 -3104 928
WIRE -4992 976 -4992 912
WIRE -4704 976 -4704 912
WIRE -4432 976 -4432 912
WIRE -3888 976 -3888 912
WIRE -3600 976 -3600 912
WIRE -3328 976 -3328 912
WIRE -5040 992 -5072 992
WIRE -4752 992 -4784 992
WIRE -4480 992 -4512 992
WIRE -3936 992 -3968 992
WIRE -3648 992 -3680 992
WIRE -3376 992 -3408 992
WIRE -3024 1040 -3024 1008
WIRE -3072 1056 -3104 1056
WIRE -4992 1104 -4992 1072
WIRE -4848 1104 -4992 1104
WIRE -4704 1104 -4704 1072
WIRE -4704 1104 -4848 1104
WIRE -3888 1104 -3888 1072
WIRE -3600 1104 -3600 1072
WIRE -3600 1104 -3888 1104
WIRE -3328 1104 -3328 1072
WIRE -3328 1104 -3600 1104
WIRE -4848 1168 -4848 1104
WIRE -4432 1168 -4432 1072
WIRE -3600 1168 -3600 1104
WIRE -3024 1168 -3024 1136
WIRE -4896 1184 -4928 1184
WIRE -4480 1184 -4512 1184
WIRE -3648 1184 -3680 1184
WIRE -3072 1184 -3104 1184
WIRE -4928 1296 -4928 1184
WIRE -4928 1296 -5056 1296
WIRE -4848 1296 -4848 1264
WIRE -4432 1296 -4432 1264
WIRE -4432 1296 -4848 1296
WIRE -3984 1296 -4432 1296
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WIRE -3680 1296 -3984 1296
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WIRE -3024 1296 -3024 1264
WIRE -3024 1296 -3600 1296
WIRE -2896 1296 -3024 1296
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WIRE -4432 1328 -4432 1296
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WIRE -3024 1328 -3024 1296
WIRE -4928 1408 -4928 1296
WIRE -4896 1408 -4928 1408
WIRE -4480 1408 -4512 1408
WIRE -3680 1408 -3680 1296
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WIRE -3072 1408 -3104 1408
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WIRE -4704 1488 -4848 1488
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WIRE -3600 1488 -3888 1488
WIRE -3328 1488 -3600 1488
WIRE -4992 1520 -4992 1488
WIRE -4704 1520 -4704 1488
WIRE -4432 1520 -4432 1424
WIRE -3888 1520 -3888 1488
WIRE -3600 1520 -3600 1488
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WIRE -3072 1536 -3104 1536
WIRE -3024 1584 -3024 1552
WIRE -5040 1600 -5072 1600
WIRE -4752 1600 -4784 1600
WIRE -4480 1600 -4512 1600
WIRE -3936 1600 -3968 1600
WIRE -3648 1600 -3680 1600
WIRE -3376 1600 -3408 1600
WIRE -3072 1664 -3104 1664
WIRE -4992 1680 -4992 1616
WIRE -4704 1680 -4704 1616
WIRE -4704 1680 -4992 1680
WIRE -4432 1680 -4432 1616
WIRE -4432 1680 -4704 1680
WIRE -3888 1680 -3888 1616
WIRE -3600 1680 -3600 1616
WIRE -3600 1680 -3888 1680
WIRE -3328 1680 -3328 1616
WIRE -3328 1680 -3600 1680
WIRE -3280 1680 -3328 1680
WIRE -4704 1728 -4704 1680
WIRE -3600 1728 -3600 1680
WIRE -3024 1744 -3024 1680
FLAG -4784 992 B
IOPIN -4784 992 In
FLAG -5072 992 A
IOPIN -5072 992 In
FLAG -4704 1728 0
FLAG -4704 864 $G_VDD
FLAG -5072 1600 A
IOPIN -5072 1600 In
FLAG -4784 1600 B
IOPIN -4784 1600 In
FLAG -5056 1296 Cin
IOPIN -5056 1296 In
FLAG -4512 992 B
IOPIN -4512 992 In
FLAG -4512 1184 A
IOPIN -4512 1184 In
FLAG -4512 1408 A
IOPIN -4512 1408 In
FLAG -4512 1600 B
IOPIN -4512 1600 In
FLAG -3984 1296 _Cout
FLAG -3680 992 B
IOPIN -3680 992 In
FLAG -3968 992 A
IOPIN -3968 992 In
FLAG -3600 864 $G_VDD
FLAG -3408 992 Cin
IOPIN -3408 992 In
FLAG -3600 1728 0
FLAG -3968 1600 A
IOPIN -3968 1600 In
FLAG -3680 1600 B
IOPIN -3680 1600 In
FLAG -3408 1600 Cin
IOPIN -3408 1600 In
FLAG -3104 1056 B
IOPIN -3104 1056 In
FLAG -3104 1184 Cin
IOPIN -3104 1184 In
FLAG -3104 928 A
IOPIN -3104 928 In
FLAG -3024 848 $G_VDD
FLAG -3104 1408 Cin
IOPIN -3104 1408 In
FLAG -3104 1536 B
IOPIN -3104 1536 In
FLAG -3104 1664 A
IOPIN -3104 1664 In
FLAG -3024 1744 0
FLAG -2896 1296 _S
IOPIN -2896 1296 Out
SYMBOL pmos -5040 1072 M180
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M1
SYMATTR Value pmos_t2
SYMATTR Prefix X
SYMBOL nmos -4896 1328 R0
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M7
SYMATTR Value nmos_t2
SYMATTR Prefix X
SYMBOL nmos -5040 1520 R0
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M2
SYMATTR Value nmos_t2
SYMATTR Prefix X
SYMBOL nmos -4752 1520 R0
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M3
SYMATTR Value nmos_t2
SYMATTR Prefix X
SYMBOL nmos -4480 1520 R0
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M4
SYMATTR Value nmos_t2
SYMATTR Prefix X
SYMBOL nmos -4480 1328 R0
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M5
SYMATTR Value nmos_t2
SYMATTR Prefix X
SYMBOL pmos -4896 1264 M180
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M6
SYMATTR Value pmos_t2
SYMATTR Prefix X
SYMBOL pmos -4752 1072 M180
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M8
SYMATTR Value pmos_t2
SYMATTR Prefix X
SYMBOL pmos -4480 1072 M180
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M9
SYMATTR Value pmos_t2
SYMATTR Prefix X
SYMBOL pmos -4480 1264 M180
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M10
SYMATTR Value pmos_t2
SYMATTR Prefix X
SYMBOL pmos -3936 1072 M180
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M11
SYMATTR Value pmos_t2
SYMATTR Prefix X
SYMBOL pmos -3648 1072 M180
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M12
SYMATTR Value pmos_t2
SYMATTR Prefix X
SYMBOL pmos -3376 1072 M180
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M13
SYMATTR Value pmos_t2
SYMATTR Prefix X
SYMBOL pmos -3648 1264 M180
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M15
SYMATTR Value pmos_t2
SYMATTR Prefix X
SYMBOL nmos -3936 1520 R0
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M16
SYMATTR Value nmos_t2
SYMATTR Prefix X
SYMBOL nmos -3648 1520 R0
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M17
SYMATTR Value nmos_t2
SYMATTR Prefix X
SYMBOL nmos -3376 1520 R0
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M18
SYMATTR Value nmos_t2
SYMATTR Prefix X
SYMBOL pmos -3072 1008 M180
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M14
SYMATTR Value pmos_t2
SYMATTR Prefix X
SYMBOL pmos -3072 1136 M180
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M19
SYMATTR Value pmos_t2
SYMATTR Prefix X
SYMBOL pmos -3072 1264 M180
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M20
SYMATTR Value pmos_t2
SYMATTR Prefix X
SYMBOL nmos -3072 1328 R0
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M21
SYMATTR Value nmos_t2
SYMATTR Prefix X
SYMBOL nmos -3072 1456 R0
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M22
SYMATTR Value nmos_t2
SYMATTR Prefix X
SYMBOL nmos -3072 1584 R0
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M23
SYMATTR Value nmos_t2
SYMATTR Prefix X
SYMBOL nmos -3648 1328 R0
WINDOW 3 56 72 Invisible 2
SYMATTR InstName M24
SYMATTR Value nmos_t2
SYMATTR Prefix X
TEXT -5040 1888 Left 2 !.lib '../../lib/cfg.lib'
TEXT -5104 1968 Left 4 ;Full adder\nfrom "Digital Integrated Circuits. Rabaey.", Chapter 11\n \n-24 transistors