Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3462A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3462A.asy)
C3 OUT N003 22p
R1 OUT N003 267K
XU1 N001 0 N003 N004 N002 IN LT3462A ;pnba SW)GND)FB)SDREF)D)Vin
L1 IN N001 22 Rser=10m
K1 L1 L2 1
Rload OUT 0 50
R2 N003 N004 68.1K
C1 OUT 0 2.2
C2 N002 N001 1 Rser=50m
L2 OUT N002 22 Rser=10m
V1 IN 0 5
.tran 500u startup
.lib LT3462A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1280 680
WIRE 16 96 -64 96
WIRE 48 96 16 96
WIRE 160 96 128 96
WIRE 176 96 160 96
WIRE 256 96 240 96
WIRE 272 96 256 96
WIRE 384 96 352 96
WIRE 496 96 384 96
WIRE 592 96 496 96
WIRE 688 96 592 96
WIRE -64 112 -64 96
WIRE 384 112 384 96
WIRE 592 112 592 96
WIRE 688 112 688 96
WIRE 496 128 496 96
WIRE 160 160 160 96
WIRE 256 160 256 96
WIRE 592 208 592 176
WIRE 688 208 688 192
WIRE -64 224 -64 192
WIRE 16 224 16 96
WIRE 96 224 16 224
WIRE 384 224 384 192
WIRE 384 224 320 224
WIRE 496 224 496 192
WIRE 496 224 384 224
WIRE 384 240 384 224
WIRE 384 336 384 320
WIRE 384 336 320 336
WIRE 208 400 208 384
SYMBOL PowerProducts\\LT3462A 208 256 R0
SYMATTR InstName U1
SYMBOL res 672 96 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 368 96 R0
SYMATTR InstName R1
SYMATTR Value 267K
SYMBOL cap 240 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
SYMATTR SpiceLine Rser=50m
SYMBOL ind2 368 112 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 22
SYMATTR Type ind
SYMATTR SpiceLine Rser=10m
SYMBOL cap 480 128 R0
SYMATTR InstName C3
SYMATTR Value 22p
SYMBOL res 368 224 R0
SYMATTR InstName R2
SYMATTR Value 68.1K
SYMBOL ind2 32 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 22
SYMATTR Type ind
SYMATTR SpiceLine Rser=10m
SYMBOL cap 576 112 R0
WINDOW 3 29 52 Left 2
SYMATTR Value 2.2
SYMATTR InstName C1
FLAG 208 400 0
FLAG -64 224 0
FLAG 592 208 0
FLAG 688 208 0
FLAG -64 96 IN
FLAG 688 96 OUT
TEXT 448 368 Left 2 !.tran 500u startup
TEXT 208 32 Center 2 !K1 L1 L2 1
* Z:\tmp\asc_dec_bjh7r6w2\037dc35a8aa9_Draft20_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
C5 N001 N004 50p
C3 N002 N008 2n
R5 v- v+ 100
R3 PE N005 1
C7 v- N008 22n
V2 N002 N007 300
C1 N002 N003 100n
D2 N001 v+ RRE07VSM4S
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1748 996
WIRE 832 112 800 112
WIRE 304 144 160 144
WIRE 480 144 304 144
WIRE 592 144 480 144
WIRE 704 144 592 144
WIRE 832 144 832 112
WIRE 896 144 832 144
WIRE 992 144 960 144
WIRE 1088 144 992 144
WIRE 1216 144 1216 112
WIRE 1216 144 1088 144
WIRE 480 192 480 144
WIRE 592 192 592 144
WIRE 704 192 704 144
WIRE 832 192 832 144
WIRE 992 192 992 144
WIRE 1088 192 1088 144
WIRE 480 288 480 256
WIRE 544 288 480 288
WIRE 592 288 592 272
WIRE 592 288 544 288
WIRE 544 304 544 288
WIRE 160 320 160 144
WIRE 704 320 704 272
WIRE 736 320 736 112
WIRE 736 320 704 320
WIRE 832 320 832 272
WIRE 992 320 992 256
WIRE 992 320 832 320
WIRE 1088 320 1088 272
WIRE 1088 320 992 320
WIRE 1216 320 1216 288
WIRE 1216 320 1088 320
WIRE 544 384 544 368
WIRE 624 384 544 384
WIRE 704 384 704 320
WIRE 704 384 624 384
WIRE 832 384 832 320
WIRE -304 400 -304 304
WIRE -256 400 -304 400
WIRE -144 400 -176 400
WIRE -112 400 -144 400
WIRE 624 448 624 384
WIRE -304 496 -304 400
WIRE -256 496 -304 496
WIRE -128 496 -176 496
WIRE -112 496 -128 496
WIRE 576 528 464 528
WIRE 464 560 464 528
WIRE 1216 608 1216 320
WIRE 160 672 160 400
WIRE 224 672 160 672
WIRE 464 672 464 640
WIRE 464 672 224 672
WIRE 624 672 464 672
WIRE 224 704 224 672
WIRE 304 704 304 144
WIRE 992 704 992 320
WIRE 224 800 224 768
WIRE 224 800 64 800
WIRE 304 800 304 768
WIRE 304 800 224 800
WIRE 992 800 992 768
WIRE 992 800 304 800
WIRE 1200 832 1168 832
WIRE 1168 944 1168 832
SYMBOL cap 800 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 50p
SYMBOL cap 288 704 R0
SYMATTR InstName C3
SYMATTR Value 2n
SYMBOL res 1104 288 R180
WINDOW 0 -43 87 Left 2
WINDOW 3 -48 44 Left 2
SYMATTR InstName R5
SYMATTR Value 100
SYMBOL res -160 480 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL cap 976 704 R0
SYMATTR InstName C7
SYMATTR Value 22n
SYMBOL voltage 160 304 R0
SYMATTR InstName V2
SYMATTR Value 300
SYMBOL cap 464 192 R0
WINDOW 0 -21 6 Left 2
WINDOW 3 -48 51 Left 2
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL diode 896 160 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value RRE07VSM4S
FLAG -144 400 N
FLAG -128 496 PE
FLAG 1216 112 v+
FLAG 1216 288 v-
* Z:\home\khalils\Downloads\files\data\raw_asc\41ccdb11c2e4_AD8067.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8067.asy)
V1 +V 0 12
Vin N002 0 SINE(0 1 1Meg)
R4 N003 N002 49.9
Rload OUT 0 1K
R2 OUT N001 1K
XU1 N003 N001 +V -V OUT AD8067 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 110
V2 -V 0 -12
.tran 10u
.lib AD8067.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 96 -1200 96 -1216
WIRE 208 -1200 208 -1216
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 96 -1104 96 -1120
WIRE 208 -1104 208 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 720 -1104 640 -1104
WIRE 400 -1088 304 -1088
WIRE 544 -1088 480 -1088
WIRE 720 -1088 720 -1104
WIRE 304 -1072 304 -1088
WIRE 720 -992 720 -1008
WIRE 304 -976 304 -992
SYMBOL res 496 -1104 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 49.9
SYMBOL voltage 208 -1216 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL res 704 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 110
SYMBOL Opamps\\AD8067 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 304 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 1Meg)
SYMBOL voltage 96 -1216 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
FLAG 96 -1216 +V
FLAG 304 -976 0
FLAG 720 -1104 OUT
FLAG 576 -1136 +V
FLAG 208 -1216 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 720 -992 0
FLAG 208 -1104 0
FLAG 96 -1104 0
TEXT 784 -896 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6010.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6010.asy)
V3 N003 0 SINE(0 1 1K)
V1 +V 0 10
XU1 N003 N001 N002 +V -V NC_01 LT6010 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN
R1 N002 N001 1K
V2 -V 0 -10
R2 N001 0 1K
.tran 3m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -112 48 -128 48
WIRE 0 48 -32 48
WIRE 96 48 0 48
WIRE 208 48 176 48
WIRE 64 112 64 96
WIRE -416 160 -416 144
WIRE -288 160 -288 144
WIRE 0 160 0 48
WIRE 32 160 0 160
WIRE 208 192 208 48
WIRE 208 192 176 192
WIRE 32 224 -160 224
WIRE -160 240 -160 224
WIRE -416 256 -416 240
WIRE -288 256 -288 240
WIRE 64 288 64 272
WIRE -160 336 -160 320
SYMBOL res -16 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL opamps\\LT6010 64 192 R0
SYMATTR InstName U1
SYMBOL voltage -160 224 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 192 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -416 144 R0
SYMATTR InstName V2
SYMATTR Value -10
FLAG -288 256 0
FLAG 64 96 +V
FLAG -288 144 +V
FLAG 64 288 -V
FLAG -416 256 0
FLAG -416 144 -V
FLAG -128 48 0
FLAG -160 336 0
TEXT 160 312 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2120-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2120-2.5.asy)
L1 N002 OUT 2.2
V1 IN 0 5
R1 OUT N001 100K
XU1 IN IN N002 0 0 OUT IN N001 IN IN ADP2120-2.5 ;pnba Vin)Pvin)SW)PGND)GND)FB)TRK)Pgood)Sync/Mode)EN
C1 OUT 0 20
Rload OUT 0 2.5
.tran 1m
.lib ADP2120-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 0 48 0
WIRE 288 0 128 0
WIRE 48 16 48 0
WIRE 288 16 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 640 64 576 64
WIRE 48 112 48 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 640 144 640 64
WIRE 640 144 560 144
WIRE 704 144 640 144
WIRE 560 160 560 144
WIRE 704 160 704 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 560 256 560 224
WIRE 704 256 704 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 640 304 640 144
WIRE 640 304 416 304
WIRE 288 368 288 352
SYMBOL voltage 48 0 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADP2120-2.5 288 272 R0
SYMATTR InstName U1
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 20
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL res 688 144 R0
SYMATTR Value 2.5
SYMATTR InstName Rload
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
FLAG 560 256 0
FLAG 288 368 0
FLAG 48 112 0
FLAG 704 144 OUT
FLAG 704 256 0
FLAG 48 0 IN
TEXT 504 344 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8615.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8615.asy)
Rload OUT 0 2K
R1 N001 0 1K
XU1 IN N001 +V -V OUT AD8615 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 2.5
Vin IN 0 SINE(0 1 500K)
R2 OUT N001 1K
V2 -V 0 -2.5
.tran 20u
.lib AD8615.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE 416 -1184 400 -1184
WIRE 512 -1184 496 -1184
WIRE 528 -1184 512 -1184
WIRE 624 -1184 608 -1184
WIRE 176 -1088 176 -1104
WIRE 272 -1088 272 -1104
WIRE 512 -1072 512 -1184
WIRE 528 -1072 512 -1072
WIRE 624 -1056 624 -1184
WIRE 624 -1056 592 -1056
WIRE 752 -1056 624 -1056
WIRE 528 -1040 416 -1040
WIRE 752 -1040 752 -1056
WIRE 416 -1024 416 -1040
WIRE 176 -992 176 -1008
WIRE 272 -992 272 -1008
WIRE 752 -944 752 -960
WIRE 416 -928 416 -944
SYMBOL voltage 272 -1104 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL AD8615 560 -1120 R0
SYMATTR InstName U1
SYMBOL res 736 -1056 R0
SYMATTR InstName Rload
SYMATTR Value 2K
SYMBOL res 624 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 512 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 416 -1040 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 500K)
SYMBOL voltage 176 -1104 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
FLAG 416 -928 0
FLAG 752 -1056 OUT
FLAG 416 -1040 IN
FLAG 560 -1088 +V
FLAG 560 -1024 -V
FLAG 400 -1184 0
FLAG 752 -944 0
FLAG 176 -1104 +V
FLAG 176 -992 0
FLAG 272 -1104 -V
FLAG 272 -992 0
TEXT 736 -856 Left 2 !.tran 20u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1173-12.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1173-12.asy)
D1 N001 OUT MBRS140
Rload OUT 0 120
V1 IN 0 5
L1 IN N001 100 Rser=0.02 Rpar=5000
C1 OUT 0 100 Rser=0.02
XU1 IN IN N001 0 0 MP_01 MP_02 OUT LT1173 top=753K bot=87.4K ;pnba Ilim)Vin)SW1)SW2)GND)))Sense
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
.lib LT1173.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2528 1408
WIRE 1472 912 1328 912
WIRE 1600 912 1472 912
WIRE 1632 912 1600 912
WIRE 1728 912 1712 912
WIRE 1776 912 1728 912
WIRE 1888 912 1840 912
WIRE 1968 912 1888 912
WIRE 1328 928 1328 912
WIRE 1968 928 1968 912
WIRE 1472 960 1472 912
WIRE 1600 960 1600 912
WIRE 1328 1024 1328 1008
WIRE 1968 1024 1968 1008
WIRE 1728 1040 1728 912
WIRE 1728 1040 1664 1040
WIRE 1888 1104 1888 912
WIRE 1888 1104 1664 1104
WIRE 1888 1120 1888 1104
WIRE 1680 1168 1664 1168
WIRE 1888 1200 1888 1184
WIRE 1536 1264 1536 1248
SYMBOL schottky 1776 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL PowerProducts\\LT1173-12 1536 1104 R0
SYMATTR InstName U1
SYMBOL res 1952 912 R0
SYMATTR InstName Rload
SYMATTR Value 120
SYMBOL IND 1616 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL VOLTAGE 1328 912 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL POLCAP 1872 1120 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
FLAG 1536 1264 0
FLAG 1680 1168 0
FLAG 1968 1024 0
FLAG 1888 1200 0
FLAG 1328 1024 0
FLAG 1968 912 OUT
FLAG 1328 912 IN
TEXT 1736 1256 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4530-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4530-1.asy)
;.options gmin=1e-15 ; Uncomment to see actual ADA4530 input impedance
R2 OUT 0 10K
V1 +V 0 5
R1 OUT IN 100Meg
C1 OUT IN 5p
I1 IN 0 PULSE(0 10n 1m 1u 1u 1 2)
XU2 0 IN +V -V OUT N001 ADA4530-1 ;pnba In+)In-)V+)V-)OUT)GDR
V2 0 -V 5
.tran 10
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1424 1064
WIRE 256 -96 192 -96
WIRE 368 -96 320 -96
WIRE -96 0 -96 -16
WIRE 80 0 80 -16
WIRE 192 16 192 -96
WIRE 240 16 192 16
WIRE 368 16 368 -96
WIRE 368 16 320 16
WIRE -96 96 -96 80
WIRE 80 96 80 80
WIRE 256 144 256 128
WIRE 192 160 192 16
WIRE 192 160 -192 160
WIRE 240 160 192 160
WIRE -192 176 -192 160
WIRE 368 176 368 16
WIRE 368 176 304 176
WIRE 480 176 368 176
WIRE 240 192 208 192
WIRE 480 192 480 176
WIRE 256 224 256 208
WIRE 288 240 288 208
WIRE -192 272 -192 256
WIRE 480 288 480 272
SYMBOL current -192 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value PULSE(0 10n 1m 1u 1u 1 2)
SYMBOL cap 320 -112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 5p
SYMBOL voltage 80 96 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL ADA4530-1 272 176 R0
SYMATTR InstName U2
SYMBOL res 336 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100Meg
SYMBOL res 464 176 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage -96 -16 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -96 96 0
FLAG 80 96 0
FLAG -96 -16 +V
FLAG 80 -16 -V
FLAG 256 128 +V
FLAG 256 224 -V
FLAG 480 288 0
FLAG -192 272 0
FLAG 480 176 OUT
FLAG -192 160 IN
FLAG 208 192 0
TEXT -48 384 Left 2 !.tran 10\n;.options gmin=1e-15 ; Uncomment to see actual  ADA4530 input impedance
* Z:\home\khalils\Downloads\files\data\raw_asc\18a87c090089_2903-C1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2903-C1.asy)
R1 N002 N001 10K
V1 N001 0 PULSE(0 5 0 5)
V3 N005 0 PULSE(0 1.8 0 1.8)
V2 N004 0 PULSE(0 3.3 0 3.3)
V4 N003 0 PULSE(0 -5.2 0 5.2)
XU1 N001 0 N004 N005 N003 N002 LTC2903-C1 ;pnba V1)GND)V2)V3)V4)_RST
.tran 5.5
.lib LTC2903-C1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 48 32 48
WIRE 304 48 208 48
WIRE 32 176 32 48
WIRE 32 176 -176 176
WIRE 80 176 32 176
WIRE 304 176 304 48
WIRE 304 176 272 176
WIRE -176 192 -176 176
WIRE 80 240 48 240
WIRE 400 240 272 240
WIRE 400 256 400 240
WIRE -176 288 -176 272
WIRE 80 320 0 320
WIRE 304 320 272 320
WIRE 0 336 0 320
WIRE 304 336 304 320
WIRE 400 352 400 336
WIRE 0 432 0 416
WIRE 304 432 304 416
SYMBOL voltage 400 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 -5.2 0 5.2)
SYMBOL res 224 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 0 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 0 3.3)
SYMBOL voltage 304 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 1.8 0 1.8)
SYMATTR InstName V3
SYMBOL voltage -176 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 5 0 5)
SYMATTR InstName V1
SYMBOL LTC2903-C1 176 240 R0
SYMATTR InstName U1
FLAG 48 240 0
FLAG -176 288 0
FLAG 0 432 0
FLAG 304 432 0
FLAG 400 352 0
TEXT 368 480 Left 2 !.tran 5.5
* Z:\home\khalils\Downloads\files\data\raw_asc\0d68d9403a26_Fig1_27_old.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot v(Vin) and V(vout)
Vin Vin 0 PULSE(0 1 6n 0 0 3n 10n)
R1 Vin Vout 1k
C1 Vout 0 1p
.tran 30n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 0 240 0 224
WIRE 0 336 0 320
WIRE 48 224 0 224
WIRE 112 224 48 224
WIRE 320 224 192 224
WIRE 352 224 320 224
WIRE 352 240 352 224
WIRE 352 336 352 304
SYMBOL cap 336 240 R0
SYMATTR InstName C1
SYMATTR Value 1p
SYMBOL res 96 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 0 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(0 1 6n 0 0 3n 10n)
FLAG 0 336 0
FLAG 352 336 0
FLAG 320 224 Vout
FLAG 48 224 Vin
TEXT 40 400 Left 0 !.tran 30n
TEXT 24 144 Left 0 ;Plot v(Vin) and V(vout)
* Z:\home\khalils\Downloads\files\data\raw_asc\SampleAndHold.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* This output follows the input whenever the S/H input is true.
* This output latches to the input when the CLK input goes TRUE.
* The behavioral Sample and Hold has two modes of operation.
A1 IN 0 0 N001 0 0 A 0 SAMPLEHOLD
A2 IN 0 N001 0 0 0 B 0 SAMPLEHOLD
V2 N001 0 PULSE(0 1 0 1u 1u 50u 100u)
V1 IN 0 SINE(0 1 300)
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 680
WIRE 128 64 32 64
WIRE 336 112 304 112
WIRE 128 160 64 160
WIRE 32 272 32 64
WIRE 32 272 -160 272
WIRE 128 272 32 272
WIRE -160 288 -160 272
WIRE 336 320 304 320
WIRE 64 336 64 160
WIRE 128 336 64 336
WIRE -160 384 -160 368
WIRE 64 400 64 336
WIRE 64 512 64 480
SYMBOL SpecialFunctions\\sample 208 304 R0
SYMATTR InstName A2
SYMBOL voltage 64 384 R0
WINDOW 0 18 18 Left 2
WINDOW 3 23 97 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 0 1u 1u 50u 100u)
SYMBOL SpecialFunctions\\sample 208 96 R0
SYMATTR InstName A1
SYMBOL voltage -160 272 R0
WINDOW 3 23 92 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 1 300)
SYMATTR InstName V1
FLAG 64 512 0
FLAG -160 384 0
FLAG 336 112 A
FLAG 336 320 B
FLAG -160 272 IN
TEXT 472 528 Left 2 !.tran 10m
TEXT 208 552 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT 360 112 Left 2 ;This output follows the input whenever the S/H input is true.
TEXT 360 320 Left 2 ;This output latches to the input when the CLK input goes TRUE.
TEXT 208 -8 Bottom 2 ;The behavioral Sample and Hold has two modes of operation.
* Z:\home\khalils\Downloads\files\data\raw_asc\6f7538688507_npn_diode.asc
* Generated by LTspice 26.0.1 for Windows.
* NPN diode connection
V1 +2 0 PULSE(-3 3 0 5m 5m 0 10m)
Q1 +1 +1 0 0 2N3904
R1 +2 +1 1k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -224 -192 -272 -192
WIRE 144 -192 -224 -192
WIRE 224 -192 144 -192
WIRE 144 -144 144 -192
WIRE -224 -128 -224 -192
WIRE 144 -32 144 -64
WIRE 224 -32 144 -32
WIRE -224 -16 -224 -48
WIRE 144 16 144 -32
WIRE 224 16 144 16
WIRE 144 64 144 16
WIRE 144 64 16 64
WIRE 144 96 144 64
WIRE 16 144 16 64
WIRE 80 144 16 144
WIRE 144 224 144 192
WIRE 224 224 144 224
WIRE 144 272 144 224
IOPIN -272 -192 In
IOPIN 224 -192 In
IOPIN 224 -32 In
IOPIN 224 16 In
IOPIN 224 224 In
SYMBOL res 128 -160 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL npn 80 96 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage -224 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(-3 3 0 5m 5m 0 10m)
FLAG -272 -192 W1
FLAG 224 -192 +2
FLAG 224 -32 -2
FLAG 224 16 +1
FLAG 224 224 -1
FLAG -224 -16 0
FLAG 144 272 0
TEXT -208 304 Left 2 !.tran 100m
TEXT -168 -264 Left 2 ;NPN diode connection
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP166-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP166-1.8.asy)
C1 OUT 0 1
V1 IN 0 5
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
XU1 IN 0 N001 OUT ADP16xf K=555.6u ;pnba Vin)GND)En)Vout
Rload OUT 0 180
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 416 96 352 96
WIRE 512 96 416 96
WIRE -64 112 -64 96
WIRE 416 112 416 96
WIRE 512 112 512 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 416 208 416 176
WIRE 512 208 512 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 180
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ADP166-1.8 256 208 R0
SYMATTR InstName U1
FLAG -64 208 0
FLAG 256 272 0
FLAG 416 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1261CS8-4.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1261CS8-4.5.asy)
XU2 IN N001 N003 0 NC_01 OUT N002 NC_02 LTC1261CS8-4.5 ;pnba Vcc)C1+)C1-)GND)COMP)OUT)REG)SHDN
Rload OUT 0 800
C2 N001 N003 0.1
R1 IN N002 10k
V1 IN 0 5
C3 OUT 0 3.3
.tran 2m
.lib LTC1261CS8-4.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2424 2180
WIRE 1680 1056 1536 1056
WIRE 2064 1056 1680 1056
WIRE 1536 1072 1536 1056
WIRE 2064 1088 2064 1056
WIRE 1680 1136 1680 1056
WIRE 1712 1136 1680 1136
WIRE 1536 1168 1536 1152
WIRE 1712 1200 1632 1200
WIRE 2064 1200 2064 1168
WIRE 2064 1200 2000 1200
WIRE 1712 1264 1632 1264
WIRE 2064 1264 2000 1264
WIRE 2160 1264 2064 1264
WIRE 2064 1280 2064 1264
WIRE 2160 1280 2160 1264
WIRE 1712 1328 1696 1328
WIRE 2064 1376 2064 1344
WIRE 2160 1376 2160 1360
SYMBOL res 2048 1072 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL LTC1261CS8-4.5 1856 1232 R0
SYMATTR InstName U2
SYMBOL VOLTAGE 1536 1056 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 2144 1264 R0
SYMATTR InstName Rload
SYMATTR Value 800
SYMBOL cap 1616 1200 R0
WINDOW 0 33 18 Left 2
WINDOW 3 30 49 Left 2
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL cap 2048 1280 R0
SYMATTR InstName C3
SYMATTR Value 3.3
FLAG 1696 1328 0
FLAG 1536 1168 0
FLAG 2064 1376 0
FLAG 2160 1376 0
FLAG 2160 1264 OUT
FLAG 1536 1056 IN
TEXT 1816 1408 Left 2 !.tran 2m