* Z:\home\khalils\Downloads\files\data\raw_asc\fra_eg9_LT3748_sampled.asc
* Generated by LTspice 26.0.1 for Windows.
* sample & hold
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3748.asy)
@1 A B delay=2.5m fstart=200 fend=6.4k oct=2 fcoarse=800 nmax=1 3 1k 3 1.01k 1 pp0=1 pp1=250m f0=400 f1=1.6K tavgmin=1m tsettle=500u
A1 N005 0 N007 0 0 0 N006 0 SAMPLEHOLD Vhigh=100 ref=8m
C3 OUT 0 100
L1 IN Act 60.8 Rpar=5K
C4 0 SS 1p
R1 TC 0 56.2K
E1 Act Bct A B 1
R4 P001 0 10K
XU1 0 MP_01 MP_02 gate IN INTVCC N002 MP_03 MP_04 SS N004 VC Rfb N003 TC LT3748 ;pnba GND)))Gate)Vin)INTVcc)EN/UVLO)))SS)Sense)Vc)Rfb)Rref)TC
R7 N004 0 33m
V1 IN 0 48
C1 VC P001 4700p
B2 N007 0 V=V(IN,Rfb)
R5 IN N002 412K
R3 0 N003 6.04K
D1 N001 OUT 30BQ060
R2 Bct Rfb 243K
E2 A 0 N006 0 1
K1 L1 L2 1.
M1 Act gate N004 N004 Si4490DY
B1 N005 0 V=absdelay(V(Act,IN),100n)
C2 0 INTVCC 4.7
ILOAD OUT 0 PULSE(0 2 10u 500u 500u 1)
R6 N002 0 15.4K
L2 0 N001 3.8 Rpar=5K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.fra
.options trtol=4
.ic V(OUT)=12.2 V(INTVCC)=7
.lib LT3748.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2168 944
WIRE -48 -144 -160 -144
WIRE 144 -144 -48 -144
WIRE 576 -144 144 -144
WIRE 704 -144 624 -144
WIRE 800 -144 768 -144
WIRE 912 -144 800 -144
WIRE 576 -128 576 -144
WIRE 624 -128 624 -144
WIRE 912 -128 912 -144
WIRE -160 -112 -160 -144
WIRE -48 -112 -48 -144
WIRE 800 -112 800 -144
WIRE -160 -16 -160 -32
WIRE 624 -16 624 -48
WIRE 800 -16 800 -48
WIRE 912 -16 912 -48
WIRE 464 0 448 0
WIRE 544 0 528 0
WIRE 144 32 144 -144
WIRE 448 32 448 0
WIRE 496 32 448 32
WIRE 496 48 496 32
WIRE 544 48 544 0
WIRE 576 48 576 -48
WIRE -192 96 -208 96
WIRE -48 96 -48 -32
WIRE -48 96 -112 96
WIRE -16 96 -48 96
WIRE 336 96 304 96
WIRE 368 96 336 96
WIRE 464 96 448 96
WIRE 480 96 464 96
WIRE 576 96 576 48
WIRE 576 96 560 96
WIRE -144 176 -208 176
WIRE -32 176 -64 176
WIRE -16 176 -32 176
WIRE 368 176 304 176
WIRE 480 176 448 176
WIRE 576 176 576 96
WIRE -192 256 -208 256
WIRE -32 256 -48 256
WIRE -16 256 -32 256
WIRE 432 256 304 256
WIRE 528 256 432 256
WIRE -144 336 -208 336
WIRE -64 336 -80 336
WIRE -16 336 -64 336
WIRE 576 336 576 272
WIRE 576 336 304 336
WIRE 576 352 576 336
WIRE 80 416 80 400
WIRE 208 448 208 400
WIRE 576 448 576 432
WIRE 208 480 208 448
WIRE -80 608 -160 608
WIRE 128 608 0 608
WIRE 128 640 128 608
WIRE 160 640 128 640
WIRE 448 672 448 640
WIRE 400 688 336 688
WIRE 160 704 128 704
WIRE -80 720 -160 720
WIRE 128 720 128 704
WIRE 128 720 0 720
WIRE 400 736 368 736
WIRE 160 784 160 768
WIRE 448 784 448 752
SYMBOL ind2 640 -32 R180
WINDOW 0 3 79 Right 2
WINDOW 3 1 44 Right 2
SYMATTR InstName L2
SYMATTR Value 3.8
SYMATTR Type ind
SYMATTR SpiceLine Rpar=5K
SYMBOL schottky 704 -128 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 30BQ060
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 784 -112 R0
SYMATTR InstName C3
SYMATTR Value 100
SYMBOL res -96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL bv 16 720 R90
WINDOW 0 -5 7 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName B2
SYMATTR Value V=V(IN,Rfb)
SYMBOL bv 16 608 R90
WINDOW 0 -5 8 VBottom 2
WINDOW 3 29 57 VTop 2
SYMATTR InstName B1
SYMATTR Value V=absdelay(V(Act,IN),100n)
SYMBOL e 448 656 R0
SYMATTR InstName E2
SYMATTR Value 1
SYMBOL cap -48 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4700p
SYMBOL SpecialFunctions\\sample 240 672 R0
WINDOW 3 -41 -10 Left 2
WINDOW 123 -17 44 Left 2
SYMATTR Value Vhigh=100
SYMATTR Value2 ref=8m
SYMATTR InstName A1
SYMBOL cap 192 544 M180
WINDOW 0 37 40 Left 2
WINDOW 3 27 15 Left 2
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL res -48 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 56.2K
SYMBOL cap -144 320 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1p
SYMBOL res -96 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 15.4K
SYMBOL res 464 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 6.04K
SYMBOL res 560 336 R0
SYMATTR InstName R7
SYMATTR Value 33m
SYMBOL e 576 96 R90
SYMATTR InstName E1
SYMATTR Value 1
SYMBOL PowerProducts\\LT3748 144 208 R0
SYMATTR InstName U1
SYMBOL current 912 -128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName ILOAD
SYMATTR Value PULSE(0 2 10u 500u 500u 1)
SYMBOL res 464 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 243K
SYMBOL nmos 528 176 R0
SYMATTR InstName M1
SYMATTR Value Si4490DY
SYMBOL res -64 -128 R0
SYMATTR InstName R5
SYMATTR Value 412K
SYMBOL fra 464 0 R90
WINDOW 0 -20 -32 VBottom 2
SYMATTR InstName @1
SYMATTR SpiceLine delay=2.5m fstart=200 fend=6.4k oct=2 fcoarse=800 nmax=1 3 1k 3 1.01k 1 pp0=1 pp1=250m f0=400 f1=1.6K tavgmin=1m tsettle=500u
SYMBOL voltage -160 -128 R0
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL ind2 560 -144 R0
WINDOW 0 0 40 Right 2
WINDOW 3 0 72 Right 2
SYMATTR InstName L1
SYMATTR Value 60.8
SYMATTR Type ind
SYMATTR SpiceLine Rpar=5K
FLAG -208 336 0
FLAG -208 256 0
FLAG -208 176 0
FLAG -160 -16 0
FLAG 208 544 0
FLAG 480 176 0
FLAG 800 -16 0
FLAG 624 -16 0
FLAG 912 -16 0
FLAG -160 -144 IN
FLAG 912 -144 OUT
FLAG -208 96 0
FLAG 80 416 0
FLAG 576 448 0
FLAG -64 336 SS
FLAG 576 48 Act
FLAG 464 96 Bct
FLAG 432 256 gate
FLAG 336 96 Rfb
FLAG 448 640 A
FLAG 160 784 0
FLAG -160 608 0
FLAG -160 720 0
FLAG 368 736 0
FLAG 448 784 0
FLAG 544 0 A
FLAG -32 256 VC
FLAG -32 176 TC
FLAG 208 448 INTVCC
FLAG 448 0 B
TEXT 600 -144 Bottom 2 !K1 L1 L2 1.
TEXT 576 568 Left 2 !.fra
TEXT 216 792 Left 2 ;sample & hold
TEXT 576 504 Left 2 !.options trtol=4
TEXT 576 536 Left 2 !.ic V(OUT)=12.2 V(INTVCC)=7