Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\02797441fc65_MOSFET_Switch_alt.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 out 120
R3 N003 N002 100
Q1 N002 N004 0 0 BC547B
R2 N004 control 1k
V1 control 0 PULSE(0 5 0 10n 10n 1.666u 3.333u)
M1 out N003 0 0 BS170
R4 N001 N002 1k
V2 N001 0 12V
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 33u
.meas TRAN TotalLoss INTEGRAL V(out)*Id(M1)
.meas TRAN AvgPower AVG V(out)*Id(M1)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1292 680
WIRE -832 -336 -1088 -336
WIRE -688 -336 -832 -336
WIRE -1088 -288 -1088 -336
WIRE -832 -288 -832 -336
WIRE -832 -192 -832 -208
WIRE -832 -176 -832 -192
WIRE -688 -176 -688 -336
WIRE -1088 -144 -1088 -208
WIRE -1024 -144 -1088 -144
WIRE -1088 -112 -1088 -144
WIRE -1024 -96 -1024 -144
WIRE -992 -96 -1024 -96
WIRE -880 -96 -912 -96
WIRE -1344 -64 -1376 -64
WIRE -1264 -64 -1344 -64
WIRE -1152 -64 -1184 -64
WIRE -1376 -32 -1376 -64
WIRE -1376 96 -1376 48
WIRE -1088 96 -1088 -16
WIRE -1088 96 -1376 96
WIRE -832 96 -832 -80
WIRE -832 96 -1088 96
WIRE -688 96 -688 -96
WIRE -688 96 -832 96
WIRE -832 128 -832 96
SYMBOL nmos -880 -176 R0
SYMATTR InstName M1
SYMATTR Value BS170
SYMBOL voltage -1376 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 3 8 102 Left 2
WINDOW 0 35 44 Left 2
WINDOW 39 -81 178 Left 2
SYMATTR Value PULSE(0 5 0 10n 10n 1.666u 3.333u)
SYMATTR InstName V1
SYMBOL npn -1152 -112 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL voltage -688 -192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 36 82 Left 2
SYMATTR InstName V2
SYMATTR Value 12V
SYMBOL Misc\\EuropeanResistor -1168 -80 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL Misc\\EuropeanResistor -848 -304 R0
SYMATTR InstName R1
SYMATTR Value 120
SYMBOL Misc\\EuropeanResistor -896 -112 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL Misc\\EuropeanResistor -1104 -304 R0
SYMATTR InstName R4
SYMATTR Value 1k
FLAG -832 128 0
FLAG -1344 -64 control
FLAG -832 -192 out
TEXT -1384 120 Left 2 !.tran 33u
TEXT -1384 160 Left 2 !.meas TRAN TotalLoss INTEGRAL V(out)*Id(M1)
TEXT -1384 184 Left 2 !.meas TRAN AvgPower AVG V(out)*Id(M1)
* Z:\home\khalils\Downloads\files\data\raw_asc\229c2607bebd_Draft8.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N002 10k
R2 N002 0 10k
R3 N001 N003 300
R4 N004 0 1k
J1 N003 N002 N004 J113
V1 N001 0 15
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.tran 0 .01 .001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 576 80 336 80
WIRE 816 80 576 80
WIRE 336 192 336 160
WIRE 448 192 336 192
WIRE 576 192 576 160
WIRE 336 224 336 192
WIRE 816 240 816 80
WIRE 448 256 448 192
WIRE 528 256 448 256
WIRE 576 336 576 288
WIRE 336 448 336 304
WIRE 576 448 576 416
WIRE 576 448 336 448
WIRE 816 448 816 320
WIRE 816 448 576 448
FLAG 576 448 0
SYMBOL Res 320 64 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL Res 320 208 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL Res 560 64 R0
SYMATTR InstName R3
SYMATTR Value 300
SYMBOL Res 560 320 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL njf 528 192 R0
SYMATTR InstName J1
SYMATTR Value J113
SYMBOL Voltage 816 224 R0
SYMATTR InstName V1
SYMATTR Value 15
TEXT 232 512 Left 2 !.tran 0 .01 .001
* Z:\home\khalils\Downloads\files\data\raw_asc\2ae7fb2adc04_6013.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain of 10 Single Ended to Differential Converter
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6013.asy)
R3 OUT+ N001 8.06K
R4 N001 0 2K
XU2 IN N001 OUT+ +V -V LT6013 ;pnba IN+)IN-)OUT)VCC)VEE
R1 OUT- N002 10K
V2 -V 0 -15
R2 N002 IN 2K
XU1 0 N002 OUT- +V -V LT6013 ;pnba IN+)IN-)OUT)VCC)VEE
V1 +V 0 15
V3 IN 0 SINE(0 1 1K)
.tran 3m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 192 -160 192 -176
WIRE -32 -144 -256 -144
WIRE 160 -144 -32 -144
WIRE -256 -128 -256 -144
WIRE 304 -128 224 -128
WIRE 352 -128 304 -128
WIRE 160 -112 128 -112
WIRE 192 -80 192 -96
WIRE -256 -32 -256 -48
WIRE 32 16 16 16
WIRE 128 16 128 -112
WIRE 128 16 112 16
WIRE 160 16 128 16
WIRE 304 16 304 -128
WIRE 304 16 240 16
WIRE -32 112 -32 -144
WIRE 32 112 -32 112
WIRE 128 112 112 112
WIRE 160 112 128 112
WIRE 304 112 240 112
WIRE -240 128 -240 112
WIRE -112 128 -112 112
WIRE -240 224 -240 208
WIRE -112 224 -112 208
WIRE 192 224 192 208
WIRE 128 240 128 112
WIRE 160 240 128 240
WIRE 304 256 304 112
WIRE 304 256 224 256
WIRE 352 256 304 256
WIRE 160 272 128 272
WIRE 192 304 192 288
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2K
SYMBOL opamps\\LT6013 192 256 R0
SYMATTR InstName U1
SYMBOL opamps\\LT6013 192 -128 M180
WINDOW 0 25 22 Left 2
WINDOW 3 21 -21 Left 2
SYMATTR InstName U2
SYMBOL voltage -240 112 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -256 -144 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 128 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2K
SYMBOL res 256 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 8.06K
SYMBOL voltage -112 112 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG -112 224 0
FLAG 192 208 +V
FLAG -112 112 +V
FLAG 192 304 -V
FLAG -240 224 0
FLAG -240 112 -V
FLAG -256 -32 0
FLAG 192 -80 +V
FLAG 192 -176 -V
FLAG 16 16 0
FLAG 128 272 0
FLAG 352 -128 OUT+
FLAG 352 256 OUT-
FLAG -256 -144 IN
TEXT 312 336 Left 2 !.tran 3m
TEXT 72 -208 Bottom 2 ;Gain of 10 Single Ended to Differential Converter
* Z:\home\khalils\Downloads\files\data\raw_asc\2afd82ac0b1e_Spice_Model_-_Version_3_-_final.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1014.asy)
C2 N004 N006 100n
V1 N008 0 5
C1 0 N008 100n
R5 N007 N006 1.5k
R3 N003 N009 1.5k
XM2 N001 N005 N007 BUK954R8-60E ;pnba D)G)S
V3 N002 0 4
C3 0 N003 100n
V2 N001 0 1.5
R1 N007 0 0.1 tol=1
XU1 N003 N006 N008 0 N004 LT1013 ;pnba In+)In-)V+)V-)OUT
R4 N004 N005 100
R2 N002 N003 10k
R6 N009 0 1k
.tran 100m
.inc BUK954R8-60E.lib
.lib LT1013.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 936
WIRE 672 -112 208 -112
WIRE -224 128 -288 128
WIRE -80 128 -224 128
WIRE 208 128 208 -112
WIRE 672 144 672 -112
WIRE -80 160 -80 128
WIRE -224 176 -224 128
WIRE -640 192 -672 192
WIRE -528 192 -560 192
WIRE -384 192 -448 192
WIRE -352 192 -352 128
WIRE -352 192 -384 192
WIRE -256 192 -352 192
WIRE -144 208 -192 208
WIRE -48 208 -144 208
WIRE 160 208 32 208
WIRE -256 224 -288 224
WIRE -384 256 -384 192
WIRE -144 256 -144 208
WIRE -288 368 -288 224
WIRE -144 368 -144 320
WIRE -144 368 -288 368
WIRE -64 368 -144 368
WIRE 208 368 208 224
WIRE 208 368 16 368
WIRE -224 416 -224 240
WIRE -176 416 -224 416
WIRE -64 416 -112 416
WIRE -224 432 -224 416
WIRE -224 432 -1056 432
WIRE -64 432 -64 416
WIRE -384 448 -384 336
WIRE -1056 464 -1056 432
WIRE 208 496 208 368
WIRE -1056 672 -1056 544
WIRE -672 672 -672 192
WIRE -384 672 -384 528
WIRE 208 672 208 576
WIRE 672 672 672 224
SYMBOL voltage 672 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 1.5
SYMBOL cap -112 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL cap -288 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 100n
SYMBOL voltage -544 192 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 -4 56 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 4
SYMBOL voltage -1056 448 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -544 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -2 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL cap -160 256 R0
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL res -400 240 R0
SYMATTR InstName R3
SYMATTR Value 1.5k
SYMBOL res -64 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL res -400 432 R0
SYMATTR InstName R6
SYMATTR Value 1k
SYMBOL Opamps\\LT1014 -224 272 M180
SYMATTR InstName U1
SYMBOL nmos 160 128 R0
SYMATTR InstName M2
SYMATTR Value BUK954R8-60E
SYMATTR Prefix X
SYMBOL res 32 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1.5k
SYMBOL res 192 480 R0
SYMATTR InstName R1
SYMATTR Value 0.1
SYMATTR SpiceLine tol=1
FLAG -64 432 0
FLAG -1056 672 0
FLAG -672 672 0
FLAG -80 160 0
FLAG 208 672 0
FLAG 672 672 0
FLAG -384 672 0
TEXT -1232 696 Left 2 !.tran 100m
TEXT -1240 728 Left 2 !.inc BUK954R8-60E.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3485-0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3485-0.asy)
XU1 N001 N002 N001 N005 MP_01 N008 N007 N001 N004 N006 0 LT3485-0 ;pnba Charge)Vbat)Vin)SW))IBGTout)IBGTin)IBGTpwr)_Done)Vmont)GND
L2 0 N003 {10u*10.2*10.2} Rpar=1Meg
V3 N007 0 PWL(30m 0 30.01m 3 30.1m 3 30.11m 0)
D1 N003 OUT D
V2 N002 0 3
K1 L1 L2 1
C1 OUT 0 .1
L1 N002 N005 10 Rpar=2K Rser=.1
V1 N001 0 5
R3 N004 N001 10K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 50m startup
.lib LT3485-0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3528 1804
WIRE 1936 1152 1936 1136
WIRE 1712 1248 1520 1248
WIRE 1824 1248 1712 1248
WIRE 1936 1248 1936 1232
WIRE 2064 1248 1936 1248
WIRE 2224 1248 2112 1248
WIRE 2368 1248 2288 1248
WIRE 2064 1264 2064 1248
WIRE 2112 1264 2112 1248
WIRE 2368 1264 2368 1248
WIRE 1712 1296 1712 1248
WIRE 1824 1296 1824 1248
WIRE 1936 1296 1936 1248
WIRE 1520 1360 1520 1248
WIRE 1568 1360 1520 1360
WIRE 1664 1360 1648 1360
WIRE 2064 1360 2064 1344
WIRE 2064 1360 1984 1360
WIRE 2112 1360 2112 1344
WIRE 2368 1360 2368 1328
WIRE 1520 1440 1520 1360
WIRE 1664 1440 1520 1440
WIRE 2016 1440 1984 1440
WIRE 1520 1456 1520 1440
WIRE 1664 1520 1600 1520
WIRE 2016 1520 1984 1520
WIRE 1520 1552 1520 1536
WIRE 1600 1552 1600 1520
WIRE 1824 1600 1824 1584
WIRE 1600 1664 1600 1632
SYMBOL cap 2352 1264 R0
WINDOW 3 27 55 Left 2
SYMATTR Value .1
SYMATTR InstName C1
SYMBOL ind2 2128 1360 R180
WINDOW 0 -3 72 Right 2
WINDOW 3 0 43 Right 2
SYMATTR InstName L2
SYMATTR Value {10u*10.2*10.2}
SYMATTR SpiceLine Rpar=1Meg
SYMBOL res 1664 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL diode 2224 1264 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL VOLTAGE 1520 1440 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LT3485-0 1824 1440 R0
SYMATTR InstName U1
SYMBOL voltage 1600 1536 R0
WINDOW 3 12 110 Left 2
SYMATTR Value PWL(30m 0 30.01m 3 30.1m 3 30.11m 0)
SYMATTR InstName V3
SYMBOL misc\\battery 1936 1248 M180
WINDOW 0 25 87 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL ind2 2048 1248 R0
WINDOW 0 -6 35 Right 2
WINDOW 3 -4 73 Right 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rpar=2K Rser=.1
FLAG 2368 1360 0
FLAG 1824 1600 0
FLAG 1520 1552 0
FLAG 2112 1360 0
FLAG 1936 1136 0
FLAG 1600 1664 0
FLAG 2368 1248 OUT
TEXT 2048 1560 Left 2 !.tran 50m startup
TEXT 2088 1248 Bottom 2 !K1 L1 L2 1
* Z:\tmp\asc_dec_bjh7r6w2\045526dd0ff4_AD4000_THDS_V00_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V4 N002 0 PULSE(0 {vdd_val} 1u 1n 1n 10n {ts})
V6 REF 0 {vref_val}
V1 N001 0 SINE({voff} {vmag} {fin} 0 0 0)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3184 1508
WIRE 464 -368 352 -368
WIRE 592 -368 464 -368
WIRE 352 -288 352 -368
WIRE 352 -160 352 -208
WIRE -720 32 -960 32
WIRE -960 64 -960 32
WIRE 896 112 720 112
WIRE -960 192 -960 144
WIRE 896 304 896 112
WIRE 896 432 896 384
SYMBOL voltage 896 288 R0
WINDOW 3 58 -156 VRight 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 {vdd_val} 1u 1n 1n 10n {ts})
SYMATTR InstName V4
SYMBOL voltage 352 -304 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V6
SYMATTR Value {vref_val}
SYMBOL voltage -960 48 R0
WINDOW 0 -32 56 VBottom 2
WINDOW 3 -46 -162 VTop 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE({voff} {vmag} {fin} 0 0 0)
FLAG 896 432 0
FLAG 464 -368 REF
FLAG -960 192 0
FLAG 352 -160 0
* Z:\home\khalils\Downloads\files\data\raw_asc\17fd16c3ea7c_BT-CB-OUT-2.asc
* Generated by LTspice 26.0.1 for Windows.
Vcb N002 0 0
Q1 N002 0 N001 0 MMBT3906
Iee N001 0 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Vcb 0.7 -7V Iee list -1mA -3mA -5mA
.meas dc Ic find Ic(Q1) when Vcb=-6V
.lib bt.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 112 32 112
WIRE 368 112 256 112
WIRE 32 144 32 112
WIRE 368 144 368 112
WIRE 32 256 32 224
WIRE 208 256 208 176
WIRE 368 256 368 224
SYMBOL pnp 256 176 M270
WINDOW 0 83 74 VLeft 2
WINDOW 3 69 74 VLeft 2
SYMATTR InstName Q1
SYMATTR Value MMBT3906
SYMBOL current 32 144 R0
WINDOW 0 37 39 Left 2
WINDOW 3 24 0 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Iee
SYMATTR Value 0
SYMBOL voltage 368 128 R0
WINDOW 3 24 32 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 0
SYMATTR InstName Vcb
FLAG 208 256 0
FLAG 32 256 0
FLAG 368 256 0
TEXT 8 304 Left 2 !.dc Vcb 0.7 -7V  Iee list -1mA -3mA -5mA
TEXT 8 328 Left 2 !.meas dc Ic find Ic(Q1) when Vcb=-6V
TEXT 8 352 Left 2 !.lib bt.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX34406T.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX34406T.asy)
Ccdly CDLY 0 10n
Rpu2 VDD SHTDN 10k
VDD VDD 0 5
Rpu1 VDD OC 10k
Iload IN- 0 PWL(0 2 1m 2 +1n 10 8m 10 +1n 2)
VENA ENA 0 PWL(0 5 9m 5 +1n 0 +250u 0 +1n 5)
C1 OUT 0 100p
Vcm IN+ 0 12
XU1 IN+ IN- VDD 0 OUT OC ENA SHTDN CDLY MAX34406T ;pnba IN+)IN-)VDD)GND)OUT)OC)ENA)SHTDN)CDLY
R1 OUT 0 1Meg
Rsense IN+ IN- 5m
.tran 10m
.lib MAX34406T.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 -64 112 -64
WIRE 240 -64 208 -64
WIRE 416 -64 240 -64
WIRE 528 -64 416 -64
WIRE 112 -48 112 -64
WIRE 416 -32 416 -64
WIRE 528 -32 528 -64
WIRE 240 0 240 -64
WIRE 240 32 240 0
WIRE -336 64 -448 64
WIRE 112 64 -336 64
WIRE 144 64 112 64
WIRE -336 80 -336 64
WIRE 368 80 336 80
WIRE 416 80 416 48
WIRE 416 80 368 80
WIRE 384 128 336 128
WIRE 528 128 528 48
WIRE 528 128 384 128
WIRE -336 176 -336 160
WIRE 112 176 -336 176
WIRE 144 176 112 176
WIRE 368 176 336 176
WIRE 528 176 368 176
WIRE 640 176 528 176
WIRE -448 208 -448 64
WIRE -336 208 -336 176
WIRE 528 208 528 176
WIRE 112 224 -48 224
WIRE 144 224 112 224
WIRE 640 224 640 176
WIRE 112 272 64 272
WIRE 144 272 112 272
WIRE 528 304 528 288
WIRE 640 304 640 288
WIRE 240 320 240 304
WIRE -448 352 -448 288
WIRE -336 352 -336 288
WIRE -336 352 -448 352
WIRE 64 352 64 272
WIRE -448 368 -448 352
WIRE -48 368 -48 224
WIRE -48 448 -48 432
WIRE 64 448 64 432
SYMBOL voltage 64 336 R0
SYMATTR InstName VENA
SYMATTR Value PWL(0 5 9m 5 +1n 0 +250u 0 +1n 5)
SYMBOL current -336 208 R0
WINDOW 123 24 106 Left 2
SYMATTR Value2 8m 10 +1n 2)
SYMATTR InstName Iload
SYMATTR Value PWL(0 2 1m 2 +1n 10
SYMBOL voltage -448 192 R0
SYMATTR InstName Vcm
SYMATTR Value 12
SYMBOL res 400 -48 R0
SYMATTR InstName Rpu1
SYMATTR Value 10k
SYMBOL voltage 224 -64 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL res -352 64 R0
SYMATTR InstName Rsense
SYMATTR Value 5m
SYMBOL cap -64 368 R0
SYMATTR InstName Ccdly
SYMATTR Value 10n
SYMBOL res 512 -48 R0
SYMATTR InstName Rpu2
SYMATTR Value 10k
SYMBOL MAX34406T 240 176 R0
WINDOW 0 80 -155 Bottom 2
WINDOW 3 91 133 Top 2
SYMATTR InstName U1
SYMBOL res 512 192 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL cap 624 224 R0
SYMATTR InstName C1
SYMATTR Value 100p
FLAG 240 320 0
FLAG -48 448 0
FLAG 528 304 0
FLAG 640 304 0
FLAG 368 176 OUT
FLAG 384 128 SHTDN
FLAG 368 80 OC
FLAG 112 -48 0
FLAG 240 0 VDD
FLAG -448 368 0
FLAG 112 224 CDLY
FLAG 64 448 0
FLAG 112 64 IN+
FLAG 112 176 IN-
FLAG 112 272 ENA
TEXT -496 472 Left 2 !.tran 10m
* Z:\tmp\asc_dec_bjh7r6w2\069372ce48f3_Aufgabe_2.2_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N001 0 10
R1 N001 N003 10e6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 -32 -80 -32
WIRE 32 48 32 -32
WIRE 304 48 128 48
WIRE -80 96 -80 -32
WIRE 192 112 192 96
WIRE 128 128 128 48
WIRE 160 128 128 128
WIRE 32 160 32 128
WIRE 160 160 32 160
WIRE 32 176 32 160
WIRE 192 208 192 176
WIRE -80 256 -80 176
WIRE 32 256 -80 256
WIRE -80 272 -80 256
WIRE 32 272 32 256
SYMBOL voltage -80 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL res 16 32 R0
SYMATTR InstName R1
SYMATTR Value 10e6
FLAG 192 96 V+
FLAG 192 208 V-
FLAG -80 272 0
* Z:\home\khalils\Downloads\files\data\raw_asc\3e35ffccdae5_transient_analysis.asc
* Generated by LTspice 26.0.1 for Windows.
* V(n001)-V(vout) line\nshows voltage drop on diode\nin positive period the voltage\nis arround 0.6V\nin negative period the diode doesnt\nconduct as the voltage is in reverse\nso the vout in negative period is zero
* view - posible traces -> to see all traces
* time domain transient analysis is where a parameter such as a voltage or current is plotted against time.\nIf you are looking at an output you can see the behavior over a specified length of time.\nFor this example we are going simulate the output of a half-wave rectifier.\nFor this type of analysis we will cover how to add an AC signal source to your schematic and choose a specific diode.
D1 N001 Vout 1N4148
R1 Vout 0 1k
V1 N001 0 SINE(0 5 1k)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1088 680
WIRE -32 32 -160 32
WIRE 208 32 32 32
WIRE 224 32 208 32
WIRE -160 96 -160 32
WIRE 208 96 208 32
WIRE -160 224 -160 176
WIRE 208 224 208 176
WIRE 208 224 -160 224
WIRE -160 272 -160 224
IOPIN 224 32 Out
SYMBOL diode -32 48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage -160 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1k)
SYMBOL res 192 80 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG -160 272 0
FLAG 224 32 Vout
TEXT -48 248 Left 2 !.tran 3m
TEXT -656 -48 Left 2 ;V(n001)-V(vout) line\nshows voltage drop on diode\nin positive period the voltage\nis arround 0.6V\nin negative period the diode doesnt\nconduct as the voltage is in reverse\nso the vout in negative period is zero
TEXT -736 184 Left 2 ;view - posible traces -> to see all traces
TEXT -264 -176 Left 2 ;time domain transient analysis is where a parameter such as a voltage or current is plotted against time.\nIf you are looking at an output you can see the behavior over a specified length of time.\nFor this example we are going simulate the output of a half-wave rectifier.\nFor this type of analysis we will cover how to add an AC signal source to your schematic and choose a specific diode.
* Z:\home\khalils\Downloads\files\data\raw_asc\080359a28366_1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 in 4.2k
R2 N002 N001 6.6k
C1 N002 0 10p
R3 N003 0 38k
R4 out N003 68.4k
C2 out N001 15p
V1 in 0 AC 1 0
XU1 N002 N003 NC_01 NC_02 out level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.ac dec 100 10 500Mega
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp1.asy)
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 48 160 48
WIRE 480 48 368 48
WIRE 48 128 32 128
WIRE 160 128 160 48
WIRE 160 128 128 128
WIRE 192 128 160 128
WIRE 304 128 272 128
WIRE 368 128 304 128
WIRE 480 144 480 48
WIRE 480 144 432 144
WIRE 496 144 480 144
WIRE 304 160 304 128
WIRE 368 160 352 160
WIRE 32 208 32 128
WIRE 352 240 352 160
WIRE 384 240 352 240
WIRE 480 240 480 144
WIRE 480 240 464 240
WIRE 352 272 352 240
FLAG 304 224 0
FLAG 352 352 0
FLAG 32 128 in
FLAG 496 144 out
FLAG 32 288 0
SYMBOL res 144 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 4.2k
SYMBOL res 288 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 6.6k
SYMBOL cap 288 160 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL res 336 256 R0
SYMATTR InstName R3
SYMATTR Value 38k
SYMBOL res 480 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 68.4k
SYMBOL cap 368 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 15p
SYMBOL voltage 32 192 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMBOL OpAmps\\UniversalOpAmp1 400 144 M180
SYMATTR InstName U1
TEXT 56 424 Left 2 !.ac dec 100 10 500Mega
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2903-D1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2903-D1.asy)
R6 N003 V3 23.7K
V3 N003 0 PULSE(0 1.8 0 100n 100n 250m 500m)
XU1 V1 0 V2 V3 V4 _RST LTC2903-D1 ;pnba V1)GND)V2)V3)V4)_RST
R2 V2 0 10K
R5 V2 N002 36.5K
R7 N001 V4 12.4K
R4 V4 0 10K
R1 _RST V1 10K
V2 N002 0 PULSE(0 2.5 0 100n 100n 250m 500m)
R3 V3 0 10K
V4 N001 0 PULSE(0 1.2 0 100n 100n 250m 500m)
V1 V1 0 PULSE(0 3.3 0 100n 100n 250m 500m)
.tran 1
.lib LTC2903-D1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1152 680
WIRE 128 64 48 64
WIRE 304 64 208 64
WIRE -112 176 -560 176
WIRE 48 176 48 64
WIRE 48 176 -112 176
WIRE 80 176 48 176
WIRE 304 176 304 64
WIRE 304 176 272 176
WIRE 352 176 304 176
WIRE -560 192 -560 176
WIRE 80 240 48 240
WIRE 304 240 272 240
WIRE 400 240 304 240
WIRE 512 240 400 240
WIRE 672 240 592 240
WIRE 672 256 672 240
WIRE -560 288 -560 272
WIRE -64 320 -464 320
WIRE 48 320 16 320
WIRE 80 320 48 320
WIRE 304 320 272 320
WIRE 448 320 304 320
WIRE 576 320 528 320
WIRE -464 336 -464 320
WIRE 304 336 304 320
WIRE 400 336 400 240
WIRE 576 336 576 320
WIRE 48 352 48 320
WIRE 672 352 672 336
WIRE -464 432 -464 416
WIRE 304 432 304 416
WIRE 400 432 400 416
WIRE 576 432 576 416
WIRE 48 448 48 432
SYMBOL res 224 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 32 336 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 384 320 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL voltage 672 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 1.2 0 100n 100n 250m 500m)
SYMBOL voltage -560 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 100n 100n 250m 500m)
SYMBOL LTC2903-D1 176 240 R0
SYMATTR InstName U1
SYMBOL res 544 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 23.7K
SYMBOL voltage -464 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 2.5 0 100n 100n 250m 500m)
SYMATTR InstName V2
SYMBOL res 608 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 12.4K
SYMBOL voltage 576 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 1.8 0 100n 100n 250m 500m)
SYMATTR InstName V3
SYMBOL res 288 320 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res 32 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 36.5K
FLAG 48 240 0
FLAG -560 288 0
FLAG -464 432 0
FLAG 48 448 0
FLAG 304 432 0
FLAG 400 432 0
FLAG 576 432 0
FLAG 672 352 0
FLAG -112 176 V1
FLAG 48 320 V2
FLAG 304 320 V3
FLAG 304 240 V4
FLAG 352 176 _RST
TEXT 424 488 Left 2 !.tran 1