Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\53e5fdef2f60_DAC.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac lin 1000 1 10000
V1 N001 0 SINE(0 10 5) AC 10
R3 N002 0 3300
R2 N001 0 3300
C2 N002 N001 0.00047
R1 N003 0 16
R4 0 N002 32
C1 N001 N003 0.000000022
.tran 2
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 964 680
WIRE 416 80 272 80
WIRE 528 80 416 80
WIRE 672 80 592 80
WIRE 832 80 672 80
WIRE 944 80 912 80
WIRE 272 96 272 80
WIRE 272 96 48 96
WIRE 48 128 48 96
WIRE 944 160 944 80
WIRE 272 176 272 160
WIRE 416 176 416 80
WIRE 672 176 672 80
WIRE 48 256 48 208
WIRE 272 256 48 256
WIRE 416 256 272 256
WIRE 672 256 416 256
WIRE 48 352 48 256
SYMBOL res 400 160 R0
SYMATTR InstName R2
SYMATTR Value 3300
SYMBOL res 928 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 32
SYMBOL cap 256 96 R0
SYMATTR InstName C1
SYMATTR Value 0.000000022
SYMBOL res 656 160 R0
SYMATTR InstName R3
SYMATTR Value 3300
SYMBOL voltage 48 112 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 5)
SYMATTR Value2 AC 10
SYMBOL cap 592 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 0.00047
SYMBOL res 256 160 R0
SYMATTR InstName R1
SYMATTR Value 16
FLAG 48 352 0
FLAG 944 160 0
TEXT 8 376 Left 2 !.tran 2
TEXT 112 376 Left 2 ;.ac lin 1000 1 10000
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3008-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3008-1.5.asy)
XU1 IN OUT OUT 0 IN LT3008-1.5 ;pnba IN)OUT)Sense)GND)_SHDN
Rload OUT 0 150
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 1
.tran 1
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 150
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LT3008-1.5 176 96 R0
SYMATTR InstName U1
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 336 248 Left 2 !.tran 1
* Z:\tmp\asc_dec_bjh7r6w2\16e5ad3cfcd9_Sensing_Unit_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R6 N008 0 25k
R1 12V N001 3k
XU2 N007 N002 12V -12V N002 LM741/NS ;pnba In+)In-)V+)V-)OUT
R10 N010 0 560
R11 N007 0 500k
V3 -12V 0 -12V
R5 N008 LM35 1k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4272 2160
WIRE -624 320 -624 256
WIRE -480 320 -480 256
WIRE -336 320 -336 256
WIRE -624 448 -624 400
WIRE -480 448 -480 400
WIRE -336 448 -336 400
WIRE -912 688 -912 640
WIRE -912 768 -1088 768
WIRE -912 832 -912 768
WIRE 880 848 704 848
WIRE -1088 928 -1088 768
WIRE -160 944 -480 944
WIRE -16 944 -16 800
WIRE -16 944 -80 944
WIRE 768 944 768 896
WIRE 64 960 64 912
WIRE 704 960 704 848
WIRE 736 960 704 960
WIRE -16 976 -16 944
WIRE 32 976 -16 976
WIRE 880 976 880 848
WIRE 880 976 800 976
WIRE 1088 976 880 976
WIRE 208 992 96 992
WIRE 480 992 304 992
WIRE 592 992 560 992
WIRE 656 992 592 992
WIRE 736 992 656 992
WIRE 32 1008 -16 1008
WIRE 656 1040 656 992
WIRE -160 1056 -224 1056
WIRE -16 1056 -16 1008
WIRE -16 1056 -80 1056
WIRE 592 1056 592 992
WIRE 64 1072 64 1024
WIRE 768 1088 768 1008
WIRE -16 1120 -16 1056
WIRE 592 1152 592 1120
WIRE 656 1152 656 1120
WIRE -16 1232 -16 1200
WIRE 1088 1760 1088 1712
WIRE 1088 1904 1088 1840
WIRE 1088 1904 640 1904
WIRE 1088 2048 1088 1984
SYMBOL res -32 1104 R0
SYMATTR InstName R6
SYMATTR Value 25k
SYMBOL res -928 672 R0
SYMATTR InstName R1
SYMATTR Value 3k
SYMBOL OpAmps\\opamp2 768 912 R0
SYMATTR InstName U2
SYMATTR Value LM741/NS
SYMBOL res 1072 1888 R0
SYMATTR InstName R10
SYMATTR Value 560
SYMBOL res 640 1024 R0
SYMATTR InstName R11
SYMATTR Value 500k
SYMBOL voltage -480 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -12V
SYMBOL res -64 1040 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1k
FLAG -624 448 0
FLAG -624 256 12V
FLAG -912 640 12V
FLAG -224 1056 LM35
FLAG -480 448 0
FLAG -480 256 -12V
FLAG -336 448 0
FLAG -336 256 5V
FLAG 64 912 12V
FLAG -16 1232 0
FLAG 64 1072 -12V
FLAG 768 896 12V
FLAG 768 1088 -12V
FLAG 592 1152 0
FLAG 1088 2048 0
FLAG 656 1152 0
* Z:\home\khalils\Downloads\files\data\raw_asc\20c8d38109fb_ideal-diode.asc
* Generated by LTspice 26.0.1 for Windows.
* https://wiki.analog.com/university/courses/alm1k/alm-active-rectifiers
* Vgs voltage of M1 is always smaller than V2.\nThat's ok, only very little power is wasted in M1.
* Ideal diode has lots of leakage through Q2, R1 & R2.
* D1, D2, R3, R4 increase output voltage range of ideal diode beyond\nbreakdown of BE-junction of Q1.
;dc v1 0 8
M1 N001 N006 N002 N002 FDC638P
R2 N006 0 68k
D1 N001 N003 BAT54
R1 N005 0 22k
D2 N002 N004 BAT54
V2 N002 0 5 Rser=100
R3 N003 N005 1Meg
Q2 N006 N005 N004 0 BC856B
R4 N004 N005 1Meg
V1 N001 0 SINE(0 6 70)
Q1 N005 N005 N003 0 BC856B
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1724 680
WIRE 48 -80 -144 -80
WIRE 208 -80 48 -80
WIRE 624 -80 304 -80
WIRE 848 -80 624 -80
WIRE 624 -48 624 -80
WIRE 48 -32 48 -80
WIRE 48 48 48 32
WIRE 144 48 48 48
WIRE 624 48 624 16
WIRE 624 48 416 48
WIRE 48 80 48 48
WIRE 624 80 624 48
WIRE -144 112 -144 -80
WIRE 848 112 848 -80
WIRE 144 128 112 128
WIRE 416 128 144 128
WIRE 560 128 416 128
WIRE 48 208 48 176
WIRE 144 208 144 128
WIRE 144 208 48 208
WIRE 288 208 288 -32
WIRE 624 208 624 176
WIRE 624 208 288 208
WIRE 48 240 48 208
WIRE 624 240 624 208
WIRE -144 368 -144 192
WIRE 48 368 48 320
WIRE 624 368 624 320
WIRE 848 368 848 192
SYMBOL pnp 112 176 R180
SYMATTR InstName Q1
SYMATTR Value BC856B
SYMBOL schottky 32 -32 R0
SYMATTR InstName D1
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 400 32 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL voltage 848 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=100
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL pmos 208 -32 R270
SYMATTR InstName M1
SYMATTR Value FDC638P
SYMBOL res 128 32 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL voltage -144 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 6 70)
SYMBOL res 32 224 R0
SYMATTR InstName R1
SYMATTR Value 22k
SYMBOL schottky 608 -48 R0
SYMATTR InstName D2
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL pnp 560 176 M180
SYMATTR InstName Q2
SYMATTR Value BC856B
SYMBOL res 608 224 R0
SYMATTR InstName R2
SYMATTR Value 68k
FLAG -144 368 0
FLAG 48 368 0
FLAG 624 368 0
FLAG 848 368 0
TEXT -176 392 Left 2 !;dc v1 0 8
TEXT -120 456 Left 2 ;https://wiki.analog.com/university/courses/alm1k/alm-active-rectifiers
TEXT -120 496 Left 2 ;Vgs voltage of M1 is always smaller than V2.\nThat's ok, only very little power is wasted in M1.
TEXT -176 424 Left 2 !.tran 100m
TEXT -120 608 Left 2 ;Ideal diode has lots of leakage through Q2, R1 & R2.
TEXT 944 -88 Left 2 ;D1, D2, R3, R4 increase output voltage range of ideal diode beyond\nbreakdown of BE-junction of Q1.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6994-2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 0 121K
R2 N002 N004 1000K
R3 N004 0 392K
R4 OUT 0 100K
V1 N002 0 5
V2 N001 0 PULSE(0 3.3 0.5m 1n 1n 12.5m 25m 3)
XU1 N001 0 N003 N004 N002 OUT LTC6994-2 ;pnba IN)GND)SET)DIV)V+)OUT
.tran 100m startup
* LTC6994-2 10ms Delay Interval Generator\nOutput Transitions to IN Level After Delay From Either IN Edge\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6994-2.asy)
.lib LTC6994-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE -192 96 -208 96
WIRE 96 96 -112 96
WIRE 624 96 320 96
WIRE 624 112 624 96
WIRE 96 176 80 176
WIRE 368 176 320 176
WIRE 512 176 368 176
WIRE 368 192 368 176
WIRE 512 192 512 176
WIRE 624 208 624 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 336 256 320 256
WIRE 336 288 336 256
WIRE 368 288 368 272
WIRE 368 288 336 288
WIRE 512 288 512 272
WIRE 368 304 368 288
WIRE 368 400 368 384
FLAG -208 96 0
FLAG 512 288 0
FLAG 624 96 OUT
FLAG -16 256 0
FLAG 368 400 0
FLAG 624 208 0
FLAG 80 176 0
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 121K
SYMBOL res 352 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL res 352 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
SYMBOL res 608 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL voltage 512 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -96 96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0.5m 1n 1n 12.5m 25m 3)
SYMATTR InstName V2
SYMBOL SpecialFunctions\\LTC6994-2 208 176 R0
SYMATTR InstName U1
TEXT 520 352 Left 2 !.tran 100m startup
TEXT 208 56 Bottom 2 ;LTC6994-2 10ms Delay Interval Generator\nOutput Transitions to IN Level After Delay From Either IN Edge\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\1bfcc0f71c73_voltageDivider.asc
* Generated by LTspice 26.0.1 for Windows.
* Voltage Divider
C1 out 0 10n
R2 out 0 20k
R1 N001 out 10k
V1 N001 0 10
.tran 1 startup
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 32 -32 32
WIRE 96 80 96 32
WIRE -32 128 -32 32
WIRE 96 176 96 160
WIRE 192 176 96 176
WIRE 208 176 192 176
WIRE 96 192 96 176
SYMBOL cap 176 176 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL voltage -32 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 80 176 R0
SYMATTR InstName R2
SYMATTR Value 20k
SYMBOL res 80 64 R0
SYMATTR InstName R1
SYMATTR Value 10k
FLAG 96 272 0
FLAG -32 208 0
FLAG 208 176 out
FLAG 192 240 0
TEXT -48 -48 Left 2 ;Voltage Divider
TEXT -66 296 Left 2 !.tran 1 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1261LCS8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1261LCS8.asy)
XU1 IN N002 N004 0 0 OUT N003 N001 LTC1261LCS8 ;pnba Vcc)C1+)C1-)GND)ADJ)OUT)REG)SHDN
Rload OUT 0 1K
R1 IN N003 3.3K
V1 IN 0 5
C1 N002 N004 .1
C2 OUT 0 3.3
.tran 1m
.lib LTC1261LCS8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2372 2180
WIRE 1680 1056 1536 1056
WIRE 2048 1056 1680 1056
WIRE 1536 1072 1536 1056
WIRE 2048 1088 2048 1056
WIRE 1680 1136 1680 1056
WIRE 1712 1136 1680 1136
WIRE 2016 1136 2000 1136
WIRE 1536 1168 1536 1152
WIRE 1712 1200 1648 1200
WIRE 2048 1200 2048 1168
WIRE 2048 1200 2000 1200
WIRE 1712 1264 1648 1264
WIRE 2096 1264 2000 1264
WIRE 2192 1264 2096 1264
WIRE 2096 1280 2096 1264
WIRE 2192 1280 2192 1264
WIRE 1712 1328 1696 1328
WIRE 2032 1328 2000 1328
WIRE 2096 1376 2096 1344
WIRE 2192 1376 2192 1360
SYMBOL cap 2080 1280 R0
SYMATTR InstName C2
SYMATTR Value 3.3
SYMBOL RES 2176 1264 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL res 2032 1072 R0
SYMATTR InstName R1
SYMATTR Value 3.3K
SYMBOL cap 1632 1200 R0
WINDOW 0 33 18 Left 2
WINDOW 3 30 49 Left 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL PowerProducts\\LTC1261LCS8 1856 1232 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1536 1056 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 1696 1328 0
FLAG 1536 1168 0
FLAG 2096 1376 0
FLAG 2192 1376 0
FLAG 2032 1328 0
FLAG 1536 1056 IN
FLAG 2192 1264 OUT
TEXT 2152 1432 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1790-4.096.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 1
Rload OUT 0 1K
XU1 IN 0 OUT LT1790-4096 ;pnba IN)GND)OUT
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1790-4.096.asy)
.lib LT1790.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 48 -176 48
WIRE 336 48 288 48
WIRE 432 48 336 48
WIRE -176 64 -176 48
WIRE 336 64 336 48
WIRE 432 64 432 48
WIRE -176 160 -176 144
WIRE 336 160 336 128
WIRE 432 160 432 144
WIRE 160 176 160 160
FLAG -176 160 0
FLAG 336 160 0
FLAG 432 160 0
FLAG 160 176 0
FLAG 432 48 OUT
FLAG -176 48 IN
SYMBOL voltage -176 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 320 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 416 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL PowerProducts\\LT1790-4.096 160 48 R0
SYMATTR InstName U1
TEXT 248 224 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\13492e62e963_current_gain.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N004 N001 N002 N005 N003 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 N002 0 15
V2 N005 0 -15
V3 N004 0 10m
R1 0 N001 1k
R2 N001 N003 10k
.tran 100ms
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 0 48 0
WIRE 224 0 64 0
WIRE 224 32 224 0
WIRE 144 144 144 112
WIRE 64 160 64 0
WIRE 112 160 64 160
WIRE 224 176 224 112
WIRE 224 176 176 176
WIRE 288 176 224 176
WIRE 112 192 64 192
WIRE 64 240 64 192
WIRE 64 240 48 240
WIRE 144 240 144 208
FLAG -32 240 0
FLAG 144 320 0
FLAG 144 32 0
FLAG -32 0 0
SYMBOL Opamps\\UniversalOpamp2 144 176 R0
SYMATTR InstName U1
SYMBOL voltage 144 128 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 144 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 64 240 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 10m
SYMBOL res -48 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 208 16 R0
SYMATTR InstName R2
SYMATTR Value 10k
TEXT -52 344 Left 2 !.tran 100ms
* Z:\home\khalils\Downloads\files\data\raw_asc\0bbd10d4eccf_loop_probe.asc
* Generated by LTspice 26.0.1 for Windows.
Iinj 0 probe AC {0.5*lpvar*(lpvar-1)}
Vinj probe in AC {0.5*lpvar*(lpvar+1)}
Vprobe probe out 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -160 144 -80 144
WIRE 0 144 112 144
WIRE 112 224 112 144
WIRE 112 144 160 144
WIRE 112 352 112 304
WIRE 288 144 368 144
WIRE 160 144 208 144
FLAG 112 352 0
FLAG -160 144 in
IOPIN -160 144 In
FLAG 368 144 out
IOPIN 368 144 Out
FLAG 160 144 probe
SYMBOL current 112 304 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
WINDOW 123 23 -4 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Iinj
SYMATTR Value ""
SYMATTR Value2 AC {0.5*lpvar*(lpvar-1)}
SYMBOL voltage 16 144 M270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 VBottom 0
WINDOW 123 -32 56 VBottom 0
WINDOW 39 -32 56 VBottom 0
SYMATTR InstName Vinj
SYMATTR Value ""
SYMATTR Value2 AC {0.5*lpvar*(lpvar+1)}
SYMBOL voltage 192 144 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 VBottom 0
WINDOW 123 -32 56 VBottom 0
WINDOW 39 -32 56 VBottom 0
SYMATTR InstName Vprobe
SYMATTR Value 0
* Z:\home\khalils\Downloads\files\data\raw_asc\53e5fdef2f60_DAC.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac lin 1000 1 10000
V1 N001 0 SINE(0 10 5) AC 10
R1 N003 0 16
R4 0 N002 32
R2 N001 0 3300
C1 N001 N003 0.000000022
R3 N002 0 3300
C2 N002 N001 0.00047
.tran 2
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 964 680
WIRE 416 80 272 80
WIRE 528 80 416 80
WIRE 672 80 592 80
WIRE 832 80 672 80
WIRE 944 80 912 80
WIRE 272 96 272 80
WIRE 272 96 48 96
WIRE 48 128 48 96
WIRE 944 160 944 80
WIRE 272 176 272 160
WIRE 416 176 416 80
WIRE 672 176 672 80
WIRE 48 256 48 208
WIRE 272 256 48 256
WIRE 416 256 272 256
WIRE 672 256 416 256
WIRE 48 352 48 256
SYMBOL voltage 48 112 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 5)
SYMATTR Value2 AC 10
SYMBOL cap 256 96 R0
SYMATTR InstName C1
SYMATTR Value 0.000000022
SYMBOL res 256 160 R0
SYMATTR InstName R1
SYMATTR Value 16
SYMBOL cap 592 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 0.00047
SYMBOL res 928 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 32
SYMBOL res 656 160 R0
SYMATTR InstName R3
SYMATTR Value 3300
SYMBOL res 400 160 R0
SYMATTR InstName R2
SYMATTR Value 3300
FLAG 48 352 0
FLAG 944 160 0
TEXT 8 376 Left 2 !.tran 2
TEXT 112 376 Left 2 ;.ac lin 1000 1 10000
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3014.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 OUT N002 MP_01 0 N001 MP_02 MP_03 N001 LT3014 ;pnba OUT)ADJ))GND)_SHDN)))IN
V1 N001 0 PWL(0 0 1 10)
R1 OUT N002 3.92Meg
R2 N002 0 1.27Meg
Rload OUT 0 250
C1 OUT 0 .47
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3014.asy)
.lib LT3014.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 224 -144 224
WIRE 48 224 32 224
WIRE 384 224 336 224
WIRE 528 224 384 224
WIRE 624 224 528 224
WIRE 624 240 624 224
WIRE -144 256 -144 224
WIRE 528 256 528 224
WIRE 32 320 32 224
WIRE 48 320 32 320
WIRE 384 320 384 304
WIRE 384 320 336 320
WIRE 384 336 384 320
WIRE 528 336 528 320
WIRE 624 336 624 320
WIRE -144 368 -144 336
WIRE 192 400 192 384
WIRE 384 432 384 416
FLAG -144 368 0
FLAG 192 400 0
FLAG 384 432 0
FLAG 624 336 0
FLAG 528 336 0
FLAG 624 224 OUT
SYMBOL PowerProducts\\LT3014 192 256 R0
SYMATTR InstName U1
SYMBOL voltage -144 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 368 208 R0
SYMATTR InstName R1
SYMATTR Value 3.92Meg
SYMBOL res 368 320 R0
SYMATTR InstName R2
SYMATTR Value 1.27Meg
SYMBOL res 608 224 R0
SYMATTR InstName Rload
SYMATTR Value 250
SYMBOL cap 512 256 R0
SYMATTR InstName C1
SYMATTR Value .47
TEXT 560 400 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3808.asc
* Generated by LTspice 26.0.1 for Windows.
MQ1 N005 N008 0 0 FDS6680A
MQ2 N005 N003 IN IN FDC638P
C1 OUT 0 47 Rser=50m
C2 N009 N010 220p
R1 0 N009 15K
V1 IN 0 5
R2 IN N001 100K
L1 N005 OUT 2.2 Rpar=1K
XU1 N004 0 N007 N001 N011 N010 N006 N002 N008 N003 IN IN N005 N005 0 LTC3808 ;pnba PLLLPF)SYNC/Mode)Track/SS)Pgood)Vfb)Ith)Run)Iprg)BG)TG)Sense+)Vin)Sense-)SW)GND
R3 OUT N011 187K
R4 N011 0 59K
Rload OUT 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 2.5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3808.asy)
.lib LTC3808.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 996
WIRE 48 -80 -160 -80
WIRE 176 -80 48 -80
WIRE 400 -80 176 -80
WIRE -160 -64 -160 -80
WIRE 176 -64 176 -80
WIRE -160 32 -160 16
WIRE 48 32 48 -80
WIRE 176 32 176 16
WIRE -64 80 -80 80
WIRE 400 80 400 -80
WIRE 400 80 288 80
WIRE 400 144 400 80
WIRE -64 160 -80 160
WIRE 352 160 288 160
WIRE -64 240 -80 240
WIRE 400 240 288 240
WIRE 400 288 400 240
WIRE 448 288 400 288
WIRE 560 288 528 288
WIRE 656 288 560 288
WIRE 752 288 656 288
WIRE 656 304 656 288
WIRE 752 304 752 288
WIRE -64 320 -80 320
WIRE 400 320 400 288
WIRE 400 320 288 320
WIRE 560 384 560 288
WIRE -64 400 -80 400
WIRE 352 400 288 400
WIRE 656 400 656 368
WIRE 752 400 752 384
WIRE 400 432 400 416
WIRE -240 480 -256 480
WIRE -144 480 -160 480
WIRE -64 480 -80 480
WIRE 560 480 560 464
WIRE 560 480 288 480
WIRE 560 496 560 480
WIRE 112 544 112 528
WIRE 560 592 560 576
FLAG 400 432 0
FLAG 656 400 0
FLAG -256 480 0
FLAG 112 544 0
FLAG -160 32 0
FLAG 752 400 0
FLAG 560 592 0
FLAG -80 160 0
FLAG -160 -80 IN
FLAG 752 288 OUT
SYMBOL nmos 352 320 R0
SYMATTR InstName Q1
SYMATTR Value FDS6680A
SYMBOL pmos 352 240 M180
WINDOW 0 58 64 Left 2
WINDOW 3 53 25 Left 2
SYMATTR InstName Q2
SYMATTR Value FDC638P
SYMBOL cap 640 304 R0
SYMATTR SpiceLine Rser=50m
SYMATTR Value 47
SYMATTR InstName C1
SYMBOL cap -144 464 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 220p
SYMBOL res -256 464 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 15K
SYMBOL voltage -160 -80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 160 -80 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL ind 432 304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rpar=1K
SYMBOL PowerProducts\\LTC3808 112 272 R0
SYMATTR InstName U1
SYMBOL res 544 368 R0
SYMATTR InstName R3
SYMATTR Value 187K
SYMBOL res 544 480 R0
SYMATTR InstName R4
SYMATTR Value 59K
SYMBOL res 736 288 R0
SYMATTR InstName Rload
SYMATTR Value 5
TEXT 648 560 Left 2 !.tran 2.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\28b476733013_Montagem_Id_Vs_.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Id Id Is Is NMOS
V1 Id 0 1.2
VS Is 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc "/Users/sofia/Documents/Uni/EDAn/Labs/modelos/modelo_130n_L120.txt"
.dc VS 0.0 0.9 1e-3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1012 704
WIRE 384 432 384 384
WIRE 384 448 384 432
WIRE 336 528 288 528
WIRE 384 576 384 544
WIRE 384 608 384 576
SYMBOL voltage 112 464 R0
SYMATTR InstName V1
SYMATTR Value 1.2
SYMBOL voltage 384 592 R0
SYMATTR InstName VS
SYMATTR Value 0
SYMBOL nmos 336 448 R0
SYMATTR InstName M1
FLAG 112 560 0
FLAG 112 480 VDD
FLAG 384 384 VDD
FLAG 288 528 VDD
FLAG 384 688 0
FLAG 384 432 Id
FLAG 384 576 Is
TEXT 112 256 Left 2 !.inc "/Users/sofia/Documents/Uni/EDAn/Labs/modelos/modelo_130n_L120.txt"
TEXT 112 304 Left 2 !.dc VS 0.0 0.9 1e-3
* Z:\home\khalils\Downloads\files\data\raw_asc\082d1ee1d306_template1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP727.asy)
XU1 0 N001 VCC VSS N002 OP727 ;pnba In+)In-)V+)V-)OUT
R2 N001 N003 1k
V3 0 VSS 5v
R1 N002 0 10k
R3 N002 N001 10k
V2 VCC 0 5v
V1 N003 0 SINE(0 0.2 10KHz)
.tran 1ms
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 32 -64 32
WIRE 176 32 160 32
WIRE 48 80 48 -16
WIRE -192 96 -304 96
WIRE -64 96 -64 32
WIRE -64 96 -112 96
WIRE 16 96 -64 96
WIRE 176 112 176 32
WIRE 176 112 80 112
WIRE 16 128 -48 128
WIRE 176 144 176 112
WIRE -48 176 -48 128
WIRE -304 256 -304 176
WIRE 48 256 48 144
WIRE 176 288 176 224
SYMBOL Res 176 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL voltage -304 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 44 -3 Left 2
WINDOW 3 -224 121 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 0.2 10KHz)
SYMBOL res 160 128 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL Res -96 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -400 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5v
SYMBOL voltage -304 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5v
SYMBOL OP727 48 48 R0
SYMATTR InstName U1
FLAG 176 288 0
FLAG -304 256 0
FLAG 48 -16 VCC
FLAG -304 -48 VCC
FLAG -304 32 0
FLAG -48 176 0
FLAG 48 256 VSS
FLAG -400 -48 0
FLAG -400 32 VSS
TEXT -336 280 Left 2 !.tran 1ms