* Z:\home\khalils\Downloads\files\data\raw_asc\LT3041.asc
* Generated by LTspice 26.0.1 for Windows.
* C3 reduced for fast\nstartup simulation
* Switcher output (OutSw) programmed to be 1 volt\ngreater than LT3041 output (OutLDO)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3041.asy)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8608.asy)
C3 N004 0 1n
C1 OutSw N006 220p
R2 OutSw N006 140K
V4 vSET 0 PWL(0 0 500u 0 600u 3 700u 3 900u 4 1m 4 1.2m 3) Rser=100
C4 N001 0 1
L1 N003 OutSw 15 Rser=3m
C2 OutLDO 0 10 Rser=5m
XU2 OutSw MP_03 OutSw N008 0 OutSw vSET 0 OutLDO OutLDO N006 LT3041 ;pnba IN))EN/UV)PG)ILIM)PGFB)SET)GND)OUTS)OUT)VIOC
RLOAD OutLDO 0 10
R6 N006 N005 2.21K
R5 N007 0 40.2K
C6 OutSw 0 47 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
R7 N005 0 7.68K
XU1 N002 N003 N001 N007 NC_01 N005 N004 NC_02 IN IN 0 LT8608 ;pnba BST)SW)INTVcc)RT)SYNC)FB)TR/SS)PG)VIN)EN/UV)GND
V2 IN 0 20
R1 OutSw N008 200K
C5 N002 N003 .22
.tran 1.3m startup
.lib LT3041.sub
.lib LT8608.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1976 696
WIRE -816 -544 -912 -544
WIRE -656 -544 -816 -544
WIRE -912 -528 -912 -544
WIRE -656 -528 -656 -544
WIRE -816 -480 -816 -544
WIRE -800 -480 -816 -480
WIRE -496 -480 -512 -480
WIRE -416 -480 -432 -480
WIRE -912 -432 -912 -448
WIRE -480 -384 -512 -384
WIRE -480 -368 -480 -384
WIRE 816 -352 96 -352
WIRE -480 -288 -480 -304
WIRE -480 -288 -512 -288
WIRE -416 -288 -480 -288
WIRE -288 -288 -336 -288
WIRE -208 -288 -288 -288
WIRE -144 -288 -208 -288
WIRE -48 -288 -144 -288
WIRE 48 -288 -48 -288
WIRE 96 -288 96 -352
WIRE 96 -288 48 -288
WIRE 176 -288 96 -288
WIRE -288 -272 -288 -288
WIRE -144 -256 -144 -288
WIRE -48 -256 -48 -288
WIRE 48 -208 48 -288
WIRE 176 -208 48 -208
WIRE -880 -192 -912 -192
WIRE -800 -192 -816 -192
WIRE -432 -192 -512 -192
WIRE -288 -192 -288 -208
WIRE 768 -144 720 -144
WIRE 864 -144 768 -144
WIRE 928 -144 864 -144
WIRE 976 -144 928 -144
WIRE -432 -128 -432 -192
WIRE -384 -128 -432 -128
WIRE -144 -128 -144 -192
WIRE -144 -128 -304 -128
WIRE -48 -128 -48 -176
WIRE -48 -128 -144 -128
WIRE 176 -128 -48 -128
WIRE 864 -112 864 -144
WIRE 976 -112 976 -144
WIRE -896 -96 -912 -96
WIRE -800 -96 -816 -96
WIRE -496 -96 -512 -96
WIRE -432 -80 -432 -128
WIRE 768 -64 768 -144
WIRE 768 -64 720 -64
WIRE 48 -48 48 -208
WIRE 80 -48 48 -48
WIRE 176 -48 160 -48
WIRE 864 -16 864 -48
WIRE 976 -16 976 -32
WIRE -432 16 -432 0
WIRE 416 32 416 16
WIRE 512 32 512 16
WIRE 640 32 640 16
WIRE 816 32 816 -352
WIRE 816 32 640 32
WIRE 288 64 288 16
WIRE 288 64 272 64
WIRE 288 80 288 64
WIRE 288 176 288 160
SYMBOL cap 848 -112 R0
WINDOW 40 24 36 Left 2
SYMATTR InstName C2
SYMATTR Value 10
SYMATTR SpiceLine Rser=5m
SYMBOL cap -304 -272 R0
SYMATTR InstName C6
SYMATTR Value 47
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL LT8608 -656 -288 R0
SYMATTR InstName U1
SYMBOL cap -496 -464 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL LT3041 416 -144 R0
SYMATTR InstName U2
SYMBOL res 960 -128 R0
SYMATTR InstName RLOAD
SYMATTR Value 10
SYMBOL res -448 -96 R0
SYMATTR InstName R7
SYMATTR Value 7.68K
SYMBOL res -800 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 40.2K
SYMBOL ind -432 -272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 15
SYMATTR SpiceLine Rser=3m
SYMBOL res -64 -272 R0
SYMATTR InstName R2
SYMATTR Value 140K
SYMBOL res -288 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 2.21K
SYMBOL cap -160 -256 R0
SYMATTR InstName C1
SYMATTR Value 220p
SYMBOL res 64 -64 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200K
SYMBOL cap -816 -208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1n
SYMBOL voltage 288 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 45 101 Left 2
WINDOW 3 42 76 Left 2
SYMATTR SpiceLine Rser=100
SYMATTR Value PWL(0 0 500u 0 600u 3 700u 3 900u 4 1m 4 1.2m 3)
SYMATTR InstName V4
SYMBOL voltage -912 -544 R0
SYMATTR InstName V2
SYMATTR Value 20
SYMBOL cap -496 -368 R0
SYMATTR InstName C5
SYMATTR Value .22
FLAG 416 32 0
FLAG 512 32 0
FLAG 864 -16 0
FLAG 928 -144 OutLDO
FLAG -912 -96 0
FLAG -912 -192 0
FLAG -912 -432 0
FLAG -416 -480 0
FLAG -288 -192 0
FLAG -432 16 0
FLAG -912 -544 IN
FLAG -496 -96 0
FLAG 976 -16 0
FLAG 288 176 0
FLAG -208 -288 OutSw
FLAG 272 64 vSET
TEXT 896 88 Left 2 !.tran 1.3m startup
TEXT -1056 -280 Left 2 ;C3 reduced for fast\nstartup simulation
TEXT -320 -424 Left 2 ;Switcher output (OutSw) programmed to be 1 volt\ngreater than LT3041 output (OutLDO)