Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\0a3663f07f41_layout_HF_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N003 0 C
L1 N002 N001 L
L2 N003 supply L
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 980 772
WIRE 64 128 16 128
WIRE 192 128 144 128
WIRE 720 144 720 112
WIRE 800 144 720 144
WIRE 720 192 720 144
WIRE 800 192 800 144
WIRE 16 208 16 128
WIRE 16 208 -96 208
WIRE 64 208 16 208
WIRE 192 208 192 128
WIRE 192 208 144 208
WIRE 240 208 192 208
WIRE 400 208 240 208
WIRE 240 272 240 208
WIRE 720 320 720 272
WIRE 800 320 800 272
WIRE 800 320 720 320
WIRE 848 320 800 320
WIRE 960 320 912 320
WIRE 720 368 720 320
WIRE 240 384 240 336
WIRE 720 480 720 432
SYMBOL cap 848 336 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMBOL ind 160 192 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMBOL ind 736 288 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L2
FLAG 240 384 0
FLAG 720 480 0
FLAG 960 320 0
FLAG 720 112 supply
* Z:\home\khalils\Downloads\files\data\raw_asc\30b123d69962_questo2v2.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 N001 3300
v2 N002 0 30
R1 N001 0 5600
R3 N001 0 2200
.tran 0 10 0 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE 368 64 48 64
WIRE 640 64 368 64
WIRE 944 64 720 64
WIRE 48 128 48 64
WIRE 368 128 368 64
WIRE 944 256 944 64
WIRE 48 448 48 208
WIRE 368 448 368 208
WIRE 368 448 48 448
WIRE 944 448 944 336
WIRE 944 448 368 448
WIRE 944 480 944 448
SYMBOL res 32 112 R0
SYMATTR InstName R1
SYMATTR Value 5600
SYMBOL res 736 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 3300
SYMBOL bv 944 240 R0
SYMATTR InstName v2
SYMATTR Value 30
SYMATTR Prefix v
SYMBOL res 352 112 R0
SYMATTR InstName R3
SYMATTR Value 2200
FLAG 944 480 0
TEXT 24 504 Left 2 !.tran 0 10 0 10
* Z:\home\khalils\Downloads\files\data\raw_asc\25c9f20fbb9c_HighPass.asc
* Generated by LTspice 26.0.1 for Windows.
C1 Vout N001 100n
R1 Vout 0 10000
V1 N001 0 AC 1
* Vout(s)/Vin(s) = s/(s+(1/CR))\nfc = 1/(2*pi*RC) = 159 Hz\nR = 10k\nC = 100 nf
.ac dec 20 1 10000
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 240 -16 128 -16
WIRE 384 -16 304 -16
WIRE 448 -16 384 -16
WIRE 128 48 128 -16
WIRE 384 64 384 -16
WIRE 128 192 128 128
WIRE 384 192 384 144
FLAG 128 192 0
FLAG 384 192 0
FLAG 448 -16 Vout
SYMBOL cap 304 -32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL res 368 48 R0
SYMATTR InstName R1
SYMATTR Value 10000
SYMBOL voltage 128 32 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
TEXT -280 -96 Left 2 ;Vout(s)/Vin(s) = s/(s+(1/CR))\nfc = 1/(2*pi*RC) = 159 Hz\nR = 10k\nC = 100 nf
TEXT -240 184 Left 2 !.ac dec 20 1 10000
* Z:\tmp\asc_dec_bjh7r6w2\04ef7db4b713_lm741_noninverting_amplifier_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 12V 0 12V
I1 0 N003 PWL(0 0 30m 15)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 988 680
WIRE -464 80 -464 64
WIRE 0 128 -32 128
WIRE 112 128 112 0
WIRE 112 128 80 128
WIRE 128 128 112 128
WIRE 272 144 192 144
WIRE 128 160 96 160
WIRE -464 224 -464 160
WIRE 0 288 -32 288
WIRE 96 288 96 160
WIRE 96 288 80 288
WIRE 112 288 96 288
WIRE 224 288 192 288
SYMBOL voltage -464 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12V
SYMBOL current 0 288 R270
WINDOW 0 32 40 VTop 2
WINDOW 3 -32 40 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value PWL(0 0 30m 15)
FLAG -464 224 0
FLAG -464 64 12V
FLAG 160 112 12V
FLAG 160 176 0
FLAG -32 128 0
FLAG -32 288 0
* Z:\tmp\asc_dec_bjh7r6w2\178a91731078_PixiePico_LTSpice_AFFilter_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R6 Vout 0 100K
V2 N001 0 3.3 AC 3.3
C4 Vout 0 10nF
C2 Vaf Vsig 100nF
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2644 1892
WIRE 112 -64 -96 -64
WIRE -96 -16 -96 -64
WIRE 112 80 112 -64
WIRE -96 128 -96 64
WIRE -64 192 -96 192
WIRE -32 192 -64 192
WIRE 112 192 112 160
WIRE 112 192 32 192
WIRE 208 192 112 192
WIRE 352 192 288 192
WIRE 416 192 352 192
WIRE 560 192 496 192
WIRE 720 192 560 192
WIRE 800 192 720 192
WIRE 944 192 800 192
WIRE -96 240 -96 192
WIRE 112 240 112 192
WIRE 560 240 560 192
WIRE 352 256 352 192
WIRE 800 256 800 192
WIRE -96 400 -96 320
WIRE 112 400 112 320
WIRE 352 400 352 320
WIRE 560 400 560 304
WIRE 800 400 800 336
SYMBOL res 784 240 R0
SYMATTR InstName R6
SYMATTR Value 100K
SYMBOL Misc/signal -96 -32 R0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMATTR Value2 AC 3.3
SYMBOL cap 544 240 R0
SYMATTR InstName C4
SYMATTR Value 10nF
SYMBOL cap 32 176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 100nF
FLAG 352 400 0
FLAG 560 400 0
FLAG 800 400 0
FLAG -64 192 Vsig
FLAG 112 192 Vaf
FLAG 720 192 Vout
FLAG -96 128 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1614-650.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N006 N007 2k
C1 N007 0 22n
R3 N004 0 10k
R4 OUT N004 30.9k
V1 IN 0 3.3
L1 IN N001 4.7
C2 OUT 0 22
C3 N006 0 33p
Rload OUT 0 3.01
D1 N001 OUT MBRS340
R2 N003 0 66.5k
C4 IN 0 10
V2 N002 0 PWL(0 0 0.5m 0 0.51m 3.3)
C5 N005 0 47n
XU2 N006 N004 N002 0 MP_01 N001 MP_02 IN N003 N005 ADP1614-650 ;pnba Comp)FB)EN)Gnd))SW))Vin)Clres)SS
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 12m
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1614-650.asy)
.lib ADP1614-650.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1256 680
WIRE -32 -16 -128 -16
WIRE 240 -16 -32 -16
WIRE 304 -16 240 -16
WIRE 416 -16 384 -16
WIRE 464 -16 416 -16
WIRE 640 -16 528 -16
WIRE 752 -16 640 -16
WIRE 848 -16 752 -16
WIRE -128 0 -128 -16
WIRE 848 0 848 -16
WIRE -32 16 -32 -16
WIRE 752 16 752 -16
WIRE 240 32 240 -16
WIRE -128 96 -128 80
WIRE -32 96 -32 80
WIRE 96 96 48 96
WIRE 416 96 416 -16
WIRE 416 96 384 96
WIRE 640 96 640 -16
WIRE 752 112 752 80
WIRE 848 112 848 80
WIRE 48 144 48 96
WIRE 48 144 -192 144
WIRE -192 176 -192 144
WIRE 0 208 -16 208
WIRE 96 208 80 208
WIRE 640 208 640 176
WIRE 640 208 384 208
WIRE 640 256 640 208
WIRE -192 288 -192 256
WIRE 96 320 16 320
WIRE 416 320 384 320
WIRE 16 352 16 320
WIRE 640 368 640 336
WIRE 240 416 240 384
WIRE 416 432 416 320
WIRE 464 432 416 432
WIRE 608 432 544 432
WIRE 16 448 16 416
WIRE 416 448 416 432
WIRE 608 448 608 432
WIRE 416 528 416 512
WIRE 608 528 608 512
FLAG -128 96 0
FLAG -128 -16 IN
FLAG 848 -16 OUT
FLAG 608 528 0
FLAG 640 368 0
FLAG 752 112 0
FLAG 416 528 0
FLAG -16 208 0
FLAG 848 112 0
FLAG 240 416 0
FLAG -32 96 0
FLAG -192 288 0
FLAG 16 448 0
SYMBOL res 448 416 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2k
SYMBOL cap 592 448 R0
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL res 624 240 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 624 80 R0
SYMATTR InstName R4
SYMATTR Value 30.9k
SYMBOL VOLTAGE -128 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL ind 288 0 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL cap 736 16 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL cap 400 448 R0
SYMATTR InstName C3
SYMATTR Value 33p
SYMBOL res 832 -16 R0
SYMATTR InstName Rload
SYMATTR Value 3.01
SYMBOL schottky 464 -32 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 96 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 66.5k
SYMBOL cap -48 16 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL VOLTAGE -192 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 -139 174 Left 2
SYMATTR Value PWL(0 0 0.5m 0 0.51m 3.3)
SYMATTR InstName V2
SYMBOL cap 0 352 R0
SYMATTR InstName C5
SYMATTR Value 47n
SYMBOL ADP1614-650 240 208 R0
SYMATTR InstName U2
TEXT 680 416 Left 2 !.tran 12m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7112-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N001 0 4.7n
V1 IN 0 2.7
Rload OUT 0 10
C1 OUT 0 2.2 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=1.8 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 6m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7112-1.8.asy)
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.7
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADP7112-1.8 224 128 R0
SYMATTR InstName U1
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2e982158bcab_inverting__ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
V2 VCC 0 15V
V3 0 VEE 15V
R1 N001 VIN 1k
V1 VIN 0 SINE(0 2 1k)
XU1 0 N001 VCC VEE Vout LT1001 ;pnba In+)In-)V+)V-)OUT
R2 Vout N001 2k
.tran 3ms
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 0 144 0
WIRE 352 0 272 0
WIRE 496 16 496 -16
WIRE 496 64 496 16
WIRE 224 112 224 96
WIRE 224 128 224 112
WIRE 144 144 144 0
WIRE 144 144 96 144
WIRE 192 144 144 144
WIRE 352 160 352 0
WIRE 352 160 256 160
WIRE 400 160 352 160
WIRE 416 160 400 160
WIRE 192 176 160 176
WIRE 496 176 496 144
WIRE 672 176 496 176
WIRE 16 192 16 144
WIRE 672 192 672 176
WIRE 16 208 16 192
WIRE 224 208 224 192
WIRE 496 208 496 176
WIRE 224 224 224 208
WIRE 160 240 160 176
WIRE 16 304 16 288
WIRE 496 304 496 288
WIRE 496 320 496 304
SYMBOL res 288 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2k
SYMBOL OpAmps\\OP07 224 96 R0
SYMATTR InstName U1
SYMBOL voltage 16 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 2 1k)
SYMBOL voltage 496 192 R0
SYMATTR InstName V3
SYMATTR Value 15V
SYMBOL voltage 496 48 R0
SYMATTR InstName V2
SYMATTR Value 15V
SYMBOL res 112 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 16 304 0
FLAG 160 240 0
FLAG 16 192 VIN
FLAG 400 160 Vout
FLAG 224 208 VEE
FLAG 496 304 VEE
FLAG 672 192 0
FLAG 224 112 VCC
FLAG 496 16 VCC
TEXT -24 376 Left 2 !.tran 3ms
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1442.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1442.asy)
XU1 N001 0 N004 N005 N005 N005 N003 N002 LTC1442 ;pnba OUT A)V-)InA+)InB-)HYST)Ref)V+)OUT B
V1 N003 0 3.3
V2 N004 0 pulse(0 3.3 0 .5m .5m 0 1m)
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1108 800
WIRE 480 128 432 128
WIRE 784 128 736 128
WIRE 480 192 464 192
WIRE 832 192 736 192
WIRE 832 208 832 192
WIRE 224 256 192 256
WIRE 480 256 304 256
WIRE 768 256 736 256
WIRE 832 304 832 288
WIRE 480 320 448 320
WIRE 768 320 768 256
WIRE 768 320 736 320
WIRE 448 384 448 320
WIRE 768 384 768 320
WIRE 768 384 448 384
SYMBOL Comparators\\LTC1442 608 224 R0
SYMATTR InstName U1
SYMBOL voltage 832 192 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage 320 256 R90
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value pulse(0 3.3 0 .5m .5m 0 1m)
SYMATTR InstName V2
FLAG 832 304 0
FLAG 192 256 0
FLAG 464 192 0
TEXT 776 440 Left 2 !.tran 3m
* Z:\tmp\asc_dec_bjh7r6w2\1817e0a578f7_example_nand_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N003 100k
V1 N001 0 PULSE(0 1 0 10p 10p 20n 40n)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 680
WIRE 432 16 -128 16
WIRE 880 80 768 80
WIRE 1120 80 880 80
WIRE -128 160 -128 16
WIRE -128 288 -128 240
WIRE 880 288 880 160
SYMBOL res 864 64 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage -128 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 10p 10p 20n 40n)
FLAG -128 288 0
* Z:\home\khalils\Downloads\files\data\raw_asc\0919bb51b19b_beta_measuring2.asc
* Generated by LTspice 26.0.1 for Windows.
* .op
R3 N002 0 100
V1 N001 0 5
R2 N001 N002 100
R1 N001 P002 100
Q1 P001 N002 P002 0 BD136
R4 P001 0 100
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.lib BD136.sub
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 112 288 112
WIRE 320 112 304 112
WIRE 160 224 160 176
WIRE 160 224 96 224
WIRE 208 224 160 224
WIRE 304 224 304 112
WIRE 304 224 288 224
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL pnp 112 176 R270
SYMATTR InstName Q1
SYMATTR Value BD136
SYMBOL res 112 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL res 304 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL res 304 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage 304 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 32 112 0
FLAG 16 224 0
FLAG 400 112 0
TEXT 48 40 Left 2 ;.op
TEXT 368 256 Left 2 !.lib BD136.sub
TEXT 48 72 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\6b7a82361c3a__2.asc
* Generated by LTspice 26.0.1 for Windows.
R5 N003 0 50
V1 N001 0 5
V2 N004 0 SINE() AC 5 0
Q1 N002 N005 N006 0 2N3904
C1 N005 N004 21n
R2 N005 0 1k
R4 N006 0 755
R1 N001 N005 3.9k
C2 N003 N002 19.29n
R3 N001 N002 500
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.ac dec 10 10 100k V2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 448 80 240 80
WIRE 816 80 448 80
WIRE 240 128 240 80
WIRE 448 128 448 80
WIRE 448 256 448 208
WIRE 592 256 448 256
WIRE 704 256 656 256
WIRE 448 272 448 256
WIRE 816 288 816 80
WIRE 112 320 0 320
WIRE 240 320 240 208
WIRE 240 320 176 320
WIRE 384 320 240 320
WIRE 704 336 704 256
WIRE 0 400 0 320
WIRE 240 432 240 320
WIRE 448 432 448 368
WIRE 0 560 0 480
WIRE 240 560 240 512
WIRE 240 560 0 560
WIRE 448 560 448 512
WIRE 448 560 240 560
WIRE 704 560 704 416
WIRE 704 560 448 560
WIRE 816 560 816 368
WIRE 816 560 704 560
WIRE 448 592 448 560
SYMBOL Voltage 0 384 R0
WINDOW 3 24 96 Invisible 2
WINDOW 123 24 118 Left 2
SYMATTR InstName V2
SYMATTR Value SINE()
SYMATTR Value2 AC 5 0
SYMBOL Res 432 416 R0
SYMATTR InstName R4
SYMATTR Value 755
SYMBOL Voltage 816 272 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL Res 432 112 R0
SYMATTR InstName R3
SYMATTR Value 500
SYMBOL npn 384 272 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL Cap 656 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 19.29n
SYMBOL Res 224 112 R0
SYMATTR InstName R1
SYMATTR Value 3.9k
SYMBOL Res 688 320 R0
SYMATTR InstName R5
SYMATTR Value 50
SYMBOL Res 224 416 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL Cap 176 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 21n
FLAG 448 592 0
TEXT -232 656 Left 2 !.ac dec 10 10 100k V2
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1993-10.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1993-10.asy)
R5 N003 N008 100
V3 N002 0 SINE(0 1m 1Meg)
C2 N008 0 .1
XU1 N001 N006 N001 0 N004 N005 N007 N009 0 N001 0 0 N003 N003 N008 N008 LT1993-10 ;pnba VccC)VOCM)VccA)VeeA)+OUT)+OUTFILT)-OUTFILT)-OUT)VeeB)VccB)_EN)VeeC)-INB)-INA)+INB)+INA
C1 N003 N002 .1
V2 N006 0 2.5
V1 N001 0 5
.tran 10u
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 912 680
WIRE 384 -64 -112 -64
WIRE 464 -64 384 -64
WIRE 544 -64 464 -64
WIRE -112 -48 -112 -64
WIRE 384 -48 384 -64
WIRE 464 -48 464 -64
WIRE 544 -48 544 -64
WIRE 624 -48 624 -64
WIRE 144 32 -16 32
WIRE 240 32 208 32
WIRE 320 32 240 32
WIRE -112 48 -112 32
WIRE -16 48 -16 32
WIRE 704 48 672 48
WIRE 240 64 240 32
WIRE 320 64 240 64
WIRE 240 80 240 64
WIRE 704 80 672 80
WIRE 784 128 672 128
WIRE -16 144 -16 128
WIRE 784 144 784 128
WIRE 704 176 672 176
WIRE 240 192 240 160
WIRE 320 192 240 192
WIRE 704 208 672 208
WIRE 144 224 96 224
WIRE 240 224 240 192
WIRE 240 224 208 224
WIRE 320 224 240 224
WIRE 784 240 784 224
WIRE 416 320 416 304
WIRE 496 320 496 304
WIRE 576 320 576 304
SYMBOL res 224 64 R0
SYMATTR InstName R5
SYMATTR Value 100
SYMBOL voltage -112 -64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 208 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage -16 32 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1m 1Meg)
SYMBOL cap 208 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL LT1993-10 496 128 R0
SYMATTR InstName U1
SYMBOL voltage 784 128 R0
SYMATTR InstName V2
SYMATTR Value 2.5
FLAG -16 144 0
FLAG -112 48 0
FLAG 96 224 0
FLAG 416 320 0
FLAG 496 320 0
FLAG 576 320 0
FLAG 624 -64 0
FLAG 784 240 0
TEXT 584 384 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1261CS8.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N001 N003 0.1
V1 IN 0 5
C3 OUT 0 3.3
Rload OUT 0 800
R1 IN N002 10k
XU1 IN N001 N003 0 N004 OUT N002 NC_01 LTC1261CS8 ;pnba Vcc)C1+)C1-)GND)ADJ)OUT)REG)SHDN
R2 OUT N004 10k
R3 N004 0 22.3k
C1 N004 0 100p
.tran 2m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1261CS8.asy)
.lib LTC1261CS8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2424 2180
WIRE 1680 1056 1536 1056
WIRE 2064 1056 1680 1056
WIRE 1536 1072 1536 1056
WIRE 2064 1088 2064 1056
WIRE 1680 1136 1680 1056
WIRE 1712 1136 1680 1136
WIRE 1536 1168 1536 1152
WIRE 1712 1200 1632 1200
WIRE 2064 1200 2064 1168
WIRE 2064 1200 2000 1200
WIRE 1712 1264 1632 1264
WIRE 2128 1264 2000 1264
WIRE 2240 1264 2128 1264
WIRE 2336 1264 2240 1264
WIRE 2128 1280 2128 1264
WIRE 2240 1280 2240 1264
WIRE 2336 1280 2336 1264
WIRE 1712 1328 1696 1328
WIRE 2032 1328 2000 1328
WIRE 2032 1376 2032 1328
WIRE 2128 1376 2128 1360
WIRE 2128 1376 2032 1376
WIRE 2240 1376 2240 1344
WIRE 2336 1376 2336 1360
WIRE 2128 1392 2128 1376
WIRE 2032 1408 2032 1376
WIRE 2032 1504 2032 1472
WIRE 2128 1504 2128 1472
FLAG 1696 1328 0
FLAG 1536 1168 0
FLAG 2240 1376 0
FLAG 2336 1376 0
FLAG 2336 1264 OUT
FLAG 1536 1056 IN
FLAG 2128 1504 0
FLAG 2032 1504 0
SYMBOL cap 1616 1200 R0
WINDOW 0 33 18 Left 2
WINDOW 3 30 49 Left 2
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL VOLTAGE 1536 1056 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2224 1280 R0
SYMATTR InstName C3
SYMATTR Value 3.3
SYMBOL RES 2320 1264 R0
SYMATTR InstName Rload
SYMATTR Value 800
SYMBOL res 2048 1072 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL PowerProducts\\LTC1261CS8 1856 1232 R0
SYMATTR InstName U1
SYMBOL res 2112 1264 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 2112 1376 R0
SYMATTR InstName R3
SYMATTR Value 22.3k
SYMBOL cap 2016 1408 R0
SYMATTR InstName C1
SYMATTR Value 100p
TEXT 1816 1408 Left 2 !.tran 2m
* Z:\home\khalils\Downloads\files\data\raw_asc\a418f9978849_Assignment_3a__iii_.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Half Wave Rectifier Circuit (with 1microF Capacitor) (Ideal)
V1 N001 0 SINE(0 311 50) Rser=0.001
D1 N001 N002 1N4148
C1 N002 0 0.000001
R1 N002 0 1000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 64 80 64
WIRE 352 64 256 64
WIRE 464 64 352 64
WIRE 80 112 80 64
WIRE 352 112 352 64
WIRE 464 128 464 64
WIRE 80 240 80 192
WIRE 176 240 80 240
WIRE 352 240 352 192
WIRE 352 240 176 240
WIRE 464 240 464 192
WIRE 464 240 352 240
WIRE 176 272 176 240
SYMBOL voltage 80 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.001
SYMATTR InstName V1
SYMATTR Value SINE(0 311 50)
SYMBOL cap 448 128 R0
SYMATTR InstName C1
SYMATTR Value 0.000001
SYMBOL diode 192 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 336 96 R0
SYMATTR InstName R1
SYMATTR Value 1000
FLAG 176 272 0
TEXT 16 272 Left 2 !.tran 0.05
TEXT 264 8 Center 2 ;Positive Half Wave Rectifier Circuit (with 1microF Capacitor) (Ideal)
* Z:\home\khalils\Downloads\files\data\raw_asc\1256a803f2da__Lowpass_Inverting_TL2272.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N001 N003 0 N002 TLC2272 ;pnba In+)In-)V+)V-)OUT
R1 N001 N004 10k
R2 N002 N001 10k
C1 N002 N001 318.31n
R3 N002 0 100k
V1 N004 0 SINE(1.77 0.035 50)
V2 N003 0 5
.incl TLC2272.lib
.tran 500ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1504 680
WIRE 224 -80 224 -112
WIRE 288 32 128 32
WIRE 432 32 352 32
WIRE 128 128 128 32
WIRE 272 128 128 128
WIRE 432 128 432 32
WIRE 432 128 352 128
WIRE 224 176 224 0
WIRE -16 192 -96 192
WIRE 128 192 128 128
WIRE 128 192 64 192
WIRE 192 192 128 192
WIRE -96 208 -96 192
WIRE 432 208 432 128
WIRE 432 208 256 208
WIRE 192 224 144 224
WIRE 144 304 144 224
WIRE 224 304 224 240
WIRE 432 304 432 288
WIRE -96 336 -96 288
FLAG 224 304 0
FLAG 432 304 0
FLAG 144 304 0
FLAG -96 336 0
FLAG 224 -112 0
SYMBOL Opamps\\opamp2 224 144 R0
SYMATTR InstName U1
SYMATTR Value TLC2272
SYMBOL res 80 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 368 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL cap 352 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 318.31n
SYMBOL res 416 192 R0
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL voltage -96 192 R0
WINDOW 3 24 44 Left 2
WINDOW 123 24 72 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(1.77 0.035 50)
SYMATTR InstName V1
SYMBOL voltage 224 16 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
TEXT -192 -24 Left 2 !.incl TLC2272.lib
TEXT -192 360 Left 2 !.tran 500ms