Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2118-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2118-2.5.asy)
L1 N002 OUT 1
R1 OUT N001 100K
C1 OUT 0 100
V1 IN 0 5
XU1 IN IN IN OUT 0 0 N002 IN IN IN N001 ADP2118-x.x Rtop=760k Rbot=240k Ctop=4p ;pnba Sync/Mode)FREQ)TRK)FB)GND)PGND)SW)Pvin)Vin)EN)Pgood
Rload1 OUT 0 .833
.tran 2m startup
.lib ADP2118-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1104 680
WIRE 128 0 48 0
WIRE 288 0 128 0
WIRE 48 16 48 0
WIRE 288 32 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 640 64 576 64
WIRE 48 112 48 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 640 144 640 64
WIRE 640 144 560 144
WIRE 704 144 640 144
WIRE 560 160 560 144
WIRE 704 160 704 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 560 256 560 224
WIRE 704 256 704 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 640 304 640 144
WIRE 640 304 416 304
WIRE 128 384 128 304
WIRE 160 384 128 384
WIRE 288 432 288 416
SYMBOL res 688 144 R0
SYMATTR InstName Rload1
SYMATTR Value .833
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL ADP2118-2.5 288 272 R0
SYMATTR InstName U1
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL voltage 48 0 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 100
FLAG 560 256 0
FLAG 288 432 0
FLAG 48 112 0
FLAG 704 144 OUT
FLAG 704 256 0
FLAG 48 0 IN
TEXT 504 384 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\639765344959_lpf_1st_ord_1khz_cutoff.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 0 100n
R1 N002 N001 1591.549431
V1 N001 0 AC 1
D1 0 N002 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.ac oct 1000 1 2meg
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 144 96 64 96
WIRE 304 96 224 96
WIRE 432 96 304 96
WIRE 64 128 64 96
WIRE 304 128 304 96
WIRE 432 128 432 96
WIRE 64 240 64 208
WIRE 304 240 304 192
WIRE 432 240 432 192
SYMBOL diode 448 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1591.549431
SYMBOL cap 288 128 R0
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL voltage 64 112 R0
WINDOW 3 24 152 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMATTR InstName V1
FLAG 304 240 0
FLAG 64 240 0
FLAG 432 240 0
TEXT 40 40 Left 2 !.ac oct 1000 1 2meg
* Z:\home\khalils\Downloads\files\data\raw_asc\b18c6e08c78f_1468-2.asc
* Generated by LTspice 26.0.1 for Windows.
* 100KHz Low Distortion Bandpass Filter
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1468-2.asy)
R3 0 N001 121
R2 N001 IN 11K
C2 OUT N001 1000p
R1 OUT N002 22.1K
C1 N002 N001 1000p
V1 +V 0 15
V3 IN 0 AC 1
XU1 0 N002 +V -V OUT LT1468-2 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -15
.ac oct 100 10K 1Meg
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -224 16 -224 0
WIRE -96 16 -96 0
WIRE 80 32 0 32
WIRE 304 32 144 32
WIRE 192 96 176 96
WIRE 304 96 304 32
WIRE 304 96 272 96
WIRE -224 112 -224 96
WIRE -96 112 -96 96
WIRE 240 208 240 192
WIRE -144 224 -208 224
WIRE 0 224 0 32
WIRE 0 224 -64 224
WIRE 80 224 0 224
WIRE 176 224 176 96
WIRE 176 224 144 224
WIRE 208 224 176 224
WIRE -208 240 -208 224
WIRE 0 240 0 224
WIRE 304 240 304 96
WIRE 304 240 272 240
WIRE 352 240 304 240
WIRE 208 256 176 256
WIRE 240 288 240 272
WIRE -208 336 -208 320
WIRE 0 336 0 320
SYMBOL res -48 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 11K
SYMBOL cap 144 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL voltage -224 0 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -208 224 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL res -16 336 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 121
SYMBOL cap 144 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000p
SYMBOL voltage -96 0 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 288 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 22.1K
SYMBOL opamps\\LT1468-2 240 176 R0
SYMATTR InstName U1
FLAG -96 112 0
FLAG 240 192 +V
FLAG -96 0 +V
FLAG 240 288 -V
FLAG -224 112 0
FLAG -224 0 -V
FLAG -208 336 0
FLAG 176 256 0
FLAG 0 336 0
FLAG 352 240 OUT
FLAG -208 224 IN
TEXT 96 352 Left 2 !.ac oct 100 10K 1Meg
TEXT 80 -56 Bottom 2 ;100KHz Low Distortion Bandpass Filter
* Z:\tmp\asc_dec_bjh7r6w2\080359a28366_1_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
C2 out N001 15p
V1 in 0 AC 1 0
R3 N003 0 38k
R2 N002 N001 6.6k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 48 160 48
WIRE 480 48 368 48
WIRE 48 128 32 128
WIRE 160 128 160 48
WIRE 160 128 128 128
WIRE 192 128 160 128
WIRE 304 128 272 128
WIRE 368 128 304 128
WIRE 480 144 480 48
WIRE 480 144 432 144
WIRE 496 144 480 144
WIRE 304 160 304 128
WIRE 368 160 352 160
WIRE 32 208 32 128
WIRE 352 240 352 160
WIRE 384 240 352 240
WIRE 480 240 480 144
WIRE 480 240 464 240
WIRE 352 272 352 240
SYMBOL cap 368 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 15p
SYMBOL voltage 32 192 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMBOL res 336 256 R0
SYMATTR InstName R3
SYMATTR Value 38k
SYMBOL res 288 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 6.6k
FLAG 304 224 0
FLAG 352 352 0
FLAG 32 128 in
FLAG 496 144 out
FLAG 32 288 0
* Z:\home\khalils\Downloads\files\data\raw_asc\145b6d545836_Current_Mirror.asc
* Generated by LTspice 26.0.1 for Windows.
* From https://hardware.buspirate.com/#programmable-power-supply-unit\nR1 R2 imbalance makes the circuit more sensitive to a higher V2.\nR5 decouples both transistors.\nD1 protects Q1 from reverse BE voltage.
R4 v2 e2 1m
V1 v1 0 10
D1 base v1 1N4148
V2 v2 0 PWL(0 10 1m 10 1.1m 10.01 2m 10.01 2.1m 9.99 3m 9.99 3.1m 10)
R3 v1 e1 1m
R5 N001 base 10k
R2 out 0 100k
Q1 base base e1 0 BC857B
Q2 out N001 e2 0 BC857B
R1 base 0 75k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 4m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1416 680
WIRE -192 -32 -208 -32
WIRE 16 -32 -192 -32
WIRE 160 -32 16 -32
WIRE 592 -32 384 -32
WIRE 608 -32 592 -32
WIRE 16 -16 16 -32
WIRE 384 -16 384 -32
WIRE 160 64 160 -32
WIRE 16 112 16 64
WIRE 384 112 384 64
WIRE 16 160 16 112
WIRE 384 160 384 112
WIRE -208 192 -208 -32
WIRE 608 192 608 -32
WIRE 112 208 80 208
WIRE 160 208 160 128
WIRE 160 208 112 208
WIRE 208 208 160 208
WIRE 320 208 288 208
WIRE 16 272 16 256
WIRE 160 272 160 208
WIRE 160 272 16 272
WIRE 384 272 384 256
WIRE 432 272 384 272
WIRE -208 288 -208 272
WIRE 16 288 16 272
WIRE 384 288 384 272
WIRE 608 288 608 272
WIRE 16 400 16 368
WIRE 192 400 16 400
WIRE 384 400 384 368
WIRE 384 400 192 400
WIRE 192 416 192 400
SYMBOL res 0 -32 R0
SYMATTR InstName R3
SYMATTR Value 1m
SYMBOL voltage -208 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL diode 176 128 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL pnp 80 256 R180
SYMATTR InstName Q1
SYMATTR Value BC857B
SYMBOL res 0 272 R0
SYMATTR InstName R1
SYMATTR Value 75k
SYMBOL res 368 272 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL voltage 608 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 10 1m 10 1.1m 10.01 2m 10.01 2.1m 9.99 3m 9.99 3.1m 10)
SYMBOL pnp 320 256 M180
SYMATTR InstName Q2
SYMATTR Value BC857B
SYMBOL res 368 -32 R0
SYMATTR InstName R4
SYMATTR Value 1m
SYMBOL res 304 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10k
FLAG 192 416 0
FLAG 112 208 base
FLAG -208 288 0
FLAG -192 -32 v1
FLAG 432 272 out
FLAG 608 288 0
FLAG 592 -32 v2
FLAG 16 112 e1
FLAG 384 112 e2
TEXT -242 440 Left 2 !.tran 4m
TEXT -176 -176 Left 2 ;From https://hardware.buspirate.com/#programmable-power-supply-unit\nR1 R2 imbalance makes the circuit more sensitive to a higher V2.\nR5 decouples both transistors.\nD1 protects Q1 from reverse BE voltage.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1728-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1728-5.asy)
V1 N004 0 PWL(0 1.05 7 1.05 8 0.95 9 1.05)
V2 N005 0 PWL(0 5 4 5 5 4.5 6 5)
V3 N003 0 PWL(0 3.3 1 3.3 2 3.0 3 3.3)
V4 N001 0 5
R1 N002 N001 10K
XU1 N002 0 N004 N005 N003 LTC1728-5 ;pnba _RST)GND)VccA)Vcc5)Vcc3
.tran 10
.lib LTC1728-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1100 756
WIRE -176 144 -240 144
WIRE 48 144 -96 144
WIRE 464 144 272 144
WIRE -240 176 -240 144
WIRE 464 176 464 144
WIRE 48 208 32 208
WIRE 48 272 -80 272
WIRE 384 272 272 272
WIRE 464 272 464 256
WIRE -240 288 -240 256
WIRE -80 288 -80 272
WIRE 384 304 384 272
WIRE -80 384 -80 368
WIRE 384 400 384 384
SYMBOL voltage 464 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 3.3 1 3.3 2 3.0 3 3.3)
SYMBOL voltage 384 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PWL(0 5 4 5 5 4.5 6 5)
SYMATTR InstName V2
SYMBOL voltage -240 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL voltage -80 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 1.05 7 1.05 8 0.95 9 1.05)
SYMBOL LTC1728-5 160 240 R0
SYMATTR InstName U1
SYMBOL res -80 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 32 208 0
FLAG 464 272 0
FLAG 384 400 0
FLAG -80 384 0
FLAG -240 288 0
TEXT 632 456 Left 2 !.tran 10
* Z:\home\khalils\Downloads\files\data\raw_asc\20bde0faf336_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP27.asy)
XU1 vin N001 vcc vcc- N002 OP27 ;pnba In+)In-)V+)V-)OUT
R1 N002 N001 2.88k
V3 vcc- 0 -5
R2 N001 0 1k
V2 vin 0 SINE(0 0.447 1k)
V1 vcc 0 5
.tran 10m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 32 64 32
WIRE 192 32 176 32
WIRE -64 128 -96 128
WIRE 64 128 64 32
WIRE 64 128 16 128
WIRE 96 128 64 128
WIRE -96 144 -96 128
WIRE 192 144 192 32
WIRE 192 144 160 144
WIRE 240 144 192 144
SYMBOL voltage -320 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 32 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -320 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 0.447 1k)
SYMBOL OpAmps\\OP27 128 80 R0
SYMATTR InstName U1
SYMBOL voltage -224 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL res 192 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2.88k
FLAG -320 16 vcc
FLAG -320 96 0
FLAG 128 112 vcc
FLAG -96 144 0
FLAG -320 304 0
FLAG -320 224 vin
FLAG 304 144 vout
FLAG -224 96 0
FLAG -224 16 vcc-
FLAG 128 176 vcc-
FLAG 96 160 vin
TEXT -226 358 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2371-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 12
L1 N002 OUT 10 Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
C1 OUT 0 10
R1 OUT N001 10K
XU1 NC_01 IN IN IN N002 OUT N001 0 ADP2371-1.8 IPSM=400m Rt=277777.8 Rb=222222.2 C1=9.6p Rc1=100k R3=5.92k Rshort=100MEG PD=1 ;pnba FSEL)SYNC)EN)Vin)SW)FB)PG)PGND
Rload OUT 0 20
.tran 500u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2371-1.8.asy)
.lib ADP2371-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 692
WIRE 128 96 16 96
WIRE 160 96 128 96
WIRE 464 96 400 96
WIRE 624 96 544 96
WIRE 16 112 16 96
WIRE 128 176 128 96
WIRE 160 176 128 176
WIRE 416 176 400 176
WIRE 544 176 496 176
WIRE 624 176 624 96
WIRE 624 176 544 176
WIRE 672 176 624 176
WIRE 672 192 672 176
WIRE 16 208 16 192
WIRE 128 336 128 176
WIRE 544 256 544 240
WIRE 544 256 400 256
WIRE 544 272 544 256
WIRE 672 288 672 272
WIRE 160 336 128 336
WIRE 624 336 624 176
WIRE 624 336 400 336
FLAG 16 208 0
FLAG 16 96 IN
FLAG 544 272 0
FLAG 672 176 OUT
FLAG 672 288 0
SYMBOL VOLTAGE 16 96 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ind 400 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
SYMBOL cap 528 176 R0
WINDOW 0 29 15 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 560 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL ADP2371-1.8 288 208 R0
SYMATTR InstName U1
SYMBOL res 656 176 R0
SYMATTR InstName Rload
SYMATTR Value 20
TEXT 512 392 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0b1b2f786575_nand.asc
* Generated by LTspice 26.0.1 for Windows.
M3 VOUT VIN1 N001 0 NMOS l=90n w=200n
M4 N001 VIN2 0 0 NMOS l=90n w=200n
M1 VDD VIN1 VOUT VDD PMOS l=90n w=400n
M2 VDD VIN2 VOUT VDD PMOS l=90n w=400n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 884
WIRE 128 112 128 80
WIRE 128 112 112 112
WIRE 320 112 320 80
WIRE 336 112 320 112
WIRE 128 160 128 112
WIRE 128 160 112 160
WIRE 336 160 336 112
WIRE 336 160 320 160
WIRE 64 192 48 192
WIRE 272 192 256 192
WIRE 112 304 112 208
WIRE 240 304 112 304
WIRE 320 304 320 208
WIRE 320 304 240 304
WIRE 352 304 320 304
WIRE 240 320 240 304
WIRE 320 368 240 368
WIRE 192 400 176 400
WIRE 240 448 240 416
WIRE 256 496 240 496
WIRE 192 528 176 528
WIRE 256 544 256 496
WIRE 256 544 240 544
WIRE 320 544 320 368
WIRE 320 544 256 544
WIRE 256 576 256 544
IOPIN 48 192 In
IOPIN 256 192 In
IOPIN 176 400 In
IOPIN 176 528 In
IOPIN 128 80 In
IOPIN 352 304 Out
IOPIN 320 80 In
SYMBOL pmos4 64 112 R0
SYMATTR InstName M1
SYMATTR Value2 l=90n w=400n
SYMBOL nmos4 192 320 R0
SYMATTR InstName M3
SYMATTR Value2 l=90n w=200n
SYMBOL nmos4 192 448 R0
SYMATTR InstName M4
SYMATTR Value2 l=90n w=200n
SYMBOL pmos4 272 112 R0
SYMATTR InstName M2
SYMATTR Value2 l=90n w=400n
FLAG 48 192 VIN1
FLAG 256 192 VIN2
FLAG 256 576 0
FLAG 176 400 VIN1
FLAG 176 528 VIN2
FLAG 128 80 VDD
FLAG 352 304 VOUT
FLAG 320 80 VDD
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG802.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 1 input.\nPin Capacitance and Charge Injection are not included.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG802.asy)
V1 +V 0 5
XU1 +V IN D S 0 ADG802 ;pnba Vdd)IN)D)S)GND
C1 D 0 33p
VS S 0 3
V2 IN 0 PULSE(3 0 0 10n 10n 980n 2u)
R1 D 0 47
.tran 10u
.lib ADG802.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -368 -16 -400 -16
WIRE -272 -16 -288 -16
WIRE -240 -16 -272 -16
WIRE -32 -16 -48 -16
WIRE 0 -16 -32 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE -480 32 -480 16
WIRE 112 32 112 -16
WIRE -272 48 -368 48
WIRE -240 48 -272 48
WIRE -368 112 -368 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -480 128 -480 112
WIRE -144 176 -144 160
WIRE -368 272 -368 192
SYMBOL ADG802 -144 32 R0
SYMATTR InstName U1
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 33p
SYMBOL voltage -272 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL voltage -480 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -368 96 R0
WINDOW 3 17 129 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(3 0 0 10n 10n 980n 2u)
SYMATTR InstName V2
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 47
FLAG -480 128 0
FLAG -480 16 +V
FLAG -400 -16 0
FLAG -144 -112 +V
FLAG -144 176 0
FLAG -368 272 0
FLAG 0 112 0
FLAG 112 112 0
FLAG -272 -16 S
FLAG -272 48 IN
FLAG -32 -16 D
TEXT 64 224 Left 2 !.tran 10u
TEXT -592 -232 Left 2 ;Note:\nSwitch shown for a logic 1 input.\nPin Capacitance and Charge Injection are not included.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1932.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 0 1.5K
L1 IN N001 6
V1 IN 0 2
D5 N001 N002 MBR0540
C1 N002 0 1
XU1 N001 0 N004 N003 IN IN LT1932 ;pnba SW)GND)LED)Rset)_SHDN)Vin
D1 N002 N004 NSPW500BS N=4
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1932.asy)
.lib LT1932.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2460 1624
WIRE 1568 1216 1472 1216
WIRE 1680 1216 1568 1216
WIRE 1728 1216 1680 1216
WIRE 1840 1216 1808 1216
WIRE 1888 1216 1840 1216
WIRE 2016 1216 1952 1216
WIRE 2080 1216 2016 1216
WIRE 1472 1232 1472 1216
WIRE 2016 1232 2016 1216
WIRE 1680 1280 1680 1216
WIRE 1840 1280 1840 1216
WIRE 2016 1312 2016 1296
WIRE 1472 1328 1472 1312
WIRE 2080 1328 2080 1216
WIRE 1568 1360 1568 1216
WIRE 1600 1360 1568 1360
WIRE 1504 1488 1488 1488
WIRE 1600 1488 1584 1488
WIRE 2080 1488 2080 1392
WIRE 2080 1488 1920 1488
WIRE 1760 1584 1760 1568
FLAG 1760 1584 0
FLAG 1488 1488 0
FLAG 1472 1328 0
FLAG 2016 1312 0
FLAG 1472 1216 IN
SYMBOL RES 1600 1472 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1.5K
SYMBOL ind 1712 1232 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6
SYMBOL VOLTAGE 1472 1216 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL schottky 1888 1232 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D5
SYMATTR Value MBR0540
SYMBOL cap 2000 1232 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL POWERPRODUCTS\\LT1932 1760 1424 R0
SYMATTR InstName U1
SYMBOL LED 2064 1328 R0
WINDOW 0 27 6 Left 2
WINDOW 3 24 67 Left 2
WINDOW 123 24 95 Left 2
SYMATTR InstName D1
SYMATTR Value NSPW500BS
SYMATTR Description Diode
SYMATTR Type diode
SYMATTR Value2 N=4
TEXT 2128 1528 Left 2 !.tran 500u startup
* Z:\tmp\asc_dec_bjh7r6w2\031aac2fa88b_1050A_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V3 +V 0 5
Q2 N002 N003 N001 0 MAT-02
R6 +V N006 25K
R7 N001 N004 3K
R1 N003 OUT 15.7K
V2 -V 0 -5
R4 N003 0 1K
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1616 680
WIRE 624 0 336 0
WIRE 704 0 624 0
WIRE 864 0 800 0
WIRE 624 16 624 0
WIRE 288 80 288 64
WIRE 752 112 752 64
WIRE 752 112 416 112
WIRE 992 128 992 112
WIRE 272 144 240 144
WIRE 624 144 624 96
WIRE 784 144 624 144
WIRE 864 144 864 0
WIRE 864 144 848 144
WIRE -224 160 -224 144
WIRE 768 208 768 192
WIRE 864 224 864 144
WIRE 864 224 800 224
WIRE 880 224 864 224
WIRE 992 224 992 208
WIRE 992 224 960 224
WIRE 272 240 272 144
WIRE 272 240 160 240
WIRE 304 240 272 240
WIRE 416 240 416 112
WIRE 416 240 384 240
WIRE 448 240 416 240
WIRE 544 240 528 240
WIRE 624 240 624 144
WIRE 624 240 608 240
WIRE 736 240 624 240
WIRE 816 256 800 256
WIRE -224 272 -224 240
WIRE 416 272 416 240
WIRE 992 320 992 288
WIRE 32 352 0 352
WIRE -256 368 -256 352
WIRE -160 368 -160 352
WIRE 416 368 416 352
WIRE 0 384 0 352
WIRE 272 384 272 240
WIRE 304 384 272 384
WIRE -256 480 -256 448
WIRE -160 480 -160 448
WIRE 0 480 0 464
SYMBOL voltage -160 352 R0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL npn 800 64 M270
WINDOW 0 35 49 VTop 0
WINDOW 3 -4 38 VLeft 0
SYMATTR InstName Q2
SYMATTR Value MAT-02
SYMBOL res 976 112 R0
SYMATTR InstName R6
SYMATTR Value 25K
SYMBOL res 608 0 R0
SYMATTR InstName R7
SYMATTR Value 3K
SYMBOL res 400 224 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 15.7K
SYMBOL voltage -256 352 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 400 256 R0
SYMATTR InstName R4
SYMATTR Value 1K
FLAG -160 480 0
FLAG -160 352 +V
FLAG -256 480 0
FLAG -256 352 -V
FLAG -224 272 0
FLAG 288 80 0
FLAG 416 368 0
FLAG 768 192 +V
FLAG 816 256 0
FLAG 992 112 +V
FLAG 304 384 OUT
FLAG 0 480 0
FLAG 32 352 Exact
* Z:\home\khalils\Downloads\files\data\raw_asc\108286491c01_JfetProtect.asc
* Generated by LTspice 26.0.1 for Windows.
;.tf V(O) V2
V3 N002 0 SINE(15 30 10)
J2 NC_01 NC_02 NC_03 J112
D1 O N001 1N4148
R1 O P001 100
J1 N002 O P001 J112
V1 N001 0 3.3
V2 NC_04 NC_05 PULSE(0 30 .01 0.001 0.001 0.1 0.2)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 80 240 80
WIRE 512 112 448 112
WIRE 240 160 240 80
WIRE 240 160 208 160
WIRE 144 208 80 208
WIRE 384 208 384 80
WIRE 384 208 320 208
WIRE 448 208 448 176
WIRE 448 208 384 208
WIRE 512 288 512 192
SYMBOL njf 144 160 M90
SYMATTR InstName J1
SYMATTR Value J112
SYMBOL njf 448 -96 R90
SYMATTR InstName J2
SYMATTR Value J112
SYMBOL voltage 512 96 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL diode 464 176 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 336 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage 80 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(15 30 10)
SYMBOL voltage 80 368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 30 .01 0.001 0.001 0.1 0.2)
FLAG 512 288 0
FLAG 80 288 0
FLAG 448 208 O
TEXT -58 2 Left 2 !.tran 1
TEXT -56 -32 Left 2 !;.tf V(O) V2
* Z:\tmp\asc_dec_bjh7r6w2\094646d5ccbb_classe-lnet-10Mhz_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
RLoad N005 0 50
L1 N001 N002 11.3355H
L3 N004 N005 356.688nH
.backanno
.end

* LTspice schematic (.asc):
WIRE 272 -80 272 -16
WIRE 0 -272 272 -272
WIRE 272 -272 272 -224
WIRE 272 -144 272 -112
WIRE 272 -112 272 -80
WIRE 272 -112 416 -112
WIRE 416 -112 416 -48
WIRE 416 -112 496 -112
WIRE 560 -112 624 -112
WIRE 704 -112 768 -112
WIRE 896 -112 896 -48
WIRE 896 16 896 64
WIRE 848 -112 896 -112
WIRE 896 -112 976 -112
WIRE 976 -112 976 -64
WIRE 976 16 976 64
SYMBOL res  960 -80 R0
SYMATTR InstName RLoad
SYMATTR Value 50
SYMBOL ind  256 -240 R0
SYMATTR InstName L1
SYMATTR Value 11.3355uH
SYMBOL ind  752 -96 R270
WINDOW 0 32 56 Vtop 0
WINDOW 3 5 56 Vbottom 0
SYMATTR InstName L3
SYMATTR Value 356.688nH
FLAG 896 64 0
FLAG 976 64 0