Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3108.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3108.asy)
XU1 0 N007 N004 OUT NC_01 N008 N009 MP_02 MP_03 0 N007 NC_04 N003 N005 N006 LTC3108 ;pnba GND)Vaux)Vstore)Vout)Vout2)VLDO)PGD)))VS2)VS1)Vout2_EN)C1)C2)SW
C3 N002 N005 330p
C5 OUT 0 470
K1 L1 L2 1
C4 N004 0 1m
L2 N002 0 75m Rser=300
C6 N008 0 2.2
C1 N007 0 1
V1 N001 0 PWL(.1m 0 .101m 30m)
L1 N001 N006 7.5 Rser=85m
C2 N002 N003 1n
.tran 1 startup
.ic V(out)=3.29
.lib LTC3108.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 976 680
WIRE 128 -32 -272 -32
WIRE 272 -32 176 -32
WIRE 288 -32 272 -32
WIRE 368 -32 352 -32
WIRE 672 -32 624 -32
WIRE 672 -16 672 -32
WIRE -272 0 -272 -32
WIRE 128 0 128 -32
WIRE 176 0 176 -32
WIRE 272 64 272 -32
WIRE 288 64 272 64
WIRE 368 64 352 64
WIRE 672 64 672 48
WIRE 176 96 176 80
WIRE -272 112 -272 80
WIRE 128 160 128 80
WIRE 368 160 128 160
WIRE 672 160 624 160
WIRE 672 176 672 160
WIRE 368 256 320 256
WIRE 672 256 672 240
WIRE 368 352 352 352
WIRE 672 352 624 352
WIRE 672 368 672 352
WIRE 320 448 320 256
WIRE 368 448 320 448
WIRE 640 448 624 448
WIRE 672 448 672 432
WIRE 320 464 320 448
WIRE 496 512 496 496
WIRE 320 544 320 528
SYMBOL cap 288 -16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL cap 656 176 R0
SYMATTR InstName C5
SYMATTR Value 470
SYMBOL ind2 192 -16 M0
WINDOW 0 -8 40 Right 2
WINDOW 3 -13 84 Right 2
SYMATTR InstName L2
SYMATTR Value 75m
SYMATTR Type ind
SYMATTR SpiceLine Rser=300
SYMBOL cap 304 464 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 656 -16 R0
SYMATTR InstName C4
SYMATTR Value 1m
SYMBOL cap 656 368 R0
SYMATTR InstName C6
SYMATTR Value 2.2
SYMBOL PowerProducts\\LTC3108 496 208 R0
SYMATTR InstName U1
SYMBOL ind2 112 -16 R0
WINDOW 0 -8 35 Right 2
WINDOW 3 -4 80 Right 2
SYMATTR InstName L1
SYMATTR Value 7.5
SYMATTR Type ind
SYMATTR SpiceLine Rser=85m
SYMBOL cap 288 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value 330p
SYMBOL voltage -272 -16 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR Value PWL(.1m 0 .101m 30m)
SYMATTR InstName V1
FLAG 496 512 0
FLAG 320 544 0
FLAG 352 352 0
FLAG 176 96 0
FLAG -272 112 0
FLAG 672 64 0
FLAG 672 256 0
FLAG 672 448 0
FLAG 672 160 OUT
TEXT 152 -32 Bottom 2 !K1 L1 L2 1
TEXT 776 384 Left 2 !.tran 1 startup\n.ic V(out)=3.29
* Z:\home\khalils\Downloads\files\data\raw_asc\296c265b1005_AC-equiv__Q1_Rin.asc
* Generated by LTspice 26.0.1 for Windows.
Vs N002 0
R11 vb 0
R21 vb 0
RQ1re vb P001
RE1 P001 0
IQ1Beta-ib N001 vb
Rs vb N002 1k
* Rin
* Rb
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 512 -32 512 -64
WIRE 288 96 160 96
WIRE 368 96 288 96
WIRE 512 96 512 48
WIRE 512 96 368 96
WIRE 80 128 80 96
WIRE 288 128 288 96
WIRE 368 128 368 96
WIRE 512 128 512 96
WIRE 512 160 512 128
WIRE 80 240 80 208
WIRE 288 240 288 208
WIRE 288 240 80 240
WIRE 368 240 368 208
WIRE 368 240 288 240
WIRE 288 272 288 240
WIRE 512 336 512 320
FLAG 288 272 0
FLAG 512 336 0
FLAG 512 128 vb
IOPIN 512 128 Out
SYMBOL voltage 80 112 R0
WINDOW 0 -12 56 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vs
SYMATTR Value ""
SYMBOL res 272 112 R0
WINDOW 0 -34 99 Left 2
SYMATTR InstName R11
SYMATTR Value ""
SYMBOL res 352 112 R0
WINDOW 0 -36 97 Left 2
SYMATTR InstName R21
SYMATTR Value ""
SYMBOL res 496 144 R0
WINDOW 0 36 49 Left 2
SYMATTR InstName Q1re
SYMATTR Value ""
SYMBOL res 496 224 R0
SYMATTR InstName RE1
SYMATTR Value ""
SYMBOL current 512 -32 R0
SYMATTR InstName Q1Beta-ib
SYMATTR Value ""
SYMBOL res 176 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rs
SYMATTR Value 1k
TEXT 184 40 Left 2 ;Rin
TEXT 400 40 Left 2 ;Rb
LINE Normal 240 144 240 32 2
LINE Normal 448 144 448 32 2
LINE Normal 272 64 176 64
LINE Normal 480 64 400 64
LINE Normal 480 64 480 64
LINE Normal 272 64 256 48
LINE Normal 256 80 272 64
LINE Normal 480 64 464 48
LINE Normal 464 80 480 64
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3251.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N003 N005 1
C2 N001 N002 1
R1 N006 0 536K
R2 OUT N006 475K
Rload OUT 0 25
V1 IN 0 5
XU1 N004 IN N001 N002 0 N005 OUT N003 IN N006 LTC3251 ;pnba MD0)Vin)C1+)C1-)GND)C2-)Vout)C2+)MD1)FB
C3 OUT 0 10 Rser=0.01
.tran .5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3251.asy)
.lib LTC3251.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 1320
WIRE 96 832 0 832
WIRE 336 832 96 832
WIRE 0 848 0 832
WIRE 336 864 336 832
WIRE 192 912 144 912
WIRE 592 912 480 912
WIRE 704 912 592 912
WIRE 800 912 704 912
WIRE 800 928 800 912
WIRE 0 944 0 928
WIRE 704 944 704 912
WIRE 592 960 592 912
WIRE 192 976 144 976
WIRE 512 976 480 976
WIRE 704 1024 704 1008
WIRE 800 1024 800 1008
WIRE 192 1040 176 1040
WIRE 512 1040 480 1040
WIRE 96 1104 96 832
WIRE 192 1104 96 1104
WIRE 592 1104 592 1040
WIRE 592 1104 480 1104
WIRE 592 1120 592 1104
WIRE 336 1168 336 1152
WIRE 592 1216 592 1200
FLAG 336 1168 0
FLAG 592 1216 0
FLAG 800 1024 0
FLAG 704 1024 0
FLAG 0 944 0
FLAG 800 912 OUT
FLAG 0 832 IN
SYMBOL cap 496 976 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 128 912 R0
WINDOW 0 31 19 Left 2
WINDOW 3 30 49 Left 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL RES 576 1104 R0
SYMATTR InstName R1
SYMATTR Value 536K
SYMBOL res 576 944 R0
SYMATTR InstName R2
SYMATTR Value 475K
SYMBOL res 784 912 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL VOLTAGE 0 832 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL POWERPRODUCTS\\LTC3251 336 1008 R0
SYMATTR InstName U1
SYMBOL cap 688 944 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMATTR SpiceLine Rser=0.01
TEXT 640 1096 Left 2 !.tran .5m startup
* Z:\tmp\asc_dec_bjh7r6w2\029a5c8de44e_1253_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
T1 N003 0 OUT 0 Td=50n Z0=75
XU1 IN N001 +V -V N002 LT1253 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -5
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1253.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -176 176 -176 160
WIRE -48 176 -48 160
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 336 240 256 240
WIRE 464 240 416 240
WIRE 672 240 560 240
WIRE 160 256 48 256
WIRE 672 256 672 240
WIRE -176 272 -176 256
WIRE -48 272 -48 256
WIRE 48 272 48 256
WIRE 464 272 432 272
WIRE 592 272 560 272
WIRE 192 288 192 272
WIRE 672 352 672 336
WIRE 48 368 48 352
SYMBOL tline 512 256 R0
WINDOW 3 -81 49 Left 2
SYMATTR Value Td=50n Z0=75
SYMATTR InstName T1
SYMBOL opamps\\LT1253 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -176 160 R0
SYMATTR InstName V2
SYMATTR Value -5
FLAG -48 272 0
FLAG 192 192 +V
FLAG -48 160 +V
FLAG 192 288 -V
FLAG -176 272 0
FLAG -176 160 -V
FLAG 16 96 0
FLAG 48 368 0
FLAG 672 352 0
FLAG 592 272 0
FLAG 432 272 0
FLAG 48 256 IN
FLAG 672 240 OUT
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6553.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6553.asy)
XU1 0 0 IN 0 0 0 0 -V OUTB +V OUTG OUTR LT6553 ;pnba _EN)DGND)INR)AGND1)ING)AGND2)INB)V-)OUTB)V+)OUTG)OUTR
V1 +V 0 5
V2 -V 0 -5
V3 IN 0 AC 1
R1 0 OUTR 150
.ac dec 100 100K 1G
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 924 868
WIRE 336 432 336 384
WIRE 240 480 32 480
WIRE 32 496 32 480
WIRE 592 496 432 496
WIRE 640 496 592 496
WIRE 592 512 592 496
WIRE -240 528 -240 512
WIRE -128 528 -128 512
WIRE 240 544 192 544
WIRE 32 592 32 576
WIRE 464 592 432 592
WIRE 192 608 192 544
WIRE 240 608 192 608
WIRE 592 608 592 592
WIRE -240 624 -240 608
WIRE -128 624 -128 608
WIRE 192 640 192 608
WIRE 240 640 192 640
WIRE 464 672 432 672
WIRE 192 688 192 640
WIRE 240 688 192 688
WIRE 192 720 192 688
WIRE 272 768 272 736
WIRE 336 768 336 736
WIRE 400 768 400 736
SYMBOL res 576 608 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 150
SYMBOL voltage 32 480 R0
WINDOW 123 20 100 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value ""
SYMBOL LT6553 336 512 R0
SYMATTR InstName U1
SYMBOL voltage -240 512 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -128 512 R0
SYMATTR InstName V2
SYMATTR Value -5
FLAG -240 624 0
FLAG -128 624 0
FLAG 336 384 +V
FLAG 192 720 0
FLAG 32 592 0
FLAG 32 480 IN
FLAG 640 496 OUTR
FLAG 464 592 OUTG
FLAG 464 672 OUTB
FLAG 592 608 0
FLAG -240 512 +V
FLAG -128 512 -V
FLAG 400 768 -V
FLAG 272 768 0
FLAG 336 768 0
TEXT 504 784 Left 2 !.ac dec 100 100K 1G
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1741.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1741.asy)
XU1 IN N003 IN N002 OUT N001 0 ADP1741 ;pnba Vin)ADJ)EN)SS)Vout)PG)GND
R2 OUT N003 106k
V1 IN 0 1.8
R4 OUT 0 1
C1 OUT 0 4.7 Rser=3m
C2 N002 0 10n
R1 IN N001 100k
R3 N003 0 59k
.tran 50m startup
.lib ADP1741.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1064 680
WIRE -112 32 -128 32
WIRE -16 32 -112 32
WIRE 64 32 -16 32
WIRE 96 32 64 32
WIRE 448 32 352 32
WIRE 592 32 448 32
WIRE 672 32 592 32
WIRE 704 32 672 32
WIRE -128 48 -128 32
WIRE -16 48 -16 32
WIRE 592 48 592 32
WIRE 704 48 704 32
WIRE 448 80 448 32
WIRE 64 96 64 32
WIRE 96 96 64 96
WIRE -128 144 -128 128
WIRE 592 144 592 112
WIRE 704 144 704 128
WIRE -16 176 -16 128
WIRE 96 176 -16 176
WIRE 16 240 0 240
WIRE 96 240 80 240
WIRE 448 240 448 160
WIRE 448 240 352 240
WIRE 448 288 448 240
WIRE 224 304 224 288
WIRE 448 416 448 368
SYMBOL res -32 32 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res 432 272 R0
SYMATTR InstName R3
SYMATTR Value 59k
SYMBOL cap 80 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -128 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL ADP1741 224 128 R0
SYMATTR InstName U1
SYMBOL cap 576 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=3m
SYMBOL res 688 32 R0
SYMATTR InstName R4
SYMATTR Value 1
SYMBOL res 432 64 R0
SYMATTR InstName R2
SYMATTR Value 106k
FLAG 224 304 0
FLAG -128 144 0
FLAG 0 240 0
FLAG -112 32 IN
FLAG 704 144 0
FLAG 592 144 0
FLAG 672 32 OUT
FLAG 448 416 0
TEXT 128 352 Left 2 !.tran 50m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2fb018b0ef5b_Assignment_3a__i_.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Half Wave Rectifier Circuit (Practical)
R1 N002 0 1000
D1 N001 N002 1N4148
V1 N001 0 SINE(0 5 1000) Rser=0.001
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5ms
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 64 80 64
WIRE 352 64 256 64
WIRE 80 112 80 64
WIRE 352 112 352 64
WIRE 80 240 80 192
WIRE 176 240 80 240
WIRE 352 240 352 192
WIRE 352 240 176 240
WIRE 176 272 176 240
SYMBOL voltage 80 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.001
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1000)
SYMBOL diode 192 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 336 96 R0
SYMATTR InstName R1
SYMATTR Value 1000
FLAG 176 272 0
TEXT 16 272 Left 2 !.tran 5ms
TEXT -24 8 Left 2 ;Positive Half Wave Rectifier Circuit (Practical)
* Z:\home\khalils\Downloads\files\data\raw_asc\83d152cd6540_testRtR1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT2179A.asy)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6202.asy)
R3 Out2 N001 100k
R2 N002 Signal 1k
XU1 0 N002 Out Vcc 0 LT6202 ;pnba IN+)IN-)OUT)VCC)VEE
R1 Out N002 1k
R4 N001 Signal 1k
V1 Signal 0 SINE(0 5 200)
XU3 0 N001 Vcc 0 Out2 LT1178 ;pnba In+)In-)V+)V-)OUT
V2 Vcc 0 5
.tran .05
.lib LTC.lib
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 -320 112 -320
WIRE 272 -320 208 -320
WIRE -464 -208 -464 -240
WIRE 176 -208 176 -240
WIRE 0 -192 -112 -192
WIRE 112 -192 112 -320
WIRE 112 -192 80 -192
WIRE 144 -192 112 -192
WIRE 272 -176 272 -320
WIRE 272 -176 208 -176
WIRE 352 -176 352 -224
WIRE 352 -176 272 -176
WIRE 368 -176 352 -176
WIRE 144 -160 96 -160
WIRE 96 -128 96 -160
WIRE -464 -112 -464 -128
WIRE 176 -112 176 -144
WIRE 80 32 48 32
WIRE 256 32 160 32
WIRE 176 112 176 80
WIRE -352 128 -352 80
WIRE -176 128 -176 80
WIRE -64 128 -176 128
WIRE 48 128 48 32
WIRE 48 128 16 128
WIRE 144 128 48 128
WIRE 256 144 256 32
WIRE 256 144 208 144
WIRE 336 144 336 112
WIRE 336 144 256 144
WIRE 384 144 336 144
WIRE 144 160 80 160
WIRE 80 208 80 160
WIRE 176 208 176 176
WIRE -352 224 -352 208
SYMBOL res 224 -336 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 32 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -464 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 176 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL OpAmps\\LT2179A 176 -240 R0
SYMATTR InstName U3
SYMBOL res 96 -208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL OpAmps\\LT6202 176 144 R0
SYMATTR InstName U1
SYMBOL voltage -352 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 200)
FLAG -464 -112 0
FLAG -352 224 0
FLAG 80 208 0
FLAG 176 208 0
FLAG -464 -240 Vcc
FLAG 176 80 Vcc
FLAG 336 112 Out
FLAG 176 -240 Vcc
FLAG 176 -112 0
FLAG 96 -128 0
FLAG -352 80 Signal
FLAG -176 80 Signal
FLAG -112 -192 Signal
FLAG 352 -224 Out2
TEXT -96 288 Left 2 !.tran .05
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6658-3.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N001 0 1
V3 IN 0 PWL(0 0 100u 0 +2u 5.5)
C2 OUT2 0 1
C3 OUT1 0 1
XU1 IN IN IN IN N001 OUT1 OUT1 OUT2 OUT2 0 N002 LT6658-3 ;pnba Vin)Vin1)Vin2)_OD)Bypass)Vout1_F)Vout1_S)Vout2_F)Vout2_S)Gnd)NR
.tran 500u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6658-3.asy)
.lib LT6658.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1448 1048
WIRE 16 -16 -336 -16
WIRE 128 -16 16 -16
WIRE 224 -16 128 -16
WIRE 320 -16 224 -16
WIRE -336 0 -336 -16
WIRE 128 0 128 -16
WIRE 224 0 224 -16
WIRE 320 0 320 -16
WIRE 432 64 416 64
WIRE 512 64 432 64
WIRE 512 80 512 64
WIRE -336 96 -336 80
WIRE 432 144 432 64
WIRE 432 144 416 144
WIRE 512 160 512 144
WIRE 16 192 16 -16
WIRE 48 192 16 192
WIRE 432 224 416 224
WIRE 496 224 432 224
WIRE 496 240 496 224
WIRE 432 304 432 224
WIRE 432 304 416 304
WIRE 496 320 496 304
WIRE 128 400 128 384
WIRE 224 400 224 384
WIRE 320 400 320 384
WIRE 224 480 224 464
FLAG 128 400 0
FLAG 224 480 0
FLAG -336 96 0
FLAG 512 160 0
FLAG 496 320 0
FLAG 496 224 OUT1
FLAG 512 64 OUT2
FLAG -336 -16 IN
SYMBOL cap 208 400 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -336 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 0 100u 0 +2u 5.5)
SYMBOL cap 496 80 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 480 240 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL LT6658-3 224 192 R0
SYMATTR InstName U1
TEXT 464 464 Left 2 !.tran 500u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7155-01.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7155-01.asy)
V1 IN 0 2.3
C4 N003 0 1
C1 N004 0 1
R1 N003 N005 50K
R5 OUT 0 18
R3 IN N001 100K
XU1 N004 OUT N002 0 N005 N003 N001 IN ADM7154_5 Vreg=2.1022 Vref=1.2152 ;pnba Vreg)Vout)Byp)GND)Ref_Sense)Ref)EN)Vin
C3 OUT 0 10
C2 N002 0 1
R2 N005 0 100K
.tran 5m startup
.lib ADM7154_5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -160 32
WIRE 80 32 -32 32
WIRE 464 32 400 32
WIRE 560 32 464 32
WIRE -160 48 -160 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE -160 144 -160 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE 0 224 -16 224
WIRE 80 224 64 224
WIRE 464 224 400 224
WIRE 560 224 464 224
WIRE 464 240 464 224
WIRE 560 240 560 224
WIRE 560 320 560 304
WIRE 0 336 -16 336
WIRE 80 336 64 336
WIRE 464 336 464 320
WIRE 464 336 400 336
WIRE 464 352 464 336
WIRE 240 416 240 400
WIRE 464 448 464 432
SYMBOL cap 448 48 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL ADM7155-01 240 176 R0
SYMATTR InstName U1
SYMBOL res 448 224 R0
SYMATTR InstName R1
SYMATTR Value 50K
SYMBOL voltage -160 32 R0
SYMATTR InstName V1
SYMATTR Value 2.3
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res 448 336 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL cap 64 320 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 544 240 R0
WINDOW 0 36 14 Left 2
WINDOW 3 36 50 Left 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL res 544 32 R0
SYMATTR InstName R5
SYMATTR Value 18
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
FLAG 240 416 0
FLAG 560 320 0
FLAG 464 144 0
FLAG -16 336 0
FLAG -16 224 0
FLAG -160 144 0
FLAG 560 144 0
FLAG 464 448 0
FLAG -160 32 IN
FLAG 560 32 OUT
TEXT 552 448 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\09ce5669062e_1398.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1398.asy)
XU1 IN N001 +V -V OUT _SHDN LT1398 ;pnba In+)In-)V+)V-)OUT)SHDN
V3 IN 0 SINE(0 1 10K)
V1 +V 0 5
R2 N001 0 200
V2 -V 0 -5
V4 _SHDN 0 PULSE(0 5 0 1u 1u .5m 1m)
R1 OUT N001 324
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 48 64 32 64
WIRE 144 64 128 64
WIRE 224 64 144 64
WIRE 352 64 304 64
WIRE -208 112 -208 96
WIRE -80 112 -80 96
WIRE 208 128 208 112
WIRE 144 176 144 64
WIRE 176 176 144 176
WIRE 352 208 352 64
WIRE 352 208 320 208
WIRE 416 208 352 208
WIRE -208 224 -208 192
WIRE -80 224 -80 192
WIRE 176 240 16 240
WIRE 16 256 16 240
WIRE 208 304 208 288
WIRE 256 336 256 288
WIRE 400 336 256 336
WIRE 16 352 16 336
WIRE 400 352 400 336
WIRE 400 448 400 432
SYMBOL res 320 48 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 324
SYMBOL voltage -80 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 400 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 5 0 1u 1u .5m 1m)
SYMBOL opamps\\LT1398 208 208 R0
SYMATTR InstName U1
SYMBOL res 144 48 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL voltage 16 240 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage -208 96 R0
SYMATTR InstName V2
SYMATTR Value -5
FLAG -80 224 0
FLAG 208 112 +V
FLAG -80 96 +V
FLAG 208 304 -V
FLAG -208 224 0
FLAG -208 96 -V
FLAG 32 64 0
FLAG 16 352 0
FLAG 400 448 0
FLAG 16 240 IN
FLAG 416 208 OUT
FLAG 400 336 _SHDN
TEXT 166 402 Left 0 !.tran 3m
* Z:\tmp\asc_dec_bjh7r6w2\13c254658ed8_Differential_Amplifier_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N004 N005 10k
V3 N003 0 1
V1 vcc 0 15
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 96 -80 48 -80
WIRE 240 -80 176 -80
WIRE 144 16 128 16
WIRE -96 32 -192 32
WIRE 48 32 48 -80
WIRE 48 32 -16 32
WIRE 144 48 144 16
WIRE 48 64 48 32
WIRE 112 64 48 64
WIRE -192 80 -192 32
WIRE 240 80 176 80
WIRE 336 80 240 80
WIRE 112 96 48 96
WIRE 528 112 512 112
WIRE 656 112 640 112
WIRE -64 128 -112 128
WIRE 48 128 48 96
WIRE 48 128 16 128
WIRE 144 160 144 112
WIRE 144 160 128 160
WIRE 528 160 528 112
WIRE 656 160 656 112
WIRE -192 192 -192 160
WIRE -112 192 -112 128
WIRE 48 192 48 128
WIRE 528 288 528 240
WIRE 656 288 656 240
WIRE -112 304 -112 272
WIRE 48 304 48 272
SYMBOL res 32 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -192 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 1
SYMBOL voltage 528 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
FLAG 656 288 0
FLAG 528 288 0
FLAG 512 112 vcc
FLAG 640 112 vee
FLAG 128 16 vcc
FLAG 128 160 vee
FLAG -192 192 0
FLAG -112 304 0
FLAG 336 80 out
FLAG 48 304 0
* Z:\home\khalils\Downloads\files\data\raw_asc\f9d792b71722_MOSFET.asc
* Generated by LTspice 26.0.1 for Windows.
* MOSFET
V2 N001 0 20V
V1 N002 0 10V
M1 N001 N002 0 0 AO6408
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 0 20 0.5 v1 0 10 .5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 608 -80 352 -80
WIRE 608 -16 608 -80
WIRE 352 32 352 -80
WIRE 464 80 352 80
WIRE 304 112 32 112
WIRE 608 144 608 64
WIRE 32 160 32 112
WIRE 352 192 352 128
WIRE 464 192 464 80
WIRE 464 192 352 192
WIRE 352 240 352 192
WIRE 32 320 32 240
SYMBOL nmos 304 32 R0
SYMATTR InstName M1
SYMATTR Value AO6408
SYMBOL voltage 32 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10V
SYMBOL voltage 608 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 20V
FLAG 32 320 0
FLAG 352 240 0
FLAG 608 144 0
TEXT 80 360 Left 2 !.dc V2 0 20 0.5 v1 0 10 .5
TEXT 24 -80 Left 5 ;MOSFET
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG918.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG918.asy)
XU1 +V N001 0 IN OUT2 MP_01 MP_02 OUT1 ADG918 ;pnba Vdd)CTRL)GND)RFC)RF2)))RF1
V2 N001 0 PULSE({Vdd} 0 0 2n 2n 5u 10u)
V3 IN 0 SINE({Vdd/2} 1 10Meg)
V1 +V 0 {Vdd}
.tran 30u
.param Vdd=2.75
.lib ADG.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE 816 -208 816 -224
WIRE 944 -160 912 -160
WIRE 528 -96 432 -96
WIRE 672 -96 608 -96
WIRE 720 -96 672 -96
WIRE 944 -48 912 -48
WIRE 720 0 464 0
WIRE 320 32 320 16
WIRE 464 96 464 0
WIRE 320 128 320 112
WIRE 816 144 816 112
WIRE 464 192 464 176
SYMBOL voltage 320 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vdd}
SYMBOL Switches\\ADG918 816 -64 R0
SYMATTR InstName U1
SYMBOL voltage 464 80 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE({Vdd} 0 0 2n 2n 5u 10u)
SYMBOL voltage 624 -96 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE({Vdd/2} 1 10Meg)
FLAG 320 128 0
FLAG 320 16 +V
FLAG 816 -224 +V
FLAG 816 144 0
FLAG 464 192 0
FLAG 432 -96 0
FLAG 672 -96 IN
FLAG 944 -160 OUT1
FLAG 944 -48 OUT2
TEXT 912 176 Left 2 !.tran 30u\n.param Vdd=2.75