Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\9fa4777f6c15_NOR.asc
* Generated by LTspice 26.0.1 for Windows.
M3 vOUT N003 0 N007 NMOS
V3 N006 0 PULSE(0 5 0 5n 5n 40m 80m)
M1 N001 N003 N004 N002 PMOS
M2 N004 N006 vOUT N005 PMOS
M4 vOUT N006 0 N008 NMOS
V2 N003 0 PULSE(0 5 0 5n 5n 20m 40m)
V1 N001 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 80m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -256 -320 -384 -320
WIRE -384 -208 -384 -240
WIRE -384 -160 -384 -192
WIRE -432 -128 -448 -128
WIRE -448 -64 -448 -128
WIRE -448 -64 -512 -64
WIRE -384 -64 -384 -112
WIRE -384 -16 -384 -48
WIRE -192 32 -384 32
WIRE -432 64 -432 16
WIRE -432 64 -512 64
WIRE -192 64 -192 32
WIRE -432 144 -432 64
WIRE -240 144 -432 144
WIRE -384 176 -384 32
WIRE -192 176 -192 64
WIRE -448 256 -448 -64
WIRE -432 256 -448 256
WIRE -384 256 -384 224
WIRE -240 256 -240 144
WIRE -192 256 -192 224
WIRE -288 272 -384 272
WIRE -192 272 -288 272
IOPIN -192 64 Out
SYMBOL pmos4 -432 -64 R0
SYMATTR InstName M2
SYMBOL voltage -384 -224 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL pmos4 -432 -208 R0
SYMATTR InstName M1
SYMBOL nmos4 -240 176 R0
SYMATTR InstName M4
SYMBOL voltage -496 -64 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 5n 5n 20m 40m)
SYMBOL voltage -496 64 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 5n 5n 40m 80m)
SYMBOL nmos4 -432 176 R0
SYMATTR InstName M3
FLAG -256 -320 0
FLAG -288 272 0
FLAG -192 64 vOUT
FLAG -592 -64 0
FLAG -592 64 0
TEXT -128 -120 Left 2 !.tran 80m
* Z:\home\khalils\Downloads\files\data\raw_asc\00fc0336b964__Fig1_17_AC_MSD.asc
* Generated by LTspice 26.0.1 for Windows.
E1 Vout Vin N001 0 1
T1 Vin 0 N001 0 Td=10n Z0=50
Vin Vin 0 AC 1
R1 N001 0 50
.ac lin 1000 1k 200MEG
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 688
WIRE 704 256 656 256
WIRE 752 256 704 256
WIRE 656 288 656 256
WIRE 96 304 80 304
WIRE 160 304 96 304
WIRE 208 304 160 304
WIRE 512 304 304 304
WIRE 608 304 512 304
WIRE 80 320 80 304
WIRE 512 320 512 304
WIRE 208 336 192 336
WIRE 336 336 304 336
WIRE 80 416 80 400
WIRE 512 432 512 400
WIRE 160 576 160 304
WIRE 656 576 656 368
WIRE 656 576 160 576
SYMBOL e 656 272 R0
WINDOW 0 42 39 Left 0
WINDOW 3 44 69 Left 0
SYMATTR InstName E1
SYMATTR Value 1
SYMBOL voltage 80 304 R0
WINDOW 0 -73 38 Left 0
WINDOW 123 -82 95 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMBOL tline 256 320 R0
SYMATTR InstName T1
SYMATTR Value Td=10n Z0=50
SYMBOL res 496 304 R0
SYMATTR InstName R1
SYMATTR Value 50
FLAG 512 432 0
FLAG 336 336 0
FLAG 192 336 0
FLAG 80 416 0
FLAG 96 304 Vin
FLAG 704 256 Vout
FLAG 608 352 0
TEXT 240 512 Left 0 !.ac lin 1000 1k 200MEG
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4077.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4077.asy)
V2 N001 0 5
R4 N007 N001 1K
R1 N003 0 2K
XU1 N002 N003 N005 N007 N008 N009 N001 N006 N004 N001 0 LTC4077 ;pnba USBin)Iusb)IusbL)_PWR)_CHRG)_EN)HPWR)Idc)BAT)DCin)GND
R5 N008 N001 1K
R3 N006 0 1.24K
R2 N005 0 2K
C1 N004 0 1 Rpar=1K
.tran 1000 startup
.lib LTC4077.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 16 -192 16
WIRE 512 16 -112 16
WIRE -192 32 -192 16
WIRE 80 80 48 80
WIRE 512 80 512 16
WIRE 512 80 368 80
WIRE -192 128 -192 112
WIRE -16 144 -80 144
WIRE 80 144 64 144
WIRE 544 144 368 144
WIRE 544 160 544 144
WIRE -64 208 -80 208
WIRE 80 208 16 208
WIRE 384 208 368 208
WIRE 480 208 464 208
WIRE 544 240 544 224
WIRE -112 272 -112 16
WIRE -16 272 -112 272
WIRE 80 272 64 272
WIRE 512 272 512 80
WIRE 512 272 368 272
WIRE -112 336 -112 272
WIRE -64 336 -112 336
WIRE 80 336 16 336
WIRE 384 336 368 336
WIRE 224 400 224 384
SYMBOL voltage -192 16 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL PowerProducts\\LTC4077 224 208 R0
SYMATTR InstName U1
SYMBOL res 80 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL res 368 192 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1.24K
SYMBOL res 32 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1K
SYMBOL res 32 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2K
SYMBOL cap 528 160 R0
WINDOW 3 41 34 Left 2
WINDOW 39 26 58 Left 2
SYMATTR Value 1
SYMATTR SpiceLine Rpar=1K
SYMATTR InstName C1
SYMBOL res 80 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2K
FLAG 224 400 0
FLAG -80 208 0
FLAG -80 144 0
FLAG 480 208 0
FLAG -192 128 0
FLAG 544 240 0
TEXT 408 360 Left 2 !.tran 1000 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\9c87f38fbbef_quiz3.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 PULSE(0 3.3 0.1p 1p 1p 2p 10p)
V1 Vdd 0 3.3
M2 Vdd N001 out Vdd PMOS l=l w=w
C1 out 0 100p
M1 out N001 0 0 NMOS l=w w=l
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc library.mod
.param w=1u
.param l=0.5u
.tran 20p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 80 288 64
WIRE 368 80 288 80
WIRE 288 96 288 80
WIRE 240 112 240 48
WIRE 240 112 0 112
WIRE 0 144 0 112
WIRE 288 176 288 96
WIRE 240 256 240 112
IOPIN 496 80 In
IOPIN 288 16 In
IOPIN 288 -32 In
SYMBOL voltage 0 128 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3.3 0.1p 1p 1p 2p 10p)
SYMATTR InstName V2
SYMBOL pmos4 240 -32 R0
SYMATTR InstName M2
SYMATTR Value2 l=l w=w
SYMBOL cap 352 80 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL voltage 496 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL nmos4 240 176 R0
SYMATTR InstName M1
SYMATTR Value2 l=w w=l
FLAG 496 80 Vdd
FLAG 288 16 Vdd
FLAG 288 -32 Vdd
FLAG 496 160 0
FLAG 288 224 0
FLAG 0 224 0
FLAG 288 96 out
FLAG 288 272 0
FLAG 368 144 0
TEXT -232 88 Left 2 !.inc library.mod
TEXT -232 136 Left 2 !.param w=1u\n.param l=0.5u
TEXT -232 24 Left 2 !.tran 20p
* Z:\home\khalils\Downloads\files\data\raw_asc\1d6bc1586d24_10_1_opamp_curr.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain = 3
* Change load current with Rload
XU1 N001 N002 Vout opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R1 N001 Vsh- 10k
C1 Vout 0 15p
R5 Vout 0 1Meg
R2 N002 Vsh+ 10k
Rshunt Vsh+ Vsh- 10m
V1 Vsh+ 0 PULSE(0 100 0.5u 10n 10n 5u 10u 10)
R4 N001 Vout 30k
R3 0 N002 30k
Rload Vsh- 0 5
.lib opamp.sub
.tran 0 50u 0 0.1n uic
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1196 680
WIRE 48 -48 -48 -48
WIRE 176 -48 48 -48
WIRE 688 -48 656 -48
WIRE 816 -48 768 -48
WIRE 48 0 48 -48
WIRE 496 48 448 48
WIRE 656 48 656 -48
WIRE 656 48 576 48
WIRE 688 48 656 48
WIRE 816 64 816 -48
WIRE 816 64 752 64
WIRE 864 64 816 64
WIRE 976 64 864 64
WIRE 1056 64 976 64
WIRE 688 80 672 80
WIRE -48 112 -48 -48
WIRE 48 144 48 80
WIRE 176 144 48 144
WIRE 864 144 864 64
WIRE 976 144 976 64
WIRE 496 160 448 160
WIRE 672 160 672 80
WIRE 672 160 576 160
WIRE 48 192 48 144
WIRE 672 192 672 160
WIRE -48 304 -48 192
WIRE 48 304 48 272
WIRE 48 304 -48 304
WIRE 48 336 48 304
SYMBOL res 688 288 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 30k
SYMBOL res 672 -32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 30k
SYMBOL res 592 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 592 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 848 128 R0
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL voltage -48 96 R0
WINDOW 3 -60 -156 VRight 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 100 0.5u 10n 10n 5u 10u 10)
SYMATTR InstName V1
SYMBOL res 32 176 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL OpAmps\\opamp 720 0 R0
SYMATTR InstName U1
SYMBOL res 32 -16 R0
SYMATTR InstName Rshunt
SYMATTR Value 10m
SYMBOL cap 960 144 R0
SYMATTR InstName C1
SYMATTR Value 15p
FLAG 48 336 0
FLAG 176 -48 Vsh+
FLAG 176 144 Vsh-
FLAG 448 160 Vsh+
FLAG 448 48 Vsh-
FLAG 672 272 0
FLAG 864 224 0
FLAG 976 208 0
FLAG 1056 64 Vout
TEXT -56 -120 Left 2 !.lib opamp.sub
TEXT -56 -160 Left 2 !.tran 0 50u 0 0.1n uic
TEXT 864 0 Left 2 ;Gain = 3
TEXT 96 296 Left 2 ;Change load current with Rload
* Z:\home\khalils\Downloads\files\data\raw_asc\0380c1055399_RGB_LED.asc
* Generated by LTspice 26.0.1 for Windows.
* LED: APTF1616LSEEZGKQBKC\nRGB Led\nSimulating current using resistors and Vf from datasheet
Vf_red N001 0 1.8
Red N001 0 330
Vf_blue N003 0 2.65
Vf_green N002 0 2.65
RBlue N003 0 330
RGreen N002 0 330
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 48 32 48
WIRE 400 48 256 48
WIRE 608 48 464 48
WIRE 32 112 32 48
WIRE 256 112 256 48
WIRE 464 112 464 48
WIRE 176 224 176 48
WIRE 400 224 400 48
WIRE 608 224 608 48
WIRE 176 320 176 304
WIRE 400 320 400 304
WIRE 608 320 608 304
SYMBOL res 592 208 R0
SYMATTR InstName Blue
SYMATTR Value 330
SYMBOL voltage 464 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vf_blue
SYMATTR Value 2.65
SYMBOL voltage 256 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vf_green
SYMATTR Value 2.65
SYMBOL res 384 208 R0
SYMATTR InstName Green
SYMATTR Value 330
SYMBOL voltage 32 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vf_red
SYMATTR Value 1.8
SYMBOL res 160 208 R0
SYMATTR InstName Red
SYMATTR Value 330
FLAG 176 320 0
FLAG 32 192 0
FLAG 400 320 0
FLAG 256 192 0
FLAG 608 320 0
FLAG 464 192 0
TEXT 224 384 Left 2 !.tran 1
TEXT 64 -104 Left 2 ;LED: APTF1616LSEEZGKQBKC\nRGB Led\nSimulating current using resistors and Vf from datasheet
* Z:\home\khalils\Downloads\files\data\raw_asc\9728e6ee2128_Signal.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2, XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
V1 N003 0 SINE(0.5 0.5 10) AC 1.6
XU2 N003 N006 +5 0 N004 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
C2 N002 N001 10n
XU1 N005 N002 +5 0 N002 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
XU3 0 N007 +5 0 N007 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R4 0 N006 50k
C1 N005 0 10n
R2 N005 N001 16k
R1 N001 N004 16k
V2 +5 0 5
R3 N004 N006 100k
.tran 1
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 512 -32 320 -32
WIRE 736 -32 576 -32
WIRE 64 16 0 16
WIRE 656 32 608 32
WIRE 0 48 0 16
WIRE 64 48 64 16
WIRE -32 64 -336 64
WIRE 608 64 608 32
WIRE 656 64 656 32
WIRE 96 80 32 80
WIRE 208 80 96 80
WIRE 320 80 320 -32
WIRE 320 80 288 80
WIRE 352 80 320 80
WIRE 496 80 432 80
WIRE 576 80 496 80
WIRE -32 96 -64 96
WIRE 688 96 640 96
WIRE 736 96 736 -32
WIRE 736 96 688 96
WIRE 576 112 544 112
WIRE -336 128 -336 64
WIRE -848 160 -848 112
WIRE 496 160 496 80
WIRE 544 176 544 112
WIRE 688 176 688 96
WIRE 688 176 544 176
WIRE -64 208 -64 96
WIRE -32 208 -64 208
WIRE 96 208 96 80
WIRE 96 208 48 208
WIRE -64 240 -64 208
WIRE -848 304 -848 240
WIRE 496 304 496 224
WIRE -336 352 -336 208
WIRE -64 352 -64 320
WIRE -576 416 -576 400
WIRE -560 416 -576 416
WIRE -448 432 -496 432
WIRE -560 448 -576 448
WIRE -576 512 -576 448
WIRE -448 512 -448 432
WIRE -448 512 -576 512
SYMBOL Opamps\\UniversalOpamp2 0 80 M180
SYMATTR InstName U2
SYMBOL cap 480 160 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap 576 -48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res -48 336 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 50k
SYMBOL voltage -848 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 448 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 16k
SYMBOL res 64 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 304 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 16k
SYMBOL Opamps\\UniversalOpamp2 -528 432 M180
SYMATTR InstName U3
SYMBOL Misc\\signal -336 112 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1.6
SYMATTR InstName V1
SYMATTR Value SINE(0.5 0.5 10)
SYMBOL Opamps\\UniversalOpamp2 608 96 M180
SYMATTR InstName U1
FLAG -848 112 +5
FLAG -848 304 0
FLAG 496 304 0
FLAG 608 128 +5
FLAG 656 64 0
FLAG -64 352 0
FLAG -336 352 0
FLAG 0 112 +5
FLAG 64 48 0
FLAG -528 464 +5
FLAG -528 400 0
FLAG -576 400 0
TEXT -880 344 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\18722dc59f0e_Tline_complesso_gradino.asc
* Generated by LTspice 26.0.1 for Windows.
Rs2 Vin2 N002 10
T2 VJ 0 VL 0 Td=4.5n Z0=75
RL2 VL2 0 200
RL VL 0 200
VG1 N002 0 PULSE(0 5 0 .1ns .1ns 1ns)
T12 Vin2 0 VJ2 0 Td=1n Z0=50
T3 VJ2 0 VL2 0 Td=4.5n Z0=75
Rs Vin N001 10
VG N001 0 PULSE(0 5 0 .1ns 1s)
T1 Vin 0 VJ 0 Td=1.5n Z0=50
.tran 100ns
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1300 692
WIRE 16 128 -64 128
WIRE 192 128 96 128
WIRE 304 128 192 128
WIRE 496 128 400 128
WIRE 592 128 496 128
WIRE 736 128 688 128
WIRE 848 128 736 128
WIRE -64 160 -64 128
WIRE 304 160 272 160
WIRE 432 160 400 160
WIRE 592 160 560 160
WIRE 720 160 688 160
WIRE 272 256 272 160
WIRE 432 256 432 160
WIRE 560 256 560 160
WIRE 720 256 720 160
WIRE 848 256 848 208
WIRE -64 272 -64 240
WIRE 32 464 -48 464
WIRE 208 464 112 464
WIRE 320 464 208 464
WIRE 496 464 416 464
WIRE 592 464 496 464
WIRE 784 464 688 464
WIRE 848 464 784 464
WIRE -48 496 -48 464
WIRE 320 496 288 496
WIRE 448 496 416 496
WIRE 288 592 288 496
WIRE 448 592 448 496
WIRE 592 592 592 496
WIRE 688 592 688 496
WIRE 848 592 848 544
WIRE -48 608 -48 576
SYMBOL res 112 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rs
SYMATTR Value 10
SYMBOL res 128 448 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rs2
SYMATTR Value 10
SYMBOL voltage -48 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -8 196 Left 2
SYMATTR Value PULSE(0 5 0 .1ns .1ns 1ns)
SYMATTR InstName VG1
SYMBOL res 832 448 R0
SYMATTR InstName RL2
SYMATTR Value 200
SYMBOL voltage -64 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -8 196 Left 2
SYMATTR Value PULSE(0 5 0 .1ns 1s)
SYMATTR InstName VG
SYMBOL tline 352 144 R0
SYMATTR InstName T1
SYMATTR Value Td=1.5n Z0=50
SYMBOL tline 640 144 R0
SYMATTR InstName T2
SYMATTR Value Td=4.5n Z0=75
SYMBOL tline 368 480 R0
SYMATTR InstName T12
SYMATTR Value Td=1n Z0=50
SYMBOL res 832 112 R0
SYMATTR InstName RL
SYMATTR Value 200
SYMBOL tline 640 480 R0
SYMATTR InstName T3
SYMATTR Value Td=4.5n Z0=75
FLAG -64 272 0
FLAG 272 256 0
FLAG 432 256 0
FLAG 192 128 Vin
FLAG 496 128 VJ
FLAG -48 608 0
FLAG 288 592 0
FLAG 448 592 0
FLAG 208 464 Vin2
FLAG 848 256 0
FLAG 848 592 0
FLAG 560 256 0
FLAG 720 256 0
FLAG 736 128 VL
FLAG 688 592 0
FLAG 592 592 0
FLAG 784 464 VL2
FLAG 496 464 VJ2
TEXT -72 312 Left 2 !.tran 100ns
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7118-4.5.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N001 0 4.7n
V1 IN 0 5.5
Rload OUT 0 30
C1 OUT 0 2.2 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=4.5 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 6m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7118-4.5.asy)
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 30
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADP7118-4.5 224 128 R0
SYMATTR InstName U1
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\tmp\asc_dec_bjh7r6w2\16aacc87b93e_op_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N006 N004 1N750
R2 N005 +5 {RR}
R7 N005 0 {R}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2340 680
WIRE 640 -416 544 -416
WIRE 352 -320 160 -320
WIRE 464 -320 464 -416
WIRE 464 -320 432 -320
WIRE 544 -304 544 -320
WIRE 464 -288 464 -320
WIRE 512 -288 464 -288
WIRE 640 -272 640 -416
WIRE 640 -272 576 -272
WIRE 672 -272 640 -272
WIRE 800 -272 752 -272
WIRE 880 -272 800 -272
WIRE 512 -256 464 -256
WIRE 352 -224 320 -224
WIRE 464 -224 464 -256
WIRE 464 -224 432 -224
WIRE 544 -208 544 -240
WIRE 464 -144 464 -224
WIRE 464 0 464 -64
WIRE 800 0 800 -208
SYMBOL zener 816 -208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N750
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 448 -240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {RR}
SYMBOL res 448 -160 R0
SYMATTR InstName R7
SYMATTR Value {R}
FLAG 464 0 0
FLAG 544 -208 0
FLAG 544 -320 +12
FLAG 320 -224 +5
FLAG 880 -256 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2118-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2118-3.3.asy)
Rload1 OUT 0 1.1
V1 IN 0 5
C1 OUT 0 100
L1 N002 OUT 1
R1 OUT N001 100K
XU1 IN IN IN OUT 0 0 N002 IN IN IN N001 ADP2118-x.x Rtop=818.2k Rbot=181.8k Ctop=4p ;pnba Sync/Mode)FREQ)TRK)FB)GND)PGND)SW)Pvin)Vin)EN)Pgood
.tran 2m startup
.lib ADP2118-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1104 680
WIRE 128 0 48 0
WIRE 288 0 128 0
WIRE 48 16 48 0
WIRE 288 32 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 640 64 576 64
WIRE 48 112 48 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 640 144 640 64
WIRE 640 144 560 144
WIRE 704 144 640 144
WIRE 560 160 560 144
WIRE 704 160 704 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 560 256 560 224
WIRE 704 256 704 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 640 304 640 144
WIRE 640 304 416 304
WIRE 128 384 128 304
WIRE 160 384 128 384
WIRE 288 432 288 416
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 100
SYMBOL ADP2118-3.3 288 272 R0
SYMATTR InstName U1
SYMBOL res 688 144 R0
SYMATTR InstName Rload1
SYMATTR Value 1.1
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL voltage 48 0 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
FLAG 560 256 0
FLAG 288 432 0
FLAG 48 112 0
FLAG 704 144 OUT
FLAG 704 256 0
FLAG 48 0 IN
TEXT 488 400 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\a5f16642825a_mnbp.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N001 N002 Vout opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
V1 Vref 0 5
R2 N002 Vref 47k
Rg N001 Vin 11k
R1 N002 0 3.357k
Vin Vin 0 0
Rf Vout N001 22k
.dc Vin -1 1 0.01
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 800
WIRE 16 64 -80 64
WIRE 128 64 96 64
WIRE 176 64 128 64
WIRE 320 64 256 64
WIRE 128 160 128 64
WIRE 176 160 128 160
WIRE 320 176 320 64
WIRE 320 176 240 176
WIRE 416 176 320 176
WIRE 16 192 -80 192
WIRE 128 192 96 192
WIRE 176 192 128 192
WIRE 128 208 128 192
WIRE 128 320 128 288
WIRE 64 544 64 512
WIRE 160 544 160 512
WIRE 64 656 64 624
WIRE 160 656 160 624
SYMBOL Opamps\\opamp 208 112 R0
SYMATTR InstName U1
SYMBOL res 112 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 47k
SYMBOL voltage 64 528 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 112 192 R0
SYMATTR InstName R1
SYMATTR Value 3.357k
SYMBOL res 112 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rg
SYMATTR Value 11k
SYMBOL res 272 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rf
SYMATTR Value 22k
SYMBOL voltage 160 528 R0
SYMATTR InstName Vin
SYMATTR Value 0
FLAG 64 512 Vref
FLAG 64 656 0
FLAG 160 656 0
FLAG -80 64 Vin
FLAG 416 176 Vout
FLAG 160 512 Vin
FLAG 128 320 0
FLAG -80 192 Vref
TEXT 32 784 Left 2 !.dc Vin -1 1 0.01
TEXT 32 752 Left 2 !.lib opamp.sub
* Z:\tmp\asc_dec_bjh7r6w2\07e3932f7d56_Draft3_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 12
R2 N003 0 10000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1072 680
WIRE 256 64 80 64
WIRE 288 64 256 64
WIRE 432 64 368 64
WIRE 432 96 432 64
WIRE 80 144 80 64
WIRE 256 144 256 64
WIRE 256 272 256 224
WIRE 256 272 192 272
WIRE 80 352 80 224
WIRE 144 352 80 352
WIRE 256 368 192 368
WIRE 80 416 80 352
WIRE 256 416 256 368
WIRE 80 544 80 496
WIRE 256 544 256 496
WIRE 256 544 80 544
WIRE 256 576 256 544
SYMBOL voltage 272 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 64 400 R0
SYMATTR InstName R2
SYMATTR Value 10000
FLAG 432 96 0
FLAG 256 576 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3246.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3246.asy)
C3 N003 0 10
R1 OUT 0 10
C1 N001 N002 2.2
C4 N004 0 1n
XU1 MP_01 N004 NC_02 N003 IN IN 0 MP_03 MP_04 MP_05 N001 OUT N002 NC_06 0 OUT LTC3246 ;pnba )RT)RSTI)Bias)SEL2)Vin)SEL1))))C+)Vout)C-)RST)GND)OUTS/ADJ
V1 IN 0 12
C2 OUT 0 10
.tran 500u startup
.lib LTC3246.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 -32 176 -32
WIRE 272 -32 256 -32
WIRE 176 16 176 -32
WIRE 272 16 272 -32
WIRE -32 80 -128 80
WIRE 96 80 -32 80
WIRE 384 80 352 80
WIRE 448 80 384 80
WIRE 544 80 448 80
WIRE -128 96 -128 80
WIRE 448 96 448 80
WIRE 544 96 544 80
WIRE 16 176 0 176
WIRE 96 176 80 176
WIRE 384 176 384 80
WIRE 384 176 352 176
WIRE -128 192 -128 176
WIRE 448 192 448 160
WIRE 544 192 544 176
WIRE 16 272 0 272
WIRE 96 272 80 272
WIRE 96 368 64 368
WIRE -32 464 -32 80
WIRE 96 464 -32 464
WIRE 368 464 352 464
SYMBOL cap 432 96 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL cap 192 -16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL PowerProducts\\LTC3246 224 272 R0
SYMATTR InstName U1
SYMATTR Description Wide Vin Range Buck-Boost Charge Pump \n\n Watchdog timer not modeled
SYMBOL cap 80 256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1n
SYMBOL voltage -128 80 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 528 80 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL cap 80 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 10
FLAG -128 192 0
FLAG -128 80 IN
FLAG 448 192 0
FLAG 544 192 0
FLAG 368 464 0
FLAG 64 368 0
FLAG 0 176 0
FLAG 0 272 0
FLAG 544 80 OUT
TEXT 440 392 Left 2 !.tran 500u startup