Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3021-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3021-1.5.asy)
V1 N001 0 PWL(0 0 1 10)
XU1 MP_01 MP_02 OUT MP_03 MP_04 MP_05 OUT MP_06 N001 0 MP_07 N001 LT3021-1.5 ;pnba ))OUT))))SENSE))_SHDN)GND))IN
C1 OUT 0 3.3
Rload OUT 0 100
.tran 1
.lib LT3021.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 160 -176 160
WIRE 16 160 0 160
WIRE 352 160 304 160
WIRE 464 160 352 160
WIRE 560 160 464 160
WIRE 464 176 464 160
WIRE 560 176 560 160
WIRE -176 192 -176 160
WIRE 0 256 0 160
WIRE 16 256 0 256
WIRE 352 256 352 160
WIRE 352 256 304 256
WIRE 464 272 464 240
WIRE 560 272 560 256
WIRE -176 288 -176 272
WIRE 160 336 160 320
SYMBOL res 544 160 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 448 176 R0
SYMATTR InstName C1
SYMATTR Value 3.3
SYMBOL voltage -176 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL PowerProducts\\LT3021-1.5 160 192 R0
SYMATTR InstName U1
FLAG 160 336 0
FLAG 464 272 0
FLAG 560 272 0
FLAG -176 288 0
FLAG 560 160 OUT
TEXT 480 352 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\1065aefe923a_MUXinputs.asc
* Generated by LTspice 26.0.1 for Windows.
V2 A 0 PULSE(0 5 0 10n 10n 0.25m 0.5m)
V3 Sel 0 PULSE(0 5 0 1n 1n 5m 10m)
V1 B 0 PULSE(0 5 0 10n 10n 1.5m 4m)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1.1
SHEET 1 956 680
WIRE 304 -48 192 -48
WIRE 96 0 -48 0
WIRE 192 0 192 -48
WIRE -48 48 -48 0
WIRE 560 160 192 160
WIRE 192 208 192 160
IOPIN 96 0 Out
IOPIN 304 -48 Out
IOPIN 560 160 Out
SYMBOL voltage 192 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 10n 10n 1.5m 4m)
SYMBOL voltage -48 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 1n 1n 5m 10m)
SYMBOL voltage 192 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 10n 10n 0.25m 0.5m)
FLAG -48 128 0
FLAG 192 80 0
FLAG 192 288 0
FLAG 96 0 Sel
FLAG 304 -48 A
FLAG 560 160 B
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX14575AL.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX14575AL.asy)
XU1 IN N005 0 N003 N002 OUT MAX14575AL ;pnba IN)SETI)GND)_FLAG)_EN)OUT
R2 N006 0 348
S1 0 OUT N001 0 SHORT
V2 N002 0 0
R3 N004 N003 20K
V4 N001 0 PULSE(0 1 10m 1m 1m 30m)
V1 IN 0 5
R1 N005 N006 52.3K
V3 N004 0 5
C1 OUT 0 150
.model SHORT SW(Ron=0.05 Roff=1K Vt=.5 Vh=-.4)
.tran 50m startup
.lib MAX14575AL.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1800 680
WIRE -16 -352 -224 -352
WIRE 400 -352 272 -352
WIRE 512 -352 400 -352
WIRE 672 -352 560 -352
WIRE -224 -336 -224 -352
WIRE 400 -336 400 -352
WIRE 512 -336 512 -352
WIRE 672 -336 672 -352
WIRE 560 -320 560 -352
WIRE -224 -240 -224 -256
WIRE 400 -240 400 -272
WIRE 512 -240 512 -256
WIRE 672 -240 672 -256
WIRE -16 -160 -224 -160
WIRE 384 -160 272 -160
WIRE 576 -160 464 -160
WIRE -224 -144 -224 -160
WIRE 576 -128 576 -160
WIRE -16 -64 -128 -64
WIRE 336 -64 272 -64
WIRE -224 -48 -224 -64
WIRE -128 -48 -128 -64
WIRE 336 -32 336 -64
WIRE 576 -32 576 -48
WIRE -128 48 -128 32
WIRE -128 144 -128 128
SYMBOL cap 384 -336 R0
SYMATTR InstName C1
SYMATTR Value 150
SYMBOL voltage 576 -144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL MAX14575AL 128 -208 R0
SYMATTR InstName U1
SYMBOL voltage -224 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -144 32 R0
SYMATTR InstName R2
SYMATTR Value 348
SYMBOL sw 512 -240 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL voltage 672 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 1 10m 1m 1m 30m)
SYMBOL res 480 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL voltage -224 -160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL res -144 -64 R0
SYMATTR InstName R1
SYMATTR Value 52.3K
FLAG -224 -240 0
FLAG 400 -240 0
FLAG 512 -352 OUT
FLAG -224 -352 IN
FLAG 512 -240 0
FLAG 560 -272 0
FLAG 672 -240 0
FLAG -128 144 0
FLAG 576 -32 0
FLAG -224 -48 0
FLAG 336 -32 0
TEXT 480 144 Left 2 !.model SHORT SW(Ron=0.05 Roff=1K Vt=.5 Vh=-.4)
TEXT 480 184 Left 2 !.tran 50m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1461-4.096.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1461-4.096.asy)
V1 N001 0 6.6
C1 N002 0 2
I1 N002 0 PULSE(0 10m 1.5m 10n 10n 2m 200m)
XU1 0 N001 N001 N002 LT1461-4.096 ;pnba GND)IN)_SHDN)OUT
.tran 7m
.lib LT1461.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1376 680
WIRE 112 112 0 112
WIRE 144 112 112 112
WIRE 512 112 432 112
WIRE 672 112 512 112
WIRE 0 128 0 112
WIRE 512 128 512 112
WIRE 672 128 672 112
WIRE 112 176 112 112
WIRE 144 176 112 176
WIRE 0 224 0 208
WIRE 512 224 512 192
WIRE 672 224 672 208
WIRE 288 240 288 208
SYMBOL cap 496 128 R0
WINDOW 123 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 2
SYMBOL LT1461-4.096 288 144 R0
SYMATTR InstName U1
SYMBOL current 672 128 R0
WINDOW 123 24 122 Left 2
WINDOW 39 24 101 Left 2
SYMATTR Value PULSE(0 10m 1.5m 10n 10n 2m 200m)
SYMATTR InstName I1
SYMBOL voltage 0 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 6.6
FLAG 0 224 0
FLAG 288 240 0
FLAG 672 224 0
FLAG 512 224 0
TEXT 736 280 Left 2 !.tran 7m
* Z:\home\khalils\Downloads\files\data\raw_asc\3ebc97d4b157_current.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
R2 OUT N001 100k
R3 N003 IN 10k
XU1 N003 N001 N002 0 OUT LT1001 ;pnba In+)In-)V+)V-)OUT
R5 OUT N004 1k
I1 0 IN PULSE(0 1 0 10)
R4 0 N003 100k
R6 N004 0 1k
R7 0 IN 1R
V2 N002 0 12V
R1 N001 0 10k
.tran 0 10 0 .01
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 964 680
WIRE -96 16 -160 16
WIRE -32 16 -96 16
WIRE 352 48 304 48
WIRE 480 48 432 48
WIRE -96 96 -96 16
WIRE 528 96 384 96
WIRE -32 112 -32 16
WIRE 160 112 -32 112
WIRE 304 112 304 48
WIRE 304 112 240 112
WIRE -160 128 -160 16
WIRE 384 128 384 96
WIRE -32 144 -32 112
WIRE 304 144 304 112
WIRE 352 144 304 144
WIRE 480 160 480 48
WIRE 480 160 416 160
WIRE 608 160 480 160
WIRE 640 160 608 160
WIRE 352 176 304 176
WIRE 640 192 640 160
WIRE -32 240 -32 224
WIRE -32 256 -32 240
WIRE 160 256 -32 256
WIRE 304 256 304 176
WIRE 304 256 240 256
WIRE 304 272 304 256
WIRE -160 304 -160 208
WIRE -32 304 -32 256
WIRE -32 304 -160 304
WIRE 528 304 528 96
WIRE 640 304 640 272
WIRE 384 416 384 192
WIRE 416 416 384 416
WIRE 528 416 528 384
WIRE 528 416 416 416
WIRE 304 432 304 352
WIRE 416 432 416 416
WIRE 640 432 640 384
SYMBOL res -48 128 R0
SYMATTR InstName R7
SYMATTR Value 1R
SYMBOL res 624 176 R0
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL res 256 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 320 368 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 -48 59 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 528 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12V
SYMBOL current -160 128 R0
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value PULSE(0 1 0 10)
SYMBOL Opamps\\LT1001 384 96 R0
SYMATTR InstName U1
SYMBOL res 624 288 R0
SYMATTR InstName R6
SYMATTR Value 1k
SYMBOL res 448 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
FLAG -96 96 0
FLAG 416 432 0
FLAG 608 160 OUT
FLAG 304 432 0
FLAG 640 432 0
FLAG -32 240 IN
TEXT -184 328 Left 2 !.tran 0 10 0 .01
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4601.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4601.asy)
C1 OUT N004 100p
XU1 IN 0 OUT 0 N006 N006 OUT 0 N002 N004 N007 N012 N010 N009 N008 N005 N003 N011 N001 N007 LTM4601 ;pnba Vin)PGND)Vout)Vosns-)Vout_LCL)DiffVout)Vosns+)SGND)Pgood)FB)DRVcc)MARG1)MARG0)Fset)MPGM)Comp)Run)Track/SS)PLLIN)INTVcc
V1 IN 0 6
Rload OUT 0 .25
R2 N008 0 392K
C3 N011 0 .001
C2 OUT 0 100
R4 IN N003 100K
R3 IN N002 100K
R1 N004 0 40.2K
.tran 750u startup
.lib LTM4601.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1032 680
WIRE -160 -16 -256 -16
WIRE 128 -16 -160 -16
WIRE -256 0 -256 -16
WIRE 128 0 128 -16
WIRE 272 0 272 -16
WIRE -160 48 -160 -16
WIRE -144 48 -160 48
WIRE 16 48 -64 48
WIRE 432 48 400 48
WIRE 576 48 432 48
WIRE 656 48 576 48
WIRE 576 64 576 48
WIRE -256 96 -256 80
WIRE -160 112 -160 48
WIRE -80 112 -160 112
WIRE 16 112 0 112
WIRE 432 112 400 112
WIRE 496 112 432 112
WIRE 496 128 496 112
WIRE 576 144 576 128
WIRE 16 176 0 176
WIRE 432 176 400 176
WIRE 496 224 496 208
WIRE 16 240 0 240
WIRE 432 240 432 176
WIRE 432 240 400 240
WIRE 656 272 656 48
WIRE 656 272 592 272
WIRE 704 272 656 272
WIRE 704 288 704 272
WIRE 0 304 0 240
WIRE 16 304 0 304
WIRE 592 304 592 272
WIRE 592 304 400 304
WIRE -80 368 -96 368
WIRE 16 368 0 368
WIRE 592 368 400 368
WIRE 592 384 592 368
WIRE 704 384 704 368
WIRE 704 384 592 384
WIRE 704 400 704 384
WIRE 16 432 0 432
WIRE 416 432 400 432
WIRE -64 496 -80 496
WIRE 16 496 0 496
WIRE 416 496 400 496
WIRE 128 576 128 560
WIRE 288 576 288 560
SYMBOL cap 560 64 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMBOL res -160 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 416 48 R0
WINDOW 0 34 18 Left 2
WINDOW 3 35 47 Left 2
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL cap 0 480 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL res 688 272 R0
SYMATTR InstName Rload
SYMATTR Value .25
SYMBOL voltage -256 -16 R0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL res 16 384 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 392K
SYMBOL PowerProducts\\LTM4601 208 256 R0
SYMATTR InstName U1
SYMBOL res 480 112 R0
SYMATTR InstName R1
SYMATTR Value 40.2K
SYMBOL res -96 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 100K
FLAG 128 576 0
FLAG 288 576 0
FLAG 496 224 0
FLAG -96 368 0
FLAG 576 144 0
FLAG 704 400 0
FLAG -256 96 0
FLAG -80 496 0
FLAG 704 272 OUT
FLAG -256 -16 IN
TEXT 472 496 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\faa99329a21d_TransmissionLineInverter.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax. The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors. A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements. One for the normal(differential) mode and\nthe other for the common mode. Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world. These modes\nwith have different propagation speeds and impedances. If both modes\nare modeled, then you can simulate a transmission line inverter.
V1 N001 0 PULSE(0 1 0 1n 1n 10n) Rser=50
T2 0 0 N002 0 Td=30n Z0=150
T1 N001 0 0 N002 Td=50n Z0=50
.tran 0 500n 0 1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 680
WIRE 128 192 -368 192
WIRE 320 192 224 192
WIRE 128 224 64 224
WIRE 288 224 224 224
WIRE -368 240 -368 192
WIRE 64 272 64 224
WIRE 64 272 -16 272
WIRE 288 272 288 224
WIRE 384 272 288 272
WIRE 64 304 64 272
WIRE 128 304 64 304
WIRE 288 304 288 272
WIRE 288 304 224 304
WIRE 128 336 64 336
WIRE 288 336 224 336
WIRE -368 368 -368 320
WIRE -16 368 -16 272
WIRE 64 368 64 336
WIRE 288 368 288 336
SYMBOL voltage -368 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 132 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1n 1n 10n)
SYMBOL tline 176 208 R0
WINDOW 0 2 -19 Bottom 2
WINDOW 3 3 20 Top 2
SYMATTR InstName T1
SYMBOL tline 176 320 R0
WINDOW 0 -1 -21 Bottom 2
WINDOW 3 0 21 Top 2
SYMATTR InstName T2
SYMATTR Value Td=30n Z0=150
FLAG 64 368 0
FLAG 288 368 0
FLAG -368 368 0
FLAG -16 368 0
FLAG 320 192 0
TEXT 264 416 Left 2 !.tran 0 500n 0 1n
TEXT 0 440 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT -376 -200 Left 2 ;This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax.  The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors.  A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements.  One for the normal(differential) mode and\nthe other for the common mode.  Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world.  These modes\nwith have different propagation speeds and impedances.  If both modes\nare modeled, then you can simulate a transmission line inverter.
* Z:\home\khalils\Downloads\files\data\raw_asc\93eba0ce79c3_Module_3.asc
* Generated by LTspice 26.0.1 for Windows.
* Output
* Output Control
* Module 3
* I/O pins
* - 2 Power Input
* - 4 Power Output
* Data Output
* - 1 Data Output
* NOTE :- 1 ohm is big resistance so need to decrease it
* NOTE :- We actually don't need separate mosfet?Think about it
* charging control
* Charging
* NOTE :- How to read input charging current
* NOTE :- Charging mosfet is not turning off
* (because of flyback diode)
Rshunt_resistor N007 0 1
V1 N008 0 4.2
M1 N002 N004 N007 N007 NMOS
V3 N001 N006 4.2
M2 N003 N005 0 0 NMOS
V2 N006 N008 4.2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1388 680
WIRE 736 -544 224 -544
WIRE 1152 -544 736 -544
WIRE 736 -480 736 -544
WIRE 864 -480 736 -480
WIRE 1152 -480 1152 -544
WIRE 1296 -480 1152 -480
WIRE 864 -384 736 -384
WIRE 1296 -384 1152 -384
WIRE 224 -304 224 -544
WIRE 736 -112 736 -384
WIRE 1152 -112 1152 -384
WIRE 528 -32 528 -80
WIRE 688 -32 528 -32
WIRE 944 -32 944 -80
WIRE 1104 -32 944 -32
WIRE 224 0 224 -224
WIRE 544 128 544 80
WIRE 736 128 736 -16
WIRE 736 128 544 128
WIRE 736 224 736 128
WIRE 224 256 224 80
WIRE 224 544 224 336
WIRE 496 544 224 544
WIRE 736 544 736 304
WIRE 736 544 496 544
WIRE 1152 544 1152 -16
WIRE 1152 544 736 544
WIRE 496 592 496 544
SYMBOL nmos 688 -112 R0
SYMATTR InstName M1
SYMBOL voltage 224 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 4.2
SYMBOL nmos 1104 -112 R0
SYMATTR InstName M2
SYMBOL voltage 224 -320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 4.2
SYMBOL voltage 224 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.2
SYMBOL res 720 208 R0
SYMATTR InstName shunt_resistor
SYMATTR Value 1
FLAG 496 592 0
TEXT 792 -432 Left 2 ;Output
TEXT 440 -112 Left 2 ;Output Control
TEXT 648 -680 Left 4 ;Module 3
TEXT -288 -472 Left 3 ;I/O pins
TEXT -304 -352 Left 2 ;- 2 Power Input
TEXT -304 -296 Left 2 ;- 4 Power Output
TEXT 464 64 Left 2 ;Data Output
TEXT -304 -232 Left 2 ;- 1 Data Output
TEXT -640 -24 Left 2 ;NOTE :- 1 ohm is big resistance so need to decrease it
TEXT -640 16 Left 2 ;NOTE :- We actually don't need separate mosfet?Think about it
TEXT 872 -120 Left 2 ;charging control
TEXT 1240 -432 Left 2 ;Charging
TEXT -640 56 Left 2 ;NOTE :- How to read input charging current
TEXT -640 96 Left 2 ;NOTE :- Charging mosfet is not turning off
TEXT -512 128 Left 2 ;(because of flyback diode)
* Z:\home\khalils\Downloads\files\data\raw_asc\1422f4c9158b_101_lec_exercise_diode_einweg.asc
* Generated by LTspice 26.0.1 for Windows.
* Steckernetzteil
V1 N001 0 SINE(0 325 50)
R2 N005 0 1200
Ls N003 0 {Ls}
C1 N005 0 {C}
Ri N004 N003 7.2
Lp N002 0 {Lp}
R1 N002 N001 1e-12
D1 N004 N005 1N4001
K Lp Ls 1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.parameter Lp=100u
.parameter Ls=0.1531190926275993u
.tran 0 100m 60m
.param C = 100e-6
.model 1N4001 D(Is=14.11n N=1.984 Rs=33.89m Ikf=94.81 Xti=3 Eg=1.11 Cjo=25.89p M=.44 Vj=.3245 Fc=.5 Bv=75 Ibv=10u Tt=5.7u Iave=1 Vpk=50 mfg=GI type=silicon)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2120 680
WIRE -48 48 -96 48
WIRE 112 48 32 48
WIRE 288 48 272 48
WIRE 416 48 368 48
WIRE 512 48 480 48
WIRE 608 48 512 48
WIRE -96 64 -96 48
WIRE 112 80 112 48
WIRE 272 80 272 48
WIRE 512 80 512 48
WIRE 608 80 608 48
WIRE -96 192 -96 144
WIRE 112 192 112 160
WIRE 112 192 -96 192
WIRE 272 192 272 160
WIRE 448 192 272 192
WIRE 512 192 512 144
WIRE 512 192 448 192
WIRE 608 192 608 160
WIRE 608 192 512 192
WIRE -96 208 -96 192
WIRE 448 208 448 192
RECTANGLE Normal 368 240 80 0 2
SYMBOL res 48 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1e-12
SYMBOL voltage -96 48 R0
WINDOW 0 8 103 Left 2
WINDOW 3 -54 144 VLeft 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 325 50)
SYMBOL ind2 256 64 R0
SYMATTR InstName Ls
SYMATTR Value {Ls}
SYMATTR Type ind
SYMBOL diode 416 64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4001
SYMBOL res 592 64 R0
SYMATTR InstName R2
SYMATTR Value 1200
SYMBOL cap 496 80 R0
SYMATTR InstName C1
SYMATTR Value {C}
SYMBOL res 384 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Ri
SYMATTR Value 7.2
SYMBOL ind2 96 64 R0
SYMATTR InstName Lp
SYMATTR Value {Lp}
SYMATTR Type ind
FLAG -96 208 0
FLAG 448 208 0
TEXT 136 24 Left 2 !K Lp Ls 1
TEXT 80 -24 Left 2 ;Steckernetzteil
TEXT 80 288 Left 2 !.parameter Lp=100u
TEXT 80 320 Left 2 !.parameter Ls=0.1531190926275993u
TEXT -152 320 Left 2 !.tran 0 100m 60m
TEXT 80 352 Left 2 !.param C = 100e-6
TEXT 80 384 Left 2 !.model 1N4001 D(Is=14.11n N=1.984 Rs=33.89m Ikf=94.81 Xti=3 Eg=1.11 Cjo=25.89p M=.44 Vj=.3245 Fc=.5 Bv=75 Ibv=10u Tt=5.7u Iave=1 Vpk=50 mfg=GI type=silicon)
* Z:\home\khalils\Downloads\files\data\raw_asc\274e86a78c95_NOR2.asc
* Generated by LTspice 26.0.1 for Windows.
M4 N001 N002 P001 N001 PMOS l=2 w=10
M1 Y N003 0 0 NMOS l=2 w=10
V1 N001 0 5
M3 Y N002 0 0 NMOS l=2 w=10
M2 P001 N003 Y N001 PMOS l=2 w=10
V2 N002 0 PULSE(0 5 0 10us 10us 1ms 2ms)
V3 N003 0 PULSE(0 5 0 10us 10us 2ms 4ms)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 4ms 10us
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE -64 -192 -144 -192
WIRE -16 -192 -64 -192
WIRE 96 -192 -16 -192
WIRE -16 -144 -16 -192
WIRE 96 -144 -16 -144
WIRE 416 -112 144 -112
WIRE -64 -48 -64 -192
WIRE 96 -48 -64 -48
WIRE 48 -16 -64 -16
WIRE -64 0 -64 -16
WIRE -64 0 -176 0
WIRE 416 0 416 -112
WIRE 464 0 416 0
WIRE 96 16 96 0
WIRE 144 16 96 16
WIRE -176 32 -176 0
WIRE 96 48 96 16
WIRE 96 48 80 48
WIRE 288 48 96 48
WIRE -64 128 -64 0
WIRE 32 128 -64 128
WIRE 416 128 416 0
WIRE 416 128 336 128
WIRE 176 144 80 144
WIRE 288 144 176 144
WIRE 176 160 176 144
SYMBOL voltage -176 16 R0
WINDOW 3 -139 158 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 5 0 10us 10us 2ms 4ms)
SYMATTR InstName V3
SYMBOL pmos4 48 -96 R0
SYMATTR InstName M2
SYMATTR Value2 l=2 w=10
SYMBOL voltage 464 -16 R0
WINDOW 3 -123 171 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 5 0 10us 10us 1ms 2ms)
SYMATTR InstName V2
SYMBOL pmos4 144 -192 M0
SYMATTR InstName M4
SYMATTR Value2 l=2 w=10
SYMBOL voltage -144 -208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -64 51 Left 2
WINDOW 3 35 62 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL nmos4 336 48 M0
SYMATTR InstName M3
SYMATTR Value2 l=2 w=10
SYMBOL nmos4 32 48 R0
SYMATTR InstName M1
SYMATTR Value2 l=2 w=10
FLAG 80 96 0
FLAG 288 96 0
FLAG -144 -112 0
FLAG 464 80 0
FLAG -176 112 0
FLAG 176 160 0
FLAG 144 16 Y
TEXT 320 -160 Left 2 !.tran 0 4ms 10us
* Z:\home\khalils\Downloads\files\data\raw_asc\f816bd54dbf5_MosfetCharacteristic.asc
* Generated by LTspice 26.0.1 for Windows.
VDS N001 0 0V
M1 N001 N002 0 0 nmos_enchancement_mosfet L=10u W=400u
VGS N002 0 3V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model nmos_enchancement_mosfet nmos (kp=20u Vto=+2V lambda={lambda_variable})
.STEP param lambda_variable 0 0.05 0.01; * vary lambda_variable from 0 to 0.05 in increments of 0.01
.DC VDS 0V 10V 100mV
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 960 680
WIRE 640 -48 272 -48
WIRE 272 96 272 -48
WIRE 640 128 640 -48
WIRE 224 176 -16 176
WIRE -16 224 -16 176
WIRE -16 368 -16 304
WIRE 272 368 272 192
WIRE 272 368 -16 368
WIRE 640 368 640 208
WIRE 640 368 272 368
WIRE 272 448 272 368
SYMBOL voltage 640 112 R0
SYMATTR InstName VDS
SYMATTR Value 0V
SYMBOL nmos 224 96 R0
SYMATTR InstName M1
SYMATTR Value nmos_enchancement_mosfet L=10u W=400u
SYMBOL voltage -16 208 R0
SYMATTR InstName VGS
SYMATTR Value 3V
FLAG 272 448 0
TEXT -240 528 Left 2 !.model nmos_enchancement_mosfet nmos (kp=20u Vto=+2V lambda={lambda_variable})\n.STEP param lambda_variable 0 0.05 0.01; * vary lambda_variable from 0 to 0.05 in increments of 0.01\n.DC VDS 0V 10V 100mV
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1042.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
R1 N001 N004 100K
C1 N004 0 .001
V2 N005 0 PULSE(0 5 0 5m 5m 0 10m)
XU1 N002 N003 N005 0 N007 N006 N004 N001 LTC1042 ;pnba Within)Center)In)GND)Width/2)Above)OSC)Vcc
R2 N003 N007 90K
R3 N001 N003 100K
R4 N007 0 10K
.tran 10m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1042.asy)
.lib LTC1042.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2748 2324
WIRE 2416 1728 2016 1728
WIRE 2464 1728 2416 1728
WIRE 2608 1728 2464 1728
WIRE 2016 1760 2016 1728
WIRE 2464 1760 2464 1728
WIRE 2608 1760 2608 1728
WIRE 2144 1792 2112 1792
WIRE 2416 1792 2416 1728
WIRE 2416 1792 2400 1792
WIRE 2016 1856 2016 1840
WIRE 2144 1856 2016 1856
WIRE 2464 1856 2464 1840
WIRE 2464 1856 2400 1856
WIRE 2608 1856 2608 1840
WIRE 2464 1872 2464 1856
WIRE 2144 1920 1632 1920
WIRE 2416 1920 2400 1920
WIRE 1632 1936 1632 1920
WIRE 2016 1952 2016 1856
WIRE 2464 1952 2464 1936
WIRE 2144 1984 2112 1984
WIRE 2416 1984 2400 1984
WIRE 1632 2032 1632 2016
WIRE 2016 2048 2016 2032
WIRE 2416 2048 2416 1984
WIRE 2416 2048 2016 2048
WIRE 2016 2064 2016 2048
WIRE 2016 2160 2016 2144
FLAG 2464 1952 0
FLAG 2608 1856 0
FLAG 2112 1984 0
FLAG 1632 2032 0
FLAG 2016 2160 0
SYMBOL VOLTAGE 2608 1744 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 2448 1744 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 2448 1872 R0
SYMATTR InstName C1
SYMATTR Value .001
SYMBOL voltage 1632 1920 R0
WINDOW 0 37 38 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 5m 5m 0 10m)
SYMBOL Comparators\\LTC1042 2272 1888 R0
SYMATTR InstName U1
SYMBOL RES 2000 1936 R0
SYMATTR InstName R2
SYMATTR Value 90K
SYMBOL RES 2000 1744 R0
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL RES 2000 2048 R0
SYMATTR InstName R4
SYMATTR Value 10K
TEXT 2232 2136 Left 2 !.tran  10m