* Z:\home\khalils\Downloads\files\data\raw_asc\22daa4ee21f3_Lab06Pt2.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 CLK N002 N001 PMOS l=0.1u w=8u
C4 0 B0 200f
M5 B0 CLK 0 0 NMOS l=0.1u w=6u
M3 N002 A A0 0 NMOS l=0.1u w=6u
C1 N002 0 150f
M4 A0 B B0 0 NMOS l=0.1u w=6u
V1 A 0 PULSE(0 1.2 75u 100n 100n 50u 200u 2)
C3 0 A0 200f
C2 0 F 1n
Vdd N001 0 1.2
M6 F N002 0 0 NMOS l=0.1u w=0.1u
VCLK CLK 0 PULSE(0 1.2 50u 100n 100n 50u 100u 4)
V2 B 0 PULSE(0 1.2 275u 100n 100n 200u 400u 1)
M2 N001 N002 F N001 PMOS l=0.1u w=0.4u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model nmos nmos level=1 vto=0.4 kp=432u phi=0.88 gamma=0.2 lambda=0
.model pmos pmos level=1 vto=-0.4 kp=108u phi=0.88 gamma=0.2 lambda=0
.tran 0 400u 0 0.1u
.ic V(A0) = 0 V(B0) = 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 712
WIRE 272 16 208 16
WIRE 560 16 272 16
WIRE 624 16 560 16
WIRE 800 16 624 16
WIRE 272 64 272 16
WIRE 272 64 208 64
WIRE 624 64 624 16
WIRE 624 64 560 64
WIRE 160 96 0 96
WIRE 512 96 432 96
WIRE 208 144 208 112
WIRE 320 144 208 144
WIRE 432 144 432 96
WIRE 432 144 320 144
WIRE 208 176 208 144
WIRE 560 208 560 112
WIRE 608 208 560 208
WIRE 640 208 608 208
WIRE 288 224 208 224
WIRE 96 256 80 256
WIRE 160 256 96 256
WIRE 800 256 800 16
WIRE 560 288 560 208
WIRE -96 304 -112 304
WIRE 0 304 0 96
WIRE 0 304 -96 304
WIRE 208 304 208 272
WIRE 288 304 288 224
WIRE 288 304 272 304
WIRE 208 336 208 304
WIRE 640 336 560 336
WIRE 432 368 432 144
WIRE 512 368 432 368
WIRE 288 384 288 304
WIRE 288 384 208 384
WIRE 96 416 80 416
WIRE 160 416 96 416
WIRE 208 464 208 432
WIRE 288 464 288 384
WIRE 288 464 272 464
WIRE 208 496 208 464
WIRE 288 544 288 464
WIRE 288 544 208 544
WIRE 0 576 0 304
WIRE 160 576 0 576
WIRE 288 592 288 544
WIRE 288 592 208 592
WIRE 560 592 560 384
WIRE 560 592 288 592
WIRE 640 592 640 336
WIRE 640 592 560 592
WIRE 800 592 800 336
WIRE 800 592 640 592
IOPIN -112 304 In
IOPIN 80 256 In
IOPIN 80 416 In
IOPIN 608 208 In
SYMBOL pmos4 160 16 R0
SYMATTR InstName M1
SYMATTR Value2 l=0.1u w=8u
SYMBOL nmos4 160 336 R0
SYMATTR InstName M4
SYMATTR Value2 l=0.1u w=6u
SYMBOL pmos4 512 16 R0
SYMATTR InstName M2
SYMATTR Value2 l=0.1u w=0.4u
SYMBOL voltage 96 240 R0
WINDOW 3 -462 -8 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1.2 75u 100n 100n 50u 200u 2)
SYMBOL cap 704 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL cap 272 288 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 200f
SYMBOL voltage 800 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdd
SYMATTR Value 1.2
SYMBOL nmos4 512 288 R0
SYMATTR InstName M6
SYMATTR Value2 l=0.1u w=0.1u
SYMBOL nmos4 160 176 R0
SYMATTR InstName M3
SYMATTR Value2 l=0.1u w=6u
SYMBOL cap 272 448 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 200f
SYMBOL voltage 96 400 R0
WINDOW 3 -519 93 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1.2 275u 100n 100n 200u 400u 1)
SYMBOL cap 304 144 R0
SYMATTR InstName C1
SYMATTR Value 150f
SYMBOL voltage -96 288 R0
WINDOW 3 -490 87 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName CLK
SYMATTR Value PULSE(0 1.2 50u 100n 100n 50u 100u 4)
SYMBOL nmos4 160 496 R0
SYMATTR InstName M5
SYMATTR Value2 l=0.1u w=6u
FLAG 320 208 0
FLAG 288 592 0
FLAG 704 208 0
FLAG -96 384 0
FLAG 96 336 0
FLAG 96 496 0
FLAG -112 304 CLK
FLAG 80 256 A
FLAG 80 416 B
FLAG 608 208 F
FLAG 208 464 B0
FLAG 208 304 A0
TEXT -96 624 Left 2 !.model nmos nmos level=1 vto=0.4 kp=432u phi=0.88 gamma=0.2 lambda=0
TEXT -88 648 Left 2 !.model pmos pmos level=1 vto=-0.4 kp=108u phi=0.88 gamma=0.2 lambda=0
TEXT -80 672 Left 2 !.tran 0 400u 0 0.1u
TEXT -64 696 Left 2 !.ic V(A0) = 0 V(B0) = 0