Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\606830e3fc8b_comparator_logic_IE.asc
* Generated by LTspice 26.0.1 for Windows.
* magic output
* motor 1
* motor 2
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
XU1 N005 N010 N009 N011 N003 LT1001 ;pnba In+)In-)V+)V-)OUT
V5 N010 0 3
V4 N003 N007 6
XU2 N005 N004 N002 N007 N001 LT1001 ;pnba In+)In-)V+)V-)OUT
R2 0 N006 10k
V7 N009 0 6
V1 N004 0 7
R1 N008 0 10k
D1 N008 N001 D
D2 N001 N006 D
Vamplifier_output N005 0 0
V3 N002 N003 6
V8 0 N011 6
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc amplifier_output 0 8 0.05
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1540 1016
WIRE 896 -240 368 -240
WIRE 512 -80 208 -80
WIRE 512 -16 512 -80
WIRE 208 112 208 -80
WIRE 512 112 512 64
WIRE 752 112 512 112
WIRE 176 128 -48 128
WIRE 368 144 368 -240
WIRE 368 144 240 144
WIRE 176 160 80 160
WIRE -48 176 -48 128
WIRE 512 176 512 112
WIRE 896 320 896 -240
WIRE 1136 320 896 320
WIRE 1216 320 1136 320
WIRE 1344 320 1280 320
WIRE 1520 320 1424 320
WIRE 208 336 208 176
WIRE 512 336 512 256
WIRE 512 336 208 336
WIRE 80 352 80 160
WIRE 80 352 -288 352
WIRE -288 416 -288 352
WIRE 1136 416 1136 320
WIRE 752 480 752 112
WIRE 752 480 384 480
WIRE 1136 528 1136 480
WIRE 512 544 208 544
WIRE -288 560 -288 496
WIRE 512 592 512 544
WIRE 1136 656 1136 608
WIRE 208 736 208 544
WIRE 176 752 -192 752
WIRE 384 768 384 480
WIRE 384 768 240 768
WIRE 512 768 512 672
WIRE 704 768 512 768
WIRE -192 784 -192 752
WIRE 80 784 80 352
WIRE 176 784 80 784
WIRE 512 848 512 768
WIRE 208 992 208 800
WIRE 512 992 512 928
WIRE 512 992 208 992
SYMBOL OpAmps\\LT1001 208 80 R0
SYMATTR InstName U2
SYMBOL voltage -288 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName amplifier_output
SYMATTR Value 0
SYMBOL voltage 512 832 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V8
SYMATTR Value 6
SYMBOL voltage 512 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 6
SYMBOL voltage -48 160 R0
WINDOW 3 38 50 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 7
SYMATTR InstName V1
SYMBOL res 1120 512 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL diode 1152 480 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL res 1440 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL OpAmps\\LT1001 208 704 R0
SYMATTR InstName U1
SYMBOL voltage -192 768 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 3
SYMBOL voltage 512 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 6
SYMBOL voltage 512 576 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V7
SYMATTR Value 6
SYMBOL diode 1216 336 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
FLAG -192 864 0
FLAG 704 768 0
FLAG -48 256 0
FLAG 1136 656 0
FLAG 1520 320 0
FLAG -288 560 0
TEXT 936 296 Left 2 ;magic output
TEXT 1352 384 Left 2 ;motor 1
TEXT 1016 544 Left 2 ;motor 2
TEXT -322 998 Left 2 !.dc amplifier_output 0 8 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2920-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1028.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2920-1.asy)
V2 N002 0 1
XU1 N002 N001 IN 0 OUT1 LT1028 ;pnba In+)In-)V+)V-)OUT
C1 OUT1 0 0.22
V1 IN 0 5
XU2 IN 0 N001 N003 IN LTC2920-1 ;pnba Vcc)GND)IM1)RS1)IN1
R3 OUT1 N001 10K
R4 0 N001 10K
R1 N003 0 60.4K
Rload1 OUT1 0 512
.tran 0.4m startup
.lib LT1028.lib
.lib LTC2920-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1336 836
WIRE -496 32 -592 32
WIRE -336 32 -496 32
WIRE -32 32 -336 32
WIRE -592 48 -592 32
WIRE -336 64 -336 32
WIRE -16 96 -160 96
WIRE 80 96 64 96
WIRE -496 128 -496 32
WIRE -464 128 -496 128
WIRE -592 144 -592 128
WIRE -32 176 -32 32
WIRE -160 192 -160 96
WIRE -160 192 -208 192
WIRE -64 192 -160 192
WIRE -160 208 -160 192
WIRE 80 208 80 96
WIRE 80 208 0 208
WIRE 160 208 80 208
WIRE 272 208 160 208
WIRE -64 224 -80 224
WIRE 160 224 160 208
WIRE 272 224 272 208
WIRE -32 256 -32 240
WIRE -560 272 -576 272
WIRE -464 272 -480 272
WIRE -160 304 -160 288
WIRE -80 304 -80 224
WIRE 160 320 160 288
WIRE 272 320 272 304
WIRE -336 352 -336 336
WIRE -80 400 -80 384
SYMBOL res 80 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res -464 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 60.4K
SYMBOL opamps\\LT1028 -32 144 R0
SYMATTR InstName U1
SYMBOL res -144 304 R180
WINDOW 0 -39 70 Left 2
WINDOW 3 -49 33 Left 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 256 208 R0
SYMATTR InstName Rload1
SYMATTR Value 512
SYMBOL voltage -592 32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL LTC2920-1 -336 192 R0
SYMATTR InstName U2
SYMBOL voltage -80 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL cap 144 224 R0
SYMATTR InstName C1
SYMATTR Value 0.22
FLAG -592 144 0
FLAG 160 320 0
FLAG 272 320 0
FLAG -592 32 IN
FLAG 272 208 OUT1
FLAG -336 352 0
FLAG -32 256 0
FLAG -160 304 0
FLAG -80 400 0
FLAG -576 272 0
TEXT 64 384 Left 2 !.tran 0.4m startup
* Z:\tmp\asc_dec_bjh7r6w2\0d989963ed5c_varicoiln_1mh_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
L1 1m 0 1m
V2 ctrl 0 PWL(0 1 .5 2)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2056 680
WIRE -112 -112 -160 -112
WIRE -48 -112 -112 -112
WIRE 112 -112 32 -112
WIRE 192 -112 112 -112
WIRE 448 -112 384 -112
WIRE 560 -112 528 -112
WIRE 608 -112 560 -112
WIRE -160 -64 -160 -112
WIRE 560 -64 560 -112
WIRE 112 -16 112 -112
WIRE -160 48 -160 16
WIRE 16 64 -16 64
WIRE 48 64 16 64
WIRE 560 80 560 16
WIRE -16 96 -16 64
WIRE -16 208 -16 176
WIRE 112 208 112 64
WIRE 112 208 -16 208
WIRE 112 224 112 208
SYMBOL ind 544 -80 R0
SYMATTR InstName L1
SYMATTR Value 1m
SYMBOL voltage -16 80 R0
WINDOW 3 70 163 Right 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PWL(0 1 .5 2)
SYMATTR InstName V2
FLAG 112 224 0
FLAG -160 48 0
FLAG -112 -112 1
FLAG 384 -112 1
FLAG 560 80 0
FLAG 608 -112 1m
FLAG 16 64 ctrl
* Z:\home\khalils\Downloads\files\data\raw_asc\0ad9b2ce05dd_ADA4096.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4096.asy)
Vin IN 0 SINE(0 10m 100k)
XU1 IN N001 +V -V OUT ADA4096 ;pnba In+)In-)V+)V-)OUT
R3 OUT 0 10k
V2 -V 0 -5
R2 OUT N001 1k
C1 OUT 0 10p
R1 N001 0 1k
V1 +V 0 5
.tran 100u
.lib ADA4096.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 752 -1216 624 -1216
WIRE 160 -1152 160 -1168
WIRE 272 -1152 272 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 704 -1104 608 -1104
WIRE 752 -1104 752 -1216
WIRE 752 -1104 704 -1104
WIRE 848 -1104 752 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 848 -1072 848 -1104
WIRE 160 -1040 160 -1072
WIRE 272 -1040 272 -1072
WIRE 432 -976 432 -992
WIRE 752 -976 752 -1008
WIRE 848 -976 848 -1008
SYMBOL res 736 -1104 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 160 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL ADA4096 576 -1168 R0
SYMATTR InstName U1
SYMBOL cap 832 -1072 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 10m 100k)
SYMBOL voltage 272 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
FLAG 160 -1168 +V
FLAG 432 -976 0
FLAG 704 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 272 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 272 -1040 0
FLAG 160 -1040 0
FLAG 752 -976 0
FLAG 848 -976 0
TEXT 680 -936 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\00fe459f3417_NPNActive.asc
* Generated by LTspice 26.0.1 for Windows.
B1 C E I=(Beta*I(V1))
V1 B E 0.7
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 80 240 64
WIRE 128 176 112 176
WIRE 240 176 240 160
WIRE 240 176 208 176
WIRE 240 224 240 176
SYMBOL bi 240 80 R0
SYMATTR InstName B1
SYMATTR Value I=(Beta*I(V1))
SYMBOL voltage 112 176 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0.7
FLAG 240 64 C
FLAG 240 224 E
FLAG 112 176 B
* Z:\home\khalils\Downloads\files\data\raw_asc\162f69d577c3_PVCELL.asc
* Generated by LTspice 26.0.1 for Windows.
* .param Is=1e-11 Imax=28 Vmax=560 n=Vmax*38.6/log(Imax/Is) Rseries=0.5 Rshunt=1meg
I1 neg N001 {imax}
C1 neg 0 100n Rpar=10meg
R2 neg pos {Rshunt}
D1 N001 neg Dpv
R1 N001 pos {Rseries}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model dpv d(Is={Is} 11 N={n})
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1172 680
WIRE -48 208 -112 208
WIRE -16 208 -48 208
WIRE 128 208 64 208
WIRE 288 208 128 208
WIRE -48 224 -48 208
WIRE 128 224 128 208
WIRE 288 224 288 208
WIRE -48 320 -48 304
WIRE -48 320 -112 320
WIRE 64 320 -48 320
WIRE 128 320 128 288
WIRE 128 320 64 320
WIRE 288 320 288 304
WIRE 288 320 128 320
WIRE 64 336 64 320
WIRE 64 416 64 400
SYMBOL res -32 320 R180
WINDOW 0 36 76 Left 0
WINDOW 3 36 40 Left 0
SYMATTR InstName R2
SYMATTR Value {Rshunt}
SYMBOL res 80 192 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value {Rseries}
SYMBOL cap 48 336 R0
SYMATTR InstName C1
SYMATTR Value 100n
SYMATTR SpiceLine Rpar=10meg
SYMBOL current 288 304 R180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value {imax}
SYMBOL diode 112 224 R0
SYMATTR InstName D1
SYMATTR Value Dpv
FLAG -112 208 pos
FLAG -112 320 neg
FLAG 64 416 0
TEXT 112 368 Left 0 !.model dpv d(Is={Is} 11 N={n})
TEXT 40 456 Left 0 ;.param Is=1e-11 Imax=28 Vmax=560 n=Vmax*38.6/log(Imax/Is) Rseries=0.5 Rshunt=1meg
* Z:\home\khalils\Downloads\files\data\raw_asc\a5ca29895578_Q42.asc
* Generated by LTspice 26.0.1 for Windows.
;.dc Vgs 0 1.8 1m
Vds N001 0 1.8
M1 0 N002 N001 N001 pch_tt l=180n w=270n
Vgs N002 0 {Vgs}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.step param Vgs list 0.4 0.5 0.6 0.7 0.8 0.9
.dc Vds 0 1.8 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 688 32 416 32
WIRE 416 112 416 32
WIRE 368 128 160 128
WIRE 688 128 688 32
WIRE 160 240 160 128
WIRE 160 448 160 320
WIRE 416 448 416 208
WIRE 416 448 160 448
WIRE 688 448 688 208
WIRE 688 448 416 448
WIRE 416 480 416 448
SYMBOL pmos 368 208 M180
SYMATTR InstName M1
SYMATTR Value pch_tt
SYMATTR Value2 l=180n w=270n
SYMBOL voltage 688 112 R0
SYMATTR InstName Vds
SYMATTR Value 1.8
SYMBOL voltage 160 224 R0
SYMATTR InstName Vgs
SYMATTR Value {Vgs}
FLAG 416 480 0
TEXT -136 176 Left 2 !.include TSMC180.lib
TEXT -352 224 Left 2 !.step param Vgs list 0.4 0.5 0.6 0.7 0.8 0.9
TEXT -120 264 Left 2 !.dc Vds 0 1.8 1m
TEXT -112 304 Left 2 !;.dc Vgs 0 1.8 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8608S.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8608S.asy)
R2 OUT N005 1Meg
C5 OUT N005 10p
R3 N005 0 309K
R1 N006 0 18.2K
V1 IN 0 12
C4 OUT 0 22 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
L1 N003 OUT 2.2 Rser=3m
XU2 N004 N001 NC_01 IN N005 N002 IN N003 N006 0 LT8608S ;pnba TR/SS)INTVcc)SYNC)VIN)FB)PG)EN/UV)SW)RT)GND
C1 N004 0 1n
Rload OUT 0 2.2
C2 N001 0 1
R4 N001 N002 100K
.tran 750u startup
.lib LT8608S.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1044 680
WIRE 80 0 0 0
WIRE 112 0 80 0
WIRE 432 0 400 0
WIRE 496 0 432 0
WIRE 576 0 560 0
WIRE 0 16 0 0
WIRE 432 16 432 0
WIRE 80 96 80 0
WIRE 112 96 80 96
WIRE 432 96 400 96
WIRE 0 112 0 96
WIRE 432 192 400 192
WIRE 544 192 512 192
WIRE 656 192 544 192
WIRE 752 192 656 192
WIRE 848 192 752 192
WIRE 544 208 544 192
WIRE 656 208 656 192
WIRE 752 208 752 192
WIRE 848 208 848 192
WIRE 32 288 0 288
WIRE 112 288 96 288
WIRE 544 288 400 288
WIRE 656 288 656 272
WIRE 656 288 544 288
WIRE 544 304 544 288
WIRE 752 304 752 272
WIRE 848 304 848 288
WIRE 16 384 0 384
WIRE 112 384 96 384
WIRE 416 384 400 384
WIRE 544 400 544 384
SYMBOL cap 496 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 112 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 18.2K
SYMBOL cap 736 208 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL cap 640 208 R0
SYMATTR InstName C5
SYMATTR Value 10p
SYMBOL res 832 192 R0
SYMATTR InstName Rload
SYMATTR Value 2.2
SYMBOL cap 96 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 416 0 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL ind 416 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=3m
SYMBOL LT8608S 256 192 R0
SYMATTR InstName U2
SYMBOL voltage 0 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 528 192 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 528 288 R0
SYMATTR InstName R3
SYMATTR Value 309K
FLAG 0 384 0
FLAG 0 288 0
FLAG 0 112 0
FLAG 576 0 0
FLAG 752 304 0
FLAG 544 400 0
FLAG 848 304 0
FLAG 848 192 OUT
FLAG 0 0 IN
FLAG 416 384 0
TEXT 672 384 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1790-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1790-2.5.asy)
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 1
Rload OUT 0 1K
XU1 IN 0 OUT LT1790-25 ;pnba IN)GND)OUT
.tran 1
.lib LT1790.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 48 -176 48
WIRE 336 48 288 48
WIRE 432 48 336 48
WIRE -176 64 -176 48
WIRE 336 64 336 48
WIRE 432 64 432 48
WIRE -176 160 -176 144
WIRE 336 160 336 128
WIRE 432 160 432 144
WIRE 160 176 160 160
SYMBOL res 416 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL PowerProducts\\LT1790-2.5 160 48 R0
SYMATTR InstName U1
SYMBOL cap 320 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -176 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -176 160 0
FLAG 336 160 0
FLAG 432 160 0
FLAG 160 176 0
FLAG 432 48 OUT
FLAG -176 48 IN
TEXT 280 224 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP121-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5.5
C2 OUT 0 1
Rload OUT 0 22
C1 IN 0 1
XU1 OUT MP_01 0 IN MP_02 IN ADP121 K=1/4125 ;pnba Vout))GND)En))Vin
.tran 10m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP121-3.3.asy)
.lib ADP121.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 22
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ADP121-3.3 256 208 R0
SYMATTR InstName U1
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3623.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3623.asy)
C3 OUT 0 100 Rser=10m
XU1 N004 NC_01 IN 0 IN N003 MP_02 N001 0 MP_03 MP_04 MP_05 OUT MP_06 MP_07 MP_08 IN N002 N001 NC_09 0 N001 N001 N001 LTC3623 ;pnba Iset)Pgood)Run)Gsns)PVin)SW))Mode/Sync)PGND))))Vout))))SVin)Boost)INTVcc)PGFB)Imon)Vin_reg)Rt)Ith
C2 N002 N003 .1
C4 0 N004 2.2n Rpar=100K
V1 IN 0 12
L1 N003 OUT 1 Rser=5m
C1 0 N001 2.2
Rload OUT 0 1
.tran 1.8m startup
.lib LTC3623.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 -144 -144 -144
WIRE 80 -112 80 -144
WIRE -144 -64 -144 -144
WIRE -144 -64 -272 -64
WIRE -96 -64 -144 -64
WIRE -272 -48 -272 -64
WIRE -144 16 -144 -64
WIRE -96 16 -144 16
WIRE 288 16 256 16
WIRE 304 16 288 16
WIRE 400 16 368 16
WIRE -272 48 -272 32
WIRE -96 96 -144 96
WIRE 320 96 256 96
WIRE -144 176 -144 96
WIRE -96 176 -144 176
WIRE 320 176 320 160
WIRE 320 176 256 176
WIRE 384 176 320 176
WIRE 496 176 464 176
WIRE 544 176 496 176
WIRE 640 176 544 176
WIRE 544 192 544 176
WIRE 640 192 640 176
WIRE -144 256 -144 176
WIRE -96 256 -144 256
WIRE 496 256 496 176
WIRE 496 256 256 256
WIRE 544 288 544 256
WIRE 640 288 640 272
WIRE -96 336 -112 336
WIRE -96 416 -112 416
WIRE 336 416 256 416
WIRE 432 416 400 416
WIRE 16 480 16 464
WIRE -144 512 -144 256
WIRE 144 512 144 464
WIRE 144 512 -144 512
WIRE 288 512 288 16
WIRE 288 512 144 512
SYMBOL PowerProducts\\LTC3623 80 176 R0
SYMATTR InstName U1
SYMATTR Description 15V, 5A Synchronous Step-Down Regulator
SYMBOL cap 304 96 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL ind 368 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR Value2 Rser=5m
SYMBOL cap 400 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 123 60 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 2.2n
SYMATTR Value2 Rpar=100K
SYMBOL voltage -272 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 528 192 R0
SYMATTR InstName C3
SYMATTR Value 100
SYMATTR Value2 Rser=10m
SYMBOL res 624 176 R0
SYMATTR InstName Rload
SYMATTR Value 1
SYMBOL cap 368 0 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2.2
FLAG -272 48 0
FLAG 400 16 0
FLAG 544 288 0
FLAG 640 288 0
FLAG 432 416 0
FLAG 16 480 0
FLAG -112 416 0
FLAG 640 176 OUT
FLAG -272 -64 IN
FLAG -112 336 0
TEXT 408 528 Left 2 !.tran 1.8m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\HalfSlope.asc
* Generated by LTspice 26.0.1 for Windows.
*.ac oct 20 1K 10Meg
* Time domain response of a 3db/octive rolloff
* This example schematic is supplied for informational/educational purposes only.
V1 N001 0 PULSE(0 1 0 1n 1n 5u 10u) AC 1
G2 0 B N001 0 Laplace=1/sqrt(1+1u*s)/(1+5n*s)**2
R1 B 0 1.
.tran 30u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1640 904
WIRE 1344 560 1232 560
WIRE 1488 560 1344 560
WIRE 1232 576 1232 560
WIRE 1344 576 1344 560
WIRE 1184 592 544 592
WIRE 544 608 544 592
WIRE 1184 640 1168 640
WIRE 1168 672 1168 640
WIRE 1232 672 1232 656
WIRE 1344 672 1344 656
WIRE 544 720 544 688
SYMBOL g 1232 560 R0
WINDOW 0 28 24 Left 2
WINDOW 3 -136 160 Left 2
SYMATTR InstName G2
SYMATTR Value Laplace=1/sqrt(1+1u*s)/(1+5n*s)**2
SYMBOL voltage 544 592 R0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1n 1n 5u 10u) AC 1
SYMBOL res 1328 560 R0
SYMATTR InstName R1
SYMATTR Value 1.
FLAG 544 720 0
FLAG 1344 672 0
FLAG 1232 672 0
FLAG 1168 672 0
FLAG 1488 560 B
TEXT 744 800 Left 2 !*.ac oct 20 1K 10Meg
TEXT 744 760 Left 2 !.tran 30u
TEXT 1040 552 Bottom 2 ;Time domain response of a 3db/octive rolloff
TEXT 1000 848 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\384e5114feef_Pranala_Luar_-_Clipper_Circuit_Simulation_in_LTspice.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N004 N005 1k
R1 N002 0 1k
V1 N001 0 SINE(0 8 1k)
D2 N004 N003 D
V3 N005 0 4
D1 N002 N001 D
V2 N003 0 SINE(0 8 1k)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model Diode D(Ron=1 Roff=1Meg Vfwd=1 Vrev=2)
.tran 5ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 32 -32 32
WIRE 144 32 96 32
WIRE 416 32 352 32
WIRE 544 32 480 32
WIRE -32 48 -32 32
WIRE 144 48 144 32
WIRE 352 48 352 32
WIRE 544 48 544 32
WIRE -32 144 -32 128
WIRE 64 144 -32 144
WIRE 144 144 144 128
WIRE 144 144 64 144
WIRE 64 160 64 144
WIRE 544 160 544 128
WIRE 352 240 352 128
WIRE 448 240 352 240
WIRE 544 240 448 240
WIRE 448 256 448 240
SYMBOL diode 480 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMBOL res 128 32 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 8 1k)
SYMBOL voltage 544 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 4
SYMBOL voltage 352 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 8 1k)
SYMBOL res 528 32 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL diode 96 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
FLAG 64 160 0
FLAG 448 256 0
TEXT -208 -48 Left 2 !.model Diode D(Ron=1 Roff=1Meg Vfwd=1 Vrev=2)
TEXT 160 136 Left 2 !.tran 5ms
* Z:\tmp\asc_dec_bjh7r6w2\15926eb2eaab_1016_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R3 +V N003 4K
C1 N001 0 200p
R2 N003 0 4K
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE 336 -16 320 -16
WIRE 416 -16 400 -16
WIRE 432 -16 416 -16
WIRE 576 -16 512 -16
WIRE 224 32 224 16
WIRE 416 96 416 -16
WIRE 432 96 416 96
WIRE 576 96 576 -16
WIRE 576 96 512 96
WIRE 224 128 224 112
WIRE 320 128 224 128
WIRE 416 128 320 128
WIRE 432 128 416 128
WIRE 608 128 512 128
WIRE 224 144 224 128
WIRE 320 144 320 128
WIRE 448 176 448 160
WIRE 464 176 464 160
WIRE 480 176 480 160
WIRE 96 208 96 192
WIRE 320 224 320 208
WIRE 224 240 224 224
WIRE 416 240 416 128
WIRE 576 240 576 96
WIRE 96 304 96 288
WIRE 320 320 320 304
SYMBOL res 208 16 R0
SYMATTR InstName R3
SYMATTR Value 4K
SYMBOL cap 400 -32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 200p
SYMBOL res 208 128 R0
SYMATTR InstName R2
SYMATTR Value 4K
FLAG 96 304 0
FLAG 464 64 +V
FLAG 224 16 +V
FLAG 320 -16 0
FLAG 224 240 0
FLAG 320 320 0
FLAG 96 192 +V
* Z:\home\khalils\Downloads\files\data\raw_asc\0a6418f3f0c3_tran.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 Vout N001 0 0 2N3904
R1 Vcc Vout 220
R2 Vin N001 10k
V2 Vin 0 PULSE(0 3.3 10n 5n 5n 500u 1m 10)
V1 Vcc 0 5V
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 12m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 112 96 112
WIRE 656 112 368 112
WIRE 96 144 96 112
WIRE 656 144 656 112
WIRE 96 256 96 224
WIRE 656 272 656 224
WIRE 736 272 656 272
WIRE 768 272 736 272
WIRE 656 336 656 272
WIRE 208 384 96 384
WIRE 304 384 208 384
WIRE 592 384 384 384
WIRE 96 528 96 464
WIRE 656 528 656 432
WIRE 656 528 96 528
WIRE 96 592 96 528
SYMBOL voltage 96 128 R0
SYMATTR InstName V1
SYMATTR Value 5V
SYMBOL res 288 400 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 96 368 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 10n 5n 5n 500u 1m 10)
SYMBOL res 640 128 R0
SYMATTR InstName R1
SYMATTR Value 220
SYMBOL npn 592 336 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
FLAG 96 256 0
FLAG 736 272 Vout
FLAG 368 112 Vcc
FLAG 208 384 Vin
FLAG 96 592 0
TEXT 336 592 Left 2 !.tran 12m