Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7182-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7182-2.5.asy)
V1 IN 0 -8
V2 N001 0 PULSE(0 2 200u 1n 1n 10m)
C2 OUT 0 2.2
XU1 OUT MP_01 MP_02 N001 MP_03 0 IN ADP7182-x.x Rset=500k ;pnba Vout)))EN))GND)Vin
R1 OUT 0 50
C1 IN 0 2.2
.tran 1m
.lib ADP7182-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 -80 -48
WIRE 112 -48 32 -48
WIRE 432 -48 368 -48
WIRE 544 -48 432 -48
WIRE -80 -32 -80 -48
WIRE 32 -32 32 -48
WIRE 432 -32 432 -48
WIRE 544 -32 544 -48
WIRE -80 64 -80 48
WIRE 32 64 32 32
WIRE 432 64 432 32
WIRE 544 64 544 48
WIRE 112 144 32 144
WIRE 32 160 32 144
WIRE 32 256 32 240
WIRE 240 256 240 208
SYMBOL voltage 32 144 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 200u 1n 1n 10m)
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 2.2
SYMBOL voltage -80 -48 R0
SYMATTR InstName V1
SYMATTR Value -8
SYMBOL res 528 -48 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL ADP7182-2.5 240 48 R0
SYMATTR InstName U1
SYMBOL cap 16 -32 R0
SYMATTR InstName C1
SYMATTR Value 2.2
FLAG -80 64 0
FLAG 32 64 0
FLAG 432 64 0
FLAG 32 256 0
FLAG 240 256 0
FLAG 544 64 0
FLAG 32 -48 IN
FLAG 432 -48 OUT
TEXT 528 248 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\1c4485134ae9_1469.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1469.asy)
R2 N001 0 1K
XU1 N003 N001 +V -V N002 LT1468 ;pnba In+)In-)V+)V-)OUT
V3 N003 0 SINE(0 1 1K)
V1 +V 0 15
V2 -V 0 -15
R1 N002 N001 1K
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -288 144 -288 128
WIRE -160 144 -160 128
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE -288 256 -288 224
WIRE -160 256 -160 224
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL voltage -288 128 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -160 128 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT1469 192 176 R0
SYMATTR InstName U1
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1K
FLAG -160 256 0
FLAG 192 192 +V
FLAG -160 128 +V
FLAG 192 288 -V
FLAG -288 256 0
FLAG -288 128 -V
FLAG 16 96 0
FLAG 0 368 0
TEXT -264 344 Left 0 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\0583cf9b0028_8062.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 12
C1 OUT 0 .1m
XU1 IN IN IN NC_01 NC_02 0 N001 NC_03 OUT MP_04 OUT IN 0 LTM8062 ;pnba Vin)Vin_reg)Run)_CHRG)_Fault)Timer)ADJ)NTC)BAT))Bias)VinA)GND
R1 OUT N001 274K
R2 N001 0 2.87Meg
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8062.asy)
.lib LTM8062.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 912 680
WIRE 64 -64 -32 -64
WIRE 80 -64 64 -64
WIRE -32 -48 -32 -64
WIRE 64 32 64 -64
WIRE 80 32 64 32
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 80 128 64 128
WIRE 432 128 368 128
WIRE 496 128 432 128
WIRE 496 144 496 128
WIRE 64 224 64 128
WIRE 80 224 64 224
WIRE 432 224 432 128
WIRE 432 224 368 224
WIRE 496 224 496 208
WIRE 432 272 432 224
WIRE 80 320 64 320
WIRE 80 416 64 416
WIRE 432 416 432 352
WIRE 432 416 368 416
WIRE 432 432 432 416
WIRE 432 528 432 512
FLAG 64 416 0
FLAG -32 48 0
FLAG 496 224 0
FLAG -32 -64 IN
FLAG 496 128 OUT
FLAG 64 320 0
FLAG 432 528 0
SYMBOL voltage -32 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 480 144 R0
SYMATTR InstName C1
SYMATTR Value .1m
SYMBOL PowerProducts\\LTM8062 224 176 R0
SYMATTR InstName U1
SYMBOL res 416 256 R0
SYMATTR InstName R1
SYMATTR Value 274K
SYMBOL res 416 416 R0
SYMATTR InstName R2
SYMATTR Value 2.87Meg
TEXT 584 416 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\20b52e5a1d8b_Twin_T_Filter_Actual_Values.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 N001 19.87k
R2 Vout N003 19.82k
R3 0 N002 9.8k
V1 N001 0 SINE(0 1 1080) AC 1
C1 N002 N001 11.5n mfg=" ---" pn=" ---" type=" ---"
C2 Vout N002 12.2n mfg=" ---" pn=" ---" type=" ---"
C3 0 N003 23.7n mfg=" ---" pn=" ---" type=" ---"
.ac dec 100 1 100k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1712 1132
WIRE 800 -176 560 -176
WIRE 848 -176 800 -176
WIRE 944 -176 912 -176
WIRE 976 -176 944 -176
WIRE 1088 -176 1040 -176
WIRE 944 -160 944 -176
WIRE 560 -112 560 -176
WIRE 944 -64 944 -80
WIRE 800 -16 800 -176
WIRE 832 -16 800 -16
WIRE 944 -16 912 -16
WIRE 976 -16 944 -16
WIRE 1088 -16 1088 -176
WIRE 1088 -16 1056 -16
WIRE 1248 -16 1088 -16
WIRE 944 0 944 -16
WIRE 560 16 560 -32
WIRE 944 80 944 64
FLAG 1248 -16 Vout
FLAG 560 16 0
FLAG 944 -64 0
FLAG 944 80 0
SYMBOL res 928 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 19.87k
SYMBOL res 1072 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 19.82k
SYMBOL res 960 -64 R180
WINDOW 0 -33 52 Left 2
WINDOW 3 -52 22 Left 2
SYMATTR InstName R3
SYMATTR Value 9.8k
SYMBOL voltage 560 -128 R0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1080)
SYMATTR Value2 AC 1
SYMBOL cap 912 -192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 11.5n
SYMATTR SpiceLine mfg="   ---" pn="   ---" type="   ---"
SYMBOL cap 1040 -192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 12.2n
SYMATTR SpiceLine mfg="   ---" pn="   ---" type="   ---"
SYMBOL cap 960 64 R180
WINDOW 0 -36 29 Left 2
WINDOW 3 -62 1 Left 2
SYMATTR InstName C3
SYMATTR Value 23.7n
SYMATTR SpiceLine mfg="   ---" pn="   ---" type="   ---"
TEXT 536 216 Left 2 !.ac dec 100 1 100k
* Z:\home\khalils\Downloads\files\data\raw_asc\ceb5f4dc89d4_2stage_opamp_design.asc
* Generated by LTspice 26.0.1 for Windows.
* Current Mirror for Biasing
* Current Mirror loaded Differential Pair
* Common Source Amplifier
M4 N002 N001 VDD N004 PMOS l=1 w=64
M1 N001 Vin N008 N006 NMOS l=1 w=16
M5 Vout N002 VDD N005 PMOS l=1 w=640
M6 Vout CURR VSS N011 NMOS l=1 w=160
M00 CURR CURR VSS N009 NMOS l=1 w=4
M3 N001 N001 VDD N003 PMOS l=1 w=64
M2 N002 Vip N008 N007 NMOS l=1 w=16
M0 N008 CURR VSS N010 NMOS l=1 w=32
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model nmos nmos(level = 1 kp=400u vt0=0.5 lambda=0.05)
.model pmos pmos(level = 1 kp=100u vt0=-0.5 lambda=0.05)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1084 680
WIRE 128 16 -208 16
WIRE 368 16 128 16
WIRE 784 16 368 16
WIRE 128 48 128 16
WIRE 368 48 368 16
WIRE 784 48 784 16
WIRE 208 64 176 64
WIRE 320 64 208 64
WIRE 736 64 576 64
WIRE 128 96 128 64
WIRE 368 96 368 64
WIRE 784 96 784 64
WIRE 128 160 128 144
WIRE 208 160 208 64
WIRE 208 160 128 160
WIRE 368 192 368 144
WIRE 576 192 576 64
WIRE 576 192 368 192
WIRE 128 240 128 160
WIRE 368 240 368 192
WIRE 784 272 784 144
WIRE 1024 272 784 272
WIRE 80 320 48 320
WIRE 128 320 128 288
WIRE 368 320 368 288
WIRE 448 320 416 320
WIRE 128 352 128 336
WIRE 256 352 128 352
WIRE 368 352 368 336
WIRE 368 352 256 352
WIRE -304 384 -304 240
WIRE -240 384 -304 384
WIRE -304 400 -304 384
WIRE 256 400 256 352
WIRE 784 400 784 272
WIRE -304 480 -304 448
WIRE -240 480 -240 384
WIRE -240 480 -256 480
WIRE 192 480 -240 480
WIRE 208 480 192 480
WIRE 256 480 256 448
WIRE 784 480 784 448
WIRE 192 528 192 480
WIRE 736 528 736 480
WIRE 736 528 192 528
WIRE -304 592 -304 496
WIRE 256 592 256 496
WIRE 256 592 -304 592
WIRE 784 592 784 496
WIRE 784 592 256 592
WIRE 1024 592 784 592
IOPIN -208 16 In
IOPIN 48 320 In
IOPIN 448 320 In
IOPIN 1024 272 Out
IOPIN -304 240 In
IOPIN 1024 592 In
RECTANGLE Normal -176 656 -384 176 2
RECTANGLE Normal 528 656 -16 -16 2
RECTANGLE Normal 960 656 672 -16 2
SYMBOL nmos4 416 240 M0
SYMATTR InstName M2
SYMATTR Value2 l=1 w=16
SYMBOL nmos4 736 400 R0
SYMATTR InstName M6
SYMATTR Value2 l=1 w=160
SYMBOL nmos4 80 240 R0
SYMATTR InstName M1
SYMATTR Value2 l=1 w=16
SYMBOL pmos4 320 144 M180
SYMATTR InstName M4
SYMATTR Value2 l=1 w=64
SYMBOL pmos4 736 144 M180
SYMATTR InstName M5
SYMATTR Value2 l=1 w=640
SYMBOL pmos4 176 144 R180
SYMATTR InstName M3
SYMATTR Value2 l=1 w=64
SYMBOL nmos4 208 400 R0
SYMATTR InstName M0
SYMATTR Value2 l=1 w=32
SYMBOL nmos4 -256 400 M0
SYMATTR InstName M00
SYMATTR Value2 l=1 w=4
FLAG -208 16 VDD
FLAG 48 320 Vin
FLAG 448 320 Vip
FLAG 1024 272 Vout
FLAG -304 240 CURR
FLAG 1024 592 VSS
TEXT -856 208 Left 2 !.model nmos nmos(level = 1 kp=400u vt0=0.5 lambda=0.05)
TEXT -856 232 Left 2 !.model pmos pmos(level = 1 kp=100u vt0=-0.5 lambda=0.05)
TEXT -352 624 Left 2 ;Current Mirror for Biasing
TEXT 144 624 Left 2 ;Current Mirror loaded Differential Pair
TEXT 736 624 Left 2 ;Common Source Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\23bce3bb1bb2_nideal03op.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
RL o 0 {RL}
R2 neg o {R2}
V2 0 Vnn {Vs}
R1 i neg {R1}
Vi i 0 {Vi}
XU1 0 neg Vpp Vnn o level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 Vpp 0 {Vs}
.op
.meas G param V(o)/V(i)
.param Vs=15 Vi=2 R1=5.1k R2=1.8k RL=6.8k
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE 144 80 96 80
WIRE 256 80 224 80
WIRE 512 144 464 144
WIRE 464 160 464 144
WIRE 512 176 512 144
WIRE -48 208 -128 208
WIRE 80 208 32 208
WIRE 96 208 96 80
WIRE 96 208 80 208
WIRE 128 208 96 208
WIRE 256 224 256 80
WIRE 256 224 192 224
WIRE 320 224 256 224
WIRE 128 240 80 240
WIRE -128 256 -128 208
WIRE 320 256 320 224
WIRE 80 288 80 240
WIRE -128 368 -128 336
WIRE 320 368 320 336
SYMBOL voltage -128 240 R0
WINDOW 3 42 66 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 50 38 Left 2
SYMATTR Value {Vi}
SYMATTR InstName Vi
SYMBOL res 304 240 R0
SYMATTR InstName RL
SYMATTR Value {RL}
SYMBOL res 128 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL Opamps\\UniversalOpamp2 160 224 R0
SYMATTR InstName U1
SYMBOL res -64 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL voltage 512 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value {Vs}
SYMBOL voltage 512 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vs}
FLAG 512 64 Vpp
FLAG 464 160 0
FLAG 512 256 Vnn
FLAG 320 368 0
FLAG -128 368 0
FLAG 160 192 Vpp
FLAG 160 256 Vnn
FLAG 80 288 0
FLAG 320 224 o
FLAG -128 208 i
FLAG 80 208 neg
TEXT -280 8 Left 2 !.op
TEXT -280 -72 Left 2 !.meas G param V(o)/V(i)
TEXT -280 -32 Left 2 !.param Vs=15 Vi=2 R1=5.1k R2=1.8k RL=6.8k
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1938.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1938.asy)
C1 OUT 0 22
C4 N001 0 .01
XU1 OUT N006 N004 IN N001 N007 OUT N008 N003 N005 0 LT3684 ;pnba BD)Boost)SW)Vin)Run/SS)Pgood)Bias)FB)Vc)Rt)GND
C2 N004 N006 .47
R3 N003 N002 16.2K
Rload OUT 0 1.5
R5 OUT N007 100K
D1 0 N004 1N5817
V1 IN 0 15
R4 N005 0 60.4K
C3 N002 0 680p
R2 N008 0 200K
R6 IN N001 500K
L1 N004 OUT 4.7 Rpar=2K
R1 OUT N008 324K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 750u startup
.lib LT3684.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1104 804
WIRE -352 64 -448 64
WIRE 32 64 -352 64
WIRE 560 64 160 64
WIRE -448 80 -448 64
WIRE -352 80 -352 64
WIRE 32 96 32 64
WIRE 160 96 160 64
WIRE -64 160 -352 160
WIRE 560 160 560 64
WIRE 560 160 256 160
WIRE -448 176 -448 160
WIRE -352 176 -352 160
WIRE -240 240 -256 240
WIRE -160 240 -176 240
WIRE -64 240 -80 240
WIRE 288 240 256 240
WIRE 384 240 288 240
WIRE 448 240 384 240
WIRE 560 240 560 160
WIRE 560 240 528 240
WIRE 656 240 560 240
WIRE 752 240 656 240
WIRE 848 240 752 240
WIRE -352 256 -352 240
WIRE 288 256 288 240
WIRE 384 256 384 240
WIRE 752 256 752 240
WIRE 848 256 848 240
WIRE 560 272 560 240
WIRE -208 320 -256 320
WIRE -64 320 -128 320
WIRE 288 320 256 320
WIRE 384 336 384 320
WIRE 656 336 656 240
WIRE 752 352 752 320
WIRE 848 352 848 336
WIRE -64 400 -80 400
WIRE 560 400 560 352
WIRE 560 400 256 400
WIRE 560 416 560 400
WIRE 96 464 96 448
WIRE 560 512 560 496
WIRE -80 544 -80 400
WIRE 656 544 656 416
WIRE 656 544 -80 544
SYMBOL cap 272 256 R0
WINDOW 3 30 49 Left 2
SYMATTR Value .47
SYMATTR InstName C2
SYMBOL cap -368 176 R0
SYMATTR InstName C4
SYMATTR Value .01
SYMBOL res -112 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 60.4K
SYMBOL res 544 256 R0
SYMATTR InstName R1
SYMATTR Value 324K
SYMBOL res 640 320 R0
SYMATTR InstName R5
SYMATTR Value 100K
SYMBOL res 544 400 R0
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL cap 736 256 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL PowerProducts\\LT1938 96 288 R0
SYMATTR InstName U1
SYMBOL voltage -448 64 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 832 240 R0
SYMATTR InstName Rload
SYMATTR Value 1.5
SYMBOL ind 432 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=2K
SYMBOL res -368 64 R0
SYMATTR InstName R6
SYMATTR Value 500K
SYMBOL schottky 368 320 M180
WINDOW 0 37 61 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res -64 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 16.2K
SYMBOL cap -176 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 680p
FLAG 384 336 0
FLAG 752 352 0
FLAG 560 512 0
FLAG -256 240 0
FLAG -448 176 0
FLAG 96 464 0
FLAG 848 352 0
FLAG -256 320 0
FLAG -352 256 0
FLAG 848 240 OUT
FLAG -448 64 IN
TEXT 736 528 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1084-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1084-5.asy)
XU1 0 OUT IN LT1084-5 ;pnba GND)OUT)IN
Rload OUT 0 10
V1 IN 0 PWL(0 0 1 10) Rser=0.1
C1 OUT 0 10
.tran 1
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1344 896
WIRE 1872 896 1808 896
WIRE 2000 896 1872 896
WIRE 1344 912 1344 896
WIRE 1872 912 1872 896
WIRE 2000 912 2000 896
WIRE 1344 1008 1344 992
WIRE 1872 1008 1872 976
WIRE 2000 1008 2000 992
WIRE 1680 1024 1680 992
SYMBOL PowerProducts\\LT1084-5 1680 896 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1344 896 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMATTR SpiceLine Rser=0.1
SYMBOL cap 1856 912 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL RES 1984 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
FLAG 2000 896 OUT
FLAG 2000 1008 0
FLAG 1344 1008 0
FLAG 1872 1008 0
FLAG 1344 896 IN
FLAG 1680 1024 0
TEXT 1960 1064 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC5505-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC5505-2.asy)
XU1 N003 0 N001 OUT N001 LTC5505-2 ;pnba RFin)GND)_SHDN)Vout)Vcc
C1 N002 N004 .3p
R1 N003 N002 100
V1 N001 0 3.3
V2 N004 0 SINE(0 {V} 1G)
.tran 1u
.step param V list 1m 10m 100m 1
.lib LTC5505-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 80 -272 80
WIRE 192 80 32 80
WIRE -272 96 -272 80
WIRE 192 112 192 80
WIRE -64 176 -176 176
WIRE 64 176 16 176
WIRE -272 192 -272 176
WIRE -176 192 -176 176
WIRE 352 256 320 256
WIRE -176 288 -176 256
WIRE 32 336 32 80
WIRE 64 336 32 336
WIRE -176 384 -176 368
WIRE 192 416 192 400
SYMBOL cap -192 192 R0
SYMATTR InstName C1
SYMATTR Value .3p
SYMBOL voltage -272 80 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 32 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL SpecialFunctions\\LTC5505-2 192 256 R0
SYMATTR InstName U1
SYMBOL voltage -176 272 R0
WINDOW 3 16 96 Left 2
SYMATTR Value SINE(0 {V} 1G)
SYMATTR InstName V2
FLAG -272 192 0
FLAG -176 384 0
FLAG 192 416 0
FLAG 352 256 OUT
TEXT 264 440 Left 2 !.tran 1u\n.step param V list 1m 10m 100m 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6275.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6275.asy)
V2 -V 0 -15
R2 N002 N001 1K
V3 N001 0 SINE(0 10 3Meg)
R1 N003 N002 1K
XU1 0 N002 +V -V N003 LT6275 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
.tran 10u
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -112 0 -112
WIRE 256 -112 224 -112
WIRE 288 -112 256 -112
WIRE 416 -112 368 -112
WIRE 0 -96 0 -112
WIRE -336 -80 -336 -96
WIRE -176 -80 -176 -96
WIRE 0 0 0 -16
WIRE 336 0 336 -16
WIRE -336 16 -336 0
WIRE -176 16 -176 0
WIRE 256 16 256 -112
WIRE 304 16 256 16
WIRE 416 32 416 -112
WIRE 416 32 368 32
WIRE 304 48 288 48
WIRE 336 80 336 64
SYMBOL voltage -176 -96 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 384 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -336 -96 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL LT6275 336 32 R0
SYMATTR InstName U1
SYMBOL res 240 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 0 -112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 10 3Meg)
FLAG -336 16 0
FLAG -176 16 0
FLAG -336 -96 +V
FLAG -176 -96 -V
FLAG 336 -16 +V
FLAG 336 80 -V
FLAG 0 0 0
FLAG 288 48 0
TEXT 432 136 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\22615a76f309_Fig_4-8_AND-b.asc
* Generated by LTspice 26.0.1 for Windows.
A1 N001 N002 0 0 0 0 OUT 0 AND Vhigh=5, Trise=50n, Tfall=100n
V1 N002 0 PULSE(0 5 0.1m 1n 1n 0.1m 0.2m)
V2 N001 0 PULSE(0 5 0.15m 1n 1n 0.1m 0.2m)
.tran 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 128 -16 128
WIRE 176 144 80 144
WIRE 304 144 240 144
WIRE 176 160 160 160
WIRE -16 176 -16 128
WIRE 80 176 80 144
WIRE 160 176 160 160
WIRE 176 176 160 176
WIRE 160 192 160 176
WIRE 176 192 160 192
WIRE 160 208 160 192
WIRE 192 208 192 192
WIRE 192 208 160 208
WIRE 192 224 192 208
WIRE -16 272 -16 256
WIRE 80 272 80 256
FLAG 192 224 0
FLAG -16 272 0
FLAG 80 272 0
FLAG 304 144 OUT
SYMBOL Digital\\and 208 96 R0
WINDOW 3 -242 -3 Left 2
SYMATTR Value Vhigh=5, Trise=50n, Tfall=100n
SYMATTR InstName A1
SYMBOL voltage 80 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0.1m 1n 1n 0.1m 0.2m)
SYMBOL voltage -16 160 R0
WINDOW 3 -7 149 Left 2
SYMATTR Value PULSE(0 5 0.15m 1n 1n 0.1m 0.2m)
SYMATTR InstName V2
TEXT 280 200 Left 2 !.tran 1m
* Z:\tmp\asc_dec_bjh7r6w2\0c298e41e5dc_5k_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N009 0 10K
C5 N005 N007 .22
M1 N001 N006 N007 N007 Si4410DY
V1 N001 0 6
V2 X IN SINE(0 10m 5K)
L1 N007 N008 1.5
R4 X 0 10K
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 3
SHEET 1 1176 688
WIRE 288 372 288 364
WIRE 344 372 344 364
WIRE 260 232 252 232
WIRE 200 296 192 296
WIRE 596 344 596 336
WIRE 680 344 680 320
WIRE 628 344 628 320
WIRE 212 236 212 224
WIRE 444 304 444 300
WIRE 236 328 224 328
WIRE 252 264 240 264
WIRE 260 264 252 264
WIRE 572 332 372 332
WIRE 572 272 572 332
WIRE 568 272 572 272
WIRE 596 272 572 272
WIRE 596 288 596 272
WIRE 628 272 596 272
WIRE 628 304 628 272
WIRE 680 272 628 272
WIRE 680 300 680 272
WIRE 444 228 444 192
WIRE 212 192 280 192
WIRE 212 204 212 192
WIRE 252 296 240 296
WIRE 260 296 252 296
WIRE 420 200 384 200
WIRE 260 328 252 328
WIRE 544 316 372 316
WIRE 544 272 544 316
WIRE 532 272 544 272
WIRE 548 272 544 272
WIRE 584 348 452 348
WIRE 584 312 584 348
WIRE 596 312 584 312
WIRE 596 316 596 312
WIRE 596 308 596 312
WIRE 444 276 444 272
WIRE 444 252 444 272
WIRE 432 296 372 296
WIRE 432 248 372 248
WIRE 420 200 420 204
WIRE 420 220 420 224
WIRE 492 272 492 280
WIRE 492 296 492 304
WIRE 280 212 280 192
WIRE 372 272 384 272
WIRE 512 272 492 272
WIRE 492 272 444 272
WIRE 372 232 384 232
WIRE 384 232 384 252
WIRE 384 268 384 272
WIRE 384 272 444 272
WIRE 352 212 352 200
WIRE 352 200 384 200
WIRE 384 200 384 212
WIRE 384 228 384 232
WIRE 316 212 316 204
WIRE 224 264 192 264
WIRE 224 296 220 296
WIRE 280 192 444 192
WIRE 416 348 396 348
WIRE 396 348 372 348
WIRE 452 348 436 348
SYMBOL RES 224 292 R90
WINDOW 0 0 14 Right 0
WINDOW 3 8 14 Left 0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL cap 380 252 R0
WINDOW 0 6 2 Left 0
WINDOW 3 8 13 Left 0
SYMATTR InstName C5
SYMATTR Value .22U
SYMBOL NMOS 432 228 R0
WINDOW 0 14 8 Left 0
WINDOW 3 14 18 Left 0
SYMATTR InstName M1
SYMATTR Value Si4410DY
SYMBOL VOLTAGE 212 200 R0
WINDOW 0 6 4 Left 0
WINDOW 3 6 24 Left 0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL voltage 440 348 R90
WINDOW 0 -7 14 Right 0
WINDOW 3 8 14 Left 0
WINDOW 39 24 14 Left 0
WINDOW 123 40 14 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 10m 5K)
SYMBOL ind 508 276 R270
WINDOW 0 8 14 Left 0
WINDOW 3 1 14 Right 0
SYMATTR InstName L1
SYMATTR Value 1.5U
SYMBOL res 592 312 R0
WINDOW 0 9 11 Left 0
WINDOW 3 9 20 Left 0
SYMATTR InstName R4
SYMATTR Value 10K
FLAG 288 372 GND
FLAG 344 372 GND
FLAG 192 296 GND
FLAG 192 264 GND
FLAG 596 344 GND
FLAG 680 344 GND
FLAG 628 344 GND
FLAG 212 236 GND
FLAG 444 304 GND
FLAG 224 328 GND
FLAG 252 264 S/S
FLAG 628 272 OUT
FLAG 252 296 VC
FLAG 420 224 GND
FLAG 492 304 GND
FLAG 396 348 IN
FLAG 452 348 X
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3007.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3007.asy)
C1 OUT 0 1
XU1 IN OUT OUT 0 IN LT3008 ;pnba IN)OUT)ADJ)GND)_SHDN
V1 IN 0 PWL(0 0 1 10)
Rload OUT 0 60
.tran 1
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL PowerProducts\\LT3007 176 96 R0
SYMATTR InstName U1
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 60
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 336 248 Left 2 !.tran 1