Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0dc4148e1cfb_VA-R.asc
* Generated by LTspice 26.0.1 for Windows.
D1 b a RFU02VS8S
V1 a 0
R1 b 0 10k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 100
.step temp list -25 50 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 128 -144 128
WIRE 240 128 80 128
WIRE -144 192 -144 128
WIRE 240 192 240 128
WIRE -144 352 -144 272
WIRE 48 352 -144 352
WIRE 240 352 240 272
WIRE 240 352 48 352
WIRE 48 368 48 352
SYMBOL voltage -144 176 R0
WINDOW 3 24 96 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value ""
SYMATTR InstName V1
SYMBOL Misc\\EuropeanResistor 224 176 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL diode 80 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value RFU02VS8S
FLAG -144 128 a
FLAG 240 128 b
FLAG 48 368 0
TEXT -144 392 Left 2 !.dc V1 0 100
TEXT -152 424 Left 2 !.step temp list -25 50 100
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX4128.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX4128.asy)
RL OUT 0 100k
XU1 IN OUT Vcc Vee OUT MAX4128 ;pnba In+)In-)V+)V-)OUT
Vee 0 Vee 2.5
CL OUT 0 10p
Vcc Vcc 0 2.5
V1 IN 0 SINE(0 50m 100k)
.tran 10u
.lib MAX4128.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 560 256 304 256
WIRE 64 288 64 272
WIRE 432 352 432 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 560 384 560 256
WIRE 560 384 464 384
WIRE 656 384 560 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 560 416 560 384
WIRE 656 432 656 384
WIRE 64 448 64 400
WIRE 432 448 432 416
WIRE 304 496 304 400
WIRE 560 528 560 496
WIRE 656 528 656 496
WIRE 64 544 64 528
WIRE 304 592 304 576
SYMBOL cap 640 432 R0
SYMATTR InstName CL
SYMATTR Value 10p
SYMBOL MAX4128 432 320 R0
SYMATTR InstName U1
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL res 544 400 R0
SYMATTR InstName RL
SYMATTR Value 100k
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 100k)
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
FLAG 656 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 432 320 Vcc
FLAG 432 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 560 528 0
FLAG 304 400 IN
FLAG 656 528 0
TEXT 14 628 Left 2 !.tran 10u
* Z:\tmp\asc_dec_bjh7r6w2\190e9792b074_LT1631_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 N006 47p
R1 N002 N001 2.32K
R4 N004 N003 2.74K
V1 +V 0 10
XU1 N008 N006 +V 0 N002 LT1630 ;pnba In+)In-)V+)V-)OUT
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1631.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1020 680
WIRE 256 96 144 96
WIRE 416 96 336 96
WIRE 688 96 576 96
WIRE 848 96 768 96
WIRE -160 160 -160 144
WIRE 48 160 -32 160
WIRE 192 160 144 160
WIRE 288 160 272 160
WIRE 320 160 288 160
WIRE 416 160 416 96
WIRE 416 160 384 160
WIRE 464 160 416 160
WIRE 576 160 576 96
WIRE 576 160 544 160
WIRE 624 160 576 160
WIRE 720 160 704 160
WIRE 752 160 720 160
WIRE 848 160 848 96
WIRE 848 160 816 160
WIRE -32 176 -32 160
WIRE 576 176 576 160
WIRE -160 256 -160 240
WIRE 352 256 352 240
WIRE 576 256 576 240
WIRE 784 256 784 240
WIRE -32 272 -32 256
WIRE 288 272 288 160
WIRE 320 272 288 272
WIRE 720 272 720 160
WIRE 752 272 720 272
WIRE 416 288 416 160
WIRE 416 288 384 288
WIRE 848 288 848 160
WIRE 320 304 288 304
WIRE 352 336 352 320
WIRE 288 368 288 304
WIRE 512 368 288 368
WIRE 720 368 512 368
WIRE 512 384 512 368
SYMBOL cap 384 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 47p
SYMBOL res 352 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2.32K
SYMBOL res 784 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2.74K
SYMBOL voltage -160 144 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL opamps\\LT1631 352 224 R0
SYMATTR InstName U1
FLAG -160 256 0
FLAG 352 240 +V
FLAG -160 144 +V
FLAG 352 336 0
FLAG 784 240 +V
FLAG 576 256 0
FLAG -32 272 0
FLAG -32 160 IN
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1634-4.096.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1634-4.096.asy)
R1 N001 N002 90K
XU1 N002 0 LT1634-4.096 ;pnba VCC)VEE
V1 N001 0 5
.dc temp -40 80 .1
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 144 48 144
WIRE 272 144 208 144
WIRE 48 160 48 144
WIRE 272 176 272 144
WIRE 48 256 48 240
WIRE 272 256 272 240
SYMBOL References\\LT1634-4.096 272 208 R0
SYMATTR InstName U1
SYMBOL voltage 48 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 112 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 90K
FLAG 272 256 0
FLAG 48 256 0
TEXT 72 312 Left 2 !.dc temp -40 80 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2503-4.5.asc
* Generated by LTspice 26.0.1 for Windows.
* PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2503-4.5.asy)
V1 IN 0 3.3
XU1 N001 N002 OUT IN IN 0 OUT NC_01 ADP2503-4.5 ;pnba SW1)SW2)FB)EN)PVin)GND)Vout)Sync
C1 OUT 0 10
L1 N001 N002 1.5 Rser=80m
Rload OUT 0 50
.tran 400u startup
.lib ADP2503-4.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 48 64 32 64
WIRE 336 64 304 64
WIRE -64 80 -64 64
WIRE 32 144 32 64
WIRE 48 144 32 144
WIRE 336 144 304 144
WIRE -64 176 -64 160
WIRE 320 224 304 224
WIRE 368 224 320 224
WIRE 480 224 368 224
WIRE 368 240 368 224
WIRE 480 240 480 224
WIRE 48 304 32 304
WIRE 320 304 320 224
WIRE 320 304 304 304
WIRE 368 336 368 304
WIRE 480 336 480 320
SYMBOL cap 352 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ADP2503-4.5 176 176 R0
SYMATTR InstName U1
SYMBOL voltage -64 64 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL ind 320 48 R0
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=80m
SYMBOL res 464 224 R0
SYMATTR InstName Rload
SYMATTR Value 50
FLAG 368 336 0
FLAG 32 304 0
FLAG -64 176 0
FLAG 480 336 0
FLAG -64 64 IN
FLAG 480 224 OUT
TEXT 424 392 Left 2 !.tran 400u startup
TEXT 184 0 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\315734bb5648_InaD.asc
* Generated by LTspice 26.0.1 for Windows.
* .tran 5
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX41400.asy)
XU1 0 0 0 0 Vref N001 Out Vref Vcc Vcc MAX41400 ;pnba G0)G1)G2)GND)INM)INP)OUT)REFIN)SHDN_)VDD
V1 Vcc 0 3.3V
V3 N001 0 SINE(1.65 10m 1) AC 1
V2 Vref 0 1.65
.noise V(OUT) V3 dec 100 0.1 100
.lib MAX41400.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -208 -64 -208 -80
WIRE -80 -64 -80 -80
WIRE -208 32 -208 16
WIRE -80 32 -80 16
WIRE 320 224 320 192
WIRE 352 224 352 176
WIRE 384 224 384 176
WIRE 416 224 416 176
WIRE 288 288 -96 288
WIRE 496 320 448 320
WIRE 512 320 496 320
WIRE 288 352 240 352
WIRE -96 384 -96 368
WIRE 320 432 320 416
WIRE 416 432 416 416
WIRE 368 448 368 416
SYMBOL voltage -96 272 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value SINE(1.65 10m 1)
SYMBOL voltage -208 -80 R0
SYMATTR InstName V1
SYMATTR Value 3.3V
SYMBOL voltage -80 -80 R0
SYMATTR InstName V2
SYMATTR Value 1.65
SYMBOL OpAmps\\MAX41400 320 320 R0
SYMATTR InstName U1
FLAG 320 432 0
FLAG 416 176 0
FLAG 384 176 0
FLAG 352 176 0
FLAG -208 32 0
FLAG -208 -80 Vcc
FLAG 320 192 Vcc
FLAG 368 448 Vcc
FLAG -80 32 0
FLAG -80 -80 Vref
FLAG 416 432 Vref
FLAG -96 384 0
FLAG 240 352 Vref
FLAG 496 320 Out
TEXT 328 120 Left 2 ;.tran 5
TEXT -152 232 Left 2 !.noise V(OUT) V3 dec 100 0.1 100
* Z:\tmp\asc_dec_bjh7r6w2\185ffd058f9b_lo_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
C7 N005 N004 0.1
A1 N002 0 N005 0 0 0 N003 0 DFLOP
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3044 748
WIRE 2192 -304 2016 -304
WIRE 2448 -304 2368 -304
WIRE 2016 -256 2016 -304
WIRE 2368 -256 2368 -304
WIRE 2448 -256 2448 -304
WIRE 2864 -256 2448 -256
WIRE 2448 -192 2448 -256
WIRE 2192 -176 2192 -304
WIRE 2016 -144 2016 -176
WIRE 2368 -144 2320 -144
WIRE 2672 -144 2528 -144
WIRE 2080 -96 2016 -96
WIRE 2192 -96 2144 -96
WIRE 2288 -96 2192 -96
WIRE 2368 -96 2288 -96
WIRE 2016 -48 2016 -96
WIRE 2448 -32 2448 -48
WIRE 2864 -32 2448 -32
WIRE 2448 0 2448 -32
WIRE 2016 80 2016 32
WIRE 2320 80 2320 -144
WIRE 3008 80 2320 80
WIRE 2288 128 2288 -96
SYMBOL cap 2144 -112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C7
SYMATTR Value 0.1
SYMBOL Digital\\dflop 2448 -192 R0
SYMATTR InstName A1
FLAG 2016 80 0
FLAG 2368 -256 0
FLAG 2448 0 0
FLAG 2192 -16 0
FLAG 2016 -144 0
* Z:\home\khalils\Downloads\files\data\raw_asc\5e25d64eb5c6_blinky-diode-curve-open.asc
* Generated by LTspice 26.0.1 for Windows.
* At 1W input power and SWR 1:infinity, the ADC voltage will be 388mV\nand the diode current will be 1mA.
R4 N003 0 50
C2 N002 0 1n
V1 src_hi src_lo SINE(0 20 7MEG)
D1 load_hi N001 DI_1N5711
C_SH ADC 0 14p
R_ADC N002 ADC 50k
C1 N001 0 1n
R6 N002 N001 150k
R1 load_hi src_hi 25
R7 0 N002 10k
R3 0 load_hi 50
R2 N003 src_lo 25
R5 load_hi N003 1Meg
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.00000001 .001 0.000999
.include spicemodels_schottky_diodes.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1676 680
WIRE -112 112 -144 112
WIRE -64 112 -112 112
WIRE 64 112 64 64
WIRE 64 112 16 112
WIRE 144 112 64 112
WIRE 176 112 144 112
WIRE 272 112 240 112
WIRE 336 112 272 112
WIRE 496 112 416 112
WIRE 560 112 496 112
WIRE 624 112 560 112
WIRE 752 112 704 112
WIRE 800 112 752 112
WIRE 496 128 496 112
WIRE 272 144 272 112
WIRE 560 144 560 112
WIRE 752 144 752 112
WIRE 64 160 64 112
WIRE 272 224 272 208
WIRE 496 224 496 208
WIRE 560 224 560 208
WIRE 752 224 752 208
WIRE -112 240 -112 112
WIRE 144 240 144 112
WIRE 64 272 64 240
WIRE 64 272 16 272
WIRE 16 288 16 272
WIRE 64 336 64 272
WIRE -112 464 -112 320
WIRE -112 464 -144 464
WIRE -64 464 -112 464
WIRE 64 464 64 416
WIRE 64 464 16 464
WIRE 144 464 144 320
WIRE 144 464 64 464
IOPIN 800 112 Out
SYMBOL res 432 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 150k
SYMBOL cap 544 144 R0
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL cap 736 144 R0
SYMATTR InstName C_SH
SYMATTR Value 14p
SYMBOL res 32 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 43 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 25
SYMBOL voltage -112 224 R0
WINDOW 3 -120 103 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 20 7MEG)
SYMATTR InstName V1
SYMBOL res 80 432 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 50
SYMBOL res 512 224 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R7
SYMATTR Value 10k
SYMBOL res 80 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 50
SYMBOL res 128 224 R0
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL cap 256 144 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 608 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R_ADC
SYMATTR Value 50k
SYMBOL res 32 448 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 25
SYMBOL schottky 176 128 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 83 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value DI_1N5711
SYMATTR Description Diode
SYMATTR Type diode
FLAG 16 288 0
FLAG 272 224 0
FLAG 496 224 0
FLAG 752 224 0
FLAG 800 112 ADC
FLAG 64 64 load_hi
FLAG -144 112 src_hi
FLAG -144 464 src_lo
FLAG 560 224 0
TEXT 272 304 Left 2 !.tran 0.00000001 .001 0.000999
TEXT 272 336 Left 2 !.include spicemodels_schottky_diodes.txt
TEXT 208 416 Left 2 ;At 1W input power and SWR 1:infinity, the ADC voltage will be 388mV\nand the diode current will be 1mA.
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG5236.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG5236.asy)
V5 N001 0 SINE(0 10 2k)
XU1 IN SA N001 SB -V 0 +V ADG5236 ;pnba IN)SA)D)SB)Vss)GND)Vdd
R1 SA 0 1K
R2 SB 0 1K
V2 -V 0 -15
V4 IN 0 pulse(0 3.3 0 1u 1u 5m 10m)
V1 +V 0 15
.tran 30m
.lib ADG5236.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -752 -368 -800 -368
WIRE -800 -320 -800 -368
WIRE -1216 -256 -1216 -272
WIRE -1088 -256 -1104 -256
WIRE -928 -256 -1008 -256
WIRE -896 -256 -928 -256
WIRE -656 -224 -704 -224
WIRE -544 -224 -576 -224
WIRE -1040 -192 -1104 -192
WIRE -928 -192 -960 -192
WIRE -896 -192 -928 -192
WIRE -1216 -160 -1216 -176
WIRE -896 -128 -1072 -128
WIRE -1216 -48 -1216 -64
WIRE -1072 -16 -1072 -128
WIRE -736 0 -736 -16
WIRE -864 16 -864 -16
WIRE -832 16 -864 16
WIRE -1216 48 -1216 32
WIRE -1072 80 -1072 64
SYMBOL res -992 -240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -1216 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -672 -224 R270
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 47 41 VRight 2
WINDOW 3 -46 -22 VRight 2
SYMATTR InstName V5
SYMATTR Value SINE(0 10 2k)
SYMBOL res -944 -176 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -1072 -32 R0
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMBOL voltage -1216 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL ADG5236 -800 -176 R0
SYMATTR InstName U1
FLAG -1216 48 0
FLAG -1216 -160 0
FLAG -1216 -272 +V
FLAG -1216 -64 -V
FLAG -544 -224 0
FLAG -1072 80 0
FLAG -1104 -256 0
FLAG -1104 -192 0
FLAG -752 -368 +V
FLAG -736 0 0
FLAG -832 16 -V
FLAG -1072 -128 IN
FLAG -928 -256 SA
FLAG -928 -192 SB
TEXT -672 -80 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\2f2780c0ee97_TP2_zener_1.asc
* Generated by LTspice 26.0.1 for Windows.
D2 0 N002 1N5357B
R1 Vo N001 1K
V1 N001 0 SINE(0 24 50 0 20m 0)
D1 Vo N002 1N5338B
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model 1N5338B D(IS=1n RS=1 N=1.3 BV=5.1 IBV=240m CJO=200p TT=1u)
.model 1N5357B D(IS=1n RS=1 N=1.3 BV=20 IBV=65m CJO=200p TT=1u)
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 928 680
WIRE 176 96 96 96
WIRE 336 96 256 96
WIRE 448 96 336 96
WIRE 336 128 336 96
WIRE 96 176 96 96
WIRE 336 240 336 192
WIRE 96 336 96 256
WIRE 208 336 96 336
WIRE 336 336 336 304
WIRE 336 336 208 336
WIRE 208 368 208 336
SYMBOL zener 320 128 R0
SYMATTR InstName D1
SYMATTR Value 1N5338B
SYMBOL voltage 96 160 R0
WINDOW 3 -101 108 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 24 50 0 20m 0)
SYMATTR InstName V1
SYMBOL res 272 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL zener 352 304 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N5357B
FLAG 448 96 Vo
FLAG 208 368 0
TEXT 8 408 Left 2 !.model 1N5338B D(IS=1n RS=1 N=1.3 BV=5.1 IBV=240m CJO=200p TT=1u)\n.model 1N5357B D(IS=1n RS=1 N=1.3 BV=20 IBV=65m CJO=200p TT=1u)
TEXT 8 464 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3011.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3011.asy)
C2 0 N002 1000p
Rload OUT 0 1K
C1 OUT 0 1
V1 IN 0 PWL(0 0 10m 10)
R1 IN N001 1.6Meg
XU1 OUT OUT N002 0 IN N001 MP_01 IN LT3011 ;pnba OUT)ADJ)Ct)GND)_SHDN)PWRGD))Vin
.tran 10m
.lib LT3010.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1172 680
WIRE -80 48 -336 48
WIRE 0 48 -80 48
WIRE 32 48 0 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -336 64 -336 48
WIRE 512 64 512 48
WIRE 416 80 416 48
WIRE -80 128 -80 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -336 160 -336 144
WIRE 416 160 416 144
WIRE 512 160 512 144
WIRE -80 240 -80 208
WIRE 32 240 -80 240
WIRE 336 240 320 240
WIRE 416 240 400 240
WIRE 176 304 176 288
SYMBOL voltage -336 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 10m 10)
SYMBOL cap 400 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL res -96 112 R0
SYMATTR InstName R1
SYMATTR Value 1.6Meg
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL cap 400 80 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LT3011 176 144 R0
SYMATTR InstName U1
FLAG -336 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 304 0
FLAG -336 48 IN
FLAG 512 48 OUT
FLAG 416 240 0
TEXT 512 248 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8061-8.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8061-8.2.asy)
C3 N001 0 4.7
V1 IN 0 12
C1 OUT 0 .1m
XU1 N001 N001 N001 N002 N003 0 N005 N004 OUT IN OUT MP_01 0 LTM8061-8.2 ;pnba Vin)VinC/CLP)RUN)_CHRG)_Fault)TMR)RNG/SS)NTC)BAT)VinA)Bias))GND
.tran 3m startup
.lib LTM8061-8.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 80 -64 -32 -64
WIRE 384 -64 368 -64
WIRE 496 -64 384 -64
WIRE -32 -48 -32 -64
WIRE 496 -48 496 -64
WIRE 80 32 64 32
WIRE 384 32 384 -64
WIRE 384 32 368 32
WIRE 496 32 496 16
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 80 128 64 128
WIRE 384 128 368 128
WIRE -16 224 -32 224
WIRE 64 224 64 128
WIRE 64 224 48 224
WIRE 80 224 64 224
WIRE 384 224 368 224
WIRE 80 320 64 320
WIRE 384 320 368 320
WIRE 80 416 64 416
WIRE 384 416 368 416
SYMBOL cap 48 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 4.7
SYMBOL cap 480 -48 R0
SYMATTR InstName C1
SYMATTR Value .1m
SYMBOL voltage -32 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL PowerProducts\\LTM8061-8.2 224 176 R0
SYMATTR InstName U1
FLAG 64 416 0
FLAG -32 48 0
FLAG 496 32 0
FLAG -32 -64 IN
FLAG 496 -64 OUT
FLAG -32 224 0
FLAG 64 320 0
TEXT 488 416 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1555c9ae9d88_Prob_4c2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 0 Vgs 0.9
M1 Vds Vgs 0 0 pch_tt
V2 0 Vds 1.8V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.dc V2 0 1.8 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 144 -32 144
WIRE -32 160 -32 144
WIRE -32 160 -176 160
WIRE -176 176 -176 160
WIRE -32 176 -32 160
WIRE -352 256 -384 256
WIRE -224 256 -352 256
WIRE -352 272 -352 256
WIRE -176 288 -176 272
WIRE -32 288 -32 256
WIRE -352 368 -352 352
IOPIN -384 256 In
IOPIN 0 144 Out
SYMBOL voltage -32 272 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.8V
SYMBOL voltage -352 368 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0.9
SYMBOL pmos -224 176 R0
SYMATTR InstName M1
SYMATTR Value pch_tt
FLAG -352 368 0
FLAG -176 288 0
FLAG -32 288 0
FLAG -384 256 Vgs
FLAG 0 144 Vds
TEXT -464 184 Left 2 !.include TSMC180.lib
TEXT -464 216 Left 2 !.dc V2 0 1.8 0.01
* Z:\tmp\asc_dec_bjh7r6w2\0919bb51b19b_beta_measuring2_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
R2 N001 N002 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 112 288 112
WIRE 320 112 304 112
WIRE 160 224 160 176
WIRE 160 224 96 224
WIRE 208 224 160 224
WIRE 304 224 304 112
WIRE 304 224 288 224
SYMBOL voltage 304 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 304 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100
FLAG 400 112 0
* Z:\home\khalils\Downloads\files\data\raw_asc\2a82b59b85cc_Draft5.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc V1 -10 10 10m
R4 0 vs 10k
V2 Vss 0 10
M1 Vdd Vg2 vs vs IRLHS6242
R2 Vg1 Vp 1.1k
V3 Vdd 0 10
R3 Vg1 Vss 10k
R5 Vg2 Vp 470
M2 vd Vg1 Vss Vss FQB11P06
V1 Vp 0 SINE(0 10 1000 0 0 0 0) Rser=1m
R1 0 vd 100
R6 Vg2 0 10k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 5m 0 100n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1092 680
WIRE 160 0 16 0
WIRE 320 0 256 0
WIRE 400 0 320 0
WIRE 848 0 720 0
WIRE 1008 0 944 0
WIRE 1072 0 1008 0
WIRE -224 48 -224 0
WIRE 48 64 16 64
WIRE 144 64 128 64
WIRE 176 64 176 48
WIRE 176 64 144 64
WIRE 240 64 176 64
WIRE 400 64 400 0
WIRE 576 64 576 16
WIRE 1072 64 1072 0
WIRE 240 96 240 64
WIRE 752 96 720 96
WIRE 864 96 832 96
WIRE 928 96 928 48
WIRE 928 96 864 96
WIRE 928 128 928 96
WIRE -224 192 -224 128
WIRE 400 192 400 144
WIRE 1072 192 1072 144
WIRE 576 208 576 144
WIRE 240 224 240 176
WIRE 240 224 176 224
WIRE 928 240 928 208
WIRE -224 352 -224 304
WIRE -224 464 -224 432
SYMBOL voltage -224 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 10
SYMBOL res 848 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 470
SYMBOL res 1088 160 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL voltage 576 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL nmos 848 48 R270
SYMATTR InstName M1
SYMATTR Value IRLHS6242
SYMBOL res 224 80 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL pmos 256 48 M270
SYMATTR InstName M2
SYMATTR Value FQB11P06
SYMBOL res 912 112 R0
SYMATTR InstName R6
SYMATTR Value 10k
SYMBOL res 416 160 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage -224 336 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 24 72 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10 1000 0 0 0 0)
SYMATTR SpiceLine Rser=1m
SYMBOL res 144 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1.1k
FLAG -224 192 0
FLAG 400 192 0
FLAG -224 464 0
FLAG 1072 192 0
FLAG -224 0 Vss
FLAG 720 0 Vdd
FLAG 16 0 Vss
FLAG -224 304 Vp
FLAG 16 64 Vp
FLAG 720 96 Vp
FLAG 176 224 Vss
FLAG 928 240 0
FLAG 576 208 0
FLAG 576 16 Vdd
FLAG 1008 0 vs
FLAG 320 0 vd
FLAG 144 64 Vg1
FLAG 864 96 Vg2
TEXT -272 -144 Left 2 !.tran 0 5m 0 100n
TEXT -280 -176 Left 2 ;.dc V1 -10 10 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1844-SD.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1844-SD.asy)
Rload OUT 0 34
V1 IN 0 PWL(0 0 1 6.5)
R3 N001 0 100k
R2 OUT N001 301k
XU1 IN 0 IN N001 OUT LTC1844-SD ;pnba IN)GND)_SHDN)ADJ)OUT
C1 OUT 0 1
.tran 1
.lib LTC1844-SD.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1940 1316
WIRE 64 80 -32 80
WIRE 80 80 64 80
WIRE 416 80 368 80
WIRE 528 80 416 80
WIRE 608 80 528 80
WIRE -32 96 -32 80
WIRE 608 96 608 80
WIRE 416 112 416 80
WIRE 528 112 528 80
WIRE -32 192 -32 176
WIRE 528 192 528 176
WIRE 608 192 608 176
WIRE 64 240 64 80
WIRE 80 240 64 240
WIRE 416 240 416 192
WIRE 416 240 368 240
WIRE 416 256 416 240
WIRE 224 304 224 288
WIRE 416 352 416 336
SYMBOL cap 512 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL LTC1844-SD 224 160 R0
SYMATTR InstName U1
SYMBOL voltage -32 80 R0
WINDOW 3 -89 162 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PWL(0 0 1 6.5)
SYMATTR InstName V1
SYMBOL res 400 96 R0
SYMATTR InstName R2
SYMATTR Value 301k
SYMBOL res 400 240 R0
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 592 80 R0
SYMATTR InstName Rload
SYMATTR Value 34
FLAG 224 304 0
FLAG -32 192 0
FLAG 608 192 0
FLAG 608 80 OUT
FLAG -32 80 IN
FLAG 528 192 0
FLAG 416 352 0
TEXT 184 368 Left 2 !.tran 1