Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4415.asc
* Generated by LTspice 26.0.1 for Windows.
R1 IN1 N002 47K
R2 IN1 N004 47K
R3 IN1 N006 47K
R4 IN1 N007 47K
R5 N003 0 124
V1 IN2 0 3.6
C1 OUT 0 47
R6 N005 0 124
R7 IN1 N001 100K
R8 N001 0 21.5K
V2 IN1 0 PWL(0 0 100u 5 1m 5 +.1u 1 +150u 1 +.1u 5)
Rload OUT 0 3.6
XU2 IN1 N001 N003 N005 N001 IN2 OUT N007 N006 N004 N002 OUT 0 LTC4415 ;pnba IN1)EN1)CLIM1)CLIM2)_EN2)IN2)OUT2)_STAT2)_WARN2)_WARN1)_STAT1)OUT1)GND
.tran 2m
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4415.asy)
.lib LTC4415.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1508 752
WIRE 592 -64 80 -64
WIRE -176 16 -784 16
WIRE 80 16 80 -64
WIRE 80 16 -176 16
WIRE 128 16 80 16
WIRE 640 16 384 16
WIRE 704 16 640 16
WIRE 816 16 704 16
WIRE -784 32 -784 16
WIRE 704 32 704 16
WIRE 816 32 816 16
WIRE -176 48 -176 16
WIRE 128 80 -64 80
WIRE 400 80 384 80
WIRE 592 80 592 -64
WIRE 592 80 480 80
WIRE -784 128 -784 112
WIRE 704 128 704 96
WIRE 816 128 816 112
WIRE -176 144 -176 128
WIRE -64 144 -64 80
WIRE -64 144 -176 144
WIRE 32 144 -32 144
WIRE 128 144 112 144
WIRE 464 144 384 144
WIRE 592 144 592 80
WIRE 592 144 544 144
WIRE -176 160 -176 144
WIRE -16 208 -32 208
WIRE 128 208 64 208
WIRE 400 208 384 208
WIRE 592 208 592 144
WIRE 592 208 480 208
WIRE -176 256 -176 240
WIRE -64 272 -64 144
WIRE 128 272 -64 272
WIRE 496 272 384 272
WIRE 592 272 592 208
WIRE 592 272 576 272
WIRE 128 336 -192 336
WIRE 640 336 640 16
WIRE 640 336 384 336
WIRE -192 352 -192 336
WIRE 256 416 256 400
WIRE -192 448 -192 432
FLAG 256 416 0
FLAG -32 144 0
FLAG 704 128 0
FLAG 816 128 0
FLAG 816 16 OUT
FLAG -32 208 0
FLAG -192 448 0
FLAG -192 336 IN2
FLAG -176 256 0
FLAG -784 128 0
FLAG -784 16 IN1
SYMBOL res 496 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 47K
SYMBOL res 560 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 47K
SYMBOL res 496 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 47K
SYMBOL res 592 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 47K
SYMBOL res 128 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 124
SYMBOL voltage -192 336 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL cap 688 32 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMBOL res 80 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 124
SYMBOL res -192 32 R0
SYMATTR InstName R7
SYMATTR Value 100K
SYMBOL res -192 144 R0
SYMATTR InstName R8
SYMATTR Value 21.5K
SYMBOL voltage -784 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 100u 5 1m 5 +.1u 1 +150u 1 +.1u 5)
SYMBOL res 800 16 R0
SYMATTR InstName Rload
SYMATTR Value 3.6
SYMBOL LTC4415 256 160 R0
SYMATTR InstName U2
TEXT 552 400 Left 2 !.tran 2m
* Z:\home\khalils\Downloads\files\data\raw_asc\136dca42c4fa_Fig1_16.asc
* Generated by LTspice 26.0.1 for Windows.
R2 Vout 0 2k
R1 Vin Vout 1k
Vin Vin 0 1
.dc Vin 0 1 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 48 224 0 224
WIRE 112 224 48 224
WIRE 256 224 192 224
WIRE 288 224 256 224
WIRE 0 240 0 224
WIRE 288 240 288 224
WIRE 0 336 0 320
WIRE 288 336 288 320
SYMBOL res 272 224 R0
SYMATTR InstName R2
SYMATTR Value 2k
SYMBOL res 96 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 0 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 1
FLAG 0 336 0
FLAG 288 336 0
FLAG 256 224 Vout
FLAG 48 224 Vin
TEXT 40 400 Left 0 !.dc Vin 0 1 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8226.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8226.asy)
Rload OUT 0 10K
Vin N001 N004 SINE(0 100m 10K)
Vref N005 0 .5
XU1 N004 N002 N003 N001 -V N005 OUT +V AD8226 ;pnba IN-)RG1)RG2)IN+)VEE)REF)OUT)VCC
V1 +V 0 15
R1 N002 N003 5.49K
V2 -V 0 -15
Vcm N004 0 1
.tran 1m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 640 -1264 640 -1280
WIRE 752 -1264 752 -1280
WIRE 464 -1184 96 -1184
WIRE 640 -1168 640 -1184
WIRE 752 -1168 752 -1184
WIRE 96 -1152 96 -1184
WIRE 464 -1152 368 -1152
WIRE 752 -1104 640 -1104
WIRE 752 -1088 752 -1104
WIRE 368 -1056 368 -1072
WIRE 464 -1056 368 -1056
WIRE 96 -1024 96 -1072
WIRE 464 -1024 96 -1024
WIRE 576 -1024 576 -1040
WIRE 96 -1008 96 -1024
WIRE 752 -992 752 -1008
WIRE 576 -928 576 -944
WIRE 96 -912 96 -928
SYMBOL voltage 96 -1024 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 35 39 Left 2
SYMATTR InstName Vcm
SYMATTR Value 1
SYMBOL AD8226 496 -1104 R0
SYMATTR InstName U1
SYMBOL voltage 576 -1040 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName Vref
SYMATTR Value .5
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 752 -1280 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 96 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 100m 10K)
SYMBOL voltage 640 -1280 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 352 -1168 R0
SYMATTR InstName R1
SYMATTR Value 5.49K
FLAG 640 -1280 +V
FLAG 640 -1168 0
FLAG 752 -1104 OUT
FLAG 496 -1200 +V
FLAG 752 -1280 -V
FLAG 496 -1008 -V
FLAG 752 -992 0
FLAG 752 -1168 0
FLAG 96 -912 0
FLAG 576 -928 0
TEXT 696 -920 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\068b7fe980aa_Lab07P01B.asc
* Generated by LTspice 26.0.1 for Windows.
I1 0 N001 1
R1 N003 N001 1
R2 0 N003 40
R3 N003 N002 10
R4 N002 0 50
R5 N002 N001 15
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1624 680
WIRE 368 -96 112 -96
WIRE 704 -96 448 -96
WIRE 112 48 112 -96
WIRE 224 48 112 48
WIRE 416 48 304 48
WIRE 512 48 416 48
WIRE 704 48 704 -96
WIRE 704 48 592 48
WIRE 112 144 112 48
WIRE 416 144 416 48
WIRE 704 144 704 48
WIRE 112 336 112 224
WIRE 416 336 416 224
WIRE 416 336 112 336
WIRE 704 336 704 224
WIRE 704 336 416 336
FLAG 112 336 0
DATAFLAG 112 32 ""
SYMBOL current 112 224 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName I1
SYMATTR Value 1
SYMBOL res 320 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL res 432 240 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 40
SYMBOL res 496 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL res 688 128 R0
SYMATTR InstName R4
SYMATTR Value 50
SYMBOL res 464 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 15
TEXT 872 328 Left 2 !.op
* Z:\tmp\asc_dec_bjh7r6w2\060e74e992f4_Task1_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N003 X3 2{R}
R4 N004 X2 2{R}
R8 N005 N004 {R}
V5 X1 0 {V5}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 944 736
WIRE 576 16 576 -16
WIRE 464 32 464 -160
WIRE 544 32 464 32
WIRE 688 48 608 48
WIRE 128 64 -144 64
WIRE 176 64 128 64
WIRE 288 64 256 64
WIRE 320 64 288 64
WIRE 432 64 400 64
WIRE 544 64 432 64
WIRE 576 112 576 80
WIRE 128 128 128 64
WIRE 288 128 288 64
WIRE 432 128 432 64
WIRE 128 272 128 208
WIRE 288 272 288 208
WIRE 432 272 432 208
WIRE 288 480 288 448
WIRE 448 480 448 448
WIRE 624 480 624 448
WIRE 288 592 288 560
WIRE 448 592 448 560
WIRE 624 592 624 560
SYMBOL res 112 112 R0
SYMATTR InstName R3
SYMATTR Value 2{R}
SYMBOL res 272 112 R0
SYMATTR InstName R4
SYMATTR Value 2{R}
SYMBOL res 416 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R8
SYMATTR Value {R}
SYMBOL voltage 448 464 R0
SYMATTR InstName V5
SYMATTR Value {V5}
FLAG 432 272 X1
FLAG 288 272 X2
FLAG 128 272 X3
FLAG 288 448 X2
FLAG 448 448 X1
FLAG 288 592 0
FLAG 448 592 0
FLAG 576 112 Vcc-
FLAG 576 -16 Vcc+
FLAG 624 448 Vcc+
FLAG 624 592 0
* Z:\home\khalils\Downloads\files\data\raw_asc\0db4ef2d424e_Simulation3.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc V1 0 8 0.5
M1 N002 N005 N003 N003 NMOS
V2 N004 0 5
R2 N003 0 1k
V1 NC_01 N001 8
R3 N005 N004 1.875Meg
R1 N001 N002 1k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model NMOS4 NMOS l=60u w=135u kp=0.444 Vto=1v
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 988 680
WIRE 256 144 256 80
WIRE 256 272 256 224
WIRE 336 320 256 320
WIRE -144 352 -192 352
WIRE 48 352 -64 352
WIRE 208 352 128 352
WIRE 256 384 256 368
WIRE 336 384 336 320
WIRE 336 384 256 384
WIRE -192 400 -192 352
WIRE 256 416 256 384
WIRE 256 544 256 496
SYMBOL voltage 256 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 8
SYMBOL res 240 400 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -48 352 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 144 336 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1.875Meg
SYMBOL res 240 128 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL nmos4 208 272 R0
SYMATTR InstName M1
FLAG 256 544 0
FLAG -192 400 0
TEXT 344 352 Left 2 !.model NMOS4 NMOS l=60u w=135u kp=0.444 Vto=1v
TEXT -112 424 Left 2 ;.dc V1 0 8 0.5
TEXT -112 456 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6994-1.asc
* Generated by LTspice 26.0.1 for Windows.
* LTC6994-1 10ms Delay Interval Generator\nOutput Low When IN is Low\nRising Edge On IN Starts Delay to Output Rising Edge\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6994-1.asy)
R3 N004 0 392K
R1 N003 0 121K
R2 N002 N004 1000K
V1 N002 0 5
R4 OUT 0 100K
V2 N001 0 PULSE(3.3 0 0.25m 1n 1n 0.5m 25m 3)
XU1 N001 0 N003 N004 N002 OUT LTC6994-1 ;pnba IN)GND)SET)DIV)V+)OUT
.tran 100m startup
.lib LTC6994-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE -224 96 -240 96
WIRE 96 96 -144 96
WIRE 624 96 320 96
WIRE 624 112 624 96
WIRE 96 176 64 176
WIRE 400 176 320 176
WIRE 528 176 400 176
WIRE 400 192 400 176
WIRE 528 192 528 176
WIRE 624 208 624 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 352 256 320 256
WIRE 352 288 352 256
WIRE 400 288 400 272
WIRE 400 288 352 288
WIRE 528 288 528 272
WIRE 400 304 400 288
WIRE 400 400 400 384
SYMBOL voltage 528 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -128 96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(3.3 0 0.25m 1n 1n 0.5m 25m 3)
SYMATTR InstName V2
SYMBOL res 384 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL res 384 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
SYMBOL res 608 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL SpecialFunctions\\LTC6994-1 208 176 R0
SYMATTR InstName U1
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 121K
FLAG -240 96 0
FLAG 528 288 0
FLAG 624 96 OUT
FLAG 624 208 0
FLAG 400 400 0
FLAG -16 256 0
FLAG 64 176 0
TEXT 528 368 Left 2 !.tran 100m startup
TEXT 216 56 Bottom 2 ;LTC6994-1 10ms Delay Interval Generator\nOutput Low When IN is Low\nRising Edge On IN Starts Delay to Output Rising Edge\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\2aaa2a293fa5_Selectorbit.asc
* Generated by LTspice 26.0.1 for Windows.
E1 Vtrip 0 VDD 0 0.5
S1 BitA O Vtrip Select switmod
S2 BitB O Select Vtrip switmod
.model switmod SW
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 6308 700
WIRE 2240 -816 2240 -848
WIRE 2192 -736 2192 -752
WIRE 2240 -720 2240 -736
WIRE 1936 -640 1904 -640
WIRE 2128 -640 2016 -640
WIRE 2128 -496 2128 -640
WIRE 2256 -496 2128 -496
WIRE 1936 -352 1904 -352
WIRE 2128 -352 2128 -496
WIRE 2128 -352 2016 -352
FLAG 1904 -640 BitA
IOPIN 1904 -640 In
FLAG 2192 -800 VDD
IOPIN 2192 -800 In
FLAG 2240 -720 0
FLAG 2192 -736 0
FLAG 2240 -848 Vtrip
FLAG 2000 -688 Vtrip
FLAG 1952 -688 Select
IOPIN 1952 -688 In
FLAG 1952 -400 Vtrip
FLAG 2000 -400 Select
FLAG 1904 -352 BitB
IOPIN 1904 -352 In
FLAG 2256 -496 O
IOPIN 2256 -496 Out
SYMBOL e 2240 -832 R0
SYMATTR InstName E1
SYMATTR Value 0.5
SYMBOL sw 1920 -640 M90
WINDOW 3 24 -12 Left 0
WINDOW 38 39 67 Left 0
WINDOW 0 38 33 Left 0
SYMATTR Value ""
SYMATTR SpiceModel switmod
SYMATTR InstName S1
SYMBOL sw 1920 -352 M90
WINDOW 3 24 -12 Left 0
WINDOW 38 39 67 Left 0
WINDOW 0 38 33 Left 0
SYMATTR Value ""
SYMATTR SpiceModel switmod
SYMATTR InstName S2
TEXT 1832 -848 Left 0 !.model switmod SW
* Z:\home\khalils\Downloads\files\data\raw_asc\590f9a9a90a5_BUF.asc
* Generated by LTspice 26.0.1 for Windows.
M4 NC_10 NC_11 NC_12 NC_13 NMOS
M5 NC_14 NC_15 NC_16 NC_17 NMOS
M1 5V 2 2 NC_01 NMOS
M6 NC_18 NC_19 NC_20 NC_21 NMOS
M2 NC_02 NC_03 NC_04 NC_05 NMOS
M3 NC_06 NC_07 NC_08 NC_09 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -144 112 -144 0
WIRE -240 192 -256 192
WIRE -192 192 -240 192
WIRE -256 288 -256 192
WIRE -144 288 -144 208
WIRE -144 288 -256 288
SYMBOL nmos4 400 464 R0
SYMATTR InstName M5
SYMBOL nmos4 -192 112 R0
SYMATTR InstName M1
SYMBOL nmos4 256 112 R0
SYMATTR InstName M2
SYMBOL nmos4 704 432 R0
SYMATTR InstName M6
SYMBOL nmos4 368 112 R0
SYMATTR InstName M3
SYMBOL nmos4 80 464 R0
SYMATTR InstName M4
FLAG -144 0 5V
FLAG -240 192 2
* Z:\home\khalils\Downloads\files\data\raw_asc\0074b1740816_op_amp.asc
* Generated by LTspice 26.0.1 for Windows.
* Drive should be between 0 and 1000k.\nChange the value to see the difference in the frequency response.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
C5 N001 N004 47n
V3 0 -Vcc 9
R5 0 N004 4.7k
V1 N005 0 AC 1 0
R6 N002 N001 33k
RDrive N003 N002 1000k
V2 Vcc 0 9
XU1 N005 N001 Vcc -Vcc N003 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.ac dec 1k 10 20k
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3044 724
WIRE 528 -400 496 -400
WIRE 656 -400 608 -400
WIRE 768 -400 736 -400
WIRE 496 -208 496 -400
WIRE 416 -208 400 -208
WIRE 480 -208 464 -208
WIRE 496 -208 480 -208
WIRE 528 -208 496 -208
WIRE 768 -192 768 -400
WIRE 768 -192 592 -192
WIRE 896 -192 768 -192
WIRE 528 -176 16 -176
WIRE 560 -144 560 -160
WIRE 16 -128 16 -176
SYMBOL voltage 16 -144 R0
WINDOW 123 24 118 Left 2
SYMATTR Value2 AC 1 0
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL voltage 784 208 R0
SYMATTR InstName V3
SYMATTR Value 9
SYMBOL res 304 -192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 4.7k
SYMBOL res 624 -416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 33k
SYMBOL res 752 -416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Drive
SYMATTR Value 1000k
SYMBOL voltage 640 208 R0
SYMATTR InstName V2
SYMATTR Value 9
SYMBOL OpAmps/UniversalOpAmp 560 -192 R0
SYMATTR InstName U1
SYMBOL cap 480 -224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 47n
FLAG 640 304 0
FLAG 784 224 0
FLAG 640 224 Vcc
FLAG 784 304 -Vcc
FLAG 560 -144 -Vcc
FLAG 560 -224 Vcc
FLAG 16 -48 0
FLAG 320 -208 0
TEXT 336 208 Left 2 !.ac dec 1k 10 20k
TEXT 64 -632 Left 2 ;Drive should be between 0 and 1000k.\nChange the value to see the difference in the frequency response.
* Z:\home\khalils\Downloads\files\data\raw_asc\7100531fdbc2_IGBT.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 100m
Q2 N002 N003 E 0 FJL4315
R2 N003 E 5m
D1 E C D
M1 N001 G E E Si4982DY
Q1 N003 N002 C 0 FJL4215
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 -64 304 -96
WIRE 400 -64 304 -64
WIRE 304 32 304 -64
WIRE 400 48 400 -64
WIRE 32 80 16 80
WIRE 144 80 112 80
WIRE 240 80 144 80
WIRE 16 144 16 80
WIRE 144 160 144 80
WIRE 304 208 304 128
WIRE 304 208 208 208
WIRE -32 224 -64 224
WIRE 304 240 304 208
WIRE 16 352 16 240
WIRE 144 352 144 256
WIRE 144 352 16 352
WIRE 304 352 304 320
WIRE 304 352 144 352
WIRE 400 352 400 112
WIRE 400 352 304 352
WIRE 304 400 304 352
SYMBOL npn 208 160 M0
WINDOW 3 56 68 Invisible 2
SYMATTR Value FJL4315
SYMATTR InstName Q2
SYMBOL diode 384 112 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL nmos -32 144 R0
WINDOW 3 56 72 Invisible 2
SYMATTR Value Si4982DY
SYMATTR InstName M1
SYMBOL pnp 240 128 M180
WINDOW 0 58 32 Left 2
WINDOW 3 84 68 Invisible 2
SYMATTR InstName Q1
SYMATTR Value FJL4215
SYMBOL res 288 224 R0
SYMATTR InstName R2
SYMATTR Value 5m
SYMBOL res 128 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100m
FLAG -64 224 G
FLAG 304 400 E
FLAG 304 -96 C
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3561A.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N006 0 549K
R2 N003 N002 16.9K
C1 N002 0 680p
V1 N001 0 4
L1 N004 N005 2.2
C2 N005 0 22
R3 N005 N007 249K
R4 N007 0 118K
R5 N005 0 2.5
XU1 N006 0 N004 0 N001 N001 N007 N003 LTC3561A ;pnba SHDN/Rt)SGND)SW)PGND)PVin)SVin)FB)Ith
C3 N005 N007 22p
.tran 1.5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3561A.asy)
.lib LTC3561A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2480 1756
WIRE 1136 1328 784 1328
WIRE 1264 1328 1136 1328
WIRE 784 1344 784 1328
WIRE 1136 1360 1136 1328
WIRE 1264 1360 1264 1328
WIRE 896 1424 880 1424
WIRE 976 1424 960 1424
WIRE 1072 1424 1056 1424
WIRE 1344 1424 1328 1424
WIRE 1440 1424 1424 1424
WIRE 1520 1424 1440 1424
WIRE 1632 1424 1520 1424
WIRE 1712 1424 1632 1424
WIRE 784 1440 784 1424
WIRE 1520 1440 1520 1424
WIRE 1712 1440 1712 1424
WIRE 1440 1456 1440 1424
WIRE 1632 1456 1632 1424
WIRE 976 1536 960 1536
WIRE 1072 1536 1056 1536
WIRE 1440 1536 1440 1520
WIRE 1440 1536 1328 1536
WIRE 1520 1536 1520 1520
WIRE 1520 1536 1440 1536
WIRE 1632 1536 1632 1520
WIRE 1712 1536 1712 1520
WIRE 1520 1552 1520 1536
WIRE 1136 1632 1136 1616
WIRE 1264 1632 1264 1616
WIRE 1520 1648 1520 1632
FLAG 960 1536 0
FLAG 880 1424 0
FLAG 1136 1632 0
FLAG 1264 1632 0
FLAG 784 1440 0
FLAG 1520 1648 0
FLAG 1632 1536 0
FLAG 1712 1536 0
SYMBOL res 1072 1520 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 549K
SYMBOL res 1072 1408 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 16.9K
SYMBOL cap 960 1408 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 680p
SYMBOL voltage 784 1328 R0
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL ind 1328 1440 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL cap 1616 1456 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL res 1504 1424 R0
SYMATTR InstName R3
SYMATTR Value 249K
SYMBOL res 1504 1536 R0
SYMATTR InstName R4
SYMATTR Value 118K
SYMBOL res 1696 1424 R0
SYMATTR InstName R5
SYMATTR Value 2.5
SYMBOL PowerProducts\\LTC3561A 1200 1472 R0
SYMATTR InstName U1
SYMBOL cap 1424 1456 R0
SYMATTR InstName C3
SYMATTR Value 22p
TEXT 1488 1712 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\6f1a88ef4a2d_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
D1 k l 1N4148
R1 l 0 1k
V1 k 0 {v}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -10 0 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 -16 48 -16
WIRE 48 16 48 -16
WIRE 128 80 128 -16
WIRE 128 80 96 80
WIRE 192 80 128 80
WIRE 352 80 272 80
WIRE 96 96 96 80
WIRE 352 96 352 80
WIRE 352 176 352 160
WIRE 352 176 96 176
SYMBOL res 288 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 96 192 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {v}
SYMBOL diode 368 160 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG 352 176 k
FLAG 352 80 l
FLAG 48 16 0
TEXT 56 200 Left 2 !.dc V1 -10 0 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\eb9597d8df02_SCHEMATIC.asc
* Generated by LTspice 26.0.1 for Windows.
* .op
* EDIC WINTER INTERNSHIP\nMohammed Ahmed Majid\nGP5405, 23EEBEA666
* IO Characterstics of PMOS
vsg N001 N002 0.6
M1 0 N002 N001 N001 PMOS l=1u w=10u
vsd N001 0 0.9
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include tsmc180.txt
.dc vsd 0 1.8 0.1 vsg 0.2 1 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 0 96 0
WIRE 416 0 256 0
WIRE 416 32 416 0
WIRE 256 96 256 0
WIRE 336 96 256 96
WIRE 256 112 256 96
WIRE 208 128 192 128
WIRE 336 160 336 96
WIRE 336 160 256 160
WIRE 96 192 96 0
WIRE 256 256 256 208
WIRE 368 256 256 256
WIRE 416 256 416 112
WIRE 416 256 368 256
WIRE 192 272 192 128
WIRE 192 272 96 272
WIRE 368 288 368 256
SYMBOL pmos4 208 208 M180
WINDOW 123 61 8 Left 2
SYMATTR InstName M1
SYMATTR Value2 l=1u w=10u
SYMBOL voltage 416 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vsd
SYMATTR Value 0.9
SYMBOL voltage 96 176 R0
WINDOW 3 23 109 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vsg
SYMATTR Value 0.6
FLAG 368 288 0
TEXT -264 0 Left 2 !.include tsmc180.txt
TEXT -264 24 Left 2 !.dc vsd 0 1.8 0.1 vsg 0.2 1 0.2
TEXT -264 48 Left 2 ;.op
TEXT -264 -96 Left 2 ;EDIC WINTER INTERNSHIP\nMohammed Ahmed Majid\nGP5405, 23EEBEA666
TEXT 104 -56 Left 2 ;IO Characterstics of PMOS
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5693R.asc
* Generated by LTspice 26.0.1 for Windows.
CLOAD NC_01 0 10n
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
V1 Vdd 0 5
Vdac1 NC_02 0 1.25
I1 0 0 1m AC 1
XU1 vDAC Vdd 0 vOUT AD5693R Gain=2 ;pnba Vdac)Vdd)GND)Vout
.tran 200u
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5693R.asy)
.lib AD5693R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 464 112 192 112
WIRE -800 144 -800 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 1m
SYMBOL AD5693R -208 112 R0
SYMATTR InstName U1
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2