Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\23ada078ffff_Fig26_18_ID_VSG.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot d(Id(M1)) to get gm
VBS N001 0 0
M1 0 N002 N003 N001 P_50n l=50n w=1u
VSG 0 N002 0
VSD 0 N003 100m
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSG 0 500m 1m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 688
WIRE 320 96 320 80
WIRE 320 192 320 176
WIRE 400 192 320 192
WIRE 448 80 320 80
WIRE 448 112 448 80
WIRE 448 304 448 208
WIRE 528 160 448 160
WIRE 672 80 448 80
WIRE 672 160 608 160
WIRE 672 160 672 80
WIRE 672 208 672 160
WIRE 672 304 448 304
WIRE 672 304 672 288
WIRE 720 80 672 80
WIRE 720 112 720 80
SYMBOL voltage 320 80 R0
WINDOW 0 -89 56 Left 0
WINDOW 3 24 104 Invisible 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VSG
SYMATTR Value 0
SYMBOL voltage 672 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 41 57 Left 0
WINDOW 3 41 85 Left 0
SYMATTR InstName VSD
SYMATTR Value 100m
SYMBOL pmos4 400 112 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=50n w=1u
SYMATTR InstName M1
SYMATTR Value P_50n
SYMBOL voltage 512 160 M90
WINDOW 0 -32 56 VBottom 0
WINDOW 3 -6 99 VBottom 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VBS
SYMATTR Value 0
FLAG 720 112 0
TEXT 424 336 Left 0 !.dc VSG 0 500m 1m
TEXT 424 360 Left 0 !.lib cmosedu_models.txt
TEXT 488 56 Left 0 ;Plot d(Id(M1)) to get gm
* Z:\home\khalils\Downloads\files\data\raw_asc\244c80eba037_hw1p1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 vr1 vl1 30
V1 vr1 0 SINE(0 10 1e3)
L1 vl1 0 3e-3
.tran 0 5m 0 0.1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 32 112 32
WIRE 432 32 368 32
WIRE 368 48 368 32
WIRE 112 96 112 32
WIRE 368 144 368 128
WIRE 432 144 368 144
WIRE 368 160 368 144
WIRE 112 256 112 176
WIRE 368 256 368 240
WIRE 368 256 112 256
WIRE 112 272 112 256
IOPIN 432 32 Out
IOPIN 432 144 Out
SYMBOL voltage 112 80 R0
WINDOW 0 -46 10 Left 2
WINDOW 3 -218 106 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10 1e3)
SYMBOL ind 352 144 R0
SYMATTR InstName L1
SYMATTR Value 3e-3
SYMBOL res 352 32 R0
SYMATTR InstName R1
SYMATTR Value 30
FLAG 112 272 0
FLAG 432 32 vr1
FLAG 432 144 vl1
TEXT 160 296 Left 2 !.tran 0 5m 0 0.1m
* Z:\home\khalils\Downloads\files\data\raw_asc\858ef04a1de1_Draft21.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP27.asy)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1116.asy)
;dc V1 0 10 0.01
D2 N001 VOUT D
V3 0 VEE 15
V4 0 0 3.3
XU1 CP3V3 VOUT 0 0 0 0 OUT N003 LT1116 ;pnba V+)In+)In-)V-)LATCH)GND)OUT+)OUT-
VIN N002 0 SINE(0 10 50)
V1 CP3V3 0 3.3
R2 N001 N002 10k
V2 VCC 0 15
D1 VOUT N001 D
R3 VOUT N001 50k
XU2 0 N001 VCC VEE VOUT OP27 ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.1
.lib ADI.lib
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 904 680
WIRE 384 -64 384 -112
WIRE 384 -64 368 -64
WIRE 448 -64 448 -112
WIRE 368 0 368 -64
WIRE 448 0 448 -64
WIRE -240 32 -304 32
WIRE -64 32 -144 32
WIRE -144 48 -144 32
WIRE -64 48 -64 32
WIRE 688 64 640 64
WIRE 864 64 864 48
WIRE 864 64 768 64
WIRE 288 80 48 80
WIRE 368 80 368 0
WIRE 384 80 368 80
WIRE 48 96 48 80
WIRE 448 96 448 0
WIRE 528 96 448 96
WIRE 688 96 528 96
WIRE 816 96 768 96
WIRE 384 112 368 112
WIRE 368 144 368 112
WIRE 704 144 704 128
WIRE 720 144 720 128
WIRE 736 144 736 128
WIRE 736 144 720 144
WIRE 704 176 704 144
SYMBOL diode 384 -48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL diode 448 -128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL voltage 48 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value SINE(0 10 50)
SYMATTR InstName VIN
SYMBOL res 464 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 50k
SYMBOL voltage -304 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 3.3
SYMBOL Comparators\\LT1116 720 16 R0
SYMATTR InstName U1
SYMBOL voltage -304 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 38 43 Left 2
SYMATTR Value 3.3
SYMATTR InstName V1
SYMBOL res 384 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL OpAmps\\OP27 416 32 R0
SYMATTR InstName U2
SYMBOL voltage -144 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 38 43 Left 2
SYMATTR Value 15
SYMATTR InstName V2
SYMBOL voltage -144 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
SYMATTR InstName V3
SYMATTR Value 15
FLAG 48 176 0
FLAG -64 48 0
FLAG 528 96 VOUT
FLAG -144 -48 VCC
FLAG 416 64 VCC
FLAG -144 128 VEE
FLAG 416 128 VEE
FLAG 368 144 0
FLAG 640 64 0
FLAG 704 176 0
FLAG -240 32 0
FLAG -304 -48 CP3V3
FLAG 864 48 OUT
FLAG -304 112 CN3V3
FLAG 704 144 CN3V3
FLAG 736 144 0
FLAG 720 32 CP3V3
TEXT -72 264 Left 2 !;dc V1 0 10 0.01
TEXT 136 320 Left 2 !.tran 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\cca46d03c692_piezo_buffer.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac dec 100 10 100k
* .op
V2 N001 0 SINE(0 0.01 2k)
R1 N002 0 1k
XU1 N001 N002 5V N003 N002 TL074 ;pnba In+)In-)V+)V-)OUT
V1 N003 0 -1.4
.tran 10n 5m
.lib TL074.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1696
WIRE -336 1104 -352 1104
WIRE -224 1104 -256 1104
WIRE -352 1184 -352 1104
WIRE -224 1216 -224 1104
WIRE -224 1216 -272 1216
WIRE -112 1296 -240 1296
WIRE -240 1360 -240 1296
WIRE -208 1360 -240 1360
WIRE -112 1376 -112 1296
WIRE -112 1376 -144 1376
WIRE -32 1376 -112 1376
WIRE -272 1392 -272 1216
WIRE -208 1392 -272 1392
WIRE -176 1440 -176 1408
WIRE -176 1440 -240 1440
WIRE -240 1488 -240 1440
SYMBOL voltage -240 1472 R0
SYMATTR InstName V1
SYMATTR Value -1.4
SYMBOL OpAmps/opamp2 -176 1312 R0
SYMATTR InstName U1
SYMATTR Value TL074
SYMBOL voltage -240 1104 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value SINE(0 0.01 2k)
SYMBOL Res -48 1360 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG -176 1344 5V
FLAG -32 1456 0
FLAG -352 1184 0
FLAG -240 1568 0
TEXT -144 1568 Left 2 ;.ac dec 100 10 100k
TEXT -144 1608 Left 2 ;.op
TEXT -144 1640 Left 2 !.tran 10n 5m
TEXT -280 1024 Left 2 !.lib TL074.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4412HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4412HV.asy)
C1 N002 0 10
V1 N003 0 5
R2 N002 0 100
V2 N001 0 PWL(0 0 1 7)
D1 N001 N002 1N5819
XU1 N003 0 0 N005 N004 N002 LTC4412 ;pnba Vin)GND)CTL)STAT)Gate)Sense
MQ1 N003 N004 N002 N002 FDC638P
R1 N002 N005 470K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1
.lib LTC4412.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2500 1716
WIRE 1760 1024 1360 1024
WIRE 2096 1024 1824 1024
WIRE 1360 1040 1360 1024
WIRE 1968 1104 1552 1104
WIRE 2096 1104 2096 1024
WIRE 2096 1104 2064 1104
WIRE 2144 1104 2096 1104
WIRE 2272 1104 2144 1104
WIRE 2368 1104 2272 1104
WIRE 2272 1120 2272 1104
WIRE 2368 1120 2368 1104
WIRE 1360 1136 1360 1120
WIRE 2144 1184 2144 1104
WIRE 1552 1216 1552 1104
WIRE 1680 1216 1552 1216
WIRE 2096 1216 2096 1104
WIRE 2096 1216 1936 1216
WIRE 2272 1216 2272 1184
WIRE 2368 1216 2368 1200
WIRE 1552 1232 1552 1216
WIRE 1680 1296 1664 1296
WIRE 2048 1296 2048 1152
WIRE 2048 1296 1936 1296
WIRE 1552 1328 1552 1312
WIRE 1680 1376 1664 1376
WIRE 2144 1376 2144 1264
WIRE 2144 1376 1936 1376
SYMBOL voltage 1360 1024 R0
SYMATTR InstName V2
SYMATTR Value PWL(0 0 1 7)
SYMBOL VOLTAGE 1552 1216 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2352 1104 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL RES 2128 1168 R0
SYMATTR InstName R1
SYMATTR Value 470K
SYMBOL schottky 1760 1040 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMBOL PowerProducts\\LTC4412HV 1808 1296 R0
SYMATTR InstName U1
SYMBOL cap 2256 1120 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PMOS 1968 1152 R270
WINDOW 0 90 48 VCenter 2
WINDOW 3 63 45 VCenter 2
SYMATTR InstName Q1
SYMATTR Value FDC638P
FLAG 1664 1376 0
FLAG 1664 1296 0
FLAG 2272 1216 0
FLAG 2368 1216 0
FLAG 1552 1328 0
FLAG 1360 1136 0
TEXT 2208 1368 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1194.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1194.asy)
V1 +V 0 5
V2 -V 0 -5
XU1 IN 0 +V -V OUT 0 N001 N001 LT1194 ;pnba In+)In-)V+)V-)OUT)REF)VOS1)VOS2
V4 N001 0 {VC}
V3 IN 0 SINE(0 350m 200K)
.tran 7.5u
.step param VC list -5 -4 -3 -2
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -96 112 -96 96
WIRE -416 144 -432 144
WIRE -256 144 -336 144
WIRE -160 144 -256 144
WIRE -160 176 -208 176
WIRE 16 176 -32 176
WIRE -208 208 -208 176
WIRE -160 208 -208 208
WIRE -208 224 -208 208
WIRE -128 256 -128 240
WIRE -96 256 -96 240
WIRE -96 256 -128 256
WIRE -64 256 -64 240
WIRE -464 288 -464 272
WIRE -336 288 -336 272
WIRE -128 288 -128 256
WIRE -464 384 -464 368
WIRE -336 384 -336 368
WIRE -128 384 -128 368
SYMBOL opamps\\LT1194 -96 176 R0
SYMATTR InstName U1
SYMBOL voltage -336 272 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -464 272 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -128 272 R0
SYMATTR InstName V4
SYMATTR Value {VC}
SYMBOL voltage -320 144 R90
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
SYMATTR Value SINE(0 350m 200K)
SYMATTR InstName V3
FLAG -336 384 0
FLAG -96 96 +V
FLAG -336 272 +V
FLAG -64 256 -V
FLAG -464 384 0
FLAG -464 272 -V
FLAG -432 144 0
FLAG -208 224 0
FLAG 16 176 OUT
FLAG -256 144 IN
FLAG -128 384 0
TEXT 16 336 Left 2 !.tran 7.5u\n.step param VC list -5 -4 -3 -2
* Z:\home\khalils\Downloads\files\data\raw_asc\c784d9b2c6e8_Draft8.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N003 2.2k
V2 N002 N004 PULSE(0 3.3 1m 1m 1m 4m 10m)
V1 N001 0 3.3
S1 0 N003 N002 N004 SW_1
.Model SW_1 SW(Ron=1m Roff=100Meg Vt=2 Vh=1)
.tran 0 20m 0 10u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 -80 32 -80
WIRE 32 -16 32 -80
WIRE 176 -16 176 -80
WIRE 128 112 -64 112
WIRE 176 112 176 64
WIRE 128 128 128 112
WIRE 128 192 128 176
WIRE 128 192 -64 192
WIRE 32 224 32 64
WIRE 176 224 176 192
WIRE 176 224 32 224
WIRE 32 256 32 224
SYMBOL voltage 32 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL sw 176 208 M180
SYMATTR InstName S1
SYMATTR Value SW_1
SYMBOL res 160 -32 R0
SYMATTR InstName R1
SYMATTR Value 2.2k
SYMBOL voltage -64 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 1m 1m 1m 4m 10m)
FLAG 32 256 0
TEXT -88 336 Left 2 !.Model SW_1 SW(Ron=1m Roff=100Meg Vt=2 Vh=1)
TEXT -88 304 Left 2 !.tran 0 20m 0 10u
* Z:\tmp\asc_dec_bjh7r6w2\190a73c15db5_p1__better_swing_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
I3 N001 X 1m
R2 N004 N007 10k
I1 N012 Vee 2m
V3 Vcc 0 10
R1 N007 N003 70k
Q1 N008 N010 N012 0 NPN
Q7 N001 X N002 0 NPN
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1748 680
WIRE 1008 -240 688 -240
WIRE 1184 -240 1008 -240
WIRE 1312 -240 1184 -240
WIRE 1008 -208 1008 -240
WIRE 1184 -208 1184 -240
WIRE 1120 -160 1088 -160
WIRE 1184 -96 1184 -112
WIRE 1248 -96 1184 -96
WIRE 1440 -96 1248 -96
WIRE 544 -80 432 -80
WIRE 624 -80 544 -80
WIRE 816 -80 720 -80
WIRE 1008 -80 1008 -128
WIRE 1088 -80 1088 -160
WIRE 1088 -80 1008 -80
WIRE 176 -64 176 -240
WIRE 1184 -48 1184 -96
WIRE 1008 -32 1008 -80
WIRE 304 -16 240 -16
WIRE 1088 0 1088 -80
WIRE 544 16 544 -80
WIRE 560 16 544 16
WIRE 672 16 672 -16
WIRE 672 16 640 16
WIRE 704 16 672 16
WIRE 816 16 816 -80
WIRE 816 16 784 16
WIRE 912 16 816 16
WIRE 944 16 912 16
WIRE 912 48 912 16
WIRE 176 112 176 32
WIRE 176 112 160 112
WIRE 432 112 432 32
WIRE 448 112 432 112
WIRE 1008 128 912 128
WIRE 0 160 -32 160
WIRE 96 160 80 160
WIRE 592 160 512 160
WIRE 672 160 592 160
WIRE 1248 160 1248 -96
WIRE 1248 160 752 160
WIRE 304 176 304 96
WIRE 160 240 160 208
WIRE 320 240 160 240
WIRE 448 240 448 208
WIRE 448 240 320 240
WIRE 320 288 320 240
WIRE 320 448 320 368
WIRE 320 448 64 448
WIRE 688 448 320 448
WIRE 1008 448 1008 128
WIRE 1008 448 688 448
WIRE 1184 448 1008 448
WIRE 736 592 704 592
WIRE 768 592 736 592
WIRE 864 592 848 592
WIRE 736 656 736 592
SYMBOL current 1008 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I3
SYMATTR Value 1m
SYMBOL res 800 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL current 320 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 2m
SYMBOL voltage 864 592 R90
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL res 656 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 70k
SYMBOL npn 96 112 R0
SYMATTR InstName Q1
SYMBOL npn 1120 -208 R0
SYMATTR InstName Q7
FLAG -32 160 Vin
FLAG 736 656 0
FLAG 864 592 Vcc
FLAG 688 448 Vee
FLAG 304 176 0
FLAG 1088 -160 X
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1223.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1223.asy)
R1 OUT N001 1K
R2 N001 0 {Rg}
V2 -V 0 -15
V3 IN 0 ac 1
V1 +V 0 15
XU1 IN N001 +V -V OUT LT1223 ;pnba In+)In-)V+)V-)OUT
.ac oct 100 100K 1G
.step PARAM Rg list 10 33 110 470 1e308
.lib LT1223.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -48 96 -64 96
WIRE 48 96 32 96
WIRE 64 96 48 96
WIRE 176 96 144 96
WIRE -320 160 -320 144
WIRE -208 160 -208 144
WIRE 112 208 112 192
WIRE 48 224 48 96
WIRE 80 224 48 224
WIRE 176 240 176 96
WIRE 176 240 144 240
WIRE 240 240 176 240
WIRE -320 256 -320 240
WIRE -208 256 -208 240
WIRE 80 256 -80 256
WIRE -80 272 -80 256
WIRE 112 288 112 272
WIRE -80 368 -80 352
SYMBOL res 48 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {Rg}
SYMBOL opamps\\LT1223 112 176 R0
SYMATTR InstName U1
SYMBOL voltage -80 256 R0
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL res 160 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -320 144 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -208 144 R0
SYMATTR InstName V1
SYMATTR Value 15
FLAG -208 256 0
FLAG 112 192 +V
FLAG -208 144 +V
FLAG 112 288 -V
FLAG -320 256 0
FLAG -320 144 -V
FLAG -64 96 0
FLAG -80 368 0
FLAG 240 240 OUT
FLAG -80 256 IN
TEXT 40 360 Left 2 !.ac oct 100 100K  1G\n.step PARAM Rg list 10 33 110 470 1e308
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1461-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1461-3.asy)
V1 N001 0 5.5
XU1 0 N001 N001 N002 LT1461-3 ;pnba GND)IN)_SHDN)OUT
I1 N002 0 PULSE(0 10m 1.5m 10n 10n 2m 200m)
C1 N002 0 2
.tran 7m
.lib LT1461.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1376 680
WIRE 112 112 0 112
WIRE 144 112 112 112
WIRE 512 112 432 112
WIRE 672 112 512 112
WIRE 0 128 0 112
WIRE 512 128 512 112
WIRE 672 128 672 112
WIRE 112 176 112 112
WIRE 144 176 112 176
WIRE 0 224 0 208
WIRE 512 224 512 192
WIRE 672 224 672 208
WIRE 288 240 288 208
SYMBOL cap 496 128 R0
WINDOW 123 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 2
SYMBOL voltage 0 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL LT1461-3 288 144 R0
SYMATTR InstName U1
SYMBOL current 672 128 R0
WINDOW 123 24 122 Left 2
WINDOW 39 24 101 Left 2
SYMATTR Value PULSE(0 10m 1.5m 10n 10n 2m 200m)
SYMATTR InstName I1
FLAG 0 224 0
FLAG 288 240 0
FLAG 672 224 0
FLAG 512 224 0
TEXT 784 272 Left 2 !.tran 7m
* Z:\home\khalils\Downloads\files\data\raw_asc\AD706.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD706.asy)
R3 OUT N001 2Meg
C2 OUT N001 0.01
C3 N003 0 0.15
V2 V- 0 -5
R2 N002 IN 1Meg
V1 V+ 0 5
C1 OUT N002 0.15
R1 N003 N002 1Meg
XU1 N003 N001 V+ V- OUT AD706 ;pnba In+)In-)V+)V-)OUT
V3 IN 0 SINE(0 0.1 1)
.tran 10
.lib AD706.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 400 -208 304 -208
WIRE 560 -208 464 -208
WIRE 304 -112 304 -208
WIRE 384 -112 304 -112
WIRE 560 -112 560 -208
WIRE 560 -112 464 -112
WIRE 384 -16 368 -16
WIRE 368 16 368 -16
WIRE 304 32 304 -112
WIRE 336 32 304 32
WIRE 512 48 400 48
WIRE 560 48 560 -112
WIRE 560 48 512 48
WIRE -32 64 -48 64
WIRE 64 64 -32 64
WIRE 208 64 144 64
WIRE 224 64 208 64
WIRE 320 64 304 64
WIRE 336 64 320 64
WIRE -48 96 -48 64
WIRE 320 96 320 64
WIRE 368 128 368 80
WIRE 384 128 368 128
WIRE 320 176 320 160
WIRE -48 208 -48 176
WIRE 208 224 208 64
WIRE 320 224 208 224
WIRE 560 224 560 48
WIRE 560 224 384 224
WIRE 48 336 32 336
WIRE 160 336 144 336
WIRE 32 368 32 336
WIRE 144 368 144 336
WIRE 32 464 32 448
WIRE 144 464 144 448
SYMBOL res 160 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL AD706 368 -16 R0
SYMATTR InstName U1
SYMBOL voltage 32 352 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -48 80 R0
WINDOW 3 48 60 Left 2
WINDOW 123 46 79 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 0.1 1)
SYMATTR InstName V3
SYMBOL res 480 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2Meg
SYMBOL res 320 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL cap 304 96 R0
SYMATTR InstName C3
SYMATTR Value 0.15u
SYMBOL voltage 144 352 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL cap 384 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.15u
SYMBOL cap 464 -224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 123 79 33 VBottom 2
SYMATTR InstName C2
SYMATTR Value 0.01u
FLAG 32 464 0
FLAG 144 464 0
FLAG 48 336 V+
FLAG 160 336 V-
FLAG 384 -16 V+
FLAG 384 128 V-
FLAG 320 176 0
FLAG -48 208 0
FLAG -32 64 IN
FLAG 512 48 OUT
TEXT 472 424 Left 2 !.tran 10
* Z:\tmp\asc_dec_bjh7r6w2\0460c2e94165_NAND_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
VA N002 0 PULSE(0 5 0 5n 5n 40m 80m)
M4 Y N002 N005 N004 NMOS l=1040nm w=1040nm
M3 N001 N003 Y N001 PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 -32 128 -64
WIRE 128 48 48 48
WIRE 48 64 48 48
WIRE 48 64 32 64
WIRE 32 80 32 64
WIRE 128 80 128 48
WIRE 208 80 128 80
WIRE 224 80 208 80
WIRE 48 128 48 64
WIRE 48 128 32 128
WIRE 224 128 224 80
WIRE 224 128 208 128
WIRE -16 160 -48 160
WIRE 160 192 160 160
WIRE 160 192 -32 192
WIRE 32 208 32 176
WIRE 208 208 208 176
WIRE 208 208 32 208
WIRE -192 256 -224 256
WIRE -48 256 -48 160
WIRE -48 256 -112 256
WIRE 32 272 32 208
WIRE 64 320 32 320
WIRE -48 352 -48 256
WIRE -16 352 -48 352
WIRE 32 368 32 352
WIRE 32 448 32 368
WIRE 64 496 64 320
WIRE -32 528 -32 192
SYMBOL voltage -96 256 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName A
SYMATTR Value PULSE(0 5 0 5n 5n 40m 80m)
SYMBOL nmos4 -16 272 R0
SYMATTR InstName M4
SYMATTR Value2 l=1040nm w=1040nm
SYMBOL pmos4 160 80 R0
SYMATTR InstName M3
FLAG 128 -64 0
FLAG -224 256 0
FLAG 208 208 Y
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1790-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1790-2.5.asy)
Rload OUT 0 1K
V1 IN 0 PWL(0 0 1 10)
XU1 IN 0 OUT LT1790-25 ;pnba IN)GND)OUT
C1 OUT 0 1
.tran 1
.lib LT1790.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 48 -176 48
WIRE 336 48 288 48
WIRE 432 48 336 48
WIRE -176 64 -176 48
WIRE 336 64 336 48
WIRE 432 64 432 48
WIRE -176 160 -176 144
WIRE 336 160 336 128
WIRE 432 160 432 144
WIRE 160 176 160 160
SYMBOL cap 320 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LT1790-2.5 160 48 R0
SYMATTR InstName U1
SYMBOL res 416 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL voltage -176 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -176 160 0
FLAG 336 160 0
FLAG 432 160 0
FLAG 160 176 0
FLAG 432 48 OUT
FLAG -176 48 IN
TEXT 280 224 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\fra_eg1.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac oct 4 100 10Meg
* This example shows the basic principle of extracting\nthe small signal AC characteristics from an \nLTspice Frequency Response Analysis (FRA) simulation.
* To use this technique in your own simulations,\n include an fra device and the .fra directive.\nThe fra device controls the frequency analysis parameters.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
@1 A B delay=100u fstart=100 fend=10Meg oct=4 fcoarse=10k nmax=50k 3 500k 1 pp0=100m pp1=10m f0=50k f1=500k tavgmin=100u tsettle=2u acmag=1
C2 N001 0 100p
C1 A 0 50n
V2 -V 0 -5
R2 N001 0 1K
XU1 0 N001 +V -V A level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
R1 B N001 10K
.fra
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4156 1252
WIRE 1504 544 1472 544
WIRE 1600 544 1584 544
WIRE 1632 544 1600 544
WIRE 1744 544 1712 544
WIRE 1760 544 1744 544
WIRE 1840 544 1824 544
WIRE 1856 544 1840 544
WIRE 1936 576 1936 560
WIRE 2032 576 2032 560
WIRE 1600 640 1600 544
WIRE 1760 640 1600 640
WIRE 1600 656 1600 640
WIRE 1856 656 1856 544
WIRE 1856 656 1824 656
WIRE 1760 672 1744 672
WIRE 1936 672 1936 656
WIRE 2032 672 2032 656
WIRE 1600 736 1600 720
WIRE 1856 736 1856 720
LINE Normal 1680 672 1680 672 2
LINE Normal 1680 672 1680 672 2
LINE Normal 2128 752 2128 752 2
LINE Normal 2128 752 2128 752 2
LINE Normal 2128 752 2128 752 2
LINE Normal 2128 752 2128 752 2
LINE Normal 1712 464 1760 512 2
LINE Normal 1648 656 1648 656 2
SYMBOL res 1600 528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL cap 1584 656 R0
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL voltage 2032 560 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 1728 528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 1936 560 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 1840 656 R0
SYMATTR InstName C1
SYMATTR Value 50n
SYMBOL Opamps\\UniversalOpamp2 1792 656 R0
SYMATTR InstName U1
SYMBOL fra 1760 544 R90
WINDOW 0 -19 -26 VBottom 2
WINDOW 40 37 -28 VBottom 2
SYMATTR InstName @1
SYMATTR SpiceLine delay=100u fstart=100 fend=10Meg oct=4 fcoarse=10k nmax=50k 3 500k 1 pp0=100m pp1=10m f0=50k f1=500k tavgmin=100u tsettle=2u
SYMATTR SpiceLine2 acmag=1
FLAG 1936 672 0
FLAG 2032 672 0
FLAG 1936 560 +V
FLAG 1792 624 +V
FLAG 2032 560 -V
FLAG 1792 688 -V
FLAG 1744 672 0
FLAG 1472 544 0
FLAG 1856 736 0
FLAG 1600 736 0
FLAG 1840 544 A
FLAG 1744 544 B
TEXT 2200 560 Left 2 !.fra
TEXT 2112 592 Left 2 ;.ac oct 4 100 10Meg
TEXT 1888 288 Center 2 ;This example shows the basic principle of extracting\nthe small signal AC characteristics from an \nLTspice Frequency Response Analysis (FRA) simulation.
TEXT 1576 392 Left 2 ;To use this technique in your own simulations,\n include an fra device and the .fra directive.\nThe fra device controls the frequency analysis parameters.