Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\113584b037b9_Draft6.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2, XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
V6 V- 0 12
M1 N001 N002 V- V- IRFS4010
XU1 Vset V- Vcc 0 N002 LT1001 ;pnba In+)In-)V+)V-)OUT
XU3 Vset V- Vcc 0 V- LT1001 ;pnba In+)In-)V+)V-)OUT
V3 N001 0 12
XU2 Vtest+ Vtest- Vcc 0 N003 LT1001 ;pnba In+)In-)V+)V-)OUT
R2 V- 0 0.2
V5 Vtest+ 0 0.1
V2 Vset 0 0.2
R1 V- 0 0.2
V1 Vcc 0 5
V4 Vtest- 0 0.09
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 200
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1724 1156
WIRE 192 16 -464 16
WIRE 192 128 192 16
WIRE -464 176 -464 16
WIRE -176 192 -176 144
WIRE -112 192 -176 192
WIRE 144 208 -48 208
WIRE -112 224 -224 224
WIRE 192 256 192 224
WIRE 192 256 144 256
WIRE 1120 304 1056 304
WIRE 192 320 192 256
WIRE 1248 320 1184 320
WIRE 1120 336 1056 336
WIRE -464 432 -464 256
WIRE -128 432 -464 432
WIRE 192 432 192 400
WIRE 192 432 -128 432
WIRE -128 496 -128 432
WIRE 224 656 -432 656
WIRE -432 816 -432 656
WIRE -144 832 -144 784
WIRE -80 832 -144 832
WIRE 224 848 224 656
WIRE 224 848 -16 848
WIRE -80 864 -192 864
WIRE 224 896 224 848
WIRE 224 896 176 896
WIRE 224 960 224 896
WIRE -432 1072 -432 896
WIRE -96 1072 -432 1072
WIRE 224 1072 224 1040
WIRE 224 1072 -96 1072
WIRE -96 1136 -96 1072
SYMBOL Misc\\battery -432 800 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 12
SYMBOL nmos 144 128 R0
SYMATTR InstName M1
SYMATTR Value IRFS4010
SYMBOL res 176 304 R0
SYMATTR InstName R1
SYMATTR Value 0.2
SYMBOL OpAmps\\OP07 -48 784 R0
SYMATTR InstName U3
SYMBOL res 208 944 R0
SYMATTR InstName R2
SYMATTR Value 0.2
SYMBOL OpAmps\\OP07 1152 256 R0
SYMATTR InstName U2
SYMBOL Misc\\cell 800 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 0.09
SYMBOL Misc\\cell 640 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL Misc\\cell 816 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0.2
SYMBOL Misc\\battery -464 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 12
SYMBOL OpAmps\\OP07 -80 144 R0
SYMATTR InstName U1
SYMBOL Misc\\cell 640 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 0.1
FLAG 640 16 Vcc
FLAG 640 80 0
FLAG -80 240 0
FLAG -80 176 Vcc
FLAG 816 80 0
FLAG 816 16 Vset
FLAG -224 224 Vset
FLAG 144 256 V-
FLAG -176 144 V-
FLAG -128 496 0
FLAG 1152 288 Vcc
FLAG 1152 352 0
FLAG 1056 336 Vtest+
FLAG 800 352 0
FLAG 800 288 Vtest-
FLAG 640 352 0
FLAG 640 288 Vtest+
FLAG 1056 304 Vtest-
FLAG -48 880 0
FLAG -48 816 Vcc
FLAG -192 864 Vset
FLAG 176 896 V-
FLAG -144 784 V-
FLAG -96 1136 0
TEXT -496 440 Left 2 !.tran 200
* Z:\home\khalils\Downloads\files\data\raw_asc\108e9992a5c7_rectification-v1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 SINE(0 10 50 0 0 0 0)
R1 0 N002 10
D1 N001 N002 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 176 96 16 96
WIRE 400 96 240 96
WIRE 624 96 480 96
WIRE 16 160 16 96
WIRE 16 384 16 240
WIRE 624 384 624 96
WIRE 624 384 16 384
WIRE 624 432 624 384
SYMBOL diode 176 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL voltage 16 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 50 0 0 0 0)
SYMBOL res 496 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
FLAG 624 432 0
TEXT -16 392 Left 2 !.tran 100m
* Z:\tmp\asc_dec_bjh7r6w2\16189616f927_BatCutoff_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R4 N003 N002 {R1}
R2 gate N004 1k
R3 N002 N001 {R2}
R1 N003 N004 1k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1364 680
WIRE -192 -384 -336 -384
WIRE -32 -384 -112 -384
WIRE 32 -384 -32 -384
WIRE 352 -384 112 -384
WIRE 480 -384 352 -384
WIRE 1152 -384 480 -384
WIRE 480 -208 480 -384
WIRE 1360 -192 1008 -192
WIRE 448 -128 16 -128
WIRE 480 -128 448 -128
WIRE -32 -48 -32 -384
WIRE 368 -48 -32 -48
WIRE 448 0 448 -128
WIRE 736 0 448 0
WIRE 944 0 816 0
WIRE 1008 0 1008 -192
WIRE 1008 0 944 0
WIRE 368 64 368 -48
SYMBOL res 128 -400 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value {R1}
SYMBOL res 832 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res -96 -400 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value {R2}
SYMBOL res 464 -224 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 944 0 gate
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1007CS.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
R1 OUT N001 355K
R2 N001 0 365
V3 IN 0 SINE(0 1m .01)
XU1 IN N001 +V -V OUT LT1007 ;pnba In+)In-)V+)V-)OUT
.tran 300
* Gain 1000 Amplifier with .01% Accuracy
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1007CS.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 160 96 128 96
WIRE 272 96 240 96
WIRE -272 176 -272 160
WIRE -144 176 -144 160
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 272 240 272 96
WIRE 272 240 224 240
WIRE 304 240 272 240
WIRE 160 256 0 256
WIRE -272 272 -272 256
WIRE -144 272 -144 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
FLAG -144 272 0
FLAG 192 192 +V
FLAG -144 160 +V
FLAG 192 288 -V
FLAG -272 272 0
FLAG -272 160 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 304 240 OUT
FLAG 0 256 IN
SYMBOL voltage -144 160 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -272 160 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 355K
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1m .01)
SYMBOL opamps\\LT1007CS 192 176 R0
SYMATTR InstName U1
TEXT 280 424 Left 2 !.tran 300
TEXT 136 48 Bottom 2 ;Gain 1000 Amplifier with .01% Accuracy
* Z:\home\khalils\Downloads\files\data\raw_asc\0f35fd8c813f_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
K L1 L2 1
V1 N001 N003 SINE(0 115 60)
L1 N001 N003 30 Rser=0.0001
R1 0 N002 3
L2 0 N002 1
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 48 48 48
WIRE 352 48 304 48
WIRE 480 48 432 48
WIRE 480 64 480 48
WIRE 176 128 48 128
WIRE 304 144 304 128
SYMBOL ind2 320 144 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L2
SYMATTR Value 1
SYMATTR Type ind
SYMBOL res 448 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3
SYMBOL ind2 160 32 R0
SYMATTR InstName L1
SYMATTR Value 30
SYMATTR Type ind
SYMATTR SpiceLine Rser=0.0001
SYMBOL voltage 48 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 115 60)
FLAG 304 144 0
FLAG 480 64 0
TEXT 216 200 Left 2 !K L1 L2 1
TEXT 8 224 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\38b10ae2f794_inv_transfer.asc
* Generated by LTspice 26.0.1 for Windows.
AX1 N001 0 0 0 0 0 0 0 BUF ll=180n wn={nnw} wp={nnw*mp}
V2 vin 0 {vv}
V1 vdd 0 {vv}
.param vv=1.8 nnw=1*180n mp=1
.lib BU_180nm.lib
.dc V2 0 {vv} 0.01
.meas dc vil when d(v(out))=-1 fall 1
.meas dc vih when d(v(out))=-1 rise 1
.meas dc vi_mid param (vil+vih)/2/vv
.meas dc voh find v(out) when d(v(out))=-1 fall 1
.meas dc vol find v(out) when d(v(out))=-1 rise 1
.meas dc vo_mid param (vol+voh)/2/vv
.meas dc NMH param abs(voh-vih)
.meas dc NML param abs(vil-vol)
.meas dc voh_fraction param voh/vv
.meas dc vol_fraction param vol/vv
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1168 680
WIRE 416 224 -64 224
WIRE -64 272 -64 224
WIRE 416 304 416 224
WIRE 400 320 96 320
WIRE 496 320 448 320
WIRE 96 400 96 320
WIRE 416 400 416 336
WIRE 416 400 224 400
WIRE 224 416 224 400
SYMBOL inv 416 320 R0
SYMATTR InstName X1
SYMATTR SpiceLine ll=180n wn={nnw} wp={nnw*mp}
SYMBOL /voltage -64 256 R0
SYMATTR InstName V1
SYMATTR Value {vv}
SYMBOL /voltage 96 384 R0
WINDOW 3 18 89 Left 2
SYMATTR InstName V2
SYMATTR Value {vv}
FLAG -64 352 0
FLAG 96 480 0
FLAG 224 416 0
FLAG -64 224 vdd
FLAG 224 400 vss
FLAG 96 320 vin
FLAG 496 320 out
TEXT -88 72 Left 2 !.param vv=1.8 nnw=1*180n mp=1\n.lib BU_180nm.lib\n.dc V2 0 {vv} 0.01
TEXT 560 72 Left 2 !.meas dc vil when d(v(out))=-1 fall 1\n.meas dc vih when d(v(out))=-1 rise 1\n.meas dc vi_mid param (vil+vih)/2/vv\n.meas dc voh find v(out) when d(v(out))=-1 fall 1\n.meas dc vol find v(out) when d(v(out))=-1 rise 1\n.meas dc vo_mid param (vol+voh)/2/vv\n.meas dc NMH param abs(voh-vih)\n.meas dc NML param abs(vil-vol)\n.meas dc voh_fraction param voh/vv\n.meas dc vol_fraction param vol/vv
* Z:\home\khalils\Downloads\files\data\raw_asc\d7ad4684ff3d_inv_sc.asc
* Generated by LTspice 26.0.1 for Windows.
MPMOS Vout Vin N001 N001 P_50n l=50n w=100n
C1 Vout 0 1p
MNMOS Vout Vin 0 0 N_50n l=50n w=50n
V1 N001 0 1
V2 Vin 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib pure_models.txt
.tran 80p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 32 224 32
WIRE 496 32 320 32
WIRE 224 64 224 32
WIRE 176 80 112 80
WIRE 320 112 320 32
WIRE 320 112 224 112
WIRE 496 160 496 32
WIRE 224 176 224 160
WIRE 352 176 224 176
WIRE 384 176 352 176
WIRE 224 208 224 176
WIRE 112 224 112 80
WIRE 112 224 16 224
WIRE 16 256 16 224
WIRE 320 256 224 256
WIRE 112 288 112 224
WIRE 176 288 112 288
WIRE 224 336 224 304
WIRE 224 336 208 336
WIRE 16 400 16 336
WIRE 208 400 208 336
WIRE 208 400 16 400
WIRE 320 400 320 256
WIRE 320 400 208 400
WIRE 496 400 496 240
WIRE 496 400 320 400
WIRE 208 416 208 400
IOPIN 384 176 Out
SYMBOL nmos4 176 208 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=50n w=50n
SYMATTR InstName NMOS
SYMATTR Value N_50n
SYMBOL pmos4 176 160 M180
WINDOW 123 56 44 Left 2
SYMATTR Value2 l=50n w=100n
SYMATTR InstName PMOS
SYMATTR Value P_50n
SYMBOL voltage 496 144 R0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL cap 336 176 R0
SYMATTR InstName C1
SYMATTR Value 1p
SYMBOL voltage 16 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1
FLAG 208 416 0
FLAG 16 224 Vin
FLAG 352 240 0
FLAG 384 176 Vout
TEXT -304 -72 Left 2 !.lib pure_models.txt
TEXT -304 440 Left 2 !.tran 80p
* Z:\home\khalils\Downloads\files\data\raw_asc\ADGS5414.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADGS5414.asy)
V4 N003 0 pulse(0 5 0 20n 20n 10u 20u)
V1 +V 0 15
V2 -V 0 -15
C1 N002 0 35p
R1 N002 0 300
V3 N001 0 10
XU1 N003 N002 N001 -V 0 +V ADGS5414 ;pnba IN)D)S)Vss)GND)Vdd
.tran 0.0001
.lib ADGS5414.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -528 -32 -528 -48
WIRE -368 -16 -400 -16
WIRE -240 -16 -288 -16
WIRE 48 -16 -48 -16
WIRE 160 -16 48 -16
WIRE 48 16 48 -16
WIRE 160 32 160 -16
WIRE -240 48 -368 48
WIRE -528 64 -528 48
WIRE -368 112 -368 48
WIRE 48 112 48 96
WIRE 160 112 160 96
WIRE -528 160 -528 144
WIRE -192 176 -192 160
WIRE -96 176 -96 160
WIRE -528 256 -528 240
WIRE -368 272 -368 192
SYMBOL cap 144 32 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL voltage -528 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -368 96 R0
WINDOW 3 30 136 Left 2
SYMATTR Value pulse(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V4
SYMBOL voltage -272 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL ADGS5414 -144 32 R0
SYMATTR InstName U1
SYMBOL res 32 0 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL voltage -528 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
FLAG -528 256 0
FLAG -528 64 0
FLAG -528 -48 +V
FLAG -528 144 -V
FLAG -400 -16 0
FLAG -192 176 -V
FLAG -144 -112 +V
FLAG -96 176 0
FLAG -368 272 0
FLAG 48 112 0
FLAG 160 112 0
TEXT -344 264 Left 2 !.tran 0.0001
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2118-ADJ.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N002 OUT 1
C1 OUT 0 147
R1 OUT N001 100K
V1 IN 0 5
R2 OUT N003 13.5K
R3 N003 0 3K
Rload OUT 0 1.1
XU1 IN IN IN N003 0 0 N002 IN IN IN N001 ADP2118-x.x Rtop=10 Rbot=1T Ctop=4p ;pnba Sync/Mode)FREQ)TRK)FB)GND)PGND)SW)Pvin)Vin)EN)Pgood
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2118-ADJ.asy)
.lib ADP2118-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1220 680
WIRE 128 0 48 0
WIRE 288 0 128 0
WIRE 48 16 48 0
WIRE 288 32 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 656 64 576 64
WIRE 48 112 48 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 656 144 656 64
WIRE 656 144 560 144
WIRE 800 144 656 144
WIRE 560 160 560 144
WIRE 800 160 800 144
WIRE 656 192 656 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 560 256 560 224
WIRE 800 256 800 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 656 304 656 272
WIRE 656 304 416 304
WIRE 656 320 656 304
WIRE 128 384 128 304
WIRE 160 384 128 384
WIRE 656 416 656 400
WIRE 288 432 288 416
FLAG 560 256 0
FLAG 288 432 0
FLAG 48 112 0
FLAG 800 144 OUT
FLAG 800 256 0
FLAG 48 0 IN
FLAG 656 416 0
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 147
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL voltage 48 0 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 640 176 R0
SYMATTR InstName R2
SYMATTR Value 13.5K
SYMBOL res 640 304 R0
SYMATTR InstName R3
SYMATTR Value 3K
SYMBOL res 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 1.1
SYMBOL PowerProducts\\ADP2118-ADJ 288 272 R0
SYMATTR InstName U1
TEXT 800 400 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\238079044da3_NOTCH-60HZ.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N004 OUT N001 0 OUT level4 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 Phimargin=45 En=0 Enk=0 In=0 Ink=0 Rin=500Meg Ro=1k Ccm=1p Cdiff=2p ;pnba In+)In-)V+)V-)OUT
VDD N001 0 9.6
V1 N002 0 SINE() AC 1
R2 N004 N003 26500
R3 N003 N002 26500
C1 N004 N005 100n
C2 N005 N002 100n
C3 N003 N006 200n
R4 N005 N006 13250
R1 OUT N007 {RQ}
R5 N007 0 90k
XU2 N007 N006 N001 0 N006 level4 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 Phimargin=45 En=0 Enk=0 In=0 Ink=0 Rin=500Meg Ro=1k Ccm=1p Cdiff=2p ;pnba In+)In-)V+)V-)OUT
.ac oct 100 10 10k
.step param RQ List 1k 10k 100k
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp4.asy)
.lib UniversalOpAmp4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -160 -32 -160
WIRE 432 -160 144 -160
WIRE 224 16 96 16
WIRE 144 80 144 -160
WIRE 96 96 96 16
WIRE 112 96 96 96
WIRE 224 112 224 16
WIRE 224 112 176 112
WIRE -224 128 -400 128
WIRE -80 128 -144 128
WIRE -48 128 -80 128
WIRE 48 128 32 128
WIRE 112 128 48 128
WIRE -400 208 -400 128
WIRE -288 208 -400 208
WIRE -176 208 -224 208
WIRE -48 208 -176 208
WIRE 48 208 48 128
WIRE 48 208 16 208
WIRE -400 224 -400 208
WIRE -176 240 -176 208
WIRE -80 240 -80 128
WIRE 224 272 224 112
WIRE -400 336 -400 304
WIRE -176 352 -176 320
WIRE -128 352 -176 352
WIRE -80 352 -80 304
WIRE -80 352 -128 352
WIRE 224 368 224 352
WIRE 224 368 112 368
WIRE -128 384 -128 352
WIRE -16 384 -128 384
WIRE 48 384 -16 384
WIRE 224 384 224 368
WIRE 160 400 112 400
WIRE -16 448 -16 384
WIRE 160 448 160 400
WIRE 160 448 -16 448
WIRE 224 496 224 464
WIRE 80 544 80 416
WIRE 432 544 432 -160
WIRE 432 544 80 544
FLAG -32 -80 0
FLAG -400 336 0
FLAG 224 112 OUT
IOPIN 224 112 Out
FLAG 224 496 0
FLAG 80 352 0
FLAG 144 144 0
SYMBOL OpAmps\\UniversalOpAmp4 144 112 R0
SYMATTR InstName U1
SYMBOL voltage -32 -176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 9.6
SYMBOL voltage -400 208 R0
WINDOW 0 -97 19 Left 2
WINDOW 3 -115 44 Left 2
WINDOW 123 -95 72 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE()
SYMATTR Value2 AC 1
SYMBOL res 48 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 26500
SYMBOL res -128 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 26500
SYMBOL cap 16 192 R90
WINDOW 0 82 30 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL cap -224 192 R90
WINDOW 0 82 29 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL cap -96 240 R0
SYMATTR InstName C3
SYMATTR Value 200n
SYMBOL res -192 224 R0
SYMATTR InstName R4
SYMATTR Value 13250
SYMBOL res 208 256 R0
SYMATTR InstName R1
SYMATTR Value {RQ}
SYMBOL res 208 368 R0
SYMATTR InstName R5
SYMATTR Value 90k
SYMBOL OpAmps\\UniversalOpAmp4 80 384 R180
SYMATTR InstName U2
TEXT -224 600 Left 2 !.ac oct 100 10 10k
TEXT -224 624 Left 2 !.step param RQ List 1k 10k 100k
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1461-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1461-5.asy)
XU1 0 N001 N001 N002 LT1461-5 ;pnba GND)IN)_SHDN)OUT
I1 N002 0 PULSE(0 10m 1.5m 10n 10n 2m 200m)
V1 N001 0 7.5
C1 N002 0 2
.tran 7m
.lib LT1461.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1376 680
WIRE 112 112 0 112
WIRE 144 112 112 112
WIRE 512 112 432 112
WIRE 672 112 512 112
WIRE 0 128 0 112
WIRE 512 128 512 112
WIRE 672 128 672 112
WIRE 112 176 112 112
WIRE 144 176 112 176
WIRE 0 224 0 208
WIRE 512 224 512 192
WIRE 672 224 672 208
WIRE 288 240 288 208
SYMBOL voltage 0 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 7.5
SYMBOL cap 496 128 R0
WINDOW 123 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 2
SYMBOL LT1461-5 288 144 R0
SYMATTR InstName U1
SYMBOL current 672 128 R0
WINDOW 123 24 122 Left 2
WINDOW 39 24 101 Left 2
SYMATTR Value PULSE(0 10m 1.5m 10n 10n 2m 200m)
SYMATTR InstName I1
FLAG 0 224 0
FLAG 288 240 0
FLAG 672 224 0
FLAG 512 224 0
TEXT 720 280 Left 2 !.tran 7m
* Z:\home\khalils\Downloads\files\data\raw_asc\1045ca00a385_1037.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain 1000 Amplifier with .01% Accuracy
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1037.asy)
V1 +V 0 15
R1 OUT N001 355K
V2 -V 0 -15
V3 IN 0 SINE(0 1m 1)
R2 N001 0 365
XU1 IN N001 +V -V OUT LT1037 ;pnba In+)In-)V+)V-)OUT
.tran 3
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 160 96 128 96
WIRE 272 96 240 96
WIRE -272 176 -272 160
WIRE -144 176 -144 160
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 272 240 272 96
WIRE 272 240 224 240
WIRE 304 240 272 240
WIRE 160 256 0 256
WIRE -272 272 -272 256
WIRE -144 272 -144 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL opamps\\LT1037 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -144 160 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 355K
SYMBOL voltage -272 160 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1m 1)
FLAG -144 272 0
FLAG 192 192 +V
FLAG -144 160 +V
FLAG 192 288 -V
FLAG -272 272 0
FLAG -272 160 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 0 256 IN
FLAG 304 240 OUT
TEXT 232 352 Left 0 !.tran 3
TEXT 136 48 Bottom 0 ;Gain 1000 Amplifier with .01% Accuracy
* Z:\home\khalils\Downloads\files\data\raw_asc\CMP401.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\CMP401.asy)
R1 OUT 0 10k
V1 V+ANG 0 5
V3 V+DIG 0 5
XU1 +IN -IN V+ANG 0 V+DIG 0 OUT CMP401 ;pnba +IN)-IN)V+ANG)V-ANG)V+DIG)DIG_GND)OUT
R2 V+ANG -IN 1Meg
V4 +IN 0 PULSE(0 3 200n 10n 10n 1u 2u)
R3 -IN 0 1Meg
.tran 200u
.lib CMP401.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1064 680
WIRE -64 -48 -176 -48
WIRE 112 -48 -64 -48
WIRE 208 -48 112 -48
WIRE 512 -48 400 -48
WIRE 672 -48 512 -48
WIRE -64 -32 -64 -48
WIRE -176 -16 -176 -48
WIRE 208 -16 208 -48
WIRE 400 -16 400 -48
WIRE 672 16 672 -48
WIRE -64 64 -64 48
WIRE 96 64 -64 64
WIRE 128 64 96 64
WIRE -176 80 -176 64
WIRE -64 80 -64 64
WIRE 528 80 480 80
WIRE 560 80 528 80
WIRE 96 96 64 96
WIRE 128 96 96 96
WIRE 560 96 560 80
WIRE 672 112 672 96
WIRE -64 192 -64 160
WIRE 560 208 560 176
WIRE 64 224 64 96
WIRE 208 224 208 208
WIRE 400 224 400 208
WIRE 64 368 64 304
SYMBOL res -80 64 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL res -80 -48 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 544 80 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 64 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 3 200n 10n 10n 1u 2u)
SYMBOL CMP401 288 128 R0
SYMATTR InstName U1
SYMBOL voltage -176 -32 R0
WINDOW 3 26 96 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 5
SYMATTR InstName V1
SYMBOL voltage 672 0 R0
WINDOW 3 26 96 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 5
SYMATTR InstName V3
FLAG -176 80 0
FLAG 208 224 0
FLAG 400 224 0
FLAG 672 112 0
FLAG 560 208 0
FLAG 64 368 0
FLAG -64 192 0
FLAG 96 64 -IN
FLAG 96 96 +IN
FLAG 528 80 OUT
FLAG 512 -48 V+DIG
FLAG 112 -48 V+ANG
TEXT 520 344 Left 2 !.tran 200u
* Z:\tmp\asc_dec_bjh7r6w2\02076dbbb6da_low-gain-amp-with-out_C_v3_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N002 1k
V1 N002 0 AC 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -112 160 -112
WIRE 160 -16 160 -112
WIRE 272 -16 160 -16
WIRE 0 64 -96 64
WIRE 160 64 160 -16
WIRE 160 64 80 64
WIRE -96 144 -96 64
WIRE 224 144 144 144
WIRE 224 176 224 144
WIRE 144 208 144 144
WIRE 272 208 144 208
WIRE 80 240 80 64
WIRE 272 240 80 240
WIRE -96 288 -96 224
SYMBOL res 96 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -96 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value AC 1
FLAG 224 176 0
FLAG -96 288 0
* Z:\home\khalils\Downloads\files\data\raw_asc\9c3540342dc8_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N003 N002 11R
R1 N001 N004 3K3
V1 N001 0 3.3
D1 N004 0 D
D3 N002 0 D
V2 N003 0 12
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 10 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 64 -240 64
WIRE 528 80 496 80
WIRE 752 80 608 80
WIRE 752 144 752 80
WIRE -240 160 -240 64
WIRE 128 176 128 144
WIRE 128 176 -16 176
WIRE 160 176 128 176
WIRE 368 176 224 176
WIRE 432 176 432 80
WIRE 432 176 368 176
WIRE -240 336 -240 240
WIRE 368 336 368 176
WIRE 368 336 -240 336
WIRE 400 336 368 336
WIRE 752 336 752 224
WIRE 752 336 400 336
WIRE 400 352 400 336
SYMBOL voltage -240 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL diode 160 192 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL schottky 496 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D3
SYMBOL voltage 752 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL res 624 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 11R
SYMBOL res 112 48 R0
SYMATTR InstName R1
SYMATTR Value 3K3
FLAG 400 352 0
TEXT -272 376 Left 2 !.tran 0 10 0