Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1269.asc
* Generated by LTspice 26.0.1 for Windows.
L1 IN N001 50 Rser=0.02 Rpar=5000
D1 N001 OUT MBRS360
R1 OUT N002 10.7K
R2 N002 0 1.24K
R3 N003 N004 1K
C2 OUT 0 390 Rser=.05
C3 N004 0 1
V1 IN 0 5
XU1 N003 N002 0 N001 IN LT1269 ;pnba Vc)FB)GND)SW)Vin
Rload OUT 0 20
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 15m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1269.asy)
.lib LT1269.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1480
WIRE 1824 896 1600 896
WIRE 1888 896 1824 896
WIRE 2000 896 1968 896
WIRE 2032 896 2000 896
WIRE 2144 896 2096 896
WIRE 2256 896 2144 896
WIRE 2368 896 2256 896
WIRE 1600 912 1600 896
WIRE 2256 912 2256 896
WIRE 2368 912 2368 896
WIRE 1824 944 1824 896
WIRE 2144 992 2144 896
WIRE 1600 1008 1600 992
WIRE 2256 1008 2256 976
WIRE 2368 1008 2368 992
WIRE 2000 1024 2000 896
WIRE 2000 1024 1952 1024
WIRE 2144 1088 2144 1072
WIRE 2144 1088 1952 1088
WIRE 2144 1104 2144 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2144 1200 2144 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
FLAG 2368 896 OUT
FLAG 2144 1200 0
FLAG 2256 1008 0
FLAG 2368 1008 0
FLAG 2064 1248 0
FLAG 1824 1248 0
FLAG 1600 1008 0
FLAG 1600 896 IN
SYMBOL IND 1872 912 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 50
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL schottky 2032 912 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL RES 2128 976 R0
SYMATTR InstName R1
SYMATTR Value 10.7K
SYMBOL RES 2128 1088 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL polcap 2240 912 R0
SYMATTR InstName C2
SYMATTR Value 390
SYMATTR SpiceLine Rser=.05
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL VOLTAGE 1600 896 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL POWERPRODUCTS\\LT1269 1824 1088 R0
SYMATTR InstName U1
SYMBOL RES 2352 896 R0
SYMATTR InstName Rload
SYMATTR Value 20
TEXT 2240 1240 Left 2 !.tran 15m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP160-2.1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP160-2.1.asy)
C1 OUT 0 1
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
V1 IN 0 5
Rload OUT 0 210
XU1 IN 0 N001 OUT ADP16xfd K=476.2u ;pnba Vin)GND)En)Vout
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 416 96 352 96
WIRE 512 96 416 96
WIRE -64 112 -64 96
WIRE 416 112 416 96
WIRE 512 112 512 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 416 208 416 176
WIRE 512 208 512 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADP160-2.1 256 208 R0
SYMATTR InstName U1
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 210
FLAG -64 208 0
FLAG 256 272 0
FLAG 416 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\tmp\asc_dec_bjh7r6w2\0cc45937612b_Fig13_28_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
Cload Vout 0 50f
VDD VDD 0 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3172 680
WIRE 192 -368 192 -384
WIRE 192 -352 192 -368
WIRE 400 -288 368 -288
WIRE 192 -240 192 -272
WIRE 896 -192 704 -192
WIRE 960 -192 896 -192
WIRE 272 -176 192 -176
WIRE 368 -176 368 -288
WIRE 368 -176 272 -176
WIRE 192 -160 192 -176
WIRE 368 -96 368 -176
WIRE 960 -48 960 -128
SYMBOL cap 944 -192 R0
SYMATTR InstName Cload
SYMATTR Value 50f
SYMBOL voltage 192 -368 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VDD
SYMATTR Value 1
FLAG 192 -240 0
FLAG 192 -368 VDD
FLAG 960 -48 0
FLAG 896 -192 Vout
FLAG 272 -176 Vin
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP160-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
C1 OUT 0 1
Rload OUT 0 120
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
XU1 IN 0 N001 OUT ADP16xfd K=833.3u ;pnba Vin)GND)En)Vout
.tran 4m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP160-1.2.asy)
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -80 96
WIRE 416 96 352 96
WIRE 512 96 416 96
WIRE -80 112 -80 96
WIRE 416 112 416 96
WIRE 512 112 512 96
WIRE -80 208 -80 192
WIRE 160 208 16 208
WIRE 416 208 416 176
WIRE 512 208 512 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
FLAG -80 208 0
FLAG 256 272 0
FLAG 416 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG -80 96 IN
FLAG 16 320 0
SYMBOL voltage -80 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 120
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL ADP160-1.2 256 208 R0
SYMATTR InstName U1
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\19f6e8d51f0c_Simulacion_SPICE_Montecarlo_Capacitor.asc
* Generated by LTspice 26.0.1 for Windows.
* Circuit
* Source / Switch
* Parameters
* Simulation setup
R2 N001 0 {R2}
R3 VL- 0 {R3}
R1 VL+ Vcc {R1}
C1 VL+ N001 {mc({C},tol_C)}
V1 Vcc 0 PULSE(0 10 10m 1n 1n 200m 400m 10)
L1 VL+ VL- {L}
.param R1 = 50
.param R2 = 7
.param R3 = 6
.param C = 300u
.param L = 450m
.param tol_R=0
.param tol_C = 0.1
.param tol_L = 0
.step param run 1 50 1
.tran 0 400m 0 1u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -368 -176 -560 -176
WIRE -128 -176 -288 -176
WIRE 144 -176 -128 -176
WIRE -128 -80 -128 -176
WIRE 144 -80 144 -176
WIRE -560 -16 -560 -176
WIRE 144 48 144 0
WIRE -128 112 -128 -16
WIRE 144 112 144 48
WIRE -560 272 -560 64
WIRE -128 272 -128 192
WIRE -128 272 -560 272
WIRE 144 272 144 192
WIRE 144 272 -128 272
WIRE -128 304 -128 272
RECTANGLE Normal -496 -288 -1024 336 2
RECTANGLE Normal 208 -288 -480 336 2
RECTANGLE Normal 608 144 240 304 2
RECTANGLE Normal 608 -288 240 112 2
SYMBOL ind 128 -96 R0
WINDOW 3 -59 51 Left 2
SYMATTR Value {L}
SYMATTR InstName L1
SYMBOL voltage -560 -32 R0
WINDOW 3 -440 106 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 10 10m 1n 1n 200m 400m 10)
SYMATTR InstName V1
SYMBOL res 128 96 R0
WINDOW 3 -78 46 Left 2
SYMATTR Value {R3}
SYMATTR InstName R3
SYMBOL res -144 96 R0
WINDOW 3 -87 51 Left 2
WINDOW 0 44 53 Left 2
SYMATTR Value {R2}
SYMATTR InstName R2
SYMBOL cap -144 -80 R0
WINDOW 3 -178 55 Left 2
SYMATTR Value {mc({C},tol_C)}
SYMATTR InstName C1
SYMBOL res -272 -192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 37 72 VTop 2
SYMATTR InstName R1
SYMATTR Value {R1}
FLAG -128 304 0
FLAG -560 -176 Vcc
FLAG 144 -176 VL+
FLAG 144 48 VL-
TEXT -400 -264 Left 3 ;Circuit
TEXT -944 -264 Left 3 ;Source / Switch
TEXT 264 -264 Left 3 ;Parameters
TEXT 312 -208 Left 2 !.param R1 = 50
TEXT 312 -176 Left 2 !.param R2 = 7
TEXT 312 -144 Left 2 !.param R3 = 6
TEXT 312 -48 Left 2 !.param C = 300u
TEXT 312 48 Left 2 !.param L = 450m
TEXT 256 168 Left 3 ;Simulation setup
TEXT 312 -112 Left 2 !.param tol_R=0
TEXT 312 -16 Left 2 !.param tol_C = 0.1
TEXT 312 80 Left 2 !.param tol_L = 0
TEXT 320 224 Left 2 !.step param run 1 50 1
TEXT 328 248 Left 2 !.tran 0 400m 0 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\251603e3e9eb_Demonstration_circuit_sinewave.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 vc1 2500
R2 N001 Vout 2500
V1 N001 0 15
V2 0 N005 15
Q1 vc1 Vin N002 0 2N5551C
Q2 Vout 0 N003 0 2N5551C
R3 N002 N004 225
R4 N003 N004 225
I1 N004 N005 2mA
V3 Vin 0 SINE(0 0.1 1000 0 0 0 10) AC 1
C1 N001 Vout 100pF
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
;op
.tran 10ms
* Demonstration Circuit Transient
;options maxstep=0.48831106u
;four 1khz 10 4 v(vout)
.option plotwinsize=0
.include Cordell_Mods
* sinewave
* copyright Cordell Audio 12/03/2010
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 764
WIRE 160 64 0 64
WIRE 272 64 160 64
WIRE 400 64 272 64
WIRE 0 112 0 64
WIRE 160 112 160 64
WIRE 272 112 272 64
WIRE 400 144 400 64
WIRE 160 208 160 192
WIRE 224 208 160 208
WIRE 272 208 272 176
WIRE 272 208 224 208
WIRE 0 224 0 192
WIRE 0 256 0 224
WIRE 160 256 160 208
WIRE 400 288 400 224
WIRE 480 288 400 288
WIRE -128 304 -176 304
WIRE -64 304 -128 304
WIRE 400 304 400 288
WIRE 400 304 224 304
WIRE 480 304 480 288
WIRE 400 352 400 304
WIRE -176 368 -176 304
WIRE 0 384 0 352
WIRE 160 384 160 352
WIRE -176 496 -176 448
WIRE 0 496 0 464
WIRE 80 496 0 496
WIRE 160 496 160 464
WIRE 160 496 80 496
WIRE 80 512 80 496
WIRE 80 624 80 592
WIRE 400 624 400 432
WIRE 400 624 80 624
FLAG 480 304 0
FLAG -176 496 0
FLAG -128 304 Vin
FLAG 224 208 Vout
FLAG 0 224 vc1
SYMBOL res -16 96 R0
WINDOW 0 36 28 Left 0
WINDOW 3 36 64 Left 0
SYMATTR InstName R1
SYMATTR Value 2500
SYMBOL res 144 96 R0
WINDOW 0 37 28 Left 0
WINDOW 3 35 56 Left 0
SYMATTR InstName R2
SYMATTR Value 2500
SYMBOL voltage 400 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 40 Left 0
WINDOW 3 43 78 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 400 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 40 41 Left 0
WINDOW 3 44 78 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL npn -64 256 R0
WINDOW 3 25 47 Left 0
WINDOW 0 66 17 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q1
SYMBOL npn 224 256 M0
WINDOW 3 25 48 Left 0
WINDOW 0 68 19 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q2
SYMBOL res -16 368 R0
SYMATTR InstName R3
SYMATTR Value 225
SYMBOL res 144 368 R0
SYMATTR InstName R4
SYMATTR Value 225
SYMBOL current 80 512 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 44 22 Left 0
WINDOW 3 39 58 Left 0
SYMATTR InstName I1
SYMATTR Value 2mA
SYMBOL voltage -176 352 R0
WINDOW 3 -326 106 Left 0
WINDOW 123 34 78 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 43 36 Left 0
SYMATTR Value SINE(0 0.1 1000 0 0 0 10)
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMBOL cap 256 112 R0
WINDOW 3 36 43 Left 0
SYMATTR Value 100pF
SYMATTR InstName C1
TEXT -520 72 Left 0 !;op
TEXT -520 104 Left 0 !.tran 10ms
TEXT -120 -40 Left 0 ;Demonstration Circuit Transient
TEXT -520 136 Left 0 !;options maxstep=0.48831106u
TEXT -520 168 Left 0 !;four 1khz 10 4 v(vout)
TEXT -520 200 Left 0 !.option plotwinsize=0
TEXT -520 48 Left 0 !.include Cordell_Mods
TEXT 8 8 Left 0 ;sinewave
TEXT 160 744 Left 0 ;copyright Cordell Audio 12/03/2010
* Z:\home\khalils\Downloads\files\data\raw_asc\16454115d2b0_linearDraft01.asc
* Generated by LTspice 26.0.1 for Windows.
T1 N003 N007 N001 0 Td=3.75n Z0=120
T2 N001 0 N004 N009 Td=8.25n Z0=120
T3 N004 N009 N005 N010 Td=6.25n Z0=120
T4 N006 N010 N002 N011 Td=2.5n Z0=120
V1 N008 0 PULSE(0 4 0 0 0 80000 80000 1)
R1 N001 N008 120
R2 N003 N007 1Meg
R3 N006 N005 1Meg
R4 N002 N011 120
R5 N009 0 100G
R6 N010 0 100G
R7 N011 0 100G
R8 N007 0 100G
.tran 0 1us 0 1us
* Settling time approx 300ns
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1248 680
WIRE 256 -16 176 -16
WIRE 336 -16 256 -16
WIRE 1184 32 1104 32
WIRE -48 48 -176 48
WIRE -48 64 -48 48
WIRE 0 64 -48 64
WIRE 176 64 176 -16
WIRE 176 64 96 64
WIRE 336 64 336 -16
WIRE 432 64 336 64
WIRE 640 64 528 64
WIRE 832 64 736 64
WIRE 976 64 912 64
WIRE 1104 64 1104 32
WIRE 1104 64 1072 64
WIRE 0 96 -48 96
WIRE 176 96 96 96
WIRE 256 96 256 64
WIRE 432 96 336 96
WIRE 592 96 528 96
WIRE 640 96 592 96
WIRE 816 96 736 96
WIRE 976 96 816 96
WIRE 1104 96 1072 96
WIRE 1104 112 1104 96
WIRE 1184 112 1104 112
WIRE -48 128 -48 96
WIRE -48 128 -176 128
WIRE 592 144 592 96
WIRE 816 144 816 96
WIRE 1104 160 1104 112
WIRE -48 176 -48 128
WIRE 176 176 176 96
WIRE 256 176 176 176
WIRE 336 176 336 96
WIRE 336 176 256 176
WIRE 256 224 256 176
WIRE 592 240 592 224
WIRE 816 240 816 224
WIRE 1104 256 1104 240
WIRE -48 272 -48 256
FLAG 256 224 0
FLAG 592 240 0
FLAG 816 240 0
FLAG 1104 256 0
FLAG -48 272 0
SYMBOL tline 48 80 R0
SYMATTR InstName T1
SYMATTR Value Td=3.75n Z0=120
SYMBOL tline 480 80 R0
SYMATTR InstName T2
SYMATTR Value Td=8.25n Z0=120
SYMBOL tline 688 80 R0
SYMATTR InstName T3
SYMATTR Value Td=6.25n Z0=120
SYMBOL tline 1024 80 R0
SYMATTR InstName T4
SYMATTR Value Td=2.5n Z0=120
SYMBOL voltage 256 80 R0
WINDOW 3 377 96 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 4 0 0 0 80000 80000 1)
SYMATTR InstName V1
SYMBOL res 240 -32 R0
SYMATTR InstName R1
SYMATTR Value 120
SYMBOL res -192 32 R0
SYMATTR InstName R2
SYMATTR Value 1MEG
SYMBOL res 928 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1MEG
SYMBOL res 1168 16 R0
SYMATTR InstName R4
SYMATTR Value 120
SYMBOL res 576 128 R0
SYMATTR InstName R5
SYMATTR Value 100G
SYMBOL res 800 128 R0
SYMATTR InstName R6
SYMATTR Value 100G
SYMBOL res 1088 144 R0
SYMATTR InstName R7
SYMATTR Value 100G
SYMBOL res -64 160 R0
SYMATTR InstName R8
SYMATTR Value 100G
TEXT -192 184 Left 2 !.tran 0 1us 0 1us
TEXT -192 -88 Left 2 ;Settling time approx 300ns
* Z:\tmp\asc_dec_bjh7r6w2\04d445d90134_Draft27_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V3 0 VEE 15
D1 VOUT N001 D
D2 N001 VOUT D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 904 680
WIRE 384 -64 384 -112
WIRE 384 -64 368 -64
WIRE 448 -64 448 -112
WIRE 368 80 368 -64
WIRE 448 96 448 -64
WIRE -240 32 -304 32
WIRE -64 32 -144 32
WIRE -144 48 -144 32
WIRE -64 48 -64 32
WIRE 288 80 48 80
WIRE 384 80 368 80
WIRE 48 96 48 80
WIRE 528 96 448 96
WIRE 384 112 368 112
WIRE 368 144 368 112
SYMBOL voltage -144 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL diode 448 -128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL diode 384 -48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
FLAG 48 176 0
FLAG -64 48 0
FLAG 528 96 VOUT
FLAG -144 -48 VCC
FLAG 416 64 VCC
FLAG -144 128 VEE
FLAG 416 128 VEE
FLAG -240 32 0
FLAG -304 -48 P10V
FLAG -304 112 N10V
FLAG 288 144 P10V
* Z:\home\khalils\Downloads\files\data\raw_asc\3246344028f2_Fig26_18_ID_VDS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1) and 1/d(Id(M1)) for output resistance
VDS N001 0 0
M1 N001 N002 0 0 N_50n l=50n w=500n
VGS N002 0 400m
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VDS 0 1
.include cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 640 80 448 80
WIRE 448 112 448 80
WIRE 640 112 640 80
WIRE 496 160 448 160
WIRE 400 192 288 192
WIRE 288 208 288 192
WIRE 448 224 448 208
WIRE 640 224 640 192
WIRE 288 304 288 288
SYMBOL nmos4 400 112 R0
WINDOW 0 59 18 Left 0
WINDOW 3 64 75 Left 0
WINDOW 123 64 103 Left 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 640 96 R0
WINDOW 0 41 55 Left 0
WINDOW 3 41 83 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 0
SYMBOL voltage 288 192 R0
WINDOW 0 -90 57 Left 0
WINDOW 3 -90 85 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 400m
FLAG 288 304 0
FLAG 448 224 0
FLAG 640 224 0
FLAG 496 160 0
TEXT 384 272 Left 0 !.dc VDS 0 1
TEXT 384 296 Left 0 !.include cmosedu_models.txt
TEXT 224 56 Left 0 ;Plot Id(M1) and 1/d(Id(M1)) for output resistance
* Z:\home\khalils\Downloads\files\data\raw_asc\1d5ea0425c4a_transistor.asc
* Generated by LTspice 26.0.1 for Windows.
* Example of DC sweep in LTSpice
V1 N001 0
D1 N002 0 1N4148
R1 N002 N001 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -10 10 3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 80 80 80
WIRE 272 80 240 80
WIRE 80 112 80 80
WIRE 272 128 272 80
WIRE 80 224 80 192
WIRE 272 224 272 192
SYMBOL diode 256 128 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 80 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL res 256 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 80 224 0
FLAG 272 224 0
TEXT 344 72 Left 2 !.dc V1 -10 10 3
TEXT 128 -8 Left 2 ;Example of DC sweep in LTSpice
* Z:\home\khalils\Downloads\files\data\raw_asc\1513269bf28e_tc3_sim.asc
* Generated by LTspice 26.0.1 for Windows.
* GND
* n1 150V
* n2 111.71V
* n3 11.71V
* n4 -63.063
R3 0 N001 20
R4 N004 N001 10
V1 N003 0 150
R2 N003 N002 12.5
V2 N002 N001 100
I1 0 N002 5A
R1 0 N004 25
I2 N004 N003 10
.tran 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 -16 -48 -16
WIRE 240 -16 112 -16
WIRE 352 -16 240 -16
WIRE 528 -16 432 -16
WIRE 240 48 240 -16
WIRE -48 208 -48 -16
WIRE 32 208 -48 208
WIRE 240 208 240 128
WIRE 240 208 112 208
WIRE 352 208 240 208
WIRE 528 208 528 -16
WIRE 528 208 432 208
WIRE 240 256 240 208
WIRE -48 384 -48 208
WIRE 32 384 -48 384
WIRE 240 384 240 336
WIRE 240 384 112 384
WIRE 352 384 240 384
WIRE 528 384 528 208
WIRE 528 384 432 384
SYMBOL res 224 240 R0
SYMATTR InstName R1
SYMATTR Value 25
SYMBOL voltage 128 -16 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value 100
SYMBOL current 352 384 R270
WINDOW 0 32 40 VTop 2
WINDOW 3 -32 40 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I2
SYMATTR Value 10
SYMBOL res 128 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL current 240 128 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 5A
SYMBOL res 128 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 20
SYMBOL voltage 448 208 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 150
SYMBOL res 448 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 12.5
FLAG 240 208 0
TEXT 256 184 Left 2 ;GND
TEXT 552 176 Left 2 ;n1 150V
TEXT -48 456 Left 2 !.tran 10
TEXT 200 -56 Left 2 ;n2 111.71V
TEXT -200 208 Left 2 ;n3 11.71V
TEXT 176 432 Left 2 ;n4 -63.063
* Z:\home\khalils\Downloads\files\data\raw_asc\d868dedf8726_ts16.asc
* Generated by LTspice 26.0.1 for Windows.
L2 N002 N003 .192
V1 N001 0 0 AC 1 0 Rser=1
C1 N002 0 .553
L1 N001 N002 1.255
R1 N003 0 1
.net I(R1) V1
.ac dec 100 .001 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 64 0 64
WIRE 240 64 176 64
WIRE 288 64 240 64
WIRE 464 64 368 64
WIRE 0 112 0 64
WIRE 464 112 464 64
WIRE 240 128 240 64
WIRE 0 256 0 192
WIRE 240 256 240 192
WIRE 240 256 0 256
WIRE 464 256 464 192
WIRE 464 256 240 256
SYMBOL ind 272 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value .192
SYMBOL voltage 0 96 R0
WINDOW 123 24 124 Left 2
WINDOW 39 24 152 Left 2
SYMATTR Value2 AC 1 0
SYMATTR SpiceLine Rser=1
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL cap 224 128 R0
SYMATTR InstName C1
SYMATTR Value .553
SYMBOL ind 80 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.255
SYMBOL res 448 96 R0
SYMATTR InstName R1
SYMATTR Value 1
FLAG 240 256 0
TEXT -16 280 Left 2 !.net I(R1) V1
TEXT -16 312 Left 2 !.ac dec 100 .001 100
* Z:\home\khalils\Downloads\files\data\raw_asc\403f05b07a93_006-non-Inverting-Summing-Amplifier.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N004 0 -15
V2 N001 0 15
R1 N002 0 10k
R2 Vout N002 5k
R3 N003 V1 10k
R4 V2 N003 10k
XU1 N003 N002 N001 N004 Vout LT1001 ;pnba In+)In-)V+)V-)OUT
V4 V1 0 SINE(0 0.2 50)
V3 V2 0 SINE(0 0.1 150)
.tran 0 60m 0 1u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 -256 256 -256
WIRE 256 -224 256 -256
WIRE 256 -128 256 -144
WIRE 192 -48 160 -48
WIRE 432 -48 272 -48
WIRE 320 32 320 -256
WIRE 48 48 -48 48
WIRE 160 48 160 -48
WIRE 160 48 128 48
WIRE 288 48 160 48
WIRE 432 64 432 -48
WIRE 432 64 352 64
WIRE 496 64 432 64
WIRE 288 80 208 80
WIRE -320 128 -400 128
WIRE 48 128 -320 128
WIRE 208 128 208 80
WIRE 208 128 128 128
WIRE 320 160 320 96
WIRE -400 176 -400 128
WIRE -64 240 -112 240
WIRE 48 240 -64 240
WIRE 208 240 208 128
WIRE 208 240 128 240
WIRE 320 272 320 240
WIRE -400 288 -400 256
WIRE -112 288 -112 240
WIRE -112 400 -112 368
FLAG 320 272 0
FLAG 256 -128 0
FLAG 496 64 Vout
IOPIN 496 64 Out
FLAG -320 128 V1
IOPIN -320 128 In
FLAG -400 288 0
FLAG -48 48 0
FLAG -64 240 V2
IOPIN -64 240 In
FLAG -112 400 0
SYMBOL voltage 320 144 R0
SYMATTR InstName V1
SYMATTR Value -15
SYMBOL voltage 256 -240 R0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL res 144 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 288 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5k
SYMBOL res 144 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 32 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL Opamps\\OP07 320 0 R0
SYMATTR InstName U1
SYMBOL voltage -400 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value SINE(0 0.2 50)
SYMBOL voltage -112 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 0.1 150)
TEXT 496 208 Left 2 !.tran 0 60m 0 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\57524b9297ac_amplifier.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N002 N003 N004 0 BC547B
V3 N005 0 0.175V
Vlm35 N003 N005 0
R3 N001 N002 5k
V2 N001 0 12
R2 N002 0 10k
R1 N004 0 100
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc lm35 0 0.8 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 576 16 272 16
WIRE 272 64 272 16
WIRE 576 80 576 16
WIRE 272 192 272 144
WIRE 432 192 272 192
WIRE 576 208 576 160
WIRE 432 224 432 192
WIRE 208 240 48 240
WIRE 48 288 48 240
WIRE 272 336 272 288
WIRE 432 336 432 304
WIRE 48 416 48 368
WIRE 272 464 272 416
WIRE 48 544 48 496
SYMBOL res 256 320 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL npn 208 192 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL voltage 48 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 0.175V
SYMBOL res 256 48 R0
SYMATTR InstName R3
SYMATTR Value 5k
SYMBOL voltage 48 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName lm35
SYMATTR Value 0
SYMBOL voltage 576 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL res 416 208 R0
SYMATTR InstName R2
SYMATTR Value 10k
FLAG 432 336 0
FLAG 48 544 0
FLAG 272 464 0
FLAG 576 208 0
TEXT 16 152 Left 2 !.dc lm35 0 0.8 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\4c9f7df0b0fe_Fig1_17.asc
* Generated by LTspice 26.0.1 for Windows.
D1 Vd 0 mydiode
R1 Vin Vd 1k
Vin Vin 0 1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc Vin 0 1
.model mydiode D
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 48 224 0 224
WIRE 112 224 48 224
WIRE 256 224 192 224
WIRE 288 224 256 224
WIRE 0 240 0 224
WIRE 288 240 288 224
WIRE 0 336 0 320
WIRE 288 336 288 304
SYMBOL res 96 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 0 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 1
SYMBOL diode 272 240 R0
SYMATTR InstName D1
SYMATTR Value mydiode
FLAG 0 336 0
FLAG 288 336 0
FLAG 256 224 Vd
FLAG 48 224 Vin
TEXT 40 400 Left 0 !.dc Vin 0 1
TEXT 40 376 Left 0 !.model mydiode D