Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1dd57b37ff70_trial.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N003 0 100k
Q1 N004 N003 N002 0 BC308
R1 N001 N003 27k
R4 0 N004 10
R3 N001 N002 15
V1 N001 0 9
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.include BC308.txt
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE 224 16 224 -80
WIRE 224 16 128 16
WIRE 288 16 224 16
WIRE 128 96 128 16
WIRE 288 160 288 96
WIRE 128 208 128 176
WIRE 224 208 128 208
WIRE 128 256 128 208
WIRE 288 272 288 256
WIRE 432 272 288 272
SYMBOL res 272 0 R0
SYMATTR InstName R3
SYMATTR Value 15
SYMBOL voltage 224 -64 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL res 528 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL pnp 224 256 M180
SYMATTR InstName Q1
SYMATTR Value BC308
SYMBOL res 112 240 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res 112 80 R0
SYMATTR InstName R1
SYMATTR Value 27k
FLAG 224 -160 0
FLAG 128 336 0
FLAG 512 272 0
TEXT 800 16 Left 2 !.include BC308.txt
TEXT 108 360 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\2664fa12ae0b_AD5683R.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5683R.asy)
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
Vdac1 NC_02 0 1.25
XU2 vDAC Vdd 0 vOUT AD5683R Gain=2 ;pnba Vdac)Vdd)GND)Vout
CLOAD NC_01 0 10n
V1 Vdd 0 5
I1 0 0 1m AC 1
.tran 200u
.lib AD5683R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 464 112 192 112
WIRE -800 144 -800 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL AD5683R -208 112 R0
SYMATTR InstName U2
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 1m
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
* Z:\home\khalils\Downloads\files\data\raw_asc\AD797.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD797.asy)
V3 IN 0 SINE(0 10 1k)
RG N001 IN 10k
V2 V- 0 -15
XU1 0 N001 V+ V- OUT AD797 ;pnba In+)In-)V+)V-)OUT
R1 OUT 0 600
RF OUT N001 10k
V1 V+ 0 15
.tran 5m
.lib AD797.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1668 868
WIRE -128 16 -144 16
WIRE -48 16 -128 16
WIRE 64 16 32 16
WIRE 112 16 64 16
WIRE 240 16 192 16
WIRE -144 32 -144 16
WIRE -352 48 -368 48
WIRE -240 48 -256 48
WIRE -368 80 -368 48
WIRE -256 80 -256 48
WIRE -144 128 -144 112
WIRE 144 128 144 112
WIRE 64 144 64 16
WIRE 112 144 64 144
WIRE 240 160 240 16
WIRE 240 160 176 160
WIRE 256 160 240 160
WIRE -368 176 -368 160
WIRE -256 176 -256 160
WIRE 112 176 64 176
WIRE 240 192 240 160
WIRE 144 208 144 192
WIRE 240 304 240 272
WIRE 64 352 64 176
SYMBOL voltage -368 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 208 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RF
SYMATTR Value 10k
SYMBOL res 48 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RG
SYMATTR Value 10k
SYMBOL voltage -144 16 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 10 1k)
SYMBOL AD797 144 96 R0
SYMATTR InstName U1
SYMBOL res 224 176 R0
SYMATTR InstName R1
SYMATTR Value 600
SYMBOL voltage -256 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
FLAG -368 176 0
FLAG -256 176 0
FLAG -256 48 V-
FLAG -368 48 V+
FLAG 144 112 V+
FLAG 144 208 V-
FLAG 64 352 0
FLAG -144 128 0
FLAG 240 304 0
FLAG 256 160 OUT
FLAG -128 16 IN
TEXT -344 -72 Left 2 !.tran 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\1739de8eb915_preamp_v5_ajustadocondata.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Input 0 PULSE(0 100m 20n 0.01n 0.01n 40n 0 1) AC 1
R1 N001 Input 1k
R2 Out N001 10k
V2 N002 0 5
V3 0 N003 5
XU2 0 N001 N002 N003 Out level1 Avol=1Meg GBW=100Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R3 Out 0 10k
.ac dec 1000 1e5 1e9
* .tran 200n
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp1.asy)
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -112 160 -112
WIRE 480 -112 352 -112
WIRE 368 32 304 32
WIRE 0 64 -96 64
WIRE 112 64 80 64
WIRE 160 64 160 -112
WIRE 160 64 112 64
WIRE 304 64 304 32
WIRE 368 64 368 32
WIRE 304 192 304 144
WIRE 112 208 112 64
WIRE 272 208 112 208
WIRE 480 224 480 -112
WIRE 480 224 336 224
WIRE 528 224 480 224
WIRE 560 224 528 224
WIRE 272 240 128 240
WIRE 528 272 528 224
WIRE -464 288 -464 208
WIRE 128 320 128 240
WIRE 304 352 304 256
WIRE 528 384 528 352
WIRE -464 432 -464 368
WIRE 304 480 304 432
FLAG 304 480 0
FLAG 368 64 0
FLAG -464 432 0
FLAG 560 224 Out
FLAG 528 384 0
FLAG 128 320 0
FLAG -464 208 Input
FLAG -96 64 Input
SYMBOL voltage -464 272 R0
WINDOW 123 -517 69 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 -523 34 Left 2
SYMATTR Value2 AC 1
SYMATTR Value PULSE(0 100m 20n 0.01n 0.01n 40n 0 1)
SYMATTR InstName V1
SYMBOL res 96 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 368 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 304 160 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 304 448 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL OpAmps\\UniversalOpAmp1 304 224 R0
SYMATTR InstName U2
SYMATTR Value2 Avol=1Meg GBW=100Meg Vos=0
SYMBOL res 512 256 R0
SYMATTR InstName R3
SYMATTR Value 10k
TEXT -128 504 Left 2 !.ac dec 1000 1e5 1e9
TEXT -120 472 Left 2 ;.tran 200n
* Z:\home\khalils\Downloads\files\data\raw_asc\06e6db310b37_ADC_R_2R_bit_1__mismatch.asc
* Generated by LTspice 26.0.1 for Windows.
S3 N001 Vrefp Bin Vtrip switmod
R4 VDD Vtrip 100Meg
R2 Out_top Out_bot 10k
R3 Vtrip 0 100Meg
R1 Out_top N001 20.1k
S4 Vrefm N001 Vtrip Bin switmod
.model switmod SW
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2740 696
WIRE 944 -752 912 -752
WIRE 1008 -784 912 -784
WIRE 1008 -784 1008 -864
WIRE 1008 -688 1008 -784
WIRE 1024 -864 1008 -864
WIRE 1024 -752 944 -752
WIRE 1024 -752 1024 -816
WIRE 1024 -736 1024 -752
WIRE 1024 -688 1008 -688
WIRE 1072 -1392 912 -1392
WIRE 1072 -1328 1072 -1392
WIRE 1072 -1216 1072 -1248
WIRE 1072 -1184 1072 -1216
WIRE 1072 -1040 1072 -1104
WIRE 1072 -928 1008 -928
WIRE 1072 -880 1072 -928
WIRE 1072 -784 1072 -800
WIRE 1072 -752 1072 -784
WIRE 1072 -624 1008 -624
WIRE 1072 -624 1072 -672
WIRE 1152 -1216 1072 -1216
WIRE 1184 -1216 1152 -1216
WIRE 1280 -784 1072 -784
WIRE 1408 -784 1360 -784
WIRE 1408 -768 1408 -784
WIRE 1408 -640 1408 -688
WIRE 1584 -784 1408 -784
WIRE 1584 -640 1408 -640
IOPIN 912 -1392 In
IOPIN 1008 -624 In
IOPIN 1008 -928 In
IOPIN 912 -784 In
IOPIN 1584 -784 Out
IOPIN 1584 -640 Out
SYMBOL res 1056 -1200 R0
SYMATTR InstName R3
SYMATTR Value 100MEG
SYMBOL res 1056 -1344 R0
SYMATTR InstName R4
SYMATTR Value 100MEG
SYMBOL res 1392 -784 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 1376 -800 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 20.1k
SYMBOL sw 1072 -784 M180
WINDOW 3 24 -12 Left 0
WINDOW 38 39 67 Left 0
WINDOW 0 38 33 Left 0
SYMATTR Value ""
SYMATTR SpiceModel switmod
SYMATTR InstName S3
SYMBOL sw 1072 -656 M180
WINDOW 3 24 -12 Left 0
WINDOW 38 39 67 Left 0
WINDOW 0 38 33 Left 0
SYMATTR Value ""
SYMATTR SpiceModel switmod
SYMATTR InstName S4
FLAG 1152 -1216 Vtrip
FLAG 1072 -1040 0
FLAG 912 -1392 VDD
FLAG 1008 -624 Vrefm
FLAG 1008 -928 Vrefp
FLAG 912 -784 Bin
FLAG 1584 -784 Out_top
FLAG 1584 -640 Out_bot
FLAG 944 -752 Vtrip
TEXT 1264 -1048 Left 0 !.model switmod SW
* Z:\tmp\asc_dec_bjh7r6w2\1305462424bb_INV_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 N003 BAT54
D3 N001 N002 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 64 16 48
WIRE 352 64 16 64
WIRE 16 176 16 144
WIRE 16 176 -48 176
WIRE 48 176 16 176
WIRE 128 176 112 176
WIRE 208 176 192 176
WIRE 224 176 208 176
WIRE 352 176 352 144
WIRE 352 176 288 176
WIRE 352 192 352 176
WIRE 432 192 352 192
WIRE 352 208 352 192
WIRE 208 256 208 176
WIRE 288 256 208 256
SYMBOL schottky 224 192 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL diode 128 160 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D3
SYMATTR Value 1N4148
FLAG 352 304 0
FLAG 16 48 V+
FLAG -48 176 I
* Z:\home\khalils\Downloads\files\data\raw_asc\ADGM1304.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 2
V2 N003 0 PULSE(3.3 0 0 10u 10u 10m 20m)
V3 +V 0 3.3
R1 N002 0 300
XU1 +V N003 N001 N002 0 ADGM1304 ;pnba VDD)IN)RF1)RFC)GND
.tran 100m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADGM1304.asy)
.lib ADGM1304.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2144 2724
WIRE 912 32 880 32
WIRE 912 96 912 32
WIRE 704 176 672 176
WIRE 816 176 784 176
WIRE 1088 176 1008 176
WIRE 1088 192 1088 176
WIRE 816 240 736 240
WIRE 560 272 528 272
WIRE 1088 288 1088 272
WIRE 560 304 560 272
WIRE 736 304 736 240
WIRE 912 368 912 352
WIRE 560 416 560 384
WIRE 736 432 736 384
FLAG 672 176 0
FLAG 1088 288 0
FLAG 912 368 0
FLAG 736 432 0
FLAG 912 32 +V
FLAG 560 416 0
FLAG 560 272 +V
SYMBOL voltage 800 176 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL voltage 736 288 R0
WINDOW 3 33 134 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(3.3 0 0 10u 10u 10m 20m)
SYMATTR InstName V2
SYMBOL voltage 560 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL res 1072 176 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL ADGM1304 912 224 R0
SYMATTR InstName U1
TEXT 1088 352 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL40502-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL40502-1.8.asy)
Rload vOUT 0 9
V1 vIN 0 2.3
XU1 vIN 0 vIN vOUT ADPL40502-1.8 ;pnba Vin)GND)EN)Vout
C1 vOUT 0 1 Rser=1m
.tran 1m startup
.lib ADPL40502-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2808 1464
WIRE 1824 880 1728 880
WIRE 1984 880 1824 880
WIRE 1728 896 1728 880
WIRE 1984 896 1984 880
WIRE 1728 992 1728 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL VOLTAGE 1728 880 R0
SYMATTR InstName V1
SYMATTR Value 2.3
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMATTR SpiceLine Rser=1m
SYMBOL ADPL40502-1.8 1984 1024 R0
SYMATTR InstName U1
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 9
FLAG 2256 1024 vOUT
FLAG 2256 1136 0
FLAG 1728 992 0
FLAG 1728 880 vIN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6363-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6363-1.asy)
C1 N001 0 .1
V2 -V 0 -1
XU1 0 N001 +V +OUT -OUT -V +V IN LTC6363-1 ;pnba IN-)Vocm)V+)+OUT)-OUT)V-)_SHDN)IN+
V3 IN 0 SINE(0 500m 250K)
V1 +V 0 6
.tran 20u
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2592 1424
WIRE 464 -16 464 -48
WIRE 336 64 256 64
WIRE 624 64 592 64
WIRE 336 128 64 128
WIRE 624 128 592 128
WIRE -176 144 -176 128
WIRE -64 144 -64 128
WIRE 64 144 64 128
WIRE -176 240 -176 224
WIRE -64 240 -64 224
WIRE 64 240 64 224
WIRE 400 240 400 224
WIRE 464 240 464 224
WIRE 512 272 512 224
WIRE 512 352 512 336
SYMBOL cap 496 272 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage -176 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL LTC6363-1 464 96 R0
SYMATTR InstName U1
SYMBOL voltage 64 128 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 500m 250K)
SYMBOL voltage -64 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value -1
FLAG -176 240 0
FLAG -64 240 0
FLAG -176 128 +V
FLAG -64 128 -V
FLAG 464 -48 +V
FLAG 464 240 -V
FLAG 400 240 +V
FLAG 64 240 0
FLAG 64 128 IN
FLAG 624 64 +OUT
FLAG 624 128 -OUT
FLAG 256 64 0
FLAG 512 352 0
TEXT 640 336 Left 2 !.tran 20u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP172-2.1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP172-2.1.asy)
C1 OUT 0 1
XU1 OUT IN IN 0 ADP172-2.1 ;pnba Vout)Vin)En)GND
RLOAD OUT 0 7.06
V1 IN 0 3.6
.tran 2m startup
.lib ADP172-2.1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 80 -48 80
WIRE 48 80 -32 80
WIRE 64 80 48 80
WIRE 304 80 256 80
WIRE 336 80 304 80
WIRE 384 80 336 80
WIRE -48 96 -48 80
WIRE 304 96 304 80
WIRE 304 176 304 160
WIRE 384 176 384 160
WIRE -48 192 -48 176
WIRE 48 192 48 80
WIRE 64 192 48 192
WIRE 272 192 256 192
SYMBOL res 368 64 R0
SYMATTR InstName RLOAD
SYMATTR Value 7.06
SYMBOL ADP172-2.1 160 192 R0
SYMATTR InstName U1
SYMBOL voltage -48 80 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL cap 288 96 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG -48 192 0
FLAG 304 176 0
FLAG 272 192 0
FLAG 384 176 0
FLAG -32 80 IN
FLAG 336 80 OUT
TEXT 160 256 Center 2 !.tran 2m startup
* Z:\tmp\asc_dec_bjh7r6w2\055f2d22933a_1221_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 N002 10K
XU2 IN+ N007 +V -V N008 LT1221 ;pnba In+)In-)V+)V-)OUT
C1 N005 0 250p
R7 N005 N007 250
R6 N001 N004 1K
R8 N004 N005 250
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1221.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 728
WIRE 48 64 48 48
WIRE 16 80 -64 80
WIRE -208 96 -208 80
WIRE 160 96 80 96
WIRE 176 96 160 96
WIRE 272 96 256 96
WIRE 288 96 272 96
WIRE 384 96 368 96
WIRE 16 112 -16 112
WIRE 48 144 48 128
WIRE -208 192 -208 176
WIRE -16 192 -16 112
WIRE 64 192 -16 192
WIRE 160 192 160 96
WIRE 160 192 144 192
WIRE -16 208 -16 192
WIRE -96 240 -400 240
WIRE -64 240 -64 80
WIRE -64 240 -96 240
WIRE 320 272 320 256
WIRE 272 288 272 96
WIRE 288 288 272 288
WIRE -96 304 -112 304
WIRE -16 304 -16 288
WIRE -16 304 -32 304
WIRE 384 304 384 96
WIRE 384 304 352 304
WIRE -16 320 -16 304
WIRE 288 320 272 320
WIRE 320 352 320 336
WIRE -96 384 -400 384
WIRE -64 384 -96 384
WIRE -16 416 -16 400
WIRE 64 416 -16 416
WIRE 160 416 144 416
WIRE 48 480 48 464
WIRE -16 496 -16 416
WIRE 16 496 -16 496
WIRE 160 512 160 416
WIRE 160 512 80 512
WIRE 176 512 160 512
WIRE 272 512 272 320
WIRE -64 528 -64 384
WIRE 16 528 -64 528
WIRE 48 560 48 544
SYMBOL res 384 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL opamps\\LT1221 48 448 R0
SYMATTR InstName U2
SYMBOL cap -32 288 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C1
SYMATTR Value 250p
SYMBOL res -32 304 R0
SYMATTR InstName R7
SYMATTR Value 250
SYMBOL res 160 176 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R6
SYMATTR Value 1K
SYMBOL res -32 192 R0
SYMATTR InstName R8
SYMATTR Value 250
FLAG -208 192 0
FLAG 320 256 +V
FLAG -208 80 +V
FLAG 320 352 -V
FLAG 48 464 +V
FLAG 48 560 -V
FLAG 48 144 +V
FLAG 48 48 -V
FLAG -112 304 0
FLAG -96 240 IN-
FLAG -96 384 IN+
* Z:\home\khalils\Downloads\files\data\raw_asc\f816bd54dbf5_MosfetCharacteristic.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 0 nmos_enchancement_mosfet L=10u W=400u
VGS N002 0 3V
VDS N001 0 0V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model nmos_enchancement_mosfet nmos (kp=20u Vto=+2V lambda={lambda_variable})
.STEP param lambda_variable 0 0.05 0.01; * vary lambda_variable from 0 to 0.05 in increments of 0.01
.DC VDS 0V 10V 100mV
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 960 680
WIRE 640 -48 272 -48
WIRE 272 96 272 -48
WIRE 640 128 640 -48
WIRE 224 176 -16 176
WIRE -16 224 -16 176
WIRE -16 368 -16 304
WIRE 272 368 272 192
WIRE 272 368 -16 368
WIRE 640 368 640 208
WIRE 640 368 272 368
WIRE 272 448 272 368
FLAG 272 448 0
SYMBOL nmos 224 96 R0
SYMATTR InstName M1
SYMATTR Value nmos_enchancement_mosfet L=10u W=400u
SYMBOL voltage -16 208 R0
SYMATTR InstName VGS
SYMATTR Value 3V
SYMBOL voltage 640 112 R0
SYMATTR InstName VDS
SYMATTR Value 0V
TEXT -240 528 Left 2 !.model nmos_enchancement_mosfet nmos (kp=20u Vto=+2V lambda={lambda_variable})\n.STEP param lambda_variable 0 0.05 0.01; * vary lambda_variable from 0 to 0.05 in increments of 0.01\n.DC VDS 0V 10V 100mV
* Z:\tmp\asc_dec_bjh7r6w2\04b0282c689a_BufferTriState_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 Input N002 N001 PMOS
M4 N003 N002 0 0 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -80 -240 -128 -240
WIRE 32 -240 -80 -240
WIRE -128 -208 -128 -240
WIRE -80 -160 -80 -240
WIRE -80 -160 -128 -160
WIRE -176 -128 -256 -128
WIRE 112 -128 16 -128
WIRE -256 -16 -256 -128
WIRE -256 -16 -320 -16
WIRE -128 32 -128 -112
WIRE 16 32 16 -128
WIRE 16 32 -128 32
WIRE 160 32 160 0
WIRE 256 32 160 32
WIRE 160 64 160 32
WIRE 256 112 160 112
WIRE 160 160 160 144
WIRE 160 176 160 160
WIRE 256 224 256 112
WIRE 256 224 160 224
WIRE -256 256 -256 -16
WIRE 16 256 16 32
WIRE 112 256 16 256
WIRE 16 320 -128 320
WIRE 160 320 160 272
WIRE 160 320 16 320
WIRE 256 320 256 224
WIRE 256 320 160 320
WIRE 16 352 16 320
SYMBOL pmos4 -176 -208 R0
SYMATTR InstName M1
SYMBOL nmos4 112 176 R0
SYMATTR InstName M4
FLAG -320 -16 Input
FLAG 16 352 GND
FLAG 256 32 Output
* Z:\home\khalils\Downloads\files\data\raw_asc\1265f6b9e0f9_hpf_1st_ord_1khz_cutoff.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 AC 1
R1 N002 0 1591.549431
D1 0 N002 D
C1 N002 N001 100n
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.ac oct 1000 1 2meg
.meas AC f FIND frequency WHEN mag(V(n002))=0.7079457843841379
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 144 96 64 96
WIRE 256 96 208 96
WIRE 480 96 256 96
WIRE 64 128 64 96
WIRE 256 128 256 96
WIRE 480 128 480 96
WIRE 64 240 64 208
WIRE 256 240 256 208
WIRE 256 240 64 240
WIRE 480 240 480 192
SYMBOL res 240 112 R0
SYMATTR InstName R1
SYMATTR Value 1591.549431
SYMBOL cap 208 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL voltage 64 112 R0
WINDOW 3 24 152 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL diode 496 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
FLAG 64 240 0
FLAG 480 240 0
TEXT 40 40 Left 2 !.ac oct 1000 1 2meg
TEXT -160 -24 Left 2 !.meas AC f FIND frequency WHEN mag(V(n002))=0.7079457843841379
* Z:\home\khalils\Downloads\files\data\raw_asc\134ea54815c5_Experiment_3.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N003 N002 D
VInputB N003 0
D2 N001 N002 D
VInputA N001 0
RLoad_Resistor N002 0 10k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 432 -96 -32 -96
WIRE 528 -96 496 -96
WIRE 528 -32 528 -96
WIRE 624 -32 528 -32
WIRE 432 32 272 32
WIRE 528 32 528 -32
WIRE 528 32 496 32
WIRE -32 112 -32 -96
WIRE 272 112 272 32
WIRE 624 112 624 -32
WIRE -32 272 -32 192
WIRE 272 272 272 192
WIRE 624 272 624 192
SYMBOL res 608 96 R0
SYMATTR InstName Load_Resistor
SYMATTR Value 10k
SYMBOL diode 432 48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL voltage -32 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName InputA
SYMATTR Value ""
SYMBOL voltage 272 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName InputB
SYMATTR Value ""
SYMBOL diode 432 -80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
FLAG -32 272 0
FLAG 272 272 0
FLAG 624 272 0
* Z:\home\khalils\Downloads\files\data\raw_asc\b6698de94a32_relax_osc.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R2 N003 0 10K
R3 N003 Vcc 10K
V1 Vcc 0 5
C1 N001 0 22n
R4 N002 N001 560
R1 N002 N003 7.5k
XU2 N003 N001 Vcc 0 N002 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.tran 0 1m 0
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 112 128 112
WIRE 240 112 224 112
WIRE 256 112 240 112
WIRE 416 112 336 112
WIRE 128 144 128 112
WIRE 240 208 240 112
WIRE 320 208 240 208
WIRE 416 224 416 112
WIRE 416 224 384 224
WIRE 320 240 272 240
WIRE 160 384 128 384
WIRE 272 384 272 240
WIRE 272 384 240 384
WIRE 304 384 272 384
WIRE 416 384 416 224
WIRE 416 384 384 384
WIRE 272 416 272 384
WIRE 272 528 272 496
SYMBOL res 256 400 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL OpAmps\\UniversalOpAmp2 352 224 R0
SYMATTR InstName U2
SYMBOL res 400 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 7.5k
SYMBOL res 352 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 560
SYMBOL cap 224 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL voltage -64 288 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 256 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
FLAG 272 528 0
FLAG -64 384 0
FLAG -64 304 Vcc
FLAG 352 192 Vcc
FLAG 352 256 0
FLAG 128 144 0
FLAG 128 384 Vcc
TEXT 272 656 Left 2 !.tran 0 1m 0