Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1475-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1475-3.3.asy)
V1 IN 0 10
XU1 OUT N002 IN 0 N001 IN IN N003 LTC1475 top=1.68Meg bot=1Meg ;pnba FB)LBO)_OFF)GND)SW)Sense)Vin)_ON
D1 0 N001 MBR0530L
C1 OUT 0 100
Rload OUT 0 20
L1 N001 OUT 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m startup
.lib LTC1475.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2764 1608
WIRE 1584 1184 1440 1184
WIRE 1776 1184 1584 1184
WIRE 1440 1200 1440 1184
WIRE 1776 1200 1776 1184
WIRE 1584 1264 1584 1184
WIRE 1632 1264 1584 1264
WIRE 2000 1264 1920 1264
WIRE 2048 1264 2000 1264
WIRE 2176 1264 2128 1264
WIRE 2240 1264 2176 1264
WIRE 2352 1264 2240 1264
WIRE 2240 1280 2240 1264
WIRE 2352 1280 2352 1264
WIRE 1440 1296 1440 1280
WIRE 2000 1312 2000 1264
WIRE 1584 1344 1584 1264
WIRE 1632 1344 1584 1344
WIRE 1936 1344 1920 1344
WIRE 2240 1376 2240 1344
WIRE 2352 1376 2352 1360
WIRE 2000 1392 2000 1376
WIRE 1632 1424 1616 1424
WIRE 2176 1424 2176 1264
WIRE 2176 1424 1920 1424
WIRE 1776 1504 1776 1488
SYMBOL VOLTAGE 1440 1184 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL schottky 1984 1376 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBR0530L
SYMBOL polcap 2224 1280 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMBOL PowerProducts\\LTC1475-3.3 1776 1344 R0
SYMATTR InstName U1
SYMBOL res 2336 1264 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL ind 2032 1280 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
FLAG 1440 1296 0
FLAG 2000 1392 0
FLAG 2240 1376 0
FLAG 2352 1376 0
FLAG 1776 1504 0
FLAG 2352 1264 OUT
FLAG 1440 1184 IN
TEXT 2016 1496 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5693R.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5693R.asy)
CLOAD NC_01 0 10n
I1 0 0 1m AC 1
XU1 vDAC Vdd 0 vOUT AD5693R Gain=2 ;pnba Vdac)Vdd)GND)Vout
V1 Vdd 0 5
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
Vdac1 NC_02 0 1.25
.tran 200u
.lib AD5693R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 464 112 192 112
WIRE -800 144 -800 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
SYMBOL AD5693R -208 112 R0
SYMATTR InstName U1
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 1m
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2
* Z:\home\khalils\Downloads\files\data\raw_asc\1698a728993e_mos_cd_vgs.asc
* Generated by LTspice 26.0.1 for Windows.
* .op
* .tran 0 0.5 1m 1u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP747.asy)
VOP+ N001 0 10
VOP- N003 0 -10
RS Vout 0 2k
M1 VD VG Vout Vout SQJ910AEP_Q2
VDD VD 0 5
RL Vout 0 2k
VS N002 0 5
XU1 Vout N002 N001 N003 VG OP747 ;pnba In+)In-)V+)V-)OUT
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VS 1m 10 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 256 0 192 0
WIRE 368 0 336 0
WIRE 0 16 -64 16
WIRE -64 32 -64 16
WIRE 368 32 368 0
WIRE 0 48 0 16
WIRE 192 112 192 0
WIRE 304 112 192 112
WIRE 192 128 192 112
WIRE -64 176 -64 112
WIRE -96 192 -176 192
WIRE 112 208 -32 208
WIRE 144 208 112 208
WIRE -96 224 -112 224
WIRE 288 224 192 224
WIRE 400 224 288 224
WIRE -176 240 -176 192
WIRE 192 240 192 224
WIRE 192 256 192 240
WIRE 288 256 288 224
WIRE -64 272 -64 240
WIRE 192 352 192 336
WIRE 288 352 288 336
WIRE 288 352 192 352
WIRE -176 368 -176 320
WIRE -64 368 -64 352
WIRE 192 368 192 352
WIRE -112 496 -112 224
WIRE 400 496 400 224
WIRE 400 496 -112 496
SYMBOL voltage -176 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 5
SYMBOL voltage -64 128 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VOP+
SYMATTR Value 10
SYMBOL res 272 240 R0
SYMATTR InstName RL
SYMATTR Value 2k
SYMBOL res 176 240 R0
SYMATTR InstName RS
SYMATTR Value 2k
SYMBOL nmos 144 128 R0
SYMATTR InstName M1
SYMATTR Value SQJ910AEP_Q2
SYMBOL OpAmps\\OP747 -64 144 R0
SYMATTR InstName U1
SYMBOL voltage 240 0 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL voltage -64 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VOP-
SYMATTR Value -10
FLAG 192 368 0
FLAG 192 240 Vout
FLAG 368 32 0
FLAG 304 112 VD
FLAG 112 208 VG
FLAG -64 368 0
FLAG 0 48 0
FLAG -176 368 0
TEXT 0 392 Left 2 ;.op
TEXT 0 424 Left 2 ;.tran 0 0.5 1m 1u
TEXT 0 456 Left 2 !.dc VS 1m 10 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8617.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8617.asy)
V2 -V 0 -2.5
R1 N001 0 10K
Vin IN 0 SINE(0 1 1K)
R2 OUT N001 10K
V1 +V 0 2.5
XU1 IN N001 +V -V OUT AD8617 ;pnba In+)In-)V+)V-)OUT
Rload OUT 0 10K
.tran 10m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 1K)
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Opamps\\AD8617 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
TEXT 680 -944 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2371-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2371-3.3.asy)
C1 OUT 0 10
V1 IN 0 12
XU1 IN IN IN IN N002 OUT N001 0 ADP2371-3.3 IPSM=440m Rt=378787.879 Rb=121212.121 C1=1.6p Rc1=300k R3=5.92k Rshort=100MEG PD=1 ;pnba FSEL)SYNC)EN)Vin)SW)FB)PG)PGND
L1 N002 OUT 10 Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
R1 OUT N001 10K
Rload OUT 0 20
.tran 500u startup
.lib ADP2371-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 692
WIRE 144 96 32 96
WIRE 176 96 144 96
WIRE 480 96 400 96
WIRE 640 96 560 96
WIRE 32 112 32 96
WIRE 144 176 144 96
WIRE 176 176 144 176
WIRE 432 176 400 176
WIRE 560 176 512 176
WIRE 640 176 640 96
WIRE 640 176 560 176
WIRE 704 176 640 176
WIRE 704 192 704 176
WIRE 32 208 32 192
WIRE 144 256 144 176
WIRE 176 256 144 256
WIRE 560 256 560 240
WIRE 560 256 400 256
WIRE 560 272 560 256
WIRE 704 288 704 272
WIRE 144 336 144 256
WIRE 176 336 144 336
WIRE 640 336 640 176
WIRE 640 336 400 336
SYMBOL cap 544 176 R0
WINDOW 0 29 15 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ind 416 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
SYMBOL res 576 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 688 176 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL ADP2371-3.3 288 208 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 32 96 R0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 32 208 0
FLAG 32 96 IN
FLAG 560 272 0
FLAG 704 176 OUT
FLAG 704 288 0
TEXT 536 376 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\13dff7ca1459_TBJ01.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 C B 0 0 BC546B
Rb V1 B {Rb}
Rc V1 C {Rc}
V1 V1 0 {Vcc}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.param Vcc=50 Rb=680 Rc=100
.meas VRc param V(V1)-V(c)
.meas VRb param V(V1)-V(b)
.meas PRb param VRb*I(Rb)
.meas PRc param VRc*I(Rc)
.meas Beta param I(Rc)/I(Rb)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 256 -32 128 -32
WIRE 368 -32 256 -32
WIRE 256 0 256 -32
WIRE 368 0 368 -32
WIRE 128 112 128 -32
WIRE 368 112 368 80
WIRE 368 128 368 112
WIRE 256 176 256 80
WIRE 272 176 256 176
WIRE 304 176 272 176
WIRE 128 272 128 192
WIRE 368 272 368 224
WIRE 368 272 128 272
WIRE 368 304 368 272
SYMBOL res 352 -16 R0
SYMATTR InstName Rc
SYMATTR Value {Rc}
SYMBOL res 240 -16 R0
SYMATTR InstName Rb
SYMATTR Value {Rb}
SYMBOL voltage 128 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vcc}
SYMBOL npn 304 128 R0
SYMATTR InstName Q1
SYMATTR Value BC546B
FLAG 368 304 0
FLAG 272 176 B
FLAG 368 112 C
FLAG 256 -32 V1
TEXT 120 312 Left 2 !.op
TEXT 120 352 Left 2 !.param Vcc=50 Rb=680 Rc=100
TEXT 552 32 Left 2 !.meas VRc param V(V1)-V(c)
TEXT 552 64 Left 2 !.meas VRb param V(V1)-V(b)
TEXT 552 96 Left 2 !.meas PRb param VRb*I(Rb)
TEXT 552 128 Left 2 !.meas PRc param VRc*I(Rc)
TEXT 552 160 Left 2 !.meas Beta param I(Rc)/I(Rb)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2504-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2504-3.3.asy)
XU1 N001 N002 OUT IN IN 0 OUT NC_01 ADP2504-3.3 ;pnba SW1)SW2)FB)EN)PVin)GND)Vout)Sync
Rload OUT 0 50
C1 OUT 0 10
V1 IN 0 3.3
L1 N001 N002 1.5 Rser=80m
.tran 400u startup
.lib ADP2504-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 48 64 32 64
WIRE 336 64 304 64
WIRE -64 80 -64 64
WIRE 32 144 32 64
WIRE 48 144 32 144
WIRE 336 144 304 144
WIRE -64 176 -64 160
WIRE 320 224 304 224
WIRE 368 224 320 224
WIRE 480 224 368 224
WIRE 368 240 368 224
WIRE 480 240 480 224
WIRE 48 304 32 304
WIRE 320 304 320 224
WIRE 320 304 304 304
WIRE 368 336 368 304
WIRE 480 336 480 320
SYMBOL res 464 224 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL voltage -64 64 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL ind 320 48 R0
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=80m
SYMBOL ADP2504-3.3 176 176 R0
SYMATTR InstName U1
SYMBOL cap 352 240 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 368 336 0
FLAG 32 304 0
FLAG -64 176 0
FLAG 480 336 0
FLAG -64 64 IN
FLAG 480 224 OUT
TEXT 336 400 Left 2 !.tran 400u startup
TEXT 176 -8 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\11e4e7d2d04b_AD8039.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8039.asy)
XU1 IN N001 +V -V OUT AD8038 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 2K
Vin IN 0 PULSE(-1 1 20n 10n 10n 90n 200n 10)
Rload OUT 0 2K
V2 -V 0 -5
V1 +V 0 5
R2 OUT N001 2K
.tran 2u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 352 -1184 336 -1184
WIRE 448 -1184 432 -1184
WIRE 464 -1184 448 -1184
WIRE 560 -1184 544 -1184
WIRE -64 -1072 -64 -1088
WIRE 32 -1072 32 -1088
WIRE 448 -1056 448 -1184
WIRE 464 -1056 448 -1056
WIRE 560 -1040 560 -1184
WIRE 560 -1040 528 -1040
WIRE 672 -1040 560 -1040
WIRE 464 -1024 176 -1024
WIRE 672 -1024 672 -1040
WIRE 176 -1008 176 -1024
WIRE -64 -976 -64 -992
WIRE 32 -976 32 -992
WIRE 672 -928 672 -944
WIRE 176 -912 176 -928
SYMBOL res 448 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL res 560 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2K
SYMBOL voltage -64 -1088 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 176 -1024 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value PULSE(-1 1 20n 10n 10n 90n 200n 10)
SYMBOL Opamps\\AD8039 496 -1104 R0
SYMATTR InstName U1
SYMBOL voltage 32 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 656 -1040 R0
SYMATTR InstName Rload
SYMATTR Value 2K
FLAG 176 -912 0
FLAG 672 -1040 OUT
FLAG 176 -1024 IN
FLAG 496 -1072 +V
FLAG 496 -1008 -V
FLAG 336 -1184 0
FLAG 672 -928 0
FLAG -64 -1088 +V
FLAG -64 -976 0
FLAG 32 -1088 -V
FLAG 32 -976 0
TEXT 656 -848 Left 2 !.tran 2u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3672B-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3672B-1.asy)
XU1 N001 0 IN OUT1 OUT1 OUT2 OUT3 IN LTC3672B-1 ;pnba SW)GND)EnAll)BuckOut)Vin1)LDO1)LDO2)Vin
C2 OUT2 0 1
C3 OUT3 0 1
V1 IN 0 3.6
Rload1 OUT1 0 7.2
L1 N001 OUT1 4.7
Rload3 OUT3 0 18.6
C1 OUT1 0 10
Rload2 OUT2 0 8
.tran .5m startup
.lib LTC3672B-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1108 740
WIRE 96 32 -48 32
WIRE 112 32 96 32
WIRE 416 32 400 32
WIRE 528 32 496 32
WIRE 576 32 528 32
WIRE 672 32 576 32
WIRE -48 48 -48 32
WIRE 576 48 576 32
WIRE 672 48 672 32
WIRE 96 128 96 32
WIRE 112 128 96 128
WIRE 528 128 528 32
WIRE 528 128 400 128
WIRE -48 144 -48 128
WIRE 576 144 576 112
WIRE 672 144 672 128
WIRE -160 224 -288 224
WIRE 112 224 -160 224
WIRE 528 224 528 128
WIRE 528 224 400 224
WIRE -288 240 -288 224
WIRE -160 240 -160 224
WIRE 64 320 -64 320
WIRE 112 320 64 320
WIRE 416 320 400 320
WIRE -288 336 -288 320
WIRE -160 336 -160 304
WIRE -64 336 -64 320
WIRE 64 336 64 320
WIRE -64 432 -64 416
WIRE 64 432 64 400
SYMBOL PowerProducts\\LTC3672B-1 256 176 R0
SYMATTR InstName U1
SYMBOL voltage -48 32 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL res -80 320 R0
SYMATTR InstName Rload3
SYMATTR Value 18.6
SYMBOL cap 48 336 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 656 32 R0
SYMATTR InstName Rload1
SYMATTR Value 7.2
SYMBOL res -304 224 R0
SYMATTR InstName Rload2
SYMATTR Value 8
SYMBOL ind 400 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL cap 560 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL cap -176 240 R0
SYMATTR InstName C2
SYMATTR Value 1
FLAG -48 144 0
FLAG -48 32 IN
FLAG 672 144 0
FLAG 576 144 0
FLAG 672 32 OUT1
FLAG -288 336 0
FLAG -160 336 0
FLAG -288 224 OUT2
FLAG -64 432 0
FLAG 64 432 0
FLAG -64 320 OUT3
FLAG 416 320 0
TEXT 456 376 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3bdacddd95b1_BVcbo.asc
* Generated by LTspice 26.0.1 for Windows.
I1 0 N002 0
Q1 N001 N002 0 0 N
V1 N001 0 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 10 5m I1 20u 100u 20u
.model N NPN(VAF=25 BVcbo=28)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1072 680
WIRE 336 96 224 96
WIRE 224 112 224 96
WIRE 336 128 336 96
WIRE 160 160 80 160
WIRE 80 176 80 160
WIRE 224 224 224 208
WIRE 336 224 336 208
WIRE 80 272 80 256
SYMBOL voltage 336 112 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL npn 160 112 R0
SYMATTR InstName Q1
SYMATTR Value N
SYMBOL current 80 256 M180
WINDOW 0 24 75 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName I1
SYMATTR Value 0
FLAG 336 224 0
FLAG 224 224 0
FLAG 80 272 0
TEXT 216 336 Top 0 !.dc V1 0 10 5m I1 20u 100u 20u
TEXT 208 296 Top 0 !.model N NPN(VAF=25 BVcbo=28)
* Z:\home\khalils\Downloads\files\data\raw_asc\07bd0b6ea334_Simu_ej_5.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N004 0 10k
R2 N002 0 10k
D2 N001 N002 1N914
V1 N003 0 PULSE(-10 10 0 1p 1p 2.5u 5u)
D1 N003 N004 1N914
V2 N001 0 PULSE(-10 10 0 1p 1p 25n 50n)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 15u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 464 48 368 48
WIRE 608 48 528 48
WIRE 32 64 -64 64
WIRE 176 64 96 64
WIRE 608 96 608 48
WIRE 176 112 176 64
WIRE 368 112 368 48
WIRE -64 128 -64 64
WIRE 368 240 368 192
WIRE 608 240 608 176
WIRE 608 240 368 240
WIRE -64 256 -64 208
WIRE 176 256 176 192
WIRE 176 256 -64 256
WIRE 368 272 368 240
WIRE -64 288 -64 256
SYMBOL diode 32 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL diode 464 64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL res 160 96 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 368 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(-10 10 0 1p 1p 25n 50n)
SYMBOL res 592 80 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage -64 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(-10 10 0 1p 1p 2.5u 5u)
FLAG -64 288 0
FLAG 368 272 0
TEXT -96 312 Left 2 !.tran 15u
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX1852.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX1852.asy)
C2 OUT 0 10
Rload OUT 0 50
C1 N001 N002 1
V1 IN 0 5
XU1 IN OUT N001 N002 0 IN MAX1852 ;pnba IN)OUT)C1+)C1-)GND)_SHDN
.tran 2m startup
.lib MAX1852.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2884 1464
WIRE 2416 1008 2080 1008
WIRE 2576 1008 2416 1008
WIRE 2080 1024 2080 1008
WIRE 2416 1024 2416 1008
WIRE 2272 1088 2208 1088
WIRE 2576 1088 2576 1008
WIRE 2576 1088 2560 1088
WIRE 2080 1120 2080 1104
WIRE 2208 1136 2208 1088
WIRE 2208 1248 2208 1200
WIRE 2272 1248 2208 1248
WIRE 2624 1248 2560 1248
WIRE 2736 1248 2624 1248
WIRE 2624 1264 2624 1248
WIRE 2736 1264 2736 1248
WIRE 2416 1328 2416 1312
WIRE 2624 1360 2624 1328
WIRE 2736 1360 2736 1344
SYMBOL VOLTAGE 2080 1008 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2192 1136 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL MAX1852 2416 1168 R0
SYMATTR InstName U1
SYMBOL cap 2608 1264 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL RES 2720 1248 R0
SYMATTR InstName Rload
SYMATTR Value 50
FLAG 2416 1328 0
FLAG 2624 1360 0
FLAG 2080 1120 0
FLAG 2736 1360 0
FLAG 2736 1248 OUT
FLAG 2080 1008 IN
TEXT 2352 1376 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\14b89643e184_demux_1default-1bit-1to2.asc
* Generated by LTspice 26.0.1 for Windows.
A1 X in 0 0 0 0 N001 0 AND
A4 X in 0 0 0 N003 N002 0 XOR
A5 N001 N002 0 0 0 0 Q[0] 0 OR
A3 N003 N004 0 0 0 0 Q[1] 0 OR
A2 in P001 0 0 0 0 N004 0 AND
A6 X 0 0 0 0 P001 0 0 BUF
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 -224 -112 -224
WIRE -176 -208 -192 -208
WIRE -48 -208 -80 -208
WIRE -192 -192 -192 -208
WIRE -176 -192 -192 -192
WIRE -48 -192 -64 -192
WIRE -192 -176 -192 -192
WIRE -176 -176 -192 -176
WIRE -64 -176 -64 -192
WIRE -48 -176 -64 -176
WIRE -192 -160 -192 -176
WIRE -176 -160 -192 -160
WIRE -160 -160 -160 -176
WIRE -160 -160 -176 -160
WIRE -64 -160 -64 -176
WIRE -48 -160 -64 -160
WIRE -64 -144 -64 -160
WIRE -48 -144 -64 -144
WIRE -32 -144 -32 -160
WIRE -32 -144 -48 -144
WIRE -80 -80 -80 -208
WIRE -80 -80 -112 -80
WIRE -176 -64 -192 -64
WIRE -192 -48 -192 -64
WIRE -176 -48 -192 -48
WIRE -80 -48 -96 -48
WIRE -192 -32 -192 -48
WIRE -176 -32 -192 -32
WIRE -192 -16 -192 -32
WIRE -176 -16 -192 -16
WIRE -144 -16 -144 -32
WIRE -144 -16 -176 -16
WIRE -80 48 -80 -48
WIRE -48 48 -80 48
WIRE -48 64 -112 64
WIRE -176 80 -192 80
WIRE -48 80 -64 80
WIRE -192 96 -192 80
WIRE -176 96 -192 96
WIRE -64 96 -64 80
WIRE -48 96 -64 96
WIRE -192 112 -192 96
WIRE -176 112 -192 112
WIRE -64 112 -64 96
WIRE -48 112 -64 112
WIRE -192 128 -192 112
WIRE -176 128 -192 128
WIRE -160 128 -160 112
WIRE -160 128 -176 128
WIRE -64 128 -64 112
WIRE -48 128 -64 128
WIRE -32 128 -32 112
WIRE -32 128 -48 128
IOPIN -176 -80 In
IOPIN 16 -208 Out
IOPIN -176 -96 In
IOPIN -176 -224 In
IOPIN -176 -240 In
IOPIN 16 64 Out
IOPIN -176 48 In
IOPIN -240 64 In
SYMBOL Digital\\and -144 16 R0
SYMATTR InstName A2
SYMBOL Digital\\and -144 -272 R0
SYMATTR InstName A1
SYMBOL Digital\\inv -240 0 R0
SYMATTR InstName A6
SYMBOL Digital\\or -16 -256 R0
SYMATTR InstName A5
SYMBOL Digital\\or -16 16 R0
SYMATTR InstName A3
SYMBOL Digital\\xor -128 -128 R0
SYMATTR InstName A4
FLAG -176 -160 0
FLAG -112 -192 0
FLAG -176 -80 in
FLAG 16 -208 Q[0]
FLAG -176 -96 X
FLAG -176 -16 0
FLAG -176 -224 in
FLAG -176 -240 X
FLAG -48 -144 0
FLAG 16 -176 0
FLAG 16 64 Q[1]
FLAG -48 128 0
FLAG 16 96 0
FLAG -176 128 0
FLAG -112 96 0
FLAG -176 48 in
FLAG -240 64 X
FLAG -240 80 0
* Z:\home\khalils\Downloads\files\data\raw_asc\0d9f4afe959d_1693-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1693-2.asy)
V1 N001 0 5
XU1 N002 0 N002 0 N004 N001 N003 N001 LTC1693-2 ;pnba IN1)GND1)IN2)GND2)_OUT2)Vcc2)OUT1)Vcc1
V2 N002 0 PULSE(0 5 0 1n 1n 5u 10u)
.tran 100u
.lib LTC1693-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2388 1428
WIRE 1632 1008 1504 1008
WIRE 1856 1008 1632 1008
WIRE 1856 1024 1856 1008
WIRE 1504 1040 1504 1008
WIRE 1632 1040 1632 1008
WIRE 1440 1120 1104 1120
WIRE 1712 1120 1696 1120
WIRE 1856 1120 1856 1104
WIRE 1104 1216 1104 1120
WIRE 1440 1216 1104 1216
WIRE 1712 1216 1696 1216
WIRE 1104 1232 1104 1216
WIRE 1504 1312 1504 1296
WIRE 1632 1312 1632 1296
WIRE 1104 1328 1104 1312
SYMBOL voltage 1104 1216 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1n 1n 5u 10u)
SYMBOL PowerProducts\\LTC1693-2 1568 1168 R0
SYMATTR InstName U1
SYMBOL voltage 1856 1008 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 1856 1120 0
FLAG 1632 1312 0
FLAG 1504 1312 0
FLAG 1104 1328 0
TEXT 1616 1400 Left 2 !.tran 100u