Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\2ndOrderBandpass.asc
* Generated by LTspice 26.0.1 for Windows.
* f0 and Q set by parameters
* R1 is arbitary
* This version puts 1/2 the R1 resistance in the capacitor
* Vout
* Vin
* The parameter "H" sets the midband gain
R4 2 0 1Meg
G1 0 N002 1 0 {2/R1}
R3 2 0 .1
R2 N003 N002 {R1/2}
L1 N003 0 {L1} Cpar={C1}
V1 1 0 AC 1
R1 N002 0 {R1/2}
G2 0 2 N003 0 {10*H}
.param f0= 1k Q=0.5
.param R1=1k
.param L1=1/(C1*(2*pi*f0)**2)
.param C1=Q/(R1*2*pi*f0)
.param H=1
.ac dec 101 100 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE -384 -128 -448 -128
WIRE -288 -128 -320 -128
WIRE -112 -128 -240 -128
WIRE -64 -128 -112 -128
WIRE 64 -128 16 -128
WIRE 240 -128 64 -128
WIRE 400 -128 288 -128
WIRE 464 -128 400 -128
WIRE 496 -128 464 -128
WIRE 624 -128 560 -128
WIRE -448 -112 -448 -128
WIRE -240 -96 -240 -128
WIRE -288 -80 -288 -128
WIRE -112 -64 -112 -128
WIRE 64 -64 64 -128
WIRE 288 -64 288 -128
WIRE 400 -64 400 -128
WIRE 624 -64 624 -128
WIRE 240 -48 240 -128
WIRE -448 0 -448 -32
WIRE -288 0 -288 -32
WIRE -240 16 -240 -16
WIRE 240 32 240 0
WIRE 288 32 288 16
WIRE 400 32 400 16
WIRE 624 32 624 16
WIRE -112 48 -112 16
WIRE 64 48 64 16
SYMBOL voltage -448 -128 R0
WINDOW 0 35 41 Left 2
WINDOW 123 33 80 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMBOL res -128 -80 R0
SYMATTR InstName R1
SYMATTR Value {R1/2}
SYMBOL g 288 -80 R0
SYMATTR InstName G2
SYMATTR Value {10*H}
SYMBOL res 32 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R1/2}
SYMBOL res 384 -80 R0
SYMATTR InstName R3
SYMATTR Value .1
SYMBOL res 608 -80 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL g -240 -112 R0
SYMATTR InstName G1
SYMATTR Value {2/R1}
SYMBOL ind 48 -80 R0
WINDOW 0 59 45 Bottom 2
WINDOW 3 61 50 Top 2
WINDOW 123 102 107 Bottom 2
SYMATTR InstName L1
SYMATTR Value {L1}
SYMATTR Value2 Cpar={C1}
SYMBOL Misc\\jumper 528 -192 R0
SYMATTR InstName J2
SYMBOL Misc\\jumper -352 -192 M0
SYMATTR InstName J1
FLAG 64 48 0
FLAG -112 48 0
FLAG -240 16 0
FLAG -288 0 0
FLAG 240 32 0
FLAG 288 32 0
FLAG 400 32 0
FLAG 464 -128 2
FLAG -288 -128 1
FLAG -448 0 0
FLAG 624 32 0
TEXT -96 136 Left 2 !.param f0= 1k Q=0.5
TEXT -264 176 Left 2 !.param R1=1k
TEXT -440 296 Left 2 !.param L1=1/(C1*(2*pi*f0)**2)
TEXT -432 136 Left 2 ;f0 and Q set by parameters
TEXT -432 176 Left 2 ;R1 is arbitary
TEXT -328 -200 Left 2 ;This version puts 1/2 the R1 resistance in the capacitor
TEXT -440 256 Left 2 !.param C1=Q/(R1*2*pi*f0)
TEXT 576 -144 Left 2 ;Vout
TEXT -400 -144 Right 2 ;Vin
TEXT -432 216 Left 2 ;The parameter "H" sets the midband gain
TEXT 64 216 Left 2 !.param H=1
TEXT -440 336 Left 2 !.ac dec 101 100 10k
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG782.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG782.asy)
XU2 N003 N002 N001 0 +V ADG782 ;pnba IN)D)S)GND)Vdd
V1 N003 0 PULSE(0 3 25u 1n 1n 20u)
V3 +V 0 5
R1 N002 0 301
V2 N001 0 3
C1 N002 0 36p
.tran 75u
.lib ADG782.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 16 -48 -32
WIRE -144 96 -400 96
WIRE 128 96 48 96
WIRE 256 96 128 96
WIRE -512 128 -512 80
WIRE -400 128 -400 96
WIRE 128 128 128 96
WIRE 256 128 256 96
WIRE -144 160 -288 160
WIRE -512 224 -512 208
WIRE -400 224 -400 208
WIRE 128 240 128 208
WIRE 256 240 256 192
WIRE -288 272 -288 160
WIRE -48 304 -48 272
WIRE -288 416 -288 352
SYMBOL voltage -400 112 R0
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL res 112 112 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage -288 256 R0
WINDOW 3 24 102 Left 2
SYMATTR Value PULSE(0 3 25u 1n 1n 20u)
SYMATTR InstName V1
SYMBOL cap 240 128 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL ADG782 -48 144 R0
SYMATTR InstName U2
SYMBOL voltage -512 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
FLAG 128 240 0
FLAG 256 240 0
FLAG -48 304 0
FLAG -288 416 0
FLAG -400 224 0
FLAG -48 -32 +V
FLAG -512 224 0
FLAG -512 80 +V
TEXT -264 392 Left 2 !.tran 75u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6020.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
V3 DAC_OUT 0 PULSE(0 2.5 20u 170n 170n 1m 2m)
R1 N002 N001 10K
R2 N001 REF 10K
R3 OUT N003 30K
R4 N003 0 10K
C1 OUT N001 10p
V4 REF 0 2.5
XU1 DAC_OUT N001 +V -V OUT LT6020 ;pnba IN+)IN-)V+)V-)OUT
XU2 N003 N002 +V -V N002 LT6020 ;pnba IN+)IN-)V+)V-)OUT
.tran 200u
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6020.asy)
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 928 1032
WIRE -144 304 -240 304
WIRE -32 304 -64 304
WIRE -16 304 -32 304
WIRE 528 304 64 304
WIRE -240 320 -240 304
WIRE -32 384 -32 304
WIRE 64 384 -32 384
WIRE 176 384 128 384
WIRE -512 400 -512 384
WIRE -400 400 -400 384
WIRE -240 416 -240 400
WIRE -512 496 -512 480
WIRE -400 496 -400 480
WIRE -32 512 -32 384
WIRE 48 512 -32 512
WIRE 176 528 176 384
WIRE 176 528 144 528
WIRE 272 528 176 528
WIRE 48 544 -272 544
WIRE -272 560 -272 544
WIRE 528 576 528 304
WIRE 528 576 384 576
WIRE 272 592 272 528
WIRE -272 656 -272 640
WIRE 384 656 384 576
WIRE 416 656 384 656
WIRE 528 672 528 576
WIRE 528 672 512 672
WIRE 272 688 272 672
WIRE 416 688 272 688
WIRE 272 704 272 688
WIRE 272 800 272 784
FLAG -512 496 0
FLAG -400 496 0
FLAG -272 656 0
FLAG -272 544 DAC_OUT
FLAG 272 528 OUT
FLAG 80 480 +V
FLAG -512 384 +V
FLAG -400 384 -V
FLAG 272 800 0
FLAG -240 416 0
FLAG -240 304 REF
FLAG 80 576 -V
FLAG 448 624 +V
FLAG 448 720 -V
SYMBOL voltage -512 384 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -400 384 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -272 544 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 2.5 20u 170n 170n 1m 2m)
SYMBOL res 80 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res -48 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 256 576 R0
SYMATTR InstName R3
SYMATTR Value 30K
SYMBOL res 256 688 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL cap 128 368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage -240 304 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 2.5
SYMBOL LT6020 96 528 R0
SYMATTR InstName U1
SYMBOL LT6020 464 672 R0
SYMATTR InstName U2
TEXT 448 784 Left 2 !.tran 200u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1269.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1269.asy)
V1 IN 0 5
Rload OUT 0 20
R3 N003 N004 1K
D1 N001 OUT MBRS360
C3 N004 0 1
R2 N002 0 1.24K
L1 IN N001 50 Rser=0.02 Rpar=5000
C2 OUT 0 390 Rser=.05
XU1 N003 N002 0 N001 IN LT1269 ;pnba Vc)FB)GND)SW)Vin
R1 OUT N002 10.7K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 15m startup
.lib LT1269.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1480
WIRE 1824 896 1600 896
WIRE 1888 896 1824 896
WIRE 2000 896 1968 896
WIRE 2032 896 2000 896
WIRE 2144 896 2096 896
WIRE 2256 896 2144 896
WIRE 2368 896 2256 896
WIRE 1600 912 1600 896
WIRE 2256 912 2256 896
WIRE 2368 912 2368 896
WIRE 1824 944 1824 896
WIRE 2144 992 2144 896
WIRE 1600 1008 1600 992
WIRE 2256 1008 2256 976
WIRE 2368 1008 2368 992
WIRE 2000 1024 2000 896
WIRE 2000 1024 1952 1024
WIRE 2144 1088 2144 1072
WIRE 2144 1088 1952 1088
WIRE 2144 1104 2144 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2144 1200 2144 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
SYMBOL RES 2352 896 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL POWERPRODUCTS\\LT1269 1824 1088 R0
SYMATTR InstName U1
SYMBOL IND 1872 912 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 50
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL RES 2128 1088 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
SYMBOL polcap 2240 912 R0
SYMATTR InstName C2
SYMATTR Value 390
SYMATTR SpiceLine Rser=.05
SYMBOL schottky 2032 912 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL RES 2128 976 R0
SYMATTR InstName R1
SYMATTR Value 10.7K
SYMBOL VOLTAGE 1600 896 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1K
FLAG 2368 896 OUT
FLAG 2144 1200 0
FLAG 2256 1008 0
FLAG 2368 1008 0
FLAG 2064 1248 0
FLAG 1824 1248 0
FLAG 1600 1008 0
FLAG 1600 896 IN
TEXT 2240 1240 Left 2 !.tran 15m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3130-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3130-1.asy)
C2 N002 N004 22n
C1 N001 N003 22n
XU1 0 N003 N001 IN IN IN Vcc Vcc Vcc Vcc 0 0 N005 OUT N004 N002 LTC3130-1 ;pnba GND)BST1)SW1)PVin)Vin)Run)Vcc)MPPC)VS1)VS2)Mode)EXTVcc)Pgood)Vout)BST2)SW2
Rload OUT 0 100
L1 N001 N002 6.8 Rser=50m
C5 OUT 0 10 Rser=7m
C3 Vcc 0 4.7
R5 OUT N005 1Meg
V1 IN 0 20
.tran 7.5m startup
.lib LTC3130-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 924 680
WIRE 144 -128 -16 -128
WIRE 160 -128 144 -128
WIRE 400 -128 240 -128
WIRE -16 -96 -16 -128
WIRE 400 -96 400 -128
WIRE 144 -80 144 -128
WIRE 240 -80 240 -128
WIRE -16 0 -16 -32
WIRE 48 0 -16 0
WIRE 400 0 400 -32
WIRE 400 0 336 0
WIRE -16 80 -144 80
WIRE 48 80 -16 80
WIRE 480 80 336 80
WIRE 544 80 480 80
WIRE 640 80 544 80
WIRE -144 96 -144 80
WIRE 544 96 544 80
WIRE 640 96 640 80
WIRE -16 160 -16 80
WIRE 48 160 -16 160
WIRE 400 160 336 160
WIRE -144 192 -144 176
WIRE 544 192 544 160
WIRE 640 192 640 176
WIRE 48 240 32 240
WIRE 368 240 336 240
WIRE 400 240 400 160
WIRE 400 240 368 240
WIRE -16 320 -16 160
WIRE 48 320 -16 320
WIRE 368 320 336 320
WIRE 48 400 -16 400
WIRE 368 400 336 400
WIRE 480 400 480 80
WIRE 480 400 448 400
WIRE -16 480 -16 400
WIRE 16 480 -16 480
WIRE 48 480 16 480
WIRE 368 480 336 480
WIRE -16 496 -16 480
WIRE -16 576 -16 560
SYMBOL res 464 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL LTC3130-1 192 224 R0
SYMATTR InstName U1
SYMBOL cap 384 -96 R0
SYMATTR InstName C2
SYMATTR Value 22n
SYMBOL cap 528 96 R0
WINDOW 3 26 53 Left 2
SYMATTR Value 10
SYMATTR SpiceLine Rser=7m
SYMATTR InstName C5
SYMBOL ind 144 -112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMATTR SpiceLine Rser=50m
SYMBOL voltage -144 80 R0
SYMATTR InstName V1
SYMATTR Value 20
SYMBOL res 624 80 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap -32 -96 R0
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL cap -32 496 R0
SYMATTR InstName C3
SYMATTR Value 4.7
FLAG 368 480 0
FLAG -144 192 0
FLAG -16 576 0
FLAG 544 192 0
FLAG 640 192 0
FLAG 640 80 OUT
FLAG -144 80 IN
FLAG 16 480 Vcc
FLAG 32 240 0
FLAG 368 320 0
FLAG 368 240 Vcc
TEXT 128 560 Left 2 !.tran 7.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2d745a7c07eb_measuring_current_ind_load_ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
* Measuring Current in Inductive Load
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP284.asy)
R5 CA-V N004 10
R2 N001 +2.5V 100k
XU1 N003 N001 +5V 0 N002 OP284 ;pnba In+)In-)V+)V-)OUT
V1 +2.5V 0 2.5
R3 N004 N003 10k
R4 N003 N002 100k
V2 5V 0 5
V3 CA-V 0 SINE(2.5 2 5k)
R6 CB-H N002 220
R1 N001 CA-V 10k
LL N004 0 4.7m
.tran 5m
.lib OP284.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 240 224 240
WIRE 224 272 224 240
WIRE -64 288 -112 288
WIRE 32 288 -64 288
WIRE -64 336 -64 288
WIRE 32 384 32 288
WIRE 80 384 32 384
WIRE 224 384 224 352
WIRE 224 384 160 384
WIRE 224 416 224 384
WIRE 256 416 224 416
WIRE 400 432 320 432
WIRE 448 432 400 432
WIRE 576 432 528 432
WIRE 256 448 224 448
WIRE -64 480 -64 416
WIRE 80 480 -64 480
WIRE 224 480 224 448
WIRE 224 480 160 480
WIRE -64 528 -64 480
WIRE 224 576 224 480
WIRE 288 576 224 576
WIRE 400 576 400 432
WIRE 400 576 368 576
WIRE -64 640 -64 608
IOPIN 288 400 In
IOPIN -112 288 In
IOPIN 256 240 In
IOPIN 576 432 In
IOPIN -576 432 In
IOPIN -464 432 In
IOPIN -352 432 In
SYMBOL res 176 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res -80 320 R0
SYMATTR InstName R5
SYMATTR Value 10
SYMBOL res 240 368 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL voltage -464 416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -352 416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(2.5 2 5k)
SYMBOL Opamps\\OP284 288 368 R0
SYMATTR InstName U1
SYMBOL ind -80 512 R0
SYMATTR InstName LL
SYMATTR Value 4.7m
SYMBOL res 544 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 220
SYMBOL res 272 592 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL voltage -576 416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 64 496 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 10k
FLAG 288 464 0
FLAG 288 400 +5V
FLAG -112 288 CA-V
FLAG 256 240 +2.5V
FLAG 576 432 CB-H
FLAG -64 640 0
FLAG -576 512 0
FLAG -464 512 0
FLAG -352 512 0
FLAG -576 432 +2.5V
FLAG -464 432 5V
FLAG -352 432 CA-V
TEXT -144 152 Left 2 ;Measuring Current in Inductive Load
TEXT -592 648 Left 2 !.tran 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\1c9f63d1f46c_StageC_HighPassFirstOrder_LT6004.asc
* Generated by LTspice 26.0.1 for Windows.
* This subcircuit is not simulatable. \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6004.asy)
R1 N001 REF 1.2Meg
C1 N001 IN 390n
XU1 N001 OUT V+ V- OUT LT6003 ;pnba IN+)IN-)VCC)VEE)OUT
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 4112 860
WIRE 528 -64 240 -64
WIRE 320 112 320 0
WIRE 240 128 240 -64
WIRE 288 128 288 112
WIRE 288 128 240 128
WIRE 304 128 288 128
WIRE 528 144 352 144
WIRE 528 144 528 -64
WIRE -160 160 -176 160
WIRE -112 160 -160 160
WIRE 144 160 -48 160
WIRE 288 160 144 160
WIRE 304 160 288 160
WIRE 528 160 528 144
WIRE 592 160 528 160
WIRE 624 160 592 160
WIRE 144 176 144 160
WIRE 288 176 288 160
WIRE 320 272 320 176
WIRE 144 272 144 256
SYMBOL cap -48 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 390n
SYMBOL Opamps\\LT6004 320 144 R0
SYMATTR InstName U1
SYMBOL res 128 160 R0
SYMATTR InstName R1
SYMATTR Value 1.2Meg
FLAG 320 0 V+
FLAG 320 272 V-
FLAG 592 160 OUT
FLAG -160 160 IN
FLAG 144 272 REF
TEXT -176 504 Left 4 ;This subcircuit is not simulatable.  \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6107.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6107.asy)
I1 N001 0 SINE(1 1 1K)
V1 N002 0 20
XU1 N004 0 N003 N001 N002 LT6106 ;pnba OUT)VEE)IN-)IN+)VCC
R3 N002 N003 100
R2 N002 N001 20m
R1 N004 0 1K
.tran 3m
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 -80 -112 -80
WIRE 176 -80 112 -80
WIRE 336 -80 256 -80
WIRE 416 -80 336 -80
WIRE 496 -80 416 -80
WIRE -112 -64 -112 -80
WIRE 336 -64 336 -80
WIRE 496 -64 496 -80
WIRE -112 32 -112 16
WIRE 496 32 496 16
WIRE 112 48 112 -80
WIRE 128 48 112 48
WIRE 336 48 336 16
WIRE 336 48 320 48
WIRE 128 96 112 96
WIRE 416 96 416 -80
WIRE 416 96 320 96
WIRE 400 224 320 224
WIRE 400 240 400 224
WIRE 400 336 400 320
SYMBOL voltage 496 -80 R0
SYMATTR InstName V1
SYMATTR Value 20
SYMBOL res 272 -96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 20m
SYMBOL opamps\\LT6107 224 112 R0
SYMATTR InstName U1
SYMBOL res 320 -80 R0
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL current -112 -64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value SINE(1 1 1K)
SYMBOL res 384 224 R0
SYMATTR InstName R1
SYMATTR Value 1K
FLAG 400 336 0
FLAG 112 96 0
FLAG -112 32 0
FLAG 496 32 0
TEXT 480 264 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\16aec6202adc_Draft11.asc
* Generated by LTspice 26.0.1 for Windows.
C1 b N001 3.3
C2 N001 0 3.3
R a b 220 tol=1 pwr=0.1
VE a 0 10
.ic v(b)=0
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 64 64 64
WIRE 304 64 240 64
WIRE 336 64 304 64
WIRE 64 160 64 64
WIRE 336 160 336 144
WIRE 336 176 336 160
WIRE 336 256 336 240
WIRE 64 336 64 240
WIRE 224 336 224 128
WIRE 224 336 64 336
WIRE 304 336 224 336
WIRE 336 336 336 320
WIRE 336 336 304 336
WIRE 64 352 64 336
SYMBOL cap 320 176 R0
SYMATTR InstName C1
SYMATTR Value 3.3u
SYMBOL cap 320 256 R0
SYMATTR InstName C2
SYMATTR Value 3.3u
SYMBOL voltage 64 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName E
SYMATTR Value 10
SYMBOL res 320 48 R0
SYMATTR InstName R
SYMATTR Value 220
SYMATTR SpiceLine tol=1 pwr=0.1
FLAG 64 352 0
FLAG 240 64 SW
FLAG 304 64 a
FLAG 336 160 b
FLAG 304 336 c
TEXT 280 352 Left 2 !.ic v(b)=0
TEXT 30 384 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8003-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* 1MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8003-3.3.asy)
C2 N001 0 0.001
XU1 0 NC_01 NC_02 MP_03 N002 MP_04 MP_05 MP_06 MP_07 0 N001 IN IN OUT LTM8003-3.3 ;pnba GND)Bias)PG))RT)))))Sync)TR/SS)Run)Vin)Vout
R2 OUT 0 3
R1 N002 0 41.2K
V1 IN 0 24
C1 OUT 0 47
.tran 750u startup
.lib LTM8003-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 -64 -96 -64
WIRE 192 -64 16 -64
WIRE -96 -48 -96 -64
WIRE 192 -32 192 -64
WIRE 16 0 16 -64
WIRE 32 0 16 0
WIRE -96 48 -96 32
WIRE 32 80 16 80
WIRE 416 80 352 80
WIRE 512 80 416 80
WIRE 416 96 416 80
WIRE 512 96 512 80
WIRE -48 160 -80 160
WIRE 32 160 16 160
WIRE 416 192 416 160
WIRE 512 192 512 176
WIRE -64 256 -80 256
WIRE 32 256 16 256
WIRE 192 320 192 304
SYMBOL cap 16 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 0.001
SYMBOL cap 400 96 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMBOL res 32 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 41.2K
SYMBOL res 496 80 R0
SYMATTR InstName R2
SYMATTR Value 3
SYMBOL voltage -96 -64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL LTM8003-3.3 192 144 R0
SYMATTR InstName U1
FLAG -96 48 0
FLAG -80 256 0
FLAG 192 320 0
FLAG 512 192 0
FLAG -96 -64 IN
FLAG 512 80 OUT
FLAG 416 192 0
FLAG 16 80 0
FLAG -80 160 0
TEXT 376 272 Left 2 !.tran 750u startup
TEXT -24 304 Top 2 ;1MHz
* Z:\tmp\asc_dec_bjh7r6w2\105f3366e1bd_LT6016_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N003 N002 +V -V Out LT6016 ;pnba IN+)IN-)VCC)VEE)OUT
Vcom N001 0 50
V1 +V 0 5
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6016.asy)
.lib LT6016.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 64 -48 64
WIRE 192 64 80 64
WIRE 336 64 272 64
WIRE 416 64 336 64
WIRE 528 64 496 64
WIRE -48 80 -48 64
WIRE 80 144 80 64
WIRE 416 160 416 144
WIRE -48 176 -48 160
WIRE 336 176 336 64
WIRE 384 176 336 176
WIRE 528 192 528 64
WIRE 528 192 448 192
WIRE 576 192 528 192
WIRE 384 208 336 208
WIRE 416 240 416 224
WIRE 80 304 80 224
WIRE 336 304 336 208
WIRE 336 304 272 304
WIRE 416 304 336 304
WIRE 576 304 496 304
WIRE -144 320 -144 304
WIRE -48 320 -48 304
WIRE 576 320 576 304
WIRE -144 416 -144 400
WIRE -48 416 -48 400
SYMBOL LT6016 416 192 R0
SYMATTR InstName U1
SYMBOL voltage -48 64 R0
SYMATTR InstName Vcom
SYMATTR Value 50
SYMBOL voltage -144 304 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -144 416 0
FLAG -48 416 0
FLAG -144 304 +V
FLAG 416 240 -V
FLAG -48 176 0
FLAG 576 320 0
FLAG 576 192 Out
FLAG 416 144 +V
FLAG -48 304 -V
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP5304-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP5304-1.asy)
R1 OUT N001 1Meg
C1 OUT 0 10
XU1 IN IN 0 0 OUT N001 0 0 N002 ADP5304-1 ;pnba EN)PVin)Mode)VID)FB)VinOK)Pgnd)Agnd)SW
V1 IN 0 5
Rload OUT 0 80
L1 N002 OUT 2.2 Rser=80m
.tran .6m startup
.lib ADP5304-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 64 64 64
WIRE 160 64 144 64
WIRE 480 64 416 64
WIRE 608 64 560 64
WIRE 64 80 64 64
WIRE 144 144 144 64
WIRE 160 144 144 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 608 144 608 64
WIRE 608 144 560 144
WIRE 688 144 608 144
WIRE 608 160 608 144
WIRE 688 160 688 144
WIRE 64 176 64 160
WIRE 160 224 144 224
WIRE 560 224 560 144
WIRE 560 224 416 224
WIRE 608 256 608 224
WIRE 688 256 688 240
WIRE 160 304 144 304
WIRE 432 304 416 304
WIRE 288 384 288 368
SYMBOL res 672 144 R0
SYMATTR Value 80
SYMATTR InstName Rload
SYMBOL res 576 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=80m
SYMBOL voltage 64 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADP5304-1 288 192 R0
SYMATTR InstName U1
SYMBOL cap 592 160 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 608 256 0
FLAG 432 304 0
FLAG 64 176 0
FLAG 688 144 OUT
FLAG 688 256 0
FLAG 64 64 IN
FLAG 288 384 0
FLAG 144 304 0
FLAG 144 224 0
TEXT 440 384 Left 2 !.tran .6m startup
* Z:\tmp\asc_dec_bjh7r6w2\10b9b75080ef_Bode_Full_Chain_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N004 1k
R5 Out_FS N002 25k
XU2 0 N003 N005 N007 Out_FS level1 Avol=1Meg GBW=800Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R6 0 Out_FS 100k
R3 Out_PreAmp 0 10k
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp1.asy)
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2020 776
WIRE 64 128 -48 128
WIRE 1008 144 896 144
WIRE 1216 144 1088 144
WIRE 1008 240 896 240
WIRE 1216 240 1216 144
WIRE 1216 240 1072 240
WIRE 1104 288 1040 288
WIRE -208 304 -384 304
WIRE -96 304 -128 304
WIRE -48 304 -48 128
WIRE -48 304 -96 304
WIRE 160 304 160 272
WIRE 848 320 816 320
WIRE 896 320 896 240
WIRE 896 320 848 320
WIRE 1040 320 1040 288
WIRE 1104 320 1104 288
WIRE -96 448 -96 304
WIRE 64 448 -96 448
WIRE 1040 448 1040 400
WIRE 272 464 272 128
WIRE 272 464 128 464
WIRE 368 464 272 464
WIRE 464 464 464 352
WIRE 464 464 368 464
WIRE 848 464 848 320
WIRE 1008 464 848 464
WIRE 64 480 -80 480
WIRE 1216 480 1216 240
WIRE 1216 480 1072 480
WIRE 1360 480 1360 368
WIRE 1360 480 1216 480
WIRE 1456 480 1360 480
WIRE 1664 480 1536 480
WIRE 1008 496 864 496
WIRE 368 512 368 464
WIRE 1664 512 1664 480
WIRE -80 560 -80 480
WIRE 864 576 864 496
WIRE 1040 608 1040 512
WIRE 368 624 368 592
SYMBOL res -112 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 1104 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 25k
SYMBOL OpAmps\\UniversalOpAmp1 1040 480 R0
SYMATTR InstName U2
SYMATTR Value2 Avol=1Meg GBW=800Meg Vos=0
SYMBOL res 1552 464 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 100k
SYMBOL res 352 496 R0
SYMATTR InstName R3
SYMATTR Value 10k
FLAG 160 304 0
FLAG 464 352 Out_PreAmp
FLAG 368 624 0
FLAG 1104 320 0
FLAG 864 576 0
FLAG 1360 368 Out_FS
FLAG 1664 512 0