Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3971-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3971-5.asy)
V1 IN 0 24
Rout OUT 0 4.16
C1 OUT 0 22
R6 IN N001 5Meg
C2 N004 N006 .47
R5 N001 0 1Meg
D1 0 N006 DFLS220L
XU1 OUT N004 N006 IN N001 OUT N003 N005 N002 MP_01 0 LT3971-5 ;pnba BD)Boost)SW)Vin)EN)Vout)SS)Rt)PG))GND
C3 N003 0 .001
R1 N005 0 49.9K
L1 N006 OUT 4.7
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LT3971-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE -48 -64 -160 -64
WIRE 400 -64 -48 -64
WIRE -160 -48 -160 -64
WIRE -48 -48 -48 -64
WIRE -160 48 -160 32
WIRE -48 48 -48 32
WIRE 80 48 -48 48
WIRE 400 48 400 -64
WIRE 400 48 368 48
WIRE -48 64 -48 48
WIRE 80 144 64 144
WIRE 592 144 368 144
WIRE -48 160 -48 144
WIRE 0 240 -32 240
WIRE 80 240 64 240
WIRE 400 240 368 240
WIRE 400 256 400 240
WIRE -16 336 -32 336
WIRE 80 336 64 336
WIRE 400 336 400 320
WIRE 400 336 368 336
WIRE 480 336 400 336
WIRE 592 336 592 144
WIRE 592 336 560 336
WIRE 656 336 592 336
WIRE 736 336 656 336
WIRE 736 352 736 336
WIRE 656 368 656 336
WIRE 80 432 64 432
WIRE 592 432 592 336
WIRE 592 432 368 432
WIRE 656 448 656 432
WIRE 736 448 736 432
SYMBOL cap 384 256 R0
WINDOW 3 24 54 Left 2
SYMATTR Value .47
SYMATTR InstName C2
SYMBOL res -64 48 R0
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL ind 464 352 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL schottky 384 400 M180
WINDOW 0 26 68 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value DFLS220L
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage -160 -64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 80 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 49.9K
SYMBOL PowerProducts\\LT3971-5 224 240 R0
SYMATTR InstName U1
SYMBOL res 720 336 R0
SYMATTR InstName Rout
SYMATTR Value 4.16
SYMBOL cap 64 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL cap 640 368 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res -64 -64 R0
SYMATTR InstName R6
SYMATTR Value 5Meg
FLAG 64 432 0
FLAG -32 336 0
FLAG 736 448 0
FLAG 656 448 0
FLAG -160 48 0
FLAG 400 400 0
FLAG -48 160 0
FLAG -32 240 0
FLAG -160 -64 IN
FLAG 736 336 OUT
TEXT 512 72 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1773.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1773.asy)
C1 OUT 0 180 Rser=.1
C3 N004 0 220p Rser=30K
L1 N005 OUT 5
MQ2 N005 N007 0 0 IRF7201
R2 0 N006 80.6K
R1 OUT N006 169K
V1 IN 0 5
Rload OUT 0 2
XU1 N004 N003 IN N006 0 N007 N002 IN N001 N005 LTC1773 ;pnba Ith)Run/SS)FCB)FB)GND)BG)TG)Vin)Sense-)SW
R3 IN N001 .025
C4 N003 0 .001
MQ1 N005 N002 N001 N001 FDC638P
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m startup
.lib LTC1773.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2908 1472
WIRE 1632 896 1504 896
WIRE 1824 896 1632 896
WIRE 2064 896 1824 896
WIRE 1504 912 1504 896
WIRE 2064 912 2064 896
WIRE 1824 944 1824 896
WIRE 1504 1008 1504 992
WIRE 1632 1008 1632 896
WIRE 1664 1008 1632 1008
WIRE 2064 1008 2064 992
WIRE 2064 1008 1984 1008
WIRE 2064 1024 2064 1008
WIRE 2016 1040 2000 1040
WIRE 1584 1072 1568 1072
WIRE 1664 1072 1648 1072
WIRE 2000 1072 2000 1040
WIRE 2000 1072 1984 1072
WIRE 1504 1136 1472 1136
WIRE 1664 1136 1568 1136
WIRE 2064 1136 2064 1120
WIRE 2064 1136 1984 1136
WIRE 2112 1136 2064 1136
WIRE 2240 1136 2192 1136
WIRE 2352 1136 2240 1136
WIRE 2464 1136 2352 1136
WIRE 2064 1152 2064 1136
WIRE 2240 1152 2240 1136
WIRE 2352 1152 2352 1136
WIRE 2464 1152 2464 1136
WIRE 1664 1200 1632 1200
WIRE 2000 1200 1984 1200
WIRE 2000 1232 2000 1200
WIRE 2016 1232 2000 1232
WIRE 2240 1248 2240 1232
WIRE 2240 1248 2160 1248
WIRE 2352 1248 2352 1216
WIRE 2464 1248 2464 1232
WIRE 2064 1264 2064 1248
WIRE 2240 1264 2240 1248
WIRE 1824 1280 1824 1264
WIRE 1632 1312 1632 1200
WIRE 2160 1312 2160 1248
WIRE 2160 1312 1632 1312
WIRE 2240 1360 2240 1344
SYMBOL NMOS 2016 1152 R0
SYMATTR InstName Q2
SYMATTR Value IRF7201
SYMBOL polcap 2336 1152 R0
SYMATTR SpiceLine Rser=.1
SYMATTR InstName C1
SYMATTR Value 180
SYMBOL res 2448 1136 R0
SYMATTR InstName Rload
SYMATTR Value 2
SYMBOL ind 2096 1152 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 5
SYMBOL RES 2224 1136 R0
SYMATTR InstName R1
SYMATTR Value 169K
SYMBOL cap 1568 1120 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 39 56 34 VTop 2
SYMATTR InstName C3
SYMATTR Value 220p
SYMATTR SpiceLine Rser=30K
SYMBOL POWERPRODUCTS\\LTC1773 1824 1104 R0
WINDOW 3 -45 67 Left 2
SYMATTR InstName U1
SYMBOL cap 1648 1056 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value .001
SYMBOL RES 2048 896 R0
SYMATTR InstName R3
SYMATTR Value .025
SYMBOL VOLTAGE 1504 896 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2224 1360 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 80.6K
SYMBOL PMOS 2016 1120 M180
WINDOW 0 60 79 Left 2
WINDOW 3 58 47 Left 2
SYMATTR InstName Q1
SYMATTR Value FDC638P
FLAG 1824 1280 0
FLAG 2240 1360 0
FLAG 2352 1248 0
FLAG 1504 1008 0
FLAG 2464 1248 0
FLAG 2464 1136 OUT
FLAG 2064 1264 0
FLAG 1472 1136 0
FLAG 1568 1072 0
FLAG 1504 896 IN
TEXT 2360 1328 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2504-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2504-5.0.asy)
Rload OUT 0 50
XU1 N001 N002 OUT IN IN 0 OUT NC_01 ADP2504-5.0 ;pnba SW1)SW2)FB)EN)PVin)GND)Vout)Sync
V1 IN 0 3.3
L1 N001 N002 1.5 Rser=80m
C1 OUT 0 10
.tran 400u startup
.lib ADP2504-5.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 48 64 32 64
WIRE 336 64 304 64
WIRE -64 80 -64 64
WIRE 32 144 32 64
WIRE 48 144 32 144
WIRE 336 144 304 144
WIRE -64 176 -64 160
WIRE 320 224 304 224
WIRE 368 224 320 224
WIRE 480 224 368 224
WIRE 368 240 368 224
WIRE 480 240 480 224
WIRE 48 304 32 304
WIRE 320 304 320 224
WIRE 320 304 304 304
WIRE 368 336 368 304
WIRE 480 336 480 320
SYMBOL ADP2504-5.0 176 176 R0
SYMATTR InstName U1
SYMBOL ind 320 48 R0
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=80m
SYMBOL voltage -64 64 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap 352 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 464 224 R0
SYMATTR InstName Rload
SYMATTR Value 50
FLAG 368 336 0
FLAG 32 304 0
FLAG -64 176 0
FLAG 480 336 0
FLAG -64 64 IN
FLAG 480 224 OUT
TEXT 392 384 Left 2 !.tran 400u startup
TEXT 176 0 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\1f33f2d5b74a_Integral.asc
* Generated by LTspice 26.0.1 for Windows.
B2 N001 0 V={V(1)}
R1 N002 N001 1n
B1 2 0 V={I(L1)}
L1 N002 0 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 112 160 112
WIRE -64 128 -80 128
WIRE 0 128 -48 128
WIRE -48 144 -48 128
WIRE 160 144 160 112
WIRE 80 160 80 128
WIRE -48 256 -48 224
WIRE 80 256 80 240
WIRE 160 256 160 224
IOPIN 272 112 Out
IOPIN -80 128 In
SYMBOL bv -48 128 R0
SYMATTR InstName B2
SYMATTR Value V={V(1)}
SYMBOL ind 64 144 R0
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1n
SYMBOL bv 160 128 R0
SYMATTR InstName B1
SYMATTR Value V={I(L1)}
FLAG 160 256 0
FLAG 272 112 2
FLAG -80 128 1
FLAG 80 256 0
FLAG -48 256 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3250-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 N001 1
C2 0 OUT 2.7
V1 IN 0 5
Rload OUT 0 10
XU1 IN 0 IN N001 OUT N002 LTC3250-1.2 ;pnba Vin)GND)_SHND)C-)Vout)C+
.tran 200u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3250-1.2.asy)
.lib LTC3250-1.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 80 144 80
WIRE 272 80 240 80
WIRE 144 160 144 80
WIRE 272 160 272 80
WIRE 32 224 -48 224
WIRE 80 224 32 224
WIRE 432 224 336 224
WIRE 512 224 432 224
WIRE -48 240 -48 224
WIRE 432 240 432 224
WIRE 512 240 512 224
WIRE 432 336 432 304
WIRE 512 336 512 320
WIRE -48 352 -48 320
WIRE 32 352 32 224
WIRE 80 352 32 352
WIRE 352 352 336 352
FLAG 352 352 0
FLAG -48 352 0
FLAG 432 336 0
FLAG 512 336 0
FLAG 512 224 OUT
FLAG -48 224 IN
SYMBOL cap 240 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 416 304 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 2.7
SYMBOL voltage -48 224 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 496 224 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL PowerProducts\\LTC3250-1.2 208 272 R0
SYMATTR InstName U1
TEXT 120 400 Left 2 !.tran 200u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1083.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1083.asy)
R1 OUT N001 121
Rload OUT 0 10
V1 IN 0 PWL(0 0 1 10) Rser=0.1
R2 N001 0 365
XU1 N001 OUT IN LT1083 ;pnba ADJ)OUT)IN
C1 OUT 0 10
.tran 1
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1440 896
WIRE 1856 896 1808 896
WIRE 1952 896 1856 896
WIRE 2064 896 1952 896
WIRE 1856 912 1856 896
WIRE 2064 912 2064 896
WIRE 1440 928 1440 896
WIRE 1952 928 1952 896
WIRE 1952 1008 1952 992
WIRE 2064 1008 2064 992
WIRE 1680 1024 1680 992
WIRE 1856 1024 1856 992
WIRE 1856 1024 1680 1024
WIRE 1440 1040 1440 1008
WIRE 1856 1040 1856 1024
WIRE 1856 1136 1856 1120
SYMBOL RES 1840 896 R0
SYMATTR InstName R1
SYMATTR Value 121
SYMBOL PowerProducts\\LT1083 1680 896 R0
SYMATTR InstName U1
SYMBOL RES 1840 1024 R0
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL VOLTAGE 1440 912 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMATTR SpiceLine Rser=0.1
SYMBOL cap 1936 928 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL RES 2048 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
FLAG 2064 896 OUT
FLAG 1856 1136 0
FLAG 2064 1008 0
FLAG 1440 1040 0
FLAG 1952 1008 0
FLAG 1440 896 IN
TEXT 1992 1088 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\1919033d70a4_current_limiter.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N003 0 PULSE(0 4.75 1 0.01 0.01 2)
V1 N006 0 4.0
D2 N001 N002 1N5817
R2 0 N005 10k
Q1 N005 N004 N003 0 PNP
D1 N003 N002 1N5817
V4 N001 0 PULSE(0 3.8 0.5 0.01 0.01 2)
R3 N005 N002 100k
R1 N004 N002 1
XM1 N006 N005 N004 irlml6402 ;pnba D)G)S
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 2
.lib irlml6402.spi
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1148 680
WIRE -48 48 -384 48
WIRE 32 48 16 48
WIRE -64 112 -256 112
WIRE -32 112 -64 112
WIRE 32 112 32 48
WIRE 128 112 32 112
WIRE 224 112 208 112
WIRE 384 112 224 112
WIRE 224 192 224 112
WIRE 224 192 96 192
WIRE -64 256 -64 112
WIRE 48 256 -64 256
WIRE 192 256 144 256
WIRE -384 288 -384 48
WIRE -256 288 -256 112
WIRE 32 288 32 112
WIRE 192 320 192 256
WIRE 192 320 112 320
WIRE 448 320 192 320
WIRE 112 368 112 320
WIRE 112 368 32 368
WIRE 384 368 384 112
WIRE 432 368 384 368
WIRE 656 368 528 368
WIRE 656 480 656 368
WIRE -384 592 -384 368
WIRE -256 592 -256 368
WIRE -256 592 -384 592
WIRE 176 592 -256 592
WIRE 192 592 192 400
WIRE 192 592 176 592
WIRE 656 592 656 560
WIRE 656 592 192 592
WIRE 176 624 176 592
SYMBOL voltage -384 272 R0
SYMATTR InstName V4
SYMATTR Value PULSE(0 3.8 0.5 0.01 0.01 2)
SYMBOL pmos 528 320 R90
SYMATTR InstName M1
SYMATTR Value irlml6402
SYMATTR Prefix X
SYMBOL pnp 144 192 R90
SYMATTR InstName Q1
SYMBOL schottky -48 64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage 656 464 R0
SYMATTR InstName V1
SYMATTR Value 4.0
SYMBOL res 48 384 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 224 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL schottky -32 128 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 208 416 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage -256 272 R0
SYMATTR InstName V3
SYMATTR Value PULSE(0 4.75 1 0.01 0.01 2)
FLAG 176 624 0
TEXT 760 208 Left 2 !.tran 2
TEXT 448 264 Left 2 !.lib irlml6402.spi
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3466-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3466-1.asy)
Rload OUT 0 533
XU1 OUT N001 IN MP_01 MP_02 MP_03 MP_04 N004 N003 N002 0 LT3466-1 ;pnba Vout)SW)Vin)))))Rt)CTRL)FB)GND
V1 IN 0 3
R2 N004 0 63.4K
L1 IN N001 33
C1 OUT 0 1
R1 N002 0 24.9K
R3 OUT N002 475K
V2 N003 0 2
.tran 1m startup
.lib LT3466-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1280 680
WIRE -16 112 -96 112
WIRE 16 112 -16 112
WIRE 128 112 96 112
WIRE 400 112 288 112
WIRE 480 112 400 112
WIRE 608 112 480 112
WIRE -96 128 -96 112
WIRE 400 128 400 112
WIRE 480 128 480 112
WIRE 608 128 608 112
WIRE 128 160 128 112
WIRE 288 160 288 112
WIRE 400 208 400 192
WIRE -96 224 -96 208
WIRE 608 224 608 208
WIRE -16 240 -16 112
WIRE 64 240 -16 240
WIRE 480 240 480 208
WIRE 480 240 352 240
WIRE 480 256 480 240
WIRE 480 352 480 336
WIRE 64 368 -48 368
WIRE 400 368 352 368
WIRE -48 384 -48 368
WIRE 400 384 400 368
WIRE 208 464 208 448
WIRE -48 480 -48 464
WIRE 400 480 400 464
SYMBOL res 464 240 R0
SYMATTR InstName R1
SYMATTR Value 24.9K
SYMBOL voltage -96 112 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res 592 112 R0
SYMATTR InstName Rload
SYMATTR Value 533
SYMBOL res 384 368 R0
SYMATTR InstName R2
SYMATTR Value 63.4K
SYMBOL PowerProducts\\LT3466-1 208 304 R0
SYMATTR InstName U1
SYMBOL cap 384 128 R0
WINDOW 3 29 52 Left 2
SYMATTR Value 1
SYMATTR InstName C1
SYMBOL voltage -48 368 R0
WINDOW 0 29 23 Left 2
WINDOW 3 30 92 Left 2
SYMATTR InstName V2
SYMATTR Value 2
SYMBOL ind 0 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMBOL res 464 112 R0
SYMATTR InstName R3
SYMATTR Value 475K
FLAG 480 352 0
FLAG 400 480 0
FLAG 208 464 0
FLAG -96 224 0
FLAG -48 480 0
FLAG 400 208 0
FLAG 608 224 0
FLAG 608 112 OUT
FLAG -96 112 IN
TEXT 504 400 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1797.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 -V 0 -5
R1 OUT N003 10K
R2 N003 0 4.99K
XU1 N002 N003 +V -V OUT LT1797 ;pnba In+)In-)V+)V-)OUT
XU2 IN N001 +V -V N002 LT1028 ;pnba In+)In-)V+)V-)OUT
R3 N002 P001 1K
C1 P001 N001 2200p
R4 N001 0 10
V3 IN 0 sine(0 10m 1K)
R5 OUT N001 4.87K tol=1 pwr=0.1
.tran 3m
* Ultra-Low Noise 5V Supply, Rail-to-Rail Output Amplier
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1028.asy)
.lib LT1028.lib
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1797.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -400 -48 -416 -48
WIRE -304 -48 -320 -48
WIRE -128 -48 -304 -48
WIRE 160 -48 -48 -48
WIRE -512 48 -512 32
WIRE -416 48 -416 32
WIRE -304 48 -304 -48
WIRE -288 48 -304 48
WIRE -128 48 -144 48
WIRE -64 48 -80 48
WIRE 32 48 16 48
WIRE 48 48 32 48
WIRE 160 48 160 -48
WIRE 160 48 128 48
WIRE -512 144 -512 128
WIRE -416 144 -416 128
WIRE 96 144 96 128
WIRE -224 160 -224 144
WIRE 32 160 32 48
WIRE 64 160 32 160
WIRE -304 176 -304 48
WIRE -256 176 -304 176
WIRE 160 176 160 48
WIRE 160 176 128 176
WIRE 208 176 160 176
WIRE -128 192 -128 48
WIRE -128 192 -192 192
WIRE 64 192 -128 192
WIRE -256 208 -352 208
WIRE -352 224 -352 208
WIRE 96 224 96 208
WIRE -224 240 -224 224
WIRE -352 320 -352 304
FLAG -416 144 0
FLAG 96 128 +V
FLAG -416 32 +V
FLAG 96 224 -V
FLAG -512 144 0
FLAG -512 32 -V
FLAG -80 48 0
FLAG -224 144 +V
FLAG -224 240 -V
FLAG -416 -48 0
FLAG -352 320 0
FLAG 208 176 OUT
FLAG -352 208 IN
SYMBOL voltage -416 32 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -512 32 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 144 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 32 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.99K
SYMBOL opamps\\LT1797 96 112 R0
SYMATTR InstName U1
SYMBOL opamps\\LT1028 -224 128 R0
SYMATTR InstName U2
SYMBOL res -128 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL cap -224 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2200p
SYMBOL res -304 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL voltage -352 208 R0
SYMATTR InstName V3
SYMATTR Value sine(0  10m 1K)
SYMBOL res -32 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 4.87K
SYMATTR SpiceLine tol=1 pwr=0.1
TEXT 48 288 Left 2 !.tran 3m
TEXT -96 -120 Bottom 2 ;Ultra-Low Noise 5V Supply, Rail-to-Rail Output Amplier
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3519-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3519-2.asy)
R5 N006 0 29.4K
R1 N002 N006 1Meg
D1 N004 0 LXHL-BW02 N=10
C1 N002 0 4.7
R4 N002 N004 2.49
L1 IN N001 17
R2 IN N003 1Meg
V1 IN 0 12.4
R3 N003 0 243K
XU1 0 MP_01 N005 N003 IN N001 N001 MP_02 MP_03 N002 N002 N004 N006 N005 N005 LT3519 X=380n ;pnba GND))PWM)_SHDN/UVLO)Vin)SW)Anode)))Cathode)ISP)ISN)FB)CTRL)Vref
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 750u startup
.lib LT3519.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1364 680
WIRE -16 0 -128 0
WIRE 32 0 -16 0
WIRE 144 0 112 0
WIRE 256 0 144 0
WIRE 480 0 368 0
WIRE 624 0 480 0
WIRE 704 0 624 0
WIRE -128 16 -128 0
WIRE 704 16 704 0
WIRE 144 48 144 0
WIRE 256 48 256 0
WIRE 368 48 368 0
WIRE 704 96 704 80
WIRE -128 112 -128 96
WIRE -16 112 -16 0
WIRE 80 112 -16 112
WIRE 624 112 624 0
WIRE 624 112 432 112
WIRE -16 128 -16 112
WIRE 624 128 624 112
WIRE -16 224 -16 208
WIRE 80 224 -16 224
WIRE 624 224 624 208
WIRE 624 224 432 224
WIRE -16 240 -16 224
WIRE 480 240 480 0
WIRE 624 304 624 224
WIRE -16 336 -16 320
WIRE 80 336 64 336
WIRE 480 336 480 320
WIRE 480 336 432 336
WIRE 480 352 480 336
WIRE 624 432 624 368
WIRE 64 448 64 336
WIRE 80 448 64 448
WIRE 448 448 432 448
WIRE 480 448 480 432
WIRE 256 512 256 496
WIRE 64 544 64 448
WIRE 448 544 448 448
WIRE 448 544 64 544
SYMBOL LED 608 304 R0
WINDOW 123 24 100 Left 2
SYMATTR Value2 N=10
SYMATTR InstName D1
SYMATTR Value LXHL-BW02
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL PowerProducts\\LT3519-2 256 272 R0
SYMATTR InstName U1
SYMBOL cap 688 16 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL res -32 224 R0
SYMATTR InstName R3
SYMATTR Value 243K
SYMBOL res 464 336 R0
SYMATTR InstName R5
SYMATTR Value 29.4K
SYMBOL voltage -128 0 R0
SYMATTR InstName V1
SYMATTR Value 12.4
SYMBOL res -32 112 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL ind 16 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 17
SYMBOL res 608 112 R0
SYMATTR InstName R4
SYMATTR Value 2.49
SYMBOL res 464 224 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
FLAG 256 512 0
FLAG -128 112 0
FLAG -16 336 0
FLAG 624 432 0
FLAG 480 448 0
FLAG 704 96 0
FLAG -128 0 IN
TEXT 576 496 Left 2 !.tran 750u startup
* Z:\tmp\asc_dec_bjh7r6w2\00a2df789545_LTC1060_Mode1_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R4 N001 LP 10g
R2 N001 HP 5k
XX2 NC_01 NC_02 NC_03 N001 NC_04 NC_05 NC_06 NC_07 NC_08 NC_09 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 LTC1060 fclka=1k fclkb=1k divider=50 ;pnba LPA)BPA)HPA/NA)INV A)SA)SA/B)VA+)VD+)VD-)VA-)AGND)SB)INV B)HPB/NB)BPB)LPB
V1 IN 0 PWL(0 0.01 50m 5)
* Library below included based on ModelFile attribute of instance XX2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\FilterProducts\LTC1060.asy)
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 -208 -96 -208
WIRE 496 -208 400 -208
WIRE -96 -96 -96 -208
WIRE 128 -96 -96 -96
WIRE 384 -96 208 -96
WIRE -96 -16 -96 -96
WIRE -32 -16 -96 -16
WIRE 128 -16 48 -16
WIRE 128 16 128 -16
WIRE 384 16 384 -96
WIRE 496 16 496 -208
WIRE 128 48 128 16
WIRE 240 48 240 16
WIRE -592 96 -640 96
WIRE -448 96 -592 96
WIRE -240 128 -304 128
WIRE -96 128 -96 -16
WIRE -96 128 -160 128
WIRE -32 128 -96 128
WIRE -640 176 -640 96
WIRE -32 240 -96 240
WIRE -640 288 -640 256
WIRE 128 368 128 320
WIRE 128 368 -96 368
WIRE 240 400 240 320
SYMBOL res 304 -192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R4
SYMATTR Value 10g
SYMBOL res -48 0 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R2
SYMATTR Value 5k
SYMBOL LTC1060 128 192 R0
SYMATTR InstName X2
SYMBOL voltage -640 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0.01 50m 5)
FLAG 496 -208 LP
FLAG 384 -96 S1
FLAG -592 96 IN
FLAG -640 288 0
FLAG 240 16 0
FLAG 128 16 HP
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3526B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3526B.asy)
V1 N001 0 2
R2 N003 0 1Meg
R1 OUT N003 1.78Meg
C1 OUT 0 4.7 Rser=1m
L1 N001 N002 4.7 Rpar=5K
XU1 N002 0 N001 N001 N003 OUT LTC3526B ;pnba SW)GND)Vin)_SHDN)FB)Vout
Rload OUT 0 250
.tran 350u startup
.lib LTC3526B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 80 -144 80
WIRE 0 80 -48 80
WIRE 128 80 80 80
WIRE -144 96 -144 80
WIRE 128 128 128 80
WIRE -144 192 -144 176
WIRE -48 192 -48 80
WIRE -16 192 -48 192
WIRE 320 192 272 192
WIRE 464 192 320 192
WIRE 576 192 464 192
WIRE 320 208 320 192
WIRE 464 208 464 192
WIRE 576 208 576 192
WIRE 464 304 464 272
WIRE 576 304 576 288
WIRE -48 320 -48 192
WIRE -16 320 -48 320
WIRE 320 320 320 288
WIRE 320 320 272 320
WIRE 320 336 320 320
WIRE 128 416 128 384
WIRE 320 432 320 416
SYMBOL cap 448 208 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1m
SYMBOL res 304 192 R0
SYMATTR InstName R1
SYMATTR Value 1.78Meg
SYMBOL PowerProducts\\LTC3526B 128 256 R0
SYMATTR InstName U1
SYMBOL res 304 320 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL voltage -144 80 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL ind -16 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=5K
SYMBOL res 560 192 R0
SYMATTR InstName Rload
SYMATTR Value 250
FLAG -144 192 0
FLAG 128 416 0
FLAG 320 432 0
FLAG 464 304 0
FLAG 576 304 0
FLAG 576 192 OUT
TEXT 432 376 Left 2 !.tran 350u startup