Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1754-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1754-5.asy)
V1 IN 0 3.3
XU1 OUT 0 IN N002 IN N001 LTC1754-5 ;pnba Vout)GND)_SHDN)C-)Vin)C+
C1 N001 N002 1
C2 OUT 0 10
Rload OUT 0 100
.tran 1m startup
.lib LTC1754-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3504 2040
WIRE 3296 1696 2960 1696
WIRE 3408 1696 3296 1696
WIRE 3408 1712 3408 1696
WIRE 2896 1776 2784 1776
WIRE 3008 1776 2896 1776
WIRE 3328 1776 3264 1776
WIRE 2784 1792 2784 1776
WIRE 2896 1792 2896 1776
WIRE 3328 1808 3328 1776
WIRE 3408 1808 3408 1792
WIRE 3008 1840 2992 1840
WIRE 3296 1840 3296 1696
WIRE 3296 1840 3264 1840
WIRE 2784 1888 2784 1872
WIRE 2896 1888 2896 1856
WIRE 2960 1904 2960 1696
WIRE 3008 1904 2960 1904
WIRE 3328 1904 3328 1872
WIRE 3328 1904 3264 1904
SYMBOL cap 3312 1808 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL POWERPRODUCTS\\LTC1754-5 3136 1840 R0
SYMATTR InstName U1
SYMBOL RES 2768 1776 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL VOLTAGE 3408 1696 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap 2880 1792 R0
SYMATTR InstName C2
SYMATTR Value 10
FLAG 2992 1840 0
FLAG 3408 1808 0
FLAG 2896 1888 0
FLAG 2784 1888 0
FLAG 2784 1776 OUT
FLAG 3408 1696 IN
TEXT 3312 1944 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX44248.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX44248.asy)
CL OUT 0 15p
XU1 IN OUT Vcc Vee OUT MAX44248 ;pnba In+)In-)V+)V-)OUT
Vcc Vcc 0 15
RL OUT 0 5k
V1 IN 0 SINE(0 50m 10k)
Vee 0 Vee 15
.tran 100u
.lib MAX44248.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 144 288 144 272
WIRE 432 352 432 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 144 400 144 368
WIRE 144 400 112 400
WIRE 400 400 304 400
WIRE 112 416 112 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 144 448 144 400
WIRE 432 448 432 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 144 544 144 528
WIRE 304 592 304 576
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 5k
SYMBOL MAX44248 432 320 R0
SYMATTR InstName U1
SYMBOL voltage 144 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 15
SYMBOL voltage 144 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 15
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 10k)
FLAG 720 384 OUT
FLAG 144 272 Vcc
FLAG 144 544 Vee
FLAG 432 320 Vcc
FLAG 432 448 Vee
FLAG 112 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
TEXT 96 632 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1762-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1762-5.asy)
XU1 OUT OUT N001 0 IN MP_01 MP_02 IN LT1762-5 ;pnba OUT)SENSE)BYP)GND)_SHDN)))IN
Rload OUT 0 500
C2 OUT N001 .01
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 10
.tran 1
.lib LT1762.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 32 304 32
WIRE 352 32 320 32
WIRE 432 32 352 32
WIRE 528 32 432 32
WIRE 0 48 -208 48
WIRE 16 48 0 48
WIRE 432 48 432 32
WIRE 528 48 528 32
WIRE -208 64 -208 48
WIRE 352 64 352 32
WIRE 320 96 320 32
WIRE 320 96 304 96
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 432 144 432 112
WIRE 528 144 528 128
WIRE -208 160 -208 144
WIRE 352 160 352 128
WIRE 352 160 304 160
WIRE 160 240 160 208
SYMBOL cap 416 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 336 64 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL PowerProducts\\LT1762-5 160 96 R0
SYMATTR InstName U1
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 500
FLAG -208 160 0
FLAG 432 144 0
FLAG 528 144 0
FLAG 160 240 0
FLAG 528 32 OUT
FLAG -208 48 IN
TEXT 344 240 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\2d15cbb81f77_sim.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
R1 N003 0 10k
R3 Vref 0 10k
XU2 Vref N003 28V 0 Vout LT1001 ;pnba In+)In-)V+)V-)OUT
V3 Vin N001 PULSE(0 5 1ms 1ns 0 10ms 100ms)
D3 Vin N002 BAT54
V5 0 n28V 28
D1 Vref Vout BAT54
V2 N001 0 SINE(0 5 1k 1ms 0 0)
V4 NC_01 NC_02 PULSE(0 5 1ms 1ns 0 10ms 100ms)
D2 N002 N003 BAT54
V1 28V 0 28
R2 28V Vref 270k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 5ms 0 0.1u startup uic
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -32 -448 -128 -448
WIRE -128 -400 -128 -448
WIRE -544 -256 -560 -256
WIRE -528 -256 -544 -256
WIRE -368 -256 -384 -256
WIRE -352 -256 -368 -256
WIRE -368 -224 -368 -256
WIRE -128 -208 -128 -320
WIRE -544 -192 -544 -256
WIRE -304 -144 -368 -144
WIRE -544 -80 -544 -112
WIRE -544 -80 -672 -80
WIRE -544 -64 -544 -80
WIRE -128 -64 -128 -128
WIRE -368 -32 -368 -64
WIRE 128 48 48 48
WIRE 320 48 192 48
WIRE -544 64 -544 16
WIRE 48 112 48 48
WIRE 48 112 -80 112
WIRE 48 176 48 112
WIRE 128 176 48 176
WIRE 320 192 320 48
WIRE 320 192 192 192
WIRE 400 192 320 192
WIRE -112 208 -192 208
WIRE -16 208 -48 208
WIRE 96 208 48 208
WIRE 128 208 96 208
WIRE 96 256 96 208
IOPIN -80 112 In
IOPIN -192 208 In
IOPIN 400 192 Out
IOPIN -32 -448 Out
IOPIN -304 -144 Out
RECTANGLE Normal 848 -208 384 -416 2
SYMBOL voltage -128 -416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 1ms 1ns 0 10ms 100ms)
SYMBOL res 80 240 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -128 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 5 1k 1ms 0 0)
SYMBOL diode -112 224 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D3
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage -544 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 28
SYMBOL OpAmps\\OP07 160 256 M180
SYMATTR InstName U2
SYMBOL res -384 -240 R0
SYMATTR InstName R2
SYMATTR Value 270k
SYMBOL diode 128 64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage -688 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 5 1ms 1ns 0 10ms 100ms)
SYMBOL diode -16 224 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res -384 -160 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL voltage -544 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 28
FLAG 160 160 0
FLAG -672 -80 0
FLAG -544 -256 28V
FLAG 160 224 28V
FLAG 96 336 0
FLAG -368 -32 0
FLAG -368 -256 28V
FLAG -80 112 Vref
FLAG -192 208 Vin
FLAG 400 192 Vout
FLAG -128 -64 0
FLAG -32 -448 Vin
FLAG -304 -144 Vref
FLAG -544 64 n28V
TEXT 400 -392 Left 2 !.tran 0 5ms 0 0.1u startup uic
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1617-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1617-1.asy)
Rload OUT 0 2K
V1 IN 0 3.3
L2 IN N001 22 Rser=0.6
D1 N002 0 MBR0530L
XU1 N001 0 N003 IN IN LT1617-1 ;pnba SW)GND)NFB)_SHDN)Vin
C2 0 OUT 4.7 Rser=0.02
R2 OUT N003 150K
C3 N001 N002 1
L1 OUT N002 22 Rser=0.6
K1 L1 L2 1
R1 N003 0 24.9K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
.lib LT1617-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1544 896
WIRE 400 480 304 480
WIRE 512 480 400 480
WIRE 560 480 512 480
WIRE 672 480 640 480
WIRE 704 480 672 480
WIRE 816 480 768 480
WIRE 880 480 816 480
WIRE 1008 480 960 480
WIRE 1120 480 1008 480
WIRE 1216 480 1120 480
WIRE 304 496 304 480
WIRE 816 496 816 480
WIRE 1120 496 1120 480
WIRE 1216 496 1216 480
WIRE 1008 544 1008 480
WIRE 512 560 512 480
WIRE 672 560 672 480
WIRE 816 576 816 560
WIRE 304 592 304 576
WIRE 1120 592 1120 560
WIRE 1216 592 1216 576
WIRE 400 656 400 480
WIRE 432 656 400 656
WIRE 1008 656 1008 624
WIRE 1008 656 752 656
WIRE 1008 672 1008 656
WIRE 592 768 592 752
WIRE 1008 768 1008 752
SYMBOL ind2 544 496 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 4 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 22
SYMATTR SpiceLine Rser=0.6
SYMBOL SCHOTTKY 800 496 R0
SYMATTR InstName D1
SYMATTR Value MBR0530L
SYMBOL ind2 976 496 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 4 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 22
SYMATTR SpiceLine Rser=0.6
SYMBOL RES 992 656 R0
SYMATTR InstName R1
SYMATTR Value 24.9K
SYMBOL polcap 704 464 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL RES 992 528 R0
SYMATTR InstName R2
SYMATTR Value 150K
SYMBOL POLCAP 1104 560 M180
WINDOW 0 24 57 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=0.02
SYMBOL RES 1200 480 R0
SYMATTR InstName Rload
SYMATTR Value 2K
SYMBOL PowerProducts\\LT1617-1 592 656 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 304 480 R0
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG 304 592 0
FLAG 592 768 0
FLAG 1216 592 0
FLAG 1120 592 0
FLAG 1008 768 0
FLAG 816 576 0
FLAG 1216 480 OUT
FLAG 304 480 IN
TEXT 768 768 Left 2 !.tran 5m startup
TEXT 744 416 Center 2 !K1 L1 L2 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3563.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3563.asy)
XU1 OUT IN 0 N001 0 IN LTC3563 ;pnba Vout)Vin)GND)SW)Vsel)Run
L1 N001 OUT 2.2
Rload OUT 0 2.56
V1 IN 0 3.6
C1 OUT 0 10
.tran 2m startup
.lib LTC3563.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 16 -48 16
WIRE 224 16 64 16
WIRE -48 32 -48 16
WIRE 224 32 224 16
WIRE 64 96 64 16
WIRE 80 96 64 96
WIRE 384 96 368 96
WIRE 480 96 464 96
WIRE 528 96 480 96
WIRE 608 96 528 96
WIRE 528 112 528 96
WIRE 608 112 608 96
WIRE -48 128 -48 112
WIRE 528 208 528 176
WIRE 608 208 608 192
WIRE 80 256 64 256
WIRE 480 256 480 96
WIRE 480 256 368 256
WIRE 224 336 224 320
SYMBOL PowerProducts\\LTC3563 224 176 R0
SYMATTR InstName U1
SYMBOL voltage -48 16 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL cap 512 112 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 592 96 R0
SYMATTR InstName Rload
SYMATTR Value 2.56
SYMBOL ind 368 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
FLAG -48 128 0
FLAG 224 336 0
FLAG 608 208 0
FLAG 528 208 0
FLAG 608 96 OUT
FLAG -48 16 IN
FLAG 64 256 0
TEXT 424 312 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0cc45937612b_Fig13_28.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Vout Vin
M3 Vout N001 0 0 N_50n l=50n w=500n m=10
VDD VDD 0 1
M1 N001 Vin 0 0 N_50n l=50n w=500n
Cload Vout 0 50f
M4 Vout N001 VDD VDD P_50n l=50n w=1u m=10
M2 N001 Vin VDD VDD P_50n l=50n w=1u
V1 Vin 0 PULSE(0 1 500p 1p 1p 500p 6n)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1.6n
.include cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3172 680
WIRE 192 -368 192 -384
WIRE 192 -352 192 -368
WIRE 448 -304 448 -352
WIRE 704 -304 704 -352
WIRE 400 -288 368 -288
WIRE 656 -288 624 -288
WIRE 192 -240 192 -272
WIRE 704 -192 704 -208
WIRE 896 -192 704 -192
WIRE 960 -192 896 -192
WIRE 272 -176 192 -176
WIRE 368 -176 368 -288
WIRE 368 -176 272 -176
WIRE 448 -176 448 -208
WIRE 624 -176 624 -288
WIRE 624 -176 448 -176
WIRE 704 -176 704 -192
WIRE 192 -160 192 -176
WIRE 368 -96 368 -176
WIRE 400 -96 368 -96
WIRE 624 -96 624 -176
WIRE 656 -96 624 -96
WIRE 960 -48 960 -128
WIRE 192 -32 192 -80
WIRE 448 -32 448 -80
WIRE 704 -32 704 -80
SYMBOL nmos4 656 -176 R0
WINDOW 0 104 24 Right 2
WINDOW 3 179 41 Right 2
WINDOW 123 213 74 Right 2
SYMATTR InstName M3
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n m=10
SYMBOL voltage 192 -176 R0
WINDOW 3 -102 180 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 1 500p 1p 1p 500p 6n)
SYMATTR InstName V1
SYMBOL voltage 192 -368 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL pmos4 400 -208 M180
WINDOW 0 88 9 Right 2
WINDOW 3 168 20 Right 2
WINDOW 123 206 76 Right 2
SYMATTR InstName M2
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL cap 944 -192 R0
SYMATTR InstName Cload
SYMATTR Value 50f
SYMBOL pmos4 656 -208 M180
WINDOW 0 88 9 Right 2
WINDOW 3 168 20 Right 2
WINDOW 123 206 76 Right 2
SYMATTR InstName M4
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u m=10
SYMBOL nmos4 400 -176 R0
WINDOW 0 104 24 Right 2
WINDOW 3 179 41 Right 2
WINDOW 123 213 74 Right 2
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
FLAG 448 -128 0
FLAG 192 -240 0
FLAG 192 -368 VDD
FLAG 448 -256 VDD
FLAG 448 -32 0
FLAG 448 -352 VDD
FLAG 704 -128 0
FLAG 704 -256 VDD
FLAG 704 -32 0
FLAG 704 -352 VDD
FLAG 960 -48 0
FLAG 192 -32 0
FLAG 896 -192 Vout
FLAG 272 -176 Vin
TEXT 88 48 Left 2 !.tran 1.6n
TEXT 88 88 Left 2 !.include cmosedu_models.txt
TEXT 264 -392 Left 2 ;Plot Vout Vin
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1504A-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1504A-3.3.asy)
C2 N006 0 .01
V1 IN 0 5
R1 IN N001 47K
XU1 N001 IN N003 0 OUT N002 N006 N005 LTC1504A top=20.4K bot=12.6K ;pnba Imax)Vcc)SW)GND)Sense)_SHND)SS)COMP
Rload OUT 0 50
C1 OUT 0 100 Rser=.1
R2 N005 N004 5K
C3 N004 0 5000p
L1 N003 OUT 50
.tran 5m startup
.lib LTC1504A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2224 1840
WIRE 1328 1280 1136 1280
WIRE 1392 1280 1328 1280
WIRE 1520 1280 1472 1280
WIRE 1136 1296 1136 1280
WIRE 1328 1328 1328 1280
WIRE 1520 1328 1520 1280
WIRE 1136 1392 1136 1376
WIRE 1264 1424 1248 1424
WIRE 1616 1424 1584 1424
WIRE 1728 1424 1696 1424
WIRE 1808 1424 1728 1424
WIRE 1808 1440 1808 1424
WIRE 1168 1520 1136 1520
WIRE 1264 1520 1248 1520
WIRE 1728 1520 1728 1424
WIRE 1728 1520 1584 1520
WIRE 1728 1536 1728 1520
WIRE 1808 1536 1808 1520
WIRE 1136 1552 1136 1520
WIRE 1728 1616 1728 1600
WIRE 1136 1632 1136 1616
WIRE 1312 1632 1312 1616
WIRE 1536 1632 1536 1616
WIRE 1312 1712 1312 1696
SYMBOL res 1376 1296 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 47K
SYMBOL cap 1120 1552 R0
SYMATTR InstName C3
SYMATTR Value 5000p
SYMBOL VOLTAGE 1136 1280 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 1296 1632 R0
WINDOW 3 24 57 Left 2
SYMATTR Value .01
SYMATTR InstName C2
SYMBOL ind 1600 1440 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 50
SYMBOL polcap 1712 1536 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=.1
SYMBOL PowerProducts\\LTC1504A-3.3 1424 1472 R0
SYMATTR InstName U1
SYMBOL res 1792 1424 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL res 1264 1504 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
FLAG 1136 1392 0
FLAG 1536 1632 0
FLAG 1312 1712 0
FLAG 1728 1616 0
FLAG 1136 1632 0
FLAG 1808 1536 0
FLAG 1808 1424 OUT
FLAG 1136 1280 IN
TEXT 1560 1696 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\177d5da9cb8f_Power_arbitration_proposal.asc
* Generated by LTspice 26.0.1 for Windows.
D3 N002 N003 D
V2 N001 0 5
V1 N004 0 5
D1 N001 N002 D
M1 N003 N002 N005 N005 PMOS
R1 N002 0 10000
D2 N004 N005 D
R2 N003 0 50
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 144 16 144
WIRE 192 144 176 144
WIRE 304 144 192 144
WIRE 336 144 304 144
WIRE 448 144 400 144
WIRE 192 208 192 144
WIRE 16 240 16 144
WIRE 192 336 192 288
WIRE 16 368 16 320
WIRE 304 432 304 144
WIRE 128 480 16 480
WIRE 288 480 192 480
WIRE 448 480 448 144
WIRE 448 480 384 480
WIRE 784 480 448 480
WIRE 16 512 16 480
WIRE 784 608 784 560
WIRE 16 624 16 592
SYMBOL res 768 464 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL voltage 16 496 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL schottky 336 160 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D3
SYMBOL res 176 192 R0
SYMATTR InstName R1
SYMATTR Value 10000
SYMBOL schottky 128 496 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL voltage 16 224 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL pmos 384 432 R90
SYMATTR InstName M1
SYMBOL schottky 112 160 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
FLAG 784 608 0
FLAG 192 336 0
FLAG 16 368 0
FLAG 16 624 0
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5683R.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5683R.asy)
Vdac1 NC_02 0 1.25
I1 0 0 1m AC 1
XU2 vDAC Vdd 0 vOUT AD5683R Gain=2 ;pnba Vdac)Vdd)GND)Vout
CLOAD NC_01 0 10n
V1 Vdd 0 5
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
.tran 200u
.lib AD5683R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 464 112 192 112
WIRE -800 144 -800 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 1m
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
SYMBOL AD5683R -208 112 R0
SYMATTR InstName U2
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
* Z:\home\khalils\Downloads\files\data\raw_asc\a71b73779191_volt.asc
* Generated by LTspice 26.0.1 for Windows.
* 0-500V
V3 P001 0 3.3
V1 N002 0 SINE(300 200 500)
R1 N003 N002 200k
R4 N004 N001 470
V2 NC_01 0 0
R2 N001 N003 200k
R5 N004 0 2.4k
D1 N001 P001 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 5ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 892 680
WIRE 736 224 432 224
WIRE 112 288 80 288
WIRE 224 288 192 288
WIRE 432 288 432 224
WIRE 432 288 304 288
WIRE 448 288 432 288
WIRE 560 288 528 288
WIRE 336 368 80 368
WIRE 560 368 336 368
WIRE 736 368 560 368
WIRE 832 368 736 368
SYMBOL res 320 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200k
SYMBOL voltage 832 272 R0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage 736 272 R0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL res 544 272 R0
SYMATTR InstName R5
SYMATTR Value 2.4k
SYMBOL res 208 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200k
SYMBOL diode 720 224 R0
SYMATTR InstName D1
SYMBOL res 544 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 470
SYMBOL voltage 80 272 R0
SYMATTR InstName V1
SYMATTR Value SINE(300 200 500)
FLAG 336 368 0
TEXT 680 152 Left 2 !.tran 0 5ms
TEXT 520 152 Left 2 ;0-500V
* Z:\home\khalils\Downloads\files\data\raw_asc\22237dede070_Simulacion_SPICE_Montecarlo_Completo.asc
* Generated by LTspice 26.0.1 for Windows.
R1 VL+ Vcc {mc({R1},tol_R)}
C1 VL+ N001 {mc({C},tol_C)}
R2 N001 0 {mc({R2},tol_R)}
R3 VL- 0 {mc({R3},tol_R)}
L1 VL+ VL- {mc({L},tol_L)}
V1 Vcc 0 PULSE(0 10 10m 1n 1n 200m 400m 10)
* Circuit
* Source / Switch
* Parameters
.param R1 = 50
.param R2 = 7
.param R3 = 6
.param C = 300u
.param L = 450m
* Simulation setup
.param tol_R = 0.05
.param tol_C = 0.1
.param tol_L = 0
.step param run 1 50 1
.tran 0 400m 0 1u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -368 -176 -560 -176
WIRE -128 -176 -288 -176
WIRE 144 -176 -128 -176
WIRE -128 -80 -128 -176
WIRE 144 -80 144 -176
WIRE -560 -16 -560 -176
WIRE 144 48 144 0
WIRE -128 112 -128 -16
WIRE 144 112 144 48
WIRE -560 272 -560 64
WIRE -128 272 -128 192
WIRE -128 272 -560 272
WIRE 144 272 144 192
WIRE 144 272 -128 272
WIRE -128 304 -128 272
FLAG -128 304 0
FLAG -560 -176 Vcc
FLAG 144 -176 VL+
FLAG 144 48 VL-
SYMBOL res -272 -192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 37 72 VTop 2
SYMATTR InstName R1
SYMATTR Value {mc({R1},tol_R)}
SYMBOL cap -144 -80 R0
WINDOW 3 -178 55 Left 2
SYMATTR Value {mc({C},tol_C)}
SYMATTR InstName C1
SYMBOL res -144 96 R0
WINDOW 3 -196 98 Left 2
SYMATTR Value {mc({R2},tol_R)}
SYMATTR InstName R2
SYMBOL res 128 96 R0
WINDOW 3 -195 100 Left 2
SYMATTR Value {mc({R3},tol_R)}
SYMATTR InstName R3
SYMBOL ind 128 -96 R0
WINDOW 3 -182 99 Left 2
SYMATTR Value {mc({L},tol_L)}
SYMATTR InstName L1
SYMBOL voltage -560 -32 R0
WINDOW 3 -440 106 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 10 10m 1n 1n 200m 400m 10)
SYMATTR InstName V1
TEXT -400 -264 Left 3 ;Circuit
TEXT -944 -264 Left 3 ;Source / Switch
TEXT 264 -264 Left 3 ;Parameters
TEXT 312 -208 Left 2 !.param R1 = 50
TEXT 312 -176 Left 2 !.param R2 = 7
TEXT 312 -144 Left 2 !.param R3 = 6
TEXT 312 -48 Left 2 !.param C = 300u
TEXT 312 48 Left 2 !.param L = 450m
TEXT 256 168 Left 3 ;Simulation setup
TEXT 312 -112 Left 2 !.param tol_R = 0.05
TEXT 312 -16 Left 2 !.param tol_C = 0.1
TEXT 312 80 Left 2 !.param tol_L = 0
TEXT 320 224 Left 2 !.step param run 1 50 1
TEXT 328 248 Left 2 !.tran 0 400m 0 1u
RECTANGLE Normal -496 -288 -1024 336 2
RECTANGLE Normal 208 -288 -480 336 2
RECTANGLE Normal 608 144 240 304 2
RECTANGLE Normal 608 -288 240 112 2
* Z:\tmp\asc_dec_bjh7r6w2\0fada9b07c09_6994-1_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 PULSE(3.3 0 0.25m 1n 1n 0.5m 25m 3)
R1 N002 0 121K
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE -224 96 -240 96
WIRE 96 96 -144 96
WIRE 96 176 64 176
WIRE 0 256 -16 256
WIRE 96 256 80 256
SYMBOL voltage -128 96 R90
WINDOW 123 74 56 VTop 0
WINDOW 39 53 56 VTop 0
WINDOW 3 32 56 VTop 0
WINDOW 0 -32 56 VBottom 0
SYMATTR Value PULSE(3.3 0 0.25m 1n 1n 0.5m 25m 3)
SYMATTR InstName V2
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 121K
FLAG -240 96 0
FLAG -16 256 0
FLAG 64 176 0