Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17613C.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17613C.asy)
R7 N004 N006 20K
C2 OUT 0 15
XU1 IN N007 0 NC_01 N002 N003 N006 OUT N005 MAX17613C ;pnba IN)SETI)GND)CLMODE)EN)_FWD)_REV)OUT)TSTART
C1 N005 0 0.1
V4 N002 0 2
V2 N004 0 5
V3 N001 0 PULSE(0 1 70m 1m 1m 100m)
R8 N007 0 1.5K
R6 N004 N003 20K
S1 0 OUT N001 0 SHORT
V1 IN 0 48
.model SHORT SW(Ron=2 Roff=100K Vt=.5 Vh=-.4)
.tran 1.25 startup
.lib MAX17613C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1800 680
WIRE -16 -352 -256 -352
WIRE 400 -352 272 -352
WIRE 512 -352 400 -352
WIRE 672 -352 560 -352
WIRE -256 -336 -256 -352
WIRE 400 -336 400 -352
WIRE 512 -336 512 -352
WIRE 672 -336 672 -352
WIRE 560 -320 560 -352
WIRE -256 -240 -256 -256
WIRE 400 -240 400 -272
WIRE 512 -240 512 -256
WIRE 672 -240 672 -256
WIRE -16 -160 -256 -160
WIRE 384 -160 272 -160
WIRE 496 -160 464 -160
WIRE -256 -144 -256 -160
WIRE 496 -112 496 -160
WIRE 576 -112 496 -112
WIRE 576 -80 576 -112
WIRE -16 -64 -80 -64
WIRE 384 -64 272 -64
WIRE 496 -64 496 -112
WIRE 496 -64 464 -64
WIRE -256 -48 -256 -64
WIRE -80 -48 -80 -64
WIRE 336 16 272 16
WIRE 576 16 576 0
WIRE -80 32 -80 16
WIRE 336 32 336 16
WIRE 336 128 336 112
WIRE 336 128 272 128
WIRE 336 160 336 128
SYMBOL MAX17613C 128 -112 R0
SYMATTR InstName U1
SYMBOL voltage 576 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 480 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 20K
SYMBOL voltage 672 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 70m 1m 1m 100m)
SYMBOL res 480 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 20K
SYMBOL cap -96 -48 R0
WINDOW 0 28 11 Left 2
SYMATTR InstName C1
SYMATTR Value 0.1
SYMBOL sw 512 -240 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL voltage -256 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL res 320 16 R0
SYMATTR InstName R8
SYMATTR Value 1.5K
SYMBOL cap 384 -336 R0
SYMATTR InstName C2
SYMATTR Value 15
SYMBOL voltage -256 -160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 2
FLAG -256 -240 0
FLAG 400 -240 0
FLAG 512 -352 OUT
FLAG -256 -352 IN
FLAG 512 -240 0
FLAG 560 -272 0
FLAG 672 -240 0
FLAG 336 160 0
FLAG 576 16 0
FLAG -256 -48 0
FLAG -80 32 0
TEXT 480 144 Left 2 !.model SHORT SW(Ron=2 Roff=100K Vt=.5 Vh=-.4)
TEXT 480 184 Left 2 !.tran 1.25 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\064f35debcdb_scheme_before_connection.asc
* Generated by LTspice 26.0.1 for Windows.
R1 0 N002 2200
V1 N001 0 PULSE(0 125 0.1m 0.001m 0.001m 60m 120m)
R3 N002 0 2200
R2 0 N001 2200
.tran 0 120m 0 0.1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1008 680
WIRE 304 -128 224 -128
WIRE 480 -128 384 -128
WIRE 688 -128 480 -128
WIRE 480 -80 480 -128
WIRE 224 -16 224 -128
WIRE 480 48 480 0
WIRE 224 176 224 64
WIRE 480 176 480 128
WIRE 480 176 224 176
WIRE 688 176 688 -128
WIRE 688 176 480 176
WIRE 480 224 480 176
SYMBOL res 464 32 R0
SYMATTR InstName R3
SYMATTR Value 2200
SYMBOL voltage 224 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 484 231 Right 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 125 0.1m 0.001m 0.001m 60m 120m)
SYMBOL res 464 -96 R0
SYMATTR InstName R1
SYMATTR Value 2200
SYMBOL res 400 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2200
FLAG 480 224 0
TEXT 232 160 Left 2 !.tran 0 120m 0 0.1m
* Z:\home\khalils\Downloads\files\data\raw_asc\c6b1ca35c5d5_osc_impedance.asc
* Generated by LTspice 26.0.1 for Windows.
* Run ".ac analysis" and plot "Z", (Vgate/I(I1)), in "cartesion coordinate" mode.\nNote that as {R} is decreased, the real part of Z becomes more and more negative.\nAs {R} is further decreased, the real part of Z becomes more positive. A this point,\nthe oscillator fails to start.\nRun ".transient analysis" to see what effect decreasing {R} has on oscillator startup.
;tran 0 50uS 0S 200pS
C1 Vgate N002 31.8pF
C2 N002 0 31.8pF
J1 N001 Vgate N002 MPF102
L2 Vgate 0 159nH Rser=0
R2 Vgate 0 {R}
V1 N001 0 9V
I1 0 Vgate AC 1uA
I2 N002 0 1mA
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.ac oct 10k 98e6 102e6
.step param R 3k 1.5k 500
.meas ac Re find re(V(vgate)/I(I1)) at 100e6
.meas ac Im find im(V(vgate)/I(I1)) at 100e6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 884
WIRE -736 416 -736 272
WIRE -736 624 -736 496
WIRE -656 272 -736 272
WIRE -656 272 -656 208
WIRE -576 272 -656 272
WIRE -576 416 -576 272
WIRE -576 624 -736 624
WIRE -576 624 -576 496
WIRE -432 272 -576 272
WIRE -432 416 -432 272
WIRE -432 624 -576 624
WIRE -432 624 -432 496
WIRE -304 272 -432 272
WIRE -304 304 -304 272
WIRE -304 416 -304 368
WIRE -304 480 -304 416
WIRE -304 624 -432 624
WIRE -304 624 -304 544
WIRE -224 272 -304 272
WIRE -176 208 -176 176
WIRE -176 416 -304 416
WIRE -176 416 -176 304
WIRE -176 480 -176 416
WIRE -176 624 -304 624
WIRE -176 624 -176 560
WIRE 0 176 -176 176
WIRE 0 288 0 176
WIRE 0 624 -176 624
WIRE 0 624 0 368
WIRE 0 656 0 624
SYMBOL current -176 480 R0
WINDOW 123 24 116 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 43 47 Left 0
SYMATTR Value 1mA
SYMATTR InstName I2
SYMBOL voltage 0 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9V
SYMBOL current -736 496 R180
WINDOW 123 -101 105 Left 0
WINDOW 3 24 88 Invisible 0
SYMATTR Value2 AC 1uA
SYMATTR Value ""
SYMATTR InstName I1
SYMBOL njf -224 208 R0
SYMATTR InstName J1
SYMATTR Value MPF102
SYMBOL ind -448 400 R0
SYMATTR InstName L2
SYMATTR Value 159nH
SYMATTR SpiceLine Rser=0
SYMBOL res -592 400 R0
SYMATTR InstName R2
SYMATTR Value {R}
SYMBOL cap -320 480 R0
SYMATTR InstName C2
SYMATTR Value 31.8pF
SYMBOL cap -320 304 R0
SYMATTR InstName C1
SYMATTR Value 31.8pF
FLAG 0 656 0
FLAG -656 208 Vgate
TEXT -1000 224 Left 0 !;tran 0 50uS 0S 200pS
TEXT -1000 272 Left 0 !.ac oct 10k 98e6 102e6
TEXT -1024 320 Left 0 !.step param R 3k 1.5k 500
TEXT -816 -80 Left 0 ;Run ".ac analysis" and plot "Z", (Vgate/I(I1)), in "cartesion coordinate" mode.\nNote that as {R} is decreased, the real part of Z becomes more and more negative.\nAs {R} is further decreased, the real part of Z becomes more positive. A this point,\nthe oscillator fails to start.\nRun ".transient analysis" to see what effect decreasing {R} has on oscillator startup.
TEXT -1336 392 Left 0 !.meas ac Re find re(V(vgate)/I(I1)) at 100e6\n.meas ac Im find im(V(vgate)/I(I1)) at 100e6
* Z:\home\khalils\Downloads\files\data\raw_asc\AD4002.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\AD4002.asy)
R1 N004 N003 10
C1 0 N005 10p
V3 N002 0 1.8
V4 N006 0 PULSE(0 1.8 227n 0.1n 0.1n 40n 500n)
V1 N003 0 PWL(0 0 100u 5)
V2 N001 0 5
XU1 N001 N002 N004 MP_01 0 N006 MP_02 MP_03 N005 AD4002 EN_Hi_Z=1 ;pnba REF)Vdd)IN))GND)CNV)))Vout
.tran 110u
.lib AD4002.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1252
WIRE 704 208 368 208
WIRE 832 208 784 208
WIRE 368 288 368 208
WIRE 704 336 496 336
WIRE 832 336 784 336
WIRE -144 432 -208 432
WIRE -16 432 -64 432
WIRE 128 432 64 432
WIRE 576 432 496 432
WIRE 720 432 640 432
WIRE 704 528 496 528
WIRE 832 528 784 528
WIRE 368 608 368 576
SYMBOL voltage 688 528 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 1.8 227n 0.1n 0.1n 40n 500n)
SYMBOL res 80 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage -48 432 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 100u 5)
SYMBOL cap 640 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 688 208 R270
WINDOW 0 45 70 VLeft 2
WINDOW 3 -46 68 VLeft 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL AD4002 400 432 R0
SYMATTR InstName U1
SYMBOL voltage 688 336 R270
WINDOW 0 47 41 VRight 2
WINDOW 3 -44 39 VRight 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 1.8
FLAG 368 608 0
FLAG 832 336 0
FLAG -208 432 0
FLAG 720 432 0
FLAG 832 528 0
FLAG 832 208 0
TEXT 176 616 Left 2 !.tran 110u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3013B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3013B.asy)
R3 N001 N003 1.6Meg
R1 OUT N002 750K
C1 OUT 0 3.3
R2 N002 0 249K
XU1 MP_01 OUT MP_02 N002 0 N003 N004 MP_03 MP_04 N001 LT3013B ;pnba )OUT))ADJ)GND)PwrGD)Ct)))IN
Rload OUT 0 100
V1 N001 0 PWL(0 0 1 10)
C2 0 N004 1000p
.tran 1
.lib LT3013.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 80 -208 80
WIRE 112 80 0 80
WIRE 576 80 400 80
WIRE 688 80 576 80
WIRE 784 80 688 80
WIRE 784 96 784 80
WIRE -208 112 -208 80
WIRE 688 112 688 80
WIRE 0 128 0 80
WIRE 576 160 400 160
WIRE 576 176 576 160
WIRE 688 192 688 176
WIRE 784 192 784 176
WIRE -208 224 -208 192
WIRE 0 240 0 208
WIRE 112 240 0 240
WIRE 416 240 400 240
WIRE 512 240 480 240
WIRE 576 272 576 256
WIRE 256 304 256 288
SYMBOL res 768 80 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL res 560 64 R0
SYMATTR InstName R1
SYMATTR Value 750K
SYMBOL res 560 160 R0
SYMATTR InstName R2
SYMATTR Value 249K
SYMBOL voltage -208 96 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 480 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL res -16 112 R0
SYMATTR InstName R3
SYMATTR Value 1.6Meg
SYMBOL PowerProducts\\LT3013B 256 160 R0
SYMATTR InstName U1
SYMBOL cap 672 112 R0
SYMATTR InstName C1
SYMATTR Value 3.3
FLAG 256 304 0
FLAG -208 224 0
FLAG 784 192 0
FLAG 688 192 0
FLAG 576 272 0
FLAG 784 80 OUT
FLAG 512 240 0
TEXT 728 264 Left 2 !.tran 1
* Z:\tmp\asc_dec_bjh7r6w2\1294ef89fee4_HW05P01_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N002 0 12
R2 N003 0 2k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 592 -32 320 -32
WIRE 736 -32 592 -32
WIRE 592 16 592 -32
WIRE 736 16 736 -32
WIRE 272 32 64 32
WIRE 272 80 224 80
WIRE 64 112 64 32
WIRE 224 128 224 80
WIRE 592 128 592 96
WIRE 592 128 224 128
WIRE 592 160 592 128
WIRE 736 160 736 96
WIRE 64 288 64 192
WIRE 400 288 64 288
WIRE 592 288 592 240
WIRE 592 288 400 288
WIRE 736 288 736 240
WIRE 736 288 592 288
SYMBOL voltage 64 96 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 576 144 R0
SYMATTR InstName R2
SYMATTR Value 2k
FLAG 400 288 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3200-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3200-5.asy)
V1 IN 0 3
C2 OUT 0 1
XU1 OUT 0 IN N001 IN N002 LTC3200-5 ;pnba Vout)GND)_SHDN)Cap-)Vin)Cap+
C1 N002 N001 1
Rload OUT 0 50
.tran 1m startup
.lib LTC3200-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3144 2128
WIRE 2576 1664 2528 1664
WIRE 2688 1664 2640 1664
WIRE 2528 1744 2528 1664
WIRE 2688 1744 2688 1664
WIRE 2448 1856 2368 1856
WIRE 2480 1856 2448 1856
WIRE 2832 1856 2736 1856
WIRE 2928 1856 2832 1856
WIRE 2368 1872 2368 1856
WIRE 2928 1872 2928 1856
WIRE 2832 1888 2832 1856
WIRE 2448 1920 2448 1856
WIRE 2480 1920 2448 1920
WIRE 2368 1968 2368 1952
WIRE 2832 1968 2832 1952
WIRE 2928 1968 2928 1952
WIRE 2608 2000 2608 1968
SYMBOL cap 2640 1648 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL RES 2912 1856 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL cap 2816 1888 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL VOLTAGE 2368 1856 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL PowerProducts\\LTC3200-5 2608 1856 R0
SYMATTR InstName U1
FLAG 2368 1968 0
FLAG 2832 1968 0
FLAG 2928 1968 0
FLAG 2608 2000 0
FLAG 2928 1856 OUT
FLAG 2368 1856 IN
TEXT 2784 2032 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1938.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1938.asy)
R5 OUT N007 100K
R2 N008 0 200K
D1 0 N004 1N5817
R4 N005 0 60.4K
L1 N004 OUT 4.7 Rpar=2K
C1 OUT 0 22
C3 N002 0 680p
C2 N004 N006 .47
C4 N001 0 .01
V1 IN 0 15
R6 IN N001 500K
XU1 OUT N006 N004 IN N001 N007 OUT N008 N003 N005 0 LT3684 ;pnba BD)Boost)SW)Vin)Run/SS)Pgood)Bias)FB)Vc)Rt)GND
Rload OUT 0 1.5
R1 OUT N008 324K
R3 N003 N002 16.2K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 750u startup
.lib LT3684.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1104 804
WIRE -352 64 -448 64
WIRE 32 64 -352 64
WIRE 560 64 160 64
WIRE -448 80 -448 64
WIRE -352 80 -352 64
WIRE 32 96 32 64
WIRE 160 96 160 64
WIRE -64 160 -352 160
WIRE 560 160 560 64
WIRE 560 160 256 160
WIRE -448 176 -448 160
WIRE -352 176 -352 160
WIRE -240 240 -256 240
WIRE -160 240 -176 240
WIRE -64 240 -80 240
WIRE 288 240 256 240
WIRE 384 240 288 240
WIRE 448 240 384 240
WIRE 560 240 560 160
WIRE 560 240 528 240
WIRE 656 240 560 240
WIRE 752 240 656 240
WIRE 848 240 752 240
WIRE -352 256 -352 240
WIRE 288 256 288 240
WIRE 384 256 384 240
WIRE 752 256 752 240
WIRE 848 256 848 240
WIRE 560 272 560 240
WIRE -208 320 -256 320
WIRE -64 320 -128 320
WIRE 288 320 256 320
WIRE 384 336 384 320
WIRE 656 336 656 240
WIRE 752 352 752 320
WIRE 848 352 848 336
WIRE -64 400 -80 400
WIRE 560 400 560 352
WIRE 560 400 256 400
WIRE 560 416 560 400
WIRE 96 464 96 448
WIRE 560 512 560 496
WIRE -80 544 -80 400
WIRE 656 544 656 416
WIRE 656 544 -80 544
SYMBOL res 544 400 R0
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL res -64 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 16.2K
SYMBOL res 640 320 R0
SYMATTR InstName R5
SYMATTR Value 100K
SYMBOL res 832 240 R0
SYMATTR InstName Rload
SYMATTR Value 1.5
SYMBOL cap -368 176 R0
SYMATTR InstName C4
SYMATTR Value .01
SYMBOL ind 432 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=2K
SYMBOL res -112 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 60.4K
SYMBOL cap 736 256 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL PowerProducts\\LT1938 96 288 R0
SYMATTR InstName U1
SYMBOL res 544 256 R0
SYMATTR InstName R1
SYMATTR Value 324K
SYMBOL voltage -448 64 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL schottky 368 320 M180
WINDOW 0 37 61 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 272 256 R0
WINDOW 3 30 49 Left 2
SYMATTR Value .47
SYMATTR InstName C2
SYMBOL res -368 64 R0
SYMATTR InstName R6
SYMATTR Value 500K
SYMBOL cap -176 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 680p
FLAG 384 336 0
FLAG 752 352 0
FLAG 560 512 0
FLAG -256 240 0
FLAG -448 176 0
FLAG 96 464 0
FLAG 848 352 0
FLAG -256 320 0
FLAG -352 256 0
FLAG 848 240 OUT
FLAG -448 64 IN
TEXT 736 528 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1178.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
R1 N002 N001 5K
R2 N001 0 5K
V3 N003 0 SINE(1.25 .1 1K)
XU1 N003 N001 +V 0 N002 LT1178 ;pnba In+)In-)V+)V-)OUT
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1178.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -192 176 -192 160
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 160 256 0 256
WIRE -192 272 -192 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
FLAG -192 272 0
FLAG 192 192 +V
FLAG -192 160 +V
FLAG 16 96 0
FLAG 0 368 0
FLAG 192 288 0
SYMBOL voltage -192 160 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(1.25 .1 1K)
SYMBOL opamps\\LT1178 192 176 R0
SYMATTR InstName U1
TEXT 248 320 Left 2 !.tran 3m
* Z:\tmp\asc_dec_bjh7r6w2\189866f3481a_2932_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N004 N005 53.6K
R5 N001 N003 1K
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 920 748
WIRE 448 -96 48 -96
WIRE 544 -96 448 -96
WIRE 640 -96 544 -96
WIRE 448 -80 448 -96
WIRE 544 -80 544 -96
WIRE 640 -80 640 -96
WIRE 448 16 448 0
WIRE 448 16 400 16
WIRE 544 64 544 0
WIRE 544 64 400 64
WIRE 544 320 400 320
WIRE 640 320 640 0
WIRE 640 320 544 320
WIRE 416 368 400 368
WIRE 528 368 496 368
WIRE 528 416 528 368
WIRE 528 416 400 416
WIRE 528 432 528 416
WIRE 528 528 528 512
SYMBOL res 400 384 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 53.6K
SYMBOL res 528 -96 R0
SYMATTR InstName R5
SYMATTR Value 1K
FLAG 528 528 0
FLAG 544 320 _RST
* Z:\home\khalils\Downloads\files\data\raw_asc\1356d837aae1_meros_4o_B_.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 UC1 N001 N003 0 2N3904
V1 VCC 0 10
V2 0 -vcc 10
Vub1 N001 0 AC 1
RC1 VCC UC2 {R}
Q2 UC2 N002 N003 0 2N3904
VUB2 N002 0 0
I1 N003 -VCC 2m
RC2 VCC UC1 {R}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.step param R list 100 500 1k 2k 5k 10k
.dc UB1 -0.25 0.25 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 996 704
WIRE -208 -32 -208 -80
WIRE 48 -32 48 -80
WIRE -208 80 -208 48
WIRE -208 80 -272 80
WIRE 48 80 48 48
WIRE 112 80 48 80
WIRE -208 160 -208 80
WIRE 48 160 48 80
WIRE 752 160 752 112
WIRE 960 160 960 112
WIRE -272 208 -496 208
WIRE 336 208 112 208
WIRE -496 272 -496 208
WIRE 336 272 336 208
WIRE 752 320 752 240
WIRE 960 320 960 240
WIRE -496 432 -496 352
WIRE -208 432 -208 256
WIRE -80 432 -208 432
WIRE 48 432 48 256
WIRE 48 432 -80 432
WIRE 336 432 336 352
WIRE -80 464 -80 432
WIRE -80 560 -80 544
SYMBOL voltage 752 144 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL npn 112 160 M0
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL res -224 -48 R0
SYMATTR InstName RC2
SYMATTR Value {R}
SYMBOL current -80 464 R0
SYMATTR InstName I1
SYMATTR Value 2m
SYMBOL voltage -496 256 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMATTR InstName ub1
SYMBOL npn -272 160 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 32 -48 R0
SYMATTR InstName RC1
SYMATTR Value {R}
SYMBOL voltage 960 256 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 10
SYMBOL voltage 336 256 R0
SYMATTR InstName UB2
SYMATTR Value 0
FLAG 752 320 0
FLAG 752 112 VCC
FLAG 48 -80 VCC
FLAG -208 -80 VCC
FLAG -208 80 UC1
FLAG 48 80 UC2
FLAG -80 560 -VCC
FLAG 960 112 -vcc
FLAG 960 320 0
FLAG 336 432 0
FLAG -496 432 0
TEXT -520 664 Left 2 !.step param R list 100 500 1k 2k 5k 10k
TEXT -560 688 Left 2 !.dc UB1 -0.25 0.25 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\9f527f70b9be_inv_park.asc
* Generated by LTspice 26.0.1 for Windows.
B1 B 0 V = V(Q)*COS(V(T))-V(D)*SIN(V(T))
B2 A 0 V = V(D)*COS(V(T))+V(Q)*SIN(V(T))
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 892 680
WIRE 272 -16 208 -16
WIRE 208 0 208 -16
WIRE -192 48 -224 48
WIRE 208 96 208 80
WIRE -192 112 -224 112
WIRE 272 160 208 160
WIRE -192 176 -224 176
WIRE 208 176 208 160
WIRE 208 272 208 256
FLAG -224 48 D
IOPIN -224 48 In
FLAG -224 112 Q
IOPIN -224 112 In
FLAG 208 272 0
FLAG 272 160 B
IOPIN 272 160 Out
FLAG 208 96 0
FLAG 272 -16 A
IOPIN 272 -16 Out
FLAG -224 176 T
IOPIN -224 176 In
SYMBOL bv 208 160 R0
WINDOW 0 44 44 Left 2
WINDOW 3 39 71 Left 2
SYMATTR InstName B1
SYMATTR Value V = V(Q)*COS(V(T))-V(D)*SIN(V(T))
SYMBOL bv 208 -16 R0
WINDOW 0 44 44 Left 2
WINDOW 3 39 71 Left 2
SYMATTR InstName B2
SYMATTR Value V = V(D)*COS(V(T))+V(Q)*SIN(V(T))
* Z:\home\khalils\Downloads\files\data\raw_asc\32f049f043ad_Nested.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 0 {L}
I1 0 N001 AC 1
R1 N001 0 10K
C1 N001 0 {C}
.step param L 90u 200u .5u
.step param C 40p 60p 10p
.ac list 2Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 320 80 272
WIRE 80 208 80 144
WIRE 80 144 224 144
WIRE 224 144 224 192
WIRE 224 272 224 320
WIRE -32 320 -32 272
WIRE -32 192 -32 144
WIRE -32 144 80 144
WIRE 224 144 336 144
WIRE 336 144 336 192
WIRE 336 272 336 320
SYMBOL ind 208 176 R0
SYMATTR InstName L1
SYMATTR Value {L}
SYMBOL current -32 272 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName I1
SYMATTR Value AC 1
SYMBOL res 320 176 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL cap 64 208 R0
SYMATTR InstName C1
SYMATTR Value {C}
FLAG 224 320 0
FLAG 80 320 0
FLAG -32 320 0
FLAG 336 320 0
TEXT 16 376 Left 0 !.step param L 90u 200u .5u\n.step param C 40p 60p 10p
TEXT 16 448 Left 0 !.ac list 2Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\eb40e8ed1e9c_3S_Ouput_Control_circuit.asc
* Generated by LTspice 26.0.1 for Windows.
* Vout +
* Vout -
* Output Control
* 3S Output Control Circuit
* NMOS Transistor - IRFZ44N
V3 N005 0 4.2
M1 N003 N004 0 0 NMOS
V2 N002 N005 4.2
V1 N001 N002 4.2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1020 1108
WIRE 800 -144 192 -144
WIRE 192 48 192 -144
WIRE 192 368 192 128
WIRE 800 416 800 -144
WIRE 960 416 800 416
WIRE 960 528 800 528
WIRE 800 608 800 528
WIRE 528 688 528 592
WIRE 752 688 528 688
WIRE 192 768 192 448
WIRE 192 1024 192 848
WIRE 512 1024 192 1024
WIRE 800 1024 800 704
WIRE 800 1024 512 1024
WIRE 512 1088 512 1024
SYMBOL voltage 192 752 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 4.2
SYMBOL nmos 752 608 R0
SYMATTR InstName M1
SYMBOL voltage 192 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 4.2
SYMBOL voltage 192 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.2
FLAG 512 1088 0
TEXT 936 368 Left 2 ;Vout +
TEXT 944 496 Left 2 ;Vout -
TEXT 456 560 Left 2 ;Output Control
TEXT -584 104 Left 4 ;3S Output Control Circuit
TEXT -496 336 Left 2 ;NMOS Transistor - IRFZ44N
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1587-3.6.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 22
Rload OUT 0 500
XU1 0 OUT IN LT1587-3.6 ;pnba GND)OUT)IN
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1587-3.6.asy)
.lib LT1584.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 176 -160 176
WIRE 368 176 288 176
WIRE 464 176 368 176
WIRE -160 192 -160 176
WIRE 368 192 368 176
WIRE 464 192 464 176
WIRE -160 288 -160 272
WIRE 368 288 368 256
WIRE 464 288 464 272
WIRE 160 304 160 272
FLAG -160 288 0
FLAG 368 288 0
FLAG 464 288 0
FLAG 160 304 0
FLAG 464 176 OUT
FLAG -160 176 IN
SYMBOL voltage -160 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 352 192 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 448 176 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT1587-3.6 160 176 R0
SYMATTR InstName U1
TEXT 304 344 Left 2 !.tran 1