Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\744869a60964_Input.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6244.asy)
XU1 N006 N003 VCC 0 N004 LTC6244 ;pnba IN+)IN-)VCC)VEE)OUT
V1 VCC 0 10
R3 N002 N001 10k
V3 N005 0 SINE(0 1 200) AC 1
R2 N004 N003 10k
V4 N007 0 5
V2 N006 0 2.5
R1 N003 N005 10k
XU2 N007 N001 VCC 0 N002 LTC6244 ;pnba IN+)IN-)VCC)VEE)OUT
C1 N002 N001 8n
R4 N001 N004 10k
.ac dec 100 10m 20k
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 672 -48 608 -48
WIRE 784 -48 736 -48
WIRE 256 48 240 48
WIRE 432 48 336 48
WIRE 608 48 608 -48
WIRE 672 48 608 48
WIRE 784 48 784 -48
WIRE 784 48 752 48
WIRE 16 160 -80 160
WIRE 240 160 240 48
WIRE 240 160 96 160
WIRE 336 160 240 160
WIRE 432 176 432 48
WIRE 432 176 400 176
WIRE 496 176 432 176
WIRE 608 176 608 48
WIRE 608 176 576 176
WIRE 672 176 608 176
WIRE 336 192 160 192
WIRE 784 192 784 48
WIRE 784 192 736 192
WIRE 672 208 608 208
WIRE -80 224 -80 160
WIRE 160 224 160 192
WIRE 608 272 608 208
IOPIN -80 16 Out
IOPIN 368 144 In
IOPIN 704 160 In
SYMBOL Opamps\\LTC6244 368 176 R0
SYMATTR InstName U1
SYMBOL voltage -80 208 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value SINE(0 1 200)
SYMBOL res 768 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL cap 736 -64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 8n
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 608 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL res 592 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL voltage -80 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL voltage 160 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 2.5
SYMBOL Opamps\\LTC6244 704 192 R0
SYMATTR InstName U2
SYMBOL res 352 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
FLAG 368 208 0
FLAG -80 96 0
FLAG -80 304 0
FLAG 160 304 0
FLAG -80 16 VCC
FLAG 368 144 VCC
FLAG 704 224 0
FLAG 704 160 VCC
FLAG 608 352 0
TEXT -152 328 Left 2 !.ac dec 100 10m 20k
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1777.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1777.asy)
XU1 MP_01 MP_02 N001 OUT N003 N002 0 MP_03 MP_04 IN MP_05 MP_06 N006 N005 LT1777 ;pnba ))_SHDN)Vcc)Vd)Vsw)GND)))Vin)))FB)Vc
R3 N006 0 12.1K
V1 IN 0 24
L1 N003 OUT 220
Rload OUT 0 10
C3 OUT 0 100 Rser=0.1
R1 N005 N004 12K
D1 0 N003 1N5819
R2 OUT N006 36.5K
C1 N004 0 2200p
C2 N005 0 100p
L2 N002 N003 1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LT1777.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1284 696
WIRE 272 0 80 0
WIRE 752 0 432 0
WIRE 80 16 80 0
WIRE 272 32 272 0
WIRE 432 32 432 0
WIRE 80 112 80 96
WIRE 208 112 192 112
WIRE 512 112 496 112
WIRE 608 112 592 112
WIRE 640 112 608 112
WIRE 752 112 752 0
WIRE 752 112 720 112
WIRE 864 112 752 112
WIRE 976 112 864 112
WIRE 752 128 752 112
WIRE 864 128 864 112
WIRE 976 128 976 112
WIRE 608 176 608 112
WIRE 608 176 496 176
WIRE 608 192 608 176
WIRE 864 224 864 192
WIRE 976 224 976 208
WIRE 16 240 -16 240
WIRE 144 240 96 240
WIRE 208 240 144 240
WIRE 544 240 496 240
WIRE 752 240 752 208
WIRE 752 240 720 240
WIRE 752 256 752 240
WIRE -16 272 -16 240
WIRE 144 272 144 240
WIRE 608 272 608 256
WIRE 544 304 544 240
WIRE 720 304 720 240
WIRE 720 304 544 304
WIRE 352 336 352 320
WIRE 752 352 752 336
WIRE -16 368 -16 336
WIRE 144 368 144 336
SYMBOL RES 112 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 12K
SYMBOL res 960 112 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL polcap 848 128 R0
SYMATTR InstName C3
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.1
SYMBOL res 736 240 R0
SYMATTR InstName R3
SYMATTR Value 12.1K
SYMBOL ind 496 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 1
SYMBOL cap -32 272 R0
SYMATTR InstName C1
SYMATTR Value 2200p
SYMBOL schottky 592 256 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMBOL ind 624 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 220
SYMBOL cap 128 272 R0
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL res 736 112 R0
SYMATTR InstName R2
SYMATTR Value 36.5K
SYMBOL POWERPRODUCTS\\LT1777 352 176 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 80 0 R0
SYMATTR InstName V1
SYMATTR Value 24
FLAG 352 336 0
FLAG 608 272 0
FLAG -16 368 0
FLAG 144 368 0
FLAG 752 352 0
FLAG 864 224 0
FLAG 80 112 0
FLAG 976 224 0
FLAG 976 112 OUT
FLAG 80 0 IN
TEXT 488 400 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0094f5a9a175_limiter_diod_positive.asc
* Generated by LTspice 26.0.1 for Windows.
R1 b a 500
D1 b 0 1N4148
V1 a 0 SINE(0 10 50)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05s
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 208 -48 208
WIRE 144 208 96 208
WIRE -48 224 -48 208
WIRE 144 240 144 208
WIRE -48 336 -48 304
WIRE 48 336 -48 336
WIRE 144 336 144 304
WIRE 144 336 48 336
WIRE 48 352 48 336
SYMBOL Misc\\EuropeanResistor 112 192 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 500
SYMBOL Misc\\signal -48 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 38 63 Left 2
SYMATTR Value SINE(0 10 50)
SYMATTR InstName V1
SYMBOL diode 128 240 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG -48 208 a
FLAG 144 208 b
FLAG 48 352 0
TEXT -64 352 Left 2 !.tran 0.05s
* Z:\home\khalils\Downloads\files\data\raw_asc\032be66a6662_Hysteresis_dc_plot.asc
* Generated by LTspice 26.0.1 for Windows.
V1 in0 0 0
B1 in 0 V=1.0*Table(V(in0), -1, -1, 0, 1, 1, -1)
Q1 _out in N003 0 NPN
Q2 out N002 N003 0 NPN
R1 N003 N004 10k
R2 N001 _out 1k
R3 N001 out 1k
R4 N002 N004 12k
R5 _out N002 10k
V2 N004 0 -12
V3 N001 0 12
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 -1 1 0.001
* Hysteresis Curve With DC-Analysis\n \nA table is used to map the linear DC-sweep of V1 to a "nonlinear" DC-sweep from -3V to +3V and back to -3V.\n \nPlot V(out) and Ic(Q1) versus V(in)\nTherefore change the x-axis to V(in) after the first simulation run.
* Schmitt trigger
* Translation Table\n-10 ... +10 -> -1 ... +1 ... -1\n \n / / \\ \n / / \\ \n / / \\
.options plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -432 240 -432 288
WIRE -432 160 -432 112
WIRE -256 240 -256 288
WIRE -256 160 -256 112
WIRE 400 256 480 256
WIRE 480 256 480 336
WIRE 480 256 576 256
WIRE 400 -16 400 64
WIRE 400 -96 400 -144
WIRE 400 -144 576 -144
WIRE 576 -144 576 -96
WIRE 576 -16 576 16
WIRE 688 256 688 208
WIRE 688 208 640 208
WIRE 400 64 688 64
WIRE 400 64 400 160
WIRE 688 64 688 96
WIRE 688 176 688 208
WIRE 688 336 688 448
WIRE 688 448 480 448
WIRE 480 448 480 416
WIRE 256 -112 256 -144
WIRE 256 -144 400 -144
WIRE 256 -32 256 0
WIRE 480 496 480 448
WIRE 480 608 480 576
WIRE 336 208 288 208
WIRE 576 16 784 16
WIRE 576 16 576 160
WIRE 688 64 784 64
FLAG -432 288 0
FLAG -432 112 in0
FLAG -256 288 0
FLAG -256 112 in
FLAG 256 0 0
FLAG 480 608 0
FLAG 288 208 in
IOPIN 288 208 In
FLAG 784 16 out
IOPIN 784 16 Out
FLAG 784 64 _out
SYMBOL voltage -432 144 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL bv -256 144 R0
SYMATTR InstName B1
SYMATTR Value V=1.0*Table(V(in0),  -1, -1,   0, 1,   1, -1)
SYMBOL npn 336 160 R0
SYMATTR InstName Q1
SYMBOL npn 640 160 M0
SYMATTR InstName Q2
SYMBOL res 464 320 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 384 -112 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 560 -112 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 672 240 R0
SYMATTR InstName R4
SYMATTR Value 12k
SYMBOL res 672 80 R0
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL voltage 480 480 R0
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL voltage 256 -128 R0
SYMATTR InstName V3
SYMATTR Value 12
TEXT -440 8 Left 0 !.dc V1 -1 1 0.001
TEXT -456 -368 Left 0 ;Hysteresis Curve With DC-Analysis\n \nA table is used to map the linear DC-sweep of V1 to a "nonlinear" DC-sweep from -3V to +3V and back to -3V.\n \nPlot V(out) and Ic(Q1)  versus V(in)\nTherefore change the x-axis to V(in) after the first simulation run.
TEXT 416 -184 Left 0 ;Schmitt trigger
TEXT -160 40 Left 0 ;Translation Table\n-10 ... +10 -> -1 ... +1 ... -1\n \n         /                      / \\      \n      /                      /       \\    \n   /                      /             \\
TEXT -448 -160 Left 0 !.options plotwinsize=0
* Z:\home\khalils\Downloads\files\data\raw_asc\0aca1c5e0f7a_Control.asc
* Generated by LTspice 26.0.1 for Windows.
A1 OCP_Vin 0 0 0 0 N002 0 0 BUF
A2 OVP_Vin 0 0 0 0 N003 0 0 BUF
A3 UVP_Vin 0 0 0 0 N004 0 0 BUF
A4 0 N002 0 0 N001 0 N006 0 AND
A5 0 N003 0 0 N001 0 N005 0 AND
A6 N004 0 0 0 N001 0 N007 0 AND
A7 N007 N005 0 0 N006 0 V_out 0 OR
V1 N001 0 PULSE(0 5 0 1n 1n 1m 2m)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1172 1120
WIRE 16 160 -176 160
WIRE 688 160 16 160
WIRE 976 160 688 160
WIRE 1136 160 976 160
WIRE -176 224 -176 160
WIRE 64 224 64 -80
WIRE 736 224 736 -80
WIRE 1040 224 1040 -128
WIRE 16 352 16 160
WIRE 64 352 64 288
WIRE 688 352 688 160
WIRE 736 352 736 288
WIRE 976 352 976 160
WIRE 1040 352 1040 288
WIRE -176 384 -176 304
WIRE 736 464 736 416
WIRE 736 464 464 464
WIRE 64 528 64 416
WIRE 416 528 64 528
WIRE 1024 528 1024 416
WIRE 1024 528 480 528
WIRE 416 656 416 528
WIRE 464 656 464 464
WIRE 480 656 480 528
WIRE 464 768 464 720
IOPIN 64 -80 In
IOPIN 736 -80 In
IOPIN 1040 -128 In
IOPIN 464 768 Out
SYMBOL Digital/and 112 384 R90
SYMATTR InstName A4
SYMBOL Digital/and 784 384 R90
SYMATTR InstName A5
SYMBOL Digital/inv 1104 224 R90
SYMATTR InstName A3
SYMBOL voltage -176 208 R0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 1n 1n 1m 2m)
SYMBOL Digital/inv 128 224 R90
SYMATTR InstName A1
SYMBOL Digital/or 512 688 R90
SYMATTR InstName A7
SYMBOL Digital/inv 800 224 R90
SYMATTR InstName A2
SYMBOL Digital/and 1072 384 R90
SYMATTR InstName A6
FLAG -176 384 0
FLAG 64 -80 OCP_Vin
FLAG 736 -80 OVP_Vin
FLAG 1040 -128 UVP_Vin
FLAG 464 768 V_out
* Z:\home\khalils\Downloads\files\data\raw_asc\f2102b44e798_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
XU N001 NC_01 N002 S6012R ;pnba A)G)K
R1 N002 0 40
V2 N001 0 PULSE(0 410 0 1 1 0 0 1)
.lib"C:\Program Files\LTC\LTspiceXVII\lib\sub\Thyristor_SCR_Sxx12x_A_SPICE_Model_lib.htm"
.tran 2m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 680
WIRE 480 192 256 192
WIRE 256 288 256 256
WIRE 480 288 480 272
SYMBOL voltage 480 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 410 0 1 1 0 0 1)
SYMBOL Misc\\SCR 240 192 R0
SYMATTR InstName U
SYMATTR Value S6012R
SYMBOL res 240 272 R0
SYMATTR InstName R1
SYMATTR Value 40
FLAG 256 368 0
FLAG 480 288 0
TEXT -72 32 Left 2 !.lib"C:\\Program Files\\LTC\\LTspiceXVII\\lib\\sub\\Thyristor_SCR_Sxx12x_A_SPICE_Model_lib.htm"
TEXT -74 392 Left 2 !.tran 2m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1682.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1682.asy)
R3 OUT 0 1K
XU1 OUT IN N003 0 N004 IN N002 N001 LTC1682 ;pnba Vout)_SHDN)FB)GND)C-)Vin)C+)CPO
R2 N003 0 100K
C3 OUT 0 2
R1 OUT N003 300K
C1 N002 N004 .22
C2 N001 0 4.7
V1 IN 0 3.3
.tran 1m startup
.lib LTC1682.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4980 2452
WIRE 3680 1552 3312 1552
WIRE 3888 1552 3680 1552
WIRE 3888 1568 3888 1552
WIRE 3104 1616 2992 1616
WIRE 3184 1616 3104 1616
WIRE 3360 1616 3184 1616
WIRE 3712 1616 3648 1616
WIRE 3808 1616 3776 1616
WIRE 2992 1632 2992 1616
WIRE 3104 1632 3104 1616
WIRE 3184 1632 3184 1616
WIRE 3888 1664 3888 1648
WIRE 3312 1680 3312 1552
WIRE 3360 1680 3312 1680
WIRE 3744 1680 3648 1680
WIRE 3744 1712 3744 1680
WIRE 2992 1728 2992 1712
WIRE 3104 1728 3104 1696
WIRE 3184 1744 3184 1712
WIRE 3360 1744 3184 1744
WIRE 3680 1744 3680 1552
WIRE 3680 1744 3648 1744
WIRE 3184 1760 3184 1744
WIRE 3360 1808 3312 1808
WIRE 3744 1808 3744 1776
WIRE 3744 1808 3648 1808
WIRE 3184 1856 3184 1840
SYMBOL res 2976 1616 R0
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL res 3168 1616 R0
SYMATTR InstName R1
SYMATTR Value 300K
SYMBOL cap 3728 1712 R0
SYMATTR InstName C1
SYMATTR Value .22
SYMBOL res 3168 1744 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL voltage 3888 1552 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL PowerProducts\\LTC1682 3504 1712 R0
SYMATTR InstName U1
SYMBOL cap 3712 1632 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL cap 3088 1632 R0
SYMATTR InstName C3
SYMATTR Value 2
FLAG 3312 1808 0
FLAG 3808 1616 0
FLAG 3888 1664 0
FLAG 3104 1728 0
FLAG 3184 1856 0
FLAG 2992 1728 0
FLAG 3888 1552 IN
FLAG 2992 1616 OUT
TEXT 3696 1840 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG701.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG701.asy)
V4 N003 0 PULSE(0 3 0 10n 10n 980n 2u)
V1 +V 0 5
R1 N002 0 300
C1 N002 0 35p
VS N001 0 3
XU1 N003 N002 N001 0 +V ADG701 ;pnba IN)D)S)GND)Vdd
.tran 10u
.lib ADG701.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -368 -16 -400 -16
WIRE -240 -16 -288 -16
WIRE 0 -16 -48 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE -480 32 -480 16
WIRE 112 32 112 -16
WIRE -240 48 -368 48
WIRE -368 112 -368 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -480 128 -480 112
WIRE -144 176 -144 160
WIRE -368 272 -368 192
SYMBOL voltage -480 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -272 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL ADG701 -144 32 R0
SYMATTR InstName U1
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL voltage -368 96 R0
WINDOW 3 17 129 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 10n 10n 980n 2u)
SYMATTR InstName V4
FLAG -480 128 0
FLAG -480 16 +V
FLAG -400 -16 0
FLAG -144 -112 +V
FLAG -144 176 0
FLAG -368 272 0
FLAG 0 112 0
FLAG 112 112 0
TEXT -536 200 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1932.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1932.asy)
D1 N002 N004 NSPW500BS N=4
V1 IN 0 2
C1 N002 0 1
L1 IN N001 6
D5 N001 N002 MBR0540
R1 N003 0 1.5K
XU1 N001 0 N004 N003 IN IN LT1932 ;pnba SW)GND)LED)Rset)_SHDN)Vin
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LT1932.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2460 1624
WIRE 1568 1216 1472 1216
WIRE 1680 1216 1568 1216
WIRE 1728 1216 1680 1216
WIRE 1840 1216 1808 1216
WIRE 1888 1216 1840 1216
WIRE 2016 1216 1952 1216
WIRE 2080 1216 2016 1216
WIRE 1472 1232 1472 1216
WIRE 2016 1232 2016 1216
WIRE 1680 1280 1680 1216
WIRE 1840 1280 1840 1216
WIRE 2016 1312 2016 1296
WIRE 1472 1328 1472 1312
WIRE 2080 1328 2080 1216
WIRE 1568 1360 1568 1216
WIRE 1600 1360 1568 1360
WIRE 1504 1488 1488 1488
WIRE 1600 1488 1584 1488
WIRE 2080 1488 2080 1392
WIRE 2080 1488 1920 1488
WIRE 1760 1584 1760 1568
SYMBOL POWERPRODUCTS\\LT1932 1760 1424 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1472 1216 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL ind 1712 1232 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6
SYMBOL RES 1600 1472 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1.5K
SYMBOL schottky 1888 1232 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D5
SYMATTR Value MBR0540
SYMBOL cap 2000 1232 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL LED 2064 1328 R0
WINDOW 0 27 6 Left 2
WINDOW 3 24 67 Left 2
WINDOW 123 24 95 Left 2
SYMATTR InstName D1
SYMATTR Value NSPW500BS
SYMATTR Description Diode
SYMATTR Type diode
SYMATTR Value2 N=4
FLAG 1760 1584 0
FLAG 1488 1488 0
FLAG 1472 1328 0
FLAG 2016 1312 0
FLAG 1472 1216 IN
TEXT 2128 1528 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0139e55a4f06_StageB_BandPassDeliyannisFriendNoPosFB_LTC6262.asc
* Generated by LTspice 26.0.1 for Windows.
* This subcircuit is not simulatable. \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6262.asy)
R2 N001 REF 22k
R5 OUT N002 33k
XU1 REF N002 OUT V+ V- Vp LTC6261 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN_L
R1 N001 IN 4.7k
C2 N002 N001 1.5n
C1 OUT N001 1.5n
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4112 860
WIRE 48 -128 -16 -128
WIRE 176 -128 112 -128
WIRE 480 -128 176 -128
WIRE 176 -64 176 -128
WIRE 320 64 320 -32
WIRE 320 112 320 64
WIRE -160 128 -176 128
WIRE -128 128 -160 128
WIRE -16 128 -16 -128
WIRE -16 128 -48 128
WIRE 48 128 -16 128
WIRE 176 128 176 16
WIRE 176 128 112 128
WIRE 288 128 288 112
WIRE 288 128 176 128
WIRE 304 128 288 128
WIRE 480 128 480 -128
WIRE 544 128 480 128
WIRE 576 128 544 128
WIRE 432 144 352 144
WIRE 480 144 480 128
WIRE 480 144 432 144
WIRE 288 160 240 160
WIRE 304 160 288 160
WIRE -16 176 -16 128
WIRE 288 176 288 160
WIRE 320 224 320 176
WIRE -16 288 -16 256
WIRE 240 288 240 160
WIRE 320 304 320 224
WIRE 368 224 368 249
SYMBOL Opamps\\LTC6262 320 144 R0
SYMATTR InstName U1
SYMBOL cap 112 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1.5n
SYMBOL res -32 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL res -32 160 R0
SYMATTR InstName R2
SYMATTR Value 22k
SYMBOL cap 112 -144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1.5n
SYMBOL res 160 -80 R0
SYMATTR InstName R5
SYMATTR Value 33k
FLAG 320 -32 V+
FLAG 320 304 V-
FLAG 544 128 OUT
FLAG -160 128 IN
FLAG 240 288 REF
FLAG -16 288 REF
FLAG 368 249 Vp
TEXT -176 504 Left 4 ;This subcircuit is not simulatable.  \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17563.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17563.asy)
R6 N005 N004 20K
R1 IN N003 2.1Meg
R2 N003 0 200K
V1 IN 0 24
XU1 IN N007 0 0 N002 N004 0 OUT N003 N006 MAX17563 ;pnba IN)SETI)GND)_HVEN)EN)_FLAG)_RIEN)OUT)UVLO)OVLO
R4 0 N006 20K
V4 N002 0 2
C2 OUT 0 150
V2 N005 0 5
V3 N001 0 PULSE(0 1 70m 1m 1m 100m)
R3 N006 IN 499K
R8 N007 0 2.87K
S1 0 OUT N001 0 SHORT
.model SHORT SW(Ron=4 Roff=100K Vt=.5 Vh=-.4)
.tran 0.8 startup
.lib MAX17563.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1800 680
WIRE -304 -352 -432 -352
WIRE -192 -352 -304 -352
WIRE -16 -352 -192 -352
WIRE 400 -352 272 -352
WIRE 512 -352 400 -352
WIRE 672 -352 560 -352
WIRE -432 -336 -432 -352
WIRE 400 -336 400 -352
WIRE 512 -336 512 -352
WIRE 672 -336 672 -352
WIRE 560 -320 560 -352
WIRE -16 -304 -96 -304
WIRE -96 -288 -96 -304
WIRE -304 -272 -304 -352
WIRE -432 -240 -432 -256
WIRE 400 -240 400 -272
WIRE 512 -240 512 -256
WIRE 672 -240 672 -256
WIRE -96 -192 -96 -208
WIRE -304 -160 -304 -192
WIRE -16 -160 -304 -160
WIRE 384 -160 272 -160
WIRE 576 -160 464 -160
WIRE -304 -144 -304 -160
WIRE 576 -128 576 -160
WIRE -192 -96 -192 -352
WIRE 400 -64 272 -64
WIRE -304 -32 -304 -64
WIRE 400 -32 400 -64
WIRE 576 -32 576 -48
WIRE -192 16 -192 -16
WIRE -16 16 -192 16
WIRE 336 16 272 16
WIRE -192 32 -192 16
WIRE 336 32 336 16
WIRE -16 128 -80 128
WIRE 336 128 336 112
WIRE 336 128 272 128
WIRE -192 160 -192 112
WIRE -80 160 -80 128
WIRE 336 160 336 128
SYMBOL res -208 0 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 499K
SYMBOL res -320 -288 R0
SYMATTR InstName R1
SYMATTR Value 2.1Meg
SYMBOL voltage 576 -144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res -208 128 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 20K
SYMBOL voltage -432 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 384 -336 R0
SYMATTR InstName C2
SYMATTR Value 150
SYMBOL sw 512 -240 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL res 480 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 20K
SYMBOL voltage -96 -304 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 2
SYMBOL res 320 16 R0
SYMATTR InstName R8
SYMATTR Value 2.87K
SYMBOL voltage 672 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 70m 1m 1m 100m)
SYMBOL MAX17563 128 -112 R0
SYMATTR InstName U1
SYMBOL res -320 -160 R0
SYMATTR InstName R2
SYMATTR Value 200K
FLAG -432 -240 0
FLAG 400 -240 0
FLAG 512 -352 OUT
FLAG -432 -352 IN
FLAG 512 -240 0
FLAG 560 -272 0
FLAG 672 -240 0
FLAG -192 160 0
FLAG 336 160 0
FLAG 576 -32 0
FLAG -96 -192 0
FLAG -304 -32 0
FLAG -80 160 0
FLAG 400 -32 0
TEXT 480 144 Left 2 !.model SHORT SW(Ron=4 Roff=100K Vt=.5 Vh=-.4)
TEXT 480 184 Left 2 !.tran 0.8 startup