Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1d69393d1fce_strong0weak1nmos.asc
* Generated by LTspice 26.0.1 for Windows.
R1 vdd vout 1k
vgs vgs 0 PULSE(0 1.8 0 500p 500p 4n 10n)
vdd vdd 0 1.8
M2 vout vgs 0 0 NMOS l=0.18u w=0.36u
C1 vout 0 50f
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.op
.include tsmc180.txt
.tran 30n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -272 48 -272 16
WIRE -272 144 -272 128
WIRE -64 144 -272 144
WIRE -32 144 -64 144
WIRE -272 160 -272 144
WIRE -64 192 -64 144
WIRE -208 208 -272 208
WIRE -672 224 -672 176
WIRE -560 224 -560 176
WIRE -320 240 -368 240
WIRE -272 288 -272 256
WIRE -208 288 -208 208
WIRE -208 288 -272 288
WIRE -64 336 -64 256
WIRE -672 352 -672 304
WIRE -560 352 -560 304
WIRE -272 352 -272 288
IOPIN -672 176 In
IOPIN -368 240 In
IOPIN -560 176 In
IOPIN -272 16 In
IOPIN -32 144 Out
SYMBOL cap -80 192 R0
SYMATTR InstName C1
SYMATTR Value 50f
SYMBOL res -288 32 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -560 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vdd
SYMATTR Value 1.8
SYMBOL voltage -672 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -51 -150 VRight 2
SYMATTR InstName vgs
SYMATTR Value PULSE(0 1.8 0 500p 500p 4n 10n)
SYMBOL nmos4 -320 160 R0
WINDOW 123 1 100 Left 2
SYMATTR Value2 l=0.18u w=0.36u
SYMATTR InstName M2
FLAG -272 352 0
FLAG -672 352 0
FLAG -672 176 vgs
FLAG -368 240 vgs
FLAG -560 352 0
FLAG -560 176 vdd
FLAG -272 16 vdd
FLAG -64 336 0
FLAG -32 144 vout
TEXT -736 24 Left 2 !.op
TEXT -736 0 Left 2 !.include tsmc180.txt
TEXT -680 24 Left 2 !.tran 30n
* Z:\home\khalils\Downloads\files\data\raw_asc\dcbffee8b222_ej1_b.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 N001 2
C2 0 N001 0.66
V1 N001 0 AC 1 Rser=1
L1 N001 0 0.75
RL N002 0 1
.ac dec 1k 0.01 100
.net I(RL) V1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 112 16 112
WIRE 208 112 144 112
WIRE 256 112 208 112
WIRE 368 112 320 112
WIRE 16 160 16 112
WIRE 144 160 144 112
WIRE 208 160 208 112
WIRE 368 160 368 112
WIRE 16 288 16 240
WIRE 144 288 144 224
WIRE 144 288 16 288
WIRE 208 288 208 240
WIRE 208 288 144 288
WIRE 368 288 368 240
WIRE 368 288 208 288
WIRE 208 304 208 288
SYMBOL voltage 16 144 R0
WINDOW 0 -73 5 Left 2
WINDOW 123 -94 39 Left 2
WINDOW 39 -126 70 Left 2
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMATTR SpiceLine Rser=1
SYMBOL cap 160 224 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 0.66
SYMBOL ind 192 144 R0
SYMATTR InstName L1
SYMATTR Value 0.75
SYMBOL res 352 144 R0
SYMATTR InstName RL
SYMATTR Value 1
SYMBOL cap 320 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2
FLAG 208 304 0
TEXT -72 304 Left 2 !.ac dec 1k 0.01 100
TEXT -72 328 Left 2 !.net I(RL) V1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1504.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1504.asy)
R4 N005 N004 5K
Rload OUT 0 100
R1 OUT N006 20.4K
XU1 N001 IN N003 0 N006 N002 N007 N005 LTC1504 top=10 bot=1T ;pnba Imax)Vcc)SW)GND)FB)_SHND)SS)COMP
C2 N007 0 .01
R3 IN N001 47K
C3 N004 0 5000p
C1 OUT 0 100 Rser=.1
V1 IN 0 5
R2 N006 0 12.6K
L1 N003 OUT 50
.tran 5m startup
.lib LTC1504.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2224 1840
WIRE 1328 1264 1168 1264
WIRE 1392 1264 1328 1264
WIRE 1520 1264 1472 1264
WIRE 1168 1280 1168 1264
WIRE 1328 1328 1328 1264
WIRE 1520 1328 1520 1264
WIRE 1168 1376 1168 1360
WIRE 1264 1424 1232 1424
WIRE 1616 1424 1584 1424
WIRE 1728 1424 1696 1424
WIRE 1856 1424 1728 1424
WIRE 1968 1424 1856 1424
WIRE 1728 1440 1728 1424
WIRE 1856 1440 1856 1424
WIRE 1968 1440 1968 1424
WIRE 1168 1520 1136 1520
WIRE 1264 1520 1248 1520
WIRE 1728 1520 1584 1520
WIRE 1136 1536 1136 1520
WIRE 1728 1536 1728 1520
WIRE 1856 1536 1856 1504
WIRE 1968 1536 1968 1520
WIRE 1136 1616 1136 1600
WIRE 1312 1632 1312 1616
WIRE 1536 1632 1536 1616
WIRE 1728 1632 1728 1616
WIRE 1312 1712 1312 1696
SYMBOL res 1952 1424 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL res 1712 1520 R0
SYMATTR InstName R2
SYMATTR Value 12.6K
SYMBOL polcap 1840 1440 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=.1
SYMBOL cap 1296 1632 R0
WINDOW 3 24 57 Left 2
SYMATTR Value .01
SYMATTR InstName C2
SYMBOL ind 1600 1440 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 50
SYMBOL res 1376 1280 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 47K
SYMBOL RES 1712 1424 R0
SYMATTR InstName R1
SYMATTR Value 20.4K
SYMBOL res 1264 1504 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 5K
SYMBOL VOLTAGE 1168 1264 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 1120 1536 R0
SYMATTR InstName C3
SYMATTR Value 5000p
SYMBOL POWERPRODUCTS\\LTC1504 1424 1472 R0
SYMATTR InstName U1
FLAG 1168 1376 0
FLAG 1536 1632 0
FLAG 1312 1712 0
FLAG 1728 1632 0
FLAG 1856 1536 0
FLAG 1136 1616 0
FLAG 1968 1536 0
FLAG 1968 1424 OUT
FLAG 1168 1264 IN
TEXT 1848 1624 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0a218dff55db_1218.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Supply Current Sense
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1218.asy)
R3 OUT 0 20K
MQ1 OUT N002 N001 N001 BSS84
XU1 N003 N001 +V 0 N002 NC_01 LT1218 ;pnba In+)In-)V+)V-)OUT)SHDN
V1 +V 0 5
R2 +V N003 .2
I1 N003 0 SINE(100m 100m 1K)
R1 N001 +V 200
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 0 96 -144 96
WIRE 32 96 0 96
WIRE 128 96 112 96
WIRE 368 96 128 96
WIRE -144 112 -144 96
WIRE 0 128 0 96
WIRE -144 208 -144 192
WIRE 176 208 176 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 368 224 368 96
WIRE 320 240 224 240
WIRE 0 256 0 208
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 176 288 176 272
WIRE 480 320 368 320
WIRE 368 336 368 320
WIRE 0 368 0 352
WIRE 368 432 368 416
SYMBOL res -16 112 R0
SYMATTR InstName R2
SYMATTR Value .2
SYMBOL pmos 320 320 M180
WINDOW 0 63 69 Left 2
WINDOW 3 65 35 Left 2
SYMATTR InstName Q1
SYMATTR Value BSS84
SYMBOL current 0 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value SINE(100m 100m 1K)
SYMBOL voltage -144 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL res 352 320 R0
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL opamps\\LT1218 192 240 R0
SYMATTR InstName U1
FLAG -144 208 0
FLAG 176 192 +V
FLAG -144 96 +V
FLAG 0 368 0
FLAG 176 288 0
FLAG 368 432 0
FLAG 480 320 OUT
TEXT 24 416 Left 2 !.tran 3m
TEXT 88 48 Bottom 2 ;Positive Supply Current Sense
* Z:\tmp\asc_dec_bjh7r6w2\032be66a6662_Hysteresis_dc_plot_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R5 _out N002 10k
B1 in 0 V=1.0*Table(V(in0), -1, -1, 0, 1, 1, -1)
V2 N004 0 -12
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -432 240 -432 288
WIRE -432 160 -432 112
WIRE -256 240 -256 288
WIRE -256 160 -256 112
WIRE 400 256 480 256
WIRE 480 256 480 336
WIRE 480 256 576 256
WIRE 576 -144 576 -96
WIRE 576 -16 576 16
WIRE 688 256 688 208
WIRE 688 208 640 208
WIRE 400 64 688 64
WIRE 688 64 688 96
WIRE 688 176 688 208
WIRE 688 448 480 448
WIRE 480 448 480 416
WIRE 480 496 480 448
WIRE 480 608 480 576
WIRE 576 16 784 16
WIRE 576 16 576 160
WIRE 688 64 784 64
SYMBOL res 672 80 R0
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL bv -256 144 R0
SYMATTR InstName B1
SYMATTR Value V=1.0*Table(V(in0),  -1, -1,   0, 1,   1, -1)
SYMBOL voltage 480 480 R0
SYMATTR InstName V2
SYMATTR Value -12
FLAG -432 288 0
FLAG -432 112 in0
FLAG -256 288 0
FLAG -256 112 in
FLAG 480 608 0
FLAG 784 16 out
FLAG 784 64 _out
* Z:\home\khalils\Downloads\files\data\raw_asc\1aaa47e213cf_Apartado_B1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R2 Lpf N001 1K
V2 0 Vee 12
CL N003 0 100n
V3 N002 0 SINE() AC 1 0
R1 N001 0 1K
RL N003 N002 4,7K
XU1 N003 N001 Vcc Vee Lpf level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 Vcc 0 12
.ac dec 100000 10 100000
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 0 224 0
WIRE 464 0 400 0
WIRE 544 0 464 0
WIRE 688 0 624 0
WIRE 224 16 224 0
WIRE 32 96 32 48
WIRE 592 160 592 144
WIRE 464 176 464 0
WIRE 560 176 464 176
WIRE 688 192 688 0
WIRE 688 192 624 192
WIRE 720 192 688 192
WIRE 336 208 224 208
WIRE 464 208 416 208
WIRE 560 208 464 208
WIRE 32 224 32 176
WIRE 32 224 -16 224
WIRE 592 240 592 224
WIRE -16 256 -16 224
WIRE 464 256 464 208
WIRE 32 288 32 224
WIRE 224 288 224 208
WIRE 464 352 464 320
WIRE 32 384 32 368
SYMBOL voltage 224 272 R0
WINDOW 3 24 96 Invisible 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE()
SYMATTR Value2 AC 1 0
SYMBOL Opamps\\UniversalOpamp2 592 192 R0
SYMATTR InstName U1
SYMBOL cap 448 256 R0
SYMATTR InstName CL
SYMATTR Value 100n
SYMBOL voltage 32 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL res 416 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 32 80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 432 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RL
SYMATTR Value 4,7K
SYMBOL res 640 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
FLAG 224 368 0
FLAG 464 352 0
FLAG 224 16 0
FLAG -16 256 0
FLAG 32 48 Vcc
FLAG 592 144 Vcc
FLAG 720 192 Lpf
FLAG 32 384 Vee
FLAG 592 240 Vee
TEXT 128 104 Left 2 !.ac dec 100000 10 100000
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1764-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1764-1.8.asy)
Rload OUT 0 500
C1 OUT 0 10 Rser=100m
V1 IN 0 PWL(0 0 1 10)
XU1 IN IN 0 OUT OUT LT1764-1.8 ;pnba _SHDN)IN)GND)OUT)Sense
.tran 1
.lib LT1764.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -224 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 544 48 384 48
WIRE -224 64 -224 48
WIRE 384 64 384 48
WIRE 544 64 544 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -224 160 -224 144
WIRE 384 160 384 128
WIRE 544 160 544 144
WIRE 160 240 160 208
SYMBOL res 528 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL PowerProducts\\LT1764-1.8 160 96 R0
SYMATTR InstName U1
SYMBOL cap 368 64 R0
WINDOW 123 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 10u
SYMATTR Value2 Rser=100m
FLAG -224 160 0
FLAG 384 160 0
FLAG 544 160 0
FLAG 160 240 0
FLAG 544 48 OUT
FLAG -224 48 IN
TEXT 360 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\1e0efdb1380b_Draft15.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N004 N003 10k
C1 N004 0 100nF
R1 N001 N004 10k
V1 N002 0 PULSE(0 5 0 0 0 0.001 0.002)
S1 N003 0 N002 0 SW1
V2 N001 0 5v
.tran 0.01
.model SW1 SW(Ron=10 Roff=10Meg Vt=1.1 Vh=0.1)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 -16 -256 -16
WIRE 32 96 -112 96
WIRE 160 96 144 96
WIRE 240 96 240 64
WIRE -256 112 -256 -16
WIRE -112 112 -112 96
WIRE 144 112 144 96
WIRE 240 128 240 96
WIRE 32 176 32 96
WIRE 96 176 32 176
SYMBOL voltage -112 96 R0
WINDOW 3 -27 136 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 0 0 0.001 0.002)
SYMBOL res 224 -32 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL sw 144 96 R0
SYMATTR InstName S1
SYMATTR Value SW1
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage -256 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5v
SYMBOL cap 224 128 R0
SYMATTR InstName C1
SYMATTR Value 100nF
FLAG 240 192 0
FLAG -256 192 0
FLAG -112 192 0
FLAG 144 192 0
FLAG 96 128 0
TEXT -290 216 Left 2 !.tran 0.01
TEXT -144 264 Left 2 !.model SW1 SW(Ron=10 Roff=10Meg Vt=1.1 Vh=0.1)
* Z:\tmp\asc_dec_bjh7r6w2\0505ef67640f_250n_nand_depletion_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N006 0 PULSE(0 5 0 0.1p 0.1p 10 20)
M3 N001 N003 N003 N002 CMOSP l=250n w=1440n ad=0.1728p as=0.1728p pd=1680n ps=1680n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1040 680
WIRE 304 -160 304 -208
WIRE 304 -112 304 -144
WIRE 256 -32 256 -80
WIRE 304 -32 304 -64
WIRE 304 -32 256 -32
WIRE 256 -16 256 -32
WIRE 304 48 304 -32
WIRE 224 144 176 144
WIRE 256 144 224 144
WIRE 304 144 304 112
WIRE 304 192 304 160
WIRE 96 272 96 144
WIRE 256 272 176 272
WIRE 304 272 304 240
WIRE 96 352 96 272
WIRE 304 352 304 288
WIRE 304 352 96 352
WIRE 304 368 304 352
SYMBOL voltage 192 272 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 0.1p 0.1p 10 20)
SYMBOL pmos4 256 -160 R0
SYMATTR InstName M3
SYMATTR Value CMOSP
SYMATTR Value2 l=250n w=1440n ad=0.1728p as=0.1728p pd=1680n ps=1680n
FLAG 304 368 0
FLAG 304 -288 0
FLAG 224 144 A
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX1852.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N001 N002 1
C2 OUT 0 10
V1 IN 0 5
Rload OUT 0 50
XU1 IN OUT N001 N002 0 IN MAX1852 ;pnba IN)OUT)C1+)C1-)GND)_SHDN
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX1852.asy)
.lib MAX1852.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2884 1464
WIRE 2416 1008 2080 1008
WIRE 2576 1008 2416 1008
WIRE 2080 1024 2080 1008
WIRE 2416 1024 2416 1008
WIRE 2272 1088 2208 1088
WIRE 2576 1088 2576 1008
WIRE 2576 1088 2560 1088
WIRE 2080 1120 2080 1104
WIRE 2208 1136 2208 1088
WIRE 2208 1248 2208 1200
WIRE 2272 1248 2208 1248
WIRE 2624 1248 2560 1248
WIRE 2736 1248 2624 1248
WIRE 2624 1264 2624 1248
WIRE 2736 1264 2736 1248
WIRE 2416 1328 2416 1312
WIRE 2624 1360 2624 1328
WIRE 2736 1360 2736 1344
FLAG 2416 1328 0
FLAG 2624 1360 0
FLAG 2080 1120 0
FLAG 2736 1360 0
FLAG 2736 1248 OUT
FLAG 2080 1008 IN
SYMBOL cap 2192 1136 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 2608 1264 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL VOLTAGE 2080 1008 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 2720 1248 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL MAX1852 2416 1168 R0
SYMATTR InstName U1
TEXT 2352 1376 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1defa79519ff_002-non-inverting-amplifier.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP491.asy)
XU1 Vin N002 N001 N003 Vout OP491 ;pnba In+)In-)V+)V-)OUT
R2 N002 0 10k
V3 Vin 0 SINE(0 0.2 50)
V2 N001 0 2.5
R3 Vout N002 10k
V1 N003 0 -2.5
.tran 0 60m 0 1u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -176 208 -176
WIRE 208 -144 208 -176
WIRE 208 -48 208 -64
WIRE 144 32 112 32
WIRE 384 32 224 32
WIRE 272 112 272 -176
WIRE 0 128 -96 128
WIRE 112 128 112 32
WIRE 112 128 80 128
WIRE 240 128 112 128
WIRE 384 144 384 32
WIRE 384 144 304 144
WIRE 448 144 384 144
WIRE 240 160 96 160
WIRE 96 192 96 160
WIRE 96 208 96 192
WIRE 272 240 272 176
WIRE -96 272 -96 128
WIRE 96 320 96 288
WIRE 272 352 272 320
IOPIN 96 192 In
IOPIN 448 144 Out
SYMBOL Opamps\\OP491 272 80 R0
SYMATTR InstName U1
SYMBOL voltage 208 -160 R0
SYMATTR InstName V2
SYMATTR Value 2.5
SYMBOL voltage 272 224 R0
SYMATTR InstName V1
SYMATTR Value -2.5
SYMBOL res 240 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 96 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 0.2 50)
FLAG 272 352 0
FLAG 208 -48 0
FLAG -96 272 0
FLAG 96 192 Vin
FLAG 448 144 Vout
FLAG 96 320 0
TEXT 448 288 Left 2 !.tran 0 60m 0 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\d08513a23b6b_TP1_2.asc
* Generated by LTspice 26.0.1 for Windows.
* .step param r list 1k 2k 5k 10k
* .tran 10
Vin Vin 0 0.5
R3 N001 Vin 1k
Vss 0 Vss 10
R1 Vo N001 100
RL N001 0 5k
Vcc Vcc 0 10
R4 N002 0 100k
R2 Vo N002 10k
XU1 N001 N002 Vcc Vss Vo LM324 ;pnba In+)In-)V+)V-)OUT
.dc Vin -10 10 0.1
.include LM324.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -400 -96 -400 -144
WIRE -224 -96 -224 -160
WIRE 368 -96 144 -96
WIRE 560 -96 368 -96
WIRE 144 -16 144 -96
WIRE 560 -16 560 -96
WIRE 368 0 368 -96
WIRE -400 16 -400 -16
WIRE -400 16 -496 16
WIRE -224 32 -224 -16
WIRE 336 32 288 32
WIRE 448 32 400 32
WIRE -496 48 -496 16
WIRE -400 64 -400 16
WIRE 0 144 -80 144
WIRE 144 144 144 64
WIRE 144 144 80 144
WIRE 352 144 352 64
WIRE 352 144 144 144
WIRE 384 144 384 64
WIRE 560 144 560 64
WIRE 560 144 384 144
WIRE -400 208 -400 144
WIRE 144 208 144 144
WIRE 560 208 560 144
WIRE 144 336 144 288
WIRE 560 336 560 288
IOPIN 368 -96 Out
SYMBOL res 96 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL voltage -400 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vcc
SYMATTR Value 10
SYMBOL res 128 192 R0
SYMATTR InstName RL
SYMATTR Value 5k
SYMBOL voltage -224 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 0.5
SYMBOL res 128 -32 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL OpAmps\\opamp2 432 32 M270
SYMATTR InstName U1
SYMATTR Value LM324
SYMBOL res 544 192 R0
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL voltage -400 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vss
SYMATTR Value 10
SYMBOL res 544 -32 R0
SYMATTR InstName R2
SYMATTR Value 10k
FLAG -496 48 0
FLAG -400 -144 Vcc
FLAG -400 208 Vss
FLAG 448 32 Vcc
FLAG 288 32 Vss
FLAG 144 336 0
FLAG 560 336 0
FLAG -224 32 0
FLAG -224 -160 Vin
FLAG -80 144 Vin
FLAG 368 -96 Vo
TEXT -320 272 Left 2 !.dc Vin -10 10 0.1
TEXT -320 336 Left 2 !.include LM324.txt
TEXT -320 240 Left 2 ;.step param r list 1k 2k 5k 10k
TEXT -320 304 Left 2 ;.tran 10
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1107.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1107.asy)
L1 IN N001 33 Rser=0.02 Rpar=5000
C1 OUT 0 100 Rser=0.02
R1 OUT N003 220K
R2 N003 0 73.5K
V1 IN 0 2.8
XU1 IN IN N001 0 0 N002 N004 N003 LT1107 top=1K bot=1T ;pnba Ilim)Vin)SW1)SW2)GND)AO)SET)FB
D1 N001 OUT MBRS140
Rload OUT 0 25
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m startup
.lib LT1107.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2488 1440
WIRE 1472 912 1296 912
WIRE 1600 912 1472 912
WIRE 1632 912 1600 912
WIRE 1744 912 1712 912
WIRE 1792 912 1744 912
WIRE 1920 912 1856 912
WIRE 2032 912 1920 912
WIRE 2144 912 2032 912
WIRE 1296 928 1296 912
WIRE 2032 928 2032 912
WIRE 2144 928 2144 912
WIRE 1472 960 1472 912
WIRE 1600 960 1600 912
WIRE 1920 960 1920 912
WIRE 1296 1024 1296 1008
WIRE 1392 1024 1376 1024
WIRE 1744 1024 1744 912
WIRE 1744 1024 1680 1024
WIRE 2032 1024 2032 992
WIRE 2144 1024 2144 1008
WIRE 1920 1104 1920 1040
WIRE 1920 1104 1680 1104
WIRE 1920 1120 1920 1104
WIRE 1392 1184 1376 1184
WIRE 1712 1184 1680 1184
WIRE 1920 1216 1920 1200
WIRE 1536 1264 1536 1248
SYMBOL schottky 1792 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL VOLTAGE 1296 912 R0
SYMATTR InstName V1
SYMATTR Value 2.8
SYMBOL IND 1616 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL POWERPRODUCTS\\LT1107 1536 1104 R0
SYMATTR InstName U1
SYMBOL RES 1904 944 R0
SYMATTR InstName R1
SYMATTR Value 220K
SYMBOL RES 2128 912 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL POLCAP 2016 928 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL RES 1904 1104 R0
SYMATTR InstName R2
SYMATTR Value 73.5K
FLAG 1536 1264 0
FLAG 1712 1184 0
FLAG 2032 1024 0
FLAG 1920 1216 0
FLAG 1296 1024 0
FLAG 2144 1024 0
FLAG 2144 912 OUT
FLAG 1296 912 IN
TEXT 1904 1280 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8640-1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N006 0 41.2K
V1 IN 0 24
C2 N001 0 1
L1 N003 OUT 3.3 Rser=10m
C3 N002 N003 .1
C4 OUT 0 47 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
R2 OUT N005 1Meg
R3 N005 0 243K
C5 OUT N005 4.7p
Rload OUT 0 1
C6 IN 0 1
C7 IN 0 1
C1 N004 0 1n
XU1 OUT N001 N002 IN IN 0 IN N003 N006 0 N004 NC_01 NC_02 N005 0 LT8640-1 ;pnba BIAS)INTVCC)BST)VIN1)VIN2)GND1)EN/UV)SW)RT)GND2)TR/SS)SYNC/MODE)PG)FB)GND
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8640-1.asy)
.lib LT8640-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 996 680
WIRE 64 -80 -32 -80
WIRE 256 -80 64 -80
WIRE 432 -80 256 -80
WIRE -32 -64 -32 -80
WIRE 256 -64 256 -80
WIRE 64 0 64 -80
WIRE 112 0 64 0
WIRE 432 0 432 -80
WIRE 432 0 400 0
WIRE 64 16 64 0
WIRE 432 16 432 0
WIRE -32 32 -32 16
WIRE 64 96 64 80
WIRE 112 96 64 96
WIRE 432 96 432 80
WIRE 432 96 400 96
WIRE 64 112 64 96
WIRE 432 112 432 96
WIRE 32 192 16 192
WIRE 112 192 96 192
WIRE 592 192 400 192
WIRE 432 288 400 288
WIRE 432 304 432 288
WIRE 432 384 432 368
WIRE 432 384 400 384
WIRE 480 384 432 384
WIRE 592 384 592 192
WIRE 592 384 560 384
WIRE 704 384 592 384
WIRE 800 384 704 384
WIRE 896 384 800 384
WIRE 592 400 592 384
WIRE 704 400 704 384
WIRE 896 400 896 384
WIRE 800 416 800 384
WIRE 32 480 16 480
WIRE 112 480 96 480
WIRE 592 480 400 480
WIRE 704 480 704 464
WIRE 704 480 592 480
WIRE 592 496 592 480
WIRE 800 496 800 480
WIRE 896 496 896 480
WIRE 208 560 208 544
WIRE 304 560 304 544
WIRE 592 592 592 576
WIRE 208 656 208 640
FLAG 304 560 0
FLAG 208 656 0
FLAG -32 32 0
FLAG 16 192 0
FLAG 800 496 0
FLAG 592 592 0
FLAG 896 496 0
FLAG 896 384 OUT
FLAG -32 -80 IN
FLAG 64 112 0
FLAG 432 112 0
FLAG 16 480 0
SYMBOL res 192 544 R0
SYMATTR InstName R1
SYMATTR Value 41.2K
SYMBOL voltage -32 -80 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 96 208 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL ind 464 400 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=10m
SYMBOL cap 416 304 R0
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL cap 784 416 R0
SYMATTR InstName C4
SYMATTR Value 47
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL res 576 384 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 576 480 R0
SYMATTR InstName R3
SYMATTR Value 243K
SYMBOL cap 688 400 R0
SYMATTR InstName C5
SYMATTR Value 4.7p
SYMBOL res 880 384 R0
SYMATTR InstName Rload
SYMATTR Value 1
SYMBOL cap 48 16 R0
SYMATTR InstName C6
SYMATTR Value 1
SYMBOL cap 416 16 R0
SYMATTR InstName C7
SYMATTR Value 1
SYMBOL cap 96 496 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL LT8640-1 256 240 R0
SYMATTR InstName U1
TEXT 768 600 Left 2 !.tran 2m startup