Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\9287eb02b211_diode2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 1000
V1 N001 0 3
D1 N002 0 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -0.5 0.7 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 144 -16 64 -16
WIRE 288 -16 224 -16
WIRE 64 16 64 -16
WIRE 288 32 288 -16
WIRE 64 128 64 96
WIRE 288 128 288 96
WIRE 288 128 64 128
WIRE 288 176 288 128
SYMBOL diode 272 32 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 240 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL voltage 64 0 R0
WINDOW 123 15 127 Left 2
WINDOW 39 24 124 Left 2
WINDOW 3 15 99 Left 2
SYMATTR Value 3
SYMATTR InstName V1
FLAG 288 176 0
TEXT 64 152 Left 2 !.dc V1 -0.5 0.7 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP150-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
Rload OUT 0 30
XU1 IN 0 IN MP_01 OUT ADP150-x.x T=1.8Meg ;pnba Vin)GND)EN))Vout
C1 OUT 0 1
.tran 500u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP150-3.0.asy)
.lib ADP150-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 880 1696 880
WIRE 1984 880 1824 880
WIRE 1696 896 1696 880
WIRE 1984 896 1984 880
WIRE 1696 992 1696 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
FLAG 2256 1024 OUT
FLAG 2256 1136 0
FLAG 1696 992 0
FLAG 1696 880 IN
FLAG 1984 1168 0
FLAG 2160 1136 0
SYMBOL VOLTAGE 1696 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 30
SYMBOL PowerProducts\\ADP150-3.0 1984 1024 R0
SYMATTR InstName U1
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1
TEXT 2144 1200 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1434.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1434.asy)
V3 N001 0 3.3
R1 SA 0 1K
V5 D 0 SINE(0 10 2k)
R2 SB 0 1K
V4 IN 0 pulse(0 3.3 0 1u 1u 5m 10m)
XU1 IN SA D SB -V 0 +V N001 ADG1434 ;pnba IN)SA)D)SB)Vss)GND)Vdd)EN
V1 +V 0 15
V2 -V 0 -15
.tran 30m
.lib ADG1434.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -752 -368 -800 -368
WIRE -800 -320 -800 -368
WIRE -1184 -256 -1184 -272
WIRE -1056 -256 -1072 -256
WIRE -912 -256 -976 -256
WIRE -896 -256 -912 -256
WIRE -688 -224 -704 -224
WIRE -656 -224 -688 -224
WIRE -544 -224 -576 -224
WIRE -1008 -192 -1072 -192
WIRE -912 -192 -928 -192
WIRE -896 -192 -912 -192
WIRE -1184 -160 -1184 -176
WIRE -1040 -128 -1072 -128
WIRE -896 -128 -1040 -128
WIRE -640 -128 -704 -128
WIRE -640 -112 -640 -128
WIRE -1184 -48 -1184 -64
WIRE -1072 -16 -1072 -128
WIRE -736 0 -736 -16
WIRE -640 0 -640 -32
WIRE -864 16 -864 -16
WIRE -832 16 -864 16
WIRE -1184 48 -1184 32
WIRE -1072 80 -1072 64
SYMBOL voltage -672 -224 R270
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 47 41 VRight 2
WINDOW 3 -46 -22 VRight 2
SYMATTR InstName V5
SYMATTR Value SINE(0 10 2k)
SYMBOL res -912 -176 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -1184 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -1184 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res -960 -240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -1072 -32 R0
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMBOL voltage -640 -128 R0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL ADG1434 -800 -176 R0
SYMATTR InstName U1
FLAG -1184 48 0
FLAG -1184 -160 0
FLAG -1184 -272 +V
FLAG -1184 -64 -V
FLAG -544 -224 0
FLAG -1072 80 0
FLAG -1072 -256 0
FLAG -1072 -192 0
FLAG -752 -368 +V
FLAG -736 0 0
FLAG -832 16 -V
FLAG -640 0 0
FLAG -912 -256 SA
FLAG -912 -192 SB
FLAG -688 -224 D
FLAG -1040 -128 IN
TEXT -656 64 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8628.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8628.asy)
V2 -V 0 -2.5
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
Rload OUT 0 10K
V1 +V 0 2.5
XU1 IN N001 +V -V OUT AD8628 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 10K
.tran 1m
.lib AD8628.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE -16 -1056 -32 -1056
WIRE 80 -1056 64 -1056
WIRE 96 -1056 80 -1056
WIRE 192 -1056 176 -1056
WIRE -256 -944 -256 -960
WIRE -144 -944 -144 -960
WIRE 80 -944 80 -1056
WIRE 96 -944 80 -944
WIRE 192 -928 192 -1056
WIRE 192 -928 160 -928
WIRE 320 -928 192 -928
WIRE 96 -912 -16 -912
WIRE 320 -912 320 -928
WIRE -16 -896 -16 -912
WIRE -256 -848 -256 -864
WIRE -144 -848 -144 -864
WIRE 320 -816 320 -832
WIRE -16 -800 -16 -816
SYMBOL voltage -144 -960 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL voltage -16 -912 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 80 -1072 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -256 -960 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL Opamps\\AD8628 128 -992 R0
SYMATTR InstName U1
SYMBOL res 304 -928 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 192 -1072 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG -256 -960 +V
FLAG -256 -848 0
FLAG -16 -800 0
FLAG 320 -928 OUT
FLAG -16 -912 IN
FLAG 128 -960 +V
FLAG -144 -960 -V
FLAG 128 -896 -V
FLAG -32 -1056 0
FLAG 320 -816 0
FLAG -144 -848 0
TEXT 336 -720 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\47eb607a0c1f_4.1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 0 1K
V1 N001 0 15
D1 N001 N002 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 2 0.02
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 80 16 80
WIRE 368 80 224 80
WIRE 368 128 368 80
WIRE 16 144 16 80
WIRE 16 288 16 224
WIRE 96 288 16 288
WIRE 368 288 368 208
WIRE 368 288 96 288
WIRE 96 320 96 288
SYMBOL res 352 112 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 16 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL diode 160 96 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
FLAG 96 320 0
TEXT 56 184 Left 2 !.dc V1 0 2 0.02
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2139-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2139-1.8.asy)
XU1 IN IN N001 OUT 0 IN ADP2139-x.x Rtop=208K ;pnba Vin)EN)SW)Vout)GND)Mode
V1 IN 0 5
Rload OUT 0 3
C1 OUT 0 10
L1 N001 OUT 1 Rser=60m
.tran .5m startup
.lib ADP2139-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 192 224 192 144
WIRE 208 224 192 224
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 224
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=60m
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 3
SYMBOL ADP2139-1.8 352 224 R0
SYMATTR InstName U1
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
TEXT 600 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\106153839186_URL.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot the quantities V(X1)/V(Y1) and V(X2)/V(Y2) to plot open loop gains.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1014.asy)
V3 Y2 X2 ac 1
V4 Y1 X1 ac 1
V1 +V 0 +15
V2 -V 0 -15
XU1 0 Y2 +V -V X2 LM324/NS ;pnba In+)In-)V+)V-)OUT
XU2 0 Y1 +V -V X1 LT1013 ;pnba In+)In-)V+)V-)OUT
.lib http://www.national.com/models/spice/LM/LM324.MOD
.ac oct 10 1m 100Meg
.lib LT1013.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 240 -112 112
WIRE -80 112 -112 112
WIRE -80 240 -112 240
WIRE -80 272 -96 272
WIRE -48 224 -48 208
WIRE -48 304 -48 288
WIRE 16 112 0 112
WIRE 16 256 -16 256
WIRE 16 256 16 112
WIRE 112 240 112 112
WIRE 144 112 112 112
WIRE 144 240 112 240
WIRE 144 272 128 272
WIRE 176 224 176 208
WIRE 176 304 176 288
WIRE 240 112 224 112
WIRE 240 256 208 256
WIRE 240 256 240 112
WIRE 400 160 400 144
WIRE 400 256 400 240
WIRE 512 160 512 144
WIRE 512 256 512 240
SYMBOL voltage 400 144 R0
SYMATTR InstName V1
SYMATTR Value +15
SYMBOL voltage -96 112 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 VBottom 0
SYMATTR InstName V4
SYMATTR Value ac 1
SYMBOL voltage 128 112 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 VBottom 0
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL voltage 512 144 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL opamps\\opamp2 176 192 R0
SYMATTR InstName U1
SYMATTR Value LM324/NS
SYMBOL opamps\\LT1014 -48 192 R0
SYMATTR InstName U2
FLAG 176 208 +V
FLAG 176 304 -V
FLAG 512 256 0
FLAG 400 256 0
FLAG 400 144 +V
FLAG 512 144 -V
FLAG 128 272 0
FLAG 240 112 X2
FLAG 112 112 Y2
FLAG -48 208 +V
FLAG -48 304 -V
FLAG -96 272 0
FLAG 16 112 X1
FLAG -112 112 Y1
TEXT -168 400 Left 0 !.lib http://www.national.com/models/spice/LM/LM324.MOD
TEXT -168 368 Left 0 !.ac oct 10 1m 100Meg
TEXT -184 16 Left 0 ;Plot the quantities V(X1)/V(Y1) and V(X2)/V(Y2) to plot open loop gains.
* Z:\home\khalils\Downloads\files\data\raw_asc\39179e14db7a_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 VDD_2 VDD_2 VDD 0 OUT TLV354 ;pnba In+)In-)V+)V-)OUT
VDD2 VDD_2 0 1.65
VDD1 VDD 0 3.3
.ac dec 1000 0.01 100
.lib TLV354.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 64 -64 16
WIRE 48 64 48 16
WIRE 448 112 400 112
SYMBOL voltage -64 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD1
SYMATTR Value 3.3
SYMBOL voltage 48 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD2
SYMATTR Value 1.65
SYMBOL Opamps\\opamp2 368 48 R0
SYMATTR InstName U1
SYMATTR Value TLV354
FLAG -64 144 0
FLAG -64 16 VDD
FLAG 48 144 0
FLAG 48 16 VDD_2
FLAG 368 80 VDD
FLAG 336 96 VDD_2
FLAG 336 128 VDD_2
FLAG 368 144 0
FLAG 448 112 OUT
TEXT 264 216 Left 2 !.ac dec 1000 0.01 100
TEXT 264 248 Left 2 !.lib TLV354.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\6a32da8cafed_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
Q2 0 N002 N004 0 2N3906
R1 N002 N003 330
Vgen1 N003 0 PULSE(0 3.3 0 1n 1n 17.81n 35.62n)
Q1 N001 N002 N004 0 2n3904
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 -32 352 -176
WIRE 288 16 176 16
WIRE 352 176 352 64
WIRE -80 128 -128 128
WIRE 176 128 176 16
WIRE 176 128 0 128
WIRE -128 224 -128 128
WIRE 176 224 176 128
WIRE 288 224 176 224
WIRE -128 352 -128 304
SYMBOL pnp 288 272 M180
SYMATTR InstName Q2
SYMATTR Value 2N3906
SYMBOL voltage -128 208 R0
WINDOW 123 24 132 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName Vgen1
SYMATTR Value PULSE(0 3.3 0 1n 1n 17.81n 35.62n)
SYMBOL npn 288 -32 R0
SYMATTR InstName Q1
SYMATTR Value 2n3904
SYMBOL res 16 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 330
FLAG -128 352 0
FLAG 352 272 0
* Z:\home\khalils\Downloads\files\data\raw_asc\0991ee154d62_dff2.asc
* Generated by LTspice 26.0.1 for Windows.
A1 D 0 CLK 0 0 Qi Q 0 DFLOP vhigh=5 tau=100p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 128 96 128
WIRE 320 128 288 128
WIRE 128 176 96 176
WIRE 320 176 304 176
FLAG 96 128 D
IOPIN 96 128 In
FLAG 96 176 CLK
IOPIN 96 176 In
FLAG 320 128 Q
IOPIN 320 128 Out
FLAG 320 176 Qi
IOPIN 320 176 Out
SYMBOL Digital\\dflop 208 80 R0
SYMATTR InstName A1
SYMATTR SpiceLine vhigh=5 tau=100p
* Z:\home\khalils\Downloads\files\data\raw_asc\1a1901a8cf10_StageB_LowPassSallenKey_LT1490A.asc
* Generated by LTspice 26.0.1 for Windows.
* This subcircuit is not simulatable. \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1490A.asy)
R2 P001 N001 6.8k
C2 N002 REF 10n
C1 OUT N001 22n
XU1 N002 OUT V+ V- OUT LT1490A ;pnba In+)In-)V+)V-)OUT
R1 N001 IN 3.9k
R3 N002 P001 520
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 4112 860
WIRE 512 -128 240 -128
WIRE 320 112 320 -32
WIRE 240 128 240 -128
WIRE 288 128 288 112
WIRE 288 128 240 128
WIRE 304 128 288 128
WIRE 512 144 512 -128
WIRE 512 144 352 144
WIRE -160 160 -176 160
WIRE -128 160 -160 160
WIRE -16 160 -48 160
WIRE 16 160 -16 160
WIRE 240 160 176 160
WIRE 288 160 240 160
WIRE 304 160 288 160
WIRE 512 160 512 144
WIRE 576 160 512 160
WIRE 608 160 576 160
WIRE 288 176 288 160
WIRE 240 192 240 160
WIRE 240 272 240 256
WIRE 320 336 320 176
WIRE -16 400 -16 160
WIRE 176 400 -16 400
WIRE 512 400 512 160
WIRE 512 400 240 400
SYMBOL res -32 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3.9k
SYMBOL Opamps\\LT1490A 320 80 R0
SYMATTR InstName U1
SYMBOL cap 240 384 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL res 192 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 520
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 6.8k
SYMBOL cap 224 192 R0
SYMATTR InstName C2
SYMATTR Value 10n
FLAG 320 -32 V+
FLAG 320 336 V-
FLAG 576 160 OUT
FLAG -160 160 IN
FLAG 240 272 REF
TEXT -176 504 Left 4 ;This subcircuit is not simulatable.  \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC699.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1086-5.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC699.asy)
XU1 0 N001 IN LT1086-5 ;pnba ADJ)OUT)IN
C1 N001 0 22
R1 N001 OUT 10K
XU2 NC_01 N001 0 NC_02 NC_03 N002 OUT NC_04 LTC699 ;pnba Vcc)Vcc)GND)GND)NC)WDI)_Reset)GND
V2 N003 0 PULSE(0 2 0.4 1u 1u 20m 40m) Rser=0.1
V1 N002 N003 PULSE(0 2 0 1u 1u 20m 40m 6) Rser=0.1
V3 IN 0 PWL(0 0 200u 9) Rser=10m
.tran 0.7
.lib LT1083.lib
.lib LTC699.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1152 680
WIRE 320 -112 -336 -112
WIRE 320 -64 320 -112
WIRE -640 32 -896 32
WIRE -336 32 -336 -112
WIRE -336 32 -384 32
WIRE -240 32 -336 32
WIRE 192 32 112 32
WIRE 320 32 320 16
WIRE 320 32 192 32
WIRE -896 48 -896 32
WIRE -336 48 -336 32
WIRE -240 128 -256 128
WIRE 272 128 112 128
WIRE 640 128 352 128
WIRE 752 128 720 128
WIRE -896 144 -896 128
WIRE -336 144 -336 112
WIRE -512 160 -512 128
SYMBOL LTC699 -64 96 R0
SYMATTR InstName U2
SYMBOL PowerProducts\\LT1086-5 -512 32 R0
SYMATTR InstName U1
SYMBOL cap -352 48 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 304 -80 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL VOLTAGE -896 32 R0
WINDOW 123 24 117 Left 2
SYMATTR Value PWL(0 0 200u 9)
SYMATTR InstName V3
SYMATTR SpiceLine Rser=10m
SYMBOL VOLTAGE 256 128 R270
WINDOW 123 -53 56 VBottom 2
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 2 0 1u 1u 20m 40m 6)
SYMATTR SpiceLine Rser=0.1
SYMBOL VOLTAGE 624 128 R270
WINDOW 123 -53 56 VBottom 2
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 0.4 1u 1u 20m 40m)
SYMATTR SpiceLine Rser=0.1
FLAG -256 128 0
FLAG -896 144 0
FLAG -336 144 0
FLAG -512 160 0
FLAG -896 32 IN
FLAG 752 128 0
FLAG 192 32 OUT
TEXT 464 240 Left 2 !.tran 0.7
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1504-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1504-3.3.asy)
R2 N005 N004 5K
V1 IN 0 5
L1 N003 OUT 50
XU1 N001 IN N003 0 OUT N002 N006 N005 LTC1504 top=20.4K bot=12.6K ;pnba Imax)Vcc)SW)GND)Sense)_SHND)SS)COMP
C3 N004 0 5000p
C2 N006 0 .01
C1 OUT 0 100 Rser=.1
Rload OUT 0 50
R1 IN N001 47K
.tran 5m startup
.lib LTC1504.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2224 1840
WIRE 1328 1264 1152 1264
WIRE 1392 1264 1328 1264
WIRE 1520 1264 1472 1264
WIRE 1152 1280 1152 1264
WIRE 1328 1328 1328 1264
WIRE 1520 1328 1520 1264
WIRE 1152 1376 1152 1360
WIRE 1264 1424 1232 1424
WIRE 1616 1424 1584 1424
WIRE 1728 1424 1696 1424
WIRE 1824 1424 1728 1424
WIRE 1824 1440 1824 1424
WIRE 1168 1520 1136 1520
WIRE 1264 1520 1248 1520
WIRE 1728 1520 1728 1424
WIRE 1728 1520 1584 1520
WIRE 1136 1536 1136 1520
WIRE 1728 1536 1728 1520
WIRE 1824 1536 1824 1520
WIRE 1136 1616 1136 1600
WIRE 1728 1616 1728 1600
WIRE 1312 1632 1312 1616
WIRE 1536 1632 1536 1616
WIRE 1312 1712 1312 1696
SYMBOL res 1808 1424 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL cap 1296 1632 R0
WINDOW 3 24 57 Left 2
SYMATTR Value .01
SYMATTR InstName C2
SYMBOL res 1264 1504 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL VOLTAGE 1152 1264 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL polcap 1712 1536 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=.1
SYMBOL cap 1120 1536 R0
SYMATTR InstName C3
SYMATTR Value 5000p
SYMBOL res 1376 1280 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 47K
SYMBOL ind 1600 1440 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 50
SYMBOL PowerProducts\\LTC1504-3.3 1424 1472 R0
SYMATTR InstName U1
FLAG 1152 1376 0
FLAG 1536 1632 0
FLAG 1312 1712 0
FLAG 1728 1616 0
FLAG 1136 1616 0
FLAG 1824 1536 0
FLAG 1824 1424 OUT
FLAG 1152 1264 IN
TEXT 1528 1688 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\c742b3108363_NOR3.asc
* Generated by LTspice 26.0.1 for Windows.
M2 Out In2 Vss Vss N_2u l=2u w=6.5u
M5 n2 In2 n1 n1 P_2u l=2u w=72u
M3 Out In1 Vss Vss N_2u l=2u w=6.5u
M6 Out In3 n2 n2 P_2u l=2u w=72u
M1 Out In3 Vss Vss N_2u l=2u w=6.5u
M4 n1 In1 Vdd Vdd P_2u l=2u w=72u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include "../MOSFET models/2um_CMOS.modlib"
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 872
WIRE 192 -192 192 -224
WIRE 208 -192 192 -192
WIRE -320 -176 -368 -176
WIRE 144 -176 -320 -176
WIRE 208 -144 208 -192
WIRE 208 -144 192 -144
WIRE 192 -80 192 -96
WIRE 272 -80 192 -80
WIRE 192 -64 192 -80
WIRE 208 -64 192 -64
WIRE -96 -48 -368 -48
WIRE 144 -48 -96 -48
WIRE 208 -16 208 -64
WIRE 208 -16 192 -16
WIRE 192 48 192 32
WIRE 272 48 192 48
WIRE 192 64 192 48
WIRE 208 64 192 64
WIRE 128 80 -368 80
WIRE 144 80 128 80
WIRE 208 112 208 64
WIRE 208 112 192 112
WIRE -32 176 -256 176
WIRE 192 176 192 160
WIRE 192 176 -32 176
WIRE 368 176 192 176
WIRE -256 192 -256 176
WIRE -32 192 -32 176
WIRE 192 192 192 176
WIRE -240 240 -256 240
WIRE -16 240 -32 240
WIRE 208 240 192 240
WIRE -320 272 -320 -176
WIRE -304 272 -320 272
WIRE -96 272 -96 -48
WIRE -80 272 -96 272
WIRE 128 272 128 80
WIRE 144 272 128 272
WIRE -240 288 -240 240
WIRE -240 288 -256 288
WIRE -16 288 -16 240
WIRE -16 288 -32 288
WIRE 208 288 208 240
WIRE 208 288 192 288
WIRE -256 304 -256 288
WIRE -32 304 -32 288
WIRE -32 304 -256 304
WIRE 192 304 192 288
WIRE 192 304 -32 304
WIRE 192 336 192 304
IOPIN 192 -224 In
IOPIN 192 336 In
IOPIN -368 -176 In
IOPIN -368 -48 In
IOPIN 368 176 Out
IOPIN -368 80 In
SYMBOL nmos4 -80 192 R0
WINDOW 0 78 81 Left 2
WINDOW 3 76 25 Left 2
WINDOW 123 78 53 Left 2
SYMATTR InstName M2
SYMATTR Value N_2u
SYMATTR Value2 l=2u w=6.5u
SYMBOL pmos4 144 -96 M180
WINDOW 0 75 15 Left 2
WINDOW 3 73 70 Left 2
WINDOW 123 75 43 Left 2
SYMATTR InstName M4
SYMATTR Value P_2u
SYMATTR Value2 l=2u w=72u
SYMBOL pmos4 144 160 M180
WINDOW 0 75 15 Left 2
WINDOW 3 73 70 Left 2
WINDOW 123 75 43 Left 2
SYMATTR InstName M6
SYMATTR Value P_2u
SYMATTR Value2 l=2u w=72u
SYMBOL nmos4 144 192 R0
WINDOW 0 78 81 Left 2
WINDOW 3 76 25 Left 2
WINDOW 123 78 53 Left 2
SYMATTR InstName M1
SYMATTR Value N_2u
SYMATTR Value2 l=2u w=6.5u
SYMBOL nmos4 -304 192 R0
WINDOW 0 78 81 Left 2
WINDOW 3 76 25 Left 2
WINDOW 123 78 53 Left 2
SYMATTR InstName M3
SYMATTR Value N_2u
SYMATTR Value2 l=2u w=6.5u
SYMBOL pmos4 144 32 M180
WINDOW 0 75 15 Left 2
WINDOW 3 73 70 Left 2
WINDOW 123 75 43 Left 2
SYMATTR InstName M5
SYMATTR Value P_2u
SYMATTR Value2 l=2u w=72u
FLAG 192 -224 Vdd
FLAG 192 336 Vss
FLAG -368 -176 In1
FLAG -368 -48 In2
FLAG 368 176 Out
FLAG -368 80 In3
FLAG 272 -80 n1
FLAG 272 48 n2
TEXT -312 424 Left 2 !.include "../MOSFET models/2um_CMOS.modlib"
* Z:\home\khalils\Downloads\files\data\raw_asc\2c75be78e3d9_Fig_2-63_BI_BI2.asc
* Generated by LTspice 26.0.1 for Windows.
B2 V-B2 0 I=V(Cont)/10K
B1 0 V-B1 I=V(Cont)/1K
R1 V-B1 0 10K
V1 Cont 0 SINE(0 1 1K)
R2 V-B2 0 100K
.tran 5m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 96 256 64
WIRE 256 96 160 96
WIRE 352 96 256 96
WIRE 160 128 160 96
WIRE 352 128 352 96
WIRE -112 208 -112 176
WIRE 160 256 160 208
WIRE 352 256 352 208
WIRE 160 272 160 256
WIRE 352 272 352 256
WIRE -112 320 -112 288
WIRE 160 384 160 352
WIRE 256 384 160 384
WIRE 352 384 352 352
WIRE 352 384 256 384
WIRE 256 400 256 384
SYMBOL res 336 256 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL bi 160 128 R0
SYMATTR InstName B1
SYMATTR Value I=V(Cont)/1K
SYMBOL voltage -112 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1K)
SYMBOL bi2 352 128 R0
SYMATTR InstName B2
SYMATTR Value I=V(Cont)/10K
SYMBOL res 144 256 R0
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 256 400 0
FLAG -112 320 0
FLAG -112 176 Cont
FLAG 256 64 0
FLAG 160 256 V-B1
FLAG 352 256 V-B2
TEXT -136 368 Left 2 !.tran 5m
* Z:\tmp\asc_dec_bjh7r6w2\0aada4c224ff_As50Critic_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
Cbp N002 0 10n
Ct Ramp 0 1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -176 352 -176 112
WIRE -176 416 -176 352
WIRE -176 528 -176 496
WIRE -176 544 -176 528
WIRE -144 400 -144 224
WIRE -128 528 -176 528
WIRE -128 528 -128 160
WIRE -112 288 -208 288
WIRE -112 352 -176 352
WIRE -16 432 -16 384
WIRE -16 528 -128 528
WIRE -16 528 -16 496
WIRE 128 352 112 352
WIRE 128 384 -16 384
WIRE 128 384 128 352
WIRE 288 288 112 288
WIRE 288 288 288 224
WIRE 288 400 -144 400
WIRE 288 400 288 288
WIRE 288 432 288 400
WIRE 288 528 -16 528
WIRE 288 528 288 496
WIRE 336 288 288 288
SYMBOL cap -32 432 R0
SYMATTR InstName Cbp
SYMATTR Value 10n
SYMBOL cap 272 432 R0
SYMATTR InstName Ct
SYMATTR Value 1n
FLAG -176 544 0
FLAG -208 288 Sqr
FLAG 336 288 Ramp