Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP124-2.7.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP124-2.7.asy)
Rload OUT 0 100
C1 IN 0 1
V1 IN 0 5.5
C2 OUT 0 1
XU1 OUT MP_01 OUT 0 IN MP_02 MP_03 IN ADP124 K=45454.5 ;pnba Vout))Sense)GND)En)))Vin
.tran 10m startup
.lib ADP124.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 384 96 352 96
WIRE 432 96 384 96
WIRE 512 96 432 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 432 112 432 96
WIRE 512 112 512 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 384 208 384 96
WIRE 384 208 352 208
WIRE 432 208 432 176
WIRE 512 208 512 192
WIRE 256 272 256 256
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL ADP124-2.7 256 208 R0
SYMATTR InstName U1
SYMBOL cap 416 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 0 208 0
FLAG 256 272 0
FLAG 432 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1765-1.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1765-1.0.asy)
C2 N003 0 10n
V1 IN 0 1.3
C3 N002 0 1
R1 OUT 0 .5
C4 OUT 0 22
C1 N004 0 1
R2 N001 IN 50K
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1765-1.0 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
.tran 2m startup
.lib ADP1765-1.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.3
SYMBOL ADP1765-1.0 224 176 R0
SYMATTR InstName U1
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value .5
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\28bd21a12c42_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 SINE(0 5 500000)
C1 V 0 9.08n
R1 V N001 3506
.tran 30u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 80 16 80
WIRE 224 80 144 80
WIRE 352 80 224 80
WIRE 16 96 16 80
WIRE 224 96 224 80
WIRE 16 192 16 176
WIRE 224 192 224 160
WIRE 224 192 16 192
WIRE 352 192 224 192
WIRE 224 208 224 192
SYMBOL cap 208 96 R0
SYMATTR InstName C1
SYMATTR Value 9.08n
SYMBOL voltage 16 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 500000)
SYMBOL res 160 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3506
FLAG 224 208 0
FLAG 224 80 V
TEXT -32 216 Left 2 !.tran 30u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1316.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 2
R2 N002 0 324K
R1 OUT N002 1Meg
R3 N005 0 5K
L1 IN N001 47 Rser=0.02 Rpar=5000
D1 N001 OUT MBRS140
C2 OUT 0 47 Rser=0.02
Rload OUT 0 100
XU1 N004 N003 N005 0 N001 IN IN N002 LT1316 ;pnba LBO)LBI)Rset)GND)SW)Vin)_SHDN)FB
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1316.asy)
.lib LT1316.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1508 1024
WIRE 512 448 400 448
WIRE 624 448 512 448
WIRE 672 448 624 448
WIRE 784 448 752 448
WIRE 864 448 784 448
WIRE 1008 448 928 448
WIRE 1136 448 1008 448
WIRE 1248 448 1136 448
WIRE 400 464 400 448
WIRE 1136 464 1136 448
WIRE 1248 464 1248 448
WIRE 1008 480 1008 448
WIRE 624 512 624 448
WIRE 784 512 784 448
WIRE 400 560 400 544
WIRE 1136 560 1136 528
WIRE 1248 560 1248 544
WIRE 512 608 512 448
WIRE 544 608 512 608
WIRE 1008 608 1008 560
WIRE 1008 608 864 608
WIRE 1008 624 1008 608
WIRE 544 704 528 704
WIRE 880 704 864 704
WIRE 1008 720 1008 704
WIRE 624 816 624 800
WIRE 784 816 784 800
WIRE 624 912 624 896
FLAG 1248 448 OUT
FLAG 400 560 0
FLAG 1008 720 0
FLAG 1136 560 0
FLAG 1248 560 0
FLAG 624 912 0
FLAG 784 816 0
FLAG 400 448 IN
SYMBOL VOLTAGE 400 448 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL RES 992 608 R0
SYMATTR InstName R2
SYMATTR Value 324K
SYMBOL RES 992 464 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL RES 608 800 R0
SYMATTR InstName R3
SYMATTR Value 5K
SYMBOL IND 656 464 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 47
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL SCHOTTKY 864 464 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL POLCAP 1120 464 R0
SYMATTR InstName C2
SYMATTR Value 47
SYMATTR SpiceLine Rser=0.02
SYMBOL RES 1232 448 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL PowerProducts\\LT1316 704 656 R0
SYMATTR InstName U1
TEXT 960 784 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\a9087e894228_highpass2.asc
* Generated by LTspice 26.0.1 for Windows.
;tran 1
V1 N001 0 0 AC 1
C1 N001 P001 0.001micro
R1 P001 0 5k
.ac dec 100 10 1meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 64 80 64
WIRE 80 144 80 64
WIRE 80 256 80 224
WIRE 256 256 256 208
SYMBOL res 240 112 R0
WINDOW 0 58 40 Right 1
WINDOW 3 36 76 Left 1
SYMATTR InstName R1
SYMATTR Value 5k
SYMBOL voltage 80 128 R0
WINDOW 3 14 105 Invisible 2
WINDOW 123 14 133 Left 1
WINDOW 39 0 0 Left 0
WINDOW 0 24 16 Left 0
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL cap 240 64 R0
WINDOW 0 24 8 Left 1
WINDOW 3 127 40 Right 1
SYMATTR InstName C1
SYMATTR Value 0.001micro
FLAG 80 256 0
FLAG 256 256 0
TEXT 48 280 Left 2 !;tran 1
TEXT 64 -8 Left 2 !.ac dec 100 10 1meg
* Z:\home\khalils\Downloads\files\data\raw_asc\551a7cb94ec1_exp2.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc V1 0 1.8 0.01
V1 vin 0 PULSE(0 1.8 1n 1n 1n 20n 40n) Rser=0
V2 N001 0 1.8 Rser=0
M1 vout vin N001 N001 PMOS
M2 vout vin 0 0 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 100n 0 10n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 784 -240 512 -240
WIRE 512 -208 512 -240
WIRE 784 -208 784 -240
WIRE 464 -192 304 -192
WIRE 512 -32 512 -112
WIRE 528 -32 512 -32
WIRE 144 0 -32 0
WIRE 304 0 304 -192
WIRE 304 0 144 0
WIRE 528 48 528 -32
WIRE 144 128 144 0
WIRE 528 128 528 48
WIRE 304 208 304 0
WIRE 480 208 304 208
SYMBOL nmos 480 128 R0
SYMATTR InstName M2
SYMBOL pmos 464 -112 M180
SYMATTR InstName M1
SYMBOL voltage 144 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1.8 1n 1n 1n 20n 40n)
SYMBOL voltage 784 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 2
SYMATTR SpiceLine Rser=0
SYMATTR InstName V2
SYMATTR Value 1.8
FLAG 784 -128 0
FLAG 528 48 vout
FLAG -32 0 vin
FLAG 144 208 0
FLAG 528 224 0
TEXT 72 336 Left 2 ;.dc V1 0 1.8 0.01
TEXT 440 312 Left 2 !.tran 0 100n 0 10n
* Z:\home\khalils\Downloads\files\data\raw_asc\144448407811_VoltageDivider01.asc
* Generated by LTspice 26.0.1 for Windows.
* Two 1K Resistors
* Evenly divided
* 1k and 2k Resistors\n1k has 4V across
* 2k and 1k Resistors\n2k has 2V across
;op 1
;op1 1
V1 N001 0 6
R6 N006 0 1k
R1 N001 N004 1k
R5 N003 N006 2k
R3 N002 N005 1k
V2 N002 0 6
R4 N005 0 2k
V3 N003 0 6
R2 N004 0 1k
.op 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1384 680
WIRE 432 -1104 192 -1104
WIRE 912 -1104 672 -1104
WIRE 1328 -1104 1088 -1104
WIRE 432 -1072 432 -1104
WIRE 912 -1072 912 -1104
WIRE 1328 -1072 1328 -1104
WIRE 192 -1008 192 -1104
WIRE 672 -1008 672 -1104
WIRE 1088 -1008 1088 -1104
WIRE 432 -928 432 -992
WIRE 912 -928 912 -992
WIRE 1328 -928 1328 -992
WIRE 192 -848 192 -928
WIRE 432 -848 192 -848
WIRE 672 -848 672 -928
WIRE 912 -848 672 -848
WIRE 1088 -848 1088 -928
WIRE 1328 -848 1088 -848
WIRE 192 -816 192 -848
WIRE 672 -816 672 -848
WIRE 1088 -816 1088 -848
DATAFLAG 432 -960 ""
DATAFLAG 304 -1104 ""
DATAFLAG 912 -960 ""
DATAFLAG 784 -1104 ""
DATAFLAG 1328 -960 ""
DATAFLAG 1200 -1104 ""
SYMBOL res 1312 -944 R0
SYMATTR InstName R6
SYMATTR Value 1k
SYMBOL res 1312 -1088 R0
SYMATTR InstName R5
SYMATTR Value 2k
SYMBOL res 896 -944 R0
SYMATTR InstName R4
SYMATTR Value 2k
SYMBOL voltage 672 -1024 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 2
SYMATTR InstName V2
SYMATTR Value 6
SYMBOL voltage 1088 -1024 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 2
SYMATTR InstName V3
SYMATTR Value 6
SYMBOL res 416 -944 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 416 -1088 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 896 -1088 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL voltage 192 -1024 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 2
SYMATTR InstName V1
SYMATTR Value 6
FLAG 192 -816 0
FLAG 672 -816 0
FLAG 1088 -816 0
TEXT 160 -792 Left 2 !.op 1
TEXT 640 -792 Left 2 !;op 1
TEXT 1056 -792 Left 2 !;op1 1
TEXT 216 -1216 Left 2 ;Two 1K Resistors
TEXT 224 -1184 Left 2 ;Evenly divided
TEXT 704 -1224 Left 2 ;1k and 2k Resistors\n1k has 4V across
TEXT 1120 -1224 Left 2 ;2k and 1k Resistors\n2k has 2V across
* Z:\home\khalils\Downloads\files\data\raw_asc\379cf5e30080_CR_OpAmp_Oscillator.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N002 0 5
R1 N002 N003 10k
R2 N003 0 10k
C1 N001 0 1500p
R3 output N001 75k
R4 output N003 10k
XU2 N003 N001 N002 0 output LT1001 ;pnba In+)In-)V+)V-)OUT
.tran 0 3 0 0.00001
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -96 80 -96
WIRE 352 -96 224 -96
WIRE -64 -32 -368 -32
WIRE 208 -32 -64 -32
WIRE -64 32 -64 -32
WIRE -368 48 -368 -32
WIRE 208 80 208 -32
WIRE 80 96 80 -96
WIRE 176 96 80 96
WIRE 352 112 352 -96
WIRE 352 112 240 112
WIRE 512 112 352 112
WIRE -64 128 -64 112
WIRE 144 128 -64 128
WIRE 176 128 144 128
WIRE -64 176 -64 128
WIRE 80 176 80 96
WIRE 208 176 208 144
WIRE -368 192 -368 128
WIRE 144 256 144 128
WIRE 256 256 144 256
WIRE 352 256 352 112
WIRE 352 256 336 256
WIRE -64 288 -64 256
WIRE 80 288 80 240
FLAG -368 192 0
FLAG 208 176 0
FLAG 80 288 0
FLAG -64 288 0
FLAG 512 112 output
SYMBOL voltage -368 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -80 16 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res -80 160 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL cap 64 176 R0
SYMATTR InstName C1
SYMATTR Value 1500p
SYMBOL res 240 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 75k
SYMBOL res 352 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL OpAmps\\OP07 208 48 R0
SYMATTR InstName U2
TEXT -400 312 Left 2 !.tran 0 3 0 0.00001
* Z:\home\khalils\Downloads\files\data\raw_asc\09e8f9449713_dimanor.asc
* Generated by LTspice 26.0.1 for Windows.
M2 VDD VIN1 N001 VDD PMOS l=90n w=400n
M6 N001 VIN2 VOUT N001 PMOS l=90n w=400n
M5 VOUT VIN2 0 0 NMOS l=90n w=200n
M1 VOUT VIN1 0 0 NMOS l=90n w=200n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 464 64 464 32
WIRE 496 64 464 64
WIRE 496 112 496 64
WIRE 496 112 464 112
WIRE 464 208 464 160
WIRE 512 208 464 208
WIRE 512 256 512 208
WIRE 512 256 464 256
WIRE 464 320 464 304
WIRE 464 320 416 320
WIRE 672 320 464 320
WIRE 704 320 672 320
WIRE 448 368 416 368
WIRE 720 368 672 368
WIRE 368 400 336 400
WIRE 624 400 608 400
WIRE 416 432 416 416
WIRE 448 432 448 368
WIRE 448 432 416 432
WIRE 672 432 672 416
WIRE 672 432 448 432
WIRE 720 432 720 368
WIRE 720 432 672 432
IOPIN 416 144 In
IOPIN 416 288 In
IOPIN 608 400 In
IOPIN 336 400 In
IOPIN 464 32 In
IOPIN 704 320 Out
SYMBOL pmos4 416 208 R0
SYMATTR InstName M6
SYMATTR Value2 l=90n w=400n
SYMBOL pmos4 416 64 R0
SYMATTR InstName M2
SYMATTR Value2 l=90n w=400n
SYMBOL nmos4 368 320 R0
SYMATTR InstName M5
SYMATTR Value2 l=90n w=200n
SYMBOL nmos4 624 320 R0
SYMATTR InstName M1
SYMATTR Value2 l=90n w=200n
FLAG 416 144 VIN1
FLAG 416 288 VIN2
FLAG 608 400 VIN1
FLAG 336 400 VIN2
FLAG 416 432 0
FLAG 464 32 VDD
FLAG 704 320 VOUT
* Z:\home\khalils\Downloads\files\data\raw_asc\011ec511b5a0_VL-P-N1.asc
* Generated by LTspice 26.0.1 for Windows.
D2 b 0 CDZV10B
R1 b a 200
V1 a 0 PWL REPEAT FOREVER (0 -20 .5 0 1 -20) ENDREPEAT
R2 0 b 2000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3
.lib cdzv10b.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 112 -64 112
WIRE 256 112 128 112
WIRE 336 112 256 112
WIRE 352 112 336 112
WIRE -64 160 -64 112
WIRE 256 160 256 112
WIRE 352 160 352 112
WIRE -64 304 -64 240
WIRE 48 304 -64 304
WIRE 256 304 256 224
WIRE 256 304 48 304
WIRE 352 304 352 240
WIRE 352 304 256 304
WIRE 48 320 48 304
SYMBOL Misc\\EuropeanResistor 368 256 R180
WINDOW 0 -42 76 Left 2
WINDOW 3 -64 52 Left 2
SYMATTR InstName R2
SYMATTR Value 2000
SYMBOL zener 240 160 R0
WINDOW 0 40 29 Left 2
WINDOW 3 -38 166 Left 2
SYMATTR InstName D2
SYMATTR Value CDZV10B
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage -64 144 R0
WINDOW 3 -109 234 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PWL REPEAT FOREVER (0 -20 .5 0 1 -20) ENDREPEAT
SYMATTR InstName V1
SYMBOL Misc\\EuropeanResistor 144 96 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200
FLAG -64 112 a
FLAG 336 112 b
FLAG 48 320 0
TEXT -176 408 Left 2 !.tran 3
TEXT -176 448 Left 2 !.lib cdzv10b.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\2eaa6026e19b_1328.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1328.asy)
XU1 N001 N003 N004 0 N005 +V 0 N002 LT1328 ;pnba IN)FILT)FILT_SW)GND)DATA)VCC)MODE)Vbias
I1 N001 0 PULSE(7u 100u 0 10n 10n .5u 1u)
C1 N003 N004 10n Rser=.1
C3 0 N002 1000p
V1 +V 0 5
C2 N003 0 330p Rser=.1
.tran 10u
.lib LT1328.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -528 -144 -624 -144
WIRE -208 -144 -448 -144
WIRE 64 -144 48 -144
WIRE 144 -144 128 -144
WIRE -272 -80 -352 -80
WIRE -208 -80 -272 -80
WIRE 80 -80 48 -80
WIRE -352 -64 -352 -80
WIRE -208 -16 -272 -16
WIRE 80 -16 48 -16
WIRE -528 0 -528 -16
WIRE -352 16 -352 0
WIRE -208 48 -240 48
WIRE 80 48 48 48
WIRE -528 96 -528 80
SYMBOL current -448 -144 R90
WINDOW 0 -32 40 VBottom 2
WINDOW 3 32 40 VTop 2
WINDOW 123 32 40 VTop 2
WINDOW 39 32 40 VTop 2
SYMATTR InstName I1
SYMATTR Value PULSE(7u 100u 0 10n 10n .5u 1u)
SYMBOL cap -288 -80 R0
WINDOW 0 27 13 Left 2
WINDOW 3 29 51 Left 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMATTR SpiceLine Rser=.1
SYMBOL cap -368 -64 R0
WINDOW 0 27 13 Left 2
WINDOW 3 29 51 Left 2
SYMATTR InstName C2
SYMATTR Value 330p
SYMATTR SpiceLine Rser=.1
SYMBOL cap 128 -160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1000p
SYMBOL voltage -528 -16 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL opamps\\LT1328 -80 -48 R0
SYMATTR InstName U1
FLAG -528 96 0
FLAG -528 -16 +V
FLAG -240 48 0
FLAG 80 -16 +V
FLAG -624 -144 0
FLAG -352 16 0
FLAG 144 -144 0
FLAG 80 -80 0
TEXT 80 88 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\0a6645ea7a5a_1843.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1843.asy)
R2 N001 N004 10K
R1 N001 N003 10K
V2 N002 0 PULSE(0 3.3 0 .5m .5m 0 1m)
V1 N001 0 5
XU1 N004 0 N002 N002 N006 N005 N001 N003 LTC1843 ;pnba OUTA)GND)INA+)INB-)Hyst)Ref)Vcc)OUTB
.tran 3m
.lib LTC1843.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1264 800
WIRE 928 64 736 64
WIRE 1040 64 928 64
WIRE 1136 64 1040 64
WIRE 736 80 736 64
WIRE 1040 80 1040 64
WIRE 1136 80 1136 64
WIRE 928 112 928 64
WIRE 848 160 816 160
WIRE 736 176 736 160
WIRE 1040 176 1040 160
WIRE 1040 176 1008 176
WIRE 560 240 528 240
WIRE 816 240 816 160
WIRE 816 240 640 240
WIRE 848 240 816 240
WIRE 1136 256 1136 160
WIRE 1136 256 1008 256
WIRE 848 304 832 304
WIRE 976 400 976 384
WIRE 880 416 880 384
SYMBOL res 1120 64 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 656 240 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0 .5m .5m 0 1m)
SYMATTR InstName V2
SYMBOL voltage 736 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 1024 64 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL Comparators\\LTC1843 928 240 R0
SYMATTR InstName U1
FLAG 736 176 0
FLAG 528 240 0
FLAG 880 416 0
TEXT 1120 344 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\20199d993149_AD8544.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8544.asy)
V2 -V 0 -2.5
XU1 IN N001 +V -V OUT AD8544 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 10K
Vin IN 0 SINE(0 1 10K)
Rload OUT 0 10K
R1 N001 0 10K
V1 +V 0 2.5
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 64 -1072 48 -1072
WIRE 160 -1072 144 -1072
WIRE 176 -1072 160 -1072
WIRE 272 -1072 256 -1072
WIRE -176 -960 -176 -976
WIRE -64 -960 -64 -976
WIRE 160 -960 160 -1072
WIRE 176 -960 160 -960
WIRE 272 -944 272 -1072
WIRE 272 -944 240 -944
WIRE 400 -944 272 -944
WIRE 176 -928 64 -928
WIRE 400 -928 400 -944
WIRE 64 -912 64 -928
WIRE -176 -864 -176 -880
WIRE -64 -864 -64 -880
WIRE 400 -832 400 -848
WIRE 64 -816 64 -832
SYMBOL voltage -64 -976 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 272 -1088 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 160 -1088 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 384 -944 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage -176 -976 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 64 -928 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL Opamps\\AD8544 208 -1008 R0
SYMATTR InstName U1
FLAG -176 -976 +V
FLAG -176 -864 0
FLAG 64 -816 0
FLAG 400 -944 OUT
FLAG 64 -928 IN
FLAG 208 -976 +V
FLAG -64 -976 -V
FLAG 208 -912 -V
FLAG 48 -1072 0
FLAG 400 -832 0
FLAG -64 -864 0
TEXT 416 -736 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\06ef66cb7476_outputFilter.asc
* Generated by LTspice 26.0.1 for Windows.
C4 N004 0 {C}
L1 N003 N001 {L}
L2 N002 0 {L}
C2 N002 N005 {C}
C5 N005 0 {C}
R1 N004 0 {R}
R2 N005 0 {R}
C1 N001 N004 {C}
V1 N003 0 AC 1
R3 N002 N001 4
.ac dec 100 1 2Meg
.param L=80u C=20u R=1.4
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 920 680
WIRE 160 -128 144 -128
WIRE 224 -128 160 -128
WIRE 368 -128 304 -128
WIRE 400 -128 368 -128
WIRE 160 -96 160 -128
WIRE 368 -96 368 -128
WIRE 64 -48 64 -128
WIRE 240 -32 160 -32
WIRE 368 -32 304 -32
WIRE 160 -16 160 -32
WIRE 368 -16 368 -32
WIRE 240 0 240 -32
WIRE 304 0 304 -32
WIRE 64 96 64 32
WIRE 160 96 160 64
WIRE 160 96 64 96
WIRE 240 96 240 64
WIRE 240 96 160 96
WIRE 272 96 240 96
WIRE 304 96 304 64
WIRE 304 96 272 96
WIRE 368 96 368 64
WIRE 368 96 304 96
WIRE 480 96 480 -128
WIRE 480 96 368 96
WIRE 272 112 272 96
SYMBOL cap 144 -96 R0
SYMATTR InstName C1
SYMATTR Value {C}
SYMBOL res 320 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 4
SYMBOL res 352 -32 R0
SYMATTR InstName R2
SYMATTR Value {R}
SYMBOL cap 288 0 R0
SYMATTR InstName C5
SYMATTR Value {C}
SYMBOL cap 224 0 R0
SYMATTR InstName C4
SYMATTR Value {C}
SYMBOL ind 384 -112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value {L}
SYMBOL voltage 64 -64 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL ind 48 -112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value {L}
SYMBOL cap 352 -96 R0
SYMATTR InstName C2
SYMATTR Value {C}
SYMBOL res 144 -32 R0
SYMATTR InstName R1
SYMATTR Value {R}
FLAG 272 112 0
TEXT 32 136 Left 2 !.ac dec 100 1 2Meg
TEXT 544 -96 Left 2 !.param L=80u C=20u R=1.4
* Z:\home\khalils\Downloads\files\data\raw_asc\395a7f0428dd_Fig16_65.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot -I(VGS)
R1 N001 0 1G
VGS VGS 0 1
M1 0 VGS N001 0 N_50n l=50n w=500n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib cmosedu_models.txt
.dc VGS 0 2 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1748 680
WIRE 384 -128 384 -144
WIRE 384 -96 384 -128
WIRE 384 16 384 -16
WIRE 576 -144 384 -144
WIRE 624 -224 624 -256
WIRE 624 -96 624 -128
WIRE 624 16 624 -16
WIRE 848 -256 624 -256
WIRE 848 -192 848 -256
SYMBOL voltage 384 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 40 53 Invisible 0
WINDOW 0 39 62 Left 0
SYMATTR Value 1
SYMATTR InstName VGS
SYMBOL res 608 -112 R0
SYMATTR InstName R1
SYMATTR Value 1G
SYMBOL nmos4 576 -224 R0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
WINDOW 123 72 66 Left 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
FLAG 624 -176 0
FLAG 384 16 0
FLAG 384 -128 VGS
FLAG 848 -192 0
FLAG 624 16 0
TEXT 368 88 Left 0 !.lib cmosedu_models.txt
TEXT 368 64 Left 0 !.dc VGS 0 2 1m
TEXT 416 -264 Left 0 ;Plot -I(VGS)