Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\379cf5e30080_CR_OpAmp_Oscillator.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
R1 N002 N003 10k
XU2 N003 N001 N002 0 output LT1001 ;pnba In+)In-)V+)V-)OUT
C1 N001 0 1500p
R3 output N001 75k
R2 N003 0 10k
V1 N002 0 5
R4 output N003 10k
.tran 0 3 0 0.00001
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -96 80 -96
WIRE 352 -96 224 -96
WIRE -64 -32 -368 -32
WIRE 208 -32 -64 -32
WIRE -64 32 -64 -32
WIRE -368 48 -368 -32
WIRE 208 80 208 -32
WIRE 80 96 80 -96
WIRE 176 96 80 96
WIRE 352 112 352 -96
WIRE 352 112 240 112
WIRE 512 112 352 112
WIRE -64 128 -64 112
WIRE 144 128 -64 128
WIRE 176 128 144 128
WIRE -64 176 -64 128
WIRE 80 176 80 96
WIRE 208 176 208 144
WIRE -368 192 -368 128
WIRE 144 256 144 128
WIRE 256 256 144 256
WIRE 352 256 352 112
WIRE 352 256 336 256
WIRE -64 288 -64 256
WIRE 80 288 80 240
SYMBOL res -80 16 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res -80 160 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 352 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL cap 64 176 R0
SYMATTR InstName C1
SYMATTR Value 1500p
SYMBOL res 240 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 75k
SYMBOL voltage -368 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL OpAmps\\OP07 208 48 R0
SYMATTR InstName U2
FLAG -368 192 0
FLAG 208 176 0
FLAG 80 288 0
FLAG -64 288 0
FLAG 512 112 output
TEXT -400 312 Left 2 !.tran 0 3 0 0.00001
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1373.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1373.asy)
C2 OUT 0 22 Rser=.05
D1 N001 OUT MBRS360
R1 N006 0 5K
XU1 N005 N002 N004 N003 IN 0 0 N001 LT1373 ;pnba Vc)FB)NFB)_SHDN)Vin)SGND)PGND)SW
L1 IN N001 22 Rser=0.02 Rpar=5000
R3 OUT N002 215K
R2 N002 0 24.9K
V1 IN 0 5
Rload OUT 0 100
C1 N005 N006 .05
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
.lib LT1373.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2708 1432
WIRE 1824 880 1536 880
WIRE 1888 880 1824 880
WIRE 2016 880 1968 880
WIRE 2064 880 2016 880
WIRE 2208 880 2128 880
WIRE 2352 880 2208 880
WIRE 2480 880 2352 880
WIRE 1536 896 1536 880
WIRE 2352 896 2352 880
WIRE 2480 896 2480 880
WIRE 1824 928 1824 880
WIRE 2208 928 2208 880
WIRE 1536 992 1536 976
WIRE 2016 992 2016 880
WIRE 2016 992 1968 992
WIRE 2352 992 2352 960
WIRE 2480 992 2480 976
WIRE 2208 1056 2208 1008
WIRE 2208 1056 1968 1056
WIRE 2208 1072 2208 1056
WIRE 1680 1088 1648 1088
WIRE 2016 1120 1968 1120
WIRE 2208 1168 2208 1152
WIRE 1984 1184 1968 1184
WIRE 2064 1184 2048 1184
WIRE 2160 1184 2144 1184
WIRE 1744 1264 1744 1248
WIRE 1904 1264 1904 1248
SYMBOL polcap 2336 896 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMATTR SpiceLine Rser=.05
SYMBOL RES 2192 1056 R0
SYMATTR InstName R2
SYMATTR Value 24.9K
SYMBOL RES 2192 912 R0
SYMATTR InstName R3
SYMATTR Value 215K
SYMBOL IND 1872 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 22
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL VOLTAGE 1536 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL CAP 1984 1200 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value .05
SYMBOL POWERPRODUCTS\\LT1373 1824 1088 R0
SYMATTR InstName U1
SYMBOL RES 2464 880 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL schottky 2064 896 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL RES 2048 1200 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 5K
FLAG 1904 1264 0
FLAG 1536 992 0
FLAG 1744 1264 0
FLAG 2160 1184 0
FLAG 2480 992 0
FLAG 2352 992 0
FLAG 2208 1168 0
FLAG 2480 880 OUT
FLAG 1536 880 IN
TEXT 2224 1256 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\eb9597d8df02_SCHEMATIC.asc
* Generated by LTspice 26.0.1 for Windows.
* .op
* EDIC WINTER INTERNSHIP\nMohammed Ahmed Majid\nGP5405, 23EEBEA666
* IO Characterstics of PMOS
vsd N001 0 0.9
M1 0 N002 N001 N001 PMOS l=1u w=10u
vsg N001 N002 0.6
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include tsmc180.txt
.dc vsd 0 1.8 0.1 vsg 0.2 1 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 0 96 0
WIRE 416 0 256 0
WIRE 416 32 416 0
WIRE 256 96 256 0
WIRE 336 96 256 96
WIRE 256 112 256 96
WIRE 208 128 192 128
WIRE 336 160 336 96
WIRE 336 160 256 160
WIRE 96 192 96 0
WIRE 256 256 256 208
WIRE 368 256 256 256
WIRE 416 256 416 112
WIRE 416 256 368 256
WIRE 192 272 192 128
WIRE 192 272 96 272
WIRE 368 288 368 256
SYMBOL voltage 416 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vsd
SYMATTR Value 0.9
SYMBOL voltage 96 176 R0
WINDOW 3 23 109 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vsg
SYMATTR Value 0.6
SYMBOL pmos4 208 208 M180
WINDOW 123 61 8 Left 2
SYMATTR InstName M1
SYMATTR Value2 l=1u w=10u
FLAG 368 288 0
TEXT -264 0 Left 2 !.include tsmc180.txt
TEXT -264 24 Left 2 !.dc vsd 0 1.8 0.1 vsg 0.2 1 0.2
TEXT -264 48 Left 2 ;.op
TEXT -264 -96 Left 2 ;EDIC WINTER INTERNSHIP\nMohammed Ahmed Majid\nGP5405, 23EEBEA666
TEXT 104 -56 Left 2 ;IO Characterstics of PMOS
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2108-1.3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
L1 N001 OUT 1
Rload OUT 0 4
C1 OUT 0 10
XU1 IN IN N001 OUT 0 ADP2108-x.x Rtop=128K ;pnba Vin)EN)SW)FB)GND
.tran .5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2108-1.3.asy)
.lib ADP2108-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 144
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 4
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ADP2108-1.3 352 224 R0
SYMATTR InstName U1
TEXT 576 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\53046064f2a3_AndGate.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5V
R5 0 N007 100k
Q3 N004 N006 N007 0 NPN
Q1 N007 N008 0 0 PNP
R4 N003 N002 10k
V2 N003 0 PULSE(0 5 0 1u 1u 1m 2m)
R1 N006 N005 10k
Q2 N007 N009 0 0 PNP
V3 N005 0 PULSE(0 5 0 1u 1u 500u 1m)
R3 N003 N009 10k
Q4 N001 N002 N004 0 NPN
R2 N008 N005 10k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 4m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 964 680
WIRE 224 -192 96 -192
WIRE 352 -192 304 -192
WIRE 96 -48 96 -192
WIRE 256 0 160 0
WIRE 480 0 336 0
WIRE 96 128 96 48
WIRE 336 128 224 128
WIRE 224 160 224 128
WIRE 336 160 336 128
WIRE -176 176 -272 176
WIRE 32 176 -96 176
WIRE 480 192 480 0
WIRE 640 192 480 192
WIRE 640 240 640 192
WIRE -272 272 -272 176
WIRE -272 272 -432 272
WIRE -432 304 -432 272
WIRE 96 304 96 224
WIRE 96 304 -32 304
WIRE 224 304 224 240
WIRE 224 304 96 304
WIRE 640 368 640 320
WIRE -32 384 -32 304
WIRE 224 384 224 304
WIRE -272 432 -272 272
WIRE -224 432 -272 432
WIRE -96 432 -144 432
WIRE 336 432 288 432
WIRE 480 432 480 192
WIRE 480 432 416 432
WIRE -432 448 -432 384
WIRE -32 560 -32 480
WIRE 96 560 -32 560
WIRE 224 560 224 480
WIRE 224 560 96 560
WIRE 96 624 96 560
SYMBOL npn 32 128 R0
SYMATTR InstName Q3
SYMBOL res -80 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 208 -192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5V
SYMBOL npn 160 -48 M0
SYMATTR InstName Q4
SYMBOL res 352 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL pnp -96 384 R0
SYMATTR InstName Q1
SYMBOL voltage 640 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1u 1u 1m 2m)
SYMBOL res 432 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 208 144 R0
SYMATTR InstName R5
SYMATTR Value 100k
SYMBOL voltage -432 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 1u 1u 500u 1m)
SYMBOL pnp 288 384 M0
SYMATTR InstName Q2
SYMBOL res -128 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
FLAG 96 624 0
FLAG 352 -192 0
FLAG -432 448 0
FLAG 640 368 0
FLAG 336 160 0
TEXT -250 536 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC7065.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC7065.asy)
C2 OUT 0 10
M2 N004 N006 0 0 BSC082N10LS
M1 IN N003 N004 N004 BSC082N10LS
V3 N005 0 PULSE(0 5 10u 1n 1n 1u 2u)
L1 N004 OUT 10
XU1 0 N001 N001 N005 N006 N002 N003 N004 LTC7065 ;pnba GND)Vcc)EN)PWM)BG)BST)TG)SW
V2 IN 0 40
C1 N004 N002 0.22
D1 N001 N002 MBRS1100
R1 OUT 0 20
V1 N001 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0.5m startup
.lib LTC7065.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1064 680
WIRE 128 -144 -16 -144
WIRE 336 -144 192 -144
WIRE 736 -96 496 -96
WIRE -16 -48 -16 -144
WIRE -16 -48 -128 -48
WIRE 32 -48 -16 -48
WIRE 336 -48 336 -144
WIRE 336 -48 288 -48
WIRE 496 -48 496 -96
WIRE 736 -48 736 -96
WIRE -128 -16 -128 -48
WIRE 448 32 288 32
WIRE 336 48 336 -48
WIRE 736 48 736 32
WIRE -16 64 -16 -48
WIRE 32 64 -16 64
WIRE -128 80 -128 64
WIRE 336 128 336 112
WIRE 336 128 288 128
WIRE 496 128 496 48
WIRE 496 128 336 128
WIRE 592 128 496 128
WIRE 736 128 672 128
WIRE 832 128 736 128
WIRE 832 144 832 128
WIRE 496 160 496 128
WIRE 736 160 736 128
WIRE 32 240 -128 240
WIRE 448 240 288 240
WIRE 736 256 736 224
WIRE 832 256 832 224
WIRE -128 288 -128 240
WIRE 496 288 496 256
WIRE 160 304 160 288
WIRE -128 384 -128 368
SYMBOL ind 576 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL voltage -128 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 10u 1n 1n 1u 2u)
SYMBOL nmos 448 -48 R0
SYMATTR InstName M1
SYMATTR Value BSC082N10LS
SYMBOL cap 320 112 M180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 0.22
SYMBOL voltage 736 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 40
SYMBOL res 816 128 R0
SYMATTR InstName R1
SYMATTR Value 20
SYMBOL schottky 128 -160 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value MBRS1100
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL nmos 448 160 R0
SYMATTR InstName M2
SYMATTR Value BSC082N10LS
SYMBOL cap 720 160 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL LTC7065 160 144 R0
SYMATTR InstName U1
FLAG 496 288 0
FLAG 736 256 0
FLAG 736 48 0
FLAG -128 80 0
FLAG -128 384 0
FLAG 832 128 OUT
FLAG 832 256 0
FLAG 736 -96 IN
FLAG 160 304 0
TEXT 288 320 Left 2 !.tran 0.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\39e86ca57ff0_TPMOS2.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N002 0 0
V1 N001 0 40V
M1 N001 N002 0 0 BS170
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model BS170 VDMOS(Rg=1.3 Vto=2 Rd=1.436 Rb=2.51m Kp=1.233m Lambda=0.0 Cgdmin=0.25n Cgdmax=7n Cgs=2.8n Cjo=1.89n VJ=.4519 Vds=30 Ron=8m Is=125f N=1.023 Rs=1.281 M=.3423 mfg=Alpha_&_Omega Qg=18n Tt=161.6n)
.dc V1 0 40 0.01 V2 list 0 1 2 3 4 5 6 7 8 9
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2388 680
WIRE 80 96 -96 96
WIRE -96 176 -96 96
WIRE 80 192 80 96
WIRE -144 256 -304 256
WIRE -304 304 -304 256
WIRE -304 432 -304 384
WIRE -96 432 -96 272
WIRE 80 432 80 272
SYMBOL nmos -144 176 R0
SYMATTR InstName M1
SYMATTR Value BS170
SYMBOL voltage 80 176 R0
SYMATTR InstName V1
SYMATTR Value 40V
SYMBOL voltage -304 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
FLAG -304 432 0
FLAG -96 432 0
FLAG 80 432 0
TEXT -432 496 Left 2 !.model BS170 VDMOS(Rg=1.3 Vto=2 Rd=1.436 Rb=2.51m Kp=1.233m Lambda=0.0 Cgdmin=0.25n Cgdmax=7n Cgs=2.8n Cjo=1.89n VJ=.4519 Vds=30 Ron=8m Is=125f N=1.023 Rs=1.281 M=.3423 mfg=Alpha_&_Omega Qg=18n Tt=161.6n)
TEXT -352 64 Left 2 !.dc V1 0 40 0.01 V2 list 0 1 2 3 4 5 6 7 8 9
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1178A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1178A.asy)
R2 N001 0 5K
R1 N002 N001 5K
V1 +V 0 5
V3 N003 0 SINE(1.25 .1 1K)
XU1 N003 N001 +V 0 N002 LT1178 ;pnba In+)In-)V+)V-)OUT
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -192 176 -192 160
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 160 256 0 256
WIRE -192 272 -192 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL voltage -192 160 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(1.25 .1 1K)
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL opamps\\LT1178A 192 176 R0
SYMATTR InstName U1
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
FLAG -192 272 0
FLAG 192 192 +V
FLAG -192 160 +V
FLAG 16 96 0
FLAG 0 368 0
FLAG 192 288 0
TEXT 248 320 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\2c60b32c5402_scheme13.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N001 N003 N006 N002 LT1037 ;pnba In+)In-)V+)V-)OUT
V1 N004 0 PULSE(0 10 0.01ms 10p 10p 0.03ms 0.06ms)
R1 N002 N001 50k
V2 N003 0 {Vcc}
V3 0 N006 {Vcc}
C1 N001 N005 31.8n
C2 N002 N001 3.2n
R2 N005 N004 500
.param Vcc=15
* Vout
.tran 1ms 1ms
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1037.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 144 -48 64 -48
WIRE 288 -48 208 -48
WIRE 64 48 64 -48
WIRE 144 48 64 48
WIRE 288 48 288 -48
WIRE 288 48 224 48
WIRE 480 96 192 96
WIRE 480 128 480 96
WIRE 192 144 192 96
WIRE -160 160 -224 160
WIRE -48 160 -80 160
WIRE 64 160 64 48
WIRE 64 160 16 160
WIRE 160 160 64 160
WIRE -224 176 -224 160
WIRE 288 176 288 48
WIRE 288 176 224 176
WIRE 368 176 288 176
WIRE 160 192 112 192
WIRE 480 240 480 208
WIRE 480 240 416 240
WIRE 112 256 112 192
WIRE 416 256 416 240
WIRE -224 272 -224 256
WIRE 480 288 480 240
WIRE 192 384 192 208
WIRE 480 384 480 368
WIRE 480 384 192 384
FLAG -224 272 0
FLAG 112 256 0
FLAG 416 256 0
SYMBOL OpAmps\\LT1037 192 112 R0
SYMATTR InstName U1
SYMBOL voltage -224 160 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 10 0.01ms 10p 10p 0.03ms 0.06ms)
SYMBOL res 240 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50k
SYMBOL voltage 480 112 R0
SYMATTR InstName V2
SYMATTR Value {Vcc}
SYMBOL voltage 480 272 R0
SYMATTR InstName V3
SYMATTR Value {Vcc}
SYMBOL cap 16 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 31.8n
SYMBOL cap 208 -64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 3.2n
SYMBOL res -64 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 500
TEXT -144 312 Left 2 !.param Vcc=15
TEXT 344 160 Left 2 ;Vout
TEXT -144 344 Left 2 !.tran 1ms 1ms
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP5301-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP5301-3.asy)
V1 IN 0 5
C1 OUT 0 10
R1 OUT N001 1Meg
Rload OUT 0 80
L1 N002 OUT 2.2 Rser=80m
XU1 IN IN 0 0 OUT N001 0 0 N002 ADP5301 OVO=1 OD=1 ;pnba EN)PVin)Sync/Mode)VID)FB)VoutOK)Pgnd)Agnd)SW
.tran .6m startup
.lib ADP5301.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 64 64 64
WIRE 160 64 144 64
WIRE 496 64 416 64
WIRE 608 64 576 64
WIRE 64 80 64 64
WIRE 144 144 144 64
WIRE 160 144 144 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 608 144 608 64
WIRE 608 144 560 144
WIRE 688 144 608 144
WIRE 608 160 608 144
WIRE 688 160 688 144
WIRE 64 176 64 160
WIRE 160 224 144 224
WIRE 560 224 560 144
WIRE 560 224 416 224
WIRE 608 256 608 224
WIRE 688 256 688 240
WIRE 160 304 144 304
WIRE 432 304 416 304
WIRE 288 384 288 368
SYMBOL ADP5301-3 288 192 R0
SYMATTR InstName U1
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=80m
SYMBOL res 672 144 R0
SYMATTR Value 80
SYMATTR InstName Rload
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL voltage 64 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 592 160 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 608 256 0
FLAG 432 304 0
FLAG 64 176 0
FLAG 688 144 OUT
FLAG 688 256 0
FLAG 64 64 IN
FLAG 288 384 0
FLAG 144 304 0
FLAG 144 224 0
TEXT 440 384 Left 2 !.tran .6m startup
* Z:\tmp\asc_dec_bjh7r6w2\122f69584f23_schematics_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R1 DRIVER_TTL 0 4.7k
R5 N001 DRIVER_TTL 12K
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1132 680
WIRE -496 -352 -672 -352
WIRE -672 -320 -672 -352
WIRE -496 -320 -496 -352
WIRE -320 -240 -496 -240
WIRE -496 -224 -496 -240
WIRE 432 -224 336 -224
WIRE 528 -224 432 -224
WIRE 432 -208 432 -224
WIRE 528 -208 528 -224
WIRE 416 -160 384 -160
WIRE -672 -144 -672 -240
WIRE -560 -144 -672 -144
WIRE -496 -144 -560 -144
WIRE 416 -128 416 -160
WIRE 528 -128 416 -128
WIRE 560 -128 528 -128
WIRE -560 -112 -560 -144
SYMBOL res 544 -112 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL res -512 -336 R0
SYMATTR InstName R5
SYMATTR Value 12K
FLAG -320 -240 DRIVER_TTL
FLAG 560 -128 DRIVER_TTL
FLAG 432 -208 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT9890.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\CurrentMonitors\LT9890.asy)
V1 IN 0 12
R1 OUT 0 200
I1 N001 0 150 load
XU1 N001 0 MP_01 OUT IN LT9890 ;pnba IM)GND))IOUT)IP
.tran 0 1m 0 startup
.lib LT9890.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -96 64
WIRE 480 64 384 64
WIRE -96 112 -96 64
WIRE 480 112 480 64
WIRE -96 240 -96 192
WIRE 288 336 288 304
WIRE 480 336 480 192
WIRE 480 336 288 336
WIRE 128 352 128 304
WIRE 128 352 80 352
WIRE 288 368 288 336
WIRE 128 400 128 352
WIRE 128 560 128 480
SYMBOL current 480 112 R0
WINDOW 3 24 136 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 24 108 Left 2
SYMATTR Value 150
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMBOL LT9890 208 160 R0
SYMATTR InstName U1
SYMBOL voltage -96 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 112 384 R0
SYMATTR InstName R1
SYMATTR Value 200
FLAG 288 368 0
FLAG 128 560 0
FLAG -96 240 0
FLAG -96 64 IN
FLAG 80 352 OUT
TEXT -128 584 Left 2 !.tran 0 1m 0 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1170.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1170.asy)
D1 N001 OUT MBRS360
R1 N003 N004 1K
XU1 N003 N002 0 N001 IN LT1170 ;pnba Vc)FB)GND)SW)Vin
R3 OUT N002 10.7K
Rload OUT 0 10
V1 IN 0 5
L1 IN N001 150 Rser=0.02 Rpar=5000
C1 N004 0 1
R2 N002 0 1.24K
C2 OUT 0 500 Rser=0.05
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 15m startup
.lib LT1170.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 896 1616 896
WIRE 1888 896 1824 896
WIRE 2000 896 1968 896
WIRE 2048 896 2000 896
WIRE 2176 896 2112 896
WIRE 2304 896 2176 896
WIRE 2416 896 2304 896
WIRE 1616 912 1616 896
WIRE 2304 912 2304 896
WIRE 2416 912 2416 896
WIRE 1824 944 1824 896
WIRE 2176 960 2176 896
WIRE 1616 1008 1616 992
WIRE 2304 1008 2304 976
WIRE 2416 1008 2416 992
WIRE 2000 1024 2000 896
WIRE 2000 1024 1952 1024
WIRE 2176 1088 2176 1040
WIRE 2176 1088 1952 1088
WIRE 2176 1104 2176 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2176 1200 2176 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
SYMBOL polcap 2288 912 R0
SYMATTR InstName C2
SYMATTR Value 500
SYMATTR SpiceLine Rser=0.05
SYMBOL RES 2160 944 R0
SYMATTR InstName R3
SYMATTR Value 10.7K
SYMBOL POWERPRODUCTS\\LT1170 1824 1088 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1616 896 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL IND 1872 912 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL RES 2160 1088 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL RES 2400 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL schottky 2048 912 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
FLAG 1616 1008 0
FLAG 1824 1248 0
FLAG 2064 1248 0
FLAG 2416 1008 0
FLAG 2304 1008 0
FLAG 2176 1200 0
FLAG 2416 896 OUT
FLAG 1616 896 IN
TEXT 2168 1248 Left 2 !.tran 15m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\172170e1cd68_LT1764.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1764.asy)
XU1 IN IN 0 OUT OUT LT1764 ;pnba _SHDN)IN)GND)OUT)ADJ
Rload OUT 0 500
C1 OUT 0 10 Rser=100m
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT1764.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -224 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 544 48 384 48
WIRE -224 64 -224 48
WIRE 384 64 384 48
WIRE 544 64 544 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -224 160 -224 144
WIRE 384 160 384 128
WIRE 544 160 544 144
WIRE 160 240 160 208
SYMBOL res 528 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 368 64 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 Rser=100m
SYMATTR InstName C1
SYMATTR Value 10u
SYMBOL PowerProducts\\LT1764 160 96 R0
SYMATTR InstName U1
FLAG -224 160 0
FLAG 384 160 0
FLAG 544 160 0
FLAG 160 240 0
FLAG 544 48 OUT
FLAG -224 48 IN
TEXT 352 232 Left 2 !.tran 1