Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\2f75cb6ac2fc_bss83.asc
* Generated by LTspice 26.0.1 for Windows.
* GAMMA added
* Enhanced model of the BSS83 from Philips\n \nSweep of Vgs from 0 to 5V at Vsb=-8, -4, 0V\n.dc V1 0 5 .1 V2 -8 0 4\nPlot Id(M1) to see how Vsb changes the behaviour.\n \nI added GAMMA=0.2 to the model to get the correct Ids(Vgs, Vsb).\nThe simulated drain current is independent of Vsb if GAMMA is \nomitted. This was clearly a missing parameter in the original model.\n \nThe complete ".model"-statement can be also put into a file \nlike BSS83.mod and added with a SPICEdirective.\n.include BSS83.mod
* * Philips model\n.MODEL BSS83 NMOS\n+ LEVEL=3\n+ W=1E-3\n+ L=1E-6\n+ VTO=2\n+ VMAX=1E6\n+ RS=3\n+ RD=3\n+ CJ=0.001396\n+ MJ=0.3936\n+ THETA=1E-6\n+ ETA=0.009307\n+ KAPPA=2.226
+ LEVEL=3
+ W=1E-3
+ L=1E-6
+ VTO=2
+ VMAX=1E6
+ RS=3
+ RD=3
+ CJ=0.001396
+ MJ=0.3936
+ THETA=1E-6
+ ETA=0.009307
+ KAPPA=2.226
+ GAMMA=0.2
V2 N002 0 0
V1 N003 0 2
M1 N001 N003 0 N002 BSS83
V3 N001 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.MODEL BSS83 NMOS
.dc V1 0 5 .1 V2 -8 0 4
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1088 680
WIRE 32 256 32 224
WIRE 32 384 32 336
WIRE 128 224 32 224
WIRE 176 144 176 -32
WIRE 176 384 176 240
WIRE 288 -32 176 -32
WIRE 288 0 288 -32
WIRE 288 112 288 80
WIRE 288 192 176 192
WIRE 288 224 288 192
WIRE 288 384 288 304
SYMBOL voltage 32 240 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL voltage 288 -16 R0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage 288 208 R0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL nmos4 128 144 R0
SYMATTR InstName M1
SYMATTR Value BSS83
FLAG 288 112 0
FLAG 288 384 0
FLAG 32 384 0
FLAG 176 384 0
TEXT 448 0 Left 0 !* GAMMA added\n.MODEL BSS83 NMOS\n+ LEVEL=3\n+ W=1E-3\n+ L=1E-6\n+ VTO=2\n+ VMAX=1E6\n+ RS=3\n+ RD=3\n+ CJ=0.001396\n+ MJ=0.3936\n+ THETA=1E-6\n+ ETA=0.009307\n+ KAPPA=2.226\n+ GAMMA=0.2
TEXT 32 -112 Left 0 !.dc V1 0 5  .1 V2 -8 0 4
TEXT 32 -72 Left 0 !.op
TEXT 32 -496 Left 0 ;Enhanced model of the BSS83 from Philips\n \nSweep of Vgs from 0 to 5V at Vsb=-8, -4, 0V\n.dc V1 0 5  .1 V2 -8 0 4\nPlot Id(M1) to see how Vsb changes the behaviour.\n \nI added GAMMA=0.2 to the model to get the correct Ids(Vgs, Vsb).\nThe simulated drain current is independent of Vsb if GAMMA is \nomitted. This was clearly a missing parameter in the original model.\n \nThe complete ".model"-statement can be also put into a file \nlike BSS83.mod and added with a SPICEdirective.\n.include BSS83.mod
TEXT 720 0 Left 0 ;* Philips model\n.MODEL BSS83 NMOS\n+ LEVEL=3\n+ W=1E-3\n+ L=1E-6\n+ VTO=2\n+ VMAX=1E6\n+ RS=3\n+ RD=3\n+ CJ=0.001396\n+ MJ=0.3936\n+ THETA=1E-6\n+ ETA=0.009307\n+ KAPPA=2.226
* Z:\home\khalils\Downloads\files\data\raw_asc\275c29dcae46_Buck.asc
* Generated by LTspice 26.0.1 for Windows.
* Note: The parser will look for Cout \nand Rout in the base workspace
Rg N002 N001 1m
R1 N004 0 Rout
M2 N003 NC_02 0 0 NMOS ron = 1m Coss = {Coss}
M1 N002 NC_01 N003 N003 BSC900N20NS3
V1 N001 0 48
L1 N003 N004 {Lf}
C1 N004 0 Cout
D2 N003 N002 D Vf={Vf} Ron={1m} Cd=100p
D1 0 N003 D Vf={Vf} Ron={1m} Cd=100p
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.param Lf = 1u
.param Coss = 1n
.param Cout = 1e-3
.param Rout = 100
.param Vf = 1
.param ts = [1u 50n 1u 50n]
.param swvec = [1 0 0 0; 0 0 0 0; 0 1 0 0; 0 0 0 0]
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1524 680
WIRE -176 16 -224 16
WIRE -32 16 -96 16
WIRE 288 16 -32 16
WIRE -32 64 -32 16
WIRE 288 80 288 16
WIRE -224 96 -224 16
WIRE -32 176 -32 160
WIRE 288 176 288 144
WIRE 288 176 -32 176
WIRE 400 176 288 176
WIRE 576 176 480 176
WIRE 656 176 576 176
WIRE -32 224 -32 176
WIRE 576 224 576 176
WIRE 656 224 656 176
WIRE 288 240 288 176
WIRE -224 336 -224 176
WIRE -32 336 -32 320
WIRE 288 336 288 304
WIRE 576 336 576 288
WIRE 656 336 656 304
SYMBOL diode 304 304 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 -185 -71 Left 2
SYMATTR InstName D1
SYMATTR Value2 Vf={Vf} Ron={1m} Cd=100p
SYMBOL nmos -80 224 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 ron = 1m Coss = {Coss}
SYMATTR InstName M2
SYMBOL res 640 208 R0
SYMATTR InstName R1
SYMATTR Value Rout
SYMBOL ind 384 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value {Lf}
SYMBOL diode 304 144 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 -356 43 Left 2
SYMATTR InstName D2
SYMATTR Value2 Vf={Vf} Ron={1m} Cd=100p
SYMBOL cap 560 224 R0
SYMATTR InstName C1
SYMATTR Value Cout
SYMBOL nmos -80 64 R0
SYMATTR InstName M1
SYMATTR Value BSC900N20NS3
SYMBOL res -80 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rg
SYMATTR Value 1m
SYMBOL voltage -224 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 48
FLAG -32 336 0
FLAG -224 336 0
FLAG 576 336 0
FLAG 656 336 0
FLAG 288 336 0
TEXT 696 8 Left 2 !.param Lf = 1u\n.param Coss = 1n\n.param Cout = 1e-3\n.param Rout = 100\n.param Vf = 1
TEXT 352 -64 Left 2 !.param ts = [1u 50n 1u 50n]
TEXT 352 -32 Left 2 !.param swvec = [1 0 0 0; 0 0 0 0; 0 1 0 0; 0 0 0 0]
TEXT 744 240 Left 2 ;Note: The parser will look for Cout \nand Rout in the base workspace
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1726-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1726-2.5.asy)
R1 N001 N004 66.5K
V4 N007 0 5
V2 N002 0 PWL(0 0 250m 3.3 3 3.3 3.5 0 4 0 4.5 3.3 100 3.3)
R2 N004 0 100K
V6 N009 0 PULSE(0 2 5000ms 1u 1u 800ms 1600m 6)
C2 N008 0 47n
V3 N003 0 PWL(0 0 350m 2.5 1 2.5 1.5 0 2 0 2.5 2.5 100 2.5)
XU1 N002 N003 N004 0 N009 N006 N008 N005 LTC1726-2.5 ;pnba VCC3)VCC25)VCCA)GND)WDI)_RST)WT)RT
C1 N005 0 47n
V1 N001 0 PWL(0 0 100m 1.8V 5s 1.8V 5.5s 0V 6s 0V 6.5s 1.8V 6.8s 1.8V 6.8001s 0V 6.8002s 1.8V 6.9s 1.8V 6.9001s 0V 6.9002s 1.8V 100s 1.8V)
R3 N007 N006 10K
.tran 17
.lib LTC1726-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2616 848
WIRE 768 48 592 48
WIRE 592 64 592 48
WIRE 224 128 -320 128
WIRE 768 128 768 48
WIRE 128 160 -224 160
WIRE 592 160 592 144
WIRE 592 160 320 160
WIRE 592 176 592 160
WIRE 128 192 128 160
WIRE 224 192 224 128
WIRE 320 192 320 160
WIRE 768 240 768 208
WIRE 592 272 592 256
WIRE 0 304 -16 304
WIRE 80 304 64 304
WIRE 400 304 368 304
WIRE 528 304 480 304
WIRE 528 336 528 304
WIRE 0 432 -16 432
WIRE 80 432 64 432
WIRE 448 432 368 432
WIRE 528 432 528 416
WIRE 448 464 448 432
WIRE -224 480 -224 160
WIRE 224 496 224 480
WIRE -320 560 -320 128
WIRE 448 560 448 544
WIRE -224 576 -224 560
WIRE -320 656 -320 640
SYMBOL res 576 48 R0
SYMATTR InstName R1
SYMATTR Value 66.5K
SYMBOL voltage 448 448 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V6
SYMATTR Value PULSE(0 2 5000ms 1u 1u 800ms 1600m 6)
SYMBOL cap 64 288 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 47n
SYMBOL voltage -224 464 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PWL(0 0 350m 2.5 1 2.5 1.5 0 2 0 2.5 2.5 100 2.5)
SYMATTR InstName V3
SYMBOL res 576 160 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL LTC1726-2.5 224 400 R0
SYMATTR InstName U1
SYMBOL voltage -320 544 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PWL(0 0 250m 3.3 3 3.3 3.5 0 4 0 4.5 3.3 100 3.3)
SYMATTR InstName V2
SYMBOL voltage 768 112 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PWL(0 0 100m 1.8V 5s 1.8V 5.5s 0V 6s 0V 6.5s 1.8V 6.8s 1.8V 6.8001s 0V 6.8002s 1.8V 6.9s 1.8V 6.9001s 0V 6.9002s 1.8V 100s 1.8V)
SYMATTR InstName V1
SYMBOL res 496 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL cap 64 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 47n
SYMBOL voltage 528 320 R0
SYMATTR InstName V4
SYMATTR Value 5
FLAG 448 560 0
FLAG 528 432 0
FLAG 768 240 0
FLAG -224 576 0
FLAG -320 656 0
FLAG 224 496 0
FLAG -16 304 0
FLAG -16 432 0
FLAG 592 272 0
TEXT 872 608 Left 2 !.tran 17
* Z:\home\khalils\Downloads\files\data\raw_asc\ba444b492223_q3.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vout N001 1k
V1 N001 0 10
D1 0 Vout 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0.1 1.5 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 176 224 64 224
WIRE 352 224 256 224
WIRE 528 224 352 224
WIRE 64 304 64 224
WIRE 352 320 352 224
WIRE 64 448 64 384
WIRE 208 448 64 448
WIRE 352 448 352 384
WIRE 352 448 208 448
WIRE 528 448 352 448
FLAG 528 224 Vout
FLAG 208 448 0
SYMBOL res 272 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 64 288 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL diode 368 384 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
TEXT 296 128 Left 2 !.dc V1 0.1 1.5 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\149e2662d9cb_2919-25.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2919-25.asy)
XU1 N002 N004 N006 N008 N010 0 N009 N007 N005 N003 LTC2919-25 ;pnba SEL)Vcc)OUT1)OUT2)_RST)GND)REF)TMR)ADJ2)ADJ1
R2 N003 N001 57.6K
V2 N001 0 PULSE(2.5 5 0 1000m 1000m 3000m 5000m)
R1 N005 0 10K
R5 N001 N008 10K
R4 N001 N006 10K
R3 N005 N003 1.1K
C2 0 N010 1000p
I1 N009 0 PWL(0 0 1 0 1.001 1m 2 1m 2.001 -1m 3 -1m 4 -5m 4.001 -5m 5 5m)
V1 N004 0 PWL(0 0 10m 12)
C1 0 N007 22n
R6 N001 N010 10K
V3 N002 0 PWL(0 0 5010m 0 5011m 0.9 10010m 0.9 10011m 5)
.tran 15
.lib LTC2919-25.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1268 788
WIRE -304 -64 -576 -64
WIRE -208 -64 -224 -64
WIRE -576 16 -576 -64
WIRE -480 16 -576 16
WIRE -384 16 -480 16
WIRE 480 16 -384 16
WIRE 480 48 480 16
WIRE 96 80 -208 80
WIRE 192 80 176 80
WIRE 480 176 480 128
WIRE 480 176 320 176
WIRE -576 192 -576 16
WIRE -480 192 -480 16
WIRE -384 192 -384 16
WIRE -208 208 -208 80
WIRE -128 208 -208 208
WIRE 320 208 320 176
WIRE 320 208 192 208
WIRE 480 208 480 176
WIRE -256 272 -288 272
WIRE -128 272 -176 272
WIRE 320 272 192 272
WIRE 320 320 320 272
WIRE 480 320 480 288
WIRE 480 320 320 320
WIRE -384 336 -384 272
WIRE -128 336 -384 336
WIRE 208 336 192 336
WIRE 480 336 480 320
WIRE -480 400 -480 272
WIRE -128 400 -480 400
WIRE 304 400 192 400
WIRE 480 432 480 416
WIRE 304 448 304 400
WIRE -576 464 -576 272
WIRE -128 464 -576 464
WIRE 224 464 192 464
WIRE -576 480 -576 464
WIRE -576 560 -576 544
WIRE 304 560 304 528
SYMBOL cap 272 320 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 29 VTop 2
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL res 464 320 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL cap -560 544 R180
WINDOW 0 -34 53 Left 2
WINDOW 3 -66 14 Left 2
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL res 464 144 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 57.6K
SYMBOL voltage -160 272 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 34 73 VTop 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 10m 12)
SYMBOL res 464 304 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 1.1K
SYMBOL res -496 176 R0
SYMATTR InstName R5
SYMATTR Value 10K
SYMBOL voltage -320 -64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value PULSE(2.5 5 0 1000m 1000m 3000m 5000m)
SYMBOL res -400 176 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL current 304 448 R0
SYMATTR InstName I1
SYMATTR Value PWL(0 0 1 0 1.001 1m 2 1m 2.001 -1m 3 -1m 4 -5m 4.001 -5m 5 5m)
SYMBOL res -592 176 R0
SYMATTR InstName R6
SYMATTR Value 10K
SYMBOL voltage 80 80 R270
WINDOW 3 -32 56 VBottom 2
WINDOW 0 32 56 VTop 2
SYMATTR Value PWL(0 0 5010m 0 5011m 0.9 10010m 0.9 10011m 5)
SYMATTR InstName V3
SYMBOL LTC2919-25 32 336 R0
SYMATTR InstName U1
FLAG 224 464 0
FLAG -288 272 0
FLAG 272 336 0
FLAG 480 432 0
FLAG -208 -64 0
FLAG -576 560 0
FLAG 304 560 0
FLAG 192 80 0
TEXT 0 552 Left 2 !.tran 15
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1072HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1072HV.asy)
Rload OUT 0 48
D1 N001 OUT 1N5819
R2 N002 0 1.24K
XU1 N003 N002 0 N001 IN LT1072 ;pnba Vc)FB)GND)SW)Vin
C1 OUT 0 500
V1 IN 0 5
R3 N003 N004 1K
C3 N004 0 1
R1 OUT N002 10.7K
L1 IN N001 150 Rser=0.02 Rpar=5000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 25m startup
.lib LT1072.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1472
WIRE 1824 880 1632 880
WIRE 1888 880 1824 880
WIRE 2016 880 1968 880
WIRE 2064 880 2016 880
WIRE 2176 880 2128 880
WIRE 2288 880 2176 880
WIRE 2400 880 2288 880
WIRE 1632 896 1632 880
WIRE 2288 896 2288 880
WIRE 2400 896 2400 880
WIRE 1824 944 1824 880
WIRE 2176 960 2176 880
WIRE 1632 992 1632 976
WIRE 2288 992 2288 960
WIRE 2400 992 2400 976
WIRE 2016 1024 2016 880
WIRE 2016 1024 1952 1024
WIRE 2176 1088 2176 1040
WIRE 2176 1088 1952 1088
WIRE 2176 1104 2176 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2176 1200 2176 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL RES 2384 880 R0
SYMATTR InstName Rload
SYMATTR Value 48
SYMBOL polcap 2272 896 R0
SYMATTR InstName C1
SYMATTR Value 500
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL VOLTAGE 1632 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LT1072HV 1824 1088 R0
SYMATTR InstName U1
SYMBOL RES 2160 944 R0
SYMATTR InstName R1
SYMATTR Value 10.7K
SYMBOL schottky 2064 896 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMBOL IND 1872 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL RES 2160 1088 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
FLAG 2400 880 OUT
FLAG 2176 1200 0
FLAG 2288 992 0
FLAG 2400 992 0
FLAG 2064 1248 0
FLAG 1824 1248 0
FLAG 1632 992 0
FLAG 1632 880 IN
TEXT 2264 1280 Left 2 !.tran 25m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2a22185895a6_Fig2_19.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Vin VD and the diode current
Vin Vin 0 PULSE(10 -10 10n 0.1n 0.1n 20n 40n)
R1 Vin VD 1k
D1 VD 0 Dtrr
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 25n
.model Dtrr D is=1e-15 tt=10E-9 cj0=1e-12 vj=0.7 m=0.33
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 0 240 0 224
WIRE 0 336 0 320
WIRE 48 224 0 224
WIRE 112 224 48 224
WIRE 256 224 192 224
WIRE 288 224 256 224
WIRE 288 240 288 224
WIRE 288 320 288 304
SYMBOL diode 272 240 R0
WINDOW 0 45 23 Left 0
WINDOW 3 38 56 Left 0
SYMATTR InstName D1
SYMATTR Value Dtrr
SYMBOL res 96 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 0 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -199 146 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(10 -10 10n 0.1n 0.1n 20n 40n)
FLAG 0 336 0
FLAG 288 320 0
FLAG 256 224 VD
FLAG 48 224 Vin
TEXT 40 400 Left 0 !.tran 25n
TEXT -112 440 Left 0 !.model Dtrr D is=1e-15 tt=10E-9 cj0=1e-12 vj=0.7 m=0.33
TEXT -40 152 Left 0 ;Plot Vin VD and the diode current
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2503-4.2.asc
* Generated by LTspice 26.0.1 for Windows.
* PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2503-4.2.asy)
L1 N001 N002 1.5 Rser=80m
Rload OUT 0 50
V1 IN 0 3.3
C1 OUT 0 10
XU1 N001 N002 OUT IN IN 0 OUT NC_01 ADP2503-4.2 ;pnba SW1)SW2)FB)EN)PVin)GND)Vout)Sync
.tran 400u startup
.lib ADP2503-4.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 48 64 32 64
WIRE 336 64 304 64
WIRE -64 80 -64 64
WIRE 32 144 32 64
WIRE 48 144 32 144
WIRE 336 144 304 144
WIRE -64 176 -64 160
WIRE 320 224 304 224
WIRE 368 224 320 224
WIRE 480 224 368 224
WIRE 368 240 368 224
WIRE 480 240 480 224
WIRE 48 304 32 304
WIRE 320 304 320 224
WIRE 320 304 304 304
WIRE 368 336 368 304
WIRE 480 336 480 320
SYMBOL res 464 224 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL ind 320 48 R0
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=80m
SYMBOL voltage -64 64 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap 352 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ADP2503-4.2 176 176 R0
SYMATTR InstName U1
FLAG 368 336 0
FLAG 32 304 0
FLAG -64 176 0
FLAG 480 336 0
FLAG -64 64 IN
FLAG 480 224 OUT
TEXT 432 392 Left 2 !.tran 400u startup
TEXT 192 8 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2942.asc
* Generated by LTspice 26.0.1 for Windows.
Vbatt IN 0 3.7
Rsense IN N002 100m
R1 IN N003 10K
V2 N002 0 PULSE(3.75 3.65 1s 10m 10m 1 2)
XU1 IN 0 N004 N005 N003 N002 N001 LTC2942 B_Reg=60 CD_Reg=32767 EF_Reg=32768 EF_Reg=65535 GH_Reg=0 GH_Reg=0 K_Reg=255 L_Reg=156 ;pnba Sense+)GND)StatusReg)ACRreg)_AL/CC)Sense-)VoltReg
.tran 5
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2942.asy)
.lib LTC2942.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1432 680
WIRE 80 -96 -128 -96
WIRE 464 -96 80 -96
WIRE 880 -96 464 -96
WIRE -128 -80 -128 -96
WIRE 464 -80 464 -96
WIRE 256 -32 256 -48
WIRE -128 16 -128 0
WIRE 80 16 80 -96
WIRE 96 16 80 16
WIRE 464 16 464 0
WIRE 464 16 416 16
WIRE 608 16 464 16
WIRE 720 16 688 16
WIRE 96 112 80 112
WIRE 512 112 416 112
WIRE 880 112 880 -96
WIRE 880 112 592 112
WIRE 96 208 80 208
WIRE 432 208 416 208
FLAG -128 16 0
FLAG 80 112 0
FLAG 720 16 0
FLAG -128 -96 IN
SYMBOL voltage -128 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vbatt
SYMATTR Value 3.7
SYMBOL res 448 -96 R0
SYMATTR InstName Rsense
SYMATTR Value 100m
SYMBOL res 608 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 592 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value PULSE(3.75 3.65 1s 10m 10m 1 2)
SYMBOL LTC2942 256 112 R0
SYMATTR InstName U1
SYMATTR Value B_Reg=60 CD_Reg=32767 EF_Reg=32768
SYMATTR SpiceLine2 GH_Reg=0 K_Reg=255 L_Reg=156
TEXT 640 224 Left 2 !.tran 5
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3009-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3009-5.asy)
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 1
XU1 IN OUT MP_01 0 IN LT3009-5 ;pnba IN)OUT))GND)_SHDN
Rload OUT 0 500
.tran 1
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 416 48 320 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL PowerProducts\\LT3009-5 176 96 R0
SYMATTR InstName U1
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 400 224 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\2b8f2a4538ca_LTC1728-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1728-3.3.asy)
V2 N004 0 PWL(0 1.05 7 1.05 8 .95 9 1.05)
R1 N002 N001 10K
V3 N005 0 PWL(0 1.8 4 1.8 5 1.5 6 1.8)
V1 N001 0 5
XU1 N002 0 N004 N005 N003 LTC1728-3.3 ;pnba _RST)GND)VccA)Vcc1.8)Vcc3
V4 N003 0 PWL(0 3.3 1 3.3 2 3 3 3.3)
.tran 10
.lib LTC1728-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1100 756
WIRE -160 144 -224 144
WIRE 48 144 -80 144
WIRE 464 144 272 144
WIRE 464 160 464 144
WIRE -224 176 -224 144
WIRE 48 208 16 208
WIRE 464 256 464 240
WIRE 48 272 -64 272
WIRE 384 272 272 272
WIRE -224 288 -224 256
WIRE 384 288 384 272
WIRE -64 304 -64 272
WIRE 384 384 384 368
WIRE -64 416 -64 384
SYMBOL voltage -224 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL LTC1728-3.3 160 240 R0
SYMATTR InstName U1
SYMBOL voltage 384 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 1.8 4 1.8 5 1.5 6 1.8)
SYMBOL voltage 464 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value PWL(0 3.3 1 3.3 2 3 3 3.3)
SYMBOL voltage -64 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 1.05 7 1.05 8 .95 9 1.05)
SYMBOL res -64 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 16 208 0
FLAG -224 288 0
FLAG -64 416 0
FLAG 384 384 0
FLAG 464 256 0
TEXT 528 432 Left 2 !.tran 10
* Z:\home\khalils\Downloads\files\data\raw_asc\0197eca502c5_bjt_switch_led.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 C LXZ1-PB01
V2 N001 0 5
Q1 C N004 0 0 2N2222
R2 N001 N002 10
V1 N003 0 5
R1 N003 N004 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 0 176 0
WIRE 448 0 368 0
WIRE 176 32 176 0
WIRE 176 144 176 112
WIRE 176 224 176 208
WIRE 176 240 176 224
WIRE 0 288 -128 288
WIRE 112 288 80 288
WIRE -128 304 -128 288
WIRE -128 448 -128 384
WIRE 176 448 176 336
WIRE 176 448 -128 448
WIRE 448 448 448 0
WIRE 448 448 176 448
WIRE 176 496 176 448
SYMBOL npn 112 240 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL res 160 16 R0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL voltage -128 288 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 272 0 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res -16 304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL LED 160 144 R0
SYMATTR InstName D1
SYMATTR Value LXZ1-PB01
FLAG 176 496 0
FLAG 176 224 C
TEXT -248 -16 Left 2 !.op