Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\fd03f49e784e_BJT_early.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 N002 0 0 QVA
VBE N002 0 0
VCE N001 0 1
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VCE 0 3 0.01 VBE 0.4 1 0.05
.model QVA NPN(IS=1E-14 VAF=5
+ BF=200 IKF=0.3 XTB=1.5 BR=3
+ CJC=8E-12 CJE=25E-12 TR=100E-9 TF=400E-12
+ ITF=1 VTF=2 XTF=3 RB=10 RC=.3 RE=.2 Vceo=30 Icrating=800m mfg=NXP)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1412 680
WIRE 320 80 160 80
WIRE 160 112 160 80
WIRE 320 128 320 80
WIRE 96 160 16 160
WIRE 16 176 16 160
WIRE 16 288 16 256
WIRE 160 288 160 208
WIRE 320 288 320 208
FLAG 16 288 0
FLAG 160 288 0
FLAG 320 288 0
SYMBOL npn 96 112 R0
SYMATTR InstName Q1
SYMATTR Value QVA
SYMBOL voltage 16 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VBE
SYMATTR Value 0
SYMBOL voltage 320 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VCE
SYMATTR Value 1
TEXT -16 328 Left 2 !.dc VCE 0 3 0.01 VBE 0.4 1 0.05
TEXT 456 144 Left 2 !.model QVA NPN(IS=1E-14 VAF=5\n+   BF=200 IKF=0.3 XTB=1.5 BR=3\n+   CJC=8E-12 CJE=25E-12 TR=100E-9 TF=400E-12\n+   ITF=1 VTF=2 XTF=3 RB=10 RC=.3 RE=.2 Vceo=30 Icrating=800m  mfg=NXP)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3028.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3028.asy)
R3 N002 0 6.6
R1 N002 N004 422K
R5 N008 0 249K
R6 N006 0 25
C1 N002 N003 .01
C4 N006 0 10
V2 N001 0 PWL(0 0 1 20)
C3 N002 0 10
XU1 N003 MP_01 N002 MP_02 0 N006 MP_03 N007 N008 N005 N005 MP_04 N001 MP_05 N001 N004 LT3028 ;pnba BYP1))OUT1))GND)OUT2))BYP2)ADJ2)_SHDN2)IN2))IN1))_SHDN1)ADJ1
R2 N004 0 249K
V1 N005 0 PWL(0 0 1 20)
R4 N006 N008 261K
C2 N006 N007 .01
.tran 1
.lib LT3028.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 96 -224 96
WIRE 16 96 -16 96
WIRE 336 96 304 96
WIRE 448 96 336 96
WIRE 560 96 448 96
WIRE 656 96 560 96
WIRE 560 112 560 96
WIRE 656 112 656 96
WIRE 336 160 304 160
WIRE -16 176 -16 96
WIRE 16 176 -16 176
WIRE -224 192 -224 176
WIRE 448 208 448 176
WIRE 448 208 304 208
WIRE 560 208 560 176
WIRE 656 208 656 192
WIRE -16 272 -224 272
WIRE 16 272 -16 272
WIRE 336 336 304 336
WIRE 448 336 336 336
WIRE 560 336 448 336
WIRE 656 336 560 336
WIRE -16 352 -16 272
WIRE 16 352 -16 352
WIRE 560 352 560 336
WIRE 656 352 656 336
WIRE -224 368 -224 352
WIRE 336 400 304 400
WIRE 16 448 -16 448
WIRE 448 448 448 416
WIRE 448 448 304 448
WIRE 560 448 560 416
WIRE 656 448 656 432
SYMBOL res 432 320 R0
SYMATTR InstName R4
SYMATTR Value 261K
SYMBOL res 432 192 R0
SYMATTR InstName R2
SYMATTR Value 249K
SYMBOL res 432 80 R0
SYMATTR InstName R1
SYMATTR Value 422K
SYMBOL res 640 96 R0
SYMATTR InstName R3
SYMATTR Value 6.6
SYMBOL cap 544 112 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL PowerProducts\\LT3028 160 272 R0
SYMATTR InstName U1
SYMBOL voltage -224 80 R0
WINDOW 0 28 35 Left 2
WINDOW 3 9 97 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 1 20)
SYMBOL voltage -224 256 R0
WINDOW 0 28 35 Left 2
WINDOW 3 9 97 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 20)
SYMBOL cap 544 352 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL res 432 432 R0
SYMATTR InstName R5
SYMATTR Value 249K
SYMBOL cap 320 336 R0
WINDOW 0 29 12 Left 2
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL cap 320 96 R0
WINDOW 0 27 14 Left 2
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL res 640 336 R0
SYMATTR InstName R6
SYMATTR Value 25
FLAG -16 448 0
FLAG -224 192 0
FLAG 448 288 0
FLAG 560 208 0
FLAG 656 208 0
FLAG 448 528 0
FLAG 560 448 0
FLAG 656 448 0
FLAG -224 368 0
TEXT 104 536 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\69a65cbca723_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 0 {L1}
L2 N002 0 {L2}
V1 N001 0 AC 1 Rser=1
R1 N002 0 2
k L1 L2 {k_acop}
* k*sqrt(L1/L2) = N1/N2 = a
.param k_acop = 1 L1 = 1 L2 = 2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 96 0 96
WIRE 384 96 240 96
WIRE 0 112 0 96
WIRE 112 128 112 96
WIRE 240 128 240 96
WIRE 384 128 384 96
WIRE 0 240 0 192
WIRE 112 240 112 208
WIRE 112 240 0 240
WIRE 176 240 112 240
WIRE 240 240 240 208
WIRE 240 240 176 240
WIRE 384 240 384 208
WIRE 384 240 240 240
WIRE 176 256 176 240
FLAG 176 256 0
SYMBOL ind2 96 112 R0
SYMATTR InstName L1
SYMATTR Value {L1}
SYMATTR Type ind
SYMBOL ind2 224 112 R0
SYMATTR InstName L2
SYMATTR Value {L2}
SYMATTR Type ind
SYMBOL voltage 0 96 R0
WINDOW 0 -69 8 Left 2
WINDOW 123 -77 107 Left 2
WINDOW 39 -91 134 Left 2
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMATTR SpiceLine Rser=1
SYMBOL res 368 112 R0
SYMATTR InstName R1
SYMATTR Value 2
TEXT 112 72 Left 2 !k L1 L2 {k_acop}
TEXT 64 40 Left 2 ;k*sqrt(L1/L2) = N1/N2 = a
TEXT -24 304 Left 2 !.param k_acop = 1 L1 = 1 L2 = 2
* Z:\home\khalils\Downloads\files\data\raw_asc\090edc8fe1d6_1920.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1920.asy)
V2 -V 0 -5
V1 +V 0 5
XU1 N001 N003 0 -V N004 OUT +V N002 LT1920 ;pnba Rg)In-)In+)V-)Ref)Out)V+)Rg
R3 N002 N001 1K
V3 0 N003 SINE(0 10m 1K)
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -32 -64 -128 -64
WIRE 160 -64 48 -64
WIRE -176 48 -400 48
WIRE -128 48 -128 -64
WIRE -112 48 -128 48
WIRE 160 48 160 -64
WIRE 160 48 144 48
WIRE -400 96 -400 48
WIRE 368 96 368 80
WIRE 480 96 480 80
WIRE -176 112 -176 48
WIRE -112 112 -176 112
WIRE 176 112 144 112
WIRE -112 176 -176 176
WIRE 176 176 144 176
WIRE 368 192 368 176
WIRE 480 192 480 176
WIRE -400 224 -400 176
WIRE -176 224 -176 176
WIRE -176 224 -400 224
WIRE -400 240 -400 224
WIRE -112 240 -144 240
WIRE 176 240 144 240
SYMBOL opamps\\LT1920 16 144 R0
SYMATTR InstName U1
SYMBOL voltage 480 80 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 64 -80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL voltage -400 192 M180
WINDOW 0 24 104 Left 0
WINDOW 3 24 16 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 10m 1K)
SYMBOL voltage 368 80 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 368 192 0
FLAG 368 80 +V
FLAG 176 112 +V
FLAG 480 192 0
FLAG 480 80 -V
FLAG -144 240 -V
FLAG -400 240 0
FLAG 176 176 OUT
TEXT 248 296 Left 0 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX34406H.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX34406H.asy)
VENA ENA 0 PWL(0 5 9m 5 +1n 0 +250u 0 +1n 5)
Rsense IN+ IN- 5m
Iload IN- 0 PWL(0 1 1m 1 +1n 5 8m 5 +1n 1)
Rpu1 VDD OC 10k
XU1 IN+ IN- VDD 0 OUT OC ENA SHTDN CDLY MAX34406H ;pnba IN+)IN-)VDD)GND)OUT)OC)ENA)SHTDN)CDLY
Vcm IN+ 0 12
R1 OUT 0 1Meg
C1 OUT 0 100p
Ccdly CDLY 0 10n
Rpu2 VDD SHTDN 10k
VDD VDD 0 5
.tran 10m
.lib MAX34406H.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 -64 112 -64
WIRE 240 -64 208 -64
WIRE 416 -64 240 -64
WIRE 528 -64 416 -64
WIRE 112 -48 112 -64
WIRE 416 -32 416 -64
WIRE 528 -32 528 -64
WIRE 240 0 240 -64
WIRE 240 32 240 0
WIRE -336 64 -448 64
WIRE 112 64 -336 64
WIRE 144 64 112 64
WIRE -336 80 -336 64
WIRE 368 80 336 80
WIRE 416 80 416 48
WIRE 416 80 368 80
WIRE 384 128 336 128
WIRE 528 128 528 48
WIRE 528 128 384 128
WIRE -336 176 -336 160
WIRE 112 176 -336 176
WIRE 144 176 112 176
WIRE 368 176 336 176
WIRE 528 176 368 176
WIRE 640 176 528 176
WIRE -448 208 -448 64
WIRE -336 208 -336 176
WIRE 528 208 528 176
WIRE 112 224 -48 224
WIRE 144 224 112 224
WIRE 640 224 640 176
WIRE 112 272 64 272
WIRE 144 272 112 272
WIRE 528 304 528 288
WIRE 640 304 640 288
WIRE 240 320 240 304
WIRE -448 352 -448 288
WIRE -336 352 -336 288
WIRE -336 352 -448 352
WIRE 64 352 64 272
WIRE -448 368 -448 352
WIRE -48 368 -48 224
WIRE -48 448 -48 432
WIRE 64 448 64 432
SYMBOL voltage 64 336 R0
SYMATTR InstName VENA
SYMATTR Value PWL(0 5 9m 5 +1n 0 +250u 0 +1n 5)
SYMBOL MAX34406H 240 176 R0
WINDOW 0 75 -153 Bottom 2
WINDOW 3 109 138 Top 2
SYMATTR InstName U1
SYMBOL current -336 208 R0
WINDOW 123 24 106 Left 2
SYMATTR Value2 8m 5 +1n 1)
SYMATTR InstName Iload
SYMATTR Value PWL(0 1 1m 1 +1n 5
SYMBOL cap -64 368 R0
SYMATTR InstName Ccdly
SYMATTR Value 10n
SYMBOL res 512 -48 R0
SYMATTR InstName Rpu2
SYMATTR Value 10k
SYMBOL cap 624 224 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL res 400 -48 R0
SYMATTR InstName Rpu1
SYMATTR Value 10k
SYMBOL res -352 64 R0
SYMATTR InstName Rsense
SYMATTR Value 5m
SYMBOL voltage -448 192 R0
SYMATTR InstName Vcm
SYMATTR Value 12
SYMBOL voltage 224 -64 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL res 512 192 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
FLAG 240 320 0
FLAG -48 448 0
FLAG 528 304 0
FLAG 640 304 0
FLAG 368 176 OUT
FLAG 384 128 SHTDN
FLAG 368 80 OC
FLAG 112 -48 0
FLAG 240 0 VDD
FLAG -448 368 0
FLAG 112 224 CDLY
FLAG 64 448 0
FLAG 112 64 IN+
FLAG 112 176 IN-
FLAG 112 272 ENA
TEXT -496 472 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4648.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4648.asy)
C1 N002 0 .001
XU1 N002 NC_01 N003 MP_02 MP_03 MP_04 MP_05 MP_06 N001 OUT 0 N001 MP_07 OUT MP_08 NC_09 MP_10 0 MP_11 0 MP_12 MP_13 MP_14 MP_15 NC_16 IN MP_17 MP_18 MP_19 MP_20 NC_21 NC_22 NC_23 NC_24 NC_25 MP_26 MP_27 NC_28 LTM4648 ;pnba Track/SS)COMP)FB))))))Vout_lcl)Diffp)Diffn)Diffout))Vout))Pgood))GND))Mode)))))INTVcc)Vin)))))SW)CLKout)PHmode)CLKin)FREQ)))Run
R1 N003 0 6.65K
V1 IN 0 4
Rload OUT 0 .15
C2 OUT 0 100 x2 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C575OX5ROJI07M" type="X5R"
.tran 1m startup
.lib LTM4648.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 712
WIRE 64 -80 -64 -80
WIRE 480 -80 448 -80
WIRE 560 -80 480 -80
WIRE 688 -80 560 -80
WIRE -64 -64 -64 -80
WIRE 560 -64 560 -80
WIRE 688 -64 688 -80
WIRE 464 16 448 16
WIRE -64 32 -64 16
WIRE 560 32 560 0
WIRE 688 32 688 16
WIRE 64 112 48 112
WIRE 464 112 464 16
WIRE 464 112 448 112
WIRE 480 208 480 -80
WIRE 480 208 448 208
WIRE 464 304 448 304
WIRE -32 496 -48 496
WIRE 64 496 32 496
WIRE 464 496 448 496
WIRE 560 496 544 496
WIRE 256 672 256 656
SYMBOL PowerProducts\\LTM4648 256 256 R0
SYMATTR InstName U1
SYMBOL cap 544 -64 R0
WINDOW 123 30 76 Left 2
SYMATTR Value2 x2
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C575OX5ROJI07M" type="X5R"
SYMBOL res 672 -80 R0
SYMATTR InstName Rload
SYMATTR Value .15
SYMBOL voltage -64 -80 R0
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL res 448 512 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 6.65K
SYMBOL cap 32 480 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .001
FLAG 256 672 0
FLAG -64 32 0
FLAG 48 112 0
FLAG -48 496 0
FLAG 560 496 0
FLAG 560 32 0
FLAG 688 32 0
FLAG 464 304 0
FLAG -64 -80 IN
FLAG 688 -80 OUT
TEXT 560 616 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2164-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N002 OUT 1 Rser=6m
R4 N003 0 45.3K
V1 IN 0 5
Rload OUT 0 0.6
R3 OUT N004 100K
R5 IN N001 10
C3 OUT 0 80 Rser=2m
C1 N001 0 100n
XU1 N001 N003 IN OUT 0 0 N002 IN N001 N001 N004 ADP2164-x.x Rtop=667K Rbot=333K ;pnba Sync)Rt)TRK)FB)GND)PGND)SW)Pvin)Vin)EN)Pgood
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2164-1.8.asy)
.lib ADP2164-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 728
WIRE -80 -112 -288 -112
WIRE 176 -112 -80 -112
WIRE 384 -112 176 -112
WIRE -288 -96 -288 -112
WIRE -80 -96 -80 -112
WIRE 176 -80 176 -112
WIRE -288 0 -288 -16
WIRE -160 0 -176 0
WIRE -80 0 -80 -16
WIRE -80 0 -96 0
WIRE 0 0 -80 0
WIRE 384 0 384 -112
WIRE 384 0 352 0
WIRE -80 112 -80 0
WIRE 0 112 -80 112
WIRE 384 112 352 112
WIRE 496 112 464 112
WIRE 576 112 496 112
WIRE 672 112 576 112
WIRE 576 128 576 112
WIRE 672 128 672 112
WIRE -80 224 -80 112
WIRE 0 224 -80 224
WIRE 496 224 496 112
WIRE 496 224 352 224
WIRE 576 224 576 192
WIRE 672 224 672 208
WIRE -96 368 -112 368
WIRE 0 368 -16 368
WIRE 384 368 352 368
WIRE 496 368 496 224
WIRE 496 368 464 368
WIRE 112 496 112 480
WIRE 240 496 240 480
FLAG 112 496 0
FLAG -112 368 0
FLAG -288 0 0
FLAG 576 224 0
FLAG 672 224 0
FLAG 672 112 OUT
FLAG -288 -112 IN
FLAG 240 496 0
FLAG -176 0 0
SYMBOL ind 368 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=6m
SYMBOL res 0 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 45.3K
SYMBOL voltage -288 -112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 656 112 R0
SYMATTR InstName Rload
SYMATTR Value 0.6
SYMBOL res 480 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res -96 -112 R0
SYMATTR InstName R5
SYMATTR Value 10
SYMBOL cap 560 128 R0
SYMATTR InstName C3
SYMATTR Value 80
SYMATTR SpiceLine Rser=2m
SYMBOL cap -96 16 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL ADP2164-1.8 176 192 R0
SYMATTR InstName U1
TEXT 632 400 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7156-2.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7156-2.0.asy)
Rload OUT 0 2
XU1 OUT MP_01 OUT N002 N001 N003 N003 N004 IN 0 ADP7156_7 Vreg=2.611 Vref=2.016 ;pnba Vout))Vout_Sense)Byp)EN)Ref_Sense)Ref)Vreg)Vin)GND
C1 OUT 0 10
V1 IN 0 3
R1 IN N001 100K
C4 N002 0 1
C2 N003 0 1
C3 N004 0 1
.tran 5m startup
.lib ADP7156_7.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -144 32
WIRE 80 32 -32 32
WIRE 416 32 400 32
WIRE 464 32 416 32
WIRE 560 32 464 32
WIRE -144 48 -144 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE 416 128 416 32
WIRE 416 128 400 128
WIRE -144 144 -144 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE 80 224 64 224
WIRE 416 224 400 224
WIRE 464 224 416 224
WIRE 464 240 464 224
WIRE 0 320 -16 320
WIRE 80 320 64 320
WIRE 416 320 416 224
WIRE 416 320 400 320
WIRE 464 320 464 304
WIRE 240 400 240 384
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL voltage -144 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL cap 64 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL ADP7156-2.0 240 176 R0
SYMATTR InstName U1
SYMBOL cap 448 240 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 544 32 R0
SYMATTR InstName Rload
SYMATTR Value 2
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap 448 48 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 240 400 0
FLAG 464 320 0
FLAG 464 144 0
FLAG -16 320 0
FLAG 0 224 0
FLAG -144 144 0
FLAG 560 144 0
FLAG -144 32 IN
FLAG 560 32 OUT
TEXT 504 368 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\39d0249bd129_fig-01-03-21.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4177-2.asy)
VS1 VCC 0 15
V1 VIN 0 0
E1 VOUT 0 N002 0 -1
XU1 0 N001 VCC VEE N002 ADA4177 ;pnba In+)In-)V+)V-)OUT
R1 N001 VIN 10k
Q1 N001 0 N002 0 2N2222
VS2 0 VEE 15
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc dec V1 10n 100 100
.lib ADA4177.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -32 128 -32
WIRE 304 -32 256 -32
WIRE 208 48 208 32
WIRE 208 96 208 80
WIRE 480 96 432 96
WIRE 208 144 208 96
WIRE -32 160 -48 160
WIRE 16 160 -32 160
WIRE 128 160 128 -32
WIRE 128 160 96 160
WIRE 176 160 128 160
WIRE 432 160 432 96
WIRE 304 176 304 -32
WIRE 304 176 240 176
WIRE 384 176 304 176
WIRE 176 192 128 192
WIRE -48 208 -48 160
WIRE 128 224 128 192
WIRE 384 224 368 224
WIRE 208 240 208 208
WIRE 208 256 208 240
WIRE 368 256 368 224
WIRE 432 256 432 240
WIRE 432 256 368 256
WIRE 432 272 432 256
WIRE 272 288 272 272
WIRE 336 288 336 272
WIRE -48 336 -48 288
WIRE 272 336 272 288
WIRE 336 336 336 288
WIRE 272 432 272 416
WIRE 336 432 336 416
IOPIN 480 96 Out
SYMBOL Opamps\\ADA4177-2 208 176 R0
SYMATTR InstName U1
SYMBOL npn 160 32 R270
WINDOW 0 79 -30 VRight 2
WINDOW 3 79 74 VRight 2
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL e 432 144 R0
SYMATTR InstName E1
SYMATTR Value -1
SYMBOL Misc\\battery 272 432 R180
WINDOW 0 24 104 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName VS2
SYMATTR Value 15
SYMBOL voltage -48 192 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL Misc\\battery 336 320 R0
WINDOW 0 9 8 Left 2
WINDOW 3 15 97 Left 2
SYMATTR InstName VS1
SYMATTR Value 15
FLAG -48 336 0
FLAG -32 160 VIN
FLAG 272 432 0
FLAG 336 432 0
FLAG 272 288 VEE
FLAG 336 288 VCC
FLAG 208 96 VCC
FLAG 208 240 VEE
FLAG 480 96 VOUT
FLAG 208 48 0
FLAG 128 224 0
FLAG 432 272 0
TEXT -72 400 Left 2 !.dc dec V1 10n 100 100
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG419.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG419.asy)
V5 D 0 SINE(0 10 2k)
XU1 IN S1 D S2 +V -V 0 ADG419 ;pnba IN)S1)D)S2)Vdd)Vss)GND
R1 S1 0 1K
V1 +V 0 15
R2 S2 0 1K
V2 -V 0 -15
V4 IN 0 pulse(0 3.3 0 1u 1u 5m 10m)
.tran 30m
.lib ADG419.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -752 -368 -800 -368
WIRE -800 -320 -800 -368
WIRE -1216 -256 -1216 -272
WIRE -1056 -256 -1072 -256
WIRE -912 -256 -976 -256
WIRE -896 -256 -912 -256
WIRE -688 -224 -704 -224
WIRE -656 -224 -688 -224
WIRE -544 -224 -576 -224
WIRE -1008 -192 -1072 -192
WIRE -912 -192 -928 -192
WIRE -896 -192 -912 -192
WIRE -1216 -160 -1216 -176
WIRE -1040 -128 -1072 -128
WIRE -896 -128 -1040 -128
WIRE -1216 -48 -1216 -64
WIRE -1072 -16 -1072 -128
WIRE -736 0 -736 -16
WIRE -864 16 -864 -16
WIRE -832 16 -864 16
WIRE -1216 48 -1216 32
WIRE -1072 80 -1072 64
SYMBOL voltage -1216 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -1072 -32 R0
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMBOL voltage -1216 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL ADG419 -800 -176 R0
SYMATTR InstName U1
SYMBOL res -960 -240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -672 -224 R270
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 47 41 VRight 2
WINDOW 3 -46 -22 VRight 2
SYMATTR InstName V5
SYMATTR Value SINE(0 10 2k)
SYMBOL res -912 -176 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 1K
FLAG -1216 48 0
FLAG -1216 -160 0
FLAG -1216 -272 +V
FLAG -1216 -64 -V
FLAG -544 -224 0
FLAG -1072 80 0
FLAG -1072 -256 0
FLAG -1072 -192 0
FLAG -752 -368 +V
FLAG -736 0 0
FLAG -832 16 -V
FLAG -912 -256 S1
FLAG -912 -192 S2
FLAG -688 -224 D
FLAG -1040 -128 IN
TEXT -672 24 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\ffddca617b9d_INAInside.asc
* Generated by LTspice 26.0.1 for Windows.
Rout vo 0 100k
Rin N002 N001 100k
R2 N004 N005 100k
V1 N001 0 12
Rshunt N001 N005 0.1
R4 N005 0 150m
B1 ideal 0 V=11/500*I(R4)
M1 N002 N003 vo vo BSS145
C1 N002 N004 100n
C2 vo 0 1n
XU1 N002 N004 N001 0 N003 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
C3 N001 0 1n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1
* Vmeas=11/500*Iload
.lib opamp.sub
* Rs*IL/100k =Vo/22k
* Vo= RShunt*Load* Rout/Rin
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1072 760
WIRE 112 368 0 368
WIRE 368 368 112 368
WIRE 656 368 432 368
WIRE 0 400 0 368
WIRE 656 400 656 368
WIRE 512 448 512 432
WIRE 112 464 112 368
WIRE 176 464 112 464
WIRE 288 464 256 464
WIRE 432 464 432 368
WIRE 432 464 288 464
WIRE 480 464 432 464
WIRE 112 480 112 464
WIRE 288 480 288 464
WIRE 608 480 544 480
WIRE 480 496 336 496
WIRE 0 528 0 480
WIRE 656 544 656 496
WIRE 656 544 576 544
WIRE 720 544 656 544
WIRE 736 544 720 544
WIRE 800 544 800 512
WIRE 368 560 368 368
WIRE 400 560 368 560
WIRE 512 560 512 512
WIRE 512 560 400 560
WIRE 656 560 656 544
WIRE 112 576 112 560
WIRE 176 576 112 576
WIRE 288 576 288 544
WIRE 288 576 256 576
WIRE 336 576 336 496
WIRE 336 576 288 576
WIRE 400 576 400 560
WIRE 576 576 576 544
WIRE 112 624 112 576
WIRE 400 656 400 640
WIRE 576 656 576 640
WIRE 656 656 656 640
WIRE 112 720 112 704
FLAG 656 656 0
FLAG 512 432 0
FLAG 112 720 0
FLAG 0 528 0
FLAG 800 624 0
FLAG 800 512 ideal
FLAG 720 544 vo
FLAG 576 656 0
FLAG 400 656 0
SYMBOL res 640 544 R0
SYMATTR InstName Rout
SYMATTR Value 100k
SYMBOL res 272 448 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rin
SYMATTR Value 100k
SYMBOL res 272 560 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL voltage 0 384 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 96 464 R0
WINDOW 0 37 52 Left 2
SYMATTR InstName Rshunt
SYMATTR Value 0.1
SYMBOL res 96 608 R0
SYMATTR InstName R4
SYMATTR Value 150m
SYMBOL bv 800 528 R0
SYMATTR InstName B1
SYMATTR Value V=11/500*I(R4)
SYMBOL nmos 608 400 R0
SYMATTR InstName M1
SYMATTR Value BSS145
SYMBOL cap 272 480 R0
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL cap 560 576 R0
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL OpAmps\\UniversalOpAmp2 512 480 M180
SYMATTR InstName U1
SYMBOL cap 384 576 R0
SYMATTR InstName C3
SYMATTR Value 1n
TEXT 208 720 Left 2 !.tran 1
TEXT 208 688 Left 2 ;Vmeas=11/500*Iload
TEXT 216 664 Left 2 !.lib opamp.sub
TEXT 488 712 Left 2 ;Rs*IL/100k =Vo/22k
TEXT 336 744 Left 2 ;Vo= RShunt*Load* Rout/Rin