Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\36d387ad9e0a_Filter01Fig.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
;tran 0.001 0.005 0
V2 0 Vnn {Vs}
XU1 0 N001 Vpp Vnn o level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R1 N001 i {R1}
Vi i 0 AC 1.
R2 o N001 {R2}
V1 Vpp 0 {Vs}
C2 o N001 {C2}
RL o 0 {RL}
.param Vs=?? R1=?? R2=?? C2=?? RL=??
.ac dec 10 1 100k
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE 144 0 64 0
WIRE 288 0 224 0
WIRE 64 96 64 0
WIRE 144 96 64 96
WIRE 288 96 288 0
WIRE 288 96 208 96
WIRE -96 144 -160 144
WIRE 64 144 64 96
WIRE 64 144 -16 144
WIRE 512 144 464 144
WIRE 464 160 464 144
WIRE 512 176 512 144
WIRE 64 208 64 144
WIRE 128 208 64 208
WIRE 288 224 288 96
WIRE 288 224 192 224
WIRE 320 224 288 224
WIRE -160 240 -160 144
WIRE 128 240 64 240
WIRE 320 256 320 224
WIRE 64 288 64 240
WIRE 320 352 320 336
WIRE -160 368 -160 320
SYMBOL res 0 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL res 304 240 R0
SYMATTR InstName RL
SYMATTR Value {RL}
SYMBOL voltage 512 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vs}
SYMBOL Opamps\\UniversalOpamp2 160 224 R0
SYMATTR InstName U1
SYMBOL cap 208 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {C2}
SYMBOL voltage -160 224 R0
WINDOW 3 41 76 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 45 41 Left 2
SYMATTR Value AC 1.
SYMATTR InstName Vi
SYMBOL res 240 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL voltage 512 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value {Vs}
FLAG 512 64 Vpp
FLAG 464 160 0
FLAG 512 256 Vnn
FLAG 320 352 0
FLAG -160 368 0
FLAG 160 192 Vpp
FLAG 160 256 Vnn
FLAG 64 288 0
FLAG 320 224 o
FLAG -160 144 i
TEXT -176 408 Left 2 !.param Vs=?? R1=?? R2=??  C2=?? RL=??
TEXT -400 -160 Left 2 !;tran 0.001 0.005 0
TEXT -104 368 Left 2 !.ac dec 10 1 100k
* Z:\home\khalils\Downloads\files\data\raw_asc\a09664f18a47_Draft2P.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 VG N002 N001 pch l=lset w=wset
VGS2 N001 VG 1
VUDS N001 N002 0.9
V1 N001 0 1.8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib cmos018.txt
.dc VGS2 0 1 1m
.param wset=table(n, 1,0.22u, 2,1u, 3,2u, 4,2u, 5,5u, 6,5u, 7,10u, 8,10u, 9,40u)
.param lset=table(n, 1,0.18u, 2,0.5u, 3,0.5u, 4,1u, 5,1u, 6,2u, 7,5u, 8,10u, 9,10u)
.step param n 1 9 1
.meas DC UTH FIND V(VG) WHEN Id(M1)=100n*wset/lset
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1356 680
WIRE 224 176 32 176
WIRE 544 176 224 176
WIRE 720 176 544 176
WIRE 32 192 32 176
WIRE 224 224 224 176
WIRE 240 224 224 224
WIRE 544 224 544 176
WIRE 720 224 720 176
WIRE 240 272 240 224
WIRE 240 272 224 272
WIRE 32 304 32 272
WIRE 112 304 32 304
WIRE 176 304 112 304
WIRE 224 352 224 320
WIRE 544 352 544 304
WIRE 544 352 224 352
WIRE 720 368 720 304
FLAG 112 304 VG
FLAG 720 368 0
SYMBOL pmos4 176 224 R0
WINDOW 123 75 75 Left 2
WINDOW 0 75 14 Left 2
WINDOW 3 75 45 Left 2
SYMATTR Value2 l=lset w=wset
SYMATTR InstName M1
SYMATTR Value pch
SYMBOL voltage 32 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS2
SYMATTR Value 1
SYMBOL voltage 544 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName UDS
SYMATTR Value 0.9
SYMBOL voltage 720 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
TEXT -40 -64 Left 2 !.lib cmos018.txt
TEXT -40 96 Left 2 !.dc VGS2 0 1 1m
TEXT -40 -16 Left 2 !.param wset=table(n, 1,0.22u, 2,1u, 3,2u, 4,2u, 5,5u, 6,5u, 7,10u, 8,10u, 9,40u)\n.param lset=table(n, 1,0.18u, 2,0.5u, 3,0.5u, 4,1u, 5,1u, 6,2u, 7,5u, 8,10u, 9,10u)\n.step param n 1 9 1\n.meas DC UTH FIND V(VG) WHEN Id(M1)=100n*wset/lset
* Z:\home\khalils\Downloads\files\data\raw_asc\1ea338c01c33_ADuM4121A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4121A.asy)
V2 N002 0 15
V3 N003 0 PULSE(0 5 0 2n 2n 998n 2u)
V1 N001 0 5
C1 OUT 0 2n
R1 OUT N004 5
XU1 N001 N003 0 0 0 OUT N004 N002 ADuM4121A ;pnba Vdd1)VI+)VI-)GND1)GND2)Clamp)Vout)Vdd2
.tran 100u startup
.lib ADuM4121A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -16 -240 -16
WIRE 640 -16 320 -16
WIRE -240 0 -240 -16
WIRE 640 0 640 -16
WIRE 160 64 160 -16
WIRE 320 64 320 -16
WIRE -240 96 -240 80
WIRE 640 96 640 80
WIRE 112 128 -240 128
WIRE 384 128 368 128
WIRE 480 128 464 128
WIRE 528 128 480 128
WIRE -240 144 -240 128
WIRE 528 144 528 128
WIRE 112 192 96 192
WIRE 480 192 480 128
WIRE 480 192 368 192
WIRE 528 224 528 208
WIRE -240 240 -240 224
WIRE 160 272 160 256
WIRE 320 272 320 256
SYMBOL voltage -240 128 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 2n 2n 998n 2u)
SYMBOL cap 512 144 R0
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL res 480 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL voltage -240 -16 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 640 -16 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL PowerProducts\\ADUm4121A 240 160 R0
SYMATTR InstName U1
FLAG 160 272 0
FLAG 320 272 0
FLAG 528 224 0
FLAG 528 128 OUT
FLAG 640 96 0
FLAG -240 96 0
FLAG -240 240 0
FLAG 96 192 0
TEXT 440 288 Left 2 !.tran 100u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\37bc6363bb6d_OP_AMP_Integrator.asc
* Generated by LTspice 26.0.1 for Windows.
* OP AMP INTEGRATOR
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
V1 0 N006 12V
R1 N001 N004 10k
R3 N005 0 10k
R4 0 N002 10k
V3 N004 0 SINE(0 5 1k)
V2 N003 0 12V
C1 N002 N001 10n
XU1 N005 N001 N003 N006 N002 LT1001 ;pnba In+)In-)V+)V-)OUT
R2 N002 N001 100k
.tran 0 10m 1m 0.01m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -176 32 -176
WIRE 368 -176 224 -176
WIRE 32 -64 32 -176
WIRE 160 -64 32 -64
WIRE 368 -64 368 -176
WIRE 368 -64 240 -64
WIRE 224 32 176 32
WIRE 320 32 304 32
WIRE 320 64 320 32
WIRE 176 112 176 32
WIRE -128 128 -176 128
WIRE 32 128 32 -64
WIRE 32 128 -48 128
WIRE 144 128 32 128
WIRE 368 144 368 -64
WIRE 368 144 208 144
WIRE 448 144 368 144
WIRE 144 160 32 160
WIRE 448 176 448 144
WIRE -176 192 -176 128
WIRE -80 192 -112 192
WIRE 32 192 32 160
WIRE 32 192 0 192
WIRE 176 224 176 176
WIRE -112 256 -112 192
WIRE 448 288 448 256
WIRE -176 304 -176 272
WIRE 176 336 176 304
SYMBOL voltage 208 32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value 12V
SYMBOL res 464 272 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL res 16 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 256 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL cap 224 -192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL OpAmps\\OP07 176 80 R0
SYMATTR InstName U1
SYMBOL voltage 176 320 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
SYMATTR Value 12V
SYMBOL res -32 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -176 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 5 1k)
FLAG 320 64 0
FLAG 176 336 0
FLAG 448 288 0
FLAG -112 256 0
FLAG -176 304 0
TEXT -240 40 Left 2 ;OP AMP INTEGRATOR
TEXT -144 344 Left 2 !.tran 0 10m 1m 0.01m
* Z:\home\khalils\Downloads\files\data\raw_asc\26b7be0a2aba_1006S8.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain 100 Amplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1006S8.asy)
XU1 IN N001 +V 0 OUT LT1006 ;pnba In+)In-)V+)V-)OUT
R2 N001 0 1K
R1 OUT N001 99K
V3 IN 0 SINE(5m 1m 1K)
R3 OUT 0 660
V1 +V 0 5
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 112 16 112
WIRE 128 112 112 112
WIRE 160 112 128 112
WIRE 272 112 240 112
WIRE 192 208 192 192
WIRE 128 224 128 112
WIRE 160 224 128 224
WIRE -80 240 -80 224
WIRE 272 240 272 112
WIRE 272 240 224 240
WIRE 336 240 272 240
WIRE 160 256 48 256
WIRE 336 256 336 240
WIRE 48 272 48 256
WIRE 192 288 192 272
WIRE -80 336 -80 320
WIRE 336 352 336 336
WIRE 48 368 48 352
SYMBOL voltage 48 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(5m 1m 1K)
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 99K
SYMBOL voltage -80 224 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 320 240 R0
SYMATTR InstName R3
SYMATTR Value 660
SYMBOL opamps\\LT1006S8 192 176 R0
SYMATTR InstName U1
FLAG -80 336 0
FLAG 192 192 +V
FLAG -80 224 +V
FLAG 16 112 0
FLAG 48 368 0
FLAG 192 288 0
FLAG 336 352 0
FLAG 336 240 OUT
FLAG 48 256 IN
TEXT 288 400 Left 0 !.tran 3m
TEXT 152 56 Bottom 0 ;Gain 100 Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1575-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1575-2.8.asy)
M3 N001 N003 OUT OUT IRFZ24
C3 N005 0 1000p
I2 OUT 0 PULSE(.2 5 300u 100n 100n 300u 600u) load
V2 N002 0 12
C1 OUT 0 24
XU1 0 N002 0 OUT N004 N003 N001 N001 LT1575-2.8 ;pnba SHDN)Vin)GND)OUT)Comp)Gate)Ineg)Ipos
V1 N001 0 5
R3 N004 N005 5K
C2 N004 0 10p
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m
.lib LT1575.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4232 1996
WIRE 2352 -32 2336 -32
WIRE 2688 -32 2640 -32
WIRE 2928 -32 2688 -32
WIRE 3008 -32 2928 -32
WIRE 3008 -16 3008 -32
WIRE 2352 64 2240 64
WIRE 2688 64 2688 -32
WIRE 2688 64 2640 64
WIRE 2240 80 2240 64
WIRE 2928 80 2928 -32
WIRE 3008 80 3008 64
WIRE 2352 160 2336 160
WIRE 2880 160 2640 160
WIRE 2240 176 2240 160
WIRE 2352 256 2336 256
WIRE 2672 256 2640 256
WIRE 2704 256 2672 256
WIRE 2816 256 2784 256
WIRE 2672 272 2672 256
WIRE 2816 272 2816 256
WIRE 2672 352 2672 336
WIRE 2816 352 2816 336
WIRE 2336 400 2336 256
WIRE 2928 400 2928 176
WIRE 2928 400 2336 400
WIRE 3056 400 2928 400
WIRE 2928 416 2928 400
WIRE 3056 416 3056 400
WIRE 2928 512 2928 480
WIRE 3056 512 3056 496
SYMBOL cap 2912 416 R0
SYMATTR InstName C1
SYMATTR Value 24
SYMBOL cap 2656 272 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL res 2688 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 5K
SYMBOL voltage 2240 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL nmos 2880 80 R0
SYMATTR InstName M3
SYMATTR Value IRFZ24
SYMBOL cap 2800 272 R0
SYMATTR InstName C3
SYMATTR Value 1000p
SYMBOL LT1575-2.8 2496 112 R0
SYMATTR InstName U1
SYMBOL voltage 3008 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL current 3056 416 R0
WINDOW 123 0 0 Left 2
WINDOW 39 46 42 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I2
SYMATTR Value PULSE(.2 5 300u 100n 100n 300u 600u)
FLAG 2928 512 0
FLAG 3056 512 0
FLAG 3008 80 0
FLAG 2816 352 0
FLAG 2672 352 0
FLAG 2336 -32 0
FLAG 2240 176 0
FLAG 2336 160 0
FLAG 3056 400 OUT
TEXT 3288 576 Left 2 !.tran 1m
* Z:\tmp\asc_dec_bjh7r6w2\080359a28366_1_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N002 N003 NC_01 NC_02 out level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R1 N001 in 4.2k
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp1.asy)
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 48 160 48
WIRE 480 48 368 48
WIRE 48 128 32 128
WIRE 160 128 160 48
WIRE 160 128 128 128
WIRE 192 128 160 128
WIRE 304 128 272 128
WIRE 368 128 304 128
WIRE 480 144 480 48
WIRE 480 144 432 144
WIRE 496 144 480 144
WIRE 304 160 304 128
WIRE 368 160 352 160
WIRE 32 208 32 128
WIRE 352 240 352 160
WIRE 384 240 352 240
WIRE 480 240 480 144
WIRE 480 240 464 240
WIRE 352 272 352 240
SYMBOL OpAmps\\UniversalOpAmp1 400 144 M180
SYMATTR InstName U1
SYMBOL res 144 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 4.2k
FLAG 304 224 0
FLAG 32 128 in
FLAG 496 144 out
FLAG 32 288 0
* Z:\home\khalils\Downloads\files\data\raw_asc\0f70e93bbae4_TR_Debugging.asc
* Generated by LTspice 26.0.1 for Windows.
;tran 100m
R3 N002 N006 10k
M1 N006 N008 0 0 NMOS
R4 N008 N007 10k
V1 N001 0 5v
R1 N001 N003 10k
R2 N005 N004 10k
V3 N002 0 5v
Q1 N003 N005 0 0 NPN
V2 N004 0 15v
V4 N007 0 15v
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -160 80 -160
WIRE 80 -128 80 -160
WIRE -272 -48 -400 -48
WIRE 208 -32 208 -160
WIRE -400 -16 -400 -48
WIRE 80 -16 80 -48
WIRE -272 80 -272 -48
WIRE -400 96 -400 64
WIRE 208 96 208 48
WIRE 48 144 16 144
WIRE 144 144 128 144
WIRE 16 160 16 144
WIRE -272 208 -272 160
WIRE 208 240 208 192
WIRE -432 256 -464 256
WIRE -336 256 -352 256
WIRE -464 272 -464 256
WIRE 16 272 16 240
WIRE -336 288 -336 256
WIRE -320 288 -336 288
WIRE -272 352 -272 304
WIRE -464 384 -464 352
SYMBOL voltage -464 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 15v
SYMBOL voltage 16 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15v
SYMBOL voltage 80 -144 R0
SYMATTR InstName V1
SYMATTR Value 5v
SYMBOL res -336 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL npn 144 96 R0
SYMATTR InstName Q1
SYMBOL voltage -400 -32 R0
SYMATTR InstName V3
SYMATTR Value 5v
SYMBOL res 192 -48 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL nmos -320 208 R0
SYMATTR InstName M1
SYMBOL res -288 64 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 144 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
FLAG 80 -16 0
FLAG 16 272 0
FLAG 208 240 0
FLAG -400 96 0
FLAG -464 384 0
FLAG -272 352 0
TEXT -18 296 Left 2 !.tran 100m
TEXT -498 408 Left 2 !;tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\01163c7cfe9c_diode-va-forward.asc
* Generated by LTspice 26.0.1 for Windows.
D1 a b RB495D
R1 b 0 1k
V1 a 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 30
.step temp list 0 25 50 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 208 -64 208
WIRE 160 208 80 208
WIRE -64 240 -64 208
WIRE 160 240 160 208
WIRE -64 352 -64 320
WIRE 48 352 -64 352
WIRE 160 352 160 320
WIRE 160 352 48 352
WIRE 48 368 48 352
SYMBOL voltage -64 224 R0
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL schottky 16 224 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 -7 36 VBottom 2
SYMATTR InstName D1
SYMATTR Value RB495D
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL Misc\\EuropeanResistor 144 224 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG -64 208 a
FLAG 160 208 b
FLAG 48 368 0
TEXT -96 400 Left 2 !.dc V1 0 30
TEXT -96 424 Left 2 !.step temp list 0 25 50 100
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3090.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3090.asy)
C2 OUT 0 4.7 Rser=10m
Rload OUT 0 4.16
V2 N001 0 3.3
XU1 IN MP_01 N002 N003 N001 IN N004 0 OUT LT3090 ;pnba IN))Ilim)Imonp)Imonn)_SHDN)SET)GND)OUT
C1 N004 0 .1
V1 IN 0 -3.3
R2 IN N002 10K
R3 N003 0 3.32K
R1 N004 0 49.9K
.tran .1 startup
.lib LT3090.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 -16 304 -32
WIRE 16 80 -144 80
WIRE 176 80 16 80
WIRE -144 96 -144 80
WIRE 176 96 176 80
WIRE 304 96 304 64
WIRE 16 160 16 80
WIRE 96 160 16 160
WIRE 496 160 384 160
WIRE 592 160 496 160
WIRE 16 176 16 160
WIRE 496 176 496 160
WIRE 592 176 592 160
WIRE -144 192 -144 176
WIRE 496 272 496 240
WIRE 592 272 592 256
WIRE 16 288 16 256
WIRE 96 288 16 288
WIRE 416 288 384 288
WIRE 416 304 416 288
WIRE 176 368 176 352
WIRE 176 368 80 368
WIRE 304 368 304 352
WIRE 80 384 80 368
WIRE 176 384 176 368
WIRE 416 400 416 384
WIRE 80 480 80 448
WIRE 176 480 176 464
SYMBOL res 0 160 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage -144 80 R0
SYMATTR InstName V1
SYMATTR Value -3.3
SYMBOL cap 64 384 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage 304 80 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL res 160 368 R0
SYMATTR InstName R1
SYMATTR Value 49.9K
SYMBOL res 576 160 R0
SYMATTR InstName Rload
SYMATTR Value 4.16
SYMBOL res 400 288 R0
SYMATTR InstName R3
SYMATTR Value 3.32K
SYMBOL PowerProducts\\LT3090 240 224 R0
SYMATTR InstName U1
SYMBOL cap 480 176 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=10m
FLAG 80 480 0
FLAG 176 480 0
FLAG 304 368 0
FLAG -144 192 0
FLAG 304 -32 0
FLAG 416 400 0
FLAG 496 272 0
FLAG 592 272 0
FLAG -144 80 IN
FLAG 592 160 OUT
TEXT 384 448 Left 2 !.tran .1 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1590cc06e0c9_Reverse_battery_protection_-_diode.asc
* Generated by LTspice 26.0.1 for Windows.
D1 battery load RB085BGE-40
Vbat battery 0 PWL(0 13V 20ms 13V 21ms -13V)
Rload load 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 50m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 240 -48 240
WIRE 144 240 0 240
WIRE 320 240 208 240
WIRE 400 240 320 240
WIRE -48 352 -48 240
WIRE 400 352 400 240
WIRE -48 544 -48 432
WIRE 400 544 400 432
WIRE 400 544 -48 544
WIRE -48 576 -48 544
SYMBOL schottky 144 256 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value RB085BGE-40
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage -48 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 2
WINDOW 3 17 160 Left 2
WINDOW 0 -57 4 Left 2
SYMATTR Value PWL(0 13V 20ms 13V 21ms -13V)
SYMATTR InstName Vbat
SYMBOL Misc\\EuropeanResistor 384 336 R0
SYMATTR InstName Rload
SYMATTR Value 5
FLAG -48 576 0
FLAG 0 240 battery
FLAG 320 240 load
TEXT -8 616 Left 2 !.tran 50m
* Z:\home\khalils\Downloads\files\data\raw_asc\1844550559a3_BuckVariable.asc
* Generated by LTspice 26.0.1 for Windows.
Cout OUT 0 {Cout} Rser=0.004
L1 N001 OUT {L1} Ipk=16.7 Rser=0.0187 Rpar=3108.6 Cpar=0
MQ1 IN N002 N001 N001 BSC060N10NS3
VSwitch N002 N001 PULSE(0 5V 0 10ns 10ns {Ton} {Tperiode})
D1 0 N001 PDS5100
Rload OUT 0 {Rload}
VSupply IN 0 {Uin}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.meas TRAN UinRMS RMS V(in)
.meas TRAN IinRMS RMS I(Supply)
.meas TRAN UoutRMS RMS ( V(out) )
.meas TRAN IoutRMS RMS I(Rload)
.meas TRAN PoutRMS RMS ( I(Rload)*(V(out) ) )
.meas TRAN PoutAVG AVG ( I(Rload)*( V(out) ) )
.meas TRAN PinRMS RMS ( abs(-I(Supply)*V(in)) )
.meas TRAN PinAVG AVG ( abs(-I(Supply)*V(in)) )
.meas TRAN IoutRippel PP I(Rload)
.meas TRAN UoutRippel PP (V(out))
.meas TRAN IinRippel PP I(Supply)
.meas TRAN UinRippel PP V(in)
.tran {Tsim}
.inc default_values.param
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2836 1464
WIRE 400 368 336 368
WIRE 432 368 400 368
WIRE 560 368 528 368
WIRE 656 368 560 368
WIRE 752 368 656 368
WIRE 880 368 832 368
WIRE 960 368 880 368
WIRE 1008 368 960 368
WIRE 560 400 560 368
WIRE 656 400 656 368
WIRE 880 400 880 368
WIRE 1008 416 1008 368
WIRE 336 464 336 368
WIRE 512 480 512 416
WIRE 560 480 512 480
WIRE 656 528 656 464
WIRE 880 528 880 464
WIRE 880 528 656 528
WIRE 1008 528 1008 496
WIRE 1008 528 880 528
WIRE 336 592 336 544
WIRE 656 592 656 528
SYMBOL cap 864 400 R0
SYMATTR SpiceLine Rser=0.004
SYMATTR Value {Cout}
SYMATTR InstName Cout
SYMBOL schottky 640 464 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value PDS5100
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage 560 496 R180
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 -176 -325 Left 2
WINDOW 0 33 72 Left 2
SYMATTR Value PULSE(0 5V 0 10ns 10ns {Ton} {Tperiode})
SYMATTR InstName Switch
SYMBOL voltage 336 448 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Supply
SYMATTR Value {Uin}
SYMBOL ind 736 384 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value {L1}
SYMATTR SpiceLine Ipk=16.7 Rser=0.0187 Rpar=3108.6 Cpar=0
SYMBOL nmos 432 416 R270
WINDOW 3 87 51 VRight 2
SYMATTR Value BSC060N10NS3
SYMATTR InstName Q1
SYMBOL res 992 400 R0
SYMATTR InstName Rload
SYMATTR Value {Rload}
FLAG 960 368 OUT
FLAG 400 368 IN
FLAG 656 592 0
FLAG 336 592 0
TEXT 968 832 Left 2 !.meas TRAN UinRMS RMS V(in)\n.meas TRAN IinRMS RMS I(Supply)\n.meas TRAN UoutRMS RMS ( V(out) )\n.meas TRAN IoutRMS RMS I(Rload)\n.meas TRAN PoutRMS RMS ( I(Rload)*(V(out) )  )\n.meas TRAN PoutAVG AVG ( I(Rload)*( V(out) )  ) \n.meas TRAN PinRMS RMS ( abs(-I(Supply)*V(in)) )\n.meas TRAN PinAVG AVG ( abs(-I(Supply)*V(in)) )
TEXT 264 872 Left 2 !.meas TRAN IoutRippel PP I(Rload)\n.meas TRAN UoutRippel PP (V(out))\n.meas TRAN IinRippel PP I(Supply)\n.meas TRAN UinRippel PP V(in)
TEXT 264 776 Left 2 !.tran {Tsim}
TEXT 768 752 Left 2 !.inc default_values.param
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1728-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1728-1.8.asy)
V1 N004 0 PWL(0 1.05 7 1.05 8 .95 9 1.05)
R1 N002 N001 10K
V3 N003 0 PWL(0 3 1 3 2 2.5 3 3)
XU1 N002 0 N004 N005 N003 LTC1728-1.8 ;pnba _RST)GND)VccA)Vcc1.8)Vcc3
V2 N005 0 PWL(0 1.8 4 1.8 5 1.5 6 1.8)
V4 N001 0 5
.tran 10
.lib LTC1728-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1100 756
WIRE -112 144 -192 144
WIRE 48 144 -32 144
WIRE 464 144 272 144
WIRE -192 160 -192 144
WIRE 464 160 464 144
WIRE 48 208 32 208
WIRE -192 256 -192 240
WIRE 464 256 464 240
WIRE 48 272 -80 272
WIRE 384 272 272 272
WIRE -80 288 -80 272
WIRE 384 288 384 272
WIRE -80 384 -80 368
WIRE 384 384 384 368
SYMBOL res -16 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -80 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 1.05 7 1.05 8 .95 9 1.05)
SYMBOL LTC1728-1.8 160 240 R0
SYMATTR InstName U1
SYMBOL voltage 464 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 3 1 3 2 2.5 3 3)
SYMBOL voltage -192 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL voltage 384 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 1.8 4 1.8 5 1.5 6 1.8)
FLAG 32 208 0
FLAG 384 384 0
FLAG 464 256 0
FLAG -80 384 0
FLAG -192 256 0
TEXT 448 440 Left 2 !.tran 10