Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8624S.asc
* Generated by LTspice 26.0.1 for Windows.
* 2MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8624S.asy)
C2 OUT 0 220 Rser=5m
XU1 SW N004 0 CLKout IN NC_01 IN IN N004 N004 SET N003 OUT PGFB N001 PG LT8624S ;pnba SW)Sync/Mode)GND)CLKout)PVin)BST)SVin)EN/UVLO)INTVcc)PHMode)SET)Vc)OUTS)PGFB)RT)PG
R4 N002 N003 500
C1 SET 0 1
Rload OUT 0 1.2
R2 PGFB 0 49.9k
R5 SET 0 33.2k
R3 OUT PGFB 280k
R6 OUT PG 100k
L1 SW OUT 1 Rser=6m
C3 N002 0 2n
V1 IN 0 12
R1 N001 0 47k
.tran 1.5m startup
.lib LT8624S.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1080 680
WIRE 96 -128 -64 -128
WIRE 272 -128 96 -128
WIRE -64 -112 -64 -128
WIRE 272 -112 272 -128
WIRE 96 -64 96 -128
WIRE 128 -64 96 -64
WIRE -64 -16 -64 -32
WIRE 96 32 96 -64
WIRE 128 32 96 32
WIRE 448 32 416 32
WIRE 512 32 448 32
WIRE 688 32 592 32
WIRE -32 128 -64 128
WIRE 128 128 48 128
WIRE 448 128 416 128
WIRE 512 128 448 128
WIRE 688 128 688 32
WIRE 688 128 592 128
WIRE 768 128 688 128
WIRE 880 128 768 128
WIRE 976 128 880 128
WIRE 976 144 976 128
WIRE 880 160 880 128
WIRE 768 176 768 128
WIRE -80 224 -96 224
WIRE 16 224 -16 224
WIRE 128 224 96 224
WIRE 688 224 688 128
WIRE 688 224 416 224
WIRE 880 240 880 224
WIRE 976 240 976 224
WIRE 128 320 96 320
WIRE 464 320 416 320
WIRE 768 320 768 256
WIRE 768 320 464 320
WIRE 768 336 768 320
WIRE 96 416 96 320
WIRE 128 416 96 416
WIRE 448 416 416 416
WIRE 592 416 448 416
WIRE 672 416 592 416
WIRE 672 432 672 416
WIRE 768 432 768 416
WIRE 592 448 592 416
WIRE 96 512 96 416
WIRE 128 512 96 512
WIRE 448 512 416 512
WIRE 592 528 592 512
WIRE 672 528 672 512
WIRE 272 592 272 576
SYMBOL res 752 160 R0
SYMATTR InstName R3
SYMATTR Value 280k
SYMBOL res 752 320 R0
SYMATTR InstName R2
SYMATTR Value 49.9k
SYMBOL cap 864 160 R0
SYMATTR InstName C2
SYMATTR Value 220
SYMATTR SpiceLine Rser=5m
SYMBOL cap -16 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 2n
SYMBOL res 656 416 R0
SYMATTR InstName R5
SYMATTR Value 33.2k
SYMBOL res 0 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 500
SYMBOL res 64 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 47k
SYMBOL voltage -64 -128 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 576 448 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 608 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 100k
SYMBOL LT8624S 272 192 R0
SYMATTR InstName U1
SYMBOL ind 496 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=6m
SYMBOL res 960 128 R0
SYMATTR InstName Rload
SYMATTR Value 1.2
FLAG -64 -16 0
FLAG -64 128 0
FLAG 272 592 0
FLAG 768 432 0
FLAG 976 240 0
FLAG -96 224 0
FLAG 976 128 OUT
FLAG -64 -128 IN
FLAG 672 528 0
FLAG 592 528 0
FLAG 880 240 0
FLAG 448 512 CLKout
FLAG 448 32 PG
FLAG 448 128 SW
FLAG 464 320 PGFB
FLAG 448 416 SET
TEXT 728 552 Left 2 !.tran 1.5m startup
TEXT 48 104 Left 2 ;2MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1946A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1946A.asy)
XU1 N003 N002 IN 0 N001 IN N003 N004 LT1946A ;pnba Vc)FB)_SHDN)GND)SW)Vin)Comp)SS
V1 IN 0 3.3
D1 N001 OUT MBRS340
R2 N002 0 5.23K
Rload OUT 0 20
C3 N004 0 .005
C2 OUT 0 20 Rser=50m
L1 IN N001 5.4 Rser=.05
R1 OUT N002 28.7K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 750u startup
.lib LT1946A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2688 1672
WIRE 1568 1200 1456 1200
WIRE 1680 1200 1568 1200
WIRE 1696 1200 1680 1200
WIRE 1808 1200 1776 1200
WIRE 1888 1200 1808 1200
WIRE 2032 1200 1952 1200
WIRE 2160 1200 2032 1200
WIRE 2272 1200 2160 1200
WIRE 1456 1216 1456 1200
WIRE 2160 1216 2160 1200
WIRE 2272 1216 2272 1200
WIRE 2032 1248 2032 1200
WIRE 1680 1264 1680 1200
WIRE 1808 1264 1808 1200
WIRE 1456 1312 1456 1296
WIRE 2160 1312 2160 1280
WIRE 2272 1312 2272 1296
WIRE 1568 1344 1568 1200
WIRE 1600 1344 1568 1344
WIRE 2032 1344 2032 1328
WIRE 2032 1344 1888 1344
WIRE 2032 1360 2032 1344
WIRE 1600 1408 1568 1408
WIRE 2032 1456 2032 1440
WIRE 1568 1472 1568 1408
WIRE 1600 1472 1568 1472
WIRE 1904 1472 1888 1472
WIRE 1984 1472 1968 1472
WIRE 1744 1568 1744 1552
SYMBOL cap 2144 1216 R0
SYMATTR InstName C2
SYMATTR Value 20
SYMATTR SpiceLine Rser=50m
SYMBOL res 2016 1344 R0
SYMATTR InstName R2
SYMATTR Value 5.23K
SYMBOL ind 1680 1216 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 5.4
SYMATTR SpiceLine Rser=.05
SYMBOL schottky 1888 1184 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMBOL VOLTAGE 1456 1200 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL RES 2016 1232 R0
SYMATTR InstName R1
SYMATTR Value 28.7K
SYMBOL PowerProducts\\LT1946A 1744 1408 R0
SYMATTR InstName U1
SYMBOL RES 2256 1200 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL cap 1904 1488 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value .005
FLAG 2032 1456 0
FLAG 1744 1568 0
FLAG 1984 1472 0
FLAG 2160 1312 0
FLAG 1456 1312 0
FLAG 2272 1312 0
FLAG 2272 1200 OUT
FLAG 1456 1200 IN
TEXT 2104 1488 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\389c7d8eed7a_Experiment-1.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac dec 20 0.1 1T
* .tran 5ms
M1 N002 N003 0 0 CMOSN l=180n w=1.12u
R1 N001 N002 1k
V1 N001 0 1.8
V2 N003 0 0.6
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib tsmc018.lib
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -160 -112 -304 -112
WIRE -160 -16 -160 -112
WIRE -304 0 -304 -112
WIRE -160 96 -160 64
WIRE -304 112 -304 80
WIRE -48 144 -160 144
WIRE -208 176 -304 176
WIRE -304 192 -304 176
WIRE -160 240 -160 192
WIRE -48 240 -48 144
WIRE -48 240 -160 240
WIRE -160 320 -160 240
WIRE -304 336 -304 272
SYMBOL res -176 -32 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -304 176 R0
WINDOW 123 11 106 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 20 95 Left 2
SYMATTR Value 0.6
SYMATTR InstName V2
SYMBOL nmos4 -208 96 R0
SYMATTR InstName M1
SYMATTR Value CMOSN
SYMATTR Value2 l=180n w=1.12u
SYMBOL voltage -304 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
FLAG -160 320 0
FLAG -304 112 0
FLAG -304 336 0
TEXT -624 24 Left 2 !.lib tsmc018.lib
TEXT -624 48 Left 2 !.op
TEXT -624 96 Left 2 ;.ac dec 20 0.1 1T
TEXT -624 72 Left 2 ;.tran 5ms
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4300A-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4300A-1.asy)
R2 N001 N004 10K
C1 N004 0 150p
R5 N001 N002 10K
XU1 N001 N003 N002 0 N005 N002 N004 N001 LTC4300A-1 ;pnba ENABLE)SCLOUT)SCLIN)GND)READY)SDAIN)SDAOUT)Vcc
R4 N001 N002 10K
C2 N003 0 300p
R1 N001 N003 10K
V1 N001 0 3.3
R3 N001 N005 10K
V2 N002 0 PULSE(0 3.3 0 10n 10n 50u 100u)
.tran 300u
.lib LTC4300A-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -192 16 -368 16
WIRE -144 16 -192 16
WIRE -64 16 -144 16
WIRE 128 16 -64 16
WIRE 320 16 128 16
WIRE 416 16 320 16
WIRE 512 16 416 16
WIRE -368 32 -368 16
WIRE -64 32 -64 16
WIRE 320 48 320 16
WIRE -144 64 -144 16
WIRE 128 112 128 16
WIRE 416 112 416 16
WIRE -368 128 -368 112
WIRE -64 160 -64 112
WIRE -64 160 -496 160
WIRE -32 160 -64 160
WIRE 320 160 320 128
WIRE 320 160 288 160
WIRE 512 176 512 16
WIRE -496 240 -496 160
WIRE -144 240 -144 144
WIRE -144 240 -496 240
WIRE -32 240 -144 240
WIRE 416 240 416 192
WIRE 416 240 288 240
WIRE -496 256 -496 240
WIRE -192 320 -192 16
WIRE -32 320 -192 320
WIRE 512 320 512 256
WIRE 512 320 288 320
WIRE 320 336 320 160
WIRE 416 336 416 240
WIRE -496 352 -496 336
WIRE 128 384 128 368
WIRE 320 416 320 400
WIRE 416 416 416 400
SYMBOL SpecialFunctions\\LTC4300A-1 128 240 R0
SYMATTR InstName U1
SYMBOL cap 304 336 R0
SYMATTR InstName C2
SYMATTR Value 300p
SYMBOL res -160 48 R0
SYMATTR InstName R5
SYMATTR Value 10K
SYMBOL res 304 32 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -496 240 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 0 10n 10n 50u 100u)
SYMBOL res -80 16 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 400 96 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL cap 400 336 R0
SYMATTR InstName C1
SYMATTR Value 150p
SYMBOL res 496 160 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL voltage -368 16 R0
WINDOW 3 31 93 Left 2
SYMATTR Value 3.3
SYMATTR InstName V1
FLAG 128 384 0
FLAG -368 128 0
FLAG -496 352 0
FLAG 320 416 0
FLAG 416 416 0
TEXT -32 432 Left 2 !.tran 300u
* Z:\home\khalils\Downloads\files\data\raw_asc\30b8151f538d_thresholdDetector.asc
* Generated by LTspice 26.0.1 for Windows.
R1 5V N001 9k
R2 N001 0 1k
V1 5V 0 5
V3 3V3 0 3.3
XU1 IN N001 3V3 0 OUT level2 Avol=1Meg GBW=5Meg Slew=12Meg Vos=3m Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.tran 0.2
* NOTICE:\nThis will be replaced with a comparator IC.\nJust for testing and demonstration
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 16 16 -16
WIRE 240 96 240 64
WIRE 16 112 16 96
WIRE 208 112 16 112
WIRE 16 128 16 112
WIRE 336 128 272 128
WIRE 208 144 144 144
WIRE 240 192 240 160
WIRE 16 240 16 208
WIRE 16 400 16 368
WIRE 240 400 240 368
WIRE 16 512 16 480
WIRE 240 512 240 480
FLAG 16 512 0
FLAG 240 512 0
FLAG 16 368 5V
FLAG 16 -16 5V
FLAG 240 64 3V3
FLAG 240 368 3V3
FLAG 16 240 0
FLAG 144 144 IN
IOPIN 144 144 In
FLAG 336 128 OUT
IOPIN 336 128 Out
FLAG 240 192 0
SYMBOL res 0 0 R0
SYMATTR InstName R1
SYMATTR Value 9k
SYMBOL res 0 112 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 16 384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 240 384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL OpAmps\\UniversalOpAmp2 240 128 R0
SYMATTR InstName U1
SYMATTR Value2 Avol=1Meg GBW=5Meg Slew=12Meg Vos=3m
TEXT -280 344 Left 2 !.tran 0.2
TEXT 152 -232 Center 2 ;NOTICE:\nThis will be replaced with a comparator IC.\nJust for testing and demonstration
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX20408.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 14
C3 OUT 0 22 x4 Rser=4.6m
Rload OUT 0 {5/8}
C1 N002 0 2.2
R1 N004 N002 10k
C2 N001 N003 0.1
L1 N003 OUT 470n Ipk=14 Rser=0.00285 Rpar=0 Cpar=0 mfg="Murata" pn="FCUL0530-R47M=P3"
XU1 0 IN IN N002 N002 OUT N004 N003 NC_01 NC_02 N002 N001 MAX20408 ;pnba GND)SUP)EN)SYNC)FB)OUT)PGOOD)LX)VEA)SYNCOUT)BIAS)BST
.tran 3m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX20408.asy)
.lib MAX20408.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2152 680
WIRE 1136 -128 1120 -128
WIRE 1248 -128 1136 -128
WIRE 1472 -128 1248 -128
WIRE 1120 -112 1120 -128
WIRE 1472 -96 1472 -128
WIRE 1248 -32 1248 -128
WIRE 1312 -32 1248 -32
WIRE 1696 -32 1632 -32
WIRE 1120 -16 1120 -32
WIRE 1696 -16 1696 -32
WIRE 1248 80 1184 80
WIRE 1312 80 1248 80
WIRE 1696 80 1696 48
WIRE 1696 80 1632 80
WIRE 1248 96 1248 80
WIRE 1696 96 1696 80
WIRE 1248 176 1248 160
WIRE 1696 192 1696 176
WIRE 1696 192 1632 192
WIRE 1776 192 1696 192
WIRE 1888 192 1776 192
WIRE 1904 192 1888 192
WIRE 1776 208 1776 192
WIRE 1904 208 1904 192
WIRE 1776 288 1776 272
WIRE 1696 304 1632 304
WIRE 1904 304 1904 288
WIRE 1312 416 1248 416
WIRE 1696 416 1696 304
WIRE 1696 416 1632 416
WIRE 1248 432 1248 416
WIRE 1472 480 1472 464
WIRE 1184 528 1184 80
WIRE 1248 528 1248 512
WIRE 1248 528 1184 528
WIRE 1696 528 1696 416
WIRE 1696 528 1248 528
FLAG 1120 -16 0
FLAG 1472 480 0
FLAG 1776 288 0
FLAG 1904 304 0
FLAG 1136 -128 IN
FLAG 1888 192 OUT
FLAG 1248 176 0
SYMBOL voltage 1120 -128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 14
SYMBOL cap 1760 208 R0
WINDOW 3 46 38 Left 2
WINDOW 123 51 63 Left 2
WINDOW 0 49 7 Left 2
SYMATTR Value 22
SYMATTR Value2 x4
SYMATTR InstName C3
SYMATTR SpiceLine Rser=4.6m
SYMBOL res 1888 192 R0
SYMATTR InstName Rload
SYMATTR Value {5/8}
SYMBOL cap 1232 96 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL res 1232 416 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL cap 1680 -16 R0
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL ind 1680 80 R0
SYMATTR InstName L1
SYMATTR Value 470n
SYMATTR SpiceLine Ipk=14 Rser=0.00285 Rpar=0 Cpar=0 mfg="Murata" pn="FCUL0530-R47M=P3"
SYMBOL MAX20408 1472 176 R0
SYMATTR InstName U1
TEXT 1368 592 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7170-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7170-5.0.asy)
Rload OUT 0 12.5
XU1 IN OUT IN N001 OUT 0 ADM7170-5.0 ;pnba Vin)Sense)EN)SS)Vout)GND
C2 N001 0 1n
C1 OUT 0 4.7 Rser=1.5m
V1 IN 0 5.5
.tran 5m startup
.lib ADM7170-5.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL ADM7170-5.0 224 128 R0
SYMATTR InstName U1
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 12.5
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3542073b1086_01_Crystal_AC-analysis.asc
* Generated by LTspice 26.0.1 for Windows.
L1 in N001 4.52
C1 out N002 1p
R1 N002 N001 50k
V1 N003 0 SINE(0 1m 77500) AC 1m 0
R2 in N003 10k
R3 out 0 1Meg
C2 out 0 12.5p
.ac oct 100 1000 1000000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 16 -128 16
WIRE 160 16 128 16
WIRE 256 16 240 16
WIRE 336 16 320 16
WIRE 464 16 336 16
WIRE -128 64 -128 16
WIRE 336 96 336 16
WIRE 464 112 464 16
WIRE -128 192 -128 144
WIRE -128 320 -128 272
WIRE 336 320 336 160
WIRE 464 320 464 192
FLAG -128 320 0
FLAG 464 320 0
FLAG 464 16 out
FLAG -128 16 in
FLAG 336 320 0
SYMBOL ind 32 32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.52
SYMBOL cap 320 0 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1p
SYMBOL res 256 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50k
SYMBOL voltage -128 176 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1m 77500)
SYMATTR Value2 AC 1m 0
SYMBOL res -144 48 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 448 96 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL cap 320 96 R0
SYMATTR InstName C2
SYMATTR Value 12.5p
TEXT -162 344 Left 2 !.ac oct 100 1000 1000000
* Z:\home\khalils\Downloads\files\data\raw_asc\2e4729d91f3a_6993-3.asc
* Generated by LTspice 26.0.1 for Windows.
* LTC6993-3 Non-Retriggerable 20ms One Shot\nFalling Edge Triggered, Positive Output Pulse\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6993-3.asy)
XU1 N001 0 N003 N004 N002 OUT LTC6993-3 ;pnba TRIG)GND)SET)DIV)V+)OUT
R2 N002 N004 1000K
R3 N004 0 392K
V2 N001 0 PULSE(0 3.3 0.25m 1n 1n 2m 15m 3)
R4 OUT 0 100K
R1 N003 0 243K
V1 N002 0 5
.tran 60m startup
.lib LTC6993-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -224 96 -240 96
WIRE 96 96 -144 96
WIRE 656 96 320 96
WIRE 656 112 656 96
WIRE 96 176 64 176
WIRE 400 176 320 176
WIRE 560 176 400 176
WIRE 400 192 400 176
WIRE 560 192 560 176
WIRE 656 208 656 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 352 256 320 256
WIRE 352 288 352 256
WIRE 400 288 400 272
WIRE 400 288 352 288
WIRE 560 288 560 272
WIRE 400 304 400 288
WIRE 400 400 400 384
SYMBOL res 384 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL voltage 560 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 640 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL voltage -128 96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0.25m 1n 1n 2m 15m 3)
SYMATTR InstName V2
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 243K
SYMBOL SpecialFunctions\\LTC6993-3 208 176 R0
SYMATTR InstName U1
SYMBOL res 384 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
FLAG -240 96 0
FLAG 560 288 0
FLAG 656 96 OUT
FLAG 656 208 0
FLAG 400 400 0
FLAG -16 256 0
FLAG 64 176 0
TEXT 520 392 Left 2 !.tran 60m startup
TEXT 216 48 Bottom 2 ;LTC6993-3 Non-Retriggerable 20ms One Shot\nFalling Edge Triggered, Positive Output Pulse\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\dd3778b92573_simple_op_amp.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP482.asy)
V2 N003 0 AC 1 0
R1 N001 output 1k
V1 N002 0 9v
V3 0 N004 9
R2 0 N001 1k
XU1 N003 N001 N002 N004 output OP482 ;pnba In+)In-)V+)V-)OUT
.ac dec 10 20 20000
.lib OP482.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -16 0 -64 0
WIRE -16 16 -16 0
WIRE 96 32 0 32
WIRE -64 48 -64 0
WIRE 368 144 32 144
WIRE 32 160 32 144
WIRE -64 176 -64 128
WIRE 0 176 0 32
WIRE 0 176 -64 176
WIRE 96 192 96 112
WIRE 96 192 64 192
WIRE 144 192 96 192
WIRE 0 208 -320 208
WIRE 368 256 368 224
WIRE 400 256 368 256
WIRE 368 272 368 256
WIRE 32 352 32 224
WIRE 368 352 32 352
IOPIN 144 192 Out
SYMBOL res -80 32 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 368 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 9
SYMBOL voltage 368 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9v
SYMBOL OpAmps\\OP482 32 128 R0
SYMATTR InstName U1
SYMBOL voltage -320 192 R0
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1 0
SYMATTR InstName V2
SYMATTR Value ""
SYMBOL res 80 16 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG -320 288 0
FLAG -16 16 0
FLAG 144 192 output
FLAG 400 256 0
TEXT -264 304 Left 2 !.ac dec 10 20 20000
* Z:\home\khalils\Downloads\files\data\raw_asc\30ac6d3870e8_ADA4523-1.asc
* Generated by LTspice 26.0.1 for Windows.
* V(OUT) = 101*Rsense*Isense
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4523-1.asy)
Rsense N003 0 1K
D1 N002 OUT 1N4148
V1 +V 0 28
Isense 0 N003 0
R1 OUT N001 1K
XU1 +V N001 N003 0 N002 +V 0 ADA4523-1 ;pnba _SD)IN-)IN+)V-)OUT)V+)SDCOM
R2 N001 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc Isense 0 1u 10n
.lib ADA4523-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 948 680
WIRE 112 -64 80 -64
WIRE 240 -64 192 -64
WIRE 448 -64 240 -64
WIRE 592 -64 528 -64
WIRE 16 0 16 -16
WIRE 336 32 336 0
WIRE 368 32 336 32
WIRE 336 64 336 32
WIRE 368 64 368 32
WIRE 240 80 240 -64
WIRE 320 80 240 80
WIRE 464 96 384 96
WIRE 592 96 592 -64
WIRE 592 96 528 96
WIRE 624 96 592 96
WIRE 16 112 16 80
WIRE 320 112 16 112
WIRE -112 128 -112 96
WIRE 16 144 16 112
WIRE 368 160 368 128
WIRE 336 192 336 128
WIRE -112 256 -112 208
WIRE 16 256 16 224
SYMBOL res 544 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 208 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL res 0 128 R0
SYMATTR InstName Rsense
SYMATTR Value 1K
SYMBOL diode 464 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 7 99 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL current 16 0 R0
SYMATTR InstName Isense
SYMATTR Value 0
SYMBOL ADA4523-1 352 96 R0
WINDOW 3 -164 42 Left 2
WINDOW 0 -85 -34 Left 2
SYMATTR InstName U1
SYMBOL voltage -112 112 R0
SYMATTR InstName V1
SYMATTR Value 28
FLAG -112 256 0
FLAG 336 0 +V
FLAG -112 96 +V
FLAG 624 96 OUT
FLAG 16 256 0
FLAG 16 -16 0
FLAG 80 -64 0
FLAG 368 160 0
FLAG 336 192 0
TEXT 296 248 Left 2 ;V(OUT) = 101*Rsense*Isense
TEXT 320 296 Left 2 !.dc Isense 0 1u 10n
* Z:\tmp\asc_dec_bjh7r6w2\00ccfddebb67_ES5_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V-Vcc N003 0 -10V
R2 Vout N002 1600
XU1 0 N002 N001 N003 Vout LT1213 ;pnba In+)In-)V+)V-)OUT
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1213.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 -32 208 -32
WIRE 96 -16 80 -16
WIRE 192 -16 176 -16
WIRE 352 0 352 -32
WIRE 80 80 80 -16
WIRE 96 80 80 80
WIRE 192 80 192 -16
WIRE 192 80 160 80
WIRE 272 80 192 80
WIRE 352 96 352 80
WIRE 208 128 208 -32
WIRE 80 144 80 80
WIRE 80 144 48 144
WIRE 176 144 80 144
WIRE 272 160 272 80
WIRE 272 160 240 160
WIRE 320 160 272 160
WIRE 176 176 128 176
WIRE 128 224 128 176
WIRE 208 224 208 192
WIRE 240 224 208 224
WIRE 240 320 240 304
SYMBOL voltage 240 208 R0
WINDOW 0 16 14 Left 2
WINDOW 3 17 96 Left 2
SYMATTR InstName -Vcc
SYMATTR Value -10V
SYMBOL res 192 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1600
SYMBOL OpAmps\\LT1213 208 96 R0
WINDOW 0 17 40 Left 2
WINDOW 3 17 87 Left 2
SYMATTR InstName U1
FLAG 240 320 0
FLAG 320 160 Vout
FLAG 128 224 0
FLAG 352 96 0
* Z:\home\khalils\Downloads\files\data\raw_asc\9f8a811f643a_Low-Dropout-Linear-Regulator.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Ue N002 15V
V2 N002 0 SINE(0 1 50)
R1 Ue N001 560
RVL Ua 0 470
RL Ua 0 44
QT Ue N001 Ua 0 BD139
D1 0 N001 1N750
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 100ms
* Low-Dropout-Voltage-Regulator in linear version\nCreated by AblL
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 224 -32 80 -32
WIRE 400 -32 224 -32
WIRE 480 -32 400 -32
WIRE 624 -32 576 -32
WIRE 704 -32 624 -32
WIRE 752 -32 704 -32
WIRE 80 0 80 -32
WIRE 400 0 400 -32
WIRE 624 0 624 -32
WIRE 752 0 752 -32
WIRE 400 112 400 80
WIRE 528 112 528 32
WIRE 528 112 400 112
WIRE 624 112 624 80
WIRE 688 112 624 112
WIRE 752 112 752 80
WIRE 752 112 688 112
WIRE 80 128 80 80
WIRE 400 144 400 112
WIRE 688 144 688 112
WIRE 80 240 80 208
WIRE 400 240 400 208
FLAG 80 240 0
FLAG 400 240 0
FLAG 688 144 0
FLAG 224 -32 Ue
FLAG 704 -32 Ua
SYMBOL voltage 80 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15V
SYMBOL voltage 80 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 1 50)
SYMBOL Misc\\EuropeanResistor 384 -16 R0
SYMATTR InstName R1
SYMATTR Value 560
SYMBOL Misc\\EuropeanResistor 608 -16 R0
SYMATTR InstName RVL
SYMATTR Value 470
SYMBOL Misc\\EuropeanResistor 736 -16 R0
SYMATTR InstName RL
SYMATTR Value 44
SYMBOL npn 480 32 R270
WINDOW 0 110 16 VRight 2
WINDOW 3 84 13 VRight 2
SYMATTR InstName T
SYMATTR Value BD139
SYMBOL zener 416 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N750
TEXT 176 -120 Left 2 !.tran 100ms
TEXT 168 -176 Left 2 ;Low-Dropout-Voltage-Regulator in linear version\nCreated by AblL