Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\2a2bf0bd4649_IE_Tut1.asc
* Generated by LTspice 26.0.1 for Windows.
D2 N002 P001 1N4148
R1 N002 N001 1k
V2 P001 0 5
V1 N001 0 SINE(0 4.2 50)
D1 0 N002 BZX84C10L
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100ms
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 256 64 112 64
WIRE 496 64 336 64
WIRE 736 64 496 64
WIRE 736 112 736 64
WIRE 112 144 112 64
WIRE 496 160 496 64
WIRE 112 320 112 224
WIRE 496 320 496 224
WIRE 496 320 112 320
WIRE 736 320 736 256
WIRE 736 320 496 320
SYMBOL diode 480 224 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BZX84C10L
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage 112 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 4.2 50)
SYMBOL res 352 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 736 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL diode 720 112 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
FLAG 496 320 0
TEXT 72 336 Left 2 !.tran 100ms
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8614.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8614.asy)
XU1 IN OUT +V -V OUT AD8614 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -5
Vin IN 0 SINE(0 1 10K)
Cload OUT 0 47n
V1 +V 0 5
Cx N001 0 10
Rx OUT N001 5
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 640 -1184 528 -1184
WIRE 528 -1120 528 -1184
WIRE 544 -1120 528 -1120
WIRE 176 -1104 176 -1120
WIRE 272 -1104 272 -1120
WIRE 640 -1104 640 -1184
WIRE 640 -1104 608 -1104
WIRE 720 -1104 640 -1104
WIRE 832 -1104 720 -1104
WIRE 544 -1088 432 -1088
WIRE 720 -1088 720 -1104
WIRE 832 -1088 832 -1104
WIRE 432 -1072 432 -1088
WIRE 176 -1008 176 -1024
WIRE 272 -1008 272 -1024
WIRE 832 -1008 832 -1024
WIRE 720 -992 720 -1008
WIRE 432 -976 432 -992
WIRE 720 -912 720 -928
SYMBOL voltage 176 -1120 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 272 -1120 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL cap 816 -1088 R0
SYMATTR InstName Cload
SYMATTR Value 47n
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL cap 704 -992 R0
SYMATTR InstName Cx
SYMATTR Value 10
SYMBOL Opamps\\AD8614 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 704 -1104 R0
SYMATTR InstName Rx
SYMATTR Value 5
FLAG 432 -976 0
FLAG 832 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 576 -1072 -V
FLAG 720 -912 0
FLAG 832 -1008 0
FLAG 176 -1120 +V
FLAG 176 -1008 0
FLAG 272 -1120 -V
FLAG 272 -1008 0
TEXT 816 -880 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2303.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2303.asy)
V1 IN 0 12
L1 N002 OUT 6.8 Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
R1 OUT N003 69.8K
C1 OUT 0 10
Rload OUT 0 20
XU1 IN IN N001 N002 N003 0 NC_01 ADP2303 FREQ=0 CSGain=0.12 CL=0.66 ;pnba Vin)EN)BST)SW)FB)GND)PGood
D1 0 N002 MBRS340
R2 N003 0 13.3K
C2 N001 N002 100n
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3.5m startup
.lib ADP2303.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 692
WIRE 112 48 0 48
WIRE 160 48 112 48
WIRE 448 48 416 48
WIRE 0 64 0 48
WIRE 448 64 448 48
WIRE 0 160 0 144
WIRE 112 176 112 48
WIRE 160 176 112 176
WIRE 448 176 448 128
WIRE 448 176 416 176
WIRE 544 176 448 176
WIRE 672 176 624 176
WIRE 768 176 672 176
WIRE 896 176 768 176
WIRE 448 192 448 176
WIRE 672 192 672 176
WIRE 768 192 768 176
WIRE 896 192 896 176
WIRE 448 272 448 256
WIRE 672 272 672 256
WIRE 896 288 896 272
WIRE 768 304 768 272
WIRE 768 304 416 304
WIRE 768 320 768 304
WIRE 288 368 288 352
WIRE 768 416 768 400
SYMBOL VOLTAGE 0 48 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 432 64 R0
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL ind 528 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMATTR SpiceLine Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
SYMBOL cap 656 192 R0
WINDOW 0 29 15 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL schottky 432 256 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL ADP2303 288 176 R0
SYMATTR InstName U1
SYMBOL res 752 304 R0
SYMATTR InstName R2
SYMATTR Value 13.3K
SYMBOL res 880 176 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL res 752 176 R0
SYMATTR InstName R1
SYMATTR Value 69.8K
FLAG 0 160 0
FLAG 0 48 IN
FLAG 672 272 0
FLAG 896 176 OUT
FLAG 448 272 0
FLAG 768 416 0
FLAG 288 368 0
FLAG 896 288 0
TEXT 472 392 Left 2 !.tran 3.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX4354.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX4354.asy)
CL OUT 0 15p
RL OUT 0 1k
XU1 IN OUT Vcc Vee OUT MAX4354 ;pnba In+)In-)V+)V-)OUT
Vee 0 Vee 2.5
V1 IN 0 SINE(0 50m 10k)
Vcc Vcc 0 2.5
.tran 100u
.lib MAX4354.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 144 288 144 272
WIRE 432 352 432 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 144 400 144 368
WIRE 144 400 112 400
WIRE 400 400 304 400
WIRE 112 416 112 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 144 448 144 400
WIRE 432 448 432 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 144 544 144 528
WIRE 304 592 304 576
SYMBOL MAX4354 432 320 R0
SYMATTR InstName U1
SYMBOL voltage 144 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL voltage 144 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 1k
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 10k)
FLAG 720 384 OUT
FLAG 144 272 Vcc
FLAG 144 544 Vee
FLAG 432 320 Vcc
FLAG 432 448 Vee
FLAG 112 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
TEXT 96 632 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3008-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 1
Rload OUT 0 180
XU1 IN OUT OUT 0 IN LT3008-1.8 ;pnba IN)OUT)Sense)GND)_SHDN
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3008-1.8.asy)
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 180
SYMBOL PowerProducts\\LT3008-1.8 176 96 R0
SYMATTR InstName U1
TEXT 336 248 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6210.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6210.asy)
XU1 N003 N001 +V -V N002 P001 LT6210 ;pnba In+)In-)V+)V-)OUT)V-1
R1 P001 0 56K
R3 N001 0 1.1K
V1 +V 0 5
R4 N002 0 150
V3 N003 0 pulse(-25m 25m 30n 1n 1n 35n 70n)
V2 -V 0 -5
R2 N002 N001 1.1K
.tran 100n
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 48 48 48
WIRE 176 48 144 48
WIRE 208 48 176 48
WIRE 304 48 288 48
WIRE -288 96 -288 80
WIRE -176 96 -176 80
WIRE 176 176 176 48
WIRE 192 176 176 176
WIRE -288 192 -288 176
WIRE -176 192 -176 176
WIRE 304 208 304 48
WIRE 304 208 288 208
WIRE 400 208 304 208
WIRE 400 224 400 208
WIRE -80 240 -112 240
WIRE 192 240 0 240
WIRE 400 320 400 304
WIRE 240 368 240 352
SYMBOL res 160 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1.1K
SYMBOL res 224 256 R0
SYMATTR InstName R1
SYMATTR Value 56K
SYMBOL voltage 16 240 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V3
SYMATTR Value pulse(-25m 25m 30n 1n 1n 35n 70n)
SYMBOL res 304 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1.1K
SYMBOL voltage -288 80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL opamps\\LT6210 224 208 R0
SYMATTR InstName U1
SYMBOL voltage -176 80 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 384 208 R0
SYMATTR InstName R4
SYMATTR Value 150
FLAG -176 192 0
FLAG -288 192 0
FLAG -288 80 +V
FLAG 208 144 +V
FLAG -176 80 -V
FLAG 208 272 -V
FLAG 240 368 0
FLAG 48 48 0
FLAG -112 240 0
FLAG 400 320 0
TEXT 352 400 Left 2 !.tran 100n
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3624-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3624-2.asy)
V1 IN 0 16
L1 N001 OUT 1.5 Rser=10m Rpar=1K
C3 OUT 0 47 Rser=5m
C1 N002 0 2.2
XU1 N001 IN IN NC_01 N003 N002 N002 0 0 LTC3624-2 ;pnba SW)VIN)RUN)PGOOD)FB)INTVCC)MODE/SYNC)SGND)GND
R2 N003 0 32.4K
C2 OUT N003 15p
Rload OUT 0 6
R1 OUT N003 619K
.tran 1.5m startup
.lib LTC3624-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 888 680
WIRE -32 32 -64 32
WIRE 32 32 -32 32
WIRE 208 32 32 32
WIRE 208 48 208 32
WIRE -64 64 -64 32
WIRE 32 112 32 32
WIRE 64 112 32 112
WIRE 384 112 352 112
WIRE 496 112 464 112
WIRE 592 112 496 112
WIRE 704 112 592 112
WIRE 752 112 704 112
WIRE 800 112 752 112
WIRE 496 128 496 112
WIRE 592 128 592 112
WIRE 704 128 704 112
WIRE 800 128 800 112
WIRE -64 160 -64 144
WIRE 32 208 -64 208
WIRE 64 208 32 208
WIRE 496 208 352 208
WIRE 592 208 592 192
WIRE 592 208 496 208
WIRE -64 224 -64 208
WIRE 496 224 496 208
WIRE 704 224 704 192
WIRE 800 224 800 208
WIRE -64 304 -64 288
WIRE 32 304 32 208
WIRE 64 304 32 304
WIRE 496 320 496 304
WIRE 160 384 160 368
WIRE 256 384 256 368
SYMBOL voltage -64 48 R0
SYMATTR InstName V1
SYMATTR Value 16
SYMBOL cap 688 128 R0
SYMATTR InstName C3
SYMATTR Value 47
SYMATTR SpiceLine Rser=5m
SYMBOL ind 368 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=10m Rpar=1K
SYMBOL res 480 112 R0
SYMATTR InstName R1
SYMATTR Value 619K
SYMBOL res 784 112 R0
SYMATTR InstName Rload
SYMATTR Value 6
SYMBOL LTC3624-2 208 208 R0
SYMATTR InstName U1
SYMBOL cap -80 224 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL res 480 208 R0
SYMATTR InstName R2
SYMATTR Value 32.4K
SYMBOL cap 576 128 R0
SYMATTR InstName C2
SYMATTR Value 15p
FLAG 160 384 0
FLAG 256 384 0
FLAG -64 304 0
FLAG -64 160 0
FLAG 496 320 0
FLAG 704 224 0
FLAG 800 224 0
FLAG -32 32 IN
FLAG 752 112 OUT
TEXT 104 448 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4221-1C.asc
* Generated by LTspice 26.0.1 for Windows.
* GND1 is modeled as common GND
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4221-1C.asy)
R3 Gate_B N007 5.11
R2 Gate_A N001 5.11
C1 Gate_A 0 2.2n
XU1 Vin N003 0 N005 N006 0 N007 N004 0 N001 N002 ADuM4221-1C ;pnba PWM)VDD1)GND1)DISABLE)DT)GNDB)VOB)VDDB)GNDA)VOA)VDDA
C2 Gate_B 0 2.2n
V2 N003 0 5
V1 Vin 0 PULSE(0 5 0 2n 2n 5u 10u)
V4 N004 0 15
R1 N006 0 10K
V3 N005 0 0
V5 N002 0 15
.tran 50u
.lib ADuM4221-1C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 3080 680
WIRE -1824 -432 -2208 -432
WIRE -1728 -432 -1824 -432
WIRE -1136 -432 -1424 -432
WIRE -1008 -432 -1056 -432
WIRE -880 -432 -1008 -432
WIRE -832 -432 -880 -432
WIRE -1008 -400 -1008 -432
WIRE -2208 -384 -2208 -432
WIRE -1248 -368 -1424 -368
WIRE -1728 -352 -2096 -352
WIRE -1248 -352 -1248 -368
WIRE -1008 -320 -1008 -336
WIRE -1392 -304 -1424 -304
WIRE -2096 -288 -2096 -352
WIRE -1728 -272 -1760 -272
WIRE -1248 -224 -1424 -224
WIRE -1248 -208 -1248 -224
WIRE -1728 -176 -1984 -176
WIRE -1392 -160 -1424 -160
WIRE -1728 -112 -1872 -112
WIRE -1136 -96 -1424 -96
WIRE -1008 -96 -1056 -96
WIRE -880 -96 -1008 -96
WIRE -832 -96 -880 -96
WIRE -1984 -80 -1984 -176
WIRE -1872 -64 -1872 -112
WIRE -1008 -64 -1008 -96
WIRE -1008 32 -1008 0
WIRE -2208 128 -2208 -304
WIRE -2096 128 -2096 -208
WIRE -1984 128 -1984 0
WIRE -1872 128 -1872 16
SYMBOL voltage -1984 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 0
SYMBOL res -1040 -448 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5.11
SYMBOL cap -1024 -64 R0
SYMATTR InstName C2
SYMATTR Value 2.2n
SYMBOL voltage -2208 -400 R0
WINDOW 0 26 98 Left 2
WINDOW 3 33 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 2n 2n 5u 10u)
SYMBOL voltage -1248 -368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 43 29 Left 2
WINDOW 3 46 61 Left 2
SYMATTR InstName V5
SYMATTR Value 15
SYMBOL voltage -2096 -304 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res -1040 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5.11
SYMBOL voltage -1248 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 34 Left 2
WINDOW 3 45 64 Left 2
SYMATTR InstName V4
SYMATTR Value 15
SYMBOL ADuM4221-1C -1568 -336 R0
SYMATTR InstName U1
SYMBOL res -1888 -80 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL cap -1024 -400 R0
SYMATTR InstName C1
SYMATTR Value 2.2n
FLAG -1984 128 0
FLAG -1392 -160 0
FLAG -2208 128 0
FLAG -2096 128 0
FLAG -1824 -432 Vin
FLAG -1392 -304 0
FLAG -1760 -272 0
FLAG -1872 128 0
FLAG -1248 -128 0
FLAG -880 -96 Gate_B
FLAG -880 -432 Gate_A
FLAG -1008 32 0
FLAG -1008 -320 0
FLAG -1248 -272 0
TEXT -1728 8 Left 2 !.tran 50u
TEXT -1728 -16 Left 1 ;GND1 is modeled as common GND
* Z:\home\khalils\Downloads\files\data\raw_asc\26cc0b9fd7d2_Ideal_clocked_comparator.asc
* Generated by LTspice 26.0.1 for Windows.
E1 diff 0 Vinp Vinm 1
B1 Vout 0 V=v(hold)>0?v(vdd):0
Etp tp 0 Vdd 0 0.5
C2 hold 0 100p
C1 sample 0 100p
E2 N001 0 sample 0 1
S3 sample diff tp Clock switch
S4 hold N001 Clock tp switch
.model switch SW
.ic v(hold)=1 v(sample)=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 6308 700
WIRE 800 -352 800 -368
WIRE 752 -336 720 -336
WIRE 752 -272 752 -288
WIRE 800 -272 752 -272
WIRE 800 -256 800 -272
WIRE 1616 -176 1616 -208
WIRE 1760 -112 1664 -112
WIRE 1664 -96 1664 -112
WIRE 656 -80 640 -80
WIRE 704 -80 656 -80
WIRE 864 -80 784 -80
WIRE 960 -80 864 -80
WIRE 1104 -80 1008 -80
WIRE 1248 -80 1184 -80
WIRE 1360 -80 1248 -80
WIRE 640 -64 640 -80
WIRE 864 -64 864 -80
WIRE 1008 -64 1008 -80
WIRE 1248 -64 1248 -80
WIRE 592 -48 560 -48
WIRE 960 -48 960 -80
WIRE 592 0 560 0
WIRE 1664 0 1664 -16
WIRE 864 16 864 0
WIRE 960 16 960 0
WIRE 1008 16 960 16
WIRE 1248 16 1248 0
WIRE 1008 32 1008 16
IOPIN 1760 -112 Out
IOPIN 1616 -208 Out
IOPIN 560 -48 In
IOPIN 560 0 In
SYMBOL e 800 -368 R0
WINDOW 0 36 32 Left 0
WINDOW 3 37 73 Left 0
SYMATTR InstName Etp
SYMATTR Value 0.5
SYMBOL sw 1200 -80 M270
WINDOW 3 24 -12 Left 0
WINDOW 38 39 37 Left 0
WINDOW 0 35 82 Left 0
SYMATTR Value ""
SYMATTR SpiceModel switch
SYMATTR InstName S4
SYMBOL e 1008 -80 R0
WINDOW 0 36 32 Left 0
WINDOW 3 37 73 Left 0
SYMATTR InstName E2
SYMATTR Value 1
SYMBOL sw 800 -80 M270
WINDOW 3 24 -12 Left 0
WINDOW 38 39 37 Left 0
WINDOW 0 35 82 Left 0
SYMATTR Value ""
SYMATTR SpiceModel switch
SYMATTR InstName S3
SYMBOL cap 1232 -64 R0
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL bv 1664 -112 R0
SYMATTR InstName B1
SYMATTR Value V=v(hold)>0?v(vdd):0
SYMBOL cap 848 -64 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL e 640 -80 R0
SYMATTR InstName E1
SYMATTR Value 1
FLAG 1760 -112 Vout
FLAG 1616 -208 VDD
FLAG 560 -48 Vinp
FLAG 768 -32 Clock
FLAG 560 0 Vinm
FLAG 640 16 0
FLAG 864 16 0
FLAG 1248 16 0
FLAG 720 -336 Vdd
FLAG 800 -256 0
FLAG 800 -368 tp
FLAG 720 -32 tp
FLAG 1168 -32 tp
FLAG 656 -80 diff
FLAG 864 -80 sample
FLAG 1248 -80 hold
FLAG 1120 -32 Clock
FLAG 1008 32 0
FLAG 1664 0 0
TEXT 952 152 Left 0 !.model switch SW
TEXT 600 80 Left 0 !.ic v(hold)=1 v(sample)=1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6992-4.asc
* Generated by LTspice 26.0.1 for Windows.
* 400Hz, 95% to 0% Duty Cycle\nSwept Pulse Width Modulated Output\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6992-4.asy)
V1 N002 0 3
R2 N004 0 1000K
R1 N003 0 487K
R3 N002 N004 392K
R4 PWMout 0 10K
XU1 N001 0 N003 N004 N002 PWMout LTC6992-4 ;pnba MOD)GND)SET)DIV)V+)OUT
V2 N001 0 PULSE(0 1 10m 50m 50m 5m 110m)
.tran 120m startup
.lib LTC6992-4.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -176 96 -192 96
WIRE 96 96 -96 96
WIRE 624 96 320 96
WIRE 624 112 624 96
WIRE 96 176 80 176
WIRE 368 176 320 176
WIRE 496 176 368 176
WIRE 368 192 368 176
WIRE 496 192 496 176
WIRE 624 208 624 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 336 256 320 256
WIRE 336 288 336 256
WIRE 368 288 368 272
WIRE 368 288 336 288
WIRE 496 288 496 272
WIRE 368 304 368 288
WIRE 368 400 368 384
SYMBOL res 352 288 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL voltage -80 96 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 1 10m 50m 50m 5m 110m)
SYMATTR InstName V2
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 487K
SYMBOL res 352 176 R0
SYMATTR InstName R3
SYMATTR Value 392K
SYMBOL SpecialFunctions\\LTC6992-4 208 176 R0
SYMATTR InstName U1
SYMBOL res 608 96 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL voltage 496 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3
FLAG -192 96 0
FLAG 368 400 0
FLAG 496 288 0
FLAG 624 96 PWMout
FLAG 80 176 0
FLAG -16 256 0
FLAG 624 208 0
TEXT 528 368 Left 2 !.tran 120m startup
TEXT 208 56 Bottom 2 ;400Hz, 95% to 0% Duty Cycle\nSwept Pulse Width Modulated Output\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\abd349e5af71_transistor_vth.asc
* Generated by LTspice 26.0.1 for Windows.
M19 ds gate 0 gate pmos l=access_tran_L w=access_tran_W
R1 N002 gate 1k
R2 N001 ds 100
V1 N001 0 10mV
V2 N002 0 PULSE(0 30 0 1 0 0 1)
I1 0 thresh_current {vth_current}
Rthresh_res thresh_current 0 100
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include ../DRAM_models/transistor_model.pm
.tran 1
* .step param Vgate 0.0V 3V 0.2V
.param access_tran_L={85nm*access_tran_L_factor}
.param access_tran_W={55nm*access_tran_W_factor}
.param access_tran_L_factor={0.95**tech_node}
.param access_tran_W_factor={0.85**tech_node}
.param tech_node=7
.param vth_current={(access_tran_W/access_tran_L)*100nA}
.OPTIONS plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4232 2520
WIRE -2240 -736 -2432 -736
WIRE -2432 -704 -2432 -736
WIRE -2240 -688 -2240 -736
WIRE -2384 -576 -2432 -576
WIRE -2704 -544 -2816 -544
WIRE -2560 -544 -2624 -544
WIRE -2512 -544 -2560 -544
WIRE -2480 -544 -2512 -544
WIRE -2816 -480 -2816 -544
WIRE -2432 -464 -2432 -528
WIRE -2512 -400 -2512 -544
WIRE -2384 -400 -2384 -576
WIRE -2384 -400 -2512 -400
WIRE -2800 -144 -2896 -144
WIRE -2800 -128 -2800 -144
WIRE -2896 -48 -2896 -144
WIRE -2800 -16 -2800 -48
WIRE -2896 16 -2896 -48
FLAG -2240 -608 0
FLAG -2432 -464 0
FLAG -2816 -400 0
FLAG -2432 -624 ds
FLAG -2560 -544 gate
FLAG -2896 96 0
FLAG -2800 -16 0
FLAG -2896 -48 thresh_current
SYMBOL nmos4 -2480 -624 R0
WINDOW 0 104 24 Invisible 2
WINDOW 3 179 41 Invisible 2
SYMATTR InstName M19
SYMATTR Value pmos
SYMATTR Value2 l=access_tran_L w=access_tran_W
SYMBOL res -2720 -528 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res -2448 -720 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL voltage -2240 -704 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 10mV
SYMBOL voltage -2816 -496 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 30 0 1 0 0 1)
SYMBOL current -2896 96 M180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value {vth_current}
SYMBOL res -2816 -144 R0
SYMATTR InstName thresh_res
SYMATTR Value 100
TEXT -2360 -264 Left 2 !.include ../DRAM_models/transistor_model.pm
TEXT -2352 -296 Left 2 !.tran 1
TEXT -2352 -224 Left 2 ;.step param Vgate 0.0V 3V 0.2V
TEXT -2352 -80 Left 2 !.param access_tran_L={85nm*access_tran_L_factor}
TEXT -2352 -48 Left 2 !.param access_tran_W={55nm*access_tran_W_factor}
TEXT -2352 8 Left 2 !.param access_tran_L_factor={0.95**tech_node}
TEXT -2352 40 Left 2 !.param access_tran_W_factor={0.85**tech_node}
TEXT -2344 -120 Left 2 !.param tech_node=7
TEXT -2352 96 Left 2 !.param vth_current={(access_tran_W/access_tran_L)*100nA}
TEXT -2352 -184 Left 2 !.OPTIONS plotwinsize=0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6235.asc
* Generated by LTspice 26.0.1 for Windows.
* Single Supply, Low Noise, Low Power, Bandpass Filter with Gain=10
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6235.asy)
V1 +V 0 10
R5 N002 N001 732
V2 IN 0 ac 1
XU1 N003 N002 OUT +V 0 LT6234 ;pnba IN+)IN-)OUT)VCC)VEE
R1 OUT N001 732
C2 OUT N002 47p
C3 N001 IN 1000p
C1 N003 0 .1
R3 +V N003 10K
R4 N003 0 10K
.ac oct 100 100K 10Meg
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -336 -32 -336 -48
WIRE -192 0 -224 0
WIRE 144 0 -112 0
WIRE -80 48 -96 48
WIRE 144 48 144 0
WIRE 144 48 -16 48
WIRE -336 64 -336 48
WIRE -32 128 -48 128
WIRE 80 128 80 112
WIRE 80 128 48 128
WIRE 80 160 80 128
WIRE -320 176 -400 176
WIRE -224 176 -224 0
WIRE -224 176 -256 176
WIRE -208 176 -224 176
WIRE -96 176 -96 48
WIRE -96 176 -128 176
WIRE 48 176 -96 176
WIRE -400 192 -400 176
WIRE 144 192 144 48
WIRE 144 192 112 192
WIRE 160 192 144 192
WIRE -48 208 -48 128
WIRE -48 208 -128 208
WIRE 48 208 -48 208
WIRE -128 224 -128 208
WIRE -48 224 -48 208
WIRE 80 240 80 224
WIRE -400 288 -400 272
WIRE -128 320 -128 288
WIRE -48 320 -48 304
SYMBOL opamps\\LT6235 80 192 R0
SYMATTR InstName U1
SYMBOL res -64 208 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res -112 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 732
SYMBOL cap -16 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 47p
SYMBOL cap -256 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1000p
SYMBOL res -96 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 732
SYMBOL cap -144 224 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage -336 -48 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 64 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL voltage -400 176 R0
SYMATTR InstName V2
SYMATTR Value ac 1
FLAG -336 64 0
FLAG 80 112 +V
FLAG -336 -48 +V
FLAG -48 320 0
FLAG -128 320 0
FLAG -400 288 0
FLAG 160 192 OUT
FLAG -400 176 IN
FLAG 80 240 0
TEXT 48 312 Left 2 !.ac oct 100 100K 10Meg
TEXT -56 -104 Bottom 2 ;Single Supply, Low Noise, Low Power, Bandpass Filter with Gain=10