Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0f54e9a3181f_Nand2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 PULSE(0 1 1n 10p 10p 20n 40n)
V2 VDD 0 PULSE(0 1 1n 10p 10p 10n 20n)
M3 NAND N001 N002 0 NMOS l=1u w=10u
M6 VDD N001 NAND VDD PMOS l=1u w=10u
M5 VDD N001 NAND VDD PMOS l=1u w=10u
M2 N002 N001 N003 0 NMOS l=1u w=10u
M1 N003 N001 0 0 NMOS l=1u w=10u
M4 VDD N001 NAND VDD PMOS l=1u w=10u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.tran 0 100n 0 1p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE 256 -160 96 -160
WIRE 512 -160 480 -160
WIRE 752 -160 720 -160
WIRE 96 -128 96 -160
WIRE 480 -128 480 -160
WIRE 480 -128 96 -128
WIRE 720 -128 720 -160
WIRE 720 -128 480 -128
WIRE 304 -96 304 -144
WIRE 560 -96 560 -144
WIRE 560 -96 304 -96
WIRE 800 -96 800 -144
WIRE 800 -96 560 -96
WIRE 928 -96 800 -96
WIRE 256 -16 208 -16
WIRE 96 48 96 -128
WIRE 96 48 0 48
WIRE 208 48 208 -16
WIRE 208 48 96 48
WIRE 304 64 304 0
WIRE 208 144 208 48
WIRE 256 144 208 144
WIRE 304 224 304 160
WIRE 208 304 208 144
WIRE 256 304 208 304
IOPIN 928 -96 Out
SYMBOL nmos4 256 -96 R0
WINDOW 123 57 100 Left 2
SYMATTR InstName M3
SYMATTR Value2 l=1u w=10u
SYMBOL voltage 0 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 1n 10p 10p 20n 40n)
SYMBOL nmos4 256 64 R0
WINDOW 123 56 100 Left 2
SYMATTR InstName M2
SYMATTR Value2 l=1u w=10u
SYMBOL nmos4 256 224 R0
WINDOW 123 56 100 Left 2
SYMATTR InstName M1
SYMATTR Value2 l=1u w=10u
SYMBOL pmos4 256 -240 R0
WINDOW 123 75 -34 Left 2
SYMATTR InstName M4
SYMATTR Value2 l=1u w=10u
SYMBOL voltage 640 0 R0
WINDOW 3 35 76 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 1n 10p 10p 10n 20n)
SYMBOL pmos4 512 -240 R0
WINDOW 123 76 -34 Left 2
SYMATTR InstName M5
SYMATTR Value2 l=1u w=10u
SYMBOL pmos4 752 -240 R0
WINDOW 123 74 -33 Left 2
SYMATTR InstName M6
SYMATTR Value2 l=1u w=10u
FLAG 304 112 0
FLAG 304 272 0
FLAG 304 -48 0
FLAG 640 96 0
FLAG 0 128 0
FLAG 304 320 0
FLAG 640 16 VDD
FLAG 304 -192 VDD
FLAG 560 -192 VDD
FLAG 800 -192 VDD
FLAG 800 -240 VDD
FLAG 560 -240 VDD
FLAG 304 -240 VDD
FLAG 928 -96 NAND
TEXT 720 120 Left 2 !.include cmosedu_models.txt
TEXT -48 344 Left 2 !.tran 0 100n 0 1p
* Z:\home\khalils\Downloads\files\data\raw_asc\6aea2f9bc203_inv_amp.asc
* Generated by LTspice 26.0.1 for Windows.
* Inverting Amplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP27.asy)
Vn1 V- 0 -5
R3 +2 0 10k
R2 +2 N001 2.2k
V1 W1 0 SINE(0 1 1k)
Vp1 V+ 0 5
XU1 0 N001 V+ V- +2 OP27 ;pnba In+)In-)V+)V-)OUT
R1 N001 W1 1k
.tran 10m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 32 256 32
WIRE 400 32 352 32
WIRE 304 160 304 112
WIRE 96 176 96 160
WIRE 96 176 80 176
WIRE 128 176 96 176
WIRE 256 176 256 32
WIRE 256 176 208 176
WIRE 272 176 256 176
WIRE -256 192 -256 176
WIRE -256 192 -272 192
WIRE -128 192 -128 176
WIRE -128 192 -144 192
WIRE 400 192 400 32
WIRE 400 192 336 192
WIRE 416 192 400 192
WIRE 432 192 416 192
WIRE -256 208 -256 192
WIRE -128 208 -128 192
WIRE 272 208 240 208
WIRE 416 240 416 192
WIRE 96 256 96 176
WIRE 240 272 240 208
WIRE 304 272 304 224
WIRE -256 320 -256 288
WIRE -128 320 -128 288
WIRE -128 320 -256 320
WIRE -128 336 -128 320
WIRE 96 368 96 336
WIRE 416 384 416 320
IOPIN 80 176 In
IOPIN 96 160 In
IOPIN 432 192 In
IOPIN -272 192 In
IOPIN -144 192 In
SYMBOL voltage -256 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vp1
SYMATTR Value 5
SYMBOL voltage -128 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vn1
SYMATTR Value -5
SYMBOL res 224 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 368 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2.2k
SYMBOL voltage 96 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1k)
SYMBOL Opamps\\OP27 304 128 R0
SYMATTR InstName U1
SYMBOL res 400 224 R0
SYMATTR InstName R3
SYMATTR Value 10k
FLAG 96 368 0
FLAG 304 272 Vn
FLAG 304 112 Vp
FLAG 416 384 0
FLAG 240 272 0
FLAG 80 176 W1
FLAG 96 160 +1
FLAG 432 192 +2
FLAG -128 336 0
FLAG -256 176 Vp
FLAG -128 176 Vn
FLAG -272 192 V+
FLAG -144 192 V-
TEXT 96 -48 Left 2 ;Inverting Amplifier
TEXT -288 424 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\510fad32ea85_1077.asc
* Generated by LTspice 26.0.1 for Windows.
* Half-Wave Rectifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1077.asy)
R2 N001 IN 1Meg
R3 N002 0 1Meg
R1 OUT N001 2Meg
V3 IN 0 SINE(0 1 100)
XU1 N002 N001 +V 0 OUT LT1078 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 3
.tran .1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -96 96 -128 96
WIRE 16 96 -16 96
WIRE 48 96 16 96
WIRE 144 96 128 96
WIRE 160 96 144 96
WIRE 256 96 240 96
WIRE 192 208 192 192
WIRE 144 224 144 96
WIRE 160 224 144 224
WIRE -96 240 -96 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 288 240 256 240
WIRE 64 256 48 256
WIRE 160 256 144 256
WIRE 192 288 192 272
WIRE -96 336 -96 320
SYMBOL res 144 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL opamps\\LT1077 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -96 224 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL voltage 0 96 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
SYMBOL res 160 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2Meg
FLAG -96 336 0
FLAG 192 192 +V
FLAG -96 224 +V
FLAG -128 96 0
FLAG 48 256 0
FLAG 192 288 0
FLAG 16 96 IN
FLAG 288 240 OUT
TEXT 296 320 Left 2 !.tran .1
TEXT 152 32 Bottom 2 ;Half-Wave Rectifier
* Z:\tmp\asc_dec_bjh7r6w2\08322eadb1cd_BuckConverter_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
S1 N002 N001 VPulse 0 ideal_sw
V2 VPulse 0 PULSE(0 10 0 1n 1n {D*Ts} {Ts})
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -64 -32 -64
WIRE 144 -16 144 -64
WIRE 224 0 224 -48
WIRE 224 0 192 0
WIRE 288 0 288 -64
WIRE 192 96 192 48
WIRE -32 128 -32 -64
WIRE 288 128 288 80
WIRE 144 192 144 64
WIRE 352 192 144 192
WIRE 144 256 144 192
WIRE -32 368 -32 208
SYMBOL sw 144 80 R180
SYMATTR InstName S1
SYMATTR Value ideal_sw
SYMBOL voltage 288 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 10 0 1n 1n {D*Ts} {Ts})
FLAG 288 -64 VPulse
FLAG 224 -48 VPulse
FLAG 192 96 0
FLAG 288 128 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8062.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 12
C1 OUT 0 .1m
XU1 IN IN IN NC_01 NC_02 0 N001 NC_03 OUT MP_04 OUT IN 0 LTM8062 ;pnba Vin)Vin_reg)Run)_CHRG)_Fault)Timer)ADJ)NTC)BAT))Bias)VinA)GND
R1 OUT N001 274K
R2 N001 0 2.87Meg
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8062.asy)
.lib LTM8062.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 912 680
WIRE 64 -64 -32 -64
WIRE 80 -64 64 -64
WIRE -32 -48 -32 -64
WIRE 64 32 64 -64
WIRE 80 32 64 32
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 80 128 64 128
WIRE 432 128 368 128
WIRE 496 128 432 128
WIRE 496 144 496 128
WIRE 64 224 64 128
WIRE 80 224 64 224
WIRE 432 224 432 128
WIRE 432 224 368 224
WIRE 496 224 496 208
WIRE 432 272 432 224
WIRE 80 320 64 320
WIRE 80 416 64 416
WIRE 432 416 432 352
WIRE 432 416 368 416
WIRE 432 432 432 416
WIRE 432 528 432 512
FLAG 64 416 0
FLAG -32 48 0
FLAG 496 224 0
FLAG -32 -64 IN
FLAG 496 128 OUT
FLAG 64 320 0
FLAG 432 528 0
SYMBOL voltage -32 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 480 144 R0
SYMATTR InstName C1
SYMATTR Value .1m
SYMBOL PowerProducts\\LTM8062 224 176 R0
SYMATTR InstName U1
SYMBOL res 416 256 R0
SYMATTR InstName R1
SYMATTR Value 274K
SYMBOL res 416 416 R0
SYMATTR InstName R2
SYMATTR Value 2.87Meg
TEXT 608 504 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1999-10.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N001 N002 N004 MP_01 0 N005 OUT N003 LT1999-x Gain=10 ;pnba V+)+IN)-IN))GND)Ref)Vout)_SHDN
C1 0 N005 .1
V1 N002 N004 sine(0 .1 5K)
V2 N004 0 sine(5 1 1K)
V3 N001 0 5
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1999-10.asy)
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 112 -160 112
WIRE -160 128 -160 112
WIRE 256 128 256 112
WIRE 144 176 -64 176
WIRE 400 176 368 176
WIRE -64 208 -64 176
WIRE -160 224 -160 208
WIRE 400 256 368 256
WIRE -64 336 -64 288
WIRE 144 336 -64 336
WIRE 384 336 368 336
WIRE 480 336 448 336
WIRE -64 352 -64 336
WIRE 256 400 256 384
WIRE -64 448 -64 432
FLAG 256 400 0
FLAG 480 336 0
FLAG -64 448 0
FLAG 400 256 OUT
FLAG -160 224 0
SYMBOL opamps\\LT1999-10 256 256 R0
SYMATTR InstName U1
SYMBOL cap 448 320 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage -64 192 R0
SYMATTR InstName V1
SYMATTR Value sine(0 .1 5K)
SYMBOL voltage -64 336 R0
SYMATTR InstName V2
SYMATTR Value sine(5 1 1K)
SYMBOL voltage -160 112 R0
SYMATTR InstName V3
SYMATTR Value 5
TEXT 416 432 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\0353242a39e3_nor_gate.asc
* Generated by LTspice 26.0.1 for Windows.
M1 X A 0 N003 NMOS
M2 X B 0 N004 NMOS
M3 P001 A X N002 PMOS
M4 Vdd B P001 N001 PMOS
V1 A 0 0
V2 B 0 0
V3 Vdd 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 480 -160 192 -160
WIRE 192 0 192 -160
WIRE 192 0 48 0
WIRE 224 0 192 0
WIRE 272 0 272 -32
WIRE -432 32 -528 32
WIRE -336 32 -432 32
WIRE 224 96 112 96
WIRE 272 96 272 64
WIRE 272 128 272 112
WIRE 528 128 272 128
WIRE 272 144 272 128
WIRE 272 144 192 144
WIRE 368 144 272 144
WIRE 112 176 112 96
WIRE 112 176 48 176
WIRE 112 224 112 176
WIRE 144 224 112 224
WIRE 192 224 192 192
WIRE 368 224 368 192
WIRE 480 224 480 -160
WIRE 480 224 416 224
WIRE 272 240 192 240
WIRE 368 240 272 240
WIRE 272 256 272 240
FLAG 272 256 0
FLAG 272 -80 Vdd
IOPIN 272 -80 In
FLAG 48 176 A
IOPIN 48 176 In
FLAG 48 0 B
IOPIN 48 0 In
FLAG 528 128 X
IOPIN 528 128 Out
FLAG -528 -48 A
IOPIN -528 -48 In
FLAG -432 -48 B
IOPIN -432 -48 In
FLAG -336 -48 Vdd
IOPIN -336 -48 In
FLAG -432 32 0
SYMBOL nmos4 144 144 R0
SYMATTR InstName M1
SYMBOL nmos4 416 144 M0
SYMATTR InstName M2
SYMBOL pmos4 224 16 R0
SYMATTR InstName M3
SYMBOL pmos4 224 -80 R0
SYMATTR InstName M4
SYMBOL voltage -528 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL voltage -432 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage -336 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
TEXT -592 280 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\b91ecc291c28_question_1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 8
R1 N003 0 1k
R2 N001 N002 1k
M1 N002 N005 N003 N003 MOSFET l=60u w=135u
V2 N004 0 5
R3 N005 N004 1.875Meg
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model MOSFET NMOS(Vto=1,KP=0.44m,W=135u,L=60u)
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 928 680
WIRE 352 -32 224 -32
WIRE 224 0 224 -32
WIRE 352 0 352 -32
WIRE 224 128 224 80
WIRE 240 176 224 176
WIRE 48 208 -16 208
WIRE 176 208 128 208
WIRE -16 240 -16 208
WIRE 224 240 224 224
WIRE 240 240 240 176
WIRE 240 240 224 240
WIRE 224 256 224 240
WIRE -16 368 -16 320
WIRE 224 368 224 336
SYMBOL res 208 -16 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 208 240 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL nmos4 176 128 R0
SYMATTR InstName M1
SYMATTR Value2 l=60u w=135u
SYMATTR Value MOSFET
SYMBOL voltage 352 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 8
SYMBOL res 144 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1.875Meg
SYMBOL voltage -16 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
FLAG 224 368 0
FLAG 352 80 0
FLAG -16 368 0
TEXT 256 232 Left 2 !.model MOSFET NMOS(Vto=1,KP=0.44m,W=135u,L=60u)
TEXT 336 328 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3112.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3112.asy)
XU1 0 N007 N006 0 IN MP_01 IN N008 OUT MP_02 MP_03 N002 MP_04 N004 N001 MP_05 N003 N005 IN LTC3112 ;pnba GND)COMP)FB)OVP)Vin))RUN)Iout)Vout)))SW2))Bst2)SW1))Bst1)Vcc)PWM/SYNC
R3 N006 0 158K
C5 N006 N007 680p Rser=33K Cpar=22p
C1 N008 0 100p
C7 OUT 0 47
Rload OUT 0 2.5
R2 OUT N006 845K
L1 N001 N002 4.7
C3 N001 N003 .1
R1 N008 0 42.2K
C4 N002 N004 .1
C2 N005 0 1
C6 OUT N006 47p Rser=10K
V1 IN 0 6
.tran 2.5m startup
.lib LTC3112.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 996 680
WIRE 160 -112 32 -112
WIRE 176 -112 160 -112
WIRE 288 -112 256 -112
WIRE 400 -112 288 -112
WIRE 32 -80 32 -112
WIRE 400 -80 400 -112
WIRE 160 -64 160 -112
WIRE 288 -64 288 -112
WIRE 32 0 32 -16
WIRE 80 0 32 0
WIRE 400 0 400 -16
WIRE 400 0 368 0
WIRE 64 96 -16 96
WIRE 80 96 64 96
WIRE 432 96 368 96
WIRE 720 96 432 96
WIRE 816 96 720 96
WIRE 896 96 816 96
WIRE -16 112 -16 96
WIRE 432 128 432 96
WIRE 720 128 720 96
WIRE 816 128 816 96
WIRE 896 128 896 96
WIRE 64 192 64 96
WIRE 80 192 64 192
WIRE 384 192 368 192
WIRE -16 208 -16 192
WIRE 816 224 816 192
WIRE 896 224 896 208
WIRE 80 288 0 288
WIRE 432 288 432 192
WIRE 432 288 368 288
WIRE 720 288 720 208
WIRE 720 288 432 288
WIRE 0 304 0 288
WIRE 432 304 432 288
WIRE 720 304 720 288
WIRE 0 384 0 368
WIRE 64 384 64 192
WIRE 80 384 64 384
WIRE 432 384 432 368
WIRE 432 384 368 384
WIRE 720 400 720 384
WIRE 160 464 160 448
WIRE 288 464 288 448
WIRE 384 464 288 464
WIRE 288 480 288 464
WIRE 384 480 384 464
WIRE 288 576 288 544
WIRE 384 576 384 560
SYMBOL cap 416 304 R0
WINDOW 39 24 64 Left 2
WINDOW 3 42 37 Left 2
SYMATTR SpiceLine Rser=33K Cpar=22p
SYMATTR Value 680p
SYMATTR InstName C5
SYMBOL cap 272 480 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL voltage -16 96 R0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL res 880 112 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL res 368 464 R0
SYMATTR InstName R1
SYMATTR Value 42.2K
SYMBOL res 704 288 R0
SYMATTR InstName R3
SYMATTR Value 158K
SYMBOL cap 800 128 R0
SYMATTR InstName C7
SYMATTR Value 47
SYMBOL PowerProducts\\LTC3112 224 192 R0
SYMATTR InstName U1
SYMBOL cap 416 128 R0
WINDOW 39 24 92 Left 2
SYMATTR SpiceLine Rser=10K
SYMATTR InstName C6
SYMATTR Value 47p
SYMBOL cap 16 -80 R0
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL cap 384 -80 R0
SYMATTR InstName C4
SYMATTR Value .1
SYMBOL res 704 112 R0
SYMATTR InstName R2
SYMATTR Value 845K
SYMBOL ind 160 -96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL cap -16 304 R0
SYMATTR InstName C2
SYMATTR Value 1
FLAG 160 464 0
FLAG 288 576 0
FLAG 384 576 0
FLAG 0 384 0
FLAG -16 208 0
FLAG -16 96 IN
FLAG 384 192 0
FLAG 720 400 0
FLAG 816 224 0
FLAG 896 224 0
FLAG 896 96 OUT
TEXT 568 496 Left 2 !.tran 2.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\28d01c445f70_555_Timer_-_II.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\NE555.asy)
R5 2V 0 100k
C1 Control_Voltage 0 10n
R4 4V 2V 100k
V3 Threshold 0 PULSE(0 6 0 50u 50u 0 100u)
R3 Vcc 4V 100k
XU1 0 Trigger Vout Reset Control_Voltage Threshold Discharge Vcc NE555 ;pnba GND)TRIG)OUT)RST)CV)THRS)DIS)Vcc
R2 Vcc Discharge 1k
V4 Reset 0 PULSE(0 6 5u 1f 1f 10 10)
V2 Trigger 0 PULSE(0 6 0 10u 10u 0 20u)
R1 Vout 0 1k
V1 Vcc 0 6
.tran 80u
.lib NE555.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 80 32 80
WIRE 320 80 320 64
WIRE 320 80 288 80
WIRE 32 96 32 80
WIRE 32 144 -112 144
WIRE 64 144 32 144
WIRE 320 144 288 144
WIRE 352 144 320 144
WIRE 448 144 448 128
WIRE 448 144 432 144
WIRE -112 160 -112 144
WIRE 592 160 592 144
WIRE 592 176 592 160
WIRE 48 208 32 208
WIRE 64 208 48 208
WIRE 320 208 288 208
WIRE 448 208 320 208
WIRE -48 224 -48 208
WIRE 448 224 448 208
WIRE -112 256 -112 240
WIRE 32 272 0 272
WIRE 64 272 32 272
WIRE 320 272 288 272
WIRE 592 272 592 256
WIRE 0 288 0 272
WIRE 592 288 592 272
WIRE 0 304 0 288
WIRE 592 384 592 368
SYMBOL voltage 0 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 6 5u 1f 1f 10 10)
SYMBOL res 448 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 576 48 R0
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL voltage 496 48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL res 576 272 R0
SYMATTR InstName R5
SYMATTR Value 100k
SYMBOL Misc\\NE555 176 176 R0
SYMATTR InstName U1
SYMBOL res 576 160 R0
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL cap 304 272 R0
WINDOW 0 24 13 Left 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL voltage -112 144 R0
WINDOW 3 -171 103 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 6 0 10u 10u 0 20u)
SYMBOL voltage 448 208 R0
WINDOW 3 -60 116 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 6 0 50u 50u 0 100u)
SYMBOL res 48 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 496 144 0
FLAG 496 64 Vcc
FLAG 320 64 Vcc
FLAG 32 96 0
FLAG -48 224 0
FLAG 320 336 0
FLAG 448 128 Vcc
FLAG -112 256 0
FLAG 0 368 0
FLAG 448 304 0
FLAG 32 144 Trigger
FLAG 48 208 Vout
FLAG 32 272 Reset
FLAG 320 272 Control_Voltage
FLAG 320 208 Threshold
FLAG 320 144 Discharge
FLAG 592 384 0
FLAG 592 64 Vcc
FLAG 592 272 2V
FLAG 592 160 4V
TEXT 54 424 Left 2 !.tran 80u
* Z:\home\khalils\Downloads\files\data\raw_asc\0213aa848440_SparkGap.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\neonbulb.asy)
C_ion ion 0 190n Rpar=1 ; ionization time constant
R_off 1 2 1e6 ; dark resistance (affects breakdown voltage)
V1 1 0 SINE(0 300 100k)
B_ion 0 ion I=I(V_ion)**2 ; measure of channel ionization
XU1 2 0 Spark_Gap ;pnba V+)V-
V_ion 3 4 0 ; current sense for behavioral sources
R_ion 1 2 R=10/V(ion)**.75 ; dynamic ionization resistance
R1 2 1 10
Dfall 2 3 10V ; bidirectional cathode fall voltage
.subckt spark_gap 1 4
.model 10V d(Vfwd=10 Vrev=10 Ron=10m)
.ends spark_gap
.tran 0 20u 0 50n
.lib neonbulb.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -464 -32 -480 -32
WIRE -400 -32 -464 -32
WIRE -256 -32 -320 -32
WIRE -240 -32 -256 -32
WIRE -240 0 -240 -32
WIRE -480 16 -480 -32
WIRE -480 128 -480 96
WIRE -240 128 -240 96
SYMBOL res -304 -48 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage -480 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 300 100k)
SYMBOL Misc\\neonbulb -240 48 R0
WINDOW 3 17 56 Left 0
SYMATTR InstName U1
SYMATTR Value2 ""
SYMATTR SpiceModel ""
SYMATTR SpiceLine ""
SYMATTR SpiceLine2 ""
SYMATTR Value Spark_Gap
FLAG -240 128 0
FLAG -480 128 0
FLAG -464 -32 1
FLAG -256 -32 2
TEXT -536 224 Left 0 !.subckt spark_gap 1 4\nR_off 1 2 1e6 ; dark resistance (affects breakdown voltage)\nR_ion 1 2 R=10/V(ion)**.75 ; dynamic ionization resistance\nDfall 2 3 10V ; bidirectional cathode fall voltage\nV_ion 3 4 0 ; current sense for behavioral sources\nB_ion 0 ion I=I(V_ion)**2 ; measure of channel ionization\nC_ion ion 0 190n Rpar=1 ; ionization time constant\n.model 10V d(Vfwd=10 Vrev=10 Ron=10m)\n.ends spark_gap
TEXT -536 160 Left 0 !.tran 0 20u 0 50n
* Z:\home\khalils\Downloads\files\data\raw_asc\6de93b7559e2_Draft6.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N003 0 PULSE(0 3.3 0 2n 2n {0.5/28Meg} {1/28Meg})
R4 N006 0 200
R1 N001 N005 22k
R3 N005 0 10k
R2 N004 N003 330
C1 N005 N004 22n
Q1 N002 N005 N006 0 2N3904
V2 N001 0 13.3
V1 NC_01 0 SINE(1.65 1.65 28Meg)
R5 N001 N002 220
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 1u 0 100p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 560 -64 368 -64
WIRE 560 -32 560 -64
WIRE 368 96 368 -64
WIRE 560 128 560 48
WIRE 80 144 -192 144
WIRE -192 176 -192 144
WIRE 80 176 80 144
WIRE 272 176 160 176
WIRE 368 176 336 176
WIRE 496 176 368 176
WIRE 560 288 560 224
SYMBOL voltage -192 160 R0
WINDOW 3 -575 90 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 3.3 0 2n 2n {0.5/28Meg} {1/28Meg})
SYMBOL res 544 -48 R0
SYMATTR InstName R5
SYMATTR Value 220
SYMBOL res 544 272 R0
SYMATTR InstName R4
SYMATTR Value 200
SYMBOL res 176 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 330
SYMBOL npn 496 128 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage 368 -48 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 13.3
SYMBOL voltage -16 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(1.65 1.65 28Meg)
SYMBOL cap 336 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL res 352 80 R0
SYMATTR InstName R1
SYMATTR Value 22k
SYMBOL res 352 160 R0
SYMATTR InstName R3
SYMATTR Value 10k
FLAG -16 256 0
FLAG 368 256 0
FLAG 368 -144 0
FLAG 560 368 0
FLAG -192 256 0
TEXT -48 280 Left 2 !.tran 0 1u 0 100p
* Z:\tmp\asc_dec_bjh7r6w2\0989f9930f45_MAX40100_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
CL OUT 0 15p
XU1 IN OUT Vcc Vee OUT Vcc MAX40100 ;pnba In+)In-)V+)V-)OUT)SHDN
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX40100.asy)
.lib MAX40100.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 416 352 416 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 400 400 304 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 416 448 416 416
WIRE 448 448 448 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 304 592 304 576
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL MAX40100 432 400 R0
SYMATTR InstName U1
FLAG 720 384 OUT
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
FLAG 448 448 Vcc