Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\3d6de1b83fec_Bonus3.asc
* Generated by LTspice 26.0.1 for Windows.
L2 out N002 {2/3}
V1 N001 0 AC 1 Rser=1
C2 N002 0 {24}
C1 out N001 {24/31}
L1 N001 0 2
.net V(out) V1
.ac dec 1000000 10m 1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 352 80 128 80
WIRE 432 80 352 80
WIRE 592 80 496 80
WIRE 592 96 592 80
WIRE 128 144 128 80
WIRE 352 144 352 80
WIRE 592 192 592 176
WIRE 128 256 128 224
WIRE 352 256 352 224
SYMBOL voltage 128 128 R0
WINDOW 123 24 124 Left 2
WINDOW 39 24 152 Left 2
SYMATTR Value2 AC 1
SYMATTR SpiceLine Rser=1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL cap 496 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {24/31}
SYMBOL ind 576 80 R0
SYMATTR InstName L2
SYMATTR Value {2/3}
SYMBOL cap 576 192 R0
SYMATTR InstName C2
SYMATTR Value {24}
SYMBOL ind 336 128 R0
SYMATTR InstName L1
SYMATTR Value 2
FLAG 352 256 0
FLAG 592 256 0
FLAG 128 256 0
FLAG 592 80 out
TEXT 88 304 Left 2 !.net V(out) V1
TEXT 64 344 Left 2 !.ac dec 1000000 10m 1
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX1853.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX1853.asy)
C2 OUT 0 10
C1 N001 N002 1
Rload OUT 0 50
V1 IN 0 5
XU1 IN OUT N001 N002 0 IN MAX1853 ;pnba IN)OUT)C1+)C1-)GND)_SHDN
.tran 2m startup
.lib MAX1853.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2884 1464
WIRE 2416 1008 2080 1008
WIRE 2576 1008 2416 1008
WIRE 2080 1024 2080 1008
WIRE 2416 1024 2416 1008
WIRE 2272 1088 2208 1088
WIRE 2576 1088 2576 1008
WIRE 2576 1088 2560 1088
WIRE 2080 1120 2080 1104
WIRE 2208 1136 2208 1088
WIRE 2208 1248 2208 1200
WIRE 2272 1248 2208 1248
WIRE 2624 1248 2560 1248
WIRE 2736 1248 2624 1248
WIRE 2624 1264 2624 1248
WIRE 2736 1264 2736 1248
WIRE 2416 1328 2416 1312
WIRE 2624 1360 2624 1328
WIRE 2736 1360 2736 1344
SYMBOL MAX1853 2416 1168 R0
SYMATTR InstName U1
SYMBOL cap 2192 1136 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL VOLTAGE 2080 1008 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2608 1264 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL RES 2720 1248 R0
SYMATTR InstName Rload
SYMATTR Value 50
FLAG 2416 1328 0
FLAG 2624 1360 0
FLAG 2080 1120 0
FLAG 2736 1360 0
FLAG 2736 1248 OUT
FLAG 2080 1008 IN
TEXT 2352 1376 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\44cd5ab44f8c_ComplexDiodeModel.asc
* Generated by LTspice 26.0.1 for Windows.
B1 0 N001 I=Iph_T*v(illu)/1000
D1 N001 0 SolarDiode
R1 N001 0 {rsh_t}
R2 N001 v+ {rs_t}
I1 v+ 0 PULSE(0 10 0 1 1) load
R3 illu 0 100Meg
V1 illu 0 {illu}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1
.temp 25
.temp 10 25 40 55 70
.step param illu list 200 400 600 800 1000
.param illu 1000
.param Voc 44.71
.param Isc 8.947
.param Vmp 37.23
.param Imp 8.06
.param Ki 0.0005
.param Kv -0.0034
.param K 1.38e-23
.param e 1.6e-19
.param a 1.3
.param n Voc/0.7
.param a_n a*n
.param voc_t voc*(1-kv*(25-temp))
.param isc_t isc*(1-ki*(25-temp))
.param vmp_t vmp*(1-kv*(25-temp))
.param imp_t imp*(1-ki*(25-temp))
.param rs_t (voc_t-vmp_t)/(16*imp_t)
.param rsh_t (5*vmp_t)/(isc_t-imp_t)
.param iph_t isc_t*(rsh_t+rs_t)/rsh_t
.param v_t (k*(temp+273.15))/e
.model solardiode d(is=io_t N=a_n Tnom=temp)
.param io_t ((rs_t+rsh_t)*isc_t-voc_t)/(rsh_t*exp(voc_t/(a_n*v_t)))
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 128 -128 128
WIRE -112 160 -112 128
WIRE -112 160 -192 160
WIRE -96 160 -112 160
WIRE 96 160 -16 160
WIRE 240 160 96 160
WIRE 400 160 240 160
WIRE -112 208 -128 208
WIRE -112 240 -112 208
WIRE -112 240 -192 240
WIRE 96 240 -112 240
WIRE 240 240 240 224
WIRE 240 240 96 240
WIRE 400 240 240 240
WIRE -192 256 -192 240
WIRE 432 320 336 320
WIRE 336 352 336 320
WIRE 432 352 432 320
WIRE 336 448 336 432
WIRE 432 448 432 432
FLAG -192 256 0
FLAG -128 128 v+
FLAG -128 208 v-
FLAG 336 448 0
FLAG 432 448 0
FLAG 432 320 illu
SYMBOL bi2 400 160 R0
SYMATTR InstName B1
SYMATTR Value I=Iph_T*v(illu)/1000
SYMBOL diode 224 160 R0
SYMATTR InstName D1
SYMATTR Value SolarDiode
SYMBOL res 80 144 R0
SYMATTR InstName R1
SYMATTR Value {rsh_t}
SYMBOL res 0 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {rs_t}
SYMBOL current -192 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 108 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMATTR Value PULSE(0 10 0 1 1)
SYMBOL res 416 336 R0
SYMATTR InstName R3
SYMATTR Value 100Meg
SYMBOL voltage 336 336 R0
SYMATTR InstName V1
SYMATTR Value {illu}
TEXT -184 -888 Left 2 !.tran 1\n \n.temp 25\n.temp 10 25 40 55 70\n \n.step param illu list 200 400 600 800 1000\n.param illu 1000\n \n.param Voc 44.71\n.param Isc 8.947\n.param Vmp 37.23\n.param Imp 8.06\n.param Ki 0.0005\n.param Kv -0.0034\n.param K 1.38e-23\n.param e 1.6e-19\n.param a 1.3\n.param n Voc/0.7\n.param a_n a*n\n \n.param voc_t voc*(1-kv*(25-temp))\n.param isc_t isc*(1-ki*(25-temp))\n.param vmp_t vmp*(1-kv*(25-temp))\n.param imp_t imp*(1-ki*(25-temp))\n.param rs_t (voc_t-vmp_t)/(16*imp_t)\n.param rsh_t (5*vmp_t)/(isc_t-imp_t)\n.param iph_t isc_t*(rsh_t+rs_t)/rsh_t\n.param v_t (k*(temp+273.15))/e
TEXT -168 56 Left 2 !.model solardiode d(is=io_t N=a_n Tnom=temp)
TEXT -192 -96 Left 2 !.param io_t ((rs_t+rsh_t)*isc_t-voc_t)/(rsh_t*exp(voc_t/(a_n*v_t)))
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3527-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3527-1.asy)
C1 OUT2 0 4.7
Rload2 OUT2 0 12
R1 OUT2 N004 619K
R4 N003 0 1Meg
L2 IN N002 4.7 Rpar=2K
R3 OUT1 N003 1.78Meg
XU1 IN N003 0 IN OUT1 N001 N002 OUT2 IN 0 N004 IN NC_01 0 IN NC_02 LTC3527-1 ;pnba _SHDN1)FB1)Mode)Vin1)Vout1)SW1)SW2)Vout2)Vin2)Fsel)FB2)_SHDN2)Pgood2)GND)Vin)Pgood1
V1 IN 0 2.5
L1 IN N001 4.7 Rpar=2K
C2 OUT1 0 4.7
R2 N004 0 1.21Meg
Rload1 OUT1 0 22
.tran 0.7m startup
.lib LTC3527-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 464 -160 -160 -160
WIRE 112 -128 -96 -128
WIRE 192 -128 112 -128
WIRE 272 -128 192 -128
WIRE 368 -128 272 -128
WIRE 112 -112 112 -128
WIRE 192 -112 192 -128
WIRE 272 -112 272 -128
WIRE -96 -32 -96 -128
WIRE 48 -32 -96 -32
WIRE 368 -32 368 -128
WIRE 368 -32 336 -32
WIRE -160 80 -160 -160
WIRE -160 80 -288 80
WIRE -96 80 -96 -32
WIRE -96 80 -160 80
WIRE -64 80 -96 80
WIRE 48 80 16 80
WIRE 352 80 336 80
WIRE 464 80 464 -160
WIRE 464 80 432 80
WIRE -288 96 -288 80
WIRE -288 192 -288 176
WIRE -160 304 -288 304
WIRE -80 304 -160 304
WIRE 48 304 -80 304
WIRE 384 304 336 304
WIRE 496 304 384 304
WIRE 576 304 496 304
WIRE -288 320 -288 304
WIRE -160 320 -160 304
WIRE -80 320 -80 304
WIRE 384 320 384 304
WIRE 496 320 496 304
WIRE 576 320 576 304
WIRE -288 416 -288 400
WIRE -160 416 -160 384
WIRE -80 416 -80 400
WIRE 48 416 -80 416
WIRE 384 416 384 400
WIRE 384 416 336 416
WIRE 496 416 496 384
WIRE 576 416 576 400
WIRE -80 432 -80 416
WIRE 384 432 384 416
WIRE 112 512 112 496
WIRE 192 512 192 496
WIRE 272 512 272 496
WIRE -80 528 -80 512
WIRE 384 528 384 512
SYMBOL res 368 416 R0
SYMATTR InstName R2
SYMATTR Value 1.21Meg
SYMBOL res -304 304 R0
SYMATTR InstName Rload1
SYMATTR Value 22
SYMBOL res 368 304 R0
SYMATTR InstName R1
SYMATTR Value 619K
SYMBOL PowerProducts\\LTC3527-1 192 192 R0
SYMATTR InstName U1
SYMBOL res -96 304 R0
SYMATTR InstName R3
SYMATTR Value 1.78Meg
SYMBOL cap 480 320 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL ind 448 96 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=2K
SYMBOL ind -80 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=2K
SYMBOL res -96 416 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL voltage -288 80 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL cap -176 320 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL res 560 304 R0
SYMATTR InstName Rload2
SYMATTR Value 12
FLAG 384 528 0
FLAG 576 416 0
FLAG 496 416 0
FLAG 192 512 0
FLAG 112 512 0
FLAG 272 512 0
FLAG -80 528 0
FLAG -288 416 0
FLAG -160 416 0
FLAG -288 192 0
FLAG -288 80 IN
FLAG -288 304 OUT1
FLAG 576 304 OUT2
TEXT 552 496 Left 2 !.tran 0.7m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2139-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2139-3.0.asy)
C1 OUT 0 10
Rload OUT 0 5
L1 N001 OUT 1 Rser=60m
XU1 IN IN N001 OUT 0 IN ADP2139-x.x Rtop=400K ;pnba Vin)EN)SW)Vout)GND)Mode
V1 IN 0 5
.tran .5m startup
.lib ADP2139-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 192 224 192 144
WIRE 208 224 192 224
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 224
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADP2139-3.0 352 224 R0
SYMATTR InstName U1
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=60m
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
TEXT 600 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\acc6b51324af_sim.asc
* Generated by LTspice 26.0.1 for Windows.
R2 Vin N002 1k
XU1 N001 Vin N002 opamp Aol=1000K GBW=100Meg ;pnba invin)noninvin)out
R3 N001 N002 1k
I1 Vin 0 SINE(0 1 1 0 0 0 100) AC 1 0
R4 N001 0 1k
R1 Vin 0 1k
.ac dec 100 1 1e5
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 80 -96 80
WIRE 224 80 80 80
WIRE 304 80 224 80
WIRE 400 80 336 80
WIRE 544 80 400 80
WIRE -96 112 -96 80
WIRE 80 112 80 80
WIRE 224 112 224 80
WIRE 400 112 400 80
WIRE 544 112 544 80
WIRE 304 128 304 80
WIRE 336 128 336 80
WIRE 224 224 224 192
WIRE 320 224 320 192
WIRE 320 224 224 224
WIRE 400 224 400 192
WIRE 400 224 320 224
WIRE -96 256 -96 192
WIRE 80 256 80 192
WIRE 80 256 -96 256
WIRE 544 256 544 192
WIRE 544 256 80 256
SYMBOL res 528 96 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL current -96 112 R0
WINDOW 3 -9 183 Left 2
WINDOW 123 -9 209 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value SINE(0 1 1 0 0 0 100)
SYMATTR Value2 AC 1 0
SYMBOL res 208 96 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL Opamps\\opamp 384 160 R90
SYMATTR InstName U1
SYMATTR SpiceLine Aol=1000K
SYMATTR SpiceLine2 GBW=100Meg
SYMBOL res 64 96 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 384 96 R0
SYMATTR InstName R3
SYMATTR Value 1k
FLAG 80 256 0
FLAG -96 80 Vin
TEXT -106 348 Left 2 !.ac dec 100 1 1e5
TEXT 168 296 Left 2 !.lib opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\906c5064f7b3_Set_unit.asc
* Generated by LTspice 26.0.1 for Windows.
;tran 0 1 0
R_POT_1 N002 N003 R=V(R_POT_1)
V4 5V 0 5V
V3 -12V 0 -12V
V5 R_POT_1 0
R1 0 N003 3k
V1 LM35 0 PWL(0 0 0.2 0 0.8 1 1 1)
XU3 N002 Vset 12V -12V Vset LM741/NS ;pnba In+)In-)V+)V-)OUT
R_POT2 N001 N002 R= 100k-V(R_POT_1)
R2 12V N001 40k
V2 12V 0 12
.include D:\GITHUB\EE313-Term-project\Simulation\Sensing Unit\LM741.MOD
.dc V5 1 100000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4272 2160
WIRE -912 320 -912 256
WIRE -624 320 -624 256
WIRE -480 320 -480 256
WIRE -336 320 -336 256
WIRE -912 448 -912 400
WIRE -624 448 -624 400
WIRE -480 448 -480 400
WIRE -336 448 -336 400
WIRE 416 1392 336 1392
WIRE 512 1392 496 1392
WIRE 880 1392 672 1392
WIRE 336 1456 336 1392
WIRE 752 1504 752 1456
WIRE 672 1520 672 1392
WIRE 720 1520 672 1520
WIRE 880 1536 880 1392
WIRE 880 1536 784 1536
WIRE 928 1536 880 1536
WIRE 176 1552 176 1536
WIRE 336 1552 336 1536
WIRE 720 1552 336 1552
WIRE 336 1584 336 1552
WIRE 752 1648 752 1568
WIRE 176 1664 176 1632
WIRE 336 1712 336 1664
WIRE 400 1712 336 1712
WIRE 512 1712 480 1712
SYMBOL voltage -480 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -12V
SYMBOL res 320 1440 R0
SYMATTR InstName R_POT2
SYMATTR Value R= 100k-V(R_POT_1)
SYMBOL voltage -624 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL OpAmps\\opamp2 752 1472 R0
SYMATTR InstName U3
SYMATTR Value LM741/NS
SYMBOL voltage 176 1536 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value ""
SYMBOL res 496 1696 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3k
SYMBOL res 320 1568 R0
SYMATTR InstName R_POT_1
SYMATTR Value R=V(R_POT_1)
SYMBOL res 512 1376 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 40k
SYMBOL voltage -912 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 0.2 0 0.8 1 1 1)
SYMBOL voltage -336 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5V
FLAG -912 448 0
FLAG -912 256 LM35
FLAG -624 448 0
FLAG -624 256 12V
FLAG -480 448 0
FLAG -480 256 -12V
FLAG -336 448 0
FLAG -336 256 5V
FLAG 752 1456 12V
FLAG 752 1648 -12V
FLAG 928 1536 Vset
FLAG 512 1392 12V
FLAG 512 1712 0
FLAG 176 1664 0
FLAG 176 1536 R_POT_1
TEXT -160 352 Left 2 !.include D:\\GITHUB\\EE313-Term-project\\Simulation\\Sensing Unit\\LM741.MOD
TEXT -1096 352 Left 2 !;tran 0 1 0
TEXT 128 1480 VRight 2 !.dc V5 1 100000
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6402-20.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
V2 N003 0 2.2
XU1 N001 N003 N001 0 _OUT NC_01 NC_02 OUT 0 N001 0 0 N002 N002 N004 N004 LT6402-20 ;pnba VccC)VOCM)VccA)VeeA)+OUT)+OUTFILT)-OUTFILT)-OUT)VeeB)VccB)_EN)VeeC)-INB)-INA)+INB)+INA
V3 N002 N004 SINE(0 .1 10Meg)
.tran 1u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6402-20.asy)
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1564 1892
WIRE 128 368 -256 368
WIRE 208 368 128 368
WIRE 288 368 208 368
WIRE -256 384 -256 368
WIRE 128 400 128 368
WIRE 208 400 208 368
WIRE 288 400 288 368
WIRE 368 400 368 352
WIRE -256 480 -256 464
WIRE 32 480 -176 480
WIRE 64 480 32 480
WIRE 448 496 416 496
WIRE 32 512 32 480
WIRE 64 512 32 512
WIRE -176 528 -176 480
WIRE 480 576 416 576
WIRE 592 576 560 576
WIRE 64 640 32 640
WIRE 448 656 416 656
WIRE -176 672 -176 608
WIRE 32 672 32 640
WIRE 32 672 -176 672
WIRE 64 672 32 672
WIRE 160 784 160 752
WIRE 240 784 240 752
WIRE 320 784 320 752
FLAG -256 480 0
FLAG 592 576 0
FLAG 448 656 OUT
FLAG 448 496 _OUT
FLAG 368 352 0
FLAG 160 784 0
FLAG 240 784 0
FLAG 320 784 0
SYMBOL voltage -256 368 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 464 576 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value 2.2
SYMBOL LT6402-20 240 576 R0
SYMATTR InstName U1
SYMBOL voltage -176 512 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 .1 10Meg)
TEXT 552 704 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3971A-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3971A-5.asy)
R5 N001 0 1Meg
C1 OUT 0 47 Rser=5m
D1 0 N006 DFLS220L
C2 N004 N006 .47
V1 IN 0 24
R3 OUT N007 20K
R2 N007 0 715K
XU1 OUT N004 N006 IN N001 N007 N003 N005 N002 MP_01 0 LT3971-5 ;pnba BD)Boost)SW)Vin)EN)Vout)SS)Rt)PG))GND
Rload OUT 0 3.96
L1 N006 OUT 10
C3 N003 0 .001
R6 IN N001 5Meg
R1 N005 0 118K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LT3971-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1004 680
WIRE -48 -64 -160 -64
WIRE 400 -64 -48 -64
WIRE -160 -48 -160 -64
WIRE -48 -48 -48 -64
WIRE -160 48 -160 32
WIRE -48 48 -48 32
WIRE 80 48 -48 48
WIRE 400 48 400 -64
WIRE 400 48 368 48
WIRE -48 64 -48 48
WIRE 80 144 64 144
WIRE 592 144 368 144
WIRE -48 160 -48 144
WIRE 0 240 -32 240
WIRE 80 240 64 240
WIRE 400 240 368 240
WIRE 400 256 400 240
WIRE -16 336 -32 336
WIRE 80 336 64 336
WIRE 400 336 400 320
WIRE 400 336 368 336
WIRE 448 336 400 336
WIRE 592 336 592 144
WIRE 592 336 528 336
WIRE 704 336 592 336
WIRE 784 336 704 336
WIRE 400 352 400 336
WIRE 592 352 592 336
WIRE 784 352 784 336
WIRE 704 368 704 336
WIRE 80 432 64 432
WIRE 592 432 368 432
WIRE 400 448 400 416
WIRE 592 448 592 432
WIRE 704 448 704 432
WIRE 784 448 784 432
WIRE 592 544 592 528
SYMBOL res -64 48 R0
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL cap 384 256 R0
WINDOW 3 24 54 Left 2
SYMATTR Value .47
SYMATTR InstName C2
SYMBOL voltage -160 -64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL ind 432 352 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL schottky 384 416 M180
WINDOW 0 26 68 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value DFLS220L
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL PowerProducts\\LT3971A-5 224 240 R0
SYMATTR InstName U1
SYMBOL res 576 432 R0
SYMATTR InstName R2
SYMATTR Value 715K
SYMBOL res 80 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 118K
SYMBOL cap 64 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL res 768 336 R0
SYMATTR InstName Rload
SYMATTR Value 3.96
SYMBOL res 576 336 R0
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL cap 688 368 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMATTR SpiceLine Rser=5m
SYMBOL res -64 -64 R0
SYMATTR InstName R6
SYMATTR Value 5Meg
FLAG 64 432 0
FLAG -32 336 0
FLAG 784 448 0
FLAG 704 448 0
FLAG 592 544 0
FLAG -160 48 0
FLAG 400 448 0
FLAG -48 160 0
FLAG -32 240 0
FLAG -160 -64 IN
FLAG 784 336 OUT
TEXT 752 536 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\4550e6e69e05_Aufgabe_1.1_DCSweep.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N001 V+ V- out LM324 ;pnba In+)In-)V+)V-)OUT
V1 V+ 0 5
V2 0 V- 5
R1 out N001 200e3
R2 N001 in 10e3
V4 in 0 0 AC 10m
.include LM324.txt
;tran 20m
.dc V4 -500mV 500mV 50mV
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 0 -224 0
WIRE -32 0 -96 0
WIRE 112 0 48 0
WIRE 160 0 112 0
WIRE 256 0 240 0
WIRE -224 16 -224 0
WIRE 560 32 560 16
WIRE 560 48 560 32
WIRE 192 112 192 96
WIRE 112 128 112 0
WIRE 160 128 112 128
WIRE -224 144 -224 96
WIRE 256 144 256 0
WIRE 256 144 224 144
WIRE 288 144 256 144
WIRE 304 144 288 144
WIRE 560 144 560 128
WIRE 560 144 512 144
WIRE 160 160 128 160
WIRE 512 160 512 144
WIRE 560 176 560 144
WIRE 128 192 128 160
WIRE 192 208 192 176
WIRE 560 272 560 256
WIRE 560 288 560 272
FLAG 512 160 0
FLAG 560 32 V+
FLAG 560 272 V-
FLAG 192 96 V+
FLAG 192 208 V-
FLAG 288 144 out
FLAG -224 144 0
FLAG 128 192 0
FLAG -96 0 in
SYMBOL Opamps\\opamp2 192 80 R0
SYMATTR InstName U1
SYMATTR Value LM324
SYMBOL voltage 560 32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 560 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 256 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200e3
SYMBOL res 64 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10e3
SYMBOL voltage -224 0 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 24 160 Left 2
SYMATTR Value2 AC 10m
SYMATTR Value 0
SYMATTR InstName V4
TEXT 616 -48 Left 2 !.include LM324.txt
TEXT -256 240 Left 2 !;tran 20m
TEXT -256 216 Left 2 !.dc V4 -500mV 500mV 50mV
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7185-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7185-3.asy)
C4 N003 0 1
XU1 OUT OUT N001 N002 IN 0 N003 IN ADP7185-3 ;pnba Vout)Sense)VA)VAFB)EN)GND)Vreg)Vin
V1 IN 0 -3.5
C3 N001 0 1
R3 OUT 0 6
C1 N001 N002 10n
C2 OUT 0 4.7 Rser=5m
.tran 200m startup
.lib ADP7185-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 16 -48
WIRE 96 -48 32 -48
WIRE 112 -48 96 -48
WIRE 400 -48 368 -48
WIRE 432 -48 400 -48
WIRE 496 -48 432 -48
WIRE 512 -48 496 -48
WIRE 16 -32 16 -48
WIRE 432 -32 432 -48
WIRE 512 -32 512 -48
WIRE 400 16 400 -48
WIRE 400 16 368 16
WIRE 432 48 432 32
WIRE 16 64 16 48
WIRE 512 64 512 48
WIRE 96 80 96 -48
WIRE 112 80 96 80
WIRE 464 80 368 80
WIRE 384 144 368 144
WIRE 464 144 464 80
WIRE 464 144 448 144
WIRE 464 160 464 144
WIRE 176 224 176 208
WIRE 304 224 304 208
WIRE 464 240 464 224
WIRE 176 320 176 288
SYMBOL voltage 16 -48 R0
SYMATTR InstName V1
SYMATTR Value -3.5
SYMBOL cap 448 160 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 496 -48 R0
SYMATTR InstName R3
SYMATTR Value 6
SYMBOL ADP7185-3 240 48 R0
SYMATTR InstName U1
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=5m
SYMBOL cap 160 224 R0
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap 448 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
FLAG 16 64 0
FLAG 432 48 0
FLAG 304 224 0
FLAG 512 64 0
FLAG 32 -48 IN
FLAG 496 -48 OUT
FLAG 464 240 0
FLAG 176 320 0
TEXT 136 352 Left 2 !.tran 200m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2e74982e7805_1004-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1004-1.2.asy)
XU1 OUT 0 LT1004-1.2 ;pnba VOUT)GND
V1 N001 0 PULSE(0 5 100u 10n 10n 500u 1)
R1 OUT N001 36K
.tran 700u
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 980 680
WIRE 96 112 -144 112
WIRE 368 112 176 112
WIRE -144 128 -144 112
WIRE 368 128 368 112
WIRE -144 224 -144 208
WIRE 368 224 368 192
SYMBOL LT1004-1.2 368 160 R0
SYMATTR InstName U1
SYMBOL voltage -144 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 100u 10n 10n 500u 1)
SYMBOL res 192 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 36K
FLAG 368 224 0
FLAG -144 224 0
FLAG 368 112 OUT
TEXT 392 288 Left 2 !.tran 700u
* Z:\home\khalils\Downloads\files\data\raw_asc\2c9605364dc6_transformer_sim.asc
* Generated by LTspice 26.0.1 for Windows.
K L1 L3 0.99925
L1 N004 N002 .65
V1 N001 0 SINE(0 3.45 1k) Rser=0.000001
R3 N004 0 10
R2 N002 N001 10
L3 0 N003 .00492
R1 0 N003 1
.tran .0001 .100
.meas REP MAX((V(N001) - V(N002)) / I(R2))
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1064 680
WIRE 256 240 176 240
WIRE 480 240 336 240
WIRE 800 240 640 240
WIRE 960 240 880 240
WIRE 176 288 176 240
WIRE 480 288 480 240
WIRE 640 288 640 240
WIRE 176 432 176 368
WIRE 240 432 176 432
WIRE 480 432 480 368
WIRE 480 432 336 432
WIRE 640 432 640 368
WIRE 960 432 960 240
WIRE 960 432 640 432
WIRE 336 448 336 432
WIRE 176 464 176 432
WIRE 640 464 640 432
WIRE 640 464 416 464
WIRE 240 560 240 432
WIRE 336 560 336 528
WIRE 336 560 240 560
WIRE 416 560 416 464
WIRE 416 560 336 560
SYMBOL ind2 656 384 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L3
SYMATTR Value .00492
SYMATTR Type ind
SYMBOL Res 896 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL Voltage 176 272 R0
SYMATTR InstName V1
SYMATTR Value SINE(0 3.45 1k)
SYMATTR SpiceLine Rser=0.000001
SYMBOL res 320 432 R0
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL ind2 496 384 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value .65
SYMATTR Type ind
SYMBOL Res 352 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
FLAG 176 464 0
TEXT 504 256 Left 2 !K L1 L3 0.99925
TEXT 480 504 Left 2 !.tran .0001 .100
TEXT 448 576 Left 2 !.meas REP MAX((V(N001) - V(N002)) / I(R2))