Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\57aedb2d295b_InstrumentationAmplifier.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N003 N001 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
XU2 N006 N008 N007 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
XU3 N004 N005 Vo opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R1 N002 N003 10k
R2 N003 N006 10k
R3 N006 N007 10k
R4 N004 N003 1k
R5 Vo N004 10k
R6 N005 N006 1k
R7 N005 0 10k
VElectrode_1 N001 0 30m
VElectrode_2 N008 0 30m
.tran 10m
.lib opamp.sub
* *R5/R4 (also R7/R6) ratio sets the gain.
* Common Mode Gain is zero because of the difference amplifier (the second stage)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1668 680
WIRE -272 80 -304 80
WIRE -96 80 -192 80
WIRE 16 96 -32 96
WIRE -304 112 -304 80
WIRE -96 112 -128 112
WIRE 16 128 16 96
WIRE 304 176 256 176
WIRE 416 176 384 176
WIRE -128 224 -128 112
WIRE 16 224 16 208
WIRE 16 224 -128 224
WIRE 112 224 16 224
WIRE 256 224 256 176
WIRE 256 224 192 224
WIRE 16 240 16 224
WIRE 256 256 256 224
WIRE 304 256 256 256
WIRE 416 272 416 176
WIRE 416 272 368 272
WIRE 448 272 416 272
WIRE 304 288 256 288
WIRE 16 336 16 320
WIRE 16 336 -128 336
WIRE 112 336 16 336
WIRE 256 336 256 288
WIRE 256 336 192 336
WIRE 16 352 16 336
WIRE 256 368 256 336
WIRE -128 448 -128 336
WIRE -96 448 -128 448
WIRE 16 464 16 432
WIRE 16 464 -32 464
WIRE -272 480 -304 480
WIRE -96 480 -192 480
WIRE 256 480 256 448
WIRE -304 512 -304 480
FLAG 256 480 0
FLAG -304 112 0
FLAG -304 512 0
FLAG 448 272 Vo
SYMBOL OpAmps\\opamp -64 160 M180
SYMATTR InstName U1
SYMBOL OpAmps\\opamp -64 400 R0
SYMATTR InstName U2
SYMBOL OpAmps\\opamp 336 208 R0
SYMATTR InstName U3
SYMBOL res 0 112 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 0 224 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 0 336 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 208 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL res 400 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL res 208 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 1k
SYMBOL res 240 352 R0
SYMATTR InstName R7
SYMATTR Value 10k
SYMBOL voltage -176 80 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Electrode_1
SYMATTR Value 30m
SYMBOL voltage -176 480 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Electrode_2
SYMATTR Value 30m
TEXT -328 544 Left 2 !.tran 10m
TEXT 704 16 Left 2 !.lib opamp.sub
TEXT 712 176 Left 2 ;*R5/R4 (also R7/R6) ratio sets the gain.
TEXT 720 224 Left 2 ;Common Mode Gain is zero because of the difference amplifier (the second stage)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6658-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6658-5.asy)
V3 IN 0 PWL(0 0 100u 0 +2u 7.5)
C1 N001 0 1
C3 OUT1 0 1
C2 OUT2 0 1
XU2 IN IN IN IN N001 OUT1 OUT1 OUT2 OUT2 0 N002 LT6658-5 ;pnba Vin)Vin1)Vin2)_OD)Bypass)Vout1_F)Vout1_S)Vout2_F)Vout2_S)Gnd)NR
.tran 500u
.lib LT6658-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1448 1048
WIRE 16 -16 -336 -16
WIRE 128 -16 16 -16
WIRE 224 -16 128 -16
WIRE 320 -16 224 -16
WIRE -336 0 -336 -16
WIRE 128 0 128 -16
WIRE 224 0 224 -16
WIRE 320 0 320 -16
WIRE 432 64 416 64
WIRE 496 64 432 64
WIRE 496 80 496 64
WIRE -336 96 -336 80
WIRE 432 144 432 64
WIRE 432 144 416 144
WIRE 496 160 496 144
WIRE 16 192 16 -16
WIRE 48 192 16 192
WIRE 432 224 416 224
WIRE 480 224 432 224
WIRE 480 240 480 224
WIRE 432 304 432 224
WIRE 432 304 416 304
WIRE 480 320 480 304
WIRE 128 400 128 384
WIRE 224 400 224 384
WIRE 320 400 320 384
WIRE 224 480 224 464
SYMBOL cap 208 400 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 464 240 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL LT6658-5 224 192 R0
SYMATTR InstName U2
SYMBOL voltage -336 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 0 100u 0 +2u 7.5)
SYMBOL cap 480 80 R0
SYMATTR InstName C2
SYMATTR Value 1
FLAG 128 400 0
FLAG 224 480 0
FLAG -336 96 0
FLAG 496 160 0
FLAG 480 320 0
FLAG 480 224 OUT1
FLAG 496 64 OUT2
FLAG -336 -16 IN
TEXT 464 464 Left 2 !.tran 500u
* Z:\home\khalils\Downloads\files\data\raw_asc\650a048e77ad_foster.asc
* Generated by LTspice 26.0.1 for Windows.
L2 N002 0 2 Rser=0
C2 Vi N002 0.5
V1 Vi 0 AC 1
L1 N001 0 2 Rser=0
C1 Vi N001 0.166
.ac dec 1000 1m 10
.net V(vi) V1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 64 16 64
WIRE 368 64 208 64
WIRE 208 96 208 64
WIRE 368 96 368 64
WIRE 16 144 16 64
WIRE 208 192 208 160
WIRE 368 192 368 160
WIRE 16 304 16 224
WIRE 208 304 208 272
WIRE 208 304 16 304
WIRE 368 304 368 272
WIRE 368 304 208 304
WIRE 16 320 16 304
SYMBOL ind 192 176 R0
SYMATTR InstName L1
SYMATTR Value 2
SYMATTR SpiceLine Rser=0
SYMBOL cap 352 96 R0
SYMATTR InstName C2
SYMATTR Value 0.5
SYMBOL cap 192 96 R0
SYMATTR InstName C1
SYMATTR Value 0.166
SYMBOL voltage 16 128 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL ind 352 176 R0
SYMATTR InstName L2
SYMATTR Value 2
SYMATTR SpiceLine Rser=0
FLAG 16 320 0
FLAG 16 64 Vi
TEXT -248 256 Left 2 !.ac dec 1000 1m 10
TEXT -248 296 Left 2 !.net V(vi) V1
* Z:\home\khalils\Downloads\files\data\raw_asc\57e8f3f6da09_mosfet.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Optos\PC817A.asy)
D1 N008 0 NSCW100
M1 N006 N009 0 0 IRL530NS_L
R3 N005 N007 1K
R2 N009 0 10K
R4 N004 N008 1K
R5 N003 N002 0.001R
V1 N001 0 PULSE(0 5 0.1 0.001 0.001 0.1 0.3 10)
V2 N003 0 12
XU1 N001 N004 N002 N005 PC817 Igain=1m ;pnba A)K)C)E
Q1 N002 N007 N009 0 BC817-25
R1 N003 N006 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1s startup
.lib PC817.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 240 -240 240
WIRE 384 240 192 240
WIRE 432 240 384 240
WIRE 576 240 512 240
WIRE 784 240 576 240
WIRE 576 272 576 240
WIRE 0 336 -16 336
WIRE 240 336 192 336
WIRE -240 352 -240 240
WIRE 240 352 240 336
WIRE 784 352 784 240
WIRE -16 384 -16 336
WIRE 384 400 384 240
WIRE 576 416 576 352
WIRE -240 448 -240 432
WIRE 240 448 240 432
WIRE 320 448 240 448
WIRE -16 496 -16 464
WIRE 448 496 384 496
WIRE 528 496 448 496
WIRE 448 528 448 496
WIRE 576 640 576 512
SYMBOL res 224 336 R0
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL npn 320 400 R0
SYMATTR InstName Q1
SYMATTR Value BC817-25
SYMBOL Optos/PC817A 96 288 R0
SYMATTR InstName U1
SYMBOL res 560 256 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL res 528 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 0.001R
SYMBOL LED -32 496 R0
SYMATTR InstName D1
SYMATTR Value NSCW100
SYMBOL res 432 512 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res -32 368 R0
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL voltage -240 336 R0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0.1 0.001 0.001 0.1 0.3 10)
SYMBOL nmos 528 416 R0
SYMATTR InstName M1
SYMATTR Value IRL530NS_L
SYMBOL voltage 784 336 R0
SYMATTR InstName V2
SYMATTR Value 12
FLAG 576 640 0
FLAG 784 432 0
FLAG 448 608 0
FLAG -16 560 0
FLAG -240 448 0
TEXT 696 552 Left 2 !.tran 1s startup
* Z:\tmp\asc_dec_bjh7r6w2\146930fe736d_Level_shift_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V4 V- 0 -15V
XU2 N005 N002 N003 V+ V- LT1678 ;pnba IN+)IN-)OUT)VCC)VEE
R4 N006 N005 10K
R2 N003 N002 10K
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1678.asy)
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2216 948
WIRE 528 48 448 48
WIRE 640 48 608 48
WIRE 688 48 640 48
WIRE 816 48 768 48
WIRE 928 48 816 48
WIRE 928 144 928 128
WIRE 992 144 928 144
WIRE 640 160 640 48
WIRE 656 160 640 160
WIRE 928 160 928 144
WIRE 816 176 816 48
WIRE 816 176 720 176
WIRE 656 192 640 192
WIRE 928 256 928 240
WIRE 528 288 496 288
WIRE 640 288 640 192
WIRE 640 288 608 288
WIRE 688 288 640 288
WIRE 928 288 768 288
WIRE 1072 288 928 288
WIRE 496 352 496 288
WIRE 928 416 928 288
WIRE 960 416 928 416
WIRE 848 448 848 432
WIRE 960 448 848 448
WIRE 848 464 848 448
SYMBOL voltage 656 -160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value -15V
SYMBOL Opamps\\LT1678 688 176 R0
SYMATTR InstName U2
SYMBOL res 784 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 784 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 512 -64 0
FLAG 512 -144 V+
FLAG 656 -64 0
FLAG 656 -144 V-
FLAG 816 -64 0
FLAG 816 -144 Vref
FLAG 496 352 0
FLAG 848 352 Vref
FLAG 688 144 V+
FLAG 688 208 V-
FLAG 928 256 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4899.asc
* Generated by LTspice 26.0.1 for Windows.
* ADA4899\nUnity-Gain Operation
* Disable: _DISABLE pin = -Vs\nEnable: _DISABLE pin = open\nLow Ib: _DISABLE pin = +Vs
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4899.asy)
RL Vout 0 1k
VS+ +Vs 0 5
VS- 0 -Vs 5
Rin N002 Vin 24.9
VIN Vin 0 PULSE(-1 1 20n 1n 1n 50n 100n)
XU1 N002 N001 +Vs -Vs Vout N001 NC_01 ADA4899 ;pnba IN+)IN-)V+)V-)OUT)FB)PD
.tran 100n
.lib ADA4899.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -336 32 -336 16
WIRE 208 64 112 64
WIRE 208 128 208 64
WIRE 224 128 224 64
WIRE 112 144 112 64
WIRE 192 144 112 144
WIRE -336 160 -336 112
WIRE -336 160 -368 160
WIRE 432 160 256 160
WIRE 480 160 432 160
WIRE -368 176 -368 160
WIRE -48 176 -160 176
WIRE 16 176 -48 176
WIRE 192 176 96 176
WIRE -336 192 -336 160
WIRE 432 192 432 160
WIRE -160 240 -160 176
WIRE 224 240 224 192
WIRE -336 288 -336 272
WIRE 432 304 432 272
WIRE -160 352 -160 320
SYMBOL voltage -336 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName VS+
SYMATTR Value 5
SYMBOL res 112 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rin
SYMATTR Value 24.9
SYMBOL res 416 176 R0
SYMATTR InstName RL
SYMATTR Value 1k
SYMBOL voltage -336 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName VS-
SYMATTR Value 5
SYMBOL ADA4899 224 176 R0
SYMATTR InstName U1
SYMBOL voltage -160 224 R0
WINDOW 0 42 50 Left 2
WINDOW 3 42 78 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 42 106 Left 2
SYMATTR InstName VIN
SYMATTR Value PULSE(-1 1 20n 1n 1n 50n 100n)
FLAG -48 176 Vin
FLAG 224 64 +Vs
FLAG 224 240 -Vs
FLAG 480 160 Vout
FLAG 432 304 0
FLAG -336 16 +Vs
FLAG -336 288 -Vs
FLAG -368 176 0
FLAG -160 352 0
TEXT -160 56 Left 2 !.tran 100n
TEXT -160 -24 Left 2 ;ADA4899\nUnity-Gain Operation
TEXT 48 384 Left 2 ;Disable: _DISABLE pin = -Vs\nEnable: _DISABLE pin = open\nLow Ib: _DISABLE pin = +Vs
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3995.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3995.asy)
R2 OUT N006 1Meg
C1 N002 0 .002
C5 OUT N006 10p
C4 OUT 0 47 x2 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
V1 IN 0 48
Rload OUT 0 1.1
XU1 N006 N002 OUT N003 N005 MP_01 MP_02 MP_03 MP_04 IN MP_05 MP_06 IN N004 N001 MP_07 0 LT3995 ;pnba FB)SS)OUT)Boost)SW)))))Vin)))EN)Rt)PG))GND
R3 N006 0 576K
D1 0 N005 B560C
L1 N005 OUT 8.2 Rser=10m
C3 N003 N005 .47
R1 N004 0 182K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib LT3995.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 96 -64 0 -64
WIRE 416 -64 96 -64
WIRE 0 -48 0 -64
WIRE 96 0 96 -64
WIRE 112 0 96 0
WIRE 416 0 416 -64
WIRE 416 0 400 0
WIRE 0 48 0 32
WIRE 112 96 96 96
WIRE 640 96 400 96
WIRE 32 192 16 192
WIRE 112 192 96 192
WIRE 432 192 400 192
WIRE 432 208 432 192
WIRE 16 288 0 288
WIRE 112 288 96 288
WIRE 432 288 432 272
WIRE 432 288 400 288
WIRE 528 288 432 288
WIRE 640 288 640 96
WIRE 640 288 608 288
WIRE 752 288 640 288
WIRE 848 288 752 288
WIRE 944 288 848 288
WIRE 432 304 432 288
WIRE 640 304 640 288
WIRE 752 304 752 288
WIRE 848 304 848 288
WIRE 944 304 944 288
WIRE 112 384 96 384
WIRE 640 384 400 384
WIRE 752 384 752 368
WIRE 752 384 640 384
WIRE 640 400 640 384
WIRE 848 400 848 368
WIRE 944 400 944 384
WIRE 640 496 640 480
SYMBOL ind 512 304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 8.2
SYMATTR SpiceLine Rser=10m
SYMBOL voltage 0 -64 R0
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL schottky 416 368 M180
WINDOW 0 24 64 Left 2
WINDOW 3 37 10 Left 2
SYMATTR InstName D1
SYMATTR Value B560C
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 96 176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .002
SYMBOL res 112 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 182K
SYMBOL res 624 288 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL cap 832 304 R0
WINDOW 123 28 58 Left 2
WINDOW 3 37 36 Left 2
SYMATTR Value2 x2
SYMATTR InstName C4
SYMATTR Value 47
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL res 624 384 R0
SYMATTR InstName R3
SYMATTR Value 576K
SYMBOL res 928 288 R0
SYMATTR InstName Rload
SYMATTR Value 1.1
SYMBOL cap 416 208 R0
SYMATTR InstName C3
SYMATTR Value .47
SYMBOL PowerProducts\\LT3995 256 192 R0
SYMATTR InstName U1
SYMBOL cap 736 304 R0
SYMATTR InstName C5
SYMATTR Value 10p
FLAG 96 384 0
FLAG 0 288 0
FLAG 16 192 0
FLAG 0 48 0
FLAG 848 400 0
FLAG 640 496 0
FLAG 944 400 0
FLAG 944 288 OUT
FLAG 0 -64 IN
FLAG 432 368 0
TEXT 824 472 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1271.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1271.asy)
XU1 N003 N002 0 N001 IN LT1271 ;pnba Vc)FB)GND)SW)Vin
C3 N004 0 1
V1 IN 0 5
R2 N002 0 1.24K
Rload OUT 0 10
R1 OUT N002 10.7K
L1 IN N001 100 Rser=0.02 Rpar=5000
C1 OUT 0 390 Rser=.05
D1 N001 OUT MBRS340
R3 N003 N004 1K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 15m startup
.lib LT1271.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1472
WIRE 1824 880 1600 880
WIRE 1888 880 1824 880
WIRE 2000 880 1968 880
WIRE 2048 880 2000 880
WIRE 2160 880 2112 880
WIRE 2288 880 2160 880
WIRE 2400 880 2288 880
WIRE 1600 896 1600 880
WIRE 2288 896 2288 880
WIRE 2400 896 2400 880
WIRE 2160 928 2160 880
WIRE 1824 944 1824 880
WIRE 1600 992 1600 976
WIRE 2288 992 2288 960
WIRE 2400 992 2400 976
WIRE 2000 1024 2000 880
WIRE 2000 1024 1952 1024
WIRE 2160 1088 2160 1008
WIRE 2160 1088 1952 1088
WIRE 2160 1104 2160 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2160 1200 2160 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
SYMBOL RES 2144 1088 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
SYMBOL POWERPRODUCTS\\LT1271 1824 1088 R0
SYMATTR InstName U1
SYMBOL IND 1872 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL RES 2144 912 R0
SYMATTR InstName R1
SYMATTR Value 10.7K
SYMBOL schottky 2048 896 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMBOL RES 2384 880 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL VOLTAGE 1600 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL polcap 2272 896 R0
SYMATTR InstName C1
SYMATTR Value 390
SYMATTR SpiceLine Rser=.05
FLAG 2400 880 OUT
FLAG 2160 1200 0
FLAG 2288 992 0
FLAG 2400 992 0
FLAG 2064 1248 0
FLAG 1824 1248 0
FLAG 1600 992 0
FLAG 1600 880 IN
TEXT 2208 1264 Left 2 !.tran 15m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC7001.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC7001.asy)
C2 N002 N005 0.1
XU1 N001 0 0 N003 0 N004 N004 N005 N002 LTC7001 ;pnba Vcc)Vccuv)GND)INP)OVLO)TGdn)TGup)TS)BST
R1 OUT 0 10
D2 0 N005 RF1001NS2D
M1 IN N004 N005 N005 IPB039N10N3
C1 OUT 0 10 Rser=7m
L1 N005 OUT 10 Rser=3m
D1 N001 N002 RF071MM2S
V1 N001 0 10
V3 IN 0 48
V2 N003 0 PULSE(0 8 0 10n 10n 0.3u 3.33u)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0.5m startup
.lib LTC7001.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2336 1256
WIRE 1120 -288 976 -288
WIRE 1328 -288 1184 -288
WIRE 1392 -288 1328 -288
WIRE 1584 -288 1520 -288
WIRE 1584 -272 1584 -288
WIRE 1392 -224 1392 -288
WIRE 864 -176 832 -176
WIRE 976 -176 976 -288
WIRE 976 -176 944 -176
WIRE 1008 -176 976 -176
WIRE 1328 -176 1328 -288
WIRE 1328 -176 1296 -176
WIRE 1520 -176 1520 -288
WIRE 1584 -176 1584 -192
WIRE 736 -96 688 -96
WIRE 1008 -96 816 -96
WIRE 1328 -96 1296 -96
WIRE 1472 -96 1328 -96
WIRE 1392 -32 1392 -160
WIRE 1520 -32 1520 -80
WIRE 1520 -32 1392 -32
WIRE 1616 -32 1520 -32
WIRE 1744 -32 1696 -32
WIRE 1856 -32 1744 -32
WIRE 1008 -16 976 -16
WIRE 1328 -16 1328 -96
WIRE 1328 -16 1296 -16
WIRE 1520 -16 1520 -32
WIRE 1744 -16 1744 -32
WIRE 1856 -16 1856 -32
WIRE 976 64 976 -16
WIRE 976 64 944 64
WIRE 1008 64 976 64
WIRE 1392 64 1392 -32
WIRE 1392 64 1296 64
WIRE 1520 80 1520 48
WIRE 1744 80 1744 48
WIRE 1856 80 1856 64
WIRE 1152 144 1152 112
SYMBOL diode 1504 48 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value RF1001NS2D
SYMBOL ind 1600 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=3m
SYMBOL LTC7001 1152 -48 R0
SYMATTR InstName U1
SYMBOL cap 1728 -16 R0
WINDOW 3 32 52 Left 2
SYMATTR Value 10
SYMATTR SpiceLine Rser=7m
SYMATTR InstName C1
SYMBOL voltage 960 -176 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL nmos 1472 -176 R0
SYMATTR InstName M1
SYMATTR Value IPB039N10N3
SYMBOL diode 1120 -272 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value RF071MM2S
SYMBOL res 1840 -32 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage 1584 -288 R0
SYMATTR InstName V3
SYMATTR Value 48
SYMBOL cap 1376 -224 R0
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL voltage 832 -96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 8 0 10n 10n 0.3u 3.33u)
FLAG 944 64 0
FLAG 832 -176 0
FLAG 688 -96 0
FLAG 1584 -176 0
FLAG 1744 80 0
FLAG 1856 80 0
FLAG 1856 -32 OUT
FLAG 1520 80 0
FLAG 1152 144 0
FLAG 1584 -288 IN
TEXT 1440 192 Left 2 !.tran 0.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1751-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1751-5.asy)
C2 N002 0 .001
R1 OUT N001 100K
C1 N003 N004 1
V1 IN 0 3
C3 OUT 0 10
Rload OUT 0 50
XU1 N001 OUT IN 0 N004 N003 IN N002 LTC1751-5 ;pnba Pgood)Vout)Vin)GND)C-)C+)_SHDN)SS
.tran 1m startup
.lib LTC1751-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 680
WIRE 96 160 -32 160
WIRE 128 160 96 160
WIRE 432 160 384 160
WIRE 544 160 432 160
WIRE 656 160 544 160
WIRE -32 176 -32 160
WIRE 544 176 544 160
WIRE 656 176 656 160
WIRE 96 240 96 160
WIRE 128 240 96 240
WIRE 432 240 384 240
WIRE -32 272 -32 256
WIRE 544 272 544 240
WIRE 656 272 656 256
WIRE 48 320 32 320
WIRE 128 320 112 320
WIRE 416 320 384 320
WIRE 128 400 96 400
WIRE 416 400 416 384
WIRE 416 400 384 400
SYMBOL cap 112 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .001
SYMBOL cap 400 320 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 528 176 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res 640 160 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL voltage -32 160 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res 416 144 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL PowerProducts\\LTC1751-5 256 288 R0
SYMATTR InstName U1
FLAG -32 272 0
FLAG 96 400 0
FLAG 32 320 0
FLAG 544 272 0
FLAG 656 272 0
FLAG 656 160 OUT
FLAG -32 160 IN
TEXT 520 360 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4609.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4609.asy)
XU1 N009 OUT 0 N001 IN N002 N003 N003 0 N006 N004 N010 N005 N011 IN N007 N008 0 0 NC_01 LTM4609 ;pnba FB)Vout)SGND)SW2)Vin)SW1)Rsense)Sense+)Sense-)Pgood)INTVcc)PLLFLTR)STBYMD)SS)Run)Comp)PLLIN)FCB)PGND)EXTVcc
C2 N011 0 .002
Rload OUT 0 15
V1 IN 0 18
C1 OUT 0 330
L1 N001 N002 5.6
R1 N003 0 7.5m
R3 N006 N004 100K
R2 0 N009 2.74K
.tran 100m startup
.lib LTM4609.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1268 680
WIRE 208 -96 176 -96
WIRE 320 -96 288 -96
WIRE 176 -48 176 -96
WIRE 320 -48 320 -96
WIRE 32 16 -80 16
WIRE 64 16 32 16
WIRE 560 16 448 16
WIRE 656 16 560 16
WIRE -80 32 -80 16
WIRE 560 32 560 16
WIRE 656 32 656 16
WIRE 32 80 32 16
WIRE 64 80 32 80
WIRE 464 80 448 80
WIRE -80 128 -80 112
WIRE 560 128 560 96
WIRE 656 128 656 112
WIRE 480 144 448 144
WIRE 512 144 480 144
WIRE 512 160 512 144
WIRE 64 208 -48 208
WIRE 480 208 480 144
WIRE 480 208 448 208
WIRE -48 240 -48 208
WIRE 64 272 48 272
WIRE 512 272 512 240
WIRE 512 272 448 272
WIRE 512 288 512 272
WIRE -48 336 -48 320
WIRE 64 336 -48 336
WIRE 464 336 448 336
WIRE 64 400 48 400
WIRE 464 400 448 400
WIRE 560 400 544 400
WIRE 64 464 48 464
WIRE 496 464 448 464
WIRE 496 480 496 464
WIRE 176 544 176 528
WIRE 320 544 320 528
WIRE 496 560 496 544
SYMBOL res -64 336 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL PowerProducts\\LTM4609 256 240 R0
SYMATTR InstName U1
SYMBOL cap 480 480 R0
SYMATTR InstName C2
SYMATTR Value .002
SYMBOL res 560 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2.74K
SYMBOL ind 192 -80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 5.6
SYMBOL voltage -80 16 R0
SYMATTR InstName V1
SYMATTR Value 18
SYMBOL cap 544 32 R0
SYMATTR InstName C1
SYMATTR Value 330
SYMBOL res 496 144 R0
SYMATTR InstName R1
SYMATTR Value 7.5m
SYMBOL res 640 16 R0
SYMATTR InstName Rload
SYMATTR Value 15
FLAG 464 80 0
FLAG 560 128 0
FLAG 656 128 0
FLAG 560 400 0
FLAG 512 288 0
FLAG 320 544 0
FLAG 176 544 0
FLAG -80 128 0
FLAG 496 560 0
FLAG -80 16 IN
FLAG 656 16 OUT
TEXT 584 480 Left 2 !.tran 100m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3092.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3092.asy)
XU1 MP_01 N002 N003 MP_02 N001 LT3092 ;pnba )SET)OUT))IN
Rload N004 0 10
R2 N002 N004 20K
V1 N001 0 PWL(0 0 1 40)
R1 N003 N004 5
.tran 1
.lib LT3092.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 80 -176 80
WIRE -176 96 -176 80
WIRE 176 112 176 80
WIRE -176 192 -176 176
WIRE 112 352 112 336
WIRE 256 352 256 336
WIRE 112 448 112 432
WIRE 192 448 112 448
WIRE 256 448 256 432
WIRE 256 448 192 448
WIRE 192 464 192 448
WIRE 192 560 192 544
SYMBOL res 176 448 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL res 96 336 R0
SYMATTR InstName R2
SYMATTR Value 20K
SYMBOL res 240 336 R0
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL PowerProducts\\LT3092 176 224 R0
SYMATTR InstName U1
SYMBOL voltage -176 80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 40)
FLAG 192 560 0
FLAG -176 192 0
TEXT 376 432 Left 2 !.tran 1