Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3420-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3420-1.asy)
R2 N006 0 2K
D1 N001 OUT D
V1 IN 0 5
R3 N004 IN 10K
L2 N005 N001 {20u*12*12} Rpar=1Meg
L1 IN N003 20 Rpar=2K Rser=.1
R1 N003 N002 51.1K
C2 N007 0 1n
K1 L1 L2 1
C1 OUT 0 .1 Rpar=.1Meg
XU1 N006 IN N002 IN 0 N003 N005 N004 IN N007 LT3420-1 ;pnba Rref)Vbat)Rfb)Vcc)GND)SW)SEC)Done)Charge)Ct
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m startup
.lib LT3420-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2740 1752
WIRE 1616 1040 1536 1040
WIRE 1808 1040 1616 1040
WIRE 2064 1040 1808 1040
WIRE 2192 1040 2112 1040
WIRE 2304 1040 2256 1040
WIRE 1536 1056 1536 1040
WIRE 2064 1056 2064 1040
WIRE 2112 1056 2112 1040
WIRE 2304 1056 2304 1040
WIRE 1536 1152 1536 1136
WIRE 2304 1152 2304 1120
WIRE 1968 1184 1936 1184
WIRE 2064 1184 2064 1136
WIRE 2064 1184 2048 1184
WIRE 1808 1232 1808 1040
WIRE 1936 1232 1936 1184
WIRE 1616 1312 1616 1040
WIRE 1728 1312 1616 1312
WIRE 2064 1312 2064 1184
WIRE 2064 1312 2016 1312
WIRE 1616 1392 1616 1312
WIRE 1632 1392 1616 1392
WIRE 1728 1392 1712 1392
WIRE 2112 1392 2112 1136
WIRE 2112 1392 2016 1392
WIRE 1616 1472 1616 1392
WIRE 1728 1472 1616 1472
WIRE 2032 1472 2016 1472
WIRE 2128 1472 2112 1472
WIRE 1808 1568 1808 1552
WIRE 1936 1568 1936 1552
WIRE 1808 1648 1808 1632
SYMBOL res 2016 1488 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 2K
SYMBOL RES 2064 1168 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 51.1K
SYMBOL VOLTAGE 1536 1040 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2288 1056 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMATTR SpiceLine Rpar=.1Meg
SYMBOL diode 2192 1056 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL cap 1792 1568 R0
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL ind2 2048 1040 R0
WINDOW 0 -6 35 Right 2
WINDOW 3 -4 73 Right 2
SYMATTR InstName L1
SYMATTR Value 20
SYMATTR SpiceLine Rpar=2K Rser=.1
SYMBOL ind2 2128 1152 R180
WINDOW 0 -3 72 Right 2
WINDOW 3 0 43 Right 2
SYMATTR InstName L2
SYMATTR Value {20u*12*12}
SYMATTR SpiceLine Rpar=1Meg
SYMBOL PowerProducts\\LT3420-1 1872 1392 R0
SYMATTR InstName U1
SYMBOL res 1728 1376 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
FLAG 2304 1152 0
FLAG 2128 1472 0
FLAG 1936 1568 0
FLAG 1808 1648 0
FLAG 1536 1152 0
FLAG 2304 1040 OUT
FLAG 1536 1040 IN
TEXT 2200 1328 Left 2 !.tran 10m startup
TEXT 2088 1040 Bottom 2 !K1 L1 L2 1
* Z:\tmp\asc_dec_bjh7r6w2\12f025d916c7_TriangSeno2_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
D5 N003 N002 1N914
R4 N004 N003 15k
D6 N003 N004 1N914
D8 N002 N003 1N914
R24 N008 N007 33k
R3 N003 N002 10k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3400 680
WIRE 1456 32 1424 32
WIRE 1472 32 1456 32
WIRE 1568 32 1536 32
WIRE 1616 32 1568 32
WIRE 1712 32 1680 32
WIRE 1728 32 1712 32
WIRE 1824 32 1792 32
WIRE 1456 128 1456 32
WIRE 1456 128 1424 128
WIRE 1472 128 1456 128
WIRE 1568 128 1568 32
WIRE 1568 128 1552 128
WIRE 1600 128 1568 128
WIRE 1712 128 1712 32
WIRE 1712 128 1680 128
WIRE 1728 128 1712 128
WIRE 1824 128 1824 32
WIRE 1824 128 1808 128
WIRE 1312 208 1312 128
WIRE 1360 208 1312 208
WIRE 1456 208 1456 128
WIRE 1456 208 1424 208
WIRE 1472 208 1456 208
WIRE 1568 208 1568 128
WIRE 1568 208 1536 208
WIRE 1616 208 1568 208
WIRE 1712 208 1712 128
WIRE 1712 208 1680 208
WIRE 1728 208 1712 208
WIRE 1824 208 1824 128
WIRE 1824 208 1792 208
WIRE 1280 368 1280 -192
WIRE 1040 384 944 384
WIRE 1168 384 1168 128
WIRE 1168 384 1120 384
WIRE 1248 384 1168 384
WIRE 1824 400 1824 208
WIRE 1824 400 1312 400
WIRE 944 416 944 384
WIRE 1248 416 1216 416
WIRE 1216 432 1216 416
WIRE 944 512 944 496
WIRE 1280 544 1280 432
WIRE 2224 544 1280 544
SYMBOL diode 1680 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D5
SYMATTR Value 1N914
SYMBOL res 1824 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 15k
SYMBOL diode 1728 48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D6
SYMATTR Value 1N914
SYMBOL diode 1616 48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D8
SYMATTR Value 1N914
SYMBOL res 1136 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R24
SYMATTR Value 33k
SYMBOL res 1696 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
FLAG 1216 432 0
FLAG 944 512 0
* Z:\home\khalils\Downloads\files\data\raw_asc\6f03848d44b0_1N60.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 0
D1 vd1 0 1N60
R1 vd1 N001 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -2 10 100m
.MODEL 1N60 D RS=50.0559 EG=1.11 XTI=3 VJ=0.8 M=0.1 FC=0.5 BV=40 CJO=1.75p IS=1.37773u N=2 TT=100n type=germanium
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1868 680
WIRE 80 64 -16 64
WIRE 240 64 160 64
WIRE -16 112 -16 64
WIRE 240 112 240 64
WIRE -16 240 -16 192
WIRE 112 240 -16 240
WIRE 240 240 240 176
WIRE 240 240 112 240
WIRE 112 256 112 240
SYMBOL voltage -16 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL res 176 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 224 112 R0
SYMATTR InstName D1
SYMATTR Value 1N60
FLAG 112 256 0
FLAG 240 64 vd1
TEXT -48 280 Left 2 !.dc V1 -2 10 100m
TEXT 320 152 Left 2 !.MODEL 1N60 D RS=50.0559 EG=1.11 XTI=3 VJ=0.8 M=0.1 FC=0.5 BV=40 CJO=1.75p IS=1.37773u N=2 TT=100n type=germanium
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1514-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1514-3.3.asy)
V2 IN 0 3
C5 N003 N004 1
C1 OUT 0 100
XU1 IN N001 N002 0 N004 N003 IN OUT LTC1514-3.3 ;pnba _SHDN)LBO)LBI)GND)C1-)C1+)Vin)Vout
Rload OUT 0 100
.tran 5m startup
.lib LTC1514-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2792 2672
WIRE 2336 2272 1936 2272
WIRE 1936 2352 1936 2272
WIRE 1984 2352 1936 2352
WIRE 2528 2352 2272 2352
WIRE 2640 2352 2528 2352
WIRE 2528 2368 2528 2352
WIRE 2640 2368 2640 2352
WIRE 1984 2416 1952 2416
WIRE 2336 2416 2336 2272
WIRE 2336 2416 2272 2416
WIRE 2432 2416 2336 2416
WIRE 2432 2432 2432 2416
WIRE 2528 2464 2528 2432
WIRE 2640 2464 2640 2448
WIRE 1984 2480 1952 2480
WIRE 2336 2480 2272 2480
WIRE 1984 2544 1952 2544
WIRE 2336 2544 2272 2544
WIRE 2432 2544 2432 2512
WIRE 1952 2576 1952 2544
SYMBOL voltage 2432 2416 R0
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL res 2624 2352 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 2320 2480 R0
SYMATTR InstName C5
SYMATTR Value 1
SYMBOL PowerProducts\\LTC1514-3.3 2128 2448 R0
SYMATTR InstName U1
SYMBOL cap 2512 2368 R0
SYMATTR InstName C1
SYMATTR Value 100
FLAG 2432 2544 0
FLAG 1952 2576 0
FLAG 2528 2464 0
FLAG 2640 2464 0
FLAG 2640 2352 OUT
FLAG 2432 2416 IN
TEXT 2336 2608 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1b50aff638d3_Leitungstheorie-Kurzschluss.asc
* Generated by LTspice 26.0.1 for Windows.
* Wire with short ending\nCreated by AblL
V1 N001 0 PULSE(0 20 0 0.01n 0.01n 10n 1m) Rser=50
R1 N003 0 0.00001
T1 N001 0 N002 0 Td=0.25us Z0=50
T2 N002 0 N003 0 Td=0.25us Z0=50
.tran 0 2us 0 0.1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 112 -144 112
WIRE 240 112 112 112
WIRE 512 112 336 112
WIRE -144 144 -144 112
WIRE 16 144 0 144
WIRE 176 144 112 144
WIRE 240 144 176 144
WIRE 352 144 336 144
WIRE 512 144 512 112
WIRE 0 192 0 144
WIRE 176 192 176 144
WIRE 352 192 352 144
WIRE -144 240 -144 224
WIRE 512 240 512 224
SYMBOL res 496 128 R0
SYMATTR InstName R1
SYMATTR Value 0.00001
SYMBOL tline 288 128 R0
WINDOW 0 -2 -49 Bottom 2
WINDOW 3 3 -48 Top 2
SYMATTR InstName T2
SYMATTR Value Td=0.25us Z0=50
SYMBOL voltage -144 128 R0
WINDOW 3 -191 147 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 -191 175 Left 2
SYMATTR Value PULSE(0 20 0 0.01n 0.01n 10n 1m)
SYMATTR SpiceLine Rser=50
SYMATTR InstName V1
SYMBOL tline 64 128 R0
WINDOW 0 -1 -53 Bottom 2
WINDOW 3 5 -52 Top 2
SYMATTR InstName T1
SYMATTR Value Td=0.25us Z0=50
FLAG 0 192 0
FLAG 176 192 0
FLAG 352 192 0
FLAG 512 240 0
FLAG -144 240 0
TEXT 88 0 Left 2 !.tran 0 2us 0 0.1n
TEXT 80 -56 Left 2 ;Wire with short ending\nCreated by AblL
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1424-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1424-5.asy)
C1 N004 0 1000p
Rload OUT 0 50
C3 OUT 0 10 Rser=.1
D1 N001 OUT MBRS130L
C2 N005 0 .1
V1 IN 0 5
L1 IN N003 20
XU1 N002 N004 MP_01 0 0 N003 IN N005 LT1424-5 ;pnba _SHDN)Vc))SGND)PGND)SW)Vin)Rccomp
L2 0 N001 20
K1 L1 L2 1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib LT1424-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2392 832
WIRE 1424 304 1152 304
WIRE 1680 304 1424 304
WIRE 1824 304 1744 304
WIRE 1936 304 1888 304
WIRE 2016 304 1936 304
WIRE 1152 320 1152 304
WIRE 1680 336 1680 304
WIRE 1744 336 1744 304
WIRE 1936 336 1936 304
WIRE 2016 336 2016 304
WIRE 1424 352 1424 304
WIRE 1152 416 1152 400
WIRE 1264 448 1232 448
WIRE 1680 448 1680 416
WIRE 1680 448 1584 448
WIRE 1744 448 1744 416
WIRE 1936 448 1936 400
WIRE 2016 448 2016 416
WIRE 1184 544 1168 544
WIRE 1264 544 1248 544
WIRE 1600 544 1584 544
WIRE 1680 544 1664 544
WIRE 1328 672 1328 640
WIRE 1520 672 1520 640
SYMBOL VOLTAGE 1152 304 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind2 1760 432 R180
WINDOW 0 -4 72 Right 2
WINDOW 3 -5 45 Right 2
SYMATTR InstName L2
SYMATTR Value 20
SYMBOL polcap 1920 336 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMATTR SpiceLine Rser=.1
SYMBOL schottky 1824 320 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS130L
SYMBOL POWERPRODUCTS\\LT1424-5 1424 496 R0
SYMATTR InstName U1
SYMBOL res 2000 320 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL ind2 1664 320 R0
WINDOW 0 -3 39 Right 2
WINDOW 3 -4 70 Right 2
SYMATTR InstName L1
SYMATTR Value 20
SYMBOL cap 1600 560 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL cap 1248 528 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000p
FLAG 1152 416 0
FLAG 1680 544 0
FLAG 1520 672 0
FLAG 1328 672 0
FLAG 1168 544 0
FLAG 1936 448 0
FLAG 2016 448 0
FLAG 1744 448 0
FLAG 2016 304 OUT
FLAG 1152 304 IN
TEXT 1704 296 Bottom 2 !K1 L1 L2 1
TEXT 1816 544 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\56f71c45a307_inverting_amplifier.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 2.5V N001 5V 0 CB-H AD8541 ;pnba In+)In-)V+)V-)OUT
R3 2.5V CB-H 10k
R1 N001 CA-V 1k
V1 CA-V 0 SINE(2.5 0.4 500)
V2 5V 0 5
V3 2.5V 0 2.5
R2 N001 CB-H 4.7k
* Inverting Amplifier
.tran 10m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8541.asy)
.lib AD8541.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 512 -32 480 -32
WIRE 624 -32 592 -32
WIRE 544 96 544 80
WIRE -304 112 -304 80
WIRE -208 112 -208 80
WIRE -112 112 -112 80
WIRE 352 112 320 112
WIRE 480 112 480 -32
WIRE 480 112 432 112
WIRE 512 112 480 112
WIRE 624 128 624 -32
WIRE 624 128 576 128
WIRE 720 128 624 128
WIRE 736 128 720 128
WIRE 512 144 480 144
WIRE 720 160 720 128
WIRE 544 192 544 160
WIRE -304 240 -304 192
WIRE -208 240 -208 192
WIRE -112 240 -112 192
WIRE 480 256 480 144
WIRE 560 256 480 256
WIRE 720 256 720 240
WIRE 720 256 560 256
WIRE 560 288 560 256
FLAG -112 240 0
FLAG -304 240 0
FLAG -112 80 CA-V
IOPIN -112 80 In
FLAG 320 112 CA-V
IOPIN 320 112 In
FLAG -304 80 5V
IOPIN -304 80 In
FLAG 560 288 2.5V
IOPIN 560 288 In
FLAG 544 192 0
FLAG -208 240 0
FLAG -208 80 2.5V
IOPIN -208 80 In
FLAG 544 80 5V
IOPIN 544 80 In
FLAG 736 128 CB-H
IOPIN 736 128 In
SYMBOL Opamps\\AD8541 544 64 R0
SYMATTR InstName U1
SYMBOL res 736 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 448 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -112 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(2.5 0.4 500)
SYMBOL voltage -304 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -208 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 2.5
SYMBOL res 496 -48 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.7k
TEXT 272 -128 Left 2 ;Inverting Amplifier
TEXT -376 400 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3010.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3010.asy)
C1 OUT 0 1
XU1 OUT OUT MP_01 0 IN MP_02 MP_03 IN LT3010 ;pnba OUT)ADJ))GND)_SHDN)))Vin
Rload OUT 0 1K
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT3010.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 512 64 512 48
WIRE 416 80 416 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 144
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL PowerProducts\\LT3010 176 96 R0
SYMATTR InstName U1
SYMBOL cap 400 80 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 336 248 Left 2 !.tran 1
* Z:\tmp\asc_dec_bjh7r6w2\0920e643c489_HW4_P6_d_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
E2 Vx 0 Vout Vref 100Meg
Vdd VDD 0 5
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1612 680
WIRE -224 -80 -272 -80
WIRE -272 -32 -272 -80
WIRE 336 80 128 80
WIRE -272 96 -272 48
WIRE 128 128 128 80
WIRE 80 144 0 144
WIRE 80 192 32 192
WIRE 384 192 272 192
WIRE 128 256 128 208
WIRE 32 304 32 192
WIRE 32 304 0 304
WIRE 272 304 272 192
WIRE 272 304 32 304
SYMBOL e2 128 112 R0
SYMATTR InstName E2
SYMATTR Value 100Meg
SYMBOL voltage -272 -48 R0
SYMATTR InstName Vdd
SYMATTR Value 5
FLAG 128 256 0
FLAG 128 80 Vx
FLAG -272 96 0
FLAG -224 -80 VDD
FLAG 0 144 Vref
FLAG 0 304 Vout
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1009.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
R1 N001 OUT 3.6K
XU1 OUT 0 N002 LT1009 ;pnba VCC)VEE)ADJ
R2 OUT N002 {10K*(1-x)}
R3 N002 0 {10K*x}
.dc TEMP -55 125 .1
.step param x .4 .6 .1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1009.asy)
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 208 96 208
WIRE 224 224 224 208
WIRE 400 256 352 256
WIRE 480 256 400 256
WIRE 96 272 96 208
WIRE 400 272 400 256
WIRE 224 320 224 304
WIRE 352 320 352 256
WIRE 352 320 224 320
WIRE 224 336 224 320
WIRE 400 368 400 352
WIRE 400 368 256 368
WIRE 400 384 400 368
WIRE 96 416 96 352
WIRE 224 416 224 400
WIRE 400 480 400 464
FLAG 96 416 0
FLAG 224 416 0
FLAG 480 256 OUT
FLAG 400 480 0
SYMBOL voltage 96 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 208 208 R0
SYMATTR InstName R1
SYMATTR Value 3.6K
SYMBOL LT1009 224 368 R0
SYMATTR InstName U1
SYMBOL res 384 256 R0
SYMATTR InstName R2
SYMATTR Value {10K*(1-x)}
SYMBOL res 384 368 R0
SYMATTR InstName R3
SYMATTR Value {10K*x}
TEXT 568 392 Left 2 !.dc TEMP -55 125 .1\n.step param x .4 .6 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3026.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3026.asy)
R4 N003 0 4.02K
R1 OUT N004 100K
R3 OUT 0 .8
V1 IN 0 1.5
C2 OUT 0 10
XU1 IN MP_01 0 N001 N002 IN N004 N003 OUT LTC3026 ;pnba IN))GND)SW)BST)_SHDN)PG)ADJ)OUT
R2 OUT N003 8.06K
L1 IN N001 10
C1 N002 0 4.7
.tran .1 startup
.lib LTC3026.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
WIRE 32 112 -32 112
WIRE 336 112 320 112
WIRE 416 112 400 112
WIRE -32 208 -32 192
WIRE -32 208 -128 208
WIRE 32 208 -32 208
WIRE 352 208 320 208
WIRE 544 208 352 208
WIRE 592 208 544 208
WIRE 672 208 592 208
WIRE -128 224 -128 208
WIRE 592 224 592 208
WIRE 672 224 672 208
WIRE -32 304 -32 208
WIRE 32 304 -32 304
WIRE 352 304 352 288
WIRE 352 304 320 304
WIRE 416 304 352 304
WIRE 512 304 496 304
WIRE -128 320 -128 304
WIRE 592 320 592 288
WIRE 672 320 672 304
WIRE 32 400 16 400
WIRE 336 400 320 400
WIRE 544 400 544 208
WIRE 544 400 416 400
SYMBOL res 400 320 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 4.02K
SYMBOL PowerProducts\\LTC3026 176 256 R0
SYMATTR InstName U1
SYMBOL res 336 192 R0
SYMATTR InstName R2
SYMATTR Value 8.06K
SYMBOL res 432 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL voltage -128 208 R0
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL res 656 208 R0
SYMATTR InstName R3
SYMATTR Value .8
SYMBOL cap 336 128 R270
WINDOW 3 0 32 VBottom 2
WINDOW 0 32 32 VTop 2
SYMATTR Value 4.7
SYMATTR InstName C1
SYMBOL cap 576 224 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL ind -16 208 R180
WINDOW 0 -2 77 Right 2
WINDOW 3 0 38 Right 2
SYMATTR InstName L1
SYMATTR Value 10
FLAG -128 320 0
FLAG 16 400 0
FLAG 512 304 0
FLAG 592 320 0
FLAG 416 112 0
FLAG 672 320 0
FLAG -128 208 IN
FLAG 672 208 OUT
TEXT 504 440 Left 2 !.tran .1 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\404e6d1bcb57_fig-02-01-33_a_.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4091.asy)
V2 VIN 0 SINE(0 0.1 1k)
R2 VOUT N001 19k
R4 N002 VCC 2k
R5 N001 VCC 2k
R3 N002 VIN 2k
VS1 VCC 0 5
XU2 N002 N001 VCC 0 VOUT ADA4091 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 2k
.tran 2m
.lib ADA4091.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 -16 -32 -32
WIRE 208 -16 208 -32
WIRE -32 16 -32 -16
WIRE 32 16 -32 16
WIRE 144 16 112 16
WIRE -32 48 -32 16
WIRE 32 112 0 112
WIRE 144 112 144 16
WIRE 144 112 112 112
WIRE 256 112 144 112
WIRE 368 112 336 112
WIRE 0 144 0 112
WIRE 208 144 208 -16
WIRE 144 160 144 112
WIRE 176 160 144 160
WIRE 368 176 368 112
WIRE 368 176 240 176
WIRE 400 176 368 176
WIRE -144 192 -192 192
WIRE -32 192 -32 128
WIRE -32 192 -64 192
WIRE 176 192 -32 192
WIRE -192 240 -192 192
WIRE 368 240 368 224
WIRE 368 288 368 240
WIRE 208 336 208 208
WIRE -192 384 -192 320
WIRE 368 384 368 368
IOPIN 400 176 Out
SYMBOL Misc\\battery 368 272 R0
WINDOW 0 17 6 Left 2
WINDOW 3 17 98 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS1
SYMATTR Value 5
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2k
SYMBOL res 352 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 19k
SYMBOL res -48 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2k
SYMBOL voltage -192 224 R0
WINDOW 0 19 16 Left 2
WINDOW 3 13 98 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 0.1 1k)
SYMBOL Opamps\\ADA4091 208 112 R0
SYMATTR InstName U2
SYMBOL res 128 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 2k
SYMBOL res -16 144 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 2k
FLAG 208 336 0
FLAG 400 176 VOUT
FLAG -192 384 0
FLAG 0 144 0
FLAG 368 384 0
FLAG 368 240 VCC
FLAG 208 -16 VCC
FLAG -32 -16 VCC
FLAG -192 192 VIN
TEXT -192 -24 Left 2 !.tran 2m
* Z:\home\khalils\Downloads\files\data\raw_asc\2aeae36cb776_FOCUS_AMP.asc
* Generated by LTspice 26.0.1 for Windows.
V1 5v 0 10
XU2 N005 N002 5v 0 N004 LT1800 ;pnba In+)In-)V+)V-)OUT
R12 N001 N006 3Meg
V4 N001 0 2000
V2 N007 0 PULSE(0 2 1p 40ms 40ms 20ms 0 10)
R1 vout 0 R=table(time,0,1000Meg,200ms,1000Meg,200.001ms,10Meg, 700ms,10Meg, 700.001ms, 1000Meg)
R3 N006 N005 5Meg
R2 N002 N007 5k
R4 N005 0 10k
C1 N006 0 100p
C2 N004 N003 100p
R5 N003 N002 100k
Q1 N006 N004 0 0 NPN
R6 vout N006 100k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1s
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1800.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2456 680
WIRE 1472 80 1024 80
WIRE 672 128 656 128
WIRE 768 128 752 128
WIRE 944 128 832 128
WIRE 1024 128 1024 80
WIRE 832 208 672 208
WIRE 1024 208 912 208
WIRE 1088 208 1024 208
WIRE 1120 208 1088 208
WIRE 1264 208 1200 208
WIRE 1328 208 1264 208
WIRE 1088 224 1088 208
WIRE 560 240 496 240
WIRE 656 240 656 128
WIRE 656 240 640 240
WIRE 720 240 656 240
WIRE 1328 240 1328 208
WIRE 1472 240 1472 80
WIRE 944 256 944 128
WIRE 944 256 784 256
WIRE 960 256 944 256
WIRE 672 272 672 208
WIRE 720 272 672 272
WIRE 672 288 672 272
WIRE 944 288 944 256
WIRE 976 288 944 288
WIRE -32 320 -80 320
WIRE -16 320 -32 320
WIRE 496 320 496 240
WIRE -80 352 -80 320
WIRE 1024 368 1024 304
WIRE 1072 368 1024 368
WIRE 1088 368 1088 288
WIRE 1088 368 1072 368
WIRE 1072 480 1072 368
FLAG -80 432 0
FLAG -32 320 5v
FLAG 752 224 5v
FLAG 1072 480 0
FLAG 1472 320 0
FLAG 752 288 0
FLAG 496 400 0
FLAG 1328 320 0
FLAG 672 368 0
FLAG 1264 208 vout
SYMBOL Voltage -80 336 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL OpAmps/LT1800 752 192 R0
SYMATTR InstName U2
SYMBOL Res 1008 112 R0
SYMATTR InstName R12
SYMATTR Value 3Meg
SYMBOL Voltage 1472 224 R0
SYMATTR InstName V4
SYMATTR Value 2000
SYMBOL Voltage 496 304 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 1p 40ms 40ms 20ms 0 10)
SYMBOL Res 1312 224 R0
SYMATTR InstName R1
SYMATTR Value R=table(time,0,1000Meg,200ms,1000Meg,200.001ms,10Meg, 700ms,10Meg, 700.001ms, 1000Meg)
SYMBOL Res 928 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5Meg
SYMBOL Res 656 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5k
SYMBOL Res 656 272 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL Cap 1072 224 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL Cap 832 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL Res 768 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 100k
SYMBOL npn 960 208 R0
SYMATTR InstName Q1
SYMBOL Res 1216 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 100k
TEXT 592 528 Left 2 !.tran 1s
* Z:\tmp\asc_dec_bjh7r6w2\09998451391a_5a_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
VGP N002 0 0
M2 N001 N002 0 N001 pch l=0.18u w=3u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 16 -64 16
WIRE 288 48 176 48
WIRE 32 144 32 16
WIRE 80 144 32 144
WIRE 32 160 32 144
WIRE 176 176 176 48
WIRE 176 192 176 176
WIRE 80 208 80 144
WIRE 80 208 32 208
WIRE -16 224 -96 224
WIRE -16 240 -16 224
WIRE 208 240 176 240
WIRE 128 272 48 272
WIRE 48 288 48 272
WIRE 176 304 176 288
WIRE 208 304 176 304
WIRE 176 320 176 304
SYMBOL voltage -96 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGP
SYMATTR Value 0
SYMBOL pmos4 -16 160 R0
SYMATTR InstName M2
SYMATTR Value2 l=0.18u w=3u
SYMATTR Value pch
FLAG -64 96 0
FLAG 176 320 0
FLAG 32 256 0
FLAG 48 368 0
FLAG -96 304 0
FLAG 176 176 VdN