Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2166-1.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2166-1.0.asy)
XU1 N002 N005 N002 OUT 0 0 N004 IN IN IN N001 N008 N007 N003 N002 ADP2166-x.x Rtop=400K Rbot=600K ;pnba SYNC)Rt)TRK)FB)Gnd)Pgnd)SW)Pvin)Avin)EN)Pgood)SS)Comp)Bst)Vreg
C5 N006 0 820p
C2 N003 N004 .1
C6 N007 0 1p
R3 OUT N001 100K
Rload OUT 0 .2
R1 N005 0 100K
C1 N008 0 2n
L1 N004 OUT .47 Rser=6m
R2 N007 N006 27.4K
C4 N002 0 1
C3 OUT 0 90 Rser=2m
V1 IN 0 5
.tran 1m startup
.lib ADP2166-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 680
WIRE 48 -96 -176 -96
WIRE 176 -96 48 -96
WIRE 272 -96 176 -96
WIRE -176 -80 -176 -96
WIRE 176 -80 176 -96
WIRE 272 -80 272 -96
WIRE 48 -16 48 -96
WIRE 64 -16 48 -16
WIRE 448 -16 384 -16
WIRE 608 -16 528 -16
WIRE -176 16 -176 0
WIRE -48 64 -64 64
WIRE 48 64 16 64
WIRE 64 64 48 64
WIRE 432 64 384 64
WIRE 48 144 48 64
WIRE 64 144 48 144
WIRE 432 144 432 128
WIRE 432 144 384 144
WIRE 480 144 432 144
WIRE 608 144 608 -16
WIRE 608 144 560 144
WIRE 720 144 608 144
WIRE 832 144 720 144
WIRE 720 160 720 144
WIRE 832 160 832 144
WIRE 48 224 48 144
WIRE 64 224 48 224
WIRE 720 256 720 224
WIRE 832 256 832 240
WIRE -32 304 -48 304
WIRE 64 304 48 304
WIRE 608 304 608 144
WIRE 608 304 384 304
WIRE -160 384 -224 384
WIRE -32 384 -80 384
WIRE 64 384 -32 384
WIRE 400 384 384 384
WIRE 480 384 464 384
WIRE -224 400 -224 384
WIRE -32 400 -32 384
WIRE 176 464 176 448
WIRE 272 464 272 448
WIRE -224 480 -224 464
WIRE -32 480 -32 464
SYMBOL cap -240 400 R0
SYMATTR InstName C5
SYMATTR Value 820p
SYMBOL voltage -176 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 400 368 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL res -64 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 27.4K
SYMBOL cap 416 64 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL ADP2166-1.0 224 176 R0
SYMATTR InstName U1
SYMBOL ind 464 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value .47
SYMATTR SpiceLine Rser=6m
SYMBOL cap 16 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL res 544 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res 816 144 R0
SYMATTR InstName Rload
SYMATTR Value .2
SYMBOL res 64 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 704 160 R0
WINDOW 40 24 74 Left 2
SYMATTR Value 90
SYMATTR InstName C3
SYMATTR SpiceLine Rser=2m
SYMBOL cap -48 400 R0
SYMATTR InstName C6
SYMATTR Value 1p
FLAG 480 384 0
FLAG 272 464 0
FLAG -48 304 0
FLAG -224 480 0
FLAG -176 16 0
FLAG 720 256 0
FLAG 832 256 0
FLAG 832 144 OUT
FLAG -176 -96 IN
FLAG -64 64 0
FLAG -32 480 0
FLAG 176 464 0
TEXT 696 424 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4221-1C.asc
* Generated by LTspice 26.0.1 for Windows.
* GND1 is modeled as common GND
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4221-1C.asy)
R2 Gate_A N001 5.11
V4 N004 0 15
C2 Gate_B 0 2.2n
V3 N005 0 0
V2 N003 0 5
V1 Vin 0 PULSE(0 5 0 2n 2n 5u 10u)
XU1 Vin N003 0 N005 N006 0 N007 N004 0 N001 N002 ADuM4221-1C ;pnba PWM)VDD1)GND1)DISABLE)DT)GNDB)VOB)VDDB)GNDA)VOA)VDDA
R1 N006 0 10K
V5 N002 0 15
C1 Gate_A 0 2.2n
R3 Gate_B N007 5.11
.tran 50u
.lib ADuM4221-1C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 3080 680
WIRE -1824 -432 -2208 -432
WIRE -1728 -432 -1824 -432
WIRE -1136 -432 -1424 -432
WIRE -1008 -432 -1056 -432
WIRE -880 -432 -1008 -432
WIRE -832 -432 -880 -432
WIRE -1008 -400 -1008 -432
WIRE -2208 -384 -2208 -432
WIRE -1248 -368 -1424 -368
WIRE -1728 -352 -2096 -352
WIRE -1248 -352 -1248 -368
WIRE -1008 -320 -1008 -336
WIRE -1392 -304 -1424 -304
WIRE -2096 -288 -2096 -352
WIRE -1728 -272 -1760 -272
WIRE -1248 -224 -1424 -224
WIRE -1248 -208 -1248 -224
WIRE -1728 -176 -1984 -176
WIRE -1392 -160 -1424 -160
WIRE -1728 -112 -1872 -112
WIRE -1136 -96 -1424 -96
WIRE -1008 -96 -1056 -96
WIRE -880 -96 -1008 -96
WIRE -832 -96 -880 -96
WIRE -1984 -80 -1984 -176
WIRE -1872 -64 -1872 -112
WIRE -1008 -64 -1008 -96
WIRE -1008 32 -1008 0
WIRE -2208 128 -2208 -304
WIRE -2096 128 -2096 -208
WIRE -1984 128 -1984 0
WIRE -1872 128 -1872 16
SYMBOL voltage -1248 -368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 43 29 Left 2
WINDOW 3 46 61 Left 2
SYMATTR InstName V5
SYMATTR Value 15
SYMBOL res -1040 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5.11
SYMBOL res -1040 -448 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5.11
SYMBOL voltage -1984 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 0
SYMBOL voltage -1248 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 34 Left 2
WINDOW 3 45 64 Left 2
SYMATTR InstName V4
SYMATTR Value 15
SYMBOL res -1888 -80 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL cap -1024 -64 R0
SYMATTR InstName C2
SYMATTR Value 2.2n
SYMBOL cap -1024 -400 R0
SYMATTR InstName C1
SYMATTR Value 2.2n
SYMBOL voltage -2096 -304 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL ADuM4221-1C -1568 -336 R0
SYMATTR InstName U1
SYMBOL voltage -2208 -400 R0
WINDOW 0 26 98 Left 2
WINDOW 3 33 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 2n 2n 5u 10u)
FLAG -1984 128 0
FLAG -1392 -160 0
FLAG -2208 128 0
FLAG -2096 128 0
FLAG -1824 -432 Vin
FLAG -1392 -304 0
FLAG -1760 -272 0
FLAG -1872 128 0
FLAG -1248 -128 0
FLAG -880 -96 Gate_B
FLAG -880 -432 Gate_A
FLAG -1008 32 0
FLAG -1008 -320 0
FLAG -1248 -272 0
TEXT -1728 8 Left 2 !.tran 50u
TEXT -1728 -16 Left 1 ;GND1 is modeled as common GND
* Z:\tmp\asc_dec_bjh7r6w2\0773dbb02d28_dirac_impulsefolge_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V7 T6 0 SINE(0 1 6k 0 0 90 0)
V8 T7 0 SINE(0 1 7k 0 0 90 0)
V3 T2 0 SINE(0 1 2k 0 0 90 0)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1624 680
WIRE -128 -272 -128 -352
WIRE 0 -272 0 -352
WIRE 112 -272 112 -352
WIRE 224 -272 224 -352
WIRE -128 -144 -128 -192
WIRE 0 -144 0 -192
WIRE 112 -144 112 -192
WIRE 224 -128 224 -192
WIRE 0 224 0 176
WIRE 112 224 112 176
WIRE 224 224 224 176
WIRE 0 352 0 304
WIRE 112 352 112 304
WIRE 224 352 224 304
SYMBOL voltage 0 -288 R0
WINDOW 3 -10 230 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 1 6k 0 0 90 0)
SYMATTR InstName V7
SYMBOL voltage 112 -288 R0
WINDOW 3 -3 268 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 1 7k 0 0 90 0)
SYMATTR InstName V8
SYMBOL voltage 112 208 R0
WINDOW 3 -4 240 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 1 2k 0 0 90 0)
SYMATTR InstName V3
FLAG 0 352 0
FLAG 0 176 T1
FLAG 112 352 0
FLAG 112 176 T2
FLAG 224 352 0
FLAG 224 176 T3
FLAG -128 -144 0
FLAG -128 -352 T5
FLAG 0 -144 0
FLAG 0 -352 T6
FLAG 112 -144 0
FLAG 112 -352 T7
FLAG 224 -128 0
FLAG 224 -352 T8
* Z:\home\khalils\Downloads\files\data\raw_asc\522903601a69_HalfWave.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU5 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001A.asy)
;tran 0 10m 0 1u
D2 N004 N002 1N914
D1 N001 N004 1N914
XU5 0 N001 VCC VEE N004 LT1001 ;pnba In+)In-)V+)V-)OUT
V1 VCC 0 15
V2 0 VEE 15
R15 N003 N001 1k
V5 N003 0 0
R1 N001 N002 2k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V5 -1 1 1m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3400 680
WIRE 960 160 960 144
WIRE 960 176 960 160
WIRE 1264 208 1200 208
WIRE 1456 208 1344 208
WIRE 1200 272 1200 208
WIRE 1264 272 1200 272
WIRE 1056 352 1008 352
WIRE 1200 352 1200 272
WIRE 1200 352 1136 352
WIRE 1248 352 1200 352
WIRE 1328 368 1328 272
WIRE 1328 368 1312 368
WIRE 1360 368 1328 368
WIRE 1456 368 1456 208
WIRE 1456 368 1424 368
WIRE 1248 384 1216 384
WIRE 1216 400 1216 384
WIRE 1008 416 1008 352
WIRE 1008 512 1008 496
IOPIN 960 64 Out
IOPIN 1280 336 In
IOPIN 960 256 Out
IOPIN 1280 400 In
SYMBOL voltage 960 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage 960 48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 1248 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 2k
SYMBOL res 1040 368 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R15
SYMATTR Value 1k
SYMBOL diode 1360 384 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL diode 1264 288 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL voltage 1008 400 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V5
SYMATTR Value 0
SYMBOL Opamps\\LT1001A 1280 304 R0
WINDOW 3 -28 64 Left 2
SYMATTR InstName U5
FLAG 960 160 0
FLAG 1008 512 0
FLAG 960 64 VCC
FLAG 1280 336 VCC
FLAG 960 256 VEE
FLAG 1280 400 VEE
FLAG 1216 400 0
TEXT 1064 432 Left 2 !.dc V5 -1 1 1m
TEXT 1064 464 Left 2 !;tran 0 10m 0 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\OP4177.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP4177.asy)
Rload OUT 0 10K
R1 N001 0 10K
V1 +V 0 15
V2 -V 0 -15
XU1 IN N001 +V -V OUT OP4177 ;pnba In+)In-)V+)V-)OUT
Vin IN 0 SINE(0 1 10K)
R2 OUT N001 10K
.tran 1m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL OP4177 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
TEXT 768 -952 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\qztst.asc
* Generated by LTspice 26.0.1 for Windows.
* Crystal model from easily measurable parameters
*serial freq
*difference between serial and // freq
* This example schematic is supplied for informational/educational purposes only.\nContributed by Dominique Szymik.
CY1 N002 OUT {Cs} Rser={Rs} Lser={Ls} Cpar={Cp}
V1 N001 0 AC 2
R2 0 OUT 50
R1 N002 N001 50
.ac lin 1001 3.95e6 4.05e6
.params fs=4e6
.params df=10e3
.params Rs=50
.params Cp=4e-12
.params Cs=2.0*cp*df/fs
.params Ls=1/(4*pi*pi*fs*fs*Cs)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3040 2464
WIRE 1712 2192 1632 2192
WIRE 1824 2192 1792 2192
WIRE 2000 2192 1888 2192
WIRE 2048 2192 2000 2192
WIRE 1632 2208 1632 2192
WIRE 2000 2208 2000 2192
WIRE 1632 2304 1632 2288
WIRE 2000 2320 2000 2288
SYMBOL res 2016 2304 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL MISC\\XTAL 1824 2208 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName Y1
SYMATTR Value {Cs}
SYMATTR SpiceLine Rser={Rs} Lser={Ls} Cpar={Cp}
SYMBOL VOLTAGE 1632 2192 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 2
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL res 1808 2176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
FLAG 2000 2320 0
FLAG 1632 2304 0
FLAG 2048 2192 OUT
TEXT 1672 2104 Left 2 !.ac lin 1001 3.95e6 4.05e6
TEXT 1184 2048 Left 2 ;Crystal model from easily measurable parameters
TEXT 1136 2112 Left 2 !*serial freq\n.params fs=4e6  \n*difference between serial and // freq \n.params df=10e3  \n.params Rs=50\n.params Cp=4e-12\n.params Cs=2.0*cp*df/fs\n.params Ls=1/(4*pi*pi*fs*fs*Cs)
TEXT 1592 2392 Top 1 ;This example schematic is supplied for informational/educational purposes only.\nContributed by Dominique Szymik.
* Z:\tmp\asc_dec_bjh7r6w2\0139e55a4f06_StageB_BandPassDeliyannisFriendNoPosFB_LTC6262_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N003 N002 1.5n
R2 N002 REF 22k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4112 860
WIRE 176 -64 176 -128
WIRE -160 128 -176 128
WIRE -128 128 -160 128
WIRE -16 128 -16 -128
WIRE -16 128 -48 128
WIRE 48 128 -16 128
WIRE 176 128 176 16
WIRE 176 128 112 128
WIRE 288 128 288 112
WIRE 288 128 176 128
WIRE 304 128 288 128
WIRE 288 160 240 160
WIRE 304 160 288 160
WIRE -16 176 -16 128
WIRE 288 176 288 160
WIRE -16 288 -16 256
WIRE 240 288 240 160
SYMBOL cap 112 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1.5n
SYMBOL res -32 160 R0
SYMATTR InstName R2
SYMATTR Value 22k
FLAG -160 128 IN
FLAG 240 288 REF
FLAG -16 288 REF
* Z:\home\khalils\Downloads\files\data\raw_asc\0d8f882c7fa3_Pulse_Amplitude_Modulation.asc
* Generated by LTspice 26.0.1 for Windows.
* PULSE AMPLITUDE
* MODULATION
V3 N002 0 SINE(0 1 10)
V2 N005 0 PULSE(0 5 0 0.1n 0.1n 1m 2m)
R2 N003 N005 1k
R1 N003 N002 1k
C1 N007 N006 0.1
V1 N001 0 12
R4 N006 0 560
R3 N001 N004 2.2k
Q1 N004 N003 N006 0 NPN
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 320m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 900 680
WIRE 304 -176 304 -224
WIRE -80 -16 -336 -16
WIRE 80 -16 0 -16
WIRE 304 0 304 -96
WIRE 80 48 80 -16
WIRE 240 48 80 48
WIRE -80 112 -192 112
WIRE 80 112 80 48
WIRE 80 112 0 112
WIRE -336 144 -336 -16
WIRE -192 144 -192 112
WIRE 304 144 304 96
WIRE 528 144 304 144
WIRE 688 144 592 144
WIRE 304 224 304 144
WIRE 304 448 304 304
SYMBOL voltage -336 128 R0
WINDOW 3 -205 81 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 10)
SYMBOL res 16 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL cap 592 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.1µ
SYMBOL res 16 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -192 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 0.1n 0.1n 1m 2m)
SYMBOL res 288 -192 R0
SYMATTR InstName R3
SYMATTR Value 2.2k
SYMBOL res 288 208 R0
SYMATTR InstName R4
SYMATTR Value 560
SYMBOL npn 240 0 R0
SYMATTR InstName Q1
SYMBOL voltage 304 -208 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 304 448 0
FLAG -192 224 0
FLAG -336 224 0
FLAG 304 -304 0
TEXT -536 472 Left 2 !.tran 320m
TEXT -208 -208 Left 2 ;PULSE AMPLITUDE
TEXT -176 -176 Left 2 ;MODULATION
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1013.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1013.asy)
R2 N001 0 5K
V3 N003 0 sine(0 .5 10K)
R1 N002 N001 50K
V2 -V 0 -15
XU1 N003 N001 +V -V N002 LT1013 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
.tran 1m
.lib LT1013.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 680
WIRE 192 0 176 0
WIRE 288 0 272 0
WIRE 352 0 288 0
WIRE 448 0 432 0
WIRE -80 64 -80 48
WIRE 32 64 32 48
WIRE 336 96 336 80
WIRE 288 112 288 0
WIRE 304 112 288 112
WIRE 448 128 448 0
WIRE 448 128 368 128
WIRE 304 144 160 144
WIRE -80 160 -80 144
WIRE 32 160 32 144
WIRE 160 160 160 144
WIRE 336 176 336 160
WIRE 160 256 160 240
SYMBOL voltage 160 144 R0
SYMATTR InstName V3
SYMATTR Value sine(0 .5 10K)
SYMBOL res 288 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL res 448 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50K
SYMBOL voltage -80 48 R0
WINDOW 39 24 125 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT1013 336 64 R0
SYMATTR InstName U1
SYMBOL voltage 32 48 R0
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
FLAG -80 160 0
FLAG 336 80 +V
FLAG -80 48 +V
FLAG 176 0 0
FLAG 160 256 0
FLAG 32 160 0
FLAG 32 48 -V
FLAG 336 176 -V
TEXT 384 240 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8655.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8655.asy)
Vin IN 0 SINE(0 1 100k)
V1 +V 0 2.5
Rload OUT 0 10k
R1 N001 0 10k
R2 OUT N001 10k
V2 -V 0 -2.5
XU1 IN N001 +V -V OUT AD8655 ;pnba In+)In-)V+)V-)OUT
.tran 100u
.lib AD8655.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 480 -880 464 -880
WIRE 576 -880 560 -880
WIRE 592 -880 576 -880
WIRE 688 -880 672 -880
WIRE 240 -768 240 -784
WIRE 352 -768 352 -784
WIRE 576 -768 576 -880
WIRE 592 -768 576 -768
WIRE 688 -752 688 -880
WIRE 688 -752 656 -752
WIRE 816 -752 688 -752
WIRE 592 -736 480 -736
WIRE 816 -736 816 -752
WIRE 480 -720 480 -736
WIRE 240 -672 240 -688
WIRE 352 -672 352 -688
WIRE 816 -640 816 -656
WIRE 480 -624 480 -640
SYMBOL voltage 480 -736 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100k)
SYMBOL res 576 -896 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 352 -784 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 800 -752 R0
SYMATTR InstName Rload
SYMATTR Value 10k
SYMBOL voltage 240 -784 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL AD8655 624 -816 R0
SYMATTR InstName U1
SYMBOL res 688 -896 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
FLAG 240 -784 +V
FLAG 240 -672 0
FLAG 480 -624 0
FLAG 816 -752 OUT
FLAG 480 -736 IN
FLAG 624 -784 +V
FLAG 352 -784 -V
FLAG 624 -720 -V
FLAG 464 -880 0
FLAG 816 -640 0
FLAG 352 -672 0
TEXT 752 -592 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\0b3c7cb09f1d_CSAmp_DiffPair.asc
* Generated by LTspice 26.0.1 for Windows.
M1 vout vg vs 0 nch l=0.36u w=3.6u
vgs vg 0 SINE(1.1816 10m 1meg) AC 1
vdd vdd 0 1.8
C1 vout 0 20f
M2 vout vb vdd vdd pch l=0.36u w=3.42u
Vb vb 0 1.048
vs vs 0 0.45
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include CMOS180.txt
.op
.tf V(vout) vgs
;tran 5u
* COMMON SOURCE AMPLIFIER FOR DESIGNING DIFFERENTIAL PAIR USING LUT FROM ADT
;ac dec 10 1MEG 40G
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 732
WIRE 352 64 352 16
WIRE 448 64 352 64
WIRE 352 80 352 64
WIRE 304 96 256 96
WIRE 448 128 448 64
WIRE 448 128 352 128
WIRE 32 256 32 176
WIRE 352 256 352 176
WIRE 608 256 352 256
WIRE 656 256 608 256
WIRE -256 272 -256 224
WIRE -96 272 -96 224
WIRE 352 272 352 256
WIRE -368 288 -368 256
WIRE 464 320 352 320
WIRE 608 336 608 256
WIRE 304 352 240 352
WIRE -368 416 -368 368
WIRE -256 416 -256 352
WIRE -96 416 -96 352
WIRE 32 416 32 336
WIRE 352 416 352 368
WIRE 608 432 608 400
FLAG -96 416 0
FLAG -256 416 0
FLAG -368 416 0
FLAG -368 256 vs
FLAG -256 224 vdd
FLAG -96 224 vg
FLAG 240 352 vg
IOPIN 240 352 In
FLAG 656 256 vout
IOPIN 656 256 In
FLAG 608 432 0
FLAG 352 16 vdd
FLAG 32 416 0
FLAG 32 176 vb
FLAG 256 96 vb
FLAG 352 416 vs
FLAG 464 320 0
SYMBOL nmos4 304 272 R0
WINDOW 123 55 116 Left 2
SYMATTR Value2 l=0.36u w=3.6u
SYMATTR InstName M1
SYMATTR Value nch
SYMBOL voltage -96 256 R0
WINDOW 3 -41 -81 VRight 2
WINDOW 123 28 97 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(1.1816 10m 1meg)
SYMATTR Value2 AC 1
SYMATTR InstName vgs
SYMBOL voltage -256 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vdd
SYMATTR Value 1.8
SYMBOL cap 592 336 R0
SYMATTR InstName C1
SYMATTR Value 20f
SYMBOL pmos4 304 176 M180
WINDOW 123 120 23 Left 2
SYMATTR Value2 l=0.36u w=3.42u
SYMATTR InstName M2
SYMATTR Value pch
SYMBOL voltage 32 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vb
SYMATTR Value 1.048
SYMBOL voltage -368 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vs
SYMATTR Value 0.45
TEXT -376 16 Left 2 !.include CMOS180.txt
TEXT -376 64 Left 2 !.op
TEXT -376 40 Left 2 !.tf V(vout) vgs
TEXT -376 88 Left 2 !;tran 5u
TEXT -376 -80 Left 2 ;COMMON SOURCE AMPLIFIER FOR DESIGNING DIFFERENTIAL PAIR USING LUT FROM ADT
TEXT -376 112 Left 2 !;ac dec 10 1MEG 40G
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3060-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3060-2.5.asy)
Rload OUT 0 25
XU1 N002 N001 OUT MP_01 IN MP_02 IN 0 LT3060-2.5 ;pnba Ref/Byp)ADJ)OUT))IN))_SHDN)GND
C2 OUT N001 10n
C1 N002 0 10n
C3 OUT 0 10
V1 IN 0 12
.tran .1 startup
.lib LT3060-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 112 -16 112
WIRE 96 112 0 112
WIRE 112 112 96 112
WIRE 432 112 368 112
WIRE 544 112 432 112
WIRE 624 112 544 112
WIRE -16 128 -16 112
WIRE 544 128 544 112
WIRE 624 128 624 112
WIRE 432 144 432 112
WIRE -16 224 -16 208
WIRE 96 224 96 112
WIRE 112 224 96 224
WIRE 432 224 432 208
WIRE 432 224 368 224
WIRE 544 224 544 192
WIRE 624 224 624 208
WIRE 112 336 80 336
WIRE 400 336 368 336
WIRE 400 352 400 336
WIRE 400 432 400 416
SYMBOL cap 384 352 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL PowerProducts\\LT3060-2.5 240 224 R0
SYMATTR InstName U1
SYMBOL voltage -16 112 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 416 144 R0
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 608 112 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL cap 528 128 R0
SYMATTR InstName C3
SYMATTR Value 10
FLAG 80 336 0
FLAG -16 224 0
FLAG 400 432 0
FLAG 544 224 0
FLAG 624 224 0
FLAG 624 112 OUT
FLAG 0 112 IN
TEXT 480 320 Left 2 !.tran .1 startup