Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8032.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8032.asy)
Vin IN 0 SINE(0 1 100K)
R2 OUT N001 10K
R1 N001 0 10K
XU1 IN N001 +V -V OUT AD8031 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
V2 -V 0 -5
.tran 100u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 192 -1136 192 -1152
WIRE 320 -1136 320 -1152
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 704 -1104 640 -1104
WIRE 544 -1088 464 -1088
WIRE 464 -1072 464 -1088
WIRE 192 -1040 192 -1056
WIRE 320 -1040 320 -1056
WIRE 464 -976 464 -992
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 464 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100K)
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 320 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 192 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL opamps\\AD8032 576 -1168 R0
SYMATTR InstName U1
FLAG 192 -1152 +V
FLAG 464 -976 0
FLAG 704 -1104 OUT
FLAG 464 -1088 IN
FLAG 576 -1136 +V
FLAG 320 -1152 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 320 -1040 0
FLAG 192 -1040 0
TEXT 720 -984 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3495.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3495.asy)
C2 OUT 0 1 Rser=10m
XU1 0 MP_01 IN IN IN N003 OUT N002 MP_02 N001 LT3495 ;pnba GND))Vcc)CTRL)_SHDN)FB)Vout)CAP))SW
Rload OUT 0 230
R1 OUT N003 909K
C1 N002 0 2.2 Rser=10m
D1 N001 N002 1N5817
L1 IN N001 10
V1 IN 0 3.6 Rser=0.1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LT3495.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1456
WIRE 1648 880 1552 880
WIRE 1664 880 1648 880
WIRE 1760 880 1744 880
WIRE 1792 880 1760 880
WIRE 1888 880 1856 880
WIRE 2016 880 1888 880
WIRE 1552 896 1552 880
WIRE 2016 896 2016 880
WIRE 1760 944 1760 880
WIRE 1888 944 1888 880
WIRE 2016 976 2016 960
WIRE 1552 992 1552 976
WIRE 1648 1008 1648 880
WIRE 1680 1008 1648 1008
WIRE 2000 1008 1968 1008
WIRE 2112 1008 2000 1008
WIRE 2208 1008 2112 1008
WIRE 2112 1024 2112 1008
WIRE 2208 1024 2208 1008
WIRE 2000 1040 2000 1008
WIRE 1648 1088 1648 1008
WIRE 1680 1088 1648 1088
WIRE 2112 1120 2112 1088
WIRE 2208 1120 2208 1104
WIRE 1648 1168 1648 1088
WIRE 1680 1168 1648 1168
WIRE 2000 1168 2000 1120
WIRE 2000 1168 1968 1168
WIRE 1824 1248 1824 1232
SYMBOL VOLTAGE 1552 880 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMATTR SpiceLine Rser=0.1
SYMBOL RES 1984 1024 R0
SYMATTR InstName R1
SYMATTR Value 909K
SYMBOL ind 1648 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL cap 2096 1024 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMATTR SpiceLine Rser=10m
SYMBOL schottky 1792 896 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL PowerProducts\\LT3495 1824 1088 R0
SYMATTR InstName U1
SYMBOL cap 2000 896 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=10m
SYMBOL res 2192 1008 R0
SYMATTR InstName Rload
SYMATTR Value 230
FLAG 2208 1008 OUT
FLAG 1824 1248 0
FLAG 1552 992 0
FLAG 1552 880 IN
FLAG 2016 976 0
FLAG 2112 1120 0
FLAG 2208 1120 0
TEXT 2032 1208 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0800259d24c5_preamp_open_loop.asc
* Generated by LTspice 26.0.1 for Windows.
* .tran 200n
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp1.asy)
V1 N001 0 5
V3 Input_bode 0 0 AC 0.05 0 Rser=50
V2 N002 0 -5
XU1 0 Input_bode N001 N002 Out_PreAmp level1 Avol=750 GBW=359Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.ac dec 1000 1 1G
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -720 -80 -720 -160
WIRE 336 -16 272 -16
WIRE 80 16 -272 16
WIRE 272 16 272 -16
WIRE 336 16 336 -16
WIRE -720 64 -720 0
WIRE 272 144 272 96
WIRE 80 160 80 16
WIRE 240 160 80 160
WIRE 640 176 640 64
WIRE 640 176 304 176
WIRE 240 192 96 192
WIRE 96 272 96 192
WIRE 272 304 272 208
WIRE 272 432 272 384
SYMBOL OpAmps\\UniversalOpAmp1 272 176 R0
SYMATTR InstName U1
SYMATTR Value2 Avol=750 GBW=359Meg Vos=0
SYMBOL voltage 272 112 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -720 -96 R0
WINDOW 123 24 44 Left 2
WINDOW 39 24 72 Left 2
WINDOW 3 24 100 Left 2
SYMATTR Value2 AC 0.05 0
SYMATTR SpiceLine Rser=50
SYMATTR Value 0
SYMATTR InstName V3
SYMBOL voltage 272 288 R0
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
FLAG 272 432 0
FLAG 336 16 0
FLAG 96 272 0
FLAG 640 64 Out_PreAmp
FLAG -272 16 Input_bode
FLAG -720 64 0
FLAG -720 -160 Input_bode
TEXT -1032 -8 Left 2 ;.tran 200n
TEXT -1032 -40 Left 2 !.ac dec 1000 1 1G
* Z:\home\khalils\Downloads\files\data\raw_asc\32686b297ab2_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vbe N003 5.6K
R2 N001 N002 1K
R3 N002 Vce 1K
Q1 Vce Vbe 0 0 NPN
V1 N001 0 5
V2 N003 0 SINE(0 5 5 0 0 0 2)
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V2 0 5 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 640 -144 320 -144
WIRE 320 -96 320 -144
WIRE 640 32 640 -144
WIRE 320 80 320 -16
WIRE 320 224 320 160
WIRE 416 224 416 208
WIRE 416 224 320 224
WIRE 320 240 320 224
WIRE 80 288 -48 288
WIRE 208 288 208 240
WIRE 208 288 160 288
WIRE 256 288 208 288
WIRE -48 320 -48 288
WIRE -48 432 -48 400
WIRE 320 432 320 336
WIRE 320 432 -48 432
WIRE 640 432 640 112
WIRE 640 432 320 432
WIRE 320 480 320 432
FLAG 320 480 0
FLAG 208 240 Vbe
FLAG 416 208 Vce
SYMBOL res 176 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5.6K
SYMBOL res 304 -112 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 304 64 R0
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL npn 256 240 R0
SYMATTR InstName Q1
SYMBOL voltage 640 16 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -48 304 R0
SYMATTR InstName V2
SYMATTR Value SINE(0 5 5 0 0 0 2)
TEXT -32 160 Left 2 !.dc V2 0 5 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3588-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3588-1.asy)
C4 N006 0 1
XU1 N001 N002 N005 N003 N004 OUT N006 0 0 N007 0 LTC3588-1 ;pnba PZ1)PZ2)CAP)Vin)SW)Vout)Vin2)D1)D0)Pgood)GND
Rload OUT 0 25K
C1 N003 0 2
C2 OUT 0 47
C3 N003 N005 1
I1 N002 N001 SINE(0 200u 100 0 0 0 100)
L1 N004 OUT 10
.tran 5
.lib LTC3588-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -112 80 -112
WIRE 432 -112 288 -112
WIRE 80 0 80 -112
WIRE 112 0 80 0
WIRE 432 0 432 -112
WIRE 432 0 400 0
WIRE -16 96 -32 96
WIRE 64 96 48 96
WIRE 112 96 64 96
WIRE 416 96 400 96
WIRE 512 96 496 96
WIRE 560 96 512 96
WIRE 640 96 560 96
WIRE 64 112 64 96
WIRE 560 112 560 96
WIRE 640 112 640 96
WIRE 64 192 64 176
WIRE 112 192 64 192
WIRE 512 192 512 96
WIRE 512 192 400 192
WIRE 560 208 560 176
WIRE 640 208 640 192
WIRE 32 288 16 288
WIRE 112 288 96 288
WIRE 416 288 400 288
WIRE 112 384 96 384
WIRE 416 384 400 384
WIRE 256 448 256 432
SYMBOL cap 96 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap 48 112 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 48 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2
SYMBOL res 624 96 R0
SYMATTR InstName Rload
SYMATTR Value 25K
SYMBOL PowerProducts\\LTC3588-1 256 192 R0
SYMATTR InstName U1
SYMBOL current 288 -112 R90
WINDOW 0 -32 40 VBottom 2
WINDOW 3 32 40 VTop 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value SINE(0 200u 100 0 0 0 100)
SYMBOL ind 400 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL cap 544 112 R0
SYMATTR InstName C2
SYMATTR Value 47
FLAG -32 96 0
FLAG 560 208 0
FLAG 416 384 0
FLAG 96 384 0
FLAG 256 448 0
FLAG 640 208 0
FLAG 640 96 OUT
FLAG 16 288 0
TEXT 536 320 Left 2 !.tran 5
* Z:\home\khalils\Downloads\files\data\raw_asc\111234136c01__Fig1_25_K_is_3_AC_MSD.asc
* Generated by LTspice 26.0.1 for Windows.
Vin Vin 0 AC 1
E1 Vout 0 Vin N001 1
R1 N001 0 50
T1 Vin 0 N001 0 Td=30n Z0=50
.ac lin 1000 1k 100MEG
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 688
WIRE 752 256 704 256
WIRE 800 256 752 256
WIRE 704 288 704 256
WIRE 208 304 192 304
WIRE 272 304 208 304
WIRE 656 304 272 304
WIRE 192 320 192 304
WIRE 192 416 192 400
WIRE 272 480 272 304
WIRE 400 480 272 480
WIRE 656 480 656 352
WIRE 656 480 496 480
WIRE 656 496 656 480
WIRE 400 512 384 512
WIRE 528 512 496 512
WIRE 656 608 656 576
SYMBOL e 704 272 R0
WINDOW 0 42 39 Left 0
WINDOW 3 44 69 Left 0
SYMATTR InstName E1
SYMATTR Value 1
SYMBOL voltage 192 304 R0
WINDOW 0 -73 38 Left 0
WINDOW 123 -82 95 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMBOL tline 448 496 R0
SYMATTR InstName T1
SYMATTR Value Td=30n Z0=50
SYMBOL res 640 480 R0
SYMATTR InstName R1
SYMATTR Value 50
FLAG 656 608 0
FLAG 528 512 0
FLAG 384 512 0
FLAG 192 416 0
FLAG 208 304 Vin
FLAG 752 256 Vout
FLAG 704 368 0
TEXT 304 392 Left 0 !.ac lin 1000 1k 100MEG
* Z:\home\khalils\Downloads\files\data\raw_asc\3e1498122574_Fig6_19_NMOS_ID_VDS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1)
M1 N001 N002 0 0 N_50n L=50n W=500n
VDS N001 0 0
VGS N002 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VDS 0 1 1m VGS 0 1 250m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 288 208 288 192
WIRE 288 304 288 288
WIRE 400 192 288 192
WIRE 448 112 448 80
WIRE 448 224 448 208
WIRE 496 160 448 160
WIRE 640 80 448 80
WIRE 640 112 640 80
WIRE 640 224 640 192
SYMBOL voltage 288 192 R0
WINDOW 0 -90 57 Left 0
WINDOW 3 24 104 Invisible 0
SYMATTR InstName VGS
SYMATTR Value 0
SYMBOL voltage 640 96 R0
WINDOW 0 41 55 Left 0
WINDOW 3 24 104 Invisible 0
SYMATTR InstName VDS
SYMATTR Value 0
SYMBOL nmos4 400 112 R0
WINDOW 0 59 18 Left 0
WINDOW 3 64 75 Left 0
WINDOW 123 64 103 Left 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 L=50n W=500n
FLAG 288 304 0
FLAG 448 224 0
FLAG 640 224 0
FLAG 496 160 0
TEXT 384 272 Left 0 !.dc VDS 0 1 1m VGS 0 1 250m
TEXT 384 296 Left 0 !.lib cmosedu_models.txt
TEXT 488 56 Left 0 ;Plot Id(M1)
* Z:\home\khalils\Downloads\files\data\raw_asc\3b826e4cc36f_TYPE2.asc
* Generated by LTspice 26.0.1 for Windows.
* Type 2 Compensator
* target gain at fz1\nzero frequency(Hz)\npole frequency(Hz)\nmax ouput voltage(V)\nmin output voltage(V)\nopen loop gain
* feedback
* reference
* 2024-12-29
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
C1 ve N002 {C1}
C2 ve N001 {C2}
V2 +V 0 {vh}
XU1 ref N001 +V -V ve level2 Avol={avol} GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R2 N001 N003 {R2}
V3 -V 0 {vl}
B1 N003 0 V=V(fb)
R1 N002 N001 {R1}
.lib opamp.sub
.param g=1
.param fz1=1k
.param fp1=20k
.param vh=5
.param vl=0
.param avol=100k
.param R1=({R2}*{g})
.param C1=1/(2*PI*{R1}*{fz1})
.param C2=1/(2*PI*{R1}*{fp1})
.param R2=100k
.ic V(ve)=0
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1008 680
WIRE 464 -144 464 -160
WIRE 576 -144 576 -160
WIRE 464 -48 464 -64
WIRE 576 -48 576 -64
WIRE 192 -32 96 -32
WIRE 368 -32 256 -32
WIRE 96 64 96 -32
WIRE 144 64 96 64
WIRE 256 64 224 64
WIRE 368 64 368 -32
WIRE 368 64 320 64
WIRE 240 128 240 112
WIRE -208 144 -272 144
WIRE -32 144 -144 144
WIRE 96 144 96 64
WIRE 96 144 48 144
WIRE 208 144 96 144
WIRE 368 160 368 64
WIRE 368 160 272 160
WIRE 880 160 368 160
WIRE -144 176 -144 144
WIRE 208 176 128 176
WIRE 240 208 240 192
WIRE -144 272 -144 256
WIRE 128 336 128 176
WIRE 128 336 -256 336
IOPIN -272 144 In
IOPIN -256 336 In
IOPIN 880 160 Out
SYMBOL voltage 576 -160 R0
SYMATTR InstName V3
SYMATTR Value {vl}
SYMBOL res 64 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL voltage 464 -160 R0
SYMATTR InstName V2
SYMATTR Value {vh}
SYMBOL UniversalOpAmp2 240 160 R0
WINDOW 123 34 49 Left 2
WINDOW 39 36 78 Left 2
WINDOW 40 32 106 Left 2
SYMATTR Value2 Avol={avol} GBW=10Meg Slew=10Meg
SYMATTR InstName U1
SYMBOL res 240 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL bv -144 160 R0
SYMATTR InstName B1
SYMATTR Value V=V(fb)
SYMBOL cap 320 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {C1}
SYMBOL cap 256 -48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {C2}
FLAG -272 144 fb
FLAG -256 336 ref
FLAG -144 272 0
FLAG 880 160 ve
FLAG 576 -48 0
FLAG 464 -48 0
FLAG 464 -160 +V
FLAG 576 -160 -V
FLAG 240 112 +V
FLAG 240 208 -V
TEXT 272 184 Left 2 !.lib opamp.sub
TEXT -336 -224 Left 2 !.param g=1\n.param fz1=1k\n.param fp1=20k\n.param vh=5\n.param vl=0\n.param avol=100k
TEXT 416 72 Left 2 !.param R1=({R2}*{g})\n.param C1=1/(2*PI*{R1}*{fz1})\n.param C2=1/(2*PI*{R1}*{fp1})
TEXT -352 -288 Left 4 ;Type 2 Compensator
TEXT -80 208 Left 2 !.param R2=100k
TEXT -104 -224 Left 2 ;target gain at fz1\nzero frequency(Hz)\npole frequency(Hz)\nmax ouput voltage(V)\nmin output voltage(V)\nopen loop gain
TEXT -312 112 Left 2 ;feedback
TEXT -312 304 Left 2 ;reference
TEXT 656 176 Left 2 !.ic V(ve)=0
TEXT 448 -264 Left 2 ;2024-12-29
* Z:\home\khalils\Downloads\files\data\raw_asc\f59468032ddf_LT1006A.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain 100 Amplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1006A.asy)
V1 +V 0 5
V3 IN 0 SINE(5m 1m 1K)
R2 N001 0 1K
R1 OUT N001 99K
XU1 IN N001 +V 0 OUT LT1006 ;pnba In+)In-)V+)V-)OUT
R3 OUT 0 660
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 112 16 112
WIRE 128 112 112 112
WIRE 160 112 128 112
WIRE 272 112 240 112
WIRE 192 208 192 192
WIRE 128 224 128 112
WIRE 160 224 128 224
WIRE -80 240 -80 224
WIRE 272 240 272 112
WIRE 272 240 224 240
WIRE 336 240 272 240
WIRE 160 256 48 256
WIRE 336 256 336 240
WIRE 48 272 48 256
WIRE 192 288 192 272
WIRE -80 336 -80 320
WIRE 336 352 336 336
WIRE 48 368 48 352
SYMBOL voltage 48 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(5m 1m 1K)
SYMBOL res 320 240 R0
SYMATTR InstName R3
SYMATTR Value 660
SYMBOL voltage -80 224 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL opamps\\LT1006A 192 176 R0
SYMATTR InstName U1
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 99K
FLAG -80 336 0
FLAG 192 192 +V
FLAG -80 224 +V
FLAG 16 112 0
FLAG 48 368 0
FLAG 192 288 0
FLAG 336 352 0
FLAG 336 240 OUT
FLAG 48 256 IN
TEXT 288 400 Left 2 !.tran 3m
TEXT 152 56 Bottom 2 ;Gain 100 Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3015.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3015.asy)
V1 IN 0 -10
V2 N001 0 PULSE(0 1 50u 1u 1u 75u)
C1 OUT 0 10 Rser=.1
XU1 IN IN 0 OUT N002 LT3015 ;pnba _SHDN)IN)GND)OUT)ADJ
R2 N002 0 3.4K
R1 OUT N002 10.5K
S1 0 OUT N001 0 LOAD
.tran 250u
.model LOAD SW(Ron=3.3 Roff=33 Vt=.5 Vh=-.4)
.lib LT3015.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1200 680
WIRE 64 128 -80 128
WIRE 80 128 64 128
WIRE 432 128 368 128
WIRE 544 128 432 128
WIRE 640 128 544 128
WIRE -80 144 -80 128
WIRE 432 144 432 128
WIRE 544 144 544 128
WIRE 640 144 640 128
WIRE 848 160 688 160
WIRE 944 160 928 160
WIRE -80 240 -80 224
WIRE 64 240 64 128
WIRE 80 240 64 240
WIRE 432 240 432 224
WIRE 432 240 368 240
WIRE 544 240 544 208
WIRE 640 240 640 224
WIRE 432 256 432 240
WIRE 224 320 224 304
WIRE 432 352 432 336
SYMBOL sw 640 240 R180
WINDOW 0 -19 98 Right 2
WINDOW 3 -21 1 Right 2
SYMATTR InstName S1
SYMATTR Value LOAD
SYMBOL cap 528 144 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=.1
SYMBOL voltage -80 128 R0
SYMATTR InstName V1
SYMATTR Value -10
SYMBOL res 416 240 R0
SYMATTR InstName R2
SYMATTR Value 3.4K
SYMBOL PowerProducts\\LT3015 224 192 R0
SYMATTR InstName U1
SYMBOL res 416 128 R0
SYMATTR InstName R1
SYMATTR Value 10.5K
SYMBOL voltage 832 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 50u 1u 1u 75u)
FLAG 432 352 0
FLAG 224 320 0
FLAG -80 240 0
FLAG 544 240 0
FLAG 640 240 0
FLAG -80 128 IN
FLAG 640 128 OUT
FLAG 688 208 0
FLAG 944 160 0
TEXT 480 376 Left 2 !.tran 250u\n.model LOAD SW(Ron=3.3 Roff=33 Vt=.5 Vh=-.4)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1108.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1108.asy)
R1 OUT N003 753K
D1 N001 OUT MBRS140
XU1 IN IN N001 0 0 N002 N004 N003 LT1108 top=1K bot=1T ;pnba Ilim)Vin)SW1)SW2)GND)AO)SET)FB
V1 IN 0 2.8
Rload OUT 0 25
R2 N003 0 250K
C2 OUT 0 100 Rser=0.02
L1 IN N001 33 Rser=0.02 Rpar=5000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
.lib LT1108.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2456 1432
WIRE 1472 912 1296 912
WIRE 1600 912 1472 912
WIRE 1664 912 1600 912
WIRE 1792 912 1744 912
WIRE 1840 912 1792 912
WIRE 1952 912 1904 912
WIRE 2064 912 1952 912
WIRE 2176 912 2064 912
WIRE 1296 928 1296 912
WIRE 2064 928 2064 912
WIRE 2176 928 2176 912
WIRE 1952 944 1952 912
WIRE 1472 960 1472 912
WIRE 1600 960 1600 912
WIRE 1296 1024 1296 1008
WIRE 1392 1024 1376 1024
WIRE 1792 1024 1792 912
WIRE 1792 1024 1680 1024
WIRE 2064 1024 2064 992
WIRE 2176 1024 2176 1008
WIRE 1952 1104 1952 1024
WIRE 1952 1104 1680 1104
WIRE 1952 1120 1952 1104
WIRE 1392 1184 1376 1184
WIRE 1696 1184 1680 1184
WIRE 1952 1216 1952 1200
WIRE 1536 1264 1536 1248
SYMBOL VOLTAGE 1296 912 R0
SYMATTR InstName V1
SYMATTR Value 2.8
SYMBOL res 2160 912 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL RES 1936 928 R0
SYMATTR InstName R1
SYMATTR Value 753K
SYMBOL schottky 1840 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL RES 1936 1104 R0
SYMATTR InstName R2
SYMATTR Value 250K
SYMBOL IND 1648 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL POLCAP 2048 928 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL POWERPRODUCTS\\LT1108 1536 1104 R0
SYMATTR InstName U1
FLAG 2176 912 OUT
FLAG 1952 1216 0
FLAG 2064 1024 0
FLAG 2176 1024 0
FLAG 1296 1024 0
FLAG 1696 1184 0
FLAG 1536 1264 0
FLAG 1296 912 IN
TEXT 1712 1256 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\05d1571568d3_6090-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6090-5.asy)
V3 N001 0 2.5
XU1 NC_01 N002 IN NC_02 NC_03 OUT NC_04 NC_05 LTC6090-5 ;pnba COM)IN-)IN+)V-)_TF)OUT)V+)_OD
V2 +V 0 70
V1 -V 0 -70
V4 IN 0 SINE(1.25 1.35 10K)
C1 OUT N002 10p
R2 N001 N002 16.2K
R3 N002 0 16.9K
R1 OUT N002 435K
.tran 250u
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1128 680
WIRE 160 -112 48 -112
WIRE 48 -96 48 -112
WIRE 160 -96 160 -112
WIRE 432 -96 336 -96
WIRE 592 -96 496 -96
WIRE 48 0 48 -16
WIRE 160 16 160 -16
WIRE 336 16 336 -96
WIRE 336 16 160 16
WIRE 432 16 336 16
WIRE 592 16 592 -96
WIRE 592 16 512 16
WIRE 160 32 160 16
WIRE 384 112 384 80
WIRE -176 128 -176 112
WIRE -48 128 -48 112
WIRE 160 128 160 112
WIRE 336 160 336 16
WIRE 368 160 336 160
WIRE 592 192 592 16
WIRE 592 192 528 192
WIRE 672 192 592 192
WIRE -176 224 -176 208
WIRE -48 224 -48 208
WIRE 368 224 64 224
WIRE 64 240 64 224
WIRE 384 304 384 272
WIRE 64 336 64 320
SYMBOL voltage -48 112 R0
SYMATTR InstName V1
SYMATTR Value -70
SYMBOL voltage 64 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value SINE(1.25 1.35 10K)
SYMBOL cap 496 -112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL LTC6090-5 432 192 R0
SYMATTR InstName U1
SYMBOL voltage 48 -112 R0
SYMATTR InstName V3
SYMATTR Value 2.5
SYMBOL voltage -176 112 R0
SYMATTR InstName V2
SYMATTR Value 70
SYMBOL res 144 16 R0
SYMATTR InstName R3
SYMATTR Value 16.9K
SYMBOL res 528 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 435K
SYMBOL res 144 -112 R0
SYMATTR InstName R2
SYMATTR Value 16.2K
FLAG -48 224 0
FLAG -48 112 -V
FLAG -176 224 0
FLAG -176 112 +V
FLAG 384 304 -V
FLAG 384 80 +V
FLAG 672 192 OUT
FLAG 48 0 0
FLAG 160 128 0
FLAG 64 336 0
FLAG 64 224 IN
TEXT 608 424 Left 2 !.tran 250u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP121-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP121-2.8.asy)
XU1 OUT MP_01 0 IN MP_02 IN ADP121 K=1/3500 ;pnba Vout))GND)En))Vin
Rload OUT 0 22
V1 IN 0 5.5
C1 IN 0 1
C2 OUT 0 1
.tran 10m startup
.lib ADP121.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 22
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ADP121-2.8 256 208 R0
SYMATTR InstName U1
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup