Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\abc674541525_DR01op.asc
* Generated by LTspice 26.0.1 for Windows.
V1 V1 0 {Vcc}
D1 V1 R1 1N4148
R1 R1 0 {R1}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.op
.param Vcc=25 R1=1.2k
.meas Vd param V(V1)-V(R1)
.meas Pd param Vd*I(D1)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 912 680
WIRE 128 0 48 0
WIRE 256 0 192 0
WIRE 304 0 256 0
WIRE 48 48 48 0
WIRE 304 48 304 0
WIRE 48 160 48 128
WIRE 304 160 304 128
WIRE 304 160 48 160
WIRE 48 192 48 160
SYMBOL res 288 32 R0
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL diode 128 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 48 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vcc}
FLAG 48 192 0
FLAG 256 0 R1
FLAG 48 0 V1
TEXT 88 176 Left 2 !.op
TEXT 96 208 Left 2 !.param Vcc=25 R1=1.2k
TEXT 416 16 Left 2 !.meas Vd param V(V1)-V(R1)
TEXT 416 56 Left 2 !.meas Pd param Vd*I(D1)
* Z:\tmp\asc_dec_bjh7r6w2\10f5a4348ca0_schmitt_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R13 N005 0 3.9K
R12 N005 N004 10K
V2 5V 0 5V
R3 5V VGND 1K
V3 THRESH 0 PWL({t0} 0 {t0+6/freq} 0 {t0+6.5/freq} 5 {t0+50/freq} 5 {t0+250/freq} 5 {t0+251/freq} 0)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 0 336 -32
WIRE 176 96 112 96
WIRE 336 96 336 80
WIRE 336 96 256 96
WIRE 448 96 336 96
WIRE 480 96 448 96
WIRE 208 128 176 128
WIRE 208 144 208 128
WIRE 448 144 448 96
WIRE 176 160 176 128
WIRE 144 176 112 176
WIRE 224 192 208 192
WIRE 336 192 304 192
WIRE 384 192 336 192
WIRE -352 208 -448 208
WIRE 144 208 16 208
WIRE 336 224 336 192
WIRE -688 256 -720 256
WIRE 448 272 448 240
WIRE -720 304 -720 256
WIRE 336 336 336 304
WIRE 336 336 320 336
SYMBOL res 320 208 R0
SYMATTR InstName R13
SYMATTR Value 3.9K
SYMBOL res 320 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R12
SYMATTR Value 10K
SYMBOL voltage -1040 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5V
SYMBOL res -464 112 R0
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL voltage -720 288 R0
WINDOW 0 -66 38 Left 2
WINDOW 3 -450 146 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL({t0} 0 {t0+6/freq} 0 {t0+6.5/freq} 5 {t0+50/freq} 5 {t0+250/freq} 5 {t0+251/freq} 0)
FLAG -1040 80 5V
FLAG -1040 160 0
FLAG -448 288 0
FLAG -448 128 5V
FLAG -352 208 VGND
FLAG -688 256 THRESH
FLAG -720 384 0
FLAG 176 224 5V
FLAG 208 144 0
FLAG 336 336 0
FLAG 448 272 0
FLAG 480 96 SIG_OUT
FLAG -864 80 SIG_IN
FLAG -864 160 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1375.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1375.asy)
R3 N005 N004 1K
C4 N004 0 10n
XU1 N001 IN N003 N002 MP_01 0 N006 N005 LT1375 top=1K bot=1T ;pnba Boost)Vin)SW)_SHDN))GND)FB)Vc
R2 OUT N006 5.36K
D1 0 N003 MBRS340
D2 OUT N001 1N4148
L1 N003 OUT 10 Rser=0.02 Rpar=5000
C2 OUT 0 100 Rser=0.05
V1 IN 0 6.2
R1 N006 0 4.99K
Rload OUT 0 10
C1 N001 N003 .1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib LT1375.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2372 1144
WIRE 1328 672 1120 672
WIRE 1584 672 1456 672
WIRE 1664 672 1584 672
WIRE 1776 672 1728 672
WIRE 1120 688 1120 672
WIRE 1328 704 1328 672
WIRE 1456 704 1456 672
WIRE 1584 704 1584 672
WIRE 1120 784 1120 768
WIRE 1248 784 1232 784
WIRE 1584 784 1584 768
WIRE 1584 784 1536 784
WIRE 1664 784 1584 784
WIRE 1776 784 1776 672
WIRE 1776 784 1744 784
WIRE 1888 784 1776 784
WIRE 2000 784 1888 784
WIRE 1584 800 1584 784
WIRE 1776 800 1776 784
WIRE 1888 800 1888 784
WIRE 2000 800 2000 784
WIRE 1584 880 1584 864
WIRE 1888 896 1888 864
WIRE 2000 896 2000 880
WIRE 1072 912 1056 912
WIRE 1152 912 1136 912
WIRE 1248 912 1232 912
WIRE 1776 912 1776 880
WIRE 1776 912 1536 912
WIRE 1776 928 1776 912
WIRE 1392 1008 1392 992
WIRE 1776 1024 1776 1008
SYMBOL IND 1648 800 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL res 1248 896 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL RES 1760 912 R0
SYMATTR InstName R1
SYMATTR Value 4.99K
SYMBOL res 1760 784 R0
SYMATTR InstName R2
SYMATTR Value 5.36K
SYMBOL schottky 1568 864 M180
WINDOW 0 36 54 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMBOL POWERPRODUCTS\\LT1375 1392 848 R0
SYMATTR InstName U1
SYMBOL cap 1136 896 R90
WINDOW 3 32 32 VTop 2
WINDOW 0 0 32 VBottom 2
SYMATTR Value 10n
SYMATTR InstName C4
SYMBOL POLCAP 1872 800 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.05
SYMBOL POLCAP 1568 704 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL DIODE 1728 656 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL res 1984 784 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL VOLTAGE 1120 672 R0
SYMATTR InstName V1
SYMATTR Value 6.2
FLAG 1776 1024 0
FLAG 1584 880 0
FLAG 2000 896 0
FLAG 1888 896 0
FLAG 1392 1008 0
FLAG 1120 784 0
FLAG 1056 912 0
FLAG 2000 784 OUT
FLAG 1120 672 IN
TEXT 1520 1032 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT4256-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT4256-1.asy)
MQ1 N002 N004 N003 N003 IRF530
R7 N008 0 4.02K
R4 N007 N006 100
R6 N003 N008 36.5K
R5 N002 N001 20m
C4 N005 0 .1
C1 N009 0 33n
R8 N003 N010 27K
V1 N001 0 PWL(0 0 2.7m 0 2.701m 48)
C2 0 N007 10n
R3 N004 N006 10
R1 N001 N005 64.9K
XU1 N005 N008 N010 0 N009 N006 N002 N001 LT4256-1 ;pnba UV)FB)PwrGD)GND)Timer)Gate)Sense)Vcc
Rload N003 0 200G
R2 N005 0 8.06K
C3 N003 0 220
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 25m
.lib LT4256-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1412 680
WIRE 288 32 -96 32
WIRE 448 32 288 32
WIRE 480 32 448 32
WIRE 576 32 560 32
WIRE 592 32 576 32
WIRE 896 32 688 32
WIRE 992 32 896 32
WIRE 1088 32 992 32
WIRE 1184 32 1088 32
WIRE -96 48 -96 32
WIRE 1088 48 1088 32
WIRE 1184 48 1184 32
WIRE 288 64 288 32
WIRE 896 80 896 32
WIRE 672 96 672 80
WIRE -96 144 -96 128
WIRE 448 144 448 32
WIRE 576 144 576 32
WIRE 992 144 992 32
WIRE 1088 144 1088 112
WIRE 1184 144 1184 128
WIRE 288 208 288 144
WIRE 288 208 208 208
WIRE 384 208 288 208
WIRE 672 208 672 176
WIRE 672 208 640 208
WIRE 688 208 672 208
WIRE 784 208 768 208
WIRE 208 224 208 208
WIRE 288 224 288 208
WIRE 992 288 992 224
WIRE 992 288 640 288
WIRE 992 304 992 288
WIRE 208 320 208 288
WIRE 288 320 288 304
WIRE 304 368 288 368
WIRE 384 368 368 368
WIRE 896 368 896 160
WIRE 896 368 640 368
WIRE 992 400 992 384
WIRE 512 432 512 416
SYMBOL nmos 592 80 R270
WINDOW 0 54 47 VTop 2
WINDOW 3 27 95 VRight 2
SYMATTR InstName Q1
SYMATTR Value IRF530
SYMBOL PowerProducts\\LT4256-1 512 272 R0
SYMATTR InstName U1
SYMBOL res 880 64 R0
SYMATTR InstName R8
SYMATTR Value 27K
SYMBOL res 1168 32 R0
SYMATTR InstName Rload
SYMATTR Value 200G
SYMBOL cap 848 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 272 208 R0
SYMATTR InstName R2
SYMATTR Value 8.06K
SYMBOL res 976 288 R0
SYMATTR InstName R7
SYMATTR Value 4.02K
SYMBOL cap 1072 48 R0
SYMATTR InstName C3
SYMATTR Value 220
SYMBOL res 976 128 R0
SYMATTR InstName R6
SYMATTR Value 36.5K
SYMBOL res 272 48 R0
SYMATTR InstName R1
SYMATTR Value 64.9K
SYMBOL cap 368 352 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 33n
SYMBOL cap 192 224 R0
SYMATTR InstName C4
SYMATTR Value .1
SYMBOL res 784 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL res 656 80 R0
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL res 576 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 20m
SYMBOL voltage -96 32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 2.7m 0 2.701m 48)
FLAG 848 208 0
FLAG 288 320 0
FLAG 288 368 0
FLAG 512 432 0
FLAG 992 400 0
FLAG 1088 144 0
FLAG -96 144 0
FLAG 1184 144 0
FLAG 208 320 0
TEXT 752 416 Left 2 !.tran 25m
* Z:\home\khalils\Downloads\files\data\raw_asc\06d68762c1a7_Circuito7.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N003 0 10n
L1 N002 N003 10m
V1 N001 0 AC 1
R1 N002 N001 50
.ac dec 10000 1 10Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 80 -16 80
WIRE 208 80 144 80
WIRE 208 96 208 80
WIRE -16 144 -16 80
WIRE 208 208 208 176
WIRE -16 288 -16 224
WIRE 208 288 208 272
WIRE 208 288 -16 288
WIRE -16 320 -16 288
SYMBOL voltage -16 128 R0
WINDOW 123 19 104 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL res 160 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL cap 192 208 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL ind 192 80 R0
SYMATTR InstName L1
SYMATTR Value 10m
FLAG -16 320 0
TEXT -48 344 Left 2 !.ac dec 10000 1 10Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3013.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3013.asy)
V1 N001 0 PWL(0 0 1 10)
R1 OUT N002 750K
C1 OUT 0 3.3
Rload OUT 0 100
XU2 MP_01 OUT MP_02 N002 0 N003 N004 N001 MP_03 N001 LT3013 ;pnba )OUT))ADJ)GND)PwrGD)Ct)_SHDN))IN
R3 N001 N003 1.6Meg
C2 0 N004 1000p
R2 N002 0 249K
.tran 1
.lib LT3013.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 80 -208 80
WIRE 80 80 0 80
WIRE 112 80 80 80
WIRE 576 80 400 80
WIRE 688 80 576 80
WIRE 784 80 688 80
WIRE 784 96 784 80
WIRE -208 112 -208 80
WIRE 688 112 688 80
WIRE 0 128 0 80
WIRE 80 160 80 80
WIRE 112 160 80 160
WIRE 576 160 400 160
WIRE 576 176 576 160
WIRE 688 192 688 176
WIRE 784 192 784 176
WIRE -208 224 -208 192
WIRE 0 240 0 208
WIRE 112 240 0 240
WIRE 416 240 400 240
WIRE 512 240 480 240
WIRE 576 272 576 256
WIRE 256 304 256 288
SYMBOL LT3013 256 160 R0
SYMATTR InstName U2
SYMBOL res 560 64 R0
SYMATTR InstName R1
SYMATTR Value 750K
SYMBOL res -16 112 R0
SYMATTR InstName R3
SYMATTR Value 1.6Meg
SYMBOL res 560 160 R0
SYMATTR InstName R2
SYMATTR Value 249K
SYMBOL cap 480 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL res 768 80 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 672 112 R0
SYMATTR InstName C1
SYMATTR Value 3.3
SYMBOL voltage -208 96 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG 256 304 0
FLAG -208 224 0
FLAG 784 192 0
FLAG 688 192 0
FLAG 576 272 0
FLAG 784 80 OUT
FLAG 512 240 0
TEXT 728 264 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7170-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N001 0 1n
V1 IN 0 3
Rload OUT 0 7.5
C1 OUT 0 4.7 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADM7170-2.5 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7170-2.5.asy)
.lib ADM7170-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 7.5
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADM7170-2.5 224 128 R0
SYMATTR InstName U1
TEXT 408 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\012944af6fe9_scheme-switch.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N005 0 125
L1 N004 0 1.2
R4 0 N006 2200
R2 N003 N005 2200
S1 N004 N003 N002 N001 MYSW
V2 N002 N001 PULSE(20 0 10m 10m 10m 60m 120m 0)
R5 N003 N004 2200
R3 N006 N003 2200
.tran 0 120m 0 0.1m
.model MYSW SW(Ron=1 Roff=1Meg)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1008 680
WIRE 656 -400 640 -400
WIRE 560 -288 560 -400
WIRE 576 -288 560 -288
WIRE 656 -288 656 -400
WIRE 656 -288 624 -288
WIRE 560 -240 528 -240
WIRE 672 -240 640 -240
WIRE 304 -128 224 -128
WIRE 480 -128 384 -128
WIRE 528 -128 528 -240
WIRE 528 -128 480 -128
WIRE 560 -128 528 -128
WIRE 672 -128 672 -240
WIRE 672 -128 640 -128
WIRE 688 -128 672 -128
WIRE 480 -80 480 -128
WIRE 688 -48 688 -128
WIRE 224 -16 224 -128
WIRE 480 48 480 0
WIRE 224 176 224 64
WIRE 480 176 480 128
WIRE 480 176 224 176
WIRE 688 176 688 32
WIRE 688 176 480 176
WIRE 480 224 480 176
SYMBOL res 496 144 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 2200
SYMBOL res 400 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2200
SYMBOL res 496 16 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 2200
SYMBOL voltage 224 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 484 231 Right 2
SYMATTR Value 125
SYMATTR InstName V1
SYMBOL res 544 -112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 2200
SYMBOL sw 656 -240 R90
SYMATTR InstName S1
SYMATTR Value MYSW
SYMBOL ind 672 -64 R0
SYMATTR InstName L1
SYMATTR Value 1.2
SYMBOL voltage 544 -400 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 4 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(20 0 10m 10m 10m 60m 120m 0)
FLAG 480 224 0
TEXT 232 160 Left 2 !.tran 0 120m 0 0.1m
TEXT 112 -288 Left 2 !.model MYSW SW(Ron=1 Roff=1Meg)
* Z:\home\khalils\Downloads\files\data\raw_asc\19b3e047ff04_noninv-amplifier-dac-a2a3.asc
* Generated by LTspice 26.0.1 for Windows.
R1 0 N003 24e3
XU1 N003 N001 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
V1 N001 0 SINE(1.5 1.5 1e3) AC 1
R2 N003 N002 56e3
.lib opamp.sub
.tran 0 10e-3 0 startup
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 448 96 288 96
WIRE 288 112 288 96
WIRE 560 112 512 112
WIRE 448 128 400 128
WIRE 288 208 288 192
WIRE 400 208 400 128
WIRE 448 208 400 208
WIRE 560 208 560 112
WIRE 560 208 528 208
WIRE 400 224 400 208
WIRE 400 320 400 304
SYMBOL OpAmps\\opamp 480 176 M180
SYMATTR InstName U1
SYMBOL res 416 320 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 24e3
SYMBOL voltage 288 96 R0
WINDOW 39 0 0 Left 0
WINDOW 3 24 96 Invisible 2
SYMATTR Value SINE(1.5 1.5 1e3)
SYMATTR InstName V1
SYMATTR Value2 AC 1
SYMBOL res 432 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 56e3
FLAG 288 208 0
FLAG 400 320 0
TEXT 256 376 Left 2 !.lib opamp.sub
TEXT 256 400 Left 2 !.tran 0 10e-3 0 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\13a22afd18d4_Diode_Compensation.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4857.asy)
+ M=.20134 VJ=.3905 ISR=12.216E-9 NR=4.9950 FC=0.5 TT=0 XTI=2)
V2 VCC5 0 5
D2 N001 Compensated BAR18
XU1 IN Compensated VCC5 0 N001 0 ADA4857 ;pnba 100)101)102)103)104)106
V1 IN 0 SINE(2.5 1.2 70Meg)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100n
.model BAR18 D(IS=2.2017E-18 N=.2 RS=48.717 IKF=2.3793 CJO=1.4285E-12
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1892 680
WIRE 640 32 640 16
WIRE 672 32 672 16
WIRE 624 48 64 48
WIRE 64 64 64 48
WIRE 816 64 688 64
WIRE 912 64 880 64
WIRE 1008 64 912 64
WIRE 624 80 608 80
WIRE 64 112 64 64
WIRE 608 192 608 80
WIRE 912 192 912 64
WIRE 912 192 608 192
IOPIN -224 80 Out
IOPIN 640 96 In
IOPIN 1008 64 Out
SYMBOL voltage -224 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL OpAmps\\ADA4857 656 64 M180
SYMATTR InstName U1
SYMBOL schottky 816 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value BAR18
SYMBOL voltage 64 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(2.5 1.2 70Meg)
FLAG 64 64 IN
FLAG 64 192 0
FLAG -224 160 0
FLAG -224 80 VCC5
FLAG 640 96 VCC5
FLAG 640 16 0
FLAG 672 16 0
FLAG 1008 64 Compensated
TEXT 136 -56 Left 2 !.tran 100n
TEXT 368 -56 Left 0 !.model BAR18 D(IS=2.2017E-18 N=.2 RS=48.717 IKF=2.3793 CJO=1.4285E-12\n+ M=.20134 VJ=.3905 ISR=12.216E-9 NR=4.9950 FC=0.5 TT=0 XTI=2)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7104-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 20u 3.3)
Rload OUT 0 6
C1 OUT 0 2.2 Rser=1.5m
R1 OUT N001 100K
XU1 IN OUT IN N001 OUT 0 ADP7104-1.8 ;pnba Vin)Sense)EN)PG)Vout)GND
.tran 3m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7104-1.8.asy)
.lib ADP7104-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -224 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -224 48 -224 32
WIRE 368 128 352 128
WIRE 464 128 464 32
WIRE 464 128 368 128
WIRE 560 128 464 128
WIRE -224 144 -224 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 368 224 368 128
WIRE 368 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -224 144 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -224 32 IN
FLAG 560 128 OUT
SYMBOL voltage -224 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 20u 3.3)
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 6
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL ADP7104-1.8 224 128 R0
SYMATTR InstName U1
TEXT 432 288 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3620-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3620-1.asy)
L1 N001 OUT 22 Rpar=10K
V1 IN 0 3.6
C1 OUT 0 1
XU1 N001 0 0 NC_01 MP_02 OUT IN IN LTC3620-1 ;pnba SW)GND)Fmin/Mode)LoBatB))Vout)Run)Vin
Rload OUT 0 100
.tran 1m startup
.lib LTC3620-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 96 16 96
WIRE 256 96 112 96
WIRE 16 112 16 96
WIRE 256 112 256 96
WIRE 112 160 112 96
WIRE 128 160 112 160
WIRE 16 208 16 192
WIRE 128 256 112 256
WIRE 416 256 384 256
WIRE 528 256 496 256
WIRE 560 256 528 256
WIRE 640 256 560 256
WIRE 560 272 560 256
WIRE 640 272 640 256
WIRE 128 352 112 352
WIRE 528 352 528 256
WIRE 528 352 384 352
WIRE 560 368 560 336
WIRE 640 368 640 352
SYMBOL ind 400 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 22
SYMATTR SpiceLine Rpar=10K
SYMBOL cap 544 272 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL LTC3620-1 256 256 R0
SYMATTR InstName U1
SYMBOL voltage 16 96 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL res 624 256 R0
SYMATTR InstName Rload
SYMATTR Value 100
FLAG 16 208 0
FLAG 112 256 0
FLAG 112 352 0
FLAG 560 368 0
FLAG 640 368 0
FLAG 640 256 OUT
FLAG 16 96 IN
TEXT 472 424 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1de267ccc5a5_ADG636.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG636.asy)
V1 +V 0 5
V2 -V 0 -5
R1 SA 0 1K
V5 D 0 SINE(0 4 2k)
V3 N001 0 3.3
V4 IN 0 pulse(0 3.3 0 1u 1u 5m 10m)
XU1 IN SA D SB -V 0 +V N001 ADG636 ;pnba IN)SA)D)SB)Vss)GND)Vdd)EN
R2 SB 0 1K
.tran 30m
.lib ADG636.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -752 -368 -800 -368
WIRE -800 -320 -800 -368
WIRE -1216 -256 -1216 -272
WIRE -1088 -256 -1104 -256
WIRE -928 -256 -1008 -256
WIRE -896 -256 -928 -256
WIRE -688 -224 -704 -224
WIRE -656 -224 -688 -224
WIRE -544 -224 -576 -224
WIRE -1040 -192 -1104 -192
WIRE -928 -192 -960 -192
WIRE -896 -192 -928 -192
WIRE -1216 -160 -1216 -176
WIRE -896 -128 -1072 -128
WIRE -640 -128 -704 -128
WIRE -640 -112 -640 -128
WIRE -1216 -48 -1216 -64
WIRE -1072 -16 -1072 -128
WIRE -736 0 -736 -16
WIRE -640 0 -640 -32
WIRE -864 16 -864 -16
WIRE -832 16 -864 16
WIRE -1216 48 -1216 32
WIRE -1072 80 -1072 64
SYMBOL voltage -1216 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADG636 -800 -176 R0
SYMATTR InstName U1
SYMBOL res -992 -240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -1072 -32 R0
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMBOL voltage -1216 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res -944 -176 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -640 -128 R0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL voltage -672 -224 R270
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 47 41 VRight 2
WINDOW 3 -46 -22 VRight 2
SYMATTR InstName V5
SYMATTR Value SINE(0 4 2k)
FLAG -1216 48 0
FLAG -1216 -160 0
FLAG -1216 -272 +V
FLAG -1216 -64 -V
FLAG -544 -224 0
FLAG -1072 80 0
FLAG -1104 -256 0
FLAG -1104 -192 0
FLAG -752 -368 +V
FLAG -736 0 0
FLAG -832 16 -V
FLAG -640 0 0
FLAG -928 -256 SA
FLAG -928 -192 SB
FLAG -688 -224 D
FLAG -1072 -128 IN
TEXT -664 64 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1305.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1305.asy)
V1 IN 0 3
C1 OUT 0 220 Rser=0.02
Rload OUT 0 15
L1 IN N001 10 Rser=0.02 Rpar=5000
XU1 0 N002 N005 N004 N003 IN N001 0 LT1305 ;pnba GND)LBO)SHDN)FB)LBI)Vin)SW)PGND
R1 N004 0 100K
R2 OUT N004 309K
D1 N001 OUT MBRS340
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
.lib LT1305.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2308 1120
WIRE 1424 672 1168 672
WIRE 1488 672 1424 672
WIRE 1616 672 1568 672
WIRE 1648 672 1616 672
WIRE 1760 672 1712 672
WIRE 1888 672 1760 672
WIRE 2016 672 1888 672
WIRE 1168 688 1168 672
WIRE 1888 688 1888 672
WIRE 2016 688 2016 672
WIRE 1424 736 1424 672
WIRE 1168 784 1168 768
WIRE 1760 784 1760 672
WIRE 1888 784 1888 752
WIRE 2016 784 2016 768
WIRE 1280 800 1264 800
WIRE 1616 816 1616 672
WIRE 1616 816 1568 816
WIRE 1280 848 1264 848
WIRE 1760 880 1760 864
WIRE 1760 880 1568 880
WIRE 1280 896 1264 896
WIRE 1760 896 1760 880
WIRE 1344 992 1344 960
WIRE 1504 992 1504 960
WIRE 1760 992 1760 976
SYMBOL RES 1744 880 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL VOLTAGE 1168 672 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL POWERPRODUCTS\\LT1305 1424 848 R0
WINDOW 0 8 -132 Left 2
WINDOW 3 0 132 Center 2
SYMATTR InstName U1
SYMBOL RES 2000 672 R0
SYMATTR InstName Rload
SYMATTR Value 15
SYMBOL POLCAP 1872 688 R0
SYMATTR InstName C1
SYMATTR Value 220
SYMATTR SpiceLine Rser=0.02
SYMBOL RES 1744 768 R0
SYMATTR InstName R2
SYMATTR Value 309K
SYMBOL schottky 1648 688 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMBOL IND 1472 688 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=0.02 Rpar=5000
FLAG 2016 784 0
FLAG 1888 784 0
FLAG 1760 992 0
FLAG 1504 992 0
FLAG 1344 992 0
FLAG 1168 784 0
FLAG 2016 672 OUT
FLAG 1168 672 IN
TEXT 1824 1000 Left 2 !.tran 2m startup