Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1008ca164cd9_1.3.1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N002 1K
Vi N003 0
M2 N002 N003 N004 N004 MC14007_P
M1 N004 N003 0 0 MC14007_N
VDD N001 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model MC14007_N NMOS (Vto=1.6 Kp=1.1m
.model MC14007_P PMOS (Vto=-1.3 Kp=1.4m)
.dc Vi 0 5 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -128 -432 -432 -432
WIRE -432 -400 -432 -432
WIRE -432 -256 -432 -320
WIRE -352 -256 -432 -256
WIRE -432 -240 -432 -256
WIRE -480 -160 -624 -160
WIRE -432 -80 -432 -144
WIRE -352 -80 -432 -80
WIRE -128 -64 -128 -432
WIRE -432 -32 -432 -80
WIRE -624 48 -624 -160
WIRE -480 48 -624 48
WIRE -624 176 -624 48
WIRE -624 320 -624 256
WIRE -432 320 -432 64
WIRE -432 320 -624 320
WIRE -128 320 -128 16
WIRE -128 320 -432 320
WIRE -432 368 -432 320
SYMBOL res -448 -416 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -624 160 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value ""
SYMATTR InstName Vi
SYMBOL pmos -480 -240 R0
SYMATTR InstName M2
SYMATTR Value MC14007_P
SYMBOL voltage -128 -80 R0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL nmos -480 -32 R0
SYMATTR InstName M1
SYMATTR Value MC14007_N
FLAG -432 368 0
TEXT 144 -16 Left 1 !.model MC14007_N NMOS (Vto=1.6 Kp=1.1m
TEXT 144 40 Left 1 !.model MC14007_P PMOS (Vto=-1.3 Kp=1.4m)
TEXT -656 392 Left 2 !.dc Vi 0 5 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\a4d322905325_N2-mos.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 VG 0 0 nch l='Ltab' w='Wtab'
Vgs VG 0 0.5
VDS N001 0 1.8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib modely/cmos018.txt
.PARAM Ltab = table(n, 1,0.18u, 2,0.5u, 3,0.5u, 4,1u, 5,1u, 6,2u, 7,5u, 8,10u, 9,10u)
.PARAM Wtab = table(n, 1,0.22u, 2,1u, 3,2u, 4,2u, 5,5u, 6,5u, 7,10u, 8,10u, 9,40u)
.STEP param n 1 9 1
.MEAS DC VTH FIND V(VG) WHEN Id(m1)=1e-7*{Wtab/Ltab}
.dc VGS 0 1 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 224 64 -192 64
WIRE 224 144 224 64
WIRE 128 160 0 160
WIRE -192 192 -192 64
WIRE 0 192 0 160
WIRE 320 192 224 192
WIRE 128 224 128 160
WIRE 176 224 128 224
WIRE 224 256 224 240
WIRE 320 256 320 192
WIRE 320 256 224 256
WIRE 224 272 224 256
SYMBOL voltage 0 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vgs
SYMATTR Value 0.5
SYMBOL nmos4 176 144 R0
WINDOW 123 55 3 Left 2
SYMATTR Value2 l='Ltab' w='Wtab'
SYMATTR InstName M1
SYMATTR Value nch
SYMBOL voltage -192 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 1.8
FLAG 224 272 0
FLAG -192 272 0
FLAG 0 272 0
FLAG 128 160 VG
TEXT -200 -168 Left 2 !.lib modely/cmos018.txt
TEXT -200 -120 Left 2 !.PARAM Ltab = table(n, 1,0.18u, 2,0.5u, 3,0.5u, 4,1u, 5,1u, 6,2u, 7,5u, 8,10u, 9,10u)
TEXT -200 -96 Left 2 !.PARAM Wtab = table(n, 1,0.22u, 2,1u, 3,2u, 4,2u, 5,5u, 6,5u, 7,10u, 8,10u, 9,40u)
TEXT -200 -72 Left 2 !.STEP param n 1 9 1
TEXT -200 -48 Left 2 !.MEAS DC VTH FIND V(VG) WHEN Id(m1)=1e-7*{Wtab/Ltab}
TEXT -200 -144 Left 2 !.dc VGS 0 1 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\032ca80e4bbe_transitorio.asc
* Generated by LTspice 26.0.1 for Windows.
V_IN N003 0 PULSE(0.2 3.3 3n 5n 5n 45n 100n) Rser=0
R1 N001 N002 28.8k
V_DD N001 0 3.3 Rser=0
M1 N002 N003 0 0 NMOS_FDE l=1u w=2.22u
C1 N002 0 100f
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.MODEL NMOS_FDE NMOS LEVEL=1 VTO=0.75 KP=60e-6 GAMMA=0.5 PHI=0.6
.tran 0 400n 0 1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1064 680
WIRE 240 16 80 16
WIRE 240 48 240 16
WIRE 80 64 80 16
WIRE 240 160 240 128
WIRE 432 160 240 160
WIRE 240 176 240 160
WIRE 160 208 80 208
WIRE 80 240 80 208
WIRE 160 256 160 208
WIRE 192 256 160 256
SYMBOL voltage 80 224 R0
SYMATTR InstName V_IN
SYMATTR Value PULSE(0.2 3.3 3n 5n 5n 45n 100n)
SYMATTR SpiceLine Rser=0
SYMBOL voltage 80 48 R0
SYMATTR InstName V_DD
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=0
SYMBOL res 224 32 R0
SYMATTR InstName R1
SYMATTR Value 28.8k
SYMBOL cap 416 160 R0
SYMATTR InstName C1
SYMATTR Value 100f
SYMBOL nmos4 192 176 R0
SYMATTR InstName M1
SYMATTR Value NMOS_FDE
SYMATTR Value2 l=1u w=2.22u
FLAG 80 320 0
FLAG 80 144 0
FLAG 240 272 0
FLAG 240 224 0
FLAG 432 224 0
TEXT -112 392 Left 2 !.MODEL NMOS_FDE NMOS LEVEL=1 VTO=0.75 KP=60e-6 GAMMA=0.5 PHI=0.6
TEXT 592 280 Left 2 !.tran 0 400n 0 1n
* Z:\home\khalils\Downloads\files\data\raw_asc\1045c0a1bff5_ex1e.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
Vi2 N003 0 {Vi1}
Vs1 Vpp 0 {Vs}
XU1 N001 i Vpp Vnn o level2 Avol=125 GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
RCARGA1 o 0 100k
Vs2 0 Vnn {Vs}
R3 i N002 {R3}
Vi1 N002 0 {Vi2}
R2 o i {R2}
R1 N001 0 {R1}
R4 N001 N003 {R4}
.param Vs=15 Vi1=2 Vi2=1 R1=1.1k R2=R1 R3=R1 R4=R1
.op
.meas DC max Vo V(o)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -32 176 -32
WIRE 400 -32 352 -32
WIRE 176 48 176 -32
WIRE -256 80 -256 48
WIRE -256 80 -304 80
WIRE 0 80 -128 80
WIRE 176 80 176 48
WIRE 176 80 0 80
WIRE 192 80 176 80
WIRE 400 96 400 -32
WIRE 400 96 256 96
WIRE 432 96 400 96
WIRE 448 96 432 96
WIRE -304 112 -304 80
WIRE -256 112 -256 80
WIRE 128 112 16 112
WIRE 192 112 128 112
WIRE 448 112 448 96
WIRE -128 144 -128 80
WIRE 16 144 16 112
WIRE 128 144 128 112
WIRE 448 224 448 192
WIRE -128 240 -128 224
WIRE 16 240 16 224
WIRE 128 256 128 224
WIRE -128 368 -128 320
WIRE 16 368 16 320
SYMBOL res 432 96 R0
SYMATTR InstName CARGA1
SYMATTR Value 100k
SYMBOL OpAmps\\UniversalOpAmp2 224 96 R0
SYMATTR InstName U1
SYMATTR Value2 Avol=125 GBW=10Meg Slew=10Meg
SYMBOL voltage -128 224 R0
SYMATTR InstName Vi1
SYMATTR Value {Vi2}
SYMBOL voltage -256 96 R0
SYMATTR InstName Vs2
SYMATTR Value {Vs}
SYMBOL res -144 128 R0
SYMATTR InstName R3
SYMATTR Value {R3}
SYMBOL res 368 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL voltage 16 224 R0
SYMATTR InstName Vi2
SYMATTR Value {Vi1}
SYMBOL voltage -256 -48 R0
SYMATTR InstName Vs1
SYMATTR Value {Vs}
SYMBOL res 0 128 R0
SYMATTR InstName R4
SYMATTR Value {R4}
SYMBOL res 112 128 R0
SYMATTR InstName R1
SYMATTR Value {R1}
FLAG -128 368 0
FLAG 448 224 0
FLAG -304 112 0
FLAG -256 -32 Vpp
FLAG -256 192 Vnn
FLAG 432 96 o
FLAG 0 80 i
FLAG 224 64 Vpp
FLAG 224 128 Vnn
FLAG 176 48 n
FLAG 16 368 0
FLAG 128 256 0
TEXT -40 424 Left 2 !.param Vs=15 Vi1=2 Vi2=1 R1=1.1k R2=R1 R3=R1 R4=R1
TEXT -40 488 Left 2 !.op
TEXT -40 456 Left 2 !.meas DC max Vo V(o)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6990.asc
* Generated by LTspice 26.0.1 for Windows.
* TimerBlox\n500Hz to 2KHz Voltage Controlled Oscillator\nControl Voltage Ramps from 2V to 1V\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6990.asy)
R2 N004 0 887K
R3 N003 0 196K
V2 N002 0 PULSE(2 1 5m 20m 20m 5m 50m)
V1 N001 0 5
R1 N001 N004 1Meg
XU1 N001 0 N003 N004 N001 OUT LTC6990 ;pnba OE)GND)SET)DIV)V+)OUT
R4 N003 N002 261K
.tran 60m startup
.lib LTC6990.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
WIRE 512 32 80 32
WIRE 80 80 80 32
WIRE 112 80 80 80
WIRE 400 80 336 80
WIRE 112 160 96 160
WIRE 384 160 336 160
WIRE 512 160 512 32
WIRE 512 160 384 160
WIRE 384 176 384 160
WIRE 512 176 512 160
WIRE -336 240 -352 240
WIRE -96 240 -256 240
WIRE 48 240 -16 240
WIRE 112 240 48 240
WIRE 352 240 336 240
WIRE 48 256 48 240
WIRE 352 272 352 240
WIRE 384 272 384 256
WIRE 384 272 352 272
WIRE 512 272 512 256
WIRE 384 288 384 272
WIRE 48 352 48 336
WIRE 384 384 384 368
SYMBOL LTC6990 224 160 R0
SYMATTR InstName U1
SYMBOL res 368 272 R0
SYMATTR InstName R2
SYMATTR Value 887K
SYMBOL res 0 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 261K
SYMBOL res 32 240 R0
SYMATTR InstName R3
SYMATTR Value 196K
SYMBOL res 368 160 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL voltage -240 240 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(2 1 5m 20m 20m 5m 50m)
SYMATTR InstName V2
SYMBOL voltage 512 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 512 272 0
FLAG -352 240 0
FLAG 96 160 0
FLAG 400 80 OUT
FLAG 48 352 0
FLAG 384 384 0
TEXT 224 24 Bottom 2 ;TimerBlox\n500Hz to 2KHz Voltage Controlled Oscillator\nControl Voltage Ramps from 2V to 1V\nStartup Modeled
TEXT 488 368 Left 2 !.tran 60m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1d27dde79883_ideal_oscillations.asc
* Generated by LTspice 26.0.1 for Windows.
* Oscillation Between Capacitor and Inductor
C1 N001 0 1F
V2 N002 0 PULSE(0 1 10m 1n 1n 10m 20m 10)
V1 N003 0 10V
L1 N001 0 0.025H
S1 N001 N003 N002 0 MYSW
.tran 0 25ms 15ms
.model MYSW SW(Ron=1 Roff=1Meg Vt=0.5)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 240 16 160 16
WIRE 160 48 160 16
WIRE 112 64 -48 64
WIRE -48 96 -48 64
WIRE 112 112 16 112
WIRE 240 112 240 16
WIRE 384 112 240 112
WIRE 384 128 384 112
WIRE 160 144 160 128
WIRE 240 144 240 112
WIRE 16 160 16 112
WIRE 240 224 240 208
WIRE 384 224 384 208
WIRE 384 224 240 224
WIRE 160 256 160 224
WIRE 240 256 240 224
WIRE 240 256 160 256
WIRE 16 272 16 240
WIRE 240 272 240 256
SYMBOL cap 224 144 R0
SYMATTR InstName C1
SYMATTR Value 1uF
SYMBOL sw 160 32 R0
SYMATTR InstName S1
SYMATTR Value MYSW
SYMBOL voltage 16 144 R0
WINDOW 3 -151 197 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 1 10m 1n 1n 10m 20m 10)
SYMATTR InstName V2
SYMBOL ind 368 112 R0
SYMATTR InstName L1
SYMATTR Value 0.025H
SYMBOL voltage 160 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10V
FLAG 240 272 0
FLAG -48 96 0
FLAG 16 272 0
TEXT -56 392 Left 2 !.tran 0 25ms 15ms
TEXT -200 368 Left 2 !.model MYSW SW(Ron=1 Roff=1Meg Vt=0.5)
TEXT -64 -72 Left 2 ;Oscillation Between Capacitor and Inductor
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1575-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1575-2.8.asy)
R3 N004 N005 5K
C2 N004 0 10p
V2 N002 0 12
C1 OUT 0 24
M3 N001 N003 OUT OUT IRFZ24
XU1 0 N002 0 OUT N004 N003 N001 N001 LT1575-2.8 ;pnba SHDN)Vin)GND)OUT)Comp)Gate)Ineg)Ipos
V1 N001 0 5
I2 OUT 0 PULSE(.2 5 300u 100n 100n 300u 600u) load
C3 N005 0 1000p
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m
.lib LT1575.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4232 1996
WIRE 2352 -32 2336 -32
WIRE 2688 -32 2640 -32
WIRE 2928 -32 2688 -32
WIRE 3008 -32 2928 -32
WIRE 3008 -16 3008 -32
WIRE 2352 64 2240 64
WIRE 2688 64 2688 -32
WIRE 2688 64 2640 64
WIRE 2240 80 2240 64
WIRE 2928 80 2928 -32
WIRE 3008 80 3008 64
WIRE 2352 160 2336 160
WIRE 2880 160 2640 160
WIRE 2240 176 2240 160
WIRE 2352 256 2336 256
WIRE 2672 256 2640 256
WIRE 2704 256 2672 256
WIRE 2816 256 2784 256
WIRE 2672 272 2672 256
WIRE 2816 272 2816 256
WIRE 2672 352 2672 336
WIRE 2816 352 2816 336
WIRE 2336 400 2336 256
WIRE 2928 400 2928 176
WIRE 2928 400 2336 400
WIRE 3056 400 2928 400
WIRE 2928 416 2928 400
WIRE 3056 416 3056 400
WIRE 2928 512 2928 480
WIRE 3056 512 3056 496
SYMBOL nmos 2880 80 R0
SYMATTR InstName M3
SYMATTR Value IRFZ24
SYMBOL cap 2912 416 R0
SYMATTR InstName C1
SYMATTR Value 24
SYMBOL current 3056 416 R0
WINDOW 123 0 0 Left 2
WINDOW 39 46 42 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I2
SYMATTR Value PULSE(.2 5 300u 100n 100n 300u 600u)
SYMBOL LT1575-2.8 2496 112 R0
SYMATTR InstName U1
SYMBOL cap 2656 272 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL cap 2800 272 R0
SYMATTR InstName C3
SYMATTR Value 1000p
SYMBOL voltage 2240 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL voltage 3008 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2688 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 5K
FLAG 2928 512 0
FLAG 3056 512 0
FLAG 3008 80 0
FLAG 2816 352 0
FLAG 2672 352 0
FLAG 2336 -32 0
FLAG 2240 176 0
FLAG 2336 160 0
FLAG 3056 400 OUT
TEXT 3288 576 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2370-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2370-2.5.asy)
XU1 NC_01 IN IN IN N002 OUT N001 0 ADP2370-2.5 IPSM=420m Rt=340000 Rb=160000 C1=1.6p Rc1=300k R3=5.92k Rshort=100MEG PD=0 ;pnba FSEL)SYNC)EN)Vin)SW)FB)PG)PGND
L1 N002 OUT 10 Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
C1 OUT 0 10
R1 OUT N001 10K
V1 IN 0 12
Rload OUT 0 20
.tran 500u startup
.lib ADP2370-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 692
WIRE 144 96 32 96
WIRE 176 96 144 96
WIRE 464 96 400 96
WIRE 624 96 544 96
WIRE 32 112 32 96
WIRE 144 176 144 96
WIRE 176 176 144 176
WIRE 416 176 400 176
WIRE 544 176 496 176
WIRE 624 176 624 96
WIRE 624 176 544 176
WIRE 688 176 624 176
WIRE 688 192 688 176
WIRE 32 208 32 192
WIRE 544 256 544 240
WIRE 544 256 400 256
WIRE 544 272 544 256
WIRE 688 288 688 272
WIRE 144 336 144 176
WIRE 176 336 144 336
WIRE 624 336 624 176
WIRE 624 336 400 336
SYMBOL ind 400 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
SYMBOL res 672 176 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL VOLTAGE 32 96 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ADP2370-2.5 288 208 R0
SYMATTR InstName U1
SYMBOL cap 528 176 R0
WINDOW 0 29 15 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 560 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 32 208 0
FLAG 32 96 IN
FLAG 544 272 0
FLAG 688 176 OUT
FLAG 688 288 0
TEXT 504 376 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\100de62ee06a_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
D2 N004 0 D
R1 N002 N001 2k
V1 N001 0 2.5
R2 N004 N003 2k
D1 N002 N003 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 96 96 96
WIRE 352 96 272 96
WIRE 512 96 416 96
WIRE 96 144 96 96
WIRE 512 160 512 96
WIRE 512 272 512 240
WIRE 96 368 96 224
WIRE 512 368 512 336
SYMBOL diode 352 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL diode 496 272 R0
SYMATTR InstName D2
SYMBOL res 288 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2k
SYMBOL res 528 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 2k
SYMBOL voltage 96 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.5
FLAG 96 368 0
FLAG 512 368 0
TEXT 62 392 Left 2 !.tran 10ms
* Z:\tmp\asc_dec_bjh7r6w2\0b5f09a825b3_ArbitraryCapacitance_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 sine(0 1 1K)
C6 N003 N001 200p
C1 N004 0 Q=if(x>0,x*500p,x*100p)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 192 64 144
WIRE 64 336 64 272
WIRE 256 144 64 144
WIRE 256 160 256 144
WIRE 256 256 256 224
WIRE 256 336 256 320
WIRE 368 144 256 144
WIRE 368 160 368 144
WIRE 368 256 368 224
WIRE 368 336 368 320
WIRE 480 144 368 144
WIRE 480 160 480 144
WIRE 480 256 480 224
WIRE 480 336 480 320
SYMBOL voltage 64 176 R0
SYMATTR InstName V1
SYMATTR Value sine(0 1 1K)
SYMBOL cap 352 224 M180
WINDOW 0 24 64 Left 0
WINDOW 3 24 8 Left 0
SYMATTR InstName C6
SYMATTR Value 200p
SYMBOL cap 464 256 R0
SYMATTR InstName C1
SYMATTR Value Q=if(x>0,x*500p,x*100p)
FLAG 64 336 0
FLAG 480 336 0
FLAG 256 336 0
FLAG 368 336 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8042.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8042.asy)
D1 N002 0 LXK2-PW14 N=8
R1 N003 0 33.2K
V1 IN 0 24
C1 N001 0 4.7
XU1 IN IN IN N003 0 NC_01 IN NC_02 MP_03 MP_04 0 N002 N001 NC_05 MP_06 MP_07 0 LTM8042 ;pnba Vcc)RUN)BSTIN/BKLED-)Rt)SYNC)SS)PWM)CTL)))TGEN)LED+)BSTOUT/BKIN)TG)))GND
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib LTM8042.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 0 -144 0
WIRE -16 0 -32 0
WIRE 352 0 336 0
WIRE 432 0 416 0
WIRE -144 16 -144 0
WIRE -32 64 -32 0
WIRE -16 64 -32 64
WIRE -144 112 -144 96
WIRE -32 128 -32 64
WIRE -16 128 -32 128
WIRE 496 128 336 128
WIRE 576 128 560 128
WIRE -32 192 -32 128
WIRE -16 192 -32 192
WIRE 352 192 336 192
WIRE 448 192 432 192
WIRE -16 256 -32 256
WIRE 352 320 336 320
WIRE 160 384 160 368
SYMBOL voltage -144 0 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL LED 496 144 R270
WINDOW 123 -21 32 VBottom 2
WINDOW 0 72 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR Value2 N=8
SYMATTR InstName D1
SYMATTR Value LXK2-PW14
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL PowerProducts\\LTM8042 160 160 R0
SYMATTR InstName U1
SYMBOL cap 352 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL res 336 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 33.2K
FLAG -144 112 0
FLAG -32 256 0
FLAG 160 384 0
FLAG 352 320 0
FLAG 448 192 0
FLAG 432 0 0
FLAG 576 128 0
FLAG -144 0 IN
TEXT 432 312 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\00741a3362c5_AmpSimp.asc
* Generated by LTspice 26.0.1 for Windows.
GAmp 0 nAmp nP nN {Trans}
Rin nP nN 1G
R nAmp 0 {REq}
C nAmp 0 {CEq}
EOut N001 0 Value={Limit(V(nAmp),{VHigh},{VLow})}
R1 nOut N001 {RsOut}
.Param Gain=30000 Pole=30
.Param VHigh=4V VLow=-4V
.Param Trans=100u RsOut=10
.Param REq=Gain/Trans CEq=1/(2*pi*REq*Pole)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 680
WIRE 0 64 -64 64
WIRE 96 64 0 64
WIRE 272 96 144 96
WIRE 416 96 272 96
WIRE 624 96 544 96
WIRE 768 96 704 96
WIRE 0 128 0 64
WIRE 144 128 144 96
WIRE 272 128 272 96
WIRE 544 128 544 96
WIRE 96 144 96 64
WIRE 416 144 416 96
WIRE 144 240 144 208
WIRE 272 240 272 208
WIRE 272 240 144 240
WIRE 416 240 416 208
WIRE 416 240 272 240
WIRE 544 240 544 208
WIRE 544 240 416 240
WIRE 0 272 0 208
WIRE 0 272 -64 272
WIRE 96 272 96 192
WIRE 96 272 0 272
WIRE 272 272 272 240
IOPIN -64 64 In
IOPIN -64 272 In
IOPIN 768 96 Out
SYMBOL res 720 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {RsOut}
SYMBOL cap 400 144 R0
SYMATTR InstName C
SYMATTR Value {CEq}
SYMBOL g 144 112 R0
SYMATTR InstName GAmp
SYMATTR Value {Trans}
SYMBOL res 256 112 R0
SYMATTR InstName R
SYMATTR Value {REq}
SYMBOL res -16 112 R0
SYMATTR InstName Rin
SYMATTR Value 1G
SYMBOL Misc\\Epoly 544 112 R0
WINDOW 0 32 96 Left 2
WINDOW 3 -208 160 Left 2
SYMATTR InstName EOut
SYMATTR Value Value={Limit(V(nAmp),{VHigh},{VLow})}
FLAG -64 64 nP
FLAG -64 272 nN
FLAG 272 272 0
FLAG 272 96 nAmp
FLAG 768 96 nOut
TEXT -32 -80 Left 2 !.Param Gain=30000 Pole=30\n.Param VHigh=4V VLow=-4V\n.Param Trans=100u RsOut=10\n.Param REq=Gain/Trans CEq=1/(2*pi*REq*Pole)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6558.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6558.asy)
C2 N004 0 .1
C1 N002 0 .1
V2 IN 0 SINE(0 0.1 10Meg)
V1 N001 0 5
C3 N006 IN .1
R1 N007 0 350
XU1 0 0 N002 0 N004 0 N006 0 N001 OUT N001 N005 N001 N003 N001 N007 LT6558 ;pnba _EN)GND)INR)AGND1)ING)GNDG)INB)GNDB)V+B)OUTB)V+G)OUTG)V+R)OUTR)V+)BCV
.tran 1u
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 908 948
WIRE 336 272 -32 272
WIRE 464 272 336 272
WIRE -32 288 -32 272
WIRE 336 304 336 272
WIRE 464 336 464 272
WIRE 464 336 448 336
WIRE 112 352 48 352
WIRE 256 352 176 352
WIRE 496 368 448 368
WIRE -32 384 -32 368
WIRE 256 400 240 400
WIRE 464 432 464 336
WIRE 464 432 448 432
WIRE 48 448 48 352
WIRE 112 448 48 448
WIRE 256 448 176 448
WIRE 48 464 48 448
WIRE 496 464 448 464
WIRE 256 496 240 496
WIRE 464 528 464 432
WIRE 464 528 448 528
WIRE 80 544 -16 544
WIRE 256 544 144 544
WIRE -16 560 -16 544
WIRE 496 560 448 560
WIRE 256 592 240 592
WIRE -16 656 -16 640
WIRE 416 672 416 656
WIRE 288 688 288 656
WIRE 352 688 352 656
WIRE 416 768 416 752
SYMBOL LT6558 352 464 R0
SYMATTR InstName U1
SYMBOL cap 144 528 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL voltage -16 544 R0
SYMATTR InstName V2
SYMATTR Value SINE(0 0.1 10Meg)
SYMBOL voltage -32 272 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 400 656 R0
SYMATTR InstName R1
SYMATTR Value 350
SYMBOL cap 176 432 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL cap 176 336 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
FLAG -32 384 0
FLAG 496 560 OUT
FLAG -16 656 0
FLAG -16 544 IN
FLAG 48 464 0
FLAG 352 688 0
FLAG 288 688 0
FLAG 416 768 0
FLAG 240 400 0
FLAG 240 496 0
FLAG 240 592 0
TEXT 520 728 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4606.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4606.asy)
C1 OUT N004 100p
C3 N011 0 .001
C2 OUT 0 100
C4 N005 0 10 Rser=1
R1 N004 0 19.1K
R2 N012 0 392K
XU1 IN 0 OUT 0 N005 MP_01 MP_02 0 N002 N004 N008 N010 N009 N007 N012 N006 N003 N011 N001 N008 LTM4606 ;pnba Vin)PGND)Vout)FCB)Vd)))SGND)Pgood)Vfb)DRVcc)MARG1)MARG0)Fset)MPGM)Comp)Run)Track/SS)PLLIN)INTVcc
R3 IN N002 100K
Rload OUT 0 .42
R4 IN N003 100K
V1 IN 0 16
.tran 750u startup
.lib LTM4606.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1052 680
WIRE -160 -16 -256 -16
WIRE 128 -16 -160 -16
WIRE -256 0 -256 -16
WIRE 128 0 128 -16
WIRE 272 0 272 -16
WIRE -160 48 -160 -16
WIRE -80 48 -160 48
WIRE 16 48 0 48
WIRE 432 48 400 48
WIRE 624 48 432 48
WIRE 720 48 624 48
WIRE 624 64 624 48
WIRE 720 64 720 48
WIRE -256 96 -256 80
WIRE -160 112 -160 48
WIRE -144 112 -160 112
WIRE 16 112 -64 112
WIRE 432 112 400 112
WIRE 496 112 432 112
WIRE 496 128 496 112
WIRE 624 160 624 128
WIRE 720 160 720 144
WIRE -64 176 -80 176
WIRE 16 176 0 176
WIRE 416 176 400 176
WIRE 496 224 496 208
WIRE 16 240 0 240
WIRE 416 240 400 240
WIRE 16 304 0 304
WIRE 416 304 400 304
WIRE 0 368 0 304
WIRE 16 368 0 368
WIRE 416 368 400 368
WIRE -64 432 -80 432
WIRE 16 432 0 432
WIRE 416 432 400 432
WIRE 512 432 496 432
WIRE 128 512 128 496
WIRE 288 512 288 496
SYMBOL res 480 112 R0
SYMATTR InstName R1
SYMATTR Value 19.1K
SYMBOL cap 608 64 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMBOL cap 0 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 10
SYMATTR SpiceLine Rser=1
SYMBOL res -96 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res -160 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL res 704 48 R0
SYMATTR InstName Rload
SYMATTR Value .42
SYMBOL cap 0 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL PowerProducts\\LTM4606 208 240 R0
SYMATTR InstName U1
SYMBOL res 400 448 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 392K
SYMBOL voltage -256 -16 R0
SYMATTR InstName V1
SYMATTR Value 16
SYMBOL cap 416 48 R0
WINDOW 0 34 18 Left 2
WINDOW 3 35 47 Left 2
SYMATTR InstName C1
SYMATTR Value 100p
FLAG 128 512 0
FLAG 288 512 0
FLAG 496 224 0
FLAG 512 432 0
FLAG 624 160 0
FLAG 720 160 0
FLAG -256 96 0
FLAG -80 432 0
FLAG 720 48 OUT
FLAG -256 -16 IN
FLAG -80 176 0
FLAG 416 176 0
TEXT 608 456 Left 2 !.tran 750u startup