Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6004.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6004.asy)
V1 +V 0 2
V2 -V 0 -2
V3 IN 0 PULSE(-1 1 0 1u 1u 100m 200m)
XU1 IN OUT +V -V OUT LT6003 ;pnba IN+)IN-)VCC)VEE)OUT
.tran 1
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 756
WIRE 288 304 128 304
WIRE -256 368 -256 352
WIRE -160 368 -160 352
WIRE 192 368 192 352
WIRE 128 384 128 304
WIRE 160 384 128 384
WIRE 288 400 288 304
WIRE 288 400 224 400
WIRE 336 400 288 400
WIRE 160 416 -16 416
WIRE -16 432 -16 416
WIRE 192 448 192 432
WIRE -256 464 -256 448
WIRE -160 464 -160 448
WIRE -16 528 -16 512
SYMBOL LT6004 192 400 R0
SYMATTR InstName U1
SYMBOL voltage -16 416 R0
SYMATTR InstName V3
SYMATTR Value PULSE(-1 1 0 1u 1u 100m 200m)
SYMBOL voltage -160 352 R0
SYMATTR InstName V2
SYMATTR Value -2
SYMBOL voltage -256 352 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2
FLAG -256 464 0
FLAG -160 464 0
FLAG -16 528 0
FLAG -16 416 IN
FLAG 336 400 OUT
FLAG 192 352 +V
FLAG -256 352 +V
FLAG -160 352 -V
FLAG 192 448 -V
TEXT 408 472 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1639.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Supply Rail Current Sense
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1639.asy)
R4 N003 N002 200
R2 +V N002 .2
I1 N002 0 SINE(1 1 1K)
R1 OUT 0 2K
Q1 N001 N004 OUT 0 2N3904
XU1 N001 N003 +V 0 N004 LT1638 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
R3 N001 +V 200
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -80 80 -80 64
WIRE -32 80 -80 80
WIRE 64 80 48 80
WIRE 288 80 64 80
WIRE -80 112 -80 80
WIRE -288 160 -288 144
WIRE 288 176 288 80
WIRE 128 192 128 176
WIRE -80 208 -80 192
WIRE -32 208 -80 208
WIRE 96 208 48 208
WIRE 224 224 160 224
WIRE -80 240 -80 208
WIRE 64 240 64 80
WIRE 96 240 64 240
WIRE -288 256 -288 240
WIRE 128 272 128 256
WIRE 288 288 288 272
WIRE 368 288 288 288
WIRE 288 304 288 288
WIRE -80 352 -80 320
WIRE 288 400 288 384
SYMBOL current -80 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value SINE(1 1 1K)
SYMBOL res 64 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 200
SYMBOL res -96 96 R0
SYMATTR InstName R2
SYMATTR Value .2
SYMBOL res 64 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 200
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL opamps\\LT1639 128 160 R0
SYMATTR InstName U1
SYMBOL npn 224 176 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 272 288 R0
SYMATTR InstName R1
SYMATTR Value 2K
FLAG -288 256 0
FLAG 128 176 +V
FLAG -288 144 +V
FLAG 128 272 0
FLAG 288 400 0
FLAG -80 64 +V
FLAG -80 352 0
FLAG 368 288 OUT
TEXT 376 368 Left 2 !.tran 3m
TEXT 128 -16 Bottom 2 ;Positive Supply Rail Current Sense
* Z:\home\khalils\Downloads\files\data\raw_asc\20600b2f3629_Fan.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 12V D
V2 VCC 0 5V
V1 12V 0 12V
R2 N002 0 10K
R3 N003 DO_X 2K
V3 DO_X 0 PULSE(3.3V 0V 0.1 0 0 0.1 0.2 1)
Q1 N002 N003 0 0 BC817-40
R1 12V N002 4.7K
M1 N001 N002 0 0 Si4862DY
R_Load 12V N001 50
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0.3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1984 864
WIRE 1552 -656 1552 -688
WIRE 1552 -656 1488 -656
WIRE 1552 -608 1552 -656
WIRE 1488 -592 1488 -656
WIRE 1056 -496 1056 -592
WIRE 1488 -496 1488 -528
WIRE 1552 -496 1552 -528
WIRE 1552 -496 1488 -496
WIRE 1552 -464 1552 -496
WIRE 1056 -384 1056 -416
WIRE 1392 -384 1056 -384
WIRE 1504 -384 1392 -384
WIRE 1056 -352 1056 -384
WIRE 1552 -304 1552 -368
WIRE 1056 -224 1056 -272
WIRE 1392 -144 1392 -384
WIRE -48 -112 -48 -128
WIRE 432 -112 432 -128
WIRE 432 -96 432 -112
WIRE 1184 -96 432 -96
WIRE 1328 -96 1264 -96
WIRE -48 -48 -48 -112
WIRE 432 -48 432 -96
WIRE -48 64 -48 32
WIRE 432 64 432 32
WIRE 1392 96 1392 -48
WIRE -48 272 -48 240
WIRE -48 400 -48 352
SYMBOL voltage -48 -64 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 12V
SYMATTR InstName V1
SYMBOL res 1040 -368 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 432 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(3.3V 0V 0.1 0 0 0.1 0.2 1)
SYMBOL diode 1504 -528 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL res 1280 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2K
SYMBOL nmos 1504 -464 R0
SYMATTR InstName M1
SYMATTR Value Si4862DY
SYMBOL voltage -48 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5V
SYMBOL res 1536 -624 R0
SYMATTR InstName R_Load
SYMATTR Value 50
SYMBOL res 1040 -512 R0
SYMATTR InstName R1
SYMATTR Value 4.7K
SYMBOL npn 1328 -144 R0
SYMATTR InstName Q1
SYMATTR Value BC817-40
FLAG -48 240 VCC
FLAG -48 400 0
FLAG -48 64 0
FLAG -48 -112 12V
FLAG 432 64 0
FLAG 432 -112 DO_X
FLAG 1056 -224 0
FLAG 1392 96 0
FLAG 1552 -304 0
FLAG 1552 -688 12V
FLAG 1056 -592 12V
TEXT -80 424 Left 2 !.tran 0.3
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1706-63.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1706-63.asy)
V6 N006 0 PULSE(0 2.4 0 1n 1n 4m 8m)
V5 N005 0 PULSE(0 2.4 0 1n 1n 2m 4m)
V1 N001 0 3.3
C1 OUT 0 .1
V2 N007 0 .6
XU1 N005 N006 N001 0 N004 OUT N002 N003 N008 LTC1706-63 ;pnba VID2)VID3)Vcc)GND)FB)Sense)VID0)VID1)VID4
V7 N008 0 PULSE(0 2.4 0 1n 1n 8m 16m)
V3 N002 0 PULSE(0 2.4 0 1n 1n .5m 1m)
V4 N003 0 PULSE(0 2.4 0 1n 1n 1m 2m)
G1 0 OUT N007 N004 1
.tran 16m
.lib LTC1706-63.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2536 1332
WIRE 944 720 864 720
WIRE 1328 720 944 720
WIRE 864 736 864 720
WIRE 1168 784 1008 784
WIRE 1008 800 1008 784
WIRE 864 816 864 800
WIRE 1168 816 1168 784
WIRE 1328 816 1328 720
WIRE 1856 880 1392 880
WIRE 1008 896 1008 880
WIRE 1856 896 1856 880
WIRE 1744 928 1392 928
WIRE 1744 960 1744 928
WIRE 1104 976 992 976
WIRE 1632 976 1392 976
WIRE 944 992 944 720
WIRE 1856 992 1856 976
WIRE 992 1008 992 976
WIRE 1632 1008 1632 976
WIRE 1536 1024 1392 1024
WIRE 1536 1056 1536 1024
WIRE 1744 1056 1744 1040
WIRE 992 1072 992 1056
WIRE 1440 1072 1392 1072
WIRE 1632 1104 1632 1088
WIRE 1440 1120 1440 1072
WIRE 1248 1136 1248 1120
WIRE 1536 1152 1536 1136
WIRE 944 1184 944 1072
WIRE 992 1184 992 1152
WIRE 1440 1216 1440 1200
SYMBOL PowerProducts\\LTC1706-63 1248 976 R0
SYMATTR InstName U1
SYMBOL cap 848 736 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage 1536 1040 R0
SYMATTR InstName V6
SYMATTR Value PULSE(0 2.4 0 1n 1n 4m 8m)
SYMBOL g2 944 976 M0
SYMATTR InstName G1
SYMATTR Value 1
SYMBOL voltage 1856 880 R0
SYMATTR InstName V3
SYMATTR Value PULSE(0 2.4 0 1n 1n .5m 1m)
SYMBOL voltage 1008 784 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage 1632 992 R0
SYMATTR InstName V5
SYMATTR Value PULSE(0 2.4 0 1n 1n 2m 4m)
SYMBOL voltage 1744 944 R0
SYMATTR InstName V4
SYMATTR Value PULSE(0 2.4 0 1n 1n 1m 2m)
SYMBOL voltage 992 1056 R0
SYMATTR InstName V2
SYMATTR Value .6
SYMBOL voltage 1440 1104 R0
SYMATTR InstName V7
SYMATTR Value PULSE(0 2.4 0 1n 1n 8m 16m)
FLAG 1008 896 0
FLAG 1248 1136 0
FLAG 992 1184 0
FLAG 944 1184 0
FLAG 1856 992 0
FLAG 1744 1056 0
FLAG 1632 1104 0
FLAG 1536 1152 0
FLAG 864 816 0
FLAG 864 720 OUT
FLAG 1440 1216 0
TEXT 1912 1184 Left 2 !.tran 16m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG821.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 1 input.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG821.asy)
XU1 +V N003 NC_01 N001 N002 NC_02 NC_03 0 ADG821 ;pnba VDD)IN1)IN2)S1)D1)S2)D2)GND
V1 +V 0 5
C1 N002 0 33p
VS N001 0 3
R1 N002 0 47
V2 N003 0 PULSE(0 2.4 0 10n 10n 980n 2u)
.tran 10u
.lib ADG821.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -432 -16 -464 -16
WIRE -256 -16 -352 -16
WIRE 0 -16 -32 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE 112 32 112 -16
WIRE -256 48 -432 48
WIRE -592 112 -592 64
WIRE -432 112 -432 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -592 272 -592 192
WIRE -432 272 -432 192
WIRE -144 336 -144 304
SYMBOL voltage -592 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 33p
SYMBOL voltage -432 96 R0
WINDOW 3 -261 238 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 2.4 0 10n 10n 980n 2u)
SYMATTR InstName V2
SYMBOL ADG821 -144 32 R0
SYMATTR InstName U1
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 47
SYMBOL voltage -336 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
FLAG -592 272 0
FLAG -592 64 +V
FLAG -464 -16 0
FLAG -144 -112 +V
FLAG -144 336 0
FLAG -432 272 0
FLAG 0 112 0
FLAG 112 112 0
TEXT 96 336 Left 2 !.tran 10u
TEXT -712 -200 Left 2 ;Note:\nSwitch shown for a logic 1 input.
* Z:\home\khalils\Downloads\files\data\raw_asc\1d27dde79883_ideal_oscillations.asc
* Generated by LTspice 26.0.1 for Windows.
* Oscillation Between Capacitor and Inductor
L1 N001 0 0.025H
C1 N001 0 1F
S1 N001 N003 N002 0 MYSW
V1 N003 0 10V
V2 N002 0 PULSE(0 1 10m 1n 1n 10m 20m 10)
.tran 0 25ms 15ms
.model MYSW SW(Ron=1 Roff=1Meg Vt=0.5)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 240 16 160 16
WIRE 160 48 160 16
WIRE 112 64 -48 64
WIRE -48 96 -48 64
WIRE 112 112 16 112
WIRE 240 112 240 16
WIRE 384 112 240 112
WIRE 384 128 384 112
WIRE 160 144 160 128
WIRE 240 144 240 112
WIRE 16 160 16 112
WIRE 240 224 240 208
WIRE 384 224 384 208
WIRE 384 224 240 224
WIRE 160 256 160 224
WIRE 240 256 240 224
WIRE 240 256 160 256
WIRE 16 272 16 240
WIRE 240 272 240 256
SYMBOL sw 160 32 R0
SYMATTR InstName S1
SYMATTR Value MYSW
SYMBOL voltage 16 144 R0
WINDOW 3 -151 197 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 1 10m 1n 1n 10m 20m 10)
SYMATTR InstName V2
SYMBOL ind 368 112 R0
SYMATTR InstName L1
SYMATTR Value 0.025H
SYMBOL voltage 160 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10V
SYMBOL cap 224 144 R0
SYMATTR InstName C1
SYMATTR Value 1uF
FLAG 240 272 0
FLAG -48 96 0
FLAG 16 272 0
TEXT -56 392 Left 2 !.tran 0 25ms 15ms
TEXT -200 368 Left 2 !.model MYSW SW(Ron=1 Roff=1Meg Vt=0.5)
TEXT -64 -72 Left 2 ;Oscillation Between Capacitor and Inductor
* Z:\home\khalils\Downloads\files\data\raw_asc\00d8b4000356_Howland.asc
* Generated by LTspice 26.0.1 for Windows.
* Iout = V(in)/1K
* This example schematic is supplied for informational/educational purposes only.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
XU2 N003 N001 +V -V N002 LT1001 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 +15
R4 N003 0 1K
R1 N002 N001 1K
Rload N003 0 {x}
R3 N002 N003 1K
V3 IN 0 SINE(0 1 1K)
R2 N001 IN 1K
V2 -V 0 -15
.tran 3m
.step param X list 1 10 100 1K
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 696
WIRE 32 160 -96 160
WIRE 144 160 112 160
WIRE 192 160 144 160
WIRE 304 160 272 160
WIRE -96 176 -96 160
WIRE 144 256 144 160
WIRE 160 256 144 256
WIRE -96 272 -96 256
WIRE 304 272 304 160
WIRE 304 272 224 272
WIRE 160 288 144 288
WIRE -304 336 -304 320
WIRE -176 336 -176 320
WIRE 16 368 -16 368
WIRE 144 368 144 288
WIRE 144 368 96 368
WIRE 192 368 144 368
WIRE 304 368 304 272
WIRE 304 368 272 368
WIRE 144 416 144 368
WIRE 544 416 144 416
WIRE 656 416 624 416
WIRE -304 432 -304 416
WIRE -176 432 -176 416
SYMBOL voltage -96 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL voltage -176 320 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 112 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL res 288 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL res 288 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 528 432 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rload
SYMATTR Value {x}
SYMBOL res 128 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL opamps\\LT1001 192 208 R0
SYMATTR InstName U2
SYMBOL voltage -304 320 R0
SYMATTR InstName V1
SYMATTR Value +15
FLAG -176 432 0
FLAG -304 432 0
FLAG 192 240 +V
FLAG -304 320 +V
FLAG -176 320 -V
FLAG 192 304 -V
FLAG -96 272 0
FLAG -96 160 IN
FLAG -16 368 0
FLAG 656 416 0
TEXT 344 472 Left 2 !.tran 3m
TEXT 344 504 Left 2 !.step param X list 1 10 100 1K
TEXT 400 416 Bottom 2 ;Iout = V(in)/1K
TEXT 128 528 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\143c00045872_laboE1_1.asc
* Generated by LTspice 26.0.1 for Windows.
;.tran .001
;.dc V_ID -.25 .25 .01
V_cm Vm 0 SINE({VCMdc} {VCMac} 0 0.5m) AC {VCMac} 0
Q2b N003 N003 VEE 0 2N3904
Vpola VCC 0 15
R2 VCC Vo1 1k
Q1a N001 Vp N002 0 2N3904
Vpolb 0 VEE 15
Q1b Vo1 Vm N002 0 2N3904
Q2a N002 N003 VEE 0 2N3904
R1 VCC N001 1k
Iref VCC N003 1m
V_id Vp Vm SINE(0 {VID} 10k 0.5m) AC {VID} 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.ac dec 101 1 10meg
.param VCMdc=0 VCMac=1 VID=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2404 1432
WIRE -400 16 -400 -80
WIRE 288 32 80 32
WIRE 512 32 288 32
WIRE 80 48 80 32
WIRE 512 48 512 32
WIRE -400 144 -400 96
WIRE -400 192 -400 144
WIRE 512 208 512 128
WIRE 80 320 80 128
WIRE 512 320 512 208
WIRE -400 368 -400 272
WIRE -32 368 -48 368
WIRE 16 368 -32 368
WIRE 608 368 576 368
WIRE -48 480 -48 368
WIRE 80 480 80 416
WIRE 288 480 80 480
WIRE 512 480 512 416
WIRE 512 480 288 480
WIRE 800 512 800 464
WIRE -48 608 -48 560
WIRE 32 608 -48 608
WIRE 608 608 608 368
WIRE 608 608 32 608
WIRE 800 656 800 592
WIRE 800 656 672 656
WIRE 32 672 32 608
WIRE 288 704 288 480
WIRE 800 704 800 656
WIRE 672 752 672 656
WIRE 672 752 352 752
WIRE 736 752 672 752
WIRE 32 816 32 752
WIRE 288 912 288 800
WIRE 800 912 800 800
LINE Normal -144 512 -208 512 2
LINE Normal -144 704 -208 704 2
LINE Normal -144 704 -144 704 2
LINE Normal -128 704 -144 688 2
LINE Normal -144 720 -128 704 2
LINE Normal -128 512 -144 496 2
LINE Normal -144 528 -128 512 2
SYMBOL voltage 32 656 R0
WINDOW 123 -445 62 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 -654 34 Left 2
SYMATTR Value2 AC {VCMac} 0
SYMATTR Value SINE({VCMdc} {VCMac} 0 0.5m)
SYMATTR InstName V_cm
SYMBOL current 800 512 R0
SYMATTR InstName Iref
SYMATTR Value 1m
SYMBOL voltage -400 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vpolb
SYMATTR Value 15
SYMBOL npn 576 320 M0
SYMATTR InstName Q1b
SYMATTR Value 2N3904
SYMBOL npn 16 320 R0
SYMATTR InstName Q1a
SYMATTR Value 2N3904
SYMBOL voltage -400 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vpola
SYMATTR Value 15
SYMBOL voltage -48 464 R0
WINDOW 123 -316 62 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 -466 32 Left 2
SYMATTR Value2 AC {VID} 0
SYMATTR Value SINE(0 {VID} 10k 0.5m)
SYMATTR InstName V_id
SYMBOL npn 352 704 M0
SYMATTR InstName Q2a
SYMATTR Value 2N3904
SYMBOL res 64 32 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL npn 736 704 R0
SYMATTR InstName Q2b
SYMATTR Value 2N3904
SYMBOL res 496 32 R0
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 288 32 VCC
FLAG -400 -80 VCC
FLAG -400 368 VEE
FLAG -400 144 0
FLAG 288 912 VEE
FLAG 512 208 Vo1
FLAG 800 464 VCC
FLAG 608 368 Vm
FLAG -32 368 Vp
FLAG 800 912 VEE
FLAG 32 816 0
TEXT -504 1000 Left 2 !.op
TEXT -504 1032 Left 2 !.ac dec 101 1 10meg
TEXT -504 968 Left 2 !;.tran .001
TEXT -624 928 Left 2 !.param VCMdc=0 VCMac=1 VID=0
TEXT -496 1072 Left 2 !;.dc V_ID -.25 .25 .01
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8642-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8642-1.asy)
R2 OUT N006 100K
R1 RT 0 17.8K
C6 N002 N001 150p
R4 N001 0 11K
C4 OUT 0 220 X2
L1 N005 OUT 0.56
V1 IN 0 12
R3 N006 0 100K
XU2 NC_01 N003 N004 IN NC_02 0 N002 N005 0 0 NC_03 0 IN IN RT SS N006 LT8642-1 ;pnba Bias)INTVcc)BST)Vin1)CLKOUT)GND1)Vc)SW)Sync/Mode)GND2)PG)GND)Vin2)EN/UV)Rt)TR/SS)FB
C3 N003 0 1
Rload OUT 0 12 m=100
C5 OUT N006 47p
C2 N004 N005 47n
C1 SS 0 1n
.tran 1m startup
.lib LT8642-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1848 740
WIRE 96 -80 0 -80
WIRE 256 -80 96 -80
WIRE 416 -80 256 -80
WIRE 0 -64 0 -80
WIRE 256 -64 256 -80
WIRE 96 0 96 -80
WIRE 112 0 96 0
WIRE 416 0 416 -80
WIRE 416 0 400 0
WIRE 0 32 0 16
WIRE 112 80 96 80
WIRE 416 80 400 80
WIRE -96 160 -112 160
WIRE 0 160 -16 160
WIRE 112 160 64 160
WIRE 32 240 16 240
WIRE 112 240 96 240
WIRE 112 320 96 320
WIRE 432 320 400 320
WIRE -16 400 -32 400
WIRE 80 400 64 400
WIRE 112 400 80 400
WIRE 432 400 432 384
WIRE 432 400 400 400
WIRE 480 400 432 400
WIRE 576 400 560 400
WIRE 688 400 576 400
WIRE 784 400 688 400
WIRE 880 400 784 400
WIRE 688 416 688 400
WIRE 784 416 784 400
WIRE 880 416 880 400
WIRE 0 480 -32 480
WIRE 80 480 64 480
WIRE 112 480 80 480
WIRE 576 480 400 480
WIRE 688 480 688 464
WIRE 688 480 576 480
WIRE 576 496 576 480
WIRE 784 512 784 480
WIRE 880 512 880 496
WIRE 304 560 304 544
WIRE 576 592 576 576
SYMBOL res 864 400 R0
WINDOW 123 36 100 Left 2
SYMATTR InstName Rload
SYMATTR Value 12
SYMATTR Value2 m=100
SYMBOL cap 416 320 R0
WINDOW 0 32 17 Left 2
WINDOW 3 32 47 Left 2
SYMATTR InstName C2
SYMATTR Value 47n
SYMBOL cap 64 496 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL cap 96 256 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 560 384 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL LT8642-1 256 240 R0
SYMATTR InstName U2
SYMBOL res 0 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 11K
SYMBOL cap 768 416 R0
WINDOW 0 40 17 Left 2
WINDOW 123 24 80 Left 2
SYMATTR InstName C4
SYMATTR Value2 X2
SYMATTR Value 220
SYMBOL res 560 480 R0
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 64 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C6
SYMATTR Value 150p
SYMBOL cap 672 400 R0
WINDOW 0 32 17 Left 2
SYMATTR InstName C5
SYMATTR Value 47p
SYMBOL res 80 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 17.8K
SYMBOL ind 464 416 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 0.56
SYMBOL voltage 0 -80 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 304 560 0
FLAG -32 400 0
FLAG 0 32 0
FLAG 784 512 0
FLAG 576 592 0
FLAG 880 512 0
FLAG 880 400 OUT
FLAG 0 -80 IN
FLAG 96 80 0
FLAG 416 80 0
FLAG -32 480 0
FLAG -112 160 0
FLAG 16 240 0
FLAG 80 480 SS
FLAG 80 400 RT
FLAG 96 320 0
TEXT 176 616 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1c8eec9e4b08_p1.lossy.asc
* Generated by LTspice 26.0.1 for Windows.
O1 N001 0 N002 N004 BNC1
O2 N002 N004 N003 0 BNC1
V1 N001 0 PULSE(0 1 10n 0 0 1u 1u 1) Rser=50 Cpar=0
R1 N003 0 200
.tran 0 120ns 0 5ps
.model BNC1 LTRA(len=3.65 R=30m L=0.25u C=101p)
.model BNC2 LTRA(len=5.49 R=30m L=0.25u C=101p)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1192 680
WIRE 208 224 32 224
WIRE 352 224 304 224
WIRE 576 224 448 224
WIRE 208 256 96 256
WIRE 352 256 304 256
WIRE 544 256 448 256
WIRE 576 256 576 224
WIRE 32 304 32 224
WIRE 96 384 96 256
WIRE 96 384 32 384
WIRE 544 384 544 256
WIRE 576 384 576 336
WIRE 576 384 544 384
WIRE 32 400 32 384
WIRE 576 400 576 384
SYMBOL Res 560 240 R0
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL ltline 256 240 R0
SYMATTR InstName O1
SYMATTR Value BNC1
SYMBOL ltline 400 240 R0
SYMATTR InstName O2
SYMATTR Value BNC1
SYMBOL Voltage 32 288 R0
WINDOW 39 24 118 Left 2
SYMATTR SpiceLine Rser=50 Cpar=0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 10n 0 0 1u 1u 1)
FLAG 32 400 0
FLAG 576 400 0
TEXT 48 432 Left 2 !.tran 0 120ns 0 5ps
TEXT 176 72 Left 2 !.model BNC1 LTRA(len=3.65 R=30m L=0.25u C=101p)
TEXT 176 104 Left 2 !.model BNC2 LTRA(len=5.49 R=30m L=0.25u C=101p)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC660.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC660.asy)
XU1 NC_01 N001 0 N004 OUT N003 N002 IN LTC660 ;pnba Boost)Cap+)GND)Cap-)Vout)LV)OSC)Vin
Rload OUT 0 43.7
V1 IN 0 5
C2 OUT 0 150
C1 N001 N004 150
.tran 10m startup
.lib LTC660.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3516 2244
WIRE 3312 1904 3200 1904
WIRE 3312 1920 3312 1904
WIRE 2944 1968 2832 1968
WIRE 3216 1968 3200 1968
WIRE 2832 2000 2832 1968
WIRE 3312 2016 3312 2000
WIRE 2944 2032 2928 2032
WIRE 3216 2032 3200 2032
WIRE 2832 2096 2832 2064
WIRE 2944 2096 2832 2096
WIRE 3248 2096 3200 2096
WIRE 3360 2096 3248 2096
WIRE 3248 2112 3248 2096
WIRE 3360 2112 3360 2096
WIRE 3248 2208 3248 2176
WIRE 3360 2208 3360 2192
SYMBOL PowerProducts\\LTC660 3072 2000 R0
SYMATTR InstName U1
SYMBOL voltage 3312 1904 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2816 2000 R0
SYMATTR InstName C1
SYMATTR Value 150
SYMBOL cap 3232 2112 R0
SYMATTR InstName C2
SYMATTR Value 150
SYMBOL res 3344 2096 R0
SYMATTR InstName Rload
SYMATTR Value 43.7
FLAG 2928 2032 0
FLAG 3312 2016 0
FLAG 3248 2208 0
FLAG 3360 2208 0
FLAG 3360 2096 OUT
FLAG 3312 1904 IN
TEXT 2952 2216 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\13187c68b54b_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 N002 0 0 2N2369
V2 N002 0 0
V1 N001 0 5
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V2 0.7 0.85 0.0001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 680
WIRE 576 96 336 96
WIRE 272 144 128 144
WIRE 128 176 128 144
WIRE 368 192 336 192
WIRE 368 224 368 192
SYMBOL voltage 576 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL npn 272 96 R0
SYMATTR InstName Q1
SYMATTR Value 2N2369
SYMBOL voltage 128 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
FLAG 576 176 0
FLAG 368 224 0
FLAG 128 256 0
TEXT 696 -8 Left 2 !.dc V2 0.7 0.85 0.0001