* Z:\home\khalils\Downloads\files\data\raw_asc\1164400e0879_1ghzdifferential_pair3.asc
* Generated by LTspice 26.0.1 for Windows.
M1 vout1 vin1 N001 0 NMOS l=0.36u w=10u m=2
C1 vout1 0 0.3p
M2 vout1 vb vdd vdd PMOS l=0.36u w=10u m=4
M3 vout2 vin2 N001 0 NMOS l=0.36u w=10u m=2
C2 vout2 0 0.3p
M4 vout2 vb vdd vdd PMOS l=0.36u w=10u m=4
vgs1 N002 0 1.15
vin1 vin1 N002 SINE(0 50m 100meg) AC 1
vin2 N002 vin2 SINE(0 50m 100meg) AC 1
vdd1 vdd 0 1.8
V1 vb 0 1.11
M6 N003 N003 0 0 NMOS l=0.36u w=10u
M7 N003 N003 vdd vdd PMOS l=0.36u w=2u
M5 N001 N003 0 0 NMOS l=0.36u w=10u m=5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include tsmc180.txt
.op
.tran 100n
;.ac dec 10 10k 3Gig
;.tf V(vout1,vout2) (vin1,vin2)
* DIFFERENTIAL PAIR \nSPECIFICATION: GBW=1GHz \nGAIN=10 AT 100MHz
* 1.15=0.65+0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1516 1108
WIRE -48 160 -48 96
WIRE 64 160 64 80
WIRE 576 256 480 256
WIRE 736 256 736 240
WIRE 736 256 576 256
WIRE 896 256 736 256
WIRE 992 256 896 256
WIRE 576 272 576 256
WIRE 896 272 896 256
WIRE 672 288 624 288
WIRE 848 288 800 288
WIRE -128 304 -128 96
WIRE -48 304 -48 240
WIRE 64 304 64 240
WIRE 480 320 480 256
WIRE 576 320 480 320
WIRE 992 320 992 256
WIRE 992 320 896 320
WIRE 320 448 272 448
WIRE 576 448 576 368
WIRE 576 448 320 448
WIRE 896 448 896 368
WIRE 1152 448 896 448
WIRE 1200 448 1152 448
WIRE 576 464 576 448
WIRE 896 464 896 448
WIRE 320 512 320 448
WIRE 576 512 464 512
WIRE 1008 512 896 512
WIRE 1152 512 1152 448
WIRE -160 528 -160 464
WIRE 48 528 48 464
WIRE 320 528 320 512
WIRE 1152 528 1152 512
WIRE 320 576 320 560
WIRE 1152 576 1152 560
WIRE 320 624 320 576
WIRE 1152 624 1152 576
WIRE 576 640 576 560
WIRE 704 640 576 640
WIRE 896 640 896 560
WIRE 896 640 704 640
WIRE -160 672 -160 608
WIRE -64 672 -160 672
WIRE 48 672 48 608
WIRE 48 672 -64 672
WIRE -64 704 -64 672
WIRE 480 784 480 752
WIRE 512 784 480 784
WIRE 432 800 400 800
WIRE 512 832 512 784
WIRE 512 832 480 832
WIRE -64 848 -64 784
WIRE 400 896 400 800
WIRE 480 896 480 880
WIRE 480 896 400 896
WIRE 480 928 480 896
WIRE 560 928 480 928
WIRE 480 944 480 928
WIRE 704 944 704 640
WIRE 480 992 432 992
WIRE 768 992 704 992
WIRE 560 1024 560 928
WIRE 560 1024 528 1024
WIRE 656 1024 560 1024
WIRE 432 1040 432 992
WIRE 480 1040 432 1040
WIRE 704 1072 704 1040
WIRE 768 1072 768 992
WIRE 768 1072 704 1072
WIRE 480 1088 480 1040
WIRE 704 1088 704 1072
FLAG 464 512 vss
FLAG 848 544 vin2
IOPIN 848 544 In
FLAG 272 448 vout1
IOPIN 272 448 Out
FLAG 320 624 0
FLAG 736 240 vdd
FLAG 672 288 vb
FLAG 1008 512 vss
FLAG 624 544 vin1
IOPIN 624 544 In
FLAG 1200 448 vout2
IOPIN 1200 448 Out
FLAG 1152 624 0
FLAG 800 288 vb
FLAG -64 848 0
FLAG -48 304 0
FLAG -128 304 0
FLAG -128 96 vss
FLAG -48 96 vdd
FLAG 64 304 0
FLAG 64 80 vb
FLAG -160 464 vin1
IOPIN -160 464 In
FLAG 48 464 vin2
IOPIN 48 464 In
FLAG 704 1088 0
FLAG 480 1088 0
FLAG 480 752 vdd
DATAFLAG 704 672 ""
DATAFLAG 704 672 ""
DATAFLAG 320 448 ""
DATAFLAG 1152 448 ""
DATAFLAG 480 928 ""
DATAFLAG 480 928 ""
SYMBOL nmos4 624 464 M0
WINDOW 123 60 126 Left 2
SYMATTR Value2 l=0.36u w=10u m=2
SYMATTR InstName M1
SYMBOL cap 304 512 R0
SYMATTR InstName C1
SYMATTR Value 0.3p
SYMBOL pmos4 624 368 R180
WINDOW 123 120 23 Left 2
SYMATTR Value2 l=0.36u w=10u m=4
SYMATTR InstName M2
SYMBOL nmos4 848 464 R0
WINDOW 123 52 138 Left 2
SYMATTR Value2 l=0.36u w=10u m=2
SYMATTR InstName M3
SYMBOL cap 1168 512 M0
SYMATTR InstName C2
SYMATTR Value 0.3p
SYMBOL pmos4 848 368 M180
WINDOW 123 120 23 Left 2
SYMATTR Value2 l=0.36u w=10u m=4
SYMATTR InstName M4
SYMBOL voltage -64 688 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vgs1
SYMATTR Value 1.15
SYMBOL voltage -160 512 R0
WINDOW 3 -48 -25 VRight 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 50m 100meg)
SYMATTR Value2 AC 1
SYMATTR InstName vin1
SYMBOL voltage 48 624 R180
WINDOW 0 24 96 Left 2
WINDOW 3 -53 -138 VRight 2
WINDOW 123 24 -12 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName vin2
SYMATTR Value SINE(0 50m 100meg)
SYMATTR Value2 AC 1
SYMBOL voltage -48 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vdd1
SYMATTR Value 1.8
SYMBOL voltage 64 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.11
SYMBOL nmos4 528 944 M0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=0.36u w=10u
SYMATTR InstName M6
SYMBOL pmos4 432 880 M180
WINDOW 123 59 6 Left 2
SYMATTR Value2 l=0.36u w=2u
SYMATTR InstName M7
SYMBOL nmos4 656 944 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=0.36u w=10u m=5
SYMATTR InstName M5
TEXT 296 56 Left 2 !.include tsmc180.txt
TEXT 304 0 Left 2 !.op
TEXT 296 80 Left 2 !.tran 100n
TEXT 304 112 Left 2 !;.ac dec 10 10k 3Gig
TEXT 304 32 Left 2 !;.tf V(vout1,vout2) (vin1,vin2)
TEXT 1160 24 Left 2 ;DIFFERENTIAL PAIR \nSPECIFICATION: GBW=1GHz  \nGAIN=10 AT 100MHz
TEXT -312 816 Left 2 ;1.15=0.65+0.5