Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\3afead9315c6_fig-02-07-06.asc
* Generated by LTspice 26.0.1 for Windows.
* RR = R1 = R2 = R3
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
XU1 0 N001 VCC VEE VOUT level2 Avol=10Meg GBW=100Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R3 N002 VOUT {RR}
R2 N001 N002 {RR}
VS2 0 VEE 5
C1 N002 0 {CC1}
R1 N002 VIN {RR}
VS1 VCC 0 5
V1 VIN 0 AC 1
C2 VOUT N001 {CC2}
.ac dec 1000 1 1meg
.param RR 1k
.param CF=1/(2*3.1415*F*RR)
.param Q 1
.param CC1 = 3*Q*CF
.param F 1k
.param CC2 = CF/(3*Q)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 -48 192 -64
WIRE 272 0 -48 0
WIRE -48 32 -48 0
WIRE 144 64 80 64
WIRE 272 64 272 0
WIRE 272 64 208 64
WIRE 192 128 192 -48
WIRE -192 144 -208 144
WIRE -160 144 -192 144
WIRE -48 144 -48 112
WIRE -48 144 -80 144
WIRE -16 144 -48 144
WIRE 80 144 80 64
WIRE 80 144 64 144
WIRE 160 144 80 144
WIRE 272 160 272 64
WIRE 272 160 224 160
WIRE 304 160 272 160
WIRE 160 176 112 176
WIRE -208 192 -208 144
WIRE -48 208 -48 144
WIRE 112 224 112 176
WIRE 192 256 192 192
WIRE 256 272 256 256
WIRE 320 272 320 256
WIRE 192 288 192 256
WIRE -48 304 -48 272
WIRE 256 320 256 272
WIRE 320 320 320 272
WIRE -208 336 -208 272
WIRE 256 416 256 400
WIRE 320 416 320 400
IOPIN 304 160 Out
SYMBOL cap -64 208 R0
WINDOW 0 32 11 Left 2
WINDOW 3 34 63 Left 2
SYMATTR InstName C1
SYMATTR Value {CC1}
SYMBOL res -64 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {RR}
SYMBOL Misc\\battery 256 416 R180
WINDOW 0 24 104 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS2
SYMATTR Value 5
SYMBOL cap 208 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 59 VTop 2
SYMATTR InstName C2
SYMATTR Value {CC2}
SYMBOL res 80 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {RR}
SYMBOL voltage -208 176 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL res -32 128 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value {RR}
SYMBOL Misc\\battery 320 304 R0
WINDOW 0 17 6 Left 2
WINDOW 3 17 95 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS1
SYMATTR Value 5
SYMBOL Opamps\\UniversalOpamp2 192 160 R0
SYMATTR InstName U1
SYMATTR Value2 Avol=10Meg GBW=100Meg Slew=10Meg
FLAG -48 304 0
FLAG -208 336 0
FLAG 304 160 VOUT
FLAG -192 144 VIN
FLAG 112 224 0
FLAG 256 416 0
FLAG 320 416 0
FLAG 256 272 VEE
FLAG 320 272 VCC
FLAG 192 -48 VCC
FLAG 192 256 VEE
TEXT -264 -40 Left 2 !.ac dec 1000 1 1meg
TEXT 0 384 Left 2 ;RR = R1 = R2 = R3
TEXT -224 384 Left 2 !.param RR 1k
TEXT -224 448 Left 2 !.param CF=1/(2*3.1415*F*RR)
TEXT -224 480 Left 2 !.param Q 1
TEXT -224 512 Left 2 !.param CC1 = 3*Q*CF
TEXT -224 416 Left 2 !.param F 1k
TEXT -224 544 Left 2 !.param CC2 = CF/(3*Q)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3523-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3523-2.asy)
C2 OUT2 0 10
XU1 N004 IN NC_01 OUT1 N001 0 0 N002 IN NC_02 NC_03 N003 IN 0 IN IN LTC3523-2 ;pnba FB1)Vin1)Pgood1)Vout)SW1)GND1)GND2)SW2)Vin2)Mode)Pgood2)FB2)_SHDN2)GND3)Vbat)_SHDN1
Rload2 OUT2 0 6
R3 OUT2 N003 511K
L2 N002 OUT2 4.7
Rload1 OUT1 0 16.5
R2 N004 0 365K
C3 OUT2 N003 10p
V1 IN 0 2
R1 OUT1 N004 634K
L1 IN N001 4.7
R4 N003 0 511K
C1 OUT1 0 10
.tran .6m startup
.lib LTC3523-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 904 680
WIRE 16 -64 -64 -64
WIRE 160 -64 16 -64
WIRE 240 -64 160 -64
WIRE 320 -64 240 -64
WIRE 400 -64 320 -64
WIRE -64 -48 -64 -64
WIRE 160 -48 160 -64
WIRE 240 -48 240 -64
WIRE 320 -48 320 -64
WIRE 16 16 16 -64
WIRE 96 16 16 16
WIRE 400 16 400 -64
WIRE 400 16 384 16
WIRE 16 32 16 16
WIRE -64 48 -64 32
WIRE 16 128 16 112
WIRE 96 128 16 128
WIRE 400 128 384 128
WIRE 512 128 480 128
WIRE 576 128 512 128
WIRE 672 128 576 128
WIRE 752 128 672 128
WIRE 576 144 576 128
WIRE 672 144 672 128
WIRE 752 144 752 128
WIRE 512 160 512 128
WIRE -96 240 -240 240
WIRE 0 240 -96 240
WIRE 96 240 0 240
WIRE 512 240 512 224
WIRE 512 240 384 240
WIRE 576 240 576 224
WIRE 576 240 512 240
WIRE 672 240 672 208
WIRE 752 240 752 224
WIRE -240 256 -240 240
WIRE -96 256 -96 240
WIRE 0 256 0 240
WIRE 576 256 576 240
WIRE -240 352 -240 336
WIRE -96 352 -96 320
WIRE 0 352 0 336
WIRE 96 352 0 352
WIRE 576 352 576 336
WIRE 0 368 0 352
WIRE 0 464 0 448
WIRE 160 544 160 528
WIRE 240 544 240 528
WIRE 320 544 320 528
SYMBOL ind 384 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 4.7
SYMBOL res 736 128 R0
SYMATTR InstName Rload2
SYMATTR Value 6
SYMBOL res -16 240 R0
SYMATTR InstName R1
SYMATTR Value 634K
SYMBOL voltage -64 -64 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL ind 0 16 R0
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL PowerProducts\\LTC3523-2 240 240 R0
SYMATTR InstName U1
SYMBOL cap 496 160 R0
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL res 560 128 R0
SYMATTR InstName R3
SYMATTR Value 511K
SYMBOL cap 656 144 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res -256 240 R0
SYMATTR InstName Rload1
SYMATTR Value 16.5
SYMBOL res 560 240 R0
SYMATTR InstName R4
SYMATTR Value 511K
SYMBOL res -16 352 R0
SYMATTR InstName R2
SYMATTR Value 365K
SYMBOL cap -112 256 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 240 544 0
FLAG 160 544 0
FLAG 320 544 0
FLAG -64 48 0
FLAG 0 464 0
FLAG -96 352 0
FLAG -240 352 0
FLAG 576 352 0
FLAG 672 240 0
FLAG 752 240 0
FLAG -64 -64 IN
FLAG -240 240 OUT1
FLAG 752 128 OUT2
TEXT 520 464 Left 2 !.tran .6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\9a8fada80f92_Clase_B.asc
* Generated by LTspice 26.0.1 for Windows.
**********
*SRC=ARF463AB;ARF463AB;MOSFETs N;Enh;500V 9.0A 1.1ohms PPG Microsemi RF MOSFET
*SYM=POWMOSN
*09-14-09 Rev A GJK PPG Microsemi
* TERMINALS: D G S
*****
RS 29 3 2.25m
LD 10 11 2n
M1 1 2 3 3 DMOS L=1U W=1U
B1 G 0 V=V(p)*V(r)
V2 r 0 PWL(0 0 10e-3 8)
D2 5 2 DGD
LG 20 19 2.8n
RG 19 2 .5
R2 G 0 50
DSD 3 1 DSUB
XM1 N001 G 0 ARF463AB ;pnba D)G)S
RD 11 1 1.1
LS 30 29 2n
V3 p 0 PULSE(0 1 0 1p 1p 1.25e-05 250e-6)
D1 5 1 DGD
CGS 2 3 1200p
R1 VDD N001 4
VDD VDD 0 125
.tran 0 10e-3 0 1e-06
.SUBCKT ARF463AB 10 20 30
.MODEL DMOS NMOS(LEVEL=3 VMAX=1.04Meg THETA=100.0m ETA=2.00m VTO=3.00 KP=2.60)
.MODEL DSUB D (IS=1.27u N=1.50 RS=5.00m BV=500 CJO=799p VJ=0.800 M=0.420 TT=311n)
.MODEL DGD D (IS=100n N=1.5 RS=10m BV=500 CJO=81.7p M=.5 VJ=.700 TT=1n)
.ENDS
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -480 -784 -624 -784
WIRE -432 -784 -480 -784
WIRE -384 -784 -432 -784
WIRE -480 -736 -480 -784
WIRE -624 -720 -624 -784
WIRE -624 -624 -624 -640
WIRE -1408 -576 -1408 -592
WIRE -1152 -560 -1152 -592
WIRE -480 -560 -480 -656
WIRE -1408 -544 -1408 -576
WIRE -1152 -544 -1152 -560
WIRE -752 -480 -960 -480
WIRE -576 -480 -752 -480
WIRE -528 -480 -576 -480
WIRE -1408 -448 -1408 -464
WIRE -1152 -448 -1152 -464
WIRE -752 -432 -752 -480
WIRE -480 -400 -480 -464
WIRE -960 -384 -960 -480
WIRE -752 -320 -752 -352
WIRE -960 -272 -960 -304
SYMBOL res -768 -448 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL nmos -528 -560 R0
SYMATTR InstName M1
SYMATTR Value ARF463AB
SYMATTR Prefix X
SYMBOL voltage -1408 -560 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 10e-3 8)
SYMBOL voltage -1152 -560 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 0 1p 1p 1.25e-05 250e-6)
SYMBOL res -496 -752 R0
SYMATTR InstName R1
SYMATTR Value 4
SYMBOL bv -960 -400 R0
SYMATTR InstName B1
SYMATTR Value V=V(p)*V(r)
SYMBOL voltage -624 -736 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VDD
SYMATTR Value 125
FLAG -480 -400 0
FLAG -624 -624 0
FLAG -432 -784 VDD
FLAG -576 -480 G
FLAG -752 -320 0
FLAG -960 -272 0
FLAG -1408 -448 0
FLAG -1152 -448 0
FLAG -1152 -560 p
FLAG -1408 -576 r
TEXT -2144 -96 Left 2 !.tran 0 10e-3 0 1e-06
TEXT -2152 -752 Left 2 !**********\n*SRC=ARF463AB;ARF463AB;MOSFETs N;Enh;500V 9.0A 1.1ohms PPG Microsemi RF MOSFET\n*SYM=POWMOSN\n*09-14-09 Rev A GJK PPG Microsemi\n.SUBCKT ARF463AB   10 20 30\n*     TERMINALS:  D  G  S\nM1   1  2  3  3  DMOS L=1U W=1U\nLD  10  11  2n\nRD  11          1   1.1\nLG  20  19  2.8n\nRG  19  2   .5\nD1   5  1   DGD\nD2   5  2   DGD\nCGS  2  3   1200p\nDSD  3  1   DSUB\nRS  29  3   2.25m\nLS  30  29  2n\n.MODEL DMOS NMOS(LEVEL=3 VMAX=1.04Meg THETA=100.0m ETA=2.00m VTO=3.00 KP=2.60)\n.MODEL DSUB D (IS=1.27u N=1.50 RS=5.00m BV=500 CJO=799p VJ=0.800 M=0.420 TT=311n)\n.MODEL DGD  D (IS=100n N=1.5 RS=10m BV=500 CJO=81.7p M=.5 VJ=.700 TT=1n)\n.ENDS\n*****
* Z:\home\khalils\Downloads\files\data\raw_asc\4efd76086f8b_Fig23_4.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot VREF
R1 VDD VREF 1Meg TC1=0.002
VDD VDD 0 5
M6B VREF VREF 0 0 N_1u l=2u w=10u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.dc VDD 4 6
.step temp 0 100 25
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1784 680
WIRE 1376 -96 1376 -160
WIRE 1104 -32 1104 -64
WIRE 1104 -16 1104 -32
WIRE 1376 0 1376 -16
WIRE 1488 0 1376 0
WIRE 1376 16 1376 0
WIRE 1376 16 1312 16
WIRE 1376 32 1376 16
WIRE 1312 112 1312 16
WIRE 1328 112 1312 112
WIRE 1376 160 1376 128
SYMBOL nmos4 1328 32 R0
WINDOW 123 56 100 Left 0
WINDOW 0 69 31 Left 0
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M6B
SYMATTR Value N_1u
SYMBOL res 1360 -112 R0
SYMATTR InstName R1
SYMATTR Value 1MEG TC1=0.002
SYMBOL voltage 1104 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 5
FLAG 1104 64 0
FLAG 1104 -32 VDD
FLAG 1376 80 0
FLAG 1376 160 0
FLAG 1376 -160 VDD
FLAG 1488 0 VREF
TEXT 1016 136 Left 0 !.include cmosedu_models.txt
TEXT 1160 -152 Left 0 ;Plot VREF
TEXT 1016 112 Left 0 !.dc VDD 4 6
TEXT 1016 160 Left 0 !.step temp 0 100 25
* Z:\tmp\asc_dec_bjh7r6w2\178a91731078_PixiePico_LTSpice_AFFilter_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R2 Vaf 0 20K
R3 N003 Vaf 10000
M1 N002 N005 N006 N006 BS170_simple
C3 N003 0 10nF
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2644 1892
WIRE 992 -64 112 -64
WIRE 992 -16 992 -64
WIRE 112 80 112 -64
WIRE 992 96 992 64
WIRE 1232 96 992 96
WIRE 992 112 992 96
WIRE -96 128 -96 64
WIRE -64 192 -96 192
WIRE -32 192 -64 192
WIRE 112 192 112 160
WIRE 112 192 32 192
WIRE 208 192 112 192
WIRE 352 192 288 192
WIRE 416 192 352 192
WIRE 560 192 496 192
WIRE 800 192 720 192
WIRE 944 192 800 192
WIRE -96 240 -96 192
WIRE 112 240 112 192
WIRE 352 256 352 192
WIRE 800 256 800 192
WIRE -96 400 -96 320
WIRE 112 400 112 320
WIRE 352 400 352 320
WIRE 992 400 992 208
SYMBOL Res 96 224 R0
SYMATTR InstName R2
SYMATTR Value 20K
SYMBOL Res 304 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10000
SYMBOL nmos 944 112 R0
SYMATTR InstName M1
SYMATTR Value BS170_simple
SYMBOL cap 336 256 R0
SYMATTR InstName C3
SYMATTR Value 10nF
FLAG -96 400 0
FLAG 112 400 0
FLAG 352 400 0
FLAG -64 192 Vsig
FLAG 112 192 Vaf
FLAG -96 128 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7185-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7185-3.asy)
C4 N003 0 1
V1 IN 0 -3.5
C3 N001 0 1
C2 OUT 0 4.7 Rser=5m
R3 OUT 0 6
C1 N001 N002 10n
XU1 OUT OUT N001 N002 IN 0 N003 IN ADP7185-3 ;pnba Vout)Sense)VA)VAFB)EN)GND)Vreg)Vin
.tran 200m startup
.lib ADP7185-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 16 -48
WIRE 96 -48 32 -48
WIRE 112 -48 96 -48
WIRE 400 -48 368 -48
WIRE 432 -48 400 -48
WIRE 496 -48 432 -48
WIRE 512 -48 496 -48
WIRE 16 -32 16 -48
WIRE 432 -32 432 -48
WIRE 512 -32 512 -48
WIRE 400 16 400 -48
WIRE 400 16 368 16
WIRE 432 48 432 32
WIRE 16 64 16 48
WIRE 512 64 512 48
WIRE 96 80 96 -48
WIRE 112 80 96 80
WIRE 464 80 368 80
WIRE 384 144 368 144
WIRE 464 144 464 80
WIRE 464 144 448 144
WIRE 464 160 464 144
WIRE 176 224 176 208
WIRE 304 224 304 208
WIRE 464 240 464 224
WIRE 176 320 176 288
SYMBOL voltage 16 -48 R0
SYMATTR InstName V1
SYMATTR Value -3.5
SYMBOL cap 448 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=5m
SYMBOL cap 160 224 R0
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap 448 160 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL ADP7185-3 240 48 R0
SYMATTR InstName U1
SYMBOL res 496 -48 R0
SYMATTR InstName R3
SYMATTR Value 6
FLAG 16 64 0
FLAG 432 48 0
FLAG 304 224 0
FLAG 512 64 0
FLAG 32 -48 IN
FLAG 496 -48 OUT
FLAG 464 240 0
FLAG 176 320 0
TEXT 136 352 Left 2 !.tran 200m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3225.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:\n \n1. To emulate the supercapacitor charging process within acceptable \ntime interval, the capcitance is scaled down from its real value.\n \n2. Load capcitor initial condion can be given to mimic the specific \nresidual voltage at the beginning of the charging.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3225.asy)
C1 N001 N002 1
V1 IN 0 3.2
XU1 N001 N002 Cx IN NC_01 0 N003 0 IN OUT LTC3225 ;pnba C+)C-)Cx)_SHDN)Pgood)Vsel)Prog)GND)Vin)Cout
C3 Cx 0 .1m
R1 N003 0 12K
C2 OUT Cx .1m
.tran 1m startup
.ic V(cx)=2 V(out)=3.5
.lib LTC3225.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 704
WIRE 112 0 -16 0
WIRE 240 0 112 0
WIRE -16 16 -16 0
WIRE 240 16 240 0
WIRE 112 80 112 0
WIRE 128 80 112 80
WIRE 400 80 352 80
WIRE 400 96 400 80
WIRE -16 112 -16 96
WIRE 400 176 400 160
WIRE 400 176 352 176
WIRE 128 272 112 272
WIRE 400 272 352 272
WIRE 400 288 400 272
WIRE 32 368 16 368
WIRE 128 368 112 368
WIRE 400 368 400 352
WIRE 400 368 352 368
WIRE 400 384 400 368
WIRE 240 448 240 432
WIRE 400 464 400 448
SYMBOL voltage -16 0 R0
SYMATTR InstName V1
SYMATTR Value 3.2
SYMBOL res 128 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 12K
SYMBOL cap 384 96 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LTC3225 240 224 R0
SYMATTR InstName U1
SYMBOL cap 384 288 R0
WINDOW 3 28 51 Left 2
SYMATTR Value .1m
SYMATTR InstName C2
SYMBOL cap 384 384 R0
WINDOW 0 27 13 Left 2
WINDOW 3 25 55 Left 2
SYMATTR InstName C3
SYMATTR Value .1m
FLAG 240 448 0
FLAG -16 112 0
FLAG 400 464 0
FLAG 16 368 0
FLAG 112 272 0
FLAG -16 0 IN
FLAG 400 272 OUT
FLAG 400 368 Cx
TEXT 544 384 Left 2 !.tran 1m startup\n.ic V(cx)=2 V(out)=3.5
TEXT -112 464 Left 2 ;Notes:\n \n1. To emulate the supercapacitor charging process within acceptable \ntime interval, the capcitance is scaled down from its real value.\n \n2. Load capcitor initial condion can be given to mimic the specific \nresidual voltage at the beginning of the charging.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1037A.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain 1000 Amplifier with .01% Accuracy
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1037A.asy)
V2 -V 0 -15
V1 +V 0 15
V3 IN 0 SINE(0 1m 1)
R2 N001 0 365
XU1 IN N001 +V -V OUT LT1037 ;pnba In+)In-)V+)V-)OUT
R1 OUT N001 355K
.tran 3
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 160 96 128 96
WIRE 272 96 240 96
WIRE -272 176 -272 160
WIRE -144 176 -144 160
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 272 240 272 96
WIRE 272 240 224 240
WIRE 304 240 272 240
WIRE 160 256 0 256
WIRE -272 272 -272 256
WIRE -144 272 -144 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL voltage -144 160 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 355K
SYMBOL voltage -272 160 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL opamps\\LT1037A 192 176 R0
SYMATTR InstName U1
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1m 1)
FLAG -144 272 0
FLAG 192 192 +V
FLAG -144 160 +V
FLAG 192 288 -V
FLAG -272 272 0
FLAG -272 160 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 304 240 OUT
FLAG 0 256 IN
TEXT 232 352 Left 2 !.tran 3
TEXT 136 48 Bottom 2 ;Gain 1000 Amplifier with .01% Accuracy
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3013B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3013B.asy)
R3 N001 N003 1.6Meg
R1 OUT N002 750K
Rload OUT 0 100
C2 0 N004 1000p
V1 N001 0 PWL(0 0 1 10)
R2 N002 0 249K
XU1 MP_01 OUT MP_02 N002 0 N003 N004 MP_03 MP_04 N001 LT3013B ;pnba )OUT))ADJ)GND)PwrGD)Ct)))IN
C1 OUT 0 3.3
.tran 1
.lib LT3013.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 80 -208 80
WIRE 112 80 0 80
WIRE 576 80 400 80
WIRE 688 80 576 80
WIRE 784 80 688 80
WIRE 784 96 784 80
WIRE -208 112 -208 80
WIRE 688 112 688 80
WIRE 0 128 0 80
WIRE 576 160 400 160
WIRE 576 176 576 160
WIRE 688 192 688 176
WIRE 784 192 784 176
WIRE -208 224 -208 192
WIRE 0 240 0 208
WIRE 112 240 0 240
WIRE 416 240 400 240
WIRE 512 240 480 240
WIRE 576 272 576 256
WIRE 256 304 256 288
SYMBOL res 768 80 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL res -16 112 R0
SYMATTR InstName R3
SYMATTR Value 1.6Meg
SYMBOL PowerProducts\\LT3013B 256 160 R0
SYMATTR InstName U1
SYMBOL cap 480 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL res 560 160 R0
SYMATTR InstName R2
SYMATTR Value 249K
SYMBOL cap 672 112 R0
SYMATTR InstName C1
SYMATTR Value 3.3
SYMBOL voltage -208 96 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 560 64 R0
SYMATTR InstName R1
SYMATTR Value 750K
FLAG 256 304 0
FLAG -208 224 0
FLAG 784 192 0
FLAG 688 192 0
FLAG 576 272 0
FLAG 784 80 OUT
FLAG 512 240 0
TEXT 728 264 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP123.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP123.asy)
XU1 OUT N001 0 IN MP_01 IN ADP123 ;pnba Vout)Adj)GND)En))Vin
R1 OUT N001 460k
C1 IN 0 1
C2 OUT 0 1
Rload OUT 0 100
V1 IN 0 5.5
R2 N001 0 100k
.tran 10m startup
.lib ADP123.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 384 96 352 96
WIRE 496 96 384 96
WIRE 576 96 496 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 384 112 384 96
WIRE 496 112 496 96
WIRE 576 112 576 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 384 208 384 192
WIRE 384 208 352 208
WIRE 496 208 496 176
WIRE 576 208 576 192
WIRE 384 224 384 208
WIRE 256 272 256 256
WIRE 384 320 384 304
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 560 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL ADP123 256 208 R0
SYMATTR InstName U1
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL res 368 208 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL cap 480 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 368 96 R0
SYMATTR InstName R1
SYMATTR Value 460k
FLAG 0 208 0
FLAG 256 272 0
FLAG 384 320 0
FLAG 496 208 0
FLAG 576 208 0
FLAG 576 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT -10 300 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\4c4cb4ea5daa_Lab4.asc
* Generated by LTspice 26.0.1 for Windows.
+ VTO = -0.8
+GAMMA = 0.4
+PHI = 0.8
+TOX = 9E-9
+NSUB = 5E14
+LD = 0.09E-6
+ UO = 100
+LAMBDA = 0.2
+CJ = 0.94E-3
+CJSW = 0.32E-11
+PB = 0.9
+MJ = 0.5
+ MJSW = 0.3
+CGDO = 0.3E-9
+JS = 0.5E-8
+ VTO = 0.7
+GAMMA = 0.45
+PHI = 0.9
+TOX = 9E-9
+NSUB = 9E14
+LD = 0.08E-6
+ UO = 350
+LAMBDA = 0.1
+CJ = 0.56E-3
+CJSW = 0.35E-11
+PB = 0.9
+MJ = 0.0.45
+ MJSW = 0.2
+CGDO = 0.4E-9
+JS = 1.0E-8
M4 Vout2 v_in 0 0 NMOS l=2u w=20u
v_in v_in 0 1
M1 VDD VDD Vout 0 NMOS l=2u w=2u
VDD VDD 0 3
R1 VDD Vout2 1000
M2 Vout v_in 0 0 NMOS l=2u w=20u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.MODEL PMOS PMOS LEVEL = 1
.MODEL NMOS NMOS LEVEL = 1
.dc v_in 0.8 4 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1512 688
WIRE -416 128 -464 128
WIRE -368 128 -416 128
WIRE 384 144 336 144
WIRE 432 144 384 144
WIRE -368 208 -368 128
WIRE 432 208 432 144
WIRE 528 256 432 256
WIRE 336 288 336 144
WIRE 384 288 336 288
WIRE -368 352 -368 288
WIRE -304 352 -368 352
WIRE 432 368 432 304
WIRE 496 368 432 368
WIRE -128 384 -128 368
WIRE 32 384 32 368
WIRE -368 416 -368 352
WIRE 432 432 432 368
WIRE -272 464 -368 464
WIRE 528 480 432 480
WIRE -416 496 -464 496
WIRE 384 512 336 512
WIRE -368 544 -368 512
WIRE 432 560 432 528
SYMBOL Voltage 32 368 R0
SYMATTR InstName VDD
SYMATTR Value 3
SYMBOL Voltage -128 368 R0
SYMATTR InstName v_in
SYMATTR Value 1
SYMBOL Res -384 192 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL nmos4 -416 416 R0
SYMATTR InstName M4
SYMATTR Value2 l=2u w=20u
SYMBOL nmos4 384 432 R0
SYMATTR InstName M2
SYMATTR Value2 l=2u w=20u
SYMBOL nmos4 384 208 R0
SYMATTR InstName M1
SYMATTR Value2 l=2u w=2u
FLAG 32 464 0
FLAG 32 368 VDD
FLAG 384 144 VDD
FLAG 432 560 0
FLAG -128 464 0
FLAG -128 368 v_in
FLAG 336 512 v_in
FLAG 528 256 0
FLAG 528 480 0
FLAG 496 368 Vout
FLAG -416 128 VDD
FLAG -368 544 0
FLAG -464 496 v_in
FLAG -272 464 0
FLAG -304 352 Vout2
TEXT 712 144 Left 2 !.MODEL PMOS PMOS LEVEL = 1\n+ VTO = -0.8\n+GAMMA = 0.4\n+PHI = 0.8\n+TOX = 9E-9\n+NSUB = 5E14\n+LD = 0.09E-6\n+ UO = 100\n+LAMBDA = 0.2\n+CJ = 0.94E-3\n+CJSW = 0.32E-11\n+PB = 0.9\n+MJ = 0.5\n+ MJSW = 0.3\n+CGDO = 0.3E-9\n+JS = 0.5E-8
TEXT 1168 144 Left 2 !.MODEL NMOS NMOS LEVEL = 1\n+ VTO = 0.7\n+GAMMA = 0.45\n+PHI = 0.9\n+TOX = 9E-9\n+NSUB = 9E14\n+LD = 0.08E-6\n+ UO = 350\n+LAMBDA = 0.1\n+CJ = 0.56E-3\n+CJSW = 0.35E-11\n+PB = 0.9\n+MJ = 0.0.45\n+ MJSW = 0.2\n+CGDO = 0.4E-9\n+JS = 1.0E-8
TEXT 224 672 Left 2 !.dc v_in 0.8 4 0.01
* Z:\tmp\asc_dec_bjh7r6w2\070be14aa3cc_Pierce_new1_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R3 G 0 1m
C2 N002 0 62p
C3 N002 N001 .012p V=20 Irms=200m Rser=100 Lser=529m Cpar=4p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1372 904
WIRE 16 -192 -32 -192
WIRE -32 -160 -32 -192
WIRE -32 -48 -32 -80
WIRE 16 -48 -32 -48
WIRE 160 -48 144 -48
WIRE -32 -32 -32 -48
WIRE 208 48 208 32
WIRE 320 48 208 48
WIRE 368 48 320 48
WIRE -32 64 -32 48
WIRE 144 64 144 -48
WIRE 144 64 80 64
WIRE 208 64 208 48
WIRE 320 112 320 48
WIRE 144 144 144 64
WIRE 160 144 144 144
WIRE 208 176 208 160
WIRE 80 240 80 64
WIRE 144 240 80 240
WIRE 160 240 144 240
WIRE 256 240 224 240
WIRE 320 240 320 192
WIRE 320 240 256 240
WIRE 80 256 80 240
WIRE 320 256 320 240
WIRE 144 320 144 240
WIRE 160 320 144 320
WIRE 256 320 256 240
WIRE 256 320 240 320
WIRE 320 352 320 320
WIRE 80 368 80 320
SYMBOL res -48 -48 R0
SYMATTR InstName R3
SYMATTR Value 1m
SYMBOL cap 304 256 R0
SYMATTR InstName C2
SYMATTR Value 62p
SYMBOL Misc\\xtal 224 224 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C3
SYMATTR Value .012p
SYMATTR SpiceLine V=20 Irms=200m Rser=100 Lser=529m Cpar=4p
FLAG 320 352 0
FLAG -32 64 0
FLAG 16 -192 VCC
FLAG 368 48 Out
FLAG 80 368 0
FLAG 208 176 0
FLAG 16 -48 G