Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3523.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3523.asy)
R4 N003 0 511K
L2 N002 OUT2 4.7
Rload1 OUT1 0 16.5
C2 OUT2 0 10
R3 OUT2 N003 511K
V1 IN 0 2
L1 IN N001 4.7
R1 OUT1 N004 634K
R2 N004 0 365K
C1 OUT1 0 10
XU1 N004 IN NC_01 OUT1 N001 0 0 N002 IN NC_02 NC_03 N003 IN 0 IN IN LTC3523 ;pnba FB1)Vin1)Pgood1)Vout)SW1)GND1)GND2)SW2)Vin2)Mode)Pgood2)FB2)_SHDN2)GND3)Vbat)_SHDN1
C3 OUT2 N003 10p
Rload2 OUT2 0 6
.tran .6m startup
.lib LTC3523.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 904 680
WIRE 0 -64 -96 -64
WIRE 160 -64 0 -64
WIRE 240 -64 160 -64
WIRE 320 -64 240 -64
WIRE 400 -64 320 -64
WIRE -96 -48 -96 -64
WIRE 160 -48 160 -64
WIRE 240 -48 240 -64
WIRE 320 -48 320 -64
WIRE 0 16 0 -64
WIRE 96 16 0 16
WIRE 400 16 400 -64
WIRE 400 16 384 16
WIRE 0 32 0 16
WIRE -96 48 -96 32
WIRE 0 128 0 112
WIRE 96 128 0 128
WIRE 400 128 384 128
WIRE 512 128 480 128
WIRE 576 128 512 128
WIRE 672 128 576 128
WIRE 752 128 672 128
WIRE 576 144 576 128
WIRE 672 144 672 128
WIRE 752 144 752 128
WIRE 512 160 512 128
WIRE -80 240 -224 240
WIRE 0 240 -80 240
WIRE 96 240 0 240
WIRE 512 240 512 224
WIRE 512 240 384 240
WIRE 576 240 576 224
WIRE 576 240 512 240
WIRE 672 240 672 208
WIRE 752 240 752 224
WIRE -224 256 -224 240
WIRE -80 256 -80 240
WIRE 0 256 0 240
WIRE 576 256 576 240
WIRE -224 352 -224 336
WIRE -80 352 -80 320
WIRE 0 352 0 336
WIRE 96 352 0 352
WIRE 576 352 576 336
WIRE 0 368 0 352
WIRE 0 464 0 448
WIRE 160 544 160 528
WIRE 240 544 240 528
WIRE 320 544 320 528
SYMBOL cap -96 256 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res -240 240 R0
SYMATTR InstName Rload1
SYMATTR Value 16.5
SYMBOL res -16 240 R0
SYMATTR InstName R1
SYMATTR Value 634K
SYMBOL PowerProducts\\LTC3523 240 240 R0
SYMATTR InstName U1
SYMBOL cap 656 144 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res 736 128 R0
SYMATTR InstName Rload2
SYMATTR Value 6
SYMBOL ind 384 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 4.7
SYMBOL ind -16 16 R0
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL res 560 128 R0
SYMATTR InstName R3
SYMATTR Value 511K
SYMBOL res -16 352 R0
SYMATTR InstName R2
SYMATTR Value 365K
SYMBOL cap 496 160 R0
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL voltage -96 -64 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL res 560 240 R0
SYMATTR InstName R4
SYMATTR Value 511K
FLAG 240 544 0
FLAG 160 544 0
FLAG 320 544 0
FLAG -96 48 0
FLAG 0 464 0
FLAG -80 352 0
FLAG -224 352 0
FLAG 576 352 0
FLAG 672 240 0
FLAG 752 240 0
FLAG -96 -64 IN
FLAG -224 240 OUT1
FLAG 752 128 OUT2
TEXT 512 448 Left 2 !.tran .6m startup
* Z:\tmp\asc_dec_bjh7r6w2\11fc2f965d12_manual1_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
Viy N008 N009 0
rm2 N002 N003 .025k
C2 N003 N004 .5p
C1 N003 N006 10p
B3 N004 N003 I=I(V10)
Ey y 0 N005 N010 1
R3 N001 N003 100k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1236
WIRE 80 -96 -112 -96
WIRE 256 -96 80 -96
WIRE 480 -96 336 -96
WIRE -112 -80 -112 -96
WIRE 480 -80 480 -96
WIRE -112 32 -112 0
WIRE 352 32 -112 32
WIRE 480 32 480 0
WIRE 480 32 352 32
WIRE 352 64 352 32
WIRE 480 64 480 32
WIRE -112 128 -112 32
WIRE 64 128 -112 128
WIRE 64 160 64 128
WIRE -112 176 -112 128
WIRE 352 176 352 128
WIRE 480 176 480 144
WIRE 480 176 352 176
WIRE -240 288 -288 288
WIRE -112 288 -112 240
WIRE -112 288 -160 288
WIRE 64 288 64 240
WIRE 64 288 -112 288
WIRE 64 320 64 288
WIRE 64 464 64 400
WIRE 480 528 480 176
WIRE -288 608 -288 288
WIRE 64 608 64 544
WIRE 64 608 -64 608
WIRE 64 672 64 608
WIRE 64 816 64 752
WIRE -192 944 -224 944
WIRE -160 944 -192 944
WIRE -48 944 -80 944
WIRE -48 960 -48 944
WIRE -288 992 -288 608
WIRE -144 992 -288 992
WIRE 64 992 -96 992
WIRE -288 1056 -288 992
WIRE -288 1216 -288 1136
SYMBOL voltage 64 656 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 0
SYMATTR InstName Viy
SYMATTR Value 0
SYMBOL res 464 -96 R0
SYMATTR InstName rm2
SYMATTR Value .025k
SYMBOL cap 336 64 R0
SYMATTR InstName C2
SYMATTR Value .5p
SYMBOL cap -128 176 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL bi 480 144 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName B3
SYMATTR Value I=I(V10)
SYMBOL e -176 944 R270
SYMATTR InstName Ey
SYMATTR Value 1
SYMBOL res -128 -96 R0
SYMATTR InstName R3
SYMATTR Value 100k
FLAG -48 960 0
FLAG -192 944 y
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4657.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4657.asy)
R3 0 N004 60.4k
C1 N003 0 2n
R4 INTVcc N002 100k
R1 N001 IN 150k
C3 OUT 0 300
R5 OUT 0 0.125
C7 0 INTVcc 2.2F
XU1 IN N001 N003 NC_01 NC_02 NC_03 NC_04 N002 INTVcc NC_05 OUT OUT N004 0 N005 N005 0 LTM4657 ;pnba Vin)Run)Track/SS)Mode/CLKin)CLKout)PhMode)Freq)Pgood)INTVcc)SW)Vout)VoutS+)FB)VoutS-)COMPa)COMPb)Gnd
C4 OUT N004 100p
V1 IN 0 12
.tran 1m startup
.lib LTM4657.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2660 816
WIRE 656 -112 496 -112
WIRE 1024 -112 656 -112
WIRE 496 -96 496 -112
WIRE 1024 -64 1024 -112
WIRE 656 -16 656 -112
WIRE 688 -16 656 -16
WIRE 848 -16 768 -16
WIRE 496 0 496 -16
WIRE 1232 32 1200 32
WIRE 1376 32 1312 32
WIRE 752 64 720 64
WIRE 848 64 816 64
WIRE 1280 112 1200 112
WIRE 1376 112 1376 32
WIRE 1376 112 1280 112
WIRE 1408 112 1376 112
WIRE 1504 112 1472 112
WIRE 1248 272 1200 272
WIRE 1296 272 1248 272
WIRE 1520 272 1296 272
WIRE 1648 272 1520 272
WIRE 1296 320 1296 272
WIRE 1248 352 1248 272
WIRE 1248 352 1200 352
WIRE 1520 352 1520 272
WIRE 1648 352 1648 272
WIRE 1296 432 1296 384
WIRE 1296 432 1200 432
WIRE 1360 432 1296 432
WIRE 1456 432 1440 432
WIRE 848 464 736 464
WIRE 1456 512 1456 432
WIRE 1456 512 1200 512
WIRE 1520 512 1520 416
WIRE 1520 512 1456 512
WIRE 1648 512 1648 432
WIRE 1648 512 1520 512
WIRE 736 544 736 464
WIRE 848 544 736 544
WIRE 1648 544 1648 512
WIRE 1024 624 1024 592
SYMBOL cap 816 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL res 1328 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL voltage 496 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 1456 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 60.4k
SYMBOL cap 1472 96 R90
WINDOW 0 0 32 Invisible 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C7
SYMATTR Value 2.2F
SYMBOL res 784 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 150k
SYMBOL res 1632 336 R0
SYMATTR InstName R5
SYMATTR Value 0.125
SYMBOL LTM4657 1024 272 R0
SYMATTR InstName U1
SYMBOL cap 1280 320 R0
SYMATTR InstName C4
SYMATTR Value 100p
SYMBOL cap 1504 352 R0
SYMATTR InstName C3
SYMATTR Value 300
FLAG 496 0 0
FLAG 720 64 0
FLAG 1280 112 INTVcc
FLAG 1504 112 0
FLAG 1648 544 0
FLAG 1024 624 0
FLAG 496 -112 IN
FLAG 1648 272 OUT
TEXT 1112 624 Left 2 !.tran 1m startup
* Z:\tmp\asc_dec_bjh7r6w2\097045aa14b0_6993-4_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N002 0 5
R3 N003 0 392K
V2 N001 0 PULSE(0 3.3 0.1m 1n 1n 1m 8m 3)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE -224 96 -240 96
WIRE 96 96 -144 96
WIRE 640 96 320 96
WIRE 640 112 640 96
WIRE 96 176 64 176
WIRE 384 176 320 176
WIRE 528 176 384 176
WIRE 384 192 384 176
WIRE 528 192 528 176
WIRE 640 208 640 192
WIRE 0 256 -16 256
WIRE 336 256 320 256
WIRE 336 288 336 256
WIRE 384 288 384 272
WIRE 384 288 336 288
WIRE 528 288 528 272
WIRE 384 304 384 288
WIRE 384 400 384 384
SYMBOL voltage 528 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 368 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
SYMBOL voltage -128 96 R90
WINDOW 123 74 56 VTop 0
WINDOW 39 53 56 VTop 0
WINDOW 3 32 56 VTop 0
WINDOW 0 -32 56 VBottom 0
SYMATTR Value PULSE(0 3.3 0.1m 1n 1n 1m 8m 3)
SYMATTR InstName V2
FLAG -240 96 0
FLAG 528 288 0
FLAG 640 96 OUT
FLAG 64 176 0
FLAG -16 256 0
FLAG 384 400 0
FLAG 640 208 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3637.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3637.asy)
XU1 N001 0 IN MP_01 IN N003 N003 0 N002 N003 NC_02 NC_03 LTC3637 ;pnba SW)OVLO)Vin))Run)Vprg2)Vprg1)GND)FB)SS)Iset)FBO
R1 OUT N002 200K
V1 IN 0 48
Rload OUT 0 12
D1 0 N001 MBRS1100
R2 N002 0 35.7K
C1 OUT 0 47 V=10 Irms=8.919 Rser=0.005 Lser=0 mfg="KEMET" pn="C1210C106K8PAC" type="X5R"
L1 N001 OUT 10 Rser=50m
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LTC3637.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE 208 -288 112 -288
WIRE 224 -288 208 -288
WIRE 592 -288 512 -288
WIRE 656 -288 592 -288
WIRE 752 -288 736 -288
WIRE 880 -288 752 -288
WIRE 960 -288 880 -288
WIRE 112 -272 112 -288
WIRE 592 -272 592 -288
WIRE 752 -272 752 -288
WIRE 880 -272 880 -288
WIRE 960 -272 960 -288
WIRE 208 -192 208 -288
WIRE 224 -192 208 -192
WIRE 544 -192 512 -192
WIRE 592 -192 592 -208
WIRE 112 -176 112 -192
WIRE 880 -176 880 -208
WIRE 960 -176 960 -192
WIRE 544 -160 544 -192
WIRE 752 -160 752 -192
WIRE 752 -160 544 -160
WIRE 752 -144 752 -160
WIRE 528 -96 512 -96
WIRE 752 -48 752 -64
WIRE 528 0 528 -96
WIRE 528 0 512 0
WIRE 224 96 208 96
WIRE 528 96 528 0
WIRE 528 96 512 96
WIRE 368 176 368 160
SYMBOL PowerProducts\\LTC3637 368 -96 R0
SYMATTR InstName U1
SYMBOL cap 864 -272 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMATTR SpiceLine V=10 Irms=8.919 Rser=0.005 Lser=0 mfg="KEMET" pn="C1210C106K8PAC" type="X5R"
SYMBOL voltage 112 -288 R0
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL schottky 576 -208 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS1100
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 944 -288 R0
SYMATTR InstName Rload
SYMATTR Value 12
SYMBOL res 736 -288 R0
SYMATTR InstName R1
SYMATTR Value 200K
SYMBOL ind 640 -272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=50m
SYMBOL res 736 -160 R0
SYMATTR InstName R2
SYMATTR Value 35.7K
FLAG 368 176 0
FLAG 112 -176 0
FLAG 208 96 0
FLAG 880 -176 0
FLAG 960 -176 0
FLAG 960 -288 OUT
FLAG 112 -288 IN
FLAG 752 -48 0
FLAG 592 -192 0
TEXT 616 96 Left 2 !.tran 1.5m startup
* Z:\tmp\asc_dec_bjh7r6w2\07f4dd94cd71_TerceraEtapa_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N003 N001 {mc(22680,0.01)}
C2 N002 N001 {mc(12n,0.1)}
V3 Vi 0 AC 1 Rser=50
V1 +VCC 0 15
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 112 256 112
WIRE 624 112 448 112
WIRE -112 144 -112 128
WIRE 32 208 32 160
WIRE 160 224 144 224
WIRE 256 224 256 112
WIRE 256 224 240 224
WIRE 288 224 256 224
WIRE 384 224 368 224
WIRE 512 224 384 224
WIRE -112 240 -112 224
WIRE -112 240 -192 240
WIRE 624 240 624 112
WIRE 624 240 576 240
WIRE 704 240 624 240
WIRE -192 256 -192 240
WIRE -112 256 -112 240
WIRE 512 256 464 256
WIRE 384 272 384 224
WIRE 32 320 32 288
WIRE -112 352 -112 336
WIRE 464 352 464 256
WIRE 624 352 624 240
WIRE 624 352 464 352
WIRE 160 416 160 224
WIRE 384 480 384 336
SYMBOL res 384 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 43 99 VTop 2
SYMATTR InstName R2
SYMATTR Value {mc(22680,0.01)}
SYMBOL cap 448 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {mc(12n,0.1)}
SYMBOL voltage 32 192 R0
WINDOW 123 24 124 Left 2
WINDOW 39 24 152 Left 2
SYMATTR Value2 AC 1
SYMATTR SpiceLine Rser=50
SYMATTR InstName V3
SYMATTR Value ""
SYMBOL voltage -112 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
FLAG -192 256 0
FLAG -112 128 +VCC
FLAG -112 352 -VCC
FLAG 32 320 0
FLAG 32 160 Vi
FLAG 544 272 +VCC
FLAG 544 208 -VCC
FLAG 144 224 Vi
* Z:\home\khalils\Downloads\files\data\raw_asc\0d9abb519d5b_pdt-projeto-com-transistores.asc
* Generated by LTspice 26.0.1 for Windows.
* Vc
* Vb
* Ve
* Vce
* Vbe
* V1
* V2
Q1 N002 N003 N004 0 2N2222
Re N004 0 120R
Rc N001 N002 480R
R1 N001 N003 1k2
R2 N003 0 240R
Vcc N001 0 12V
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 10ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -112 -48 -112
WIRE 304 -112 160 -112
WIRE 160 -64 160 -112
WIRE 304 -64 304 -112
WIRE 304 112 304 16
WIRE -48 128 -48 -112
WIRE 160 160 160 16
WIRE 240 160 160 160
WIRE 160 304 160 160
WIRE 304 304 304 208
WIRE -48 416 -48 208
WIRE 160 416 160 384
WIRE 160 416 -48 416
WIRE 304 416 304 384
WIRE 304 416 160 416
WIRE -48 448 -48 416
SYMBOL res 288 -80 R0
SYMATTR InstName Rc
SYMATTR Value 480R
SYMBOL res 144 -80 R0
SYMATTR InstName R1
SYMATTR Value 1k2
SYMBOL voltage -48 112 R0
WINDOW 0 39 39 Left 2
WINDOW 3 38 70 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vcc
SYMATTR Value 12V
SYMBOL npn 240 112 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL res 144 288 R0
SYMATTR InstName R2
SYMATTR Value 240R
SYMBOL res 288 288 R0
SYMATTR InstName Re
SYMATTR Value 120R
FLAG -48 448 0
TEXT -8 208 Left 0 !.tran 10ms
TEXT 280 104 Left 1 ;Vc
TEXT 224 152 Left 1 ;Vb
TEXT 280 216 Left 1 ;Ve
TEXT 280 144 VRight 1 ;Vce
TEXT 248 184 VRight 1 ;Vbe
TEXT 120 -24 Left 1 ;V1
TEXT 120 344 Left 1 ;V2
* Z:\home\khalils\Downloads\files\data\raw_asc\2eb9a2fc9221_hw7_prob4.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 0 15
I1 0 N001 0 AC 5 30
C1 vout 0 1.6667m
R2 vout N001 1
.options plotwinsize=0 numdgt=15 measdgt=15
.ac list {50/(2*pi)}
* Phasor-domain testbench schematic for checking your work on Problem 4:\n \nuse the .ac results report to verify your phasor-domain work; the results\nlisted in the report are given in polar format, i.e., magnitude and phase\n \nV(vout) in the report is the phasor voltage Vout (Vo in the assignment)\n \nthere is nothing to plot for this verification testbench\n \nthe capacitor value is chosen to give the impedance listed in Problem 4\nat an angular frequency of 50 rps; note that there is nothing particularly\nspecial about 50 rps, but I needed to choose something for ac simulation\npurposes; 50 rps angular frequency of operation for this testbench is \n50/(2*pi) ~ 7.9578 Hz
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1040 692
WIRE -176 -80 -384 -80
WIRE -112 -80 -176 -80
WIRE 0 -80 -32 -80
WIRE 16 -80 0 -80
WIRE -384 -32 -384 -80
WIRE -176 -32 -176 -80
WIRE 16 -16 16 -80
WIRE -384 128 -384 48
WIRE -208 128 -384 128
WIRE -176 128 -176 48
WIRE -176 128 -208 128
WIRE 16 128 16 48
WIRE 16 128 -176 128
WIRE -208 160 -208 128
FLAG -208 160 0
FLAG 0 -80 vout
SYMBOL res -400 -48 R0
SYMATTR InstName R1
SYMATTR Value 15
SYMBOL current -176 48 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 24 52 Left 2
SYMATTR InstName I1
SYMATTR Value 0
SYMATTR Value2 AC 5 30
SYMBOL cap 0 -16 R0
SYMATTR InstName C1
SYMATTR Value 1.6667m
SYMBOL res -16 -96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
TEXT -432 304 Left 2 !.options plotwinsize=0 numdgt=15 measdgt=15\n.ac list {50/(2*pi)}
TEXT -544 -648 Left 2 ;Phasor-domain testbench schematic for checking your work on Problem 4:\n \nuse the .ac results report to verify your phasor-domain work; the results\nlisted in the report are given in polar format, i.e., magnitude and phase\n \nV(vout) in the report is the phasor voltage Vout (Vo in the assignment)\n \nthere is nothing to plot for this verification testbench\n \nthe capacitor value is chosen to give the impedance listed in Problem 4\nat an angular frequency of 50 rps; note that there is nothing particularly\nspecial about 50 rps, but I needed to choose something for ac simulation\npurposes; 50 rps angular frequency of operation for this testbench is \n50/(2*pi) ~ 7.9578 Hz
* Z:\tmp\asc_dec_bjh7r6w2\01cae594ee6b_IdealDiodeDriver_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 0 1k
V1 N001 0 PULSE(0 5 1e-3 1e-9 1e-9 2e-3 4e-3 2)
V2 N002 0 PULSE(0 7 2e-3 1e-9 1e-9 1e-3 2e-3 2)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1052 680
WIRE 32 16 -64 16
WIRE 160 16 32 16
WIRE 352 16 288 16
WIRE 464 16 352 16
WIRE 608 16 464 16
WIRE 32 32 32 16
WIRE 464 32 464 16
WIRE -64 48 -64 16
WIRE 608 48 608 16
WIRE 272 96 272 64
WIRE 272 96 256 96
WIRE -64 144 -64 128
WIRE 32 144 32 112
WIRE 32 144 -64 144
WIRE 464 144 464 112
WIRE 608 144 608 128
WIRE 608 144 464 144
WIRE -64 160 -64 144
WIRE 352 160 352 16
WIRE 608 160 608 144
WIRE 288 272 288 208
WIRE 256 288 256 96
SYMBOL res 448 16 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -64 32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 1e-3 1e-9 1e-9 2e-3 4e-3 2)
SYMBOL voltage 608 32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 7 2e-3 1e-9 1e-9 1e-3 2e-3 2)
FLAG -64 160 0
FLAG 608 160 0
* Z:\home\khalils\Downloads\files\data\raw_asc\1691db45716f_HW3P01.asc
* Generated by LTspice 26.0.1 for Windows.
VI3 V0n 0 0
VI2 N004 0 0
EV0 NC_01 0 V0p V0n 1
V2 N003 0 12
R3 N004 N001 1k
R1 N003 N001 1k
R4 V0n V0p 2k
R2 V0p N003 1k
V1 N002 N001 6v
VI1 N002 V0p 0
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1416 680
WIRE 160 112 16 112
WIRE 272 112 240 112
WIRE 384 112 352 112
WIRE 16 272 16 112
WIRE 48 272 16 272
WIRE 192 272 128 272
WIRE 272 272 192 272
WIRE 384 272 384 112
WIRE 384 272 352 272
WIRE 464 272 384 272
WIRE 16 368 16 272
WIRE 192 368 192 272
WIRE 384 368 384 272
WIRE 16 496 16 448
WIRE 64 496 16 496
WIRE 192 496 192 448
WIRE 192 496 144 496
WIRE 256 496 192 496
WIRE 384 496 384 448
WIRE 384 496 336 496
WIRE 464 496 384 496
SYMBOL res 32 464 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 400 464 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 2k
SYMBOL voltage 256 112 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value 6v
SYMBOL e 624 96 R0
SYMATTR InstName V0
SYMATTR Value 1
SYMBOL voltage 192 352 R0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL voltage 48 496 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName I2
SYMATTR Value 0
SYMBOL voltage 256 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName I1
SYMATTR Value 0
SYMBOL res 144 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 352 496 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName I3
SYMATTR Value 0
SYMBOL res 368 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 464 272 V0p
FLAG 464 496 V0n
FLAG 192 496 0
FLAG 576 128 V0p
FLAG 576 176 V0n
FLAG 624 192 0
TEXT 1376 616 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\ADGS1612.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADGS1612.asy)
C1 N002 0 35p
V4 N003 0 pulse(0 3.3 0 20n 20n 10u 20u)
V1 +V 0 5
R1 N002 0 300
XU1 N003 N002 N001 -V 0 +V ADGS1612 ;pnba IN)D)S)Vss)GND)Vdd
V2 -V 0 -5
V3 N001 0 4.5
.tran 0.0001
.lib ADGS1612.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -112 -112 -112 -128
WIRE -464 -48 -464 -64
WIRE -336 -48 -368 -48
WIRE -208 -48 -256 -48
WIRE 48 -48 -16 -48
WIRE 144 -48 48 -48
WIRE 48 -16 48 -48
WIRE 144 0 144 -48
WIRE -208 16 -336 16
WIRE -464 48 -464 32
WIRE 48 80 48 64
WIRE 144 80 144 64
WIRE -336 96 -336 16
WIRE -464 144 -464 128
WIRE -160 144 -160 128
WIRE -64 144 -64 128
WIRE -464 240 -464 224
WIRE -336 240 -336 176
SYMBOL voltage -240 -48 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 4.5
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL voltage -336 80 R0
WINDOW 3 19 116 Left 2
SYMATTR Value pulse(0 3.3 0 20n 20n 10u 20u)
SYMATTR InstName V4
SYMBOL voltage -464 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL cap 128 0 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL Switches\\ADGS1612 -112 0 R0
SYMATTR InstName U1
SYMBOL voltage -464 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -464 240 0
FLAG -464 48 0
FLAG -464 -64 +V
FLAG -464 128 -V
FLAG -368 -48 0
FLAG -160 144 -V
FLAG -112 -128 +V
FLAG -64 144 0
FLAG -336 240 0
FLAG 48 80 0
FLAG 144 80 0
TEXT -312 240 Left 2 !.tran 0.0001
* Z:\home\khalils\Downloads\files\data\raw_asc\283cf2fdc061_PWM_schematic.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC6752.asy)
A1 reset clk 0 0 0 c 0 0 SRFLOP Vhigh=5
A2 comp_out clk_dmax 0 0 0 0 reset 0 OR Vhigh=5
Vclk_Dmax clk_dmax 0 PULSE(0 5 {Dmax/fs} 1n 1n {(1-Dmax)/fs} {1/fs})
Vclk clk 0 PULSE(0 5 0 1n 1n {Dmin/fs} {1/fs})
XU1 sawtooth vc Vdd5V 0 comp_out LTC6752 ;pnba +In)-In)VCC)VEE)Q
Vsawtooth sawtooth 0 PULSE({Voffset} {Voffset+VM} 0 {0.99/fs} {(0.01)/fs} 0 {1/fs})
V3 Vdd5V 0 5
.param Dmin = 0
.param Dmax=0.9
.param fs = 100kHz
.param VM=1
.param Voffset=0
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1176 680
WIRE -176 -16 -320 -16
WIRE -96 -16 -176 -16
WIRE -320 64 -320 32
WIRE -320 96 -320 64
WIRE -96 144 -96 -16
WIRE -128 160 -320 160
WIRE 112 160 32 160
WIRE 256 160 112 160
WIRE 32 176 32 160
WIRE 32 176 -64 176
WIRE 256 176 192 176
WIRE 368 176 320 176
WIRE 448 176 368 176
WIRE -128 192 -176 192
WIRE 256 192 240 192
WIRE 240 208 240 192
WIRE 256 208 240 208
WIRE -96 224 -96 208
WIRE 240 224 240 208
WIRE 256 224 240 224
WIRE 448 224 336 224
WIRE 720 224 560 224
WIRE 240 240 240 224
WIRE 272 240 272 224
WIRE 272 240 240 240
WIRE -176 256 -176 192
WIRE 272 256 272 240
WIRE 192 288 192 176
WIRE -176 304 -176 256
WIRE 336 320 336 224
WIRE 192 352 192 288
WIRE 336 352 336 320
WIRE -176 400 -176 384
WIRE 192 448 192 432
WIRE 336 448 336 432
IOPIN 720 224 Out
IOPIN -320 160 In
SYMBOL voltage 192 336 R0
WINDOW 0 -160 61 Left 2
WINDOW 3 -220 151 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vclk_Dmax
SYMATTR Value PULSE(0 5 {Dmax/fs} 1n 1n {(1-Dmax)/fs} {1/fs})
SYMBOL voltage 336 336 R0
WINDOW 0 45 59 Left 2
WINDOW 3 32 96 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vclk
SYMATTR Value PULSE(0 5 0 1n 1n {Dmin/fs} {1/fs})
SYMBOL voltage -176 288 R0
WINDOW 0 -149 89 Left 2
WINDOW 3 -477 161 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vsawtooth
SYMATTR Value PULSE({Voffset} {Voffset+VM} 0 {0.99/fs} {(0.01)/fs} 0 {1/fs})
SYMBOL voltage -320 -32 R0
WINDOW 0 -71 37 Left 2
WINDOW 3 -64 67 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL Digital\\or 288 128 R0
SYMATTR InstName A2
SYMATTR Value2 Vhigh=5
SYMBOL Digital\\srflop 496 128 R0
WINDOW 3 0 0 Invisible 2
SYMATTR Value Vhigh=5
SYMATTR InstName A1
SYMBOL Comparators\\LTC6752 -96 112 R0
SYMATTR InstName U1
FLAG 336 448 0
FLAG -96 224 0
FLAG -176 400 0
FLAG -320 96 0
FLAG 336 320 clk
FLAG -176 256 sawtooth
FLAG 192 448 0
FLAG 192 288 clk_dmax
FLAG 272 256 0
FLAG 368 176 reset
FLAG 720 224 c
FLAG -320 160 vc
FLAG -176 -16 Vdd5V
FLAG 112 160 comp_out
TEXT 40 -72 Left 2 !.param Dmin = 0
TEXT 40 -40 Left 2 !.param Dmax=0.9
TEXT 40 -104 Left 2 !.param fs = 100kHz
TEXT 40 -8 Left 2 !.param VM=1
TEXT 40 24 Left 2 !.param Voffset=0
* Z:\tmp\asc_dec_bjh7r6w2\1422f4c9158b_101_lec_exercise_diode_einweg_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 0 {C}
R2 N002 0 1200
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2120 680
WIRE 416 48 368 48
WIRE 512 48 480 48
WIRE 608 48 512 48
WIRE 512 80 512 48
WIRE 608 80 608 48
WIRE 448 192 272 192
WIRE 512 192 512 144
WIRE 512 192 448 192
WIRE 608 192 608 160
WIRE 608 192 512 192
WIRE 448 208 448 192
SYMBOL cap 496 80 R0
SYMATTR InstName C1
SYMATTR Value {C}
SYMBOL res 592 64 R0
SYMATTR InstName R2
SYMATTR Value 1200
FLAG 448 208 0