Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3485-3.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N002 N005 10 Rpar=2K Rser=.1
L2 0 N003 {10u*10.2*10.2} Rpar=1Meg
C1 OUT 0 .2
D1 N003 OUT D
R3 N004 N001 10K
V1 N001 0 5
V2 N002 0 3
V3 N007 0 PWL(30m 0 30.01m 3 30.1m 3 30.11m 0)
XU1 N001 N002 N001 N005 MP_01 N008 N007 N001 N004 N006 0 LT3485-3 ;pnba Charge)Vbat)Vin)SW))IBGTout)IBGTin)IBGTpwr)_Done)Vmont)GND
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 50m startup
K1 L1 L2 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3485-3.asy)
.lib LT3485-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2900 1764
WIRE 1936 1152 1936 1136
WIRE 1712 1248 1520 1248
WIRE 1824 1248 1712 1248
WIRE 1936 1248 1936 1232
WIRE 2064 1248 1936 1248
WIRE 2224 1248 2112 1248
WIRE 2352 1248 2288 1248
WIRE 2064 1264 2064 1248
WIRE 2112 1264 2112 1248
WIRE 2352 1264 2352 1248
WIRE 1712 1296 1712 1248
WIRE 1824 1296 1824 1248
WIRE 1936 1296 1936 1248
WIRE 1520 1360 1520 1248
WIRE 1568 1360 1520 1360
WIRE 1664 1360 1648 1360
WIRE 2064 1360 2064 1344
WIRE 2064 1360 1984 1360
WIRE 2112 1360 2112 1344
WIRE 2352 1360 2352 1328
WIRE 1520 1440 1520 1360
WIRE 1664 1440 1520 1440
WIRE 2016 1440 1984 1440
WIRE 1520 1456 1520 1440
WIRE 1664 1520 1600 1520
WIRE 2016 1520 1984 1520
WIRE 1520 1552 1520 1536
WIRE 1600 1552 1600 1520
WIRE 1824 1600 1824 1584
WIRE 1600 1664 1600 1632
FLAG 2352 1360 0
FLAG 1824 1600 0
FLAG 1520 1552 0
FLAG 2112 1360 0
FLAG 1936 1136 0
FLAG 1600 1664 0
FLAG 2352 1248 OUT
SYMBOL ind2 2048 1248 R0
WINDOW 0 -6 35 Right 2
WINDOW 3 -4 73 Right 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rpar=2K Rser=.1
SYMBOL ind2 2128 1360 R180
WINDOW 0 -3 72 Right 2
WINDOW 3 0 43 Right 2
SYMATTR InstName L2
SYMATTR Value {10u*10.2*10.2}
SYMATTR SpiceLine Rpar=1Meg
SYMBOL cap 2336 1264 R0
WINDOW 3 27 55 Left 2
SYMATTR Value .2
SYMATTR InstName C1
SYMBOL diode 2224 1264 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL res 1664 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL VOLTAGE 1520 1440 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL misc\\battery 1936 1248 M180
WINDOW 0 25 87 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL voltage 1600 1536 R0
WINDOW 3 12 110 Left 2
SYMATTR Value PWL(30m 0 30.01m 3 30.1m 3 30.11m 0)
SYMATTR InstName V3
SYMBOL PowerProducts\\LT3485-3 1824 1440 R0
SYMATTR InstName U1
TEXT 2056 1472 Left 2 !.tran 50m startup
TEXT 2088 1248 Bottom 2 !K1 L1 L2 1
* Z:\home\khalils\Downloads\files\data\raw_asc\22ba57e37557_transmission_char.asc
* Generated by LTspice 26.0.1 for Windows.
M1 d g 0 0 NMOS l=32e-9 w=320e-9 ad=51200e-18 as=51200e-18 pd=960e-9 ps=960e-9
R1 N001 d 1e3
V2 g 0 1
V1 N001 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 0 2.5 1e-2 V1 0 2 0.4
.inc 32nm_bulk.pm
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 480 -16 192 -16
WIRE 480 48 480 -16
WIRE 192 112 192 64
WIRE 192 144 192 112
WIRE 240 192 192 192
WIRE 96 224 0 224
WIRE 144 224 96 224
WIRE 192 304 192 240
WIRE 192 304 0 304
WIRE 240 304 240 192
WIRE 240 304 192 304
WIRE 336 304 240 304
WIRE 480 304 480 128
WIRE 480 304 336 304
WIRE 336 352 336 304
SYMBOL voltage 480 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL voltage 0 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL res 176 -32 R0
SYMATTR InstName R1
SYMATTR Value 1e3
SYMBOL nmos4 144 144 R0
SYMATTR InstName M1
SYMATTR Value2 l=32e-9 w=320e-9 ad=51200e-18 as=51200e-18 pd=960e-9 ps=960e-9
FLAG 336 352 0
FLAG 192 112 d
FLAG 96 224 g
TEXT -32 376 Left 2 !.dc V2 0 2.5 1e-2 V1 0 2 0.4
TEXT -40 416 Left 2 !.inc 32nm_bulk.pm
* Z:\tmp\asc_dec_bjh7r6w2\13da99796694_low-pass-rauch-block3_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N003 N001 1k
C2 N001 N004 100p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 -32 -240 -32
WIRE 240 -32 -64 -32
WIRE -240 16 -240 -32
WIRE -64 32 -64 -32
WIRE -368 144 -432 144
WIRE -240 144 -240 96
WIRE -240 144 -288 144
WIRE -192 144 -240 144
WIRE -64 144 -64 96
WIRE -64 144 -112 144
WIRE 96 144 -64 144
WIRE -240 192 -240 144
WIRE -240 320 -240 256
SYMBOL res -224 112 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL cap -80 32 R0
SYMATTR InstName C2
SYMATTR Value 100p
FLAG 96 112 GND
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP172-0.9.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP172-0.9.asy)
RLOAD OUT 0 3
V1 IN 0 3.6
XU1 OUT IN IN 0 ADP172-0.9 ;pnba Vout)Vin)En)GND
C1 OUT 0 1
.tran 2m startup
.lib ADP172-0.9.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 80 -48 80
WIRE 48 80 -32 80
WIRE 64 80 48 80
WIRE 304 80 256 80
WIRE 336 80 304 80
WIRE 384 80 336 80
WIRE -48 96 -48 80
WIRE 304 96 304 80
WIRE 304 176 304 160
WIRE 384 176 384 160
WIRE -48 192 -48 176
WIRE 48 192 48 80
WIRE 64 192 48 192
WIRE 272 192 256 192
SYMBOL ADP172-0.9 160 192 R0
SYMATTR InstName U1
SYMBOL res 368 64 R0
SYMATTR InstName RLOAD
SYMATTR Value 3
SYMBOL cap 288 96 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -48 80 R0
SYMATTR InstName V1
SYMATTR Value 3.6
FLAG -48 192 0
FLAG 304 176 0
FLAG 272 192 0
FLAG 384 176 0
FLAG -32 80 IN
FLAG 336 80 OUT
TEXT 160 256 Center 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\19b34ead5a6f_gm_of_vgs_const_vds_ac.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot transconductance Gm as Id(M1) or I(Vds) to get Gm at 1Hz.
* Forward Conductance "Gm" Versus Gate Source Voltage at 1Hz\n \nPlot Id(M1) to get Gm versus Vgs. \nThe .AC command perfforms a small signal analysis and thus Id(M1)\nis the transconductance Gm.
* Gerneral hint for plots:\nMake the plot window active. \n"PlotSettings->Add Trace" and select an item\nor "right mouse button ->Add Trace" and select an item.
* Model from Philips Semiconductor
+ LEVEL=3
+ W=1E-3
+ L=1E-6
+ VTO=2
+ VMAX=1E6
+ RS=3
+ RD=3
+ CJ=0.001396
+ MJ=0.3936
+ THETA=1E-6
+ ETA=0.009307
+ KAPPA=2.226
Vgs Vg 0 {VGS} AC 1
M1 Vd Vg 0 0 BSS83
Vds Vd 0 {VDS}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.STEP PARAM VGS 0 5 .01
.OP
.AC LIST 1
.param VDS=5
.MODEL BSS83 NMOS
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1208 724
WIRE -96 320 -96 272
WIRE 96 432 96 608
WIRE 96 608 -96 608
WIRE -96 464 -96 416
WIRE -96 544 -96 608
WIRE -96 640 -96 608
WIRE -96 192 -96 144
WIRE 48 416 -96 416
WIRE -96 144 96 144
WIRE 96 144 96 336
SYMBOL voltage -96 448 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName Vgs
SYMATTR Value {VGS}
SYMBOL nmos 48 336 R0
SYMATTR InstName M1
SYMATTR Value BSS83
SYMBOL voltage -96 176 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vds
SYMATTR Value {VDS}
FLAG -96 640 0
FLAG -96 320 0
FLAG -96 144 Vd
FLAG -96 416 Vg
TEXT -112 -224 Left 0 !.STEP PARAM  VGS 0 5 .01
TEXT -112 -184 Left 0 !.OP
TEXT -112 -136 Left 0 !.AC LIST 1
TEXT 48 -136 Left 0 ;Plot transconductance Gm as Id(M1) or I(Vds) to get Gm at 1Hz.
TEXT -112 -416 Left 0 ;Forward Conductance "Gm" Versus Gate Source Voltage at 1Hz\n \nPlot Id(M1) to get Gm versus Vgs.  \nThe .AC command perfforms a small signal analysis and thus Id(M1)\nis the transconductance Gm.
TEXT -104 -40 Left 0 ;Gerneral hint for plots:\nMake the plot window active. \n"PlotSettings->Add Trace" and select an item\nor "right mouse button  ->Add Trace" and select an item.
TEXT -112 -264 Left 0 !.param VDS=5
TEXT 240 192 Left 0 !* Model from Philips Semiconductor\n.MODEL BSS83 NMOS\n+ LEVEL=3\n+ W=1E-3\n+ L=1E-6\n+ VTO=2\n+ VMAX=1E6\n+ RS=3\n+ RD=3\n+ CJ=0.001396\n+ MJ=0.3936\n+ THETA=1E-6\n+ ETA=0.009307\n+ KAPPA=2.226
* Z:\tmp\asc_dec_bjh7r6w2\0120579fd0eb_nor_nor_main_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
VB N002 0 PULSE(0 1 1n 10p 10p 4n 8n)
VA N001 0 PULSE(0 1 1n 10p 10p 2n 4n)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1332 852
WIRE 304 -16 -144 -16
WIRE -144 32 -144 -16
WIRE -144 160 -144 112
WIRE 304 224 -144 224
WIRE -144 336 -144 224
WIRE -144 464 -144 416
SYMBOL voltage -144 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName B
SYMATTR Value PULSE(0 1 1n 10p 10p 4n 8n)
SYMBOL voltage -144 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName A
SYMATTR Value PULSE(0 1 1n 10p 10p 2n 4n)
FLAG -144 160 0
FLAG -144 464 0
* Z:\home\khalils\Downloads\files\data\raw_asc\e3b0fe30fcdd_DQ-ABC.asc
* Generated by LTspice 26.0.1 for Windows.
BVa out1 0 V = (cos(V(in4))*V(in1) - sin(V(in4))*V(in2))
BVb out2 0 V = (cos(V(in4) - 2*pi/3)*V(in1) - sin(V(in4) - 2*pi/3)*V(in2))
BVc out3 0 V = (cos(V(in4) - 4*pi/3)*V(in1) - sin(V(in4) - 4*pi/3)*V(in2))
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1920 680
WIRE 752 -32 416 -32
WIRE 752 16 528 16
WIRE 752 64 640 64
WIRE 352 112 272 112
WIRE 416 128 416 -32
WIRE 528 128 528 16
WIRE 640 128 640 64
WIRE 352 160 272 160
WIRE 352 208 272 208
WIRE 416 224 416 208
WIRE 528 224 528 208
WIRE 640 224 640 208
FLAG 272 112 in1
IOPIN 272 112 In
FLAG 272 160 in2
IOPIN 272 160 In
FLAG 272 208 in4
IOPIN 272 208 In
FLAG 416 224 0
FLAG 528 224 0
FLAG 752 -32 out1
IOPIN 752 -32 Out
FLAG 752 16 out2
IOPIN 752 16 Out
FLAG 640 224 0
FLAG 752 64 out3
IOPIN 752 64 Out
SYMBOL bv 416 112 R0
WINDOW 3 35 188 Left 2
SYMATTR Value V = (cos(V(in4))*V(in1) - sin(V(in4))*V(in2))
SYMATTR InstName Va
SYMBOL bv 528 112 R0
WINDOW 3 -28 224 Left 2
SYMATTR Value V = (cos(V(in4) - 2*pi/3)*V(in1) - sin(V(in4) - 2*pi/3)*V(in2))
SYMATTR InstName Vb
SYMBOL bv 640 112 R0
WINDOW 3 -93 261 Left 2
SYMATTR Value V = (cos(V(in4) - 4*pi/3)*V(in1) - sin(V(in4) - 4*pi/3)*V(in2))
SYMATTR InstName Vc
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3008-5.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 1
Rload OUT 0 500
XU1 IN OUT OUT 0 IN LT3008-5 ;pnba IN)OUT)Sense)GND)_SHDN
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3008-5.asy)
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT3008-5 176 96 R0
SYMATTR InstName U1
TEXT 336 248 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\0c3e845da91d_circuitoRLC.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac list 0.318309886
L3 A N004 5
L4 N006 N008 4
R2 N003 N005 3
L1 N003 N002 6
V2 N009 0 SINE(0 4 0.318309886 0 0 45)
V1 N001 0 SINE(0 9 0.318309886 0 0 120)
R4 A N006 7
L2 N005 N007 2
C1 N007 N009 0.3333
R1 N002 N001 3
C2 N008 0 0.5
R3 N004 N003 2
.tran 0 40 20 5m
.meas TRAN Pinst param V(a)*I(R4)
.meas TRAN Pprom AVG V(a)*I(R4) FROM 20 TO 30
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1592 1044
WIRE 80 96 -32 96
WIRE 224 96 160 96
WIRE 368 96 304 96
WIRE 448 96 368 96
WIRE 576 96 528 96
WIRE 720 96 656 96
WIRE 368 144 368 96
WIRE 720 144 720 96
WIRE 368 256 368 224
WIRE -32 288 -32 96
WIRE 720 304 720 224
WIRE 368 368 368 336
WIRE 720 416 720 384
WIRE 368 480 368 432
WIRE -32 608 -32 368
WIRE 368 608 368 560
WIRE 368 608 -32 608
WIRE 720 608 720 480
WIRE 720 608 368 608
WIRE 368 656 368 608
SYMBOL voltage 368 464 R0
WINDOW 3 -11 244 Invisible 2
WINDOW 123 5 109 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value ""
SYMATTR Value2 SINE(0 4 0.318309886 0 0 45)
SYMATTR InstName V2
SYMBOL ind 672 80 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L3
SYMATTR Value 5
SYMBOL res 544 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2
SYMBOL cap 352 368 R0
SYMATTR InstName C1
SYMATTR Value 0.3333
SYMBOL ind 352 240 R0
SYMATTR InstName L2
SYMATTR Value 2
SYMBOL cap 704 416 R0
SYMATTR InstName C2
SYMATTR Value 0.5
SYMBOL ind 704 288 R0
SYMATTR InstName L4
SYMATTR Value 4
SYMBOL res 352 128 R0
SYMATTR InstName R2
SYMATTR Value 3
SYMBOL res 176 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3
SYMBOL ind 320 80 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value 6
SYMBOL voltage -32 272 R0
WINDOW 3 -380 2 Left 2
WINDOW 123 13 -25 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value ""
SYMATTR Value2 SINE(0 9 0.318309886 0 0 120)
SYMATTR InstName V1
SYMBOL res 704 128 R0
SYMATTR InstName R4
SYMATTR Value 7
FLAG 368 656 0
FLAG 720 96 A
FLAG 720 608 B
TEXT 24 536 Left 2 ;.ac list 0.318309886
TEXT 24 560 Left 2 !.tran 0 40 20 5m
TEXT 968 352 Left 2 !.meas TRAN Pinst param V(a)*I(R4)
TEXT 968 424 Left 2 !.meas TRAN Pprom AVG V(a)*I(R4) FROM 20 TO 30
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6233.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 10
R1 OUT N001 732
R3 +V N003 10K
R4 N003 0 10K
C1 N003 0 .1
C2 OUT N002 47p
R5 N002 N001 732
C3 N001 IN 1000p
V2 IN 0 ac 1
XU1 N003 N002 OUT +V 0 0 LT6233 ;pnba IN+)IN-)OUT)VCC)VEE)EN_L
.ac oct 100 100K 10Meg
* Single Supply, Low Noise, Low Power, Bandpass Filter with Gain=10
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6233.asy)
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -192 -64 -224 -64
WIRE 208 -64 -112 -64
WIRE -336 -48 -336 -64
WIRE 96 -16 -96 -16
WIRE 208 -16 208 -64
WIRE 208 -16 160 -16
WIRE -336 48 -336 32
WIRE -32 64 -48 64
WIRE 80 64 80 48
WIRE 80 64 48 64
WIRE 80 128 80 64
WIRE -320 176 -400 176
WIRE -224 176 -224 -64
WIRE -224 176 -256 176
WIRE -208 176 -224 176
WIRE -96 176 -96 -16
WIRE -96 176 -128 176
WIRE 48 176 -96 176
WIRE -400 192 -400 176
WIRE 208 208 208 -16
WIRE 208 208 192 208
WIRE 224 208 208 208
WIRE -48 240 -48 64
WIRE -48 240 -128 240
WIRE 48 240 -48 240
WIRE -128 256 -128 240
WIRE -48 256 -48 240
WIRE -400 288 -400 272
WIRE -128 352 -128 320
WIRE -48 352 -48 336
FLAG -336 48 0
FLAG 80 48 +V
FLAG -336 -64 +V
FLAG -48 352 0
FLAG -128 352 0
FLAG -400 288 0
FLAG 224 208 OUT
FLAG -400 176 IN
FLAG 128 288 0
FLAG 80 288 0
SYMBOL voltage -336 -64 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res -96 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 732
SYMBOL res 64 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res -64 240 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL cap -144 256 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL cap 160 -32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 47p
SYMBOL res -112 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 732
SYMBOL cap -256 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1000p
SYMBOL voltage -400 176 R0
SYMATTR InstName V2
SYMATTR Value ac 1
SYMBOL opamps\\LT6233 80 208 R0
SYMATTR InstName U1
TEXT 88 344 Left 2 !.ac oct 100 100K 10Meg
TEXT -56 -168 Bottom 2 ;Single Supply, Low Noise, Low Power, Bandpass Filter with Gain=10
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1761.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1761.asy)
C3 N002 0 1
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1761 Radj=1T ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
C2 N003 0 10n
R1 OUT 0 2
V1 IN 0 1.8
C1 N004 0 1
R3 N005 0 10K
R2 N001 IN 50K
C4 OUT 0 10
.tran 1m startup
.lib ADP1761.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 464 320 448 320
WIRE 224 384 224 368
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 352 336 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL ADP1761 224 176 R0
SYMATTR InstName U1
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 320 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP122-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP122-3.3.asy)
XU1 OUT MP_01 0 IN MP_02 IN ADP122 K=1/6600 ;pnba Vout))GND)En))Vin
C1 IN 0 1
V1 IN 0 5.5
C2 OUT 0 1
Rload OUT 0 100
.tran 10m startup
.lib ADP122.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL ADP122-3.3 256 208 R0
SYMATTR InstName U1
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1107.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1107.asy)
C1 OUT 0 100 Rser=0.02
D1 N001 OUT MBRS140
L1 IN N001 33 Rser=0.02 Rpar=5000
Rload OUT 0 25
XU1 IN IN N001 0 0 N002 N004 N003 LT1107 top=1K bot=1T ;pnba Ilim)Vin)SW1)SW2)GND)AO)SET)FB
R2 N003 0 73.5K
R1 OUT N003 220K
V1 IN 0 2.8
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m startup
.lib LT1107.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2488 1440
WIRE 1472 912 1296 912
WIRE 1600 912 1472 912
WIRE 1632 912 1600 912
WIRE 1744 912 1712 912
WIRE 1792 912 1744 912
WIRE 1920 912 1856 912
WIRE 2032 912 1920 912
WIRE 2144 912 2032 912
WIRE 1296 928 1296 912
WIRE 2032 928 2032 912
WIRE 2144 928 2144 912
WIRE 1472 960 1472 912
WIRE 1600 960 1600 912
WIRE 1920 960 1920 912
WIRE 1296 1024 1296 1008
WIRE 1392 1024 1376 1024
WIRE 1744 1024 1744 912
WIRE 1744 1024 1680 1024
WIRE 2032 1024 2032 992
WIRE 2144 1024 2144 1008
WIRE 1920 1104 1920 1040
WIRE 1920 1104 1680 1104
WIRE 1920 1120 1920 1104
WIRE 1392 1184 1376 1184
WIRE 1712 1184 1680 1184
WIRE 1920 1216 1920 1200
WIRE 1536 1264 1536 1248
SYMBOL POWERPRODUCTS\\LT1107 1536 1104 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1296 912 R0
SYMATTR InstName V1
SYMATTR Value 2.8
SYMBOL RES 1904 1104 R0
SYMATTR InstName R2
SYMATTR Value 73.5K
SYMBOL RES 1904 944 R0
SYMATTR InstName R1
SYMATTR Value 220K
SYMBOL POLCAP 2016 928 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL RES 2128 912 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL schottky 1792 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL IND 1616 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02 Rpar=5000
FLAG 1536 1264 0
FLAG 1712 1184 0
FLAG 2032 1024 0
FLAG 1920 1216 0
FLAG 1296 1024 0
FLAG 2144 1024 0
FLAG 2144 912 OUT
FLAG 1296 912 IN
TEXT 1904 1280 Left 2 !.tran 10m startup