Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\5d6e9d38f286_1844-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1844-3.3.asy)
I1 OUT 0 {iload} load
XU1 IN 0 IN OUT LTC1844-3.3 ;pnba IN)GND)_SHDN)OUT
V1 IN 0 5
.dc v1 5 2 10m
.measure DC vdrop WHEN V(out)=3.2
.measure DC dropout param Vdrop-3.2
.param iload=150m
.lib LTC1844-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1940 1316
WIRE 64 80 -32 80
WIRE 80 80 64 80
WIRE 432 80 368 80
WIRE -32 96 -32 80
WIRE 432 96 432 80
WIRE -32 192 -32 176
WIRE 432 208 432 176
WIRE 64 240 64 80
WIRE 80 240 64 240
WIRE 224 304 224 288
SYMBOL current 432 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 19 89 Left 2
WINDOW 3 39 42 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMATTR Value {iload}
SYMBOL LTC1844-3.3 224 160 R0
SYMATTR InstName U1
SYMBOL voltage -32 80 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 224 304 0
FLAG -32 192 0
FLAG 432 208 0
FLAG 432 80 OUT
FLAG -32 80 IN
TEXT 632 96 Left 2 !.dc v1 5 2 10m
TEXT 632 184 Left 2 !.measure DC vdrop WHEN V(out)=3.2\n.measure DC dropout param Vdrop-3.2
TEXT 632 136 Left 2 !.param iload=150m
* Z:\home\khalils\Downloads\files\data\raw_asc\f4117f4bf37f_nmos_exp1_vanisha.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N002 0 1.8
V1 N001 0 1.8
M1 N001 N002 0 0 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V1 0 1.8 0.1 V2 0 1.8 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 48 240 48
WIRE 368 80 368 48
WIRE 240 96 240 48
WIRE 192 176 112 176
WIRE 368 176 368 160
WIRE 112 224 112 176
WIRE 240 224 240 192
SYMBOL nmos 192 96 R0
SYMATTR InstName M1
SYMBOL voltage 112 208 R0
SYMATTR InstName V2
SYMATTR Value 1.8
SYMBOL voltage 368 64 R0
SYMATTR InstName V1
SYMATTR Value 1.8
FLAG 240 224 0
FLAG 368 176 0
FLAG 112 304 0
TEXT 232 304 Left 2 !.dc V1 0 1.8 0.1 V2 0 1.8 0.2
* Z:\home\khalils\Downloads\files\data\raw_asc\c2420e84f305_AO4468_test.asc
* Generated by LTspice 26.0.1 for Windows.
* AO4468
* AO3414
* AOD456
* * http://www.aosmd.com/web/products/mosfet.jsp\n* Changes: \n* level=5 to level=3 in the AO4468 and AOD456\n* LAMBDA=1.5 to KAPPA=1.5 in the model AO4468\n* VTO from 1.4V to 2V in the model AO4468
* .dc V1 0 5 .01 V2 0 4 1
XM1 N002 N003 0 AO4468 ;pnba D)G)S
V1 N001 0 5
V2 N003 0 2
R1 N001 N002 1m
.include AO4468.txt
.dc V2 0 4 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 -48 -16 -48
WIRE 256 -16 256 -48
WIRE -16 80 -16 -48
WIRE 256 112 256 64
WIRE 208 192 112 192
WIRE 112 272 112 192
WIRE -16 400 -16 160
WIRE 112 400 112 352
WIRE 112 400 -16 400
WIRE 256 400 256 208
WIRE 256 400 112 400
WIRE -16 416 -16 400
SYMBOL voltage 112 256 R0
SYMATTR InstName V2
SYMATTR Value 2
SYMBOL res 240 -32 R0
SYMATTR InstName R1
SYMATTR Value 1m
SYMBOL voltage -16 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL nmos 208 112 R0
SYMATTR InstName M1
SYMATTR Value AO4468
SYMATTR Prefix X
FLAG -16 416 0
TEXT -16 -128 Left 0 !.include AO4468.txt
TEXT -24 -88 Left 0 !.dc V2 0 4 0.01
TEXT 376 184 Left 0 ;AO4468
TEXT 376 216 Left 0 ;AO3414
TEXT 376 248 Left 0 ;AOD456
TEXT -32 -312 Left 0 ;* http://www.aosmd.com/web/products/mosfet.jsp\n* Changes: \n* level=5 to level=3 in the AO4468 and AOD456\n* LAMBDA=1.5 to KAPPA=1.5 in the model AO4468\n* VTO from 1.4V to 2V in the model AO4468
TEXT 216 -88 Left 0 ;.dc V1 0 5 .01 V2 0 4 1
* Z:\home\khalils\Downloads\files\data\raw_asc\b0239e9d8055_quiz7.asc
* Generated by LTspice 26.0.1 for Windows.
M1 out N002 0 0 NMOS l=l w=w
V2 N001 0 3.3
V1 N002 0 PULSE(0 3.3 1n 1n 1n 1u 2u)
R1 N001 out 50k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc library.mod
.tran 10u
.param w=0.2u+1u
.param l=0.35u
.step param s 0 3u 0.2u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1172 680
WIRE 928 32 736 32
WIRE 640 128 480 128
WIRE 736 144 736 112
WIRE 480 160 480 128
WIRE 736 160 736 144
WIRE 640 240 640 128
WIRE 688 240 640 240
SYMBOL voltage 480 144 R0
WINDOW 3 -113 135 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3.3 1n 1n 1n 1u 2u)
SYMATTR InstName V1
SYMBOL nmos4 688 160 R0
SYMATTR InstName M1
SYMATTR Value2 l=l w=w
SYMBOL res 720 16 R0
SYMATTR InstName R1
SYMATTR Value 50k
SYMBOL voltage 928 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3.3
FLAG 736 256 0
FLAG 736 208 0
FLAG 480 240 0
FLAG 928 112 0
FLAG 736 144 out
TEXT 496 -32 Left 2 !.inc library.mod
TEXT 360 80 Left 2 !.tran 10u
TEXT 496 0 Left 2 !.param w=0.2u+1u\n.param l=0.35u
TEXT 192 -32 Left 2 !.step param s 0 3u 0.2u
* Z:\home\khalils\Downloads\files\data\raw_asc\e7019a014525_lab5.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 V
R1 N002 N001 1120
D1 N002 0 1N914
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 10 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 112 0 112
WIRE 224 112 160 112
WIRE 0 128 0 112
WIRE 224 128 224 112
WIRE 0 224 0 208
WIRE 112 224 0 224
WIRE 224 224 224 192
WIRE 224 224 112 224
WIRE 112 240 112 224
FLAG 112 240 0
SYMBOL voltage 0 112 R0
SYMATTR InstName V1
SYMBOL res 176 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1120
SYMBOL diode 208 128 R0
SYMATTR InstName D1
SYMATTR Value 1N914
TEXT 184 288 Left 2 !.dc V1 0 10 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\164025844b5c_Draft11.asc
* Generated by LTspice 26.0.1 for Windows.
;.op dec 10000000 10Meg 300Meg
;.step param Ctest list 10p 20p 30p
C2 0 N002 34.64p
C1 N002 N001 21.65p
V1 N001 0 AC 1 0
.step param Vtest list 0 1 2 3 4 5
.ac dec 10000000 10Meg 300Meg
.MODEL SMV1130-079LF d CJ0=25.8p Vj=10 M=3.7 Rs=0.8
.lib C:\Users\piyus\Projects\public\fm_radio\sims\varactor_model.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 948 680
WIRE -592 64 -672 64
WIRE -432 64 -528 64
WIRE -336 64 -368 64
WIRE -672 128 -672 64
WIRE -336 144 -336 64
WIRE -672 272 -672 208
SYMBOL cap -528 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 21.65p
SYMBOL voltage -672 112 R0
WINDOW 3 -128 70 Left 2
WINDOW 123 -128 42 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMATTR InstName V1
SYMBOL cap -368 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 34.64p
FLAG -672 272 0
FLAG -336 144 0
TEXT -144 -112 Left 2 !.step param Vtest list 0 1 2 3 4 5
TEXT -928 -56 Left 2 !.ac dec 10000000 10Meg 300Meg
TEXT 216 264 Left 2 !;.op dec 10000000 10Meg 300Meg
TEXT 536 -88 Left 2 !;.step param Ctest list 10p 20p 30p
TEXT -136 -8 Left 2 !.MODEL SMV1130-079LF d CJ0=25.8p Vj=10 M=3.7  Rs=0.8
TEXT -136 56 Left 2 !.lib C:\\Users\\piyus\\Projects\\public\\fm_radio\\sims\\varactor_model.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4620.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4620.asy)
V2 -V 0 -15
Vin IN 0 SINE(0 1 1k)
V1 +V 0 15
Rload OUT 0 2k
XU1 IN OUT +V -V OUT ADA4620 ;pnba In+)In-)V+)V-)OUT
.tran 1m
.lib ADA4620.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE 640 -1216 528 -1216
WIRE 144 -1136 144 -1152
WIRE 256 -1136 256 -1152
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1040 144 -1056
WIRE 256 -1040 256 -1056
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 256 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 144 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 1k)
SYMBOL ADA4620 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 2k
FLAG 144 -1152 +V
FLAG 144 -1040 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1152 -V
FLAG 576 -1072 -V
FLAG 768 -992 0
FLAG 256 -1040 0
TEXT 752 -936 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\0db9dcab4a2d_Fig_2-134_Vswitch.asc
* Generated by LTspice 26.0.1 for Windows.
S1 SW N002 CONT 0 MYSW
V2 N001 0 1
V1 CONT 0 PULSE(0 1 0 0.5m 0.5m 0 1m)
V3 N002 0 -1
R1 SW N001 1K
.model MYSW SW(Ron=1 Roff=1Meg Vt=0.5 Vh=0.2)
.tran 3m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 724
WIRE 224 64 208 64
WIRE 272 64 224 64
WIRE 416 64 352 64
WIRE 208 96 208 64
WIRE 416 96 416 64
WIRE 160 112 112 112
WIRE -48 160 -208 160
WIRE 160 160 -48 160
WIRE -208 208 -208 160
WIRE 208 224 208 176
WIRE 416 224 416 176
WIRE -208 320 -208 288
WIRE 208 336 208 304
FLAG 112 112 0
FLAG 416 224 0
FLAG 208 336 0
FLAG -208 320 0
FLAG -48 160 CONT
FLAG 224 64 SW
SYMBOL sw 208 80 R0
SYMATTR InstName S1
SYMATTR Value MYSW
SYMBOL voltage 416 80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL voltage -208 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 0.5m 0.5m 0 1m)
SYMBOL voltage 208 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value -1
SYMBOL res 256 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1K
TEXT -224 416 Left 2 !.model MYSW SW(Ron=1 Roff=1Meg Vt=0.5 Vh=0.2)
TEXT -224 368 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\0a7ef828cb78_Nand.asc
* Generated by LTspice 26.0.1 for Windows.
M2 N001 Vin1 0 0 NMOS l=180nm w=270nm
M1 Vout Vin2 N001 0 NMOS l=180nm w=270nm
M4 Vhigh Vin2 Vout Vhigh PMOS l=180nm w=810nm
M3 Vhigh Vin1 Vout Vhigh PMOS l=180nm w=810nm
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 -240 32 -240
WIRE 224 -240 80 -240
WIRE 464 -240 224 -240
WIRE 32 -160 32 -240
WIRE 32 -160 -32 -160
WIRE 160 -160 32 -160
WIRE -32 -112 -32 -160
WIRE 160 -112 160 -160
WIRE 80 -64 80 -240
WIRE 80 -64 -32 -64
WIRE 224 -64 224 -240
WIRE 224 -64 160 -64
WIRE -80 -32 -272 -32
WIRE 112 -32 16 -32
WIRE -32 16 -32 -16
WIRE 80 16 -32 16
WIRE 160 16 160 -16
WIRE 160 16 80 16
WIRE 80 80 80 16
WIRE 656 80 80 80
WIRE 80 96 80 80
WIRE 16 112 16 -32
WIRE 16 112 -176 112
WIRE 256 144 80 144
WIRE 16 176 16 112
WIRE 32 176 16 176
WIRE 80 256 80 192
WIRE 176 304 80 304
WIRE -272 336 -272 -32
WIRE 32 336 -272 336
WIRE 176 352 176 304
WIRE 256 352 256 144
WIRE 256 352 176 352
WIRE 80 384 80 352
WIRE 176 384 176 352
WIRE 176 384 80 384
WIRE 80 400 80 384
WIRE 80 416 80 400
IOPIN -272 -32 In
IOPIN -176 112 In
IOPIN 656 80 Out
IOPIN 80 400 In
IOPIN 464 -240 In
SYMBOL pmos4 112 -112 R0
SYMATTR InstName M4
SYMATTR Value2 l=180nm w=810nm
SYMBOL pmos4 -80 -112 R0
SYMATTR InstName M3
SYMATTR Value2 l=180nm w=810nm
SYMBOL nmos4 32 96 R0
SYMATTR InstName M1
SYMATTR Value2 l=180nm w=270nm
SYMBOL nmos4 32 256 R0
SYMATTR InstName M2
SYMATTR Value2 l=180nm w=270nm
FLAG -272 -32 Vin1
FLAG -176 112 Vin2
FLAG 656 80 Vout
FLAG 80 416 0
FLAG 80 400 Vlow
FLAG 464 -240 Vhigh
* Z:\home\khalils\Downloads\files\data\raw_asc\5b333b880cfb_1077A.asc
* Generated by LTspice 26.0.1 for Windows.
* Half-Wave Rectifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1077A.asy)
R2 N001 IN 1Meg
XU1 N002 N001 +V 0 OUT LT1078 ;pnba In+)In-)V+)V-)OUT
R1 OUT N001 2Meg
V3 IN 0 SINE(0 1 100)
V1 +V 0 3
R3 N002 0 1Meg
.tran .1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -96 96 -128 96
WIRE 16 96 -16 96
WIRE 48 96 16 96
WIRE 144 96 128 96
WIRE 160 96 144 96
WIRE 256 96 240 96
WIRE 192 208 192 192
WIRE 144 224 144 96
WIRE 160 224 144 224
WIRE -96 240 -96 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 288 240 256 240
WIRE 64 256 48 256
WIRE 160 256 144 256
WIRE 192 288 192 272
WIRE -96 336 -96 320
SYMBOL res 160 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL voltage -96 224 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL opamps\\LT1077A 192 176 R0
SYMATTR InstName U1
SYMBOL res 144 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL voltage 0 96 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2Meg
FLAG -96 336 0
FLAG 192 192 +V
FLAG -96 224 +V
FLAG -128 96 0
FLAG 48 256 0
FLAG 192 288 0
FLAG 16 96 IN
FLAG 288 240 OUT
TEXT 296 320 Left 2 !.tran .1
TEXT 152 32 Bottom 2 ;Half-Wave Rectifier
* Z:\home\khalils\Downloads\files\data\raw_asc\d9ebef71586b_bjt_output_characteristics.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 N004 0 0 BC547B
R2 N002 N001 1
VBE N003 0 500m
VCE N002 0 20
R1 N004 N003 10k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VCE 0 20 2 VBE 500m 4000m 500m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 240 0 160 0
WIRE 416 0 320 0
WIRE 160 112 160 0
WIRE 416 112 416 0
WIRE -64 160 -160 160
WIRE 96 160 16 160
WIRE -160 208 -160 160
WIRE -160 352 -160 288
WIRE 160 352 160 208
WIRE 160 352 -160 352
WIRE 416 352 416 192
WIRE 416 352 160 352
WIRE 160 384 160 352
SYMBOL voltage -160 192 R0
SYMATTR InstName VBE
SYMATTR Value 500m
SYMBOL res 32 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL npn 96 112 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL res 336 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL voltage 416 96 R0
SYMATTR InstName VCE
SYMATTR Value 20
FLAG 160 384 0
TEXT -80 432 Left 2 !.dc VCE 0 20 2 VBE 500m 4000m 500m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3012.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 3.3
R1 OUT N001 750K
R2 N001 0 249K
Rload OUT 0 100
XU1 IN OUT IN N001 0 LT3012 ;pnba IN)OUT)_SHDN)ADJ)GND
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3012.asy)
.lib LT3012.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 128 -96 128
WIRE 80 128 -64 128
WIRE 112 128 80 128
WIRE 432 128 400 128
WIRE 576 128 432 128
WIRE 624 128 576 128
WIRE 672 128 624 128
WIRE 432 144 432 128
WIRE 672 144 672 128
WIRE -96 160 -96 128
WIRE 576 160 576 128
WIRE 80 224 80 128
WIRE 112 224 80 224
WIRE 432 224 400 224
WIRE 432 240 432 224
WIRE 576 240 576 224
WIRE 672 240 672 224
WIRE -96 272 -96 240
WIRE 256 304 256 288
WIRE 432 336 432 320
FLAG 256 304 0
FLAG -96 272 0
FLAG 672 240 0
FLAG 576 240 0
FLAG 432 336 0
FLAG 624 128 OUT
FLAG -64 128 IN
SYMBOL voltage -96 144 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 560 160 R0
SYMATTR InstName C1
SYMATTR Value 3.3
SYMBOL res 416 128 R0
SYMATTR InstName R1
SYMATTR Value 750K
SYMBOL res 416 224 R0
SYMATTR InstName R2
SYMATTR Value 249K
SYMBOL res 656 128 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL LT3012 256 160 R0
SYMATTR InstName U1
TEXT 584 312 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL40502-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL40502-1.8.asy)
Rload vOUT 0 9
V1 vIN 0 2.3
XU1 vIN 0 vIN vOUT ADPL40502-1.8 ;pnba Vin)GND)EN)Vout
C1 vOUT 0 1 Rser=1m
.tran 1m startup
.lib ADPL40502-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2808 1464
WIRE 1824 880 1728 880
WIRE 1984 880 1824 880
WIRE 1728 896 1728 880
WIRE 1984 896 1984 880
WIRE 1728 992 1728 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL ADPL40502-1.8 1984 1024 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1728 880 R0
SYMATTR InstName V1
SYMATTR Value 2.3
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 9
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMATTR SpiceLine Rser=1m
FLAG 2256 1024 vOUT
FLAG 2256 1136 0
FLAG 1728 992 0
FLAG 1728 880 vIN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 1m startup
* Z:\tmp\asc_dec_bjh7r6w2\144e3557fa56_AD8613_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 0 10K
Rload OUT 0 10K
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 752 -992 752 -1008
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
* Z:\home\khalils\Downloads\files\data\raw_asc\29009d27d68d_AD8664.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8664.asy)
V2 -V 0 -8
R1 N001 0 10K
Vin IN 0 SINE(0 1 1K)
V1 +V 0 8
Rload OUT 0 10K
XU1 IN N001 +V -V OUT AD8664 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 10K
.tran 10m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 8
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -8
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 1K)
SYMBOL AD8664 576 -1168 R0
SYMATTR InstName U1
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
TEXT 688 -952 Left 2 !.tran 10m
* Z:\tmp\asc_dec_bjh7r6w2\0d05f881aa1a_imp_emit_flw_ltspice_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V3 Vn 0 -5
Q1 Vp W1 2+ 0 2N3904
Q2 2+ N002 N004 0 2N3904
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 544 -160 544 -224
WIRE 368 -112 368 -144
WIRE 368 -112 352 -112
WIRE 480 -112 368 -112
WIRE -144 -64 -144 -112
WIRE -16 -64 -16 -112
WIRE 544 -16 544 -64
WIRE 592 -16 544 -16
WIRE 352 48 272 48
WIRE -144 64 -144 16
WIRE -16 64 -16 16
WIRE 352 80 352 48
WIRE 544 144 544 -16
WIRE 352 176 352 160
WIRE 352 176 256 176
WIRE 352 192 352 176
WIRE 480 192 352 192
WIRE 352 256 352 192
WIRE 288 304 256 304
WIRE 544 384 544 240
SYMBOL voltage -16 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL npn 480 -160 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL npn 480 144 R0
SYMATTR InstName Q2
SYMATTR Value 2N3904
FLAG 352 -112 W1
FLAG 544 -224 Vp
FLAG -144 64 0
FLAG -16 64 0
FLAG -144 -112 Vp
FLAG -16 -112 Vn
FLAG 368 -144 1+
FLAG 592 -16 2+
* Z:\home\khalils\Downloads\files\data\raw_asc\432d5d0cf1c6_BT-CB-OUT.asc
* Generated by LTspice 26.0.1 for Windows.
Vcb N002 0 0
Iee N001 0 0
Q1 N002 0 N001 0 BC547B
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Vcb -0.7V 6V Iee list 1mA 2mA 5mA
.meas dc Ic find Ic(Q1) when Vcb=5V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 112 32 112
WIRE 368 112 256 112
WIRE 32 144 32 112
WIRE 368 144 368 112
WIRE 32 256 32 224
WIRE 208 256 208 176
WIRE 368 256 368 224
SYMBOL npn 256 176 M270
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL voltage 368 128 R0
WINDOW 3 24 32 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 0
SYMATTR InstName Vcb
SYMBOL current 32 144 R0
WINDOW 0 37 39 Left 2
WINDOW 3 24 0 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Iee
SYMATTR Value 0
FLAG 208 256 0
FLAG 32 256 0
FLAG 368 256 0
TEXT 8 304 Left 2 !.dc Vcb -0.7V 6V  Iee  list 1mA 2mA 5mA
TEXT 8 336 Left 2 !.meas dc Ic  find Ic(Q1) when Vcb=5V