Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3646.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3646.asy)
V1 IN 0 24
L1 N003 OUT 3.3 Rser=50m
C1 N002 0 4.7
Rload OUT 0 5
C2 OUT 0 15 Rser=10m
R2 N004 0 56.2K
C3 N001 N003 .1
R1 OUT N004 412K
XU1 0 N004 N002 N002 OUT NC_01 N002 IN N003 N001 N002 0 IN IN 0 LTC3646 ;pnba SGND)FB)Ith)Rt)Von)Pgood)Mode/SYNC)PVin)SW)Boost)IntVcc)ExtVcc)Run)SVin)PGND
.tran 500u startup
.lib LTC3646.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 -128 -128 -128
WIRE 208 -128 32 -128
WIRE -128 -112 -128 -128
WIRE 208 -112 208 -128
WIRE 32 -48 32 -128
WIRE 48 -48 32 -48
WIRE -128 -16 -128 -32
WIRE 32 48 32 -48
WIRE 48 48 32 48
WIRE 688 48 368 48
WIRE 48 144 32 144
WIRE 400 144 368 144
WIRE 400 160 400 144
WIRE -48 240 -64 240
WIRE 32 240 16 240
WIRE 48 240 32 240
WIRE 400 240 400 224
WIRE 400 240 368 240
WIRE 464 240 400 240
WIRE 576 240 544 240
WIRE 688 240 688 48
WIRE 688 240 576 240
WIRE 768 240 688 240
WIRE 576 256 576 240
WIRE 768 256 768 240
WIRE 688 272 688 240
WIRE 32 336 32 240
WIRE 48 336 32 336
WIRE 576 336 368 336
WIRE 576 352 576 336
WIRE 688 352 688 336
WIRE 768 352 768 336
WIRE 32 432 32 336
WIRE 48 432 32 432
WIRE 384 432 368 432
WIRE 576 448 576 432
WIRE 160 512 160 496
WIRE 256 512 256 496
WIRE 32 544 32 432
WIRE 384 544 384 432
WIRE 384 544 32 544
SYMBOL cap 384 160 R0
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL res 560 240 R0
SYMATTR InstName R1
SYMATTR Value 412K
SYMBOL voltage -128 -128 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL PowerProducts\\LTC3646 208 192 R0
SYMATTR InstName U1
SYMBOL cap 672 272 R0
SYMATTR InstName C2
SYMATTR Value 15
SYMATTR SpiceLine Rser=10m
SYMBOL res 560 336 R0
SYMATTR InstName R2
SYMATTR Value 56.2K
SYMBOL ind 448 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=50m
SYMBOL res 752 240 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL cap 16 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7
FLAG 160 512 0
FLAG 256 512 0
FLAG 32 144 0
FLAG -64 240 0
FLAG -128 -16 0
FLAG 688 352 0
FLAG 768 352 0
FLAG -128 -128 IN
FLAG 768 240 OUT
FLAG 576 448 0
TEXT 528 504 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5696R.asc
* Generated by LTspice 26.0.1 for Windows.
CLOAD vOUT 0 10n
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
V1 Vdd 0 5
Vdac1 NC_01 0 1.25
I1 0 0 100 AC 1
XU2 vDAC Vdd 0 vOUT AD5696R Gain=2 ;pnba Vdac)Vdd)GND)Vout
.tran 200u
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5696R.asy)
.lib AD5696R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 272 112 192 112
WIRE 464 112 272 112
WIRE -800 144 -800 112
WIRE 272 160 272 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 100
SYMBOL AD5696R -208 112 R0
SYMATTR InstName U2
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2
* Z:\home\khalils\Downloads\files\data\raw_asc\1d3106c62b1d_simulacionDiodo1N4007.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 0 1N4007
R1 N002 N001 1K
V1 N001 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -2 10 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 128 96 48 96
WIRE 272 96 208 96
WIRE 48 128 48 96
WIRE 272 128 272 96
WIRE 48 224 48 192
WIRE 272 224 272 192
WIRE 272 224 48 224
WIRE 48 256 48 224
FLAG 48 256 0
SYMBOL diode 256 128 R0
SYMATTR InstName D1
SYMATTR Value 1N4007
SYMBOL res 224 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL Misc\\cell 48 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
TEXT 72 264 Left 2 !.dc V1 -2 10 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\e2fc0dbf9cf9_xor_transfer.asc
* Generated by LTspice 26.0.1 for Windows.
AX2 0 0 0 0 0 0 0 0 XOR ll=180n wn={nnw} wp={nnw*mp}
V1 vdd 0 {vv}
C1 out 0 1f
V2 b 0 PULSE({vv} 0 1000p 1p 1p 2000p 4000p 5)
V3 N001 0 PULSE(0 0 2000p 1p 1p 2000p 4000p 5)
.param vv=1.8 nnw=2*180n mp=2.5
.lib BU_180nm.lib
.meas tran t1 find time when v(out)=vv*0.1 rise 1
.meas tran t2 find time when v(out)=vv*0.9 rise 1
.meas tran t3 find time when v(out)=vv*0.1 fall 1
.meas tran t4 find time when v(out)=vv*0.9 fall 1
.meas tran transition_up param abs(t2-t1)
.meas tran transition_down param abs(t4-t3)
.meas tran ratio param upslope/downslope
.meas dc vi_mid param (vil+vih)/2
.meas dc vil when d(v(out))=-1 fall 1
.meas dc vih when d(v(out))=-1 rise 1
.dc V2 0 {vv} 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1312 680
WIRE 320 224 -64 224
WIRE 416 224 320 224
WIRE -64 272 -64 224
WIRE 416 288 416 224
WIRE 320 304 320 224
WIRE 384 304 320 304
WIRE 496 320 448 320
WIRE 592 320 496 320
WIRE 384 336 240 336
WIRE 240 400 240 336
WIRE 416 400 416 352
WIRE 592 400 592 384
WIRE 592 400 416 400
WIRE 416 416 416 400
WIRE 80 432 80 304
SYMBOL /voltage 80 416 R0
SYMATTR InstName V3
SYMATTR Value PULSE(0 0 2000p 1p 1p 2000p 4000p 5)
SYMBOL /voltage 240 384 R0
SYMATTR InstName V2
SYMATTR Value PULSE({vv} 0 1000p 1p 1p 2000p 4000p 5)
SYMBOL /voltage -64 256 R0
SYMATTR InstName V1
SYMATTR Value {vv}
SYMBOL cap 576 320 R0
SYMATTR InstName C1
SYMATTR Value 1f
SYMBOL xor 416 320 R0
SYMATTR InstName X2
SYMATTR SpiceLine ll=180n wn={nnw} wp={nnw*mp}
FLAG -64 352 0
FLAG 240 480 0
FLAG 416 416 0
FLAG -64 224 vdd
FLAG 416 400 vss
FLAG 240 336 b
FLAG 496 320 out
FLAG 80 512 0
TEXT -88 72 Left 2 !.param vv=1.8 nnw=2*180n mp=2.5\n.lib BU_180nm.lib
TEXT 728 72 Left 2 !.meas tran t1 find time when v(out)=vv*0.1 rise 1\n.meas tran t2 find time when v(out)=vv*0.9 rise 1\n.meas tran t3 find time when v(out)=vv*0.1 fall 1\n.meas tran t4 find time when v(out)=vv*0.9 fall 1\n.meas tran transition_up param abs(t2-t1)\n.meas tran transition_down param abs(t4-t3)\n.meas tran ratio param upslope/downslope
TEXT 736 296 Left 2 !.meas dc vi_mid param (vil+vih)/2
TEXT 736 320 Left 2 !.meas dc vil when d(v(out))=-1 fall 1
TEXT 736 344 Left 2 !.meas dc vih when d(v(out))=-1 rise 1
TEXT -88 152 Left 2 !.dc V2 0 {vv} 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\08708955e017_DCOffsetInputFilter.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N001 0 220k
R1 N002 Vcc 470k
R2 0 N002 470k
C1 N002 N001 330n
V1 N001 0 SINE(0.1 600m 440 10m 0 0 200) AC 0.1
V2 Vcc 0 9
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1744
WIRE -320 1184 -320 1136
WIRE 32 1264 32 1232
WIRE -320 1312 -320 1264
WIRE -336 1488 -560 1488
WIRE -176 1488 -336 1488
WIRE 32 1488 32 1344
WIRE 32 1488 -112 1488
WIRE -560 1552 -560 1488
WIRE -336 1552 -336 1488
WIRE 32 1552 32 1488
WIRE -560 1712 -560 1632
WIRE -336 1712 -336 1632
WIRE 32 1712 32 1632
SYMBOL res -352 1536 R0
SYMATTR InstName R3
SYMATTR Value 220k
SYMBOL res 48 1648 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 470k
SYMBOL voltage -320 1168 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 9
SYMBOL voltage -560 1536 R0
WINDOW 3 -270 190 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0.1 600m 440 10m 0 0 200)
SYMATTR Value2 AC 0.1
SYMBOL res 48 1360 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 470k
SYMBOL cap -112 1472 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 330n
FLAG -336 1712 0
FLAG -560 1712 0
FLAG 32 1712 0
FLAG 32 1232 Vcc
FLAG -320 1136 Vcc
FLAG -320 1312 0
* Z:\home\khalils\Downloads\files\data\raw_asc\34f34aa41f90_CompPentoCarG1Step.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N003 N002 0 N001 EL34Pent Pentrode ;pnba Cathode)G1)G2)G3)Anode
Vg1 N003 0 0
Vg2 N002 0 350
XU2 0 N003 N002 0 N001 7591Pent Pentrode ;pnba Cathode)G1)G2)G3)Anode
Vp N001 0 0
.dc Vp 0 500 100 Vg1 0 -50 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 64 -144 64
WIRE 288 64 48 64
WIRE 368 80 144 80
WIRE 208 96 -64 96
WIRE 48 112 48 64
WIRE 288 112 288 64
WIRE -144 128 -144 64
WIRE 0 160 -16 160
WIRE 240 160 224 160
WIRE 144 176 144 80
WIRE 144 176 96 176
WIRE 368 176 368 80
WIRE 368 176 336 176
WIRE -64 192 -64 96
WIRE 0 192 -64 192
WIRE 144 192 144 176
WIRE 208 192 208 96
WIRE 240 192 208 192
WIRE -64 208 -64 192
WIRE 224 256 224 160
WIRE 256 256 256 240
WIRE 256 256 224 256
WIRE -144 304 -144 208
WIRE -64 304 -64 288
WIRE -64 304 -144 304
WIRE -16 304 -16 160
WIRE -16 304 -64 304
WIRE 16 304 16 240
WIRE 16 304 -16 304
WIRE 144 304 144 272
WIRE 144 304 16 304
WIRE 224 304 224 256
WIRE 224 304 144 304
WIRE 16 320 16 304
SYMBOL Valve\\Pentode 48 176 R0
WINDOW 0 -71 -61 Left 0
WINDOW 38 34 105 Center 0
SYMATTR InstName U1
SYMATTR SpiceModel EL34Pent
SYMBOL voltage 144 176 R0
WINDOW 0 -19 60 Left 0
SYMATTR InstName Vg2
SYMATTR Value 350
SYMBOL voltage -144 112 R0
WINDOW 0 -16 57 Left 0
SYMATTR InstName Vp
SYMATTR Value 0
SYMBOL Valve\\Pentode 288 176 R0
WINDOW 0 -66 -63 Left 0
WINDOW 38 5 104 Center 0
SYMATTR InstName U2
SYMATTR SpiceModel 7591Pent
SYMBOL voltage -64 192 R0
WINDOW 0 -18 61 Left 0
SYMATTR InstName Vg1
SYMATTR Value 0
FLAG 16 320 0
TEXT 40 320 Left 0 !.dc Vp 0 500 100 Vg1 0 -50 10
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4807-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4807-1.asy)
V1 +V 0 5
XU1 IN N001 +V -V OUT NC_01 ADA4807 ;pnba 100)101)102)103)104)106
R1 N001 0 1K
V3 -V 0 -5
R2 OUT N001 1K
V2 IN 0 SINE(0 0.5 250K)
.tran 50u
.lib ADA4807.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 416 -1232 400 -1232
WIRE 512 -1232 496 -1232
WIRE 544 -1232 512 -1232
WIRE 640 -1232 624 -1232
WIRE 176 -1136 176 -1152
WIRE 288 -1136 288 -1152
WIRE 560 -1136 560 -1152
WIRE 512 -1120 512 -1232
WIRE 544 -1120 512 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 704 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 432 -1072 432 -1088
WIRE 560 -1056 560 -1072
WIRE 176 -1040 176 -1056
WIRE 288 -1040 288 -1056
WIRE 432 -976 432 -992
SYMBOL voltage 176 -1152 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 288 -1152 R0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 0.5 250K)
SYMBOL opamps\\ADA4807-1 576 -1104 R0
SYMATTR InstName U1
SYMBOL res 512 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG 176 -1152 +V
FLAG 176 -1040 0
FLAG 432 -976 0
FLAG 704 -1104 OUT
FLAG 432 -1088 IN
FLAG 560 -1152 +V
FLAG 288 -1152 -V
FLAG 288 -1040 0
FLAG 400 -1232 0
FLAG 560 -1056 -V
TEXT 728 -976 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADR5040.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR5040.asy)
XU1 OUT 0 ADR5040 ;pnba 1)2
Vin IN 0 3
Rbias IN OUT 2.67k
Rload OUT 0 10k
.dc TEMP -40 125 .1
.lib ADR5040.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 960
WIRE 32 64 -80 64
WIRE 208 64 112 64
WIRE 464 64 208 64
WIRE -80 112 -80 64
WIRE 208 112 208 64
WIRE 464 112 464 64
WIRE -80 224 -80 192
WIRE 208 224 208 176
WIRE 208 224 -80 224
WIRE 464 224 464 192
WIRE 464 224 208 224
WIRE -80 256 -80 224
SYMBOL voltage -80 96 R0
WINDOW 3 36 62 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 30 32 Left 2
SYMATTR Value 3
SYMATTR InstName Vin
SYMBOL res 16 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rbias
SYMATTR Value 2.67k
SYMBOL ADR5040 208 144 R0
SYMATTR InstName U1
SYMBOL res 448 96 R0
SYMATTR InstName Rload
SYMATTR Value 10k
FLAG -80 64 IN
FLAG -80 256 0
FLAG 464 64 OUT
TEXT -88 -32 Left 2 !.dc TEMP -40 125 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1004-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1004-1.2.asy)
XU1 OUT 0 LT1004-1.2 ;pnba VOUT)GND
V1 N001 0 PULSE(0 5 100u 10n 10n 500u 1)
R1 OUT N001 36K
.tran 700u
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 980 680
WIRE 96 112 -144 112
WIRE 368 112 176 112
WIRE -144 128 -144 112
WIRE 368 128 368 112
WIRE -144 224 -144 208
WIRE 368 224 368 192
SYMBOL voltage -144 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 100u 10n 10n 500u 1)
SYMBOL LT1004-1.2 368 160 R0
SYMATTR InstName U1
SYMBOL res 192 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 36K
FLAG 368 224 0
FLAG -144 224 0
FLAG 368 112 OUT
TEXT 392 288 Left 2 !.tran 700u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1259.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 -V 0 -5
R1 OUT N001 1.6K
R2 N001 0 1.6K
V3 IN 0 SINE(0 1 1K)
XU1 IN N001 +V -V OUT LT1259 ;pnba In+)In-)V+)V-)OUT
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1259.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -288 144 -288 128
WIRE -160 144 -160 128
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE -288 240 -288 224
WIRE -160 240 -160 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 288 240 256 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
FLAG -160 240 0
FLAG 192 192 +V
FLAG -160 128 +V
FLAG 192 288 -V
FLAG -288 240 0
FLAG -288 128 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 288 240 OUT
FLAG 0 256 IN
SYMBOL voltage -160 128 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -288 128 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1.6K
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1.6K
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL opamps\\LT1259 192 176 R0
SYMATTR InstName U1
TEXT 264 336 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\f438f881ff9d_1151.asc
* Generated by LTspice 26.0.1 for Windows.
* High Voltage Instrumentation Amplifier
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC1151.asy)
R2 N001 0 1Meg
XU2 IN+ N003 +V -V OUT LTC1151 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
XU1 IN- N001 +V -V N002 LTC1151 ;pnba In+)In-)V+)V-)OUT
R3 N003 N002 1K
R1 N002 N001 1K
V2 IN+ 0 SINE(0 1 10)
R4 OUT N003 1Meg
V3 IN- IN+ SINE(0 1m 100)
V4 -V 0 -15
.tran .3
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 160 96 128 96
WIRE 272 96 240 96
WIRE 416 96 400 96
WIRE 512 96 496 96
WIRE -192 112 -192 96
WIRE -96 112 -96 96
WIRE -192 208 -192 192
WIRE -96 208 -96 192
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 448 224 448 208
WIRE 272 240 272 96
WIRE 272 240 224 240
WIRE 304 240 272 240
WIRE 400 240 400 96
WIRE 400 240 384 240
WIRE 416 240 400 240
WIRE 112 256 -16 256
WIRE 160 256 112 256
WIRE 512 256 512 96
WIRE 512 256 480 256
WIRE 576 256 512 256
WIRE -16 272 -16 256
WIRE 416 272 400 272
WIRE 192 288 192 272
WIRE 448 304 448 288
WIRE -16 384 -16 352
WIRE 352 384 -16 384
WIRE 400 384 400 272
WIRE 400 384 352 384
WIRE -16 400 -16 384
WIRE -16 496 -16 480
SYMBOL res 512 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL voltage -96 96 R0
SYMATTR InstName V4
SYMATTR Value -15
SYMBOL opamps\\LTC1151 448 192 R0
SYMATTR InstName U2
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL opamps\\LTC1151 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -192 96 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -16 384 R0
WINDOW 3 26 93 Left 0
SYMATTR Value SINE(0 1 10)
SYMATTR InstName V2
SYMBOL res 400 224 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -16 256 R0
WINDOW 0 24 24 Left 0
WINDOW 3 24 94 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1m 100)
FLAG -192 208 0
FLAG 192 192 +V
FLAG -192 96 +V
FLAG 16 96 0
FLAG -16 496 0
FLAG 448 208 +V
FLAG 576 256 OUT
FLAG 112 256 IN-
FLAG 352 384 IN+
FLAG -96 208 0
FLAG -96 96 -V
FLAG 192 288 -V
FLAG 448 304 -V
TEXT 432 416 Left 0 !.tran .3
TEXT 304 48 Bottom 0 ;High Voltage Instrumentation Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\008c8c556c03_ip_at_HV_side.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 3.3
R2 N002 HV 10K
V3 HV 0 PULSE(0 5 0 0 0 100ms 200ms 10)
M1 HV N001 LV LV BSS123
V2 N002 0 5
R1 N001 LV 10K
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 -112 0 -112
WIRE 96 -48 96 -112
WIRE 240 -48 96 -48
WIRE 512 -48 416 -48
WIRE 0 -16 0 -32
WIRE 416 16 416 -48
WIRE 512 64 512 32
WIRE 96 80 96 -48
WIRE 240 112 240 -48
WIRE 16 160 -272 160
WIRE 192 160 192 144
WIRE 192 160 96 160
WIRE 224 160 192 160
WIRE 416 160 416 96
WIRE 416 160 320 160
WIRE 464 160 464 144
WIRE 464 160 416 160
WIRE -272 192 -272 160
WIRE 16 240 16 160
WIRE 208 240 16 240
WIRE -272 320 -272 272
WIRE 208 352 208 240
WIRE 416 352 416 160
WIRE 416 352 208 352
SYMBOL nmos 320 112 R90
SYMATTR InstName M1
SYMATTR Value BSS123
SYMBOL res 80 64 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -272 176 R0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 0 0 100ms 200ms 10)
SYMBOL voltage 0 -128 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage 512 -64 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 400 0 R0
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 0 -16 0
FLAG 512 64 0
FLAG -272 320 0
FLAG 464 144 HV
FLAG 192 144 LV
TEXT -288 80 Left 2 !.tran 2
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8668.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8668.asy)
R2 OUT N001 10K
Rload OUT 0 10K
V1 +V 0 8
Vin IN 0 SINE(0 1 1K)
XU1 IN N001 +V -V OUT AD8668 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 10K
V2 -V 0 -8
.tran 10m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -8
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 8
SYMBOL AD8668 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 1K)
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
TEXT 696 -960 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3302C-05.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N003 OUT 330n Rser=2m
R1 OUT N004 47.5K
V1 IN 0 4
R2 N004 0 18.2K
C1 OUT 0 10 m=2 Rser=10m
R3 OUT N002 500K
C3 OUT N004 10p
Rload OUT 0 0.9
C2 N001 0 1
XU1 IN N001 N003 N004 0 0 N001 N002 N001 LTC3302C-05 ;pnba VIN)EN)SW)FB)AGND)PGND)AVIN)PGOOD)MODE/SYNC
.tran 1.5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3302C-05.asy)
.lib LTC3302C-05.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2652 1736
WIRE 1392 1248 1360 1248
WIRE 1712 1248 1392 1248
WIRE 1360 1264 1360 1248
WIRE 1712 1296 1712 1248
WIRE 1360 1360 1360 1344
WIRE 1488 1360 1424 1360
WIRE 1552 1360 1488 1360
WIRE 1904 1360 1872 1360
WIRE 2016 1360 1984 1360
WIRE 1424 1376 1424 1360
WIRE 1424 1456 1424 1440
WIRE 1488 1472 1488 1360
WIRE 1552 1472 1488 1472
WIRE 1904 1472 1872 1472
WIRE 2016 1472 2016 1360
WIRE 2016 1472 1984 1472
WIRE 2128 1472 2016 1472
WIRE 2224 1472 2128 1472
WIRE 2272 1472 2224 1472
WIRE 2320 1472 2272 1472
WIRE 2016 1488 2016 1472
WIRE 2128 1488 2128 1472
WIRE 2224 1488 2224 1472
WIRE 2320 1488 2320 1472
WIRE 1488 1584 1488 1472
WIRE 1552 1584 1488 1584
WIRE 2016 1584 2016 1568
WIRE 2016 1584 1872 1584
WIRE 2128 1584 2128 1552
WIRE 2128 1584 2016 1584
WIRE 2224 1584 2224 1552
WIRE 2320 1584 2320 1568
WIRE 2016 1600 2016 1584
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
WIRE 2016 1696 2016 1680
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1360 1360 0
FLAG 2320 1584 0
FLAG 2016 1696 0
FLAG 2224 1584 0
FLAG 1392 1248 IN
FLAG 2272 1472 OUT
FLAG 1424 1456 0
SYMBOL ind 1888 1488 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 330n
SYMATTR SpiceLine Rser=2m
SYMBOL RES 2000 1472 R0
SYMATTR InstName R1
SYMATTR Value 47.5K
SYMBOL VOLTAGE 1360 1248 R0
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL res 2000 1584 R0
SYMATTR InstName R2
SYMATTR Value 18.2K
SYMBOL cap 2208 1488 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 m=2
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=10m
SYMBOL res 2000 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 500K
SYMBOL cap 2112 1488 R0
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL res 2304 1472 R0
SYMATTR InstName Rload
SYMATTR Value 0.9
SYMBOL cap 1408 1376 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL LTC3302C-05 1712 1456 R0
SYMATTR InstName U1
TEXT 2200 1696 Left 2 !.tran 1.5m startup