* Z:\home\khalils\Downloads\files\data\raw_asc\LT3030.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 OUT1 N002 0 N001 IN IN IN IN OUT2 N005 N004 N003 N006 LT3030 ;pnba OUT1)ADJ1)GND)BYP1)_SHDN1)_SHDN2)IN2)IN1)OUT2)ADJ2)BYP2)PWRGD1)PWRGD2
V1 IN 0 PWL(0 0 1 2.5)
R1 IN N003 1Meg
R2 IN N006 1Meg
C1 OUT1 N001 10n
R3 OUT1 N002 113K
R4 N002 0 237K
C2 OUT1 0 10 V=6.3 Irms=0 Rser=0.001 Lser=0 mfg="TDK" pn="C3216X5ROJ106M" type="X5R"
Rload1 OUT1 0 2.4
C3 OUT2 N004 10n
R5 OUT2 N005 54.9K
R6 N005 0 237K
C4 OUT2 0 3.3 V=6.3 Irms=0 Rser=0.006 Lser=0 mfg="TDK" pn="C2012X5ROJ335K" type="X5R"
Rload2 OUT2 0 6
.tran 2
* Note: \nThe model uses 2.2 V as the threshold for the minimum input voltage \nto ensure that the worst case scenario is covered.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3030.asy)
.lib LT3030.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1000 680
WIRE -32 -64 -256 -64
WIRE 80 -64 -32 -64
WIRE 432 -64 384 -64
WIRE 512 -64 432 -64
WIRE 624 -64 512 -64
WIRE 704 -64 624 -64
WIRE -256 -48 -256 -64
WIRE 432 -48 432 -64
WIRE 512 -48 512 -64
WIRE 624 -48 624 -64
WIRE 704 -48 704 -64
WIRE -32 32 -32 -64
WIRE 80 32 -32 32
WIRE 432 32 432 16
WIRE 432 32 384 32
WIRE -256 48 -256 32
WIRE 624 48 624 16
WIRE 704 48 704 32
WIRE 512 64 512 32
WIRE 512 64 432 64
WIRE 512 80 512 64
WIRE -32 128 -32 32
WIRE 80 128 -32 128
WIRE 432 128 432 64
WIRE 432 128 384 128
WIRE 512 176 512 160
WIRE -32 224 -32 128
WIRE 80 224 -32 224
WIRE 432 224 384 224
WIRE 512 224 432 224
WIRE 624 224 512 224
WIRE 704 224 624 224
WIRE 432 240 432 224
WIRE 512 240 512 224
WIRE 624 240 624 224
WIRE 704 240 704 224
WIRE -32 320 -32 224
WIRE -16 320 -32 320
WIRE 80 320 64 320
WIRE 432 320 432 304
WIRE 432 320 384 320
WIRE 624 336 624 304
WIRE 704 336 704 320
WIRE 512 352 512 320
WIRE 512 352 432 352
WIRE 512 368 512 352
WIRE -32 416 -32 320
WIRE -16 416 -32 416
WIRE 80 416 64 416
WIRE 432 416 432 352
WIRE 432 416 384 416
WIRE 512 464 512 448
WIRE 240 480 240 464
FLAG 240 480 0
FLAG -256 48 0
FLAG -256 -64 IN
FLAG 512 176 0
FLAG 624 48 0
FLAG 704 48 0
FLAG 704 -64 OUT1
FLAG 512 464 0
FLAG 624 336 0
FLAG 704 336 0
FLAG 704 224 OUT2
SYMBOL PowerProducts\\LT3030 240 176 R0
SYMATTR InstName U1
SYMBOL voltage -256 -64 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 2.5)
SYMBOL res -32 336 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL res -32 432 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL cap 416 -48 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 496 -64 R0
SYMATTR InstName R3
SYMATTR Value 113K
SYMBOL res 496 64 R0
SYMATTR InstName R4
SYMATTR Value 237K
SYMBOL cap 608 -48 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.001 Lser=0 mfg="TDK" pn="C3216X5ROJ106M" type="X5R"
SYMBOL res 688 -64 R0
SYMATTR InstName Rload1
SYMATTR Value 2.4
SYMBOL cap 416 240 R0
SYMATTR InstName C3
SYMATTR Value 10n
SYMBOL res 496 224 R0
SYMATTR InstName R5
SYMATTR Value 54.9K
SYMBOL res 496 352 R0
SYMATTR InstName R6
SYMATTR Value 237K
SYMBOL cap 608 240 R0
SYMATTR InstName C4
SYMATTR Value 3.3
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.006 Lser=0 mfg="TDK" pn="C2012X5ROJ335K" type="X5R"
SYMBOL res 688 224 R0
SYMATTR InstName Rload2
SYMATTR Value 6
TEXT 656 416 Left 2 !.tran 2
TEXT -248 -224 Left 2 ;Note: \nThe model uses 2.2 V as the threshold for the minimum input voltage \nto ensure that the worst case scenario is covered.