Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0d9f4afe959d_1693-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1693-2.asy)
XU1 N002 0 N002 0 N004 N001 N003 N001 LTC1693-2 ;pnba IN1)GND1)IN2)GND2)_OUT2)Vcc2)OUT1)Vcc1
V2 N002 0 PULSE(0 5 0 1n 1n 5u 10u)
V1 N001 0 5
.tran 100u
.lib LTC1693-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2388 1428
WIRE 1632 1008 1504 1008
WIRE 1856 1008 1632 1008
WIRE 1856 1024 1856 1008
WIRE 1504 1040 1504 1008
WIRE 1632 1040 1632 1008
WIRE 1440 1120 1104 1120
WIRE 1712 1120 1696 1120
WIRE 1856 1120 1856 1104
WIRE 1104 1216 1104 1120
WIRE 1440 1216 1104 1216
WIRE 1712 1216 1696 1216
WIRE 1104 1232 1104 1216
WIRE 1504 1312 1504 1296
WIRE 1632 1312 1632 1296
WIRE 1104 1328 1104 1312
SYMBOL PowerProducts\\LTC1693-2 1568 1168 R0
SYMATTR InstName U1
SYMBOL voltage 1856 1008 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 1104 1216 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1n 1n 5u 10u)
FLAG 1856 1120 0
FLAG 1632 1312 0
FLAG 1504 1312 0
FLAG 1104 1328 0
TEXT 1616 1400 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\045c1b8831fc_circuit1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 5.1k
R2 0 N002 10k
R3 0 N002 20k
R4 N002 N003 15k
V1 N001 0 10
V2 0 N003 8
.tran .1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -64 48 -160 48
WIRE 112 48 16 48
WIRE 352 48 112 48
WIRE 432 48 352 48
WIRE 608 48 512 48
WIRE -160 144 -160 48
WIRE 608 144 608 48
WIRE 112 160 112 48
WIRE 352 160 352 48
WIRE -160 336 -160 224
WIRE 112 336 112 240
WIRE 112 336 -160 336
WIRE 240 336 112 336
WIRE 352 336 352 240
WIRE 352 336 240 336
WIRE 608 336 608 224
WIRE 608 336 352 336
FLAG 240 336 0
SYMBOL res 32 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5.1k
SYMBOL res 128 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 368 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 20k
SYMBOL res 416 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 15k
SYMBOL voltage -160 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL voltage 608 240 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 8
TEXT -544 144 Left 2 !.tran .1
* Z:\home\khalils\Downloads\files\data\raw_asc\9938aa264b12_diy-vna2.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N001 0 1k
C1 N002 0 15p
V1 N001 0 SINE(0 4 1000) Rser=50
R1 N001 N002 10Meg
.tran 0 30ms 0.01ns
.measure tran time_1 trig V(v1)=0 rise=2 targ V(v1)=0 rise=3
.measure frequency param 1/time_1
.measure tran tdelay trig V(v1)=0 rise=2 targ V(v2)=0 rise=2
.measure phase param 360* tdelay/time_1
.measure tran mag_v1 rms V(v1) trig V(v1)=0 rise=2 targ V(V1)=0 rise=3
.measure tran mag_v2 rms V(v2) trig V(v2)=0 rise=2 targ V(V1)=0 rise=3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1200 680
WIRE 176 48 -144 48
WIRE 272 48 176 48
WIRE 272 176 272 48
WIRE 176 192 176 48
WIRE -144 304 -144 48
WIRE 272 336 272 256
WIRE -144 528 -144 384
WIRE 112 528 -144 528
WIRE 176 528 176 272
WIRE 176 528 112 528
WIRE 272 528 272 400
WIRE 272 528 176 528
WIRE 112 560 112 528
SYMBOL res 160 176 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 256 160 R0
SYMATTR InstName R1
SYMATTR Value 10Meg
SYMBOL Misc/signal -144 288 R0
WINDOW 39 24 126 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V1
SYMATTR Value SINE(0 4 1000)
SYMBOL cap 256 336 R0
SYMATTR InstName C1
SYMATTR Value 15p
FLAG 112 560 0
TEXT -152 544 Left 2 !.tran 0 30ms 0.01ns
TEXT 352 96 Left 2 !.measure tran time_1 trig V(v1)=0 rise=2 targ V(v1)=0 rise=3\n.measure frequency param 1/time_1\n.measure tran tdelay trig V(v1)=0 rise=2 targ V(v2)=0 rise=2\n.measure phase param 360* tdelay/time_1
TEXT 392 440 Left 2 !.measure tran mag_v1 rms V(v1) trig V(v1)=0 rise=2 targ V(V1)=0 rise=3\n.measure tran mag_v2 rms V(v2) trig V(v2)=0 rise=2 targ V(V1)=0 rise=3
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1079A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1079A.asy)
V1 +V 0 10
R2 N001 0 5K
XU1 N003 N001 +V -V N002 LT1078 ;pnba In+)In-)V+)V-)OUT
V3 N003 0 SINE(0 1 1K)
V2 -V 0 -10
R1 N002 N001 5K
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -272 128 -272 112
WIRE -144 128 -144 112
WIRE 192 208 192 192
WIRE -272 224 -272 208
WIRE -144 224 -144 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL voltage -144 112 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL voltage -272 112 R0
SYMATTR InstName V2
SYMATTR Value -10
SYMBOL opamps\\LT1079A 192 176 R0
SYMATTR InstName U1
FLAG -144 224 0
FLAG 192 192 +V
FLAG -144 112 +V
FLAG 192 288 -V
FLAG -272 224 0
FLAG -272 112 -V
FLAG 16 96 0
FLAG 0 368 0
TEXT 240 368 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\13187c68b54b_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N002 0 0
Q1 N001 N002 0 0 2N2369
V1 N001 0 5
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V2 0.7 0.85 0.0001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 680
WIRE 576 96 336 96
WIRE 272 144 128 144
WIRE 128 176 128 144
WIRE 368 192 336 192
WIRE 368 224 368 192
SYMBOL voltage 576 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 128 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL npn 272 96 R0
SYMATTR InstName Q1
SYMATTR Value 2N2369
FLAG 576 176 0
FLAG 368 224 0
FLAG 128 256 0
TEXT 696 -8 Left 2 !.dc V2 0.7 0.85 0.0001
* Z:\home\khalils\Downloads\files\data\raw_asc\0c4f12936a06_1764-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1764-1.5.asy)
Rload OUT 0 500
V1 IN 0 PWL(0 0 1 10)
XU1 IN IN 0 OUT OUT LT1764-1.5 ;pnba _SHDN)IN)GND)OUT)Sense
C1 OUT 0 10 Rser=100m
.tran 1
.lib LT1764.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 560 48 384 48
WIRE -208 64 -208 48
WIRE 384 64 384 48
WIRE 560 64 560 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -208 160 -208 144
WIRE 384 160 384 128
WIRE 560 160 560 144
WIRE 160 240 160 208
SYMBOL PowerProducts\\LT1764-1.5 160 96 R0
SYMATTR InstName U1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 544 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL cap 368 64 R0
WINDOW 39 24 84 Left 2
SYMATTR SpiceLine Rser=100m
SYMATTR InstName C1
SYMATTR Value 10u
FLAG -208 160 0
FLAG 384 160 0
FLAG 560 160 0
FLAG 160 240 0
FLAG -208 48 IN
FLAG 560 48 OUT
TEXT 376 216 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1160.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1160.asy)
V3 N005 0 pulse(0 3.3 .5u 1n 1n 1u 2u)
V1 N001 0 15
C1 0 N004 3000p
C2 0 N006 3000p
V2 N003 0 pulse(0 3.3 0 1n 1n 1u 2u)
XU1 N001 N003 N005 N002 0 0 MP_01 N006 N006 N001 0 N004 N004 N001 LT1160 ;pnba SV+)INtop)INbot)_UVout)SGND)PGND))BgateFB)Bgate)PV+)Tsource)TgateFB)Tgate)Boost
R1 N001 N002 10K
.tran 6u
.lib LT1160.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 0 -256 0
WIRE 80 0 -96 0
WIRE 240 0 80 0
WIRE 352 0 240 0
WIRE -256 16 -256 0
WIRE -96 16 -96 0
WIRE 80 48 80 0
WIRE 240 48 240 0
WIRE -256 112 -256 96
WIRE -96 112 -96 96
WIRE -16 112 -96 112
WIRE 352 112 352 0
WIRE 352 112 336 112
WIRE -240 176 -288 176
WIRE -16 176 -160 176
WIRE 384 176 336 176
WIRE 400 176 384 176
WIRE 480 176 464 176
WIRE 384 240 384 176
WIRE 384 240 336 240
WIRE 384 304 336 304
WIRE -240 368 -288 368
WIRE -16 368 -160 368
WIRE 384 368 336 368
WIRE 384 432 384 368
WIRE 384 432 336 432
WIRE 400 432 384 432
WIRE 480 432 464 432
WIRE 80 512 80 496
WIRE 240 512 240 496
SYMBOL voltage -144 176 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value pulse(0 3.3 0 1n 1n 1u 2u)
SYMBOL cap 464 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 3000p
SYMBOL voltage -144 368 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V3
SYMATTR Value pulse(0 3.3 .5u 1n 1n 1u 2u)
SYMBOL PowerProducts\\LT1160 160 256 R0
SYMATTR InstName U1
SYMBOL cap 464 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 3000p
SYMBOL voltage -256 0 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res -112 0 R0
SYMATTR InstName R1
SYMATTR Value 10K
FLAG -256 112 0
FLAG 240 512 0
FLAG 80 512 0
FLAG -288 176 0
FLAG -288 368 0
FLAG 384 304 0
FLAG 480 176 0
FLAG 480 432 0
TEXT 392 536 Left 2 !.tran 6u
* Z:\home\khalils\Downloads\files\data\raw_asc\3567a5bd247e_var_g_invert_amp_pot.asc
* Generated by LTspice 26.0.1 for Windows.
* Variable Gain Inverting Amplifier using potetiometer
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
V4 V- 0 -5
R5 2+ 0 10k
R4 2+ N001 2.5k
R1 N001 W2 4.7k
XU1 0 N001 V+ V- 2+ LT1001 ;pnba In+)In-)V+)V-)OUT
V3 V+ 0 5
R2 2+ 2+ 7.5k
V2 W2 0 SINE(0 2 1k)
.tran 10m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 64 -112 32
WIRE -112 64 -128 64
WIRE 16 64 16 32
WIRE 16 64 0 64
WIRE -112 96 -112 64
WIRE 16 96 16 64
WIRE 608 128 480 128
WIRE 384 192 368 192
WIRE 480 192 480 128
WIRE 480 192 464 192
WIRE 512 192 480 192
WIRE 608 192 608 128
WIRE 608 192 592 192
WIRE -112 208 -112 176
WIRE 16 208 16 176
WIRE 496 304 496 272
WIRE 16 320 16 304
WIRE 16 320 0 320
WIRE 224 320 16 320
WIRE 368 320 368 192
WIRE 368 320 304 320
WIRE 464 320 368 320
WIRE 608 336 608 192
WIRE 608 336 528 336
WIRE 624 336 608 336
WIRE 656 336 624 336
WIRE 16 352 16 320
WIRE 464 352 400 352
WIRE 624 368 624 336
WIRE 496 416 496 368
WIRE 400 432 400 352
WIRE 16 464 16 432
WIRE 624 480 624 448
IOPIN -128 64 In
IOPIN 0 64 In
IOPIN 0 320 In
IOPIN 656 336 In
IOPIN 16 304 In
SYMBOL voltage 16 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 2 1k)
SYMBOL res 608 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 7.5k
SYMBOL res 608 352 R0
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL voltage -112 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 480 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2.5k
SYMBOL Opamps\\OP07 496 272 R0
SYMATTR InstName U1
SYMBOL res 320 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL voltage 16 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -5
FLAG 400 432 0
FLAG 16 464 0
FLAG 624 480 0
FLAG 496 272 Vp
FLAG 496 416 Vn
FLAG -112 208 0
FLAG 16 208 0
FLAG -112 32 Vp
FLAG 16 32 Vn
FLAG -128 64 V+
FLAG 0 64 V-
FLAG 0 320 W2
FLAG 656 336 2+
FLAG 16 304 1+
TEXT -94 488 Left 2 !.tran 10m
TEXT 152 -40 Left 2 ;Variable Gain Inverting Amplifier using potetiometer
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8049.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8049.asy)
R2 OUT1 N002 130K
Rload1 OUT1 0 24
V1 IN 0 12
XU1 OUT1 IN NC_01 MP_02 NC_03 N002 N005 NC_04 MP_05 NC_06 IN MP_07 MP_08 NC_09 IN N004 NC_10 N003 0 NC_11 N001 IN N003 0 0 MP_12 0 OUT2 LTM8049 ;pnba Vout1+)Vin1)PG1))Share1)FBx1)FBx2)Share2))PG2)Vin2)))CLKout2)Run2)Rt2)SS2)Sync2)Sync1)SS1)Rt1)Run1)CLKout1)Vout1-)GND))Vout2+)Vout2-
C1 OUT1 0 22 Rser=5m
R4 OUT2 N005 143K
C2 0 OUT2 47 Rser=7m
R3 N004 0 80.6K
Rload2 0 OUT2 24
R1 N001 0 80.6K
.tran 1.2m startup
.lib LTM8049.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1064 840
WIRE -176 -48 -272 -48
WIRE 80 -48 -176 -48
WIRE 208 -48 80 -48
WIRE -272 -32 -272 -48
WIRE 80 -16 80 -48
WIRE 208 -16 208 -48
WIRE -176 32 -176 -48
WIRE -32 32 -176 32
WIRE 480 32 320 32
WIRE 528 32 480 32
WIRE 624 32 528 32
WIRE 528 48 528 32
WIRE 624 48 624 32
WIRE -272 64 -272 48
WIRE 352 112 320 112
WIRE 528 144 528 112
WIRE 624 144 624 128
WIRE -128 192 -144 192
WIRE -32 192 -48 192
WIRE 352 192 320 192
WIRE 480 192 480 32
WIRE 480 192 432 192
WIRE -32 272 -64 272
WIRE -32 352 -192 352
WIRE -176 432 -176 32
WIRE -32 432 -176 432
WIRE 528 432 528 400
WIRE 528 432 320 432
WIRE 624 432 528 432
WIRE 528 448 528 432
WIRE 624 448 624 432
WIRE 480 512 320 512
WIRE 480 544 480 512
WIRE 528 544 528 512
WIRE 528 544 480 544
WIRE 624 544 624 528
WIRE 624 544 528 544
WIRE -128 592 -144 592
WIRE -32 592 -48 592
WIRE 352 592 320 592
WIRE 480 592 480 544
WIRE 480 592 432 592
WIRE -192 672 -192 352
WIRE -32 672 -192 672
WIRE 144 816 144 800
SYMBOL res -32 576 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 80.6K
SYMBOL res 608 432 R0
SYMATTR InstName Rload2
SYMATTR Value 24
SYMBOL cap 512 48 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine Rser=5m
SYMBOL LTM8049 144 368 R0
SYMATTR InstName U1
SYMBOL res 608 32 R0
SYMATTR InstName Rload1
SYMATTR Value 24
SYMBOL voltage -272 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 448 576 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 143K
SYMBOL res 448 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 130K
SYMBOL cap 512 448 R0
SYMATTR InstName C2
SYMATTR Value 47
SYMATTR SpiceLine Rser=7m
SYMBOL res -32 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 80.6K
FLAG -272 64 0
FLAG -144 192 0
FLAG 352 112 0
FLAG 624 144 0
FLAG 528 144 0
FLAG -272 -48 IN
FLAG 624 32 OUT1
FLAG -144 592 0
FLAG 144 816 0
FLAG 624 544 OUT2
FLAG 528 400 0
FLAG -64 272 0
TEXT 424 712 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\20600b2f3629_Fan.asc
* Generated by LTspice 26.0.1 for Windows.
V2 VCC 0 5V
V1 12V 0 12V
V3 DO_X 0 PULSE(3.3V 0V 0.1 0 0 0.1 0.2 1)
R1 12V N002 4.7K
R2 N002 0 10K
Q1 N002 N003 0 0 BC817-40
R3 N003 DO_X 2K
M1 N001 N002 0 0 Si4862DY
R_Load 12V N001 50
D1 N001 12V D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0.3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1984 864
WIRE 1552 -656 1552 -688
WIRE 1552 -656 1488 -656
WIRE 1552 -608 1552 -656
WIRE 1488 -592 1488 -656
WIRE 1056 -496 1056 -592
WIRE 1488 -496 1488 -528
WIRE 1552 -496 1552 -528
WIRE 1552 -496 1488 -496
WIRE 1552 -464 1552 -496
WIRE 1056 -384 1056 -416
WIRE 1392 -384 1056 -384
WIRE 1504 -384 1392 -384
WIRE 1056 -352 1056 -384
WIRE 1552 -304 1552 -368
WIRE 1056 -224 1056 -272
WIRE 1392 -144 1392 -384
WIRE -48 -112 -48 -128
WIRE 432 -112 432 -128
WIRE 432 -96 432 -112
WIRE 1184 -96 432 -96
WIRE 1328 -96 1264 -96
WIRE -48 -48 -48 -112
WIRE 432 -48 432 -96
WIRE -48 64 -48 32
WIRE 432 64 432 32
WIRE 1392 96 1392 -48
WIRE -48 272 -48 240
WIRE -48 400 -48 352
FLAG -48 240 VCC
FLAG -48 400 0
FLAG -48 64 0
FLAG -48 -112 12V
FLAG 432 64 0
FLAG 432 -112 DO_X
FLAG 1056 -224 0
FLAG 1392 96 0
FLAG 1552 -304 0
FLAG 1552 -688 12V
FLAG 1056 -592 12V
SYMBOL voltage -48 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5V
SYMBOL voltage -48 -64 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 12V
SYMATTR InstName V1
SYMBOL voltage 432 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(3.3V 0V 0.1 0 0 0.1 0.2 1)
SYMBOL res 1040 -512 R0
SYMATTR InstName R1
SYMATTR Value 4.7K
SYMBOL res 1040 -368 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL npn 1328 -144 R0
SYMATTR InstName Q1
SYMATTR Value BC817-40
SYMBOL res 1280 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2K
SYMBOL nmos 1504 -464 R0
SYMATTR InstName M1
SYMATTR Value Si4862DY
SYMBOL res 1536 -624 R0
SYMATTR InstName R_Load
SYMATTR Value 50
SYMBOL diode 1504 -528 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
TEXT -80 424 Left 2 !.tran 0.3
* Z:\home\khalils\Downloads\files\data\raw_asc\0f45dead51e9_pseudo_nmos_NOR.asc
* Generated by LTspice 26.0.1 for Windows.
M1 out a 0 0 NMOS
M2 out b 0 0 NMOS
M3 N001 0 out N001 PMOS
V1 N001 0 5V
V2 a 0 PULSE(0 5 0 1n 1n 10u 21u 5)
V3 b 0 PULSE(0 5 0 1n 1n 10u 21u 5)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 4mS 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 -80 224 -80
WIRE 336 -80 256 -80
WIRE 224 -48 224 -80
WIRE 336 -48 336 -80
WIRE 256 0 256 -80
WIRE 256 0 224 0
WIRE 176 32 96 32
WIRE 96 64 96 32
WIRE 224 64 224 48
WIRE 256 64 224 64
WIRE 336 80 336 32
WIRE 224 96 224 64
WIRE 224 96 160 96
WIRE 272 96 224 96
WIRE 160 128 160 96
WIRE 272 128 272 96
WIRE 64 144 -32 144
WIRE 80 144 64 144
WIRE 176 176 160 176
WIRE 288 176 272 176
WIRE -16 208 -32 208
WIRE 112 208 -16 208
WIRE -16 224 -16 208
WIRE 80 240 80 144
WIRE 224 240 224 208
WIRE 224 240 80 240
WIRE 160 256 160 224
WIRE 176 256 176 176
WIRE 176 256 160 256
WIRE 224 256 176 256
WIRE 272 256 272 224
WIRE 272 256 224 256
WIRE 288 256 288 176
WIRE 288 256 272 256
WIRE 64 272 64 144
WIRE 224 288 224 256
WIRE -16 384 -16 304
WIRE 16 384 -16 384
WIRE 64 384 64 352
WIRE 64 384 16 384
WIRE 16 400 16 384
FLAG -32 208 a
IOPIN -32 208 In
FLAG -32 144 b
IOPIN -32 144 In
FLAG 96 64 0
FLAG 336 80 0
FLAG 16 400 0
FLAG 256 64 out
IOPIN 256 64 Out
FLAG 224 288 0
SYMBOL nmos4 112 128 R0
WINDOW 3 91 58 Top 2
SYMATTR InstName M1
SYMBOL nmos4 224 128 R0
SYMATTR InstName M2
SYMBOL pmos4 176 -48 R0
SYMATTR InstName M3
SYMBOL voltage 336 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5V
SYMBOL voltage -16 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1n 1n 10u 21u 5)
SYMBOL voltage 64 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 1n 1n 10u 21u 5)
TEXT 8 -24 Left 2 !.tran 0 4mS 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7112-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7112-5.0.asy)
C2 N001 0 4.7n
V1 IN 0 6
Rload OUT 0 30
C1 OUT 0 2.2 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=5 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 6m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 30
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL ADP7112-5.0 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0fa32e6727b3_Draft14.asc
* Generated by LTspice 26.0.1 for Windows.
* .noise V(v1) V3 dec 100 1 100Meg
* .ac dec 100 1 100Meg
* .tran 0 2m 0 1u
* Library below included based on ModelFile attribute of instance XU3, XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP482.asy)
XU1 V1 N002 +V -V V2 OP482 ;pnba In+)In-)V+)V-)OUT
R1 V2 N001 39K
V1 +V 0 9
V3 VIN 0 SINE(0 100m 1000 0) AC 0.1 0
C1 V2 0 1n
R4 N002 0 1K
XU3 VIN N001 +V -V V1 OP482 ;pnba In+)In-)V+)V-)OUT
R3 V2 N002 3K
R5 V2 0 10K
V2 0 -V 9
R2 N001 0 1K
.noise V(v2) V3 dec 100 1 100Meg
.lib OP482.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE -112 -128 -128 -128
WIRE 0 -128 -32 -128
WIRE 32 -128 0 -128
WIRE 656 -128 112 -128
WIRE 64 16 64 -16
WIRE 0 32 0 -128
WIRE 32 32 0 32
WIRE -368 48 -368 16
WIRE 224 48 96 48
WIRE 464 48 448 48
WIRE 496 48 464 48
WIRE 656 48 656 -128
WIRE 656 48 576 48
WIRE 32 64 -48 64
WIRE 64 112 64 80
WIRE -368 144 -368 128
WIRE -368 144 -416 144
WIRE -368 160 -368 144
WIRE 528 192 528 160
WIRE 464 208 464 48
WIRE 496 208 464 208
WIRE 656 224 656 48
WIRE 656 224 560 224
WIRE 800 224 656 224
WIRE 912 224 800 224
WIRE 224 240 224 48
WIRE 496 240 224 240
WIRE -368 272 -368 240
WIRE 528 288 528 256
WIRE 800 288 800 224
WIRE 912 304 912 224
WIRE 800 384 800 368
WIRE 912 384 912 368
WIRE 912 384 800 384
WIRE 800 400 800 384
WIRE -368 480 -368 448
WIRE -368 592 -368 560
SYMBOL res 592 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 3K
SYMBOL res 784 272 R0
SYMATTR InstName R5
SYMATTR Value 10K
SYMBOL res 464 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL res 128 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 39K
SYMBOL res -16 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL OpAmps\\OP482 64 -16 R0
SYMATTR InstName U3
SYMBOL voltage -368 464 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 100m 1000 0)
SYMATTR Value2 AC 0.1 0
SYMBOL voltage -368 32 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL cap 896 304 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL voltage -368 144 R0
SYMATTR InstName V2
SYMATTR Value 9
SYMBOL OpAmps\\OP482 528 160 R0
SYMATTR InstName U1
FLAG -416 144 0
FLAG -368 16 +V
FLAG -368 272 -V
FLAG 64 112 -V
FLAG 528 288 -V
FLAG 64 -16 +V
FLAG 528 160 +V
FLAG -368 592 0
FLAG -368 448 VIN
FLAG -48 64 VIN
FLAG -128 -128 0
FLAG 224 48 V1
FLAG 656 224 V2
FLAG 368 48 0
FLAG 800 400 0
TEXT -72 608 Left 2 ;.noise V(v1) V3 dec 100 1 100Meg
TEXT -72 640 Left 2 !.noise V(v2) V3 dec 100 1 100Meg
TEXT -72 560 Left 2 ;.ac dec 100 1 100Meg
TEXT -72 512 Left 2 ;.tran 0 2m 0 1u