Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\099fb67976f8_Fig10_19_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Vout Vin
M1 Vin 0 Vout VDD P_50n l=50n w=1u
Vin Vin 0 PULSE(1 0 500p 0 0 1n 3n)
C1 Vout 0 50f
VDD VDD 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 2.5n
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 680
WIRE 208 -96 208 -112
WIRE 208 0 208 -16
WIRE 272 -112 208 -112
WIRE 384 -112 272 -112
WIRE 432 -112 432 -208
WIRE 464 -16 464 -64
WIRE 560 -112 480 -112
WIRE 672 -112 560 -112
WIRE 672 -80 672 -112
WIRE 672 16 672 -16
WIRE 736 -208 432 -208
WIRE 784 -208 736 -208
WIRE 784 -176 784 -208
WIRE 784 -64 784 -96
SYMBOL voltage 784 -192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL cap 656 -80 R0
SYMATTR InstName C1
SYMATTR Value 50f
SYMBOL voltage 208 -112 R0
WINDOW 0 -85 56 Left 0
WINDOW 3 -131 148 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(1 0 500p 0 0 1n 3n)
SYMBOL pmos4 384 -64 R270
WINDOW 123 56 4 Left 0
SYMATTR Value2 l=50n w=1u
SYMATTR InstName M1
SYMATTR Value P_50n
FLAG 208 0 0
FLAG 672 16 0
FLAG 560 -112 Vout
FLAG 272 -112 Vin
FLAG 784 -64 0
FLAG 464 -16 0
FLAG 736 -208 VDD
TEXT 392 32 Left 0 !.tran 2.5n
TEXT 392 56 Left 0 !.lib cmosedu_models.txt
TEXT 512 -240 Left 0 ;Plot Vout Vin
* Z:\home\khalils\Downloads\files\data\raw_asc\43174c9cc905_Week1_Ex1C.asc
* Generated by LTspice 26.0.1 for Windows.
VDS N001 0 1.8
M1 N001 N002 0 0 nch l={factor*2u} w={factor*4u}
VGS N002 0 1.8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib 'C:\Program Files\LTC\LTspiceXVII\lib\cmp\log018.l' TT
.dc VGS 0 1.8 1m
.step param factor list 1 0.5 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 240 208 240
WIRE 208 336 208 240
WIRE 304 384 208 384
WIRE 160 416 -48 416
WIRE 416 416 416 240
WIRE -48 432 -48 416
WIRE -48 576 -48 512
WIRE 208 576 208 432
WIRE 208 576 -48 576
WIRE 304 576 304 384
WIRE 304 576 208 576
WIRE 416 576 416 496
WIRE 416 576 304 576
WIRE 208 608 208 576
SYMBOL voltage -48 416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 1.8
SYMBOL voltage 416 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 1.8
SYMBOL nmos4 160 336 R0
SYMATTR InstName M1
SYMATTR Value nch
SYMATTR Value2 l={factor*2u} w={factor*4u}
FLAG 208 608 0
TEXT -32 120 Left 2 !.lib 'C:\\Program Files\\LTC\\LTspiceXVII\\lib\\cmp\\log018.l' TT
TEXT -32 168 Left 2 !.dc VGS 0 1.8 1m
TEXT -24 200 Left 2 !.step param factor list 1 0.5 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1992.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 2.7
V2 -V 0 0
V3 N001 N007 SINE(0 0.5 10K)
R1 N002 N001 30K
R2 N003 N002 30K
R3 N006 N007 30K
R4 N005 N006 30K
C1 N003 0 10p
C2 N005 0 10p
XU1 N002 N004 +V N003 N005 -V N004 N006 LTC1992 ;pnba IN-)VOCM)V+)OUT+)OUT-)V-)VMID)IN+
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC1992.asy)
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 768
WIRE 16 336 -48 336
WIRE 192 336 96 336
WIRE 320 336 192 336
WIRE 432 336 400 336
WIRE 496 368 496 352
WIRE 240 400 240 384
WIRE -272 432 -272 416
WIRE -160 432 -160 416
WIRE -48 432 -48 336
WIRE 192 432 192 336
WIRE 208 432 192 432
WIRE 432 448 432 336
WIRE 432 448 368 448
WIRE 496 448 496 432
WIRE 496 448 432 448
WIRE 208 464 192 464
WIRE 192 496 192 464
WIRE 208 496 192 496
WIRE 432 512 368 512
WIRE 496 512 432 512
WIRE -272 528 -272 512
WIRE -160 528 -160 512
WIRE 208 528 192 528
WIRE 496 528 496 512
WIRE 240 576 240 560
WIRE 496 608 496 592
WIRE -48 624 -48 512
WIRE 16 624 -48 624
WIRE 192 624 192 528
WIRE 192 624 96 624
WIRE 304 624 192 624
WIRE 432 624 432 512
WIRE 432 624 384 624
FLAG -272 528 0
FLAG -160 528 0
FLAG -272 416 +V
FLAG -160 416 -V
FLAG 496 352 0
FLAG 496 608 0
FLAG 240 384 +V
FLAG 240 576 -V
SYMBOL voltage -272 416 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.7
SYMBOL voltage -160 416 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage -48 416 R0
WINDOW 123 40 100 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 0.5 10K)
SYMBOL res 112 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 30K
SYMBOL res 416 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 30K
SYMBOL res 112 608 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 30K
SYMBOL res 400 608 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 30K
SYMBOL cap 480 432 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL cap 480 528 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL LTC1992 272 480 R0
SYMATTR InstName U1
TEXT 472 672 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\98b0bbdbd488_1016.asc
* Generated by LTspice 26.0.1 for Windows.
* 10MHz
* 10MHz to 25MHz Crystal Oscillator
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1016.asy)
XU1 +V N003 N001 0 0 0 N002 OUT LT1016 ;pnba V+)In+)In-)V-)LATCH)GND)OUT+)OUT-
C1 N001 0 200p
C2 N003 N004 820p
V1 +V 0 PWL(0 0 500n 5)
R4 N004 0 22
R2 N003 0 4K
R1 N002 N001 2K
CY1 N002 N003 .32p Rser=45 Lser=.78m Cpar=18p
R3 +V N003 4K
.tran 10u
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE 336 -16 320 -16
WIRE 416 -16 400 -16
WIRE 432 -16 416 -16
WIRE 576 -16 512 -16
WIRE 224 32 224 16
WIRE 416 96 416 -16
WIRE 432 96 416 96
WIRE 576 96 576 -16
WIRE 576 96 512 96
WIRE 224 128 224 112
WIRE 320 128 224 128
WIRE 416 128 320 128
WIRE 432 128 416 128
WIRE 608 128 512 128
WIRE 224 144 224 128
WIRE 320 144 320 128
WIRE 448 176 448 160
WIRE 464 176 464 160
WIRE 464 176 448 176
WIRE 480 176 480 160
WIRE 480 176 464 176
WIRE 464 192 464 176
WIRE 64 224 64 208
WIRE 320 224 320 208
WIRE 224 240 224 224
WIRE 416 240 416 128
WIRE 480 240 416 240
WIRE 576 240 576 96
WIRE 576 240 544 240
WIRE 64 320 64 304
WIRE 320 320 320 304
SYMBOL cap 304 144 R0
SYMATTR InstName C2
SYMATTR Value 820p
SYMBOL res 208 128 R0
SYMATTR InstName R2
SYMATTR Value 4K
SYMBOL voltage 64 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 500n 5)
SYMBOL res 304 208 R0
SYMATTR InstName R4
SYMATTR Value 22
SYMBOL res 208 16 R0
SYMATTR InstName R3
SYMATTR Value 4K
SYMBOL misc\\xtal 544 224 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 Invisible 0
SYMATTR InstName Y1
SYMATTR Value .32p
SYMATTR SpiceLine Rser=45 Lser=.78m Cpar=18p
SYMBOL cap 400 -32 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C1
SYMATTR Value 200p
SYMBOL res 528 -32 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL Comparators\\LT1016 464 48 R0
WINDOW 3 24 102 Left 0
SYMATTR InstName U1
FLAG 64 320 0
FLAG 464 64 +V
FLAG 224 16 +V
FLAG 320 -16 0
FLAG 224 240 0
FLAG 464 192 0
FLAG 320 320 0
FLAG 64 208 +V
FLAG 608 128 OUT
TEXT 528 312 Left 0 !.tran 10u
TEXT 512 264 Top 0 ;10MHz
TEXT 440 -72 Bottom 0 ;10MHz to 25MHz Crystal Oscillator
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8034.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8034.asy)
V1 +V 0 12
Vin IN 0 SINE(0 1 100K)
XU1 IN N001 +V -V OUT AD8033 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -12
R1 N001 0 1K
R2 OUT N001 1K
.tran 100u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 160 -1152 160 -1168
WIRE 272 -1152 272 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 704 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 432 -1072 432 -1088
WIRE 160 -1040 160 -1072
WIRE 272 -1040 272 -1072
WIRE 432 -976 432 -992
SYMBOL Opamps\\AD8034 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 272 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100K)
SYMBOL voltage 160 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
FLAG 160 -1168 +V
FLAG 432 -976 0
FLAG 704 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 272 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 272 -1040 0
FLAG 160 -1040 0
TEXT 672 -968 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4701.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4701.asy)
C2 OUT 0 100 x2
R2 N002 0 11k
R3 OUT 0 0.5
XU1 NC_01 NC_02 0 N002 N001 NC_03 IN NC_04 MP_05 0 NC_06 OUT MP_07 MP_08 MP_09 MP_10 IN MP_11 IN MP_12 NC_13 MP_14 MP_15 0 LTM4701 ;pnba Freq)NC1)Rgnd)FB)Track)NC2)Run)Pgood))Gnd)SW)Vout)))))Vin))SVin))INTVcc)))Mode
C1 N001 0 1n
V1 IN 0 12
R1 OUT N002 100k
.tran 1m startup
.lib LTM4701.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1000 680
WIRE 80 -64 -64 -64
WIRE 208 -64 80 -64
WIRE 336 -64 208 -64
WIRE -64 -48 -64 -64
WIRE 208 -48 208 -64
WIRE 336 -48 336 -64
WIRE 80 0 80 -64
WIRE 96 0 80 0
WIRE -64 48 -64 32
WIRE 16 80 0 80
WIRE 96 80 80 80
WIRE 96 160 80 160
WIRE 560 240 448 240
WIRE 656 240 560 240
WIRE 752 240 656 240
WIRE 560 256 560 240
WIRE 480 320 448 320
WIRE 656 320 656 240
WIRE 752 320 752 240
WIRE 480 352 480 320
WIRE 560 352 560 336
WIRE 560 352 480 352
WIRE 96 400 64 400
WIRE 480 400 448 400
WIRE 480 448 480 400
WIRE 560 448 560 432
WIRE 560 448 480 448
WIRE 656 448 656 384
WIRE 656 448 560 448
WIRE 752 448 752 400
WIRE 752 448 656 448
WIRE 752 464 752 448
SYMBOL res 544 240 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res 736 304 R0
SYMATTR InstName R3
SYMATTR Value 0.5
SYMBOL cap 640 320 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 x2
SYMATTR InstName C2
SYMATTR Value 100
SYMBOL LTM4701 272 208 R0
SYMATTR InstName U1
SYMBOL cap 80 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 544 336 R0
SYMATTR InstName R2
SYMATTR Value 11k
SYMBOL voltage -64 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
FLAG -64 48 0
FLAG 0 80 0
FLAG -64 -64 IN
FLAG 80 160 0
FLAG 64 400 0
FLAG 752 464 0
FLAG 752 240 OUT
TEXT 808 512 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG854.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG854.asy)
C1 D 0 35p
V3 IN 0 PULSE(0 5 0 20n 20n 10u 20u)
R1 D 0 300
V2 SB 0 0
V4 +V 0 5
V1 SA 0 5
XU2 IN SA D SB +V 0 ADG854 ;pnba IN)S1)D)S2)Vdd)GND
.tran 100u
.lib ADG854.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1744 -272 -2032 -272
WIRE -1696 -272 -1744 -272
WIRE -2032 -256 -2032 -272
WIRE -1424 -240 -1504 -240
WIRE -1312 -240 -1424 -240
WIRE -1424 -224 -1424 -240
WIRE -1312 -224 -1312 -240
WIRE -1744 -208 -1920 -208
WIRE -1696 -208 -1744 -208
WIRE -1920 -192 -1920 -208
WIRE -2032 -160 -2032 -176
WIRE -2176 -144 -2176 -160
WIRE -1744 -144 -1776 -144
WIRE -1696 -144 -1744 -144
WIRE -1424 -128 -1424 -144
WIRE -1312 -128 -1312 -160
WIRE -1920 -96 -1920 -112
WIRE -1776 -80 -1776 -144
WIRE -2176 -48 -2176 -64
WIRE -1600 -16 -1600 -32
WIRE -1776 32 -1776 0
SYMBOL ADG854 -1600 -192 R0
SYMATTR InstName U2
SYMBOL cap -1328 -224 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL voltage -1776 -96 R0
WINDOW 3 24 136 Left 2
SYMATTR Value PULSE(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V3
SYMBOL voltage -2176 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL voltage -2032 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -1920 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL res -1440 -240 R0
SYMATTR InstName R1
SYMATTR Value 300
FLAG -2032 -160 0
FLAG -1920 -96 0
FLAG -1776 32 0
FLAG -1600 -368 +V
FLAG -1424 -128 0
FLAG -1600 -16 0
FLAG -1312 -128 0
FLAG -2176 -48 0
FLAG -2176 -160 +V
FLAG -1744 -272 SA
FLAG -1744 -208 SB
FLAG -1744 -144 IN
FLAG -1424 -240 D
TEXT -1360 -40 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\c742b3108363_NOR3.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Out In3 Vss Vss N_2u l=2u w=6.5u
M6 Out In3 n2 n2 P_2u l=2u w=72u
M5 n2 In2 n1 n1 P_2u l=2u w=72u
M3 Out In1 Vss Vss N_2u l=2u w=6.5u
M4 n1 In1 Vdd Vdd P_2u l=2u w=72u
M2 Out In2 Vss Vss N_2u l=2u w=6.5u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include "../MOSFET models/2um_CMOS.modlib"
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 872
WIRE 192 -192 192 -224
WIRE 208 -192 192 -192
WIRE -320 -176 -368 -176
WIRE 144 -176 -320 -176
WIRE 208 -144 208 -192
WIRE 208 -144 192 -144
WIRE 192 -80 192 -96
WIRE 272 -80 192 -80
WIRE 192 -64 192 -80
WIRE 208 -64 192 -64
WIRE -96 -48 -368 -48
WIRE 144 -48 -96 -48
WIRE 208 -16 208 -64
WIRE 208 -16 192 -16
WIRE 192 48 192 32
WIRE 272 48 192 48
WIRE 192 64 192 48
WIRE 208 64 192 64
WIRE 128 80 -368 80
WIRE 144 80 128 80
WIRE 208 112 208 64
WIRE 208 112 192 112
WIRE -32 176 -256 176
WIRE 192 176 192 160
WIRE 192 176 -32 176
WIRE 368 176 192 176
WIRE -256 192 -256 176
WIRE -32 192 -32 176
WIRE 192 192 192 176
WIRE -240 240 -256 240
WIRE -16 240 -32 240
WIRE 208 240 192 240
WIRE -320 272 -320 -176
WIRE -304 272 -320 272
WIRE -96 272 -96 -48
WIRE -80 272 -96 272
WIRE 128 272 128 80
WIRE 144 272 128 272
WIRE -240 288 -240 240
WIRE -240 288 -256 288
WIRE -16 288 -16 240
WIRE -16 288 -32 288
WIRE 208 288 208 240
WIRE 208 288 192 288
WIRE -256 304 -256 288
WIRE -32 304 -32 288
WIRE -32 304 -256 304
WIRE 192 304 192 288
WIRE 192 304 -32 304
WIRE 192 336 192 304
FLAG 192 -224 Vdd
IOPIN 192 -224 In
FLAG 192 336 Vss
IOPIN 192 336 In
FLAG -368 -176 In1
IOPIN -368 -176 In
FLAG -368 -48 In2
IOPIN -368 -48 In
FLAG 368 176 Out
IOPIN 368 176 Out
FLAG -368 80 In3
IOPIN -368 80 In
FLAG 272 -80 n1
FLAG 272 48 n2
SYMBOL nmos4 144 192 R0
WINDOW 0 78 81 Left 2
WINDOW 3 76 25 Left 2
WINDOW 123 78 53 Left 2
SYMATTR InstName M1
SYMATTR Value N_2u
SYMATTR Value2 l=2u w=6.5u
SYMBOL pmos4 144 160 M180
WINDOW 0 75 15 Left 2
WINDOW 3 73 70 Left 2
WINDOW 123 75 43 Left 2
SYMATTR InstName M6
SYMATTR Value P_2u
SYMATTR Value2 l=2u w=72u
SYMBOL pmos4 144 32 M180
WINDOW 0 75 15 Left 2
WINDOW 3 73 70 Left 2
WINDOW 123 75 43 Left 2
SYMATTR InstName M5
SYMATTR Value P_2u
SYMATTR Value2 l=2u w=72u
SYMBOL nmos4 -304 192 R0
WINDOW 0 78 81 Left 2
WINDOW 3 76 25 Left 2
WINDOW 123 78 53 Left 2
SYMATTR InstName M3
SYMATTR Value N_2u
SYMATTR Value2 l=2u w=6.5u
SYMBOL pmos4 144 -96 M180
WINDOW 0 75 15 Left 2
WINDOW 3 73 70 Left 2
WINDOW 123 75 43 Left 2
SYMATTR InstName M4
SYMATTR Value P_2u
SYMATTR Value2 l=2u w=72u
SYMBOL nmos4 -80 192 R0
WINDOW 0 78 81 Left 2
WINDOW 3 76 25 Left 2
WINDOW 123 78 53 Left 2
SYMATTR InstName M2
SYMATTR Value N_2u
SYMATTR Value2 l=2u w=6.5u
TEXT -312 424 Left 2 !.include "../MOSFET models/2um_CMOS.modlib"
* Z:\tmp\asc_dec_bjh7r6w2\02750c44d300_OptolinkDuo_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R3 3V3 Rx_Com 4.7k
D2 Rx_Vito Rx_Com BAT42
R1 N006 N007 560
R5 N005 3V3 2.15k
V1 3V3 N008 4.1
Q3 N001 N005 Tx_Vito 0 BC547C
D3 3V3 N002 SFH487
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1868 680
WIRE 48 -1264 48 -1296
WIRE 48 -1264 -96 -1264
WIRE 112 -1264 48 -1264
WIRE 480 -1264 192 -1264
WIRE 480 -1200 480 -1264
WIRE -64 -1168 -304 -1168
WIRE -64 -1104 -64 -1168
WIRE -48 -1104 -64 -1104
WIRE 48 -1104 48 -1264
WIRE 48 -1104 16 -1104
WIRE 96 -1088 96 -1136
WIRE 480 -1088 480 -1136
WIRE 480 -1088 96 -1088
WIRE 96 -1072 96 -1088
WIRE 480 -1056 480 -1088
WIRE 608 -1008 544 -1008
WIRE 752 -1008 688 -1008
WIRE -256 -976 -304 -976
WIRE -144 -976 -176 -976
WIRE -144 -960 -144 -976
WIRE -64 -960 -64 -1104
WIRE -48 -960 -64 -960
WIRE 96 -960 96 -992
WIRE 96 -960 16 -960
WIRE -192 -896 -304 -896
WIRE 48 -896 48 -1104
WIRE 48 -896 -96 -896
WIRE 480 -896 480 -960
WIRE 480 -896 224 -896
WIRE 96 -880 96 -960
WIRE 224 -816 224 -896
WIRE -896 -800 -1008 -800
WIRE -752 -800 -752 -832
WIRE -752 -800 -896 -800
WIRE -48 -800 -304 -800
WIRE 96 -800 96 -880
WIRE 96 -800 16 -800
WIRE -752 -784 -752 -800
WIRE 96 -768 96 -800
WIRE -896 -752 -896 -800
WIRE -640 -720 -640 -832
WIRE 224 -720 224 -736
WIRE 224 -720 160 -720
WIRE 224 -704 224 -720
WIRE -896 -624 -896 -672
WIRE -752 -576 -752 -704
WIRE -640 -576 -640 -640
WIRE 96 -576 96 -672
SYMBOL res 80 -1088 R0
SYMATTR InstName R3
SYMATTR Value 4.7k
SYMBOL schottky -48 -784 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value BAT42
SYMBOL res 208 -832 R0
SYMATTR InstName R1
SYMATTR Value 560
SYMBOL res -160 -992 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 2.15k
SYMBOL voltage -752 -800 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.1
SYMBOL npn -96 -960 R90
SYMATTR InstName Q3
SYMATTR Value BC547C
SYMBOL LED 496 -1136 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value SFH487
FLAG -304 -800 Rx_Vito
FLAG -304 -1168 Rx_HomeCtrl
FLAG -304 -896 Tx_Vito
FLAG -304 -976 3V3
FLAG -752 -832 3V3
FLAG -640 -832 Tx_HomeCtrl
FLAG 96 -1136 3V3
FLAG 96 -880 Rx_Com
FLAG -896 -624 Rx_Vito
* Z:\home\khalils\Downloads\files\data\raw_asc\4621a4530229_Draft4.asc
* Generated by LTspice 26.0.1 for Windows.
* Model for 1N4728A Zener diode (3.3V)
DZ 3 1 DR
D1 1 2 DF
R1 N002 N001 104
V1 N001 N003 5
D1 N003 N002 DI_1N4728A
VZ 2 3 0.972
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.SUBCKT DI_1N4728A 1 2
.MODEL DF D (IS=125p RS=0.620 N=1.10 + CJO=364p VJ=0.750 M=0.330 TT=50.1n)
.MODEL DR D (IS=25.0f RS=1.24 N=3.00)
.ENDS DI_1N4728A
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1272 680
WIRE 896 -304 704 -304
WIRE 1168 -304 976 -304
WIRE 704 -224 704 -304
WIRE 1168 -208 1168 -304
WIRE 704 -112 704 -144
WIRE 1168 -112 1168 -144
WIRE 1168 -112 704 -112
SYMBOL voltage 704 -240 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 992 -320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 104
SYMBOL diode 1184 -144 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value DI_1N4728A
TEXT 128 312 Left 2 !* Model for 1N4728A Zener diode (3.3V)\n.SUBCKT DI_1N4728A 1 2\nD1 1 2 DF\nDZ 3 1 DR\nVZ 2 3 0.972\n.MODEL DF D (IS=125p RS=0.620 N=1.10 + CJO=364p VJ=0.750 M=0.330 TT=50.1n)\n.MODEL DR D (IS=25.0f RS=1.24 N=3.00)\n.ENDS DI_1N4728A
TEXT 848 40 Left 2 !.op
* Z:\tmp\asc_dec_bjh7r6w2\1733c13c7f1e_Draft1_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
I1 NC_01 NC_02 PWL(0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14 15 15)
V1 N001 0 16.8V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2744 680
WIRE -256 128 -464 128
WIRE -464 272 -464 208
WIRE 384 320 384 160
SYMBOL load 256 512 R0
SYMATTR InstName I1
SYMATTR Value PWL(0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14 15 15)
SYMBOL voltage -464 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 16.8V
FLAG 384 320 0
FLAG -464 272 0
* Z:\home\khalils\Downloads\files\data\raw_asc\0911f24df3f1_TimeDependentResistor3.asc
* Generated by LTspice 26.0.1 for Windows.
RNTC N002 N001 R=(20/(time/1m))+0.5
RLOAD N002 0 5
V1 N001 0 5
.tran 30m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 0 144 -48 144
WIRE 272 144 80 144
WIRE 272 192 272 144
WIRE -48 208 -48 144
WIRE -48 336 -48 288
WIRE 272 336 272 272
WIRE 272 336 -48 336
WIRE -48 384 -48 336
SYMBOL res 96 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 -56 -4 VTop 2
SYMATTR InstName NTC
SYMATTR Value R=(20/(time/1m))+0.5
SYMBOL voltage -48 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 256 176 R0
SYMATTR InstName LOAD
SYMATTR Value 5
FLAG -48 384 0
TEXT 48 384 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\0eeaa30b5e61_lm3080_.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N003 N001 vcc 0 PNP
Q2 N005 N003 N001 0 PNP
D1 vcc N001 D
Q3 N003 in- N006 0 NPN
Q4 N004 in+ N006 0 NPN
Q5 N004 N002 vcc 0 PNP
Q6 N006 bias vee 0 NPN
D2 bias vee D
Q7 out N004 N002 0 PNP
D3 vcc N002 D
Q8 out N005 N007 0 NPN
Q9 N005 N007 vee 0 NPN
D4 N007 vee D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
* 2
* 3
* 5
* 4
* 6
* 7
.model D D(IS=1E-16)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -192 288 -224 288
WIRE -144 496 -224 496
WIRE -144 512 -144 496
WIRE -144 592 -144 576
WIRE -128 416 -128 336
WIRE -112 96 -112 48
WIRE -112 208 -112 192
WIRE -112 240 -128 240
WIRE -112 240 -112 208
WIRE -112 496 -144 496
WIRE -96 96 -112 96
WIRE -96 192 -112 192
WIRE -64 208 -112 208
WIRE -32 416 -128 416
WIRE -32 448 -48 448
WIRE -32 448 -32 416
WIRE -32 544 -48 544
WIRE -32 592 -144 592
WIRE -32 592 -32 544
WIRE -16 48 -112 48
WIRE -16 64 -16 48
WIRE -16 144 -32 144
WIRE -16 144 -16 128
WIRE 0 144 -16 144
WIRE 0 160 0 144
WIRE 0 272 0 256
WIRE 64 48 -16 48
WIRE 64 96 64 48
WIRE 64 224 64 192
WIRE 64 304 64 224
WIRE 64 416 -32 416
WIRE 64 416 64 400
WIRE 96 592 -32 592
WIRE 96 592 96 560
WIRE 144 352 128 352
WIRE 144 432 -224 432
WIRE 144 432 144 352
WIRE 176 272 0 272
WIRE 176 368 176 272
WIRE 176 400 176 368
WIRE 176 592 96 592
WIRE 176 592 176 496
WIRE 192 400 176 400
WIRE 192 496 176 496
WIRE 208 48 64 48
WIRE 208 64 208 48
WIRE 224 224 64 224
WIRE 224 368 176 368
WIRE 288 48 208 48
WIRE 288 64 288 48
WIRE 288 144 128 144
WIRE 288 144 288 128
WIRE 288 176 288 144
WIRE 288 304 288 272
WIRE 288 320 288 304
WIRE 288 448 256 448
WIRE 288 448 288 416
WIRE 288 464 288 448
WIRE 288 592 176 592
WIRE 288 592 288 528
WIRE 320 304 288 304
FLAG -224 288 in-
FLAG -224 432 in+
FLAG -224 496 bias
FLAG 96 560 vee
FLAG 320 304 out
FLAG 208 64 vcc
SYMBOL pnp2 -32 192 R180
WINDOW 0 54 76 Left 0
WINDOW 3 19 46 Left 0
SYMATTR InstName Q1
SYMBOL pnp2 -64 256 M180
WINDOW 0 47 26 Left 0
WINDOW 3 22 50 Left 0
SYMATTR InstName Q2
SYMBOL diode -32 64 R0
SYMATTR InstName D1
SYMBOL npn2 -192 240 R0
WINDOW 0 47 24 Left 0
WINDOW 3 22 50 Left 0
SYMATTR InstName Q3
SYMBOL npn2 128 304 M0
WINDOW 0 48 23 Left 0
WINDOW 3 20 48 Left 0
SYMATTR InstName Q4
SYMBOL pnp2 128 192 R180
WINDOW 0 54 72 Left 0
WINDOW 3 20 46 Left 0
SYMATTR InstName Q5
SYMBOL npn2 -112 448 R0
WINDOW 0 47 24 Left 0
WINDOW 3 22 50 Left 0
SYMATTR InstName Q6
SYMBOL diode -160 512 R0
WINDOW 0 25 9 Left 0
SYMATTR InstName D2
SYMBOL pnp2 224 272 M180
WINDOW 0 47 26 Left 0
WINDOW 3 22 50 Left 0
SYMATTR InstName Q7
SYMBOL diode 272 64 R0
SYMATTR InstName D3
SYMBOL npn2 224 320 R0
WINDOW 0 47 24 Left 0
WINDOW 3 22 50 Left 0
SYMATTR InstName Q8
SYMBOL npn2 256 400 M0
WINDOW 0 48 23 Left 0
WINDOW 3 20 48 Left 0
SYMATTR InstName Q9
SYMBOL diode 272 464 R0
SYMATTR InstName D4
TEXT -280 288 Left 0 ;2
TEXT -280 432 Left 0 ;3
TEXT -272 528 Left 0 ;5
TEXT 64 568 Left 0 ;4
TEXT 336 328 Left 0 ;6
TEXT 176 80 Left 0 ;7
TEXT -376 392 Left 0 !.model D D(IS=1E-16)