Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\09e2d4ebeb7d_1844-SD.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1844-SD.asy)
I1 OUT 0 {iload} load
R1 N001 0 100K
R2 OUT N001 164K
V1 IN 0 5
XU1 IN 0 IN N001 OUT LTC1844-SD ;pnba IN)GND)_SHDN)ADJ)OUT
.dc v1 5 2 10m
.measure DC vdrop WHEN V(out)=3.2
.measure DC dropout param Vdrop-3.2
.step param iload list 1u 10m 25m 50m 75m 100m 125m 150m
.lib LTC1844-SD.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1940 1316
WIRE 64 80 -80 80
WIRE 80 80 64 80
WIRE 416 80 368 80
WIRE 560 80 416 80
WIRE -80 96 -80 80
WIRE 560 96 560 80
WIRE 416 112 416 80
WIRE -80 192 -80 176
WIRE 560 192 560 176
WIRE 64 240 64 80
WIRE 80 240 64 240
WIRE 416 240 416 192
WIRE 416 240 368 240
WIRE 416 256 416 240
WIRE 224 304 224 288
WIRE 416 352 416 336
SYMBOL voltage -80 80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL current 560 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 19 82 Left 2
WINDOW 3 39 36 Left 2
SYMATTR SpiceLine load
SYMATTR Value {iload}
SYMATTR InstName I1
SYMBOL res 400 96 R0
SYMATTR InstName R2
SYMATTR Value 164K
SYMBOL LTC1844-SD 224 160 R0
SYMATTR InstName U1
SYMBOL res 400 240 R0
SYMATTR InstName R1
SYMATTR Value 100K
FLAG 224 304 0
FLAG 416 352 0
FLAG -80 192 0
FLAG 560 192 0
FLAG 560 80 OUT
FLAG -80 80 IN
TEXT 744 120 Left 2 !.dc v1 5 2 10m
TEXT 744 208 Left 2 !.measure DC vdrop WHEN V(out)=3.2\n.measure DC dropout param Vdrop-3.2
TEXT 744 160 Left 2 !.step param iload list 1u 10m 25m 50m 75m 100m 125m 150m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1261CS8-4.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1261CS8-4.5.asy)
C2 N001 N003 0.1
XU2 IN N001 N003 0 NC_01 OUT N002 NC_02 LTC1261CS8-4.5 ;pnba Vcc)C1+)C1-)GND)COMP)OUT)REG)SHDN
V1 IN 0 5
C3 OUT 0 3.3
Rload OUT 0 800
R1 IN N002 10k
.tran 2m
.lib LTC1261CS8-4.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2424 2180
WIRE 1680 1056 1536 1056
WIRE 2064 1056 1680 1056
WIRE 1536 1072 1536 1056
WIRE 2064 1088 2064 1056
WIRE 1680 1136 1680 1056
WIRE 1712 1136 1680 1136
WIRE 1536 1168 1536 1152
WIRE 1712 1200 1632 1200
WIRE 2064 1200 2064 1168
WIRE 2064 1200 2000 1200
WIRE 1712 1264 1632 1264
WIRE 2064 1264 2000 1264
WIRE 2160 1264 2064 1264
WIRE 2064 1280 2064 1264
WIRE 2160 1280 2160 1264
WIRE 1712 1328 1696 1328
WIRE 2064 1376 2064 1344
WIRE 2160 1376 2160 1360
SYMBOL cap 2048 1280 R0
SYMATTR InstName C3
SYMATTR Value 3.3
SYMBOL VOLTAGE 1536 1056 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2048 1072 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL cap 1616 1200 R0
WINDOW 0 33 18 Left 2
WINDOW 3 30 49 Left 2
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL RES 2144 1264 R0
SYMATTR InstName Rload
SYMATTR Value 800
SYMBOL LTC1261CS8-4.5 1856 1232 R0
SYMATTR InstName U2
FLAG 1696 1328 0
FLAG 1536 1168 0
FLAG 2064 1376 0
FLAG 2160 1376 0
FLAG 2160 1264 OUT
FLAG 1536 1056 IN
TEXT 1816 1408 Left 2 !.tran 2m
* Z:\home\khalils\Downloads\files\data\raw_asc\40172697c64b_quiz2.asc
* Generated by LTspice 26.0.1 for Windows.
M1 MOS_High_Pass_Filter N002 0 0 NMOS l=10u w=w
V1 N002 0 2
C1 N001 ref 20p
C2 MOS_High_Pass_Filter N001 20p
V2 N001 0 PULSE(0 0.1 1n 1n 1n 1u 2u)
R1 ref 0 10k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc library.mod
.tran 5u
.param w=10u/3.6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 32 336 32
WIRE 688 32 432 32
WIRE 704 32 688 32
WIRE 704 48 704 32
WIRE 768 64 736 64
WIRE 16 96 -48 96
WIRE 80 96 16 96
WIRE 256 96 144 96
WIRE 336 96 336 32
WIRE 336 96 256 96
WIRE 736 96 736 64
WIRE 736 96 704 96
WIRE 768 96 768 64
WIRE 256 144 256 96
WIRE 704 176 704 144
WIRE 656 208 656 128
WIRE -48 240 -48 176
WIRE 256 256 256 224
WIRE 656 320 656 288
SYMBOL voltage 656 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL cap 144 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 20p
SYMBOL nmos4 656 48 R0
SYMATTR InstName M1
SYMATTR Value2 l=10u w=w
SYMBOL voltage 256 128 R0
WINDOW 3 -122 166 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 0.1 1n 1n 1n 1u 2u)
SYMATTR InstName V2
SYMBOL res -64 80 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL cap 432 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 20p
FLAG -48 240 0
FLAG 256 256 0
FLAG 656 320 0
FLAG 704 176 0
FLAG 768 96 0
FLAG 688 32 MOS_High_Pass_Filter
FLAG 16 96 ref
TEXT 312 -48 Left 2 !.inc library.mod
TEXT 320 -88 Left 2 !.tran 5u
TEXT 32 -32 Left 2 !.param w=10u/3.6
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4530-1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 0 -V 5
I1 IN 0 PULSE(0 10n 1m 1u 1u 1 2)
R1 OUT IN 100Meg
C1 OUT IN 5p
R2 OUT 0 10K
XU2 0 IN +V -V OUT N001 ADA4530-1 ;pnba In+)In-)V+)V-)OUT)GDR
.tran 10
;.options gmin=1e-15 ; Uncomment to see actual ADA4530 input impedance
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4530-1.asy)
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1424 1064
WIRE 256 -96 192 -96
WIRE 368 -96 320 -96
WIRE -96 0 -96 -16
WIRE 80 0 80 -16
WIRE 192 16 192 -96
WIRE 240 16 192 16
WIRE 368 16 368 -96
WIRE 368 16 320 16
WIRE -96 96 -96 80
WIRE 80 96 80 80
WIRE 256 144 256 128
WIRE 192 160 192 16
WIRE 192 160 -192 160
WIRE 240 160 192 160
WIRE -192 176 -192 160
WIRE 368 176 368 16
WIRE 368 176 304 176
WIRE 480 176 368 176
WIRE 240 192 208 192
WIRE 480 192 480 176
WIRE 256 224 256 208
WIRE 288 240 288 208
WIRE -192 272 -192 256
WIRE 480 288 480 272
FLAG -96 96 0
FLAG 80 96 0
FLAG -96 -16 +V
FLAG 80 -16 -V
FLAG 256 128 +V
FLAG 256 224 -V
FLAG 480 288 0
FLAG -192 272 0
FLAG 480 176 OUT
FLAG -192 160 IN
FLAG 208 192 0
SYMBOL voltage -96 -16 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 80 96 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL current -192 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value PULSE(0 10n 1m 1u 1u 1 2)
SYMBOL res 336 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100Meg
SYMBOL cap 320 -112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 5p
SYMBOL res 464 176 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL ADA4530-1 272 176 R0
SYMATTR InstName U2
TEXT -48 384 Left 2 !.tran 10\n;.options gmin=1e-15 ; Uncomment to see actual  ADA4530 input impedance
* Z:\home\khalils\Downloads\files\data\raw_asc\fc8c132df25a_1047.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
R1 N002 N001 220K
R2 N001 IN 220K
V3 IN 0 SINE(0 1 1K)
XU1 0 N001 +V 0 N003 LTC1047 ;pnba In+)In-)V+)V-)OUT
D1 N003 N002 1N4148
XU2 N002 OUT +V 0 OUT LTC1047 ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m
* Precise DC Full-Wave Rectifier(Absolute Value Circuit)
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC1047.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 544 128 432 128
WIRE 32 144 -64 144
WIRE 128 144 112 144
WIRE 224 144 128 144
WIRE 400 144 304 144
WIRE -176 176 -176 160
WIRE -64 176 -64 144
WIRE 480 192 480 176
WIRE 192 208 192 192
WIRE 432 208 432 128
WIRE 448 208 432 208
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 544 224 544 128
WIRE 544 224 512 224
WIRE 576 224 544 224
WIRE 320 240 224 240
WIRE 400 240 400 144
WIRE 400 240 384 240
WIRE 448 240 400 240
WIRE 160 256 128 256
WIRE -176 272 -176 256
WIRE -64 272 -64 256
WIRE 480 272 480 256
WIRE 192 288 192 272
FLAG -176 272 0
FLAG 192 192 +V
FLAG -176 160 +V
FLAG -64 272 0
FLAG 192 288 0
FLAG 480 176 +V
FLAG 480 272 0
FLAG 128 256 0
FLAG 576 224 OUT
FLAG -64 144 IN
SYMBOL voltage -176 160 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 320 128 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 220K
SYMBOL res 128 128 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 220K
SYMBOL voltage -64 160 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL opamps\\LTC1047 192 176 R0
SYMATTR InstName U1
SYMBOL diode 320 256 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL opamps\\LTC1047 480 160 R0
SYMATTR InstName U2
TEXT 510 322 Left 0 !.tran 3m
TEXT 200 88 Bottom 0 ;Precise DC Full-Wave Rectifier(Absolute Value Circuit)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3686.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3686.asy)
Rload OUT 0 2.75
XU1 IN OUT N006 N005 N003 IN 0 N001 N004 N002 0 LT3686 ;pnba Vin)BD)FB)SS)Rt)EN/UVLO)Mode)Boost)DA)SW)GND
D1 N004 N002 MBRS140
L1 N002 OUT 6.8
C3 N005 0 1n
R2 N006 0 10K
C2 OUT 0 22 Rser=5m
C1 N001 N002 0.22
R1 OUT N006 31.6K
V1 IN 0 12
R3 N003 0 15.4K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LT3686.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE 96 16 -16 16
WIRE 112 16 96 16
WIRE 672 16 400 16
WIRE -16 32 -16 16
WIRE 96 112 96 16
WIRE 112 112 96 112
WIRE 432 112 400 112
WIRE -16 128 -16 112
WIRE 432 128 432 112
WIRE 112 208 96 208
WIRE 432 208 432 192
WIRE 432 208 400 208
WIRE 496 208 432 208
WIRE 592 208 576 208
WIRE 672 208 672 16
WIRE 672 208 592 208
WIRE 768 208 672 208
WIRE 432 224 432 208
WIRE 672 224 672 208
WIRE 768 224 768 208
WIRE 16 304 0 304
WIRE 112 304 96 304
WIRE 432 304 432 288
WIRE 432 304 400 304
WIRE 592 304 592 208
WIRE 672 320 672 288
WIRE 768 320 768 304
WIRE 32 400 0 400
WIRE 112 400 96 400
WIRE 592 400 592 384
WIRE 592 400 400 400
WIRE 592 416 592 400
WIRE 256 464 256 448
WIRE 592 512 592 496
SYMBOL PowerProducts\\LT3686 256 208 R0
SYMATTR InstName U1
SYMBOL res 576 288 R0
SYMATTR InstName R1
SYMATTR Value 31.6K
SYMBOL cap 416 128 R0
WINDOW 3 25 53 Left 2
SYMATTR Value 0.22
SYMATTR InstName C1
SYMBOL res 576 400 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL ind 480 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMBOL schottky 416 288 M180
WINDOW 0 35 58 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage -16 16 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 752 208 R0
SYMATTR InstName Rload
SYMATTR Value 2.75
SYMBOL cap 656 224 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMATTR SpiceLine Rser=5m
SYMBOL res 112 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 15.4K
SYMBOL cap 96 384 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1n
FLAG 592 512 0
FLAG 256 464 0
FLAG 0 400 0
FLAG 0 304 0
FLAG 96 208 0
FLAG 672 320 0
FLAG 768 320 0
FLAG -16 128 0
FLAG -16 16 IN
FLAG 768 208 OUT
TEXT 720 400 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\02076dbbb6da_low-gain-amp-with-out_C_v3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R2 N002 N001 10k
R1 N001 N003 1k
V3 0 N005 5
V1 N003 0 AC 1
XU1 N001 0 N004 N005 N002 level2 Avol=1Meg GBW=100Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V2 N004 0 5
.ac dec 1000 1e5 5e9
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -112 160 -112
WIRE 480 -112 352 -112
WIRE 160 -16 160 -112
WIRE 272 -16 160 -16
WIRE 480 -16 480 -112
WIRE 480 -16 336 -16
WIRE 368 32 304 32
WIRE 0 64 -96 64
WIRE 160 64 160 -16
WIRE 160 64 80 64
WIRE 304 64 304 32
WIRE 368 64 368 32
WIRE -96 144 -96 64
WIRE 224 144 144 144
WIRE 224 176 224 144
WIRE 304 192 304 144
WIRE 144 208 144 144
WIRE 272 208 144 208
WIRE 480 224 480 -16
WIRE 480 224 336 224
WIRE 560 224 480 224
WIRE 80 240 80 64
WIRE 272 240 80 240
WIRE -96 288 -96 224
WIRE 304 352 304 256
WIRE 304 480 304 432
SYMBOL voltage 304 448 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 96 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL OpAmps\\UniversalOpAmp2 304 224 R0
SYMATTR InstName U1
SYMATTR Value2 Avol=1Meg GBW=100Meg Slew=10Meg
SYMBOL voltage 304 160 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 368 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage -96 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value AC 1
FLAG 304 480 0
FLAG 368 64 0
FLAG 224 176 0
FLAG -96 288 0
TEXT -128 504 Left 2 !.ac dec 1000 1e5 5e9
* Z:\home\khalils\Downloads\files\data\raw_asc\18295fefb96b_Tab9_1_ftp.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1)/I(vsg)
VSD 0 N003 250m
M1 0 N002 N003 N001 P_1u l=2u w=30u
VSG 0 N002 1.15 AC 1
VBS N001 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.ac dec 100 10MEG 10G
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 688
WIRE 320 96 320 80
WIRE 320 192 320 176
WIRE 400 192 320 192
WIRE 448 80 320 80
WIRE 448 112 448 80
WIRE 448 304 448 208
WIRE 528 160 448 160
WIRE 672 80 448 80
WIRE 672 160 608 160
WIRE 672 160 672 80
WIRE 672 208 672 160
WIRE 672 304 448 304
WIRE 672 304 672 288
WIRE 720 80 672 80
WIRE 720 112 720 80
SYMBOL voltage 512 160 M90
WINDOW 0 -32 56 VBottom 0
WINDOW 3 -6 99 VBottom 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VBS
SYMATTR Value 0
SYMBOL voltage 672 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 41 57 Left 0
WINDOW 3 41 85 Left 0
SYMATTR InstName VSD
SYMATTR Value 250m
SYMBOL voltage 320 80 R0
WINDOW 0 -89 56 Left 0
WINDOW 3 -89 84 Left 0
WINDOW 123 -89 112 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VSG
SYMATTR Value 1.15
SYMATTR Value2 AC 1
SYMBOL pmos4 400 112 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=2u w=30u
SYMATTR InstName M1
SYMATTR Value P_1u
FLAG 720 112 0
TEXT 424 336 Left 0 !.ac dec 100 10MEG 10G
TEXT 424 360 Left 0 !.lib cmosedu_models.txt
TEXT 448 56 Left 0 ;Plot Id(M1)/I(vsg)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2370-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 12
L1 N002 OUT 10 Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
C1 OUT 0 10
R1 OUT N001 10K
XU1 IN IN IN IN N002 OUT N001 0 ADP2370-3.0 IPSM=440m Rt=366.6666k Rb=133.3333k C1=1.6p Rc1=300k R3=5.92k Rshort=100MEG PD=0 ;pnba FSEL)SYNC)EN)Vin)SW)FB)PG)PGND
Rload OUT 0 20
.tran 500u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2370-3.0.asy)
.lib ADP2370-3.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 692
WIRE 160 96 48 96
WIRE 176 96 160 96
WIRE 480 96 400 96
WIRE 640 96 560 96
WIRE 48 112 48 96
WIRE 160 176 160 96
WIRE 176 176 160 176
WIRE 432 176 400 176
WIRE 560 176 512 176
WIRE 640 176 640 96
WIRE 640 176 560 176
WIRE 704 176 640 176
WIRE 704 192 704 176
WIRE 48 208 48 192
WIRE 160 256 160 176
WIRE 176 256 160 256
WIRE 560 256 560 240
WIRE 560 256 400 256
WIRE 560 272 560 256
WIRE 704 288 704 272
WIRE 160 336 160 256
WIRE 176 336 160 336
WIRE 640 336 640 176
WIRE 640 336 400 336
FLAG 48 208 0
FLAG 48 96 IN
FLAG 560 272 0
FLAG 704 176 OUT
FLAG 704 288 0
SYMBOL VOLTAGE 48 96 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ind 416 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
SYMBOL cap 544 176 R0
WINDOW 0 29 15 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 576 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL ADP2370-3.0 288 208 R0
SYMATTR InstName U1
SYMBOL res 688 176 R0
SYMATTR InstName Rload
SYMATTR Value 20
TEXT 512 360 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1469-2.asc
* Generated by LTspice 26.0.1 for Windows.
* 100KHz Low Distortion Bandpass Filter
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1469-2.asy)
V1 +V 0 15
R1 OUT N002 22.1K
R3 0 N001 121
XU1 0 N002 +V -V OUT LT1468-2 ;pnba In+)In-)V+)V-)OUT
R2 N001 IN 11K
V2 -V 0 -15
C2 OUT N001 1000p
V3 IN 0 AC 1
C1 N002 N001 1000p
.ac oct 100 10K 1Meg
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -224 16 -224 0
WIRE -96 16 -96 0
WIRE 80 32 0 32
WIRE 304 32 144 32
WIRE 192 96 176 96
WIRE 304 96 304 32
WIRE 304 96 272 96
WIRE -224 112 -224 96
WIRE -96 112 -96 96
WIRE 240 208 240 192
WIRE -144 224 -208 224
WIRE 0 224 0 32
WIRE 0 224 -64 224
WIRE 80 224 0 224
WIRE 176 224 176 96
WIRE 176 224 144 224
WIRE 208 224 176 224
WIRE -208 240 -208 224
WIRE 0 240 0 224
WIRE 304 240 304 96
WIRE 304 240 272 240
WIRE 352 240 304 240
WIRE 208 256 176 256
WIRE 240 288 240 272
WIRE -208 336 -208 320
WIRE 0 336 0 320
SYMBOL voltage -96 0 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -208 224 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL res -48 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 11K
SYMBOL voltage -224 0 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL opamps\\LT1469-2 240 176 R0
SYMATTR InstName U1
SYMBOL cap 144 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL cap 144 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000p
SYMBOL res 288 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 22.1K
SYMBOL res -16 336 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 121
FLAG -96 112 0
FLAG 240 192 +V
FLAG -96 0 +V
FLAG 240 288 -V
FLAG -224 112 0
FLAG -224 0 -V
FLAG -208 336 0
FLAG 176 256 0
FLAG 0 336 0
FLAG 352 240 OUT
FLAG -208 224 IN
TEXT 96 352 Left 2 !.ac oct 100 10K 1Meg
TEXT 80 -56 Bottom 2 ;100KHz Low Distortion Bandpass Filter
* Z:\home\khalils\Downloads\files\data\raw_asc\2d9e82ec2a5b_rf_det_out_amp_bodge_ac.asc
* Generated by LTspice 26.0.1 for Windows.
* OPA358AIDCKR
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R4 N003 0 20k
R2 out N001 100k
C2 out_filt 0 10p
V1 in 0 PULSE(2.1 2 2u 1n 1n 500n 1u) AC 1
V2 3v3 0 3.3
C1 N003 in 22n
R3 3v3 N003 10k
R1 N001 3v3 10k
R6 out_filt out 5.1k
C3 N002 N001 1p
R5 N001 0 20k
XU1 N003 N001 3v3 0 out level2 Avol=1Meg GBW=80Meg Slew=55Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.ac dec 1000 10k 1G
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 -144 256 -144
WIRE 432 -144 384 -144
WIRE 256 -48 256 -144
WIRE 256 -48 208 -48
WIRE 320 -48 256 -48
WIRE 448 -48 400 -48
WIRE -320 -32 -320 -48
WIRE 32 16 32 0
WIRE -320 64 -320 48
WIRE 304 80 304 64
WIRE 208 96 208 -48
WIRE 208 96 112 96
WIRE 272 96 208 96
WIRE 448 112 448 -48
WIRE 448 112 336 112
WIRE 528 112 448 112
WIRE 672 112 608 112
WIRE -64 128 -80 128
WIRE 32 128 32 96
WIRE 32 128 0 128
WIRE 272 128 32 128
WIRE 304 160 304 144
WIRE 672 160 672 112
WIRE 32 176 32 128
WIRE 112 176 112 96
WIRE 208 176 208 96
WIRE -80 192 -80 128
WIRE 672 240 672 224
WIRE 32 272 32 256
WIRE 80 272 32 272
WIRE 112 272 112 256
WIRE 112 272 80 272
WIRE 208 272 208 256
WIRE 80 288 80 272
WIRE -80 304 -80 272
SYMBOL voltage -80 176 M0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value PULSE(2.1 2 2u 1n 1n 500n 1u)
SYMBOL cap 656 160 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL cap 0 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL voltage -320 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL res 16 0 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL cap 384 -160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1p
SYMBOL res 192 160 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 624 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 5.1k
SYMBOL OpAmps\\UniversalOpAmp2 304 112 R0
SYMATTR InstName U1
SYMATTR Value2 Avol=1Meg GBW=80Meg Slew=55Meg
SYMBOL res 416 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res 96 160 R0
SYMATTR InstName R5
SYMATTR Value 20k
SYMBOL res 16 160 R0
SYMATTR InstName R4
SYMATTR Value 20k
FLAG 304 64 3v3
FLAG 304 160 0
FLAG 448 112 out
FLAG -80 128 in
FLAG -320 64 0
FLAG -320 -48 3v3
FLAG 32 0 3v3
FLAG 208 272 3v3
FLAG 672 240 0
FLAG 672 112 out_filt
FLAG 80 288 0
FLAG -80 304 0
TEXT 472 -8 Left 2 ;OPA358AIDCKR
TEXT -468 364 Left 2 !.ac dec 1000 10k 1G
* Z:\home\khalils\Downloads\files\data\raw_asc\10481680f003_Fig1_25.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot v(Vin) and V(vout)
R1 Vin Vout 1k
C1 Vout 0 1p
Vin Vin 0 PULSE(0 1 6n 10p 10p 3n 10n)
.tran 30n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 48 224 0 224
WIRE 112 224 48 224
WIRE 320 224 192 224
WIRE 352 224 320 224
WIRE 0 240 0 224
WIRE 352 240 352 224
WIRE 0 336 0 320
WIRE 352 336 352 304
SYMBOL voltage 0 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(0 1 6n 10p 10p 3n 10n)
SYMBOL cap 336 240 R0
SYMATTR InstName C1
SYMATTR Value 1p
SYMBOL res 96 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 0 336 0
FLAG 352 336 0
FLAG 320 224 Vout
FLAG 48 224 Vin
TEXT 40 400 Left 0 !.tran 30n
TEXT 24 144 Left 0 ;Plot v(Vin) and V(vout)
* Z:\home\khalils\Downloads\files\data\raw_asc\3da8108634dd_1784.asc
* Generated by LTspice 26.0.1 for Windows.
* Single Supply Full Wave Rectifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1784.asy)
XU1 0 N001 N002 +V 0 NC_01 LT1784 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN
D1 N002 OUT BAT54
R3 OUT N001 1K
V3 IN 0 SINE(0 1 10)
R1 N002 +V 1K
V1 +V 0 5
R2 N001 IN 1K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 300m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 16 -48 -96 -48
WIRE 128 -48 96 -48
WIRE 192 -48 128 -48
WIRE 336 -48 272 -48
WIRE 416 -48 336 -48
WIRE -96 -32 -96 -48
WIRE 336 -16 336 -48
WIRE -96 64 -96 48
WIRE 192 64 192 48
WIRE 224 64 192 64
WIRE 336 64 336 48
WIRE 336 64 304 64
WIRE 192 112 192 64
WIRE 128 160 128 -48
WIRE 160 160 128 160
WIRE 336 192 336 64
WIRE 336 192 304 192
WIRE -48 208 -48 192
WIRE 160 224 128 224
WIRE 192 288 192 272
WIRE -48 304 -48 288
SYMBOL opamps\\LT1784 192 192 R0
SYMATTR InstName U1
SYMBOL res 320 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 288 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL voltage -96 -48 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 10)
SYMBOL voltage -48 192 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 112 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL schottky 320 48 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
FLAG -48 304 0
FLAG 192 48 +V
FLAG -48 192 +V
FLAG -96 64 0
FLAG 128 224 0
FLAG 416 -48 OUT
FLAG 192 288 0
FLAG -96 -48 IN
TEXT 376 272 Left 2 !.tran 300m
TEXT 224 -104 Bottom 2 ;Single Supply Full Wave Rectifier