Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\129759923fc4_circuito1_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N003 0 464n
V1 N001 0 AC 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -80 16 -80
WIRE 160 -48 160 -80
WIRE 160 -48 96 -48
WIRE 208 -48 160 -48
WIRE 208 -32 208 -48
WIRE 16 0 16 -80
WIRE 16 0 -64 0
WIRE 160 32 96 32
WIRE 208 32 160 32
WIRE -64 48 -64 0
WIRE 16 64 16 0
WIRE 160 112 96 112
WIRE 208 112 160 112
WIRE 208 128 208 112
WIRE -64 160 -64 128
WIRE 16 160 16 128
WIRE 16 160 -64 160
WIRE 160 192 96 192
WIRE 208 192 160 192
WIRE 16 208 16 160
WIRE 160 208 160 192
WIRE 160 208 16 208
WIRE 16 240 16 208
SYMBOL cap 192 128 R0
SYMATTR InstName C1
SYMATTR Value 464n
SYMBOL voltage -64 32 R0
WINDOW 3 24 44 Left 2
WINDOW 123 24 72 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMATTR InstName V1
FLAG 16 240 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1965-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
C1 OUT 0 10
V1 IN 0 PWL(0 0 1 5)
Rload OUT 0 2.5
XU1 IN IN 0 OUT OUT LT1965-x.x R=12.66K ;pnba _SHDN)IN)GND)OUT)Sense
.tran 1 startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1965-2.5.asy)
.lib LT1965.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1124 680
WIRE 48 112 -160 112
WIRE 64 112 48 112
WIRE 384 112 352 112
WIRE 448 112 384 112
WIRE 560 112 448 112
WIRE -160 128 -160 112
WIRE 448 128 448 112
WIRE 560 128 560 112
WIRE -160 224 -160 208
WIRE 448 224 448 192
WIRE 560 224 560 208
WIRE 48 240 48 112
WIRE 64 240 48 240
WIRE 384 240 384 112
WIRE 384 240 352 240
WIRE 208 320 208 304
FLAG 208 320 0
FLAG -160 224 0
FLAG 448 224 0
FLAG 560 224 0
FLAG -160 112 IN
FLAG 560 112 OUT
SYMBOL cap 432 128 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage -160 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 5)
SYMBOL res 544 112 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL PowerProducts\\LT1965-2.5 208 176 R0
SYMATTR InstName U1
TEXT 400 296 Left 2 !.tran 1 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\8595ae3532ad_45n_IDVG.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 0 NMOS l=45n w=90n
VG N002 0 1
VD N001 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VG 0 1 0.0001 VD 0.05 1 0.95
.inc "45nm_HP.pm"
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1144 680
WIRE 464 16 240 16
WIRE 464 32 464 16
WIRE 240 96 240 16
WIRE 336 144 240 144
WIRE 192 176 0 176
WIRE 336 192 336 144
WIRE 336 192 240 192
WIRE 0 272 0 256
WIRE 240 272 240 192
WIRE 240 272 0 272
WIRE 464 272 464 112
WIRE 464 272 240 272
WIRE 240 304 240 272
FLAG 240 304 0
SYMBOL nmos4 192 96 R0
SYMATTR InstName M1
SYMATTR Value2 l=45n w=90n
SYMBOL voltage 0 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VG
SYMATTR Value 1
SYMBOL voltage 464 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VD
SYMATTR Value 1
TEXT 760 136 Left 2 !.dc VG 0 1 0.0001 VD 0.05 1 0.95
TEXT 768 176 Left 2 !.inc "45nm_HP.pm"
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8362.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 12
L1 IN N001 6.8 Rser=.5
D1 N001 OUT MBRS1100
C1 OUT 0 4.7
R1 N003 0 34.8K
C2 N006 0 150p
C3 N007 0 2.2n
R2 N004 0 20K
C4 N002 0 1
C5 OUT N003 4.7p
Rload OUT 0 150
R3 OUT N003 1Meg
R4 N005 N006 57.6K
XU1 IN N005 IN N001 N002 NC_01 0 N007 N003 N004 0 LT8362 ;pnba EN/UVLO)VC)VIN)SW)INTVCC)MODE)BIAS)SS)FBX)RT)GND
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.4m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8362.asy)
.lib LT8362.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE 32 -32 -64 -32
WIRE 144 -32 32 -32
WIRE 176 -32 144 -32
WIRE 304 -32 256 -32
WIRE 416 -32 304 -32
WIRE 544 -32 480 -32
WIRE 656 -32 544 -32
WIRE 768 -32 656 -32
WIRE 864 -32 768 -32
WIRE -64 -16 -64 -32
WIRE 768 -16 768 -32
WIRE 864 -16 864 -32
WIRE 544 0 544 -32
WIRE 656 0 656 -32
WIRE 144 16 144 -32
WIRE 304 16 304 -32
WIRE -64 80 -64 64
WIRE 32 80 32 -32
WIRE 64 80 32 80
WIRE 400 80 384 80
WIRE 480 80 464 80
WIRE 768 80 768 48
WIRE 864 80 864 64
WIRE 544 112 544 64
WIRE 656 112 656 80
WIRE 656 112 544 112
WIRE 656 128 656 112
WIRE 544 176 544 112
WIRE 544 176 384 176
WIRE 656 224 656 208
WIRE -32 272 -48 272
WIRE 64 272 48 272
WIRE 416 272 384 272
WIRE 544 272 496 272
WIRE 624 272 608 272
WIRE -16 368 -48 368
WIRE 64 368 48 368
WIRE 400 368 384 368
WIRE 224 448 224 432
FLAG -64 80 0
FLAG 864 80 0
FLAG 768 80 0
FLAG 400 368 0
FLAG 224 448 0
FLAG -48 272 0
FLAG -48 368 0
FLAG 624 272 0
FLAG 656 224 0
FLAG 864 -32 OUT
FLAG -64 -32 IN
FLAG 480 80 0
SYMBOL voltage -64 -32 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ind 160 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMATTR SpiceLine Rser=.5
SYMBOL schottky 416 -16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS1100
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 752 -16 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL res 640 112 R0
SYMATTR InstName R1
SYMATTR Value 34.8K
SYMBOL cap 544 288 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
WINDOW 123 -21 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 150p
SYMBOL cap 48 352 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 2.2n
SYMBOL res 64 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 20K
SYMBOL cap 400 64 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap 528 0 R0
WINDOW 123 21 62 Left 2
WINDOW 3 43 34 Left 2
SYMATTR Value 4.7p
SYMATTR InstName C5
SYMBOL res 848 -32 R0
SYMATTR InstName Rload
SYMATTR Value 150
SYMBOL res 640 -16 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL res 400 288 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 57.6K
SYMBOL LT8362 224 224 R0
SYMATTR InstName U1
TEXT 560 456 Left 2 !.tran 1.4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\01bbe363e559_Draft10.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 1k
R2 0 N003 1k
C1 N002 0 1n
C3 N001 N003 1n
V1 N001 0 PULSE(0 1 0 1p 1p 1n 2n) AC 1
.ac dec 10 10 10G
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 96 -48 96
WIRE 64 112 64 96
WIRE 112 112 64 112
WIRE 240 112 192 112
WIRE -48 144 -48 96
WIRE 64 144 64 112
WIRE 240 144 240 112
WIRE 64 240 64 208
WIRE 112 240 64 240
WIRE 224 240 192 240
WIRE 240 240 240 208
WIRE 240 240 224 240
WIRE 256 240 240 240
WIRE -48 288 -48 224
WIRE 256 288 256 240
WIRE 256 288 -48 288
FLAG 224 240 0
SYMBOL res 208 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 208 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL cap 224 144 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL cap 48 144 R0
SYMATTR InstName C3
SYMATTR Value 1n
SYMBOL voltage -48 128 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1p 1p 1n 2n)
SYMATTR Value2 AC 1
TEXT -80 328 Left 2 !.ac dec 10 10 10G
* Z:\home\khalils\Downloads\files\data\raw_asc\29bd96a07291_CMOS_Potential_Divider.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vout Vout 0 N001 NMOS l=5 w=15
V1 VDD 0 5V
M2 Vout Vout VDD VDD PMOS l=5 w=15
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.MODEL NMOS NMOS(VT0=0.83 LAMBDA=0.06 KP=50U)
.MODEL PMOS PMOS(VT0=0.91 LAMBDA=0.06 KP=17U)
.tran 600N
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 -48 128 -64
WIRE 144 -48 128 -48
WIRE 144 16 144 -48
WIRE 144 16 128 16
WIRE 80 32 32 32
WIRE 144 64 144 16
WIRE 144 64 128 64
WIRE -176 80 -176 16
WIRE 32 128 32 32
WIRE 128 128 128 112
WIRE 128 128 32 128
WIRE 192 128 128 128
WIRE 128 160 128 128
WIRE 144 208 128 208
WIRE 32 240 32 128
WIRE 80 240 32 240
WIRE 144 240 144 208
WIRE 144 240 128 240
WIRE -176 288 -176 160
WIRE 128 336 128 256
IOPIN 192 128 Out
SYMBOL voltage -176 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5V
SYMBOL pmos4 80 112 M180
SYMATTR InstName M2
SYMATTR Value2 l=5 w=15
SYMBOL nmos4 80 160 R0
SYMATTR InstName M1
SYMATTR Value2 l=5 w=15
FLAG -176 288 0
FLAG -176 16 VDD
FLAG 128 -64 VDD
FLAG 192 128 Vout
FLAG 128 336 0
TEXT -264 -192 Left 2 !.MODEL NMOS NMOS(VT0=0.83 LAMBDA=0.06 KP=50U)\n.MODEL PMOS PMOS(VT0=0.91 LAMBDA=0.06 KP=17U)
TEXT -224 -112 Left 2 !.tran 600N
* Z:\tmp\asc_dec_bjh7r6w2\095460fd0fac_Filtre_passe_bande_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
VDD VPP 0 -6
C2 N003 IN1 2200n
R1 N002 N001 3.6172k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3580 680
WIRE 256 -80 224 -80
WIRE 368 -80 336 -80
WIRE 224 0 224 -80
WIRE 240 0 224 0
WIRE 368 0 368 -80
WIRE 368 0 304 0
WIRE 48 112 32 112
WIRE 128 112 112 112
WIRE 224 112 224 0
WIRE 224 112 208 112
WIRE 272 112 224 112
WIRE 368 128 368 0
WIRE 272 144 240 144
WIRE 240 208 240 144
WIRE 240 208 96 208
WIRE 96 224 96 208
WIRE 240 224 240 208
WIRE 368 224 240 224
SYMBOL voltage -400 -288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value -6
SYMBOL cap 112 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 2200n
SYMBOL res 352 -96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 24 48 VTop 2
SYMATTR InstName R1
SYMATTR Value 3.6172k
FLAG -528 -192 0
FLAG -400 -192 0
FLAG -528 -272 VCC
FLAG -400 -272 VPP
FLAG 304 160 VCC
FLAG 304 96 VPP
FLAG 96 224 0
FLAG 32 112 IN1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3074.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3074.asy)
R2 0 N007 32.8k
R3 OUT N005 442k
V2 N004 0 5
R4 N005 0 49.9k
XU1 IN 0 N006 0 N003 NC_01 OUT N004 N007 OUT 0 IN N001 N005 NC_02 N002 LT3074 TA=25 Rth=42 ;pnba EN)DGND)SETCAP)CLKDIS)PG)VIOC)OUT)BIAS)SETRES)SENSE)AGND)IN)BIASDF)PGFB)IMON)BIASAF
C3 N006 0 4.7
C4 OUT 0 10 Rser=2m
R1 IN N003 499k
V1 IN 0 3.5
C2 N002 0 2.2
C1 N001 0 0.47
Rload OUT 0 1.1
.tran 2
.lib LT3074.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1988 2304
WIRE 208 1600 208 1584
WIRE 336 1600 336 1584
WIRE 208 1680 208 1664
WIRE 336 1680 336 1664
WIRE -112 1744 -128 1744
WIRE 64 1744 -112 1744
WIRE 96 1744 64 1744
WIRE 480 1744 448 1744
WIRE 592 1744 560 1744
WIRE 64 1808 64 1744
WIRE 96 1808 64 1808
WIRE 736 1808 448 1808
WIRE -128 1840 -128 1824
WIRE 96 1872 -96 1872
WIRE 624 1872 448 1872
WIRE 736 1872 736 1808
WIRE 736 1872 624 1872
WIRE 848 1872 736 1872
WIRE 624 1888 624 1872
WIRE 736 1888 736 1872
WIRE 848 1888 848 1872
WIRE 96 1936 32 1936
WIRE 544 1936 448 1936
WIRE 32 1952 32 1936
WIRE -96 1968 -96 1872
WIRE 736 1968 736 1952
WIRE 544 1984 544 1936
WIRE 624 1984 624 1968
WIRE 624 1984 544 1984
WIRE 848 1984 848 1968
WIRE 96 2000 16 2000
WIRE 16 2016 16 2000
WIRE 624 2016 624 1984
WIRE -96 2064 -96 2048
WIRE 480 2064 448 2064
WIRE 480 2080 480 2064
WIRE 16 2096 16 2080
WIRE 624 2112 624 2096
WIRE 208 2176 208 2128
WIRE 272 2176 208 2176
WIRE 336 2176 336 2128
WIRE 336 2176 272 2176
WIRE 480 2176 480 2160
WIRE 272 2208 272 2176
SYMBOL res 832 1872 R0
SYMATTR InstName Rload
SYMATTR Value 1.1
SYMBOL cap 192 1664 M180
WINDOW 0 40 39 Left 2
WINDOW 3 39 15 Left 2
SYMATTR InstName C1
SYMATTR Value 0.47
SYMBOL LT3074 272 1856 R0
SYMATTR InstName U1
SYMBOL cap 720 1888 R0
WINDOW 3 26 56 Left 2
SYMATTR Value 10
SYMATTR InstName C4
SYMATTR SpiceLine Rser=2m
SYMBOL res 608 2000 R0
SYMATTR InstName R4
SYMATTR Value 49.9k
SYMBOL res 576 1728 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 499k
SYMBOL voltage -96 1952 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
WINDOW 0 36 42 Left 2
WINDOW 3 38 68 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 464 2176 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 32.8k
SYMBOL res 608 1872 R0
SYMATTR InstName R3
SYMATTR Value 442k
SYMBOL cap 0 2016 R0
WINDOW 0 48 27 Bottom 2
WINDOW 3 53 40 Top 2
WINDOW 39 53 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 4.7
SYMBOL voltage -128 1728 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 37 45 Left 2
WINDOW 3 35 69 Left 2
SYMATTR InstName V1
SYMATTR Value 3.5
SYMBOL cap 320 1664 M180
WINDOW 3 38 21 Left 2
WINDOW 0 40 43 Left 2
SYMATTR Value 2.2
SYMATTR InstName C2
FLAG 272 2208 0
FLAG -128 1840 0
FLAG -112 1744 IN
FLAG -96 2064 0
FLAG 736 1968 0
FLAG 848 1872 OUT
FLAG 848 1984 0
FLAG 480 2176 0
FLAG 336 1584 0
FLAG 16 2096 0
FLAG 208 1584 0
FLAG 624 2112 0
FLAG 592 1744 IN
FLAG 32 1952 0
TEXT 872 2256 Left 2 !.tran 2
* Z:\home\khalils\Downloads\files\data\raw_asc\193bb0400c8d_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp1.asy)
XU1 out N001 +5v -5v out level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 +5v 0 5
V2 -5v 0 -5
V3 N001 0 PWL(0 0 1m 1 3m 3)
.tran 1s
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 160 272 144
WIRE 240 176 32 176
WIRE 32 192 32 176
WIRE 416 192 304 192
WIRE 464 192 416 192
WIRE 480 192 464 192
WIRE 240 208 176 208
WIRE 272 240 272 224
WIRE 176 288 176 208
WIRE 416 288 416 192
WIRE 416 288 176 288
WIRE 32 304 32 272
SYMBOL voltage 32 176 R0
WINDOW 3 -110 159 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PWL(0 0 1m 1 3m 3)
SYMBOL voltage 368 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 224 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL OpAmps\\UniversalOpAmp1 272 192 R0
SYMATTR InstName U1
FLAG 224 96 0
FLAG 368 96 0
FLAG 224 16 +5v
FLAG 368 16 -5v
FLAG 272 240 -5v
FLAG 272 144 +5v
FLAG 32 304 0
FLAG 464 192 out
TEXT -72 360 Left 2 !.tran 1s
* Z:\home\khalils\Downloads\files\data\raw_asc\22df2b93018d_lab8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
R3 OUT N002 {R1}
R5 MCU OUT R
D2 MCU 3.3V D
C1 HPF N001 {Ch}
XU1 LPF N002 N003 0 OUT level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V2 N003 0 5
C2 0 LPF {Cl}
R2 LPF HPF {Rl}
R1 HPF 0 {Rh}
R4 N002 0 {R2}
V1 N001 0 AC 1 0
D1 0 MCU D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.param Ch=47u Rh=6.7k Rl=2k Cl=47u
.param R1=390k R2=1k
.ac dec 1000 0.01 20
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1192 680
WIRE 128 -64 16 -64
WIRE 256 -64 192 -64
WIRE 272 -64 256 -64
WIRE 352 -64 272 -64
WIRE 480 -64 432 -64
WIRE 544 -64 480 -64
WIRE 560 -64 544 -64
WIRE 560 -32 560 -64
WIRE 688 -32 560 -32
WIRE 816 -16 752 -16
WIRE 880 -16 816 -16
WIRE 912 -16 880 -16
WIRE 1040 -16 1040 -64
WIRE 1040 -16 992 -16
WIRE 1120 -16 1040 -16
WIRE 16 0 16 -64
WIRE 688 0 656 0
WIRE 272 16 272 -64
WIRE 816 16 816 -16
WIRE 480 32 480 -64
WIRE 1040 32 1040 -16
WIRE 656 96 656 0
WIRE 816 96 656 96
WIRE 16 128 16 80
WIRE 272 128 272 96
WIRE 272 128 16 128
WIRE 480 128 480 96
WIRE 480 128 272 128
WIRE 16 144 16 128
WIRE 720 176 720 16
SYMBOL res 448 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {Rl}
SYMBOL res 256 0 R0
SYMATTR InstName R1
SYMATTR Value {Rh}
SYMBOL diode 1056 96 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL res 800 0 R0
SYMATTR InstName R3
SYMATTR Value {R1}
SYMBOL voltage 720 160 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 800 80 R0
SYMATTR InstName R4
SYMATTR Value {R2}
SYMBOL diode 1056 -64 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMBOL cap 496 96 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value {Cl}
SYMBOL cap 192 -80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {Ch}
SYMBOL OpAmps\\UniversalOpamp 720 -16 M180
SYMATTR InstName U1
SYMBOL voltage 16 -16 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1 0
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL res 1008 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
FLAG 16 144 0
FLAG 816 176 0
FLAG 720 256 0
FLAG 720 -48 0
FLAG 256 -64 HPF
FLAG 544 -64 LPF
FLAG 880 -16 OUT
FLAG 1040 96 0
FLAG 1040 -128 3.3V
FLAG 1120 -16 MCU
TEXT -48 232 Left 2 !.param Ch=47u Rh=6.7k Rl=2k Cl=47u
TEXT -40 272 Left 2 !.param R1=390k R2=1k
TEXT -40 312 Left 2 !.ac dec 1000 0.01 20
* Z:\home\khalils\Downloads\files\data\raw_asc\a7b551dc7311_ptat.asc
* Generated by LTspice 26.0.1 for Windows.
Q6 N002 N001 Vcc 0 PNP
Q1 N001 N001 Vcc 0 PNP
Q2 N002 N001 Vcc 0 PNP
Q4 N002 N002 0 0 NPN
R1 N004 0 470
Q3 N001 N002 N004 0 NPN
R3 VREF N003 .001
Q8 N002 N001 Vcc 0 PNP
Q5 N003 N002 0 0 NPN
V1 Vcc 0 +3.3V
V2 VREF 0 1V
Q7 N001 N002 N004 0 NPN
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.inc 6301.bjt
.op
.step temp 25 100 5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 48 64 16
WIRE 240 48 240 16
WIRE 272 48 240 48
WIRE 304 48 272 48
WIRE 144 96 128 96
WIRE 176 96 144 96
WIRE 208 96 176 96
WIRE 240 96 208 96
WIRE 272 144 240 144
WIRE 304 144 272 144
WIRE 64 192 64 144
WIRE 144 192 144 96
WIRE 144 192 64 192
WIRE 240 256 240 144
WIRE 240 256 160 256
WIRE 64 272 64 192
WIRE 64 272 32 272
WIRE 240 272 240 256
WIRE 416 272 416 208
WIRE 128 320 96 320
WIRE 160 320 160 256
WIRE 160 320 128 320
WIRE 176 320 160 320
WIRE 352 320 176 320
WIRE 64 368 32 368
WIRE 64 384 64 368
WIRE 240 416 240 368
WIRE 416 416 416 368
SYMBOL npn 352 272 R0
SYMATTR InstName Q5
SYMBOL npn 96 272 M0
SYMATTR InstName Q7
SYMBOL pnp 176 144 M180
SYMATTR InstName Q2
SYMBOL pnp 208 144 M180
SYMATTR InstName Q6
SYMBOL npn 128 272 M0
SYMATTR InstName Q3
SYMBOL res 400 112 R0
SYMATTR InstName R3
SYMATTR Value .001
SYMBOL res 48 368 R0
SYMATTR InstName R1
SYMATTR Value 470
SYMBOL pnp 128 144 R180
SYMATTR InstName Q1
SYMBOL voltage -192 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 1V
SYMBOL npn 176 272 R0
SYMATTR InstName Q4
SYMBOL voltage -112 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value +3.3V
SYMBOL pnp 240 144 M180
SYMATTR InstName Q8
FLAG 240 416 0
FLAG 64 16 Vcc
FLAG 240 16 Vcc
FLAG 416 416 0
FLAG 64 464 0
FLAG -112 192 0
FLAG -112 112 Vcc
FLAG -192 192 0
FLAG -192 112 VREF
FLAG 416 128 VREF
TEXT 48 -88 Left 2 !.inc 6301.bjt
TEXT 200 -88 Left 2 !.op
TEXT 48 -120 Left 2 !.step temp 25 100 5
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2503-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2503-5.0.asy)
C1 OUT 0 10
Rload OUT 0 50
XU1 N001 N002 OUT IN IN 0 OUT NC_01 ADP2503-5.0 ;pnba SW1)SW2)FB)EN)PVin)GND)Vout)Sync
V1 IN 0 3.3
L1 N001 N002 1.5 Rser=80m
.tran 400u startup
.lib ADP2503-5.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 48 64 32 64
WIRE 336 64 304 64
WIRE -64 80 -64 64
WIRE 32 144 32 64
WIRE 48 144 32 144
WIRE 336 144 304 144
WIRE -64 176 -64 160
WIRE 320 224 304 224
WIRE 368 224 320 224
WIRE 480 224 368 224
WIRE 368 240 368 224
WIRE 480 240 480 224
WIRE 48 304 32 304
WIRE 320 304 320 224
WIRE 320 304 304 304
WIRE 368 336 368 304
WIRE 480 336 480 320
SYMBOL ind 320 48 R0
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=80m
SYMBOL res 464 224 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL ADP2503-5.0 176 176 R0
SYMATTR InstName U1
SYMBOL voltage -64 64 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap 352 240 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 368 336 0
FLAG 32 304 0
FLAG -64 176 0
FLAG 480 336 0
FLAG -64 64 IN
FLAG 480 224 OUT
TEXT 384 384 Left 2 !.tran 400u startup
TEXT 184 0 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\MAXM15064.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAXM15064.asy)
C1 N002 0 1
R2 N001 0 75K
R1 OUT N001 133K
R5 OUT 0 16.7 m=2
V1 IN 0 24
C2 OUT 0 10
XU1 NC_01 0 NC_02 0 OUT N001 N002 IN IN MAXM15064 ;pnba LX)GND)_RESET)MODE)OUT)FB)VCC)EN/UVLO)Vin
.tran 8m startup
.lib MAXM15064.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 -32 -32 -32
WIRE 64 -32 0 -32
WIRE 80 -32 64 -32
WIRE 432 -32 368 -32
WIRE 528 -32 432 -32
WIRE 576 -32 528 -32
WIRE 624 -32 576 -32
WIRE -32 -16 -32 -32
WIRE 432 -16 432 -32
WIRE 528 -16 528 -32
WIRE 624 -16 624 -32
WIRE 64 80 64 -32
WIRE 80 80 64 80
WIRE 432 80 432 64
WIRE 432 80 368 80
WIRE 528 80 528 48
WIRE 624 80 624 64
WIRE -32 96 -32 64
WIRE 432 112 432 80
WIRE 0 192 -16 192
WIRE 80 192 64 192
WIRE 432 224 432 192
WIRE 80 304 64 304
WIRE 224 368 224 352
SYMBOL res 416 -32 R0
SYMATTR InstName R1
SYMATTR Value 133K
SYMBOL MAXM15064 224 128 R0
SYMATTR InstName U1
SYMBOL res 416 96 R0
SYMATTR InstName R2
SYMATTR Value 75K
SYMBOL res 608 -32 R0
WINDOW 123 36 98 Left 2
SYMATTR Value2 m=2
SYMATTR InstName R5
SYMATTR Value 16.7
SYMBOL voltage -32 -32 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 64 176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 512 -16 R0
SYMATTR InstName C2
SYMATTR Value 10
FLAG -32 96 0
FLAG -16 192 0
FLAG 528 80 0
FLAG 624 80 0
FLAG 0 -32 IN
FLAG 576 -32 OUT
FLAG 224 368 0
FLAG 64 304 0
FLAG 432 224 0
TEXT 144 400 Left 2 !.tran 8m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3da1a457051d_Rectificador_de_onda_completa.asc
* Generated by LTspice 26.0.1 for Windows.
D1 AC1 V+ 1N4007
D2 AC2 V+ 1N4007
D3 V- AC2 1N4007
D4 V- AC1 1N4007
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 32 -32 32
WIRE 160 128 160 32
WIRE 160 128 112 128
WIRE 208 128 160 128
WIRE 304 128 272 128
WIRE 368 128 304 128
WIRE 48 256 48 128
WIRE 48 256 -32 256
WIRE 160 256 112 256
WIRE 208 256 160 256
WIRE 304 256 304 128
WIRE 304 256 272 256
WIRE 160 336 160 256
SYMBOL diode 48 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D4
SYMATTR Value 1N4007
SYMBOL diode 208 272 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N4007
SYMBOL diode 208 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4007
SYMBOL diode 48 240 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D3
SYMATTR Value 1N4007
FLAG -32 32 AC1
FLAG -32 256 V-
FLAG 368 128 V+
FLAG 160 336 AC2