Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\432d5d0cf1c6_BT-CB-OUT.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N002 0 N001 0 BC547B
Vcb N002 0 0
Iee N001 0 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Vcb -0.7V 6V Iee list 1mA 2mA 5mA
.meas dc Ic find Ic(Q1) when Vcb=5V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 112 32 112
WIRE 368 112 256 112
WIRE 32 144 32 112
WIRE 368 144 368 112
WIRE 32 256 32 224
WIRE 208 256 208 176
WIRE 368 256 368 224
SYMBOL voltage 368 128 R0
WINDOW 3 24 32 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 0
SYMATTR InstName Vcb
SYMBOL npn 256 176 M270
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL current 32 144 R0
WINDOW 0 37 39 Left 2
WINDOW 3 24 0 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Iee
SYMATTR Value 0
FLAG 208 256 0
FLAG 32 256 0
FLAG 368 256 0
TEXT 8 304 Left 2 !.dc Vcb -0.7V 6V  Iee  list 1mA 2mA 5mA
TEXT 8 336 Left 2 !.meas dc Ic  find Ic(Q1) when Vcb=5V
* Z:\home\khalils\Downloads\files\data\raw_asc\017bcb8a89c5_phase_shift_modulator.asc
* Generated by LTspice 26.0.1 for Windows.
V2 td 0 PULSE(0 1e-3 0 20m 20m 0 40m)
V1 in 0 PULSE(0 1 0 .01m .01m .99m 2m)
B1 out 0 V=delay(V(in),V(td)) tripdt=10n tripdv=.1
.tran 40m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 128 -64 128
WIRE 96 128 64 128
WIRE 224 128 192 128
WIRE -64 144 -64 128
WIRE 64 144 64 128
WIRE 192 144 192 128
WIRE -64 240 -64 224
WIRE 64 240 64 224
WIRE 64 240 -64 240
WIRE 192 240 192 224
WIRE 192 240 64 240
WIRE 64 272 64 240
SYMBOL voltage 64 128 R0
WINDOW 0 38 51 Left 0
WINDOW 3 24 104 Invisible 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 .01m .01m .99m 2m)
SYMBOL bv 192 128 R0
WINDOW 0 40 49 Left 0
WINDOW 3 -55 131 Left 0
SYMATTR InstName B1
SYMATTR Value V=delay(V(in),V(td))
SYMATTR Value2 tripdt=10n tripdv=.1
SYMBOL voltage -64 128 R0
WINDOW 0 35 42 Left 0
WINDOW 3 24 104 Invisible 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1e-3 0 20m 20m 0 40m)
FLAG 64 272 0
FLAG -32 128 td
FLAG 96 128 in
FLAG 224 128 out
TEXT -64 88 Left 0 !.tran 40m
* Z:\home\khalils\Downloads\files\data\raw_asc\7c138b4877f2_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
* CMOS Inverter
V2 VDD 0 5V
M2 Out IN 0 0 NMOS
V1 IN 0 V
M1 VDD IN Out VDD PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 96 240 48
WIRE 288 96 240 96
WIRE 288 144 288 96
WIRE 288 144 240 144
WIRE 192 176 128 176
WIRE 128 208 128 176
WIRE 128 208 16 208
WIRE 240 208 240 192
WIRE 368 208 240 208
WIRE 240 224 240 208
WIRE 128 304 128 208
WIRE 192 304 128 304
WIRE -352 320 -352 240
WIRE -240 320 -240 240
WIRE 240 416 240 320
IOPIN 16 208 In
IOPIN 368 208 Out
IOPIN 240 48 In
IOPIN -240 160 In
IOPIN -352 160 In
SYMBOL pmos4 192 96 R0
SYMATTR InstName M1
SYMBOL voltage -352 144 R0
SYMATTR InstName V1
SYMBOL voltage -240 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5V
SYMBOL nmos 192 224 R0
SYMATTR InstName M2
FLAG 240 416 0
FLAG 16 208 IN
FLAG 368 208 Out
FLAG 240 48 VDD
FLAG -240 160 VDD
FLAG -352 160 IN
FLAG -352 320 0
FLAG -240 320 0
TEXT 32 64 Left 2 ;CMOS Inverter
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2504-3.5.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 N002 1.5 Rser=80m
C1 OUT 0 10
V1 IN 0 3.3
Rload OUT 0 50
XU1 N001 N002 OUT IN IN 0 OUT NC_01 ADP2504-3.5 ;pnba SW1)SW2)FB)EN)PVin)GND)Vout)Sync
.tran 400u startup
* PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2504-3.5.asy)
.lib ADP2504-3.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 48 64 32 64
WIRE 336 64 304 64
WIRE -64 80 -64 64
WIRE 32 144 32 64
WIRE 48 144 32 144
WIRE 336 144 304 144
WIRE -64 176 -64 160
WIRE 320 224 304 224
WIRE 384 224 320 224
WIRE 496 224 384 224
WIRE 384 240 384 224
WIRE 496 240 496 224
WIRE 48 304 32 304
WIRE 320 304 320 224
WIRE 320 304 304 304
WIRE 384 336 384 304
WIRE 496 336 496 320
FLAG 384 336 0
FLAG 32 304 0
FLAG -64 176 0
FLAG 496 336 0
FLAG 496 224 OUT
FLAG -64 64 IN
SYMBOL ind 320 48 R0
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=80m
SYMBOL cap 368 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage -64 64 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 480 224 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL ADP2504-3.5 176 176 R0
SYMATTR InstName U1
TEXT 432 376 Left 2 !.tran 400u startup
TEXT 192 0 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\39ee6612ff9b_112.asc
* Generated by LTspice 26.0.1 for Windows.
* .tran 200u
Vi N001 0 0
R1 N002 0 1K
D1 N001 N002 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc Vi -8 8 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 96 64 96
WIRE 384 96 256 96
WIRE 64 176 64 96
WIRE 384 176 384 96
WIRE 64 320 64 256
WIRE 240 320 64 320
WIRE 384 320 384 256
WIRE 384 320 240 320
WIRE 240 368 240 320
SYMBOL res 368 160 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 64 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vi
SYMATTR Value 0
SYMBOL diode 192 80 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG 240 368 0
TEXT 72 -64 Left 2 ;.tran 200u
TEXT 72 -16 Left 2 !.dc Vi -8 8 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\30a7c597b79f_quiz_q7.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 0 10k
C1 N002 0 {c}
V1 N001 0 SINE(0 5 1u 1n 1n 19u 20u) AC 1 0
R1 N002 N001 {r}
.ac dec 10 10k 10meg
.step param r 1k 10k 2.5k
.param c= 1e-6/r
.meas AC gmax max mag(V(n002))
.meas AC fc WHEN mag(V(n002)) =gmax/sqrt(2) FALL=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 80 128 80
WIRE 608 80 432 80
WIRE 816 80 608 80
WIRE 608 96 608 80
WIRE 816 96 816 80
WIRE 128 192 128 160
WIRE 608 208 608 160
WIRE 816 208 816 176
SYMBOL cap 592 96 R0
SYMATTR InstName C1
SYMATTR Value {c}
SYMBOL res 448 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {r}
SYMBOL voltage 128 64 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1u 1n 1n 19u 20u)
SYMBOL res 800 80 R0
SYMATTR InstName R2
SYMATTR Value 10k
FLAG 128 192 0
FLAG 608 208 0
FLAG 816 208 0
TEXT 128 240 Left 2 !.ac dec 10 10k 10meg
TEXT 128 272 Left 2 !.step param r 1k 10k 2.5k
TEXT 136 304 Left 2 !.param c= 1e-6/r
TEXT 200 -144 Left 2 !.meas AC gmax max mag(V(n002))
TEXT 200 -112 Left 2 !.meas AC fc WHEN mag(V(n002)) =gmax/sqrt(2) FALL=1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3313.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3313.asy)
R2 N004 0 100k
R5 N007 0 274k
Rload OUT 0 0.15
L1 N002 OUT 80n Rser=2m
V1 IN 0 3.3
R3 OUT N001 500K
C1 OUT 0 47 x2
C5 OUT N004 47p
R4 N006 N005 4.99k
C2 N003 0 3.3n
R1 OUT N004 140k
XU1 IN IN N002 N004 0 0 N007 N001 IN N006 N003 LTC3313 ;pnba Vin)EN)SW)FB)Agnd)Pgnd)Rt)Pgood)Mode/Sync)Ith)SSTT
C3 N005 0 330p
.tran .4m startup
.lib LTC3313.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2648 1864
WIRE 1536 1248 1376 1248
WIRE 1712 1248 1536 1248
WIRE 1376 1264 1376 1248
WIRE 1712 1280 1712 1248
WIRE 1536 1328 1536 1248
WIRE 1552 1328 1536 1328
WIRE 1904 1328 1872 1328
WIRE 2016 1328 1984 1328
WIRE 1376 1360 1376 1344
WIRE 1536 1424 1536 1328
WIRE 1552 1424 1536 1424
WIRE 1904 1424 1872 1424
WIRE 2016 1424 2016 1328
WIRE 2016 1424 1984 1424
WIRE 2144 1424 2016 1424
WIRE 2240 1424 2144 1424
WIRE 2352 1424 2240 1424
WIRE 2144 1440 2144 1424
WIRE 2240 1440 2240 1424
WIRE 2352 1440 2352 1424
WIRE 1472 1520 1456 1520
WIRE 1552 1520 1536 1520
WIRE 2016 1520 2016 1504
WIRE 2016 1520 1872 1520
WIRE 2144 1520 2144 1504
WIRE 2144 1520 2016 1520
WIRE 2016 1536 2016 1520
WIRE 2240 1536 2240 1504
WIRE 2352 1536 2352 1520
WIRE 1424 1616 1360 1616
WIRE 1552 1616 1504 1616
WIRE 1904 1616 1872 1616
WIRE 1360 1632 1360 1616
WIRE 1904 1632 1904 1616
WIRE 2016 1632 2016 1616
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
WIRE 1360 1712 1360 1696
WIRE 1904 1728 1904 1712
SYMBOL res 1520 1600 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 4.99k
SYMBOL LTC3313 1712 1456 R0
SYMATTR InstName U1
SYMBOL RES 2000 1408 R0
SYMATTR InstName R1
SYMATTR Value 140k
SYMBOL res 2336 1424 R0
SYMATTR InstName Rload
SYMATTR Value 0.15
SYMBOL cap 2128 1440 R0
SYMATTR InstName C5
SYMATTR Value 47p
SYMBOL ind 1888 1440 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 80n
SYMATTR SpiceLine Rser=2m
SYMBOL res 2000 1312 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 500K
SYMBOL cap 1344 1632 R0
SYMATTR InstName C3
SYMATTR Value 330p
SYMBOL VOLTAGE 1376 1248 R0
SYMATTR Value 3.3
SYMATTR InstName V1
SYMBOL cap 2224 1440 R0
WINDOW 123 24 77 Left 2
SYMATTR Value2 x2
SYMATTR InstName C1
SYMATTR Value 47
SYMBOL res 1888 1616 R0
SYMATTR InstName R5
SYMATTR Value 274k
SYMBOL cap 1536 1504 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 3.3n
SYMBOL res 2000 1520 R0
SYMATTR InstName R2
SYMATTR Value 100k
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1376 1360 0
FLAG 2352 1536 0
FLAG 2016 1632 0
FLAG 1456 1520 0
FLAG 2352 1424 OUT
FLAG 1376 1248 IN
FLAG 1360 1712 0
FLAG 2240 1536 0
FLAG 1904 1728 0
TEXT 2152 1640 Left 2 !.tran .4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8624S.asc
* Generated by LTspice 26.0.1 for Windows.
* 2MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8624S.asy)
XU1 SW N004 0 CLKout IN NC_01 IN IN N004 N004 SET N003 OUT PGFB N001 PG LT8624S ;pnba SW)Sync/Mode)GND)CLKout)PVin)BST)SVin)EN/UVLO)INTVcc)PHMode)SET)Vc)OUTS)PGFB)RT)PG
C1 SET 0 1
C2 OUT 0 220 Rser=5m
R6 OUT PG 100k
Rload OUT 0 1.2
R4 N002 N003 500
L1 SW OUT 1 Rser=6m
R1 N001 0 47k
C3 N002 0 2n
R5 SET 0 33.2k
R3 OUT PGFB 280k
V1 IN 0 12
R2 PGFB 0 49.9k
.tran 1.5m startup
.lib LT8624S.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1080 680
WIRE 96 -128 -64 -128
WIRE 272 -128 96 -128
WIRE -64 -112 -64 -128
WIRE 272 -112 272 -128
WIRE 96 -64 96 -128
WIRE 128 -64 96 -64
WIRE -64 -16 -64 -32
WIRE 96 32 96 -64
WIRE 128 32 96 32
WIRE 448 32 416 32
WIRE 512 32 448 32
WIRE 688 32 592 32
WIRE -32 128 -64 128
WIRE 128 128 48 128
WIRE 448 128 416 128
WIRE 512 128 448 128
WIRE 688 128 688 32
WIRE 688 128 592 128
WIRE 768 128 688 128
WIRE 880 128 768 128
WIRE 976 128 880 128
WIRE 976 144 976 128
WIRE 880 160 880 128
WIRE 768 176 768 128
WIRE -80 224 -96 224
WIRE 16 224 -16 224
WIRE 128 224 96 224
WIRE 688 224 688 128
WIRE 688 224 416 224
WIRE 880 240 880 224
WIRE 976 240 976 224
WIRE 128 320 96 320
WIRE 464 320 416 320
WIRE 768 320 768 256
WIRE 768 320 464 320
WIRE 768 336 768 320
WIRE 96 416 96 320
WIRE 128 416 96 416
WIRE 448 416 416 416
WIRE 592 416 448 416
WIRE 672 416 592 416
WIRE 672 432 672 416
WIRE 768 432 768 416
WIRE 592 448 592 416
WIRE 96 512 96 416
WIRE 128 512 96 512
WIRE 448 512 416 512
WIRE 592 528 592 512
WIRE 672 528 672 512
WIRE 272 592 272 576
SYMBOL res 960 128 R0
SYMATTR InstName Rload
SYMATTR Value 1.2
SYMBOL LT8624S 272 192 R0
SYMATTR InstName U1
SYMBOL cap 576 448 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 656 416 R0
SYMATTR InstName R5
SYMATTR Value 33.2k
SYMBOL res 752 160 R0
SYMATTR InstName R3
SYMATTR Value 280k
SYMBOL ind 496 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=6m
SYMBOL voltage -64 -128 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 752 320 R0
SYMATTR InstName R2
SYMATTR Value 49.9k
SYMBOL cap 864 160 R0
SYMATTR InstName C2
SYMATTR Value 220
SYMATTR SpiceLine Rser=5m
SYMBOL res 0 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 500
SYMBOL cap -16 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 2n
SYMBOL res 64 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 47k
SYMBOL res 608 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 100k
FLAG -64 -16 0
FLAG -64 128 0
FLAG 272 592 0
FLAG 768 432 0
FLAG 976 240 0
FLAG -96 224 0
FLAG 976 128 OUT
FLAG -64 -128 IN
FLAG 672 528 0
FLAG 592 528 0
FLAG 880 240 0
FLAG 448 512 CLKout
FLAG 448 32 PG
FLAG 448 128 SW
FLAG 464 320 PGFB
FLAG 448 416 SET
TEXT 728 552 Left 2 !.tran 1.5m startup
TEXT 48 104 Left 2 ;2MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3682.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3682.asy)
R1 OUT N008 536K
XU1 N007 N008 NC_01 0 OUT N002 N005 N003 N001 N004 MP_02 IN LT3682 ;pnba Vc)FB)PG)GND)BD)Boost)DA)SW)Run/SS)Rt))Vin
V1 IN 0 30
C4 N001 0 .01
R3 N007 N006 16.2K
Rload OUT 0 5
C2 N002 N003 .22
C3 N006 0 470p
C1 OUT 0 10
R5 IN N001 500K
R4 N004 0 40.2K
R2 N008 0 102K
L1 N003 OUT 10 Rpar=2K
D1 N005 N003 1N5817
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LT3682.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1104 740
WIRE -160 64 -256 64
WIRE 32 64 -160 64
WIRE 448 64 128 64
WIRE -256 80 -256 64
WIRE -160 80 -160 64
WIRE 32 96 32 64
WIRE 128 96 128 64
WIRE -48 160 -160 160
WIRE 256 160 208 160
WIRE -256 176 -256 160
WIRE -160 176 -160 160
WIRE 256 176 256 160
WIRE -160 256 -160 240
WIRE 256 256 256 240
WIRE 256 256 208 256
WIRE 336 256 256 256
WIRE 448 256 448 64
WIRE 448 256 416 256
WIRE 544 256 448 256
WIRE 640 256 544 256
WIRE 256 272 256 256
WIRE 544 272 544 256
WIRE 640 272 640 256
WIRE 448 336 448 256
WIRE -192 352 -240 352
WIRE -48 352 -112 352
WIRE 256 352 256 336
WIRE 256 352 208 352
WIRE 544 368 544 336
WIRE 640 368 640 352
WIRE -224 448 -240 448
WIRE -144 448 -160 448
WIRE -48 448 -64 448
WIRE 448 448 448 416
WIRE 448 448 208 448
WIRE 448 464 448 448
WIRE 80 528 80 512
WIRE 448 560 448 544
SYMBOL cap 240 176 R0
WINDOW 3 30 49 Left 2
SYMATTR Value .22
SYMATTR InstName C2
SYMBOL res -48 432 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 16.2K
SYMBOL res 624 256 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL res -96 336 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 40.2K
SYMBOL res 432 320 R0
SYMATTR InstName R1
SYMATTR Value 536K
SYMBOL cap -176 176 R0
SYMATTR InstName C4
SYMATTR Value .01
SYMBOL cap 528 272 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 432 448 R0
SYMATTR InstName R2
SYMATTR Value 102K
SYMBOL schottky 240 336 M180
WINDOW 0 28 62 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap -160 432 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 470p
SYMBOL res -176 64 R0
SYMATTR InstName R5
SYMATTR Value 500K
SYMBOL ind 320 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rpar=2K
SYMBOL voltage -256 64 R0
SYMATTR InstName V1
SYMATTR Value 30
SYMBOL LT3682 80 304 R0
SYMATTR InstName U1
FLAG 544 368 0
FLAG 448 560 0
FLAG -240 448 0
FLAG -256 176 0
FLAG 80 528 0
FLAG 640 368 0
FLAG -240 352 0
FLAG -160 256 0
FLAG 640 256 OUT
FLAG -256 64 IN
TEXT 552 456 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3008-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3008-1.2.asy)
C1 OUT 0 1
Rload OUT 0 120
V1 IN 0 PWL(0 0 1 10)
XU1 IN OUT OUT 0 IN LT3008-1.2 ;pnba IN)OUT)Sense)GND)_SHDN
.tran 1
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 120
SYMBOL PowerProducts\\LT3008-1.2 176 96 R0
SYMATTR InstName U1
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 336 248 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\20c17da87076_TASK2.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N001 0 10k
R1 N001 0 10k
V1 N003 0 -25
M2 N001 N002 N003 N003 NMOS
Vgs N002 N003 5
M1 N001 N002 N003 N003 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model nmos NMOS(kp=100u, vt0=0.5, L=10u, W=20u)
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 400 16 224 16
WIRE 528 16 400 16
WIRE 624 16 528 16
WIRE 224 96 224 16
WIRE 400 96 400 16
WIRE 528 96 528 16
WIRE 624 96 624 16
WIRE 176 176 16 176
WIRE 16 208 16 176
WIRE 352 208 352 176
WIRE 352 208 16 208
WIRE 16 224 16 208
WIRE 224 224 224 192
WIRE 224 224 112 224
WIRE 400 224 400 192
WIRE 400 224 224 224
WIRE 224 288 224 224
WIRE 16 336 16 304
WIRE 112 336 112 224
WIRE 112 336 16 336
WIRE 224 384 224 368
WIRE 528 384 528 176
WIRE 528 384 224 384
WIRE 624 384 624 176
WIRE 624 384 528 384
WIRE 624 416 624 384
SYMBOL nmos 352 96 R0
SYMATTR InstName M2
SYMBOL res 512 80 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 608 80 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 224 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -25
SYMBOL nmos 176 96 R0
SYMATTR InstName M1
SYMBOL voltage 16 208 R0
SYMATTR InstName Vgs
SYMATTR Value 5
FLAG 624 416 0
TEXT -24 416 Left 2 !.model nmos NMOS(kp=100u, vt0=0.5, L=10u, W=20u)
TEXT -8 464 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\06fc9646b120_01-j111_voltage_controlled_resistor.asc
* Generated by LTspice 26.0.1 for Windows.
* Semiconductor Devices: JFET Voltage Controlled Resistor\nhttps://youtu.be/T4IESXeRtWo?si=Ukin5aEwjMJSvs0i
R3 out N003 22k
R4 N003 0 68k
VC N001 0 {VC}
V1 in 0 SINE(0 50m 1k)
J1 out N002 0 J111
R2 N002 N001 1Meg
R1 out in 10k
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.tran 2m
.step param VC -5 5 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -208 48 -240 48
WIRE -32 48 -208 48
WIRE 144 48 48 48
WIRE 256 48 144 48
WIRE 272 48 256 48
WIRE 256 96 256 48
WIRE 144 128 144 48
WIRE -240 144 -240 48
WIRE -16 192 -64 192
WIRE 96 192 64 192
WIRE 256 208 256 176
WIRE -64 240 -64 192
WIRE -240 256 -240 224
WIRE 144 256 144 224
WIRE 256 336 256 288
WIRE -64 352 -64 320
IOPIN 272 48 Out
SYMBOL njf 96 128 R0
SYMATTR InstName J1
SYMATTR Value J111
SYMBOL voltage -64 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VC
SYMATTR Value {VC}
SYMBOL res 240 80 R0
SYMATTR InstName R3
SYMATTR Value 22k
SYMBOL res 64 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -240 128 R0
WINDOW 3 -62 107 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 50m 1k)
SYMATTR InstName V1
SYMBOL res 80 176 R90
WINDOW 0 13 24 VBottom 2
WINDOW 3 -14 123 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 240 192 R0
SYMATTR InstName R4
SYMATTR Value 68k
FLAG -64 352 0
FLAG 144 256 0
FLAG 256 336 0
FLAG -240 256 0
FLAG -208 48 in
FLAG 272 48 out
TEXT -288 -48 Left 2 ;Semiconductor Devices: JFET Voltage Controlled Resistor\nhttps://youtu.be/T4IESXeRtWo?si=Ukin5aEwjMJSvs0i
TEXT 80 400 Left 2 !.tran 2m
TEXT -280 400 Left 2 !.step param VC -5 5 1
* Z:\tmp\asc_dec_bjh7r6w2\094757473fbc_Draft6_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N003 0 N004 N001 PC817 Igain=1m ;pnba A)K)C)E
R3 N003 N002 50
Vss Vss 0 6 Rser=100m
M2 N007 N005 N006 N006 Si7489DP
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Optos\PC817A.asy)
.lib PC817.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 772
WIRE -320 112 -496 112
WIRE -256 112 -320 112
WIRE 48 112 -64 112
WIRE -496 128 -496 112
WIRE -320 144 -320 112
WIRE -432 208 -496 208
WIRE -256 208 -352 208
WIRE 32 208 -64 208
WIRE 160 304 160 208
WIRE 192 304 160 304
WIRE 304 304 304 208
WIRE 304 304 256 304
WIRE 304 400 304 304
WIRE 160 416 160 304
WIRE 256 416 160 416
WIRE 304 528 304 496
WIRE -720 544 -720 512
WIRE -608 544 -608 512
WIRE -720 656 -720 624
WIRE -608 656 -608 624
WIRE 304 656 304 608
SYMBOL Optos\\PC817A -160 160 M180
SYMATTR InstName U1
SYMBOL res -336 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 50
SYMBOL voltage -720 528 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName Vss
SYMATTR Value 6
SYMATTR SpiceLine Rser=100m
SYMBOL pmos 256 496 M180
SYMATTR InstName M2
SYMATTR Value Si7489DP
FLAG -320 144 0
FLAG -720 656 0
FLAG -608 656 0
FLAG -720 512 Vss
FLAG -608 512 Vdd
FLAG 304 656 VBAT-
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1144.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1144.asy)
XU1 N001 N002 0 N005 OUT N004 N003 IN LTC1144 ;pnba Boost)Cap+)GND)Cap-)Vout)_SHDN)OSC)Vin
Rload OUT 0 244
C2 N002 N005 10
V1 IN 0 15
C1 OUT 0 10
.tran 100m
.lib LTC1144.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3532 1764
WIRE 3008 1440 2992 1440
WIRE 3408 1440 3264 1440
WIRE 3408 1456 3408 1440
WIRE 3008 1504 2912 1504
WIRE 3280 1504 3264 1504
WIRE 2912 1536 2912 1504
WIRE 3408 1552 3408 1536
WIRE 3008 1568 2976 1568
WIRE 3280 1568 3264 1568
WIRE 2912 1632 2912 1600
WIRE 3008 1632 2912 1632
WIRE 3328 1632 3264 1632
WIRE 3440 1632 3328 1632
WIRE 3328 1648 3328 1632
WIRE 3440 1648 3440 1632
WIRE 3328 1744 3328 1712
WIRE 3440 1744 3440 1728
SYMBOL PowerProducts\\LTC1144 3136 1536 R0
SYMATTR InstName U1
SYMBOL cap 3312 1648 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 3424 1632 R0
SYMATTR InstName Rload
SYMATTR Value 244
SYMBOL VOLTAGE 3408 1440 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL cap 2896 1536 R0
SYMATTR InstName C2
SYMATTR Value 10
FLAG 3408 1552 0
FLAG 2976 1568 0
FLAG 3328 1744 0
FLAG 3440 1744 0
FLAG 3440 1632 OUT
FLAG 3408 1440 IN
TEXT 3160 1728 Left 2 !.tran 100m