Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\04b0282c689a_BufferTriState.asc
* Generated by LTspice 26.0.1 for Windows.
M4 N003 N001 0 0 NMOS
M2 Vds N001 N002 Vds PMOS
M3 N001 Input 0 N004 NMOS
M1 Vds Input N001 Vds PMOS
M6 N002 NC_02 Output Vds PMOS
M5 Output NC_01 N003 0 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -80 -240 -128 -240
WIRE 32 -240 32 -272
WIRE 32 -240 -80 -240
WIRE 160 -240 32 -240
WIRE 256 -240 160 -240
WIRE -128 -208 -128 -240
WIRE 160 -208 160 -240
WIRE -80 -160 -80 -240
WIRE -80 -160 -128 -160
WIRE 256 -160 256 -240
WIRE 256 -160 160 -160
WIRE -176 -128 -256 -128
WIRE 112 -128 16 -128
WIRE 160 -96 160 -112
WIRE 256 -48 256 -160
WIRE 256 -48 160 -48
WIRE -256 -16 -256 -128
WIRE -256 -16 -320 -16
WIRE -128 32 -128 -112
WIRE 16 32 16 -128
WIRE 16 32 -128 32
WIRE 160 32 160 0
WIRE 256 32 160 32
WIRE 160 64 160 32
WIRE 256 112 160 112
WIRE 160 160 160 144
WIRE -128 176 -128 32
WIRE 160 176 160 160
WIRE 256 224 256 112
WIRE 256 224 160 224
WIRE -256 256 -256 -16
WIRE -176 256 -256 256
WIRE -128 256 -128 224
WIRE 16 256 16 32
WIRE 112 256 16 256
WIRE -128 320 -128 272
WIRE 16 320 -128 320
WIRE 160 320 160 272
WIRE 160 320 16 320
WIRE 256 320 256 224
WIRE 256 320 160 320
WIRE 16 352 16 320
IOPIN -320 -16 In
IOPIN 16 352 In
IOPIN 256 32 Out
IOPIN 32 -272 In
IOPIN -320 112 In
SYMBOL pmos4 112 -208 R0
SYMATTR InstName M2
SYMBOL nmos4 -176 176 R0
SYMATTR InstName M3
SYMBOL nmos4 112 64 R0
SYMATTR InstName M5
SYMBOL pmos4 -176 -208 R0
SYMATTR InstName M1
SYMBOL nmos4 112 176 R0
SYMATTR InstName M4
SYMBOL pmos4 112 -96 R0
SYMATTR InstName M6
FLAG -320 -16 Input
FLAG 16 352 GND
FLAG 256 32 Output
FLAG 32 -272 Vds
FLAG -320 112 Enable
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1540.asc
* Generated by LTspice 26.0.1 for Windows.
* Nanopower 2.9V Vcc Threshold Detector
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1540.asy)
V1 +V 0 PWL(0 0 1 3.3)
R2 N001 0 3Meg
R1 +V N001 4.32Meg
XU1 0 0 N001 N002 N002 N002 +V OUT LTC1540 ;pnba GND)V-)In+)In-)HYST)REF)V+)OUT
.tran 1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1144 800
WIRE 320 80 96 80
WIRE 576 80 320 80
WIRE 96 96 96 80
WIRE 320 96 320 80
WIRE 576 144 576 80
WIRE 96 192 96 176
WIRE 320 192 320 176
WIRE 480 192 320 192
WIRE 320 208 320 192
WIRE 688 208 640 208
WIRE 480 224 512 192
WIRE 512 224 480 192
WIRE 480 256 480 224
WIRE 512 256 480 256
WIRE 480 288 480 256
WIRE 512 288 480 288
WIRE 320 304 320 288
WIRE 544 368 544 336
WIRE 608 368 608 336
SYMBOL voltage 96 80 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 3.3)
SYMBOL Comparators\\LTC1540 576 144 R0
SYMATTR InstName U1
SYMBOL res 304 80 R0
SYMATTR InstName R1
SYMATTR Value 4.32Meg
SYMBOL res 304 192 R0
SYMATTR InstName R2
SYMATTR Value 3Meg
FLAG 96 192 0
FLAG 576 80 +V
FLAG 544 368 0
FLAG 608 368 0
FLAG 320 304 0
FLAG 688 208 OUT
TEXT 696 264 Left 2 !.tran 1
TEXT 560 48 Bottom 2 ;Nanopower 2.9V Vcc Threshold Detector
* Z:\home\khalils\Downloads\files\data\raw_asc\ADR4533.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR4533.asy)
V1 vIN 0 5
C1 OUT 0 1
XU1 vIN 0 OUT ADR4533 ;pnba IN)GND)OUT
V2 N002 0 PULSE(0 1 0.51m 10n 10n 0.3m 1m)
S1 0 OUT N002 0 5mA
S2 OUT vIN N001 0 5mA
V3 N001 0 PULSE(0 1 100u 10n 10n 0.3m 1m)
I1 OUT 0 0mA
C2 vIN 0 1
.tran 1m
.model 5mA SW(Ron=1 Roff=1G Vt=.5 Vh=-.2 Ilimit=5m level=2)
.lib ADR4533.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4212 1120
WIRE 2208 256 1584 256
WIRE 2208 272 2208 256
WIRE 2464 288 2256 288
WIRE 2576 288 2544 288
WIRE 2288 336 2256 336
WIRE 1584 416 1584 256
WIRE 1584 416 1488 416
WIRE 1696 416 1584 416
WIRE 2064 416 1952 416
WIRE 2208 416 2208 352
WIRE 2208 416 2064 416
WIRE 2256 416 2208 416
WIRE 2464 416 2256 416
WIRE 2576 416 2544 416
WIRE 1488 432 1488 416
WIRE 1584 464 1584 416
WIRE 2064 464 2064 416
WIRE 2208 496 2208 416
WIRE 2464 512 2256 512
WIRE 2576 512 2544 512
WIRE 1488 544 1488 512
WIRE 1584 544 1584 528
WIRE 1824 544 1824 512
WIRE 2064 544 2064 528
WIRE 2288 560 2256 560
WIRE 2208 608 2208 576
SYMBOL sw 2208 368 R180
WINDOW 0 -11 104 Right 2
WINDOW 3 -15 14 Right 2
SYMATTR InstName S2
SYMATTR Value 5mA
SYMBOL voltage 2448 512 M90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 34 77 VTop 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 0.51m 10n 10n 0.3m 1m)
SYMBOL voltage 2448 288 M90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 35 67 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 1 100u 10n 10n 0.3m 1m)
SYMATTR InstName V3
SYMBOL cap 2048 464 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage 1488 416 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADR4533 1824 416 R0
SYMATTR InstName U1
SYMBOL cap 1568 464 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL sw 2208 592 R180
WINDOW 0 -7 103 Right 2
WINDOW 3 -10 16 Right 2
SYMATTR InstName S1
SYMATTR Value 5mA
SYMBOL current 2464 416 R270
WINDOW 0 32 40 VTop 2
WINDOW 3 60 99 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 0mA
FLAG 1824 544 0
FLAG 2256 416 OUT
FLAG 1488 416 vIN
FLAG 1488 544 0
FLAG 2064 544 0
FLAG 2208 608 0
FLAG 2288 560 0
FLAG 2576 512 0
FLAG 2288 336 0
FLAG 2576 288 0
FLAG 2576 416 0
FLAG 1584 544 0
TEXT 1464 648 Left 2 !.tran 1m\n.model 5mA SW(Ron=1 Roff=1G Vt=.5 Vh=-.2 Ilimit=5m level=2)
* Z:\home\khalils\Downloads\files\data\raw_asc\2b3f64cdfea6_mux.asc
* Generated by LTspice 26.0.1 for Windows.
C1 Vout 0 50f
V1 N001 0 1.8
M3 Vout Vs_bar Vb 0 NMOS l=180nm w=270nm
Vb Vb 0 PULSE(0 1.8 0 0.1n 0.1n 10n 20n)
M2 Vs_bar Vs 0 0 NMOS l=180nm w=270nm
Vs Vs 0 PULSE(0 1.8 0 0.1n 0.1n 20n 40n)
Va Va 0 PULSE(1.8 0 0 0.1n 0.1n 10n 20n)
M4 N001 Vs Vs_bar N001 PMOS l=180nm w=810nm
M1 Vout Vs Va 0 NMOS l=180nm w=270nm
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 100n 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 756
WIRE 384 16 208 16
WIRE 416 16 384 16
WIRE 208 64 208 16
WIRE 208 64 112 64
WIRE 304 64 208 64
WIRE 112 80 112 64
WIRE 304 80 304 64
WIRE 0 112 -64 112
WIRE 16 112 0 112
WIRE 16 160 16 112
WIRE 64 160 16 160
WIRE 496 160 352 160
WIRE 112 192 112 176
WIRE 304 192 304 176
WIRE 112 208 112 192
WIRE 304 208 304 192
WIRE 160 416 128 416
WIRE 224 416 160 416
WIRE 128 496 128 416
WIRE 160 544 160 416
WIRE 160 544 128 544
WIRE 80 576 48 576
WIRE 496 592 496 160
WIRE 496 592 128 592
WIRE 16 624 16 160
WIRE 48 624 48 576
WIRE 48 624 16 624
WIRE 160 640 128 640
WIRE 48 672 48 624
WIRE 80 672 48 672
WIRE 128 720 128 688
WIRE 144 720 128 720
WIRE 160 720 160 640
WIRE 160 720 144 720
WIRE 144 736 144 720
IOPIN 416 16 Out
IOPIN 112 192 In
IOPIN 304 192 In
IOPIN 0 112 In
IOPIN 496 160 In
SYMBOL cap 368 16 R0
WINDOW 0 -18 14 Left 2
SYMATTR InstName C1
SYMATTR Value 50f
SYMBOL voltage 112 192 R0
WINDOW 0 -11 55 Left 2
WINDOW 3 -271 141 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Va
SYMATTR Value PULSE(1.8 0 0 0.1n 0.1n 10n 20n)
SYMBOL pmos4 80 496 R0
SYMATTR InstName M4
SYMATTR Value2 l=180nm w=810nm
SYMBOL voltage -64 96 R0
WINDOW 0 -11 56 Left 2
WINDOW 3 -290 126 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vs
SYMATTR Value PULSE(0 1.8 0 0.1n 0.1n 20n 40n)
SYMBOL voltage 304 192 R0
WINDOW 0 -12 57 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vb
SYMATTR Value PULSE(0 1.8 0 0.1n 0.1n 10n 20n)
SYMBOL nmos4 64 80 R0
SYMATTR InstName M1
SYMATTR Value2 l=180nm w=270nm
SYMBOL nmos4 352 80 M0
SYMATTR InstName M3
SYMATTR Value2 l=180nm w=270nm
SYMBOL nmos4 80 592 R0
SYMATTR InstName M2
SYMATTR Value2 l=180nm w=270nm
SYMBOL voltage 224 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
FLAG 416 16 Vout
FLAG 112 128 0
FLAG 304 128 0
FLAG -64 192 0
FLAG 304 288 0
FLAG 112 288 0
FLAG 384 80 0
FLAG 112 192 Va
FLAG 304 192 Vb
FLAG 0 112 Vs
FLAG 144 736 0
FLAG 224 496 0
FLAG 496 160 Vs_bar
TEXT -144 272 Left 2 !.tran 0 100n 0
* Z:\tmp\asc_dec_bjh7r6w2\0f47fbdc64f7_input-buffer-amp-current-designed_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R5 N006 N005 27
D2 NC_01 NC_02 1N4148
R4 N008 0 2k
R3 N001 N002 2k
V2 N003 0 SINE(15 10 1000) AC 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1320 784
WIRE 928 -288 928 -320
WIRE 848 -144 784 -144
WIRE 928 -144 928 -208
WIRE 928 -144 848 -144
WIRE 928 -112 928 -144
WIRE 784 -64 768 -64
WIRE 864 -64 784 -64
WIRE 704 -16 640 -16
WIRE 928 0 928 -16
WIRE 816 32 768 32
WIRE 640 224 640 -16
WIRE 640 224 80 224
WIRE 1040 240 928 240
WIRE 1264 240 1120 240
WIRE 80 352 80 224
WIRE 928 368 928 240
WIRE 1264 368 1264 240
WIRE 848 416 848 -144
WIRE 848 416 768 416
WIRE 640 464 640 224
WIRE 704 464 640 464
WIRE 928 464 928 448
WIRE 784 512 768 512
WIRE 864 512 784 512
WIRE 80 608 80 432
WIRE 784 608 784 592
WIRE 784 608 80 608
WIRE 816 608 816 32
WIRE 816 608 784 608
WIRE 928 608 928 560
WIRE 928 608 816 608
WIRE 1264 608 928 608
WIRE 928 640 928 608
SYMBOL res 1136 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 27
SYMBOL diode -64 -352 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL res 768 496 R0
SYMATTR InstName R4
SYMATTR Value 2k
SYMBOL res 768 -160 R0
SYMATTR InstName R3
SYMATTR Value 2k
SYMBOL voltage 80 336 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 10
SYMATTR InstName V2
SYMATTR Value SINE(15 10 1000)
FLAG 928 -320 0
FLAG 928 640 0
* Z:\home\khalils\Downloads\files\data\raw_asc\22c678ac3f7c_NOR.asc
* Generated by LTspice 26.0.1 for Windows.
M1 VDD B N001 VDD PMOS l=90n w=400n
M2 N001 A VOUT N001 PMOS l=90n w=400n
M3 VOUT A 0 0 NMOS l=90n w=200n
M4 VOUT B 0 0 NMOS l=90n w=200n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include 90nm_bulk.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -11568 -3200 -11568 -3216
WIRE -11536 -3200 -11568 -3200
WIRE -11536 -3152 -11536 -3200
WIRE -11536 -3152 -11568 -3152
WIRE -11616 -3120 -11888 -3120
WIRE -11888 -3008 -11888 -3120
WIRE -11888 -3008 -11952 -3008
WIRE -11568 -2992 -11568 -3104
WIRE -11520 -2992 -11568 -2992
WIRE -11520 -2944 -11520 -2992
WIRE -11520 -2944 -11568 -2944
WIRE -11616 -2832 -11616 -2912
WIRE -11616 -2832 -11952 -2832
WIRE -11568 -2800 -11568 -2896
WIRE -11568 -2800 -11840 -2800
WIRE -11408 -2800 -11568 -2800
WIRE -11840 -2768 -11840 -2800
WIRE -11568 -2768 -11568 -2800
WIRE -11824 -2720 -11840 -2720
WIRE -11552 -2720 -11568 -2720
WIRE -11888 -2688 -11888 -3008
WIRE -11616 -2688 -11616 -2832
WIRE -11824 -2672 -11824 -2720
WIRE -11824 -2672 -11840 -2672
WIRE -11552 -2672 -11552 -2720
WIRE -11552 -2672 -11568 -2672
WIRE -11840 -2608 -11840 -2672
WIRE -11696 -2608 -11840 -2608
WIRE -11568 -2608 -11568 -2672
WIRE -11568 -2608 -11696 -2608
WIRE -11696 -2592 -11696 -2608
FLAG -11696 -2592 0
FLAG -11408 -2800 VOUT
IOPIN -11408 -2800 Out
FLAG -11952 -2832 A
IOPIN -11952 -2832 In
FLAG -11952 -3008 B
IOPIN -11952 -3008 In
FLAG -11568 -3216 VDD
IOPIN -11568 -3216 In
SYMBOL pmos4 -11616 -3200 R0
SYMATTR InstName M1
SYMATTR Value2 l=90n w=400n
SYMBOL pmos4 -11616 -2992 R0
SYMATTR InstName M2
SYMATTR Value2 l=90n w=400n
SYMBOL nmos4 -11616 -2768 R0
SYMATTR InstName M3
SYMATTR Value2 l=90n w=200n
SYMBOL nmos4 -11888 -2768 R0
SYMATTR InstName M4
SYMATTR Value2 l=90n w=200n
TEXT -12360 -3328 Left 2 !.include 90nm_bulk.txt
* Z:\home\khalils\Downloads\files\data\raw_asc\0acbbc5c43b9_analisi-statica.asc
* Generated by LTspice 26.0.1 for Windows.
R3 lab1 0 2k
V1 N001 0 12
R1 N001 lab1 1k
R2 N001 lab1 470
R4 lab1 0 10k
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 144 80 144
WIRE 352 144 208 144
WIRE 352 256 352 224
WIRE 208 272 208 224
WIRE 352 272 352 256
WIRE 80 352 80 224
WIRE 208 352 80 352
WIRE 352 352 208 352
WIRE 208 384 208 352
DATAFLAG 144 352 "$"
DATAFLAG 304 144 "$"
SYMBOL res 336 128 R0
SYMATTR InstName R2
SYMATTR Value 470
SYMBOL res 336 256 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL voltage 80 128 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 192 256 R0
SYMATTR InstName R3
SYMATTR Value 2k
SYMBOL res 192 128 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 208 384 0
FLAG 208 272 lab1
FLAG 352 256 lab1
TEXT 568 152 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3527.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3527.asy)
Rload1 OUT1 0 22
R2 N004 0 1.21Meg
L1 IN N001 4.7 Rpar=2K
R1 OUT2 N004 619K
C2 OUT1 0 4.7
Rload2 OUT2 0 12
R3 OUT1 N003 1.78Meg
C1 OUT2 0 4.7
R4 N003 0 1Meg
V1 IN 0 2.5
XU1 IN N003 0 IN OUT1 N001 N002 OUT2 IN 0 N004 IN NC_01 0 IN NC_02 LTC3527 ;pnba _SHDN1)FB1)Mode)Vin1)Vout1)SW1)SW2)Vout2)Vin2)Fsel)FB2)_SHDN2)Pgood2)GND)Vin)Pgood1
L2 IN N002 4.7 Rpar=2K
.tran 0.7m startup
.lib LTC3527.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 496 -160 -160 -160
WIRE 112 -128 -80 -128
WIRE 192 -128 112 -128
WIRE 272 -128 192 -128
WIRE 368 -128 272 -128
WIRE 112 -112 112 -128
WIRE 192 -112 192 -128
WIRE 272 -112 272 -128
WIRE -80 -32 -80 -128
WIRE 48 -32 -80 -32
WIRE 368 -32 368 -128
WIRE 368 -32 336 -32
WIRE -160 80 -160 -160
WIRE -160 80 -288 80
WIRE -80 80 -80 -32
WIRE -80 80 -160 80
WIRE -48 80 -80 80
WIRE 48 80 32 80
WIRE 368 80 336 80
WIRE 496 80 496 -160
WIRE 496 80 448 80
WIRE -288 96 -288 80
WIRE -288 192 -288 176
WIRE -160 304 -288 304
WIRE -80 304 -160 304
WIRE 48 304 -80 304
WIRE 384 304 336 304
WIRE 496 304 384 304
WIRE 576 304 496 304
WIRE -288 320 -288 304
WIRE -160 320 -160 304
WIRE -80 320 -80 304
WIRE 384 320 384 304
WIRE 496 320 496 304
WIRE 576 320 576 304
WIRE -288 416 -288 400
WIRE -160 416 -160 384
WIRE -80 416 -80 400
WIRE 48 416 -80 416
WIRE 384 416 384 400
WIRE 384 416 336 416
WIRE 496 416 496 384
WIRE 576 416 576 400
WIRE -80 432 -80 416
WIRE 384 432 384 416
WIRE 112 512 112 496
WIRE 192 512 192 496
WIRE 272 512 272 496
WIRE -80 528 -80 512
WIRE 384 528 384 512
SYMBOL PowerProducts\\LTC3527 192 192 R0
SYMATTR InstName U1
SYMBOL ind 464 96 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=2K
SYMBOL res -96 416 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL cap 480 320 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL voltage -288 80 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res -96 304 R0
SYMATTR InstName R3
SYMATTR Value 1.78Meg
SYMBOL ind -64 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=2K
SYMBOL res -304 304 R0
SYMATTR InstName Rload1
SYMATTR Value 22
SYMBOL cap -176 320 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL res 368 304 R0
SYMATTR InstName R1
SYMATTR Value 619K
SYMBOL res 368 416 R0
SYMATTR InstName R2
SYMATTR Value 1.21Meg
SYMBOL res 560 304 R0
SYMATTR InstName Rload2
SYMATTR Value 12
FLAG 384 528 0
FLAG 576 416 0
FLAG 496 416 0
FLAG 192 512 0
FLAG 112 512 0
FLAG 272 512 0
FLAG -80 528 0
FLAG -288 416 0
FLAG -160 416 0
FLAG -288 192 0
FLAG -288 304 OUT1
FLAG 576 304 OUT2
FLAG -288 80 IN
TEXT 576 504 Left 2 !.tran 0.7m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\562f1ee60c5d_Parte4.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vout N002 0 N003 N_1u l=1.5u w=9.23u
Rd N001 Vout 10k
Vdd N001 0 5
V1 N002 0 1.7858314
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.dc Vdd 0 5 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 -160 144 -160
WIRE 144 -144 144 -160
WIRE 192 -96 144 -96
WIRE 288 -16 288 -160
WIRE 288 -16 192 -16
WIRE 144 16 144 -96
WIRE 144 128 144 96
WIRE 224 128 144 128
WIRE 64 176 -32 176
WIRE 176 176 144 176
WIRE 64 208 64 176
WIRE 96 208 64 208
WIRE 176 208 176 176
WIRE 176 208 144 208
WIRE 144 272 144 224
WIRE -32 304 -32 256
SYMBOL nmos4 96 128 R0
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=1.5u w=9.23u
SYMBOL res 128 0 R0
SYMATTR InstName Rd
SYMATTR Value 10k
SYMBOL voltage -32 160 R0
SYMATTR InstName V1
SYMATTR Value 1.7858314
SYMBOL voltage 192 -112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vdd
SYMATTR Value 5
FLAG -32 304 0
FLAG 144 272 0
FLAG 144 -144 0
FLAG 224 128 Vout
TEXT -240 -32 Left 2 !.include cmosedu_models.txt
TEXT -240 328 Left 2 !.dc Vdd 0 5 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\3f74ea1ed625_lab3b.asc
* Generated by LTspice 26.0.1 for Windows.
VDD VDD 0 1
Vin Vin 0 PULSE(0 1 50p 1p 1p 100p)
M1 Vout Vin VDD VDD P_50n l=50n w=1000n
M2 Vout Vin 0 0 N_50n l=50n w=500n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib C:\Users\Sarthak\Desktop\CMOS_PRO\pure_models.txt
.tran 250p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 64 192 16
WIRE 144 80 96 80
WIRE 96 192 96 80
WIRE 96 192 32 192
WIRE 192 192 192 160
WIRE 304 192 192 192
WIRE 192 224 192 192
WIRE 96 304 96 192
WIRE 144 304 96 304
WIRE 192 368 192 320
SYMBOL voltage -160 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(0 1 50p 1p 1p 100p)
SYMBOL nmos4 144 224 R0
WINDOW 123 56 100 Left 2
SYMATTR InstName M2
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage -160 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL pmos4 144 160 M180
WINDOW 0 52 21 Left 2
WINDOW 3 57 76 Left 2
WINDOW 123 56 -1 Left 2
SYMATTR InstName M1
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1000n
FLAG 192 368 0
FLAG 192 272 0
FLAG -160 144 0
FLAG -160 336 0
FLAG -160 64 VDD
FLAG 192 16 VDD
FLAG 304 192 Vout
FLAG 32 192 Vin
FLAG -160 256 Vin
FLAG 192 112 VDD
TEXT -288 -72 Left 2 !.lib C:\\Users\\Sarthak\\Desktop\\CMOS_PRO\\pure_models.txt
TEXT -288 392 Left 2 !.tran 250p
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6995-2.asc
* Generated by LTspice 26.0.1 for Windows.
* 60 Second Power On Reset\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6995-2.asy)
XU1 N001 0 N002 N003 N001 OUT LTC6995-2 ;pnba RST/)GND)SET)DIV)V+)OUT
V1 N001 0 PULSE(0 5 5 10 10 100 200 2)
R2 N003 0 523K
R1 N001 N003 1000K
R3 N002 OUT 178K
.tran 400 startup
.lib LTC6995-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 964 680
WIRE 528 32 96 32
WIRE 368 48 0 48
WIRE 96 96 96 32
WIRE 112 96 96 96
WIRE 368 96 368 48
WIRE 368 96 336 96
WIRE 400 96 368 96
WIRE 112 176 96 176
WIRE 384 176 336 176
WIRE 528 176 528 32
WIRE 528 176 384 176
WIRE 384 192 384 176
WIRE 528 192 528 176
WIRE 0 256 0 48
WIRE 16 256 0 256
WIRE 112 256 96 256
WIRE 352 256 336 256
WIRE 352 288 352 256
WIRE 384 288 384 272
WIRE 384 288 352 288
WIRE 528 288 528 272
WIRE 384 304 384 288
WIRE 384 400 384 384
SYMBOL res 112 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 178K
SYMBOL res 368 288 R0
SYMATTR InstName R2
SYMATTR Value 523K
SYMBOL voltage 528 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 5 10 10 100 200 2)
SYMBOL res 368 176 R0
SYMATTR InstName R1
SYMATTR Value 1000K
SYMBOL SpecialFunctions\\LTC6995-2 224 176 R0
SYMATTR InstName U1
FLAG 96 176 0
FLAG 400 96 OUT
FLAG 528 288 0
FLAG 384 400 0
TEXT 224 16 Bottom 2 ;60 Second Power On Reset\nStartup Modeled
TEXT 520 376 Left 2 !.tran 400 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3200-5.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 N001 1
C2 OUT 0 1
Rload OUT 0 50
V1 IN 0 3
XU1 OUT 0 IN N001 IN N002 LTC3200-5 ;pnba Vout)GND)_SHDN)Cap-)Vin)Cap+
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3200-5.asy)
.lib LTC3200-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3144 2128
WIRE 2576 1664 2528 1664
WIRE 2688 1664 2640 1664
WIRE 2528 1744 2528 1664
WIRE 2688 1744 2688 1664
WIRE 2448 1856 2368 1856
WIRE 2480 1856 2448 1856
WIRE 2832 1856 2736 1856
WIRE 2928 1856 2832 1856
WIRE 2368 1872 2368 1856
WIRE 2928 1872 2928 1856
WIRE 2832 1888 2832 1856
WIRE 2448 1920 2448 1856
WIRE 2480 1920 2448 1920
WIRE 2368 1968 2368 1952
WIRE 2832 1968 2832 1952
WIRE 2928 1968 2928 1952
WIRE 2608 2000 2608 1968
FLAG 2368 1968 0
FLAG 2832 1968 0
FLAG 2928 1968 0
FLAG 2608 2000 0
FLAG 2928 1856 OUT
FLAG 2368 1856 IN
SYMBOL cap 2640 1648 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 2816 1888 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL RES 2912 1856 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL VOLTAGE 2368 1856 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL PowerProducts\\LTC3200-5 2608 1856 R0
SYMATTR InstName U1
TEXT 2784 2032 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2c20f6c26538_Draft15.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N002 0 100n
R2 N002 N001 50
C1 N002 0 {Ctest}
V2 N001 0 AC 1 0
.step param Ctest list 10p 20p 30p 40p 50p
.MODEL SMV1130-079LF d CJ0=25.8p Vj=10 M=3.7 Rs=0.8
.lib C:\Users\piyus\Projects\public\fm_radio\sims\varactor_model.lib
.ac dec 10000 10k 100G
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 680
WIRE -672 112 -720 112
WIRE -544 112 -592 112
WIRE -368 112 -544 112
WIRE -144 112 -368 112
WIRE -720 176 -720 112
WIRE -544 192 -544 112
WIRE -368 208 -368 112
WIRE -720 320 -720 256
WIRE -544 384 -544 272
WIRE -432 384 -544 384
WIRE -368 384 -368 272
WIRE -368 384 -432 384
WIRE -432 464 -432 384
DATAFLAG -560 112 ""
SYMBOL res -576 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL cap -384 208 R0
SYMATTR InstName C1
SYMATTR Value {Ctest}
SYMBOL ind -560 176 R0
SYMATTR InstName L1
SYMATTR Value 100n
SYMBOL voltage -720 160 R0
WINDOW 3 -128 70 Left 2
WINDOW 123 -128 42 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMATTR InstName V2
FLAG -720 320 0
FLAG -432 464 0
TEXT 224 64 Left 2 !.step param Ctest list 10p 20p 30p 40p 50p
TEXT 224 128 Left 2 !.MODEL SMV1130-079LF d CJ0=25.8p Vj=10 M=3.7  Rs=0.8
TEXT 224 192 Left 2 !.lib C:\\Users\\piyus\\Projects\\public\\fm_radio\\sims\\varactor_model.lib
TEXT 200 -80 Left 2 !.ac dec 10000 10k 100G