Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\5eba22c49efd_LDO-npn-tlv431.asc
* Generated by LTspice 26.0.1 for Windows.
* MMBT2907A-TP
* P(Q1) < 250mW when Vin < 10V
* VIN > 10V will not cause damage, so 5V TVS (Vlcamp = 9V) can be used as protection
* Dropout : 5Vout when Vin = 6.37V at 500mA output
* 500mA out, 400mW in Q1 -> VINmax = 5.3V
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\TLV431.asy)
V1 IN 0 5
R3 IN N001 10k
R2 N003 N004 33k
R5 N002 N004 1k
Q2 N002 N001 IN 0 BC856B
Q1 OUT N002 IN 0 2N2907
R6 N004 0 0.01
R1 OUT N003 100k
R4 OUT 0 10
XU1 N001 N004 NC_01 TLV431 ;pnba K)A)R
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc v1 0 15 0.1
.lib TLV431.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1824 680
WIRE -64 96 -144 96
WIRE 32 96 -64 96
WIRE 160 96 32 96
WIRE 272 96 160 96
WIRE 464 96 368 96
WIRE 592 96 464 96
WIRE 624 96 592 96
WIRE 32 112 32 96
WIRE 272 112 272 96
WIRE 368 112 368 96
WIRE 464 112 464 96
WIRE 160 144 160 96
WIRE -144 176 -144 96
WIRE 624 176 624 96
WIRE 96 192 32 192
WIRE 320 240 320 176
WIRE 320 240 160 240
WIRE 32 256 32 192
WIRE 464 288 464 192
WIRE 464 288 64 288
WIRE 464 320 464 288
WIRE 320 352 320 240
WIRE -144 432 -144 256
WIRE 624 432 624 256
WIRE 32 448 32 320
WIRE 320 448 320 432
WIRE 320 448 32 448
WIRE 464 448 464 400
WIRE 464 448 320 448
WIRE 320 464 320 448
WIRE 320 560 320 544
SYMBOL pnp 368 176 M270
SYMATTR InstName Q1
SYMATTR Value 2N2907
SYMBOL voltage -144 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 448 96 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL pnp 96 240 M180
SYMATTR InstName Q2
SYMATTR Value BC856B
SYMBOL res 448 304 R0
SYMATTR InstName R2
SYMATTR Value 33k
SYMBOL Parts_TCO\\TLV431 32 288 R0
SYMATTR InstName U1
SYMBOL res 16 96 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 608 160 R0
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL res 304 448 R0
SYMATTR InstName R6
SYMATTR Value 0.01
SYMBOL res 304 336 R0
SYMATTR InstName R5
SYMATTR Value 1k
FLAG -144 432 0
FLAG 624 432 0
FLAG 320 560 0
FLAG 592 96 OUT
FLAG -64 96 IN
TEXT -376 224 Left 2 !.dc v1 0 15 0.1
TEXT 296 -24 Left 2 ;MMBT2907A-TP
TEXT -200 -128 Left 2 ;P(Q1) < 250mW when Vin < 10V
TEXT -200 -96 Left 2 ;VIN > 10V will not cause damage, so 5V TVS (Vlcamp = 9V) can be used as protection
TEXT -200 -160 Left 2 ;Dropout : 5Vout when Vin = 6.37V at 500mA output
TEXT -200 -64 Left 2 ;500mA out, 400mW in Q1 -> VINmax = 5.3V
* Z:\home\khalils\Downloads\files\data\raw_asc\f872a7d16451_Brain.asc
* Generated by LTspice 26.0.1 for Windows.
* DESCRIPTION: Sixteen step analog memory
R1 N002 -15 2k
J3 N002 N004 CV_OUT 2N3819
J1 CV_IN N003 N001 2N3819
J2 +15 N001 N002 2N3819
C1 N001 0 10n
D2 N004 STEP_TRIGGER 1N4148
D1 N003 STEP_TRIGGER 1N4148
D3 N003 PROG_TRIGGER 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 -128 352 -208
WIRE 64 -64 -192 -64
WIRE 240 -64 160 -64
WIRE 304 -64 240 -64
WIRE 240 -16 240 -64
WIRE 352 -16 352 -32
WIRE 480 -16 352 -16
WIRE 624 -16 576 -16
WIRE 128 0 128 -16
WIRE 128 0 64 0
WIRE 352 0 352 -16
WIRE 64 16 64 0
WIRE 128 16 128 0
WIRE 544 48 544 32
WIRE 64 128 64 80
WIRE 128 128 128 80
WIRE 240 128 240 48
WIRE 352 128 352 80
WIRE 544 128 544 112
SYMBOL diode 112 16 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL diode 528 48 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL njf 480 32 R270
SYMATTR InstName J3
SYMATTR Value 2N3819
SYMBOL njf 304 -128 R0
SYMATTR InstName J2
SYMATTR Value 2N3819
SYMBOL njf 64 -16 R270
SYMATTR InstName J1
SYMATTR Value 2N3819
SYMBOL cap 224 -16 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL diode 80 16 M0
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL res 336 -16 R0
SYMATTR InstName R1
SYMATTR Value 2k
FLAG 352 128 -15
FLAG 352 -208 +15
FLAG 240 128 0
FLAG -192 -64 CV_IN
FLAG 624 -16 CV_OUT
FLAG 128 128 STEP_TRIGGER
FLAG 544 128 STEP_TRIGGER
FLAG 64 128 PROG_TRIGGER
TEXT -8 408 Left 0 ;DESCRIPTION: Sixteen step analog memory
* Z:\home\khalils\Downloads\files\data\raw_asc\19aa72b9e44b_pwm-highpass.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 N001 100n
V1 N001 0 SINE(1 1 100 0 0 0 10)
R2 N005 N004 301
C3 N005 N003 4800p
C2 N004 0 100n
R3 N004 N002 1100
R1 N003 N002 301
.tran 0 10mS 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 980 680
WIRE 400 240 176 240
WIRE 544 240 464 240
WIRE 704 240 544 240
WIRE 848 240 784 240
WIRE 912 240 848 240
WIRE 544 272 544 240
WIRE 848 288 848 240
WIRE 176 304 176 240
WIRE 400 384 320 384
WIRE 544 384 544 352
WIRE 544 384 464 384
WIRE 704 384 544 384
WIRE 848 384 848 352
WIRE 848 384 784 384
WIRE 912 384 848 384
WIRE 176 480 176 384
WIRE 320 480 320 384
WIRE 320 480 176 480
WIRE 176 496 176 480
SYMBOL res 560 368 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 1100
SYMBOL cap 464 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL res 800 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 301
SYMBOL cap 864 352 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value 4800p
SYMBOL voltage 176 288 R0
SYMATTR InstName V1
SYMATTR Value SINE(1 1 100 0 0 0 10)
SYMBOL res 800 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL cap 464 368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 100n
FLAG 176 496 0
TEXT 168 136 Left 2 !.tran 0 10mS 0
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17553A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17553A.asy)
Rload vOUT 0 66
V1 vIN 0 24
R2 N002 0 287k
XU1 0 vIN N002 N004 vOUT N001 N003 N005 MAX17553A ;pnba GND)IN)EN/UV)HYST)FB/VO)LX)_RESET)RT
R7 N005 0 402k
R4 vOUT N003 100k
L1 N001 vOUT 150 Rser=2
R1 vIN N002 3.32Meg
R3 N002 N004 953k
C2 vOUT 0 10
.tran 4m startup
.lib MAX17553A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 992 680
WIRE -176 -32 -192 -32
WIRE 48 -32 -176 -32
WIRE 176 -32 48 -32
WIRE 512 -32 464 -32
WIRE 624 -32 592 -32
WIRE 704 -32 624 -32
WIRE 768 -32 704 -32
WIRE 864 -32 768 -32
WIRE 896 -32 864 -32
WIRE 48 -16 48 -32
WIRE 624 -16 624 -32
WIRE 896 -16 896 -32
WIRE -192 16 -192 -32
WIRE 624 64 624 48
WIRE 896 80 896 64
WIRE 48 96 48 64
WIRE 48 96 -64 96
WIRE 176 96 48 96
WIRE -64 112 -64 96
WIRE 48 112 48 96
WIRE -192 128 -192 96
WIRE 512 128 464 128
WIRE 704 128 704 -32
WIRE 704 128 592 128
WIRE -64 224 -64 192
WIRE 48 224 48 192
WIRE 176 224 48 224
WIRE 768 224 768 -32
WIRE 768 224 464 224
WIRE 176 320 48 320
WIRE 48 336 48 320
WIRE 320 384 320 368
WIRE 48 432 48 416
SYMBOL res 608 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL res 880 -32 R0
SYMATTR InstName Rload
SYMATTR Value 66
SYMBOL res 32 96 R0
SYMATTR InstName R3
SYMATTR Value 953k
SYMBOL voltage -192 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL ind 496 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMATTR SpiceLine Rser=2
SYMBOL res 32 320 R0
SYMATTR InstName R7
SYMATTR Value 402k
SYMBOL MAX17553A 320 144 R0
SYMATTR InstName U1
SYMBOL res -80 96 R0
SYMATTR InstName R2
SYMATTR Value 287k
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 3.32Meg
SYMBOL cap 608 -16 R0
SYMATTR InstName C2
SYMATTR Value 10
FLAG -192 128 0
FLAG 320 384 0
FLAG 624 64 0
FLAG 896 80 0
FLAG -176 -32 vIN
FLAG 864 -32 vOUT
FLAG -64 224 0
FLAG 48 432 0
TEXT 480 392 Left 2 !.tran 4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\abc674541525_DR01op.asc
* Generated by LTspice 26.0.1 for Windows.
V1 V1 0 {Vcc}
D1 V1 R1 1N4148
R1 R1 0 {R1}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.op
.param Vcc=25 R1=1.2k
.meas Vd param V(V1)-V(R1)
.meas Pd param Vd*I(D1)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 912 680
WIRE 128 0 48 0
WIRE 256 0 192 0
WIRE 304 0 256 0
WIRE 48 48 48 0
WIRE 304 48 304 0
WIRE 48 160 48 128
WIRE 304 160 304 128
WIRE 304 160 48 160
WIRE 48 192 48 160
FLAG 48 192 0
FLAG 256 0 R1
FLAG 48 0 V1
SYMBOL voltage 48 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vcc}
SYMBOL diode 128 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 288 32 R0
SYMATTR InstName R1
SYMATTR Value {R1}
TEXT 88 176 Left 2 !.op
TEXT 96 208 Left 2 !.param Vcc=25 R1=1.2k
TEXT 416 16 Left 2 !.meas Vd param V(V1)-V(R1)
TEXT 416 56 Left 2 !.meas Pd param Vd*I(D1)
* Z:\home\khalils\Downloads\files\data\raw_asc\13b5e8824341_317A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT317A.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1009.asy)
XU2 N002 0 NC_01 LT1009 ;pnba VCC)VEE)ADJ
R1 OUT N001 121
Rload OUT 0 10
V1 IN 0 SINE(10 100m 100K)
R2 N001 N002 121
XU1 N001 OUT IN LT317A ;pnba ADJ)OUT)IN
.tran 50u
.lib LT317A.sub
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 680
WIRE 64 128 -272 128
WIRE 368 128 320 128
WIRE 512 128 368 128
WIRE 368 144 368 128
WIRE 512 144 512 128
WIRE -272 160 -272 128
WIRE 512 240 512 224
WIRE 192 256 192 224
WIRE 368 256 368 224
WIRE 368 256 192 256
WIRE -272 272 -272 240
WIRE 368 272 368 256
WIRE 368 368 368 352
WIRE 368 448 368 432
SYMBOL LT317A 192 128 R0
SYMATTR InstName U1
SYMBOL res 352 256 R0
SYMATTR InstName R2
SYMATTR Value 121
SYMBOL References\\LT1009 368 400 R0
SYMATTR InstName U2
SYMBOL voltage -272 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(10 100m 100K)
SYMBOL res 496 128 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL res 352 128 R0
SYMATTR InstName R1
SYMATTR Value 121
FLAG -272 272 0
FLAG 512 240 0
FLAG 368 448 0
FLAG -272 128 IN
FLAG 512 128 OUT
TEXT 512 320 Left 2 !.tran 50u
* Z:\tmp\asc_dec_bjh7r6w2\0d9abb519d5b_pdt-projeto-com-transistores_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N003 1k2
R2 N003 0 240R
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -112 -48 -112
WIRE 304 -112 160 -112
WIRE 160 -64 160 -112
WIRE 304 -64 304 -112
WIRE 304 112 304 16
WIRE -48 128 -48 -112
WIRE 160 160 160 16
WIRE 240 160 160 160
WIRE 160 304 160 160
WIRE 304 304 304 208
WIRE -48 416 -48 208
WIRE 160 416 160 384
WIRE 160 416 -48 416
WIRE 304 416 304 384
WIRE 304 416 160 416
WIRE -48 448 -48 416
SYMBOL res 144 -80 R0
SYMATTR InstName R1
SYMATTR Value 1k2
SYMBOL res 144 288 R0
SYMATTR InstName R2
SYMATTR Value 240R
FLAG -48 448 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7158-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7158-1.2.asy)
C3 N004 0 1 Rser=10m Lser=1n
Rload OUT 0 1.2
C1 OUT 0 10 Rser=10m Lser=1n
V1 IN 0 2.4
C2 N003 0 1
XU1 OUT MP_01 OUT N002 N001 N003 N003 N004 IN 0 ADP7158_9 Vreg=2.111 Vref=1.216 ;pnba Vout))Vout_Sense)Byp)EN)Ref_Sense)Ref)Vreg)Vin)GND
C4 N002 0 1
R1 IN N001 100K
.tran 5m startup
.lib ADP7158_9.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -144 32
WIRE 80 32 -32 32
WIRE 416 32 400 32
WIRE 464 32 416 32
WIRE 560 32 464 32
WIRE -144 48 -144 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE 416 128 416 32
WIRE 416 128 400 128
WIRE -144 144 -144 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE -16 224 -32 224
WIRE 80 224 48 224
WIRE 416 224 400 224
WIRE 464 224 416 224
WIRE 464 240 464 224
WIRE -16 320 -32 320
WIRE 80 320 48 320
WIRE 416 320 416 224
WIRE 416 320 400 320
WIRE 464 320 464 304
WIRE 240 400 240 384
SYMBOL voltage -144 32 R0
SYMATTR InstName V1
SYMATTR Value 2.4
SYMBOL cap 48 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL ADP7158-1.2 240 176 R0
SYMATTR InstName U1
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 48 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMATTR Value2 Rser=10m
SYMATTR SpiceLine Lser=1n
SYMBOL cap 448 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR Value2 Rser=10m
SYMATTR SpiceLine Lser=1n
SYMBOL res 544 32 R0
SYMATTR InstName Rload
SYMATTR Value 1.2
SYMBOL cap 448 240 R0
SYMATTR InstName C2
SYMATTR Value 1
FLAG 240 400 0
FLAG 464 320 0
FLAG 464 144 0
FLAG -32 320 0
FLAG -32 224 0
FLAG -144 144 0
FLAG 560 144 0
FLAG -144 32 IN
FLAG 560 32 OUT
TEXT 504 368 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\9075e953e276_STW9N150_test.asc
* Generated by LTspice 26.0.1 for Windows.
* Ctrl-right-mouse-click on the transistor\nto change the Prefix to X in the full dialog.
V2 N001 0 1000
R1 N001 out 10k
V1 N002 0 0
XM1 out N003 0 STW9N150 ;pnba D)G)S
R2 N002 N003 10
.dc V1 0 10 .01
.include STW9N150.lib
.options gmin=1e-10 abstol=1e-10 reltol=0.03
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -80 -16 -80
WIRE -16 -32 -16 -80
WIRE 208 -32 208 -80
WIRE -16 80 -16 48
WIRE 208 80 208 48
WIRE 304 80 208 80
WIRE 208 96 208 80
WIRE 48 176 -16 176
WIRE 160 176 128 176
WIRE -16 208 -16 176
WIRE -16 320 -16 288
WIRE 208 320 208 192
WIRE 208 320 -16 320
WIRE -16 352 -16 320
SYMBOL res 32 192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL nmos 160 96 R0
SYMATTR InstName M1
SYMATTR Value STW9N150
SYMATTR Prefix X
SYMBOL res 192 -48 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -16 192 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL voltage -16 -48 R0
SYMATTR InstName V2
SYMATTR Value 1000
FLAG -16 352 0
FLAG -16 80 0
FLAG 304 80 out
TEXT -88 -144 Left 0 ;Ctrl-right-mouse-click on the transistor\nto change the Prefix to X in the full dialog.
TEXT -96 -240 Left 0 !.dc V1 0 10 .01
TEXT -96 -272 Left 0 !.include STW9N150.lib
TEXT -96 -208 Left 0 !.options gmin=1e-10 abstol=1e-10 reltol=0.03
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6656-1.25.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6656-1.25.asy)
V1 N001 0 PWL(0 0 1m 0 +100n 1.75)
XU1 0 N001 N002 LT6656-1.25 ;pnba GND)IN)OUT
C1 N002 0 1
.tran 20m
.lib LT6656.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 836
WIRE 96 160 -176 160
WIRE 480 160 320 160
WIRE -176 176 -176 160
WIRE 480 176 480 160
WIRE 208 256 208 224
WIRE 480 256 480 240
WIRE -176 272 -176 256
SYMBOL LT6656-1.25 208 160 R0
SYMATTR InstName U1
SYMBOL cap 464 176 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -176 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1m 0 +100n 1.75)
FLAG 480 256 0
FLAG 208 256 0
FLAG -176 272 0
TEXT 448 344 Left 2 !.tran 20m
* Z:\home\khalils\Downloads\files\data\raw_asc\1506a544f8ac_A1C.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N001 VCC VEE PuntaOut LM741 ;pnba In+)In-)V+)V-)OUT
C2 PuntaOut 0 200p
R1 N001 PuntaIn 1K
C1 PuntaIn 0 200p
R2 PuntaOut N001 1Meg
R6 PuntaOut 0 1Meg
R5 PuntaIn 0 1Meg
R3 PuntaOut 0 1k
V3 0 VEE 12
V2 VCC 0 12
V1 N002 0 SINE(0 0.2 1k)
R4 PuntaIn N002 50
.lib LM741.sub
.tran 0 2m 0 1u
.meas Vmax MAX V(PuntaOut) from 0 to 1m
.meas Vmin MIN V(PuntaOut) from 0 to 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 680
WIRE 176 16 80 16
WIRE 320 16 256 16
WIRE 624 96 624 64
WIRE 928 144 880 144
WIRE 976 144 928 144
WIRE 1104 144 1056 144
WIRE 1152 144 1104 144
WIRE 128 192 128 144
WIRE -256 208 -320 208
WIRE -128 208 -176 208
WIRE -80 208 -128 208
WIRE 80 208 80 16
WIRE 80 208 0 208
WIRE 96 208 80 208
WIRE 624 208 624 176
WIRE 752 208 624 208
WIRE 320 224 320 16
WIRE 320 224 160 224
WIRE 368 224 320 224
WIRE 928 224 880 224
WIRE 976 224 976 208
WIRE 976 224 928 224
WIRE 1104 224 1056 224
WIRE 1152 224 1152 208
WIRE 1152 224 1104 224
WIRE -320 240 -320 208
WIRE 96 240 0 240
WIRE 752 240 752 208
WIRE 928 240 928 224
WIRE 1104 240 1104 224
WIRE 624 256 624 208
WIRE 368 272 368 224
WIRE 128 304 128 256
WIRE 624 352 624 336
WIRE -320 384 -320 320
WIRE 0 384 0 240
WIRE 368 384 368 352
SYMBOL voltage -320 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 0.2 1k)
SYMBOL res 864 128 R0
SYMATTR InstName R5
SYMATTR Value 1MEG
SYMBOL cap 960 144 R0
SYMATTR InstName C1
SYMATTR Value 200p
SYMBOL voltage 624 240 R0
SYMATTR InstName V3
SYMATTR Value 12
SYMBOL Opamps\\opamp2 128 160 R0
SYMATTR InstName U1
SYMATTR Value LM741
SYMBOL cap 1136 144 R0
SYMATTR InstName C2
SYMATTR Value 200p
SYMBOL res 16 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 272 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1MEG
SYMBOL res 352 256 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 1040 128 R0
SYMATTR InstName R6
SYMATTR Value 1MEG
SYMBOL res -160 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 50
SYMBOL voltage 624 80 R0
SYMATTR InstName V2
SYMATTR Value 12
FLAG 0 384 0
FLAG -320 384 0
FLAG 368 384 0
FLAG 752 240 0
FLAG 624 64 VCC
FLAG 624 352 VEE
FLAG 128 144 VCC
FLAG 128 304 VEE
FLAG 928 240 0
FLAG 1104 240 0
FLAG 928 144 PuntaIn
FLAG 1104 144 PuntaOut
FLAG 368 224 PuntaOut
FLAG -128 208 PuntaIn
TEXT -264 -24 Left 2 !.lib LM741.sub
TEXT -264 408 Left 2 !.tran 0 2m 0 1u
TEXT -264 -56 Left 2 !.meas Vmax MAX V(PuntaOut) from 0 to 1m
TEXT -264 -96 Left 2 !.meas Vmin MIN V(PuntaOut) from 0 to 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\f6cc17f2664d_Balancer_voltage.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N002 4.7k
R2 N002 N003 22k
C2 N002 N003 100n
R4 Vd 0 4.7k
R3 N001 Vs 4.7k
XU1 N002 Vs N001 N003 Vg level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 N001 N003 PWL(0 2.5 100m 2.5 400m 4.5 480m 4.5 490m 2.5 600m 2.5 900m 4.5 1 4.5) AC 1
M1 Vd Vg Vs Vs P-MOS
V2 N003 0 PWL(0 0 510m 0 520m 20 1 20)
C4 Vd 0 100n
C1 N001 N002 00n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.ac dec 100 1 1meg
.MODEL P-MOS PMOS(Vto=-1.66 Kp=1.3807e-01
+ Nfs=1000000000 Eta=0 Level=3 L=1e-4 W=1e-4
+ Gamma=0 Phi=0.6 Is=1e-24 Js=0 Pb=0.8 Cj=0
+ Cjsw=0 Cgso=0 Cgdo=0 Cgbo=0 Tox=1e-07 Xj=0
+ U0=600 Vmax=3000)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 680
WIRE 128 -16 -80 -16
WIRE 224 -16 128 -16
WIRE 320 -16 224 -16
WIRE 464 -16 320 -16
WIRE 128 0 128 -16
WIRE 224 0 224 -16
WIRE 464 0 464 -16
WIRE 400 96 256 96
WIRE 464 96 464 80
WIRE 464 96 400 96
WIRE -80 112 -80 -16
WIRE 320 112 320 -16
WIRE 256 128 256 96
WIRE 288 128 256 128
WIRE 464 128 464 96
WIRE 400 144 352 144
WIRE 416 144 400 144
WIRE 128 160 128 80
WIRE 224 160 224 64
WIRE 224 160 128 160
WIRE 288 160 224 160
WIRE 128 176 128 160
WIRE 224 176 224 160
WIRE 464 256 464 224
WIRE -80 272 -80 192
WIRE 128 272 128 256
WIRE 128 272 -80 272
WIRE 224 272 224 240
WIRE 224 272 128 272
WIRE 320 272 320 176
WIRE 320 272 224 272
WIRE -80 352 -80 272
WIRE 464 384 464 256
WIRE 576 384 464 384
WIRE 464 400 464 384
WIRE 576 416 576 384
WIRE -80 496 -80 432
WIRE 464 496 464 480
WIRE 576 496 576 480
FLAG 464 496 0
FLAG -80 496 0
FLAG 400 144 Vg
FLAG 400 96 Vs
FLAG 464 256 Vd
FLAG 576 496 0
SYMBOL res 112 -16 R0
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL res 112 160 R0
SYMATTR InstName R2
SYMATTR Value 22k
SYMBOL cap 208 176 R0
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL res 448 384 R0
SYMATTR InstName R4
SYMATTR Value 4.7k
SYMBOL res 448 -16 R0
SYMATTR InstName R3
SYMATTR Value 4.7k
SYMBOL OpAmps\\UniversalOpAmp2 320 144 R0
SYMATTR InstName U1
SYMBOL voltage -80 96 R0
WINDOW 3 -444 62 Invisible 2
WINDOW 39 0 0 Left 0
SYMATTR Value PWL(0 2.5 100m 2.5 400m 4.5 480m 4.5 490m 2.5 600m 2.5 900m 4.5 1 4.5)
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL pmos 416 224 M180
SYMATTR InstName M1
SYMATTR Value P-MOS
SYMBOL voltage -80 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 0 510m 0 520m 20 1 20)
SYMBOL cap 560 416 R0
SYMATTR InstName C4
SYMATTR Value 100n
SYMBOL cap 208 0 R0
SYMATTR InstName C1
SYMATTR Value 00n
TEXT -112 520 Left 2 !.ac dec 100 1 1meg
TEXT -896 152 Left 2 !.MODEL P-MOS PMOS(Vto=-1.66 Kp=1.3807e-01\n+ Nfs=1000000000 Eta=0 Level=3 L=1e-4 W=1e-4 \n+ Gamma=0 Phi=0.6 Is=1e-24 Js=0 Pb=0.8  Cj=0 \n+ Cjsw=0 Cgso=0 Cgdo=0 Cgbo=0 Tox=1e-07 Xj=0\n+ U0=600 Vmax=3000)
* Z:\home\khalils\Downloads\files\data\raw_asc\05dae5b29fbe_pmos_sweep.asc
* Generated by LTspice 26.0.1 for Windows.
* LTspice doesn't support\nNF=5 rgeomod=1 geomod=0
* RighMouseClick for specific dialog\nCtrl-RightMouseClick for full SPICE dialog
Vgs g s -1
Vds 0 s -1.2
M1 0 g s s PMOS l=0.09u w=10.0u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc vds 0 -1.2 -.01 vgs 0 -1.2 -0.2
.include modelcard.pmos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -64 32 -64
WIRE 416 -64 208 -64
WIRE 32 -16 32 -64
WIRE 208 32 208 -64
WIRE 416 48 416 -64
WIRE 208 96 208 32
WIRE 224 96 208 96
WIRE 32 112 32 64
WIRE 128 112 32 112
WIRE 160 112 128 112
WIRE 224 144 224 96
WIRE 224 144 208 144
WIRE 208 240 208 192
WIRE 416 240 416 128
SYMBOL voltage 32 80 M180
WINDOW 0 24 104 Left 0
WINDOW 3 24 16 Left 0
SYMATTR InstName Vgs
SYMATTR Value -1
SYMBOL voltage 416 144 M180
WINDOW 0 24 104 Left 0
WINDOW 3 24 16 Left 0
SYMATTR InstName Vds
SYMATTR Value -1.2
SYMBOL pmos4 160 192 M180
WINDOW 3 79 72 Left 0
WINDOW 123 79 44 Left 0
SYMATTR InstName M1
SYMATTR Value2 l=0.09u w=10.0u
FLAG 208 240 0
FLAG 416 240 0
FLAG 128 112 g
FLAG 208 32 s
TEXT 16 -152 Left 0 !.dc vds 0 -1.2 -.01 vgs 0 -1.2 -0.2
TEXT 16 -200 Left 0 !.include modelcard.pmos
TEXT 24 304 Left 0 ;LTspice doesn't support\nNF=5 rgeomod=1 geomod=0
TEXT 16 384 Left 0 ;RighMouseClick for specific dialog\nCtrl-RightMouseClick for full SPICE dialog
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1010.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1010.asy)
V2 -V 0 -15
V1 +V 0 15
XU1 N001 +V -V NC_01 N002 LT1010 ;pnba In)V+)V-)Bias)OUT
V3 N001 0 SINE(0 1 1K)
.tran 3m
.lib LT1010.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -176 208 -176 192
WIRE -48 208 -48 192
WIRE 176 208 176 192
WIRE 160 240 80 240
WIRE 368 240 224 240
WIRE 80 272 80 240
WIRE 192 288 192 272
WIRE -176 304 -176 288
WIRE -48 304 -48 288
WIRE 80 368 80 352
SYMBOL voltage 80 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL voltage -48 192 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT1010 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -176 192 R0
SYMATTR InstName V2
SYMATTR Value -15
FLAG -48 304 0
FLAG 176 192 +V
FLAG -48 192 +V
FLAG 192 288 -V
FLAG -176 304 0
FLAG -176 192 -V
FLAG 80 368 0
TEXT 312 320 Left 2 !.tran 3m