Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\a23c824f6b8a_Wein_Bridge_Oscillator.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N004 N003 10.2k
C1 N003 N002 3n
C2 0 N002 3n
R2 N004 N005 100k
R3 0 N005 47k
R4 0 N002 10.2k
XU1 N002 N005 N006 N001 N004 LM741/NS ;pnba In+)In-)V+)V-)OUT
V1 0 N001 12
V2 N006 0 12
.include LM741.MOD
.tran 0 30ms 10ms 0.1m
* WEIN BRIDGE OSCILLATOR
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1004 680
WIRE 768 -128 480 -128
WIRE 768 -64 768 -128
WIRE 176 -16 96 -16
WIRE 304 -16 240 -16
WIRE 640 -16 384 -16
WIRE 480 64 480 -128
WIRE 32 80 -112 80
WIRE 96 80 96 -16
WIRE 96 80 32 80
WIRE 448 80 96 80
WIRE 640 96 640 -16
WIRE 640 96 512 96
WIRE 768 96 768 16
WIRE 816 96 768 96
WIRE 448 112 256 112
WIRE 768 144 768 96
WIRE -112 176 -112 80
WIRE 32 176 32 80
WIRE 256 208 256 112
WIRE 320 208 256 208
WIRE 640 208 640 96
WIRE 640 208 400 208
WIRE 256 240 256 208
WIRE 480 304 480 128
WIRE 768 304 768 224
WIRE 768 304 480 304
WIRE -112 368 -112 256
WIRE 32 368 32 240
WIRE 32 368 -112 368
WIRE 256 368 256 320
WIRE 256 368 32 368
WIRE 32 384 32 368
FLAG 816 96 0
FLAG 32 384 0
SYMBOL res 400 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10.2k
SYMBOL cap 240 -32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 3n
SYMBOL cap 48 240 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 3n
SYMBOL res 416 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res 272 336 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 47k
SYMBOL res -96 272 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 10.2k
SYMBOL OpAmps\\opamp2 480 160 M180
SYMATTR InstName U1
SYMATTR Value LM741/NS
SYMBOL voltage 768 32 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL voltage 768 240 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 12
TEXT -104 -40 Left 2 !.include LM741.MOD
TEXT 96 392 Left 2 !.tran 0 30ms 10ms 0.1m
TEXT -40 -96 Left 2 ;WEIN BRIDGE OSCILLATOR
* Z:\home\khalils\Downloads\files\data\raw_asc\fa79f0bfa984_Superdiode.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU5 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001A.asy)
;tran 0 10m 0 1u
D1 N002 N001 1N914
V1 VCC 0 15
V2 0 VEE 15
XU5 N003 N001 VCC VEE N002 LT1001 ;pnba In+)In-)V+)V-)OUT
V5 N003 0 0
R15 N001 0 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V5 -1 1 1m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3400 680
WIRE 1456 64 1456 48
WIRE 1456 80 1456 64
WIRE 1168 256 1168 160
WIRE 1312 256 1168 256
WIRE 1408 256 1376 256
WIRE 1168 352 1168 256
WIRE 1248 352 1168 352
WIRE 1408 368 1408 256
WIRE 1408 368 1312 368
WIRE 1248 384 944 384
WIRE 944 416 944 384
WIRE 944 512 944 496
IOPIN 1456 -32 Out
IOPIN 1280 336 In
IOPIN 1456 160 Out
IOPIN 1280 400 In
SYMBOL res 1184 176 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R15
SYMATTR Value 1k
SYMBOL voltage 1456 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL diode 1376 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL Opamps\\LT1001A 1280 304 R0
WINDOW 3 -171 74 Left 2
SYMATTR InstName U5
SYMBOL voltage 1456 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage 944 400 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V5
SYMATTR Value 0
FLAG 1456 64 0
FLAG 944 512 0
FLAG 1168 80 0
FLAG 1456 -32 VCC
FLAG 1280 336 VCC
FLAG 1456 160 VEE
FLAG 1280 400 VEE
TEXT 1024 520 Left 2 !.dc V5 -1 1 1m
TEXT 1024 560 Left 2 !;tran 0 10m 0 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\0b3a42c0ec33_PVcell.asc
* Generated by LTspice 26.0.1 for Windows.
I1 neg N001 {imax}
R2 neg pos {Rshunt}
D1 N001 neg Dpv
C1 neg 0 100n Rpar=10meg
R1 N001 pos {Rseries}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model dpv d(Is={Is} 11 N={n})
.param Is=1e-11 Imax=0.9 Vmax=56 n=Vmax*38.6/log(Imax/Is) Rseries=0.5 Rshunt=1meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1172 680
WIRE -48 208 -112 208
WIRE -16 208 -48 208
WIRE 128 208 64 208
WIRE 240 208 128 208
WIRE -48 224 -48 208
WIRE 128 224 128 208
WIRE 240 224 240 208
WIRE -48 320 -48 304
WIRE -48 320 -112 320
WIRE 64 320 -48 320
WIRE 128 320 128 288
WIRE 128 320 64 320
WIRE 240 320 240 304
WIRE 240 320 128 320
WIRE 64 336 64 320
WIRE 64 416 64 400
SYMBOL res -32 320 R180
WINDOW 0 36 76 Left 0
WINDOW 3 36 40 Left 0
SYMATTR InstName R2
SYMATTR Value {Rshunt}
SYMBOL cap 48 336 R0
SYMATTR InstName C1
SYMATTR Value 100n
SYMATTR SpiceLine Rpar=10meg
SYMBOL diode 112 224 R0
SYMATTR InstName D1
SYMATTR Value Dpv
SYMBOL res 80 192 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value {Rseries}
SYMBOL current 240 304 R180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value {imax}
FLAG -112 208 pos
FLAG -112 320 neg
FLAG 64 416 0
TEXT 112 368 Left 0 !.model dpv d(Is={Is} 11 N={n})
TEXT 40 456 Left 0 !.param Is=1e-11 Imax=0.9 Vmax=56 n=Vmax*38.6/log(Imax/Is) Rseries=0.5 Rshunt=1meg
* Z:\home\khalils\Downloads\files\data\raw_asc\184fc93836a8_AD8548.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8548.asy)
R1 N001 0 1K
V2 -V 0 -5
R2 OUT N001 10K
V1 +V 0 5
XU1 IN N001 +V -V OUT AD8548 ;pnba In+)In-)V+)V-)OUT
Vin IN 0 SINE(0 .1 10K)
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1432 700
WIRE 368 -1184 352 -1184
WIRE 464 -1184 448 -1184
WIRE 480 -1184 464 -1184
WIRE 576 -1184 560 -1184
WIRE 128 -1088 128 -1104
WIRE 224 -1088 224 -1104
WIRE 464 -1072 464 -1184
WIRE 480 -1072 464 -1072
WIRE 576 -1056 576 -1184
WIRE 576 -1056 544 -1056
WIRE 624 -1056 576 -1056
WIRE 480 -1040 368 -1040
WIRE 368 -1024 368 -1040
WIRE 128 -992 128 -1008
WIRE 224 -992 224 -1008
WIRE 368 -928 368 -944
SYMBOL voltage 224 -1104 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 128 -1104 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 576 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Opamps\\AD8548 512 -1120 R0
SYMATTR InstName U1
SYMBOL res 464 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 368 -1040 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 .1 10K)
FLAG 368 -928 0
FLAG 624 -1056 OUT
FLAG 368 -1040 IN
FLAG 512 -1088 +V
FLAG 512 -1024 -V
FLAG 352 -1184 0
FLAG 128 -1104 +V
FLAG 128 -992 0
FLAG 224 -1104 -V
FLAG 224 -992 0
TEXT 712 -960 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\214e54a00aaf_1990.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1990.asy)
V1 V+ 0 5
V2 V- 0 -5
V3 N002 0 SINE(0 1 10K)
XU1 0 N002 0 V- N003 OUT V+ N001 LT1990 ;pnba REF)IN-)IN+)VEE)GAIN2)OUT)VCC)GAIN1
.tran 1m
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 112 144 80
WIRE 368 160 336 160
WIRE -16 224 -240 224
WIRE -464 240 -464 224
WIRE -352 240 -352 224
WIRE -240 240 -240 224
WIRE 384 240 336 240
WIRE -16 256 -48 256
WIRE 368 288 336 288
WIRE -464 352 -464 320
WIRE -352 352 -352 320
WIRE -240 352 -240 320
WIRE -48 352 -48 256
WIRE -48 352 -240 352
WIRE -240 368 -240 352
WIRE 80 432 80 400
WIRE 144 432 144 400
SYMBOL voltage -240 224 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage -464 224 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL LT1990 160 240 R0
SYMATTR InstName U1
SYMBOL voltage -352 224 R0
SYMATTR InstName V2
SYMATTR Value -5
FLAG -240 368 0
FLAG -464 352 0
FLAG -352 352 0
FLAG 384 240 OUT
FLAG 80 432 0
FLAG 144 80 V+
FLAG -464 224 V+
FLAG -352 224 V-
FLAG 144 432 V-
TEXT 368 352 Left 0 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\a1737be6ba6f_example.asc
* Generated by LTspice 26.0.1 for Windows.
* "Oscilloscope"
* PMT Capacitance
* finite rise time filter
* detector pulse mock-up
* total pulse charge
* detector capacitance
* step voltage
* simulation length
B1 output_charge 0 V=idt(V(output))/50
C2 output N002 {C_PMT}
C1 0 N002 30n
V3 N001 0 PULSE(0 {U} 10n 10p 10p 1)
R7 output 0 50
R1 N002 N001 0.1
.tran 0 200n 0
.param Q -50p
.param C_PMT 200p
.param U Q/C_PMT
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 19840
WIRE -5840 1488 -6000 1488
WIRE -5712 1488 -5840 1488
WIRE -6000 1568 -6000 1488
WIRE -6000 1728 -6000 1648
WIRE -6752 1840 -6912 1840
WIRE -6544 1840 -6672 1840
WIRE -6320 1840 -6544 1840
WIRE -6000 1840 -6256 1840
WIRE -5808 1840 -6000 1840
WIRE -5648 1840 -5808 1840
WIRE -6544 1904 -6544 1840
WIRE -6912 1920 -6912 1840
WIRE -6000 1920 -6000 1840
WIRE -6912 2080 -6912 2000
WIRE -6544 2080 -6544 1968
WIRE -6000 2080 -6000 2000
SYMBOL voltage -6912 1904 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -442 107 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 {U} 10n 10p 10p 1)
SYMBOL bv -6000 1552 R0
SYMATTR InstName B1
SYMATTR Value V=idt(V(output))/50
SYMBOL cap -6528 1968 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 30n
SYMBOL res -6016 1904 R0
SYMATTR InstName R7
SYMATTR Value 50
SYMBOL res -6656 1824 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 0.1
SYMBOL cap -6256 1824 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {C_PMT}
FLAG -6912 2080 0
FLAG -6000 2080 0
FLAG -5808 1840 output
FLAG -6544 2080 0
FLAG -6000 1728 0
FLAG -5840 1488 output_charge
TEXT -6576 1624 Left 2 !.tran 0 200n 0
TEXT -5888 1960 Left 2 ;"Oscilloscope"
TEXT -6368 1752 Left 2 ;PMT Capacitance
TEXT -6784 1752 Left 2 ;finite rise time filter
TEXT -6960 1448 Left 5 ;detector pulse mock-up
TEXT -6904 1536 Left 2 ;total pulse charge
TEXT -6576 1536 Left 2 !.param Q -50p
TEXT -6904 1576 Left 2 ;detector capacitance
TEXT -6576 1576 Left 2 !.param C_PMT 200p
TEXT -7376 1952 Left 2 ;step voltage
TEXT -7200 1952 Left 2 !.param U Q/C_PMT
TEXT -6904 1624 Left 2 ;simulation length
* Z:\home\khalils\Downloads\files\data\raw_asc\7d420b0c4c4e_ID_vs_UGS-5.asc
* Generated by LTspice 26.0.1 for Windows.
* ID_vs_UGS-5
* Depletion mode P-channel MOSFET
M1 UDS UGS 0 0 PMOSDEP
V2 UGS 0
V1 UDS 0 -10V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 -2V 2V
.lib mosfet.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1292 680
WIRE -624 -176 -720 -176
WIRE -560 -176 -624 -176
WIRE -720 -128 -720 -176
WIRE -560 -80 -560 -176
WIRE -880 -48 -896 -48
WIRE -768 -48 -880 -48
WIRE -896 -32 -896 -48
WIRE -896 64 -896 48
WIRE -720 64 -720 -32
WIRE -560 64 -560 0
SYMBOL voltage -560 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 36 82 Left 2
SYMATTR InstName V1
SYMATTR Value -10V
SYMBOL pmos -768 -128 R0
SYMATTR InstName M1
SYMATTR Value PMOSDEP
SYMBOL voltage -896 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 53 Left 2
WINDOW 3 -97 181 Left 2
WINDOW 0 35 44 Left 2
SYMATTR Value ""
SYMATTR InstName V2
FLAG -560 64 0
FLAG -896 64 0
FLAG -720 64 0
FLAG -880 -48 UGS
FLAG -624 -176 UDS
TEXT -904 96 Left 2 !.dc V2 -2V 2V
TEXT -896 -168 Left 2 ;ID_vs_UGS-5
TEXT -904 112 Left 2 !.lib mosfet.lib
TEXT -920 -208 Left 2 ;Depletion mode P-channel MOSFET
* Z:\home\khalils\Downloads\files\data\raw_asc\1a05d3367533_Howland_Improved.asc
* Generated by LTspice 26.0.1 for Windows.
* changed U1 val to ADA4522
* U1 to OPA2188
;.ac dec 3m 1 1MEG
R5 N002 N004 {R2}
R1 N002 N001 {R}
R4 N003 IN {R}
V2 -V 0 -15
R3 N004 N003 {R}
R2 N001 0 {R}
Rload N004 0 {x}
V1 +V 0 +15
C1 N002 N001 1p
XU1 N003 N001 +V -V N002 ADA4522 ;pnba In+)In-)V+)V-)OUT
V3 IN 0 SINE(0 1 1K) AC 1
.tran 3m
.step param X list 1 10 100 1K 10K 100K
.param R=100k
.param R2=1k
.inc ..\..\..\..\lib\spice\ADA4522.cir
.lib ..\..\..\..\lib\spice\OPA2188_TINA_AIO\OPA2188.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1280 728
WIRE 208 48 144 48
WIRE 352 48 272 48
WIRE -880 128 -880 112
WIRE -752 128 -752 112
WIRE 32 160 -48 160
WIRE 144 160 144 48
WIRE 144 160 112 160
WIRE 192 160 144 160
WIRE 352 160 352 48
WIRE 352 160 272 160
WIRE 416 160 352 160
WIRE -880 224 -880 208
WIRE -752 224 -752 208
WIRE 144 256 144 160
WIRE 160 256 144 256
WIRE 416 272 416 160
WIRE 416 272 224 272
WIRE 160 288 144 288
WIRE -128 368 -128 352
WIRE 16 368 -128 368
WIRE 144 368 144 288
WIRE 144 368 96 368
WIRE 192 368 144 368
WIRE 288 368 272 368
WIRE 304 368 288 368
WIRE 416 368 416 272
WIRE 416 368 384 368
WIRE -128 464 -128 448
WIRE 288 496 288 368
WIRE 544 496 288 496
WIRE 656 496 624 496
SYMBOL res 128 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R}
SYMBOL Opamps\\opamp2 192 208 R0
SYMATTR InstName U1
SYMATTR Value ADA4522
SYMBOL voltage -128 352 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 288 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value {R}
SYMBOL res 400 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value {R2}
SYMBOL voltage -880 112 R0
SYMATTR InstName V1
SYMATTR Value +15
SYMBOL voltage -752 112 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 112 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value {R}
SYMBOL cap 272 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1p
SYMBOL res 528 512 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rload
SYMATTR Value {x}
SYMBOL res 288 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R}
FLAG -752 224 0
FLAG -880 224 0
FLAG 192 240 +V
FLAG -880 112 +V
FLAG -752 112 -V
FLAG 192 304 -V
FLAG -128 464 0
FLAG -128 352 IN
FLAG 656 496 0
FLAG -48 160 0
TEXT 832 272 Left 2 !.tran 3m
TEXT 832 304 Left 2 !.step param X list 1 10 100 1K 10K 100K
TEXT -368 80 Left 2 !.param R=100k
TEXT -368 128 Left 2 !.param R2=1k
TEXT 56 664 Left 2 !.inc ..\\..\\..\\..\\lib\\spice\\ADA4522.cir
TEXT 568 112 Left 2 !;.ac dec 3m 1 1MEG
TEXT 56 704 Left 2 !.lib ..\\..\\..\\..\\lib\\spice\\OPA2188_TINA_AIO\\OPA2188.lib
TEXT 448 664 Left 2 ;changed U1 val to ADA4522
TEXT 640 712 Left 2 ;U1 to OPA2188
* Z:\home\khalils\Downloads\files\data\raw_asc\1db2a9c6a30b_Comparador.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2, XU3, XU4 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
XU3 10 9 4 11 8 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
XU4 12 13 4 11 14 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
XU2 5 6 4 11 7 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
XU1 3 2 4 11 1 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 0 -16 0
WIRE 96 32 96 0
WIRE 96 32 48 32
WIRE 96 48 96 32
WIRE 64 64 -16 64
WIRE 192 80 128 80
WIRE 64 96 -16 96
WIRE 96 112 0 112
WIRE 48 128 48 32
WIRE 96 128 48 128
WIRE 96 144 96 128
WIRE 64 160 -16 160
WIRE 192 176 128 176
WIRE 64 192 -16 192
WIRE 0 208 0 112
WIRE 96 208 0 208
WIRE 48 224 48 128
WIRE 96 224 48 224
WIRE 96 240 96 224
WIRE 64 256 -16 256
WIRE 192 272 128 272
WIRE 64 288 -16 288
WIRE 0 304 0 208
WIRE 96 304 0 304
WIRE 48 320 48 224
WIRE 96 320 48 320
WIRE 96 336 96 320
WIRE 64 352 -16 352
WIRE 192 368 128 368
WIRE 64 384 -16 384
WIRE 0 416 0 304
WIRE 96 416 96 400
WIRE 96 416 0 416
WIRE 0 464 0 416
IOPIN 192 80 Out
IOPIN 192 176 Out
IOPIN 192 272 Out
IOPIN 192 368 Out
IOPIN -16 96 In
IOPIN -16 64 In
IOPIN -16 160 In
IOPIN -16 192 In
IOPIN -16 256 In
IOPIN -16 288 In
IOPIN -16 352 In
IOPIN -16 384 In
IOPIN -16 0 In
IOPIN 0 464 In
SYMBOL Opamps\\UniversalOpamp2 96 80 R0
SYMATTR InstName U1
SYMBOL Opamps\\UniversalOpamp2 96 176 R0
SYMATTR InstName U2
SYMBOL Opamps\\UniversalOpamp2 96 368 R0
SYMATTR InstName U4
SYMBOL Opamps\\UniversalOpamp2 96 272 R0
SYMATTR InstName U3
FLAG 192 80 1
FLAG 192 176 7
FLAG 192 272 8
FLAG 192 368 14
FLAG -16 96 3
FLAG -16 64 2
FLAG -16 160 6
FLAG -16 192 5
FLAG -16 256 9
FLAG -16 288 10
FLAG -16 352 13
FLAG -16 384 12
FLAG -16 0 4
FLAG 0 464 11
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7112-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7112-3.3.asy)
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=3.3 ;pnba Vin)Sense)EN)SS)Vout)GND
C2 N001 0 4.7n
V1 IN 0 4.3
C1 OUT 0 2.2 Rser=1.5m
Rload OUT 0 22
.tran 6m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 22
SYMBOL ADP7112-3.3 224 128 R0
SYMATTR InstName U1
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.3
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\tmp\asc_dec_bjh7r6w2\00e513e25640_SEMANAL1_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N003 N001 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R3 N002 N003 2533
R4 N004 N002 9k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 32 -48 32
WIRE 496 48 432 48
WIRE 368 64 320 64
WIRE 320 176 320 64
WIRE 320 176 256 176
WIRE 384 176 320 176
WIRE 496 176 496 48
WIRE 496 176 464 176
WIRE 576 176 496 176
WIRE 688 176 656 176
WIRE 768 176 688 176
WIRE 768 240 768 176
WIRE 320 272 320 176
WIRE 320 272 256 272
WIRE 688 304 688 176
WIRE 688 304 256 304
WIRE 768 336 768 320
SYMBOL opamp 400 112 M180
SYMATTR InstName U1
SYMBOL res 480 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2533
SYMBOL res 672 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 9k
FLAG 768 336 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8604.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8604.asy)
XU1 N003 SW OUT N002 RT FB TRSS PG N001 N001 0 LT8604C LT8604=1 DFN=1 VOUT33=0 ;pnba INTVCC)SW)Bias)BST)Rt)FB)TR/SS)PG)EN/UV)Vin)GND
R1 FB 0 301k
C1 OUT 0 22
L1 SW OUT 120 Rser=1
R3 OUT PG 100k
C3 N003 0 1
Rload OUT 0 50
R4 OUT FB 1.62Meg
C2 N002 SW 47n
R2 RT 0 110k
V1 N001 0 12
.tran 3m steady nodiscard
.lib LT8604C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1748 780
WIRE -32 48 -192 48
WIRE 16 48 -32 48
WIRE 368 48 304 48
WIRE 368 64 368 48
WIRE -192 128 -192 48
WIRE -32 144 -32 48
WIRE 16 144 -32 144
WIRE 336 144 304 144
WIRE 368 144 368 128
WIRE 368 144 336 144
WIRE 432 144 368 144
WIRE 528 144 512 144
WIRE 608 144 528 144
WIRE 800 144 608 144
WIRE 912 144 800 144
WIRE 944 144 912 144
WIRE 800 160 800 144
WIRE 944 160 944 144
WIRE 608 192 608 144
WIRE -64 240 -96 240
WIRE 16 240 0 240
WIRE 528 240 528 144
WIRE 528 240 304 240
WIRE 800 256 800 224
WIRE 944 256 944 240
WIRE -192 272 -192 208
WIRE 336 336 304 336
WIRE 608 336 608 272
WIRE 608 336 336 336
WIRE 608 352 608 336
WIRE -64 432 -112 432
WIRE 16 432 -64 432
WIRE 608 464 608 432
WIRE -48 528 -192 528
WIRE 16 528 -48 528
WIRE 336 528 304 528
WIRE 384 528 336 528
WIRE 528 528 528 240
WIRE 528 528 464 528
WIRE -192 576 -192 528
WIRE 160 624 160 576
WIRE -192 720 -192 656
SYMBOL res 480 512 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res -208 560 R0
SYMATTR InstName R2
SYMATTR Value 110k
SYMBOL cap 784 160 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL LT8604 160 240 R0
SYMATTR InstName U1
SYMBOL res 928 144 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL cap 0 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL ind 416 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 120
SYMATTR SpiceLine Rser=1
SYMBOL res 592 176 R0
SYMATTR InstName R4
SYMATTR Value 1.62Meg
SYMBOL res 592 336 R0
SYMATTR InstName R1
SYMATTR Value 301k
SYMBOL voltage -192 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 352 64 R0
SYMATTR InstName C2
SYMATTR Value 47n
FLAG 608 464 0
FLAG 800 256 0
FLAG 912 144 OUT
FLAG -192 720 0
FLAG -192 272 0
FLAG 336 528 PG
FLAG 336 336 FB
FLAG 336 144 SW
FLAG -48 528 RT
FLAG -64 432 TRSS
FLAG 160 624 0
FLAG 944 256 0
FLAG -96 240 0
TEXT 608 616 Left 2 !.tran 3m steady nodiscard
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1311.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
V3 N001 0 10
V4 N003 0 pulse(0 3.3 0 1u 1u 5m 10m)
R1 N002 0 300
C1 N002 0 35p
XU1 N003 N002 N001 -V 0 +V ADG1311 ;pnba IN)D)S)Vss)GND)Vdd
.tran 30m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1311.asy)
.lib ADG1311.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -112 -128 -112 -144
WIRE -416 -96 -416 -112
WIRE -304 -48 -320 -48
WIRE -208 -48 -224 -48
WIRE 48 -48 -16 -48
WIRE 144 -48 48 -48
WIRE 48 -16 48 -48
WIRE -416 0 -416 -16
WIRE 144 0 144 -48
WIRE -208 16 -272 16
WIRE 48 80 48 64
WIRE 144 80 144 64
WIRE -416 96 -416 80
WIRE -272 96 -272 16
WIRE -176 144 -176 128
WIRE -48 144 -48 128
WIRE -416 192 -416 176
WIRE -272 224 -272 176
FLAG -416 192 0
FLAG -416 0 0
FLAG -416 -112 +V
FLAG -416 80 -V
FLAG -320 -48 0
FLAG -176 144 -V
FLAG -112 -144 +V
FLAG -48 144 0
FLAG -272 224 0
FLAG 48 80 0
FLAG 144 80 0
SYMBOL voltage -416 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -416 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -208 -48 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL voltage -272 80 R0
WINDOW 3 19 116 Left 2
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMATTR InstName V4
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL cap 128 0 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL ADG1311 -112 0 R0
SYMATTR InstName U1
TEXT 32 160 Left 2 !.tran 30m