Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1174-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1174-3.3.asy)
XU1 OUT N003 N002 0 N001 IN IN IN LTC1174 top=51K bot=31.5K ;pnba FB)LBout)LBin)GND)SW)Vin)Ipgm)_SHDN
L1 N001 OUT 100 Rser=0.02 Rpar=5000
C1 OUT 0 100 Rser=0.02
Rload OUT 0 10
V1 IN 0 9
D1 0 N001 MBRS140
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100m startup
.lib LTC1174.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1584 1140
WIRE 448 480 320 480
WIRE 624 480 448 480
WIRE 320 496 320 480
WIRE 624 512 624 480
WIRE 448 560 448 480
WIRE 496 560 448 560
WIRE 816 560 752 560
WIRE 864 560 816 560
WIRE 976 560 944 560
WIRE 1072 560 976 560
WIRE 816 576 816 560
WIRE 1072 576 1072 560
WIRE 320 592 320 576
WIRE 496 624 480 624
WIRE 768 624 752 624
WIRE 816 656 816 640
WIRE 1072 672 1072 656
WIRE 448 688 448 560
WIRE 496 688 448 688
WIRE 976 688 976 560
WIRE 976 688 752 688
WIRE 976 704 976 688
WIRE 624 752 624 736
WIRE 976 784 976 768
SYMBOL PowerProducts\\LTC1174-3.3 624 624 R0
SYMATTR InstName U1
SYMBOL res 1056 560 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL VOLTAGE 320 480 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL IND 848 576 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL SCHOTTKY 800 640 M180
WINDOW 0 30 60 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL POLCAP 960 704 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
FLAG 1072 560 OUT
FLAG 976 784 0
FLAG 1072 672 0
FLAG 816 656 0
FLAG 624 752 0
FLAG 320 592 0
FLAG 320 480 IN
TEXT 704 792 Left 2 !.tran 100m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2d9e82ec2a5b_rf_det_out_amp_bodge_ac.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N003 N001 3v3 0 out level2 Avol=1Meg GBW=80Meg Slew=55Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
C1 N003 in 22n
R1 N001 3v3 10k
R2 out N001 100k
V1 in 0 PULSE(2.1 2 2u 1n 1n 500n 1u) AC 1
V2 3v3 0 3.3
R3 3v3 N003 10k
C2 out_filt 0 10p
R4 N003 0 20k
R5 N001 0 20k
R6 out_filt out 5.1k
C3 N002 N001 1p
* OPA358AIDCKR
.ac dec 1000 10k 1G
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 -144 256 -144
WIRE 432 -144 384 -144
WIRE 256 -48 256 -144
WIRE 256 -48 208 -48
WIRE 320 -48 256 -48
WIRE 448 -48 400 -48
WIRE -320 -32 -320 -48
WIRE 32 16 32 0
WIRE -320 64 -320 48
WIRE 304 80 304 64
WIRE 208 96 208 -48
WIRE 208 96 112 96
WIRE 272 96 208 96
WIRE 448 112 448 -48
WIRE 448 112 336 112
WIRE 528 112 448 112
WIRE 672 112 608 112
WIRE -64 128 -80 128
WIRE 32 128 32 96
WIRE 32 128 0 128
WIRE 272 128 32 128
WIRE 304 160 304 144
WIRE 672 160 672 112
WIRE 32 176 32 128
WIRE 112 176 112 96
WIRE 208 176 208 96
WIRE -80 192 -80 128
WIRE 672 240 672 224
WIRE 32 272 32 256
WIRE 80 272 32 272
WIRE 112 272 112 256
WIRE 112 272 80 272
WIRE 208 272 208 256
WIRE 80 288 80 272
WIRE -80 304 -80 272
FLAG 304 64 3v3
FLAG 304 160 0
FLAG 448 112 out
FLAG -80 128 in
FLAG -320 64 0
FLAG -320 -48 3v3
FLAG 32 0 3v3
FLAG 208 272 3v3
FLAG 672 240 0
FLAG 672 112 out_filt
FLAG 80 288 0
FLAG -80 304 0
SYMBOL OpAmps\\UniversalOpAmp2 304 112 R0
SYMATTR InstName U1
SYMATTR Value2 Avol=1Meg GBW=80Meg Slew=55Meg
SYMBOL cap 0 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL res 192 160 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 416 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL voltage -80 176 M0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value PULSE(2.1 2 2u 1n 1n 500n 1u)
SYMBOL voltage -320 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL res 16 0 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL cap 656 160 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL res 16 160 R0
SYMATTR InstName R4
SYMATTR Value 20k
SYMBOL res 96 160 R0
SYMATTR InstName R5
SYMATTR Value 20k
SYMBOL res 624 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 5.1k
SYMBOL cap 384 -160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1p
TEXT 472 -8 Left 2 ;OPA358AIDCKR
TEXT -468 364 Left 2 !.ac dec 1000 10k 1G
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3604.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3604.asy)
R1 OUT N004 180K
L1 N003 OUT 1
C3 OUT 0 47
Rload OUT 0 1.32
C2 OUT N004 22p
R2 N004 0 40K
C4 N001 0 2.2
XU1 N001 NC_01 N003 MP_02 MP_03 N002 N001 OUT 0 N001 N004 N001 NC_04 IN IN MP_05 0 LTC3604 ;pnba Mode/SYNC)Pgood)SW)))Boost)IntVcc)Von)SGND)Rt)FB)Ith)Track)Run)Vin))PGND
V1 IN 0 12
C1 N002 N003 .1
.tran .5m startup
.lib LTC3604.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 680
WIRE 480 -80 96 -80
WIRE 80 -64 -16 -64
WIRE 208 -64 80 -64
WIRE 608 -64 304 -64
WIRE -16 -48 -16 -64
WIRE 208 -48 208 -64
WIRE 304 -48 304 -64
WIRE 480 0 480 -80
WIRE 480 0 400 0
WIRE 496 0 480 0
WIRE 576 0 560 0
WIRE -16 48 -16 32
WIRE 80 112 80 -64
WIRE 112 112 80 112
WIRE 432 112 400 112
WIRE 432 144 432 112
WIRE 96 224 96 -80
WIRE 112 224 96 224
WIRE 432 224 432 208
WIRE 432 224 400 224
WIRE 496 224 432 224
WIRE 608 224 608 -64
WIRE 608 224 576 224
WIRE 720 224 608 224
WIRE 800 224 720 224
WIRE 880 224 800 224
WIRE 608 240 608 224
WIRE 800 240 800 224
WIRE 880 240 880 224
WIRE 720 256 720 224
WIRE 96 336 96 224
WIRE 112 336 96 336
WIRE 608 336 608 320
WIRE 608 336 400 336
WIRE 720 336 720 320
WIRE 720 336 608 336
WIRE 800 336 800 304
WIRE 880 336 880 320
WIRE 608 352 608 336
WIRE 480 448 480 0
WIRE 480 448 400 448
WIRE 608 448 608 432
WIRE 208 512 208 496
WIRE 304 512 304 496
SYMBOL ind 480 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL res 592 336 R0
SYMATTR InstName R2
SYMATTR Value 40K
SYMBOL cap 784 240 R0
SYMATTR InstName C3
SYMATTR Value 47
SYMBOL PowerProducts\\LTC3604 256 224 R0
SYMATTR InstName U1
SYMBOL cap 704 256 R0
SYMATTR InstName C2
SYMATTR Value 22p
SYMBOL res 592 224 R0
SYMATTR InstName R1
SYMATTR Value 180K
SYMBOL res 864 224 R0
SYMATTR InstName Rload
SYMATTR Value 1.32
SYMBOL voltage -16 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 416 144 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL cap 496 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C4
SYMATTR Value 2.2
FLAG 208 512 0
FLAG 304 512 0
FLAG 608 448 0
FLAG 880 336 0
FLAG 800 336 0
FLAG -16 48 0
FLAG -16 -64 IN
FLAG 880 224 OUT
FLAG 576 0 0
TEXT 752 432 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1799.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1799.asy)
V1 N001 0 3
R1 N001 N002 10K
XU1 N001 0 N002 0 OUT LTC1799 ;pnba V+)GND)SET)DIV)OUT
.tran 10u
.lib LTC1799.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 80 -112 80
WIRE 96 80 -16 80
WIRE 352 80 320 80
WIRE -112 96 -112 80
WIRE -16 112 -16 80
WIRE 96 160 80 160
WIRE -112 192 -112 176
WIRE -16 240 -16 192
WIRE 96 240 -16 240
WIRE 336 240 320 240
SYMBOL SpecialFunctions\\LTC1799 208 160 R0
SYMATTR InstName U1
SYMBOL voltage -112 80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res -32 96 R0
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 80 160 0
FLAG 336 240 0
FLAG -112 192 0
FLAG 352 80 OUT
TEXT 408 256 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6404-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6404-1.asy)
C1 N006 0 .1
V2 N003 0 3.3
V1 N004 0 SINE(0 10m 10Meg)
R4 N008 0 93.1
R1 N002 N001 100
R3 N001 N004 93.1
R2 N009 N008 100
XU1 N008 N006 N003 N009 N002 0 N003 N001 N005 N007 LTC6404-1 ;pnba IN-)Vocm)V+)OUT+)OUT-)V-)_SHDN)IN+)OUTF-)OUTF+
.tran 1u
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 732
WIRE 208 -48 32 -48
WIRE 416 -48 288 -48
WIRE 192 32 128 32
WIRE 528 32 192 32
WIRE 128 48 128 32
WIRE 192 48 192 32
WIRE 528 48 528 32
WIRE 416 96 416 -48
WIRE 416 96 384 96
WIRE -320 144 -384 144
WIRE -144 144 -240 144
WIRE 32 144 32 -48
WIRE 32 144 -64 144
WIRE 80 144 32 144
WIRE 528 144 528 128
WIRE 416 160 384 160
WIRE -16 192 -32 192
WIRE 80 192 48 192
WIRE 416 224 384 224
WIRE -144 240 -192 240
WIRE 32 240 -64 240
WIRE 80 240 32 240
WIRE 416 288 384 288
WIRE 192 368 192 336
WIRE 32 432 32 240
WIRE 208 432 32 432
WIRE 416 432 416 288
WIRE 416 432 288 432
SYMBOL voltage 528 32 R0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL opamps\\LTC6404-1 208 192 R0
SYMATTR InstName U1
SYMBOL voltage -224 144 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 32 56 VTop 2
WINDOW 39 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10m 10Meg)
SYMBOL cap 48 176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL res -48 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 93.1
SYMBOL res -48 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 93.1
SYMBOL res 304 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 304 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100
FLAG -32 192 0
FLAG -384 144 0
FLAG 528 144 0
FLAG -192 240 0
FLAG 192 368 0
TEXT 448 344 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\139cfcbcee65_5.asc
* Generated by LTspice 26.0.1 for Windows.
R1 P001 P002 5
R2 N001 P001 60
V1 N001 0 SINE(0 21.213 159.155)
L1 P002 0 1.25m
.tran 0 200m 0 10u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -1136 16 -1392 16
WIRE -1392 224 -1392 16
WIRE -1392 352 -1392 304
WIRE -1136 352 -1136 256
WIRE -1136 352 -1392 352
WIRE -1392 400 -1392 352
SYMBOL res -1152 0 R0
SYMATTR InstName R2
SYMATTR Value 60
SYMBOL voltage -1392 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 21.213 159.155)
SYMBOL res -1152 80 R0
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL ind -1152 160 R0
SYMATTR InstName L1
SYMATTR Value 1.25m
FLAG -1392 400 0
TEXT -1426 424 Left 2 !.tran 0 200m 0 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5673R.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5673R.asy)
XU2 vDAC Vdd 0 vOUT AD5673R Gain=2 ;pnba Vdac)Vdd)GND)Vout
RLOAD vOUT 0 1k
V1 Vdd 0 5
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
CLOAD vOUT 0 10n
.tran 50u
.lib AD5673R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 112 112 0 112
WIRE 192 112 112 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL AD5673R -208 112 R0
SYMATTR InstName U2
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -240 -80 Vdd
TEXT -160 312 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7104-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7104-3.3.asy)
C1 OUT 0 2.2 Rser=1.5m
R1 OUT N001 100k
XU1 IN OUT IN N001 OUT 0 ADP7104-3.3 ;pnba Vin)Sense)EN)PG)Vout)GND
V1 IN 0 PWL(0 0 20u 4.3)
Rload OUT 0 10
.tran 3m
.lib ADP7104-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -144 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -144 48 -144 32
WIRE 384 128 352 128
WIRE 464 128 464 32
WIRE 464 128 384 128
WIRE 560 128 464 128
WIRE -144 144 -144 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 384 224 384 128
WIRE 384 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
SYMBOL ADP7104-3.3 224 128 R0
SYMATTR InstName U1
SYMBOL voltage -144 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 20u 4.3)
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
FLAG 224 304 0
FLAG -144 144 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -144 32 IN
FLAG 560 128 OUT
TEXT 432 296 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\238c8c5879b3_2.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 vout D
R1 vout N003 1000
V3 N003 0 -5
V1 N001 0 -5
D2 N002 vout D
V2 N002 0 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 -128 32 -128
WIRE 272 -128 240 -128
WIRE 272 -32 272 -128
WIRE 384 -32 272 -32
WIRE 512 -32 384 -32
WIRE 384 -16 384 -32
WIRE 176 64 128 64
WIRE 272 64 272 -32
WIRE 272 64 240 64
WIRE 32 80 32 -128
WIRE 128 80 128 64
WIRE 384 80 384 64
WIRE 32 208 32 160
WIRE 128 208 128 160
WIRE 384 208 384 160
IOPIN 512 -32 Out
SYMBOL voltage 32 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -5
SYMBOL diode 176 -144 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL voltage 128 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL res 368 -32 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL voltage 384 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL diode 176 48 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
FLAG 32 208 0
FLAG 128 208 0
FLAG 384 208 0
FLAG 512 -32 vout
TEXT -2 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\1a0b1c811488_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
C1 0 N002 10n
V1 N001 0 9 Rser=0
V2 N004 0 VIN_BIAS
R1 N001 N002 100
Q1 N002 N003 0 0 BFR182
V3 N003 N004 PULSE(0 VIN_STEP 1n 1n 1n 800n 1u)
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 -96 32 -96
WIRE 256 -64 256 -96
WIRE 32 16 32 -16
WIRE 256 64 256 16
WIRE 336 64 256 64
WIRE 480 64 400 64
WIRE 480 96 480 64
WIRE 256 112 256 64
WIRE 192 160 -112 160
WIRE -112 192 -112 160
WIRE 256 256 256 208
WIRE -112 304 -112 272
WIRE -112 432 -112 384
SYMBOL voltage -112 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value VIN_BIAS
SYMBOL voltage 32 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 2
SYMATTR InstName V1
SYMATTR Value 9
SYMATTR SpiceLine Rser=0
SYMBOL res 240 -80 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL cap 400 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL voltage -112 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 VIN_STEP 1n 1n 1n 800n 1u)
SYMBOL npn 192 112 R0
SYMATTR InstName Q1
SYMATTR Value BFR182
FLAG 256 256 0
FLAG 480 96 0
FLAG 32 16 0
FLAG -112 432 0
* Z:\home\khalils\Downloads\files\data\raw_asc\03727c2fc693_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX4163.asy)
R3 VBAT N002 10k
V2 VBAT 0 PULSE(4.2 3 1 0.2 0.2 1)
R2 1.65V 0 10k
R1 3v3 1.65V 10k
XU2 N002 1.65V 3v3 0 N001 MAX4163 ;pnba In+)In-)V+)V-)OUT
R5 N001 N002 300k
V1 3v3 0 3.3
R4 N002 0 9.1k
.tran 15
.lib MAX4163.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1260 680
WIRE 688 -80 688 -144
WIRE 928 -80 928 -144
WIRE 688 48 688 0
WIRE 928 48 928 0
WIRE -32 64 -32 16
WIRE 272 112 272 32
WIRE 240 128 128 128
WIRE 368 144 304 144
WIRE 576 144 368 144
WIRE -32 160 -32 144
WIRE 192 160 -32 160
WIRE 240 160 192 160
WIRE 896 176 896 128
WIRE -32 192 -32 160
WIRE 272 272 272 176
WIRE 896 272 896 256
WIRE 1024 272 896 272
WIRE -32 304 -32 272
WIRE 896 304 896 272
WIRE 192 368 192 160
WIRE 224 368 192 368
WIRE 368 368 368 144
WIRE 368 368 304 368
WIRE 896 416 896 384
SYMBOL voltage 688 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL OpAmps\\MAX4163 272 80 R0
SYMATTR InstName U2
SYMBOL voltage 928 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(4.2 3 1 0.2 0.2 1)
SYMBOL res -48 176 R0
SYMATTR InstName R4
SYMATTR Value 9.1k
SYMBOL res 880 288 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res -48 48 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 880 160 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 320 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 300k
FLAG 688 48 0
FLAG 688 -144 3v3
FLAG 272 32 3v3
FLAG 272 272 0
FLAG 928 48 0
FLAG 928 -144 VBAT
FLAG 896 416 0
FLAG 896 128 3v3
FLAG 1024 272 1.65V
FLAG 128 128 1.65V
FLAG -32 304 0
FLAG -32 16 VBAT
TEXT 64 296 Left 2 !.tran 15
* Z:\home\khalils\Downloads\files\data\raw_asc\988395ac13a1_Assignment_4b__ii_.asc
* Generated by LTspice 26.0.1 for Windows.
* Full Wave Rectifier (Diode Bridge) (Practical)
D4 N003 N002 1N4148
D1 0 N001 1N4148
D2 N003 0 1N4148
D3 N002 N001 1N4148
R1 N001 N003 1000
V1 0 N002 SINE(0 10 1000) Rser=0.001
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 448 64 144 64
WIRE 144 80 144 64
WIRE 144 80 -16 80
WIRE 304 80 144 80
WIRE 304 112 304 80
WIRE -16 128 -16 80
WIRE 448 192 448 64
WIRE -16 240 -16 192
WIRE 64 240 -16 240
WIRE 144 240 64 240
WIRE 304 240 304 176
WIRE 304 240 224 240
WIRE 64 272 64 240
WIRE 304 272 304 240
WIRE -16 288 -16 240
WIRE -16 384 -16 352
WIRE 144 384 -16 384
WIRE 304 384 304 336
WIRE 304 384 144 384
WIRE 144 400 144 384
WIRE 448 400 448 272
WIRE 448 400 144 400
SYMBOL diode 0 352 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL diode 320 336 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL voltage 128 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 -60 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10 1000)
SYMATTR SpiceLine Rser=0.001
SYMBOL diode 0 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 432 176 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL diode 320 176 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value 1N4148
FLAG 64 272 0
TEXT -16 424 Left 2 !.tran 5ms
TEXT -40 24 Left 2 ;Full Wave Rectifier (Diode Bridge) (Practical)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3612.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3612.asy)
V1 IN 0 3.6
R2 N002 0 210K
R1 OUT N002 665K
Rload OUT 0 .82
C1 OUT 0 47 Rser=2m
XU1 0 IN 0 MP_01 MP_02 MP_03 MP_04 IN MP_05 MP_06 N001 MP_07 IN IN IN NC_08 0 N002 IN IN 0 LTC3612 ;pnba DDR)Rt/Sync)SGND)))))PVin)))SW))PVin_drv)SVin)Run)Pgood)Mode)FB)Ith)Trk/SS)PGND
L1 N001 OUT .56 Rpar=5K
.tran 1.2m startup
.lib LTC3612.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 -96 -96 -96
WIRE 160 -96 0 -96
WIRE 288 -96 160 -96
WIRE 400 -96 288 -96
WIRE -96 -80 -96 -96
WIRE 160 -80 160 -96
WIRE 288 -80 288 -96
WIRE 64 -16 48 -16
WIRE 400 -16 400 -96
WIRE 400 -16 384 -16
WIRE -96 16 -96 0
WIRE 432 96 384 96
WIRE 544 96 512 96
WIRE 672 96 544 96
WIRE 752 96 672 96
WIRE 544 112 544 96
WIRE 672 112 672 96
WIRE 752 112 752 96
WIRE 0 208 0 -96
WIRE 64 208 0 208
WIRE 544 208 544 192
WIRE 544 208 384 208
WIRE 672 208 672 176
WIRE 752 208 752 192
WIRE 544 224 544 208
WIRE 64 320 48 320
WIRE 400 320 400 -16
WIRE 400 320 384 320
WIRE 544 320 544 304
WIRE 0 432 0 208
WIRE 64 432 0 432
WIRE 400 432 400 320
WIRE 400 432 384 432
WIRE 160 512 160 496
WIRE 288 512 288 496
SYMBOL voltage -96 -96 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL PowerProducts\\LTC3612 224 208 R0
SYMATTR InstName U1
SYMBOL res 528 208 R0
SYMATTR InstName R2
SYMATTR Value 210K
SYMBOL ind 416 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value .56
SYMATTR SpiceLine Rpar=5K
SYMBOL res 736 96 R0
SYMATTR InstName Rload
SYMATTR Value .82
SYMBOL cap 656 112 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMATTR SpiceLine Rser=2m
SYMBOL res 528 96 R0
SYMATTR InstName R1
SYMATTR Value 665K
FLAG 48 -16 0
FLAG 48 320 0
FLAG 160 512 0
FLAG 288 512 0
FLAG 672 208 0
FLAG 544 320 0
FLAG 752 208 0
FLAG 752 96 OUT
FLAG -96 -96 IN
FLAG -96 16 0
TEXT 520 424 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8032.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8032.asy)
R2 OUT N001 10K
V1 +V 0 5
Vin IN 0 SINE(0 1 100K)
V2 -V 0 -5
XU1 IN N001 +V -V OUT AD8031 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 10K
.tran 100u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 192 -1136 192 -1152
WIRE 320 -1136 320 -1152
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 704 -1104 640 -1104
WIRE 544 -1088 464 -1088
WIRE 464 -1072 464 -1088
WIRE 192 -1040 192 -1056
WIRE 320 -1040 320 -1056
WIRE 464 -976 464 -992
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 464 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100K)
SYMBOL opamps\\AD8032 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 320 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 192 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 192 -1152 +V
FLAG 464 -976 0
FLAG 704 -1104 OUT
FLAG 464 -1088 IN
FLAG 576 -1136 +V
FLAG 320 -1152 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 320 -1040 0
FLAG 192 -1040 0
TEXT 720 -984 Left 2 !.tran 100u