Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\0c99d03324a8_Transmission_gate_vani_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V2 clock 0 PULSE(0 1 0 1p 1p 1m 2m)
M1 out clock_bar N001 N002 PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1052 680
WIRE 720 -192 672 -192
WIRE 608 -144 528 -144
WIRE 672 -144 672 -192
WIRE 672 -144 608 -144
WIRE 528 -128 528 -144
WIRE 672 -16 672 -144
WIRE 720 -16 672 -16
WIRE 176 144 112 144
WIRE 224 144 192 144
WIRE 352 144 272 144
WIRE 112 224 112 144
WIRE 112 224 16 224
WIRE 352 224 352 144
WIRE 448 224 352 224
WIRE 112 304 112 224
WIRE 352 304 352 224
SYMBOL voltage 528 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 0 1p 1p 1m 2m)
SYMBOL pmos4 272 96 R90
SYMATTR InstName M1
FLAG 528 -48 0
FLAG 608 -144 clock
FLAG 192 96 clock_bar
FLAG 448 224 out
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3568.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3568.asy)
R4 IN N002 100K
C1 OUT 0 100 Rser=10m
R1 OUT N003 412K
Rload OUT 0 1
C2 N005 0 1000p Rser=13K
C3 OUT N003 47p
R2 N003 0 332K
V1 IN 0 5
L1 N001 OUT 1.7
R3 N004 0 324K
XU1 N004 IN 0 N001 0 IN IN N002 N003 N005 LTC3568 ;pnba SHDN/Rt)Mode)SGND)SW)PGND)PVin)SVin)Pgood)FB)Ith
.tran 1m startup
.lib LTC3568.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2460 1748
WIRE 1456 1280 1360 1280
WIRE 1520 1280 1456 1280
WIRE 1648 1280 1520 1280
WIRE 1776 1280 1648 1280
WIRE 1360 1296 1360 1280
WIRE 1648 1296 1648 1280
WIRE 1776 1296 1776 1280
WIRE 1936 1344 1904 1344
WIRE 2048 1344 2016 1344
WIRE 2144 1344 2048 1344
WIRE 2240 1344 2144 1344
WIRE 2336 1344 2240 1344
WIRE 1456 1360 1456 1280
WIRE 2048 1360 2048 1344
WIRE 2144 1360 2144 1344
WIRE 2240 1360 2240 1344
WIRE 2336 1360 2336 1344
WIRE 1520 1376 1520 1280
WIRE 1552 1376 1520 1376
WIRE 1904 1376 1904 1344
WIRE 1904 1376 1872 1376
WIRE 1360 1392 1360 1376
WIRE 1456 1456 1456 1440
WIRE 1552 1456 1456 1456
WIRE 2048 1456 2048 1440
WIRE 2048 1456 1872 1456
WIRE 2144 1456 2144 1424
WIRE 2144 1456 2048 1456
WIRE 2240 1456 2240 1424
WIRE 2336 1456 2336 1440
WIRE 2048 1472 2048 1456
WIRE 1552 1536 1456 1536
WIRE 1904 1536 1872 1536
WIRE 1456 1552 1456 1536
WIRE 1904 1568 1904 1536
WIRE 2048 1568 2048 1552
WIRE 1456 1648 1456 1632
WIRE 1648 1648 1648 1616
WIRE 1776 1648 1776 1616
WIRE 1904 1648 1904 1632
SYMBOL res 2032 1456 R0
SYMATTR InstName R2
SYMATTR Value 332K
SYMBOL cap 1888 1568 R0
WINDOW 3 36 34 Left 2
WINDOW 39 26 58 Left 2
SYMATTR Value 1000p
SYMATTR SpiceLine Rser=13K
SYMATTR InstName C2
SYMBOL res 1440 1344 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL PowerProducts\\LTC3568 1712 1456 R0
SYMATTR InstName U1
SYMBOL cap 2128 1360 R0
SYMATTR InstName C3
SYMATTR Value 47p
SYMBOL RES 2032 1344 R0
SYMATTR InstName R1
SYMATTR Value 412K
SYMBOL res 1440 1536 R0
SYMATTR InstName R3
SYMATTR Value 324K
SYMBOL VOLTAGE 1360 1280 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 1920 1360 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.7
SYMBOL res 2320 1344 R0
SYMATTR InstName Rload
SYMATTR Value 1
SYMBOL cap 2224 1360 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=10m
FLAG 1776 1648 0
FLAG 1648 1648 0
FLAG 1360 1392 0
FLAG 1456 1648 0
FLAG 2336 1456 0
FLAG 2048 1568 0
FLAG 2240 1456 0
FLAG 1904 1648 0
FLAG 2336 1344 OUT
FLAG 1360 1280 IN
TEXT 2088 1632 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2747d2ebd3a5_2q_2LedConstCorr.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N004 N005 QTLP690C
R4 N001 N002 10K
R2 N002 0 100
Vcc N003 0 30
Q2 N006 N005 N001 0 2N3906
R3 N005 N006 15K
RLoad N004 N003 {val}
Q1 N005 N006 N002 0 2N3904
D2 N006 0 QTLP690C
R1 N004 N001 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1m
.step param val 50 1.25k 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -160 160 -160 96
WIRE -160 256 -160 240
WIRE -96 96 -160 96
WIRE 48 96 -16 96
WIRE 48 208 48 96
WIRE 80 208 48 208
WIRE 96 96 48 96
WIRE 192 208 160 208
WIRE 192 208 192 64
WIRE 224 208 192 208
WIRE 272 96 160 96
WIRE 272 144 272 96
WIRE 320 64 192 64
WIRE 352 96 272 96
WIRE 352 112 352 96
WIRE 352 208 320 208
WIRE 352 208 352 192
WIRE 400 96 352 96
WIRE 400 112 400 96
WIRE 448 208 352 208
WIRE 448 208 448 176
WIRE 528 64 400 64
WIRE 528 112 496 112
WIRE 528 112 528 64
WIRE 544 112 528 112
WIRE 560 208 448 208
WIRE 656 112 624 112
WIRE 656 208 624 208
WIRE 656 208 656 112
WIRE 656 256 -160 256
WIRE 656 256 656 208
WIRE 656 272 656 256
SYMBOL npn2 400 176 R270
WINDOW 0 35 33 VRight 0
WINDOW 3 71 6 VRight 0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 528 128 R270
WINDOW 0 -23 10 VTop 0
WINDOW 3 5 106 VBottom 0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL res 0 80 R90
WINDOW 0 15 126 VBottom 0
WINDOW 3 -11 8 VTop 0
SYMATTR InstName RLoad
SYMATTR Value {val}
SYMBOL LED 96 112 R270
WINDOW 0 16 -25 VTop 0
WINDOW 3 -2 22 VBottom 0
SYMATTR InstName D1
SYMATTR Value QTLP690C
SYMBOL voltage -160 144 R0
WINDOW 0 81 63 Right 0
WINDOW 3 -12 62 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vcc
SYMATTR Value 30
SYMBOL res 64 224 R270
WINDOW 0 -17 2 VTop 0
WINDOW 3 11 113 VBottom 0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL pnp2 320 144 R90
WINDOW 0 36 32 VRight 0
WINDOW 3 70 5 VRight 0
SYMATTR InstName Q2
SYMATTR Value 2N3906
SYMBOL res 304 80 R270
WINDOW 0 16 -17 VTop 0
WINDOW 3 42 118 VBottom 0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 336 96 R0
SYMATTR InstName R3
SYMATTR Value 15K
SYMBOL LED 560 224 R270
WINDOW 0 -25 -48 VTop 0
WINDOW 3 2 32 VBottom 0
SYMATTR InstName D2
SYMATTR Value QTLP690C
FLAG 656 272 0
TEXT -162 274 Left 0 !.tran 1m
TEXT -24 272 Left 0 !.step param val 50 1.25k 100
* Z:\home\khalils\Downloads\files\data\raw_asc\28e09038af56_meros_1o__e_.asc
* Generated by LTspice 26.0.1 for Windows.
I2 vdd N001 1m
Q5 N001 N001 0 0 2N3904
V2 vout 0 AC 1
Q4 vout N001 0 0 2N3904
V1 vdd 0 10
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc dec V2 1 9 0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 992 680
WIRE 96 64 96 32
WIRE 752 144 752 48
WIRE 912 144 912 48
WIRE 96 208 96 144
WIRE 192 208 96 208
WIRE 96 240 96 208
WIRE 320 240 320 32
WIRE 192 288 192 208
WIRE 192 288 160 288
WIRE 256 288 192 288
WIRE 752 384 752 224
WIRE 912 384 912 224
WIRE 96 432 96 336
WIRE 320 432 320 336
SYMBOL npn 160 240 M0
SYMATTR InstName Q5
SYMATTR Value 2N3904
SYMBOL npn 256 240 R0
SYMATTR InstName Q4
SYMATTR Value 2N3904
SYMBOL voltage 912 128 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V2
SYMATTR Value ""
SYMBOL voltage 752 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL current 96 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I2
SYMATTR Value 1m
FLAG 752 384 0
FLAG 912 384 0
FLAG 320 432 0
FLAG 96 432 0
FLAG 96 32 vdd
FLAG 752 48 vdd
FLAG 320 32 vout
FLAG 912 48 vout
TEXT 12 456 Left 2 !.dc dec V2 1 9 0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8676.asc
* Generated by LTspice 26.0.1 for Windows.
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
R2 OUT N001 10K
Rload OUT 0 10K
V1 +V 0 15
V2 -V 0 -15
XU1 IN N001 +V -V OUT AD8676 ;pnba In+)In-)V+)V-)OUT
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8676.asy)
.lib AD8676.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 112 -1136 112 -1152
WIRE 224 -1136 224 -1152
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 112 -1040 112 -1056
WIRE 224 -1040 224 -1056
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 112 -1152 +V
FLAG 112 -1040 0
FLAG 224 -1152 -V
FLAG 224 -1040 0
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 112 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 224 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL AD8676 576 -1168 R0
SYMATTR InstName U1
TEXT 736 -944 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\f33f03c8daf1_Draft10.asc
* Generated by LTspice 26.0.1 for Windows.
* waveform/linearity can be severely distorted if R4 and R5 are unmatched.\n but maybe a range issue.\n--\nDoes changing R6 affect CMRR?\n--\nwhat about a two stage level shift. eg. follow by ina154/amp03.\nissue is that it's incredibly sensitive. \n0.2V for 10R. == 20mV / 1R.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
;dc V1 0 10 0.01
V4 N002 0 100
R6 P001 0 75R
V3 0 VEE 15
R1 N001 N002 200k
VIN N003 N002 SINE(0 1 50)
XU1 N004 N001 VCC VEE VOUT LT1001 ;pnba In+)In-)V+)V-)OUT
R3 N004 N003 200k
R5 N001 P001 5k
R4 0 N004 5k
V2 VCC 0 15
R2 VOUT N001 200k
.tran 0.1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1460 680
WIRE 368 -32 320 -32
WIRE -192 80 -272 80
WIRE 288 80 160 80
WIRE 368 80 368 -32
WIRE 384 80 368 80
WIRE -272 96 -272 80
WIRE -192 96 -192 80
WIRE 448 96 448 -32
WIRE 560 96 448 96
WIRE 288 112 -48 112
WIRE 384 112 368 112
WIRE -48 128 -48 112
WIRE 160 208 160 80
WIRE 160 208 -48 208
WIRE 368 224 368 112
SYMBOL voltage -48 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value SINE(0 1 50)
SYMATTR InstName VIN
SYMBOL voltage -272 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL voltage -48 192 R0
WINDOW 0 -47 117 Left 2
WINDOW 3 -50 145 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 100
SYMBOL res 336 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 5k
SYMBOL res 384 64 R90
WINDOW 0 -23 59 VBottom 2
WINDOW 3 -25 66 VTop 2
SYMATTR InstName R1
SYMATTR Value 200k
SYMBOL res 464 -48 R90
WINDOW 0 -34 85 VBottom 2
WINDOW 3 -28 79 VTop 2
SYMATTR InstName R2
SYMATTR Value 200k
SYMBOL voltage -272 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 46 156 Left 2
SYMATTR Value 15
SYMATTR InstName V2
SYMBOL res 384 96 R90
WINDOW 0 53 57 VBottom 2
WINDOW 3 51 63 VTop 2
SYMATTR InstName R3
SYMATTR Value 200k
SYMBOL res 256 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 75R
SYMBOL OpAmps\\OP07 416 32 R0
WINDOW 0 40 50 Left 2
SYMATTR InstName U1
SYMBOL res 464 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 5k
FLAG -192 96 0
FLAG 560 96 VOUT
FLAG -48 288 0
FLAG 448 224 0
FLAG -272 0 VCC
FLAG 416 64 VCC
FLAG -272 176 VEE
FLAG 416 128 VEE
FLAG 160 -32 0
TEXT -48 88 Left 2 !;dc V1 0 10 0.01
TEXT -24 -136 Left 2 !.tran 0.1
TEXT 600 -56 Left 2 ;waveform/linearity can be severely distorted if R4 and R5 are unmatched.\n  but maybe a range issue.\n--\nDoes changing R6 affect CMRR?\n--\nwhat about a two stage level shift.   eg. follow by ina154/amp03.\nissue is that it's incredibly sensitive. \n0.2V for 10R. == 20mV / 1R.
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1761-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N004 0 1
C2 N003 0 10n
V1 IN 0 1.4
R2 N001 IN 50K
C3 N002 0 1
R1 OUT 0 1.5
C4 OUT 0 10
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1761 Radj=8K ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1761-1.2.asy)
.lib ADP1761.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.4
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value 1.5
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL ADP1761-1.2 224 176 R0
SYMATTR InstName U1
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2dc1dfb7be5a_1HalfRectirie.asc
* Generated by LTspice 26.0.1 for Windows.
* 1 Half Wave Rectifier
V1 N001 0 SINE(0 230 60)
R1 N002 0 1
D1 N001 N002 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 50m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 208 96 112 96
WIRE 368 96 272 96
WIRE 368 128 368 96
WIRE 112 144 112 96
WIRE 112 272 112 224
WIRE 368 272 368 208
SYMBOL diode 208 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL voltage 112 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 230 60)
SYMBOL res 352 112 R0
SYMATTR InstName R1
SYMATTR Value 1
FLAG 112 272 0
FLAG 368 272 0
TEXT -264 16 Left 2 ;1 Half Wave Rectifier
TEXT -264 296 Left 2 !.tran 50m
* Z:\home\khalils\Downloads\files\data\raw_asc\1f75870b366b_Avrager.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 input 2k
R3 vout N001 1k
V1 N003 0 -12
V3 input 0 SINE(0 1 1k) AC 1
XU1 0 N001 N002 N003 vout LM741/NS ;pnba In+)In-)V+)V-)OUT
V2 N002 0 12
R2 N001 input 2k
.include C:\Users\PRANAV ARYA\Documents\GitHub\ECN351-Lab\LM741.MOD
.tran 0 10m 0 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 -96 208 -96
WIRE -112 -16 -160 -16
WIRE 48 -16 -112 -16
WIRE 80 -16 48 -16
WIRE 272 0 272 -160
WIRE 160 16 160 -16
WIRE 208 16 208 -96
WIRE 208 16 160 16
WIRE 240 16 208 16
WIRE 352 32 304 32
WIRE 368 32 368 -96
WIRE 368 32 352 32
WIRE 48 48 48 -16
WIRE 80 48 48 48
WIRE 160 48 160 16
WIRE 240 48 224 48
WIRE -160 64 -160 -16
WIRE 272 160 272 64
WIRE 224 288 224 48
SYMBOL voltage 272 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -12
SYMBOL res 176 32 R90
WINDOW 0 -2 60 VBottom 2
WINDOW 3 45 55 VTop 2
SYMATTR InstName R1
SYMATTR Value 2k
SYMBOL res 176 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 -26 18 VTop 2
SYMATTR InstName R2
SYMATTR Value 2k
SYMBOL OpAmps\\opamp2 272 -32 R0
WINDOW 3 12 6 Left 2
SYMATTR Value LM741/NS
SYMATTR InstName U1
SYMBOL voltage -160 48 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1k)
SYMBOL voltage 272 -144 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL res 384 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 -26 18 VTop 2
SYMATTR InstName R3
SYMATTR Value 1k
FLAG 272 240 0
FLAG 272 -240 0
FLAG -160 144 0
FLAG 224 288 0
FLAG 352 32 vout
FLAG -112 -16 input
TEXT -192 472 Left 2 !.include C:\\Users\\PRANAV ARYA\\Documents\\GitHub\\ECN351-Lab\\LM741.MOD
TEXT 112 424 Left 2 !.tran 0 10m 0 1m
* Z:\tmp\asc_dec_bjh7r6w2\164fba9ca014_Mosfet_based_tonestack_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R17 N005 Vin2 38k
M1 Vd5 Vg5 Vs5 Vs5 BSB012N03LX3
R12 N005 N006 100k
C4 Vd5 N005 250p
R20 Vg5 N007 5k
C5 Vs5 N006 100n
J4 N001 N003 N004 J111
R15 Vs5 Vs6 250k
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2360 1096
WIRE -304 -656 -368 -656
WIRE -160 -656 -224 -656
WIRE -368 -576 -368 -656
WIRE -416 -512 -480 -512
WIRE -368 -400 -368 -480
WIRE -208 -400 -368 -400
WIRE -432 -64 -480 -64
WIRE -384 -64 -432 -64
WIRE -192 -64 -304 -64
WIRE -80 -64 -192 -64
WIRE 64 -64 -16 -64
WIRE -192 -16 -192 -64
WIRE -480 0 -480 -64
WIRE 64 32 64 -64
WIRE 128 32 64 32
WIRE 176 32 128 32
WIRE 272 32 176 32
WIRE 64 48 64 32
WIRE 176 48 176 32
WIRE -48 128 -80 128
WIRE 16 128 -48 128
WIRE 64 160 64 144
WIRE 144 160 64 160
WIRE 176 160 176 128
WIRE 176 160 144 160
WIRE -192 208 -192 64
WIRE -80 208 -192 208
WIRE 64 208 64 160
WIRE 64 208 -16 208
WIRE -464 240 -496 240
WIRE -352 240 -384 240
WIRE -496 304 -496 240
WIRE 64 320 64 208
WIRE 176 320 64 320
WIRE 64 368 64 320
WIRE 176 384 176 320
WIRE -496 432 -496 384
WIRE -32 448 -80 448
WIRE 16 448 -32 448
WIRE -192 512 -192 208
WIRE 64 512 64 464
WIRE 64 512 -16 512
WIRE 112 512 64 512
WIRE 176 512 176 464
WIRE 176 512 112 512
WIRE 64 656 64 512
WIRE 176 656 176 512
SYMBOL res -288 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R17
SYMATTR Value 38k
SYMBOL nmos 16 48 R0
SYMATTR InstName M1
SYMATTR Value BSB012N03LX3
SYMBOL res -208 -32 R0
SYMATTR InstName R12
SYMATTR Value 100k
SYMBOL cap -16 -80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 250p
SYMBOL res -368 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R20
SYMATTR Value 5k
SYMBOL cap -16 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 100n
SYMBOL njf -416 -576 R0
SYMATTR InstName J4
SYMATTR Value J111
SYMBOL res 160 368 R0
SYMATTR InstName R15
SYMATTR Value 250k
FLAG -560 -512 PotTreb
FLAG 144 160 Vs5
FLAG 112 512 Vs6
FLAG 128 32 Vd5
FLAG -48 128 Vg5
FLAG -32 448 Vg6
FLAG -480 80 0
FLAG -432 -64 Vin2
FLAG -352 240 Vg5
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1317.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1317.asy)
L1 IN N001 10 Rser=0.02 Rpar=5000
XU1 N004 N005 N002 0 N001 IN N006 N007 LT1317 ;pnba Vc)FB)_SHDN)GND)SW)Vin)LBI)LBO
Rload OUT 0 50
V1 IN 0 1.5
R3 N004 N003 33K
C2 OUT 0 33 Rser=0.02
R1 OUT N005 1Meg
D1 N001 OUT MBRS140
C3 N003 0 3300p
R2 N005 0 324K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m startup
.lib LT1317.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1652 960
WIRE 704 448 432 448
WIRE 768 448 704 448
WIRE 896 448 848 448
WIRE 944 448 896 448
WIRE 1072 448 1008 448
WIRE 1184 448 1072 448
WIRE 1280 448 1184 448
WIRE 432 464 432 448
WIRE 1280 464 1280 448
WIRE 1184 480 1184 448
WIRE 704 512 704 448
WIRE 1072 512 1072 448
WIRE 432 560 432 544
WIRE 1184 560 1184 544
WIRE 1280 560 1280 544
WIRE 560 576 544 576
WIRE 896 576 896 448
WIRE 896 576 848 576
WIRE 464 656 416 656
WIRE 560 656 544 656
WIRE 1072 656 1072 592
WIRE 1072 656 848 656
WIRE 416 672 416 656
WIRE 1072 672 1072 656
WIRE 560 736 544 736
WIRE 864 736 848 736
WIRE 416 752 416 736
WIRE 1072 768 1072 752
WIRE 704 816 704 800
SYMBOL VOLTAGE 432 448 R0
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL CAP 400 672 R0
SYMATTR InstName C3
SYMATTR Value 3300p
SYMBOL RES 1056 496 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL POLCAP 1168 480 R0
SYMATTR InstName C2
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02
SYMBOL res 1264 448 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL SCHOTTKY 944 464 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL IND 752 464 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL RES 560 640 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 33K
SYMBOL POWERPRODUCTS\\LT1317 704 656 R0
SYMATTR InstName U1
SYMBOL RES 1056 656 R0
SYMATTR InstName R2
SYMATTR Value 324K
FLAG 1184 560 0
FLAG 1072 768 0
FLAG 704 816 0
FLAG 432 560 0
FLAG 416 752 0
FLAG 1280 560 0
FLAG 1280 448 OUT
FLAG 432 448 IN
TEXT 1104 816 Left 2 !.tran 3m startup
* Z:\tmp\asc_dec_bjh7r6w2\0aea4f937c72_4.-_Buck_small_signal_-_CL_TF_-_option1_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
C1 out N002 {C}
R8 out N010 10k
R2 N002 N003 {rC}
Vref N008 0 5 AC 1
R6 N006 N005 1.81k
R9 0 N010 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1948 1164
WIRE 272 -208 224 -208
WIRE 416 -208 352 -208
WIRE 512 -208 416 -208
WIRE 560 -208 512 -208
WIRE 768 -208 560 -208
WIRE 416 -176 416 -208
WIRE 560 -96 560 -208
WIRE 416 -80 416 -112
WIRE 416 112 416 0
WIRE 560 112 560 -16
WIRE -368 336 -416 336
WIRE -208 336 -288 336
WIRE -80 336 -144 336
WIRE 848 400 576 400
WIRE -80 416 -80 336
WIRE -16 416 -80 416
WIRE -80 464 -80 416
WIRE -80 464 -304 464
WIRE 848 464 848 400
WIRE -416 480 -416 336
WIRE -416 480 -624 480
WIRE -368 480 -416 480
WIRE -144 496 -304 496
WIRE 464 512 464 432
WIRE 544 512 464 512
WIRE 608 512 544 512
WIRE 768 512 768 -208
WIRE 768 512 688 512
WIRE -144 544 -144 496
WIRE 544 576 544 512
WIRE 848 608 848 544
WIRE 544 704 544 656
SYMBOL cap 400 -176 R0
SYMATTR InstName C1
SYMATTR Value {C}
SYMBOL res 704 496 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R8
SYMATTR Value 10k
SYMBOL res 400 -96 R0
SYMATTR InstName R2
SYMATTR Value {rC}
SYMBOL voltage 848 448 M0
WINDOW 123 -84 65 Left 2
WINDOW 39 0 0 Left 0
WINDOW 0 -83 11 Left 2
WINDOW 3 -57 37 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName Vref
SYMATTR Value 5
SYMBOL res -272 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 1.81k
SYMBOL res 560 672 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R9
SYMATTR Value 10k
FLAG 512 -208 out
FLAG 848 608 0
FLAG 544 704 0
* Z:\home\khalils\Downloads\files\data\raw_asc\1555c9ae9d88_Prob_4c2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 0 Vgs 0.9
M1 Vds Vgs 0 0 pch_tt
V2 0 Vds 1.8V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.dc V2 0 1.8 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 144 -32 144
WIRE -32 160 -32 144
WIRE -32 160 -176 160
WIRE -176 176 -176 160
WIRE -32 176 -32 160
WIRE -352 256 -384 256
WIRE -224 256 -352 256
WIRE -352 272 -352 256
WIRE -176 288 -176 272
WIRE -32 288 -32 256
WIRE -352 368 -352 352
IOPIN -384 256 In
IOPIN 0 144 Out
SYMBOL pmos -224 176 R0
SYMATTR InstName M1
SYMATTR Value pch_tt
SYMBOL voltage -32 272 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.8V
SYMBOL voltage -352 368 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0.9
FLAG -352 368 0
FLAG -176 288 0
FLAG -32 288 0
FLAG -384 256 Vgs
FLAG 0 144 Vds
TEXT -464 184 Left 2 !.include TSMC180.lib
TEXT -464 216 Left 2 !.dc V2 0 1.8 0.01