Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\376b9ecb7caf_pi_simple_cargado.asc
* Generated by LTspice 26.0.1 for Windows.
#.net I(R2) V1
R1 vi 0 1
I1 0 vi 0 AC 1 0
C2 vi 0 {7/17/wo/Ro}
L4 vo vi {289/243/wo*Ro} Rser=0
C3 vo vi {27/289/wo/Ro}
C4 0 vo {27/17/wo/Ro}
.ac dec 1000 .1 10
.param wo=2*pi
.param Ro=1
.net V(vo) I1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 988 1328
WIRE 160 368 80 368
WIRE 304 368 224 368
WIRE -48 464 -144 464
WIRE 16 464 -48 464
WIRE 80 464 80 368
WIRE 80 464 16 464
WIRE 160 464 80 464
WIRE 304 464 304 368
WIRE 304 464 240 464
WIRE 368 464 304 464
WIRE -144 528 -144 464
WIRE -48 528 -48 464
WIRE 80 544 80 464
WIRE 304 544 304 464
WIRE -144 672 -144 608
WIRE -48 672 -48 608
WIRE 80 672 80 608
WIRE 304 672 304 608
SYMBOL cap 224 352 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value {27/289/wo/Ro}
SYMBOL cap 64 544 R0
SYMATTR InstName C2
SYMATTR Value {7/17/wo/Ro}
SYMBOL ind 256 448 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L4
SYMATTR Value {289/243/wo*Ro}
SYMATTR SpiceLine Rser=0
SYMBOL current -144 608 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Invisible 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 0
SYMATTR Value2 AC 1 0
SYMBOL res -64 512 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL cap 320 608 R180
WINDOW 0 -38 52 Left 2
WINDOW 3 -197 11 Left 2
SYMATTR InstName C4
SYMATTR Value {27/17/wo/Ro}
FLAG -144 672 0
FLAG 368 464 vo
FLAG -48 672 0
FLAG 80 672 0
FLAG 304 672 0
FLAG 16 464 vi
TEXT 8 800 Left 2 !#.net I(R2) V1
TEXT 8 760 Left 2 !.ac dec 1000 .1 10
TEXT 360 760 Left 2 !.param wo=2*pi
TEXT 360 792 Left 2 !.param Ro=1
TEXT 8 840 Left 2 !.net V(vo) I1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2908-B1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N003 0 PWL(0 0 1m 3.3)
V2 N002 0 PWL(0 0 1m 12)
R1 N010 N009 100K
V3 N010 0 5
R2 N002 N004 2.15Meg
R3 N004 0 100K
V4 N005 0 PWL(0 0 1m 2.5)
V5 N007 0 PWL(0 0 1m 1.8)
V6 N008 0 PWL(0 0 1m 1.5)
R4 N001 N006 124K
R5 N006 0 100K
V7 N001 0 PWL(0 0 1m 1.2)
XU1 0 N009 N008 N005 N003 N004 N007 N006 LTC2908-B1 ;pnba GND)_RST)V4)V2)V1)Vadj1)V3)Vadj2
.tran 300m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2908-B1.asy)
.lib LTC2908-B1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 940 680
WIRE 512 -16 -576 -16
WIRE -576 0 -576 -16
WIRE 320 48 -304 48
WIRE -304 64 -304 48
WIRE 320 80 320 48
WIRE -576 96 -576 80
WIRE 512 128 512 -16
WIRE -304 160 -304 144
WIRE 0 192 -784 192
WIRE 320 192 320 160
WIRE 320 192 288 192
WIRE 368 192 320 192
WIRE 464 192 448 192
WIRE -784 208 -784 192
WIRE 0 240 -512 240
WIRE 512 240 512 208
WIRE 512 240 288 240
WIRE 560 240 512 240
WIRE 656 240 640 240
WIRE -512 256 -512 240
WIRE 0 288 -256 288
WIRE -784 304 -784 288
WIRE -256 304 -256 288
WIRE 0 336 -16 336
WIRE 352 336 288 336
WIRE 512 336 432 336
WIRE -512 352 -512 336
WIRE 512 352 512 336
WIRE -16 384 -16 336
WIRE 144 384 144 368
WIRE -256 400 -256 384
WIRE 512 448 512 432
WIRE -16 480 -16 464
FLAG 144 384 0
FLAG -784 304 0
FLAG -304 160 0
FLAG 512 448 0
FLAG 464 192 0
FLAG -512 352 0
FLAG -256 400 0
FLAG -16 480 0
FLAG 656 240 0
FLAG -576 96 0
SYMBOL voltage -784 192 R0
WINDOW 0 23 24 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1m 3.3)
SYMBOL voltage -304 48 R0
WINDOW 3 27 89 Left 2
SYMATTR Value PWL(0 0 1m 12)
SYMATTR InstName V2
SYMBOL res 448 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL voltage 512 336 R0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 304 64 R0
SYMATTR InstName R2
SYMATTR Value 2.15Meg
SYMBOL res 352 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL voltage -512 240 R0
WINDOW 0 23 24 Left 2
SYMATTR InstName V4
SYMATTR Value PWL(0 0 1m 2.5)
SYMBOL voltage -256 288 R0
WINDOW 0 28 31 Left 2
SYMATTR InstName V5
SYMATTR Value PWL(0 0 1m 1.8)
SYMBOL voltage -16 368 R0
WINDOW 0 28 31 Left 2
WINDOW 3 24 99 Left 2
SYMATTR InstName V6
SYMATTR Value PWL(0 0 1m 1.5)
SYMBOL res 496 112 R0
SYMATTR InstName R4
SYMATTR Value 124K
SYMBOL res 544 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 100K
SYMBOL voltage -576 -16 R0
WINDOW 3 27 89 Left 2
SYMATTR Value PWL(0 0 1m 1.2)
SYMATTR InstName V7
SYMBOL LTC2908-B1 144 256 R0
SYMATTR InstName U1
TEXT 320 496 Left 2 !.tran 300m
* Z:\home\khalils\Downloads\files\data\raw_asc\0fd7fd881807_LTC6244.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6244.asy)
V1 +V 0 2.5
XU1 IN OUT +V -V OUT LTC6244 ;pnba IN+)IN-)VCC)VEE)OUT
V3 IN 0 PULSE(-1 1 0 1n 1n 10u 20u)
V2 -V 0 -2.5
.tran 100u
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 256 208 256
WIRE 208 336 208 256
WIRE 256 336 208 336
WIRE 384 352 384 256
WIRE 384 352 320 352
WIRE 416 352 384 352
WIRE 256 368 144 368
WIRE -80 384 -80 368
WIRE 32 384 32 368
WIRE 144 384 144 368
WIRE 288 400 288 384
WIRE -80 480 -80 464
WIRE 32 480 32 464
WIRE 144 480 144 464
SYMBOL voltage 144 368 R0
SYMATTR InstName V3
SYMATTR Value PULSE(-1 1 0 1n 1n 10u 20u)
SYMBOL voltage 32 368 R0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL voltage -80 368 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL LTC6244 288 352 R0
SYMATTR InstName U1
FLAG -80 480 0
FLAG 32 480 0
FLAG -80 368 +V
FLAG 144 480 0
FLAG 144 368 IN
FLAG 416 352 OUT
FLAG 288 320 +V
FLAG 32 368 -V
FLAG 288 400 -V
TEXT 384 560 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\5fe3bbe1638b_Draft5.asc
* Generated by LTspice 26.0.1 for Windows.
D 0 b D
R b a 220 tol=1 pwr=0.1
VE a 0 6.0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 64 80 64
WIRE 208 64 144 64
WIRE 352 64 288 64
WIRE 400 64 352 64
WIRE 80 144 80 64
WIRE 400 144 400 64
WIRE 400 224 400 208
WIRE 80 240 80 224
WIRE 400 240 400 224
WIRE 400 240 80 240
WIRE 80 256 80 240
SYMBOL res 304 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R
SYMATTR Value 220
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL diode 416 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D
SYMBOL voltage 80 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName E
SYMATTR Value 6.0
FLAG 80 256 0
FLAG 144 64 a
FLAG 352 64 b
FLAG 400 224 c
TEXT 46 280 Left 2 !.tran 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7157-03.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7157-03.asy)
R3 IN N001 100K
C3 OUT 0 10
C1 N004 0 1
R1 N003 N005 133k
XU1 OUT MP_01 OUT N002 N001 N005 N003 N004 IN 0 ADP7157-03 Vreg=3.211 Vref=1.216 ;pnba Vout))Vout_Sense)Byp)EN)Ref_Sense)Ref)Vreg)Vin)GND
R2 N005 0 100K
R4 OUT 0 2.8
V1 IN 0 3.5
C4 N003 0 1
C2 N002 0 1
.tran 5m startup
.lib ADP7157-03.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -144 32
WIRE 80 32 -32 32
WIRE 416 32 400 32
WIRE 464 32 416 32
WIRE 560 32 464 32
WIRE -144 48 -144 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE 416 128 416 32
WIRE 416 128 400 128
WIRE -144 144 -144 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE 0 224 -16 224
WIRE 80 224 64 224
WIRE 464 224 400 224
WIRE 560 224 464 224
WIRE 464 240 464 224
WIRE 560 240 560 224
WIRE 0 320 -16 320
WIRE 80 320 64 320
WIRE 416 320 400 320
WIRE 560 320 560 304
WIRE 416 336 416 320
WIRE 464 336 464 320
WIRE 464 336 416 336
WIRE 464 352 464 336
WIRE 240 400 240 384
WIRE 464 448 464 432
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 448 48 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res 448 224 R0
SYMATTR InstName R1
SYMATTR Value 133k
SYMBOL ADP7157-03 240 176 R0
SYMATTR InstName U1
SYMBOL res 544 32 R0
SYMATTR InstName R4
SYMATTR Value 2.8
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 544 240 R0
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL voltage -144 32 R0
SYMATTR InstName V1
SYMATTR Value 3.5
SYMBOL cap 64 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 448 336 R0
SYMATTR InstName R2
SYMATTR Value 100K
FLAG 240 400 0
FLAG 560 320 0
FLAG 464 144 0
FLAG -16 320 0
FLAG -16 224 0
FLAG -144 144 0
FLAG 560 144 0
FLAG 464 448 0
FLAG -144 32 IN
FLAG 560 32 OUT
TEXT 568 432 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\15f725891044_2021-02-24-opamp-passa-alto-1ordine.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP747.asy)
V1 N001 0 12V
V2 N004 0 AC 1
R1 0 N005 10k
XU1 N005 N003 N001 0 N002 OP747 ;pnba In+)In-)V+)V-)OUT
R2 N002 0 10k
C1 N005 N004 10nF
R4 0 N003 10K
R3 N002 N003 22K
.ac oct 100 1 100E4
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 128 336 128
WIRE 416 144 416 128
WIRE 400 240 368 240
WIRE 336 272 336 128
WIRE 288 288 288 240
WIRE 304 288 288 288
WIRE 400 304 400 240
WIRE 400 304 368 304
WIRE 544 304 400 304
WIRE 96 320 -32 320
WIRE 240 320 160 320
WIRE 304 320 240 320
WIRE 288 416 288 288
SYMBOL res 528 288 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 416 128 R0
SYMATTR InstName V1
SYMATTR Value 12V
SYMBOL voltage -32 304 R0
SYMATTR InstName V2
SYMATTR Value AC 1
SYMBOL res 256 416 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 384 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 22K
SYMBOL cap 160 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10nF
SYMBOL res 304 512 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL Opamps/OP747 336 240 R0
SYMATTR InstName U1
FLAG -32 400 0
FLAG 240 400 0
FLAG 336 336 0
FLAG 416 224 0
FLAG 544 384 0
FLAG 288 496 0
TEXT 448 480 Left 2 !.ac oct 100 1 100E4
* Z:\tmp\asc_dec_bjh7r6w2\0aa1b2797d27_AD8030_bias_current_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
Rf out N001 1Meg
V1 vcc 0 +15
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 -64 128 -64
WIRE 448 -64 400 -64
WIRE -128 -16 -128 -48
WIRE 352 48 352 32
WIRE 0 64 -16 64
WIRE 16 64 0 64
WIRE 288 64 240 64
WIRE 320 64 288 64
WIRE -128 80 -128 64
WIRE -128 80 -192 80
WIRE 448 80 448 -64
WIRE 448 80 384 80
WIRE 496 80 448 80
WIRE 512 80 496 80
WIRE -128 96 -128 80
WIRE 288 96 240 96
WIRE 320 96 288 96
WIRE -192 112 -192 80
WIRE -16 112 -16 64
WIRE 240 128 240 96
WIRE 352 128 352 112
SYMBOL res 416 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 45 VTop 2
SYMATTR InstName Rf
SYMATTR Value 1Meg
SYMBOL voltage -128 -32 R0
WINDOW 3 24 85 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value +15
SYMATTR InstName V1
FLAG -192 112 0
FLAG -128 -48 vcc
FLAG 0 64 in
FLAG 352 32 vcc
FLAG 496 80 out
FLAG 288 64 inm
FLAG 288 96 inp
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6085.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6085.asy)
XU1 0 N001 +V -V N002 LTC6085 ;pnba IN+)IN-)VCC)VEE)OUT
R1 N001 N003 1K
V2 N003 0 SINE(0 .2 1K)
R2 N002 N001 10K
V1 +V 0 2.5
V3 -V 0 -2.5
.tran 3m
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 80 112 80
WIRE 272 80 208 80
WIRE -320 144 -320 128
WIRE -208 144 -208 128
WIRE 208 160 208 144
WIRE 0 176 -48 176
WIRE 112 176 112 80
WIRE 112 176 80 176
WIRE 176 176 112 176
WIRE -48 192 -48 176
WIRE 272 192 272 80
WIRE 272 192 240 192
WIRE 176 208 144 208
WIRE -320 240 -320 224
WIRE -208 240 -208 224
WIRE 208 256 208 224
WIRE -48 288 -48 272
SYMBOL res 96 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -320 128 R0
WINDOW 3 26 96 Left 2
SYMATTR Value 2.5
SYMATTR InstName V1
SYMBOL voltage -208 128 R0
WINDOW 3 26 96 Left 2
SYMATTR Value -2.5
SYMATTR InstName V3
SYMBOL LTC6085 208 192 R0
SYMATTR InstName U1
SYMBOL voltage -48 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 .2 1K)
SYMBOL res 224 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG -320 240 0
FLAG -48 288 0
FLAG 208 144 +V
FLAG -320 128 +V
FLAG 144 208 0
FLAG -208 240 0
FLAG -208 128 -V
FLAG 208 256 -V
TEXT 152 384 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2441.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2441.asy)
C3 OUT 0 38 Rser=1m
XU1 N009 N005 N007 N003 0 0 N001 IN N002 N010 N006 N004 ADP2441 ;pnba Comp)FB)Vcc)SW)GND)PGND)BST)Vin)EN)Pgood)Freq)SS/TRK
C4 N009 N008 270p
R1 OUT N005 73.2K
C1 N007 0 1
L1 N003 OUT 27.3 Rser=89m
R2 N005 0 10K
R7 IN N002 182K
C2 N001 N003 10n
R6 N006 0 182K
R8 N002 0 10K
R3 N007 N010 50K
R4 N008 0 118K
Rload OUT 0 5
V1 IN 0 24
.tran 3m startup
.lib ADP2441.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 728
WIRE -208 -32 -320 -32
WIRE 0 -32 -208 -32
WIRE 400 -32 352 -32
WIRE -320 -16 -320 -32
WIRE -208 -16 -208 -32
WIRE 400 -16 400 -32
WIRE -320 80 -320 64
WIRE -208 80 -208 64
WIRE 0 80 -208 80
WIRE 400 80 400 48
WIRE 400 80 352 80
WIRE 464 80 400 80
WIRE 608 80 544 80
WIRE 720 80 608 80
WIRE 816 80 720 80
WIRE -208 96 -208 80
WIRE 608 96 608 80
WIRE 720 96 720 80
WIRE 816 96 816 80
WIRE -208 192 -208 176
WIRE 0 192 -16 192
WIRE 608 192 608 176
WIRE 608 192 352 192
WIRE 720 192 720 160
WIRE 816 192 816 176
WIRE 608 208 608 192
WIRE -96 304 -112 304
WIRE 0 304 -16 304
WIRE 400 304 352 304
WIRE 464 304 400 304
WIRE 544 304 528 304
WIRE 608 304 608 288
WIRE 400 320 400 304
WIRE -176 416 -192 416
WIRE -80 416 -96 416
WIRE 0 416 -16 416
WIRE 400 416 400 400
WIRE 400 416 352 416
WIRE 112 496 112 480
WIRE 240 496 240 480
SYMBOL res 384 304 R0
SYMATTR InstName R3
SYMATTR Value 50K
SYMBOL cap 464 320 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 800 80 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL voltage -320 -32 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 0 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 182K
SYMBOL res -224 -32 R0
SYMATTR InstName R7
SYMATTR Value 182K
SYMBOL ADP2441 176 192 R0
SYMATTR InstName U1
SYMBOL cap 384 -16 R0
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL cap -16 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 270p
SYMBOL ind 448 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 27.3
SYMATTR SpiceLine Rser=89m
SYMBOL cap 704 96 R0
SYMATTR InstName C3
SYMATTR Value 38
SYMATTR SpiceLine Rser=1m
SYMBOL res 592 192 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res -80 400 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 118K
SYMBOL res 592 80 R0
SYMATTR InstName R1
SYMATTR Value 73.2K
SYMBOL res -224 80 R0
SYMATTR InstName R8
SYMATTR Value 10K
FLAG 112 496 0
FLAG 608 304 0
FLAG -192 416 0
FLAG -320 80 0
FLAG 720 192 0
FLAG 816 192 0
FLAG 816 80 OUT
FLAG -320 -32 IN
FLAG 240 496 0
FLAG -112 304 0
FLAG -208 192 0
FLAG 544 304 0
TEXT 592 400 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\193bb0400c8d_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +5v 0 5
V2 -5v 0 -5
V3 N001 0 PWL(0 0 1m 1 3m 3)
XU1 out N001 +5v -5v out level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.tran 1s
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp1.asy)
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 160 272 144
WIRE 240 176 32 176
WIRE 32 192 32 176
WIRE 416 192 304 192
WIRE 464 192 416 192
WIRE 480 192 464 192
WIRE 240 208 176 208
WIRE 272 240 272 224
WIRE 176 288 176 208
WIRE 416 288 416 192
WIRE 416 288 176 288
WIRE 32 304 32 272
FLAG 224 96 0
FLAG 368 96 0
FLAG 224 16 +5v
FLAG 368 16 -5v
FLAG 272 240 -5v
FLAG 272 144 +5v
FLAG 32 304 0
FLAG 464 192 out
SYMBOL voltage 224 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 368 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 32 176 R0
WINDOW 3 -110 159 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PWL(0 0 1m 1 3m 3)
SYMBOL OpAmps\\UniversalOpAmp1 272 192 R0
SYMATTR InstName U1
TEXT -72 360 Left 2 !.tran 1s
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1412L.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1412L.asy)
V2 -V 0 -15
R1 D 0 301
V4 IN 0 pulse(0 1.8 0 1u 1u 5m 10m)
C1 D 0 36p
XU1 IN D S -V 0 +V VL ADG1412L ;pnba IN)D)S)Vss)GND)Vdd)VL
V3 S 0 10
V5 VL 0 1.8
V1 +V 0 15
.tran 30m
.lib ADG1412L.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -160 -112 -160 -128
WIRE -64 -112 -64 -128
WIRE -336 -48 -368 -48
WIRE -224 -48 -256 -48
WIRE -208 -48 -224 -48
WIRE 0 -48 -16 -48
WIRE 48 -48 0 -48
WIRE 144 -48 48 -48
WIRE 48 -16 48 -48
WIRE 144 0 144 -48
WIRE -224 16 -288 16
WIRE -208 16 -224 16
WIRE 48 80 48 64
WIRE 144 80 144 64
WIRE -624 96 -624 80
WIRE -528 96 -528 80
WIRE -416 96 -416 80
WIRE -288 96 -288 16
WIRE -160 144 -160 128
WIRE -64 144 -64 128
WIRE -624 192 -624 176
WIRE -528 192 -528 176
WIRE -416 192 -416 176
WIRE -288 192 -288 176
SYMBOL voltage -528 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -416 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 1.8
SYMBOL voltage -624 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL cap 128 0 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -240 -48 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL ADG1412L -112 0 R0
SYMATTR InstName U1
SYMBOL voltage -288 80 R0
WINDOW 3 50 115 Left 2
SYMATTR Value pulse(0 1.8 0 1u 1u 5m 10m)
SYMATTR InstName V4
FLAG -528 192 0
FLAG -624 192 0
FLAG -624 80 +V
FLAG -528 80 -V
FLAG -368 -48 0
FLAG -160 144 -V
FLAG -64 -128 +V
FLAG -64 144 0
FLAG -288 192 0
FLAG 48 80 0
FLAG -416 192 0
FLAG -416 80 VL
FLAG -160 -128 VL
FLAG 144 80 0
FLAG -224 -48 S
FLAG -224 16 IN
FLAG 0 -48 D
TEXT -632 240 Left 2 !.tran 30m
TEXT -664 -216 Left 2 ;Note:\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\09e2d4ebeb7d_1844-SD.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1844-SD.asy)
R2 OUT N001 164K
V1 IN 0 5
I1 OUT 0 {iload} load
R1 N001 0 100K
XU1 IN 0 IN N001 OUT LTC1844-SD ;pnba IN)GND)_SHDN)ADJ)OUT
.dc v1 5 2 10m
.measure DC vdrop WHEN V(out)=3.2
.measure DC dropout param Vdrop-3.2
.step param iload list 1u 10m 25m 50m 75m 100m 125m 150m
.lib LTC1844-SD.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1940 1316
WIRE 64 80 -80 80
WIRE 80 80 64 80
WIRE 416 80 368 80
WIRE 560 80 416 80
WIRE -80 96 -80 80
WIRE 560 96 560 80
WIRE 416 112 416 80
WIRE -80 192 -80 176
WIRE 560 192 560 176
WIRE 64 240 64 80
WIRE 80 240 64 240
WIRE 416 240 416 192
WIRE 416 240 368 240
WIRE 416 256 416 240
WIRE 224 304 224 288
WIRE 416 352 416 336
SYMBOL voltage -80 80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 400 96 R0
SYMATTR InstName R2
SYMATTR Value 164K
SYMBOL res 400 240 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL LTC1844-SD 224 160 R0
SYMATTR InstName U1
SYMBOL current 560 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 19 82 Left 2
WINDOW 3 39 36 Left 2
SYMATTR SpiceLine load
SYMATTR Value {iload}
SYMATTR InstName I1
FLAG 224 304 0
FLAG 416 352 0
FLAG -80 192 0
FLAG 560 192 0
FLAG 560 80 OUT
FLAG -80 80 IN
TEXT 744 120 Left 2 !.dc v1 5 2 10m
TEXT 744 208 Left 2 !.measure DC vdrop WHEN V(out)=3.2\n.measure DC dropout param Vdrop-3.2
TEXT 744 160 Left 2 !.step param iload list 1u 10m 25m 50m 75m 100m 125m 150m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1761-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1761-2.asy)
C1 OUT 0 10
C2 OUT N001 .01
XU1 IN 0 IN N001 OUT LT1761-2 ;pnba IN)GND)_SHDN)BYP)OUT
R3 OUT 0 500
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT1761.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 48 -224 48
WIRE 16 48 -16 48
WIRE 336 48 304 48
WIRE 416 48 336 48
WIRE 512 48 416 48
WIRE -224 64 -224 48
WIRE 336 64 336 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE -16 144 -16 48
WIRE 16 144 -16 144
WIRE 336 144 336 128
WIRE 336 144 304 144
WIRE -224 160 -224 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 160 240 160 208
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 320 64 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL PowerProducts\\LT1761-2 160 96 R0
SYMATTR InstName U1
SYMBOL res 496 48 R0
SYMATTR InstName R3
SYMATTR Value 500
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG -224 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 160 240 0
FLAG -224 48 IN
FLAG 512 48 OUT
TEXT 368 240 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP121-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP121-3.3.asy)
C1 IN 0 1
V1 IN 0 5.5
Rload OUT 0 22
XU1 OUT MP_01 0 IN MP_02 IN ADP121 K=1/4125 ;pnba Vout))GND)En))Vin
C2 OUT 0 1
.tran 10m startup
.lib ADP121.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 22
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL ADP121-3.3 256 208 R0
SYMATTR InstName U1
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup