Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\d2bf1a526ba9_Clamp1.asc
* Generated by LTspice 26.0.1 for Windows.
B4 V3 0 V = if(V(Vmax)>V(in),V(in),V(Vmax))
B2 Vmax 0 V = {max}
B3 Vmin 0 V = {min}
B1 out 0 V = V(Vo)
B5 Vo 0 V = if(V(V3)>V(Vmin),V(V3),V(Vmin))
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 704 -80 624 -80
WIRE -608 16 -608 -48
WIRE -400 16 -400 -48
WIRE -240 16 -240 -48
WIRE 208 16 208 -48
WIRE 624 16 624 -80
WIRE -608 192 -608 96
WIRE -400 192 -400 96
WIRE -240 192 -240 96
WIRE 208 192 208 96
WIRE 624 192 624 96
WIRE -432 320 -576 320
IOPIN 704 -80 Out
IOPIN -576 320 In
SYMBOL bv 624 0 R0
SYMATTR InstName B1
SYMATTR Value V = V(Vo)
SYMBOL bv 208 0 R0
WINDOW 3 -46 228 Left 0
SYMATTR Value V = if(V(V3)>V(Vmin),V(V3),V(Vmin))
SYMATTR InstName B5
SYMBOL bv -240 0 R0
WINDOW 3 -46 228 Left 0
SYMATTR Value V = if(V(Vmax)>V(in),V(in),V(Vmax))
SYMATTR InstName B4
SYMBOL bv -400 0 R0
WINDOW 3 -52 229 Left 0
SYMATTR Value V = {min}
SYMATTR InstName B3
SYMBOL bv -608 0 R0
WINDOW 3 -60 232 Left 0
SYMATTR Value V = {max}
SYMATTR InstName B2
FLAG 624 192 0
FLAG 704 -80 out
FLAG -608 192 0
FLAG -400 192 0
FLAG -576 320 in
FLAG -608 -48 Vmax
FLAG -400 -48 Vmin
FLAG -240 192 0
FLAG -240 -48 V3
FLAG 208 192 0
FLAG 208 -48 Vo
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3129.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 N002 10 Rser=20m
C1 N001 N003 22n
C2 N002 N004 22n
V1 IN 0 12
C3 N007 0 2.2
R1 OUT N005 3.32Meg
R2 N005 0 1.02Meg
C4 OUT N005 10p
Rload OUT 0 25
C5 OUT 0 10 Rser=1m
R3 IN N006 680K
R4 N006 0 100K
XU1 0 N003 N001 MP_01 IN N006 N007 N007 N005 N004 0 N002 NC_02 OUT LTC3129 ;pnba GND)BST1)SW1))Vin)RUN)Vcc)MPPC)FB)BST2)PWM)SW2)Pgood)Vout
.tran 5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3129.asy)
.lib LTC3129.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -96 -16 -96
WIRE 160 -96 144 -96
WIRE 400 -96 240 -96
WIRE -16 -64 -16 -96
WIRE 400 -64 400 -96
WIRE 144 -32 144 -96
WIRE 240 -32 240 -96
WIRE -16 32 -16 0
WIRE 48 32 -16 32
WIRE 400 32 400 0
WIRE 400 32 336 32
WIRE -48 128 -160 128
WIRE 48 128 -48 128
WIRE 400 128 336 128
WIRE 480 128 400 128
WIRE 640 128 480 128
WIRE 768 128 640 128
WIRE -160 144 -160 128
WIRE 400 144 400 128
WIRE 768 144 768 128
WIRE 640 160 640 128
WIRE -48 192 -48 128
WIRE 48 224 32 224
WIRE 400 224 400 208
WIRE 400 224 336 224
WIRE 480 224 480 208
WIRE 480 224 400 224
WIRE -160 240 -160 224
WIRE 480 240 480 224
WIRE 640 240 640 224
WIRE 768 240 768 224
WIRE -144 320 -176 320
WIRE -48 320 -48 272
WIRE -48 320 -64 320
WIRE 48 320 -48 320
WIRE 384 320 336 320
WIRE 480 336 480 320
WIRE 384 416 384 320
WIRE 384 416 336 416
WIRE 384 432 384 416
WIRE 192 496 192 480
WIRE 384 512 384 496
FLAG 192 496 0
FLAG -160 240 0
FLAG 384 512 0
FLAG 480 336 0
FLAG 640 240 0
FLAG 768 240 0
FLAG 768 128 OUT
FLAG -160 128 IN
FLAG -176 320 0
FLAG 32 224 0
SYMBOL ind 144 -80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=20m
SYMBOL cap -32 -64 R0
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL cap 384 -64 R0
SYMATTR InstName C2
SYMATTR Value 22n
SYMBOL voltage -160 128 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 368 432 R0
SYMATTR InstName C3
SYMATTR Value 2.2
SYMBOL res 464 112 R0
WINDOW 3 31 91 Left 2
SYMATTR Value 3.32Meg
SYMATTR InstName R1
SYMBOL res 464 224 R0
WINDOW 3 34 81 Left 2
SYMATTR Value 1.02Meg
SYMATTR InstName R2
SYMBOL cap 384 144 R0
SYMATTR InstName C4
SYMATTR Value 10p
SYMBOL res 752 128 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL cap 624 160 R0
WINDOW 3 23 56 Left 2
SYMATTR Value 10
SYMATTR SpiceLine Rser=1m
SYMATTR InstName C5
SYMBOL res -64 176 R0
SYMATTR InstName R3
SYMATTR Value 680K
SYMBOL res -48 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL LTC3129 192 224 R0
SYMATTR InstName U1
TEXT 520 440 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ab129dd0456a_3S_Output_Control_Driver.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 N005 V
V2 N005 N006 V
V3 N006 0 V
R1 N004 N003 1k
Q2 N002 N004 N001 0 PNP
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
* Control(Out)
* Control(In)
* 3S Ouput Control Driver
* PNP Transistor - 557B
* - 2 power input
* - 1 control input
* - 1 control output
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 820
WIRE 800 -96 176 -96
WIRE 640 -32 544 -32
WIRE 176 32 176 -96
WIRE 640 32 640 -32
WIRE 448 80 384 80
WIRE 576 80 528 80
WIRE 640 176 640 128
WIRE 800 176 800 -96
WIRE 800 176 640 176
WIRE 176 288 176 112
WIRE 176 576 176 368
WIRE 176 800 176 656
FLAG 176 800 0
SYMBOL voltage 176 16 R0
SYMATTR InstName V1
SYMBOL voltage 176 272 R0
SYMATTR InstName V2
SYMBOL voltage 176 560 R0
SYMATTR InstName V3
SYMBOL res 544 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL pnp 576 32 R0
SYMATTR InstName Q2
TEXT 536 -48 Left 2 ;Control(Out)
TEXT 304 48 Left 2 ;Control(In)
TEXT -512 32 Left 4 ;3S Ouput Control Driver
TEXT -344 312 Left 2 ;PNP Transistor - 557B
TEXT -360 424 Left 2 ;- 2 power input
TEXT -360 472 Left 2 ;- 1 control input
TEXT -360 520 Left 2 ;- 1 control output
* Z:\home\khalils\Downloads\files\data\raw_asc\3b454430787d_OpAmp_Level_Shift_-5v_Messspannung.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
XU1 0 N003 N001 N002 out LT1001 ;pnba In+)In-)V+)V-)OUT
R2 out N003 10k
V2 N001 0 5
R1 N003 N002 5k
V1 0 N002 5
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 80 0 80
WIRE 320 112 304 112
WIRE 272 144 272 80
WIRE 0 160 0 144
WIRE 80 160 0 160
WIRE 128 160 112 160
WIRE 224 160 224 112
WIRE 224 160 208 160
WIRE 240 160 224 160
WIRE 0 176 0 160
WIRE 320 176 320 112
WIRE 320 176 304 176
WIRE 352 176 320 176
WIRE 80 192 80 160
WIRE 240 192 80 192
WIRE 80 208 80 192
WIRE 112 256 112 160
WIRE 112 256 0 256
WIRE 272 256 272 208
WIRE 272 256 112 256
SYMBOL voltage 0 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL Opamps\\OP07 272 112 R0
SYMATTR InstName U1
SYMBOL voltage 0 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 320 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 224 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5k
FLAG 80 208 0
FLAG 352 176 out
* Z:\home\khalils\Downloads\files\data\raw_asc\31b1976d752c_AD8666.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8666.asy)
Rload OUT 0 10K
Vin IN 0 SINE(0 1 1K)
XU1 IN N001 +V -V OUT AD8666 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 10K
V2 -V 0 -8
V1 +V 0 8
R2 OUT N001 10K
.tran 10m
.lib AD8666.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL AD8666 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -8
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 1K)
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 8
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
TEXT 688 -952 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\d3aab9215306_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
VBB N002 0 5
RC C N001 100
RB B N002 22K
VCC N001 0 15
Q1 C B 0 0 NPN
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VBB 0 5 0.5m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 400 -160 368 -160
WIRE 512 -160 400 -160
WIRE 688 -160 592 -160
WIRE 128 -112 32 -112
WIRE 272 -112 208 -112
WIRE 304 -112 272 -112
WIRE 688 -80 688 -160
WIRE 32 -48 32 -112
WIRE 368 0 368 -64
WIRE 688 32 688 0
WIRE 32 64 32 32
SYMBOL voltage 32 -64 R0
SYMATTR InstName VBB
SYMATTR Value 5
SYMBOL res 224 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RB
SYMATTR Value 22K
SYMBOL voltage 688 -96 R0
SYMATTR InstName VCC
SYMATTR Value 15
SYMBOL res 496 -176 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RC
SYMATTR Value 100
SYMBOL npn 304 -160 R0
SYMATTR InstName Q1
FLAG 688 32 0
FLAG 368 0 0
FLAG 32 64 0
FLAG 272 -112 B
FLAG 400 -160 C
FLAG 368 -64 E
TEXT 336 128 Left 2 !.dc VBB 0 5 0.5m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4000-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4000-1.asy)
XU1 IN N001 +V -V OUT ADA4000 ;pnba In+)In-)V+)V-)OUT
Vin IN 0 SINE(0 1 500K)
R1 N001 0 10K
V1 +V 0 15
V2 -V 0 -15
R2 OUT N001 10K
.tran 20u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 736 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 432 -976 432 -992
SYMBOL Opamps\\ADA4000-1 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 500K)
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
FLAG 144 -1168 +V
FLAG 432 -976 0
FLAG 736 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 256 -1056 0
FLAG 144 -1056 0
TEXT 744 -984 Left 2 !.tran 20u
* Z:\home\khalils\Downloads\files\data\raw_asc\0dcb295ebd90_CH03-KP2-14.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N001 a 3
R4 N002 N001 5
V1 N001 N003 3
E1 N002 0 a 0 4
R1 a 0 2
R2 N003 0 1
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 208 32 208
WIRE 304 208 224 208
WIRE 400 208 304 208
WIRE 592 208 480 208
WIRE 304 272 304 208
WIRE 32 304 32 208
WIRE 592 304 592 208
WIRE 32 320 32 304
WIRE 304 384 304 352
WIRE 544 416 544 368
WIRE 592 416 592 384
WIRE 592 416 544 416
WIRE 32 512 32 400
WIRE 304 512 304 464
WIRE 304 512 32 512
WIRE 592 512 592 416
WIRE 592 512 304 512
WIRE 32 528 32 512
DATAFLAG 32 208 "$"
SYMBOL res 496 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 5
SYMBOL res 288 368 R0
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL e 592 288 R0
SYMATTR InstName E1
SYMATTR Value 4
SYMBOL res 16 304 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL voltage 304 256 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res 240 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 3
FLAG 32 528 0
FLAG 32 304 a
FLAG 544 320 a
TEXT 64 528 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\0139e55a4f06_StageB_BandPassDeliyannisFriendNoPosFB_LTC6262.asc
* Generated by LTspice 26.0.1 for Windows.
* This subcircuit is not simulatable. \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6262.asy)
R1 N001 IN 4.7k
C1 OUT N001 1.5n
R5 OUT N002 33k
R2 N001 REF 22k
XU1 REF N002 OUT V+ V- Vp LTC6261 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN_L
C2 N002 N001 1.5n
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4112 860
WIRE 48 -128 -16 -128
WIRE 176 -128 112 -128
WIRE 480 -128 176 -128
WIRE 176 -64 176 -128
WIRE 320 64 320 -32
WIRE 320 112 320 64
WIRE -160 128 -176 128
WIRE -128 128 -160 128
WIRE -16 128 -16 -128
WIRE -16 128 -48 128
WIRE 48 128 -16 128
WIRE 176 128 176 16
WIRE 176 128 112 128
WIRE 288 128 288 112
WIRE 288 128 176 128
WIRE 304 128 288 128
WIRE 480 128 480 -128
WIRE 544 128 480 128
WIRE 576 128 544 128
WIRE 432 144 352 144
WIRE 480 144 480 128
WIRE 480 144 432 144
WIRE 288 160 240 160
WIRE 304 160 288 160
WIRE -16 176 -16 128
WIRE 288 176 288 160
WIRE 320 224 320 176
WIRE -16 288 -16 256
WIRE 240 288 240 160
WIRE 320 304 320 224
WIRE 368 224 368 249
SYMBOL cap 112 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1.5n
SYMBOL res 160 -80 R0
SYMATTR InstName R5
SYMATTR Value 33k
SYMBOL Opamps\\LTC6262 320 144 R0
SYMATTR InstName U1
SYMBOL res -32 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL res -32 160 R0
SYMATTR InstName R2
SYMATTR Value 22k
SYMBOL cap 112 -144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1.5n
FLAG 320 -32 V+
FLAG 320 304 V-
FLAG 544 128 OUT
FLAG -160 128 IN
FLAG 240 288 REF
FLAG -16 288 REF
FLAG 368 249 Vp
TEXT -176 504 Left 4 ;This subcircuit is not simulatable.  \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Z:\tmp\asc_dec_bjh7r6w2\009a2771507c_Active-Low-Pass-Buttersworth-Filter_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R4 N004 0 10k
V1 0 Vm 12
C2 N003 0 10nF
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 916 680
WIRE -144 32 -304 32
WIRE 80 32 -80 32
WIRE -432 128 -496 128
WIRE -304 128 -304 32
WIRE -304 128 -352 128
WIRE -256 128 -304 128
WIRE -128 128 -176 128
WIRE -16 128 -128 128
WIRE 80 144 80 32
WIRE 80 144 48 144
WIRE 160 144 80 144
WIRE -128 160 -128 128
WIRE -16 160 -48 160
WIRE -656 192 -656 160
WIRE -656 192 -720 192
WIRE -496 192 -496 128
WIRE 80 192 80 144
WIRE -720 208 -720 192
WIRE -656 224 -656 192
WIRE -128 256 -128 224
WIRE -48 288 -48 160
WIRE 80 288 80 272
WIRE 80 288 -48 288
WIRE 80 304 80 288
WIRE -496 336 -496 272
WIRE 80 400 80 384
SYMBOL res 64 288 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL voltage -656 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap -144 160 R0
SYMATTR InstName C2
SYMATTR Value 10nF
FLAG 80 400 0
FLAG -128 256 0
FLAG -720 208 0
FLAG -656 80 Vp
FLAG -656 304 Vm
FLAG 16 176 Vp
FLAG 16 112 Vm
FLAG -496 336 0
FLAG 160 144 Vout
* Z:\home\khalils\Downloads\files\data\raw_asc\22237dede070_Simulacion_SPICE_Montecarlo_Completo.asc
* Generated by LTspice 26.0.1 for Windows.
* Circuit
* Source / Switch
* Parameters
* Simulation setup
R1 VL+ Vcc {mc({R1},tol_R)}
L1 VL+ VL- {mc({L},tol_L)}
R2 N001 0 {mc({R2},tol_R)}
C1 VL+ N001 {mc({C},tol_C)}
V1 Vcc 0 PULSE(0 10 10m 1n 1n 200m 400m 10)
R3 VL- 0 {mc({R3},tol_R)}
.param R1 = 50
.param R2 = 7
.param R3 = 6
.param C = 300u
.param L = 450m
.param tol_R = 0.05
.param tol_C = 0.1
.param tol_L = 0
.step param run 1 50 1
.tran 0 400m 0 1u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -368 -176 -560 -176
WIRE -128 -176 -288 -176
WIRE 144 -176 -128 -176
WIRE -128 -80 -128 -176
WIRE 144 -80 144 -176
WIRE -560 -16 -560 -176
WIRE 144 48 144 0
WIRE -128 112 -128 -16
WIRE 144 112 144 48
WIRE -560 272 -560 64
WIRE -128 272 -128 192
WIRE -128 272 -560 272
WIRE 144 272 144 192
WIRE 144 272 -128 272
WIRE -128 304 -128 272
RECTANGLE Normal -496 -288 -1024 336 2
RECTANGLE Normal 208 -288 -480 336 2
RECTANGLE Normal 608 144 240 304 2
RECTANGLE Normal 608 -288 240 112 2
SYMBOL res 128 96 R0
WINDOW 3 -195 100 Left 2
SYMATTR Value {mc({R3},tol_R)}
SYMATTR InstName R3
SYMBOL res -144 96 R0
WINDOW 3 -196 98 Left 2
SYMATTR Value {mc({R2},tol_R)}
SYMATTR InstName R2
SYMBOL voltage -560 -32 R0
WINDOW 3 -440 106 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 10 10m 1n 1n 200m 400m 10)
SYMATTR InstName V1
SYMBOL res -272 -192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 37 72 VTop 2
SYMATTR InstName R1
SYMATTR Value {mc({R1},tol_R)}
SYMBOL ind 128 -96 R0
WINDOW 3 -182 99 Left 2
SYMATTR Value {mc({L},tol_L)}
SYMATTR InstName L1
SYMBOL cap -144 -80 R0
WINDOW 3 -178 55 Left 2
SYMATTR Value {mc({C},tol_C)}
SYMATTR InstName C1
FLAG -128 304 0
FLAG -560 -176 Vcc
FLAG 144 -176 VL+
FLAG 144 48 VL-
TEXT -400 -264 Left 3 ;Circuit
TEXT -944 -264 Left 3 ;Source / Switch
TEXT 264 -264 Left 3 ;Parameters
TEXT 312 -208 Left 2 !.param R1 = 50
TEXT 312 -176 Left 2 !.param R2 = 7
TEXT 312 -144 Left 2 !.param R3 = 6
TEXT 312 -48 Left 2 !.param C = 300u
TEXT 312 48 Left 2 !.param L = 450m
TEXT 256 168 Left 3 ;Simulation setup
TEXT 312 -112 Left 2 !.param tol_R = 0.05
TEXT 312 -16 Left 2 !.param tol_C = 0.1
TEXT 312 80 Left 2 !.param tol_L = 0
TEXT 320 224 Left 2 !.step param run 1 50 1
TEXT 328 248 Left 2 !.tran 0 400m 0 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3406B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3406B.asy)
L1 N001 OUT 4.7
R2 N002 0 280K
XU1 IN 0 N001 IN N002 LTC3406B ;pnba Run)GND)SW)Vin)FB
R1 OUT N002 887K
C2 OUT 0 22
Rload OUT 0 5
V1 IN 0 5
.tran 500u startup
.lib LTC3406B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 700
WIRE 192 64 96 64
WIRE 352 64 192 64
WIRE 96 80 96 64
WIRE 352 80 352 64
WIRE 192 144 192 64
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 624 144 592 144
WIRE 736 144 624 144
WIRE 848 144 736 144
WIRE 736 160 736 144
WIRE 848 160 848 144
WIRE 96 176 96 160
WIRE 624 176 624 144
WIRE 736 256 736 224
WIRE 848 256 848 240
WIRE 624 304 624 256
WIRE 624 304 496 304
WIRE 624 320 624 304
WIRE 352 384 352 368
WIRE 624 416 624 400
SYMBOL res 608 304 R0
SYMATTR InstName R2
SYMATTR Value 280K
SYMBOL RES 832 144 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL polcap 720 160 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL PowerProducts\\LTC3406B 352 224 R0
SYMATTR InstName U1
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL VOLTAGE 96 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 608 160 R0
SYMATTR InstName R1
SYMATTR Value 887K
FLAG 96 176 0
FLAG 352 384 0
FLAG 736 256 0
FLAG 848 256 0
FLAG 848 144 OUT
FLAG 624 416 0
FLAG 96 64 IN
TEXT 752 376 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\eba7136ff4d4_3l_3_.asc
* Generated by LTspice 26.0.1 for Windows.
VBS N001 0 -900m
VDS DS 0 50m
VGS N002 0 V
M1 DS N002 0 N001 CMOSN l=0.18u w=1.8u ad=0.81p as=0.81p pd=4.5u ps=4.5u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC_180nm.txt
.dc VGS 0 1.8 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 996 680
WIRE 496 64 336 64
WIRE 496 80 496 64
WIRE 496 192 496 160
WIRE 336 240 336 64
WIRE 512 288 336 288
WIRE 288 320 176 320
WIRE 176 352 176 320
WIRE 512 448 512 288
WIRE 176 496 176 432
WIRE 336 496 336 336
WIRE 336 496 176 496
WIRE 336 560 336 496
WIRE 512 576 512 528
SYMBOL nmos4 288 240 R0
SYMATTR InstName M1
SYMATTR Value CMOSN
SYMATTR Value2 l=0.18u w=1.8u ad=0.81p as=0.81p pd=4.5u ps=4.5u
SYMBOL voltage 496 64 R0
SYMATTR InstName VDS
SYMATTR Value 50m
SYMBOL voltage 176 336 R0
SYMATTR InstName VGS
SYMBOL voltage 512 432 R0
SYMATTR InstName VBS
SYMATTR Value -900m
FLAG 336 560 0
FLAG 512 576 0
FLAG 496 192 0
FLAG 496 64 DS
TEXT 616 192 Left 2 !.include TSMC_180nm.txt
TEXT 624 256 Left 2 !.dc VGS 0 1.8 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\571c8326d453_zd6v8.asc
* Generated by LTspice 26.0.1 for Windows.
*SRC=1N4736A;DI_1N4736A;Diodes;Zener <=10V; 6.80V 1.00W Diodes Inc. Zener
*SYM=HZEN
* Terminals A K
* You can save the model into a file, e.g. z_diodes.lib.\nThen just add a SPICE-line to your schematic to include this file\n \n.include z_diode.lib
+ CJO=123p VJ=0.750 M=0.330 TT=50.1n )
XD1 0 vz DI_1N4736A ;pnba +)-
R1 N001 vz 1k
VZ 2 3 6.05
DZ 3 1 DR
V1 N001 0 10
D1 1 2 DF
.SUBCKT DI_1N4736A 1 2
.MODEL DF D ( IS=60.6p RS=0.620 N=1.10
.MODEL DR D ( IS=12.1f RS=0.209 N=1.00 )
.ENDS
.op
.dc V1 -10 10 .01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -208 160 -208 80
WIRE -208 288 -208 240
WIRE -128 80 -208 80
WIRE 16 80 -48 80
WIRE 16 176 16 80
WIRE 16 288 16 240
SYMBOL zener 0 240 M180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D1
SYMATTR Value DI_1N4736A
SYMATTR Prefix X
SYMBOL res -144 96 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -208 144 R0
SYMATTR InstName V1
SYMATTR Value 10
FLAG 16 288 0
FLAG -208 288 0
FLAG 16 80 vz
TEXT -272 368 Left 0 !*SRC=1N4736A;DI_1N4736A;Diodes;Zener <=10V; 6.80V 1.00W Diodes Inc. Zener\n*SYM=HZEN\n.SUBCKT DI_1N4736A 1 2\n* Terminals A K\nD1 1 2 DF\nDZ 3 1 DR\nVZ 2 3 6.05\n.MODEL DF D ( IS=60.6p RS=0.620 N=1.10\n+ CJO=123p VJ=0.750 M=0.330 TT=50.1n )\n.MODEL DR D ( IS=12.1f RS=0.209 N=1.00 )\n.ENDS
TEXT -200 -16 Left 0 !.op
TEXT -200 -40 Left 0 !.dc V1 -10 10 .01
TEXT -232 -200 Left 0 ;You can save the model into a file, e.g. z_diodes.lib.\nThen just add a SPICE-line to your schematic to  include this file\n \n.include z_diode.lib
* Z:\tmp\asc_dec_bjh7r6w2\0fd8d47ac126_SQRL_Resonator_HALF_Wave_Bridge_Rectifier_RF_Diode_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N003 0 68p V=50 Irms=6.2m Rser=2.668 Lser=852p
D1 N001 N002 SMS3922
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1508 680
WIRE 624 32 304 32
WIRE 688 32 624 32
WIRE 800 32 752 32
WIRE 944 32 880 32
WIRE 1056 32 944 32
WIRE 1056 48 1056 32
WIRE 624 112 624 32
WIRE 944 112 944 32
WIRE 1056 160 1056 128
WIRE 624 272 624 192
WIRE 944 272 944 176
WIRE 1056 272 1056 224
SYMBOL polcap 928 112 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 68p
SYMATTR InstName C1
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=50 Irms=6.2m Rser=2.668 Lser=852p
SYMBOL schottky 688 48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value SMS3922
SYMATTR Description Diode
SYMATTR Type diode
FLAG 1056 272 0
FLAG 944 272 0