Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4223C.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4223C.asy)
C3 VOA 0 2n
C1 0 VDD1 10n
V3 VDD1 0 5
XU1 VIA VIB VDD1 0 0 0 VOB N002 0 VOA N001 ADuM4223C ;pnba VIA)VIB)VDD1)GND1)DISABLE)GNDB)VOB)VDDB)GNDA)VOA)VDDA
C5 VOB 0 2n
V5 N001 0 12
V1 VIA 0 PULSE(0 5 0 1n 1n 5u 10u)
V6 N002 0 12
V2 VIB 0 PULSE(5 0 0 1n 1n 5u 10u)
.tran 50u
.lib ADuM4223C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1216 680
WIRE 656 16 368 16
WIRE 688 16 656 16
WIRE -48 32 -608 32
WIRE 64 32 -48 32
WIRE 688 32 688 16
WIRE -608 80 -608 32
WIRE 560 80 368 80
WIRE -48 112 -464 112
WIRE 64 112 -48 112
WIRE 688 112 688 96
WIRE 432 144 368 144
WIRE -176 192 -336 192
WIRE -64 192 -176 192
WIRE 64 192 -64 192
WIRE -608 224 -608 160
WIRE -464 224 -464 192
WIRE -336 224 -336 192
WIRE 560 224 368 224
WIRE -176 272 -176 192
WIRE -128 272 -176 272
WIRE 0 272 -64 272
WIRE 64 272 0 272
WIRE 432 288 368 288
WIRE -336 320 -336 304
WIRE 0 352 0 272
WIRE 64 352 0 352
WIRE 656 352 368 352
WIRE 688 352 656 352
WIRE 688 368 688 352
WIRE 0 384 0 352
WIRE 688 448 688 432
SYMBOL voltage -608 64 R0
WINDOW 0 30 80 Left 2
WINDOW 3 18 -5 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 1n 1n 5u 10u)
SYMBOL cap 672 368 R0
SYMATTR InstName C5
SYMATTR Value 2n
SYMBOL voltage -336 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage 560 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 12
SYMBOL voltage 560 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 12
SYMBOL voltage -464 96 R0
WINDOW 0 20 108 Left 2
WINDOW 3 39 40 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(5 0 0 1n 1n 5u 10u)
SYMBOL ADuM4223C 224 112 R0
SYMATTR InstName U1
SYMBOL cap 672 32 R0
SYMATTR InstName C3
SYMATTR Value 2n
SYMBOL cap -64 256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
FLAG -336 320 0
FLAG -608 224 0
FLAG -464 224 0
FLAG 688 112 0
FLAG 688 448 0
FLAG 656 352 VOB
FLAG 656 16 VOA
FLAG 0 384 0
FLAG 432 288 0
FLAG 432 144 0
FLAG -48 32 VIA
FLAG -48 112 VIB
FLAG 560 304 0
FLAG 560 160 0
FLAG -64 192 VDD1
TEXT 64 440 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\1422f4c9158b_101_lec_exercise_diode_einweg.asc
* Generated by LTspice 26.0.1 for Windows.
* Steckernetzteil
Ri N004 N003 7.2
Ls N003 0 {Ls}
D1 N004 N005 1N4001
Lp N002 0 {Lp}
R2 N005 0 1200
V1 N001 0 SINE(0 325 50)
K Lp Ls 1
R1 N002 N001 1e-12
C1 N005 0 {C}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.parameter Lp=100u
.parameter Ls=0.1531190926275993u
.tran 0 100m 60m
.param C = 100e-6
.model 1N4001 D(Is=14.11n N=1.984 Rs=33.89m Ikf=94.81 Xti=3 Eg=1.11 Cjo=25.89p M=.44 Vj=.3245 Fc=.5 Bv=75 Ibv=10u Tt=5.7u Iave=1 Vpk=50 mfg=GI type=silicon)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2120 680
WIRE -48 48 -96 48
WIRE 112 48 32 48
WIRE 288 48 272 48
WIRE 416 48 368 48
WIRE 512 48 480 48
WIRE 608 48 512 48
WIRE -96 64 -96 48
WIRE 112 80 112 48
WIRE 272 80 272 48
WIRE 512 80 512 48
WIRE 608 80 608 48
WIRE -96 192 -96 144
WIRE 112 192 112 160
WIRE 112 192 -96 192
WIRE 272 192 272 160
WIRE 448 192 272 192
WIRE 512 192 512 144
WIRE 512 192 448 192
WIRE 608 192 608 160
WIRE 608 192 512 192
WIRE -96 208 -96 192
WIRE 448 208 448 192
RECTANGLE Normal 368 240 80 0 2
SYMBOL ind2 96 64 R0
SYMATTR InstName Lp
SYMATTR Value {Lp}
SYMATTR Type ind
SYMBOL ind2 256 64 R0
SYMATTR InstName Ls
SYMATTR Value {Ls}
SYMATTR Type ind
SYMBOL res 384 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Ri
SYMATTR Value 7.2
SYMBOL res 592 64 R0
SYMATTR InstName R2
SYMATTR Value 1200
SYMBOL voltage -96 48 R0
WINDOW 0 8 103 Left 2
WINDOW 3 -54 144 VLeft 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 325 50)
SYMBOL diode 416 64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4001
SYMBOL cap 496 80 R0
SYMATTR InstName C1
SYMATTR Value {C}
SYMBOL res 48 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1e-12
FLAG -96 208 0
FLAG 448 208 0
TEXT 136 24 Left 2 !K Lp Ls 1
TEXT 80 -24 Left 2 ;Steckernetzteil
TEXT 80 288 Left 2 !.parameter Lp=100u
TEXT 80 320 Left 2 !.parameter Ls=0.1531190926275993u
TEXT -152 320 Left 2 !.tran 0 100m 60m
TEXT 80 352 Left 2 !.param C = 100e-6
TEXT 80 384 Left 2 !.model 1N4001 D(Is=14.11n N=1.984 Rs=33.89m Ikf=94.81 Xti=3 Eg=1.11 Cjo=25.89p M=.44 Vj=.3245 Fc=.5 Bv=75 Ibv=10u Tt=5.7u Iave=1 Vpk=50 mfg=GI type=silicon)
* Z:\home\khalils\Downloads\files\data\raw_asc\35d708583a49_ETAJ_4_OUTPUT_SWING.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1208.asy)
V1 in2 0 SINE(0 2.5 8k 0)
V2 V+ 0 5
XU1 in2 0 V+ V- vo2 LT1208 ;pnba In+)In-)V+)V-)OUT
V3 V- 0 -5
.tran 1m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 160 -96 160
WIRE 176 176 64 176
WIRE 0 192 -80 192
WIRE -96 352 -96 336
WIRE 16 352 16 336
WIRE -96 400 -96 352
WIRE 16 400 16 352
WIRE 160 416 160 352
WIRE -96 512 -96 480
WIRE 16 512 16 480
WIRE 16 512 -96 512
WIRE 16 544 16 512
WIRE 160 560 160 496
SYMBOL voltage 16 384 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL voltage -96 384 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 160 400 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 2.5 8k 0)
SYMBOL OpAmps\\LT1208 32 112 R0
SYMATTR InstName U1
FLAG 32 208 V-
FLAG 32 144 V+
FLAG 160 560 0
FLAG 160 352 in2
FLAG -80 192 in2
FLAG 176 176 vo2
FLAG -96 160 0
FLAG 16 544 0
FLAG -96 352 V+
FLAG 16 352 V-
TEXT -136 296 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7150-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7150-2.8.asy)
R3 IN N001 100K
V1 IN 0 6.2
C2 N002 0 1
C4 N003 0 1
C1 N004 0 10 Rser=10m Lser=1n
XU1 N004 OUT N002 0 N003 N003 N001 IN ADM7150_1 Vreg=3.5 Vref=2.812 ;pnba Vreg)Vout)Byp)GND)Ref_Sense)Ref)EN)Vin
C3 OUT 0 10
R5 OUT 0 18
.tran 5m startup
.lib ADM7150_1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 856
WIRE -32 32 -160 32
WIRE 80 32 -32 32
WIRE 464 32 400 32
WIRE 560 32 464 32
WIRE -160 48 -160 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE -160 144 -160 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE 0 224 -16 224
WIRE 80 224 64 224
WIRE 416 224 400 224
WIRE 464 224 416 224
WIRE 464 240 464 224
WIRE 0 320 -16 320
WIRE 80 320 64 320
WIRE 416 320 416 224
WIRE 416 320 400 320
WIRE 464 320 464 304
WIRE 240 400 240 384
SYMBOL cap 448 48 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL ADM7150-2.8 240 176 R0
SYMATTR InstName U1
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res 544 32 R0
SYMATTR InstName R5
SYMATTR Value 18
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL voltage -160 32 R0
SYMATTR InstName V1
SYMATTR Value 6.2
SYMBOL cap 64 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR Value2 Rser=10m
SYMATTR SpiceLine Lser=1n
SYMBOL cap 448 240 R0
WINDOW 0 36 14 Left 2
WINDOW 3 36 50 Left 2
SYMATTR InstName C4
SYMATTR Value 1
FLAG 240 400 0
FLAG 464 320 0
FLAG 464 144 0
FLAG -16 320 0
FLAG -16 224 0
FLAG -160 144 0
FLAG 560 144 0
FLAG -160 32 IN
FLAG 560 32 OUT
TEXT 552 448 Left 2 !.tran 5m startup
* Z:\tmp\asc_dec_bjh7r6w2\13ffa81864d1_g_min100_bw_50k_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N001 +5V -5V N002 AD8602 ;pnba In+)In-)V+)V-)OUT
R2 N001 N003 470
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8602.asy)
.lib AD8602.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 416 0 384 0
WIRE 512 0 480 0
WIRE 240 32 240 -48
WIRE 384 96 384 0
WIRE 400 96 384 96
WIRE 512 96 512 0
WIRE 512 96 480 96
WIRE 272 240 96 240
WIRE 384 240 384 96
WIRE 384 240 352 240
WIRE 400 240 384 240
WIRE 512 256 512 96
WIRE 512 256 464 256
WIRE 704 256 512 256
WIRE 400 272 384 272
WIRE 384 352 384 272
SYMBOL OpAmps\\AD8602 432 192 R0
SYMATTR InstName U1
SYMBOL res 368 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 470
FLAG 240 32 0
FLAG 384 352 0
FLAG 432 288 -5V
FLAG 432 224 +5V
* Z:\home\khalils\Downloads\files\data\raw_asc\4e1394e9955e_bss83.asc
* Generated by LTspice 26.0.1 for Windows.
* GAMMA added
* Enhanced model of the BSS83 from Philips\n \nSweep of Vgs from 0 to 5V at Vsb=-8, -4, 0V\n.dc V1 0 5 .1 V2 -8 0 4\nPlot Id(M1) to see how Vsb changes the behaviour.\n \nI added GAMMA=0.2 to the model to get the correct Ids(Vgs, Vsb).\nThe simulated drain current is independent of Vsb if GAMMA is \nomitted. This was clearly a missing parameter in the original model.\n \nThe complete ".model"-statement can be also put into a file \nlike BSS83.mod and added with a SPICEdirective.\n.include BSS83.mod
* * Philips model\n.MODEL BSS83 NMOS\n+ LEVEL=3\n+ W=1E-3\n+ L=1E-6\n+ VTO=2\n+ VMAX=1E6\n+ RS=3\n+ RD=3\n+ CJ=0.001396\n+ MJ=0.3936\n+ THETA=1E-6\n+ ETA=0.009307\n+ KAPPA=2.226
+ LEVEL=3
+ W=1E-3
+ L=1E-6
+ VTO=2
+ VMAX=1E6
+ RS=3
+ RD=3
+ CJ=0.001396
+ MJ=0.3936
+ THETA=1E-6
+ ETA=0.009307
+ KAPPA=2.226
+ GAMMA=0.2
V3 N001 0 5
V2 N002 0 0
V1 N003 0 2
M1 N001 N003 0 N002 BSS83
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.MODEL BSS83 NMOS
.dc V1 0 5 .1 V2 -8 0 4
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1088 680
WIRE 32 256 32 224
WIRE 32 384 32 336
WIRE 128 224 32 224
WIRE 176 144 176 -32
WIRE 176 384 176 240
WIRE 288 -32 176 -32
WIRE 288 0 288 -32
WIRE 288 112 288 80
WIRE 288 192 176 192
WIRE 288 224 288 192
WIRE 288 384 288 304
SYMBOL voltage 32 240 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL voltage 288 208 R0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL nmos4 128 144 R0
SYMATTR InstName M1
SYMATTR Value BSS83
SYMBOL voltage 288 -16 R0
SYMATTR InstName V3
SYMATTR Value 5
FLAG 288 112 0
FLAG 288 384 0
FLAG 32 384 0
FLAG 176 384 0
TEXT 448 0 Left 0 !* GAMMA added\n.MODEL BSS83 NMOS\n+ LEVEL=3\n+ W=1E-3\n+ L=1E-6\n+ VTO=2\n+ VMAX=1E6\n+ RS=3\n+ RD=3\n+ CJ=0.001396\n+ MJ=0.3936\n+ THETA=1E-6\n+ ETA=0.009307\n+ KAPPA=2.226\n+ GAMMA=0.2
TEXT 32 -112 Left 0 !.dc V1 0 5  .1 V2 -8 0 4
TEXT 32 -72 Left 0 !.op
TEXT 32 -496 Left 0 ;Enhanced model of the BSS83 from Philips\n \nSweep of Vgs from 0 to 5V at Vsb=-8, -4, 0V\n.dc V1 0 5  .1 V2 -8 0 4\nPlot Id(M1) to see how Vsb changes the behaviour.\n \nI added GAMMA=0.2 to the model to get the correct Ids(Vgs, Vsb).\nThe simulated drain current is independent of Vsb if GAMMA is \nomitted. This was clearly a missing parameter in the original model.\n \nThe complete ".model"-statement can be also put into a file \nlike BSS83.mod and added with a SPICEdirective.\n.include BSS83.mod
TEXT 720 0 Left 0 ;* Philips model\n.MODEL BSS83 NMOS\n+ LEVEL=3\n+ W=1E-3\n+ L=1E-6\n+ VTO=2\n+ VMAX=1E6\n+ RS=3\n+ RD=3\n+ CJ=0.001396\n+ MJ=0.3936\n+ THETA=1E-6\n+ ETA=0.009307\n+ KAPPA=2.226
* Z:\home\khalils\Downloads\files\data\raw_asc\7ba6bcd91749_Draft5.asc
* Generated by LTspice 26.0.1 for Windows.
vds1 N001 0 1.2
M1 N001 N002 0 0 NMOS l=90nm w=135nm
vgs1 N002 0 1.2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc vds1 0 1.2 0.2 vgs1 0 1.2 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 -64 96 -64
WIRE 96 -16 96 -64
WIRE 16 16 -48 16
WIRE -48 32 -48 16
WIRE 160 32 96 32
WIRE 336 32 336 -64
WIRE 16 64 16 16
WIRE 48 64 16 64
WIRE 96 96 96 80
WIRE 96 96 48 96
WIRE 96 112 96 96
WIRE 160 112 160 32
WIRE 336 112 240 112
WIRE -48 160 -48 112
WIRE 48 160 48 96
WIRE 48 160 -48 160
SYMBOL voltage -48 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vgs1
SYMATTR Value 1.2
SYMBOL voltage 336 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vds1
SYMATTR Value 1.2
SYMBOL nmos4 48 -16 R0
SYMATTR InstName M1
SYMATTR Value2 l=90nm w=135nm
FLAG 96 112 0
FLAG 160 112 0
FLAG 240 112 0
TEXT -80 168 Left 2 !.dc vds1 0 1.2 0.2 vgs1 0 1.2 0.2
* Z:\home\khalils\Downloads\files\data\raw_asc\1c04d071f12b_lab02-Capacitor-battery.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vout 0 100000
V1 Vin 0 PULSE(0 10 0 .001 .001 .004 .010)
C1 Vout 0 0.01 V=100
R2 Vin Vout .1 pwr=0.5
.tran 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 32 16 32
WIRE 304 64 304 32
WIRE 16 96 16 32
WIRE 304 160 304 144
WIRE 400 160 304 160
WIRE 496 160 400 160
WIRE 304 192 304 160
WIRE 448 192 400 160
WIRE 16 272 16 176
WIRE 304 288 304 272
WIRE 400 288 448 256
WIRE 400 288 304 288
WIRE 304 304 304 288
SYMBOL res 288 176 R0
SYMATTR InstName R1
SYMATTR Value 100000
SYMBOL res 288 48 R0
SYMATTR InstName R2
SYMATTR Value .1
SYMATTR SpiceLine pwr=0.5
SYMBOL cap 432 192 R0
WINDOW 3 22 61 Left 0
SYMATTR InstName C1
SYMATTR Value 0.01
SYMATTR SpiceLine V=100
SYMBOL Misc\\battery 16 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -372 102 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 10 0 .001 .001 .004 .010)
FLAG 16 272 0
FLAG 304 304 0
FLAG 16 32 Vin
FLAG 496 160 Vout
TEXT -16 328 Left 0 !.tran 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\3a491cc647e6_CMOSP_500muA.asc
* Generated by LTspice 26.0.1 for Windows.
;dc VG -5 0 0.1
VG N002 0 -2.520
M1 N001 N002 0 0 CMOSP
VD N001 0 -5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.INCLUDE CD4007.lib
.dc VD -5 0 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 464 48 224 48
WIRE 464 80 464 48
WIRE 224 128 224 48
WIRE 176 208 -16 208
WIRE 464 208 464 160
WIRE -16 224 -16 208
WIRE -16 336 -16 304
WIRE 224 336 224 224
SYMBOL voltage 464 64 R0
SYMATTR InstName VD
SYMATTR Value -5
SYMBOL pmos 176 128 R0
SYMATTR InstName M1
SYMATTR Value CMOSP
SYMBOL voltage -16 208 R0
SYMATTR InstName VG
SYMATTR Value -2.520
FLAG -16 336 0
FLAG 224 336 0
FLAG 464 208 0
TEXT 0 0 Left 2 !.INCLUDE CD4007.lib
TEXT 8 56 Left 2 !;dc VG -5 0 0.1
TEXT 16 104 Left 2 !.dc VD -5 0 0.1
* Z:\tmp\asc_dec_bjh7r6w2\0735a965fa72_rc_sensor_v1_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
C8 COM FSHIFT 1.5pF
D3 FINPUT COM D
Cant ANT 0 8pF
C10 COM PWM 1.5pF
D4 0 FINPUT D
C11 PWM 0 1.5pF
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3724 1652
WIRE 1744 -96 1744 -160
WIRE 1744 -96 1696 -96
WIRE 2048 -96 2048 -160
WIRE 2048 -96 2000 -96
WIRE 2320 -96 2320 -160
WIRE 2320 -96 2272 -96
WIRE 1696 -48 1696 -96
WIRE 1744 -48 1744 -96
WIRE 2000 -48 2000 -96
WIRE 2048 -48 2048 -96
WIRE 2272 -48 2272 -96
WIRE 2320 -48 2320 -96
WIRE 1696 48 1696 16
WIRE 1744 48 1744 16
WIRE 1744 48 1696 48
WIRE 1824 48 1744 48
WIRE 2000 48 2000 16
WIRE 2048 48 2048 16
WIRE 2048 48 2000 48
WIRE 2128 48 2048 48
WIRE 2272 48 2272 16
WIRE 2320 48 2320 16
WIRE 2320 48 2272 48
WIRE 2400 48 2320 48
WIRE 1696 80 1696 48
WIRE 1744 80 1744 48
WIRE 2000 80 2000 48
WIRE 2048 80 2048 48
WIRE 2272 80 2272 48
WIRE 2320 80 2320 48
WIRE 1696 176 1696 144
WIRE 1744 176 1744 144
WIRE 1744 176 1696 176
WIRE 2000 176 2000 144
WIRE 2048 176 2048 144
WIRE 2272 176 2272 144
WIRE 2320 176 2320 144
WIRE 2320 176 2272 176
WIRE 1744 224 1744 176
WIRE 2320 224 2320 176
WIRE 48 368 48 288
WIRE 128 368 48 368
WIRE 256 368 128 368
WIRE 48 448 48 368
WIRE 128 448 128 368
WIRE 48 576 48 512
WIRE 128 576 128 512
SYMBOL cap 2032 -48 R0
SYMATTR InstName C8
SYMATTR Value 1.5pF
SYMBOL diode 1712 16 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMBOL cap 32 448 R0
SYMATTR InstName Cant
SYMATTR Value 8pF
SYMBOL cap 2304 -48 R0
SYMATTR InstName C10
SYMATTR Value 1.5pF
SYMBOL diode 1712 144 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMBOL cap 2304 80 R0
SYMATTR InstName C11
SYMATTR Value 1.5pF
FLAG 48 288 ANT
FLAG 48 576 0
FLAG 128 576 0
FLAG 1744 224 0
FLAG 1744 -160 COM
FLAG 1824 48 FINPUT
FLAG 2048 -160 COM
FLAG 2128 48 FSHIFT
FLAG 2320 224 0
FLAG 2320 -160 COM
FLAG 2400 48 PWM
* Z:\tmp\asc_dec_bjh7r6w2\09b54d27db73_switch_mat_new_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
M3 RIGHT S3 N004 G N_1u l=0.9u w=1.8u
M6 N002 S6 N003 G N_1u l=0.9u w=1.8u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1664 832
WIRE 80 192 80 128
WIRE 544 240 544 128
WIRE 544 240 160 240
WIRE 640 240 544 240
WIRE 224 352 224 -64
WIRE 544 352 544 240
WIRE 384 432 272 432
WIRE 768 432 592 432
WIRE 224 560 224 448
WIRE 544 560 544 448
SYMBOL nmos4 592 352 M0
WINDOW 0 -44 28 Left 2
WINDOW 3 -80 58 Left 2
SYMATTR InstName M3
SYMATTR Value N_1u
SYMATTR Value2 l=0.9u w=1.8u
SYMBOL nmos4 272 352 M0
WINDOW 0 -44 29 Left 2
WINDOW 3 -79 64 Left 2
SYMATTR InstName M6
SYMATTR Value N_1u
SYMATTR Value2 l=0.9u w=1.8u
FLAG 768 432 S3
FLAG 384 432 S6
FLAG 640 240 RIGHT
FLAG 224 400 G
FLAG 112 240 G
FLAG 544 400 G
* Z:\home\khalils\Downloads\files\data\raw_asc\927324f61c67_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD795.asy)
R1 0 N004 {RA}
R2 N001 N002 {RA}
R3 N005 N007 {RA}
C4 0 N007 {CA}
V1 0 Vneg 6
C3 N006 N005 {CA}
XU1 N004 N002 Vpos Vneg N002 AD795 ;pnba In+)In-)V+)V-)OUT
V2 Vpos 0 6
C1 N001 N003 {CA}
XU2 N007 N006 Vpos Vneg N006 AD795 ;pnba In+)In-)V+)V-)OUT
R4 N003 N005 {RA}
C2 N004 N001 {CA}
.param RA=100 CA=1u
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 928 680
WIRE -544 -208 -544 -304
WIRE 32 -112 -64 -112
WIRE 400 -112 112 -112
WIRE -544 -80 -544 -128
WIRE -448 -80 -544 -80
WIRE -448 -48 -448 -80
WIRE -544 -32 -544 -80
WIRE 256 0 256 -32
WIRE -176 16 -272 16
WIRE -64 16 -64 -112
WIRE -64 16 -112 16
WIRE -16 16 -64 16
WIRE 112 16 48 16
WIRE 224 16 112 16
WIRE 352 32 288 32
WIRE 400 32 400 -112
WIRE 400 32 352 32
WIRE 224 48 192 48
WIRE 256 96 256 64
WIRE -544 144 -544 48
WIRE 192 176 192 48
WIRE 352 176 352 32
WIRE 352 176 192 176
WIRE 80 288 -64 288
WIRE 400 288 144 288
WIRE 256 400 256 368
WIRE -272 416 -272 16
WIRE -64 416 -64 288
WIRE -64 416 -192 416
WIRE -16 416 -64 416
WIRE 112 416 64 416
WIRE 224 416 112 416
WIRE 352 432 288 432
WIRE 400 432 400 288
WIRE 400 432 352 432
WIRE 112 448 112 416
WIRE 224 448 192 448
WIRE 256 496 256 464
WIRE 192 576 192 448
WIRE 352 576 352 432
WIRE 352 576 192 576
SYMBOL cap 48 0 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {CA}
SYMBOL voltage -544 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 6
SYMBOL cap 128 512 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C4
SYMATTR Value {CA}
SYMBOL res -32 432 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value {RA}
SYMBOL res -288 432 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value {RA}
SYMBOL OpAmps\\AD795 256 496 M180
SYMATTR InstName U2
SYMBOL cap -112 0 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {CA}
SYMBOL res 128 112 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value {RA}
SYMBOL res 16 -96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value {RA}
SYMBOL cap 144 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value {CA}
SYMBOL OpAmps\\AD795 256 96 M180
SYMATTR InstName U1
SYMBOL voltage -544 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 6
FLAG 112 96 0
FLAG 112 512 0
FLAG -448 -48 0
FLAG -544 -304 Vpos
FLAG -544 144 Vneg
FLAG 256 -32 Vneg
FLAG 256 368 Vneg
FLAG 256 96 Vpos
FLAG 256 496 Vpos
TEXT -272 -304 Left 2 !.param RA=100 CA=1u
* Z:\home\khalils\Downloads\files\data\raw_asc\22f8ec86cddd_Fig16_66.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 VGS N002 0 N_50n l=50n w=500n
VGS VGS 0 1
R1 N002 0 1G
VDD N001 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib cmosedu_models.txt
.dc VGS 0 2 1m
* Plot -I(VGS)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1748 680
WIRE 384 -128 384 -144
WIRE 384 -96 384 -128
WIRE 384 16 384 -16
WIRE 576 -144 384 -144
WIRE 624 -224 624 -256
WIRE 624 -96 624 -128
WIRE 624 16 624 -16
WIRE 704 -256 624 -256
WIRE 848 -256 784 -256
WIRE 848 -192 848 -256
FLAG 624 -176 0
FLAG 384 16 0
FLAG 384 -128 VGS
FLAG 848 -192 0
FLAG 624 16 0
SYMBOL nmos4 576 -224 R0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
WINDOW 123 -114 111 Left 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 384 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 40 53 Invisible 0
WINDOW 0 39 62 Left 0
SYMATTR Value 1
SYMATTR InstName VGS
SYMBOL res 608 -112 R0
SYMATTR InstName R1
SYMATTR Value 1G
SYMBOL voltage 688 -256 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 VBottom 0
SYMATTR InstName VDD
SYMATTR Value 1
TEXT 368 80 Left 0 !.lib cmosedu_models.txt
TEXT 368 56 Left 0 !.dc VGS 0 2 1m
TEXT 416 -264 Left 0 ;Plot -I(VGS)
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8538.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8538.asy)
V2 -V 0 -2.5
V1 +V 0 2.5
R1 N001 0 10K
R2 OUT N001 10K
Rload OUT 0 10K
Vin IN 0 SINE(0 1 10K)
XU1 IN N001 +V -V OUT AD8538 ;pnba In+)In-)V+)V-)OUT
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 384 -1104 368 -1104
WIRE 480 -1104 464 -1104
WIRE 496 -1104 480 -1104
WIRE 592 -1104 576 -1104
WIRE 144 -992 144 -1008
WIRE 256 -992 256 -1008
WIRE 480 -992 480 -1104
WIRE 496 -992 480 -992
WIRE 592 -976 592 -1104
WIRE 592 -976 560 -976
WIRE 704 -976 592 -976
WIRE 496 -960 384 -960
WIRE 704 -960 704 -976
WIRE 384 -944 384 -960
WIRE 144 -896 144 -912
WIRE 256 -896 256 -912
WIRE 704 -864 704 -880
WIRE 384 -848 384 -864
SYMBOL voltage 256 -1008 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL voltage 144 -1008 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 592 -1120 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Opamps\\AD8538 528 -1040 R0
SYMATTR InstName U1
SYMBOL res 480 -1120 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 384 -960 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 688 -976 R0
SYMATTR InstName Rload
SYMATTR Value 10K
FLAG 144 -1008 +V
FLAG 144 -896 0
FLAG 384 -848 0
FLAG 704 -976 OUT
FLAG 384 -960 IN
FLAG 528 -1008 +V
FLAG 256 -1008 -V
FLAG 528 -944 -V
FLAG 368 -1104 0
FLAG 704 -864 0
FLAG 256 -896 0
TEXT 736 -768 Left 2 !.tran 1m