Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3066.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3066.asy)
V1 IN 0 10
C4 OUT N002 10n
C3 OUT 0 10 Rser=4m
R1 IN N003 499K
XU1 N001 IN MP_01 IN N003 N004 N005 MP_02 N002 MP_03 OUT MP_04 0 LT3066 ;pnba INFILT)IN))_SHDN)PwrGD)Imax)Ref/Byp))ADJ))OUT))GND
R2 OUT N002 280K
R4 N001 IN 140
C2 N004 0 22n Rpar=604
C1 N005 0 .01
R3 N002 0 61.9K
Rload OUT 0 30
.tran .1 startup
.lib LT3066.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1092 680
WIRE 32 -16 0 -16
WIRE 272 -16 112 -16
WIRE 272 16 272 -16
WIRE 0 80 0 -16
WIRE 0 80 -112 80
WIRE 96 80 0 80
WIRE 144 80 96 80
WIRE 480 80 400 80
WIRE 560 80 480 80
WIRE 672 80 560 80
WIRE 816 80 672 80
WIRE -112 96 -112 80
WIRE 480 96 480 80
WIRE 672 96 672 80
WIRE 816 96 816 80
WIRE 0 144 0 80
WIRE 96 176 96 80
WIRE 144 176 96 176
WIRE 480 176 480 160
WIRE 480 176 400 176
WIRE 560 176 560 160
WIRE 560 176 480 176
WIRE -112 192 -112 176
WIRE 560 192 560 176
WIRE 672 192 672 160
WIRE 816 192 816 176
WIRE 0 272 0 224
WIRE 144 272 0 272
WIRE 432 272 400 272
WIRE 512 272 496 272
WIRE 560 288 560 272
WIRE 64 368 48 368
WIRE 144 368 128 368
WIRE 416 368 400 368
SYMBOL voltage -112 80 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 800 80 R0
SYMATTR InstName Rload
SYMATTR Value 30
SYMBOL cap 656 96 R0
WINDOW 3 35 33 Left 2
WINDOW 39 19 64 Left 2
SYMATTR Value 10
SYMATTR SpiceLine Rser=4m
SYMATTR InstName C3
SYMBOL res -16 128 R0
SYMATTR InstName R1
SYMATTR Value 499K
SYMBOL res 544 64 R0
SYMATTR InstName R2
SYMATTR Value 280K
SYMBOL res 128 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 140
SYMBOL cap 432 288 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
WINDOW 39 -21 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 22n
SYMATTR SpiceLine Rpar=604
SYMBOL res 544 176 R0
SYMATTR InstName R3
SYMATTR Value 61.9K
SYMBOL cap 128 352 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL cap 464 96 R0
SYMATTR InstName C4
SYMATTR Value 10n
SYMBOL LT3066 272 224 R0
SYMATTR InstName U1
FLAG 48 368 0
FLAG -112 192 0
FLAG 560 288 0
FLAG 416 368 0
FLAG 512 272 0
FLAG 672 192 0
FLAG 816 192 0
FLAG -112 80 IN
FLAG 816 80 OUT
TEXT 584 376 Left 2 !.tran .1 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7185-0.5.asc
* Generated by LTspice 26.0.1 for Windows.
C2 OUT 0 4.7 Rser=5m
V1 IN 0 -2
RLOAD OUT 0 1
C1 N001 N002 10n
C3 N001 0 1
C4 N003 0 1
XU2 OUT OUT N001 N002 IN 0 N003 IN ADP7185-0.5 ;pnba Vout)Sense)VA)VAFB)EN)GND)Vreg)Vin
.tran 20m startup
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7185-0.5.asy)
.lib ADP7185-0.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 16 -48
WIRE 96 -48 32 -48
WIRE 112 -48 96 -48
WIRE 400 -48 368 -48
WIRE 432 -48 400 -48
WIRE 496 -48 432 -48
WIRE 512 -48 496 -48
WIRE 16 -32 16 -48
WIRE 432 -32 432 -48
WIRE 512 -32 512 -48
WIRE 400 16 400 -48
WIRE 400 16 368 16
WIRE 432 48 432 32
WIRE 16 64 16 48
WIRE 512 64 512 48
WIRE 96 80 96 -48
WIRE 112 80 96 80
WIRE 464 80 368 80
WIRE 384 144 368 144
WIRE 464 144 464 80
WIRE 464 144 448 144
WIRE 464 160 464 144
WIRE 176 224 176 208
WIRE 304 224 304 208
WIRE 464 240 464 224
WIRE 176 304 176 288
FLAG 16 64 0
FLAG 432 48 0
FLAG 304 224 0
FLAG 512 64 0
FLAG 32 -48 IN
FLAG 496 -48 OUT
FLAG 464 240 0
FLAG 176 304 0
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=5m
SYMBOL voltage 16 -48 R0
SYMATTR InstName V1
SYMATTR Value -2
SYMBOL res 496 -48 R0
SYMATTR InstName RLOAD
SYMATTR Value 1
SYMBOL cap 448 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap 448 160 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 160 224 R0
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL ADP7185-0.5 240 48 R0
SYMATTR InstName U2
TEXT 136 360 Left 2 !.tran 20m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2aeae36cb776_FOCUS_AMP.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1800.asy)
R5 N003 N002 100k
V4 N001 0 2000
C2 N004 N003 100p
R4 N005 0 10k
R2 N002 N007 5k
R12 N001 N006 3Meg
XU2 N005 N002 5v 0 N004 LT1800 ;pnba In+)In-)V+)V-)OUT
R1 vout 0 R=table(time,0,1000Meg,200ms,1000Meg,200.001ms,10Meg, 700ms,10Meg, 700.001ms, 1000Meg)
R3 N006 N005 5Meg
C1 N006 0 100p
R6 vout N006 100k
V1 5v 0 10
Q1 N006 N004 0 0 NPN
V2 N007 0 PULSE(0 2 1p 40ms 40ms 20ms 0 10)
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1s
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2456 680
WIRE 1472 80 1024 80
WIRE 672 128 656 128
WIRE 768 128 752 128
WIRE 944 128 832 128
WIRE 1024 128 1024 80
WIRE 832 208 672 208
WIRE 1024 208 912 208
WIRE 1088 208 1024 208
WIRE 1120 208 1088 208
WIRE 1264 208 1200 208
WIRE 1328 208 1264 208
WIRE 1088 224 1088 208
WIRE 560 240 496 240
WIRE 656 240 656 128
WIRE 656 240 640 240
WIRE 720 240 656 240
WIRE 1328 240 1328 208
WIRE 1472 240 1472 80
WIRE 944 256 944 128
WIRE 944 256 784 256
WIRE 960 256 944 256
WIRE 672 272 672 208
WIRE 720 272 672 272
WIRE 672 288 672 272
WIRE 944 288 944 256
WIRE 976 288 944 288
WIRE -32 320 -80 320
WIRE -16 320 -32 320
WIRE 496 320 496 240
WIRE -80 352 -80 320
WIRE 1024 368 1024 304
WIRE 1072 368 1024 368
WIRE 1088 368 1088 288
WIRE 1088 368 1072 368
WIRE 1072 480 1072 368
SYMBOL Voltage 1472 224 R0
SYMATTR InstName V4
SYMATTR Value 2000
SYMBOL npn 960 208 R0
SYMATTR InstName Q1
SYMBOL Voltage 496 304 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 1p 40ms 40ms 20ms 0 10)
SYMBOL Res 1008 112 R0
SYMATTR InstName R12
SYMATTR Value 3Meg
SYMBOL Res 656 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5k
SYMBOL Cap 1072 224 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL OpAmps/LT1800 752 192 R0
SYMATTR InstName U2
SYMBOL Res 928 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5Meg
SYMBOL Res 1216 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 100k
SYMBOL Cap 832 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL Res 768 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 100k
SYMBOL Voltage -80 336 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL Res 656 272 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL Res 1312 224 R0
SYMATTR InstName R1
SYMATTR Value R=table(time,0,1000Meg,200ms,1000Meg,200.001ms,10Meg, 700ms,10Meg, 700.001ms, 1000Meg)
FLAG -80 432 0
FLAG -32 320 5v
FLAG 752 224 5v
FLAG 1072 480 0
FLAG 1472 320 0
FLAG 752 288 0
FLAG 496 400 0
FLAG 1328 320 0
FLAG 672 368 0
FLAG 1264 208 vout
TEXT 592 528 Left 2 !.tran 1s
* Z:\home\khalils\Downloads\files\data\raw_asc\332541ecc720_pwm-soldering.asc
* Generated by LTspice 26.0.1 for Windows.
* 500kHz SQUARE
* Test falling and rising edge for FET toggling (gate)
Q1 0 base N003 0 BC856B
V2 N001 0 24
R7 N001 N002 1Mega
V1 N004 0 PULSE(0 3.3 0 1ps 1ps 1us 2us 2)
D2 N003 N002 TFZV18B
R3 N005 N004 2k
Q4 npn N005 0 0 2N2222
R4 N006 0 6
R1 base npn 3k
R2 N001 npn 3k3
R5 0 N005 1k
Q3 N001 base N002 0 BC847B
M1 N006 N002 N001 N001 RRS050P03
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 4us 0 10us
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1716 680
WIRE 736 -576 -80 -576
WIRE 1104 -576 736 -576
WIRE 1312 -576 1104 -576
WIRE 1456 -576 1312 -576
WIRE 1312 -512 1312 -576
WIRE 736 -480 736 -576
WIRE 1104 -448 1104 -576
WIRE 992 -400 960 -400
WIRE 1040 -400 992 -400
WIRE 1456 -320 1456 -576
WIRE 1104 -304 1104 -352
WIRE 1312 -304 1312 -432
WIRE 1312 -304 1104 -304
WIRE 1408 -304 1312 -304
WIRE 736 -224 736 -400
WIRE 768 -224 736 -224
WIRE 816 -224 768 -224
WIRE 960 -224 960 -400
WIRE 960 -224 896 -224
WIRE 1104 -224 1104 -304
WIRE 736 -96 736 -224
WIRE 1104 -64 1104 -160
WIRE 496 -48 64 -48
WIRE 624 -48 576 -48
WIRE 672 -48 624 -48
WIRE 1456 -48 1456 -224
WIRE 960 -16 960 -224
WIRE 1040 -16 960 -16
WIRE -80 0 -80 -576
WIRE 64 0 64 -48
WIRE 624 0 624 -48
WIRE -80 112 -80 80
WIRE 64 112 64 80
WIRE 64 112 -80 112
WIRE 624 112 624 80
WIRE 624 112 64 112
WIRE 736 112 736 0
WIRE 736 112 624 112
WIRE 1104 112 1104 32
WIRE 1104 112 736 112
WIRE 1456 112 1456 32
WIRE 1456 112 1104 112
WIRE 64 144 64 112
SYMBOL res 1296 -528 R0
SYMATTR InstName R7
SYMATTR Value 1Mega
SYMBOL npn 672 -96 R0
SYMATTR InstName Q4
SYMATTR Value 2N2222
SYMBOL res 592 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2k
SYMBOL npn 1040 -448 R0
SYMATTR InstName Q3
SYMATTR Value BC847B
SYMBOL pmos 1408 -224 M180
SYMATTR InstName M1
SYMATTR Value RRS050P03
SYMBOL res 640 96 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL pnp 1040 32 M180
SYMATTR InstName Q1
SYMATTR Value BC856B
SYMBOL res 1440 -64 R0
SYMATTR InstName R4
SYMATTR Value 6
SYMBOL voltage -80 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 24
SYMBOL zener 1088 -160 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value TFZV18B
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 912 -240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3k
SYMBOL res 720 -496 R0
SYMATTR InstName R2
SYMATTR Value 3k3
SYMBOL voltage 64 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 1ps 1ps 1us 2us 2)
FLAG 64 144 0
FLAG 768 -224 npn
FLAG 992 -400 base
TEXT 32 168 Left 2 !.tran 0 4us 0 10us
TEXT -88 -624 Left 5 ;500kHz SQUARE
TEXT -88 -688 Left 3 ;Test falling and rising edge for FET toggling (gate)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4223C.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4223C.asy)
V3 VDD1 0 5
XU1 VIA VIB VDD1 0 0 0 VOB N002 0 VOA N001 ADuM4223C ;pnba VIA)VIB)VDD1)GND1)DISABLE)GNDB)VOB)VDDB)GNDA)VOA)VDDA
C3 VOA 0 2n
V1 VIA 0 PULSE(0 5 0 1n 1n 5u 10u)
V6 N002 0 12
C5 VOB 0 2n
C1 0 VDD1 10n
V5 N001 0 12
V2 VIB 0 PULSE(5 0 0 1n 1n 5u 10u)
.tran 50u
.lib ADuM4223C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1216 680
WIRE 656 16 368 16
WIRE 688 16 656 16
WIRE -48 32 -608 32
WIRE 64 32 -48 32
WIRE 688 32 688 16
WIRE -608 80 -608 32
WIRE 560 80 368 80
WIRE -48 112 -464 112
WIRE 64 112 -48 112
WIRE 688 112 688 96
WIRE 432 144 368 144
WIRE -176 192 -336 192
WIRE -64 192 -176 192
WIRE 64 192 -64 192
WIRE -608 224 -608 160
WIRE -464 224 -464 192
WIRE -336 224 -336 192
WIRE 560 224 368 224
WIRE -176 272 -176 192
WIRE -128 272 -176 272
WIRE 0 272 -64 272
WIRE 64 272 0 272
WIRE 432 288 368 288
WIRE -336 320 -336 304
WIRE 0 352 0 272
WIRE 64 352 0 352
WIRE 656 352 368 352
WIRE 688 352 656 352
WIRE 688 368 688 352
WIRE 0 384 0 352
WIRE 688 448 688 432
SYMBOL voltage -464 96 R0
WINDOW 0 20 108 Left 2
WINDOW 3 39 40 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(5 0 0 1n 1n 5u 10u)
SYMBOL voltage -608 64 R0
WINDOW 0 30 80 Left 2
WINDOW 3 18 -5 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 1n 1n 5u 10u)
SYMBOL cap -64 256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap 672 32 R0
SYMATTR InstName C3
SYMATTR Value 2n
SYMBOL voltage -336 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage 560 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 12
SYMBOL cap 672 368 R0
SYMATTR InstName C5
SYMATTR Value 2n
SYMBOL voltage 560 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 12
SYMBOL ADuM4223C 224 112 R0
SYMATTR InstName U1
FLAG -336 320 0
FLAG -608 224 0
FLAG -464 224 0
FLAG 688 112 0
FLAG 688 448 0
FLAG 656 352 VOB
FLAG 656 16 VOA
FLAG 0 384 0
FLAG 432 288 0
FLAG 432 144 0
FLAG -48 32 VIA
FLAG -48 112 VIB
FLAG 560 304 0
FLAG 560 160 0
FLAG -64 192 VDD1
TEXT 64 440 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\4a19c9b5c052_widlar-bandgap.asc
* Generated by LTspice 26.0.1 for Windows.
* Vref = V_BE + R3 / R1 * dV_BE
Q1 N003 N003 0 0 BC547B
VUdc Vin 0 10V
R2 Vref N003 620
R1 N004 0 620
Q2 Vref N002 0 0 BC547B
R4 N001 0 2.2k
R3 Vref N002 6.2k
Q4 Vref N001 Vin 0 BC557C
Q6 N002 N003 N004 0 BC547B
Q3 N001 N001 Vin 0 BC557C
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran .01
.TEMP 0 10 20 30 40 50
.OPTIONS NOOPITER
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1928 680
WIRE 720 -240 656 -240
WIRE 912 -240 720 -240
WIRE 720 -192 720 -240
WIRE 912 -192 912 -240
WIRE 816 -144 784 -144
WIRE 848 -144 816 -144
WIRE 720 -48 720 -96
WIRE 816 -48 816 -144
WIRE 816 -48 720 -48
WIRE 912 -48 912 -96
WIRE 1072 -48 912 -48
WIRE 1216 -48 1072 -48
WIRE 1328 -48 1216 -48
WIRE 1072 -32 1072 -48
WIRE 912 16 912 -48
WIRE 1216 32 1216 -48
WIRE 1072 80 1072 48
WIRE 1152 80 1072 80
WIRE 1072 112 1072 80
WIRE 912 160 912 96
WIRE 912 160 816 160
WIRE 1008 160 912 160
WIRE 720 208 720 -48
WIRE 912 224 912 160
WIRE 1072 240 1072 208
WIRE 816 272 816 160
WIRE 848 272 816 272
WIRE -96 304 -96 256
WIRE 720 384 720 288
WIRE 912 384 912 320
WIRE 912 384 720 384
WIRE 1072 384 1072 320
WIRE 1072 384 912 384
WIRE 1216 384 1216 128
WIRE 1216 384 1072 384
WIRE -96 416 -96 384
WIRE 1216 448 1216 384
IOPIN 656 -240 In
IOPIN -96 256 In
SYMBOL pnp 848 -96 M180
WINDOW 0 49 31 Left 2
WINDOW 3 50 59 Left 2
SYMATTR InstName Q4
SYMATTR Value BC557C
SYMBOL voltage -96 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Udc
SYMATTR Value 10V
SYMBOL npn 1008 112 R0
SYMATTR InstName Q6
SYMATTR Value BC547B
SYMBOL npn 1152 32 R0
SYMATTR InstName Q2
SYMATTR Value BC547B
SYMBOL npn 848 224 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL res 896 0 R0
SYMATTR InstName R2
SYMATTR Value 620
SYMBOL res 1056 224 R0
SYMATTR InstName R1
SYMATTR Value 620
SYMBOL res 704 192 R0
SYMATTR InstName R4
SYMATTR Value 2.2k
SYMBOL pnp 784 -96 R180
WINDOW 0 61 28 Left 2
WINDOW 3 62 56 Left 2
SYMATTR InstName Q3
SYMATTR Value BC557C
SYMBOL res 1056 -48 R0
SYMATTR InstName R3
SYMATTR Value 6.2k
FLAG 1216 448 0
FLAG -96 416 0
FLAG 1328 -48 Vref
FLAG 656 -240 Vin
FLAG -96 256 Vin
TEXT 8 312 Left 2 !.tran .01
TEXT 8 344 Left 2 !.TEMP 0 10 20 30 40 50\n.OPTIONS NOOPITER
TEXT -104 464 Left 2 ;Vref = V_BE + R3 / R1 * dV_BE
* Z:\tmp\asc_dec_bjh7r6w2\1513269bf28e_tc3_sim_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R3 0 N001 20
V2 N002 N001 100
R1 0 N004 25
I2 N004 N003 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 -16 -48 -16
WIRE 240 -16 112 -16
WIRE 352 -16 240 -16
WIRE 240 48 240 -16
WIRE -48 208 -48 -16
WIRE 32 208 -48 208
WIRE 240 208 240 128
WIRE 240 208 112 208
WIRE 352 208 240 208
WIRE 528 208 528 -16
WIRE 528 208 432 208
WIRE 240 256 240 208
WIRE -48 384 -48 208
WIRE 32 384 -48 384
WIRE 240 384 240 336
WIRE 240 384 112 384
WIRE 352 384 240 384
WIRE 528 384 528 208
WIRE 528 384 432 384
SYMBOL res 128 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 20
SYMBOL voltage 128 -16 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value 100
SYMBOL res 224 240 R0
SYMATTR InstName R1
SYMATTR Value 25
SYMBOL current 352 384 R270
WINDOW 0 32 40 VTop 2
WINDOW 3 -32 40 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I2
SYMATTR Value 10
FLAG 240 208 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3008-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3008-5.asy)
XU1 IN OUT OUT 0 IN LT3008-5 ;pnba IN)OUT)Sense)GND)_SHDN
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 1
Rload OUT 0 500
.tran 1
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LT3008-5 176 96 R0
SYMATTR InstName U1
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 336 248 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1211.asc
* Generated by LTspice 26.0.1 for Windows.
* Input Bias Current Cancellation
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1211.asy)
XU1 IN N001 +V 0 OUT LT1211 ;pnba In+)In-)V+)V-)OUT
XU2 N001 N003 +V 0 N002 LT1211 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
R3 N003 N002 1Meg
V3 IN 0 PWL(0 1 1 5)
C1 N003 N002 22p
R4 N002 IN 1Meg
R2 N001 0 5K
R1 OUT N001 5K
.tran 1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 704
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 336 240 256 240
WIRE 64 256 -160 256
WIRE 160 256 64 256
WIRE -288 272 -288 256
WIRE -160 272 -160 256
WIRE 192 288 192 272
WIRE 64 320 64 256
WIRE 128 336 128 224
WIRE 288 336 128 336
WIRE -288 368 -288 352
WIRE -160 368 -160 352
WIRE 224 400 224 384
WIRE 288 416 288 336
WIRE 288 416 256 416
WIRE 64 432 64 400
WIRE 192 432 64 432
WIRE 288 448 256 448
WIRE 224 480 224 464
WIRE 64 528 64 432
WIRE 96 528 64 528
WIRE 288 528 288 448
WIRE 288 528 176 528
WIRE 64 592 64 528
WIRE 192 592 64 592
WIRE 288 592 288 528
WIRE 288 592 256 592
SYMBOL res 192 512 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL voltage -160 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 1 1 5)
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL opamps\\LT1211 192 176 R0
SYMATTR InstName U1
SYMBOL opamps\\LT1211 224 496 R180
WINDOW 0 16 95 Left 2
WINDOW 3 14 36 Left 2
SYMATTR InstName U2
SYMBOL cap 256 576 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 22p
SYMBOL res 48 416 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL voltage -288 256 R0
SYMATTR InstName V1
SYMATTR Value 15
FLAG -288 368 0
FLAG 192 192 +V
FLAG -288 256 +V
FLAG 16 96 0
FLAG -160 368 0
FLAG 224 480 +V
FLAG 192 288 0
FLAG 224 384 0
FLAG 336 240 OUT
FLAG -160 256 IN
TEXT 384 568 Left 2 !.tran 1
TEXT 176 48 Bottom 2 ;Input Bias Current Cancellation
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1763.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1763.asy)
C2 OUT N001 .01
Rload OUT 0 500
C1 OUT 0 10
XU1 OUT OUT 0 N001 IN MP_01 MP_02 IN LT1763 ;pnba OUT)ADJ)GND)BYP)_SHDN)))IN
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT1763.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 32 304 32
WIRE 352 32 320 32
WIRE 432 32 352 32
WIRE 528 32 432 32
WIRE 0 48 -208 48
WIRE 16 48 0 48
WIRE 432 48 432 32
WIRE 528 48 528 32
WIRE -208 64 -208 48
WIRE 352 64 352 32
WIRE 320 96 320 32
WIRE 320 96 304 96
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 432 144 432 112
WIRE 528 144 528 128
WIRE -208 160 -208 144
WIRE 352 160 352 128
WIRE 352 160 304 160
WIRE 160 240 160 208
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT1763 160 96 R0
SYMATTR InstName U1
SYMBOL cap 336 64 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 416 48 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG -208 160 0
FLAG 432 144 0
FLAG 528 144 0
FLAG 160 240 0
FLAG 528 32 OUT
FLAG -208 48 IN
TEXT 368 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2641-12.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2641-12.asy)
V1 N005 0 PULSE(0 3.3 0 0.1n 0.1n 19.8n 40n)
V2 N002 0 5
V3 N003 0 2.5
V5 N001 0 PWL(0 3.3 0.6u 3.3 +2n 0 +0.31u 0 +2n 3.3)
V6 N006 0 PWL(0 3.3 2u 3.3 +2n 0 +30n 0 +2n 3.3)
XU1 N003 N001 N004 N005 N006 OUT N002 0 LTC2641-12 ;pnba REF)_CS)SCLK)DIN)_CLR)Vout)Vdd)GND
V4 N004 0 PULSE(0 3.3 0 0.1n 0.1n 9.9n 20n)
C1 OUT 0 10p
.tran 3u
.lib LTC2641-12.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 932
WIRE 320 16 320 -16
WIRE 432 16 432 -16
WIRE -32 48 -48 48
WIRE 208 48 48 48
WIRE 320 128 320 96
WIRE 432 128 432 96
WIRE -32 176 -48 176
WIRE 160 176 48 176
WIRE 208 176 208 48
WIRE 240 176 208 176
WIRE 160 240 160 176
WIRE 240 240 160 240
WIRE 592 256 512 256
WIRE 592 272 592 256
WIRE -32 304 -48 304
WIRE 240 304 48 304
WIRE 592 352 592 336
WIRE 240 368 176 368
WIRE 384 416 384 400
WIRE -32 448 -48 448
WIRE 176 448 176 368
WIRE 176 448 48 448
SYMBOL voltage 64 448 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -99 VRight 2
SYMATTR InstName V6
SYMATTR Value PWL(0 3.3 2u 3.3 +2n 0 +30n 0 +2n 3.3)
SYMBOL voltage 320 112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 64 176 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -89 VRight 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 3.3 0 0.1n 0.1n 9.9n 20n)
SYMBOL cap 576 272 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 432 112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 2.5
SYMBOL LTC2641-12 384 272 R0
WINDOW 0 0 -48 Center 2
WINDOW 3 0 53 Center 2
SYMATTR InstName U1
SYMBOL voltage 64 304 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -99 VRight 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 0.1n 0.1n 19.8n 40n)
SYMBOL voltage 64 48 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -122 VRight 2
SYMATTR InstName V5
SYMATTR Value PWL(0 3.3 0.6u 3.3 +2n 0 +0.31u 0 +2n 3.3)
FLAG 384 416 0
FLAG -48 304 0
FLAG 320 -16 0
FLAG 432 -16 0
FLAG -48 176 0
FLAG -48 48 0
FLAG -48 448 0
FLAG 592 256 OUT
FLAG 592 352 0
TEXT 256 456 Left 2 !.tran 3u