Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5673R.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5673R.asy)
RLOAD vOUT 0 1k
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
CLOAD vOUT 0 10n
V1 Vdd 0 5
XU2 vDAC Vdd 0 vOUT AD5673R Gain=2 ;pnba Vdac)Vdd)GND)Vout
.tran 50u
.lib AD5673R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 112 112 0 112
WIRE 192 112 112 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
SYMBOL AD5673R -208 112 R0
SYMATTR InstName U2
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -240 -80 Vdd
TEXT -160 312 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1172HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1172HV.asy)
L1 IN N001 150 Rser=0.02 Rpar=5000
V1 IN 0 5
D1 N001 OUT MBRS360
R2 N002 0 1.24K
C3 N004 0 1
XU1 N003 N002 0 N001 IN LT1172 ;pnba Vc)FB)GND)SW)Vin
R3 N003 N004 1K
C1 OUT 0 500 Rser=0.05
Rload OUT 0 24
R1 OUT N002 10.7K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 25m startup
.lib LT1172.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2824 1472
WIRE 1824 880 1616 880
WIRE 1872 880 1824 880
WIRE 1984 880 1952 880
WIRE 2032 880 1984 880
WIRE 2176 880 2096 880
WIRE 2304 880 2176 880
WIRE 2432 880 2304 880
WIRE 1616 896 1616 880
WIRE 2304 896 2304 880
WIRE 2432 896 2432 880
WIRE 2176 928 2176 880
WIRE 1824 944 1824 880
WIRE 1616 992 1616 976
WIRE 2304 992 2304 960
WIRE 2432 992 2432 976
WIRE 1984 1024 1984 880
WIRE 1984 1024 1952 1024
WIRE 2176 1088 2176 1008
WIRE 2176 1088 1952 1088
WIRE 2176 1104 2176 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2176 1200 2176 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
SYMBOL VOLTAGE 1616 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 2160 1088 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
SYMBOL RES 2416 880 R0
SYMATTR InstName Rload
SYMATTR Value 24
SYMBOL PowerProducts\\LT1172HV 1824 1088 R0
SYMATTR InstName U1
SYMBOL IND 1856 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL RES 2160 912 R0
SYMATTR InstName R1
SYMATTR Value 10.7K
SYMBOL schottky 2032 896 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL polcap 2288 896 R0
SYMATTR InstName C1
SYMATTR Value 500
SYMATTR SpiceLine Rser=0.05
FLAG 2432 880 OUT
FLAG 2176 1200 0
FLAG 2304 992 0
FLAG 2432 992 0
FLAG 2064 1248 0
FLAG 1824 1248 0
FLAG 1616 992 0
FLAG 1616 880 IN
TEXT 2184 1248 Left 2 !.tran 25m startup
* Z:\tmp\asc_dec_bjh7r6w2\003c522914f3_Full_Wave_rectification_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V4 V- 0 -15V
Vin input 0 SINE(0 10 1)
R5 output N003 10K
D1 N002 N004 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2216 948
WIRE 1008 96 912 96
WIRE 1120 96 1088 96
WIRE 1136 96 1120 96
WIRE 1248 96 1216 96
WIRE 1312 96 1248 96
WIRE 1424 96 1392 96
WIRE 1120 144 1120 96
WIRE 1424 160 1424 96
WIRE 1248 192 1248 96
WIRE 1296 192 1248 192
WIRE 816 208 768 208
WIRE 912 208 912 96
WIRE 912 208 896 208
WIRE 976 208 912 208
WIRE 1424 208 1424 160
WIRE 1424 208 1360 208
WIRE 1120 224 1120 208
WIRE 1120 224 1040 224
WIRE 1296 224 1248 224
WIRE 976 240 944 240
WIRE 1120 256 1120 224
WIRE 768 272 768 208
WIRE 944 320 944 240
WIRE 912 384 912 208
WIRE 992 384 912 384
WIRE 1120 384 1120 320
WIRE 1248 384 1248 224
SYMBOL voltage 1136 -112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value -15V
SYMBOL voltage 768 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 19 6 Left 2
WINDOW 3 -13 159 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 10 1)
SYMBOL res 1408 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10K
SYMBOL diode 1104 144 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG 992 -16 0
FLAG 992 -96 V+
FLAG 1136 -16 0
FLAG 1136 -96 V-
FLAG 944 320 0
FLAG 768 352 0
FLAG 768 208 input
FLAG 1424 160 output
FLAG 1008 256 V-
FLAG 1328 240 V-
FLAG 1008 192 V+
FLAG 1328 176 V+
* Z:\home\khalils\Downloads\files\data\raw_asc\07662abea9f7_Vswitch.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* This shows an example of suppling a .model statement as a SPICE\ndirective directly on the schematic to define a voltage controlled switch.
S1 0 OUT IN 0 MYSW
R1 N001 OUT 1K
V2 N001 0 3.3
V1 IN 0 PULSE(0 1 0 .5m .5m 0 1m)
.model MYSW SW(Ron=1 Roff=1Meg Vt=.5 Vh=-.4)
.tran 3m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1276 680
WIRE 224 144 192 144
WIRE 336 144 304 144
WIRE 192 176 192 144
WIRE 144 192 -208 192
WIRE 336 192 336 144
WIRE -208 208 -208 192
WIRE 144 240 128 240
WIRE 192 272 192 256
WIRE 336 304 336 272
WIRE -208 320 -208 288
SYMBOL res 320 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -208 192 R0
WINDOW 3 13 107 Left 2
SYMATTR Value PULSE(0 1 0 .5m .5m 0 1m)
SYMATTR InstName V1
SYMBOL voltage 336 176 R0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL sw 192 272 M180
WINDOW 0 12 104 Left 2
WINDOW 3 17 11 Left 2
SYMATTR InstName S1
SYMATTR Value MYSW
FLAG 336 304 0
FLAG 192 272 0
FLAG 128 240 0
FLAG -208 320 0
FLAG -208 192 IN
FLAG 192 144 OUT
TEXT -224 400 Left 2 !.model MYSW SW(Ron=1 Roff=1Meg Vt=.5 Vh=-.4)
TEXT 192 344 Left 2 !.tran 3m
TEXT 96 432 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT 56 88 Bottom 2 ;This shows an example of suppling a .model statement as a SPICE\ndirective directly on the schematic to define a voltage controlled switch.
* Z:\home\khalils\Downloads\files\data\raw_asc\04d445d90134_Draft27.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP27.asy)
;dc V1 0 10 0.01
R2 N001 N002 10k
D1 VOUT N001 D
R1 N003 P10V 10k
D2 N001 VOUT D
V1 P10V 0 10
V3 0 VEE 15
VIN N002 0 SINE(0 10 50)
R4 0 N003 10k
V2 VCC 0 15
V4 0 N10V 10
XU2 N003 N001 VCC VEE VOUT OP27 ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.1
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 904 680
WIRE 384 -64 384 -112
WIRE 384 -64 368 -64
WIRE 448 -64 448 -112
WIRE 368 80 368 -64
WIRE 448 96 448 -64
WIRE -240 32 -304 32
WIRE -64 32 -144 32
WIRE -144 48 -144 32
WIRE -64 48 -64 32
WIRE 288 80 48 80
WIRE 384 80 368 80
WIRE 48 96 48 80
WIRE 528 96 448 96
WIRE 384 112 368 112
WIRE 368 144 368 112
SYMBOL voltage 48 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value SINE(0 10 50)
SYMATTR InstName VIN
SYMBOL res 384 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL diode 384 -48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL voltage -144 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL voltage -304 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 38 43 Left 2
SYMATTR Value 10
SYMATTR InstName V1
SYMBOL OpAmps\\OP27 416 32 R0
SYMATTR InstName U2
SYMBOL res 384 240 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL voltage -304 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 10
SYMBOL res 384 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage -144 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 38 43 Left 2
SYMATTR Value 15
SYMATTR InstName V2
SYMBOL diode 448 -128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
FLAG 48 176 0
FLAG -64 48 0
FLAG 528 96 VOUT
FLAG -144 -48 VCC
FLAG 416 64 VCC
FLAG -144 128 VEE
FLAG 416 128 VEE
FLAG 368 224 0
FLAG -240 32 0
FLAG -304 -48 P10V
FLAG -304 112 N10V
FLAG 288 144 P10V
TEXT -72 264 Left 2 !;dc V1 0 10 0.01
TEXT 136 320 Left 2 !.tran 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\2bf6d43efa56_diode_with_table.asc
* Generated by LTspice 26.0.1 for Windows.
* Diode With Table
G1 N001 N002 N001 N002 table(-100,10m,0,0, 1,1, 2, 50)
V1 N001 0 SINE(0 50 50)
R1 N002 0 10
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 96 -240 96
WIRE 32 128 32 96
WIRE 32 128 -16 128
WIRE 32 144 32 128
WIRE -16 160 -16 128
WIRE -16 240 -16 208
WIRE 32 240 32 224
WIRE 32 240 -16 240
WIRE -240 256 -240 96
WIRE 32 288 32 240
WIRE -240 416 -240 336
WIRE 32 416 32 368
WIRE 32 416 -240 416
WIRE -240 432 -240 416
SYMBOL res 16 272 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage -240 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50 50)
SYMBOL g2 32 240 M180
SYMATTR InstName G1
SYMATTR Value table(-100,10m,0,0, 1,1, 2, 50)
FLAG -240 432 0
TEXT -232 32 Left 0 !.tran 100m
TEXT -232 -8 Left 0 ;Diode With Table
* Z:\home\khalils\Downloads\files\data\raw_asc\LT5400-8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\LT5400-8.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1468.asy)
C2 N002 0 4.7p
C1 N001 OUT 4.7p
V2 -V 0 -15
XU2 N002 N001 +V -V OUT LT1468 ;pnba In+)In-)V+)V-)OUT
XU1 OUT IN 0 0 N002 N002 N001 N001 NC_01 LT5400-8 ;pnba 1)2)3)4)5)6)7)8)PAD
V3 IN 0 AC 1
V1 +V 0 15
.ac oct 10 1K 10Meg
.lib LT5400.lib
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2900 1472
WIRE 2304 624 1936 624
WIRE 1936 688 1936 624
WIRE 2016 688 1936 688
WIRE 2192 688 2080 688
WIRE 1936 816 1936 688
WIRE 1952 816 1936 816
WIRE 2192 816 2192 688
WIRE 2192 816 2144 816
WIRE 1952 880 1744 880
WIRE 2192 880 2192 816
WIRE 2192 880 2144 880
WIRE 1392 896 1392 880
WIRE 1520 896 1520 880
WIRE 1744 896 1744 880
WIRE 2192 896 2192 880
WIRE 2208 896 2192 896
WIRE 2304 912 2304 624
WIRE 2304 912 2272 912
WIRE 2336 912 2304 912
WIRE 2208 928 2192 928
WIRE 1952 944 1936 944
WIRE 2192 944 2192 928
WIRE 2192 944 2144 944
WIRE 1392 992 1392 976
WIRE 1520 992 1520 976
WIRE 1744 992 1744 976
WIRE 1920 1008 1872 1008
WIRE 1952 1008 1920 1008
WIRE 2192 1008 2192 944
WIRE 2192 1008 2144 1008
WIRE 1920 1120 1920 1008
WIRE 2016 1120 1920 1120
WIRE 2192 1120 2192 1008
WIRE 2192 1120 2080 1120
SYMBOL voltage 1744 880 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL misc\\LT5400-8 2048 912 R0
SYMATTR InstName U1
SYMBOL cap 2080 672 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7p
SYMBOL cap 2080 1104 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7p
SYMBOL opamps\\LT1468 2240 848 R0
SYMATTR InstName U2
SYMBOL voltage 1392 880 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 1520 880 R0
SYMATTR InstName V1
SYMATTR Value 15
FLAG 2240 880 +V
FLAG 2240 944 -V
FLAG 2336 912 OUT
FLAG 1520 992 0
FLAG 1520 880 +V
FLAG 1392 992 0
FLAG 1392 880 -V
FLAG 1744 992 0
FLAG 1744 880 IN
FLAG 1872 1008 0
FLAG 1936 944 0
TEXT 2312 1064 Left 2 !.ac oct 10 1K 10Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\2e4729d91f3a_6993-3.asc
* Generated by LTspice 26.0.1 for Windows.
* LTC6993-3 Non-Retriggerable 20ms One Shot\nFalling Edge Triggered, Positive Output Pulse\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6993-3.asy)
R3 N004 0 392K
V2 N001 0 PULSE(0 3.3 0.25m 1n 1n 2m 15m 3)
XU1 N001 0 N003 N004 N002 OUT LTC6993-3 ;pnba TRIG)GND)SET)DIV)V+)OUT
R1 N003 0 243K
R4 OUT 0 100K
R2 N002 N004 1000K
V1 N002 0 5
.tran 60m startup
.lib LTC6993-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -224 96 -240 96
WIRE 96 96 -144 96
WIRE 656 96 320 96
WIRE 656 112 656 96
WIRE 96 176 64 176
WIRE 400 176 320 176
WIRE 560 176 400 176
WIRE 400 192 400 176
WIRE 560 192 560 176
WIRE 656 208 656 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 352 256 320 256
WIRE 352 288 352 256
WIRE 400 288 400 272
WIRE 400 288 352 288
WIRE 560 288 560 272
WIRE 400 304 400 288
WIRE 400 400 400 384
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 243K
SYMBOL res 384 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL SpecialFunctions\\LTC6993-3 208 176 R0
SYMATTR InstName U1
SYMBOL res 384 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
SYMBOL voltage -128 96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0.25m 1n 1n 2m 15m 3)
SYMATTR InstName V2
SYMBOL voltage 560 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 640 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
FLAG -240 96 0
FLAG 560 288 0
FLAG 656 96 OUT
FLAG 656 208 0
FLAG 400 400 0
FLAG -16 256 0
FLAG 64 176 0
TEXT 520 392 Left 2 !.tran 60m startup
TEXT 216 48 Bottom 2 ;LTC6993-3 Non-Retriggerable 20ms One Shot\nFalling Edge Triggered, Positive Output Pulse\nStartup Modeled
* Z:\tmp\asc_dec_bjh7r6w2\02e9de67f2b6_ss-mult-vbe_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
C_comp +mvbe N004 1
R+ +mvbe N001 150
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1364 680
WIRE -144 -256 -144 -384
WIRE -144 -256 -240 -256
WIRE -48 -256 -144 -256
WIRE -48 -240 -48 -256
WIRE -144 -176 -144 -256
WIRE -48 -128 -48 -160
WIRE -48 -128 -80 -128
WIRE -240 -80 -240 -256
WIRE -48 -80 -48 -128
WIRE -144 -32 -144 -80
WIRE -144 16 -144 -32
WIRE -48 64 -80 64
WIRE -240 192 -240 -16
WIRE -144 192 -144 112
SYMBOL cap -256 -80 R0
WINDOW 0 -19 83 VLeft 2
SYMATTR InstName C_comp
SYMATTR Value 1u
SYMBOL res -64 -256 R0
SYMATTR InstName R+
SYMATTR Value 150
FLAG -144 -384 +mvbe
* Z:\tmp\asc_dec_bjh7r6w2\1275d14e8401_SolenoidValveControlCircuit_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R2 gate CTL 200
R3 VREF drain 3k
M1 drain gate 0 0 RSQ045N03
V2 12V 0 12
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 904 680
WIRE 448 -160 320 -160
WIRE 544 -160 544 -208
WIRE 544 -160 448 -160
WIRE 592 -160 544 -160
WIRE 704 -160 672 -160
WIRE 544 -144 544 -160
WIRE 704 -144 704 -160
WIRE 448 -80 448 -160
WIRE 144 -48 128 -48
WIRE 192 -48 144 -48
WIRE 320 -48 320 -80
WIRE 320 -48 192 -48
WIRE 544 -48 544 -64
WIRE 736 -48 544 -48
WIRE 752 -48 736 -48
WIRE 192 -32 192 -48
WIRE 320 -16 320 -48
WIRE 192 64 192 48
WIRE 320 64 240 64
WIRE 448 64 448 -16
WIRE 448 64 320 64
WIRE 544 64 544 32
WIRE 544 64 448 64
WIRE 240 128 240 64
WIRE 240 144 240 128
WIRE -160 224 -160 96
WIRE -160 224 -192 224
WIRE -128 224 -160 224
WIRE 48 224 -48 224
WIRE 144 224 48 224
WIRE 192 224 144 224
WIRE 240 304 240 240
WIRE -160 320 -160 224
WIRE 48 336 48 304
WIRE 240 336 240 304
WIRE -160 432 -160 384
SYMBOL res -32 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL res 304 -32 R0
SYMATTR InstName R3
SYMATTR Value 3k
SYMBOL nmos 192 144 R0
SYMATTR InstName M1
SYMATTR Value RSQ045N03
SYMBOL voltage 576 -160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
FLAG -192 224 CTL
FLAG 240 336 0
FLAG 144 -48 VREF
FLAG 544 -208 12V
FLAG 48 336 0
FLAG 736 -48 OUTPUT
FLAG 704 -144 0
FLAG 192 64 0
FLAG 144 224 gate
FLAG 240 128 drain
FLAG 240 304 source
* Z:\home\khalils\Downloads\files\data\raw_asc\29245fd77ee8_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
R4 N005 0 {R2}
XU1 N003 N005 N006 0 N004 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 N001 0 AC 1 0
R2 N003 N002 {Rl}
C2 0 N003 {Cl}
V2 N006 0 5
C1 N002 N001 {Ch}
R3 N004 N005 {R1}
R1 N002 0 {Rh}
.param Ch=0.1u Rh=10k Rl=10k Cl=0.1u
.param R1=10k R2=10k
.ac dec 1000 0.01 20
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 916 680
WIRE 128 -64 16 -64
WIRE 272 -64 192 -64
WIRE 352 -64 272 -64
WIRE 480 -64 432 -64
WIRE 560 -64 480 -64
WIRE 560 -32 560 -64
WIRE 688 -32 560 -32
WIRE 816 -16 752 -16
WIRE 912 -16 816 -16
WIRE 16 0 16 -64
WIRE 688 0 656 0
WIRE 272 16 272 -64
WIRE 816 16 816 -16
WIRE 480 32 480 -64
WIRE 656 96 656 0
WIRE 816 96 656 96
WIRE 16 128 16 80
WIRE 272 128 272 96
WIRE 272 128 16 128
WIRE 480 128 480 96
WIRE 480 128 272 128
WIRE 16 144 16 128
WIRE 720 176 720 16
SYMBOL res 800 0 R0
SYMATTR InstName R3
SYMATTR Value {R1}
SYMBOL voltage 16 -16 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMBOL OpAmps\\UniversalOpamp 720 -16 M180
SYMATTR InstName U1
SYMBOL res 448 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {Rl}
SYMBOL voltage 720 160 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL cap 496 96 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value {Cl}
SYMBOL cap 192 -80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {Ch}
SYMBOL res 256 0 R0
SYMATTR InstName R1
SYMATTR Value {Rh}
SYMBOL res 800 80 R0
SYMATTR InstName R4
SYMATTR Value {R2}
FLAG 16 144 0
FLAG 816 176 0
FLAG 720 256 0
FLAG 720 -48 0
TEXT -48 232 Left 2 !.param Ch=0.1u Rh=10k Rl=10k Cl=0.1u
TEXT -40 272 Left 2 !.param R1=10k R2=10k
TEXT -40 312 Left 2 !.ac dec 1000 0.01 20
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8336.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8336.asy)
V4 VPOS 0 5
V3 PWRA 0 0
R3 PRAO INPN 301
V2 N002 0 {Vgain}
R1 OUT 0 500
XU1 OUT PWRA 0 INPP INPN PRAO PRAO N001 N002 0 VPOS AD8336 ;pnba VOUT)PWRA)VCOM)INPP)INPN)PRAO)VGAI)VNEG)GPOS)GNEG)VPOS
V5 N001 0 -5
V1 INPP 0 0 AC 1
R2 INPN 0 100
.op
.ac dec 20 100k 500Meg
.step param Vgain list -0.7 -0.5 -0.2 0 0.2 0.5 0.7
.lib AD8336.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -192 -160 -208 -160
WIRE -32 -160 -112 -160
WIRE 16 -160 0 -160
WIRE 112 -160 96 -160
WIRE -208 -144 -208 -160
WIRE 112 -144 112 -160
WIRE -32 -112 -32 -160
WIRE 0 -112 0 -160
WIRE -32 -64 -32 -112
WIRE 0 -64 0 -112
WIRE -416 -16 -432 -16
WIRE -112 -16 -336 -16
WIRE -64 -16 -112 -16
WIRE 208 0 160 0
WIRE 352 0 208 0
WIRE -432 16 -432 -16
WIRE -112 16 -304 16
WIRE -64 16 -112 16
WIRE -304 64 -304 16
WIRE -272 64 -304 64
WIRE -176 64 -192 64
WIRE -112 64 -176 64
WIRE -64 64 -112 64
WIRE 352 64 352 0
WIRE -176 96 -176 64
WIRE 32 96 32 64
WIRE 32 96 -176 96
WIRE 48 96 48 64
WIRE 48 96 32 96
WIRE 80 96 80 64
WIRE 112 96 112 64
WIRE 112 96 80 96
WIRE -304 112 -304 64
WIRE 80 112 80 96
WIRE -16 128 -16 64
WIRE 144 128 144 64
WIRE 352 160 352 144
WIRE -304 224 -304 192
WIRE -16 224 -16 208
WIRE 144 224 144 208
SYMBOL voltage 0 -160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V3
SYMATTR Value 0
SYMBOL voltage -16 112 R0
SYMATTR InstName V5
SYMATTR Value -5
SYMBOL voltage -320 -16 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value 0 AC 1
SYMBOL res -320 96 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL voltage -96 -160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL voltage 144 112 R0
SYMATTR InstName V2
SYMATTR Value {Vgain}
SYMBOL res 336 48 R0
SYMATTR InstName R1
SYMATTR Value 500
SYMBOL AD8336 -16 -48 R0
SYMATTR InstName U1
SYMBOL res -176 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 301
FLAG 352 160 0
FLAG 208 0 OUT
FLAG -432 16 0
FLAG 144 224 0
FLAG 112 -144 0
FLAG -208 -144 0
FLAG -32 -112 VPOS
FLAG -16 224 0
FLAG 80 112 0
FLAG -112 16 INPN
FLAG -112 64 PRAO
FLAG -304 224 0
FLAG -112 -16 INPP
FLAG 0 -112 PWRA
TEXT -160 -352 Left 2 !.op\n.ac dec 20 100k 500Meg
TEXT -160 -296 Left 2 !.step param Vgain list -0.7 -0.5 -0.2 0 0.2 0.5 0.7