* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3831-1.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N011 0 0.022
C2 N007 0 0.01
R1 N012 N011 1K
MQ1 IN N005 N003 N003 Si4410DY
MQ2 N003 N008 0 0 Si4410DY
R2 N003 N006 1K
R3 IN N004 4.7K
D1 N001 N002 MBR0520L
C3 N003 N002 0.1
L1 N003 OUT 1.3 Rser=1m
C4 OUT 0 180 Rser=10m
V1 N001 0 5
V2 IN 0 2.5
C5 N012 0 68p
Rload OUT 0 5
XU2 N005 N002 0 0 0 OUT IN N010 N007 N012 N009 N004 N006 N001 N001 N008 LTC3831-1 ;pnba TG)PVcc1)PGND)SGND)R-)FB)R+)_SHDN)SS)Comp)Freq)Imax)Ifb)Vcc)PVcc2)BG
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1.5m startup
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3831-1.asy)
.lib LTC3831-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2712 1636
WIRE 2128 992 1520 992
WIRE 2272 992 2128 992
WIRE 2400 992 2272 992
WIRE 2432 992 2400 992
WIRE 1472 1008 1392 1008
WIRE 1680 1008 1472 1008
WIRE 1808 1008 1680 1008
WIRE 2272 1008 2272 992
WIRE 1392 1024 1392 1008
WIRE 1808 1024 1808 1008
WIRE 1520 1040 1520 992
WIRE 2272 1104 2272 1088
WIRE 1392 1120 1392 1104
WIRE 1808 1120 1808 1088
WIRE 1952 1120 1808 1120
WIRE 2048 1120 2016 1120
WIRE 2128 1120 2128 992
WIRE 1680 1136 1680 1008
WIRE 1808 1136 1808 1120
WIRE 1520 1200 1520 1120
WIRE 1552 1200 1520 1200
WIRE 2080 1200 1936 1200
WIRE 2048 1232 2048 1120
WIRE 2128 1232 2128 1216
WIRE 2128 1232 2048 1232
WIRE 2256 1232 2128 1232
WIRE 2368 1232 2336 1232
WIRE 2128 1248 2128 1232
WIRE 1472 1264 1472 1008
WIRE 1552 1264 1472 1264
WIRE 1952 1264 1936 1264
WIRE 2048 1264 2048 1232
WIRE 2048 1264 2032 1264
WIRE 1456 1328 1424 1328
WIRE 1552 1328 1520 1328
WIRE 2080 1328 1936 1328
WIRE 2128 1360 2128 1344
WIRE 1552 1392 1536 1392
WIRE 2432 1392 2432 992
WIRE 2432 1392 1936 1392
WIRE 1552 1456 1536 1456
WIRE 2368 1456 2368 1232
WIRE 2368 1456 1936 1456
WIRE 2464 1456 2368 1456
WIRE 2496 1456 2464 1456
WIRE 2368 1472 2368 1456
WIRE 2496 1472 2496 1456
WIRE 1360 1520 1312 1520
WIRE 1488 1520 1440 1520
WIRE 1552 1520 1488 1520
WIRE 1952 1520 1936 1520
WIRE 1312 1536 1312 1520
WIRE 1488 1536 1488 1520
WIRE 2368 1568 2368 1536
WIRE 2496 1568 2496 1552
WIRE 1680 1600 1680 1584
WIRE 1808 1600 1808 1584
WIRE 1312 1616 1312 1600
WIRE 1488 1616 1488 1600
FLAG 1312 1616 0
FLAG 1424 1328 0
FLAG 1952 1520 0
FLAG 1808 1600 0
FLAG 1680 1600 0
FLAG 2128 1360 0
FLAG 2368 1568 0
FLAG 2496 1568 0
FLAG 1392 1120 0
FLAG 2464 1456 OUT
FLAG 2272 1104 0
FLAG 1488 1616 0
FLAG 2400 992 IN
SYMBOL cap 1296 1536 R0
SYMATTR InstName C1
SYMATTR Value 0.022
SYMBOL cap 1520 1312 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 0.01
SYMBOL RES 1456 1504 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL NMOS 2080 1120 R0
SYMATTR InstName Q1
SYMATTR Value Si4410DY
SYMBOL nmos 2080 1248 R0
SYMATTR InstName Q2
SYMATTR Value Si4410DY
SYMBOL res 2048 1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 1504 1024 R0
SYMATTR InstName R3
SYMATTR Value 4.7K
SYMBOL schottky 1792 1024 R0
SYMATTR InstName D1
SYMATTR Value MBR0520L
SYMBOL cap 2016 1104 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 0.1
SYMBOL ind 2240 1248 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.3
SYMATTR SpiceLine Rser=1m
SYMBOL cap 2352 1472 R0
SYMATTR InstName C4
SYMATTR Value 180
SYMATTR SpiceLine Rser=10m
SYMBOL VOLTAGE 1392 1008 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL VOLTAGE 2272 992 R0
SYMATTR InstName V2
SYMATTR Value 2.5
SYMBOL cap 1472 1536 R0
SYMATTR InstName C5
SYMATTR Value 68p
SYMBOL res 2480 1456 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL LTC3831-1 1744 1360 R0
SYMATTR InstName U2
TEXT 2088 1584 Left 2 !.tran 1.5m startup