Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1c7e1a267cbf_stepping_models_1.asc
* Generated by LTspice 26.0.1 for Windows.
* Example provided by Mike Engelhardt from Linear Technology.
I1 0 B 0
V1 C 0 0
Q1 C B 0 0 {M}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 3 1m I1 20u 100u 20u
.model 3 NPN(BF=100)
.model 4 NPN(BF=101)
.model 5 NPN(BF=102)
.STEP param M list 3 4 5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 384 32 368
WIRE 32 288 32 272
WIRE 32 272 128 272
WIRE 192 384 192 320
WIRE 192 224 192 192
WIRE 192 192 336 192
WIRE 336 192 336 224
WIRE 336 304 336 384
SYMBOL voltage 336 208 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL current 32 368 M180
WINDOW 0 24 79 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName I1
SYMATTR Value 0
SYMBOL npn 128 224 R0
SYMATTR InstName Q1
SYMATTR Value {M}
FLAG 192 384 0
FLAG 336 384 0
FLAG 32 384 0
FLAG 192 192 C
FLAG 32 272 B
TEXT 16 456 Left 0 !.dc V1 0 3 1m I1 20u 100u 20u
TEXT 520 200 Left 0 !.model 3 NPN(BF=100)
TEXT 520 232 Left 0 !.model 4 NPN(BF=101)
TEXT 520 264 Left 0 !.model 5 NPN(BF=102)
TEXT 520 320 Left 0 !.STEP param M list 3 4 5
TEXT 8 80 Left 0 ;Example provided by Mike Engelhardt from Linear Technology.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1109-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1109-5.asy)
XU1 IN MP_01 N001 0 MP_02 MP_03 N002 OUT LT1109 top=250K bot=83K ;pnba Vin))SW)GND)))_SDN)Sense
D1 N001 OUT MBRS140
L1 IN N001 33 Rser=0.02 Rpar=5000
C1 OUT 0 22 Rser=0.02
Rload OUT 0 50
V1 IN 0 3 Rser=0.1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m startup
.lib LT1109.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2376 1416
WIRE 1520 944 1296 944
WIRE 1584 944 1520 944
WIRE 1696 944 1664 944
WIRE 1760 944 1696 944
WIRE 1888 944 1824 944
WIRE 2000 944 1888 944
WIRE 1296 960 1296 944
WIRE 2000 960 2000 944
WIRE 1520 1008 1520 944
WIRE 1296 1056 1296 1040
WIRE 2000 1056 2000 1040
WIRE 1696 1072 1696 944
WIRE 1696 1072 1648 1072
WIRE 1392 1104 1360 1104
WIRE 1888 1136 1888 944
WIRE 1888 1136 1648 1136
WIRE 1888 1152 1888 1136
WIRE 1888 1232 1888 1216
WIRE 1520 1248 1520 1200
SYMBOL res 1984 944 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL VOLTAGE 1296 944 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMATTR SpiceLine Rser=0.1
SYMBOL IND 1568 960 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL schottky 1760 960 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL PowerProducts\\LT1109-5 1520 1088 R0
SYMATTR InstName U1
SYMBOL POLCAP 1872 1152 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine Rser=0.02
FLAG 2000 944 OUT
FLAG 1888 1232 0
FLAG 2000 1056 0
FLAG 1296 1056 0
FLAG 1520 1248 0
FLAG 1296 944 IN
TEXT 1656 1264 Left 2 !.tran 3m startup
* Z:\tmp\asc_dec_bjh7r6w2\0a1b45b0cdab_sim6_2nd_order_sinc_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
Vclk clk 0 PULSE(0V 5V 10n 0.1n 0.1n 4n 10n)
Vdd Vdd 0 5V
Vrst rst 0 PULSE(5V 0V 25n 0.1n 0.1n 10m)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1064 680
SYMBOL voltage -208 -320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -42 138 Left 2
SYMATTR Value PULSE(0V 5V 10n 0.1n 0.1n 4n 10n)
SYMATTR InstName Vclk
SYMBOL voltage -48 -496 R0
SYMATTR InstName Vdd
SYMATTR Value 5V
SYMBOL voltage 224 -496 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vrst
SYMATTR Value PULSE(5V 0V 25n 0.1n 0.1n 10m)
FLAG -48 -400 0
FLAG -48 -480 Vdd
FLAG 96 -400 0
FLAG 96 -480 Vref
FLAG -208 -224 0
FLAG -208 -304 clk
FLAG 224 -400 0
FLAG 224 -480 rst
FLAG -208 -400 0
FLAG -208 -480 Vss
FLAG 224 -304 clki
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8052A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8052A.asy)
R2 N007 0 90.9K
XU1 0 N001 N002 N002 OUT N002 MP_01 N006 MP_02 N004 MP_03 MP_04 MP_05 N005 N007 MP_06 MP_07 MP_08 MP_09 MP_10 MP_11 MP_12 MP_13 MP_14 MP_15 MP_16 MP_17 IN LTM8052A ;pnba GND)RUN)Vref)CTL_T)Vout)CTL_I))SS))ADJ))))Comp)Rt)))))))))))))Vin
R1 IN N001 510K
C2 OUT 0 100 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C575OX5ROJI07M" type="X5R"
C1 OUT 0 330 V=6.3 Irms=3.9 Rser=0.01 Lser=0 mfg="KEMET" pn="T520D337M006ASE010" type="Tantalum"
V1 IN 0 24
R3 N004 0 9.09K
Rload OUT 0 .5
.tran 1.2m startup
.lib LTM8052A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 -80 -144 -80
WIRE 208 -80 -32 -80
WIRE -144 -64 -144 -80
WIRE -32 -64 -32 -80
WIRE 208 -32 208 -80
WIRE -144 32 -144 16
WIRE -32 32 -32 16
WIRE 64 32 -32 32
WIRE 432 32 352 32
WIRE 528 32 432 32
WIRE 624 32 528 32
WIRE 432 48 432 32
WIRE 528 48 528 32
WIRE 624 48 624 32
WIRE 64 128 48 128
WIRE 368 128 352 128
WIRE 432 144 432 112
WIRE 528 144 528 112
WIRE 624 144 624 128
WIRE 48 224 48 128
WIRE 64 224 48 224
WIRE 368 224 352 224
WIRE 464 224 448 224
WIRE 48 320 48 224
WIRE 64 320 48 320
WIRE 368 320 352 320
WIRE 64 416 48 416
WIRE 368 416 352 416
WIRE 464 416 448 416
WIRE 208 496 208 480
SYMBOL voltage -144 -80 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 352 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 9.09K
SYMBOL res 608 32 R0
SYMATTR InstName Rload
SYMATTR Value .5
SYMBOL res 352 432 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 90.9K
SYMBOL res -48 -80 R0
SYMATTR InstName R1
SYMATTR Value 510K
SYMBOL polcap 416 48 R0
WINDOW 3 24 64 Left 2
SYMATTR Value 330
SYMATTR InstName C1
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=6.3 Irms=3.9 Rser=0.01 Lser=0 mfg="KEMET" pn="T520D337M006ASE010" type="Tantalum"
SYMBOL PowerProducts\\LTM8052A 208 224 R0
SYMATTR InstName U1
SYMBOL cap 512 48 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C575OX5ROJI07M" type="X5R"
FLAG 208 496 0
FLAG -144 32 0
FLAG -144 -80 IN
FLAG 464 416 0
FLAG 464 224 0
FLAG 624 144 0
FLAG 432 144 0
FLAG 624 32 OUT
FLAG 528 144 0
TEXT 472 320 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\85c928810a0c_Circuito6.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 AC 1
L1 N001 N002 1m
C1 N002 N003 10n
R1 N003 0 50
.ac dec 10000 1 10Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 112 0 112
WIRE 160 112 128 112
WIRE 288 112 224 112
WIRE 0 144 0 112
WIRE 288 144 288 112
WIRE 0 256 0 224
WIRE 288 256 288 224
WIRE 288 256 0 256
WIRE 0 288 0 256
SYMBOL cap 160 128 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL voltage 0 128 R0
WINDOW 123 24 100 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL ind 32 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1m
SYMBOL res 272 128 R0
SYMATTR InstName R1
SYMATTR Value 50
FLAG 0 288 0
TEXT -32 312 Left 2 !.ac dec 10000 1 10Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\b01b1d5aa9ae_1078A.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
R1 N002 N001 200K
R2 N001 IN 200K
V3 IN 0 SINE(0 1 100)
D1 N003 N002 1N4148
XU1 0 N001 +V 0 N003 LT1078 ;pnba In+)In-)V+)V-)OUT
XU2 N002 OUT +V 0 OUT LT1078 ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
* Absolute Value Circuit(Full-Wave Rectifier)
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1078A.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 -80 96
WIRE 128 96 112 96
WIRE 224 96 128 96
WIRE 416 96 304 96
WIRE -80 112 -80 96
WIRE 544 128 432 128
WIRE -192 160 -192 144
WIRE 480 192 480 176
WIRE -80 208 -80 192
WIRE 192 208 192 192
WIRE 432 208 432 128
WIRE 448 208 432 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 544 224 544 128
WIRE 544 224 512 224
WIRE 576 224 544 224
WIRE 336 240 224 240
WIRE 416 240 416 96
WIRE 416 240 400 240
WIRE 448 240 416 240
WIRE -192 256 -192 240
WIRE 160 256 128 256
WIRE 480 272 480 256
WIRE 192 288 192 272
FLAG -192 256 0
FLAG 192 192 +V
FLAG -192 144 +V
FLAG -80 208 0
FLAG 192 288 0
FLAG 480 176 +V
FLAG 480 272 0
FLAG -80 96 IN
FLAG 576 224 OUT
FLAG 128 256 0
SYMBOL voltage -192 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 320 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200K
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL voltage -80 96 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
SYMBOL diode 336 256 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL opamps\\LT1078A 192 176 R0
SYMATTR InstName U1
SYMBOL opamps\\LT1078A 480 160 R0
SYMATTR InstName U2
TEXT 448 336 Left 2 !.tran 30m
TEXT 392 32 Bottom 2 ;Absolute Value Circuit(Full-Wave Rectifier)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4702.asc
* Generated by LTspice 26.0.1 for Windows.
* Vin=12V, Vout=1V/8A
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4702.asy)
C3 OUT 0 100 Rser = 5m
Rload OUT 0 0.124
R3 OUT N004 49.9k
XU1 NC_01 NC_02 0 NC_03 IN OUT IN IN NC_04 NC_05 N005 N003 OUT N004 N001 N002 N003 0 0 LTM4702 ;pnba SW)SYNC)GND)CLKOUT)VIN)VOUT)SVIN)RUN)INTVCC)PHMODE)SET)COMPA)VOSNS)PGSET)RT)PG)COMBP)TSENSE+)TSENSE-
R6 N005 0 10k
V1 IN 0 12
C2 OUT 0 100 Rser=5m
R1 N001 0 137k
C4 N005 0 0.33
R5 OUT N002 100k
.tran 5m startup
.lib LTM4702.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2216 900
WIRE -368 -896 -752 -896
WIRE -176 -896 -368 -896
WIRE -752 -848 -752 -896
WIRE -176 -816 -176 -896
WIRE -368 -768 -368 -896
WIRE -320 -768 -368 -768
WIRE 96 -768 -32 -768
WIRE 224 -768 96 -768
WIRE 384 -768 224 -768
WIRE 544 -768 384 -768
WIRE 704 -768 544 -768
WIRE 880 -768 704 -768
WIRE -752 -752 -752 -768
WIRE 880 -752 880 -768
WIRE 224 -736 224 -768
WIRE 384 -736 384 -768
WIRE 544 -736 544 -768
WIRE 704 -736 704 -768
WIRE -368 -672 -368 -768
WIRE -320 -672 -368 -672
WIRE 96 -672 96 -768
WIRE 96 -672 -32 -672
WIRE 544 -624 544 -672
WIRE 704 -624 704 -672
WIRE 704 -624 544 -624
WIRE 704 -608 704 -624
WIRE 880 -608 880 -672
WIRE -512 -576 -592 -576
WIRE -320 -576 -432 -576
WIRE 224 -576 224 -656
WIRE 224 -576 -32 -576
WIRE -320 -480 -368 -480
WIRE 384 -480 384 -656
WIRE 384 -480 -32 -480
WIRE -368 -384 -368 -480
WIRE -320 -384 -368 -384
WIRE 144 -288 -32 -288
WIRE 240 -288 144 -288
WIRE 144 -256 144 -288
WIRE 240 -256 240 -288
WIRE 16 -96 -32 -96
WIRE 16 0 16 -96
WIRE 16 0 -32 0
WIRE -176 80 -176 48
WIRE 16 80 16 0
WIRE 16 80 -176 80
WIRE 144 80 144 -192
WIRE 144 80 16 80
WIRE 240 80 240 -176
WIRE 240 80 144 80
WIRE -176 112 -176 80
SYMBOL res -416 -592 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 137k
SYMBOL cap 688 -736 R0
WINDOW 3 34 31 Left 2
WINDOW 39 34 50 Left 2
SYMATTR Value 100
SYMATTR SpiceLine Rser=5m
SYMATTR InstName C2
SYMBOL res 224 -272 R0
SYMATTR InstName R6
SYMATTR Value 10k
SYMBOL res 368 -752 R0
SYMATTR InstName R3
SYMATTR Value 49.9k
SYMBOL cap 128 -256 R0
SYMATTR InstName C4
SYMATTR Value 0.33
SYMBOL cap 528 -736 R0
WINDOW 3 31 29 Left 2
WINDOW 39 35 49 Left 2
SYMATTR Value 100
SYMATTR SpiceLine Rser = 5m
SYMATTR InstName C3
SYMBOL voltage -752 -864 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 864 -768 R0
SYMATTR InstName Rload
SYMATTR Value 0.124
SYMBOL res 208 -752 R0
SYMATTR InstName R5
SYMATTR Value 100k
SYMBOL LTM4702 -176 -512 R0
SYMATTR InstName U1
FLAG -752 -752 0
FLAG -592 -576 0
FLAG 880 -608 0
FLAG 880 -768 OUT
FLAG -752 -896 IN
FLAG 704 -608 0
FLAG -176 112 0
TEXT 8 -952 Left 2 !.tran 5m startup
TEXT -280 -952 Left 2 ;Vin=12V, Vout=1V/8A
* Z:\home\khalils\Downloads\files\data\raw_asc\2457b9765153_1.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 0.9
M1 N001 N002 0 0 efremov
V1 N002 0 V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model efremov nmos VTO=0.34 LAMBDA=0.05 TOX=3.6n UO=353 l=0.18u w=9u
.dc V1 0 2.34 0.01 V2 0 2 0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 96 144 96
WIRE 384 144 384 96
WIRE 96 176 -48 176
WIRE -48 208 -48 176
WIRE -48 320 -48 288
WIRE -16 320 -48 320
WIRE 144 320 144 192
WIRE 144 320 -16 320
WIRE 384 320 384 224
WIRE 384 320 144 320
SYMBOL voltage 384 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0.9
SYMBOL voltage -48 192 R0
SYMATTR InstName V1
SYMBOL nmos 96 96 R0
SYMATTR InstName M1
SYMATTR Value efremov
FLAG -16 320 0
TEXT -72 360 Left 2 !.model efremov nmos VTO=0.34 LAMBDA=0.05 TOX=3.6n UO=353 l=0.18u w=9u
TEXT -72 392 Left 2 !.dc V1 0 2.34 0.01 V2 0 2 0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3420-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3420-1.asy)
R1 N003 N002 51.1K
K1 L1 L2 1
L1 IN N003 20 Rpar=2K Rser=.1
R2 N006 0 2K
C1 OUT 0 .1 Rpar=.1Meg
R3 N004 IN 10K
D1 N001 OUT D
XU1 N006 IN N002 IN 0 N003 N005 N004 IN N007 LT3420-1 ;pnba Rref)Vbat)Rfb)Vcc)GND)SW)SEC)Done)Charge)Ct
L2 N005 N001 {20u*12*12} Rpar=1Meg
V1 IN 0 5
C2 N007 0 1n
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m startup
.lib LT3420-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2740 1752
WIRE 1616 1040 1536 1040
WIRE 1808 1040 1616 1040
WIRE 2064 1040 1808 1040
WIRE 2192 1040 2112 1040
WIRE 2304 1040 2256 1040
WIRE 1536 1056 1536 1040
WIRE 2064 1056 2064 1040
WIRE 2112 1056 2112 1040
WIRE 2304 1056 2304 1040
WIRE 1536 1152 1536 1136
WIRE 2304 1152 2304 1120
WIRE 1968 1184 1936 1184
WIRE 2064 1184 2064 1136
WIRE 2064 1184 2048 1184
WIRE 1808 1232 1808 1040
WIRE 1936 1232 1936 1184
WIRE 1616 1312 1616 1040
WIRE 1728 1312 1616 1312
WIRE 2064 1312 2064 1184
WIRE 2064 1312 2016 1312
WIRE 1616 1392 1616 1312
WIRE 1632 1392 1616 1392
WIRE 1728 1392 1712 1392
WIRE 2112 1392 2112 1136
WIRE 2112 1392 2016 1392
WIRE 1616 1472 1616 1392
WIRE 1728 1472 1616 1472
WIRE 2032 1472 2016 1472
WIRE 2128 1472 2112 1472
WIRE 1808 1568 1808 1552
WIRE 1936 1568 1936 1552
WIRE 1808 1648 1808 1632
SYMBOL RES 2064 1168 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 51.1K
SYMBOL VOLTAGE 1536 1040 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2016 1488 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 2K
SYMBOL cap 1792 1568 R0
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL ind2 2128 1152 R180
WINDOW 0 -3 72 Right 2
WINDOW 3 0 43 Right 2
SYMATTR InstName L2
SYMATTR Value {20u*12*12}
SYMATTR SpiceLine Rpar=1Meg
SYMBOL PowerProducts\\LT3420-1 1872 1392 R0
SYMATTR InstName U1
SYMBOL ind2 2048 1040 R0
WINDOW 0 -6 35 Right 2
WINDOW 3 -4 73 Right 2
SYMATTR InstName L1
SYMATTR Value 20
SYMATTR SpiceLine Rpar=2K Rser=.1
SYMBOL diode 2192 1056 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL cap 2288 1056 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMATTR SpiceLine Rpar=.1Meg
SYMBOL res 1728 1376 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
FLAG 2304 1152 0
FLAG 2128 1472 0
FLAG 1936 1568 0
FLAG 1808 1648 0
FLAG 1536 1152 0
FLAG 2304 1040 OUT
FLAG 1536 1040 IN
TEXT 2200 1328 Left 2 !.tran 10m startup
TEXT 2088 1040 Bottom 2 !K1 L1 L2 1
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8628.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8628.asy)
V1 +V 0 2.5
Rload OUT 0 10K
R1 N001 0 10K
XU1 IN N001 +V -V OUT AD8628 ;pnba In+)In-)V+)V-)OUT
Vin IN 0 SINE(0 1 10K)
V2 -V 0 -2.5
R2 OUT N001 10K
.tran 1m
.lib AD8628.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE -16 -1056 -32 -1056
WIRE 80 -1056 64 -1056
WIRE 96 -1056 80 -1056
WIRE 192 -1056 176 -1056
WIRE -256 -944 -256 -960
WIRE -144 -944 -144 -960
WIRE 80 -944 80 -1056
WIRE 96 -944 80 -944
WIRE 192 -928 192 -1056
WIRE 192 -928 160 -928
WIRE 320 -928 192 -928
WIRE 96 -912 -16 -912
WIRE 320 -912 320 -928
WIRE -16 -896 -16 -912
WIRE -256 -848 -256 -864
WIRE -144 -848 -144 -864
WIRE 320 -816 320 -832
WIRE -16 -800 -16 -816
SYMBOL res 304 -928 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage -16 -912 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 192 -1072 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage -144 -960 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 80 -1072 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -256 -960 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL Opamps\\AD8628 128 -992 R0
SYMATTR InstName U1
FLAG -256 -960 +V
FLAG -256 -848 0
FLAG -16 -800 0
FLAG 320 -928 OUT
FLAG -16 -912 IN
FLAG 128 -960 +V
FLAG -144 -960 -V
FLAG 128 -896 -V
FLAG -32 -1056 0
FLAG 320 -816 0
FLAG -144 -848 0
TEXT 336 -720 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\5c6e9c62f096_pull_out_stage.asc
* Generated by LTspice 26.0.1 for Windows.
* Amplifier output Stages
Q2 N001 N002 2+ 0 NPN
R3 V+ N001 100
Q1 N003 N002 2+ 0 PNP
V1 V+ 0 5
R1 2+ 0 2.2k
R2 N003 V- 100
V2 N002 0 SINE(0 6 1k)
V3 V- 0 -5
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 -384 192 -416
WIRE -352 -288 -352 -304
WIRE -352 -288 -384 -288
WIRE -208 -288 -208 -304
WIRE -208 -288 -240 -288
WIRE 192 -272 192 -304
WIRE -352 -256 -352 -288
WIRE -208 -256 -208 -288
WIRE 128 -224 96 -224
WIRE -352 -160 -352 -176
WIRE -208 -160 -208 -176
WIRE 96 -144 96 -224
WIRE 96 -144 -48 -144
WIRE 192 -144 192 -176
WIRE 320 -144 192 -144
WIRE 352 -144 320 -144
WIRE -48 -112 -48 -144
WIRE 192 -112 192 -144
WIRE 320 -112 320 -144
WIRE 96 -64 96 -144
WIRE 128 -64 96 -64
WIRE -48 0 -48 -32
WIRE 320 0 320 -32
WIRE 192 16 192 -16
WIRE 192 144 192 96
IOPIN -384 -288 In
IOPIN 352 -144 In
IOPIN -240 -288 In
SYMBOL voltage -48 -128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 6 1k)
SYMBOL voltage -352 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 176 0 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL res 176 -400 R0
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL res 304 -128 R0
SYMATTR InstName R1
SYMATTR Value 2.2k
SYMBOL voltage -208 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL pnp 128 -16 M180
SYMATTR InstName Q1
SYMBOL npn 128 -272 R0
SYMATTR InstName Q2
FLAG 320 0 0
FLAG -352 -160 0
FLAG -352 -304 Vp
FLAG 192 -416 Vp
FLAG -48 0 0
FLAG -384 -288 V+
FLAG 352 -144 2+
FLAG -208 -160 0
FLAG -208 -304 Vn
FLAG -240 -288 V-
FLAG 192 144 Vn
TEXT -232 152 Left 2 !.tran 10m
TEXT 56 -504 Left 2 ;Amplifier output Stages
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP172-1.65.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP172-1.65.asy)
RLOAD OUT 0 5.56
V1 IN 0 3.6
XU1 OUT IN IN 0 ADP172-1.65 ;pnba Vout)Vin)En)GND
C1 OUT 0 1
.tran 2m startup
.lib ADP172-1.65.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 80 -48 80
WIRE 48 80 -32 80
WIRE 64 80 48 80
WIRE 304 80 256 80
WIRE 336 80 304 80
WIRE 384 80 336 80
WIRE -48 96 -48 80
WIRE 304 96 304 80
WIRE 304 176 304 160
WIRE 384 176 384 160
WIRE -48 192 -48 176
WIRE 48 192 48 80
WIRE 64 192 48 192
WIRE 272 192 256 192
SYMBOL voltage -48 80 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL ADP172-1.65 160 192 R0
SYMATTR InstName U1
SYMBOL res 368 64 R0
SYMATTR InstName RLOAD
SYMATTR Value 5.56
SYMBOL cap 288 96 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG -48 192 0
FLAG 304 176 0
FLAG 272 192 0
FLAG 384 176 0
FLAG -32 80 IN
FLAG 336 80 OUT
TEXT 160 256 Center 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\aa6a7061c33e_rc.asc
* Generated by LTspice 26.0.1 for Windows.
C1 Output 0 10nF
R1 Output Input 1K
V1 Input 0 SINE(0 1 1K) AC 1
.ac oct 20 1000 200000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 80 -80 80
WIRE -16 80 -64 80
WIRE 160 80 64 80
WIRE 336 80 160 80
WIRE 160 112 160 80
WIRE -64 128 -64 80
WIRE -64 240 -64 208
WIRE 160 240 160 176
WIRE 160 240 -64 240
WIRE 160 288 160 240
IOPIN -80 80 In
IOPIN 336 80 Out
SYMBOL Misc\\signal -64 112 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL cap 144 112 R0
SYMATTR InstName C1
SYMATTR Value 10nF
SYMBOL res 80 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG -80 80 Input
FLAG 336 80 Output
FLAG 160 288 0
TEXT 208 216 Left 2 !.ac oct 20 1000 200000
* Z:\tmp\asc_dec_bjh7r6w2\08de34e219cf_oled-switch_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R3 Vout 0 10
V1 N001 0 3.3V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1700 680
WIRE -176 -176 -304 -176
WIRE 384 -176 -176 -176
WIRE -304 -96 -304 -176
WIRE 544 -16 528 -16
WIRE -176 0 -176 -176
WIRE -112 0 -176 0
WIRE 432 0 144 0
WIRE -304 64 -304 -16
WIRE 544 144 544 -16
WIRE 592 144 544 144
WIRE 544 192 544 144
WIRE 544 336 544 272
SYMBOL res 528 176 R0
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL voltage -304 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3V
FLAG -304 64 0
FLAG 592 144 Vout
FLAG 544 336 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1189.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1189.asy)
V1 +V 0 5
V3 N001 0 SINE(0 1m 100K)
XU1 N001 0 +V -V N002 0 N003 +V LT1189 ;pnba In+)In-)V+)V-)OUT)REF)FB)_SHDN
V2 -V 0 -5
R2 N003 0 111
R1 N002 N003 1K
.tran 1m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -288 96 -528 96
WIRE -112 96 -112 80
WIRE -112 96 -144 96
WIRE -528 112 -528 96
WIRE -144 112 -144 96
WIRE -112 112 -112 96
WIRE -288 128 -288 96
WIRE -176 128 -288 128
WIRE -768 160 -768 144
WIRE -640 160 -640 144
WIRE -176 160 -288 160
WIRE 0 176 -48 176
WIRE -176 192 -224 192
WIRE -528 208 -528 192
WIRE -288 208 -288 160
WIRE -288 208 -528 208
WIRE -176 224 -208 224
WIRE -528 240 -528 208
WIRE -768 256 -768 240
WIRE -640 256 -640 240
WIRE -112 256 -112 240
WIRE -304 336 -320 336
WIRE -208 336 -208 224
WIRE -208 336 -224 336
WIRE -144 336 -208 336
WIRE 0 336 0 176
WIRE 0 336 -64 336
SYMBOL res -48 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -640 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -528 96 R0
SYMATTR Value SINE(0 1m 100K)
SYMATTR InstName V3
SYMBOL res -208 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 111
SYMBOL voltage -768 144 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL LT1189 -112 176 R0
SYMATTR InstName U1
FLAG -640 256 0
FLAG -112 80 +V
FLAG -640 144 +V
FLAG -112 256 -V
FLAG -768 256 0
FLAG -768 144 -V
FLAG -320 336 0
FLAG -528 240 0
FLAG -224 192 0
TEXT 32 360 Left 2 !.tran 1m