Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3585-0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3585-0.asy)
V3 N007 0 PWL(30m 0 30.01m 3 30.1m 3 30.11m 0)
K1 L1 L2 1
C1 OUT 0 .1
R3 N004 N001 10K
L1 N002 N005 10 Rpar=2K Rser=.1
L2 0 N003 {10u*10.2*10.2} Rpar=1Meg
XU1 N001 N002 N001 N005 N006 N006 N007 N001 N004 MP_01 0 LT3585-0 ;pnba CHRG/Iadj)Vbat)Vin)SW)IBGTPU)IBGTPD)IBGTin)IBGTpwr)_Done))GND
D1 N003 OUT D
V2 N002 0 3
V1 N001 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 50m startup
.lib LT3585-0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3528 1804
WIRE 1936 1152 1936 1136
WIRE 1712 1248 1520 1248
WIRE 1824 1248 1712 1248
WIRE 1936 1248 1936 1232
WIRE 2064 1248 1936 1248
WIRE 2224 1248 2112 1248
WIRE 2368 1248 2288 1248
WIRE 2064 1264 2064 1248
WIRE 2112 1264 2112 1248
WIRE 2368 1280 2368 1248
WIRE 1712 1296 1712 1248
WIRE 1824 1296 1824 1248
WIRE 1936 1296 1936 1248
WIRE 1520 1360 1520 1248
WIRE 1568 1360 1520 1360
WIRE 1664 1360 1648 1360
WIRE 2064 1360 2064 1344
WIRE 2064 1360 1984 1360
WIRE 2112 1360 2112 1344
WIRE 2368 1360 2368 1344
WIRE 1520 1440 1520 1360
WIRE 1664 1440 1520 1440
WIRE 2016 1440 1984 1440
WIRE 1520 1456 1520 1440
WIRE 1664 1520 1600 1520
WIRE 2016 1520 2016 1440
WIRE 2016 1520 1984 1520
WIRE 1520 1552 1520 1536
WIRE 1600 1552 1600 1520
WIRE 1824 1584 1824 1568
WIRE 1600 1664 1600 1632
SYMBOL ind2 2128 1360 R180
WINDOW 0 -3 72 Right 2
WINDOW 3 0 43 Right 2
SYMATTR InstName L2
SYMATTR Value {10u*10.2*10.2}
SYMATTR SpiceLine Rpar=1Meg
SYMBOL VOLTAGE 1520 1440 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 1664 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL diode 2224 1264 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL PowerProducts\\LT3585-0 1824 1440 R0
SYMATTR InstName U1
SYMBOL voltage 1600 1536 R0
WINDOW 3 12 110 Left 2
SYMATTR Value PWL(30m 0 30.01m 3 30.1m 3 30.11m 0)
SYMATTR InstName V3
SYMBOL misc\\battery 1936 1248 M180
WINDOW 0 25 87 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL ind2 2048 1248 R0
WINDOW 0 -6 35 Right 2
WINDOW 3 -4 73 Right 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rpar=2K Rser=.1
SYMBOL cap 2352 1280 R0
WINDOW 3 27 55 Left 2
SYMATTR Value .1
SYMATTR InstName C1
FLAG 2368 1360 0
FLAG 1824 1584 0
FLAG 1520 1552 0
FLAG 2112 1360 0
FLAG 1936 1136 0
FLAG 1600 1664 0
FLAG 2368 1248 OUT
TEXT 2048 1560 Left 2 !.tran 50m startup
TEXT 2088 1248 Bottom 2 !K1 L1 L2 1
* Z:\home\khalils\Downloads\files\data\raw_asc\2a26ef829e3f_modelo_hibrido.asc
* Generated by LTspice 26.0.1 for Windows.
Rc 0 Vo 2k5
R1 Vi 0 25k
Rhie Vi 0 {hie}
R2 Vi 0 40k
Rs Vi N001 100
RMo Vo 0 {1/hoe}
Bhfe*ib Vo 0 I={hfe*I(hie)}
Rl 0 Vo 1k
Vs N001 0 SINE(0 1m {F})
.param hfe 220
.param hie 4.5k
.param hoe 30u
.tran {1/F}
.param F = 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 96 48 96
WIRE 160 96 144 96
WIRE 256 96 160 96
WIRE 368 96 256 96
WIRE 592 96 496 96
WIRE 672 96 592 96
WIRE 752 96 672 96
WIRE 784 96 752 96
WIRE 48 128 48 96
WIRE 160 128 160 96
WIRE 256 128 256 96
WIRE 368 128 368 96
WIRE 496 128 496 96
WIRE 592 128 592 96
WIRE 672 128 672 96
WIRE 752 128 752 96
WIRE 48 240 48 208
WIRE 160 240 160 208
WIRE 160 240 48 240
WIRE 256 240 256 208
WIRE 256 240 160 240
WIRE 368 240 368 208
WIRE 368 240 256 240
WIRE 432 240 368 240
WIRE 496 240 496 208
WIRE 496 240 432 240
WIRE 592 240 592 208
WIRE 592 240 496 240
WIRE 672 240 672 208
WIRE 672 240 592 240
WIRE 752 240 752 208
WIRE 752 240 672 240
SYMBOL voltage 48 112 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 11 93 Left 2
SYMATTR InstName Vs
SYMATTR Value SINE(0 1m {F})
SYMBOL res 176 112 M0
SYMATTR InstName R1
SYMATTR Value 25k
SYMBOL res 736 224 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName Rl
SYMATTR Value 1k
SYMBOL bi 496 128 R0
WINDOW 3 -70 142 Left 2
SYMATTR InstName hfe*ib
SYMATTR Value I={hfe*I(hie)}
SYMBOL res 160 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rs
SYMATTR Value 100
SYMBOL res 656 224 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName Rc
SYMATTR Value 2k5
SYMBOL res 384 112 M0
SYMATTR InstName hie
SYMATTR Value {hie}
SYMBOL res 576 112 R0
WINDOW 3 8 101 Left 2
SYMATTR InstName Mo
SYMATTR Value {1/hoe}
SYMBOL res 272 112 M0
SYMATTR InstName R2
SYMATTR Value 40k
FLAG 784 96 Vo
FLAG 432 240 0
FLAG 368 96 Vi
TEXT 120 296 Left 2 !.param hfe 220
TEXT 120 328 Left 2 !.param hie 4.5k
TEXT 120 360 Left 2 !.param hoe 30u
TEXT 120 392 Left 2 !.tran {1/F}
TEXT 120 424 Left 2 !.param F = 10k
* Z:\home\khalils\Downloads\files\data\raw_asc\233e4c17de2a_sym.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4300A-1.asy)
R2 N005 0 1Meg
XU1 N001 N004 N003 0 N006 N003 N005 N001 LTC4300A-1 ;pnba ENABLE)SCLOUT)SCLIN)GND)READY)SDAIN)SDAOUT)Vcc
R5 N002 N004 10k
V3 N002 0 5
R1 N004 0 1Meg
V2 N003 0 PULSE(0 5 0 1u 1u 1m 2m)
R4 N002 N005 10k
R3 N006 0 1k
V1 N001 0 PULSE(0 3.3 0 1n 1n 50m 100m)
.tran 200m
.lib LTC4300A-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 -96 256 -144
WIRE 256 -96 16 -96
WIRE 544 -96 448 -96
WIRE 560 -96 544 -96
WIRE 448 -48 448 -96
WIRE 560 -48 560 -96
WIRE 256 16 256 -96
WIRE 96 64 48 64
WIRE 560 64 560 32
WIRE 560 64 416 64
WIRE 608 64 560 64
WIRE 48 96 48 64
WIRE 48 96 -80 96
WIRE 48 144 48 96
WIRE 96 144 48 144
WIRE 448 144 448 32
WIRE 448 144 416 144
WIRE 512 144 448 144
WIRE 16 224 16 -96
WIRE 96 224 16 224
WIRE 448 224 416 224
WIRE 256 304 256 272
SYMBOL res 432 208 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 496 128 R0
SYMATTR InstName R2
SYMATTR Value 1meg
SYMBOL voltage -80 80 R0
WINDOW 3 -235 140 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 5 0 1u 1u 1m 2m)
SYMATTR InstName V2
SYMBOL res 544 -64 R0
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL SpecialFunctions\\LTC4300A-1 256 144 R0
SYMATTR InstName U1
SYMBOL voltage 544 -80 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 432 -64 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL res 592 48 R0
SYMATTR InstName R1
SYMATTR Value 1meg
SYMBOL voltage 256 -128 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 1n 1n 50m 100m)
FLAG 256 -224 0
FLAG -80 176 0
FLAG 256 304 0
FLAG 512 224 0
FLAG 608 144 0
FLAG 448 304 0
FLAG 544 -176 0
TEXT -320 328 Left 2 !.tran 200m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4120A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4120A.asy)
V3 N003 0 PULSE(0 5 0 2n 2n 998n 2u)
V1 N001 0 5
C1 GATE 0 2n
R1 GATE N004 5
XU1 N001 N003 0 0 N004 N002 ADuM4120xx Glitch=1 Vrun2=4.3 ;pnba Vdd1)Vin)GND1)GND2)Vout)Vdd2
V2 N002 0 15
.tran 10u
.lib ADuM4120xx.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 16 48 16
WIRE 512 16 320 16
WIRE 48 32 48 16
WIRE 512 32 512 16
WIRE 160 48 160 16
WIRE 320 48 320 16
WIRE 48 128 48 112
WIRE 512 128 512 112
WIRE 112 160 -32 160
WIRE 400 160 368 160
WIRE 512 160 480 160
WIRE 544 160 512 160
WIRE 512 176 512 160
WIRE 160 288 160 272
WIRE 320 288 320 272
SYMBOL ADuM4120A 240 160 R0
SYMATTR InstName U1
SYMBOL voltage 48 16 R0
WINDOW 0 25 25 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 496 176 R0
WINDOW 0 35 16 Left 2
WINDOW 3 36 51 Left 2
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL res 496 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL voltage 512 16 R0
WINDOW 0 29 30 Left 2
WINDOW 3 31 84 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage -16 160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 2n 2n 998n 2u)
FLAG 160 288 0
FLAG 320 288 0
FLAG 512 240 0
FLAG 544 160 GATE
FLAG 512 128 0
FLAG 48 128 0
FLAG -112 160 0
TEXT 400 280 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3527-1.asc
* Generated by LTspice 26.0.1 for Windows.
L1 IN N001 4.7 Rpar=2K
R1 OUT2 N004 619K
R2 N004 0 1.21Meg
C1 OUT2 0 4.7
L2 IN N002 4.7 Rpar=2K
R3 OUT1 N003 1.78Meg
R4 N003 0 1Meg
C2 OUT1 0 4.7
V1 IN 0 2.5
XU1 IN N003 0 IN OUT1 N001 N002 OUT2 IN 0 N004 IN NC_01 0 IN NC_02 LTC3527-1 ;pnba _SHDN1)FB1)Mode)Vin1)Vout1)SW1)SW2)Vout2)Vin2)Fsel)FB2)_SHDN2)Pgood2)GND)Vin)Pgood1
Rload1 OUT1 0 22
Rload2 OUT2 0 12
.tran 0.7m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3527-1.asy)
.lib LTC3527-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 464 -160 -160 -160
WIRE 112 -128 -96 -128
WIRE 192 -128 112 -128
WIRE 272 -128 192 -128
WIRE 368 -128 272 -128
WIRE 112 -112 112 -128
WIRE 192 -112 192 -128
WIRE 272 -112 272 -128
WIRE -96 -32 -96 -128
WIRE 48 -32 -96 -32
WIRE 368 -32 368 -128
WIRE 368 -32 336 -32
WIRE -160 80 -160 -160
WIRE -160 80 -288 80
WIRE -96 80 -96 -32
WIRE -96 80 -160 80
WIRE -64 80 -96 80
WIRE 48 80 16 80
WIRE 352 80 336 80
WIRE 464 80 464 -160
WIRE 464 80 432 80
WIRE -288 96 -288 80
WIRE -288 192 -288 176
WIRE -160 304 -288 304
WIRE -80 304 -160 304
WIRE 48 304 -80 304
WIRE 384 304 336 304
WIRE 496 304 384 304
WIRE 576 304 496 304
WIRE -288 320 -288 304
WIRE -160 320 -160 304
WIRE -80 320 -80 304
WIRE 384 320 384 304
WIRE 496 320 496 304
WIRE 576 320 576 304
WIRE -288 416 -288 400
WIRE -160 416 -160 384
WIRE -80 416 -80 400
WIRE 48 416 -80 416
WIRE 384 416 384 400
WIRE 384 416 336 416
WIRE 496 416 496 384
WIRE 576 416 576 400
WIRE -80 432 -80 416
WIRE 384 432 384 416
WIRE 112 512 112 496
WIRE 192 512 192 496
WIRE 272 512 272 496
WIRE -80 528 -80 512
WIRE 384 528 384 512
FLAG 384 528 0
FLAG 576 416 0
FLAG 496 416 0
FLAG 192 512 0
FLAG 112 512 0
FLAG 272 512 0
FLAG -80 528 0
FLAG -288 416 0
FLAG -160 416 0
FLAG -288 192 0
FLAG -288 80 IN
FLAG -288 304 OUT1
FLAG 576 304 OUT2
SYMBOL ind -80 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=2K
SYMBOL res 368 304 R0
SYMATTR InstName R1
SYMATTR Value 619K
SYMBOL res 368 416 R0
SYMATTR InstName R2
SYMATTR Value 1.21Meg
SYMBOL cap 480 320 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL ind 448 96 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=2K
SYMBOL res -96 304 R0
SYMATTR InstName R3
SYMATTR Value 1.78Meg
SYMBOL res -96 416 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL cap -176 320 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL voltage -288 80 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL PowerProducts\\LTC3527-1 192 192 R0
SYMATTR InstName U1
SYMBOL res -304 304 R0
SYMATTR InstName Rload1
SYMATTR Value 22
SYMBOL res 560 304 R0
SYMATTR InstName Rload2
SYMATTR Value 12
TEXT 552 496 Left 2 !.tran 0.7m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1212.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
R1 OUT N001 5K
R2 N001 0 5K
V3 IN 0 PWL(0 1 1 5)
R3 N003 N002 1Meg
C1 N003 N002 22p
R4 N002 IN 1Meg
XU1 IN N001 +V 0 OUT LT1211 ;pnba In+)In-)V+)V-)OUT
XU2 N001 N003 +V 0 N002 LT1211 ;pnba In+)In-)V+)V-)OUT
.tran 1
* Input Bias Current Cancellation
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1212.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 704
WIRE 32 112 16 112
WIRE 128 112 112 112
WIRE 144 112 128 112
WIRE 256 112 224 112
WIRE 192 208 192 192
WIRE 128 224 128 112
WIRE 160 224 128 224
WIRE 256 240 256 112
WIRE 256 240 224 240
WIRE 336 240 256 240
WIRE 64 256 -128 256
WIRE 160 256 64 256
WIRE -288 272 -288 256
WIRE -128 272 -128 256
WIRE 192 288 192 272
WIRE 64 320 64 256
WIRE 128 336 128 224
WIRE 288 336 128 336
WIRE -288 368 -288 352
WIRE -128 368 -128 352
WIRE 224 400 224 384
WIRE 288 416 288 336
WIRE 288 416 256 416
WIRE 64 432 64 400
WIRE 192 432 64 432
WIRE 288 448 256 448
WIRE 224 480 224 464
WIRE 64 528 64 432
WIRE 96 528 64 528
WIRE 288 528 288 448
WIRE 288 528 176 528
WIRE 64 592 64 528
WIRE 192 592 64 592
WIRE 288 592 288 528
WIRE 288 592 256 592
FLAG -288 368 0
FLAG 192 192 +V
FLAG -288 256 +V
FLAG 16 112 0
FLAG -128 368 0
FLAG 224 480 +V
FLAG 192 288 0
FLAG 224 384 0
FLAG 336 240 OUT
FLAG -128 256 IN
SYMBOL voltage -288 256 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 240 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL voltage -128 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 1 1 5)
SYMBOL res 192 512 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL cap 256 576 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 22p
SYMBOL res 48 416 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL opamps\\LT1212 192 176 R0
SYMATTR InstName U1
SYMBOL opamps\\LT1212 224 496 R180
WINDOW 0 22 91 Left 2
WINDOW 3 25 39 Left 2
SYMATTR InstName U2
TEXT 360 576 Left 2 !.tran 1
TEXT 176 48 Bottom 2 ;Input Bias Current Cancellation
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1187.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1187.asy)
V2 -V 0 -5
R2 N003 0 1K
V3 N001 0 SINE(0 10m 100K)
XU1 N001 0 +V -V N002 0 N003 NC_01 LT1187 ;pnba In+)In-)V+)V-)OUT)REF)FB)_SHDN
R1 N002 N003 1K
V1 +V 0 5
.tran 1m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -288 96 -544 96
WIRE -544 112 -544 96
WIRE -112 112 -112 96
WIRE -288 128 -288 96
WIRE -176 128 -288 128
WIRE -176 160 -288 160
WIRE 0 176 -48 176
WIRE -176 192 -224 192
WIRE -544 208 -544 192
WIRE -288 208 -288 160
WIRE -288 208 -544 208
WIRE -768 224 -768 208
WIRE -640 224 -640 208
WIRE -544 224 -544 208
WIRE -176 224 -208 224
WIRE -112 256 -112 240
WIRE -768 320 -768 304
WIRE -640 320 -640 304
WIRE -304 336 -320 336
WIRE -208 336 -208 224
WIRE -208 336 -224 336
WIRE -144 336 -208 336
WIRE 0 336 0 176
WIRE 0 336 -64 336
SYMBOL voltage -544 96 R0
SYMATTR Value SINE(0 10m 100K)
SYMATTR InstName V3
SYMBOL opamps\\LT1187 -112 176 R0
SYMATTR InstName U1
SYMBOL res -208 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res -48 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -768 208 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -640 208 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -640 320 0
FLAG -112 96 +V
FLAG -640 208 +V
FLAG -112 256 -V
FLAG -768 320 0
FLAG -768 208 -V
FLAG -320 336 0
FLAG -544 224 0
FLAG -224 192 0
TEXT -56 416 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\a1737be6ba6f_example.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N001 0 PULSE(0 {U} 10n 10p 10p 1)
C2 output N002 {C_PMT}
R7 output 0 50
R1 N002 N001 0.1
C1 0 N002 30n
B1 output_charge 0 V=idt(V(output))/50
.tran 0 200n 0
* "Oscilloscope"
* PMT Capacitance
* finite rise time filter
* detector pulse mock-up
* total pulse charge
.param Q -50p
* detector capacitance
.param C_PMT 200p
* step voltage
.param U Q/C_PMT
* simulation length
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 19840
WIRE -5840 1488 -6000 1488
WIRE -5712 1488 -5840 1488
WIRE -6000 1568 -6000 1488
WIRE -6000 1728 -6000 1648
WIRE -6752 1840 -6912 1840
WIRE -6544 1840 -6672 1840
WIRE -6320 1840 -6544 1840
WIRE -6000 1840 -6256 1840
WIRE -5808 1840 -6000 1840
WIRE -5648 1840 -5808 1840
WIRE -6544 1904 -6544 1840
WIRE -6912 1920 -6912 1840
WIRE -6000 1920 -6000 1840
WIRE -6912 2080 -6912 2000
WIRE -6544 2080 -6544 1968
WIRE -6000 2080 -6000 2000
FLAG -6912 2080 0
FLAG -6000 2080 0
FLAG -5808 1840 output
FLAG -6544 2080 0
FLAG -6000 1728 0
FLAG -5840 1488 output_charge
SYMBOL voltage -6912 1904 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -442 107 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 {U} 10n 10p 10p 1)
SYMBOL cap -6256 1824 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {C_PMT}
SYMBOL res -6016 1904 R0
SYMATTR InstName R7
SYMATTR Value 50
SYMBOL res -6656 1824 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 0.1
SYMBOL cap -6528 1968 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 30n
SYMBOL bv -6000 1552 R0
SYMATTR InstName B1
SYMATTR Value V=idt(V(output))/50
TEXT -6576 1624 Left 2 !.tran 0 200n 0
TEXT -5888 1960 Left 2 ;"Oscilloscope"
TEXT -6368 1752 Left 2 ;PMT Capacitance
TEXT -6784 1752 Left 2 ;finite rise time filter
TEXT -6960 1448 Left 5 ;detector pulse mock-up
TEXT -6904 1536 Left 2 ;total pulse charge
TEXT -6576 1536 Left 2 !.param Q -50p
TEXT -6904 1576 Left 2 ;detector capacitance
TEXT -6576 1576 Left 2 !.param C_PMT 200p
TEXT -7376 1952 Left 2 ;step voltage
TEXT -7200 1952 Left 2 !.param U Q/C_PMT
TEXT -6904 1624 Left 2 ;simulation length
* Z:\home\khalils\Downloads\files\data\raw_asc\009a2771507c_Active-Low-Pass-Buttersworth-Filter.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
R2 N003 N001 110k
XU1 N003 N004 Vp Vm Vout level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R3 Vout N004 845
R4 N004 0 10k
C1 Vout N001 10nF
C2 N003 0 10nF
V1 0 Vm 12
V3 N002 0 AC 5
V2 Vp 0 12
R1 N001 N002 110k
.ac lin 1000 1 300
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 916 680
WIRE -144 32 -304 32
WIRE 80 32 -80 32
WIRE -432 128 -496 128
WIRE -304 128 -304 32
WIRE -304 128 -352 128
WIRE -256 128 -304 128
WIRE -128 128 -176 128
WIRE -16 128 -128 128
WIRE 80 144 80 32
WIRE 80 144 48 144
WIRE 160 144 80 144
WIRE -128 160 -128 128
WIRE -16 160 -48 160
WIRE -656 192 -656 160
WIRE -656 192 -720 192
WIRE -496 192 -496 128
WIRE 80 192 80 144
WIRE -720 208 -720 192
WIRE -656 224 -656 192
WIRE -128 256 -128 224
WIRE -48 288 -48 160
WIRE 80 288 80 272
WIRE 80 288 -48 288
WIRE 80 304 80 288
WIRE -496 336 -496 272
WIRE 80 400 80 384
IOPIN -656 80 In
IOPIN -656 304 In
IOPIN 16 176 Out
IOPIN 16 112 Out
SYMBOL cap -144 160 R0
SYMATTR InstName C2
SYMATTR Value 10nF
SYMBOL res 64 176 R0
SYMATTR InstName R3
SYMATTR Value 845
SYMBOL voltage -656 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 64 288 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL res -160 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 110k
SYMBOL voltage -496 176 R0
WINDOW 3 24 44 Invisible 2
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value ""
SYMATTR Value2 AC 5
SYMATTR InstName V3
SYMBOL voltage -656 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL cap -80 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10nF
SYMBOL res -336 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 110k
SYMBOL OpAmps\\UniversalOpAmp 16 144 M180
SYMATTR InstName U1
FLAG 80 400 0
FLAG -128 256 0
FLAG -720 208 0
FLAG -656 80 Vp
FLAG -656 304 Vm
FLAG 16 176 Vp
FLAG 16 112 Vm
FLAG -496 336 0
FLAG 160 144 Vout
TEXT -576 32 Left 2 !.ac lin 1000 1 300
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6657-4.096.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6657-4.096.asy)
V1 IN 0 PWL(0 0 3m 4.6 7m 4.6 10m 0)
XU1 IN IN OUT 0 LT6657-4.096 ;pnba IN)_SHDN)OUT)GND
R1 OUT 0 1K
C2 IN 0 .1
C1 OUT 0 1
.tran 10m
.lib LT6657.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1652 680
WIRE 208 96 -208 96
WIRE 304 96 208 96
WIRE 320 96 304 96
WIRE 656 96 608 96
WIRE 752 96 656 96
WIRE -208 112 -208 96
WIRE 208 112 208 96
WIRE 656 112 656 96
WIRE 752 112 752 96
WIRE 208 192 208 176
WIRE -208 208 -208 192
WIRE 304 208 304 96
WIRE 320 208 304 208
WIRE 656 208 656 176
WIRE 752 208 752 192
WIRE 464 272 464 256
SYMBOL voltage -208 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 3m 4.6 7m 4.6 10m 0)
SYMBOL LT6657-4.096 464 128 R0
SYMATTR InstName U1
SYMBOL res 736 96 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL cap 640 112 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMBOL cap 192 112 R0
SYMATTR InstName C2
SYMATTR Value .1u
FLAG 656 208 0
FLAG 464 272 0
FLAG -208 208 0
FLAG 752 96 OUT
FLAG 752 208 0
FLAG 208 192 0
FLAG -208 96 IN
TEXT 672 360 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1168.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1168.asy)
V1 +V 0 10
V3 N001 0 SINE(0 50m 1K)
R1 N002 N004 1K
V2 -V 0 -10
XU1 N002 0 N001 -V 0 N003 +V N004 LT1168 ;pnba RG1)FB)In+)V-)REF)OUT)V+)RG2
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 680
WIRE 352 144 48 144
WIRE 432 160 432 144
WIRE -224 176 -224 160
WIRE -96 176 -96 160
WIRE 48 176 48 144
WIRE 336 176 272 176
WIRE 352 176 352 144
WIRE 368 176 352 176
WIRE 272 192 272 176
WIRE 336 208 336 176
WIRE 368 208 336 208
WIRE 528 224 496 224
WIRE 368 240 336 240
WIRE -224 272 -224 256
WIRE -96 272 -96 256
WIRE 368 272 352 272
WIRE 272 288 272 272
WIRE 336 288 336 240
WIRE 336 288 272 288
WIRE 48 304 48 256
WIRE 352 304 352 272
WIRE 352 304 48 304
WIRE 400 304 400 288
WIRE 48 320 48 304
SYMBOL voltage -96 160 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL opamps\\LT1168 432 224 R0
SYMATTR InstName U1
SYMBOL res 256 176 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 48 160 R0
WINDOW 0 9 8 Left 2
WINDOW 3 11 102 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 50m 1K)
SYMBOL voltage -224 160 R0
SYMATTR InstName V2
SYMATTR Value -10
FLAG -96 272 0
FLAG -96 160 +V
FLAG -224 272 0
FLAG -224 160 -V
FLAG 432 144 +V
FLAG 400 304 -V
FLAG 48 320 0
FLAG 464 288 0
TEXT 464 360 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\c7e1de1c4500_part3_b_vgs_sweep.asc
* Generated by LTspice 26.0.1 for Windows.
M1 drain gate 0 0 NMOS
VGS gate 0 10
VDS drain 0 7
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model nmos NMOS (kp=100u, vt0=0.5, l=.18u, w={X})
.dc VGS 0 10 0.01
.step param X list 0.36u 0.8u 1.4u 1.9u 2.4u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 48 96 48
WIRE 240 48 160 48
WIRE 96 112 96 48
WIRE 240 144 240 48
WIRE -64 192 -96 192
WIRE 48 192 -64 192
WIRE -96 208 -96 192
WIRE -96 336 -96 288
WIRE 96 336 96 208
WIRE 96 336 -96 336
WIRE 176 336 96 336
WIRE 240 336 240 224
WIRE 240 336 176 336
SYMBOL voltage -96 192 R0
SYMATTR InstName VGS
SYMATTR Value 10
SYMBOL nmos 48 112 R0
SYMATTR InstName M1
SYMBOL voltage 240 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 7
FLAG 96 336 0
FLAG -64 192 gate
FLAG 160 48 drain
FLAG 176 336 source
TEXT -104 376 Left 2 !.model nmos NMOS (kp=100u, vt0=0.5, l=.18u, w={X})
TEXT -104 408 Left 2 !.dc VGS 0 10 0.01
TEXT -104 440 Left 2 !.step param X list 0.36u 0.8u 1.4u 1.9u 2.4u