* Z:\home\khalils\Downloads\files\data\raw_asc\fra_eg6_LT3763_probe_current.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 BG INTVCC N001 N002 N005 N004 N003 N008 NC_01 N005 N012 0 N005 N005 SS OUT SPFB VC N010 N013 N006 INTVCC SW PWM_OUT TG LT3763 ;pnba BG)INTVCC)VIN)EN/UVLO)VREF)VINN)VINP)IVINMON)_FAULT)FBIN)FB)GND)CTRL2)CTRL1)SS)SENSE-)SENSE+)VC)ISMON)RT)BOOST)PWM)SW)PWMOUT)TG
R1 N013 0 82.5K
C1 SS 0 .01
C2 VC 0 4700p Rser=59K
R2 N010 N009 50
C3 N009 0 .001
R3 N008 N007 50
C4 N007 0 .001
C5 N005 0 .22
V2 IN 0 24
R4 IN N001 2.5m
R5 IN N003 1K
R6 N001 N004 1K
C6 N003 N004 1
R7 IN N002 84.5K
R8 N002 0 15.4K
C7 N001 0 4.7
C8 INTVCC 0 4.7
D1 INTVCC N006 1N5819
C9 N006 SW .22
MQ1 N001 TG SW SW RJK0305DPB
MQ2 SW BG 0 0 RJK0301DPB
L1 SW SP 1.5 Rser=2m
R9 SP OUT 2.5m
R10 OUT N012 47.5K
R11 N012 0 12.1K
C10 OUT 0 220 x2 V=6.3 Irms=3.2 Rser=0.012 Lser=0 mfg="KEMET" pn="T520V227M006ASE012" type="Tantalum"
D2 OUT N011 PT-121-B
MQ3 N011 PWM_OUT 0 0 IRFH6200
@1 SP SPFB delay=50u fstart=200 fend=362k oct=2 fcoarse=16k nmax=1 3 65k 3 66k 1 pp0=20m pp1=5m f0=24k f1=96k tavgmin=100u tsettle=10u
&1 SP OUT SPFB OUT
&vc VC 0 SPFB OUT
&mod SP OUT VC 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.options trtol=3
.ic V(OUT)=4.47 V(SS)=3.32 V(VC)=860m V(INTVCC)=5
.fra
* In this example, fraprobe &1 analyzes the loop gain differentially across the output current sense resistor R9.\nAfter the simulation completes, in the Bode plot window (fra_eg6_LT3763_probe_current.fra_1.raw)\nRight click -> Add Traces -> probe_1\nThen Right click -> Notes & Annotations -> Annotate Phase margin\nPlot probe_mod to display the modulator gain (compensation point VC to output current sense)\nPlot probe_vc to display the gain from output current sense to the compensation point VC
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3763.asy)
.lib LT3763.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1428 740
WIRE 0 -688 -144 -688
WIRE 224 -688 0 -688
WIRE 256 -688 224 -688
WIRE 352 -688 336 -688
WIRE 432 -688 352 -688
WIRE 480 -688 432 -688
WIRE 752 -688 480 -688
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WIRE 1024 -160 1008 -160
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WIRE 1216 -80 1216 -160
WIRE 128 -64 128 -160
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WIRE 912 -16 880 -16
WIRE -48 32 -64 32
WIRE 32 32 16 32
WIRE 144 32 112 32
WIRE 560 32 528 32
WIRE 592 32 592 -16
WIRE 592 32 560 32
WIRE 688 32 592 32
WIRE 912 32 912 -16
WIRE 912 32 784 32
WIRE 688 96 672 96
WIRE 800 96 784 96
WIRE 1056 112 1056 -160
WIRE -48 128 -64 128
WIRE 32 128 16 128
WIRE 144 128 112 128
WIRE 672 128 672 96
WIRE 672 128 528 128
WIRE 800 128 800 96
WIRE 800 128 672 128
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WIRE 1024 128 800 128
WIRE 1216 144 1216 -16
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WIRE 0 224 -64 224
WIRE 128 224 0 224
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WIRE 1056 224 1056 192
WIRE 1056 224 528 224
WIRE 1168 224 1152 224
WIRE 1056 240 1056 224
WIRE 1216 256 1216 240
WIRE 48 320 32 320
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WIRE 864 320 608 320
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WIRE -160 400 -192 400
WIRE -128 400 -160 400
WIRE 80 416 32 416
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WIRE 400 496 400 480
WIRE 0 512 0 336
WIRE 16 512 0 512
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WIRE 176 512 144 512
WIRE 144 576 112 576
WIRE 176 576 144 576
WIRE 272 592 272 576
FLAG 400 496 0
FLAG 272 592 0
FLAG 32 320 0
FLAG -144 224 0
FLAG -64 128 0
FLAG -64 32 0
FLAG 32 -256 0
FLAG -144 -576 0
FLAG 0 -448 0
FLAG 480 -592 0
FLAG 672 -352 0
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FLAG 1056 336 0
FLAG 1104 -64 0
FLAG 1216 256 0
FLAG -144 -688 IN
FLAG 1216 -160 OUT
FLAG 128 320 SS
FLAG 128 224 VC
FLAG 720 -160 SW
FLAG 560 -64 BG
FLAG 592 -256 TG
FLAG 624 -448 INTVCC
FLAG 80 416 INTVCC
FLAG 608 320 PWM_OUT
FLAG 880 -16 SP
FLAG 560 32 SPFB
FLAG -160 336 SPFB
FLAG -32 400 0
FLAG -160 400 OUT
FLAG 144 512 SP
FLAG 144 576 OUT
FLAG 16 576 0
SYMBOL PowerProducts\\LT3763 336 -16 R0
SYMATTR InstName U1
SYMBOL res 256 480 R0
SYMATTR InstName R1
SYMATTR Value 82.5K
SYMBOL cap 112 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL cap -64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 39 53 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4700p
SYMATTR SpiceLine Rser=59K
SYMBOL res 128 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL cap 16 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL res 128 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 50
SYMBOL cap 16 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value .001
SYMBOL cap 16 -336 R0
SYMATTR InstName C5
SYMATTR Value .22
SYMBOL voltage -144 -688 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 24
SYMBOL res 240 -672 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 2.5m
SYMBOL res 208 -688 R0
WINDOW 0 37 48 Left 2
SYMATTR InstName R5
SYMATTR Value 1K
SYMBOL res 336 -688 R0
SYMATTR InstName R6
SYMATTR Value 1K
SYMBOL cap 256 -544 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C6
SYMATTR Value 1
SYMBOL res -16 -688 R0
SYMATTR InstName R7
SYMATTR Value 84.5K
SYMBOL res -16 -560 R0
SYMATTR InstName R8
SYMATTR Value 15.4K
SYMBOL cap 464 -672 R0
SYMATTR InstName C7
SYMATTR Value 4.7
SYMBOL cap 656 -432 R0
SYMATTR InstName C8
SYMATTR Value 4.7
SYMBOL schottky 544 -432 R0
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 544 -240 R0
SYMATTR InstName C9
SYMATTR Value .22
SYMBOL nmos 704 -336 R0
SYMATTR InstName Q1
SYMATTR Value RJK0305DPB
SYMBOL nmos 704 -144 R0
SYMATTR InstName Q2
SYMATTR Value RJK0301DPB
SYMBOL ind 784 -144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=2m
SYMBOL res 912 -144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R9
SYMATTR Value 2.5m
SYMBOL res 1040 96 R0
SYMATTR InstName R10
SYMATTR Value 47.5K
SYMBOL res 1040 224 R0
SYMATTR InstName R11
SYMATTR Value 12.1K
SYMBOL polcap 1088 -144 R0
WINDOW 3 38 36 Left 2
WINDOW 123 29 63 Left 2
SYMATTR Value 220
SYMATTR Value2 x2
SYMATTR InstName C10
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=6.3 Irms=3.2 Rser=0.012 Lser=0 mfg="KEMET" pn="T520V227M006ASE012" type="Tantalum"
SYMBOL LED 1200 -80 R0
SYMATTR InstName D2
SYMATTR Value PT-121-B
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL nmos 1168 144 R0
SYMATTR InstName Q3
SYMATTR Value IRFH6200
SYMBOL fra 592 -16 R90
WINDOW 0 -16 -32 VBottom 2
SYMATTR InstName @1
SYMATTR SpiceLine delay=50u fstart=200 fend=362k oct=2 fcoarse=16k nmax=1 3 65k 3 66k 1 pp0=20m pp1=5m f0=24k f1=96k tavgmin=100u tsettle=10u
SYMBOL fraprobe 736 112 R0
SYMATTR InstName &1
SYMBOL fraprobe -80 416 R0
SYMATTR InstName &vc
SYMBOL fraprobe 64 592 R0
SYMATTR InstName &mod
TEXT 640 440 Left 2 !.options trtol=3\n.ic V(OUT)=4.47 V(SS)=3.32 V(VC)=860m V(INTVCC)=5\n.fra
TEXT -136 -888 Left 2 ;In this example, fraprobe &1 analyzes the loop gain differentially across the output current sense resistor R9.\nAfter the simulation completes, in the Bode plot window (fra_eg6_LT3763_probe_current.fra_1.raw)\nRight click -> Add Traces -> probe_1\nThen Right click -> Notes & Annotations -> Annotate Phase margin\nPlot probe_mod to display the modulator gain (compensation point VC to output current sense)\nPlot probe_vc to display the gain from output current sense to the compensation point VC