Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3695.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3695.asy)
R2 N008 0 102K
C2 N002 N003 0.22
C1 N007 N006 470p
R6 IN N001 10K
XU1 0 N005 N003 N001 N004 0 IN N007 N008 OUT NC_01 N002 0 LT3695 ;pnba PGND)DA)SW)Run/SS)Rt)SYNC)Vin)Vc)FB)BD)PG)Boost)GND
V1 IN 0 12
C3 OUT 0 10
R4 N004 0 40.2K
R3 N006 0 16.2K
C4 N001 0 0.1
L1 N003 OUT 10
Rload OUT 0 6
R1 OUT N008 536K
D1 N005 N003 MBRS140
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LT3695.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 928 680
WIRE -32 -48 -160 -48
WIRE 224 -48 -32 -48
WIRE -160 -32 -160 -48
WIRE 224 -32 224 -48
WIRE -32 -16 -32 -48
WIRE 576 0 368 0
WIRE -160 64 -160 48
WIRE -32 96 -32 64
WIRE 80 96 -32 96
WIRE 400 96 368 96
WIRE -32 112 -32 96
WIRE 400 112 400 96
WIRE -32 192 -32 176
WIRE 80 192 64 192
WIRE 400 192 400 176
WIRE 400 192 368 192
WIRE 480 192 400 192
WIRE 576 192 576 0
WIRE 576 192 560 192
WIRE 672 192 576 192
WIRE 752 192 672 192
WIRE 400 208 400 192
WIRE 672 208 672 192
WIRE 752 208 752 192
WIRE -48 288 -112 288
WIRE 80 288 32 288
WIRE 400 288 400 272
WIRE 400 288 368 288
WIRE 576 288 576 192
WIRE 672 304 672 272
WIRE 752 304 752 288
WIRE -96 384 -112 384
WIRE 0 384 -16 384
WIRE 80 384 64 384
WIRE 576 384 576 368
WIRE 576 384 368 384
WIRE 576 400 576 384
WIRE 176 448 176 432
WIRE 272 448 272 432
WIRE 576 496 576 480
SYMBOL res 560 384 R0
SYMATTR InstName R2
SYMATTR Value 102K
SYMBOL cap 384 112 R0
WINDOW 3 24 57 Left 2
SYMATTR Value 0.22
SYMATTR InstName C2
SYMBOL res 48 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 40.2K
SYMBOL res 0 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 16.2K
SYMBOL voltage -160 -48 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap -48 112 R0
SYMATTR InstName C4
SYMATTR Value 0.1
SYMBOL cap 64 368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 470p
SYMBOL res 736 192 R0
SYMATTR InstName Rload
SYMATTR Value 6
SYMBOL ind 464 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL res 560 272 R0
SYMATTR InstName R1
SYMATTR Value 536K
SYMBOL schottky 384 272 M180
WINDOW 0 27 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res -48 -32 R0
SYMATTR InstName R6
SYMATTR Value 10K
SYMBOL cap 656 208 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL PowerProducts\\LT3695 224 192 R0
SYMATTR InstName U1
FLAG -112 384 0
FLAG -112 288 0
FLAG 176 448 0
FLAG 272 448 0
FLAG 576 496 0
FLAG 672 304 0
FLAG 752 304 0
FLAG -160 64 0
FLAG -32 192 0
FLAG -160 -48 IN
FLAG 752 192 OUT
FLAG 64 192 0
TEXT 712 424 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6362.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6362.asy)
R1 N003 N002 1K
V2 N004 0 5
R2 N002 N001 1K
XU1 N002 N005 N004 N003 N007 0 NC_01 N006 LTC6362 ;pnba IN-)VOCM)V+)OUT+)OUT-)V-)SHDN)IN+
C1 N005 0 .1
R4 N006 0 1K
V1 N001 0 SINE(0 1 250K) AC 1
R3 N007 N006 1K
.tran 100u
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1280 680
WIRE 288 -96 144 -96
WIRE 400 -96 368 -96
WIRE 464 -96 400 -96
WIRE 656 -96 544 -96
WIRE 144 -80 144 -96
WIRE 144 16 144 0
WIRE 736 48 496 48
WIRE 496 64 496 48
WIRE 736 64 736 48
WIRE 400 112 400 -96
WIRE 464 112 400 112
WIRE 656 112 656 -96
WIRE 656 112 624 112
WIRE 320 144 288 144
WIRE 464 144 384 144
WIRE 736 160 736 144
WIRE 464 176 400 176
WIRE 656 176 624 176
WIRE 496 256 496 224
WIRE 304 336 224 336
WIRE 400 336 400 176
WIRE 400 336 384 336
WIRE 480 336 400 336
WIRE 656 336 656 176
WIRE 656 336 560 336
SYMBOL res 576 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL res 400 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL voltage 144 -96 R0
WINDOW 123 37 59 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value SINE(0 1 250K)
SYMBOL res 384 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL cap 384 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage 736 48 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 560 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL LTC6362 528 144 R0
SYMATTR InstName U1
FLAG 144 16 0
FLAG 736 160 0
FLAG 224 336 0
FLAG 496 256 0
FLAG 288 144 0
TEXT 656 360 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\0fada9b07c09_6994-1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 0 121K
R2 N002 N004 1000K
R3 N004 0 392K
R4 OUT 0 100K
V1 N002 0 5
V2 N001 0 PULSE(3.3 0 0.25m 1n 1n 0.5m 25m 3)
XU1 N001 0 N003 N004 N002 OUT LTC6994-1 ;pnba IN)GND)SET)DIV)V+)OUT
.tran 100m startup
* LTC6994-1 10ms Delay Interval Generator\nOutput Low When IN is Low\nRising Edge On IN Starts Delay to Output Rising Edge\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6994-1.asy)
.lib LTC6994-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE -224 96 -240 96
WIRE 96 96 -144 96
WIRE 624 96 320 96
WIRE 624 112 624 96
WIRE 96 176 64 176
WIRE 400 176 320 176
WIRE 528 176 400 176
WIRE 400 192 400 176
WIRE 528 192 528 176
WIRE 624 208 624 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 352 256 320 256
WIRE 352 288 352 256
WIRE 400 288 400 272
WIRE 400 288 352 288
WIRE 528 288 528 272
WIRE 400 304 400 288
WIRE 400 400 400 384
FLAG -240 96 0
FLAG 528 288 0
FLAG 624 96 OUT
FLAG 624 208 0
FLAG 400 400 0
FLAG -16 256 0
FLAG 64 176 0
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 121K
SYMBOL res 384 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL res 384 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
SYMBOL res 608 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL voltage 528 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -128 96 R90
WINDOW 123 74 56 VTop 0
WINDOW 39 53 56 VTop 0
WINDOW 3 32 56 VTop 0
WINDOW 0 -32 56 VBottom 0
SYMATTR Value PULSE(3.3 0 0.25m 1n 1n 0.5m 25m 3)
SYMATTR InstName V2
SYMBOL SpecialFunctions\\LTC6994-1 208 176 R0
SYMATTR InstName U1
TEXT 528 368 Left 0 !.tran 100m startup
TEXT 216 64 Bottom 0 ;LTC6994-1 10ms Delay Interval Generator\nOutput Low When IN is Low\nRising Edge On IN Starts Delay to Output Rising Edge\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\0a2417ca8467_Select_Source_by_Param_2.asc
* Generated by LTspice 26.0.1 for Windows.
* Select a source V1 ... V3 by switch parameter s
;.step param s 1 3 1
B1 0 out V=V({s})
V2 2 0 PULSE(0 1 0 .1 .2 .1 .5)
V1 1 0 SINE(0 1 5)
V3 3 0 PULSE(0 1 0 .02 .04 .025 .2)
.param s=1 ;switch parameter
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 176 176 128
WIRE 176 336 176 288
WIRE 176 496 176 448
WIRE 240 128 176 128
WIRE 240 288 176 288
WIRE 240 448 176 448
WIRE 416 176 416 128
WIRE 608 128 416 128
IOPIN 608 128 Out
SYMBOL voltage 176 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 5)
SYMBOL bi 416 256 R180
WINDOW 0 24 88 Left 0
WINDOW 3 -83 -59 Left 0
SYMATTR InstName B1
SYMATTR Value V=V({s})
SYMBOL voltage 176 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 0 .1 .2 .1 .5)
SYMBOL voltage 176 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 0 .02 .04 .025 .2)
FLAG 416 256 0
FLAG 176 256 0
FLAG 240 128 1
FLAG 176 416 0
FLAG 240 288 2
FLAG 608 128 out
FLAG 176 576 0
FLAG 240 448 3
TEXT 384 56 Left 0 !.param s=1  ;switch parameter\n;.step param s 1 3 1
TEXT 158 66 Left 0 !.tran 1
TEXT 152 24 Left 0 ;Select a source V1 ... V3 by switch parameter s
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1844-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 6.5)
R1 OUT 0 17
C1 OUT 0 1
XU1 IN 0 IN OUT LTC1844-2.5 ;pnba IN)GND)_SHDN)OUT
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1844-2.5.asy)
.lib LTC1844-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1940 1316
WIRE 64 80 -32 80
WIRE 80 80 64 80
WIRE 432 80 368 80
WIRE 528 80 432 80
WIRE -32 96 -32 80
WIRE 528 96 528 80
WIRE 432 112 432 80
WIRE -32 192 -32 176
WIRE 432 192 432 176
WIRE 528 192 528 176
WIRE 64 240 64 80
WIRE 80 240 64 240
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -32 192 0
FLAG 528 192 0
FLAG 528 80 OUT
FLAG -32 80 IN
FLAG 432 192 0
SYMBOL voltage -32 80 R0
WINDOW 3 -89 162 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PWL(0 0 1 6.5)
SYMATTR InstName V1
SYMBOL res 512 80 R0
SYMATTR InstName R1
SYMATTR Value 17
SYMBOL cap 416 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL LTC1844-2.5 224 160 R0
SYMATTR InstName U1
TEXT 184 368 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\d88e3fe1825b_Assignment_5a__i_.asc
* Generated by LTspice 26.0.1 for Windows.
Vbe N003 0 3.5
Vce N002 0 15
Rb N004 N003 100000
Q1 N001 N004 0 0 BC547B
Rc N002 N001 100
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
* Input Characteristics of Common Emitter Configuration for NPN Transistor
.dc Vbe 0 15 1 Vce 0 5 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 -32 272 -32
WIRE 464 -32 416 -32
WIRE 272 80 272 -32
WIRE 464 96 464 -32
WIRE 80 128 32 128
WIRE 208 128 160 128
WIRE 32 224 32 128
WIRE 32 336 32 304
WIRE 272 336 272 176
WIRE 272 336 32 336
WIRE 464 336 464 176
WIRE 464 336 272 336
WIRE 272 384 272 336
FLAG 272 384 0
SYMBOL voltage 32 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vbe
SYMATTR Value 3.5
SYMBOL voltage 464 80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vce
SYMATTR Value 15
SYMBOL res 176 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rb
SYMATTR Value 100000
SYMBOL npn 208 80 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL res 432 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rc
SYMATTR Value 100
TEXT -176 -120 Left 2 ;Input Characteristics of Common Emitter Configuration for NPN Transistor
TEXT -48 392 Left 2 !.dc Vbe 0 15 1 Vce 0 5 1
* Z:\home\khalils\Downloads\files\data\raw_asc\2e19ad06ee12_Flicker1.asc
* Generated by LTspice 26.0.1 for Windows.
* Shows how to make a resistor noiseless.
* Flicker Noise\n---------------------\nHelmut Sennewald\n \nThis example schematic shows how to get the flicker noise.\n \n1. Run the simulation with and without the NMOS noise \nparameter for flicker noise.\n \n2. Plot the difference in V(onoise) to get the flicker noise.\n@1 is the first run. @2 is the second run.\nPlot the following expression: \nsqrt(V(onoise)@2*V(onoise)@2-V(onoise)@1*V(onoise)@1)
R3 N001 OUT 6k
V2 N001 0 5
V1 N002 0 1.8 AC 1
R6 N003 N002 6k noiseless
M1 OUT N003 0 0 NMOS1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.NOISE V(out) V1 oct 10 10 100K
.model NMOS1 NMOS(Vto=1 Kp=1m Kf={KF1} Af=1)
.op
.step param KF1 list 0 1e-25
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3088 1688
WIRE 1568 1136 1568 1104
WIRE 1568 1248 1568 1216
WIRE 1664 1104 1568 1104
WIRE 1760 832 1760 816
WIRE 1760 928 1760 912
WIRE 1952 1104 1744 1104
WIRE 2000 816 1760 816
WIRE 2000 832 2000 816
WIRE 2000 1008 2000 912
WIRE 2000 1024 2000 1008
WIRE 2000 1312 2000 1120
WIRE 2240 1008 2000 1008
LINE Normal 1785 1046 1504 1046
LINE Normal 1785 1316 1785 1046
LINE Normal 1785 1316 1504 1316
LINE Normal 1504 1316 1504 1046
SYMBOL nmos 1952 1024 R0
SYMATTR InstName M1
SYMATTR Value NMOS1
SYMBOL voltage 1760 816 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 1568 1120 R0
WINDOW 3 37 57 Left 0
WINDOW 123 24 104 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 1.8
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL res 1984 816 R0
SYMATTR InstName R3
SYMATTR Value 6k
SYMBOL res 1760 1088 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
WINDOW 123 60 56 VTop 0
SYMATTR InstName R6
SYMATTR Value 6k
SYMATTR Value2 noiseless
FLAG 1760 928 0
FLAG 1568 1248 0
FLAG 2240 1008 OUT
FLAG 2000 1312 0
TEXT 1464 720 Left 0 !.NOISE V(out) V1 oct 10 10 100K
TEXT 1464 1016 Left 0 ;Shows how to make a resistor noiseless.
TEXT 1472 264 Left 0 ;Flicker Noise\n---------------------\nHelmut Sennewald\n \nThis example schematic shows how to get the flicker noise.\n \n1. Run the simulation with and without the NMOS noise \nparameter for flicker noise.\n \n2. Plot the difference in V(onoise) to get the flicker noise.\n@1 is the first run. @2 is the second run.\nPlot the following expression: \nsqrt(V(onoise)@2*V(onoise)@2-V(onoise)@1*V(onoise)@1)
TEXT 1464 760 Left 0 !.model NMOS1 NMOS(Vto=1 Kp=1m Kf={KF1} Af=1)
TEXT 1464 680 Left 0 !.op
TEXT 1464 640 Left 0 !.step param KF1 list 0 1e-25
* Z:\home\khalils\Downloads\files\data\raw_asc\697e63469ce5_1844-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1844-1.8.asy)
I1 OUT 0 {iload} load
XU1 IN 0 IN OUT LTC1844-1.8 ;pnba IN)GND)_SHDN)OUT
V1 IN 0 5
.dc v1 5 1 10m
.measure DC vdrop WHEN V(out)=1.7
.measure DC dropout param Vdrop-1.7
.param iload=150m
.lib LTC1844-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1940 1316
WIRE 64 80 -32 80
WIRE 80 80 64 80
WIRE 448 80 368 80
WIRE -32 96 -32 80
WIRE 448 96 448 80
WIRE -32 192 -32 176
WIRE 448 192 448 176
WIRE 64 240 64 80
WIRE 80 240 64 240
WIRE 224 304 224 288
SYMBOL current 448 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 25 80 Left 2
WINDOW 3 41 44 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMATTR Value {iload}
SYMBOL voltage -32 80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL LTC1844-1.8 224 160 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -32 192 0
FLAG 448 192 0
FLAG 448 80 OUT
FLAG -32 80 IN
TEXT 648 88 Left 2 !.dc v1 5 1 10m
TEXT 648 176 Left 2 !.measure DC vdrop WHEN V(out)=1.7\n.measure DC dropout param Vdrop-1.7
TEXT 648 128 Left 2 !.param iload=150m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1772.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N006 OUT 4.7
V1 IN 0 5
C1 OUT 0 47 Rser=.1
C2 N003 N002 220p
R1 N001 IN 0.03
R2 N005 0 78.7K
R3 OUT N005 169K
R4 N002 0 10K
MQ1 N006 N004 N001 N001 FDC638P
Rload OUT 0 2
XU1 N003 0 N005 N001 IN N004 LTC1772 ;pnba Ith/Run)GND)FB)Sense-)Vin)Pgate
D1 0 N006 MBRS340
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 250u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1772.asy)
.lib LTC1772.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2248 1200
WIRE 1600 544 1312 544
WIRE 1760 544 1600 544
WIRE 1600 560 1600 544
WIRE 1760 560 1760 544
WIRE 1312 576 1312 544
WIRE 1600 656 1600 640
WIRE 1600 656 1488 656
WIRE 1760 656 1760 640
WIRE 1600 720 1600 656
WIRE 960 736 944 736
WIRE 1056 736 1040 736
WIRE 1136 736 1120 736
WIRE 1552 736 1488 736
WIRE 1520 816 1488 816
WIRE 1600 832 1600 816
WIRE 1680 832 1600 832
WIRE 1840 832 1760 832
WIRE 1952 832 1840 832
WIRE 2048 832 1952 832
WIRE 1600 848 1600 832
WIRE 1840 848 1840 832
WIRE 1952 848 1952 832
WIRE 2048 848 2048 832
WIRE 1312 928 1312 896
WIRE 1600 928 1600 912
WIRE 1952 944 1952 912
WIRE 2048 944 2048 928
WIRE 1520 960 1520 816
WIRE 1840 960 1840 928
WIRE 1840 960 1520 960
WIRE 1840 976 1840 960
WIRE 1840 1072 1840 1056
FLAG 2048 832 OUT
FLAG 1760 656 0
FLAG 1952 944 0
FLAG 2048 944 0
FLAG 1840 1072 0
FLAG 944 736 0
FLAG 1600 928 0
FLAG 1312 928 0
FLAG 1760 544 IN
SYMBOL ind 1664 848 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL VOLTAGE 1760 544 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL polcap 1936 848 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMATTR SpiceLine Rser=.1
SYMBOL cap 1120 720 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 220p
SYMBOL RES 1584 656 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 0.03
SYMBOL res 1824 960 R0
SYMATTR InstName R2
SYMATTR Value 78.7K
SYMBOL res 1824 832 R0
SYMATTR InstName R3
SYMATTR Value 169K
SYMBOL res 1056 720 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL PMOS 1552 816 M180
WINDOW 0 56 80 Left 2
WINDOW 3 56 44 Left 2
SYMATTR InstName Q1
SYMATTR Value FDC638P
SYMBOL res 2032 832 R0
SYMATTR InstName Rload
SYMATTR Value 2
SYMBOL POWERPRODUCTS\\LTC1772 1312 736 R0
SYMATTR InstName U1
SYMBOL schottky 1584 912 M180
WINDOW 0 37 58 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMATTR Description Diode
SYMATTR Type diode
TEXT 1496 1016 Left 2 !.tran 250u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3060-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3060-1.2.asy)
V1 IN 0 12
C1 N002 0 10n
Rload OUT 0 12
XU1 N002 N001 OUT MP_01 IN MP_02 IN 0 LT3060-1.2 ;pnba Ref/Byp)ADJ)OUT))IN))_SHDN)GND
C3 OUT 0 10
C2 OUT N001 10n
.tran .1 startup
.lib LT3060-1.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 112 -16 112
WIRE 96 112 0 112
WIRE 112 112 96 112
WIRE 432 112 368 112
WIRE 544 112 432 112
WIRE 624 112 544 112
WIRE -16 128 -16 112
WIRE 544 128 544 112
WIRE 624 128 624 112
WIRE 432 144 432 112
WIRE -16 224 -16 208
WIRE 96 224 96 112
WIRE 112 224 96 224
WIRE 432 224 432 208
WIRE 432 224 368 224
WIRE 544 224 544 192
WIRE 624 224 624 208
WIRE 112 336 80 336
WIRE 400 336 368 336
WIRE 400 352 400 336
WIRE 400 432 400 416
SYMBOL PowerProducts\\LT3060-1.2 240 224 R0
SYMATTR InstName U1
SYMBOL cap 416 144 R0
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL cap 528 128 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL cap 384 352 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 608 112 R0
SYMATTR InstName Rload
SYMATTR Value 12
SYMBOL voltage -16 112 R0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 80 336 0
FLAG -16 224 0
FLAG 400 432 0
FLAG 544 224 0
FLAG 624 224 0
FLAG 624 112 OUT
FLAG 0 112 IN
TEXT 480 320 Left 2 !.tran .1 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6010.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6010.asy)
V3 N003 0 SINE(0 1 1K)
V2 -V 0 -10
R2 N001 0 1K
R1 N002 N001 1K
XU1 N003 N001 N002 +V -V NC_01 LT6010 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN
V1 +V 0 10
.tran 3m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -112 48 -128 48
WIRE 0 48 -32 48
WIRE 96 48 0 48
WIRE 208 48 176 48
WIRE 64 112 64 96
WIRE -416 160 -416 144
WIRE -288 160 -288 144
WIRE 0 160 0 48
WIRE 32 160 0 160
WIRE 208 192 208 48
WIRE 208 192 176 192
WIRE 32 224 -160 224
WIRE -160 240 -160 224
WIRE -416 256 -416 240
WIRE -288 256 -288 240
WIRE 64 288 64 272
WIRE -160 336 -160 320
SYMBOL voltage -160 224 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 192 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL opamps\\LT6010 64 192 R0
SYMATTR InstName U1
SYMBOL res -16 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -416 144 R0
SYMATTR InstName V2
SYMATTR Value -10
FLAG -288 256 0
FLAG 64 96 +V
FLAG -288 144 +V
FLAG 64 288 -V
FLAG -416 256 0
FLAG -416 144 -V
FLAG -128 48 0
FLAG -160 336 0
TEXT 160 312 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\34d729eb1ffb_Modelo.asc
* Generated by LTspice 26.0.1 for Windows.
**********
*SRC=ARF463AB;ARF463AB;MOSFETs N;Enh;500V 9.0A 1.1ohms PPG Microsemi RF MOSFET
*SYM=POWMOSN
*09-14-09 Rev A GJK PPG Microsemi
* TERMINALS: D G S
*****
LG 20 19 2.8n
LS 30 29 2n
XM1 N002 N003 0 ARF463AB ;pnba D)G)S
VGG N003 0 PULSE(0 6 0 1e-12 1e-12 1.25e-6 250e-6)
RD 11 1 1.1
R1 N001 N002 10
LD 10 11 2n
D2 5 2 DGD
CGS 2 3 1200p
RS 29 3 2.25m
DSD 3 1 DSUB
M1 1 2 3 3 DMOS L=1U W=1U
RG 19 2 .5
D1 5 1 DGD
VDD N001 0 125
.tran 10e-6
.SUBCKT ARF463AB 10 20 30
.MODEL DMOS NMOS(LEVEL=3 VMAX=1.04Meg THETA=100.0m ETA=2.00m VTO=3.00 KP=2.60)
.MODEL DSUB D (IS=1.27u N=1.50 RS=5.00m BV=500 CJO=799p VJ=0.800 M=0.420 TT=311n)
.MODEL DGD D (IS=100n N=1.5 RS=10m BV=500 CJO=81.7p M=.5 VJ=.700 TT=1n)
.ENDS
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2376 868
WIRE 1984 160 1840 160
WIRE 1984 208 1984 160
WIRE 1840 224 1840 160
WIRE 1840 320 1840 304
WIRE 1984 384 1984 288
WIRE 1936 464 1840 464
WIRE 1840 512 1840 464
WIRE 1984 544 1984 480
WIRE 1840 624 1840 592
SYMBOL voltage 1840 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VDD
SYMATTR Value 125
SYMBOL res 1968 192 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage 1840 496 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VGG
SYMATTR Value PULSE(0 6 0 1e-12 1e-12 1.25e-6 250e-6)
SYMBOL nmos 1936 384 R0
SYMATTR InstName M1
SYMATTR Value ARF463AB
SYMATTR Prefix X
FLAG 1984 544 0
FLAG 1840 320 0
FLAG 1840 624 0
TEXT 318 852 Left 2 !.tran 10e-6
TEXT 312 192 Left 2 !**********\n*SRC=ARF463AB;ARF463AB;MOSFETs N;Enh;500V 9.0A 1.1ohms PPG Microsemi RF MOSFET\n*SYM=POWMOSN\n*09-14-09 Rev A GJK PPG Microsemi\n.SUBCKT ARF463AB   10 20 30\n*     TERMINALS:  D  G  S\nM1   1  2  3  3  DMOS L=1U W=1U\nLD  10  11  2n\nRD  11          1   1.1\nLG  20  19  2.8n\nRG  19  2   .5\nD1   5  1   DGD\nD2   5  2   DGD\nCGS  2  3   1200p\nDSD  3  1   DSUB\nRS  29  3   2.25m\nLS  30  29  2n\n.MODEL DMOS NMOS(LEVEL=3 VMAX=1.04Meg THETA=100.0m ETA=2.00m VTO=3.00 KP=2.60)\n.MODEL DSUB D (IS=1.27u N=1.50 RS=5.00m BV=500 CJO=799p VJ=0.800 M=0.420 TT=311n)\n.MODEL DGD  D (IS=100n N=1.5 RS=10m BV=500 CJO=81.7p M=.5 VJ=.700 TT=1n)\n.ENDS\n*****