Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\321c65b475be_curva-trans-universal.asc
* Generated by LTspice 26.0.1 for Windows.
+ Beta=1.125m Betatce=-500m
+ Rd=1 Rs=1 Lambda=2.3m
+ Vto=-1.372 Vtotc=-2.5m
+ Is=181.3f Isr=1.747p N=1
+ Nr=2 Xti=3 Alpha=2.543u
+ Vk=152.2 Cgd=4p M=311.4m
+ Pb=500m Fc=500m Cgs=4.627p
+ Kf=1.045e-002f Af=1)
V1 N002 0 -7
J1 N001 N002 0 J2N5457
V2 N001 0 {Vdd}
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.MODEL J2N5457 NJF(
.param Vdd=15
.step param Vdd 0 15 0.2
.dc V1 -7 0 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1584 680
WIRE 432 80 240 80
WIRE 240 128 240 80
WIRE 432 128 432 80
WIRE 192 192 32 192
WIRE 32 224 32 192
WIRE 32 336 32 304
WIRE 240 336 240 224
WIRE 240 336 32 336
WIRE 432 336 432 208
WIRE 432 336 240 336
WIRE 240 368 240 336
SYMBOL voltage 432 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value {Vdd}
SYMBOL njf 192 128 R0
SYMATTR InstName J1
SYMATTR Value J2N5457
SYMBOL voltage 32 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -7
FLAG 240 368 0
TEXT 560 96 Left 2 !.MODEL J2N5457 NJF(\n+ Beta=1.125m Betatce=-500m\n+ Rd=1 Rs=1 Lambda=2.3m\n+ Vto=-1.372 Vtotc=-2.5m\n+ Is=181.3f Isr=1.747p N=1\n+ Nr=2 Xti=3 Alpha=2.543u\n+ Vk=152.2 Cgd=4p M=311.4m\n+ Pb=500m Fc=500m Cgs=4.627p\n+ Kf=1.045e-002f Af=1)
TEXT 296 368 Left 2 !.param Vdd=15\n.step param Vdd 0 15 0.2
TEXT -16 384 Left 2 !.dc V1 -7 0 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\108e9992a5c7_rectification-v1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 SINE(0 10 50 0 0 0 0)
D1 N001 N002 D
R1 0 N002 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 176 96 16 96
WIRE 400 96 240 96
WIRE 624 96 480 96
WIRE 16 160 16 96
WIRE 16 384 16 240
WIRE 624 384 624 96
WIRE 624 384 16 384
WIRE 624 432 624 384
FLAG 624 432 0
SYMBOL voltage 16 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 50 0 0 0 0)
SYMBOL diode 176 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL res 496 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
TEXT -16 392 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\1d124b7d7bf9_wien_bridge_oscillator.asc
* Generated by LTspice 26.0.1 for Windows.
* Bandpass filter filters the output of non-inverting amplifier \nto the right frequency and feeds it back into the amp.\nOscillation start due to noise at the input of the amplifier\nnoise gets amplified -> filtered to resonant frequency -> back at the input of the amp, amplified by 2x -> filtered again
R2 N001 0 10e3
XU1 v2 N001 vdd vss vo LM741 ;pnba In+)In-)V+)V-)OUT
V3 vss 0 -3
V1 vdd 0 3
R3 N002 vo 1.59e3
R4 v2 0 1.59e3
C1 v2 0 0.01e-6 IC=1
C3 v2 N002 0.01e-6
R1 vo N001 20e3
.tran 1
.include component_lib/lm741.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1644 680
WIRE -288 -336 -400 -336
WIRE -128 -336 -208 -336
WIRE -320 -256 -320 -304
WIRE -400 -240 -400 -336
WIRE -400 -240 -496 -240
WIRE -352 -240 -400 -240
WIRE -128 -224 -128 -336
WIRE -128 -224 -288 -224
WIRE -32 -224 -128 -224
WIRE 128 -224 48 -224
WIRE 256 -224 192 -224
WIRE 384 -224 256 -224
WIRE 448 -224 384 -224
WIRE -352 -208 -432 -208
WIRE 656 -208 656 -224
WIRE -496 -176 -496 -240
WIRE 256 -128 256 -224
WIRE 448 -128 448 -224
WIRE 656 -128 656 -208
WIRE 816 -128 816 -224
WIRE -320 -80 -320 -192
WIRE -320 -64 -320 -80
WIRE -496 -32 -496 -96
WIRE 656 32 656 -48
WIRE 816 32 816 -48
WIRE 256 48 256 -64
WIRE 384 48 256 48
WIRE 448 48 448 -48
WIRE 448 48 384 48
WIRE 384 80 384 48
SYMBOL OpAmps\\opamp2 -320 -288 R0
SYMATTR InstName U1
SYMATTR Value LM741
SYMBOL cap 192 -240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 0.01e-6
SYMBOL res -192 -352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20e3
SYMBOL res 64 -240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1.59e3
SYMBOL voltage 816 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -3
SYMBOL res -512 -192 R0
SYMATTR InstName R2
SYMATTR Value 10e3
SYMBOL cap 240 -128 R0
SYMATTR InstName C1
SYMATTR Value 0.01e-6 IC=1
SYMBOL res 432 -144 R0
SYMATTR InstName R4
SYMATTR Value 1.59e3
SYMBOL voltage 656 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
FLAG 384 80 0
FLAG 384 -224 v2
FLAG -496 -32 0
FLAG -432 -208 v2
FLAG -128 -224 vo
FLAG -320 -304 vdd
FLAG 656 32 0
FLAG 656 -208 vdd
FLAG 816 32 0
FLAG 816 -224 vss
FLAG -320 -80 vss
TEXT 760 -400 Left 2 !.tran 1
TEXT 760 -368 Left 2 !.include component_lib/lm741.lib
TEXT -472 -560 Left 2 ;Bandpass filter filters the output of non-inverting amplifier \nto the right frequency and feeds it back into the amp.\nOscillation start due to noise at the input of the amplifier\nnoise gets amplified -> filtered to resonant frequency -> back at the input of the amp, amplified by 2x -> filtered again
* Z:\home\khalils\Downloads\files\data\raw_asc\1d27dde79883_ideal_oscillations.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N001 0 1F
L1 N001 0 0.025H
V1 N003 0 10V
S1 N001 N003 N002 0 MYSW
V2 N002 0 PULSE(0 1 10m 1n 1n 10m 20m 10)
.tran 0 25ms 15ms
.model MYSW SW(Ron=1 Roff=1Meg Vt=0.5)
* Oscillation Between Capacitor and Inductor
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 240 16 160 16
WIRE 160 48 160 16
WIRE 112 64 -48 64
WIRE -48 96 -48 64
WIRE 112 112 16 112
WIRE 240 112 240 16
WIRE 384 112 240 112
WIRE 384 128 384 112
WIRE 160 144 160 128
WIRE 240 144 240 112
WIRE 16 160 16 112
WIRE 240 224 240 208
WIRE 384 224 384 208
WIRE 384 224 240 224
WIRE 160 256 160 224
WIRE 240 256 240 224
WIRE 240 256 160 256
WIRE 16 272 16 240
WIRE 240 272 240 256
FLAG 240 272 0
FLAG -48 96 0
FLAG 16 272 0
SYMBOL cap 224 144 R0
SYMATTR InstName C1
SYMATTR Value 1uF
SYMBOL ind 368 112 R0
SYMATTR InstName L1
SYMATTR Value 0.025H
SYMBOL voltage 160 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10V
SYMBOL sw 160 32 R0
SYMATTR InstName S1
SYMATTR Value MYSW
SYMBOL voltage 16 144 R0
WINDOW 3 -151 197 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 1 10m 1n 1n 10m 20m 10)
SYMATTR InstName V2
TEXT -56 392 Left 2 !.tran 0 25ms 15ms
TEXT -200 368 Left 2 !.model MYSW SW(Ron=1 Roff=1Meg Vt=0.5)
TEXT -64 -72 Left 2 ;Oscillation Between Capacitor and Inductor
* Z:\home\khalils\Downloads\files\data\raw_asc\f093e3918ef2_opamp.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2, XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Contrib\Toshiba\diode\TBAT54.asy)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
XU3 N003 0 TBAT54 ;pnba 1)2
XU2 N002 N003 TBAT54 ;pnba 1)2
V1 V28 0 28V
R3 Vout N002 100k
R1 N001 Vin 10k
XU1 N002 N001 V28 0 Vout LT1001 ;pnba In+)In-)V+)V-)OUT
V2 Vin 0 0
R2 Vout N001 10k
.dc V2 -10 10 0.5
.lib Contrib/Toshiba/DIODE/TBAT54_enc.lib
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 272 -64 224 -64
WIRE 400 -64 352 -64
WIRE 80 48 64 48
WIRE 224 48 224 -64
WIRE 224 48 160 48
WIRE 256 48 224 48
WIRE 400 64 400 -64
WIRE 400 64 320 64
WIRE 464 64 400 64
WIRE 256 80 224 80
WIRE 224 192 224 80
WIRE 288 192 224 192
WIRE 400 192 400 64
WIRE 400 192 368 192
WIRE -416 240 -416 208
WIRE -272 240 -272 160
WIRE 224 240 224 192
WIRE 224 336 224 304
WIRE 224 432 224 400
IOPIN 464 64 Out
IOPIN 64 48 In
IOPIN -272 160 Out
IOPIN -416 208 Out
RECTANGLE Normal -80 64 -464 -160 2
RECTANGLE Normal -80 448 -528 80 2
RECTANGLE Normal -64 512 608 -160 2
SYMBOL voltage -416 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 28V
SYMBOL res 384 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL voltage -272 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL res 368 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 176 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL Contrib\\Toshiba\\diode\\TBAT54 208 336 R0
SYMATTR InstName U3
SYMBOL Contrib\\Toshiba\\diode\\TBAT54 208 240 R0
SYMATTR InstName U2
SYMBOL OpAmps\\OP07 288 0 R0
SYMATTR InstName U1
FLAG 224 432 0
FLAG 288 96 0
FLAG -416 320 0
FLAG -272 320 0
FLAG 464 64 Vout
FLAG 64 48 Vin
FLAG -272 160 Vin
FLAG -416 208 V28
FLAG 288 32 V28
TEXT -448 -104 Left 2 !.dc V2 -10 10 0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX4232.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX4232.asy)
V1 IN 0 SINE(0 50m 100k)
CL OUT 0 15p
Vcc Vcc 0 2.5
Vee 0 Vee 2.5
RL OUT 0 100k
XU1 IN OUT Vcc Vee OUT MAX4232 ;pnba In+)In-)V+)V-)OUT
.tran 10u
.lib MAX4232.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 144 288 144 272
WIRE 432 352 432 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 144 400 144 368
WIRE 144 400 112 400
WIRE 400 400 304 400
WIRE 112 416 112 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 144 448 144 400
WIRE 432 448 432 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 144 544 144 528
WIRE 304 592 304 576
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL voltage 144 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL MAX4232 432 320 R0
SYMATTR InstName U1
SYMBOL voltage 144 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 100k)
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 100k
FLAG 720 384 OUT
FLAG 144 272 Vcc
FLAG 144 544 Vee
FLAG 432 320 Vcc
FLAG 432 448 Vee
FLAG 112 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
TEXT 96 632 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\0d4fdbcbaa8f_diode_ideal.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
D1 OUT 0 Dideal
R1 OUT IN 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model Dideal D(Is=1e-20 N=1 Rs=0)
.dc V1 0 5 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 64 64 16 64
WIRE 160 64 64 64
WIRE 288 64 240 64
WIRE 320 64 288 64
WIRE 16 144 16 64
WIRE 320 144 320 64
WIRE 16 272 16 224
WIRE 320 272 320 208
WIRE 320 272 16 272
WIRE 16 304 16 272
SYMBOL diode 304 144 R0
SYMATTR InstName D1
SYMATTR Value Dideal
SYMBOL voltage 16 128 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 256 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 16 304 0
FLAG 64 64 IN
FLAG 288 64 OUT
TEXT 16 336 Left 2 !.model Dideal D(Is=1e-20 N=1 Rs=0)
TEXT -16 360 Left 2 !.dc V1 0 5 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\09a4760574cd_benadering_frequentie_responsie.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N002 N001 7k8
C1 N003 N002 100n
R2 N002 0 1k
V.ac N001 0 ac
R1 N003 0 1k6
.ac dec 10 1 100k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 96 -160 96
WIRE 112 96 32 96
WIRE 288 96 176 96
WIRE -160 112 -160 96
SYMBOL voltage -160 96 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName .ac
SYMATTR Value ac
SYMBOL res 160 80 R0
SYMATTR InstName R1
SYMATTR Value 1k6
SYMBOL cap 176 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL res 48 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 7k8
SYMBOL res 16 80 R0
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 176 176 0
FLAG -160 192 0
FLAG 32 176 0
TEXT -32 248 Left 2 !.ac dec 10 1 100k
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8300.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8300.asy)
L2 0 N001 19 Rser=20m Cpar=.2p
L1 IN N002 300 Rser=500m Cpar=1p
R1 IN N003 1Meg
C1 OUT 0 4.7 V=6.3 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C2012X5ROJ475M" type="X5R"
V1 IN 0 60
R2 N003 0 40.2K
D1 N001 OUT MBRS1100
K1 L1 L2 1
R3 N002 N004 210K
XU1 N003 0 N004 N002 IN LT8300 ;pnba EN/UVLO)GND)RFB)SW)Vin
Rload OUT 0 16.6
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m startup
.lib LT8300.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE -16 16 -112 16
WIRE 416 16 -16 16
WIRE 560 16 464 16
WIRE 688 16 624 16
WIRE 784 16 688 16
WIRE -112 32 -112 16
WIRE 416 32 416 16
WIRE 464 32 464 16
WIRE 688 32 688 16
WIRE 784 32 784 16
WIRE -112 128 -112 112
WIRE 464 128 464 112
WIRE 688 128 688 96
WIRE 784 128 784 112
WIRE -16 144 -16 16
WIRE 96 144 -16 144
WIRE 416 144 416 112
WIRE 416 144 320 144
WIRE -16 176 -16 144
WIRE 416 176 416 144
WIRE -16 272 -16 256
WIRE 96 272 -16 272
WIRE 416 272 416 256
WIRE 416 272 320 272
WIRE -16 288 -16 272
WIRE 208 336 208 320
WIRE -16 384 -16 368
SYMBOL ind2 480 128 R180
WINDOW 0 -4 72 Right 2
WINDOW 3 -1 33 Right 2
SYMATTR InstName L2
SYMATTR Value 19
SYMATTR Type ind
SYMATTR SpiceLine Rser=20m Cpar=.2p
SYMBOL res 400 160 R0
SYMATTR InstName R3
SYMATTR Value 210K
SYMBOL res 768 16 R0
SYMATTR InstName Rload
SYMATTR Value 16.6
SYMBOL ind2 400 16 R0
WINDOW 0 0 39 Right 2
WINDOW 3 0 77 Right 2
SYMATTR InstName L1
SYMATTR Value 300
SYMATTR Type ind
SYMATTR SpiceLine Rser=500m Cpar=1p
SYMBOL schottky 560 32 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS1100
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 672 32 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C2012X5ROJ475M" type="X5R"
SYMBOL voltage -112 16 R0
SYMATTR InstName V1
SYMATTR Value 60
SYMBOL res -32 160 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL PowerProducts\\LT8300 208 208 R0
SYMATTR InstName U1
SYMBOL res -32 272 R0
SYMATTR InstName R2
SYMATTR Value 40.2K
FLAG 208 336 0
FLAG -112 128 0
FLAG -16 384 0
FLAG -112 16 IN
FLAG 464 128 0
FLAG 688 128 0
FLAG 784 128 0
FLAG 784 16 OUT
TEXT 440 16 Bottom 2 !K1 L1 L2 1
TEXT 552 376 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\201a759276e2_FullDuplex.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 R1 1N914
V1 N001 N003 SINE(0 3 3k)
D3 N003 R2 1N914
R1 0 N002 1K tol=1 pwr=0.1
D4 R2 N001 1N914
R2 N003 0 1K tol=1 pwr=0.1
V2 N001 N002 SINE(0 3 1k)
D2 R1 N002 1N914
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -128 208 -128 80
WIRE -128 352 -128 288
WIRE -48 80 -128 80
WIRE -48 96 -48 80
WIRE -48 192 -48 160
WIRE -48 224 -48 192
WIRE -48 352 -128 352
WIRE -48 352 -48 288
WIRE -32 352 -48 352
WIRE -16 192 -48 192
WIRE 80 352 48 352
WIRE 80 368 80 352
WIRE 112 352 80 352
WIRE 224 80 -48 80
WIRE 224 96 224 80
WIRE 224 192 192 192
WIRE 224 192 224 160
WIRE 224 224 224 192
WIRE 224 352 192 352
WIRE 224 352 224 288
WIRE 336 80 224 80
WIRE 336 192 336 80
WIRE 336 352 224 352
WIRE 336 352 336 272
SYMBOL diode 240 288 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D3
SYMATTR Value 1N914
SYMBOL diode 240 160 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D4
SYMATTR Value 1N914
SYMBOL res 208 336 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 1K
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL voltage 336 176 R0
WINDOW 3 -60 -10 VRight 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 3 3k)
SYMBOL voltage -128 192 R0
WINDOW 3 -60 -10 VRight 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 3 1k)
SYMBOL res 64 336 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1K
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL diode -64 224 R0
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL diode -64 96 R0
SYMATTR InstName D1
SYMATTR Value 1N914
FLAG 80 368 0
FLAG -16 192 R1
FLAG 192 192 R2
TEXT -132 42 Left 0 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7171.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7171.asy)
XU1 IN N002 IN N001 OUT 0 ADM7171 ;pnba Vin)Sense)EN)SS)Vout)GND
V1 IN 0 3.5
C2 0 N001 1n
C1 OUT 0 4.7 Rser=1.5m
R1 OUT N002 15K
R2 N002 0 10K
Rload OUT 0 4
.tran 5m startup
.lib ADM7171.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 400 32 352 32
WIRE 528 32 400 32
WIRE 624 32 528 32
WIRE -32 48 -32 32
WIRE 528 48 528 32
WIRE 624 48 624 32
WIRE 400 80 400 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 528 144 528 112
WIRE 624 144 624 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 400 224 400 160
WIRE 400 224 352 224
WIRE 400 240 400 224
WIRE 224 304 224 288
WIRE 400 336 400 320
SYMBOL res 384 64 R0
SYMATTR InstName R1
SYMATTR Value 15K
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.5
SYMBOL res 384 224 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 608 32 R0
SYMATTR InstName Rload
SYMATTR Value 4
SYMBOL ADM7171 224 128 R0
SYMATTR InstName U1
SYMBOL cap 512 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL cap 16 208 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 624 144 0
FLAG 528 144 0
FLAG -32 32 IN
FLAG 624 32 OUT
FLAG 400 336 0
TEXT 568 288 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG5412.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 1 input\nParameter performance modeled at 15V dual supply\nPin Capacitance not included\nOnly one channel is modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG5412.asy)
V3 N001 0 10
R1 N002 0 300
V2 -V 0 -15
XU1 +V -V N003 N001 N002 0 ADG5412 ;pnba Vdd)Vss)IN)S)D)GND
V4 N003 0 pulse(0 5 0 20n 20n 10u 20u)
V1 +V 0 15
.tran 50u
.lib ADG5412.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2844 1336
WIRE -112 -128 -112 -144
WIRE -464 -48 -464 -64
WIRE -304 -48 -336 -48
WIRE -208 -48 -224 -48
WIRE 48 -48 -16 -48
WIRE 48 -16 48 -48
WIRE -208 16 -336 16
WIRE -464 48 -464 32
WIRE 48 80 48 64
WIRE -336 96 -336 16
WIRE -464 144 -464 128
WIRE -176 144 -176 128
WIRE -48 144 -48 128
WIRE -464 240 -464 224
WIRE -336 240 -336 176
SYMBOL ADG5412 -112 0 R0
SYMATTR InstName U1
SYMBOL voltage -208 -48 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL voltage -336 80 R0
WINDOW 3 19 116 Left 2
SYMATTR Value pulse(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V4
SYMBOL voltage -464 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -464 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
FLAG -464 240 0
FLAG -464 48 0
FLAG -464 -64 +V
FLAG -464 128 -V
FLAG -336 -48 0
FLAG -176 144 -V
FLAG -112 -144 +V
FLAG -48 144 0
FLAG -336 240 0
FLAG 48 80 0
TEXT 112 256 Left 2 !.tran 50u
TEXT -488 -320 Left 2 ;Note:\nSwitch shown for a logic 1 input\nParameter performance modeled at 15V dual supply\nPin Capacitance not included\nOnly one channel is modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\5f51150ca504_MSi001_VCO_stuff.asc
* Generated by LTspice 26.0.1 for Windows.
* Loop filter pre-charge connects here?\n(this allows fast charging of cap, bypassing R)
* VCO_VCC connects here
* Charge pump out\n(this is to be filtered by the loop filter)
* This loop filter is based on the PLL reference design given for the ADF4351 \non pg. 25 of its datasheet. This topology is also very close to the one used on\nthe reverse-engineered Mirics TV dongle.
* The charge pump output (phase detector) is probably somwhere around F_ref = 24 MHz.
C2 N001 filter_input 39nF
R1 0 N001 360
I1 0 filter_input PULSE(0 .001 0ns 0 0 1ns 42ns) AC 1
C3 0 filter_input 2.7nF
R2 filter_out filter_input 500
I3 0 filter_input PULSE(0 -.001 39.5ns 0 0 1ns 80ns) AC 0
C1 filter_out 0 2.7nF
.ac dec 1000 1k 0.1G
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1396 812
WIRE -464 128 -560 128
WIRE -464 160 -464 128
WIRE -560 176 -560 128
WIRE -464 272 -464 240
WIRE -304 272 -464 272
WIRE -48 272 -304 272
WIRE 48 272 -48 272
WIRE 176 272 48 272
WIRE 368 272 256 272
WIRE -464 304 -464 272
WIRE -48 304 -48 272
WIRE 48 304 48 272
WIRE 368 336 368 272
WIRE -48 400 -48 368
WIRE -464 416 -464 384
WIRE 368 432 368 400
WIRE -48 496 -48 480
WIRE 48 496 48 368
WIRE 48 496 -48 496
WIRE -48 512 -48 496
LINE Normal -208 384 -64 384 2
LINE Normal -336 512 -208 384 2
LINE Normal 464 272 512 224 2
LINE Normal 400 272 464 272 2
SYMBOL res -32 496 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 360
SYMBOL current -464 384 R180
WINDOW 123 -100 40 Left 2
WINDOW 39 0 0 Left 0
WINDOW 0 -76 68 Left 2
WINDOW 3 45 84 Left 2
SYMATTR Value2 AC 0
SYMATTR InstName I3
SYMATTR Value PULSE(0 -.001 39.5ns 0 0 1ns 80ns)
SYMBOL current -464 160 R0
WINDOW 123 45 41 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 -443 55 Left 2
SYMATTR Value2 AC 1
SYMATTR Value PULSE(0 .001 0ns 0 0 1ns 42ns)
SYMATTR InstName I1
SYMBOL cap 64 368 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value 2.7nF
SYMBOL cap 352 336 R0
SYMATTR InstName C1
SYMATTR Value 2.7nF
SYMBOL cap -32 368 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 39nF
SYMBOL res 272 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 500
FLAG -560 176 0
FLAG -464 416 0
FLAG 368 432 0
FLAG -48 512 0
FLAG -304 272 filter_input
FLAG 368 272 filter_out
TEXT -496 544 Left 2 ;Loop filter pre-charge connects here?\n(this allows fast charging of cap, bypassing R)
TEXT 376 184 Left 2 ;VCO_VCC connects here
TEXT -656 48 Left 2 ;Charge pump out\n(this is to be filtered by the loop filter)
TEXT -720 672 Left 2 !.ac dec 1000 1k 0.1G
TEXT -512 -112 Left 2 ;This loop filter is based on the PLL reference design given for the ADF4351 \non pg. 25 of its datasheet. This topology is also very close to the one used on\nthe reverse-engineered Mirics TV dongle.
TEXT -576 768 Left 2 ;The charge pump output (phase detector) is probably somwhere around F_ref = 24 MHz.