Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\MeasureBW.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 OUT N002 N003 0 2N3904
R3 N003 0 1K
V3 IN 0 AC 1
R1 0 N002 10K
C1 N002 IN 1
R2 N002 N001 100K
V1 N001 0 9
C2 N003 0 20
R4 N001 OUT 20K
C3 N002 OUT 100p
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.ac oct 10 1 10Meg
* This example schematic is supplied for informational/educational purposes only.
.measure tmp max mag(V(out))
.measure BW trig mag(V(out))=tmp/sqrt(2) rise=1 targ mag(V(out))=tmp/sqrt(2) fall=last
* Example of using a .measure script to measure the 3dB bandwidth of a response.\nExecute View=>SPICE Error Log after running the simulation to see the output of the\n.measure statements.
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2344 1936
WIRE 400 1152 192 1152
WIRE 576 1152 400 1152
WIRE 400 1168 400 1152
WIRE 576 1168 576 1152
WIRE 192 1184 192 1152
WIRE 400 1264 400 1248
WIRE 400 1264 272 1264
WIRE 448 1264 400 1264
WIRE 576 1264 576 1248
WIRE 272 1280 272 1264
WIRE 400 1312 400 1264
WIRE 80 1360 16 1360
WIRE 192 1360 192 1264
WIRE 192 1360 144 1360
WIRE 272 1360 272 1344
WIRE 272 1360 192 1360
WIRE 336 1360 272 1360
WIRE 16 1392 16 1360
WIRE 192 1392 192 1360
WIRE 400 1424 400 1408
WIRE 480 1424 400 1424
WIRE 400 1440 400 1424
WIRE 480 1456 480 1424
WIRE 16 1520 16 1472
WIRE 192 1520 192 1472
WIRE 400 1536 400 1520
WIRE 480 1536 480 1520
FLAG 16 1520 0
FLAG 16 1360 IN
FLAG 192 1520 0
FLAG 400 1536 0
FLAG 448 1264 OUT
FLAG 576 1264 0
FLAG 480 1536 0
SYMBOL npn 336 1312 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 384 1424 R0
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL voltage 16 1376 R0
WINDOW 123 24 105 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value ""
SYMBOL res 176 1488 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL cap 144 1344 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 176 1280 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL voltage 576 1152 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL cap 464 1456 R0
SYMATTR InstName C2
SYMATTR Value 20
SYMBOL res 384 1152 R0
SYMATTR InstName R4
SYMATTR Value 20K
SYMBOL cap 256 1344 M180
WINDOW 0 28 52 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value 100p
TEXT 560 1392 Left 2 !.ac oct 10 1 10Meg
TEXT 424 1632 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT -48 1584 Left 2 !.measure tmp max mag(V(out))\n.measure BW trig mag(V(out))=tmp/sqrt(2) rise=1 targ mag(V(out))=tmp/sqrt(2) fall=last
TEXT -72 1088 Left 2 ;Example of using a .measure script to measure the 3dB bandwidth of a response.\nExecute View=>SPICE Error Log after running the simulation to see the output of the\n.measure statements.
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX4238.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX4238.asy)
Vcc Vcc 0 2.5
CL OUT 0 15p
XU1 IN OUT Vcc Vee OUT Vcc MAX4238 ;pnba In+)In-)V+)V-)OUT)SHDN
Vee 0 Vee 2.5
RL OUT 0 10k
V1 IN 0 SINE(0 50m 10k)
.tran 100u
.lib MAX4238.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 64 288 64 272
WIRE 416 352 416 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 64 448 64 400
WIRE 416 448 416 416
WIRE 448 448 448 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 64 544 64 528
WIRE 304 592 304 576
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 10k
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 10k)
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL MAX4238 432 400 R0
SYMATTR InstName U1
FLAG 720 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
FLAG 448 448 Vcc
TEXT 16 632 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\9938aa264b12_diy-vna2.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N001 0 1k
C1 N002 0 15p
R1 N001 N002 10Meg
V1 N001 0 SINE(0 4 1000) Rser=50
.tran 0 30ms 0.01ns
.measure tran time_1 trig V(v1)=0 rise=2 targ V(v1)=0 rise=3
.measure frequency param 1/time_1
.measure tran tdelay trig V(v1)=0 rise=2 targ V(v2)=0 rise=2
.measure phase param 360* tdelay/time_1
.measure tran mag_v1 rms V(v1) trig V(v1)=0 rise=2 targ V(V1)=0 rise=3
.measure tran mag_v2 rms V(v2) trig V(v2)=0 rise=2 targ V(V1)=0 rise=3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1200 680
WIRE 176 48 -144 48
WIRE 272 48 176 48
WIRE 272 176 272 48
WIRE 176 192 176 48
WIRE -144 304 -144 48
WIRE 272 336 272 256
WIRE -144 528 -144 384
WIRE 112 528 -144 528
WIRE 176 528 176 272
WIRE 176 528 112 528
WIRE 272 528 272 400
WIRE 272 528 176 528
WIRE 112 560 112 528
SYMBOL cap 256 336 R0
SYMATTR InstName C1
SYMATTR Value 15p
SYMBOL res 160 176 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 256 160 R0
SYMATTR InstName R1
SYMATTR Value 10Meg
SYMBOL Misc/signal -144 288 R0
WINDOW 39 24 126 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V1
SYMATTR Value SINE(0 4 1000)
FLAG 112 560 0
TEXT -152 544 Left 2 !.tran 0 30ms 0.01ns
TEXT 352 96 Left 2 !.measure tran time_1 trig V(v1)=0 rise=2 targ V(v1)=0 rise=3\n.measure frequency param 1/time_1\n.measure tran tdelay trig V(v1)=0 rise=2 targ V(v2)=0 rise=2\n.measure phase param 360* tdelay/time_1
TEXT 392 440 Left 2 !.measure tran mag_v1 rms V(v1) trig V(v1)=0 rise=2 targ V(V1)=0 rise=3\n.measure tran mag_v2 rms V(v2) trig V(v2)=0 rise=2 targ V(V1)=0 rise=3
* Z:\home\khalils\Downloads\files\data\raw_asc\552082671071_Assignment_CD.asc
* Generated by LTspice 26.0.1 for Windows.
* (SPECIFICATIONS)\nGAIN = 0.95\n Output Impedance = 50 ohm\nload capacitance=5pF\nvdd=1.8V
* COMMON DRAIN AMPLIFIER DESIGNED USING GM OVER ID METHOD USING NMOS AND RESISTOR
;.tf V(vout) vgs
;tran 5m
;dc vgs 0 1.8 1m
M2 vout Vb 0 0 nch l=360n w=15.2u
vdd vdd 0 1.8
Vb Vb 0 1.349
M1 vdd vgs vout 0 nch l=0.36u w=75.6u
vgs vgs 0 SINE(1.7211 1m 1k) AC 1
C1 vout 0 5p
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include CMOS180.txt
.op
.ac dec 100 1meg 100G
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 128 320 80
WIRE 432 176 320 176
WIRE 272 208 208 208
WIRE 320 256 320 224
WIRE 480 256 320 256
WIRE 592 256 480 256
WIRE 320 272 320 256
WIRE 480 304 480 256
WIRE -128 320 -128 272
WIRE 0 320 0 272
WIRE 416 320 320 320
WIRE -272 352 -272 304
WIRE 272 352 224 352
WIRE 320 368 320 352
WIRE 320 384 320 368
WIRE 416 384 416 320
WIRE 416 384 320 384
WIRE 320 400 320 384
WIRE 480 416 480 368
WIRE -272 464 -272 432
WIRE -128 464 -128 400
WIRE 0 464 0 400
IOPIN 592 256 In
SYMBOL cap 464 304 R0
SYMATTR InstName C1
SYMATTR Value 5p
SYMBOL voltage -272 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vb
SYMATTR Value 1.349
SYMBOL nmos4 272 128 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=0.36u w=75.6u
SYMATTR InstName M1
SYMATTR Value nch
SYMBOL nmos4 272 272 R0
WINDOW 123 56 100 Left 2
SYMATTR InstName M2
SYMATTR Value nch
SYMATTR Value2 l=360n w=15.2u
SYMBOL voltage 0 304 R0
WINDOW 123 17 108 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 91 -58 VRight 2
WINDOW 0 22 6 Left 2
SYMATTR Value2 AC 1
SYMATTR Value SINE(1.7211 1m 1k)
SYMATTR InstName vgs
SYMBOL voltage -128 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vdd
SYMATTR Value 1.8
FLAG 0 464 0
FLAG -128 464 0
FLAG -128 272 vdd
FLAG 0 272 vgs
FLAG 208 208 vgs
FLAG 320 80 vdd
FLAG 592 256 vout
FLAG 480 416 0
FLAG 432 176 0
FLAG 224 352 Vb
FLAG -272 464 0
FLAG -272 304 Vb
FLAG 320 400 0
TEXT -264 -8 Left 2 !.include CMOS180.txt
TEXT -264 16 Left 2 !.op
TEXT -264 48 Left 2 !;.tf V(vout) vgs
TEXT -264 80 Left 2 !;tran 5m
TEXT -264 112 Left 2 !;dc vgs 0 1.8 1m
TEXT 464 -32 Left 2 ;(SPECIFICATIONS)\nGAIN = 0.95\n Output Impedance = 50 ohm\nload capacitance=5pF\nvdd=1.8V
TEXT -360 -104 Left 2 ;COMMON DRAIN AMPLIFIER DESIGNED USING GM OVER ID METHOD USING NMOS AND RESISTOR
TEXT -264 152 Left 2 !.ac dec 100 1meg 100G
* Z:\home\khalils\Downloads\files\data\raw_asc\0ee497f66acf_Design_A_Transistor.asc
* Generated by LTspice 26.0.1 for Windows.
* Vbe < 0.7v
* Ib = 5.6301mA
* Ic = B*Ic
* Ic = 56.658mA
* B = 110
* From datasheet B = 110 but we will use Bforced = 10 to force transistor to be in saturation region and to be fully on
Rb N003 Vcontrol 750
D1 N001 N002 NSPW500BS
Rc Vcc N001 150
Vcc Vcc 0 12V
Q1 N002 N003 0 0 BC547C
D2 N001 N002 NSPW500BS
Vcontrol_1 Vcontrol 0 5V
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 3268 680
WIRE 400 -160 400 -224
WIRE 400 -32 400 -80
WIRE 400 -32 304 -32
WIRE 496 -32 400 -32
WIRE 304 0 304 -32
WIRE 496 0 496 -32
WIRE 304 96 304 64
WIRE 400 96 304 96
WIRE 496 96 496 64
WIRE 496 96 400 96
WIRE -704 144 -704 80
WIRE 400 144 400 96
WIRE -544 160 -544 96
WIRE 16 192 -160 192
WIRE 336 192 96 192
WIRE -704 256 -704 224
WIRE -544 272 -544 240
WIRE 400 336 400 240
DATAFLAG -64 192 ""
DATAFLAG 256 192 ""
DATAFLAG 400 272 ""
SYMBOL voltage -544 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vcontrol_1
SYMATTR Value 5V
SYMBOL voltage -704 128 R0
SYMATTR InstName Vcc
SYMATTR Value 12V
SYMBOL LED 480 0 R0
SYMATTR InstName D1
SYMATTR Value NSPW500BS
SYMBOL npn 336 144 R0
SYMATTR InstName Q1
SYMATTR Value BC547C
SYMBOL res 112 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rb
SYMATTR Value 750
SYMBOL LED 288 0 R0
WINDOW 0 -27 3 Left 2
WINDOW 3 -133 58 Left 2
SYMATTR InstName D2
SYMATTR Value NSPW500BS
SYMBOL res 384 -176 R0
SYMATTR InstName Rc
SYMATTR Value 150
FLAG 400 336 0
FLAG -160 192 Vcontrol
FLAG 400 -224 Vcc
FLAG -704 256 0
FLAG -704 80 Vcc
FLAG -544 272 0
FLAG -544 96 Vcontrol
TEXT -736 360 Left 2 !.tran 0.1
TEXT 208 224 Left 2 ;Vbe < 0.7v
TEXT 0 368 Left 2 ;Ib = 5.6301mA
TEXT 8 400 Left 2 ;Ic = B*Ic
TEXT 8 464 Left 2 ;Ic = 56.658mA
TEXT 128 400 Left 2 ;B = 110
TEXT 8 432 Left 2 ;From datasheet B = 110 but we will use Bforced = 10 to force transistor to be in saturation region and to be fully on
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1764-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 10 Rser=100m
Rload OUT 0 500
XU1 IN IN 0 OUT OUT LT1764-2.5 ;pnba _SHDN)IN)GND)OUT)Sense
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1764-2.5.asy)
.lib LT1764.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -224 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 560 48 384 48
WIRE -224 64 -224 48
WIRE 384 64 384 48
WIRE 560 64 560 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -224 160 -224 144
WIRE 384 160 384 128
WIRE 560 160 560 144
WIRE 160 240 160 208
FLAG -224 160 0
FLAG 384 160 0
FLAG 560 160 0
FLAG 160 240 0
FLAG 560 48 OUT
FLAG -224 48 IN
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 368 64 R0
WINDOW 39 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 10u
SYMATTR SpiceLine Rser=100m
SYMBOL res 544 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT1764-2.5 160 96 R0
SYMATTR InstName U1
TEXT 368 224 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\3d5e34efd539_comparator_99.asc
* Generated by LTspice 26.0.1 for Windows.
* All parameters that will be optimized\nshould be listed in tables\nwith arbitrary values.
M1 Vout N001 0 0 NMOS l={L1} w={W1} ad={W1*L1} as={W1*L1} pd={2*W1+2*L1} ps={2*W1+2*L1} m=1
V1 Vdd 0 1.8
V2 N001 0 {Vcomp}
M2 Vdd Vin Vout Vdd PMOS l={L2} w={W2} ad={W2*L2} as={W2*L2} pd={2*W1+2*L1} ps={2*W1+2*L1} m=1
V3 Vin 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.param W1=2.9u
.param W2=2.6u
.param Vcomp=648.0m
.param L1=1.7u
.param L2=2.1u
.dc V3 0 1.8 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4496 2148
WIRE -80 -480 -112 -480
WIRE -64 -480 -80 -480
WIRE -272 -416 -336 -416
WIRE -224 -416 -272 -416
WIRE -112 -416 -112 -480
WIRE -64 -416 -112 -416
WIRE -336 -384 -336 -416
WIRE -64 -368 -64 -416
WIRE -64 -368 -112 -368
WIRE -224 -336 -224 -416
WIRE -160 -336 -224 -336
WIRE -656 -320 -656 -384
WIRE -336 -256 -336 -304
WIRE -112 -240 -112 -320
WIRE 32 -240 -112 -240
WIRE -656 -192 -656 -240
WIRE -112 -192 -112 -240
WIRE -240 -176 -336 -176
WIRE -336 -144 -336 -176
WIRE -80 -144 -112 -144
WIRE -240 -112 -240 -176
WIRE -160 -112 -240 -112
WIRE -112 -80 -112 -96
WIRE -80 -80 -80 -144
WIRE -80 -80 -112 -80
WIRE -112 -32 -112 -80
WIRE -336 -16 -336 -64
SYMBOL nmos4 -160 -192 R0
SYMATTR InstName M1
SYMATTR Value2 l={L1} w={W1} ad={W1*L1} as={W1*L1} pd={2*W1+2*L1} ps={2*W1+2*L1} m=1
SYMBOL voltage -336 -400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value ""
SYMBOL voltage -336 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value {Vcomp}
SYMBOL pmos4 -160 -416 R0
SYMATTR InstName M2
SYMATTR Value2 l={L2} w={W2} ad={W2*L2} as={W2*L2} pd={2*W1+2*L1} ps={2*W1+2*L1} m=1
SYMBOL voltage -656 -336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
FLAG -656 -192 0
FLAG -80 -480 Vdd
FLAG -656 -384 Vdd
FLAG -112 -32 0
FLAG -336 -16 0
FLAG -336 -256 0
FLAG -272 -416 Vin
FLAG 32 -240 Vout
TEXT -360 -728 Left 2 !.param W1=2.9u
TEXT -360 -704 Left 2 !.param W2=2.6u
TEXT -360 -632 Left 2 !.param Vcomp=648.0m
TEXT -360 -680 Left 2 !.param L1=1.7u
TEXT -360 -656 Left 2 !.param L2=2.1u
TEXT 72 -680 Left 2 !.dc V3 0 1.8 0.01
TEXT -384 -848 Left 2 ;All parameters that will be optimized\nshould be listed in tables\nwith arbitrary values.
* Z:\home\khalils\Downloads\files\data\raw_asc\444d251e8ba9_InvertingSummingAmplifier.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD712.asy)
R3 N002 0 10k
Vin1 IN1 0
R1 N001 OUT 100k
R4 N001 IN2 10k
V2 -V 0 -15
R2 N001 IN1 10k
Vin2 IN2 0 0.2
XU1 N002 N001 +V -V OUT AD712 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
.dc Vin1 list 0.3 -0.3 0
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 32 160 32
WIRE -304 128 -320 128
WIRE -208 128 -224 128
WIRE -144 128 -208 128
WIRE 48 128 -64 128
WIRE 80 128 80 32
WIRE 80 128 48 128
WIRE 96 128 80 128
WIRE 192 144 192 32
WIRE 192 144 160 144
WIRE 240 144 192 144
WIRE 384 144 384 128
WIRE 496 144 496 128
WIRE 96 160 64 160
WIRE 64 192 64 160
WIRE -320 224 -336 224
WIRE -176 224 -240 224
WIRE -128 224 -176 224
WIRE 48 224 48 128
WIRE 48 224 -48 224
WIRE 384 240 384 224
WIRE 496 240 496 224
SYMBOL AD712 128 80 R0
SYMATTR InstName U1
SYMBOL voltage -208 128 R90
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin1
SYMATTR Value ""
SYMBOL voltage 496 128 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res -48 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 384 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -224 224 R90
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
WINDOW 3 24 44 Left 2
SYMATTR Value 0.2
SYMATTR InstName Vin2
SYMBOL res 64 16 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res 48 176 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res -32 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
FLAG -320 128 0
FLAG 240 144 OUT
FLAG -208 128 IN1
FLAG 128 112 +V
FLAG 128 176 -V
FLAG 64 272 0
FLAG 384 128 +V
FLAG 384 240 0
FLAG 496 128 -V
FLAG 496 240 0
FLAG -336 224 0
FLAG -176 224 IN2
TEXT -56 336 Left 2 !.dc Vin1 list 0.3 -0.3 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7142-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7142-1.8.asy)
C2 N001 0 4.7n
V1 IN 0 2.8
C1 OUT 0 2.2 Rser=1.5m
Rload OUT 0 10
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=1.8 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 6m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.8
SYMBOL ADP7142-1.8 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP151-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP151-3.3.asy)
V1 IN 0 5
Rload OUT 0 33
C1 OUT 0 1
XU1 IN 0 IN MP_01 OUT ADP151-x.x T=2.3Meg ;pnba Vin)GND)EN))Vout
.tran 500u startup
.lib ADP151-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 880 1696 880
WIRE 1984 880 1824 880
WIRE 1696 896 1696 880
WIRE 1984 896 1984 880
WIRE 1696 992 1696 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 33
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\ADP151-3.3 1984 1024 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1696 880 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 2256 1024 OUT
FLAG 2256 1136 0
FLAG 1696 992 0
FLAG 1696 880 IN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3526LB.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3526LB.asy)
R2 N002 0 1Meg
C1 OUT 0 4.7 Rser=1m
Rload OUT 0 16.5
L1 IN N001 4.7 Rpar=5K
XU1 N001 0 IN IN N002 OUT LTC3526LB ;pnba SW)GND)Vin)_SHDN)FB)Vout
R1 OUT N002 1.78Meg
V1 IN 0 2
.tran .5m startup
.lib LTC3526LB.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 80 -144 80
WIRE 0 80 -48 80
WIRE 128 80 80 80
WIRE -144 96 -144 80
WIRE 128 128 128 80
WIRE -144 192 -144 176
WIRE -48 192 -48 80
WIRE -16 192 -48 192
WIRE 320 192 272 192
WIRE 480 192 320 192
WIRE 576 192 480 192
WIRE 320 208 320 192
WIRE 480 208 480 192
WIRE 576 208 576 192
WIRE 480 304 480 272
WIRE 576 304 576 288
WIRE -48 320 -48 192
WIRE -16 320 -48 320
WIRE 320 320 320 288
WIRE 320 320 272 320
WIRE 320 336 320 320
WIRE 128 400 128 384
WIRE 320 432 320 416
SYMBOL res 560 192 R0
SYMATTR InstName Rload
SYMATTR Value 16.5
SYMBOL res 304 192 R0
SYMATTR InstName R1
SYMATTR Value 1.78Meg
SYMBOL cap 464 208 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1m
SYMBOL PowerProducts\\LTC3526LB 128 256 R0
SYMATTR InstName U1
SYMBOL ind -16 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=5K
SYMBOL res 304 320 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL voltage -144 80 R0
SYMATTR Value 2
SYMATTR InstName V1
FLAG -144 192 0
FLAG 128 400 0
FLAG 320 432 0
FLAG 480 304 0
FLAG 576 304 0
FLAG -144 80 IN
FLAG 576 192 OUT
TEXT 456 376 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX9916.asc
* Generated by LTspice 26.0.1 for Windows.
Vee 0 Vee 2.5
Vcc Vcc 0 2.5
RL OUT 0 5k
V1 IN 0 SINE(0 50m 10k)
CL OUT 0 15p
XU1 IN OUT Vcc Vee OUT Vcc MAX9916 ;pnba In+)In-)V+)V-)OUT)SHDN
.tran 100u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX9916.asy)
.lib MAX9916.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 64 288 64 272
WIRE 416 352 416 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 64 448 64 400
WIRE 416 448 416 416
WIRE 448 448 448 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 64 544 64 528
WIRE 304 592 304 576
FLAG 720 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
FLAG 448 448 Vcc
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 5k
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 10k)
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL MAX9916 432 400 R0
SYMATTR InstName U1
TEXT 16 632 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3406B-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3406B-1.8.asy)
Rload OUT 0 3
XU1 IN 0 N001 IN OUT LTC3406B-x.x top=360K bot=180K ;pnba Run)GND)SW)Vin)Vout
L1 N001 OUT 4.7
V1 IN 0 5
C1 OUT 0 22
.tran 500u startup
.lib LTC3406B-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 700
WIRE 192 64 80 64
WIRE 352 64 192 64
WIRE 80 80 80 64
WIRE 352 80 352 64
WIRE 192 144 192 64
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 624 144 592 144
WIRE 672 144 624 144
WIRE 768 144 672 144
WIRE 672 160 672 144
WIRE 768 160 768 144
WIRE 80 176 80 160
WIRE 672 256 672 224
WIRE 768 256 768 240
WIRE 624 304 624 144
WIRE 624 304 496 304
WIRE 352 384 352 368
SYMBOL polcap 656 160 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL RES 752 144 R0
SYMATTR InstName Rload
SYMATTR Value 3
SYMBOL VOLTAGE 80 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LTC3406B-1.8 352 224 R0
SYMATTR InstName U1
FLAG 80 176 0
FLAG 352 384 0
FLAG 672 256 0
FLAG 768 256 0
FLAG 768 144 OUT
FLAG 80 64 IN
TEXT 576 352 Left 2 !.tran 500u startup