Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0a5d2e180d11_AND_Gate_Negative.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N003 0 5
D2 N002 Vout D
D1 N001 Vout D
V2 N002 0 V
V1 N001 0 V
R1 Vout N003 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -144 -48 -480 -48
WIRE 128 -48 -80 -48
WIRE 128 16 128 -48
WIRE 320 16 128 16
WIRE 448 16 320 16
WIRE 320 32 320 16
WIRE -144 64 -240 64
WIRE 128 64 128 16
WIRE 128 64 -80 64
WIRE 320 144 320 112
WIRE -480 176 -480 -48
WIRE -240 176 -240 64
WIRE -480 320 -480 256
WIRE -240 320 -240 256
WIRE 320 320 320 224
SYMBOL voltage -240 160 R0
SYMATTR InstName V2
SYMBOL diode -144 -32 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL voltage 320 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL diode -144 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL res 304 16 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -480 160 R0
SYMATTR InstName V1
FLAG -480 320 0
FLAG -240 320 0
FLAG 320 320 0
FLAG 448 16 Vout
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2906.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2906.asy)
XU1 0 _RST RST V1 V1 Vadj NC_01 NC_02 LTC2906 ;pnba GND)_RST)RST)Vcc)V1)Vadj)S1)TOL
V3 N002 0 5
C2 Vadj 0 .1
V2 N001 0 PWL(0 0 1m .8)
R4 N002 RST 100K
R2 N001 Vadj 49.9K
V1 V1 0 3.3
R3 Vadj 0 100K
R1 N002 _RST 100K
.tran 300m
.lib LTC2906.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 940 680
WIRE 656 64 -352 64
WIRE -352 80 -352 64
WIRE 656 80 656 64
WIRE -352 176 -352 160
WIRE -16 176 -208 176
WIRE 16 176 -16 176
WIRE 32 176 16 176
WIRE 336 176 288 176
WIRE 560 176 336 176
WIRE 656 176 656 160
WIRE 656 176 560 176
WIRE -208 192 -208 176
WIRE 560 192 560 176
WIRE 656 192 656 176
WIRE 16 240 16 176
WIRE 32 240 16 240
WIRE 336 240 288 240
WIRE 384 240 336 240
WIRE 496 240 464 240
WIRE 560 272 560 256
WIRE -208 288 -208 272
WIRE 656 288 656 272
WIRE 304 304 288 304
WIRE 336 368 288 368
WIRE 384 368 336 368
WIRE 496 368 496 240
WIRE 496 368 464 368
WIRE 496 384 496 368
WIRE 496 480 496 464
SYMBOL cap 544 192 R0
SYMATTR InstName C2
SYMATTR Value .1u
SYMBOL res 480 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 640 64 R0
SYMATTR InstName R2
SYMATTR Value 49.9K
SYMBOL voltage -208 176 R0
WINDOW 0 23 24 Left 2
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage 496 368 R0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 640 176 R0
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL LTC2906 160 272 R0
SYMATTR InstName U1
SYMBOL voltage -352 64 R0
WINDOW 3 27 89 Left 2
SYMATTR Value PWL(0 0 1m .8)
SYMATTR InstName V2
SYMBOL res 480 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100K
FLAG -208 288 0
FLAG -352 176 0
FLAG 304 304 0
FLAG 496 480 0
FLAG 656 288 0
FLAG 560 272 0
FLAG 336 176 Vadj
FLAG -16 176 V1
FLAG 336 240 RST
FLAG 336 368 _RST
TEXT 208 464 Left 2 !.tran 300m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1928-5.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 IN 0 OUT N001 N002 N003 LTC1928-5 ;pnba Vin)GND)Vout)CPO)CP)_CN/SHDN
V1 IN 0 3
C1 N002 N003 .47
C2 OUT 0 4.7
Rload OUT 0 300
C3 0 N001 4.7
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1928-5.asy)
.lib LTC1928-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 128 -176 128
WIRE 256 128 240 128
WIRE 336 128 320 128
WIRE -176 144 -176 128
WIRE -16 208 -96 208
WIRE 336 208 240 208
WIRE 432 208 336 208
WIRE 336 224 336 208
WIRE 432 224 432 208
WIRE -176 240 -176 224
WIRE -96 288 -96 272
WIRE -16 288 -96 288
WIRE 272 288 240 288
WIRE 336 320 336 288
WIRE 432 320 432 304
FLAG 272 288 0
FLAG -176 240 0
FLAG 336 320 0
FLAG 432 320 0
FLAG 336 128 0
FLAG 432 208 OUT
FLAG -176 128 IN
SYMBOL PowerProducts\\LTC1928-5 112 208 R0
SYMATTR InstName U1
SYMBOL voltage -176 128 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL cap -112 208 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 53 Left 2
SYMATTR InstName C1
SYMATTR Value .47
SYMBOL cap 320 224 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL res 416 208 R0
SYMATTR InstName Rload
SYMATTR Value 300
SYMBOL cap 320 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 4.7
TEXT 400 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\8cf32c8bc78a_XtalTest_1Mhz_Osc.asc
* Generated by LTspice 26.0.1 for Windows.
* 1MHz Crystal Oscillator
* Unbuffered Gate
* NOTE: for ac loop gain is V(4)/V(1)
Ri i 3 100
R2 4 3 3.3Meg
I2 2 3 PULSE(0 23 100n 10n 10n 10n 1u 1)
Di 0 i Clamp
C3 3 0 10p
CX1 3 2 .0127pF Lser=2H Rser=200 Cpar=4pF
C2 2 0 100p
R1 2 1 3k3
Bo 0 4 I=limit(30*(2.5-V(i)),0,5) Rpar=1 tripdt=1n
V1 4 1 AC 1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 10m 100u 10n
.model Clamp D(Vfwd=.5 Vrev=5.5)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1656 1100
WIRE 528 304 576 304
WIRE 320 304 384 304
WIRE 608 304 608 336
WIRE 608 400 608 416
WIRE 384 336 384 304
WIRE 384 304 416 304
WIRE 208 304 240 304
WIRE 576 304 608 304
WIRE 176 304 208 304
WIRE 928 416 928 400
WIRE 800 304 832 304
WIRE 848 304 848 336
WIRE 848 400 848 416
WIRE 928 208 928 320
WIRE 832 304 848 304
WIRE 384 208 384 304
WIRE 544 208 608 208
WIRE 608 208 608 304
WIRE 416 304 464 304
WIRE 464 208 384 208
WIRE 672 208 672 304
WIRE 672 304 720 304
WIRE 928 208 848 208
WIRE 768 208 672 208
WIRE 176 304 176 240
WIRE 176 96 208 96
WIRE 928 96 928 208
WIRE 384 416 384 400
WIRE 608 304 672 304
WIRE 176 160 176 96
WIRE 208 96 928 96
SYMBOL cap 400 336 M0
WINDOW 0 32 16 Left 0
WINDOW 3 32 48 Left 0
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL cap 592 336 R0
WINDOW 0 32 16 Left 0
WINDOW 3 32 48 Left 0
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL Misc\\xtal 528 288 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
WINDOW 39 80 32 VTop 0
WINDOW 123 56 32 VTop 0
WINDOW 40 104 32 VTop 0
SYMATTR InstName X1
SYMATTR Value .0127pF
SYMATTR SpiceLine Rser=200
SYMATTR Value2 Lser=2H
SYMATTR SpiceLine2 Cpar=4pF
SYMBOL zener 864 400 R180
WINDOW 0 40 48 Left 0
WINDOW 3 40 16 Left 0
SYMATTR InstName Di
SYMATTR Value Clamp
SYMBOL voltage 176 144 R0
WINDOW 0 40 48 Left 0
WINDOW 3 40 71 Left 0
WINDOW 123 40 72 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL res 864 192 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 3.3Meg
SYMBOL res 336 288 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 3k3
SYMBOL res 816 288 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName Ri
SYMATTR Value 100
SYMBOL current 464 208 M90
WINDOW 0 -32 32 VBottom 0
WINDOW 3 -56 32 VBottom 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I2
SYMATTR Value PULSE(0 23 100n 10n 10n 10n 1u 1)
SYMBOL bi 928 400 M180
WINDOW 0 39 48 Left 0
WINDOW 3 40 24 Left 0
WINDOW 123 40 0 Left 0
SYMATTR InstName Bo
SYMATTR Value I=limit(30*(2.5-V(i)),0,5)
SYMATTR Value2 Rpar=1 tripdt=1n
FLAG 384 416 0
FLAG 608 416 0
FLAG 208 304 1
FLAG 416 304 2
FLAG 576 304 3
FLAG 928 416 0
FLAG 848 416 0
FLAG 832 304 i
FLAG 208 96 4
TEXT 128 464 Left 0 !.tran 0 10m 100u 10n
TEXT 128 496 Left 0 !.ac lin 1000 990k 1010k
TEXT 848 464 Center 0 !.model Clamp D(Vfwd=.5 Vrev=5.5)
TEXT 560 16 Center 0 ;1MHz Crystal Oscillator
TEXT 976 288 Left 0 ;Unbuffered Gate
TEXT 560 64 Center 0 ;NOTE: for ac loop gain is V(4)/V(1)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1550LCS8-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1550LCS8-2.5.asy)
XU1 IN IN N002 OUT N003 0 N001 OUT LTC1550LCS8-2.5 ;pnba _SHDN)Vin)C+)Vout)C-)GND)CPout)REG
Rload OUT 0 1K
C3 OUT 0 10
C1 N001 0 .1
C2 N003 N002 .1
V1 IN 0 4.5
.tran 1m startup
.lib LTC1550LCS8-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1600 1220
WIRE 576 720 144 720
WIRE 208 784 32 784
WIRE 240 784 208 784
WIRE 576 784 576 720
WIRE 576 784 528 784
WIRE 32 800 32 784
WIRE 208 848 208 784
WIRE 240 848 208 848
WIRE 560 848 528 848
WIRE 656 848 624 848
WIRE 32 896 32 880
WIRE 240 912 208 912
WIRE 544 912 528 912
WIRE 144 976 144 720
WIRE 144 976 32 976
WIRE 240 976 144 976
WIRE 544 976 528 976
WIRE 32 992 32 976
WIRE 144 992 144 976
WIRE 32 1088 32 1072
WIRE 144 1104 144 1056
WIRE 208 1104 208 912
WIRE 352 1104 208 1104
WIRE 544 1104 544 976
WIRE 544 1104 416 1104
SYMBOL cap 128 992 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL cap 416 1088 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL cap 560 864 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL RES 16 976 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL VOLTAGE 32 784 R0
SYMATTR InstName V1
SYMATTR Value 4.5
SYMBOL PowerProducts\\LTC1550LCS8-2.5 384 880 R0
SYMATTR InstName U1
FLAG 656 848 0
FLAG 544 912 0
FLAG 32 896 0
FLAG 32 1088 0
FLAG 144 1104 0
FLAG 32 784 IN
FLAG 32 976 OUT
TEXT 616 1064 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\189ce72ee864_ADA4896-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4896-2.asy)
Rload OUT 0 10K
R2 OUT N001 10K
R1 N001 0 10K
V2 -V 0 -5
XU1 IN N001 +V -V OUT ADA4896-2 ;pnba In+)In-)V+)V-)OUT
Vin IN 0 SINE(0 1 10K)
V1 +V 0 5
.tran 1m
.lib ADA4896-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1168 144 -1184
WIRE 256 -1168 256 -1184
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 144 -1072 144 -1088
WIRE 256 -1072 256 -1088
WIRE 432 -1072 432 -1088
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 256 -1184 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 144 -1184 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL ADA4896-2 576 -1168 R0
WINDOW 3 24 91 Left 2
SYMATTR InstName U1
FLAG 144 -1184 +V
FLAG 144 -1072 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1184 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 256 -1072 0
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1185.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N002 IN OUT N001 LT1185 ;pnba GND)FB)IN)OUT)Ref
R1 0 N001 4.3K
R2 0 N002 2.37K
R3 N002 OUT 2.67K
V1 0 IN 7.5
I1 0 OUT pulse(.95 1.05 2u 10n 10n 8u 16u)
C1 0 OUT 2.2 Rser=1
.tran 16u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1185.asy)
.lib LT1185.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1140 680
WIRE 0 64 0 48
WIRE 400 64 400 48
WIRE 224 96 224 48
WIRE -128 112 -128 48
WIRE 640 112 640 48
WIRE 528 128 528 48
WIRE 0 160 0 144
WIRE 96 160 0 160
WIRE 400 160 400 144
WIRE 400 160 352 160
WIRE 400 176 400 160
WIRE -128 272 -128 192
WIRE 96 272 -128 272
WIRE 400 272 400 256
WIRE 400 272 352 272
WIRE 528 272 528 192
WIRE 528 272 400 272
WIRE 640 272 640 192
WIRE 640 272 528 272
FLAG 0 48 0
FLAG 400 48 0
FLAG 224 48 0
FLAG -128 48 0
FLAG 640 48 0
FLAG 528 48 0
FLAG -128 272 IN
FLAG 640 272 OUT
SYMBOL PowerProducts\\LT1185 224 208 R0
SYMATTR InstName U1
SYMBOL res -16 48 R0
SYMATTR InstName R1
SYMATTR Value 4.3K
SYMBOL res 384 48 R0
SYMATTR InstName R2
SYMATTR Value 2.37K
SYMBOL res 384 160 R0
SYMATTR InstName R3
SYMATTR Value 2.67K
SYMBOL voltage -128 96 R0
SYMATTR InstName V1
SYMATTR Value 7.5
SYMBOL current 640 112 R0
SYMATTR InstName I1
SYMATTR Value pulse(.95 1.05 2u 10n 10n 8u 16u)
SYMBOL cap 512 128 R0
WINDOW 39 24 84 Left 2
SYMATTR SpiceLine Rser=1
SYMATTR InstName C1
SYMATTR Value 2.2
TEXT 744 264 Left 2 !.tran 16u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1761-0.9.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N004 0 1
C2 N003 0 10n
V1 IN 0 1.3
R2 N001 IN 50K
C3 N002 0 1
R1 OUT 0 2
C4 OUT 0 10
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1761 Radj=6K ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1761-0.9.asy)
.lib ADP1761.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.3
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL ADP1761-0.9 224 176 R0
SYMATTR InstName U1
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\7243b60f84e3_Fig11_4_short.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Vout and Id(M1)
* 10/1
* 10/1
M1 Vout Vin 0 0 N_50n l=50n w=500n
VDD VDD 0 1
M2 Vout Vin VDD VDD P_50n l=50n w=500n
Vin Vin 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vin 0 1
.include cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 680
WIRE 192 -368 192 -384
WIRE 192 -352 192 -368
WIRE 448 -304 448 -352
WIRE 400 -288 368 -288
WIRE 192 -240 192 -272
WIRE 320 -176 304 -176
WIRE 368 -176 368 -288
WIRE 368 -176 320 -176
WIRE 448 -176 448 -208
WIRE 624 -176 448 -176
WIRE 656 -176 624 -176
WIRE 208 -96 208 -112
WIRE 368 -96 368 -176
WIRE 400 -96 368 -96
WIRE 448 -32 448 -80
WIRE 208 0 208 -16
SYMBOL voltage 192 -368 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL pmos4 400 -208 M180
WINDOW 0 88 9 Right 2
WINDOW 3 168 20 Right 2
WINDOW 123 206 76 Right 2
SYMATTR InstName M2
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 400 -176 R0
WINDOW 0 104 24 Right 2
WINDOW 3 179 41 Right 2
WINDOW 123 213 74 Right 2
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 208 -112 R0
WINDOW 0 -72 21 Left 2
WINDOW 3 -60 74 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vin
SYMATTR Value 0
FLAG 208 0 0
FLAG 624 -176 Vout
FLAG 208 -112 Vin
FLAG 448 -128 0
FLAG 192 -240 0
FLAG 192 -368 VDD
FLAG 448 -256 VDD
FLAG 448 -32 0
FLAG 448 -352 VDD
FLAG 320 -176 Vin
TEXT 264 8 Left 2 !.dc Vin 0 1
TEXT 264 32 Left 2 !.include cmosedu_models.txt
TEXT 496 -360 Left 2 ;Plot Vout and Id(M1)
TEXT 344 -312 Left 2 ;10/1
TEXT 344 -64 Left 2 ;10/1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1086-2.85.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1086-2.85.asy)
Rload OUT 0 10
V1 IN 0 PWL(0 0 1 10) Rser=0.1
XU1 0 OUT IN LT1086-2.85 ;pnba ADJ)OUT)IN
C1 OUT 0 10
.tran 1
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1328 896
WIRE 1888 896 1808 896
WIRE 2000 896 1888 896
WIRE 1328 912 1328 896
WIRE 1888 912 1888 896
WIRE 2000 912 2000 896
WIRE 1328 1008 1328 992
WIRE 1888 1008 1888 976
WIRE 2000 1008 2000 992
WIRE 1680 1040 1680 992
SYMBOL cap 1872 912 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LT1086-2.85 1680 896 R0
SYMATTR InstName U1
SYMBOL RES 1984 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL VOLTAGE 1328 896 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMATTR SpiceLine Rser=0.1
FLAG 2000 896 OUT
FLAG 2000 1008 0
FLAG 1328 1008 0
FLAG 1888 1008 0
FLAG 1680 1040 0
FLAG 1328 896 IN
TEXT 1896 1112 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2942.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2942.asy)
XU1 IN 0 N004 N005 N003 N002 N001 LTC2942 B_Reg=60 CD_Reg=32767 EF_Reg=32768 EF_Reg=65535 GH_Reg=0 GH_Reg=0 K_Reg=255 L_Reg=156 ;pnba Sense+)GND)StatusReg)ACRreg)_AL/CC)Sense-)VoltReg
Rsense IN N002 100m
V2 N002 0 PULSE(3.75 3.65 1s 10m 10m 1 2)
R1 IN N003 10K
Vbatt IN 0 3.7
.tran 5
.lib LTC2942.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1432 680
WIRE 80 -96 -128 -96
WIRE 464 -96 80 -96
WIRE 880 -96 464 -96
WIRE -128 -80 -128 -96
WIRE 464 -80 464 -96
WIRE 256 -32 256 -48
WIRE -128 16 -128 0
WIRE 80 16 80 -96
WIRE 96 16 80 16
WIRE 464 16 464 0
WIRE 464 16 416 16
WIRE 608 16 464 16
WIRE 720 16 688 16
WIRE 96 112 80 112
WIRE 512 112 416 112
WIRE 880 112 880 -96
WIRE 880 112 592 112
WIRE 96 208 80 208
WIRE 432 208 416 208
SYMBOL res 608 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL LTC2942 256 112 R0
SYMATTR InstName U1
SYMATTR Value B_Reg=60 CD_Reg=32767 EF_Reg=32768
SYMATTR SpiceLine2 GH_Reg=0 K_Reg=255 L_Reg=156
SYMBOL voltage 592 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value PULSE(3.75 3.65 1s 10m 10m 1 2)
SYMBOL res 448 -96 R0
SYMATTR InstName Rsense
SYMATTR Value 100m
SYMBOL voltage -128 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vbatt
SYMATTR Value 3.7
FLAG -128 16 0
FLAG 80 112 0
FLAG 720 16 0
FLAG -128 -96 IN
TEXT 640 224 Left 2 !.tran 5
* Z:\home\khalils\Downloads\files\data\raw_asc\04e3bf528252_Q2_nmos_sc.asc
* Generated by LTspice 26.0.1 for Windows.
* W = 450nm, L = 180nm
M1 0 N001 0 0 nch_tt W=450n L=180n
Vgs1 N001 0 SINE({Vdd} 0.159m 1K)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include "TSMC180.lib"
.tran 1
.step param Vdd -1.8 1.8 0.08
.meas TRAN I_rms RMS Ig(M1)
.meas TRAN I_avg AVG Ig(M1)
.meas TRAN I_max MAX Ig(M1)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 892 680
WIRE 352 64 96 64
WIRE 96 128 96 64
WIRE 48 208 -64 208
WIRE -64 240 -64 208
WIRE -64 368 -64 320
WIRE 96 368 96 224
WIRE 96 368 -64 368
WIRE 352 368 352 64
WIRE 352 368 96 368
WIRE 96 384 96 368
SYMBOL voltage -64 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vgs1
SYMATTR Value SINE({Vdd} 0.159m 1K)
SYMBOL nmos 48 128 R0
SYMATTR InstName M1
SYMATTR Value nch_tt
SYMATTR Value2 W=450n L=180n
FLAG 96 384 0
TEXT 24 -80 Left 2 !.include "TSMC180.lib"
TEXT 24 -40 Left 2 ;W = 450nm, L = 180nm
TEXT -96 408 Left 2 !.tran 1
TEXT -360 168 Left 2 !.step param Vdd -1.8 1.8 0.08
TEXT 504 184 Left 2 !.meas TRAN I_rms RMS Ig(M1)
TEXT 512 224 Left 2 !.meas TRAN I_avg AVG Ig(M1)
TEXT 520 256 Left 2 !.meas TRAN I_max MAX Ig(M1)
* Z:\home\khalils\Downloads\files\data\raw_asc\OP4177.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP4177.asy)
XU1 IN N001 +V -V OUT OP4177 ;pnba In+)In-)V+)V-)OUT
Rload OUT 0 10K
V1 +V 0 15
R1 N001 0 10K
V2 -V 0 -15
Vin IN 0 SINE(0 1 10K)
R2 OUT N001 10K
.tran 1m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL OP4177 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
TEXT 768 -952 Left 2 !.tran 1m
* Z:\tmp\asc_dec_bjh7r6w2\19cee9d94910_AD8602_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 0 10K
XU1 IN N001 +V -V OUT AD8602 ;pnba In+)In-)V+)V-)OUT
Rload OUT 0 10K
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8602.asy)
.lib AD8602.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 272 -944 256 -944
WIRE 368 -944 352 -944
WIRE 384 -944 368 -944
WIRE 480 -944 464 -944
WIRE 368 -832 368 -944
WIRE 384 -832 368 -832
WIRE 480 -816 480 -944
WIRE 480 -816 448 -816
WIRE 608 -816 480 -816
WIRE 384 -800 272 -800
WIRE 608 -800 608 -816
WIRE 272 -784 272 -800
WIRE 608 -704 608 -720
WIRE 272 -688 272 -704
SYMBOL res 368 -960 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL Opamps\\AD8602 416 -880 R0
SYMATTR InstName U1
SYMBOL res 592 -816 R0
SYMATTR InstName Rload
SYMATTR Value 10K
FLAG 272 -688 0
FLAG 608 -816 OUT
FLAG 272 -800 IN
FLAG 416 -848 +V
FLAG 416 -784 -V
FLAG 256 -944 0
FLAG 608 -704 0