Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\101b81b7e3c5_trafo3yy.asc
* Generated by LTspice 26.0.1 for Windows.
L1C L1C L1N {L1} Rser={RL1}
K3 L1C L2C {M}
L2B L2B L2N {L2} Rser={RL2}
L2A L2A L2N {L2} Rser={RL2}
L2C L2C L2N {L2} Rser={RL2}
L1B L1B L1N {L1} Rser={RL1}
L1A L1A L1N {L1} Rser={RL1}
K2 L1B L2B {M}
K1 L1A L2A {M}
.param RL1=1m RL2=1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 744
WIRE 272 112 192 112
WIRE 512 112 352 112
WIRE 272 144 272 112
WIRE 352 144 352 112
WIRE 272 256 272 224
WIRE 272 256 224 256
WIRE 352 256 352 224
WIRE 400 256 352 256
WIRE 272 288 192 288
WIRE 512 288 352 288
WIRE 272 320 272 288
WIRE 352 320 352 288
WIRE 224 432 224 256
WIRE 272 432 272 400
WIRE 272 432 224 432
WIRE 352 432 352 400
WIRE 400 432 400 256
WIRE 400 432 352 432
WIRE 272 464 192 464
WIRE 512 464 352 464
WIRE 272 496 272 464
WIRE 352 496 352 464
WIRE 224 608 224 432
WIRE 272 608 272 576
WIRE 272 608 224 608
WIRE 352 608 352 576
WIRE 400 608 400 432
WIRE 400 608 352 608
WIRE 224 640 224 608
WIRE 400 640 400 608
IOPIN 192 112 BiDir
IOPIN 192 288 BiDir
IOPIN 512 112 BiDir
IOPIN 512 288 BiDir
IOPIN 192 464 BiDir
IOPIN 512 464 BiDir
IOPIN 400 640 BiDir
IOPIN 224 640 BiDir
LINE Normal 304 240 304 128 2
LINE Normal 320 240 320 128 2
LINE Normal 304 416 304 304 2
LINE Normal 320 416 320 304 2
LINE Normal 304 592 304 480 2
LINE Normal 320 592 320 480 2
SYMBOL ind2 368 480 M0
WINDOW 0 -21 27 Left 2
WINDOW 3 -57 83 Left 2
SYMATTR InstName L2C
SYMATTR Value {L2}
SYMATTR Type ind
SYMATTR SpiceLine Rser={RL2}
SYMBOL ind2 256 304 R0
WINDOW 0 -24 32 Left 2
WINDOW 3 -58 73 Left 2
SYMATTR InstName L1B
SYMATTR Value {L1}
SYMATTR Type ind
SYMATTR SpiceLine Rser={RL1}
SYMBOL ind2 368 304 M0
WINDOW 0 -21 27 Left 2
WINDOW 3 -57 83 Left 2
SYMATTR InstName L2B
SYMATTR Value {L2}
SYMATTR Type ind
SYMATTR SpiceLine Rser={RL2}
SYMBOL ind2 368 128 M0
WINDOW 0 -21 27 Left 2
WINDOW 3 -57 83 Left 2
SYMATTR InstName L2A
SYMATTR Value {L2}
SYMATTR Type ind
SYMATTR SpiceLine Rser={RL2}
SYMBOL ind2 256 480 R0
WINDOW 0 -24 32 Left 2
WINDOW 3 -58 73 Left 2
SYMATTR InstName L1C
SYMATTR Value {L1}
SYMATTR Type ind
SYMATTR SpiceLine Rser={RL1}
SYMBOL ind2 256 128 R0
WINDOW 0 -24 32 Left 2
WINDOW 3 -58 73 Left 2
SYMATTR InstName L1A
SYMATTR Value {L1}
SYMATTR Type ind
SYMATTR SpiceLine Rser={RL1}
FLAG 192 112 L1A
FLAG 192 288 L1B
FLAG 512 112 L2A
FLAG 512 288 L2B
FLAG 192 464 L1C
FLAG 512 464 L2C
FLAG 400 640 L2N
FLAG 224 640 L1N
TEXT 240 -16 Left 2 !K1 L1A L2A {M}\nK2 L1B L2B {M}\nK3 L1C L2C {M}
TEXT 176 72 Left 2 !.param RL1=1m RL2=1m
* Z:\tmp\asc_dec_bjh7r6w2\008b157dfbed_adjustable_filter_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N001 10k_PULSE {pot}
C1 N003 N001 {C1}
C2 N002 0 {C2}
R1 N002 N001 {pot}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1248 680
WIRE 160 144 112 144
WIRE 432 144 224 144
WIRE 352 176 256 176
WIRE 304 240 304 208
WIRE 256 256 256 176
WIRE 272 256 256 256
WIRE 352 272 352 176
WIRE 352 272 336 272
WIRE 432 272 352 272
WIRE 16 288 -80 288
WIRE 112 288 112 144
WIRE 112 288 96 288
WIRE 128 288 112 288
WIRE 224 288 208 288
WIRE 272 288 224 288
WIRE 224 320 224 288
WIRE 304 320 304 304
WIRE 224 416 224 384
SYMBOL res 112 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {pot}
SYMBOL cap 224 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {C1}
SYMBOL cap 208 320 R0
SYMATTR InstName C2
SYMATTR Value {C2}
SYMBOL res 224 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {pot}
FLAG 304 320 0
FLAG 304 208 V+
FLAG -80 288 10k_PULSE
FLAG 224 416 0
FLAG 224 288 N002
* Z:\home\khalils\Downloads\files\data\raw_asc\244a5acfec90_Solar_cell_4_wire.asc
* Generated by LTspice 26.0.1 for Windows.
I1 FF N001 1
D1 N001 FF 1N4148
R4 MB FB 100k
R2 FB N001 0.5
R1 N001 FF 1000
R3 MF FF 100k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 32 384 32
WIRE 528 32 496 32
WIRE 112 96 16 96
WIRE 208 96 112 96
WIRE 288 96 208 96
WIRE 384 96 384 32
WIRE 384 96 368 96
WIRE 432 96 384 96
WIRE 16 112 16 96
WIRE 208 112 208 96
WIRE 112 128 112 96
WIRE 16 224 16 192
WIRE 112 224 112 192
WIRE 112 224 16 224
WIRE 208 224 208 192
WIRE 208 224 112 224
WIRE 384 224 208 224
WIRE 432 224 384 224
WIRE 384 304 384 224
WIRE 416 304 384 304
WIRE 528 304 496 304
SYMBOL res 384 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 0.5
SYMBOL current 16 192 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 1
SYMBOL diode 96 128 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 512 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 512 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL res 192 96 R0
SYMATTR InstName R1
SYMATTR Value 1000
FLAG 432 96 FB
FLAG 432 224 FF
FLAG 528 32 MB
FLAG 528 304 MF
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1124.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain 1000 Amplifier with 0.01% Accuracy, DC to 1Hz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1124.asy)
V1 +V 0 15
V2 -V 0 -15
R1 OUT N001 364.76K
R2 N001 0 365
V3 IN 0 ac 1
R3 N002 IN 365
XU1 N002 N001 +V -V OUT LT1124 ;pnba In+)In-)V+)V-)OUT
.ac oct 100 1m 1Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -64 96 -80 96
WIRE 32 96 16 96
WIRE 48 96 32 96
WIRE 160 96 128 96
WIRE -336 160 -336 144
WIRE -208 160 -208 144
WIRE 96 208 96 192
WIRE 32 224 32 96
WIRE 64 224 32 224
WIRE 160 240 160 96
WIRE 160 240 128 240
WIRE 208 240 160 240
WIRE -336 256 -336 240
WIRE -208 256 -208 240
WIRE -48 256 -96 256
WIRE 64 256 32 256
WIRE -96 272 -96 256
WIRE 96 288 96 272
WIRE -96 368 -96 352
SYMBOL res 48 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 365
SYMBOL opamps\\LT1124 96 176 R0
SYMATTR InstName U1
SYMBOL voltage -208 144 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -336 144 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -96 256 R0
WINDOW 0 25 19 Left 2
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL res 32 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL res 144 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 364.76K
FLAG -208 256 0
FLAG 96 192 +V
FLAG -208 144 +V
FLAG 96 288 -V
FLAG -336 256 0
FLAG -336 144 -V
FLAG -80 96 0
FLAG -96 368 0
FLAG 208 240 OUT
FLAG -96 256 IN
TEXT 48 344 Left 2 !.ac oct 100 1m 1Meg
TEXT -96 48 Bottom 2 ;Gain 1000 Amplifier with 0.01% Accuracy, DC to 1Hz
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP121-1.875.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP121-1.875.asy)
V1 IN 0 5.5
XU1 OUT MP_01 0 IN MP_02 IN ADP121 K=4/9375 ;pnba Vout))GND)En))Vin
Rload OUT 0 22
C2 OUT 0 1
C1 IN 0 1
.tran 10m startup
.lib ADP121.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL ADP121-1.875 256 208 R0
SYMATTR InstName U1
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 22
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\d8fa215ffa61_invertor.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N002 0 SINE(0 1 1k) AC 1
V2 N001 0 12
V1 N005 0 -12
R1 vout N003 10k
XU1 0 N003 N001 N005 vout LM741/NS ;pnba In+)In-)V+)V-)OUT
R2 N003 N002 10k
.include C:\Users\PRANAV ARYA\Documents\GitHub\ECN351-Lab\LM741.MOD
.ac dec 10 1k 10meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 16 256 16
WIRE 272 96 272 -64
WIRE 368 96 368 16
WIRE 80 112 32 112
WIRE 176 112 176 16
WIRE 176 112 160 112
WIRE 240 112 176 112
WIRE 368 128 368 96
WIRE 368 128 304 128
WIRE 240 144 96 144
WIRE 560 144 560 128
WIRE 272 256 272 160
WIRE 32 288 32 112
WIRE 96 288 96 144
SYMBOL OpAmps\\opamp2 272 64 R0
SYMATTR InstName U1
SYMATTR Value LM741/NS
SYMBOL res 176 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 272 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -12
SYMBOL res 272 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 272 -48 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL voltage 32 272 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1k)
FLAG 272 336 0
FLAG 272 -144 0
FLAG 96 288 0
FLAG 32 368 0
FLAG 368 96 vout
TEXT -904 -144 Left 2 !.include C:\\Users\\PRANAV ARYA\\Documents\\GitHub\\ECN351-Lab\\LM741.MOD
TEXT -904 416 Left 2 !.ac dec 10 1k 10meg
* Z:\home\khalils\Downloads\files\data\raw_asc\64e0313327c9_Week1_Ex1A.asc
* Generated by LTspice 26.0.1 for Windows.
VGS N002 0 1.8
VDS N001 0 1.8
M1 N001 N002 0 0 nch l=2u w=4u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib 'C:\Program Files\LTC\LTspiceXVII\lib\cmp\log018.l' TT
.dc VGS 0 1.8 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 240 208 240
WIRE 208 336 208 240
WIRE 304 384 208 384
WIRE 160 416 -48 416
WIRE 416 416 416 240
WIRE -48 432 -48 416
WIRE -48 576 -48 512
WIRE 208 576 208 432
WIRE 208 576 -48 576
WIRE 304 576 304 384
WIRE 304 576 208 576
WIRE 416 576 416 496
WIRE 416 576 304 576
WIRE 208 608 208 576
SYMBOL voltage -48 416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 1.8
SYMBOL voltage 416 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 1.8
SYMBOL nmos4 160 336 R0
SYMATTR InstName M1
SYMATTR Value nch
SYMATTR Value2 l=2u w=4u
FLAG 208 608 0
TEXT -32 120 Left 2 !.lib 'C:\\Program Files\\LTC\\LTspiceXVII\\lib\\cmp\\log018.l' TT
TEXT -32 168 Left 2 !.dc VGS 0 1.8 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1682.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1682.asy)
C2 N001 0 4.7
R2 N003 0 100K
V1 IN 0 3.3
R1 OUT N003 300K
C3 OUT 0 2
R3 OUT 0 1K
XU1 OUT IN N003 0 N004 IN N002 N001 LTC1682 ;pnba Vout)_SHDN)FB)GND)C-)Vin)C+)CPO
C1 N002 N004 .22
.tran 1m startup
.lib LTC1682.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4980 2452
WIRE 3680 1552 3312 1552
WIRE 3888 1552 3680 1552
WIRE 3888 1568 3888 1552
WIRE 3104 1616 2992 1616
WIRE 3184 1616 3104 1616
WIRE 3360 1616 3184 1616
WIRE 3712 1616 3648 1616
WIRE 3808 1616 3776 1616
WIRE 2992 1632 2992 1616
WIRE 3104 1632 3104 1616
WIRE 3184 1632 3184 1616
WIRE 3888 1664 3888 1648
WIRE 3312 1680 3312 1552
WIRE 3360 1680 3312 1680
WIRE 3744 1680 3648 1680
WIRE 3744 1712 3744 1680
WIRE 2992 1728 2992 1712
WIRE 3104 1728 3104 1696
WIRE 3184 1744 3184 1712
WIRE 3360 1744 3184 1744
WIRE 3680 1744 3680 1552
WIRE 3680 1744 3648 1744
WIRE 3184 1760 3184 1744
WIRE 3360 1808 3312 1808
WIRE 3744 1808 3744 1776
WIRE 3744 1808 3648 1808
WIRE 3184 1856 3184 1840
SYMBOL PowerProducts\\LTC1682 3504 1712 R0
SYMATTR InstName U1
SYMBOL cap 3728 1712 R0
SYMATTR InstName C1
SYMATTR Value .22
SYMBOL cap 3088 1632 R0
SYMATTR InstName C3
SYMATTR Value 2
SYMBOL res 2976 1616 R0
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL voltage 3888 1552 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap 3712 1632 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL res 3168 1616 R0
SYMATTR InstName R1
SYMATTR Value 300K
SYMBOL res 3168 1744 R0
SYMATTR InstName R2
SYMATTR Value 100K
FLAG 3312 1808 0
FLAG 3808 1616 0
FLAG 3888 1664 0
FLAG 3104 1728 0
FLAG 3184 1856 0
FLAG 2992 1728 0
FLAG 3888 1552 IN
FLAG 2992 1616 OUT
TEXT 3696 1840 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1a6f3e452f9e_amplificador-doferencial.asc
* Generated by LTspice 26.0.1 for Windows.
R5 N003 N004 680R
Q1 out1 signal1 N002 0 2N2222
Q4 vout3 signal2 N003 0 2N2222
R1 N001 out1 100k
V4 0 N004 12V
Q2 out2 signal2 N002 0 2N2222
R2 N001 out2 100k
R4 N001 vout3 3k
V1 N001 0 12V
V3 signal2 0 SINE(0 1V 1k 0 0 180)
R3 N002 N004 12k
V2 signal1 0 SINE(0 1V 1k)
Q3 N001 signal1 N003 0 2N2222
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 10ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1492 680
WIRE 256 -128 -528 -128
WIRE 1120 -128 256 -128
WIRE 256 -112 256 -128
WIRE 256 -112 112 -112
WIRE 320 -112 256 -112
WIRE 112 -96 112 -112
WIRE 320 -96 320 -112
WIRE 1120 -96 1120 -128
WIRE 1120 -96 976 -96
WIRE 1232 -96 1120 -96
WIRE 1232 -48 1232 -96
WIRE -352 48 -352 16
WIRE 320 48 320 -16
WIRE 384 48 320 48
WIRE 112 64 112 -16
WIRE 176 64 112 64
WIRE 1232 80 1232 32
WIRE 1312 80 1232 80
WIRE 112 128 112 64
WIRE 320 128 320 48
WIRE 976 128 976 -96
WIRE 1232 128 1232 80
WIRE -528 144 -528 -128
WIRE 48 176 -64 176
WIRE 544 176 384 176
WIRE 912 176 816 176
WIRE 1392 176 1296 176
WIRE -352 192 -352 128
WIRE -528 256 -528 224
WIRE -528 256 -624 256
WIRE 112 272 112 224
WIRE 224 272 112 272
WIRE 320 272 320 224
WIRE 320 272 224 272
WIRE 976 272 976 224
WIRE 1104 272 976 272
WIRE 1232 272 1232 224
WIRE 1232 272 1104 272
WIRE -624 288 -624 256
WIRE 1104 288 1104 272
WIRE -528 304 -528 256
WIRE 224 304 224 272
WIRE -352 336 -352 304
WIRE -352 480 -352 416
WIRE -528 560 -528 384
WIRE 224 560 224 384
WIRE 224 560 -528 560
WIRE 1104 560 1104 368
WIRE 1104 560 224 560
SYMBOL npn 1296 128 M0
SYMATTR InstName Q4
SYMATTR Value 2N2222
SYMBOL res 208 288 R0
SYMATTR InstName R3
SYMATTR Value 12k
SYMBOL voltage -352 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1V 1k 0 0 180)
SYMBOL voltage -528 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 12V
SYMBOL res 1216 -64 R0
SYMATTR InstName R4
SYMATTR Value 3k
SYMBOL res 304 -112 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL npn 48 128 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL npn 912 128 R0
SYMATTR InstName Q3
SYMATTR Value 2N2222
SYMBOL voltage -352 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 1V 1k)
SYMBOL res 96 -112 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL npn 384 128 M0
SYMATTR InstName Q2
SYMATTR Value 2N2222
SYMBOL voltage -528 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12V
SYMBOL res 1088 272 R0
SYMATTR InstName R5
SYMATTR Value 680R
FLAG -352 192 0
FLAG -352 480 0
FLAG -352 16 signal1
FLAG -64 176 signal1
FLAG -352 304 signal2
FLAG 544 176 signal2
FLAG 176 64 out1
FLAG 384 48 out2
FLAG 816 176 signal1
FLAG 1392 176 signal2
FLAG 1312 80 vout3
FLAG -624 288 0
TEXT -736 200 Left 2 !.tran 10ms
* Z:\home\khalils\Downloads\files\data\raw_asc\a00a11656d19_IE_Tut1.asc
* Generated by LTspice 26.0.1 for Windows.
D2 N002 P001 1N4148
V2 P001 0 5
D1 0 N002 BZX84C10L
R1 N002 N001 1k
V1 N001 0 SINE(0 5 50)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100ms
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 256 64 112 64
WIRE 496 64 336 64
WIRE 736 64 496 64
WIRE 736 112 736 64
WIRE 112 144 112 64
WIRE 496 160 496 64
WIRE 112 320 112 224
WIRE 496 320 496 224
WIRE 496 320 112 320
WIRE 736 320 736 256
WIRE 736 320 496 320
SYMBOL res 352 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 480 224 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BZX84C10L
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage 112 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 50)
SYMBOL voltage 736 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL diode 720 112 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
FLAG 496 320 0
TEXT 72 336 Left 2 !.tran 100ms
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7142-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7142-3.3.asy)
Rload OUT 0 22
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=3.3 ;pnba Vin)Sense)EN)SS)Vout)GND
V1 IN 0 4.3
C2 N001 0 4.7n
C1 OUT 0 2.2 Rser=1.5m
.tran 6m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.3
SYMBOL ADP7142-3.3 224 128 R0
SYMATTR InstName U1
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 22
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\OP1177.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP1177.asy)
XU1 IN N001 +V -V OUT OP1177 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 10K
R1 N001 0 10K
V1 +V 0 15
V2 -V 0 -15
Vin IN 0 SINE(0 1 10K)
Rload OUT 0 10k
.tran 1m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10k
SYMBOL AutoGenerated\\OP1177 576 -1168 R0
SYMATTR InstName U1
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
TEXT 624 -992 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\37bc6363bb6d_OP_AMP_Integrator.asc
* Generated by LTspice 26.0.1 for Windows.
* OP AMP INTEGRATOR
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
R2 N002 N001 100k
C1 N002 N001 10n
R4 0 N002 10k
R1 N001 N004 10k
V3 N004 0 SINE(0 5 1k)
V1 0 N006 12V
XU1 N005 N001 N003 N006 N002 LT1001 ;pnba In+)In-)V+)V-)OUT
V2 N003 0 12V
R3 N005 0 10k
.tran 0 10m 1m 0.01m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -176 32 -176
WIRE 368 -176 224 -176
WIRE 32 -64 32 -176
WIRE 160 -64 32 -64
WIRE 368 -64 368 -176
WIRE 368 -64 240 -64
WIRE 224 32 176 32
WIRE 320 32 304 32
WIRE 320 64 320 32
WIRE 176 112 176 32
WIRE -128 128 -176 128
WIRE 32 128 32 -64
WIRE 32 128 -48 128
WIRE 144 128 32 128
WIRE 368 144 368 -64
WIRE 368 144 208 144
WIRE 448 144 368 144
WIRE 144 160 32 160
WIRE 448 176 448 144
WIRE -176 192 -176 128
WIRE -80 192 -112 192
WIRE 32 192 32 160
WIRE 32 192 0 192
WIRE 176 224 176 176
WIRE -112 256 -112 192
WIRE 448 288 448 256
WIRE -176 304 -176 272
WIRE 176 336 176 304
SYMBOL res 256 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL voltage 208 32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value 12V
SYMBOL cap 224 -192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 464 272 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL voltage -176 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 5 1k)
SYMBOL res 16 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL OpAmps\\OP07 176 80 R0
SYMATTR InstName U1
SYMBOL res -32 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 176 320 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
SYMATTR Value 12V
FLAG 320 64 0
FLAG 176 336 0
FLAG 448 288 0
FLAG -112 256 0
FLAG -176 304 0
TEXT -240 40 Left 2 ;OP AMP INTEGRATOR
TEXT -144 344 Left 2 !.tran 0 10m 1m 0.01m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7170-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N001 0 1n
V1 IN 0 3.8
Rload OUT 0 10
C1 OUT 0 4.7 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADM7170-3.3 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7170-3.3.asy)
.lib ADM7170-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
SYMBOL cap 80 240 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.8
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADM7170-3.3 224 128 R0
SYMATTR InstName U1
TEXT 408 264 Left 2 !.tran 5m startup