Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1507-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N005 N004 1K
D1 0 N003 MBRS340
D2 IN N001 1N914
C1 OUT 0 100 Rser=0.05
L1 N003 OUT 10 Rser=0.02 Rpar=5000
V1 IN 0 12
C3 N005 0 .001
C4 N004 0 .025
C5 N001 N003 .22
XU1 N001 IN N003 N002 MP_01 0 OUT N005 LT1507 top=1.815K bot=4.99K ;pnba Boost)Vin)SW)_SHDN))GND)Sense)Vc
Rload OUT 0 3.3
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1507-3.3.asy)
.lib LT1507.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2468 1192
WIRE 1312 640 1152 640
WIRE 1360 640 1312 640
WIRE 1472 640 1424 640
WIRE 1600 640 1472 640
WIRE 1152 656 1152 640
WIRE 1600 688 1600 640
WIRE 1312 704 1312 640
WIRE 1472 704 1472 640
WIRE 1152 752 1152 736
WIRE 1248 784 1232 784
WIRE 1600 784 1600 752
WIRE 1600 784 1536 784
WIRE 1680 784 1600 784
WIRE 1808 784 1760 784
WIRE 1872 784 1808 784
WIRE 1600 800 1600 784
WIRE 1872 800 1872 784
WIRE 1600 880 1600 864
WIRE 1872 896 1872 880
WIRE 1040 912 992 912
WIRE 1168 912 1120 912
WIRE 1248 912 1168 912
WIRE 1808 912 1808 784
WIRE 1808 912 1536 912
WIRE 992 928 992 912
WIRE 1168 928 1168 912
WIRE 1808 928 1808 912
WIRE 1808 1008 1808 992
WIRE 992 1024 992 992
WIRE 1168 1024 1168 992
WIRE 1392 1024 1392 992
FLAG 1600 880 0
FLAG 1168 1024 0
FLAG 1872 896 0
FLAG 1808 1008 0
FLAG 1392 1024 0
FLAG 1152 752 0
FLAG 992 1024 0
FLAG 1872 784 OUT
FLAG 1152 640 IN
SYMBOL res 1136 896 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL schottky 1584 864 M180
WINDOW 0 38 57 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMBOL diode 1360 624 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL POLCAP 1792 928 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.05
SYMBOL IND 1664 800 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL VOLTAGE 1152 640 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 1152 928 R0
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL cap 976 928 R0
SYMATTR InstName C4
SYMATTR Value .025
SYMBOL cap 1584 688 R0
SYMATTR InstName C5
SYMATTR Value .22
SYMBOL PowerProducts\\LT1507-3.3 1392 848 R0
SYMATTR InstName U1
SYMBOL res 1856 784 R0
SYMATTR InstName Rload
SYMATTR Value 3.3
TEXT 1464 1056 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\4550e6e69e05_Aufgabe_1.1_DCSweep.asc
* Generated by LTspice 26.0.1 for Windows.
;tran 20m
XU1 0 N001 V+ V- out LM324 ;pnba In+)In-)V+)V-)OUT
R1 out N001 200e3
V1 V+ 0 5
R2 N001 in 10e3
V2 0 V- 5
V4 in 0 0 AC 10m
.include LM324.txt
.dc V4 -500mV 500mV 50mV
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 0 -224 0
WIRE -32 0 -96 0
WIRE 112 0 48 0
WIRE 160 0 112 0
WIRE 256 0 240 0
WIRE -224 16 -224 0
WIRE 560 32 560 16
WIRE 560 48 560 32
WIRE 192 112 192 96
WIRE 112 128 112 0
WIRE 160 128 112 128
WIRE -224 144 -224 96
WIRE 256 144 256 0
WIRE 256 144 224 144
WIRE 288 144 256 144
WIRE 304 144 288 144
WIRE 560 144 560 128
WIRE 560 144 512 144
WIRE 160 160 128 160
WIRE 512 160 512 144
WIRE 560 176 560 144
WIRE 128 192 128 160
WIRE 192 208 192 176
WIRE 560 272 560 256
WIRE 560 288 560 272
SYMBOL voltage 560 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL Opamps\\opamp2 192 80 R0
SYMATTR InstName U1
SYMATTR Value LM324
SYMBOL res 256 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200e3
SYMBOL voltage 560 32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -224 0 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 24 160 Left 2
SYMATTR Value2 AC 10m
SYMATTR Value 0
SYMATTR InstName V4
SYMBOL res 64 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10e3
FLAG 512 160 0
FLAG 560 32 V+
FLAG 560 272 V-
FLAG 192 96 V+
FLAG 192 208 V-
FLAG 288 144 out
FLAG -224 144 0
FLAG 128 192 0
FLAG -96 0 in
TEXT 616 -48 Left 2 !.include LM324.txt
TEXT -256 240 Left 2 !;tran 20m
TEXT -256 216 Left 2 !.dc V4 -500mV 500mV 50mV
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5692R.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5692R.asy)
Vdac1 NC_02 0 1.25
V1 Vdd 0 5
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
XU2 vDAC Vdd 0 vOUT AD5692R Gain=2 ;pnba Vdac)Vdd)GND)Vout
CLOAD NC_01 0 10n
I1 0 0 1m AC 1
.tran 200u
.lib AD5692R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 464 112 192 112
WIRE -800 144 -800 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL AD5692R -208 112 R0
SYMATTR InstName U2
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 1m
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2
* Z:\home\khalils\Downloads\files\data\raw_asc\13dff7ca1459_TBJ01.asc
* Generated by LTspice 26.0.1 for Windows.
Rb V1 B {Rb}
V1 V1 0 {Vcc}
Rc V1 C {Rc}
Q1 C B 0 0 BC546B
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.param Vcc=50 Rb=680 Rc=100
.meas VRc param V(V1)-V(c)
.meas VRb param V(V1)-V(b)
.meas PRb param VRb*I(Rb)
.meas PRc param VRc*I(Rc)
.meas Beta param I(Rc)/I(Rb)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 256 -32 128 -32
WIRE 368 -32 256 -32
WIRE 256 0 256 -32
WIRE 368 0 368 -32
WIRE 128 112 128 -32
WIRE 368 112 368 80
WIRE 368 128 368 112
WIRE 256 176 256 80
WIRE 272 176 256 176
WIRE 304 176 272 176
WIRE 128 272 128 192
WIRE 368 272 368 224
WIRE 368 272 128 272
WIRE 368 304 368 272
SYMBOL npn 304 128 R0
SYMATTR InstName Q1
SYMATTR Value BC546B
SYMBOL res 240 -16 R0
SYMATTR InstName Rb
SYMATTR Value {Rb}
SYMBOL res 352 -16 R0
SYMATTR InstName Rc
SYMATTR Value {Rc}
SYMBOL voltage 128 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vcc}
FLAG 368 304 0
FLAG 272 176 B
FLAG 368 112 C
FLAG 256 -32 V1
TEXT 120 312 Left 2 !.op
TEXT 120 352 Left 2 !.param Vcc=50 Rb=680 Rc=100
TEXT 552 32 Left 2 !.meas VRc param V(V1)-V(c)
TEXT 552 64 Left 2 !.meas VRb param V(V1)-V(b)
TEXT 552 96 Left 2 !.meas PRb param VRb*I(Rb)
TEXT 552 128 Left 2 !.meas PRc param VRc*I(Rc)
TEXT 552 160 Left 2 !.meas Beta param I(Rc)/I(Rb)
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5672R.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5672R.asy)
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
XU1 vDAC Vdd 0 vOUT AD5672R Gain=2 ;pnba Vdac)Vdd)GND)Vout
RLOAD vOUT 0 1k
CLOAD vOUT 0 10n
V1 Vdd 0 5
.tran 50u
.lib AD5672R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 112 112 0 112
WIRE 192 112 112 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL AD5672R -208 112 R0
SYMATTR InstName U1
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -240 -80 Vdd
TEXT -160 312 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1474.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1474.asy)
D1 0 N001 MBR0530L
V1 IN 0 10
XU1 N005 N003 N002 0 N001 IN IN N004 LTC1474 top=10 bot=1T ;pnba FB)LBO)LBI)GND)SW)Sense)Vin)Run
L1 N001 OUT 100
Rload OUT 0 25
R2 N005 0 1Meg
R1 OUT N005 1.68Meg
C1 OUT 0 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
.lib LTC1474.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2704 1608
WIRE 1600 1184 1488 1184
WIRE 1776 1184 1600 1184
WIRE 1488 1200 1488 1184
WIRE 1776 1200 1776 1184
WIRE 1600 1264 1600 1184
WIRE 1632 1264 1600 1264
WIRE 1984 1264 1920 1264
WIRE 2032 1264 1984 1264
WIRE 2160 1264 2112 1264
WIRE 2320 1264 2160 1264
WIRE 2448 1264 2320 1264
WIRE 2320 1280 2320 1264
WIRE 2448 1280 2448 1264
WIRE 1488 1296 1488 1280
WIRE 1984 1296 1984 1264
WIRE 2160 1296 2160 1264
WIRE 1632 1344 1616 1344
WIRE 1936 1344 1920 1344
WIRE 2320 1376 2320 1344
WIRE 2448 1376 2448 1360
WIRE 1984 1392 1984 1360
WIRE 1632 1424 1616 1424
WIRE 2160 1424 2160 1376
WIRE 2160 1424 1920 1424
WIRE 2160 1440 2160 1424
WIRE 1776 1504 1776 1488
WIRE 2160 1536 2160 1520
SYMBOL POWERPRODUCTS\\LTC1474 1776 1344 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1488 1184 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL RES 2144 1280 R0
SYMATTR InstName R1
SYMATTR Value 1.68Meg
SYMBOL res 2144 1424 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL ind 2016 1280 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMBOL res 2432 1264 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL schottky 1968 1360 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBR0530L
SYMBOL polcap 2304 1280 R0
SYMATTR InstName C1
SYMATTR Value 100
FLAG 1488 1296 0
FLAG 1984 1392 0
FLAG 2320 1376 0
FLAG 2448 1376 0
FLAG 1776 1504 0
FLAG 2160 1536 0
FLAG 2448 1264 OUT
FLAG 1488 1184 IN
TEXT 2256 1456 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\26de91aedafe_AD8067.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8067.asy)
V1 +V 0 12
V2 -V 0 -12
XU1 N003 N001 +V -V OUT AD8067 ;pnba In+)In-)V+)V-)OUT
Rload OUT 0 1K
R1 N001 0 110
R2 OUT N001 1K
Vin N002 0 SINE(0 1 1Meg)
R4 N003 N002 49.9
.tran 10u
.lib AD8067.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 96 -1200 96 -1216
WIRE 208 -1200 208 -1216
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 96 -1104 96 -1120
WIRE 208 -1104 208 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 720 -1104 640 -1104
WIRE 400 -1088 304 -1088
WIRE 544 -1088 480 -1088
WIRE 720 -1088 720 -1104
WIRE 304 -1072 304 -1088
WIRE 720 -992 720 -1008
WIRE 304 -976 304 -992
SYMBOL voltage 304 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 1Meg)
SYMBOL voltage 208 -1216 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 496 -1104 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 49.9
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 110
SYMBOL Opamps\\AD8067 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 704 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL voltage 96 -1216 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
FLAG 96 -1216 +V
FLAG 304 -976 0
FLAG 720 -1104 OUT
FLAG 576 -1136 +V
FLAG 208 -1216 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 720 -992 0
FLAG 208 -1104 0
FLAG 96 -1104 0
TEXT 784 -896 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4899.asc
* Generated by LTspice 26.0.1 for Windows.
* ADA4899\nUnity-Gain Operation
* Disable: _DISABLE pin = -Vs\nEnable: _DISABLE pin = open\nLow Ib: _DISABLE pin = +Vs
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4899.asy)
RL Vout 0 1k
VIN Vin 0 PULSE(-1 1 20n 1n 1n 50n 100n)
XU1 N002 N001 +Vs -Vs Vout N001 NC_01 ADA4899 ;pnba IN+)IN-)V+)V-)OUT)FB)PD
VS- 0 -Vs 5
Rin N002 Vin 24.9
VS+ +Vs 0 5
.tran 100n
.lib ADA4899.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -336 32 -336 16
WIRE 208 64 112 64
WIRE 208 128 208 64
WIRE 224 128 224 64
WIRE 112 144 112 64
WIRE 192 144 112 144
WIRE -336 160 -336 112
WIRE -336 160 -368 160
WIRE 432 160 256 160
WIRE 480 160 432 160
WIRE -368 176 -368 160
WIRE -48 176 -160 176
WIRE 16 176 -48 176
WIRE 192 176 96 176
WIRE -336 192 -336 160
WIRE 432 192 432 160
WIRE -160 240 -160 176
WIRE 224 240 224 192
WIRE -336 288 -336 272
WIRE 432 304 432 272
WIRE -160 352 -160 320
SYMBOL res 112 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rin
SYMATTR Value 24.9
SYMBOL voltage -336 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName VS+
SYMATTR Value 5
SYMBOL res 416 176 R0
SYMATTR InstName RL
SYMATTR Value 1k
SYMBOL ADA4899 224 176 R0
SYMATTR InstName U1
SYMBOL voltage -336 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName VS-
SYMATTR Value 5
SYMBOL voltage -160 224 R0
WINDOW 0 42 50 Left 2
WINDOW 3 42 78 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 42 106 Left 2
SYMATTR InstName VIN
SYMATTR Value PULSE(-1 1 20n 1n 1n 50n 100n)
FLAG -48 176 Vin
FLAG 224 64 +Vs
FLAG 224 240 -Vs
FLAG 480 160 Vout
FLAG 432 304 0
FLAG -336 16 +Vs
FLAG -336 288 -Vs
FLAG -368 176 0
FLAG -160 352 0
TEXT -160 56 Left 2 !.tran 100n
TEXT -160 -24 Left 2 ;ADA4899\nUnity-Gain Operation
TEXT 48 384 Left 2 ;Disable: _DISABLE pin = -Vs\nEnable: _DISABLE pin = open\nLow Ib: _DISABLE pin = +Vs
* Z:\home\khalils\Downloads\files\data\raw_asc\3f9323b67e77_damp.asc
* Generated by LTspice 26.0.1 for Windows.
R2 OUT N002 20k tol=5
V3 N001 N004 SINE(0 10m 1k)
R3 0 N003 19.99k tol=5
VOffset N001 0 7.5
V1 V+ 0 15
V2 0 V- 15
XU2 N003 N002 V+ V- OUT UA741 ;pnba In+)In-)V+)V-)OUT
R4 N003 N004 1k tol=5
R1 N002 N001 999 tol=5
.include UA741.txt
.dc VOffset 0 10 0.001
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -192 -784 -288 -784
WIRE -288 -768 -288 -784
WIRE -288 -752 -288 -768
WIRE -192 -640 -192 -704
WIRE -96 -640 -112 -640
WIRE -32 -640 -96 -640
WIRE 224 -624 224 -640
WIRE 224 -608 224 -624
WIRE -192 -576 -192 -640
WIRE -96 -544 -96 -640
WIRE -64 -544 -96 -544
WIRE 48 -528 48 -640
WIRE 48 -528 0 -528
WIRE -64 -512 -96 -512
WIRE 224 -512 224 -528
WIRE 224 -512 176 -512
WIRE 176 -496 176 -512
WIRE 224 -480 224 -512
WIRE -192 -432 -192 -496
WIRE -96 -432 -96 -512
WIRE -96 -432 -112 -432
WIRE -32 -432 -96 -432
WIRE 48 -384 48 -432
WIRE 224 -384 224 -400
WIRE 224 -368 224 -384
SYMBOL voltage 224 -624 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 64 -448 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 19.99k
SYMATTR SpiceLine tol=5
SYMBOL res -96 -656 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 999
SYMATTR SpiceLine tol=5
SYMBOL voltage -192 -592 R0
WINDOW 3 -178 105 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 10m 1k)
SYMATTR InstName V3
SYMBOL voltage 224 -496 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL res 64 -656 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 20k
SYMATTR SpiceLine tol=5
SYMBOL Opamps\\opamp2 -32 -592 R0
SYMATTR InstName U2
SYMATTR Value UA741
SYMBOL voltage -192 -688 R180
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VOffset
SYMATTR Value 7.5
SYMBOL res -96 -448 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1k
SYMATTR SpiceLine tol=5
FLAG 176 -496 0
FLAG 224 -624 V+
FLAG 224 -384 V-
FLAG 48 -528 OUT
FLAG -32 -560 V+
FLAG -32 -496 V-
FLAG 48 -384 0
FLAG -288 -768 0
TEXT 56 -800 Left 2 !.include UA741.txt
TEXT -376 -328 Left 2 !.dc VOffset 0 10 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\037613c107d3_NE55501fig.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\NE555.asy)
RL N001 out {RL}
XU1 0 N003 out N001 NC_01 N003 N002 N001 NE555 ;pnba GND)TRIG)OUT)RST)CV)THRS)DIS)Vcc
CA N003 0 {CA}
RA N001 N002 {RA}
Vcc N001 0 {Vcc}
RB N002 N003 {RB}
.param Vcc=?? RA=?? RB=?? RL=?? CA=??
.tran 0.01
.lib NE555.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 -64 -16 -64
WIRE 384 -64 64 -64
WIRE 512 -64 384 -64
WIRE 688 -64 512 -64
WIRE 512 -16 512 -64
WIRE -16 32 -16 -64
WIRE 512 80 512 64
WIRE 512 80 432 80
WIRE 512 96 512 80
WIRE 128 112 96 112
WIRE 384 112 384 -64
WIRE 384 112 352 112
WIRE 688 128 688 -64
WIRE 128 176 96 176
WIRE 432 176 432 80
WIRE 432 176 352 176
WIRE 512 208 512 176
WIRE 512 208 464 208
WIRE -64 240 -80 240
WIRE -16 240 -16 112
WIRE -16 240 -64 240
WIRE 128 240 -16 240
WIRE 464 240 464 208
WIRE 464 240 352 240
WIRE 512 240 512 208
WIRE 64 304 64 -64
WIRE 128 304 64 304
WIRE 96 368 96 176
WIRE 464 368 464 240
WIRE 464 368 96 368
WIRE 512 384 512 304
WIRE 688 384 688 208
WIRE 688 384 512 384
WIRE 512 432 512 384
SYMBOL res 496 80 R0
SYMATTR InstName RB
SYMATTR Value {RB}
SYMBOL res 496 -32 R0
SYMATTR InstName RA
SYMATTR Value {RA}
SYMBOL res -32 16 R0
WINDOW 0 -55 38 Left 2
WINDOW 3 -68 67 Left 2
SYMATTR InstName RL
SYMATTR Value {RL}
SYMBOL Misc\\NE555 240 208 R0
SYMATTR InstName U1
SYMBOL voltage 688 112 R0
WINDOW 0 29 18 Left 2
WINDOW 3 33 91 Left 2
SYMATTR InstName Vcc
SYMATTR Value {Vcc}
SYMBOL cap 496 240 R0
SYMATTR InstName CA
SYMATTR Value {CA}
FLAG 96 112 0
FLAG 512 432 0
FLAG -64 240 out
TEXT -32 400 Left 2 !.param Vcc=?? RA=?? RB=?? RL=?? CA=??
TEXT -32 440 Left 2 !.tran 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\64e0313327c9_Week1_Ex1A.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 0 nch l=2u w=4u
VDS N001 0 1.8
VGS N002 0 1.8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib 'C:\Program Files\LTC\LTspiceXVII\lib\cmp\log018.l' TT
.dc VGS 0 1.8 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 240 208 240
WIRE 208 336 208 240
WIRE 304 384 208 384
WIRE 160 416 -48 416
WIRE 416 416 416 240
WIRE -48 432 -48 416
WIRE -48 576 -48 512
WIRE 208 576 208 432
WIRE 208 576 -48 576
WIRE 304 576 304 384
WIRE 304 576 208 576
WIRE 416 576 416 496
WIRE 416 576 304 576
WIRE 208 608 208 576
SYMBOL nmos4 160 336 R0
SYMATTR InstName M1
SYMATTR Value nch
SYMATTR Value2 l=2u w=4u
SYMBOL voltage 416 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 1.8
SYMBOL voltage -48 416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 1.8
FLAG 208 608 0
TEXT -32 120 Left 2 !.lib 'C:\\Program Files\\LTC\\LTspiceXVII\\lib\\cmp\\log018.l' TT
TEXT -32 168 Left 2 !.dc VGS 0 1.8 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1844-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1844-1.5.asy)
C1 OUT 0 1
R1 OUT 0 10
V1 IN 0 PWL(0 0 1 6.5)
XU1 IN 0 IN OUT LTC1844-1.5 ;pnba IN)GND)_SHDN)OUT
.tran 1
.lib LTC1844-1.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1940 1316
WIRE 64 80 -32 80
WIRE 80 80 64 80
WIRE 432 80 368 80
WIRE 528 80 432 80
WIRE -32 96 -32 80
WIRE 528 96 528 80
WIRE 432 112 432 80
WIRE -32 192 -32 176
WIRE 432 192 432 176
WIRE 528 192 528 176
WIRE 64 240 64 80
WIRE 80 240 64 240
WIRE 224 304 224 288
SYMBOL res 512 80 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage -32 80 R0
WINDOW 3 -89 162 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PWL(0 0 1 6.5)
SYMATTR InstName V1
SYMBOL LTC1844-1.5 224 160 R0
SYMATTR InstName U1
SYMBOL cap 416 112 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 224 304 0
FLAG -32 192 0
FLAG 528 192 0
FLAG 528 80 OUT
FLAG -32 80 IN
FLAG 432 192 0
TEXT 184 368 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\2a0bc97afd50_6990.asc
* Generated by LTspice 26.0.1 for Windows.
* TimerBlox\n500Hz to 2KHz Voltage Controlled Oscillator\nControl Voltage Ramps from 2V to 1V\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6990.asy)
XU1 N001 0 N003 N004 N001 OUT LTC6990 ;pnba OE)GND)SET)DIV)V+)OUT
V2 N002 0 PULSE(2 1 5m 20m 20m 5m 50m)
V1 N001 0 5
R3 N003 0 196K
R4 N003 N002 261K
R2 N004 0 887K
R1 N001 N004 1Meg
.tran 60m startup
.lib LTC6990.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
WIRE 512 32 80 32
WIRE 80 80 80 32
WIRE 112 80 80 80
WIRE 400 80 336 80
WIRE 112 160 96 160
WIRE 384 160 336 160
WIRE 512 160 512 32
WIRE 512 160 384 160
WIRE 384 176 384 160
WIRE 512 176 512 160
WIRE -336 240 -352 240
WIRE -96 240 -256 240
WIRE 48 240 -16 240
WIRE 112 240 48 240
WIRE 352 240 336 240
WIRE 48 256 48 240
WIRE 352 272 352 240
WIRE 384 272 384 256
WIRE 384 272 352 272
WIRE 512 272 512 256
WIRE 384 288 384 272
WIRE 48 352 48 336
WIRE 384 384 384 368
SYMBOL res 0 224 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R4
SYMATTR Value 261K
SYMBOL voltage -240 240 R90
WINDOW 3 32 56 VTop 0
WINDOW 123 74 56 VTop 0
WINDOW 39 53 56 VTop 0
WINDOW 0 -32 56 VBottom 0
SYMATTR Value PULSE(2 1 5m 20m 20m 5m 50m)
SYMATTR InstName V2
SYMBOL res 368 160 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL LTC6990 224 160 R0
SYMATTR InstName U1
SYMBOL res 368 272 R0
SYMATTR InstName R2
SYMATTR Value 887K
SYMBOL voltage 512 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 32 240 R0
SYMATTR InstName R3
SYMATTR Value 196K
FLAG 512 272 0
FLAG -352 240 0
FLAG 96 160 0
FLAG 400 80 OUT
FLAG 48 352 0
FLAG 384 384 0
TEXT 224 24 Bottom 0 ;TimerBlox\n500Hz to 2KHz Voltage Controlled Oscillator\nControl Voltage Ramps from 2V to 1V\nStartup Modeled
TEXT 488 368 Left 0 !.tran 60m startup