* Z:\home\khalils\Downloads\files\data\raw_asc\27bb6bad2be6_HVOpAmp.asc
* Generated by LTspice 26.0.1 for Windows.
*//////////////////////////////////////////////////////////////////////
* (C) National Semiconductor, Inc.
* Models developed and under copyright by:
* National Semiconductor, Inc.
*/////////////////////////////////////////////////////////////////////
* Legal Notice: This material is intended for free software support.
* The file may be copied, and distributed; however, reselling the
* material is illegal
*////////////////////////////////////////////////////////////////////
* For ordering or technical information on these models, contact:
* National Semiconductor's Customer Response Center
* 7:00 A.M.--7:00 P.M. U.S. Central Time
* (800) 272-9959
* For Applications support, contact the Internet address:
* amps-apps@galaxy.nsc.com
* ///////////////////////////////////////////////////////////////////
* User Notes:
*
* 1. Input resistance (Rin) for these JFET op amps is 1TOhm. Rin is
* modeled by assuming the option GMIN=1TOhm. If a different (non-
* default) GMIN value is needed, users may recalculate as follows:
* Rin=(R1||GMIN+R2||GMIN), where R1=R2,
* to maintain a consistent Rin model.
* ///////////////////////////////////////////////////////////////////
*//////////////////////////////////////////////////////////
*LF411 LOW OFFSET, LOW DRIFT JFET INPUT OP-AMP MACRO-MODEL
*//////////////////////////////////////////////////////////
*
* connections: non-inverting input
* | inverting input
* | | positive power supply
* | | | negative power supply
* | | | | output
* | | | | |
* | | | | |
*
*Features:
*Fast settling time (.01%) = 2uS
*High bandwidth = 3MHz
*High slew rate = 10V/uS
*Low offset voltage = .5mV
*Low supply current = 1.8mA
*
****************INPUT STAGE**************
*
*^Input offset current
*Fp2=28 MHZ
*
***********COMMON MODE EFFECT***********
*
*^Quiescent supply current
*Input offset voltage.^
*
*********OUTPUT VOLTAGE LIMITING********
*
**************SECOND STAGE**************
*
*Fp1=18 HZ
*
***************POLE STAGE***************
*
*Fp=30 MHz
*
*********COMMON-MODE ZERO STAGE*********
*
*
**************OUTPUT STAGE**************
*
*
***************MODELS USED**************
*
*
*$
R9 N001 N003 1
VA3 9 11 0
R1 N008 IN 1k
V3 10 50 2.13
C3 98 11 857.516P
F5 99 23 VA8 1
R9 49 50 80K
V4 N010 0 12 Rser=0.01
V1 IN 0 PULSE(-2 2 0 1n 1n 5m 10m) Rser=0.01
Q5 N016 N005 N012 0 MJE350
C5 98 15 5.305E-15
R2 3 2 1E12
V5 0 N015 12 Rser=0.01
R4 N014 N013 10k
XU1 0 N008 N010 N015 N009 LF411 LF411 ;pnba In+)In-)V+)V-)OUT
V3 0 N016 125 Rser=0.01
G4 98 16 3 49 1E-8
J2 6 7 4 JX
G3 98 15 9 49 1E-6
Q4 N006 N004 N003 0 MJE350
R5 N005 N011 10k
R6 N006 N005 10k
Q6 N001 N005 N007 0 MJE340
R1 1 3 1E12
F6 99 50 VA7 1
I2 99 50 800UA
R8 N001 N002 1
C1 0 OUT 470n
R5 98 9 10MEG
R10 N007 OUT 1
V2 99 8 2.13
R3 5 50 650
Q1 N013 N009 0 0 MJE350
R16 27 28 50
D6 23 99 DX
EH 99 98 99 49 1
D4 25 15 DX
VA7 99 21 0
VA8 26 27 0
D2 N009 N008 1N4148
R13 17 16 1K
IOS 2 1 25.0P
R7 N004 N016 1Meg
EOS 7 1 POLY(1) 16 49 .8E-3 1
V2 N001 0 125 Rser=0.01
R8 99 49 80K
D5 21 23 DX
CI1 1 0 3P
L2 98 17 144.7M
R11 OUT N012 1
R4 6 50 650
CI2 2 0 3P
R12 98 15 1MEG
J1 5 2 4 JX
R2 OUT N008 20k
I1 99 4 1.0M
V5 28 25 0.646V
Q2 N011 N014 N016 0 MJE340
D1 9 8 DX
R3 N013 N016 39k
D2 10 9 DX
Q3 N004 N004 N002 0 MJE350
E1 99 26 99 15 1
D3 15 24 DX
D1 N008 N009 1N4148
V4 24 28 0.646V
G1 98 9 5 6 20E-3
C4 5 6 4.372P
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 50m 0
.SUBCKT LF411 1 2 99 50 28
.MODEL DX D(IS=1E-15)
.MODEL JX PJF(BETA=1.183E-3 VTO=-.65 IS=50E-12)
.ENDS
.backanno
.end

* LTspice schematic (.asc):
Version 4
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WIRE 1200 32 1088 32
WIRE 1216 32 1200 32
WIRE 800 48 800 0
WIRE 992 48 992 -208
WIRE 992 48 800 48
WIRE 1344 48 1344 -176
WIRE 1440 48 1344 48
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WIRE 256 64 256 0
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WIRE 800 80 800 48
WIRE 1088 80 1088 32
WIRE 1440 80 1440 48
WIRE 144 112 -304 112
WIRE 464 112 352 112
WIRE -304 128 -304 112
WIRE 352 128 352 112
WIRE 464 128 464 112
WIRE 144 144 144 112
WIRE -80 160 -80 80
WIRE -80 160 -144 160
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WIRE 64 160 64 0
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WIRE 256 176 256 64
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WIRE 288 176 256 176
WIRE 112 192 64 192
WIRE 1200 192 1200 32
WIRE 1248 192 1200 192
WIRE 1344 192 1344 48
WIRE 1344 192 1312 192
WIRE 800 208 800 160
WIRE 1088 208 1088 160
WIRE -304 240 -304 208
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IOPIN -80 80 Out
IOPIN 1216 32 Out
SYMBOL res 528 -96 R0
SYMATTR InstName R7
SYMATTR Value 1meg
SYMBOL Opamps\\opamp2 144 112 R0
SYMATTR InstName U1
SYMATTR Value LF411
SYMATTR SpiceModel LF411
SYMBOL res 528 -384 R0
SYMATTR InstName R8
SYMATTR Value 1
SYMBOL res 1072 64 R0
SYMATTR InstName R11
SYMATTR Value 1
SYMBOL res 336 256 R0
SYMATTR InstName R3
SYMATTR Value 39k
SYMBOL voltage -304 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 132 Left 0
SYMATTR SpiceLine Rser=0.01
SYMATTR InstName V4
SYMATTR Value 12
SYMBOL voltage -144 144 R0
WINDOW 123 24 132 Left 0
WINDOW 39 24 132 Left 0
SYMATTR SpiceLine Rser=0.01
SYMATTR InstName V1
SYMATTR Value PULSE(-2 2 0 1n 1n 5m 10m)
SYMBOL res 784 -96 R0
SYMATTR InstName R6
SYMATTR Value 10k
SYMBOL voltage 1344 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 132 Left 0
SYMATTR SpiceLine Rser=0.01
SYMATTR InstName V3
SYMATTR Value 125
SYMBOL diode 224 -16 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL res 784 -384 R0
SYMATTR InstName R9
SYMATTR Value 1
SYMBOL cap 1312 176 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C1
SYMATTR Value 470n
SYMBOL res 32 144 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 784 64 R0
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SYMATTR Value 10k
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WINDOW 123 0 0 Left 0
WINDOW 39 24 132 Left 0
SYMATTR SpiceLine Rser=0.01
SYMATTR InstName V5
SYMATTR Value 12
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SYMATTR Value MJE340
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SYMATTR Value 10k
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SYMATTR InstName Q1
SYMATTR Value MJE350
SYMBOL voltage 1344 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 0
SYMATTR SpiceLine Rser=0.01
SYMATTR InstName V2
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SYMATTR InstName Q3
SYMATTR Value MJE350
SYMBOL diode 160 80 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL pnp 736 -160 M180
SYMATTR InstName Q4
SYMATTR Value MJE350
SYMBOL res 1072 -96 R0
SYMATTR InstName R10
SYMATTR Value 1
SYMBOL npn 736 208 R0
SYMATTR InstName Q2
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SYMBOL res 48 -208 R0
SYMATTR InstName R2
SYMATTR Value 20k
SYMBOL pnp 1024 304 M180
SYMATTR InstName Q5
SYMATTR Value MJE350
FLAG -32 272 0
FLAG 464 128 0
FLAG 1440 80 0
FLAG -384 256 0
FLAG -80 80 IN
FLAG 1216 32 OUT
TEXT -176 872 Left 0 !.tran 0 50m 0
TEXT 1568 -464 Left 0 !*//////////////////////////////////////////////////////////////////////\n* (C) National Semiconductor, Inc.\n* Models developed and under copyright by:\n* National Semiconductor, Inc.  \n \n*/////////////////////////////////////////////////////////////////////\n* Legal Notice: This material is intended for free software support.\n* The file may be copied, and distributed; however, reselling the \n*  material is illegal\n \n*////////////////////////////////////////////////////////////////////\n* For ordering or technical information on these models, contact:\n* National Semiconductor's Customer Response Center\n*                 7:00 A.M.--7:00 P.M.  U.S. Central Time\n*                                (800) 272-9959\n* For Applications support, contact the Internet address:\n*  amps-apps@galaxy.nsc.com\n \n* ///////////////////////////////////////////////////////////////////\n* User Notes:\n*\n* 1. Input resistance (Rin) for these JFET op amps is 1TOhm.  Rin is\n*    modeled by assuming the option GMIN=1TOhm.  If a different (non-\n*    default) GMIN value is needed, users may recalculate as follows:\n*    Rin=(R1||GMIN+R2||GMIN), where R1=R2,\n*    to maintain a consistent Rin model.\n \n* ///////////////////////////////////////////////////////////////////\n*//////////////////////////////////////////////////////////\n*LF411 LOW OFFSET, LOW DRIFT JFET INPUT OP-AMP MACRO-MODEL\n*//////////////////////////////////////////////////////////\n*\n* connections:    non-inverting input\n*                 |   inverting input\n*                 |   |   positive power supply\n*                 |   |   |   negative power supply\n*                 |   |   |   |   output\n*                 |   |   |   |   |\n*                 |   |   |   |   |\n.SUBCKT LF411  1   2  99  50  28\n*\n*Features:\n*Fast settling time (.01%) =           2uS\n*High bandwidth =                     3MHz\n*High slew rate =                   10V/uS\n*Low offset voltage =                 .5mV\n*Low supply current =                1.8mA\n*\n****************INPUT STAGE************** \n*\nIOS 2 1 25.0P\n*^Input offset current\nCI1 1 0 3P\nCI2 2 0 3P\nR1 1 3 1E12\nR2 3 2 1E12\nI1 99 4 1.0M\nJ1 5 2 4 JX\nJ2 6 7 4 JX\nR3 5 50 650\nR4 6 50 650\n*Fp2=28 MHZ\nC4 5 6 4.372P \n*\n***********COMMON MODE EFFECT***********\n*\nI2 99 50 800UA\n*^Quiescent supply current\nEOS 7 1 POLY(1) 16 49 .8E-3 1\n*Input offset voltage.^\nR8 99 49 80K\nR9 49 50 80K\n*\n*********OUTPUT VOLTAGE LIMITING********\nV2 99 8 2.13\nD1 9 8 DX\nD2 10 9 DX\nV3 10 50 2.13\n*\n**************SECOND STAGE**************\n*\nEH 99 98 99 49 1\nG1 98 9 5 6 20E-3\nR5 98 9 10MEG\nVA3 9 11 0\n*Fp1=18 HZ\nC3 98 11 857.516P\n*\n***************POLE STAGE***************\n*\n*Fp=30 MHz\nG3 98 15 9 49 1E-6\nR12 98 15 1MEG\nC5 98 15 5.305E-15\n*\n*********COMMON-MODE ZERO STAGE*********\n*\nG4 98 16 3 49 1E-8\nL2 98 17 144.7M\nR13 17 16 1K\n*\n**************OUTPUT STAGE**************\n*\nF6  99 50 VA7 1\nF5  99 23 VA8 1\nD5  21 23 DX\nVA7 99 21 0\nD6  23 99 DX\nE1  99 26 99 15 1\nVA8 26 27 0\nR16 27 28 50\nV5  28 25 0.646V\nD4  25 15 DX\nV4  24 28 0.646V\nD3  15 24 DX\n*\n***************MODELS USED**************\n*\n.MODEL DX D(IS=1E-15)\n.MODEL JX PJF(BETA=1.183E-3 VTO=-.65 IS=50E-12)\n*\n.ENDS\n*$