Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\09c428f3bff3_Fig23_26_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N008 N009 52k TC1=0.002
M3B N001 Vbias2 N002 VDD P_1u l=2u w=30u
MSU3 N007 N007 0 0 N_1u l=10u w=10u
M4T VDD Vbias1 Vbias1 VDD P_1u l=2u w=30u
M2T Vbias2 N002 N005 0 N_1u l=2u w=10u
D2 N009 0 PNPDIODE 8
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2712 680
WIRE 1424 -272 1424 -320
WIRE 1424 48 1424 16
WIRE 1472 -272 1424 -272
WIRE 1472 -192 1472 -272
WIRE 1472 -176 1424 -176
WIRE 1472 -96 1472 -176
WIRE 1472 -80 1424 -80
WIRE 1472 0 1472 -80
WIRE 1872 -416 1872 -448
WIRE 1872 -304 1536 -304
WIRE 1872 -304 1872 -320
WIRE 1936 -432 1536 -432
WIRE 1936 -336 1920 -336
WIRE 1936 -336 1936 -432
WIRE 1936 -304 1872 -304
WIRE 1936 -224 1920 -224
WIRE 1936 -224 1936 -304
WIRE 1936 -192 1872 -192
WIRE 1936 -112 1920 -112
WIRE 1936 -112 1936 -192
WIRE 2000 -464 1920 -464
WIRE 2000 -336 1936 -336
WIRE 2064 -464 2000 -464
WIRE 2064 -432 2064 -464
WIRE 2064 -336 2000 -336
WIRE 2064 -304 2064 -336
WIRE 2080 -464 2064 -464
WIRE 2080 -336 2064 -336
WIRE 2080 -224 1936 -224
WIRE 2080 -112 1936 -112
WIRE 2128 -432 2064 -432
WIRE 2128 -432 2128 -448
WIRE 2128 -416 2128 -432
WIRE 2128 -304 2064 -304
WIRE 2128 -304 2128 -320
WIRE 2128 -192 2128 -208
WIRE 2128 -32 2128 -96
WIRE 2128 64 2128 48
SYMBOL res 2112 -48 R0
SYMATTR InstName R1
SYMATTR Value 52k TC1=0.002
SYMBOL pmos4 1920 -416 M0
WINDOW 0 75 20 Left 0
WINDOW 3 61 91 Left 0
WINDOW 123 52 69 Left 0
SYMATTR InstName M3B
SYMATTR Value P_1u
SYMATTR Value2 l=2u w=30u
SYMBOL nmos4 1472 -80 M0
WINDOW 123 56 100 Left 0
WINDOW 0 69 31 Left 0
SYMATTR Value2 l=10u w=10u
SYMATTR InstName MSU3
SYMATTR Value N_1u
SYMBOL pmos4 2080 -544 R0
WINDOW 0 75 20 Left 0
WINDOW 3 61 91 Left 0
WINDOW 123 62 70 Left 0
SYMATTR InstName M4T
SYMATTR Value P_1u
SYMATTR Value2 l=2u w=30u
SYMBOL nmos4 2080 -304 R0
WINDOW 123 56 100 Left 0
WINDOW 0 69 31 Left 0
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M2T
SYMATTR Value N_1u
SYMBOL diode 2112 64 R0
WINDOW 0 43 9 Left 0
WINDOW 3 42 41 Left 0
SYMATTR InstName D2
SYMATTR Value PNPDIODE 8
FLAG 1424 -32 0
FLAG 1424 48 0
FLAG 1872 -496 VDD
FLAG 1872 -544 VDD
FLAG 1872 -368 VDD
FLAG 2128 -496 VDD
FLAG 2128 -544 VDD
FLAG 2128 -368 VDD
FLAG 2128 -144 0
FLAG 2128 -256 0
FLAG 1872 -256 0
FLAG 1424 -128 0
FLAG 1424 -224 0
FLAG 2000 -464 Vbias1
FLAG 2128 128 0
FLAG 2000 -336 Vbias2
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1715.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 N001 0 PULSE(0 2 0 .5u .5u 0 1u)
V3 N003 0 1
XU1 N003 N001 +V 0 +V 0 N002 LT1715 ;pnba In+)In-)Vcc)Vee)VS+)GND)OUT
.tran 3u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1715.asy)
.lib LT1715.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 800
WIRE 224 224 224 208
WIRE 256 224 224 224
WIRE 224 240 224 224
WIRE 256 240 256 224
WIRE -400 272 -400 256
WIRE 208 272 -272 272
WIRE -272 288 -272 272
WIRE 384 288 288 288
WIRE 208 304 96 304
WIRE 96 320 96 304
WIRE 224 352 224 336
WIRE 240 352 224 352
WIRE 256 352 256 336
WIRE 256 352 240 352
WIRE -400 368 -400 352
WIRE 240 384 240 352
WIRE -272 400 -272 368
WIRE 96 416 96 400
FLAG -400 368 0
FLAG -400 256 +V
FLAG 224 208 +V
FLAG -272 400 0
FLAG 96 416 0
FLAG 240 384 0
SYMBOL voltage -400 256 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -272 272 R0
WINDOW 3 17 101 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 2 0 .5u .5u 0 1u)
SYMATTR InstName V2
SYMBOL voltage 96 304 R0
SYMATTR InstName V3
SYMATTR Value 1
SYMBOL LT1715 240 288 R0
SYMATTR InstName U1
TEXT 232 448 Left 2 !.tran 3u
* Z:\tmp\asc_dec_bjh7r6w2\13e4caf8ddd1_6261_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
C3 N004 0 470p
V3 IN 0 1.5 AC 1
R2 N002 N001 15.4K
C1 N001 0 470p
R4 N004 IN 7.7K
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4472 1028
WIRE -2752 -576 -2864 -576
WIRE -2464 -576 -2672 -576
WIRE -3200 -528 -3200 -544
WIRE -2608 -496 -2704 -496
WIRE -2464 -496 -2464 -576
WIRE -2464 -496 -2544 -496
WIRE -3200 -432 -3200 -448
WIRE -2624 -400 -2624 -416
WIRE -3136 -352 -3200 -352
WIRE -3024 -352 -3056 -352
WIRE -2976 -352 -3024 -352
WIRE -2864 -352 -2864 -576
WIRE -2864 -352 -2896 -352
WIRE -2816 -352 -2864 -352
WIRE -2704 -352 -2704 -496
WIRE -2704 -352 -2736 -352
WIRE -2656 -352 -2704 -352
WIRE -3200 -336 -3200 -352
WIRE -3024 -320 -3024 -352
WIRE -2864 -320 -2864 -352
WIRE -2464 -320 -2464 -496
WIRE -2656 -288 -2720 -288
WIRE -2720 -272 -2720 -288
WIRE -3200 -240 -3200 -256
WIRE -3024 -224 -3024 -256
WIRE -2864 -224 -2864 -256
WIRE -2720 -176 -2720 -192
SYMBOL cap -3040 -320 R0
SYMATTR InstName C3
SYMATTR Value 470p
SYMBOL voltage -3200 -352 R0
WINDOW 123 32 96 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 47 60 Left 2
SYMATTR Value2 AC 1
SYMATTR Value 1.5
SYMATTR InstName V3
SYMBOL res -2656 -592 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 15.4K
SYMBOL cap -2880 -320 R0
SYMATTR InstName C1
SYMATTR Value 470p
SYMBOL res -3040 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 7.7K
FLAG -3200 -432 0
FLAG -3200 -544 +V
FLAG -3200 -240 0
FLAG -2864 -224 0
FLAG -3024 -224 0
FLAG -2720 -176 0
FLAG -2624 -416 +V
FLAG -3200 -352 IN
* Z:\tmp\asc_dec_bjh7r6w2\07cc1161ba69_Fig22_7_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
M2 Vout N003 N004 0 N_1u l=2u w=10u
VI2 N003 0 4
M1 N001 N002 N004 0 N_1u l=2u w=10u
M4 Vout N001 VDD VDD P_1u l=2u w=30u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1784 680
WIRE 1280 -336 1264 -336
WIRE 1440 -336 1280 -336
WIRE 1216 -240 1216 -256
WIRE 1280 -240 1280 -336
WIRE 1280 -240 1216 -240
WIRE 1488 -240 1488 -256
WIRE 1680 -240 1488 -240
WIRE 1696 -240 1680 -240
WIRE 1168 -160 1104 -160
WIRE 1600 -160 1536 -160
WIRE 1216 -112 1216 -144
WIRE 1376 -112 1216 -112
WIRE 1488 -112 1488 -144
WIRE 1488 -112 1376 -112
WIRE 1376 -80 1376 -112
SYMBOL nmos4 1536 -240 M0
WINDOW 123 56 100 Left 2
WINDOW 0 69 31 Left 2
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M2
SYMATTR Value N_1u
SYMBOL voltage 1600 -176 R0
WINDOW 0 -72 40 Left 2
WINDOW 3 -71 77 Left 2
SYMATTR InstName VI2
SYMATTR Value 4
SYMBOL nmos4 1168 -240 R0
WINDOW 123 56 100 Left 2
WINDOW 0 69 31 Left 2
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M1
SYMATTR Value N_1u
SYMBOL pmos4 1440 -256 M180
WINDOW 123 58 102 Left 2
WINDOW 0 56 16 Left 2
SYMATTR Value2 l=2u w=30u
SYMATTR InstName M4
SYMATTR Value P_1u
FLAG 1216 -192 0
FLAG 1488 -192 0
FLAG 1104 -80 0
FLAG 1600 -80 0
FLAG 1488 -352 VDD
FLAG 1488 -304 VDD
FLAG 1216 -352 VDD
FLAG 1216 -304 VDD
FLAG 1680 -240 Vout
* Z:\home\khalils\Downloads\files\data\raw_asc\1fd1c6261ae6_RLC.asc
* Generated by LTspice 26.0.1 for Windows.
R2 P001 N001 9.9
L1 N002 P001 104.9m
C1 N002 0 46.8n
V1 N001 0 SINE(0 2 1340) AC 1
.ac dec 1000 1 100Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 208 -32 128 -32
WIRE 128 16 128 -32
WIRE 368 16 368 -32
WIRE 128 128 128 96
WIRE 368 128 368 80
WIRE 368 128 128 128
SYMBOL res 304 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 9.9
SYMBOL cap 352 16 R0
SYMATTR InstName C1
SYMATTR Value 46.8n
SYMBOL ind 384 -48 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 30 62 VTop 2
SYMATTR InstName L1
SYMATTR Value 104.9m
SYMBOL voltage 128 0 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value SINE(0 2 1340)
FLAG 128 128 0
TEXT 368 -8 Left 2 !.ac dec 1000 1 100Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\3113c817ea31_5A.asc
* Generated by LTspice 26.0.1 for Windows.
* 1.1V
* 5.6W
I1 N001 N003 15mA
I2 N001 N002 5A
V1 N001 0 1V
XQ1 N002 N003 0 TIP122 ;pnba C)B)E
.lib TIP122.onsemi.lib
.tran 0 0.001 0 0.000001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -96 16 -96
WIRE 272 -96 144 -96
WIRE 144 -48 144 -96
WIRE 272 -48 272 -96
WIRE 16 128 16 -96
WIRE 272 128 272 32
WIRE 144 176 144 32
WIRE 208 176 144 176
WIRE 16 272 16 208
WIRE 112 272 16 272
WIRE 272 272 272 224
WIRE 272 272 112 272
WIRE 112 304 112 272
SYMBOL npn 208 128 R0
SYMATTR InstName Q1
SYMATTR Value TIP122
SYMATTR Prefix X
SYMBOL current 144 -48 R0
SYMATTR InstName I1
SYMATTR Value 15mA
SYMBOL current 272 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I2
SYMATTR Value 5A
SYMBOL voltage 16 112 R0
SYMATTR InstName V1
SYMATTR Value 1V
FLAG 112 304 0
TEXT 24 360 Left 2 !.lib TIP122.onsemi.lib
TEXT 16 400 Left 2 !.tran 0 0.001 0 0.000001
TEXT 280 120 Left 2 ;1.1V
TEXT 280 232 Left 2 ;5.6W
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8002.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8002.asy)
R2 N001 0 24.3K
R1 N002 0 41.2K
Rload OUT 0 10
C2 OUT 0 22
XU1 NC_01 IN N002 IN N003 0 NC_02 OUT N001 0 LTM8002 ;pnba BIAS)RUN)RT)VIN)TR/SS)SYNC)PG)VOUT)FB)GND
C1 N003 0 1n
V1 IN 0 12
.tran 1.2m startup
.lib LTM8002.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 -16 -48 -16
WIRE 64 -16 -16 -16
WIRE 240 -16 64 -16
WIRE 240 0 240 -16
WIRE -48 16 -48 -16
WIRE 64 64 64 -16
WIRE 96 64 64 64
WIRE 560 64 384 64
WIRE 608 64 560 64
WIRE 656 64 608 64
WIRE 560 80 560 64
WIRE 656 80 656 64
WIRE -48 112 -48 96
WIRE 96 160 64 160
WIRE 448 160 384 160
WIRE 448 176 448 160
WIRE 560 176 560 144
WIRE 656 176 656 160
WIRE 448 272 448 256
WIRE 0 352 -16 352
WIRE 96 352 80 352
WIRE 416 352 384 352
WIRE 496 352 480 352
WIRE 240 448 240 416
SYMBOL LTM8002 240 208 R0
SYMATTR InstName U1
SYMBOL res 640 64 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL res 432 160 R0
SYMATTR InstName R2
SYMATTR Value 24.3K
SYMBOL voltage -48 0 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 544 80 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL res 96 336 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 41.2K
SYMBOL cap 416 336 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
FLAG -48 112 0
FLAG 240 448 0
FLAG -16 352 0
FLAG 64 160 0
FLAG 448 272 0
FLAG 496 352 0
FLAG 560 176 0
FLAG 656 176 0
FLAG 608 64 OUT
FLAG -16 -16 IN
TEXT 456 432 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3022.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3022.asy)
R2 N001 0 200
R1 OUT N001 698
C1 OUT 0 10
Rload OUT 0 .9
XU1 MP_01 MP_02 OUT MP_03 MP_04 MP_05 N001 MP_06 IN 0 MP_07 IN LT3022 ;pnba ))OUT))))ADJ))_SHDN)GND))IN
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT3022.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 160 -208 160
WIRE 16 160 0 160
WIRE 352 160 304 160
WIRE 464 160 352 160
WIRE 560 160 464 160
WIRE -208 176 -208 160
WIRE 464 176 464 160
WIRE 560 176 560 160
WIRE 0 256 0 160
WIRE 16 256 0 256
WIRE 352 256 352 240
WIRE 352 256 304 256
WIRE -208 272 -208 256
WIRE 352 272 352 256
WIRE 464 272 464 240
WIRE 560 272 560 256
WIRE 160 336 160 320
WIRE 352 368 352 352
SYMBOL res 544 160 R0
SYMATTR InstName Rload
SYMATTR Value .9
SYMBOL res 336 144 R0
SYMATTR InstName R1
SYMATTR Value 698
SYMBOL PowerProducts\\LT3022 160 192 R0
SYMATTR InstName U1
SYMBOL res 336 256 R0
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL voltage -208 160 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 448 176 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 160 336 0
FLAG 352 368 0
FLAG 464 272 0
FLAG 560 272 0
FLAG -208 272 0
FLAG 560 160 OUT
FLAG -208 160 IN
TEXT 480 352 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2370-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2370-1.8.asy)
XU1 NC_01 IN IN IN N002 OUT N001 0 ADP2370-1.8 IPSM=400m Rt=277777.8 Rb=222222.2 C1=9.6p Rc1=100k R3=5.92k Rshort=100MEG PD=0 ;pnba FSEL)SYNC)EN)Vin)SW)FB)PG)PGND
V1 IN 0 12
C1 OUT 0 10
L1 N002 OUT 10 Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
Rload OUT 0 20
R1 OUT N001 10K
.tran 500u startup
.lib ADP2370-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 692
WIRE 128 96 16 96
WIRE 176 96 128 96
WIRE 480 96 400 96
WIRE 640 96 560 96
WIRE 16 112 16 96
WIRE 128 176 128 96
WIRE 176 176 128 176
WIRE 432 176 400 176
WIRE 560 176 512 176
WIRE 640 176 640 96
WIRE 640 176 560 176
WIRE 720 176 640 176
WIRE 720 192 720 176
WIRE 16 208 16 192
WIRE 128 336 128 176
WIRE 560 256 560 240
WIRE 560 256 400 256
WIRE 560 272 560 256
WIRE 720 288 720 272
WIRE 176 336 128 336
WIRE 640 336 640 176
WIRE 640 336 400 336
SYMBOL res 704 176 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL res 576 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL ind 416 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
SYMBOL cap 544 176 R0
WINDOW 0 29 15 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL VOLTAGE 16 96 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ADP2370-1.8 288 208 R0
SYMATTR InstName U1
FLAG 16 208 0
FLAG 16 96 IN
FLAG 560 272 0
FLAG 720 176 OUT
FLAG 720 288 0
TEXT 552 368 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1372.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1372.asy)
R3 OUT N003 53.6K
C2 0 N005 .0047
D1 N001 OUT MBRS340
C1 OUT 0 .1
V1 IN 0 5
R2 N003 0 6.19K
C4 OUT 0 22 Rser=.05
L1 IN N001 4.7 Rser=0.02 Rpar=5000
R1 N004 N005 2K
C3 0 N004 .047
XU1 N005 N003 N006 N002 IN MP_01 0 N001 LT1372 ;pnba Vc)FB)NFB)_SHDN)Vin))GND)SW
Rload OUT 0 50
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LT1372.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2868 1400
WIRE 1824 880 1520 880
WIRE 1888 880 1824 880
WIRE 2032 880 1968 880
WIRE 2080 880 2032 880
WIRE 2192 880 2144 880
WIRE 2304 880 2192 880
WIRE 2416 880 2304 880
WIRE 2528 880 2416 880
WIRE 1520 896 1520 880
WIRE 2304 896 2304 880
WIRE 2416 896 2416 880
WIRE 2528 896 2528 880
WIRE 1824 928 1824 880
WIRE 2192 960 2192 880
WIRE 1520 992 1520 976
WIRE 1680 992 1648 992
WIRE 2032 992 2032 880
WIRE 2032 992 1968 992
WIRE 2304 992 2304 960
WIRE 2416 992 2416 960
WIRE 2528 992 2528 976
WIRE 2192 1072 2192 1040
WIRE 2192 1072 1968 1072
WIRE 2192 1088 2192 1072
WIRE 1472 1152 1408 1152
WIRE 1600 1152 1552 1152
WIRE 1680 1152 1600 1152
WIRE 2000 1152 1968 1152
WIRE 1408 1168 1408 1152
WIRE 1600 1168 1600 1152
WIRE 2192 1184 2192 1168
WIRE 1408 1248 1408 1232
WIRE 1600 1248 1600 1232
WIRE 1824 1248 1824 1216
SYMBOL RES 2512 880 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL polcap 2288 896 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMATTR SpiceLine Rser=.05
SYMBOL CAP 1584 1232 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value .0047
SYMBOL IND 1872 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL RES 2176 1072 R0
SYMATTR InstName R2
SYMATTR Value 6.19K
SYMBOL VOLTAGE 1520 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL POWERPRODUCTS\\LT1372 1824 1072 R0
SYMATTR InstName U1
SYMBOL schottky 2080 896 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMBOL CAP 2400 896 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL RES 2176 944 R0
SYMATTR InstName R3
SYMATTR Value 53.6K
SYMBOL CAP 1392 1232 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value .047
SYMBOL RES 1456 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 2K
FLAG 2416 992 0
FLAG 1600 1248 0
FLAG 1520 992 0
FLAG 1824 1248 0
FLAG 1408 1248 0
FLAG 2528 992 0
FLAG 2304 992 0
FLAG 2192 1184 0
FLAG 2528 880 OUT
FLAG 1520 880 IN
TEXT 2232 1224 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1782.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Supply Rail Current Sense
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1782.asy)
Q1 N001 N004 OUT 0 2N3904
I1 N002 0 SINE(1 1 1K)
R2 N001 +V 200
V1 +V 0 10
XU1 N001 N003 +V 0 N004 NC_01 LT1782 ;pnba In+)In-)V+)V-)OUT)SHDN
R3 N003 N002 200
R4 OUT 0 2K
R1 +V N002 .2
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -32 32 -32 16
WIRE 0 32 -32 32
WIRE 128 32 80 32
WIRE 400 32 128 32
WIRE -32 64 -32 32
WIRE -192 112 -192 96
WIRE 192 112 192 96
WIRE 400 144 400 32
WIRE -32 160 -32 144
WIRE 16 160 -32 160
WIRE 160 160 96 160
WIRE 336 192 304 192
WIRE -192 208 -192 192
WIRE 128 224 128 32
WIRE 160 224 128 224
WIRE -32 240 -32 160
WIRE 400 256 400 240
WIRE 448 256 400 256
WIRE 400 272 400 256
WIRE 192 288 192 272
WIRE -32 336 -32 320
WIRE 400 368 400 352
SYMBOL res 96 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL opamps\\LT1782 192 192 R0
SYMATTR InstName U1
SYMBOL npn 336 144 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res -48 48 R0
SYMATTR InstName R1
SYMATTR Value .2
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 200
SYMBOL voltage -192 96 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL current -32 240 R0
SYMATTR InstName I1
SYMATTR Value SINE(1 1 1K)
SYMBOL res 384 256 R0
SYMATTR InstName R4
SYMATTR Value 2K
FLAG -192 208 0
FLAG 192 96 +V
FLAG -192 96 +V
FLAG 192 288 0
FLAG 400 368 0
FLAG -32 336 0
FLAG -32 16 +V
FLAG 448 256 OUT
TEXT 488 320 Left 2 !.tran 3m
TEXT 184 -24 Bottom 2 ;Positive Supply Rail Current Sense
* Z:\home\khalils\Downloads\files\data\raw_asc\3b1512f19a8e_Clipper.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N003 0 0.5
R2 N002 0 100k
D1 N002 N003 D
V1 N001 0 SINE(0 5 1k 0 0 0 0)
R1 N002 N001 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 128 80 64 80
WIRE 240 80 208 80
WIRE 352 80 240 80
WIRE 240 128 240 80
WIRE 64 160 64 80
WIRE 352 160 352 80
WIRE 240 224 240 192
WIRE 64 352 64 240
WIRE 240 352 240 304
WIRE 240 352 64 352
WIRE 352 352 352 240
WIRE 352 352 240 352
SYMBOL voltage 64 144 R0
WINDOW 3 -289 75 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1k 0 0 0 0)
SYMBOL voltage 240 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0.5
SYMBOL res 336 144 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL diode 224 128 R0
SYMATTR InstName D1
SYMBOL res 224 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 352 352 0
TEXT -224 376 Left 2 !.tran 0.01
* Z:\tmp\asc_dec_bjh7r6w2\15926eb2eaab_LT1016_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 PWL(0 0 .5u 5)
R4 N003 0 22
R2 N002 0 4K
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE 336 -16 320 -16
WIRE 416 -16 400 -16
WIRE 224 32 224 16
WIRE 416 96 416 -16
WIRE 432 96 416 96
WIRE 224 128 224 112
WIRE 320 128 224 128
WIRE 416 128 320 128
WIRE 432 128 416 128
WIRE 224 144 224 128
WIRE 320 144 320 128
WIRE 448 176 448 160
WIRE 464 176 464 160
WIRE 464 176 448 176
WIRE 480 176 480 160
WIRE 480 176 464 176
WIRE 464 192 464 176
WIRE 96 208 96 192
WIRE 320 224 320 208
WIRE 224 240 224 224
WIRE 416 240 416 128
WIRE 480 240 416 240
WIRE 96 304 96 288
WIRE 320 320 320 304
SYMBOL voltage 96 192 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 .5u 5)
SYMBOL res 304 208 R0
SYMATTR InstName R4
SYMATTR Value 22
SYMBOL res 208 128 R0
SYMATTR InstName R2
SYMATTR Value 4K
FLAG 96 304 0
FLAG 464 64 +V
FLAG 224 16 +V
FLAG 320 -16 0
FLAG 224 240 0
FLAG 464 192 0
FLAG 320 320 0
FLAG 96 192 +V
* Z:\home\khalils\Downloads\files\data\raw_asc\3d359c4d7a30_AD8047.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8047.asy)
Vin IN 0 SINE(0 1 10Meg)
R1 N001 0 200
V2 -V 0 -5
Rload OUT 0 150
V1 +V 0 5
XU1 IN N001 +V -V OUT AD8047 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 200
.tran 1u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1432 700
WIRE 560 -1184 544 -1184
WIRE 656 -1184 640 -1184
WIRE 672 -1184 656 -1184
WIRE 768 -1184 752 -1184
WIRE 320 -1088 320 -1104
WIRE 416 -1088 416 -1104
WIRE 656 -1072 656 -1184
WIRE 672 -1072 656 -1072
WIRE 768 -1056 768 -1184
WIRE 768 -1056 736 -1056
WIRE 896 -1056 768 -1056
WIRE 672 -1040 560 -1040
WIRE 896 -1040 896 -1056
WIRE 560 -1024 560 -1040
WIRE 320 -992 320 -1008
WIRE 416 -992 416 -1008
WIRE 896 -944 896 -960
WIRE 560 -928 560 -944
SYMBOL voltage 416 -1104 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 320 -1104 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 656 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL res 768 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL Opamps\\AD8047 704 -1120 R0
SYMATTR InstName U1
SYMBOL res 880 -1056 R0
SYMATTR InstName Rload
SYMATTR Value 150
SYMBOL voltage 560 -1040 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10Meg)
FLAG 560 -928 0
FLAG 896 -1056 OUT
FLAG 560 -1040 IN
FLAG 704 -1088 +V
FLAG 704 -1024 -V
FLAG 544 -1184 0
FLAG 896 -944 0
FLAG 320 -1104 +V
FLAG 320 -992 0
FLAG 416 -1104 -V
FLAG 416 -992 0
TEXT 912 -848 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\a046904b9523_Transistor_PNP.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N003 N002 N001 0 2N2907
R1 N003 0 1
R3 N002 0 11.2k
V1 N001 0 12
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1
* PNP Transistor biasing
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 -64 -16 -64
WIRE -16 -32 -16 -64
WIRE 192 16 192 -64
WIRE 272 64 256 64
WIRE 400 64 352 64
WIRE 400 112 400 64
WIRE 192 128 192 112
WIRE 192 288 192 208
FLAG 400 112 0
FLAG 192 288 0
FLAG -16 48 0
SYMBOL pnp 256 112 R180
SYMATTR InstName Q1
SYMATTR Value 2N2907
SYMBOL res 176 112 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL res 256 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 11.2k
SYMBOL voltage -16 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
TEXT 40 152 Right 2 !.tran 1
TEXT 104 -120 Left 2 ;PNP Transistor biasing
* Z:\tmp\asc_dec_bjh7r6w2\064813631dd3_Current_Source_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 0 249k
R2 N005 N006 249k
R5 N002 N003 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1156 680
WIRE 528 80 512 80
WIRE 832 80 608 80
WIRE 576 208 576 176
WIRE 304 224 272 224
WIRE 512 224 512 80
WIRE 512 224 384 224
WIRE 544 224 512 224
WIRE 272 240 272 224
WIRE 736 240 608 240
WIRE 832 240 832 80
WIRE 832 240 816 240
WIRE 928 240 832 240
WIRE 1024 240 1008 240
WIRE 1088 240 1024 240
WIRE 512 256 480 256
WIRE 544 256 512 256
WIRE 512 352 512 256
WIRE 528 352 512 352
WIRE 1024 352 1024 240
WIRE 1024 352 608 352
WIRE 400 384 400 256
SYMBOL res 400 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 249k
SYMBOL res 496 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 249k
SYMBOL res 832 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 100
FLAG 272 240 0
FLAG 576 272 0
FLAG 576 176 VCC