Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\455c5c727fda_Lab04Pt2.asc
* Generated by LTspice 26.0.1 for Windows.
M5 N001 N004 Vout N001 PMOS l=0.1u w=2.65u
M1 Vout N002 X 0 NMOS l=0.1u w=6u
VB N003 0 0
VC N004 0 2.5
M3 N001 N002 Vout N001 PMOS l=0.1u w=2.65u
VA N002 0 2.5
M6 Y N004 0 0 NMOS l=0.1u w=6u
M4 N001 N003 Vout N001 PMOS l=0.1u w=2.65u
M2 X N003 Y 0 NMOS l=0.1u w=6u
V1 N001 0 2.5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model nmos nmos level=1 vto=0.4 kp=432u phi=0.88 gamma=0.2 lambda=0
.model pmos pmos level=1 vto=-0.4 kp=108u phi=0.88 gamma=0.2 lambda=0
.dc V1 0 2.5 0.001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 -80 -112 -80
WIRE 48 -80 -48 -80
WIRE 112 -80 48 -80
WIRE 208 -80 112 -80
WIRE 288 -80 208 -80
WIRE 336 -80 288 -80
WIRE -48 -32 -48 -80
WIRE -48 -32 -112 -32
WIRE 112 -32 112 -80
WIRE 112 -32 48 -32
WIRE 288 -32 288 -80
WIRE 288 -32 208 -32
WIRE -160 0 -176 0
WIRE 0 0 -48 0
WIRE 160 0 144 0
WIRE 48 16 -112 16
WIRE 208 16 48 16
WIRE 144 32 144 0
WIRE 144 32 -64 32
WIRE 208 32 208 16
WIRE 240 32 208 32
WIRE -176 48 -176 0
WIRE -32 48 -176 48
WIRE 48 48 48 16
WIRE 144 96 48 96
WIRE 336 96 336 -80
WIRE -32 128 -32 48
WIRE 0 128 -32 128
WIRE 48 160 48 144
WIRE 80 160 48 160
WIRE -48 176 -48 0
WIRE -48 176 -176 176
WIRE -32 176 -48 176
WIRE 48 176 48 160
WIRE 144 224 144 96
WIRE 144 224 48 224
WIRE -32 256 -32 176
WIRE 0 256 -32 256
WIRE 48 288 48 272
WIRE 80 288 48 288
WIRE -64 304 -64 32
WIRE -64 304 -176 304
WIRE -32 304 -64 304
WIRE 48 304 48 288
WIRE 144 352 144 224
WIRE 144 352 48 352
WIRE -32 384 -32 304
WIRE 0 384 -32 384
WIRE 144 400 144 352
WIRE 336 400 336 176
WIRE 336 400 144 400
WIRE 48 416 48 400
WIRE 144 416 144 400
WIRE 144 416 48 416
WIRE 48 432 48 416
IOPIN 80 160 Out
IOPIN 80 288 Out
IOPIN 240 32 Out
SYMBOL voltage -176 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VA
SYMATTR Value 2.5
SYMBOL pmos4 -160 -80 R0
SYMATTR InstName M3
SYMATTR Value2 l=0.1u w=2.65u
SYMBOL nmos4 0 176 R0
SYMATTR InstName M2
SYMATTR Value2 l=0.1u w=6u
SYMBOL nmos4 0 304 R0
SYMATTR InstName M6
SYMATTR Value2 l=0.1u w=6u
SYMBOL voltage -176 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value 0
SYMBOL nmos4 0 48 R0
SYMATTR InstName M1
SYMATTR Value2 l=0.1u w=6u
SYMBOL pmos4 0 -80 R0
SYMATTR InstName M4
SYMATTR Value2 l=0.1u w=2.65u
SYMBOL pmos4 160 -80 R0
SYMATTR InstName M5
SYMATTR Value2 l=0.1u w=2.65u
SYMBOL voltage 336 80 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage -176 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VC
SYMATTR Value 2.5
FLAG 48 432 0
FLAG -176 384 0
FLAG 80 160 X
FLAG 80 288 Y
FLAG 240 32 Vout
FLAG -176 128 0
FLAG -176 256 0
TEXT -368 488 Left 2 !.model nmos nmos level=1 vto=0.4 kp=432u phi=0.88 gamma=0.2 lambda=0
TEXT -368 512 Left 2 !.model pmos pmos level=1 vto=-0.4 kp=108u phi=0.88 gamma=0.2 lambda=0
TEXT -368 536 Left 2 !.dc V1 0 2.5 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX4233.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX4233.asy)
CL OUT 0 15p
V1 IN 0 SINE(0 50m 10k)
Vee 0 Vee 2.5
RL OUT 0 100k
Vcc Vcc 0 2.5
XU1 IN OUT Vcc Vee OUT Vcc MAX4233 ;pnba In+)In-)V+)V-)OUT)SHDN
.tran 100u
.lib MAX4233.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 64 288 64 272
WIRE 416 352 416 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 64 448 64 400
WIRE 416 448 416 416
WIRE 448 448 448 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 64 544 64 528
WIRE 304 592 304 576
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL MAX4233 432 400 R0
SYMATTR InstName U1
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 100k
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 10k)
FLAG 720 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
FLAG 448 448 Vcc
TEXT 16 632 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4367.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4367.asy)
MQ2 OUT N002 N001 N001 Si7942DP
Rload OUT 0 6
C1 OUT 0 10
MQ1 IN N002 N001 N001 Si7942DP
R4 N006 0 29.4K
R1 IN N003 464K
V1 IN 0 PWL(0 -40 200m -40 2.1 70)
R5 OUT N005 10K
R2 N003 N004 1500K
R3 N004 N006 121K
XU1 0 N006 N004 IN N002 OUT N005 N003 LTC4367 ;pnba GND)OV)UV)Vin)GATE)Vout)_FAULT)_SHDN
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 2.2
.lib LTC4367.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3088 804
WIRE -224 -48 -688 -48
WIRE -48 -48 -224 -48
WIRE 32 -48 -48 -48
WIRE 160 -48 128 -48
WIRE 368 -48 256 -48
WIRE 432 -48 368 -48
WIRE 496 -48 432 -48
WIRE 624 -48 496 -48
WIRE -688 -32 -688 -48
WIRE -224 -32 -224 -48
WIRE 496 -32 496 -48
WIRE 624 -32 624 -48
WIRE 112 32 112 0
WIRE 144 32 112 32
WIRE 176 32 176 0
WIRE 176 32 144 32
WIRE 144 48 144 32
WIRE -688 64 -688 48
WIRE -224 64 -224 48
WIRE -80 64 -224 64
WIRE 496 64 496 32
WIRE 624 64 624 48
WIRE -224 80 -224 64
WIRE -48 112 -48 -48
WIRE -16 112 -48 112
WIRE 368 112 368 -48
WIRE 368 112 288 112
WIRE 432 144 432 -48
WIRE -224 176 -224 160
WIRE -112 176 -224 176
WIRE -80 176 -80 64
WIRE -16 176 -80 176
WIRE -224 208 -224 176
WIRE -112 240 -112 176
WIRE -16 240 -112 240
WIRE 432 240 432 224
WIRE 432 240 288 240
WIRE -224 304 -224 288
WIRE -16 304 -224 304
WIRE -224 320 -224 304
WIRE 144 368 144 352
WIRE -224 416 -224 400
SYMBOL nmos 256 0 M270
WINDOW 0 53 50 VTop 2
WINDOW 3 -16 72 VLeft 2
SYMATTR InstName Q2
SYMATTR Value Si7942DP
SYMBOL cap 480 -32 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res -240 64 R0
SYMATTR InstName R2
SYMATTR Value 1500K
SYMBOL LTC4367 144 272 R0
SYMATTR InstName U1
SYMBOL res -240 304 R0
SYMATTR InstName R4
SYMATTR Value 29.4K
SYMBOL res 416 128 R0
SYMATTR InstName R5
SYMATTR Value 10K
SYMBOL res 608 -48 R0
SYMATTR InstName Rload
SYMATTR Value 6
SYMBOL nmos 32 0 R270
WINDOW 0 56 49 VTop 2
WINDOW 3 -16 67 VLeft 2
SYMATTR InstName Q1
SYMATTR Value Si7942DP
SYMBOL voltage -688 -48 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR Value PWL(0 -40 200m -40 2.1 70)
SYMATTR InstName V1
SYMBOL res -240 -48 R0
SYMATTR InstName R1
SYMATTR Value 464K
SYMBOL res -240 192 R0
SYMATTR InstName R3
SYMATTR Value 121K
FLAG -688 -48 IN
FLAG 624 -48 OUT
FLAG 144 368 0
FLAG -688 64 0
FLAG -224 416 0
FLAG 624 64 0
FLAG 496 64 0
TEXT 488 376 Left 2 !.tran 2.2
* Z:\home\khalils\Downloads\files\data\raw_asc\1a6935f954fd_Simulazione_LT1719_condizionata.asc
* Generated by LTspice 26.0.1 for Windows.
* Vs = Tensione di soglia
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1719.asy)
D1 Vsig Vin RB511VM-30
R3 Vin 0 180
C1 Vin 0 50p
XU1 3V3 Vin Vs 0 0 0 OUT 3V3 LT1719 ;pnba V+)In+)In-)V-)GND)SHDN)OUT)VS+
R2 Vsig 0 47
Vs Vs 0 0.1
V2 Vsig 0 PULSE(0 {Vmax} 0 1n 1n 1n 0 1)
V1 3V3 0 3.3
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 50n
.step param Vmax 500m 2 500m
.lib opamp.sub
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 -256 -64 -304
WIRE 160 -256 160 -304
WIRE -64 -144 -64 -176
WIRE 160 -144 160 -176
WIRE -672 96 -704 96
WIRE -608 96 -672 96
WIRE -512 96 -608 96
WIRE -368 96 -448 96
WIRE -320 96 -368 96
WIRE -272 96 -320 96
WIRE 176 112 176 80
WIRE 192 112 176 112
WIRE 128 128 96 128
WIRE 176 128 176 112
WIRE 192 128 192 112
WIRE -704 144 -704 96
WIRE -608 144 -608 96
WIRE -368 144 -368 96
WIRE -272 144 -272 96
WIRE 128 144 128 128
WIRE 144 144 128 144
WIRE 304 160 208 160
WIRE 144 176 96 176
WIRE 160 208 160 192
WIRE 176 208 176 192
WIRE 176 208 160 208
WIRE 192 208 192 192
WIRE 192 208 176 208
WIRE 176 224 176 208
WIRE -704 256 -704 224
WIRE -656 256 -704 256
WIRE -608 256 -608 224
WIRE -608 256 -656 256
WIRE -368 256 -368 224
WIRE -304 256 -368 256
WIRE -272 256 -272 208
WIRE -272 256 -304 256
WIRE -656 288 -656 256
WIRE -304 288 -304 256
SYMBOL res -384 128 R0
SYMATTR InstName R3
SYMATTR Value 180
SYMBOL cap -288 144 R0
SYMATTR InstName C1
SYMATTR Value 50p
SYMBOL Comparators\\LT1719 176 96 R0
SYMATTR InstName U1
SYMBOL voltage -64 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vs
SYMATTR Value 0.1
SYMBOL res -624 128 R0
SYMATTR InstName R2
SYMATTR Value 47
SYMBOL schottky -512 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value RB511VM-30
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage 160 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage -704 128 R0
WINDOW 3 -131 -131 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 {Vmax} 0 1n 1n 1n 0 1)
SYMATTR InstName V2
FLAG 176 224 0
FLAG 160 -144 0
FLAG 160 -304 3V3
FLAG 176 80 3V3
FLAG 304 160 OUT
FLAG -656 288 0
FLAG -672 96 Vsig
FLAG 96 176 Vin
FLAG -64 -144 0
FLAG -64 -304 Vs
FLAG 96 128 Vs
FLAG -304 288 0
FLAG -320 96 Vin
TEXT -824 -208 Left 2 !.tran 50n
TEXT -200 -88 Left 2 ;Vs = Tensione di soglia
TEXT -824 -152 Left 2 !.step param Vmax 500m 2 500m
TEXT -824 -104 Left 2 !.lib opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4097-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4097-1.asy)
Vin IN 0 SINE(0 10m 1k)
R1 N001 0 1k
R2 OUT N001 1k
XU1 IN N001 +V -V OUT NC_01 ADA4097-1 ;pnba In+)In-)V+)V-)OUT)SD
V2 -V 0 -5
V1 +V 0 5
R3 OUT 0 10k
C1 OUT 0 10p
.tran 2m
.lib ADA4097-1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 752 -1216 624 -1216
WIRE 160 -1152 160 -1168
WIRE 272 -1152 272 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 704 -1104 608 -1104
WIRE 752 -1104 752 -1216
WIRE 752 -1104 704 -1104
WIRE 848 -1104 752 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 848 -1072 848 -1104
WIRE 560 -1056 560 -1072
WIRE 160 -1040 160 -1072
WIRE 272 -1040 272 -1072
WIRE 432 -976 432 -992
WIRE 752 -976 752 -1008
WIRE 848 -976 848 -1008
SYMBOL voltage 272 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 160 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 832 -1072 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 10m 1k)
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL OpAmps\\ADA4097-1 576 -1104 R0
SYMATTR InstName U1
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 736 -1104 R0
SYMATTR InstName R3
SYMATTR Value 10k
FLAG 160 -1168 +V
FLAG 432 -976 0
FLAG 704 -1104 OUT
FLAG 432 -1088 IN
FLAG 560 -1136 +V
FLAG 272 -1168 -V
FLAG 560 -1056 -V
FLAG 416 -1216 0
FLAG 272 -1040 0
FLAG 160 -1040 0
FLAG 752 -976 0
FLAG 848 -976 0
TEXT 680 -936 Left 2 !.tran 2m
* Z:\tmp\asc_dec_bjh7r6w2\0f9496cd191d_1992_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 2.7
C2 N006 0 10p
R4 N006 N008 30K
C1 N002 0 10p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 768
WIRE 320 336 192 336
WIRE 432 336 400 336
WIRE 496 368 496 352
WIRE -272 432 -272 400
WIRE -160 432 -160 400
WIRE 208 432 192 432
WIRE 432 448 432 336
WIRE 432 448 368 448
WIRE 496 448 496 432
WIRE 496 448 432 448
WIRE 208 464 192 464
WIRE 208 496 192 496
WIRE 432 512 368 512
WIRE 496 512 432 512
WIRE 208 528 192 528
WIRE 496 528 496 512
WIRE -272 544 -272 512
WIRE -160 544 -160 512
WIRE 240 576 240 560
WIRE 496 608 496 592
WIRE 304 624 192 624
WIRE 432 624 432 512
WIRE 432 624 384 624
SYMBOL voltage -272 416 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.7
SYMBOL cap 480 528 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL res 400 608 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 30K
SYMBOL cap 480 432 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 10p
FLAG -272 544 0
FLAG -160 544 0
FLAG -272 400 +V
FLAG -160 400 -V
FLAG 496 352 0
FLAG 496 608 0
FLAG 240 576 -V
* Z:\home\khalils\Downloads\files\data\raw_asc\fa85138c9744_lpf.asc
* Generated by LTspice 26.0.1 for Windows.
* .op
* .tran 1u 10m
R1 N001 N004 20k
V3 N006 0 -3
R3 N002 0 330
R2 N005 N001 20k
C3 N005 N007 2n Rser=52.5m Lser=416p mfg=" ---" pn=" ---" type=" ---"
V4 N003 0 6
V1 N007 0 1.6
C1 N002 N001 2n Rser=52.6m Lser=228p mfg=" ---" pn=" ---" type=" ---"
XU1 N005 N002 N003 N006 N002 TL074 ;pnba In+)In-)V+)V-)OUT
V2 N004 0 SINE(1.6 1.6 500) AC 1.6
.ac dec 100 10 100k
.lib TL074.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1680
WIRE 240 992 192 992
WIRE 176 1008 192 992
WIRE 240 1008 240 992
WIRE 48 1184 -32 1184
WIRE 256 1184 112 1184
WIRE 256 1296 256 1184
WIRE 256 1296 96 1296
WIRE 176 1328 176 1088
WIRE 96 1344 96 1296
WIRE 144 1344 96 1344
WIRE 256 1360 256 1296
WIRE 256 1360 208 1360
WIRE 288 1360 256 1360
WIRE -176 1376 -272 1376
WIRE -32 1376 -32 1184
WIRE -32 1376 -96 1376
WIRE 16 1376 -32 1376
WIRE 112 1376 96 1376
WIRE 144 1376 112 1376
WIRE 224 1392 176 1392
WIRE -272 1408 -272 1376
WIRE 288 1424 288 1360
WIRE 112 1472 112 1376
WIRE 112 1584 112 1536
WIRE 224 1584 224 1392
SYMBOL Res 272 1408 R0
SYMATTR InstName R3
SYMATTR Value 330
SYMBOL Res 112 1360 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 20k
SYMBOL voltage -272 1392 R0
SYMATTR InstName V2
SYMATTR Value SINE(1.6 1.6 500)
SYMATTR Value2 AC 1.6
SYMBOL voltage 176 1104 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V4
SYMATTR Value 6
SYMBOL voltage 224 1568 R0
SYMATTR InstName V3
SYMATTR Value -3
SYMBOL cap 96 1472 R0
SYMATTR InstName C3
SYMATTR Value 2n
SYMATTR SpiceLine Rser=52.5m Lser=416p mfg="   ---" pn="   ---" type="   ---"
SYMBOL cap 112 1168 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2n
SYMATTR SpiceLine Rser=52.6m Lser=228p mfg="   ---" pn="   ---" type="   ---"
SYMBOL OpAmps/opamp2 176 1296 R0
SYMATTR InstName U1
SYMATTR Value TL074
SYMBOL Res -80 1360 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20k
SYMBOL voltage 112 1568 R0
SYMATTR InstName V1
SYMATTR Value 1.6
FLAG -272 1488 0
FLAG 112 1664 0
FLAG 224 1664 0
FLAG 240 1008 0
FLAG 288 1504 0
TEXT -144 1568 Left 2 !.ac dec 100 10 100k
TEXT -144 1608 Left 2 ;.op
TEXT -144 1656 Left 2 ;.tran 1u 10m
TEXT -280 1024 Left 2 !.lib TL074.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1424-9.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1424-9.asy)
Rload OUT 0 50
L2 0 N001 20
L1 IN N003 20
D1 N001 OUT MBRS130L
V1 IN 0 6
K1 L1 L2 1
C3 OUT 0 10 Rser=.1
C2 N005 0 .1
C1 N004 0 1000p
XU1 N002 N004 MP_01 0 0 N003 IN N005 LT1424-9 ;pnba _SHDN)Vc))SGND)PGND)SW)Vin)Rccomp
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
.lib LT1424-9.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2392 832
WIRE 1424 304 1136 304
WIRE 1680 304 1424 304
WIRE 1808 304 1728 304
WIRE 1936 304 1872 304
WIRE 2016 304 1936 304
WIRE 1136 320 1136 304
WIRE 1680 336 1680 304
WIRE 1728 336 1728 304
WIRE 1936 336 1936 304
WIRE 2016 336 2016 304
WIRE 1424 352 1424 304
WIRE 1136 416 1136 400
WIRE 1264 448 1232 448
WIRE 1680 448 1680 416
WIRE 1680 448 1584 448
WIRE 1728 448 1728 416
WIRE 1936 448 1936 400
WIRE 2016 448 2016 416
WIRE 1168 544 1152 544
WIRE 1264 544 1232 544
WIRE 1600 544 1584 544
WIRE 1680 544 1664 544
WIRE 1328 672 1328 640
WIRE 1520 672 1520 640
SYMBOL ind2 1664 320 R0
WINDOW 0 -3 39 Right 2
WINDOW 3 -4 70 Right 2
SYMATTR InstName L1
SYMATTR Value 20
SYMBOL ind2 1744 432 R180
WINDOW 0 -4 72 Right 2
WINDOW 3 -5 45 Right 2
SYMATTR InstName L2
SYMATTR Value 20
SYMBOL cap 1600 560 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL schottky 1808 320 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS130L
SYMBOL PowerProducts\\LT1424-9 1424 496 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1136 304 R0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL cap 1232 528 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000p
SYMBOL polcap 1920 336 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMATTR SpiceLine Rser=.1
SYMBOL res 2000 320 R0
SYMATTR InstName Rload
SYMATTR Value 50
FLAG 1136 416 0
FLAG 1680 544 0
FLAG 1520 672 0
FLAG 1328 672 0
FLAG 1152 544 0
FLAG 1936 448 0
FLAG 2016 448 0
FLAG 1728 448 0
FLAG 2016 304 OUT
FLAG 1136 304 IN
TEXT 1704 304 Bottom 2 !K1 L1 L2 1
TEXT 1824 536 Left 2 !.tran 2m startup
* Z:\tmp\asc_dec_bjh7r6w2\043fdc83e779_MAX9638_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
RL OUT 0 10k
V1 IN 0 SINE(0 50m 10k)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 416 352 416 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 400 400 304 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 416 448 416 416
WIRE 448 448 448 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 304 592 304 576
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 10k
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 10k)
FLAG 720 384 OUT
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
FLAG 448 448 Vcc
* Z:\home\khalils\Downloads\files\data\raw_asc\3a891c7e986d_SeparadorDePolaridad.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N001 +15 -15 N002 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
D1 Vo+ N002 1N4148
D2 N002 Vo- 1N4148
R1 Vo+ N001 1k
R2 Vo- N001 1k
V1 +15 0 15
V2 0 -15 15
V3 Vi 0 SINE(0 1 1k) Rser=50
R3 N001 Vi 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 2m 500p
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 32 64 32
WIRE 272 32 160 32
WIRE 272 48 272 32
WIRE -304 64 -304 32
WIRE 192 144 192 128
WIRE -64 160 -128 160
WIRE 64 160 64 32
WIRE 64 160 16 160
WIRE 160 160 64 160
WIRE -304 176 -304 144
WIRE -208 176 -304 176
WIRE 272 176 272 112
WIRE 272 176 224 176
WIRE -208 192 -208 176
WIRE -128 192 -128 160
WIRE 160 192 128 192
WIRE -304 208 -304 176
WIRE 192 224 192 208
WIRE 128 240 128 192
WIRE 272 240 272 176
WIRE -128 320 -128 272
WIRE -304 336 -304 288
WIRE 64 352 64 160
WIRE 80 352 64 352
WIRE 272 352 272 304
WIRE 272 352 160 352
FLAG 128 240 0
FLAG -208 192 0
FLAG -304 32 +15
FLAG -304 336 -15
FLAG 192 128 +15
FLAG 192 224 -15
FLAG -128 320 0
FLAG 272 32 Vo+
FLAG 272 352 Vo-
FLAG -128 160 Vi
SYMBOL OpAmps\\UniversalOpAmp 192 176 R0
SYMATTR InstName U1
SYMBOL diode 256 48 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL diode 256 240 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL res 176 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 176 336 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -304 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -304 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage -128 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1k)
SYMBOL res 32 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1k
TEXT -336 424 Left 2 !.tran 0 2m 500p
* Z:\home\khalils\Downloads\files\data\raw_asc\logamp.asc
* Generated by LTspice 26.0.1 for Windows.
* Log amp
* This example schematic is supplied for informational/educational purposes only.
Q2 N004 N004 N002 0 2N3904
R1 N001 IN 1K
R3 OUT N003 15K
R2 N003 0 1K
C1 N002 N001 30p
B1 IN 0 V=exp(time-7)
Q1 N001 0 N002 0 2N3904
XU2 N003 N004 OUT opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
XU1 N001 0 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
D1 N002 N001 1N4148
I1 0 N004 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 10
.include opamp.sub
.options maxstep=2m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 5945676 13421556
WIRE 1472 -304 1440 -304
WIRE 1568 -304 1536 -304
WIRE 1440 -192 1440 -304
WIRE 1472 -192 1440 -192
WIRE 1568 -192 1568 -304
WIRE 1568 -192 1536 -192
WIRE 1440 -112 1440 -192
WIRE 1456 -112 1440 -112
WIRE 1568 -112 1568 -192
WIRE 1568 -112 1552 -112
WIRE 1712 -48 1696 -48
WIRE 1808 -48 1792 -48
WIRE 1840 -48 1808 -48
WIRE 1936 -48 1920 -48
WIRE 1808 48 1808 -48
WIRE 1824 48 1808 48
WIRE 1328 64 1216 64
WIRE 1440 64 1440 -112
WIRE 1440 64 1408 64
WIRE 1472 64 1440 64
WIRE 1936 64 1936 -48
WIRE 1936 64 1888 64
WIRE 1952 64 1936 64
WIRE 1216 80 1216 64
WIRE 1568 80 1568 -112
WIRE 1568 80 1536 80
WIRE 1600 80 1568 80
WIRE 1712 80 1696 80
WIRE 1760 80 1712 80
WIRE 1824 80 1760 80
WIRE 1472 96 1456 96
WIRE 1760 128 1760 80
WIRE 1712 144 1712 80
WIRE 1712 144 1648 144
WIRE 1216 176 1216 160
WIRE 1760 240 1760 208
SYMBOL OPAMPS\\OPAMP 1856 0 R0
SYMATTR InstName U2
SYMBOL res 1808 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL CURRENT 1760 208 M180
WINDOW 0 24 88 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName I1
SYMATTR Value 100
SYMBOL OPAMPS\\OPAMP 1504 16 R0
SYMATTR InstName U1
SYMBOL diode 1536 -208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL NPN 1456 -48 R270
WINDOW 0 52 48 VCenter 2
WINDOW 3 -34 49 VCenter 2
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL RES 1424 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL cap 1536 -320 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 30p
SYMBOL npn 1696 144 M270
WINDOW 0 62 46 VCenter 2
WINDOW 3 -22 49 VCenter 2
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL BV 1216 64 R0
SYMATTR InstName B1
SYMATTR Value V=exp(time-7)
SYMBOL res 1936 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 15K
FLAG 1216 176 0
FLAG 1504 -48 0
FLAG 1456 96 0
FLAG 1760 240 0
FLAG 1696 -48 0
FLAG 1952 64 OUT
FLAG 1216 64 IN
TEXT 1872 136 Left 2 !.tran 10
TEXT 1416 256 Left 2 !.include opamp.sub
TEXT 1408 224 Left 2 !.options maxstep=2m
TEXT 1656 -256 Left 2 ;Log amp
TEXT 1552 280 Top 1 ;This example schematic is supplied for informational/educational purposes only.