Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\29245fd77ee8_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
R3 N004 N005 {R1}
C2 0 N003 {Cl}
C1 N002 N001 {Ch}
R1 N002 0 {Rh}
R2 N003 N002 {Rl}
R4 N005 0 {R2}
XU1 N003 N005 N006 0 N004 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V2 N006 0 5
V1 N001 0 AC 1 0
.param Ch=0.1u Rh=10k Rl=10k Cl=0.1u
.param R1=10k R2=10k
.ac dec 1000 0.01 20
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 916 680
WIRE 128 -64 16 -64
WIRE 272 -64 192 -64
WIRE 352 -64 272 -64
WIRE 480 -64 432 -64
WIRE 560 -64 480 -64
WIRE 560 -32 560 -64
WIRE 688 -32 560 -32
WIRE 816 -16 752 -16
WIRE 912 -16 816 -16
WIRE 16 0 16 -64
WIRE 688 0 656 0
WIRE 272 16 272 -64
WIRE 816 16 816 -16
WIRE 480 32 480 -64
WIRE 656 96 656 0
WIRE 816 96 656 96
WIRE 16 128 16 80
WIRE 272 128 272 96
WIRE 272 128 16 128
WIRE 480 128 480 96
WIRE 480 128 272 128
WIRE 16 144 16 128
WIRE 720 176 720 16
SYMBOL res 800 80 R0
SYMATTR InstName R4
SYMATTR Value {R2}
SYMBOL voltage 16 -16 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMBOL OpAmps\\UniversalOpamp 720 -16 M180
SYMATTR InstName U1
SYMBOL res 800 0 R0
SYMATTR InstName R3
SYMATTR Value {R1}
SYMBOL res 256 0 R0
SYMATTR InstName R1
SYMATTR Value {Rh}
SYMBOL voltage 720 160 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL cap 192 -80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {Ch}
SYMBOL cap 496 96 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value {Cl}
SYMBOL res 448 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {Rl}
FLAG 16 144 0
FLAG 816 176 0
FLAG 720 256 0
FLAG 720 -48 0
TEXT -48 232 Left 2 !.param Ch=0.1u Rh=10k Rl=10k Cl=0.1u
TEXT -40 272 Left 2 !.param R1=10k R2=10k
TEXT -40 312 Left 2 !.ac dec 1000 0.01 20
* Z:\home\khalils\Downloads\files\data\raw_asc\2cedc5ce6258_AD8565.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8565.asy)
Vin IN 0 SINE(0 1 10K)
R2 OUT N001 10K
V2 -V 0 -15
Rload OUT 0 10K
V1 +V 0 15
R1 N001 0 10K
XU1 IN N001 +V -V OUT AD8565 ;pnba In+)In-)V+)V-)OUT
.tran 1m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL AD8565 576 -1168 R0
SYMATTR InstName U1
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
TEXT 704 -960 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3008-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3008-1.8.asy)
V1 IN 0 PWL(0 0 1 10)
XU1 IN OUT OUT 0 IN LT3008-1.8 ;pnba IN)OUT)Sense)GND)_SHDN
C1 OUT 0 1
Rload OUT 0 180
.tran 1
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL PowerProducts\\LT3008-1.8 176 96 R0
SYMATTR InstName U1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 180
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 336 248 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2139-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
L1 N001 OUT 1 Rser=60m
Rload OUT 0 3
C1 OUT 0 10
XU1 IN IN N001 OUT 0 IN ADP2139-x.x Rtop=160K ;pnba Vin)EN)SW)Vout)GND)Mode
.tran .5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2139-1.5.asy)
.lib ADP2139-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 192 224 192 144
WIRE 208 224 192 224
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 224
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=60m
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 3
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ADP2139-1.5 352 224 R0
SYMATTR InstName U1
TEXT 600 352 Left 2 !.tran .5m startup
* Z:\tmp\asc_dec_bjh7r6w2\06e6db310b37_ADC_R_2R_bit_1__mismatch_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
S3 N001 Vrefp Bin Vtrip switmod
R1 N002 N001 20.1k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2740 696
WIRE 944 -752 912 -752
WIRE 1008 -784 912 -784
WIRE 1008 -784 1008 -864
WIRE 1008 -688 1008 -784
WIRE 1024 -864 1008 -864
WIRE 1024 -752 944 -752
WIRE 1024 -752 1024 -816
WIRE 1024 -736 1024 -752
WIRE 1024 -688 1008 -688
WIRE 1072 -928 1008 -928
WIRE 1072 -880 1072 -928
WIRE 1072 -784 1072 -800
WIRE 1072 -752 1072 -784
WIRE 1072 -624 1008 -624
WIRE 1072 -624 1072 -672
WIRE 1280 -784 1072 -784
WIRE 1408 -784 1360 -784
WIRE 1408 -768 1408 -784
WIRE 1408 -640 1408 -688
WIRE 1584 -784 1408 -784
WIRE 1584 -640 1408 -640
SYMBOL sw 1072 -784 M180
WINDOW 3 24 -12 Left 0
WINDOW 38 39 67 Left 0
WINDOW 0 38 33 Left 0
SYMATTR Value ""
SYMATTR SpiceModel switmod
SYMATTR InstName S3
SYMBOL res 1376 -800 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 20.1k
FLAG 1008 -624 Vrefm
FLAG 1008 -928 Vrefp
FLAG 912 -784 Bin
FLAG 944 -752 Vtrip
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1083-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1083-5.asy)
C1 OUT 0 10
Rload OUT 0 10
V1 IN 0 PWL(0 0 1 10) Rser=0.1
XU1 0 OUT IN LT1083-5 ;pnba GND)OUT)IN
.tran 1
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1344 896
WIRE 1904 896 1808 896
WIRE 2016 896 1904 896
WIRE 1344 912 1344 896
WIRE 2016 912 2016 896
WIRE 1904 928 1904 896
WIRE 1344 1008 1344 992
WIRE 1904 1008 1904 992
WIRE 2016 1008 2016 992
WIRE 1680 1024 1680 992
SYMBOL PowerProducts\\LT1083-5 1680 896 R0
SYMATTR InstName U1
SYMBOL RES 2000 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL VOLTAGE 1344 896 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMATTR SpiceLine Rser=0.1
SYMBOL cap 1888 928 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 2016 896 OUT
FLAG 2016 1008 0
FLAG 1344 1008 0
FLAG 1904 1008 0
FLAG 1344 896 IN
FLAG 1680 1024 0
TEXT 1920 1064 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6261.asc
* Generated by LTspice 26.0.1 for Windows.
* Third Order Butterworth Filter
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6261.asy)
C3 N003 0 470p
V1 +V 0 3.3
R1 N002 N001 5.54K
V4 N004 0 1.5
C2 OUT N002 47p
R2 OUT N001 15.4K
R3 N001 N003 7.7K
C1 N001 0 470p
R4 N003 IN 7.7K
V3 IN 0 1.5 AC 1
XU1 N004 N002 OUT +V 0 +V LTC6261 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN_L
.ac oct 8 1K 2Meg
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4472 1028
WIRE -2752 -576 -2864 -576
WIRE -2464 -576 -2672 -576
WIRE -3200 -528 -3200 -544
WIRE -2608 -496 -2704 -496
WIRE -2464 -496 -2464 -576
WIRE -2464 -496 -2544 -496
WIRE -3200 -432 -3200 -448
WIRE -2624 -400 -2624 -416
WIRE -3136 -352 -3200 -352
WIRE -3024 -352 -3056 -352
WIRE -2976 -352 -3024 -352
WIRE -2864 -352 -2864 -576
WIRE -2864 -352 -2896 -352
WIRE -2816 -352 -2864 -352
WIRE -2704 -352 -2704 -496
WIRE -2704 -352 -2736 -352
WIRE -2656 -352 -2704 -352
WIRE -3200 -336 -3200 -352
WIRE -3024 -320 -3024 -352
WIRE -2864 -320 -2864 -352
WIRE -2464 -320 -2464 -496
WIRE -2464 -320 -2512 -320
WIRE -2432 -320 -2464 -320
WIRE -2656 -288 -2720 -288
WIRE -2720 -272 -2720 -288
WIRE -3200 -240 -3200 -256
WIRE -3024 -224 -3024 -256
WIRE -2864 -224 -2864 -256
WIRE -2720 -176 -2720 -192
SYMBOL voltage -3200 -352 R0
WINDOW 123 32 96 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 47 60 Left 2
SYMATTR Value2 AC 1
SYMATTR Value 1.5
SYMATTR InstName V3
SYMBOL res -2656 -592 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 15.4K
SYMBOL cap -3040 -320 R0
SYMATTR InstName C3
SYMATTR Value 470p
SYMBOL cap -2544 -512 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 47p
SYMBOL res -2720 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5.54K
SYMBOL cap -2880 -320 R0
SYMATTR InstName C1
SYMATTR Value 470p
SYMBOL res -3040 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 7.7K
SYMBOL LTC6261 -2624 -320 R0
SYMATTR InstName U1
SYMBOL voltage -3200 -544 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage -2720 -288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 1.5
SYMBOL res -2880 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 7.7K
FLAG -3200 -432 0
FLAG -3200 -544 +V
FLAG -3200 -240 0
FLAG -2432 -320 OUT
FLAG -2864 -224 0
FLAG -3024 -224 0
FLAG -2720 -176 0
FLAG -2624 -240 0
FLAG -2624 -416 +V
FLAG -2576 -240 +V
FLAG -3200 -352 IN
TEXT -2808 -632 Bottom 2 ;Third Order Butterworth Filter
TEXT -2480 -144 Left 2 !.ac oct 8 1K 2Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8504.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8504.asy)
Rload OUT 0 1Meg
V1 +V 0 2.5
Vin IN 0 SINE(0 100m 100)
R1 N001 0 10K
R2 OUT N001 10K
V2 -V 0 -2.5
XU1 IN N001 +V -V OUT AD8504 ;pnba In+)In-)V+)V-)OUT
.tran 20m
.lib AD8504.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE 448 -1088 432 -1088
WIRE 544 -1088 528 -1088
WIRE 560 -1088 544 -1088
WIRE 656 -1088 640 -1088
WIRE 192 -992 192 -1008
WIRE 288 -992 288 -1008
WIRE 544 -976 544 -1088
WIRE 560 -976 544 -976
WIRE 656 -960 656 -1088
WIRE 656 -960 624 -960
WIRE 768 -960 656 -960
WIRE 560 -944 448 -944
WIRE 768 -944 768 -960
WIRE 448 -928 448 -944
WIRE 192 -896 192 -912
WIRE 288 -896 288 -912
WIRE 768 -848 768 -864
WIRE 448 -832 448 -848
SYMBOL voltage 288 -1008 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL voltage 192 -1008 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 752 -960 R0
SYMATTR InstName Rload
SYMATTR Value 1Meg
SYMBOL voltage 448 -944 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 100m 100)
SYMBOL res 656 -1104 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL AD8504 592 -1024 R0
SYMATTR InstName U1
SYMBOL res 544 -1104 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 192 -1008 +V
FLAG 192 -896 0
FLAG 448 -832 0
FLAG 768 -960 OUT
FLAG 448 -944 IN
FLAG 592 -992 +V
FLAG 288 -1008 -V
FLAG 592 -928 -V
FLAG 432 -1088 0
FLAG 768 -848 0
FLAG 288 -896 0
TEXT 704 -808 Left 2 !.tran 20m
* Z:\home\khalils\Downloads\files\data\raw_asc\418a9be28039_boost-converter-ideal.asc
* Generated by LTspice 26.0.1 for Windows.
* Vgs(th) = 3.5 [2.0 to 4.0]
* Voltage in source will be 3.5V greater than voltage in gate
* S
* D
* G
L1 vcc out 100 Rser=0.35
R1 N002 0 0.01
V2 vcc 0 12
M1 out g N002 N002 IRFZ44N
V1 g 0 PULSE(0 10 10u 1n 1n {P * D} {P}) Rser=560
C1 N001 0 100
D1 out N001 D
R2 N001 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran {P * 100}
.param F 26k
.param P {1 / F}
.param D 0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 948 680
WIRE 416 32 -48 32
WIRE 512 32 416 32
WIRE -48 64 -48 32
WIRE 512 96 512 32
WIRE -48 192 -48 144
WIRE 512 208 512 176
WIRE 576 208 512 208
WIRE 608 208 576 208
WIRE 720 208 672 208
WIRE 832 208 720 208
WIRE 512 240 512 208
WIRE 432 256 224 256
WIRE 448 256 432 256
WIRE 720 256 720 208
WIRE 832 272 832 208
WIRE 224 288 224 256
WIRE 448 320 448 256
WIRE 464 320 448 320
WIRE 512 368 512 336
WIRE 720 384 720 336
WIRE 832 384 832 336
WIRE 224 432 224 368
WIRE 512 496 512 448
SYMBOL voltage 224 272 R0
WINDOW 3 -384 109 Left 2
WINDOW 39 -304 147 Left 2
SYMATTR Value PULSE(0 10 10u 1n 1n {P * D} {P})
SYMATTR SpiceLine Rser=560
SYMATTR InstName V1
SYMBOL ind 496 80 R0
SYMATTR InstName L1
SYMATTR Value 100u
SYMATTR SpiceLine Rser=0.35
SYMBOL Diode 608 192 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL nmos 464 240 R0
SYMATTR InstName M1
SYMATTR Value IRFZ44N
SYMBOL Cap 816 272 R0
SYMATTR InstName C1
SYMATTR Value 100u
SYMBOL voltage -48 48 R0
WINDOW 39 24 38 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL Res 704 240 R0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL Res 496 352 R0
SYMATTR InstName R1
SYMATTR Value 0.01
FLAG 224 432 0
FLAG -48 192 0
FLAG 512 496 0
FLAG 576 208 out
FLAG 432 256 g
FLAG 832 384 0
FLAG 720 384 0
FLAG 416 32 vcc
TEXT 688 48 Left 2 !.tran {P * 100}
TEXT 456 584 Left 2 ;Vgs(th) = 3.5 [2.0 to 4.0]
TEXT 320 632 Left 2 ;Voltage in source will be 3.5V greater than voltage in gate
TEXT 528 344 Left 2 ;S
TEXT 528 224 Left 2 ;D
TEXT 448 232 Left 2 ;G
TEXT 688 88 Left 2 !.param F 26k
TEXT 688 128 Left 2 !.param P {1 / F}
TEXT 688 168 Left 2 !.param D 0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\00b063172045_118A.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
R1 N002 N001 5K
R2 N001 0 5K
V3 N003 0 SINE(0 1 1Meg)
XU1 N003 N001 +V -V N002 LT118A ;pnba In+)In-)V+)V-)OUT
.tran 3u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT118A.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -256 160 -256 144
WIRE -128 160 -128 144
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE -256 256 -256 240
WIRE -128 256 -128 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
FLAG -128 256 0
FLAG 192 192 +V
FLAG -128 144 +V
FLAG 192 288 -V
FLAG -256 256 0
FLAG -256 144 -V
FLAG 16 96 0
FLAG 0 368 0
SYMBOL voltage -128 144 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -256 144 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1Meg)
SYMBOL opamps\\LT118A 192 240 R0
SYMATTR InstName U1
TEXT 240 392 Left 2 !.tran 3u
* Z:\home\khalils\Downloads\files\data\raw_asc\928a532ee1fd_2ndOrderHighpass.asc
* Generated by LTspice 26.0.1 for Windows.
* f0 and Q set by parameters
* R1 is arbitary
* This version puts 1/2 the R1 resistance in the capacitor
* Vout
* Vin
* High frequency gain is set by the parameter "H"
R3 2 0 1Meg
C1 N002 N003 {C1} Rser={R1/2}
R2 2 0 .1
R1 N002 0 {R1/2}
L1 N003 0 {L1}
V1 1 0 AC 1
G1 0 N002 1 0 {2/R1}
G2 0 2 N003 0 {10*H}
.param f0= 1k Q=.5
.param R1=1k
.param L1=R1*Q/(2*pi*f0)
.param C1=1/(L1*(2*pi*f0)**2)
.param H=1
.ac dec 101 100 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE -560 -128 -624 -128
WIRE -464 -128 -496 -128
WIRE -288 -128 -416 -128
WIRE -208 -128 -288 -128
WIRE -32 -128 -144 -128
WIRE 96 -128 -32 -128
WIRE 256 -128 144 -128
WIRE 320 -128 256 -128
WIRE 352 -128 320 -128
WIRE 480 -128 416 -128
WIRE -624 -96 -624 -128
WIRE -416 -96 -416 -128
WIRE -32 -96 -32 -128
WIRE -464 -80 -464 -128
WIRE -288 -64 -288 -128
WIRE 144 -64 144 -128
WIRE 256 -64 256 -128
WIRE 480 -64 480 -128
WIRE 96 -48 96 -128
WIRE -624 0 -624 -16
WIRE -464 0 -464 -32
WIRE -416 0 -416 -16
WIRE -32 32 -32 -16
WIRE 96 32 96 0
WIRE 144 32 144 16
WIRE 256 32 256 16
WIRE 480 32 480 16
WIRE -288 48 -288 16
SYMBOL res -304 -80 R0
SYMATTR InstName R1
SYMATTR Value {R1/2}
SYMBOL ind -48 -112 R0
WINDOW 0 59 45 Bottom 2
WINDOW 3 61 51 Top 2
SYMATTR InstName L1
SYMATTR Value {L1}
SYMBOL voltage -624 -112 R0
WINDOW 0 33 30 Left 2
WINDOW 123 32 79 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMBOL cap -208 -112 R270
WINDOW 0 52 17 VRight 2
WINDOW 3 -26 17 VRight 2
WINDOW 123 -57 10 VRight 2
SYMATTR InstName C1
SYMATTR Value {C1}
SYMATTR Value2 Rser={R1/2}
SYMBOL res 464 -80 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL res 240 -80 R0
SYMATTR InstName R2
SYMATTR Value .1
SYMBOL Misc\\jumper 384 -192 R0
SYMATTR InstName J2
SYMBOL g -416 -112 R0
SYMATTR InstName G1
SYMATTR Value {2/R1}
SYMBOL g 144 -80 R0
SYMATTR InstName G2
SYMATTR Value {10*H}
SYMBOL Misc\\jumper -528 -192 M0
SYMATTR InstName J1
FLAG -32 32 0
FLAG -288 48 0
FLAG -416 0 0
FLAG -464 0 0
FLAG 96 32 0
FLAG 144 32 0
FLAG 256 32 0
FLAG 320 -128 2
FLAG -464 -128 1
FLAG -624 0 0
FLAG 480 32 0
TEXT -304 96 Left 2 !.param f0= 1k Q=.5
TEXT -464 160 Left 2 !.param R1=1k
TEXT -640 224 Left 2 !.param L1=R1*Q/(2*pi*f0)
TEXT -632 96 Left 2 ;f0 and Q set by parameters
TEXT -632 160 Left 2 ;R1 is arbitary
TEXT -632 128 Left 2 ;This version puts 1/2 the R1 resistance in the capacitor
TEXT -640 256 Left 2 !.param C1=1/(L1*(2*pi*f0)**2)
TEXT 432 -144 Left 2 ;Vout
TEXT -576 -144 Right 2 ;Vin
TEXT -632 192 Left 2 ;High frequency gain is set by the parameter "H"
TEXT -80 192 Left 2 !.param H=1
TEXT -640 288 Left 2 !.ac dec 101 100 10k
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP162-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP162-2.8.asy)
Rload OUT 0 280
V1 IN 0 5
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
C1 OUT 0 1
XU1 IN 0 N001 OUT ADP16xf K=357.1u ;pnba Vin)GND)En)Vout
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 416 96 352 96
WIRE 512 96 416 96
WIRE -64 112 -64 96
WIRE 416 112 416 96
WIRE 512 112 512 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 416 208 416 176
WIRE 512 208 512 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL ADP162-2.8 256 208 R0
SYMATTR InstName U1
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 280
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
FLAG -64 208 0
FLAG 256 272 0
FLAG 416 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\011ec511b5a0_VL-P-N1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 a 0 PWL REPEAT FOREVER (0 -20 .5 0 1 -20) ENDREPEAT
R1 b a 200
D2 b 0 CDZV10B
R2 0 b 2000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3
.lib cdzv10b.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 112 -64 112
WIRE 256 112 128 112
WIRE 336 112 256 112
WIRE 352 112 336 112
WIRE -64 160 -64 112
WIRE 256 160 256 112
WIRE 352 160 352 112
WIRE -64 304 -64 240
WIRE 48 304 -64 304
WIRE 256 304 256 224
WIRE 256 304 48 304
WIRE 352 304 352 240
WIRE 352 304 256 304
WIRE 48 320 48 304
SYMBOL Misc\\EuropeanResistor 368 256 R180
WINDOW 0 -42 76 Left 2
WINDOW 3 -64 52 Left 2
SYMATTR InstName R2
SYMATTR Value 2000
SYMBOL Misc\\EuropeanResistor 144 96 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL voltage -64 144 R0
WINDOW 3 -109 234 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PWL REPEAT FOREVER (0 -20 .5 0 1 -20) ENDREPEAT
SYMATTR InstName V1
SYMBOL zener 240 160 R0
WINDOW 0 40 29 Left 2
WINDOW 3 -38 166 Left 2
SYMATTR InstName D2
SYMATTR Value CDZV10B
SYMATTR Description Diode
SYMATTR Type diode
FLAG -64 112 a
FLAG 336 112 b
FLAG 48 320 0
TEXT -176 408 Left 2 !.tran 3
TEXT -176 448 Left 2 !.lib cdzv10b.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4602HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4602HV.asy)
V1 IN 0 12
R1 N004 0 31.6K
Rload OUT 0 .41
R2 OUT N008 100K
XU1 N001 N006 N002 N003 N005 N007 N008 N004 0 0 OUT IN LTM4602 ;pnba Fset)SVin)EXTVcc)FCB)Run)Comp)PwrGD)FB)SGND)PGND)Vout)Vin
.tran 2.5m startup
.lib LTM4602.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1260 692
WIRE 384 64 160 64
WIRE 160 80 160 64
WIRE 384 80 384 64
WIRE 512 80 512 64
WIRE 272 128 256 128
WIRE 768 128 624 128
WIRE 816 128 768 128
WIRE 816 144 816 128
WIRE 160 176 160 160
WIRE 272 176 256 176
WIRE 640 176 624 176
WIRE 736 176 720 176
WIRE 272 224 256 224
WIRE 640 224 624 224
WIRE 816 240 816 224
WIRE 272 272 256 272
WIRE 640 272 624 272
WIRE 768 272 768 128
WIRE 768 272 720 272
WIRE 384 336 384 320
WIRE 512 336 512 320
SYMBOL res 800 128 R0
SYMATTR InstName Rload
SYMATTR Value .41
SYMBOL PowerProducts\\LTM4602HV 448 192 R0
SYMATTR InstName U1
SYMBOL voltage 160 64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 736 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL res 624 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 31.6K
FLAG 160 176 0
FLAG 384 336 0
FLAG 512 336 0
FLAG 816 240 0
FLAG 736 176 0
FLAG 816 128 OUT
FLAG 160 64 IN
TEXT 736 336 Left 2 !.tran 2.5m startup