Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\26104771fad0_Verpolschutz_DC_12V.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N003 N002 N002 IRF7204
R2 N002 0 100
R1 N003 0 100k
V1 N001 0 PULSE(-12 12 0 1m 1m 50m 100m)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0.25
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 144 -224 144
WIRE 560 144 288 144
WIRE 560 176 560 144
WIRE -224 192 -224 144
WIRE 272 240 272 192
WIRE -224 352 -224 272
WIRE 272 352 272 320
WIRE 272 352 -224 352
WIRE 560 352 560 256
WIRE 560 352 272 352
WIRE 272 384 272 352
SYMBOL voltage -224 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(-12 12 0 1m 1m 50m 100m)
SYMBOL pmos 192 192 R270
SYMATTR InstName M1
SYMATTR Value IRF7204
SYMBOL res 544 160 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL res 256 224 R0
SYMATTR InstName R1
SYMATTR Value 100k
FLAG 272 384 0
TEXT -32 408 Left 2 !.tran 0.25
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3528B-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3528B-2.asy)
XU1 IN N002 NC_01 OUT N001 0 0 IN LTC3528B-2 ;pnba _SHDN)FB)Pgood)Vout)SW)PGND)SGND)Vin
R2 N002 0 287K
L1 IN N001 2.2 Rpar=5K
R1 OUT N002 499K
R3 OUT 0 8.25
C2 OUT N002 33p
C1 OUT 0 10 Rser=1m
V1 IN 0 2
.tran .5m startup
.lib LTC3528B-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 64 -112 64
WIRE 64 64 -32 64
WIRE 96 64 64 64
WIRE 192 64 176 64
WIRE -112 80 -112 64
WIRE 64 112 64 64
WIRE 192 112 192 64
WIRE -112 176 -112 160
WIRE -32 192 -32 64
WIRE -16 192 -32 192
WIRE 320 192 272 192
WIRE 432 192 320 192
WIRE 512 192 432 192
WIRE 608 192 512 192
WIRE 320 208 320 192
WIRE 432 208 432 192
WIRE 512 208 512 192
WIRE 608 208 608 192
WIRE 320 304 320 288
WIRE 320 304 272 304
WIRE 432 304 432 272
WIRE 432 304 320 304
WIRE 512 304 512 272
WIRE 608 304 608 288
WIRE 320 320 320 304
WIRE 64 400 64 384
WIRE 192 400 192 384
WIRE 320 416 320 400
SYMBOL res 592 192 R0
SYMATTR InstName R3
SYMATTR Value 8.25
SYMBOL voltage -112 64 R0
WINDOW 0 20 15 Left 2
WINDOW 3 25 97 Left 2
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL cap 416 208 R0
SYMATTR InstName C2
SYMATTR Value 33p
SYMBOL ind 80 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rpar=5K
SYMBOL PowerProducts\\LTC3528B-2 128 256 R0
SYMATTR InstName U1
SYMBOL res 304 304 R0
SYMATTR InstName R2
SYMATTR Value 287K
SYMBOL res 304 192 R0
SYMATTR InstName R1
SYMATTR Value 499K
SYMBOL cap 496 208 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=1m
FLAG -112 176 0
FLAG 64 400 0
FLAG 320 416 0
FLAG 512 304 0
FLAG 608 304 0
FLAG 192 400 0
FLAG 608 192 OUT
FLAG -112 64 IN
TEXT 464 392 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6909.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6909.asy)
V1 N001 0 3.3
XU1 N001 0 N001 N001 N002 N003 N004 N005 N006 N007 N009 N011 N001 N010 0 N008 LTC6909 ;pnba V+A)GND)PH0)PH1)OUT1)OUT2)OUT3)OUT4)OUT5)OUT6)OUT7)OUT8)V+D)MOD)PH2)SET
C1 N010 0 .01
R1 N001 N008 71.5K
.tran .5m startup
.lib LTC6909.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 -32 -128 -32
WIRE 112 -32 -32 -32
WIRE 384 -32 368 -32
WIRE -128 -16 -128 -32
WIRE 112 32 96 32
WIRE 384 32 368 32
WIRE -128 80 -128 64
WIRE -32 96 -32 -32
WIRE 112 96 -32 96
WIRE 384 96 368 96
WIRE -32 160 -32 96
WIRE 112 160 -32 160
WIRE 384 160 368 160
WIRE -32 224 -32 160
WIRE 112 224 -32 224
WIRE 384 224 368 224
WIRE -32 240 -32 224
WIRE 112 288 96 288
WIRE 384 288 368 288
WIRE -32 352 -32 320
WIRE 112 352 -32 352
WIRE 384 352 368 352
WIRE 32 416 16 416
WIRE 112 416 96 416
WIRE 384 416 368 416
SYMBOL SpecialFunctions\\LTC6909 240 192 R0
SYMATTR InstName U1
SYMBOL res -48 224 R0
SYMATTR Value 71.5K
SYMATTR InstName R1
SYMBOL voltage -128 -32 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap 96 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .01
FLAG -128 80 0
FLAG 96 32 0
FLAG 96 288 0
FLAG 16 416 0
TEXT 496 424 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\14d34bc083b6_ADG5412BF.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nInterrupt Flag recovery time with pull-up resistor not included\nQinj not included\nOnly one channel included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG5412BF.asy)
C2 vFF 0 12p
V1 +V 0 15
C1 vDrain 0 36p
XU2 vIN vDrain vSource -V 0 +V vFF ADG5412BF ;pnba IN)D)S)Vss)GND)Vdd)FF
V2 -V 0 -15
V4 vIN 0 pulse(0 5 0 20n 20n 10u 20u)
V3 vSource 0 10
R1 vDrain 0 301
.tran 0.1m
.lib ADG5412BF.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -112 -128 -112 -144
WIRE -624 -64 -624 -80
WIRE -400 -48 -432 -48
WIRE -272 -48 -320 -48
WIRE -208 -48 -272 -48
WIRE 48 -48 -16 -48
WIRE 128 -48 48 -48
WIRE 224 -48 128 -48
WIRE 128 -16 128 -48
WIRE 224 0 224 -48
WIRE -240 16 -272 16
WIRE -208 16 -240 16
WIRE 32 16 -16 16
WIRE -624 32 -624 16
WIRE -272 32 -272 16
WIRE 32 48 32 16
WIRE 128 80 128 64
WIRE 224 80 224 64
WIRE -272 112 -272 96
WIRE -624 128 -624 112
WIRE -160 144 -160 128
WIRE -64 144 -64 128
WIRE 32 144 32 128
WIRE -624 224 -624 208
SYMBOL cap 208 0 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -304 -48 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL ADG5412BF -112 0 R0
SYMATTR InstName U2
SYMBOL voltage -624 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -624 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 112 -32 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL cap -288 32 R0
SYMATTR InstName C2
SYMATTR Value 12p
SYMBOL voltage 32 32 R0
WINDOW 3 17 95 Left 2
SYMATTR Value pulse(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V4
FLAG -624 224 0
FLAG -624 32 0
FLAG -624 -80 +V
FLAG -624 112 -V
FLAG -432 -48 0
FLAG -160 144 -V
FLAG -112 -144 +V
FLAG -64 144 0
FLAG 32 144 0
FLAG 128 80 0
FLAG 224 80 0
FLAG -272 112 0
FLAG 48 -48 vDrain
FLAG -272 -48 vSource
FLAG -240 16 vFF
FLAG 32 16 vIN
TEXT -368 192 Left 2 !.tran 0.1m
TEXT -648 -320 Left 2 ;Note:\nInterrupt Flag recovery time with pull-up resistor not included\nQinj not included\nOnly one channel included\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\02d88aa82556_Positve_Biased_Clipper.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 0 1k
D1 N002 N003 1N4148
V2 0 N003 5
R1 N002 N001 1k
V1 N001 0 SINE(0 30 1000)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 10m 0 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 176 288 176
WIRE 576 176 464 176
WIRE 736 176 576 176
WIRE 288 240 288 176
WIRE 576 256 576 176
WIRE 736 304 736 176
WIRE 576 368 576 320
WIRE 288 528 288 320
WIRE 432 528 288 528
WIRE 576 528 576 448
WIRE 576 528 432 528
WIRE 736 528 736 384
WIRE 736 528 576 528
WIRE 432 544 432 528
SYMBOL voltage 288 224 R0
SYMATTR InstName V1
SYMATTR Value SINE(0 30 1000)
SYMBOL res 720 288 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL diode 560 256 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 576 464 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 480 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 432 544 0
TEXT 296 352 Left 2 !.tran 0 10m 0 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8002.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8002.asy)
XU1 NC_01 IN N002 IN N003 0 NC_02 OUT N001 0 LTM8002 ;pnba BIAS)RUN)RT)VIN)TR/SS)SYNC)PG)VOUT)FB)GND
C1 N003 0 1n
R1 N002 0 41.2K
Rload OUT 0 10
C2 OUT 0 22
R2 N001 0 24.3K
V1 IN 0 12
.tran 1.2m startup
.lib LTM8002.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 -16 -48 -16
WIRE 64 -16 -16 -16
WIRE 240 -16 64 -16
WIRE 240 0 240 -16
WIRE -48 16 -48 -16
WIRE 64 64 64 -16
WIRE 96 64 64 64
WIRE 560 64 384 64
WIRE 608 64 560 64
WIRE 656 64 608 64
WIRE 560 80 560 64
WIRE 656 80 656 64
WIRE -48 112 -48 96
WIRE 96 160 64 160
WIRE 448 160 384 160
WIRE 448 176 448 160
WIRE 560 176 560 144
WIRE 656 176 656 160
WIRE 448 272 448 256
WIRE 0 352 -16 352
WIRE 96 352 80 352
WIRE 416 352 384 352
WIRE 496 352 480 352
WIRE 240 448 240 416
SYMBOL res 432 160 R0
SYMATTR InstName R2
SYMATTR Value 24.3K
SYMBOL res 640 64 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL cap 544 80 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL cap 416 336 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL voltage -48 0 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 96 336 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 41.2K
SYMBOL LTM8002 240 208 R0
SYMATTR InstName U1
FLAG -48 112 0
FLAG 240 448 0
FLAG -16 352 0
FLAG 64 160 0
FLAG 448 272 0
FLAG 496 352 0
FLAG 560 176 0
FLAG 656 176 0
FLAG 608 64 OUT
FLAG -16 -16 IN
TEXT 456 432 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\858ef04a1de1_Draft21.asc
* Generated by LTspice 26.0.1 for Windows.
VIN N002 0 SINE(0 10 50)
V2 VCC 0 15
V3 0 VEE 15
D1 VOUT N001 D
D2 N001 VOUT D
R2 N001 N002 10k
R3 VOUT N001 50k
XU2 0 N001 VCC VEE VOUT OP27 ;pnba In+)In-)V+)V-)OUT
XU1 CP3V3 VOUT 0 0 0 0 OUT N003 LT1116 ;pnba V+)In+)In-)V-)LATCH)GND)OUT+)OUT-
V1 CP3V3 0 3.3
V4 0 0 3.3
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
;dc V1 0 10 0.01
.tran 0.1
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP27.asy)
.lib ADI.lib
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1116.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 904 680
WIRE 384 -64 384 -112
WIRE 384 -64 368 -64
WIRE 448 -64 448 -112
WIRE 368 0 368 -64
WIRE 448 0 448 -64
WIRE -240 32 -304 32
WIRE -64 32 -144 32
WIRE -144 48 -144 32
WIRE -64 48 -64 32
WIRE 688 64 640 64
WIRE 864 64 864 48
WIRE 864 64 768 64
WIRE 288 80 48 80
WIRE 368 80 368 0
WIRE 384 80 368 80
WIRE 48 96 48 80
WIRE 448 96 448 0
WIRE 528 96 448 96
WIRE 688 96 528 96
WIRE 816 96 768 96
WIRE 384 112 368 112
WIRE 368 144 368 112
WIRE 704 144 704 128
WIRE 720 144 720 128
WIRE 736 144 736 128
WIRE 736 144 720 144
WIRE 704 176 704 144
FLAG 48 176 0
FLAG -64 48 0
FLAG 528 96 VOUT
FLAG -144 -48 VCC
FLAG 416 64 VCC
FLAG -144 128 VEE
FLAG 416 128 VEE
FLAG 368 144 0
FLAG 640 64 0
FLAG 704 176 0
FLAG -240 32 0
FLAG -304 -48 CP3V3
FLAG 864 48 OUT
FLAG -304 112 CN3V3
FLAG 704 144 CN3V3
FLAG 736 144 0
FLAG 720 32 CP3V3
SYMBOL voltage 48 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value SINE(0 10 50)
SYMATTR InstName VIN
SYMBOL voltage -144 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 38 43 Left 2
SYMATTR Value 15
SYMATTR InstName V2
SYMBOL voltage -144 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL diode 448 -128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL diode 384 -48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL res 384 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 464 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 50k
SYMBOL OpAmps\\OP27 416 32 R0
SYMATTR InstName U2
SYMBOL Comparators\\LT1116 720 16 R0
SYMATTR InstName U1
SYMBOL voltage -304 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 38 43 Left 2
SYMATTR Value 3.3
SYMATTR InstName V1
SYMBOL voltage -304 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 3.3
TEXT -72 264 Left 2 !;dc V1 0 10 0.01
TEXT 136 320 Left 2 !.tran 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\05c5ff344c4b_LSK170.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Vg 0 {Vg}
J1 N001 Vg 0 LSK170A
V2 N001 0 PULSE(0 5 1n 1m 1m 2m 5m 1)
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.tran 0 1m 1n
.param Vg=0
.step param Vg 0 -1.5 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 964 680
WIRE 256 -32 -64 -32
WIRE -64 80 -64 -32
WIRE 256 96 256 -32
WIRE 144 160 48 160
WIRE 208 160 144 160
WIRE 48 192 48 160
WIRE 432 192 256 192
WIRE -64 288 -64 160
WIRE 48 288 48 272
WIRE 48 288 -64 288
WIRE 144 288 48 288
WIRE 256 288 256 192
WIRE 256 288 144 288
WIRE 144 320 144 288
SYMBOL njf 208 96 R0
SYMATTR InstName J1
SYMATTR Value LSK170A
SYMBOL voltage 48 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vg}
SYMBOL voltage -64 64 R0
WINDOW 3 -395 138 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 1n 1m 1m 2m 5m 1)
FLAG 144 320 0
FLAG 432 192 Vs
FLAG 144 160 Vg
TEXT -64 312 Left 2 !.tran 0 1m 1n
TEXT 656 88 Left 2 !.param Vg=0
TEXT 656 128 Left 2 !.step param Vg 0 -1.5 0.05
* Z:\tmp\asc_dec_bjh7r6w2\0c88257055b9_1997-3_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
VS N001 0 0
V2 V- 0 -15
XU1 NC_01 MP_02 NC_03 MP_04 NC_05 NC_06 NC_07 V- NC_08 NC_09 V+ NC_10 MP_11 NC_12 MP_13 NC_14 LT1997-3 ;pnba +INA))+INB))+INC)REF1)REF2)V-)OUT)_SHDN)V+)-INC))-INB))-INA
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1997-3.asy)
.lib LT1997-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1116 932
WIRE -272 80 -432 80
WIRE 400 80 400 48
WIRE -432 112 -432 80
WIRE -272 160 -272 80
WIRE -208 160 -272 160
WIRE -432 208 -432 192
WIRE -208 240 -144 160
WIRE -208 240 -272 240
WIRE -144 240 -208 160
WIRE -272 256 -272 240
WIRE -528 304 -528 288
WIRE -400 304 -400 288
WIRE -272 352 -272 336
WIRE 400 384 400 336
WIRE -528 400 -528 384
WIRE -400 400 -400 384
SYMBOL voltage -432 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VS
SYMATTR Value 0
SYMBOL voltage -400 288 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL LT1997-3 272 208 R0
SYMATTR InstName U1
FLAG -528 400 0
FLAG -400 400 0
FLAG -528 288 V+
FLAG -400 288 V-
FLAG 400 48 V+
FLAG 400 384 V-
FLAG -272 352 0
FLAG -432 208 0
* Z:\home\khalils\Downloads\files\data\raw_asc\37b6072acc9b_flyback_diode.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N002 0 12
L1 N002 VC1 100m Rser=400
Q1 VC1 N006 0 0 BC547B
L2 N001 VC2 100m Rser=400
D1 VC2 N001 D
R1 N006 N005 1k
R2 N004 N003 1k
V2 N005 0 PULSE(0 5 0 1m 1m 20m 100m 1)
V1 N003 0 PULSE(0 5 0 1m 1m 20m 100m 1)
V4 N001 0 12
Q2 VC2 N004 0 0 BC547B
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 40m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1004 680
WIRE 864 128 672 128
WIRE 352 144 160 144
WIRE 864 160 864 128
WIRE 864 160 816 160
WIRE 672 192 672 128
WIRE 816 192 816 160
WIRE 864 192 864 160
WIRE 160 208 160 144
WIRE 352 208 352 144
WIRE 672 320 672 272
WIRE 816 320 816 256
WIRE 864 320 864 272
WIRE 864 320 816 320
WIRE 160 336 160 288
WIRE 352 368 352 288
WIRE 416 368 352 368
WIRE 864 368 864 320
WIRE 944 368 864 368
WIRE 864 384 864 368
WIRE 352 400 352 368
WIRE 640 432 496 432
WIRE 800 432 720 432
WIRE 128 448 -16 448
WIRE 288 448 208 448
WIRE 496 464 496 432
WIRE -16 480 -16 448
WIRE 496 576 496 544
WIRE 864 576 864 480
WIRE -16 592 -16 560
WIRE 352 592 352 496
SYMBOL diode 832 256 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL Res 224 432 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL npn 288 400 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL Voltage 672 176 R0
SYMATTR InstName V4
SYMATTR Value 12
SYMBOL npn 800 384 R0
SYMATTR InstName Q2
SYMATTR Value BC547B
SYMBOL Res 736 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL Voltage -16 464 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1m 1m 20m 100m 1)
SYMBOL ind 848 176 R0
SYMATTR InstName L2
SYMATTR Value 100m
SYMATTR SpiceLine Rser=400
SYMBOL Voltage 160 192 R0
SYMATTR InstName V3
SYMATTR Value 12
SYMBOL ind 336 192 R0
SYMATTR InstName L1
SYMATTR Value 100m
SYMATTR SpiceLine Rser=400
SYMBOL Voltage 496 448 R0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 1m 1m 20m 100m 1)
FLAG 352 592 0
FLAG 160 336 0
FLAG -16 592 0
FLAG 864 576 0
FLAG 672 320 0
FLAG 496 576 0
FLAG 944 368 VC2
FLAG 416 368 VC1
TEXT -32 56 Left 2 !.tran 40m
* Z:\home\khalils\Downloads\files\data\raw_asc\09afbafb5400_randrandomwhite.asc
* Generated by LTspice 26.0.1 for Windows.
B1 random 0 V=random(time*1K)
B2 white 0 V=white(time*1K)
B3 rand 0 V=rand(time*1K)
.tran 0 300m
.options maxstep=10u
* rectangular 0 to +1.0
* smooth 0 to +1.0
* smoother -0.5 to +0.5
* The Random(Noise) Functions in LTSPICE\n \nThese time domain noise functions have a uniform distribution.\nIt means that every value has the same probability.\nThe time step is defined by the parameter FREQUENCY.\n \n rand(time*FREQUENCY) rectangular transitions 0...1.0\n random(time*FREQUENCY) smooth transitions 0...1.0\n white(time*FREQUENCY) more smoother transitions -0.5...+0.5 \n \nYou may add an offset and gain to the functions if you want \na distribution between other limits.\n Example: -1 < V(noise) <1 with random()\nB2 gorandom 0 V=2*random(time*FREQUENCY) -1\n \nChoose the time step for .TRAN less than 0.01/FREQUENCY.\nSwitch off any data compression of the simulator.
.options plotwinsize=0
* Outpput data compression off
* Plot step time <0.01*1/FREQUENCY. \nFREQUENCY is 1KHz in this example
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1652 680
WIRE 304 192 304 224
WIRE 592 192 592 224
WIRE 16 192 16 224
WIRE 16 112 16 80
WIRE 592 112 592 80
WIRE 304 112 304 80
WIRE 592 80 656 80
WIRE 304 80 368 80
WIRE 16 80 80 80
FLAG 304 224 0
FLAG 592 224 0
FLAG 16 224 0
FLAG 368 80 random
IOPIN 368 80 Out
FLAG 656 80 white
IOPIN 656 80 Out
FLAG 80 80 rand
IOPIN 80 80 Out
SYMBOL bv 304 96 R0
SYMATTR InstName B1
SYMATTR Value V=random(time*1K)
SYMBOL bv 592 96 R0
SYMATTR InstName B2
SYMATTR Value V=white(time*1K)
SYMBOL bv 16 96 R0
SYMATTR InstName B3
SYMATTR Value V=rand(time*1K)
TEXT -8 -160 Left 0 !.tran 0 300m\n.options maxstep=10u
TEXT -8 32 Left 0 ;rectangular  0 to +1.0
TEXT 296 32 Left 0 ;smooth   0 to +1.0
TEXT 568 32 Left 0 ;smoother   -0.5 to +0.5
TEXT -16 -712 Left 0 ;The Random(Noise) Functions in LTSPICE\n \nThese time domain noise functions have a uniform distribution.\nIt means that every value has the same probability.\nThe time step is defined by the parameter FREQUENCY.\n \n  rand(time*FREQUENCY)               rectangular transitions            0...1.0\n  random(time*FREQUENCY)          smooth transitions                   0...1.0\n  white(time*FREQUENCY)             more smoother transitions  -0.5...+0.5   \n \nYou may add an offset and gain to the functions if you want \na distribution between other limits.\n Example:  -1 < V(noise)  <1     with random()\nB2 gorandom 0  V=2*random(time*FREQUENCY) -1\n \nChoose the time step for .TRAN less than 0.01/FREQUENCY.\nSwitch off any data compression of the simulator.
TEXT -8 -72 Left 0 !.options plotwinsize=0
TEXT 280 -72 Left 0 ;Outpput data compression off
TEXT 280 -128 Left 0 ;Plot step time <0.01*1/FREQUENCY. \nFREQUENCY is 1KHz in this example
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6004.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6004.asy)
XU1 IN OUT +V -V OUT LT6003 ;pnba IN+)IN-)VCC)VEE)OUT
V1 +V 0 2
V2 -V 0 -2
V3 IN 0 PULSE(-1 1 0 1u 1u 100m 200m)
.tran 1
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 756
WIRE 288 304 128 304
WIRE -256 368 -256 352
WIRE -160 368 -160 352
WIRE 192 368 192 352
WIRE 128 384 128 304
WIRE 160 384 128 384
WIRE 288 400 288 304
WIRE 288 400 224 400
WIRE 336 400 288 400
WIRE 160 416 -16 416
WIRE -16 432 -16 416
WIRE 192 448 192 432
WIRE -256 464 -256 448
WIRE -160 464 -160 448
WIRE -16 528 -16 512
SYMBOL LT6004 192 400 R0
SYMATTR InstName U1
SYMBOL voltage -160 352 R0
SYMATTR InstName V2
SYMATTR Value -2
SYMBOL voltage -16 416 R0
SYMATTR InstName V3
SYMATTR Value PULSE(-1 1 0 1u 1u 100m 200m)
SYMBOL voltage -256 352 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2
FLAG -256 464 0
FLAG -160 464 0
FLAG -16 528 0
FLAG -16 416 IN
FLAG 336 400 OUT
FLAG 192 352 +V
FLAG -256 352 +V
FLAG -160 352 -V
FLAG 192 448 -V
TEXT 408 472 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\01fc23406ef9_memristor.asc
* Generated by LTspice 26.0.1 for Windows.
* L(y) is the length of the doped area
* dr/dt ( y ) is the derivative of the resistance
* Ron (doped) : .\n \nRoff (undoped) : .\n \nLength of the Device (D) : Lo
* Latex equations:\nL_{(y)} = L_0 - L_0 \\cdot \\frac{m}{y}\nR = 10^3 \\cdot \\frac{f_0}{L_0} \\cdot e^{2 \\cdot L_0}\n \nI = \\frac{d r( V_{(+)} -V_{(-)} )}{d t} \\cdot u(V_{(+)} - V_{(-)}) \\cdot u(V_{(r)} - r_{min}) + u(-(V_{(+)} - V_{(-)} )) \\cdot u(r_{max}-V_{(r)})\nI = \\frac{V_{(+)} - V_{(-)}}{ \\frac{ f_0 }{ L_{V_{r}} } \\cdot e^{2 \\cdot L_{V_{(r)}} } }
Cr r 0 1
Raux r 0 1e12
Bpm plus minus I={(V(plus)-V(minus))/((fo*exp(2*L(V(r))))/L(V(r)))}
Br 0 r I={dr_dt(V(plus)-V(minus))*(u(V(plus)-V(minus))*u(V(r)-rmin)+u(-(V(plus)-V(minus)))*u(rmax-V(r)))}
Rpm plus minus {1000*((fo*exp(2*Lo))/Lo)}
.ic v(r)={rinit}
.func dr_dt(y) {-alpha *((y-VtL)/(gamma+abs(y-VtL)))*u(-y+VtL)-beta*y*u(y-VtL)*u(-y+VtR)-alpha*((y-VtR)/(gamma+abs(y-VtR)))*u(y-VtR)}
.func L(y) {Lo-Lo*m/y}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3888 680
WIRE 1872 32 1664 32
WIRE 1936 32 1872 32
WIRE 2224 32 1936 32
WIRE 1664 128 1664 32
WIRE 1936 144 1936 32
WIRE 2224 144 2224 32
WIRE 496 176 496 16
WIRE 720 176 496 176
WIRE 496 256 496 176
WIRE 720 256 720 176
WIRE 1664 320 1664 208
WIRE 1936 320 1936 208
WIRE 1936 320 1664 320
WIRE 2224 320 2224 224
WIRE 2224 320 1936 320
WIRE 1936 384 1936 320
WIRE 496 448 496 336
WIRE 720 448 720 336
WIRE 720 448 496 448
WIRE 496 512 496 448
SYMBOL bi 496 256 R0
WINDOW 3 74 298 Left 2
SYMATTR Value I={(V(plus)-V(minus))/((fo*exp(2*L(V(r))))/L(V(r)))}
SYMATTR InstName Bpm
SYMBOL res 704 240 R0
SYMATTR InstName Rpm
SYMATTR Value {1000*((fo*exp(2*Lo))/Lo)}
SYMBOL res 2208 128 R0
SYMATTR InstName Raux
SYMATTR Value 1e12
SYMBOL bi 1664 208 R180
WINDOW 0 24 80 Left 2
WINDOW 3 -60 -298 Left 2
SYMATTR InstName Br
SYMATTR Value I={dr_dt(V(plus)-V(minus))*(u(V(plus)-V(minus))*u(V(r)-rmin)+u(-(V(plus)-V(minus)))*u(rmax-V(r)))}
SYMBOL cap 1920 144 R0
SYMATTR InstName Cr
SYMATTR Value 1
FLAG 496 16 plus
FLAG 496 512 minus
FLAG 1936 384 0
FLAG 1872 32 r
TEXT 1752 -24 Left 2 !.ic v(r)={rinit}
TEXT 808 -232 Left 2 !.func dr_dt(y) {-alpha *((y-VtL)/(gamma+abs(y-VtL)))*u(-y+VtL)-beta*y*u(y-VtL)*u(-y+VtR)-alpha*((y-VtR)/(gamma+abs(y-VtR)))*u(y-VtR)}\n.func L(y) {Lo-Lo*m/y}
TEXT 808 -168 Left 2 ;L(y) is the length of the doped area
TEXT 808 -272 Left 2 ;dr/dt ( y  ) is the derivative of the resistance
TEXT 208 -264 Left 2 ;Ron (doped) : .\n \nRoff (undoped) : .\n \nLength of the Device (D) : Lo
TEXT 2136 408 Left 2 ;Latex equations:\nL_{(y)} = L_0 - L_0 \\cdot \\frac{m}{y}\nR = 10^3 \\cdot \\frac{f_0}{L_0} \\cdot e^{2 \\cdot L_0}\n \nI = \\frac{d r( V_{(+)} -V_{(-)} )}{d t} \\cdot u(V_{(+)} - V_{(-)}) \\cdot u(V_{(r)} - r_{min}) + u(-(V_{(+)} - V_{(-)} )) \\cdot u(r_{max}-V_{(r)})\nI = \\frac{V_{(+)} - V_{(-)}}{ \\frac{ f_0 }{ L_{V_{r}} } \\cdot e^{2 \\cdot L_{V_{(r)}} } }