Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\126914f9b5a1_6991.asc
* Generated by LTspice 26.0.1 for Windows.
* One Hour Clock Period\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6991.asy)
R3 N002 0 84.5K
V1 N001 0 5
R2 N003 0 1Meg
XU1 N001 0 N002 N003 N001 OUT LTC6991 ;pnba RST)GND)SET)DIV)V+)OUT
R1 N001 N003 887K
.tran 15000 startup
.lib LTC6991.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 512 48 64 48
WIRE 64 96 64 48
WIRE 112 96 64 96
WIRE 352 96 336 96
WIRE 112 176 96 176
WIRE 384 176 336 176
WIRE 512 176 512 48
WIRE 512 176 384 176
WIRE 384 192 384 176
WIRE 512 192 512 176
WIRE 16 256 0 256
WIRE 112 256 96 256
WIRE 352 256 336 256
WIRE 352 288 352 256
WIRE 384 288 384 272
WIRE 384 288 352 288
WIRE 512 288 512 272
WIRE 384 304 384 288
WIRE 384 400 384 384
SYMBOL SpecialFunctions\\LTC6991 224 176 R0
SYMATTR InstName U1
SYMBOL res 368 176 R0
SYMATTR InstName R1
SYMATTR Value 887K
SYMBOL voltage 512 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 368 288 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 112 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 84.5K
FLAG 96 176 0
FLAG 352 96 OUT
FLAG 512 288 0
FLAG 384 400 0
FLAG 0 256 0
TEXT 232 40 Bottom 2 ;One Hour Clock Period\nStartup Modeled
TEXT 520 376 Left 2 !.tran 15000 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\b34af6ee4bb9_ex3a.asc
* Generated by LTspice 26.0.1 for Windows.
Vi1 N001 0 SINE(0 {Vi} {fi})
R1 n N001 {2*R}
R2 o n {2*R}
XU1 N002 n Vpp Vnn o level2 Avol=125 GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
Vs1 Vpp 0 {Vs}
Vs2 0 Vnn {Vs}
RCARGA1 o 0 100k
R3 N002 0 {R}
.param Vs=25 Vi=20 fi=200 R=1k
* .tran 0 0.01 0.0001
.ac dec 100 10 1G
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 0 208 0
WIRE 432 0 384 0
WIRE 208 80 208 0
WIRE -176 112 -176 80
WIRE -176 112 -224 112
WIRE 112 112 -64 112
WIRE 208 112 208 80
WIRE 208 112 192 112
WIRE 224 112 208 112
WIRE 432 128 432 0
WIRE 432 128 288 128
WIRE 464 128 432 128
WIRE 480 128 464 128
WIRE -224 144 -224 112
WIRE -176 144 -176 112
WIRE -64 144 -64 112
WIRE 224 144 192 144
WIRE 480 144 480 128
WIRE 192 160 192 144
WIRE -64 256 -64 224
WIRE 192 256 192 240
WIRE 480 256 480 224
FLAG -64 256 0
FLAG 480 256 0
FLAG -224 144 0
FLAG -176 0 Vpp
FLAG -176 224 Vnn
FLAG 464 128 o
FLAG 256 96 Vpp
FLAG 256 160 Vnn
FLAG 208 80 n
FLAG 192 256 0
SYMBOL voltage -64 128 R0
SYMATTR InstName Vi1
SYMATTR Value SINE(0 {Vi} {fi})
SYMBOL res 208 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {2*R}
SYMBOL res 400 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {2*R}
SYMBOL OpAmps\\UniversalOpAmp2 256 128 R0
SYMATTR InstName U1
SYMATTR Value2 Avol=125 GBW=10Meg Slew=10Meg
SYMBOL voltage -176 -16 R0
SYMATTR InstName Vs1
SYMATTR Value {Vs}
SYMBOL voltage -176 128 R0
SYMATTR InstName Vs2
SYMATTR Value {Vs}
SYMBOL res 464 128 R0
SYMATTR InstName CARGA1
SYMATTR Value 100k
SYMBOL res 176 144 R0
SYMATTR InstName R3
SYMATTR Value {R}
TEXT -80 344 Left 2 !.param Vs=25 Vi=20 fi=200 R=1k
TEXT -80 320 Left 2 ;.tran 0 0.01 0.0001
TEXT -80 296 Left 2 !.ac dec 100 10 1G
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8642S.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8642S.asy)
XU1 NC_01 NC_02 0 IN IN N005 NC_03 N001 NC_04 NC_05 P001 N003 N006 N002 LT8642S ;pnba Bias)INTVcc)GND)Vin)EN/UV)Rt)BST)SW)Clkout)Mode)TR/SS)Vc)PG)FB
R6 OUT N002 100k
L1 N001 OUT 0.3 Rser=2.8m
C2 OUT N002 47p
C1 P001 0 1n
C3 OUT 0 220 X2 Rser=3.2m
R4 N002 0 100k
R1 N005 0 17.8k
V1 IN 0 12
R2 IN N006 100k
C4 0 N004 150p
R5 N004 N003 11k
Rload OUT 0 0.12
.tran 1m startup
.lib LT8642S.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 680
WIRE -320 -160 -336 -160
WIRE -192 -160 -320 -160
WIRE -48 -160 -192 -160
WIRE -16 -160 -48 -160
WIRE -336 -112 -336 -160
WIRE -48 -64 -48 -160
WIRE -16 -64 -48 -64
WIRE 320 -64 272 -64
WIRE 480 -64 400 -64
WIRE 576 -64 480 -64
WIRE 704 -64 576 -64
WIRE 832 -64 704 -64
WIRE 848 -64 832 -64
WIRE 480 -48 480 -64
WIRE 576 -48 576 -64
WIRE 704 -16 704 -64
WIRE 848 -16 848 -64
WIRE -336 0 -336 -32
WIRE 480 32 272 32
WIRE 576 32 576 16
WIRE 576 32 480 32
WIRE 576 48 576 32
WIRE 704 112 704 48
WIRE 848 112 848 64
WIRE 288 128 272 128
WIRE 384 128 368 128
WIRE 464 128 448 128
WIRE 576 144 576 128
WIRE -112 224 -128 224
WIRE -16 224 -32 224
WIRE 304 320 272 320
WIRE 432 320 384 320
WIRE 128 400 128 384
WIRE -192 464 -192 -160
WIRE 432 464 432 320
WIRE 432 464 -192 464
SYMBOL res 384 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 11k
SYMBOL voltage -336 -128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 688 -16 R0
WINDOW 123 28 83 Left 2
SYMATTR SpiceLine Rser=3.2m
SYMATTR Value2 X2
SYMATTR InstName C3
SYMATTR Value 220
SYMBOL ind 304 -48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 0.3
SYMATTR SpiceLine Rser=2.8m
SYMBOL res -16 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 17.8k
SYMBOL cap -16 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL cap 560 -48 R0
WINDOW 39 24 80 Left 2
SYMATTR InstName C2
SYMATTR Value 47p
SYMBOL res 832 -32 R0
SYMATTR InstName Rload
SYMATTR Value 0.12
SYMBOL cap 448 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 150p
SYMBOL res 464 -64 R0
SYMATTR InstName R6
SYMATTR Value 100k
SYMBOL res 560 32 R0
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL PowerProducts\\LT8642S 128 80 R0
SYMATTR InstName U1
SYMBOL res 400 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
FLAG -128 224 0
FLAG 128 400 0
FLAG -336 0 0
FLAG -80 320 0
FLAG 464 128 0
FLAG 576 144 0
FLAG 704 112 0
FLAG 848 112 0
FLAG -320 -160 IN
FLAG 832 -64 OUT
TEXT 504 416 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\f41f9ae4d06a_HW2_4109061012.asc
* Generated by LTspice 26.0.1 for Windows.
+ LD=0.08e-6 UO=350 LAMBDA=0.1 TOX=9e-9 PB=0.9 CJ=0.56e-3 CJSW=0.35e-11
+ MJ=0.45 MJSW=0.2 CGDO=0.4e-9 JS=1.0e-8)
;.dc VDD 1.62 1.98 0.01
;.ac dec 100 1 1G
;.tran 5ms
Vin Vin 0 SINE(0.76 0.04 6.283e3) AC 1 0
M2 VDD N001 Vout Vout NMOS l=0.5u w=1949u
VDD VDD 0 1.8
Rx VDD N001 9k
RL Vout 0 50
M1 N001 Vin 0 0 NMOS l=0.5u w=61u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model NMOS NMOS (LEVEL=1 VTO=0.7 GAMMA=0.45 PHI=0.9 NSUB=9e+14
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1840 944
WIRE 368 16 112 16
WIRE 672 16 368 16
WIRE 112 96 112 16
WIRE 368 160 368 16
WIRE 448 208 368 208
WIRE 112 240 112 176
WIRE 320 240 112 240
WIRE 672 256 672 16
WIRE 368 288 368 256
WIRE 448 288 448 208
WIRE 448 288 368 288
WIRE 112 304 112 240
WIRE 176 352 112 352
WIRE 368 368 368 288
WIRE 496 368 368 368
WIRE 64 384 -16 384
WIRE 112 432 112 400
WIRE 176 432 176 352
WIRE 176 432 112 432
WIRE 368 448 368 368
WIRE -16 464 -16 384
WIRE -16 608 -16 544
WIRE 112 608 112 432
WIRE 368 608 368 528
WIRE 672 608 672 336
IOPIN 496 368 Out
IOPIN -16 384 In
DATAFLAG 448 368 ""
DATAFLAG 16 384 ""
SYMBOL res 96 80 R0
SYMATTR InstName Rx
SYMATTR Value 9k
SYMBOL res 352 432 R0
SYMATTR InstName RL
SYMATTR Value 50
SYMBOL nmos4 320 160 R0
SYMATTR InstName M2
SYMATTR Value2 l=0.5u w=1949u
SYMBOL voltage -16 448 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1 0
SYMATTR InstName Vin
SYMATTR Value SINE(0.76 0.04 6.283e3)
SYMBOL voltage 672 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1.8
SYMBOL nmos4 64 304 R0
SYMATTR InstName M1
SYMATTR Value2 l=0.5u w=61u
FLAG 496 368 Vout
FLAG 368 608 0
FLAG 112 608 0
FLAG -16 384 Vin
FLAG 672 608 0
FLAG -16 608 0
FLAG 368 16 VDD
TEXT 800 384 Left 2 !.model NMOS NMOS (LEVEL=1 VTO=0.7 GAMMA=0.45 PHI=0.9 NSUB=9e+14 \n+ LD=0.08e-6 UO=350 LAMBDA=0.1 TOX=9e-9 PB=0.9 CJ=0.56e-3 CJSW=0.35e-11 \n+ MJ=0.45 MJSW=0.2 CGDO=0.4e-9 JS=1.0e-8)
TEXT 800 192 Left 2 !;.dc VDD 1.62 1.98 0.01
TEXT 800 240 Left 2 !;.ac dec 100 1 1G
TEXT 800 288 Left 2 !;.tran 5ms
* Z:\home\khalils\Downloads\files\data\raw_asc\dfd82ec27904_Design1.asc
* Generated by LTspice 26.0.1 for Windows.
V4 v1 0 5 AC 5 0
XU4 N003 N001 NC_01 NC_02 N002 LT1001 ;pnba In+)In-)V+)V-)OUT
R17 N002 N001 1.2k
R18 N001 0 2.7k
R19 N004 0 22k
C4 N003 v1 68nf
R20 N003 N004 1.5k
R21 N001 0 33k
R22 v1 0 47k
* Vout
.ac dec 1000 1 1k
* Library below included based on ModelFile attribute of instance XU4 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1264 680
WIRE -1344 -1568 -1376 -1568
WIRE -1232 -1568 -1264 -1568
WIRE -1088 -1552 -1120 -1552
WIRE -960 -1552 -1008 -1552
WIRE -1376 -1472 -1376 -1568
WIRE -1376 -1472 -1472 -1472
WIRE -1344 -1472 -1376 -1472
WIRE -1232 -1472 -1232 -1568
WIRE -1232 -1472 -1264 -1472
WIRE -1200 -1472 -1232 -1472
WIRE -1120 -1472 -1120 -1552
WIRE -1120 -1472 -1200 -1472
WIRE -1200 -1344 -1200 -1472
WIRE -1168 -1344 -1200 -1344
WIRE -960 -1328 -960 -1552
WIRE -960 -1328 -1104 -1328
WIRE -800 -1328 -960 -1328
WIRE -1376 -1312 -1552 -1312
WIRE -1216 -1312 -1312 -1312
WIRE -1168 -1312 -1216 -1312
WIRE -1216 -1296 -1216 -1312
WIRE -1216 -1200 -1216 -1216
WIRE -1552 -1168 -1552 -1312
WIRE -1552 -1056 -1552 -1088
WIRE -1216 -1056 -1216 -1120
WIRE -1216 -1056 -1552 -1056
WIRE -1216 -1040 -1216 -1056
FLAG -1472 -1472 0
FLAG -1216 -1040 0
FLAG -1728 -1248 0
FLAG -1728 -1328 v1
FLAG -1552 -1312 v1
SYMBOL voltage -1728 -1344 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 5 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL OpAmps\\OP07 -1136 -1392 R0
SYMATTR InstName U4
SYMBOL res -992 -1568 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R17
SYMATTR Value 1.2k
SYMBOL res -1248 -1488 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R18
SYMATTR Value 2.7k
SYMBOL res -1232 -1216 R0
SYMATTR InstName R19
SYMATTR Value 22k
SYMBOL cap -1312 -1328 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 68nf
SYMBOL res -1232 -1312 R0
SYMATTR InstName R20
SYMATTR Value 1.5k
SYMBOL res -1248 -1584 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R21
SYMATTR Value 33k
SYMBOL res -1568 -1184 R0
SYMATTR InstName R22
SYMATTR Value 47k
TEXT -800 -1328 Left 2 ;Vout
TEXT -1088 -1232 Left 2 !.ac dec 1000 1 1k
* Z:\home\khalils\Downloads\files\data\raw_asc\27765a98e6c6_non_inverter.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp1.asy)
XU2 N004 N001 N003 N005 N002 level1 Avol=1Meg GBW=120Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R2 N002 N001 10k
V1 N004 0 AC 1
V2 N003 0 5
V3 0 N005 5
R1 N001 0 1k
.ac dec 1000 1e6 5e9
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -112 160 -112
WIRE 480 -112 352 -112
WIRE 368 32 304 32
WIRE 0 64 -96 64
WIRE 112 64 80 64
WIRE 160 64 160 -112
WIRE 160 64 112 64
WIRE 304 64 304 32
WIRE 368 64 368 32
WIRE -96 96 -96 64
WIRE 304 192 304 144
WIRE 112 208 112 64
WIRE 272 208 112 208
WIRE 480 224 480 -112
WIRE 480 224 336 224
WIRE 560 224 480 224
WIRE 272 240 -48 240
WIRE -48 272 -48 240
WIRE 304 352 304 256
WIRE -48 416 -48 352
WIRE 304 480 304 432
SYMBOL res 368 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage -48 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value AC 1
SYMBOL voltage 304 160 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 96 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 304 448 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL OpAmps\\UniversalOpAmp1 304 224 R0
SYMATTR InstName U2
SYMATTR Value2 Avol=1Meg GBW=120Meg Vos=0
FLAG 304 480 0
FLAG 368 64 0
FLAG -48 416 0
FLAG -96 96 0
TEXT -128 504 Left 2 !.ac dec 1000 1e6 5e9
* Z:\home\khalils\Downloads\files\data\raw_asc\3b826e4cc36f_TYPE2.asc
* Generated by LTspice 26.0.1 for Windows.
* Type 2 Compensator
* target gain at fz1\nzero frequency(Hz)\npole frequency(Hz)\nmax ouput voltage(V)\nmin output voltage(V)\nopen loop gain
* feedback
* reference
* 2024-12-29
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
C1 ve N002 {C1}
C2 ve N001 {C2}
R2 N001 N003 {R2}
B1 N003 0 V=V(fb)
V3 -V 0 {vl}
R1 N002 N001 {R1}
V2 +V 0 {vh}
XU1 ref N001 +V -V ve level2 Avol={avol} GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.lib opamp.sub
.param g=1
.param fz1=1k
.param fp1=20k
.param vh=5
.param vl=0
.param avol=100k
.param R1=({R2}*{g})
.param C1=1/(2*PI*{R1}*{fz1})
.param C2=1/(2*PI*{R1}*{fp1})
.param R2=100k
.ic V(ve)=0
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1008 680
WIRE 464 -144 464 -160
WIRE 576 -144 576 -160
WIRE 464 -48 464 -64
WIRE 576 -48 576 -64
WIRE 192 -32 96 -32
WIRE 368 -32 256 -32
WIRE 96 64 96 -32
WIRE 144 64 96 64
WIRE 256 64 224 64
WIRE 368 64 368 -32
WIRE 368 64 320 64
WIRE 240 128 240 112
WIRE -208 144 -272 144
WIRE -32 144 -144 144
WIRE 96 144 96 64
WIRE 96 144 48 144
WIRE 208 144 96 144
WIRE 368 160 368 64
WIRE 368 160 272 160
WIRE 880 160 368 160
WIRE -144 176 -144 144
WIRE 208 176 128 176
WIRE 240 208 240 192
WIRE -144 272 -144 256
WIRE 128 336 128 176
WIRE 128 336 -256 336
IOPIN -272 144 In
IOPIN -256 336 In
IOPIN 880 160 Out
SYMBOL res 240 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL cap 320 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {C1}
SYMBOL bv -144 160 R0
SYMATTR InstName B1
SYMATTR Value V=V(fb)
SYMBOL voltage 576 -160 R0
SYMATTR InstName V3
SYMATTR Value {vl}
SYMBOL cap 256 -48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {C2}
SYMBOL voltage 464 -160 R0
SYMATTR InstName V2
SYMATTR Value {vh}
SYMBOL res 64 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL UniversalOpAmp2 240 160 R0
WINDOW 123 34 49 Left 2
WINDOW 39 36 78 Left 2
WINDOW 40 32 106 Left 2
SYMATTR Value2 Avol={avol} GBW=10Meg Slew=10Meg
SYMATTR InstName U1
FLAG -272 144 fb
FLAG -256 336 ref
FLAG -144 272 0
FLAG 880 160 ve
FLAG 576 -48 0
FLAG 464 -48 0
FLAG 464 -160 +V
FLAG 576 -160 -V
FLAG 240 112 +V
FLAG 240 208 -V
TEXT 272 184 Left 2 !.lib opamp.sub
TEXT -336 -224 Left 2 !.param g=1\n.param fz1=1k\n.param fp1=20k\n.param vh=5\n.param vl=0\n.param avol=100k
TEXT 416 72 Left 2 !.param R1=({R2}*{g})\n.param C1=1/(2*PI*{R1}*{fz1})\n.param C2=1/(2*PI*{R1}*{fp1})
TEXT -352 -288 Left 4 ;Type 2 Compensator
TEXT -80 208 Left 2 !.param R2=100k
TEXT -104 -224 Left 2 ;target gain at fz1\nzero frequency(Hz)\npole frequency(Hz)\nmax ouput voltage(V)\nmin output voltage(V)\nopen loop gain
TEXT -312 112 Left 2 ;feedback
TEXT -312 304 Left 2 ;reference
TEXT 656 176 Left 2 !.ic V(ve)=0
TEXT 448 -264 Left 2 ;2024-12-29
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1469.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1469.asy)
XU1 N003 N001 +V -V N002 LT1468 ;pnba In+)In-)V+)V-)OUT
V3 N003 0 SINE(0 1 1K)
R1 N002 N001 1K
V1 +V 0 15
R2 N001 0 1K
V2 -V 0 -15
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -288 144 -288 128
WIRE -160 144 -160 128
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE -288 240 -288 224
WIRE -160 240 -160 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL voltage -160 128 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -288 128 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL opamps\\LT1469 192 176 R0
SYMATTR InstName U1
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG -160 240 0
FLAG 192 192 +V
FLAG -160 128 +V
FLAG 192 288 -V
FLAG -288 240 0
FLAG -288 128 -V
FLAG 16 96 0
FLAG 0 368 0
TEXT 240 352 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2108-1.0.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
L1 N001 OUT 1
Rload OUT 0 4
C1 OUT 0 10
XU1 IN IN N001 OUT 0 ADP2108-x.x Rtop=80K ;pnba Vin)EN)SW)FB)GND
.tran .5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2108-1.0.asy)
.lib ADP2108-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 144
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 4
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ADP2108-1.0 352 224 R0
SYMATTR InstName U1
TEXT 600 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADL5567.asc
* Generated by LTspice 26.0.1 for Windows.
V5 N001 0 3.3
V6 N005 0 {PM}
V2 N003 0 0 AC 1
V1 VCOM 0 1.65
R1 VON 0 100
R2 0 VOP 100
E1 N002 VCOM N003 0 0.5
E2 VCOM N004 N003 0 0.5
XU1 N002 N004 N001 0 VOP VON VCOM N001 N005 ADL5567 ;pnba 1)2)3)4)5)6)7)8)9
.ac dec 20 1Meg 10G
.step param PM list 0 3.3
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADL5567.asy)
.lib ADL5567.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 11020 6404
WIRE -3728 480 -3744 480
WIRE -3632 480 -3648 480
WIRE -3632 496 -3632 480
WIRE -3904 560 -4016 560
WIRE -3744 560 -3744 480
WIRE -3712 560 -3744 560
WIRE -3504 560 -3552 560
WIRE -4016 576 -4016 560
WIRE -3744 576 -3744 560
WIRE -3712 576 -3712 560
WIRE -3504 576 -3504 560
WIRE -4064 592 -4128 592
WIRE -3904 624 -3904 560
WIRE -3792 624 -3904 624
WIRE -3552 640 -3552 560
WIRE -3552 640 -3616 640
WIRE -4128 672 -4128 592
WIRE -4128 672 -4208 672
WIRE -4016 672 -4016 656
WIRE -3872 672 -4016 672
WIRE -3840 672 -3872 672
WIRE -3792 672 -3840 672
WIRE -3504 672 -3504 656
WIRE -3440 672 -3504 672
WIRE -4016 688 -4016 672
WIRE -3504 688 -3504 672
WIRE -3440 688 -3440 672
WIRE -4208 704 -4208 672
WIRE -4128 704 -4128 672
WIRE -4064 704 -4128 704
WIRE -3552 704 -3616 704
WIRE -3792 720 -3904 720
WIRE -4016 784 -4016 768
WIRE -3904 784 -3904 720
WIRE -3904 784 -4016 784
WIRE -3872 784 -3872 672
WIRE -3712 784 -3712 768
WIRE -3552 784 -3552 704
WIRE -3504 784 -3504 768
WIRE -3504 784 -3552 784
WIRE -4208 800 -4208 784
WIRE -3872 912 -3872 864
WIRE -3712 912 -3712 864
FLAG -3744 768 0
FLAG -3632 496 0
FLAG -3712 912 0
FLAG -3440 688 0
FLAG -3504 784 VOP
FLAG -3504 560 VON
FLAG -4208 800 0
FLAG -3872 912 0
FLAG -3840 672 VCOM
FLAG -4064 640 0
FLAG -4064 752 0
SYMBOL voltage -3744 480 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V5
SYMATTR Value 3.3
SYMBOL voltage -3712 768 R0
SYMATTR InstName V6
SYMATTR Value {PM}
SYMBOL voltage -4208 688 R0
SYMATTR InstName V2
SYMATTR Value 0 AC 1
SYMBOL voltage -3872 768 R0
SYMATTR InstName V1
SYMATTR Value 1.65
SYMBOL res -3520 560 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res -3520 672 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL e -4016 560 R0
SYMATTR InstName E1
SYMATTR Value 0.5
SYMBOL e -4016 672 R0
SYMATTR InstName E2
SYMATTR Value 0.5
SYMBOL ADL5567 -3744 672 R0
SYMATTR InstName U1
TEXT -4232 856 Left 2 !.ac dec 20 1Meg 10G
TEXT -3672 896 Left 2 !.step param PM list 0 3.3
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3092.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3092.asy)
V1 N001 0 PWL(0 0 1 40)
Rload N004 0 10
XU1 MP_01 N002 N003 MP_02 N001 LT3092 ;pnba )SET)OUT))IN
R2 N002 N004 20K
R1 N003 N004 5
.tran 1
.lib LT3092.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 80 -176 80
WIRE -176 96 -176 80
WIRE 176 112 176 80
WIRE -176 192 -176 176
WIRE 112 352 112 336
WIRE 256 352 256 336
WIRE 112 448 112 432
WIRE 192 448 112 448
WIRE 256 448 256 432
WIRE 256 448 192 448
WIRE 192 464 192 448
WIRE 192 560 192 544
SYMBOL res 240 336 R0
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL res 176 448 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL res 96 336 R0
SYMATTR InstName R2
SYMATTR Value 20K
SYMBOL voltage -176 80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 40)
SYMBOL PowerProducts\\LT3092 176 224 R0
SYMATTR InstName U1
FLAG 192 560 0
FLAG -176 192 0
TEXT 376 432 Left 2 !.tran 1