Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4603.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4603.asy)
C2 OUT 0 100 Rser=5m
C3 N011 0 .001
Rload OUT 0 .25
V1 IN 0 6
R4 IN N003 10K
C1 OUT N004 100p
R2 N008 0 392K
XU1 IN 0 OUT 0 N006 N006 OUT 0 N002 N004 N007 N012 N010 N009 N008 N005 N003 N011 N001 N007 LTM4603 ;pnba Vin)PGND)Vout)Vosns-)Vout_LCL)DiffVout)Vosns+)SGND)Pgood)FB)DRVcc)MARG1)MARG0)Fset)MPGM)Comp)Run)Track/SS)PLLIN)INTVcc
R3 IN N002 100K
R1 N004 0 40.2K
.tran 750u startup
.lib LTM4603.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1032 680
WIRE -160 -16 -256 -16
WIRE 128 -16 -160 -16
WIRE -256 0 -256 -16
WIRE 128 0 128 -16
WIRE 272 0 272 -16
WIRE -160 48 -160 -16
WIRE -144 48 -160 48
WIRE 16 48 -64 48
WIRE 432 48 400 48
WIRE 640 48 432 48
WIRE 704 48 640 48
WIRE 704 64 704 48
WIRE -256 96 -256 80
WIRE -160 112 -160 48
WIRE -80 112 -160 112
WIRE 16 112 0 112
WIRE 432 112 400 112
WIRE 512 112 432 112
WIRE 608 112 592 112
WIRE 704 144 704 128
WIRE 16 176 0 176
WIRE 432 176 400 176
WIRE 16 240 0 240
WIRE 432 240 432 176
WIRE 432 240 400 240
WIRE 640 288 640 48
WIRE 736 288 640 288
WIRE 0 304 0 240
WIRE 16 304 0 304
WIRE 640 304 640 288
WIRE 640 304 400 304
WIRE 736 304 736 288
WIRE -80 368 -96 368
WIRE 16 368 0 368
WIRE 640 368 400 368
WIRE 640 400 640 368
WIRE 736 400 736 384
WIRE 736 400 640 400
WIRE 736 416 736 400
WIRE 16 432 0 432
WIRE 416 432 400 432
WIRE -64 496 -80 496
WIRE 16 496 0 496
WIRE 416 496 400 496
WIRE 128 576 128 560
WIRE 288 576 288 560
SYMBOL res 720 288 R0
SYMATTR InstName Rload
SYMATTR Value .25
SYMBOL res -160 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 416 48 R0
WINDOW 0 34 18 Left 2
WINDOW 3 35 47 Left 2
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL PowerProducts\\LTM4603 208 256 R0
SYMATTR InstName U1
SYMBOL cap 0 480 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL cap 688 64 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=5m
SYMBOL res 496 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 40.2K
SYMBOL res 16 384 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 392K
SYMBOL res -96 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL voltage -256 -16 R0
SYMATTR InstName V1
SYMATTR Value 6
FLAG 128 576 0
FLAG 288 576 0
FLAG 608 112 0
FLAG -96 368 0
FLAG 704 144 0
FLAG 736 416 0
FLAG -256 96 0
FLAG -80 496 0
FLAG 736 288 OUT
FLAG -256 -16 IN
TEXT 472 496 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\25ddda09b1f6_LTC6269.asc
* Generated by LTspice 26.0.1 for Windows.
* PhotoDiode
* FCI-125G-006
* 20K Ohm Gain Trans-Impedance Amplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6269.asy)
V1 +V 0 2.5
I1 +V N001 0 AC 1
V2 -V 0 -2.5
Cparasitic Out N001 150f
R3 Out N001 20K
XU1 NC_01 NC_02 N001 Out NC_03 NC_04 Out NC_05 NC_06 NC_07 LTC6269 ;pnba +INA)-INA)OUTA)V+)V-)+INB)-INB)OUTB)_SDA)_SDB
C3 +V N001 700f
.ac oct 10 10K 1G
.lib LTC6269.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4472 1028
WIRE -2784 -656 -2784 -720
WIRE -2784 -656 -2912 -656
WIRE -2784 -624 -2784 -656
WIRE -2912 -608 -2912 -656
WIRE -2576 -608 -2640 -608
WIRE -2448 -608 -2512 -608
WIRE -2912 -512 -2912 -544
WIRE -2784 -512 -2784 -544
WIRE -2784 -512 -2912 -512
WIRE -2640 -512 -2640 -608
WIRE -2640 -512 -2784 -512
WIRE -2576 -512 -2640 -512
WIRE -2448 -512 -2448 -608
WIRE -2448 -512 -2496 -512
WIRE -2960 -352 -2960 -368
WIRE -2832 -352 -2832 -368
WIRE -2640 -352 -2640 -512
WIRE -2624 -352 -2640 -352
WIRE -2448 -320 -2448 -512
WIRE -2448 -320 -2480 -320
WIRE -2416 -320 -2448 -320
WIRE -2624 -288 -2656 -288
WIRE -2960 -256 -2960 -272
WIRE -2832 -256 -2832 -272
RECTANGLE Normal -2696 -464 -2992 -704 2
SYMBOL current -2784 -624 R0
WINDOW 3 38 44 Left 2
WINDOW 123 16 80 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMBOL cap -2928 -608 R0
SYMATTR InstName C3
SYMATTR Value 700f
SYMBOL res -2480 -528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL voltage -2832 -368 R0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL opamps\\LTC6269 -2592 -320 R0
SYMATTR InstName U1
SYMBOL cap -2512 -624 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName Cparasitic
SYMATTR Value 150f
SYMBOL voltage -2960 -368 R0
SYMATTR InstName V1
SYMATTR Value 2.5
FLAG -2960 -256 0
FLAG -2832 -256 0
FLAG -2960 -368 +V
FLAG -2832 -368 -V
FLAG -2656 -288 0
FLAG -2416 -320 Out
FLAG -2784 -720 +V
FLAG -2592 -400 +V
FLAG -2544 -240 +V
FLAG -2592 -240 -V
TEXT -2432 -240 Left 2 !.ac oct 10 10K 1G
TEXT -2872 -680 Center 2 ;PhotoDiode
TEXT -2848 -488 Center 2 ;FCI-125G-006
TEXT -2696 -800 Bottom 2 ;20K Ohm Gain Trans-Impedance Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX4730.asc
* Generated by LTspice 26.0.1 for Windows.
V1 vNO 0 3
V3 vIN 0 PULSE(0 3.3 0 20n 20n 10u 20u)
R1 vCOM 0 301
C1 vCOM 0 36p
V4 +V 0 3.3
XU1 vIN vNO vCOM 0 +V 0 MAX4730 ;pnba IN)SA)D)SB)V+)GND
.tran 100u
* Notes:\nSwitch shown for a logic 0 input\nOn resistance performance at 5V supply\nCharge injection is not included\nBandwidth is 266 MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\MAX4730.asy)
.lib MAX4730.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1728 -272 -1904 -272
WIRE -1696 -272 -1728 -272
WIRE -1904 -256 -1904 -272
WIRE -1456 -240 -1504 -240
WIRE -1408 -240 -1456 -240
WIRE -1312 -240 -1408 -240
WIRE -1408 -224 -1408 -240
WIRE -1312 -224 -1312 -240
WIRE -1696 -208 -1776 -208
WIRE -1776 -192 -1776 -208
WIRE -1904 -160 -1904 -176
WIRE -1728 -144 -1776 -144
WIRE -1696 -144 -1728 -144
WIRE -1408 -128 -1408 -144
WIRE -1312 -128 -1312 -160
WIRE -1776 -48 -1776 -144
WIRE -1600 -16 -1600 -32
WIRE -1776 48 -1776 32
FLAG -1904 -160 0
FLAG -1776 -192 0
FLAG -1776 48 0
FLAG -1600 -368 +V
FLAG -1408 -128 0
FLAG -1600 -16 0
FLAG -1312 -128 0
FLAG -2064 -176 0
FLAG -2064 -256 +V
FLAG -1728 -272 vNO
FLAG -1728 -144 vIN
FLAG -1456 -240 vCOM
SYMBOL voltage -1904 -272 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL voltage -1776 -64 R0
WINDOW 3 34 96 Left 2
SYMATTR Value PULSE(0 3.3 0 20n 20n 10u 20u)
SYMATTR InstName V3
SYMBOL res -1424 -240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL cap -1328 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -2064 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 3.3
SYMBOL MAX4730 -1600 -192 R0
SYMATTR InstName U1
TEXT -1488 -16 Left 2 !.tran 100u
TEXT -2008 -560 Left 2 ;Notes:\nSwitch shown for a logic 0 input\nOn resistance performance at 5V supply\nCharge injection is not included\nBandwidth is 266 MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6905-100.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6905-100.asy)
V1 N001 0 3
V3 N003 0 PWL(0 3 .35u 3 +10n 1.5 .65u 1.5 +10n 0)
V2 N002 0 PULSE(0 3 100n 10n 10n 200n 300n)
XU1 N001 0 N002 N003 OUT LTC6905-100 ;pnba V+)GND)0E)DIV)OUT
.tran 1u
.lib LTC6905-100.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 680
WIRE 32 160 -80 160
WIRE 288 160 256 160
WIRE -80 176 -80 160
WIRE 32 240 16 240
WIRE -80 272 -80 256
WIRE 32 320 -208 320
WIRE 368 320 256 320
WIRE -208 336 -208 320
WIRE 368 336 368 320
WIRE -208 432 -208 416
WIRE 368 432 368 416
SYMBOL LTC6905-100 144 240 R0
SYMATTR InstName U1
SYMBOL voltage 368 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 3 .35u 3 +10n 1.5 .65u 1.5 +10n 0)
SYMBOL voltage -80 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL voltage -208 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 3 100n 10n 10n 200n 300n)
FLAG -80 272 0
FLAG 16 240 0
FLAG -208 432 0
FLAG 368 432 0
FLAG 288 160 OUT
TEXT 472 488 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX44260.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX44260.asy)
V1 IN 0 SINE(0 50m 100k)
XU1 IN OUT Vcc Vee OUT Vcc MAX44260 ;pnba In+)In-)V+)V-)OUT)SHDN
Vcc Vcc 0 1.65
Vee 0 Vee 1.65
CL OUT 0 15p
RL OUT 0 10k
.tran 10u
.lib MAX44260.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 64 288 64 272
WIRE 416 352 416 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 64 448 64 400
WIRE 416 448 416 416
WIRE 448 448 448 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 64 544 64 528
WIRE 304 592 304 576
SYMBOL MAX44260 432 400 R0
SYMATTR InstName U1
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 1.65
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 100k)
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 10k
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 1.65
FLAG 720 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
FLAG 448 448 Vcc
TEXT 16 632 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\4e6aceae9e8c_VA-F2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 b 0 50
D1 a b RB085BGE-30
V1 a 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 50
.step temp list 0 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 128 -144 128
WIRE 240 128 80 128
WIRE -144 192 -144 128
WIRE 240 192 240 128
WIRE -144 352 -144 272
WIRE 48 352 -144 352
WIRE 240 352 240 272
WIRE 240 352 48 352
WIRE 48 368 48 352
SYMBOL voltage -144 176 R0
WINDOW 3 24 96 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value ""
SYMATTR InstName V1
SYMBOL schottky 16 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 -7 36 VBottom 2
SYMATTR InstName D1
SYMATTR Value RB085BGE-30
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL Misc\\EuropeanResistor 224 176 R0
SYMATTR InstName R1
SYMATTR Value 50
FLAG -144 128 a
FLAG 240 128 b
FLAG 48 368 0
TEXT -144 392 Left 2 !.dc V1 0 50
TEXT -152 424 Left 2 !.step temp list 0 100
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4358.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4358.asy)
XU2 N002 N003 N002 NC_02 N002 0 LTC4358 ;pnba OUT)IN)Drain)Gate)Vdd)GND
XU1 N002 N001 N002 NC_01 N002 0 LTC4358 ;pnba OUT)IN)Drain)Gate)Vdd)GND
Rload N002 0 2
V1 N001 0 PWL(0 12 50m 0 100m 12)
V2 N003 0 PWL(0 0 50m 12 100m 0)
.tran 100m
.lib LTC4358.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 948 1284
WIRE 0 272 -384 272
WIRE 352 272 256 272
WIRE -384 288 -384 272
WIRE 352 336 352 272
WIRE 352 336 256 336
WIRE -384 384 -384 368
WIRE 352 400 352 336
WIRE 352 400 256 400
WIRE 128 464 128 448
WIRE 352 480 352 400
WIRE 432 480 352 480
WIRE 432 496 432 480
WIRE 0 576 -384 576
WIRE 352 576 352 480
WIRE 352 576 256 576
WIRE -384 592 -384 576
WIRE 432 592 432 576
WIRE 352 640 352 576
WIRE 352 640 256 640
WIRE -384 688 -384 672
WIRE 352 704 352 640
WIRE 352 704 256 704
WIRE 128 768 128 752
SYMBOL res 416 480 R0
SYMATTR InstName Rload
SYMATTR Value 2
SYMBOL voltage -384 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PWL(0 12 50m 0 100m 12)
SYMATTR InstName V1
SYMBOL voltage -384 576 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PWL(0 0 50m 12 100m 0)
SYMATTR InstName V2
SYMBOL LTC4358 128 640 R0
SYMATTR InstName U2
SYMBOL LTC4358 128 336 R0
SYMATTR InstName U1
FLAG 128 464 0
FLAG -384 384 0
FLAG 128 768 0
FLAG -384 688 0
FLAG 432 592 0
TEXT 472 768 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1085.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1085.asy)
V1 IN 0 PWL(0 0 1 10) Rser=0.1
R2 N001 0 365
R1 OUT N001 121
C1 OUT 0 10
XU1 N001 OUT IN LT1085 ;pnba ADJ)OUT)IN
Rload OUT 0 10
.tran 1
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1328 896
WIRE 1856 896 1808 896
WIRE 1952 896 1856 896
WIRE 2064 896 1952 896
WIRE 1328 912 1328 896
WIRE 1856 912 1856 896
WIRE 1952 912 1952 896
WIRE 2064 912 2064 896
WIRE 1328 1008 1328 992
WIRE 1952 1008 1952 976
WIRE 2064 1008 2064 992
WIRE 1680 1024 1680 992
WIRE 1856 1024 1856 992
WIRE 1856 1024 1680 1024
WIRE 1856 1040 1856 1024
WIRE 1856 1136 1856 1120
SYMBOL RES 2048 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL RES 1840 896 R0
SYMATTR InstName R1
SYMATTR Value 121
SYMBOL cap 1936 912 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL RES 1840 1024 R0
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL VOLTAGE 1328 896 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMATTR SpiceLine Rser=0.1
SYMBOL PowerProducts\\LT1085 1680 896 R0
SYMATTR InstName U1
FLAG 2064 896 OUT
FLAG 1856 1136 0
FLAG 2064 1008 0
FLAG 1328 1008 0
FLAG 1952 1008 0
FLAG 1328 896 IN
TEXT 1968 1088 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\d446c9af88f9_Integrator_using_op-amp.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
V1 P001 0 15v
C1 Vout N002 4n7
V3 Vin 0 PULSE(-2.5 2.5 0 0 0 100u 200u)
R1 Vout N002 100k
XU1 NC_01 N002 N001 P001 Vout LT1001 ;pnba In+)In-)V+)V-)OUT
R2 N002 Vin 10k
V2 N001 0 15v
.tran 0.05
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 48 208 48
WIRE 112 80 48 80
WIRE 272 80 192 80
WIRE 48 160 48 80
WIRE 112 160 48 160
WIRE 272 160 272 80
WIRE 272 160 176 160
WIRE 208 240 208 48
WIRE 48 256 48 160
WIRE 48 256 -80 256
WIRE 176 256 48 256
WIRE -256 272 -304 272
WIRE -192 272 -256 272
WIRE -80 272 -80 256
WIRE -80 272 -112 272
WIRE 272 272 272 160
WIRE 272 272 240 272
WIRE 432 272 272 272
WIRE -256 368 -256 272
WIRE 208 416 208 384
IOPIN -304 272 In
IOPIN 432 272 Out
SYMBOL voltage 352 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15v
SYMBOL voltage -256 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(-2.5 2.5 0 0 0 100u 200u)
SYMBOL voltage 208 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15v
SYMBOL res 208 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res -96 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL OpAmps\\OP07 208 208 R0
SYMATTR InstName U1
SYMBOL cap 176 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 47 46 Bottom 2
SYMATTR InstName C1
SYMATTR Value 4n7
FLAG -304 272 Vin
FLAG 432 272 Vout
FLAG 208 416 0
FLAG 352 128 0
FLAG -256 448 0
TEXT -398 472 Left 2 !.tran 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7172.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7172.asy)
C1 OUT 0 4.7 Rser=1.5m
Rload OUT 0 2.5
R1 OUT N002 15K
V1 IN 0 3.5
XU1 IN N002 IN N001 OUT 0 ADM7172 ;pnba Vin)Sense)EN)SS)Vout)GND
R2 N002 0 10K
C2 0 N001 1n
.tran 5m startup
.lib ADM7172.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 400 32 352 32
WIRE 528 32 400 32
WIRE 624 32 528 32
WIRE -32 48 -32 32
WIRE 528 48 528 32
WIRE 624 48 624 32
WIRE 400 80 400 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 528 144 528 112
WIRE 624 144 624 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 400 224 400 160
WIRE 400 224 352 224
WIRE 400 240 400 224
WIRE 224 304 224 288
WIRE 400 336 400 320
SYMBOL res 384 224 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 384 64 R0
SYMATTR InstName R1
SYMATTR Value 15K
SYMBOL cap 16 208 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.5
SYMBOL cap 512 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 608 32 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL ADM7172 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 624 144 0
FLAG 528 144 0
FLAG -32 32 IN
FLAG 624 32 OUT
FLAG 400 336 0
TEXT 568 288 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\133db7b0177f_ts12.asc
* Generated by LTspice 26.0.1 for Windows.
* Cuadripolo A
* Cuadripolo B
* VNIC
R1 N004 N005 100
R5 N003 N005 {39/32}
C1 N002 0 {8/7}
I1 0 N001 SINE(0 1 10k 0) AC 1 0
XU1 N003 N004 N005 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R4 N002 N001 {49/96}
C2 N001 0 {48/7}
R3 N003 N002 1
R2 N004 0 100
C3 N003 N005 {8/39}
.ac oct 100 0.001 1K
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 680
WIRE -144 80 -240 80
WIRE -96 80 -144 80
WIRE 48 80 -16 80
WIRE 128 80 48 80
WIRE 512 80 208 80
WIRE 704 80 512 80
WIRE 832 80 704 80
WIRE 1024 80 832 80
WIRE -240 96 -240 80
WIRE 704 96 704 80
WIRE 832 96 832 80
WIRE -144 128 -144 80
WIRE 48 128 48 80
WIRE 336 144 320 144
WIRE 432 144 416 144
WIRE 480 144 432 144
WIRE 480 176 480 144
WIRE 512 176 512 80
WIRE 432 192 432 144
WIRE -240 208 -240 176
WIRE -144 208 -144 192
WIRE -144 208 -240 208
WIRE 48 208 48 192
WIRE 48 208 -144 208
WIRE 208 208 48 208
WIRE 320 208 320 144
WIRE 320 208 208 208
WIRE 704 208 704 176
WIRE 704 208 624 208
WIRE 832 208 832 160
WIRE 832 208 704 208
WIRE 1024 208 832 208
WIRE 208 256 208 208
WIRE 432 336 432 272
WIRE 496 336 496 240
WIRE 496 336 432 336
WIRE 624 336 624 208
WIRE 624 336 496 336
RECTANGLE Normal 256 288 -176 32 2
RECTANGLE Normal 576 400 288 16 2
RECTANGLE Normal 960 336 640 16 2
SYMBOL res 0 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value {49/96}
SYMBOL OpAmps\\opamp 560 208 R90
SYMATTR InstName U1
SYMBOL cap -160 128 R0
SYMATTR InstName C2
SYMATTR Value {48/7}
SYMBOL res 688 80 R0
SYMATTR InstName R5
SYMATTR Value {39/32}
SYMBOL res 432 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL current -240 176 R180
WINDOW 3 24 136 Left 2
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value SINE(0 1 10k 0)
SYMATTR Value2 AC 1 0
SYMBOL res 416 176 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL cap 32 128 R0
SYMATTR InstName C1
SYMATTR Value {8/7}
SYMBOL res 224 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL cap 816 96 R0
SYMATTR InstName C3
SYMATTR Value {8/39}
FLAG 208 256 0
TEXT -272 -72 Left 2 !.ac oct 100 0.001 1K
TEXT 88 336 Left 2 !.lib opamp.sub
TEXT -32 304 Left 2 ;Cuadripolo A
TEXT 736 352 Left 2 ;Cuadripolo B
TEXT 400 416 Left 2 ;VNIC
* Z:\home\khalils\Downloads\files\data\raw_asc\0aa8a57a3938_lab3_zad1.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 0 N_1u l=1u w=5u
VGS N002 0 0
VDS N001 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmos.txt
.dc VDS 0 5 VGS 0 5 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 48 176 48
WIRE 176 112 176 48
WIRE 240 160 176 160
WIRE 352 160 352 128
WIRE 128 192 0 192
WIRE 176 256 176 208
WIRE 0 304 0 272
SYMBOL nmos4 128 112 R0
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=1u w=5u
SYMBOL voltage 352 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 0
SYMBOL voltage 0 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 0
FLAG 176 256 0
FLAG 240 160 0
FLAG 352 160 0
FLAG 0 304 0
TEXT -104 24 Left 2 !.include cmos.txt
TEXT -104 56 Left 2 !.dc VDS 0 5 VGS 0 5 1
* Z:\home\khalils\Downloads\files\data\raw_asc\12e5fb8e0ad6_Motor.asc
* Generated by LTspice 26.0.1 for Windows.
BE_BMF N005 0 V=I(RB)*kemf
RM N003 N005 {rm}
LM N001 N003 {lm}
V1 N001 0 36
LJ N002 N004 {lj}
RB N004 0 {rb}
BH_TORQ N002 0 V=I(E_BMF)*kt
.param lm=1.5m rm=0.5 kt=0.05 rb=0.0001 lj=0.00025 kemf=kt
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 -352 -240 -352
WIRE 560 -304 304 -304
WIRE -240 -288 -240 -352
WIRE 64 -288 64 -352
WIRE -240 -176 -240 -208
WIRE 304 -176 304 -304
WIRE 560 -176 560 -304
WIRE 64 -160 64 -208
WIRE 304 -32 304 -96
WIRE 560 -32 560 -96
WIRE 64 -16 64 -80
WIRE 560 128 560 48
WIRE 64 144 64 64
FLAG 64 144 0
FLAG -240 -176 0
FLAG 560 128 0
FLAG 304 -32 0
SYMBOL bv 64 -32 R0
SYMATTR InstName E_BMF
SYMATTR Value V=I(RB)*kemf
SYMBOL res 48 -176 R0
SYMATTR InstName RM
SYMATTR Value {rm}
SYMBOL ind 48 -304 R0
SYMATTR InstName LM
SYMATTR Value {lm}
SYMBOL voltage -240 -304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 36
SYMBOL ind 544 -192 R0
SYMATTR InstName LJ
SYMATTR Value {lj}
SYMBOL res 544 -48 R0
SYMATTR InstName RB
SYMATTR Value {rb}
SYMBOL bv 304 -192 R0
SYMATTR InstName H_TORQ
SYMATTR Value V=I(E_BMF)*kt
TEXT -520 264 Left 2 !.param lm=1.5m rm=0.5 kt=0.05 rb=0.0001 lj=0.00025 kemf=kt
TEXT -522 284 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\4440e6c9288c_v1.1.asc
* Generated by LTspice 26.0.1 for Windows.
S1 0 N001 IN 0 SW
R1 VCC N001 4.7k
V1 VCC 0 3.3
V3 N003 0 PULSE(0 5 15m 1n 1n 250u 500u 10)
V2 N002 0 PULSE(0 5 20m 1n 1n 30m 80m 1)
C1 OUT 0 100n Rser=0.05
D2 N002 IN D
D3 N003 IN D
R2 OUT N001 4.7k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100m
.model SW SW(Ron=1u Roff=100Meg Vt=3.3)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 984 680
WIRE 176 32 176 0
WIRE 304 64 304 0
WIRE 176 144 176 112
WIRE 304 192 304 144
WIRE 448 192 304 192
WIRE 592 192 528 192
WIRE 720 192 592 192
WIRE 592 224 592 192
WIRE 304 240 304 192
WIRE 48 256 -64 256
WIRE 192 256 48 256
WIRE 256 256 192 256
WIRE -64 288 -64 256
WIRE 48 288 48 256
WIRE 256 304 160 304
WIRE 592 320 592 288
WIRE 304 368 304 320
WIRE -64 384 -64 352
WIRE 48 384 48 352
WIRE -64 496 -64 464
WIRE 48 496 48 464
WIRE 48 496 -64 496
WIRE 160 496 160 304
WIRE 160 496 48 496
WIRE 48 544 48 496
FLAG 176 144 0
FLAG 720 192 OUT
IOPIN 720 192 Out
FLAG 192 256 IN
FLAG 304 368 0
FLAG 592 320 0
FLAG 48 544 0
FLAG 176 0 VCC
FLAG 304 0 VCC
SYMBOL sw 304 336 M180
WINDOW 0 41 47 Left 2
WINDOW 3 40 70 Left 2
SYMATTR InstName S1
SYMBOL res 288 48 R0
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL voltage 176 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage 48 368 M0
WINDOW 3 41 64 Invisible 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 15m 1n 1n 250u 500u 10)
SYMATTR InstName V3
SYMBOL voltage -64 368 M0
WINDOW 3 41 64 Invisible 2
WINDOW 123 0 0 Left 0
WINDOW 39 39 69 Left 2
SYMATTR Value PULSE(0 5 20m 1n 1n 30m 80m 1)
SYMATTR InstName V2
SYMBOL cap 576 224 R0
SYMATTR InstName C1
SYMATTR Value 100n
SYMATTR SpiceLine Rser=0.05
SYMBOL diode -80 352 M180
WINDOW 0 49 40 Left 2
WINDOW 3 48 16 Left 2
SYMATTR InstName D2
SYMBOL diode 32 352 M180
WINDOW 0 49 40 Left 2
WINDOW 3 48 16 Left 2
SYMATTR InstName D3
SYMBOL res 544 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.7k
TEXT 344 -8 Left 2 !.tran 100m
TEXT 344 16 Left 2 !.model SW SW(Ron=1u Roff=100Meg Vt=3.3)