Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8669.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8669.asy)
R2 OUT N001 10K
V2 -V 0 -5
Vin IN 0 SINE(0 1 10K)
Rload OUT 0 10K
XU1 IN N001 +V -V OUT AD8669 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
R1 N001 0 10K
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 416 -1232 400 -1232
WIRE 528 -1232 496 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 128 -1152 128 -1168
WIRE 240 -1152 240 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 128 -1056 128 -1072
WIRE 240 -1056 240 -1072
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 240 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 512 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL Opamps\\AD8669 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 128 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 576 -1072 -V
FLAG 400 -1232 0
FLAG 768 -992 0
FLAG 128 -1168 +V
FLAG 128 -1056 0
FLAG 240 -1168 -V
FLAG 240 -1056 0
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\216e8adae336_NAND_2.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 B 0 0 NMOS l=600n w=3u
M2 ANANDB A N001 0 NMOS l=600n w=3u
M4 ANANDB A vdd vdd PMOS l=600n w=3u
M3 ANANDB B vdd vdd PMOS l=600n w=3u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 -96 176 -128
WIRE 400 -96 176 -96
WIRE 176 -64 176 -96
WIRE 400 -64 400 -96
WIRE 128 -48 112 -48
WIRE 352 -48 256 -48
WIRE 176 48 176 32
WIRE 272 48 176 48
WIRE 400 48 400 32
WIRE 400 48 272 48
WIRE 528 48 400 48
WIRE 256 64 256 -48
WIRE 256 64 208 64
WIRE 272 64 272 48
WIRE 208 144 208 64
WIRE 208 144 80 144
WIRE 224 144 208 144
WIRE 272 192 272 160
WIRE 112 272 112 -48
WIRE 112 272 80 272
WIRE 224 272 112 272
WIRE 272 336 272 288
IOPIN 80 144 In
IOPIN 80 272 In
IOPIN 176 -128 In
IOPIN 528 48 Out
SYMBOL pmos4 352 32 M180
WINDOW 123 56 100 Left 2
SYMATTR InstName M4
SYMATTR Value2 l=600n w=3u
SYMBOL pmos4 128 32 M180
WINDOW 123 56 100 Left 2
SYMATTR InstName M3
SYMATTR Value2 l=600n w=3u
SYMBOL nmos4 224 192 R0
WINDOW 123 56 100 Left 2
SYMATTR InstName M1
SYMATTR Value2 l=600n w=3u
SYMBOL nmos4 224 64 R0
WINDOW 123 56 100 Left 2
SYMATTR InstName M2
SYMATTR Value2 l=600n w=3u
FLAG 272 336 0
FLAG 272 240 0
FLAG 272 112 0
FLAG 80 144 A
FLAG 80 272 B
FLAG 176 -128 vdd
FLAG 176 -16 vdd
FLAG 400 -16 vdd
FLAG 528 48 ANANDB
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3461.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3461.asy)
V2 N002 0 PWL(0 0 1m 5)
XU1 N001 0 N003 N002 OUT IN LT3461 ;pnba SW)GND)FB)_SHDN)Vout)Vin
L1 IN N001 15
C2 N003 OUT 15p
C1 0 OUT 2.2
R1 OUT N003 261K
Rload OUT 0 300
V1 IN 0 5
R2 N003 0 30.1K
.tran 600u startup
.lib LT3461.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2520 1844
WIRE 1584 1264 1504 1264
WIRE 1648 1264 1584 1264
WIRE 1760 1264 1728 1264
WIRE 1504 1280 1504 1264
WIRE 1760 1312 1760 1264
WIRE 1584 1360 1584 1264
WIRE 1616 1360 1584 1360
WIRE 1968 1360 1904 1360
WIRE 2064 1360 1968 1360
WIRE 2144 1360 2064 1360
WIRE 2240 1360 2144 1360
WIRE 1504 1376 1504 1360
WIRE 2240 1376 2240 1360
WIRE 1968 1392 1968 1360
WIRE 2144 1392 2144 1360
WIRE 2064 1408 2064 1360
WIRE 2144 1472 2144 1456
WIRE 2240 1472 2240 1456
WIRE 1488 1520 1456 1520
WIRE 1616 1520 1568 1520
WIRE 1968 1520 1968 1472
WIRE 1968 1520 1904 1520
WIRE 2064 1520 2064 1472
WIRE 2064 1520 1968 1520
WIRE 1968 1536 1968 1520
WIRE 1760 1600 1760 1568
WIRE 1968 1632 1968 1616
SYMBOL VOLTAGE 1584 1520 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 1m 5)
SYMBOL res 2224 1360 R0
SYMATTR InstName Rload
SYMATTR Value 300
SYMBOL cap 2128 1456 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL res 1952 1520 R0
SYMATTR InstName R2
SYMATTR Value 30.1K
SYMBOL res 1952 1376 R0
SYMATTR InstName R1
SYMATTR Value 261K
SYMBOL PowerProducts\\LT3461 1760 1440 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1504 1264 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 1632 1280 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 15
SYMBOL cap 2048 1472 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 15p
FLAG 1760 1600 0
FLAG 1504 1376 0
FLAG 1968 1632 0
FLAG 2144 1472 0
FLAG 2240 1472 0
FLAG 1456 1520 0
FLAG 2240 1360 OUT
FLAG 1504 1264 IN
TEXT 2088 1584 Left 2 !.tran 600u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1fdc55414e1e_EDM_Powersupply_V4_freq.asc
* Generated by LTspice 26.0.1 for Windows.
* High-side switching
* Dumped some components here: easy for copying
* V4a: Gate driver included
+ CJO=26.5p M=0.333 N=1.45 TT=4.32u )
+IS=1.18724e-05 RS=0.0227191 N=1.22913 EG=0.645632
+XTI=0.5 BV=45 IBV=0.0001 CJO=1e-11
+VJ=0.7 M=0.5 FC=0.5 TT=0
+KF=0 AF=1
XM1 N001 N004 0 IPW65R070C6_L0 ;pnba D)G)S
R4 N002 N003 10
V4 N002 0 10
V1 N004 0 PULSE(0 5 0 20000n 20000n 2u 20u)
L1 N003 N001 6.4 IC=0A
.include C:\Users\joey2\Documents\3e jaar\BAP\Github\EDM_Powersupply\Library\IPW65R037C6_mosfet\SimulationModel_CoolMOS_C6_MOSFET_650V_Spice.lib
.tran 0 30u 0 1u
.model BZX84C6V2L D(Is=1.5n Rs=.5 Cjo=185p nbv=3 bv=6.2 Ibv=1m Vpk=6.2 mfg=OnSemi type=Zener)
.model MyIdealDiode D(Ron=0 Roff=1Meg Vfwd=0.7)
.MODEL 1N4007 D ( IS=76.9p RS=42.0m BV=1.00k IBV=5.00u
.MODEL Dmbr745 d
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1876 680
WIRE 752 -112 656 -112
WIRE 928 -112 816 -112
WIRE 656 -32 656 -112
WIRE 656 -32 624 -32
WIRE 800 -32 736 -32
WIRE 928 -32 928 -112
WIRE 928 -32 880 -32
WIRE 976 -32 928 -32
WIRE 624 48 624 -32
WIRE 624 64 624 48
WIRE 976 64 976 -32
WIRE 544 80 480 80
WIRE 544 128 544 80
WIRE 576 128 544 128
WIRE 480 144 480 80
WIRE 480 240 480 224
WIRE 624 240 624 144
WIRE 624 240 480 240
WIRE 624 256 624 240
WIRE 976 256 976 144
WIRE 976 256 624 256
WIRE 480 272 480 240
WIRE 976 272 976 256
RECTANGLE Normal 560 -256 368 -320 2
SYMBOL nmos 576 48 R0
SYMATTR InstName M1
SYMATTR Value IPW65R070C6_L0
SYMATTR Prefix X
SYMBOL voltage 480 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -51 153 VLeft 2
SYMATTR Value PULSE(0 5 0 20000n 20000n 2u 20u)
SYMATTR InstName V1
SYMBOL res 896 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL ind 752 -48 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value 6.4u
SYMATTR SpiceLine IC=0A
SYMBOL voltage 976 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 10
FLAG 480 272 0
FLAG 976 272 0
TEXT -720 520 Left 2 !.include C:\\Users\\joey2\\Documents\\3e jaar\\BAP\\Github\\EDM_Powersupply\\Library\\IPW65R037C6_mosfet\\SimulationModel_CoolMOS_C6_MOSFET_650V_Spice.lib
TEXT -720 480 Left 2 !.tran 0 30u 0 1u
TEXT 752 -224 Left 2 ;High-side switching
TEXT 1200 -72 Left 2 ;Dumped some components here: easy for copying
TEXT 1032 -160 Left 2 !.model BZX84C6V2L D(Is=1.5n Rs=.5 Cjo=185p nbv=3 bv=6.2 Ibv=1m Vpk=6.2 mfg=OnSemi type=Zener)
TEXT 1040 -128 Left 2 !.model MyIdealDiode D(Ron=0 Roff=1Meg Vfwd=0.7)
TEXT 400 -288 Left 2 ;V4a: Gate driver included
TEXT 1040 -104 Left 2 !.MODEL 1N4007 D  ( IS=76.9p RS=42.0m BV=1.00k IBV=5.00u\n+ CJO=26.5p  M=0.333 N=1.45 TT=4.32u )
TEXT 1040 -48 Left 2 !.MODEL Dmbr745 d\n+IS=1.18724e-05 RS=0.0227191 N=1.22913 EG=0.645632\n+XTI=0.5 BV=45 IBV=0.0001 CJO=1e-11\n+VJ=0.7 M=0.5 FC=0.5 TT=0\n+KF=0 AF=1
* Z:\tmp\asc_dec_bjh7r6w2\09ff6185ff7e_class_e_10mhz_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
RGen N011 N010 10
C3 N005 0 248.551pF
L3 N004 N005 118.359nH
L4 N006 0 100n
L2 N003 N004 219.568nH
C2 N003 N002 184.159pF
L1 N001 N002 220n
R1 N009 N012 75
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1880 392
WIRE 272 -272 0 -272
WIRE 272 -224 272 -272
WIRE 272 -112 272 -144
WIRE 448 -112 272 -112
WIRE 528 -112 448 -112
WIRE 656 -112 592 -112
WIRE 800 -112 736 -112
WIRE 928 -112 880 -112
WIRE 976 -112 928 -112
WIRE 1184 -112 1120 -112
WIRE 1280 -112 1184 -112
WIRE 1360 -112 1280 -112
WIRE 1488 -112 1424 -112
WIRE 1712 -112 1600 -112
WIRE 1824 -112 1776 -112
WIRE 0 -96 0 -144
WIRE 1280 -64 1280 -112
WIRE 1824 -64 1824 -112
WIRE 448 -48 448 -112
WIRE 928 -48 928 -112
WIRE 1184 -48 1184 -112
WIRE 272 -16 272 -112
WIRE 64 0 0 0
WIRE 144 32 144 0
WIRE 208 32 144 32
WIRE 1184 48 1184 16
WIRE 1280 48 1280 16
WIRE 1280 48 1184 48
WIRE 1488 48 1280 48
WIRE 1824 48 1824 16
WIRE 1824 48 1600 48
WIRE 208 64 208 32
WIRE 224 64 208 64
WIRE 448 64 448 16
WIRE 928 64 928 16
WIRE 1008 64 1008 16
WIRE 0 80 0 0
WIRE 272 112 272 80
WIRE 0 208 0 160
SYMBOL res 160 -16 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName RGen
SYMATTR Value 10
SYMBOL cap 944 -48 M0
SYMATTR InstName C3
SYMATTR Value 248.551pF
SYMBOL ind 784 -96 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
SYMATTR InstName L3
SYMATTR Value 118.359nH
SYMBOL ind 1264 -80 R0
SYMATTR InstName L4
SYMATTR Value 100n
SYMBOL ind 640 -96 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
SYMATTR InstName L2
SYMATTR Value 219.568nH
SYMBOL cap 592 -128 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C2
SYMATTR Value 184.159pF
SYMBOL ind 256 -240 R0
SYMATTR InstName L1
SYMATTR Value 220n
SYMBOL res 1808 -80 R0
SYMATTR InstName R1
SYMATTR Value 75
FLAG 272 112 0
FLAG 0 -96 0
FLAG 448 64 0
FLAG 928 64 0
FLAG 1008 64 0
FLAG 1184 48 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8301.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8301.asy)
L1 IN N002 40 Rser=500m Cpar=1p
R3 N002 N003 154K
Rload OUT 0 5
V1 IN 0 24
L2 0 N001 4.4 Rser=20m Cpar=.2p
C1 OUT 0 100 V=10 Irms=2.2 Rser=0.025 Lser=0 mfg="KEMET" pn="T520V107M010ASE025" type="Tantalum"
K1 L1 L2 1
XU1 IN 0 N003 N002 IN LT8301 ;pnba EN/UVLO)GND)RFB)SW)Vin
D1 N001 OUT MBRS360
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
.lib LT8301.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 48 16 -48 16
WIRE 416 16 48 16
WIRE 560 16 464 16
WIRE 688 16 624 16
WIRE 784 16 688 16
WIRE -48 32 -48 16
WIRE 416 32 416 16
WIRE 464 32 464 16
WIRE 688 32 688 16
WIRE 784 32 784 16
WIRE -48 128 -48 112
WIRE 464 128 464 112
WIRE 688 128 688 96
WIRE 784 128 784 112
WIRE 48 144 48 16
WIRE 96 144 48 144
WIRE 416 144 416 112
WIRE 416 144 320 144
WIRE 416 176 416 144
WIRE 48 272 48 144
WIRE 96 272 48 272
WIRE 416 272 416 256
WIRE 416 272 320 272
WIRE 208 336 208 320
SYMBOL ind2 400 16 R0
WINDOW 0 0 39 Right 2
WINDOW 3 0 77 Right 2
SYMATTR InstName L1
SYMATTR Value 40
SYMATTR Type ind
SYMATTR SpiceLine Rser=500m Cpar=1p
SYMBOL PowerProducts\\LT8301 208 208 R0
SYMATTR InstName U1
SYMBOL schottky 560 32 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage -48 16 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL ind2 480 128 R180
WINDOW 0 -4 72 Right 2
WINDOW 3 -1 33 Right 2
SYMATTR InstName L2
SYMATTR Value 4.4
SYMATTR Type ind
SYMATTR SpiceLine Rser=20m Cpar=.2p
SYMBOL res 400 160 R0
SYMATTR InstName R3
SYMATTR Value 154K
SYMBOL polcap 672 32 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 100
SYMATTR InstName C1
SYMATTR SpiceLine V=10 Irms=2.2 Rser=0.025 Lser=0 mfg="KEMET" pn="T520V107M010ASE025" type="Tantalum"
SYMATTR Description Capacitor
SYMATTR Type cap
SYMBOL res 768 16 R0
SYMATTR InstName Rload
SYMATTR Value 5
FLAG 208 336 0
FLAG -48 128 0
FLAG -48 16 IN
FLAG 464 128 0
FLAG 688 128 0
FLAG 784 128 0
FLAG 784 16 OUT
TEXT 440 8 Bottom 2 !K1 L1 L2 1
TEXT 560 312 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\205da36de101_res_driver_ac.asc
* Generated by LTspice 26.0.1 for Windows.
;param Fsw=F_res_calc
C1 vc N004 {Cr}
L9 N003 vr {L_coil}
V3 vin_tran 0 PULSE({-Vin} {Vin} {1/(2*Fsw)} {t_slew} {t_slew} {1/(2*Fsw)-t_slew} {1/Fsw}) AC 1
K2 L6 L7 0.99
R1 N003 N002 {ESR_sec}
L6 N001 0 {Lp}
R6 N004 0 {Cr_ESR}
R3 vin_tran N001 {ESR_pri}
Rl vr vc {R_load}
L7 N002 0 {Ls}
.ac dec 20k 10k 200k
.ic I(L6)=0
.ic I(L7)=0
.inc driver_params.txt
.param Fsw=74k
.step param R_load 4m 40m 2m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2284 2116
WIRE -400 704 -448 704
WIRE -144 704 -400 704
WIRE -32 704 -64 704
WIRE 432 704 336 704
WIRE 672 704 512 704
WIRE 672 720 672 704
WIRE -32 752 -32 704
WIRE 336 752 336 704
WIRE -448 768 -448 704
WIRE 672 832 672 800
WIRE 672 848 672 832
WIRE -448 880 -448 848
WIRE -32 880 -32 832
WIRE 336 880 336 832
WIRE 672 960 672 928
WIRE 672 976 672 960
WIRE 672 1104 672 1040
WIRE 672 1216 672 1184
SYMBOL res 656 832 R0
SYMATTR InstName Rl
SYMATTR Value {R_load}
SYMBOL cap 656 976 R0
SYMATTR InstName C1
SYMATTR Value {Cr}
SYMBOL voltage -448 752 R0
WINDOW 123 -460 217 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 -460 189 Left 2
SYMATTR Value2 AC 1
SYMATTR Value PULSE({-Vin} {Vin} {1/(2*Fsw)} {t_slew} {t_slew} {1/(2*Fsw)-t_slew} {1/Fsw})
SYMATTR InstName V3
SYMBOL res -160 720 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value {ESR_pri}
SYMBOL res 656 1088 R0
SYMATTR InstName R6
SYMATTR Value {Cr_ESR}
SYMBOL ind 656 704 R0
SYMATTR InstName L9
SYMATTR Value {L_coil}
SYMBOL ind -48 736 R0
SYMATTR InstName L6
SYMATTR Value {Lp}
SYMBOL res 528 688 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {ESR_sec}
SYMBOL ind 320 736 R0
SYMATTR InstName L7
SYMATTR Value {Ls}
FLAG 336 880 0
FLAG -448 880 0
FLAG -400 704 vin_tran
FLAG 672 1216 0
FLAG -32 880 0
FLAG 672 960 vc
FLAG 672 832 vr
TEXT -8 464 Left 2 !.ac dec 20k 10k 200k
TEXT 200 640 Left 2 !K2 L6 L7 0.99
TEXT -88 560 Left 2 !.ic I(L6)=0\n.ic I(L7)=0
TEXT 552 496 Left 2 !.inc driver_params.txt
TEXT -928 792 Left 2 !;param Fsw=F_res_calc\n.param Fsw=74k
TEXT -8 1096 Left 2 !.step param R_load 4m 40m 2m
* Z:\home\khalils\Downloads\files\data\raw_asc\1a60da367939_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
+ IKF=24.3m ISE=1.28p NE=2.00 BR=4.00 NR=1.00
+ VAR=16.0 IKR=60.0m RE=1.51 RB=6.05 RC=0.605
+ XTB=1.5 CJE=6.27p VJE=1.10 MJE=0.500 CJC=2.02p VJC=0.300
+ MJC=0.300 TF=130p TR=27.4n EG=1.12 )
R2 P001 0 50
C2 N003 0 56p
C3 N003 0 5.6p
V1 N001 0 SINE(0 200m 144.39Meg 0 0 0)
R1 N002 N001 5
L1 N002 N003 12n
C4 P001 N003 470p
C1 N002 0 12p
.MODEL DI_MMBTH10 NPN (IS=1.26e-016 NF=1.00 BF={beta} VAF=114
.tran 0 2u 0 50p
.meas reQ1 AVG (V(Q1B)-V(Q1E))/Ic(Q1)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1380 680
WIRE -256 96 -288 96
WIRE -160 96 -176 96
WIRE -144 96 -160 96
WIRE -48 96 -64 96
WIRE 16 96 -48 96
WIRE 64 96 16 96
WIRE -160 112 -160 96
WIRE -48 112 -48 96
WIRE 16 112 16 96
WIRE -288 128 -288 96
SYMBOL cap -176 112 R0
SYMATTR InstName C1
SYMATTR Value 12p
SYMBOL ind -160 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 12n
SYMBOL cap -64 112 R0
SYMATTR InstName C2
SYMATTR Value 56p
SYMBOL voltage -288 112 R0
WINDOW 3 -522 11 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 200m 144.39Meg 0 0 0)
SYMATTR InstName V1
SYMBOL cap 0 112 R0
SYMATTR InstName C3
SYMATTR Value 5.6p
SYMBOL res -160 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL cap 128 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 470p
SYMBOL res 112 80 R0
SYMATTR InstName R2
SYMATTR Value 50
FLAG -288 208 0
FLAG 16 176 0
FLAG -48 176 0
FLAG -160 176 0
FLAG 128 176 0
TEXT 256 416 Left 2 !.MODEL DI_MMBTH10  NPN (IS=1.26e-016 NF=1.00 BF={beta} VAF=114\n+ IKF=24.3m ISE=1.28p NE=2.00 BR=4.00 NR=1.00\n+ VAR=16.0 IKR=60.0m RE=1.51 RB=6.05 RC=0.605\n+ XTB=1.5 CJE=6.27p VJE=1.10 MJE=0.500 CJC=2.02p VJC=0.300\n+ MJC=0.300 TF=130p TR=27.4n EG=1.12 )
TEXT -816 176 Left 2 !.tran 0 2u 0 50p
TEXT -816 272 Left 2 !.meas reQ1 AVG (V(Q1B)-V(Q1E))/Ic(Q1)
* Z:\home\khalils\Downloads\files\data\raw_asc\AD4021.asc
* Generated by LTspice 26.0.1 for Windows.
V6 N002 0 1.8
V1 N003 0 PWL(0 0 100u 5)
R1 N004 N003 10
C1 0 N005 10p
V4 N008 0 PULSE(0 1.8 227n 0.1n 0.1n 40n 1u)
V3 N001 0 5
V2 N007 0 PWL(0 5 100u 0)
R2 N006 N007 10
XU1 N001 N002 N004 MP_01 0 N006 N005 N008 AD4021 EN_Hi_Z=1 ;pnba REF)Vdd)IN+))GND)IN-)Vout)CNV
.tran 110u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\AD4021.asy)
.lib AD4021.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1252
WIRE 704 224 368 224
WIRE 832 224 784 224
WIRE 368 288 368 224
WIRE 704 336 496 336
WIRE 832 336 784 336
WIRE -208 368 -240 368
WIRE -80 368 -128 368
WIRE 80 368 0 368
WIRE 80 416 80 368
WIRE 144 416 80 416
WIRE 560 432 496 432
WIRE 688 432 624 432
WIRE 144 448 80 448
WIRE -208 496 -240 496
WIRE -80 496 -128 496
WIRE 80 496 80 448
WIRE 80 496 0 496
WIRE 704 528 496 528
WIRE 832 528 784 528
WIRE 368 608 368 576
FLAG 368 608 0
FLAG 832 336 0
FLAG -240 368 0
FLAG 688 432 0
FLAG 832 528 0
FLAG 832 224 0
FLAG -240 496 0
SYMBOL voltage 688 336 M90
WINDOW 0 47 41 VRight 2
WINDOW 3 -44 39 VRight 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V6
SYMATTR Value 1.8
SYMBOL voltage -112 368 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 100u 5)
SYMBOL res 16 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL cap 624 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 688 528 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 1.8 227n 0.1n 0.1n 40n 1u)
SYMBOL voltage 688 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -112 496 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 5 100u 0)
SYMBOL res 16 480 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL AD4021 400 432 R0
SYMATTR InstName U1
TEXT 152 616 Left 2 !.tran 110u
* Z:\tmp\asc_dec_bjh7r6w2\09d6f77a5cc1_Draft01_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
Q2 N002 N002 N001 0 2N3906
R2 N003 N004 100k
XU2 N007 N005 VCC VEE N006 LT1018 ;pnba In+)In-)V+)V-)OUT
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1018.asy)
.lib LT1018.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2756 2104
WIRE 192 -656 48 -656
WIRE 368 -656 192 -656
WIRE 272 -608 256 -608
WIRE 304 -608 272 -608
WIRE 192 -528 192 -560
WIRE 272 -528 272 -608
WIRE 272 -528 192 -528
WIRE 368 -480 368 -560
WIRE 592 -480 368 -480
WIRE 368 -352 368 -480
WIRE 416 -352 368 -352
WIRE 496 -288 496 -352
WIRE 496 -288 368 -288
WIRE 544 -288 496 -288
WIRE 624 -288 544 -288
WIRE 544 -272 544 -288
WIRE 0 -192 -304 -192
WIRE 112 -176 64 -176
WIRE 192 -176 192 -528
WIRE 0 -160 -176 -160
SYMBOL pnp 256 -560 R180
SYMATTR InstName Q2
SYMATTR Value 2N3906
SYMBOL res 400 -336 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL Comparators\\LT1018 32 -176 R0
SYMATTR InstName U2
FLAG 32 -208 VCC
FLAG 32 -144 VEE
FLAG 544 -192 0
* Z:\home\khalils\Downloads\files\data\raw_asc\f8f31f133566_Assignment_5c__i_.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N002 0 N003 0 BC547B
Vbe 0 N004 3.5
Vcb N001 0 15
Rc N002 N001 100
Re N004 N003 100000
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
* Input Characteristics of Common Base Configuration for NPN Transistor
.dc Vbe 0 5 1 Vcb 0.5 12.5 3
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 48 96 -16 96
WIRE 176 96 128 96
WIRE 336 96 272 96
WIRE 480 96 416 96
WIRE -16 192 -16 96
WIRE 480 192 480 96
WIRE -16 336 -16 272
WIRE 224 336 224 160
WIRE 224 336 -16 336
WIRE 480 336 480 272
WIRE 480 336 224 336
WIRE 224 352 224 336
FLAG 224 352 0
SYMBOL npn 176 160 R270
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL voltage 480 288 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vbe
SYMATTR Value 3.5
SYMBOL voltage -16 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vcb
SYMATTR Value 15
SYMBOL res 144 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rc
SYMATTR Value 100
SYMBOL res 432 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Re
SYMATTR Value 100000
TEXT -152 -24 Left 2 ;Input Characteristics of Common Base Configuration for NPN Transistor
TEXT -144 376 Left 2 !.dc Vbe 0 5 1 Vcb 0.5 12.5 3
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8338.asc
* Generated by LTspice 26.0.1 for Windows.
* 2.2MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8338.asy)
Rload vOUT 0 225
C1 N003 0 1
L1 vIN N001 10 Rser=65m
C2 N001 N002 0.1
R2 N005 0 1Meg
C3 vOUT 0 4.7 Rser=3m
R4 N004 0 40.2k
XU1 0 N004 0 N005 vOUT N001 N002 N003 vIN vIN LT8338 ;pnba Sync/Mode)Rt)GND)CTRL)Vout)SW)BST)INTVcc)Vin)EN/UVLO
V1 vIN 0 12
R1 N003 N005 301k
.tran 3m startup
.lib LT8338.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1352 740
WIRE -192 0 -336 0
WIRE -96 0 -192 0
WIRE -64 0 -96 0
WIRE 48 0 16 0
WIRE 192 0 48 0
WIRE -336 16 -336 0
WIRE 192 16 192 0
WIRE -96 96 -96 0
WIRE 48 96 48 0
WIRE 192 96 192 80
WIRE -336 112 -336 96
WIRE -192 192 -192 0
WIRE -160 192 -192 192
WIRE 496 192 256 192
WIRE 640 192 496 192
WIRE 640 208 640 192
WIRE 496 224 496 192
WIRE -160 288 -192 288
WIRE 304 288 256 288
WIRE 384 288 304 288
WIRE 304 304 304 288
WIRE 384 304 384 288
WIRE 640 304 640 288
WIRE 496 320 496 288
WIRE 304 384 304 368
WIRE 48 400 48 384
WIRE -80 416 -80 384
WIRE 192 416 192 384
WIRE 384 416 384 384
WIRE 384 416 192 416
WIRE 384 432 384 416
WIRE -80 528 -80 496
WIRE 384 528 384 512
SYMBOL cap 288 304 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 368 288 R0
SYMATTR InstName R1
SYMATTR Value 301k
SYMBOL LT8338 48 240 R0
SYMATTR InstName U1
SYMBOL cap 480 224 R0
WINDOW 39 24 77 Left 2
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=3m
SYMATTR InstName C3
SYMBOL res 624 192 R0
SYMATTR InstName Rload
SYMATTR Value 225
SYMBOL ind -80 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
WINDOW 39 -45 57 VTop 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=65m
SYMBOL res 368 416 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL voltage -336 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 176 16 R0
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL res -96 400 R0
SYMATTR InstName R4
SYMATTR Value 40.2k
FLAG 304 384 0
FLAG 48 400 0
FLAG -336 112 0
FLAG 384 528 0
FLAG 640 304 0
FLAG 496 320 0
FLAG -336 0 vIN
FLAG 640 192 vOUT
FLAG -80 528 0
FLAG -192 288 0
TEXT 496 536 Left 2 !.tran 3m startup
TEXT -56 512 Left 2 ;2.2MHz