Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1086-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1086-5.asy)
C1 OUT 0 10
XU1 0 OUT IN LT1086-5 ;pnba ADJ)OUT)IN
V1 IN 0 PWL(0 0 1 10) Rser=0.1
R3 OUT 0 10
.tran 1
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1344 896
WIRE 1888 896 1808 896
WIRE 2000 896 1888 896
WIRE 1344 912 1344 896
WIRE 1888 912 1888 896
WIRE 2000 912 2000 896
WIRE 1344 1008 1344 992
WIRE 1888 1008 1888 976
WIRE 2000 1008 2000 992
WIRE 1680 1040 1680 992
SYMBOL RES 1984 896 R0
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL VOLTAGE 1344 896 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMATTR SpiceLine Rser=0.1
SYMBOL PowerProducts\\LT1086-5 1680 896 R0
SYMATTR InstName U1
SYMBOL cap 1872 912 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 2000 896 OUT
FLAG 2000 1008 0
FLAG 1344 1008 0
FLAG 1888 1008 0
FLAG 1680 1040 0
FLAG 1344 896 IN
TEXT 1848 1088 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\0ea86558b792_up_5bitcounter-clamp.asc
* Generated by LTspice 26.0.1 for Windows.
A1 clk_buf clr 0 0 0 B[0] 0 0 counter cycles=2*{k}
A2 clk_buf clr 0 0 0 B[1] 0 0 counter cycles=4*{k}
A3 clk_buf clr 0 0 0 B[2] 0 0 counter cycles=8*{k}
A4 clk_buf clr 0 0 0 B[3] 0 0 counter cycles=16*{k}
A5 clk_buf clr 0 0 0 B[4] 0 0 counter cycles=32*{k}
A6 clk N001 0 0 0 0 clk_buf 0 AND
A7 B[0] B[1] B[2] B[3] B[4] N001 0 0 AND
.param k=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -160 -160 -208 -160
WIRE -160 -144 -160 -160
WIRE -144 -144 -160 -144
WIRE -144 -128 -208 -128
WIRE -144 -112 -192 -112
WIRE -192 -96 -192 -112
WIRE -192 -96 -208 -96
WIRE -144 -96 -176 -96
WIRE -32 -96 -80 -96
WIRE -144 -80 -160 -80
WIRE -32 -80 -48 -80
WIRE -176 -64 -176 -96
WIRE -176 -64 -208 -64
WIRE -48 -64 -48 -80
WIRE -32 -64 -48 -64
WIRE -48 -48 -48 -64
WIRE -32 -48 -48 -48
WIRE -160 -32 -160 -80
WIRE -160 -32 -208 -32
WIRE -48 -32 -48 -48
WIRE -32 -32 -48 -32
WIRE -16 -32 -16 -48
WIRE -16 -32 -32 -32
IOPIN 320 272 Out
IOPIN 320 112 Out
IOPIN -32 -112 In
IOPIN 320 -48 Out
IOPIN 64 272 Out
IOPIN 64 112 Out
IOPIN -48 272 In
IOPIN 208 -48 In
IOPIN 208 112 In
IOPIN 208 272 In
IOPIN -48 112 In
IOPIN -208 -96 Out
IOPIN -208 -32 Out
IOPIN -208 -64 Out
IOPIN -208 -128 Out
IOPIN -208 -160 Out
SYMBOL Digital\\srflop 0 176 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=16*{k}
SYMATTR InstName A4
SYMATTR SpiceModel counter
SYMBOL Digital\\and 0 -144 R0
SYMATTR InstName A6
SYMBOL Digital\\srflop 256 16 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=4*{k}
SYMATTR InstName A2
SYMATTR SpiceModel counter
SYMBOL Digital\\and -112 -176 R0
SYMATTR InstName A7
SYMBOL Digital\\srflop 256 -144 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=8*{k}
SYMATTR InstName A3
SYMATTR SpiceModel counter
SYMBOL Digital\\srflop 256 176 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=2*{k}
SYMATTR InstName A1
SYMATTR SpiceModel counter
SYMBOL Digital\\srflop 0 16 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=32*{k}
SYMATTR InstName A5
SYMATTR SpiceModel counter
FLAG 208 304 0
FLAG 304 224 0
FLAG 320 272 B[0]
FLAG 208 144 0
FLAG 304 64 0
FLAG 320 112 B[1]
FLAG 208 -16 0
FLAG -32 -112 clk
FLAG 304 -96 0
FLAG 320 -48 B[2]
FLAG -48 304 0
FLAG 48 224 0
FLAG 64 272 B[3]
FLAG -48 144 0
FLAG 48 64 0
FLAG 64 112 B[4]
FLAG -48 272 clr
FLAG 208 -48 clr
FLAG 208 112 clr
FLAG 208 272 clr
FLAG -48 112 clr
FLAG -48 64 clk_buf
FLAG -48 224 clk_buf
FLAG 208 64 clk_buf
FLAG 208 -96 clk_buf
FLAG 208 224 clk_buf
FLAG -32 -32 0
FLAG 32 -64 0
FLAG 32 -96 clk_buf
FLAG -128 -80 0
FLAG -80 -128 0
FLAG -208 -96 B[2]
FLAG -208 -32 B[4]
FLAG -208 -64 B[3]
FLAG -208 -128 B[1]
FLAG -208 -160 B[0]
TEXT 48 -160 Left 2 !.param k=1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8644S.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8644S.asy)
R4 N004 N003 11k
C1 N006 0 1n
R1 N005 0 17.8k
V1 IN 0 5
C4 OUT N002 47p
R2 N002 0 100k
Rload OUT 0 0.08
L1 N001 OUT 150n Rser=6m
R3 OUT N002 100k
XU2 0 NC_01 0 IN IN MP_02 NC_03 N001 MP_04 MP_05 MP_06 MP_07 MP_08 MP_09 MP_10 MP_11 IN N005 NC_12 NC_13 N006 N003 NC_14 N002 LT8644S ;pnba PHMODE)INTVcc)GND)SVin)PVin))BST)SW)))))))))EN/UV)Rt)CLKout)SYNC/Mode)SS)Vc)PG)FB
C3 N004 0 1n
C2 OUT 0 330 x2 Rser=4m
.tran 1m startup
.lib LT8644S.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1044 680
WIRE 96 -64 -32 -64
WIRE 128 -64 96 -64
WIRE -32 -48 -32 -64
WIRE 96 -32 96 -64
WIRE 128 -32 96 -32
WIRE 96 32 96 -32
WIRE 128 32 96 32
WIRE 448 32 416 32
WIRE 576 32 528 32
WIRE 656 32 576 32
WIRE 816 32 656 32
WIRE 944 32 816 32
WIRE -32 48 -32 32
WIRE 576 48 576 32
WIRE 656 48 656 32
WIRE 816 48 816 32
WIRE 944 48 944 32
WIRE 128 128 80 128
WIRE 576 128 576 112
WIRE 576 128 416 128
WIRE 656 128 576 128
WIRE 656 144 656 128
WIRE 816 144 816 112
WIRE 944 144 944 128
WIRE 448 224 416 224
WIRE 560 224 528 224
WIRE 560 240 560 224
WIRE 656 240 656 224
WIRE 32 320 0 320
WIRE 128 320 112 320
WIRE 560 320 560 304
WIRE 32 416 0 416
WIRE 128 416 96 416
WIRE 272 496 272 480
SYMBOL cap 560 48 R0
SYMATTR InstName C4
SYMATTR Value 47p
SYMBOL LT8644S 272 176 R0
SYMATTR InstName U2
SYMBOL ind 432 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150n
SYMATTR SpiceLine Rser=6m
SYMBOL cap 800 48 R0
WINDOW 123 24 54 Left 2
WINDOW 3 39 31 Left 2
SYMATTR Value2 x2
SYMATTR Value 330
SYMATTR InstName C2
SYMATTR SpiceLine Rser=4m
SYMBOL res 928 32 R0
SYMATTR InstName Rload
SYMATTR Value 0.08
SYMBOL res 128 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 17.8k
SYMBOL res 640 32 R0
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL cap 96 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 640 128 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res 544 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 11k
SYMBOL cap 544 240 R0
SYMATTR InstName C3
SYMATTR Value 1n
SYMBOL voltage -32 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -32 48 0
FLAG 0 320 0
FLAG 0 416 0
FLAG 272 496 0
FLAG 656 240 0
FLAG 816 144 0
FLAG 944 144 0
FLAG 560 320 0
FLAG 944 32 OUT
FLAG -32 -64 IN
FLAG 80 128 0
TEXT 488 424 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\5136d04fd171_coms_vtc_90nm.asc
* Generated by LTspice 26.0.1 for Windows.
M2 Vout Vin 0 0 NMOS l=90nm w=405nm
V2 Vin 0 1.2
C1 Vout 0 50f
M1 N001 Vin Vout N001 PMOS l=90nm w=135nm
V1 N001 0 1.8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc v2 0 1.8 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 32 208 32
WIRE 432 32 240 32
WIRE 208 64 208 32
WIRE 240 112 240 32
WIRE 240 112 208 112
WIRE 160 144 80 144
WIRE 432 144 432 112
WIRE 208 208 208 160
WIRE 432 208 208 208
WIRE 80 224 80 144
WIRE 80 224 -48 224
WIRE 208 224 208 208
WIRE -48 272 -48 224
WIRE 224 272 208 272
WIRE 80 304 80 224
WIRE 160 304 80 304
WIRE -48 384 -48 352
WIRE 208 464 208 320
WIRE 224 464 224 272
WIRE 224 464 208 464
WIRE 432 464 432 272
WIRE 432 464 224 464
WIRE 208 480 208 464
IOPIN -48 224 In
IOPIN 432 208 Out
SYMBOL pmos4 160 64 R0
SYMATTR InstName M1
SYMATTR Value2 l=90nm w=135nm
SYMBOL voltage 432 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL nmos4 160 224 R0
SYMATTR InstName M2
SYMATTR Value2 l=90nm w=405nm
SYMBOL voltage -48 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.2
SYMBOL cap 416 208 R0
SYMATTR InstName C1
SYMATTR Value 50f
FLAG 208 480 0
FLAG 432 144 0
FLAG -48 384 0
FLAG -48 224 Vin
FLAG 432 208 Vout
TEXT -40 328 Left 2 !.dc v2 0 1.8 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\2fe0a253cded_4_3_1_d.asc
* Generated by LTspice 26.0.1 for Windows.
Ri1 N001 0 10k
V1 N002 0 15V
V2 0 N004 15V
XOP1 N003 N001 N002 N004 Vo TL074 ;pnba In+)In-)V+)V-)OUT
Vs N003 0 5
Dred Vo N001 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.inc TL074.txt
.dc Vs -10V 10V 10mV
.model red D (N=3.73)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 16 128 16
WIRE 272 16 256 16
WIRE 192 48 80 48
WIRE 192 80 192 48
WIRE 128 96 128 16
WIRE 160 96 128 96
WIRE 272 112 272 16
WIRE 272 112 224 112
WIRE 320 112 272 112
WIRE 160 128 16 128
WIRE 128 144 128 96
WIRE 128 240 128 224
WIRE 192 256 192 144
FLAG 128 240 0
FLAG 272 256 0
FLAG 0 48 0
FLAG -64 128 0
FLAG 320 112 Vo
SYMBOL res 112 128 R0
SYMATTR InstName Ri1
SYMATTR Value 10k
SYMBOL voltage 96 48 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value 15V
SYMBOL voltage 288 256 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value 15V
SYMBOL Opamps\\opamp2 192 48 R0
SYMATTR InstName OP1
SYMATTR Value TL074
SYMBOL voltage 32 128 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vs
SYMATTR Value 5
SYMBOL diode 256 0 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName red
TEXT 8 280 Left 2 !.inc TL074.txt
TEXT -84 322 Left 2 !.dc Vs -10V 10V 10mV
TEXT 184 320 Left 2 !.model red D (N=3.73)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1118-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
C1 N002 0 1
XU1 0 MP_01 N001 MP_02 N001 N002 LT1118-2.5 ;pnba GND))EN))IN)OUT
.tran 3m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1118-2.5.asy)
.lib LT1118.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 112 -32 112
WIRE 96 112 80 112
WIRE 448 112 352 112
WIRE -32 128 -32 112
WIRE 448 128 448 112
WIRE 448 208 448 192
WIRE -32 224 -32 208
WIRE 80 224 80 112
WIRE 96 224 80 224
WIRE 224 288 224 272
FLAG 224 288 0
FLAG -32 224 0
FLAG 448 208 0
SYMBOL voltage -32 112 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 432 128 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LT1118-2.5 224 176 R0
SYMATTR InstName U1
TEXT 376 320 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\14b5a1b91e42_16V_EXT_simplified.asc
* Generated by LTspice 26.0.1 for Windows.
S1 N002 N001 16V_Enable 0 SWH
R2 N002 16V_EXT 0.002
B2 System_PWR 0 I={if(V(System_PWR) > 0, V(16V_EXT)*(-1)*I(B1)/V(System_PWR), 0)}
B1 N001 0 V={if(V(System_PWR)>16, 16+0.006*sin(2*pi*400E3*time), V(System_PWR))}
R5 16V_Enable 0 10k
S2 0 N002 16V_Enable 0 SWL
.model SWH SW(Ron=0.0001 Roff=10Meg Vt=1.5 Vh=-.4)
.model SWL SW(Ron=10Meg Roff=0.0001 Vt=1.5 Vh=-.4)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2004 680
WIRE 368 -144 336 -144
WIRE 480 -144 448 -144
WIRE 480 -48 480 -144
WIRE 432 16 384 16
WIRE 480 64 480 32
WIRE 640 64 480 64
WIRE 848 64 720 64
WIRE 480 96 480 64
WIRE -160 160 -160 96
WIRE 432 160 416 160
WIRE -288 176 -288 96
WIRE 480 224 480 176
WIRE -288 304 -288 256
WIRE -160 304 -160 240
IOPIN 848 64 Out
IOPIN -288 96 In
IOPIN 432 -32 In
IOPIN 432 112 In
IOPIN -160 96 In
SYMBOL bi -288 176 R0
WINDOW 3 527 205 Right 2
SYMATTR Value I={if(V(System_PWR) > 0, V(16V_EXT)*(-1)*I(B1)/V(System_PWR), 0)}
SYMATTR InstName B2
SYMBOL sw 480 48 M180
SYMATTR InstName S1
SYMATTR Value SWH
SYMBOL res -176 144 R0
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL bv 464 -144 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName B1
SYMATTR Value V={if(V(System_PWR)>16, 16+0.006*sin(2*pi*400E3*time), V(System_PWR))}
SYMBOL res 624 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 0.002
SYMBOL sw 480 192 M180
SYMATTR InstName S2
SYMATTR Value SWL
FLAG 848 64 16V_EXT
FLAG 336 -144 0
FLAG -288 304 0
FLAG -288 96 System_PWR
FLAG 432 -32 16V_Enable
FLAG 432 112 16V_Enable
FLAG 384 16 0
FLAG 416 160 0
FLAG 480 224 0
FLAG -160 96 16V_Enable
FLAG -160 304 0
TEXT 296 304 Left 2 !.model SWH SW(Ron=0.0001 Roff=10Meg Vt=1.5 Vh=-.4)
TEXT 296 328 Left 2 !.model SWL SW(Ron=10Meg Roff=0.0001 Vt=1.5 Vh=-.4)
* Z:\home\khalils\Downloads\files\data\raw_asc\5a7b896509ff_cmos_inverter.asc
* Generated by LTspice 26.0.1 for Windows.
* CMOS Inverter
M2 Y A 0 0 NMOS
V2 A 0 PULSE(0 2 2 0.001 0.001 2 4)
M1 Y A vdd vdd PMOS
V1 vdd 0 2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 48 336 16
WIRE 368 48 336 48
WIRE 288 64 256 64
WIRE 368 96 368 48
WIRE 368 96 336 96
WIRE 256 176 256 64
WIRE 256 176 240 176
WIRE 336 176 336 144
WIRE 400 176 336 176
WIRE 336 192 336 176
WIRE 368 240 336 240
WIRE 256 272 256 176
WIRE 288 272 256 272
WIRE 368 288 368 240
WIRE 368 288 336 288
WIRE 336 320 336 288
IOPIN 336 16 In
IOPIN 32 80 In
IOPIN 32 240 In
IOPIN 400 176 Out
IOPIN 240 176 In
SYMBOL voltage 32 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL pmos4 288 144 M180
SYMATTR InstName M1
SYMBOL voltage 32 224 R0
WINDOW 3 24 96 Left 1
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 2 2 0.001 0.001 2 4)
SYMATTR InstName V2
SYMBOL nmos4 288 192 R0
SYMATTR InstName M2
FLAG 336 320 0
FLAG 32 160 0
FLAG 32 320 0
FLAG 336 16 vdd
FLAG 32 80 vdd
FLAG 32 240 A
FLAG 400 176 Y
FLAG 240 176 A
TEXT -32 344 Left 2 !.tran 10
TEXT 104 -72 Left 2 ;CMOS Inverter
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1614-1.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1614-1.3.asy)
R2 N003 0 60.4k
R1 N005 N006 12.1k
D1 N001 OUT MBRS340
C1 N004 0 47n
C2 OUT 0 33 Rser=2m
R4 OUT N002 71.5k
V1 IN 0 5
XU1 N005 N002 IN 0 MP_01 N001 MP_02 IN N003 N004 ADP1614-1.3 ;pnba Comp)FB)EN)Gnd))SW))Vin)Clres)SS
Rload OUT 0 20
L1 IN N001 15 Rser=200m
R3 N002 0 10k
C3 N006 0 33n
C4 N005 0 10p
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 8m startup
.lib ADP1614-1.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1096 680
WIRE 32 -48 -112 -48
WIRE 240 -48 32 -48
WIRE 288 -48 240 -48
WIRE 416 -48 368 -48
WIRE 464 -48 416 -48
WIRE 560 -48 528 -48
WIRE 672 -48 560 -48
WIRE 816 -48 672 -48
WIRE -112 -16 -112 -48
WIRE 672 -16 672 -48
WIRE 816 0 816 -48
WIRE 560 16 560 -48
WIRE 240 32 240 -48
WIRE -112 80 -112 64
WIRE 32 96 32 -48
WIRE 96 96 32 96
WIRE 416 96 416 -48
WIRE 416 96 384 96
WIRE 672 96 672 48
WIRE 816 96 816 80
WIRE 560 128 560 96
WIRE 560 128 480 128
WIRE 560 160 560 128
WIRE 0 208 -16 208
WIRE 96 208 80 208
WIRE 480 208 480 128
WIRE 480 208 384 208
WIRE 560 256 560 240
WIRE 96 320 16 320
WIRE 432 320 384 320
WIRE 544 320 432 320
WIRE 432 336 432 320
WIRE 16 352 16 320
WIRE 544 352 544 320
WIRE 240 416 240 384
WIRE 432 432 432 416
WIRE 16 448 16 416
WIRE 544 448 544 416
WIRE 432 528 432 496
SYMBOL cap 416 432 R0
WINDOW 39 24 80 Left 2
SYMATTR InstName C3
SYMATTR Value 33n
SYMBOL cap 528 352 R0
SYMATTR InstName C4
SYMATTR Value 10p
SYMBOL schottky 464 -64 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 96 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 60.4k
SYMBOL res 544 0 R0
SYMATTR InstName R4
SYMATTR Value 71.5k
SYMBOL res 800 -16 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL res 544 144 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 416 320 R0
SYMATTR InstName R1
SYMATTR Value 12.1k
SYMBOL cap 0 352 R0
SYMATTR InstName C1
SYMATTR Value 47n
SYMBOL ADP1614-1.3 240 208 R0
SYMATTR InstName U1
SYMBOL VOLTAGE -112 -32 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 272 -32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
WINDOW 39 -53 63 VTop 2
SYMATTR InstName L1
SYMATTR Value 15
SYMATTR SpiceLine Rser=200m
SYMBOL cap 656 -16 R0
SYMATTR SpiceLine Rser=2m
SYMATTR InstName C2
SYMATTR Value 33
FLAG -112 80 0
FLAG -112 -48 IN
FLAG 816 -48 OUT
FLAG 560 256 0
FLAG 672 96 0
FLAG 432 528 0
FLAG -16 208 0
FLAG 816 96 0
FLAG 240 416 0
FLAG 16 448 0
FLAG 544 448 0
TEXT 8 504 Left 2 !.tran 8m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3cc627b8f745_opamp_gain2.asc
* Generated by LTspice 26.0.1 for Windows.
* Amplifier_gain = 1 + R3/(R1+R2)
* This line ".param gain=2" is necessary \nfor the case that no parameter is given \nfrom the higher level schematic.
* Node "z2" is only for educational reason.\nIt can be used to demonstrate that also\ninternal nodes can be plotted in the \nwaveform viewer.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1055A.asy)
R1 0 z2 2k
C1 in- out 2p
R3 in- out {RF}
R2 z2 in- 10k
XU1 in+ in- V+ V- out LT1055 ;pnba In+)In-)V+)V-)OUT
.param RF={12k*limit((gain-1),1e-6,1e3)}
.param gain=2
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -208 48 -272 48
WIRE -48 48 -128 48
WIRE 16 48 -48 48
WIRE 128 -64 -16 -64
WIRE 128 48 96 48
WIRE 128 48 128 -64
WIRE 128 224 128 48
WIRE 160 -64 128 -64
WIRE 160 48 128 48
WIRE 160 224 128 224
WIRE 160 256 -16 256
WIRE 192 208 192 176
WIRE 192 320 192 272
WIRE 272 -64 224 -64
WIRE 272 48 240 48
WIRE 272 48 272 -64
WIRE 272 240 224 240
WIRE 272 240 272 48
WIRE 352 240 272 240
IOPIN 352 240 Out
IOPIN -16 256 In
IOPIN 192 176 In
IOPIN 192 320 In
IOPIN -16 -64 In
CIRCLE Normal -10 80 -90 0 2
SYMBOL res 0 64 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL cap 160 -48 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName C1
SYMATTR Value 2p
SYMBOL Opamps\\LT1055A 192 176 R0
SYMATTR InstName U1
SYMBOL res 144 64 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R3
SYMATTR Value {RF}
SYMBOL res -224 64 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 2k
FLAG -272 48 0
FLAG 352 240 out
FLAG -16 256 in+
FLAG 192 176 V+
FLAG 192 320 V-
FLAG -16 -64 in-
FLAG -48 48 z2
TEXT -192 -216 Left 0 !.param RF={12k*limit((gain-1),1e-6,1e3)}
TEXT -192 -328 Left 0 !.param gain=2
TEXT -8 -168 Left 0 ;Amplifier_gain = 1 + R3/(R1+R2)
TEXT 0 -328 Left 0 ;This line ".param gain=2" is necessary \nfor the case that no parameter is given \nfrom the higher level schematic.
TEXT -8 -464 Left 0 ;Node "z2" is only for educational reason.\nIt can be used to demonstrate that also\ninternal nodes can be plotted in the \nwaveform viewer.
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5766.asc
* Generated by LTspice 26.0.1 for Windows.
* Dither with 0.125V offset and amplitude\nRange is one of {1,2,...,8}\ndither_scale is one of {0,1,2,3}\ndither_inv is one of {0,1}
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5766.asy)
V2 N003 0 -25
XU2 IN N002 N001 N003 OUT 0 AD5766 Range=8 dither_scale=0 dither_inv=0 ;pnba Vdac)NO)AVdd)AVss)Vout)GND
I1 OUT 0 100
V1 N001 0 25
V3 IN 0 PWL(0 0 100u 0 +1u 0.625 +100u 0.625 +1u 1.25 +100u 1.25 +1u 1.875 +100u 1.875 +1u 2.5)
V5 N002 0 SINE(0.125 0.125 30k)
.tran 1m
.lib AD5766.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1520
WIRE 656 400 128 400
WIRE 128 480 128 400
WIRE -224 560 -768 560
WIRE -64 560 -224 560
WIRE -768 592 -768 560
WIRE 400 624 304 624
WIRE 656 672 656 400
WIRE 400 688 400 624
WIRE -64 704 -672 704
WIRE -672 736 -672 704
WIRE 128 832 128 768
WIRE -768 960 -768 672
WIRE -672 960 -672 816
WIRE -672 960 -768 960
WIRE 16 960 16 768
WIRE 16 960 -672 960
WIRE 128 960 128 912
WIRE 128 960 16 960
WIRE 400 960 400 768
WIRE 400 960 128 960
WIRE 656 960 656 752
WIRE 656 960 400 960
SYMBOL voltage -672 720 R0
WINDOW 0 -32 56 VBottom 2
WINDOW 3 123 84 Top 1
WINDOW 123 63 42 VTop 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value SINE(0.125 0.125 30k)
SYMBOL voltage 656 656 R0
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 25
SYMBOL AD5766 96 624 R0
SYMATTR InstName U2
SYMBOL current 400 688 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 100
SYMBOL voltage 128 816 R0
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -25
SYMBOL voltage -768 576 R0
WINDOW 0 -32 56 VBottom 2
WINDOW 3 377 87 Top 1
WINDOW 123 63 42 VTop 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PWL(0 0 100u 0 +1u 0.625 +100u 0.625 +1u 1.25 +100u 1.25 +1u 1.875 +100u 1.875 +1u 2.5)
FLAG -224 560 IN
FLAG -768 960 0
FLAG 400 624 OUT
TEXT -64 416 Left 2 !.tran 1m
TEXT -344 792 Left 2 ;Dither with 0.125V offset and amplitude\nRange is one of {1,2,...,8}\ndither_scale is one of {0,1,2,3}\ndither_inv is one of {0,1}
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1424-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1424-5.asy)
L2 0 N001 20
Rload OUT 0 50
K1 L1 L2 1
XU1 N002 N004 MP_01 0 0 N003 IN N005 LT1424-5 ;pnba _SHDN)Vc))SGND)PGND)SW)Vin)Rccomp
V1 IN 0 5
L1 IN N003 20
C3 OUT 0 10 Rser=.1
D1 N001 OUT MBRS130L
C1 N004 0 1000p
C2 N005 0 .1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib LT1424-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2392 832
WIRE 1424 304 1152 304
WIRE 1680 304 1424 304
WIRE 1824 304 1744 304
WIRE 1936 304 1888 304
WIRE 2016 304 1936 304
WIRE 1152 320 1152 304
WIRE 1680 336 1680 304
WIRE 1744 336 1744 304
WIRE 1936 336 1936 304
WIRE 2016 336 2016 304
WIRE 1424 352 1424 304
WIRE 1152 416 1152 400
WIRE 1264 448 1232 448
WIRE 1680 448 1680 416
WIRE 1680 448 1584 448
WIRE 1744 448 1744 416
WIRE 1936 448 1936 400
WIRE 2016 448 2016 416
WIRE 1184 544 1168 544
WIRE 1264 544 1248 544
WIRE 1600 544 1584 544
WIRE 1680 544 1664 544
WIRE 1328 672 1328 640
WIRE 1520 672 1520 640
SYMBOL cap 1600 560 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL ind2 1664 320 R0
WINDOW 0 -3 39 Right 2
WINDOW 3 -4 70 Right 2
SYMATTR InstName L1
SYMATTR Value 20
SYMBOL ind2 1760 432 R180
WINDOW 0 -4 72 Right 2
WINDOW 3 -5 45 Right 2
SYMATTR InstName L2
SYMATTR Value 20
SYMBOL POWERPRODUCTS\\LT1424-5 1424 496 R0
SYMATTR InstName U1
SYMBOL cap 1248 528 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000p
SYMBOL schottky 1824 320 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS130L
SYMBOL VOLTAGE 1152 304 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2000 320 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL polcap 1920 336 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMATTR SpiceLine Rser=.1
FLAG 1152 416 0
FLAG 1680 544 0
FLAG 1520 672 0
FLAG 1328 672 0
FLAG 1168 544 0
FLAG 1936 448 0
FLAG 2016 448 0
FLAG 1744 448 0
FLAG 2016 304 OUT
FLAG 1152 304 IN
TEXT 1704 296 Bottom 2 !K1 L1 L2 1
TEXT 1816 544 Left 2 !.tran 1m startup