Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADGM3121.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADGM3121.asy)
V2 vRF1A 0 3
XU1 0 VDD vIN1 NC_01 NC_02 NC_03 vRFCA vRF1A NC_04 NC_05 NC_06 NC_07 ADGM3121 ;pnba GND)VDD)IN1)IN2)IN3)IN4)RFCA)RF1A)RF2A)RFCB)RF1B)RF2B
V1 VDD 0 {Vdd}
R1 vRFCA 0 300
V3 vIN1 0 PULSE(3.3 0 0 10u 10u 10m 20m)
.tran 100m
.param Vdd = 3.3
.lib ADGM3121.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2244 1360
WIRE 1072 -240 1040 -240
WIRE 1072 -208 1072 -240
WIRE 768 -128 736 -128
WIRE 896 -128 848 -128
WIRE 944 -128 896 -128
WIRE 1264 -128 1200 -128
WIRE 1328 -128 1264 -128
WIRE 896 -48 672 -48
WIRE 944 -48 896 -48
WIRE 1328 -48 1328 -128
WIRE 672 -16 672 -48
WIRE 672 96 672 64
WIRE 1328 112 1328 32
WIRE 720 192 672 192
WIRE 672 256 672 192
WIRE 672 384 672 336
WIRE 1072 528 1072 480
RECTANGLE Normal 768 -432 16 -720 2
SYMBOL voltage 672 240 R0
WINDOW 0 55 43 Bottom 2
WINDOW 3 65 85 Top 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vdd}
SYMBOL ADGM3121 1072 -80 R0
SYMATTR InstName U1
SYMBOL res 1312 -64 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL voltage 864 -128 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL voltage 672 -32 R0
WINDOW 0 18 8 Left 2
WINDOW 3 -218 178 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(3.3 0 0 10u 10u 10m 20m)
FLAG 672 384 0
FLAG 1328 112 0
FLAG 1072 528 0
FLAG 672 96 0
FLAG 736 -128 0
FLAG 1264 -128 vRFCA
FLAG 896 -128 vRF1A
FLAG 896 -48 vIN1
FLAG 1040 -240 VDD
FLAG 720 192 VDD
TEXT 1272 536 Left 2 !.tran 100m
TEXT 32 -696 Left 2 ;Notes:
TEXT 32 -392 Left 2 !.param Vdd = 3.3
* Z:\home\khalils\Downloads\files\data\raw_asc\097f5687bd65_OTA_diff.asc
* Generated by LTspice 26.0.1 for Windows.
Ro1 i+ 0 {1/go}
Ci v+ v- {ci}
G2 i+ i- v+ v- {gm}
Co i+ i- {co}
Ro i- 0 {1/go}
.param gm = 1
.param ci = .1p co = .25p go = 1/5Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 80 -64 80
WIRE 48 80 -16 80
WIRE 192 80 96 80
WIRE 272 80 192 80
WIRE 352 80 272 80
WIRE 96 128 96 80
WIRE 192 128 192 80
WIRE -16 144 -16 80
WIRE 48 144 48 80
WIRE -16 256 -16 208
WIRE -16 256 -64 256
WIRE 48 256 48 192
WIRE 48 256 -16 256
WIRE 96 256 96 208
WIRE 192 256 192 192
WIRE 192 256 96 256
WIRE 272 256 192 256
WIRE 352 256 272 256
IOPIN 352 80 Out
IOPIN 352 256 Out
IOPIN -64 80 In
IOPIN -64 256 In
SYMBOL cap -32 144 R0
SYMATTR InstName Ci
SYMATTR Value {ci}
SYMBOL g2 96 224 M180
SYMATTR InstName G2
SYMATTR Value {gm}
SYMBOL res 256 240 R0
SYMATTR InstName Ro
SYMATTR Value {1/go}
SYMBOL res 288 96 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName Ro1
SYMATTR Value {1/go}
SYMBOL cap 176 128 R0
SYMATTR InstName Co
SYMATTR Value {co}
FLAG 352 80 i+
FLAG 352 256 i-
FLAG -64 80 v+
FLAG -64 256 v-
FLAG 272 336 0
FLAG 272 0 0
TEXT -272 320 Left 2 !.param gm = 1
TEXT -272 352 Left 2 !.param ci = .1p co = .25p go = 1/5Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\0d05f881aa1a_imp_emit_flw_ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
* Improved Emitter Follower
Q1 Vp W1 2+ 0 2N3904
R1 0 N001 3.2k
Q2 2+ N001 Vn 0 2N3904
Q3 N001 N001 Vn 0 2N3904
V1 W1 0 SINE(0 2 1000)
V2 Vp 0 5
V3 Vn 0 -5
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 544 -160 544 -224
WIRE 368 -112 368 -144
WIRE 368 -112 352 -112
WIRE 480 -112 368 -112
WIRE -256 -64 -256 -112
WIRE -144 -64 -144 -112
WIRE -16 -64 -16 -112
WIRE 544 -16 544 -64
WIRE 592 -16 544 -16
WIRE 352 48 272 48
WIRE -256 64 -256 16
WIRE -144 64 -144 16
WIRE -16 64 -16 16
WIRE 272 80 272 48
WIRE 352 80 352 48
WIRE 544 144 544 -16
WIRE 352 176 352 160
WIRE 352 176 256 176
WIRE 352 192 352 176
WIRE 480 192 352 192
WIRE 352 256 352 192
WIRE 256 304 256 176
WIRE 288 304 256 304
WIRE 352 384 352 352
WIRE 544 384 544 240
WIRE 544 384 352 384
WIRE 592 384 544 384
IOPIN 352 -112 In
IOPIN 544 -224 In
IOPIN -256 -112 In
IOPIN -144 -112 In
IOPIN -16 -112 In
IOPIN 592 384 In
IOPIN 368 -144 In
IOPIN 592 -16 In
SYMBOL res 336 64 R0
SYMATTR InstName R1
SYMATTR Value 3.2k
SYMBOL voltage -144 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -256 -80 R0
WINDOW 3 -195 104 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 2 1000)
SYMATTR InstName V1
SYMBOL voltage -16 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL npn 480 144 R0
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL npn 288 256 R0
SYMATTR InstName Q3
SYMATTR Value 2N3904
SYMBOL npn 480 -160 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
FLAG 352 -112 W1
FLAG 544 -224 Vp
FLAG -256 64 0
FLAG -144 64 0
FLAG -16 64 0
FLAG -256 -112 W1
FLAG -144 -112 Vp
FLAG -16 -112 Vn
FLAG 272 80 0
FLAG 592 384 Vn
FLAG 368 -144 1+
FLAG 592 -16 2+
TEXT 24 384 Left 2 !.tran 10m
TEXT 176 -352 Left 2 ;Improved Emitter Follower
* Z:\home\khalils\Downloads\files\data\raw_asc\9fe078c1336c_IRFBG30_test.asc
* Generated by LTspice 26.0.1 for Windows.
* Source: http://www.duncanamps.com/spice/mosfets/nemos3t.mod
*IRFBG30 MCE 4-9-96
*1000V 3.1A 5 ohm HEXFET pkg:TO-220 2,1,3
* This Mosfet model requires a 4pin-symbol,\nbecause of the 4pins defined in the subcircuit.\n.SUBCKT XIRFBG30 10 20 40 40\n \n1. Add a symbol "nmos4" to your schematic. \nIt's now named a component or instance.\n2. Ctrl-RightMouseClick on the component \n3. Change Prefix:MN to Prefix:X\n4. OK\n5. Change NMOS to XIRFBG30
* Plot drain current Ix(M1:D)
* * If you have a model file nemos3t.mod from \n* http://www.duncanamps.com/spice/mosfets/nemos3t.mod\n \n.include nemos3t.mod
* symbol nmos4
CGS 2 3 930P
CGD 13 14 642P
RS 30 3 .126
M1 1 2 3 3 DMOS L=1U W=1U
LS 30 40 7.5N
V2 N001 0 100
D2 15 0 DLIM
DSD 3 10 DSUB
R2 12 15 1
D1 12 13 DLIM
RG 20 2 48.4
XM1 N001 N002 0 0 XIRFBG30 ;pnba D)G)S)B
DDG 15 14 DCGD
FFB 2 1 VFB 1
R1 13 0 1
EGD 12 0 2 1 1
VFB 14 0 0
V1 N002 0 2
RD 10 1 2.37
.SUBCKT XIRFBG30 10 20 40 40
.MODEL DMOS NMOS (LEVEL=1 LAMBDA=2M VTO=3 KP=1.62)
.MODEL DCGD D (CJO=642P VJ=.6 M=.68)
.MODEL DSUB D (IS=12.8N N=1.5 RS=.338 BV=1K CJO=387P VJ=.8 M=.42 TT=410N)
.MODEL DLIM D (IS=100U)
.ENDS XIRFBG30
.dc V2 0 100 1 V1 0 6 2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1624 724
WIRE 80 144 80 112
WIRE 80 256 80 224
WIRE 80 400 80 368
WIRE 80 512 80 480
WIRE 224 368 80 368
WIRE 272 112 80 112
WIRE 272 288 272 112
WIRE 272 512 272 384
WIRE 288 336 272 336
WIRE 288 384 272 384
WIRE 288 384 288 336
SYMBOL voltage 80 384 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL nmos4 224 288 R0
WINDOW 3 75 72 Left 0
SYMATTR InstName M1
SYMATTR Value XIRFBG30
SYMATTR Prefix X
SYMBOL voltage 80 128 R0
SYMATTR InstName V2
SYMATTR Value 100
FLAG 272 512 0
FLAG 80 256 0
FLAG 80 512 0
TEXT 560 -64 Left 0 !* Source: http://www.duncanamps.com/spice/mosfets/nemos3t.mod\n \n*IRFBG30 MCE 4-9-96\n*1000V 3.1A 5 ohm HEXFET pkg:TO-220 2,1,3\n.SUBCKT XIRFBG30  10 20 40 40\nM1   1  2  3  3  DMOS L=1U W=1U\nRD  10  1  2.37\nRS  30  3  .126\nRG  20  2  48.4\nCGS  2  3  930P\nEGD 12  0  2  1  1\nVFB 14  0  0\nFFB  2  1  VFB  1\nCGD 13 14  642P\nR1  13  0  1\nD1  12 13  DLIM\nDDG 15 14  DCGD\nR2  12 15  1\nD2  15  0  DLIM\nDSD  3 10  DSUB\nLS  30 40  7.5N\n.MODEL DMOS NMOS (LEVEL=1 LAMBDA=2M VTO=3 KP=1.62)\n.MODEL DCGD D (CJO=642P VJ=.6 M=.68)\n.MODEL DSUB D (IS=12.8N N=1.5 RS=.338 BV=1K CJO=387P VJ=.8 M=.42 TT=410N)\n.MODEL DLIM D (IS=100U)\n.ENDS XIRFBG30
TEXT 792 -352 Left 0 ;This Mosfet model requires a 4pin-symbol,\nbecause of the 4pins defined in the subcircuit.\n.SUBCKT XIRFBG30  10 20 40 40\n \n1. Add a symbol "nmos4" to your schematic. \nIt's now named a component or instance.\n2. Ctrl-RightMouseClick on the component \n3. Change Prefix:MN to Prefix:X\n4. OK\n5. Change NMOS to XIRFBG30
TEXT 88 -72 Left 0 !.dc V2 0 100 1 V1 0 6 2
TEXT 88 -32 Left 0 ;Plot drain current Ix(M1:D)
TEXT 88 -352 Left 0 ;* If you have a model file nemos3t.mod from \n* http://www.duncanamps.com/spice/mosfets/nemos3t.mod\n \n.include nemos3t.mod
TEXT 288 264 Left 0 ;symbol nmos4
* Z:\home\khalils\Downloads\files\data\raw_asc\1324a7b6fcb0_6230-10.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 -V 0 -5
R1 N002 N001 10K
R2 N001 0 1K
V3 N003 0 SINE(0 .1 1K)
XU1 N003 N001 N002 +V -V 0 LT6230-10 ;pnba IN+)IN-)OUT)VCC)VEE)EN_L
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6230-10.asy)
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -112 48 -128 48
WIRE 0 48 -32 48
WIRE 96 48 0 48
WIRE 208 48 176 48
WIRE 64 112 64 96
WIRE -416 160 -416 144
WIRE -288 160 -288 144
WIRE 0 160 0 48
WIRE 32 160 0 160
WIRE 208 192 208 48
WIRE 208 192 176 192
WIRE 32 224 -144 224
WIRE -144 240 -144 224
WIRE -416 256 -416 240
WIRE -288 256 -288 240
WIRE 64 288 64 272
WIRE -144 336 -144 320
FLAG -288 256 0
FLAG 64 96 +V
FLAG -288 144 +V
FLAG 64 288 -V
FLAG -416 256 0
FLAG -416 144 -V
FLAG -128 48 0
FLAG -144 336 0
FLAG 112 272 0
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -416 144 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 192 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res -16 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -144 224 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 .1 1K)
SYMBOL opamps\\LT6230-10 64 192 R0
SYMATTR InstName U1
TEXT 176 344 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG601.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input.\nPin capacitance and charge injection not included.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG601.asy)
Vs N001 0 SINE(0 5 1k)
C1 N002 0 36p
V2 -V 0 -5
V1 +V 0 5
XU1 +V -V N003 N001 N002 0 ADG601 ;pnba Vdd)Vss)IN)S)D)GND
V3 N003 0 PULSE(0 3 0 10n 10n 5m 10m)
R1 N002 0 301
.tran 20m
.lib ADG601.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 304 80 304 48
WIRE -128 160 -160 160
WIRE 208 160 -48 160
WIRE 464 160 400 160
WIRE 608 160 464 160
WIRE 464 192 464 160
WIRE 608 192 608 160
WIRE 208 224 80 224
WIRE 464 304 464 272
WIRE 608 304 608 256
WIRE -240 320 -240 272
WIRE -128 320 -128 272
WIRE 80 368 80 224
WIRE 240 384 240 336
WIRE 368 384 368 336
WIRE -240 448 -240 400
WIRE -128 448 -128 400
WIRE 80 496 80 448
SYMBOL cap 592 192 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL ADG601 304 208 R0
SYMATTR InstName U1
SYMBOL res 448 176 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage 80 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 3 0 10n 10n 5m 10m)
SYMBOL voltage -32 160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Vs
SYMATTR Value SINE(0 5 1k)
SYMBOL voltage -128 304 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -240 304 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 464 304 0
FLAG 608 304 0
FLAG -240 448 0
FLAG -160 160 0
FLAG 80 496 0
FLAG 368 384 0
FLAG 304 48 +V
FLAG -240 272 +V
FLAG 240 384 -V
FLAG -128 448 0
FLAG -128 272 -V
TEXT 536 448 Left 2 !.tran 20m
TEXT -376 -48 Left 2 ;Note:\nSwitch shown for a logic 0 input.\nPin capacitance and charge injection not included.
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2120-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2120-1.5.asy)
L1 N002 OUT 2.2
V1 IN 0 5
Rload OUT 0 1.5
R1 OUT N001 100K
C2 OUT 0 10
XU1 IN IN N002 0 0 OUT IN N001 IN IN ADP2120-1.5 ;pnba Vin)Pvin)SW)PGND)GND)FB)TRK)Pgood)Sync/Mode)EN
C1 OUT 0 22
.tran 1m
.lib ADP2120-1.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 0 32 0
WIRE 288 0 128 0
WIRE 32 16 32 0
WIRE 288 16 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 688 64 576 64
WIRE 32 112 32 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 624 144 560 144
WIRE 688 144 688 64
WIRE 688 144 624 144
WIRE 752 144 688 144
WIRE 560 160 560 144
WIRE 624 160 624 144
WIRE 752 160 752 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 624 224 560 224
WIRE 560 256 560 224
WIRE 752 256 752 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 688 304 688 144
WIRE 688 304 416 304
WIRE 288 368 288 352
SYMBOL ADP2120-1.5 288 272 R0
SYMATTR InstName U1
SYMBOL res 736 144 R0
SYMATTR Value 1.5
SYMATTR InstName Rload
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL voltage 32 0 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 608 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
FLAG 560 256 0
FLAG 288 368 0
FLAG 32 112 0
FLAG 752 144 OUT
FLAG 752 256 0
FLAG 32 0 IN
TEXT 504 344 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\8ffa50211c85_recortadores.asc
* Generated by LTspice 26.0.1 for Windows.
D3 N006 N002 CDZV6_8B
D4 N006 0 CDZV12B
V1 N003 0 SINE(0 33.9411 50)
D1 N004 N005 UMZ5_1N
R1 N004 N003 1k
R2 N002 N001 1k
D2 0 N005 CDZV20B
V2 N001 0 SINE(0 33.9411 50)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 40m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1224 680
WIRE 816 64 688 64
WIRE 1104 64 896 64
WIRE -192 80 -320 80
WIRE 16 80 -112 80
WIRE 16 96 16 80
WIRE 1104 112 1104 64
WIRE 688 128 688 64
WIRE -320 144 -320 80
WIRE 16 208 16 160
WIRE 1104 224 1104 176
WIRE 688 304 688 208
WIRE 912 304 688 304
WIRE 1104 304 1104 288
WIRE 1104 304 912 304
WIRE -320 320 -320 224
WIRE -160 320 -320 320
WIRE 16 320 16 272
WIRE 16 320 -160 320
WIRE -160 336 -160 320
WIRE 912 336 912 304
SYMBOL diode 1088 224 R0
SYMATTR InstName D4
SYMATTR Value CDZV12B
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL diode 1120 176 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value CDZV6_8B
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage 688 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 33.9411 50)
SYMBOL res -96 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 912 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL diode 32 272 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value CDZV20B
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL diode 0 96 R0
SYMATTR InstName D1
SYMATTR Value UMZ5_1N
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage -320 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 33.9411 50)
FLAG -160 336 0
FLAG 912 336 0
TEXT -352 360 Left 2 !.tran 40m
* Z:\home\khalils\Downloads\files\data\raw_asc\f2134fb2b198_IXFX120N20_test.asc
* Generated by LTspice 26.0.1 for Windows.
* 1. Add a "nmos" component to the schematic.\n \n2. Replace the value NMOS with IXFX120N20 \n on your nmos-transistor in the schematic.\n \n6. Put the model either on the schematic or into a file.\n \nAdd the line \n .include IXFX120N20.lib\nif you use a model file. \nI recommend to keep the model file in the same \nfolder as the schematic. This makes a complete\nbackup of a circuit easy.
* .include IXFX120N20.lib
* PSpice Model Editor - Version 9.2
*$
*DEVICE=IXFX120N20,NMOS
* IXFX120N20 NMOS model
* updated using Model Editor release 9.2.1 on 03/03/04 at 11:42
* The Model Editor is a PSpice product HEM.
*$
+ LEVEL=3
+ L=2.0000E-6
+ W=380
+ KP=1.0340E-6
+ RS=10.000E-3
+ RD=3.6882E-3
+ VTO=3.9426
+ RDS=2.0000E6
+ TOX=2.0000E-6
+ CGSO=26.316E-18
+ CGDO=4.0478E-12
+ CBD=6.3639E-9
+ MJ=1.2063
+ PB=3
+ RG=10.000E-3
+ IS=78.723E-6
+ N=2.6043
+ RB=1.0000E-9
+ GAMMA=0
+ KAPPA=0
V2 N001 0 5
M1 N001 N002 0 0 IXFX120N20
V1 N002 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 -0 5 0.01 V1 3.9 4.5 0.2
.MODEL IXFX120N20 NMOS
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1512 988
WIRE -448 432 -448 400
WIRE -448 272 -448 240
WIRE -448 240 -304 240
WIRE -256 128 -256 160
WIRE -256 256 -256 400
WIRE -256 400 -448 400
WIRE -448 400 -448 352
WIRE -32 176 -32 128
WIRE -32 128 -256 128
WIRE -256 400 -32 400
WIRE -32 400 -32 256
SYMBOL nmos -304 160 R0
SYMATTR InstName M1
SYMATTR Value IXFX120N20
SYMBOL voltage -448 256 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL voltage -32 160 R0
SYMATTR InstName V2
SYMATTR Value 5
FLAG -448 432 0
TEXT -448 16 Left 0 !.dc V2 -0 5 0.01 V1 3.9 4.5 0.2
TEXT -472 488 Left 0 ;1. Add a "nmos" component to the schematic.\n \n2. Replace the value NMOS with IXFX120N20 \n    on your nmos-transistor in the schematic.\n \n6. Put the model either  on the schematic or into a file.\n \nAdd the line  \n    .include IXFX120N20.lib\nif you use a model file. \nI recommend to keep the model file in the same \nfolder as the schematic. This makes a complete\nbackup of a circuit easy.
TEXT -448 64 Left 0 ;.include IXFX120N20.lib
TEXT 176 32 Left 0 !* PSpice Model Editor - Version 9.2\n \n*$\n*DEVICE=IXFX120N20,NMOS\n \n* IXFX120N20 NMOS model\n* updated using Model Editor release 9.2.1 on 03/03/04 at 11:42\n* The Model Editor is a PSpice product HEM.\n.MODEL IXFX120N20 NMOS\n+ LEVEL=3\n+ L=2.0000E-6\n+ W=380\n+ KP=1.0340E-6\n+ RS=10.000E-3\n+ RD=3.6882E-3\n+ VTO=3.9426\n+ RDS=2.0000E6\n+ TOX=2.0000E-6\n+ CGSO=26.316E-18\n+ CGDO=4.0478E-12\n+ CBD=6.3639E-9\n+ MJ=1.2063\n+ PB=3\n+ RG=10.000E-3\n+ IS=78.723E-6\n+ N=2.6043\n+ RB=1.0000E-9\n+ GAMMA=0\n+ KAPPA=0\n*$
* Z:\tmp\asc_dec_bjh7r6w2\0d134d10a4c5_ex3_artiom_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R5 N004 N006 10k
R3 N009 N008 12k
R1 N001 N008 470
R11 Vout N005 10k
R10 N005 0 20k
XU4 N007 N005 VSP VSN Vout level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
XU1 N003 N001 VSP VSN N002 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
* Library below included based on ModelFile attribute of instance XU4, XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1896 680
WIRE 720 -128 704 -128
WIRE 832 -112 784 -112
WIRE 720 -96 368 -96
WIRE 832 -64 832 -112
WIRE 1040 -64 832 -64
WIRE 1232 -64 1200 -64
WIRE 1552 -64 1536 -64
WIRE 1792 -64 1712 -64
WIRE 1536 -32 1536 -64
WIRE 704 96 704 -128
WIRE 832 96 832 -64
WIRE 832 96 784 96
WIRE 704 160 704 96
WIRE 1632 160 1632 -64
WIRE 1648 160 1632 160
WIRE 1120 176 1120 -64
WIRE 1792 176 1792 -64
WIRE 1792 176 1712 176
WIRE 1824 176 1792 176
WIRE 1232 192 1232 -64
WIRE 1648 192 1504 192
WIRE 1504 288 1504 192
WIRE 704 304 704 240
WIRE 832 304 784 304
WIRE 832 384 832 304
WIRE 1040 384 832 384
WIRE 1504 384 1504 352
WIRE 704 448 704 304
WIRE 720 448 704 448
WIRE 1792 448 1792 176
WIRE 832 464 832 384
WIRE 832 464 784 464
WIRE 720 480 368 480
SYMBOL res 1216 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL res 800 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 12k
SYMBOL res 720 144 M0
SYMATTR InstName R1
SYMATTR Value 470
SYMBOL res 1728 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R11
SYMATTR Value 10k
SYMBOL res 1648 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R10
SYMATTR Value 20k
SYMBOL OpAmps\\UniversalOpAmp2 1680 176 R0
SYMATTR InstName U4
SYMBOL OpAmps\\UniversalOpAmp2 752 -112 R0
SYMATTR InstName U1
FLAG 1536 -32 0
FLAG 752 -144 VSP
FLAG 752 432 VSP
FLAG 1680 144 VSP
FLAG 752 -80 VSN
FLAG 1680 208 VSN
FLAG 1824 176 Vout
* Z:\home\khalils\Downloads\files\data\raw_asc\01121b582a34_tlv431_window_comparator.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 0
R1 N001 N003 15k
R2 N003 0 4.7k
R3 N002 N004 56k
R4 N004 0 20k
R5 N001 N002 1k
XU1 N002 0 NC_01 TLV431 ;pnba K)A)R
XU2 Vout 0 NC_02 TLV431 ;pnba K)A)R
R6 N001 Vout 1k
.dc v1 0 10 0.01
* Window comparator for 4.8V < 5V < 5.2V.\nBy adding R5, which is a small fraction of R3, the error introduced by the cathode current of U1 is minimized.\nDon't chose R5 too small. U1 should still be able to cope with the cathode current when it's fully conducting.
* R5 is 2% of R3 in this case.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\TLV431.asy)
.lib TLV431.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1300 680
WIRE 160 -144 32 -144
WIRE 384 -144 160 -144
WIRE 528 -144 384 -144
WIRE 384 -96 384 -144
WIRE 528 -96 528 -144
WIRE 384 0 384 -16
WIRE 384 0 272 0
WIRE 160 16 160 -144
WIRE 384 16 384 0
WIRE 528 32 528 -16
WIRE 272 96 272 0
WIRE 528 96 528 32
WIRE 160 128 160 96
WIRE 240 128 160 128
WIRE 384 128 384 96
WIRE 496 128 384 128
WIRE 32 144 32 -144
WIRE 160 144 160 128
WIRE 384 144 384 128
WIRE 32 272 32 224
WIRE 160 272 160 224
WIRE 272 272 272 160
WIRE 384 272 384 224
WIRE 528 272 528 160
FLAG 32 272 0
FLAG 160 272 0
FLAG 272 272 0
FLAG 384 272 0
FLAG 528 272 0
FLAG 528 32 Vout
SYMBOL voltage 32 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL res 144 0 R0
SYMATTR InstName R1
SYMATTR Value 15k
SYMBOL res 144 128 R0
SYMATTR InstName R2
SYMATTR Value 4.7k
SYMBOL res 368 0 R0
SYMATTR InstName R3
SYMATTR Value 56k
SYMBOL res 368 128 R0
SYMATTR InstName R4
SYMATTR Value 20k
SYMBOL res 368 -112 R0
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL Parts_TCO\\TLV431 272 128 M0
SYMATTR InstName U1
SYMBOL Parts_TCO\\TLV431 528 128 M0
SYMATTR InstName U2
SYMBOL res 512 -112 R0
SYMATTR InstName R6
SYMATTR Value 1k
TEXT -192 192 Left 2 !.dc v1 0 10 0.01
TEXT 40 -352 Left 2 ;Window comparator for 4.8V < 5V < 5.2V.\nBy adding R5, which is a small fraction of R3, the error introduced by the cathode current of U1 is minimized.\nDon't chose R5 too small.  U1 should still be able to cope with the cathode current when it's fully conducting.
TEXT 48 -264 Left 2 ;R5 is 2% of R3 in this case.
* Z:\home\khalils\Downloads\files\data\raw_asc\5a7b896509ff_cmos_inverter.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Y A vdd vdd PMOS
M2 Y A 0 0 NMOS
V1 vdd 0 2
V2 A 0 PULSE(0 2 2 0.001 0.001 2 4)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 10
* CMOS Inverter
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 48 336 16
WIRE 368 48 336 48
WIRE 288 64 256 64
WIRE 368 96 368 48
WIRE 368 96 336 96
WIRE 256 176 256 64
WIRE 256 176 240 176
WIRE 336 176 336 144
WIRE 400 176 336 176
WIRE 336 192 336 176
WIRE 368 240 336 240
WIRE 256 272 256 176
WIRE 288 272 256 272
WIRE 368 288 368 240
WIRE 368 288 336 288
WIRE 336 320 336 288
FLAG 336 320 0
FLAG 32 160 0
FLAG 32 320 0
FLAG 336 16 vdd
IOPIN 336 16 In
FLAG 32 80 vdd
IOPIN 32 80 In
FLAG 32 240 A
IOPIN 32 240 In
FLAG 400 176 Y
IOPIN 400 176 Out
FLAG 240 176 A
IOPIN 240 176 In
SYMBOL pmos4 288 144 M180
SYMATTR InstName M1
SYMBOL nmos4 288 192 R0
SYMATTR InstName M2
SYMBOL voltage 32 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL voltage 32 224 R0
WINDOW 3 24 96 Left 1
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 2 2 0.001 0.001 2 4)
SYMATTR InstName V2
TEXT -32 344 Left 2 !.tran 10
TEXT 104 -72 Left 2 ;CMOS Inverter