Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\416b1af02e29_StageA_LowPassSallenKey_AD711.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 N001 95.3k
R1 N001 IN 26.7k
C2 N002 REF 1n
C1 OUT N001 10n
XU1 N002 OUT V+ V- OUT AD712 ;pnba In+)In-)V+)V-)OUT
* This subcircuit is not simulatable. \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD711.asy)
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4112 860
WIRE 512 -128 240 -128
WIRE 320 64 320 -32
WIRE 320 112 320 64
WIRE 240 128 240 -128
WIRE 288 128 288 112
WIRE 288 128 240 128
WIRE 304 128 288 128
WIRE 432 144 352 144
WIRE 512 144 512 -128
WIRE 512 144 432 144
WIRE -160 160 -176 160
WIRE -128 160 -160 160
WIRE -16 160 -48 160
WIRE 16 160 -16 160
WIRE 144 160 96 160
WIRE 288 160 144 160
WIRE 304 160 288 160
WIRE 512 160 512 144
WIRE 576 160 512 160
WIRE 608 160 576 160
WIRE 288 176 288 160
WIRE 144 192 144 160
WIRE 320 224 320 176
WIRE 144 272 144 256
WIRE 320 336 320 224
WIRE -16 400 -16 160
WIRE 176 400 -16 400
WIRE 512 400 512 160
WIRE 512 400 240 400
FLAG 320 -32 V+
FLAG 320 336 V-
FLAG 576 160 OUT
FLAG -160 160 IN
FLAG 144 272 REF
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 95.3k
SYMBOL res -32 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 26.7k
SYMBOL cap 128 192 R0
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL cap 240 384 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL Opamps\\AD711 320 80 R0
SYMATTR InstName U1
TEXT -176 504 Left 4 ;This subcircuit is not simulatable.  \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Z:\home\khalils\Downloads\files\data\raw_asc\8065eb5eb76a_1078A.asc
* Generated by LTspice 26.0.1 for Windows.
* Absolute Value Circuit(Full-Wave Rectifier)
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1078A.asy)
XU2 N002 OUT +V 0 OUT LT1078 ;pnba In+)In-)V+)V-)OUT
D1 N003 N002 1N4148
R1 N002 N001 200K
V1 +V 0 5
V3 IN 0 SINE(0 1 100)
XU1 0 N001 +V 0 N003 LT1078 ;pnba In+)In-)V+)V-)OUT
R2 N001 IN 200K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 -80 96
WIRE 128 96 112 96
WIRE 224 96 128 96
WIRE 416 96 304 96
WIRE -80 112 -80 96
WIRE 544 128 432 128
WIRE -192 160 -192 144
WIRE 480 192 480 176
WIRE -80 208 -80 192
WIRE 192 208 192 192
WIRE 432 208 432 128
WIRE 448 208 432 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 544 224 544 128
WIRE 544 224 512 224
WIRE 576 224 544 224
WIRE 336 240 224 240
WIRE 416 240 416 96
WIRE 416 240 400 240
WIRE 448 240 416 240
WIRE -192 256 -192 240
WIRE 160 256 128 256
WIRE 480 272 480 256
WIRE 192 288 192 272
SYMBOL res 320 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200K
SYMBOL voltage -80 96 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
SYMBOL opamps\\LT1078A 480 160 R0
SYMATTR InstName U2
SYMBOL opamps\\LT1078A 192 176 R0
SYMATTR InstName U1
SYMBOL diode 336 256 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage -192 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200K
FLAG -192 256 0
FLAG 192 192 +V
FLAG -192 144 +V
FLAG -80 208 0
FLAG 192 288 0
FLAG 480 176 +V
FLAG 480 272 0
FLAG -80 96 IN
FLAG 576 224 OUT
FLAG 128 256 0
TEXT 448 336 Left 2 !.tran 30m
TEXT 392 32 Bottom 2 ;Absolute Value Circuit(Full-Wave Rectifier)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG611.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG611.asy)
V3 S 0 SINE(0 5 1k)
XU1 IN D S -V 0 +V ADG611 ;pnba IN)D)S)Vss)GND)Vdd
V2 -V 0 -5
V1 +V 0 5
R1 D 0 1K
V4 IN 0 pulse(0 3.3 0 1u 1u 5m 10m)
.tran 30m
.lib ADG611.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -96
WIRE -560 -32 -560 -48
WIRE -432 0 -448 0
WIRE -256 0 -352 0
WIRE -240 0 -256 0
WIRE -32 0 -48 0
WIRE 0 0 -32 0
WIRE 0 16 0 0
WIRE -560 64 -560 48
WIRE -272 64 -336 64
WIRE -240 64 -272 64
WIRE 0 112 0 96
WIRE -560 160 -560 144
WIRE -336 160 -336 64
WIRE -208 192 -208 176
WIRE -80 192 -80 176
WIRE -560 256 -560 240
WIRE -336 256 -336 240
SYMBOL voltage -560 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -336 144 R0
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMBOL voltage -336 0 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 5 1k)
SYMBOL voltage -560 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADG611 -144 48 R0
SYMATTR InstName U1
FLAG -560 256 0
FLAG -560 64 0
FLAG -560 -48 +V
FLAG -560 144 -V
FLAG -448 0 0
FLAG -208 192 -V
FLAG -144 -96 +V
FLAG -80 192 0
FLAG -336 256 0
FLAG 0 112 0
FLAG -256 0 S
FLAG -32 0 D
FLAG -272 64 IN
TEXT -24 192 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\Wien.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
V2 -V 0 -15
R5 AGC 0 1Meg
R2 N002 N001 4.9K
R1 OUT N002 10K
R4 0 N003 10K
V1 +V 0 15
R3 OUT N004 10K
XU1 N003 N002 +V -V OUT LT1001 ;pnba In+)In-)V+)V-)OUT
C2 N003 0 .01
C1 N004 N003 .01
JQ1 N001 AGC 0 U309
C3 0 AGC .1
D1 AGC OUT 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.tran 0 .5 0 10u startup
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1108
WIRE -112 128 -144 128
WIRE 0 128 -16 128
WIRE 112 128 80 128
WIRE 176 128 112 128
WIRE 304 128 256 128
WIRE 112 224 112 128
WIRE 128 224 112 224
WIRE 304 240 304 128
WIRE 304 240 192 240
WIRE 336 240 304 240
WIRE 32 256 -48 256
WIRE 112 256 32 256
WIRE 128 256 112 256
WIRE -48 272 -48 256
WIRE 32 272 32 256
WIRE -288 320 -288 304
WIRE -176 320 -176 304
WIRE -48 368 -48 336
WIRE 32 368 32 352
WIRE 112 368 112 256
WIRE 128 368 112 368
WIRE 208 368 192 368
WIRE 304 368 304 240
WIRE 304 368 288 368
WIRE -288 416 -288 400
WIRE -176 416 -176 400
WIRE -80 464 -80 176
WIRE 32 464 -80 464
WIRE 176 464 32 464
WIRE 304 464 304 368
WIRE 304 464 240 464
WIRE -80 480 -80 464
WIRE 32 496 32 464
WIRE -80 576 -80 560
WIRE 32 576 32 560
SYMBOL cap 16 560 M180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL res -96 464 R0
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL cap 192 352 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL njf -16 176 M270
WINDOW 0 49 47 VTop 2
WINDOW 3 -7 52 VLeft 2
SYMATTR InstName Q1
SYMATTR Value U309
SYMBOL res 16 368 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 272 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -176 304 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 304 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL diode 176 448 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL cap -64 272 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL voltage -288 304 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT1001 160 176 R0
SYMATTR InstName U1
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.9K
FLAG 160 208 +V
FLAG 160 272 -V
FLAG -288 304 +V
FLAG -176 416 0
FLAG -288 416 0
FLAG -176 304 -V
FLAG 32 368 0
FLAG -48 368 0
FLAG -144 128 0
FLAG 32 576 0
FLAG -80 576 0
FLAG 336 240 OUT
FLAG 32 464 AGC
TEXT 168 560 Left 2 !.tran 0 .5 0 10u startup
TEXT 56 616 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\a7b551dc7311_ptat.asc
* Generated by LTspice 26.0.1 for Windows.
Q2 N002 N001 Vcc 0 PNP
Q1 N001 N001 Vcc 0 PNP
Q4 N002 N002 0 0 NPN
Q5 N003 N002 0 0 NPN
Q3 N001 N002 N004 0 NPN
R1 N004 0 470
V1 Vcc 0 +3.3V
Q7 N001 N002 N004 0 NPN
Q6 N002 N001 Vcc 0 PNP
Q8 N002 N001 Vcc 0 PNP
V2 VREF 0 1V
R3 VREF N003 .001
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.inc 6301.bjt
.op
.step temp 25 100 5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 48 64 16
WIRE 240 48 240 16
WIRE 272 48 240 48
WIRE 304 48 272 48
WIRE 144 96 128 96
WIRE 176 96 144 96
WIRE 208 96 176 96
WIRE 240 96 208 96
WIRE 272 144 240 144
WIRE 304 144 272 144
WIRE 64 192 64 144
WIRE 144 192 144 96
WIRE 144 192 64 192
WIRE 240 256 240 144
WIRE 240 256 160 256
WIRE 64 272 64 192
WIRE 64 272 32 272
WIRE 240 272 240 256
WIRE 416 272 416 208
WIRE 128 320 96 320
WIRE 160 320 160 256
WIRE 160 320 128 320
WIRE 176 320 160 320
WIRE 352 320 176 320
WIRE 64 368 32 368
WIRE 64 384 64 368
WIRE 240 416 240 368
WIRE 416 416 416 368
FLAG 240 416 0
FLAG 64 16 Vcc
FLAG 240 16 Vcc
FLAG 416 416 0
FLAG 64 464 0
FLAG -112 192 0
FLAG -112 112 Vcc
FLAG -192 192 0
FLAG -192 112 VREF
FLAG 416 128 VREF
SYMBOL pnp 176 144 M180
SYMATTR InstName Q2
SYMBOL pnp 128 144 R180
SYMATTR InstName Q1
SYMBOL npn 176 272 R0
SYMATTR InstName Q4
SYMBOL npn 352 272 R0
SYMATTR InstName Q5
SYMBOL npn 128 272 M0
SYMATTR InstName Q3
SYMBOL res 48 368 R0
SYMATTR InstName R1
SYMATTR Value 470
SYMBOL voltage -112 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value +3.3V
SYMBOL npn 96 272 M0
SYMATTR InstName Q7
SYMBOL pnp 208 144 M180
SYMATTR InstName Q6
SYMBOL pnp 240 144 M180
SYMATTR InstName Q8
SYMBOL voltage -192 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 1V
SYMBOL res 400 112 R0
SYMATTR InstName R3
SYMATTR Value .001
TEXT 48 -88 Left 2 !.inc 6301.bjt
TEXT 200 -88 Left 2 !.op
TEXT 48 -120 Left 2 !.step temp 25 100 5
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1226.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1226.asy)
R1 N002 N001 1.2K
T1 N003 0 OUT 0 Td=50n Z0=75
V3 IN 0 ac 1
V2 -V 0 -15
XU1 IN N001 +V -V N002 LT1226 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
R3 N002 N003 75
R2 N001 0 50
R4 OUT 0 75
.ac oct 10 100K 1G
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -208 96 -208 80
WIRE -96 96 -96 80
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -208 192 -208 176
WIRE -96 192 -96 176
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 288 240 256 240
WIRE 400 240 368 240
WIRE 560 240 496 240
WIRE 160 256 0 256
WIRE 560 256 560 240
WIRE 0 272 0 256
WIRE 400 272 384 272
WIRE 512 272 496 272
WIRE 192 288 192 272
WIRE 560 352 560 336
WIRE 0 368 0 352
SYMBOL voltage -208 80 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 272 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 75
SYMBOL voltage -96 80 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1.2K
SYMBOL tline 448 256 R0
WINDOW 3 -3 37 Top 2
SYMATTR Value Td=50n Z0=75
SYMATTR InstName T1
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL opamps\\LT1226 192 176 R0
SYMATTR InstName U1
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL res 544 240 R0
SYMATTR InstName R4
SYMATTR Value 75
FLAG -96 192 0
FLAG 192 192 +V
FLAG -96 80 +V
FLAG 192 288 -V
FLAG -208 192 0
FLAG -208 80 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 560 352 0
FLAG 512 272 0
FLAG 384 272 0
FLAG 560 240 OUT
FLAG 0 256 IN
TEXT 224 384 Left 2 !.ac oct 10 100K 1G
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX312.asc
* Generated by LTspice 26.0.1 for Windows.
V5 vVL 0 5
R1 vCOM1 0 301
C1 vCOM1 0 36p
V3 v+ 0 15
XU2 0 v+ vIN1 NC_01 NC_02 NC_03 vNC1 vCOM1 NC_04 NC_05 NC_06 NC_07 NC_08 NC_09 v- vVL MAX312 ;pnba GND)V+)IN1)IN2)IN3)IN4)NC1)COM1)NC2)COM2)NC3)COM3)NC4)COM4)V-)VL
V1 vIN1 0 PULSE(0 2.4 0 10n 10n 5u 10u)
V4 v- 0 -15
V2 vNC1 0 15
.tran 100u
* Notes:\n \nBandwidth = 139MHz.
.param Vdd = 15
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\MAX312.asy)
.lib MAX312.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2244 1360
WIRE 1072 -256 1056 -256
WIRE 1072 -208 1072 -256
WIRE 912 -128 544 -128
WIRE 960 -128 912 -128
WIRE 1232 -128 1184 -128
WIRE 1280 -128 1232 -128
WIRE 1376 -128 1280 -128
WIRE 1280 -96 1280 -128
WIRE 1376 -80 1376 -128
WIRE 912 -64 704 -64
WIRE 960 -64 912 -64
WIRE 544 -16 544 -128
WIRE 704 -16 704 -64
WIRE 1280 16 1280 -16
WIRE 1376 16 1376 -16
WIRE 544 96 544 64
WIRE 704 96 704 64
WIRE 672 224 608 224
WIRE 848 224 784 224
WIRE 608 288 608 224
WIRE 784 288 784 224
WIRE 1232 320 1184 320
WIRE 1280 320 1232 320
WIRE 1280 368 1280 320
WIRE 608 416 608 368
WIRE 784 416 784 368
WIRE 1280 480 1280 448
WIRE 1120 496 1120 464
WIRE 1024 512 1024 464
WIRE 1024 512 1008 512
FLAG 1280 480 0
FLAG 1280 16 0
FLAG 1376 16 0
FLAG 1120 496 0
FLAG 608 416 0
FLAG 704 96 0
FLAG 1056 -256 v+
FLAG 1008 512 v-
FLAG 672 224 v+
FLAG 784 416 0
FLAG 848 224 v-
FLAG 544 96 0
FLAG 1232 -128 vCOM1
FLAG 1232 320 vVL
FLAG 912 -128 vNC1
FLAG 912 -64 vIN1
SYMBOL voltage 1280 352 R0
WINDOW 0 18 8 Left 2
WINDOW 3 15 104 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 5
SYMBOL res 1264 -112 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL cap 1360 -80 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage 608 272 R0
WINDOW 0 58 35 Bottom 2
WINDOW 3 54 69 Top 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL MAX312 1072 -80 R0
SYMATTR InstName U2
SYMBOL voltage 704 -32 R0
WINDOW 0 18 8 Left 2
WINDOW 3 -191 178 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 2.4 0 10n 10n 5u 10u)
SYMBOL voltage 784 272 R0
WINDOW 0 58 35 Bottom 2
WINDOW 3 54 69 Top 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -15
SYMBOL voltage 544 -32 R0
WINDOW 0 33 8 Left 2
WINDOW 3 41 71 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
TEXT 1408 528 Left 2 !.tran 100u
TEXT 32 -696 Left 2 ;Notes:\n \nBandwidth = 139MHz.
TEXT 32 -392 Left 2 !.param Vdd = 15
RECTANGLE Normal 768 -432 16 -720 2
* Z:\home\khalils\Downloads\files\data\raw_asc\5b7589bca825_BT-CE-IN.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 {Uce}
Q1 N001 be 0 0 BC547B
V1 be 0 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 1V
.meas dc M1 find V(be)*1000 when Ib(Q1)=1mA
.meas dc M2 find V(be)*1000 when Ib(Q1)=3mA
.step param Uce list 5V 20V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 32 224 32
WIRE 224 64 224 32
WIRE 368 96 368 32
WIRE 144 112 32 112
WIRE 160 112 144 112
WIRE 32 128 32 112
WIRE 32 224 32 208
WIRE 224 224 224 160
WIRE 368 224 368 176
SYMBOL npn 160 64 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL voltage 32 112 R0
WINDOW 3 24 32 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 35 30 Left 2
SYMATTR Value 0
SYMATTR InstName V1
SYMBOL voltage 368 80 R0
WINDOW 3 44 63 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 34 24 Left 2
SYMATTR Value {Uce}
SYMATTR InstName V2
FLAG 224 224 0
FLAG 32 224 0
FLAG 368 224 0
FLAG 144 112 be
TEXT 16 272 Left 2 !.dc V1 0 1V
TEXT 16 328 Left 2 !.meas dc M1 find V(be)*1000 when Ib(Q1)=1mA\n.meas dc M2 find V(be)*1000 when Ib(Q1)=3mA
TEXT 16 296 Left 2 !.step param Uce list 5V 20V
* Z:\home\khalils\Downloads\files\data\raw_asc\1f39d1f16a38_current-limiting-npn.asc
* Generated by LTspice 26.0.1 for Windows.
* Sizing:\nR2 sets max current -> set max current through the load: \nImax = 20 mA\n \nFind R2 at max current assuming its voltage drop is Vbe and Q2 is still not conducting \n-> R2 = 0.6V/Imax = 30 ohm\nFind base current at the limiting condition where Q2 is still not conducting \n-> Ib = Ic/100 = 200 uA\nFind R1 using KVL \n-> 12 = R1*Ib + 0.6 + 0.6 -> R1 = (12 - 1.2)/20 u = 54k ohm\n \nNow see what happens when R load changes -> max current \nthrough the circuit is fixed at 20 mA\nPossible application -> LED driver circuit\n \nAfter running the simulation:\n1) CTRL + L or View SPICE error log\n2) Right click -> Plot .step ed .meas data
* Current limiting circuit using NPN transistors
Q2 N002 N003 0 0 2N3904
V1 Vcc 0 12
R2 0 N003 {R2}
R1 N002 Vcc 54k
Q1 N001 N002 N003 0 2N3904
R3 Vcc N001 {R_load}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1
.step param R_load 100 1k 50
.meas Load_current AVG I(R3)
.param R2=0.6/{Imax} Imax=50m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1892 728
WIRE -128 -48 -128 -96
WIRE 288 -16 288 -64
WIRE -128 64 -128 32
WIRE 288 128 288 64
WIRE 48 176 -32 176
WIRE 160 176 128 176
WIRE 224 176 160 176
WIRE 160 256 160 176
WIRE 288 304 288 224
WIRE 288 304 224 304
WIRE 288 352 288 304
WIRE 160 464 160 352
WIRE 288 464 288 432
SYMBOL voltage -128 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 144 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 54k
SYMBOL npn 224 128 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL npn 224 256 M0
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL res 304 448 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL res 272 -32 R0
SYMATTR InstName R3
SYMATTR Value {R_load}
FLAG 288 464 0
FLAG 160 464 0
FLAG -128 64 0
FLAG -128 -96 Vcc
FLAG 288 -64 Vcc
FLAG -32 176 Vcc
TEXT 520 -64 Left 2 ;Sizing:\nR2 sets max current -> set max current through the load: \nImax = 20 mA\n \nFind R2 at max current assuming its voltage drop is Vbe and Q2 is still not conducting \n-> R2 = 0.6V/Imax = 30 ohm\nFind base current at the limiting condition where Q2 is still not conducting \n-> Ib = Ic/100 = 200 uA\nFind R1 using KVL \n-> 12 = R1*Ib + 0.6 + 0.6 -> R1 = (12 - 1.2)/20 u = 54k ohm\n \nNow see what happens when R load changes -> max current \nthrough the circuit is fixed at 20 mA\nPossible application -> LED driver circuit\n \nAfter running the simulation:\n1) CTRL + L or View SPICE error log\n2) Right click -> Plot .step ed .meas data
TEXT 168 664 Left 2 !.tran 1
TEXT 168 552 Left 2 !.step param R_load 100 1k 50
TEXT 168 608 Left 2 !.meas Load_current AVG I(R3)
TEXT 56 -288 Left 4 ;Current limiting circuit using NPN transistors
TEXT 560 544 Left 2 !.param R2=0.6/{Imax} Imax=50m
* Z:\home\khalils\Downloads\files\data\raw_asc\148aa1fc0f56_CMOS_AND.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N003 N004 N001 N001 AO6407
M2 N003 N007 N001 N001 AO6407
M3 N003 N004 N005 N005 BSP89
M4 N005 N007 0 0 BSP89
V1 N001 0 7
V2 N004 0 PULSE(0 8 1 1n 1n 2 4 10)
V3 N007 0 PULSE(0 8 1 1n 1n 4 8 10)
M5 N006 N003 N002 N002 AO6407
M6 N006 N003 0 0 BSP89
V5 N002 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 50
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 576 -64 400 -64
WIRE 208 -32 -48 -32
WIRE 208 48 80 48
WIRE 256 48 208 48
WIRE 576 96 576 16
WIRE 624 112 496 112
WIRE 208 144 80 144
WIRE 256 144 208 144
WIRE 208 192 208 144
WIRE 496 192 496 112
WIRE 496 192 208 192
WIRE -48 208 -48 -32
WIRE 128 208 128 64
WIRE 128 208 32 208
WIRE 208 208 208 192
WIRE 128 288 128 208
WIRE 160 288 128 288
WIRE 208 336 208 304
WIRE 576 368 576 192
WIRE -48 416 -48 208
WIRE 160 416 32 416
WIRE 304 416 304 64
WIRE 304 416 160 416
WIRE 496 448 496 192
WIRE 528 448 496 448
WIRE -48 496 -48 416
WIRE 208 496 208 432
WIRE 208 496 -48 496
WIRE 400 496 400 -64
WIRE 400 496 208 496
WIRE 576 496 576 464
WIRE 576 496 400 496
WIRE 208 512 208 496
FLAG 208 512 0
SYMBOL pmos 128 144 R180
SYMATTR InstName M1
SYMATTR Value AO6407
SYMBOL pmos 304 144 R180
SYMATTR InstName M2
SYMATTR Value AO6407
SYMBOL nmos 160 208 R0
SYMATTR InstName M3
SYMATTR Value BSP89
SYMBOL nmos 160 336 R0
SYMATTR InstName M4
SYMATTR Value BSP89
SYMBOL voltage 208 64 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 7
SYMBOL voltage 48 208 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 8 1 1n 1n 2 4 10)
SYMBOL voltage 48 416 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 8 1 1n 1n 4 8 10)
SYMBOL pmos 624 192 R180
SYMATTR InstName M5
SYMATTR Value AO6407
SYMBOL nmos 528 368 R0
SYMATTR InstName M6
SYMATTR Value BSP89
SYMBOL voltage 576 32 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 5
TEXT -162 536 Left 2 !.tran 50
* Z:\home\khalils\Downloads\files\data\raw_asc\02e9de67f2b6_ss-mult-vbe.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 +mvbe N001 N002 0 MJE340
Q2 -mvbe N003 N002 0 MJE350
R_fija_corriente N001 N003 270
R- N003 -mvbe 150
C_comp +mvbe -mvbe 1
R+ +mvbe N001 150
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
* La corriente externa debe ser mayor a la de las resistencias o entra en corte
* NOTAS
.lib models.mod
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1364 680
WIRE -144 -256 -144 -384
WIRE -144 -256 -240 -256
WIRE -48 -256 -144 -256
WIRE -48 -240 -48 -256
WIRE -144 -176 -144 -256
WIRE -48 -128 -48 -160
WIRE -48 -128 -80 -128
WIRE -240 -80 -240 -256
WIRE -48 -80 -48 -128
WIRE -144 -32 -144 -80
WIRE -144 16 -144 -32
WIRE -48 64 -48 0
WIRE -48 64 -80 64
WIRE -48 96 -48 64
WIRE -240 192 -240 -16
WIRE -144 192 -144 112
WIRE -144 192 -240 192
WIRE -48 192 -48 176
WIRE -48 192 -144 192
WIRE -144 208 -144 192
WIRE -144 320 -144 208
FLAG -144 -384 +mvbe
FLAG -144 320 -mvbe
DATAFLAG -144 -256 "round($*100)/100"
DATAFLAG -144 208 "round($*100)/100"
DATAFLAG -48 64 "round($*1k)/1k"
DATAFLAG -48 -128 "round($*1k)/1k"
DATAFLAG -144 -32 "round($*1k)/1k"
SYMBOL npn -80 -176 M0
SYMATTR InstName Q1
SYMATTR Value MJE340
SYMBOL pnp -80 112 R180
WINDOW 0 56 33 Left 2
WINDOW 3 53 68 Left 2
SYMATTR InstName Q2
SYMATTR Value MJE350
SYMBOL res -64 -96 R0
SYMATTR InstName R_fija_corriente
SYMATTR Value 270
SYMBOL res -64 80 R0
SYMATTR InstName R-
SYMATTR Value 150
SYMBOL cap -256 -80 R0
WINDOW 0 -19 83 VLeft 2
SYMATTR InstName C_comp
SYMATTR Value 1u
SYMBOL res -64 -256 R0
SYMATTR InstName R+
SYMATTR Value 150
TEXT 384 -272 Left 2 ;La corriente externa debe ser mayor a la de las resistencias o entra en corte
TEXT 672 -408 Left 5 ;NOTAS
TEXT 464 -40 Left 2 !.lib models.mod