Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\1656eaa37e0e_ADA4830_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
XU1 N003 N005 0 N001 0 N006 N002 N004 ADA4830 ;pnba VREF)IN+)IN-)V+)V-)ENA)STB)OUT
V4 N003 0 2.5
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4830.asy)
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1256 680
WIRE 16 16 -128 16
WIRE 64 16 16 16
WIRE -128 32 -128 16
WIRE 64 32 64 16
WIRE 16 112 16 16
WIRE -128 128 -128 112
WIRE 64 128 64 112
WIRE -16 160 -32 160
WIRE -16 192 -336 192
WIRE 336 192 192 192
WIRE -336 208 -336 192
WIRE -16 224 -208 224
WIRE -208 240 -208 224
WIRE 16 288 16 272
WIRE 64 288 64 272
WIRE -336 304 -336 288
WIRE -208 336 -208 320
WIRE 64 384 64 368
SYMBOL voltage -128 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADA4830 48 192 R0
WINDOW 0 50 -38 Left 2
SYMATTR InstName U1
SYMBOL voltage -336 192 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName V4
SYMATTR Value 2.5
FLAG 16 288 0
FLAG -336 304 0
FLAG -208 336 0
FLAG -128 128 0
FLAG 64 384 0
FLAG -32 160 0
* Z:\home\khalils\Downloads\files\data\raw_asc\101b81b7e3c5_trafo3yy.asc
* Generated by LTspice 26.0.1 for Windows.
L1A L1A L1N {L1} Rser={RL1}
L2A L2A L2N {L2} Rser={RL2}
L1B L1B L1N {L1} Rser={RL1}
L2B L2B L2N {L2} Rser={RL2}
L1C L1C L1N {L1} Rser={RL1}
L2C L2C L2N {L2} Rser={RL2}
K1 L1A L2A {M}
K2 L1B L2B {M}
K3 L1C L2C {M}
.param RL1=1m RL2=1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 744
WIRE 272 112 192 112
WIRE 512 112 352 112
WIRE 272 144 272 112
WIRE 352 144 352 112
WIRE 272 256 272 224
WIRE 272 256 224 256
WIRE 352 256 352 224
WIRE 400 256 352 256
WIRE 272 288 192 288
WIRE 512 288 352 288
WIRE 272 320 272 288
WIRE 352 320 352 288
WIRE 224 432 224 256
WIRE 272 432 272 400
WIRE 272 432 224 432
WIRE 352 432 352 400
WIRE 400 432 400 256
WIRE 400 432 352 432
WIRE 272 464 192 464
WIRE 512 464 352 464
WIRE 272 496 272 464
WIRE 352 496 352 464
WIRE 224 608 224 432
WIRE 272 608 272 576
WIRE 272 608 224 608
WIRE 352 608 352 576
WIRE 400 608 400 432
WIRE 400 608 352 608
WIRE 224 640 224 608
WIRE 400 640 400 608
FLAG 192 112 L1A
IOPIN 192 112 BiDir
FLAG 192 288 L1B
IOPIN 192 288 BiDir
FLAG 512 112 L2A
IOPIN 512 112 BiDir
FLAG 512 288 L2B
IOPIN 512 288 BiDir
FLAG 192 464 L1C
IOPIN 192 464 BiDir
FLAG 512 464 L2C
IOPIN 512 464 BiDir
FLAG 400 640 L2N
IOPIN 400 640 BiDir
FLAG 224 640 L1N
IOPIN 224 640 BiDir
SYMBOL ind2 256 128 R0
WINDOW 0 -24 32 Left 2
WINDOW 3 -58 73 Left 2
SYMATTR InstName L1A
SYMATTR Value {L1}
SYMATTR Type ind
SYMATTR SpiceLine Rser={RL1}
SYMBOL ind2 368 128 M0
WINDOW 0 -21 27 Left 2
WINDOW 3 -57 83 Left 2
SYMATTR InstName L2A
SYMATTR Value {L2}
SYMATTR Type ind
SYMATTR SpiceLine Rser={RL2}
SYMBOL ind2 256 304 R0
WINDOW 0 -24 32 Left 2
WINDOW 3 -58 73 Left 2
SYMATTR InstName L1B
SYMATTR Value {L1}
SYMATTR Type ind
SYMATTR SpiceLine Rser={RL1}
SYMBOL ind2 368 304 M0
WINDOW 0 -21 27 Left 2
WINDOW 3 -57 83 Left 2
SYMATTR InstName L2B
SYMATTR Value {L2}
SYMATTR Type ind
SYMATTR SpiceLine Rser={RL2}
SYMBOL ind2 256 480 R0
WINDOW 0 -24 32 Left 2
WINDOW 3 -58 73 Left 2
SYMATTR InstName L1C
SYMATTR Value {L1}
SYMATTR Type ind
SYMATTR SpiceLine Rser={RL1}
SYMBOL ind2 368 480 M0
WINDOW 0 -21 27 Left 2
WINDOW 3 -57 83 Left 2
SYMATTR InstName L2C
SYMATTR Value {L2}
SYMATTR Type ind
SYMATTR SpiceLine Rser={RL2}
TEXT 240 -16 Left 2 !K1 L1A L2A {M}\nK2 L1B L2B {M}\nK3 L1C L2C {M}
TEXT 176 72 Left 2 !.param RL1=1m RL2=1m
LINE Normal 304 240 304 128 2
LINE Normal 320 240 320 128 2
LINE Normal 304 416 304 304 2
LINE Normal 320 416 320 304 2
LINE Normal 304 592 304 480 2
LINE Normal 320 592 320 480 2
* Z:\home\khalils\Downloads\files\data\raw_asc\46c38b8a867d_CMOSP_2500muA.asc
* Generated by LTspice 26.0.1 for Windows.
;dc VG -5 0 0.1
M1 N001 N002 0 0 CMOSP
VD N001 0 -5
VG N002 0 -3.9044
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.INCLUDE CD4007.lib
.dc VD -5 0 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 464 48 224 48
WIRE 464 80 464 48
WIRE 224 128 224 48
WIRE 176 208 -16 208
WIRE 464 208 464 160
WIRE -16 224 -16 208
WIRE -16 336 -16 304
WIRE 224 336 224 224
SYMBOL voltage 464 64 R0
SYMATTR InstName VD
SYMATTR Value -5
SYMBOL pmos 176 128 R0
SYMATTR InstName M1
SYMATTR Value CMOSP
SYMBOL voltage -16 208 R0
SYMATTR InstName VG
SYMATTR Value -3.9044
FLAG -16 336 0
FLAG 224 336 0
FLAG 464 208 0
TEXT 0 0 Left 2 !.INCLUDE CD4007.lib
TEXT 8 56 Left 2 !;dc VG -5 0 0.1
TEXT 16 104 Left 2 !.dc VD -5 0 0.1
* Z:\tmp\asc_mix_bvbm4pog\mix_249.asc
* Generated by LTspice 26.0.1 for Windows.
B1 3 0 V= V(1) - V(2)
V1 +V 0 5
Q1 N001 N004 OUT 0 2N3904
R1 OUT 0 2K
R2 +V N002 .2
R3 N001 +V 200
R4 N003 N002 200
I1 N002 0 SINE(1 1 1K)
XU1 N001 N003 +V 0 N004 LT1638 ;pnba In+)In-)V+)V-)OUT
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 3m
* Positive Supply Rail Current Sense
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1638.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1648 688
WIRE 192 -16 160 -16
WIRE 368 -16 288 -16
WIRE 192 48 160 48
WIRE 288 64 288 -16
WIRE 288 192 288 144
WIRE 896 80 896 64
WIRE 944 80 896 80
WIRE 1040 80 1024 80
WIRE 1264 80 1040 80
WIRE 896 112 896 80
WIRE 688 160 688 144
WIRE 1264 176 1264 80
WIRE 1104 192 1104 176
WIRE 896 208 896 192
WIRE 944 208 896 208
WIRE 1072 208 1024 208
WIRE 1200 224 1136 224
WIRE 896 240 896 208
WIRE 1040 240 1040 80
WIRE 1072 240 1040 240
WIRE 688 256 688 240
WIRE 1104 272 1104 256
WIRE 1264 288 1264 272
WIRE 1344 288 1264 288
WIRE 1264 304 1264 288
WIRE 896 352 896 320
WIRE 1264 400 1264 384
IOPIN 160 -16 In
IOPIN 160 48 In
IOPIN 368 -16 Out
SYMBOL bv 288 48 R0
SYMATTR InstName B1
SYMATTR Value V= V(1) - V(2)
SYMBOL voltage 688 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL npn 1200 176 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 1248 288 R0
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL res 880 96 R0
SYMATTR InstName R2
SYMATTR Value .2
SYMBOL res 1040 64 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 200
SYMBOL res 1040 192 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R4
SYMATTR Value 200
SYMBOL current 896 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value SINE(1 1 1K)
SYMBOL opamps\\LT1638 1104 160 R0
SYMATTR InstName U1
FLAG 160 -16 1
FLAG 160 48 2
FLAG 368 -16 3
FLAG 288 192 0
FLAG 688 256 0
FLAG 1104 176 +V
FLAG 688 144 +V
FLAG 1104 272 0
FLAG 1264 400 0
FLAG 896 64 +V
FLAG 896 352 0
FLAG 1344 288 OUT
TEXT 376 368 Left 0 !.tran 3m
TEXT 128 -16 Bottom 0 ;Positive Supply Rail Current Sense
* Z:\home\khalils\Downloads\files\data\raw_asc\1bd192eea262_Voltage_subtractor.asc
* Generated by LTspice 26.0.1 for Windows.
* Voltage substractor
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8032.asy)
V1 IN2 0 3.7
R1 N003 IN1 100k
R3 IN2 N002 100k
XU1 N003 N002 N001 0 OUT AD8031 ;pnba In+)In-)V+)V-)OUT
V2 IN1 IN2 4.2
V3 N001 0 5
R2 N003 0 100k
R4 N002 OUT 100k
.tran 0 1 0 0.01
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 -80 -144 -80
WIRE 560 -80 208 -80
WIRE -144 -48 -144 -80
WIRE -144 48 -144 32
WIRE -32 48 -144 48
WIRE 16 48 -32 48
WIRE 144 48 96 48
WIRE 288 48 144 48
WIRE 416 48 368 48
WIRE 208 112 208 -80
WIRE 144 128 144 48
WIRE 176 128 144 128
WIRE 416 144 416 48
WIRE 416 144 240 144
WIRE -96 160 -96 -80
WIRE -32 160 -96 160
WIRE 16 160 -32 160
WIRE 144 160 96 160
WIRE 176 160 144 160
WIRE -144 192 -144 48
WIRE 560 192 560 -80
WIRE 144 208 144 160
WIRE -144 304 -144 272
WIRE 144 304 144 288
WIRE 144 304 -144 304
WIRE 208 304 208 176
WIRE 208 304 144 304
WIRE 560 304 560 272
WIRE 560 304 208 304
WIRE 208 320 208 304
SYMBOL res 272 32 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL voltage 560 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -144 -64 R0
WINDOW 0 -79 41 Left 2
WINDOW 3 -82 66 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 4.2
SYMBOL OpAmps\\AD8032 208 80 R0
SYMATTR InstName U1
SYMBOL res 160 192 M0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res 0 32 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 112 176 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage -144 176 R0
WINDOW 0 -80 29 Left 2
WINDOW 3 -82 58 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.7
FLAG 208 320 0
FLAG 416 144 OUT
FLAG -32 160 IN1
FLAG -32 48 IN2
TEXT -160 -192 Left 2 ;Voltage substractor
TEXT -160 -160 Left 2 !.tran 0 1 0 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2504-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
* PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2504-2.8.asy)
XU1 N001 N002 OUT IN IN 0 OUT NC_01 ADP2504-2.8 ;pnba SW1)SW2)FB)EN)PVin)GND)Vout)Sync
C1 OUT 0 10
Rload OUT 0 50
V1 IN 0 3.3
L1 N001 N002 1.5 Rser=80m
.tran 400u startup
.lib ADP2504-2.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 48 64 32 64
WIRE 336 64 304 64
WIRE -64 80 -64 64
WIRE 32 144 32 64
WIRE 48 144 32 144
WIRE 336 144 304 144
WIRE -64 176 -64 160
WIRE 320 224 304 224
WIRE 368 224 320 224
WIRE 480 224 368 224
WIRE 368 240 368 224
WIRE 480 240 480 224
WIRE 48 304 32 304
WIRE 320 304 320 224
WIRE 320 304 304 304
WIRE 368 336 368 304
WIRE 480 336 480 320
SYMBOL cap 352 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ind 320 48 R0
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=80m
SYMBOL res 464 224 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL voltage -64 64 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL ADP2504-2.8 176 176 R0
SYMATTR InstName U1
FLAG 368 336 0
FLAG 32 304 0
FLAG -64 176 0
FLAG 480 336 0
FLAG -64 64 IN
FLAG 480 224 OUT
TEXT 432 392 Left 2 !.tran 400u startup
TEXT 176 8 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3124.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3124.asy)
C1 N004 0 4.7
C3 N002 OUT .1
R2 OUT N005 1.02Meg
L1 IN N001 4.7 Rser=20m
R1 N006 0 28K
XU1 N001 0 N003 0 IN IN N004 N006 N007 N005 IN 0 OUT MP_01 OUT N002 LTC3124 ;pnba SWB)PGNDB)SWA)PGNDA)Vin)PWM)Vcc)Rt)Vc)FB)_SD)SGND)VoutA))VoutB)CAP
L2 IN N003 4.7 Rser=20m
R3 N005 0 113K
C4 OUT 0 22 x2 Rser=10m
V1 IN 0 5
C2 N007 0 680p Rser=84.5K Cpar=56p
Rload OUT 0 8
.tran 1.5m startup
.lib LTC3124.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 956 688
WIRE 416 -192 -16 -192
WIRE -16 -112 -16 -192
WIRE -16 -112 -96 -112
WIRE 0 -112 -16 -112
WIRE 112 -112 80 -112
WIRE 448 -112 400 -112
WIRE -96 -96 -96 -112
WIRE 448 -96 448 -112
WIRE 112 -16 96 -16
WIRE 448 -16 448 -32
WIRE 448 -16 400 -16
WIRE 544 -16 448 -16
WIRE 704 -16 544 -16
WIRE 752 -16 704 -16
WIRE -96 0 -96 -16
WIRE 752 0 752 -16
WIRE 544 16 544 -16
WIRE -16 80 -16 -112
WIRE 0 80 -16 80
WIRE 112 80 80 80
WIRE 544 96 544 80
WIRE 752 96 752 80
WIRE 112 176 96 176
WIRE 448 176 448 -16
WIRE 448 176 400 176
WIRE -16 272 -16 80
WIRE 112 272 -16 272
WIRE 448 272 400 272
WIRE 704 352 704 -16
WIRE -16 368 -16 272
WIRE 112 368 -16 368
WIRE 416 368 416 -192
WIRE 416 368 400 368
WIRE 16 464 0 464
WIRE 112 464 80 464
WIRE 704 464 704 432
WIRE 704 464 400 464
WIRE 704 480 704 464
WIRE 16 560 0 560
WIRE 112 560 96 560
WIRE 512 560 400 560
WIRE 608 560 576 560
WIRE 704 576 704 560
SYMBOL res 736 -16 R0
SYMATTR InstName Rload
SYMATTR Value 8
SYMBOL ind -16 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=20m
SYMBOL res 112 544 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 28K
SYMBOL cap 432 -96 R0
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL cap 80 448 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL res 688 464 R0
SYMATTR InstName R3
SYMATTR Value 113K
SYMBOL cap 528 16 R0
WINDOW 123 35 61 Left 2
WINDOW 3 46 32 Left 2
SYMATTR Value2 x2
SYMATTR Value 22
SYMATTR InstName C4
SYMATTR SpiceLine Rser=10m
SYMBOL PowerProducts\\LTC3124 256 224 R0
SYMATTR InstName U1
SYMBOL res 688 336 R0
SYMATTR InstName R2
SYMATTR Value 1.02Meg
SYMBOL ind -16 -96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=20m
SYMBOL cap 512 576 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
WINDOW 39 -21 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 680p
SYMATTR SpiceLine Rser=84.5K Cpar=56p
SYMBOL voltage -96 -112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG -96 0 0
FLAG 96 -16 0
FLAG 96 176 0
FLAG -96 -112 IN
FLAG 0 464 0
FLAG 0 560 0
FLAG 608 560 0
FLAG 448 272 0
FLAG 544 96 0
FLAG 704 576 0
FLAG 752 96 0
FLAG 752 -16 OUT
TEXT 696 672 Left 2 !.tran 1.5m startup
* Z:\tmp\asc_dec_bjh7r6w2\0fa5a251238b_EjercicioParaEntregar_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 COLEC BASE EMISOR 0 BC857A
R3 COLEC N005 3900
V3 N001 0 24
R1 BASE 0 150k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 -240 -80 -240
WIRE -32 -176 -32 -240
WIRE 208 -176 112 -176
WIRE -80 -128 -80 -240
WIRE 208 -128 208 -176
WIRE 112 -64 112 -96
WIRE -80 0 -80 -48
WIRE 112 32 112 16
WIRE 176 32 112 32
WIRE 304 32 240 32
WIRE 112 64 112 32
WIRE 304 64 304 32
WIRE 112 80 112 64
WIRE -240 128 -336 128
WIRE -80 128 -80 80
WIRE -80 128 -160 128
WIRE 0 128 -80 128
WIRE 48 128 0 128
WIRE 112 208 112 176
WIRE 176 208 112 208
WIRE 320 208 240 208
WIRE -80 224 -80 128
WIRE 112 240 112 208
WIRE -80 352 -80 304
WIRE 112 448 112 320
SYMBOL pnp 48 176 M180
SYMATTR InstName Q1
SYMATTR Value BC857A
SYMBOL res 96 224 R0
SYMATTR InstName R3
SYMATTR Value 3900
SYMBOL voltage 112 -80 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 24
SYMBOL res -96 208 R0
SYMATTR InstName R1
SYMATTR Value 150k
FLAG -32 -176 0
FLAG -80 352 0
FLAG 208 -128 0
FLAG 0 128 BASE
FLAG 112 64 EMISOR
FLAG 112 208 COLEC
FLAG 304 64 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3014B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3014B.asy)
V1 N001 0 PWL(0 0 1 10)
XU1 OUT N002 MP_01 0 MP_02 MP_03 MP_04 N001 LT3014B ;pnba OUT)ADJ))GND))))IN
R1 OUT N002 3.92Meg
Rload OUT 0 250
R2 N002 0 1.27Meg
C1 OUT 0 .47
.tran 1
.lib LT3014.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 224 -144 224
WIRE 384 224 336 224
WIRE 528 224 384 224
WIRE 624 224 528 224
WIRE 624 240 624 224
WIRE -144 256 -144 224
WIRE 528 256 528 224
WIRE 384 320 384 304
WIRE 384 320 336 320
WIRE 384 336 384 320
WIRE 528 336 528 320
WIRE 624 336 624 320
WIRE -144 368 -144 336
WIRE 192 400 192 384
WIRE 384 432 384 416
SYMBOL PowerProducts\\LT3014B 192 256 R0
SYMATTR InstName U1
SYMBOL res 608 224 R0
SYMATTR InstName Rload
SYMATTR Value 250
SYMBOL cap 512 256 R0
SYMATTR InstName C1
SYMATTR Value .47
SYMBOL voltage -144 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 368 208 R0
SYMATTR InstName R1
SYMATTR Value 3.92Meg
SYMBOL res 368 320 R0
SYMATTR InstName R2
SYMATTR Value 1.27Meg
FLAG -144 368 0
FLAG 192 400 0
FLAG 384 432 0
FLAG 624 336 0
FLAG 528 336 0
FLAG 624 224 OUT
TEXT 560 400 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\33f15cad1106_11-14.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1490.asy)
V3 N007 0 -10
V2 N005 0 10
Rs N003 N006 20000
C1 N004 N003 0.00000001
V1 N006 0 AC 0.1
RL N004 0 1000
XU1 0 N003 N005 N007 N004 LT1490A ;pnba In+)In-)V+)V-)OUT
Rf N004 N003 100000
.ac dec 100 1 1000000
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 980 680
WIRE 208 -1248 208 -1264
WIRE 160 -1088 160 -1104
WIRE 592 -240 384 -240
WIRE 896 -240 672 -240
WIRE 384 -160 384 -240
WIRE 592 -160 384 -160
WIRE 896 -160 896 -240
WIRE 896 -160 656 -160
WIRE 544 -96 528 -96
WIRE 544 -32 544 -96
WIRE 176 -16 48 -16
WIRE 384 -16 384 -160
WIRE 384 -16 256 -16
WIRE 512 -16 384 -16
WIRE 896 0 896 -160
WIRE 896 0 576 0
WIRE 512 16 384 16
WIRE 48 64 48 -16
WIRE 544 64 544 32
WIRE 544 80 544 64
WIRE 896 96 896 0
WIRE 544 192 544 144
WIRE 48 240 48 144
WIRE 384 240 384 16
WIRE 896 240 896 176
SYMBOL res 880 80 R0
SYMATTR InstName RL
SYMATTR Value 1000
SYMBOL voltage 48 48 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 0.1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL voltage 544 -96 R90
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 10
SYMBOL OpAmps\\LT1490 544 -64 R0
SYMATTR InstName U1
SYMBOL res 688 -256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rf
SYMATTR Value 100000
SYMBOL cap 656 -176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.00000001
SYMBOL res 272 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rs
SYMATTR Value 20000
SYMBOL voltage 544 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -10
FLAG 896 240 0
FLAG 384 240 0
FLAG 48 240 0
FLAG 544 192 0
FLAG 448 -96 0
TEXT 8 -144 Left 2 !.ac dec 100 1 1000000
* Z:\home\khalils\Downloads\files\data\raw_asc\2cd95fa28343_Draft11.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 1
D1 N004 N002 mydiode
V3 N003 0 PWL repeat forever (0 10 0.05m -10 0.1m 10) endrepeat
V2 0 N006 2
R1 N004 N003 3k
D2 N005 N004 mydiode
R2 N005 N006 1k
D3 N006 N005 mydiode
R3 N001 N002 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model mydiode D(Is=1.78e-15)
.tran 0.5m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 768
WIRE 560 48 560 32
WIRE 560 80 560 48
WIRE 560 192 560 160
WIRE 560 320 560 272
WIRE 560 336 560 320
WIRE 224 400 192 400
WIRE 352 400 304 400
WIRE 416 400 352 400
WIRE 560 400 560 384
WIRE 560 400 496 400
WIRE 560 432 560 400
WIRE 560 528 560 496
WIRE 592 528 560 528
WIRE 560 544 560 528
WIRE 592 544 592 528
WIRE 688 544 592 544
WIRE 560 656 560 608
WIRE 688 656 688 624
WIRE 688 656 560 656
WIRE 560 672 560 656
SYMBOL res 672 528 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL diode 576 608 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value mydiode
SYMBOL voltage 560 176 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL res 544 176 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 512 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3k
SYMBOL diode 576 384 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value mydiode
SYMBOL voltage 320 400 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V3
SYMATTR Value PWL repeat forever (0 10 0.05m -10 0.1m 10) endrepeat
SYMBOL diode 576 496 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value mydiode
SYMBOL voltage 560 768 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 2
FLAG 192 400 0
FLAG 560 48 0
FLAG 560 752 0
FLAG 352 400 N003
FLAG 560 400 N004
TEXT 144 536 Left 2 !.model mydiode D(Is=1.78e-15)
TEXT 192 288 Left 2 !.tran 0.5m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2641A-16.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N005 0 PULSE(0 3.3 0 0.1n 0.1n 19.8n 40n)
V2 N002 0 5
V3 N003 0 2.5
V4 N004 0 PULSE(0 3.3 0 0.1n 0.1n 9.9n 20n)
V5 N001 0 PWL(0 3.3 0.6u 3.3 +2n 0 +0.31u 0 +2n 3.3)
V6 N006 0 PWL(0 3.3 2u 3.3 +2n 0 +30n 0 +2n 3.3)
C1 OUT 0 10p
XU1 N003 N001 N004 N005 N006 OUT N002 0 LTC2641A-16 ;pnba REF)_CS)SCLK)DIN)_CLR)Vout)Vdd)GND
.tran 3u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2641A-16.asy)
.lib LTC2641A-16.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 932
WIRE 320 16 320 -16
WIRE 448 16 448 -16
WIRE -32 64 -48 64
WIRE 192 64 48 64
WIRE 320 128 320 96
WIRE 448 128 448 96
WIRE 192 176 192 64
WIRE 240 176 192 176
WIRE -32 192 -48 192
WIRE 160 192 48 192
WIRE 160 240 160 192
WIRE 240 240 160 240
WIRE 608 272 528 272
WIRE 608 288 608 272
WIRE -32 304 -48 304
WIRE 240 304 48 304
WIRE 240 368 176 368
WIRE 608 368 608 352
WIRE 384 416 384 400
WIRE -32 448 -48 448
WIRE 176 448 176 368
WIRE 176 448 48 448
FLAG 384 416 0
FLAG -48 304 0
FLAG 320 -16 0
FLAG 448 -16 0
FLAG -48 192 0
FLAG -48 64 0
FLAG -48 448 0
FLAG 608 272 OUT
FLAG 608 368 0
SYMBOL voltage 64 304 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -99 VRight 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 0.1n 0.1n 19.8n 40n)
SYMBOL voltage 320 112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 448 112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 2.5
SYMBOL voltage 64 192 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -89 VRight 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 3.3 0 0.1n 0.1n 9.9n 20n)
SYMBOL voltage 64 64 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -122 VRight 2
SYMATTR InstName V5
SYMATTR Value PWL(0 3.3 0.6u 3.3 +2n 0 +0.31u 0 +2n 3.3)
SYMBOL voltage 64 448 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -99 VRight 2
SYMATTR InstName V6
SYMATTR Value PWL(0 3.3 2u 3.3 +2n 0 +30n 0 +2n 3.3)
SYMBOL cap 592 288 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL LTC2641A-16 384 272 R0
SYMATTR InstName U1
TEXT 632 432 Left 2 !.tran 3u