Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\3ec71baa452f_Assignment_6b__ii_.asc
* Generated by LTspice 26.0.1 for Windows.
Vin N002 0 SINE(0 5 1000)
V2 Vcc 0 15
V3 0 Vee 15
XU1 0 N001 Vcc Vee Vout LT1001 ;pnba In+)In-)V+)V-)OUT
Ri N001 N002 100000
Rf Vout N001 300000
.tran 5ms
* Inverting Op-Amp (Vout = Vb)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 64 -32 64
WIRE 112 64 96 64
WIRE 272 64 272 32
WIRE -144 112 -176 112
WIRE -48 112 -64 112
WIRE -176 160 -176 112
WIRE -48 176 -48 112
WIRE -32 176 -32 64
WIRE -32 176 -48 176
WIRE -16 176 -32 176
WIRE 112 192 112 64
WIRE 112 192 48 192
WIRE 160 192 112 192
WIRE 272 192 272 144
WIRE 400 192 272 192
WIRE -16 208 -48 208
WIRE 400 224 400 192
WIRE 272 240 272 192
WIRE -176 336 -176 240
WIRE -48 336 -48 208
WIRE 272 368 272 320
FLAG -176 336 0
FLAG -48 336 0
FLAG 400 224 0
FLAG 272 32 Vcc
FLAG 16 160 Vcc
FLAG 16 224 Vee
FLAG 272 368 Vee
FLAG 160 192 Vout
IOPIN 160 192 Out
SYMBOL voltage -176 144 R0
WINDOW 3 107 96 Center 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 5 1000)
SYMBOL voltage 272 48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage 272 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL Opamps\\OP07 16 128 R0
SYMATTR InstName U1
SYMBOL res -48 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Ri
SYMATTR Value 100000
SYMBOL res 112 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rf
SYMATTR Value 300000
TEXT -176 392 Left 2 !.tran 5ms
TEXT -88 -48 Left 2 ;Inverting Op-Amp (Vout = Vb)
* Z:\tmp\asc_dec_bjh7r6w2\1723bd3a88ba_Fig16_11_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M6 VDDby2 Eq bitline1 0 N_50n l=50n w=500n
Vra0 ra0 0 PULSE 0 1.5 12n
Vsn sense_N 0 PULSE 0 1 15n
Cmbit0 mb0 0 20f
M3 bitline0 bitline1 N001 0 N_50n l=50n w=500n
M2 bitline1 bitline0 N001 0 N_50n l=50n w=500n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1556 680
WIRE 0 -240 0 -256
WIRE 0 -144 0 -160
WIRE 112 -432 112 -464
WIRE 192 -224 192 -256
WIRE 192 -112 192 -144
WIRE 288 -432 288 -464
WIRE 384 -240 384 -256
WIRE 384 -144 384 -160
WIRE 544 -800 336 -800
WIRE 608 -800 544 -800
WIRE 608 -800 608 -832
WIRE 640 -416 608 -416
WIRE 656 -912 656 -944
WIRE 656 -768 656 -816
WIRE 656 -752 656 -768
WIRE 768 -944 656 -944
WIRE 768 -944 768 -992
WIRE 768 -464 768 -944
WIRE 768 -368 768 -464
WIRE 768 -352 768 -368
WIRE 768 -304 688 -304
WIRE 768 -304 768 -352
WIRE 768 -256 768 -304
WIRE 768 -240 768 -256
WIRE 768 -96 768 -144
WIRE 800 -352 768 -352
WIRE 848 -160 816 -160
WIRE 864 -256 768 -256
WIRE 880 -416 640 -416
WIRE 880 -400 880 -416
WIRE 912 -464 768 -464
WIRE 928 -416 880 -416
WIRE 944 -352 896 -352
WIRE 944 -304 944 -352
WIRE 944 -288 944 -304
WIRE 960 -96 768 -96
WIRE 960 -80 960 -96
WIRE 976 -352 944 -352
WIRE 1008 -800 608 -800
WIRE 1008 -176 864 -256
WIRE 1040 -256 848 -160
WIRE 1040 -160 1008 -176
WIRE 1056 -416 928 -416
WIRE 1056 -400 1056 -416
WIRE 1072 -160 1040 -160
WIRE 1120 -464 1008 -464
WIRE 1120 -464 1120 -528
WIRE 1120 -352 1072 -352
WIRE 1120 -352 1120 -464
WIRE 1120 -336 1120 -352
WIRE 1120 -304 1120 -336
WIRE 1120 -256 1040 -256
WIRE 1120 -256 1120 -304
WIRE 1120 -240 1120 -256
WIRE 1120 -96 960 -96
WIRE 1120 -96 1120 -144
WIRE 1200 -304 1120 -304
WIRE 1296 -416 1056 -416
WIRE 1312 -528 1120 -528
SYMBOL nmos4 976 -400 M90
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M6
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 384 -256 R0
WINDOW 0 -72 21 Left 0
WINDOW 3 -99 147 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vra0
SYMATTR Value PULSE 0 1.5 12n
SYMBOL voltage 192 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -71 169 Left 0
SYMATTR Value PULSE 0 1 15n
SYMATTR InstName Vsn
SYMBOL cap 640 -752 R0
WINDOW 3 41 47 Left 0
SYMATTR Value 20f
SYMATTR InstName Cmbit0
SYMBOL nmos4 816 -240 M0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M3
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 1072 -240 R0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M2
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
FLAG 0 -144 0
FLAG 0 -256 Eq
FLAG 112 -432 0
FLAG 192 -112 0
FLAG 192 -256 sense_N
FLAG 1120 -192 0
FLAG 768 -192 0
FLAG 960 -464 0
FLAG 848 -352 0
FLAG 1024 -352 0
FLAG 640 -416 Eq
FLAG 944 -304 VDDby2
FLAG 1200 -240 0
FLAG 688 -240 0
FLAG 768 -368 bitline0
FLAG 1120 -336 bitline1
FLAG 656 -864 0
FLAG 656 -688 0
FLAG 656 -768 mb0
FLAG 544 -800 ra0
FLAG 384 -144 0
FLAG 384 -256 ra0
FLAG 288 -432 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP162-4.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP162-4.2.asy)
C1 OUT 0 1
V1 IN 0 5
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
Rload OUT 0 420
XU1 IN 0 N001 OUT ADP16xf K=238.1u ;pnba Vin)GND)En)Vout
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -48 96
WIRE 416 96 352 96
WIRE 512 96 416 96
WIRE -48 112 -48 96
WIRE 416 112 416 96
WIRE 512 112 512 96
WIRE -48 208 -48 192
WIRE 160 208 16 208
WIRE 416 208 416 176
WIRE 512 208 512 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL ADP162-4.2 256 208 R0
SYMATTR InstName U1
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 420
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -48 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
FLAG -48 208 0
FLAG 256 272 0
FLAG 416 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG -48 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG5212.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input\nQinj not included\nOn resistance modeled at 15V supplies\nOny one channel is modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG5212.asy)
XU1 vIN vD vS v- 0 v+ ADG5212 ;pnba IN)D)S)Vss)GND)Vdd
V3 v+ 0 15
V1 vS 0 SINE(0 10 20)
R1 vD 0 301
C1 vD 0 36p
V4 v- 0 -15
V2 vIN 0 PULSE(0 2.5 20n 20n 20n 150m 300m)
.tran 1
.lib ADG5212.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 832
WIRE 240 144 240 112
WIRE -80 224 -112 224
WIRE 112 224 0 224
WIRE 144 224 112 224
WIRE 384 224 336 224
WIRE 464 224 384 224
WIRE 576 224 464 224
WIRE 464 256 464 224
WIRE 576 256 576 224
WIRE 112 288 48 288
WIRE 144 288 112 288
WIRE -288 336 -288 304
WIRE -192 336 -192 304
WIRE 48 336 48 288
WIRE 464 352 464 336
WIRE 576 352 576 320
WIRE 304 416 304 400
WIRE 176 432 176 400
WIRE -288 464 -288 416
WIRE -192 464 -192 416
WIRE 48 464 48 416
SYMBOL res 448 240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage 16 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 20)
SYMBOL cap 560 256 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage 48 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 30 177 Left 2
SYMATTR Value PULSE(0 2.5 20n 20n 20n 150m 300m)
SYMATTR InstName V2
SYMBOL voltage -192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -15
SYMBOL ADG5212 240 272 R0
SYMATTR InstName U1
SYMBOL voltage -288 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15
FLAG -112 224 0
FLAG 48 464 0
FLAG 464 352 0
FLAG 304 416 0
FLAG 384 224 vD
FLAG 112 224 vS
FLAG 112 288 vIN
FLAG 576 352 0
FLAG -288 304 v+
FLAG 240 112 v+
FLAG -288 464 0
FLAG -192 464 0
FLAG -192 304 v-
FLAG 176 432 v-
TEXT 80 528 Left 2 !.tran 1
TEXT -320 -8 Left 2 ;Note:\nSwitch shown for a logic 0 input\nQinj not included\nOn resistance modeled at 15V supplies\nOny one channel is modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\0f074258da7e_1734L-4.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1734L-4.2.asy)
Q1 BAT N003 N002 0 2N2907
XU1 N002 0 N001 N004 BAT N003 LTC1734L-x.x Ref=4.2 ;pnba Isense)GND)Vcc)Prog)BAT)Drive
C1 BAT 0 .1
R1 N004 0 1K
V1 N001 0 7
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 5 startup
.lib LTC1734L-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2284 1688
WIRE 1680 1280 1536 1280
WIRE 2096 1280 1968 1280
WIRE 1536 1312 1536 1280
WIRE 2096 1328 2096 1280
WIRE 1680 1376 1632 1376
WIRE 2032 1376 1968 1376
WIRE 1536 1424 1536 1392
WIRE 1584 1472 1568 1472
WIRE 1680 1472 1664 1472
WIRE 2032 1472 1968 1472
WIRE 2096 1472 2096 1424
WIRE 2096 1472 2032 1472
WIRE 2096 1504 2096 1472
WIRE 2096 1584 2096 1568
SYMBOL PowerProducts\\LTC1734L-4.2 1824 1376 R0
SYMATTR InstName U1
SYMBOL RES 1680 1456 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL VOLTAGE 1536 1296 R0
SYMATTR InstName V1
SYMATTR Value 7
SYMBOL cap 2080 1504 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL PNP 2032 1424 M180
WINDOW 0 76 72 Left 0
WINDOW 3 76 36 Left 0
SYMATTR InstName Q1
SYMATTR Value 2N2907
FLAG 1568 1472 0
FLAG 1632 1376 0
FLAG 1536 1424 0
FLAG 2096 1584 0
FLAG 2032 1472 BAT
TEXT 1888 1560 Left 0 !.tran 5 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0493a5531c6b_Bandpass1.asc
* Generated by LTspice 26.0.1 for Windows.
* View -> Spice Error Log \nL=2mH, C=.2uF
* Bandpass\n \nAny Rp will additionally rise the bandwidth (lower Q).
R1 out 0 {Rp}
C1 out 0 {Cp}
I1 0 out AC 1
L1 out 0 {Lp} Rser={Rs}
.param B=800 F0=8000 Rs=10
.param w0 = 2*pi*F0
.param Q=F0/B
.param Lp=Rs*Q/w0
.param Cp=1/(w0*w0*Lp)
.ac lin 1000 5k 15k
.measure L1 param {Lp}
.measure C1 param {Cp}
.param Rp=1G
.measure vmax max mag(V(out))
.measure fc when mag(V(out))=vmax*0.99999
.measure flow when mag(V(out))=vmax/sqrt(2)
.measure fhigh when mag(V(out))=vmax/sqrt(2) fall=1
.measure bw param fhigh-flow
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1128 680
WIRE 64 352 64 320
WIRE 64 496 64 432
WIRE 240 320 64 320
WIRE 240 368 240 320
WIRE 240 496 64 496
WIRE 240 496 240 448
WIRE 320 320 240 320
WIRE 416 320 320 320
WIRE 416 368 416 320
WIRE 416 496 240 496
WIRE 416 496 416 432
WIRE 416 528 416 496
WIRE 576 320 416 320
WIRE 576 368 576 320
WIRE 576 496 416 496
WIRE 576 496 576 448
SYMBOL cap 400 368 R0
SYMATTR InstName C1
SYMATTR Value {Cp}
SYMBOL res 48 336 R0
SYMATTR InstName R1
SYMATTR Value {Rp}
SYMBOL current 240 448 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
WINDOW 123 24 -7 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL ind 560 352 R0
WINDOW 39 36 108 Left 0
SYMATTR InstName L1
SYMATTR Value {Lp}
SYMATTR SpiceLine Rser={Rs}
FLAG 416 528 0
FLAG 320 320 out
TEXT 16 0 Left 0 !.param B=800  F0=8000  Rs=10\n.param w0 = 2*pi*F0\n.param Q=F0/B\n.param Lp=Rs*Q/w0\n.param Cp=1/(w0*w0*Lp)
TEXT 16 232 Left 0 !.ac lin 1000 5k 15k
TEXT 416 0 Left 0 !.measure L1 param {Lp}\n.measure C1 param {Cp}
TEXT 416 64 Left 0 ;View -> Spice Error Log \nL=2mH, C=.2uF
TEXT 16 -120 Left 0 ;Bandpass\n \nAny Rp will additionally rise the bandwidth (lower Q).
TEXT 48 520 Left 0 !.param Rp=1G
TEXT 416 128 Left 0 !.measure vmax max mag(V(out))\n.measure fc when mag(V(out))=vmax*0.99999\n.measure flow when mag(V(out))=vmax/sqrt(2)\n.measure fhigh when mag(V(out))=vmax/sqrt(2)  fall=1\n.measure bw param fhigh-flow
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6108-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6108-2.asy)
R3 N005 N008 6.04K
C1 N002 0 .1
XU1 N002 N004 N007 0 N008 N005 N001 N003 LT6108-2 ;pnba SenseLo)EN/_RST)OutC)V-)INC)OutA)V+)SenseHi
R7 N006 N007 10K
I1 N002 0 PWL(10u 0 30u 500m 50u 0)
V3 N006 0 3.3
V2 N004 0 PWL(4u 0 4.01u 5)
V1 N001 0 12
R5 N008 0 1.6K
R2 N001 N002 .1
R1 N001 N003 100
.tran 60u
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2204 980
WIRE 288 -96 112 -96
WIRE 352 -96 288 -96
WIRE 480 -96 432 -96
WIRE 528 -96 480 -96
WIRE 640 -96 528 -96
WIRE 288 -80 288 -96
WIRE 640 -80 640 -96
WIRE 528 -64 528 -96
WIRE 288 16 288 0
WIRE 528 16 528 0
WIRE 640 16 640 0
WIRE 112 64 112 -96
WIRE 112 64 -192 64
WIRE 128 64 112 64
WIRE 480 64 480 -96
WIRE 480 64 448 64
WIRE -192 80 -192 64
WIRE -192 176 -192 160
WIRE -64 176 -80 176
WIRE 128 176 16 176
WIRE 480 176 448 176
WIRE 480 192 480 176
WIRE 32 288 -48 288
WIRE 128 288 112 288
WIRE 480 288 480 272
WIRE 480 288 448 288
WIRE -48 304 -48 288
WIRE 480 304 480 288
WIRE 288 352 288 336
WIRE -48 400 -48 384
WIRE 480 400 480 384
SYMBOL LT6108-2 288 224 R0
SYMATTR InstName U1
SYMBOL res 272 -96 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 464 288 R0
SYMATTR InstName R5
SYMATTR Value 1.6K
SYMBOL cap 512 -64 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage 32 176 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value PWL(4u 0 4.01u 5)
SYMBOL res 464 176 R0
SYMATTR InstName R3
SYMATTR Value 6.04K
SYMBOL current 640 -80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value PWL(10u 0 30u 500m 50u 0)
SYMBOL voltage -192 64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 16 304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R7
SYMATTR Value 10K
SYMBOL res 336 -80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value .1
SYMBOL voltage -48 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 3.3
FLAG 288 352 0
FLAG -192 176 0
FLAG -80 176 0
FLAG 640 16 0
FLAG 480 400 0
FLAG -48 400 0
FLAG 528 16 0
TEXT 744 376 Left 2 !.tran 60u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4898.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4898.asy)
V1 IN 0 SINE(0 10m 1Meg)
XU1 IN OUT Vcc Vee OUT NC_01 ADA4898 ;pnba In+)In-)V+)V-)OUT)SHDN
RL OUT 0 1k
Vee Vee 0 -15
Vcc Vcc 0 15
.tran 2u
.lib ADA4898.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1720 800
WIRE 592 256 352 256
WIRE 80 304 80 288
WIRE 192 304 192 288
WIRE 416 352 416 320
WIRE 352 368 352 256
WIRE 400 368 352 368
WIRE 592 384 592 256
WIRE 592 384 464 384
WIRE 640 384 592 384
WIRE 80 400 80 384
WIRE 192 400 192 384
WIRE 400 400 304 400
WIRE 592 432 592 384
WIRE 304 448 304 400
WIRE 416 448 416 416
WIRE 304 544 304 528
WIRE 592 544 592 512
SYMBOL res 576 416 R0
SYMATTR InstName RL
SYMATTR Value 1k
SYMBOL voltage 80 288 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 15
SYMBOL ADA4898 432 400 R0
SYMATTR InstName U1
SYMBOL voltage 304 432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10m 1Meg)
SYMBOL voltage 192 288 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value -15
FLAG 640 384 OUT
FLAG 80 288 Vcc
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 80 400 0
FLAG 304 544 0
FLAG 592 544 0
FLAG 304 400 IN
FLAG 192 288 Vee
FLAG 192 400 0
TEXT 64 576 Left 2 !.tran 2u
* Z:\tmp\asc_dec_bjh7r6w2\0f31af21495a_Coupling_Block_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N001 0 7.5Meg
D1 NC_01 Coup D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 144 64 144
WIRE 240 144 160 144
WIRE 288 144 240 144
WIRE 416 144 352 144
WIRE 496 144 416 144
WIRE 512 144 496 144
WIRE 160 160 160 144
WIRE 240 160 240 144
WIRE 496 160 496 144
WIRE 192 224 64 224
WIRE 240 224 192 224
WIRE 192 272 192 224
WIRE 416 272 416 144
SYMBOL res 224 128 R0
SYMATTR InstName R2
SYMATTR Value 7.5Meg
SYMBOL zener 432 336 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
FLAG 192 272 0
FLAG 512 144 Coup
FLAG 416 400 0
* Z:\home\khalils\Downloads\files\data\raw_asc\1e6ebb6df8bb_diode-va-reverse.asc
* Generated by LTspice 26.0.1 for Windows.
D1 b a 1SR154-400
R1 b 0 1k
V1 a 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 20V
.step temp list 0 25 50 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 208 -64 208
WIRE 160 208 80 208
WIRE -64 240 -64 208
WIRE 160 240 160 208
WIRE -64 352 -64 320
WIRE 48 352 -64 352
WIRE 160 352 160 320
WIRE 160 352 48 352
WIRE 48 368 48 352
SYMBOL Misc\\EuropeanResistor 144 224 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -64 224 R0
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL diode 80 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1SR154-400
FLAG -64 208 a
FLAG 160 208 b
FLAG 48 368 0
TEXT -64 400 Left 2 !.dc V1 0 20V
TEXT -64 424 Left 2 !.step temp list 0 25 50 100
* Z:\home\khalils\Downloads\files\data\raw_asc\fc0ee287f09e_2022023_1.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 0 D
R1 N002 N001 100
V1 N001 0 SINE(0 15 50)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 15 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -176 -128 -304 -128
WIRE 32 -128 -96 -128
WIRE 128 -128 32 -128
WIRE -304 -48 -304 -128
WIRE 32 -32 32 -128
WIRE -304 64 -304 32
WIRE 16 64 -304 64
WIRE 32 64 32 32
WIRE 32 64 16 64
WIRE 128 64 32 64
SYMBOL diode 16 -32 R0
SYMATTR InstName D1
SYMBOL res -80 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage -304 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 15 50)
FLAG 16 64 0
TEXT 384 -16 Left 2 !.dc V1 0 15 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP160-2.7.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP160-2.7.asy)
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
XU1 IN 0 N001 OUT ADP16xfd K=370.4u ;pnba Vin)GND)En)Vout
Rload OUT 0 270
V1 IN 0 5
C1 OUT 0 1
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 400 96 352 96
WIRE 496 96 400 96
WIRE -64 112 -64 96
WIRE 400 112 400 96
WIRE 496 112 496 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 400 208 400 176
WIRE 496 208 496 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL ADP160-2.7 256 208 R0
SYMATTR InstName U1
SYMBOL cap 384 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 480 96 R0
SYMATTR InstName Rload
SYMATTR Value 270
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
FLAG -64 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 496 208 0
FLAG 496 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\7ec12baf725c_temperatura.asc
* Generated by LTspice 26.0.1 for Windows.
R1 vd1 N001 1k
D1 vd1 0 1N3198
V1 N001 0 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -10 10 10m
.model 1N3198 D (IS=2.0e-7 N=1.20 RS=1.0 EG=1.11 XTI=-2 CJO=40p VJ=0.75 M=0.333 BV=2.25 IBV=5m KF=0 AF=1 FC=0.5)
.step temp list 20 100 125
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1892 680
WIRE 80 64 -16 64
WIRE 240 64 160 64
WIRE -16 112 -16 64
WIRE 240 112 240 64
WIRE -16 240 -16 192
WIRE 112 240 -16 240
WIRE 240 240 240 176
WIRE 240 240 112 240
WIRE 112 256 112 240
SYMBOL diode 224 112 R0
SYMATTR InstName D1
SYMATTR Value 1N3198
SYMBOL voltage -16 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL res 176 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 112 256 0
FLAG 240 64 vd1
TEXT -48 280 Left 2 !.dc V1 -10 10 10m
TEXT 384 128 Left 2 !.model 1N3198 D (IS=2.0e-7 N=1.20 RS=1.0 EG=1.11 XTI=-2 CJO=40p VJ=0.75 M=0.333 BV=2.25 IBV=5m KF=0 AF=1 FC=0.5)
TEXT -48 320 Left 2 !.step temp list 20 100 125
* Z:\home\khalils\Downloads\files\data\raw_asc\411a0340b954_sallen_key_3rd_order_butterworth.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 Vin 6k8
C1 N003 0 1n
R2 N001 N003 22k
R3 N004 N001 12k
C2 N002 N001 1n
V1 Vin 0 AC 1
XU1 N004 N002 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
.ac dec 100 1 50k
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 932 680
WIRE 560 -16 512 -16
WIRE 832 -16 624 -16
WIRE 128 144 64 144
WIRE 192 144 128 144
WIRE 320 144 272 144
WIRE 384 144 320 144
WIRE 512 144 512 -16
WIRE 512 144 464 144
WIRE 560 144 512 144
WIRE 688 144 640 144
WIRE 320 160 320 144
WIRE 832 160 832 -16
WIRE 832 160 752 160
WIRE 864 160 832 160
WIRE 928 160 864 160
WIRE 688 176 656 176
WIRE 656 224 656 176
WIRE 864 224 864 160
WIRE 864 224 656 224
FLAG 320 224 0
FLAG 128 144 Vin
FLAG 64 224 0
SYMBOL res 288 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 6k8
SYMBOL cap 304 160 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 480 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 22k
SYMBOL res 656 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 12k
SYMBOL cap 624 -32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL voltage 64 128 R0
WINDOW 0 -58 21 Left 2
WINDOW 3 -52 92 Left 2
WINDOW 123 -52 120 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL OpAmps\\opamp 720 96 R0
SYMATTR InstName U1
TEXT 4 268 Left 2 !.ac dec 100 1 50k
TEXT 8 296 Left 2 !.lib opamp.sub