Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6993-3.asc
* Generated by LTspice 26.0.1 for Windows.
* LTC6993-3 Non-Retriggerable 20ms One Shot\nFalling Edge Triggered, Positive Output Pulse\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6993-3.asy)
XU1 N001 0 N003 N004 N002 OUT LTC6993-3 ;pnba TRIG)GND)SET)DIV)V+)OUT
R4 OUT 0 100K
R1 N003 0 243K
R3 N004 0 392K
V2 N001 0 PULSE(0 3.3 0.25m 1n 1n 2m 15m 3)
V1 N002 0 5
R2 N002 N004 1000K
.tran 60m startup
.lib LTC6993-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -224 96 -240 96
WIRE 96 96 -144 96
WIRE 656 96 320 96
WIRE 656 112 656 96
WIRE 96 176 64 176
WIRE 400 176 320 176
WIRE 560 176 400 176
WIRE 400 192 400 176
WIRE 560 192 560 176
WIRE 656 208 656 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 352 256 320 256
WIRE 352 288 352 256
WIRE 400 288 400 272
WIRE 400 288 352 288
WIRE 560 288 560 272
WIRE 400 304 400 288
WIRE 400 400 400 384
SYMBOL voltage 560 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL SpecialFunctions\\LTC6993-3 208 176 R0
SYMATTR InstName U1
SYMBOL voltage -128 96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0.25m 1n 1n 2m 15m 3)
SYMATTR InstName V2
SYMBOL res 640 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL res 384 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 243K
SYMBOL res 384 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
FLAG -240 96 0
FLAG 560 288 0
FLAG 656 96 OUT
FLAG 656 208 0
FLAG 400 400 0
FLAG -16 256 0
FLAG 64 176 0
TEXT 520 392 Left 2 !.tran 60m startup
TEXT 216 48 Bottom 2 ;LTC6993-3 Non-Retriggerable 20ms One Shot\nFalling Edge Triggered, Positive Output Pulse\nStartup Modeled
* Z:\tmp\asc_dec_bjh7r6w2\1813c96015ff_AD8336_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N004 0 {Vgain}
V4 VPOS 0 5
R2 INPN 0 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -192 -160 -208 -160
WIRE -32 -160 -112 -160
WIRE 16 -160 0 -160
WIRE 112 -160 96 -160
WIRE -208 -144 -208 -160
WIRE -32 -112 -32 -160
WIRE 0 -112 0 -160
WIRE -32 -64 -32 -112
WIRE 0 -64 0 -112
WIRE -416 -16 -432 -16
WIRE -112 -16 -336 -16
WIRE -64 -16 -112 -16
WIRE 208 0 160 0
WIRE 352 0 208 0
WIRE -432 16 -432 -16
WIRE -112 16 -304 16
WIRE -64 16 -112 16
WIRE -304 64 -304 16
WIRE -272 64 -304 64
WIRE -176 64 -192 64
WIRE -112 64 -176 64
WIRE -176 96 -176 64
WIRE 32 96 32 64
WIRE 32 96 -176 96
WIRE 48 96 48 64
WIRE 48 96 32 96
WIRE 80 96 80 64
WIRE 112 96 112 64
WIRE 112 96 80 96
WIRE -304 112 -304 64
WIRE 80 112 80 96
WIRE -16 128 -16 64
WIRE 144 128 144 64
WIRE -304 224 -304 192
WIRE -16 224 -16 208
WIRE 144 224 144 208
SYMBOL voltage 144 112 R0
SYMATTR InstName V2
SYMATTR Value {Vgain}
SYMBOL voltage -96 -160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL res -320 96 R0
SYMATTR InstName R2
SYMATTR Value 100
FLAG 208 0 OUT
FLAG -432 16 0
FLAG 144 224 0
FLAG -208 -144 0
FLAG -32 -112 VPOS
FLAG -16 224 0
FLAG 80 112 0
FLAG -112 16 INPN
FLAG -304 224 0
FLAG -112 -16 INPP
FLAG 0 -112 PWRA
* Z:\home\khalils\Downloads\files\data\raw_asc\52fd6b277807_10234.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N004 N003 1K
VCE N002 0
R2 N002 N001 1K
Q1 N001 N004 0 0 BC547B
VBE N003 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VBE 0 1 0.1 VCE 0 5 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 16 224 16
WIRE 432 16 352 16
WIRE 224 48 224 16
WIRE 0 96 -64 96
WIRE 160 96 80 96
WIRE 432 96 432 16
WIRE -64 144 -64 96
WIRE -64 256 -64 224
WIRE 224 256 224 144
WIRE 224 256 -64 256
WIRE 272 256 224 256
WIRE 432 256 432 176
WIRE 432 256 272 256
SYMBOL res 368 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL npn 160 48 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL res 96 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 432 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VCE
SYMATTR Value ""
SYMBOL voltage -64 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VBE
SYMATTR Value ""
FLAG 272 256 0
TEXT -96 280 Left 2 !.dc VBE 0 1 0.1 VCE 0 5 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ba2c0dca089b_BJT-for-simple-current-regulation.asc
* Generated by LTspice 26.0.1 for Windows.
* Adjusting the potentiometer, the current through R1 is (approximately)\nlinearly regulated.
* Sizing: \n \nAssume BJT works in saturation -> Vce = 0.3. On the load the voltage drop is 4.7V,\nAssume the load draws 100 mA.\n \nBase current for the polarization is Ic/hfe. Assuming a hfe of 100 the required base\ncurrent is 100ma/100 = 1mA\n \nVbe is fixed at 0.8 V (PN junction). I set R2 so as to have exactly 1 mA of base current\ni.e. R2 = 4.2/0.001 = 4.2k
* BJT for simple current regulation
RPotenziometro N002 0 {10k*(1-x)}
R2 N003 N002 4.2k
RPot Vin N002 {10k*x}
R1 Vin N001 47
Q1 N001 N003 0 0 2N3904
V1 Vin 0 5
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.step param x 1n 0.99 0.5
.tran 1s
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1704 680
WIRE -16 16 -16 0
WIRE 272 64 272 32
WIRE 80 80 80 48
WIRE 272 176 272 144
WIRE 80 224 80 160
WIRE 112 224 80 224
WIRE 208 224 192 224
WIRE 272 288 272 272
WIRE 80 304 80 224
SYMBOL res 256 48 R0
SYMATTR InstName R1
SYMATTR Value 47
SYMBOL voltage -16 0 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 64 64 R0
SYMATTR InstName Pot
SYMATTR Value {10k*x}
SYMBOL res 208 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.2k
SYMBOL npn 208 176 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 64 288 R0
SYMATTR InstName Potenziometro
SYMATTR Value {10k*(1-x)}
FLAG 80 384 0
FLAG 272 288 0
FLAG -16 0 Vin
FLAG 272 32 Vin
FLAG -16 96 0
FLAG 80 48 Vin
TEXT 360 128 Left 2 !.step param x 1n 0.99 0.5
TEXT 360 168 Left 2 !.tran 1s
TEXT -120 -144 Left 2 ;Adjusting the potentiometer, the current through R1 is (approximately)\nlinearly regulated.
TEXT 456 240 Left 2 ;Sizing: \n \nAssume BJT works in saturation -> Vce = 0.3. On the load the voltage drop is 4.7V,\nAssume the load draws 100 mA.\n \nBase current for the polarization is Ic/hfe. Assuming a hfe of 100 the required base\ncurrent is 100ma/100 = 1mA\n \nVbe is fixed at 0.8 V (PN junction). I set R2 so as to have exactly 1 mA of base current\ni.e. R2 = 4.2/0.001 = 4.2k
TEXT 368 -264 Left 4 ;BJT for simple current regulation
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3216.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3216.asy)
C2 N006 N008 2.2
R1 N005 0 20K
C3 N001 0 4.7
V1 IN 0 3.6
D1 N001 N003 NSPW500BS
C1 N002 N004 2.2
XU1 N006 N002 N001 N005 N003 N007 IN IN IN N008 0 N004 LTC3216 ;pnba C2+)C1+)CPO)ISET1)ILED)ISET2)EN1)EN2)Vin)C2-)GND)C1-
R2 N007 0 6.65K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m startup
.lib LTC3216.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 64 -176 64
WIRE 80 64 -96 64
WIRE 176 64 80 64
WIRE -176 80 -176 64
WIRE 80 80 80 64
WIRE 176 80 176 64
WIRE -96 128 -96 64
WIRE -16 128 -96 128
WIRE 352 128 272 128
WIRE 432 128 352 128
WIRE 512 128 496 128
WIRE -176 176 -176 160
WIRE -16 192 -80 192
WIRE 352 192 272 192
WIRE -16 256 -80 256
WIRE 352 256 272 256
WIRE 448 256 432 256
WIRE -16 320 -80 320
WIRE 304 320 272 320
WIRE 400 320 384 320
WIRE -16 384 -80 384
WIRE 304 384 272 384
SYMBOL cap -96 320 R0
WINDOW 0 20 13 Left 2
WINDOW 3 22 50 Left 2
SYMATTR InstName C2
SYMATTR Value 2.2
SYMBOL LED 336 128 R0
WINDOW 0 62 17 Left 2
SYMATTR InstName D1
SYMATTR Value NSPW500BS
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 336 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 20K
SYMBOL voltage -176 64 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL res 288 336 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 6.65K
SYMBOL cap 432 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value 4.7
SYMBOL PowerProducts\\LTC3216 128 256 R0
SYMATTR InstName U1
SYMBOL cap -96 192 R0
WINDOW 0 24 13 Left 2
WINDOW 3 22 51 Left 2
SYMATTR InstName C1
SYMATTR Value 2.2
FLAG -176 176 0
FLAG 448 256 0
FLAG 400 320 0
FLAG 304 384 0
FLAG 512 128 0
FLAG -176 64 IN
TEXT 360 416 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG5419.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG5419.asy)
V2 -V 0 -15
C1 0 N002 35p
V4 N004 0 PULSE(0 5 0 20n 20n 10u 20u)
V5 N001 0 10
V6 N003 0 0
XU1 N004 N001 N002 N003 N005 -V 0 +V ADG5419 ;pnba IN)SA)D)SB)EN)Vss)GND)Vdd
V3 N005 0 5
R2 N002 0 300
V1 +V 0 15
.tran 0.0001
.lib ADG5419.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -800 -320 -800 -336
WIRE -1040 -256 -1072 -256
WIRE -896 -256 -960 -256
WIRE -608 -224 -704 -224
WIRE -496 -224 -608 -224
WIRE -1152 -192 -1184 -192
WIRE -896 -192 -1072 -192
WIRE -608 -176 -608 -224
WIRE -496 -160 -496 -224
WIRE -896 -128 -1120 -128
WIRE -1376 -80 -1376 -96
WIRE -1264 -80 -1264 -96
WIRE -1120 -80 -1120 -128
WIRE -896 -80 -1008 -80
WIRE -1008 -64 -1008 -80
WIRE -608 -32 -608 -96
WIRE -496 -32 -496 -96
WIRE -864 0 -864 -16
WIRE -736 0 -736 -16
WIRE -1376 16 -1376 0
WIRE -1264 16 -1264 0
WIRE -1184 16 -1184 -192
WIRE -1120 16 -1120 0
SYMBOL voltage -1008 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -944 -256 R90
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 47 41 VRight 2
WINDOW 3 -46 -22 VRight 2
SYMATTR InstName V5
SYMATTR Value 10
SYMBOL ADG5419 -800 -176 R0
SYMATTR InstName U1
SYMBOL voltage -1264 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res -592 -192 M0
SYMATTR InstName R2
SYMATTR Value 300
SYMBOL cap -480 -96 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL voltage -1376 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -1056 -192 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 0
SYMBOL voltage -1120 -96 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -227 168 Left 2
SYMATTR Value PULSE(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V4
FLAG -1376 16 0
FLAG -1264 16 0
FLAG -1264 -96 +V
FLAG -1376 -96 -V
FLAG -1072 -256 0
FLAG -1120 16 0
FLAG -608 -32 0
FLAG -800 -336 +V
FLAG -736 0 0
FLAG -864 0 -V
FLAG -1008 16 0
FLAG -1184 16 0
FLAG -496 -32 0
TEXT -1416 72 Left 2 !.tran 0.0001
* Z:\home\khalils\Downloads\files\data\raw_asc\3e0554961593_Z-VAR.asc
* Generated by LTspice 26.0.1 for Windows.
D1 0 b BZX84C12L
R1 b a 50
V1 a 0
R4 b 0 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 8V 18V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -256 256 -256
WIRE 368 -256 272 -256
WIRE 576 -256 448 -256
WIRE 672 -256 576 -256
WIRE 256 -224 256 -256
WIRE 672 -224 672 -256
WIRE 576 -208 576 -256
WIRE 256 -96 256 -144
WIRE 416 -96 256 -96
WIRE 576 -96 576 -144
WIRE 576 -96 416 -96
WIRE 672 -96 672 -144
WIRE 672 -96 576 -96
WIRE 416 -80 416 -96
SYMBOL Misc\\EuropeanResistor 656 -240 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL voltage 256 -240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL Misc\\EuropeanResistor 464 -272 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL zener 592 -144 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BZX84C12L
FLAG 416 -80 0
FLAG 672 -256 b
FLAG 272 -256 a
TEXT 232 -64 Left 2 !.dc V1 8V 18V
* Z:\home\khalils\Downloads\files\data\raw_asc\0f31af21495a_Coupling_Block.asc
* Generated by LTspice 26.0.1 for Windows.
C1 Coup N001 22p
R2 N001 0 7.5Meg
K1 L1 L2 1
D2 P001 0 D
L2 0 N001 1m
L1 0 decoup 1m Rser=.1
D1 P001 Coup D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 128 -128 128
WIRE 0 144 0 128
WIRE 160 144 64 144
WIRE 240 144 160 144
WIRE 288 144 240 144
WIRE 416 144 352 144
WIRE 496 144 416 144
WIRE 512 144 496 144
WIRE 160 160 160 144
WIRE 240 160 240 144
WIRE 496 160 496 144
WIRE 192 224 64 224
WIRE 240 224 192 224
WIRE 0 256 0 224
WIRE 192 272 192 224
WIRE 416 272 416 144
SYMBOL zener 400 336 R0
SYMATTR InstName D2
SYMBOL res 224 128 R0
SYMATTR InstName R2
SYMATTR Value 7.5Meg
SYMBOL ind2 80 240 R180
WINDOW 0 -33 45 Left 2
WINDOW 3 -22 25 Left 2
SYMATTR InstName L2
SYMATTR Value 1m
SYMATTR Type ind
SYMBOL ind2 16 240 R180
WINDOW 0 -19 108 Left 2
WINDOW 3 -27 139 Left 2
SYMATTR InstName L1
SYMATTR Value 1m
SYMATTR Type ind
SYMATTR SpiceLine Rser=.1
SYMBOL cap 352 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 22p
SYMBOL zener 432 336 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
FLAG 192 272 0
FLAG 0 256 0
FLAG 512 144 Coup
FLAG -128 128 decoup
FLAG 416 400 0
TEXT 40 248 Left 2 !K1 L1 L2 1
* Z:\home\khalils\Downloads\files\data\raw_asc\231c1301c4fc_ADG1519.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 -V 0 -8
V4 N004 0 PULSE(0 5 0 20n 20n 10u 20u)
R2 N001 0 300
V5 N002 0 3
V3 N005 0 5;PULSE(0 5 0 20n 20n 10u 20u)
V6 N003 0 0
C1 0 N001 35p
XU1 N004 N002 N001 N003 N005 -V 0 +V ADG1519 ;pnba IN)SA)D)SB)EN)Vss)GND)Vdd
.tran 0.0001
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1519.asy)
.lib ADG1519.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -752 -368 -800 -368
WIRE -592 -336 -656 -336
WIRE -464 -336 -528 -336
WIRE -800 -320 -800 -368
WIRE -1040 -256 -1072 -256
WIRE -896 -256 -960 -256
WIRE -1552 -240 -1552 -256
WIRE -1440 -240 -1440 -256
WIRE -656 -224 -656 -336
WIRE -656 -224 -704 -224
WIRE -608 -224 -656 -224
WIRE -464 -224 -528 -224
WIRE -1152 -192 -1184 -192
WIRE -896 -192 -1072 -192
WIRE -1552 -144 -1552 -160
WIRE -1440 -144 -1440 -160
WIRE -896 -128 -960 -128
WIRE -624 -128 -704 -128
WIRE -624 -96 -624 -128
WIRE -960 -80 -960 -128
WIRE -736 0 -736 -16
WIRE -624 0 -624 -16
WIRE -1184 16 -1184 -192
WIRE -960 16 -960 0
WIRE -864 16 -864 -16
WIRE -832 16 -864 16
FLAG -1552 -144 0
FLAG -1440 -144 0
FLAG -1440 -256 +V
FLAG -1552 -256 -V
FLAG -1072 -256 0
FLAG -960 16 0
FLAG -464 -224 0
FLAG -752 -368 +V
FLAG -736 0 0
FLAG -832 16 -V
FLAG -624 0 0
FLAG -1184 16 0
FLAG -464 -336 0
SYMBOL voltage -1440 -256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -1552 -256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -8
SYMBOL voltage -960 -96 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 5 0 20n 20n 10u 20u)
SYMBOL res -624 -240 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 300
SYMBOL voltage -944 -256 R90
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 47 41 VRight 2
WINDOW 3 -46 -22 VRight 2
SYMATTR InstName V5
SYMATTR Value 3
SYMBOL voltage -624 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5;PULSE(0 5 0 20n 20n 10u 20u)
SYMBOL voltage -1056 -192 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 0
SYMBOL cap -528 -352 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL Switches\\ADG1519 -800 -176 R0
SYMATTR InstName U1
TEXT -1592 8 Left 2 !.tran 0.0001
* Z:\home\khalils\Downloads\files\data\raw_asc\126d185ee445_Simulation_Bonus.asc
* Generated by LTspice 26.0.1 for Windows.
M2 N003 N003 N005 N005 Mosfet2
R1 N001 N002 5.3k
M1 N002 N002 N003 N003 Mosfet1
V2 N005 0 -15
V1 N001 0 15
M4 N001 N002 N004 N004 Mosfet4
M3 N004 N003 N005 N005 Mosfet3
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model Mosfet1 NMOS(Kp = 0.02, Vto= 1, Lambda = 0)
.model Mosfet2 NMOS(Kp = 0.02, Vto= 1, Lambda = 0)
.model Mosfet3 NMOS(Kp = 0.02, Vto= 1, Lambda = 0)
.model Mosfet4 NMOS(Kp = 0.02, Vto= 1, Lambda = 0)
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1464 868
WIRE 480 -192 432 -192
WIRE 432 -176 432 -192
WIRE 480 -176 480 -192
WIRE 432 -64 432 -96
WIRE 432 -64 160 -64
WIRE 704 -64 432 -64
WIRE 160 112 160 -64
WIRE 160 224 160 192
WIRE 432 224 160 224
WIRE 160 272 160 224
WIRE 704 272 704 -64
WIRE 160 320 96 320
WIRE 768 320 704 320
WIRE 432 352 432 224
WIRE 432 352 208 352
WIRE 656 352 432 352
WIRE 96 384 96 320
WIRE 160 384 160 368
WIRE 160 384 96 384
WIRE 704 384 704 368
WIRE 768 384 768 320
WIRE 768 384 704 384
WIRE 160 432 160 384
WIRE 432 432 160 432
WIRE 160 464 160 432
WIRE 704 464 704 384
WIRE 160 512 96 512
WIRE 768 512 704 512
WIRE 432 544 432 432
WIRE 432 544 208 544
WIRE 656 544 432 544
WIRE 96 576 96 512
WIRE 160 576 160 560
WIRE 160 576 96 576
WIRE 704 576 704 560
WIRE 768 576 768 512
WIRE 768 576 704 576
WIRE 160 624 160 576
WIRE 432 624 160 624
WIRE 704 624 704 576
WIRE 704 624 432 624
WIRE 432 672 432 624
WIRE 432 816 432 752
SYMBOL voltage 432 656 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL nmos4 656 272 R0
SYMATTR InstName M4
SYMATTR Value Mosfet4
SYMBOL res 144 96 R0
SYMATTR InstName R1
SYMATTR Value 5.3k
SYMBOL voltage 432 -80 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL nmos4 208 464 M0
SYMATTR InstName M2
SYMATTR Value Mosfet2
SYMBOL nmos4 208 272 M0
SYMATTR InstName M1
SYMATTR Value Mosfet1
SYMBOL nmos4 656 464 R0
SYMATTR InstName M3
SYMATTR Value Mosfet3
FLAG 432 816 0
FLAG 480 -176 0
TEXT 824 296 Left 2 !.model Mosfet1 NMOS(Kp = 0.02, Vto= 1, Lambda = 0)
TEXT 824 320 Left 2 !.model Mosfet2 NMOS(Kp = 0.02, Vto= 1, Lambda = 0)
TEXT 824 344 Left 2 !.model Mosfet3 NMOS(Kp = 0.02, Vto= 1, Lambda = 0)
TEXT 824 368 Left 2 !.model Mosfet4 NMOS(Kp = 0.02, Vto= 1, Lambda = 0)
TEXT 824 280 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2119-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2119-1.8.asy)
Rload OUT 0 1.8
V1 IN 0 5
L1 N002 OUT 1.5
C1 OUT 0 22
C2 OUT 0 10
XU1 IN IN N002 0 0 OUT IN N001 IN IN ADP2119-1.8 ;pnba Vin)Pvin)SW)PGND)GND)FB)TRK)Pgood)Sync/Mode)EN
R1 OUT N001 100K
.tran 1m
.lib ADP2119-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 0 64 0
WIRE 288 0 128 0
WIRE 64 16 64 0
WIRE 288 32 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 624 64 576 64
WIRE 64 112 64 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 624 144 624 64
WIRE 624 144 560 144
WIRE 688 144 624 144
WIRE 752 144 688 144
WIRE 560 160 560 144
WIRE 624 160 624 144
WIRE 752 160 752 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 624 224 560 224
WIRE 560 256 560 224
WIRE 752 256 752 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 688 304 688 144
WIRE 688 304 416 304
WIRE 288 368 288 352
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.5
SYMBOL ADP2119-1.8 288 272 R0
SYMATTR InstName U1
SYMBOL res 736 144 R0
WINDOW 3 34 68 Left 2
SYMATTR Value 1.8
SYMATTR InstName Rload
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL voltage 64 0 R0
WINDOW 0 27 27 Left 2
WINDOW 3 29 88 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL cap 608 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C2
SYMATTR Value 10
FLAG 560 256 0
FLAG 288 368 0
FLAG 64 112 0
FLAG 752 144 OUT
FLAG 752 256 0
FLAG 64 0 IN
TEXT 504 344 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\1dcff2ef54df_Lab2_Part_1__20101299_.asc
* Generated by LTspice 26.0.1 for Windows.
D1 a 0 BAT54
R1 a N001 9k
V1 N001 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -1 5 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 16 48 16
WIRE 320 16 240 16
WIRE 336 16 320 16
WIRE 48 96 48 16
WIRE 336 112 336 16
WIRE 48 208 48 176
WIRE 176 208 48 208
WIRE 336 208 336 176
WIRE 336 208 176 208
WIRE 176 240 176 208
SYMBOL schottky 320 112 R0
SYMATTR InstName D1
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage 48 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 256 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 9k
FLAG 176 240 0
FLAG 320 16 a
TEXT 96 -144 Left 2 !.dc V1 -1 5 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\928a532ee1fd_2ndOrderHighpass.asc
* Generated by LTspice 26.0.1 for Windows.
* f0 and Q set by parameters
* R1 is arbitary
* This version puts 1/2 the R1 resistance in the capacitor
* Vout
* Vin
* High frequency gain is set by the parameter "H"
V1 1 0 AC 1
C1 N002 N003 {C1} Rser={R1/2}
R3 2 0 1Meg
L1 N003 0 {L1}
R1 N002 0 {R1/2}
R2 2 0 .1
G1 0 N002 1 0 {2/R1}
G2 0 2 N003 0 {10*H}
.param f0= 1k Q=.5
.param R1=1k
.param L1=R1*Q/(2*pi*f0)
.param C1=1/(L1*(2*pi*f0)**2)
.param H=1
.ac dec 101 100 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE -560 -128 -624 -128
WIRE -464 -128 -496 -128
WIRE -288 -128 -416 -128
WIRE -208 -128 -288 -128
WIRE -32 -128 -144 -128
WIRE 96 -128 -32 -128
WIRE 256 -128 144 -128
WIRE 320 -128 256 -128
WIRE 352 -128 320 -128
WIRE 480 -128 416 -128
WIRE -624 -96 -624 -128
WIRE -416 -96 -416 -128
WIRE -32 -96 -32 -128
WIRE -464 -80 -464 -128
WIRE -288 -64 -288 -128
WIRE 144 -64 144 -128
WIRE 256 -64 256 -128
WIRE 480 -64 480 -128
WIRE 96 -48 96 -128
WIRE -624 0 -624 -16
WIRE -464 0 -464 -32
WIRE -416 0 -416 -16
WIRE -32 32 -32 -16
WIRE 96 32 96 0
WIRE 144 32 144 16
WIRE 256 32 256 16
WIRE 480 32 480 16
WIRE -288 48 -288 16
SYMBOL cap -208 -112 R270
WINDOW 0 52 17 VRight 2
WINDOW 3 -26 17 VRight 2
WINDOW 123 -57 10 VRight 2
SYMATTR InstName C1
SYMATTR Value {C1}
SYMATTR Value2 Rser={R1/2}
SYMBOL ind -48 -112 R0
WINDOW 0 59 45 Bottom 2
WINDOW 3 61 51 Top 2
SYMATTR InstName L1
SYMATTR Value {L1}
SYMBOL res 464 -80 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL res -304 -80 R0
SYMATTR InstName R1
SYMATTR Value {R1/2}
SYMBOL g 144 -80 R0
SYMATTR InstName G2
SYMATTR Value {10*H}
SYMBOL g -416 -112 R0
SYMATTR InstName G1
SYMATTR Value {2/R1}
SYMBOL res 240 -80 R0
SYMATTR InstName R2
SYMATTR Value .1
SYMBOL voltage -624 -112 R0
WINDOW 0 33 30 Left 2
WINDOW 123 32 79 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMBOL Misc\\jumper 384 -192 R0
SYMATTR InstName J2
SYMBOL Misc\\jumper -528 -192 M0
SYMATTR InstName J1
FLAG -32 32 0
FLAG -288 48 0
FLAG -416 0 0
FLAG -464 0 0
FLAG 96 32 0
FLAG 144 32 0
FLAG 256 32 0
FLAG 320 -128 2
FLAG -464 -128 1
FLAG -624 0 0
FLAG 480 32 0
TEXT -304 96 Left 2 !.param f0= 1k Q=.5
TEXT -464 160 Left 2 !.param R1=1k
TEXT -640 224 Left 2 !.param L1=R1*Q/(2*pi*f0)
TEXT -632 96 Left 2 ;f0 and Q set by parameters
TEXT -632 160 Left 2 ;R1 is arbitary
TEXT -632 128 Left 2 ;This version puts 1/2 the R1 resistance in the capacitor
TEXT -640 256 Left 2 !.param C1=1/(L1*(2*pi*f0)**2)
TEXT 432 -144 Left 2 ;Vout
TEXT -576 -144 Right 2 ;Vin
TEXT -632 192 Left 2 ;High frequency gain is set by the parameter "H"
TEXT -80 192 Left 2 !.param H=1
TEXT -640 288 Left 2 !.ac dec 101 100 10k