* Z:\home\khalils\Downloads\files\data\raw_asc\66c37aff4ac0_HW3_P4_PartE.asc
* Generated by LTspice 26.0.1 for Windows.
* TL072 OPERATIONAL AMPLIFIER "MACROMODEL" SUBCIRCUIT
* CREATED USING PARTS RELEASE 4.01 ON 06/16/89 AT 13:08
* (REV N/A) SUPPLY VOLTAGE: +/-15V
* CONNECTIONS: NON-INVERTING INPUT
* | INVERTING INPUT
* | | POSITIVE POWER SUPPLY
* | | | NEGATIVE POWER SUPPLY
* | | | | OUTPUT
* | | | | |
*
R2 6 9 100.0E3
ISS 3 10 DC 195.0E-6
GA 6 0 11 12 282.8E-6
RD1 4 11 3.536E3
RO1 8 5 150
DP 4 3 DX
DE 54 5 DX
EGND 99 0 POLY(2) (3,0) (4,0) 0 .5 .5
XU2 Vy Vout VDD VSS Vout TL072 ;pnba In+)In-)V+)V-)OUT
RD2 4 12 3.536E3
V3 Vin 0 PWL(0 0 1 0 +1m 2 2 2 +1m 0 5 0 +1m -1 6 -1 +1m 0 7 0 +1m 3 8 3 +1m 0)
XU1 Vin Vout VDD VSS Vx TL072 ;pnba In+)In-)V+)V-)OUT
RO2 7 99 150
VLN 0 92 DC 25
J2 12 1 10 JX
GCM 0 6 10 99 8.942E-9
R1 Vout 0 1k
DLP 90 91 DX
HLIM 90 0 VLIM 1K
C2 6 7 15.00E-12
VLP 91 0 DC 25
VLIM 7 8 DC 0
DC 5 53 DX
RP 3 4 2.143E3
FB 7 99 POLY(5) VB VC VE VLP VLN 0 4.715E6 -5E6 5E6 5E6 -5E6
RSS 10 99 1.026E6
VE 54 4 DC 2.200
DLN 92 90 DX
J1 11 2 10 JX
VB 9 0 DC 0
V1 VDD 0 9
V2 0 VSS 9
VC 3 53 DC 2.200
D1 Vx Vy 1N4148
C1 11 12 3.498E-12
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.SUBCKT TL072 1 2 3 4 5
.MODEL DX D(IS=800.0E-18)
.MODEL JX PJF(IS=15.00E-12 BETA=270.1E-6 VTO=-1)
.ENDS
.tran 0 10 0 100u
.options plotwinsize=0 numdgt=15 measdgt=15
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1976 1148
WIRE 512 272 480 272
WIRE 1200 272 784 272
WIRE 1376 272 1200 272
WIRE 480 304 480 272
WIRE 1296 304 1264 304
WIRE 880 320 848 320
WIRE 1264 336 1264 304
WIRE 848 352 848 320
WIRE 1200 352 1200 272
WIRE 1232 352 1200 352
WIRE 784 368 784 272
WIRE 816 368 784 368
WIRE 1376 368 1376 272
WIRE 1376 368 1296 368
WIRE 1424 368 1376 368
WIRE 1456 368 1424 368
WIRE 944 384 880 384
WIRE 976 384 944 384
WIRE 1088 384 1040 384
WIRE 1232 384 1088 384
WIRE 816 400 720 400
WIRE 1424 400 1424 368
WIRE 480 416 480 384
WIRE 480 416 400 416
WIRE 1264 432 1264 400
WIRE 1296 432 1264 432
WIRE 400 448 400 416
WIRE 480 448 480 416
WIRE 848 448 848 416
WIRE 880 448 848 448
WIRE 720 544 720 400
WIRE 1424 544 1424 480
WIRE 480 560 480 528
WIRE 512 560 480 560
WIRE 720 656 720 624
SYMBOL res 1408 384 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL OpAmps\\opamp2 848 320 R0
SYMATTR InstName U1
SYMATTR Value TL072
SYMBOL OpAmps\\opamp2 1264 304 R0
SYMATTR InstName U2
SYMATTR Value TL072
SYMBOL voltage 480 288 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL voltage 720 528 R0
WINDOW 3 24 44 Left 2
WINDOW 39 24 72 Left 2
SYMATTR InstName V3
SYMATTR Value ""
SYMATTR SpiceLine PWL(0 0 1 0 +1m 2 2 2 +1m 0 5 0 +1m -1 6 -1 +1m 0 7 0 +1m 3 8 3 +1m 0)
SYMBOL diode 976 400 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 480 432 R0
SYMATTR InstName V2
SYMATTR Value 9
FLAG 400 448 0
FLAG 512 272 VDD
FLAG 512 560 VSS
FLAG 880 320 VDD
FLAG 880 448 VSS
FLAG 720 656 0
FLAG 944 384 Vx
FLAG 1088 384 Vy
FLAG 1456 368 Vout
FLAG 1424 544 0
FLAG 1296 304 VDD
FLAG 1296 432 VSS
FLAG 720 400 Vin
TEXT -456 -16 Left 2 !* TL072 OPERATIONAL AMPLIFIER "MACROMODEL" SUBCIRCUIT\n* CREATED USING PARTS RELEASE 4.01 ON 06/16/89 AT 13:08\n* (REV N/A)      SUPPLY VOLTAGE: +/-15V\n* CONNECTIONS:   NON-INVERTING INPUT\n*                | INVERTING INPUT\n*                | | POSITIVE POWER SUPPLY\n*                | | | NEGATIVE POWER SUPPLY\n*                | | | | OUTPUT\n*                | | | | |\n.SUBCKT TL072    1 2 3 4 5\n*\n  C1   11 12 3.498E-12\n  C2    6  7 15.00E-12\n  DC    5 53 DX\n  DE   54  5 DX\n  DLP  90 91 DX\n  DLN  92 90 DX\n  DP    4  3 DX\n  EGND 99  0 POLY(2) (3,0) (4,0) 0 .5 .5\n  FB    7 99 POLY(5) VB VC VE VLP VLN 0 4.715E6 -5E6 5E6 5E6 -5E6\n  GA    6  0 11 12 282.8E-6\n  GCM   0  6 10 99 8.942E-9\n  ISS   3 10 DC 195.0E-6\n  HLIM 90  0 VLIM 1K\n  J1   11  2 10 JX\n  J2   12  1 10 JX\n  R2    6  9 100.0E3\n  RD1   4 11 3.536E3\n  RD2   4 12 3.536E3\n  RO1   8  5 150\n  RO2   7 99 150\n  RP    3  4 2.143E3\n  RSS  10 99 1.026E6\n  VB    9  0 DC 0\n  VC    3 53 DC 2.200\n  VE   54  4 DC 2.200\n  VLIM  7  8 DC 0\n  VLP  91  0 DC 25\n  VLN   0 92 DC 25\n.MODEL DX D(IS=800.0E-18)\n.MODEL JX PJF(IS=15.00E-12 BETA=270.1E-6 VTO=-1)\n.ENDS
TEXT 704 768 Left 2 !.tran 0 10 0 100u
TEXT 704 816 Left 2 !.options plotwinsize=0 numdgt=15 measdgt=15