* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4366-1.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N007 N011 10n
MQ1 N001 N003 N002 N002 IRLHS6342
V1 N001 0 PWL(0 0 0.8u 30 340m 30 341m 12 500m 12 500.8m 30)
C2 N002 0 220
C3 N006 0 0.01
R1 N002 N008 12.4K
R2 N011 0 1.91K
R3 N003 N006 10
R4 N008 0 169K
R5 N002 0 100
R6 N001 N004 29.4K
C4 N002 N011 0.47
V2 N010 0 PWL(0 0 340m 0 340.01m 1 340.8m 1 340.81m 0)
S1 0 N009 N010 0 X
R7 N005 N009 470K
XU1 N004 N005 N007 N011 N011 N008 N002 N006 LTC4366-1 ;pnba VDD)_SD)TIMER)VSS)BASE)FB)OUT)GATE
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 11
.model X SW(Ron=87 Roff=1T Vt=0.5 Vh=-.4)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4366-1.asy)
.lib LTC4366-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1592 836
WIRE 144 -112 -608 -112
WIRE 272 -112 144 -112
WIRE 496 -112 368 -112
WIRE 544 -112 496 -112
WIRE 608 -112 544 -112
WIRE 704 -112 608 -112
WIRE -608 -96 -608 -112
WIRE 608 -96 608 -112
WIRE 704 -96 704 -112
WIRE 144 -80 144 -112
WIRE 352 -32 352 -64
WIRE -608 0 -608 -16
WIRE 608 0 608 -32
WIRE 704 0 704 -16
WIRE 144 16 144 0
WIRE 0 80 -176 80
WIRE 352 80 352 48
WIRE 352 80 288 80
WIRE 384 80 352 80
WIRE 464 80 448 80
WIRE 544 80 544 -112
WIRE -176 96 -176 80
WIRE 0 128 -64 128
WIRE 416 128 288 128
WIRE 496 128 496 -112
WIRE 496 128 416 128
WIRE -64 160 -64 128
WIRE 544 176 544 160
WIRE 544 176 288 176
WIRE -176 192 -176 176
WIRE 416 192 416 128
WIRE -656 208 -672 208
WIRE -224 208 -576 208
WIRE 544 208 544 176
WIRE -224 256 -240 256
WIRE -64 256 -64 224
WIRE 96 256 96 224
WIRE 96 256 -64 256
WIRE 144 256 96 256
WIRE 192 256 192 224
WIRE 192 256 144 256
WIRE 416 256 192 256
WIRE 144 272 144 256
WIRE -176 288 -176 272
WIRE 544 304 544 288
WIRE 144 368 144 352
FLAG 144 368 0
FLAG -608 0 0
FLAG 464 80 0
FLAG 544 304 0
FLAG 608 0 0
FLAG 704 0 0
FLAG -672 208 0
FLAG -176 288 0
FLAG -240 256 0
SYMBOL cap -80 160 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL nmos 272 -64 R270
WINDOW 0 54 45 VTop 2
WINDOW 3 -11 74 VLeft 2
SYMATTR InstName Q1
SYMATTR Value IRLHS6342
SYMBOL voltage -608 -112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 44 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 0.8u 30 340m 30 341m 12 500m 12 500.8m 30)
SYMBOL cap 592 -96 R0
SYMATTR InstName C2
SYMATTR Value 220
SYMBOL cap 384 96 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value 0.01
SYMBOL res 528 64 R0
SYMATTR InstName R1
SYMATTR Value 12.4K
SYMBOL res 128 256 R0
SYMATTR InstName R2
SYMATTR Value 1.91K
SYMBOL res 336 -48 R0
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL res 528 192 R0
SYMATTR InstName R4
SYMATTR Value 169K
SYMBOL res 688 -112 R0
SYMATTR InstName R5
SYMATTR Value 100
SYMBOL res 128 -96 R0
SYMATTR InstName R6
SYMATTR Value 29.4K
SYMBOL cap 400 192 R0
SYMATTR InstName C4
SYMATTR Value 0.47
SYMBOL voltage -560 208 R90
WINDOW 123 68 56 VTop 2
WINDOW 39 50 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PWL(0 0 340m 0 340.01m 1 340.8m 1 340.81m 0)
SYMATTR InstName V2
SYMBOL sw -176 288 M180
WINDOW 0 28 81 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName S1
SYMATTR Value X
SYMBOL res -192 80 R0
SYMATTR InstName R7
SYMATTR Value 470K
SYMBOL LTC4366-1 144 160 R0
SYMATTR InstName U1
TEXT 320 336 Left 2 !.tran 11
TEXT -512 344 Left 2 !.model X SW(Ron=87 Roff=1T Vt=0.5 Vh=-.4)