Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8640S.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8640S.asy)
R2 OUT N005 1Meg
L1 N003 OUT 3.3 Rser=10m
V1 IN 0 24
C7 IN 0 1
R1 N002 0 41.2K
C5 OUT N005 4.7p
C4 OUT 0 47 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
XU2 OUT N001 NC_01 IN NC_02 0 MP_03 N003 MP_04 0 MP_05 MP_06 IN IN N002 N004 NC_07 0 NC_08 N005 LT8640S ;pnba Bias)INTVcc)BST)Vin1)CLKOUT)GND1))SW))GND2)))Vin2)EN/UV)Rt)TR/SS)Sync/Mode)GND)PG)FB
C2 N001 0 1
C1 N004 0 1n
C6 IN 0 1
Rload OUT 0 1
R3 N005 0 243K
.tran 750u startup
.lib LT8640S.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1848 740
WIRE 64 -80 -32 -80
WIRE 208 -80 64 -80
WIRE 432 -80 208 -80
WIRE -32 -64 -32 -80
WIRE 208 -64 208 -80
WIRE 64 0 64 -80
WIRE 112 0 64 0
WIRE 432 0 432 -80
WIRE 432 0 400 0
WIRE 64 16 64 0
WIRE 432 16 432 0
WIRE -32 32 -32 16
WIRE 64 96 64 80
WIRE 112 96 64 96
WIRE 432 96 432 80
WIRE 432 96 400 96
WIRE 64 112 64 96
WIRE 432 112 432 96
WIRE 32 192 0 192
WIRE 112 192 96 192
WIRE 544 192 400 192
WIRE 16 384 0 384
WIRE 112 384 96 384
WIRE 432 384 400 384
WIRE 544 384 544 192
WIRE 544 384 512 384
WIRE 656 384 544 384
WIRE 752 384 656 384
WIRE 848 384 752 384
WIRE 544 400 544 384
WIRE 656 400 656 384
WIRE 752 400 752 384
WIRE 848 400 848 384
WIRE 32 480 0 480
WIRE 112 480 96 480
WIRE 544 480 400 480
WIRE 656 480 656 464
WIRE 656 480 544 480
WIRE 544 496 544 480
WIRE 752 496 752 464
WIRE 848 496 848 480
WIRE 304 560 304 544
WIRE 544 592 544 576
SYMBOL cap 736 400 R0
SYMATTR InstName C4
SYMATTR Value 47
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL cap 416 16 R0
SYMATTR InstName C7
SYMATTR Value 1
SYMBOL res 832 384 R0
SYMATTR InstName Rload
SYMATTR Value 1
SYMBOL res 528 480 R0
SYMATTR InstName R3
SYMATTR Value 243K
SYMBOL cap 640 400 R0
SYMATTR InstName C5
SYMATTR Value 4.7p
SYMBOL voltage -32 -80 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL ind 416 400 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=10m
SYMBOL res 528 384 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 112 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 41.2K
SYMBOL cap 96 496 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL cap 96 208 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL PowerProducts\\LT8640S 256 240 R0
SYMATTR InstName U2
SYMBOL cap 48 16 R0
SYMATTR InstName C6
SYMATTR Value 1
FLAG 304 560 0
FLAG 0 384 0
FLAG -32 32 0
FLAG 0 192 0
FLAG 752 496 0
FLAG 544 592 0
FLAG 848 496 0
FLAG 848 384 OUT
FLAG -32 -80 IN
FLAG 64 112 0
FLAG 432 112 0
FLAG 0 480 0
TEXT 704 576 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3406-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3406-1.8.asy)
XU1 IN 0 N001 IN OUT LTC3406-x.x top=360K bot=180K ;pnba Run)GND)SW)Vin)Vout
Rload OUT 0 10
C1 OUT 0 22
V1 IN 0 5
L1 N001 OUT 4.7
.tran 500u startup
.lib LTC3406-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 700
WIRE 192 64 64 64
WIRE 352 64 192 64
WIRE 64 80 64 64
WIRE 352 80 352 64
WIRE 192 144 192 64
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 624 144 592 144
WIRE 672 144 624 144
WIRE 768 144 672 144
WIRE 672 160 672 144
WIRE 768 160 768 144
WIRE 64 176 64 160
WIRE 672 256 672 224
WIRE 768 256 768 240
WIRE 624 304 624 144
WIRE 624 304 496 304
WIRE 352 384 352 368
SYMBOL polcap 656 160 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL RES 752 144 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL PowerProducts\\LTC3406-1.8 352 224 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 64 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
FLAG 64 176 0
FLAG 352 384 0
FLAG 672 256 0
FLAG 768 256 0
FLAG 768 144 OUT
FLAG 64 64 IN
TEXT 576 352 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1217.asc
* Generated by LTspice 26.0.1 for Windows.
* Cable Driver
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1217.asy)
R1 N002 N001 3K
V2 -V 0 -15
R2 N001 0 3K
XU1 IN N001 +V -V N002 LT1217 ;pnba In+)In-)V+)V-)OUT
T1 N003 0 OUT 0 Td=75n Z0=75
V3 IN 0 AC 1
R3 N003 N002 75
V1 +V 0 15
R4 0 OUT 75
.ac oct 10 10K 100Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 416 64 416 48
WIRE 544 64 544 48
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE 416 160 416 144
WIRE 544 160 544 144
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 304 240 256 240
WIRE 432 240 384 240
WIRE 624 240 528 240
WIRE 160 256 0 256
WIRE 624 256 624 240
WIRE 0 272 0 256
WIRE 432 272 416 272
WIRE 544 272 528 272
WIRE 192 288 192 272
WIRE 624 352 624 336
WIRE 0 368 0 352
SYMBOL res 400 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 75
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL tline 480 256 R0
WINDOW 3 -69 48 Left 2
SYMATTR Value Td=75n Z0=75
SYMATTR InstName T1
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 3K
SYMBOL voltage 544 48 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 608 352 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 75
SYMBOL voltage 416 48 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL opamps\\LT1217 192 176 R0
SYMATTR InstName U1
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3K
FLAG 544 160 0
FLAG 192 192 +V
FLAG 544 48 +V
FLAG 192 288 -V
FLAG 416 160 0
FLAG 416 48 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 624 352 0
FLAG 416 272 0
FLAG 544 272 0
FLAG 624 240 OUT
FLAG 0 256 IN
TEXT 320 400 Left 2 !.ac oct 10 10K 100Meg
TEXT 248 40 Bottom 2 ;Cable Driver
* Z:\home\khalils\Downloads\files\data\raw_asc\41647c217cda_NOT.asc
* Generated by LTspice 26.0.1 for Windows.
M2 Vout N002 0 0 C5NNMOS l=0.6u w=3.6u
VDD N001 0 5
Vin N002 0 PULSE(0 5 0 1n 1n 5u 10u)
M1 N001 N002 Vout N001 C5NPMOS l=0.6u w=7.2u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include D:\NIELIT\ENGR3426\ENGR3426\engr3426.sub
.tran 100u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 -32 224 -32
WIRE 400 -32 304 -32
WIRE 400 0 400 -32
WIRE 224 48 224 -32
WIRE 304 96 304 -32
WIRE 304 96 224 96
WIRE 80 128 -16 128
WIRE 176 128 80 128
WIRE -16 176 -16 128
WIRE 224 192 224 144
WIRE 608 192 224 192
WIRE 224 240 224 192
WIRE 304 288 224 288
WIRE 80 320 80 128
WIRE 176 320 80 320
WIRE -16 352 -16 256
WIRE 224 352 224 336
WIRE 224 352 -16 352
WIRE 304 352 304 288
WIRE 304 352 224 352
WIRE 400 352 400 80
WIRE 400 352 304 352
WIRE 224 400 224 352
IOPIN 608 192 Out
SYMBOL pmos4 176 48 R0
SYMATTR InstName M1
SYMATTR Value C5NPMOS
SYMATTR Value2 l=0.6u w=7.2u
SYMBOL nmos4 176 240 R0
SYMATTR InstName M2
SYMATTR Value C5NNMOS
SYMATTR Value2 l=0.6u w=3.6u
SYMBOL voltage -16 160 R0
WINDOW 3 -307 108 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 0 1n 1n 5u 10u)
SYMATTR InstName Vin
SYMBOL voltage 400 -16 R0
SYMATTR InstName VDD
SYMATTR Value 5
FLAG 224 400 0
FLAG 608 192 Vout
TEXT -136 440 Left 2 !.include D:\\NIELIT\\ENGR3426\\ENGR3426\\engr3426.sub
TEXT -136 480 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4522-2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
R2 OUT N001 10K
V2 -V 0 -15
Rload OUT 0 10K
XU1 IN N001 +V -V OUT ADA4522-2 ;pnba In+)In-)V+)V-)OUT
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4522-2.asy)
.lib ADA4522-2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1152 144 -1168
WIRE 272 -1152 272 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 272 -1056 272 -1072
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 272 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 272 -1056 0
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 272 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL opamps\\ADA4522-2 576 -1168 R0
SYMATTR InstName U1
TEXT 720 -944 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4123.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N002 0 5
R1 N003 0 1K
C1 N001 0 10 Rser=5m
CBAT N001 0 .1
XU1 NC_01 N002 NC_02 N003 N001 0 LTC4123 Tzn_air=2 Tchg=100 ;pnba ACIN)VCC)_CHRG)PROG)BAT)GND
.tran 100 startup
* Notes:\n1. To simulate rectifier and input power control, the user needs to construct\n a proper AC source to connect to ACIN pin.\n2. The model supports the charge voltage temperature compensation feature.\n However, the user needs to specify ".temp" for the certain die temperature.\n3. Variables Tzn_air and Tchg, are introduced to reduce the simulation time\n artificially. Please make sure to have Tchg>Tzn_air for meaningful results.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4123.asy)
.lib LTC4123.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1744 680
WIRE 496 112 352 112
WIRE 592 112 496 112
WIRE 496 128 496 112
WIRE 592 128 592 112
WIRE 96 208 0 208
WIRE 432 208 352 208
WIRE 496 208 496 192
WIRE 592 208 592 192
WIRE 0 224 0 208
WIRE 432 224 432 208
WIRE 368 304 352 304
WIRE 0 320 0 304
WIRE 432 320 432 304
FLAG 0 320 0
FLAG 432 320 0
FLAG 368 304 0
FLAG 496 208 0
FLAG 592 208 0
SYMBOL VOLTAGE 0 208 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 416 208 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL cap 480 128 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=5m
SYMBOL cap 576 128 R0
SYMATTR InstName BAT
SYMATTR Value .1
SYMBOL PowerProducts\\LTC4123 224 208 R0
SYMATTR InstName U1
SYMATTR Description Low Power Wireless Charger for Hearing Aids
TEXT 480 320 Left 2 !.tran 100 startup
TEXT -40 400 Left 1 ;Notes:\n1. To simulate rectifier and input power control, the user needs to construct\n     a proper AC source to connect to ACIN pin.\n2. The model supports the charge voltage temperature compensation feature.\n    However, the user needs to specify ".temp" for the certain die temperature.\n3. Variables Tzn_air and Tchg, are introduced to reduce the simulation time\n    artificially. Please make sure to have Tchg>Tzn_air for meaningful results.
* Z:\home\khalils\Downloads\files\data\raw_asc\6a74c912da64_NCH.asc
* Generated by LTspice 26.0.1 for Windows.
;dc V2 0 1.8 0.01
;ac dec 20 1k 100G
V2 N001 0 0.6 AC 1 0
V1 N002 0 0.9
M1 N002 N001 0 0 nch l={L} w={W} m=1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib '../lib/log018.l' TT
.param L=180n W=220n
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 128 -80 128
WIRE 128 128 48 128
WIRE -80 144 -80 128
WIRE 128 144 128 128
WIRE -16 208 -16 128
WIRE 0 208 -16 208
SYMBOL voltage -80 128 R0
WINDOW 123 24 110 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1 0
SYMATTR InstName V2
SYMATTR Value 0.6
SYMBOL nmos4 0 128 R0
SYMATTR InstName M1
SYMATTR Value nch
SYMATTR Value2 l={L} w={W} m=1
SYMBOL voltage 128 128 R0
SYMATTR InstName V1
SYMATTR Value 0.9
FLAG 48 176 0
FLAG 48 224 0
FLAG 128 224 0
FLAG -80 224 0
TEXT -112 264 Left 2 !.lib '../lib/log018.l' TT
TEXT -112 280 Left 2 !.param L=180n W=220n
TEXT -112 296 Left 2 !;dc V2 0 1.8 0.01
TEXT -136 88 Left 2 !;ac dec 20 1k 100G
TEXT -138 310 Left 2 !.op
* Z:\tmp\asc_dec_bjh7r6w2\0e819a1bcc5c_Preamp_noise._switched_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N004 N001 470n
C3 N003 N002 470n
V4 3.3V 0 3.3
C4 PREAMP_OUT N005 470n
R3 FILTER_IN 0 200k
V2 Vp 0 9
VIN N002 N006 SINE(5 100m 1.95k) AC 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 5196 964
WIRE -304 -32 -304 -80
WIRE -176 -32 -176 -64
WIRE -48 -32 -48 -64
WIRE -304 80 -304 48
WIRE -176 80 -176 48
WIRE -48 80 -48 48
WIRE 480 96 480 32
WIRE 1008 96 912 96
WIRE 1808 96 1808 64
WIRE 1088 112 1088 64
WIRE 400 208 -64 208
WIRE 480 208 480 176
WIRE 480 208 464 208
WIRE 656 208 480 208
WIRE 1008 224 1008 96
WIRE 1008 224 896 224
WIRE 1088 224 1088 192
WIRE 1088 224 1072 224
WIRE 1280 224 1088 224
WIRE 1712 224 1568 224
WIRE 1808 224 1808 176
WIRE 1808 224 1776 224
WIRE 1968 224 1808 224
WIRE 2032 224 1968 224
WIRE 1808 256 1808 224
WIRE 480 272 480 208
WIRE -64 352 -64 208
WIRE 480 368 480 352
WIRE 1808 368 1808 336
WIRE -64 544 -64 432
WIRE -64 800 -128 800
WIRE 48 800 -64 800
WIRE 128 800 48 800
WIRE 48 832 48 800
WIRE -64 848 -64 800
WIRE -64 944 -64 912
WIRE 48 944 48 912
SYMBOL cap 1072 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 470n
SYMBOL cap 464 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 470n
SYMBOL voltage -304 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 3.3
SYMBOL cap 1776 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 470n
SYMBOL res 32 816 R0
SYMATTR InstName R3
SYMATTR Value 200k
SYMBOL voltage -176 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 9
SYMBOL voltage -64 336 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName VIN
SYMATTR Value SINE(5 100m 1.95k)
FLAG -176 80 0
FLAG -48 80 0
FLAG -176 -64 Vp
FLAG -48 -64 Vn
FLAG -64 944 0
FLAG 48 944 0
FLAG 480 32 Vp
FLAG -304 80 0
FLAG -304 -80 3.3V
FLAG 1808 368 0
FLAG 1808 64 3.3V
FLAG 880 256 Vp
FLAG 128 800 FILTER_IN
FLAG 1968 224 PREAMP_OUT
FLAG 1088 64 Vref
FLAG 480 368 0
* Z:\home\khalils\Downloads\files\data\raw_asc\15cf75534f92_part3_a_vds_sweep.asc
* Generated by LTspice 26.0.1 for Windows.
VGS gate 0 7
VDS drain 0 10
M1 drain gate 0 0 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model nmos NMOS (kp=100u, vt0=0.5, l={x}, w=.36u)
.dc VDS 0 10 0.01
.step param X list .09u .13u .2u .3u .6u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 48 96 48
WIRE 240 48 160 48
WIRE 96 112 96 48
WIRE 240 144 240 48
WIRE -64 192 -96 192
WIRE 48 192 -64 192
WIRE -96 208 -96 192
WIRE -96 336 -96 288
WIRE 96 336 96 208
WIRE 96 336 -96 336
WIRE 176 336 96 336
WIRE 240 336 240 224
WIRE 240 336 176 336
SYMBOL nmos 48 112 R0
SYMATTR InstName M1
SYMBOL voltage -96 192 R0
SYMATTR InstName VGS
SYMATTR Value 7
SYMBOL voltage 240 128 R0
SYMATTR InstName VDS
SYMATTR Value 10
FLAG 96 336 0
FLAG -64 192 gate
FLAG 160 48 drain
FLAG 176 336 source
TEXT -104 376 Left 2 !.model nmos NMOS (kp=100u, vt0=0.5, l={x}, w=.36u)
TEXT -104 408 Left 2 !.dc VDS 0 10 0.01
TEXT -104 440 Left 2 !.step param X list .09u .13u .2u .3u .6u
* Z:\home\khalils\Downloads\files\data\raw_asc\2e11542f3298_MOS-OUT-1.asc
* Generated by LTspice 26.0.1 for Windows.
Vgs N002 0
M1 N001 N002 0 0 IRF530
Vds N001 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vds 0 10V Vgs list 4.5V 5V 6V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1292 680
WIRE -560 -144 -720 -144
WIRE -720 -64 -720 -144
WIRE -560 -16 -560 -144
WIRE -768 16 -912 16
WIRE -912 32 -912 16
WIRE -912 128 -912 112
WIRE -720 128 -720 32
WIRE -560 128 -560 64
SYMBOL nmos -768 -64 R0
SYMATTR InstName M1
SYMATTR Value IRF530
SYMBOL voltage -912 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 53 Left 2
WINDOW 3 40 69 Left 2
WINDOW 0 36 56 Left 2
SYMATTR Value ""
SYMATTR InstName Vgs
SYMBOL voltage -560 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 37 60 Left 2
SYMATTR InstName Vds
SYMATTR Value ""
FLAG -560 128 0
FLAG -912 128 0
FLAG -720 128 0
TEXT -856 208 Left 2 !.dc Vds 0 10V  Vgs list 4.5V 5V 6V
* Z:\home\khalils\Downloads\files\data\raw_asc\3c1d8cbc7d4a_2_1_circuit.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 N002 D
R1 N002 0 3.3k
V1 N001 0 15
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 80 112 80
WIRE 480 80 320 80
WIRE 112 144 112 80
WIRE 480 144 480 80
WIRE 112 320 112 224
WIRE 288 320 112 320
WIRE 480 320 480 224
WIRE 480 320 288 320
SYMBOL res 464 128 R0
SYMATTR InstName R1
SYMATTR Value 3.3k
SYMBOL voltage 112 128 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL diode 256 96 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
FLAG 288 320 0
TEXT 78 326 Left 2 !.tran 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3444.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3444.asy)
V2 N004 0 PULSE(.28 2.36 100u 10u 10u 140u 300u)
R1 OUT N003 340K
L1 N001 N002 2.2
R3 N004 N003 205K
XU1 IN N001 0 N002 OUT IN 0 N003 LTC3444 ;pnba _SHDN)SW1)GND)SW2)Vout)Vin)Vc)FB
Iload OUT 0 100m
C1 OUT 0 4.7 Rser=10m
R2 N003 0 267K
V1 IN 0 3.6
.tran 650u startup
.lib LTC3444.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2824 2324
WIRE 1824 1232 1664 1232
WIRE 2048 1232 1904 1232
WIRE 1664 1328 1664 1232
WIRE 1696 1328 1664 1328
WIRE 2048 1328 2048 1232
WIRE 2048 1328 2016 1328
WIRE 2096 1376 2048 1376
WIRE 2384 1376 2096 1376
WIRE 2480 1376 2384 1376
WIRE 2096 1392 2096 1376
WIRE 2480 1392 2480 1376
WIRE 1664 1408 1552 1408
WIRE 1696 1408 1664 1408
WIRE 2048 1408 2048 1376
WIRE 2048 1408 2016 1408
WIRE 2384 1408 2384 1376
WIRE 1552 1424 1552 1408
WIRE 1664 1488 1664 1408
WIRE 1696 1488 1664 1488
WIRE 2096 1488 2096 1472
WIRE 2096 1488 2016 1488
WIRE 2176 1488 2096 1488
WIRE 2288 1488 2256 1488
WIRE 2096 1504 2096 1488
WIRE 2288 1504 2288 1488
WIRE 2384 1504 2384 1472
WIRE 2480 1504 2480 1472
WIRE 1552 1520 1552 1504
WIRE 1696 1568 1664 1568
WIRE 2048 1568 2016 1568
WIRE 2096 1600 2096 1584
WIRE 2288 1600 2288 1584
SYMBOL voltage 2288 1488 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(.28 2.36 100u 10u 10u 140u 300u)
SYMBOL res 2272 1472 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 205K
SYMBOL current 2480 1392 R0
SYMATTR Value 100m
SYMATTR InstName Iload
SYMBOL res 2080 1376 R0
SYMATTR InstName R1
SYMATTR Value 340K
SYMBOL VOLTAGE 1552 1408 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL res 2080 1488 R0
SYMATTR InstName R2
SYMATTR Value 267K
SYMBOL cap 2368 1408 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=10m
SYMBOL PowerProducts\\LTC3444 1856 1456 R0
SYMATTR InstName U1
SYMBOL ind 1808 1248 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
FLAG 1552 1520 0
FLAG 2096 1600 0
FLAG 2384 1504 0
FLAG 2480 1504 0
FLAG 2480 1376 OUT
FLAG 1664 1568 0
FLAG 2048 1568 0
FLAG 2288 1600 0
FLAG 1552 1408 IN
TEXT 2072 1680 Left 2 !.tran 650u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\32b2ede260b9_Diac.asc
* Generated by LTspice 26.0.1 for Windows.
R1 T1 N001 {Rs}
R2 N003 N001 {Rk}
R4 N005 T2 {Rk}
Q3 N005 N004 N001 0 PNP
R3 N003 N005 1Meg
Q2 N002 N003 N001 0 NPN
D2 N005 N004 D
Q1 N003 N002 T2 0 PNP
D1 N003 N002 D
Q4 N004 N005 T2 0 NPN
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.param Rk = (.491 * Rs + 491k) / (Vbr - .982)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1040 828
WIRE 800 -336 -48 -336
WIRE 208 -224 64 -224
WIRE 208 -176 208 -224
WIRE 592 -128 272 -128
WIRE -48 -112 -48 -336
WIRE 208 0 208 -80
WIRE 368 0 208 0
WIRE 592 0 592 -128
WIRE 592 0 432 0
WIRE -48 48 -48 -32
WIRE -48 48 -240 48
WIRE 992 48 912 48
WIRE 592 80 592 0
WIRE 208 128 208 0
WIRE 368 128 208 128
WIRE 528 128 368 128
WIRE 368 176 368 128
WIRE 592 208 592 176
WIRE 800 208 800 -336
WIRE 800 208 592 208
WIRE 208 288 208 128
WIRE 368 288 368 256
WIRE 592 288 592 208
WIRE 592 288 368 288
WIRE 368 352 368 288
WIRE 592 400 432 400
WIRE 208 512 208 368
WIRE 368 512 368 448
WIRE 368 512 208 512
WIRE 448 512 368 512
WIRE 592 512 592 400
WIRE 592 512 512 512
WIRE 208 608 208 512
WIRE 592 640 592 512
WIRE 368 688 368 512
WIRE 528 688 368 688
WIRE 64 800 64 -224
WIRE 208 800 208 688
WIRE 208 800 64 800
WIRE 592 800 592 736
WIRE 592 800 208 800
WIRE 912 800 912 48
WIRE 912 800 592 800
SYMBOL res 352 160 R0
SYMATTR InstName R2
SYMATTR Value {Rk}
SYMBOL pnp 432 448 R180
SYMATTR InstName Q3
SYMBOL diode 368 16 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D1
SYMBOL pnp 272 -80 R180
SYMATTR InstName Q1
SYMBOL npn 528 640 R0
SYMATTR InstName Q4
SYMBOL diode 448 528 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D2
SYMBOL res 192 592 R0
SYMATTR InstName R4
SYMATTR Value {Rk}
SYMBOL res -32 -16 R180
WINDOW 0 36 76 Left 0
WINDOW 3 36 40 Left 0
SYMATTR InstName R1
SYMATTR Value {Rs}
SYMBOL npn 528 80 R0
SYMATTR InstName Q2
SYMBOL res 192 272 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
FLAG -240 48 T1
FLAG 992 48 T2
TEXT -640 -136 Left 0 !.param Rk = (.491 * Rs + 491k) / (Vbr - .982)