Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0126e48143ec_resonator.asc
* Generated by LTspice 26.0.1 for Windows.
C2 IN OUT {Cb}
C1 N001 N002 {Ca}
R1 OUT N002 {R}
L1 N001 IN {L}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 48 96
WIRE 352 96 224 96
WIRE 48 160 48 96
WIRE 48 160 0 160
WIRE 352 160 352 96
WIRE 400 160 352 160
WIRE 48 272 48 160
WIRE 160 272 128 272
WIRE 256 272 224 272
WIRE 352 272 352 160
WIRE 352 272 336 272
IOPIN 0 160 In
IOPIN 400 160 Out
SYMBOL cap 160 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value {Cb}
SYMBOL res 352 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R}
SYMBOL cap 160 288 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value {Ca}
SYMBOL ind 144 256 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value {L}
FLAG 0 160 IN
FLAG 400 160 OUT
* Z:\tmp\asc_dec_bjh7r6w2\12e24a11f07d_gancia_a_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N007 0 AC 1
V3 Vreg 0 {VINDC}
R12 N008 N020 100
R17 N009 N014 3.3k
Q7 N005 N006 N002 0 2N2222
Q8 N002 N005 N001 0 tip42C
R7 Vf N011 2.2k
R3 N001 N003 0.1k
R11 N018 N019 20
Q2 N012 N013 N017 0 BC547B
V5 5v 0 5
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 680
WIRE -704 -1024 -992 -1024
WIRE -496 -1024 -704 -1024
WIRE -320 -1024 -496 -1024
WIRE -80 -1024 -224 -1024
WIRE 416 -1024 -80 -1024
WIRE -704 -976 -704 -1024
WIRE -704 -864 -704 -896
WIRE -608 -816 -640 -816
WIRE -560 -816 -608 -816
WIRE -272 -816 -272 -960
WIRE -240 -816 -272 -816
WIRE -80 -816 -80 -1024
WIRE -80 -816 -144 -816
WIRE -608 -736 -608 -816
WIRE -192 -736 -192 -752
WIRE -192 -736 -496 -736
WIRE -2160 -688 -2352 -688
WIRE -1920 -688 -2160 -688
WIRE -1360 -608 -1360 -640
WIRE -2352 -560 -2352 -688
WIRE 960 -560 960 -1024
WIRE -2160 -544 -2160 -688
WIRE -176 -528 -336 -528
WIRE -32 -528 -176 -528
WIRE 64 -528 -32 -528
WIRE -1360 -496 -1360 -528
WIRE -176 -496 -176 -528
WIRE -32 -496 -32 -528
WIRE -2160 -448 -2160 -496
WIRE -2352 -432 -2352 -480
WIRE 416 -416 416 -848
WIRE 416 -416 240 -416
WIRE 560 -416 416 -416
WIRE -176 -368 -176 -416
WIRE -176 -368 -320 -368
WIRE 416 -352 416 -416
WIRE 560 -352 560 -416
WIRE 416 -208 416 -272
WIRE 560 -208 560 -272
WIRE 560 -208 416 -208
WIRE -1360 -192 -1360 -224
WIRE 416 -112 416 -208
WIRE -592 -80 -592 -448
WIRE -656 -32 -880 -32
WIRE -176 -16 -176 -368
WIRE -32 -16 -32 -416
WIRE -1360 16 -1360 -64
WIRE 288 16 288 -112
WIRE 576 16 464 16
WIRE -592 80 -592 16
WIRE -1360 128 -1360 96
WIRE 288 176 288 96
WIRE 288 304 288 256
WIRE 288 304 -272 304
WIRE 416 304 416 32
WIRE 416 304 288 304
WIRE 752 304 416 304
WIRE 960 304 960 -480
SYMBOL voltage -2352 -576 R0
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V2
SYMATTR Value ""
SYMBOL voltage -1360 -624 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value {VINDC}
SYMBOL res 944 -576 R0
SYMATTR InstName R12
SYMATTR Value 100
SYMBOL res -48 -512 R0
SYMATTR InstName R17
SYMATTR Value 3.3k
SYMBOL npn -240 -752 R270
SYMATTR InstName Q7
SYMATTR Value 2N2222
SYMBOL pnp -224 -960 M270
SYMATTR InstName Q8
SYMATTR Value tip42C
SYMBOL res 400 -368 R0
SYMATTR InstName R7
SYMATTR Value 2.2k
SYMBOL res -720 -992 R0
SYMATTR InstName R3
SYMATTR Value 0.1k
SYMBOL res 272 160 R0
SYMATTR InstName R11
SYMATTR Value 20
SYMBOL npn -656 -80 R0
SYMATTR InstName Q2
SYMATTR Value BC547B
SYMBOL voltage -1360 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 5
FLAG 240 -416 Vf
FLAG -1360 -496 0
FLAG -1360 -192 0
FLAG -1360 -640 Vreg
FLAG -1360 128 0
FLAG -1360 -64 5v
FLAG -2160 -448 0
FLAG -2352 -432 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3099.asc
* Generated by LTspice 26.0.1 for Windows.
V2 IN 0 -5
R1 0 N001 33.2K
R2 0 N002 8.25k
R4 OUT N005 453k
R6 N005 0 49.9k
R3 N004 N003 200K
Rload OUT 0 3.3
C2 OUT 0 10 Rser=6m
C1 0 N001 4.7
V1 N003 0 3.3
XU1 IN MP_01 N003 N004 N005 N002 NC_02 N001 0 OUT OUT LT3099 ;pnba In))En)Pg)Pgfb)Ilim)Vioc)Set)Gnd)Outs)Out
.tran 500m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3099.asy)
.lib LT3099.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1112 680
WIRE 176 -80 176 -96
WIRE 352 -80 352 -96
WIRE 64 -64 64 -96
WIRE 64 16 64 0
WIRE 176 16 176 0
WIRE 176 16 64 16
WIRE 176 32 176 16
WIRE 352 32 352 0
WIRE 80 64 48 64
WIRE 480 96 432 96
WIRE 592 96 480 96
WIRE 688 96 592 96
WIRE 592 112 592 96
WIRE 688 112 688 96
WIRE -64 128 -144 128
WIRE -32 128 -64 128
WIRE 80 128 48 128
WIRE -144 144 -144 128
WIRE 480 144 480 96
WIRE 480 144 432 144
WIRE 480 160 480 144
WIRE -64 192 -64 128
WIRE 80 192 -64 192
WIRE 592 208 592 176
WIRE 688 208 688 192
WIRE -144 240 -144 224
WIRE 480 272 480 240
WIRE 480 272 432 272
WIRE 480 304 480 272
WIRE 80 320 -64 320
WIRE -64 336 -64 320
WIRE -64 432 -64 416
WIRE 480 432 480 384
FLAG 480 432 0
FLAG -64 432 0
FLAG 48 64 0
FLAG 176 -96 0
FLAG 352 -96 0
FLAG 688 208 0
FLAG 592 208 0
FLAG 64 -96 0
FLAG -64 320 IN
FLAG 688 96 OUT
FLAG -144 240 0
SYMBOL voltage -64 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 160 -96 R0
SYMATTR InstName R1
SYMATTR Value 33.2K
SYMBOL res 336 -96 R0
SYMATTR InstName R2
SYMATTR Value 8.25k
SYMBOL res 464 144 R0
SYMATTR InstName R4
SYMATTR Value 453k
SYMBOL res 464 288 R0
SYMATTR InstName R6
SYMATTR Value 49.9k
SYMBOL res 64 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 200K
SYMBOL res 672 96 R0
SYMATTR InstName Rload
SYMATTR Value 3.3
SYMBOL cap 576 112 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMATTR SpiceLine Rser=6m
SYMBOL cap 48 -64 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL voltage -144 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL LT3099 256 144 R0
SYMATTR InstName U1
TEXT 552 408 Left 2 !.tran 500m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\06a54b5845e1_Fig18_5.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N002 Vin 0 0 N_50n l=50n w=500n
Vin Vin 0 PULSE(0 1 0 100n 100n 1n 2u)
VDD VDD 0 1
M5 VDD Vin N001 VDD P_50n l=50n w=1u
M4 N001 Vin Vout VDD P_50n l=50n w=1u
M2 Vout Vin N002 0 N_50n l=50n w=500n
M6 N001 Vout 0 VDD P_50n l=50n w=1.3u
M3 VDD Vout N002 0 N_50n l=50n w=1.125u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 200n
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 680
WIRE 160 -496 160 -512
WIRE 160 -480 160 -496
WIRE 160 -368 160 -400
WIRE 160 -192 160 -208
WIRE 160 -96 160 -112
WIRE 320 -208 304 -208
WIRE 368 -272 368 -432
WIRE 368 -208 320 -208
WIRE 368 -208 368 -272
WIRE 368 -96 368 -208
WIRE 368 64 368 -96
WIRE 400 -432 368 -432
WIRE 400 -272 368 -272
WIRE 400 -96 368 -96
WIRE 400 64 368 64
WIRE 448 -512 448 -560
WIRE 448 -384 448 -416
WIRE 448 -352 448 -384
WIRE 448 -208 448 -256
WIRE 448 -176 448 -208
WIRE 448 -48 448 -80
WIRE 448 -16 448 -48
WIRE 448 128 448 80
WIRE 688 -384 448 -384
WIRE 720 -48 448 -48
WIRE 736 -208 448 -208
WIRE 736 -96 736 -208
WIRE 768 -208 736 -208
WIRE 768 -208 768 -336
WIRE 848 -384 784 -384
WIRE 848 -352 848 -384
WIRE 848 -48 816 -48
WIRE 848 -48 848 -112
WIRE 992 -208 768 -208
WIRE 1024 -208 992 -208
FLAG 160 -96 0
FLAG 160 -208 Vin
FLAG 448 32 0
FLAG 160 -368 0
FLAG 160 -496 VDD
FLAG 448 -464 VDD
FLAG 448 128 0
FLAG 448 -560 VDD
FLAG 320 -208 Vin
FLAG 448 -304 VDD
FLAG 448 -128 0
FLAG 992 -208 Vout
FLAG 736 -384 VDD
FLAG 768 -48 0
FLAG 848 -112 VDD
FLAG 848 -352 0
SYMBOL nmos4 400 -16 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 160 -208 R0
WINDOW 0 -72 21 Left 0
WINDOW 3 -149 149 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(0 1 0 100n 100n 1n 2u)
SYMBOL voltage 160 -496 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL pmos4 400 -512 R0
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M5
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL pmos4 400 -352 R0
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M4
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL nmos4 400 -176 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M2
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL pmos4 688 -336 R270
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M6
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1.3u
SYMBOL nmos4 816 -96 R90
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M3
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=1.125u
TEXT 88 -16 Left 0 !.tran 200n
TEXT 24 24 Left 0 !.lib cmosedu_models.txt
* Z:\home\khalils\Downloads\files\data\raw_asc\4585e7bb6cec_555.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\NE555.asy)
R4 N004 0 1k
D1 N002 N003 D
C1 N005 0 1F
V1 N001 0 12
R2 N002 N003 1000
R1 N001 N002 1000
XU1 0 N003 N004 N001 N005 N003 N002 N001 NE555 ;pnba GND)TRIG)OUT)RST)CV)THRS)DIS)Vcc
C2 N003 0 1F
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1
.lib NE555.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 744
WIRE 400 -400 256 -400
WIRE 256 -320 -288 -320
WIRE 528 -208 -176 -208
WIRE 400 -128 400 -400
WIRE 400 -128 32 -128
WIRE 464 -128 400 -128
WIRE 416 -16 96 -16
WIRE 32 80 32 -128
WIRE 32 80 -48 80
WIRE 80 80 32 80
WIRE 128 96 112 96
WIRE 464 96 464 -128
WIRE 464 96 352 96
WIRE 96 160 96 -16
WIRE 128 160 96 160
WIRE 528 160 528 -208
WIRE 528 160 352 160
WIRE -176 208 -176 -208
WIRE -144 208 -176 208
WIRE -48 208 -48 160
WIRE -48 208 -144 208
WIRE 128 224 -512 224
WIRE 416 224 416 -16
WIRE 416 224 352 224
WIRE -144 256 -144 208
WIRE -48 256 -48 208
WIRE 80 288 80 80
WIRE 128 288 80 288
WIRE 464 288 352 288
WIRE -512 320 -512 224
WIRE -144 336 -144 320
WIRE -48 336 -144 336
WIRE 96 336 96 160
WIRE 96 336 -48 336
WIRE -48 416 -48 336
WIRE 464 416 464 288
WIRE 464 416 240 416
WIRE -288 544 -288 -320
WIRE -48 544 -48 480
WIRE -48 544 -288 544
WIRE -48 560 -48 544
WIRE 112 560 112 96
WIRE 112 560 -48 560
WIRE 240 560 240 480
WIRE 240 560 112 560
WIRE -512 592 -512 400
WIRE 112 592 112 560
WIRE 112 592 -512 592
WIRE 112 656 112 592
WIRE 144 656 112 656
WIRE 144 704 144 656
SYMBOL cap -64 416 R0
SYMATTR InstName C2
SYMATTR Value 1F
SYMBOL voltage 256 -416 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL diode -160 256 R0
SYMATTR InstName D1
SYMBOL Misc\\NE555 240 192 R0
SYMATTR InstName U1
SYMBOL res -64 64 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL res -528 304 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL cap 224 416 R0
SYMATTR InstName C1
SYMATTR Value 1F
SYMBOL res -64 240 R0
SYMATTR InstName R2
SYMATTR Value 1000
FLAG 144 704 0
TEXT -514 728 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\2bb41214fdd3_bjtchar_03_02_03_incvbb.asc
* Generated by LTspice 26.0.1 for Windows.
vb N005 N006 0
R2 N001 N002 1k
Q1 N003 N006 N007 0 BC238
V2 N004 0 0
V1 N001 0 12
ve N007 N008 0
R3 N008 0 220
R1 N005 N004 1Meg
vc N002 N003 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V2 0 5 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 576 -144 240 -144
WIRE 240 -112 240 -144
WIRE 240 0 240 -32
WIRE 240 112 240 80
WIRE 576 112 576 -144
WIRE -96 160 -192 160
WIRE 48 160 -16 160
WIRE 176 160 128 160
WIRE -192 256 -192 160
WIRE 240 272 240 208
WIRE 240 400 240 352
WIRE -192 528 -192 336
WIRE 240 528 240 480
WIRE 576 528 576 192
SYMBOL voltage 240 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName vc
SYMATTR Value 0
SYMBOL res 224 384 R0
SYMATTR InstName R3
SYMATTR Value 220
SYMBOL voltage 576 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 224 -128 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL npn 176 112 R0
SYMATTR InstName Q1
SYMATTR Value BC238
SYMBOL voltage 32 160 M90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName vb
SYMATTR Value 0
SYMBOL res 0 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1meg
SYMBOL voltage -192 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage 240 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName ve
SYMATTR Value 0
FLAG 576 528 0
FLAG 240 528 0
FLAG -192 528 0
TEXT -226 552 Left 2 !.dc V2 0 5 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\79f7fb0ca7f4_TP2_PUNTO_2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 10
D1 N001 N002 1N3198
R1 N002 0 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 0.8 0.01
.model 1N3198 D (IS=2.0e-7 N=1.20 RS=1.0 EG=1.11 XTI=-2 CJO=40p VJ=0.75 M=0.333 BV=2.25 IBV=5m KF=0 AF=1 FC=0.5)
.step temp list 20 100 125
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1264 680
WIRE 208 96 48 96
WIRE 352 96 272 96
WIRE 48 112 48 96
WIRE 48 208 48 192
WIRE 352 208 352 176
WIRE 352 208 48 208
WIRE 48 256 48 208
SYMBOL diode 208 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N3198
SYMBOL voltage 48 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 336 80 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 48 256 0
TEXT 128 312 Left 2 !.dc V1 0 0.8 0.01
TEXT -288 24 Left 2 !.model 1N3198 D (IS=2.0e-7 N=1.20 RS=1.0 EG=1.11 XTI=-2 CJO=40p VJ=0.75 M=0.333 BV=2.25 IBV=5m KF=0 AF=1 FC=0.5)
TEXT -288 320 Left 2 !.step temp list 20 100 125
* Z:\home\khalils\Downloads\files\data\raw_asc\0f51ff9aa3e0_integratorul_cu_AO.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
V3 ui 0 SINE(0 1 1k)
R3 N003 0 10k
R1 NC_01 N001 100k
C1 uo N001 10n
XU1 N003 N001 N002 N004 uo LT1001 ;pnba In+)In-)V+)V-)OUT
V1 N002 0 10
R2 N001 ui 10k
V2 N004 0 -10
.tran 0 30m 0 0.1m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -48 208 -80
WIRE 336 48 128 48
WIRE 128 112 128 48
WIRE 288 112 128 112
WIRE 464 112 464 48
WIRE 464 112 352 112
WIRE 208 144 208 32
WIRE -144 160 -192 160
WIRE -48 160 -64 160
WIRE -16 160 -48 160
WIRE 128 160 128 112
WIRE 128 160 64 160
WIRE 176 160 128 160
WIRE 464 176 464 112
WIRE 464 176 240 176
WIRE 496 176 464 176
WIRE 512 176 496 176
WIRE 176 192 80 192
WIRE 80 256 80 192
WIRE 208 288 208 208
WIRE 80 400 80 336
WIRE 208 400 208 368
SYMBOL cap 352 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 432 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage -48 160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1k)
SYMBOL res 80 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 64 240 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL voltage 208 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -10
SYMBOL voltage 208 48 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL OpAmps\\OP07 208 112 R0
SYMATTR InstName U1
FLAG 208 -80 0
FLAG 208 400 0
FLAG -192 160 0
FLAG 80 400 0
FLAG -48 160 ui
FLAG 496 176 uo
TEXT -208 424 Left 2 !.tran 0 30m 0 0.1m
* Z:\home\khalils\Downloads\files\data\raw_asc\1844550559a3_BuckVariable.asc
* Generated by LTspice 26.0.1 for Windows.
Rload OUT 0 {Rload}
L1 N001 OUT {L1} Ipk=16.7 Rser=0.0187 Rpar=3108.6 Cpar=0
VSwitch N002 N001 PULSE(0 5V 0 10ns 10ns {Ton} {Tperiode})
D1 0 N001 PDS5100
MQ1 IN N002 N001 N001 BSC060N10NS3
Cout OUT 0 {Cout} Rser=0.004
VSupply IN 0 {Uin}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.meas TRAN UinRMS RMS V(in)
.meas TRAN IinRMS RMS I(Supply)
.meas TRAN UoutRMS RMS ( V(out) )
.meas TRAN IoutRMS RMS I(Rload)
.meas TRAN PoutRMS RMS ( I(Rload)*(V(out) ) )
.meas TRAN PoutAVG AVG ( I(Rload)*( V(out) ) )
.meas TRAN PinRMS RMS ( abs(-I(Supply)*V(in)) )
.meas TRAN PinAVG AVG ( abs(-I(Supply)*V(in)) )
.meas TRAN IoutRippel PP I(Rload)
.meas TRAN UoutRippel PP (V(out))
.meas TRAN IinRippel PP I(Supply)
.meas TRAN UinRippel PP V(in)
.tran {Tsim}
.inc default_values.param
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2836 1464
WIRE 400 368 336 368
WIRE 432 368 400 368
WIRE 560 368 528 368
WIRE 656 368 560 368
WIRE 752 368 656 368
WIRE 880 368 832 368
WIRE 960 368 880 368
WIRE 1008 368 960 368
WIRE 560 400 560 368
WIRE 656 400 656 368
WIRE 880 400 880 368
WIRE 1008 416 1008 368
WIRE 336 464 336 368
WIRE 512 480 512 416
WIRE 560 480 512 480
WIRE 656 528 656 464
WIRE 880 528 880 464
WIRE 880 528 656 528
WIRE 1008 528 1008 496
WIRE 1008 528 880 528
WIRE 336 592 336 544
WIRE 656 592 656 528
SYMBOL cap 864 400 R0
SYMATTR SpiceLine Rser=0.004
SYMATTR Value {Cout}
SYMATTR InstName Cout
SYMBOL schottky 640 464 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value PDS5100
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage 560 496 R180
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 -176 -325 Left 2
WINDOW 0 33 72 Left 2
SYMATTR Value PULSE(0 5V 0 10ns 10ns {Ton} {Tperiode})
SYMATTR InstName Switch
SYMBOL nmos 432 416 R270
WINDOW 3 87 51 VRight 2
SYMATTR Value BSC060N10NS3
SYMATTR InstName Q1
SYMBOL res 992 400 R0
SYMATTR InstName Rload
SYMATTR Value {Rload}
SYMBOL voltage 336 448 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Supply
SYMATTR Value {Uin}
SYMBOL ind 736 384 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value {L1}
SYMATTR SpiceLine Ipk=16.7 Rser=0.0187 Rpar=3108.6 Cpar=0
FLAG 960 368 OUT
FLAG 400 368 IN
FLAG 656 592 0
FLAG 336 592 0
TEXT 968 832 Left 2 !.meas TRAN UinRMS RMS V(in)\n.meas TRAN IinRMS RMS I(Supply)\n.meas TRAN UoutRMS RMS ( V(out) )\n.meas TRAN IoutRMS RMS I(Rload)\n.meas TRAN PoutRMS RMS ( I(Rload)*(V(out) )  )\n.meas TRAN PoutAVG AVG ( I(Rload)*( V(out) )  ) \n.meas TRAN PinRMS RMS ( abs(-I(Supply)*V(in)) )\n.meas TRAN PinAVG AVG ( abs(-I(Supply)*V(in)) )
TEXT 264 872 Left 2 !.meas TRAN IoutRippel PP I(Rload)\n.meas TRAN UoutRippel PP (V(out))\n.meas TRAN IinRippel PP I(Supply)\n.meas TRAN UinRippel PP V(in)
TEXT 264 776 Left 2 !.tran {Tsim}
TEXT 768 752 Left 2 !.inc default_values.param
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6200.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6200.asy)
R1 OUT N001 1K
V2 -V 0 -5
V3 N002 0 SINE(0 1 1Meg)
XU1 N002 N001 OUT +V -V NC_01 LT6200 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN_L
V1 +V 0 5
R2 N001 0 1K
.tran 10u
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -112 48 -128 48
WIRE 0 48 -32 48
WIRE 96 48 0 48
WIRE 208 48 176 48
WIRE 64 112 64 96
WIRE -416 160 -416 144
WIRE -288 160 -288 144
WIRE 0 160 0 48
WIRE 32 160 0 160
WIRE 208 192 208 48
WIRE 208 192 176 192
WIRE 256 192 208 192
WIRE 32 224 -176 224
WIRE -176 240 -176 224
WIRE -416 256 -416 240
WIRE -288 256 -288 240
WIRE 64 288 64 272
WIRE -176 336 -176 320
SYMBOL res -16 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -176 224 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1Meg)
SYMBOL opamps\\LT6200 64 192 R0
SYMATTR InstName U1
SYMBOL res 192 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -416 144 R0
SYMATTR InstName V2
SYMATTR Value -5
FLAG -288 256 0
FLAG 64 96 +V
FLAG -288 144 +V
FLAG 64 288 -V
FLAG -416 256 0
FLAG -416 144 -V
FLAG -128 48 0
FLAG -176 336 0
FLAG 256 192 OUT
TEXT 152 312 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\Fc.asc
* Generated by LTspice 26.0.1 for Windows.
*.model DX D(Is=0 Cjo={Cjo} m={m} vj={Vj} Fc={Fc} tt=.5u)
* This example schematic is supplied for informational/educational purposes only.
R9 bias N001 100
V1 bias 0 pwl(0 -10 1m 10)
D1 0 N001 DX
B2 0 0 I=max(0.,({Cjo}/(1-{Fc})**{1+m})*({1-Fc*(1+m)}-{m/Vj}*V(bias)))
B1 0 0 I={Cjo}/(1+max(V(bias),-.5*{Vj})/{Vj})**{m}
XU1 N001 0 bias res cap capometer current=1m freq=3Meg C=.25 ;pnba DUT+)DUT-)bias)Resistance)Capacitance
B3 0 0 I=V(cap)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m
.options maxstep=.0125u
.params Cjo=930p m=.75 Vj=1.2 Fc=0.;-.5
.include capometer.sub
.model DX D(Is=0 Cjo={Cjo} m={m} vj={Vj} Fc={Fc} tt=.5u)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 5945688 13421568
WIRE 2896 -672 2288 -672
WIRE 3360 -640 3264 -640
WIRE 2288 -608 2288 -672
WIRE 2368 -608 2288 -608
WIRE 2640 -608 2448 -608
WIRE 2896 -608 2640 -608
WIRE 3360 -576 3264 -576
WIRE 3616 -576 3504 -576
WIRE 3616 -560 3616 -576
WIRE 2896 -544 2800 -544
WIRE 2288 -528 2288 -608
WIRE 2640 -512 2640 -608
WIRE 3504 -464 3504 -576
WIRE 3616 -464 3616 -480
WIRE 2288 -384 2288 -448
WIRE 2640 -384 2640 -448
WIRE 2640 -384 2288 -384
WIRE 2800 -384 2800 -544
WIRE 2800 -384 2640 -384
WIRE 2640 -368 2640 -384
WIRE 2576 -256 2464 -256
WIRE 2576 -240 2576 -256
WIRE 2464 -144 2464 -256
WIRE 2576 -144 2576 -160
WIRE 2576 -80 2464 -80
WIRE 2576 -64 2576 -80
WIRE 2464 32 2464 -80
WIRE 2576 32 2576 16
SYMBOL bi2 2576 -64 R0
SYMATTR InstName B2
SYMATTR Value I=max(0.,({Cjo}/(1-{Fc})**{1+m})*({1-Fc*(1+m)}-{m/Vj}*V(bias)))
SYMBOL bi2 3616 -560 R0
SYMATTR InstName B3
SYMATTR Value I=V(cap)
SYMBOL res 2352 -624 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R9
SYMATTR Value 100
SYMBOL capmeter 2976 -640 R0
SYMATTR InstName U1
SYMATTR SpiceLine current=1m freq=3Meg C=.25
SYMBOL voltage 2288 -544 M0
SYMATTR InstName V1
SYMATTR Value pwl(0 -10 1m 10)
SYMBOL diode 2656 -448 R180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value DX
SYMBOL bi2 2576 -240 R0
SYMATTR InstName B1
SYMATTR Value I={Cjo}/(1+max(V(bias),-.5*{Vj})/{Vj})**{m}
FLAG 2640 -368 0
FLAG 2576 -144 0
FLAG 2464 -144 0
FLAG 2288 -672 bias
FLAG 3360 -576 cap
FLAG 3360 -640 res
FLAG 2576 32 0
FLAG 2464 32 0
FLAG 3616 -464 0
FLAG 3504 -464 0
TEXT 2256 -328 Left 2 !.tran 1m
TEXT 2312 -272 Left 2 !.options maxstep=.0125u
TEXT 2880 -368 Left 2 !.params Cjo=930p m=.75 Vj=1.2 Fc=0.;-.5
TEXT 2888 -424 Left 2 !.include capometer.sub
TEXT 2880 -312 Left 2 !.model DX D(Is=0 Cjo={Cjo} m={m} vj={Vj} Fc={Fc} tt=.5u)
TEXT 2880 -264 Left 2 !*.model DX D(Is=0 Cjo={Cjo} m={m} vj={Vj} Fc={Fc} tt=.5u)
TEXT 2880 64 Top 1 ;This example schematic is supplied for informational/educational purposes only.