Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0e861aacf56e_autoreset_wroom.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 3.3
M2 BM RTS DTS DTS BSS123
M1 EN DTS RTS RTS BSS123
V4 N002 0 PULSE(0 3.3 2 0.01 0.01 2 4 2)
R4 N001 EN 50k
V2 N003 0 PULSE(0 3.3 0 0.01 0.01 2 6 2)
R3 DTS N002 10K
R6 N003 RTS 10K
R7 N001 BM 50k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 5 0 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 816
WIRE 400 -80 288 -80
WIRE 544 -80 400 -80
WIRE 288 -32 288 -80
WIRE 544 -16 544 -80
WIRE 288 144 288 48
WIRE 288 144 224 144
WIRE 784 144 288 144
WIRE -32 224 -144 224
WIRE 96 224 -32 224
WIRE 176 224 96 224
WIRE 224 272 224 240
WIRE 224 272 144 272
WIRE -272 320 -336 320
WIRE -144 320 -144 304
WIRE -144 320 -192 320
WIRE -336 432 -336 320
WIRE -272 432 -336 432
WIRE -144 432 -192 432
WIRE 400 432 400 -80
WIRE -144 512 -144 432
WIRE 400 512 224 512
WIRE 784 512 400 512
WIRE -32 592 -144 592
WIRE 144 592 144 272
WIRE 144 592 -32 592
WIRE 176 592 144 592
WIRE 96 656 96 224
WIRE 224 656 224 608
WIRE 224 656 96 656
WIRE -336 784 -336 432
WIRE 544 784 544 64
WIRE 544 784 -336 784
IOPIN 784 144 Out
IOPIN 784 512 Out
IOPIN -32 224 Out
IOPIN -32 592 Out
SYMBOL res 384 416 R0
SYMATTR InstName R7
SYMATTR Value 50k
SYMBOL voltage -176 432 R90
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 0 0.01 0.01 2 6 2)
SYMBOL nmos 176 144 R0
SYMATTR InstName M1
SYMATTR Value BSS123
SYMBOL voltage -176 320 R90
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 3.3 2 0.01 0.01 2 4 2)
SYMBOL res 272 -48 R0
SYMATTR InstName R4
SYMATTR Value 50k
SYMBOL res -160 496 R0
SYMATTR InstName R6
SYMATTR Value 10K
SYMBOL voltage 544 -32 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res -160 208 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL nmos 176 512 R0
SYMATTR InstName M2
SYMATTR Value BSS123
FLAG 544 784 0
FLAG 784 144 EN
FLAG 784 512 BM
FLAG -32 224 DTS
FLAG -32 592 RTS
TEXT -1002 -248 Left 2 !.tran 0 5 0 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\3309646b562e_fft.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IP 0 SINE(0 10 100)
D2 OP 0 1N4148
D1 0 OP 1N4148
R1 OP IP 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 64 48 64
WIRE 96 64 64 64
WIRE 240 64 176 64
WIRE 304 64 240 64
WIRE 384 64 304 64
WIRE 416 64 384 64
WIRE 240 96 240 64
WIRE 304 96 304 64
WIRE 48 144 48 64
WIRE 240 176 240 160
WIRE 304 176 304 160
SYMBOL res 192 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 256 160 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 48 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 100)
SYMBOL diode 288 96 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
FLAG 48 224 0
FLAG 240 176 0
FLAG 304 176 0
FLAG 384 64 OP
FLAG 64 64 IP
TEXT 14 248 Left 2 !.tran 0.1
* Z:\tmp\asc_dec_bjh7r6w2\190ea4e47f72_4051_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
S7 IO7 IOC Y7 Vss SW
S1 IO1 IOC Y1 Vss SW
S2 IO2 IOC Y2 Vss SW
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 788
WIRE 176 256 144 256
WIRE 176 272 176 256
WIRE 192 96 160 96
WIRE 192 112 192 96
WIRE 192 208 144 208
WIRE 192 208 192 192
WIRE 304 288 288 288
WIRE 320 128 304 128
WIRE 320 176 288 176
WIRE 352 256 320 256
WIRE 352 272 352 256
WIRE 368 96 336 96
WIRE 368 112 368 96
WIRE 368 208 320 208
WIRE 368 208 368 192
WIRE 496 288 480 288
WIRE 512 128 496 128
WIRE 512 176 480 176
WIRE 544 256 512 256
WIRE 544 272 544 256
WIRE 560 96 528 96
WIRE 560 112 560 96
WIRE 560 208 512 208
WIRE 560 208 560 192
WIRE 720 128 704 128
WIRE 720 176 688 176
WIRE 720 288 704 288
WIRE 720 336 688 336
WIRE 768 96 736 96
WIRE 768 112 768 96
WIRE 768 208 720 208
WIRE 768 208 768 192
WIRE 768 256 736 256
WIRE 768 272 768 256
WIRE 768 368 720 368
WIRE 768 368 768 352
SYMBOL sw 768 256 R0
WINDOW 0 -25 54 Left 0
WINDOW 3 -46 98 Left 0
SYMATTR InstName S7
SYMBOL sw 368 96 R0
WINDOW 0 -25 54 Left 0
WINDOW 3 -46 98 Left 0
SYMATTR InstName S1
SYMBOL sw 560 96 R0
WINDOW 0 -25 54 Left 0
WINDOW 3 -46 98 Left 0
SYMATTR InstName S2
FLAG 336 96 IO1
FLAG 304 128 Vss
FLAG 320 208 IOC
FLAG 288 176 Y1
FLAG 528 96 IO2
FLAG 496 128 Vss
FLAG 512 208 IOC
FLAG 480 176 Y2
FLAG 736 96 IO3
FLAG 704 128 Vss
FLAG 720 208 IOC
FLAG 688 176 Y3
FLAG 320 256 IO5
FLAG 288 288 Vss
FLAG 512 256 IO6
FLAG 480 288 Vss
FLAG 736 256 IO7
FLAG 704 288 Vss
FLAG 720 368 IOC
FLAG 688 336 Y7
* Z:\home\khalils\Downloads\files\data\raw_asc\18cde344d608_MRF9411_AC.asc
* Generated by LTspice 26.0.1 for Windows.
C1 0 N003 C
L2 N002 N003 L
L1 N001 N005 1m
Q1 N003 N005 0 0 MRF9411
V1 N001 0 V
V2 N002 0 V
V3 N004 0 SINE(0 1u 10e6)
C2 N005 N004 10n
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -144 -112 -240 -112
WIRE 176 -96 64 -96
WIRE -240 -80 -240 -112
WIRE 64 -80 64 -96
WIRE 176 -32 176 -96
WIRE -144 0 -144 -112
WIRE -240 16 -240 0
WIRE 64 16 64 0
WIRE 176 64 176 48
WIRE 176 64 64 64
WIRE 256 64 176 64
WIRE 448 64 320 64
WIRE -272 112 -368 112
WIRE -144 112 -144 80
WIRE -144 112 -208 112
WIRE 0 112 -144 112
WIRE -368 208 -368 192
WIRE 64 208 64 160
WIRE 448 208 448 64
SYMBOL npn 0 64 R0
SYMATTR InstName Q1
SYMATTR Value MRF9411
SYMBOL voltage -368 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1u 10e6)
SYMBOL ind 160 -48 R0
SYMATTR InstName L2
SYMBOL voltage -240 -96 R0
SYMATTR InstName V1
SYMBOL cap 320 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMBOL ind -160 -16 R0
SYMATTR InstName L1
SYMATTR Value 1m
SYMBOL voltage 64 -96 R0
SYMATTR InstName V2
SYMBOL cap -208 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
FLAG 64 208 0
FLAG -240 16 0
FLAG 64 16 0
FLAG -368 208 0
FLAG 448 208 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP165-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP165-1.8.asy)
C1 OUT 0 1
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
XU1 IN 0 N001 OUT ADP16xfd K=555.6u ;pnba Vin)GND)En)Vout
Rload OUT 0 180
V1 IN 0 5
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -48 96
WIRE 416 96 352 96
WIRE 512 96 416 96
WIRE -48 112 -48 96
WIRE 416 112 416 96
WIRE 512 112 512 96
WIRE -48 208 -48 192
WIRE 160 208 16 208
WIRE 416 208 416 176
WIRE 512 208 512 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL ADP165-1.8 256 208 R0
SYMATTR InstName U1
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 180
SYMBOL voltage -48 96 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -48 208 0
FLAG 256 272 0
FLAG 416 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG -48 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3526LB.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3526LB.asy)
C1 OUT 0 4.7 Rser=1m
L1 IN N001 4.7 Rpar=5K
XU1 N001 0 IN IN N002 OUT LTC3526LB ;pnba SW)GND)Vin)_SHDN)FB)Vout
R1 OUT N002 1.78Meg
Rload OUT 0 16.5
R2 N002 0 1Meg
V1 IN 0 2
.tran .5m startup
.lib LTC3526LB.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 80 -144 80
WIRE 0 80 -48 80
WIRE 128 80 80 80
WIRE -144 96 -144 80
WIRE 128 128 128 80
WIRE -144 192 -144 176
WIRE -48 192 -48 80
WIRE -16 192 -48 192
WIRE 320 192 272 192
WIRE 480 192 320 192
WIRE 576 192 480 192
WIRE 320 208 320 192
WIRE 480 208 480 192
WIRE 576 208 576 192
WIRE 480 304 480 272
WIRE 576 304 576 288
WIRE -48 320 -48 192
WIRE -16 320 -48 320
WIRE 320 320 320 288
WIRE 320 320 272 320
WIRE 320 336 320 320
WIRE 128 400 128 384
WIRE 320 432 320 416
SYMBOL cap 464 208 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1m
SYMBOL PowerProducts\\LTC3526LB 128 256 R0
SYMATTR InstName U1
SYMBOL res 304 192 R0
SYMATTR InstName R1
SYMATTR Value 1.78Meg
SYMBOL res 560 192 R0
SYMATTR InstName Rload
SYMATTR Value 16.5
SYMBOL res 304 320 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL ind -16 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=5K
SYMBOL voltage -144 80 R0
SYMATTR Value 2
SYMATTR InstName V1
FLAG -144 192 0
FLAG 128 400 0
FLAG 320 432 0
FLAG 480 304 0
FLAG 576 304 0
FLAG -144 80 IN
FLAG 576 192 OUT
TEXT 456 376 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\19ac29740603_OP_AMP_impedance_matching.asc
* Generated by LTspice 26.0.1 for Windows.
* Measurement
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4805.asy)
XU1 +2.25 N001 +4.5 0 N002 +4.5 ADA4805 ;pnba 100)101)102)103)104)106
R7 +2.25 0 1k
R5 NC_01 N003 50
V1 +4.5 0 4.5
V2 vin 0 SINE(2.25 10u 10.7Meg) Rser=50
R4 N004 +2.25 5k
R2 N002 N001 1000
R3 vout N002 5k
R6 +4.5 +2.25 1k
R1 N001 vin 50
XU2 N004 N003 +4.5 0 N003 +4.5 ADA4805 ;pnba 100)101)102)103)104)106
.meas vout_max max V(vout)
.meas vout_min min V(vout)
.meas vout_vpp param vout_max-vout_min
.meas vin_max max V(vin)
.meas vin_min min V(vin)
.meas vin_vpp param vin_max-vin_min
.meas amp_gain PARAM -vout_vpp/vin_vpp
.tran 50u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 -48 48 -48
WIRE 160 -48 144 -48
WIRE 624 -32 512 -32
WIRE 512 64 512 -32
WIRE 528 64 512 64
WIRE 48 80 48 -48
WIRE 48 80 32 80
WIRE 64 80 48 80
WIRE 624 80 624 -32
WIRE 624 80 592 80
WIRE 160 96 160 -48
WIRE 160 96 128 96
WIRE 464 96 432 96
WIRE 528 96 464 96
WIRE 64 112 48 112
WIRE 576 128 576 112
WIRE 48 144 48 112
WIRE 112 144 112 128
WIRE 544 144 544 112
WIRE 80 160 80 128
WIRE -64 256 -160 256
WIRE -160 288 -160 256
WIRE -32 336 -64 336
WIRE -160 416 -160 368
WIRE -64 416 -160 416
WIRE -160 432 -160 416
SYMBOL OpAmps\\ADA4805 560 80 R0
WINDOW 3 61 66 Left 2
SYMATTR InstName U2
SYMBOL res -80 320 R0
SYMATTR InstName R7
SYMATTR Value 1k
SYMBOL res 448 80 R0
SYMATTR InstName R4
SYMATTR Value 5k
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5k
SYMBOL res 160 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1000
SYMBOL res 720 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 50
SYMBOL voltage -160 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.5
SYMBOL OpAmps\\ADA4805 96 96 R0
WINDOW 3 61 66 Left 2
SYMATTR InstName U1
SYMBOL res 48 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL res -80 240 R0
SYMATTR InstName R6
SYMATTR Value 1k
SYMBOL voltage -272 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 -147 43 Left 2
WINDOW 3 -325 69 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V2
SYMATTR Value SINE(2.25 10u 10.7Meg)
FLAG 80 64 +4.5
FLAG 80 160 0
FLAG 112 144 +4.5
FLAG -160 432 0
FLAG -160 256 +4.5
FLAG 544 48 +4.5
FLAG 544 144 0
FLAG 576 128 +4.5
FLAG -272 368 0
FLAG -272 288 vin
FLAG -32 336 +2.25
FLAG 48 144 +2.25
FLAG 464 176 +2.25
FLAG -48 80 vin
FLAG 240 96 vout
TEXT -704 -144 Left 4 ;Measurement
TEXT -704 -104 Left 2 !.meas vout_max max V(vout)\n.meas vout_min min V(vout)\n.meas vout_vpp param vout_max-vout_min\n.meas vin_max max V(vin)\n.meas vin_min min V(vin)\n.meas vin_vpp param vin_max-vin_min\n.meas amp_gain PARAM -vout_vpp/vin_vpp
TEXT -706 456 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\18f69edacfe7_ahpf_gain_2nd.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N003 N001 Vp Vn 2+ OP27 ;pnba In+)In-)V+)V-)OUT
C1 N002 1+ 1n
R1 2+ N002 10k
V1 1+ 0 AC 1
V2 Vp 0 5
V3 Vn 0 -5
R2 2+ 0 10k
C2 N003 N002 1n
R3 N003 0 10k
R4 N001 0 1k
R5 2+ N001 9k
.ac dec 100 1k 500k
* Second-order Active High Pass Filter Circuit
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP27.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 496 32 448 32
WIRE 608 32 576 32
WIRE -112 112 -112 80
WIRE -16 112 -16 80
WIRE 528 160 528 144
WIRE 448 176 448 32
WIRE 496 176 448 176
WIRE 608 192 608 32
WIRE 608 192 560 192
WIRE 656 192 608 192
WIRE 672 192 656 192
WIRE 128 208 112 208
WIRE 208 208 128 208
WIRE 288 208 272 208
WIRE 304 208 288 208
WIRE 496 208 368 208
WIRE 656 208 656 192
WIRE -112 224 -112 192
WIRE -16 224 -16 192
WIRE 128 240 128 208
WIRE 448 240 448 176
WIRE 528 240 528 224
WIRE 368 272 368 208
WIRE 656 304 656 288
WIRE 128 336 128 320
WIRE 368 368 368 352
WIRE 448 368 448 320
WIRE 288 400 288 208
WIRE 464 400 288 400
WIRE 608 400 608 192
WIRE 608 400 544 400
FLAG 128 336 0
FLAG -112 224 0
FLAG -16 224 0
FLAG -112 80 Vp
IOPIN -112 80 In
FLAG -16 80 Vn
IOPIN -16 80 In
FLAG 528 144 Vp
IOPIN 528 144 In
FLAG 528 240 Vn
IOPIN 528 240 In
FLAG 656 304 0
FLAG 672 192 2+
IOPIN 672 192 In
FLAG 112 208 W1
IOPIN 112 208 In
FLAG 128 208 1+
IOPIN 128 208 In
FLAG 368 368 0
FLAG 448 368 0
SYMBOL Opamps\\OP27 528 128 R0
SYMATTR InstName U1
SYMBOL cap 272 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 560 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 128 224 R0
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL voltage -112 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -16 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL res 640 192 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL cap 368 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL res 352 256 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 432 224 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL res 592 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 9k
TEXT 0 376 Left 2 !.ac dec 100 1k 500k
TEXT 80 -56 Left 2 ;Second-order Active High Pass Filter Circuit
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1176-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1176-5.asy)
C2 N006 0 .01
V1 IN 0 10
R3 N005 N006 2.8K
D1 0 N001 1N5819
XU1 IN N004 0 OUT N003 N002 N005 N001 LT1176 top=2.8K bot=2.2K ;pnba Vin)Ilim)GND)Sense)_SHDN)Status)Vc)SW
C1 OUT 0 470 Rser=.1
Rload OUT 0 5
L1 N001 OUT 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
.lib LT1176.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2728 1608
WIRE 1792 1104 1504 1104
WIRE 1504 1120 1504 1104
WIRE 1792 1136 1792 1104
WIRE 2032 1136 1984 1136
WIRE 2096 1136 2032 1136
WIRE 2224 1136 2176 1136
WIRE 2288 1136 2224 1136
WIRE 2288 1152 2288 1136
WIRE 2032 1168 2032 1136
WIRE 1632 1200 1616 1200
WIRE 1984 1200 1984 1136
WIRE 1984 1200 1952 1200
WIRE 1504 1216 1504 1200
WIRE 2032 1248 2032 1232
WIRE 2288 1248 2288 1232
WIRE 1632 1280 1616 1280
WIRE 2224 1280 2224 1136
WIRE 2224 1280 1952 1280
WIRE 2224 1296 2224 1280
WIRE 1632 1360 1616 1360
WIRE 1968 1360 1952 1360
WIRE 2064 1360 2048 1360
WIRE 2144 1360 2128 1360
WIRE 2224 1376 2224 1360
WIRE 1792 1440 1792 1424
SYMBOL cap 2064 1376 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL PowerProducts\\LT1176-5 1792 1280 R0
SYMATTR InstName U1
SYMBOL polcap 2208 1296 R0
SYMATTR SpiceLine Rser=.1
SYMATTR InstName C1
SYMATTR Value 470
SYMBOL VOLTAGE 1504 1104 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL schottky 2016 1232 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMBOL ind 2080 1152 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMBOL res 2272 1136 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL res 1952 1376 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 2.8K
FLAG 1792 1440 0
FLAG 1504 1216 0
FLAG 2032 1248 0
FLAG 2224 1376 0
FLAG 2144 1360 0
FLAG 2288 1248 0
FLAG 2288 1136 OUT
FLAG 1504 1104 IN
TEXT 2024 1440 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX34406W.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX34406W.asy)
Rsense IN+ IN- 5m
Vcm IN+ 0 12
Rpu2 VDD SHTDN 10k
R1 OUT 0 1Meg
VDD VDD 0 5
VENA ENA 0 PWL(0 5 9m 5 +1n 0 +250u 0 +1n 5)
C1 OUT 0 100p
Iload IN- 0 PWL(0 1 1m 1 +1n 2.5 8m 2.5 +1n 1)
Ccdly CDLY 0 10n
XU1 IN+ IN- VDD 0 OUT OC ENA SHTDN CDLY MAX34406W ;pnba IN+)IN-)VDD)GND)OUT)OC)ENA)SHTDN)CDLY
Rpu1 VDD OC 10k
.tran 10m
.lib MAX34406W.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 -64 112 -64
WIRE 240 -64 208 -64
WIRE 416 -64 240 -64
WIRE 528 -64 416 -64
WIRE 112 -48 112 -64
WIRE 416 -32 416 -64
WIRE 528 -32 528 -64
WIRE 240 0 240 -64
WIRE 240 32 240 0
WIRE -336 64 -448 64
WIRE 112 64 -336 64
WIRE 144 64 112 64
WIRE -336 80 -336 64
WIRE 368 80 336 80
WIRE 416 80 416 48
WIRE 416 80 368 80
WIRE 384 128 336 128
WIRE 528 128 528 48
WIRE 528 128 384 128
WIRE -336 176 -336 160
WIRE 112 176 -336 176
WIRE 144 176 112 176
WIRE 368 176 336 176
WIRE 528 176 368 176
WIRE 640 176 528 176
WIRE -448 208 -448 64
WIRE -336 208 -336 176
WIRE 528 208 528 176
WIRE 112 224 -48 224
WIRE 144 224 112 224
WIRE 640 224 640 176
WIRE 112 272 64 272
WIRE 144 272 112 272
WIRE 528 304 528 288
WIRE 640 304 640 288
WIRE 240 320 240 304
WIRE -448 352 -448 288
WIRE -336 352 -336 288
WIRE -336 352 -448 352
WIRE 64 352 64 272
WIRE -448 368 -448 352
WIRE -48 368 -48 224
WIRE -48 448 -48 432
WIRE 64 448 64 432
SYMBOL MAX34406W 240 176 R0
WINDOW 0 78 -152 Bottom 2
WINDOW 3 107 136 Top 2
SYMATTR InstName U1
SYMBOL res -352 64 R0
SYMATTR InstName Rsense
SYMATTR Value 5m
SYMBOL voltage 64 336 R0
SYMATTR InstName VENA
SYMATTR Value PWL(0 5 9m 5 +1n 0 +250u 0 +1n 5)
SYMBOL cap 624 224 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL voltage -448 192 R0
SYMATTR InstName Vcm
SYMATTR Value 12
SYMBOL res 400 -48 R0
SYMATTR InstName Rpu1
SYMATTR Value 10k
SYMBOL res 512 192 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL voltage 224 -64 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL cap -64 368 R0
SYMATTR InstName Ccdly
SYMATTR Value 10n
SYMBOL current -336 208 R0
WINDOW 123 24 106 Left 2
SYMATTR Value2 8m 2.5 +1n 1)
SYMATTR InstName Iload
SYMATTR Value PWL(0 1 1m 1 +1n 2.5
SYMBOL res 512 -48 R0
SYMATTR InstName Rpu2
SYMATTR Value 10k
FLAG 240 320 0
FLAG -48 448 0
FLAG 528 304 0
FLAG 640 304 0
FLAG 368 176 OUT
FLAG 384 128 SHTDN
FLAG 368 80 OC
FLAG 112 -48 0
FLAG 240 0 VDD
FLAG -448 368 0
FLAG 112 224 CDLY
FLAG 64 448 0
FLAG 112 64 IN+
FLAG 112 176 IN-
FLAG 112 272 ENA
TEXT -496 472 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL83200.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL83200.asy)
R1 OUT N004 470K
V1 N002 0 PWL(0 0 20u 5)
MQ1 N002 N003 OUT OUT FDC638P
XU1 N002 0 0 N004 N003 OUT ADPL83200 ;pnba VIN)GND)CTL)STAT)GATE)SENSE
V2 N001 0 PWL(0 0 1 7)
D1 N001 OUT 1N5819
Rload OUT 0 100
C1 OUT 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 1 100u
.lib ADPL83200.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2500 1444
WIRE 1760 1024 1216 1024
WIRE 2064 1024 1824 1024
WIRE 1216 1040 1216 1024
WIRE 1936 1104 1408 1104
WIRE 2064 1104 2064 1024
WIRE 2064 1104 2032 1104
WIRE 2112 1104 2064 1104
WIRE 2240 1104 2112 1104
WIRE 2336 1104 2240 1104
WIRE 2240 1120 2240 1104
WIRE 2336 1120 2336 1104
WIRE 1216 1136 1216 1120
WIRE 2112 1184 2112 1104
WIRE 1408 1216 1408 1104
WIRE 1680 1216 1408 1216
WIRE 2064 1216 2064 1104
WIRE 2064 1216 1936 1216
WIRE 2240 1216 2240 1184
WIRE 2336 1216 2336 1200
WIRE 1408 1232 1408 1216
WIRE 1680 1296 1648 1296
WIRE 2016 1296 2016 1152
WIRE 2016 1296 1936 1296
WIRE 1408 1328 1408 1312
WIRE 1680 1376 1648 1376
WIRE 2112 1376 2112 1264
WIRE 2112 1376 1936 1376
SYMBOL voltage 1216 1024 R0
SYMATTR InstName V2
SYMATTR Value PWL(0 0 1 7)
SYMBOL PMOS 1936 1152 R270
WINDOW 0 90 48 VCenter 2
WINDOW 3 63 45 VCenter 2
SYMATTR InstName Q1
SYMATTR Value FDC638P
SYMBOL schottky 1760 1040 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMBOL RES 2096 1168 R0
SYMATTR InstName R1
SYMATTR Value 470K
SYMBOL VOLTAGE 1408 1216 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 20u 5)
SYMBOL cap 2224 1120 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ADPL83200 1808 1296 R0
SYMATTR InstName U1
SYMBOL res 2320 1104 R0
SYMATTR InstName Rload
SYMATTR Value 100
FLAG 1648 1376 0
FLAG 1648 1296 0
FLAG 2240 1216 0
FLAG 2336 1216 0
FLAG 1408 1328 0
FLAG 1216 1136 0
FLAG 2336 1104 OUT
TEXT 2176 1408 Left 2 !.tran 0 1 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\2d86b6a033bc_Lab_02_Part_01_-_20101569.asc
* Generated by LTspice 26.0.1 for Windows.
D1 B 0 D
R1 A B 1k
V1 A 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 15 0.001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 96 80 96
WIRE 320 96 256 96
WIRE 320 144 320 96
WIRE 80 160 80 96
WIRE 80 288 80 240
WIRE 208 288 80 288
WIRE 320 288 320 208
WIRE 320 288 208 288
WIRE 208 320 208 288
FLAG 208 320 0
FLAG 80 96 A
FLAG 320 96 B
SYMBOL diode 304 144 R0
SYMATTR InstName D1
SYMBOL res 160 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 80 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
TEXT 360 104 Left 2 !.dc V1 0 15 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\030d15d29b17_lab5_task2.asc
* Generated by LTspice 26.0.1 for Windows.
Vcc1 N001 0 5
Vi1 N002 0 PULSE(5 0 0 50n 50n 500u 1m)
Rc1 P001 0 1k
M1 P001 N003 N001 N001 BSS84
Rb1 N003 N002 4.7k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 5m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1040 680
WIRE 416 -144 416 -176
WIRE 416 64 416 -64
WIRE 32 80 -16 80
WIRE 240 80 112 80
WIRE 368 80 320 80
WIRE 416 272 416 240
FLAG 416 272 0
FLAG -16 80 0
FLAG 416 -176 0
SYMBOL voltage 416 -48 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 24 68 Left 2
SYMATTR InstName Vcc1
SYMATTR Value 5
SYMBOL voltage 128 80 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vi1
SYMATTR Value PULSE(5 0 0 50n 50n 500u 1m)
SYMBOL res 400 144 R0
SYMATTR InstName Rc1
SYMATTR Value 1k
SYMBOL pmos 368 160 M180
SYMATTR InstName M1
SYMATTR Value BSS84
SYMBOL res 336 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rb1
SYMATTR Value 4.7k
TEXT -72 376 Left 2 !.tran 0 5m