Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\16ad00035207_linear_inductor.asc
* Generated by LTspice 26.0.1 for Windows.
* G1, C1, E1 models volt-seconds\n applied to inductor
* F1, V1 reflects current resulting\n from applied volt-seconds
* R1 models linear inductance\n with unity gain: L = C1*R1
* V1 senses current drawn by\n applied volt-seconds
* Generalized Impedance Converter Based Linear Inductor Model
* L1: the reference standard\n (compare its current to that\n of the various models)
F1 1 0 V1 1
R1 3 0 1m
C1 2 0 1
V1 N001 3 0
G1 0 2 1 0 1
Vs 1 0 PULSE(-1 1 1m .1u .1u 2m 4m)
L1 1 0 1m
E1 N001 0 2 0 1
.tran 0 10m 1u uic
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1044 680
WIRE -112 -80 -112 -112
WIRE -112 32 -112 0
WIRE -160 -64 -160 -112
WIRE -160 -112 -240 -112
WIRE -304 -112 -304 -80
WIRE -304 0 -304 32
WIRE -160 -16 -160 32
WIRE -240 32 -240 -16
WIRE -240 -80 -240 -112
WIRE -240 -112 -272 -112
WIRE -352 -16 -352 32
WIRE -352 -112 -432 -112
WIRE -352 -112 -352 -64
WIRE -432 -112 -576 -112
WIRE -432 32 -432 0
WIRE -432 -80 -432 -112
WIRE -640 32 -640 0
WIRE -640 -80 -640 -112
WIRE -608 -112 -640 -112
WIRE 48 -112 48 -80
WIRE 48 0 48 32
WIRE 48 -112 16 -112
WIRE -112 -112 -64 -112
WIRE 48 -112 80 -112
WIRE -272 -112 -304 -112
WIRE 80 -112 96 -112
WIRE -576 -112 -576 -80
WIRE -576 0 -576 32
WIRE -576 -112 -608 -112
LINE Normal -96 -160 -288 -160 2
LINE Normal -64 -144 -96 -160 2
LINE Normal -320 -144 -288 -160 2
LINE Normal -384 -80 -320 -144 2
SYMBOL g -304 -96 R0
WINDOW 0 16 16 Left 0
WINDOW 3 16 96 Left 0
SYMATTR InstName G1
SYMATTR Value 1
SYMBOL ind -560 -96 M0
WINDOW 0 0 16 Right 0
WINDOW 3 0 96 Right 0
SYMATTR InstName L1
SYMATTR Value 1m
SYMBOL voltage -80 -112 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 Invisible 0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL res 32 -96 R0
WINDOW 0 32 16 Left 0
WINDOW 3 32 96 Left 0
SYMATTR InstName R1
SYMATTR Value 1m
SYMBOL e -112 -96 R0
WINDOW 0 16 16 Left 0
WINDOW 3 16 96 Left 0
SYMATTR InstName E1
SYMATTR Value 1
SYMBOL voltage -640 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 48 72 Left 0
WINDOW 3 -48 176 Left 0
WINDOW 0 -42 57 Right 0
SYMATTR Value PULSE(-1 1 1m .1u .1u 2m 4m)
SYMATTR InstName Vs
SYMBOL f -432 -80 R0
WINDOW 0 16 0 Left 0
WINDOW 3 40 41 Left 0
WINDOW 123 16 80 Left 0
SYMATTR InstName F1
SYMATTR Value V1
SYMATTR Value2 1
SYMBOL cap -256 -80 R0
WINDOW 0 32 0 Left 0
WINDOW 3 32 80 Left 0
SYMATTR InstName C1
SYMATTR Value 1
FLAG -272 -112 2
FLAG -640 32 0
FLAG -608 -112 1
FLAG -304 32 0
FLAG -240 32 0
FLAG -160 32 0
FLAG -112 32 0
FLAG 48 32 0
FLAG 80 -112 3
FLAG -576 32 0
FLAG -432 32 0
FLAG -352 32 0
TEXT -688 -160 Left 0 !.tran 0 10m 1u uic
TEXT -248 -192 VLeft 0 ;G1, C1, E1 models volt-seconds\n applied to inductor
TEXT -432 -192 VLeft 0 ;F1, V1 reflects current resulting\n from applied volt-seconds
TEXT 56 -192 VLeft 0 ;R1 models linear inductance\n with unity gain: L = C1*R1
TEXT -56 -192 VLeft 0 ;V1 senses current drawn by\n applied volt-seconds
TEXT -296 -624 Bottom 0 ;Generalized Impedance Converter Based Linear Inductor Model
TEXT -592 -192 VLeft 0 ;L1: the reference standard\n (compare its current to that\n of the various models)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1634-1.25.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1634-1.25.asy)
XU1 N002 0 LT1634-1.25 ;pnba VCC)VEE
R1 N001 N002 150K
V1 N001 0 3
.dc temp -40 80 .1
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 144 48 144
WIRE 272 144 208 144
WIRE 48 160 48 144
WIRE 272 176 272 144
WIRE 48 256 48 240
WIRE 272 256 272 240
SYMBOL References\\LT1634-1.25 272 208 R0
SYMATTR InstName U1
SYMBOL voltage 48 144 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res 112 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 150K
FLAG 272 256 0
FLAG 48 256 0
TEXT 72 312 Left 2 !.dc temp -40 80 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\19e763b97f90_RHV-FR.asc
* Generated by LTspice 26.0.1 for Windows.
V1 a 0 SINE(0 6 200K)
D1 a b RBR5L30A
R1 b 0 1000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 20u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -256 112 -288 112
WIRE -112 112 -256 112
WIRE 80 112 -48 112
WIRE 96 112 80 112
WIRE -288 192 -288 112
WIRE 96 192 96 112
WIRE -288 352 -288 272
WIRE -80 352 -288 352
WIRE 96 352 96 272
WIRE 96 352 -80 352
WIRE -80 368 -80 352
SYMBOL Misc\\EuropeanResistor 80 176 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL schottky -112 128 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value RBR5L30A
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL Misc\\signal -288 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 6 200K)
FLAG -80 368 0
FLAG -256 112 a
FLAG 80 112 b
TEXT -288 376 Left 2 !.tran 20u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL42005-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 8
C1 OUT 0 2.2 Rser=1.5m
Rload OUT 0 10
R1 OUT N001 100k
XU1 IN OUT IN N001 OUT 0 ADPL42005-5.0 ;pnba Vin)Sense)EN)PG)Vout)GND
.tran 3m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL42005-5.0.asy)
.lib ADPL42005-5.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -16 48 -16 32
WIRE 384 128 352 128
WIRE 464 128 464 32
WIRE 464 128 384 128
WIRE 560 128 464 128
WIRE -16 144 -16 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 384 224 384 128
WIRE 384 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -16 144 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -16 32 IN
FLAG 560 128 OUT
SYMBOL voltage -16 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 25 97 Left 2
SYMATTR Value 8
SYMATTR InstName V1
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL ADPL42005-5.0 224 128 R0
SYMATTR InstName U1
TEXT 432 296 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\5477e066bb30_Assignment_4b__vi_.asc
* Generated by LTspice 26.0.1 for Windows.
* Full Wave Rectifier (Diode Bridge) (with 10microF Capacitor) (Practical)
C1 N001 N003 0.00001
D4 N003 N002 1N4148
D1 0 N001 1N4148
D3 N002 N001 1N4148
V1 0 N002 SINE(0 10 1000) Rser=0.001
D2 N003 0 1N4148
R1 N001 N003 1000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5ms
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 448 64 144 64
WIRE 592 64 448 64
WIRE 144 80 144 64
WIRE 144 80 -16 80
WIRE 304 80 144 80
WIRE 304 112 304 80
WIRE -16 128 -16 80
WIRE 448 192 448 64
WIRE 592 208 592 64
WIRE -16 240 -16 192
WIRE 64 240 -16 240
WIRE 144 240 64 240
WIRE 304 240 304 176
WIRE 304 240 224 240
WIRE 64 272 64 240
WIRE 304 272 304 240
WIRE -16 288 -16 240
WIRE -16 384 -16 352
WIRE 144 384 -16 384
WIRE 304 384 304 336
WIRE 304 384 144 384
WIRE 144 400 144 384
WIRE 448 400 448 272
WIRE 448 400 144 400
WIRE 592 400 592 272
WIRE 592 400 448 400
SYMBOL diode 0 352 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL cap 576 208 R0
SYMATTR InstName C1
SYMATTR Value 0.00001
SYMBOL diode 320 336 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL voltage 128 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 -60 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10 1000)
SYMATTR SpiceLine Rser=0.001
SYMBOL diode 320 176 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL res 432 176 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL diode 0 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG 64 272 0
TEXT -16 424 Left 2 !.tran 5ms
TEXT -112 24 Left 2 ;Full Wave Rectifier (Diode Bridge) (with 10microF Capacitor) (Practical)
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8310.asc
* Generated by LTspice 26.0.1 for Windows.
* RF Signal Generator
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8310.asy)
C4 N006 0 10p
C1 INHI N004 10n
C3 N005 0 10p
V4 N002 0 5
R3 vOUT 0 10Meg
R2 N003 N004 50
V1 N003 0 SINE(0 {2*pow(10,dBV/20)} {fin})
XU1 INLO 0 N006 vOUT N001 N005 N002 INHI AD8310 ;pnba INLO)COMM)OFLT)VOUT)VPOS)BFIN)ENBL)INHI
R1 N004 0 52.3
V3 N001 0 5
C2 INLO 0 10n
.tran 400n
.param fin=1e8
.param dBV 10
.lib AD8310.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 7424 924
WIRE 2736 -1200 2256 -1200
WIRE 2736 -1104 2736 -1200
WIRE 2816 -1104 2736 -1104
WIRE 3472 -1104 3136 -1104
WIRE 3472 -1072 3472 -1104
WIRE 2432 -1056 2368 -1056
WIRE 2592 -1056 2512 -1056
WIRE 2640 -1056 2592 -1056
WIRE 2736 -1056 2704 -1056
WIRE 2256 -1008 2256 -1200
WIRE 2368 -1008 2368 -1056
WIRE 2592 -1008 2592 -1056
WIRE 2736 -1008 2736 -1056
WIRE 2768 -1008 2736 -1008
WIRE 2816 -1008 2768 -1008
WIRE 3376 -1008 3136 -1008
WIRE 3376 -960 3376 -1008
WIRE 3472 -960 3472 -992
WIRE 2768 -912 2736 -912
WIRE 2816 -912 2768 -912
WIRE 3200 -912 3136 -912
WIRE 3296 -912 3200 -912
WIRE 2256 -880 2256 -928
WIRE 2368 -864 2368 -928
WIRE 2432 -864 2368 -864
WIRE 2592 -864 2592 -928
WIRE 2592 -864 2432 -864
WIRE 2640 -864 2592 -864
WIRE 2736 -864 2736 -912
WIRE 2736 -864 2704 -864
WIRE 3296 -864 3296 -912
WIRE 3376 -864 3376 -896
WIRE 2432 -832 2432 -864
WIRE 2816 -816 2784 -816
WIRE 3216 -816 3136 -816
WIRE 3216 -784 3216 -816
WIRE 3296 -768 3296 -784
WIRE 3216 -688 3216 -720
RECTANGLE Normal 2528 -800 2320 -1120 2
SYMBOL voltage 2368 -1024 R0
WINDOW 3 -143 259 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 {2*pow(10,dBV/20)} {fin})
SYMATTR InstName V1
SYMBOL cap 3200 -784 R0
SYMATTR InstName C4
SYMATTR Value 10p
SYMBOL res 3280 -880 R0
SYMATTR InstName R3
SYMATTR Value 10Meg
SYMBOL cap 2704 -1072 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap 3360 -960 R0
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL voltage 2256 -1024 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage 3472 -1088 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL res 2416 -1040 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL cap 2704 -880 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 2576 -1024 R0
SYMATTR InstName R1
SYMATTR Value 52.3
SYMBOL AD8310 2976 -960 R0
SYMATTR InstName U1
FLAG 3200 -912 vOUT
FLAG 2784 -816 0
FLAG 3472 -960 0
FLAG 2432 -832 0
FLAG 3296 -768 0
FLAG 3376 -864 0
FLAG 3216 -688 0
FLAG 2256 -880 0
FLAG 2768 -1008 INHI
FLAG 2768 -912 INLO
TEXT 2896 -696 Left 2 !.tran 400n
TEXT 2312 -1136 Left 2 ;RF Signal Generator
TEXT 2576 -720 Left 2 !.param fin=1e8\n.param dBV 10
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1172HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1172HV.asy)
D1 N001 OUT MBRS360
C3 N004 0 1
R1 OUT N002 10.7K
L1 IN N001 150 Rser=0.02 Rpar=5000
XU1 N003 N002 0 N001 IN LT1172 ;pnba Vc)FB)GND)SW)Vin
R3 N003 N004 1K
Rload OUT 0 24
R2 N002 0 1.24K
C1 OUT 0 500 Rser=0.05
V1 IN 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 25m startup
.lib LT1172.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2824 1472
WIRE 1824 880 1616 880
WIRE 1872 880 1824 880
WIRE 1984 880 1952 880
WIRE 2032 880 1984 880
WIRE 2176 880 2096 880
WIRE 2304 880 2176 880
WIRE 2432 880 2304 880
WIRE 1616 896 1616 880
WIRE 2304 896 2304 880
WIRE 2432 896 2432 880
WIRE 2176 928 2176 880
WIRE 1824 944 1824 880
WIRE 1616 992 1616 976
WIRE 2304 992 2304 960
WIRE 2432 992 2432 976
WIRE 1984 1024 1984 880
WIRE 1984 1024 1952 1024
WIRE 2176 1088 2176 1008
WIRE 2176 1088 1952 1088
WIRE 2176 1104 2176 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2176 1200 2176 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
SYMBOL VOLTAGE 1616 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 2160 1088 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL IND 1856 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL RES 2416 880 R0
SYMATTR InstName Rload
SYMATTR Value 24
SYMBOL polcap 2288 896 R0
SYMATTR InstName C1
SYMATTR Value 500
SYMATTR SpiceLine Rser=0.05
SYMBOL schottky 2032 896 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL PowerProducts\\LT1172HV 1824 1088 R0
SYMATTR InstName U1
SYMBOL RES 2160 912 R0
SYMATTR InstName R1
SYMATTR Value 10.7K
FLAG 2432 880 OUT
FLAG 2176 1200 0
FLAG 2304 992 0
FLAG 2432 992 0
FLAG 2064 1248 0
FLAG 1824 1248 0
FLAG 1616 992 0
FLAG 1616 880 IN
TEXT 2184 1248 Left 2 !.tran 25m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\927906c99306_Transistor-beta.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Ic/Ib to find beta
* Transistor's beta
V1 Vcc 0 5
R1 Vcc N001 1
Q1 N001 N002 0 0 2N3904
I1 0 N002 {A}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.step PARAM A 1m 200m 1m
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 976 680
WIRE 160 96 160 64
WIRE 96 144 64 144
WIRE 160 208 160 192
SYMBOL current -16 144 R270
WINDOW 0 32 40 VTop 2
WINDOW 3 -32 40 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value {A}
SYMBOL voltage 304 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL npn 96 96 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 144 -32 R0
SYMATTR InstName R1
SYMATTR Value 1
FLAG 160 -16 Vcc
FLAG 304 80 Vcc
FLAG -16 144 0
FLAG 160 208 0
FLAG 304 160 0
TEXT 456 56 Left 2 !.step PARAM A 1m 200m 1m
TEXT 264 0 Left 2 !.op
TEXT 456 96 Left 2 ;Plot Ic/Ib to find beta
TEXT 176 -128 Left 4 ;Transistor's beta
* Z:\tmp\asc_dec_bjh7r6w2\18f69edacfe7_ahpf_gain_2nd_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R1 2+ N003 10k
R2 2+ 0 10k
C2 N004 N003 1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 496 32 448 32
WIRE 608 32 576 32
WIRE 528 160 528 144
WIRE 448 176 448 32
WIRE 496 176 448 176
WIRE 608 192 608 32
WIRE 608 192 560 192
WIRE 656 192 608 192
WIRE 672 192 656 192
WIRE 208 208 128 208
WIRE 288 208 272 208
WIRE 304 208 288 208
WIRE 496 208 368 208
WIRE 656 208 656 192
WIRE 448 240 448 176
WIRE 528 240 528 224
WIRE 368 272 368 208
WIRE 656 304 656 288
WIRE 368 368 368 352
WIRE 448 368 448 320
WIRE 288 400 288 208
WIRE 464 400 288 400
WIRE 608 400 608 192
WIRE 608 400 544 400
SYMBOL res 560 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 640 192 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL cap 368 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
FLAG 528 144 Vp
FLAG 528 240 Vn
FLAG 656 304 0
FLAG 672 192 2+
FLAG 368 368 0
FLAG 448 368 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1572.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1572.asy)
R1 OUT N004 10.7K
C2 N002 0 1
L1 IN N001 150 Rser=0.02 Rpar=5000
C1 OUT 0 100 Rser=0.05
XU1 N003 N004 0 N001 IN N001 OUT LT1572 ;pnba Vc)FB)GND)SW)Vin)Anode)Cathode
V1 IN 0 5
R3 N003 N002 1K
R2 N004 0 1.24K
Rload OUT 0 25
.tran 15m startup
.lib LT1572.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2608 1416
WIRE 1712 880 1552 880
WIRE 1728 880 1712 880
WIRE 1824 880 1808 880
WIRE 1936 880 1824 880
WIRE 1552 896 1552 880
WIRE 1712 944 1712 880
WIRE 1824 944 1824 880
WIRE 1936 944 1936 880
WIRE 1552 992 1552 976
WIRE 2048 1024 2000 1024
WIRE 2176 1024 2048 1024
WIRE 2288 1024 2176 1024
WIRE 2048 1040 2048 1024
WIRE 2176 1040 2176 1024
WIRE 2288 1040 2288 1024
WIRE 1552 1088 1520 1088
WIRE 1648 1088 1632 1088
WIRE 1520 1104 1520 1088
WIRE 2176 1136 2176 1104
WIRE 2288 1136 2288 1120
WIRE 2048 1152 2048 1120
WIRE 2048 1152 2000 1152
WIRE 2048 1168 2048 1152
WIRE 1520 1184 1520 1168
WIRE 2048 1264 2048 1248
WIRE 1824 1280 1824 1232
SYMBOL IND 1712 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL polcap 2160 1040 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.05
SYMBOL POWERPRODUCTS\\LT1572 1824 1088 R0
WINDOW 3 8 168 Left 2
SYMATTR InstName U1
SYMBOL RES 2032 1024 R0
SYMATTR InstName R1
SYMATTR Value 10.7K
SYMBOL RES 1648 1072 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL CAP 1504 1104 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL VOLTAGE 1552 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 2272 1024 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL RES 2032 1152 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
FLAG 2288 1024 OUT
FLAG 2048 1264 0
FLAG 2176 1136 0
FLAG 2288 1136 0
FLAG 1520 1184 0
FLAG 1824 1280 0
FLAG 1552 992 0
FLAG 1552 880 IN
TEXT 2192 1208 Left 2 !.tran 15m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1077.asc
* Generated by LTspice 26.0.1 for Windows.
* Half-Wave Rectifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1077.asy)
V1 +V 0 3
R3 N002 0 1Meg
R2 N001 IN 1Meg
XU1 N002 N001 +V 0 OUT LT1078 ;pnba In+)In-)V+)V-)OUT
R1 OUT N001 2Meg
V3 IN 0 SINE(0 1 100)
.tran .1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -96 96 -128 96
WIRE 16 96 -16 96
WIRE 48 96 16 96
WIRE 144 96 128 96
WIRE 160 96 144 96
WIRE 256 96 240 96
WIRE 192 208 192 192
WIRE 144 224 144 96
WIRE 160 224 144 224
WIRE -96 240 -96 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 288 240 256 240
WIRE 64 256 48 256
WIRE 160 256 144 256
WIRE 192 288 192 272
WIRE -96 336 -96 320
SYMBOL res 144 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2Meg
SYMBOL voltage 0 96 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
SYMBOL voltage -96 224 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL opamps\\LT1077 192 176 R0
SYMATTR InstName U1
SYMBOL res 160 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1Meg
FLAG -96 336 0
FLAG 192 192 +V
FLAG -96 224 +V
FLAG -128 96 0
FLAG 48 256 0
FLAG 192 288 0
FLAG 16 96 IN
FLAG 288 240 OUT
TEXT 296 320 Left 2 !.tran .1
TEXT 152 32 Bottom 2 ;Half-Wave Rectifier
* Z:\home\khalils\Downloads\files\data\raw_asc\25f551acc60f_R6.asc
* Generated by LTspice 26.0.1 for Windows.
vout out 0
vinN N001 0 -1.342774
vss vss 0 -2.5
M_N out N001 vss vss N_1u l={Ln2} w={Wn2}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc cmosedu_models.txt
.dc vout -2.5 2.5 0.0001
.meas id_n_1 FIND Id(M_N) AT 0.78022277+0.2
.meas id_n_2 FIND Id(M_N) AT 0.78022277-0.2
.param Wp=49.992332u Lp=49.986531u Wp2=49.998294u Lp2=9.069192u Wn=41.548244u Ln=47.775368u Wn2=49.906981u Ln2=28.964298u C=0.100001p Iref=10892.687537n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2140 680
WIRE 928 -112 928 -160
WIRE 1008 -64 928 -64
WIRE 880 -32 752 -32
WIRE 416 -16 416 -48
WIRE 576 -16 576 -48
WIRE 752 -16 752 -32
WIRE 1008 -16 1008 -64
WIRE 1008 -16 928 -16
WIRE 928 48 928 -16
WIRE 416 128 416 64
WIRE 576 128 576 64
WIRE 752 128 752 64
SYMBOL nmos4 880 -112 R0
SYMATTR InstName M_N
SYMATTR Value N_1u
SYMATTR Value2 l={Ln2} w={Wn2}
SYMBOL voltage 576 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 22 98 Left 2
SYMATTR Value -2.5
SYMATTR InstName vss
SYMBOL voltage 416 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 25 97 Left 2
SYMATTR Value ""
SYMATTR InstName vout
SYMBOL voltage 752 -32 R0
WINDOW 3 26 91 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value -1.342774
SYMATTR InstName vinN
FLAG 752 128 0
FLAG 576 -48 vss
FLAG 576 128 0
FLAG 928 -160 out
FLAG 416 128 0
FLAG 416 -48 out
FLAG 928 48 vss
TEXT 384 208 Left 2 !.inc cmosedu_models.txt
TEXT 384 264 Left 2 !.dc vout -2.5 2.5 0.0001
TEXT 384 160 Left 2 !.meas id_n_1 FIND Id(M_N) AT 0.78022277+0.2
TEXT 384 184 Left 2 !.meas id_n_2 FIND Id(M_N) AT 0.78022277-0.2
TEXT -56 240 Left 2 !.param Wp=49.992332u Lp=49.986531u Wp2=49.998294u Lp2=9.069192u Wn=41.548244u Ln=47.775368u Wn2=49.906981u Ln2=28.964298u C=0.100001p Iref=10892.687537n