* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3882.asc
* Generated by LTspice 26.0.1 for Windows.
* Please read the following notes carefully, since the model presents different user interface\nthan the real part does.\n \n(1) All PMBus communication and memory address related functions and pins are not modeled. \n \n(2) Changes to all parameter values during the simulation running will not be in effect, unless the\nsimulation is stopped and restarted. This is different from the operation of the part, which will\n respond to the commanded changes while running. \n \n(3) Share_clk is not modeled. The default time reference of LTspice is used as the common time \nbase for all time related parameters.\n \n(4) The following parameters can be defined, by right-clicking the symbol of LTC3882. Different \nnomenclature from the datasheet is adopted here. If any value of these parameters are set beyond \nthe scope discribed in the datasheet, the resulting simulation outcomes are not meaningful.\n \n Freq -- in Hz, sets switching frequency as one of values of 250K, 300K, 350K, \n 400K, 450K, 500K, 600K, 750K, 900K, 1000K, 1250K. FREQ_CFG pin needs to float \n (or short to VDD25), to make the value be in effect;\n PHAS_0 & PHAS_1 -- in degree, set phase angle related to SYNC signal. \n Certain combinations are restricted as in datasheet. PHAS_CFG \n pin needs to float (or short to VDD25), to make the value be in effect;\n Ton0_delay & Ton0_rise; Ton1_delay & Ton1_rise -- in sec, set delay and soft-start timers for \n channel0 and channel1. Initialization time is not modeled;\n Toff0_delay & Toff0_fall; Toff1_delay & Toff1_fall -- in sec, set delay and soft-off timers for \n channel0 and channel1;\n Vout_0 & Vout_1 -- in volt, set output voltages respectively. Vout#_CFG pin needs to float \n (or short to VDD25), to make the value be in effect;\n Vout0_range & Vout1_range -- set maximum output range, with value 0\n for 5.5V; value 1 for 2.75V;\n Iout0_fault & Iout1_fault -- in Amper, set maximum inductor peak current value, OC will be triggered \n when the value is exceeded;\n Iout0_warn & Iout1_warn -- in aMper, set the average load current maximum value, which will be used \n with Vout#_AVP to define the AVP operation;\n Iout0_gain & Iout1_gain -- in Ohm, set sensing resistor or inductor DCR values used in the circuit;\n Vout0_AVP & Vout1_AVP -- set the maximum value reference will reduce at Iout#_warn level:\n PWM0_Protocol & PWM1_Protocol-- sets TG/BG output rules: 0 for 3-state PWM output; 1 for 2-state PWM output with active-high EN;\n 2 for 2-state PWM output with active-low open drain disable; 4 for indenpendent TG/BG outputs.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3882.asy)
* Library below included based on ModelFile attribute of instance XU1, XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4449.asy)
R4 N007 N015 3.09K
MQ4 N007 N013 0 0 AOB2140L
C9 N020 0 100p
C5 N017 N019 11p
D2 N005 N006 1N5818
Rload OUT 0 82.5m
C4 N004 N003 .22
C10 N001 0 2.2
MQ3 IN N009 N007 N007 SIJA72ADP
XU3 MP_03 MP_04 N009 N007 N013 0 N011 N001 N005 N006 LTC4449 ;pnba ))TG)TS)BG)GND)IN)Vlogic)Vcc)Boost
D1 N005 N004 1N5818
V2 N005 0 5
MQ1 IN N008 N003 N003 SIJA72ADP
V1 IN 0 32
C8 N018 N019 270p
R5 OUT N016 1.07k
XU2 N019 N017 OUT 0 NC_05 NC_06 N020 OUT N017 N001 0 NC_07 N002 N021 NC_08 MP_09 NC_10 N010 N005 MP_11 0 N014 OUT OUT N015 N001 MP_12 N005 N011 NC_13 MP_14 N020 MP_15 IN MP_16 N005 LTC3882 Vout_0=1 Vout_1=1 Iout0_fault=29.75 Iout1_fault=29.75 Iout0_warn=20 Iout1_warn=20 Iout0_gain=1m Iout1_gain=1m Vout0_AVP=0 Vout1_AVP=1 PWM0_Protocol=0 PWM1_Protocol=0 Freq=500K PHAS_0=0 PHAS_1=180 Ton0_delay=.3m Ton0_rise=.5m Ton1_delay=.3m Ton1_rise=.5m Toff0_delay=.2m Toff0_fall=.3m Toff1_delay=.2m Toff1_fall=.3m Vout0_rng=0 Vout1_rng=0 ;pnba FB0)COMP0)Vsense0+)Vsense0-)Vout0_cfg)Vout1_cfg)Iavg0)Vsense1+)COMP1)FB1)Iavg_gnd)Freq_cfg)SYNC)VDD25)PHAS_cfg))BG1/EN1)TG1/PWM1)Run1))GND)Isense1+)Isense1-)Isense0-)Isense0+)VDD33))Run0)TG0/PWM0)BG0/EN0))Iavg1))Vinsns))Vcc
R3 N018 N017 100k
C3 OUT 0 100 X2 Rser=3m
R2 N002 N001 2K
L1 N003 OUT .2 Rser=.3m Rpar=5K
C6 N015 OUT .22
L2 N007 OUT .2 Rser=.3m Rpar=5K
C11 N021 0 1
R1 N003 N014 3.09K
C7 N006 N007 .22
C12 N016 N019 200p
XU1 MP_01 MP_02 N008 N003 N012 0 N010 N001 N005 N004 LTC4449 ;pnba ))TG)TS)BG)GND)IN)Vlogic)Vcc)Boost
MQ2 N003 N012 0 0 AOB2140L
C1 N014 OUT .22
C2 OUT 0 470 X4 Rser=25m
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m startup
.lib LTC3882.sub
.lib LTC4449.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3380 996
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WIRE 384 832 256 832
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WIRE -32 928 -32 912
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SYMBOL res 1440 -224 R0
SYMATTR InstName Rload
SYMATTR Value 82.5m
SYMBOL nmos 832 -224 R0
SYMATTR InstName Q4
SYMATTR Value AOB2140L
SYMBOL schottky -320 -432 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N5818
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL nmos -608 -384 M0
SYMATTR InstName Q1
SYMATTR Value SIJA72ADP
SYMBOL res 528 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 720 208 R0
SYMATTR InstName R5
SYMATTR Value 1.07k
SYMBOL res 528 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 3.09K
SYMBOL cap 352 384 R0
SYMATTR InstName C5
SYMATTR Value 11p
SYMBOL ind 1056 -208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value .2
SYMATTR SpiceLine Rser=.3m Rpar=5K
SYMBOL PowerProducts\\LTC4449 -448 -224 M0
SYMATTR InstName U1
SYMBOL cap 720 -432 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C7
SYMATTR Value .22
SYMBOL cap 368 720 R0
SYMATTR InstName C9
SYMATTR Value 100p
SYMBOL cap -480 -432 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value .22
SYMBOL PowerProducts\\LTC4449 672 -224 R0
SYMATTR InstName U3
SYMBOL cap -48 848 R0
SYMATTR InstName C10
SYMATTR Value 2.2
SYMBOL res -320 0 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 3.09K
SYMBOL cap -192 0 R0
SYMATTR InstName C1
SYMATTR Value .22
SYMBOL cap 1328 -208 R0
WINDOW 123 21 69 Left 2
WINDOW 3 44 37 Left 2
SYMATTR Value2 X2
SYMATTR Value 100
SYMATTR InstName C3
SYMATTR SpiceLine Rser=3m
SYMBOL cap 1216 -208 R0
WINDOW 123 26 65 Left 2
WINDOW 3 41 36 Left 2
SYMATTR Value2 X4
SYMATTR Value 470
SYMATTR InstName C2
SYMATTR SpiceLine Rser=25m
SYMBOL cap 544 384 R0
SYMATTR InstName C8
SYMATTR Value 270p
SYMBOL ind -832 -208 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value .2
SYMATTR SpiceLine Rser=.3m Rpar=5K
SYMBOL nmos -608 -224 M0
SYMATTR InstName Q2
SYMATTR Value AOB2140L
SYMBOL schottky 560 -432 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N5818
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 0 -480 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2K
SYMBOL cap 352 0 R0
SYMATTR InstName C6
SYMATTR Value .22
SYMBOL cap 48 848 R0
SYMATTR InstName C11
SYMATTR Value 1
SYMBOL cap 720 352 R0
SYMATTR InstName C12
SYMATTR Value 200p
SYMBOL voltage 400 -384 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -928 -544 R0
SYMATTR InstName V1
SYMATTR Value 32
SYMBOL PowerProducts\\LTC3882 112 224 R0
SYMATTR InstName U2
SYMBOL nmos 832 -384 R0
SYMATTR InstName Q3
SYMATTR Value SIJA72ADP
FLAG 160 848 0
FLAG -928 -432 0
FLAG -448 -64 0
FLAG 1232 -112 0
FLAG 1344 -112 0
FLAG 1456 -112 0
FLAG 1456 -224 OUT
FLAG -928 -544 IN
FLAG 672 -64 0
FLAG 384 848 0
FLAG 400 -272 0
FLAG 256 848 0
FLAG -32 928 0
FLAG 64 928 0
FLAG 880 -96 0
FLAG -656 -96 0
FLAG 336 272 0
TEXT 448 864 Left 2 !.tran 1m startup
TEXT 1584 -224 Left 2 ;Please read the following notes carefully, since the model presents different user interface\nthan the real part does.\n \n(1) All PMBus communication and memory address related functions and pins are not modeled. \n \n(2) Changes to all parameter values during the simulation running will not be in effect, unless the\nsimulation is stopped and restarted. This is different from the operation of the part, which will\n respond to the commanded changes while running. \n \n(3) Share_clk is not modeled. The default time reference of LTspice is used as the common time \nbase for all time related parameters.\n \n(4) The following parameters can be defined, by right-clicking the symbol of LTC3882. Different \nnomenclature from the datasheet is adopted here. If any value of these parameters are set beyond \nthe scope discribed in the datasheet, the resulting simulation outcomes are not meaningful.\n \n    Freq -- in Hz, sets switching frequency as one of values of 250K, 300K, 350K, \n                400K, 450K, 500K, 600K, 750K, 900K, 1000K, 1250K. FREQ_CFG pin needs to float \n                (or short to VDD25), to make the value be in effect;\n     PHAS_0 & PHAS_1 -- in degree,  set phase angle related to SYNC signal. \n                Certain combinations are restricted as in datasheet. PHAS_CFG \n                pin needs to float (or short to VDD25), to make the value be in effect;\n     Ton0_delay & Ton0_rise; Ton1_delay & Ton1_rise -- in sec, set delay and soft-start timers for \n                channel0 and channel1. Initialization time is not modeled;\n     Toff0_delay & Toff0_fall; Toff1_delay & Toff1_fall -- in sec, set delay and soft-off timers for \n                channel0 and channel1;\n     Vout_0 & Vout_1 -- in volt, set output voltages respectively. Vout#_CFG pin needs to float \n                (or short to VDD25), to make the value be in effect;\n     Vout0_range & Vout1_range -- set maximum output range, with value 0\n                                                      for 5.5V; value 1 for 2.75V;\n     Iout0_fault & Iout1_fault -- in Amper, set maximum inductor peak current value, OC will be triggered \n                                               when the value is exceeded;\n     Iout0_warn & Iout1_warn -- in aMper, set the average load current maximum value, which will be used  \n                                                with Vout#_AVP to define the AVP operation;\n     Iout0_gain & Iout1_gain -- in Ohm, set sensing resistor or inductor DCR values used in the circuit;\n     Vout0_AVP & Vout1_AVP -- set the maximum value reference will reduce at Iout#_warn level:\n     PWM0_Protocol & PWM1_Protocol-- sets TG/BG output rules: 0 for 3-state PWM output; 1 for 2-state PWM output with active-high EN;\n                                 2 for 2-state PWM output with active-low open drain disable; 4 for indenpendent TG/BG outputs.