Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\012a0951b172_Solenoid_1.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 N005 9 Rser=1
R1 N003 N005 4.7k
M1 N004 N003 N005 N005 IRF530
R3 0 N005 1
V1 N002 0 PULSE(0 8 10m 1u 1u 10m 50m 3) Rser=10
L1 N001 N004 4mH Rser=6
R2 N002 N003 330
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 0.15 0 1u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 768 -160 -288 -160
WIRE 768 -48 768 -160
WIRE 48 48 -128 48
WIRE 576 48 128 48
WIRE -288 144 -288 -160
WIRE 768 160 768 32
WIRE 576 240 576 48
WIRE 720 240 576 240
WIRE -128 272 -128 48
WIRE 576 272 576 240
WIRE -128 400 -128 352
WIRE 224 400 -128 400
WIRE 384 400 224 400
WIRE 576 400 576 352
WIRE 576 400 464 400
WIRE 768 400 768 256
WIRE 768 400 576 400
WIRE 224 464 224 400
WIRE -288 576 -288 224
WIRE 768 576 768 400
WIRE 768 576 -288 576
SYMBOL voltage -128 256 R0
WINDOW 3 -114 176 Left 2
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 8 10m 1u 1u 10m 50m 3)
SYMATTR SpiceLine Rser=10
SYMBOL nmos 720 160 R0
SYMATTR InstName M1
SYMATTR Value IRF530
SYMBOL res 560 256 R0
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL ind 752 -64 R0
SYMATTR InstName L1
SYMATTR Value 4mH
SYMATTR SpiceLine Rser=6
SYMBOL voltage -288 128 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 9
SYMATTR SpiceLine Rser=1
SYMBOL res 32 32 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 330
SYMBOL res 368 384 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1
FLAG 224 464 0
TEXT -498 292 Left 2 !.tran 0 0.15 0 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\cab8a9ba309f_TransmissionLineInverter.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax. The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors. A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements. One for the normal(differential) mode and\nthe other for the common mode. Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world. These modes\nwith have different propagation speeds and impedances. If both modes\nare modeled, then you can simulate a transmission line inverter.
T2 0 0 OUT 0 Td=30n Z0=150
T1 IN 0 0 OUT Td=50n Z0=50
V1 IN 0 PULSE(0 1 0 1n 1n 10n) Rser=50
.tran 0 500n 0 1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 680
WIRE 128 192 -368 192
WIRE 320 192 224 192
WIRE -368 208 -368 192
WIRE 128 224 64 224
WIRE 288 224 224 224
WIRE 64 272 64 224
WIRE 64 272 16 272
WIRE 288 272 288 224
WIRE 336 272 288 272
WIRE -368 304 -368 288
WIRE 64 304 64 272
WIRE 128 304 64 304
WIRE 288 304 288 272
WIRE 288 304 224 304
WIRE 128 336 64 336
WIRE 288 336 224 336
WIRE 64 368 64 336
WIRE 288 368 288 336
SYMBOL tline 176 320 R0
WINDOW 0 -1 -21 Bottom 2
WINDOW 3 0 21 Top 2
SYMATTR InstName T2
SYMATTR Value Td=30n Z0=150
SYMBOL voltage -368 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 56 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1n 1n 10n)
SYMBOL tline 176 208 R0
WINDOW 0 2 -19 Bottom 2
WINDOW 3 3 20 Top 2
SYMATTR InstName T1
FLAG 64 368 0
FLAG 288 368 0
FLAG -368 304 0
FLAG 16 272 0
FLAG 320 192 0
FLAG -368 192 IN
FLAG 336 272 OUT
TEXT 376 368 Left 2 !.tran 0 500n 0 1n
TEXT 0 408 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT -376 -200 Left 2 ;This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax.  The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors.  A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements.  One for the normal(differential) mode and\nthe other for the common mode.  Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world.  These modes\nwith have different propagation speeds and impedances.  If both modes\nare modeled, then you can simulate a transmission line inverter.
* Z:\home\khalils\Downloads\files\data\raw_asc\57524b9297ac_amplifier.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N004 0 100
R2 N002 0 10k
R3 N001 N002 5k
Q1 N002 N003 N004 0 BC547B
Vlm35 N003 N005 0
V2 N001 0 12
V3 N005 0 0.175V
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc lm35 0 0.8 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 576 16 272 16
WIRE 272 64 272 16
WIRE 576 80 576 16
WIRE 272 192 272 144
WIRE 432 192 272 192
WIRE 576 208 576 160
WIRE 432 224 432 192
WIRE 208 240 48 240
WIRE 48 288 48 240
WIRE 272 336 272 288
WIRE 432 336 432 304
WIRE 48 416 48 368
WIRE 272 464 272 416
WIRE 48 544 48 496
FLAG 432 336 0
FLAG 48 544 0
FLAG 272 464 0
FLAG 576 208 0
SYMBOL res 256 320 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 416 208 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 256 48 R0
SYMATTR InstName R3
SYMATTR Value 5k
SYMBOL npn 208 192 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL voltage 48 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName lm35
SYMATTR Value 0
SYMBOL voltage 576 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL voltage 48 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 0.175V
TEXT 16 152 Left 2 !.dc lm35 0 0.8 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\341c48b65239_2N2222A_Input_Characteristic_Curve.asc
* Generated by LTspice 26.0.1 for Windows.
* https://www.youtube.com/watch?v=7WWJ2kfJ3oc
Vb N002 0 0
Re N003 0 .0001
Rc N001 Vc .0001
Vcc N001 0 12
Q1 Vc N002 N003 0 2N2222
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Vb .6 5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1232 680
WIRE 448 16 256 16
WIRE 256 32 256 16
WIRE 256 128 256 112
WIRE 320 128 256 128
WIRE 256 144 256 128
WIRE 448 144 448 16
WIRE 192 192 -32 192
WIRE -32 224 -32 192
WIRE 448 240 448 224
WIRE 256 272 256 240
WIRE -32 320 -32 304
WIRE 256 384 256 352
SYMBOL npn 192 144 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL voltage 448 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 12
SYMBOL voltage -32 208 R0
SYMATTR InstName Vb
SYMATTR Value 0
SYMBOL res 240 256 R0
SYMATTR InstName Re
SYMATTR Value .0001
SYMBOL res 240 16 R0
SYMATTR InstName Rc
SYMATTR Value .0001
FLAG 256 384 0
FLAG 448 240 0
FLAG 320 128 Vc
FLAG -32 320 0
TEXT 384 312 Left 2 !.dc Vb .6 5
TEXT 584 16 Left 2 ;https://www.youtube.com/watch?v=7WWJ2kfJ3oc
* Z:\home\khalils\Downloads\files\data\raw_asc\1b3e2858c8e2_LED.asc
* Generated by LTspice 26.0.1 for Windows.
C1 out 0 1n
R1 out in 20k
V1 in 0 PULSE(0 1 0 1e-4 1e-4 4e-2 8e-2) AC 1
.tran 30e-6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 96 16 64
WIRE 32 96 16 96
WIRE 80 96 32 96
WIRE 224 96 160 96
WIRE 256 96 256 80
WIRE 256 96 224 96
WIRE 224 144 224 96
WIRE 32 176 32 96
SYMBOL res 176 80 R90
WINDOW 0 0 59 VBottom 2
WINDOW 3 33 60 VTop 2
SYMATTR InstName R1
SYMATTR Value 20k
SYMBOL cap 208 144 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL voltage 32 160 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1e-4 1e-4 4e-2 8e-2)
SYMATTR Value2 AC 1
FLAG 32 256 0
FLAG 224 208 0
FLAG 256 80 out
FLAG 16 64 in
TEXT 408 112 Left 2 !.tran 30e-6
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4411.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4411.asy)
VBattery N001 0 3.6
XU1 N001 0 0 N003 N002 LTC4411 ;pnba Vin)GND)CTL)STAT)OUT
RLoad N002 0 10
R2 N003 N004 470K
Vcc N004 0 5
C1 N002 0 4.7
.tran 1m startup
.lib LTC4411.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 144 -144 144
WIRE 320 144 272 144
WIRE 416 144 320 144
WIRE -144 160 -144 144
WIRE 320 160 320 144
WIRE 416 160 416 144
WIRE 16 224 0 224
WIRE -144 256 -144 240
WIRE 320 256 320 224
WIRE 416 256 416 240
WIRE 16 304 0 304
WIRE 320 304 272 304
WIRE 432 304 400 304
WIRE 432 320 432 304
WIRE 432 416 432 400
SYMBOL res 304 320 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 470K
SYMBOL res 400 144 R0
SYMATTR InstName Load
SYMATTR Value 10
SYMBOL cap 304 160 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL voltage 432 304 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 5
SYMBOL voltage -144 144 R0
WINDOW 0 17 15 Left 2
WINDOW 3 21 97 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Battery
SYMATTR Value 3.6
SYMBOL LTC4411 144 224 R0
SYMATTR InstName U1
FLAG 0 224 0
FLAG -144 256 0
FLAG 0 304 0
FLAG 320 256 0
FLAG 416 256 0
FLAG 432 416 0
TEXT 104 392 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2051.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC2051.asy)
XU1 N003 N001 +V -V N002 NC_01 LTC2050 ;pnba In+)In-)V+)V-)OUT)SHDN
R1 N002 N001 10K
R2 N001 0 10K
V1 +V 0 2.5
V3 N003 0 SINE(0 1 1K)
V2 -V 0 -2.5
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -48 -64 -64 -64
WIRE 48 -64 32 -64
WIRE 112 -64 48 -64
WIRE 224 -64 192 -64
WIRE -320 48 -320 32
WIRE -192 48 -192 32
WIRE 48 64 48 -64
WIRE 64 64 48 64
WIRE 224 96 224 -64
WIRE 224 96 208 96
WIRE 64 128 -96 128
WIRE -320 144 -320 128
WIRE -192 144 -192 128
WIRE -96 160 -96 128
WIRE 96 192 96 176
WIRE -96 256 -96 240
SYMBOL voltage -320 32 R0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL voltage -96 144 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 208 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL opamps\\LTC2051 96 96 R0
SYMATTR InstName U1
SYMBOL res 48 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage -192 32 R0
SYMATTR InstName V1
SYMATTR Value 2.5
FLAG -192 144 0
FLAG 96 16 +V
FLAG -192 32 +V
FLAG 96 192 -V
FLAG -320 144 0
FLAG -320 32 -V
FLAG -96 256 0
FLAG -64 -64 0
TEXT 216 216 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6994-2.asc
* Generated by LTspice 26.0.1 for Windows.
* LTC6994-2 10ms Delay Interval Generator\nOutput Transitions to IN Level After Delay From Either IN Edge\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6994-2.asy)
V2 N001 0 PULSE(0 3.3 0.5m 1n 1n 12.5m 25m 3)
R1 N003 0 121K
V1 N002 0 5
R2 N002 N004 1000K
XU1 N001 0 N003 N004 N002 OUT LTC6994-2 ;pnba IN)GND)SET)DIV)V+)OUT
R4 OUT 0 100K
R3 N004 0 392K
.tran 100m startup
.lib LTC6994-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE -192 96 -208 96
WIRE 96 96 -112 96
WIRE 624 96 320 96
WIRE 624 112 624 96
WIRE 96 176 80 176
WIRE 368 176 320 176
WIRE 512 176 368 176
WIRE 368 192 368 176
WIRE 512 192 512 176
WIRE 624 208 624 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 336 256 320 256
WIRE 336 288 336 256
WIRE 368 288 368 272
WIRE 368 288 336 288
WIRE 512 288 512 272
WIRE 368 304 368 288
WIRE 368 400 368 384
SYMBOL res 352 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL voltage 512 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 121K
SYMBOL res 352 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
SYMBOL voltage -96 96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0.5m 1n 1n 12.5m 25m 3)
SYMATTR InstName V2
SYMBOL res 608 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL SpecialFunctions\\LTC6994-2 208 176 R0
SYMATTR InstName U1
FLAG -208 96 0
FLAG 512 288 0
FLAG 624 96 OUT
FLAG -16 256 0
FLAG 368 400 0
FLAG 624 208 0
FLAG 80 176 0
TEXT 520 352 Left 2 !.tran 100m startup
TEXT 208 56 Bottom 2 ;LTC6994-2 10ms Delay Interval Generator\nOutput Transitions to IN Level After Delay From Either IN Edge\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\1ddba808ca4c_5507.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 3.3
V2 RF 0 SINE(0 .1 100Meg)
C1 N005 N004 5p
XU1 N005 0 N001 OUT N001 N002 LTC5507 ;pnba RFin)GND)_SHDN)Vout)Vcc)PCAP
C2 N001 N002 28p
B1 N003 0 V=V(rf)*(1+sin(2*pi*50K*time))
R1 N004 N003 50
.tran 60u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC5507.asy)
.lib LTC5507.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 948
WIRE 0 128 -208 128
WIRE 368 128 0 128
WIRE -208 144 -208 128
WIRE 0 192 0 128
WIRE 64 192 0 192
WIRE 400 192 320 192
WIRE 0 224 0 192
WIRE -208 240 -208 224
WIRE 0 304 0 288
WIRE 64 304 0 304
WIRE 336 304 320 304
WIRE -112 416 -176 416
WIRE -16 416 -32 416
WIRE 64 416 48 416
WIRE 368 416 368 128
WIRE 368 416 320 416
WIRE -496 432 -496 416
WIRE -176 432 -176 416
WIRE -496 528 -496 512
WIRE -176 528 -176 512
FLAG -208 240 0
FLAG -496 528 0
FLAG 400 192 OUT
FLAG 336 304 0
FLAG -496 416 RF
FLAG -176 528 0
SYMBOL voltage -208 128 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage -496 416 R0
WINDOW 39 24 117 Left 2
SYMATTR Value SINE(0 .1 100Meg)
SYMATTR InstName V2
SYMBOL cap 48 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 5p
SYMBOL LTC5507 192 304 R0
SYMATTR InstName U1
SYMBOL cap -16 224 R0
SYMATTR InstName C2
SYMATTR Value 28p
SYMBOL bv -176 416 R0
SYMATTR InstName B1
SYMATTR Value V=V(rf)*(1+sin(2*pi*50K*time))
SYMBOL res -16 400 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
TEXT 384 472 Left 2 !.tran 60u
* Z:\tmp\asc_dec_bjh7r6w2\04ff9d67cb4f_Draft46_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R11 NC_01 VOUT 100R
R9 N001 N003 20k
R2 N001 N005 20k
I1 N009 N010 1mA
V1 VCC2 0 15
VIN1 N008 0 PULSE(-5 5 0 100n 100n 0.2ms 0.4ms 7)
R3 N001 N002 2k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1664 952
WIRE -256 -288 -336 -288
WIRE -336 -272 -336 -288
WIRE -256 -272 -256 -288
WIRE 256 -192 96 -192
WIRE 560 -192 256 -192
WIRE 688 -192 560 -192
WIRE 992 -192 688 -192
WIRE 688 -176 688 -192
WIRE 688 -64 688 -96
WIRE 928 -64 688 -64
WIRE 560 -48 560 -192
WIRE 688 -48 688 -64
WIRE 96 0 96 -112
WIRE 496 0 96 0
WIRE 784 0 752 0
WIRE 256 112 256 -112
WIRE 784 112 784 0
WIRE 1408 112 1408 -192
WIRE 1344 160 992 160
WIRE 1584 288 1408 288
WIRE 48 352 -144 352
WIRE 624 688 624 48
WIRE 624 768 176 768
WIRE 992 768 624 768
SYMBOL res 1392 192 R0
SYMATTR InstName R11
SYMATTR Value 100R
SYMBOL res 80 -208 R0
SYMATTR InstName R9
SYMATTR Value 20k
SYMBOL res 240 -208 R0
SYMATTR InstName R2
SYMATTR Value 20k
SYMBOL current 624 688 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 52 58 Left 2
SYMATTR InstName I1
SYMATTR Value 1mA
SYMBOL voltage -336 -384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 42 41 Left 2
SYMATTR Value 15
SYMATTR InstName V1
SYMBOL voltage -144 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -461 138 Left 2
SYMATTR Value PULSE(-5 5 0 100n 100n 0.2ms 0.4ms 7)
SYMATTR InstName VIN1
SYMBOL res 672 -192 R0
SYMATTR InstName R3
SYMATTR Value 2k
FLAG -256 -272 0
FLAG -336 -368 VCC2
FLAG -336 -192 VEE2
FLAG 1584 288 VOUT
FLAG -144 432 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1054L.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1054L.asy)
XU1 N001 N002 0 N005 OUT N004 N003 IN LT1054L ;pnba FB)Cap+)GND)Cap-)Vout)Ref)OSC)Vin
Rload OUT 0 50
V1 IN 0 10
C5 OUT 0 100
C6 N002 N005 100
.tran 10m startup
.lib LT1054L.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3548 1768
WIRE 3008 1440 2992 1440
WIRE 3376 1440 3264 1440
WIRE 3376 1456 3376 1440
WIRE 3008 1504 2912 1504
WIRE 3280 1504 3264 1504
WIRE 2912 1536 2912 1504
WIRE 3008 1568 2992 1568
WIRE 3280 1568 3264 1568
WIRE 3376 1568 3376 1536
WIRE 2912 1632 2912 1600
WIRE 3008 1632 2912 1632
WIRE 3328 1632 3264 1632
WIRE 3456 1632 3328 1632
WIRE 3328 1648 3328 1632
WIRE 3456 1648 3456 1632
WIRE 3328 1744 3328 1712
WIRE 3456 1744 3456 1728
SYMBOL RES 3440 1632 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL cap 3312 1648 R0
SYMATTR InstName C5
SYMATTR Value 100
SYMBOL VOLTAGE 3376 1440 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL POWERPRODUCTS\\LT1054L 3136 1536 R0
SYMATTR InstName U1
SYMBOL cap 2896 1536 R0
SYMATTR InstName C6
SYMATTR Value 100
FLAG 3376 1568 0
FLAG 2992 1568 0
FLAG 3328 1744 0
FLAG 3456 1744 0
FLAG 3456 1632 OUT
FLAG 3376 1440 IN
TEXT 3032 1752 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3420.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3420.asy)
D1 N001 OUT D
R2 N006 0 2K
K1 L1 L2 1
C2 N007 0 1000p
L1 IN N003 20 Rpar=2K Rser=.1
R3 N004 IN 10K
XU1 N006 IN N002 IN 0 N003 N005 N004 IN N007 LT3420 ;pnba Rref)Vbat)Rfb)Vcc)GND)SW)SEC)Done)Charge)Ct
V1 IN 0 5
L2 N005 N001 {20u*12*12} Rpar=1Meg
R1 N003 N002 51.1K
C1 OUT 0 .1 Rpar=.1Meg
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m
.lib LT3420.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2740 1752
WIRE 1616 1056 1552 1056
WIRE 1808 1056 1616 1056
WIRE 2064 1056 1808 1056
WIRE 2176 1056 2112 1056
WIRE 2304 1056 2240 1056
WIRE 1552 1072 1552 1056
WIRE 2064 1072 2064 1056
WIRE 2112 1072 2112 1056
WIRE 2304 1088 2304 1056
WIRE 1552 1168 1552 1152
WIRE 1968 1184 1936 1184
WIRE 2064 1184 2064 1152
WIRE 2064 1184 2048 1184
WIRE 2304 1184 2304 1152
WIRE 1808 1232 1808 1056
WIRE 1936 1232 1936 1184
WIRE 1616 1312 1616 1056
WIRE 1728 1312 1616 1312
WIRE 2064 1312 2064 1184
WIRE 2064 1312 2016 1312
WIRE 1616 1392 1616 1312
WIRE 1632 1392 1616 1392
WIRE 1728 1392 1712 1392
WIRE 2112 1392 2112 1152
WIRE 2112 1392 2016 1392
WIRE 1616 1472 1616 1392
WIRE 1728 1472 1616 1472
WIRE 2032 1472 2016 1472
WIRE 2128 1472 2112 1472
WIRE 1808 1568 1808 1552
WIRE 1936 1568 1936 1552
WIRE 1808 1648 1808 1632
SYMBOL diode 2176 1072 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL ind2 2048 1056 R0
WINDOW 0 -6 35 Right 2
WINDOW 3 -4 73 Right 2
SYMATTR InstName L1
SYMATTR Value 20
SYMATTR SpiceLine Rpar=2K Rser=.1
SYMBOL cap 2288 1088 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMATTR SpiceLine Rpar=.1Meg
SYMBOL cap 1792 1568 R0
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL ind2 2128 1168 R180
WINDOW 0 -3 72 Right 2
WINDOW 3 0 43 Right 2
SYMATTR InstName L2
SYMATTR Value {20u*12*12}
SYMATTR SpiceLine Rpar=1Meg
SYMBOL VOLTAGE 1552 1056 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2016 1488 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 2K
SYMBOL RES 2064 1168 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 51.1K
SYMBOL POWERPRODUCTS\\LT3420 1872 1392 R0
WINDOW 0 -16 -180 Left 2
SYMATTR InstName U1
SYMBOL res 1728 1376 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
FLAG 2304 1184 0
FLAG 2128 1472 0
FLAG 1936 1568 0
FLAG 1808 1648 0
FLAG 1552 1168 0
FLAG 1552 1056 IN
FLAG 2304 1056 OUT
TEXT 2176 1392 Left 2 !.tran 10m
TEXT 2088 1056 Bottom 2 !K1 L1 L2 1
* Z:\home\khalils\Downloads\files\data\raw_asc\4d73dbc015ed_InvertingAmp.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD811.asy)
;tran 0 1m 0 100n
;tf V(n002) V3
;dc V0 -5 5 0.001
R1 N001 N003 100
R2 N002 N001 100k
V1 VCC 0 15
V0 N003 0 SINE(0 100u 10k) AC 10u
C1 N002 N001 10n
XU2 0 N001 VCC VEE N002 AD811 ;pnba In+)In-)V+)V-)OUT
V2 VEE 0 -15
.ac dec 1001 10 1000meg
.lib AD811.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 224 48 192 48
WIRE 352 48 288 48
WIRE 192 128 192 48
WIRE 224 128 192 128
WIRE 352 128 352 48
WIRE 352 128 304 128
WIRE 96 192 48 192
WIRE 192 192 192 128
WIRE 192 192 176 192
WIRE 48 208 48 192
WIRE 192 240 192 192
WIRE 256 240 192 240
WIRE 352 256 352 128
WIRE 352 256 320 256
WIRE 256 272 240 272
WIRE 48 336 48 288
IOPIN 224 -96 Out
IOPIN 320 -96 Out
IOPIN 288 224 In
IOPIN 288 288 In
SYMBOL Opamps\\AD811 288 192 R0
SYMATTR InstName U2
SYMBOL voltage 320 -112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 -6 58 Left 2
SYMATTR Value -15
SYMATTR InstName V2
SYMBOL res 192 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL cap 288 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL voltage 224 -112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 -7 59 Left 2
SYMATTR Value 15
SYMATTR InstName V1
SYMBOL voltage 48 192 R0
WINDOW 0 36 57 Left 2
WINDOW 3 36 73 Left 2
WINDOW 123 36 101 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V0
SYMATTR Value SINE(0 100u 10k)
SYMATTR Value2 AC 10u
SYMBOL res 320 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 24 86 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
FLAG 48 336 0
FLAG 240 272 0
FLAG 224 -16 0
FLAG 320 -16 0
FLAG 224 -96 VCC
FLAG 320 -96 VEE
FLAG 288 224 VCC
FLAG 288 288 VEE
TEXT -144 24 Left 2 !;tran 0 1m 0 100n
TEXT -144 48 Left 2 !;tf V(n002) V3
TEXT -144 0 Left 2 !.ac dec 1001 10 1000meg
TEXT -144 -40 Left 2 !;dc V0 -5 5 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX1852.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX1852.asy)
V1 IN 0 5
XU1 IN OUT N001 N002 0 IN MAX1852 ;pnba IN)OUT)C1+)C1-)GND)_SHDN
C1 N001 N002 1
Rload OUT 0 50
C2 OUT 0 10
.tran 2m startup
.lib MAX1852.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2884 1464
WIRE 2416 1008 2080 1008
WIRE 2576 1008 2416 1008
WIRE 2080 1024 2080 1008
WIRE 2416 1024 2416 1008
WIRE 2272 1088 2208 1088
WIRE 2576 1088 2576 1008
WIRE 2576 1088 2560 1088
WIRE 2080 1120 2080 1104
WIRE 2208 1136 2208 1088
WIRE 2208 1248 2208 1200
WIRE 2272 1248 2208 1248
WIRE 2624 1248 2560 1248
WIRE 2736 1248 2624 1248
WIRE 2624 1264 2624 1248
WIRE 2736 1264 2736 1248
WIRE 2416 1328 2416 1312
WIRE 2624 1360 2624 1328
WIRE 2736 1360 2736 1344
SYMBOL MAX1852 2416 1168 R0
SYMATTR InstName U1
SYMBOL cap 2192 1136 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL VOLTAGE 2080 1008 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2608 1264 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL RES 2720 1248 R0
SYMATTR InstName Rload
SYMATTR Value 50
FLAG 2416 1328 0
FLAG 2624 1360 0
FLAG 2080 1120 0
FLAG 2736 1360 0
FLAG 2736 1248 OUT
FLAG 2080 1008 IN
TEXT 2352 1376 Left 2 !.tran 2m startup