Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\AD820.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD820.asy)
Vin IN 0 SINE(0 1 10K)
V2 -V 0 -15
V1 +V 0 15
R2 OUT N001 10K
R1 N001 0 10K
XU1 IN N001 +V -V OUT AD820 ;pnba In+)In-)V+)V-)OUT
.tran 1m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 704 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 432 -976 432 -992
SYMBOL AD820 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 704 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 256 -1056 0
TEXT 688 -1000 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\4c5616207b55_Zener_diode.asc
* Generated by LTspice 26.0.1 for Windows.
;tran 10s
RL1 N002 0 {RL}
D1 0 N002 1N751
V1 N001 0 15
Rs1 N002 N001 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model 1N751 D(Is=1.004f Rs=.5875 Ikf=0 N=1 Xti=3 Eg=1.11 Cjo=160p M=.5484 Vj=.75 Fc=.5 Isr=1.8n Nr=2 Bv=5.1 Ibv=27.721m Nbv=1.1779 Ibvl=1.1646m Nbvl=21.894 Tbv1=176.47u Vpk=5.1 mfg=Motorola type=zener)
.step param RL 100 5000 100
.op 0.1s
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1908 680
WIRE 80 176 -32 176
WIRE 320 176 160 176
WIRE 480 176 320 176
WIRE 480 208 480 176
WIRE -32 224 -32 176
WIRE 320 224 320 176
WIRE -32 336 -32 304
WIRE 320 336 320 288
WIRE 320 336 -32 336
WIRE 480 336 480 288
WIRE 480 336 320 336
WIRE -32 368 -32 336
SYMBOL zener 336 288 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N751
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 464 192 R0
SYMATTR InstName RL1
SYMATTR Value {RL}
SYMBOL res 176 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rs1
SYMATTR Value 1k
SYMBOL voltage -32 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
FLAG -32 368 0
TEXT 480 464 Left 2 !;tran 10s
TEXT -56 400 Left 0 !.model 1N751 D(Is=1.004f Rs=.5875 Ikf=0 N=1 Xti=3 Eg=1.11 Cjo=160p M=.5484 Vj=.75 Fc=.5 Isr=1.8n Nr=2 Bv=5.1 Ibv=27.721m Nbv=1.1779 Ibvl=1.1646m Nbvl=21.894 Tbv1=176.47u Vpk=5.1 mfg=Motorola type=zener)
TEXT -40 464 Left 2 !.step param RL 100 5000 100
TEXT 680 464 Left 2 !.op 0.1s
* Z:\home\khalils\Downloads\files\data\raw_asc\22dce6384ab8_AD8065.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8065.asy)
Vin N002 0 SINE(0 1 10Meg) Rser=50
R4 N003 N002 249
R1 N001 0 499
V2 -V 0 -12
C1 OUT N001 2.2p
Rload OUT 0 1K
XU1 N003 N001 +V -V OUT AD8065 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 12
R2 OUT N001 499
.tran 1u
.lib AD8065.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 560 -1344 528 -1344
WIRE 640 -1344 624 -1344
WIRE 432 -1232 416 -1232
WIRE 528 -1232 528 -1344
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 640 -1344
WIRE 640 -1232 624 -1232
WIRE 32 -1152 32 -1168
WIRE 144 -1152 144 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 400 -1088 272 -1088
WIRE 544 -1088 480 -1088
WIRE 752 -1088 752 -1104
WIRE 272 -1072 272 -1088
WIRE 32 -1056 32 -1072
WIRE 144 -1056 144 -1072
WIRE 576 -1056 576 -1072
WIRE 752 -992 752 -1008
WIRE 272 -976 272 -992
SYMBOL cap 624 -1360 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2.2p
SYMBOL res 496 -1104 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 249
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 499
SYMBOL Opamps\\AD8065 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 272 -1088 R0
WINDOW 123 24 138 Left 2
WINDOW 39 37 57 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10Meg)
SYMBOL voltage 144 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL voltage 32 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 499
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 1K
FLAG 32 -1168 +V
FLAG 272 -976 0
FLAG 752 -1104 OUT
FLAG 576 -1136 +V
FLAG 144 -1168 -V
FLAG 576 -1056 -V
FLAG 416 -1232 0
FLAG 752 -992 0
FLAG 144 -1056 0
FLAG 32 -1056 0
TEXT 696 -928 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2118-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2118-1.5.asy)
C1 OUT 0 100
XU1 IN IN IN OUT 0 0 N002 IN IN IN N001 ADP2118-x.x Rtop=600k Rbot=400k Ctop=4p ;pnba Sync/Mode)FREQ)TRK)FB)GND)PGND)SW)Pvin)Vin)EN)Pgood
L1 N002 OUT 1
Rload OUT 0 .5
R1 OUT N001 100K
V1 IN 0 5
.tran 2m startup
.lib ADP2118-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1104 680
WIRE 128 0 48 0
WIRE 288 0 128 0
WIRE 48 16 48 0
WIRE 288 32 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 640 64 576 64
WIRE 48 112 48 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 640 144 640 64
WIRE 640 144 560 144
WIRE 704 144 640 144
WIRE 560 160 560 144
WIRE 704 160 704 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 560 256 560 224
WIRE 704 256 704 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 640 304 640 144
WIRE 640 304 416 304
WIRE 128 384 128 304
WIRE 160 384 128 384
WIRE 288 432 288 416
SYMBOL ADP2118-1.5 288 272 R0
SYMATTR InstName U1
SYMBOL res 688 144 R0
SYMATTR InstName Rload
SYMATTR Value .5
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 100
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL voltage 48 0 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 560 256 0
FLAG 288 432 0
FLAG 48 112 0
FLAG 704 144 OUT
FLAG 704 256 0
FLAG 48 0 IN
TEXT 512 384 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1325ff37aabf_sweep-diagram.asc
* Generated by LTspice 26.0.1 for Windows.
* To find Width by Sweep
* EDIC WINTER INTERNSHIP\nMOHAMMED AHMED MAJID\nGP5405
* Common Source Amplifier with Resistive Load
;.step param wp 1u 50u 1u
M1 N003 N002 N001 N001 PMOS l=0.36u w={wp}
V3 N001 0 1.8
V2 N002 0 1.26
V1 N003 0 0.9
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include tsmc180.txt
.param wp 1u
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 16 256 16
WIRE 416 48 416 16
WIRE 256 64 256 16
WIRE 336 64 256 64
WIRE 256 80 256 64
WIRE 208 96 64 96
WIRE 336 128 336 64
WIRE 336 128 256 128
WIRE 64 176 64 96
WIRE 416 192 416 128
WIRE 256 224 256 176
WIRE 64 304 64 256
WIRE 256 368 256 304
SYMBOL voltage 64 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.26
SYMBOL voltage 256 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0.9
SYMBOL voltage 416 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 1.8
SYMBOL pmos4 208 176 M180
WINDOW 123 29 114 Right 2
SYMATTR InstName M1
SYMATTR Value2 l=0.36u w={wp}
FLAG 64 304 0
FLAG 256 368 0
FLAG 416 192 0
TEXT -400 -56 Left 2 ;To find Width by Sweep
TEXT -400 -16 Left 2 !.include tsmc180.txt
TEXT -400 16 Left 2 !.param wp 1u
TEXT -400 48 Left 2 !;.step param wp 1u 50u 1u
TEXT -400 72 Left 2 !.op
TEXT -408 -160 Left 2 ;EDIC WINTER INTERNSHIP\nMOHAMMED AHMED MAJID\nGP5405
TEXT 16 -64 Left 2 ;Common Source Amplifier with Resistive Load
* Z:\home\khalils\Downloads\files\data\raw_asc\0854beaca7a7_R__L.asc
* Generated by LTspice 26.0.1 for Windows.
V N001 0 SINE(0 3 2K)
R1 N002 N001 5k
L1 N002 0 70m
.tran 0 0.01 0 0.00001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 16 16 16
WIRE 432 16 224 16
WIRE 16 128 16 16
WIRE 432 176 432 16
WIRE 16 304 16 208
WIRE 432 304 432 256
WIRE 432 304 16 304
WIRE 16 336 16 304
FLAG 16 336 0
SYMBOL Misc\\signal 16 112 R0
SYMATTR InstName V
SYMATTR Value SINE(0 3 2K)
SYMBOL res 240 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5k
SYMBOL ind 416 160 R0
SYMATTR InstName L1
SYMATTR Value 70m
TEXT 80 408 Left 2 !.tran 0 0.01 0 0.00001
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC7138.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC7138.asy)
D1 N002 N001 MURS120
R2 N004 0 150K
L1 N001 OUT 220 Rser=.5
V1 IN 0 72
Rload OUT 0 12.5
C1 OUT 0 22 Rser=10m
XU1 N001 0 IN N002 IN 0 N003 0 OUT N003 N004 NC_01 LTC7138 ;pnba SW)OVLO)Vin)Anode)Run)Vprg2)Vprg1)GND)FB)SS)Iset)FBO
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
.lib LTC7138.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 -96 -32 -96
WIRE 224 -96 64 -96
WIRE -32 -80 -32 -96
WIRE 224 -80 224 -96
WIRE 64 -16 64 -96
WIRE 80 -16 64 -16
WIRE 400 -16 368 -16
WIRE 448 -16 400 -16
WIRE 560 -16 528 -16
WIRE 608 -16 560 -16
WIRE 704 -16 608 -16
WIRE 400 0 400 -16
WIRE 608 0 608 -16
WIRE 704 0 704 -16
WIRE -32 16 -32 0
WIRE 80 80 64 80
WIRE 400 80 400 64
WIRE 400 80 368 80
WIRE 608 96 608 64
WIRE 704 96 704 80
WIRE 80 176 64 176
WIRE 560 176 560 -16
WIRE 560 176 368 176
WIRE 64 272 64 176
WIRE 80 272 64 272
WIRE 384 272 368 272
WIRE 480 272 464 272
WIRE 80 368 64 368
WIRE 224 448 224 432
SYMBOL cap 592 0 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine Rser=10m
SYMBOL res 688 -16 R0
SYMATTR InstName Rload
SYMATTR Value 12.5
SYMBOL PowerProducts\\LTC7138 224 176 R0
SYMATTR InstName U1
SYMBOL voltage -32 -96 R0
SYMATTR InstName V1
SYMATTR Value 72
SYMBOL diode 384 64 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MURS120
SYMBOL ind 432 0 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 220
SYMATTR SpiceLine Rser=.5
SYMBOL res 368 288 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 150K
FLAG 224 448 0
FLAG 64 80 0
FLAG 64 368 0
FLAG 608 96 0
FLAG 704 96 0
FLAG -32 16 0
FLAG 480 272 0
FLAG 704 -16 OUT
FLAG -32 -96 IN
TEXT 496 408 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1fb796f51013_tp2_rlc_desnormalizado_1db.asc
* Generated by LTspice 26.0.1 for Windows.
L Vi Vo 161m
R Vo 0 1k
C Vo 0 80.28n
V1 Vi 0 SINE(0 1 0 0 0 0 1000) AC 1 0
.ac dec 100 1 100k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 112 -80 112
WIRE 80 112 -48 112
WIRE 240 112 160 112
WIRE 352 112 240 112
WIRE 400 112 352 112
WIRE -48 176 -48 112
WIRE 352 176 352 112
WIRE 240 192 240 112
WIRE -48 336 -48 256
WIRE 240 336 240 256
WIRE 240 336 -48 336
WIRE 352 336 352 256
WIRE 352 336 240 336
WIRE 240 368 240 336
FLAG -80 112 Vi
IOPIN -80 112 In
FLAG 400 112 Vo
IOPIN 400 112 Out
FLAG 240 368 0
SYMBOL ind 64 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 31 106 VTop 2
SYMATTR InstName L
SYMATTR Value 161m
SYMBOL res 336 160 R0
WINDOW 0 46 38 Left 2
WINDOW 3 46 66 Left 2
SYMATTR InstName R
SYMATTR Value 1k
SYMBOL cap 224 192 R0
WINDOW 3 26 54 Left 2
SYMATTR Value 80.28n
SYMATTR InstName C
SYMBOL voltage -48 160 R0
WINDOW 3 24 96 Invisible 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 1 0 0 0 0 1000)
SYMATTR InstName V1
SYMATTR Value2 AC 1 0
TEXT -160 392 Left 2 !.ac dec 100 1 100k
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG5412.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
V3 N001 0 10
V4 N003 0 pulse(0 5 0 20n 20n 10u 20u)
R1 N002 0 300
XU1 +V -V N003 N001 N002 0 ADG5412 ;pnba Vdd)Vss)IN)S)D)GND
.tran 50u
* Note:\nSwitch shown for a logic 1 input\nParameter performance modeled at 15V dual supply\nPin Capacitance not included\nOnly one channel is modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG5412.asy)
.lib ADG5412.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2844 1336
WIRE -112 -128 -112 -144
WIRE -464 -48 -464 -64
WIRE -304 -48 -336 -48
WIRE -208 -48 -224 -48
WIRE 48 -48 -16 -48
WIRE 48 -16 48 -48
WIRE -208 16 -336 16
WIRE -464 48 -464 32
WIRE 48 80 48 64
WIRE -336 96 -336 16
WIRE -464 144 -464 128
WIRE -176 144 -176 128
WIRE -48 144 -48 128
WIRE -464 240 -464 224
WIRE -336 240 -336 176
FLAG -464 240 0
FLAG -464 48 0
FLAG -464 -64 +V
FLAG -464 128 -V
FLAG -336 -48 0
FLAG -176 144 -V
FLAG -112 -144 +V
FLAG -48 144 0
FLAG -336 240 0
FLAG 48 80 0
SYMBOL voltage -464 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -464 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -208 -48 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL voltage -336 80 R0
WINDOW 3 19 116 Left 2
SYMATTR Value pulse(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V4
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL ADG5412 -112 0 R0
SYMATTR InstName U1
TEXT 112 256 Left 2 !.tran 50u
TEXT -488 -320 Left 2 ;Note:\nSwitch shown for a logic 1 input\nParameter performance modeled at 15V dual supply\nPin Capacitance not included\nOnly one channel is modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1585-3.45.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1585-3.6.asy)
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 22
XU1 0 OUT IN LT1585-3.6 ;pnba GND)OUT)IN
Rload OUT 0 500
.tran 1
.lib LT1584.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 176 -160 176
WIRE 384 176 288 176
WIRE 480 176 384 176
WIRE -160 192 -160 176
WIRE 384 192 384 176
WIRE 480 192 480 176
WIRE -160 288 -160 272
WIRE 384 288 384 256
WIRE 480 288 480 272
WIRE 160 304 160 272
SYMBOL PowerProducts\\LT1585-3.6 160 176 R0
SYMATTR InstName U1
SYMBOL res 464 176 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL voltage -160 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 368 192 R0
SYMATTR InstName C1
SYMATTR Value 22
FLAG -160 288 0
FLAG 384 288 0
FLAG 480 288 0
FLAG 160 304 0
FLAG -160 176 IN
FLAG 480 176 OUT
TEXT 272 360 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4077.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4077.asy)
XU1 N002 N003 N005 N007 N008 N009 N001 N006 N004 N001 0 LTC4077 ;pnba USBin)Iusb)IusbL)_PWR)_CHRG)_EN)HPWR)Idc)BAT)DCin)GND
R5 N008 N001 1K
R4 N007 N001 1K
V2 N001 0 5
R1 N003 0 2K
C1 N004 0 1 Rpar=1K
R3 N006 0 1.24K
R2 N005 0 2K
.tran 1000 startup
.lib LTC4077.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 16 -192 16
WIRE 512 16 -112 16
WIRE -192 32 -192 16
WIRE 80 80 48 80
WIRE 512 80 512 16
WIRE 512 80 368 80
WIRE -192 128 -192 112
WIRE -16 144 -80 144
WIRE 80 144 64 144
WIRE 544 144 368 144
WIRE 544 160 544 144
WIRE -64 208 -80 208
WIRE 80 208 16 208
WIRE 384 208 368 208
WIRE 480 208 464 208
WIRE 544 240 544 224
WIRE -112 272 -112 16
WIRE -16 272 -112 272
WIRE 80 272 64 272
WIRE 512 272 512 80
WIRE 512 272 368 272
WIRE -112 336 -112 272
WIRE -64 336 -112 336
WIRE 80 336 16 336
WIRE 384 336 368 336
WIRE 224 400 224 384
SYMBOL res 80 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL res 32 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1K
SYMBOL PowerProducts\\LTC4077 224 208 R0
SYMATTR InstName U1
SYMBOL res 368 192 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1.24K
SYMBOL res 80 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL voltage -192 16 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 32 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2K
SYMBOL cap 528 160 R0
WINDOW 3 41 34 Left 2
WINDOW 39 26 58 Left 2
SYMATTR Value 1
SYMATTR SpiceLine Rpar=1K
SYMATTR InstName C1
FLAG 224 400 0
FLAG -80 208 0
FLAG -80 144 0
FLAG 480 208 0
FLAG -192 128 0
FLAG 544 240 0
TEXT 408 360 Left 2 !.tran 1000 startup
* Z:\tmp\asc_dec_bjh7r6w2\1045c0a1bff5_ex1e_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
Vi2 N003 0 {Vi1}
Vi1 N002 0 {Vi2}
RCARGA1 o 0 100k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -32 176 -32
WIRE 400 -32 352 -32
WIRE 176 48 176 -32
WIRE -256 80 -256 48
WIRE -256 80 -304 80
WIRE 0 80 -128 80
WIRE 176 80 176 48
WIRE 176 80 0 80
WIRE 192 80 176 80
WIRE 400 96 400 -32
WIRE 400 96 256 96
WIRE 432 96 400 96
WIRE 448 96 432 96
WIRE -304 112 -304 80
WIRE -256 112 -256 80
WIRE 128 112 16 112
WIRE 192 112 128 112
WIRE 448 112 448 96
WIRE -128 144 -128 80
WIRE 16 144 16 112
WIRE 128 144 128 112
WIRE 448 224 448 192
WIRE -128 240 -128 224
WIRE 16 240 16 224
WIRE 128 256 128 224
WIRE -128 368 -128 320
WIRE 16 368 16 320
SYMBOL voltage 16 224 R0
SYMATTR InstName Vi2
SYMATTR Value {Vi1}
SYMBOL voltage -128 224 R0
SYMATTR InstName Vi1
SYMATTR Value {Vi2}
SYMBOL res 432 96 R0
SYMATTR InstName CARGA1
SYMATTR Value 100k
FLAG -128 368 0
FLAG 448 224 0
FLAG -304 112 0
FLAG -256 192 Vnn
FLAG 432 96 o
FLAG 0 80 i
FLAG 176 48 n
FLAG 16 368 0
FLAG 128 256 0
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX22700E.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX22700E.asy)
V3 _EN 0 PULSE(0 5 0 2n 2n 3u 5u)
V4 VDDB 0 20
C1 OUT 0 200p
XU1 VDDA IN _EN 0 VDDB OUT 0 0 MAX22700E ;pnba VDDA)IN)_EN)GNDA)VDDB)OUT)GNDB)VSSB
V2 IN 0 PULSE(0 5 0 2n 2n 6u 12u)
V1 VDDA 0 5
.tran 50u
.lib MAX22700E.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2212 708
WIRE 16 64 -592 64
WIRE 64 64 16 64
WIRE 448 64 384 64
WIRE 640 64 448 64
WIRE -592 112 -592 64
WIRE 640 128 640 64
WIRE 16 144 -464 144
WIRE 64 144 16 144
WIRE 448 144 384 144
WIRE 512 144 448 144
WIRE 512 160 512 144
WIRE -464 176 -464 144
WIRE 16 224 -304 224
WIRE 64 224 16 224
WIRE 512 224 512 208
WIRE 512 224 384 224
WIRE -592 272 -592 192
WIRE -304 272 -304 224
WIRE 640 272 640 208
WIRE -464 288 -464 256
WIRE 64 304 16 304
WIRE 512 304 512 224
WIRE 512 304 384 304
WIRE -304 384 -304 352
WIRE 16 384 16 304
WIRE 512 384 512 304
SYMBOL MAX22700E 224 144 R0
SYMATTR InstName U1
SYMBOL voltage 640 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 20
SYMBOL voltage -592 96 R0
WINDOW 0 21 107 Left 2
WINDOW 3 17 8 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 496 160 R0
SYMATTR InstName C1
SYMATTR Value 200p
SYMBOL voltage -464 160 R0
WINDOW 3 32 1 Left 2
WINDOW 0 28 101 Left 2
SYMATTR Value PULSE(0 5 0 2n 2n 6u 12u)
SYMATTR InstName V2
SYMBOL voltage -304 256 R0
WINDOW 3 22 -12 Left 2
WINDOW 0 25 96 Left 2
SYMATTR Value PULSE(0 5 0 2n 2n 3u 5u)
SYMATTR InstName V3
FLAG 16 384 0
FLAG -304 384 0
FLAG -464 288 0
FLAG 16 144 IN
FLAG 16 224 _EN
FLAG 448 144 OUT
FLAG 16 64 VDDA
FLAG 448 64 VDDB
FLAG 512 384 0
FLAG -592 272 0
FLAG 640 272 0
TEXT 280 408 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\39486572ebd2_Referencia.asc
* Generated by LTspice 26.0.1 for Windows.
R3 voltage_ref 70% 1092
R6 50% 0 1k
R4 70% 0 1k
R2 90% 0 1k
R5 voltage_ref 50% 1404
R7 voltage_ref 30% 1809
R8 30% 0 1k
R1 voltage_ref 90% 859
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 64 80 64
WIRE 256 64 112 64
WIRE 384 64 256 64
WIRE 496 64 384 64
WIRE 112 160 112 144
WIRE 176 160 112 160
WIRE 256 160 256 144
WIRE 336 160 256 160
WIRE 384 160 384 144
WIRE 464 160 384 160
WIRE 496 160 496 144
WIRE 576 160 496 160
WIRE 112 192 112 160
WIRE 256 192 256 160
WIRE 384 192 384 160
WIRE 496 192 496 160
WIRE 112 272 80 272
WIRE 256 272 112 272
WIRE 384 272 256 272
WIRE 496 272 384 272
WIRE 176 304 176 160
WIRE 336 304 336 160
WIRE 464 304 464 160
WIRE 576 304 576 160
IOPIN 80 64 In
IOPIN 80 272 In
IOPIN 576 304 Out
IOPIN 464 304 Out
IOPIN 336 304 Out
IOPIN 176 304 Out
SYMBOL res 368 48 R0
SYMATTR InstName R5
SYMATTR Value 1404
SYMBOL res 480 48 R0
SYMATTR InstName R7
SYMATTR Value 1809
SYMBOL res 368 176 R0
SYMATTR InstName R6
SYMATTR Value 1k
SYMBOL res 96 48 R0
SYMATTR InstName R1
SYMATTR Value 859
SYMBOL res 480 176 R0
SYMATTR InstName R8
SYMATTR Value 1k
SYMBOL res 240 176 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL res 240 48 R0
SYMATTR InstName R3
SYMATTR Value 1092
SYMBOL res 96 176 R0
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 80 64 voltage_ref
FLAG 80 272 GND
FLAG 576 304 30%
FLAG 464 304 50%
FLAG 336 304 70%
FLAG 176 304 90%