Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\325c20281a66_Transistor_ckt_for_bat_full_charge.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N001 N002 330
D2 In N001 NSPW500BS
Q1 N002 N004 0 0 NPN
R1 N003 0 10K
R2 N004 N003 47K
V1 In 0 SINE(11 1.6 1)
D1 N003 In BZX84C12L
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 1 0 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -496 -208 -496 -240
WIRE -64 -208 -496 -208
WIRE 192 -208 -64 -208
WIRE 192 -144 192 -208
WIRE 192 -16 192 -80
WIRE -64 32 -64 -208
WIRE -496 48 -496 -208
WIRE 192 112 192 64
WIRE -64 160 -64 96
WIRE -16 160 -64 160
WIRE 128 160 64 160
WIRE -64 224 -64 160
WIRE -496 352 -496 128
WIRE -64 352 -64 304
WIRE -64 352 -496 352
WIRE 192 352 192 208
WIRE 192 352 -64 352
WIRE 192 368 192 352
SYMBOL voltage -496 32 R0
SYMATTR InstName V1
SYMATTR Value SINE(11 1.6 1)
SYMBOL res 176 -32 R0
SYMATTR InstName R3
SYMATTR Value 330
SYMBOL npn2 128 112 R0
SYMATTR InstName Q1
SYMBOL res -80 208 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL LED 176 -144 R0
SYMATTR InstName D2
SYMATTR Value NSPW500BS
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 80 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 47K
SYMBOL zener -48 96 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BZX84C12L
SYMATTR Description Diode
SYMATTR Type diode
FLAG 192 368 0
FLAG -496 -240 In
TEXT -720 -56 Left 2 !.tran 0 1 0 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\1a8a771de17d_6100.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6100.asy)
I1 N002 0 PULSE(.9 1 100n 1u 1u .5m 1m)
R1 N002 N001 0.01
V1 N001 0 48
V2 +V 0 5
XU1 N002 +V FIL 0 OUT N003 N003 N001 LT6100 ;pnba VS-)VCC)FIL)VEE)VOUT)A2)A4)VS+
.tran 3m
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 112 -96 112
WIRE 80 112 16 112
WIRE 208 112 160 112
WIRE 320 112 208 112
WIRE -96 128 -96 112
WIRE 320 128 320 112
WIRE 208 208 208 112
WIRE 208 208 64 208
WIRE -96 224 -96 208
WIRE 320 224 320 208
WIRE 320 304 288 304
WIRE 208 320 208 304
WIRE 288 320 288 304
WIRE 320 320 320 304
WIRE -96 352 -96 336
WIRE 16 384 16 112
WIRE 160 384 16 384
WIRE 448 416 400 416
WIRE -96 448 -96 432
WIRE 64 448 64 208
WIRE 160 448 64 448
WIRE 272 496 272 480
WIRE 320 496 320 480
SYMBOL current 320 128 R0
WINDOW 123 24 116 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value PULSE(.9 1 100n 1u 1u .5m 1m)
SYMBOL res 176 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 0.01
SYMBOL LT6100 288 448 R0
SYMATTR InstName U1
SYMBOL voltage -96 112 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL voltage -96 336 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
FLAG -96 224 0
FLAG 320 224 0
FLAG -96 448 0
FLAG 448 416 OUT
FLAG 272 496 0
FLAG 320 496 FIL
FLAG -96 336 +V
FLAG 208 304 +V
TEXT 480 504 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\5f09ec375360_Fig23_4.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot VREF
R1 VDD VREF 1Meg TC1=0.002
M6B VREF VREF 0 0 N_1u l=2u w=10u
VDD VDD 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib cmosedu_models.txt
.DC VDD 4 6 1m
.step temp 0 100 25
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1784 680
WIRE 1104 -32 1104 -64
WIRE 1104 -16 1104 -32
WIRE 1312 112 1312 16
WIRE 1328 112 1312 112
WIRE 1376 -96 1376 -160
WIRE 1376 0 1376 -16
WIRE 1376 16 1312 16
WIRE 1376 16 1376 0
WIRE 1376 32 1376 16
WIRE 1376 160 1376 128
WIRE 1488 0 1376 0
SYMBOL res 1360 -112 R0
SYMATTR InstName R1
SYMATTR Value 1MEG TC1=0.002
SYMBOL voltage 1104 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL nmos4 1328 32 R0
WINDOW 123 56 100 Left 0
WINDOW 0 69 31 Left 0
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M6B
SYMATTR Value N_1u
FLAG 1104 64 0
FLAG 1104 -32 VDD
FLAG 1376 80 0
FLAG 1376 160 0
FLAG 1376 -160 VDD
FLAG 1488 0 VREF
TEXT 1016 136 Left 0 !.lib cmosedu_models.txt
TEXT 1160 -152 Left 0 ;Plot VREF
TEXT 1016 112 Left 0 !.DC VDD 4 6 1m
TEXT 1016 160 Left 0 !.step temp 0 100 25
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6020.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6020.asy)
V4 REF 0 2.5
C1 OUT N001 10p
V3 DAC_OUT 0 PULSE(0 2.5 20u 170n 170n 1m 2m)
V2 -V 0 -15
R3 OUT N003 30K
XU1 DAC_OUT N001 +V -V OUT LT6020 ;pnba IN+)IN-)V+)V-)OUT
XU2 N003 N002 +V -V N002 LT6020 ;pnba IN+)IN-)V+)V-)OUT
R2 N001 REF 10K
V1 +V 0 15
R1 N002 N001 10K
R4 N003 0 10K
.tran 200u
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 928 1032
WIRE -144 304 -240 304
WIRE -32 304 -64 304
WIRE -16 304 -32 304
WIRE 528 304 64 304
WIRE -240 320 -240 304
WIRE -32 384 -32 304
WIRE 64 384 -32 384
WIRE 176 384 128 384
WIRE -512 400 -512 384
WIRE -400 400 -400 384
WIRE -240 416 -240 400
WIRE -512 496 -512 480
WIRE -400 496 -400 480
WIRE -32 512 -32 384
WIRE 48 512 -32 512
WIRE 176 528 176 384
WIRE 176 528 144 528
WIRE 272 528 176 528
WIRE 48 544 -272 544
WIRE -272 560 -272 544
WIRE 528 576 528 304
WIRE 528 576 384 576
WIRE 272 592 272 528
WIRE -272 656 -272 640
WIRE 384 656 384 576
WIRE 416 656 384 656
WIRE 528 672 528 576
WIRE 528 672 512 672
WIRE 272 688 272 672
WIRE 416 688 272 688
WIRE 272 704 272 688
WIRE 272 800 272 784
SYMBOL res 256 688 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 256 576 R0
SYMATTR InstName R3
SYMATTR Value 30K
SYMBOL cap 128 368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage -512 384 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL LT6020 96 528 R0
SYMATTR InstName U1
SYMBOL res -48 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 80 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL LT6020 464 672 R0
SYMATTR InstName U2
SYMBOL voltage -400 384 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -240 304 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 2.5
SYMBOL voltage -272 544 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 2.5 20u 170n 170n 1m 2m)
FLAG -512 496 0
FLAG -400 496 0
FLAG -272 656 0
FLAG -272 544 DAC_OUT
FLAG 272 528 OUT
FLAG 80 480 +V
FLAG -512 384 +V
FLAG -400 384 -V
FLAG 272 800 0
FLAG -240 416 0
FLAG -240 304 REF
FLAG 80 576 -V
FLAG 448 624 +V
FLAG 448 720 -V
TEXT 448 784 Left 2 !.tran 200u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1740-1.1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1740-1.1.asy)
C1 OUT 0 4.7 Rser=3m
C2 N002 0 10n
V1 IN 0 1.8
XU1 IN OUT IN N002 OUT N001 MP_01 0 ADP1740-1.1 ;pnba Vin)Sense)EN)SS)Vout)PG))GND
Rload OUT 0 0.55
R1 IN N001 100k
.tran 10m startup
.lib ADP1740-1.1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE -112 32 -128 32
WIRE -16 32 -112 32
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 416 32 368 32
WIRE 496 32 416 32
WIRE 528 32 496 32
WIRE -128 48 -128 32
WIRE -16 48 -16 32
WIRE 416 48 416 32
WIRE 528 48 528 32
WIRE 80 96 80 32
WIRE 96 96 80 96
WIRE -128 144 -128 128
WIRE 416 144 416 112
WIRE 528 144 528 128
WIRE -16 176 -16 128
WIRE 96 176 -16 176
WIRE 16 240 0 240
WIRE 96 240 80 240
WIRE 368 240 368 32
WIRE 368 240 352 240
WIRE 224 304 224 288
SYMBOL voltage -128 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL cap 80 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res -32 32 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL cap 400 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=3m
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 0.55
SYMBOL ADP1740-1.1 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -128 144 0
FLAG 0 240 0
FLAG -112 32 IN
FLAG 528 144 0
FLAG 416 144 0
FLAG 496 32 OUT
TEXT 128 352 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\c6f172b45764_Assignment_3a__v_.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Half Wave Rectifier Circuit (with 10microF Capacitor) (Ideal)
D1 N001 N002 1N4148
R1 N002 0 1000
C1 N002 0 0.00001
V1 N001 0 SINE(0 311 50) Rser=0.001
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 64 80 64
WIRE 352 64 256 64
WIRE 464 64 352 64
WIRE 80 112 80 64
WIRE 352 112 352 64
WIRE 464 128 464 64
WIRE 80 240 80 192
WIRE 176 240 80 240
WIRE 352 240 352 192
WIRE 352 240 176 240
WIRE 464 240 464 192
WIRE 464 240 352 240
WIRE 176 272 176 240
SYMBOL res 336 96 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL diode 192 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL cap 448 128 R0
SYMATTR InstName C1
SYMATTR Value 0.00001
SYMBOL voltage 80 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.001
SYMATTR InstName V1
SYMATTR Value SINE(0 311 50)
FLAG 176 272 0
TEXT 16 272 Left 2 !.tran 0.05
TEXT 264 8 Center 2 ;Positive Half Wave Rectifier Circuit (with 10microF Capacitor) (Ideal)
* Z:\tmp\asc_dec_bjh7r6w2\00ec25ef0cb3_cascode_current_mirror_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
M4 N002 N002 N004 N004 IRFH5207
V1 N001 0 5
V2 0 N005 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 -336 -80 -336
WIRE -80 -304 -80 -336
WIRE 112 -304 112 -336
WIRE 112 -160 112 -224
WIRE 208 -160 112 -160
WIRE 112 -112 112 -160
WIRE 208 -32 208 -160
WIRE 208 -32 160 -32
WIRE 352 -32 208 -32
WIRE 400 0 288 0
WIRE 112 64 112 -16
WIRE 288 144 288 0
WIRE 112 256 112 160
WIRE 288 256 112 256
WIRE 400 256 400 160
WIRE 400 256 288 256
WIRE 288 272 288 256
WIRE 288 384 288 352
SYMBOL nmos 160 -112 M0
SYMATTR InstName M4
SYMATTR Value IRFH5207
SYMBOL voltage -80 -320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 288 368 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
FLAG -80 -224 0
FLAG 288 384 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1880.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 1.5
V2 -V 0 -1.5
R1 N003 N002 100K
R2 N002 N001 1Meg
V3 N001 0 SINE(0 13.5 1K)
XU1 0 N002 +V -V N003 LT1880 ;pnba In+)In-)V+)V-)OUT
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1880.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 0 96 -112 96
WIRE 128 96 80 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -112 112 -112 96
WIRE -368 128 -368 112
WIRE -240 128 -240 112
WIRE -112 208 -112 192
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE -368 240 -368 208
WIRE -240 240 -240 208
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 160 256 128 256
WIRE 192 288 192 272
FLAG -240 240 0
FLAG 192 192 +V
FLAG -240 112 +V
FLAG 192 288 -V
FLAG -368 240 0
FLAG -368 112 -V
FLAG -112 208 0
FLAG 128 256 0
SYMBOL voltage -240 112 R0
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL voltage -368 112 R0
SYMATTR InstName V2
SYMATTR Value -1.5
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 96 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL voltage -112 96 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 13.5 1K)
SYMBOL opamps\\LT1880 192 240 R0
SYMATTR InstName U1
TEXT -72 304 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2942-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2942-1.asy)
Vbatt IN 0 3.7
V2 N002 0 PULSE(3.75 3.65 1s 10m 10m 1 2)
XU1 IN 0 N004 N005 N003 N002 N001 LTC2942-1 B_Reg=60 CD_Reg=32767 EF_Reg=65535 EF_Reg=65535 GH_Reg=0 GH_Reg=0 K_Reg=255 L_Reg=0 ;pnba Sense+)GND)StatusReg)ACRreg)_AL/CC)Sense-)VoltReg
R1 IN N003 10K
.tran 5
.lib LTC2942-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1432 680
WIRE 64 -80 -144 -80
WIRE 848 -80 64 -80
WIRE -144 -64 -144 -80
WIRE 256 -32 256 -48
WIRE 64 16 64 -80
WIRE 96 16 64 16
WIRE 592 16 416 16
WIRE 720 16 672 16
WIRE -144 32 -144 16
WIRE 96 112 64 112
WIRE 480 112 416 112
WIRE 848 112 848 -80
WIRE 848 112 560 112
WIRE 96 208 64 208
WIRE 448 208 416 208
SYMBOL LTC2942-1 256 112 R0
SYMATTR InstName U1
SYMATTR Value B_Reg=60 CD_Reg=32767 EF_Reg=65535
SYMBOL res 576 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -144 -80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vbatt
SYMATTR Value 3.7
SYMBOL voltage 576 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value PULSE(3.75 3.65 1s 10m 10m 1 2)
FLAG -144 32 0
FLAG 64 112 0
FLAG 720 16 0
FLAG -144 -80 IN
TEXT 600 272 Left 2 !.tran 5
* Z:\home\khalils\Downloads\files\data\raw_asc\147f3b4d5da9_SR_Latch.asc
* Generated by LTspice 26.0.1 for Windows.
A2 0 Din 0 Q 0 Q` 0 0 AND VHigh=5
A1 0 N001 0 Q` 0 Q 0 0 AND VHigh=5
A3 Din 0 0 0 0 N001 0 0 BUF VHigh=5
V1 Vdd 0 5
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 208 -80 208
WIRE 368 208 0 208
WIRE 368 240 256 240
WIRE 464 240 432 240
WIRE 496 240 464 240
WIRE 0 304 0 208
WIRE 256 320 256 240
WIRE 432 320 256 320
WIRE 464 352 464 240
WIRE 464 352 256 352
WIRE 256 448 256 352
WIRE 368 448 256 448
WIRE 432 448 432 320
WIRE 496 448 432 448
WIRE 0 480 0 368
WIRE 368 480 0 480
IOPIN -80 208 In
IOPIN 496 240 Out
IOPIN 496 448 Out
SYMBOL Digital\\inv 64 304 R90
WINDOW 123 8 60 Left 2
SYMATTR InstName A3
SYMATTR Value2 VHigh=5
SYMBOL Digital\\and 400 528 M180
WINDOW 123 16 -4 Left 2
SYMATTR InstName A1
SYMATTR Value2 VHigh=5
SYMBOL voltage -176 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL Digital\\and 400 160 R0
WINDOW 123 16 52 Left 2
SYMATTR InstName A2
SYMATTR Value2 VHigh=5
FLAG -176 400 0
FLAG -176 320 Vdd
FLAG -80 208 Din
FLAG 496 240 Q`
FLAG 496 448 Q
TEXT -208 592 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2118-ADJ.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2118-ADJ.asy)
R1 OUT N001 100K
XU1 IN IN IN N003 0 0 N002 IN IN IN N001 ADP2118-x.x Rtop=10 Rbot=1T Ctop=4p ;pnba Sync/Mode)FREQ)TRK)FB)GND)PGND)SW)Pvin)Vin)EN)Pgood
V1 IN 0 5
C1 OUT 0 147
L1 N002 OUT 1
Rload OUT 0 1.1
R2 OUT N003 13.5K
R3 N003 0 3K
.tran 2m startup
.lib ADP2118-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1220 680
WIRE 128 0 48 0
WIRE 288 0 128 0
WIRE 48 16 48 0
WIRE 288 32 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 656 64 576 64
WIRE 48 112 48 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 656 144 656 64
WIRE 656 144 560 144
WIRE 800 144 656 144
WIRE 560 160 560 144
WIRE 800 160 800 144
WIRE 656 192 656 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 560 256 560 224
WIRE 800 256 800 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 656 304 656 272
WIRE 656 304 416 304
WIRE 656 320 656 304
WIRE 128 384 128 304
WIRE 160 384 128 384
WIRE 656 416 656 400
WIRE 288 432 288 416
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL PowerProducts\\ADP2118-ADJ 288 272 R0
SYMATTR InstName U1
SYMBOL res 640 304 R0
SYMATTR InstName R3
SYMATTR Value 3K
SYMBOL voltage 48 0 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 1.1
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 147
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL res 640 176 R0
SYMATTR InstName R2
SYMATTR Value 13.5K
FLAG 560 256 0
FLAG 288 432 0
FLAG 48 112 0
FLAG 800 144 OUT
FLAG 800 256 0
FLAG 48 0 IN
FLAG 656 416 0
TEXT 800 400 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1191.asc
* Generated by LTspice 26.0.1 for Windows.
* Double Terminated Cable Driver
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1191.asy)
R3 N002 N003 75
R4 OUT 0 75
V1 +V 0 5
R1 N002 N001 1K
T1 N003 0 OUT 0 Td=50n Z0=75
R2 N001 0 1K
V3 IN 0 AC 1
V2 -V 0 -5
XU1 IN N001 +V -V N002 NC_01 LT1191 ;pnba In+)In-)V+)V-)OUT)SHDN
.ac oct 100 100K 100Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 112 16 112
WIRE 128 112 112 112
WIRE 144 112 128 112
WIRE 256 112 224 112
WIRE -240 176 -240 160
WIRE -112 176 -112 160
WIRE 176 208 176 192
WIRE 128 224 128 112
WIRE 160 224 128 224
WIRE 256 240 256 112
WIRE 256 240 224 240
WIRE 320 240 256 240
WIRE 464 240 400 240
WIRE 688 240 560 240
WIRE 160 256 64 256
WIRE 688 256 688 240
WIRE -240 272 -240 256
WIRE -112 272 -112 256
WIRE 64 272 64 256
WIRE 464 272 416 272
WIRE 608 272 560 272
WIRE 176 288 176 272
WIRE 688 352 688 336
WIRE 64 368 64 352
SYMBOL voltage 64 256 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 240 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -112 160 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL opamps\\LT1191 192 240 R0
SYMATTR InstName U1
SYMBOL res 672 240 R0
SYMATTR InstName R4
SYMATTR Value 75
SYMBOL res 304 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 75
SYMBOL tline 512 256 R0
SYMATTR InstName T1
SYMATTR Value Td=50n Z0=75
SYMBOL voltage -240 160 R0
SYMATTR InstName V2
SYMATTR Value -5
FLAG -112 272 0
FLAG 176 192 +V
FLAG -112 160 +V
FLAG 176 288 -V
FLAG -240 272 0
FLAG -240 160 -V
FLAG 16 112 0
FLAG 64 368 0
FLAG 688 352 0
FLAG 608 272 0
FLAG 416 272 0
FLAG 688 240 OUT
FLAG 64 256 IN
TEXT 320 352 Left 2 !.ac oct 100 100K 100Meg
TEXT 176 40 Left 2 ;Double Terminated Cable Driver
* Z:\home\khalils\Downloads\files\data\raw_asc\6eb51c736fd0_Diode-Clipper-6.asc
* Generated by LTspice 26.0.1 for Windows.
Rload 0 b 5k
R1 b a 10
D1 b 0 VS-E5TH1506
V1 a 0 SINE(0 24V 100kHz)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 50u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 144 -96 144
WIRE 208 144 112 144
WIRE 336 144 208 144
WIRE 480 144 336 144
WIRE 480 208 480 144
WIRE -96 224 -96 144
WIRE 208 224 208 144
WIRE -96 368 -96 304
WIRE 48 368 -96 368
WIRE 208 368 208 288
WIRE 208 368 48 368
WIRE 480 368 480 288
WIRE 480 368 208 368
WIRE 48 400 48 368
SYMBOL Misc\\EuropeanResistor 496 304 R180
WINDOW 0 -66 73 Left 2
WINDOW 3 -47 36 Left 2
SYMATTR InstName Rload
SYMATTR Value 5k
SYMBOL diode 192 224 R0
WINDOW 3 -53 170 Left 2
WINDOW 0 32 2 Left 2
SYMATTR Value VS-E5TH1506
SYMATTR InstName D1
SYMBOL Misc\\EuropeanResistor 128 128 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL Misc\\signal -96 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 38 63 Left 2
SYMATTR Value SINE(0 24V 100kHz)
SYMATTR InstName V1
FLAG -96 144 a
FLAG 336 144 b
FLAG 48 400 0
TEXT -136 408 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\2690cb28dedc_voltage_divider.asc
* Generated by LTspice 26.0.1 for Windows.
* SIMPLE VOLTAGE DIVIDER
V1 vin 0 10
R1 vout vin 1
R2 0 vout 1
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 112 32 112
WIRE 256 112 256 96
WIRE 256 112 240 112
WIRE 320 112 256 112
WIRE 432 112 400 112
WIRE 32 160 32 112
WIRE 32 288 32 240
WIRE 432 288 432 112
WIRE 432 288 32 288
IOPIN 32 112 In
IOPIN 256 96 Out
SYMBOL voltage 32 144 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL res 416 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
FLAG 32 288 0
FLAG 32 112 vin
FLAG 256 96 vout
TEXT 64 -8 Left 2 ;SIMPLE VOLTAGE DIVIDER
TEXT -128 24 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\fff5ecf42024_circuito1.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Circuito para verificar los errores de DC.
R1 N001 v1 1000
I1 N001 0 10n
V3 N004 0 -10
V1 v1 0 SINE(0 0 0) Rser=50
V5 N003 0 SINE(0 0.002 0)
R3 Vo N001 30000
V4 N002 0 10
R2 N001 v2 1000
XU1 N003 N001 N002 N004 Vo LM324 ;pnba In+)In-)V+)V-)OUT
V2 v2 0 0 Rser=50
.inc LM324.lib
.tran 0 0.003 0 0.0001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -80 16 -112 16
WIRE 96 16 -16 16
WIRE 160 16 96 16
WIRE 320 16 240 16
WIRE -112 48 -112 16
WIRE 384 80 192 80
WIRE -80 96 -80 16
WIRE -16 96 -80 96
WIRE 192 112 192 80
WIRE -112 128 -224 128
WIRE 16 128 -112 128
WIRE 96 128 96 16
WIRE 160 128 96 128
WIRE 320 144 320 16
WIRE 320 144 224 144
WIRE 400 144 320 144
WIRE 160 160 128 160
WIRE -32 208 -48 208
WIRE 16 208 -32 208
WIRE 96 208 96 128
WIRE 128 208 128 160
WIRE 192 240 192 176
WIRE 128 320 128 288
SYMBOL voltage -48 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL res 112 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL res 112 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1000
SYMBOL voltage 128 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value SINE(0 0.002 0)
SYMBOL current -16 16 R0
SYMATTR InstName I1
SYMATTR Value 10n
SYMBOL voltage -224 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V1
SYMATTR Value SINE(0 0 0)
SYMBOL voltage 192 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -10
SYMBOL opamp2 192 80 R0
SYMATTR InstName U1
SYMATTR Value LM324
SYMBOL voltage 384 96 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 10
SYMBOL res 256 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 30000
FLAG -224 208 0
FLAG -48 288 0
FLAG 192 320 0
FLAG 384 0 0
FLAG 400 144 Vo
FLAG -112 128 v1
FLAG -32 208 v2
FLAG 128 320 0
FLAG -112 48 0
TEXT -360 352 Left 2 !.inc LM324.lib
TEXT -360 376 Left 2 !.tran 0 0.003 0 0.0001
TEXT -504 -32 Left 2 ;Circuito para verificar los errores de DC.