Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\166bab3509f7_01_CrystalModel_10MHz_0Z_load.asc
* Generated by LTspice 26.0.1 for Windows.
Cp N001 N004 3e-12
Vs N001 0 AC 1
Ls N002 N003 1.03450713
Rs N001 N002 65
VOut N004 0 0
Cs N003 N004 .244853759f
.ac lin 1e3 9.99999Meg 10.00001Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 176 0 176
WIRE 160 176 112 176
WIRE 304 176 240 176
WIRE 416 176 368 176
WIRE 0 272 0 176
WIRE 160 272 0 272
WIRE 416 272 416 176
WIRE 416 272 224 272
WIRE 0 288 0 272
WIRE 416 288 416 272
WIRE 0 384 0 368
WIRE 416 384 416 368
SYMBOL ind 144 192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
SYMATTR InstName Ls
SYMATTR Value 1.03450713
SYMBOL voltage 0 272 R0
WINDOW 123 38 45 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName Vs
SYMATTR Value ""
SYMBOL cap 160 288 R270
WINDOW 0 36 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName Cp
SYMATTR Value 3e-12
SYMBOL cap 304 192 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName Cs
SYMATTR Value .244853759f
SYMBOL res 16 192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName Rs
SYMATTR Value 65
SYMBOL voltage 416 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 38 48 Left 0
SYMATTR Value 0
SYMATTR InstName Out
FLAG 0 384 0
FLAG 416 384 0
TEXT 8 368 Left 0 !.ac lin 1e3 9.99999Meg 10.00001Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\10dace6d6683_NOR.asc
* Generated by LTspice 26.0.1 for Windows.
M1 S A 0 0 NMOS
M3 S B P001 P001 PMOS
M4 P001 A N001 N001 PMOS
V2 A 0 PULSE(5 0 0 30n 30n 2m 4m)
V+5V N001 0 5V
V3 B 0 PULSE(5 0 0 30n 30n 1m 2m)
M2 S B 0 0 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 48 80 48
WIRE 352 80 352 48
WIRE 304 96 256 96
WIRE -224 160 -400 160
WIRE 80 192 80 48
WIRE 304 192 256 192
WIRE -224 208 -304 208
WIRE -400 240 -400 160
WIRE -304 240 -304 208
WIRE 352 288 352 272
WIRE 528 288 352 288
WIRE 352 304 352 288
WIRE 352 304 272 304
WIRE 432 304 352 304
WIRE 272 336 272 304
WIRE 432 336 432 304
WIRE -400 384 -400 320
WIRE -352 384 -400 384
WIRE -304 384 -304 320
WIRE -304 384 -352 384
WIRE -352 416 -352 384
WIRE 224 416 192 416
WIRE 512 416 480 416
WIRE 80 464 80 272
WIRE 224 464 80 464
WIRE 272 464 272 432
WIRE 272 464 224 464
WIRE 432 464 432 432
WIRE 432 464 272 464
WIRE 224 496 224 464
SYMBOL pmos 304 176 M180
SYMATTR InstName M4
SYMBOL nmos 480 336 M0
SYMATTR InstName M2
SYMBOL voltage -400 224 R0
WINDOW 3 -339 32 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(5 0 0 30n 30n 2m 4m)
SYMATTR InstName V2
SYMBOL voltage 80 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName +5V
SYMATTR Value 5V
SYMBOL voltage -304 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(5 0 0 30n 30n 1m 2m)
SYMBOL pmos 304 272 M180
SYMATTR InstName M3
SYMBOL nmos 224 336 R0
SYMATTR InstName M1
FLAG -352 416 0
FLAG -224 160 A
FLAG -224 208 B
FLAG 256 96 A
FLAG 256 192 B
FLAG 224 496 0
FLAG 192 416 A
FLAG 512 416 B
FLAG 528 288 S
TEXT -352 520 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\601d8bc3f55c_24_09_10_Bomen_Cell.asc
* Generated by LTspice 26.0.1 for Windows.
D113 N001 - Jinko390
I113 - N001 10.11
Rsh112 N001 - 1200
Rs112 N001 + 3.2m
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model Jinko390 D(IS=2e-11 N=0.966)
.dc V1 0 0.7 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 9108 680
WIRE -2000 48 -2176 48
WIRE -1744 48 -2000 48
WIRE -1664 48 -1744 48
WIRE -1488 48 -1584 48
WIRE -2176 128 -2176 48
WIRE -2000 128 -2000 48
WIRE -1744 128 -1744 48
WIRE -2176 272 -2176 208
WIRE -2000 272 -2000 192
WIRE -2000 272 -2176 272
WIRE -1744 272 -1744 208
WIRE -1744 272 -2000 272
WIRE -1488 272 -1744 272
IOPIN -1488 272 BiDir
IOPIN -1488 48 BiDir
SYMBOL res -1760 112 R0
SYMATTR InstName Rsh112
SYMATTR Value 1200
SYMBOL res -1680 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rs112
SYMATTR Value 3.2m
SYMBOL current -2176 208 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I113
SYMATTR Value 10.11
SYMBOL diode -2016 128 R0
SYMATTR InstName D113
SYMATTR Value Jinko390
FLAG -1488 272 -
FLAG -1488 48 +
TEXT -2176 328 Left 2 !.model Jinko390 D(IS=2e-11 N=0.966)
TEXT -2176 368 Left 2 !.dc V1 0 0.7 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\45499092219c_Draft9.asc
* Generated by LTspice 26.0.1 for Windows.
M1 vout vin 0 0 NMOS l=90nm w=Wn
M2 N001 vin vout N001 PMOS l=90nm w=Wp
V1 vin 0
V2 N001 0 1.2
C1 vout 0 50f
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.step param Wn 135nm 225nm 45nm
.step param Wp 405nm 495nm 45nm
.dc V1 0 1.2 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 32 192 32
WIRE 368 32 240 32
WIRE 192 48 192 32
WIRE 368 80 368 32
WIRE 240 96 240 32
WIRE 240 96 192 96
WIRE 144 128 128 128
WIRE 128 144 128 128
WIRE 128 144 16 144
WIRE 16 160 16 144
WIRE 368 176 368 160
WIRE 464 176 368 176
WIRE 192 192 192 144
WIRE 352 192 192 192
WIRE 400 192 352 192
WIRE 464 192 464 176
WIRE 352 208 352 192
WIRE 224 240 192 240
WIRE 400 256 400 192
WIRE 432 256 400 256
WIRE 128 272 128 144
WIRE 144 272 128 272
WIRE 16 288 16 240
WIRE 224 288 224 240
WIRE 224 288 192 288
WIRE 352 304 352 272
WIRE 384 304 352 304
WIRE 192 320 192 288
WIRE 384 320 384 304
FLAG 192 320 0
FLAG 464 192 0
FLAG 384 320 0
FLAG 432 256 vout
IOPIN 432 256 Out
FLAG 16 144 vin
IOPIN 16 144 In
FLAG 16 288 0
SYMBOL nmos4 144 192 R0
SYMATTR InstName M1
SYMATTR Value2 l=90nm w=Wn
SYMBOL pmos4 144 48 R0
SYMATTR InstName M2
SYMATTR Value2 l=90nm w=Wp
SYMBOL voltage 16 144 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL voltage 368 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.2
SYMBOL cap 336 208 R0
SYMATTR InstName C1
SYMATTR Value 50f
TEXT 328 16 Left 2 !.step param Wn 135nm 225nm 45nm
TEXT 416 112 Left 2 !.step param Wp 405nm 495nm 45nm
TEXT -24 24 Left 2 !.dc V1 0 1.2 0.01
* Z:\tmp\asc_dec_bjh7r6w2\183d1e343c37_Opamp_4DioPwm2_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
Rd1 N004 N006 100k
Rf N001 Out 10k
D2 Ramp N005 1N914
D3 N002 N005 1N914
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1444 680
WIRE 208 160 48 160
WIRE 400 160 288 160
WIRE 416 160 400 160
WIRE 48 176 48 160
WIRE 16 208 0 208
WIRE 96 208 80 208
WIRE 528 208 288 208
WIRE 624 208 528 208
WIRE 288 224 288 208
WIRE 256 240 192 240
WIRE 0 256 0 208
WIRE 96 256 96 208
WIRE 400 256 400 160
WIRE 400 256 320 256
WIRE 256 272 224 272
WIRE 400 272 400 256
WIRE 528 272 528 208
WIRE 624 336 624 208
WIRE 0 352 0 320
WIRE 96 352 96 320
WIRE 96 352 0 352
WIRE 192 352 192 240
WIRE 192 352 96 352
WIRE 224 368 224 272
WIRE 400 368 400 352
WIRE 400 368 224 368
WIRE 528 368 528 352
WIRE 528 368 400 368
WIRE 0 384 0 352
WIRE 96 384 96 352
WIRE 224 384 224 368
WIRE 624 432 624 416
WIRE 624 432 592 432
WIRE 592 448 592 432
WIRE 0 480 0 448
WIRE 48 480 0 480
WIRE 96 480 96 448
WIRE 96 480 48 480
WIRE 128 480 96 480
WIRE 224 480 224 464
WIRE 224 480 192 480
WIRE 288 480 288 288
WIRE 288 480 224 480
WIRE 624 480 624 432
WIRE 624 480 288 480
SYMBOL res 512 256 R0
SYMATTR InstName Rd1
SYMATTR Value 100k
SYMBOL res 192 176 R270
WINDOW 0 -26 6 VTop 0
WINDOW 3 0 73 VBottom 0
SYMATTR InstName Rf
SYMATTR Value 10k
SYMBOL diode 112 448 R180
WINDOW 0 -35 44 Left 0
WINDOW 3 -68 22 Left 0
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL diode -16 256 R0
WINDOW 0 36 35 Left 0
WINDOW 3 20 62 Left 0
SYMATTR InstName D3
SYMATTR Value 1N914
FLAG 592 448 0
FLAG 48 480 Ramp
FLAG 416 160 Out
* Z:\home\khalils\Downloads\files\data\raw_asc\5a7b896509ff_cmos_inverter.asc
* Generated by LTspice 26.0.1 for Windows.
* CMOS Inverter
M2 Y A 0 0 NMOS
V2 A 0 PULSE(0 2 2 0.001 0.001 2 4)
V1 vdd 0 2
M1 Y A vdd vdd PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 48 336 16
WIRE 368 48 336 48
WIRE 288 64 256 64
WIRE 368 96 368 48
WIRE 368 96 336 96
WIRE 256 176 256 64
WIRE 256 176 240 176
WIRE 336 176 336 144
WIRE 400 176 336 176
WIRE 336 192 336 176
WIRE 368 240 336 240
WIRE 256 272 256 176
WIRE 288 272 256 272
WIRE 368 288 368 240
WIRE 368 288 336 288
WIRE 336 320 336 288
IOPIN 336 16 In
IOPIN 32 80 In
IOPIN 32 240 In
IOPIN 400 176 Out
IOPIN 240 176 In
SYMBOL voltage 32 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL nmos4 288 192 R0
SYMATTR InstName M2
SYMBOL voltage 32 224 R0
WINDOW 3 24 96 Left 1
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 2 2 0.001 0.001 2 4)
SYMATTR InstName V2
SYMBOL pmos4 288 144 M180
SYMATTR InstName M1
FLAG 336 320 0
FLAG 32 160 0
FLAG 32 320 0
FLAG 336 16 vdd
FLAG 32 80 vdd
FLAG 32 240 A
FLAG 400 176 Y
FLAG 240 176 A
TEXT -32 344 Left 2 !.tran 10
TEXT 104 -72 Left 2 ;CMOS Inverter
* Z:\home\khalils\Downloads\files\data\raw_asc\24c03e797e95_Draft103.asc
* Generated by LTspice 26.0.1 for Windows.
* Can just use a cmos op-amp running at 5V\nAnd a cmos comparator.\nGain has already been added.\nSo noise, and thermal wander of Vos. doesn't matter\nAnd the Vos is within the loop
* No. this isn't right. it is not at an input zero cross.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1006.asy)
;dc V1 0 10 0.01
VIN N004 0 SINE(0 10 50)
V2 VCC 0 5
R2 0 VOUT 10k
R1 N005 N004 10k
Q1 N003 N006 VOUT 0 2N3904
D3 P002 N002 1N4148
D2 N001 P002 1N4148
D1 P001 N001 1N4148
D4 N002 P001 1N4148
V1 0 VEE 5
XU2 N003 N005 VCC VEE N006 LT1006 ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0.1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1316 680
WIRE 496 -240 496 -320
WIRE 624 -240 624 -320
WIRE 96 -160 -16 -160
WIRE 576 0 352 0
WIRE 576 16 576 0
WIRE 240 80 -96 80
WIRE 384 80 320 80
WIRE 512 96 512 64
WIRE 512 96 448 96
WIRE 352 112 352 0
WIRE 384 112 352 112
WIRE -96 128 -96 80
WIRE 576 144 576 112
WIRE 736 144 576 144
WIRE 752 144 736 144
SYMBOL npn 512 16 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL diode 560 -304 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 13 187 VBottom 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL diode 624 -256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 -5 -113 VTop 2
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL diode 496 -304 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 34 179 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL OpAmps\\LT1006 416 32 R0
SYMATTR InstName U2
SYMBOL voltage -16 -256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 55 55 Left 2
SYMATTR Value 5
SYMATTR InstName V2
SYMBOL res 336 64 R90
WINDOW 0 -23 59 VBottom 2
WINDOW 3 -25 66 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -16 -176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 55 55 Left 2
SYMATTR Value 5
SYMATTR InstName V1
SYMBOL res 592 240 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage -96 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value SINE(0 10 50)
SYMATTR InstName VIN
SYMBOL diode 560 -256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 -35 -122 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG -96 208 0
FLAG 96 -160 0
FLAG 448 -96 VOUT
FLAG -16 -240 VCC
FLAG 416 64 VCC
FLAG -16 -80 VEE
FLAG 416 128 VEE
FLAG 144 -32 VEE
FLAG 576 224 0
FLAG 736 144 VOUT
TEXT -168 232 Left 2 !;dc V1 0 10 0.01
TEXT -136 368 Left 2 !.tran 0.1
TEXT 704 -160 Left 2 ;Can just use a cmos op-amp running at 5V\nAnd a cmos comparator.\nGain has already been added.\nSo  noise, and thermal wander of Vos. doesn't matter\nAnd the Vos is within the loop
TEXT 720 48 Left 2 ;No. this isn't right. it is not at an input  zero cross.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3078.asc
* Generated by LTspice 26.0.1 for Windows.
* TA and Rth are the ambient temperature and thermal resistance used in the simulation.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3078.asy)
R3 N004 P001 40.2k
V1 N001 0 5
R1 OUT N003 499k
I3 OUT 0 PULSE(0 4.77 5m 1u 1u 1m 2m)
V2 IN 0 1.65
XU1 IN 0 NC_01 NC_02 N003 N004 OUT N001 TEMP OUT 0 IN N005 NC_03 0 N002 LT3078 TA=25 Rth=42 ;pnba EN)Vo0)Vo1)Vo2)PG)VIOC)OUT)BIAS)TEMP)SENSE)GND)IN)REF)MARG)IMON)BIASF
R2 OUT 0 4.8
C2 OUT 0 10 Rser=2m
C1 N002 0 4.7
C3 P001 0 20p
C4 N005 0 4.7
.tran 10m startup
.lib LT3078.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1988 1664
WIRE 208 1008 -128 1008
WIRE 480 1008 336 1008
WIRE 592 1008 544 1008
WIRE -128 1040 -128 1008
WIRE 208 1040 208 1008
WIRE 336 1040 336 1008
WIRE 80 1104 -32 1104
WIRE 96 1104 80 1104
WIRE 528 1104 448 1104
WIRE 672 1104 608 1104
WIRE -32 1120 -32 1104
WIRE -128 1136 -128 1120
WIRE 80 1168 80 1104
WIRE 96 1168 80 1168
WIRE 560 1168 448 1168
WIRE -32 1216 -32 1200
WIRE 96 1232 80 1232
WIRE 560 1232 560 1168
WIRE 560 1232 448 1232
WIRE 672 1232 672 1104
WIRE 672 1232 560 1232
WIRE 784 1232 672 1232
WIRE 560 1248 560 1232
WIRE 672 1248 672 1232
WIRE 784 1248 784 1232
WIRE 560 1328 560 1312
WIRE 672 1344 672 1328
WIRE 784 1344 784 1328
WIRE 464 1360 448 1360
WIRE 96 1424 64 1424
WIRE 480 1424 448 1424
WIRE 560 1424 544 1424
WIRE 208 1504 208 1488
WIRE 336 1504 336 1488
WIRE 352 1504 336 1504
SYMBOL LT3078 272 1216 R0
SYMATTR InstName U1
SYMBOL cap -16 1408 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 39 53 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 20p
SYMBOL voltage -128 1024 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 624 1088 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 499k
SYMBOL res 80 1408 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 40.2k
SYMBOL cap 480 1440 R270
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 39 53 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 4.7
SYMBOL cap 544 1248 R0
WINDOW 3 26 56 Left 2
SYMATTR Value 10
SYMATTR InstName C2
SYMATTR SpiceLine Rser=2m
SYMBOL res 656 1232 R0
SYMATTR InstName R2
SYMATTR Value 4.8
SYMBOL cap 480 1024 R270
WINDOW 3 0 32 VBottom 2
WINDOW 0 32 32 VTop 2
SYMATTR Value 4.7
SYMATTR InstName C1
SYMBOL voltage -32 1104 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.65
SYMBOL current 784 1248 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I3
SYMATTR Value PULSE(0 4.77 5m 1u 1u 1m 2m)
FLAG 208 1504 0
FLAG -80 1424 0
FLAG 80 1232 0
FLAG -32 1216 0
FLAG -32 1104 IN
FLAG -128 1136 0
FLAG 560 1328 0
FLAG 672 1344 0
FLAG 784 1232 OUT
FLAG 784 1344 0
FLAG 464 1360 0
FLAG 560 1424 0
FLAG 592 1008 0
FLAG 336 1504 TEMP
TEXT 904 1600 Left 2 !.tran 10m startup
TEXT 96 1560 Left 2 ;TA and Rth are the ambient temperature and thermal resistance used in the simulation.
* Z:\home\khalils\Downloads\files\data\raw_asc\692cba18d392_1016.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 +V N003 N001 0 0 0 N002 OUT LT1016 ;pnba V+)In+)In-)V-)LATCH)GND)OUT+)OUT-
V1 +V 0 PWL(0 0 .5u 5)
R1 N002 N001 2K
C1 N001 0 200p
R2 N003 0 4K
R3 +V N003 4K
C2 N003 N004 820p
R4 N004 0 22
CY1 N002 N003 .32p Rser=45 Lser=.78m Cpar=18p
.tran 10u
* 10MHz
* 10MHz to 25MHz Crystal Oscillator
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1016.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE 336 -16 320 -16
WIRE 416 -16 400 -16
WIRE 432 -16 416 -16
WIRE 576 -16 512 -16
WIRE 224 32 224 16
WIRE 416 96 416 -16
WIRE 432 96 416 96
WIRE 576 96 576 -16
WIRE 576 96 512 96
WIRE 224 128 224 112
WIRE 320 128 224 128
WIRE 416 128 320 128
WIRE 432 128 416 128
WIRE 608 128 512 128
WIRE 224 144 224 128
WIRE 320 144 320 128
WIRE 448 176 448 160
WIRE 464 176 464 160
WIRE 464 176 448 176
WIRE 480 176 480 160
WIRE 480 176 464 176
WIRE 464 192 464 176
WIRE 96 208 96 192
WIRE 320 224 320 208
WIRE 224 240 224 224
WIRE 416 240 416 128
WIRE 480 240 416 240
WIRE 576 240 576 96
WIRE 576 240 544 240
WIRE 96 304 96 288
WIRE 320 320 320 304
FLAG 96 304 0
FLAG 464 64 +V
FLAG 224 16 +V
FLAG 320 -16 0
FLAG 224 240 0
FLAG 464 192 0
FLAG 320 320 0
FLAG 96 192 +V
FLAG 608 128 OUT
SYMBOL Comparators\\LT1016 464 48 R0
WINDOW 3 24 102 Left 0
SYMATTR InstName U1
SYMBOL voltage 96 192 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 .5u 5)
SYMBOL res 528 -32 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL cap 400 -32 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C1
SYMATTR Value 200p
SYMBOL res 208 128 R0
SYMATTR InstName R2
SYMATTR Value 4K
SYMBOL res 208 16 R0
SYMATTR InstName R3
SYMATTR Value 4K
SYMBOL cap 304 144 R0
SYMATTR InstName C2
SYMATTR Value 820p
SYMBOL res 304 208 R0
SYMATTR InstName R4
SYMATTR Value 22
SYMBOL misc\\xtal 544 224 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 Invisible 0
SYMATTR InstName Y1
SYMATTR Value .32p
SYMATTR SpiceLine Rser=45 Lser=.78m Cpar=18p
TEXT 528 312 Left 0 !.tran 10u
TEXT 512 264 Top 0 ;10MHz
TEXT 440 -72 Bottom 0 ;10MHz to 25MHz Crystal Oscillator
* Z:\tmp\asc_dec_bjh7r6w2\135f19817ce7_1678_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
XU2 N007 N003 OUT +V -V LT1678 ;pnba IN+)IN-)OUT)VCC)VEE
R8 N006 N008 100
R3 N003 N002 1K
R2 0 N007 30K
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1678.asy)
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2696 680
WIRE -256 -288 -256 -304
WIRE -128 -288 -128 -304
WIRE 112 -224 48 -224
WIRE 352 -208 176 -208
WIRE 416 -208 352 -208
WIRE 512 -208 496 -208
WIRE 544 -208 512 -208
WIRE 640 -208 624 -208
WIRE -256 -192 -256 -208
WIRE -128 -192 -128 -208
WIRE 352 -192 352 -208
WIRE 144 -160 144 -176
WIRE 352 -96 352 -112
WIRE 352 -96 80 -96
WIRE 288 -80 176 -80
WIRE 352 -80 352 -96
WIRE 48 -64 48 -224
WIRE 576 -32 576 -48
WIRE 240 -16 240 -32
WIRE 512 -16 512 -208
WIRE 544 -16 512 -16
WIRE 288 0 288 -80
WIRE 288 0 272 0
WIRE 640 0 640 -208
WIRE 640 0 608 0
WIRE 672 0 640 0
WIRE 176 16 176 -80
WIRE 176 16 80 16
WIRE 208 16 176 16
WIRE 352 16 352 0
WIRE 352 16 320 16
WIRE 544 16 512 16
WIRE 320 32 320 16
WIRE 320 32 272 32
WIRE 352 32 352 16
WIRE 576 48 576 32
WIRE 240 64 240 48
WIRE 352 128 352 112
WIRE 352 128 80 128
WIRE 352 144 352 128
WIRE 144 208 144 192
WIRE 512 240 512 16
WIRE 512 240 496 240
WIRE 528 240 512 240
WIRE 624 240 608 240
SYMBOL voltage -128 -304 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT1678 576 0 R0
SYMATTR InstName U2
SYMBOL res 336 16 R0
SYMATTR InstName R8
SYMATTR Value 100
SYMBOL res 512 -224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL res 624 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 30K
FLAG -128 -192 0
FLAG 144 192 +V
FLAG -128 -304 +V
FLAG -256 -192 0
FLAG -256 -304 -V
FLAG 576 -48 +V
FLAG 576 48 -V
FLAG 240 -32 +V
FLAG 240 64 -V
FLAG 144 -160 +V
FLAG 624 240 0
FLAG 672 0 OUT
* Z:\home\khalils\Downloads\files\data\raw_asc\relax.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
V1 +15 0 15
R2 N002 0 5K
V2 -15 0 -15
C1 N001 0 .02
R1 OUT N001 10K
XU1 N002 N001 +15 -15 OUT LT1001 ;pnba In+)In-)V+)V-)OUT
R3 OUT N002 100K
.tran 15m startup
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1464 1616
WIRE 976 1120 928 1120
WIRE 1072 1120 1040 1120
WIRE 1104 1120 1072 1120
WIRE 1232 1120 1184 1120
WIRE 720 1216 720 1200
WIRE 832 1216 832 1200
WIRE 1072 1232 1072 1120
WIRE 1088 1232 1072 1232
WIRE 1232 1248 1232 1120
WIRE 1232 1248 1152 1248
WIRE 1248 1248 1232 1248
WIRE 1088 1264 1072 1264
WIRE 720 1312 720 1296
WIRE 832 1312 832 1296
WIRE 960 1360 944 1360
WIRE 1072 1360 1072 1264
WIRE 1072 1360 1040 1360
WIRE 1120 1360 1072 1360
WIRE 1232 1360 1232 1248
WIRE 1232 1360 1200 1360
SYMBOL voltage 832 1200 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 1200 1104 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 1056 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL res 1216 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 1040 1104 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .02
SYMBOL voltage 720 1200 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT1001 1120 1184 R0
SYMATTR InstName U1
FLAG 928 1120 0
FLAG 720 1312 0
FLAG 832 1312 0
FLAG 1248 1248 OUT
FLAG 944 1360 0
FLAG 1120 1216 +15
FLAG 720 1200 +15
FLAG 832 1200 -15
FLAG 1120 1280 -15
TEXT 1224 1448 Left 2 !.tran 15m startup
TEXT 992 1472 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\f1c48c0f0c26_ej2.asc
* Generated by LTspice 26.0.1 for Windows.
C1 V1 0 1.58823
C3 V2 0 0.41176
L2 V1 V2 1.1893 Rser=0
RL V2 0 1
I1 0 V1 AC 2
C2 V2 V1 0.093426
.ac dec 1000 1m 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 16 240 16
WIRE 384 16 352 16
WIRE 112 64 -32 64
WIRE 240 64 240 16
WIRE 240 64 112 64
WIRE 384 64 384 16
WIRE 496 64 384 64
WIRE 640 64 496 64
WIRE -32 112 -32 64
WIRE 240 112 240 64
WIRE 272 112 240 112
WIRE 384 112 384 64
WIRE 384 112 336 112
WIRE 640 112 640 64
WIRE 112 128 112 64
WIRE 496 128 496 64
WIRE -32 240 -32 192
WIRE 112 240 112 192
WIRE 112 240 -32 240
WIRE 496 240 496 192
WIRE 496 240 112 240
WIRE 640 240 640 192
WIRE 640 240 496 240
WIRE 112 256 112 240
SYMBOL res 624 96 R0
SYMATTR InstName RL
SYMATTR Value 1
SYMBOL ind 256 32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 1.1893
SYMATTR SpiceLine Rser=0
SYMBOL cap 96 128 R0
SYMATTR InstName C1
SYMATTR Value 1.58823
SYMBOL cap 336 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 0.093426
SYMBOL cap 480 128 R0
SYMATTR InstName C3
SYMATTR Value 0.41176
SYMBOL current -32 192 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 17 -5 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value ""
SYMATTR Value2 AC 2
FLAG 112 256 0
FLAG 112 64 V1
FLAG 496 64 V2
TEXT -144 264 Left 2 !.ac dec 1000 1m 10
* Z:\tmp\asc_dec_bjh7r6w2\1929cd84c71d_nr31_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
M4 NC_01 NC_02 NC_03 NC_04 nch w=2u l=1u
M2 NC_05 NC_06 NC_07 NC_08 pch w=12.6u l=1u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1040 1344
WIRE 224 928 512 928
WIRE 224 416 672 416
WIRE 160 768 352 768
WIRE 736 528 736 464
WIRE 736 656 960 656
WIRE 736 656 736 624
WIRE 736 688 736 656
WIRE 576 880 576 688
WIRE 576 688 736 688
WIRE 736 1040 736 688
WIRE 416 688 576 688
WIRE 576 1168 576 1008
WIRE 416 1168 416 848
WIRE 416 768 448 768
WIRE 448 848 448 768
WIRE 416 848 448 848
WIRE 416 848 416 816
WIRE 576 1008 576 976
WIRE 576 1008 608 1008
WIRE 608 1008 608 928
WIRE 576 928 608 928
WIRE 736 416 768 416
WIRE 768 416 768 256
WIRE 768 576 768 416
WIRE 736 576 768 576
WIRE 288 576 672 576
WIRE 288 1088 672 1088
SYMBOL NMOS 512 928 R0
SYMATTR InstName M4
SYMATTR Value nch
SYMATTR Value2 w=2u l=1u
SYMBOL PMOS 672 576 R0
SYMATTR InstName M2
SYMATTR Value pch
SYMATTR Value2 w=12.6u l=1u