Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3750.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3750.asy)
D1 N001 OUT MURS320
MQ1 N003 N006 N008 N008 FDS6680A
R3 N003 N002 60.4K
R1 N004 IN 100K
V1 IN 0 8
L1 IN N003 10 Rpar=2K Rser=.1
K1 L1 L2 0.99
L2 0 N001 1m Rpar=1Meg
R4 N003 N005 43K
R6 N007 0 2.5K
XU1 IN N004 IN IN 0 N008 N006 N005 N002 N007 LT3750 ;pnba VTRANS)_DONE)CHARGE)VCC)GND)SOURCE)GATE)RDCM)RVOUT)RBG
C1 OUT 0 1
R5 N008 0 12m
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 5m startup
.lib LT3750.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2924 2224
WIRE 1856 1264 1728 1264
WIRE 2032 1264 1856 1264
WIRE 2384 1264 2032 1264
WIRE 2512 1264 2432 1264
WIRE 2624 1264 2576 1264
WIRE 2656 1264 2624 1264
WIRE 2032 1296 2032 1264
WIRE 2384 1296 2384 1264
WIRE 2432 1296 2432 1264
WIRE 2656 1296 2656 1264
WIRE 1856 1344 1856 1264
WIRE 1904 1344 1856 1344
WIRE 2176 1344 2160 1344
WIRE 2304 1344 2256 1344
WIRE 2432 1392 2432 1376
WIRE 2656 1392 2656 1360
WIRE 1728 1424 1728 1264
WIRE 1776 1424 1728 1424
WIRE 1904 1424 1856 1424
WIRE 2208 1424 2160 1424
WIRE 2304 1424 2304 1344
WIRE 2304 1424 2288 1424
WIRE 2384 1424 2384 1376
WIRE 2384 1424 2304 1424
WIRE 1728 1504 1728 1424
WIRE 1904 1504 1728 1504
WIRE 2336 1504 2160 1504
WIRE 1728 1520 1728 1504
WIRE 1808 1584 1792 1584
WIRE 1904 1584 1888 1584
WIRE 2384 1584 2384 1520
WIRE 2384 1584 2160 1584
WIRE 2384 1600 2384 1584
WIRE 1728 1616 1728 1600
WIRE 2032 1648 2032 1632
WIRE 2384 1696 2384 1680
SYMBOL cap 2640 1296 R0
WINDOW 3 27 55 Left 2
SYMATTR Value 1
SYMATTR InstName C1
SYMBOL res 2368 1584 R0
SYMATTR InstName R5
SYMATTR Value 12m
SYMBOL res 1872 1408 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL ind2 2448 1392 R180
WINDOW 0 -3 72 Right 2
WINDOW 3 0 43 Right 2
SYMATTR InstName L2
SYMATTR Value 1m
SYMATTR SpiceLine Rpar=1Meg
SYMBOL LT3750 2032 1456 R0
SYMATTR InstName U1
SYMBOL ind2 2368 1280 R0
WINDOW 0 -6 35 Right 2
WINDOW 3 -4 73 Right 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rpar=2K Rser=.1
SYMBOL res 2272 1328 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 60.4K
SYMBOL diode 2512 1280 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MURS320
SYMBOL nmos 2336 1424 R0
SYMATTR InstName Q1
SYMATTR Value FDS6680A
SYMBOL VOLTAGE 1728 1504 R0
SYMATTR InstName V1
SYMATTR Value 8
SYMBOL res 1904 1568 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 2.5K
SYMBOL res 2304 1408 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 43K
FLAG 2656 1392 0
FLAG 2032 1648 0
FLAG 1728 1616 0
FLAG 2432 1392 0
FLAG 2384 1696 0
FLAG 1792 1584 0
FLAG 1728 1264 IN
FLAG 2624 1264 OUT
TEXT 2488 1568 Left 2 !.tran 5m startup
TEXT 2408 1264 Bottom 2 !K1 L1 L2 0.99
* Z:\home\khalils\Downloads\files\data\raw_asc\Cohn.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
C2 IN 0 {C2}
V1 N004 0 AC 2
C3 N003 OUT {C1}
L1 N001 N005 {L}
C1 N001 IN {C1}
L2 N005 0 {Lm}
R2 OUT 0 {R}
C4 OUT 0 {C2}
L5 N003 N006 {L}
R1 IN N004 {R}
L3 N002 N005 {2*L}
C5 N002 0 {C3}
L6 N006 0 {Lm}
L4 N002 N006 {2*L}
.ac oct 1000 10Meg 22Meg
.param x=.54 ; trimer postion
.param R=50
.param L=2.95u Lm=.27u C1=22p+x*25p C2=240p C3=34p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2316 1728
WIRE 1360 1168 1232 1168
WIRE 1664 1168 1536 1168
WIRE 1760 1168 1664 1168
WIRE 2080 1168 1952 1168
WIRE 1232 1184 1232 1168
WIRE 2080 1184 2080 1168
WIRE 1360 1200 1360 1168
WIRE 1536 1200 1536 1168
WIRE 1760 1200 1760 1168
WIRE 1952 1200 1952 1168
WIRE 1664 1280 1664 1168
WIRE 1072 1296 1024 1296
WIRE 1184 1296 1152 1296
WIRE 1232 1296 1232 1248
WIRE 1232 1296 1184 1296
WIRE 1360 1296 1360 1280
WIRE 1456 1296 1360 1296
WIRE 1536 1296 1536 1280
WIRE 1536 1296 1456 1296
WIRE 1760 1296 1760 1280
WIRE 1872 1296 1760 1296
WIRE 1952 1296 1952 1280
WIRE 1952 1296 1872 1296
WIRE 2080 1296 2080 1248
WIRE 2240 1296 2080 1296
WIRE 2240 1312 2240 1296
WIRE 1024 1328 1024 1296
WIRE 1232 1328 1232 1296
WIRE 1456 1328 1456 1296
WIRE 1872 1328 1872 1296
WIRE 2080 1328 2080 1296
WIRE 1024 1424 1024 1408
WIRE 1232 1424 1232 1392
WIRE 1456 1424 1456 1408
WIRE 1664 1424 1664 1344
WIRE 1872 1424 1872 1408
WIRE 2080 1424 2080 1392
WIRE 2240 1424 2240 1392
SYMBOL ind 1856 1312 R0
SYMATTR InstName L6
SYMATTR Value {Lm}
SYMBOL cap 2064 1184 R0
SYMATTR InstName C3
SYMATTR Value {C1}
SYMBOL cap 2064 1328 R0
SYMATTR InstName C4
SYMATTR Value {C2}
SYMBOL res 2224 1296 R0
SYMATTR InstName R2
SYMATTR Value {R}
SYMBOL ind 1744 1184 R0
SYMATTR InstName L4
SYMATTR Value {2*L}
SYMBOL RES 1168 1280 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R}
SYMBOL ind 1344 1184 R0
SYMATTR InstName L1
SYMATTR Value {L}
SYMBOL cap 1216 1184 R0
SYMATTR InstName C1
SYMATTR Value {C1}
SYMBOL ind 1936 1184 R0
SYMATTR InstName L5
SYMATTR Value {L}
SYMBOL ind 1440 1312 R0
SYMATTR InstName L2
SYMATTR Value {Lm}
SYMBOL cap 1648 1280 R0
SYMATTR InstName C5
SYMATTR Value {C3}
SYMBOL VOLTAGE 1024 1312 R0
WINDOW 3 25 97 Left 2
SYMATTR Value AC 2
SYMATTR InstName V1
SYMBOL ind 1520 1184 R0
SYMATTR InstName L3
SYMATTR Value {2*L}
SYMBOL cap 1216 1328 R0
SYMATTR InstName C2
SYMATTR Value {C2}
FLAG 2080 1424 0
FLAG 1872 1424 0
FLAG 1456 1424 0
FLAG 1232 1424 0
FLAG 1664 1424 0
FLAG 1024 1424 0
FLAG 2240 1424 0
FLAG 2240 1296 OUT
FLAG 1184 1296 IN
TEXT 1920 1480 Left 2 !.ac oct 1000 10Meg 22Meg
TEXT 1152 1472 Left 2 !.param x=.54 ; trimer postion\n.param R=50\n.param L=2.95u Lm=.27u C1=22p+x*25p C2=240p C3=34p
TEXT 1616 1584 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\df9eaff10e15_BJT_output.asc
* Generated by LTspice 26.0.1 for Windows.
VBE N002 0 0
VCE N001 0 1
Q1 N001 N002 0 0 2N2222
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VCE 0 1 0.01 VBE 0.4 1 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 80 160 80
WIRE 160 112 160 80
WIRE 320 128 320 80
WIRE 96 160 16 160
WIRE 16 176 16 160
WIRE 16 288 16 256
WIRE 160 288 160 208
WIRE 320 288 320 208
SYMBOL voltage 16 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VBE
SYMATTR Value 0
SYMBOL voltage 320 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VCE
SYMATTR Value 1
SYMBOL npn 96 112 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
FLAG 16 288 0
FLAG 160 288 0
FLAG 320 288 0
TEXT -16 328 Left 2 !.dc VCE 0 1 0.01 VBE 0.4 1 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\0dfd12ecc166_preamp.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU7, XU8 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R3 N001 V1st 8.6K tol=5
R4 V2nd N001 56K tol=5
XU8 0 N002 +V -V Vout level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R6 N002 V2nd 8.6K tol=5
R5 Vout N002 56K tol=5
XU1 Vi N003 +V -V V1st LF411/MC ;pnba In+)In-)V+)V-)OUT
R2 N003 0 62K
R1 V1st N003 6.2K
XU7 0 N001 +V -V V2nd level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.tran .0005
.inc MJE15034.LIB
.inc MJE15035.LIB
.inc LF411.LIB
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3868 1556
WIRE 864 144 848 144
WIRE 976 144 944 144
WIRE 1344 144 1312 144
WIRE 1472 144 1424 144
WIRE 272 176 208 176
WIRE 272 240 272 176
WIRE 448 240 272 240
WIRE 768 240 736 240
WIRE 848 240 848 144
WIRE 864 240 848 240
WIRE 1200 240 1184 240
WIRE 1312 240 1312 144
WIRE 1312 240 1280 240
WIRE 1344 240 1312 240
WIRE 608 256 512 256
WIRE 688 256 608 256
WIRE 736 256 736 240
WIRE 736 256 688 256
WIRE 976 256 976 144
WIRE 976 256 928 256
WIRE 1056 256 976 256
WIRE 1184 256 1184 240
WIRE 1184 256 1056 256
WIRE 1472 256 1472 144
WIRE 1472 256 1408 256
WIRE 1568 256 1472 256
WIRE 448 272 416 272
WIRE 864 272 832 272
WIRE 1344 272 1312 272
WIRE 608 304 608 256
WIRE 832 320 832 272
WIRE 1312 320 1312 272
WIRE 416 400 416 272
WIRE 608 400 608 384
WIRE 608 400 416 400
WIRE 608 416 608 400
IOPIN 208 176 In
IOPIN 1568 256 Out
IOPIN 496 -48 In
IOPIN 496 0 In
SYMBOL Opamps\\UniversalOpamp2 1376 256 R0
SYMATTR InstName U8
SYMBOL Opamps\\opamp2 480 320 M180
SYMATTR InstName U1
SYMATTR Value LF411/MC
SYMBOL res 864 224 R90
WINDOW 0 0 56 Invisible 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 8.6K
SYMATTR SpiceLine tol=5
SYMBOL res 592 400 R0
SYMATTR InstName R2
SYMATTR Value 62K
SYMBOL res 1440 128 R90
WINDOW 0 0 56 Invisible 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 56K
SYMATTR SpiceLine tol=5
SYMBOL res 1296 224 R90
WINDOW 0 0 56 Invisible 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 8.6K
SYMATTR SpiceLine tol=5
SYMBOL res 592 288 R0
SYMATTR InstName R1
SYMATTR Value 6.2K
SYMBOL Opamps\\UniversalOpamp2 896 256 R0
SYMATTR InstName U7
SYMBOL res 960 128 R90
WINDOW 0 0 56 Invisible 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 56K
SYMATTR SpiceLine tol=5
FLAG 208 176 Vi
FLAG 688 256 V1st
FLAG 832 320 0
FLAG 1056 256 V2nd
FLAG 1312 320 0
FLAG 608 496 0
FLAG 480 288 +V
FLAG 480 224 -V
FLAG 896 288 -V
FLAG 1376 288 -V
FLAG 896 224 +V
FLAG 1376 224 +V
FLAG 1568 256 Vout
FLAG 496 -48 +V
FLAG 496 0 -V
TEXT 168 520 Left 2 !.tran .0005
TEXT 176 592 Left 2 !.inc MJE15034.LIB\n.inc MJE15035.LIB
TEXT 448 576 Left 2 !.inc LF411.LIB
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1085-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1085-3.3.asy)
C1 OUT 0 10
V1 IN 0 PWL(0 0 1 10) Rser=0.1
XU1 0 OUT IN LT1085-3.3 ;pnba GND)OUT)IN
Rload OUT 0 10
.tran 1
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1344 896
WIRE 1952 896 1808 896
WIRE 2064 896 1952 896
WIRE 1344 912 1344 896
WIRE 1952 912 1952 896
WIRE 2064 912 2064 896
WIRE 1344 1008 1344 992
WIRE 1952 1008 1952 976
WIRE 2064 1008 2064 992
WIRE 1680 1024 1680 992
SYMBOL RES 2048 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL VOLTAGE 1344 896 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMATTR SpiceLine Rser=0.1
SYMBOL PowerProducts\\LT1085-3.3 1680 896 R0
SYMATTR InstName U1
SYMBOL cap 1936 912 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 2064 896 OUT
FLAG 2064 1008 0
FLAG 1344 1008 0
FLAG 1952 1008 0
FLAG 1344 896 IN
FLAG 1680 1024 0
TEXT 1968 1088 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1504A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1504A.asy)
C2 N007 0 .01
V1 IN 0 5
R2 N006 0 12.6K
R1 OUT N006 20.4K
L1 N003 OUT 50
R4 N005 N004 5K
C3 N004 0 5000p
R3 IN N001 47K
Rload OUT 0 10
C1 OUT 0 100 Rser=.1
XU1 N001 IN N003 0 N006 N002 N007 N005 LTC1504A top=10 bot=1T ;pnba Imax)Vcc)SW)GND)FB)_SHND)SS)COMP
.tran 5m startup
.lib LTC1504A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2224 1840
WIRE 1328 1264 1120 1264
WIRE 1392 1264 1328 1264
WIRE 1520 1264 1472 1264
WIRE 1120 1280 1120 1264
WIRE 1328 1328 1328 1264
WIRE 1520 1328 1520 1264
WIRE 1120 1376 1120 1360
WIRE 1264 1424 1248 1424
WIRE 1616 1424 1584 1424
WIRE 1728 1424 1696 1424
WIRE 1856 1424 1728 1424
WIRE 1952 1424 1856 1424
WIRE 1728 1440 1728 1424
WIRE 1856 1440 1856 1424
WIRE 1952 1440 1952 1424
WIRE 1168 1520 1120 1520
WIRE 1264 1520 1248 1520
WIRE 1728 1520 1584 1520
WIRE 1120 1536 1120 1520
WIRE 1728 1536 1728 1520
WIRE 1856 1536 1856 1504
WIRE 1952 1536 1952 1520
WIRE 1120 1616 1120 1600
WIRE 1312 1632 1312 1616
WIRE 1536 1632 1536 1616
WIRE 1728 1632 1728 1616
WIRE 1312 1712 1312 1696
SYMBOL res 1264 1504 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 5K
SYMBOL cap 1296 1632 R0
WINDOW 3 24 57 Left 2
SYMATTR Value .01
SYMATTR InstName C2
SYMBOL polcap 1840 1440 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=.1
SYMBOL RES 1936 1424 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL RES 1712 1424 R0
SYMATTR InstName R1
SYMATTR Value 20.4K
SYMBOL VOLTAGE 1120 1264 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 1600 1440 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 50
SYMBOL cap 1104 1536 R0
SYMATTR InstName C3
SYMATTR Value 5000p
SYMBOL PowerProducts\\LTC1504A 1424 1472 R0
SYMATTR InstName U1
SYMBOL res 1712 1520 R0
SYMATTR InstName R2
SYMATTR Value 12.6K
SYMBOL res 1376 1280 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 47K
FLAG 1120 1376 0
FLAG 1536 1632 0
FLAG 1312 1712 0
FLAG 1728 1632 0
FLAG 1856 1536 0
FLAG 1120 1616 0
FLAG 1952 1536 0
FLAG 1952 1424 OUT
FLAG 1120 1264 IN
TEXT 1744 1688 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0ae549c35d23_lab01-Voltage-divider.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vout 0 1000 pwr=0.5
R2 Vin Vout 1000 pwr=0.5
V1 Vin 0 SINE(0 10 100)
.tran 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 32 16 32
WIRE 304 64 304 32
WIRE 16 96 16 32
WIRE 304 176 304 144
WIRE 400 176 304 176
WIRE 304 192 304 176
WIRE 16 240 16 176
WIRE 304 304 304 272
FLAG 16 240 0
FLAG 304 304 0
FLAG 16 32 Vin
FLAG 400 176 Vout
SYMBOL res 288 176 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMATTR SpiceLine pwr=0.5
SYMBOL res 288 48 R0
SYMATTR InstName R2
SYMATTR Value 1000
SYMATTR SpiceLine pwr=0.5
SYMBOL voltage 16 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 100)
TEXT -18 328 Left 0 !.tran 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7172-1.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7172-1.3.asy)
C2 N001 0 1n
C1 OUT 0 4.7 Rser=1.5m
V1 IN 0 2.3
XU1 IN OUT IN N001 OUT 0 ADM7172-1.3 ;pnba Vin)Sense)EN)SS)Vout)GND
Rload OUT 0 1.2
.tran 5m startup
.lib ADM7172-1.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL cap 80 240 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL ADM7172-1.3 224 128 R0
SYMATTR InstName U1
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 1.2
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.3
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG411.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG411.asy)
V1 +V 0 15
V3 N001 0 SINE(0 10 1k)
V4 N003 0 pulse(0 3.3 0 1u 1u 5m 10m)
XU1 N003 N002 N001 -V 0 +V ADG411 ;pnba IN)D)S)Vss)GND)Vdd
V2 -V 0 -15
R1 N002 0 1K
.tran 30m
.lib ADG411.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -96
WIRE -528 -32 -528 -48
WIRE -368 0 -400 0
WIRE -240 0 -288 0
WIRE 0 0 -48 0
WIRE 0 16 0 0
WIRE -528 64 -528 48
WIRE -240 64 -336 64
WIRE 0 112 0 96
WIRE -528 160 -528 144
WIRE -336 160 -336 64
WIRE -208 192 -208 176
WIRE -80 192 -80 176
WIRE -528 256 -528 240
WIRE -336 256 -336 240
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -336 144 R0
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMBOL voltage -528 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -528 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL ADG411 -144 48 R0
SYMATTR InstName U1
SYMBOL voltage -272 0 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 10 1k)
FLAG -528 256 0
FLAG -528 64 0
FLAG -528 -48 +V
FLAG -528 144 -V
FLAG -400 0 0
FLAG -208 192 -V
FLAG -144 -96 +V
FLAG -80 192 0
FLAG -336 256 0
FLAG 0 112 0
TEXT 16 176 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX41400.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX41400.asy)
E2 Ref INM IN 0 0.5
XU1 0 0 0 0 INM INP OUT Ref Vdd Vdd MAX41400 ;pnba G0)G1)G2)GND)INM)INP)OUT)REFIN)SHDN_)VDD
Vref Ref 0 0.9
RL OUT 0 10k
E1 INP Ref IN 0 0.5
Vdd Vdd 0 1.8
Vsin IN 0 PULSE(-10m 10m 500u 1n 1n 1m 2m) AC 1
CL OUT 0 15p
.tran 2m
.lib MAX41400.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1704 904
WIRE 768 32 752 32
WIRE 880 32 848 32
WIRE 880 48 880 32
WIRE 752 96 752 32
WIRE 816 112 784 112
WIRE 848 112 816 112
WIRE 880 112 848 112
WIRE 752 128 752 96
WIRE 784 128 784 112
WIRE 816 128 816 112
WIRE 848 128 848 112
WIRE 880 128 880 112
WIRE 672 192 496 192
WIRE 720 192 672 192
WIRE 496 208 496 192
WIRE 416 224 352 224
WIRE 448 224 416 224
WIRE 944 224 880 224
WIRE 1040 224 944 224
WIRE 672 256 624 256
WIRE 720 256 672 256
WIRE 944 272 944 224
WIRE 1040 272 1040 224
WIRE 496 304 496 288
WIRE 512 304 496 304
WIRE 496 320 496 304
WIRE 416 336 416 224
WIRE 448 336 416 336
WIRE 752 336 752 320
WIRE 800 336 800 320
WIRE 848 352 848 320
WIRE 944 384 944 352
WIRE 1040 384 1040 336
WIRE 352 400 352 224
WIRE 848 400 848 352
WIRE 496 416 496 400
WIRE 624 416 624 256
WIRE 624 416 496 416
WIRE 352 496 352 480
WIRE 848 496 848 480
SYMBOL MAX41400 752 224 R0
SYMATTR InstName U1
SYMBOL res 928 256 R0
SYMATTR InstName RL
SYMATTR Value 10k
SYMBOL e 496 192 R0
WINDOW 0 37 24 Left 2
WINDOW 3 34 78 Left 2
SYMATTR InstName E1
SYMATTR Value 0.5
SYMBOL voltage 752 32 R270
WINDOW 123 0 0 Left 2
WINDOW 0 47 38 VRight 2
WINDOW 3 -43 38 VRight 2
SYMATTR InstName Vdd
SYMATTR Value 1.8
SYMBOL cap 1024 272 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL voltage 352 384 R0
WINDOW 0 42 50 Left 2
WINDOW 3 42 78 Left 2
WINDOW 123 42 104 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName Vsin
SYMATTR Value PULSE(-10m 10m 500u 1n 1n 1m 2m)
SYMATTR Value2 AC 1
SYMBOL e 496 304 R0
WINDOW 0 39 37 Left 2
WINDOW 3 37 83 Left 2
SYMATTR InstName E2
SYMATTR Value 0.5
SYMBOL voltage 848 384 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vref
SYMATTR Value 0.9
FLAG 1040 224 OUT
FLAG 880 48 0
FLAG 352 496 0
FLAG 352 224 IN
FLAG 944 384 0
FLAG 1040 384 0
FLAG 848 352 Ref
FLAG 848 496 0
FLAG 448 384 0
FLAG 448 272 0
FLAG 512 304 Ref
FLAG 672 192 INP
FLAG 672 256 INM
FLAG 800 336 Vdd
FLAG 752 336 0
FLAG 880 128 0
FLAG 752 96 Vdd
TEXT 374 536 Left 2 !.tran 2m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1964-SD.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1964-SD.asy)
V1 IN 0 PWL(0 0 1 -10)
Rload OUT 0 1K
C1 OUT 0 1
XU1 0 IN IN OUT OUT LT1964-SD ;pnba GND)IN)_SHDN)ADJ)OUT
.tran 1
.lib LT1964.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 48 -208 48
WIRE 32 48 16 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 16 144 16 48
WIRE 32 144 16 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL PowerProducts\\LT1964-SD 176 96 R0
SYMATTR InstName U1
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 -10)
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 384 240 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\TwoTau.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
;ac oct 10 .001 1MEG
V1 N001 0 PULSE(-1 1 0 0 0 5m 10m) AC 1
E1 C 0 N001 0 Laplace=exp(-.001*s)/(1+.001*s)**2
R2 A N002 100K
E2 B 0 N001 0 Laplace=1/(1+.001*s)**2
C1 N002 0 1
C2 A 0 .01
R1 N002 N001 1K
.tran 30m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1656 880
WIRE 1056 256 992 256
WIRE 1168 256 1136 256
WIRE 1248 256 1168 256
WIRE 1376 256 1328 256
WIRE 1472 256 1376 256
WIRE 1168 272 1168 256
WIRE 1376 272 1376 256
WIRE 1168 352 1168 336
WIRE 1376 352 1376 336
WIRE 992 384 992 256
WIRE 992 384 400 384
WIRE 400 416 400 384
WIRE 1472 432 1104 432
WIRE 1104 448 1104 432
WIRE 992 464 992 384
WIRE 1056 464 992 464
WIRE 1056 512 1040 512
WIRE 400 528 400 496
WIRE 1040 560 1040 512
WIRE 1104 560 1104 528
WIRE 1472 624 1104 624
WIRE 1104 640 1104 624
WIRE 992 656 992 464
WIRE 1056 656 992 656
WIRE 1056 704 1040 704
WIRE 1040 752 1040 704
WIRE 1104 752 1104 720
SYMBOL cap 1152 272 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 1152 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL e 1104 624 R0
SYMATTR InstName E1
SYMATTR Value Laplace=exp(-.001*s)/(1+.001*s)**2
SYMBOL cap 1360 272 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL voltage 400 400 R0
SYMATTR InstName V1
SYMATTR Value PULSE(-1 1 0 0 0 5m 10m) AC 1
SYMBOL res 1344 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL e 1104 432 R0
SYMATTR InstName E2
SYMATTR Value Laplace=1/(1+.001*s)**2
FLAG 400 528 0
FLAG 1472 432 B
FLAG 1472 256 A
FLAG 1104 560 0
FLAG 1472 624 C
FLAG 1104 752 0
FLAG 1040 560 0
FLAG 1040 752 0
FLAG 1168 352 0
FLAG 1376 352 0
TEXT 536 704 Left 2 !;ac oct 10 .001 1MEG
TEXT 536 648 Left 2 !.tran 30m
TEXT 944 800 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\4bf63d45a38a_Sim-Idss.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 510
J1 N001 0 0 MPF102A
V1 N002 0 15
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.model MPF102A NJF(Beta=1.61m Betatce=-.5 Rd=1 Rs=1 Lambda=2m Vto=-3.41 Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7 Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=11.73E-18 Af=1)
.dc V1 0 15 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2632 680
WIRE 160 96 128 96
WIRE 288 96 240 96
WIRE 288 112 288 96
WIRE 80 160 32 160
WIRE 32 224 32 160
WIRE 128 224 128 192
WIRE 288 224 288 192
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 510
SYMBOL njf 80 96 R0
SYMATTR InstName J1
SYMATTR Value MPF102A
SYMBOL voltage 288 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
FLAG 32 224 0
FLAG 128 224 0
FLAG 288 224 0
TEXT -160 40 Left 2 !.model MPF102A NJF(Beta=1.61m Betatce=-.5 Rd=1 Rs=1 Lambda=2m Vto=-3.41 Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7 Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=11.73E-18 Af=1)
TEXT 264 256 Left 2 !.dc V1 0 15 0.1