Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\3178b29660be_OPA2328_Trans_Amp.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 WE I V+ 0 SIG_OUT OPAx328 ;pnba In+)In-)V+)V-)OUT
R1 SIG_OUT I {R}
C1 SIG_OUT I {C}
.inc OPAx328.LIB
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 144 0 144
WIRE 208 144 32 144
WIRE 416 160 272 160
WIRE 496 160 416 160
WIRE 208 176 128 176
WIRE 32 272 32 144
WIRE 192 272 32 272
WIRE 416 272 416 160
WIRE 416 272 272 272
WIRE 32 368 32 272
WIRE 208 368 32 368
WIRE 416 368 416 272
WIRE 416 368 272 368
FLAG 240 192 0
FLAG 240 128 V+
IOPIN 240 128 In
FLAG 128 176 WE
IOPIN 128 176 In
FLAG 0 144 I
IOPIN 0 144 In
FLAG 496 160 SIG_OUT
IOPIN 496 160 Out
SYMBOL OpAmps\\opamp2 240 96 R0
SYMATTR InstName U1
SYMATTR Value OPAx328
SYMBOL res 288 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R}
SYMBOL cap 272 352 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {C}
TEXT 320 88 Left 2 !.inc OPAx328.LIB
* Z:\home\khalils\Downloads\files\data\raw_asc\0260e9b226ac_MyComparator.asc
* Generated by LTspice 26.0.1 for Windows.
R3 pos 0 1e6
R1 in- in+ 1e6
R2 neg 0 1e6
E1 out 0 value={if(V(in+,in-)>0, V(pos),V(neg))}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 976 680
WIRE 608 -288 528 -288
WIRE 672 -288 608 -288
WIRE 256 -272 160 -272
WIRE 304 -272 256 -272
WIRE 304 -240 304 -272
WIRE 672 -240 672 -288
WIRE 304 -128 304 -160
WIRE 672 -128 672 -160
WIRE 544 -64 480 -64
WIRE 640 -64 544 -64
WIRE 208 0 128 0
WIRE 336 0 208 0
WIRE 480 0 480 -64
WIRE 336 16 336 0
WIRE 224 112 144 112
WIRE 336 112 336 96
WIRE 336 112 224 112
WIRE 480 144 480 80
IOPIN 528 -288 In
IOPIN 160 -272 In
IOPIN 144 112 In
IOPIN 128 0 In
IOPIN 640 -64 Out
SYMBOL res 656 -256 R0
SYMATTR InstName R3
SYMATTR Value 1e6
SYMBOL res 288 -256 R0
SYMATTR InstName R2
SYMATTR Value 1e6
SYMBOL Misc\\Epoly 480 -16 R0
SYMATTR InstName E1
SYMATTR Value value={if(V(in+,in-)>0, V(pos),V(neg))}
SYMBOL res 320 0 R0
SYMATTR InstName R1
SYMATTR Value 1e6
FLAG 480 144 0
FLAG 224 112 in+
FLAG 208 0 in-
FLAG 544 -64 pwm
FLAG 608 -288 pos
FLAG 256 -272 neg
FLAG 528 -288 pos
FLAG 160 -272 neg
FLAG 144 112 in+
FLAG 128 0 in-
FLAG 640 -64 out
FLAG 304 -128 0
FLAG 672 -128 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7118-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7118-5.0.asy)
C2 N001 0 4.7n
C1 OUT 0 2.2 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=5 ;pnba Vin)Sense)EN)SS)Vout)GND
Rload OUT 0 30
V1 IN 0 6
.tran 6m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 30
SYMBOL ADP7118-5.0 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1574-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1574-5.asy)
Rload OUT 0 20
L1 N001 OUT 100 Rser=0.02 Rpar=5000
V1 IN 0 9 Rser=0.1
XU1 OUT MP_01 MP_02 0 N001 IN IN IN LTC1574 top=93.5K bot=31.5K ;pnba Sense)))GND)SW)Vin)Ipgm)_SHDN
C2 OUT 0 100 Rser=0.02
.tran 2.5m startup
.lib LTC1574.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1492 912
WIRE 480 528 368 528
WIRE 624 528 480 528
WIRE 368 544 368 528
WIRE 624 544 624 528
WIRE 480 608 480 528
WIRE 496 608 480 608
WIRE 784 608 752 608
WIRE 896 608 864 608
WIRE 992 608 896 608
WIRE 992 624 992 608
WIRE 368 640 368 624
WIRE 480 672 480 608
WIRE 496 672 480 672
WIRE 896 672 896 608
WIRE 896 672 752 672
WIRE 896 688 896 672
WIRE 992 720 992 704
WIRE 624 768 624 736
WIRE 896 768 896 752
SYMBOL VOLTAGE 368 528 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMATTR SpiceLine Rser=0.1
SYMBOL PowerProducts\\LTC1574-5 624 624 R0
SYMATTR InstName U1
SYMBOL IND 768 624 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL POLCAP 880 688 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL res 976 608 R0
SYMATTR InstName Rload
SYMATTR Value 20
FLAG 992 608 OUT
FLAG 896 768 0
FLAG 992 720 0
FLAG 624 768 0
FLAG 368 640 0
FLAG 368 528 IN
TEXT 824 832 Left 2 !.tran 2.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\e78cfa968fb3_1469-2.asc
* Generated by LTspice 26.0.1 for Windows.
* 100KHz Low Distortion Bandpass Filter
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1469-2.asy)
C2 OUT N001 1000p
C1 N002 N001 1000p
V1 +V 0 15
V2 -V 0 -15
R3 0 N001 121
XU1 0 N002 +V -V OUT LT1468-2 ;pnba In+)In-)V+)V-)OUT
V3 IN 0 AC 1
R2 N001 IN 11K
R1 OUT N002 22.1K
.ac oct 100 10K 1Meg
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -224 16 -224 0
WIRE -96 16 -96 0
WIRE 80 32 0 32
WIRE 304 32 144 32
WIRE 192 96 176 96
WIRE 304 96 304 32
WIRE 304 96 272 96
WIRE -224 112 -224 96
WIRE -96 112 -96 96
WIRE 240 208 240 192
WIRE -144 224 -208 224
WIRE 0 224 0 32
WIRE 0 224 -64 224
WIRE 80 224 0 224
WIRE 176 224 176 96
WIRE 176 224 144 224
WIRE 208 224 176 224
WIRE -208 240 -208 224
WIRE 0 240 0 224
WIRE 304 240 304 96
WIRE 304 240 272 240
WIRE 352 240 304 240
WIRE 208 256 176 256
WIRE 240 288 240 272
WIRE -208 336 -208 320
WIRE 0 336 0 320
SYMBOL voltage -208 224 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL res -16 336 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 121
SYMBOL voltage -224 0 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 288 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 22.1K
SYMBOL opamps\\LT1469-2 240 176 R0
SYMATTR InstName U1
SYMBOL cap 144 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000p
SYMBOL cap 144 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL voltage -96 0 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res -48 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 11K
FLAG -96 112 0
FLAG 240 192 +V
FLAG -96 0 +V
FLAG 240 288 -V
FLAG -224 112 0
FLAG -224 0 -V
FLAG -208 336 0
FLAG 176 256 0
FLAG 0 336 0
FLAG 352 240 OUT
FLAG -208 224 IN
TEXT 96 352 Left 2 !.ac oct 100 10K 1Meg
TEXT 80 -56 Bottom 2 ;100KHz Low Distortion Bandpass Filter
* Z:\home\khalils\Downloads\files\data\raw_asc\4bd07dda2906_11.asc
* Generated by LTspice 26.0.1 for Windows.
Ib 0 N002 0
Q1 N001 N002 0 0 2N2222
VCE N001 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VCE 0 5 0.01 Ib 0 50u 10u
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 368 16 160 16
WIRE 160 64 160 16
WIRE 96 112 -80 112
WIRE 368 112 368 16
WIRE -80 160 -80 112
WIRE -80 336 -80 240
WIRE 160 336 160 160
WIRE 160 336 -80 336
WIRE 368 336 368 192
WIRE 368 336 160 336
WIRE 160 384 160 336
SYMBOL voltage 368 96 R0
SYMATTR InstName VCE
SYMATTR Value ""
SYMBOL current -80 240 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName Ib
SYMATTR Value 0
SYMBOL npn 96 64 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
FLAG 160 384 0
TEXT 216 448 Left 2 !.dc VCE 0 5 0.01 Ib 0 50u 10u
* Z:\tmp\asc_dec_bjh7r6w2\1141ea37a628_TTL_LVTTL_Tamplate_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V2 Dot5V 0 0.5V
A1 Dot4V 0 0 0 0 N001 0 0 BUF
V5 2V 0 2V
A2 Dot8V 0 0 0 0 N003 0 0 BUF
A9 2V 0 0 0 0 N008 0 0 BUF
A5 2V4 0 0 0 0 N009 0 0 BUF
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 764
WIRE 112 80 112 32
WIRE 208 80 208 32
WIRE 304 80 304 32
WIRE 400 80 400 32
WIRE 496 80 496 32
WIRE 592 80 592 32
WIRE 112 208 112 160
WIRE 208 208 208 160
WIRE 304 208 304 160
WIRE 400 208 400 160
WIRE 496 208 496 160
WIRE 592 208 592 160
WIRE 304 448 256 448
WIRE 416 448 368 448
WIRE 544 448 496 448
WIRE 656 448 608 448
WIRE 304 512 256 512
WIRE 416 512 368 512
WIRE 544 512 496 512
WIRE 656 512 608 512
WIRE 304 576 256 576
WIRE 416 576 368 576
WIRE 544 576 496 576
WIRE 656 576 608 576
WIRE 304 640 256 640
WIRE 416 640 368 640
WIRE 544 640 496 640
WIRE 656 640 608 640
WIRE 304 704 256 704
WIRE 416 704 368 704
WIRE 544 704 496 704
WIRE 656 704 608 704
SYMBOL voltage 208 64 R0
SYMATTR InstName V2
SYMATTR Value 0.5V
SYMBOL Digital\\inv 304 384 R0
SYMATTR InstName A1
SYMBOL voltage 496 64 R0
SYMATTR InstName V5
SYMATTR Value 2V
SYMBOL Digital\\inv 304 448 R0
SYMATTR InstName A2
SYMBOL Digital\\inv 544 576 R0
SYMATTR InstName A9
SYMBOL Digital\\inv 304 640 R0
SYMATTR InstName A5
FLAG 112 208 0
FLAG 208 208 0
FLAG 304 208 0
FLAG 400 208 0
FLAG 496 208 0
FLAG 592 208 0
FLAG 112 32 Dot4V
FLAG 208 32 Dot5V
FLAG 304 32 Dot8V
FLAG 400 32 1V5
FLAG 496 32 2V
FLAG 592 32 2V4
FLAG 256 448 Dot4V
FLAG 496 448 Dot5V
FLAG 256 512 Dot8V
FLAG 256 576 1V5
FLAG 256 640 2V
FLAG 256 704 2V4
FLAG 496 576 1V5
FLAG 496 640 2V
FLAG 496 704 2V4
FLAG 496 512 Dot8V
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1765-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1765-1.2.asy)
C2 N003 0 10n
V1 IN 0 1.5
R2 N001 IN 50K
C1 N004 0 1
C4 OUT 0 22
R1 OUT 0 .6
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1765-1.2 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
C3 N002 0 1
.tran 2m startup
.lib ADP1765-1.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value .6
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL ADP1765-1.2 224 176 R0
SYMATTR InstName U1
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 22
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 480 376 Left 2 !.tran 2m startup
* Z:\tmp\asc_dec_bjh7r6w2\0b620862918f_oscillator40_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N002 NC_01 1nf
R5 N002 N001 3k9
R4 N001 N003 18k
D2 N001 N002 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 464 -240 384 -240
WIRE 384 -176 384 -240
WIRE 528 -176 528 -240
WIRE 528 -176 448 -176
WIRE 384 -80 384 -176
WIRE 384 -80 256 -80
WIRE 528 -80 528 -176
WIRE 528 -80 464 -80
WIRE 672 -80 528 -80
WIRE 256 -16 256 -80
WIRE 256 80 256 64
WIRE 400 80 256 80
WIRE 672 96 672 -80
WIRE 672 96 464 96
WIRE 400 112 352 112
WIRE 256 208 256 80
WIRE 352 208 352 112
WIRE 528 208 416 208
WIRE 672 208 672 96
SYMBOL cap 672 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1nf
SYMBOL res 480 -96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 3k9
SYMBOL res 240 -32 R0
SYMATTR InstName R4
SYMATTR Value 18k
SYMBOL diode 464 -224 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N4148
FLAG 144 112 -VCC
FLAG 432 128 -VCC
FLAG 432 64 +VCC
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1389-1.25.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 PULSE(0 5 1.5m 10n 10n 4m 2)
R1 N001 N002 4.7Meg
XU1 N002 0 LT1389-1.25 ;pnba VCC)VEE
.tran 10m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1389-1.25.asy)
.lib LT1389-1.25.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3476 836
WIRE 704 -272 528 -272
WIRE 960 -272 784 -272
WIRE 528 -240 528 -272
WIRE 960 -224 960 -272
WIRE 528 -128 528 -160
WIRE 960 -128 960 -160
FLAG 960 -128 0
FLAG 528 -128 0
SYMBOL voltage 528 -256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 1.5m 10n 10n 4m 2)
SYMBOL res 688 -256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 4.7Meg
SYMBOL LT1389-1.25 960 -192 R0
SYMATTR InstName U1
TEXT 1048 -104 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\Hartly.asc
* Generated by LTspice 26.0.1 for Windows.
J1 N003 N004 0 2N5484
V1 N005 0 10.
C4 N002 N001 250p
L4 N003 N005 1m Rser=100
L2 0 N002 30
L1 N001 0 30
C1 N002 N003 500p
C2 N001 N004 30p
D2 0 N004 1N4148
L3 0 out 3
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.tran 250 startup
K1 L1 L2 L3 1.
* This example schematic is supplied for informational/educational purposes only.
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2764 2344
WIRE 2080 1664 1984 1664
WIRE 2400 1664 2160 1664
WIRE 2000 1792 1984 1792
WIRE 2112 1792 2080 1792
WIRE 2144 1792 2112 1792
WIRE 2256 1792 2224 1792
WIRE 2112 1824 2112 1792
WIRE 2256 1856 2256 1792
WIRE 2320 1856 2256 1856
WIRE 2320 1872 2320 1856
WIRE 1984 1920 1984 1792
WIRE 2080 1920 1984 1920
WIRE 2256 1920 2256 1856
WIRE 2256 1920 2144 1920
WIRE 1984 1952 1984 1920
WIRE 2320 1968 2320 1936
WIRE 2320 1968 2192 1968
WIRE 2400 1968 2320 1968
WIRE 2192 1984 2192 1968
WIRE 2400 1984 2400 1968
WIRE 1984 2048 1984 2016
WIRE 2144 2048 1984 2048
WIRE 1984 2080 1984 2048
WIRE 2192 2096 2192 2080
WIRE 2400 2096 2400 2064
WIRE 1984 2176 1984 2144
WIRE 2400 2192 2400 2176
FLAG 2400 2192 0
FLAG 2192 2096 0
FLAG 2112 1824 0
FLAG 1984 2176 0
FLAG 1984 1664 0
FLAG 2400 1664 out
SYMBOL njf 2144 1984 R0
SYMATTR InstName J1
SYMATTR Value 2N5484
SYMBOL voltage 2400 2080 R0
SYMATTR InstName V1
SYMATTR Value 10.
SYMBOL cap 2144 1904 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 250p
SYMBOL ind 2384 1968 R0
WINDOW 0 36 25 Left 2
WINDOW 3 36 55 Left 2
WINDOW 39 37 81 Left 2
SYMATTR InstName L4
SYMATTR Value 1m
SYMATTR SpiceLine Rser=100
SYMBOL ind2 2128 1808 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 4 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 30
SYMBOL ind2 1984 1808 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 4 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 30
SYMBOL cap 2304 1872 R0
SYMATTR InstName C1
SYMATTR Value 500p
SYMBOL cap 1968 1952 R0
SYMATTR InstName C2
SYMATTR Value 30p
SYMBOL diode 1968 2144 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL ind2 2064 1680 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 4 56 VBottom 2
SYMATTR InstName L3
SYMATTR Value 3
TEXT 2120 2208 Left 2 !.tran 250 startup
TEXT 2112 1728 Center 2 !K1 L1 L2 L3 1.
TEXT 2224 2248 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX4230.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX4230.asy)
RL OUT 0 100k
V1 IN 0 SINE(0 50m 100k)
Vcc Vcc 0 2.5
CL OUT 0 15p
Vee 0 Vee 2.5
XU1 IN OUT Vcc Vee OUT MAX4230 ;pnba In+)In-)V+)V-)OUT
.tran 10u
.lib MAX4230.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 144 288 144 272
WIRE 432 352 432 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 144 400 144 368
WIRE 144 400 112 400
WIRE 400 400 304 400
WIRE 112 416 112 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 144 448 144 400
WIRE 432 448 432 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 144 544 144 528
WIRE 304 592 304 576
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL voltage 144 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL voltage 144 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 100k
SYMBOL MAX4230 432 320 R0
SYMATTR InstName U1
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 100k)
FLAG 720 384 OUT
FLAG 144 272 Vcc
FLAG 144 544 Vee
FLAG 432 320 Vcc
FLAG 432 448 Vee
FLAG 112 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
TEXT 96 632 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\0a37372d7518_body_diode_cjo.asc
* Generated by LTspice 26.0.1 for Windows.
M1 d N001 0 0 20n60c3
R1 N001 0 1
V1 d 0 PWL(0 0 6m 6000)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
* .model 20n60c3 vdmos(kp=17.50 rs=0.043 rd=0.103 rg=0.54 vto=3.50 cgdmax=5560p cgdmin=7p cjo=731p cgs=2350p is=0.1u rb=24.4m)
* .temp 0
.model 20n60c3 vdmos(kp=17.50 rs=0.043 rd=0.103 rg=0.54 vto=3.50 cgdmax=0 cgdmin=0 cjo=2.2n cgs=1p is=0.1p rb=24.4m)
.tran 0 1m 100n
.ic v(d)=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1708 680
WIRE 176 176 112 176
WIRE 272 176 176 176
WIRE 112 208 112 176
WIRE 272 224 272 176
WIRE 32 240 -32 240
WIRE -32 256 -32 240
WIRE 32 288 32 240
WIRE 64 288 32 288
WIRE 112 336 112 304
WIRE 112 336 -32 336
WIRE 272 336 272 304
WIRE 272 336 112 336
WIRE 112 368 112 336
FLAG 112 368 0
FLAG 176 176 d
SYMBOL nmos 64 208 R0
SYMATTR InstName M1
SYMATTR Value 20n60c3
SYMBOL res -48 240 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL voltage 272 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 6m 6000)
TEXT 8 440 Left 0 ;.model 20n60c3 vdmos(kp=17.50 rs=0.043 rd=0.103 rg=0.54 vto=3.50 cgdmax=5560p cgdmin=7p cjo=731p cgs=2350p is=0.1u rb=24.4m)
TEXT 744 352 Left 0 ;.temp 0
TEXT 24 488 Left 0 !.model 20n60c3 vdmos(kp=17.50 rs=0.043 rd=0.103 rg=0.54 vto=3.50 cgdmax=0 cgdmin=0 cjo=2.2n cgs=1p is=0.1p rb=24.4m)
TEXT -50 508 Left 0 !.tran 0 1m 100n
TEXT 248 96 Left 0 !.ic v(d)=0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3255.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3255.asy)
Rload OUT 0 1K
R1 OUT N004 383K
C3 OUT 0 10 Rser=5m
R3 OUT N003 510K
V1 IN 0 36
C2 N002 N001 1
XU1 N002 OUT N004 0 N003 IN N005 0 N001 IN LTC3255 ;pnba C+)Vout)FB)Shunt)Pgood)EN)Bias)GND)C-)Vin
R2 N004 0 121K
C1 N005 0 .1
.tran 1m startup
.lib LTC3255.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 16 240 16
WIRE 368 16 336 16
WIRE 240 64 240 16
WIRE 368 64 368 16
WIRE 160 128 80 128
WIRE 176 128 160 128
WIRE 464 128 432 128
WIRE 560 128 464 128
WIRE 672 128 560 128
WIRE 752 128 672 128
WIRE 80 144 80 128
WIRE 464 144 464 128
WIRE 672 144 672 128
WIRE 752 144 752 128
WIRE 160 224 160 128
WIRE 176 224 160 224
WIRE 464 224 432 224
WIRE 560 224 560 128
WIRE 80 240 80 224
WIRE 672 240 672 208
WIRE 752 240 752 224
WIRE 176 320 160 320
WIRE 560 320 560 304
WIRE 560 320 432 320
WIRE 560 336 560 320
WIRE 96 416 80 416
WIRE 176 416 160 416
WIRE 448 416 432 416
WIRE 560 432 560 416
SYMBOL cap 336 0 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 448 128 R0
SYMATTR InstName R3
SYMATTR Value 510K
SYMBOL PowerProducts\\LTC3255 304 272 R0
SYMATTR InstName U1
SYMBOL cap 160 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL res 736 128 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL voltage 80 128 R0
SYMATTR InstName V1
SYMATTR Value 36
SYMBOL res 544 208 R0
SYMATTR InstName R1
SYMATTR Value 383K
SYMBOL cap 656 144 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMATTR SpiceLine Rser=5m
SYMBOL res 544 320 R0
SYMATTR InstName R2
SYMATTR Value 121K
FLAG 448 416 0
FLAG 80 416 0
FLAG 80 240 0
FLAG 560 432 0
FLAG 672 240 0
FLAG 752 240 0
FLAG 80 128 IN
FLAG 752 128 OUT
FLAG 160 320 0
TEXT 624 456 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6000.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 2
V2 -V 0 -2
V3 IN 0 PULSE(-.1 .1 0 1u 1u 100m 200m)
XU1 IN N001 +V -V OUT NC_01 LT6000 ;pnba IN+)IN-)VCC)VEE)OUT)SHDN_L
R1 OUT N001 90.9K
R2 N001 0 10K
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6000.asy)
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 756
WIRE 32 416 16 416
WIRE 128 416 112 416
WIRE 192 416 128 416
WIRE 288 416 272 416
WIRE -288 448 -288 432
WIRE -192 448 -192 432
WIRE 176 480 176 464
WIRE 128 512 128 416
WIRE 160 512 128 512
WIRE 288 528 288 416
WIRE 288 528 240 528
WIRE 336 528 288 528
WIRE -288 544 -288 528
WIRE -192 544 -192 528
WIRE 160 544 -64 544
WIRE -64 560 -64 544
WIRE 176 592 176 576
WIRE -64 656 -64 640
FLAG -288 544 0
FLAG -192 544 0
FLAG -64 656 0
FLAG -64 544 IN
FLAG 336 528 OUT
FLAG 176 464 +V
FLAG -288 432 +V
FLAG -192 432 -V
FLAG 176 592 -V
FLAG 16 416 0
SYMBOL voltage -288 432 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL voltage -192 432 R0
SYMATTR InstName V2
SYMATTR Value -2
SYMBOL voltage -64 544 R0
SYMATTR InstName V3
SYMATTR Value PULSE(-.1 .1 0 1u 1u 100m 200m)
SYMBOL LT6000 176 528 R0
SYMATTR InstName U1
SYMBOL res 288 400 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 90.9K
SYMBOL res 128 400 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
TEXT 320 696 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1121-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Note Abs. Max SHDN pin voltage 6.5
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1121-5.asy)
V1 IN 0 PWL(0 0 1 10)
Rload OUT 0 100
XU1 OUT MP_01 0 MP_02 NC_03 MP_04 MP_05 IN LT1121-5 ;pnba OUT))GND))_SHDN)))IN
C1 OUT 0 1
.tran 1
.lib LT1121.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 192 -272 192
WIRE 368 192 320 192
WIRE 464 192 368 192
WIRE -272 208 -272 192
WIRE 368 208 368 192
WIRE 464 208 464 192
WIRE -272 304 -272 288
WIRE 368 304 368 272
WIRE 464 304 464 288
WIRE 176 384 176 352
SYMBOL res 448 192 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL voltage -272 192 R0
SYMATTR Value PWL(0 0 1 10)
SYMATTR InstName V1
SYMBOL cap 352 208 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMBOL PowerProducts\\LT1121-5 176 240 R0
SYMATTR InstName U1
FLAG -272 304 0
FLAG 176 384 0
FLAG 368 304 0
FLAG 464 304 0
FLAG 464 192 OUT
FLAG -272 192 IN
TEXT 368 384 Left 2 !.tran 1
TEXT -424 368 Left 2 ;Note Abs. Max SHDN pin voltage 6.5