Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1573.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1573.asy)
Q1 N004 N008 N006 0 D45H11
R5 N001 0 1K
R4 N004 N001 1.6K
XU1 N001 N005 0 0 N007 N006 N004 N002 LT1573 ;pnba FB)Latch)SHDN)GND)Drive)Vin)Vout)Comp
Rload N004 0 1
R2 N008 N007 24
C1 N003 N002 100p
R3 N006 N008 50
R1 N004 N003 1K
C3 N004 0 250 Rser=.1
V1 N006 0 5
C2 N005 0 .5
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1m startup
.lib LT1573.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1732 1072
WIRE 16 112 -112 112
WIRE 368 112 304 112
WIRE 464 112 432 112
WIRE 624 112 544 112
WIRE -64 208 -80 208
WIRE 16 208 0 208
WIRE 624 208 624 112
WIRE 624 208 304 208
WIRE 16 304 -16 304
WIRE 416 304 304 304
WIRE 528 304 416 304
WIRE 768 304 528 304
WIRE 768 320 768 304
WIRE 528 352 528 304
WIRE 16 400 -16 400
WIRE 320 400 304 400
WIRE 416 400 416 384
WIRE 416 400 400 400
WIRE 464 400 416 400
WIRE 768 416 768 400
WIRE 624 448 624 208
WIRE 624 448 528 448
WIRE 720 448 624 448
WIRE 528 464 528 448
WIRE 720 464 720 448
WIRE 624 480 624 448
WIRE 528 544 528 528
WIRE 720 560 720 544
WIRE -112 592 -112 112
WIRE 624 592 624 560
WIRE 624 592 -112 592
WIRE 624 608 624 592
WIRE 624 704 624 688
SYMBOL cap 512 464 R0
SYMATTR InstName C3
SYMATTR Value 250
SYMATTR SpiceLine Rser=.1
SYMBOL res 608 592 R0
SYMATTR InstName R5
SYMATTR Value 1K
SYMBOL cap 0 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .5
SYMBOL pnp 464 448 M180
WINDOW 0 50 67 Left 2
WINDOW 3 46 26 Left 2
SYMATTR InstName Q1
SYMATTR Value D45H11
SYMBOL res 400 288 R0
SYMATTR InstName R3
SYMATTR Value 50
SYMBOL res 416 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 24
SYMBOL cap 432 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL res 704 448 R0
SYMATTR InstName Rload
SYMATTR Value 1
SYMBOL PowerProducts\\LT1573 160 256 R0
SYMATTR InstName U1
SYMBOL res 560 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 608 464 R0
WINDOW 0 29 46 Left 2
WINDOW 3 27 79 Left 2
SYMATTR InstName R4
SYMATTR Value 1.6K
SYMBOL voltage 768 304 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -16 400 0
FLAG -16 304 0
FLAG -80 208 0
FLAG 720 560 0
FLAG 624 704 0
FLAG 528 544 0
FLAG 768 416 0
TEXT 768 632 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2a82b59b85cc_Draft5.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Vp 0 SINE(0 10 1000 0 0 0 0) Rser=1m
R1 0 vd 100
R3 Vg1 Vss 10k
V2 Vss 0 10
M2 vd Vg1 Vss Vss FQB11P06
R2 Vg1 Vp 1.1k
M1 Vdd Vg2 vs vs IRLHS6242
R4 0 vs 10k
R5 Vg2 Vp 470
R6 Vg2 0 10k
V3 Vdd 0 10
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 5m 0 100n
* .dc V1 -10 10 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1092 680
WIRE 160 0 16 0
WIRE 320 0 256 0
WIRE 400 0 320 0
WIRE 848 0 720 0
WIRE 1008 0 944 0
WIRE 1072 0 1008 0
WIRE -224 48 -224 0
WIRE 48 64 16 64
WIRE 144 64 128 64
WIRE 176 64 176 48
WIRE 176 64 144 64
WIRE 240 64 176 64
WIRE 400 64 400 0
WIRE 576 64 576 16
WIRE 1072 64 1072 0
WIRE 240 96 240 64
WIRE 752 96 720 96
WIRE 864 96 832 96
WIRE 928 96 928 48
WIRE 928 96 864 96
WIRE 928 128 928 96
WIRE -224 192 -224 128
WIRE 400 192 400 144
WIRE 1072 192 1072 144
WIRE 576 208 576 144
WIRE 240 224 240 176
WIRE 240 224 176 224
WIRE 928 240 928 208
WIRE -224 352 -224 304
WIRE -224 464 -224 432
FLAG -224 192 0
FLAG 400 192 0
FLAG -224 464 0
FLAG 1072 192 0
FLAG -224 0 Vss
FLAG 720 0 Vdd
FLAG 16 0 Vss
FLAG -224 304 Vp
FLAG 16 64 Vp
FLAG 720 96 Vp
FLAG 176 224 Vss
FLAG 928 240 0
FLAG 576 208 0
FLAG 576 16 Vdd
FLAG 1008 0 vs
FLAG 320 0 vd
FLAG 144 64 Vg1
FLAG 864 96 Vg2
SYMBOL voltage -224 336 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 24 72 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10 1000 0 0 0 0)
SYMATTR SpiceLine Rser=1m
SYMBOL res 416 160 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 224 80 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL voltage -224 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 10
SYMBOL pmos 256 48 M270
SYMATTR InstName M2
SYMATTR Value FQB11P06
SYMBOL res 144 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1.1k
SYMBOL nmos 848 48 R270
SYMATTR InstName M1
SYMATTR Value IRLHS6242
SYMBOL res 1088 160 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL res 848 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 470
SYMBOL res 912 112 R0
SYMATTR InstName R6
SYMATTR Value 10k
SYMBOL voltage 576 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
TEXT -272 -144 Left 2 !.tran 0 5m 0 100n
TEXT -280 -176 Left 2 ;.dc V1 -10 10 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6994-1.asc
* Generated by LTspice 26.0.1 for Windows.
* LTC6994-1 10ms Delay Interval Generator\nOutput Low When IN is Low\nRising Edge On IN Starts Delay to Output Rising Edge\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6994-1.asy)
XU1 N001 0 N003 N004 N002 OUT LTC6994-1 ;pnba IN)GND)SET)DIV)V+)OUT
R4 OUT 0 100K
R2 N002 N004 1000K
R3 N004 0 392K
V2 N001 0 PULSE(3.3 0 0.25m 1n 1n 0.5m 25m 3)
V1 N002 0 5
R1 N003 0 121K
.tran 100m startup
.lib LTC6994-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE -224 96 -240 96
WIRE 96 96 -144 96
WIRE 624 96 320 96
WIRE 624 112 624 96
WIRE 96 176 64 176
WIRE 400 176 320 176
WIRE 528 176 400 176
WIRE 400 192 400 176
WIRE 528 192 528 176
WIRE 624 208 624 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 352 256 320 256
WIRE 352 288 352 256
WIRE 400 288 400 272
WIRE 400 288 352 288
WIRE 528 288 528 272
WIRE 400 304 400 288
WIRE 400 400 400 384
SYMBOL SpecialFunctions\\LTC6994-1 208 176 R0
SYMATTR InstName U1
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 121K
SYMBOL res 384 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
SYMBOL voltage 528 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 608 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL voltage -128 96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(3.3 0 0.25m 1n 1n 0.5m 25m 3)
SYMATTR InstName V2
SYMBOL res 384 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
FLAG -240 96 0
FLAG 528 288 0
FLAG 624 96 OUT
FLAG 624 208 0
FLAG 400 400 0
FLAG -16 256 0
FLAG 64 176 0
TEXT 528 368 Left 2 !.tran 100m startup
TEXT 216 56 Bottom 2 ;LTC6994-1 10ms Delay Interval Generator\nOutput Low When IN is Low\nRising Edge On IN Starts Delay to Output Rising Edge\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\35d9cf725495_Prob_4b2.asc
* Generated by LTspice 26.0.1 for Windows.
* Long Channel
* l=10u w=15u
;.dc V1 0 1 1m
V2 Vds1 0 1.8V
M1 Vds1 Vgs1 0 0 nch_tt l=10u w=15u
V1 Vgs1 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.dc V2 0 1.8 0.01 V1 0 1 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 948 680
WIRE 192 64 160 64
WIRE 160 80 160 64
WIRE 160 80 16 80
WIRE 16 96 16 80
WIRE 160 96 160 80
WIRE -160 176 -192 176
WIRE -32 176 -160 176
WIRE -160 192 -160 176
WIRE 16 208 16 192
WIRE 160 208 160 176
WIRE -160 288 -160 272
IOPIN -192 176 In
IOPIN 192 64 Out
SYMBOL voltage 160 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.8V
SYMBOL voltage -160 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL nmos -32 96 R0
SYMATTR InstName M1
SYMATTR Value nch_tt
SYMATTR Value2 l=10u w=15u
FLAG -160 288 0
FLAG 16 208 0
FLAG 160 208 0
FLAG -192 176 Vgs1
FLAG 192 64 Vds1
TEXT 344 80 Left 2 !.include TSMC180.lib
TEXT 344 136 Left 2 !.dc V2 0 1.8 0.01 V1 0 1 0.2
TEXT 344 112 Left 2 !;.dc  V1 0 1 1m
TEXT -88 0 Left 2 ;Long Channel
TEXT -24 256 Left 2 ;l=10u w=15u
* Z:\home\khalils\Downloads\files\data\raw_asc\3388d01dcf9d_MAX44243.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX44243.asy)
Vcc Vcc 0 15
V1 IN 0 SINE(0 50m 100k)
Vee 0 Vee 15
RL OUT 0 5k
CL OUT 0 15p
XU1 IN OUT Vcc Vee OUT MAX44243 ;pnba In+)In-)V+)V-)OUT
.tran 10u
.lib MAX44243.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 656 256 304 256
WIRE 64 288 64 272
WIRE 432 352 432 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 656 384 656 256
WIRE 656 384 464 384
WIRE 752 384 656 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 656 416 656 384
WIRE 752 432 752 384
WIRE 64 448 64 400
WIRE 432 448 432 416
WIRE 304 496 304 400
WIRE 656 528 656 496
WIRE 752 528 752 496
WIRE 64 544 64 528
WIRE 304 592 304 576
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 100k)
SYMBOL MAX44243 432 320 R0
SYMATTR InstName U1
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 15
SYMBOL res 640 400 R0
SYMATTR InstName RL
SYMATTR Value 5k
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 15
SYMBOL cap 736 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
FLAG 752 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 432 320 Vcc
FLAG 432 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 656 528 0
FLAG 304 400 IN
FLAG 752 528 0
TEXT 16 632 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4412.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4412.asy)
Rload OUT 0 100
R1 OUT N004 470K
MQ1 N002 N003 OUT OUT FDC638P
C1 OUT 0 10
XU1 N002 0 0 N004 N003 OUT LTC4412 ;pnba Vin)GND)CTL)STAT)Gate)Sense
D1 N001 OUT 1N5819
V2 N001 0 PWL(0 0 1 7)
V1 N002 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1
.lib LTC4412.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2500 1444
WIRE 1760 1024 1344 1024
WIRE 2064 1024 1824 1024
WIRE 1344 1040 1344 1024
WIRE 1936 1104 1552 1104
WIRE 2064 1104 2064 1024
WIRE 2064 1104 2032 1104
WIRE 2112 1104 2064 1104
WIRE 2240 1104 2112 1104
WIRE 2336 1104 2240 1104
WIRE 2240 1120 2240 1104
WIRE 2336 1120 2336 1104
WIRE 1344 1136 1344 1120
WIRE 2112 1184 2112 1104
WIRE 1552 1216 1552 1104
WIRE 1680 1216 1552 1216
WIRE 2064 1216 2064 1104
WIRE 2064 1216 1936 1216
WIRE 2240 1216 2240 1184
WIRE 2336 1216 2336 1200
WIRE 1552 1232 1552 1216
WIRE 1680 1296 1648 1296
WIRE 2016 1296 2016 1152
WIRE 2016 1296 1936 1296
WIRE 1552 1328 1552 1312
WIRE 1680 1376 1648 1376
WIRE 2112 1376 2112 1264
WIRE 2112 1376 1936 1376
SYMBOL res 2320 1104 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL VOLTAGE 1552 1216 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 2096 1168 R0
SYMATTR InstName R1
SYMATTR Value 470K
SYMBOL POWERPRODUCTS\\LTC4412 1808 1296 R0
SYMATTR InstName U1
SYMBOL PMOS 1936 1152 R270
WINDOW 0 90 48 VCenter 2
WINDOW 3 63 45 VCenter 2
SYMATTR InstName Q1
SYMATTR Value FDC638P
SYMBOL voltage 1344 1024 R0
SYMATTR InstName V2
SYMATTR Value PWL(0 0 1 7)
SYMBOL schottky 1760 1040 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMBOL cap 2224 1120 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 1648 1376 0
FLAG 1648 1296 0
FLAG 2240 1216 0
FLAG 2336 1216 0
FLAG 1552 1328 0
FLAG 1344 1136 0
FLAG 2336 1104 OUT
TEXT 2176 1368 Left 2 !.tran 1
* Z:\tmp\asc_dec_bjh7r6w2\0ea86558b792_up_5bitcounter-clamp_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
A3 clk_buf clr 0 0 0 B[2] 0 0 counter cycles=8*{k}
A7 B[0] B[1] B[2] B[3] B[4] N001 0 0 AND
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -160 -160 -208 -160
WIRE -160 -144 -160 -160
WIRE -144 -144 -160 -144
WIRE -144 -128 -208 -128
WIRE -144 -112 -192 -112
WIRE -192 -96 -192 -112
WIRE -192 -96 -208 -96
WIRE -144 -96 -176 -96
WIRE -32 -96 -80 -96
WIRE -144 -80 -160 -80
WIRE -32 -80 -48 -80
WIRE -176 -64 -176 -96
WIRE -176 -64 -208 -64
WIRE -48 -64 -48 -80
WIRE -32 -64 -48 -64
WIRE -48 -48 -48 -64
WIRE -32 -48 -48 -48
WIRE -160 -32 -160 -80
WIRE -160 -32 -208 -32
WIRE -48 -32 -48 -48
WIRE -32 -32 -48 -32
WIRE -16 -32 -16 -48
WIRE -16 -32 -32 -32
SYMBOL Digital\\srflop 256 -144 R0
WINDOW 3 -25 142 Left 2
SYMATTR Value cycles=8*{k}
SYMATTR InstName A3
SYMATTR SpiceModel counter
SYMBOL Digital\\and -112 -176 R0
SYMATTR InstName A7
FLAG 208 -16 0
FLAG -32 -112 clk
FLAG 304 -96 0
FLAG 320 -48 B[2]
FLAG 208 -48 clr
FLAG 208 -96 clk_buf
FLAG -32 -32 0
FLAG 32 -64 0
FLAG 32 -96 clk_buf
FLAG -128 -80 0
FLAG -80 -128 0
FLAG -208 -96 B[2]
FLAG -208 -32 B[4]
FLAG -208 -64 B[3]
FLAG -208 -128 B[1]
FLAG -208 -160 B[0]
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP150-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP150-2.5.asy)
V1 IN 0 5
C1 OUT 0 1
XU1 IN 0 IN MP_01 OUT ADP150-x.x T=1.3Meg ;pnba Vin)GND)EN))Vout
Rload OUT 0 25
.tran 500u startup
.lib ADP150-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 880 1696 880
WIRE 1984 880 1824 880
WIRE 1696 896 1696 880
WIRE 1984 896 1984 880
WIRE 1696 992 1696 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL VOLTAGE 1696 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\ADP150-2.5 1984 1024 R0
SYMATTR InstName U1
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 25
FLAG 2256 1024 OUT
FLAG 2256 1136 0
FLAG 1696 992 0
FLAG 1696 880 IN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\30abe448c9be_2960-1.asc
* Generated by LTspice 26.0.1 for Windows.
Vbat N001 0 PWL(0 0 20 9 40 0)
R1 N001 N002 10Meg
R2 OUT _LOWBAT 1Meg
R3 N001 N004 5.11Meg
R4 N004 N005 49.9K
R5 N005 0 348K
R6 N001 N003 10K
XU1 N003 N003 _LOWBAT N002 0 N003 N005 N004 LTC2960-1 ;pnba Vin)RT)_RST)OUT)GND)_MR)ADJ)IN+
XU2 N001 OUT OUT 0 N002 LT3008-3.3 ;pnba IN)OUT)Sense)GND)_SHDN
* Configurable Regulator UVLO and Low Battery Indicator
* 6V to 8.4V
.tran 40
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3008-3.3.asy)
.lib LT3009.lib
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2960-1.asy)
.lib LTC2960-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3200 984
WIRE -2576 -4928 -2864 -4928
WIRE -2464 -4928 -2576 -4928
WIRE -2160 -4928 -2464 -4928
WIRE -2032 -4928 -2160 -4928
WIRE -1696 -4928 -1744 -4928
WIRE -1632 -4928 -1696 -4928
WIRE -1616 -4928 -1632 -4928
WIRE -2864 -4912 -2864 -4928
WIRE -2464 -4912 -2464 -4928
WIRE -2160 -4912 -2160 -4928
WIRE -2032 -4832 -2048 -4832
WIRE -1696 -4832 -1696 -4928
WIRE -1696 -4832 -1744 -4832
WIRE -2864 -4816 -2864 -4832
WIRE -2464 -4816 -2464 -4832
WIRE -2320 -4816 -2464 -4816
WIRE -2192 -4816 -2320 -4816
WIRE -2160 -4816 -2160 -4832
WIRE -2048 -4816 -2048 -4832
WIRE -2048 -4816 -2160 -4816
WIRE -2320 -4800 -2320 -4816
WIRE -2576 -4768 -2576 -4928
WIRE -1632 -4768 -1632 -4928
WIRE -2464 -4752 -2464 -4816
WIRE -2432 -4752 -2464 -4752
WIRE -2192 -4752 -2192 -4816
WIRE -2192 -4752 -2208 -4752
WIRE -1888 -4736 -1888 -4768
WIRE -2576 -4640 -2576 -4688
WIRE -2432 -4640 -2576 -4640
WIRE -2160 -4640 -2160 -4816
WIRE -2160 -4640 -2208 -4640
WIRE -2576 -4624 -2576 -4640
WIRE -2576 -4528 -2576 -4544
WIRE -2432 -4528 -2576 -4528
WIRE -1632 -4528 -1632 -4688
WIRE -1632 -4528 -2208 -4528
WIRE -1616 -4528 -1632 -4528
WIRE -2576 -4512 -2576 -4528
WIRE -2320 -4448 -2320 -4480
WIRE -2576 -4416 -2576 -4432
FLAG -2864 -4816 0
FLAG -2320 -4448 0
FLAG -1616 -4528 _LOWBAT
FLAG -2576 -4416 0
FLAG -1616 -4928 OUT
FLAG -1888 -4736 0
SYMBOL voltage -2864 -4928 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PWL(0 0 20 9 40 0)
SYMATTR InstName Vbat
SYMBOL res -2176 -4928 R0
SYMATTR InstName R1
SYMATTR Value 10Meg
SYMBOL res -1648 -4784 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res -2592 -4784 R0
SYMATTR InstName R3
SYMATTR Value 5.11Meg
SYMBOL res -2592 -4640 R0
SYMATTR InstName R4
SYMATTR Value 49.9K
SYMBOL res -2592 -4528 R0
SYMATTR InstName R5
SYMATTR Value 348K
SYMBOL res -2480 -4928 R0
SYMATTR InstName R6
SYMATTR Value 10K
SYMBOL LTC2960-1 -2320 -4640 R0
WINDOW 0 -2 -65 Center 2
SYMATTR InstName U1
SYMBOL PowerProducts\\LT3008-3.3 -1888 -4880 R0
SYMATTR InstName U2
TEXT -2192 -5008 Bottom 2 ;Configurable Regulator UVLO and Low Battery Indicator
TEXT -2864 -4928 Bottom 2 ;6V to 8.4V
TEXT -1832 -4464 Left 2 !.tran 40
* Z:\home\khalils\Downloads\files\data\raw_asc\6a790f9cfc78_nand.asc
* Generated by LTspice 26.0.1 for Windows.
M4 N001 b out N001 PMOS l=200n w=400n
V3 b 0 PULSE(0 1 0 0.1n 0.1n 5n 10n)
M2 N002 b 0 0 NMOS l=200n w=200n
V2 N001 0 1
M1 out a N002 0 NMOS l=200n w=200n
M3 N001 a out N001 PMOS l=200n w=400n
V1 a 0 PULSE(0 1 0 0.1n 0.1n 10n 20n)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib /Users/young/Documents/LTspice/90nm_bulk.pm
.tran 0 30n 0 0.1n
.meas TRAN tr TRIG v(in)=0.5 FALL=3 TARG v(out)=0.5 RISE=2
.meas TRAN tf TRIG v(in)=0.5 FALL=2 TARG v(out)=0.5 RISE=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1244 680
WIRE 272 -32 128 -32
WIRE 496 -32 272 -32
WIRE 640 -32 496 -32
WIRE 960 -32 640 -32
WIRE 272 16 272 -32
WIRE 272 16 128 16
WIRE 640 16 640 -32
WIRE 640 16 496 16
WIRE 448 96 448 48
WIRE 448 96 224 96
WIRE 960 128 960 -32
WIRE 128 176 128 64
WIRE 304 176 128 176
WIRE 496 176 496 64
WIRE 496 176 304 176
WIRE 704 176 496 176
WIRE 304 224 304 176
WIRE -208 272 -304 272
WIRE 80 272 80 48
WIRE 80 272 -208 272
WIRE 192 272 80 272
WIRE 432 272 304 272
WIRE -208 304 -208 272
WIRE 192 304 192 272
WIRE 256 304 192 304
WIRE -208 384 -416 384
WIRE 304 400 304 320
WIRE -208 448 -304 448
WIRE 224 448 224 96
WIRE 224 448 -208 448
WIRE 256 448 224 448
WIRE 432 448 432 272
WIRE 432 448 304 448
WIRE -208 464 -208 448
WIRE 256 480 256 448
WIRE 304 544 304 496
WIRE 304 544 224 544
WIRE 432 544 432 448
WIRE 432 544 304 544
WIRE 960 544 960 208
WIRE 960 544 432 544
WIRE 304 560 304 544
WIRE -416 608 -416 384
WIRE -208 608 -208 544
WIRE -208 608 -416 608
WIRE 224 608 224 544
WIRE 224 608 -208 608
IOPIN 704 176 Out
IOPIN -304 272 In
IOPIN -304 448 In
SYMBOL voltage -208 448 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 0 0.1n 0.1n 5n 10n)
SYMBOL nmos4 256 400 R0
SYMATTR InstName M2
SYMATTR Value2 l=200n w=200n
SYMBOL voltage -208 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 0.1n 0.1n 10n 20n)
SYMBOL voltage 960 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL nmos4 256 224 R0
SYMATTR InstName M1
SYMATTR Value2 l=200n w=200n
SYMBOL pmos4 80 -32 R0
SYMATTR InstName M3
SYMATTR Value2 l=200n w=400n
SYMBOL pmos4 448 -32 R0
SYMATTR InstName M4
SYMATTR Value2 l=200n w=400n
FLAG 704 176 out
FLAG -304 272 a
FLAG -304 448 b
FLAG 304 560 0
TEXT 544 312 Left 2 !.lib /Users/young/Documents/LTspice/90nm_bulk.pm
TEXT 552 360 Left 2 !.tran 0 30n 0 0.1n
TEXT 560 416 Left 2 !.meas TRAN tr TRIG v(in)=0.5 FALL=3 TARG v(out)=0.5 RISE=2
TEXT 560 456 Left 2 !.meas TRAN tf TRIG v(in)=0.5 FALL=2 TARG v(out)=0.5 RISE=1
* Z:\tmp\asc_dec_bjh7r6w2\000bf08a56ba_Version_4_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R3 V_out N007 100
V1 N002 0 5
C1 N005 N004 100n
V2 N009 0 -5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 -48 48 -96
WIRE 224 0 224 -48
WIRE 48 48 48 32
WIRE 224 112 224 80
WIRE -144 160 -224 160
WIRE -48 160 -64 160
WIRE 48 160 48 128
WIRE 48 160 16 160
WIRE 160 160 48 160
WIRE 48 192 48 160
WIRE 320 208 224 208
WIRE 432 208 384 208
WIRE 560 208 512 208
WIRE 224 240 224 208
WIRE 48 304 48 272
WIRE 224 352 224 320
WIRE 48 432 48 384
WIRE 224 464 224 432
SYMBOL res 528 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL voltage 224 96 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 16 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL voltage 224 336 R0
SYMATTR InstName V2
SYMATTR Value -5
FLAG 560 208 V_out
FLAG 48 -96 0
FLAG 224 -48 0
FLAG 224 464 0
FLAG 48 432 0
* Z:\home\khalils\Downloads\files\data\raw_asc\1e53fa51c3f6_JukkaRev2_Model2A_012220_.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4522-1.asy)
R4 OL 0 85Meg
V4 0 CmdVoltageMinus 10
XU2 CmdVoltageMinus N001 Vcc Vee OH ADA4522-1 ;pnba In+)In-)V+)V-)OUT
R1 N001 OH 10K
R3 OH OL 10K
V3 CmdVoltagePlus 0 10
R2 0 N001 10K
V1 Vcc 0 +27.5 Rser=0.1
V2 0 Vee +27.5 Rser=0.1
.tran 0 1 .001
.lib ADA4522-1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 696
WIRE 592 -80 592 -112
WIRE 352 -64 352 -96
WIRE -112 32 -112 0
WIRE 64 48 64 0
WIRE 64 48 -80 48
WIRE 352 48 352 16
WIRE 448 48 352 48
WIRE 592 48 592 0
WIRE 592 48 448 48
WIRE -272 64 -272 0
WIRE -272 64 -448 64
WIRE -176 64 -272 64
WIRE -144 64 -176 64
WIRE -128 64 -144 64
WIRE 448 64 448 48
WIRE -32 80 -80 80
WIRE 352 80 352 48
WIRE 592 80 592 48
WIRE -272 96 -272 64
WIRE -112 128 -112 96
WIRE -272 208 -272 176
WIRE -272 208 -448 208
WIRE -176 224 -176 64
WIRE -144 224 -176 224
WIRE -32 224 -32 80
WIRE -32 224 -64 224
WIRE -16 224 -32 224
WIRE 96 224 64 224
WIRE 592 224 592 160
WIRE 352 240 352 160
WIRE 96 256 96 224
WIRE -272 512 -272 208
WIRE -272 656 -272 592
SYMBOL res -48 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL Misc\\battery 352 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 42 65 Left 2
SYMATTR SpiceLine Rser=0.1
SYMATTR InstName V2
SYMATTR Value +27.5
SYMBOL Misc\\battery 352 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 40 56 Left 2
SYMATTR SpiceLine Rser=0.1
SYMATTR InstName V1
SYMATTR Value +27.5
SYMBOL Misc\\battery 592 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL res 80 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Opamps\\ADA4522-1 -112 128 R180
SYMATTR InstName U2
SYMBOL Misc\\battery 592 64 R0
WINDOW 0 24 104 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 10
SYMBOL res -288 80 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res -288 496 R0
SYMATTR InstName R4
SYMATTR Value 85Meg
FLAG 448 64 0
FLAG 352 -96 Vcc
FLAG 352 240 Vee
FLAG -112 128 Vcc
FLAG 96 256 0
FLAG 592 -112 CmdVoltagePlus
FLAG 592 224 CmdVoltageMinus
FLAG 64 0 CmdVoltageMinus
FLAG -272 656 0
FLAG -272 0 StimulusVoltage
FLAG -112 0 Vee
FLAG -448 64 OH
FLAG -448 208 OL
TEXT -968 680 Left 2 !.tran 0 1 .001