Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\389df0f4d966_Common_Source_Amplifier.asc
* Generated by LTspice 26.0.1 for Windows.
* .tran 5m
* .ac dec 10 10 1gig
;.step param w 0.18u 3.6u 0.18u
;.step param k 1 10 0.1
C1 Vout 0 1p
V2 Vin 0 SINE(0.65 1m 1k) AC 1
V1 Vdd 0 1.8
M1 Vout Vin 0 0 NMOS l=0.36u w={k*w}
R1 Vdd Vout 19k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include "/Users/ahmedmajid/Downloads/Analog Internship/Session 2/TSMC/tsmc180.txt"
.op
.param w=3.08u
.tf V(Vout) V2
.param k=1
.options plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 928
WIRE 400 64 400 0
WIRE 400 192 400 144
WIRE 656 192 400 192
WIRE 752 192 656 192
WIRE 656 208 656 192
WIRE 400 240 400 192
WIRE 512 288 400 288
WIRE 352 320 192 320
WIRE 400 368 400 336
WIRE 512 368 512 288
WIRE 512 368 400 368
WIRE 656 416 656 272
WIRE 400 432 400 368
WIRE 48 688 48 640
WIRE 224 688 224 640
WIRE 48 880 48 768
WIRE 224 880 224 768
IOPIN 752 192 Out
SYMBOL voltage 48 672 R0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL cap 640 208 R0
SYMATTR InstName C1
SYMATTR Value 1p
SYMBOL voltage 224 672 R0
WINDOW 123 24 118 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0.65 1m 1k)
SYMATTR Value2 AC 1
SYMBOL res 384 48 R0
SYMATTR InstName R1
SYMATTR Value 19k
SYMBOL nmos4 352 240 R0
WINDOW 123 56 94 Left 2
SYMATTR InstName M1
SYMATTR Value2 l=0.36u w={k*w}
FLAG 48 640 Vdd
FLAG 224 640 Vin
FLAG 400 432 0
FLAG 752 192 Vout
FLAG 656 416 0
FLAG 400 0 Vdd
FLAG 192 320 Vin
FLAG 48 880 0
FLAG 224 880 0
TEXT -240 -200 Left 2 !.include "/Users/ahmedmajid/Downloads/Analog Internship/Session 2/TSMC/tsmc180.txt"
TEXT -232 -160 Left 2 !.op
TEXT -224 -96 Left 2 !.param w=3.08u
TEXT -248 -40 Left 2 !;.step param w 0.18u 3.6u 0.18u
TEXT -240 56 Left 2 !.tf V(Vout) V2
TEXT -240 8 Left 2 !.param k=1
TEXT -248 112 Left 2 !;.step param k 1 10 0.1
TEXT -224 168 Left 2 ;.tran 5m
TEXT -224 224 Left 2 !.options plotwinsize=0
TEXT -152 368 Left 2 ;.ac dec 10 10 1gig
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6900.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6900.asy)
XU1 N001 0 N002 0 OUT LTC6900 ;pnba V+)GND)SET)DIV)OUT
V1 N001 0 3
R1 N001 N002 20K
.tran 10u
.lib LTC6900.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 80 -112 80
WIRE 96 80 -16 80
WIRE 352 80 320 80
WIRE -112 96 -112 80
WIRE -16 112 -16 80
WIRE 96 160 80 160
WIRE -112 192 -112 176
WIRE -16 240 -16 192
WIRE 96 240 -16 240
WIRE 336 240 320 240
SYMBOL voltage -112 80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res -32 96 R0
SYMATTR InstName R1
SYMATTR Value 20K
SYMBOL LTC6900 208 160 R0
SYMATTR InstName U1
FLAG 80 160 0
FLAG 336 240 0
FLAG -112 192 0
FLAG 352 80 OUT
TEXT 408 256 Left 2 !.tran 10u
* Z:\tmp\asc_dec_bjh7r6w2\15d831e38f4b_1819_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 IN N003 N004 +V -V LT1818 ;pnba IN+)IN-)OUT)VCC)VEE
V3 IN 0 AC 1
R1 N004 N003 432
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1819.asy)
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 240 32 224 32
WIRE 336 32 320 32
WIRE 352 32 336 32
WIRE 464 32 432 32
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -160 160 -160 128
WIRE -64 160 -64 128
WIRE 400 192 400 176
WIRE 192 208 192 192
WIRE 336 208 336 32
WIRE 368 208 336 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 464 224 432 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 368 240 256 240
WIRE 160 256 32 256
WIRE -160 272 -160 240
WIRE -64 272 -64 240
WIRE 32 272 32 256
WIRE 400 272 400 256
WIRE 192 288 192 272
WIRE 32 368 32 352
SYMBOL opamps\\LT1819 192 240 R0
SYMATTR InstName U1
SYMBOL voltage 32 256 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 432
FLAG -64 272 0
FLAG 192 192 +V
FLAG -64 128 +V
FLAG 192 288 -V
FLAG -160 272 0
FLAG -160 128 -V
FLAG 16 96 0
FLAG 32 368 0
FLAG 400 176 +V
FLAG 400 272 -V
FLAG 224 32 0
FLAG 32 256 IN
* Z:\tmp\asc_dec_bjh7r6w2\09d9c2689d19_FWrecFiltt_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 N002 MUR460
D2 N004 N002 MUR460
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 64 176 64
WIRE 320 64 272 64
WIRE 384 64 320 64
WIRE 320 144 320 64
WIRE 384 144 384 64
WIRE 80 160 -16 160
WIRE 176 160 176 144
WIRE 224 160 176 160
WIRE 80 176 80 160
WIRE 176 176 176 160
WIRE 224 192 224 160
WIRE 320 256 320 208
WIRE 384 256 384 224
WIRE 384 256 320 256
WIRE 80 288 80 256
WIRE 176 288 176 256
WIRE 208 288 176 288
WIRE 272 288 272 64
WIRE 320 288 320 256
SYMBOL diode 208 48 M90
WINDOW 0 68 33 VBottom 0
WINDOW 3 -30 29 VTop 0
SYMATTR InstName D1
SYMATTR Value MUR460
SYMBOL diode 208 304 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D2
SYMATTR Value MUR460
FLAG 80 288 0
FLAG 320 288 0
FLAG 224 192 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3489.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3489.asy)
XU1 N002 N003 IN 0 N001 IN N002 N004 LT3489 ;pnba Vc)FB)_SHDN)GND)SW)Vin)Comp)SS
C1 OUT 0 20
L1 IN N001 2.2
C2 N004 0 .001
V1 IN 0 3.3
R2 N003 0 5.23K
Rload OUT 0 13
R1 OUT N003 28.7K
D1 N001 OUT 1N5818
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LT3489.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -192 -32 -272 -32
WIRE -32 -32 -192 -32
WIRE 0 -32 -32 -32
WIRE 112 -32 80 -32
WIRE 144 -32 112 -32
WIRE 240 -32 208 -32
WIRE 368 -32 240 -32
WIRE 464 -32 368 -32
WIRE -272 -16 -272 -32
WIRE 368 -16 368 -32
WIRE 464 -16 464 -32
WIRE -32 16 -32 -32
WIRE 240 16 240 -32
WIRE -192 64 -192 -32
WIRE -160 64 -192 64
WIRE 112 64 112 -32
WIRE 112 64 96 64
WIRE -272 80 -272 64
WIRE 368 80 368 48
WIRE 464 80 464 64
WIRE -160 144 -176 144
WIRE 240 144 240 96
WIRE 240 144 96 144
WIRE 240 160 240 144
WIRE -176 224 -176 144
WIRE -160 224 -176 224
WIRE 112 224 96 224
WIRE 192 224 176 224
WIRE 240 256 240 240
WIRE -32 288 -32 272
SYMBOL res 224 0 R0
SYMATTR InstName R1
SYMATTR Value 28.7K
SYMBOL ind -16 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL res 448 -32 R0
SYMATTR InstName Rload
SYMATTR Value 13
SYMBOL cap 352 -16 R0
SYMATTR InstName C1
SYMATTR Value 20
SYMBOL res 224 144 R0
SYMATTR InstName R2
SYMATTR Value 5.23K
SYMBOL PowerProducts\\LT3489 -32 144 R0
SYMATTR InstName U1
SYMBOL voltage -272 -32 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap 112 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value .001
SYMBOL schottky 144 -16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5818
SYMATTR Description Diode
SYMATTR Type diode
FLAG -272 80 0
FLAG -32 288 0
FLAG 192 224 0
FLAG 368 80 0
FLAG 240 256 0
FLAG 464 80 0
FLAG -272 -32 IN
FLAG 464 -32 OUT
TEXT 336 160 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\09d9c2689d19_FWrecFiltt.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N003 0 SINE(0 170 60) Rser=.01
L1 N003 0 1
L2 0 N004 .01
R1 N002 0 100
D1 N001 N002 MUR460
C1 N002 0 2m
L3 N001 0 .01
D2 N004 N002 MUR460
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 33.33e-3
K1 L1 L2 L3 1.
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 64 176 64
WIRE 320 64 272 64
WIRE 384 64 320 64
WIRE 320 144 320 64
WIRE 384 144 384 64
WIRE 80 160 -16 160
WIRE 176 160 176 144
WIRE 224 160 176 160
WIRE -16 176 -16 160
WIRE 80 176 80 160
WIRE 176 176 176 160
WIRE 224 192 224 160
WIRE 320 256 320 208
WIRE 384 256 384 224
WIRE 384 256 320 256
WIRE -16 288 -16 256
WIRE 80 288 80 256
WIRE 176 288 176 256
WIRE 208 288 176 288
WIRE 272 288 272 64
WIRE 320 288 320 256
FLAG -16 288 0
FLAG 80 288 0
FLAG 320 288 0
FLAG 224 192 0
SYMBOL voltage -16 160 R0
WINDOW 3 -204 56 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 -204 84 Left 0
SYMATTR Value SINE(0 170 60)
SYMATTR SpiceLine Rser=.01
SYMATTR InstName V1
SYMBOL ind2 64 160 R0
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR Type ind
SYMBOL ind2 192 160 M0
SYMATTR InstName L2
SYMATTR Value .01
SYMATTR Type ind
SYMBOL res 368 128 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL diode 208 48 M90
WINDOW 0 68 33 VBottom 0
WINDOW 3 -30 29 VTop 0
SYMATTR InstName D1
SYMATTR Value MUR460
SYMBOL cap 304 144 R0
SYMATTR InstName C1
SYMATTR Value 2m
SYMBOL ind2 192 48 M0
SYMATTR InstName L3
SYMATTR Value .01
SYMATTR Type ind
SYMBOL diode 208 304 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D2
SYMATTR Value MUR460
TEXT 56 352 Left 0 !.tran 33.33e-3
TEXT -48 112 Left 0 !K1 L1 L2 L3 1.
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7102-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7102-5.0.asy)
C1 OUT 0 2.2 Rser=1.5m
R1 OUT N001 100k
V1 IN 0 6
XU1 IN OUT IN N001 OUT 0 ADP7102 Vref=5 ;pnba Vin)Sense)EN)PG)Vout)GND
Rload OUT 0 25
.tran 3m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -16 48 -16 32
WIRE 384 128 352 128
WIRE 464 128 464 32
WIRE 464 128 384 128
WIRE 560 128 464 128
WIRE -16 144 -16 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 384 224 384 128
WIRE 384 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL voltage -16 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL ADP7102-5.0 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -16 144 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -16 32 IN
FLAG 560 128 OUT
TEXT 432 296 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1938.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1938.asy)
Rload OUT 0 1.5
D1 0 N004 1N5817
R5 OUT N007 100K
XU1 OUT N006 N004 IN N001 N007 OUT N008 N003 N005 0 LT3684 ;pnba BD)Boost)SW)Vin)Run/SS)Pgood)Bias)FB)Vc)Rt)GND
C2 N004 N006 .47
R1 OUT N008 324K
V1 IN 0 15
L1 N004 OUT 4.7 Rpar=2K
R4 N005 0 60.4K
R6 IN N001 500K
C3 N002 0 680p
R3 N003 N002 16.2K
R2 N008 0 200K
C1 OUT 0 22
C4 N001 0 .01
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 750u startup
.lib LT3684.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1104 804
WIRE -352 64 -448 64
WIRE 32 64 -352 64
WIRE 560 64 160 64
WIRE -448 80 -448 64
WIRE -352 80 -352 64
WIRE 32 96 32 64
WIRE 160 96 160 64
WIRE -64 160 -352 160
WIRE 560 160 560 64
WIRE 560 160 256 160
WIRE -448 176 -448 160
WIRE -352 176 -352 160
WIRE -240 240 -256 240
WIRE -160 240 -176 240
WIRE -64 240 -80 240
WIRE 288 240 256 240
WIRE 384 240 288 240
WIRE 448 240 384 240
WIRE 560 240 560 160
WIRE 560 240 528 240
WIRE 656 240 560 240
WIRE 752 240 656 240
WIRE 848 240 752 240
WIRE -352 256 -352 240
WIRE 288 256 288 240
WIRE 384 256 384 240
WIRE 752 256 752 240
WIRE 848 256 848 240
WIRE 560 272 560 240
WIRE -208 320 -256 320
WIRE -64 320 -128 320
WIRE 288 320 256 320
WIRE 384 336 384 320
WIRE 656 336 656 240
WIRE 752 352 752 320
WIRE 848 352 848 336
WIRE -64 400 -80 400
WIRE 560 400 560 352
WIRE 560 400 256 400
WIRE 560 416 560 400
WIRE 96 464 96 448
WIRE 560 512 560 496
WIRE -80 544 -80 400
WIRE 656 544 656 416
WIRE 656 544 -80 544
SYMBOL res -112 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 60.4K
SYMBOL res 544 400 R0
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL cap -176 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 680p
SYMBOL res 832 240 R0
SYMATTR InstName Rload
SYMATTR Value 1.5
SYMBOL cap 736 256 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL voltage -448 64 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 640 320 R0
SYMATTR InstName R5
SYMATTR Value 100K
SYMBOL cap -368 176 R0
SYMATTR InstName C4
SYMATTR Value .01
SYMBOL res 544 256 R0
SYMATTR InstName R1
SYMATTR Value 324K
SYMBOL schottky 368 320 M180
WINDOW 0 37 61 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 272 256 R0
WINDOW 3 30 49 Left 2
SYMATTR Value .47
SYMATTR InstName C2
SYMBOL res -368 64 R0
SYMATTR InstName R6
SYMATTR Value 500K
SYMBOL res -64 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 16.2K
SYMBOL PowerProducts\\LT1938 96 288 R0
SYMATTR InstName U1
SYMBOL ind 432 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=2K
FLAG 384 336 0
FLAG 752 352 0
FLAG 560 512 0
FLAG -256 240 0
FLAG -448 176 0
FLAG 96 464 0
FLAG 848 352 0
FLAG -256 320 0
FLAG -352 256 0
FLAG 848 240 OUT
FLAG -448 64 IN
TEXT 736 528 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\148aa1fc0f56_CMOS_AND.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N004 0 PULSE(0 8 1 1n 1n 2 4 10)
M6 N006 N003 0 0 BSP89
M3 N003 N004 N005 N005 BSP89
M5 N006 N003 N002 N002 AO6407
V1 N001 0 7
M4 N005 N007 0 0 BSP89
V5 N002 0 5
M1 N003 N004 N001 N001 AO6407
M2 N003 N007 N001 N001 AO6407
V3 N007 0 PULSE(0 8 1 1n 1n 4 8 10)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 50
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 576 -64 400 -64
WIRE 208 -32 -48 -32
WIRE 208 48 80 48
WIRE 256 48 208 48
WIRE 576 96 576 16
WIRE 624 112 496 112
WIRE 208 144 80 144
WIRE 256 144 208 144
WIRE 208 192 208 144
WIRE 496 192 496 112
WIRE 496 192 208 192
WIRE -48 208 -48 -32
WIRE 128 208 128 64
WIRE 128 208 32 208
WIRE 208 208 208 192
WIRE 128 288 128 208
WIRE 160 288 128 288
WIRE 208 336 208 304
WIRE 576 368 576 192
WIRE -48 416 -48 208
WIRE 160 416 32 416
WIRE 304 416 304 64
WIRE 304 416 160 416
WIRE 496 448 496 192
WIRE 528 448 496 448
WIRE -48 496 -48 416
WIRE 208 496 208 432
WIRE 208 496 -48 496
WIRE 400 496 400 -64
WIRE 400 496 208 496
WIRE 576 496 576 464
WIRE 576 496 400 496
WIRE 208 512 208 496
SYMBOL nmos 160 208 R0
SYMATTR InstName M3
SYMATTR Value BSP89
SYMBOL pmos 128 144 R180
SYMATTR InstName M1
SYMATTR Value AO6407
SYMBOL nmos 160 336 R0
SYMATTR InstName M4
SYMATTR Value BSP89
SYMBOL voltage 48 208 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 8 1 1n 1n 2 4 10)
SYMBOL nmos 528 368 R0
SYMATTR InstName M6
SYMATTR Value BSP89
SYMBOL voltage 208 64 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 7
SYMBOL pmos 304 144 R180
SYMATTR InstName M2
SYMATTR Value AO6407
SYMBOL voltage 48 416 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 8 1 1n 1n 4 8 10)
SYMBOL pmos 624 192 R180
SYMATTR InstName M5
SYMATTR Value AO6407
SYMBOL voltage 576 32 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 5
FLAG 208 512 0
TEXT -162 536 Left 2 !.tran 50
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7156-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7156-1.2.asy)
C2 N003 0 1
Rload OUT 0 1.2
R1 IN N001 100K
C4 N002 0 1
C1 OUT 0 10 Rser=10m Lser=1n
C3 N004 0 1 Rser=10m Lser=1n
XU1 OUT MP_01 OUT N002 N001 N003 N003 N004 IN 0 ADP7156_7 Vreg=2.111 Vref=1.216 ;pnba Vout))Vout_Sense)Byp)EN)Ref_Sense)Ref)Vreg)Vin)GND
V1 IN 0 2.4
.tran 5m startup
.lib ADP7156_7.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -144 32
WIRE 80 32 -32 32
WIRE 416 32 400 32
WIRE 464 32 416 32
WIRE 560 32 464 32
WIRE -144 48 -144 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE 416 128 416 32
WIRE 416 128 400 128
WIRE -144 144 -144 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE -16 224 -32 224
WIRE 80 224 48 224
WIRE 416 224 400 224
WIRE 464 224 416 224
WIRE 464 240 464 224
WIRE -16 320 -32 320
WIRE 80 320 48 320
WIRE 416 320 416 224
WIRE 416 320 400 320
WIRE 464 320 464 304
WIRE 240 400 240 384
SYMBOL res 544 32 R0
SYMATTR InstName Rload
SYMATTR Value 1.2
SYMBOL cap 48 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMATTR Value2 Rser=10m
SYMATTR SpiceLine Lser=1n
SYMBOL ADP7156-1.2 240 176 R0
SYMATTR InstName U1
SYMBOL cap 48 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 448 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR Value2 Rser=10m
SYMATTR SpiceLine Lser=1n
SYMBOL voltage -144 32 R0
SYMATTR InstName V1
SYMATTR Value 2.4
SYMBOL cap 448 240 R0
SYMATTR InstName C2
SYMATTR Value 1
FLAG 240 400 0
FLAG 464 320 0
FLAG 464 144 0
FLAG -32 320 0
FLAG -32 224 0
FLAG -144 144 0
FLAG 560 144 0
FLAG -144 32 IN
FLAG 560 32 OUT
TEXT 504 368 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1d0e35e25058_stepmodelparam.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
I1 0 N002 0
Q1 N001 N002 0 0 2N2222
V1 N001 0 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 10 10m I1 10u 50u 10u
.step NPN 2N2222(Vaf) 100 50 25
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2252 1608
WIRE 1872 1232 1728 1232
WIRE 1728 1248 1728 1232
WIRE 1872 1248 1872 1232
WIRE 1664 1296 1520 1296
WIRE 1520 1312 1520 1296
WIRE 1872 1344 1872 1328
WIRE 1728 1360 1728 1344
WIRE 1520 1408 1520 1392
SYMBOL voltage 1872 1232 R0
WINDOW 39 0 0 Left 2
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL npn 1664 1248 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL current 1520 1392 M180
WINDOW 0 23 76 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName I1
SYMATTR Value 0
FLAG 1520 1408 0
FLAG 1728 1360 0
FLAG 1872 1344 0
TEXT 1560 1448 Left 2 !.dc V1 0 10 10m I1 10u 50u 10u
TEXT 1552 1480 Left 2 !.step NPN 2N2222(Vaf) 100 50 25
TEXT 1736 1512 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4251-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4251-2.asy)
XU1 N005 IN N001 N004 N002 N003 LTC4251-2 ;pnba Sense)Vee)Vin)Timer)UV)Gate
V1 IN 0 PWL(0 0 1m 0 1.001m -48 220m -48 221m -70)
C3 N006 IN 18n
Rload 0 OUT 50
C5 0 OUT 100
R2 N003 N006 10
R4 0 N002 402K
C4 N001 IN 1
M1 OUT N003 N005 N005 IRF530
C1 N002 IN 10n
C2 N004 IN 150n
R6 N005 IN 20m
R1 0 N001 10K
R7 N002 IN 32.4K
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 400m
.lib LTC4251-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4692 2996
WIRE 2496 1760 2496 1744
WIRE 2640 1760 2640 1744
WIRE 2016 1776 2016 1744
WIRE 1456 1840 1456 1744
WIRE 2496 1856 2496 1824
WIRE 2640 1856 2640 1840
WIRE 2640 1856 2496 1856
WIRE 2704 1856 2640 1856
WIRE 2016 1872 2016 1856
WIRE 2016 1872 1696 1872
WIRE 2496 1872 2496 1856
WIRE 2016 1888 2016 1872
WIRE 864 1936 864 1744
WIRE 1456 1952 1456 1920
WIRE 1600 1952 1456 1952
WIRE 1824 1952 1600 1952
WIRE 2384 1952 2208 1952
WIRE 2448 1952 2384 1952
WIRE 2384 1968 2384 1952
WIRE 1696 1984 1696 1872
WIRE 1456 2000 1456 1952
WIRE 1600 2016 1600 1952
WIRE 1744 2096 1728 2096
WIRE 1824 2096 1808 2096
WIRE 2496 2096 2496 1968
WIRE 2496 2096 2208 2096
WIRE 2384 2112 2384 2048
WIRE 2496 2112 2496 2096
WIRE 864 2208 864 2016
WIRE 1456 2208 1456 2080
WIRE 1456 2208 864 2208
WIRE 1600 2208 1600 2080
WIRE 1600 2208 1456 2208
WIRE 1696 2208 1696 2048
WIRE 1696 2208 1600 2208
WIRE 1728 2208 1728 2096
WIRE 1728 2208 1696 2208
WIRE 2016 2208 2016 2160
WIRE 2016 2208 1728 2208
WIRE 2384 2208 2384 2176
WIRE 2384 2208 2016 2208
WIRE 2496 2208 2496 2192
WIRE 2496 2208 2384 2208
SYMBOL cap 2480 1760 R0
SYMATTR InstName C5
SYMATTR Value 100
SYMBOL nmos 2448 1872 R0
WINDOW 0 101 14 Right 2
WINDOW 3 140 76 Right 2
SYMATTR InstName M1
SYMATTR Value IRF530
SYMBOL res 1440 1824 R0
SYMATTR InstName R4
SYMATTR Value 402K
SYMBOL res 2512 2096 M0
WINDOW 0 -38 37 Left 2
WINDOW 3 -56 78 Left 2
SYMATTR InstName R6
SYMATTR Value 20m
SYMBOL res 2000 1760 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 864 2032 M180
WINDOW 3 24 16 Left 2
WINDOW 39 24 -5 Left 2
WINDOW 0 24 96 Left 2
WINDOW 123 24 -26 Left 2
SYMATTR Value PWL(0 0 1m 0 1.001m -48 220m -48 221m -70)
SYMATTR InstName V1
SYMBOL cap 1808 2080 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 150n
SYMBOL cap 1680 1984 R0
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL res 1440 1984 R0
SYMATTR InstName R7
SYMATTR Value 32.4K
SYMBOL res 2368 1952 R0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL res 2624 1744 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL cap 1584 2016 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL LTC4251-2 2016 2016 R0
SYMATTR InstName U1
SYMBOL cap 2368 2112 R0
SYMATTR InstName C3
SYMATTR Value 18n
FLAG 864 2208 IN
FLAG 2704 1856 OUT
FLAG 864 1744 0
FLAG 1456 1744 0
FLAG 2016 1744 0
FLAG 2496 1744 0
FLAG 2640 1744 0
TEXT 2632 2200 Left 2 !.tran 400m
* Z:\home\khalils\Downloads\files\data\raw_asc\779211cd7524_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 0 NMOS
V2 N001 0 V
V1 N002 0 3.3
R1 N001 0 R
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc library.mod
.dc V2 0 3.3 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 464 32 336 32
WIRE 464 48 464 32
WIRE 528 64 496 64
WIRE 256 96 64 96
WIRE 336 96 336 32
WIRE 336 96 256 96
WIRE 496 96 496 64
WIRE 496 96 464 96
WIRE 528 96 528 64
WIRE 256 144 256 96
WIRE 464 176 464 144
WIRE 64 208 64 176
WIRE 416 208 416 128
WIRE 256 256 256 224
WIRE 416 320 416 288
SYMBOL voltage 256 128 R0
SYMATTR InstName V2
SYMBOL voltage 416 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL nmos4 416 48 R0
SYMATTR InstName M1
SYMBOL res 48 80 R0
SYMATTR InstName R1
FLAG 64 208 0
FLAG 256 256 0
FLAG 416 320 0
FLAG 464 176 0
FLAG 528 96 0
TEXT 312 -48 Left 2 !.inc library.mod
TEXT 312 -8 Left 2 !.dc V2 0 3.3 0.1