Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1a0c86f65149_Two_Input_H-Bridge.asc
* Generated by LTspice 26.0.1 for Windows.
* NOTE :- Don't need those 1k resistors
* Dual Input H-Bridge
R4 N010 N013 100
R5 N011 N012 100
Q1 N008 N012 0 0 BC547B
Q6 N004 N007 N011 0 BC547B
Q4 N009 N004 N001 0 BC557C
R3 N005 N007 1
R2 N002 N006 1
R1 N009 N008 1
V2 N002 0 PULSE(0 3.3 0 0 0 1)
V3 N005 0 PULSE(0 3.3 1 0 0 1)
Q5 N003 N006 N010 0 BC547B
Q2 N009 N013 0 0 BC547B
V1 N001 0 5
Q3 N008 N003 N001 0 BC557C
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1548 680
WIRE 288 -464 -144 -464
WIRE 784 -464 288 -464
WIRE -16 -352 -80 -352
WIRE 288 -352 288 -464
WIRE 784 -352 784 -464
WIRE -80 -304 -80 -352
WIRE 400 -304 352 -304
WIRE 992 -304 848 -304
WIRE 1280 -208 848 -208
WIRE -16 -192 -16 -352
WIRE 848 -176 848 -208
WIRE -80 -160 -80 -224
WIRE 1280 -144 1280 -208
WIRE -144 -112 -144 -464
WIRE 400 -112 400 -304
WIRE 400 -112 112 -112
WIRE 992 -112 992 -304
WIRE 992 -112 976 -112
WIRE -16 -64 -16 -112
WIRE 48 -64 -16 -64
WIRE 848 -64 848 -96
WIRE 912 -64 848 -64
WIRE 288 -32 288 -256
WIRE 512 -32 288 -32
WIRE 784 -32 784 -256
WIRE 784 -32 592 -32
WIRE 1280 -32 1280 -64
WIRE 112 48 112 -16
WIRE 560 48 112 48
WIRE 976 112 976 -16
WIRE 976 112 80 112
WIRE 80 144 80 112
WIRE 560 144 560 48
WIRE 288 208 288 -32
WIRE 784 208 784 -32
WIRE 80 256 80 224
WIRE 224 256 80 256
WIRE 560 256 560 224
WIRE 720 256 560 256
WIRE -144 432 -144 -32
WIRE 80 432 -144 432
WIRE 288 432 288 304
WIRE 288 432 80 432
WIRE 784 432 784 304
WIRE 784 432 288 432
WIRE 80 480 80 432
SYMBOL res 544 128 R0
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL voltage -144 -128 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 64 128 R0
SYMATTR InstName R5
SYMATTR Value 100
SYMBOL npn 912 -112 R0
SYMATTR InstName Q6
SYMATTR Value BC547B
SYMBOL res 608 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL res 832 -192 R0
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL npn 224 208 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL pnp 352 -256 R180
SYMATTR InstName Q3
SYMATTR Value BC557C
SYMBOL res -32 -208 R0
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL npn 48 -112 R0
SYMATTR InstName Q5
SYMATTR Value BC547B
SYMBOL npn 720 208 R0
SYMATTR InstName Q2
SYMATTR Value BC547B
SYMBOL voltage -80 -320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 0 0 0 1)
SYMBOL voltage 1280 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 3.3 1 0 0 1)
SYMBOL pnp 848 -256 R180
SYMATTR InstName Q4
SYMATTR Value BC557C
FLAG 80 480 0
FLAG -80 -160 0
FLAG 1280 -32 0
TEXT -176 504 Left 2 !.tran 10
TEXT -816 200 Left 2 ;NOTE :- Don't need those 1k resistors
TEXT 192 -536 Left 3 ;Dual Input H-Bridge
* Z:\home\khalils\Downloads\files\data\raw_asc\00ee2ceb468a_Diode-Clipper-Vref.asc
* Generated by LTspice 26.0.1 for Windows.
D1 b N001 1N4148
R1 b a 1000
V1 a 0 SINE(0 3V 50Hz)
V2 N001 0 {Vref}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05s
.step param vref list 0 1V 2V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 96 -112 96
WIRE 208 96 80 96
WIRE 224 96 208 96
WIRE 224 128 224 96
WIRE -112 192 -112 96
WIRE 224 224 224 192
WIRE -112 336 -112 272
WIRE 48 336 -112 336
WIRE 224 336 224 304
WIRE 224 336 48 336
WIRE 48 352 48 336
SYMBOL Misc\\signal -112 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 38 63 Left 2
SYMATTR Value SINE(0 3V 50Hz)
SYMATTR InstName V1
SYMBOL voltage 224 208 R0
SYMATTR InstName V2
SYMATTR Value {Vref}
SYMBOL diode 208 128 R0
WINDOW 3 41 28 Left 2
SYMATTR Value 1N4148
SYMATTR InstName D1
SYMBOL Misc\\EuropeanResistor 96 80 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1000
FLAG -112 96 a
FLAG 208 96 b
FLAG 48 352 0
TEXT -112 368 Left 2 !.tran 0.05s
TEXT -112 408 Left 2 !.step param vref list 0 1V 2V
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7170-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7170-1.8.asy)
C2 N001 0 1n
Rload OUT 0 6
C1 OUT 0 4.7 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADM7170-1.8 ;pnba Vin)Sense)EN)SS)Vout)GND
V1 IN 0 2.3
.tran 5m startup
.lib ADM7170-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 6
SYMBOL ADM7170-1.8 224 128 R0
SYMATTR InstName U1
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.3
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\06da7ba760c8_eje2b.asc
* Generated by LTspice 26.0.1 for Windows.
RL N004 0 100
rpc N005 0 1
L1 N002 N003 4.6898e-08 Rser=0
rg N002 N001 10
R1 N004 N003 0.295
C1 N004 N005 4.775e-11
V1 N001 0 AC 8.944e-04 Rser=0
.ac dec 1000 10e6 400e6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -496 64 -544 64
WIRE -368 64 -416 64
WIRE -240 64 -288 64
WIRE -96 64 -160 64
WIRE 80 64 -96 64
WIRE -96 80 -96 64
WIRE 80 96 80 64
WIRE -544 112 -544 64
WIRE -96 176 -96 144
WIRE -544 272 -544 192
WIRE -96 272 -96 256
WIRE -96 272 -544 272
WIRE 80 272 80 176
WIRE 80 272 -96 272
SYMBOL cap -112 80 R0
SYMATTR InstName C1
SYMATTR Value 4.775e-11
SYMBOL res 64 80 R0
SYMATTR InstName RL
SYMATTR Value 100
SYMBOL res -112 160 R0
SYMATTR InstName rpc
SYMATTR Value 1
SYMBOL res -144 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 0.295
SYMBOL ind -384 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.6898e-08
SYMATTR SpiceLine Rser=0
SYMBOL res -400 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName rg
SYMATTR Value 10
SYMBOL voltage -544 96 R0
WINDOW 123 24 124 Left 2
WINDOW 39 24 44 Left 2
SYMATTR Value2 AC 8.944e-04
SYMATTR SpiceLine Rser=0
SYMATTR InstName V1
SYMATTR Value ""
FLAG 80 272 0
TEXT -576 264 Left 2 !.ac dec 1000 10e6 400e6
* Z:\home\khalils\Downloads\files\data\raw_asc\68761fc97c0b_ReverseVoltageProtection.asc
* Generated by LTspice 26.0.1 for Windows.
R2 G 0 1.8m
D1 G S BZX84C6V2L
V1 V+/D 0 Rser=10
R1 N001 G 200k
M1 V+/D N001 S S PMOS
R3 S 0 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V1 -10 10 .1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 32 -96 32
WIRE 432 32 208 32
WIRE 528 32 432 32
WIRE 624 32 528 32
WIRE 432 112 432 32
WIRE 192 128 192 80
WIRE 624 160 624 32
WIRE -96 176 -96 32
WIRE 192 240 192 208
WIRE 432 240 432 176
WIRE 432 240 192 240
WIRE 528 240 432 240
WIRE 192 272 192 240
WIRE -96 384 -96 256
WIRE 192 384 192 352
WIRE 192 384 -96 384
WIRE 528 384 192 384
WIRE 624 384 624 240
WIRE 624 384 528 384
WIRE 192 432 192 384
SYMBOL zener 448 176 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D1
SYMATTR Value BZX84C6V2L
SYMBOL res 176 112 R0
SYMATTR InstName R1
SYMATTR Value 200k
SYMBOL voltage -96 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 0
SYMATTR SpiceLine Rser=10
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL res 608 144 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL pmos 112 80 R270
SYMATTR InstName M1
SYMBOL res 176 256 R0
SYMATTR InstName R2
SYMATTR Value 1.8m
FLAG 528 384 V-
FLAG 528 240 G
FLAG -96 32 V+/D
FLAG 528 32 S
FLAG 192 432 0
TEXT -144 448 Left 0 !.dc V1 -10 10 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\0a2417ca8467_Select_Source_by_Param_2.asc
* Generated by LTspice 26.0.1 for Windows.
* Select a source V1 ... V3 by switch parameter s
;.step param s 1 3 1
V1 1 0 SINE(0 1 5)
B1 0 out V=V({s})
V3 3 0 PULSE(0 1 0 .02 .04 .025 .2)
V2 2 0 PULSE(0 1 0 .1 .2 .1 .5)
.param s=1 ;switch parameter
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 176 176 128
WIRE 176 336 176 288
WIRE 176 496 176 448
WIRE 240 128 176 128
WIRE 240 288 176 288
WIRE 240 448 176 448
WIRE 416 176 416 128
WIRE 608 128 416 128
IOPIN 608 128 Out
SYMBOL voltage 176 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 5)
SYMBOL voltage 176 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 0 .1 .2 .1 .5)
SYMBOL voltage 176 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 0 .02 .04 .025 .2)
SYMBOL bi 416 256 R180
WINDOW 0 24 88 Left 0
WINDOW 3 -83 -59 Left 0
SYMATTR InstName B1
SYMATTR Value V=V({s})
FLAG 416 256 0
FLAG 176 256 0
FLAG 240 128 1
FLAG 176 416 0
FLAG 240 288 2
FLAG 608 128 out
FLAG 176 576 0
FLAG 240 448 3
TEXT 384 56 Left 0 !.param s=1  ;switch parameter\n;.step param s 1 3 1
TEXT 158 66 Left 0 !.tran 1
TEXT 152 24 Left 0 ;Select a source V1 ... V3 by switch parameter s
* Z:\tmp\asc_dec_bjh7r6w2\0d63db54984e_pre-amp_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
Q2 vout 0 N004 0 BC547B
VEE1 N005 0 -5
VCC1 N001 0 5
RE1 N004 N005 5k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 -80 48 -96
WIRE 48 -80 -48 -80
WIRE 144 -80 48 -80
WIRE -48 -64 -48 -80
WIRE 144 -64 144 -80
WIRE 144 32 144 16
WIRE 368 32 144 32
WIRE -48 48 -48 16
WIRE 144 48 144 32
WIRE -112 96 -176 96
WIRE 256 96 208 96
WIRE -48 192 -48 144
WIRE 48 192 -48 192
WIRE 144 192 144 144
WIRE 144 192 48 192
WIRE 256 192 256 96
WIRE 48 240 48 192
WIRE 48 336 48 320
SYMBOL npn 208 48 M0
SYMATTR InstName Q2
SYMATTR Value BC547B
SYMBOL voltage 48 320 R0
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VEE1
SYMATTR Value -5
SYMBOL voltage 48 -80 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VCC1
SYMATTR Value 5
SYMBOL res 32 224 R0
SYMATTR InstName RE1
SYMATTR Value 5k
FLAG 48 -176 0
FLAG 256 192 0
FLAG 48 416 0
FLAG 368 32 vout
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2503-3.5.asc
* Generated by LTspice 26.0.1 for Windows.
* PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2503-3.5.asy)
XU1 N001 N002 OUT IN IN 0 OUT NC_01 ADP2503-3.5 ;pnba SW1)SW2)FB)EN)PVin)GND)Vout)Sync
Rload OUT 0 50
C1 OUT 0 10
L1 N001 N002 1.5 Rser=80m
V1 IN 0 3.3
.tran 400u startup
.lib ADP2503-3.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 48 64 32 64
WIRE 336 64 304 64
WIRE -64 80 -64 64
WIRE 32 144 32 64
WIRE 48 144 32 144
WIRE 336 144 304 144
WIRE -64 176 -64 160
WIRE 320 224 304 224
WIRE 368 224 320 224
WIRE 480 224 368 224
WIRE 368 240 368 224
WIRE 480 240 480 224
WIRE 48 304 32 304
WIRE 320 304 320 224
WIRE 320 304 304 304
WIRE 368 336 368 304
WIRE 480 336 480 320
SYMBOL voltage -64 64 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 464 224 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL ind 320 48 R0
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=80m
SYMBOL ADP2503-3.5 176 176 R0
SYMATTR InstName U1
SYMBOL cap 352 240 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 368 336 0
FLAG 32 304 0
FLAG -64 176 0
FLAG 480 336 0
FLAG -64 64 IN
FLAG 480 224 OUT
TEXT 424 376 Left 2 !.tran 400u startup
TEXT 168 0 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\0a7ef828cb78_Nand.asc
* Generated by LTspice 26.0.1 for Windows.
M4 Vhigh Vin2 Vout Vhigh PMOS l=180nm w=810nm
M3 Vhigh Vin1 Vout Vhigh PMOS l=180nm w=810nm
M2 N001 Vin1 0 0 NMOS l=180nm w=270nm
M1 Vout Vin2 N001 0 NMOS l=180nm w=270nm
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 -240 32 -240
WIRE 224 -240 80 -240
WIRE 464 -240 224 -240
WIRE 32 -160 32 -240
WIRE 32 -160 -32 -160
WIRE 160 -160 32 -160
WIRE -32 -112 -32 -160
WIRE 160 -112 160 -160
WIRE 80 -64 80 -240
WIRE 80 -64 -32 -64
WIRE 224 -64 224 -240
WIRE 224 -64 160 -64
WIRE -80 -32 -272 -32
WIRE 112 -32 16 -32
WIRE -32 16 -32 -16
WIRE 80 16 -32 16
WIRE 160 16 160 -16
WIRE 160 16 80 16
WIRE 80 80 80 16
WIRE 656 80 80 80
WIRE 80 96 80 80
WIRE 16 112 16 -32
WIRE 16 112 -176 112
WIRE 256 144 80 144
WIRE 16 176 16 112
WIRE 32 176 16 176
WIRE 80 256 80 192
WIRE 176 304 80 304
WIRE -272 336 -272 -32
WIRE 32 336 -272 336
WIRE 176 352 176 304
WIRE 256 352 256 144
WIRE 256 352 176 352
WIRE 80 384 80 352
WIRE 176 384 176 352
WIRE 176 384 80 384
WIRE 80 400 80 384
WIRE 80 416 80 400
IOPIN -272 -32 In
IOPIN -176 112 In
IOPIN 656 80 Out
IOPIN 80 400 In
IOPIN 464 -240 In
SYMBOL pmos4 112 -112 R0
SYMATTR InstName M4
SYMATTR Value2 l=180nm w=810nm
SYMBOL nmos4 32 256 R0
SYMATTR InstName M2
SYMATTR Value2 l=180nm w=270nm
SYMBOL nmos4 32 96 R0
SYMATTR InstName M1
SYMATTR Value2 l=180nm w=270nm
SYMBOL pmos4 -80 -112 R0
SYMATTR InstName M3
SYMATTR Value2 l=180nm w=810nm
FLAG -272 -32 Vin1
FLAG -176 112 Vin2
FLAG 656 80 Vout
FLAG 80 416 0
FLAG 80 400 Vlow
FLAG 464 -240 Vhigh
* Z:\home\khalils\Downloads\files\data\raw_asc\2007e83f53a7_ADG774A.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 3
V2 N003 0 0
V3 N004 0 PULSE(0 3 0 20n 20n 10u 20u)
R1 N002 0 49.9
C1 N002 0 36p
V5 +V 0 5
XU2 N004 N001 N002 N003 +V 0 0 ADG774A ;pnba IN)SA)D)SB)Vdd)GND)_EN
.tran 100u
* Note:\nOff Isolation is -69 dB at 10MHz\nQinj not included\nOnly one channel included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG774A.asy)
.lib ADG774A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1696 -272 -1920 -272
WIRE -1920 -256 -1920 -272
WIRE -1408 -240 -1504 -240
WIRE -1296 -240 -1408 -240
WIRE -1408 -224 -1408 -240
WIRE -1296 -224 -1296 -240
WIRE -1696 -208 -1840 -208
WIRE -1840 -192 -1840 -208
WIRE -1920 -160 -1920 -176
WIRE -1696 -144 -1760 -144
WIRE -1472 -144 -1504 -144
WIRE -1472 -128 -1472 -144
WIRE -1408 -128 -1408 -144
WIRE -1296 -128 -1296 -160
WIRE -1840 -96 -1840 -112
WIRE -1760 -80 -1760 -144
WIRE -1600 -16 -1600 -32
WIRE -1760 32 -1760 0
FLAG -1920 -160 0
FLAG -1840 -96 0
FLAG -1760 32 0
FLAG -1600 -368 +V
FLAG -1408 -128 0
FLAG -1600 -16 0
FLAG -1296 -128 0
FLAG -1472 -128 0
FLAG -2144 -64 0
FLAG -2144 -144 +V
SYMBOL voltage -1920 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL voltage -1840 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage -1760 -96 R0
WINDOW 3 24 136 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 20n 20n 10u 20u)
SYMATTR InstName V3
SYMBOL res -1424 -240 R0
SYMATTR InstName R1
SYMATTR Value 49.9
SYMBOL cap -1312 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -2144 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 5
SYMBOL ADG774A -1600 -192 R0
SYMATTR InstName U2
TEXT -1360 -40 Left 2 !.tran 100u
TEXT -2160 -472 Left 2 ;Note:\nOff Isolation is -69 dB at 10MHz\nQinj not included\nOnly one channel included\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2109-1.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2109-1.0.asy)
L1 N001 OUT 1
XU1 IN IN N001 OUT 0 ADP2109-x.x Rtop=80K ;pnba Vin)EN)SW)FB)GND
C1 OUT 0 10
V1 IN 0 5
Rload OUT 0 4
.tran .5m startup
.lib ADP2109-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 144
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 4
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADP2109-1.0 352 224 R0
SYMATTR InstName U1
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
TEXT 600 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\312d42cdc4b5_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ISO7637-2.asy)
R2 N001 NC_02 R
R3 NC_03 NC_04 R
R1 N001 NC_01 R
XU1 NC_05 NC_06 Pulse1_12V ;pnba +)-
.lib ISO7637-2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 0 128 0
WIRE 128 80 128 0
WIRE 224 80 224 0
SYMBOL res 112 64 R0
SYMATTR InstName R1
SYMBOL ISO7637-2 384 0 R0
SYMATTR InstName U1
SYMBOL res 352 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMBOL res 208 64 R0
SYMATTR InstName R2
* Z:\home\khalils\Downloads\files\data\raw_asc\07747c86175f_Draft20.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4625.asy)
R4 N002 N001 1k
V1 0 VEE2 15
I1 0 N003 1mA
V2 VCC2 0 15
V3 P3V3 0 3.3
XU2 0 N001 VCC2 VEE2 N002 ADA4625-1 ;pnba In+)In-)V+)V-)OUT
R1 N001 N003 1R
C1 N002 N001 20p
.tran 0.1
.model MYSW SW(Ron=1 Roff=10G Vt=.5 Vh=-.4)
.lib ADA4625-1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1768 872
WIRE 480 -112 432 -112
WIRE 608 -112 544 -112
WIRE 160 16 64 16
WIRE 304 16 240 16
WIRE 432 16 432 -112
WIRE 432 16 304 16
WIRE 480 16 432 16
WIRE 608 16 608 -112
WIRE 608 16 560 16
WIRE 672 16 608 16
WIRE 304 112 304 16
WIRE 384 112 304 112
WIRE 672 128 672 16
WIRE 672 128 448 128
WIRE 384 144 288 144
WIRE 128 480 16 480
WIRE 240 560 240 544
SYMBOL OpAmps\\ADA4625 416 64 R0
WINDOW 3 -59 187 Left 2
SYMATTR InstName U2
SYMBOL cap 544 -128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 20p
SYMBOL res 576 0 R90
WINDOW 0 -33 56 VBottom 2
WINDOW 3 -27 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL voltage 16 384 R0
WINDOW 0 54 29 Left 2
WINDOW 3 50 56 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL current 64 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 1mA
SYMBOL res 256 0 R90
WINDOW 0 -33 56 VBottom 2
WINDOW 3 -27 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1R
SYMBOL voltage 240 544 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 46 44 Left 2
WINDOW 0 38 16 Left 2
SYMATTR Value 3.3
SYMATTR InstName V3
SYMBOL voltage 16 464 R0
WINDOW 0 54 29 Left 2
WINDOW 3 50 56 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
FLAG 128 480 0
FLAG 16 560 VEE2
FLAG 16 400 VCC2
FLAG 416 160 VEE2
FLAG 416 96 VCC2
FLAG 240 640 0
FLAG 240 544 P3V3
FLAG 64 -64 0
FLAG 288 144 0
TEXT 272 360 Left 2 !.tran 0.1
TEXT -720 560 Left 2 !.model MYSW SW(Ron=1 Roff=10G Vt=.5 Vh=-.4)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT5400-6.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\LT5400-6.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1468.asy)
C1 N001 OUT 4.7p
V2 -V 0 -15
V1 +V 0 15
C2 N002 0 4.7p
V3 IN 0 AC 1
XU1 OUT IN 0 0 N002 N002 N001 N001 NC_01 LT5400-6 ;pnba 1)2)3)4)5)6)7)8)PAD
XU2 N002 N001 +V -V OUT LT1468 ;pnba In+)In-)V+)V-)OUT
.ac oct 10 1K 10Meg
.lib LT5400.lib
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2836 1472
WIRE 2304 624 1936 624
WIRE 1936 688 1936 624
WIRE 2016 688 1936 688
WIRE 2192 688 2080 688
WIRE 1936 816 1936 688
WIRE 1952 816 1936 816
WIRE 2192 816 2192 688
WIRE 2192 816 2144 816
WIRE 1952 880 1744 880
WIRE 2192 880 2192 816
WIRE 2192 880 2144 880
WIRE 1392 896 1392 880
WIRE 1520 896 1520 880
WIRE 1744 896 1744 880
WIRE 2192 896 2192 880
WIRE 2208 896 2192 896
WIRE 2304 912 2304 624
WIRE 2304 912 2272 912
WIRE 2336 912 2304 912
WIRE 2208 928 2192 928
WIRE 1952 944 1936 944
WIRE 2192 944 2192 928
WIRE 2192 944 2144 944
WIRE 1392 992 1392 976
WIRE 1520 992 1520 976
WIRE 1744 992 1744 976
WIRE 1920 1008 1872 1008
WIRE 1952 1008 1920 1008
WIRE 2192 1008 2192 944
WIRE 2192 1008 2144 1008
WIRE 1920 1120 1920 1008
WIRE 2016 1120 1920 1120
WIRE 2192 1120 2192 1008
WIRE 2192 1120 2080 1120
SYMBOL voltage 1744 880 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL opamps\\LT1468 2240 848 R0
SYMATTR InstName U2
SYMBOL cap 2080 1104 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7p
SYMBOL misc\\LT5400-6 2048 912 R0
SYMATTR InstName U1
SYMBOL cap 2080 672 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7p
SYMBOL voltage 1392 880 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 1520 880 R0
SYMATTR InstName V1
SYMATTR Value 15
FLAG 2240 880 +V
FLAG 2240 944 -V
FLAG 2336 912 OUT
FLAG 1520 992 0
FLAG 1520 880 +V
FLAG 1392 992 0
FLAG 1392 880 -V
FLAG 1744 992 0
FLAG 1744 880 IN
FLAG 1872 1008 0
FLAG 1936 944 0
TEXT 2312 1064 Left 2 !.ac oct 10 1K 10Meg