Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\a20410b774dd_TS1.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N001 N004 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R1 N001 N003 {R1/R0}
R2 N002 N001 {R2/R0}
R3 0 N004 {R3/R0}
C1 N004 N003 {Q*(R0/w0)}
V1 N003 0 AC 1
.ac dec 100 0.1 100MEG
.lib opamp.sub
.param R0=1
.param R1=1
.param R2=R1
.param R3=R0
.param w0=2*pi*1k
.param Q=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 64 96 64
WIRE 384 64 288 64
WIRE -144 144 -320 144
WIRE -96 144 -144 144
WIRE 96 144 96 64
WIRE 96 144 -16 144
WIRE 128 144 96 144
WIRE 384 160 384 64
WIRE 384 160 192 160
WIRE 128 176 80 176
WIRE -320 192 -320 144
WIRE -144 240 -144 144
WIRE -80 240 -144 240
WIRE 80 240 80 176
WIRE 80 240 -16 240
WIRE -320 320 -320 272
WIRE 80 368 80 320
FLAG 80 368 0
FLAG -320 320 0
SYMBOL OpAmps\\opamp 160 96 R0
SYMATTR InstName U1
SYMBOL res 0 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R1/R0}
SYMBOL res 304 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R2/R0}
SYMBOL res 96 336 R180
WINDOW 0 36 76 Left 2
WINDOW 3 37 16 Left 2
SYMATTR InstName R3
SYMATTR Value {R3/R0}
SYMBOL cap -16 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 85 VTop 2
SYMATTR InstName C1
SYMATTR Value {Q*(R0/w0)}
SYMBOL voltage -320 176 R0
WINDOW 123 17 102 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
TEXT -352 392 Left 2 !.ac dec 100 0.1 100MEG
TEXT 208 232 Left 2 !.lib opamp.sub
TEXT 256 296 Left 2 !.param R0=1\n.param R1=1\n.param R2=R1\n.param R3=R0\n.param w0=2*pi*1k\n.param Q=1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADR1001.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR1001.asy)
XU1 N004 NC_01 6P6V 6P6V 6P6V NC_02 NC_03 5V N002 N002 5V 0 0 0 0 N003 VIN PG TCHIP ADR1001 ;pnba 1)2)3)4)5)6)7)8)9)10)11)12)13)14)15)16)17)18)19
CNF 0 N002 1
VPG N001 0 5
COUT 5V 0 1
VIN VIN 0 15
VIHeater VIN N003 0
RPG N001 PG 10k
RISET N004 0 120
CIN 0 VIN 1
.tran 10 startup
.lib ADR1001.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 7208 5924
WIRE 2880 400 2224 400
WIRE 2912 400 2880 400
WIRE 2960 400 2912 400
WIRE 3056 400 2960 400
WIRE 3168 400 3136 400
WIRE 2960 416 2960 400
WIRE 3168 416 3168 400
WIRE 2224 432 2224 400
WIRE 2400 480 2368 480
WIRE 2512 480 2480 480
WIRE 2512 496 2512 480
WIRE 2960 496 2960 480
WIRE 2368 528 2368 480
WIRE 2960 624 2800 624
WIRE 3040 624 2960 624
WIRE 3232 624 3136 624
WIRE 3264 624 3232 624
WIRE 3360 624 3328 624
WIRE 2496 640 2496 608
WIRE 3360 640 3360 624
WIRE 2368 656 2368 608
WIRE 2224 688 2224 512
WIRE 2368 688 2368 656
WIRE 2496 688 2496 640
WIRE 2800 688 2800 624
WIRE 2880 688 2880 400
WIRE 2960 688 2960 624
WIRE 3040 688 3040 624
WIRE 3136 688 3136 624
WIRE 3232 688 3232 624
WIRE 3536 880 3472 880
WIRE 3536 928 3536 880
WIRE 3536 928 3472 928
WIRE 3536 960 3536 928
WIRE 3536 1040 3536 1024
WIRE 2688 1360 2688 1328
WIRE 2224 1456 2224 1328
WIRE 2336 1456 2336 1328
WIRE 2336 1456 2224 1456
WIRE 2688 1456 2688 1440
WIRE 2688 1456 2336 1456
WIRE 2800 1456 2800 1328
WIRE 2800 1456 2688 1456
WIRE 3312 1456 3312 1328
WIRE 3312 1456 2800 1456
WIRE 2688 1488 2688 1456
SYMBOL voltage 2224 416 R0
SYMATTR InstName VIHeater
SYMATTR Value 0
SYMBOL cap 2944 480 M180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName CIN
SYMATTR Value 1u
SYMBOL cap 3520 960 R0
SYMATTR InstName COUT
SYMATTR Value 1u
SYMBOL ADR1001 2832 1024 R0
SYMATTR InstName U1
SYMBOL cap 3328 608 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName CNF
SYMATTR Value 1u
SYMBOL res 2352 512 R0
SYMATTR InstName RPG
SYMATTR Value 10k
SYMBOL res 2672 1344 R0
SYMATTR InstName RISET
SYMATTR Value 120
SYMBOL voltage 3040 400 R270
WINDOW 0 41 59 VTop 2
WINDOW 3 -39 58 VBottom 2
SYMATTR InstName VIN
SYMATTR Value 15
SYMBOL voltage 2384 480 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName VPG
SYMATTR Value 5
FLAG 2688 1488 0
FLAG 2512 496 0
FLAG 2368 656 PG
FLAG 3168 416 0
FLAG 2960 496 0
FLAG 3536 880 5V
FLAG 2912 400 VIN
FLAG 3040 624 6P6V
FLAG 2496 640 TCHIP
FLAG 3536 1040 0
FLAG 3360 640 0
TEXT 2192 1512 Left 2 !.tran 10 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT5400-8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\LT5400-8.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1468.asy)
V2 -V 0 -15
C2 N002 0 4.7p
XU2 N002 N001 +V -V OUT LT1468 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
XU1 OUT IN 0 0 N002 N002 N001 N001 NC_01 LT5400-8 ;pnba 1)2)3)4)5)6)7)8)PAD
C1 N001 OUT 4.7p
V3 IN 0 AC 1
.ac oct 10 1K 10Meg
.lib LT5400.lib
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2900 1472
WIRE 2304 624 1936 624
WIRE 1936 688 1936 624
WIRE 2016 688 1936 688
WIRE 2192 688 2080 688
WIRE 1936 816 1936 688
WIRE 1952 816 1936 816
WIRE 2192 816 2192 688
WIRE 2192 816 2144 816
WIRE 1952 880 1744 880
WIRE 2192 880 2192 816
WIRE 2192 880 2144 880
WIRE 1392 896 1392 880
WIRE 1520 896 1520 880
WIRE 1744 896 1744 880
WIRE 2192 896 2192 880
WIRE 2208 896 2192 896
WIRE 2304 912 2304 624
WIRE 2304 912 2272 912
WIRE 2336 912 2304 912
WIRE 2208 928 2192 928
WIRE 1952 944 1936 944
WIRE 2192 944 2192 928
WIRE 2192 944 2144 944
WIRE 1392 992 1392 976
WIRE 1520 992 1520 976
WIRE 1744 992 1744 976
WIRE 1920 1008 1872 1008
WIRE 1952 1008 1920 1008
WIRE 2192 1008 2192 944
WIRE 2192 1008 2144 1008
WIRE 1920 1120 1920 1008
WIRE 2016 1120 1920 1120
WIRE 2192 1120 2192 1008
WIRE 2192 1120 2080 1120
SYMBOL cap 2080 1104 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7p
SYMBOL misc\\LT5400-8 2048 912 R0
SYMATTR InstName U1
SYMBOL voltage 1392 880 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 1520 880 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT1468 2240 848 R0
SYMATTR InstName U2
SYMBOL cap 2080 672 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7p
SYMBOL voltage 1744 880 R0
SYMATTR InstName V3
SYMATTR Value AC 1
FLAG 2240 880 +V
FLAG 2240 944 -V
FLAG 2336 912 OUT
FLAG 1520 992 0
FLAG 1520 880 +V
FLAG 1392 992 0
FLAG 1392 880 -V
FLAG 1744 992 0
FLAG 1744 880 IN
FLAG 1872 1008 0
FLAG 1936 944 0
TEXT 2312 1064 Left 2 !.ac oct 10 1K 10Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3630A.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 72
L1 N001 OUT 22 Rser=50m
C1 OUT 0 22 V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
Rload OUT 0 24
R1 OUT N003 200K
R2 N003 0 147K
XU1 N001 MP_01 IN MP_02 N002 0 N004 0 N003 N004 NC_03 NC_04 LTC3630 ;pnba SW))Vin))Run)Vprg2)Vprg1)GND)FB)SS)Iset)FBO
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3630A.asy)
.lib LTC3630.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -48 32
WIRE 96 32 -32 32
WIRE 416 32 384 32
WIRE 528 32 496 32
WIRE 624 32 528 32
WIRE 704 32 624 32
WIRE -48 48 -48 32
WIRE 528 48 528 32
WIRE 624 48 624 32
WIRE 704 48 704 32
WIRE 96 128 64 128
WIRE 528 128 384 128
WIRE -48 144 -48 128
WIRE 528 144 528 128
WIRE 624 144 624 112
WIRE 704 144 704 128
WIRE 96 224 48 224
WIRE 432 224 384 224
WIRE 528 240 528 224
WIRE 96 320 80 320
WIRE 400 416 384 416
WIRE 48 480 48 224
WIRE 432 480 432 224
WIRE 432 480 48 480
FLAG 400 416 0
FLAG 80 320 0
FLAG -48 144 0
FLAG 624 144 0
FLAG 704 144 0
FLAG -32 32 IN
FLAG 704 32 OUT
FLAG 528 240 0
SYMBOL voltage -48 32 R0
SYMATTR InstName V1
SYMATTR Value 72
SYMBOL ind 400 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 22
SYMATTR SpiceLine Rser=50m
SYMBOL cap 608 48 R0
WINDOW 123 24 84 Left 2
SYMATTR Value 22
SYMATTR InstName C1
SYMATTR SpiceLine V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
SYMBOL res 688 32 R0
SYMATTR InstName Rload
SYMATTR Value 24
SYMBOL res 512 32 R0
SYMATTR InstName R1
SYMATTR Value 200K
SYMBOL res 512 128 R0
SYMATTR InstName R2
SYMATTR Value 147K
SYMBOL PowerProducts\\LTC3630A 240 224 R0
SYMATTR InstName U1
TEXT 504 360 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\35bca21be3d2_p-mosfet-current-source.asc
* Generated by LTspice 26.0.1 for Windows.
* Rload can vary from 0 to 6.6 k and still receive 0-300 uA of current
* DAC uses V+ as upper reference
* R1 chosen to give maximum 300 uA with DAC at 2V
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4528-1.asy)
XU1 N003 N001 +V 0 N002 ADA4528 ;pnba In+)In-)V+)V-)OUT
Vdac N003 0 0
V1 +V 0 3
M1 N004 N002 N001 N001 FDS9934_P
Rload N004 0 1k
R1 +V N001 3.3k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vdac 2 3 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1104 680
WIRE 288 -16 288 -48
WIRE -320 64 -320 48
WIRE 288 112 288 64
WIRE 288 112 16 112
WIRE -320 160 -320 144
WIRE 80 176 80 160
WIRE 16 192 16 112
WIRE 48 192 16 192
WIRE 288 192 288 112
WIRE 240 208 112 208
WIRE 48 224 -128 224
WIRE 80 256 80 240
WIRE -128 272 -128 224
WIRE -128 368 -128 352
WIRE 288 432 288 288
WIRE 688 432 288 432
WIRE 688 512 288 512
WIRE 288 592 288 512
SYMBOL voltage -320 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL pmos 240 288 M180
SYMATTR InstName M1
SYMATTR Value FDS9934_P
SYMBOL res 272 -32 R0
SYMATTR InstName R1
SYMATTR Value 3.3k
SYMBOL voltage -128 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value 0
SYMBOL Opamps\\ADA4528-1 80 144 R0
SYMATTR InstName U1
SYMBOL res 672 416 R0
SYMATTR InstName Rload
SYMATTR Value 1k
FLAG 80 256 0
FLAG 80 160 +V
FLAG 288 -48 +V
FLAG -128 368 0
FLAG -320 160 0
FLAG -320 48 +V
FLAG 288 592 0
TEXT -392 384 Left 2 !.dc Vdac 2 3 1m
TEXT 336 392 Left 2 ;Rload can vary from 0 to 6.6 k and still receive 0-300 uA of current
TEXT -400 416 Left 2 ;DAC uses V+ as upper reference
TEXT 400 80 Left 2 ;R1 chosen to give maximum 300 uA with DAC at 2V
* Z:\home\khalils\Downloads\files\data\raw_asc\e3b0fe30fcdd_DQ-ABC.asc
* Generated by LTspice 26.0.1 for Windows.
BVc out3 0 V = (cos(V(in4) - 4*pi/3)*V(in1) - sin(V(in4) - 4*pi/3)*V(in2))
BVa out1 0 V = (cos(V(in4))*V(in1) - sin(V(in4))*V(in2))
BVb out2 0 V = (cos(V(in4) - 2*pi/3)*V(in1) - sin(V(in4) - 2*pi/3)*V(in2))
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1920 680
WIRE 752 -32 416 -32
WIRE 752 16 528 16
WIRE 752 64 640 64
WIRE 352 112 272 112
WIRE 416 128 416 -32
WIRE 528 128 528 16
WIRE 640 128 640 64
WIRE 352 160 272 160
WIRE 352 208 272 208
WIRE 416 224 416 208
WIRE 528 224 528 208
WIRE 640 224 640 208
IOPIN 272 112 In
IOPIN 272 160 In
IOPIN 272 208 In
IOPIN 752 -32 Out
IOPIN 752 16 Out
IOPIN 752 64 Out
SYMBOL bv 528 112 R0
WINDOW 3 -28 224 Left 2
SYMATTR Value V = (cos(V(in4) - 2*pi/3)*V(in1) - sin(V(in4) - 2*pi/3)*V(in2))
SYMATTR InstName Vb
SYMBOL bv 416 112 R0
WINDOW 3 35 188 Left 2
SYMATTR Value V = (cos(V(in4))*V(in1) - sin(V(in4))*V(in2))
SYMATTR InstName Va
SYMBOL bv 640 112 R0
WINDOW 3 -93 261 Left 2
SYMATTR Value V = (cos(V(in4) - 4*pi/3)*V(in1) - sin(V(in4) - 4*pi/3)*V(in2))
SYMATTR InstName Vc
FLAG 272 112 in1
FLAG 272 160 in2
FLAG 272 208 in4
FLAG 416 224 0
FLAG 528 224 0
FLAG 752 -32 out1
FLAG 752 16 out2
FLAG 640 224 0
FLAG 752 64 out3
* Z:\home\khalils\Downloads\files\data\raw_asc\LT5400-8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\LT5400-8.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1468.asy)
V2 -V 0 -15
C2 N002 0 4.7p
XU2 N002 N001 +V -V OUT LT1468 ;pnba In+)In-)V+)V-)OUT
V3 IN 0 AC 1
XU1 OUT IN 0 0 N002 N002 N001 N001 NC_01 LT5400-8 ;pnba 1)2)3)4)5)6)7)8)PAD
C1 N001 OUT 4.7p
V1 +V 0 15
.ac oct 10 1K 10Meg
.lib LT5400.lib
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2900 1472
WIRE 2304 624 1936 624
WIRE 1936 688 1936 624
WIRE 2016 688 1936 688
WIRE 2192 688 2080 688
WIRE 1936 816 1936 688
WIRE 1952 816 1936 816
WIRE 2192 816 2192 688
WIRE 2192 816 2144 816
WIRE 1952 880 1744 880
WIRE 2192 880 2192 816
WIRE 2192 880 2144 880
WIRE 1392 896 1392 880
WIRE 1520 896 1520 880
WIRE 1744 896 1744 880
WIRE 2192 896 2192 880
WIRE 2208 896 2192 896
WIRE 2304 912 2304 624
WIRE 2304 912 2272 912
WIRE 2336 912 2304 912
WIRE 2208 928 2192 928
WIRE 1952 944 1936 944
WIRE 2192 944 2192 928
WIRE 2192 944 2144 944
WIRE 1392 992 1392 976
WIRE 1520 992 1520 976
WIRE 1744 992 1744 976
WIRE 1920 1008 1872 1008
WIRE 1952 1008 1920 1008
WIRE 2192 1008 2192 944
WIRE 2192 1008 2144 1008
WIRE 1920 1120 1920 1008
WIRE 2016 1120 1920 1120
WIRE 2192 1120 2192 1008
WIRE 2192 1120 2080 1120
SYMBOL voltage 1392 880 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL cap 2080 1104 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7p
SYMBOL cap 2080 672 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7p
SYMBOL opamps\\LT1468 2240 848 R0
SYMATTR InstName U2
SYMBOL voltage 1520 880 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 1744 880 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL misc\\LT5400-8 2048 912 R0
SYMATTR InstName U1
FLAG 2240 880 +V
FLAG 2240 944 -V
FLAG 2336 912 OUT
FLAG 1520 992 0
FLAG 1520 880 +V
FLAG 1392 992 0
FLAG 1392 880 -V
FLAG 1744 992 0
FLAG 1744 880 IN
FLAG 1872 1008 0
FLAG 1936 944 0
TEXT 2312 1064 Left 2 !.ac oct 10 1K 10Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1962-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1962-2.5.asy)
XU1 OUT OUT N001 0 IN MP_01 MP_02 IN LT1962-2.5 ;pnba OUT)SENSE)BYP)GND)_SHDN)))IN
C1 OUT 0 1
V1 IN 0 PWL(0 0 1 10)
Rload OUT 0 1K
.tran 1
.lib LT1962-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 352 32 320 32
WIRE 416 32 352 32
WIRE 512 32 416 32
WIRE 16 48 -208 48
WIRE 32 48 16 48
WIRE 416 48 416 32
WIRE 512 48 512 32
WIRE -208 64 -208 48
WIRE 352 96 352 32
WIRE 352 96 320 96
WIRE 16 144 16 48
WIRE 32 144 16 144
WIRE 416 144 416 112
WIRE 512 144 512 128
WIRE -208 160 -208 144
WIRE 352 160 320 160
WIRE 176 240 176 208
SYMBOL LT1962-2.5 176 96 R0
SYMATTR InstName U1
SYMBOL cap 400 48 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMBOL res 496 32 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -208 160 0
FLAG 416 144 0
FLAG 512 144 0
FLAG 176 240 0
FLAG 512 32 OUT
FLAG -208 48 IN
TEXT 384 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG601.asc
* Generated by LTspice 26.0.1 for Windows.
Vs N001 0 SINE(0 5 1k)
V3 N003 0 PULSE(0 3 0 10n 10n 5m 10m)
R1 N002 0 301
C1 N002 0 36p
V1 +V 0 5
V2 -V 0 -5
XU1 +V -V N003 N001 N002 0 ADG601 ;pnba Vdd)Vss)IN)S)D)GND
.tran 20m
* Note:\nSwitch shown for a logic 0 input.\nPin capacitance and charge injection not included.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG601.asy)
.lib ADG601.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 304 80 304 48
WIRE -128 160 -160 160
WIRE 208 160 -48 160
WIRE 464 160 400 160
WIRE 608 160 464 160
WIRE 464 192 464 160
WIRE 608 192 608 160
WIRE 208 224 80 224
WIRE 464 304 464 272
WIRE 608 304 608 256
WIRE -240 320 -240 272
WIRE -128 320 -128 272
WIRE 80 368 80 224
WIRE 240 384 240 336
WIRE 368 384 368 336
WIRE -240 448 -240 400
WIRE -128 448 -128 400
WIRE 80 496 80 448
FLAG 464 304 0
FLAG 608 304 0
FLAG -240 448 0
FLAG -160 160 0
FLAG 80 496 0
FLAG 368 384 0
FLAG 304 48 +V
FLAG -240 272 +V
FLAG 240 384 -V
FLAG -128 448 0
FLAG -128 272 -V
SYMBOL voltage -32 160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Vs
SYMATTR Value SINE(0 5 1k)
SYMBOL voltage 80 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 3 0 10n 10n 5m 10m)
SYMBOL res 448 176 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL cap 592 192 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -240 304 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -128 304 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL ADG601 304 208 R0
SYMATTR InstName U1
TEXT 536 448 Left 2 !.tran 20m
TEXT -376 -48 Left 2 ;Note:\nSwitch shown for a logic 0 input.\nPin capacitance and charge injection not included.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC7068.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 10
C1 SW N002 0.22
V2 N003 0 100
V3 PWM 0 PULSE(0 5 10u 1n 1n 1u 2u)
XU1 0 N001 N001 PWM BG N002 TG SW LTC7068 ;pnba GND)Vcc)EN)PWM)BG)BST)TG)SW
M1 N003 TG SW SW BSC520N15NS3
M2 SW BG 0 0 BSC520N15NS3
D1 N001 N002 MBRS1100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC7068.asy)
.lib LTC7068.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1064 680
WIRE 128 -144 -16 -144
WIRE 384 -144 192 -144
WIRE 736 -96 496 -96
WIRE -16 -48 -16 -144
WIRE -16 -48 -128 -48
WIRE 32 -48 -16 -48
WIRE 384 -48 384 -144
WIRE 384 -48 288 -48
WIRE 496 -48 496 -96
WIRE 736 -48 736 -96
WIRE -128 -16 -128 -48
WIRE 320 32 288 32
WIRE 448 32 320 32
WIRE 384 48 384 -48
WIRE 736 48 736 32
WIRE -16 64 -16 -48
WIRE 32 64 -16 64
WIRE -128 80 -128 64
WIRE 320 128 288 128
WIRE 384 128 384 112
WIRE 384 128 320 128
WIRE 496 128 496 48
WIRE 496 128 384 128
WIRE 496 160 496 128
WIRE 0 240 -128 240
WIRE 32 240 0 240
WIRE 320 240 288 240
WIRE 448 240 320 240
WIRE -128 288 -128 240
WIRE 496 288 496 256
WIRE 160 304 160 288
WIRE -128 384 -128 368
FLAG 496 288 0
FLAG 736 48 0
FLAG -128 80 0
FLAG -128 384 0
FLAG 160 304 0
FLAG 0 240 PWM
FLAG 320 32 TG
FLAG 320 128 SW
FLAG 320 240 BG
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL cap 368 112 M180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 0.22
SYMBOL voltage 736 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 100
SYMBOL voltage -128 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 10u 1n 1n 1u 2u)
SYMBOL LTC7068 160 144 R0
SYMATTR InstName U1
SYMBOL nmos 448 -48 R0
SYMATTR InstName M1
SYMATTR Value BSC520N15NS3
SYMBOL nmos 448 160 R0
SYMATTR InstName M2
SYMATTR Value BSC520N15NS3
SYMBOL schottky 128 -160 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value MBRS1100
SYMATTR Description Diode
SYMATTR Type diode
TEXT 288 320 Left 2 !.tran 100u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3801B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3801B.asy)
R4 N006 0 402K
R1 IN N001 25m
D1 0 N005 MBRS360
XU1 N004 0 N006 N001 IN N002 LTC3801B ;pnba Ith/Run)GND)FB)Sense-)Vin)Pgate
R2 N004 N003 10K
Rload OUT 0 1
L1 N005 OUT 4.7
MQ1 N005 N002 N001 N001 Si4465DY
V1 IN 0 5
C2 OUT 0 47 Rser=50m
R3 OUT N006 866K
C1 N003 0 220p
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m startup
.lib LTC3801B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 976 680
WIRE 144 64 -16 64
WIRE 176 64 144 64
WIRE 272 64 256 64
WIRE 416 64 272 64
WIRE -16 80 -16 64
WIRE 144 128 144 64
WIRE 272 128 272 64
WIRE 416 160 416 64
WIRE -16 176 -16 160
WIRE 368 176 336 176
WIRE -96 256 -112 256
WIRE -16 256 -32 256
WIRE 80 256 64 256
WIRE 528 256 416 256
WIRE 640 256 608 256
WIRE 736 256 640 256
WIRE 848 256 736 256
WIRE 416 272 416 256
WIRE 640 272 640 256
WIRE 736 272 736 256
WIRE 848 272 848 256
WIRE 368 336 336 336
WIRE 416 352 416 336
WIRE 640 352 640 336
WIRE 848 368 848 352
WIRE 368 384 368 336
WIRE 736 384 736 352
WIRE 736 384 368 384
WIRE 208 400 208 384
WIRE 736 400 736 384
WIRE 736 496 736 480
SYMBOL res 720 384 R0
SYMATTR InstName R4
SYMATTR Value 402K
SYMBOL pmos 368 256 M180
WINDOW 0 58 82 Left 2
WINDOW 3 54 34 Left 2
SYMATTR InstName Q1
SYMATTR Value Si4465DY
SYMBOL res 720 256 R0
SYMATTR InstName R3
SYMATTR Value 866K
SYMBOL cap 624 272 R0
WINDOW 3 26 58 Left 2
SYMATTR Value 47
SYMATTR InstName C2
SYMATTR SpiceLine Rser=50m
SYMBOL ind 512 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL res 160 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 25m
SYMBOL voltage -16 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 832 256 R0
SYMATTR InstName Rload
SYMATTR Value 1
SYMBOL PowerProducts\\LTC3801B 208 256 R0
SYMATTR InstName U1
SYMBOL cap -32 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 220p
SYMBOL schottky 400 336 M180
WINDOW 0 38 54 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 80 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 208 400 0
FLAG -16 176 0
FLAG -112 256 0
FLAG 416 352 0
FLAG 640 352 0
FLAG 848 368 0
FLAG 736 496 0
FLAG 848 256 OUT
FLAG -16 64 IN
TEXT 384 424 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\c8940168ac7b_inverter.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vout Vin 0 0 n_65 l=65n w=1u
M2 Vout Vin VDD VDD p_65 l=65n w=2u
V1 VDD 0 1.2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include 65nm_bulk.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 400 224 400 176
WIRE 416 224 400 224
WIRE 352 240 304 240
WIRE 656 240 656 208
WIRE 416 272 416 224
WIRE 416 272 400 272
WIRE 304 368 304 240
WIRE 304 368 288 368
WIRE 400 368 400 320
WIRE 416 368 400 368
WIRE 400 416 400 368
WIRE 416 464 400 464
WIRE 304 496 304 368
WIRE 352 496 304 496
WIRE 416 512 416 464
WIRE 416 512 400 512
WIRE 400 544 400 512
IOPIN 288 368 In
IOPIN 416 368 Out
SYMBOL Voltage 656 224 R0
SYMATTR InstName V1
SYMATTR Value 1.2
SYMBOL nmos4 352 416 R0
WINDOW 123 56 94 Left 2
SYMATTR InstName M1
SYMATTR Value n_65
SYMATTR Value2 l=65n w=1u
SYMBOL pmos4 352 320 M180
WINDOW 123 56 50 Left 2
SYMATTR InstName M2
SYMATTR Value p_65
SYMATTR Value2 l=65n w=2u
FLAG 400 544 0
FLAG 400 176 VDD
FLAG 656 208 VDD
FLAG 656 320 0
FLAG 288 368 Vin
FLAG 416 368 Vout
TEXT -64 80 Left 2 !.include 65nm_bulk.txt
* Z:\home\khalils\Downloads\files\data\raw_asc\3113c817ea31_5A.asc
* Generated by LTspice 26.0.1 for Windows.
XQ1 N002 N003 0 TIP122 ;pnba C)B)E
V1 N001 0 1V
I1 N001 N003 15mA
I2 N001 N002 5A
.lib TIP122.onsemi.lib
.tran 0 0.001 0 0.000001
* 1.1V
* 5.6W
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -96 16 -96
WIRE 272 -96 144 -96
WIRE 144 -48 144 -96
WIRE 272 -48 272 -96
WIRE 16 128 16 -96
WIRE 272 128 272 32
WIRE 144 176 144 32
WIRE 208 176 144 176
WIRE 16 272 16 208
WIRE 112 272 16 272
WIRE 272 272 272 224
WIRE 272 272 112 272
WIRE 112 304 112 272
FLAG 112 304 0
SYMBOL npn 208 128 R0
SYMATTR InstName Q1
SYMATTR Value TIP122
SYMATTR Prefix X
SYMBOL voltage 16 112 R0
SYMATTR InstName V1
SYMATTR Value 1V
SYMBOL current 144 -48 R0
SYMATTR InstName I1
SYMATTR Value 15mA
SYMBOL current 272 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I2
SYMATTR Value 5A
TEXT 24 360 Left 2 !.lib TIP122.onsemi.lib
TEXT 16 400 Left 2 !.tran 0 0.001 0 0.000001
TEXT 280 120 Left 2 ;1.1V
TEXT 280 232 Left 2 ;5.6W