Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADAQ23878.asc
* Generated by LTspice 26.0.1 for Windows.
* Simulation Settings:
* Power Supplies:
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\ADAQ23878.asy)
;.tran 10u
;.ac dec 100 100 10G
V1 VS_P 0 6.5
XU2 N001 N002 N002 NC_01 NC_02 N003 N003 N005 NC_03 NC_04 VS_P VS_P VS_N NC_05 NC_06 NC_07 VDD Vout N004 0 ADAQ23878 ;pnba OUT+)IN-_2)IN-_1)SJ-)SJ+)IN+_1)IN+_2)OUT-)ADCIN+)ADCIN-)VS+)PDB_AMP)VS-)REF_IN)VCMO)REFBUF)VDD)Vout)CNV)ADC_GND
V4 N003 N002 SINE(0 1.8189 100k) AC 1
V5 VDD 0 5
V2 N004 0 PULSE(0 1.8 66.6n .2n .2n 5n 66.6n)
V3 VS_N 0 -2
.noise V(Vout) V1 dec 500 100 10G
.lib ADAQ23878.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1496 700
WIRE -144 -480 -144 -560
WIRE 432 -480 432 -560
WIRE -560 -336 -640 -336
WIRE -688 -288 -816 -288
WIRE -560 -288 -688 -288
WIRE -688 -240 -688 -288
WIRE -560 -240 -688 -240
WIRE 656 -240 544 -240
WIRE 704 -240 656 -240
WIRE -816 -208 -816 -288
WIRE -1488 -112 -1488 -160
WIRE -1344 -112 -1344 -160
WIRE -1200 -112 -1200 -160
WIRE -1488 -80 -1488 -112
WIRE -1344 -80 -1344 -112
WIRE -1200 -80 -1200 -112
WIRE -560 -64 -688 -64
WIRE 704 -64 544 -64
WIRE -816 -16 -816 -128
WIRE -688 -16 -688 -64
WIRE -688 -16 -816 -16
WIRE -560 -16 -688 -16
WIRE 704 -16 704 -64
WIRE -1488 32 -1488 0
WIRE -1344 32 -1344 0
WIRE -1344 32 -1488 32
WIRE -1200 32 -1200 0
WIRE -1200 32 -1344 32
WIRE -560 32 -640 32
WIRE -1488 64 -1488 32
WIRE 704 144 704 64
WIRE -192 256 -192 176
WIRE -144 256 -144 176
WIRE 128 272 128 176
RECTANGLE Normal -1104 128 -1600 -400 2
SYMBOL voltage -1488 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -2
SYMBOL voltage -816 -112 R180
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V4
SYMATTR Value SINE(0 1.8189 100k)
SYMBOL ADAQ23878 -192 -176 R0
SYMATTR InstName U2
SYMBOL voltage -1200 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 5
SYMBOL voltage 704 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1.8 66.6n .2n .2n 5n 66.6n)
SYMBOL voltage -1344 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 6.5
FLAG 704 144 0
FLAG -1488 64 0
FLAG -1488 -112 VS_N
FLAG -1344 -112 VS_P
FLAG -1200 -112 VDD
FLAG 656 -240 Vout
FLAG 432 -560 VDD
FLAG -192 256 VS_P
FLAG -144 -560 VS_P
FLAG -144 256 VS_N
FLAG 128 272 0
TEXT -1568 -376 Left 2 ;Simulation Settings:
TEXT -1552 -336 Left 2 !.noise V(Vout) V1 dec 500 100 10G
TEXT -1552 -272 Left 2 !;.tran 10u
TEXT -1552 -304 Left 2 !;.ac dec 100 100 10G
TEXT -1568 -216 Left 2 ;Power Supplies:
* Z:\home\khalils\Downloads\files\data\raw_asc\3f8d5d0fb02a_quiz1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 0 10k
V1 N002 0 3.3
M1 N001 N002 0 0 NMOS l=10u w=w
V2 N001 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc library.mod
.dc V2 0 3.3 0.1
.step param div 1 5 0.2
.param w=10u/3.6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 464 32 336 32
WIRE 464 48 464 32
WIRE 528 64 496 64
WIRE 256 96 64 96
WIRE 336 96 336 32
WIRE 336 96 256 96
WIRE 496 96 496 64
WIRE 496 96 464 96
WIRE 528 96 528 64
WIRE 256 144 256 96
WIRE 464 176 464 144
WIRE 64 208 64 176
WIRE 416 208 416 128
WIRE 256 256 256 224
WIRE 416 320 416 288
FLAG 64 208 0
FLAG 256 256 0
FLAG 416 320 0
FLAG 464 176 0
FLAG 528 96 0
SYMBOL res 48 80 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 416 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL nmos4 416 48 R0
SYMATTR InstName M1
SYMATTR Value2 l=10u w=w
SYMBOL voltage 256 128 R0
SYMATTR InstName V2
SYMATTR Value ""
TEXT 312 -48 Left 2 !.inc library.mod
TEXT 312 -8 Left 2 !.dc V2 0 3.3 0.1
TEXT 0 8 Left 2 !.step param div 1 5 0.2
TEXT -120 -40 Left 2 !.param w=10u/3.6
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL40502-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL40502-3.3.asy)
V1 vIN 0 5
Rload vOUT 0 16.5
XU1 vIN 0 vIN vOUT ADPL40502-3.3 ;pnba Vin)GND)EN)Vout
C1 vOUT 0 1 Rser=1m
.tran 1m startup
.lib ADPL40502-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2808 1464
WIRE 1824 880 1728 880
WIRE 1984 880 1824 880
WIRE 1728 896 1728 880
WIRE 1984 896 1984 880
WIRE 1728 992 1728 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL ADPL40502-3.3 1984 1024 R0
SYMATTR InstName U1
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMATTR SpiceLine Rser=1m
SYMBOL VOLTAGE 1728 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 16.5
FLAG 2256 1024 vOUT
FLAG 2256 1136 0
FLAG 1728 992 0
FLAG 1728 880 vIN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\4140d433b92c_ttl_inv_ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
* TTL Inverter
R2 Vp N002 2.2k
D1 N004 2+ 1N914
Q4 N001 N002 N004 0 2N3904
R1 Vp N003 100k
Q2 N002 N005 N006 0 2N3904
R3 N006 0 470
V2 W1 0 PWL REPEAT FOREVER (0 0 2.5m 3 5m 0 7.5m -3 10m 0) ENDREPEAT
R4 Vp N001 100
Q1 N005 N003 W1 0 2N3904
V1 Vp 0 5
Q3 2+ N006 0 0 2N3904
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 50m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 -192 64 -192
WIRE 352 -192 128 -192
WIRE 512 -192 352 -192
WIRE -480 -176 -480 -208
WIRE -336 -176 -336 -208
WIRE 512 -144 512 -192
WIRE 128 -128 128 -192
WIRE 352 -128 352 -192
WIRE -480 -64 -480 -96
WIRE -336 -64 -336 -96
WIRE 512 0 512 -64
WIRE 352 48 352 -48
WIRE 448 48 352 48
WIRE 128 128 128 -48
WIRE 352 144 352 48
WIRE 512 144 512 96
WIRE -16 192 -16 160
WIRE -16 192 -48 192
WIRE 80 192 -16 192
WIRE 288 192 176 192
WIRE 512 240 512 208
WIRE 592 240 512 240
WIRE 512 288 512 240
WIRE 352 336 352 240
WIRE 448 336 352 336
WIRE 352 416 352 336
WIRE 352 528 352 496
WIRE 512 528 512 384
WIRE 512 528 352 528
WIRE 352 576 352 528
IOPIN 64 -192 In
IOPIN -48 192 In
IOPIN 592 240 In
IOPIN -16 160 In
IOPIN -480 -208 In
IOPIN -336 -208 In
SYMBOL npn 176 128 R90
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 496 -160 R0
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL res 336 400 R0
SYMATTR InstName R3
SYMATTR Value 470
SYMBOL voltage -336 -192 R0
WINDOW 3 -428 188 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL REPEAT FOREVER (0 0 2.5m 3 5m 0 7.5m -3 10m 0) ENDREPEAT
SYMBOL res 112 -144 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL npn 448 288 R0
SYMATTR InstName Q3
SYMATTR Value 2N3904
SYMBOL voltage -480 -192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL npn 448 0 R0
SYMATTR InstName Q4
SYMATTR Value 2N3904
SYMBOL npn 288 144 R0
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL diode 496 144 R0
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL res 336 -144 R0
SYMATTR InstName R2
SYMATTR Value 2.2k
FLAG 352 576 0
FLAG 64 -192 Vp
FLAG -48 192 W1
FLAG 592 240 2+
FLAG -16 160 1+
FLAG -480 -64 0
FLAG -336 -64 0
FLAG -480 -208 Vp
FLAG -336 -208 W1
TEXT -256 504 Left 2 !.tran 50m
TEXT 64 -320 Left 2 ;TTL Inverter
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1765.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1765.asy)
C3 N006 0 2.2n
Rload OUT 0 1
D2 OUT N001 1N914
L1 N002 OUT 1.5
V1 IN 0 5
C2 N001 N002 .18
XU1 N001 IN N002 0 N003 N004 N005 LT1765 ;pnba Boost)Vin)SW)GND)_SHDN)FB)Vc
C1 OUT 0 4.7 Rser=10m
R3 N006 N005 1K
D1 0 N002 MBRS340
R1 OUT N004 17.4K
R2 N004 0 10K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 200u startup
.lib LT1765.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2956 1424
WIRE 2144 912 1824 912
WIRE 2240 912 2144 912
WIRE 2352 912 2304 912
WIRE 2144 928 2144 912
WIRE 1824 992 1824 912
WIRE 2144 1008 2144 992
WIRE 2144 1008 2112 1008
WIRE 2240 1008 2144 1008
WIRE 2352 1008 2352 912
WIRE 2352 1008 2320 1008
WIRE 2464 1008 2352 1008
WIRE 2560 1008 2464 1008
WIRE 2464 1024 2464 1008
WIRE 2560 1024 2560 1008
WIRE 2352 1040 2352 1008
WIRE 1680 1056 1568 1056
WIRE 2112 1056 2112 1008
WIRE 2112 1056 1968 1056
WIRE 2144 1056 2144 1008
WIRE 1568 1072 1568 1056
WIRE 1680 1120 1664 1120
WIRE 2112 1120 1968 1120
WIRE 2464 1120 2464 1088
WIRE 2560 1120 2560 1104
WIRE 2144 1136 2144 1120
WIRE 1568 1168 1568 1152
WIRE 2112 1168 2112 1120
WIRE 2352 1168 2352 1120
WIRE 2352 1168 2112 1168
WIRE 1984 1184 1968 1184
WIRE 2080 1184 2064 1184
WIRE 2352 1184 2352 1168
WIRE 2080 1200 2080 1184
WIRE 1824 1264 1824 1248
WIRE 2080 1280 2080 1264
WIRE 2352 1280 2352 1264
SYMBOL VOLTAGE 1568 1056 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 2224 1024 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.5
SYMBOL res 2336 1168 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL schottky 2128 1120 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMBOL res 2544 1008 R0
SYMATTR InstName Rload
SYMATTR Value 1
SYMBOL diode 2304 896 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL cap 2064 1200 R0
SYMATTR InstName C3
SYMATTR Value 2.2n
SYMBOL res 2080 1168 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL cap 2128 928 R0
SYMATTR InstName C2
SYMATTR Value .18
SYMBOL RES 2336 1024 R0
SYMATTR InstName R1
SYMATTR Value 17.4K
SYMBOL cap 2448 1024 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=10m
SYMBOL POWERPRODUCTS\\LT1765 1824 1120 R0
SYMATTR InstName U1
FLAG 2080 1280 0
FLAG 1824 1264 0
FLAG 2352 1280 0
FLAG 2144 1136 0
FLAG 2464 1120 0
FLAG 1568 1168 0
FLAG 2560 1120 0
FLAG 2560 1008 OUT
FLAG 1568 1056 IN
TEXT 2136 1328 Left 2 !.tran 200u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2165-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2165-1.5.asy)
C2 N003 N004 .1
C5 N006 0 680p
R2 N007 N006 36K
C6 N007 0 1p
C1 N008 0 2n
C3 OUT 0 84 Rser=2m
C4 N002 0 1
R3 OUT N001 100K
V1 IN 0 5
XU1 N002 N005 N002 OUT 0 0 N004 IN IN IN N001 N008 N007 N003 N002 ADP2165-x.x Rtop=600K Rbot=400K ;pnba SYNC)Rt)TRK)FB)Gnd)Pgnd)SW)Pvin)Avin)EN)Pgood)SS)Comp)Bst)Vreg
L1 N004 OUT 1.5 Rser=6m
Rload OUT 0 .3
R1 N005 0 100K
.tran 1m startup
.lib ADP2165-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 680
WIRE 48 -96 -176 -96
WIRE 176 -96 48 -96
WIRE 272 -96 176 -96
WIRE -176 -80 -176 -96
WIRE 176 -80 176 -96
WIRE 272 -80 272 -96
WIRE 48 -16 48 -96
WIRE 64 -16 48 -16
WIRE 448 -16 384 -16
WIRE 608 -16 528 -16
WIRE -176 16 -176 0
WIRE -32 64 -48 64
WIRE 48 64 32 64
WIRE 64 64 48 64
WIRE 432 64 384 64
WIRE 48 144 48 64
WIRE 64 144 48 144
WIRE 432 144 432 128
WIRE 432 144 384 144
WIRE 480 144 432 144
WIRE 608 144 608 -16
WIRE 608 144 560 144
WIRE 720 144 608 144
WIRE 832 144 720 144
WIRE 720 160 720 144
WIRE 832 160 832 144
WIRE 48 224 48 144
WIRE 64 224 48 224
WIRE 720 256 720 224
WIRE 832 256 832 240
WIRE -32 304 -48 304
WIRE 64 304 48 304
WIRE 608 304 608 144
WIRE 608 304 384 304
WIRE -160 384 -224 384
WIRE -32 384 -80 384
WIRE 64 384 -32 384
WIRE 400 384 384 384
WIRE 480 384 464 384
WIRE -224 400 -224 384
WIRE -32 400 -32 384
WIRE 176 464 176 448
WIRE 272 464 272 448
WIRE -224 480 -224 464
WIRE -32 480 -32 464
SYMBOL cap -240 400 R0
SYMATTR InstName C5
SYMATTR Value 680p
SYMBOL res -64 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 36K
SYMBOL cap 400 368 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL res 64 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 416 64 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL cap -48 400 R0
SYMATTR InstName C6
SYMATTR Value 1p
SYMBOL ind 464 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=6m
SYMBOL cap 32 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL ADP2165-1.5 224 176 R0
SYMATTR InstName U1
SYMBOL voltage -176 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 816 144 R0
SYMATTR InstName Rload
SYMATTR Value .3
SYMBOL res 544 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 704 160 R0
WINDOW 40 24 74 Left 2
SYMATTR Value 84
SYMATTR InstName C3
SYMATTR SpiceLine Rser=2m
FLAG 480 384 0
FLAG 272 464 0
FLAG -48 304 0
FLAG -224 480 0
FLAG -176 16 0
FLAG 720 256 0
FLAG 832 256 0
FLAG 832 144 OUT
FLAG -176 -96 IN
FLAG -48 64 0
FLAG -32 480 0
FLAG 176 464 0
TEXT 696 424 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0495c6f3b833_TP2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
R3 N003 N002 220k
V4 Vcc 0 10
R2 N001 0 1.8Meg
R4 N002 N001 220k
XU1 0 N001 Vcc N005 N003 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 N004 0 Rser=100k
R5 0 N002 903.66
V3 N005 0 -10
R1 N001 N004 1.8Meg
.lib F:\Users\Ivan\Documents\LTspiceXVII\lib\LM324.lib
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1072 680
WIRE 496 -64 496 -80
WIRE 400 80 384 80
WIRE 496 80 496 16
WIRE 496 80 480 80
WIRE 512 80 496 80
WIRE 608 80 592 80
WIRE 224 96 224 80
WIRE 512 160 512 144
WIRE 240 176 176 176
WIRE 384 176 384 80
WIRE 384 176 320 176
WIRE 480 176 384 176
WIRE 608 192 608 80
WIRE 608 192 544 192
WIRE 480 208 464 208
WIRE 288 256 272 256
WIRE 368 256 352 256
WIRE 384 256 384 176
WIRE 384 256 368 256
WIRE 464 256 464 208
WIRE 176 272 176 176
WIRE 512 304 512 224
WIRE 176 448 176 352
WIRE 272 448 272 256
WIRE 272 448 176 448
WIRE 512 448 512 384
WIRE 512 448 272 448
WIRE 176 464 176 448
SYMBOL res 384 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1.8Meg
SYMBOL res 336 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1.8Meg
SYMBOL voltage 224 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 10
SYMBOL res 480 -80 R0
SYMATTR InstName R5
SYMATTR Value 903.66
SYMBOL res 496 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 -53 53 VTop 2
SYMATTR InstName R4
SYMATTR Value 220k
SYMBOL voltage 176 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 -127 97 Left 2
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR SpiceLine Rser=100k
SYMBOL OpAmps\\UniversalOpAmp 512 192 R0
SYMATTR InstName U1
SYMBOL voltage 512 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -10
SYMBOL res 608 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 -53 53 VTop 2
SYMATTR InstName R3
SYMATTR Value 220k
FLAG 224 96 0
FLAG 224 0 Vcc
FLAG 512 144 Vcc
FLAG 176 464 0
FLAG 496 -80 0
FLAG 464 256 0
TEXT 64 536 Left 2 !.lib F:\\Users\\Ivan\\Documents\\LTspiceXVII\\lib\\LM324.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\07a0ceefbb5d_17-comparator.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 in N001 vcc vee out LT1001 ;pnba In+)In-)V+)V-)OUT
V1 vcc 0 +18
V2 0 vee +18
V3 in 0 SINE(0 1 100)
V4 N001 0 0.5
.tran 30m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 0 224 -16
WIRE -128 16 -128 -16
WIRE 192 16 16 16
WIRE 368 32 256 32
WIRE 384 32 368 32
WIRE 160 48 144 48
WIRE 192 48 160 48
WIRE 16 80 16 16
WIRE 144 80 144 48
WIRE 224 80 224 64
WIRE -128 112 -128 96
WIRE -128 112 -192 112
WIRE -128 128 -128 112
WIRE -192 144 -192 112
WIRE 16 176 16 160
WIRE 144 176 144 160
WIRE -128 240 -128 208
FLAG -192 144 0
FLAG -128 -16 vcc
FLAG -128 240 vee
FLAG 16 176 0
FLAG 160 48 in
FLAG 224 80 vee
FLAG 224 -16 vcc
FLAG 368 32 out
FLAG 144 176 0
SYMBOL OpAmps\\OP07 224 -32 R0
SYMATTR InstName U1
SYMBOL voltage -128 0 R0
WINDOW 3 24 85 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value +18
SYMATTR InstName V1
SYMBOL voltage -128 112 R0
WINDOW 3 19 88 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value +18
SYMATTR InstName V2
SYMBOL voltage 144 64 R0
WINDOW 0 43 73 Left 2
WINDOW 3 26 98 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
SYMBOL voltage 16 64 R0
WINDOW 0 37 72 Left 2
WINDOW 3 22 96 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 0.5
TEXT -40 240 Left 2 !.tran 30m
* Z:\tmp\asc_dec_bjh7r6w2\19d85dac0967_5400-6_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 N001 4.7p
C2 N004 N005 4.7p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2836 1472
WIRE 2304 624 1936 624
WIRE 1936 688 1936 624
WIRE 2016 688 1936 688
WIRE 2192 688 2080 688
WIRE 1936 816 1936 688
WIRE 1952 816 1936 816
WIRE 2192 816 2192 688
WIRE 2192 816 2144 816
WIRE 2192 880 2192 816
WIRE 2304 912 2272 912
WIRE 2208 928 2192 928
WIRE 1952 944 1936 944
WIRE 2192 944 2192 928
WIRE 2192 944 2144 944
WIRE 1920 1008 1872 1008
WIRE 1952 1008 1920 1008
WIRE 2192 1008 2192 944
WIRE 2192 1008 2144 1008
WIRE 1920 1120 1920 1008
WIRE 2016 1120 1920 1120
WIRE 2192 1120 2192 1008
WIRE 2192 1120 2080 1120
SYMBOL cap 2080 672 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7p
SYMBOL cap 2080 1104 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7p
FLAG 2240 944 -V
FLAG 1936 944 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1250.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC1250.asy)
XU1 N003 N001 +V -V N002 LTC1250 ;pnba In+)In-)V+)V-)OUT
R2 N001 0 5K
V3 N003 0 SINE(0 1 1K)
V2 -V 0 -5
R1 N002 N001 5K
V1 +V 0 5
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 160 96 128 96
WIRE 272 96 240 96
WIRE -240 160 -240 144
WIRE -112 160 -112 144
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 272 240 272 96
WIRE 272 240 224 240
WIRE -240 256 -240 240
WIRE -112 256 -112 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL opamps\\LTC1250 192 176 R0
SYMATTR InstName U1
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL voltage -112 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -240 144 R0
SYMATTR InstName V2
SYMATTR Value -5
FLAG -112 256 0
FLAG 192 192 +V
FLAG -112 144 +V
FLAG 192 288 -V
FLAG -240 256 0
FLAG -240 144 -V
FLAG 16 96 0
FLAG 0 368 0
TEXT 240 352 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3304C.asc
* Generated by LTspice 26.0.1 for Windows.
* The output voltage is adjustable from \n0.5V to 3.65V in 50mV increments.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3304C.asy)
R4 OUT N002 500K
C2 N001 0 1
C1 OUT 0 10 m=2 Rser=10m
Rload OUT 0 0.3
V1 IN 0 4
R1 IN N001 10
L1 N003 OUT 100n Rser=2m
XU1 IN N001 N003 OUT 0 0 N001 N002 N001 LTC3304C Vout_trim=1.8 ;pnba VIN)EN)SW)VOUT)AGND)PGND)AVIN)PGOOD)MODE/SYNC
.tran 1.5m startup
.lib LTC3304C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2652 1844
WIRE 1376 1248 1344 1248
WIRE 1488 1248 1376 1248
WIRE 1712 1248 1488 1248
WIRE 1344 1264 1344 1248
WIRE 1488 1264 1488 1248
WIRE 1712 1296 1712 1248
WIRE 1344 1360 1344 1344
WIRE 1488 1360 1488 1344
WIRE 1488 1360 1424 1360
WIRE 1552 1360 1488 1360
WIRE 1904 1360 1872 1360
WIRE 2016 1360 1984 1360
WIRE 1424 1376 1424 1360
WIRE 1424 1456 1424 1440
WIRE 1488 1472 1488 1360
WIRE 1552 1472 1488 1472
WIRE 1904 1472 1872 1472
WIRE 2016 1472 2016 1360
WIRE 2016 1472 1984 1472
WIRE 2112 1472 2016 1472
WIRE 2160 1472 2112 1472
WIRE 2208 1472 2160 1472
WIRE 2112 1488 2112 1472
WIRE 2208 1488 2208 1472
WIRE 1488 1584 1488 1472
WIRE 1552 1584 1488 1584
WIRE 2016 1584 2016 1472
WIRE 2016 1584 1872 1584
WIRE 2112 1584 2112 1552
WIRE 2208 1584 2208 1568
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
SYMBOL ind 1888 1488 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100n
SYMATTR SpiceLine Rser=2m
SYMBOL LTC3304C 1712 1456 R0
WINDOW 39 -99 370 Center 2
SYMATTR InstName U1
SYMATTR SpiceLine Vout_trim=1.8
SYMBOL cap 1408 1376 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 2000 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 500K
SYMBOL res 2192 1472 R0
SYMATTR InstName Rload
SYMATTR Value 0.3
SYMBOL res 1472 1248 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL VOLTAGE 1344 1248 R0
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL cap 2096 1488 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 m=2
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=10m
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1344 1360 0
FLAG 2208 1584 0
FLAG 2112 1584 0
FLAG 1376 1248 IN
FLAG 2160 1472 OUT
FLAG 1424 1456 0
TEXT 2024 1736 Left 2 !.tran 1.5m startup
TEXT 1528 1768 Left 2 ;The output voltage is adjustable from \n0.5V to 3.65V in 50mV increments.
* Z:\home\khalils\Downloads\files\data\raw_asc\bd5f8e79d085_Low_Pass.asc
* Generated by LTspice 26.0.1 for Windows.
R1 out N001 10k
V_in N001 0 AC 1
C1 out 0 2.65n
.ac dec 100 1 100k
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 208 48 96 48
WIRE 416 48 288 48
WIRE 464 48 416 48
WIRE 96 144 96 48
WIRE 416 144 416 48
WIRE 96 272 96 224
WIRE 416 272 416 208
IOPIN 464 48 Out
SYMBOL res 304 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL cap 400 144 R0
SYMATTR InstName C1
SYMATTR Value 2.65n
SYMBOL voltage 96 128 R0
SYMATTR InstName V_in
SYMATTR Value AC 1
FLAG 96 272 0
FLAG 416 272 0
FLAG 464 48 out
TEXT 520 136 Left 2 !.ac dec 100 1 100k