Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3670.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3670.asy)
C2 OUT1 N002 10p
L1 N001 OUT1 4.7
C4 OUT3 0 1
R6 N003 0 324K
R5 OUT2 N003 806K
C3 OUT2 0 1
XU1 N001 0 IN IN IN N002 NC_01 N004 N003 OUT2 OUT3 IN LTC3670 ;pnba SW)GND)EnLDO1)EnLDO2)EnBuck)BuckFB)Pgood)LDO2_FB)LDO1_FB)LDO1)LDO2)Vin
R8 OUT3 N004 1.02Meg
R1 OUT1 0 3
C1 OUT1 0 4.7
R4 OUT2 0 18.6
R7 OUT3 0 22
R9 N004 0 324K
V1 IN 0 3.6
R3 N002 0 464K
R2 OUT1 N002 232K
.tran .5m startup
.lib LTC3670.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1108 740
WIRE 96 32 -16 32
WIRE 112 32 96 32
WIRE 416 32 400 32
WIRE 528 32 496 32
WIRE 624 32 528 32
WIRE 704 32 624 32
WIRE 784 32 704 32
WIRE -16 48 -16 32
WIRE 528 48 528 32
WIRE 624 48 624 32
WIRE 784 48 784 32
WIRE 704 64 704 32
WIRE 96 128 96 32
WIRE 112 128 96 128
WIRE 528 128 400 128
WIRE 624 128 624 112
WIRE 624 128 528 128
WIRE -16 144 -16 128
WIRE 528 144 528 128
WIRE 704 144 704 128
WIRE 784 144 784 128
WIRE 96 224 96 128
WIRE 112 224 96 224
WIRE 416 224 400 224
WIRE 416 256 416 224
WIRE 528 256 416 256
WIRE 704 256 528 256
WIRE 784 256 704 256
WIRE 528 272 528 256
WIRE 704 272 704 256
WIRE 784 272 784 256
WIRE 96 320 96 224
WIRE 112 320 96 320
WIRE 416 320 400 320
WIRE 416 352 416 320
WIRE 528 352 416 352
WIRE 528 368 528 352
WIRE 704 368 704 336
WIRE 784 368 784 352
WIRE 416 416 400 416
WIRE 416 480 416 416
WIRE 528 480 416 480
WIRE 704 480 528 480
WIRE 784 480 704 480
WIRE 528 496 528 480
WIRE 704 496 704 480
WIRE 784 496 784 480
WIRE 112 512 96 512
WIRE 416 512 400 512
WIRE 416 576 416 512
WIRE 528 576 416 576
WIRE 528 592 528 576
WIRE 704 592 704 560
WIRE 784 592 784 576
SYMBOL res 512 480 R0
SYMATTR InstName R8
SYMATTR Value 1.02Meg
SYMBOL voltage -16 32 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL cap 688 496 R0
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL ind 400 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL res 512 576 R0
SYMATTR InstName R9
SYMATTR Value 324K
SYMBOL cap 608 48 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL PowerProducts\\LTC3670 256 272 R0
SYMATTR InstName U1
SYMBOL res 768 32 R0
SYMATTR InstName R1
SYMATTR Value 3
SYMBOL res 512 256 R0
SYMATTR InstName R5
SYMATTR Value 806K
SYMBOL cap 688 272 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 768 256 R0
SYMATTR InstName R4
SYMATTR Value 18.6
SYMBOL res 768 480 R0
SYMATTR InstName R7
SYMATTR Value 22
SYMBOL res 512 352 R0
SYMATTR InstName R6
SYMATTR Value 324K
SYMBOL res 512 32 R0
SYMATTR InstName R2
SYMATTR Value 232K
SYMBOL res 512 128 R0
WINDOW 3 26 86 Left 2
SYMATTR Value 464K
SYMATTR InstName R3
SYMBOL cap 688 64 R0
SYMATTR InstName C1
SYMATTR Value 4.7
FLAG -16 144 0
FLAG -16 32 IN
FLAG 784 144 0
FLAG 704 144 0
FLAG 784 32 OUT1
FLAG 528 224 0
FLAG 784 368 0
FLAG 704 368 0
FLAG 784 256 OUT2
FLAG 528 448 0
FLAG 96 512 0
FLAG 784 592 0
FLAG 704 592 0
FLAG 784 480 OUT3
FLAG 528 672 0
TEXT 640 656 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17555B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17555B.asy)
C1 vOUT 0 10
R1 vIN N002 3.32Meg
L1 N001 vOUT 220 Rser=3.7
Rload vOUT 0 100
R2 N002 0 475k
XU1 0 vIN N002 0 vOUT N001 N003 MAX17555B ;pnba GND)IN)EN/UV)HYST)FB/VO)LX)_RESET
V1 vIN 0 12
R3 vOUT N003 100k
.tran 1.6m startup
.lib MAX17555B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 992 680
WIRE -48 -32 -64 -32
WIRE 48 -32 -48 -32
WIRE 176 -32 48 -32
WIRE 512 -32 464 -32
WIRE 624 -32 592 -32
WIRE 704 -32 624 -32
WIRE 752 -32 704 -32
WIRE 784 -32 752 -32
WIRE 48 -16 48 -32
WIRE 624 -16 624 -32
WIRE 784 -16 784 -32
WIRE -64 16 -64 -32
WIRE 624 64 624 48
WIRE 784 80 784 64
WIRE 48 96 48 64
WIRE 176 96 48 96
WIRE 48 112 48 96
WIRE -64 128 -64 96
WIRE 512 128 464 128
WIRE 704 128 704 -32
WIRE 704 128 592 128
WIRE 48 224 48 192
WIRE 176 224 48 224
WIRE 704 224 704 128
WIRE 704 224 464 224
WIRE 48 240 48 224
WIRE 320 384 320 368
SYMBOL cap 608 -16 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 3.32Meg
SYMBOL MAX17555B 320 144 R0
SYMATTR InstName U1
SYMBOL voltage -64 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ind 496 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 220
SYMATTR SpiceLine Rser=3.7
SYMBOL res 608 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 32 96 R0
SYMATTR InstName R2
SYMATTR Value 475k
SYMBOL res 768 -32 R0
SYMATTR InstName Rload
SYMATTR Value 100
FLAG -64 128 0
FLAG 320 384 0
FLAG 624 64 0
FLAG 784 80 0
FLAG -48 -32 vIN
FLAG 752 -32 vOUT
FLAG 48 240 0
TEXT 472 400 Left 2 !.tran 1.6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\25cfb85bd944_Exp_4.asc
* Generated by LTspice 26.0.1 for Windows.
VBE N003 0 3
Q1 N001 N004 0 0 BC547B
R1 N004 N003 1K
R2 N002 N001 1K
VCE N002 0 5 Rser=0.001
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VBE 0 1 0.1 VCE 0 5 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 -16 224 -16
WIRE 512 -16 416 -16
WIRE 224 96 224 -16
WIRE 512 96 512 -16
WIRE 16 144 -128 144
WIRE 160 144 96 144
WIRE -128 192 -128 144
WIRE -128 304 -128 272
WIRE 224 304 224 192
WIRE 224 304 -128 304
WIRE 368 304 224 304
WIRE 512 304 512 176
WIRE 512 304 368 304
SYMBOL npn 160 96 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL res 112 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 512 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName VCE
SYMATTR Value 5
SYMATTR SpiceLine Rser=0.001
SYMBOL voltage -128 176 R0
SYMATTR InstName VBE
SYMATTR Value 3
SYMBOL res 432 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
FLAG 368 304 0
TEXT -162 328 Left 2 !.dc VBE 0 1 0.1 VCE 0 5 1
* Z:\tmp\asc_dec_bjh7r6w2\0a2f87e8653d_Current_Sense_neg_example1_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V1 -V 0 -9 Rser=0
R4 N004 N002 2k
R3 0 CM 1k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1472 2100
WIRE 592 32 592 0
WIRE 560 48 224 48
WIRE 720 64 624 64
WIRE 560 80 272 80
WIRE 592 128 592 96
WIRE 800 176 800 144
WIRE -192 192 -224 192
WIRE 384 224 176 224
WIRE 560 224 384 224
WIRE 720 224 720 64
WIRE 720 224 640 224
WIRE -224 256 -224 192
WIRE 384 272 384 224
WIRE 800 336 800 256
WIRE 800 336 432 336
WIRE 864 336 800 336
WIRE -224 400 -224 336
SYMBOL Misc\\battery -224 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 132 Left 0
SYMATTR SpiceLine Rser=0
SYMATTR InstName V1
SYMATTR Value -9
SYMBOL res 544 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R4
SYMATTR Value 2k
SYMBOL res 784 160 R0
SYMATTR InstName R3
SYMATTR Value 1k
FLAG -224 400 0
FLAG -192 192 -V
FLAG 864 336 CM
FLAG 800 144 0
FLAG 592 0 0
FLAG 592 128 VB
* Z:\tmp\asc_dec_bjh7r6w2\09dce248f467_SLOPE_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
B2 b 0 V=V(o)
B3 N002 0 V=IF(V(in)>0.5,1, 0)
C3 a 0 {cacc}
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2080 1228
WIRE -64 288 -64 256
WIRE 1200 288 1120 288
WIRE 768 336 768 288
WIRE 928 336 928 288
WIRE 1120 336 1120 288
WIRE -64 400 -64 368
WIRE -64 400 -96 400
WIRE 128 400 -64 400
WIRE -64 432 -64 400
WIRE 768 448 768 416
WIRE 928 448 928 416
WIRE 1120 448 1120 416
WIRE -64 528 -64 496
WIRE 1200 592 848 592
WIRE 848 608 848 592
WIRE 848 704 848 688
SYMBOL bv 928 320 R0
SYMATTR InstName B2
SYMATTR Value V=V(o)
SYMBOL bv 848 592 R0
SYMATTR InstName B3
SYMATTR Value V=IF(V(in)>0.5,1, 0)
SYMBOL cap -80 432 R0
SYMATTR InstName C3
SYMATTR Value {cacc}
FLAG -64 256 0
FLAG -64 528 0
FLAG -96 400 a
FLAG 1120 448 0
FLAG 768 448 0
FLAG 768 288 o
FLAG 928 448 0
FLAG 928 288 b
FLAG 848 704 0
* Z:\home\khalils\Downloads\files\data\raw_asc\AD3541R.asc
* Generated by LTspice 26.0.1 for Windows.
* .noise V(Vout) V5 dec 10 0.1 1g
* VDAC input should be within the range 0 to 2.5V\nRANGE_SEL should be an integer within 0 to 4
* Range RFB RANGE_SEL \n0 to 2.5V 1x 0 \n0 to 5V 1x 1\n0 to 10V 2x 2\n-5 to 5V 2x 3\n-2.5 to 7.5V 2x 4
* .dc V5 0 2.5 0.1
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD3541R.asy)
XU2 Vout NC_03 Vout Vout vDAC N001 0 N002 N004 N003 AD3541R RANGE_SEL=1 ;pnba RFBx4)RFBx2)RFBx1)Vout)VDAC)AVDD)AGND)PVDD)PVSS)CAP
V3 N004 0 -7
V5 NC_01 0 2.5
V6 NC_02 0 PWL(0 0 2u 0 +1n 2.5)
V2 N001 0 5
R1 Vout 0 1k noiseless
C1 Vout N003 10p
V4 vDAC 0 SINE(1.25 1.25 1MEG)
V1 N002 0 10
.tran 0 5u 0 1n
.lib AD3541R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 728
WIRE 224 -96 -240 -96
WIRE 128 -48 -64 -48
WIRE -240 -32 -240 -96
WIRE -64 -32 -64 -48
WIRE 128 0 128 -48
WIRE 224 0 224 -96
WIRE 640 48 352 48
WIRE -240 64 -240 48
WIRE -64 64 -64 48
WIRE 640 144 640 48
WIRE 640 144 416 144
WIRE -16 176 -704 176
WIRE 64 176 -16 176
WIRE 592 176 432 176
WIRE 640 176 640 144
WIRE 640 176 592 176
WIRE -704 224 -704 176
WIRE 480 256 384 256
WIRE 640 256 640 176
WIRE 640 256 544 256
WIRE -704 336 -704 304
WIRE -384 336 -384 304
WIRE -240 336 -240 304
WIRE 640 336 640 256
WIRE 128 384 128 352
WIRE 640 464 640 416
WIRE 128 496 128 464
WIRE 224 496 224 352
WIRE 224 496 128 496
WIRE 128 512 128 496
SYMBOL voltage -704 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value SINE(1.25 1.25 1MEG)
SYMBOL voltage -64 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL voltage 128 368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -7
SYMBOL AD3541R 224 176 R0
SYMATTR InstName U2
SYMATTR Value2 RANGE_SEL=1
SYMBOL voltage -240 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value PWL(0 0 2u 0 +1n 2.5)
SYMBOL cap 544 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage -240 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 624 320 R0
SYMATTR InstName R1
SYMATTR Value 1k noiseless
SYMBOL voltage -384 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 2.5
FLAG -64 64 0
FLAG -240 64 0
FLAG 128 512 0
FLAG 640 464 0
FLAG -704 336 0
FLAG -384 336 0
FLAG 592 176 Vout
FLAG -240 336 0
FLAG -16 176 vDAC
TEXT -272 536 Left 2 !.tran 0 5u 0 1n
TEXT -272 592 Left 2 ;.noise V(Vout) V5 dec 10 0.1 1g
TEXT -840 432 Left 2 ;VDAC input should be within the range 0 to 2.5V\nRANGE_SEL should be an integer within 0 to 4
TEXT -840 -104 Left 2 ;Range              RFB            RANGE_SEL \n0 to 2.5V            1x                       0           \n0 to 5V               1x                       1\n0 to 10V             2x                       2\n-5 to 5V              2x                       3\n-2.5 to 7.5V        2x                       4
TEXT -272 640 Left 2 ;.dc V5 0 2.5 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1152.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC1152.asy)
V2 -V 0 -5
V1 +V 0 5
XU1 IN OUT +V -V OUT NC_01 NC_02 NC_03 LTC1152 ;pnba In+)In-)V+)V-)Out)Comp)SHDN)Cp
V3 IN 0 SINE(0 5 1K)
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 128 -48 -240 -48
WIRE -528 -16 -528 -32
WIRE -400 -16 -400 -32
WIRE -528 80 -528 64
WIRE -400 80 -400 64
WIRE -240 96 -240 -48
WIRE -208 96 -240 96
WIRE 80 96 48 96
WIRE -208 160 -416 160
WIRE 128 160 128 -48
WIRE 128 160 48 160
WIRE 160 160 128 160
WIRE -416 176 -416 160
WIRE -208 224 -240 224
WIRE -416 272 -416 256
SYMBOL voltage -528 -32 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -416 160 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 5 1K)
SYMBOL opamps\\LTC1152 -80 128 R0
SYMATTR InstName U1
SYMBOL voltage -400 -32 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -400 80 0
FLAG -400 -32 +V
FLAG -528 80 0
FLAG -528 -32 -V
FLAG -416 272 0
FLAG 80 96 +V
FLAG -240 224 -V
FLAG -416 160 IN
FLAG 160 160 OUT
TEXT 104 288 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\2299a50483c2_latch-reset-npn-pnp.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 signal P001 power 0 BC557C
Rlatch signal Q2-b 10k
V3 reset 0 PULSE(0 5 1.5 1m 1m 1m)
Q2 N001 Q2-b 0 0 BC547C
Rb P001 N001 1k
S2 Q2-b 0 reset 0 NOSW SW
Rload signal 0 220
V2 control 0 PULSE(0 5 1 1m 1m 1m)
V1 power 0 5
S1 N001 0 control 0 NOSW SW
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NOSW SW(Ron=1, Roff=1000Meg, Vt=2, Vh=0)
.tran 2
.ic V(Q2-b)=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 680
WIRE 464 112 384 112
WIRE 640 112 560 112
WIRE 720 112 640 112
WIRE 640 160 640 112
WIRE 864 240 864 208
WIRE 512 272 512 256
WIRE 512 272 368 272
WIRE 368 288 368 272
WIRE 512 288 512 272
WIRE 640 336 640 240
WIRE 640 336 576 336
WIRE 640 352 640 336
WIRE 864 352 864 320
WIRE 368 400 368 368
WIRE 512 448 512 384
WIRE 640 448 640 432
IOPIN 384 112 In
IOPIN 720 112 Out
IOPIN 864 208 In
IOPIN -16 160 Out
IOPIN 80 160 Out
IOPIN 320 352 In
IOPIN 688 416 In
IOPIN 176 112 Out
SYMBOL sw 640 336 M0
WINDOW 0 34 26 Left 2
SYMATTR InstName S2
SYMATTR SpiceModel NOSW
SYMBOL Voltage -16 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL Voltage 80 144 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 1 1m 1m 1m)
SYMBOL Res 496 160 R0
SYMATTR InstName Rb
SYMATTR Value 1k
SYMBOL npn 576 288 M0
SYMATTR InstName Q2
SYMATTR Value BC547C
SYMBOL Voltage 176 96 R0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 1.5 1m 1m 1m)
SYMBOL sw 368 272 R0
SYMATTR InstName S1
SYMATTR SpiceModel NOSW
SYMBOL Res 624 144 R0
SYMATTR InstName Rlatch
SYMATTR Value 10k
SYMBOL Res 848 224 R0
SYMATTR InstName Rload
SYMATTR Value 220
SYMBOL pnp 560 176 M270
WINDOW 0 33 10 VLeft 2
WINDOW 3 82 85 VLeft 2
SYMATTR InstName Q1
SYMATTR Value BC557C
FLAG 512 448 0
FLAG 384 112 power
FLAG 720 112 signal
FLAG 864 352 0
FLAG 864 208 signal
FLAG -16 240 0
FLAG -16 160 power
FLAG 80 240 0
FLAG 80 160 control
FLAG 320 352 control
FLAG 320 304 0
FLAG 640 336 Q2-b
FLAG 368 400 0
FLAG 688 368 0
FLAG 688 416 reset
FLAG 640 448 0
FLAG 176 192 0
FLAG 176 112 reset
TEXT -104 440 Left 2 !.model NOSW SW(Ron=1, Roff=1000Meg, Vt=2, Vh=0)
TEXT -96 336 Left 2 !.tran 2
TEXT 656 296 Left 2 !.ic V(Q2-b)=0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7185-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7185-3.asy)
C1 N001 N002 10n
C3 N001 0 1
V1 IN 0 -3.5
XU1 OUT OUT N001 N002 IN 0 N003 IN ADP7185-3 ;pnba Vout)Sense)VA)VAFB)EN)GND)Vreg)Vin
R3 OUT 0 6
C2 OUT 0 4.7 Rser=5m
C4 N003 0 1
.tran 200m startup
.lib ADP7185-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 16 -48
WIRE 96 -48 32 -48
WIRE 112 -48 96 -48
WIRE 400 -48 368 -48
WIRE 432 -48 400 -48
WIRE 496 -48 432 -48
WIRE 512 -48 496 -48
WIRE 16 -32 16 -48
WIRE 432 -32 432 -48
WIRE 512 -32 512 -48
WIRE 400 16 400 -48
WIRE 400 16 368 16
WIRE 432 48 432 32
WIRE 16 64 16 48
WIRE 512 64 512 48
WIRE 96 80 96 -48
WIRE 112 80 96 80
WIRE 464 80 368 80
WIRE 384 144 368 144
WIRE 464 144 464 80
WIRE 464 144 448 144
WIRE 464 160 464 144
WIRE 176 224 176 208
WIRE 304 224 304 208
WIRE 464 240 464 224
WIRE 176 320 176 288
SYMBOL voltage 16 -48 R0
SYMATTR InstName V1
SYMATTR Value -3.5
SYMBOL ADP7185-3 240 48 R0
SYMATTR InstName U1
SYMBOL res 496 -48 R0
SYMATTR InstName R3
SYMATTR Value 6
SYMBOL cap 160 224 R0
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=5m
SYMBOL cap 448 160 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 448 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
FLAG 16 64 0
FLAG 432 48 0
FLAG 304 224 0
FLAG 512 64 0
FLAG 32 -48 IN
FLAG 496 -48 OUT
FLAG 464 240 0
FLAG 176 320 0
TEXT 136 352 Left 2 !.tran 200m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\26410a099ce7_ADA4000-4.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4000-4.asy)
Vin IN 0 SINE(0 1 500K)
V1 +V 0 15
R2 OUT N001 10K
V2 -V 0 -15
XU1 IN N001 +V -V OUT ADA4000 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 10K
.tran 20u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 720 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 432 -976 432 -992
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL Opamps\\ADA4000-4 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 500K)
FLAG 144 -1168 +V
FLAG 432 -976 0
FLAG 720 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 256 -1056 0
FLAG 144 -1056 0
TEXT 752 -992 Left 2 !.tran 20u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3303C.asc
* Generated by LTspice 26.0.1 for Windows.
* The output voltage is adjustable from \n0.5V to 3.65V in 50mV increments.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3303C.asy)
R1 IN N001 10
XU1 IN N001 N003 OUT 0 0 N001 N002 N001 LTC3303C Vout_trim=1.8 ;pnba VIN)EN)SW)VOUT)AGND)PGND)AVIN)PGOOD)MODE/SYNC
V1 IN 0 5
C2 N001 0 1
L1 N003 OUT 150n Rser=2m
C1 OUT 0 10 m=2 Rser=10m
R4 OUT N002 500K
Rload OUT 0 0.45
.tran 1.5m startup
.lib LTC3303C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2652 1844
WIRE 1376 1248 1344 1248
WIRE 1488 1248 1376 1248
WIRE 1712 1248 1488 1248
WIRE 1344 1264 1344 1248
WIRE 1488 1264 1488 1248
WIRE 1712 1296 1712 1248
WIRE 1344 1360 1344 1344
WIRE 1488 1360 1488 1344
WIRE 1488 1360 1424 1360
WIRE 1552 1360 1488 1360
WIRE 1904 1360 1872 1360
WIRE 2016 1360 1984 1360
WIRE 1424 1376 1424 1360
WIRE 1424 1456 1424 1440
WIRE 1488 1472 1488 1360
WIRE 1552 1472 1488 1472
WIRE 1904 1472 1872 1472
WIRE 2016 1472 2016 1360
WIRE 2016 1472 1984 1472
WIRE 2112 1472 2016 1472
WIRE 2160 1472 2112 1472
WIRE 2208 1472 2160 1472
WIRE 2112 1488 2112 1472
WIRE 2208 1488 2208 1472
WIRE 1488 1584 1488 1472
WIRE 1552 1584 1488 1584
WIRE 2016 1584 2016 1472
WIRE 2016 1584 1872 1584
WIRE 2112 1584 2112 1552
WIRE 2208 1584 2208 1568
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
SYMBOL cap 2096 1488 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 m=2
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=10m
SYMBOL res 2192 1472 R0
SYMATTR InstName Rload
SYMATTR Value 0.45
SYMBOL ind 1888 1488 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150n
SYMATTR SpiceLine Rser=2m
SYMBOL res 2000 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 500K
SYMBOL VOLTAGE 1344 1248 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 1472 1248 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL cap 1408 1376 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL LTC3303C 1712 1456 R0
WINDOW 39 -96 365 Center 2
SYMATTR InstName U1
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1344 1360 0
FLAG 2208 1584 0
FLAG 2112 1584 0
FLAG 1376 1248 IN
FLAG 2160 1472 OUT
FLAG 1424 1456 0
TEXT 2024 1736 Left 2 !.tran 1.5m startup
TEXT 1528 1768 Left 2 ;The output voltage is adjustable from \n0.5V to 3.65V in 50mV increments.
* Z:\home\khalils\Downloads\files\data\raw_asc\1319648db68f_6990.asc
* Generated by LTspice 26.0.1 for Windows.
* TimerBlox\n500Hz to 2KHz Voltage Controlled Oscillator\nControl Voltage Ramps from 2V to 1V\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6990.asy)
R4 N003 N002 261K
V2 N002 0 PULSE(2 1 5m 20m 20m 5m 50m)
R3 N003 0 196K
R1 N001 N004 1Meg
XU1 N001 0 N003 N004 N001 OUT LTC6990 ;pnba OE)GND)SET)DIV)V+)OUT
V1 N001 0 5
R2 N004 0 887K
.tran 60m startup
.lib LTC6990.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
WIRE 512 32 80 32
WIRE 80 80 80 32
WIRE 112 80 80 80
WIRE 400 80 336 80
WIRE 112 160 96 160
WIRE 384 160 336 160
WIRE 512 160 512 32
WIRE 512 160 384 160
WIRE 384 176 384 160
WIRE 512 176 512 160
WIRE -336 240 -352 240
WIRE -96 240 -256 240
WIRE 48 240 -16 240
WIRE 112 240 48 240
WIRE 352 240 336 240
WIRE 48 256 48 240
WIRE 352 272 352 240
WIRE 384 272 384 256
WIRE 384 272 352 272
WIRE 512 272 512 256
WIRE 384 288 384 272
WIRE 48 352 48 336
WIRE 384 384 384 368
SYMBOL voltage 512 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -240 240 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(2 1 5m 20m 20m 5m 50m)
SYMATTR InstName V2
SYMBOL LTC6990 224 160 R0
SYMATTR InstName U1
SYMBOL res 368 272 R0
SYMATTR InstName R2
SYMATTR Value 887K
SYMBOL res 32 240 R0
SYMATTR InstName R3
SYMATTR Value 196K
SYMBOL res 0 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 261K
SYMBOL res 368 160 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
FLAG 512 272 0
FLAG -352 240 0
FLAG 96 160 0
FLAG 400 80 OUT
FLAG 48 352 0
FLAG 384 384 0
TEXT 224 24 Bottom 2 ;TimerBlox\n500Hz to 2KHz Voltage Controlled Oscillator\nControl Voltage Ramps from 2V to 1V\nStartup Modeled
TEXT 488 368 Left 2 !.tran 60m startup