Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\47f2abd3b02b_MOSFET_transfer_body_effect.asc
* Generated by LTspice 26.0.1 for Windows.
+LAMBDA=0.1 PHI=0.6 GAMMA=0.37)
VDS N001 0 5
VB N002 0 0
M1 N001 N003 0 N002 MC8
VGS N003 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VGS 0 1 0.01 VB -1 1 0.5
.model MC8 NMOS (KP=60e-3 VTO=0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1412 680
WIRE 320 80 160 80
WIRE 160 112 160 80
WIRE 320 128 320 80
WIRE 240 160 160 160
WIRE 112 192 -64 192
WIRE -64 208 -64 192
WIRE 240 224 240 160
WIRE 160 256 160 208
WIRE -64 320 -64 288
WIRE 240 384 240 304
WIRE 320 384 320 208
SYMBOL voltage 320 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 5
SYMBOL voltage -64 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 0
SYMBOL voltage 240 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value 0
SYMBOL nmos4 112 112 R0
SYMATTR InstName M1
SYMATTR Value MC8
FLAG -64 320 0
FLAG 320 384 0
FLAG 240 384 0
FLAG 160 256 0
TEXT -32 448 Left 2 !.dc VGS 0 1 0.01 VB -1 1 0.5
TEXT -32 488 Left 2 !.model MC8 NMOS (KP=60e-3 VTO=0.5 \n+LAMBDA=0.1 PHI=0.6 GAMMA=0.37)
* Z:\home\khalils\Downloads\files\data\raw_asc\4d2948d2b4a0_Fig9_24_pmos.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Is(M1) and 1/d(Is(M1)) (to get ro)
M1 N002 N001 0 0 P_1u l=2u w=30u
VSG 0 N001 1.15
VSD 0 N002 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSD 0 5
.include cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 688
WIRE 448 0 320 0
WIRE 672 0 448 0
WIRE 848 0 672 0
WIRE 320 32 320 0
WIRE 848 32 848 0
WIRE 448 112 448 0
WIRE 320 128 320 112
WIRE 400 128 320 128
WIRE 672 160 672 0
WIRE 672 160 448 160
WIRE 672 192 672 160
WIRE 448 304 448 208
WIRE 672 304 672 272
WIRE 672 304 448 304
SYMBOL voltage 320 16 R0
WINDOW 0 -93 54 Left 2
WINDOW 3 -93 82 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VSG
SYMATTR Value 1.15
SYMBOL pmos4 400 208 M180
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=2u w=30u
SYMATTR InstName M1
SYMATTR Value P_1u
SYMBOL voltage 672 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 38 54 Left 2
WINDOW 3 24 104 Invisible 2
SYMATTR InstName VSD
SYMATTR Value 0
FLAG 848 32 0
TEXT 384 336 Left 2 !.dc VSD 0 5
TEXT 384 360 Left 2 !.include cmosedu_models.txt
TEXT 368 -32 Left 2 ;Plot Is(M1) and 1/d(Is(M1)) (to get ro)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6650.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
XU1 N001 0 OUT OUT LT6650 ;pnba IN)GND)OUT)FB
C1 OUT 0 1 Rser=5
I1 OUT 0 pulse(100u -100u 200u 10u 10u 800u 1.6m)
.tran 2m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6650.asy)
.lib LT6650.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2336 1256
WIRE 1232 -48 1040 -48
WIRE 1040 -32 1040 -48
WIRE 1232 -16 1232 -48
WIRE 1376 32 1344 32
WIRE 1440 32 1376 32
WIRE 1536 32 1440 32
WIRE 1440 48 1440 32
WIRE 1536 48 1536 32
WIRE 1040 64 1040 48
WIRE 1376 96 1376 32
WIRE 1376 96 1344 96
WIRE 1440 144 1440 112
WIRE 1536 144 1536 128
WIRE 1232 160 1232 144
FLAG 1040 64 0
FLAG 1232 160 0
FLAG 1536 32 OUT
FLAG 1440 144 0
FLAG 1536 144 0
SYMBOL voltage 1040 -48 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL LT6650 1232 64 R0
SYMATTR InstName U1
SYMBOL cap 1424 48 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMATTR SpiceLine Rser=5
SYMBOL current 1536 48 R0
SYMATTR InstName I1
SYMATTR Value pulse(100u -100u 200u 10u 10u 800u 1.6m)
TEXT 1520 216 Left 2 !.tran 2m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3462A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3462A.asy)
L1 IN N001 22 Rser=10m
C1 OUT 0 2.2
V1 IN 0 5
Rload OUT 0 50
C3 OUT N003 22p
R1 OUT N003 267K
R2 N003 N004 68.1K
L2 OUT N002 22 Rser=10m
C2 N002 N001 1 Rser=50m
XU1 N001 0 N003 N004 N002 IN LT3462A ;pnba SW)GND)FB)SDREF)D)Vin
K1 L1 L2 1
.tran 500u startup
.lib LT3462A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1280 680
WIRE 16 96 -64 96
WIRE 48 96 16 96
WIRE 160 96 128 96
WIRE 176 96 160 96
WIRE 256 96 240 96
WIRE 272 96 256 96
WIRE 384 96 352 96
WIRE 496 96 384 96
WIRE 592 96 496 96
WIRE 688 96 592 96
WIRE -64 112 -64 96
WIRE 384 112 384 96
WIRE 592 112 592 96
WIRE 688 112 688 96
WIRE 496 128 496 96
WIRE 160 160 160 96
WIRE 256 160 256 96
WIRE 592 208 592 176
WIRE 688 208 688 192
WIRE -64 224 -64 192
WIRE 16 224 16 96
WIRE 96 224 16 224
WIRE 384 224 384 192
WIRE 384 224 320 224
WIRE 496 224 496 192
WIRE 496 224 384 224
WIRE 384 240 384 224
WIRE 384 336 384 320
WIRE 384 336 320 336
WIRE 208 400 208 384
SYMBOL PowerProducts\\LT3462A 208 256 R0
SYMATTR InstName U1
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 480 128 R0
SYMATTR InstName C3
SYMATTR Value 22p
SYMBOL cap 576 112 R0
WINDOW 3 29 52 Left 2
SYMATTR Value 2.2
SYMATTR InstName C1
SYMBOL res 368 224 R0
SYMATTR InstName R2
SYMATTR Value 68.1K
SYMBOL res 672 96 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL ind2 368 112 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 22
SYMATTR Type ind
SYMATTR SpiceLine Rser=10m
SYMBOL ind2 32 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 22
SYMATTR Type ind
SYMATTR SpiceLine Rser=10m
SYMBOL res 368 96 R0
SYMATTR InstName R1
SYMATTR Value 267K
SYMBOL cap 240 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
SYMATTR SpiceLine Rser=50m
FLAG 208 400 0
FLAG -64 224 0
FLAG 592 208 0
FLAG 688 208 0
FLAG -64 96 IN
FLAG 688 96 OUT
TEXT 448 368 Left 2 !.tran 500u startup
TEXT 208 32 Center 2 !K1 L1 L2 1
* Z:\home\khalils\Downloads\files\data\raw_asc\39a806741e3c_Adder.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N001 V+ V- N002 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R1 N002 N001 1k
R3 N003 N002 1k
R4 OUTPUT N003 1k
XU2 0 N003 V+ V- OUTPUT level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R5 N001 Vy 1k
R2 N001 Vx 1k
V1 Vx 0 3V
V2 Vy 0 2V
V3 V+ 0 12V
V4 V- 0 -12V
* Vo = Vx + Vy
.tran 10ms
* THE ADDER CIRCUIT
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 32 0 32
WIRE 112 32 96 32
WIRE 304 48 272 48
WIRE 416 48 384 48
WIRE -128 112 -176 112
WIRE -32 112 -48 112
WIRE -32 160 -32 112
WIRE 0 160 0 32
WIRE 0 160 -32 160
WIRE 16 160 0 160
WIRE 112 176 112 32
WIRE 112 176 80 176
WIRE 144 176 112 176
WIRE 272 176 272 48
WIRE 272 176 224 176
WIRE 304 176 272 176
WIRE 16 192 0 192
WIRE 416 192 416 48
WIRE 416 192 368 192
WIRE 464 192 416 192
WIRE -128 208 -176 208
WIRE -32 208 -32 160
WIRE -32 208 -48 208
WIRE 304 208 288 208
WIRE 0 256 0 192
WIRE 288 256 288 208
FLAG 0 256 0
FLAG 288 256 0
FLAG -528 -32 0
FLAG -400 -32 0
FLAG -272 -32 0
FLAG -160 -32 0
FLAG -528 -112 Vx
IOPIN -528 -112 Out
FLAG -400 -112 Vy
IOPIN -400 -112 Out
FLAG -272 -112 V+
IOPIN -272 -112 Out
FLAG -160 -112 V-
IOPIN -160 -112 Out
FLAG -176 112 Vx
IOPIN -176 112 In
FLAG -176 208 Vy
IOPIN -176 208 In
FLAG 48 144 V+
IOPIN 48 144 In
FLAG 336 160 V+
IOPIN 336 160 In
FLAG 48 208 V-
IOPIN 48 208 In
FLAG 336 224 V-
IOPIN 336 224 In
FLAG 464 192 OUTPUT
IOPIN 464 192 BiDir
SYMBOL Opamps\\UniversalOpamp2 48 176 R0
SYMATTR InstName U1
SYMBOL res 112 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 240 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 400 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL Opamps\\UniversalOpamp2 336 192 R0
SYMATTR InstName U2
SYMBOL res -32 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL res -32 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -528 -128 R0
SYMATTR InstName V1
SYMATTR Value 3V
SYMBOL voltage -400 -128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 2V
SYMBOL voltage -272 -128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 12V
SYMBOL voltage -160 -128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value -12V
TEXT 456 224 Left 2 ;Vo = Vx + Vy
TEXT -400 288 Left 2 !.tran 10ms
TEXT -176 -264 Left 6 ;THE ADDER CIRCUIT
* Z:\home\khalils\Downloads\files\data\raw_asc\0af6ee2bc704_assig2_q1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
XU1 N001 V_ V_CC 0 V_Q level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V V_CC 0 5 V
V_A N001 0 PULSE(0 5 0 0.001 0.001 0.25 0.5)
R2 V_CC V_ 55
R1 V_ 0 55
.tran 0 1 0 0.01
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -128 -64 -352 -64
WIRE 272 -64 -128 -64
WIRE -128 -16 -128 -64
WIRE 272 64 272 -64
WIRE -352 80 -352 -64
WIRE 272 112 272 64
WIRE -128 128 -128 64
WIRE 240 128 -128 128
WIRE 400 144 304 144
WIRE 240 160 0 160
WIRE -128 176 -128 128
WIRE 0 176 0 160
WIRE 272 208 272 176
WIRE -352 304 -352 160
WIRE -128 304 -128 256
WIRE -128 304 -352 304
WIRE 0 304 0 256
WIRE 0 304 -128 304
WIRE 272 304 272 208
WIRE 272 304 0 304
WIRE 0 336 0 304
SYMBOL res -144 -32 R0
SYMATTR InstName R2
SYMATTR Value 55
SYMBOL OpAmps\\UniversalOpamp2 272 144 R0
SYMATTR InstName U1
SYMBOL voltage -352 64 R0
SYMATTR InstName V
SYMATTR Value 5 V
SYMBOL voltage 0 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V_A
SYMATTR Value PULSE(0 5 0 0.001 0.001 0.25 0.5)
SYMBOL res -144 160 R0
SYMATTR InstName R1
SYMATTR Value 55
FLAG 0 336 0
FLAG 272 208 V_EE
FLAG 272 64 V_CC
FLAG 400 144 V_Q
FLAG -128 128 V_
TEXT -386 360 Left 2 !.tran 0 1 0 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8645SA.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 0 41.2K
V1 IN 0 12
L1 N002 OUT 2.2 Rser=10m
C4 OUT 0 100 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
R2 OUT N004 1Meg
R3 N004 0 243K
C5 OUT N004 2.2p
Rload OUT 0 0.625
C1 N003 0 1n
XU1 OUT NC_01 NC_02 IN IN 0 IN N002 N001 0 N003 0 NC_03 N004 0 NC_04 LT8645SA ;pnba BIAS)INTVcc)BST)VIN1)VIN2)GND1)EN/UV)SW)RT)GND2)TR/SS)SYNC/MODE)PG)FB)GND)CLKOUT
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8645SA.asy)
.lib LT8645SA.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1848 740
WIRE 0 -112 -32 -112
WIRE 80 -112 0 -112
WIRE 208 -112 80 -112
WIRE 432 -112 208 -112
WIRE -32 -80 -32 -112
WIRE 208 -64 208 -112
WIRE 80 0 80 -112
WIRE 112 0 80 0
WIRE 432 0 432 -112
WIRE 432 0 400 0
WIRE -32 32 -32 0
WIRE 112 96 96 96
WIRE 416 96 400 96
WIRE 544 192 400 192
WIRE 112 288 96 288
WIRE 0 384 -16 384
WIRE 112 384 80 384
WIRE 432 384 400 384
WIRE 544 384 544 192
WIRE 544 384 512 384
WIRE 656 384 544 384
WIRE 768 384 656 384
WIRE 832 384 768 384
WIRE 896 384 832 384
WIRE 544 400 544 384
WIRE 656 400 656 384
WIRE 768 400 768 384
WIRE 896 400 896 384
WIRE 16 480 -16 480
WIRE 112 480 80 480
WIRE 544 480 400 480
WIRE 656 480 656 464
WIRE 656 480 544 480
WIRE 544 496 544 480
WIRE 768 496 768 464
WIRE 896 496 896 480
WIRE 304 576 304 544
WIRE 544 592 544 576
FLAG 304 576 0
FLAG -16 384 0
FLAG -32 32 0
FLAG 768 496 0
FLAG 544 592 0
FLAG 896 496 0
FLAG 832 384 OUT
FLAG 0 -112 IN
FLAG 96 96 0
FLAG 416 96 0
FLAG -16 480 0
FLAG 96 288 0
SYMBOL res 96 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 41.2K
SYMBOL voltage -32 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ind 416 400 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=10m
SYMBOL cap 752 400 R0
SYMATTR InstName C4
SYMATTR Value 100
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL res 528 384 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 528 480 R0
SYMATTR InstName R3
SYMATTR Value 243K
SYMBOL cap 640 400 R0
SYMATTR InstName C5
SYMATTR Value 2.2p
SYMBOL res 880 384 R0
SYMATTR InstName Rload
SYMATTR Value 0.625
SYMBOL cap 80 496 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL LT8645SA 256 240 R0
SYMATTR InstName U1
TEXT 160 656 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1398.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 -V 0 -5
R1 OUT N001 324
R2 N001 0 200
V3 IN 0 SINE(0 1 10K)
XU1 IN N001 +V -V OUT _SHDN LT1398 ;pnba In+)In-)V+)V-)OUT)SHDN
V4 _SHDN 0 PULSE(0 5 0 1u 1u .5m 1m)
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1398.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 48 64 32 64
WIRE 144 64 128 64
WIRE 224 64 144 64
WIRE 352 64 304 64
WIRE -208 112 -208 96
WIRE -80 112 -80 96
WIRE 208 128 208 112
WIRE 144 176 144 64
WIRE 176 176 144 176
WIRE -208 208 -208 192
WIRE -80 208 -80 192
WIRE 352 208 352 64
WIRE 352 208 320 208
WIRE 416 208 352 208
WIRE 176 240 16 240
WIRE 16 256 16 240
WIRE 208 304 208 288
WIRE 256 336 256 288
WIRE 400 336 256 336
WIRE 16 352 16 336
WIRE 400 352 400 336
WIRE 400 448 400 432
FLAG -80 208 0
FLAG 208 112 +V
FLAG -80 96 +V
FLAG 208 304 -V
FLAG -208 208 0
FLAG -208 96 -V
FLAG 32 64 0
FLAG 16 352 0
FLAG 400 448 0
FLAG 16 240 IN
FLAG 416 208 OUT
FLAG 400 336 _SHDN
SYMBOL voltage -80 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -208 96 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 320 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 324
SYMBOL res 144 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL voltage 16 240 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 10K)
SYMBOL opamps\\LT1398 208 208 R0
SYMATTR InstName U1
SYMBOL voltage 400 336 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 5 0 1u 1u .5m 1m)
TEXT 168 400 Left 2 !.tran 3m
* Z:\tmp\asc_dec_bjh7r6w2\18bdb2dc791b_1728-3.3_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 10K
XU1 N002 0 N004 N005 N003 LTC1728-3.3 ;pnba _RST)GND)VccA)Vcc1.8)Vcc3
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1728-3.3.asy)
.lib LTC1728-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1100 756
WIRE -160 144 -224 144
WIRE 48 144 -80 144
WIRE 464 144 272 144
WIRE -224 176 -224 144
WIRE 48 208 16 208
WIRE 48 272 -64 272
WIRE 384 272 272 272
WIRE -224 288 -224 256
WIRE -64 304 -64 272
SYMBOL res -64 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL LTC1728-3.3 160 240 R0
SYMATTR InstName U1
FLAG 16 208 0
FLAG -224 288 0
* Z:\tmp\asc_dec_bjh7r6w2\10f5a4348ca0_schmitt_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
C2 0 N004 10pF
R11 SIG_OUT 5V 10K
R10 SIG_OUT N001 120K
XU3 N001 N004 5V 0 N002 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R8 N004 0 3.3Meg
* Library below included based on ModelFile attribute of instance XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 0 336 -32
WIRE 32 64 0 64
WIRE 176 96 112 96
WIRE 336 96 336 80
WIRE 336 96 256 96
WIRE 448 96 336 96
WIRE 480 96 448 96
WIRE -32 128 -192 128
WIRE 208 128 176 128
WIRE 208 144 208 128
WIRE 448 144 448 96
WIRE 176 160 176 128
WIRE 32 176 32 64
WIRE 112 176 112 96
WIRE 144 176 112 176
WIRE 224 192 208 192
WIRE 336 192 304 192
WIRE 384 192 336 192
WIRE -352 208 -448 208
WIRE -96 208 -176 208
WIRE -32 208 -96 208
WIRE 16 208 -32 208
WIRE 144 208 16 208
WIRE 336 224 336 192
WIRE 448 272 448 240
WIRE 336 336 336 304
WIRE 336 336 320 336
SYMBOL cap -160 272 R180
WINDOW 0 24 56 Left 2
WINDOW 3 14 -29 Left 2
SYMATTR InstName C2
SYMATTR Value 10pF
SYMBOL res 352 96 R180
WINDOW 0 -50 43 VRight 2
WINDOW 3 -21 40 VRight 2
SYMATTR InstName R11
SYMATTR Value 10K
SYMBOL res 272 80 R90
WINDOW 0 37 56 VBottom 2
WINDOW 3 -32 50 VTop 2
SYMATTR InstName R10
SYMATTR Value 120K
SYMBOL Opamps\\UniversalOpamp2 176 192 M180
SYMATTR InstName U3
SYMBOL res -112 192 R0
WINDOW 0 41 68 Left 2
WINDOW 3 -22 135 Left 2
SYMATTR InstName R8
SYMATTR Value 3.3Meg
FLAG -352 208 VGND
FLAG -176 272 0
FLAG -96 288 0
FLAG 16 288 THRESH
FLAG 176 224 5V
FLAG 208 144 0
FLAG 336 -32 5V
FLAG 336 336 0
FLAG 448 272 0
FLAG 480 96 SIG_OUT
FLAG 0 64 SIG_IN
FLAG -192 128 VGND
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8618C.asc
* Generated by LTspice 26.0.1 for Windows.
L1 SW OUT 120 Rser=1
C1 OUT 0 22
R1 FB 0 301k
R2 RT 0 110k
V1 N001 0 12
R3 OUT PG 100k
R4 OUT FB 1.62Meg
Rload OUT 0 50
XU1 NC_01 SW OUT SYNC RT FB TRSS PG N001 N001 0 LT8604C LT8604=0 DFN=0 VOUT33=0 ;pnba HYST)SW)Bias)SYNC)Rt)FB)TR/SS)PG)EN/UV)Vin)GND
.tran 3m steady nodiscard
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8618C.asy)
.lib LT8604C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1748 780
WIRE -32 48 -192 48
WIRE 16 48 -32 48
WIRE 368 48 304 48
WIRE 400 48 368 48
WIRE 528 48 480 48
WIRE 576 48 528 48
WIRE 800 48 576 48
WIRE 912 48 800 48
WIRE 944 48 912 48
WIRE -192 128 -192 48
WIRE -32 144 -32 48
WIRE 16 144 -32 144
WIRE 528 144 528 48
WIRE 528 144 304 144
WIRE 800 160 800 48
WIRE 944 160 944 48
WIRE 576 192 576 48
WIRE 800 256 800 224
WIRE 944 256 944 240
WIRE -192 272 -192 208
WIRE -48 336 -112 336
WIRE 16 336 -48 336
WIRE 336 336 304 336
WIRE 576 336 576 272
WIRE 576 336 336 336
WIRE 576 352 576 336
WIRE -64 432 -112 432
WIRE 16 432 -64 432
WIRE 576 464 576 432
WIRE -48 528 -192 528
WIRE 16 528 -48 528
WIRE 336 528 304 528
WIRE 384 528 336 528
WIRE 528 528 528 144
WIRE 528 528 464 528
WIRE -192 576 -192 528
WIRE 160 624 160 576
WIRE -192 720 -192 656
FLAG 576 464 0
FLAG 800 256 0
FLAG 912 48 OUT
FLAG -192 720 0
FLAG -192 272 0
FLAG 336 528 PG
FLAG 336 336 FB
FLAG 368 48 SW
FLAG -48 528 RT
FLAG -64 432 TRSS
FLAG 160 624 0
FLAG -48 336 SYNC
FLAG 944 256 0
SYMBOL ind 384 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 120
SYMATTR SpiceLine Rser=1
SYMBOL cap 784 160 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 560 336 R0
SYMATTR InstName R1
SYMATTR Value 301k
SYMBOL res -208 560 R0
SYMATTR InstName R2
SYMATTR Value 110k
SYMBOL voltage -192 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 480 512 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 560 176 R0
SYMATTR InstName R4
SYMATTR Value 1.62Meg
SYMBOL res 928 144 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL LT8618C 160 240 R0
SYMATTR InstName U1
TEXT 608 616 Left 2 !.tran 3m steady nodiscard
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP124-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP124-3.0.asy)
XU1 OUT MP_01 OUT 0 IN MP_02 MP_03 IN ADP124 K=40000 ;pnba Vout))Sense)GND)En)))Vin
C2 OUT 0 1
Rload OUT 0 100
C1 IN 0 1
V1 IN 0 5.5
.tran 10m startup
.lib ADP124.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 384 96 352 96
WIRE 432 96 384 96
WIRE 512 96 432 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 432 112 432 96
WIRE 512 112 512 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 384 208 384 96
WIRE 384 208 352 208
WIRE 432 208 432 176
WIRE 512 208 512 192
WIRE 256 272 256 256
SYMBOL cap 416 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL ADP124-3.0 256 208 R0
SYMATTR InstName U1
FLAG 0 208 0
FLAG 256 272 0
FLAG 432 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\18a82d6fc7f8_bipolar_buffer001.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
C1 N003 N006 30n
V2 N006 0 -5
Q2 N001 VOUT N005 0 2N3391A
R1 N001 N003 200
R4 VOUT N006 3.65k
V3 N004 0 SINE(0 1 100k) AC 1
Q3 VOUT N003 N002 0 2N4126
Q1 N003 N004 N005 0 2N3391A
R2 N005 N006 200
R3 N001 N002 1k
V4 NC_01 0 SINE(0) AC -1
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 50u 0 10n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1252 728
WIRE 144 -128 -144 -128
WIRE 416 -128 144 -128
WIRE 976 -128 416 -128
WIRE 976 -96 976 -128
WIRE -144 -80 -144 -128
WIRE 144 -80 144 -128
WIRE 976 16 976 -16
WIRE -144 32 -144 0
WIRE 144 64 144 0
WIRE 800 64 144 64
WIRE 912 64 800 64
WIRE 976 160 976 112
WIRE 976 160 480 160
WIRE 976 192 976 160
WIRE 1200 192 976 192
WIRE 1232 192 1200 192
WIRE 144 208 144 64
WIRE 416 208 416 -128
WIRE 800 208 800 64
WIRE 80 256 -224 256
WIRE 480 256 480 160
WIRE -224 288 -224 256
WIRE 272 304 144 304
WIRE 416 304 272 304
WIRE 976 320 976 192
WIRE 272 368 272 304
WIRE -224 432 -224 368
WIRE 528 432 528 368
WIRE 272 480 272 448
WIRE 272 480 0 480
WIRE 800 480 800 272
WIRE 800 480 272 480
WIRE 976 480 976 400
WIRE 976 480 800 480
WIRE 0 576 0 480
WIRE 0 688 0 656
SYMBOL pnp 912 112 M180
SYMATTR InstName Q3
SYMATTR Value 2N4126
SYMBOL npn 80 208 R0
SYMATTR InstName Q1
SYMATTR Value 2N3391A
SYMBOL npn 480 208 M0
SYMATTR InstName Q2
SYMATTR Value 2N3391A
SYMBOL res 960 304 R0
SYMATTR InstName R4
SYMATTR Value 3.65k
SYMBOL voltage -144 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 528 272 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC -1
SYMATTR InstName V4
SYMATTR Value SINE(0)
SYMBOL voltage -224 272 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100k)
SYMBOL res 128 -96 R0
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL voltage 0 560 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 960 -112 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 256 352 R0
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL cap 784 208 R0
SYMATTR InstName C1
SYMATTR Value 30n
FLAG -144 32 0
FLAG 0 688 0
FLAG 1200 192 VOUT
FLAG -224 432 0
FLAG 528 432 0
TEXT -258 712 Left 2 !.tran 0 50u 0 10n