Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8236.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8236.asy)
Vcm N004 0 2.5
Rload OUT 0 10K
Vref N005 0 2.5
Rgain N002 N003 84.5K
Vdiff N001 N004 SINE(0 .1 1K)
V1 +V 0 5
XU1 N004 N003 N002 N001 0 N005 OUT +V AD8236 ;pnba FB)RG2)RG1)In+)V-)REF)OUT)V+
.tran 100m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 80 -208 80
WIRE 208 80 208 64
WIRE 96 96 -16 96
WIRE 128 96 128 80
WIRE 144 96 128 96
WIRE -352 112 -352 96
WIRE -208 112 -208 80
WIRE -16 112 -16 96
WIRE 96 128 96 96
WIRE 144 128 96 128
WIRE 400 144 272 144
WIRE 144 160 96 160
WIRE 400 160 400 144
WIRE 144 192 128 192
WIRE -352 208 -352 192
WIRE -16 208 -16 192
WIRE 96 208 96 160
WIRE 96 208 -16 208
WIRE -208 224 -208 192
WIRE 128 224 128 192
WIRE 128 224 -208 224
WIRE 176 224 176 208
WIRE 240 224 240 208
WIRE -208 240 -208 224
WIRE 400 256 400 240
WIRE 240 320 240 304
WIRE -208 336 -208 320
SYMBOL AD8236 208 144 R0
WINDOW 3 43 34 Left 2
SYMATTR InstName U1
SYMBOL voltage 240 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vref
SYMATTR Value 2.5
SYMBOL voltage -208 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vcm
SYMATTR Value 2.5
SYMBOL res 384 144 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res -32 96 R0
SYMATTR InstName Rgain
SYMATTR Value 84.5K
SYMBOL voltage -208 96 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR Value SINE(0 .1 1K)
SYMATTR InstName Vdiff
SYMBOL voltage -352 96 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -352 208 0
FLAG -208 336 0
FLAG 240 320 0
FLAG 400 256 0
FLAG 176 224 0
FLAG 400 144 OUT
FLAG 208 64 +V
FLAG -352 96 +V
TEXT 360 360 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\1ff4de52d407_power.asc
* Generated by LTspice 26.0.1 for Windows.
D2 NC_01 out D
D1 usb out D
R2 out 0 1k
R1 out 0 10k
V2 bat 0 9
M1 bat out out out PMOS
V3 usb 0 5
V1 wall 0 9
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1s startup
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 432 32 432 -16
WIRE 160 112 -16 112
WIRE 304 112 256 112
WIRE 304 160 304 112
WIRE 432 160 432 96
WIRE 432 160 304 160
WIRE 240 192 240 160
WIRE 240 192 112 192
WIRE 304 192 304 160
WIRE 304 192 240 192
WIRE 240 224 240 192
WIRE 432 224 432 160
WIRE 240 320 240 304
WIRE 432 320 432 304
SYMBOL pmos 160 160 R270
SYMATTR InstName M1
SYMBOL voltage 64 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL voltage 400 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 416 208 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 224 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 9
SYMBOL res 224 208 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL schottky 48 208 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL schottky 416 32 R0
SYMATTR InstName D1
FLAG 240 320 0
FLAG 432 320 0
FLAG 64 496 0
FLAG 224 496 0
FLAG 400 496 0
FLAG 64 416 wall
FLAG 224 416 bat
FLAG 400 416 usb
FLAG 432 -16 usb
FLAG -16 112 bat
FLAG -16 192 wall
FLAG 432 160 out
TEXT -32 -32 Left 2 !.tran 1s startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1178A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1178A.asy)
V3 N003 0 SINE(1.25 .1 1K)
R1 N002 N001 5K
V1 +V 0 5
XU1 N003 N001 +V 0 N002 LT1178 ;pnba In+)In-)V+)V-)OUT
R2 N001 0 5K
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -192 176 -192 160
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 160 256 0 256
WIRE -192 272 -192 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL voltage -192 160 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL opamps\\LT1178A 192 176 R0
SYMATTR InstName U1
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(1.25 .1 1K)
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
FLAG -192 272 0
FLAG 192 192 +V
FLAG -192 160 +V
FLAG 16 96 0
FLAG 0 368 0
FLAG 192 288 0
TEXT 248 320 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1366.asc
* Generated by LTspice 26.0.1 for Windows.
* Input Bias Current Cancellation
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1366.asy)
R2 N003 N002 1Meg
XU2 N001 N003 +V -V N002 LT1366 ;pnba In+)In-)V+)V-)OUT
XU1 IN N001 +V -V OUT LT1366 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
C1 N003 N002 22p
R3 IN N002 1Meg
R1 OUT N001 10K
V3 IN 0 SINE(0 1 100)
V2 -V 0 -5
.tran 30m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 720
WIRE 208 -32 192 -32
WIRE 320 -32 288 -32
WIRE 256 80 256 64
WIRE 192 96 192 -32
WIRE 224 96 192 96
WIRE 320 112 320 -32
WIRE 320 112 288 112
WIRE 368 112 320 112
WIRE 96 128 -128 128
WIRE 224 128 96 128
WIRE -128 144 -128 128
WIRE 256 160 256 144
WIRE 96 176 96 128
WIRE 192 208 192 96
WIRE 272 208 192 208
WIRE -128 240 -128 224
WIRE 208 288 208 272
WIRE 272 304 272 208
WIRE 272 304 240 304
WIRE 96 320 96 256
WIRE 176 320 96 320
WIRE 272 336 240 336
WIRE 208 368 208 352
WIRE -192 400 -192 384
WIRE -64 400 -64 384
WIRE 96 416 96 320
WIRE 112 416 96 416
WIRE 272 416 272 336
WIRE 272 416 192 416
WIRE 96 480 96 416
WIRE 192 480 96 480
WIRE 272 480 272 416
WIRE 272 480 256 480
WIRE -192 496 -192 480
WIRE -64 496 -64 480
SYMBOL voltage -192 384 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL opamps\\LT1366 256 48 R0
SYMATTR InstName U1
SYMBOL res 80 160 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL opamps\\LT1366 208 384 R180
WINDOW 0 29 91 Left 2
WINDOW 3 21 34 Left 2
SYMATTR InstName U2
SYMBOL voltage -128 128 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
SYMBOL res 208 400 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL voltage -64 384 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 304 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL cap 256 464 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 22p
FLAG -64 496 0
FLAG 256 64 +V
FLAG -64 384 +V
FLAG 256 160 -V
FLAG -192 496 0
FLAG -192 384 -V
FLAG 208 368 +V
FLAG 208 272 -V
FLAG 368 112 OUT
FLAG -128 128 IN
FLAG -128 240 0
TEXT 320 328 Left 2 !.tran 30m
TEXT 144 -80 Bottom 2 ;Input Bias Current Cancellation
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7155-02.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 2.9
C3 OUT 0 10
R1 N003 N005 50K
R2 N005 0 100K
C4 N003 0 1
C1 N004 0 1 Rser=10m Lser=1n
C2 N002 0 1
R3 IN N001 100K
R5 OUT 0 18
XU1 N004 OUT N002 0 N005 N003 N001 IN ADM7154_5 Vreg=2.6022 Vref=1.2152 ;pnba Vreg)Vout)Byp)GND)Ref_Sense)Ref)EN)Vin
.tran 5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7155-02.asy)
.lib ADM7154_5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -160 32
WIRE 80 32 -32 32
WIRE 464 32 400 32
WIRE 560 32 464 32
WIRE -160 48 -160 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE -160 144 -160 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE 0 224 -16 224
WIRE 80 224 64 224
WIRE 464 224 400 224
WIRE 560 224 464 224
WIRE 464 240 464 224
WIRE 560 240 560 224
WIRE 560 320 560 304
WIRE 0 336 -16 336
WIRE 80 336 64 336
WIRE 464 336 464 320
WIRE 464 336 400 336
WIRE 464 352 464 336
WIRE 240 416 240 400
WIRE 464 448 464 432
FLAG 240 416 0
FLAG 560 320 0
FLAG 464 144 0
FLAG -16 336 0
FLAG -16 224 0
FLAG -160 144 0
FLAG 560 144 0
FLAG 464 448 0
FLAG -160 32 IN
FLAG 560 32 OUT
SYMBOL voltage -160 32 R0
SYMATTR InstName V1
SYMATTR Value 2.9
SYMBOL cap 448 48 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res 448 224 R0
SYMATTR InstName R1
SYMATTR Value 50K
SYMBOL res 448 336 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL cap 544 240 R0
WINDOW 0 36 14 Left 2
WINDOW 3 36 50 Left 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap 64 320 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMATTR Value2 Rser=10m
SYMATTR SpiceLine Lser=1n
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res 544 32 R0
SYMATTR InstName R5
SYMATTR Value 18
SYMBOL ADM7155-02 240 176 R0
SYMATTR InstName U1
TEXT 552 448 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\14c6d654d743_R_cMeter.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 100
Dut 0 N002 1N4148
XU1 N002 0 N001 R C capometer current=1m freq=3Meg C=.5 Q=.25 ;pnba DUT+)DUT-)bias)Resistance)Capacitance
V1 N001 0 PWL(0 -25 1m 25)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 1m .5m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -432 256 -432 192
WIRE -432 272 -432 256
WIRE -432 384 -432 352
WIRE -352 256 -432 256
WIRE -224 256 -272 256
WIRE -224 288 -224 256
WIRE -224 384 -432 384
WIRE -224 384 -224 352
WIRE -160 384 -224 384
WIRE -160 384 -160 320
WIRE -160 416 -160 384
WIRE -96 192 -432 192
WIRE -96 256 -224 256
WIRE -96 320 -160 320
WIRE 304 224 272 224
WIRE 304 288 272 288
SYMBOL diode -208 352 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName Dut
SYMATTR Value 1N4148
SYMBOL res -256 240 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage -432 256 M0
WINDOW 3 -182 147 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -15 61 Left 0
SYMATTR Value PWL(0 -25 1m 25)
SYMATTR InstName V1
SYMBOL SpecialFunctions\\capmeter -16 224 R0
WINDOW 0 86 -48 Left 0
WINDOW 3 49 112 Left 0
SYMATTR InstName U1
FLAG -160 416 0
FLAG 304 224 R
FLAG 304 288 C
TEXT -450 450 Left 0 !.tran 0 1m .5m
* Z:\home\khalils\Downloads\files\data\raw_asc\fe3f86581a3c_Draft5.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N001 Vout 2k
R2 0 Vout {Re}
R1 N001 N002 50
G1 0 Vout N001 Vout 0.015
Vi N002 0 SINE(0 1 10k 0 0 0 100) AC 1 0
.tran 0.00015
.meas TRAN GainMedFreq PARAM V(Vout)/V(n002)
.step param Re 1 20k 1k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1108 680
WIRE 352 96 96 96
WIRE 0 160 -64 160
WIRE 96 160 96 96
WIRE 96 160 80 160
WIRE 128 160 96 160
WIRE 240 160 208 160
WIRE 288 160 240 160
WIRE 400 160 288 160
WIRE -64 224 -64 160
WIRE 240 240 240 160
WIRE 400 240 400 160
WIRE 352 256 352 96
WIRE 288 304 288 160
WIRE 352 304 288 304
WIRE -64 384 -64 304
WIRE 240 384 240 320
WIRE 240 384 -64 384
WIRE 256 384 240 384
WIRE 400 384 400 320
WIRE 400 384 256 384
WIRE 256 400 256 384
SYMBOL g 400 224 R0
SYMATTR InstName G1
SYMATTR Value 0.015
SYMBOL voltage -64 208 R0
WINDOW 0 46 58 Left 2
WINDOW 3 -340 74 Left 2
WINDOW 123 -231 51 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName Vi
SYMATTR Value SINE(0 1 10k 0 0 0 100)
SYMATTR Value2 AC 1 0
SYMBOL res 256 336 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value {Re}
SYMBOL res 96 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL res 112 176 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 2k
FLAG 400 160 Vout
FLAG 256 400 0
TEXT -106 490 Left 2 !.tran 0.00015
TEXT -112 528 Left 2 !.meas TRAN GainMedFreq PARAM V(Vout)/V(n002)
TEXT -104 568 Left 2 !.step param Re 1 20k 1k
* Z:\tmp\asc_dec_bjh7r6w2\152eb8d82437_Stepped_Sine1_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
A4 f 0 sd 0 0 0 fh 0 SAMPLEHOLD
A5 0 S N001 0 0 0 SQ 0 AND ref=0
V1 N001 0 PULSE(-1 1 {kd} 1n 1n)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1680 680
WIRE 576 128 576 96
WIRE 576 128 144 128
WIRE 912 128 576 128
WIRE 1120 176 1088 176
WIRE 448 192 432 192
WIRE 480 192 480 96
WIRE 480 192 448 192
WIRE 560 192 480 192
WIRE 688 192 688 96
WIRE 688 192 624 192
WIRE 720 192 688 192
WIRE 832 192 832 96
WIRE 832 192 784 192
WIRE 912 192 832 192
WIRE 560 208 528 208
WIRE 464 256 432 256
WIRE 528 288 528 208
WIRE 1120 480 1120 176
WIRE 688 544 688 192
SYMBOL SpecialFunctions\\sample 992 160 R0
SYMATTR InstName A4
SYMBOL Digital\\and 592 144 R0
WINDOW 3 -18 118 Left 0
SYMATTR Value ref=0
SYMATTR InstName A5
SYMBOL voltage 528 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(-1 1 {kd} 1n 1n)
FLAG 576 96 f
FLAG 448 192 S
FLAG 1120 176 fh
FLAG 832 96 sd
FLAG 480 96 S
FLAG 688 96 SQ
FLAG 528 368 0
FLAG 464 256 C
* Z:\tmp\asc_dec_bjh7r6w2\013e29276de0_Integrador_con_montecarlo_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V2 0 -VCC 15
V3 N001 0 AC 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -176 0 -176 -16
WIRE 80 80 -16 80
WIRE 272 80 160 80
WIRE -176 96 -176 80
WIRE -176 96 -224 96
WIRE -224 112 -224 96
WIRE -176 128 -176 96
WIRE -16 128 -16 80
WIRE -176 224 -176 208
WIRE -16 256 -16 208
SYMBOL voltage -176 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage -16 112 R0
WINDOW 3 -106 208 Left 2
WINDOW 123 -3 183 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMATTR InstName V3
FLAG -224 112 0
FLAG -176 -16 +VCC
FLAG -176 224 -VCC
FLAG -16 256 0
* Z:\home\khalils\Downloads\files\data\raw_asc\33ea24da7e22_Assignment_4a__ii_.asc
* Generated by LTspice 26.0.1 for Windows.
* Full Wave Rectifier (Centre Tapped Transformer) (Ideal)
V1 N001 0 SINE(0 311 50) Rser=0.001
D1 N002 N003 1N4148
R1 N003 0 1000
K L1 L2 L3 1
D2 N004 N003 1N4148
L3 N004 0 0.001
L1 N001 0 0.001
L2 0 N002 0.001
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 128 16 -128 16
WIRE 368 16 240 16
WIRE 496 16 432 16
WIRE 240 48 240 16
WIRE -128 128 -128 16
WIRE 128 128 128 16
WIRE 240 160 240 128
WIRE 288 160 240 160
WIRE 368 160 288 160
WIRE 496 160 496 16
WIRE 496 160 448 160
WIRE 240 192 240 160
WIRE 288 192 288 160
WIRE -128 320 -128 208
WIRE 48 320 -128 320
WIRE 128 320 128 208
WIRE 128 320 48 320
WIRE 240 320 240 272
WIRE 368 320 240 320
WIRE 496 320 496 160
WIRE 496 320 432 320
WIRE 48 336 48 320
SYMBOL ind2 112 112 R0
SYMATTR InstName L1
SYMATTR Value 0.001
SYMATTR Type ind
SYMBOL diode 368 336 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL voltage -128 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.001
SYMATTR InstName V1
SYMATTR Value SINE(0 311 50)
SYMBOL res 464 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL ind2 256 288 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L3
SYMATTR Value 0.001
SYMATTR Type ind
SYMBOL diode 368 32 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL ind2 256 144 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L2
SYMATTR Value 0.001
SYMATTR Type ind
FLAG 288 192 0
FLAG 48 336 0
TEXT -128 -48 Left 2 ;Full Wave Rectifier (Centre Tapped Transformer) (Ideal)
TEXT 112 -8 Left 2 !K L1 L2 L3 1
TEXT -144 352 Left 2 !.tran 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\ceb5f4dc89d4_2stage_opamp_design.asc
* Generated by LTspice 26.0.1 for Windows.
* Current Mirror for Biasing
* Current Mirror loaded Differential Pair
* Common Source Amplifier
M4 N002 N001 VDD N004 PMOS l=1 w=64
M3 N001 N001 VDD N003 PMOS l=1 w=64
M00 CURR CURR VSS N009 NMOS l=1 w=4
M1 N001 Vin N008 N006 NMOS l=1 w=16
M0 N008 CURR VSS N010 NMOS l=1 w=32
M2 N002 Vip N008 N007 NMOS l=1 w=16
M5 Vout N002 VDD N005 PMOS l=1 w=640
M6 Vout CURR VSS N011 NMOS l=1 w=160
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model nmos nmos(level = 1 kp=400u vt0=0.5 lambda=0.05)
.model pmos pmos(level = 1 kp=100u vt0=-0.5 lambda=0.05)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1084 680
WIRE 128 16 -208 16
WIRE 368 16 128 16
WIRE 784 16 368 16
WIRE 128 48 128 16
WIRE 368 48 368 16
WIRE 784 48 784 16
WIRE 208 64 176 64
WIRE 320 64 208 64
WIRE 736 64 576 64
WIRE 128 96 128 64
WIRE 368 96 368 64
WIRE 784 96 784 64
WIRE 128 160 128 144
WIRE 208 160 208 64
WIRE 208 160 128 160
WIRE 368 192 368 144
WIRE 576 192 576 64
WIRE 576 192 368 192
WIRE 128 240 128 160
WIRE 368 240 368 192
WIRE 784 272 784 144
WIRE 1024 272 784 272
WIRE 80 320 48 320
WIRE 128 320 128 288
WIRE 368 320 368 288
WIRE 448 320 416 320
WIRE 128 352 128 336
WIRE 256 352 128 352
WIRE 368 352 368 336
WIRE 368 352 256 352
WIRE -304 384 -304 240
WIRE -240 384 -304 384
WIRE -304 400 -304 384
WIRE 256 400 256 352
WIRE 784 400 784 272
WIRE -304 480 -304 448
WIRE -240 480 -240 384
WIRE -240 480 -256 480
WIRE 192 480 -240 480
WIRE 208 480 192 480
WIRE 256 480 256 448
WIRE 784 480 784 448
WIRE 192 528 192 480
WIRE 736 528 736 480
WIRE 736 528 192 528
WIRE -304 592 -304 496
WIRE 256 592 256 496
WIRE 256 592 -304 592
WIRE 784 592 784 496
WIRE 784 592 256 592
WIRE 1024 592 784 592
IOPIN -208 16 In
IOPIN 48 320 In
IOPIN 448 320 In
IOPIN 1024 272 Out
IOPIN -304 240 In
IOPIN 1024 592 In
RECTANGLE Normal -176 656 -384 176 2
RECTANGLE Normal 528 656 -16 -16 2
RECTANGLE Normal 960 656 672 -16 2
SYMBOL nmos4 80 240 R0
SYMATTR InstName M1
SYMATTR Value2 l=1 w=16
SYMBOL pmos4 176 144 R180
SYMATTR InstName M3
SYMATTR Value2 l=1 w=64
SYMBOL nmos4 208 400 R0
SYMATTR InstName M0
SYMATTR Value2 l=1 w=32
SYMBOL pmos4 736 144 M180
SYMATTR InstName M5
SYMATTR Value2 l=1 w=640
SYMBOL pmos4 320 144 M180
SYMATTR InstName M4
SYMATTR Value2 l=1 w=64
SYMBOL nmos4 416 240 M0
SYMATTR InstName M2
SYMATTR Value2 l=1 w=16
SYMBOL nmos4 -256 400 M0
SYMATTR InstName M00
SYMATTR Value2 l=1 w=4
SYMBOL nmos4 736 400 R0
SYMATTR InstName M6
SYMATTR Value2 l=1 w=160
FLAG -208 16 VDD
FLAG 48 320 Vin
FLAG 448 320 Vip
FLAG 1024 272 Vout
FLAG -304 240 CURR
FLAG 1024 592 VSS
TEXT -856 208 Left 2 !.model nmos nmos(level = 1 kp=400u vt0=0.5 lambda=0.05)
TEXT -856 232 Left 2 !.model pmos pmos(level = 1 kp=100u vt0=-0.5 lambda=0.05)
TEXT -352 624 Left 2 ;Current Mirror for Biasing
TEXT 144 624 Left 2 ;Current Mirror loaded Differential Pair
TEXT 736 624 Left 2 ;Common Source Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\37bc6363bb6d_OP_AMP_Integrator.asc
* Generated by LTspice 26.0.1 for Windows.
* OP AMP INTEGRATOR
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
V3 N004 0 SINE(0 5 1k)
XU1 N005 N001 N003 N006 N002 LT1001 ;pnba In+)In-)V+)V-)OUT
R2 N002 N001 100k
R3 N005 0 10k
R4 0 N002 10k
C1 N002 N001 10n
R1 N001 N004 10k
V2 N003 0 12V
V1 0 N006 12V
.tran 0 10m 1m 0.01m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -176 32 -176
WIRE 368 -176 224 -176
WIRE 32 -64 32 -176
WIRE 160 -64 32 -64
WIRE 368 -64 368 -176
WIRE 368 -64 240 -64
WIRE 224 32 176 32
WIRE 320 32 304 32
WIRE 320 64 320 32
WIRE 176 112 176 32
WIRE -128 128 -176 128
WIRE 32 128 32 -64
WIRE 32 128 -48 128
WIRE 144 128 32 128
WIRE 368 144 368 -64
WIRE 368 144 208 144
WIRE 448 144 368 144
WIRE 144 160 32 160
WIRE 448 176 448 144
WIRE -176 192 -176 128
WIRE -80 192 -112 192
WIRE 32 192 32 160
WIRE 32 192 0 192
WIRE 176 224 176 176
WIRE -112 256 -112 192
WIRE 448 288 448 256
WIRE -176 304 -176 272
WIRE 176 336 176 304
SYMBOL res -32 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 176 320 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
SYMATTR Value 12V
SYMBOL res 464 272 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL voltage -176 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 5 1k)
SYMBOL cap 224 -192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 16 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 256 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL voltage 208 32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value 12V
SYMBOL OpAmps\\OP07 176 80 R0
SYMATTR InstName U1
FLAG 320 64 0
FLAG 176 336 0
FLAG 448 288 0
FLAG -112 256 0
FLAG -176 304 0
TEXT -240 40 Left 2 ;OP AMP INTEGRATOR
TEXT -144 344 Left 2 !.tran 0 10m 1m 0.01m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3525-5.asc
* Generated by LTspice 26.0.1 for Windows.
L1 IN N001 10
C1 OUT 0 10
V1 IN 0 1
R1 OUT 0 100
XU1 IN 0 IN OUT MP_01 N001 LTC3525-5 ;pnba _SHDN)GND)Vin)Vout))SW
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3525-5.asy)
.lib LTC3525-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 64 0 64
WIRE 320 64 192 64
WIRE 0 160 0 64
WIRE 0 160 -112 160
WIRE 32 160 0 160
WIRE 320 160 320 64
WIRE 320 160 288 160
WIRE -112 176 -112 160
WIRE -112 272 -112 256
WIRE 0 304 0 160
WIRE 32 304 0 304
WIRE 320 304 288 304
WIRE 416 304 320 304
WIRE 320 320 320 304
WIRE 416 320 416 304
WIRE 160 384 160 368
WIRE 320 416 320 384
WIRE 416 416 416 400
FLAG 320 416 0
FLAG 160 384 0
FLAG -112 272 0
FLAG 416 416 0
FLAG -112 160 IN
FLAG 416 304 OUT
SYMBOL ind 96 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL cap 304 320 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage -112 160 R0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL res 400 304 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL PowerProducts\\LTC3525-5 160 208 R0
SYMATTR InstName U1
TEXT 72 464 Left 2 !.tran 2m startup