Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\185ffd058f9b_lo.asc
* Generated by LTspice 26.0.1 for Windows.
A1 N002 0 N006 0 0 0 N003 0 DFLOP
A2 N003 0 N006 0 0 N002 N004 0 DFLOP
V4 N001 0 5
R13 N001 N006 560K
V5 N005 0 SINE(0 3 1 20m 20m 980m 0)
C7 N006 N005 0.1
R15 N006 0 220K
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3044 748
WIRE 2192 -304 2016 -304
WIRE 2448 -304 2368 -304
WIRE 2016 -256 2016 -304
WIRE 2368 -256 2368 -304
WIRE 2448 -256 2448 -304
WIRE 2864 -256 2448 -256
WIRE 2448 -192 2448 -256
WIRE 2864 -192 2864 -256
WIRE 2192 -176 2192 -304
WIRE 2016 -144 2016 -176
WIRE 2368 -144 2320 -144
WIRE 2672 -144 2672 -336
WIRE 2672 -144 2528 -144
WIRE 2784 -144 2672 -144
WIRE 3008 -144 3008 -336
WIRE 3008 -144 2944 -144
WIRE 2080 -96 2016 -96
WIRE 2192 -96 2144 -96
WIRE 2288 -96 2192 -96
WIRE 2368 -96 2288 -96
WIRE 2784 -96 2672 -96
WIRE 3008 -96 2960 -96
WIRE 2016 -48 2016 -96
WIRE 2448 -32 2448 -48
WIRE 2864 -32 2864 -48
WIRE 2864 -32 2448 -32
WIRE 2448 0 2448 -32
WIRE 2016 80 2016 32
WIRE 2320 80 2320 -144
WIRE 3008 80 3008 -96
WIRE 3008 80 2320 80
WIRE 2288 128 2288 -96
WIRE 2672 128 2672 -96
WIRE 2672 128 2288 128
SYMBOL Digital\\dflop 2448 -192 R0
SYMATTR InstName A1
SYMBOL voltage 2016 -64 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value SINE(0 3 1 20m 20m 980m 0)
SYMBOL cap 2144 -112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C7
SYMATTR Value 0.1
SYMBOL Digital\\dflop 2864 -192 R0
SYMATTR InstName A2
SYMBOL voltage 2016 -272 R0
WINDOW 3 24 44 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL res 2176 -192 R0
SYMATTR InstName R13
SYMATTR Value 560K
SYMBOL res 2176 -112 R0
SYMATTR InstName R15
SYMATTR Value 220K
FLAG 2016 80 0
FLAG 2368 -256 0
FLAG 2448 0 0
FLAG 2192 -16 0
FLAG 2016 -144 0
* Z:\home\khalils\Downloads\files\data\raw_asc\2972aeceaa67_1540.asc
* Generated by LTspice 26.0.1 for Windows.
* Nanopower 2.9V Vcc Threshold Detector
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1540.asy)
V1 +V 0 PWL(0 0 1 3.3)
R2 N001 0 3Meg
R1 +V N001 4.32Meg
XU1 0 0 N001 N002 N002 N002 +V OUT LTC1540 ;pnba GND)V-)In+)In-)HYST)REF)V+)OUT
.tran 1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1144 800
WIRE 320 80 96 80
WIRE 576 80 320 80
WIRE 320 96 320 80
WIRE 96 128 96 80
WIRE 576 144 576 80
WIRE 320 192 320 176
WIRE 480 192 320 192
WIRE 320 208 320 192
WIRE 688 208 640 208
WIRE 480 224 512 192
WIRE 512 224 480 192
WIRE 96 240 96 208
WIRE 480 256 480 224
WIRE 512 256 480 256
WIRE 480 288 480 256
WIRE 512 288 480 288
WIRE 320 304 320 288
WIRE 544 368 544 336
WIRE 608 368 608 336
SYMBOL Comparators\\LTC1540 576 144 R0
SYMATTR InstName U1
SYMBOL res 304 80 R0
SYMATTR InstName R1
SYMATTR Value 4.32Meg
SYMBOL voltage 96 112 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 3.3)
SYMBOL res 304 192 R0
SYMATTR InstName R2
SYMATTR Value 3Meg
FLAG 96 240 0
FLAG 576 80 +V
FLAG 544 368 0
FLAG 608 368 0
FLAG 320 304 0
FLAG 688 208 OUT
TEXT 696 264 Left 0 !.tran 1
TEXT 560 48 Bottom 0 ;Nanopower 2.9V Vcc Threshold Detector
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1761-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1761-1.2.asy)
C3 N002 0 1
C2 N003 0 10n
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1761 Radj=8K ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
C1 N004 0 1
R2 N001 IN 50K
V1 IN 0 1.4
R1 OUT 0 1.5
C4 OUT 0 10
.tran 1m startup
.lib ADP1761.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.4
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value 1.5
SYMBOL ADP1761-1.2 224 176 R0
SYMATTR InstName U1
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\tmp\asc_dec_bjh7r6w2\133db7b0177f_ts12_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R5 N001 N004 {39/32}
R1 N003 N004 100
XU1 N001 N003 N004 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 680
WIRE 512 80 208 80
WIRE 704 80 512 80
WIRE 832 80 704 80
WIRE 1024 80 832 80
WIRE 704 96 704 80
WIRE 832 96 832 80
WIRE 336 144 320 144
WIRE 432 144 416 144
WIRE 480 144 432 144
WIRE 480 176 480 144
WIRE 512 176 512 80
WIRE 432 192 432 144
WIRE 320 208 320 144
WIRE 320 208 208 208
WIRE 704 208 704 176
WIRE 704 208 624 208
WIRE 832 208 832 160
WIRE 832 208 704 208
WIRE 1024 208 832 208
WIRE 432 336 432 272
WIRE 496 336 496 240
WIRE 496 336 432 336
WIRE 624 336 624 208
WIRE 624 336 496 336
SYMBOL res 688 80 R0
SYMATTR InstName R5
SYMATTR Value {39/32}
SYMBOL res 416 176 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL OpAmps\\opamp 560 208 R90
SYMATTR InstName U1
* Z:\home\khalils\Downloads\files\data\raw_asc\259c213434a0_single_ended_ltc_driver.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC2055.asy)
R1 N001 0 4.7k
V1 vin 0 0 AC 1 0
R2 N002 N001 6.2k
C2 0 N002 2.2n
V3 0 -5 6
XU1 N002 vout vout +5 -5 LTC2054 ;pnba IN+)IN-)OUT)VCC)VEE
C1 vout N001 1n
R3 vin N001 10K
V2 +5 0 6
.ac oct 10 10 20000
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 940 680
WIRE 240 -32 112 -32
WIRE 512 -32 304 -32
WIRE 752 48 752 -96
WIRE 512 80 512 -32
WIRE 512 80 256 80
WIRE 432 176 336 176
WIRE 448 176 432 176
WIRE 752 208 752 128
WIRE 336 224 336 176
WIRE 256 240 256 80
WIRE 304 240 256 240
WIRE 496 256 368 256
WIRE 512 256 512 80
WIRE 512 256 496 256
WIRE 0 272 -160 272
WIRE 112 272 112 -32
WIRE 112 272 80 272
WIRE 160 272 112 272
WIRE 288 272 240 272
WIRE 304 272 288 272
WIRE 112 352 112 272
WIRE 336 352 336 288
WIRE 448 352 336 352
WIRE -160 368 -160 272
WIRE 752 368 752 272
WIRE 288 416 288 272
WIRE -160 528 -160 448
WIRE 112 528 112 432
WIRE 288 528 288 480
WIRE 752 528 752 448
SYMBOL res 256 256 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 6.2k
SYMBOL Opamps\\LTC2055 336 256 R0
SYMATTR InstName U1
SYMBOL Misc\\signal 752 144 R180
WINDOW 0 24 104 Left 0
WINDOW 3 24 16 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 6
SYMBOL Misc\\signal 752 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 6
SYMBOL res 96 336 R0
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL voltage -160 352 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1 0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL cap 304 480 R180
WINDOW 0 24 64 Left 0
WINDOW 3 24 8 Left 0
SYMATTR InstName C2
SYMATTR Value 2.2n
SYMBOL cap 304 -48 R90
WINDOW 0 -1 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res -16 288 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R3
SYMATTR Value 10K
FLAG 112 528 0
FLAG 288 528 0
FLAG -160 528 0
FLAG 752 528 0
FLAG 752 208 0
FLAG 752 272 +5
FLAG 432 176 +5
FLAG 752 -96 -5
FLAG 448 352 -5
FLAG -160 272 vin
FLAG 496 256 vout
TEXT -192 552 Left 0 !.ac oct 10 10 20000
* Z:\home\khalils\Downloads\files\data\raw_asc\cf2a95dfa53d_AND.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N003 N002 N005 0 C5NNMOS l=0.6u w=3.6u
M3 N001 N002 N003 N001 C5NPMOS l=0.6u w=7.2u
M6 Vout N003 0 0 C5NNMOS l=0.6u w=3.6u
VB N004 0 PULSE(0 5 0 1n 1n 10u 20u)
V1 N001 0 5
M2 N005 N004 0 0 C5NNMOS l=0.6u w=3.6u
M5 N001 N003 Vout N001 C5NPMOS l=0.6u w=7.2u
M4 N001 N004 N003 N001 C5NPMOS l=0.6u w=7.2u
VA N002 0 PULSE(0 5 0 1n 1n 5u 10u)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include D:\NIELIT\ENGR3426\ENGR3426\engr3426.sub
.tran 100u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1200 680
WIRE 672 -160 256 -160
WIRE 896 -160 672 -160
WIRE 1040 -160 896 -160
WIRE 672 -112 672 -160
WIRE 160 -64 48 -64
WIRE 256 -64 256 -160
WIRE 256 -64 160 -64
WIRE 416 -64 256 -64
WIRE 512 -64 416 -64
WIRE 672 0 672 -32
WIRE 48 32 48 -64
WIRE 416 32 416 -64
WIRE 896 48 896 -160
WIRE 160 80 160 -64
WIRE 160 80 48 80
WIRE 512 80 512 -64
WIRE 512 80 416 80
WIRE 1040 96 1040 -160
WIRE 1040 96 896 96
WIRE -64 112 -496 112
WIRE 0 112 -64 112
WIRE 848 128 704 128
WIRE -112 144 -272 144
WIRE 368 144 368 112
WIRE 368 144 -112 144
WIRE -496 192 -496 112
WIRE -272 192 -272 144
WIRE 896 192 896 144
WIRE 1088 192 896 192
WIRE 48 208 48 128
WIRE 160 208 48 208
WIRE 416 208 416 128
WIRE 416 208 160 208
WIRE 896 224 896 192
WIRE 160 256 160 208
WIRE 704 256 704 128
WIRE 704 256 160 256
WIRE 160 272 160 256
WIRE 1056 272 896 272
WIRE 704 304 704 256
WIRE 848 304 704 304
WIRE -496 320 -496 272
WIRE -272 320 -272 272
WIRE 288 320 160 320
WIRE -64 352 -64 112
WIRE 112 352 -64 352
WIRE 160 416 160 368
WIRE 288 464 288 320
WIRE 288 464 160 464
WIRE -112 496 -112 144
WIRE 112 496 -112 496
WIRE 288 512 288 464
WIRE 288 512 160 512
WIRE 896 512 896 320
WIRE 896 512 288 512
WIRE 1056 512 1056 272
WIRE 1056 512 896 512
WIRE 160 544 160 512
IOPIN 1088 192 Out
SYMBOL nmos4 112 416 R0
SYMATTR InstName M2
SYMATTR Value C5NNMOS
SYMATTR Value2 l=0.6u w=3.6u
SYMBOL nmos4 112 272 R0
SYMATTR InstName M1
SYMATTR Value C5NNMOS
SYMATTR Value2 l=0.6u w=3.6u
SYMBOL pmos4 0 32 R0
SYMATTR InstName M3
SYMATTR Value C5NPMOS
SYMATTR Value2 l=0.6u w=7.2u
SYMBOL voltage -272 176 R0
WINDOW 3 -99 191 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value PULSE(0 5 0 1n 1n 10u 20u)
SYMBOL voltage -496 176 R0
WINDOW 3 -238 189 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VA
SYMATTR Value PULSE(0 5 0 1n 1n 5u 10u)
SYMBOL nmos4 848 224 R0
SYMATTR InstName M6
SYMATTR Value C5NNMOS
SYMATTR Value2 l=0.6u w=3.6u
SYMBOL voltage 672 -128 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL pmos4 848 48 R0
SYMATTR InstName M5
SYMATTR Value C5NPMOS
SYMATTR Value2 l=0.6u w=7.2u
SYMBOL pmos4 368 32 R0
SYMATTR InstName M4
SYMATTR Value C5NPMOS
SYMATTR Value2 l=0.6u w=7.2u
FLAG -496 320 0
FLAG -272 320 0
FLAG 672 0 0
FLAG 160 544 0
FLAG 1088 192 Vout
TEXT -760 544 Left 2 !.include D:\\NIELIT\\ENGR3426\\ENGR3426\\engr3426.sub
TEXT -760 568 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7172-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N001 0 1n
V1 IN 0 3.8
Rload OUT 0 3
C1 OUT 0 4.7 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADM7172-3.3 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7172-3.3.asy)
.lib ADM7172-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
SYMBOL cap 80 240 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.8
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 3
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADM7172-3.3 224 128 R0
SYMATTR InstName U1
TEXT 408 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2119-1.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2119-1.0.asy)
Rload OUT 0 1
L1 N002 OUT 1
XU1 IN IN N002 0 0 OUT IN N001 IN IN ADP2119-1.0 ;pnba Vin)Pvin)SW)PGND)GND)FB)TRK)Pgood)Sync/Mode)EN
C1 OUT 0 22
V1 IN 0 5
C2 OUT 0 22
R1 OUT N001 100K
.tran 1m
.lib ADP2119-1.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 0 64 0
WIRE 288 0 128 0
WIRE 64 16 64 0
WIRE 288 32 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 624 64 576 64
WIRE 64 112 64 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 624 144 624 64
WIRE 624 144 560 144
WIRE 688 144 624 144
WIRE 736 144 688 144
WIRE 560 160 560 144
WIRE 624 160 624 144
WIRE 736 160 736 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 624 224 560 224
WIRE 560 256 560 224
WIRE 736 256 736 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 688 304 688 144
WIRE 688 304 416 304
WIRE 288 368 288 352
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL ADP2119-1.0 288 272 R0
SYMATTR InstName U1
SYMBOL voltage 64 0 R0
WINDOW 0 27 27 Left 2
WINDOW 3 29 88 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 720 144 R0
WINDOW 3 34 68 Left 2
SYMATTR Value 1
SYMATTR InstName Rload
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 608 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C2
SYMATTR Value 22
FLAG 560 256 0
FLAG 288 368 0
FLAG 64 112 0
FLAG 736 144 OUT
FLAG 736 256 0
FLAG 64 0 IN
TEXT 504 344 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\4c9f7df0b0fe_Fig1_17.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vin Vd 1k
Vin Vin 0 1
D1 Vd 0 mydiode
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc Vin 0 1
.model mydiode D
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 48 224 0 224
WIRE 112 224 48 224
WIRE 256 224 192 224
WIRE 288 224 256 224
WIRE 0 240 0 224
WIRE 288 240 288 224
WIRE 0 336 0 320
WIRE 288 336 288 304
SYMBOL diode 272 240 R0
SYMATTR InstName D1
SYMATTR Value mydiode
SYMBOL res 96 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 0 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 1
FLAG 0 336 0
FLAG 288 336 0
FLAG 256 224 Vd
FLAG 48 224 Vin
TEXT 40 400 Left 0 !.dc Vin 0 1
TEXT 40 376 Left 0 !.model mydiode D
* Z:\home\khalils\Downloads\files\data\raw_asc\0ad3a1bba5f2_current_mirror_model_nmos.asc
* Generated by LTspice 26.0.1 for Windows.
;.step param wn 1u 70u 1u
M1 vgs vgs 0 0 NMOS l=0.36u w=10u
vgs vgs 0 0.6
vdd vdd 0 0.6
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.op
.include tsmc180.txt
.param wn=1
.dc vgs 0 0.9 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 80 16 16
WIRE 112 96 112 16
WIRE 288 144 288 0
WIRE 16 192 16 160
WIRE 288 192 240 192
WIRE 112 208 112 176
WIRE 368 224 368 128
WIRE 368 224 336 224
WIRE 240 256 240 192
WIRE 288 256 288 240
WIRE 288 256 240 256
WIRE 288 320 288 256
SYMBOL voltage 112 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vgs
SYMATTR Value 0.6
SYMBOL nmos4 336 144 M0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=0.36u w=10u
SYMATTR InstName M1
SYMBOL voltage 16 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vdd
SYMATTR Value 0.6
FLAG 288 320 0
FLAG 16 192 0
FLAG 112 208 0
FLAG 16 16 vdd
FLAG 368 128 vgs
FLAG 112 16 vgs
FLAG 288 0 vgs
TEXT -16 264 Left 2 !.op
TEXT -336 -40 Left 2 !.include tsmc180.txt
TEXT -352 80 Left 2 !;.step param wn 1u 70u 1u\n.param wn=1
TEXT -336 144 Left 2 !.dc vgs 0 0.9 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\2eca3403a9c4_1997-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain = 10 Difference Amplifier
* V(out) = 1mV/mA in RL
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1997-1.asy)
V2 V- 0 -15
Vs N002 0 0
XU1 N003 MP_01 NC_02 MP_03 NC_04 0 0 V- OUT NC_05 V+ NC_06 MP_07 NC_08 MP_09 N001 LT1997-1 ;pnba +INA))+INB))+INC)REF1)REF2)V-)OUT)_SHDN)V+)-INC))-INB))-INA
RL N001 0 10
V1 V+ 0 15
R1 N002 N001 .1
R2 N003 N002 1
.dc Vs 0 26.5 10m
.lib LT1997-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1116 932
WIRE 48 48 -16 48
WIRE -272 80 -432 80
WIRE 48 80 48 48
WIRE 400 80 400 48
WIRE -432 96 -432 80
WIRE -272 160 -272 80
WIRE -208 160 -272 160
WIRE -16 160 -16 48
WIRE -16 160 -144 160
WIRE -432 192 -432 176
WIRE 544 208 496 208
WIRE -208 240 -144 160
WIRE -208 240 -272 240
WIRE -144 240 -208 160
WIRE -128 240 -144 240
WIRE -16 240 -48 240
WIRE -272 256 -272 240
WIRE 544 256 496 256
WIRE 544 288 544 256
WIRE 544 288 496 288
WIRE -528 304 -528 288
WIRE -400 304 -400 288
WIRE 544 304 544 288
WIRE -272 352 -272 336
WIRE -16 368 -16 240
WIRE 48 368 48 336
WIRE 48 368 -16 368
WIRE 400 384 400 336
WIRE -528 400 -528 384
WIRE -400 400 -400 384
SYMBOL res -288 144 R0
SYMATTR InstName R1
SYMATTR Value .1
SYMBOL res -32 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL voltage -432 80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vs
SYMATTR Value 0
SYMBOL voltage -528 288 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res -288 240 R0
SYMATTR InstName RL
SYMATTR Value 10
SYMBOL voltage -400 288 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL LT1997-1 272 208 R0
SYMATTR InstName U1
FLAG -528 400 0
FLAG -400 400 0
FLAG -528 288 V+
FLAG -400 288 V-
FLAG 400 48 V+
FLAG 400 384 V-
FLAG 544 304 0
FLAG -272 352 0
FLAG 544 208 OUT
FLAG -432 192 0
TEXT 584 400 Left 2 !.dc Vs 0 26.5 10m
TEXT 80 0 Bottom 2 ;Gain = 10 Difference Amplifier
TEXT 544 144 Left 2 ;V(out) = 1mV/mA in RL
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL40502-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL40502-1.8.asy)
V1 vIN 0 2.3
Rload vOUT 0 9
XU1 vIN 0 vIN vOUT ADPL40502-1.8 ;pnba Vin)GND)EN)Vout
C1 vOUT 0 1 Rser=1m
.tran 1m startup
.lib ADPL40502-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2808 1464
WIRE 1824 880 1728 880
WIRE 1984 880 1824 880
WIRE 1728 896 1728 880
WIRE 1984 896 1984 880
WIRE 1728 992 1728 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL ADPL40502-1.8 1984 1024 R0
SYMATTR InstName U1
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMATTR SpiceLine Rser=1m
SYMBOL VOLTAGE 1728 880 R0
SYMATTR InstName V1
SYMATTR Value 2.3
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 9
FLAG 2256 1024 vOUT
FLAG 2256 1136 0
FLAG 1728 992 0
FLAG 1728 880 vIN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1930.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1930.asy)
V1 IN 0 5
R1 OUT N002 113K
L1 IN N001 10 Rser=0.182
R2 N002 0 13.3K
XU1 N001 0 N002 IN IN LT1930 ;pnba SW)GND)FB)_SHDN)Vin
C2 OUT 0 4.7 Rser=.05
Rload OUT 0 50
D1 N001 OUT MBRS130L
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LT1930.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1376 984
WIRE 384 480 288 480
WIRE 512 480 384 480
WIRE 560 480 512 480
WIRE 672 480 640 480
WIRE 768 480 672 480
WIRE 912 480 832 480
WIRE 1024 480 912 480
WIRE 1136 480 1024 480
WIRE 288 496 288 480
WIRE 1024 496 1024 480
WIRE 1136 496 1136 480
WIRE 912 512 912 480
WIRE 512 560 512 480
WIRE 672 560 672 480
WIRE 288 592 288 576
WIRE 1024 592 1024 560
WIRE 1136 592 1136 576
WIRE 384 656 384 480
WIRE 432 656 384 656
WIRE 912 656 912 592
WIRE 912 656 752 656
WIRE 912 672 912 656
WIRE 592 768 592 752
WIRE 912 768 912 752
SYMBOL POWERPRODUCTS\\LT1930 592 656 R0
WINDOW 0 0 -120 Center 2
WINDOW 3 32 120 Left 2
SYMATTR InstName U1
SYMBOL RES 896 656 R0
SYMATTR InstName R2
SYMATTR Value 13.3K
SYMBOL schottky 768 496 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS130L
SYMBOL RES 896 496 R0
SYMATTR InstName R1
SYMATTR Value 113K
SYMBOL VOLTAGE 288 480 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 1120 480 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL IND 544 496 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=0.182
SYMBOL POLCAP 1008 496 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=.05
FLAG 1136 480 OUT
FLAG 912 768 0
FLAG 1024 592 0
FLAG 1136 592 0
FLAG 592 768 0
FLAG 288 592 0
FLAG 288 480 IN
TEXT 952 832 Left 2 !.tran 500u startup