Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\100ec9b23e07_Pre-charge_FET.asc
* Generated by LTspice 26.0.1 for Windows.
* Battery simulation\nInternal resistance: ~100mOhm per cell, *10/2 (because 10S2P) = 500mOhm
* Pre-charge FET
* Analysis Setup\n1000ms simulation in 1ms increments
* 15V Linear regulator
* System Load
* Operating point:\nCurrent draw (battery engaged): 15uA\nCurrent draw (battery not engaged): 0
V2 15VO 0 15
R5 SYSTEM_GND Vd 1k
R_SYSTEM CELL_10_POS SYSTEM_GND 10
V3 PRECHG_FET_EN 0 PWL(0 0 .005 0 .0051 15 .05 15 .0501 0)
R4 PRECHG_FET_EN 0 1Meg
M2 Vd PRECHG_FET_EN 0 0 BSS123
V1 CELL_10_POS 0 30 Rser=500m
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m 150m uic
.step param R5 list 100 1k 2k 5k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 5144 2508
WIRE 352 416 112 416
WIRE 112 560 112 416
WIRE 1216 656 1072 656
WIRE 112 720 112 640
WIRE 224 720 112 720
WIRE 224 736 224 720
WIRE 1072 768 1072 656
WIRE 112 800 112 720
WIRE 352 800 112 800
WIRE 3024 928 2896 928
WIRE 1072 1024 1072 848
WIRE 1216 1024 1072 1024
WIRE 3024 1104 3024 928
WIRE 464 1216 176 1216
WIRE 1488 1232 1296 1232
WIRE 1664 1232 1488 1232
WIRE 1488 1312 1488 1232
WIRE 176 1360 176 1216
WIRE 3024 1376 3024 1184
WIRE 3024 1376 2896 1376
WIRE 1664 1472 1664 1232
WIRE 1488 1520 1488 1392
WIRE 1488 1520 1296 1520
WIRE 1648 1520 1488 1520
WIRE 1792 1520 1744 1520
WIRE 1872 1520 1792 1520
WIRE 2144 1520 1952 1520
WIRE 176 1584 176 1440
WIRE 464 1584 176 1584
DATAFLAG 1488 1232 "$"
RECTANGLE Normal 60 1088 996 1644 2
RECTANGLE Normal 1068 1084 2372 1648 2
RECTANGLE Normal 40 872 564 1064 2
RECTANGLE Normal 32 300 592 832 2
RECTANGLE Normal 2580 824 3200 1448 2
SYMBOL battery 176 1344 R0
SYMATTR InstName V1
SYMATTR Value 30
SYMATTR SpiceLine Rser=500m
SYMBOL res 3008 1088 R0
SYMATTR InstName R_SYSTEM
SYMATTR Value 10
SYMBOL res 1472 1296 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL res 1968 1504 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL voltage 1072 752 R0
SYMATTR InstName V3
SYMATTR Value PWL(0 0 .005 0 .0051 15 .05 15 .0501 0)
SYMBOL nmos 1744 1472 R90
SYMATTR InstName M2
SYMATTR Value BSS123
SYMBOL voltage 112 544 R0
SYMATTR InstName V2
SYMATTR Value 15
FLAG 1296 1520 BMS_GND
FLAG 1296 1232 PRECHG_FET_EN
FLAG 2144 1520 SYSTEM_GND
FLAG 464 1216 CELL_10_POS
FLAG 464 1584 BMS_GND
FLAG 352 416 15VO
FLAG 352 800 BMS_GND
FLAG 1216 656 PRECHG_FET_EN
FLAG 1216 1024 BMS_GND
FLAG 2896 1376 SYSTEM_GND
FLAG 2896 928 CELL_10_POS
FLAG 224 736 0
FLAG 1792 1520 Vd
TEXT 88 968 Left 2 !.tran 1m 150m uic
TEXT 88 1128 Left 2 ;Battery simulation\nInternal resistance: ~100mOhm per cell, *10/2 (because 10S2P) = 500mOhm
TEXT 1120 1120 Left 2 ;Pre-charge FET
TEXT 80 888 Left 2 ;Analysis Setup\n1000ms simulation in 1ms increments
TEXT 72 336 Left 2 ;15V Linear regulator
TEXT 2616 848 Left 2 ;System Load
TEXT 1864 1392 Left 2 !.step param R5 list 100 1k 2k 5k
TEXT 1800 600 Left 2 ;Operating point:\nCurrent draw (battery engaged): 15uA\nCurrent draw (battery not engaged): 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ad1b261ca2c9_Output_LP_Filter.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 AC 1 Rser=50
R1 S21 0 50
C1 N001 0 180p
L3 N003 S21 738n
C2 N002 0 390p
L2 N002 N003 866n
C4 S21 0 180p
C3 N003 0 390p
L1 N001 N002 738n
.ac dec 50 100k 100Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 176 -304 176
WIRE -64 176 -112 176
WIRE 48 176 16 176
WIRE 96 176 48 176
WIRE 208 176 176 176
WIRE 240 176 208 176
WIRE 352 176 320 176
WIRE 432 176 352 176
WIRE -112 192 -112 176
WIRE 48 192 48 176
WIRE 208 192 208 176
WIRE 352 192 352 176
WIRE -304 208 -304 176
SYMBOL cap -128 192 R0
SYMATTR InstName C1
SYMATTR Value 180p
SYMBOL cap 192 192 R0
SYMATTR InstName C3
SYMATTR Value 390p
SYMBOL Misc\\signal -304 192 R0
WINDOW 123 24 132 Left 0
WINDOW 39 24 160 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMATTR SpiceLine Rser=50
SYMBOL ind -80 192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
SYMATTR InstName L1
SYMATTR Value 738n
SYMBOL ind 80 192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
SYMATTR InstName L2
SYMATTR Value 866n
SYMBOL cap 336 192 R0
SYMATTR InstName C4
SYMATTR Value 180p
SYMBOL ind 224 192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
SYMATTR InstName L3
SYMATTR Value 738n
SYMBOL res 416 160 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL cap 32 192 R0
SYMATTR InstName C2
SYMATTR Value 390p
FLAG -112 256 0
FLAG 48 256 0
FLAG 208 256 0
FLAG 352 256 0
FLAG 432 256 0
FLAG -304 288 0
FLAG 432 176 S21
TEXT -338 506 Left 0 !.ac dec 50 100k 100Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2118-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2118-1.5.asy)
L1 N002 OUT 1
V1 IN 0 5
XU1 IN IN IN OUT 0 0 N002 IN IN IN N001 ADP2118-x.x Rtop=600k Rbot=400k Ctop=4p ;pnba Sync/Mode)FREQ)TRK)FB)GND)PGND)SW)Pvin)Vin)EN)Pgood
R1 OUT N001 100K
C1 OUT 0 100
Rload OUT 0 .5
.tran 2m startup
.lib ADP2118-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1104 680
WIRE 128 0 48 0
WIRE 288 0 128 0
WIRE 48 16 48 0
WIRE 288 32 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 640 64 576 64
WIRE 48 112 48 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 640 144 640 64
WIRE 640 144 560 144
WIRE 704 144 640 144
WIRE 560 160 560 144
WIRE 704 160 704 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 560 256 560 224
WIRE 704 256 704 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 640 304 640 144
WIRE 640 304 416 304
WIRE 128 384 128 304
WIRE 160 384 128 384
WIRE 288 432 288 416
SYMBOL voltage 48 0 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 100
SYMBOL ADP2118-1.5 288 272 R0
SYMATTR InstName U1
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL res 688 144 R0
SYMATTR InstName Rload
SYMATTR Value .5
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
FLAG 560 256 0
FLAG 288 432 0
FLAG 48 112 0
FLAG 704 144 OUT
FLAG 704 256 0
FLAG 48 0 IN
TEXT 512 384 Left 2 !.tran 2m startup
* Z:\tmp\asc_dec_bjh7r6w2\05217138f05a_eje2_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N001 N004 7.797e-09 Rser=0
C2 N003 N005 30p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 -48 -272 -48
WIRE -16 -48 -112 -48
WIRE 112 -48 -16 -48
WIRE 240 -48 192 -48
WIRE 352 -48 320 -48
WIRE -16 -32 -16 -48
WIRE 352 -16 352 -48
WIRE -112 16 -112 -48
WIRE -16 64 -16 32
WIRE 352 64 352 48
WIRE -112 160 -112 96
WIRE -112 160 -272 160
WIRE -16 160 -16 144
WIRE -16 160 -112 160
WIRE 352 160 352 144
WIRE 352 160 -16 160
SYMBOL cap -32 -32 R0
SYMATTR InstName C1
SYMATTR Value 7.797e-09
SYMATTR SpiceLine Rser=0
SYMBOL cap 336 -16 R0
SYMATTR InstName C2
SYMATTR Value 30p
FLAG 352 160 0
* Z:\home\khalils\Downloads\files\data\raw_asc\0c49282991cf_halfadder.asc
* Generated by LTspice 26.0.1 for Windows.
AX1 0 0 0 0 0 0 0 0 XOR
AX2 0 0 0 0 0 0 Vss 0 AND
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 240 80 240
WIRE 112 240 96 240
WIRE 96 256 96 240
WIRE 48 272 16 272
WIRE 176 288 144 288
WIRE 48 304 16 304
WIRE 96 336 96 320
WIRE 96 336 80 336
WIRE 112 336 96 336
WIRE 96 352 80 336
WIRE 96 352 112 336
WIRE 96 416 80 416
WIRE 112 416 96 416
WIRE 96 432 96 416
WIRE 64 448 32 448
WIRE 176 464 144 464
WIRE 64 480 32 480
WIRE 96 512 96 496
WIRE 96 512 80 512
WIRE 112 512 96 512
WIRE 96 528 80 512
WIRE 96 528 112 512
IOPIN 16 272 In
IOPIN 16 304 In
IOPIN 176 288 Out
IOPIN 32 448 In
IOPIN 32 480 In
IOPIN 176 464 Out
SYMBOL and 64 464 R0
SYMATTR InstName X2
SYMBOL xor 48 288 R0
SYMATTR InstName X1
FLAG 16 272 A
FLAG 16 304 B
FLAG 176 288 Y0
FLAG 96 240 Vdd
FLAG 96 336 Vss
FLAG 96 416 Vdd
FLAG 96 512 Vss
FLAG 32 448 A
FLAG 32 480 B
FLAG 176 464 Y1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1723.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 -V 0 -5
R1 N002 N001 2K
R2 N001 IN 750
V3 IN 0 SINE(0 1 1Meg)
C1 N002 N001 5p
R3 N004 N003 2K
R4 N003 IN 2K
C2 N004 N003 5p
R5 IN 0 72
R6 N002 OUT+ 62.5
R7 N004 OUT- 62.5
XU1 IN N001 +V -V N002 LT1722 ;pnba In+)In-)V+)V-)OUT
XU2 0 N003 +V -V N004 LT1722 ;pnba In+)In-)V+)V-)OUT
.tran 3u
* Differential Video Line Driver
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1723.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 744
WIRE 176 0 128 0
WIRE 256 0 240 0
WIRE 32 96 16 96
WIRE 128 96 128 0
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 256 0
WIRE 256 96 224 96
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE -224 240 -224 224
WIRE -96 240 -96 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 320 240 256 240
WIRE 432 240 400 240
WIRE 16 256 16 96
WIRE 160 256 16 256
WIRE 192 288 192 272
WIRE -224 336 -224 320
WIRE -96 336 -96 320
WIRE 176 384 128 384
WIRE 256 384 240 384
WIRE 432 400 432 240
WIRE 512 400 432 400
WIRE 512 464 432 464
WIRE 16 480 16 256
WIRE 16 480 -256 480
WIRE 32 480 16 480
WIRE 128 480 128 384
WIRE 128 480 112 480
WIRE 144 480 128 480
WIRE 256 480 256 384
WIRE 256 480 224 480
WIRE -256 496 -256 480
WIRE 16 528 16 480
WIRE -256 592 -256 576
WIRE 192 592 192 576
WIRE 128 608 128 480
WIRE 160 608 128 608
WIRE 256 624 256 480
WIRE 256 624 224 624
WIRE 320 624 256 624
WIRE 432 624 432 464
WIRE 432 624 400 624
WIRE 16 640 16 608
WIRE 160 640 16 640
WIRE 16 656 16 640
WIRE 192 672 192 656
FLAG -96 336 0
FLAG 192 192 +V
FLAG -96 224 +V
FLAG 192 288 -V
FLAG -224 336 0
FLAG -224 224 -V
FLAG -256 592 0
FLAG 192 576 +V
FLAG 192 672 -V
FLAG 16 656 0
FLAG -256 480 IN
FLAG 512 400 OUT+
FLAG 512 464 OUT-
SYMBOL voltage -96 224 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -224 224 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 750
SYMBOL voltage -256 480 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1Meg)
SYMBOL cap 240 -16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 5p
SYMBOL res 240 464 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2K
SYMBOL res 128 464 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2K
SYMBOL cap 240 368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 5p
SYMBOL res 0 512 R0
SYMATTR InstName R5
SYMATTR Value 72
SYMBOL res 304 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R6
SYMATTR Value 62.5
SYMBOL res 304 640 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R7
SYMATTR Value 62.5
SYMBOL opamps\\LT1723 192 176 R0
SYMATTR InstName U1
SYMBOL opamps\\LT1723 192 560 R0
SYMATTR InstName U2
TEXT 504 576 Left 2 !.tran 3u
TEXT -8 -16 Bottom 2 ;Differential Video Line Driver
* Z:\home\khalils\Downloads\files\data\raw_asc\21f36681fd3f_LeakSensor.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N003 N002 N001 N001 AO6407
R1 N001 N002 27k
R2 N002 0 1k
V1 N001 0 3.3
R3 N003 0 100
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 -160 304 -160
WIRE 304 -128 304 -160
WIRE 416 -96 416 -160
WIRE 304 16 304 -48
WIRE 304 16 160 16
WIRE 160 48 160 16
WIRE 304 112 304 16
WIRE 256 128 160 128
WIRE 160 160 160 128
WIRE 160 256 160 240
WIRE 304 256 304 208
WIRE 400 256 304 256
FLAG 400 336 0
FLAG 416 -96 0
FLAG 160 256 0
SYMBOL pmos 256 208 M180
SYMATTR InstName M1
SYMATTR Value AO6407
SYMBOL res 144 32 R0
SYMATTR InstName R1
SYMATTR Value 27k
SYMBOL res 144 144 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 304 -32 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 384 240 R0
SYMATTR InstName R3
SYMATTR Value 100
TEXT -80 64 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\81e81c7a7f7b_Command_filter.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6011.asy)
;ac dec 1000 1 100k
R2 VoutC N001 80k
XU1 N004 N002 VoutC V+ V- LT6011 ;pnba IN+)IN-)OUT)VCC)VEE
R4 N004 0 10k
R1 N001 VinC 10k
C2 VoutC N002 1.5n
R5 N002 N001 10k
V3 V+ 0 15V
C1 N001 0 27n
V1 N003 0 2.5V
V2 VinC 0 SINE(1.25 2.5 1k) AC 1
V4 0 V- 15V
R3 N004 N003 80k
.noise V(VoutC) V2 dec 1000 1 100k
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -208 -384 -208 -416
WIRE -208 -288 -208 -304
WIRE -208 -288 -256 -288
WIRE -256 -272 -256 -288
WIRE -208 -256 -208 -288
WIRE -208 -160 -208 -176
WIRE 96 -96 -128 -96
WIRE 448 -96 96 -96
WIRE -128 -16 -128 -96
WIRE 96 -16 96 -96
WIRE -592 112 -656 112
WIRE -496 112 -592 112
WIRE -352 112 -416 112
WIRE -128 112 -128 64
WIRE -128 112 -352 112
WIRE -48 112 -128 112
WIRE 96 112 96 48
WIRE 96 112 32 112
WIRE 176 112 96 112
WIRE 448 144 448 -96
WIRE 448 144 320 144
WIRE 576 144 448 144
WIRE 624 144 576 144
WIRE -656 176 -656 112
WIRE -352 176 -352 112
WIRE -176 176 -256 176
WIRE 112 176 -96 176
WIRE 176 176 112 176
WIRE -256 208 -256 176
WIRE -48 256 -96 256
WIRE 112 256 112 176
WIRE 112 256 32 256
WIRE -656 304 -656 256
WIRE -352 304 -352 240
WIRE -256 304 -256 288
WIRE -96 304 -96 256
SYMBOL voltage -208 -400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15V
SYMBOL res 48 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL res -80 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 80k
SYMBOL voltage -256 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.5V
SYMBOL OpAmps\\LT6011 208 144 R0
SYMATTR InstName U1
SYMBOL res -144 -32 R0
SYMATTR InstName R2
SYMATTR Value 80k
SYMBOL res -400 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 48 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL cap 80 -16 R0
SYMATTR InstName C2
SYMATTR Value 1.5n
SYMBOL voltage -208 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 15V
SYMBOL cap -368 176 R0
SYMATTR InstName C1
SYMATTR Value 27n
SYMBOL voltage -656 160 R0
WINDOW 3 24 152 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(1.25 2.5 1k)
SYMATTR Value2 AC 1
FLAG -96 304 0
FLAG -352 304 0
FLAG -256 304 0
FLAG -656 304 0
FLAG 576 144 VoutC
FLAG -592 112 VinC
FLAG -208 -416 V+
FLAG -208 -160 V-
FLAG -256 -272 0
FLAG 208 64 V+
FLAG 208 224 V-
TEXT -570 -28 Left 2 !;ac dec 1000 1 100k
TEXT -690 332 Left 2 !.noise V(VoutC) V2 dec 1000 1 100k
* Z:\home\khalils\Downloads\files\data\raw_asc\dd740881bcab_ZenerStabilisator.asc
* Generated by LTspice 26.0.1 for Windows.
* Zener Diode Voltage Regulator
R2 N002 0 1
R1 N002 N001 1
D1 0 N002 UMZ5_1N
V1 N001 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 1 30 1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 48 80 -80 80
WIRE 304 80 128 80
WIRE 464 80 304 80
WIRE -80 144 -80 80
WIRE 304 208 304 80
WIRE 464 208 464 80
WIRE -80 320 -80 224
WIRE 304 320 304 272
WIRE 304 320 -80 320
WIRE 464 320 464 288
WIRE 464 320 304 320
WIRE -80 352 -80 320
SYMBOL voltage -80 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL diode 320 272 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value UMZ5_1N
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 448 192 R0
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL res 144 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
FLAG -80 352 0
TEXT -648 0 Left 2 ;Zener Diode Voltage Regulator
TEXT -648 376 Left 2 !.dc V1 1 30 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG451.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG451.asy)
V1 +V 0 15
R1 N002 0 1K
XU2 N003 N002 N001 -V 0 +V ADG451 ;pnba IN)D)S)Vss)GND)Vdd
V3 N001 0 SINE(0 10 1k)
V4 N003 0 pulse(0 3.3 0 1u 1u 5m 10m)
V2 -V 0 -15
.tran 30m
.lib ADG451.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -96
WIRE -528 -32 -528 -48
WIRE -368 0 -400 0
WIRE -240 0 -288 0
WIRE 0 0 -48 0
WIRE 0 16 0 0
WIRE -528 64 -528 48
WIRE -240 64 -336 64
WIRE 0 112 0 96
WIRE -528 160 -528 144
WIRE -336 160 -336 64
WIRE -208 192 -208 176
WIRE -80 192 -80 176
WIRE -528 256 -528 240
WIRE -336 256 -336 240
SYMBOL voltage -528 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL ADG451 -144 48 R0
SYMATTR InstName U2
SYMBOL voltage -336 144 R0
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMBOL voltage -272 0 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 10 1k)
SYMBOL voltage -528 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
FLAG -528 256 0
FLAG -528 64 0
FLAG -528 -48 +V
FLAG -528 144 -V
FLAG -400 0 0
FLAG -208 192 -V
FLAG -144 -96 +V
FLAG -80 192 0
FLAG -336 256 0
FLAG 0 112 0
TEXT 16 176 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\27b18d542cab_I_sense_hi_V_concept_02.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp1.asy)
I1 0 N003 SINE(0 3 10)
R2 N004 N002 100k
R4 0 N005 5.984k
R7 N006 N005 2k
R6 N003 N004 2k
V1 N006 0 PULSE(0 12 0 0 0 0.0005 0.001)
R8 N003 N006 0.01
XU1 N005 N004 N001 0 N002 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R5 N005 N001 750k
V2 N001 0 12
R3 0 N004 6.3114k
.tran 5
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 708
WIRE 0 -272 -224 -272
WIRE 256 -272 0 -272
WIRE -224 -192 -224 -272
WIRE 432 -80 144 -80
WIRE -224 -64 -224 -112
WIRE -432 -48 -672 -48
WIRE 0 16 0 -272
WIRE 144 16 144 -80
WIRE -672 48 -672 -48
WIRE -432 128 -432 -48
WIRE -256 128 -432 128
WIRE -96 128 -176 128
WIRE 256 144 256 -272
WIRE -432 160 -432 128
WIRE -96 160 -96 128
WIRE 144 160 144 96
WIRE 144 160 -96 160
WIRE 224 160 144 160
WIRE 432 176 432 -80
WIRE 432 176 288 176
WIRE -672 192 -672 128
WIRE 0 192 0 96
WIRE 0 192 -96 192
WIRE 224 192 0 192
WIRE -432 272 -432 240
WIRE -256 272 -432 272
WIRE -96 272 -96 192
WIRE -96 272 -176 272
WIRE 256 272 256 208
WIRE 0 304 0 192
WIRE 144 304 144 160
WIRE -432 336 -432 272
WIRE -432 480 -432 416
WIRE 0 480 0 384
WIRE 144 480 144 384
SYMBOL OpAmps\\UniversalOpAmp1 256 176 R0
SYMATTR InstName U1
SYMBOL voltage -432 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 12 0 0 0 0.0005 0.001)
SYMBOL res 16 112 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 750k
SYMBOL res -448 144 R0
SYMATTR InstName R8
SYMATTR Value 0.01
SYMBOL res -272 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R6
SYMATTR Value 2k
SYMBOL current -672 128 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value SINE(0 3 10)
SYMBOL res 160 400 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 6.3114k
SYMBOL voltage -224 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL res 160 112 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res -272 288 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R7
SYMATTR Value 2k
SYMBOL res 16 400 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 5.984k
FLAG -432 480 0
FLAG 0 480 0
FLAG 144 480 0
FLAG 256 272 0
FLAG -224 -64 0
FLAG -672 192 0
TEXT -704 504 Left 2 !.tran 5
* Z:\home\khalils\Downloads\files\data\raw_asc\ADR1399E.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR1399E.asy)
Rload N001 0 10k
XU2 OUT 0 N002 0 OUT 0 ADR1399E ;pnba +REFF)-REFF)H+)H-)+REFS)-REFS
R1 OUT N003 5
V1 N002 0 30
C1 N003 0 1
R_Parasitic N001 OUT 10
Vin IN 0 15
Rbias IN OUT 2.67k
C2 IN 0 1
.tran 5
.lib ADR1399E.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1012 960
WIRE 176 -160 80 -160
WIRE 272 -160 176 -160
WIRE 352 -160 272 -160
WIRE 80 -128 80 -160
WIRE 176 -112 176 -160
WIRE 352 -96 352 -160
WIRE 80 -16 80 -48
WIRE 176 -16 176 -48
WIRE 176 -16 80 -16
WIRE 80 32 80 -16
WIRE 352 80 352 -16
WIRE 448 80 352 80
WIRE 512 80 448 80
WIRE 560 80 512 80
WIRE 624 80 560 80
WIRE 752 80 704 80
WIRE 272 96 80 96
WIRE 272 144 272 96
WIRE 352 144 352 80
WIRE 448 144 448 80
WIRE 560 144 560 80
WIRE 752 176 752 80
WIRE 80 192 80 96
WIRE 560 272 560 224
WIRE 80 384 80 272
WIRE 272 384 272 320
WIRE 272 384 80 384
WIRE 352 384 352 320
WIRE 352 384 272 384
WIRE 448 384 448 320
WIRE 448 384 352 384
WIRE 560 384 560 336
WIRE 560 384 448 384
WIRE 752 384 752 256
WIRE 752 384 560 384
WIRE 352 432 352 384
SYMBOL ADR1399E 336 224 R0
SYMATTR InstName U2
SYMBOL res 544 128 R0
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL res 336 -112 R0
SYMATTR InstName Rbias
SYMATTR Value 2.67k
SYMBOL voltage 80 -144 M0
WINDOW 3 36 62 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 30 32 Left 2
SYMATTR Value 15
SYMATTR InstName Vin
SYMBOL cap 160 -112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 768 160 M0
SYMATTR InstName Rload
SYMATTR Value 10k
SYMBOL voltage 80 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 30
SYMBOL cap 576 272 M0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 720 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R_Parasitic
SYMATTR Value 10
FLAG 272 -160 IN
FLAG 80 32 0
FLAG 512 80 OUT
FLAG 352 432 0
TEXT 48 440 Left 2 !.tran 5