Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\abc674541525_DR01op.asc
* Generated by LTspice 26.0.1 for Windows.
R1 R1 0 {R1}
V1 V1 0 {Vcc}
D1 V1 R1 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.op
.param Vcc=25 R1=1.2k
.meas Vd param V(V1)-V(R1)
.meas Pd param Vd*I(D1)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 912 680
WIRE 128 0 48 0
WIRE 256 0 192 0
WIRE 304 0 256 0
WIRE 48 48 48 0
WIRE 304 48 304 0
WIRE 48 160 48 128
WIRE 304 160 304 128
WIRE 304 160 48 160
WIRE 48 192 48 160
SYMBOL diode 128 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 288 32 R0
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL voltage 48 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vcc}
FLAG 48 192 0
FLAG 256 0 R1
FLAG 48 0 V1
TEXT 88 176 Left 2 !.op
TEXT 96 208 Left 2 !.param Vcc=25 R1=1.2k
TEXT 416 16 Left 2 !.meas Vd param V(V1)-V(R1)
TEXT 416 56 Left 2 !.meas Pd param Vd*I(D1)
* Z:\home\khalils\Downloads\files\data\raw_asc\100eb6c3d835_electronics_pulse_into_cap.asc
* Generated by LTspice 26.0.1 for Windows.
V1 source 0 PULSE(0 5 0.1 1n 1n 1.5 1 1)
R1 source cap 100
C1 cap 0 1mF
.tran 4
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 16 32 16
WIRE 320 16 208 16
WIRE 32 112 32 16
WIRE 320 112 320 16
WIRE 32 224 32 192
WIRE 320 224 320 176
WIRE 320 224 32 224
WIRE 320 256 320 224
SYMBOL res 112 32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -7 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage 32 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0.1 1n 1n 1.5 1 1)
SYMBOL cap 304 112 R0
SYMATTR InstName C1
SYMATTR Value 1mF
FLAG 320 256 0
FLAG 32 16 source
FLAG 320 16 cap
TEXT -24 280 Left 2 !.tran 4
* Z:\home\khalils\Downloads\files\data\raw_asc\6e64402562fc_3b.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 VCE 0 0 BC547B
VCC N001 0 12
VBE VCE 0 0.7
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VBE 0 0.7 0.01
.step TEMP LIST 20 30 40 50
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1144 680
WIRE 368 112 144 112
WIRE 144 176 144 112
WIRE 48 224 -48 224
WIRE 80 224 48 224
WIRE 96 224 80 224
WIRE -48 320 -48 224
WIRE 368 320 368 112
WIRE -48 448 -48 400
WIRE 144 448 144 272
WIRE 368 448 368 400
SYMBOL voltage 368 304 R0
SYMATTR InstName VCC
SYMATTR Value 12
SYMBOL voltage -48 304 R0
SYMATTR InstName VBE
SYMATTR Value 0.7
SYMBOL npn 80 176 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
FLAG -48 448 0
FLAG 144 448 0
FLAG 368 448 0
FLAG 48 224 VCE
TEXT 608 272 Left 2 !.dc VBE 0 0.7 0.01
TEXT 608 320 Left 2 !.step TEMP LIST 20 30 40 50
* Z:\tmp\asc_dec_bjh7r6w2\10164fcad1f3_UARTfaker-1_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N004 0 PULSE(12 -0.83 11.66666667ms 20ns 20ns 3.333333333ms 9999 1)
D2 N001 N003 D
V6 N007 0 PULSE(12 -0.83 10020.66667ms 20ns 20ns 3.333333333ms 9999 1)
D4 N001 N005 D
D10 N001 N011 D
D8 N001 N009 D
V8 N009 0 PULSE(12 -0.83 10027.33333ms 20ns 20ns 3.333333333ms 9999 1)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1560 944
WIRE 688 144 -224 144
WIRE 448 208 -80 208
WIRE 688 208 688 144
WIRE 688 208 512 208
WIRE 752 208 688 208
WIRE 448 272 -80 272
WIRE 688 272 688 208
WIRE 688 272 512 272
WIRE 448 336 -80 336
WIRE 688 336 688 272
WIRE 688 336 512 336
WIRE 448 400 -80 400
WIRE 688 400 688 336
WIRE 688 400 512 400
WIRE 448 464 -80 464
WIRE 688 464 688 400
WIRE 688 464 512 464
WIRE 448 528 -80 528
WIRE 688 528 688 464
WIRE 688 528 512 528
WIRE 448 592 -80 592
WIRE 688 592 688 528
WIRE 688 592 512 592
WIRE 448 656 -80 656
WIRE 688 656 688 592
WIRE 688 656 512 656
WIRE 448 720 -80 720
WIRE 688 720 688 656
WIRE 688 720 512 720
WIRE 448 784 -80 784
WIRE 688 784 688 720
WIRE 688 784 512 784
SYMBOL voltage -64 336 R90
WINDOW 0 12 126 VBottom 2
WINDOW 3 -33 -201 VTop 2
SYMATTR InstName V3
SYMATTR Value PULSE(12 -0.83 11.66666667ms 20ns 20ns 3.333333333ms 9999 1)
SYMBOL diode 512 256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMBOL voltage -64 528 R90
WINDOW 0 12 126 VBottom 2
WINDOW 3 -33 -201 VTop 2
SYMATTR InstName V6
SYMATTR Value PULSE(12 -0.83 10020.66667ms 20ns 20ns 3.333333333ms 9999 1)
SYMBOL diode 512 384 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D4
SYMBOL diode 512 768 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D10
SYMBOL diode 512 640 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D8
SYMBOL voltage -64 656 R90
WINDOW 0 12 126 VBottom 2
WINDOW 3 -33 -201 VTop 2
SYMATTR InstName V8
SYMATTR Value PULSE(12 -0.83 10027.33333ms 20ns 20ns 3.333333333ms 9999 1)
FLAG -160 208 0
FLAG -160 272 0
FLAG -160 336 0
FLAG -160 400 0
FLAG -160 464 0
FLAG -160 528 0
FLAG -160 592 0
FLAG -160 656 0
FLAG -160 720 0
FLAG -160 784 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6754.asc
* Generated by LTspice 26.0.1 for Windows.
* High Speed Differential Line Receiver
* Small differential input\nsignal with large common\nmode component
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC6754.asy)
B1 N003 0 V=.3+1.2*Random(time/20n)
XU1 N002 N001 0 N004 N003 NC_01 NC_02 _Q Q LTC6754 ;pnba VccO)VccI)Vee)IN+)IN-)_SHDN)_LE/HYST)_Q)Q
V2 N002 0 5
R1 Q _Q 100
V3 N004 N003 SINE(0 100m 300Meg 0 0 90)
V1 N001 0 5
.tran 200n
.lib LTC6754.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1956 1060
WIRE 480 -320 480 -336
WIRE 576 -320 576 -336
WIRE 480 -208 480 -240
WIRE 576 -208 576 -240
WIRE 256 -176 16 -176
WIRE 752 -176 672 -176
WIRE 816 -176 752 -176
WIRE 816 -160 816 -176
WIRE 256 -144 256 -176
WIRE 400 -144 256 -144
WIRE 672 -144 672 -176
WIRE 672 -144 656 -144
WIRE -208 -128 -240 -128
WIRE 16 -128 16 -176
WIRE 16 -128 -128 -128
WIRE 400 -112 256 -112
WIRE 672 -112 656 -112
WIRE 16 -80 16 -128
WIRE 96 -80 16 -80
WIRE 256 -80 256 -112
WIRE 256 -80 176 -80
WIRE 672 -64 672 -112
WIRE 752 -64 672 -64
WIRE 816 -64 816 -80
WIRE 816 -64 752 -64
WIRE 576 32 576 16
CIRCLE Normal 368 112 -400 -352 2
SYMBOL bv -112 -128 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName B1
SYMATTR Value V=.3+1.2*Random(time/20n)
SYMBOL res 800 -176 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL LTC6754 528 -96 R0
SYMATTR InstName U1
SYMBOL voltage 480 -224 M180
WINDOW 123 24 -26 Left 2
WINDOW 39 24 -5 Left 2
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 576 -224 M180
WINDOW 123 24 -26 Left 2
WINDOW 39 24 -5 Left 2
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 192 -80 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value SINE(0 100m 300Meg 0 0 90)
SYMATTR InstName V3
FLAG 480 -336 0
FLAG 576 -336 0
FLAG 576 32 0
FLAG 752 -176 Q
FLAG 752 -64 _Q
FLAG -240 -128 0
TEXT 656 40 Left 2 !.tran 200n
TEXT 536 -368 Bottom 2 ;High Speed Differential Line Receiver
TEXT 8 -184 Bottom 2 ;Small differential input\nsignal with large common\nmode component
* Z:\tmp\asc_dec_bjh7r6w2\0736064f1a1e_Output_stage_for_20pp_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V2 POS 0 SINE(1.4 1.4 1k 0 0 0)
C2 OUT N004 470p
R5 N003 N004 150
C1 N003 N005 3.9n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -208 48 -208 -32
WIRE 224 96 224 -32
WIRE 496 96 304 96
WIRE 608 96 576 96
WIRE 608 144 608 96
WIRE 640 144 608 144
WIRE 304 160 304 96
WIRE 416 160 304 160
WIRE 544 160 496 160
WIRE 608 160 608 144
WIRE 224 176 -208 176
WIRE 304 176 304 160
WIRE -208 224 -208 176
WIRE 496 256 496 160
WIRE 576 256 496 256
WIRE 224 272 224 176
WIRE 304 272 304 240
WIRE 368 272 304 272
WIRE 416 272 368 272
WIRE 640 272 640 144
WIRE 752 272 640 272
WIRE 496 288 496 272
WIRE 544 288 496 288
WIRE 576 288 544 288
WIRE 368 336 368 272
WIRE 544 336 544 288
SYMBOL voltage -208 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(1.4 1.4 1k 0 0 0)
SYMBOL cap 608 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 470p
SYMBOL res 400 176 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 150
SYMBOL cap 288 176 R0
SYMATTR InstName C1
SYMATTR Value 3.9n
FLAG -208 304 0
FLAG -208 128 0
FLAG 752 272 OUT
FLAG 224 176 POS
* Z:\home\khalils\Downloads\files\data\raw_asc\1b50aff638d3_Leitungstheorie-Kurzschluss.asc
* Generated by LTspice 26.0.1 for Windows.
* Wire with short ending\nCreated by AblL
R1 N003 0 0.00001
V1 N001 0 PULSE(0 20 0 0.01n 0.01n 10n 1m) Rser=50
T1 N001 0 N002 0 Td=0.25us Z0=50
T2 N002 0 N003 0 Td=0.25us Z0=50
.tran 0 2us 0 0.1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 112 -144 112
WIRE 240 112 112 112
WIRE 512 112 336 112
WIRE -144 144 -144 112
WIRE 16 144 0 144
WIRE 176 144 112 144
WIRE 240 144 176 144
WIRE 352 144 336 144
WIRE 512 144 512 112
WIRE 0 192 0 144
WIRE 176 192 176 144
WIRE 352 192 352 144
WIRE -144 240 -144 224
WIRE 512 240 512 224
SYMBOL res 496 128 R0
SYMATTR InstName R1
SYMATTR Value 0.00001
SYMBOL tline 64 128 R0
WINDOW 0 -1 -53 Bottom 2
WINDOW 3 5 -52 Top 2
SYMATTR InstName T1
SYMATTR Value Td=0.25us Z0=50
SYMBOL voltage -144 128 R0
WINDOW 3 -191 147 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 -191 175 Left 2
SYMATTR Value PULSE(0 20 0 0.01n 0.01n 10n 1m)
SYMATTR SpiceLine Rser=50
SYMATTR InstName V1
SYMBOL tline 288 128 R0
WINDOW 0 -2 -49 Bottom 2
WINDOW 3 3 -48 Top 2
SYMATTR InstName T2
SYMATTR Value Td=0.25us Z0=50
FLAG 0 192 0
FLAG 176 192 0
FLAG 352 192 0
FLAG 512 240 0
FLAG -144 240 0
TEXT 88 0 Left 2 !.tran 0 2us 0 0.1n
TEXT 80 -56 Left 2 ;Wire with short ending\nCreated by AblL
* Z:\home\khalils\Downloads\files\data\raw_asc\0e011e894b96_1637.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Supply Rail Current Sense
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1637.asy)
R1 OUT 0 2K
V1 +V 0 5
Q1 N001 N004 OUT 0 2N3904
XU1 N001 N003 +V 0 N004 NC_01 LT1637 ;pnba In+)In-)V+)V-)OUT)SHDN
I1 N002 0 SINE(1 1 1K)
R4 N003 N002 200
R2 +V N002 .2
R3 N001 +V 200
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -80 48 -80 32
WIRE -32 48 -80 48
WIRE 64 48 48 48
WIRE 336 48 64 48
WIRE -80 80 -80 48
WIRE 144 144 144 128
WIRE -288 160 -288 144
WIRE 336 176 336 48
WIRE -80 192 -80 160
WIRE -32 192 -80 192
WIRE 112 192 48 192
WIRE 272 224 256 224
WIRE -288 256 -288 240
WIRE 64 256 64 48
WIRE 112 256 64 256
WIRE -80 272 -80 192
WIRE 336 288 336 272
WIRE 416 288 336 288
WIRE 336 304 336 288
WIRE 144 320 144 304
WIRE -80 384 -80 352
WIRE 336 400 336 384
SYMBOL res -96 64 R0
SYMATTR InstName R2
SYMATTR Value .2
SYMBOL npn 272 176 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 64 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 200
SYMBOL res 64 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 200
SYMBOL current -80 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value SINE(1 1 1K)
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 320 288 R0
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL opamps\\LT1637 144 224 R0
SYMATTR InstName U1
FLAG -288 256 0
FLAG 144 128 +V
FLAG -288 144 +V
FLAG 144 320 0
FLAG 336 400 0
FLAG -80 32 +V
FLAG -80 384 0
FLAG 416 288 OUT
TEXT 424 392 Left 2 !.tran 3m
TEXT 128 -16 Bottom 2 ;Positive Supply Rail Current Sense
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3493-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3493-3.asy)
L1 N002 OUT 20
D3 OUT N001 BAT54
C2 OUT 0 10
Rload OUT 0 3
C1 N001 N002 .1
D1 0 N002 MBRS340
V1 IN 0 6
XU1 N003 0 N001 N002 IN IN LT3493-3 ;pnba FB)GND)Boost)SW)Vin)_SHDN
R2 0 N003 10K
R1 OUT N003 32.4K
C3 OUT N003 22p
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 250u startup
.lib LT3493-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3836 1412
WIRE 2752 864 2576 864
WIRE 2816 864 2752 864
WIRE 2944 864 2880 864
WIRE 2752 896 2752 864
WIRE 2576 912 2576 864
WIRE 2416 976 2336 976
WIRE 2448 976 2416 976
WIRE 2752 976 2752 960
WIRE 2752 976 2704 976
WIRE 2816 976 2752 976
WIRE 2944 976 2944 864
WIRE 2944 976 2896 976
WIRE 3056 976 2944 976
WIRE 3136 976 3056 976
WIRE 3216 976 3136 976
WIRE 2336 992 2336 976
WIRE 2752 992 2752 976
WIRE 2944 992 2944 976
WIRE 3136 992 3136 976
WIRE 3216 992 3216 976
WIRE 3056 1008 3056 976
WIRE 2752 1072 2752 1056
WIRE 2336 1088 2336 1072
WIRE 3136 1088 3136 1056
WIRE 3216 1088 3216 1072
WIRE 2416 1104 2416 976
WIRE 2448 1104 2416 1104
WIRE 2944 1104 2944 1072
WIRE 2944 1104 2704 1104
WIRE 3056 1104 3056 1072
WIRE 3056 1104 2944 1104
WIRE 2944 1120 2944 1104
WIRE 2576 1184 2576 1168
WIRE 2944 1216 2944 1200
SYMBOL ind 2800 992 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 20
SYMBOL res 3200 976 R0
SYMATTR InstName Rload
SYMATTR Value 3
SYMBOL cap 3120 992 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res 2928 1216 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL VOLTAGE 2336 976 R0
WINDOW 0 27 22 Left 2
WINDOW 3 29 98 Left 2
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL schottky 2880 848 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D3
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL PowerProducts\\LT3493-3 2576 1040 R0
SYMATTR InstName U1
SYMBOL cap 2736 896 R0
WINDOW 3 26 53 Left 2
SYMATTR Value .1
SYMATTR InstName C1
SYMBOL RES 2928 976 R0
SYMATTR InstName R1
SYMATTR Value 32.4K
SYMBOL schottky 2736 1056 M180
WINDOW 0 41 52 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMBOL cap 3040 1008 R0
SYMATTR InstName C3
SYMATTR Value 22p
FLAG 2336 1088 0
FLAG 2576 1184 0
FLAG 2944 1216 0
FLAG 2752 1072 0
FLAG 3136 1088 0
FLAG 3216 1088 0
FLAG 3216 976 OUT
FLAG 2336 976 IN
TEXT 3064 1192 Left 2 !.tran 250u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8619-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8619-5.asy)
V1 IN 0 48
C2 N001 0 1
Rload OUT 0 4
L1 N004 OUT 10 Rser=3m
C4 OUT 0 22 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
R1 N003 0 60.4K
XU1 0 MP_01 N003 IN IN MP_02 MP_03 MP_04 N004 MP_05 MP_06 N002 N001 OUT NC_07 MP_08 0 OUT LT8619-5 ;pnba Sync))Rt)EN/UV)Vin))))SW)))BST)INTVcc)Bias)PG))GND)OUT
C3 N002 N004 .1
.tran 350u startup
.lib LT8619-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 680
WIRE 96 -64 0 -64
WIRE 256 -64 96 -64
WIRE 0 -48 0 -64
WIRE 256 -48 256 -64
WIRE 96 0 96 -64
WIRE 112 0 96 0
WIRE 416 0 400 0
WIRE 496 0 480 0
WIRE 0 48 0 32
WIRE 112 96 96 96
WIRE 592 96 400 96
WIRE 432 192 400 192
WIRE 432 208 432 192
WIRE 16 288 0 288
WIRE 112 288 96 288
WIRE 432 288 432 272
WIRE 432 288 400 288
WIRE 480 288 432 288
WIRE 592 288 592 96
WIRE 592 288 560 288
WIRE 624 288 592 288
WIRE 720 288 624 288
WIRE 624 304 624 288
WIRE 720 304 720 288
WIRE 192 352 192 336
WIRE 320 384 320 336
WIRE 592 384 592 288
WIRE 592 384 320 384
WIRE 624 400 624 368
WIRE 720 400 720 384
SYMBOL cap 416 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 416 208 R0
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL voltage 0 -64 R0
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL PowerProducts\\LT8619-5 256 144 R0
SYMATTR InstName U1
SYMBOL res 112 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 60.4K
SYMBOL res 704 288 R0
SYMATTR InstName Rload
SYMATTR Value 4
SYMBOL ind 464 304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=3m
SYMBOL cap 608 304 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
FLAG 192 352 0
FLAG 0 288 0
FLAG 0 48 0
FLAG 496 0 0
FLAG 624 400 0
FLAG 720 400 0
FLAG 720 288 OUT
FLAG 0 -64 IN
FLAG 96 96 0
TEXT 608 448 Left 2 !.tran 350u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\225851c96a60_ac_math1.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot functions for power in dBm\n \nCartesian plot\n.func dBm(x,R) 10*log10(mag(x)**2/R/1e-3)\n \nBode plot\n.func dBm_(x,R) sqrt(mag(x)**2/R/1e-3)
R2 out 0 50
C1 N002 0 1n
V1 N001 0 AC 1
R1 N001 N002 1k
G1 0 out N002 0 0.02
.ac dec 100 10 10meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 160 0 160
WIRE 288 160 208 160
WIRE 432 160 288 160
WIRE 560 160 480 160
WIRE 640 160 560 160
WIRE 0 208 0 160
WIRE 480 208 480 160
WIRE 640 208 640 160
WIRE 288 224 288 160
WIRE 432 224 432 160
WIRE 0 336 0 288
WIRE 288 336 288 288
WIRE 432 336 432 272
WIRE 480 336 480 288
WIRE 640 336 640 288
SYMBOL res 624 192 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL res 112 176 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL cap 272 224 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL voltage 0 192 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL g 480 192 R0
SYMATTR InstName G1
SYMATTR Value 0.02
FLAG 0 336 0
FLAG 288 336 0
FLAG 432 336 0
FLAG 480 336 0
FLAG 640 336 0
FLAG 560 160 out
TEXT -40 80 Left 0 !.ac dec 100 10 10meg
TEXT -48 -176 Left 0 ;Plot functions for power in dBm\n \nCartesian plot\n.func dBm(x,R) 10*log10(mag(x)**2/R/1e-3)\n \nBode plot\n.func dBm_(x,R) sqrt(mag(x)**2/R/1e-3)
* Z:\home\khalils\Downloads\files\data\raw_asc\2b3e4cffba17_Integrator.asc
* Generated by LTspice 26.0.1 for Windows.
C1 Vout N001 1
XU1 N001 0 Vout opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R1 N001 N002 1
V1 N002 0 SINE(2 2 1 0 0 0 0)
.lib opamp.sub
.tran 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 112 176 112
WIRE 320 112 288 112
WIRE 64 192 16 192
WIRE 176 192 176 112
WIRE 176 192 144 192
WIRE 208 192 176 192
WIRE 320 208 320 112
WIRE 320 208 272 208
WIRE 384 208 320 208
WIRE 208 224 176 224
WIRE 16 240 16 192
WIRE 16 352 16 320
WIRE 176 352 176 224
WIRE 176 352 16 352
WIRE 16 368 16 352
SYMBOL voltage 16 224 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(2 2 1 0 0 0 0)
SYMATTR InstName V1
SYMBOL res 160 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL cap 288 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL Opamps\\opamp 240 144 R0
SYMATTR InstName U1
FLAG 16 368 0
FLAG 384 208 Vout
TEXT -112 24 Left 2 !.lib opamp.sub
TEXT -112 392 Left 2 !.tran 10
* Z:\home\khalils\Downloads\files\data\raw_asc\38f334221ba5_BEST.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R1 vin N003 2900
XU1 N003 nonfil voltage 0 nonfil level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
XU2 N002 out voltage 0 out level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R3 N001 nonfil 1Meg
V1 voltage 0 3.3
V2 vin voltage SINE(0 0.1 1k 1 0 0 1k)
R2 N003 0 3600
C2 out N002 100n
R4 N002 N001 1Meg
C1 N001 0 100n
.tran 3
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1704 680
WIRE 1584 -32 1360 -32
WIRE 944 -16 752 -16
WIRE 528 48 528 0
WIRE 80 96 -16 96
WIRE 208 96 160 96
WIRE 1360 96 1360 -32
WIRE 1424 96 1360 96
WIRE 752 112 752 -16
WIRE 784 112 752 112
WIRE 1584 112 1584 -32
WIRE 1584 112 1488 112
WIRE 1648 112 1584 112
WIRE 944 128 944 -16
WIRE 944 128 848 128
WIRE 992 128 944 128
WIRE 1024 128 992 128
WIRE 1152 128 1104 128
WIRE 1184 128 1152 128
WIRE 1344 128 1264 128
WIRE 1424 128 1344 128
WIRE 528 144 528 128
WIRE 784 144 528 144
WIRE -16 176 -16 96
WIRE 528 176 528 144
WIRE 1152 192 1152 128
WIRE 528 288 528 256
WIRE 1344 288 1344 128
WIRE 1424 288 1344 288
WIRE 1584 288 1584 112
WIRE 1584 288 1488 288
WIRE -16 304 -16 256
WIRE 1152 304 1152 256
SYMBOL res 512 160 R0
SYMATTR InstName R2
SYMATTR Value 3600
SYMBOL res 512 32 R0
SYMATTR InstName R1
SYMATTR Value 2900
SYMBOL OpAmps\\UniversalOpAmp2 816 128 R0
SYMATTR InstName U1
SYMBOL OpAmps\\UniversalOpAmp2 1456 112 R0
SYMATTR InstName U2
SYMBOL voltage -16 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap 1136 192 R0
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL cap 1488 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL res 1120 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL voltage 176 96 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 0.1 1k 1 0 0 1k)
SYMBOL res 1280 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1Meg
FLAG -16 304 0
FLAG -16 96 voltage
FLAG 208 96 vin
FLAG 816 96 voltage
FLAG 1456 80 voltage
FLAG 1456 144 0
FLAG 816 160 0
FLAG 528 288 0
FLAG 528 0 vin
FLAG 1152 304 0
FLAG 1648 112 out
FLAG 992 128 nonfil
TEXT -74 338 Left 2 !.tran 3
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2108-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2108-1.2.asy)
V1 IN 0 5
XU1 IN IN N001 OUT 0 ADP2108-x.x Rtop=112K ;pnba Vin)EN)SW)FB)GND
C1 OUT 0 10 V=4 Irms=8.88 Rser=0.00522854 Lser=0 mfg="KEMET" pn="C0805C106K7PAC" type="X5R"
L1 N001 OUT 1
Rload OUT 0 4
.tran .5m startup
.lib ADP2108-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 144
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
SYMBOL ADP2108-1.2 352 224 R0
SYMATTR InstName U1
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 4
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine V=4 Irms=8.88 Rser=0.00522854 Lser=0 mfg="KEMET" pn="C0805C106K7PAC" type="X5R"
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
TEXT 552 352 Left 2 !.tran .5m startup