Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3251.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3251.asy)
R2 OUT N006 475K
C1 N003 N005 1
C3 OUT 0 10 Rser=0.01
R1 N006 0 536K
Rload OUT 0 25
C2 N001 N002 1
XU1 N004 IN N001 N002 0 N005 OUT N003 IN N006 LTC3251 ;pnba MD0)Vin)C1+)C1-)GND)C2-)Vout)C2+)MD1)FB
V1 IN 0 5
.tran .5m startup
.lib LTC3251.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 1320
WIRE 96 832 0 832
WIRE 336 832 96 832
WIRE 0 848 0 832
WIRE 336 864 336 832
WIRE 192 912 144 912
WIRE 592 912 480 912
WIRE 704 912 592 912
WIRE 800 912 704 912
WIRE 800 928 800 912
WIRE 0 944 0 928
WIRE 704 944 704 912
WIRE 592 960 592 912
WIRE 192 976 144 976
WIRE 512 976 480 976
WIRE 704 1024 704 1008
WIRE 800 1024 800 1008
WIRE 192 1040 176 1040
WIRE 512 1040 480 1040
WIRE 96 1104 96 832
WIRE 192 1104 96 1104
WIRE 592 1104 592 1040
WIRE 592 1104 480 1104
WIRE 592 1120 592 1104
WIRE 336 1168 336 1152
WIRE 592 1216 592 1200
SYMBOL RES 576 1104 R0
SYMATTR InstName R1
SYMATTR Value 536K
SYMBOL res 576 944 R0
SYMATTR InstName R2
SYMATTR Value 475K
SYMBOL res 784 912 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL POWERPRODUCTS\\LTC3251 336 1008 R0
SYMATTR InstName U1
SYMBOL cap 496 976 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 688 944 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMATTR SpiceLine Rser=0.01
SYMBOL VOLTAGE 0 832 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 128 912 R0
WINDOW 0 31 19 Left 2
WINDOW 3 30 49 Left 2
SYMATTR InstName C2
SYMATTR Value 1
FLAG 336 1168 0
FLAG 592 1216 0
FLAG 800 1024 0
FLAG 704 1024 0
FLAG 0 944 0
FLAG 800 912 OUT
FLAG 0 832 IN
TEXT 640 1096 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP5304-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP5304-1.asy)
C1 OUT 0 10
Rload OUT 0 80
L1 N002 OUT 2.2 Rser=80m
R1 OUT N001 1Meg
XU1 IN IN 0 0 OUT N001 0 0 N002 ADP5304-1 ;pnba EN)PVin)Mode)VID)FB)VinOK)Pgnd)Agnd)SW
V1 IN 0 5
.tran .6m startup
.lib ADP5304-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 64 64 64
WIRE 160 64 144 64
WIRE 480 64 416 64
WIRE 608 64 560 64
WIRE 64 80 64 64
WIRE 144 144 144 64
WIRE 160 144 144 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 608 144 608 64
WIRE 608 144 560 144
WIRE 688 144 608 144
WIRE 608 160 608 144
WIRE 688 160 688 144
WIRE 64 176 64 160
WIRE 160 224 144 224
WIRE 560 224 560 144
WIRE 560 224 416 224
WIRE 608 256 608 224
WIRE 688 256 688 240
WIRE 160 304 144 304
WIRE 432 304 416 304
WIRE 288 384 288 368
SYMBOL voltage 64 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 672 144 R0
SYMATTR Value 80
SYMATTR InstName Rload
SYMBOL res 576 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL cap 592 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=80m
SYMBOL ADP5304-1 288 192 R0
SYMATTR InstName U1
FLAG 608 256 0
FLAG 432 304 0
FLAG 64 176 0
FLAG 688 144 OUT
FLAG 688 256 0
FLAG 64 64 IN
FLAG 288 384 0
FLAG 144 304 0
FLAG 144 224 0
TEXT 440 384 Left 2 !.tran .6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\b32356e49ed9_3l_2_.asc
* Generated by LTspice 26.0.1 for Windows.
VBS N001 0 900m
VDS DS 0 50m
VGS N002 0 V
M1 DS N002 0 N001 CMOSN l=0.18u w=1.8u ad=0.81p as=0.81p pd=4.5u ps=4.5u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC_180nm.txt
.dc VGS 0 1.8 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 988 680
WIRE 496 64 336 64
WIRE 496 80 496 64
WIRE 496 192 496 160
WIRE 336 240 336 64
WIRE 512 288 336 288
WIRE 288 320 176 320
WIRE 176 352 176 320
WIRE 512 448 512 288
WIRE 176 496 176 432
WIRE 336 496 336 336
WIRE 336 496 176 496
WIRE 336 560 336 496
WIRE 512 576 512 528
SYMBOL nmos4 288 240 R0
SYMATTR InstName M1
SYMATTR Value CMOSN
SYMATTR Value2 l=0.18u w=1.8u ad=0.81p as=0.81p pd=4.5u ps=4.5u
SYMBOL voltage 496 64 R0
SYMATTR InstName VDS
SYMATTR Value 50m
SYMBOL voltage 512 432 R0
SYMATTR InstName VBS
SYMATTR Value 900m
SYMBOL voltage 176 336 R0
SYMATTR InstName VGS
FLAG 336 560 0
FLAG 512 576 0
FLAG 496 192 0
FLAG 496 64 DS
TEXT 616 192 Left 2 !.include TSMC_180nm.txt
TEXT 624 256 Left 2 !.dc VGS 0 1.8 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\d9d4efd58fae_TPS2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N007 0.1
R2 N005 N001 3
C1 N005 N001 1
XU1 N001 0 N005 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R3 N006 N005 1
C2 N003 N006 1
XU2 N006 0 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
XU3 N004 0 N003 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R4 N002 N001 1
R5 N004 N003 0.1
R6 N002 N004 0.1
V1 N007 0 AC 1
.ac dec 100 1e-2 1e2
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 -64 -256 -64
WIRE 688 -64 192 -64
WIRE 400 48 320 48
WIRE 528 48 480 48
WIRE 576 48 528 48
WIRE 688 48 688 -64
WIRE 688 48 656 48
WIRE -256 80 -256 -64
WIRE -208 80 -256 80
WIRE -80 80 -128 80
WIRE 528 160 528 48
WIRE 528 160 416 160
WIRE -256 176 -256 80
WIRE -208 176 -256 176
WIRE -80 176 -80 80
WIRE -80 176 -144 176
WIRE 240 176 176 176
WIRE 320 176 320 48
WIRE 320 176 304 176
WIRE 352 176 320 176
WIRE 480 192 416 192
WIRE 480 224 480 192
WIRE -384 256 -432 256
WIRE -256 256 -256 176
WIRE -256 256 -304 256
WIRE -192 256 -256 256
WIRE -80 272 -80 176
WIRE -80 272 -128 272
WIRE 32 272 -80 272
WIRE 176 272 176 176
WIRE 176 272 112 272
WIRE 240 272 176 272
WIRE -192 288 -272 288
WIRE 688 288 688 48
WIRE 688 288 304 288
WIRE 240 304 160 304
WIRE -272 320 -272 288
WIRE 160 336 160 304
FLAG -272 320 0
FLAG 160 336 0
FLAG 480 224 0
FLAG -432 336 0
SYMBOL res -288 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 0.1
SYMBOL res -112 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 3
SYMBOL cap -144 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL Opamps\\opamp -160 208 R0
SYMATTR InstName U1
SYMBOL res 128 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL cap 304 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL Opamps\\opamp 272 224 R0
SYMATTR InstName U2
SYMBOL Opamps\\opamp 384 112 M0
SYMATTR InstName U3
SYMBOL res 208 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1
SYMBOL res 496 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 0.1
SYMBOL res 672 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 0.1
SYMBOL voltage -432 240 R0
WINDOW 0 -2 -15 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
TEXT -162 368 Left 2 !.ac dec 100 1e-2 1e2
TEXT -160 400 Left 2 !.lib opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3561.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3561.asy)
Rload OUT 0 2.5
C2 OUT 0 22
R1 N004 0 324K
R2 N002 N001 13K
V1 IN 0 4
L1 N003 OUT 2.2
R4 N005 0 412K
C1 N001 0 1000p
XU1 N004 MP_01 0 N003 0 IN IN MP_02 N005 N002 LTC3561 ;pnba SHDN/Rt))SGND)SW)PGND)PVin)SVin))FB)Ith
R3 OUT N005 887K
.tran 1m startup
.lib LTC3561.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2480 1756
WIRE 1136 1328 784 1328
WIRE 1264 1328 1136 1328
WIRE 784 1344 784 1328
WIRE 1136 1360 1136 1328
WIRE 1264 1360 1264 1328
WIRE 896 1424 880 1424
WIRE 976 1424 960 1424
WIRE 1072 1424 1056 1424
WIRE 1344 1424 1328 1424
WIRE 1456 1424 1424 1424
WIRE 1568 1424 1456 1424
WIRE 1664 1424 1568 1424
WIRE 784 1440 784 1424
WIRE 1456 1440 1456 1424
WIRE 1568 1440 1568 1424
WIRE 1664 1440 1664 1424
WIRE 976 1536 960 1536
WIRE 1072 1536 1056 1536
WIRE 1456 1536 1456 1520
WIRE 1456 1536 1328 1536
WIRE 1568 1536 1568 1504
WIRE 1664 1536 1664 1520
WIRE 1456 1552 1456 1536
WIRE 1136 1632 1136 1616
WIRE 1264 1632 1264 1616
WIRE 1456 1648 1456 1632
SYMBOL ind 1328 1440 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL PowerProducts\\LTC3561 1200 1472 R0
SYMATTR InstName U1
SYMBOL res 1440 1424 R0
SYMATTR InstName R3
SYMATTR Value 887K
SYMBOL cap 960 1408 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000p
SYMBOL res 1072 1408 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 13K
SYMBOL voltage 784 1328 R0
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL res 1072 1520 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 324K
SYMBOL cap 1552 1440 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL res 1648 1424 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL res 1440 1536 R0
SYMATTR InstName R4
SYMATTR Value 412K
FLAG 960 1536 0
FLAG 880 1424 0
FLAG 1136 1632 0
FLAG 1264 1632 0
FLAG 784 1440 0
FLAG 1456 1648 0
FLAG 1568 1536 0
FLAG 1664 1536 0
FLAG 784 1328 IN
FLAG 1664 1424 OUT
TEXT 1216 1672 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1706-63.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 3.3
V2 N007 0 .6
G1 0 OUT N007 N004 1
V3 N002 0 PULSE(0 2.4 0 1n 1n .5m 1m)
V4 N003 0 PULSE(0 2.4 0 1n 1n 1m 2m)
V5 N005 0 PULSE(0 2.4 0 1n 1n 2m 4m)
V6 N006 0 PULSE(0 2.4 0 1n 1n 4m 8m)
C1 OUT 0 .1
V7 N008 0 PULSE(0 2.4 0 1n 1n 8m 16m)
XU1 N005 N006 N001 0 N004 OUT N002 N003 N008 LTC1706-63 ;pnba VID2)VID3)Vcc)GND)FB)Sense)VID0)VID1)VID4
.tran 16m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1706-63.asy)
.lib LTC1706-63.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2536 1332
WIRE 944 720 864 720
WIRE 1328 720 944 720
WIRE 864 736 864 720
WIRE 1168 784 1008 784
WIRE 1008 800 1008 784
WIRE 864 816 864 800
WIRE 1168 816 1168 784
WIRE 1328 816 1328 720
WIRE 1856 880 1392 880
WIRE 1008 896 1008 880
WIRE 1856 896 1856 880
WIRE 1744 928 1392 928
WIRE 1744 960 1744 928
WIRE 1104 976 992 976
WIRE 1632 976 1392 976
WIRE 944 992 944 720
WIRE 1856 992 1856 976
WIRE 992 1008 992 976
WIRE 1632 1008 1632 976
WIRE 1536 1024 1392 1024
WIRE 1536 1056 1536 1024
WIRE 1744 1056 1744 1040
WIRE 992 1072 992 1056
WIRE 1440 1072 1392 1072
WIRE 1632 1104 1632 1088
WIRE 1440 1120 1440 1072
WIRE 1248 1136 1248 1120
WIRE 1536 1152 1536 1136
WIRE 944 1184 944 1072
WIRE 992 1184 992 1152
WIRE 1440 1216 1440 1200
FLAG 1008 896 0
FLAG 1248 1136 0
FLAG 992 1184 0
FLAG 944 1184 0
FLAG 1856 992 0
FLAG 1744 1056 0
FLAG 1632 1104 0
FLAG 1536 1152 0
FLAG 864 816 0
FLAG 864 720 OUT
FLAG 1440 1216 0
SYMBOL voltage 1008 784 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage 992 1056 R0
SYMATTR InstName V2
SYMATTR Value .6
SYMBOL g2 944 976 M0
SYMATTR InstName G1
SYMATTR Value 1
SYMBOL voltage 1856 880 R0
SYMATTR InstName V3
SYMATTR Value PULSE(0 2.4 0 1n 1n .5m 1m)
SYMBOL voltage 1744 944 R0
SYMATTR InstName V4
SYMATTR Value PULSE(0 2.4 0 1n 1n 1m 2m)
SYMBOL voltage 1632 992 R0
SYMATTR InstName V5
SYMATTR Value PULSE(0 2.4 0 1n 1n 2m 4m)
SYMBOL voltage 1536 1040 R0
SYMATTR InstName V6
SYMATTR Value PULSE(0 2.4 0 1n 1n 4m 8m)
SYMBOL cap 848 736 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage 1440 1104 R0
SYMATTR InstName V7
SYMATTR Value PULSE(0 2.4 0 1n 1n 8m 16m)
SYMBOL PowerProducts\\LTC1706-63 1248 976 R0
SYMATTR InstName U1
TEXT 1912 1184 Left 2 !.tran 16m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7118-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7118-2.5.asy)
V1 IN 0 3.5
C1 OUT 0 2.2 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=2.5 ;pnba Vin)Sense)EN)SS)Vout)GND
C2 N001 0 4.7n
Rload OUT 0 20
.tran 6m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL ADP7118-2.5 224 128 R0
SYMATTR InstName U1
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.5
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 20
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1763-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1763-1.8.asy)
Rload OUT 0 500
V1 IN 0 PWL(0 0 1 10)
XU1 OUT OUT 0 N001 IN MP_01 MP_02 IN LT1763-1.8 ;pnba OUT)Sense)GND)BYP)_SHDN)))IN
C1 OUT 0 10
C2 OUT N001 .01
.tran 1
.lib LT1763.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 32 304 32
WIRE 352 32 320 32
WIRE 432 32 352 32
WIRE 528 32 432 32
WIRE 0 48 -208 48
WIRE 16 48 0 48
WIRE 432 48 432 32
WIRE 528 48 528 32
WIRE -208 64 -208 48
WIRE 352 64 352 32
WIRE 320 96 320 32
WIRE 320 96 304 96
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 432 144 432 112
WIRE 528 144 528 128
WIRE -208 160 -208 144
WIRE 352 160 352 128
WIRE 352 160 304 160
WIRE 160 240 160 208
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL PowerProducts\\LT1763-1.8 160 96 R0
SYMATTR InstName U1
SYMBOL cap 336 64 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL cap 416 48 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG -208 160 0
FLAG 432 144 0
FLAG 528 144 0
FLAG 160 240 0
FLAG -208 48 IN
FLAG 528 32 OUT
TEXT 400 208 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1106.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N010 0 .1
R1 N010 0 1Meg
L1 N001 N002 10
D1 N002 N003 MBR0530L
C2 N003 0 1
V1 N001 0 3.3
MQ1 N003 N005 N004 N004 Si9803DY
MQ2 N003 N009 N007 N007 Si9803DY
XU1 0 N010 N001 MP_01 N008 0 MP_02 MP_03 N002 MP_04 MP_05 MP_06 0 N006 N009 N005 N007 N004 N003 N011 LT1106 ;pnba SEL 12/5)Soft Start)Vcc))3/5 Detect)PGND)))SW))))SGND)_Vpp Valid)G2)G1)Vpp2)Vpp1)AVpp)ON/OFF
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1106.asy)
.lib LT1106.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2260 1624
WIRE 1648 976 1392 976
WIRE 1680 976 1648 976
WIRE 1808 976 1760 976
WIRE 1904 976 1808 976
WIRE 2048 976 1968 976
WIRE 1392 992 1392 976
WIRE 1648 1072 1648 976
WIRE 1808 1072 1808 976
WIRE 1392 1088 1392 1072
WIRE 1520 1136 1248 1136
WIRE 2048 1136 2048 976
WIRE 2048 1136 1936 1136
WIRE 2256 1136 2048 1136
WIRE 2048 1152 2048 1136
WIRE 1248 1184 1248 1136
WIRE 1520 1200 1296 1200
WIRE 1968 1200 1936 1200
WIRE 2048 1232 2048 1216
WIRE 1520 1264 1392 1264
WIRE 1968 1264 1936 1264
WIRE 1392 1312 1392 1264
WIRE 1520 1328 1440 1328
WIRE 2064 1328 1936 1328
WIRE 2144 1328 2064 1328
WIRE 2064 1344 2064 1328
WIRE 2144 1344 2144 1328
WIRE 1520 1392 1488 1392
WIRE 1968 1392 1936 1392
WIRE 2064 1440 2064 1408
WIRE 2144 1440 2144 1424
WIRE 1648 1488 1648 1456
WIRE 1808 1488 1808 1456
WIRE 1248 1552 1248 1280
WIRE 1392 1552 1392 1408
WIRE 1392 1552 1248 1552
WIRE 2256 1552 2256 1136
WIRE 2256 1552 1392 1552
FLAG 2064 1440 0
FLAG 2144 1440 0
FLAG 1968 1392 0
FLAG 1808 1488 0
FLAG 1648 1488 0
FLAG 2048 1232 0
FLAG 1392 1088 0
SYMBOL cap 2048 1344 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL res 2128 1328 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL ind 1664 992 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL schottky 1904 992 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBR0530L
SYMBOL cap 2032 1152 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL voltage 1392 976 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL pmos 1296 1280 R180
WINDOW 0 41 103 Right 2
WINDOW 3 40 -12 Right 2
SYMATTR InstName Q1
SYMATTR Value Si9803DY
SYMBOL pmos 1440 1408 R180
WINDOW 0 33 100 Right 2
WINDOW 3 40 -10 Right 2
SYMATTR InstName Q2
SYMATTR Value Si9803DY
SYMBOL PowerProducts\\LT1106 1728 1264 R0
SYMATTR InstName U1
TEXT 1952 1576 Left 2 !.tran 100m startup
* Z:\tmp\asc_dec_bjh7r6w2\0d79a683d476_sim_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R_LOAD OUT N005 100k
XU1 N003 N002 N001 0 OUT LM239 ;pnba In+)In-)V+)V-)OUT
R4 N002 N001 56k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 -176 80 -176
WIRE 288 -176 224 -176
WIRE 400 -176 288 -176
WIRE 400 -112 400 -176
WIRE 224 0 224 -96
WIRE 224 0 80 0
WIRE 288 32 288 -176
WIRE 224 48 224 0
WIRE 256 48 224 48
WIRE 400 64 400 -32
WIRE 400 64 320 64
WIRE 512 64 400 64
WIRE 656 64 512 64
WIRE 256 80 192 80
WIRE 512 112 512 64
WIRE 96 128 80 128
WIRE 192 128 192 80
WIRE 192 128 176 128
WIRE 288 128 288 96
WIRE 192 208 192 128
WIRE 400 208 400 64
WIRE 400 208 336 208
WIRE 512 336 512 192
SYMBOL res 496 96 R0
SYMATTR InstName R_LOAD
SYMATTR Value 100k
SYMBOL Opamps\\opamp2 288 0 R0
SYMATTR InstName U1
SYMATTR Value LM239
SYMBOL res 240 -80 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 56k
FLAG 288 128 0
FLAG 656 64 OUT
* Z:\home\khalils\Downloads\files\data\raw_asc\1d3d5224fd2a_Fig9_34_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Is(M1)/I(vsg)
VSD 0 N003 100m
VBS N002 0 0
M1 N003 N001 0 N002 P_50n l=100n w=5u
VSG 0 N001 350m AC 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.ac dec 100 10MEG 10G
.include cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 688
WIRE 448 16 320 16
WIRE 672 16 448 16
WIRE 720 16 672 16
WIRE 320 32 320 16
WIRE 720 48 720 16
WIRE 448 112 448 16
WIRE 320 128 320 112
WIRE 400 128 320 128
WIRE 528 160 448 160
WIRE 672 160 672 16
WIRE 672 160 608 160
WIRE 672 208 672 160
WIRE 448 304 448 208
WIRE 672 304 672 288
WIRE 672 304 448 304
SYMBOL pmos4 400 208 M180
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=100n w=5u
SYMATTR InstName M1
SYMATTR Value P_50n
SYMBOL voltage 320 16 R0
WINDOW 0 -89 56 Left 2
WINDOW 3 -89 84 Left 2
WINDOW 123 -89 112 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VSG
SYMATTR Value 350m
SYMATTR Value2 AC 1
SYMBOL voltage 672 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 41 57 Left 2
WINDOW 3 41 85 Left 2
SYMATTR InstName VSD
SYMATTR Value 100m
SYMBOL voltage 512 160 M90
WINDOW 0 63 52 VBottom 2
WINDOW 3 49 94 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VBS
SYMATTR Value 0
FLAG 720 48 0
TEXT 424 336 Left 2 !.ac dec 100 10MEG 10G
TEXT 424 360 Left 2 !.include cmosedu_models.txt
TEXT 448 -8 Left 2 ;Plot Is(M1)/I(vsg)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1083.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1083.asy)
C1 OUT 0 10
V1 IN 0 PWL(0 0 1 10) Rser=0.1
R1 OUT N001 121
R2 N001 0 365
XU1 N001 OUT IN LT1083 ;pnba ADJ)OUT)IN
Rload OUT 0 10
.tran 1
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1440 896
WIRE 1856 896 1808 896
WIRE 1952 896 1856 896
WIRE 2064 896 1952 896
WIRE 1856 912 1856 896
WIRE 2064 912 2064 896
WIRE 1440 928 1440 896
WIRE 1952 928 1952 896
WIRE 1952 1008 1952 992
WIRE 2064 1008 2064 992
WIRE 1680 1024 1680 992
WIRE 1856 1024 1856 992
WIRE 1856 1024 1680 1024
WIRE 1440 1040 1440 1008
WIRE 1856 1040 1856 1024
WIRE 1856 1136 1856 1120
SYMBOL RES 2048 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL cap 1936 928 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL RES 1840 1024 R0
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL RES 1840 896 R0
SYMATTR InstName R1
SYMATTR Value 121
SYMBOL VOLTAGE 1440 912 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMATTR SpiceLine Rser=0.1
SYMBOL PowerProducts\\LT1083 1680 896 R0
SYMATTR InstName U1
FLAG 2064 896 OUT
FLAG 1856 1136 0
FLAG 2064 1008 0
FLAG 1440 1040 0
FLAG 1952 1008 0
FLAG 1440 896 IN
TEXT 1992 1088 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3412.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3412.asy)
R3 N007 0 324K
R1 OUT N003 887K
XU1 N007 0 0 N001 0 IN IN N002 N003 N005 N006 LTC3412 ;pnba Rt)Mode)SGND)SW)PGND)PVin)SVin)Pgood)FB)Ith)Run/SS
R4 N005 N004 13K
C2 N004 0 1000p
R7 IN N006 10K
R6 IN N002 10K
C3 N006 0 .001
R2 N003 0 412K
L1 N001 OUT 2.2
V1 IN 0 5
C1 OUT 0 22
Rload OUT 0 20
.tran 500u startup
.lib LTC3412.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2472 1736
WIRE 1456 1248 1360 1248
WIRE 1648 1248 1456 1248
WIRE 1776 1248 1648 1248
WIRE 1920 1248 1776 1248
WIRE 1360 1264 1360 1248
WIRE 1456 1264 1456 1248
WIRE 1920 1264 1920 1248
WIRE 1648 1296 1648 1248
WIRE 1776 1296 1776 1248
WIRE 2032 1344 2000 1344
WIRE 2144 1344 2112 1344
WIRE 2256 1344 2144 1344
WIRE 2368 1344 2256 1344
WIRE 1360 1360 1360 1344
WIRE 1456 1360 1456 1344
WIRE 1552 1360 1456 1360
WIRE 2144 1360 2144 1344
WIRE 2256 1360 2256 1344
WIRE 2368 1360 2368 1344
WIRE 2000 1376 2000 1344
WIRE 2000 1376 1872 1376
WIRE 1552 1424 1520 1424
WIRE 2144 1456 2144 1440
WIRE 2144 1456 1872 1456
WIRE 2256 1456 2256 1424
WIRE 2368 1456 2368 1440
WIRE 2144 1472 2144 1456
WIRE 1360 1488 1344 1488
WIRE 1456 1488 1424 1488
WIRE 1552 1488 1536 1488
WIRE 1920 1536 1920 1344
WIRE 1920 1536 1872 1536
WIRE 1408 1552 1344 1552
WIRE 1552 1552 1488 1552
WIRE 1920 1552 1920 1536
WIRE 2144 1568 2144 1552
WIRE 1648 1632 1648 1616
WIRE 1776 1632 1776 1616
WIRE 1920 1632 1920 1616
SYMBOL res 2128 1456 R0
SYMATTR InstName R2
SYMATTR Value 412K
SYMBOL VOLTAGE 1360 1248 R0
WINDOW 3 27 94 Left 2
SYMATTR Value 5
SYMATTR InstName V1
SYMBOL res 1504 1536 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 324K
SYMBOL res 2352 1344 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL cap 2240 1360 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL cap 1904 1552 R0
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL res 1904 1248 R0
SYMATTR InstName R7
SYMATTR Value 10K
SYMBOL RES 2128 1344 R0
SYMATTR InstName R1
SYMATTR Value 887K
SYMBOL ind 2016 1360 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL res 1552 1472 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 13K
SYMBOL POWERPRODUCTS\\LTC3412 1712 1456 R0
SYMATTR InstName U1
SYMBOL res 1440 1248 R0
SYMATTR InstName R6
SYMATTR Value 10K
SYMBOL cap 1424 1472 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1000p
FLAG 1776 1632 0
FLAG 1648 1632 0
FLAG 1360 1360 0
FLAG 1344 1552 0
FLAG 2368 1456 0
FLAG 2144 1568 0
FLAG 2256 1456 0
FLAG 1344 1488 0
FLAG 1520 1424 0
FLAG 1920 1632 0
FLAG 2368 1344 OUT
FLAG 1360 1248 IN
TEXT 2032 1640 Left 2 !.tran 500u startup