Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\c24451a626fd_Triangle_osc_fm_am1.asc
* Generated by LTspice 26.0.1 for Windows.
C1 tri_c 0 1n
B1 tri_c 0 I=-V(freq)*(1-2*V(tri_cmp))*4e-4
R1 tri_c 0 1G
B2 tri_out 0 V=V(ampl)*V(tri_c) tripdt=0.1u
V1 freq 0 PWL(0 1 1m 1 2m 0.2)
V2 ampl 0 PWL(0 1 5m 1 6m 0.2)
A1 tri_c 0 0 0 0 0 tri_cmp 0 SCHMITT Vt=0 Vh=1 trise=10n tripdt=10n
.tran 0 10m 0 1u
.ic V(tri_c)=10m
.options plotwinsize=0
* TRIANGLE OSCILLATOR\n \nFrequency and amplitude contol:\nFreq: 100KHz/Volt\nAmplitude: +/-1V / Volt
* Frequency control
* Amplitude control
* TRIANGLE OSCILLATOR \nInput: freq frequency control, 100KHz / Volt\nInput: ampl amplitude control, +/-1V / Volt
* Output
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 932
WIRE -464 -240 -544 -240
WIRE 32 -240 -48 -240
WIRE -544 -208 -544 -240
WIRE -48 -208 -48 -240
WIRE -544 -96 -544 -128
WIRE -48 -96 -48 -128
WIRE -192 176 -544 176
WIRE -128 176 -192 176
WIRE -96 176 -128 176
WIRE 16 176 -96 176
WIRE 176 176 80 176
WIRE 16 208 -32 208
WIRE -32 240 -32 208
WIRE -192 256 -192 176
WIRE -544 272 -544 176
WIRE -96 272 -96 176
WIRE 176 288 112 288
WIRE 112 320 112 288
WIRE -544 416 -544 352
WIRE -192 416 -192 336
WIRE -96 416 -96 336
WIRE 112 416 112 400
FLAG -96 416 0
FLAG -32 240 0
FLAG 176 176 tri_cmp
IOPIN 176 176 Out
FLAG -544 416 0
FLAG -192 416 0
FLAG -128 176 tri_c
FLAG 176 288 tri_out
IOPIN 176 288 Out
FLAG 112 416 0
FLAG -544 -96 0
FLAG -464 -240 freq
IOPIN -464 -240 Out
FLAG -48 -96 0
FLAG 32 -240 ampl
IOPIN 32 -240 Out
SYMBOL cap -112 272 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL bi -544 272 R0
SYMATTR InstName B1
SYMATTR Value I=-V(freq)*(1-2*V(tri_cmp))*4e-4
SYMBOL res -208 240 R0
SYMATTR InstName R1
SYMATTR Value 1G
SYMBOL bv 112 304 R0
SYMATTR InstName B2
SYMATTR Value V=V(ampl)*V(tri_c)
SYMATTR Value2 tripdt=0.1u
SYMBOL voltage -544 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 1 1m 1 2m 0.2)
SYMBOL voltage -48 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 1 5m 1 6m 0.2)
SYMBOL Digital\\diffschmitt 16 128 R0
SYMATTR InstName A1
SYMATTR SpiceLine Vt=0 Vh=1
SYMATTR SpiceLine2 trise=10n tripdt=10n
TEXT -560 -392 Left 0 !.tran 0 10m 0 1u
TEXT -456 208 Left 0 !.ic V(tri_c)=10m
TEXT -560 -368 Left 0 !.options plotwinsize=0
TEXT -216 -432 Left 0 ;TRIANGLE OSCILLATOR\n \nFrequency and amplitude contol:\nFreq: 100KHz/Volt\nAmplitude: +/-1V / Volt
TEXT -472 -192 Left 0 ;Frequency control
TEXT 24 -184 Left 0 ;Amplitude control
TEXT -552 40 Left 0 ;TRIANGLE OSCILLATOR \nInput: freq        frequency control, 100KHz / Volt\nInput: ampl      amplitude control, +/-1V / Volt
TEXT 296 288 Left 0 ;Output
RECTANGLE Normal 384 512 -608 0
* Z:\tmp\asc_dec_bjh7r6w2\0544a8b8304e_calculs_amplification_2_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 N001 8k
XU3 N004 N001 N003 N006 N002 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 N005 0 3.3
* Library below included based on ModelFile attribute of instance XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE 368 -32 320 -32
WIRE 592 -32 448 -32
WIRE 320 48 320 -32
WIRE 320 48 272 48
WIRE 912 80 432 80
WIRE 432 112 432 80
WIRE 320 128 320 48
WIRE 400 128 320 128
WIRE 592 144 592 -32
WIRE 592 144 464 144
WIRE 400 160 224 160
WIRE 48 192 -128 192
WIRE -128 208 -128 192
WIRE 432 464 432 176
SYMBOL res 464 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 8k
SYMBOL OpAmps\\UniversalOpAmp 432 144 R0
SYMATTR InstName U3
SYMBOL voltage -128 192 R0
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG -128 288 0
* Z:\home\khalils\Downloads\files\data\raw_asc\faa99329a21d_TransmissionLineInverter.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax. The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors. A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements. One for the normal(differential) mode and\nthe other for the common mode. Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world. These modes\nwith have different propagation speeds and impedances. If both modes\nare modeled, then you can simulate a transmission line inverter.
V1 N001 0 PULSE(0 1 0 1n 1n 10n) Rser=50
T1 N001 0 0 N002 Td=50n Z0=50
T2 0 0 N002 0 Td=30n Z0=150
.tran 0 500n 0 1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 680
WIRE 128 192 -368 192
WIRE 320 192 224 192
WIRE 128 224 64 224
WIRE 288 224 224 224
WIRE -368 240 -368 192
WIRE 64 272 64 224
WIRE 64 272 -16 272
WIRE 288 272 288 224
WIRE 384 272 288 272
WIRE 64 304 64 272
WIRE 128 304 64 304
WIRE 288 304 288 272
WIRE 288 304 224 304
WIRE 128 336 64 336
WIRE 288 336 224 336
WIRE -368 368 -368 320
WIRE -16 368 -16 272
WIRE 64 368 64 336
WIRE 288 368 288 336
SYMBOL tline 176 320 R0
WINDOW 0 -1 -21 Bottom 2
WINDOW 3 0 21 Top 2
SYMATTR InstName T2
SYMATTR Value Td=30n Z0=150
SYMBOL tline 176 208 R0
WINDOW 0 2 -19 Bottom 2
WINDOW 3 3 20 Top 2
SYMATTR InstName T1
SYMBOL voltage -368 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 132 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1n 1n 10n)
FLAG 64 368 0
FLAG 288 368 0
FLAG -368 368 0
FLAG -16 368 0
FLAG 320 192 0
TEXT 264 416 Left 2 !.tran 0 500n 0 1n
TEXT 0 440 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT -376 -200 Left 2 ;This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax.  The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors.  A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements.  One for the normal(differential) mode and\nthe other for the common mode.  Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world.  These modes\nwith have different propagation speeds and impedances.  If both modes\nare modeled, then you can simulate a transmission line inverter.
* Z:\home\khalils\Downloads\files\data\raw_asc\1e3e7af2fa94_UniversalOpAmp5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp5.asy)
XU1 N001 OUT +V -V OUT level5 Avol=1Meg GBW=10Meg Phimargin=45 SlewPos=10Meg SlewNeg=10Meg En=0 Enk=0 In=0 Ink=0 Rcm=500Meg Ccm=1p Rdiff=500k Cdiff=2p Ro=1k Vos=0 Ibp=2n Ibn=1n Iq=1m Rail=0 Ilimit=25m ;pnba In+)In-)V+)V-)OUT
C1 OUT 0 10p
V3 N001 0 PULSE(-50m 50m 250n 1n 1n 1u 2u)
V1 +V 0 15
R1 OUT 0 10k
V2 -V 0 -15
.tran 1.5u
.lib UniversalOpAmp5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1112
WIRE 560 560 400 560
WIRE 496 624 496 608
WIRE 400 640 400 560
WIRE 464 640 400 640
WIRE 560 656 560 560
WIRE 560 656 528 656
WIRE 656 656 560 656
WIRE 464 672 400 672
WIRE 560 672 560 656
WIRE 656 672 656 656
WIRE 496 704 496 688
WIRE 176 752 176 736
WIRE 288 752 288 736
WIRE 400 752 400 672
WIRE 560 768 560 752
WIRE 656 768 656 736
WIRE 176 848 176 832
WIRE 288 848 288 832
WIRE 400 848 400 832
SYMBOL voltage 288 736 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 400 736 R0
WINDOW 0 25 13 Left 2
WINDOW 3 27 90 Left 2
WINDOW 123 27 116 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(-50m 50m 250n 1n 1n 1u 2u)
SYMBOL voltage 176 736 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL cap 640 672 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL UniversalOpAmp5 496 656 R0
WINDOW 123 80 -112 Left 2
WINDOW 39 80 -80 Left 2
WINDOW 40 80 -48 Left 2
SYMATTR InstName U1
SYMBOL res 544 656 R0
SYMATTR InstName R1
SYMATTR Value 10k
FLAG 288 848 0
FLAG 176 848 0
FLAG 176 736 +V
FLAG 288 736 -V
FLAG 400 848 0
FLAG 496 704 -V
FLAG 496 608 +V
FLAG 656 768 0
FLAG 560 768 0
FLAG 656 656 OUT
TEXT 152 904 Left 2 !.tran 1.5u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4622.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4622.asy)
C1 OUT1 0 47 Rser=5m
V1 IN 0 12
R2 N001 0 90.9K
Rload1 OUT1 0 .4
R1 N002 0 40.2K
XU1 NC_01 OUT2 IN NC_02 NC_03 IN 0 NC_04 N002 NC_05 NC_06 OUT1 IN MP_07 MP_08 MP_09 MP_10 MP_11 IN MP_12 IN MP_13 MP_14 MP_15 MP_16 NC_17 NC_18 N001 LTM4622 ;pnba Pgood1)Vout2)Run1)Sync/Mode)FREQ)Run2)GND)Pgood2)FB2)Track/SS2)COMP2)Vout1)Vin2))))))IntVcc))Vin1)))))COMP1)Track/SS1)FB1
C2 OUT2 0 47 Rser=5m
Rload2 OUT2 0 .6
.tran .5m startup
.lib LTM4622.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 772
WIRE 16 -80 -96 -80
WIRE 160 -80 16 -80
WIRE 432 -80 160 -80
WIRE -96 -64 -96 -80
WIRE 160 -64 160 -80
WIRE 16 0 16 -80
WIRE 32 0 16 0
WIRE 432 0 432 -80
WIRE 432 0 416 0
WIRE -96 32 -96 16
WIRE 16 96 16 0
WIRE 32 96 16 96
WIRE 432 96 432 0
WIRE 432 96 416 96
WIRE -128 288 -272 288
WIRE 32 288 -128 288
WIRE 592 288 416 288
WIRE 688 288 592 288
WIRE -272 304 -272 288
WIRE -128 304 -128 288
WIRE 592 304 592 288
WIRE 688 304 688 288
WIRE 32 384 -64 384
WIRE 496 384 416 384
WIRE -272 400 -272 384
WIRE -128 400 -128 368
WIRE -64 400 -64 384
WIRE 496 400 496 384
WIRE 592 400 592 368
WIRE 688 400 688 384
WIRE -64 496 -64 480
WIRE 496 496 496 480
WIRE 160 656 160 640
SYMBOL res 480 384 R0
SYMATTR InstName R1
SYMATTR Value 40.2K
SYMBOL res 672 288 R0
SYMATTR InstName Rload2
SYMATTR Value .6
SYMBOL res -80 384 R0
SYMATTR InstName R2
SYMATTR Value 90.9K
SYMBOL res -288 288 R0
SYMATTR InstName Rload1
SYMATTR Value .4
SYMBOL LTM4622 224 336 R0
SYMATTR InstName U1
SYMBOL cap 576 304 R0
SYMATTR InstName C2
SYMATTR Value 47
SYMATTR SpiceLine Rser=5m
SYMBOL voltage -96 -80 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap -144 304 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMATTR SpiceLine Rser=5m
FLAG 160 656 0
FLAG -96 32 0
FLAG 496 496 0
FLAG -64 496 0
FLAG -128 400 0
FLAG -272 400 0
FLAG 592 400 0
FLAG 688 400 0
FLAG 688 288 OUT2
FLAG -272 288 OUT1
FLAG -96 -80 IN
TEXT 480 584 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\388446504cff_Lossless-transmission-line-pulse.asc
* Generated by LTspice 26.0.1 for Windows.
* Lossless TL
* Try \n1. matched line Rs = RL = 50 ohm both in time and frequency domain --> No reflection occurs\n2. Non matched line Rs = RL = 75 Ohm --> Reflection occurs\n3. Non matched line Rs = RL = 1k Ohm --> Reflection occurs
* Lossless transmission line DC pulse
;.ac dec 1000 100Meg 1G
RS N002 N001 1k
RL N003 0 1k
V1 N001 0 PULSE(0 1 1p 1p 1p 5n) AC 1
T1 N002 0 N003 0 Td=50n Z0=50
.tran 250n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -160 96 -208 96
WIRE 160 96 -80 96
WIRE 480 96 256 96
WIRE -208 128 -208 96
WIRE 160 128 96 128
WIRE 384 128 256 128
WIRE 480 128 480 96
WIRE -208 224 -208 208
WIRE 96 224 96 128
WIRE 96 224 -208 224
WIRE -208 256 -208 224
WIRE 384 256 384 128
WIRE 480 256 480 208
WIRE 480 256 384 256
WIRE 480 272 480 256
SYMBOL tline 208 112 R0
SYMATTR InstName T1
SYMBOL res -64 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RS
SYMATTR Value 1k
SYMBOL res 464 112 R0
SYMATTR InstName RL
SYMATTR Value 1k
SYMBOL voltage -208 112 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 1p 1p 1p 5n)
FLAG -208 256 0
FLAG 480 272 0
TEXT -240 296 Left 2 !.tran 250n
TEXT -240 336 Left 2 !;.ac dec 1000 100Meg 1G
TEXT 168 48 Left 2 ;Lossless TL
TEXT -232 -136 Left 2 ;Try \n1. matched line Rs = RL = 50 ohm both in time and frequency domain --> No reflection occurs\n2. Non matched line Rs = RL = 75  Ohm --> Reflection occurs\n3. Non matched line Rs = RL = 1k Ohm --> Reflection occurs
TEXT -16 -216 Left 4 ;Lossless transmission line DC pulse
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1212.asc
* Generated by LTspice 26.0.1 for Windows.
* Input Bias Current Cancellation
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1212.asy)
C1 N003 N002 22p
R1 OUT N001 5K
V3 IN 0 PWL(0 1 1 5)
XU1 IN N001 +V 0 OUT LT1211 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
R3 N003 N002 1Meg
XU2 N001 N003 +V 0 N002 LT1211 ;pnba In+)In-)V+)V-)OUT
R4 N002 IN 1Meg
R2 N001 0 5K
.tran 1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 704
WIRE 32 112 16 112
WIRE 128 112 112 112
WIRE 144 112 128 112
WIRE 256 112 224 112
WIRE 192 208 192 192
WIRE 128 224 128 112
WIRE 160 224 128 224
WIRE 256 240 256 112
WIRE 256 240 224 240
WIRE 336 240 256 240
WIRE 64 256 -128 256
WIRE 160 256 64 256
WIRE -288 272 -288 256
WIRE -128 272 -128 256
WIRE 192 288 192 272
WIRE 64 320 64 256
WIRE 128 336 128 224
WIRE 288 336 128 336
WIRE -288 368 -288 352
WIRE -128 368 -128 352
WIRE 224 400 224 384
WIRE 288 416 288 336
WIRE 288 416 256 416
WIRE 64 432 64 400
WIRE 192 432 64 432
WIRE 288 448 256 448
WIRE 224 480 224 464
WIRE 64 528 64 432
WIRE 96 528 64 528
WIRE 288 528 288 448
WIRE 288 528 176 528
WIRE 64 592 64 528
WIRE 192 592 64 592
WIRE 288 592 288 528
WIRE 288 592 256 592
SYMBOL voltage -128 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 1 1 5)
SYMBOL voltage -288 256 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 48 416 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL res 192 512 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL cap 256 576 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 22p
SYMBOL res 240 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL opamps\\LT1212 224 496 R180
WINDOW 0 22 91 Left 2
WINDOW 3 25 39 Left 2
SYMATTR InstName U2
SYMBOL opamps\\LT1212 192 176 R0
SYMATTR InstName U1
FLAG -288 368 0
FLAG 192 192 +V
FLAG -288 256 +V
FLAG 16 112 0
FLAG -128 368 0
FLAG 224 480 +V
FLAG 192 288 0
FLAG 224 384 0
FLAG 336 240 OUT
FLAG -128 256 IN
TEXT 360 576 Left 2 !.tran 1
TEXT 176 48 Bottom 2 ;Input Bias Current Cancellation
* Z:\home\khalils\Downloads\files\data\raw_asc\0ca4879a272e_6106.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6106.asy)
I1 N001 0 SINE(1 1 1K)
R3 N002 N003 100
XU1 N004 0 N003 N001 N002 LT6106 ;pnba OUT)VEE)IN-)IN+)VCC
R1 N004 0 1K
V1 N002 0 20
R2 N002 N001 20m
.tran 3m
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 -96 -112 -96
WIRE 176 -96 112 -96
WIRE 336 -96 256 -96
WIRE 416 -96 336 -96
WIRE 496 -96 416 -96
WIRE -112 -80 -112 -96
WIRE 336 -80 336 -96
WIRE 496 -80 496 -96
WIRE -112 16 -112 0
WIRE 496 16 496 0
WIRE 112 48 112 -96
WIRE 128 48 112 48
WIRE 336 48 336 0
WIRE 336 48 320 48
WIRE 128 96 112 96
WIRE 416 96 416 -96
WIRE 416 96 320 96
WIRE 400 224 320 224
WIRE 400 240 400 224
WIRE 400 336 400 320
SYMBOL opamps\\LT6106 224 112 R0
SYMATTR InstName U1
SYMBOL res 320 -96 R0
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL voltage 496 -96 R0
SYMATTR InstName V1
SYMATTR Value 20
SYMBOL res 272 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 20m
SYMBOL res 384 224 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL current -112 -80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value SINE(1 1 1K)
FLAG 400 336 0
FLAG 112 96 0
FLAG -112 16 0
FLAG 496 16 0
TEXT 480 264 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3526B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3526B.asy)
XU1 N002 0 N001 N001 N003 OUT LTC3526B ;pnba SW)GND)Vin)_SHDN)FB)Vout
R2 N003 0 1Meg
Rload OUT 0 250
L1 N001 N002 4.7 Rpar=5K
R1 OUT N003 1.78Meg
C1 OUT 0 4.7 Rser=1m
V1 N001 0 2
.tran 350u startup
.lib LTC3526B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 80 -144 80
WIRE 0 80 -48 80
WIRE 128 80 80 80
WIRE -144 96 -144 80
WIRE 128 128 128 80
WIRE -144 192 -144 176
WIRE -48 192 -48 80
WIRE -16 192 -48 192
WIRE 320 192 272 192
WIRE 464 192 320 192
WIRE 576 192 464 192
WIRE 320 208 320 192
WIRE 464 208 464 192
WIRE 576 208 576 192
WIRE 464 304 464 272
WIRE 576 304 576 288
WIRE -48 320 -48 192
WIRE -16 320 -48 320
WIRE 320 320 320 288
WIRE 320 320 272 320
WIRE 320 336 320 320
WIRE 128 416 128 384
WIRE 320 432 320 416
SYMBOL voltage -144 80 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL res 560 192 R0
SYMATTR InstName Rload
SYMATTR Value 250
SYMBOL res 304 192 R0
SYMATTR InstName R1
SYMATTR Value 1.78Meg
SYMBOL ind -16 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=5K
SYMBOL res 304 320 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL cap 448 208 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1m
SYMBOL PowerProducts\\LTC3526B 128 256 R0
SYMATTR InstName U1
FLAG -144 192 0
FLAG 128 416 0
FLAG 320 432 0
FLAG 464 304 0
FLAG 576 304 0
FLAG 576 192 OUT
TEXT 432 376 Left 2 !.tran 350u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4601HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4601HV.asy)
R1 N004 0 40.2K
V1 IN 0 6
R4 IN N003 100K
R2 N008 0 392K
C2 OUT 0 100
Rload OUT 0 .25
XU1 IN 0 OUT 0 N006 N006 OUT 0 N002 N004 N007 N012 N010 N009 N008 N005 N003 N011 N001 N007 LTM4601 ;pnba Vin)PGND)Vout)Vosns-)Vout_LCL)DiffVout)Vosns+)SGND)Pgood)FB)DRVcc)MARG1)MARG0)Fset)MPGM)Comp)Run)Track/SS)PLLIN)INTVcc
C1 OUT N004 100p
R3 IN N002 100K
C3 N011 0 .001
.tran 750u startup
.lib LTM4601.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1032 680
WIRE -160 -16 -256 -16
WIRE 128 -16 -160 -16
WIRE -256 0 -256 -16
WIRE 128 0 128 -16
WIRE 272 0 272 -16
WIRE -160 48 -160 -16
WIRE -144 48 -160 48
WIRE 16 48 -64 48
WIRE 432 48 400 48
WIRE 576 48 432 48
WIRE 656 48 576 48
WIRE 576 64 576 48
WIRE -256 96 -256 80
WIRE -160 112 -160 48
WIRE -80 112 -160 112
WIRE 16 112 0 112
WIRE 432 112 400 112
WIRE 480 112 432 112
WIRE 480 128 480 112
WIRE 576 144 576 128
WIRE 16 176 0 176
WIRE 432 176 400 176
WIRE 480 224 480 208
WIRE 16 240 0 240
WIRE 432 240 432 176
WIRE 432 240 400 240
WIRE 656 272 656 48
WIRE 656 272 576 272
WIRE 720 272 656 272
WIRE 720 288 720 272
WIRE 0 304 0 240
WIRE 16 304 0 304
WIRE 576 304 576 272
WIRE 576 304 400 304
WIRE -80 368 -96 368
WIRE 16 368 0 368
WIRE 576 368 400 368
WIRE 576 384 576 368
WIRE 720 384 720 368
WIRE 720 384 576 384
WIRE 720 400 720 384
WIRE 16 432 0 432
WIRE 416 432 400 432
WIRE -64 496 -80 496
WIRE 16 496 0 496
WIRE 416 496 400 496
WIRE 128 576 128 560
WIRE 288 576 288 560
SYMBOL res 16 384 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 392K
SYMBOL PowerProducts\\LTM4601HV 208 256 R0
SYMATTR InstName U1
SYMBOL res 704 272 R0
SYMATTR InstName Rload
SYMATTR Value .25
SYMBOL cap 560 64 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMBOL res -96 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL cap 0 480 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL res 464 112 R0
SYMATTR InstName R1
SYMATTR Value 40.2K
SYMBOL voltage -256 -16 R0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL res -160 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 416 48 R0
WINDOW 0 34 18 Left 2
WINDOW 3 35 47 Left 2
SYMATTR InstName C1
SYMATTR Value 100p
FLAG 128 576 0
FLAG 288 576 0
FLAG 480 224 0
FLAG -96 368 0
FLAG 576 144 0
FLAG 720 400 0
FLAG -256 96 0
FLAG -80 496 0
FLAG 720 272 OUT
FLAG -256 -16 IN
TEXT 472 496 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\19d85dac0967_5400-6.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\LT5400-6.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1468.asy)
C1 N001 OUT 4.7p
V3 IN 0 AC 1
XU1 OUT IN 0 0 N002 N002 N001 N001 NC_01 LT5400-6 ;pnba 1)2)3)4)5)6)7)8)PAD
C2 N002 0 4.7p
V2 -V 0 -15
XU2 N002 N001 +V -V OUT LT1468 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
.ac oct 10 1K 10Meg
.lib LT5400.lib
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2836 1472
WIRE 2304 624 1936 624
WIRE 1936 688 1936 624
WIRE 2016 688 1936 688
WIRE 2192 688 2080 688
WIRE 1936 816 1936 688
WIRE 1952 816 1936 816
WIRE 2192 816 2192 688
WIRE 2192 816 2144 816
WIRE 1952 880 1744 880
WIRE 2192 880 2192 816
WIRE 2192 880 2144 880
WIRE 1392 896 1392 880
WIRE 1520 896 1520 880
WIRE 1744 896 1744 880
WIRE 2192 896 2192 880
WIRE 2208 896 2192 896
WIRE 2304 912 2304 624
WIRE 2304 912 2272 912
WIRE 2336 912 2304 912
WIRE 2208 928 2192 928
WIRE 1952 944 1936 944
WIRE 2192 944 2192 928
WIRE 2192 944 2144 944
WIRE 1392 992 1392 976
WIRE 1520 992 1520 976
WIRE 1744 992 1744 976
WIRE 1920 1008 1872 1008
WIRE 1952 1008 1920 1008
WIRE 2192 1008 2192 944
WIRE 2192 1008 2144 1008
WIRE 1920 1120 1920 1008
WIRE 2016 1120 1920 1120
WIRE 2192 1120 2192 1008
WIRE 2192 1120 2080 1120
SYMBOL voltage 1392 880 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL cap 2080 1104 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7p
SYMBOL misc\\LT5400-6 2048 912 R0
SYMATTR InstName U1
SYMBOL voltage 1520 880 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL cap 2080 672 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7p
SYMBOL voltage 1744 880 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL opamps\\LT1468 2240 848 R0
SYMATTR InstName U2
FLAG 2240 880 +V
FLAG 2240 944 -V
FLAG 2336 912 OUT
FLAG 1520 992 0
FLAG 1520 880 +V
FLAG 1392 992 0
FLAG 1392 880 -V
FLAG 1744 992 0
FLAG 1744 880 IN
FLAG 1872 1008 0
FLAG 1936 944 0
TEXT 2312 1064 Left 2 !.ac oct 10 1K 10Meg