* Z:\home\khalils\Downloads\files\data\raw_asc\AD8231.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +VS 0 {Vdd}
V2 REF 0 {Vdd/2}
R1 OUTA 0 10k
R2 OUTB 0 10k
V3 N001 REF 0 AC 1
V4 A0 0 {A0}
V5 A1 0 {A1}
V6 A2 0 {A2}
E1 NORM 0 OUTA 0 {1/Gain}
XU1 REF N001 +VS REF OUTB OUTB REF OUTA 0 +VS A0 A1 A2 AD8231 ;pnba 1)2)3)4)5)6)7)8)9)10)11)12)13
.ac dec 20 100 10Meg
.param Vdd=5
.step param Gain list 1 2 4 8 16 32 64 128
* PGA gain control
.param A0 = Table({Gain}, 1, 0, 2, {Vdd}, 4, 0, 8, {Vdd}, 16, 0, 32, {Vdd}, 64, 0, 128, {Vdd})
.param A1 = Table({Gain}, 1, 0, 2, 0, 4, {Vdd}, 8, {Vdd}, 16, 0, 32, 0, 64, {Vdd}, 128, {Vdd})
.param A2 = Table({Gain}, 8, 0, 16, {Vdd})
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8231.asy)
.lib AD8231.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 920 1308
WIRE 448 -160 432 -160
WIRE 560 -160 544 -160
WIRE 672 -160 656 -160
WIRE 432 -144 432 -160
WIRE 544 -144 544 -160
WIRE 656 -144 656 -160
WIRE 144 -64 -16 -64
WIRE 208 -64 144 -64
WIRE 304 -64 288 -64
WIRE 432 -48 432 -64
WIRE 544 -48 544 -64
WIRE 656 -48 656 -64
WIRE -16 16 -16 -64
WIRE 32 16 32 0
WIRE 64 16 64 0
WIRE 96 16 96 0
WIRE 144 16 144 -64
WIRE 448 48 416 48
WIRE 560 48 448 48
WIRE 560 80 560 48
WIRE 448 96 448 48
WIRE 448 96 416 96
WIRE -192 128 -240 128
WIRE -80 128 -192 128
WIRE 448 160 416 160
WIRE 560 176 560 160
WIRE -192 192 -192 128
WIRE 560 240 416 240
WIRE 656 240 560 240
WIRE 720 240 704 240
WIRE 560 272 560 240
WIRE 704 272 704 240
WIRE 656 288 656 240
WIRE -192 352 -192 272
WIRE -80 352 -192 352
WIRE 560 368 560 352
WIRE 656 368 656 336
WIRE 656 368 560 368
WIRE 704 368 704 352
WIRE 704 368 656 368
WIRE 560 384 560 368
WIRE -16 416 -16 400
WIRE 240 448 240 400
WIRE 240 480 240 448
WIRE 240 576 240 560
FLAG -16 416 0
FLAG 304 -64 0
FLAG -16 -64 +VS
FLAG 240 576 0
FLAG 560 384 0
FLAG 560 240 OUTA
FLAG 240 448 REF
FLAG 448 160 REF
FLAG 560 48 OUTB
FLAG 560 176 0
FLAG -240 128 REF
FLAG 32 0 A0
FLAG 64 0 A1
FLAG 96 0 A2
FLAG 432 -48 0
FLAG 432 -160 A0
FLAG 544 -48 0
FLAG 544 -160 A1
FLAG 656 -48 0
FLAG 656 -160 A2
FLAG 704 240 NORM
SYMBOL voltage 192 -64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value {Vdd}
SYMBOL voltage 240 464 R0
SYMATTR InstName V2
SYMATTR Value {Vdd/2}
SYMBOL res 544 256 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 544 64 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage -192 288 M180
WINDOW 0 24 96 Left 2
WINDOW 3 16 11 Left 2
SYMATTR InstName V3
SYMATTR Value 0 AC 1
SYMBOL voltage 432 -160 R0
SYMATTR InstName V4
SYMATTR Value {A0}
SYMBOL voltage 544 -160 R0
SYMATTR InstName V5
SYMATTR Value {A1}
SYMBOL voltage 656 -160 R0
SYMATTR InstName V6
SYMATTR Value {A2}
SYMBOL e 704 256 R0
SYMATTR InstName E1
SYMATTR Value {1/Gain}
SYMBOL AD8231 144 208 R0
SYMATTR InstName U1
TEXT -328 -200 Left 2 !.ac dec 20 100 10Meg\n.param Vdd=5\n.step param Gain list 1 2 4 8 16 32 64 128
TEXT -296 640 Left 2 ;PGA gain control
TEXT -304 672 Left 2 !.param A0 = Table({Gain}, 1, 0, 2, {Vdd}, 4, 0, 8, {Vdd}, 16, 0, 32, {Vdd}, 64, 0, 128, {Vdd})\n.param A1 = Table({Gain}, 1, 0, 2, 0, 4, {Vdd}, 8, {Vdd}, 16, 0, 32, 0, 64, {Vdd}, 128, {Vdd})\n.param A2 = Table({Gain}, 8, 0, 16, {Vdd})