Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1524fa6125e1_LED_BICOLOR.asc
* Generated by LTspice 26.0.1 for Windows.
D1 A1 K LEDRed
D2 A2 K LEDGreen
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 80 144 32
WIRE 256 80 256 32
WIRE 144 176 144 144
WIRE 192 176 144 176
WIRE 256 176 256 144
WIRE 256 176 192 176
WIRE 192 224 192 176
FLAG 192 224 K
IOPIN 192 224 BiDir
FLAG 144 32 A1
IOPIN 144 32 BiDir
FLAG 256 32 A2
IOPIN 256 32 BiDir
SYMBOL LED 128 80 R0
SYMATTR InstName D1
SYMATTR Value LEDRed
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL LED 240 80 R0
SYMATTR InstName D2
SYMATTR Value LEDGreen
SYMATTR Description Diode
SYMATTR Type diode
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1218.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Supply Current Sense
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1218.asy)
XU1 N003 N001 +V 0 N002 NC_01 LT1218 ;pnba In+)In-)V+)V-)OUT)SHDN
MQ1 OUT N002 N001 N001 BSS84
I1 N003 0 SINE(100m 100m 1K)
R3 OUT 0 20K
V1 +V 0 5
R2 +V N003 .2
R1 N001 +V 200
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 0 96 -144 96
WIRE 32 96 0 96
WIRE 128 96 112 96
WIRE 368 96 128 96
WIRE -144 112 -144 96
WIRE 0 128 0 96
WIRE -144 208 -144 192
WIRE 176 208 176 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 368 224 368 96
WIRE 320 240 224 240
WIRE 0 256 0 208
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 176 288 176 272
WIRE 480 320 368 320
WIRE 368 336 368 320
WIRE 0 368 0 352
WIRE 368 432 368 416
SYMBOL voltage -144 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL current 0 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value SINE(100m 100m 1K)
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL opamps\\LT1218 192 240 R0
SYMATTR InstName U1
SYMBOL res -16 112 R0
SYMATTR InstName R2
SYMATTR Value .2
SYMBOL res 352 320 R0
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL pmos 320 320 M180
WINDOW 0 63 69 Left 2
WINDOW 3 65 35 Left 2
SYMATTR InstName Q1
SYMATTR Value BSS84
FLAG -144 208 0
FLAG 176 192 +V
FLAG -144 96 +V
FLAG 0 368 0
FLAG 176 288 0
FLAG 368 432 0
FLAG 480 320 OUT
TEXT 24 416 Left 2 !.tran 3m
TEXT 88 48 Bottom 2 ;Positive Supply Current Sense
* Z:\home\khalils\Downloads\files\data\raw_asc\2fc95ed4d683_Gates.asc
* Generated by LTspice 26.0.1 for Windows.
A1 0 N001 0 N002 0 V1_NAND_V2 V1_AND_V2 0 AND
A2 0 N001 0 N002 0 V1_NOR_V2 V1_OR_V2 0 OR
A3 N001 0 0 0 0 V1_NOT_V2 0 0 BUF
A4 0 N001 0 N002 0 V1_XNOR_V2 V1_XOR_V2 0 XOR
V2 N002 0 PULSE(0 5 0 5ns 5ns 20ms 40ms)
V1 N001 0 PULSE(0 5 0 5ns 5ns 10ms 20ms)
.tran 240
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 -48 32 -48
WIRE 336 -48 304 -48
WIRE 560 -48 400 -48
WIRE 256 -16 128 -16
WIRE 336 -16 256 -16
WIRE 560 -16 400 -16
WIRE 304 64 304 -48
WIRE 336 64 304 64
WIRE 560 64 400 64
WIRE 256 96 256 -16
WIRE 336 96 256 96
WIRE 560 96 400 96
WIRE 32 192 32 -48
WIRE 304 192 304 64
WIRE 336 192 304 192
WIRE 560 192 400 192
WIRE 128 208 128 -16
WIRE 304 272 304 192
WIRE 336 272 304 272
WIRE 560 272 400 272
WIRE 256 304 256 96
WIRE 336 304 256 304
WIRE 560 304 416 304
IOPIN 560 -48 Out
IOPIN 560 -16 Out
IOPIN 560 64 Out
IOPIN 560 96 Out
IOPIN 560 192 Out
IOPIN 560 272 Out
IOPIN 560 304 Out
SYMBOL Digital\\xor 384 224 R0
SYMATTR InstName A4
SYMBOL Digital\\or 368 16 R0
SYMATTR InstName A2
SYMBOL Digital\\inv 336 128 R0
SYMATTR InstName A3
SYMBOL voltage 128 192 R0
WINDOW 3 -168 113 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 5ns 5ns 20ms 40ms)
SYMBOL Digital\\and 368 -96 R0
SYMATTR InstName A1
SYMBOL voltage 32 176 R0
WINDOW 3 -304 74 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 5ns 5ns 10ms 20ms)
FLAG 32 272 0
FLAG 128 288 0
FLAG 560 -48 V1_AND_V2
FLAG 560 -16 V1_NAND_V2
FLAG 560 64 V1_OR_V2
FLAG 560 96 V1_NOR_V2
FLAG 560 192 V1_NOT_V2
FLAG 560 272 V1_XOR_V2
FLAG 560 304 V1_XNOR_V2
TEXT -308 380 Left 2 !.tran 240
* Z:\home\khalils\Downloads\files\data\raw_asc\12e5fb8e0ad6_Motor.asc
* Generated by LTspice 26.0.1 for Windows.
LJ N002 N004 {lj}
BH_TORQ N002 0 V=I(E_BMF)*kt
RM N003 N005 {rm}
BE_BMF N005 0 V=I(RB)*kemf
RB N004 0 {rb}
LM N001 N003 {lm}
V1 N001 0 36
.param lm=1.5m rm=0.5 kt=0.05 rb=0.0001 lj=0.00025 kemf=kt
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 -352 -240 -352
WIRE 560 -304 304 -304
WIRE -240 -288 -240 -352
WIRE 64 -288 64 -352
WIRE -240 -176 -240 -208
WIRE 304 -176 304 -304
WIRE 560 -176 560 -304
WIRE 64 -160 64 -208
WIRE 304 -32 304 -96
WIRE 560 -32 560 -96
WIRE 64 -16 64 -80
WIRE 560 128 560 48
WIRE 64 144 64 64
SYMBOL res 48 -176 R0
SYMATTR InstName RM
SYMATTR Value {rm}
SYMBOL voltage -240 -304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 36
SYMBOL ind 48 -304 R0
SYMATTR InstName LM
SYMATTR Value {lm}
SYMBOL bv 64 -32 R0
SYMATTR InstName E_BMF
SYMATTR Value V=I(RB)*kemf
SYMBOL ind 544 -192 R0
SYMATTR InstName LJ
SYMATTR Value {lj}
SYMBOL res 544 -48 R0
SYMATTR InstName RB
SYMATTR Value {rb}
SYMBOL bv 304 -192 R0
SYMATTR InstName H_TORQ
SYMATTR Value V=I(E_BMF)*kt
FLAG 64 144 0
FLAG -240 -176 0
FLAG 560 128 0
FLAG 304 -32 0
TEXT -520 264 Left 2 !.param lm=1.5m rm=0.5 kt=0.05 rb=0.0001 lj=0.00025 kemf=kt
TEXT -522 284 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\0ae0a20f24e9_nmos.asc
* Generated by LTspice 26.0.1 for Windows.
* I = 500mA @ Rload = 8.955 Vg=5\nI = 903mA @ Rload = 0 Vg=5\nI = 903mA @ Rload = 5.157 Vg=10
MQ1 d N002 0 0 IRF510
Rload d N001 R
Vg N002 0
Vd N001 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vg 0 10 0.1
.meas R find V(d)/Id(Q1) when Vg=5
.meas P find V(d)*Id(Q1) when Vg=5
.meas I find Id(Q1) when Vg=5
.meas v find V(d) when Vg=5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 112 16 112
WIRE 368 112 208 112
WIRE 368 144 368 112
WIRE 16 224 16 112
WIRE 320 224 160 224
WIRE 368 272 368 240
WIRE 160 304 160 224
SYMBOL Res 224 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rload
SYMBOL Voltage 160 288 R0
SYMATTR InstName Vg
SYMATTR Value ""
SYMBOL Voltage 16 208 R0
WINDOW 3 38 82 Left 2
SYMATTR Value 5
SYMATTR InstName Vd
SYMBOL nmos 320 144 R0
SYMATTR InstName Q1
SYMATTR Value IRF510
FLAG 368 272 0
FLAG 16 304 0
FLAG 160 384 0
FLAG 368 112 d
TEXT 472 264 Left 2 !.dc Vg 0 10 0.1
TEXT 296 352 Left 2 !.meas R find V(d)/Id(Q1) when Vg=5
TEXT 216 384 Left 2 !.meas P find V(d)*Id(Q1) when Vg=5
TEXT 352 320 Left 2 !.meas I find Id(Q1) when Vg=5
TEXT 360 296 Left 2 !.meas v find V(d) when Vg=5
TEXT 384 88 Left 2 ;I = 500mA @ Rload = 8.955 Vg=5\nI = 903mA @ Rload = 0 Vg=5\nI = 903mA @ Rload = 5.157 Vg=10
* Z:\home\khalils\Downloads\files\data\raw_asc\aa7fecb9bb7a_LDO_-_CVS.asc
* Generated by LTspice 26.0.1 for Windows.
* Constant Voltage Power supply
R3 5V 0 100
Q1 N001 N002 5V 0 2N2222
V1 N001 0 12
V2 N002 0 5.77
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 1 0 500n uic
.options numdgt = 7
.options plotwinsize = 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1176 680
WIRE 192 32 48 32
WIRE 784 32 784 -16
WIRE 784 32 288 32
WIRE 784 128 784 32
WIRE 48 144 48 32
WIRE 240 192 240 96
WIRE 480 192 240 192
WIRE 480 240 480 192
WIRE 48 368 48 224
WIRE 480 368 480 320
WIRE 480 368 48 368
WIRE 784 368 784 208
WIRE 784 368 480 368
WIRE 480 400 480 368
SYMBOL voltage 48 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 768 112 R0
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL voltage 480 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5.77
SYMBOL npn 192 96 R270
SYMATTR InstName Q1
SYMATTR Value 2N2222
FLAG 480 400 0
FLAG 784 -16 5V
TEXT 64 384 Left 2 !.tran 0 1 0 500n uic
TEXT 64 416 Left 2 !.options numdgt = 7
TEXT 64 448 Left 2 !.options plotwinsize = 0
TEXT 344 168 Left 2 ;Constant Voltage Power supply
* Z:\home\khalils\Downloads\files\data\raw_asc\1da71189a8d1_DCLink_Gatedriver.asc
* Generated by LTspice 26.0.1 for Windows.
B1 GATEDRIVER 0 V=V(EN)*V(PWM)
R2 DCLINK N002 1
C2 N001 GATEDRIVER 1n
V2 DCLINK 0 PULSE(0 6 100m 1m 1m 100m 200m)
C3 GATE DCLINK 10n
V3 EN NC_02 PULSE(0 1 10m 100n 100n 10m 20m)
D1 N001 GATE 1N5819
R1 GATE DCLINK 1Meg
V1 PWM NC_01 PULSE(0 8 10m 50n 50n 10u 20u)
D2 N002 N001 1N5819
C1 GATE DCLINK 100p
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1248 680
WIRE -416 -208 -416 -224
WIRE -416 -32 -416 -48
WIRE 128 16 80 16
WIRE 400 16 192 16
WIRE 704 16 400 16
WIRE 752 16 704 16
WIRE 784 16 752 16
WIRE 400 48 400 16
WIRE 784 48 784 16
WIRE 704 64 704 16
WIRE -400 112 -416 112
WIRE -32 112 -400 112
WIRE 80 112 80 16
WIRE 80 112 32 112
WIRE 80 160 80 112
WIRE 144 160 80 160
WIRE 256 160 208 160
WIRE 400 160 400 112
WIRE 400 160 336 160
WIRE 624 160 400 160
WIRE 704 160 704 128
WIRE 704 160 624 160
WIRE 784 160 784 128
WIRE 784 160 704 160
WIRE -416 176 -416 112
WIRE 784 176 784 160
WIRE -416 288 -416 256
WIRE 784 288 784 256
SYMBOL schottky 128 32 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 688 64 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL cap 384 48 R0
SYMATTR InstName C3
SYMATTR Value 10n
SYMBOL res 352 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL voltage -416 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 10m 100n 100n 10m 20m)
SYMBOL bv -416 160 R0
SYMATTR InstName B1
SYMATTR Value V=V(EN)*V(PWM)
SYMBOL voltage 784 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 6 100m 1m 1m 100m 200m)
SYMBOL schottky 208 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N5819
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 32 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL voltage -416 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 8 10m 50n 50n 10u 20u)
SYMBOL res 768 32 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
FLAG 784 288 0
FLAG -416 288 0
FLAG 624 160 DCLINK
FLAG 752 16 GATE
FLAG -400 112 GATEDRIVER
FLAG -416 -112 0
FLAG -416 64 0
FLAG -416 -224 PWM
FLAG -416 -48 EN
TEXT -450 328 Left 2 !.tran 500m
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX312.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:\n \nBandwidth = 139MHz.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\MAX312.asy)
XU2 0 v+ vIN1 NC_01 NC_02 NC_03 vNC1 vCOM1 NC_04 NC_05 NC_06 NC_07 NC_08 NC_09 v- vVL MAX312 ;pnba GND)V+)IN1)IN2)IN3)IN4)NC1)COM1)NC2)COM2)NC3)COM3)NC4)COM4)V-)VL
V3 v+ 0 15
V5 vVL 0 5
V1 vIN1 0 PULSE(0 2.4 0 10n 10n 5u 10u)
V2 vNC1 0 15
V4 v- 0 -15
C1 vCOM1 0 36p
R1 vCOM1 0 301
.tran 100u
.param Vdd = 15
.lib MAX312.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2244 1360
WIRE 1072 -256 1056 -256
WIRE 1072 -208 1072 -256
WIRE 912 -128 544 -128
WIRE 960 -128 912 -128
WIRE 1232 -128 1184 -128
WIRE 1280 -128 1232 -128
WIRE 1376 -128 1280 -128
WIRE 1280 -96 1280 -128
WIRE 1376 -80 1376 -128
WIRE 912 -64 704 -64
WIRE 960 -64 912 -64
WIRE 544 -16 544 -128
WIRE 704 -16 704 -64
WIRE 1280 16 1280 -16
WIRE 1376 16 1376 -16
WIRE 544 96 544 64
WIRE 704 96 704 64
WIRE 672 224 608 224
WIRE 848 224 784 224
WIRE 608 288 608 224
WIRE 784 288 784 224
WIRE 1232 320 1184 320
WIRE 1280 320 1232 320
WIRE 1280 368 1280 320
WIRE 608 416 608 368
WIRE 784 416 784 368
WIRE 1280 480 1280 448
WIRE 1120 496 1120 464
WIRE 1024 512 1024 464
WIRE 1024 512 1008 512
RECTANGLE Normal 768 -432 16 -720 2
SYMBOL voltage 1280 352 R0
WINDOW 0 18 8 Left 2
WINDOW 3 15 104 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 5
SYMBOL cap 1360 -80 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage 544 -32 R0
WINDOW 0 33 8 Left 2
WINDOW 3 41 71 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage 704 -32 R0
WINDOW 0 18 8 Left 2
WINDOW 3 -191 178 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 2.4 0 10n 10n 5u 10u)
SYMBOL voltage 608 272 R0
WINDOW 0 58 35 Bottom 2
WINDOW 3 54 69 Top 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL res 1264 -112 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL MAX312 1072 -80 R0
SYMATTR InstName U2
SYMBOL voltage 784 272 R0
WINDOW 0 58 35 Bottom 2
WINDOW 3 54 69 Top 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -15
FLAG 1280 480 0
FLAG 1280 16 0
FLAG 1376 16 0
FLAG 1120 496 0
FLAG 608 416 0
FLAG 704 96 0
FLAG 1056 -256 v+
FLAG 1008 512 v-
FLAG 672 224 v+
FLAG 784 416 0
FLAG 848 224 v-
FLAG 544 96 0
FLAG 1232 -128 vCOM1
FLAG 1232 320 vVL
FLAG 912 -128 vNC1
FLAG 912 -64 vIN1
TEXT 1408 528 Left 2 !.tran 100u
TEXT 32 -696 Left 2 ;Notes:\n \nBandwidth = 139MHz.
TEXT 32 -392 Left 2 !.param Vdd = 15
* Z:\tmp\asc_dec_bjh7r6w2\195d9c47717c_Fig20_48_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
MN N002 Vbias3 N003 0 N_50n l=100n w=2.5u
M6b VDD Vbias1 N001 VDD P_50n l=100n w=5u
M2 N003 Vbias4 0 0 N_50n l=100n w=2.5u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1580 680
WIRE 1200 -368 1152 -368
WIRE 1200 -240 1152 -240
WIRE 1200 -48 1152 -48
WIRE 1200 144 1152 144
WIRE 1248 -320 1248 -352
WIRE 1248 -176 1248 -224
WIRE 1248 -128 1248 -176
WIRE 1248 64 1248 -32
WIRE 1248 192 1248 160
WIRE 1424 -176 1248 -176
SYMBOL nmos4 1200 -128 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=100n w=2.5u
SYMATTR InstName MN
SYMATTR Value N_50n
SYMBOL pmos4 1200 -448 R0
WINDOW 123 58 102 Left 0
WINDOW 0 56 16 Left 0
SYMATTR Value2 l=100n w=5u
SYMATTR InstName M6b
SYMATTR Value P_50n
SYMBOL nmos4 1200 64 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=100n w=2.5u
SYMATTR InstName M2
SYMATTR Value N_50n
FLAG 1248 112 0
FLAG 1248 192 0
FLAG 1248 -80 0
FLAG 1248 -448 VDD
FLAG 1248 -400 VDD
FLAG 1248 -272 VDD
FLAG 1152 -368 Vbias1
FLAG 1152 -240 Vbias2
FLAG 1152 -48 Vbias3
FLAG 1152 144 Vbias4
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6905-80.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6905-80.asy)
V2 N002 0 PULSE(0 3 100n 10n 10n 200n 300n)
V3 N003 0 PWL(0 3 .35u 3 +10n 1.5 .65u 1.5 +10n 0)
V1 N001 0 3
XU1 N001 0 N002 N003 OUT LTC6905-80 ;pnba V+)GND)0E)DIV)OUT
.tran 1u
.lib LTC6905-80.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 680
WIRE 32 160 -80 160
WIRE 288 160 256 160
WIRE -80 176 -80 160
WIRE 32 240 16 240
WIRE -80 272 -80 256
WIRE 32 320 -208 320
WIRE 336 320 256 320
WIRE -208 336 -208 320
WIRE 336 336 336 320
WIRE -208 432 -208 416
WIRE 336 432 336 416
SYMBOL LTC6905-80 144 240 R0
SYMATTR InstName U1
SYMBOL voltage 336 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 3 .35u 3 +10n 1.5 .65u 1.5 +10n 0)
SYMBOL voltage -208 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 3 100n 10n 10n 200n 300n)
SYMBOL voltage -80 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3
FLAG -80 272 0
FLAG 16 240 0
FLAG -208 432 0
FLAG 336 432 0
FLAG 288 160 OUT
TEXT 464 472 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\562848f8c2b9_cmos_inv_ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
* CMOS Inverter
+VTO = -1.40 KP = 3.2e-5 GAMMA = 3.30
+PHI = 0.65 LAMBDA = 9e-2 CBD = 65e-12
+CBS = 2e-14 IS = 1e-15 PB = 0.87
+CGSO = 0 CGDO = 0 CGBO = 1e-5
+CJ = 2e-10 MJ = 0.5 CJSW = 1e-9
+MJSW = 0.33 JS = 1e-8 TOX = 6.89e-10)
+VTO = 1.77 Kp = 2.169e-4 GAMMA = 4.10
+PHI = 0.65 LAMBDA = 1.5e-2 CBD = 20e-12
+CBS = 0 IS = 1e-15 PB = 0.87
+CBS = 2e-14 CGDO = 88e-8 CGBO = 0
+CJ = 2e-10 MJ = 0.5 CJSW = 1e-9
+MJSW = 0.33 JS = 1e-8 TOX = 1.265e-10)
V2 W1 0 PULSE(0 5 0 1n 1n 1u 2u)
V1 Vp 0 5
M2 2+ W1 Vp Vp CD4007-PMOS
M1 2+ W1 0 0 CD4007-NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.MODEL CD4007-PMOS PMOS ( LEVEL = 1 L=5u W=100u
.MODEL CD4007-NMOS NMOS ( LEVEL = 1 L=5u W=20u
.tran 10u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1416 680
WIRE -544 -224 -544 -256
WIRE -416 -224 -416 -256
WIRE -544 -112 -544 -144
WIRE -416 -112 -416 -144
WIRE 160 -96 160 -288
WIRE 112 -80 -16 -80
WIRE -192 48 -192 16
WIRE -192 48 -240 48
WIRE -16 48 -16 -80
WIRE -16 48 -192 48
WIRE 160 48 160 0
WIRE 224 48 160 48
WIRE 160 112 160 48
WIRE -16 192 -16 48
WIRE 112 192 -16 192
WIRE 160 288 160 208
IOPIN -240 48 In
IOPIN 224 48 In
IOPIN 160 -288 In
IOPIN -544 -256 In
IOPIN -416 -256 In
IOPIN -192 16 In
SYMBOL pmos 112 0 M180
SYMATTR InstName M2
SYMATTR Value CD4007-PMOS
SYMBOL voltage -416 -240 R0
WINDOW 3 -79 179 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 0 1n 1n 1u 2u)
SYMATTR InstName V2
SYMBOL voltage -544 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL nmos 112 112 R0
SYMATTR InstName M1
SYMATTR Value CD4007-NMOS
FLAG -240 48 W1
FLAG 224 48 2+
FLAG 160 -288 Vp
FLAG 160 288 0
FLAG -544 -112 0
FLAG -416 -112 0
FLAG -544 -256 Vp
FLAG -416 -256 W1
FLAG -192 16 1+
TEXT 504 -112 Left 1 !.MODEL CD4007-PMOS    PMOS    ( LEVEL   = 1           L=5u    W=100u                \n+VTO    = -1.40         KP      = 3.2e-5        GAMMA   = 3.30  \n+PHI    = 0.65          LAMBDA  = 9e-2          CBD     = 65e-12\n+CBS    = 2e-14         IS      = 1e-15         PB      = 0.87\n+CGSO   = 0             CGDO    = 0             CGBO    = 1e-5\n+CJ     = 2e-10         MJ      = 0.5           CJSW    = 1e-9\n+MJSW   = 0.33          JS      = 1e-8          TOX     = 6.89e-10)
TEXT 504 56 Left 1 !.MODEL CD4007-NMOS    NMOS    ( LEVEL   = 1           L=5u    W=20u             \n+VTO    = 1.77          Kp      = 2.169e-4      GAMMA   = 4.10  \n+PHI    = 0.65          LAMBDA  = 1.5e-2        CBD     = 20e-12\n+CBS    = 0             IS      = 1e-15         PB      = 0.87\n+CBS    = 2e-14         CGDO    = 88e-8         CGBO    = 0\n+CJ     = 2e-10         MJ      = 0.5           CJSW    = 1e-9\n+MJSW   = 0.33          JS      = 1e-8          TOX     = 1.265e-10)
TEXT -336 248 Left 2 !.tran 10u
TEXT -128 -480 Left 2 ;CMOS Inverter
* Z:\home\khalils\Downloads\files\data\raw_asc\0a6a6ebd0ebd_Fig_4-21_Group-Delay_1001.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
R2 N001 0 10K
V3 IN 0 AC 1
R1 N001 OUT 10K
V2 -V 0 -15
XU3 N002 N001 +V -V OUT LT1001 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
R3 N002 IN 10K
.ac oct 100 1 100Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 924 680
WIRE 48 80 16 80
WIRE 160 80 128 80
WIRE 208 80 160 80
WIRE 320 80 288 80
WIRE 256 176 256 160
WIRE 160 192 160 80
WIRE 224 192 160 192
WIRE 320 208 320 80
WIRE 320 208 288 208
WIRE 368 208 320 208
WIRE 64 224 32 224
WIRE 96 224 64 224
WIRE 224 224 176 224
WIRE 32 240 32 224
WIRE 256 256 256 240
WIRE 32 352 32 320
WIRE 240 352 240 336
WIRE 336 352 336 336
WIRE 240 464 240 432
WIRE 336 464 336 432
SYMBOL voltage 32 224 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value ""
SYMBOL voltage 240 336 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 336 336 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 192 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL opamps\\LT1001 256 144 R0
SYMATTR InstName U3
SYMBOL res 192 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 144 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 336 464 0
FLAG 336 336 +V
FLAG 240 464 0
FLAG 240 336 -V
FLAG 32 352 0
FLAG 64 224 IN
FLAG 256 160 +V
FLAG 256 256 -V
FLAG 368 208 OUT
FLAG 16 80 0
TEXT -16 448 Left 2 !.ac oct 100 1 100Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1761-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1761-2.8.asy)
C1 OUT 0 10
XU1 IN 0 IN N001 OUT LT1761-2.8 ;pnba IN)GND)_SHDN)BYP)OUT
V1 IN 0 PWL(0 0 1 10)
C2 OUT N001 .01
Rload OUT 0 500
.tran 1
.lib LT1761.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 48 -224 48
WIRE 16 48 -16 48
WIRE 336 48 304 48
WIRE 416 48 336 48
WIRE 512 48 416 48
WIRE -224 64 -224 48
WIRE 336 64 336 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE -16 144 -16 48
WIRE 16 144 -16 144
WIRE 336 144 336 128
WIRE 336 144 304 144
WIRE -224 160 -224 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 160 240 160 208
SYMBOL cap 320 64 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LT1761-2.8 160 96 R0
SYMATTR InstName U1
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
FLAG -224 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 160 240 0
FLAG -224 48 IN
FLAG 512 48 OUT
TEXT 376 240 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1270A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1270A.asy)
R3 N003 N004 1K
L1 IN N001 10
D1 N001 OUT MBRS360
V1 IN 0 5
XU1 N003 N002 0 N001 IN LT1270A ;pnba Vc)FB)GND)SW)Vin
Rload OUT 0 10
C3 N004 0 1
R2 N002 0 1K
C1 OUT 0 500
R1 OUT N002 8.7K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 15m startup
.lib LT1270A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1472
WIRE 1824 880 1616 880
WIRE 1872 880 1824 880
WIRE 1984 880 1952 880
WIRE 2032 880 1984 880
WIRE 2144 880 2096 880
WIRE 2256 880 2144 880
WIRE 2368 880 2256 880
WIRE 1616 896 1616 880
WIRE 2256 896 2256 880
WIRE 2368 896 2368 880
WIRE 1824 944 1824 880
WIRE 2144 960 2144 880
WIRE 1616 992 1616 976
WIRE 2256 992 2256 960
WIRE 2368 992 2368 976
WIRE 1984 1024 1984 880
WIRE 1984 1024 1952 1024
WIRE 2144 1088 2144 1040
WIRE 2144 1088 1952 1088
WIRE 2144 1104 2144 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2144 1200 2144 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
SYMBOL RES 2128 1088 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL schottky 2032 896 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL RES 2128 944 R0
SYMATTR InstName R1
SYMATTR Value 8.7K
SYMBOL PowerProducts\\LT1270A 1824 1088 R0
SYMATTR InstName U1
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL VOLTAGE 1616 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL IND 1856 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL res 2352 880 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL polcap 2240 896 R0
SYMATTR InstName C1
SYMATTR Value 500
FLAG 2368 880 OUT
FLAG 2144 1200 0
FLAG 2256 992 0
FLAG 2368 992 0
FLAG 2064 1248 0
FLAG 1824 1248 0
FLAG 1616 992 0
FLAG 1616 880 IN
TEXT 2208 1248 Left 2 !.tran 15m startup