Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1515-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 3
R1 IN N001 5K
C1 N002 N003 1
C2 OUT 0 10
Rload OUT 0 100
XU1 IN N001 0 0 N003 N002 IN OUT LTC1515-3.3 ;pnba _SHDN)POR)5/3.3)GND)C1-)C1+)Vin)Vout
.tran 2.5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1515-3.3.asy)
.lib LTC1515-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3112 2708
WIRE 2016 2176 1920 2176
WIRE 2096 2176 2016 2176
WIRE 2448 2176 2096 2176
WIRE 1920 2192 1920 2176
WIRE 2016 2208 2016 2176
WIRE 2096 2256 2096 2176
WIRE 2128 2256 2096 2256
WIRE 2528 2256 2416 2256
WIRE 2624 2256 2528 2256
WIRE 2624 2272 2624 2256
WIRE 1920 2288 1920 2272
WIRE 2528 2288 2528 2256
WIRE 2016 2320 2016 2288
WIRE 2128 2320 2016 2320
WIRE 2448 2320 2448 2176
WIRE 2448 2320 2416 2320
WIRE 2528 2368 2528 2352
WIRE 2624 2368 2624 2352
WIRE 2128 2384 2096 2384
WIRE 2448 2384 2416 2384
WIRE 2128 2448 2096 2448
WIRE 2448 2448 2416 2448
FLAG 2528 2368 0
FLAG 2096 2448 0
FLAG 1920 2288 0
FLAG 2624 2368 0
FLAG 2624 2256 OUT
FLAG 2096 2384 0
FLAG 1920 2176 IN
SYMBOL VOLTAGE 1920 2176 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL RES 2000 2192 R0
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL cap 2432 2384 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 2512 2288 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res 2608 2256 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL PowerProducts\\LTC1515-3.3 2272 2352 R0
SYMATTR InstName U1
TEXT 2440 2504 Left 2 !.tran 2.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP151-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP151-1.5.asy)
V1 IN 0 5
Rload OUT 0 15
XU1 IN 0 IN MP_01 OUT ADP151-x.x T=500K ;pnba Vin)GND)EN))Vout
C1 OUT 0 1
.tran 500u startup
.lib ADP151-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 880 1696 880
WIRE 1984 880 1824 880
WIRE 1696 896 1696 880
WIRE 1984 896 1984 880
WIRE 1696 992 1696 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL VOLTAGE 1696 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 15
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\ADP151-1.5 1984 1024 R0
SYMATTR InstName U1
FLAG 2256 1024 OUT
FLAG 2256 1136 0
FLAG 1696 992 0
FLAG 1696 880 IN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1010.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1010.asy)
V2 -V 0 -15
V1 +V 0 15
XU1 N001 +V -V NC_01 N002 LT1010 ;pnba In)V+)V-)Bias)OUT
V3 N001 0 SINE(0 1 1K)
.tran 3m
.lib LT1010.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -176 208 -176 192
WIRE -48 208 -48 192
WIRE 176 208 176 192
WIRE 160 240 80 240
WIRE 368 240 224 240
WIRE 80 272 80 240
WIRE 192 288 192 272
WIRE -176 304 -176 288
WIRE -48 304 -48 288
WIRE 80 368 80 352
SYMBOL voltage -48 192 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -176 192 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL opamps\\LT1010 192 176 R0
SYMATTR InstName U1
SYMBOL voltage 80 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
FLAG -48 304 0
FLAG 176 192 +V
FLAG -48 192 +V
FLAG 192 288 -V
FLAG -176 304 0
FLAG -176 192 -V
FLAG 80 368 0
TEXT 312 320 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\1c7e1a267cbf_stepping_models_1.asc
* Generated by LTspice 26.0.1 for Windows.
* Example provided by Mike Engelhardt from Linear Technology.
V1 C 0 0
Q1 C B 0 0 {M}
I1 0 B 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 3 1m I1 20u 100u 20u
.model 3 NPN(BF=100)
.model 4 NPN(BF=101)
.model 5 NPN(BF=102)
.STEP param M list 3 4 5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 384 32 368
WIRE 32 288 32 272
WIRE 32 272 128 272
WIRE 192 384 192 320
WIRE 192 224 192 192
WIRE 192 192 336 192
WIRE 336 192 336 224
WIRE 336 304 336 384
SYMBOL npn 128 224 R0
SYMATTR InstName Q1
SYMATTR Value {M}
SYMBOL current 32 368 M180
WINDOW 0 24 79 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName I1
SYMATTR Value 0
SYMBOL voltage 336 208 R0
SYMATTR InstName V1
SYMATTR Value 0
FLAG 192 384 0
FLAG 336 384 0
FLAG 32 384 0
FLAG 192 192 C
FLAG 32 272 B
TEXT 16 456 Left 0 !.dc V1 0 3 1m I1 20u 100u 20u
TEXT 520 200 Left 0 !.model 3 NPN(BF=100)
TEXT 520 232 Left 0 !.model 4 NPN(BF=101)
TEXT 520 264 Left 0 !.model 5 NPN(BF=102)
TEXT 520 320 Left 0 !.STEP param M list 3 4 5
TEXT 8 80 Left 0 ;Example provided by Mike Engelhardt from Linear Technology.
* Z:\home\khalils\Downloads\files\data\raw_asc\2c6003b1c7a3_projet1circuit.asc
* Generated by LTspice 26.0.1 for Windows.
C3 N006 0 .001
L3 N003 N006 .01
R1 N003 N001 100
V1 N004 0 AC 1
L2 N005 0 .05
C2 N003 0 .005
R2 N003 N005 100
C1 N002 N001 .01
V2 N001 N004 0
L1 N002 N003 .001
.ac dec 100 .1 1000000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 924 680
WIRE 144 -160 112 -160
WIRE 352 -160 208 -160
WIRE 480 -160 432 -160
WIRE 112 -48 112 -160
WIRE 112 -48 48 -48
WIRE 240 -48 112 -48
WIRE 480 -48 480 -160
WIRE 480 -48 320 -48
WIRE 544 -48 480 -48
WIRE 704 -48 544 -48
WIRE 864 -48 704 -48
WIRE 48 0 48 -48
WIRE 544 32 544 -48
WIRE 864 32 864 -48
WIRE 704 112 704 -48
WIRE 48 128 48 80
WIRE 544 176 544 112
WIRE 864 192 864 112
WIRE 48 304 48 208
WIRE 544 304 544 256
WIRE 544 304 48 304
WIRE 704 304 704 176
WIRE 704 304 544 304
WIRE 864 304 864 256
WIRE 864 304 704 304
SYMBOL cap 848 192 R0
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL ind 848 16 R0
SYMATTR InstName L3
SYMATTR Value .01
SYMBOL cap 208 -176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL res 336 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL ind 336 -144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value .001
SYMBOL res 528 16 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL ind 528 160 R0
SYMATTR InstName L2
SYMATTR Value .05
SYMBOL cap 688 112 R0
SYMATTR InstName C2
SYMATTR Value .005
SYMBOL voltage 48 112 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL voltage 48 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
FLAG 544 304 0
TEXT 16 328 Left 2 !.ac dec 100 .1 1000000
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX49925.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX49925.asy)
XU1 RS+ RS- OUT 0 VDD 0 VDD G2 G1 MAX49925 ;pnba RS+)RS-)OUT)GND)VDD)REF2)REF1)GAIN2)GAIN1
Vsense RS+ RS- SINE(0 10m 1k) AC 1
C1 OUT 0 10p
VG1 G1 0 0
Vcm RS- 0 48
V1 VDD 0 3.3
R1 OUT 0 10k
VG2 G2 0 0
.tran 2m
.lib MAX49925.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1224 1196
WIRE 560 -112 480 -112
WIRE 656 -112 640 -112
WIRE 656 -96 656 -112
WIRE 480 0 480 -112
WIRE 352 32 64 32
WIRE 384 32 352 32
WIRE 64 48 64 32
WIRE 704 80 576 80
WIRE 800 80 704 80
WIRE 704 112 704 80
WIRE 800 128 800 80
WIRE 64 144 64 128
WIRE 352 144 64 144
WIRE 384 144 352 144
WIRE 64 176 64 144
WIRE 352 208 176 208
WIRE 384 208 352 208
WIRE 624 208 576 208
WIRE 656 208 624 208
WIRE 704 208 704 192
WIRE 800 208 800 192
WIRE 64 272 64 256
WIRE 352 288 288 288
WIRE 384 288 352 288
WIRE 608 288 576 288
WIRE 608 304 608 288
WIRE 176 336 176 208
WIRE 288 336 288 288
WIRE 480 368 480 352
WIRE 176 432 176 416
WIRE 288 432 288 416
SYMBOL voltage 176 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VG2
SYMATTR Value 0
SYMBOL voltage 288 320 R0
SYMATTR InstName VG1
SYMATTR Value 0
SYMBOL voltage 64 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vcm
SYMATTR Value 48
SYMBOL voltage 64 32 R0
WINDOW 3 40 50 Left 2
WINDOW 123 42 85 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 10m 1k)
SYMATTR Value2 AC 1
SYMATTR InstName Vsense
SYMBOL res 688 96 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL cap 784 128 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 544 -112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL MAX49925 480 176 R0
SYMATTR InstName U1
FLAG 480 368 0
FLAG 656 -96 0
FLAG 480 -112 VDD
FLAG 624 208 VDD
FLAG 608 304 0
FLAG 64 272 0
FLAG 176 432 0
FLAG 288 432 0
FLAG 704 208 0
FLAG 800 208 0
FLAG 800 80 OUT
FLAG 352 32 RS+
FLAG 352 144 RS-
FLAG 352 208 G2
FLAG 352 288 G1
TEXT 40 496 Left 2 !.tran 2m
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17553A.asc
* Generated by LTspice 26.0.1 for Windows.
V1 vIN 0 24
L1 N001 vOUT 150 Rser=2
C2 vOUT 0 10
Rload vOUT 0 66
R1 vIN N002 3.32Meg
R3 N002 N004 953k
XU1 0 vIN N002 N004 vOUT N001 N003 N005 MAX17553A ;pnba GND)IN)EN/UV)HYST)FB/VO)LX)_RESET)RT
R2 N002 0 287k
R4 vOUT N003 100k
R7 N005 0 402k
.tran 4m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17553A.asy)
.lib MAX17553A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 992 680
WIRE -176 -32 -192 -32
WIRE 48 -32 -176 -32
WIRE 176 -32 48 -32
WIRE 512 -32 464 -32
WIRE 624 -32 592 -32
WIRE 704 -32 624 -32
WIRE 768 -32 704 -32
WIRE 864 -32 768 -32
WIRE 896 -32 864 -32
WIRE 48 -16 48 -32
WIRE 624 -16 624 -32
WIRE 896 -16 896 -32
WIRE -192 16 -192 -32
WIRE 624 64 624 48
WIRE 896 80 896 64
WIRE 48 96 48 64
WIRE 48 96 -64 96
WIRE 176 96 48 96
WIRE -64 112 -64 96
WIRE 48 112 48 96
WIRE -192 128 -192 96
WIRE 512 128 464 128
WIRE 704 128 704 -32
WIRE 704 128 592 128
WIRE -64 224 -64 192
WIRE 48 224 48 192
WIRE 176 224 48 224
WIRE 768 224 768 -32
WIRE 768 224 464 224
WIRE 176 320 48 320
WIRE 48 336 48 320
WIRE 320 384 320 368
WIRE 48 432 48 416
FLAG -192 128 0
FLAG 320 384 0
FLAG 624 64 0
FLAG 896 80 0
FLAG -176 -32 vIN
FLAG 864 -32 vOUT
FLAG -64 224 0
FLAG 48 432 0
SYMBOL voltage -192 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL ind 496 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMATTR SpiceLine Rser=2
SYMBOL cap 608 -16 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res 880 -32 R0
SYMATTR InstName Rload
SYMATTR Value 66
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 3.32Meg
SYMBOL res 32 96 R0
SYMATTR InstName R3
SYMATTR Value 953k
SYMBOL MAX17553A 320 144 R0
SYMATTR InstName U1
SYMBOL res -80 96 R0
SYMATTR InstName R2
SYMATTR Value 287k
SYMBOL res 608 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL res 32 320 R0
SYMATTR InstName R7
SYMATTR Value 402k
TEXT 480 392 Left 2 !.tran 4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\b646b7efc681_2_2_1_g.asc
* Generated by LTspice 26.0.1 for Windows.
Vi N001 0 {Vinput}
RB N001 N002 100k
QNPN-Transistor VCE N002 0 0 BC547B
RC P001 VCE 200
VDD P001 0 10V
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VDD 0 10 .01
.step param Vinput 0 5 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 32 304 32
WIRE 96 80 32 80
WIRE 240 80 176 80
WIRE 32 144 32 80
WIRE 32 256 32 224
WIRE 304 256 304 128
FLAG 304 256 0
FLAG 32 256 0
FLAG 304 -128 0
FLAG 384 32 VCE
SYMBOL voltage 32 128 R0
SYMATTR InstName Vi
SYMATTR Value {Vinput}
SYMBOL res 80 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName RB
SYMATTR Value 100k
SYMBOL npn 240 32 R0
WINDOW 3 58 60 Left 2
SYMATTR Value BC547B
SYMATTR InstName NPN-Transistor
SYMBOL res 288 -64 R0
SYMATTR InstName RC
SYMATTR Value 200
SYMBOL voltage 304 -32 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName VDD
SYMATTR Value 10V
TEXT 48 288 Left 2 !.dc VDD 0 10 .01
TEXT 56 320 Left 2 !.step param Vinput 0 5 1
* Z:\home\khalils\Downloads\files\data\raw_asc\087d3be8e73b_1255.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1255.asy)
MQ2 N002 N004 N008 N008 Si9936DY
XU1 N002 N004 0 N006 N007 N001 N005 N003 LTC1255 ;pnba DS1)G1)GND)IN1)IN2)Vs)G2)DS2
D2 N009 N005 BZX84C12L
R4 N008 0 100
D1 N008 N004 BZX84C12L
V2 N006 0 PULSE(0 5 0 100n 100n 2.5m 5m)
MQ1 N003 N005 N009 N009 Si9936DY
R2 N009 0 100
R3 N001 N002 .036
V1 N001 0 5
V3 N007 0 PULSE(0 5 0 100n 100n 2.5m 5m)
R1 N001 N003 .036
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 20m startup
.lib LTC1255.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 932 680
WIRE -352 80 -464 80
WIRE 176 80 -352 80
WIRE 544 80 176 80
WIRE -464 96 -464 80
WIRE -352 112 -352 80
WIRE 544 112 544 80
WIRE 176 176 176 80
WIRE -464 192 -464 176
WIRE -352 224 -352 192
WIRE 48 224 -352 224
WIRE 544 224 544 192
WIRE 544 224 304 224
WIRE -288 304 -304 304
WIRE 48 304 -288 304
WIRE 400 304 304 304
WIRE 496 304 400 304
WIRE -288 336 -288 304
WIRE 400 336 400 304
WIRE 48 384 -112 384
WIRE 336 384 304 384
WIRE -352 416 -352 320
WIRE -288 416 -288 400
WIRE -288 416 -352 416
WIRE -112 416 -112 384
WIRE 400 416 400 400
WIRE 544 416 544 320
WIRE 544 416 400 416
WIRE -352 432 -352 416
WIRE 544 432 544 416
WIRE 176 448 176 432
WIRE 336 496 336 384
WIRE -112 512 -112 496
WIRE -352 528 -352 512
WIRE 544 528 544 512
WIRE 336 592 336 576
SYMBOL nmos -304 224 M0
WINDOW 0 0 14 Right 2
WINDOW 3 0 54 Right 2
SYMATTR InstName Q2
SYMATTR Value Si9936DY
SYMBOL voltage -464 80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 528 96 R0
SYMATTR InstName R1
SYMATTR Value .036
SYMBOL zener -304 400 M180
WINDOW 0 25 70 Left 2
WINDOW 3 27 0 Left 2
SYMATTR InstName D1
SYMATTR Value BZX84C12L
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res -368 416 R0
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL zener 384 400 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value BZX84C12L
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage 336 480 R0
SYMATTR Value PULSE(0 5 0 100n 100n 2.5m 5m)
SYMATTR InstName V3
SYMBOL nmos 496 224 R0
WINDOW 0 59 30 Left 2
WINDOW 3 63 60 Left 2
SYMATTR InstName Q1
SYMATTR Value Si9936DY
SYMBOL res 528 416 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL res -368 96 R0
SYMATTR InstName R3
SYMATTR Value .036
SYMBOL voltage -112 400 R0
SYMATTR Value PULSE(0 5 0 100n 100n 2.5m 5m)
SYMATTR InstName V2
SYMBOL PowerProducts\\LTC1255 176 304 R0
SYMATTR InstName U1
FLAG -464 192 0
FLAG -112 512 0
FLAG 544 528 0
FLAG 176 448 0
FLAG -352 528 0
FLAG 336 592 0
TEXT 568 640 Left 2 !.tran 20m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3f858c528446_Follower_RC_ADC_pulse.asc
* Generated by LTspice 26.0.1 for Windows.
* Sensor output
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4807.asy)
R3 Ain+ INPUT 100
V1 SMPL 0 PULSE(0 1 688n 2n 2n 312n 1u 24)
R1 ADC_IN OUT 50
C1 SAR_CAP 0 31p
S1 SAR_CAP ADC_IN SMPL 0 SW
XU2 Ain+ OUT Vc 0 OUT NC_01 ADA4807 ;pnba 100)101)102)103)104)106
V3 Vc 0 5
V2 INPUT 0 PULSE(0.5 1.5 1.1u 1u 1u 2u 6u 1)
R2 SAR_CAP 0 1G
C2 ADC_IN 0 1n
.tran 0 7E-6 0
.model SW SW(Ron=40 Roff=1G Vt=.5 Vh=-.4)
.lib ADA4807.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 996 680
WIRE -96 16 -240 16
WIRE -240 80 -240 16
WIRE -192 80 -240 80
WIRE -96 96 -96 16
WIRE -96 96 -128 96
WIRE -48 96 -96 96
WIRE 0 96 -48 96
WIRE 144 96 80 96
WIRE 192 96 144 96
WIRE 304 96 192 96
WIRE 480 96 384 96
WIRE 640 96 480 96
WIRE -368 112 -400 112
WIRE -256 112 -288 112
WIRE -192 112 -256 112
WIRE 144 128 144 96
WIRE 480 128 480 96
WIRE 640 128 640 96
WIRE -176 160 -176 128
WIRE 320 160 320 144
WIRE 320 160 256 160
WIRE -400 176 -400 112
WIRE 256 192 256 160
WIRE 144 224 144 192
WIRE 368 224 368 144
WIRE 480 224 480 192
WIRE 640 224 640 208
WIRE -592 288 -592 272
WIRE -400 304 -400 256
WIRE 256 320 256 272
SYMBOL voltage 256 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 688n 2n 2n 312n 1u 24)
SYMBOL cap 128 128 R0
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL res -272 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL cap 464 128 R0
SYMATTR InstName C1
SYMATTR Value 31p
SYMBOL res 96 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL voltage -592 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -400 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
WINDOW 3 85 73 Left 2
SYMATTR Value PULSE(0.5 1.5 1.1u 1u 1u 2u 6u 1)
SYMATTR InstName V2
SYMBOL sw 400 96 M270
SYMATTR InstName S1
SYMBOL res 624 112 R0
SYMATTR InstName R2
SYMATTR Value 1G
SYMBOL OpAmps\\ADA4807 -160 96 R0
SYMATTR InstName U2
FLAG 368 224 0
FLAG 480 224 0
FLAG 256 320 0
FLAG -400 304 0
FLAG 480 96 SAR_CAP
FLAG -592 288 0
FLAG -592 192 Vc
FLAG -400 112 INPUT
FLAG 192 96 ADC_IN
FLAG 256 160 SMPL
FLAG 640 224 0
FLAG -176 160 0
FLAG -176 64 Vc
FLAG -256 112 Ain+
FLAG -48 96 OUT
FLAG 144 224 0
TEXT -208 288 Left 2 !.tran 0 7E-6 0
TEXT 96 0 Left 2 !.model SW SW(Ron=40 Roff=1G Vt=.5 Vh=-.4)
TEXT -600 40 Left 2 ;Sensor output
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1017.asc
* Generated by LTspice 26.0.1 for Windows.
* Delay On Power Up
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1017.asy)
R1 N002 0 100K
C1 +V N001 1
R2 +V N002 1K
R3 N001 0 20K
V1 +V 0 5
XU1 N002 N001 +V 0 OUT LT1017 ;pnba In+)In-)V+)V-)OUT
.tran 5m startup
.lib LT1017.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -208 112 -208 96
WIRE -208 112 -304 112
WIRE -96 112 -208 112
WIRE -208 128 -208 112
WIRE -304 144 -304 112
WIRE -432 192 -432 176
WIRE -96 208 -96 112
WIRE -304 224 -304 208
WIRE -128 224 -304 224
WIRE -304 240 -304 224
WIRE 0 240 -64 240
WIRE -208 256 -208 208
WIRE -128 256 -208 256
WIRE -208 272 -208 256
WIRE -432 288 -432 272
WIRE -96 304 -96 272
WIRE -304 336 -304 320
WIRE -208 368 -208 352
SYMBOL voltage -432 176 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap -320 144 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res -320 224 R0
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL res -224 112 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res -224 256 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL LT1017 -96 240 R0
SYMATTR InstName U1
FLAG -432 288 0
FLAG -432 176 +V
FLAG -208 96 +V
FLAG -96 304 0
FLAG -208 368 0
FLAG -304 336 0
FLAG 0 240 OUT
TEXT 0 352 Left 2 !.tran 5m startup
TEXT -184 56 Bottom 2 ;Delay On Power Up
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3410B-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3410B-1.2.asy)
V1 IN 0 5
L1 N001 OUT 4.7
C1 OUT 0 4.7
XU1 IN 0 N001 IN MP_01 OUT LTC3410B-x.x top=180K bot=360K ;pnba Run)GND)SW)Vin))FB
Rload OUT 0 20
.tran 250u startup
.lib LTC3410B-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 700
WIRE 192 64 96 64
WIRE 352 64 192 64
WIRE 96 80 96 64
WIRE 352 80 352 64
WIRE 192 144 192 64
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 608 144 592 144
WIRE 656 144 608 144
WIRE 752 144 656 144
WIRE 656 160 656 144
WIRE 752 160 752 144
WIRE 96 176 96 160
WIRE 656 256 656 224
WIRE 752 256 752 240
WIRE 608 304 608 144
WIRE 608 304 496 304
WIRE 352 384 352 368
SYMBOL cap 640 160 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL RES 736 144 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL VOLTAGE 96 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LTC3410B-1.2 352 224 R0
SYMATTR InstName U1
FLAG 96 176 0
FLAG 352 384 0
FLAG 656 256 0
FLAG 752 256 0
FLAG 96 64 IN
FLAG 752 144 OUT
TEXT 560 360 Left 2 !.tran 250u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\753a481c0730_1_1-499ohm.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 -5
D1 N002 0 1N4148
R1 N002 N001 499
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -5 1.5 .5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 64 96 64
WIRE 352 64 256 64
WIRE 96 128 96 64
WIRE 352 128 352 64
WIRE 96 256 96 208
WIRE 304 256 96 256
WIRE 352 256 352 192
WIRE 352 256 304 256
WIRE 304 272 304 256
SYMBOL diode 336 128 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 272 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 499
SYMBOL voltage 96 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -5
FLAG 304 272 0
TEXT 62 296 Left 2 !.dc V1 -5 1.5 .5
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8618C.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8618C.asy)
Rload OUT 0 50
R1 FB 0 301k
XU1 NC_01 SW OUT SYNC RT FB TRSS PG N001 N001 0 LT8604C LT8604=0 DFN=0 VOUT33=0 ;pnba HYST)SW)Bias)SYNC)Rt)FB)TR/SS)PG)EN/UV)Vin)GND
R2 RT 0 110k
L1 SW OUT 120 Rser=1
C1 OUT 0 22
V1 N001 0 12
R4 OUT FB 1.62Meg
R3 OUT PG 100k
.tran 3m steady nodiscard
.lib LT8604C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1748 780
WIRE -32 48 -192 48
WIRE 16 48 -32 48
WIRE 368 48 304 48
WIRE 400 48 368 48
WIRE 528 48 480 48
WIRE 576 48 528 48
WIRE 800 48 576 48
WIRE 912 48 800 48
WIRE 944 48 912 48
WIRE -192 128 -192 48
WIRE -32 144 -32 48
WIRE 16 144 -32 144
WIRE 528 144 528 48
WIRE 528 144 304 144
WIRE 800 160 800 48
WIRE 944 160 944 48
WIRE 576 192 576 48
WIRE 800 256 800 224
WIRE 944 256 944 240
WIRE -192 272 -192 208
WIRE -48 336 -112 336
WIRE 16 336 -48 336
WIRE 336 336 304 336
WIRE 576 336 576 272
WIRE 576 336 336 336
WIRE 576 352 576 336
WIRE -64 432 -112 432
WIRE 16 432 -64 432
WIRE 576 464 576 432
WIRE -48 528 -192 528
WIRE 16 528 -48 528
WIRE 336 528 304 528
WIRE 384 528 336 528
WIRE 528 528 528 144
WIRE 528 528 464 528
WIRE -192 576 -192 528
WIRE 160 624 160 576
WIRE -192 720 -192 656
SYMBOL res 560 336 R0
SYMATTR InstName R1
SYMATTR Value 301k
SYMBOL ind 384 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 120
SYMATTR SpiceLine Rser=1
SYMBOL voltage -192 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 480 512 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 928 144 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL res 560 176 R0
SYMATTR InstName R4
SYMATTR Value 1.62Meg
SYMBOL res -208 560 R0
SYMATTR InstName R2
SYMATTR Value 110k
SYMBOL cap 784 160 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL LT8618C 160 240 R0
SYMATTR InstName U1
FLAG 576 464 0
FLAG 800 256 0
FLAG 912 48 OUT
FLAG -192 720 0
FLAG -192 272 0
FLAG 336 528 PG
FLAG 336 336 FB
FLAG 368 48 SW
FLAG -48 528 RT
FLAG -64 432 TRSS
FLAG 160 624 0
FLAG -48 336 SYNC
FLAG 944 256 0
TEXT 608 616 Left 2 !.tran 3m steady nodiscard