Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8253.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8253.asy)
VA0 N002 0 {A0}
VA1 N001 0 {A1}
V-VS -VS 0 -15
E2 0 -IN IN 0 0.5
E1 +IN 0 IN 0 0.5
V+VS +VS 0 15
RL OUT 0 2k
VIN IN 0 SINE(0 10m 1k)
XU1 -IN 0 -VS N002 N001 -VS OUT +VS 0 +IN AD8253 ;pnba -IN)DGND)-VS)A0)A1)WR)OUT)+VS)REF)+IN
.tran 2m
.param A0 = table(index, 1, 0, 2, 5, 3, 0, 4, 5)
.param A1 = table(index, 1, 0, 2, 0, 3, 5, 4, 5)
.step param index list 1 2 3 4
.lib AD8253.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 916 680
WIRE 464 64 432 64
WIRE 464 80 464 64
WIRE 432 96 432 64
WIRE 432 208 432 176
WIRE 432 224 432 208
WIRE 368 240 -32 240
WIRE 400 240 368 240
WIRE -32 256 -32 240
WIRE -112 272 -192 272
WIRE -80 272 -112 272
WIRE 400 272 80 272
WIRE 400 304 208 304
WIRE 80 320 80 272
WIRE 208 320 208 304
WIRE 640 320 576 320
WIRE 400 336 320 336
WIRE 640 336 640 320
WIRE -80 352 -80 320
WIRE -32 352 -32 336
WIRE -32 352 -80 352
WIRE 0 352 -32 352
WIRE 320 352 320 336
WIRE -32 368 -32 352
WIRE 0 368 0 352
WIRE 368 368 352 368
WIRE 400 368 368 368
WIRE -112 384 -112 272
WIRE -80 384 -112 384
WIRE 368 400 352 400
WIRE 400 400 368 400
WIRE 512 400 512 384
WIRE 80 416 80 400
WIRE 208 416 208 400
WIRE -192 432 -192 272
WIRE 640 432 640 416
WIRE -80 448 -80 432
WIRE 432 448 432 416
WIRE -32 464 -32 448
WIRE 352 464 352 400
WIRE 352 464 -32 464
WIRE 432 464 432 448
WIRE -192 528 -192 512
WIRE 432 560 432 544
SYMBOL voltage 432 448 R0
WINDOW 0 41 47 Left 2
WINDOW 3 37 69 Left 2
SYMATTR InstName -VS
SYMATTR Value -15
SYMBOL res 624 320 R0
SYMATTR InstName RL
SYMATTR Value 2k
SYMBOL AD8253 432 320 R0
SYMATTR InstName U1
SYMBOL voltage 432 192 M180
WINDOW 0 37 69 Left 2
WINDOW 3 42 45 Left 2
SYMATTR InstName +VS
SYMATTR Value 15
SYMBOL voltage -192 416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VIN
SYMATTR Value SINE(0 10m 1k)
SYMBOL e -32 352 R0
WINDOW 0 38 46 Left 2
WINDOW 3 39 70 Left 2
SYMATTR InstName E2
SYMATTR Value 0.5
SYMBOL e -32 240 R0
WINDOW 0 39 36 Left 2
WINDOW 3 41 66 Left 2
SYMATTR InstName E1
SYMATTR Value 0.5
SYMBOL voltage 208 304 R0
WINDOW 0 39 44 Left 2
WINDOW 3 41 72 Left 2
SYMATTR InstName VA0
SYMATTR Value {A0}
SYMBOL voltage 80 304 R0
WINDOW 0 38 43 Left 2
WINDOW 3 41 71 Left 2
SYMATTR InstName VA1
SYMATTR Value {A1}
FLAG 432 560 0
FLAG 464 80 0
FLAG 512 400 0
FLAG 640 432 0
FLAG 432 448 -VS
FLAG 368 368 -VS
FLAG 320 352 0
FLAG 368 240 +IN
FLAG 368 400 -IN
FLAG 640 320 OUT
FLAG 432 208 +VS
FLAG -80 448 0
FLAG -192 272 IN
FLAG -192 528 0
FLAG 0 368 0
FLAG 80 416 0
FLAG 208 416 0
TEXT -224 584 Left 2 !.tran 2m
TEXT -216 136 Left 2 !.param A0 = table(index, 1, 0, 2, 5, 3, 0, 4, 5)\n.param A1 = table(index, 1, 0, 2, 0, 3, 5, 4, 5)\n.step param index list 1 2 3 4
* Z:\home\khalils\Downloads\files\data\raw_asc\0e227c1a07c6_MotorDriver.asc
* Generated by LTspice 26.0.1 for Windows.
M4 Ph_2 2_LO 0 0 FDC2512
M6 Ph_3 3_LO 0 0 FDC2512
M2 Ph_1 1_LO 0 0 FDC2512
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1188
WIRE 160 224 80 224
WIRE 288 256 208 256
WIRE 208 288 208 256
WIRE 160 368 80 368
WIRE 208 416 208 384
WIRE 160 592 80 592
WIRE 272 624 208 624
WIRE 208 656 208 624
WIRE 160 736 80 736
WIRE 208 784 208 752
WIRE 160 976 80 976
WIRE 256 1008 208 1008
WIRE 208 1040 208 1008
WIRE 160 1120 80 1120
WIRE 208 1168 208 1136
SYMBOL nmos 160 1040 R0
SYMATTR InstName M6
SYMATTR Value FDC2512
SYMBOL nmos 160 656 R0
SYMATTR InstName M4
SYMATTR Value FDC2512
SYMBOL nmos 160 288 R0
SYMATTR InstName M2
SYMATTR Value FDC2512
FLAG 208 1168 0
FLAG 80 224 1_HI
FLAG 80 368 1_LO
FLAG 80 592 2_HI
FLAG 80 736 2_LO
FLAG 80 976 3_HI
FLAG 80 1120 3_LO
FLAG 288 256 Ph_1
FLAG 272 624 Ph_2
FLAG 256 1008 Ph_3
FLAG 208 416 0
FLAG 208 784 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1761-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1761-2.5.asy)
Rload OUT 0 500
XU1 IN 0 IN N001 OUT LT1761-2.5 ;pnba IN)GND)_SHDN)BYP)OUT
C2 OUT N001 .01
C1 OUT 0 10
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT1761.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 48 -224 48
WIRE 16 48 -16 48
WIRE 336 48 304 48
WIRE 416 48 336 48
WIRE 512 48 416 48
WIRE -224 64 -224 48
WIRE 336 64 336 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE -16 144 -16 48
WIRE 16 144 -16 144
WIRE 336 144 336 128
WIRE 336 144 304 144
WIRE -224 160 -224 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 160 240 160 208
SYMBOL PowerProducts\\LT1761-2.5 160 96 R0
SYMATTR InstName U1
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL cap 320 64 R0
SYMATTR InstName C2
SYMATTR Value .01
FLAG -224 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 160 240 0
FLAG 512 48 OUT
FLAG -224 48 IN
TEXT 360 224 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\73718b5d97cb_lab3a.asc
* Generated by LTspice 26.0.1 for Windows.
* Bn/Bp=1
* Bn/Bp=3
* Bn/Bp=0.333
M2 Vout1 Vin VDD VDD P_1u l=1u w=10u
Vin Vin 0 0
M3 Vout2 Vin VDD VDD P_1u l=1u w=90u
M4 Vout Vin 0 0 N_1u l=1u w=10u
M1 Vout Vin VDD VDD P_1u l=1u w=30u
M6 Vout2 Vin 0 0 N_1u l=1u w=10u
M5 Vout1 Vin 0 0 N_1u l=1u w=10u
VDD VDD 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib C:\Users\Sarthak\Desktop\CMOS_PRO\pure_models.txt
.dc Vin 0 5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 176 -96 112
WIRE 224 176 224 112
WIRE 528 176 528 112
WIRE -144 192 -176 192
WIRE 176 192 144 192
WIRE 480 192 448 192
WIRE 256 224 224 224
WIRE -176 320 -176 192
WIRE -176 320 -208 320
WIRE -96 320 -96 272
WIRE -48 320 -96 320
WIRE 144 320 144 192
WIRE 144 320 96 320
WIRE 224 320 224 272
WIRE 272 320 224 320
WIRE 448 320 448 192
WIRE 448 320 416 320
WIRE 528 320 528 272
WIRE 608 320 528 320
WIRE -96 384 -96 320
WIRE 224 384 224 320
WIRE 528 384 528 320
WIRE 64 432 -96 432
WIRE 400 432 224 432
WIRE 704 432 528 432
WIRE -176 464 -176 320
WIRE -144 464 -176 464
WIRE 144 464 144 320
WIRE 176 464 144 464
WIRE 448 464 448 320
WIRE 480 464 448 464
WIRE -96 512 -96 480
WIRE 64 512 64 432
WIRE 400 512 400 432
WIRE 528 512 528 480
WIRE 704 512 704 432
WIRE 224 528 224 480
IOPIN -48 320 Out
IOPIN 272 320 Out
IOPIN 608 320 Out
SYMBOL voltage -288 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL nmos4 176 384 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=1u w=10u
SYMATTR InstName M5
SYMATTR Value N_1u
SYMBOL nmos4 480 384 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=1u w=10u
SYMATTR InstName M6
SYMATTR Value N_1u
SYMBOL pmos4 176 272 M180
WINDOW 3 109 21 Left 2
WINDOW 123 78 80 Left 2
WINDOW 0 60 24 Left 2
SYMATTR Value P_1u
SYMATTR Value2 l=1u w=10u
SYMATTR InstName M2
SYMBOL nmos4 -144 384 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=1u w=10u
SYMATTR InstName M4
SYMATTR Value N_1u
SYMBOL pmos4 480 272 M180
WINDOW 3 56 4 Left 2
WINDOW 123 56 -24 Left 2
WINDOW 0 54 27 Left 2
SYMATTR Value P_1u
SYMATTR Value2 l=1u w=90u
SYMATTR InstName M3
SYMBOL voltage -288 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 0
SYMBOL pmos4 -144 272 M180
WINDOW 0 49 27 Left 2
WINDOW 3 85 66 Top 2
WINDOW 123 124 -14 Top 2
SYMATTR InstName M1
SYMATTR Value P_1u
SYMATTR Value2 l=1u w=30u
FLAG 224 528 0
FLAG -96 512 0
FLAG 64 512 0
FLAG 400 512 0
FLAG 528 512 0
FLAG 704 512 0
FLAG -288 256 0
FLAG -288 448 0
FLAG -288 368 Vin
FLAG -208 320 Vin
FLAG 96 320 Vin
FLAG 416 320 Vin
FLAG -96 112 VDD
FLAG 224 112 VDD
FLAG 528 112 VDD
FLAG -96 224 VDD
FLAG 528 224 VDD
FLAG 256 224 VDD
FLAG -288 176 VDD
FLAG -48 320 Vout
FLAG 272 320 Vout1
FLAG 608 320 Vout2
TEXT -128 16 Left 1 !.lib C:\\Users\\Sarthak\\Desktop\\CMOS_PRO\\pure_models.txt
TEXT -336 552 Left 2 !.dc Vin 0 5
TEXT -136 544 Left 2 ;Bn/Bp=1
TEXT 272 544 Left 2 ;Bn/Bp=3
TEXT 520 544 Left 2 ;Bn/Bp=0.333
* Z:\home\khalils\Downloads\files\data\raw_asc\858ef04a1de1_Draft21.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP27.asy)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1116.asy)
;dc V1 0 10 0.01
XU2 0 N001 VCC VEE VOUT OP27 ;pnba In+)In-)V+)V-)OUT
R2 N001 N002 10k
V4 0 0 3.3
V2 VCC 0 15
R3 VOUT N001 50k
D1 VOUT N001 D
V3 0 VEE 15
VIN N002 0 SINE(0 10 50)
XU1 CP3V3 VOUT 0 0 0 0 OUT N003 LT1116 ;pnba V+)In+)In-)V-)LATCH)GND)OUT+)OUT-
D2 N001 VOUT D
V1 CP3V3 0 3.3
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.1
.lib ADI.lib
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 904 680
WIRE 384 -64 384 -112
WIRE 384 -64 368 -64
WIRE 448 -64 448 -112
WIRE 368 0 368 -64
WIRE 448 0 448 -64
WIRE -240 32 -304 32
WIRE -64 32 -144 32
WIRE -144 48 -144 32
WIRE -64 48 -64 32
WIRE 688 64 640 64
WIRE 864 64 864 48
WIRE 864 64 768 64
WIRE 288 80 48 80
WIRE 368 80 368 0
WIRE 384 80 368 80
WIRE 48 96 48 80
WIRE 448 96 448 0
WIRE 528 96 448 96
WIRE 688 96 528 96
WIRE 816 96 768 96
WIRE 384 112 368 112
WIRE 368 144 368 112
WIRE 704 144 704 128
WIRE 720 144 720 128
WIRE 736 144 736 128
WIRE 736 144 720 144
WIRE 704 176 704 144
SYMBOL voltage -144 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL diode 448 -128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL diode 384 -48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL voltage -304 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 3.3
SYMBOL res 464 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 50k
SYMBOL voltage -304 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 38 43 Left 2
SYMATTR Value 3.3
SYMATTR InstName V1
SYMBOL voltage 48 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value SINE(0 10 50)
SYMATTR InstName VIN
SYMBOL res 384 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL OpAmps\\OP27 416 32 R0
SYMATTR InstName U2
SYMBOL Comparators\\LT1116 720 16 R0
SYMATTR InstName U1
SYMBOL voltage -144 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 38 43 Left 2
SYMATTR Value 15
SYMATTR InstName V2
FLAG 48 176 0
FLAG -64 48 0
FLAG 528 96 VOUT
FLAG -144 -48 VCC
FLAG 416 64 VCC
FLAG -144 128 VEE
FLAG 416 128 VEE
FLAG 368 144 0
FLAG 640 64 0
FLAG 704 176 0
FLAG -240 32 0
FLAG -304 -48 CP3V3
FLAG 864 48 OUT
FLAG -304 112 CN3V3
FLAG 704 144 CN3V3
FLAG 736 144 0
FLAG 720 32 CP3V3
TEXT -72 264 Left 2 !;dc V1 0 10 0.01
TEXT 136 320 Left 2 !.tran 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2166-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2166-1.5.asy)
C4 N002 0 1
V1 IN 0 5
C1 N008 0 2n
C6 N007 0 1p
R2 N007 N006 36K
C5 N006 0 680p
R1 N005 0 100K
L1 N004 OUT 1.5 Rser=6m
C3 OUT 0 84 Rser=2m
R3 OUT N001 100K
XU1 N002 N005 N002 OUT 0 0 N004 IN IN IN N001 N008 N007 N003 N002 ADP2166-x.x Rtop=600K Rbot=400K ;pnba SYNC)Rt)TRK)FB)Gnd)Pgnd)SW)Pvin)Avin)EN)Pgood)SS)Comp)Bst)Vreg
C2 N003 N004 .1
Rload OUT 0 .3
.tran 1m startup
.lib ADP2166-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 680
WIRE 48 -96 -144 -96
WIRE 176 -96 48 -96
WIRE 272 -96 176 -96
WIRE -144 -80 -144 -96
WIRE 176 -80 176 -96
WIRE 272 -80 272 -96
WIRE 48 -16 48 -96
WIRE 64 -16 48 -16
WIRE 448 -16 384 -16
WIRE 608 -16 528 -16
WIRE -144 16 -144 0
WIRE -32 64 -48 64
WIRE 48 64 32 64
WIRE 64 64 48 64
WIRE 432 64 384 64
WIRE 48 144 48 64
WIRE 64 144 48 144
WIRE 432 144 432 128
WIRE 432 144 384 144
WIRE 480 144 432 144
WIRE 608 144 608 -16
WIRE 608 144 560 144
WIRE 720 144 608 144
WIRE 832 144 720 144
WIRE 720 160 720 144
WIRE 832 160 832 144
WIRE 48 224 48 144
WIRE 64 224 48 224
WIRE 720 256 720 224
WIRE 832 256 832 240
WIRE -32 304 -48 304
WIRE 64 304 48 304
WIRE 608 304 608 144
WIRE 608 304 384 304
WIRE -160 384 -224 384
WIRE -32 384 -80 384
WIRE 64 384 -32 384
WIRE 400 384 384 384
WIRE 480 384 464 384
WIRE -224 400 -224 384
WIRE -32 400 -32 384
WIRE 176 464 176 448
WIRE 272 464 272 448
WIRE -224 480 -224 464
WIRE -32 480 -32 464
SYMBOL cap 32 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap 400 368 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL voltage -144 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 416 64 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL cap -48 400 R0
SYMATTR InstName C6
SYMATTR Value 1p
SYMBOL res 64 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 544 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res 816 144 R0
SYMATTR InstName Rload
SYMATTR Value .3
SYMBOL cap 704 160 R0
WINDOW 40 24 74 Left 2
SYMATTR Value 84
SYMATTR InstName C3
SYMATTR SpiceLine Rser=2m
SYMBOL ind 464 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=6m
SYMBOL cap -240 400 R0
SYMATTR InstName C5
SYMATTR Value 680p
SYMBOL res -64 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 36K
SYMBOL ADP2166-1.5 224 176 R0
SYMATTR InstName U1
FLAG 480 384 0
FLAG 272 464 0
FLAG -48 304 0
FLAG -224 480 0
FLAG -144 16 0
FLAG 720 256 0
FLAG 832 256 0
FLAG 832 144 OUT
FLAG -144 -96 IN
FLAG -48 64 0
FLAG -32 480 0
FLAG 176 464 0
TEXT 696 424 Left 2 !.tran 1m startup
* Z:\tmp\asc_dec_bjh7r6w2\061a8a33bb40_MariaIsabela_Ex10_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N003 N004 30
RB N002 N001 42,886
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 48 96
WIRE 400 96 240 96
WIRE 768 176 768 -240
WIRE 768 352 768 256
WIRE 768 352 464 352
SYMBOL voltage 768 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 30
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RB
SYMATTR Value 42,886
* Z:\home\khalils\Downloads\files\data\raw_asc\386dc8c7eccd_BC549Cm.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 N002 0 0 BC549C
I1 0 N002 0
V1 N001 0 6
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.lib BC549C.sub
.dc i1 0 100uA 10uA
.meas ib find Ic(Q1)/Ib(Q1) when Ic(Q1)=6/303
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1472 680
WIRE 704 112 464 112
WIRE 464 144 464 112
WIRE 704 144 704 112
WIRE 640 192 576 192
WIRE 576 208 576 192
WIRE 464 256 464 224
WIRE 704 272 704 240
WIRE 576 304 576 288
SYMBOL current 576 288 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName I1
SYMATTR Value 0
SYMBOL npn 640 144 R0
SYMATTR InstName Q1
SYMATTR Value BC549C
SYMBOL voltage 464 128 R0
SYMATTR InstName V1
SYMATTR Value 6
FLAG 464 256 0
FLAG 576 304 0
FLAG 704 272 0
TEXT 824 56 Left 2 !.lib BC549C.sub
TEXT 792 128 Left 2 !.dc i1 0 100uA 10uA\n.meas ib find Ic(Q1)/Ib(Q1) when Ic(Q1)=6/303
* Z:\home\khalils\Downloads\files\data\raw_asc\2542f363ba7b_Week1_Ex2A.asc
* Generated by LTspice 26.0.1 for Windows.
VDD N001 0 1.8
M1 out N003 0 0 nch l=2u w=4u
R1 N001 out 10k
VGS N002 0 0.9
R2 N003 N002 100k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib 'C:\Program Files\LTC\LTspiceXVII\lib\cmp\log018.l' TT
.dc VGS 0 1.8 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 160 208 160
WIRE 208 208 208 160
WIRE 208 320 208 288
WIRE 208 336 208 320
WIRE 304 384 208 384
WIRE 32 416 -48 416
WIRE 160 416 112 416
WIRE 416 416 416 160
WIRE -48 432 -48 416
WIRE -48 576 -48 512
WIRE 208 576 208 432
WIRE 208 576 -48 576
WIRE 304 576 304 384
WIRE 304 576 208 576
WIRE 416 576 416 496
WIRE 416 576 304 576
WIRE 208 608 208 576
SYMBOL res 128 400 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res 192 192 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 416 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1.8
SYMBOL nmos4 160 336 R0
SYMATTR InstName M1
SYMATTR Value nch
SYMATTR Value2 l=2u w=4u
SYMBOL voltage -48 416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 0.9
FLAG 208 608 0
FLAG 208 320 out
TEXT -32 120 Left 2 !.lib 'C:\\Program Files\\LTC\\LTspiceXVII\\lib\\cmp\\log018.l' TT
TEXT -32 152 Left 2 !.dc VGS 0 1.8 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\6e912dba12e1_NMOS_Char.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 0 NMOS l=100n w=1u
V1 N002 0 0.6
V2 N001 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc 65nm_bulk.txt
.dc V2 0 1.2 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 464 80 176 80
WIRE 176 96 176 80
WIRE 464 112 464 80
WIRE 304 144 176 144
WIRE 128 176 -16 176
WIRE -16 192 -16 176
WIRE 176 256 176 192
WIRE 304 256 304 144
WIRE 464 256 464 192
WIRE -16 320 -16 272
FLAG -16 320 0
FLAG 176 256 0
FLAG 304 256 0
FLAG 464 256 0
SYMBOL nmos4 128 96 R0
SYMATTR InstName M1
SYMATTR Value2 l=100n w=1u
SYMBOL voltage -16 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0.6
SYMBOL voltage 464 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
TEXT -152 0 Left 2 !.inc 65nm_bulk.txt
TEXT -144 40 Left 2 !.dc V2 0 1.2 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC699.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1086-5.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC699.asy)
XU2 NC_01 N001 0 NC_02 NC_03 N002 OUT NC_04 LTC699 ;pnba Vcc)Vcc)GND)GND)NC)WDI)_Reset)GND
V3 IN 0 PWL(0 0 200u 9) Rser=10m
XU1 0 N001 IN LT1086-5 ;pnba ADJ)OUT)IN
V2 N003 0 PULSE(0 2 0.4 1u 1u 20m 40m) Rser=0.1
V1 N002 N003 PULSE(0 2 0 1u 1u 20m 40m 6) Rser=0.1
C1 N001 0 22
R1 N001 OUT 10K
.tran 0.7
.lib LT1083.lib
.lib LTC699.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1152 680
WIRE 320 -112 -336 -112
WIRE 320 -64 320 -112
WIRE -640 32 -896 32
WIRE -336 32 -336 -112
WIRE -336 32 -384 32
WIRE -240 32 -336 32
WIRE 192 32 112 32
WIRE 320 32 320 16
WIRE 320 32 192 32
WIRE -896 48 -896 32
WIRE -336 48 -336 32
WIRE -240 128 -256 128
WIRE 272 128 112 128
WIRE 640 128 352 128
WIRE 752 128 720 128
WIRE -896 144 -896 128
WIRE -336 144 -336 112
WIRE -512 160 -512 128
SYMBOL VOLTAGE 624 128 R270
WINDOW 123 -53 56 VBottom 2
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 0.4 1u 1u 20m 40m)
SYMATTR SpiceLine Rser=0.1
SYMBOL VOLTAGE 256 128 R270
WINDOW 123 -53 56 VBottom 2
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 2 0 1u 1u 20m 40m 6)
SYMATTR SpiceLine Rser=0.1
SYMBOL res 304 -80 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL LTC699 -64 96 R0
SYMATTR InstName U2
SYMBOL cap -352 48 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL VOLTAGE -896 32 R0
WINDOW 123 24 117 Left 2
SYMATTR Value PWL(0 0 200u 9)
SYMATTR InstName V3
SYMATTR SpiceLine Rser=10m
SYMBOL PowerProducts\\LT1086-5 -512 32 R0
SYMATTR InstName U1
FLAG -256 128 0
FLAG -896 144 0
FLAG -336 144 0
FLAG -512 160 0
FLAG -896 32 IN
FLAG 752 128 0
FLAG 192 32 OUT
TEXT 464 240 Left 2 !.tran 0.7
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4177-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4177-2.asy)
R1 N001 0 10K
V1 +V 0 15
XU1 IN N001 +V -V OUT ADA4177 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 10K
Vin IN 0 SINE(0 1 10K)
V2 -V 0 -15
.tran 1m
.lib ADA4177.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 416 -1232 400 -1232
WIRE 512 -1232 496 -1232
WIRE 544 -1232 512 -1232
WIRE 656 -1232 624 -1232
WIRE 128 -1136 128 -1152
WIRE 240 -1136 240 -1152
WIRE 512 -1120 512 -1232
WIRE 544 -1120 512 -1120
WIRE 656 -1104 656 -1232
WIRE 656 -1104 608 -1104
WIRE 720 -1104 656 -1104
WIRE 544 -1088 432 -1088
WIRE 432 -1072 432 -1088
WIRE 128 -1040 128 -1056
WIRE 240 -1040 240 -1056
WIRE 432 -976 432 -992
SYMBOL res 512 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 240 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 128 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\ADA4177-2 576 -1104 R0
SYMATTR InstName U1
FLAG 128 -1152 +V
FLAG 128 -1040 0
FLAG 432 -976 0
FLAG 720 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 240 -1152 -V
FLAG 576 -1072 -V
FLAG 400 -1232 0
FLAG 240 -1040 0
TEXT 704 -992 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3080-1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 0 165K
Rload N002 0 1.5
C1 N002 0 10
XU1 MP_01 N003 N002 N001 N001 LT3080-1 ;pnba )SET)OUT)Vcntrl)IN
V1 N001 0 6
XU2 MP_02 N003 N002 N001 N001 LT3080-1 ;pnba )SET)OUT)Vcntrl)IN
.tran 50u startup
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3080-1.asy)
.lib LT3080-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1644 772
WIRE 96 80 -48 80
WIRE 96 96 96 80
WIRE -48 208 -48 80
WIRE -32 208 -48 208
WIRE 464 208 224 208
WIRE -48 336 -48 208
WIRE 144 336 -48 336
WIRE 288 336 144 336
WIRE 288 352 288 336
WIRE -48 368 -48 336
WIRE -48 464 -48 448
WIRE 144 464 144 336
WIRE 160 464 144 464
WIRE 464 464 464 208
WIRE 464 464 416 464
WIRE 560 464 464 464
WIRE 464 480 464 464
WIRE 560 480 560 464
WIRE 464 576 464 544
WIRE 560 576 560 560
WIRE 96 592 96 320
WIRE 288 592 288 576
WIRE 288 592 96 592
WIRE 288 608 288 592
WIRE 288 704 288 688
FLAG 288 704 0
FLAG -48 464 0
FLAG 560 576 0
FLAG 464 576 0
SYMBOL res 272 592 R0
SYMATTR InstName R1
SYMATTR Value 165K
SYMBOL res 544 464 R0
SYMATTR InstName Rload
SYMATTR Value 1.5
SYMBOL cap 448 480 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LT3080-1 96 208 R0
SYMATTR InstName U1
SYMBOL voltage -48 352 R0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL PowerProducts\\LT3080-1 288 464 R0
SYMATTR InstName U2
TEXT 424 640 Left 2 !.tran 50u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0c97e466e8cb_rectifier_halfwave_tran.asc
* Generated by LTspice 26.0.1 for Windows.
D1 IN OUT 1N4148
V1 IN 0 SINE(0 5 60 0 0 0 3)
R1 OUT 0 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 50m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 956
WIRE 112 464 96 464
WIRE 208 464 112 464
WIRE 352 464 272 464
WIRE 368 464 352 464
WIRE 96 496 96 464
WIRE 368 496 368 464
WIRE 96 608 96 576
WIRE 368 608 368 576
WIRE 368 608 96 608
WIRE 96 640 96 608
SYMBOL diode 208 480 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 352 480 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage 96 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 60 0 0 0 3)
FLAG 96 640 0
FLAG 112 464 IN
FLAG 352 464 OUT
TEXT 112 696 Left 2 !.tran 50m