Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1213.asc
* Generated by LTspice 26.0.1 for Windows.
* Single Supply 3-Pole 1MHz Filter
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1213.asy)
V1 +V 0 15
R5 N002 IN 680
R2 N001 0 4.12K
V3 IN 0 3.75 AC 1
R1 OUT N001 4.12K
C2 N004 0 150p
XU1 N004 N001 +V 0 OUT LT1213 ;pnba In+)In-)V+)V-)OUT
R3 N004 N003 680
C4 N002 0 390p
R4 N003 N002 680
C3 OUT N003 200p
C1 OUT N001 5p
.ac oct 100 1K 10Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 176 0 144 0
WIRE 304 0 240 0
WIRE -224 48 -224 32
WIRE 48 96 32 96
WIRE 144 96 144 0
WIRE 144 96 128 96
WIRE 176 96 144 96
WIRE 304 96 304 0
WIRE 304 96 256 96
WIRE -224 144 -224 128
WIRE 192 208 192 192
WIRE 144 224 144 96
WIRE 160 224 144 224
WIRE 304 240 304 96
WIRE 304 240 224 240
WIRE 320 240 304 240
WIRE -240 256 -384 256
WIRE -144 256 -160 256
WIRE -112 256 -144 256
WIRE -16 256 -32 256
WIRE 0 256 -16 256
WIRE 112 256 80 256
WIRE 160 256 112 256
WIRE -384 272 -384 256
WIRE -144 272 -144 256
WIRE 112 272 112 256
WIRE 192 288 192 272
WIRE 112 352 112 336
WIRE -384 368 -384 352
WIRE -144 368 -144 336
WIRE -16 384 -16 256
WIRE 192 384 -16 384
WIRE 304 384 304 240
WIRE 304 384 256 384
SYMBOL voltage -384 256 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value 3.75
SYMBOL cap 240 -16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 5p
SYMBOL voltage -224 32 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 680
SYMBOL cap 96 272 R0
SYMATTR InstName C2
SYMATTR Value 150p
SYMBOL res -144 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 680
SYMBOL opamps\\LT1213 192 176 R0
SYMATTR InstName U1
SYMBOL res 144 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.12K
SYMBOL cap -160 272 R0
SYMATTR InstName C4
SYMATTR Value 390p
SYMBOL cap 256 368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 200p
SYMBOL res -16 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 680
SYMBOL res 272 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 4.12K
FLAG -224 144 0
FLAG 192 192 +V
FLAG -224 32 +V
FLAG -384 368 0
FLAG 192 288 0
FLAG 32 96 0
FLAG 112 352 0
FLAG -144 368 0
FLAG 320 240 OUT
FLAG -384 256 IN
TEXT 16 -48 Bottom 2 ;Single Supply 3-Pole 1MHz Filter
TEXT -128 424 Left 2 !.ac oct 100 1K 10Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2919-25.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2919-25.asy)
R1 N005 0 10K
R3 N005 N003 1.1K
V1 N004 0 PWL(0 0 10m 12)
XU1 N002 N004 N006 N008 N010 0 N009 N007 N005 N003 LTC2919-25 ;pnba SEL)Vcc)OUT1)OUT2)_RST)GND)REF)TMR)ADJ2)ADJ1
R5 N001 N008 10K
V3 N002 0 PWL(0 0 5010m 0 5011m 0.9 10010m 0.9 10011m 5)
C1 0 N007 22n
C2 0 N010 1000p
R6 N001 N010 10K
R4 N001 N006 10K
V2 N001 0 PULSE(2.5 5 0 1000m 1000m 3000m 5000m)
I1 N009 0 PWL(0 0 1 0 1.001 1m 2 1m 2.001 -1m 3 -1m 4 -5m 4.001 -5m 5 5m)
R2 N003 N001 57.6K
.tran 15
.lib LTC2919-25.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1268 788
WIRE -304 -64 -576 -64
WIRE -208 -64 -224 -64
WIRE -576 16 -576 -64
WIRE -480 16 -576 16
WIRE -384 16 -480 16
WIRE 480 16 -384 16
WIRE 480 48 480 16
WIRE 96 80 -208 80
WIRE 192 80 176 80
WIRE 480 176 480 128
WIRE 480 176 320 176
WIRE -576 192 -576 16
WIRE -480 192 -480 16
WIRE -384 192 -384 16
WIRE -208 208 -208 80
WIRE -128 208 -208 208
WIRE 320 208 320 176
WIRE 320 208 192 208
WIRE 480 208 480 176
WIRE -256 272 -288 272
WIRE -128 272 -176 272
WIRE 320 272 192 272
WIRE 320 320 320 272
WIRE 480 320 480 288
WIRE 480 320 320 320
WIRE -384 336 -384 272
WIRE -128 336 -384 336
WIRE 208 336 192 336
WIRE 480 336 480 320
WIRE -480 400 -480 272
WIRE -128 400 -480 400
WIRE 304 400 192 400
WIRE 480 432 480 416
WIRE 304 448 304 400
WIRE -576 464 -576 272
WIRE -128 464 -576 464
WIRE 224 464 192 464
WIRE -576 480 -576 464
WIRE -576 560 -576 544
WIRE 304 560 304 528
SYMBOL current 304 448 R0
SYMATTR InstName I1
SYMATTR Value PWL(0 0 1 0 1.001 1m 2 1m 2.001 -1m 3 -1m 4 -5m 4.001 -5m 5 5m)
SYMBOL res -400 176 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL voltage -160 272 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 34 73 VTop 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 10m 12)
SYMBOL res -496 176 R0
SYMATTR InstName R5
SYMATTR Value 10K
SYMBOL res 464 304 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 1.1K
SYMBOL cap -560 544 R180
WINDOW 0 -34 53 Left 2
WINDOW 3 -66 14 Left 2
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL voltage 80 80 R270
WINDOW 3 -32 56 VBottom 2
WINDOW 0 32 56 VTop 2
SYMATTR Value PWL(0 0 5010m 0 5011m 0.9 10010m 0.9 10011m 5)
SYMATTR InstName V3
SYMBOL res 464 144 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 57.6K
SYMBOL LTC2919-25 32 336 R0
SYMATTR InstName U1
SYMBOL res 464 320 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res -592 176 R0
SYMATTR InstName R6
SYMATTR Value 10K
SYMBOL cap 272 320 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 29 VTop 2
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL voltage -320 -64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value PULSE(2.5 5 0 1000m 1000m 3000m 5000m)
FLAG 224 464 0
FLAG -288 272 0
FLAG 272 336 0
FLAG 480 432 0
FLAG -208 -64 0
FLAG -576 560 0
FLAG 304 560 0
FLAG 192 80 0
TEXT 0 552 Left 2 !.tran 15
* Z:\home\khalils\Downloads\files\data\raw_asc\2ebcab68195a_6375.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6375.asy)
V3 0 -V 15
Rload N002 0 500
XU1 N001 MP_01 0 0 0 0 NC_02 OUT +V 0 0 0 MP_03 N002 -V LT6375 ;pnba +IN))+REFA)+REFB)+REFC)REF)_SHDN)OUT)V+)-REFC)-REFB)-REFA))-IN)V-
V2 N001 0 PWL(0 0 10m 270 30m -270)
Rsense N001 N002 10
V1 +V 0 15
.tran 30m
.lib LT6375.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4832 1408
WIRE 640 464 640 448
WIRE 784 464 784 448
WIRE 640 560 640 544
WIRE 784 560 784 544
WIRE 1008 576 1008 560
WIRE 1088 576 1088 560
WIRE 1168 576 1168 560
WIRE 1360 576 1360 544
WIRE 752 672 608 672
WIRE 848 672 752 672
WIRE 976 688 912 688
WIRE 1520 704 1456 704
WIRE 912 720 848 672
WIRE 976 720 912 720
WIRE 864 752 912 688
WIRE 864 752 752 752
WIRE 752 768 752 752
WIRE 1472 768 1456 768
WIRE 608 832 608 672
WIRE 1008 848 1008 832
WIRE 1088 848 1088 832
WIRE 1168 848 1168 832
WIRE 752 864 752 848
WIRE 1360 864 1360 832
WIRE 608 928 608 912
SYMBOL voltage 640 448 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 608 816 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 10m 270 30m -270)
SYMBOL res 736 656 R0
SYMATTR InstName Rsense
SYMATTR Value 10
SYMBOL voltage 784 560 M180
WINDOW 0 43 70 Left 2
WINDOW 3 39 33 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL LT6375 1232 704 R0
SYMATTR InstName U1
SYMBOL res 736 752 R0
SYMATTR InstName Rload
SYMATTR Value 500
FLAG 640 560 0
FLAG 784 560 0
FLAG 640 448 +V
FLAG 784 448 -V
FLAG 1520 704 OUT
FLAG 1008 560 0
FLAG 1168 848 0
FLAG 1168 560 0
FLAG 1008 848 0
FLAG 1472 768 0
FLAG 1088 848 0
FLAG 1088 560 0
FLAG 752 864 0
FLAG 608 928 0
FLAG 1360 544 +V
FLAG 1360 864 -V
TEXT 1392 1000 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\029325a2a4bc_ESP32VoltageSupervisor.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N002 N004 0 0 BC182B
V1 N001 0 PULSE(0 3.3 0 0.02 0.01 0.01 2)
R1 N001 N002 100K
Q2 RESETN N003 0 0 BC182B
R3 N001 RESETN 15K
R5 N003 N002 220K
R4 N001 N004 68K
R2 N004 P001 3.3K
D1 P001 0 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 30m
.TEMP 0 20 40 60
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 992 680
WIRE 64 -64 -128 -64
WIRE 208 -64 64 -64
WIRE 704 -64 208 -64
WIRE 64 -32 64 -64
WIRE 208 -32 208 -64
WIRE 704 -32 704 -64
WIRE 64 -16 64 -32
WIRE -128 48 -128 -64
WIRE 832 48 704 48
WIRE 208 64 208 48
WIRE 416 64 208 64
WIRE 640 64 496 64
WIRE 640 96 640 64
WIRE 64 112 64 48
WIRE 144 112 64 112
WIRE 64 128 64 112
WIRE -128 256 -128 128
WIRE 208 272 208 160
WIRE 704 272 704 144
FLAG -128 256 0
FLAG 208 272 0
FLAG 832 48 RESETN
IOPIN 832 48 Out
FLAG 704 272 0
FLAG 64 272 0
SYMBOL npn 144 64 R0
SYMATTR InstName Q1
SYMATTR Value BC182B
SYMBOL voltage -128 32 R0
WINDOW 3 -270 103 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 0.02 0.01 0.01 2)
SYMBOL res 192 -48 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL npn 640 48 R0
SYMATTR InstName Q2
SYMATTR Value BC182B
SYMBOL res 688 -48 R0
SYMATTR InstName R3
SYMATTR Value 15K
SYMBOL res 512 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 220K
SYMBOL res 48 -48 R0
SYMATTR InstName R4
SYMATTR Value 68K
SYMBOL res 48 112 R0
SYMATTR InstName R2
SYMATTR Value 3.3K
SYMBOL diode 48 208 R0
WINDOW 0 42 26 Left 2
WINDOW 3 36 53 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
TEXT -402 200 Left 2 !.tran 30m
TEXT -400 240 Left 2 !.TEMP 0 20 40 60
* Z:\home\khalils\Downloads\files\data\raw_asc\f3a107741671_Circuito5.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 50
C1 N002 N003 10n
L1 N003 0 1m
V1 N001 0 AC 1
.ac dec 10000 1 10Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 96 32 96
WIRE 224 96 176 96
WIRE 336 96 288 96
WIRE 32 128 32 96
WIRE 336 128 336 96
WIRE 32 256 32 208
WIRE 336 256 336 208
WIRE 336 256 32 256
WIRE 32 288 32 256
SYMBOL res 192 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL cap 224 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL voltage 32 112 R0
WINDOW 123 21 107 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL ind 320 112 R0
SYMATTR InstName L1
SYMATTR Value 1m
FLAG 32 288 0
TEXT 0 312 Left 2 !.ac dec 10000 1 10Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4120C.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4120C.asy)
R1 GATE N004 5
V2 N002 0 15
XU1 N001 N003 0 0 N004 N002 ADuM4120xx Glitch=1 Vrun2=11.2 ;pnba Vdd1)Vin)GND1)GND2)Vout)Vdd2
V1 N001 0 5
C1 GATE 0 2n
V3 N003 0 PULSE(0 5 0 2n 2n 998n 2u)
.tran 10u
.lib ADuM4120xx.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 16 0 16
WIRE 512 16 320 16
WIRE 0 32 0 16
WIRE 512 32 512 16
WIRE 160 48 160 16
WIRE 320 48 320 16
WIRE 0 128 0 112
WIRE 512 128 512 112
WIRE 112 160 -32 160
WIRE 400 160 368 160
WIRE 512 160 480 160
WIRE 544 160 512 160
WIRE 512 176 512 160
WIRE 160 288 160 272
WIRE 320 288 320 272
SYMBOL voltage 0 16 R0
WINDOW 0 25 25 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 512 16 R0
WINDOW 0 29 30 Left 2
WINDOW 3 31 84 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL cap 496 176 R0
WINDOW 0 35 16 Left 2
WINDOW 3 36 51 Left 2
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL res 496 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL voltage -16 160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 2n 2n 998n 2u)
SYMBOL ADuM4120C 240 160 R0
SYMATTR InstName U1
FLAG 160 288 0
FLAG 320 288 0
FLAG 512 240 0
FLAG 544 160 GATE
FLAG 512 128 0
FLAG 0 128 0
FLAG -112 160 0
TEXT 400 280 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2504-3.5.asc
* Generated by LTspice 26.0.1 for Windows.
* PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2504-3.5.asy)
C1 OUT 0 10
L1 N001 N002 1.5 Rser=80m
XU1 N001 N002 OUT IN IN 0 OUT NC_01 ADP2504-3.5 ;pnba SW1)SW2)FB)EN)PVin)GND)Vout)Sync
Rload OUT 0 50
V1 IN 0 3.3
.tran 400u startup
.lib ADP2504-3.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 48 64 32 64
WIRE 336 64 304 64
WIRE -64 80 -64 64
WIRE 32 144 32 64
WIRE 48 144 32 144
WIRE 336 144 304 144
WIRE -64 176 -64 160
WIRE 320 224 304 224
WIRE 384 224 320 224
WIRE 496 224 384 224
WIRE 384 240 384 224
WIRE 496 240 496 224
WIRE 48 304 32 304
WIRE 320 304 320 224
WIRE 320 304 304 304
WIRE 384 336 384 304
WIRE 496 336 496 320
SYMBOL ind 320 48 R0
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=80m
SYMBOL cap 368 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 480 224 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL ADP2504-3.5 176 176 R0
SYMATTR InstName U1
SYMBOL voltage -64 64 R0
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG 384 336 0
FLAG 32 304 0
FLAG -64 176 0
FLAG 496 336 0
FLAG 496 224 OUT
FLAG -64 64 IN
TEXT 432 376 Left 2 !.tran 400u startup
TEXT 192 0 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Z:\tmp\asc_dec_bjh7r6w2\0dbebf44bced_2AND_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N003 A N004 N004 NMOS
M6 Y N003 0 0 NMOS
M4 N002 A N003 N002 PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -128 -16 -176 -16
WIRE 160 -16 -32 -16
WIRE 416 -16 160 -16
WIRE -32 16 -32 -16
WIRE 128 16 96 16
WIRE 160 16 160 -16
WIRE 160 16 128 16
WIRE 240 16 160 16
WIRE 272 16 240 16
WIRE 416 16 416 -16
WIRE 448 16 416 16
WIRE -128 32 -128 -16
WIRE -128 32 -272 32
WIRE 128 64 128 16
WIRE 128 64 96 64
WIRE 272 64 272 16
WIRE 272 64 240 64
WIRE 448 64 448 16
WIRE 448 64 416 64
WIRE 192 96 176 96
WIRE 368 96 336 96
WIRE 240 112 96 112
WIRE -32 128 -32 96
WIRE 48 144 48 96
WIRE 128 144 48 144
WIRE 240 144 240 112
WIRE 336 144 336 96
WIRE 336 144 240 144
WIRE 416 144 416 112
WIRE 480 144 416 144
WIRE -128 176 -128 32
WIRE -128 176 -176 176
WIRE 240 176 240 144
WIRE 416 176 416 144
WIRE 128 192 128 144
WIRE 128 192 -112 192
WIRE -112 224 -112 192
WIRE 176 224 176 96
WIRE 176 224 16 224
WIRE 272 224 240 224
WIRE 448 224 416 224
WIRE 16 256 16 224
WIRE 128 256 128 192
WIRE 192 256 128 256
WIRE 336 256 336 144
WIRE 368 256 336 256
WIRE 272 272 272 224
WIRE 272 272 240 272
WIRE 448 272 448 224
WIRE 448 272 416 272
WIRE 240 304 240 272
WIRE 416 304 416 272
WIRE 272 352 240 352
WIRE 16 368 16 336
WIRE 176 384 176 224
WIRE 272 400 272 352
SYMBOL nmos4 192 176 R0
SYMATTR InstName M1
SYMBOL nmos4 368 176 R0
SYMATTR InstName M6
SYMBOL pmos4 48 16 R0
SYMATTR InstName M4
FLAG 416 304 0
FLAG -32 128 0
FLAG 16 368 0
FLAG -112 192 A
FLAG 16 224 B
FLAG 480 144 Y
* Z:\tmp\asc_dec_bjh7r6w2\135f19817ce7_1678_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R6 N007 N008 3.4K
R4 N006 N008 1K
XU4 IN- N002 N001 +V -V LT1678 ;pnba IN+)IN-)OUT)VCC)VEE
V3 IN- IN+ SINE(0 10m 1K)
XU1 IN+ N007 N008 +V -V LT1678 ;pnba IN+)IN-)OUT)VCC)VEE
* Library below included based on ModelFile attribute of instance XU4, XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1678.asy)
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2696 680
WIRE 144 -240 144 -256
WIRE 112 -224 48 -224
WIRE 352 -208 176 -208
WIRE -256 -192 -256 -208
WIRE -128 -192 -128 -208
WIRE 112 -192 80 -192
WIRE 144 -160 144 -176
WIRE 80 -96 80 -192
WIRE 352 -96 80 -96
WIRE 288 -80 176 -80
WIRE 0 -64 -256 -64
WIRE 48 -64 48 -224
WIRE 48 -64 0 -64
WIRE -256 -32 -256 -64
WIRE 240 -16 240 -32
WIRE 512 -16 512 -208
WIRE 544 -16 512 -16
WIRE 288 0 288 -80
WIRE 288 0 272 0
WIRE 176 16 176 -80
WIRE 176 16 80 16
WIRE 208 16 176 16
WIRE 352 16 352 0
WIRE 352 16 320 16
WIRE 544 16 512 16
WIRE 320 32 320 16
WIRE 320 32 272 32
WIRE 352 32 352 16
WIRE 576 48 576 32
WIRE 240 64 240 48
WIRE -256 80 -256 48
WIRE 0 80 -256 80
WIRE 48 80 0 80
WIRE -256 96 -256 80
WIRE 352 128 352 112
WIRE 352 128 80 128
WIRE 352 144 352 128
WIRE 144 208 144 192
WIRE 80 224 80 128
WIRE 112 224 80 224
WIRE 352 240 352 224
WIRE 352 240 176 240
WIRE 416 240 352 240
WIRE 512 240 512 16
WIRE 512 240 496 240
WIRE 528 240 512 240
WIRE 624 240 608 240
WIRE 48 256 48 80
WIRE 112 256 48 256
WIRE 144 288 144 272
SYMBOL res 336 128 R0
SYMATTR InstName R6
SYMATTR Value 3.4K
SYMBOL res 512 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL opamps\\LT1678 144 -208 M180
WINDOW 0 21 27 Left 2
WINDOW 3 23 -29 Left 2
SYMATTR InstName U4
SYMBOL voltage -256 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 10m 1K)
SYMBOL opamps\\LT1678 144 240 R0
SYMATTR InstName U1
FLAG -128 -192 0
FLAG 144 192 +V
FLAG 144 288 -V
FLAG -256 -192 0
FLAG 576 48 -V
FLAG 240 -32 +V
FLAG 240 64 -V
FLAG 144 -160 +V
FLAG 144 -256 -V
FLAG 624 240 0
FLAG 0 -64 IN-
FLAG 0 80 IN+
* Z:\tmp\asc_dec_bjh7r6w2\0e0cf1426491_XorCMOS_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M6 N012 B 0 0 NMOS l=65nm w=65nm
M4 N004 N008 N010 N001 PMOS l=65nm w=162.5nm
M2 N004 N007 N010 N001 PMOS l=65nm w=162.5nm
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 720
WIRE 160 32 144 32
WIRE 256 32 256 -48
WIRE 256 32 160 32
WIRE 352 32 256 32
WIRE 368 32 352 32
WIRE 160 80 160 32
WIRE 160 80 144 80
WIRE 352 80 352 32
WIRE 368 80 352 80
WIRE 96 112 -160 112
WIRE 672 112 416 112
WIRE 256 128 144 128
WIRE 368 128 256 128
WIRE 256 176 256 128
WIRE 256 176 144 176
WIRE 368 176 256 176
WIRE 160 224 160 80
WIRE 160 224 144 224
WIRE 352 224 352 80
WIRE 368 224 352 224
WIRE -96 240 -160 240
WIRE 672 240 608 240
WIRE 80 256 32 256
WIRE 96 256 80 256
WIRE 448 256 416 256
WIRE 480 256 448 256
WIRE -96 272 -160 272
WIRE 256 272 144 272
WIRE 368 272 256 272
WIRE 672 272 608 272
WIRE 256 320 256 272
WIRE 672 320 256 320
WIRE 80 352 80 256
WIRE 432 352 80 352
WIRE 256 368 256 320
WIRE 256 368 144 368
WIRE 368 368 256 368
WIRE 160 416 144 416
WIRE 96 448 32 448
WIRE 432 448 432 352
WIRE 144 544 144 464
WIRE 160 592 160 416
WIRE 160 592 144 592
WIRE 96 624 32 624
WIRE 448 624 448 256
WIRE 160 640 160 592
WIRE 160 640 144 640
WIRE 144 672 144 640
SYMBOL nmos4 96 544 R0
SYMATTR InstName M6
SYMATTR Value2 l=65nm w=65nm
SYMBOL pmos4 416 176 M0
SYMATTR InstName M4
SYMATTR Value2 l=65nm w=162.5nm
SYMBOL pmos4 96 176 R0
SYMATTR InstName M2
SYMATTR Value2 l=65nm w=162.5nm
FLAG 144 672 0
FLAG 32 448 A
FLAG 32 624 B
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1108-12.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1108-12.asy)
D1 N001 OUT MBRS360
C2 OUT 0 100 Rser=0.02
XU1 IN IN N001 0 0 N002 N003 OUT LT1108 top=753K bot=87.4K ;pnba Ilim)Vin)SW1)SW2)GND)AO)SET)Sense
L1 IN N001 33 Rser=0.02 Rpar=5000
Rload OUT 0 50
V1 IN 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
.lib LT1108.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2456 1432
WIRE 1472 912 1264 912
WIRE 1600 912 1472 912
WIRE 1632 912 1600 912
WIRE 1744 912 1712 912
WIRE 1792 912 1744 912
WIRE 1904 912 1856 912
WIRE 1968 912 1904 912
WIRE 1264 928 1264 912
WIRE 1968 928 1968 912
WIRE 1472 960 1472 912
WIRE 1600 960 1600 912
WIRE 1264 1024 1264 1008
WIRE 1392 1024 1376 1024
WIRE 1744 1024 1744 912
WIRE 1744 1024 1680 1024
WIRE 1968 1024 1968 1008
WIRE 1904 1104 1904 912
WIRE 1904 1104 1680 1104
WIRE 1904 1120 1904 1104
WIRE 1392 1184 1376 1184
WIRE 1696 1184 1680 1184
WIRE 1904 1200 1904 1184
WIRE 1536 1264 1536 1248
SYMBOL IND 1616 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL PowerProducts\\LT1108-12 1536 1104 R0
SYMATTR InstName U1
SYMBOL POLCAP 1888 1120 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL schottky 1792 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL res 1952 912 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL VOLTAGE 1264 912 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 1968 912 OUT
FLAG 1904 1200 0
FLAG 1968 1024 0
FLAG 1264 1024 0
FLAG 1696 1184 0
FLAG 1536 1264 0
FLAG 1264 912 IN
TEXT 1712 1248 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3548.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3548.asy)
Rload2 OUT2 0 20
C4 OUT1 N004 33p
L1 N002 OUT1 2.2
L2 N001 OUT2 4.7
C3 OUT2 N003 68p
R3 N003 0 280K
R1 N004 0 301K
Rload1 OUT1 0 5
XU1 N004 IN IN N002 0 IN N001 MP_01 IN N003 LTC3548 ;pnba FB1)Run1)Vin)SW1)GND)Mode)SW2))Run2)FB2
V1 IN 0 2.8
R2 OUT1 N004 604K
R4 OUT2 N003 887K
C2 OUT2 0 4.7
C1 OUT1 0 10
.tran 1m startup
.lib LTC3548.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 708
WIRE 176 32 16 32
WIRE 272 32 176 32
WIRE 352 32 272 32
WIRE 432 32 352 32
WIRE 16 48 16 32
WIRE 272 64 272 32
WIRE 352 64 352 32
WIRE 432 64 432 32
WIRE 176 128 176 32
WIRE 208 128 176 128
WIRE 16 144 16 128
WIRE -128 224 -272 224
WIRE -48 224 -128 224
WIRE 48 224 -48 224
WIRE 96 224 48 224
WIRE 208 224 176 224
WIRE 528 224 496 224
WIRE 640 224 608 224
WIRE 752 224 640 224
WIRE 832 224 752 224
WIRE 928 224 832 224
WIRE -272 240 -272 224
WIRE -128 240 -128 224
WIRE -48 240 -48 224
WIRE 48 240 48 224
WIRE 640 240 640 224
WIRE 752 240 752 224
WIRE 832 240 832 224
WIRE 928 240 928 224
WIRE -272 336 -272 320
WIRE -128 336 -128 304
WIRE -48 336 -48 304
WIRE 48 336 48 320
WIRE 48 336 -48 336
WIRE 208 336 48 336
WIRE 640 336 640 320
WIRE 640 336 496 336
WIRE 752 336 752 304
WIRE 752 336 640 336
WIRE 832 336 832 304
WIRE 928 336 928 320
WIRE 48 352 48 336
WIRE 640 352 640 336
WIRE 352 400 352 384
WIRE 48 448 48 432
WIRE 640 448 640 432
SYMBOL res 624 336 R0
SYMATTR InstName R1
SYMATTR Value 301K
SYMBOL polcap 816 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 32 336 R0
SYMATTR InstName R3
SYMATTR Value 280K
SYMBOL res 32 224 R0
SYMATTR InstName R4
SYMATTR Value 887K
SYMBOL ind 512 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL VOLTAGE 16 32 R0
SYMATTR InstName V1
SYMATTR Value 2.8
SYMBOL PowerProducts\\LTC3548 352 224 R0
SYMATTR InstName U1
SYMBOL cap 736 240 R0
SYMATTR InstName C4
SYMATTR Value 33p
SYMBOL polcap -144 240 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL ind 192 240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 4.7
SYMBOL res -288 224 R0
SYMATTR InstName Rload2
SYMATTR Value 20
SYMBOL cap -64 240 R0
SYMATTR InstName C3
SYMATTR Value 68p
SYMBOL res 912 224 R0
SYMATTR InstName Rload1
SYMATTR Value 5
SYMBOL res 624 224 R0
SYMATTR InstName R2
SYMATTR Value 604K
FLAG 16 144 0
FLAG 352 400 0
FLAG 832 336 0
FLAG 928 336 0
FLAG 16 32 IN
FLAG 928 224 OUT1
FLAG 640 448 0
FLAG -128 336 0
FLAG -272 336 0
FLAG -272 224 OUT2
FLAG 48 448 0
TEXT 272 440 Left 2 !.tran 1m startup