Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\2d624d700231_astable.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 c1 {Rc}
R2 N001 out {Rc}
R3 N001 b1 {Rr}
R4 N001 b2 {Rr}
C1 b1 c1 {Cr}
C2 out b2 {Cr}
V1 N001 0 {Vcc}
Q1 out b1 0 0 TBJ
Q2 c1 b2 0 0 TBJ
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1 startup
.meas tran Tf1 find time when V(out)=Vcc/2 fall 3
.meas tran Tr1 find time when V(out)=Vcc/2 rise 3
.meas tran Tf2 find time when V(out)=Vcc/2 fall 4
.meas tran Tr2 find time when V(out)=Vcc/2 rise 4
.meas tran th param Tf1-Tr1
.meas tran tl param Tr2-Tf1
.meas tran fosc param 1/(Tf2-Tf1)
.param Vcc=25 Rc=2k Rr=100k Cr=0.05u
.model TBJ NPN(BF=150 TF=400E-10 TR=400E-10)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1652 1248
WIRE -560 768 -720 768
WIRE -400 768 -560 768
WIRE -240 768 -400 768
WIRE -96 768 -240 768
WIRE -560 784 -560 768
WIRE -400 784 -400 768
WIRE -240 784 -240 768
WIRE -96 784 -96 768
WIRE -720 800 -720 768
WIRE -96 880 -96 864
WIRE -720 912 -720 880
WIRE -560 928 -560 864
WIRE -528 928 -560 928
WIRE -400 928 -400 864
WIRE -400 928 -464 928
WIRE -240 928 -240 864
WIRE -208 928 -240 928
WIRE -96 928 -96 880
WIRE -96 928 -144 928
WIRE -560 976 -560 928
WIRE -96 976 -96 928
WIRE -464 1024 -496 1024
WIRE -368 1024 -240 928
WIRE -368 1024 -464 1024
WIRE -240 1024 -400 928
WIRE -224 1024 -240 1024
WIRE -160 1024 -224 1024
WIRE -560 1088 -560 1072
WIRE -96 1088 -96 1072
FLAG -96 1088 0
FLAG -560 1088 0
FLAG -720 912 0
FLAG -96 880 out
FLAG -224 1024 b1
FLAG -464 1024 b2
FLAG -560 928 c1
SYMBOL RES -576 768 R0
SYMATTR InstName R1
SYMATTR Value {Rc}
SYMBOL res -112 768 R0
SYMATTR InstName R2
SYMATTR Value {Rc}
SYMBOL res -416 768 R0
SYMATTR InstName R3
SYMATTR Value {Rr}
SYMBOL res -256 768 R0
SYMATTR InstName R4
SYMATTR Value {Rr}
SYMBOL cap -464 912 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {Cr}
SYMBOL cap -144 912 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {Cr}
SYMBOL VOLTAGE -720 784 R0
SYMATTR InstName V1
SYMATTR Value {Vcc}
SYMBOL NPN -160 976 R0
SYMATTR InstName Q1
SYMATTR Value TBJ
SYMBOL npn -496 976 M0
SYMATTR InstName Q2
SYMATTR Value TBJ
TEXT -200 1136 Left 2 !.tran 1 startup
TEXT 136 912 Left 2 !.meas tran Tf1 find time when V(out)=Vcc/2 fall 3\n.meas tran Tr1 find time when V(out)=Vcc/2 rise 3\n.meas tran Tf2 find time when V(out)=Vcc/2 fall 4\n.meas tran Tr2 find time when V(out)=Vcc/2 rise 4\n.meas tran th param Tf1-Tr1\n.meas tran tl param Tr2-Tf1\n.meas tran fosc param 1/(Tf2-Tf1)
TEXT -672 1232 Left 2 !.param Vcc=25 Rc=2k Rr=100k Cr=0.05u
TEXT -664 1192 Left 2 !.model TBJ NPN(BF=150 TF=400E-10 TR=400E-10)
* Z:\home\khalils\Downloads\files\data\raw_asc\4c875514045b_3_2_g.asc
* Generated by LTspice 26.0.1 for Windows.
Vin N002 0 {Vin}
Ri N002 0 100k
RG VGS N002 1k
RD N001 Vo 200
VDD N001 0 5
M1 Vo VGS 0 0 IRFML8244
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.step param Vin list 2.19 2.23 2.255
.dc VDD 0 5 .05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 -64 96 -64
WIRE 384 -32 384 -64
WIRE 384 64 384 48
WIRE 464 64 384 64
WIRE 384 80 384 64
WIRE 16 160 16 -64
WIRE 144 160 96 160
WIRE 192 160 144 160
WIRE 304 160 304 112
WIRE 304 160 272 160
WIRE 336 160 304 160
WIRE 144 192 144 160
WIRE 16 272 16 160
WIRE 144 272 16 272
WIRE 272 272 144 272
WIRE 384 272 384 176
WIRE 384 272 272 272
FLAG 272 272 0
FLAG 464 64 Vo
FLAG 304 112 VGS
SYMBOL voltage 112 160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Vin
SYMATTR Value {Vin}
SYMBOL res 128 176 R0
SYMATTR InstName Ri
SYMATTR Value 100k
SYMBOL res 288 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RG
SYMATTR Value 1k
SYMBOL res 368 -48 R0
SYMATTR InstName RD
SYMATTR Value 200
SYMBOL voltage 112 -64 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL nmos 336 80 R0
SYMATTR InstName M1
SYMATTR Value IRFML8244
TEXT 16 304 Left 2 !.step param Vin list 2.19 2.23 2.255
TEXT 40 336 Left 2 !.dc VDD 0 5 .05
* Z:\home\khalils\Downloads\files\data\raw_asc\03ae56b6cd80_COMB03op.asc
* Generated by LTspice 26.0.1 for Windows.
RC cc N001 {RC}
R2 b2 b1 {R2}
R1 cc b2 {R1}
Q2 N001 b2 N002 0 TBJ2
R3 b1 0 {R3}
RE N003 0 {RE}
Vcc cc 0 {Vcc}
Q1 N002 b1 N003 0 TBJ1
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.param Vcc=30 R1=33k R2=18k R3=15k RC=680 RE=330
.model TBJ1 NPN(IS=10F BF=350)
.model TBJ2 NPN(IS=10F BF=350)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1608 1076
WIRE 880 -144 736 -144
WIRE 1024 -144 880 -144
WIRE 1184 -144 1024 -144
WIRE 736 -64 736 -144
WIRE 880 -64 880 -144
WIRE 1184 -64 1184 -144
WIRE 736 64 736 16
WIRE 1184 64 1184 16
WIRE 880 112 880 16
WIRE 976 112 880 112
WIRE 1120 112 976 112
WIRE 880 128 880 112
WIRE 1184 208 1184 160
WIRE 880 256 880 208
WIRE 976 256 880 256
WIRE 1120 256 976 256
WIRE 880 336 880 256
WIRE 1184 368 1184 304
WIRE 880 480 880 416
WIRE 1184 480 1184 448
WIRE 1184 480 880 480
WIRE 1184 496 1184 480
SYMBOL npn 1120 208 R0
SYMATTR InstName Q1
SYMATTR Value TBJ1
SYMBOL res 1168 -80 R0
SYMATTR InstName RC
SYMATTR Value {RC}
SYMBOL res 864 112 R0
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL npn 1120 64 R0
SYMATTR InstName Q2
SYMATTR Value TBJ2
SYMBOL res 1168 352 R0
SYMATTR InstName RE
SYMATTR Value {RE}
SYMBOL res 864 320 R0
SYMATTR InstName R3
SYMATTR Value {R3}
SYMBOL res 864 -80 R0
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL voltage 736 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -101 48 Left 2
WINDOW 3 -114 79 Left 2
SYMATTR InstName Vcc
SYMATTR Value {Vcc}
FLAG 1184 496 0
FLAG 736 64 0
FLAG 1024 -144 cc
FLAG 976 256 b1
FLAG 976 112 b2
TEXT 640 48 Left 2 !.op
TEXT 592 632 Left 2 !.param Vcc=30 R1=33k R2=18k R3=15k RC=680 RE=330
TEXT 584 680 Left 2 !.model TBJ1 NPN(IS=10F BF=350)
TEXT 584 712 Left 2 !.model TBJ2 NPN(IS=10F BF=350)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG2436.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:\nSwitch shown for a logic 0 input\nParameter performance at 15V supply\nCharge injection is not included\nPin capacitance is not included\nOff isolation and Crosstalk specified at 100KHz only
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG2436.asy)
R1 vD 0 301
XU1 vIN vSA vD 0 V+ 0 V- vEN ADG2436 ;pnba IN)SA)D)SB)Vdd)GND)Vss)EN
V3 vEN 0 5
V1 vSA 0 3
C1 vD 0 36p
V2 vIN 0 PULSE(0 3.3 0 20n 20n 10u 20u)
V4 V+ 0 15
V5 V- 0 -15
.tran 100u
.lib ADG2436.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1584 -368 -1600 -368
WIRE -1600 -336 -1600 -368
WIRE -1728 -272 -1904 -272
WIRE -1696 -272 -1728 -272
WIRE -1904 -256 -1904 -272
WIRE -1456 -240 -1504 -240
WIRE -1408 -240 -1456 -240
WIRE -1312 -240 -1408 -240
WIRE -2160 -224 -2176 -224
WIRE -2032 -224 -2048 -224
WIRE -1408 -224 -1408 -240
WIRE -1312 -224 -1312 -240
WIRE -2176 -208 -2176 -224
WIRE -2048 -208 -2048 -224
WIRE -1696 -208 -1712 -208
WIRE -1904 -160 -1904 -176
WIRE -1728 -144 -1824 -144
WIRE -1696 -144 -1728 -144
WIRE -1456 -144 -1504 -144
WIRE -1408 -128 -1408 -144
WIRE -1312 -128 -1312 -160
WIRE -1824 -80 -1824 -144
WIRE -1456 -80 -1456 -144
WIRE -1552 -16 -1552 -32
WIRE -1648 0 -1648 -32
WIRE -1632 0 -1648 0
WIRE -1456 16 -1456 0
WIRE -1824 32 -1824 0
SYMBOL voltage -1824 -96 R0
WINDOW 3 -13 166 Left 2
SYMATTR Value PULSE(0 3.3 0 20n 20n 10u 20u)
SYMATTR InstName V2
SYMBOL cap -1328 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL ADG2436 -1600 -192 R0
SYMATTR InstName U1
SYMBOL voltage -1456 -96 R0
WINDOW 3 37 72 Left 2
SYMATTR Value 5
SYMATTR InstName V3
SYMBOL voltage -2176 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 15
SYMBOL voltage -2048 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value -15
SYMBOL voltage -1904 -272 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res -1424 -240 R0
SYMATTR InstName R1
SYMATTR Value 301
FLAG -1904 -160 0
FLAG -1824 32 0
FLAG -1584 -368 V+
FLAG -1408 -128 0
FLAG -1552 -16 0
FLAG -1312 -128 0
FLAG -2176 -128 0
FLAG -2176 -224 V+
FLAG -1728 -272 vSA
FLAG -1728 -144 vIN
FLAG -1456 -240 vD
FLAG -2048 -128 0
FLAG -2048 -224 V-
FLAG -1632 0 V-
FLAG -1456 16 0
FLAG -1456 -144 vEN
FLAG -1712 -208 0
TEXT -1360 -40 Left 2 !.tran 100u
TEXT -2056 -584 Left 2 ;Notes:\nSwitch shown for a logic 0 input\nParameter performance at 15V supply\nCharge injection is not included\nPin capacitance is not included\nOff isolation and Crosstalk specified at 100KHz only
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX42408A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX42408A.asy)
C4 vOUT N004 220p
L1 N002 vOUT 2.2 Rser=4.3m
Rload vOUT 0 0.42
C2 N001 N002 0.1
C3 vOUT 0 100 m=4 Rser=5m
R1 PGOOD N003 20k
C1 N003 0 2.2
V1 vIN 0 12
R3 N004 0 15.8k
R2 vOUT N004 49.9k
XU1 0 0 vIN vIN N002 N001 N003 NC_01 N004 PGOOD N003 NC_02 vOUT MAX42408A ;pnba GND)PGND)EN)SUP)LX)BST)BIAS)SYNCOUT)FB)PGOOD)SYNC)VEA)OUT
.tran 3m startup
.lib MAX42408A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1272 680
WIRE 80 -144 64 -144
WIRE 144 -144 80 -144
WIRE 176 -144 144 -144
WIRE 512 -144 464 -144
WIRE 64 -128 64 -144
WIRE 512 -128 512 -144
WIRE 144 -96 144 -144
WIRE 176 -96 144 -96
WIRE 64 -32 64 -48
WIRE 512 -32 512 -64
WIRE 512 -32 464 -32
WIRE 592 -32 512 -32
WIRE 720 -32 672 -32
WIRE 848 -32 720 -32
WIRE 960 -32 848 -32
WIRE 1024 -32 960 -32
WIRE 1056 -32 1024 -32
WIRE 720 -16 720 -32
WIRE 1056 -16 1056 -32
WIRE 848 0 848 -32
WIRE 960 0 960 -32
WIRE 176 16 144 16
WIRE 656 32 720 -32
WIRE 656 32 464 32
WIRE 720 64 720 48
WIRE 1056 80 1056 64
WIRE 848 96 848 80
WIRE 848 96 464 96
WIRE 960 96 960 64
WIRE 960 96 848 96
WIRE 848 128 848 96
WIRE 480 224 464 224
WIRE 848 224 848 208
WIRE 144 272 144 16
WIRE 144 272 64 272
WIRE 176 272 144 272
WIRE 64 288 64 272
WIRE 512 288 464 288
WIRE 608 288 512 288
WIRE 320 352 320 336
WIRE 64 368 64 352
WIRE 144 400 144 272
WIRE 496 400 144 400
WIRE 608 400 608 288
WIRE 608 400 576 400
SYMBOL cap 48 288 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL res 1040 -32 R0
SYMATTR InstName Rload
SYMATTR Value 0.42
SYMBOL ind 576 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=4.3m
SYMBOL cap 944 0 R0
SYMATTR InstName C4
SYMATTR Value 220p
SYMBOL res 832 112 R0
SYMATTR InstName R3
SYMATTR Value 15.8k
SYMBOL MAX42408A 320 96 R0
SYMATTR InstName U1
SYMBOL voltage 64 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 592 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20k
SYMBOL cap 704 -16 R0
WINDOW 3 43 38 Left 2
WINDOW 123 48 63 Left 2
SYMATTR InstName C3
SYMATTR Value 100
SYMATTR SpiceLine Rser=5m
SYMATTR Value2 m=4
SYMBOL res 832 -16 R0
SYMATTR InstName R2
SYMATTR Value 49.9k
SYMBOL cap 496 -128 R0
SYMATTR InstName C2
SYMATTR Value 0.1
FLAG 64 -32 0
FLAG 64 368 0
FLAG 320 352 0
FLAG 720 64 0
FLAG 1056 80 0
FLAG 80 -144 vIN
FLAG 1024 -32 vOUT
FLAG 480 224 0
FLAG 848 224 0
FLAG 512 288 PGOOD
TEXT 648 376 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\e446f128437f_simple_osc.asc
* Generated by LTspice 26.0.1 for Windows.
A1 N001 0 0 0 0 N002 0 0 SCHMITT Vhigh=3, Vt=1.35, Vh=0.3, trise=20n, tfall=20n
R1 N002 N001 4.7k
C1 N001 0 200p
.tran 0 10us 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 904 756
WIRE 64 224 16 224
WIRE 112 224 64 224
WIRE 208 224 176 224
WIRE 272 224 208 224
WIRE 16 240 16 224
WIRE 64 288 64 224
WIRE 96 288 64 288
WIRE 208 288 208 224
WIRE 208 288 176 288
WIRE 16 336 16 304
SYMBOL cap 0 240 R0
SYMATTR InstName C1
SYMATTR Value 200p
SYMBOL res 192 272 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL Digital\\schmtinv 112 160 R0
WINDOW 3 -71 111 Invisible 0
SYMATTR InstName A1
SYMATTR Value Vhigh=3, Vt=1.35, Vh=0.3, trise=20n, tfall=20n
FLAG 16 336 0
TEXT 330 480 Left 0 !.tran 0 10us 0
* Z:\home\khalils\Downloads\files\data\raw_asc\05c937015e6b_cmos-voltage-dependent-resistor.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 1
R2 N001 N003 10k
E1 NC_01 NC_02 NC_03 NC_04 E
R1 N001 N002 100Meg
M2 N003 N001 N002 N002 2N7002
M1 N002 N001 0 0 2N7002
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc v1 0 3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 -64 -160 -64
WIRE 128 -64 32 -64
WIRE 272 -64 128 -64
WIRE 352 -64 272 -64
WIRE 128 -32 128 -64
WIRE 352 -32 352 -64
WIRE 128 80 128 48
WIRE 240 80 128 80
WIRE 128 112 128 80
WIRE 352 112 352 48
WIRE -160 160 -160 -64
WIRE 32 192 32 -64
WIRE 80 192 32 192
WIRE 272 192 272 -64
WIRE 304 192 272 192
WIRE 240 240 240 80
WIRE 352 240 352 208
WIRE 352 240 240 240
WIRE -160 272 -160 240
WIRE 128 272 128 208
SYMBOL voltage -160 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL nmos 304 112 R0
SYMATTR InstName M2
SYMATTR Value 2N7002
SYMBOL res 336 -48 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 112 -48 R0
SYMATTR InstName R1
SYMATTR Value 100Meg
SYMBOL e 640 64 R0
SYMATTR InstName E1
SYMBOL nmos 80 112 R0
SYMATTR InstName M1
SYMATTR Value 2N7002
FLAG -160 272 0
FLAG 128 272 0
TEXT 560 -136 Left 2 !.dc v1 0 3
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1071.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1071.asy)
D1 N001 OUT MBRS360
R1 OUT N002 10.7K
Rload OUT 0 24
L1 IN N001 150 Rser=0.02 Rpar=5000
R3 N003 N004 1K
V1 IN 0 5
C1 OUT 0 500 Rser=15m
XU1 N003 N002 0 N001 IN LT1071 ;pnba Vc)FB)GND)SW)Vin
R2 N002 0 1.24K
C2 N004 0 1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 20m startup
.lib LT1071.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1480
WIRE 1824 880 1584 880
WIRE 1872 880 1824 880
WIRE 1984 880 1952 880
WIRE 2048 880 1984 880
WIRE 2160 880 2112 880
WIRE 2288 880 2160 880
WIRE 2400 880 2288 880
WIRE 1584 896 1584 880
WIRE 2288 896 2288 880
WIRE 2400 896 2400 880
WIRE 1824 944 1824 880
WIRE 2160 960 2160 880
WIRE 1584 992 1584 976
WIRE 2288 992 2288 960
WIRE 2400 992 2400 976
WIRE 1984 1024 1984 880
WIRE 1984 1024 1952 1024
WIRE 2160 1088 2160 1040
WIRE 2160 1088 1952 1088
WIRE 2160 1104 2160 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2160 1200 2160 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
SYMBOL RES 2144 1088 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL IND 1856 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL res 2384 880 R0
SYMATTR InstName Rload
SYMATTR Value 24
SYMBOL POWERPRODUCTS\\LT1071 1824 1088 R0
SYMATTR InstName U1
SYMBOL RES 2144 944 R0
SYMATTR InstName R1
SYMATTR Value 10.7K
SYMBOL VOLTAGE 1584 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL polcap 2272 896 R0
SYMATTR InstName C1
SYMATTR Value 500
SYMATTR SpiceLine Rser=15m
SYMBOL schottky 2048 896 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
FLAG 2400 880 OUT
FLAG 2160 1200 0
FLAG 2288 992 0
FLAG 2400 992 0
FLAG 2064 1248 0
FLAG 1824 1248 0
FLAG 1584 992 0
FLAG 1584 880 IN
TEXT 2104 1312 Left 2 !.tran 20m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\11676a6c03a7_TriangularSawtoothWaveforms.asc
* Generated by LTspice 26.0.1 for Windows.
V4 SAWTOOTH 0 PULSE(0 1 0 1 0 0 1)
V6 SAWTOOTH_PWL 0 PWL REPEAT FOREVER (0 0 1 1 +1n 0) ENDREPEAT
V5 TRIANGULAR_PWL 0 PWL REPEAT FOREVER (0 0 .5 1 1 0) ENDREPEAT
V3 TRIANGULAR 0 PULSE(0 1 0 .5 .5 0 1)
V2 SQUARE 0 PULSE(0 1 .25 1n 1n .5 1)
V1 SINE 0 SINE(.5 .5 1 0 0 -90)
.tran 5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1748 680
WIRE 16 -608 0 -608
WIRE 112 -608 96 -608
WIRE 16 -464 0 -464
WIRE 112 -464 96 -464
WIRE 16 -320 0 -320
WIRE 112 -320 96 -320
WIRE 16 -176 0 -176
WIRE 112 -176 96 -176
WIRE 16 -32 0 -32
WIRE 112 -32 96 -32
WIRE 16 112 0 112
WIRE 112 112 96 112
SYMBOL voltage 112 -320 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 0 .5 .5 0 1)
SYMBOL voltage 112 112 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V6
SYMATTR Value PWL REPEAT FOREVER (0 0 1 1 +1n 0) ENDREPEAT
SYMBOL voltage 112 -176 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 1 0 1 0 0 1)
SYMBOL voltage 112 -32 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V5
SYMATTR Value PWL REPEAT FOREVER (0 0 .5 1 1 0) ENDREPEAT
SYMBOL voltage 112 -608 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value SINE(.5 .5 1 0 0 -90)
SYMBOL voltage 112 -464 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 .25 1n 1n .5 1)
FLAG 0 -320 0
FLAG 112 -320 TRIANGULAR
FLAG 0 -464 0
FLAG 112 -464 SQUARE
FLAG 0 -176 0
FLAG 112 -176 SAWTOOTH
FLAG 0 -608 0
FLAG 112 -608 SINE
FLAG 0 -32 0
FLAG 112 -32 TRIANGULAR_PWL
FLAG 0 112 0
FLAG 112 112 SAWTOOTH_PWL
TEXT 328 216 Right 2 !.tran 5
* Z:\home\khalils\Downloads\files\data\raw_asc\4e1394e9955e_bss83.asc
* Generated by LTspice 26.0.1 for Windows.
* GAMMA added
* Enhanced model of the BSS83 from Philips\n \nSweep of Vgs from 0 to 5V at Vsb=-8, -4, 0V\n.dc V1 0 5 .1 V2 -8 0 4\nPlot Id(M1) to see how Vsb changes the behaviour.\n \nI added GAMMA=0.2 to the model to get the correct Ids(Vgs, Vsb).\nThe simulated drain current is independent of Vsb if GAMMA is \nomitted. This was clearly a missing parameter in the original model.\n \nThe complete ".model"-statement can be also put into a file \nlike BSS83.mod and added with a SPICEdirective.\n.include BSS83.mod
* * Philips model\n.MODEL BSS83 NMOS\n+ LEVEL=3\n+ W=1E-3\n+ L=1E-6\n+ VTO=2\n+ VMAX=1E6\n+ RS=3\n+ RD=3\n+ CJ=0.001396\n+ MJ=0.3936\n+ THETA=1E-6\n+ ETA=0.009307\n+ KAPPA=2.226
+ LEVEL=3
+ W=1E-3
+ L=1E-6
+ VTO=2
+ VMAX=1E6
+ RS=3
+ RD=3
+ CJ=0.001396
+ MJ=0.3936
+ THETA=1E-6
+ ETA=0.009307
+ KAPPA=2.226
+ GAMMA=0.2
V1 N003 0 2
M1 N001 N003 0 N002 BSS83
V2 N002 0 0
V3 N001 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.MODEL BSS83 NMOS
.dc V1 0 5 .1 V2 -8 0 4
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1088 680
WIRE 32 256 32 224
WIRE 32 384 32 336
WIRE 128 224 32 224
WIRE 176 144 176 -32
WIRE 176 384 176 240
WIRE 288 -32 176 -32
WIRE 288 0 288 -32
WIRE 288 112 288 80
WIRE 288 192 176 192
WIRE 288 224 288 192
WIRE 288 384 288 304
SYMBOL nmos4 128 144 R0
SYMATTR InstName M1
SYMATTR Value BSS83
SYMBOL voltage 288 -16 R0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage 32 240 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL voltage 288 208 R0
SYMATTR InstName V2
SYMATTR Value 0
FLAG 288 112 0
FLAG 288 384 0
FLAG 32 384 0
FLAG 176 384 0
TEXT 448 0 Left 0 !* GAMMA added\n.MODEL BSS83 NMOS\n+ LEVEL=3\n+ W=1E-3\n+ L=1E-6\n+ VTO=2\n+ VMAX=1E6\n+ RS=3\n+ RD=3\n+ CJ=0.001396\n+ MJ=0.3936\n+ THETA=1E-6\n+ ETA=0.009307\n+ KAPPA=2.226\n+ GAMMA=0.2
TEXT 32 -112 Left 0 !.dc V1 0 5  .1 V2 -8 0 4
TEXT 32 -72 Left 0 !.op
TEXT 32 -496 Left 0 ;Enhanced model of the BSS83 from Philips\n \nSweep of Vgs from 0 to 5V at Vsb=-8, -4, 0V\n.dc V1 0 5  .1 V2 -8 0 4\nPlot Id(M1) to see how Vsb changes the behaviour.\n \nI added GAMMA=0.2 to the model to get the correct Ids(Vgs, Vsb).\nThe simulated drain current is independent of Vsb if GAMMA is \nomitted. This was clearly a missing parameter in the original model.\n \nThe complete ".model"-statement can be also put into a file \nlike BSS83.mod and added with a SPICEdirective.\n.include BSS83.mod
TEXT 720 0 Left 0 ;* Philips model\n.MODEL BSS83 NMOS\n+ LEVEL=3\n+ W=1E-3\n+ L=1E-6\n+ VTO=2\n+ VMAX=1E6\n+ RS=3\n+ RD=3\n+ CJ=0.001396\n+ MJ=0.3936\n+ THETA=1E-6\n+ ETA=0.009307\n+ KAPPA=2.226
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1964-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1964-5.asy)
V1 IN 0 PWL(0 0 1 -10)
C1 OUT 0 1
XU1 0 IN N001 IN OUT LT1964-5 ;pnba GND)IN)BYP)_SHDN)OUT
Rload OUT 0 1K
.tran 1
.lib LT1964.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 48 -208 48
WIRE 32 48 16 48
WIRE 400 48 320 48
WIRE 496 48 400 48
WIRE -208 64 -208 48
WIRE 400 64 400 48
WIRE 496 64 496 48
WIRE 16 144 16 48
WIRE 32 144 16 144
WIRE 336 144 320 144
WIRE -208 160 -208 144
WIRE 400 160 400 128
WIRE 496 160 496 144
WIRE 176 240 176 208
SYMBOL res 480 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL PowerProducts\\LT1964-5 176 96 R0
SYMATTR InstName U1
SYMBOL cap 384 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 -10)
FLAG -208 160 0
FLAG 400 160 0
FLAG 496 160 0
FLAG 176 240 0
FLAG 496 48 OUT
FLAG -208 48 IN
TEXT 384 216 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\1d6bc1586d24_10_1_opamp_curr.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Vsh+ 0 PULSE(0 100 0.5u 10n 10n 5u 10u 10)
Rshunt Vsh+ Vsh- 10m
Rload Vsh- 0 5
XU1 N001 N002 Vout opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R1 N001 Vsh- 10k
R2 N002 Vsh+ 10k
R3 0 N002 30k
R4 N001 Vout 30k
R5 Vout 0 1Meg
C1 Vout 0 15p
.lib opamp.sub
.tran 0 50u 0 0.1n uic
* Gain = 3
* Change load current with Rload
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1196 680
WIRE 48 -48 -48 -48
WIRE 176 -48 48 -48
WIRE 688 -48 656 -48
WIRE 816 -48 768 -48
WIRE 48 0 48 -48
WIRE 496 48 448 48
WIRE 656 48 656 -48
WIRE 656 48 576 48
WIRE 688 48 656 48
WIRE 816 64 816 -48
WIRE 816 64 752 64
WIRE 864 64 816 64
WIRE 976 64 864 64
WIRE 1056 64 976 64
WIRE 688 80 672 80
WIRE -48 112 -48 -48
WIRE 48 144 48 80
WIRE 176 144 48 144
WIRE 864 144 864 64
WIRE 976 144 976 64
WIRE 496 160 448 160
WIRE 672 160 672 80
WIRE 672 160 576 160
WIRE 48 192 48 144
WIRE 672 192 672 160
WIRE -48 304 -48 192
WIRE 48 304 48 272
WIRE 48 304 -48 304
WIRE 48 336 48 304
FLAG 48 336 0
FLAG 176 -48 Vsh+
FLAG 176 144 Vsh-
FLAG 448 160 Vsh+
FLAG 448 48 Vsh-
FLAG 672 272 0
FLAG 864 224 0
FLAG 976 208 0
FLAG 1056 64 Vout
SYMBOL voltage -48 96 R0
WINDOW 3 -60 -156 VRight 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 100 0.5u 10n 10n 5u 10u 10)
SYMATTR InstName V1
SYMBOL res 32 -16 R0
SYMATTR InstName Rshunt
SYMATTR Value 10m
SYMBOL res 32 176 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL OpAmps\\opamp 720 0 R0
SYMATTR InstName U1
SYMBOL res 592 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 592 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 688 288 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 30k
SYMBOL res 672 -32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 30k
SYMBOL res 848 128 R0
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL cap 960 144 R0
SYMATTR InstName C1
SYMATTR Value 15p
TEXT -56 -120 Left 2 !.lib opamp.sub
TEXT -56 -160 Left 2 !.tran 0 50u 0 0.1n uic
TEXT 864 0 Left 2 ;Gain = 3
TEXT 96 296 Left 2 ;Change load current with Rload