* Z:\home\khalils\Downloads\files\data\raw_asc\5ed8309ab7c8_13-linear_vs_switching.asc
* Generated by LTspice 26.0.1 for Windows.
* What is the power loss for each transistor?
* 50% duty cycle, 10KHz
* Linear
* = 50 V
* = 1002 W
* #1
* #2
* = 502 W
* = 500 W
* Reference:\n06 LTSpice for Linear VS Switched operation\nhttps://youtu.be/IeM5Wy9D3DI?si=_g51h_wMS8-USEC3
* = 50%
* = 51 V
* = 1023 W
* = 997 W
* = 26 W
* = 97%
R2 N002 vpulse 50
VL vlinear 0 2.33
RL2 vin vs2 5
RL1 vin vs1 5
Q2 vs2 N002 0 0 ZTX1048A
R1 N001 vlinear 50
VSW vpulse 0 PULSE(0 10 0 1n 1n 5u 10u)
Q1 vs1 N001 0 0 ZTX1048A
V1 vin 0 100
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 30m 25m
.meas V_RL1_avg AVG V(vin,vs1)
.meas Pin_1_avg AVG(V(vin)*I(RL1))
.meas Pout_1_avg AVG(V(vin,vs1)*I(RL1))
.meas Ploss_1_avg AVG(V(vs1)*Ic(Q1)+V(vlinear)*Ib(Q1))
.meas Eff_linear PARAM 100*Pout_1_avg/Pin_1_avg
.meas V_RL2_avg AVG V(vin,vs2)
.meas Pin_2_avg AVG(V(vin)*I(RL2))
.meas Pout_2_avg AVG(V(vin,vs2)*I(RL2))
.meas Ploss_2_avg AVG(V(vs2)*Ic(Q2)+V(vpulse)*Ib(Q2))
.meas Eff_switching PARAM 100*Pout_2_avg/Pin_2_avg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1460 872
WIRE 0 32 -48 32
WIRE 144 32 0 32
WIRE 1056 32 144 32
WIRE -48 64 -48 32
WIRE 144 64 144 32
WIRE 1056 64 1056 32
WIRE 144 176 144 144
WIRE 176 176 144 176
WIRE 1056 176 1056 144
WIRE 1104 176 1056 176
WIRE -48 192 -48 144
WIRE 144 240 144 176
WIRE 1056 240 1056 176
WIRE -64 288 -80 288
WIRE -32 288 -64 288
WIRE 80 288 48 288
WIRE 848 288 832 288
WIRE 880 288 848 288
WIRE 992 288 960 288
WIRE -80 320 -80 288
WIRE 832 320 832 288
WIRE -80 432 -80 400
WIRE 144 432 144 336
WIRE 832 432 832 400
WIRE 1056 432 1056 336
SYMBOL res 64 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL voltage 832 304 R0
WINDOW 0 39 71 Left 2
WINDOW 3 -68 170 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VSW
SYMATTR Value PULSE(0 10 0 1n 1n 5u 10u)
SYMBOL npn 80 240 R0
SYMATTR InstName Q1
SYMATTR Value ZTX1048A
SYMBOL npn 992 240 R0
SYMATTR InstName Q2
SYMATTR Value ZTX1048A
SYMBOL res 128 48 R0
SYMATTR InstName RL1
SYMATTR Value 5
SYMBOL res 1040 48 R0
SYMATTR InstName RL2
SYMATTR Value 5
SYMBOL voltage -48 48 R0
WINDOW 0 38 60 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 100
SYMBOL voltage -80 304 R0
WINDOW 0 39 71 Left 2
WINDOW 3 39 99 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VL
SYMATTR Value 2.33
SYMBOL res 976 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50
FLAG -48 192 0
FLAG 0 32 vin
FLAG 144 432 0
FLAG -80 432 0
FLAG 1056 432 0
FLAG 832 432 0
FLAG 848 288 vpulse
FLAG 176 176 vs1
FLAG 1104 176 vs2
FLAG -64 288 vlinear
TEXT -56 -56 Left 2 !.tran 0 30m 25m
TEXT -64 -200 Left 4 ;What is the power loss for each transistor?
TEXT 776 504 Left 2 ;50% duty cycle, 10KHz
TEXT -80 504 Left 2 ;Linear
TEXT -72 560 Left 2 !.meas V_RL1_avg AVG V(vin,vs1)
TEXT -16 592 Left 2 ;= 50 V
TEXT -72 624 Left 2 !.meas Pin_1_avg AVG(V(vin)*I(RL1))
TEXT -16 656 Left 2 ;= 1002 W
TEXT -72 688 Left 2 !.meas Pout_1_avg AVG(V(vin,vs1)*I(RL1))
TEXT 128 -8 Left 4 ;#1
TEXT 1024 -8 Left 4 ;#2
TEXT -16 720 Left 2 ;= 502 W
TEXT -72 752 Left 2 !.meas Ploss_1_avg AVG(V(vs1)*Ic(Q1)+V(vlinear)*Ib(Q1))
TEXT -16 784 Left 2 ;= 500 W
TEXT -72 816 Left 2 !.meas Eff_linear PARAM 100*Pout_1_avg/Pin_1_avg
TEXT -56 -160 Left 2 ;Reference:\n06 LTSpice for Linear VS Switched operation\nhttps://youtu.be/IeM5Wy9D3DI?si=_g51h_wMS8-USEC3
TEXT -16 848 Left 2 ;= 50%
TEXT 768 568 Left 2 !.meas V_RL2_avg AVG V(vin,vs2)
TEXT 824 600 Left 2 ;= 51 V
TEXT 768 632 Left 2 !.meas Pin_2_avg AVG(V(vin)*I(RL2))
TEXT 824 664 Left 2 ;= 1023 W
TEXT 768 696 Left 2 !.meas Pout_2_avg AVG(V(vin,vs2)*I(RL2))
TEXT 824 728 Left 2 ;= 997 W
TEXT 768 760 Left 2 !.meas Ploss_2_avg AVG(V(vs2)*Ic(Q2)+V(vpulse)*Ib(Q2))
TEXT 824 792 Left 2 ;= 26 W
TEXT 768 824 Left 2 !.meas Eff_switching PARAM 100*Pout_2_avg/Pin_2_avg
TEXT 824 856 Left 2 ;= 97%