* Z:\home\khalils\Downloads\files\data\raw_asc\21d9842ebcfd_Wassersonde_final.asc
* Generated by LTspice 26.0.1 for Windows.
* simulation of full boiler
* cut open here to simulate empty boiler
* simulation of schmitt trigger
* output to ADC or schmitt trigger
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8541.asy)
R3 N004 N007 47k
XU1 N009 N006 N002 0 N008 AD8541 ;pnba In+)In-)V+)V-)OUT
V2 N006 0 PULSE(0 5 0 1m 1m 1m 2m)
V3 N002 0 5
V1 N001 0 PULSE(0 5 0 0 0 0.5m 1m)
D1 N003 N001 D
R6 N002 N009 22k
R4 N005 N010 47k
C3 N011 0 166n
D2 N003 N004 D
R8 N008 N009 100k
R7 N009 0 10k
R1 N001 N003 1Meg
R2 N004 0 4.7Meg
C1 N007 0 22n
R5 N010 N011 3.956k
C2 N003 N005 100n
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 200m 0
.lib AD8541.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1988 788
WIRE 256 -32 64 -32
WIRE 384 -32 256 -32
WIRE 256 16 256 -32
WIRE 384 32 384 -32
WIRE 1536 48 1296 48
WIRE 1632 48 1536 48
WIRE 1536 112 1536 48
WIRE 64 128 64 -32
WIRE 256 128 256 96
WIRE 352 128 256 128
WIRE 384 128 384 96
WIRE 384 128 352 128
WIRE 480 128 384 128
WIRE 672 128 544 128
WIRE 816 128 672 128
WIRE 672 192 672 128
WIRE 816 192 816 128
WIRE 352 208 352 128
WIRE 64 272 64 208
WIRE 1632 288 1632 48
WIRE 352 304 352 272
WIRE 1600 304 1408 304
WIRE 816 320 816 272
WIRE 1008 320 816 320
WIRE 1840 320 1664 320
WIRE 1984 320 1840 320
WIRE 1536 336 1536 192
WIRE 1600 336 1536 336
WIRE 816 352 816 320
WIRE 672 448 672 272
WIRE 768 448 672 448
WIRE 816 448 816 416
WIRE 816 448 768 448
WIRE 352 464 352 384
WIRE 1536 464 1536 336
WIRE 1616 464 1536 464
WIRE 1840 464 1840 320
WIRE 1840 464 1696 464
WIRE 768 512 768 448
WIRE 1296 528 1296 48
WIRE 1408 528 1408 304
WIRE 1536 560 1536 464
WIRE 352 608 352 544
WIRE 1296 672 1296 608
WIRE 1408 672 1408 608
WIRE 1408 672 1296 672
WIRE 1536 672 1536 640
WIRE 1536 672 1408 672
WIRE 1632 672 1632 352
WIRE 1632 672 1536 672
WIRE 1536 704 1536 672
WIRE 352 768 352 672
SYMBOL res 1520 544 R0
SYMATTR InstName R7
SYMATTR Value 10k
SYMBOL res 240 0 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL diode 480 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL res 336 448 R0
SYMATTR InstName R5
SYMATTR Value 3.956k
SYMBOL cap 800 352 R0
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL res 336 288 R0
SYMATTR InstName R4
SYMATTR Value 47k
SYMBOL OpAmps\\AD8541 1632 256 R0
SYMATTR InstName U1
SYMBOL res 1520 96 R0
SYMATTR InstName R6
SYMATTR Value 22k
SYMBOL res 1712 448 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R8
SYMATTR Value 100k
SYMBOL cap 336 608 R0
SYMATTR InstName C3
SYMATTR Value 166n
SYMBOL voltage 1296 512 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL cap 336 208 R0
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL diode 400 96 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL res 656 176 R0
SYMATTR InstName R2
SYMATTR Value 4.7Meg
SYMBOL voltage 1408 512 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1m 1m 1m 2m)
SYMBOL res 800 176 R0
SYMATTR InstName R3
SYMATTR Value 47k
SYMBOL voltage 64 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 0 0 0.5m 1m)
FLAG 768 512 0
FLAG 352 768 0
FLAG 64 272 0
FLAG 1536 704 0
TEXT -48 568 Left 2 !.tran 0 200m 0
TEXT 264 568 Left 2 ;simulation of full boiler
TEXT 168 416 Left 2 ;cut open here to simulate empty boiler
TEXT 1304 0 Left 2 ;simulation of schmitt trigger
TEXT 832 304 Left 2 ;output to ADC or schmitt trigger