Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7172-4.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7172-4.2.asy)
V1 IN 0 4.5
C2 0 N001 1n
Rload OUT 0 3.5
XU1 IN OUT IN N001 OUT 0 ADM7172-4.2 ;pnba Vin)Sense)EN)SS)Vout)GND
C1 OUT 0 4.7 Rser=1.5m
.tran 5m startup
.lib ADM7172-4.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL cap 16 208 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 3.5
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.5
SYMBOL ADM7172-4.2 224 128 R0
SYMATTR InstName U1
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 5m startup
* Z:\tmp\asc_dec_bjh7r6w2\04958152b11a_Chapter03D_01.fig_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M2 N002 N004 VX N003 xNMOS
M1 VX N006 N007 N005 xNMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1244 1076
WIRE 464 400 464 304
WIRE 464 528 464 480
WIRE 672 528 464 528
WIRE 464 560 464 528
WIRE 624 608 464 608
WIRE 416 640 112 640
WIRE 464 736 464 656
WIRE 560 736 464 736
WIRE 464 784 464 736
WIRE 624 832 464 832
WIRE 416 864 288 864
WIRE 288 928 288 864
WIRE 464 1056 464 880
SYMBOL nmos4 416 560 R0
SYMATTR InstName M2
SYMATTR Value xNMOS
SYMBOL nmos4 416 784 R0
SYMATTR InstName M1
SYMATTR Value xNMOS
FLAG 560 736 VX
* Z:\home\khalils\Downloads\files\data\raw_asc\3a5d241f081e_Fig16_67.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot -I(VGS)
R2 N001 0 1G
VB N002 0 1
R1 N003 0 1G
M1 N001 VGS N003 N002 N_50n l=50n w=500n
VGS VGS 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.dc VB 0 2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1748 680
WIRE 624 -336 624 -368
WIRE 624 -224 624 -256
WIRE 736 -176 624 -176
WIRE 880 -176 816 -176
WIRE 576 -144 384 -144
WIRE 384 -128 384 -144
WIRE 880 -112 880 -176
WIRE 384 -96 384 -128
WIRE 624 -96 624 -128
WIRE 384 16 384 -16
WIRE 624 16 624 -16
SYMBOL res 640 -240 R180
WINDOW 0 36 76 Left 0
WINDOW 3 36 40 Left 0
SYMATTR InstName R2
SYMATTR Value 1G
SYMBOL nmos4 576 -224 R0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
WINDOW 123 -114 109 Left 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL res 608 -112 R0
SYMATTR InstName R1
SYMATTR Value 1G
SYMBOL voltage 384 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 39 90 Left 0
WINDOW 0 39 62 Left 0
SYMATTR Value 0
SYMATTR InstName VGS
SYMBOL voltage 720 -176 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 VBottom 0
SYMATTR InstName VB
SYMATTR Value 1
FLAG 384 16 0
FLAG 384 -128 VGS
FLAG 880 -112 0
FLAG 624 16 0
FLAG 624 -368 0
TEXT 376 80 Left 0 !.include cmosedu_models.txt
TEXT 376 56 Left 0 !.dc VB 0 2
TEXT 416 -264 Left 0 ;Plot -I(VGS)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1930A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1930A.asy)
V1 IN 0 5
L1 IN N001 10 Rser=0.182
R2 N002 0 13.3K
XU1 N001 0 N002 IN IN LT1930A ;pnba SW)GND)FB)_SHDN)Vin
C2 OUT 0 4.7 Rser=.05
R1 OUT N002 113K
D1 N001 OUT MBRS130L
Rload OUT 0 50
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 250u startup
.lib LT1930A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1376 984
WIRE 384 480 288 480
WIRE 512 480 384 480
WIRE 560 480 512 480
WIRE 672 480 640 480
WIRE 768 480 672 480
WIRE 912 480 832 480
WIRE 1024 480 912 480
WIRE 1120 480 1024 480
WIRE 288 496 288 480
WIRE 1024 496 1024 480
WIRE 1120 496 1120 480
WIRE 912 512 912 480
WIRE 512 560 512 480
WIRE 672 560 672 480
WIRE 288 592 288 576
WIRE 1024 592 1024 560
WIRE 1120 592 1120 576
WIRE 384 656 384 480
WIRE 432 656 384 656
WIRE 912 656 912 592
WIRE 912 656 752 656
WIRE 912 672 912 656
WIRE 912 768 912 752
WIRE 592 784 592 752
SYMBOL RES 1104 480 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL RES 896 496 R0
SYMATTR InstName R1
SYMATTR Value 113K
SYMBOL POLCAP 1008 496 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=.05
SYMBOL VOLTAGE 288 480 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 896 656 R0
SYMATTR InstName R2
SYMATTR Value 13.3K
SYMBOL IND 544 496 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=0.182
SYMBOL PowerProducts\\LT1930A 592 656 R0
SYMATTR InstName U1
SYMBOL schottky 768 496 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS130L
FLAG 1120 480 OUT
FLAG 912 768 0
FLAG 1024 592 0
FLAG 1120 592 0
FLAG 592 784 0
FLAG 288 592 0
FLAG 288 480 IN
TEXT 1016 672 Left 2 !.tran 250u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0bbefe8fe9ce_6993-2.asc
* Generated by LTspice 26.0.1 for Windows.
* LTC6993-2 Retriggerable 10ms One Shot\nRising Edge Triggered, Positive Output Pulse\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6993-2.asy)
XU1 N001 0 N003 N004 N002 OUT LTC6993-2 ;pnba TRIG)GND)SET)DIV)V+)OUT
R3 N004 0 392K
R1 N003 0 121K
R2 N002 N004 1000K
V2 N001 0 PULSE(0 3.3 1m 1n 1n 1m 8m 3)
V1 N002 0 5
R4 OUT 0 100K
.tran 50m startup
.lib LTC6993-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -192 96 -208 96
WIRE 96 96 -112 96
WIRE 608 96 320 96
WIRE 608 112 608 96
WIRE 96 176 80 176
WIRE 384 176 320 176
WIRE 512 176 384 176
WIRE 384 192 384 176
WIRE 512 192 512 176
WIRE 608 208 608 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 336 256 320 256
WIRE 336 288 336 256
WIRE 384 288 384 272
WIRE 384 288 336 288
WIRE 512 288 512 272
WIRE 384 304 384 288
WIRE 384 400 384 384
SYMBOL res 592 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL res 368 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL voltage 512 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 368 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 121K
SYMBOL SpecialFunctions\\LTC6993-2 208 176 R0
SYMATTR InstName U1
SYMBOL voltage -96 96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 1m 1n 1n 1m 8m 3)
SYMATTR InstName V2
FLAG -208 96 0
FLAG 512 288 0
FLAG 608 96 OUT
FLAG 80 176 0
FLAG 608 208 0
FLAG 384 400 0
FLAG -16 256 0
TEXT 512 360 Left 2 !.tran 50m startup
TEXT 216 56 Bottom 2 ;LTC6993-2 Retriggerable 10ms One Shot\nRising Edge Triggered, Positive Output Pulse\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1767-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1767-3.3.asy)
R3 N005 N004 1K
XU1 N001 IN N002 0 N003 OUT N004 LT1767-x.x top=17K bot=10K ;pnba Boost)Vin)SW)GND)_SHDN)FB)Vc
D1 0 N002 MBRS130L
C1 OUT 0 2.2
D2 OUT N001 1N914
C2 N001 N002 .1
L1 N002 OUT 5
Rload OUT 0 3
C3 N005 0 4000p
V1 IN 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100u startup
.lib LT1767-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2972 1416
WIRE 2160 912 1824 912
WIRE 2224 912 2160 912
WIRE 2336 912 2288 912
WIRE 2160 928 2160 912
WIRE 1824 992 1824 912
WIRE 2160 1008 2160 992
WIRE 2160 1008 2128 1008
WIRE 2224 1008 2160 1008
WIRE 2336 1008 2336 912
WIRE 2336 1008 2304 1008
WIRE 2400 1008 2336 1008
WIRE 2400 1024 2400 1008
WIRE 1680 1056 1568 1056
WIRE 2128 1056 2128 1008
WIRE 2128 1056 1968 1056
WIRE 2160 1056 2160 1008
WIRE 1568 1072 1568 1056
WIRE 1680 1120 1664 1120
WIRE 2128 1120 1968 1120
WIRE 2400 1120 2400 1104
WIRE 2160 1136 2160 1120
WIRE 1568 1168 1568 1152
WIRE 2128 1168 2128 1120
WIRE 2336 1168 2336 1008
WIRE 2336 1168 2128 1168
WIRE 1984 1184 1968 1184
WIRE 2080 1184 2064 1184
WIRE 2080 1200 2080 1184
WIRE 2336 1200 2336 1168
WIRE 1824 1264 1824 1248
WIRE 2080 1280 2080 1264
WIRE 2336 1280 2336 1264
SYMBOL VOLTAGE 1568 1056 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 2080 1168 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL cap 2144 928 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL diode 2288 896 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL cap 2320 1200 R0
WINDOW 3 27 60 Left 2
SYMATTR Value 2.2
SYMATTR InstName C1
SYMBOL res 2384 1008 R0
SYMATTR InstName Rload
SYMATTR Value 3
SYMBOL schottky 2144 1120 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS130L
SYMBOL ind 2208 1024 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 5
SYMBOL cap 2064 1200 R0
SYMATTR InstName C3
SYMATTR Value 4000p
SYMBOL PowerProducts\\LT1767-3.3 1824 1120 R0
SYMATTR InstName U1
FLAG 2080 1280 0
FLAG 1824 1264 0
FLAG 2160 1136 0
FLAG 2336 1280 0
FLAG 1568 1168 0
FLAG 2400 1120 0
FLAG 2400 1008 OUT
FLAG 1568 1056 IN
TEXT 2120 1344 Left 2 !.tran 100u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\06c3a1ae4e78_1716.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V3 N001 0 PULSE(0 2 0 .5m .5m 0 1m)
V2 N003 0 1
XU1 N003 N001 +V 0 N002 LT1716 ;pnba In+)In-)V+)V-)OUT
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1716.asy)
.lib LT1716.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 800
WIRE 208 256 208 224
WIRE 176 272 -320 272
WIRE -320 288 -320 272
WIRE 336 288 240 288
WIRE -448 304 -448 288
WIRE 176 304 64 304
WIRE 64 320 64 304
WIRE 208 336 208 320
WIRE -448 400 -448 384
WIRE -320 400 -320 368
WIRE 64 416 64 400
FLAG -448 400 0
FLAG -448 288 +V
FLAG 208 224 +V
FLAG -320 400 0
FLAG 64 416 0
FLAG 208 336 0
SYMBOL voltage -448 288 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -320 272 R0
WINDOW 3 17 101 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 2 0 .5m .5m 0 1m)
SYMATTR InstName V3
SYMBOL voltage 64 304 R0
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL Comparators\\LT1716 208 288 R0
SYMATTR InstName U1
TEXT 168 416 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\1b9df59de0c9_Draft09.asc
* Generated by LTspice 26.0.1 for Windows.
* amp,ADC ground
* 1k. simulate analog switch return\n8nA. with bjt op
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1006.asy)
V3 BOOT-DCV LO-SIDE 10V
R8 N003 N001 50k
V1 VCC 0 15
XU1 0 N001 VCC VEE N002 LT1006 ;pnba In+)In-)V+)V-)OUT
C3 N002 N001 20p
R9 N001 N002 50k
R1 N002 LO-SIDE 1k
XU2 BOOT-DCV N003 VCC VEE N003 LT1006 ;pnba In+)In-)V+)V-)OUT
V4 0 VEE 15
.tran 1ms
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2756 2104
WIRE -96 -736 -128 -736
WIRE -16 -736 -32 -736
WIRE -128 -656 -128 -736
WIRE -112 -656 -128 -656
WIRE -16 -656 -16 -736
WIRE -16 -656 -32 -656
WIRE -288 -624 -400 -624
WIRE -400 -576 -400 -624
WIRE -384 -576 -400 -576
WIRE -288 -560 -288 -624
WIRE -288 -560 -320 -560
WIRE -208 -560 -288 -560
WIRE -128 -560 -128 -656
WIRE -112 -560 -128 -560
WIRE -592 -544 -752 -544
WIRE -384 -544 -592 -544
WIRE -16 -544 -16 -656
WIRE -16 -544 -48 -544
WIRE 48 -544 -16 -544
WIRE -112 -528 -128 -528
WIRE -752 -400 -752 -464
WIRE -592 -400 -752 -400
WIRE -416 -400 -592 -400
WIRE 48 -400 48 -544
WIRE 48 -400 -336 -400
WIRE -128 -272 -128 -528
WIRE -784 -144 -864 -144
WIRE -864 -128 -864 -144
SYMBOL res -224 -544 R270
WINDOW 0 58 -14 VTop 2
WINDOW 3 87 38 VBottom 2
SYMATTR InstName R8
SYMATTR Value 50k
SYMBOL voltage -752 -560 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -19 -9 Left 2
WINDOW 0 -22 -38 Left 2
SYMATTR Value 10V
SYMATTR InstName V3
SYMBOL OpAmps\\LT1006 -80 -608 R0
SYMATTR InstName U1
SYMBOL cap -32 -752 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 20p
SYMBOL res -320 -416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -864 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
SYMATTR InstName V4
SYMATTR Value 15
SYMBOL res -128 -640 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 59 107 VBottom 2
SYMATTR InstName R9
SYMATTR Value 50k
SYMBOL OpAmps\\LT1006 -352 -624 R0
SYMATTR InstName U2
SYMBOL voltage -864 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 42 41 Left 2
SYMATTR Value 15
SYMATTR InstName V1
FLAG -864 -224 VCC
FLAG -864 -48 VEE
FLAG -784 -144 0
FLAG -80 -576 VCC
FLAG -80 -512 VEE
FLAG -128 -272 0
FLAG -592 -400 LO-SIDE
FLAG -592 -544 BOOT-DCV
FLAG -352 -592 VCC
FLAG -352 -528 VEE
TEXT -728 -176 Left 2 !.tran 1ms
TEXT -128 -232 Left 2 ;amp,ADC ground
TEXT -576 -320 Left 2 ;1k. simulate analog switch return\n8nA. with bjt op
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6274.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
R1 N003 N002 1K
V3 N001 0 SINE(0 10 3Meg)
R2 N002 N001 1K
XU1 0 N002 +V -V N003 LT6275 ;pnba In+)In-)V+)V-)OUT
.tran 10u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6274.asy)
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -112 0 -112
WIRE 256 -112 224 -112
WIRE 288 -112 256 -112
WIRE 416 -112 368 -112
WIRE 0 -96 0 -112
WIRE -336 -80 -336 -96
WIRE -176 -80 -176 -96
WIRE 0 0 0 -16
WIRE 336 0 336 -16
WIRE -336 16 -336 0
WIRE -176 16 -176 0
WIRE 256 16 256 -112
WIRE 304 16 256 16
WIRE 416 32 416 -112
WIRE 416 32 368 32
WIRE 304 48 288 48
WIRE 336 80 336 64
FLAG -336 16 0
FLAG -176 16 0
FLAG -336 -96 +V
FLAG -176 -96 -V
FLAG 336 -16 +V
FLAG 336 80 -V
FLAG 0 0 0
FLAG 288 48 0
SYMBOL voltage -336 -96 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -176 -96 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 384 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 0 -112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 10 3Meg)
SYMBOL res 240 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL opamps\\LT6274 336 32 R0
SYMATTR InstName U1
TEXT 432 136 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADTL084.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADTL084.asy)
Rload OUT 0 10K
R2 OUT N001 10K
V1 +V 0 15
V2 -V 0 -15
XU1 IN N001 +V -V OUT ADTL084 ;pnba In+)In-)V+)V-)OUT
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
.tran 1m
.lib ADTL084.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 720 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 720 -1088 720 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 720 -992 720 -1008
WIRE 432 -976 432 -992
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL opamps\\ADTL084 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 704 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 720 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 720 -992 0
FLAG 256 -1056 0
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1174-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 9
L1 N001 OUT 100 Rser=0.02 Rpar=5000
D1 0 N001 MBRS140
C1 OUT 0 100 Rser=0.02
XU1 OUT N003 N002 0 N001 IN IN IN LTC1174 top=51K bot=31.5K ;pnba FB)LBout)LBin)GND)SW)Vin)Ipgm)_SHDN
Rload OUT 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1174-3.3.asy)
.lib LTC1174.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1584 1140
WIRE 448 480 320 480
WIRE 624 480 448 480
WIRE 320 496 320 480
WIRE 624 512 624 480
WIRE 448 560 448 480
WIRE 496 560 448 560
WIRE 816 560 752 560
WIRE 864 560 816 560
WIRE 976 560 944 560
WIRE 1072 560 976 560
WIRE 816 576 816 560
WIRE 1072 576 1072 560
WIRE 320 592 320 576
WIRE 496 624 480 624
WIRE 768 624 752 624
WIRE 816 656 816 640
WIRE 1072 672 1072 656
WIRE 448 688 448 560
WIRE 496 688 448 688
WIRE 976 688 976 560
WIRE 976 688 752 688
WIRE 976 704 976 688
WIRE 624 752 624 736
WIRE 976 784 976 768
FLAG 1072 560 OUT
FLAG 976 784 0
FLAG 1072 672 0
FLAG 816 656 0
FLAG 624 752 0
FLAG 320 592 0
FLAG 320 480 IN
SYMBOL VOLTAGE 320 480 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL IND 848 576 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL SCHOTTKY 800 640 M180
WINDOW 0 30 60 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL POLCAP 960 704 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL PowerProducts\\LTC1174-3.3 624 624 R0
SYMATTR InstName U1
SYMBOL res 1056 560 R0
SYMATTR InstName Rload
SYMATTR Value 10
TEXT 704 792 Left 2 !.tran 100m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\f623f2fb6007_linea.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N003 0 3.9n
T1 N002 0 N003 0 Td=10n Z0=50
R2 N003 0 100
V1 N001 0 PULSE(0 2 0 {X} {X} 100u 200u)
R1 N002 N001 50
.tran 300n
.step param X list 2n 10n 20n 50n 100n 200n 500n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 144 -80 144
WIRE 128 144 64 144
WIRE 320 144 224 144
WIRE 432 144 320 144
WIRE 320 160 320 144
WIRE -80 176 -80 144
WIRE 128 176 112 176
WIRE 240 176 224 176
WIRE 432 176 432 144
WIRE 112 208 112 176
WIRE 240 208 240 176
WIRE 320 256 320 240
WIRE 432 256 432 240
WIRE -80 304 -80 256
SYMBOL voltage -80 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 2 0 {X} {X} 100u 200u)
SYMBOL res 304 144 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL cap 416 176 R0
SYMATTR InstName C1
SYMATTR Value 3.9n
SYMBOL res 80 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL tline 176 160 R0
SYMATTR InstName T1
SYMATTR Value Td=10n Z0=50
FLAG 112 208 0
FLAG 240 208 0
FLAG -80 304 0
FLAG 320 256 0
FLAG 432 256 0
TEXT -112 328 Left 2 !.tran 300n
TEXT -96 384 Left 2 !.step param X list 2n 10n 20n 50n 100n 200n 500n
* Z:\home\khalils\Downloads\files\data\raw_asc\258a29aa42c3_Ex8_10.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vs Vout 10k
Vs Vs 0 0 AC 1
GR1 Vout 0 Vout 0 1e-3
.noise v(vout,0) vs dec 100 1 1k
* The waveform viewer can integrate noise over a bandwidth \nby <Ctrl-Key> + left mouse button clicking on the corresponding \ndata trace label (at the top of the waveform viewer).
* A voltage-controlled current source, G,\nis used to model a noiseless resistor, \nsee page 238.
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1072 704
WIRE 272 208 224 208
WIRE 400 208 352 208
WIRE 224 240 224 208
WIRE 400 272 400 208
WIRE 400 272 304 272
WIRE 352 288 320 288
WIRE 304 336 304 272
WIRE 352 336 304 336
WIRE 320 352 320 288
WIRE 400 352 320 352
WIRE 224 400 224 320
WIRE 400 400 400 352
FLAG 400 400 0
FLAG 224 400 0
FLAG 400 208 Vout
FLAG 224 208 Vs
SYMBOL res 256 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 224 224 R0
WINDOW 0 -82 58 Left 2
WINDOW 3 24 104 Invisible 2
WINDOW 123 -82 86 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vs
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMBOL g 400 368 M180
WINDOW 0 43 42 Left 2
WINDOW 3 42 73 Left 2
SYMATTR InstName GR1
SYMATTR Value 1e-3
TEXT 160 448 Left 2 !.noise v(vout,0) vs dec 100 1 1k
TEXT 200 88 Left 2 ;The waveform viewer can integrate noise over a bandwidth \nby <Ctrl-Key> + left mouse button clicking on the corresponding \ndata trace label (at the top of the waveform viewer).
TEXT 504 296 Left 2 ;A voltage-controlled current source, G,\nis used to model a noiseless resistor, \nsee page 238.
* Z:\home\khalils\Downloads\files\data\raw_asc\172170e1cd68_LT1764.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1764.asy)
C1 OUT 0 10 Rser=100m
V1 IN 0 PWL(0 0 1 10)
XU1 IN IN 0 OUT OUT LT1764 ;pnba _SHDN)IN)GND)OUT)ADJ
Rload OUT 0 500
.tran 1
.lib LT1764.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -224 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 544 48 384 48
WIRE -224 64 -224 48
WIRE 384 64 384 48
WIRE 544 64 544 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -224 160 -224 144
WIRE 384 160 384 128
WIRE 544 160 544 144
WIRE 160 240 160 208
SYMBOL cap 368 64 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 Rser=100m
SYMATTR InstName C1
SYMATTR Value 10u
SYMBOL res 528 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL PowerProducts\\LT1764 160 96 R0
SYMATTR InstName U1
FLAG -224 160 0
FLAG 384 160 0
FLAG 544 160 0
FLAG 160 240 0
FLAG 544 48 OUT
FLAG -224 48 IN
TEXT 352 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7171-4.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7171-4.2.asy)
C2 0 N001 1n
C1 OUT 0 4.7 Rser=1.5m
V1 IN 0 4.5
Rload OUT 0 7
XU1 IN OUT IN N001 OUT 0 ADM7171-4.2 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 5m startup
.lib ADM7171-4.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL ADM7171-4.2 224 128 R0
SYMATTR InstName U1
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 7
SYMBOL cap 16 208 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.5
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 5m startup