Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\187db5fd39a0_jac-cell.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N001 OUT {Rs}
C1 N001 IN {Cp}
D2 N001 IN recombination
I1 IN N001 {Iph}
R1 N001 IN {Rsh}
D1 N001 IN diffusion
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model diffusion D IS=7.9406e-11 N=1
.model recombination D IS=5.0762e-6 N=2
.param Rs = 0.00171
.param Rsh = 59.23
.param Cp = 6.94u
.param Iph = 5.889
.dc dec param Rload 1e-20 1k 50
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1300 784
WIRE 144 -16 0 -16
WIRE 304 -16 144 -16
WIRE 544 -16 304 -16
WIRE 736 -16 544 -16
WIRE 944 -16 736 -16
WIRE 1184 -16 1024 -16
WIRE 0 112 0 -16
WIRE 144 112 144 -16
WIRE 304 112 304 -16
WIRE 544 112 544 -16
WIRE 736 112 736 -16
WIRE 0 320 0 192
WIRE 144 320 144 176
WIRE 144 320 0 320
WIRE 304 320 304 176
WIRE 304 320 144 320
WIRE 544 320 544 176
WIRE 544 320 304 320
WIRE 736 320 736 192
WIRE 736 320 544 320
WIRE 1184 320 736 320
IOPIN 1184 320 In
IOPIN 1184 -16 Out
SYMBOL diode 128 112 R0
SYMATTR InstName D1
SYMATTR Value diffusion
SYMBOL current 0 192 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName I1
SYMATTR Value {Iph}
SYMBOL res 720 96 R0
SYMATTR InstName R1
SYMATTR Value {Rsh}
SYMBOL cap 528 112 R0
SYMATTR InstName C1
SYMATTR Value {Cp}
SYMBOL diode 288 112 R0
SYMATTR InstName D2
SYMATTR Value recombination
SYMBOL res 928 0 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value {Rs}
FLAG 1184 320 IN
FLAG 1184 -16 OUT
TEXT 968 88 Left 2 !.model diffusion D IS=7.9406e-11 N=1
TEXT 968 112 Left 2 !.model recombination D IS=5.0762e-6 N=2
TEXT 968 136 Left 2 !.param Rs = 0.00171
TEXT 968 160 Left 2 !.param Rsh = 59.23
TEXT 968 184 Left 2 !.param Cp = 6.94u
TEXT 968 208 Left 2 !.param Iph = 5.889
TEXT 968 232 Left 2 !.dc dec param Rload 1e-20 1k 50
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX44281U.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX44281U.asy)
V1 IN 0 SINE(165m 50m 10k)
Vcc Vcc 0 3.3
RL OUT 0 10k
CL OUT 0 1p
XU1 IN Vcc 0 OUT MAX44281U ;pnba IN)VDD)GND)OUT
.tran 100u
.lib MAX44281U.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 448 192 416 192
WIRE 544 192 528 192
WIRE 544 208 544 192
WIRE 416 240 416 192
WIRE 416 272 416 240
WIRE 384 304 304 304
WIRE 576 304 448 304
WIRE 672 304 576 304
WIRE 576 336 576 304
WIRE 416 352 416 336
WIRE 672 352 672 304
WIRE 304 416 304 304
WIRE 576 448 576 416
WIRE 672 448 672 416
WIRE 304 512 304 496
SYMBOL MAX44281U 416 240 R0
SYMATTR InstName U1
SYMBOL cap 656 352 R0
SYMATTR InstName CL
SYMATTR Value 1p
SYMBOL res 560 320 R0
SYMATTR InstName RL
SYMATTR Value 10k
SYMBOL voltage 432 192 R270
WINDOW 123 0 0 Left 2
WINDOW 0 47 35 VRight 2
WINDOW 3 -45 40 VRight 2
SYMATTR InstName Vcc
SYMATTR Value 3.3
SYMBOL voltage 304 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 31 94 Left 2
SYMATTR Value SINE(165m 50m 10k)
SYMATTR InstName V1
FLAG 672 304 OUT
FLAG 416 240 Vcc
FLAG 544 208 0
FLAG 304 512 0
FLAG 576 448 0
FLAG 304 304 IN
FLAG 672 448 0
FLAG 416 352 0
TEXT 288 560 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\18725fb4ba27_180p_IDVG.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 N001 PMOS l=180n w=270n
VG N002 0
VD N001 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib tsmc018.lib
.dc VG -1.8 1.8 0.01 VD -0.01 -1.8 -0.9
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1100 680
WIRE 384 16 240 16
WIRE 384 48 384 16
WIRE 240 128 240 16
WIRE 304 128 240 128
WIRE 304 176 304 128
WIRE 304 176 240 176
WIRE 192 208 112 208
WIRE 112 320 112 288
WIRE 240 320 240 224
WIRE 240 320 112 320
WIRE 384 320 384 128
WIRE 384 320 240 320
WIRE 240 352 240 320
SYMBOL voltage 112 192 R0
SYMATTR InstName VG
SYMATTR Value ""
SYMBOL pmos4 192 128 R0
SYMATTR InstName M1
SYMATTR Value2 l=180n w=270n
SYMBOL voltage 384 32 R0
SYMATTR InstName VD
SYMATTR Value ""
FLAG 240 352 0
TEXT 656 160 Left 2 !.lib tsmc018.lib
TEXT 656 200 Left 2 !.dc VG -1.8 1.8 0.01 VD -0.01 -1.8 -0.9
* Z:\home\khalils\Downloads\files\data\raw_asc\749bd4f5ec2d_driver.asc
* Generated by LTspice 26.0.1 for Windows.
A1 in $G_GND 0 0 0 N006 N005 0 SCHMITT VT=2
D1 N001 N002 D
S3 Q N002 N005 0 SW
S4 N003 Q N006 0 SW
S2 $G_GND N004 DE 0 SW
D2 N003 N004 D
S6 _Q N003 N005 0 SW
S1 N001 $G_VCC DE 0 SW
S5 N002 _Q N006 0 SW
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model SW SW(Vt=.5 Ron=1m)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 832
WIRE 96 -160 96 -192
WIRE 48 -144 16 -144
WIRE 528 -96 256 -96
WIRE 48 -80 48 -96
WIRE 96 -48 96 -80
WIRE 96 32 96 16
WIRE 160 32 96 32
WIRE 256 32 256 -96
WIRE 256 32 240 32
WIRE 288 32 256 32
WIRE 416 32 368 32
WIRE 496 32 416 32
WIRE 592 32 560 32
WIRE 592 80 592 32
WIRE 544 96 512 96
WIRE -32 144 -112 144
WIRE 176 144 176 80
WIRE 176 144 32 144
WIRE 352 144 176 144
WIRE 544 160 544 144
WIRE -32 176 -112 176
WIRE 224 176 32 176
WIRE 304 176 304 80
WIRE 304 176 224 176
WIRE 592 208 592 160
WIRE 224 256 224 176
WIRE 352 256 352 144
WIRE 96 304 96 32
WIRE 160 304 96 304
WIRE 256 304 240 304
WIRE 288 304 256 304
WIRE 416 304 416 32
WIRE 416 304 368 304
WIRE 256 432 256 304
WIRE 528 432 256 432
IOPIN -112 144 In
IOPIN 528 -96 Out
IOPIN 528 432 Out
IOPIN 16 -144 In
IOPIN 512 96 In
SYMBOL sw 272 304 M90
SYMATTR InstName S6
SYMBOL diode 496 48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL sw 144 304 M90
SYMATTR InstName S5
SYMBOL sw 592 176 M180
SYMATTR InstName S2
SYMBOL sw 96 -64 M180
SYMATTR InstName S1
SYMBOL sw 256 32 M270
SYMATTR InstName S3
SYMBOL Digital\\diffschmitt -32 96 R0
WINDOW 3 8 44 Invisible 2
SYMATTR Value VT=2
SYMATTR InstName A1
SYMBOL sw 384 32 M270
SYMATTR InstName S4
SYMBOL diode 80 -48 R0
SYMATTR InstName D1
FLAG -112 144 in
FLAG 528 -96 Q
FLAG 528 432 _Q
FLAG 16 -144 DE
FLAG 96 -192 $G_VCC
FLAG 592 208 $G_GND
FLAG -112 176 $G_GND
FLAG 48 -80 0
FLAG 544 160 0
FLAG 512 96 DE
FLAG 224 80 0
FLAG 352 80 0
FLAG 176 256 0
FLAG 304 256 0
TEXT -240 256 Left 2 !.model SW SW(Vt=.5 Ron=1m)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1228.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1228.asy)
V3 N003 N007 SINE(0 .1 10K)
R6 N010 0 6.19K
R1 N004 0 100
R7 N010 N009 {R}
R8 N006 0 100
R2 N001 0 270
R4 0 N002 10
V1 N005 0 15
V2 N008 0 -15
XU1 N001 N004 N006 N008 N009 OUT N005 N002 LT1228 ;pnba Iout)In-)In+)V-)Iset)Vout)V+)Gain
R10 N006 N007 10K
R3 N002 OUT 470
R9 N004 N003 10K
R5 N008 N010 1.24K
.tran 3m
.step param R list 10K 5K 2.5K 1.25K
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1188 680
WIRE 16 48 16 32
WIRE 224 112 208 112
WIRE 320 112 304 112
WIRE 736 112 576 112
WIRE 768 112 736 112
WIRE 864 112 848 112
WIRE 736 128 736 112
WIRE -96 144 -288 144
WIRE 16 144 16 128
WIRE 16 144 -16 144
WIRE -288 160 -288 144
WIRE 16 176 16 144
WIRE 320 176 16 176
WIRE 592 176 576 176
WIRE 688 176 672 176
WIRE 320 240 16 240
WIRE 736 240 736 208
WIRE 736 240 576 240
WIRE 784 240 736 240
WIRE -288 272 -288 240
WIRE -96 272 -288 272
WIRE 16 272 16 240
WIRE 16 272 -16 272
WIRE 16 288 16 272
WIRE 256 304 144 304
WIRE 320 304 256 304
WIRE 592 304 576 304
WIRE 144 320 144 304
WIRE 256 320 256 304
WIRE 16 384 16 368
WIRE 144 416 144 400
WIRE 256 416 256 400
WIRE 448 416 256 416
WIRE 592 416 592 304
WIRE 592 416 528 416
WIRE 256 432 256 416
WIRE 256 528 256 512
SYMBOL res 320 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 270
SYMBOL res 432 400 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value {R}
SYMBOL voltage 576 176 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 0 144 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage -288 144 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 .1 10K)
SYMBOL voltage 144 304 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 0 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R9
SYMATTR Value 10K
SYMBOL opamps\\LT1228 448 208 R0
SYMATTR InstName U1
SYMBOL res 720 112 R0
SYMATTR InstName R3
SYMATTR Value 470
SYMBOL res 0 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R10
SYMATTR Value 10K
SYMBOL res 864 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL res 0 272 R0
SYMATTR InstName R8
SYMATTR Value 100
SYMBOL res 240 416 R0
SYMATTR InstName R6
SYMATTR Value 6.19K
SYMBOL res 240 304 R0
SYMATTR InstName R5
SYMATTR Value 1.24K
FLAG 688 176 0
FLAG 144 416 0
FLAG 208 112 0
FLAG 864 112 0
FLAG 256 528 0
FLAG 16 32 0
FLAG 16 384 0
FLAG 784 240 OUT
TEXT 640 448 Left 2 !.tran 3m\n.step param R list 10K 5K 2.5K 1.25K
* Z:\home\khalils\Downloads\files\data\raw_asc\2015f5394071_lc_tank_orientation.asc
* Generated by LTspice 26.0.1 for Windows.
* we can see that waveform of v3-v4 is the same as v1-gnd.\nthe point of setting ground in the inductor center tap \nis just for the phase inversion. \n \nIn a hartely oscillator, v4 is used as input to the amp\nand the amp will amplify and invert(common emitter) \nthen supply energy back at node v3.
L2 v2 0 0.001 IC=0 Rser=0 Rpar=0 Cpar=0
L1 v1 v2 0.001 IC=0 Rser=0 Rpar=0 Cpar=0
L3 v3 0 0.001 IC=0 Rser=0 Rpar=0 Cpar=0
C1 v1 0 0.001 IC=1 Rser=0 Lser=0 Rpar=0 Cpar=0
C2 v3 v4 0.001 IC=1 Rser=0 Lser=0 Rpar=0 Cpar=0
L4 0 v4 0.001 IC=0 Rser=0 Rpar=0 Cpar=0
.tran 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1944 680
WIRE 384 -224 256 -224
WIRE 448 -224 384 -224
WIRE 880 -224 784 -224
WIRE 976 -224 880 -224
WIRE 448 -192 448 -224
WIRE 976 -192 976 -224
WIRE 256 -128 256 -224
WIRE 784 -128 784 -224
WIRE 976 -96 976 -112
WIRE 1184 -96 976 -96
WIRE 448 -80 448 -112
WIRE 448 -64 448 -80
WIRE 976 -64 976 -96
WIRE 1184 -48 1184 -96
WIRE 256 48 256 -64
WIRE 384 48 256 48
WIRE 448 48 448 16
WIRE 448 48 384 48
WIRE 784 48 784 -64
WIRE 880 48 784 48
WIRE 976 48 976 16
WIRE 976 48 880 48
WIRE 384 80 384 48
SYMBOL ind 432 -208 R0
SYMATTR InstName L1
SYMATTR Value 0.001 IC=0
SYMATTR SpiceLine Rser=0 Rpar=0 Cpar=0
SYMBOL ind 960 -80 R0
SYMATTR InstName L4
SYMATTR Value 0.001 IC=0
SYMATTR SpiceLine Rser=0 Rpar=0 Cpar=0
SYMBOL ind 960 -208 R0
SYMATTR InstName L3
SYMATTR Value 0.001 IC=0
SYMATTR SpiceLine Rser=0 Rpar=0 Cpar=0
SYMBOL ind 432 -80 R0
SYMATTR InstName L2
SYMATTR Value 0.001 IC=0
SYMATTR SpiceLine Rser=0 Rpar=0 Cpar=0
SYMBOL cap 240 -128 R0
SYMATTR InstName C1
SYMATTR Value 0.001 IC=1
SYMATTR SpiceLine Rser=0 Lser=0 Rpar=0 Cpar=0
SYMBOL cap 768 -128 R0
SYMATTR InstName C2
SYMATTR Value 0.001 IC=1
SYMATTR SpiceLine Rser=0 Lser=0 Rpar=0 Cpar=0
FLAG 384 80 0
FLAG 384 -224 v1
FLAG 448 -80 v2
FLAG 1184 -48 0
FLAG 880 -224 v3
FLAG 880 48 v4
TEXT 592 112 Left 2 !.tran 0.1
TEXT 1264 -208 Left 2 ;we can see that waveform of v3-v4 is the same as v1-gnd.\nthe point of setting ground in the inductor center tap \nis just for the phase inversion. \n \nIn a hartely oscillator, v4 is used as input to the amp\nand the amp will amplify and invert(common emitter) \nthen supply energy back at node v3.
* Z:\home\khalils\Downloads\files\data\raw_asc\d4c73f554478_TS0.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 V1 {R3}
V1 V1 N003 SINE(0 1 0 0 0 0 1000) AC 1 0
C1 N002 N003 {1/R3}
XU1 N001 N002 V2 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R3 0 N002 {R3}
R2 V2 N001 {R3}
.ac dec 100 .1 10
.param R3=1
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
WIRE 208 32 64 32
WIRE 352 32 288 32
WIRE 640 32 352 32
WIRE 752 32 720 32
WIRE 64 96 64 32
WIRE 352 128 352 32
WIRE 400 128 352 128
WIRE 752 144 752 32
WIRE 752 144 464 144
WIRE 800 144 752 144
WIRE 400 160 352 160
WIRE 64 240 64 176
WIRE 160 240 64 240
WIRE 256 240 224 240
WIRE 352 240 352 160
WIRE 352 240 256 240
WIRE 256 288 256 240
WIRE 256 400 256 368
IOPIN 64 32 In
IOPIN 800 144 Out
SYMBOL res 304 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R3}
SYMBOL res 272 384 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value {R3}
SYMBOL OpAmps\\opamp 432 80 R0
SYMATTR InstName U1
SYMBOL res 736 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R3}
SYMBOL cap 224 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {1/R3}
SYMBOL voltage 64 80 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 24 152 Left 2
SYMATTR Value2 AC 1 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 0 0 0 0 1000)
FLAG 256 400 0
FLAG 64 32 V1
FLAG 800 144 V2
TEXT 488 272 Left 2 !.ac dec 100 .1 10
TEXT 496 312 Left 2 !.param R3=1
TEXT 496 344 Left 2 !.lib opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\4799cabe5749_Ex8_13.asc
* Generated by LTspice 26.0.1 for Windows.
* The waveform viewer can integrate noise over a bandwidth \nby <Ctrl-Key> + left mouse button clicking on the corresponding \ndata trace label (at the top of the waveform viewer).
Vs Vs 0 1.7
D1 0 Vout Diode
Rs Vs Vout 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.noise v(vout,0) vs dec 100 1 100G
.model Diode D TT=10n Rs=0 CJ0=25f
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1072 704
WIRE 240 224 240 192
WIRE 240 352 240 304
WIRE 304 192 240 192
WIRE 368 192 304 192
WIRE 544 192 448 192
WIRE 576 192 544 192
WIRE 576 224 576 192
WIRE 576 352 576 288
SYMBOL res 352 208 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName Rs
SYMATTR Value 1k
SYMBOL voltage 240 208 R0
WINDOW 0 -75 34 Left 0
WINDOW 3 -73 77 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vs
SYMATTR Value 1.7
SYMBOL diode 592 288 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D1
SYMATTR Value Diode
FLAG 240 352 0
FLAG 576 352 0
FLAG 544 192 Vout
FLAG 304 192 Vs
TEXT 240 432 Left 0 !.noise v(vout,0) vs dec 100 1 100G
TEXT 192 32 Left 0 ;The waveform viewer can integrate noise over a bandwidth \nby <Ctrl-Key> + left mouse button clicking on the corresponding \ndata trace label (at the top of the waveform viewer).
TEXT 240 408 Left 0 !.model Diode D TT=10n Rs=0 CJ0=25f
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3121.asc
* Generated by LTspice 26.0.1 for Windows.
* Note: Parameter "softstart", with the valid range of [0.1, 1],\n can be used to reduce the internal startup timer,\n for the purpose of simulation. The part has nominal \n internal startup time of 10mSec.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3121.asy)
C2 N006 0 390p Rser=210K Cpar=10p
V1 IN 0 5
C4 OUT 0 22 V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
R1 N005 0 57.6K
Rload OUT 0 30
C1 N002 0 4.7
R3 OUT N004 1.02Meg
C3 OUT N003 .1
R2 N004 0 113K
L1 IN N001 6.8 Rser=10m
XU1 N001 0 IN N002 N002 N005 N006 N004 IN 0 OUT N003 LTC3121 ;pnba SW)PGND)Vin)PWM)Vcc)Rt)Vc)FB)_SD)SGND)Vout)CAP
.tran 3m startup
.softstart .2
.lib LTC3121.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1208 680
WIRE 64 -48 -32 -48
WIRE 176 -48 64 -48
WIRE 272 -48 256 -48
WIRE -32 -32 -32 -48
WIRE 176 0 176 -48
WIRE 272 0 272 -48
WIRE -32 64 -32 48
WIRE 64 64 64 -48
WIRE 80 64 64 64
WIRE 416 64 368 64
WIRE 576 64 416 64
WIRE 688 64 576 64
WIRE 784 64 688 64
WIRE 416 80 416 64
WIRE 784 80 784 64
WIRE 688 96 688 64
WIRE -16 160 -32 160
WIRE 64 160 48 160
WIRE 80 160 64 160
WIRE 416 160 416 144
WIRE 416 160 368 160
WIRE 576 160 576 64
WIRE 688 176 688 160
WIRE 784 176 784 160
WIRE 64 256 64 160
WIRE 80 256 64 256
WIRE 576 256 576 240
WIRE 576 256 368 256
WIRE 576 272 576 256
WIRE -16 352 -32 352
WIRE 80 352 64 352
WIRE 416 352 368 352
WIRE 496 352 480 352
WIRE 576 368 576 352
WIRE 176 432 176 416
WIRE 272 432 272 416
SYMBOL res 80 336 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 57.6K
SYMBOL res 768 64 R0
SYMATTR InstName Rload
SYMATTR Value 30
SYMBOL cap 416 368 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
WINDOW 39 -24 85 VBottom 2
SYMATTR InstName C2
SYMATTR Value 390p
SYMATTR SpiceLine Rser=210K Cpar=10p
SYMBOL PowerProducts\\LTC3121 224 208 R0
SYMATTR InstName U1
SYMBOL ind 160 -32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMATTR SpiceLine Rser=10m
SYMBOL voltage -32 -48 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 400 80 R0
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL res 560 144 R0
SYMATTR InstName R3
SYMATTR Value 1.02Meg
SYMBOL cap 672 96 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMATTR SpiceLine V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
SYMBOL cap 48 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL res 560 256 R0
SYMATTR InstName R2
SYMATTR Value 113K
FLAG 176 432 0
FLAG 272 432 0
FLAG -32 160 0
FLAG -32 64 0
FLAG -32 352 0
FLAG 496 352 0
FLAG 576 368 0
FLAG 688 176 0
FLAG 784 176 0
FLAG 784 64 OUT
FLAG -32 -48 IN
TEXT 696 288 Left 2 !.tran 3m startup
TEXT 696 320 Left 2 !.softstart .2
TEXT 392 -72 Left 2 ;Note: Parameter "softstart", with the valid range of [0.1, 1],\n         can be used to reduce the internal startup timer,\n         for the purpose of simulation. The part has nominal \n         internal startup time of 10mSec.
* Z:\home\khalils\Downloads\files\data\raw_asc\22183d69ad47_zener_diode.asc
* Generated by LTspice 26.0.1 for Windows.
*$
* Motorola pid=1N4733 case=DO-41
* 89-9-19 gjg
*$
* Zener Diode Voltage Regulation
+ Cjo=185p M=.3509 Vj=.75 Fc=.5 Isr=2.601n Nr=2 Bv=5.1 Ibv=.70507
+ Nbv=.74348 Ibvl=4.8274m Nbvl=6.7393 Tbv1=176.471u)
D1 0 N002 D1N4733
V1 N001 0 0V
R1 N002 N001 {r}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model D1N4733 D(Is=1.214f Rs=1.078 Ikf=0 N=1 Xti=3 Eg=1.11
.step param r 100 10k 1000
.dc V1 0 20 0.5V
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1256 680
WIRE 176 80 96 80
WIRE 304 80 256 80
WIRE 96 128 96 80
WIRE 304 128 304 80
WIRE 96 256 96 208
WIRE 304 256 304 192
SYMBOL res 272 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {r}
SYMBOL zener 320 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value D1N4733
SYMBOL voltage 96 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0V
FLAG 96 256 0
FLAG 304 256 0
TEXT 400 24 Left 2 !*$\n.model D1N4733 D(Is=1.214f Rs=1.078 Ikf=0 N=1 Xti=3 Eg=1.11\n+ Cjo=185p M=.3509 Vj=.75 Fc=.5 Isr=2.601n Nr=2 Bv=5.1 Ibv=.70507\n+ Nbv=.74348 Ibvl=4.8274m Nbvl=6.7393 Tbv1=176.471u)\n* Motorola pid=1N4733 case=DO-41\n* 89-9-19 gjg\n*$
TEXT 64 304 Left 2 !.step param r 100 10k 1000
TEXT 72 336 Left 2 !.dc V1 0 20 0.5V
TEXT 40 -48 Left 2 ;Zener Diode Voltage Regulation
* Z:\home\khalils\Downloads\files\data\raw_asc\1c3ac9b9f10d_A2sumo0_5V.asc
* Generated by LTspice 26.0.1 for Windows.
V2 VCC 0 12
XU1 0 N001 VCC VEE PuntaOut LM741 ;pnba In+)In-)V+)V-)OUT
C2 PuntaOut 0 20p
R5 PuntaIn N002 50
C1 PuntaIn 0 20p
R3 PuntaIn 0 10Meg
R4 PuntaOut 0 10Meg
R1 N001 PuntaIn 1K
R2 PuntaOut N001 10K
V3 0 VEE 12
V1 N002 0 SINE(0 0.575 10000) AC 75m 0
.lib LM741.sub
.tran 300u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1400 680
WIRE 176 16 80 16
WIRE 320 16 256 16
WIRE 624 96 624 64
WIRE 1040 128 1040 96
WIRE 1040 128 992 128
WIRE 1088 128 1040 128
WIRE 1280 128 1280 96
WIRE 1280 128 1216 128
WIRE 1328 128 1280 128
WIRE 992 160 992 128
WIRE 1088 160 1088 128
WIRE 1216 160 1216 128
WIRE 1328 160 1328 128
WIRE 128 192 128 144
WIRE -256 208 -320 208
WIRE -144 208 -176 208
WIRE -96 208 -144 208
WIRE 80 208 80 16
WIRE 80 208 -16 208
WIRE 96 208 80 208
WIRE 624 208 624 176
WIRE 752 208 624 208
WIRE 320 224 320 16
WIRE 320 224 160 224
WIRE 368 224 320 224
WIRE -320 240 -320 208
WIRE 96 240 0 240
WIRE 752 240 752 208
WIRE 624 256 624 208
WIRE 992 272 992 240
WIRE 1040 272 992 272
WIRE 1088 272 1088 224
WIRE 1088 272 1040 272
WIRE 1216 272 1216 240
WIRE 1264 272 1216 272
WIRE 1328 272 1328 224
WIRE 1328 272 1264 272
WIRE 128 304 128 256
WIRE 1040 304 1040 272
WIRE 1264 304 1264 272
WIRE 624 352 624 336
WIRE -320 384 -320 320
WIRE 0 384 0 240
SYMBOL voltage -320 224 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 24 44 Left 2
SYMATTR Value2 AC 75m 0
SYMATTR Value SINE(0 0.575 10000)
SYMATTR InstName V1
SYMBOL voltage 624 80 R0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL res 976 144 R0
SYMATTR InstName R3
SYMATTR Value 10MEG
SYMBOL cap 1312 160 R0
SYMATTR InstName C2
SYMATTR Value 20p
SYMBOL res 0 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL cap 1072 160 R0
SYMATTR InstName C1
SYMATTR Value 20p
SYMBOL Opamps\\opamp2 128 160 R0
SYMATTR InstName U1
SYMATTR Value LM741
SYMBOL voltage 624 240 R0
SYMATTR InstName V3
SYMATTR Value 12
SYMBOL res -160 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 50
SYMBOL res 272 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 1200 144 R0
SYMATTR InstName R4
SYMATTR Value 10MEG
FLAG 0 384 0
FLAG -320 384 0
FLAG 752 240 0
FLAG 624 64 VCC
FLAG 624 352 VEE
FLAG 128 144 VCC
FLAG 128 304 VEE
FLAG 1040 304 0
FLAG 1040 96 PuntaIn
FLAG 1264 304 0
FLAG 1280 96 PuntaOut
FLAG -144 208 PuntaIn
FLAG 368 224 PuntaOut
TEXT -264 -24 Left 2 !.lib LM741.sub
TEXT -352 456 Left 2 !.tran 300u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3652.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3652.asy)
XU1 IN IN IN NC_01 NC_02 0 OUT NC_03 OUT N002 N003 N001 0 LT3652 ;pnba Vin)Vin_reg)_SHDN)_CHRG)_Fault)Timer)Vfb)NTC)BAT)Sense)Boost)SW)GND
D1 OUT N003 1N5817
D2 0 N001 MBRS340
R1 N002 OUT 50m
V1 IN 0 12
C1 OUT 0 .2m
L1 N001 N002 6.8 Rpar=10K
C2 N001 N003 1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m startup
.lib LT3652.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 400 -160 400 -176
WIRE 64 -64 -32 -64
WIRE 80 -64 64 -64
WIRE 400 -64 400 -96
WIRE 400 -64 368 -64
WIRE 432 -64 400 -64
WIRE 544 -64 512 -64
WIRE 560 -64 544 -64
WIRE 656 -64 640 -64
WIRE 720 -64 656 -64
WIRE -32 -48 -32 -64
WIRE 400 -48 400 -64
WIRE 720 -48 720 -64
WIRE 64 32 64 -64
WIRE 80 32 64 32
WIRE 400 32 400 16
WIRE 400 32 368 32
WIRE 448 32 400 32
WIRE 656 32 656 -64
WIRE 656 32 512 32
WIRE 720 32 720 16
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 80 128 64 128
WIRE 544 128 544 -64
WIRE 544 128 368 128
WIRE 656 224 656 32
WIRE 656 224 368 224
WIRE 80 416 64 416
WIRE 656 416 656 224
WIRE 656 416 368 416
WIRE 224 480 224 464
SYMBOL schottky 512 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL schottky 384 -160 R0
WINDOW 3 36 42 Left 2
WINDOW 0 40 15 Left 2
SYMATTR Value MBRS340
SYMATTR InstName D2
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 544 -48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 50m
SYMBOL cap 384 -48 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL PowerProducts\\LT3652 224 176 R0
SYMATTR InstName U1
SYMBOL cap 704 -48 R0
SYMATTR InstName C1
SYMATTR Value .2m
SYMBOL ind 416 -48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMATTR SpiceLine Rpar=10K
SYMBOL voltage -32 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 224 480 0
FLAG 64 416 0
FLAG -32 48 0
FLAG 720 32 0
FLAG -32 -64 IN
FLAG 720 -64 OUT
FLAG 400 -176 0
TEXT 600 456 Left 2 !.tran 3m startup