Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\5bada4c2e239_OvervoltageProtection.asc
* Generated by LTspice 26.0.1 for Windows.
;op
R3 Vin Zener_In 47k
D2 0 Zener_In BZX84C20VL
D4 Gate_logic Vin BZX84C10VL
D5 NC_03 NC_04 MMBZ20VAL
D1 Gate_pwr Vin BZX84C10VL
D3 NC_01 NC_02 KDZ20B
R2 Vout 0 10
M1 Vout Gate_pwr Vin Vin Si7461DP
R4 Gate_logic Zener_In 47k
R1 0 Gate_pwr 47k
M2 Gate_pwr Gate_logic Vin Vin BSS84
V1 Vin 0 20
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V1 15 26 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -288 80 -368 80
WIRE -144 80 -288 80
WIRE 128 80 -144 80
WIRE 384 80 128 80
WIRE 448 80 384 80
WIRE 704 80 544 80
WIRE 768 80 704 80
WIRE 800 80 768 80
WIRE 384 128 384 80
WIRE -368 144 -368 80
WIRE -144 144 -144 80
WIRE 128 160 128 80
WIRE 128 160 48 160
WIRE 48 176 48 160
WIRE 384 224 384 192
WIRE 464 224 464 128
WIRE 464 224 384 224
WIRE 128 272 128 160
WIRE -144 288 -144 224
WIRE -112 288 -144 288
WIRE -48 288 -112 288
WIRE 48 288 48 240
WIRE 48 288 32 288
WIRE 64 288 48 288
WIRE 80 288 64 288
WIRE 704 288 704 80
WIRE -144 352 -144 288
WIRE -16 384 -64 384
WIRE 64 384 64 288
WIRE 64 384 -16 384
WIRE 128 384 128 368
WIRE 304 384 128 384
WIRE 384 384 304 384
WIRE 464 384 464 224
WIRE 464 384 384 384
WIRE 304 400 304 384
WIRE -368 496 -368 224
WIRE -256 496 -368 496
WIRE -144 496 -144 416
WIRE -144 496 -256 496
WIRE 304 496 304 480
WIRE 304 496 -144 496
WIRE 704 496 704 368
WIRE 704 496 304 496
WIRE -256 528 -256 496
SYMBOL zener 64 240 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMATTR Value BZX84C10VL
SYMBOL res 688 272 R0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL res 320 496 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 47k
SYMBOL pmos 80 368 M180
SYMATTR InstName M2
SYMATTR Value BSS84
SYMBOL zener 400 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BZX84C10VL
SYMBOL res 48 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 47k
SYMBOL pmos 544 128 M270
SYMATTR InstName M1
SYMATTR Value Si7461DP
SYMBOL voltage -368 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 20
SYMBOL zener -784 400 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D5
SYMATTR Value MMBZ20VAL
SYMBOL zener -880 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value KDZ20B
SYMBOL res -160 128 R0
SYMATTR InstName R3
SYMATTR Value 47k
SYMBOL zener -128 416 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value BZX84C20VL
FLAG -256 528 0
FLAG -288 80 Vin
FLAG 768 80 Vout
FLAG 384 384 Gate_pwr
FLAG -16 384 Gate_logic
FLAG -112 288 Zener_In
TEXT -480 56 Left 2 !;op
TEXT -480 -16 Left 2 !.dc V1 15 26 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\19ffd97933be_Fig_2-157_Logic_DFF-ClrPre.asc
* Generated by LTspice 26.0.1 for Windows.
V1 CLR 0 PULSE(0 1 0.3m 1n 1n 0.1m 1m)
V3 PRE 0 PULSE(0 1 0.6m 1n 1n 0.1m 1m)
A1 0 0 0 PRE CLR 0 OUT 0 DFLOP
.tran 4m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 48 32 48
WIRE 240 48 80 48
WIRE 240 96 240 48
WIRE 32 112 32 48
WIRE 160 144 128 144
WIRE 384 144 320 144
WIRE 128 192 128 144
WIRE 160 192 128 192
WIRE 32 240 32 192
WIRE 128 256 128 192
WIRE 160 256 160 240
WIRE 160 256 128 256
WIRE 160 272 160 256
WIRE 240 304 240 240
WIRE 240 320 240 304
WIRE 240 320 32 320
WIRE 32 336 32 320
WIRE 32 432 32 416
FLAG 384 144 OUT
FLAG 32 432 0
FLAG 160 272 0
FLAG 80 48 PRE
FLAG 240 304 CLR
FLAG 32 240 0
SYMBOL voltage 32 320 R0
WINDOW 3 53 61 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 1 0.3m 1n 1n 0.1m 1m)
SYMATTR InstName V1
SYMBOL voltage 32 96 R0
WINDOW 3 -21 -92 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 1 0.6m 1n 1n 0.1m 1m)
SYMATTR InstName V3
SYMBOL Digital\\dflop 240 96 R0
SYMATTR InstName A1
TEXT 352 440 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL40502-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL40502-3.0.asy)
Rload vOUT 0 15
XU1 vIN 0 vIN vOUT ADPL40502-3.0 ;pnba Vin)GND)EN)Vout
C1 vOUT 0 1 Rser=1m
V1 vIN 0 5
.tran 1m startup
.lib ADPL40502-3.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2808 1464
WIRE 1824 880 1728 880
WIRE 1984 880 1824 880
WIRE 1728 896 1728 880
WIRE 1984 896 1984 880
WIRE 1728 992 1728 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL VOLTAGE 1728 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADPL40502-3.0 1984 1024 R0
SYMATTR InstName U1
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMATTR SpiceLine Rser=1m
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 15
FLAG 2256 1024 vOUT
FLAG 2256 1136 0
FLAG 1728 992 0
FLAG 1728 880 vIN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 1m startup
* Z:\tmp\asc_dec_bjh7r6w2\02d6093b3355_opamp_rec_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V2 0 V_minus 5V
R2 N003 N004 10k
V1 V_plus 0 5V
R4 N002 N006 100k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -640 80 -640 48
WIRE 320 80 304 80
WIRE 304 128 304 80
WIRE -64 144 -176 144
WIRE 80 144 0 144
WIRE 272 144 80 144
WIRE 480 160 336 160
WIRE 640 160 480 160
WIRE 272 176 208 176
WIRE -640 192 -640 160
WIRE -640 192 -720 192
WIRE 640 192 576 192
WIRE -720 224 -720 192
WIRE 80 224 80 144
WIRE 304 224 304 192
WIRE 336 224 304 224
WIRE -640 240 -640 192
WIRE 208 272 208 176
WIRE 304 272 208 272
WIRE 480 272 480 160
WIRE 480 272 384 272
WIRE 576 288 576 192
WIRE 672 288 576 288
WIRE 208 304 208 272
WIRE 576 320 576 288
WIRE -640 368 -640 320
WIRE 80 416 80 304
WIRE 208 416 208 384
WIRE 208 416 80 416
WIRE 576 416 576 400
WIRE 576 416 208 416
SYMBOL voltage -640 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5V
SYMBOL res 400 256 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage -640 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5V
SYMBOL res 64 208 R0
SYMATTR InstName R4
SYMATTR Value 100k
FLAG -720 224 0
FLAG -640 48 V_plus
FLAG -640 368 V_minus
FLAG 320 80 V_minus
FLAG 336 224 V_plus
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1763-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1763-3.asy)
C2 OUT N001 .01
C1 OUT 0 10
XU1 OUT OUT 0 N001 IN MP_01 MP_02 IN LT1763-3 ;pnba OUT)Sense)GND)BYP)_SHDN)))IN
Rload OUT 0 500
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT1763.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 32 304 32
WIRE 352 32 320 32
WIRE 432 32 352 32
WIRE 528 32 432 32
WIRE 0 48 -208 48
WIRE 16 48 0 48
WIRE 432 48 432 32
WIRE 528 48 528 32
WIRE -208 64 -208 48
WIRE 352 64 352 32
WIRE 320 96 320 32
WIRE 320 96 304 96
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 432 144 432 112
WIRE 528 144 528 128
WIRE -208 160 -208 144
WIRE 352 160 352 128
WIRE 352 160 304 160
WIRE 160 240 160 208
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 336 64 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT1763-3 160 96 R0
SYMATTR InstName U1
SYMBOL cap 416 48 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG -208 160 0
FLAG 432 144 0
FLAG 528 144 0
FLAG 160 240 0
FLAG 528 32 OUT
FLAG -208 48 IN
TEXT 376 200 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\17d3a315e1ce_metal_detector.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 PULSE(0 5 0 0.01us 0.01us 3us 4us)
L1 N002 0 {L} Rser=0.5
R1 N001 N002 220
C1 N003 0 10n
D1 N002 N003 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 20us 0 1000 startup
.step param L 10u 200u 10u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 -128 -32 -128
WIRE 176 -64 176 -128
WIRE -32 32 -32 -128
WIRE 176 48 176 16
WIRE 240 48 176 48
WIRE 464 48 304 48
WIRE 176 96 176 48
WIRE 464 96 464 48
WIRE -32 224 -32 112
WIRE 176 224 176 176
WIRE 464 224 464 160
DATAFLAG 176 48 ""
SYMBOL voltage -32 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 0.01us 0.01us 3us 4us)
SYMBOL ind 160 80 R0
SYMATTR InstName L1
SYMATTR Value {L}
SYMATTR SpiceLine Rser=0.5
SYMBOL diode 240 64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL cap 448 96 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 160 -80 R0
SYMATTR InstName R1
SYMATTR Value 220
FLAG 176 224 0
FLAG -32 224 0
FLAG 464 224 0
TEXT -48 280 Left 2 !.tran 0 20us 0 1000 startup
TEXT -520 -88 Left 2 !.step param L 10u 200u 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1550.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1550.asy)
R2 OUT N007 100K
R1 IN N004 10K
Rload OUT 0 1K
V1 IN 0 4.5
XU1 N001 N002 N003 OUT N006 0 0 N010 N011 N009 N008 N007 N005 N004 IN IN LTC1550 ;pnba NC)C+)NC)Vout)C-)PGND)AGND)NC)NC)NC)CPout)ADJ)Sense)REG)_SHDN)Vin
R3 N007 0 100K
C2 OUT 0 10
C1 N002 N006 .1
C3 N008 0 .1
.tran 4m startup
.lib LTC1550.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1600 908
WIRE 240 128 224 128
WIRE 560 128 528 128
WIRE 624 128 560 128
WIRE 736 128 624 128
WIRE 624 144 624 128
WIRE 736 144 736 128
WIRE 240 192 176 192
WIRE 560 192 560 128
WIRE 560 192 528 192
WIRE 176 208 176 192
WIRE 736 240 736 224
WIRE 240 256 224 256
WIRE 624 256 624 224
WIRE 624 256 528 256
WIRE -16 320 -144 320
WIRE 64 320 -16 320
WIRE 240 320 64 320
WIRE 544 320 528 320
WIRE -144 336 -144 320
WIRE -16 336 -16 320
WIRE 64 336 64 320
WIRE 176 384 176 272
WIRE 240 384 176 384
WIRE 672 384 528 384
WIRE -144 432 -144 416
WIRE -16 432 -16 400
WIRE 64 432 64 416
WIRE 160 432 64 432
WIRE 64 448 64 432
WIRE 240 448 224 448
WIRE 544 448 528 448
WIRE 624 448 608 448
WIRE 240 512 224 512
WIRE 544 512 528 512
WIRE 64 544 64 528
WIRE 240 576 224 576
WIRE 544 576 528 576
WIRE 160 624 160 432
WIRE 672 624 672 384
WIRE 672 624 160 624
SYMBOL RES -160 320 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL cap -32 336 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res 48 320 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL cap 544 464 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL res 608 128 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL cap 160 208 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL PowerProducts\\LTC1550 384 224 R0
SYMATTR InstName U1
SYMBOL res 48 432 R0
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL VOLTAGE 736 128 R0
SYMATTR InstName V1
SYMATTR Value 4.5
FLAG -144 432 0
FLAG -16 432 0
FLAG 736 240 0
FLAG 224 448 0
FLAG 224 512 0
FLAG 624 448 0
FLAG 64 544 0
FLAG 736 128 IN
FLAG -144 320 OUT
TEXT 712 488 Left 2 !.tran 4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\10481680f003_Fig1_25.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot v(Vin) and V(vout)
C1 Vout 0 1p
R1 Vin Vout 1k
Vin Vin 0 PULSE(0 1 6n 10p 10p 3n 10n)
.tran 30n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 48 224 0 224
WIRE 112 224 48 224
WIRE 320 224 192 224
WIRE 352 224 320 224
WIRE 0 240 0 224
WIRE 352 240 352 224
WIRE 0 336 0 320
WIRE 352 336 352 304
SYMBOL cap 336 240 R0
SYMATTR InstName C1
SYMATTR Value 1p
SYMBOL voltage 0 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(0 1 6n 10p 10p 3n 10n)
SYMBOL res 96 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 0 336 0
FLAG 352 336 0
FLAG 320 224 Vout
FLAG 48 224 Vin
TEXT 40 400 Left 0 !.tran 30n
TEXT 24 144 Left 0 ;Plot v(Vin) and V(vout)
* Z:\tmp\asc_dec_bjh7r6w2\06ef66cb7476_outputFilter_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N003 N006 AC 1
R3 N002 N001 4
C1 N001 N004 {C}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 920 680
WIRE 160 -128 144 -128
WIRE 224 -128 160 -128
WIRE 368 -128 304 -128
WIRE 400 -128 368 -128
WIRE 160 -96 160 -128
WIRE 368 -96 368 -128
WIRE 64 -48 64 -128
WIRE 240 -32 160 -32
WIRE 368 -32 304 -32
WIRE 160 -16 160 -32
WIRE 368 -16 368 -32
WIRE 240 0 240 -32
WIRE 304 0 304 -32
WIRE 64 96 64 32
WIRE 160 96 160 64
WIRE 160 96 64 96
WIRE 240 96 240 64
WIRE 240 96 160 96
WIRE 272 96 240 96
WIRE 304 96 304 64
WIRE 304 96 272 96
WIRE 368 96 304 96
WIRE 480 96 480 -128
WIRE 272 112 272 96
SYMBOL voltage 64 -64 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL res 320 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 4
SYMBOL cap 144 -96 R0
SYMATTR InstName C1
SYMATTR Value {C}
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1911-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1911-1.5.asy)
C4 0 N001 .01
V1 IN 0 4
XU1 IN N002 N003 0 N005 OUT N004 N001 LTC1911-1.5 ;pnba Vin)C2+)C2-)GND)C1-)Vout)C1+)_SHDN
Rload OUT 0 18
C2 N002 N003 1
C3 OUT 0 10
C1 N004 N005 1
.tran 8m startup
.lib LTC1911-1.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2248 2612
WIRE 1440 2160 1264 2160
WIRE 1744 2160 1728 2160
WIRE 1824 2160 1808 2160
WIRE 1264 2176 1264 2160
WIRE 1440 2256 1360 2256
WIRE 1872 2256 1728 2256
WIRE 1984 2256 1872 2256
WIRE 1264 2272 1264 2256
WIRE 1360 2272 1360 2256
WIRE 1872 2272 1872 2256
WIRE 1984 2272 1984 2256
WIRE 1360 2352 1360 2336
WIRE 1440 2352 1360 2352
WIRE 1792 2352 1728 2352
WIRE 1792 2368 1792 2352
WIRE 1872 2368 1872 2336
WIRE 1984 2368 1984 2352
WIRE 1440 2448 1408 2448
WIRE 1792 2448 1792 2432
WIRE 1792 2448 1728 2448
SYMBOL PowerProducts\\LTC1911-1.5 1584 2304 R0
SYMATTR InstName U1
SYMBOL RES 1968 2256 R0
SYMATTR InstName Rload
SYMATTR Value 18
SYMBOL VOLTAGE 1264 2160 R0
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL cap 1856 2272 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL cap 1808 2144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value .01
SYMBOL cap 1344 2272 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 1776 2368 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 1264 2272 0
FLAG 1408 2448 0
FLAG 1872 2368 0
FLAG 1984 2368 0
FLAG 1984 2256 OUT
FLAG 1824 2160 0
FLAG 1264 2160 IN
TEXT 1776 2504 Left 2 !.tran 8m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\33105ad9e0dd_q2a.asc
* Generated by LTspice 26.0.1 for Windows.
M231EC147 N001 N002 0 0 NMOS L=0.18u W=1.8u
V_GS N002 0 0
V_DS N001 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include "tsmc180.txt"
.dc V_DS 0 1.8 0.01 V_GS 0.2 1.8 0.4
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -144 64 -144
WIRE 64 -80 64 -144
WIRE 160 -32 64 -32
WIRE 16 0 -96 0
WIRE 160 16 160 -32
WIRE 160 16 64 16
WIRE 64 32 64 16
SYMBOL voltage -96 -16 R0
SYMATTR InstName V_GS
SYMATTR Value 0
SYMBOL nmos4 16 -80 R0
SYMATTR InstName 231EC147
SYMATTR Value2 L=0.18u W=1.8u
SYMBOL voltage 208 -160 R0
SYMATTR InstName V_DS
SYMATTR Value 0
FLAG 64 32 0
FLAG -96 80 0
FLAG 208 -64 0
TEXT -128 -184 Left 2 !.include "tsmc180.txt"
TEXT -240 104 Left 2 !.dc V_DS 0 1.8 0.01 V_GS 0.2 1.8 0.4
* Z:\home\khalils\Downloads\files\data\raw_asc\112eac67e06b_dbuf_2bit.asc
* Generated by LTspice 26.0.1 for Windows.
A[1] D[1] 0 clk 0 clr 0 Q[1] 0 DFLOP
A[0] D[0] 0 clk 0 clr 0 Q[0] 0 DFLOP
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 128 208 128
FLAG 48 224 0
FLAG 224 128 Q[1:0]
IOPIN 224 128 Out
FLAG 128 224 clr
IOPIN 128 224 In
FLAG 48 128 D[1:0]
IOPIN 48 128 In
FLAG 48 176 clk
IOPIN 48 176 In
FLAG 224 176 0
FLAG 128 80 0
SYMBOL Digital\\dflop 128 80 R0
WINDOW 0 21 -17 Left 2
SYMATTR InstName A[1:0]
* Z:\tmp\asc_dec_bjh7r6w2\04e07653e0cc_project1_p3_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N002 N001 3.7k
R2 IB N002 100k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE -32 128 -32 48
WIRE 112 128 -32 128
WIRE 128 128 112 128
WIRE -32 192 -32 128
WIRE 192 256 192 176
WIRE -32 368 -32 272
WIRE 192 368 192 336
WIRE 192 368 -32 368
WIRE 192 384 192 368
WIRE 192 496 192 464
WIRE 192 512 192 496
SYMBOL res 208 352 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 3.7k
SYMBOL res -48 176 R0
SYMATTR InstName R2
SYMATTR Value 100k
FLAG 192 512 0
FLAG 192 496 X1
FLAG 112 128 IB
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4622A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4622A.asy)
V1 IN 0 12
C2 OUT2 0 47 Rser=5m
R1 N002 0 40.2K
Rload1 OUT1 0 .4
C1 OUT1 0 47 Rser=5m
R2 N001 0 90.9K
XU1 NC_01 OUT2 IN NC_02 NC_03 IN 0 NC_04 N002 NC_05 NC_06 OUT1 NC_07 IN IN NC_08 NC_09 N001 LTM4622A ;pnba Pgood1)Vout2)Run1)Mode)FREQ)Run2)SGND)Pgood2)FB2)Track/SS2)COMP2)Vout1)IntVcc)Vin1)Vin2)COMP1)Track/SS1)FB1
Rload2 OUT2 0 .6
.tran .5m startup
.lib LTM4622A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 -80 -96 -80
WIRE 96 -80 16 -80
WIRE 352 -80 96 -80
WIRE 432 -80 352 -80
WIRE -96 -64 -96 -80
WIRE 96 -64 96 -80
WIRE 352 -64 352 -80
WIRE 16 0 16 -80
WIRE 32 0 16 0
WIRE 432 0 432 -80
WIRE 432 0 416 0
WIRE -96 32 -96 16
WIRE -128 192 -272 192
WIRE 32 192 -128 192
WIRE 592 192 416 192
WIRE 688 192 592 192
WIRE -272 208 -272 192
WIRE -128 208 -128 192
WIRE 592 208 592 192
WIRE 688 208 688 192
WIRE 32 288 -64 288
WIRE 496 288 416 288
WIRE -272 304 -272 288
WIRE -128 304 -128 272
WIRE -64 304 -64 288
WIRE 496 304 496 288
WIRE 592 304 592 272
WIRE 688 304 688 288
WIRE -64 400 -64 384
WIRE 496 400 496 384
WIRE 160 560 160 544
SYMBOL res -288 192 R0
SYMATTR InstName Rload1
SYMATTR Value .4
SYMBOL res 672 192 R0
SYMATTR InstName Rload2
SYMATTR Value .6
SYMBOL res 480 288 R0
SYMATTR InstName R1
SYMATTR Value 40.2K
SYMBOL cap 576 208 R0
SYMATTR InstName C2
SYMATTR Value 47
SYMATTR SpiceLine Rser=5m
SYMBOL PowerProducts\\LTM4622A 224 240 R0
SYMATTR InstName U1
SYMBOL voltage -96 -80 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res -80 288 R0
SYMATTR InstName R2
SYMATTR Value 90.9K
SYMBOL cap -144 208 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMATTR SpiceLine Rser=5m
FLAG 160 560 0
FLAG -96 32 0
FLAG 496 400 0
FLAG -64 400 0
FLAG -128 304 0
FLAG -272 304 0
FLAG 592 304 0
FLAG 688 304 0
FLAG 688 192 OUT2
FLAG -272 192 OUT1
FLAG -96 -80 IN
TEXT 480 488 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4380-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4380-3.asy)
R5 P001 0 33
R4 IN N004 249K
C4 OUT 0 22
D1 0 N005 1N5371B
MQ1 IN N002 N001 N001 FDB33N25
C1 N005 0 0.1
C3 N006 0 8.2
XU2 0 OUT N001 N003 N005 N004 N005 N006 0 NC_01 LTC4380-3 ;pnba SEL)OUT)SNS)GATE)Vcc)DRN)ON)TMR)GND)FLTB
C2 N003 P001 47n
R2 N002 N003 10
V1 IN 0 PWL(0 0 20u 0 50u 12 1 12 1.01 250 1.2 250 1.21 12)
R1 N001 OUT 10m
Rload OUT 0 12
R3 IN N005 10K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 3
.lib LTC4380-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1864 1572
WIRE -256 -80 -464 -80
WIRE -16 -80 -256 -80
WIRE 80 -80 -16 -80
WIRE 288 -80 176 -80
WIRE 320 -80 288 -80
WIRE 416 -80 400 -80
WIRE 544 -80 416 -80
WIRE 672 -80 544 -80
WIRE 160 -16 160 -32
WIRE 672 -16 672 -80
WIRE 544 0 544 -80
WIRE 160 80 160 64
WIRE 208 80 160 80
WIRE 544 128 544 64
WIRE 672 128 672 64
WIRE -16 144 -16 -80
WIRE -256 192 -256 -80
WIRE -16 256 -16 224
WIRE 160 256 160 80
WIRE 288 256 288 -80
WIRE 416 256 416 -80
WIRE -256 352 -256 272
WIRE -256 352 -368 352
WIRE -128 352 -256 352
WIRE -80 352 -128 352
WIRE -368 368 -368 352
WIRE -256 368 -256 352
WIRE -368 448 -368 432
WIRE -256 448 -256 432
WIRE -128 448 -128 352
WIRE -80 448 -128 448
WIRE 496 448 480 448
WIRE 128 528 128 512
WIRE 320 528 320 512
WIRE -464 576 -464 -80
WIRE 320 608 320 592
WIRE -464 672 -464 656
SYMBOL LTC4380-3 208 384 R0
SYMATTR InstName U2
SYMBOL cap 304 528 R0
SYMATTR InstName C3
SYMATTR Value 8.2
SYMBOL res 304 -64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 10m
SYMBOL res 656 -32 R0
SYMATTR InstName Rload
SYMATTR Value 12
SYMBOL res -32 128 R0
SYMATTR InstName R4
SYMATTR Value 249K
SYMBOL cap -384 368 R0
SYMATTR InstName C1
SYMATTR Value 0.1
SYMBOL cap 528 0 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMBOL res 144 -32 R0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL res 192 128 R0
WINDOW 3 39 67 Left 2
SYMATTR Value 33
SYMATTR InstName R5
SYMBOL res -272 176 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL voltage -464 560 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PWL(0 0 20u 0 50u 12 1 12 1.01 250 1.2 250 1.21 12)
SYMATTR InstName V1
SYMBOL nmos 80 -32 R270
WINDOW 0 57 42 VTop 2
WINDOW 3 -14 72 VLeft 2
SYMATTR InstName Q1
SYMATTR Value FDB33N25
SYMBOL zener -272 432 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5371B
SYMBOL cap 192 80 R0
WINDOW 3 39 35 Left 2
WINDOW 0 39 8 Left 2
SYMATTR Value 47n
SYMATTR InstName C2
FLAG -464 672 0
FLAG 320 608 0
FLAG 128 528 0
FLAG -256 448 0
FLAG -464 -80 IN
FLAG 208 224 0
FLAG 496 448 0
FLAG 672 128 0
FLAG 544 128 0
FLAG -368 448 0
FLAG 672 -80 OUT
TEXT 424 752 Left 2 !.tran 3
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8571.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 IN N001 +V -V OUT AD8571 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 2.5
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
R2 OUT N001 10K
V2 -V 0 -2.5
Rload OUT 0 10K
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8571.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 352 -1216 336 -1216
WIRE 448 -1216 432 -1216
WIRE 464 -1216 448 -1216
WIRE 560 -1216 544 -1216
WIRE 112 -1104 112 -1120
WIRE 224 -1104 224 -1120
WIRE 448 -1104 448 -1216
WIRE 464 -1104 448 -1104
WIRE 560 -1088 560 -1216
WIRE 560 -1088 528 -1088
WIRE 672 -1088 560 -1088
WIRE 464 -1072 352 -1072
WIRE 672 -1072 672 -1088
WIRE 352 -1056 352 -1072
WIRE 112 -1008 112 -1024
WIRE 224 -1008 224 -1024
WIRE 672 -976 672 -992
WIRE 352 -960 352 -976
FLAG 112 -1120 +V
FLAG 112 -1008 0
FLAG 352 -960 0
FLAG 672 -1088 OUT
FLAG 352 -1072 IN
FLAG 496 -1120 +V
FLAG 224 -1120 -V
FLAG 496 -1056 -V
FLAG 336 -1216 0
FLAG 672 -976 0
FLAG 224 -1008 0
SYMBOL Opamps\\AD8571 496 -1152 R0
SYMATTR InstName U1
SYMBOL voltage 112 -1120 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 352 -1072 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 448 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 560 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 224 -1120 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 656 -1088 R0
SYMATTR InstName Rload
SYMATTR Value 10K
TEXT 704 -880 Left 2 !.tran 1m