Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\AD824.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
R2 OUT N001 10K
V2 -V 0 -15
XU1 IN N001 +V -V OUT AD820 ;pnba In+)In-)V+)V-)OUT
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD824.asy)
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 688 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 432 -976 432 -992
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 688 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 256 -1056 0
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL AD824 576 -1168 R0
SYMATTR InstName U1
TEXT 704 -1016 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\30642e688e3d_Power_Amplifier.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 N002 N003 0 BC547B
R5 N003 0 10
V1 N004 0 SINE(0 4.5 10k)
D1 N002 N005 1N4148
V2 N001 0 5
D2 N005 N006 1N4148
R4 N001 N002 100
C2 N006 N004 2m
C1 N002 N004 2m
R3 N006 N007 100
V3 N007 0 -5
Q2 N007 N006 N003 0 BC557B
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 2m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 -80 144 -80
WIRE 352 -80 192 -80
WIRE 144 -48 144 -80
WIRE 352 0 352 -80
WIRE 144 48 144 32
WIRE 144 48 96 48
WIRE 288 48 144 48
WIRE 400 96 352 96
WIRE 144 112 144 48
WIRE 32 192 32 48
WIRE 32 192 -96 192
WIRE -96 208 -96 192
WIRE 400 208 400 96
WIRE 624 208 400 208
WIRE 752 208 624 208
WIRE 144 224 144 176
WIRE 624 256 624 208
WIRE 400 304 400 208
WIRE 400 304 368 304
WIRE -96 320 -96 288
WIRE 32 352 32 192
WIRE 144 352 144 288
WIRE 144 352 96 352
WIRE 304 352 144 352
WIRE 144 368 144 352
WIRE 144 480 144 448
WIRE 192 480 144 480
WIRE 368 480 368 400
WIRE 368 480 192 480
SYMBOL res 128 -64 R0
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL pnp 304 400 M180
SYMATTR InstName Q2
SYMATTR Value BC557B
SYMBOL cap 96 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2m
SYMBOL cap 96 336 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 2m
SYMBOL voltage 192 -64 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 128 352 R0
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL diode 128 112 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 608 240 R0
SYMATTR InstName R5
SYMATTR Value 10
SYMBOL npn 288 0 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL voltage 192 464 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL diode 128 224 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL voltage -96 192 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 4.5 10k)
FLAG 192 560 0
FLAG 192 -160 0
FLAG -96 320 0
FLAG 624 336 0
TEXT -128 584 Left 2 !.tran 2m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6011.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6011.asy)
R1 N002 N001 1K
R2 N001 0 1K
XU1 N003 N001 N002 +V -V LT6011 ;pnba IN+)IN-)OUT)VCC)VEE
V3 N003 0 SINE(0 1 1K)
V2 -V 0 -10
V1 +V 0 10
.tran 3m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -112 48 -128 48
WIRE 0 48 -32 48
WIRE 96 48 0 48
WIRE 208 48 176 48
WIRE 64 112 64 96
WIRE -416 160 -416 144
WIRE -288 160 -288 144
WIRE 0 160 0 48
WIRE 32 160 0 160
WIRE 208 192 208 48
WIRE 208 192 176 192
WIRE 32 224 -160 224
WIRE -160 240 -160 224
WIRE -416 256 -416 240
WIRE -288 256 -288 240
WIRE 64 288 64 272
WIRE -160 336 -160 320
SYMBOL voltage -160 224 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 192 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -416 144 R0
SYMATTR InstName V2
SYMATTR Value -10
SYMBOL res -16 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL opamps\\LT6011 64 192 R0
SYMATTR InstName U1
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 10
FLAG -288 256 0
FLAG 64 96 +V
FLAG -288 144 +V
FLAG 64 288 -V
FLAG -416 256 0
FLAG -416 144 -V
FLAG -128 48 0
FLAG -160 336 0
TEXT 144 360 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7171-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7171-3.3.asy)
C1 OUT 0 4.7 Rser=1.5m
V1 IN 0 3.8
XU1 IN OUT IN N001 OUT 0 ADM7171-3.3 ;pnba Vin)Sense)EN)SS)Vout)GND
C2 N001 0 1n
Rload OUT 0 6
.tran 5m startup
.lib ADM7171-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL ADM7171-3.3 224 128 R0
SYMATTR InstName U1
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.8
SYMBOL cap 80 240 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 6
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7185-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
C2 OUT 0 4.7 Rser=5m
V1 IN 0 -2.3
R3 OUT 0 3.6
C1 N001 N002 10n
C3 N001 0 1
C4 N003 0 1
XU1 OUT OUT N001 N002 IN 0 N003 IN ADP7185-1.8 ;pnba Vout)Sense)VA)VAFB)EN)GND)Vreg)Vin
.tran 200m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7185-1.8.asy)
.lib ADP7185-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 16 -48
WIRE 96 -48 32 -48
WIRE 112 -48 96 -48
WIRE 400 -48 368 -48
WIRE 432 -48 400 -48
WIRE 496 -48 432 -48
WIRE 512 -48 496 -48
WIRE 16 -32 16 -48
WIRE 432 -32 432 -48
WIRE 512 -32 512 -48
WIRE 400 16 400 -48
WIRE 400 16 368 16
WIRE 432 48 432 32
WIRE 16 64 16 48
WIRE 512 64 512 48
WIRE 96 80 96 -48
WIRE 112 80 96 80
WIRE 464 80 368 80
WIRE 384 144 368 144
WIRE 464 144 464 80
WIRE 464 144 448 144
WIRE 464 160 464 144
WIRE 176 224 176 208
WIRE 304 224 304 208
WIRE 464 240 464 224
WIRE 176 320 176 288
FLAG 16 64 0
FLAG 432 48 0
FLAG 304 224 0
FLAG 512 64 0
FLAG 32 -48 IN
FLAG 496 -48 OUT
FLAG 464 240 0
FLAG 176 320 0
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=5m
SYMBOL voltage 16 -48 R0
SYMATTR InstName V1
SYMATTR Value -2.3
SYMBOL res 496 -48 R0
SYMATTR InstName R3
SYMATTR Value 3.6
SYMBOL cap 448 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap 448 160 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 160 224 R0
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL ADP7185-1.8 240 48 R0
SYMATTR InstName U1
TEXT 136 368 Left 2 !.tran 200m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7118-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N001 0 4.7n
V1 IN 0 6
Rload OUT 0 30
C1 OUT 0 2.2 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=5 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 6m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7118-5.0.asy)
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 30
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADP7118-5.0 224 128 R0
SYMATTR InstName U1
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\tmp\asc_dec_bjh7r6w2\036bfbf67785_Draft1_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R1||R2 N001 0
r_e3||r_o3 N001 N002
Igm1*Vin/2 0 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 -176 64 -176
WIRE 272 -176 176 -176
WIRE 400 -176 272 -176
WIRE 496 -176 400 -176
WIRE 64 -160 64 -176
WIRE 176 -160 176 -176
WIRE 272 -160 272 -176
WIRE 400 -160 400 -176
WIRE 496 -160 496 -176
WIRE 496 -80 400 -80
WIRE 176 -64 176 -80
WIRE 272 -64 272 -80
WIRE 272 -64 176 -64
WIRE 288 -64 272 -64
WIRE 496 -64 496 -80
WIRE 496 -64 384 -64
WIRE 384 -48 384 -64
WIRE 496 -48 496 -64
WIRE 0 -32 -48 -32
WIRE 176 -32 176 -64
WIRE 176 -32 48 -32
WIRE 272 -32 272 -64
WIRE 576 -32 560 -32
WIRE 0 -16 0 -32
WIRE 48 -16 48 -32
WIRE 176 -16 176 -32
WIRE 560 0 560 -32
WIRE 48 80 48 64
WIRE 176 80 176 64
WIRE 176 80 48 80
WIRE 0 96 0 64
WIRE 176 96 176 80
WIRE 176 96 0 96
WIRE 320 96 176 96
WIRE 496 96 320 96
WIRE 320 112 320 96
SYMBOL res 80 -176 M0
SYMATTR InstName R1||R2
SYMATTR Value ""
SYMBOL res 480 -176 R0
SYMATTR InstName r_e3||r_o3
SYMATTR Value ""
SYMBOL current 176 -16 R0
WINDOW 0 46 40 Left 2
SYMATTR InstName gm1*Vin/2
SYMATTR Value ""
FLAG 320 112 0
FLAG 64 -80 0
FLAG 272 -32 0
FLAG 288 -64 Vout
FLAG -48 -32 Vin/2
FLAG 576 -32 Vin/2
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1700.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1700.asy)
C4 OUT 0 200 Rser=50m
R2 N006 0 100K
C2 N001 0 220p
MQ2 N003 N007 OUT OUT Si9803DY
R1 OUT N006 316K
R3 N002 N001 5K
C1 N004 0 .001
V1 IN 0 2.5
L1 IN N003 1.8
Rload OUT 0 20
MQ1 N003 N005 0 0 Si9804DY
XU1 0 N002 N006 N004 0 N007 OUT N005 0 N003 LTC1700 ;pnba SGND)Ith)FB)Run/SS)Mode)TG)Vout)BG)PGND)SW
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1.5m startup
.lib LTC1700.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2856 1824
WIRE 2112 1184 1952 1184
WIRE 1952 1200 1952 1184
WIRE 2112 1232 2112 1184
WIRE 1952 1296 1952 1280
WIRE 1536 1360 1520 1360
WIRE 1616 1360 1600 1360
WIRE 1712 1360 1696 1360
WIRE 2112 1360 2112 1312
WIRE 2112 1360 2032 1360
WIRE 2192 1360 2112 1360
WIRE 2304 1360 2288 1360
WIRE 2352 1360 2304 1360
WIRE 2464 1360 2352 1360
WIRE 2112 1376 2112 1360
WIRE 2352 1376 2352 1360
WIRE 2464 1376 2464 1360
WIRE 1632 1456 1616 1456
WIRE 1712 1456 1696 1456
WIRE 2064 1456 2032 1456
WIRE 2352 1472 2352 1440
WIRE 2464 1472 2464 1456
WIRE 2112 1488 2112 1472
WIRE 1712 1552 1584 1552
WIRE 2272 1552 2272 1408
WIRE 2272 1552 2032 1552
WIRE 1712 1648 1696 1648
WIRE 2080 1648 2032 1648
WIRE 2304 1648 2304 1360
WIRE 2304 1648 2080 1648
WIRE 1792 1728 1792 1712
WIRE 1952 1728 1952 1712
WIRE 1488 1760 1472 1760
WIRE 1584 1760 1584 1552
WIRE 1584 1760 1568 1760
WIRE 1600 1760 1584 1760
WIRE 2080 1760 2080 1648
WIRE 2080 1760 1680 1760
SYMBOL cap 1696 1440 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .001
SYMBOL PMOS 2192 1408 R270
WINDOW 0 98 39 VCenter 2
WINDOW 3 67 41 VCenter 2
SYMATTR InstName Q2
SYMATTR Value Si9803DY
SYMBOL res 1712 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5K
SYMBOL NMOS 2064 1376 R0
SYMATTR InstName Q1
SYMATTR Value Si9804DY
SYMBOL cap 1600 1344 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 220p
SYMBOL res 2448 1360 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL RES 1696 1744 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 316K
SYMBOL PowerProducts\\LTC1700 1872 1504 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1952 1184 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL cap 2336 1376 R0
SYMATTR InstName C4
SYMATTR Value 200
SYMATTR SpiceLine Rser=50m
SYMBOL res 1584 1744 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL ind 2096 1216 R0
SYMATTR InstName L1
SYMATTR Value 1.8
FLAG 1952 1728 0
FLAG 1792 1728 0
FLAG 2112 1488 0
FLAG 1472 1760 0
FLAG 1616 1456 0
FLAG 1520 1360 0
FLAG 1952 1296 0
FLAG 2352 1472 0
FLAG 2464 1472 0
FLAG 2464 1360 OUT
FLAG 1696 1648 0
FLAG 1952 1184 IN
TEXT 2208 1704 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2ndOrderAllpass.asc
* Generated by LTspice 26.0.1 for Windows.
* f0 and Q set by parameters
* Vin
* Vout
* The resistor R1 is arbitrary
* The value of "H" determins the nominal gain
G1 0 N002 1 0 {2/R1}
G2 0 N003 1 0 {1/R1}
G4 0 2 N003 0 {10*H}
R2 2 0 .1
R1 N003 0 {R1}
L2 N002 0 {L1} Rpar={R1} Cpar={C1}
V1 1 0 AC 1
R3 2 0 1Meg
G3 N003 0 N002 0 {1/R1}
.param f0=1k Q=.7
.param R1=1k
.param C1=Q/(2*pi*f0*R1)
.param L1= 1/(C1*(2*pi*f0)**2)
.param H=100
.ac dec 101 100 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE -784 -176 -848 -176
WIRE -672 -176 -720 -176
WIRE -80 -176 -672 -176
WIRE -448 -128 -624 -128
WIRE -256 -128 -448 -128
WIRE -32 -128 -208 -128
WIRE 112 -128 -32 -128
WIRE 224 -128 112 -128
WIRE 384 -128 272 -128
WIRE 448 -128 384 -128
WIRE 480 -128 448 -128
WIRE 608 -128 544 -128
WIRE -848 -112 -848 -176
WIRE -624 -80 -624 -128
WIRE -448 -80 -448 -128
WIRE -32 -80 -32 -128
WIRE 112 -80 112 -128
WIRE -672 -64 -672 -176
WIRE -208 -64 -208 -128
WIRE -80 -64 -80 -176
WIRE 272 -64 272 -128
WIRE 384 -64 384 -128
WIRE 608 -64 608 -128
WIRE -256 -48 -256 -128
WIRE 224 -48 224 -128
WIRE -848 32 -848 -32
WIRE -672 32 -672 -16
WIRE -624 32 -624 0
WIRE -448 32 -448 0
WIRE -256 32 -256 0
WIRE -208 32 -208 16
WIRE -80 32 -80 -16
WIRE -32 32 -32 0
WIRE 112 32 112 0
WIRE 224 32 224 0
WIRE 272 32 272 16
WIRE 384 32 384 16
WIRE 608 32 608 16
SYMBOL res 96 -96 R0
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL res 368 -80 R0
SYMATTR InstName R2
SYMATTR Value .1
SYMBOL g2 -208 32 M180
WINDOW 0 34 74 Left 2
WINDOW 3 38 32 Left 2
SYMATTR InstName G3
SYMATTR Value {1/R1}
SYMBOL g -624 -96 R0
SYMATTR InstName G1
SYMATTR Value {2/R1}
SYMBOL ind -464 -96 R0
WINDOW 0 49 27 Left 2
WINDOW 3 44 58 Left 2
WINDOW 39 46 89 Left 2
WINDOW 123 45 122 Left 2
SYMATTR InstName L2
SYMATTR Value {L1}
SYMATTR SpiceLine Cpar={C1}
SYMATTR Value2 Rpar={R1}
SYMBOL Misc\\jumper -752 -240 M0
SYMATTR InstName J1
SYMBOL voltage -848 -128 R0
WINDOW 0 36 35 Left 2
WINDOW 123 35 75 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMBOL res 592 -80 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL g 272 -80 R0
SYMATTR InstName G4
SYMATTR Value {10*H}
SYMBOL g -32 -96 R0
SYMATTR InstName G2
SYMATTR Value {1/R1}
SYMBOL Misc\\jumper 512 -192 R0
SYMATTR InstName J2
FLAG -624 32 0
FLAG -672 32 0
FLAG -448 32 0
FLAG -32 32 0
FLAG -80 32 0
FLAG -256 32 0
FLAG 112 32 0
FLAG -208 32 0
FLAG -672 -176 1
FLAG 224 32 0
FLAG 272 32 0
FLAG 384 32 0
FLAG 448 -128 2
FLAG -848 32 0
FLAG 608 32 0
TEXT -536 128 Left 2 !.param f0=1k Q=.7
TEXT -856 128 Left 2 ;f0 and Q set by parameters
TEXT -536 168 Left 2 !.param R1=1k
TEXT -864 248 Left 2 !.param C1=Q/(2*pi*f0*R1)
TEXT -864 288 Left 2 !.param L1= 1/(C1*(2*pi*f0)**2)
TEXT -800 -192 Right 2 ;Vin
TEXT 560 -144 Left 2 ;Vout
TEXT -856 168 Left 2 ;The resistor R1 is arbitrary
TEXT -856 208 Left 2 ;The value of "H" determins the nominal gain
TEXT -352 208 Left 2 !.param H=100
TEXT -864 328 Left 2 !.ac dec 101 100 10k
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4251.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4251.asy)
R2 N003 N006 10
M1 OUT N003 N005 N005 IRF530
R6 N005 IN 20m
R4 0 N002 402K
XU1 N005 IN N001 N004 N002 N003 LTC4251 ;pnba Sense)Vee)Vin)Timer)UV/OV)Gate
C4 N001 IN 1
R7 N002 IN 32.4K
C3 N006 IN 18n
R1 0 N001 10K
C2 N004 IN 150n
Rload 0 OUT 50
C1 N002 IN 10n
V1 IN 0 PWL(0 0 1m 0 1.001m -48 220m -48 221m -70)
C5 0 OUT 100
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 400m
.lib LTC4251.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4692 2996
WIRE 2016 1744 2016 1728
WIRE 2640 1744 2640 1728
WIRE 2496 1760 2496 1728
WIRE 1456 1824 1456 1728
WIRE 2016 1856 2016 1824
WIRE 2272 1856 2016 1856
WIRE 2496 1856 2496 1824
WIRE 2640 1856 2640 1824
WIRE 2640 1856 2496 1856
WIRE 2768 1856 2640 1856
WIRE 2496 1872 2496 1856
WIRE 2016 1888 2016 1856
WIRE 864 1936 864 1728
WIRE 1456 1952 1456 1904
WIRE 1600 1952 1456 1952
WIRE 1824 1952 1600 1952
WIRE 2384 1952 2208 1952
WIRE 2448 1952 2384 1952
WIRE 2384 1968 2384 1952
WIRE 2272 2000 2272 1856
WIRE 1456 2032 1456 1952
WIRE 1600 2048 1600 1952
WIRE 1744 2096 1728 2096
WIRE 1824 2096 1808 2096
WIRE 2496 2096 2496 1968
WIRE 2496 2096 2208 2096
WIRE 2384 2112 2384 2048
WIRE 2496 2112 2496 2096
WIRE 864 2208 864 2016
WIRE 1456 2208 1456 2112
WIRE 1456 2208 864 2208
WIRE 1600 2208 1600 2112
WIRE 1600 2208 1456 2208
WIRE 1728 2208 1728 2096
WIRE 1728 2208 1600 2208
WIRE 2016 2208 2016 2160
WIRE 2016 2208 1728 2208
WIRE 2272 2208 2272 2064
WIRE 2272 2208 2016 2208
WIRE 2384 2208 2384 2176
WIRE 2384 2208 2272 2208
WIRE 2496 2208 2496 2192
WIRE 2496 2208 2384 2208
SYMBOL LTC4251 2016 2016 R0
SYMATTR InstName U1
SYMBOL voltage 864 2032 M180
WINDOW 3 24 16 Left 2
WINDOW 0 24 96 Left 2
SYMATTR Value PWL(0 0 1m 0 1.001m -48 220m -48 221m -70)
SYMATTR InstName V1
SYMBOL cap 2480 1760 R0
SYMATTR InstName C5
SYMATTR Value 100
SYMBOL res 1440 2016 R0
SYMATTR InstName R7
SYMATTR Value 32.4K
SYMBOL cap 2256 2000 R0
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL res 2512 2096 M0
WINDOW 0 -38 37 Left 2
WINDOW 3 -56 78 Left 2
SYMATTR InstName R6
SYMATTR Value 20m
SYMBOL res 2624 1728 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL nmos 2448 1872 R0
WINDOW 0 101 14 Right 2
WINDOW 3 140 76 Right 2
SYMATTR InstName M1
SYMATTR Value IRF530
SYMBOL cap 2368 2112 R0
SYMATTR InstName C3
SYMATTR Value 18n
SYMBOL res 1440 1808 R0
SYMATTR InstName R4
SYMATTR Value 402K
SYMBOL cap 1808 2080 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 150n
SYMBOL res 2000 1728 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 2368 1952 R0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL cap 1584 2048 R0
SYMATTR InstName C1
SYMATTR Value 10n
FLAG 864 2208 IN
FLAG 2768 1856 OUT
FLAG 864 1728 0
FLAG 1456 1728 0
FLAG 2016 1728 0
FLAG 2496 1728 0
FLAG 2640 1728 0
TEXT 2632 2176 Left 2 !.tran 400m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1008.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1008.asy)
V2 -V 0 -15
V1 +V 0 15
C1 N003 N002 1000p
V3 N004 0 SINE(0 1 1K)
R1 N005 N004 100K
XU1 N005 N001 +V -V N001 N002 N003 LT1008 ;pnba In+)In-)V+)V-)OUT)COMP1)COMP2
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 272 80 64 80
WIRE -288 112 -288 96
WIRE -160 112 -160 96
WIRE 112 128 96 128
WIRE 192 128 176 128
WIRE 96 192 96 128
WIRE 176 192 96 192
WIRE -288 208 -288 192
WIRE -160 208 -160 192
WIRE 176 208 176 192
WIRE 192 208 192 128
WIRE 208 208 208 192
WIRE 64 224 64 80
WIRE 160 224 64 224
WIRE 272 240 272 80
WIRE 272 240 224 240
WIRE -32 256 -112 256
WIRE 160 256 48 256
WIRE -112 272 -112 256
WIRE 192 288 192 272
WIRE -112 368 -112 352
SYMBOL voltage -112 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL opamps\\LT1008 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -288 96 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL cap 176 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000p
SYMBOL voltage -160 96 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 64 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
FLAG -160 208 0
FLAG 208 192 +V
FLAG -160 96 +V
FLAG 192 288 -V
FLAG -288 208 0
FLAG -288 96 -V
FLAG -112 368 0
TEXT 256 336 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\1c5d286ed63c_Fig10_14.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Vout Vin
VDD N001 0 1
C1 Vout 0 5f
Vin Vin 0 PULSE(0 1 0 0 0 1n 2n)
M1 Vout N001 Vin 0 N_50n l=50n w=500n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 5n
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 680
WIRE 208 -96 208 -112
WIRE 208 0 208 -16
WIRE 272 -112 208 -112
WIRE 384 -112 272 -112
WIRE 400 -160 400 -208
WIRE 432 -32 432 -112
WIRE 560 -112 480 -112
WIRE 672 -112 560 -112
WIRE 672 -80 672 -112
WIRE 672 16 672 -16
WIRE 784 -208 400 -208
WIRE 784 -176 784 -208
WIRE 784 -64 784 -96
SYMBOL voltage 208 -112 R0
WINDOW 0 -85 56 Left 0
WINDOW 3 -114 148 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(0 1 0 0 0 1n 2n)
SYMBOL nmos4 480 -160 R90
WINDOW 0 70 70 VRight 0
WINDOW 3 99 70 VRight 0
WINDOW 123 100 -119 VRight 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL cap 656 -80 R0
SYMATTR InstName C1
SYMATTR Value 5f
SYMBOL voltage 784 -192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
FLAG 208 0 0
FLAG 672 16 0
FLAG 560 -112 Vout
FLAG 272 -112 Vin
FLAG 432 -32 0
FLAG 784 -64 0
TEXT 392 32 Left 0 !.tran 5n
TEXT 392 56 Left 0 !.lib cmosedu_models.txt
TEXT 512 -240 Left 0 ;Plot Vout Vin