Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\52c734bd5044_E3f.asc
* Generated by LTspice 26.0.1 for Windows.
;dc VIN 0 3.3 0.001
;ac dec 10 1 10Meg
M1 N005 N006 0 N007 NMOS l=0.18u w=18u
VOUT N002 0 0
M2 N002 N003 N005 N004 NMOS l=0.36u w=18u
VB N003 0 1.1
VDD N001 0 3.3
RD N001 N002 8000
VIN N006 0 0.6 AC 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model NMOS NMOS (LEVEL=1 KP=150u VTO=0.5 LAMBDA=0 GAMMA=0 PHI=0.6)
.dc VOUT 0 3.3 0.001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 892 680
WIRE 96 -256 -48 -272
WIRE 96 -128 96 -176
WIRE 192 -128 96 -128
WIRE 96 -96 96 -128
WIRE 48 -16 -48 -16
WIRE 96 -16 96 -48
WIRE 96 32 96 0
WIRE 48 112 -48 112
WIRE 96 112 96 80
SYMBOL voltage -48 96 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName VIN
SYMATTR Value 0.6
SYMBOL nmos4 48 32 R0
SYMATTR InstName M1
SYMATTR Value2 l=0.18u w=18u
SYMBOL nmos4 48 -96 R0
SYMATTR InstName M2
SYMATTR Value2 l=0.36u w=18u
SYMBOL voltage 192 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VOUT
SYMATTR Value 0
SYMBOL voltage -48 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value 1.1
SYMBOL voltage -48 -288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 3.3
SYMBOL res 80 -272 R0
SYMATTR InstName RD
SYMATTR Value 8000
FLAG 96 128 0
FLAG -48 64 0
FLAG -48 192 0
FLAG -48 -192 0
FLAG 192 -48 0
TEXT -88 -384 Left 2 !;dc VIN 0 3.3 0.001
TEXT -88 -360 Left 2 !;ac dec 10 1 10Meg
TEXT -88 -336 Left 2 !.model NMOS NMOS (LEVEL=1 KP=150u VTO=0.5 LAMBDA=0 GAMMA=0 PHI=0.6)
TEXT -88 -408 Left 2 !.dc VOUT 0 3.3 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2902-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2902-2.asy)
V5 N001 0 5
V1 IN1 0 PWL(0 0 1m 5.0 1 5.0 2 4.1 3 4.1 4 5.0)
V4 IN4 0 PWL(0 0 1m 0.7 13 0.7 14 0.4 15 0.4 16 0.7)
V3 IN3 0 PWL(0 0 1m 1.8 9 1.8 10 1.5 11 1.5 12 1.8)
C1 N003 0 100p
V2 IN2 0 PWL(0 0 1m 3.0 5 3.0 6 2.5 7 2.5 8 3.0)
XU1 Comp3 Comp1 IN3 IN1 N003 0 0 N001 0 _RESET N002 N002 IN4 IN2 Comp4 Comp2 LTC2902-2 ;pnba COMP3)COMP1)V3)V1)CRT)GND)T0)_RDIS)T1)_RST)VPG)Vref)V4)V2)COMP4)COMP2
.tran 16 startup
.lib LTC2902-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1120 840
WIRE 288 48 -288 48
WIRE 368 48 288 48
WIRE 736 48 704 48
WIRE 288 96 -160 96
WIRE 368 96 288 96
WIRE 736 96 704 96
WIRE 288 144 -32 144
WIRE 368 144 288 144
WIRE 736 144 704 144
WIRE 288 192 96 192
WIRE 368 192 288 192
WIRE 736 192 704 192
WIRE 368 240 224 240
WIRE 736 240 704 240
WIRE 224 256 224 240
WIRE 368 288 352 288
WIRE 720 288 704 288
WIRE 368 336 352 336
WIRE 720 336 720 288
WIRE 720 336 704 336
WIRE 96 352 96 192
WIRE 224 352 224 336
WIRE 480 400 480 384
WIRE 592 400 592 384
WIRE -32 416 -32 144
WIRE 96 448 96 432
WIRE 592 480 592 464
WIRE -160 496 -160 96
WIRE -32 512 -32 496
WIRE -288 576 -288 48
WIRE -160 592 -160 576
WIRE -288 672 -288 656
SYMBOL voltage -32 400 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 0 1m 1.8 9 1.8 10 1.5 11 1.5 12 1.8)
SYMBOL LTC2902-2 528 192 R0
SYMATTR InstName U1
SYMBOL voltage -160 480 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 1m 3.0 5 3.0 6 2.5 7 2.5 8 3.0)
SYMBOL voltage 96 336 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value PWL(0 0 1m 0.7 13 0.7 14 0.4 15 0.4 16 0.7)
SYMBOL cap 576 400 R0
WINDOW 3 29 57 Left 2
SYMATTR Value 100p
SYMATTR InstName C1
SYMBOL voltage 224 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V5
SYMATTR Value 5
SYMBOL voltage -288 560 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1m 5.0 1 5.0 2 4.1 3 4.1 4 5.0)
FLAG 96 448 0
FLAG 736 48 Comp1
FLAG 736 96 Comp2
FLAG 736 144 Comp3
FLAG 736 192 Comp4
FLAG 736 240 _RESET
FLAG -288 672 0
FLAG -160 592 0
FLAG -32 512 0
FLAG 352 336 0
FLAG 352 288 0
FLAG 480 400 0
FLAG 592 480 0
FLAG 288 48 IN1
FLAG 288 96 IN2
FLAG 288 144 IN3
FLAG 288 192 IN4
FLAG 224 352 0
TEXT 736 544 Left 2 !.tran 16 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1076.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1076.asy)
D1 0 N001 MBRS340
L1 N001 OUT 75
R4 0 N006 1.5K
C1 N006 N005 .033
Rload OUT 0 5
XU1 IN N001 N004 0 N003 N005 N002 LT1076 ;pnba Vin)SW)Ilim)GND)FB)VC)SHDN
R2 OUT N003 2.74K
V1 IN 0 25
R1 N004 0 70K
R3 N003 0 2.21K
C2 OUT 0 400 Rser=.1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 4m startup
.lib LT1076.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3436 2244
WIRE 1296 1120 992 1120
WIRE 1504 1120 1456 1120
WIRE 1568 1120 1504 1120
WIRE 1696 1120 1648 1120
WIRE 1824 1120 1696 1120
WIRE 1920 1120 1824 1120
WIRE 992 1136 992 1120
WIRE 1296 1136 1296 1120
WIRE 1696 1136 1696 1120
WIRE 1824 1136 1824 1120
WIRE 1920 1136 1920 1120
WIRE 1504 1152 1504 1120
WIRE 1456 1216 1456 1120
WIRE 1456 1216 1424 1216
WIRE 992 1232 992 1216
WIRE 1168 1232 1136 1232
WIRE 1504 1232 1504 1216
WIRE 1824 1232 1824 1200
WIRE 1920 1232 1920 1216
WIRE 1696 1280 1696 1216
WIRE 1696 1280 1424 1280
WIRE 1696 1296 1696 1280
WIRE 1072 1328 1056 1328
WIRE 1168 1328 1152 1328
WIRE 1440 1344 1424 1344
WIRE 1536 1344 1504 1344
WIRE 1632 1344 1616 1344
WIRE 1696 1392 1696 1376
WIRE 1296 1440 1296 1424
SYMBOL res 1632 1328 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1.5K
SYMBOL cap 1808 1136 R0
SYMATTR InstName C2
SYMATTR Value 400
SYMATTR SpiceLine Rser=.1
SYMBOL ind 1552 1136 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 75
SYMBOL PowerProducts\\LT1076 1296 1280 R0
SYMATTR InstName U1
SYMBOL res 1680 1120 R0
SYMATTR InstName R2
SYMATTR Value 2.74K
SYMBOL res 1680 1280 R0
SYMATTR InstName R3
SYMATTR Value 2.21K
SYMBOL res 1904 1120 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL voltage 992 1120 R0
SYMATTR InstName V1
SYMATTR Value 25
SYMBOL schottky 1488 1216 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 1168 1312 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 70K
SYMBOL cap 1504 1328 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .033
FLAG 992 1232 0
FLAG 1296 1440 0
FLAG 1056 1328 0
FLAG 1504 1232 0
FLAG 1696 1392 0
FLAG 1920 1232 0
FLAG 1824 1232 0
FLAG 1632 1344 0
FLAG 1920 1120 OUT
FLAG 992 1120 IN
TEXT 1480 1488 Left 2 !.tran 4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0773dbb02d28_dirac_impulsefolge.asc
* Generated by LTspice 26.0.1 for Windows.
V6 T5 0 SINE(0 1 5k 0 0 90 0)
V4 T3 0 SINE(0 1 3k 0 0 90 0)
V8 T7 0 SINE(0 1 7k 0 0 90 0)
B1 SUM 0 V=V(T0)+V(T1)+V(T2)+V(T3)+V(T4)+V(T5)+V(T6)+V(T7)+V(T8)
V2 T0 0 1
V3 T2 0 SINE(0 1 2k 0 0 90 0)
V5 T4 0 SINE(0 1 4k 0 0 90 0)
V9 T8 0 SINE(0 1 8k 0 0 90 0)
V1 T1 0 SINE(0 1 1k 0 0 90 0)
V7 T6 0 SINE(0 1 6k 0 0 90 0)
.tran 0 125m 0 10n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1624 680
WIRE -128 -272 -128 -352
WIRE 0 -272 0 -352
WIRE 112 -272 112 -352
WIRE 224 -272 224 -352
WIRE -128 -144 -128 -192
WIRE 0 -144 0 -192
WIRE 112 -144 112 -192
WIRE 224 -128 224 -192
WIRE 688 128 688 64
WIRE -112 224 -112 176
WIRE 0 224 0 176
WIRE 112 224 112 176
WIRE 224 224 224 176
WIRE 352 224 352 176
WIRE 688 256 688 208
WIRE -112 352 -112 304
WIRE 0 352 0 304
WIRE 112 352 112 304
WIRE 224 352 224 304
WIRE 352 352 352 304
SYMBOL voltage 224 -288 R0
WINDOW 3 -12 298 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 1 8k 0 0 90 0)
SYMATTR InstName V9
SYMBOL voltage 112 208 R0
WINDOW 3 -4 240 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 1 2k 0 0 90 0)
SYMATTR InstName V3
SYMBOL voltage 0 208 R0
WINDOW 3 -13 199 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 1 1k 0 0 90 0)
SYMATTR InstName V1
SYMBOL voltage 0 -288 R0
WINDOW 3 -10 230 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 1 6k 0 0 90 0)
SYMATTR InstName V7
SYMBOL voltage -128 -288 R0
WINDOW 3 -29 199 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 1 5k 0 0 90 0)
SYMATTR InstName V6
SYMBOL voltage 352 208 R0
WINDOW 3 -5 330 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 1 4k 0 0 90 0)
SYMATTR InstName V5
SYMBOL bv 688 112 R0
SYMATTR InstName B1
SYMATTR Value V=V(T0)+V(T1)+V(T2)+V(T3)+V(T4)+V(T5)+V(T6)+V(T7)+V(T8)
SYMBOL voltage 112 -288 R0
WINDOW 3 -3 268 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 1 7k 0 0 90 0)
SYMATTR InstName V8
SYMBOL voltage -112 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL voltage 224 208 R0
WINDOW 3 -17 285 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 1 3k 0 0 90 0)
SYMATTR InstName V4
FLAG 0 352 0
FLAG -112 352 0
FLAG -112 176 T0
FLAG 0 176 T1
FLAG 112 352 0
FLAG 112 176 T2
FLAG 224 352 0
FLAG 224 176 T3
FLAG 352 352 0
FLAG 352 176 T4
FLAG 688 256 0
FLAG 688 64 SUM
FLAG -128 -144 0
FLAG -128 -352 T5
FLAG 0 -144 0
FLAG 0 -352 T6
FLAG 112 -144 0
FLAG 112 -352 T7
FLAG 224 -128 0
FLAG 224 -352 T8
TEXT -144 520 Left 2 !.tran 0 125m 0 10n
* Z:\home\khalils\Downloads\files\data\raw_asc\10849c9579f8_WavQuestion.asc
* Generated by LTspice 26.0.1 for Windows.
* 1 KHz. Relaxation Oscillator
A1 N001 0 0 0 0 N002 0 0 SCHMITT Vhigh=5,Td=7e-9,Trise=2e-9,Vh=.4
R1 N002 N001 15K tol=1 pwr=0.1
C1 N001 0 100n
.tran 0 50m 0 100n
.wave beispiel1.wav 16 44100 V(N001)
.wave beispiel2.wav 16 44100 V(N002)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 304 64 320
WIRE 64 240 64 208
WIRE 64 80 112 80
WIRE 144 320 64 320
WIRE 64 320 64 336
WIRE 240 208 240 80
WIRE 240 80 192 80
WIRE 208 208 240 208
WIRE 144 224 144 320
WIRE 144 208 64 208
WIRE 64 208 64 80
SYMBOL Digital\\schmtinv 144 144 R0
WINDOW 3 15 91 Left 0
SYMATTR Value Vhigh=5,Td=7e-9,Trise=2e-9,Vh=.4
SYMATTR InstName A1
SYMBOL res 208 64 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 15K
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL cap 48 240 R0
SYMATTR InstName C1
SYMATTR Value 100n
FLAG 64 336 0
TEXT 238 306 Left 0 !.tran 0 50m 0 100n
TEXT 240 280 Left 0 ;1 KHz. Relaxation Oscillator
TEXT 320 160 Left 0 !.wave beispiel1.wav 16 44100 V(N001)
TEXT 320 192 Left 0 !.wave beispiel2.wav 16 44100 V(N002)
* Z:\home\khalils\Downloads\files\data\raw_asc\571c8326d453_zd6v8.asc
* Generated by LTspice 26.0.1 for Windows.
*SRC=1N4736A;DI_1N4736A;Diodes;Zener <=10V; 6.80V 1.00W Diodes Inc. Zener
*SYM=HZEN
* Terminals A K
* You can save the model into a file, e.g. z_diodes.lib.\nThen just add a SPICE-line to your schematic to include this file\n \n.include z_diode.lib
+ CJO=123p VJ=0.750 M=0.330 TT=50.1n )
XD1 0 vz DI_1N4736A ;pnba +)-
VZ 2 3 6.05
DZ 3 1 DR
R1 N001 vz 1k
V1 N001 0 10
D1 1 2 DF
.SUBCKT DI_1N4736A 1 2
.MODEL DF D ( IS=60.6p RS=0.620 N=1.10
.MODEL DR D ( IS=12.1f RS=0.209 N=1.00 )
.ENDS
.op
.dc V1 -10 10 .01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -208 160 -208 80
WIRE -208 288 -208 240
WIRE -128 80 -208 80
WIRE 16 80 -48 80
WIRE 16 176 16 80
WIRE 16 288 16 240
SYMBOL voltage -208 144 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res -144 96 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL zener 0 240 M180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D1
SYMATTR Value DI_1N4736A
SYMATTR Prefix X
FLAG 16 288 0
FLAG -208 288 0
FLAG 16 80 vz
TEXT -272 368 Left 0 !*SRC=1N4736A;DI_1N4736A;Diodes;Zener <=10V; 6.80V 1.00W Diodes Inc. Zener\n*SYM=HZEN\n.SUBCKT DI_1N4736A 1 2\n* Terminals A K\nD1 1 2 DF\nDZ 3 1 DR\nVZ 2 3 6.05\n.MODEL DF D ( IS=60.6p RS=0.620 N=1.10\n+ CJO=123p VJ=0.750 M=0.330 TT=50.1n )\n.MODEL DR D ( IS=12.1f RS=0.209 N=1.00 )\n.ENDS
TEXT -200 -16 Left 0 !.op
TEXT -200 -40 Left 0 !.dc V1 -10 10 .01
TEXT -232 -200 Left 0 ;You can save the model into a file, e.g. z_diodes.lib.\nThen just add a SPICE-line to your schematic to  include this file\n \n.include z_diode.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\0fca00d6e7d1_5400-6.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\LT5400-6.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1468.asy)
V1 +V 0 15
XU1 OUT IN 0 0 N002 N002 N001 N001 NC_01 LT5400-6 ;pnba 1)2)3)4)5)6)7)8)PAD
V3 IN 0 AC 1
C2 N002 0 4.7p
XU2 N002 N001 +V -V OUT LT1468 ;pnba In+)In-)V+)V-)OUT
C1 N001 OUT 4.7p
V2 -V 0 -15
.ac oct 10 1K 10Meg
.lib LT5400.lib
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2836 1472
WIRE 2304 624 1936 624
WIRE 1936 688 1936 624
WIRE 2016 688 1936 688
WIRE 2192 688 2080 688
WIRE 1936 816 1936 688
WIRE 1952 816 1936 816
WIRE 2192 816 2192 688
WIRE 2192 816 2144 816
WIRE 1952 880 1744 880
WIRE 2192 880 2192 816
WIRE 2192 880 2144 880
WIRE 1392 896 1392 880
WIRE 1520 896 1520 880
WIRE 1744 896 1744 880
WIRE 2192 896 2192 880
WIRE 2208 896 2192 896
WIRE 2304 912 2304 624
WIRE 2304 912 2272 912
WIRE 2336 912 2304 912
WIRE 2208 928 2192 928
WIRE 1952 944 1936 944
WIRE 2192 944 2192 928
WIRE 2192 944 2144 944
WIRE 1392 992 1392 976
WIRE 1520 992 1520 976
WIRE 1744 992 1744 976
WIRE 1920 1008 1872 1008
WIRE 1952 1008 1920 1008
WIRE 2192 1008 2192 944
WIRE 2192 1008 2144 1008
WIRE 1920 1120 1920 1008
WIRE 2016 1120 1920 1120
WIRE 2192 1120 2192 1008
WIRE 2192 1120 2080 1120
SYMBOL voltage 1392 880 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL cap 2080 672 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7p
SYMBOL voltage 1520 880 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL cap 2080 1104 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7p
SYMBOL misc\\LT5400-6 2048 912 R0
SYMATTR InstName U1
SYMBOL voltage 1744 880 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL opamps\\LT1468 2240 848 R0
SYMATTR InstName U2
FLAG 2240 880 +V
FLAG 2240 944 -V
FLAG 2336 912 OUT
FLAG 1520 992 0
FLAG 1520 880 +V
FLAG 1392 992 0
FLAG 1392 880 -V
FLAG 1744 992 0
FLAG 1744 880 IN
FLAG 1872 1008 0
FLAG 1936 944 0
TEXT 2312 1064 Left 2 !.ac oct 10 1K 10Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG772.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:\nSwitch shown for a logic 0 input\nOnly one channel is modeled\nBandwidth is 424 MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG772.asy)
R1 vD 0 301
V3 vIN 0 PULSE(0 3 0 1n 1n 20u 40u)
V1 vSA 0 2
V2 vSB 0 0
V4 +V 0 3.3
C1 vD 0 36p
XU1 vIN vSA vD vSB +V 0 ADG772 ;pnba IN)SA)D)SB)Vdd)GND
.tran 100u
.lib ADG772.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1728 -272 -2032 -272
WIRE -1696 -272 -1728 -272
WIRE -2032 -256 -2032 -272
WIRE -1472 -240 -1504 -240
WIRE -1424 -240 -1472 -240
WIRE -1312 -240 -1424 -240
WIRE -1424 -224 -1424 -240
WIRE -1312 -224 -1312 -240
WIRE -1728 -208 -1920 -208
WIRE -1696 -208 -1728 -208
WIRE -1920 -192 -1920 -208
WIRE -2032 -160 -2032 -176
WIRE -1728 -144 -1776 -144
WIRE -1696 -144 -1728 -144
WIRE -1424 -128 -1424 -144
WIRE -1312 -128 -1312 -160
WIRE -1920 -96 -1920 -112
WIRE -1776 -80 -1776 -144
WIRE -1600 -16 -1600 -32
WIRE -1776 32 -1776 0
SYMBOL cap -1328 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL res -1440 -240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage -1776 -96 R0
WINDOW 3 24 136 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 1n 1n 20u 40u)
SYMATTR InstName V3
SYMBOL voltage -1920 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage -2208 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 3.3
SYMBOL ADG772 -1600 -192 R0
SYMATTR InstName U1
SYMBOL voltage -2032 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2
FLAG -2032 -160 0
FLAG -1920 -96 0
FLAG -1776 32 0
FLAG -1600 -368 +V
FLAG -1424 -128 0
FLAG -1600 -16 0
FLAG -1312 -128 0
FLAG -2208 -176 0
FLAG -2208 -256 +V
FLAG -1728 -272 vSA
FLAG -1728 -208 vSB
FLAG -1728 -144 vIN
FLAG -1472 -240 vD
TEXT -1480 -24 Left 2 !.tran 100u
TEXT -2056 -584 Left 2 ;Notes:\nSwitch shown for a logic 0 input\nOnly one channel is modeled\nBandwidth is 424 MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\ADR1399H.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR1399H.asy)
Rsense1 N003 0 1
Vin IN 0 15
Rbias IN OUT 2.67k
XU2 N002 0 N001 0 ADR1399H ;pnba 1)2)3)4
Rsense OUT N002 1
V1 N001 N003 0
.noise v(out) Vin dec 20 0.1 100k
.lib ADR1399H.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 960
WIRE 128 16 0 16
WIRE 352 16 208 16
WIRE 672 16 448 16
WIRE 352 32 352 16
WIRE 0 112 0 16
WIRE 672 112 672 16
WIRE 352 160 352 112
WIRE 448 160 448 16
WIRE 672 224 672 192
WIRE 0 336 0 192
WIRE 352 336 352 304
WIRE 352 336 0 336
WIRE 448 336 448 304
WIRE 448 336 352 336
WIRE 672 336 672 304
WIRE 672 336 448 336
WIRE 0 368 0 336
SYMBOL res 336 16 R0
SYMATTR InstName Rsense
SYMATTR Value 1
SYMBOL res 656 208 R0
SYMATTR InstName Rsense1
SYMATTR Value 1
SYMBOL res 112 32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rbias
SYMATTR Value 2.67k
SYMBOL ADR1399H 336 224 R0
SYMATTR InstName U2
SYMBOL voltage 672 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL voltage 0 96 R0
WINDOW 3 36 62 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 30 32 Left 2
SYMATTR Value 15
SYMATTR InstName Vin
FLAG 0 16 IN
FLAG 0 368 0
FLAG 352 16 OUT
TEXT -16 -80 Left 2 !.noise v(out) Vin dec 20 0.1 100k
* Z:\home\khalils\Downloads\files\data\raw_asc\colpits2.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
L2 0 N004 1m Rser=100
D2 0 N003 1N4148
C3 N003 N002 50p
J1 N001 N003 N004 2N5484
L1 0 N002 100
C4 N002 0 100p
C1 N003 N004 50p
V1 N001 0 10.
C2 N004 0 50p
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.tran 500 startup
.options method=trap
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2472 2424
WIRE 2400 1968 2208 1968
WIRE 2208 1984 2208 1968
WIRE 2400 2016 2400 1968
WIRE 1696 2048 1568 2048
WIRE 1760 2048 1696 2048
WIRE 1904 2048 1824 2048
WIRE 2048 2048 1904 2048
WIRE 2160 2048 2048 2048
WIRE 2048 2064 2048 2048
WIRE 1568 2080 1568 2048
WIRE 1696 2080 1696 2048
WIRE 1904 2080 1904 2048
WIRE 2048 2144 2048 2128
WIRE 2208 2144 2208 2080
WIRE 2208 2144 2048 2144
WIRE 2400 2144 2400 2096
WIRE 2048 2160 2048 2144
WIRE 2208 2160 2208 2144
WIRE 1568 2192 1568 2160
WIRE 1696 2192 1696 2144
WIRE 1904 2192 1904 2144
WIRE 2048 2256 2048 2224
WIRE 2208 2256 2208 2240
SYMBOL diode 1888 2144 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL ind 2224 2256 R180
WINDOW 0 -3 79 Right 2
WINDOW 3 -2 52 Right 2
WINDOW 39 -3 27 Right 2
SYMATTR InstName L2
SYMATTR Value 1m
SYMATTR SpiceLine Rser=100
SYMBOL ind 1584 2176 R180
WINDOW 0 -4 82 Right 2
WINDOW 3 -3 38 Right 2
SYMATTR InstName L1
SYMATTR Value 100
SYMBOL cap 1824 2032 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 50p
SYMBOL cap 2032 2064 R0
SYMATTR InstName C1
SYMATTR Value 50p
SYMBOL VOLTAGE 2400 2000 R0
SYMATTR InstName V1
SYMATTR Value 10.
SYMBOL cap 2032 2160 R0
SYMATTR InstName C2
SYMATTR Value 50p
SYMBOL cap 1680 2080 R0
SYMATTR InstName C4
SYMATTR Value 100p
SYMBOL NJF 2160 1984 R0
SYMATTR InstName J1
SYMATTR Value 2N5484
FLAG 1568 2192 0
FLAG 2048 2256 0
FLAG 2400 2144 0
FLAG 2208 2256 0
FLAG 1696 2192 0
FLAG 1904 2192 0
TEXT 1624 2272 Left 2 !.tran 500 startup
TEXT 1912 2328 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT 1952 2296 Left 2 !.options method=trap
* Z:\home\khalils\Downloads\files\data\raw_asc\0ffce813293d_lab_2-circuito-4_7k.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vout 0 4.7k
D1 Vin Vout 1N4148
V1 Vin 0 SINE(0 21.21 60)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.17
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -80 64 -80
WIRE 320 -80 224 -80
WIRE 64 0 64 -80
WIRE 320 0 320 -80
WIRE 64 128 64 80
WIRE 320 128 320 80
SYMBOL voltage 64 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 21.21 60)
SYMBOL res 304 -16 R0
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL diode 160 -64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG 64 128 0
FLAG 320 128 0
FLAG 64 -80 Vin
FLAG 320 -80 Vout
TEXT 366 -96 Left 2 !.tran 0.17
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1124.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain 1000 Amplifier with 0.01% Accuracy, DC to 1Hz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1124.asy)
V3 IN 0 ac 1
V1 +V 0 15
XU1 N002 N001 +V -V OUT LT1124 ;pnba In+)In-)V+)V-)OUT
R3 N002 IN 365
V2 -V 0 -15
R1 OUT N001 364.76K
R2 N001 0 365
.ac oct 100 1m 1Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -64 96 -80 96
WIRE 32 96 16 96
WIRE 48 96 32 96
WIRE 160 96 128 96
WIRE -336 160 -336 144
WIRE -208 160 -208 144
WIRE 96 208 96 192
WIRE 32 224 32 96
WIRE 64 224 32 224
WIRE 160 240 160 96
WIRE 160 240 128 240
WIRE 208 240 160 240
WIRE -336 256 -336 240
WIRE -208 256 -208 240
WIRE -48 256 -96 256
WIRE 64 256 32 256
WIRE -96 272 -96 256
WIRE 96 288 96 272
WIRE -96 368 -96 352
SYMBOL res 48 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 365
SYMBOL voltage -336 144 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -208 144 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT1124 96 176 R0
SYMATTR InstName U1
SYMBOL res 144 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 364.76K
SYMBOL res 32 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL voltage -96 256 R0
WINDOW 0 25 19 Left 2
SYMATTR InstName V3
SYMATTR Value ac 1
FLAG -208 256 0
FLAG 96 192 +V
FLAG -208 144 +V
FLAG 96 288 -V
FLAG -336 256 0
FLAG -336 144 -V
FLAG -80 96 0
FLAG -96 368 0
FLAG 208 240 OUT
FLAG -96 256 IN
TEXT 48 344 Left 2 !.ac oct 100 1m 1Meg
TEXT -96 48 Bottom 2 ;Gain 1000 Amplifier with 0.01% Accuracy, DC to 1Hz
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP150-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP150-2.8.asy)
XU1 IN 0 IN MP_01 OUT ADP150-x.x T=1.6Meg ;pnba Vin)GND)EN))Vout
Rload OUT 0 28
C1 OUT 0 1
V1 IN 0 5
.tran 500u startup
.lib ADP150-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 880 1696 880
WIRE 1984 880 1824 880
WIRE 1696 896 1696 880
WIRE 1984 896 1984 880
WIRE 1696 992 1696 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL PowerProducts\\ADP150-2.8 1984 1024 R0
SYMATTR InstName U1
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 28
SYMBOL VOLTAGE 1696 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 2256 1024 OUT
FLAG 2256 1136 0
FLAG 1696 992 0
FLAG 1696 880 IN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 500u startup