Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1764-1.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1764-1.0.asy)
R2 N001 IN 50K
V1 IN 0 1.3
C2 N003 0 10n
C1 N004 0 1
C4 OUT 0 10
R1 OUT 0 .5
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1764 Radj=6688.96 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
C3 N002 0 1
.tran 1m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL ADP1764-1.0 224 176 R0
SYMATTR InstName U1
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.3
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value .5
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1550CS8-4.1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1550CS8-4.1.asy)
V1 IN 0 4.5
C1 N001 0 .1
Rload OUT 0 1K
XU1 IN IN N002 OUT N003 0 N001 OUT LTC1550CS8-4.1 ;pnba _SHDN)Vin)C+)Vout)C-)GND)CPout)Sense
C2 N003 N002 .1
C3 OUT 0 10
.tran 2m startup
.lib LTC1550CS8-4.1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1600 1220
WIRE 576 720 144 720
WIRE 208 784 48 784
WIRE 240 784 208 784
WIRE 576 784 576 720
WIRE 576 784 528 784
WIRE 48 800 48 784
WIRE 208 848 208 784
WIRE 240 848 208 848
WIRE 560 848 528 848
WIRE 656 848 624 848
WIRE 48 896 48 880
WIRE 240 912 208 912
WIRE 544 912 528 912
WIRE 144 976 144 720
WIRE 144 976 32 976
WIRE 240 976 144 976
WIRE 544 976 528 976
WIRE 32 992 32 976
WIRE 144 1008 144 976
WIRE 32 1088 32 1072
WIRE 144 1088 144 1072
WIRE 208 1104 208 912
WIRE 352 1104 208 1104
WIRE 544 1104 544 976
WIRE 544 1104 416 1104
SYMBOL cap 560 864 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL cap 128 1008 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL VOLTAGE 48 784 R0
SYMATTR InstName V1
SYMATTR Value 4.5
SYMBOL RES 16 976 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL cap 416 1088 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL PowerProducts\\LTC1550CS8-4.1 384 880 R0
SYMATTR InstName U1
FLAG 656 848 0
FLAG 544 912 0
FLAG 48 896 0
FLAG 32 1088 0
FLAG 144 1088 0
FLAG 48 784 IN
FLAG 32 976 OUT
TEXT 616 1064 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3c18c87d7485_CircuitBouchon4.asc
* Generated by LTspice 26.0.1 for Windows.
;.step param freq 1000 24000 2000
; .param freq=50000
L1 OUT2 0 .01
R1 OUT2 N001 5
C1 OUT2 0 10n
V1 N001 0 AC 1 0
.ac dec 100 1e3 1e6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 80 48 80
WIRE 304 80 208 80
WIRE 432 80 304 80
WIRE 736 80 432 80
WIRE 432 128 432 80
WIRE 48 144 48 80
WIRE 304 144 304 80
WIRE 48 256 48 224
WIRE 128 256 48 256
WIRE 304 256 304 208
WIRE 304 256 128 256
WIRE 432 256 432 208
WIRE 432 256 304 256
WIRE 128 272 128 256
SYMBOL cap 288 144 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 224 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL ind 416 112 R0
SYMATTR InstName L1
SYMATTR Value .01
SYMBOL voltage 48 128 R0
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value2 AC 1 0
SYMATTR Value ""
SYMATTR InstName V1
FLAG 128 272 0
FLAG 736 80 OUT2
TEXT 40 344 Left 2 !;.step param freq 1000 24000 2000\n; .param freq=50000
TEXT 208 296 Left 2 !.ac dec 100 1e3 1e6
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7157-02.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7157-02.asy)
C2 N002 0 1
C3 OUT 0 10
R4 OUT 0 2
V1 IN 0 3
XU1 OUT MP_01 OUT N002 N001 N005 N003 N004 IN 0 ADP7157-02 Vreg=2.611 Vref=1.216 ;pnba Vout))Vout_Sense)Byp)EN)Ref_Sense)Ref)Vreg)Vin)GND
R3 IN N001 100K
C1 N004 0 1
R2 N005 0 100K
C4 N003 0 1
R1 N003 N005 66.5K
.tran 5m startup
.lib ADP7157-02.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -144 32
WIRE 80 32 -32 32
WIRE 416 32 400 32
WIRE 464 32 416 32
WIRE 560 32 464 32
WIRE -144 48 -144 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE 416 128 416 32
WIRE 416 128 400 128
WIRE -144 144 -144 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE 0 224 -16 224
WIRE 80 224 64 224
WIRE 464 224 400 224
WIRE 560 224 464 224
WIRE 464 240 464 224
WIRE 560 240 560 224
WIRE 0 320 -16 320
WIRE 80 320 64 320
WIRE 432 320 400 320
WIRE 560 320 560 304
WIRE 432 336 432 320
WIRE 464 336 464 320
WIRE 464 336 432 336
WIRE 464 352 464 336
WIRE 240 400 240 384
WIRE 464 448 464 432
SYMBOL res 544 32 R0
SYMATTR InstName R4
SYMATTR Value 2
SYMBOL cap 544 240 R0
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL res 448 336 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL cap 448 48 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL voltage -144 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res 448 224 R0
SYMATTR InstName R1
SYMATTR Value 66.5K
SYMBOL cap 64 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL ADP7157-02 240 176 R0
SYMATTR InstName U1
FLAG 240 400 0
FLAG 560 320 0
FLAG 464 144 0
FLAG -16 320 0
FLAG -16 224 0
FLAG -144 144 0
FLAG 560 144 0
FLAG 464 448 0
FLAG -144 32 IN
FLAG 560 32 OUT
TEXT 552 400 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7102-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 4.3
C1 OUT 0 2.2 Rser=1.5m
Rload OUT 0 16
R1 OUT N001 100k
XU1 IN OUT IN N001 OUT 0 ADP7102 Vref=3.3 ;pnba Vin)Sense)EN)PG)Vout)GND
.tran 3m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7102-3.3.asy)
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -16 48 -16 32
WIRE 384 128 352 128
WIRE 464 128 464 32
WIRE 464 128 384 128
WIRE 560 128 464 128
WIRE -16 144 -16 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 384 224 384 128
WIRE 384 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -16 144 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -16 32 IN
FLAG 560 128 OUT
SYMBOL voltage -16 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.3
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 16
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL ADP7102-3.3 224 128 R0
SYMATTR InstName U1
TEXT 432 296 Left 2 !.tran 3m startup
* Z:\tmp\asc_dec_bjh7r6w2\120ebf7c52c8_Switch317Max_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N006 0 35 Rser=1m Cpar=100u
C3 Out 0 1m V=25 Irms=1.69 Rser=0.034 MTBF=2000 Lser=0 mfg="Panasonic" pn="ECA1EFQ102" type="Al electrolytic" ppPkg=1
R5 N008 0 100 tol=1 pwr=0.1
R4 N008 N001 15K tol=1 pwr=0.1
C2 N002 N008 100p
R3 Out N007 220 tol=1 pwr=0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1236 716
WIRE 496 240 192 240
WIRE 544 240 496 240
WIRE 656 240 656 176
WIRE 656 240 624 240
WIRE 704 240 656 240
WIRE 832 240 784 240
WIRE 144 320 144 304
WIRE 272 320 192 320
WIRE 544 320 400 320
WIRE 704 320 624 320
WIRE 752 320 704 320
WIRE 832 320 832 240
WIRE 832 320 752 320
WIRE 704 352 704 320
WIRE 0 416 0 240
WIRE 32 416 0 416
WIRE 144 416 144 400
WIRE 144 416 112 416
WIRE 192 416 192 320
WIRE 192 416 144 416
WIRE 336 432 336 368
WIRE 336 432 240 432
WIRE 544 432 336 432
WIRE 832 432 832 320
WIRE 832 432 624 432
WIRE 496 448 496 240
WIRE 0 480 0 416
WIRE 240 480 240 432
WIRE 336 480 336 432
WIRE 752 480 752 320
WIRE 304 512 288 512
WIRE 240 560 240 544
WIRE 288 560 288 512
WIRE 288 560 240 560
WIRE 336 560 336 544
WIRE 336 560 288 560
WIRE 496 560 496 528
WIRE 496 560 336 560
WIRE 544 560 496 560
WIRE 656 560 656 240
WIRE 656 560 608 560
WIRE 336 592 336 560
WIRE 656 592 656 560
WIRE 832 592 832 432
WIRE 0 640 0 560
WIRE 32 640 0 640
WIRE 32 656 32 640
WIRE 0 688 0 640
WIRE 336 688 336 672
WIRE 336 688 0 688
WIRE 656 688 656 656
WIRE 656 688 336 688
WIRE 752 688 752 560
WIRE 752 688 656 688
WIRE 832 688 832 656
WIRE 832 688 752 688
SYMBOL voltage 0 464 R0
WINDOW 3 -13 60 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 8 120 Left 0
SYMATTR Value 35
SYMATTR SpiceLine Rser=1m Cpar=100u
SYMATTR InstName V1
SYMBOL polcap 816 592 R0
WINDOW 0 -37 33 Left 0
WINDOW 3 -33 68 Left 0
SYMATTR InstName C3
SYMATTR Value 1m
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=25 Irms=1.69 Rser=0.034 MTBF=2000 Lser=0 mfg="Panasonic" pn="ECA1EFQ102" type="Al electrolytic" ppPkg=1
SYMBOL res 320 576 R0
WINDOW 0 37 45 Left 0
SYMATTR InstName R5
SYMATTR Value 100
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL res 512 544 R180
WINDOW 0 -31 62 Left 0
WINDOW 3 -44 33 Left 0
SYMATTR InstName R4
SYMATTR Value 15K
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL cap 608 544 R90
WINDOW 0 44 62 VBottom 0
WINDOW 3 16 -9 VTop 0
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL res 640 416 R90
WINDOW 0 16 109 VBottom 0
WINDOW 3 -11 11 VTop 0
SYMATTR InstName R3
SYMATTR Value 220
SYMATTR SpiceLine tol=1 pwr=0.1
FLAG 32 656 0
FLAG 704 352 Out
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1083-5.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 10) Rser=0.1
Rload OUT 0 10
C1 OUT 0 10
XU1 0 OUT IN LT1083-5 ;pnba GND)OUT)IN
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1083-5.asy)
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1344 896
WIRE 1904 896 1808 896
WIRE 2016 896 1904 896
WIRE 1344 912 1344 896
WIRE 2016 912 2016 896
WIRE 1904 928 1904 896
WIRE 1344 1008 1344 992
WIRE 1904 1008 1904 992
WIRE 2016 1008 2016 992
WIRE 1680 1024 1680 992
FLAG 2016 896 OUT
FLAG 2016 1008 0
FLAG 1344 1008 0
FLAG 1904 1008 0
FLAG 1344 896 IN
FLAG 1680 1024 0
SYMBOL VOLTAGE 1344 896 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMATTR SpiceLine Rser=0.1
SYMBOL RES 2000 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL cap 1888 928 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LT1083-5 1680 896 R0
SYMATTR InstName U1
TEXT 1920 1064 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL26001.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL26001.asy)
XU1 N002 MP_01 N001 MP_02 0 IN N003 IN ADPL26001 ;pnba FBX))SW))GND)Vin)INTVcc)EN/UVLO
C3 OUT 0 4.7 Rser=10m
R2 N002 0 34.8K
D1 N001 OUT BAT46WJ
C2 OUT N002 4.7p
V1 IN 0 12
C1 N003 0 1
R1 OUT N002 1Meg
L1 IN N001 6.8 Rser=.1
Rload OUT 0 355
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
.lib ADPL26001.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 48 -48 48
WIRE 128 48 32 48
WIRE 176 48 128 48
WIRE 288 48 256 48
WIRE 336 48 288 48
WIRE 448 48 400 48
WIRE 560 48 448 48
WIRE 672 48 560 48
WIRE 768 48 672 48
WIRE -48 64 -48 48
WIRE 672 64 672 48
WIRE 768 64 768 48
WIRE 448 80 448 48
WIRE 128 96 128 48
WIRE 288 96 288 48
WIRE 560 96 560 48
WIRE -48 160 -48 144
WIRE 672 160 672 128
WIRE 768 160 768 144
WIRE 32 208 32 48
WIRE 48 208 32 208
WIRE 448 208 448 160
WIRE 448 208 368 208
WIRE 560 208 560 160
WIRE 560 208 448 208
WIRE 448 224 448 208
WIRE 448 320 448 304
WIRE 128 336 128 320
WIRE 288 336 288 320
WIRE 128 416 128 400
SYMBOL ADPL26001 208 208 R0
SYMATTR InstName U1
SYMBOL cap 112 336 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -48 48 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 752 48 R0
SYMATTR InstName Rload
SYMATTR Value 355
SYMBOL res 432 64 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL cap 544 96 R0
SYMATTR InstName C2
SYMATTR Value 4.7p
SYMBOL res 432 208 R0
SYMATTR InstName R2
SYMATTR Value 34.8K
SYMBOL schottky 336 64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value BAT46WJ
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 656 64 R0
SYMATTR InstName C3
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=10m
SYMBOL ind 160 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMATTR SpiceLine Rser=.1
FLAG 128 416 0
FLAG 288 336 0
FLAG -48 160 0
FLAG 448 320 0
FLAG 768 160 0
FLAG 672 160 0
FLAG -48 48 IN
FLAG 768 48 OUT
TEXT 464 392 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3617.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3617.asy)
L1 N002 OUT .15 Rser=1m Rpar=5K
XU1 IN 0 N001 IN N002 MP_01 MP_02 MP_03 MP_04 MP_05 MP_06 MP_07 MP_08 MP_09 MP_10 MP_11 MP_12 IN IN MP_13 NC_14 OUT IN IN 0 LTC3617 ;pnba Rt)SGND)VTTR)PVin)SW)))))))))))))SVin)Run))Pgood)FB)Ith)VDDQin)PGND
C2 N001 0 .1
Rload OUT 0 .2
V1 IN 0 2.5
C1 OUT 0 47 x2 Rser=5m
.tran 2m startup
.lib LTC3617.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 -64 -80 -64
WIRE 128 -64 16 -64
WIRE 224 -64 128 -64
WIRE 336 -64 224 -64
WIRE -80 -48 -80 -64
WIRE 128 -48 128 -64
WIRE 224 -48 224 -64
WIRE 16 16 16 -64
WIRE 32 16 16 16
WIRE 368 16 320 16
WIRE -80 48 -80 32
WIRE 16 112 16 16
WIRE 32 112 16 112
WIRE 368 112 320 112
WIRE 480 112 448 112
WIRE 544 112 480 112
WIRE 640 112 544 112
WIRE 544 128 544 112
WIRE 640 128 640 112
WIRE 480 208 480 112
WIRE 480 208 320 208
WIRE 544 224 544 192
WIRE 640 224 640 208
WIRE 16 304 16 112
WIRE 32 304 16 304
WIRE 336 304 336 -64
WIRE 336 304 320 304
WIRE 128 384 128 368
WIRE 224 384 224 368
SYMBOL PowerProducts\\LTC3617 176 160 R0
SYMATTR InstName U1
SYMBOL cap 528 128 R0
WINDOW 123 31 69 Left 2
WINDOW 3 37 37 Left 2
SYMATTR Value2 x2
SYMATTR Value 47
SYMATTR InstName C1
SYMATTR SpiceLine Rser=5m
SYMBOL cap 368 32 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL ind 352 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value .15
SYMATTR SpiceLine Rser=1m Rpar=5K
SYMBOL voltage -80 -64 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 624 112 R0
SYMATTR InstName Rload
SYMATTR Value .2
FLAG -80 48 0
FLAG 128 384 0
FLAG 544 224 0
FLAG 640 224 0
FLAG 640 112 OUT
FLAG -80 -64 IN
FLAG 224 384 0
FLAG 432 16 0
TEXT 424 312 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP150-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
Rload OUT 0 18
XU1 IN 0 IN MP_01 OUT ADP150-x.x T=.6Meg ;pnba Vin)GND)EN))Vout
C1 OUT 0 1
.tran 500u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP150-1.8.asy)
.lib ADP150-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 880 1696 880
WIRE 1984 880 1824 880
WIRE 1696 896 1696 880
WIRE 1984 896 1984 880
WIRE 1696 992 1696 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
FLAG 2256 1024 OUT
FLAG 2256 1136 0
FLAG 1696 992 0
FLAG 1696 880 IN
FLAG 1984 1168 0
FLAG 2160 1136 0
SYMBOL VOLTAGE 1696 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 18
SYMBOL PowerProducts\\ADP150-1.8 1984 1024 R0
SYMATTR InstName U1
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1
TEXT 2144 1200 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1990feb4d35e_Fig18_34.asc
* Generated by LTspice 26.0.1 for Windows.
M1i N002 N001 0 0 N_50n l=50n w=500n
Vin N001 0 PULSE(1 0 0 0 0 50ns 100ns)
VDD VDD 0 1
M2i VDD N001 N002 VDD P_50n l=50n w=500n
Cload Vout 0 1p
M2 A A Vout 0 N_50n l=50n w=500n
M1 VDD VDD A 0 N_50n l=50n w=500n
C2 A N002 1p
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1u
.lib cmosedu_models.txt
* Plot Vout A
.ic v(vout)=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1472 680
WIRE 208 -368 208 -384
WIRE 208 -352 208 -368
WIRE 208 -240 208 -272
WIRE 208 -96 208 -176
WIRE 208 0 208 -16
WIRE 368 -176 208 -176
WIRE 368 -176 368 -224
WIRE 368 -96 368 -176
WIRE 400 -224 368 -224
WIRE 400 -96 368 -96
WIRE 448 -304 448 -352
WIRE 448 -192 448 -208
WIRE 448 -176 448 -192
WIRE 448 -32 448 -80
WIRE 624 -192 448 -192
WIRE 720 -192 688 -192
WIRE 752 -224 752 -320
WIRE 768 -224 752 -224
WIRE 816 -320 752 -320
WIRE 816 -320 816 -352
WIRE 816 -304 816 -320
WIRE 816 -192 720 -192
WIRE 816 -192 816 -208
WIRE 1008 -192 816 -192
WIRE 1008 -192 1008 -240
WIRE 1024 -192 1008 -192
WIRE 1104 -240 1008 -240
WIRE 1136 -192 1120 -192
WIRE 1168 -192 1136 -192
WIRE 1168 -80 1168 -128
FLAG 208 0 0
FLAG 1136 -192 Vout
FLAG 448 -128 0
FLAG 208 -240 0
FLAG 208 -368 VDD
FLAG 448 -256 VDD
FLAG 448 -32 0
FLAG 448 -352 VDD
FLAG 1168 -80 0
FLAG 1072 -192 0
FLAG 816 -256 0
FLAG 816 -352 VDD
FLAG 720 -192 A
SYMBOL nmos4 400 -176 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1i
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 208 -112 R0
WINDOW 0 -72 21 Left 0
WINDOW 3 31 116 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(1 0 0 0 0 50ns 100ns)
SYMBOL voltage 208 -368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL pmos4 400 -304 R0
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M2i
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=500n
SYMBOL cap 1152 -192 R0
WINDOW 0 40 24 Left 0
SYMATTR InstName Cload
SYMATTR Value 1p
SYMBOL nmos4 1024 -240 M90
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M2
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 768 -304 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL cap 688 -208 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C2
SYMATTR Value 1p
TEXT 704 -32 Left 0 !.tran 1u
TEXT 704 -8 Left 0 !.lib cmosedu_models.txt
TEXT 592 -424 Left 0 ;Plot Vout A
TEXT 808 -32 Left 0 !.ic v(vout)=0
* Z:\home\khalils\Downloads\files\data\raw_asc\685e9f0a725e_BC549C.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 N002 0 0 BC549C
V1 N001 0 0
I1 0 N002 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.lib BC549C.sub
.dc v1 0 12 0.1 i1 0 100uA 10uA
.meas ic find Ic(Q1) when v1=12V-Ic(Q1)*303
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1472 680
WIRE 704 112 464 112
WIRE 464 144 464 112
WIRE 704 144 704 112
WIRE 640 192 576 192
WIRE 576 208 576 192
WIRE 464 256 464 224
WIRE 704 272 704 240
WIRE 576 304 576 288
FLAG 464 256 0
FLAG 576 304 0
FLAG 704 272 0
SYMBOL npn 640 144 R0
SYMATTR InstName Q1
SYMATTR Value BC549C
SYMBOL voltage 464 128 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL current 576 288 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName I1
SYMATTR Value 0
TEXT 824 56 Left 2 !.lib BC549C.sub
TEXT 792 128 Left 2 !.dc v1 0 12 0.1 i1 0 100uA 10uA\n.meas ic find Ic(Q1) when v1=12V-Ic(Q1)*303
* Z:\home\khalils\Downloads\files\data\raw_asc\74625eed0f37_VTC1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 VDD 0 40
M1 UDS UGS 0 0 IRF530
V2 UGS 0
RD UDS VDD 8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 2 8
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1292 680
WIRE -720 -272 -720 -304
WIRE -720 -160 -720 -192
WIRE -608 -160 -720 -160
WIRE -720 -128 -720 -160
WIRE -928 -48 -944 -48
WIRE -768 -48 -928 -48
WIRE -944 0 -944 -48
WIRE -480 0 -480 -32
WIRE -944 128 -944 80
WIRE -720 128 -720 -32
WIRE -480 128 -480 80
SYMBOL voltage -480 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 36 82 Left 2
SYMATTR InstName V1
SYMATTR Value 40
SYMBOL nmos -768 -128 R0
SYMATTR InstName M1
SYMATTR Value IRF530
SYMBOL Misc\\EuropeanResistor -704 -176 R180
WINDOW 0 -49 65 Left 2
WINDOW 3 -51 33 Left 2
SYMATTR InstName RD
SYMATTR Value 8
SYMBOL voltage -944 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 53 Left 2
WINDOW 3 -97 181 Left 2
WINDOW 0 35 44 Left 2
SYMATTR Value ""
SYMATTR InstName V2
FLAG -480 128 0
FLAG -944 128 0
FLAG -720 128 0
FLAG -480 -32 VDD
FLAG -720 -304 VDD
FLAG -928 -48 UGS
FLAG -608 -160 UDS
TEXT -960 168 Left 2 !.dc V2 2 8
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4120-1C.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4120-1C.asy)
V2 N002 0 15
C1 GATE 0 2n
XU1 N001 N003 0 0 N004 N002 ADuM4120xx Glitch=0 Vrun2=11.2 ;pnba Vdd1)Vin)GND1)GND2)Vout)Vdd2
R1 GATE N004 5
V3 N003 0 PULSE(0 5 0 2n 2n 998n 2u)
V1 N001 0 5
.tran 10u
.lib ADuM4120xx.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 16 16 16
WIRE 512 16 320 16
WIRE 16 32 16 16
WIRE 512 32 512 16
WIRE 160 48 160 16
WIRE 320 48 320 16
WIRE 16 128 16 112
WIRE 512 128 512 112
WIRE -112 160 -144 160
WIRE 112 160 -32 160
WIRE 400 160 368 160
WIRE 512 160 480 160
WIRE 544 160 512 160
WIRE 512 176 512 160
WIRE 160 288 160 272
WIRE 320 288 320 272
SYMBOL ADuM4120-1C 240 160 R0
SYMATTR InstName U1
SYMBOL voltage 512 16 R0
WINDOW 0 29 30 Left 2
WINDOW 3 31 84 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL res 496 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL voltage -16 160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 2n 2n 998n 2u)
SYMBOL cap 496 176 R0
WINDOW 0 35 16 Left 2
WINDOW 3 36 51 Left 2
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL voltage 16 16 R0
WINDOW 0 25 25 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 160 288 0
FLAG 320 288 0
FLAG 512 240 0
FLAG 544 160 GATE
FLAG 512 128 0
FLAG 16 128 0
FLAG -144 160 0
TEXT 400 280 Left 2 !.tran 10u