Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1be959ee3a0c_fra_eg1.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac oct 4 100 10Meg
* This example shows the basic principle of extracting\nthe small signal AC characteristics from an \nLTspice Frequency Response Analysis (FRA) simulation.
* To use this technique in your own simulations,\n include an fra device and the .fra directive.\nThe fra device controls the frequency analysis parameters.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
@1 A B delay=100u fstart=100 fend=10Meg oct=4 fcoarse=10k nmax=50k 3 500k 1 pp0=100m pp1=10m f0=50k f1=500k tavgmin=100u tsettle=2u acmag=1
V2 -V 0 -5
R2 N001 0 1K
C2 N001 0 100p
C1 A 0 50n
XU1 0 N001 +V -V A level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
R1 B N001 10K
.fra
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4156 1252
WIRE 1504 544 1472 544
WIRE 1600 544 1584 544
WIRE 1632 544 1600 544
WIRE 1744 544 1712 544
WIRE 1760 544 1744 544
WIRE 1840 544 1824 544
WIRE 1856 544 1840 544
WIRE 1936 576 1936 560
WIRE 2032 576 2032 560
WIRE 1600 640 1600 544
WIRE 1760 640 1600 640
WIRE 1600 656 1600 640
WIRE 1856 656 1856 544
WIRE 1856 656 1824 656
WIRE 1760 672 1744 672
WIRE 1936 672 1936 656
WIRE 2032 672 2032 656
WIRE 1600 736 1600 720
WIRE 1856 736 1856 720
LINE Normal 1680 672 1680 672 2
LINE Normal 1680 672 1680 672 2
LINE Normal 2128 752 2128 752 2
LINE Normal 2128 752 2128 752 2
LINE Normal 2128 752 2128 752 2
LINE Normal 2128 752 2128 752 2
LINE Normal 1712 464 1760 512 2
LINE Normal 1648 656 1648 656 2
SYMBOL res 1728 528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 1936 560 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 2032 560 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL cap 1584 656 R0
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL res 1600 528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL Opamps\\UniversalOpamp2 1792 656 R0
SYMATTR InstName U1
SYMBOL cap 1840 656 R0
SYMATTR InstName C1
SYMATTR Value 50n
SYMBOL fra 1760 544 R90
WINDOW 0 -19 -26 VBottom 2
WINDOW 40 37 -28 VBottom 2
SYMATTR InstName @1
SYMATTR SpiceLine delay=100u fstart=100 fend=10Meg oct=4 fcoarse=10k nmax=50k 3 500k 1 pp0=100m pp1=10m f0=50k f1=500k tavgmin=100u tsettle=2u
SYMATTR SpiceLine2 acmag=1
FLAG 1936 672 0
FLAG 2032 672 0
FLAG 1936 560 +V
FLAG 1792 624 +V
FLAG 2032 560 -V
FLAG 1792 688 -V
FLAG 1744 672 0
FLAG 1472 544 0
FLAG 1856 736 0
FLAG 1600 736 0
FLAG 1840 544 A
FLAG 1744 544 B
TEXT 2200 560 Left 2 !.fra
TEXT 2112 592 Left 2 ;.ac oct 4 100 10Meg
TEXT 1888 288 Center 2 ;This example shows the basic principle of extracting\nthe small signal AC characteristics from an \nLTspice Frequency Response Analysis (FRA) simulation.
TEXT 1576 392 Left 2 ;To use this technique in your own simulations,\n include an fra device and the .fra directive.\nThe fra device controls the frequency analysis parameters.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3125.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3125.asy)
C1 OUT 0 10 Rser=28m
R3 N003 0 536K
Rload OUT 0 100
R1 N004 0 44.2K
R2 OUT N003 1.24Meg
V1 IN 0 3.3
L1 N001 N002 2.2
XU1 0 N003 N004 IN N001 IN OUT N002 LTC3125 ;pnba GND)FB)PROG)Vin)CS)_SHDN)Vout)SW
.tran 500u startup
.lib LTC3125.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1340 680
WIRE 192 16 160 16
WIRE 288 16 272 16
WIRE 160 64 160 16
WIRE 288 64 288 16
WIRE 48 112 -48 112
WIRE 64 112 48 112
WIRE 464 112 384 112
WIRE 608 112 464 112
WIRE 704 112 608 112
WIRE -48 128 -48 112
WIRE 464 128 464 112
WIRE 608 128 608 112
WIRE 704 128 704 112
WIRE -48 224 -48 208
WIRE 48 224 48 112
WIRE 64 224 48 224
WIRE 464 224 464 208
WIRE 464 224 384 224
WIRE 608 224 608 192
WIRE 704 224 704 208
WIRE 464 240 464 224
WIRE -32 336 -48 336
WIRE 64 336 48 336
WIRE 400 336 384 336
WIRE 464 336 464 320
SYMBOL voltage -48 112 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL PowerProducts\\LTC3125 224 224 R0
SYMATTR InstName U1
SYMBOL ind 176 32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL res 448 224 R0
WINDOW 3 27 78 Left 2
SYMATTR Value 536K
SYMATTR InstName R3
SYMBOL res 448 112 R0
WINDOW 3 23 87 Left 2
SYMATTR Value 1.24Meg
SYMATTR InstName R2
SYMBOL res 64 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 44.2K
SYMBOL res 688 112 R0
WINDOW 3 23 87 Left 2
SYMATTR Value 100
SYMATTR InstName Rload
SYMBOL cap 592 128 R0
WINDOW 123 24 92 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=28m
FLAG -48 224 0
FLAG -48 336 0
FLAG 464 336 0
FLAG 400 336 0
FLAG 608 224 0
FLAG 704 224 0
FLAG -48 112 IN
FLAG 704 112 OUT
TEXT 584 352 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3cd0e81b719b_rectificador_monofasico_de_onda_completa_1N5408.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N002 N003 SINE(0 155.56 60 0 0) AC 155 0
D2 N003 N001 1N5408
D1 N002 N001 1N5408
R1 N001 0 1000R
D3 0 N002 1N5408
D4 0 N003 1N5408
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 100m 0 0.1m
.model 1N5408 D (IS=1.41E-6 RS=0.0339 N=1.9011 BV=1000 IBV=5E-6 CJO=4.5E-11 M=0.4061 VJ=0.5 FC=0.5 TT=4.761E-6 EG=1.11 XTI=3)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1496 680
WIRE 384 -16 256 -16
WIRE 544 -16 384 -16
WIRE 112 32 -176 32
WIRE 256 64 256 -16
WIRE 384 64 384 -16
WIRE 544 112 544 -16
WIRE -176 144 -176 32
WIRE 112 160 112 32
WIRE 256 160 256 128
WIRE 256 160 112 160
WIRE 384 176 384 128
WIRE 384 176 144 176
WIRE 384 192 384 176
WIRE 256 208 256 160
WIRE -176 224 -176 208
WIRE -176 336 -176 224
WIRE 144 336 144 176
WIRE 144 336 -176 336
WIRE 256 336 256 272
WIRE 384 336 384 256
WIRE 384 336 256 336
WIRE 544 336 544 192
WIRE 544 336 384 336
WIRE 384 400 384 336
FLAG 384 400 0
SYMBOL voltage -176 128 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 155 0
SYMATTR InstName V1
SYMATTR Value SINE(0 155.56 60 0 0)
SYMBOL diode 400 128 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N5408
SYMBOL diode 272 128 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5408
SYMBOL res 528 96 R0
SYMATTR InstName R1
SYMATTR Value 1000R
SYMBOL diode 272 272 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value 1N5408
SYMBOL diode 400 256 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMATTR Value 1N5408
TEXT -176 344 Left 2 !.tran 0 100m 0 0.1m
TEXT -176 368 Left 2 !.model 1N5408 D (IS=1.41E-6 RS=0.0339 N=1.9011 BV=1000 IBV=5E-6 CJO=4.5E-11 M=0.4061 VJ=0.5 FC=0.5 TT=4.761E-6 EG=1.11 XTI=3)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1117-2.85.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1117-2.85.asy)
I1 N002 0 pulse(.1 .6 10u 1u 1u 50u 100u)
C1 N002 0 10 V=33 Irms=0 Rser=0.3 Lser=0 mfg="KEMET" pn="T495D106M035AS" type="Tantalum"
XU1 0 N002 N001 LT1117-2.85 ;pnba GND)OUT)IN
V1 N001 0 5
.tran 300u
.lib LT1117.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1108 680
WIRE 96 176 -16 176
WIRE 448 176 352 176
WIRE 560 176 448 176
WIRE -16 192 -16 176
WIRE 448 192 448 176
WIRE 560 192 560 176
WIRE -16 288 -16 272
WIRE 448 288 448 256
WIRE 560 288 560 272
WIRE 224 304 224 272
SYMBOL PowerProducts\\LT1117-2.85 224 176 R0
SYMATTR InstName U1
SYMBOL polcap 432 192 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 10
SYMATTR InstName C1
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=33 Irms=0 Rser=0.3 Lser=0 mfg="KEMET" pn="T495D106M035AS" type="Tantalum"
SYMBOL current 560 192 R0
SYMATTR InstName I1
SYMATTR Value pulse(.1 .6 10u 1u 1u 50u 100u)
SYMBOL voltage -16 176 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -16 288 0
FLAG 448 288 0
FLAG 560 288 0
FLAG 224 304 0
TEXT 424 344 Left 2 !.tran 300u
* Z:\home\khalils\Downloads\files\data\raw_asc\a5ca29895578_Q42.asc
* Generated by LTspice 26.0.1 for Windows.
;.dc Vgs 0 1.8 1m
Vgs N002 0 {Vgs}
M1 0 N002 N001 N001 pch_tt l=180n w=270n
Vds N001 0 1.8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.step param Vgs list 0.4 0.5 0.6 0.7 0.8 0.9
.dc Vds 0 1.8 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 688 32 416 32
WIRE 416 112 416 32
WIRE 368 128 160 128
WIRE 688 128 688 32
WIRE 160 240 160 128
WIRE 160 448 160 320
WIRE 416 448 416 208
WIRE 416 448 160 448
WIRE 688 448 688 208
WIRE 688 448 416 448
WIRE 416 480 416 448
SYMBOL voltage 160 224 R0
SYMATTR InstName Vgs
SYMATTR Value {Vgs}
SYMBOL pmos 368 208 M180
SYMATTR InstName M1
SYMATTR Value pch_tt
SYMATTR Value2 l=180n w=270n
SYMBOL voltage 688 112 R0
SYMATTR InstName Vds
SYMATTR Value 1.8
FLAG 416 480 0
TEXT -136 176 Left 2 !.include TSMC180.lib
TEXT -352 224 Left 2 !.step param Vgs list 0.4 0.5 0.6 0.7 0.8 0.9
TEXT -120 264 Left 2 !.dc Vds 0 1.8 1m
TEXT -112 304 Left 2 !;.dc Vgs 0 1.8 1m
* Z:\tmp\asc_dec_bjh7r6w2\0975334c5376_buzzer_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N002 +5V N004 0 2N3904
R2 +12V N002 {R2}
Q2 N003 N002 +12V 0 2N3906
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -224 -32 -240 -32
WIRE -160 -240 -160 -272
WIRE -160 -112 -160 -160
WIRE -160 -80 -160 -112
WIRE -160 48 -160 16
WIRE -160 160 -160 128
WIRE -80 -448 -80 -480
WIRE -80 -336 -80 -368
WIRE -48 -112 -160 -112
WIRE 16 -160 16 -224
WIRE 16 -48 16 -64
WIRE 16 96 16 32
SYMBOL npn -224 -80 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res -176 -256 R0
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL pnp -48 -64 M180
SYMATTR InstName Q2
SYMATTR Value 2N3906
FLAG 16 -224 +12V
FLAG -160 -272 +12V
FLAG -80 -336 0
FLAG 16 96 0
FLAG -240 -32 +5V
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6658.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6658.asy)
C1 N001 0 1
C3 N002 0 .1
I1 OUT1 0 PULSE(10m 150m 100u 5n 5n 200u 1)
C4 OUT2 0 10
V3 IN 0 5
C2 OUT1 0 10
XU1 IN IN IN IN N001 OUT1 OUT1 OUT2 OUT2 0 N002 LT6658-2.5 ;pnba Vin)Vin1)Vin2)_OD)Bypass)Vout1_F)Vout1_S)Vout2_F)Vout2_S)Gnd)NR
.tran 500u
.lib LT6658.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1464 1048
WIRE 16 -32 -64 -32
WIRE 128 -32 16 -32
WIRE 224 -32 128 -32
WIRE 320 -32 224 -32
WIRE -64 -16 -64 -32
WIRE 128 0 128 -32
WIRE 224 0 224 -32
WIRE 320 0 320 -32
WIRE 448 64 416 64
WIRE 528 64 448 64
WIRE -64 80 -64 64
WIRE 528 80 528 64
WIRE 448 144 448 64
WIRE 448 144 416 144
WIRE 528 160 528 144
WIRE 16 192 16 -32
WIRE 48 192 16 192
WIRE 448 224 416 224
WIRE 528 224 448 224
WIRE 528 240 528 224
WIRE 448 304 448 224
WIRE 448 304 416 304
WIRE 448 320 448 304
WIRE 528 336 528 320
WIRE 224 400 224 384
WIRE 320 400 320 384
WIRE 448 400 448 384
WIRE 128 416 128 384
WIRE 224 480 224 464
WIRE 320 480 320 464
SYMBOL cap 208 400 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 512 80 R0
WINDOW 39 24 84 Left 2
WINDOW 40 24 112 Left 2
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL cap 432 320 R0
WINDOW 39 24 84 Left 2
WINDOW 40 24 112 Left 2
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL cap 304 400 R0
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL current 528 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value PULSE(10m 150m 100u 5n 5n 200u 1)
SYMBOL voltage -64 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL LT6658 224 192 R0
SYMATTR InstName U1
FLAG 128 416 0
FLAG 224 480 0
FLAG 448 400 0
FLAG -64 80 0
FLAG 528 336 0
FLAG 320 480 0
FLAG 528 160 0
FLAG -64 -32 IN
FLAG 528 64 OUT2
FLAG 528 224 OUT1
TEXT 648 496 Left 2 !.tran 500u
* Z:\tmp\asc_dec_bjh7r6w2\0910a6a4f16b_Draft3_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N004 0 SINE(0 1 1k)
R1 0 N002 2.2k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 988 680
WIRE -112 -128 -192 -128
WIRE -192 -64 -192 -128
WIRE -112 16 -112 -128
WIRE 208 16 64 16
WIRE -272 128 -272 112
WIRE -112 128 -112 96
WIRE -16 128 -16 16
WIRE -16 128 -112 128
WIRE 0 128 -16 128
WIRE 208 144 64 144
WIRE 0 160 -112 160
WIRE -272 192 -272 128
WIRE -272 304 -272 272
WIRE -112 336 -112 160
WIRE -272 352 -272 304
WIRE -112 464 -112 416
WIRE -272 528 -272 432
SYMBOL voltage -112 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1k)
SYMBOL res -128 0 R0
SYMATTR InstName R1
SYMATTR Value 2.2k
FLAG -272 304 0
FLAG -272 128 Vcc
FLAG 32 112 Vcc
FLAG 32 176 -Vcc
FLAG -112 464 0
FLAG -192 -64 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1751.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1751.asy)
R1 OUT N001 100K
C2 N002 0 .001
R2 N001 0 31K
XU1 N001 OUT IN 0 N004 N003 IN N002 LTC1751 ;pnba FB)Vout)Vin)GND)C-)C+)_SHDN)SS
C3 OUT 0 10
V1 IN 0 3
C1 N003 N004 1
Rload OUT 0 50
.tran 1m startup
.lib LTC1751.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 680
WIRE 96 160 -32 160
WIRE 128 160 96 160
WIRE 496 160 384 160
WIRE 608 160 496 160
WIRE 704 160 608 160
WIRE -32 176 -32 160
WIRE 608 176 608 160
WIRE 704 176 704 160
WIRE 96 240 96 160
WIRE 128 240 96 240
WIRE 496 240 384 240
WIRE 496 256 496 240
WIRE -32 272 -32 256
WIRE 608 272 608 240
WIRE 704 272 704 256
WIRE 48 320 32 320
WIRE 128 320 112 320
WIRE 416 320 384 320
WIRE 496 352 496 336
WIRE 128 400 96 400
WIRE 416 400 416 384
WIRE 416 400 384 400
SYMBOL cap 400 320 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 480 144 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 480 240 R0
SYMATTR InstName R2
SYMATTR Value 31K
SYMBOL cap 592 176 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL PowerProducts\\LTC1751 256 288 R0
SYMATTR InstName U1
SYMBOL voltage -32 160 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res 688 160 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL cap 112 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .001
FLAG 496 352 0
FLAG -32 272 0
FLAG 96 400 0
FLAG 32 320 0
FLAG 608 272 0
FLAG 704 272 0
FLAG 704 160 OUT
FLAG -32 160 IN
TEXT 472 400 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\d74dbcc9072f_LT1224.asc
* Generated by LTspice 26.0.1 for Windows.
* 1MHz, 2nd Order Butterworth Filter
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1224.asy)
V2 -V 0 -15
V1 +V 0 15
R2 N002 N001 825
R3 N001 IN 619
R1 OUT N001 619
C2 OUT N002 100p
V3 IN 0 ac 1
C3 0 N001 500p
XU1 0 N002 +V -V OUT LT1224 ;pnba In+)In-)V+)V-)OUT
.ac oct 10 1K 100Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -208 48 -208 32
WIRE -112 48 -112 32
WIRE 128 64 96 64
WIRE 352 64 208 64
WIRE 256 112 224 112
WIRE 352 112 352 64
WIRE 352 112 320 112
WIRE -208 144 -208 128
WIRE -112 144 -112 128
WIRE 288 208 288 192
WIRE 0 224 -96 224
WIRE 96 224 96 64
WIRE 96 224 80 224
WIRE 128 224 96 224
WIRE 224 224 224 112
WIRE 224 224 208 224
WIRE 256 224 224 224
WIRE -96 240 -96 224
WIRE 352 240 352 112
WIRE 352 240 320 240
WIRE 384 240 352 240
WIRE 96 256 96 224
WIRE 256 256 224 256
WIRE 288 288 288 272
WIRE -96 336 -96 320
WIRE 96 336 96 320
SYMBOL cap 80 320 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value 500p
SYMBOL voltage -112 32 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 224 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 825
SYMBOL voltage -96 224 R0
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL voltage -208 32 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL opamps\\LT1224 288 176 R0
SYMATTR InstName U1
SYMBOL res 96 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 619
SYMBOL res 224 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 619
SYMBOL cap 320 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 100p
FLAG -112 144 0
FLAG 288 192 +V
FLAG -112 32 +V
FLAG 288 288 -V
FLAG -208 144 0
FLAG -208 32 -V
FLAG 96 336 0
FLAG 224 256 0
FLAG -96 336 0
FLAG 384 240 OUT
FLAG -96 224 IN
TEXT 224 368 Left 2 !.ac oct 10 1K 100Meg
TEXT 224 -8 Bottom 2 ;1MHz, 2nd Order Butterworth Filter
* Z:\home\khalils\Downloads\files\data\raw_asc\13ddae750e5d_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
+ 10,33k, 11,47k, 12,68k, 13,100k, 14,150k, 15,220k, 16,330k, 17,470k, 18,680k, 19,1meg)
+ 10,33k, 11,47k, 12,68k, 13,100k, 14,150k, 15,220k, 16,330k, 17,470k, 18,680k, 19,1meg)
+ 10,33k, 11,47k, 12,68k, 13,100k, 14,150k, 15,220k, 16,330k, 17,470k, 18,680k, 19,1meg)
+ 10,33k, 11,47k, 12,68k, 13,100k, 14,150k, 15,220k, 16,330k, 17,470k, 18,680k, 19,1meg)
R2 N002 N003 {RB}
V1 N001 0 9
R3 N003 N004 {RC}
R1 N001 N002 {RA}
R4 N004 0 {RD}
.param RA=table(ram4 , 1,1k, 2,1.5k, 3,2.2k, 4,3.3k, 5,4.7k, 6,6.8k, 7,10k, 8,15k, 9,22k,
.param ram1=int(mc(6.5,1)+7)
.param ram2=int(mc(6.5,1)+7)
.param ram3=int(mc(6.2,1)+7)
.param ram4=int(mc(6.5,1)+7)
.param RB=table(ram3 , 1,1k, 2,1.5k, 3,2.2k, 4,3.3k, 5,4.7k, 6,6.8k, 7,10k, 8,15k, 9,22k,
.param RC=table(ram2 , 1,1k, 2,1.5k, 3,2.2k, 4,3.3k, 5,4.7k, 6,6.8k, 7,10k, 8,15k, 9,22k,
.param RD=table(ram1 , 1,1k, 2,1.5k, 3,2.2k, 4,3.3k, 5,4.7k, 6,6.8k, 7,10k, 8,15k, 9,22k,
.op
.meas OP RA_val PARAM RA
.step param iterations 0 100 1
.meas OP RB_val PARAM RB
.meas OP RC_val PARAM RC
.meas OP RD_val PARAM RD
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 680
WIRE -1200 -32 -1424 -32
WIRE -1424 -16 -1424 -32
WIRE -1200 112 -1200 48
WIRE -1200 272 -1200 192
WIRE -1200 400 -1200 352
SYMBOL res -1216 384 R0
SYMATTR InstName R4
SYMATTR Value {RD}
SYMBOL voltage -1424 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL res -1216 256 R0
SYMATTR InstName R3
SYMATTR Value {RC}
SYMBOL res -1216 -48 R0
SYMATTR InstName R1
SYMATTR Value {RA}
SYMBOL res -1216 96 R0
SYMATTR InstName R2
SYMATTR Value {RB}
FLAG -1200 480 0
FLAG -1424 64 0
TEXT -824 64 Left 2 !.param RA=table(ram4 ,  1,1k,  2,1.5k,  3,2.2k,  4,3.3k,  5,4.7k,  6,6.8k,  7,10k,  8,15k,  9,22k,  \n+  10,33k,  11,47k,  12,68k,  13,100k, 14,150k,  15,220k,  16,330k,  17,470k,  18,680k,  19,1meg)
TEXT 688 248 Left 2 !.param ram1=int(mc(6.5,1)+7)
TEXT 688 192 Left 2 !.param ram2=int(mc(6.5,1)+7)
TEXT 688 136 Left 2 !.param ram3=int(mc(6.2,1)+7)
TEXT 688 88 Left 2 !.param ram4=int(mc(6.5,1)+7)
TEXT -824 120 Left 2 !.param RB=table(ram3 ,  1,1k,  2,1.5k,  3,2.2k,  4,3.3k,  5,4.7k,  6,6.8k,  7,10k,  8,15k,  9,22k,  \n+  10,33k,  11,47k,  12,68k,  13,100k, 14,150k,  15,220k,  16,330k,  17,470k,  18,680k,  19,1meg)
TEXT -824 184 Left 2 !.param RC=table(ram2 ,  1,1k,  2,1.5k,  3,2.2k,  4,3.3k,  5,4.7k,  6,6.8k,  7,10k,  8,15k,  9,22k,  \n+  10,33k,  11,47k,  12,68k,  13,100k, 14,150k,  15,220k,  16,330k,  17,470k,  18,680k,  19,1meg)
TEXT -824 240 Left 2 !.param RD=table(ram1 ,  1,1k,  2,1.5k,  3,2.2k,  4,3.3k,  5,4.7k,  6,6.8k,  7,10k,  8,15k,  9,22k,  \n+  10,33k,  11,47k,  12,68k,  13,100k, 14,150k,  15,220k,  16,330k,  17,470k,  18,680k,  19,1meg)
TEXT -488 -216 Left 2 !.op
TEXT -840 440 Left 2 !.meas OP RA_val PARAM RA
TEXT -704 -72 Left 2 !.step param iterations 0 100 1
TEXT -496 440 Left 2 !.meas OP RB_val PARAM RB
TEXT -160 440 Left 2 !.meas OP RC_val PARAM RC
TEXT 176 440 Left 2 !.meas OP RD_val PARAM RD
* Z:\home\khalils\Downloads\files\data\raw_asc\172170e1cd68_LT1764.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1764.asy)
C1 OUT 0 10 Rser=100m
XU1 IN IN 0 OUT OUT LT1764 ;pnba _SHDN)IN)GND)OUT)ADJ
Rload OUT 0 500
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT1764.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -224 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 544 48 384 48
WIRE -224 64 -224 48
WIRE 384 64 384 48
WIRE 544 64 544 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -224 160 -224 144
WIRE 384 160 384 128
WIRE 544 160 544 144
WIRE 160 240 160 208
SYMBOL res 528 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT1764 160 96 R0
SYMATTR InstName U1
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 368 64 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 Rser=100m
SYMATTR InstName C1
SYMATTR Value 10u
FLAG -224 160 0
FLAG 384 160 0
FLAG 544 160 0
FLAG 160 240 0
FLAG 544 48 OUT
FLAG -224 48 IN
TEXT 352 232 Left 2 !.tran 1
* Z:\tmp\asc_dec_bjh7r6w2\10209fd48f64_Draft3_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
C1 b in {mc(0.1uF,tol2)}
RL out 0 10k
V1 Vcc 0 12V
Q1 c b e 0 2N3904
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1412 680
WIRE 560 48 560 0
WIRE 880 48 880 0
WIRE 880 160 880 128
WIRE 944 160 880 160
WIRE 1088 160 944 160
WIRE 1248 160 1152 160
WIRE 1344 160 1248 160
WIRE 880 192 880 160
WIRE 1344 192 1344 160
WIRE 320 240 256 240
WIRE 368 240 320 240
WIRE 560 240 560 128
WIRE 560 240 432 240
WIRE 768 240 560 240
WIRE 816 240 768 240
WIRE 1344 304 1344 272
WIRE 880 320 880 288
WIRE 944 320 880 320
WIRE 1136 320 944 320
WIRE 560 352 560 240
WIRE 880 352 880 320
WIRE 1136 368 1136 320
SYMBOL cap 432 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {mc(0.1uF,tol2)}
SYMBOL res 1328 176 R0
SYMATTR InstName RL
SYMATTR Value 10k
SYMBOL voltage 80 32 R0
SYMATTR InstName V1
SYMATTR Value 12V
SYMBOL npn 816 192 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
FLAG 80 128 0
FLAG 80 48 Vcc
FLAG 320 240 in
FLAG 880 0 Vcc
FLAG 1344 304 0
FLAG 944 160 c
FLAG 1248 160 out
FLAG 944 320 e
FLAG 768 240 b
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1304-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1304-3.3.asy)
C2 OUT 0 100 Rser=0.02
V1 IN 0 2
D1 N001 OUT MBRS140
L1 IN N001 22 Rser=0.02 Rpar=5000
Rload OUT 0 20
XU1 N003 N004 IN N001 0 N002 IN OUT LT1304 top=590K bot=355K ;pnba LBI)LBO)Vin)SW)GND)Ilim)_SHDN)Sense
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib LT1304.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1668 944
WIRE 544 448 448 448
WIRE 704 448 544 448
WIRE 752 448 704 448
WIRE 880 448 832 448
WIRE 928 448 880 448
WIRE 1056 448 992 448
WIRE 1136 448 1056 448
WIRE 448 464 448 448
WIRE 1136 464 1136 448
WIRE 704 512 704 448
WIRE 448 560 448 544
WIRE 1136 560 1136 544
WIRE 544 576 544 448
WIRE 560 576 544 576
WIRE 880 576 880 448
WIRE 880 576 848 576
WIRE 560 656 544 656
WIRE 1056 656 1056 448
WIRE 1056 656 848 656
WIRE 1056 672 1056 656
WIRE 560 736 544 736
WIRE 864 736 848 736
WIRE 1056 752 1056 736
WIRE 704 816 704 800
SYMBOL PowerProducts\\LT1304-3.3 704 656 R0
SYMATTR InstName U1
SYMBOL res 1120 448 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL VOLTAGE 448 448 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL POLCAP 1040 672 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL SCHOTTKY 928 464 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL IND 736 464 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 22
SYMATTR SpiceLine Rser=0.02 Rpar=5000
FLAG 704 816 0
FLAG 1136 560 0
FLAG 1056 752 0
FLAG 448 560 0
FLAG 1136 448 OUT
FLAG 448 448 IN
TEXT 928 808 Left 2 !.tran 1m startup