Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\00aa80ba0454_overshoot_simulation_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
D2 NC_01 N002 LXK2-PW14
R3 N003 N002 0.1
R1 NC_02 N001 4.7
C2 N004 N002 100p
R4 N006 N005 220
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 -448 192 -448
WIRE 368 -416 368 -448
WIRE 192 -288 192 -448
WIRE 192 -176 192 -208
WIRE 368 -96 368 -144
WIRE 592 -96 368 -96
WIRE 368 16 368 -16
WIRE 368 112 368 96
WIRE 416 112 368 112
WIRE 592 112 416 112
WIRE 656 112 656 -96
WIRE 368 144 368 112
WIRE 192 224 160 224
WIRE 320 224 272 224
WIRE 368 352 368 240
SYMBOL LED 352 -208 R0
SYMATTR InstName D2
SYMATTR Value LXK2-PW14
SYMBOL res 384 0 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 0.1
SYMBOL res 384 -320 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 4.7
SYMBOL cap 656 -112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL res 288 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 220
FLAG 368 352 0
FLAG 192 -176 0
FLAG 416 112 Vout
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1116.asc
* Generated by LTspice 26.0.1 for Windows.
* Single Supply Crystal Oscillator 10MHz to 15MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1116.asy)
V1 +V 0 5
XU1 +V N003 N001 0 0 0 N002 OUT LT1116 ;pnba V+)In+)In-)V-)LATCH)GND)OUT+)OUT-
R2 +V N003 1K
R3 N003 0 1K
R1 N002 N001 2K
C1 N001 0 24p
CY1 N002 N003 .32p Rser=45 Lser=.78m Cpar=18p
.tran 50u startup
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -240 80 -256 80
WIRE -160 80 -176 80
WIRE -112 80 -160 80
WIRE 32 80 -32 80
WIRE -304 160 -304 144
WIRE -432 192 -432 176
WIRE -96 192 -96 160
WIRE -160 224 -160 80
WIRE -128 224 -160 224
WIRE 32 224 32 80
WIRE 32 224 -48 224
WIRE -304 256 -304 240
WIRE -192 256 -304 256
WIRE -128 256 -192 256
WIRE 64 256 -48 256
WIRE -304 272 -304 256
WIRE -432 288 -432 272
WIRE -112 304 -112 288
WIRE -96 304 -96 288
WIRE -96 304 -112 304
WIRE -80 304 -80 288
WIRE -80 304 -96 304
WIRE -96 320 -96 304
WIRE -192 352 -192 256
WIRE -64 352 -192 352
WIRE 32 352 32 224
WIRE 32 352 0 352
WIRE -304 368 -304 352
SYMBOL Comparators\\LT1116 -96 176 R0
SYMATTR InstName U1
SYMBOL voltage -432 176 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL misc\\xtal 0 336 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 Invisible 2
SYMATTR InstName Y1
SYMATTR Value .32p
SYMATTR SpiceLine Rser=45 Lser=.78m Cpar=18p
SYMBOL res -16 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL cap -176 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 24p
SYMBOL res -320 144 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res -320 256 R0
SYMATTR InstName R3
SYMATTR Value 1K
FLAG -432 288 0
FLAG -432 176 +V
FLAG -96 160 +V
FLAG -96 320 0
FLAG -256 80 0
FLAG -304 368 0
FLAG -304 144 +V
FLAG 64 256 OUT
TEXT 64 376 Left 2 !.tran 50u startup
TEXT -120 24 Bottom 2 ;Single Supply Crystal Oscillator 10MHz to 15MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\13e507bb4a9f_COMB00op.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 C B D 0 TBJ
Rs S 0 {Rs}
Rb cc B {Rb}
Rc cc C {Rc}
Vcc cc 0 {Vcc}
J1 D 0 S JFET
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.op
.model JFET njf(Beta=5m Vto=-1)
.param Vcc=20 Rb=680k Rc=220 Rs=120
.model TBJ NPN(IS=10F BF=150)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1608 1076
WIRE 1024 -144 864 -144
WIRE 1184 -144 1024 -144
WIRE 864 -80 864 -144
WIRE 1024 -64 1024 -144
WIRE 1184 -64 1184 -144
WIRE 864 48 864 0
WIRE 1184 48 1184 16
WIRE 1184 80 1184 48
WIRE 1024 128 1024 16
WIRE 1120 128 1024 128
WIRE 1184 224 1184 176
WIRE 1184 240 1184 224
WIRE 1072 304 1024 304
WIRE 1136 304 1072 304
WIRE 1184 352 1184 336
WIRE 1184 368 1184 352
WIRE 1024 464 1024 304
WIRE 1184 464 1184 448
WIRE 1184 464 1024 464
WIRE 1184 496 1184 464
SYMBOL npn 1120 80 R0
SYMATTR InstName Q1
SYMATTR Value TBJ
SYMBOL res 1168 352 R0
SYMATTR InstName Rs
SYMATTR Value {Rs}
SYMBOL voltage 864 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vcc
SYMATTR Value {Vcc}
SYMBOL res 1168 -80 R0
SYMATTR InstName Rc
SYMATTR Value {Rc}
SYMBOL res 1008 -80 R0
SYMATTR InstName Rb
SYMATTR Value {Rb}
SYMBOL njf 1136 240 R0
SYMATTR InstName J1
SYMATTR Value JFET
FLAG 1184 496 0
FLAG 864 48 0
FLAG 1024 -144 cc
FLAG 1024 128 B
FLAG 1184 48 C
FLAG 1072 304 G
FLAG 1184 352 S
FLAG 1184 224 D
TEXT 864 88 Left 2 !.op
TEXT 656 224 Left 2 !.model JFET njf(Beta=5m Vto=-1)
TEXT 656 256 Left 2 !.param Vcc=20 Rb=680k Rc=220 Rs=120
TEXT 656 192 Left 2 !.model TBJ NPN(IS=10F BF=150)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3406B-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3406B-2.asy)
V1 IN 0 5
R2 N002 0 280K
XU1 IN 0 N001 IN N002 LTC3406B-2 ;pnba Run)GND)SW)Vin)FB
Rload OUT 0 5
L1 N001 OUT 2.2
C2 OUT 0 10
R1 OUT N002 887K
.tran 500u startup
.lib LTC3406B-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 988 700
WIRE 192 64 96 64
WIRE 352 64 192 64
WIRE 96 80 96 64
WIRE 352 80 352 64
WIRE 192 144 192 64
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 624 144 592 144
WIRE 736 144 624 144
WIRE 848 144 736 144
WIRE 736 160 736 144
WIRE 848 160 848 144
WIRE 96 176 96 160
WIRE 624 176 624 144
WIRE 736 256 736 224
WIRE 848 256 848 240
WIRE 624 304 624 256
WIRE 624 304 496 304
WIRE 624 320 624 304
WIRE 352 384 352 368
WIRE 624 416 624 400
SYMBOL polcap 720 160 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL RES 832 144 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL res 608 304 R0
SYMATTR InstName R2
SYMATTR Value 280K
SYMBOL PowerProducts\\LTC3406B-2 352 224 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 96 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL res 608 160 R0
SYMATTR InstName R1
SYMATTR Value 887K
FLAG 96 176 0
FLAG 352 384 0
FLAG 736 256 0
FLAG 848 256 0
FLAG 96 64 IN
FLAG 848 144 OUT
FLAG 624 416 0
TEXT 752 376 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\012a0951b172_Solenoid_1.asc
* Generated by LTspice 26.0.1 for Windows.
R3 0 N005 1
V2 N001 N005 9 Rser=1
M1 N004 N003 N005 N005 IRF530
V1 N002 0 PULSE(0 8 10m 1u 1u 10m 50m 3) Rser=10
R1 N003 N005 4.7k
R2 N002 N003 330
L1 N001 N004 4mH Rser=6
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 0.15 0 1u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 768 -160 -288 -160
WIRE 768 -48 768 -160
WIRE 48 48 -128 48
WIRE 576 48 128 48
WIRE -288 144 -288 -160
WIRE 768 160 768 32
WIRE 576 240 576 48
WIRE 720 240 576 240
WIRE -128 272 -128 48
WIRE 576 272 576 240
WIRE -128 400 -128 352
WIRE 224 400 -128 400
WIRE 384 400 224 400
WIRE 576 400 576 352
WIRE 576 400 464 400
WIRE 768 400 768 256
WIRE 768 400 576 400
WIRE 224 464 224 400
WIRE -288 576 -288 224
WIRE 768 576 768 400
WIRE 768 576 -288 576
SYMBOL res 368 384 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL res 560 256 R0
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL voltage -128 256 R0
WINDOW 3 -114 176 Left 2
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 8 10m 1u 1u 10m 50m 3)
SYMATTR SpiceLine Rser=10
SYMBOL res 32 32 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 330
SYMBOL nmos 720 160 R0
SYMATTR InstName M1
SYMATTR Value IRF530
SYMBOL ind 752 -64 R0
SYMATTR InstName L1
SYMATTR Value 4mH
SYMATTR SpiceLine Rser=6
SYMBOL voltage -288 128 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 9
SYMATTR SpiceLine Rser=1
FLAG 224 464 0
TEXT -498 292 Left 2 !.tran 0 0.15 0 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\744869a60964_Input.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6244.asy)
R1 N003 N005 10k
R3 N002 N001 10k
R4 N001 N004 10k
R2 N004 N003 10k
V4 N007 0 5
XU2 N007 N001 VCC 0 N002 LTC6244 ;pnba IN+)IN-)VCC)VEE)OUT
V2 N006 0 2.5
C1 N002 N001 8n
XU1 N006 N003 VCC 0 N004 LTC6244 ;pnba IN+)IN-)VCC)VEE)OUT
V3 N005 0 SINE(0 1 200) AC 1
V1 VCC 0 10
.ac dec 100 10m 20k
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 672 -48 608 -48
WIRE 784 -48 736 -48
WIRE 256 48 240 48
WIRE 432 48 336 48
WIRE 608 48 608 -48
WIRE 672 48 608 48
WIRE 784 48 784 -48
WIRE 784 48 752 48
WIRE 16 160 -80 160
WIRE 240 160 240 48
WIRE 240 160 96 160
WIRE 336 160 240 160
WIRE 432 176 432 48
WIRE 432 176 400 176
WIRE 496 176 432 176
WIRE 608 176 608 48
WIRE 608 176 576 176
WIRE 672 176 608 176
WIRE 336 192 160 192
WIRE 784 192 784 48
WIRE 784 192 736 192
WIRE 672 208 608 208
WIRE -80 224 -80 160
WIRE 160 224 160 192
WIRE 608 272 608 208
IOPIN -80 16 Out
IOPIN 368 144 In
IOPIN 704 160 In
SYMBOL Opamps\\LTC6244 704 192 R0
SYMATTR InstName U2
SYMBOL voltage 608 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL voltage -80 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 768 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 352 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL Opamps\\LTC6244 368 176 R0
SYMATTR InstName U1
SYMBOL voltage -80 208 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value SINE(0 1 200)
SYMBOL res 592 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL cap 736 -64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 8n
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 160 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 2.5
FLAG 368 208 0
FLAG -80 96 0
FLAG -80 304 0
FLAG 160 304 0
FLAG -80 16 VCC
FLAG 368 144 VCC
FLAG 704 224 0
FLAG 704 160 VCC
FLAG 608 352 0
TEXT -152 328 Left 2 !.ac dec 100 10m 20k
* Z:\home\khalils\Downloads\files\data\raw_asc\0a3c4258feab_FiltroAntiAlias.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 N002 3k3
C1 N003 0 10n
XU1 N001 N003 N001 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R2 Vo N001 3k3
C2 Vo 0 10n
V1 N002 0 AC 1 0
.ac dec 100 1 100000
.inc opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 0 128 0
WIRE 128 48 128 0
WIRE 160 48 128 48
WIRE 256 64 256 0
WIRE 256 64 224 64
WIRE 16 80 -32 80
WIRE 128 80 96 80
WIRE 160 80 128 80
WIRE 256 80 256 64
WIRE 272 80 256 80
WIRE 384 80 352 80
WIRE 416 80 384 80
WIRE -32 112 -32 80
WIRE 128 112 128 80
WIRE 384 112 384 80
WIRE -32 224 -32 192
WIRE 128 224 128 176
WIRE 384 224 384 176
FLAG 128 224 0
FLAG 384 224 0
FLAG 416 80 Vo
FLAG -32 224 0
SYMBOL res 112 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3k3
SYMBOL cap 112 112 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL Opamps\\opamp 192 0 R0
SYMATTR InstName U1
SYMBOL res 368 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 3k3
SYMBOL cap 368 112 R0
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -32 96 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1 0
TEXT -66 248 Left 2 !.ac dec 100 1 100000
TEXT -24 -48 Left 2 !.inc opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX1853.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N001 N002 1
C2 OUT 0 10
V1 IN 0 5
Rload OUT 0 50
XU1 IN OUT N001 N002 0 IN MAX1853 ;pnba IN)OUT)C1+)C1-)GND)_SHDN
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX1853.asy)
.lib MAX1853.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2884 1464
WIRE 2416 1008 2080 1008
WIRE 2576 1008 2416 1008
WIRE 2080 1024 2080 1008
WIRE 2416 1024 2416 1008
WIRE 2272 1088 2208 1088
WIRE 2576 1088 2576 1008
WIRE 2576 1088 2560 1088
WIRE 2080 1120 2080 1104
WIRE 2208 1136 2208 1088
WIRE 2208 1248 2208 1200
WIRE 2272 1248 2208 1248
WIRE 2624 1248 2560 1248
WIRE 2736 1248 2624 1248
WIRE 2624 1264 2624 1248
WIRE 2736 1264 2736 1248
WIRE 2416 1328 2416 1312
WIRE 2624 1360 2624 1328
WIRE 2736 1360 2736 1344
FLAG 2416 1328 0
FLAG 2624 1360 0
FLAG 2080 1120 0
FLAG 2736 1360 0
FLAG 2736 1248 OUT
FLAG 2080 1008 IN
SYMBOL cap 2192 1136 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 2608 1264 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL VOLTAGE 2080 1008 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 2720 1248 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL MAX1853 2416 1168 R0
SYMATTR InstName U1
TEXT 2352 1376 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\144448407811_VoltageDivider01.asc
* Generated by LTspice 26.0.1 for Windows.
* Two 1K Resistors
* Evenly divided
* 1k and 2k Resistors\n1k has 4V across
* 2k and 1k Resistors\n2k has 2V across
;op 1
;op1 1
R3 N002 N005 1k
R4 N005 0 2k
R5 N003 N006 2k
V2 N002 0 6
V3 N003 0 6
V1 N001 0 6
R6 N006 0 1k
R2 N004 0 1k
R1 N001 N004 1k
.op 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1384 680
WIRE 432 -1104 192 -1104
WIRE 912 -1104 672 -1104
WIRE 1328 -1104 1088 -1104
WIRE 432 -1072 432 -1104
WIRE 912 -1072 912 -1104
WIRE 1328 -1072 1328 -1104
WIRE 192 -1008 192 -1104
WIRE 672 -1008 672 -1104
WIRE 1088 -1008 1088 -1104
WIRE 432 -928 432 -992
WIRE 912 -928 912 -992
WIRE 1328 -928 1328 -992
WIRE 192 -848 192 -928
WIRE 432 -848 192 -848
WIRE 672 -848 672 -928
WIRE 912 -848 672 -848
WIRE 1088 -848 1088 -928
WIRE 1328 -848 1088 -848
WIRE 192 -816 192 -848
WIRE 672 -816 672 -848
WIRE 1088 -816 1088 -848
DATAFLAG 432 -960 ""
DATAFLAG 304 -1104 ""
DATAFLAG 912 -960 ""
DATAFLAG 784 -1104 ""
DATAFLAG 1328 -960 ""
DATAFLAG 1200 -1104 ""
SYMBOL voltage 192 -1024 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 2
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL voltage 672 -1024 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 2
SYMATTR InstName V2
SYMATTR Value 6
SYMBOL res 1312 -944 R0
SYMATTR InstName R6
SYMATTR Value 1k
SYMBOL res 416 -944 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 416 -1088 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 1312 -1088 R0
SYMATTR InstName R5
SYMATTR Value 2k
SYMBOL voltage 1088 -1024 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 2
SYMATTR InstName V3
SYMATTR Value 6
SYMBOL res 896 -944 R0
SYMATTR InstName R4
SYMATTR Value 2k
SYMBOL res 896 -1088 R0
SYMATTR InstName R3
SYMATTR Value 1k
FLAG 192 -816 0
FLAG 672 -816 0
FLAG 1088 -816 0
TEXT 160 -792 Left 2 !.op 1
TEXT 640 -792 Left 2 !;op 1
TEXT 1056 -792 Left 2 !;op1 1
TEXT 216 -1216 Left 2 ;Two 1K Resistors
TEXT 224 -1184 Left 2 ;Evenly divided
TEXT 704 -1224 Left 2 ;1k and 2k Resistors\n1k has 4V across
TEXT 1120 -1224 Left 2 ;2k and 1k Resistors\n2k has 2V across
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5694R.asc
* Generated by LTspice 26.0.1 for Windows.
CLOAD vOUT 0 10n
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
V1 Vdd 0 5
Vdac1 NC_01 0 1.25
I1 0 0 100 AC 1
XU2 vDAC Vdd 0 vOUT AD5694R Gain=2 ;pnba Vdac)Vdd)GND)Vout
.tran 200u
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5694R.asy)
.lib AD5694R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 272 112 192 112
WIRE 464 112 272 112
WIRE -800 144 -800 112
WIRE 272 160 272 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 100
SYMBOL AD5694R -208 112 R0
SYMATTR InstName U2
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3485-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3485-1.asy)
L1 N002 N005 10 Rpar=2K Rser=.1
D1 N003 OUT D
C1 OUT 0 .02
V2 N002 0 3
V3 N007 0 PWL(30m 0 30.01m 3 30.1m 3 30.11m 0)
V1 N001 0 5
K1 L1 L2 1
L2 0 N003 {10u*10.2*10.2} Rpar=1Meg
XU1 N001 N002 N001 N005 MP_01 N008 N007 N001 N004 N006 0 LT3485-1 ;pnba Charge)Vbat)Vin)SW))IBGTout)IBGTin)IBGTpwr)_Done)Vmont)GND
R3 N004 N001 10K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 50m startup
.lib LT3485-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2772 1764
WIRE 1936 1152 1936 1136
WIRE 1712 1248 1520 1248
WIRE 1824 1248 1712 1248
WIRE 1936 1248 1936 1232
WIRE 2064 1248 1936 1248
WIRE 2224 1248 2112 1248
WIRE 2352 1248 2288 1248
WIRE 2064 1264 2064 1248
WIRE 2112 1264 2112 1248
WIRE 2352 1264 2352 1248
WIRE 1712 1296 1712 1248
WIRE 1824 1296 1824 1248
WIRE 1936 1296 1936 1248
WIRE 1520 1360 1520 1248
WIRE 1568 1360 1520 1360
WIRE 1664 1360 1648 1360
WIRE 2064 1360 2064 1344
WIRE 2064 1360 1984 1360
WIRE 2112 1360 2112 1344
WIRE 2352 1360 2352 1328
WIRE 1520 1440 1520 1360
WIRE 1664 1440 1520 1440
WIRE 2016 1440 1984 1440
WIRE 1520 1456 1520 1440
WIRE 1664 1520 1600 1520
WIRE 2016 1520 1984 1520
WIRE 1520 1552 1520 1536
WIRE 1600 1552 1600 1520
WIRE 1824 1600 1824 1584
WIRE 1600 1664 1600 1632
SYMBOL diode 2224 1264 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL PowerProducts\\LT3485-1 1824 1440 R0
SYMATTR InstName U1
SYMBOL misc\\battery 1936 1248 M180
WINDOW 0 25 87 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL voltage 1600 1536 R0
WINDOW 3 12 110 Left 2
SYMATTR Value PWL(30m 0 30.01m 3 30.1m 3 30.11m 0)
SYMATTR InstName V3
SYMBOL res 1664 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL cap 2336 1264 R0
WINDOW 3 27 55 Left 2
SYMATTR Value .02
SYMATTR InstName C1
SYMBOL ind2 2048 1248 R0
WINDOW 0 -6 35 Right 2
WINDOW 3 -4 73 Right 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rpar=2K Rser=.1
SYMBOL VOLTAGE 1520 1440 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind2 2128 1360 R180
WINDOW 0 -3 72 Right 2
WINDOW 3 0 43 Right 2
SYMATTR InstName L2
SYMATTR Value {10u*10.2*10.2}
SYMATTR SpiceLine Rpar=1Meg
FLAG 2352 1360 0
FLAG 1824 1600 0
FLAG 1520 1552 0
FLAG 2112 1360 0
FLAG 1936 1136 0
FLAG 1600 1664 0
FLAG 2352 1248 OUT
TEXT 2080 1464 Left 2 !.tran 50m startup
TEXT 2088 1248 Bottom 2 !K1 L1 L2 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4601-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4601-1.asy)
C2 OUT 0 100
Rload OUT 0 .25
R2 N008 0 392K
C3 N009 0 .001
R3 IN N001 100K
C1 OUT N004 100p
V1 IN 0 6
R1 N004 0 40.2K
R4 IN N002 100K
XU1 IN 0 OUT MP_01 OUT MP_02 MP_03 0 N001 N004 N005 N007 N006 N011 N008 N003 N002 N009 N010 N005 LTM4601-1 ;pnba Vin)PGND)Vout))Vout_LCL)))SGND)Pgood)FB)DRVcc)MARG1)MARG0)Fset)MPGM)Comp)Run)Track/SS)PLLIN)INTVcc
.tran 750u startup
.lib LTM4601-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1084 680
WIRE -160 -16 -256 -16
WIRE 208 -16 -160 -16
WIRE -256 0 -256 -16
WIRE 208 0 208 -16
WIRE -160 48 -160 -16
WIRE -144 48 -160 48
WIRE 16 48 -64 48
WIRE 432 48 400 48
WIRE -256 96 -256 80
WIRE -160 112 -160 48
WIRE -80 112 -160 112
WIRE 16 112 0 112
WIRE 432 112 432 48
WIRE 432 112 400 112
WIRE 640 112 432 112
WIRE 736 112 640 112
WIRE 640 128 640 112
WIRE 736 128 736 112
WIRE 16 176 0 176
WIRE 432 176 400 176
WIRE 512 176 432 176
WIRE 512 192 512 176
WIRE 640 224 640 192
WIRE 736 224 736 208
WIRE 16 240 0 240
WIRE 416 240 400 240
WIRE 512 288 512 272
WIRE 0 304 0 240
WIRE 16 304 0 304
WIRE 416 304 400 304
WIRE -80 368 -96 368
WIRE 16 368 0 368
WIRE 416 368 400 368
WIRE 496 368 480 368
WIRE 16 432 0 432
WIRE 416 432 400 432
WIRE 128 512 128 496
WIRE 288 512 288 496
SYMBOL res 720 112 R0
SYMATTR InstName Rload
SYMATTR Value .25
SYMBOL cap 416 352 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL res 16 384 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 392K
SYMBOL res 496 176 R0
SYMATTR InstName R1
SYMATTR Value 40.2K
SYMBOL PowerProducts\\LTM4601-1 208 256 R0
SYMATTR InstName U1
SYMBOL res -96 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL cap 416 112 R0
WINDOW 0 34 18 Left 2
WINDOW 3 35 47 Left 2
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL cap 624 128 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMBOL voltage -256 -16 R0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL res -160 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
FLAG 128 512 0
FLAG 288 512 0
FLAG 512 288 0
FLAG -96 368 0
FLAG 640 224 0
FLAG 736 224 0
FLAG -256 96 0
FLAG 496 368 0
FLAG 736 112 OUT
FLAG -256 -16 IN
TEXT 472 496 Left 2 !.tran 750u startup
* Z:\tmp\asc_dec_bjh7r6w2\178f7a0bf4bc_HWrecFiltt_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
L2 N002 0 .01
C1 N003 0 2m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 160 -16 160
WIRE 192 160 176 160
WIRE 272 160 256 160
WIRE 320 160 272 160
WIRE 80 176 80 160
WIRE 176 176 176 160
WIRE 320 176 320 160
WIRE 272 192 272 160
WIRE 80 288 80 256
WIRE 176 288 176 256
WIRE 272 288 272 256
WIRE 320 288 320 256
SYMBOL ind2 192 160 M0
SYMATTR InstName L2
SYMATTR Value .01
SYMATTR Type ind
SYMBOL cap 256 192 R0
SYMATTR InstName C1
SYMATTR Value 2m
FLAG 80 288 0
FLAG 176 288 0
FLAG 320 288 0
FLAG 272 288 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1790-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1790-3.3.asy)
V1 IN 0 PWL(0 0 1 10)
Rload OUT 0 1K
XU1 IN 0 OUT LT1790-33 ;pnba IN)GND)OUT
C1 OUT 0 1
.tran 1
.lib LT1790.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 48 -208 48
WIRE 336 48 288 48
WIRE 432 48 336 48
WIRE -208 64 -208 48
WIRE 336 64 336 48
WIRE 432 64 432 48
WIRE -208 160 -208 144
WIRE 336 160 336 128
WIRE 432 160 432 144
WIRE 160 176 160 160
SYMBOL cap 320 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LT1790-3.3 160 48 R0
SYMATTR InstName U1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 416 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
FLAG -208 160 0
FLAG 336 160 0
FLAG 432 160 0
FLAG 160 176 0
FLAG 432 48 OUT
FLAG -208 48 IN
TEXT 256 224 Left 2 !.tran 1