* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3884.asc
* Generated by LTspice 26.0.1 for Windows.
* Please read the following notes carefully since the model behaves differently from the user \ninterface for the LTC3884.\n \n(1) PMBus communication and memory address related functions and pins are not modeled.\n \n(2) Changes to parameter values while the simulation is running will not take effect unless the\nsimulation is stopped and restarted. This is different from the way the part operates which will\nrespond to the changes while running. \n \n(3) Share_clk is not modeled. The default time reference of LTspice is used as the common time \nbase for all time-related parameters.\n \n(4) The following parameters can be defined by right-clicking on the LTC3884 symbol.\nThe nomenclature used here differs from the one in the data sheet. If any value of these parameters is\nset beyond the scope described in the data sheet, the resulting simulation will not be meaningful.\n \n VIN_ON & VIN_OFF -- in volts, set the unit start/stop input voltages; \n Freq -- in Hz, sets switching frequency as one of values of 250k, 350k, 425k, 500k, 575k, 650k, \n 750k,1000k. Freq_cfg pin needs to float or short to VDD25, to make the value be in effect;\n PHs_0 & PHs_1 -- in degree, set phase angle related to SYNC signal. \n Certain combinations are restricted as in data sheet. Phase_cfg pin needs to float or \n short to VDD25, to make the value be in effect; \n Ton0_delay & Ton0_rise; Ton1_delay & Ton1_rise -- in sec, set delay and soft-start timers for \n channel0 and channel1. Initialization time is not modeled; \n Toff0_delay & Toff0_fall; Toff1_delay & Toff1_fall -- in sec, set delay and soft-off timers for \n channel0 and channel1;\n Vout_0 & Vout_1 -- in volt, set output voltages respectively. Vout_cfgn pin needs to float or \n short to VDD25, to make the value be in effect;\n Vout0_range & Vout1_range -- set maximum output range, with value 0\n for 4.096V (CH0) and 5.5V (CH1), value 1 for 2.75V;\n Ilim0_range & Ilim1_range -- set maximum sensed peak current range, with value 0\n for low (45.14mV), and 1 for high (81.25mV);\n OC_limit0 & OC_limit1 -- set ratio of peak current limit to the maximum value defined by Ilimit_range. \n It must be one of values: 0.5, 0.572, 0.642, 0.714, 0.786, 0.858, 0.928, 1;\n Mode_II -- sets light load operation mode: 0 for discontinuous, 1 for forced continuous;\n Fault_response -- sets the response mode of the LTC3884 to occuring faults:\n 0 for ignore, 1 for latch up, 2 for Hiccup after Retry_delay time;\n Retry_delay -- in sec, sets the timer before the LTC3884 turns on after a fault;\n gm -- transconductance of the error amplifier. It must be between 1m mho and 5.73m mho;\n Rth -- Compensation resistor. It must be set between 0k ohms and 62k ohms;\n LowDCR -- set to 1 if DCR is below 1m ohm and make RC = L/(5*DCR), set to 0 if DCR is above \n 1m ohm and make RC = L/DCR.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3884.asy)
R13 N019 N018 24.9K
C7 N005 N007 0.1
R3 N021 N020 10K
MQ2 N006 N008 0 0 RJK0301DPB
C12 N020 0 1
MQ3 IN N003 N007 N007 RJK0305DPB
D1 N001 N004 CMDSH2-3
C10 N012 0 220p
R4 N023 N020 10K
R10 0 N018 11.3K
R2 OUT1 0 0.05
R6 N017 0 17.8K
R7 N019 N017 20K
R9 N019 N016 24.9K
C6 N015 0 4700p
MQ4 N007 N009 0 0 RJK0301DPB
XU1 OUT0 0 N010 OUT1 N015 N013 N011 OUT0 NC_01 N007 N022 N003 N005 N009 0 0 N023 N021 IN N001 N017 N016 NC_02 N018 N019 N008 N004 N020 N012 N014 0 OUT1 NC_03 N006 N002 0 LTC3884 VIN_ON=5.5 VIN_OFF=5 Vout_0=1.6 Vout_1=2.5 Ilim0_range=0 Ilim1_range=0 OC_limit0=1 OC_limit1=1 Mode_ll=2 Fault_response=0 Retry_delay=.1m gm0=3m gm1=3m Rth0=5K Rth1=5K LowDcr=1 Freq=500K PHs_0=0 PHs_1=180 Ton0_delay=.3m Ton0_rise=.5m Ton1_delay=.3m Ton1_rise=.5m Toff0_delay=.2m Toff0_fall=.3m Toff1_delay=.2m Toff1_fall=.3m Vout0_range=0 Vout1_range=0 Sync=0 ;pnba VSENSE0+)VSENSE0-)ISENSE1+)ISENSE1-)ITHR0)ITH0)ISENSE0+)ISENSE0-)PGOOD0)SW0)SYNC)TG0)BOOST0)BG0)PGND)EXTVCC)RUN0)RUN1)VIN)INTVCC)VOUT_CFG0)VOUT_CFG1)FREQ_CFG)PHASE_CFG)VDD25)BG1)BOOST1)VDD33)ITH1)ITHR1)VSENSE1-)VSENSE1+)PGOOD1)SW1)TG1)SGND
R12 OUT0 0 0.06
C13 N019 0 1
C4 N013 0 220p
V1 IN 0 12
C8 N011 OUT0 0.22
R11 N007 N011 931
R8 N016 0 7.32K
L1 N006 OUT1 .33 Rser=.32m
C9 OUT0 0 330 M=2 Rser=5m
L2 N007 OUT0 0.33 Rser=0.32m
C3 N010 OUT1 0.22
C5 OUT1 0 330 M=2 Rser=5m
R5 N022 N020 4.99K
C2 N004 N006 0.1
D2 N001 N005 CMDSH2-3
C11 N014 0 2200p
C1 0 N001 1
R1 N006 N010 931
MQ1 IN N002 N006 N006 RJK0305DPB
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1.2m startup
.lib LTC3884.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3644 1720
WIRE 352 -656 336 -656
WIRE 480 -656 352 -656
WIRE 816 -656 480 -656
WIRE 1520 -656 816 -656
WIRE 336 -624 336 -656
WIRE 912 -608 912 -624
WIRE 336 -528 336 -544
WIRE 912 -528 912 -544
WIRE 912 -528 688 -528
WIRE 1328 -528 912 -528
WIRE 688 -480 688 -528
WIRE 1328 -480 1328 -528
WIRE 480 -464 480 -656
WIRE 1520 -464 1520 -656
WIRE 816 -448 816 -656
WIRE 912 -448 912 -528
WIRE 1008 -448 1008 -480
WIRE 1104 -448 1104 -480
WIRE 1200 -448 1200 -480
WIRE 752 -384 528 -384
WIRE 1472 -384 1264 -384
WIRE 688 -288 688 -416
WIRE 752 -288 688 -288
WIRE 1328 -288 1328 -416
WIRE 1328 -288 1264 -288
WIRE 688 -272 688 -288
WIRE 1328 -272 1328 -288
WIRE 96 -192 48 -192
WIRE 160 -192 96 -192
WIRE 256 -192 160 -192
WIRE 288 -192 256 -192
WIRE 416 -192 368 -192
WIRE 480 -192 480 -368
WIRE 480 -192 416 -192
WIRE 688 -192 688 -208
WIRE 688 -192 480 -192
WIRE 752 -192 688 -192
WIRE 1328 -192 1328 -208
WIRE 1328 -192 1264 -192
WIRE 1520 -192 1520 -368
WIRE 1520 -192 1328 -192
WIRE 1600 -192 1520 -192
WIRE 1648 -192 1600 -192
WIRE 1760 -192 1728 -192
WIRE 1840 -192 1760 -192
WIRE 1936 -192 1840 -192
WIRE 1984 -192 1936 -192
WIRE 48 -176 48 -192
WIRE 160 -176 160 -192
WIRE 480 -176 480 -192
WIRE 1520 -176 1520 -192
WIRE 1840 -176 1840 -192
WIRE 1984 -176 1984 -192
WIRE 752 -96 528 -96
WIRE 1472 -96 1264 -96
WIRE 48 -80 48 -96
WIRE 160 -80 160 -112
WIRE 1840 -80 1840 -112
WIRE 1984 -80 1984 -96
WIRE 480 -64 480 -80
WIRE 1520 -64 1520 -80
WIRE 416 0 416 -192
WIRE 496 0 416 0
WIRE 688 0 576 0
WIRE 752 0 688 0
WIRE 1328 0 1264 0
WIRE 1408 0 1328 0
WIRE 1600 0 1600 -192
WIRE 1600 0 1488 0
WIRE 688 16 688 0
WIRE 1328 16 1328 0
WIRE 256 96 256 -192
WIRE 688 96 688 80
WIRE 688 96 256 96
WIRE 752 96 688 96
WIRE 1328 96 1328 80
WIRE 1328 96 1264 96
WIRE 1760 96 1760 -192
WIRE 1760 96 1328 96
WIRE 256 192 256 96
WIRE 752 192 256 192
WIRE 1760 192 1760 96
WIRE 1760 192 1264 192
WIRE 752 288 704 288
WIRE 1328 288 1264 288
WIRE 656 384 624 384
WIRE 752 384 720 384
WIRE 1296 384 1264 384
WIRE 1392 384 1360 384
WIRE 656 480 624 480
WIRE 752 480 720 480
WIRE 1296 480 1264 480
WIRE 1392 480 1360 480
WIRE 368 576 352 576
WIRE 480 576 448 576
WIRE 752 576 480 576
WIRE 1360 576 1264 576
WIRE 1424 576 1360 576
WIRE 1536 576 1504 576
WIRE 1360 656 1360 576
WIRE 544 672 528 672
WIRE 640 672 624 672
WIRE 752 672 640 672
WIRE 480 736 480 576
WIRE 640 736 640 672
WIRE 912 848 912 832
WIRE 944 848 912 848
WIRE 1008 848 1008 832
WIRE 1040 848 1008 848
WIRE 816 864 816 832
WIRE 944 864 944 848
WIRE 1040 864 1040 848
WIRE 1104 864 1104 832
WIRE 1200 864 1200 832
WIRE 944 944 944 928
WIRE 1040 944 1040 928
WIRE 816 992 816 944
WIRE 1008 992 1008 848
WIRE 1008 992 816 992
WIRE 1104 992 1104 944
WIRE 1104 992 1008 992
WIRE 1200 992 1200 944
WIRE 1200 992 1104 992
WIRE 480 1024 480 816
WIRE 640 1024 640 816
WIRE 640 1024 480 1024
WIRE 912 1024 912 848
WIRE 912 1024 640 1024
WIRE 1360 1024 1360 736
WIRE 1360 1024 912 1024
SYMBOL res 1504 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R11
SYMATTR Value 931
SYMBOL res 496 832 R180
WINDOW 0 -15 82 Right 2
WINDOW 3 -12 29 Right 2
SYMATTR InstName R9
SYMATTR Value 24.9K
SYMBOL res 528 688 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R10
SYMATTR Value 11.3K
SYMBOL nmos 528 -464 M0
WINDOW 0 59 24 Left 2
WINDOW 3 56 66 Left 2
SYMATTR InstName Q1
SYMATTR Value RJK0305DPB
SYMBOL schottky 672 -480 R0
WINDOW 3 4 68 Right 2
WINDOW 0 -6 9 Right 2
SYMATTR Value CMDSH2-3
SYMATTR InstName D1
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 144 -176 R0
WINDOW 123 29 82 Left 2
WINDOW 3 30 59 Left 2
SYMATTR Value2 M=2
SYMATTR Value 330
SYMATTR InstName C5
SYMATTR SpiceLine Rser=5m
SYMBOL nmos 1472 -176 R0
WINDOW 0 -3 20 Right 2
WINDOW 3 28 103 Right 2
SYMATTR InstName Q4
SYMATTR Value RJK0301DPB
SYMBOL res 32 -192 R0
SYMATTR InstName R2
SYMATTR Value 0.05
SYMBOL cap 1312 16 R0
SYMATTR InstName C8
SYMATTR Value 0.22
SYMBOL cap 1312 -272 R0
SYMATTR InstName C7
SYMATTR Value 0.1
SYMBOL cap 704 16 M0
SYMATTR InstName C3
SYMATTR Value 0.22
SYMBOL cap 704 -272 M0
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL res 1968 -192 R0
SYMATTR InstName R12
SYMATTR Value 0.06
SYMBOL cap 896 -608 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 720 368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C10
SYMATTR Value 220p
SYMBOL schottky 1312 -480 R0
SYMATTR Value CMDSH2-3
SYMATTR InstName D2
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 800 848 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL cap 928 864 R0
SYMATTR InstName C13
SYMATTR Value 1
SYMBOL cap 720 464 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C11
SYMATTR Value 2200p
SYMBOL voltage 336 -640 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ind 1632 -176 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
WINDOW 39 -51 49 VTop 2
SYMATTR InstName L2
SYMATTR Value 0.33
SYMATTR SpiceLine Rser=0.32m
SYMBOL res 1184 848 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL cap 1296 464 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C6
SYMATTR Value 4700p
SYMBOL cap 1024 864 R0
SYMATTR InstName C12
SYMATTR Value 1
SYMBOL res 480 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 931
SYMBOL ind 384 -176 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
WINDOW 39 -51 49 VTop 2
SYMATTR InstName L1
SYMATTR Value .33
SYMATTR SpiceLine Rser=.32m
SYMBOL res 464 560 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R8
SYMATTR Value 7.32K
SYMBOL res 1408 592 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R6
SYMATTR Value 17.8K
SYMBOL cap 1824 -176 R0
WINDOW 123 29 82 Left 2
WINDOW 3 30 59 Left 2
SYMATTR Value2 M=2
SYMATTR Value 330
SYMATTR InstName C9
SYMATTR SpiceLine Rser=5m
SYMBOL cap 1296 368 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 220p
SYMBOL res 1088 848 R0
SYMATTR InstName R5
SYMATTR Value 4.99K
SYMBOL res 656 832 R180
WINDOW 0 -12 80 Right 2
WINDOW 3 -8 30 Right 2
SYMATTR InstName R13
SYMATTR Value 24.9K
SYMBOL LTC3884 1008 192 R0
SYMATTR InstName U1
SYMBOL nmos 528 -176 M0
WINDOW 0 0 2 Right 2
WINDOW 3 25 107 Right 2
SYMATTR InstName Q2
SYMATTR Value RJK0301DPB
SYMBOL res 1376 752 R180
WINDOW 0 -9 75 Right 2
WINDOW 3 -9 32 Right 2
SYMATTR InstName R7
SYMATTR Value 20K
SYMBOL nmos 1472 -464 R0
WINDOW 0 62 21 Left 2
WINDOW 3 63 72 Left 2
SYMATTR InstName Q3
SYMATTR Value RJK0305DPB
FLAG 1008 -480 0
FLAG 1104 -480 0
FLAG 912 -624 0
FLAG 480 -64 0
FLAG 160 -80 0
FLAG 48 -80 0
FLAG 96 -192 OUT1
FLAG 352 -656 IN
FLAG 336 -528 0
FLAG 1520 -64 0
FLAG 1840 -80 0
FLAG 1984 -80 0
FLAG 1936 -192 OUT0
FLAG 1200 -480 0
FLAG 1328 288 0
FLAG 704 288 0
FLAG 1392 384 0
FLAG 1392 480 0
FLAG 624 384 0
FLAG 624 480 0
FLAG 1040 944 0
FLAG 1536 576 0
FLAG 352 576 0
FLAG 528 672 0
FLAG 944 944 0
TEXT 1360 1064 Right 2 !.tran  1.2m startup
TEXT 2128 -496 Left 2 ;Please read the following notes carefully since the model behaves differently from the user \ninterface for the LTC3884.\n \n(1) PMBus communication and memory address related functions and pins are not modeled.\n \n(2) Changes to parameter values while the simulation is running will not take effect unless the\nsimulation is stopped and restarted. This is different from the way the part operates which will\nrespond to the changes while running.  \n \n(3) Share_clk is not modeled. The default time reference of LTspice is used as the common time \nbase for all time-related parameters.\n \n(4) The following parameters can be defined by right-clicking on the LTC3884 symbol.\nThe nomenclature used here differs from the one in the data sheet. If any value of these parameters is\nset beyond the scope described in the data sheet, the resulting simulation will not be meaningful.\n \n     VIN_ON & VIN_OFF -- in volts, set the unit start/stop input voltages; \n     Freq -- in Hz, sets switching frequency as one of values of 250k, 350k, 425k, 500k, 575k, 650k, \n                 750k,1000k. Freq_cfg pin needs to float or short to VDD25, to make the value be in effect;\n     PHs_0 & PHs_1 -- in degree, set phase angle related to SYNC signal. \n                Certain combinations are restricted as in data sheet. Phase_cfg pin needs to float or \n                short to VDD25, to make the value be in effect;  \n     Ton0_delay & Ton0_rise; Ton1_delay & Ton1_rise -- in sec, set delay and soft-start timers for \n                channel0 and channel1. Initialization time is not modeled; \n     Toff0_delay & Toff0_fall; Toff1_delay & Toff1_fall -- in sec, set delay and soft-off timers for \n                channel0 and channel1;\n     Vout_0 & Vout_1 -- in volt, set output voltages respectively. Vout_cfgn pin needs to float or \n                short to VDD25, to make the value be in effect;\n     Vout0_range & Vout1_range -- set maximum output range, with value 0\n                for 4.096V (CH0) and 5.5V (CH1), value 1 for 2.75V;\n     Ilim0_range & Ilim1_range -- set maximum sensed peak current range, with value 0\n               for low (45.14mV), and 1 for high (81.25mV);\n     OC_limit0 & OC_limit1 -- set ratio of peak current limit to the maximum value defined by Ilimit_range. \n               It must be one of values: 0.5, 0.572, 0.642, 0.714, 0.786, 0.858, 0.928, 1;\n     Mode_II -- sets light load operation mode: 0 for discontinuous, 1 for forced continuous;\n     Fault_response -- sets the response mode of the LTC3884 to occuring faults:\n              0 for ignore, 1 for latch up, 2 for Hiccup after Retry_delay time;\n     Retry_delay -- in sec, sets the timer before the LTC3884 turns on after a fault;\n     gm -- transconductance of the error amplifier. It must be between 1m mho and 5.73m mho;\n     Rth -- Compensation resistor. It must be set between 0k ohms and 62k ohms;\n     LowDCR -- set to 1 if DCR is below 1m ohm and make RC = L/(5*DCR), set to 0 if DCR is above \n               1m ohm and make RC = L/DCR.