Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1260.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1260.asy)
R2 N001 0 1.6K
V2 -V 0 -5
V3 IN 0 SINE(0 1 1K)
XU1 IN N001 +V -V OUT LT1259 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
R1 OUT N001 1.6K
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -288 144 -288 128
WIRE -160 144 -160 128
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE -288 240 -288 224
WIRE -160 240 -160 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 288 240 256 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1.6K
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL voltage -288 128 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -160 128 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1.6K
SYMBOL opamps\\LT1260 192 176 R0
SYMATTR InstName U1
FLAG -160 240 0
FLAG 192 192 +V
FLAG -160 128 +V
FLAG 192 288 -V
FLAG -288 240 0
FLAG -288 128 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 288 240 OUT
FLAG 0 256 IN
TEXT 264 336 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\11e795a57c36_BT-CE-SWITCH-modes.asc
* Generated by LTspice 26.0.1 for Windows.
Rc N001 Uce 1k
V1 Ube 0 0
VUcc N001 0 12V
Q1 Uce Ube 0 0 2N3904
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 300mV 900mV
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 -64 208 -64
WIRE 208 -48 208 -64
WIRE 208 48 208 32
WIRE 240 48 208 48
WIRE 208 80 208 48
WIRE 336 80 336 -64
WIRE 64 128 48 128
WIRE 144 128 64 128
WIRE 48 144 48 128
WIRE 48 256 48 224
WIRE 208 256 208 176
WIRE 208 256 48 256
WIRE 336 256 336 160
WIRE 336 256 208 256
WIRE 208 272 208 256
FLAG 208 272 0
FLAG 64 128 Ube
FLAG 240 48 Uce
SYMBOL Misc\\EuropeanResistor 192 -64 R0
SYMATTR InstName Rc
SYMATTR Value 1k
SYMBOL voltage 48 128 R0
WINDOW 3 -4 148 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 42 61 Left 2
SYMATTR Value 0
SYMATTR InstName V1
SYMBOL voltage 336 64 R0
WINDOW 3 22 18 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 18 -11 Left 2
SYMATTR Value 12V
SYMATTR InstName Ucc
SYMBOL npn 144 80 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
TEXT 0 272 Left 2 !.dc V1 300mV 900mV
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8643S-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8643S-2.asy)
XU1 OUT N003 N004 IN NC_01 0 N002 N006 0 0 N008 NC_02 IN IN N005 N007 NC_03 LT8643S-2 ;pnba BIAS)INTVcc)BST)VIN1)CLKOUT)GND1)VC)SW)GND)GND2)FB)PG)VIN2)EN/UV)RT)TR/SS)SYNC/MODE
L1 N006 OUT 3.3 Rser=10m
C5 OUT N008 4.7p
R4 N002 N001 6.49K
C4 OUT 0 100 Rser=2m
R2 OUT N008 1Meg
C3 N004 N006 0.1
C2 N003 0 1
Rload OUT 0 835m
R3 N008 0 243K
R1 N005 0 41.2K
V1 IN 0 24
C6 N001 0 330p
C1 N007 0 1n
.tran 1m startup
.lib LT8643S-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1848 740
WIRE 48 -80 -32 -80
WIRE 80 -80 48 -80
WIRE 256 -80 80 -80
WIRE 432 -80 256 -80
WIRE -32 -64 -32 -80
WIRE 256 -64 256 -80
WIRE 80 0 80 -80
WIRE 112 0 80 0
WIRE 432 0 432 -80
WIRE 432 0 400 0
WIRE -32 32 -32 16
WIRE 112 80 80 80
WIRE 432 80 400 80
WIRE -64 160 -80 160
WIRE 16 160 0 160
WIRE 112 160 96 160
WIRE 32 240 0 240
WIRE 112 240 96 240
WIRE 624 240 400 240
WIRE 432 320 400 320
WIRE 16 400 0 400
WIRE 112 400 96 400
WIRE 432 400 432 384
WIRE 432 400 400 400
WIRE 512 400 432 400
WIRE 624 400 624 240
WIRE 624 400 592 400
WIRE 736 400 624 400
WIRE 832 400 736 400
WIRE 880 400 832 400
WIRE 928 400 880 400
WIRE 736 416 736 400
WIRE 832 416 832 400
WIRE 928 416 928 400
WIRE 32 480 0 480
WIRE 112 480 96 480
WIRE 624 480 400 480
WIRE 736 480 736 464
WIRE 736 480 624 480
WIRE 624 496 624 480
WIRE 832 512 832 480
WIRE 928 512 928 496
WIRE 304 560 304 544
WIRE 624 592 624 576
SYMBOL cap 96 256 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 608 384 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL ind 496 416 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=10m
SYMBOL LT8643S-2 256 240 R0
SYMATTR InstName U1
SYMBOL res 608 480 R0
SYMATTR InstName R3
SYMATTR Value 243K
SYMBOL cap 816 416 R0
WINDOW 0 40 17 Left 2
SYMATTR InstName C4
SYMATTR Value 100
SYMATTR SpiceLine Rser=2m
SYMBOL cap 720 400 R0
WINDOW 0 32 17 Left 2
SYMATTR InstName C5
SYMATTR Value 4.7p
SYMBOL cap 96 496 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 6.49K
SYMBOL res 912 400 R0
SYMATTR InstName Rload
SYMATTR Value 835m
SYMBOL cap 416 320 R0
WINDOW 0 32 17 Left 2
SYMATTR InstName C3
SYMATTR Value 0.1
SYMBOL voltage -32 -80 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 0 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C6
SYMATTR Value 330p
SYMBOL res 112 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 41.2K
FLAG 304 560 0
FLAG 0 400 0
FLAG -32 32 0
FLAG 832 512 0
FLAG 624 592 0
FLAG 928 512 0
FLAG 880 400 OUT
FLAG 48 -80 IN
FLAG 80 80 0
FLAG 432 80 0
FLAG 0 480 0
FLAG -80 160 0
FLAG 0 240 0
TEXT 160 632 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4195-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\ADuM4195-1.asy)
V3 Shtdn 0 0
XU1 Vdd2 Vin Shtdn 0 0 Vout Vdd1 ADuM4195-1 ;pnba VDD2)VIN)SHTDN)GND2)GND1)VOUT)VDD1
V4 Vdd1 0 5
V2 Vin 0 5 AC 1
V1 Vdd2 0 5
.tran 1m
.lib ADuM4195-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3080 680
WIRE -1776 -448 -2096 -448
WIRE -1728 -448 -1776 -448
WIRE -1376 -448 -1424 -448
WIRE -1232 -448 -1376 -448
WIRE -1232 -432 -1232 -448
WIRE -2096 -416 -2096 -448
WIRE -1776 -384 -2000 -384
WIRE -1728 -384 -1776 -384
WIRE -1376 -384 -1424 -384
WIRE -1296 -384 -1376 -384
WIRE -2000 -352 -2000 -384
WIRE -1776 -304 -1872 -304
WIRE -1728 -304 -1776 -304
WIRE -1872 -272 -1872 -304
WIRE -1728 -240 -1760 -240
WIRE -1392 -240 -1424 -240
WIRE -2096 -160 -2096 -336
WIRE -2000 -160 -2000 -272
WIRE -1872 -160 -1872 -192
SYMBOL voltage -2000 -368 R0
WINDOW 0 26 98 Left 2
WINDOW 3 33 16 Left 2
WINDOW 123 26 126 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMATTR Value2 AC 1
SYMBOL voltage -2096 -432 R0
WINDOW 0 26 98 Left 2
WINDOW 3 33 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADuM4195-1 -1568 -352 R0
SYMATTR InstName U1
SYMBOL voltage -1232 -448 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 43 29 Left 2
WINDOW 3 46 61 Left 2
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL voltage -1872 -288 R0
SYMATTR InstName V3
SYMATTR Value 0
FLAG -1392 -240 0
FLAG -2096 -160 0
FLAG -1872 -160 0
FLAG -1776 -448 Vdd2
FLAG -1760 -240 0
FLAG -1232 -352 0
FLAG -2000 -160 0
FLAG -1776 -384 Vin
FLAG -1376 -384 Vout
FLAG -1376 -448 Vdd1
FLAG -1776 -304 Shtdn
TEXT -1728 -128 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4651.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4651.asy)
XU1 OUT 0 IN N004 IN 0 NC_01 NC_02 NC_03 OUT N001 N002 0 N005 N004 NC_04 N001 IN NC_05 NC_06 N003 LTM4651 ;pnba VOUT-)PGND)VIN)COMPB)RUN)GND)CLKIN)PGOOD)PGDFB)SVOUT-)VinREG)FSET)GNDSNS)ISETA)COMPA)EXTVCC)INTVCC)SVIN)SW)ISETB)VD
R1 N005 OUT 481K
Rload OUT 0 12
R2 N002 OUT 90.9K
C3 OUT 0 22 Rser=1m
V1 IN 0 24
C2 N003 OUT 4.7
.tran .6m startup
.lib LTM4651.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1176 756
WIRE -48 -176 -96 -176
WIRE -16 -176 -48 -176
WIRE 128 -176 -16 -176
WIRE 224 -176 128 -176
WIRE 336 -144 16 -144
WIRE -96 -112 -96 -176
WIRE 128 -112 128 -176
WIRE 224 -112 224 -176
WIRE 336 -112 336 -144
WIRE 16 -48 16 -144
WIRE 48 -48 16 -48
WIRE 544 -48 512 -48
WIRE -96 -16 -96 -32
WIRE -16 48 -16 -176
WIRE 48 48 -16 48
WIRE 544 48 512 48
WIRE -64 240 -96 240
WIRE 48 240 16 240
WIRE 560 240 512 240
WIRE 560 256 560 240
WIRE 560 336 560 320
WIRE 560 336 512 336
WIRE 656 336 560 336
WIRE 704 336 656 336
WIRE 752 336 704 336
WIRE 656 352 656 336
WIRE 752 352 752 336
WIRE 48 432 16 432
WIRE 560 432 560 336
WIRE 560 432 512 432
WIRE 656 448 656 416
WIRE 752 448 752 432
WIRE 16 528 16 432
WIRE 48 528 16 528
WIRE 288 608 288 592
WIRE 160 624 160 592
WIRE -96 704 -96 240
WIRE 288 704 288 688
WIRE 288 704 -96 704
WIRE 560 704 560 432
WIRE 560 704 288 704
SYMBOL voltage -96 -128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 544 256 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL res 272 592 R0
SYMATTR InstName R1
SYMATTR Value 481K
SYMBOL cap 640 352 R0
SYMATTR InstName C3
SYMATTR Value 22
SYMATTR SpiceLine Rser=1m
SYMBOL res 736 336 R0
SYMATTR InstName Rload
SYMATTR Value 12
SYMBOL LTM4651 288 240 R0
SYMATTR InstName U1
SYMBOL res 32 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 90.9K
FLAG -96 -16 0
FLAG 160 624 0
FLAG 752 448 0
FLAG 544 -48 0
FLAG 544 48 0
FLAG -48 -176 IN
FLAG 704 336 OUT
FLAG 656 448 0
TEXT 624 696 Left 2 !.tran .6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1a6c2032ffd9_nordecoder4.asc
* Generated by LTspice 26.0.1 for Windows.
M9 N008 N007 VDD VDD PMOS
M11 N008 N007 0 0 NMOS
M1 N003 N002 0 0 NMOS
M7 N005 N008 0 0 NMOS
M6 N004 N007 0 0 NMOS
M4 N006 N001 0 0 NMOS
M8 N006 N007 0 0 NMOS
V1 N001 0 V
R4 VDD N006 R
V2 N007 0 V
M5 N003 N008 0 0 NMOS
R1 VDD N003 R
R2 VDD N004 R
R3 VDD N005 R
M10 N002 N001 VDD VDD PMOS
V3 VDD 0 V
M2 N004 N002 0 0 NMOS
M12 N002 N001 0 0 NMOS
M3 N005 N001 0 0 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -208 -32 -208 -112
WIRE -208 -32 -336 -32
WIRE 48 -32 -160 -32
WIRE -160 -16 -160 -32
WIRE -208 64 -208 -32
WIRE 512 80 -16 80
WIRE 704 80 512 80
WIRE -208 128 -208 64
WIRE -16 128 -16 80
WIRE -16 128 -208 128
WIRE 160 128 160 16
WIRE 160 128 144 128
WIRE 368 128 368 16
WIRE 368 128 336 128
WIRE 576 128 576 16
WIRE 576 128 560 128
WIRE 768 128 768 16
WIRE 768 128 752 128
WIRE 512 208 512 80
WIRE 704 208 704 80
WIRE 48 256 48 -32
WIRE 96 256 96 208
WIRE 96 256 48 256
WIRE 288 256 288 208
WIRE 288 256 96 256
WIRE 160 336 160 128
WIRE 160 336 144 336
WIRE 368 336 368 128
WIRE 368 336 336 336
WIRE 576 336 576 128
WIRE 576 336 560 336
WIRE 768 336 768 128
WIRE 768 336 752 336
WIRE -240 368 -336 368
WIRE -208 368 -208 272
WIRE -208 368 -240 368
WIRE -160 368 -160 352
WIRE 48 368 -160 368
WIRE 48 416 48 368
WIRE 96 416 48 416
WIRE -208 448 -208 368
WIRE 48 480 48 416
WIRE 512 480 512 416
WIRE 512 480 48 480
WIRE -240 512 -240 368
WIRE 288 512 288 416
WIRE 288 512 -240 512
WIRE 704 512 704 416
WIRE 704 512 288 512
IOPIN 160 -64 In
IOPIN 368 -64 In
IOPIN 576 -64 In
IOPIN 768 -64 In
IOPIN -160 256 In
IOPIN -160 -128 In
IOPIN -688 176 Out
SYMBOL nmos 704 128 R0
SYMATTR InstName M4
SYMBOL res 144 -80 R0
SYMATTR InstName R1
SYMBOL res 560 -80 R0
SYMATTR InstName R3
SYMBOL pmos -208 352 M180
SYMATTR InstName M9
SYMBOL voltage -336 -48 R0
SYMATTR InstName V1
SYMBOL voltage -688 160 R0
SYMATTR InstName V3
SYMBOL nmos 96 336 R0
SYMATTR InstName M5
SYMBOL nmos 288 128 R0
SYMATTR InstName M2
SYMBOL pmos -208 -32 M180
SYMATTR InstName M10
SYMBOL res 752 -80 R0
SYMATTR InstName R4
SYMBOL nmos 704 336 R0
SYMATTR InstName M8
SYMBOL nmos 512 128 R0
SYMATTR InstName M3
SYMBOL nmos -208 368 R0
SYMATTR InstName M11
SYMBOL res 352 -80 R0
SYMATTR InstName R2
SYMBOL voltage -336 352 R0
SYMATTR InstName V2
SYMBOL nmos 96 128 R0
SYMATTR InstName M1
SYMBOL nmos -208 -16 R0
SYMATTR InstName M12
SYMBOL nmos 512 336 R0
SYMATTR InstName M7
SYMBOL nmos 288 336 R0
SYMATTR InstName M6
FLAG 144 224 0
FLAG 336 224 0
FLAG 560 224 0
FLAG 752 224 0
FLAG 752 432 0
FLAG 560 432 0
FLAG 336 432 0
FLAG 144 432 0
FLAG 160 -64 VDD
FLAG 368 -64 VDD
FLAG 576 -64 VDD
FLAG 768 -64 VDD
FLAG -160 256 VDD
FLAG -160 -128 VDD
FLAG -160 464 0
FLAG -160 80 0
FLAG -688 176 VDD
FLAG -336 48 0
FLAG -336 448 0
FLAG -688 256 0
* Z:\home\khalils\Downloads\files\data\raw_asc\0ea5a9142b8a_mosswitchA2.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N002 N001 PULSE(-500 500 100m 5m 5m 100m 210m)
M1 N004 N003 N001 N001 PMOS
R1 N004 0 100
R2 N003 N002 10k
V1 N001 0 17
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 872
WIRE 368 -208 -128 -208
WIRE 368 -96 368 -208
WIRE 368 -96 80 -96
WIRE 368 -32 368 -96
WIRE 160 -16 80 -16
WIRE 320 -16 240 -16
WIRE 368 160 368 64
WIRE -128 176 -128 -208
WIRE -128 272 -128 256
WIRE 368 272 368 240
WIRE 368 272 -128 272
WIRE 528 272 368 272
WIRE -128 288 -128 272
SYMBOL voltage 80 0 R180
WINDOW 3 -803 109 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(-500 500 100m 5m 5m 100m 210m)
SYMBOL pmos 320 64 M180
SYMATTR InstName M1
SYMBOL res 256 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 352 144 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage -128 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 17
FLAG -128 288 0
TEXT -2 312 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\3110f4ed885e_N-_E_Mosfet.asc
* Generated by LTspice 26.0.1 for Windows.
* S
* Enhancement Mode N Channel
M1 N001 N002 0 0 NMOS
Vds N001 0 5
Vgs N002 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vds 0 5 0.1 Vgs 3 5 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 528 128 336 128
WIRE 288 208 128 208
WIRE 320 208 288 208
WIRE 128 336 128 288
WIRE 336 336 336 224
WIRE 336 336 128 336
WIRE 528 336 528 208
WIRE 528 336 336 336
WIRE 336 368 336 336
SYMBOL nmos 288 128 R0
SYMATTR InstName M1
SYMBOL voltage 528 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vds
SYMATTR Value 5
SYMBOL voltage 128 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vgs
SYMATTR Value 5
FLAG 336 368 0
TEXT 96 392 Left 2 !.dc Vds 0 5 0.1 Vgs 3 5 1
TEXT 432 336 Top 2 ;S
TEXT 104 72 Left 2 ;Enhancement Mode N Channel
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1575-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1575-2.8.asy)
M3 N001 N003 OUT OUT IRFZ24
I2 OUT 0 PULSE(.2 5 300u 100n 100n 300u 600u) load
V2 N002 0 12
C2 N004 0 10p
C3 N005 0 1000p
V1 N001 0 5
R3 N004 N005 5K
C1 OUT 0 24
XU1 0 N002 0 OUT N004 N003 N001 N001 LT1575-2.8 ;pnba SHDN)Vin)GND)OUT)Comp)Gate)Ineg)Ipos
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m
.lib LT1575.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4232 1996
WIRE 2352 -32 2336 -32
WIRE 2688 -32 2640 -32
WIRE 2928 -32 2688 -32
WIRE 3008 -32 2928 -32
WIRE 3008 -16 3008 -32
WIRE 2352 64 2240 64
WIRE 2688 64 2688 -32
WIRE 2688 64 2640 64
WIRE 2240 80 2240 64
WIRE 2928 80 2928 -32
WIRE 3008 80 3008 64
WIRE 2352 160 2336 160
WIRE 2880 160 2640 160
WIRE 2240 176 2240 160
WIRE 2352 256 2336 256
WIRE 2672 256 2640 256
WIRE 2704 256 2672 256
WIRE 2816 256 2784 256
WIRE 2672 272 2672 256
WIRE 2816 272 2816 256
WIRE 2672 352 2672 336
WIRE 2816 352 2816 336
WIRE 2336 400 2336 256
WIRE 2928 400 2928 176
WIRE 2928 400 2336 400
WIRE 3056 400 2928 400
WIRE 2928 416 2928 400
WIRE 3056 416 3056 400
WIRE 2928 512 2928 480
WIRE 3056 512 3056 496
SYMBOL nmos 2880 80 R0
SYMATTR InstName M3
SYMATTR Value IRFZ24
SYMBOL cap 2656 272 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL LT1575-2.8 2496 112 R0
SYMATTR InstName U1
SYMBOL cap 2800 272 R0
SYMATTR InstName C3
SYMATTR Value 1000p
SYMBOL current 3056 416 R0
WINDOW 123 0 0 Left 2
WINDOW 39 46 42 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I2
SYMATTR Value PULSE(.2 5 300u 100n 100n 300u 600u)
SYMBOL voltage 2240 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL cap 2912 416 R0
SYMATTR InstName C1
SYMATTR Value 24
SYMBOL voltage 3008 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2688 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 5K
FLAG 2928 512 0
FLAG 3056 512 0
FLAG 3008 80 0
FLAG 2816 352 0
FLAG 2672 352 0
FLAG 2336 -32 0
FLAG 2240 176 0
FLAG 2336 160 0
FLAG 3056 400 OUT
TEXT 3288 576 Left 2 !.tran 1m
* Z:\tmp\asc_dec_bjh7r6w2\06bf507b6e5a_1217_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V2 -V 0 -15
XU1 IN N001 +V -V N002 LT1217 ;pnba In+)In-)V+)V-)OUT
R2 N001 0 3K
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1217.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 416 64 416 48
WIRE 544 64 544 48
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE 416 160 416 144
WIRE 544 160 544 144
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 304 240 256 240
WIRE 432 240 384 240
WIRE 624 240 528 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL voltage 416 48 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL opamps\\LT1217 192 176 R0
SYMATTR InstName U1
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 3K
FLAG 544 160 0
FLAG 192 192 +V
FLAG 544 48 +V
FLAG 192 288 -V
FLAG 416 160 0
FLAG 416 48 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 0 256 IN
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8643S.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N004 0 41.2K
V1 IN 0 24
L1 N005 OUT 3.3 Rser=10m
C4 OUT 0 47 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
R2 OUT N007 1Meg
R3 N007 0 243K
C5 OUT N007 4.7p
Rload OUT 0 835m
C1 N006 0 1n
XU1 OUT N003 NC_01 IN NC_02 0 N002 N005 0 0 N007 NC_03 IN IN N004 N006 NC_04 LT8643S ;pnba BIAS)INTVcc)BST)VIN1)CLKOUT)GND1)VC)SW)GND)GND2)FB)PG)VIN2)EN/UV)RT)TR/SS)SYNC/MODE
C6 N002 N001 330p
R4 N001 0 8.45K
C2 N003 0 1
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8643S.asy)
.lib LT8643S.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1848 740
WIRE 80 -80 -32 -80
WIRE 256 -80 80 -80
WIRE 432 -80 256 -80
WIRE -32 -64 -32 -80
WIRE 256 -64 256 -80
WIRE 80 0 80 -80
WIRE 112 0 80 0
WIRE 432 0 432 -80
WIRE 432 0 400 0
WIRE -32 32 -32 16
WIRE 112 80 80 80
WIRE 432 80 400 80
WIRE -64 160 -80 160
WIRE 32 160 16 160
WIRE 112 160 96 160
WIRE 32 240 0 240
WIRE 112 240 96 240
WIRE 544 240 400 240
WIRE 16 400 0 400
WIRE 112 400 96 400
WIRE 432 400 400 400
WIRE 544 400 544 240
WIRE 544 400 512 400
WIRE 656 400 544 400
WIRE 752 400 656 400
WIRE 848 400 752 400
WIRE 656 416 656 400
WIRE 752 416 752 400
WIRE 848 416 848 400
WIRE 32 480 0 480
WIRE 112 480 96 480
WIRE 544 480 400 480
WIRE 656 480 656 464
WIRE 656 480 544 480
WIRE 544 496 544 480
WIRE 752 512 752 480
WIRE 848 512 848 496
WIRE 304 560 304 544
WIRE 544 592 544 576
FLAG 304 560 0
FLAG 0 400 0
FLAG -32 32 0
FLAG 752 512 0
FLAG 544 592 0
FLAG 848 512 0
FLAG 848 400 OUT
FLAG -32 -80 IN
FLAG 80 80 0
FLAG 432 80 0
FLAG 0 480 0
FLAG -80 160 0
FLAG 0 240 0
SYMBOL res 112 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 41.2K
SYMBOL voltage -32 -80 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL ind 416 416 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=10m
SYMBOL cap 736 416 R0
WINDOW 0 40 17 Left 2
SYMATTR InstName C4
SYMATTR Value 47
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL res 528 384 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 528 480 R0
SYMATTR InstName R3
SYMATTR Value 243K
SYMBOL cap 640 400 R0
WINDOW 0 32 17 Left 2
SYMATTR InstName C5
SYMATTR Value 4.7p
SYMBOL res 832 400 R0
SYMATTR InstName Rload
SYMATTR Value 835m
SYMBOL cap 96 496 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL LT8643S 256 240 R0
SYMATTR InstName U1
SYMBOL cap 96 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C6
SYMATTR Value 330p
SYMBOL res 32 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 8.45K
SYMBOL cap 96 256 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
TEXT 704 576 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3015.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3015.asy)
XU1 IN IN 0 OUT N002 LT3015 ;pnba _SHDN)IN)GND)OUT)ADJ
S1 0 OUT N001 0 LOAD
V1 IN 0 -10
V2 N001 0 PULSE(0 1 50u 1u 1u 75u)
C1 OUT 0 10 Rser=.1
R1 OUT N002 10.5K
R2 N002 0 3.4K
.tran 250u
.model LOAD SW(Ron=3.3 Roff=33 Vt=.5 Vh=-.4)
.lib LT3015.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1200 680
WIRE 64 128 -80 128
WIRE 80 128 64 128
WIRE 432 128 368 128
WIRE 544 128 432 128
WIRE 640 128 544 128
WIRE -80 144 -80 128
WIRE 432 144 432 128
WIRE 544 144 544 128
WIRE 640 144 640 128
WIRE 848 160 688 160
WIRE 944 160 928 160
WIRE -80 240 -80 224
WIRE 64 240 64 128
WIRE 80 240 64 240
WIRE 432 240 432 224
WIRE 432 240 368 240
WIRE 544 240 544 208
WIRE 640 240 640 224
WIRE 432 256 432 240
WIRE 224 320 224 304
WIRE 432 352 432 336
SYMBOL cap 528 144 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=.1
SYMBOL sw 640 240 R180
WINDOW 0 -19 98 Right 2
WINDOW 3 -21 1 Right 2
SYMATTR InstName S1
SYMATTR Value LOAD
SYMBOL res 416 240 R0
SYMATTR InstName R2
SYMATTR Value 3.4K
SYMBOL voltage -80 128 R0
SYMATTR InstName V1
SYMATTR Value -10
SYMBOL res 416 128 R0
SYMATTR InstName R1
SYMATTR Value 10.5K
SYMBOL voltage 832 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 50u 1u 1u 75u)
SYMBOL PowerProducts\\LT3015 224 192 R0
SYMATTR InstName U1
FLAG 432 352 0
FLAG 224 320 0
FLAG -80 240 0
FLAG 544 240 0
FLAG 640 240 0
FLAG -80 128 IN
FLAG 640 128 OUT
FLAG 688 208 0
FLAG 944 160 0
TEXT 480 376 Left 2 !.tran 250u\n.model LOAD SW(Ron=3.3 Roff=33 Vt=.5 Vh=-.4)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3008-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3008-1.8.asy)
Rload OUT 0 180
C1 OUT 0 1
XU1 IN OUT OUT 0 IN LT3008-1.8 ;pnba IN)OUT)Sense)GND)_SHDN
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LT3008-1.8 176 96 R0
SYMATTR InstName U1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 180
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 336 248 Left 2 !.tran 1