Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0ea635167fa3_LED_strip_drive_push-pull.asc
* Generated by LTspice 26.0.1 for Windows.
R3 Vcc N002 10k
Q3 0 N001 N003 0 2N2907
R4 Vcc d 1440
Q4 Vcc N001 N003 0 2N2222
R2 Vcc N001 10k
M1 d N003 0 0 IRF530
Q1 N002 N004 0 0 2N2222
R1 N004 PWM 47k
V2 Vcc 0 12
V1 PWM 0 PULSE(0 5 .2m 1n 1n 0.05m .1m)
Q2 N001 N002 0 0 2N2222
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 1m 0 1u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE 256 -208 0 -208
WIRE 352 -208 256 -208
WIRE 512 -208 352 -208
WIRE 800 -208 512 -208
WIRE 0 -176 0 -208
WIRE 800 -160 800 -208
WIRE 352 -112 352 -128
WIRE 400 -112 352 -112
WIRE 512 -96 512 -208
WIRE 352 -80 352 -112
WIRE 448 -48 432 -48
WIRE 800 -48 800 -80
WIRE 256 -32 256 -128
WIRE 288 -32 256 -32
WIRE 256 0 256 -32
WIRE 512 32 512 0
WIRE 752 32 512 32
WIRE 32 48 -64 48
WIRE 192 48 112 48
WIRE 400 48 400 -112
WIRE 432 48 432 -48
WIRE 432 48 400 48
WIRE 512 64 512 32
WIRE -64 96 -64 48
WIRE 432 112 432 48
WIRE 448 112 432 112
WIRE 256 192 256 96
WIRE 352 192 352 16
WIRE 352 192 256 192
WIRE 512 192 512 160
WIRE 768 192 512 192
WIRE 800 192 800 48
WIRE 800 192 768 192
WIRE -64 224 -64 176
WIRE 256 224 256 192
WIRE 768 224 768 192
SYMBOL res 336 -224 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL pnp 448 160 M180
SYMATTR InstName Q3
SYMATTR Value 2N2907
SYMBOL voltage 0 -192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL npn 448 -96 R0
SYMATTR InstName Q4
SYMATTR Value 2N2222
SYMBOL npn 192 0 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL nmos 752 -48 R0
SYMATTR InstName M1
SYMATTR Value IRF530
SYMBOL npn 288 -80 R0
SYMATTR InstName Q2
SYMATTR Value 2N2222
SYMBOL voltage -64 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 .2m 1n 1n 0.05m .1m)
SYMBOL res 128 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 47k
SYMBOL res 784 -176 R0
SYMATTR InstName R4
SYMATTR Value 1440
SYMBOL res 240 -224 R0
SYMATTR InstName R3
SYMATTR Value 10k
FLAG -64 224 0
FLAG 256 224 0
FLAG 0 -96 0
FLAG 768 224 0
FLAG -64 48 PWM
FLAG 0 -208 Vcc
FLAG 800 -48 d
TEXT -96 280 Left 2 !.tran 0 1m 0 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP166-ADJ.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP166-ADJ.asy)
Rload OUT 0 330
C1 OUT 0 1
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
R1 OUT N002 230K
XU1 IN 0 N001 OUT N002 ADP16xa ;pnba Vin)GND)En)Vout)Adj
R2 N002 0 100K
V1 IN 0 5
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 432 96 352 96
WIRE 544 96 432 96
WIRE 624 96 544 96
WIRE -64 112 -64 96
WIRE 432 112 432 96
WIRE 544 112 544 96
WIRE 624 112 624 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 432 208 432 192
WIRE 432 208 352 208
WIRE 544 208 544 176
WIRE 624 208 624 192
WIRE 16 224 16 208
WIRE 432 224 432 208
WIRE 256 272 256 256
WIRE 16 320 16 304
WIRE 432 320 432 304
SYMBOL ADP166-ADJ 256 208 R0
SYMATTR InstName U1
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 528 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 416 208 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL res 608 96 R0
SYMATTR InstName Rload
SYMATTR Value 330
SYMBOL res 416 96 R0
SYMATTR InstName R1
SYMATTR Value 230K
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
FLAG -64 208 0
FLAG 256 272 0
FLAG 432 320 0
FLAG 544 208 0
FLAG 624 208 0
FLAG 624 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\34c5c32c0db0_nand.asc
* Generated by LTspice 26.0.1 for Windows.
* Parametres requis: \nll=longueur \nwn=largeur_nmos \nwp=largeur_pmos
M3 vdd in2 Q N002 PMOS l={ll} w={wp} ad={450n*{wp}} as={450n*{wp}} pd={900n+{wp}} ps={1080n+{wp}}
M1 vdd in1 Q N001 PMOS l={ll} w={wp} ad={450n*{wp}} as={450n*{wp}} pd={900n+{wp}} ps={1080n+{wp}}
M4 N004 in2 vss N005 NMOS l={ll} w={2*wn} ad={450n*{wn}} as={450n*{wn}} pd={900n+{wn}} ps={1080n+{wn}}
M2 Q in1 N004 N003 NMOS l={ll} w={2*wn} ad={450n*{wn}} as={450n*{wn}} pd={900n+{wn}} ps={1080n+{wn}}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib BU_180nm.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1192 836
WIRE 608 160 448 160
WIRE 448 176 448 160
WIRE 448 240 448 176
WIRE 608 240 608 160
WIRE 448 288 448 256
WIRE 608 288 608 256
WIRE 448 384 448 336
WIRE 608 384 608 336
WIRE 608 384 448 384
WIRE 448 416 448 384
WIRE 448 464 448 416
WIRE 448 544 448 512
WIRE 448 624 448 560
WIRE 448 704 448 672
WIRE 448 752 448 720
SYMBOL pmos4 400 240 R0
SYMATTR InstName M1
SYMATTR Value2 l={ll} w={wp} ad={450n*{wp}} as={450n*{wp}} pd={900n+{wp}} ps={1080n+{wp}}
SYMBOL nmos4 400 624 R0
SYMATTR InstName M4
SYMATTR Value2 l={ll} w={2*wn} ad={450n*{wn}} as={450n*{wn}} pd={900n+{wn}} ps={1080n+{wn}}
SYMBOL nmos4 400 464 R0
SYMATTR InstName M2
SYMATTR Value2 l={ll} w={2*wn} ad={450n*{wn}} as={450n*{wn}} pd={900n+{wn}} ps={1080n+{wn}}
SYMBOL pmos4 560 240 R0
SYMATTR InstName M3
SYMATTR Value2 l={ll} w={wp} ad={450n*{wp}} as={450n*{wp}} pd={900n+{wp}} ps={1080n+{wp}}
FLAG 448 176 vdd
FLAG 448 416 Q
FLAG 400 320 in1
FLAG 560 320 in2
FLAG 400 544 in1
FLAG 400 704 in2
FLAG 448 752 vss
TEXT -264 120 Left 2 !.lib BU_180nm.lib
TEXT 936 136 Left 2 ;Parametres requis: \nll=longueur \nwn=largeur_nmos \nwp=largeur_pmos
* Z:\tmp\asc_dec_bjh7r6w2\05361c32bfeb_src_5th_eq_vo-vg_and_Zin_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V_SNS_IS N003 N001 0
B4 N010 N009 V= 2 * {kc} * V(Vo)
R3 0 N009 {Rc}
L2 0 N007 {L}
R1 Vo 0 {RL}
B7 N003 N002 I={Omega_s * C } * V(V_SNS_VC)
C2 N003 N002 {C}
B3 N004 N005 V=2* {ks} * V(Vo)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2152 800
WIRE 544 -336 384 -336
WIRE 544 -288 544 -336
WIRE -80 -240 -176 -240
WIRE 48 -240 0 -240
WIRE 48 -224 48 -240
WIRE -64 -192 -192 -192
WIRE 80 -192 -16 -192
WIRE 544 -160 544 -208
WIRE -192 -128 -192 -192
WIRE -80 -128 -192 -128
WIRE 80 -128 80 -192
WIRE 80 -128 -16 -128
WIRE -192 -16 -192 -128
WIRE -192 -16 -368 -16
WIRE -80 -16 -192 -16
WIRE 80 -16 80 -128
WIRE 80 -16 0 -16
WIRE 192 -16 80 -16
WIRE 384 -16 384 -336
WIRE 384 -16 272 -16
WIRE 800 -16 688 -16
WIRE 1040 -16 800 -16
WIRE 1152 -16 1040 -16
WIRE 1200 -16 1152 -16
WIRE 544 32 544 -80
WIRE 1152 48 1152 -16
WIRE 688 64 688 -16
WIRE 1040 64 1040 -16
WIRE -768 144 -768 112
WIRE -144 144 -768 144
WIRE 544 144 544 112
WIRE 544 144 -144 144
WIRE -144 176 -144 144
WIRE 544 176 544 144
WIRE 688 208 688 144
WIRE 800 208 688 208
WIRE 1040 208 1040 128
WIRE 1040 208 800 208
WIRE 1152 208 1152 128
WIRE 1152 208 1040 208
WIRE 688 240 688 208
WIRE -848 256 -848 96
WIRE -848 256 -976 256
WIRE -768 320 -768 144
WIRE -672 320 -768 320
WIRE -464 320 -592 320
WIRE 384 320 256 320
WIRE 544 352 544 256
WIRE 544 496 544 432
WIRE 384 640 384 320
WIRE 544 640 544 576
WIRE 544 640 384 640
SYMBOL voltage 176 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V_SNS_IS
SYMATTR Value 0
SYMBOL bv 544 448 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName B4
SYMATTR Value V= 2 * {kc} * V(Vo)
SYMBOL res 528 160 R0
SYMATTR InstName R3
SYMATTR Value {Rc}
SYMBOL ind -688 336 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value {L}
SYMBOL res 1136 32 R0
SYMATTR InstName R1
SYMATTR Value {RL}
SYMBOL bi2 -80 -16 R270
WINDOW 0 32 40 VTop 2
WINDOW 3 -32 40 VBottom 2
SYMATTR InstName B7
SYMATTR Value I={Omega_s * C } * V(V_SNS_VC)
SYMBOL cap -16 -144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {C}
SYMBOL bv 544 -176 R0
SYMATTR InstName B3
SYMATTR Value V=2* {ks} * V(Vo)
FLAG -144 176 0
FLAG 688 240 0
FLAG 1200 -16 Vo
FLAG 48 -224 0
FLAG -176 -240 V_SNS_VS
* Z:\tmp\asc_dec_bjh7r6w2\058ed4f42be8_Fig18_20_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 Vinm N003 0 N_50n l=50n w=500n
M2 N002 Vinp N003 0 N_50n l=50n w=500n
M4 VDD N001 N002 VDD P_50n l=50n w=1u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1496 680
WIRE 576 -544 576 -592
WIRE 576 -432 576 -448
WIRE 576 -416 576 -432
WIRE 576 -288 576 -320
WIRE 688 -464 624 -464
WIRE 688 -432 576 -432
WIRE 688 -432 688 -464
WIRE 688 -192 688 -432
WIRE 752 -288 576 -288
WIRE 880 -464 688 -464
WIRE 928 -544 928 -592
WIRE 928 -432 928 -448
WIRE 928 -416 928 -432
WIRE 928 -288 752 -288
WIRE 928 -288 928 -320
WIRE 1136 -432 928 -432
WIRE 1136 -432 1136 -480
WIRE 1136 -320 1136 -432
SYMBOL nmos4 528 -416 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 976 -416 M0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M2
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL pmos4 880 -544 R0
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M4
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
FLAG 576 -368 0
FLAG 576 -496 VDD
FLAG 576 -592 VDD
FLAG 928 -496 VDD
FLAG 928 -368 0
FLAG 928 -592 VDD
FLAG 528 -336 Vinm
FLAG 976 -336 Vinp
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7182-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7182-5.0.asy)
V1 IN 0 -8
C2 OUT 0 2.2
XU1 OUT MP_01 MP_02 N001 MP_03 0 IN ADP7182-x.x Rset=1Meg ;pnba Vout)))EN))GND)Vin
R1 OUT 0 50
V2 N001 0 PULSE(0 2 200u 1n 1n 10m)
C1 IN 0 2.2
.tran 1m
.lib ADP7182-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 -80 -48
WIRE 112 -48 32 -48
WIRE 432 -48 368 -48
WIRE 544 -48 432 -48
WIRE -80 -32 -80 -48
WIRE 32 -32 32 -48
WIRE 432 -32 432 -48
WIRE 544 -32 544 -48
WIRE -80 64 -80 48
WIRE 32 64 32 32
WIRE 432 64 432 32
WIRE 544 64 544 48
WIRE 112 144 32 144
WIRE 32 160 32 144
WIRE 32 256 32 240
WIRE 240 256 240 208
SYMBOL ADP7182-5.0 240 48 R0
SYMATTR InstName U1
SYMBOL voltage -80 -48 R0
SYMATTR InstName V1
SYMATTR Value -8
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 2.2
SYMBOL cap 16 -32 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL res 528 -48 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL voltage 32 144 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 200u 1n 1n 10m)
FLAG -80 64 0
FLAG 32 64 0
FLAG 432 64 0
FLAG 32 256 0
FLAG 240 256 0
FLAG 544 64 0
FLAG 32 -48 IN
FLAG 432 -48 OUT
TEXT 528 248 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\a8f9e53bf3f8_pionch.asc
* Generated by LTspice 26.0.1 for Windows.
B1 D S I = Gain * (V(D)-V(S)) * V(G)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 112 16 112
WIRE 320 112 208 112
WIRE 160 208 160 160
FLAG 16 112 D
IOPIN 16 112 BiDir
FLAG 160 208 G
IOPIN 160 208 In
FLAG 320 112 S
IOPIN 320 112 BiDir
SYMBOL bi2 208 112 R90
WINDOW 0 -79 45 Invisible 2
WINDOW 3 -70 31 VTop 2
SYMATTR InstName B1
SYMATTR Value I = Gain * (V(D)-V(S)) * V(G)
* Z:\home\khalils\Downloads\files\data\raw_asc\2d604922a429_Fig_2-139_CSW.asc
* Generated by LTspice 26.0.1 for Windows.
R1 CONT 0 1
V2 N001 0 5
R2 OUT 0 100
W1 N001 OUT V1 MyCSW
V1 CONT 0 PULSE(-1 1 1m 4m 2m 1m 10m)
.model MyCSW CSW(Ron=1 Roff=1T It=0 Ih={TH})
.step param TH list 0.5 -1
.tran 20m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1024 680
WIRE 112 128 -48 128
WIRE 384 128 352 128
WIRE 480 128 384 128
WIRE -48 160 -48 128
WIRE 112 160 112 128
WIRE 352 160 352 128
WIRE 480 160 480 128
WIRE 112 256 112 240
WIRE 112 256 80 256
WIRE -48 272 -48 240
WIRE 352 272 352 240
WIRE 480 272 480 240
WIRE 112 288 112 256
WIRE 112 400 112 368
SYMBOL csw 112 160 R0
SYMATTR InstName W1
SYMATTR Value V1 MyCSW
SYMBOL voltage 352 144 R0
WINDOW 0 -21 17 Bottom 2
WINDOW 3 101 163 Top 2
WINDOW 123 0 0 Left 0
WINDOW 39 60 56 VTop 2
SYMATTR InstName V1
SYMATTR Value PULSE(-1 1 1m 4m 2m 1m 10m)
SYMBOL voltage -48 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 464 144 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL res 96 272 R0
SYMATTR InstName R2
SYMATTR Value 100
FLAG 352 272 0
FLAG 480 272 0
FLAG 384 128 CONT
FLAG 112 400 0
FLAG 80 256 OUT
FLAG -48 272 0
TEXT -48 56 Left 2 !.model MyCSW CSW(Ron=1 Roff=1T It=0 Ih={TH})
TEXT 320 80 Left 2 !.step param TH list 0.5 -1
TEXT -48 16 Left 2 !.tran 20m
* Z:\home\khalils\Downloads\files\data\raw_asc\5f20b6ab39f4_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N002 N004 N001 N001 Si7137DP
D1 N005 N001 BZX84C10L
R1 N001 N004 10K
D2 N005 N004 MURS120
R2 N002 0 0.5R
V1 N001 0 15
V2 N003 0 SINE(0 12 1 0.01)
R3 0 N007 10K
Q1 NC_01 NC_02 NC_03 0 2N2907
Q2 N006 N008 0 0 BC817-40
R4 N007 N008 1K
S1 N007 N001 N003 0 SW
R5 N006 N004 470R
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model SW SW(Ron=1 Roff=1Meg Vt=5 Vh=-4)
.tran 2s startup
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 680
WIRE -32 96 -224 96
WIRE 80 96 -32 96
WIRE 128 96 80 96
WIRE 192 96 128 96
WIRE 400 96 288 96
WIRE 128 112 128 96
WIRE -80 144 -144 144
WIRE 80 144 80 96
WIRE -224 176 -224 96
WIRE -144 176 -144 144
WIRE -32 176 -32 96
WIRE 400 176 400 96
WIRE -80 192 -80 144
WIRE 128 208 128 192
WIRE 208 208 208 144
WIRE 208 208 128 208
WIRE 80 240 80 208
WIRE 112 240 80 240
WIRE 208 240 208 208
WIRE 208 240 176 240
WIRE 208 256 208 240
WIRE -224 288 -224 256
WIRE 400 288 400 256
WIRE -144 304 -144 256
WIRE -80 304 -80 240
WIRE -80 304 -144 304
WIRE -144 336 -144 304
WIRE 208 352 208 336
WIRE 208 352 192 352
WIRE -32 400 -32 256
WIRE 0 400 -32 400
WIRE 128 400 80 400
WIRE -32 432 -32 400
WIRE 224 448 192 448
WIRE -32 560 -32 512
WIRE 224 608 224 448
FLAG 224 608 0
FLAG -144 336 0
FLAG -224 288 0
FLAG -32 560 0
FLAG 400 288 0
SYMBOL pmos 288 144 M270
SYMATTR InstName M1
SYMATTR Value Si7137DP
SYMBOL zener 96 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 -37 98 Left 2
SYMATTR InstName D1
SYMATTR Value BZX84C10L
SYMBOL res 112 96 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL diode 112 256 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value MURS120
SYMATTR Description Zener Diode
SYMATTR Type zener
SYMBOL res 384 160 R0
SYMATTR InstName R2
SYMATTR Value 0.5R
SYMBOL voltage -224 160 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -144 160 R0
SYMATTR InstName V2
SYMATTR Value SINE(0 12 1 0.01)
SYMBOL res -16 528 R180
WINDOW 0 36 76 Left 0
WINDOW 3 36 40 Left 0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL pnp 848 464 M180
SYMATTR InstName Q1
SYMATTR Value 2N2907
SYMBOL npn 128 352 R0
SYMATTR InstName Q2
SYMATTR Value BC817-40
SYMBOL res -16 416 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL sw -32 272 M180
SYMATTR InstName S1
SYMBOL res 224 352 R180
WINDOW 0 36 76 Left 0
WINDOW 3 36 40 Left 0
SYMATTR InstName R5
SYMATTR Value 470R
TEXT -312 16 Left 2 !.model SW SW(Ron=1 Roff=1Meg Vt=5 Vh=-4)
TEXT -304 40 Left 2 !.tran 2s startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1ae695552e20_2_resistenze.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 1000
V1 N001 0 10
R2 0 N002 2000
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 112 48 112
WIRE 208 112 160 112
WIRE 336 112 288 112
WIRE 48 240 48 112
WIRE 128 240 48 240
WIRE 336 240 336 112
WIRE 336 240 208 240
WIRE 336 272 336 240
SYMBOL res 176 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL voltage 112 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 304 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2000
FLAG 336 272 0
TEXT 46 306 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3060-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3060-1.8.asy)
C1 N002 0 10n
C3 OUT 0 10
XU1 N002 N001 OUT MP_01 IN MP_02 IN 0 LT3060-1.8 ;pnba Ref/Byp)ADJ)OUT))IN))_SHDN)GND
Rload OUT 0 18
C2 OUT N001 10n
V1 IN 0 12
.tran .1 startup
.lib LT3060-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 112 -16 112
WIRE 96 112 0 112
WIRE 112 112 96 112
WIRE 432 112 368 112
WIRE 544 112 432 112
WIRE 624 112 544 112
WIRE -16 128 -16 112
WIRE 544 128 544 112
WIRE 624 128 624 112
WIRE 432 144 432 112
WIRE -16 224 -16 208
WIRE 96 224 96 112
WIRE 112 224 96 224
WIRE 432 224 432 208
WIRE 432 224 368 224
WIRE 544 224 544 192
WIRE 624 224 624 208
WIRE 112 336 80 336
WIRE 400 336 368 336
WIRE 400 352 400 336
WIRE 400 432 400 416
SYMBOL cap 528 128 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res 608 112 R0
SYMATTR InstName Rload
SYMATTR Value 18
SYMBOL voltage -16 112 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 416 144 R0
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL PowerProducts\\LT3060-1.8 240 224 R0
SYMATTR InstName U1
SYMBOL cap 384 352 R0
SYMATTR InstName C1
SYMATTR Value 10n
FLAG 80 336 0
FLAG -16 224 0
FLAG 400 432 0
FLAG 544 224 0
FLAG 624 224 0
FLAG 624 112 OUT
FLAG 0 112 IN
TEXT 480 320 Left 2 !.tran .1 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8618.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8618.asy)
R1 N001 0 1K
V2 -V 0 -2.5
Rload OUT 0 2K
XU2 IN N001 +V -V OUT AD8618 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 1K
V1 +V 0 2.5
Vin IN 0 SINE(0 1 500K)
.tran 20u
.lib AD8618.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE 416 -1184 400 -1184
WIRE 512 -1184 496 -1184
WIRE 528 -1184 512 -1184
WIRE 624 -1184 608 -1184
WIRE 176 -1088 176 -1104
WIRE 272 -1088 272 -1104
WIRE 512 -1072 512 -1184
WIRE 528 -1072 512 -1072
WIRE 624 -1056 624 -1184
WIRE 624 -1056 592 -1056
WIRE 752 -1056 624 -1056
WIRE 528 -1040 416 -1040
WIRE 752 -1040 752 -1056
WIRE 416 -1024 416 -1040
WIRE 176 -992 176 -1008
WIRE 272 -992 272 -1008
WIRE 752 -944 752 -960
WIRE 416 -928 416 -944
SYMBOL voltage 272 -1104 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL AD8618 560 -1056 R0
SYMATTR InstName U2
SYMBOL res 736 -1056 R0
SYMATTR InstName Rload
SYMATTR Value 2K
SYMBOL res 624 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 416 -1040 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 500K)
SYMBOL voltage 176 -1104 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 512 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG 416 -928 0
FLAG 752 -1056 OUT
FLAG 416 -1040 IN
FLAG 560 -1088 +V
FLAG 560 -1024 -V
FLAG 400 -1184 0
FLAG 752 -944 0
FLAG 176 -1104 +V
FLAG 176 -992 0
FLAG 272 -1104 -V
FLAG 272 -992 0
TEXT 736 -856 Left 2 !.tran 20u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1878.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1878.asy)
C1 N003 0 220p
C2 OUT 0 47
Rload OUT 0 10
XU1 IN N003 N002 0 N001 IN IN LTC1878 ;pnba Run)Ith)FB)GND)SW)Vin)Mode
V1 IN 0 5
R2 N002 0 280K
C3 OUT N002 20p
L1 N001 OUT 10
R1 OUT N002 887K
.tran 750u startup
.lib LTC1878.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1084 700
WIRE 176 64 48 64
WIRE 352 64 176 64
WIRE 48 80 48 64
WIRE 352 80 352 64
WIRE 544 112 512 112
WIRE 656 112 624 112
WIRE 752 112 656 112
WIRE 880 112 752 112
WIRE 992 112 880 112
WIRE 656 128 656 112
WIRE 752 128 752 112
WIRE 880 128 880 112
WIRE 992 128 992 112
WIRE 176 144 176 64
WIRE 208 144 176 144
WIRE 512 144 512 112
WIRE 512 144 496 144
WIRE 48 176 48 160
WIRE 656 224 656 192
WIRE 656 224 496 224
WIRE 752 224 752 208
WIRE 752 224 656 224
WIRE 880 224 880 192
WIRE 992 224 992 208
WIRE 752 240 752 224
WIRE 176 304 176 144
WIRE 208 304 176 304
WIRE 512 304 496 304
WIRE 592 304 576 304
WIRE 752 336 752 320
WIRE 352 400 352 368
SYMBOL cap 640 128 R0
SYMATTR InstName C3
SYMATTR Value 20p
SYMBOL cap 512 320 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 220p
SYMBOL POWERPRODUCTS\\LTC1878 352 224 R0
SYMATTR InstName U1
SYMBOL polcap 864 128 R0
SYMATTR InstName C2
SYMATTR Value 47
SYMBOL RES 736 112 R0
SYMATTR InstName R1
SYMATTR Value 887K
SYMBOL ind 528 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL VOLTAGE 48 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 976 112 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL res 736 224 R0
SYMATTR InstName R2
SYMATTR Value 280K
FLAG 48 176 0
FLAG 352 400 0
FLAG 592 304 0
FLAG 880 224 0
FLAG 752 336 0
FLAG 992 224 0
FLAG 992 112 OUT
FLAG 48 64 IN
TEXT 808 400 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6404-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6404-2.asy)
R2 N009 N008 200
V2 N003 0 3.3
R1 N002 N001 200
C1 N006 0 .1
R4 N008 0 100
XU1 N008 N006 N003 N009 N002 0 N003 N001 N005 N007 LTC6404-2 ;pnba IN-)Vocm)V+)OUT+)OUT-)V-)_SHDN)IN+)OUTF-)OUTF+
R3 N001 N004 100
V1 N004 0 SINE(0 10m 10Meg)
.tran 1u
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 732
WIRE 208 -48 32 -48
WIRE 416 -48 288 -48
WIRE 192 32 128 32
WIRE 528 32 192 32
WIRE 128 48 128 32
WIRE 192 48 192 32
WIRE 528 48 528 32
WIRE 416 96 416 -48
WIRE 416 96 384 96
WIRE -320 144 -368 144
WIRE -144 144 -240 144
WIRE 32 144 32 -48
WIRE 32 144 -64 144
WIRE 80 144 32 144
WIRE 528 144 528 128
WIRE 416 160 384 160
WIRE -16 192 -32 192
WIRE 80 192 48 192
WIRE 416 224 384 224
WIRE -144 240 -192 240
WIRE 32 240 -64 240
WIRE 80 240 32 240
WIRE 416 288 384 288
WIRE 192 368 192 336
WIRE 32 432 32 240
WIRE 208 432 32 432
WIRE 416 432 416 288
WIRE 416 432 288 432
SYMBOL res 304 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL cap 48 176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL res -48 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL res -48 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL res 304 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL voltage 528 32 R0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL voltage -224 144 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 32 56 VTop 2
WINDOW 39 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10m 10Meg)
SYMBOL opamps\\LTC6404-2 208 192 R0
SYMATTR InstName U1
FLAG -32 192 0
FLAG -368 144 0
FLAG 528 144 0
FLAG -192 240 0
FLAG 192 368 0
TEXT 472 344 Left 2 !.tran 1u