Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\6d90ba9616a4_CurrentSink.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
V1 N005 0 PULSE(0 26 0 .2 .2 .3 1 1)
M1 N005 N004 N007 N007 AP9465GEM
V4 N002 0 1
V3 V 0 2.7
XU1 Vref N007 V 0 N006 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V2 Vref 0 .3
R1 N007 0 .1
R5 N004 N006 1000
R2 N005 N001 9K
XU2 N002 N001 V 0 N003 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
D1 N004 N003 1N914
R3 N001 0 1K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 1 0
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1252 680
WIRE 800 -176 -160 -176
WIRE 0 -128 -32 -128
WIRE -32 -96 -32 -128
WIRE 0 -48 0 -128
WIRE -32 -32 -256 -32
WIRE 64 -16 32 -16
WIRE 160 -16 128 -16
WIRE -160 0 -160 -176
WIRE -32 0 -160 0
WIRE -256 32 -256 -32
WIRE 0 80 0 16
WIRE 480 80 240 80
WIRE 656 80 480 80
WIRE 0 96 0 80
WIRE 656 112 656 80
WIRE 240 128 240 80
WIRE -256 160 -256 112
WIRE -128 192 -176 192
WIRE -32 192 -128 192
WIRE 64 208 32 208
WIRE 160 208 160 -16
WIRE 160 208 144 208
WIRE 192 208 160 208
WIRE 480 208 480 80
WIRE -32 224 -128 224
WIRE 656 240 656 192
WIRE 800 240 800 -176
WIRE 800 240 656 240
WIRE -384 272 -384 256
WIRE -128 320 -128 224
WIRE 240 320 240 224
WIRE 240 320 -128 320
WIRE 240 336 240 320
WIRE 656 352 656 240
WIRE -384 384 -384 272
WIRE -176 384 -176 192
WIRE -384 512 -384 464
WIRE -176 512 -176 464
WIRE -176 512 -384 512
WIRE 240 512 240 416
WIRE 240 512 -176 512
WIRE 352 512 240 512
WIRE 480 512 480 288
WIRE 480 512 352 512
WIRE 656 512 656 432
WIRE 656 512 480 512
WIRE 352 560 352 512
SYMBOL Opamps\\UniversalOpamp2 0 -16 M180
SYMATTR InstName U2
SYMBOL nmos 192 128 R0
SYMATTR InstName M1
SYMATTR Value AP9465GEM
SYMBOL diode 128 -32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL res 640 336 R0
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL Opamps\\UniversalOpamp2 0 208 M180
SYMATTR InstName U1
SYMBOL voltage -176 368 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value .3
SYMBOL voltage -384 368 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 2.7
SYMBOL res 224 320 R0
SYMATTR InstName R1
SYMATTR Value .1
SYMBOL voltage 480 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 26 0 .2 .2 .3 1 1)
SYMBOL res 160 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1000
SYMBOL voltage -256 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 1
SYMBOL res 640 96 R0
SYMATTR InstName R2
SYMATTR Value 9K
FLAG 352 560 0
FLAG 0 176 0
FLAG -384 272 V
FLAG 0 240 V
FLAG -128 192 Vref
FLAG -256 160 0
FLAG -32 -96 0
FLAG 0 80 V
TEXT -432 584 Left 2 !.tran 0 1 0
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8253.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8253.asy)
XU1 -IN 0 -VS N002 N001 -VS OUT +VS 0 +IN AD8253 ;pnba -IN)DGND)-VS)A0)A1)WR)OUT)+VS)REF)+IN
RL OUT 0 2k
E1 +IN 0 IN 0 0.5
VIN IN 0 SINE(0 10m 1k)
V+VS +VS 0 15
V-VS -VS 0 -15
VA0 N002 0 {A0}
VA1 N001 0 {A1}
E2 0 -IN IN 0 0.5
.tran 2m
.param A0 = table(index, 1, 0, 2, 5, 3, 0, 4, 5)
.param A1 = table(index, 1, 0, 2, 0, 3, 5, 4, 5)
.step param index list 1 2 3 4
.lib AD8253.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 916 680
WIRE 464 64 432 64
WIRE 464 80 464 64
WIRE 432 96 432 64
WIRE 432 208 432 176
WIRE 432 224 432 208
WIRE 368 240 -32 240
WIRE 400 240 368 240
WIRE -32 256 -32 240
WIRE -112 272 -192 272
WIRE -80 272 -112 272
WIRE 400 272 80 272
WIRE 400 304 208 304
WIRE 80 320 80 272
WIRE 208 320 208 304
WIRE 640 320 576 320
WIRE 400 336 320 336
WIRE 640 336 640 320
WIRE -80 352 -80 320
WIRE -32 352 -32 336
WIRE -32 352 -80 352
WIRE 0 352 -32 352
WIRE 320 352 320 336
WIRE -32 368 -32 352
WIRE 0 368 0 352
WIRE 368 368 352 368
WIRE 400 368 368 368
WIRE -112 384 -112 272
WIRE -80 384 -112 384
WIRE 368 400 352 400
WIRE 400 400 368 400
WIRE 512 400 512 384
WIRE 80 416 80 400
WIRE 208 416 208 400
WIRE -192 432 -192 272
WIRE 640 432 640 416
WIRE -80 448 -80 432
WIRE 432 448 432 416
WIRE -32 464 -32 448
WIRE 352 464 352 400
WIRE 352 464 -32 464
WIRE 432 464 432 448
WIRE -192 528 -192 512
WIRE 432 560 432 544
SYMBOL e -32 352 R0
WINDOW 0 38 46 Left 2
WINDOW 3 39 70 Left 2
SYMATTR InstName E2
SYMATTR Value 0.5
SYMBOL voltage 432 192 M180
WINDOW 0 37 69 Left 2
WINDOW 3 42 45 Left 2
SYMATTR InstName +VS
SYMATTR Value 15
SYMBOL e -32 240 R0
WINDOW 0 39 36 Left 2
WINDOW 3 41 66 Left 2
SYMATTR InstName E1
SYMATTR Value 0.5
SYMBOL voltage 80 304 R0
WINDOW 0 38 43 Left 2
WINDOW 3 41 71 Left 2
SYMATTR InstName VA1
SYMATTR Value {A1}
SYMBOL voltage 208 304 R0
WINDOW 0 39 44 Left 2
WINDOW 3 41 72 Left 2
SYMATTR InstName VA0
SYMATTR Value {A0}
SYMBOL res 624 320 R0
SYMATTR InstName RL
SYMATTR Value 2k
SYMBOL voltage -192 416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VIN
SYMATTR Value SINE(0 10m 1k)
SYMBOL voltage 432 448 R0
WINDOW 0 41 47 Left 2
WINDOW 3 37 69 Left 2
SYMATTR InstName -VS
SYMATTR Value -15
SYMBOL AD8253 432 320 R0
SYMATTR InstName U1
FLAG 432 560 0
FLAG 464 80 0
FLAG 512 400 0
FLAG 640 432 0
FLAG 432 448 -VS
FLAG 368 368 -VS
FLAG 320 352 0
FLAG 368 240 +IN
FLAG 368 400 -IN
FLAG 640 320 OUT
FLAG 432 208 +VS
FLAG -80 448 0
FLAG -192 272 IN
FLAG -192 528 0
FLAG 0 368 0
FLAG 80 416 0
FLAG 208 416 0
TEXT -224 584 Left 2 !.tran 2m
TEXT -216 136 Left 2 !.param A0 = table(index, 1, 0, 2, 5, 3, 0, 4, 5)\n.param A1 = table(index, 1, 0, 2, 0, 3, 5, 4, 5)\n.step param index list 1 2 3 4
* Z:\home\khalils\Downloads\files\data\raw_asc\3d359c4d7a30_AD8047.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8047.asy)
R2 OUT N001 200
XU1 IN N001 +V -V OUT AD8047 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
Rload OUT 0 150
V2 -V 0 -5
Vin IN 0 SINE(0 1 10Meg)
R1 N001 0 200
.tran 1u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1432 700
WIRE 560 -1184 544 -1184
WIRE 656 -1184 640 -1184
WIRE 672 -1184 656 -1184
WIRE 768 -1184 752 -1184
WIRE 320 -1088 320 -1104
WIRE 416 -1088 416 -1104
WIRE 656 -1072 656 -1184
WIRE 672 -1072 656 -1072
WIRE 768 -1056 768 -1184
WIRE 768 -1056 736 -1056
WIRE 896 -1056 768 -1056
WIRE 672 -1040 560 -1040
WIRE 896 -1040 896 -1056
WIRE 560 -1024 560 -1040
WIRE 320 -992 320 -1008
WIRE 416 -992 416 -1008
WIRE 896 -944 896 -960
WIRE 560 -928 560 -944
SYMBOL Opamps\\AD8047 704 -1120 R0
SYMATTR InstName U1
SYMBOL res 656 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL voltage 416 -1104 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 320 -1104 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 880 -1056 R0
SYMATTR InstName Rload
SYMATTR Value 150
SYMBOL res 768 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL voltage 560 -1040 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10Meg)
FLAG 560 -928 0
FLAG 896 -1056 OUT
FLAG 560 -1040 IN
FLAG 704 -1088 +V
FLAG 704 -1024 -V
FLAG 544 -1184 0
FLAG 896 -944 0
FLAG 320 -1104 +V
FLAG 320 -992 0
FLAG 416 -1104 -V
FLAG 416 -992 0
TEXT 912 -848 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\1b7d3982aac2_creating_center_tapped.asc
* Generated by LTspice 26.0.1 for Windows.
* Center Taped Transformer
R1 N001 N003 1k
L1 0 N002 10m
K1 L1 L2 L3 1
L2 0 N001 5m
V1 N002 0 SINE(0 10 1k) Rser=0.1
L3 0 N003 3m
.tran 3m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 480 -16 336 -16
WIRE 336 32 336 -16
WIRE 208 64 0 64
WIRE 480 96 480 -16
WIRE 0 112 0 64
WIRE 208 112 208 64
WIRE 336 144 336 112
WIRE 384 144 336 144
WIRE 384 176 384 144
WIRE 336 192 336 144
WIRE 0 240 0 192
WIRE 208 240 208 192
WIRE 208 240 0 240
WIRE 0 256 0 240
WIRE 336 304 336 272
WIRE 480 304 480 176
WIRE 480 304 336 304
SYMBOL ind 192 208 M180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value 10m
SYMATTR Type ind
SYMBOL ind 352 176 M0
SYMATTR InstName L3
SYMATTR Value 3m
SYMATTR Type ind
SYMBOL ind 352 128 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L2
SYMATTR Value 5m
SYMATTR Type ind
SYMBOL voltage 0 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10 1k)
SYMATTR SpiceLine Rser=0.1
SYMBOL res 464 80 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 384 176 0
FLAG 0 256 0
TEXT 48 264 Left 2 !K1 L1 L2 L3 1
TEXT 80 288 Left 2 !.tran 3m
TEXT 120 -64 Left 2 ;Center Taped Transformer
* Z:\home\khalils\Downloads\files\data\raw_asc\09a944ab809e_Fig11_4_long.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vout Vin 0 0 N_1u l=1u w=10u
Vin Vin 0 0
VDD VDD 0 5
M2 Vout Vin VDD VDD P_1u l=1u w=10u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vin 0 5
.include cmosedu_models.txt
* Plot Vout and Id(M1)
* 10/1
* 10/1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 680
WIRE 192 -368 192 -384
WIRE 192 -352 192 -368
WIRE 448 -304 448 -352
WIRE 400 -288 368 -288
WIRE 192 -240 192 -272
WIRE 320 -176 304 -176
WIRE 368 -176 368 -288
WIRE 368 -176 320 -176
WIRE 448 -176 448 -208
WIRE 624 -176 448 -176
WIRE 656 -176 624 -176
WIRE 208 -96 208 -112
WIRE 368 -96 368 -176
WIRE 400 -96 368 -96
WIRE 448 -32 448 -80
WIRE 208 0 208 -16
FLAG 208 0 0
FLAG 624 -176 Vout
FLAG 208 -112 Vin
FLAG 448 -128 0
FLAG 192 -240 0
FLAG 192 -368 VDD
FLAG 448 -256 VDD
FLAG 448 -32 0
FLAG 448 -352 VDD
FLAG 320 -176 Vin
SYMBOL nmos4 400 -176 R0
WINDOW 0 104 24 Right 2
WINDOW 3 179 41 Right 2
WINDOW 123 213 74 Right 2
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=1u w=10u
SYMBOL voltage 208 -112 R0
WINDOW 0 -72 21 Left 2
WINDOW 3 -60 74 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vin
SYMATTR Value 0
SYMBOL voltage 192 -368 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL pmos4 400 -208 M180
WINDOW 0 88 9 Right 2
WINDOW 3 168 20 Right 2
WINDOW 123 206 76 Right 2
SYMATTR InstName M2
SYMATTR Value P_1u
SYMATTR Value2 l=1u w=10u
TEXT 264 8 Left 2 !.dc Vin 0 5
TEXT 264 32 Left 2 !.include cmosedu_models.txt
TEXT 496 -360 Left 2 ;Plot Vout and Id(M1)
TEXT 344 -320 Left 2 ;10/1
TEXT 344 -72 Left 2 ;10/1
* Z:\home\khalils\Downloads\files\data\raw_asc\604dcace2bb1_Vbe_break.asc
* Generated by LTspice 26.0.1 for Windows.
*Choose Is of diode 10^-10 lower than Is of transistor
* With external diode
* With subcircuit
* Including Vbe Breakdown in Transistor Models\n \nThis requires an additional diode in parallel to the base and the emitter.\nChoose IS of the diode a factor of 10^-10 lower than IS of the transistor. \nThis avoids any impact on the normal transistor operation.
XQ2 0 N002 N004 Q2N2907 ;pnba C)B)E
R1 in N001 1k
D1 N003 N001 VBEDIO
Q1 0 N001 N003 0 2N2907
R3 in N002 1k
R2 N003 0 1k
D1 E B DEB
V1 in 0 0
R4 N004 0 1k
Q1 C B E 2N2907
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 -10 10 0.1
.MODEL VBEDIO D(Is=1e-24 BV=5 IBV=1m RS=20)
.SUBCKT Q2N2907 C B E
.MODEL DEB D(Is=1e-24 BV=5 IBV=1m RS=20)
.ENDS
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1480 744
WIRE 304 224 304 288
WIRE 304 480 -128 480
WIRE 208 208 208 176
WIRE 208 176 240 176
WIRE 208 176 48 176
WIRE -128 480 -128 304
WIRE -128 176 -128 224
WIRE -32 176 -128 176
WIRE -128 512 -128 480
WIRE 304 128 304 48
WIRE 304 48 448 48
WIRE 448 48 448 480
WIRE 448 480 304 480
WIRE 304 416 304 480
WIRE 208 272 208 288
WIRE 208 288 304 288
WIRE 304 288 304 336
WIRE 960 224 960 336
WIRE 816 176 896 176
WIRE 960 128 960 48
WIRE 960 48 1104 48
WIRE 1104 48 1104 480
WIRE 1104 480 960 480
WIRE 960 416 960 480
WIRE 736 176 672 176
WIRE 960 512 960 480
RECTANGLE Normal 416 320 96 96
SYMBOL res 288 320 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL diode 224 272 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D1
SYMATTR Value VBEDIO
SYMBOL res 720 192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL voltage -128 208 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL res 944 320 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL pnp 240 128 R0
SYMATTR InstName Q1
SYMATTR Value 2N2907
SYMBOL res -48 192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL pnp 896 128 R0
WINDOW 3 79 79 Left 0
SYMATTR Value Q2N2907
SYMATTR InstName Q2
SYMATTR Prefix X
FLAG -128 512 0
FLAG -128 176 in
FLAG 672 176 in
FLAG 960 512 0
TEXT -128 -200 Left 0 !.dc V1 -10 10 0.1
TEXT -144 -8 Left 0 !.MODEL VBEDIO D(Is=1e-24 BV=5 IBV=1m RS=20)
TEXT 640 -136 Left 0 !.SUBCKT Q2N2907  C B E\nQ1 C B E  2N2907\nD1 E B DEB\n*Choose Is of diode 10^-10 lower than Is of transistor\n.MODEL DEB D(Is=1e-24 BV=5 IBV=1m RS=20)\n.ENDS
TEXT -136 -56 Left 0 ;With external diode
TEXT 640 -184 Left 0 ;With subcircuit
TEXT -144 -424 Left 0 ;Including Vbe Breakdown in Transistor Models\n \nThis requires an additional diode in parallel to the base and the emitter.\nChoose IS of the diode a factor of 10^-10 lower than IS of the transistor. \nThis avoids any impact on the normal  transistor operation.
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX40110.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX40110.asy)
RL OUT 0 10k
CL OUT 0 15p
Vee 0 Vee 2.5
XU1 IN OUT Vcc Vee OUT Vcc MAX40110 ;pnba In+)In-)V+)V-)OUT)SHDN
Vcc Vcc 0 2.5
V1 IN 0 SINE(0 50m 100k)
.tran 10u
.lib MAX40110.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 64 288 64 272
WIRE 416 352 416 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 64 448 64 400
WIRE 416 448 416 416
WIRE 448 448 448 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 64 544 64 528
WIRE 304 592 304 576
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 10k
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL MAX40110 432 400 R0
SYMATTR InstName U1
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 100k)
FLAG 720 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
FLAG 448 448 Vcc
TEXT 16 632 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3218.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N001 N003 N004 IN N005 N005 IN 0 N002 IN LTC3218 ;pnba CP)CPO)ILED)ENT)IsetT)IsetF)ENF)GND)CM)Vin
C1 N001 N002 2.2
V1 IN 0 3.2
C2 N003 0 4.7
D1 N004 0 AOT-2015
R1 N005 0 10.2K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3218.asy)
.lib LTC3218.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 -48 176 -48
WIRE 272 -48 256 -48
WIRE 176 0 176 -48
WIRE 272 0 272 -48
WIRE 64 64 -32 64
WIRE 80 64 64 64
WIRE 432 64 368 64
WIRE -32 80 -32 64
WIRE 64 160 64 64
WIRE 80 160 64 160
WIRE 432 160 368 160
WIRE -32 176 -32 160
WIRE 432 176 432 160
WIRE 64 256 64 160
WIRE 80 256 64 256
WIRE 384 256 368 256
WIRE 176 352 176 336
WIRE 272 352 272 336
WIRE 272 352 176 352
WIRE 272 368 272 352
WIRE 272 464 272 448
FLAG -32 176 0
FLAG 384 256 0
FLAG 432 128 0
FLAG 432 240 0
FLAG 272 464 0
FLAG -32 64 IN
SYMBOL PowerProducts\\LTC3218 224 160 R0
SYMATTR InstName U1
SYMBOL cap 192 -32 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL voltage -32 64 R0
WINDOW 0 13 16 Left 2
WINDOW 3 15 95 Left 2
SYMATTR InstName V1
SYMATTR Value 3.2
SYMBOL cap 416 64 R0
WINDOW 0 31 11 Left 2
WINDOW 3 29 53 Left 2
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL LED 416 176 R0
WINDOW 0 26 -3 Left 2
WINDOW 3 31 69 Left 2
SYMATTR InstName D1
SYMATTR Value AOT-2015
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 256 352 R0
SYMATTR InstName R1
SYMATTR Value 10.2K
TEXT 400 360 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\6c28b3ac8ad1_Nand_gate.asc
* Generated by LTspice 26.0.1 for Windows.
V1 A 0 PULSE(0 5 0 5n 5n 40m 80m)
M2 N002 B 0 0 NMOS
M4 N001 A vout N001 PMOS
M1 vout A N002 0 NMOS
V2 B 0 PULSE(0 5 0 5n 5n 20m 40m)
M5 N001 B vout N001 PMOS
V3 N001 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 80m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 48 -2848 -176 -2848
WIRE -176 -2832 -176 -2848
WIRE -48 -2832 -176 -2832
WIRE -176 -2816 -176 -2832
WIRE -176 -2816 -272 -2816
WIRE -80 -2816 -176 -2816
WIRE -176 -2768 -176 -2816
WIRE -176 -2768 -272 -2768
WIRE -48 -2768 -48 -2832
WIRE -48 -2768 -80 -2768
WIRE -128 -2736 -224 -2736
WIRE -192 -2720 -272 -2720
WIRE -80 -2720 -192 -2720
WIRE -224 -2704 -224 -2736
WIRE -224 -2704 -288 -2704
WIRE -192 -2640 -192 -2720
WIRE -16 -2640 -192 -2640
WIRE -192 -2608 -192 -2640
WIRE -192 -2608 -208 -2608
WIRE -320 -2576 -320 -2736
WIRE -320 -2576 -368 -2576
WIRE -112 -2560 -208 -2560
WIRE -320 -2528 -320 -2576
WIRE -256 -2528 -320 -2528
WIRE -208 -2496 -208 -2512
WIRE -288 -2464 -288 -2704
WIRE -288 -2464 -368 -2464
WIRE -112 -2448 -112 -2560
WIRE -112 -2448 -208 -2448
WIRE -288 -2416 -288 -2464
WIRE -256 -2416 -288 -2416
WIRE -208 -2384 -208 -2400
WIRE -112 -2384 -112 -2448
WIRE -112 -2384 -208 -2384
WIRE -208 -2368 -208 -2384
IOPIN -16 -2640 Out
IOPIN -528 -2576 In
IOPIN -368 -2464 In
IOPIN -528 -2784 In
IOPIN -368 -2576 In
SYMBOL voltage -528 -2800 R0
WINDOW 0 56 16 Right 2
WINDOW 3 -177 -43 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 5n 5n 40m 80m)
SYMBOL voltage -528 -2592 R0
WINDOW 3 -154 191 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 0 5n 5n 20m 40m)
SYMATTR InstName V2
SYMBOL pmos4 -128 -2816 R0
SYMATTR InstName M5
SYMBOL pmos4 -320 -2816 R0
SYMATTR InstName M4
SYMBOL nmos4 -256 -2496 R0
SYMATTR InstName M2
SYMBOL voltage 48 -2864 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL nmos4 -256 -2608 R0
SYMATTR InstName M1
FLAG -208 -2368 0
FLAG -16 -2640 vout
FLAG -528 -2576 B
FLAG -368 -2464 B
FLAG -528 -2784 A
FLAG -368 -2576 A
FLAG -528 -2496 0
FLAG -528 -2704 0
FLAG 48 -2768 0
TEXT -40 -2504 Left 2 !.tran 80m
* Z:\home\khalils\Downloads\files\data\raw_asc\fda2f8a8b468_04A-030.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vout1 N001 1k
V1 V+ 0 5
V2 Vin 0
XU1 0 N001 V+ V- Vout1 AD549 ;pnba In+)In-)V+)V-)OUT
D1 Vin N001 1N4148
V3 V- 0 -5
R2 Vout2 N002 1k
XU2 0 N002 V+ V- Vout2 AD549 ;pnba In+)In-)V+)V-)OUT
Q1 N002 0 Vin 0 2N3906
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V2 .3 .7 .00001
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD549.asy)
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 16 -176 16 -192
WIRE 144 -176 144 -192
WIRE 304 -176 304 -192
WIRE 336 32 288 32
WIRE 448 32 416 32
WIRE 160 144 80 144
WIRE 288 144 288 32
WIRE 288 144 224 144
WIRE 336 144 288 144
WIRE 448 160 448 32
WIRE 448 160 400 160
WIRE 480 160 448 160
WIRE 336 176 304 176
WIRE 304 192 304 176
WIRE 352 320 304 320
WIRE 464 320 432 320
WIRE 160 432 96 432
WIRE 304 432 304 320
WIRE 304 432 256 432
WIRE 352 432 304 432
WIRE 464 448 464 320
WIRE 464 448 416 448
WIRE 496 448 464 448
WIRE 352 464 320 464
WIRE 320 480 320 464
FLAG 368 128 V+
FLAG 304 192 0
FLAG 80 144 Vin
FLAG 480 160 Vout1
FLAG 144 -96 0
FLAG 144 -192 V+
FLAG 304 -96 0
FLAG 304 -192 Vin
FLAG 16 -96 0
FLAG 16 -192 V-
FLAG 368 192 V-
FLAG 384 416 V+
FLAG 320 480 0
FLAG 96 432 Vin
FLAG 496 448 Vout2
FLAG 384 480 V-
FLAG 208 496 0
SYMBOL res 432 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 144 -192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 304 -192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value ""
SYMBOL OpAmps\\AD549 368 96 R0
SYMATTR InstName U1
SYMBOL diode 160 160 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 16 -192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL res 448 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL OpAmps\\AD549 384 384 R0
SYMATTR InstName U2
SYMBOL pnp 256 496 M270
SYMATTR InstName Q1
SYMATTR Value 2N3906
TEXT 464 -144 Left 2 !.dc V2 .3 .7 .00001
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8504.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 2.5
Vin IN 0 SINE(0 100m 100)
R1 N001 0 10K
R2 OUT N001 10K
V2 -V 0 -2.5
Rload OUT 0 1Meg
XU1 IN N001 +V -V OUT AD8504 ;pnba In+)In-)V+)V-)OUT
.tran 20m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8504.asy)
.lib AD8504.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE 448 -1088 432 -1088
WIRE 544 -1088 528 -1088
WIRE 560 -1088 544 -1088
WIRE 656 -1088 640 -1088
WIRE 192 -992 192 -1008
WIRE 288 -992 288 -1008
WIRE 544 -976 544 -1088
WIRE 560 -976 544 -976
WIRE 656 -960 656 -1088
WIRE 656 -960 624 -960
WIRE 768 -960 656 -960
WIRE 560 -944 448 -944
WIRE 768 -944 768 -960
WIRE 448 -928 448 -944
WIRE 192 -896 192 -912
WIRE 288 -896 288 -912
WIRE 768 -848 768 -864
WIRE 448 -832 448 -848
FLAG 192 -1008 +V
FLAG 192 -896 0
FLAG 448 -832 0
FLAG 768 -960 OUT
FLAG 448 -944 IN
FLAG 592 -992 +V
FLAG 288 -1008 -V
FLAG 592 -928 -V
FLAG 432 -1088 0
FLAG 768 -848 0
FLAG 288 -896 0
SYMBOL voltage 192 -1008 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 448 -944 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 100m 100)
SYMBOL res 544 -1104 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 656 -1104 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 288 -1008 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 752 -960 R0
SYMATTR InstName Rload
SYMATTR Value 1Meg
SYMBOL AD8504 592 -1024 R0
SYMATTR InstName U1
TEXT 704 -808 Left 2 !.tran 20m