Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\273e9a656fd3_OP413.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP413.asy)
V1 +V 0 15
Vin IN 0 SINE(0 1 10K)
R2 OUT N001 10K
XU1 IN N001 +V -V OUT OP413 ;pnba In+)In-)V+)V-)OUT
Rload OUT 0 10K
R1 N001 0 10K
V2 -V 0 -15
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 96 -1152 96 -1168
WIRE 208 -1152 208 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 368 -1088
WIRE 768 -1088 768 -1104
WIRE 368 -1072 368 -1088
WIRE 96 -1056 96 -1072
WIRE 208 -1056 208 -1072
WIRE 768 -992 768 -1008
WIRE 368 -976 368 -992
SYMBOL voltage 208 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 368 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 96 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL Opamps\\OP413 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 96 -1168 +V
FLAG 96 -1056 0
FLAG 368 -976 0
FLAG 768 -1104 OUT
FLAG 368 -1088 IN
FLAG 576 -1136 +V
FLAG 208 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 208 -1056 0
TEXT 720 -936 Left 2 !.tran 1m
* Z:\tmp\asc_dec_bjh7r6w2\049bce5aacf8_buffer_inverter_cutoff_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V3 c1 0 SINE(0 1 200k 0 0 90)
B1 mulS 0 V=V(sin)*2.5+2.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 692
WIRE 464 32 432 32
WIRE 624 32 576 32
WIRE 672 32 624 32
WIRE 304 160 272 160
WIRE 560 208 496 208
WIRE 592 208 560 208
WIRE 304 224 272 224
WIRE 496 240 496 208
WIRE 496 368 496 320
WIRE 704 368 704 320
WIRE 496 544 496 512
WIRE 656 544 656 512
WIRE 496 640 496 624
WIRE 656 640 656 624
SYMBOL voltage 656 528 R0
WINDOW 3 -78 146 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 1 200k 0 0 90)
SYMATTR InstName V3
SYMBOL bv 496 224 R0
WINDOW 3 -77 177 Left 2
SYMATTR Value V=V(sin)*2.5+2.5
SYMATTR InstName B1
FLAG 496 368 0
FLAG 560 208 mulS
FLAG 496 640 0
FLAG 496 512 s1
FLAG 656 640 0
FLAG 656 512 c1
FLAG 704 368 0
FLAG 624 32 sing
FLAG 464 32 mulS
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7112-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7112-3.3.asy)
V1 IN 0 4.3
C2 N001 0 4.7n
C1 OUT 0 2.2 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=3.3 ;pnba Vin)Sense)EN)SS)Vout)GND
Rload OUT 0 22
.tran 6m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.3
SYMBOL ADP7112-3.3 224 128 R0
SYMATTR InstName U1
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 22
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3461A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3461A.asy)
Rload OUT 0 300
R1 OUT N003 261K
R2 N003 0 30.1K
C2 N003 OUT 15p
V2 N002 0 PWL(0 0 1m 5)
C1 0 OUT 2.2
L1 IN N001 15
XU1 N001 0 N003 N002 OUT IN LT3461A ;pnba SW)GND)FB)_SHDN)Vout)Vin
V1 IN 0 5
.tran 600u startup
.lib LT3461A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2520 1844
WIRE 1584 1264 1504 1264
WIRE 1648 1264 1584 1264
WIRE 1760 1264 1728 1264
WIRE 1504 1280 1504 1264
WIRE 1760 1312 1760 1264
WIRE 1584 1360 1584 1264
WIRE 1616 1360 1584 1360
WIRE 1952 1360 1904 1360
WIRE 2064 1360 1952 1360
WIRE 2144 1360 2064 1360
WIRE 2240 1360 2144 1360
WIRE 1504 1376 1504 1360
WIRE 2240 1376 2240 1360
WIRE 1952 1392 1952 1360
WIRE 2144 1392 2144 1360
WIRE 2064 1408 2064 1360
WIRE 2144 1472 2144 1456
WIRE 2240 1472 2240 1456
WIRE 1488 1520 1456 1520
WIRE 1616 1520 1568 1520
WIRE 1952 1520 1952 1472
WIRE 1952 1520 1904 1520
WIRE 2064 1520 2064 1472
WIRE 2064 1520 1952 1520
WIRE 1952 1536 1952 1520
WIRE 1760 1600 1760 1568
WIRE 1952 1632 1952 1616
SYMBOL ind 1632 1280 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 15
SYMBOL PowerProducts\\LT3461A 1760 1440 R0
SYMATTR InstName U1
SYMBOL cap 2128 1456 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL res 1936 1376 R0
SYMATTR InstName R1
SYMATTR Value 261K
SYMBOL res 1936 1520 R0
SYMATTR InstName R2
SYMATTR Value 30.1K
SYMBOL VOLTAGE 1504 1264 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2048 1472 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 15p
SYMBOL res 2224 1360 R0
SYMATTR InstName Rload
SYMATTR Value 300
SYMBOL VOLTAGE 1584 1520 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 1m 5)
FLAG 1760 1600 0
FLAG 1504 1376 0
FLAG 1952 1632 0
FLAG 2144 1472 0
FLAG 2240 1472 0
FLAG 1456 1520 0
FLAG 2240 1360 OUT
FLAG 1504 1264 IN
TEXT 2088 1584 Left 2 !.tran 600u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\09c0c0869850_E4-tren-pulsos.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Salida 0 PULSE(0V 5V 0 1us 1us 0.5ms 1ms)
R1 Salida 0 100k
.options plotwinsize=0
.tran 0 3ms 0
.FOUR 1kHz 10 V(Salida)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -224 112 -480 112
WIRE -192 112 -224 112
WIRE -480 144 -480 112
WIRE -224 160 -224 112
WIRE -480 256 -480 224
WIRE -224 256 -224 240
WIRE -224 256 -480 256
WIRE -480 272 -480 256
FLAG -480 272 0
FLAG -192 112 Salida
IOPIN -192 112 Out
SYMBOL voltage -480 128 R0
WINDOW 3 -59 191 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0V 5V 0 1us 1us 0.5ms 1ms)
SYMBOL res -240 144 R0
SYMATTR InstName R1
SYMATTR Value 100k
TEXT -544 344 Left 2 !.options plotwinsize=0
TEXT -482 4 Left 2 !.tran 0 3ms 0
TEXT -472 48 Left 2 !.FOUR 1kHz 10  V(Salida)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1147-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1147-5.asy)
L1 N001 N002 50
C1 N006 0 470p
C3 OUT 0 390 Rser=0.01
C4 N002 OUT 1000p
V1 IN 0 10
MQ1 N001 N003 IN IN FDC638P
D1 0 N001 MBRS340
R1 N005 N004 1K
C2 N004 0 3300p
XU1 IN N006 N005 OUT N002 0 0 N003 LTC1147-5 ;pnba Vin)Ct)Ith)Sense-)Sense+)SHDN)GND)Pdrive
Rload OUT 0 5
R2 N002 OUT 50m
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 2m startup
.lib LTC1147-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2456 1568
WIRE 1392 1008 1088 1008
WIRE 1568 1008 1392 1008
WIRE 1728 1008 1664 1008
WIRE 1760 1008 1728 1008
WIRE 1856 1008 1840 1008
WIRE 1872 1008 1856 1008
WIRE 1968 1008 1952 1008
WIRE 2032 1008 1968 1008
WIRE 2144 1008 2032 1008
WIRE 1088 1024 1088 1008
WIRE 2032 1024 2032 1008
WIRE 2144 1024 2144 1008
WIRE 1728 1056 1728 1008
WIRE 1392 1072 1392 1008
WIRE 1088 1120 1088 1104
WIRE 2032 1120 2032 1088
WIRE 2144 1120 2144 1104
WIRE 1232 1136 1200 1136
WIRE 1584 1136 1584 1056
WIRE 1584 1136 1552 1136
WIRE 1728 1136 1728 1120
WIRE 1056 1216 1040 1216
WIRE 1136 1216 1120 1216
WIRE 1232 1216 1216 1216
WIRE 1584 1216 1552 1216
WIRE 1856 1216 1856 1008
WIRE 1856 1216 1584 1216
WIRE 1104 1296 1040 1296
WIRE 1232 1296 1168 1296
WIRE 1584 1296 1584 1280
WIRE 1584 1296 1552 1296
WIRE 1968 1296 1968 1008
WIRE 1968 1296 1584 1296
WIRE 1392 1376 1392 1360
SYMBOL res 2128 1008 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL PowerProducts\\LTC1147-5 1392 1216 R0
SYMATTR InstName U1
SYMBOL ind 1744 1024 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 50
SYMBOL cap 1568 1216 R0
WINDOW 0 35 15 Left 2
WINDOW 3 32 48 Left 2
SYMATTR InstName C4
SYMATTR Value 1000p
SYMBOL PMOS 1664 1056 M270
WINDOW 0 73 54 VLeft 2
WINDOW 3 -32 63 VLeft 2
SYMATTR InstName Q1
SYMATTR Value FDC638P
SYMBOL VOLTAGE 1088 1008 R0
WINDOW 3 25 91 Left 2
SYMATTR Value 10
SYMATTR InstName V1
SYMBOL res 1856 1024 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 50m
SYMBOL res 1232 1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL schottky 1712 1120 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMBOL cap 1120 1200 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 3300p
SYMBOL polcap 2016 1024 R0
SYMATTR InstName C3
SYMATTR Value 390
SYMATTR SpiceLine Rser=0.01
SYMBOL cap 1168 1280 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 470p
FLAG 1728 1136 0
FLAG 1392 1376 0
FLAG 1040 1296 0
FLAG 1040 1216 0
FLAG 1088 1120 0
FLAG 2032 1120 0
FLAG 2144 1120 0
FLAG 2144 1008 OUT
FLAG 1200 1136 0
FLAG 1088 1008 IN
TEXT 1664 1360 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1270.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1270.asy)
XU1 N003 N002 0 N001 IN LT1270 ;pnba Vc)FB)GND)SW)Vin
R1 OUT N002 8.7K
C1 OUT 0 500
L1 IN N001 10
R2 N002 0 1K
D1 N001 OUT MBRS360
R3 N003 N004 1K
V1 IN 0 5
C3 N004 0 1
Rload OUT 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 15m startup
.lib LT1270.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1472
WIRE 1824 896 1616 896
WIRE 1888 896 1824 896
WIRE 2000 896 1968 896
WIRE 2048 896 2000 896
WIRE 2160 896 2112 896
WIRE 2272 896 2160 896
WIRE 2368 896 2272 896
WIRE 1616 912 1616 896
WIRE 2272 912 2272 896
WIRE 2368 912 2368 896
WIRE 1824 944 1824 896
WIRE 2160 960 2160 896
WIRE 1616 1008 1616 992
WIRE 2272 1008 2272 976
WIRE 2368 1008 2368 992
WIRE 2000 1024 2000 896
WIRE 2000 1024 1952 1024
WIRE 2160 1088 2160 1040
WIRE 2160 1088 1952 1088
WIRE 2160 1104 2160 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2160 1200 2160 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
SYMBOL POWERPRODUCTS\\LT1270 1824 1088 R0
SYMATTR InstName U1
SYMBOL RES 2144 1088 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL polcap 2256 912 R0
SYMATTR InstName C1
SYMATTR Value 500
SYMBOL schottky 2048 912 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL IND 1872 912 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL RES 2144 944 R0
SYMATTR InstName R1
SYMATTR Value 8.7K
SYMBOL VOLTAGE 1616 896 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 2352 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
FLAG 2368 896 OUT
FLAG 2160 1200 0
FLAG 2272 1008 0
FLAG 2368 1008 0
FLAG 2064 1248 0
FLAG 1824 1248 0
FLAG 1616 1008 0
FLAG 1616 896 IN
TEXT 2280 1280 Left 2 !.tran 15m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\36fe75bb69da_6231.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6231.asy)
V3 N003 0 SINE(0 1 1K)
V2 -V 0 -5
R2 N001 0 1K
V1 +V 0 5
XU1 N003 N001 N002 +V -V LT6231 ;pnba IN+)IN-)OUT)VCC)VEE
R1 N002 N001 1K
.tran 3m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -80 80 -96 80
WIRE 16 80 0 80
WIRE 32 80 16 80
WIRE 144 80 112 80
WIRE -368 160 -368 144
WIRE -240 160 -240 144
WIRE 80 192 80 176
WIRE 16 208 16 80
WIRE 48 208 16 208
WIRE 144 224 144 80
WIRE 144 224 112 224
WIRE 48 240 -64 240
WIRE -368 256 -368 240
WIRE -240 256 -240 240
WIRE -64 256 -64 240
WIRE 80 272 80 256
WIRE -64 352 -64 336
SYMBOL voltage -64 240 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL voltage -240 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -368 144 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 16 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL opamps\\LT6231 80 224 R0
SYMATTR InstName U1
SYMBOL res 128 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG -240 256 0
FLAG 80 176 +V
FLAG -240 144 +V
FLAG 80 272 -V
FLAG -368 256 0
FLAG -368 144 -V
FLAG -96 80 0
FLAG -64 352 0
TEXT 216 352 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADR4533.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR4533.asy)
S2 OUT vIN N001 0 5mA
V2 N002 0 PULSE(0 1 0.51m 10n 10n 0.3m 1m)
C1 OUT 0 1
I1 OUT 0 0mA
V1 vIN 0 5
V3 N001 0 PULSE(0 1 100u 10n 10n 0.3m 1m)
XU1 vIN 0 OUT ADR4533 ;pnba IN)GND)OUT
C2 vIN 0 1
S1 0 OUT N002 0 5mA
.tran 1m
.model 5mA SW(Ron=1 Roff=1G Vt=.5 Vh=-.2 Ilimit=5m level=2)
.lib ADR4533.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4212 1120
WIRE 2208 256 1584 256
WIRE 2208 272 2208 256
WIRE 2464 288 2256 288
WIRE 2576 288 2544 288
WIRE 2288 336 2256 336
WIRE 1584 416 1584 256
WIRE 1584 416 1488 416
WIRE 1696 416 1584 416
WIRE 2064 416 1952 416
WIRE 2208 416 2208 352
WIRE 2208 416 2064 416
WIRE 2256 416 2208 416
WIRE 2464 416 2256 416
WIRE 2576 416 2544 416
WIRE 1488 432 1488 416
WIRE 1584 464 1584 416
WIRE 2064 464 2064 416
WIRE 2208 496 2208 416
WIRE 2464 512 2256 512
WIRE 2576 512 2544 512
WIRE 1488 544 1488 512
WIRE 1584 544 1584 528
WIRE 1824 544 1824 512
WIRE 2064 544 2064 528
WIRE 2288 560 2256 560
WIRE 2208 608 2208 576
SYMBOL voltage 1488 416 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL current 2464 416 R270
WINDOW 0 32 40 VTop 2
WINDOW 3 60 99 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 0mA
SYMBOL cap 2048 464 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL sw 2208 368 R180
WINDOW 0 -11 104 Right 2
WINDOW 3 -15 14 Right 2
SYMATTR InstName S2
SYMATTR Value 5mA
SYMBOL voltage 2448 288 M90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 35 67 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 1 100u 10n 10n 0.3m 1m)
SYMATTR InstName V3
SYMBOL voltage 2448 512 M90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 34 77 VTop 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 0.51m 10n 10n 0.3m 1m)
SYMBOL ADR4533 1824 416 R0
SYMATTR InstName U1
SYMBOL cap 1568 464 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL sw 2208 592 R180
WINDOW 0 -7 103 Right 2
WINDOW 3 -10 16 Right 2
SYMATTR InstName S1
SYMATTR Value 5mA
FLAG 1824 544 0
FLAG 2256 416 OUT
FLAG 1488 416 vIN
FLAG 1488 544 0
FLAG 2064 544 0
FLAG 2208 608 0
FLAG 2288 560 0
FLAG 2576 512 0
FLAG 2288 336 0
FLAG 2576 288 0
FLAG 2576 416 0
FLAG 1584 544 0
TEXT 1464 648 Left 2 !.tran 1m\n.model 5mA SW(Ron=1 Roff=1G Vt=.5 Vh=-.2 Ilimit=5m level=2)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1057.asc
* Generated by LTspice 26.0.1 for Windows.
* Fast, Precision Bridge Amplier
* Library below included based on ModelFile attribute of instance XU3, XU4 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1010.asy)
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1057.asy)
XU4 N002 +V -V NC_02 N006 LT1010 ;pnba In)V+)V-)Bias)OUT
XU2 IN N003 +V -V N005 LT1057 ;pnba In+)In-)V+)V-)OUT
R2 N004 N003 10K
XU3 N005 +V -V NC_01 N004 LT1010 ;pnba In)V+)V-)Bias)OUT
C1 N001 N002 330p
C2 N003 N005 330p
V2 -V 0 -5
V1 +V 0 5
V3 IN 0 SINE(0 1 1K)
R3 N001 N006 10K
Rload N004 N006 20
R1 N001 IN 10K
XU1 0 N001 +V -V N002 LT1057 ;pnba In+)In-)V+)V-)OUT
.tran 3m
.lib LT1010.lib
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 288 -112 64 -112
WIRE 640 -112 288 -112
WIRE 288 -80 288 -112
WIRE 192 -32 192 -48
WIRE 64 -16 64 -112
WIRE 160 -16 64 -16
WIRE 288 0 288 -16
WIRE 288 0 224 0
WIRE 768 0 288 0
WIRE -128 16 -128 0
WIRE -32 16 -32 0
WIRE 160 16 128 16
WIRE 64 32 64 -16
WIRE 192 48 192 32
WIRE 640 64 640 -112
WIRE -128 112 -128 96
WIRE -32 112 -32 96
WIRE 288 112 128 112
WIRE 352 112 288 112
WIRE 480 112 432 112
WIRE 288 144 288 112
WIRE 192 208 192 192
WIRE 384 208 384 192
WIRE 720 208 720 192
WIRE 128 224 128 112
WIRE 160 224 128 224
WIRE 288 240 288 208
WIRE 288 240 224 240
WIRE 368 240 288 240
WIRE 480 240 480 112
WIRE 480 240 432 240
WIRE 512 240 480 240
WIRE 640 240 640 144
WIRE 640 240 592 240
WIRE 672 240 640 240
WIRE 768 240 768 0
WIRE 768 240 736 240
WIRE 64 256 64 112
WIRE 64 256 -48 256
WIRE 160 256 64 256
WIRE -48 272 -48 256
WIRE 192 288 192 272
WIRE 400 288 400 272
WIRE 704 288 704 272
WIRE -48 368 -48 352
SYMBOL cap 272 -80 R0
SYMATTR InstName C1
SYMATTR Value 330p
SYMBOL voltage -48 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL opamps\\LT1010 704 176 M0
SYMATTR InstName U4
SYMBOL opamps\\LT1057 192 -64 R0
SYMATTR InstName U1
SYMBOL opamps\\LT1010 400 176 R0
SYMATTR InstName U3
SYMBOL res 624 48 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res 48 16 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL opamps\\LT1057 192 176 R0
SYMATTR InstName U2
SYMBOL voltage -128 0 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 496 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL voltage -32 0 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 448 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL cap 272 144 R0
SYMATTR InstName C2
SYMATTR Value 330p
FLAG -32 112 0
FLAG -32 0 +V
FLAG -128 112 0
FLAG -128 0 -V
FLAG -48 368 0
FLAG 192 -48 +V
FLAG 192 48 -V
FLAG 192 192 +V
FLAG 192 288 -V
FLAG 384 192 +V
FLAG 400 288 -V
FLAG 720 192 +V
FLAG 704 288 -V
FLAG 128 16 0
FLAG -48 256 IN
TEXT 472 344 Left 2 !.tran 3m
TEXT 472 -120 Bottom 2 ;Fast, Precision Bridge Amplier
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1369.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
R1 N001 +V 200
XU1 N003 N001 +V 0 N002 LT1368 ;pnba In+)In-)V+)V-)OUT
MQ1 N004 N002 N001 N001 BSS84
I1 N003 0 SINE(.2 .1 1K)
R2 +V N003 .1
R3 N004 0 20K
XU2 N004 OUT +V 0 OUT LT1368 ;pnba In+)In-)V+)V-)OUT
C1 OUT 0 .1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 3m
* Positive Supply Rail Current Sense
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1369.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1388 720
WIRE 32 16 -112 16
WIRE 80 16 32 16
WIRE 176 16 160 16
WIRE 384 16 176 16
WIRE -112 32 -112 16
WIRE 32 32 32 16
WIRE 224 80 224 64
WIRE 176 96 176 16
WIRE 192 96 176 96
WIRE 384 96 384 16
WIRE 608 96 496 96
WIRE 336 112 256 112
WIRE -112 128 -112 112
WIRE 32 128 32 112
WIRE 192 128 32 128
WIRE 32 144 32 128
WIRE 224 160 224 144
WIRE 544 160 544 144
WIRE 496 176 496 96
WIRE 512 176 496 176
WIRE 608 192 608 96
WIRE 608 192 576 192
WIRE 672 192 608 192
WIRE 720 192 672 192
WIRE 384 208 384 192
WIRE 512 208 384 208
WIRE 672 208 672 192
WIRE 384 224 384 208
WIRE 32 240 32 224
WIRE 544 240 544 224
WIRE 672 288 672 272
WIRE 384 320 384 304
FLAG -112 128 0
FLAG 224 64 +V
FLAG 720 192 OUT
FLAG 32 240 0
FLAG 224 160 0
FLAG 32 16 +V
FLAG 384 320 0
FLAG 544 144 +V
FLAG 544 240 0
FLAG 672 288 0
SYMBOL voltage -112 16 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 176 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL opamps\\LT1369 224 48 R0
SYMATTR InstName U1
SYMBOL pmos 336 192 M180
WINDOW 0 61 66 Left 2
WINDOW 3 59 31 Left 2
SYMATTR InstName Q1
SYMATTR Value BSS84
SYMBOL current 32 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value SINE(.2 .1 1K)
SYMBOL res 16 16 R0
SYMATTR InstName R2
SYMATTR Value .1
SYMBOL res 368 208 R0
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL opamps\\LT1369 544 128 R0
SYMATTR InstName U2
SYMBOL cap 656 208 R0
SYMATTR InstName C1
SYMATTR Value .1
TEXT 464 312 Left 2 !.tran 3m
TEXT 408 -16 Bottom 2 ;Positive Supply Rail Current Sense
* Z:\home\khalils\Downloads\files\data\raw_asc\RH101A.asc
* Generated by LTspice 26.0.1 for Windows.
* Single Pole Compensation
* Two Pole Compensation
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\RH101A.asy)
V2 -V 0 -15
XU2 N004 OUT2 N003 -V OUT2 +V NC_01 RH101A ;pnba COMP1)In-)In+)V-)OUT)V+)COMP2
V1 +V 0 15
C2 N005 N004 30p
V3 N003 0 PULSE(5 -5 10u .5u .5u 53u 200u)
C3 OUT2 N005 300p
C1 N002 N001 30p
XU1 N001 OUT1 N003 -V OUT1 +V N002 RH101A ;pnba COMP1)In-)In+)V-)OUT)V+)COMP2
R1 N005 0 10K
.tran 100u
.lib RH101A.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 992
WIRE 48 176 -160 176
WIRE -112 224 -128 224
WIRE -32 224 -48 224
WIRE -128 288 -128 224
WIRE -48 288 -128 288
WIRE -48 304 -48 288
WIRE -32 304 -32 224
WIRE -16 304 -16 288
WIRE -160 320 -160 176
WIRE -64 320 -160 320
WIRE 48 336 48 176
WIRE 48 336 0 336
WIRE 320 336 48 336
WIRE -64 352 -144 352
WIRE -32 384 -32 368
WIRE 224 448 -96 448
WIRE -384 464 -384 448
WIRE -256 464 -256 448
WIRE -32 496 -48 496
WIRE 64 496 32 496
WIRE 128 496 64 496
WIRE 224 496 224 448
WIRE 224 496 192 496
WIRE 64 512 64 496
WIRE -384 560 -384 544
WIRE -256 560 -256 544
WIRE 64 608 64 592
WIRE -48 624 -48 496
WIRE -16 624 -16 608
WIRE -96 640 -96 448
WIRE -64 640 -96 640
WIRE 224 656 224 496
WIRE 224 656 0 656
WIRE 320 656 224 656
WIRE -144 672 -144 352
WIRE -64 672 -144 672
WIRE -32 704 -32 688
WIRE -144 720 -144 672
WIRE -144 816 -144 800
SYMBOL cap -48 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 30p
SYMBOL voltage -256 448 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 48 496 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -384 448 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL cap 192 480 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 123 60 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 300p
SYMBOL cap 32 480 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 123 60 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 30p
SYMBOL RH101A -32 272 R0
SYMATTR InstName U1
SYMBOL voltage -144 704 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(5 -5 10u .5u .5u 53u 200u)
SYMBOL RH101A -32 592 R0
SYMATTR InstName U2
FLAG -256 560 0
FLAG -16 288 +V
FLAG -256 448 +V
FLAG -32 384 -V
FLAG -384 560 0
FLAG -384 448 -V
FLAG -144 816 0
FLAG -16 608 +V
FLAG -32 704 -V
FLAG 64 608 0
FLAG 320 336 OUT1
FLAG 320 656 OUT2
TEXT 384 816 Left 2 !.tran 100u
TEXT 192 256 Left 2 ;Single Pole Compensation
TEXT 248 584 Left 2 ;Two Pole Compensation