* Z:\home\khalils\Downloads\files\data\raw_asc\09c428f3bff3_Fig23_26.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot VREF
M2T Vbias2 N003 N005 0 N_1u l=2u w=10u
D2 N009 0 PNPDIODE 8
M4T VDD Vbias1 Vbias1 VDD P_1u l=2u w=30u
MSU2 Vbias2 vsuref N003 VDD P_1u l=1u w=10u
M3T VDD Vbias1 N001 VDD P_1u l=2u w=30u
MSU5 vsuref vsuref N006 0 N_1u l=10u w=10u
M2B N005 N004 N008 0 N_1u l=2u w=10u
MSU3 N007 N007 0 0 N_1u l=10u w=10u
D1 P001 0 PNPDIODE
MSU4 N006 N006 N007 0 N_1u l=10u w=10u
M1 VDD Vbias1 N002 VDD P_1u l=2u w=30u
R2 VREF 0 2.5Meg TC1=0.002
M2 N002 Vbias2 VREF VDD P_1u l=2u w=30u
R1 N008 N009 52k TC1=0.002
M4B Vbias1 Vbias2 Vbias2 VDD P_1u l=2u w=30u
MSU1 VDD Vbias1 vsuref VDD P_1u l=2u w=30u
M3B N001 Vbias2 N003 VDD P_1u l=2u w=30u
VDD VDD 0 5
M1B N004 N004 P001 0 N_1u l=2u w=10u
M1T N003 N003 N004 0 N_1u l=2u w=10u
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib cmosedu_models.txt
.DC VDD 4 6 1m
.step temp list 0 25 50 75 100
.model PNPDIODE D is=1e-18 n=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2712 680
WIRE 1424 -336 1424 -448
WIRE 1424 -320 1424 -336
WIRE 1424 -272 1424 -320
WIRE 1424 48 1424 16
WIRE 1472 -448 1472 -464
WIRE 1472 -272 1424 -272
WIRE 1472 -192 1472 -272
WIRE 1472 -176 1424 -176
WIRE 1472 -96 1472 -176
WIRE 1472 -80 1424 -80
WIRE 1472 0 1472 -80
WIRE 1488 -320 1424 -320
WIRE 1536 -400 1536 -432
WIRE 1616 -576 1616 -608
WIRE 1616 -560 1616 -576
WIRE 1872 -416 1872 -448
WIRE 1872 -304 1536 -304
WIRE 1872 -304 1872 -320
WIRE 1872 -192 1872 -208
WIRE 1936 -432 1536 -432
WIRE 1936 -336 1920 -336
WIRE 1936 -336 1936 -432
WIRE 1936 -304 1872 -304
WIRE 1936 -224 1920 -224
WIRE 1936 -224 1936 -304
WIRE 1936 -192 1872 -192
WIRE 1936 -112 1920 -112
WIRE 1936 -112 1936 -192
WIRE 2000 -464 1920 -464
WIRE 2000 -336 1936 -336
WIRE 2064 -464 2000 -464
WIRE 2064 -432 2064 -464
WIRE 2064 -336 2000 -336
WIRE 2064 -304 2064 -336
WIRE 2080 -464 2064 -464
WIRE 2080 -336 2064 -336
WIRE 2080 -224 1936 -224
WIRE 2080 -112 1936 -112
WIRE 2128 -432 2064 -432
WIRE 2128 -432 2128 -448
WIRE 2128 -416 2128 -432
WIRE 2128 -304 2064 -304
WIRE 2128 -304 2128 -320
WIRE 2128 -192 2128 -208
WIRE 2128 -32 2128 -96
WIRE 2128 64 2128 48
WIRE 2400 -464 2384 -464
WIRE 2400 -336 2384 -336
WIRE 2448 -416 2448 -448
WIRE 2448 -272 2448 -320
WIRE 2448 -256 2448 -272
WIRE 2448 -112 2448 -176
WIRE 2560 -272 2448 -272
WIRE 2592 -272 2560 -272
SYMBOL pmos4 2080 -544 R0
WINDOW 0 75 20 Left 0
WINDOW 3 61 91 Left 0
WINDOW 123 62 70 Left 0
SYMATTR InstName M4T
SYMATTR Value P_1u
SYMATTR Value2 l=2u w=30u
SYMBOL res 2432 -272 R0
SYMATTR InstName R2
SYMATTR Value 2.5MEG TC1=0.002
SYMBOL pmos4 1488 -400 R0
WINDOW 0 75 20 Left 0
WINDOW 3 63 75 Left 0
WINDOW 123 57 116 Left 0
SYMATTR InstName MSU2
SYMATTR Value P_1u
SYMATTR Value2 l=1u w=10u
SYMBOL nmos4 1920 -304 M0
WINDOW 123 56 100 Left 0
WINDOW 0 69 31 Left 0
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M1T
SYMATTR Value N_1u
SYMBOL nmos4 2080 -304 R0
WINDOW 123 56 100 Left 0
WINDOW 0 69 31 Left 0
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M2T
SYMATTR Value N_1u
SYMBOL voltage 1616 -576 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL pmos4 2080 -416 R0
WINDOW 0 75 20 Left 0
WINDOW 3 62 104 Left 0
WINDOW 123 62 75 Left 0
SYMATTR InstName M4B
SYMATTR Value P_1u
SYMATTR Value2 l=2u w=30u
SYMBOL pmos4 1472 -544 M0
WINDOW 0 75 20 Left 0
WINDOW 3 61 91 Left 0
WINDOW 123 59 69 Left 0
SYMATTR InstName MSU1
SYMATTR Value P_1u
SYMATTR Value2 l=2u w=30u
SYMBOL pmos4 1920 -416 M0
WINDOW 0 75 20 Left 0
WINDOW 3 61 91 Left 0
WINDOW 123 52 69 Left 0
SYMATTR InstName M3B
SYMATTR Value P_1u
SYMATTR Value2 l=2u w=30u
SYMBOL pmos4 2400 -544 R0
WINDOW 0 75 20 Left 0
WINDOW 3 61 91 Left 0
WINDOW 123 62 70 Left 0
SYMATTR InstName M1
SYMATTR Value P_1u
SYMATTR Value2 l=2u w=30u
SYMBOL res 2112 -48 R0
SYMATTR InstName R1
SYMATTR Value 52k TC1=0.002
SYMBOL pmos4 1920 -544 M0
WINDOW 0 75 20 Left 0
WINDOW 3 61 91 Left 0
WINDOW 123 63 69 Left 0
SYMATTR InstName M3T
SYMATTR Value P_1u
SYMATTR Value2 l=2u w=30u
SYMBOL nmos4 1472 -80 M0
WINDOW 123 56 100 Left 0
WINDOW 0 69 31 Left 0
SYMATTR Value2 l=10u w=10u
SYMATTR InstName MSU3
SYMATTR Value N_1u
SYMBOL pmos4 2400 -416 R0
WINDOW 0 75 20 Left 0
WINDOW 3 62 104 Left 0
WINDOW 123 62 75 Left 0
SYMATTR InstName M2
SYMATTR Value P_1u
SYMATTR Value2 l=2u w=30u
SYMBOL diode 2112 64 R0
WINDOW 0 43 9 Left 0
WINDOW 3 42 41 Left 0
SYMATTR InstName D2
SYMATTR Value PNPDIODE 8
SYMBOL nmos4 1920 -192 M0
WINDOW 123 56 100 Left 0
WINDOW 0 69 31 Left 0
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M1B
SYMATTR Value N_1u
SYMBOL nmos4 1472 -272 M0
WINDOW 123 56 100 Left 0
WINDOW 0 69 31 Left 0
SYMATTR Value2 l=10u w=10u
SYMATTR InstName MSU5
SYMATTR Value N_1u
SYMBOL diode 1856 -96 R0
WINDOW 0 43 9 Left 0
WINDOW 3 42 41 Left 0
SYMATTR InstName D1
SYMATTR Value PNPDIODE
SYMBOL nmos4 1472 -176 M0
WINDOW 123 56 100 Left 0
WINDOW 0 69 31 Left 0
SYMATTR Value2 l=10u w=10u
SYMATTR InstName MSU4
SYMATTR Value N_1u
SYMBOL nmos4 2080 -192 R0
WINDOW 123 56 100 Left 0
WINDOW 0 69 31 Left 0
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M2B
SYMATTR Value N_1u
FLAG 1616 -480 0
FLAG 1616 -576 VDD
FLAG 1424 -32 0
FLAG 1424 48 0
FLAG 1424 -496 VDD
FLAG 1424 -544 VDD
FLAG 1872 -496 VDD
FLAG 1872 -544 VDD
FLAG 1872 -368 VDD
FLAG 2128 -496 VDD
FLAG 2128 -544 VDD
FLAG 2128 -368 VDD
FLAG 2128 -144 0
FLAG 1872 -144 0
FLAG 1872 -32 0
FLAG 2128 -256 0
FLAG 1872 -256 0
FLAG 1536 -352 VDD
FLAG 1424 -128 0
FLAG 1424 -224 0
FLAG 1424 -336 vsuref
FLAG 2000 -464 Vbias1
FLAG 1472 -448 Vbias1
FLAG 2128 128 0
FLAG 2000 -336 Vbias2
FLAG 2448 -496 VDD
FLAG 2448 -544 VDD
FLAG 2448 -368 VDD
FLAG 2384 -464 Vbias1
FLAG 2384 -336 Vbias2
FLAG 2448 -112 0
FLAG 2560 -272 VREF
TEXT 1456 72 Left 0 !.lib cmosedu_models.txt
TEXT 1936 -552 Left 0 ;Plot VREF
TEXT 1560 -24 Left 0 !.DC VDD 4 6 1m
TEXT 1552 16 Left 0 !.step temp list 0 25 50 75 100
TEXT 1456 48 Left 0 !.model PNPDIODE D is=1e-18 n=1