Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8020.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8020.asy)
Rload OUT 0 25
C1 OUT 0 10
R1 N001 0 165K
V1 IN 0 25
XU1 IN IN 0 N001 OUT OUT LTM8020 ;pnba Vin)_SHDN)GND)ADJ)BIAS)OUT
.tran 1m startup
.lib LTM8020.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 32 -32 32
WIRE 240 32 80 32
WIRE -32 48 -32 32
WIRE 240 64 240 32
WIRE 80 128 80 32
WIRE 96 128 80 128
WIRE 400 128 384 128
WIRE 464 128 400 128
WIRE 576 128 464 128
WIRE -32 144 -32 128
WIRE 464 144 464 128
WIRE 576 144 576 128
WIRE 464 240 464 208
WIRE 576 240 576 224
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 400 256 400 128
WIRE 400 256 384 256
WIRE 240 336 240 320
SYMBOL voltage -32 32 R0
SYMATTR InstName V1
SYMATTR Value 25
SYMBOL res 560 128 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL PowerProducts\\LTM8020 240 192 R0
SYMATTR InstName U1
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 165K
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG -32 144 0
FLAG 240 336 0
FLAG 576 240 0
FLAG -16 256 0
FLAG -32 32 IN
FLAG 576 128 OUT
FLAG 464 240 0
TEXT 360 352 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\d24df8f1fa09_osc_impedance.asc
* Generated by LTspice 26.0.1 for Windows.
* Run ".ac analysis" and plot "Z", (Vgate/I(I1)), in "cartesion coordinate" mode.\nNote that as {R} is decreased, the real part of Z becomes more and more negative.\nAs {R} is further decreased, the real part of Z becomes more positive. A this point,\nthe oscillator fails to start.\nRun ".transient analysis" to see what effect decreasing {R} has on oscillator startup.
;tran 0 50uS 0S 200pS
L2 Vgate 0 159nH Rser=0
R2 Vgate 0 {R}
I2 N002 0 1mA
I1 0 Vgate AC 1uA
C1 Vgate N002 31.8pF
J1 N001 Vgate N002 MPF102
V1 N001 0 9V
C2 N002 0 31.8pF
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.ac oct 10k 98e6 102e6
.step param R 3k 1.5k 500
.meas ac Re find re(V(vgate)/I(I1)) at 100e6
.meas ac Im find im(V(vgate)/I(I1)) at 100e6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 884
WIRE -736 416 -736 272
WIRE -736 624 -736 496
WIRE -656 272 -736 272
WIRE -656 272 -656 208
WIRE -576 272 -656 272
WIRE -576 416 -576 272
WIRE -576 624 -736 624
WIRE -576 624 -576 496
WIRE -432 272 -576 272
WIRE -432 416 -432 272
WIRE -432 624 -576 624
WIRE -432 624 -432 496
WIRE -304 272 -432 272
WIRE -304 304 -304 272
WIRE -304 416 -304 368
WIRE -304 480 -304 416
WIRE -304 624 -432 624
WIRE -304 624 -304 544
WIRE -224 272 -304 272
WIRE -176 208 -176 176
WIRE -176 416 -304 416
WIRE -176 416 -176 304
WIRE -176 480 -176 416
WIRE -176 624 -304 624
WIRE -176 624 -176 560
WIRE 0 176 -176 176
WIRE 0 288 0 176
WIRE 0 624 -176 624
WIRE 0 624 0 368
WIRE 0 656 0 624
SYMBOL res -592 400 R0
SYMATTR InstName R2
SYMATTR Value {R}
SYMBOL njf -224 208 R0
SYMATTR InstName J1
SYMATTR Value MPF102
SYMBOL ind -448 400 R0
SYMATTR InstName L2
SYMATTR Value 159nH
SYMATTR SpiceLine Rser=0
SYMBOL current -176 480 R0
WINDOW 123 24 116 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 43 47 Left 0
SYMATTR Value 1mA
SYMATTR InstName I2
SYMBOL current -736 496 R180
WINDOW 123 -101 105 Left 0
WINDOW 3 24 88 Invisible 0
SYMATTR Value2 AC 1uA
SYMATTR Value ""
SYMATTR InstName I1
SYMBOL voltage 0 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9V
SYMBOL cap -320 480 R0
SYMATTR InstName C2
SYMATTR Value 31.8pF
SYMBOL cap -320 304 R0
SYMATTR InstName C1
SYMATTR Value 31.8pF
FLAG 0 656 0
FLAG -656 208 Vgate
TEXT -1000 224 Left 0 !;tran 0 50uS 0S 200pS
TEXT -1000 272 Left 0 !.ac oct 10k 98e6 102e6
TEXT -1024 320 Left 0 !.step param R 3k 1.5k 500
TEXT -816 -80 Left 0 ;Run ".ac analysis" and plot "Z", (Vgate/I(I1)), in "cartesion coordinate" mode.\nNote that as {R} is decreased, the real part of Z becomes more and more negative.\nAs {R} is further decreased, the real part of Z becomes more positive. A this point,\nthe oscillator fails to start.\nRun ".transient analysis" to see what effect decreasing {R} has on oscillator startup.
TEXT -1336 392 Left 0 !.meas ac Re find re(V(vgate)/I(I1)) at 100e6\n.meas ac Im find im(V(vgate)/I(I1)) at 100e6
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3410B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3410B.asy)
XU1 IN 0 N001 IN MP_01 N002 LTC3410B ;pnba Run)GND)SW)Vin))FB
C2 OUT 0 4.7
L1 N001 OUT 4.7
R2 N002 0 412K
R1 OUT N002 887K
V1 IN 0 5
C1 OUT N002 10p
Rload OUT 0 20
.tran 250u startup
.lib LTC3410B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 700
WIRE 192 64 112 64
WIRE 352 64 192 64
WIRE 112 80 112 64
WIRE 352 80 352 64
WIRE 192 144 192 64
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 608 144 592 144
WIRE 704 144 608 144
WIRE 800 144 704 144
WIRE 896 144 800 144
WIRE 800 160 800 144
WIRE 896 160 896 144
WIRE 112 176 112 160
WIRE 608 176 608 144
WIRE 704 176 704 144
WIRE 800 256 800 224
WIRE 896 256 896 240
WIRE 608 304 608 256
WIRE 608 304 496 304
WIRE 704 304 704 240
WIRE 704 304 608 304
WIRE 608 320 608 304
WIRE 352 400 352 368
WIRE 608 416 608 400
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL PowerProducts\\LTC3410B 352 224 R0
SYMATTR InstName U1
SYMBOL cap 784 160 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL res 592 304 R0
SYMATTR InstName R2
SYMATTR Value 412K
SYMBOL res 592 160 R0
SYMATTR InstName R1
SYMATTR Value 887K
SYMBOL RES 880 144 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL VOLTAGE 112 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 688 176 R0
SYMATTR InstName C1
SYMATTR Value 10p
FLAG 112 176 0
FLAG 352 400 0
FLAG 800 256 0
FLAG 896 256 0
FLAG 608 416 0
FLAG 112 64 IN
FLAG 896 144 OUT
TEXT 720 352 Left 2 !.tran 250u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\12c623eebc4c_Input_Offset_Voltage.asc
* Generated by LTspice 26.0.1 for Windows.
* 4
* 7
* 6
* 2
* 3
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
Rf Vo N001 100k
Ri N001 0 100
V2 -Vcc 0 -15V
V1 +Vcc 0 15V
XU1 0 N001 +Vcc -Vcc Vo level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.tran 20s
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 192 32 192
WIRE 176 192 128 192
WIRE 240 192 176 192
WIRE 384 192 320 192
WIRE 32 256 32 192
WIRE 304 304 304 288
WIRE 176 320 176 192
WIRE 272 320 176 320
WIRE 384 336 384 192
WIRE 384 336 336 336
WIRE 416 336 384 336
WIRE 272 352 176 352
WIRE 304 384 304 368
WIRE 176 400 176 352
SYMBOL Res 144 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Ri
SYMATTR Value 100
SYMBOL Res 336 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rf
SYMATTR Value 100k
SYMBOL OpAmps/UniversalOpAmp 304 336 R0
SYMATTR InstName U1
SYMBOL Voltage 512 320 R0
SYMATTR InstName V1
SYMATTR Value 15V
SYMBOL Voltage 640 320 R0
SYMATTR InstName V2
SYMATTR Value -15V
FLAG 512 416 0
FLAG 640 416 0
FLAG 512 336 +Vcc
FLAG 640 336 -Vcc
FLAG 304 288 +Vcc
FLAG 304 384 -Vcc
FLAG 416 336 Vo
FLAG 176 400 0
FLAG 32 256 0
TEXT 304 376 Left 2 ;4
TEXT 304 296 Left 2 ;7
TEXT 352 336 Left 2 ;6
TEXT 240 320 Left 2 ;2
TEXT 240 352 Left 2 ;3
TEXT 240 464 Left 2 !.tran 20s
* Z:\home\khalils\Downloads\files\data\raw_asc\e2fc0dbf9cf9_xor_transfer.asc
* Generated by LTspice 26.0.1 for Windows.
AX2 0 0 0 0 0 0 0 0 XOR ll=180n wn={nnw} wp={nnw*mp}
V1 vdd 0 {vv}
V2 b 0 PULSE({vv} 0 1000p 1p 1p 2000p 4000p 5)
V3 N001 0 PULSE(0 0 2000p 1p 1p 2000p 4000p 5)
C1 out 0 1f
.param vv=1.8 nnw=2*180n mp=2.5
.lib BU_180nm.lib
.meas tran t1 find time when v(out)=vv*0.1 rise 1
.meas tran t2 find time when v(out)=vv*0.9 rise 1
.meas tran t3 find time when v(out)=vv*0.1 fall 1
.meas tran t4 find time when v(out)=vv*0.9 fall 1
.meas tran transition_up param abs(t2-t1)
.meas tran transition_down param abs(t4-t3)
.meas tran ratio param upslope/downslope
.meas dc vi_mid param (vil+vih)/2
.meas dc vil when d(v(out))=-1 fall 1
.meas dc vih when d(v(out))=-1 rise 1
.dc V2 0 {vv} 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1312 680
WIRE 320 224 -64 224
WIRE 416 224 320 224
WIRE -64 272 -64 224
WIRE 416 288 416 224
WIRE 320 304 320 224
WIRE 384 304 320 304
WIRE 496 320 448 320
WIRE 592 320 496 320
WIRE 384 336 240 336
WIRE 240 400 240 336
WIRE 416 400 416 352
WIRE 592 400 592 384
WIRE 592 400 416 400
WIRE 416 416 416 400
WIRE 80 432 80 304
SYMBOL /voltage -64 256 R0
SYMATTR InstName V1
SYMATTR Value {vv}
SYMBOL /voltage 240 384 R0
SYMATTR InstName V2
SYMATTR Value PULSE({vv} 0 1000p 1p 1p 2000p 4000p 5)
SYMBOL cap 576 320 R0
SYMATTR InstName C1
SYMATTR Value 1f
SYMBOL xor 416 320 R0
SYMATTR InstName X2
SYMATTR SpiceLine ll=180n wn={nnw} wp={nnw*mp}
SYMBOL /voltage 80 416 R0
SYMATTR InstName V3
SYMATTR Value PULSE(0 0 2000p 1p 1p 2000p 4000p 5)
FLAG -64 352 0
FLAG 240 480 0
FLAG 416 416 0
FLAG -64 224 vdd
FLAG 416 400 vss
FLAG 240 336 b
FLAG 496 320 out
FLAG 80 512 0
TEXT -88 72 Left 2 !.param vv=1.8 nnw=2*180n mp=2.5\n.lib BU_180nm.lib
TEXT 728 72 Left 2 !.meas tran t1 find time when v(out)=vv*0.1 rise 1\n.meas tran t2 find time when v(out)=vv*0.9 rise 1\n.meas tran t3 find time when v(out)=vv*0.1 fall 1\n.meas tran t4 find time when v(out)=vv*0.9 fall 1\n.meas tran transition_up param abs(t2-t1)\n.meas tran transition_down param abs(t4-t3)\n.meas tran ratio param upslope/downslope
TEXT 736 296 Left 2 !.meas dc vi_mid param (vil+vih)/2
TEXT 736 320 Left 2 !.meas dc vil when d(v(out))=-1 fall 1
TEXT 736 344 Left 2 !.meas dc vih when d(v(out))=-1 rise 1
TEXT -88 152 Left 2 !.dc V2 0 {vv} 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\2592e107e6c8_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N001 Vcc -Vcc Vout LM741/NS ;pnba In+)In-)V+)V-)OUT
R1 N001 N002 2.2k
V1 Vcc 0 12
V2 0 -Vcc 12
R2 Vout N001 10k
V3 N002 0 SINE(0 1 1k)
.include C:\Users\domin\OneDrive - VietNam National University - HCM INTERNATIONAL UNIVERSITY\Documents\LM741.MOD
.tran 5m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1668 680
WIRE 560 -240 416 -240
WIRE 80 -128 80 -144
WIRE 336 -128 336 -240
WIRE 336 -128 256 -128
WIRE 352 -128 336 -128
WIRE 560 -112 560 -240
WIRE 560 -112 416 -112
WIRE 80 -64 80 -128
WIRE 256 -64 256 -128
WIRE 352 0 352 -96
WIRE 80 48 80 16
WIRE 256 80 256 16
WIRE 80 96 80 48
WIRE 256 208 256 160
WIRE 80 272 80 176
SYMBOL voltage 80 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL voltage 80 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL voltage 256 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1k)
SYMBOL res 432 -256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL OpAmps\\opamp2 384 -176 R0
SYMATTR InstName U1
SYMATTR Value LM741/NS
SYMBOL res 240 -80 R0
SYMATTR InstName R1
SYMATTR Value 2.2k
FLAG 80 48 0
FLAG 80 -128 Vcc
FLAG 80 272 -Vcc
FLAG 384 -144 Vcc
FLAG 384 -80 -Vcc
FLAG 256 208 0
FLAG 352 0 0
FLAG 560 -112 Vout
TEXT -152 352 Left 2 !.include C:\\Users\\domin\\OneDrive - VietNam National University - HCM INTERNATIONAL UNIVERSITY\\Documents\\LM741.MOD
TEXT -152 376 Left 2 !.tran 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX40078.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX40078.asy)
CL OUT 0 15p
Vcc Vcc 0 2.5
RL OUT 0 10k
Vee 0 Vee 2.5
XU1 IN OUT Vcc Vee OUT MAX40078 ;pnba In+)In-)V+)V-)OUT
V1 IN 0 SINE(0 50m 100k)
.tran 10u
.lib MAX40078.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 144 288 144 272
WIRE 432 352 432 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 144 400 144 368
WIRE 144 400 112 400
WIRE 400 400 304 400
WIRE 112 416 112 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 144 448 144 400
WIRE 432 448 432 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 144 544 144 528
WIRE 304 592 304 576
SYMBOL voltage 144 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 100k)
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 10k
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL MAX40078 432 320 R0
SYMATTR InstName U1
SYMBOL voltage 144 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
FLAG 720 384 OUT
FLAG 144 272 Vcc
FLAG 144 544 Vee
FLAG 432 320 Vcc
FLAG 432 448 Vee
FLAG 112 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
TEXT 96 632 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\1c5d286ed63c_Fig10_14.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Vout Vin
Vin Vin 0 PULSE(0 1 0 0 0 1n 2n)
C1 Vout 0 5f
VDD N001 0 1
M1 Vout N001 Vin 0 N_50n l=50n w=500n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 5n
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 680
WIRE 208 -96 208 -112
WIRE 208 0 208 -16
WIRE 272 -112 208 -112
WIRE 384 -112 272 -112
WIRE 400 -160 400 -208
WIRE 432 -32 432 -112
WIRE 560 -112 480 -112
WIRE 672 -112 560 -112
WIRE 672 -80 672 -112
WIRE 672 16 672 -16
WIRE 784 -208 400 -208
WIRE 784 -176 784 -208
WIRE 784 -64 784 -96
SYMBOL voltage 208 -112 R0
WINDOW 0 -85 56 Left 0
WINDOW 3 -114 148 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(0 1 0 0 0 1n 2n)
SYMBOL voltage 784 -192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL nmos4 480 -160 R90
WINDOW 0 70 70 VRight 0
WINDOW 3 99 70 VRight 0
WINDOW 123 100 -119 VRight 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL cap 656 -80 R0
SYMATTR InstName C1
SYMATTR Value 5f
FLAG 208 0 0
FLAG 672 16 0
FLAG 560 -112 Vout
FLAG 272 -112 Vin
FLAG 432 -32 0
FLAG 784 -64 0
TEXT 392 32 Left 0 !.tran 5n
TEXT 392 56 Left 0 !.lib cmosedu_models.txt
TEXT 512 -240 Left 0 ;Plot Vout Vin
* Z:\home\khalils\Downloads\files\data\raw_asc\0989f9930f45_MAX40100.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX40100.asy)
Vcc Vcc 0 2.5
RL OUT 0 100k
XU1 IN OUT Vcc Vee OUT Vcc MAX40100 ;pnba In+)In-)V+)V-)OUT)SHDN
CL OUT 0 15p
V1 IN 0 SINE(0 50m 10k)
Vee 0 Vee 2.5
.tran 100u
.lib MAX40100.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 64 288 64 272
WIRE 416 352 416 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 64 448 64 400
WIRE 416 448 416 416
WIRE 448 448 448 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 64 544 64 528
WIRE 304 592 304 576
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 10k)
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 100k
SYMBOL MAX40100 432 400 R0
SYMATTR InstName U1
FLAG 720 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
FLAG 448 448 Vcc
TEXT 16 632 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\5eba22c49efd_LDO-npn-tlv431.asc
* Generated by LTspice 26.0.1 for Windows.
* MMBT2907A-TP
* P(Q1) < 250mW when Vin < 10V
* VIN > 10V will not cause damage, so 5V TVS (Vlcamp = 9V) can be used as protection
* Dropout : 5Vout when Vin = 6.37V at 500mA output
* 500mA out, 400mW in Q1 -> VINmax = 5.3V
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\TLV431.asy)
R4 OUT 0 10
Q2 N002 N001 IN 0 BC856B
R1 OUT N003 100k
R6 N004 0 0.01
R5 N002 N004 1k
R2 N003 N004 33k
Q1 OUT N002 IN 0 2N2907
V1 IN 0 5
R3 IN N001 10k
XU1 N001 N004 NC_01 TLV431 ;pnba K)A)R
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc v1 0 15 0.1
.lib TLV431.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1824 680
WIRE -64 96 -144 96
WIRE 32 96 -64 96
WIRE 160 96 32 96
WIRE 272 96 160 96
WIRE 464 96 368 96
WIRE 592 96 464 96
WIRE 624 96 592 96
WIRE 32 112 32 96
WIRE 272 112 272 96
WIRE 368 112 368 96
WIRE 464 112 464 96
WIRE 160 144 160 96
WIRE -144 176 -144 96
WIRE 624 176 624 96
WIRE 96 192 32 192
WIRE 320 240 320 176
WIRE 320 240 160 240
WIRE 32 256 32 192
WIRE 464 288 464 192
WIRE 464 288 64 288
WIRE 464 320 464 288
WIRE 320 352 320 240
WIRE -144 432 -144 256
WIRE 624 432 624 256
WIRE 32 448 32 320
WIRE 320 448 320 432
WIRE 320 448 32 448
WIRE 464 448 464 400
WIRE 464 448 320 448
WIRE 320 464 320 448
WIRE 320 560 320 544
SYMBOL res 16 96 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 304 336 R0
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL pnp 96 240 M180
SYMATTR InstName Q2
SYMATTR Value BC856B
SYMBOL pnp 368 176 M270
SYMATTR InstName Q1
SYMATTR Value 2N2907
SYMBOL Parts_TCO\\TLV431 32 288 R0
SYMATTR InstName U1
SYMBOL res 304 448 R0
SYMATTR InstName R6
SYMATTR Value 0.01
SYMBOL res 448 304 R0
SYMATTR InstName R2
SYMATTR Value 33k
SYMBOL res 448 96 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage -144 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 608 160 R0
SYMATTR InstName R4
SYMATTR Value 10
FLAG -144 432 0
FLAG 624 432 0
FLAG 320 560 0
FLAG 592 96 OUT
FLAG -64 96 IN
TEXT -376 224 Left 2 !.dc v1 0 15 0.1
TEXT 296 -24 Left 2 ;MMBT2907A-TP
TEXT -200 -128 Left 2 ;P(Q1) < 250mW when Vin < 10V
TEXT -200 -96 Left 2 ;VIN > 10V will not cause damage, so 5V TVS (Vlcamp = 9V) can be used as protection
TEXT -200 -160 Left 2 ;Dropout : 5Vout when Vin = 6.37V at 500mA output
TEXT -200 -64 Left 2 ;500mA out, 400mW in Q1 -> VINmax = 5.3V
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8048.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8048.asy)
R1 N005 0 6.19K
C1 N001 0 4.7
R2 N004 0 162K
Rload2 OUT2 0 64
XU1 0 OUT1 0 N005 IN N001 IN N003 N002 OUT2 N004 LTM8048 ;pnba GND)Vout1)Vout-)Adj1)Vin)Bias)Run)SS)BYP)Vout2)Adj2
Rload1 OUT1 0 64
C3 OUT2 0 10
C2 OUT1 0 22
V1 IN 0 10
.tran 2m startup
.lib LTM8048.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1108 752
WIRE 112 48 -16 48
WIRE 128 48 112 48
WIRE 576 48 448 48
WIRE 864 48 576 48
WIRE -16 64 -16 48
WIRE 864 112 864 48
WIRE 112 144 112 48
WIRE 128 144 112 144
WIRE 672 144 448 144
WIRE 752 144 672 144
WIRE -16 160 -16 144
WIRE 576 192 576 48
WIRE 48 240 32 240
WIRE 128 240 112 240
WIRE 464 240 448 240
WIRE 672 240 672 144
WIRE 752 240 752 144
WIRE 128 336 112 336
WIRE 480 336 448 336
WIRE 32 432 16 432
WIRE 128 432 112 432
WIRE 480 432 480 416
WIRE 480 432 448 432
WIRE 576 432 576 256
WIRE 576 432 480 432
WIRE 672 432 672 304
WIRE 672 432 576 432
WIRE 752 432 752 320
WIRE 752 432 672 432
WIRE 864 432 864 192
WIRE 864 432 752 432
WIRE 864 448 864 432
WIRE 288 496 288 480
SYMBOL PowerProducts\\LTM8048 288 240 R0
SYMATTR InstName U1
SYMBOL cap 656 240 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res 736 224 R0
SYMATTR InstName Rload2
SYMATTR Value 64
SYMBOL res 848 96 R0
SYMATTR InstName Rload1
SYMATTR Value 64
SYMBOL cap 112 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL res 464 320 R0
SYMATTR InstName R2
SYMATTR Value 162K
SYMBOL voltage -16 48 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL cap 560 192 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL res 128 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 6.19K
FLAG -16 160 0
FLAG 32 240 0
FLAG 16 432 0
FLAG 288 496 0
FLAG 864 448 0
FLAG 864 48 OUT1
FLAG -16 48 IN
FLAG 752 144 OUT2
TEXT 584 472 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\22237dede070_Simulacion_SPICE_Montecarlo_Completo.asc
* Generated by LTspice 26.0.1 for Windows.
* Circuit
* Source / Switch
* Parameters
* Simulation setup
V1 Vcc 0 PULSE(0 10 10m 1n 1n 200m 400m 10)
C1 VL+ N001 {mc({C},tol_C)}
R2 N001 0 {mc({R2},tol_R)}
L1 VL+ VL- {mc({L},tol_L)}
R3 VL- 0 {mc({R3},tol_R)}
R1 VL+ Vcc {mc({R1},tol_R)}
.param R1 = 50
.param R2 = 7
.param R3 = 6
.param C = 300u
.param L = 450m
.param tol_R = 0.05
.param tol_C = 0.1
.param tol_L = 0
.step param run 1 50 1
.tran 0 400m 0 1u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -368 -176 -560 -176
WIRE -128 -176 -288 -176
WIRE 144 -176 -128 -176
WIRE -128 -80 -128 -176
WIRE 144 -80 144 -176
WIRE -560 -16 -560 -176
WIRE 144 48 144 0
WIRE -128 112 -128 -16
WIRE 144 112 144 48
WIRE -560 272 -560 64
WIRE -128 272 -128 192
WIRE -128 272 -560 272
WIRE 144 272 144 192
WIRE 144 272 -128 272
WIRE -128 304 -128 272
RECTANGLE Normal -496 -288 -1024 336 2
RECTANGLE Normal 208 -288 -480 336 2
RECTANGLE Normal 608 144 240 304 2
RECTANGLE Normal 608 -288 240 112 2
SYMBOL voltage -560 -32 R0
WINDOW 3 -440 106 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 10 10m 1n 1n 200m 400m 10)
SYMATTR InstName V1
SYMBOL ind 128 -96 R0
WINDOW 3 -182 99 Left 2
SYMATTR Value {mc({L},tol_L)}
SYMATTR InstName L1
SYMBOL res 128 96 R0
WINDOW 3 -195 100 Left 2
SYMATTR Value {mc({R3},tol_R)}
SYMATTR InstName R3
SYMBOL res -144 96 R0
WINDOW 3 -196 98 Left 2
SYMATTR Value {mc({R2},tol_R)}
SYMATTR InstName R2
SYMBOL cap -144 -80 R0
WINDOW 3 -178 55 Left 2
SYMATTR Value {mc({C},tol_C)}
SYMATTR InstName C1
SYMBOL res -272 -192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 37 72 VTop 2
SYMATTR InstName R1
SYMATTR Value {mc({R1},tol_R)}
FLAG -128 304 0
FLAG -560 -176 Vcc
FLAG 144 -176 VL+
FLAG 144 48 VL-
TEXT -400 -264 Left 3 ;Circuit
TEXT -944 -264 Left 3 ;Source / Switch
TEXT 264 -264 Left 3 ;Parameters
TEXT 312 -208 Left 2 !.param R1 = 50
TEXT 312 -176 Left 2 !.param R2 = 7
TEXT 312 -144 Left 2 !.param R3 = 6
TEXT 312 -48 Left 2 !.param C = 300u
TEXT 312 48 Left 2 !.param L = 450m
TEXT 256 168 Left 3 ;Simulation setup
TEXT 312 -112 Left 2 !.param tol_R = 0.05
TEXT 312 -16 Left 2 !.param tol_C = 0.1
TEXT 312 80 Left 2 !.param tol_L = 0
TEXT 320 224 Left 2 !.step param run 1 50 1
TEXT 328 248 Left 2 !.tran 0 400m 0 1u