* Z:\home\khalils\Downloads\files\data\raw_asc\6a8dfa734682_expt1_2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC6752.asy)
* Library below included based on ModelFile attribute of instance XOPA1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
R3 N002 Vsqr {R3}
XOPA1 Vctrl N001 Vdd 0 V_ramp level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 V_bias 0 {Vdd*0.5}
R1 N001 Vsqr {R1}
R6 Vctrl 0 {R6}
R2 N002 V_ramp {R2}
Vdd Vdd 0 {Vdd}
V2 0 -Vdd {Vdd}
C1 V_ramp N001 {C1}
R_bias V_bias V_ramp_b {R_bias}
XU1 Vctrl V_ramp_b Vdd 0 Vpwm LTC6752 ;pnba +In)-In)VCC)VEE)Q
XU2 N002 Vctrl Vdd 0 Vsqr LTC6752 ;pnba +In)-In)VCC)VEE)Q
R5 Vdd Vctrl {R5}
C_bias V_ramp_b V_ramp {C_bias}
.param Vdd = 5
.param R1 = 10k
.param R2 = 10k
.param R3 = 50k
.param R4 = 10k
.param R5 = 5k
.param R6 = 5k
.param R_bias = 10k
.param C1 = 1.25n
.param C_bias = 1.25n
.tran 0 160u 60u
.lib LTC7.lib
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 528 -32 -176 -32
WIRE 16 48 -32 48
WIRE 144 48 80 48
WIRE 400 64 352 64
WIRE 528 64 528 -32
WIRE 528 64 480 64
WIRE -384 96 -384 64
WIRE -176 144 -176 -32
WIRE -144 144 -176 144
WIRE -32 144 -32 48
WIRE -32 144 -64 144
WIRE 16 144 -32 144
WIRE 144 160 144 48
WIRE 144 160 80 160
WIRE 224 160 144 160
WIRE 352 160 352 64
WIRE 352 160 304 160
WIRE 400 160 352 160
WIRE 16 176 -32 176
WIRE 528 176 528 64
WIRE 528 176 464 176
WIRE -320 192 -352 192
WIRE 400 192 368 192
WIRE -384 208 -384 176
WIRE -352 208 -352 192
WIRE -352 208 -384 208
WIRE -384 224 -384 208
WIRE -352 224 -352 208
WIRE -320 224 -352 224
WIRE 144 240 144 160
WIRE 144 240 96 240
WIRE -656 272 -656 256
WIRE 144 304 144 240
WIRE 240 304 240 288
WIRE 240 304 208 304
WIRE 400 304 240 304
WIRE 512 320 464 320
WIRE -384 336 -384 304
WIRE 400 336 368 336
WIRE 240 416 240 384
SYMBOL OpAmps\\UniversalOpAmp 48 160 R0
SYMATTR InstName OPA1
SYMBOL res 224 400 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R_bias
SYMATTR Value {R_bias}
SYMBOL voltage -512 160 R0
WINDOW 0 32 16 Invisible 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdd
SYMATTR Value {Vdd}
SYMBOL Comparators\\LTC6752 432 240 M180
SYMATTR InstName U2
SYMBOL res -400 80 R0
SYMATTR InstName R5
SYMATTR Value {R5}
SYMBOL Comparators\\LTC6752 432 256 R0
SYMATTR InstName U1
SYMBOL res 384 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value {R3}
SYMBOL res 320 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL cap 208 288 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C_bias
SYMATTR Value {C_bias}
SYMBOL res -400 208 R0
SYMATTR InstName R6
SYMATTR Value {R6}
SYMBOL cap 80 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {C1}
SYMBOL res -48 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL voltage -768 160 R0
SYMATTR InstName V2
SYMATTR Value {Vdd}
SYMBOL voltage -656 160 R0
WINDOW 0 24 16 Invisible 2
WINDOW 3 14 94 Left 2
SYMATTR InstName V1
SYMATTR Value {Vdd*0.5}
FLAG -512 256 0
FLAG -384 336 0
FLAG -320 192 Vcm
FLAG -384 64 Vdd
FLAG -512 176 Vdd
FLAG -32 176 Vcm
FLAG 368 336 Vctrl
FLAG 528 176 Vsqr
FLAG 512 320 Vpwm
FLAG 368 192 Vcm
FLAG 240 416 V_bias
FLAG 48 128 Vdd
FLAG 432 208 Vdd
FLAG 432 288 Vdd
FLAG -320 224 Vctrl
FLAG -656 272 0
FLAG -656 176 V_bias
FLAG 96 240 V_ramp
FLAG 240 288 V_ramp_b
FLAG -768 176 0
FLAG -768 256 -Vdd
FLAG 432 352 0
FLAG 432 144 0
FLAG 48 192 0
TEXT -232 256 Left 2 !.param Vdd = 5\n \n.param R1 = 10k\n.param R2 = 10k\n.param R3 = 50k\n.param R4 = 10k\n.param R5 = 5k\n.param R6 = 5k\n.param R_bias = 10k\n \n.param C1 = 1.25n\n.param C_bias = 1.25n
TEXT -544 488 Left 2 !.tran 0 160u 60u