Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\2b157e6c9087_LTC1060_Mode1.asc
* Generated by LTspice 26.0.1 for Windows.
* -5V/5V AGND/LP
* 0V/5V=100/50
* f0=fclk/100(50)\nfn=f0\nHolp=R2/R1\nHobp=-R3/R1\nHont1=-R2/R1\nQ=R3/R2
* Library below included based on ModelFile attribute of instance XX2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\FilterProducts\LTC1060.asy)
A1 IN 0 0 0 0 0 N002 0 MODULATOR space 0k mark 10k
V2 CLK 0 PULSE(0 5 0 5n 5n 995n 2u)
XX2 NC_05 NC_06 NC_07 N001 NC_08 NC_09 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 LTC1060 fclka=1k fclkb=1k divider=50 ;pnba LPA)BPA)HPA/NA)INV A)SA)SA/B)VA+)VD+)VD-)VA-)AGND)SB)INV B)HPB/NB)BPB)LPB
V4 N003 0 5
R4 N001 LP 10g
V3 N004 0 5
R1 N002 N001 5k
V1 IN 0 PWL(0 0.01 50m 5)
R2 N001 HP 5k
R3 N001 BP 20k
.tran 25m
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 -208 -96 -208
WIRE 496 -208 400 -208
WIRE -96 -96 -96 -208
WIRE 128 -96 -96 -96
WIRE 384 -96 208 -96
WIRE -96 -16 -96 -96
WIRE -32 -16 -96 -16
WIRE 128 -16 48 -16
WIRE 128 16 128 -16
WIRE 384 16 384 -96
WIRE 496 16 496 -208
WIRE 128 48 128 16
WIRE 240 48 240 16
WIRE 384 48 384 16
WIRE 496 48 496 16
WIRE -592 96 -640 96
WIRE -448 96 -592 96
WIRE -240 128 -304 128
WIRE -96 128 -96 -16
WIRE -96 128 -160 128
WIRE -32 128 -96 128
WIRE -640 176 -640 96
WIRE -32 240 -96 240
WIRE -96 272 -96 240
WIRE -640 288 -640 256
WIRE -96 368 -128 368
WIRE 128 368 128 320
WIRE 128 368 -96 368
WIRE -128 400 -128 368
WIRE 240 400 240 320
WIRE 352 400 352 320
WIRE -128 512 -128 480
WIRE 240 512 240 480
WIRE 352 512 352 480
SYMBOL res -256 144 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 5k
SYMBOL SpecialFunctions\\modulate -448 96 R0
SYMATTR InstName A1
SYMATTR Value2 space 0k mark 10k
SYMBOL voltage 352 384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL LTC1060 128 192 R0
SYMATTR InstName X2
SYMBOL voltage -640 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0.01 50m 5)
SYMBOL voltage -128 384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 5n 5n 995n 2u)
SYMBOL res 112 -80 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R3
SYMATTR Value 20k
SYMBOL voltage 240 384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL res 304 -192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R4
SYMATTR Value 10g
SYMBOL res -48 0 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R2
SYMATTR Value 5k
FLAG -96 272 0
FLAG 352 512 0
FLAG 496 -208 LP
FLAG 384 -96 S1
FLAG 384 16 BP
FLAG -592 96 IN
FLAG -640 288 0
FLAG -96 368 CLK
FLAG -128 512 0
FLAG 240 512 0
FLAG 240 16 0
FLAG 496 16 LP
FLAG 128 16 HP
TEXT -608 -64 Left 0 !.tran 25m
TEXT 400 440 Left 0 ;-5V/5V AGND/LP
TEXT 40 440 Left 0 ;0V/5V=100/50
TEXT -432 -200 Left 0 ;f0=fclk/100(50)\nfn=f0\nHolp=R2/R1\nHobp=-R3/R1\nHont1=-R2/R1\nQ=R3/R2
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP5302-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP5302-1.asy)
Rload OUT 0 36
XU1 IN IN 0 N003 OUT N001 0 0 N002 0 ADP5302 OD=0 ;pnba EN)PVin)Sync/Mode)VID)FB)VoutOK)Pgnd)Agnd)SW)Stop
C1 OUT 0 10
L1 N002 OUT 2.2 Rser=80m
R1 OUT N001 1Meg
R2 N003 0 19.6K
V1 IN 0 5
.tran .6m startup
.lib ADP5302.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 64 64 64
WIRE 160 64 144 64
WIRE 496 64 416 64
WIRE 608 64 576 64
WIRE 64 80 64 64
WIRE 144 144 144 64
WIRE 160 144 144 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 608 144 608 64
WIRE 608 144 560 144
WIRE 688 144 608 144
WIRE 608 160 608 144
WIRE 688 160 688 144
WIRE 64 176 64 160
WIRE 160 224 144 224
WIRE 560 224 560 144
WIRE 560 224 416 224
WIRE 608 256 608 224
WIRE 688 256 688 240
WIRE 160 304 144 304
WIRE 448 304 416 304
WIRE 544 304 528 304
WIRE 240 384 240 368
WIRE 336 384 336 368
SYMBOL res 432 320 R270
WINDOW 3 0 56 VBottom 2
WINDOW 0 32 56 VTop 2
SYMATTR Value 19.6K
SYMATTR InstName R2
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=80m
SYMBOL res 672 144 R0
SYMATTR Value 36
SYMATTR InstName Rload
SYMBOL voltage 64 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL ADP5302-1 288 192 R0
SYMATTR InstName U1
SYMBOL cap 592 160 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 544 304 0
FLAG 608 256 0
FLAG 240 384 0
FLAG 64 176 0
FLAG 688 144 OUT
FLAG 688 256 0
FLAG 64 64 IN
FLAG 336 384 0
FLAG 144 304 0
FLAG 144 224 0
TEXT 440 384 Left 2 !.tran .6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1059dd86f08a_No_load.asc
* Generated by LTspice 26.0.1 for Windows.
* In
* Components\n1 capacitor 2200uf - 250V\n1 resistor 18k ohm - 5w\n6 diodes MUR460 \n1 resistor 100 ohm - 10w
D4 0 N004 MUR460
C1 N003 0 2200 V=250
D6 N005 N001 MUR460
D1 N002 N001 MUR460
D2 0 N002 MUR460
V1 N002 0 SINE(0 120 60 0 0 0) Rser=0
R1 N001 0 18000 tol=5 pwr=5
V3 N005 0 SINE(0 120 60 0 0 120) Rser=0
D5 0 N005 MUR460
D3 N004 N001 MUR460
V2 N004 0 SINE(0 120 60 0 0 -120) Rser=0
R2 N001 N003 100 tol=5 pwr=10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 100ms 0 10u
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1708 680
WIRE 720 -48 560 -48
WIRE 848 -48 720 -48
WIRE 960 -48 848 -48
WIRE 1136 -48 960 -48
WIRE 960 -32 960 -48
WIRE 560 -16 560 -48
WIRE 720 -16 720 -48
WIRE 848 -16 848 -48
WIRE 560 80 560 48
WIRE 560 80 -416 80
WIRE 960 80 960 48
WIRE 1136 80 1136 -48
WIRE 720 96 720 48
WIRE 720 96 -112 96
WIRE 848 112 848 48
WIRE 848 112 240 112
WIRE -416 160 -416 80
WIRE -112 160 -112 96
WIRE 240 160 240 112
WIRE 560 208 560 80
WIRE 720 208 720 96
WIRE 848 208 848 112
WIRE 560 288 560 272
WIRE 720 288 720 272
WIRE 720 288 560 288
WIRE 848 288 848 272
WIRE 848 288 720 288
WIRE 960 288 960 144
WIRE 960 288 848 288
WIRE 1024 288 960 288
WIRE 1136 288 1136 160
WIRE 1136 288 1024 288
WIRE -416 336 -416 240
WIRE -128 336 -416 336
WIRE -112 336 -112 240
WIRE -112 336 -128 336
WIRE 240 336 240 240
WIRE 240 336 -112 336
WIRE 1024 352 1024 288
WIRE -128 384 -128 336
SYMBOL res 1120 64 R0
SYMATTR InstName R1
SYMATTR Value 18000
SYMATTR SpiceLine tol=5 pwr=5
SYMBOL diode 576 272 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value MUR460
SYMBOL cap 944 80 R0
SYMATTR InstName C1
SYMATTR Value 2200
SYMATTR SpiceLine V=250
SYMBOL diode 576 48 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MUR460
SYMBOL diode 864 272 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D5
SYMATTR Value MUR460
SYMBOL res 944 -48 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMATTR SpiceLine tol=5 pwr=10
SYMBOL diode 736 272 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMATTR Value MUR460
SYMBOL voltage 240 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0
SYMATTR InstName V3
SYMATTR Value SINE(0 120 60 0 0 120)
SYMBOL voltage -416 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0
SYMATTR InstName V1
SYMATTR Value SINE(0 120 60 0 0 0)
SYMBOL diode 864 48 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D6
SYMATTR Value MUR460
SYMBOL voltage -112 144 R0
WINDOW 123 24 124 Left 2
WINDOW 39 24 152 Left 2
SYMATTR SpiceLine Rser=0
SYMATTR InstName V2
SYMATTR Value SINE(0 120 60 0 0 -120)
SYMBOL diode 736 48 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value MUR460
FLAG -128 384 0
FLAG 1024 352 0
TEXT 0 376 Left 2 !.tran 0 100ms 0 10u
TEXT 352 64 Left 2 ;In
TEXT 128 -104 Left 2 ;Components\n1 capacitor 2200uf - 250V\n1 resistor 18k ohm - 5w\n6 diodes MUR460 \n1 resistor 100 ohm - 10w
* Z:\home\khalils\Downloads\files\data\raw_asc\9635c027a574_180n_IDVG.asc
* Generated by LTspice 26.0.1 for Windows.
VD N001 0 1.8
VG N002 0 1.8
M1 N001 N002 0 0 NMOS l=180n w=270n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib "tsmc018.lib"
.dc VG 0 1.8 0.01 VD 0.05 1.8 1.75
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 64 224 64
WIRE 368 112 368 64
WIRE 224 144 224 64
WIRE 304 192 224 192
WIRE 176 224 64 224
WIRE 304 240 304 192
WIRE 304 240 224 240
WIRE 64 336 64 304
WIRE 224 336 224 240
WIRE 224 336 64 336
WIRE 368 336 368 192
WIRE 368 336 224 336
WIRE 224 352 224 336
SYMBOL nmos4 176 144 R0
SYMATTR InstName M1
SYMATTR Value2 l=180n w=270n
SYMBOL voltage 368 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VD
SYMATTR Value 1.8
SYMBOL voltage 64 208 R0
SYMATTR InstName VG
SYMATTR Value 1.8
FLAG 224 352 0
TEXT 464 248 Left 2 !.lib "tsmc018.lib"
TEXT 40 432 Left 2 !.dc VG 0 1.8 0.01 VD 0.05 1.8 1.75
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8641.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8641.asy)
V1 +V 0 12
Vin IN 0 SINE(0 1 100K)
Rload OUT 0 10K
XU1 IN N001 +V -V OUT AD8641 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -12
R1 N001 0 10K
R2 OUT N001 10K
.tran 100u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1200 144 -1216
WIRE 256 -1200 256 -1216
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 144 -1104 144 -1120
WIRE 256 -1104 256 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 384 -1088
WIRE 752 -1088 752 -1104
WIRE 384 -1072 384 -1088
WIRE 752 -992 752 -1008
WIRE 384 -976 384 -992
SYMBOL voltage 144 -1216 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 384 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100K)
SYMBOL voltage 256 -1216 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL Opamps\\AD8641 576 -1168 R0
SYMATTR InstName U1
FLAG 384 -976 0
FLAG 752 -1104 OUT
FLAG 384 -1088 IN
FLAG 576 -1136 +V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 752 -992 0
FLAG 144 -1216 +V
FLAG 256 -1216 -V
FLAG 256 -1104 0
FLAG 144 -1104 0
TEXT 728 -944 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8028.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8028.asy)
XU1 OUT N003 0 IN N002 N002 0 NC_01 OUT N002 NC_02 N004 N005 N001 NC_03 LTM8028 ;pnba Vout)BKV)GND)Vin)Vo0)Vo1)Vo2)MARGA)Sensep)VoB)Imax)SS)Rt)RUN)Pgood
Rload OUT 0 .24
C1 N004 0 .01
R1 N005 0 165K
V1 IN 0 24
R2 IN N001 402K
C2 OUT 0 137 Rser=5m
C3 N003 0 570 Rser=10m
.tran 2.5m startup
.lib LTM8028.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 728
WIRE 16 0 -80 0
WIRE 112 0 16 0
WIRE 416 0 400 0
WIRE 496 0 416 0
WIRE 608 0 496 0
WIRE -80 16 -80 0
WIRE 16 16 16 0
WIRE 496 16 496 0
WIRE 608 16 608 0
WIRE 112 96 16 96
WIRE 416 96 416 0
WIRE 416 96 400 96
WIRE -80 112 -80 96
WIRE 496 112 496 80
WIRE 608 112 608 96
WIRE 112 192 96 192
WIRE 464 192 400 192
WIRE 464 208 464 192
WIRE 96 288 96 192
WIRE 112 288 96 288
WIRE 464 288 464 272
WIRE 96 384 96 288
WIRE 112 384 96 384
WIRE 112 480 96 480
WIRE 32 576 0 576
WIRE 112 576 96 576
WIRE 416 576 400 576
WIRE 512 576 496 576
WIRE 256 656 256 640
SYMBOL PowerProducts\\LTM8028 256 288 R0
SYMATTR InstName U1
SYMBOL res 400 592 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 165K
SYMBOL cap 480 16 R0
SYMATTR InstName C2
SYMATTR Value 137
SYMATTR SpiceLine Rser=5m
SYMBOL res 0 0 R0
SYMATTR InstName R2
SYMATTR Value 402K
SYMBOL res 592 0 R0
SYMATTR InstName Rload
SYMATTR Value .24
SYMBOL cap 448 208 R0
SYMATTR InstName C3
SYMATTR Value 570
SYMATTR SpiceLine Rser=10m
SYMBOL cap 96 560 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL voltage -80 0 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 24
FLAG 256 656 0
FLAG 512 576 0
FLAG 0 576 0
FLAG 96 480 0
FLAG -80 112 0
FLAG 496 112 0
FLAG 608 112 0
FLAG 464 288 0
FLAG -80 0 IN
FLAG 608 0 OUT
TEXT 552 632 Left 2 !.tran 2.5m startup
* Z:\tmp\asc_dec_bjh7r6w2\1a05d3367533_Howland_Improved_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N004 N001 +V -V N002 ADA4522 ;pnba In+)In-)V+)V-)OUT
R1 N002 N001 {R}
V1 +V 0 +15
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1280 728
WIRE 208 48 144 48
WIRE 352 48 272 48
WIRE -880 128 -880 112
WIRE -752 128 -752 112
WIRE 32 160 -48 160
WIRE 144 160 144 48
WIRE 144 160 112 160
WIRE 192 160 144 160
WIRE 352 160 352 48
WIRE 352 160 272 160
WIRE 416 160 352 160
WIRE -880 224 -880 208
WIRE -752 224 -752 208
WIRE 144 256 144 160
WIRE 160 256 144 256
WIRE 416 272 416 160
WIRE 416 272 224 272
WIRE 160 288 144 288
WIRE 16 368 -128 368
WIRE 144 368 144 288
WIRE 144 368 96 368
WIRE 192 368 144 368
WIRE 288 368 272 368
WIRE 304 368 288 368
WIRE 416 368 416 272
WIRE 416 368 384 368
WIRE 288 496 288 368
SYMBOL Opamps\\opamp2 192 208 R0
SYMATTR InstName U1
SYMATTR Value ADA4522
SYMBOL res 288 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R}
SYMBOL voltage -880 112 R0
SYMATTR InstName V1
SYMATTR Value +15
FLAG -752 224 0
FLAG -880 224 0
FLAG 192 240 +V
FLAG -880 112 +V
FLAG -752 112 -V
FLAG 192 304 -V
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3200.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3200.asy)
XU1 N002 IN N001 0 0 IN N003 OUT LTC3200 ;pnba Cap+)Vin)Cap-)PGND)GND)_SHDN)FB)Vout
C1 N002 N001 1
Rload OUT 0 50
R2 OUT N003 746.4K
C2 OUT 0 1
R3 N003 0 250K
V1 IN 0 3
.tran 1m startup
.lib LTC3200.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3164 2128
WIRE 2576 1664 2528 1664
WIRE 2688 1664 2640 1664
WIRE 2528 1744 2528 1664
WIRE 2688 1744 2688 1664
WIRE 2448 1824 2368 1824
WIRE 2480 1824 2448 1824
WIRE 2832 1824 2736 1824
WIRE 2976 1824 2832 1824
WIRE 3072 1824 2976 1824
WIRE 2368 1840 2368 1824
WIRE 3072 1840 3072 1824
WIRE 2976 1856 2976 1824
WIRE 2448 1920 2448 1824
WIRE 2480 1920 2448 1920
WIRE 2832 1920 2832 1904
WIRE 2832 1920 2736 1920
WIRE 2832 1936 2832 1920
WIRE 2976 1936 2976 1920
WIRE 3072 1936 3072 1920
WIRE 2368 1952 2368 1920
WIRE 2544 2032 2544 2000
WIRE 2672 2032 2672 2000
WIRE 2832 2032 2832 2016
SYMBOL VOLTAGE 2368 1824 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res 2816 1808 R0
SYMATTR InstName R2
SYMATTR Value 746.4K
SYMBOL RES 3056 1824 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL cap 2960 1856 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 2640 1648 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL POWERPRODUCTS\\LTC3200 2608 1872 R0
WINDOW 3 80 142 Left 2
SYMATTR InstName U1
SYMBOL res 2816 1920 R0
SYMATTR InstName R3
SYMATTR Value 250K
FLAG 2368 1952 0
FLAG 2976 1936 0
FLAG 3072 1936 0
FLAG 2672 2032 0
FLAG 2544 2032 0
FLAG 2832 2032 0
FLAG 3072 1824 OUT
FLAG 2368 1824 IN
TEXT 2952 2032 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\4d58c4a82f65_1047.asc
* Generated by LTspice 26.0.1 for Windows.
* Precise DC Full-Wave Rectifier(Absolute Value Circuit)
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC1047.asy)
D1 N003 N002 1N4148
R2 N001 IN 220K
XU2 N002 OUT +V 0 OUT LTC1047 ;pnba In+)In-)V+)V-)OUT
XU1 0 N001 +V 0 N003 LTC1047 ;pnba In+)In-)V+)V-)OUT
R1 N002 N001 220K
V3 IN 0 SINE(0 1 1K)
V1 +V 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 576 128 464 128
WIRE 32 144 -112 144
WIRE 128 144 112 144
WIRE 256 144 128 144
WIRE 432 144 336 144
WIRE -112 160 -112 144
WIRE -224 176 -224 160
WIRE 512 192 512 176
WIRE 192 208 192 192
WIRE 464 208 464 128
WIRE 480 208 464 208
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 576 224 576 128
WIRE 576 224 544 224
WIRE 608 224 576 224
WIRE 352 240 224 240
WIRE 432 240 432 144
WIRE 432 240 416 240
WIRE 480 240 432 240
WIRE -112 256 -112 240
WIRE 160 256 128 256
WIRE -224 272 -224 256
WIRE 512 272 512 256
WIRE 192 288 192 272
SYMBOL res 352 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 220K
SYMBOL opamps\\LTC1047 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -224 160 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL diode 352 256 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL opamps\\LTC1047 512 160 R0
SYMATTR InstName U2
SYMBOL res 128 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 220K
SYMBOL voltage -112 144 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
FLAG -224 272 0
FLAG 192 192 +V
FLAG -224 160 +V
FLAG -112 256 0
FLAG 192 288 0
FLAG 512 176 +V
FLAG 512 272 0
FLAG 128 256 0
FLAG 608 224 OUT
FLAG -112 144 IN
TEXT 544 320 Left 2 !.tran 3m
TEXT 200 88 Bottom 2 ;Precise DC Full-Wave Rectifier(Absolute Value Circuit)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP121-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP121-3.0.asy)
XU1 OUT MP_01 0 IN MP_02 IN ADP121 K=1/3750 ;pnba Vout))GND)En))Vin
C1 IN 0 1
Rload OUT 0 22
C2 OUT 0 1
V1 IN 0 5.5
.tran 10m startup
.lib ADP121.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL ADP121-3.0 256 208 R0
SYMATTR InstName U1
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 22
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1ae901d2d56c_FullAdder.asc
* Generated by LTspice 26.0.1 for Windows.
A1 0 A 0 B 0 N001 0 0 XOR
A2 0 A 0 B 0 N003 0 0 AND
A3 N001 0 0 0 C sum 0 0 XOR
A4 N001 0 0 C 0 N002 0 0 AND
A5 0 N002 0 N003 0 Cout 0 0 OR
V3 C 0 V
V1 A 0 V
V2 B 0 V
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1008 680
WIRE -160 -48 -208 -48
WIRE -208 0 -208 -48
WIRE -160 112 -208 112
WIRE 304 128 256 128
WIRE 320 128 304 128
WIRE -208 160 -208 112
WIRE 272 160 256 160
WIRE 320 160 272 160
WIRE 496 160 400 160
WIRE 544 160 496 160
WIRE 688 208 624 208
WIRE 448 224 208 224
WIRE 544 224 448 224
WIRE -160 256 -208 256
WIRE 496 256 496 160
WIRE 576 256 496 256
WIRE 448 288 448 224
WIRE 528 288 448 288
WIRE 576 288 576 256
WIRE 592 288 576 288
WIRE -208 304 -208 256
WIRE 304 336 304 128
WIRE 384 336 304 336
WIRE 528 336 528 288
WIRE 592 336 528 336
WIRE 768 336 656 336
WIRE 272 368 272 160
WIRE 384 368 272 368
WIRE 768 368 448 368
WIRE 896 368 832 368
IOPIN 256 128 In
IOPIN 256 160 In
IOPIN -80 -48 Out
IOPIN -80 112 Out
IOPIN -80 256 Out
IOPIN 208 224 In
IOPIN 688 208 Out
IOPIN 896 368 Out
SYMBOL voltage -64 112 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMBOL Digital\\and 416 288 R0
SYMATTR InstName A2
SYMBOL Digital\\xor 368 80 R0
SYMATTR InstName A1
SYMBOL Digital\\xor 592 128 R0
SYMATTR InstName A3
SYMBOL voltage -64 256 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V3
SYMBOL Digital\\and 624 256 R0
SYMATTR InstName A4
SYMBOL voltage -64 -48 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMBOL Digital\\or 800 288 R0
SYMATTR InstName A5
FLAG 256 128 A
FLAG 256 160 B
FLAG -80 -48 A
FLAG -80 112 B
FLAG -80 256 C
FLAG -208 0 0
FLAG -208 160 0
FLAG -208 304 0
FLAG 208 224 C
FLAG 688 208 sum
FLAG 896 368 Cout
TEXT 264 424 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG774.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nOff Isolation is -75 dB at 10MHz\nOnly one channel included\nCharge Injection not included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG774.asy)
V3 N004 0 PULSE(0 3 0 20n 20n 10u 20u)
V1 N001 0 3
V2 N003 0 0
C1 N002 0 36p
XU2 N004 N001 N002 N003 +V 0 0 ADG774 ;pnba IN)SA)D)SB)Vdd)GND)_EN
V5 +V 0 5
R1 N002 0 49.9
.tran 100u
.lib ADG774.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1696 -272 -1920 -272
WIRE -1920 -256 -1920 -272
WIRE -1408 -240 -1504 -240
WIRE -1296 -240 -1408 -240
WIRE -1408 -224 -1408 -240
WIRE -1296 -224 -1296 -240
WIRE -1696 -208 -1840 -208
WIRE -1840 -192 -1840 -208
WIRE -1920 -160 -1920 -176
WIRE -1696 -144 -1760 -144
WIRE -1472 -144 -1504 -144
WIRE -1472 -128 -1472 -144
WIRE -1408 -128 -1408 -144
WIRE -1296 -128 -1296 -160
WIRE -1840 -96 -1840 -112
WIRE -1760 -80 -1760 -144
WIRE -1600 -16 -1600 -32
WIRE -1760 32 -1760 0
SYMBOL voltage -1840 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL ADG774 -1600 -192 R0
SYMATTR InstName U2
SYMBOL voltage -1760 -96 R0
WINDOW 3 24 136 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 20n 20n 10u 20u)
SYMATTR InstName V3
SYMBOL cap -1312 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -2144 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 5
SYMBOL voltage -1920 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res -1424 -240 R0
SYMATTR InstName R1
SYMATTR Value 49.9
FLAG -1920 -160 0
FLAG -1840 -96 0
FLAG -1760 32 0
FLAG -1600 -368 +V
FLAG -1408 -128 0
FLAG -1600 -16 0
FLAG -1296 -128 0
FLAG -1472 -128 0
FLAG -2144 -64 0
FLAG -2144 -144 +V
TEXT -1360 -40 Left 2 !.tran 100u
TEXT -2160 -472 Left 2 ;Note:\nOff Isolation is -75 dB at 10MHz\nOnly one channel included\nCharge Injection not included\nSwitch shown for a logic 0 input