Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX313L.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nBandwidth = 174 MHz Only.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\MAX313L.asy)
V2 N003 0 PULSE(0 2.4 0 10n 10n 5u 10u)
V1 +V 0 15
V3 -V 0 -15
VS N001 0 3
R1 N002 0 47
XU1 +V N003 NC_01 NC_02 NC_03 -V N001 N002 NC_04 NC_05 NC_06 NC_07 NC_08 NC_09 0 MAX313L ;pnba VDD)IN1)IN2)IN3)IN4)VSS)NO1)COM1)NO2)COM2)NO3)COM3)NO4)COM4)GND
C1 N002 0 33p
.tran 20u
.lib MAX313L.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -432 -16 -464 -16
WIRE -256 -16 -352 -16
WIRE 0 -16 -32 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE 112 32 112 -16
WIRE -256 48 -432 48
WIRE -736 112 -736 64
WIRE -592 112 -592 64
WIRE -432 112 -432 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -736 272 -736 192
WIRE -592 272 -592 192
WIRE -432 272 -432 192
WIRE -96 592 -96 576
WIRE -192 608 -192 576
SYMBOL voltage -336 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 47
SYMBOL voltage -592 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 33p
SYMBOL MAX313L -144 32 R0
SYMATTR InstName U1
SYMBOL voltage -432 96 R0
WINDOW 3 -261 238 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 2.4 0 10n 10n 5u 10u)
SYMATTR InstName V2
SYMBOL voltage -736 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -15
FLAG -592 272 0
FLAG -592 64 +V
FLAG -464 -16 0
FLAG -144 -112 +V
FLAG -96 592 0
FLAG -432 272 0
FLAG 0 112 0
FLAG 112 112 0
FLAG -736 272 0
FLAG -736 64 -V
FLAG -192 608 -V
TEXT 112 616 Left 2 !.tran 20u
TEXT -712 -200 Left 2 ;Note:\nBandwidth = 174 MHz Only.
* Z:\home\khalils\Downloads\files\data\raw_asc\3ecc0e2bc5e5_03-IVcurves.asc
* Generated by LTspice 26.0.1 for Windows.
* using DC Sweep
* Using Step directive
;tran 10m
;.dc V2 0 10 1
R2 V2 Vin2 1k
D1 V2 0 1N4007
V2 Vin2 0 {Vs}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.IC V(Vo) 0
.op
.STEP PARAM Vs 0 10 .1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1088 680
WIRE 720 -128 672 -128
WIRE 864 -128 720 -128
WIRE 960 -128 944 -128
WIRE 1040 -128 960 -128
WIRE 720 16 720 -128
WIRE 960 32 960 -128
WIRE 720 192 720 96
WIRE 960 192 960 96
SYMBOL diode 944 32 R0
SYMATTR InstName D1
SYMATTR Value 1N4007
SYMBOL voltage 720 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value {Vs}
SYMBOL res 960 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 960 192 0
FLAG 720 192 0
FLAG 1040 -128 V2
FLAG 672 -128 Vin2
TEXT 264 32 Left 2 !;tran 10m
TEXT 264 72 Left 2 !.IC V(Vo) 0
TEXT 264 112 Left 2 !;.dc V2 0 10 1
TEXT 264 224 Left 2 !.op
TEXT 264 272 Left 2 !.STEP PARAM Vs 0 10 .1
TEXT 456 112 Left 2 ;using DC Sweep
TEXT 376 224 Left 2 ;Using Step directive
* Z:\home\khalils\Downloads\files\data\raw_asc\145b6d545836_Current_Mirror.asc
* Generated by LTspice 26.0.1 for Windows.
* From https://hardware.buspirate.com/#programmable-power-supply-unit\nR1 R2 imbalance makes the circuit more sensitive to a higher V2.\nR5 decouples both transistors.\nD1 protects Q1 from reverse BE voltage.
R4 v2 e2 1m
R2 out 0 100k
V2 v2 0 PWL(0 10 1m 10 1.1m 10.01 2m 10.01 2.1m 9.99 3m 9.99 3.1m 10)
Q2 out N001 e2 0 BC857B
R5 N001 base 10k
V1 v1 0 10
Q1 base base e1 0 BC857B
R1 base 0 75k
R3 v1 e1 1m
D1 base v1 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 4m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1416 680
WIRE -192 -32 -208 -32
WIRE 16 -32 -192 -32
WIRE 160 -32 16 -32
WIRE 592 -32 384 -32
WIRE 608 -32 592 -32
WIRE 16 -16 16 -32
WIRE 384 -16 384 -32
WIRE 160 64 160 -32
WIRE 16 112 16 64
WIRE 384 112 384 64
WIRE 16 160 16 112
WIRE 384 160 384 112
WIRE -208 192 -208 -32
WIRE 608 192 608 -32
WIRE 112 208 80 208
WIRE 160 208 160 128
WIRE 160 208 112 208
WIRE 208 208 160 208
WIRE 320 208 288 208
WIRE 16 272 16 256
WIRE 160 272 160 208
WIRE 160 272 16 272
WIRE 384 272 384 256
WIRE 432 272 384 272
WIRE -208 288 -208 272
WIRE 16 288 16 272
WIRE 384 288 384 272
WIRE 608 288 608 272
WIRE 16 400 16 368
WIRE 192 400 16 400
WIRE 384 400 384 368
WIRE 384 400 192 400
WIRE 192 416 192 400
SYMBOL res 0 -32 R0
SYMATTR InstName R3
SYMATTR Value 1m
SYMBOL pnp 320 256 M180
SYMATTR InstName Q2
SYMATTR Value BC857B
SYMBOL res 368 -32 R0
SYMATTR InstName R4
SYMATTR Value 1m
SYMBOL pnp 80 256 R180
SYMATTR InstName Q1
SYMATTR Value BC857B
SYMBOL voltage 608 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 10 1m 10 1.1m 10.01 2m 10.01 2.1m 9.99 3m 9.99 3.1m 10)
SYMBOL res 304 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL res 368 272 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res 0 272 R0
SYMATTR InstName R1
SYMATTR Value 75k
SYMBOL diode 176 128 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage -208 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
FLAG 192 416 0
FLAG 112 208 base
FLAG -208 288 0
FLAG -192 -32 v1
FLAG 432 272 out
FLAG 608 288 0
FLAG 592 -32 v2
FLAG 16 112 e1
FLAG 384 112 e2
TEXT -242 440 Left 2 !.tran 4m
TEXT -176 -176 Left 2 ;From https://hardware.buspirate.com/#programmable-power-supply-unit\nR1 R2 imbalance makes the circuit more sensitive to a higher V2.\nR5 decouples both transistors.\nD1 protects Q1 from reverse BE voltage.
* Z:\home\khalils\Downloads\files\data\raw_asc\0ab8ef21ab31_1394.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1394.asy)
V1 +V 0 5
V3 N002 0 pulse(0 2 0 .5m .5m 0 1m)
V2 N004 0 1
XU1 +V N002 N004 0 0 0 N003 N001 LT1394 ;pnba V+)In+)In-)V-)LE)GND)Q)_Q
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 192 224 192
WIRE 608 192 512 192
WIRE -128 256 -176 256
WIRE 256 256 -48 256
WIRE 608 256 512 256
WIRE 112 320 96 320
WIRE 256 320 192 320
WIRE 544 320 512 320
WIRE -48 384 -48 368
WIRE 256 384 224 384
WIRE 544 384 512 384
WIRE -48 480 -48 464
SYMBOL Comparators\\LT1394 384 288 R0
SYMATTR InstName U1
SYMBOL voltage -32 256 R90
WINDOW 3 32 56 VTop 0
WINDOW 0 -32 56 VBottom 0
SYMATTR Value pulse(0 2 0 .5m .5m 0 1m)
SYMATTR InstName V3
SYMBOL voltage -48 368 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 208 320 R90
WINDOW 0 -32 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName V2
SYMATTR Value 1
FLAG -48 480 0
FLAG -48 368 +V
FLAG 224 192 +V
FLAG -176 256 0
FLAG 96 320 0
FLAG 544 320 0
FLAG 224 384 0
FLAG 544 384 0
TEXT 488 480 Left 0 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\0a0365006e3f_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
D3 N004 0 NSPW500BS
D1 N001 N002 NSPW500BS
V2 N001 0 4.5 Rser=300m
R3 N001 N003 20k
Q1 N002 N003 N005 0 BC337-25
R1 N001 N004 120 tol=1
R2 N005 0 10k
R4 N001 N003 150k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 -128 -304 -128
WIRE 0 -128 -96 -128
WIRE 96 -128 0 -128
WIRE 192 -128 96 -128
WIRE 192 -96 192 -128
WIRE -304 -64 -304 -128
WIRE -96 -64 -96 -128
WIRE 0 -48 0 -128
WIRE 96 -48 96 -128
WIRE 192 64 192 -32
WIRE 0 112 0 32
WIRE 96 112 96 32
WIRE 96 112 0 112
WIRE 128 112 96 112
WIRE -96 208 -96 16
WIRE 192 208 192 160
WIRE -304 320 -304 16
WIRE -144 320 -304 320
WIRE -96 320 -96 272
WIRE -96 320 -144 320
WIRE 192 320 192 288
WIRE 192 320 -96 320
WIRE -144 336 -144 320
SYMBOL LED -112 208 R0
SYMATTR InstName D3
SYMATTR Value NSPW500BS
SYMBOL res 80 -64 R0
SYMATTR InstName R3
SYMATTR Value 20k
SYMBOL res -16 -64 R0
SYMATTR InstName R4
SYMATTR Value 150k
SYMBOL res -112 -80 R0
SYMATTR InstName R1
SYMATTR Value 120
SYMATTR SpiceLine tol=1
SYMBOL Misc\\battery -304 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 132 Left 2
SYMATTR InstName V2
SYMATTR Value 4.5
SYMATTR SpiceLine Rser=300m
SYMBOL LED 176 -96 R0
SYMATTR InstName D1
SYMATTR Value NSPW500BS
SYMBOL npn 128 64 R0
SYMATTR InstName Q1
SYMATTR Value BC337-25
SYMBOL res 176 192 R0
SYMATTR InstName R2
SYMATTR Value 10k
FLAG -144 336 0
TEXT -338 330 Left 2 !.tran 100
* Z:\tmp\asc_mix_bvbm4pog\mix_17.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 10
L1 N003 OUT 100
D1 0 N003 MBR0530L
C1 OUT 0 100
R1 OUT N007 1.68Meg
R2 N007 0 1Meg
XU1 N007 N005 N004 0 N003 IN IN N006 LTC1474 top=10 bot=1T ;pnba FB)LBO)LBI)GND)SW)Sense)Vin)Run
Rload OUT 0 25
VGS N002 0 0
VDS N001 0 5
M1 N001 N002 0 0 MC8
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 2m startup
.model MC8 NMOS (KP=60e-3 VTO=0.5 LAMBDA=0)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1474.asy)
.lib LTC1474.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3520 1824
WIRE 1600 1184 1488 1184
WIRE 1776 1184 1600 1184
WIRE 1488 1200 1488 1184
WIRE 1776 1200 1776 1184
WIRE 1600 1264 1600 1184
WIRE 1632 1264 1600 1264
WIRE 1984 1264 1920 1264
WIRE 2032 1264 1984 1264
WIRE 2160 1264 2112 1264
WIRE 2320 1264 2160 1264
WIRE 2448 1264 2320 1264
WIRE 2320 1280 2320 1264
WIRE 2448 1280 2448 1264
WIRE 1488 1296 1488 1280
WIRE 1984 1296 1984 1264
WIRE 2160 1296 2160 1264
WIRE 1632 1344 1616 1344
WIRE 1936 1344 1920 1344
WIRE 2320 1376 2320 1344
WIRE 2448 1376 2448 1360
WIRE 1984 1392 1984 1360
WIRE 1632 1424 1616 1424
WIRE 2160 1424 2160 1376
WIRE 2160 1424 1920 1424
WIRE 2160 1440 2160 1424
WIRE 1776 1504 1776 1488
WIRE 2160 1536 2160 1520
WIRE 3120 80 2960 80
WIRE 2960 112 2960 80
WIRE 3120 128 3120 80
WIRE 3040 160 2960 160
WIRE 2912 192 2832 192
WIRE 2832 208 2832 192
WIRE 2960 288 2960 208
WIRE 3040 288 3040 160
WIRE 3120 288 3120 208
WIRE 2832 320 2832 288
SYMBOL VOLTAGE 1488 1184 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL ind 2016 1280 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMBOL schottky 1968 1360 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBR0530L
SYMBOL polcap 2304 1280 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMBOL RES 2144 1280 R0
SYMATTR InstName R1
SYMATTR Value 1.68Meg
SYMBOL res 2144 1424 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL POWERPRODUCTS\\LTC1474 1776 1344 R0
SYMATTR InstName U1
SYMBOL res 2432 1264 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL voltage 2832 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 0
SYMBOL voltage 3120 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 5
SYMBOL nmos4 2912 112 R0
SYMATTR InstName M1
SYMATTR Value MC8
FLAG 1488 1296 0
FLAG 1984 1392 0
FLAG 2320 1376 0
FLAG 2448 1376 0
FLAG 1776 1504 0
FLAG 2160 1536 0
FLAG 2448 1264 OUT
FLAG 1488 1184 IN
FLAG 2832 320 0
FLAG 2960 288 0
FLAG 3120 288 0
FLAG 3040 288 0
TEXT 2256 1456 Left 2 !.tran 2m startup
TEXT 8 368 Left 2 !.dc VGS 0 1 0.01
TEXT 8 400 Left 2 !.model MC8 NMOS (KP=60e-3 VTO=0.5 LAMBDA=0)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3013B.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 PWL(0 0 1 10)
C1 OUT 0 3.3
R1 OUT N002 750K
R2 N002 0 249K
Rload OUT 0 100
R3 N001 N003 1.6Meg
C2 0 N004 1000p
XU1 MP_01 OUT MP_02 N002 0 N003 N004 MP_03 MP_04 N001 LT3013B ;pnba )OUT))ADJ)GND)PwrGD)Ct)))IN
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3013B.asy)
.lib LT3013.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 80 -208 80
WIRE 112 80 0 80
WIRE 576 80 400 80
WIRE 688 80 576 80
WIRE 784 80 688 80
WIRE 784 96 784 80
WIRE -208 112 -208 80
WIRE 688 112 688 80
WIRE 0 128 0 80
WIRE 576 160 400 160
WIRE 576 176 576 160
WIRE 688 192 688 176
WIRE 784 192 784 176
WIRE -208 224 -208 192
WIRE 0 240 0 208
WIRE 112 240 0 240
WIRE 416 240 400 240
WIRE 512 240 480 240
WIRE 576 272 576 256
WIRE 256 304 256 288
FLAG 256 304 0
FLAG -208 224 0
FLAG 784 192 0
FLAG 688 192 0
FLAG 576 272 0
FLAG 784 80 OUT
FLAG 512 240 0
SYMBOL voltage -208 96 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 672 112 R0
SYMATTR InstName C1
SYMATTR Value 3.3
SYMBOL res 560 64 R0
SYMATTR InstName R1
SYMATTR Value 750K
SYMBOL res 560 160 R0
SYMATTR InstName R2
SYMATTR Value 249K
SYMBOL res 768 80 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL res -16 112 R0
SYMATTR InstName R3
SYMATTR Value 1.6Meg
SYMBOL cap 480 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL PowerProducts\\LT3013B 256 160 R0
SYMATTR InstName U1
TEXT 728 264 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\2ndOrderNotch.asc
* Generated by LTspice 26.0.1 for Windows.
G1 0 N002 1 0 {4/R1}
R1 N002 0 {R1/2}
R2 N003 N002 {R1/2}
R3 N003 0 {R1}
C1 N003 0 {C1} Lser={L1}
G2 0 2 N003 0 {10*H}
R4 2 0 .1
V1 1 0 AC 1
R5 2 0 1Meg
.param f0= 1k Q=.5
.param R1=1k
.param L1=R1*Q/(4*pi*f0)
* Set notch frequency and quality factor
* R1 is arbitary
* This version puts 1/2 the R1 resistance in the capacitor
.param C1=1/(L1*(2*pi*f0)**2)
* Vout
* Vin
.ac dec 101 100 10k
.param H=0.1
* The parameter "H" is the gain at frequencies away from the notch
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE -624 -112 -688 -112
WIRE -528 -112 -560 -112
WIRE -320 -112 -480 -112
WIRE -192 -112 -320 -112
WIRE -64 -112 -112 -112
WIRE 112 -112 -64 -112
WIRE 304 -112 112 -112
WIRE 464 -112 352 -112
WIRE 528 -112 464 -112
WIRE 560 -112 528 -112
WIRE 688 -112 624 -112
WIRE -688 -80 -688 -112
WIRE -480 -80 -480 -112
WIRE 688 -80 688 -112
WIRE -528 -64 -528 -112
WIRE -320 -48 -320 -112
WIRE -64 -48 -64 -112
WIRE 112 -48 112 -112
WIRE 352 -48 352 -112
WIRE 464 -48 464 -112
WIRE 304 -32 304 -112
WIRE -688 16 -688 0
WIRE -528 16 -528 -16
WIRE -480 32 -480 0
WIRE 304 48 304 16
WIRE 352 48 352 32
WIRE 464 48 464 32
WIRE 688 48 688 0
WIRE -320 64 -320 32
WIRE -64 64 -64 16
WIRE 112 64 112 32
FLAG -320 64 0
FLAG -480 32 0
FLAG -528 16 0
FLAG -64 64 0
FLAG 112 64 0
FLAG 304 48 0
FLAG 352 48 0
FLAG 464 48 0
FLAG 528 -112 2
FLAG -528 -112 1
FLAG -688 16 0
FLAG 688 48 0
SYMBOL g -480 -96 R0
SYMATTR InstName G1
SYMATTR Value {4/R1}
SYMBOL res -336 -64 R0
SYMATTR InstName R1
SYMATTR Value {R1/2}
SYMBOL res -96 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R1/2}
SYMBOL res 96 -64 R0
SYMATTR InstName R3
SYMATTR Value {R1}
SYMBOL cap -80 -48 R0
WINDOW 0 50 9 Left 2
WINDOW 3 44 40 Left 2
WINDOW 123 45 71 Left 2
SYMATTR InstName C1
SYMATTR Value {C1}
SYMATTR Value2 Lser={L1}
SYMBOL g 352 -64 R0
SYMATTR InstName G2
SYMATTR Value {10*H}
SYMBOL res 448 -64 R0
SYMATTR InstName R4
SYMATTR Value .1
SYMBOL Misc\\jumper 592 -176 R0
SYMATTR InstName J2
SYMBOL Misc\\jumper -592 -176 M0
SYMATTR InstName J1
SYMBOL voltage -688 -96 R0
WINDOW 0 36 21 Left 2
WINDOW 123 31 86 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMBOL res 672 -96 R0
SYMATTR InstName R5
SYMATTR Value 1Meg
TEXT -240 152 Left 2 !.param f0= 1k Q=.5
TEXT -520 272 Left 2 !.param R1=1k
TEXT -704 312 Left 2 !.param L1=R1*Q/(4*pi*f0)
TEXT -696 152 Left 2 ;Set notch frequency and quality factor
TEXT -696 272 Left 2 ;R1 is arbitary
TEXT -696 232 Left 2 ;This version puts 1/2 the R1 resistance in the capacitor
TEXT -704 344 Left 2 !.param C1=1/(L1*(2*pi*f0)**2)
TEXT 640 -128 Left 2 ;Vout
TEXT -640 -128 Right 2 ;Vin
TEXT -704 376 Left 2 !.ac dec 101 100 10k
TEXT 72 192 Left 2 !.param H=0.1
TEXT -696 192 Left 2 ;The parameter "H" is the gain at frequencies away from the notch
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP151-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP151-3.0.asy)
C1 OUT 0 1
Rload OUT 0 30
V1 IN 0 5
XU1 IN 0 IN MP_01 OUT ADP151-x.x T=2Meg ;pnba Vin)GND)EN))Vout
.tran 500u startup
.lib ADP151-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 880 1696 880
WIRE 1984 880 1824 880
WIRE 1696 896 1696 880
WIRE 1984 896 1984 880
WIRE 1696 992 1696 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 30
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL VOLTAGE 1696 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\ADP151-3.0 1984 1024 R0
SYMATTR InstName U1
FLAG 2256 1024 OUT
FLAG 2256 1136 0
FLAG 1696 992 0
FLAG 1696 880 IN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1844-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1844-2.8.asy)
C1 OUT 0 1
V1 IN 0 PWL(0 0 1 6.5)
XU1 IN 0 IN OUT LTC1844-2.8 ;pnba IN)GND)_SHDN)OUT
R1 OUT 0 19
.tran 1
.lib LTC1844-2.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1940 1316
WIRE 64 80 -32 80
WIRE 80 80 64 80
WIRE 432 80 368 80
WIRE 528 80 432 80
WIRE -32 96 -32 80
WIRE 528 96 528 80
WIRE 432 112 432 80
WIRE -32 192 -32 176
WIRE 432 192 432 176
WIRE 528 192 528 176
WIRE 64 240 64 80
WIRE 80 240 64 240
WIRE 224 304 224 288
SYMBOL res 512 80 R0
SYMATTR InstName R1
SYMATTR Value 19
SYMBOL voltage -32 80 R0
WINDOW 3 -89 162 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PWL(0 0 1 6.5)
SYMATTR InstName V1
SYMBOL cap 416 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL LTC1844-2.8 224 160 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -32 192 0
FLAG 528 192 0
FLAG 528 80 OUT
FLAG -32 80 IN
FLAG 432 192 0
TEXT 184 368 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7105-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N002 0 2.7n
V1 IN 0 3.3
Rload OUT 0 10
C1 OUT 0 2.2 Rser=1.5m
R1 OUT N001 100k
XU2 IN OUT IN N002 OUT 0 N001 ADP7105 Vref=1.8 ;pnba Vin)Sense)EN)SS)Vout)GND)PG
.tran 6m startup
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7105-1.8.asy)
.lib ADP7105.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE 384 128 352 128
WIRE 464 128 464 32
WIRE 464 128 384 128
WIRE 560 128 464 128
WIRE -32 144 -32 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 128
WIRE 384 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -32 32 IN
FLAG 560 128 OUT
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 2.7n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL ADP7105-1.8 224 128 R0
SYMATTR InstName U2
TEXT 432 288 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\07ca49e66ec5_logic_level_shifter.asc
* Generated by LTspice 26.0.1 for Windows.
R2 5V Vout 1k
M1 Vout 3V3 3V3_IN 3V3_IN NMOS
V3 3V3 0 3.3V
V1 5V 0 5V
V2 3V3_IN 0 PULSE(0 3.3V)
R1 3V3 3V3_IN 1k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1116 1080
WIRE 496 32 496 -16
WIRE 560 32 496 32
WIRE 496 48 496 32
WIRE 672 64 672 -16
WIRE 560 96 560 32
WIRE 496 144 496 128
WIRE 496 144 448 144
WIRE 544 144 496 144
WIRE 672 144 640 144
WIRE 816 144 672 144
WIRE -128 272 -128 176
WIRE -32 272 -32 176
WIRE 64 272 64 176
WIRE -128 384 -128 352
WIRE -32 384 -32 352
WIRE 64 384 64 352
SYMBOL nmos 640 96 R90
SYMATTR InstName M1
SYMBOL voltage 64 256 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3V)
SYMBOL voltage -128 256 R0
SYMATTR InstName V3
SYMATTR Value 3.3V
SYMBOL Res 656 48 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -32 256 R0
SYMATTR InstName V1
SYMATTR Value 5V
SYMBOL Res 480 32 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG -32 176 5V
FLAG 64 176 3V3_IN
FLAG -32 384 0
FLAG 64 384 0
FLAG 448 144 3V3_IN
FLAG 672 -16 5V
FLAG -128 384 0
FLAG -128 176 3V3
FLAG 496 -16 3V3
FLAG 816 144 Vout
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1965-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1965-1.8.asy)
XU1 IN IN 0 OUT OUT LT1965-x.x R=5.8K ;pnba _SHDN)IN)GND)OUT)Sense
Rload OUT 0 1.8
V1 IN 0 pwl(0 0 1 5)
C1 OUT 0 10
.tran 1 startup
.lib LT1965.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1124 680
WIRE 48 112 -128 112
WIRE 64 112 48 112
WIRE 384 112 352 112
WIRE 448 112 384 112
WIRE 560 112 448 112
WIRE -128 128 -128 112
WIRE 448 128 448 112
WIRE 560 128 560 112
WIRE -128 224 -128 208
WIRE 448 224 448 192
WIRE 560 224 560 208
WIRE 48 240 48 112
WIRE 64 240 48 240
WIRE 384 240 384 112
WIRE 384 240 352 240
WIRE 208 320 208 304
SYMBOL PowerProducts\\LT1965-1.8 208 176 R0
SYMATTR InstName U1
SYMBOL cap 432 128 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 544 112 R0
SYMATTR InstName Rload
SYMATTR Value 1.8
SYMBOL voltage -128 112 R0
SYMATTR InstName V1
SYMATTR Value pwl(0 0 1 5)
FLAG 208 320 0
FLAG -128 224 0
FLAG 448 224 0
FLAG 560 224 0
FLAG -128 112 IN
FLAG 560 112 OUT
TEXT 400 296 Left 2 !.tran 1 startup