Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1762-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1762-3.3.asy)
XU1 OUT OUT N001 0 IN MP_01 MP_02 IN LT1762-3.3 ;pnba OUT)SENSE)BYP)GND)_SHDN)))IN
C1 OUT 0 10
Rload OUT 0 500
V1 IN 0 PWL(0 0 1 10)
C2 OUT N001 .01
.tran 1
.lib LT1762.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 32 304 32
WIRE 352 32 320 32
WIRE 432 32 352 32
WIRE 528 32 432 32
WIRE 0 48 -208 48
WIRE 16 48 0 48
WIRE 432 48 432 32
WIRE 528 48 528 32
WIRE -208 64 -208 48
WIRE 352 64 352 32
WIRE 320 96 320 32
WIRE 320 96 304 96
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 432 144 432 112
WIRE 528 144 528 128
WIRE -208 160 -208 144
WIRE 352 160 352 128
WIRE 352 160 304 160
WIRE 160 240 160 208
SYMBOL PowerProducts\\LT1762-3.3 160 96 R0
SYMATTR InstName U1
SYMBOL cap 416 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL cap 336 64 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 500
FLAG -208 160 0
FLAG 432 144 0
FLAG 528 144 0
FLAG 160 240 0
FLAG -208 48 IN
FLAG 528 32 OUT
TEXT 368 216 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG452.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG452.asy)
V3 N001 0 SINE(0 15 1k)
V1 +V 0 15
V2 -V 0 -15
XU2 N003 N002 N001 -V 0 +V ADG452 ;pnba IN)D)S)Vss)GND)Vdd
V4 N003 0 pulse(0 3.3 0 1u 1u 5m 10m)
R1 N002 0 1K
.tran 30m
.lib ADG452.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -96
WIRE -528 -32 -528 -48
WIRE -368 0 -400 0
WIRE -240 0 -288 0
WIRE 0 0 -48 0
WIRE 0 16 0 0
WIRE -528 64 -528 48
WIRE -240 64 -336 64
WIRE 0 112 0 96
WIRE -528 160 -528 144
WIRE -336 160 -336 64
WIRE -208 192 -208 176
WIRE -80 192 -80 176
WIRE -528 256 -528 240
WIRE -336 256 -336 240
SYMBOL ADG452 -144 48 R0
SYMATTR InstName U2
SYMBOL voltage -528 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -528 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -336 144 R0
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMBOL voltage -272 0 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 15 1k)
FLAG -528 256 0
FLAG -528 64 0
FLAG -528 -48 +V
FLAG -528 144 -V
FLAG -400 0 0
FLAG -208 192 -V
FLAG -144 -96 +V
FLAG -80 192 0
FLAG -336 256 0
FLAG 0 112 0
TEXT 16 176 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\9a33e9b6d45c_AD8554.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8554.asy)
R1 N001 0 10K
V1 +V 0 5
V2 -V 0 -5
Vin IN 0 SINE(0 1 10K)
Rload OUT 0 10K
R2 OUT N001 10K
XU1 IN N001 +V -V OUT AD8554 ;pnba In+)In-)V+)V-)OUT
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 336 -1120 320 -1120
WIRE 432 -1120 416 -1120
WIRE 448 -1120 432 -1120
WIRE 544 -1120 528 -1120
WIRE 80 -1024 80 -1040
WIRE 176 -1024 176 -1040
WIRE 432 -1008 432 -1120
WIRE 448 -1008 432 -1008
WIRE 544 -992 544 -1120
WIRE 544 -992 512 -992
WIRE 656 -992 544 -992
WIRE 448 -976 336 -976
WIRE 656 -976 656 -992
WIRE 336 -960 336 -976
WIRE 80 -928 80 -944
WIRE 176 -928 176 -944
WIRE 656 -880 656 -896
WIRE 336 -864 336 -880
SYMBOL voltage 176 -1040 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 640 -992 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 544 -1136 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 432 -1136 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 80 -1040 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 336 -976 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL Opamps\\AD8554 480 -1056 R0
SYMATTR InstName U1
FLAG 80 -1040 +V
FLAG 80 -928 0
FLAG 336 -864 0
FLAG 656 -992 OUT
FLAG 336 -976 IN
FLAG 480 -1024 +V
FLAG 176 -1040 -V
FLAG 480 -960 -V
FLAG 320 -1120 0
FLAG 656 -880 0
FLAG 176 -928 0
TEXT 592 -840 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX4436.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX4436.asy)
V1 IN 0 SINE(0 50m 100k)
Vee 0 Vee 2.5
RL OUT 0 10k
CL OUT 0 15p
Vcc Vcc 0 2.5
XU1 IN OUT Vcc Vee OUT MAX4436 ;pnba In+)In-)V+)V-)OUT
.tran 10u
.lib MAX4436.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 144 288 144 272
WIRE 432 352 432 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 144 400 144 368
WIRE 144 400 112 400
WIRE 400 400 304 400
WIRE 112 416 112 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 144 448 144 400
WIRE 432 448 432 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 144 544 144 528
WIRE 304 592 304 576
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL voltage 144 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL MAX4436 432 320 R0
SYMATTR InstName U1
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 100k)
SYMBOL voltage 144 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 10k
FLAG 720 384 OUT
FLAG 144 272 Vcc
FLAG 144 544 Vee
FLAG 432 320 Vcc
FLAG 432 448 Vee
FLAG 112 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
TEXT 96 632 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\3becc99ed8b5_trans-1-1-2.asc
* Generated by LTspice 26.0.1 for Windows.
M1 UDS UGS 0 0 IRF9640
V2 UGS 0
Vds UDS 0 -12V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 -2 -5V
.step temp list 25 175
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1292 680
WIRE -624 -176 -720 -176
WIRE -560 -176 -624 -176
WIRE -720 -128 -720 -176
WIRE -560 -80 -560 -176
WIRE -880 -48 -896 -48
WIRE -768 -48 -880 -48
WIRE -896 -32 -896 -48
WIRE -896 64 -896 48
WIRE -720 64 -720 -32
WIRE -560 64 -560 0
SYMBOL voltage -896 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 53 Left 2
WINDOW 3 -97 181 Left 2
WINDOW 0 35 44 Left 2
SYMATTR Value ""
SYMATTR InstName V2
SYMBOL voltage -560 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 36 82 Left 2
SYMATTR InstName Vds
SYMATTR Value -12V
SYMBOL pmos -768 -128 R0
SYMATTR InstName M1
SYMATTR Value IRF9640
FLAG -560 64 0
FLAG -896 64 0
FLAG -720 64 0
FLAG -880 -48 UGS
FLAG -624 -176 UDS
TEXT -904 96 Left 2 !.dc V2 -2 -5V
TEXT -904 112 Left 2 !.step temp list 25 175
* Z:\home\khalils\Downloads\files\data\raw_asc\05e370202d37_Temperature-Variation-and-Worst-case-LTSpice.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 12
R1 N002 0 {wc(10k, tol)}
D1 N002 N001 BZX84C6V2L
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.step temp -20 100 120
.tran 1
* Temperature Variation Analysis with LTSpice and worst case analysis
* Temperature sweep from -20 degrees to 100 degrees with 120 degrees steps
.param tol=0.2
.step param run 1 50 1
.function wc(nom, tol) if(run==1, nom, if(flat(1) > 0, nom*(1+tol), nom*(1-tol)))
* Obtained from:\nhttps://k6jca.blogspot.com/2012/07/monte-carlo-and-worst-case-circuit.html
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1320 680
WIRE 224 -32 -96 -32
WIRE 224 0 224 -32
WIRE -96 96 -96 -32
WIRE 224 96 224 64
WIRE -96 208 -96 176
WIRE 224 208 224 176
FLAG 224 208 0
FLAG -96 208 0
SYMBOL voltage -96 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 208 80 R0
SYMATTR InstName R1
SYMATTR Value {wc(10k, tol)}
SYMBOL zener 240 64 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BZX84C6V2L
SYMATTR Description Diode
SYMATTR Type diode
TEXT 456 -40 Left 2 !.step temp -20 100 120
TEXT 456 8 Left 2 !.tran 1
TEXT -160 -208 Left 4 ;Temperature Variation Analysis with LTSpice and worst case analysis
TEXT 456 -80 Left 2 ;Temperature sweep from -20 degrees to 100 degrees with 120 degrees steps
TEXT 456 56 Left 2 !.param tol=0.2
TEXT 456 104 Left 2 !.step param run 1 50 1
TEXT 456 160 Left 2 !.function wc(nom, tol) if(run==1, nom, if(flat(1) > 0, nom*(1+tol), nom*(1-tol)))
TEXT 456 224 Left 2 ;Obtained from:\nhttps://k6jca.blogspot.com/2012/07/monte-carlo-and-worst-case-circuit.html
* Z:\home\khalils\Downloads\files\data\raw_asc\d5b3a932f4c7_Q1a.asc
* Generated by LTspice 26.0.1 for Windows.
R2 Vout N002 1k
D2 Vout N004 1N914
V3 N002 0 SINE(0 10 500)
D1 Vout N003 1N914
V1 N001 0 SINE(0 10 500)
V2 N003 0 2
V4 N004 0 2
R1 Vout N001 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model D_ideal D(Ron=0.1n Roff=1G Vfwd=0)
.tran .02
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1764 680
WIRE -160 16 -288 16
WIRE 16 16 -80 16
WIRE 160 16 16 16
WIRE 592 32 464 32
WIRE 768 32 672 32
WIRE 912 32 768 32
WIRE 16 64 16 16
WIRE 768 80 768 32
WIRE -288 128 -288 16
WIRE 464 144 464 32
WIRE 16 160 16 128
WIRE 768 176 768 144
WIRE -288 256 -288 208
WIRE 464 272 464 224
WIRE 16 288 16 240
WIRE 768 304 768 256
IOPIN 160 16 Out
IOPIN 912 32 Out
SYMBOL voltage 464 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 10 500)
SYMBOL res 688 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 16 144 R0
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 2
SYMBOL voltage -288 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 500)
SYMBOL voltage 768 160 R0
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 2
SYMBOL diode 752 80 R0
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL diode 0 64 R0
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL res -64 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG -288 256 0
FLAG 16 288 0
FLAG 160 16 Vout
FLAG 464 272 0
FLAG 768 304 0
FLAG 912 32 Vout
TEXT -176 336 Left 2 !.model D_ideal D(Ron=0.1n Roff=1G Vfwd=0)
TEXT -320 336 Left 2 !.tran .02
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3689-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3689-5.asy)
V1 IN 0 12
C3 OUT N005 10p
Rload OUT 0 1K
R3 0 N008 20.5K
D1 N003 N002 1N5818
C5 N001 N002 0.1
L1 N002 OUT 12 Rpar=2K
V2 N004 0 pulse(0 2 0 1u 1u 250u 500u)
C2 0 N006 0.68n
C1 0 N007 0.1n
XU1 NC_01 N007 N006 N008 0 OUT N001 IN N002 N003 IN N005 0 IN N004 NC_02 0 LT3689-5 ;pnba _WDO)Cwdt)Cpor)Rt)SYNC)OUT)Boost)Vin)SW)DA)EN/UVLO)FB)_WDE)_W/T)WDI)_RST)GND
C4 OUT 0 22
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m startup
.lib LT3689-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1556 680
WIRE 80 -144 -16 -144
WIRE 96 -144 80 -144
WIRE 608 -144 416 -144
WIRE -16 -128 -16 -144
WIRE 80 -48 80 -144
WIRE 96 -48 80 -48
WIRE 464 -48 416 -48
WIRE -16 -32 -16 -48
WIRE 464 -32 464 -48
WIRE 80 48 80 -48
WIRE 96 48 80 48
WIRE 464 48 464 32
WIRE 464 48 416 48
WIRE 512 48 464 48
WIRE 608 48 608 -144
WIRE 608 48 592 48
WIRE 656 48 608 48
WIRE 736 48 656 48
WIRE 464 64 464 48
WIRE 656 64 656 48
WIRE 736 64 736 48
WIRE 96 144 80 144
WIRE 464 144 464 128
WIRE 464 144 416 144
WIRE 656 160 656 128
WIRE 736 160 736 144
WIRE -128 240 -208 240
WIRE 96 240 -48 240
WIRE 464 240 416 240
WIRE 608 240 608 48
WIRE 608 240 528 240
WIRE 432 352 416 352
WIRE 528 352 496 352
WIRE 432 464 416 464
WIRE 528 464 496 464
WIRE 96 576 80 576
WIRE 432 576 416 576
WIRE 528 576 512 576
WIRE 256 624 256 608
SYMBOL cap 640 64 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMBOL res 528 560 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 20.5K
SYMBOL cap 448 -32 R0
WINDOW 3 27 56 Left 2
SYMATTR Value 0.1
SYMATTR InstName C5
SYMBOL schottky 448 128 M180
WINDOW 0 30 65 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5818
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 528 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL ind 496 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 12
SYMATTR SpiceLine Rpar=2K
SYMBOL PowerProducts\\LT3689-5 256 192 R0
SYMATTR InstName U1
SYMBOL res 720 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL voltage -16 -144 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 496 448 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.1n
SYMBOL cap 496 336 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 0.68n
SYMBOL voltage -32 240 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value pulse(0 2 0 1u 1u 250u 500u)
FLAG 256 624 0
FLAG 528 352 0
FLAG 528 464 0
FLAG 528 576 0
FLAG 656 160 0
FLAG 80 576 0
FLAG -16 -32 0
FLAG 736 160 0
FLAG -208 240 0
FLAG 80 144 0
FLAG 736 48 OUT
FLAG -16 -144 IN
TEXT 632 520 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\646d8726cf64_Diode-trr-2.asc
* Generated by LTspice 26.0.1 for Windows.
D1 a b RB085BGE-30
R1 b 0 5
V1 a 0 PULSE(-10V 10V 20n 1n 1n 20n 200n)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100n
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -192 80 -208 80
WIRE -80 80 -192 80
WIRE 80 80 -16 80
WIRE 96 80 80 80
WIRE -208 144 -208 80
WIRE 96 144 96 80
WIRE -208 272 -208 224
WIRE -32 272 -208 272
WIRE 96 272 96 224
WIRE 96 272 -32 272
WIRE -32 304 -32 272
FLAG -32 304 0
FLAG 80 80 b
FLAG -192 80 a
SYMBOL schottky -80 96 R270
WINDOW 0 41 32 VTop 2
WINDOW 3 -7 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value RB085BGE-30
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL Misc\\EuropeanResistor 80 128 R0
WINDOW 0 44 39 Left 2
WINDOW 3 47 76 Left 2
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL Voltage -208 128 R0
WINDOW 3 -77 116 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(-10V 10V 20n 1n 1n 20n 200n)
SYMATTR InstName V1
TEXT -208 288 Left 2 !.tran 100n
* Z:\home\khalils\Downloads\files\data\raw_asc\05c937015e6b_cmos-voltage-dependent-resistor.asc
* Generated by LTspice 26.0.1 for Windows.
M2 N003 N001 N002 N002 2N7002
M1 N002 N001 0 0 2N7002
V1 N001 0 1
R1 N001 N002 100Meg
R2 N001 N003 10k
E1 NC_01 NC_02 NC_03 NC_04 E
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc v1 0 3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 -64 -160 -64
WIRE 128 -64 32 -64
WIRE 272 -64 128 -64
WIRE 352 -64 272 -64
WIRE 128 -32 128 -64
WIRE 352 -32 352 -64
WIRE 128 80 128 48
WIRE 240 80 128 80
WIRE 128 112 128 80
WIRE 352 112 352 48
WIRE -160 160 -160 -64
WIRE 32 192 32 -64
WIRE 80 192 32 192
WIRE 272 192 272 -64
WIRE 304 192 272 192
WIRE 240 240 240 80
WIRE 352 240 352 208
WIRE 352 240 240 240
WIRE -160 272 -160 240
WIRE 128 272 128 208
SYMBOL nmos 304 112 R0
SYMATTR InstName M2
SYMATTR Value 2N7002
SYMBOL voltage -160 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL e 640 64 R0
SYMATTR InstName E1
SYMBOL res 112 -48 R0
SYMATTR InstName R1
SYMATTR Value 100Meg
SYMBOL res 336 -48 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL nmos 80 112 R0
SYMATTR InstName M1
SYMATTR Value 2N7002
FLAG -160 272 0
FLAG 128 272 0
TEXT 560 -136 Left 2 !.dc v1 0 3
* Z:\home\khalils\Downloads\files\data\raw_asc\10209fd48f64_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
RL out 0 10k
Q1 c b e 0 2N3904
C1 b in {mc(0.1uF,tol2)}
V1 Vcc 0 12V
C2 out c {mc(0.1uF,tol2)}
Vs s 0 0 AC 1
C3 e 0 {mc(10uF,tol2)}
RB2 b 0 {mc(20k,tol1)}
RB1 Vcc b {mc(100k,tol1)}
RC Vcc c {mc(4.7k,tol1)}
Rs in s 1k
RE e 0 {mc(1.3k,tol1)}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.param tol1=0.05
.param tol2=0.1
.step param run 0 9 1
.ac dec 100 10 10Meg
.meas AC gain MAX mag(V(out)/V(s))
.meas AC Low3dB WHEN mag(V(out)/V(s))=gain/sqrt(2) Rise=1
.meas AC High3dB WHEN mag(V(out)/V(s))=gain/sqrt(2) Fall=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1412 680
WIRE 560 48 560 0
WIRE 880 48 880 0
WIRE 880 160 880 128
WIRE 944 160 880 160
WIRE 1088 160 944 160
WIRE 1248 160 1152 160
WIRE 1344 160 1248 160
WIRE 880 192 880 160
WIRE 1344 192 1344 160
WIRE 128 240 80 240
WIRE 176 240 128 240
WIRE 320 240 256 240
WIRE 368 240 320 240
WIRE 560 240 560 128
WIRE 560 240 432 240
WIRE 768 240 560 240
WIRE 816 240 768 240
WIRE 80 288 80 240
WIRE 1344 304 1344 272
WIRE 880 320 880 288
WIRE 944 320 880 320
WIRE 1136 320 944 320
WIRE 560 352 560 240
WIRE 880 352 880 320
WIRE 1136 368 1136 320
WIRE 560 480 560 432
WIRE 880 480 880 432
WIRE 1136 480 1136 432
SYMBOL npn 816 192 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage 80 32 R0
SYMATTR InstName V1
SYMATTR Value 12V
SYMBOL res 544 336 R0
SYMATTR InstName RB2
SYMATTR Value {mc(20k,tol1)}
SYMBOL res 864 336 R0
SYMATTR InstName RE
SYMATTR Value {mc(1.3k,tol1)}
SYMBOL voltage 80 272 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName Vs
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMBOL res 544 32 R0
SYMATTR InstName RB1
SYMATTR Value {mc(100k,tol1)}
SYMBOL cap 1152 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {mc(0.1uF,tol2)}
SYMBOL cap 1120 368 R0
SYMATTR InstName C3
SYMATTR Value {mc(10uF,tol2)}
SYMBOL res 864 32 R0
SYMATTR InstName RC
SYMATTR Value {mc(4.7k,tol1)}
SYMBOL cap 432 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {mc(0.1uF,tol2)}
SYMBOL res 272 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rs
SYMATTR Value 1k
SYMBOL res 1328 176 R0
SYMATTR InstName RL
SYMATTR Value 10k
FLAG 80 128 0
FLAG 80 368 0
FLAG 80 48 Vcc
FLAG 128 240 s
FLAG 320 240 in
FLAG 560 480 0
FLAG 560 0 Vcc
FLAG 880 0 Vcc
FLAG 880 480 0
FLAG 1136 480 0
FLAG 1344 304 0
FLAG 944 160 c
FLAG 1248 160 out
FLAG 944 320 e
FLAG 768 240 b
TEXT 88 568 Left 2 !.param tol1=0.05
TEXT 88 608 Left 2 !.param tol2=0.1
TEXT 96 656 Left 2 !.step param run 0 9 1
TEXT 536 552 Left 2 !.ac dec 100 10 10Meg
TEXT 536 600 Left 2 !.meas AC gain MAX mag(V(out)/V(s))
TEXT 536 632 Left 2 !.meas AC Low3dB WHEN mag(V(out)/V(s))=gain/sqrt(2) Rise=1
TEXT 536 664 Left 2 !.meas AC High3dB WHEN mag(V(out)/V(s))=gain/sqrt(2) Fall=1
* Z:\home\khalils\Downloads\files\data\raw_asc\2a81c5156e6f_1078.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
R1 N002 N001 200K
R2 N001 IN 200K
V3 IN 0 SINE(0 1 100)
XU1 0 N001 +V 0 N003 LT1078 ;pnba In+)In-)V+)V-)OUT
D1 N003 N002 1N4148
XU2 N002 OUT +V 0 OUT LT1078 ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
* Absolute Value Circuit(Full-Wave Rectifier)
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1078.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 -80 96
WIRE 128 96 112 96
WIRE 224 96 128 96
WIRE 400 96 304 96
WIRE -80 112 -80 96
WIRE 560 128 448 128
WIRE -192 160 -192 144
WIRE 496 192 496 176
WIRE -80 208 -80 192
WIRE 192 208 192 192
WIRE 448 208 448 128
WIRE 464 208 448 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 560 224 560 128
WIRE 560 224 528 224
WIRE 592 224 560 224
WIRE 320 240 224 240
WIRE 400 240 400 96
WIRE 400 240 384 240
WIRE 464 240 400 240
WIRE -192 256 -192 240
WIRE 160 256 128 256
WIRE 496 272 496 256
WIRE 192 288 192 272
FLAG -192 256 0
FLAG 192 192 +V
FLAG -192 144 +V
FLAG -80 208 0
FLAG 192 288 0
FLAG 496 176 +V
FLAG 496 272 0
FLAG -80 96 IN
FLAG 592 224 OUT
FLAG 128 256 0
SYMBOL voltage -192 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 320 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200K
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL voltage -80 96 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
SYMBOL opamps\\LT1078 192 176 R0
SYMATTR InstName U1
SYMBOL diode 320 256 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL opamps\\LT1078 496 160 R0
SYMATTR InstName U2
TEXT 416 344 Left 2 !.tran 30m
TEXT 392 32 Bottom 2 ;Absolute Value Circuit(Full-Wave Rectifier)