Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3303C-05.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N003 OUT 150n Rser=2m
R1 OUT N004 47.5K
V1 IN 0 5
R2 N004 0 18.2K
C1 OUT 0 10 m=3 Rser=10m
R4 OUT N002 500K
C3 OUT N004 10p
Rload OUT 0 0.45
C2 N001 0 1
R3 IN N001 10
XU2 IN N001 N003 N004 0 0 N001 N002 N001 LTC3303C-05 ;pnba VIN)EN)SW)FB)AGND)PGND)AVIN)PGOOD)MODE/SYNC
.tran 1.5m startup
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3303C-05.asy)
.lib LTC3303C-05.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2652 1736
WIRE 1392 1248 1360 1248
WIRE 1488 1248 1392 1248
WIRE 1712 1248 1488 1248
WIRE 1360 1264 1360 1248
WIRE 1488 1264 1488 1248
WIRE 1712 1296 1712 1248
WIRE 1360 1360 1360 1344
WIRE 1488 1360 1488 1344
WIRE 1488 1360 1424 1360
WIRE 1552 1360 1488 1360
WIRE 1904 1360 1872 1360
WIRE 2016 1360 1984 1360
WIRE 1424 1376 1424 1360
WIRE 1424 1456 1424 1440
WIRE 1488 1472 1488 1360
WIRE 1552 1472 1488 1472
WIRE 1904 1472 1872 1472
WIRE 2016 1472 2016 1360
WIRE 2016 1472 1984 1472
WIRE 2128 1472 2016 1472
WIRE 2224 1472 2128 1472
WIRE 2272 1472 2224 1472
WIRE 2320 1472 2272 1472
WIRE 2016 1488 2016 1472
WIRE 2128 1488 2128 1472
WIRE 2224 1488 2224 1472
WIRE 2320 1488 2320 1472
WIRE 1488 1584 1488 1472
WIRE 1552 1584 1488 1584
WIRE 2016 1584 2016 1568
WIRE 2016 1584 1872 1584
WIRE 2128 1584 2128 1552
WIRE 2128 1584 2016 1584
WIRE 2224 1584 2224 1552
WIRE 2320 1584 2320 1568
WIRE 2016 1600 2016 1584
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
WIRE 2016 1696 2016 1680
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1360 1360 0
FLAG 2320 1584 0
FLAG 2016 1696 0
FLAG 2224 1584 0
FLAG 1392 1248 IN
FLAG 2272 1472 OUT
FLAG 1424 1456 0
SYMBOL ind 1888 1488 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150n
SYMATTR SpiceLine Rser=2m
SYMBOL RES 2000 1472 R0
SYMATTR InstName R1
SYMATTR Value 47.5K
SYMBOL VOLTAGE 1360 1248 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2000 1584 R0
SYMATTR InstName R2
SYMATTR Value 18.2K
SYMBOL cap 2208 1488 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 m=3
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=10m
SYMBOL res 2000 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 500K
SYMBOL cap 2112 1488 R0
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL res 2304 1472 R0
SYMATTR InstName Rload
SYMATTR Value 0.45
SYMBOL cap 1408 1376 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 1472 1248 R0
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL LTC3303C-05 1712 1456 R0
SYMATTR InstName U2
TEXT 2200 1696 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0bbd10d4eccf_loop_probe.asc
* Generated by LTspice 26.0.1 for Windows.
Iinj 0 probe AC {0.5*lpvar*(lpvar-1)}
Vinj probe in AC {0.5*lpvar*(lpvar+1)}
Vprobe probe out 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -160 144 -80 144
WIRE 0 144 112 144
WIRE 112 224 112 144
WIRE 112 144 160 144
WIRE 112 352 112 304
WIRE 288 144 368 144
WIRE 160 144 208 144
IOPIN -160 144 In
IOPIN 368 144 Out
SYMBOL voltage 192 144 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 VBottom 0
WINDOW 123 -32 56 VBottom 0
WINDOW 39 -32 56 VBottom 0
SYMATTR InstName Vprobe
SYMATTR Value 0
SYMBOL voltage 16 144 M270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 VBottom 0
WINDOW 123 -32 56 VBottom 0
WINDOW 39 -32 56 VBottom 0
SYMATTR InstName Vinj
SYMATTR Value ""
SYMATTR Value2 AC {0.5*lpvar*(lpvar+1)}
SYMBOL current 112 304 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
WINDOW 123 23 -4 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Iinj
SYMATTR Value ""
SYMATTR Value2 AC {0.5*lpvar*(lpvar-1)}
FLAG 112 352 0
FLAG -160 144 in
FLAG 368 144 out
FLAG 160 144 probe
* Z:\home\khalils\Downloads\files\data\raw_asc\28a98e7bd159_05-invertin_amplifier.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
Rf out N001 {fb_val}
R1 N001 in {r1_val}
V1 vcc 0 +18
V3 in 0 SINE(0 1 1k)
V2 0 vee +18
XU1 0 N001 vcc vee out LT1001 ;pnba In+)In-)V+)V-)OUT
.param fb_val=2k r1_val=1k
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -64 128 -64
WIRE 288 -64 240 -64
WIRE -128 16 -128 -16
WIRE 192 48 192 32
WIRE 0 64 -16 64
WIRE 16 64 0 64
WIRE 128 64 128 -64
WIRE 128 64 96 64
WIRE 160 64 128 64
WIRE 288 80 288 -64
WIRE 288 80 224 80
WIRE 336 80 288 80
WIRE 352 80 336 80
WIRE 160 96 144 96
WIRE -128 112 -128 96
WIRE -128 112 -192 112
WIRE -16 112 -16 64
WIRE -128 128 -128 112
WIRE 144 128 144 96
WIRE 192 128 192 112
WIRE -192 144 -192 112
WIRE -16 224 -16 192
WIRE -128 240 -128 208
SYMBOL voltage -128 0 R0
WINDOW 3 24 85 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value +18
SYMBOL OpAmps\\OP07 192 16 R0
SYMATTR InstName U1
SYMBOL voltage -128 112 R0
WINDOW 3 19 88 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value +18
SYMBOL voltage -16 96 R0
WINDOW 0 43 66 Left 2
WINDOW 3 20 91 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1k)
SYMBOL res 112 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {r1_val}
SYMBOL res 256 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 45 VTop 2
SYMATTR InstName Rf
SYMATTR Value {fb_val}
FLAG -192 144 0
FLAG -128 -16 vcc
FLAG -128 240 vee
FLAG -16 224 0
FLAG 0 64 in
FLAG 192 128 vee
FLAG 192 32 vcc
FLAG 336 80 out
FLAG 144 128 0
TEXT 16 240 Left 2 !.param fb_val=2k r1_val=1k
TEXT 16 272 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\3a87ba554160_S_H.asc
* Generated by LTspice 26.0.1 for Windows.
S1 N001 Vc N002 0 VCS1
B1 out 0 V=V(Vc)
C1 Vc 0 100pF
B3 N002 0 V=V(clk)
B2 N001 0 V=V(in)
.model VCS1 SW(Ron=1E-9 Roff=1E12 Vt=0)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 0 -128 0
WIRE 208 0 64 0
WIRE 272 0 208 0
WIRE 528 0 368 0
WIRE 0 112 0 48
WIRE -128 192 -128 0
WIRE 48 192 48 48
WIRE 368 192 368 0
WIRE -176 208 -256 208
WIRE 208 208 208 0
WIRE -176 256 -256 256
WIRE -128 352 -128 272
WIRE 48 352 48 272
WIRE 208 352 208 272
WIRE 368 352 368 272
IOPIN -256 208 In
IOPIN -256 256 In
IOPIN 528 0 Out
SYMBOL bv 368 176 R0
SYMATTR InstName B1
SYMATTR Value V=V(Vc)
SYMBOL bv -128 176 R0
SYMATTR InstName B2
SYMATTR Value V=V(in)
SYMBOL sw -32 0 R270
WINDOW 3 13 103 Left 0
SYMATTR Value VCS1
SYMATTR InstName S1
SYMBOL cap 192 208 R0
SYMATTR InstName C1
SYMATTR Value 100pF
SYMBOL bv 48 176 R0
SYMATTR InstName B3
SYMATTR Value V=V(clk)
FLAG 0 112 0
FLAG 208 352 0
FLAG 368 352 0
FLAG 272 0 Vc
FLAG -256 208 in
FLAG -256 256 clk
FLAG -128 352 0
FLAG 48 352 0
FLAG 528 0 out
TEXT -176 -152 Left 0 !.model VCS1 SW(Ron=1E-9 Roff=1E12 Vt=0)
* Z:\home\khalils\Downloads\files\data\raw_asc\1d3217fede89_Demonstration_circuit_Step_ac_TF.asc
* Generated by LTspice 26.0.1 for Windows.
* Demonstration Circuit step Tf of transistor
* Step AC Transistor TF
* plot FR for different TF
* copyright Cordell Audio 12/03/2010
;op
R2 N001 Vout 2500
V1 N001 0 15
Q1 N002 Vin N003 0 2N5551C
Q2 Vout 0 N004 0 2N5551C
V2 0 N006 15
R4 N004 N005 225
V3 Vin 0 SINE(0 0.1 1000 0 0 0 10) AC 1
R1 N001 N002 2500
R3 N003 N005 225
C1 N001 Vout 10pF
I1 N005 N006 2mA
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.ac dec 10 1000k 1000000k
.step NPN 2N5551C (TF) 200p 1800p 400p
.include Cordell_Mods
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 788
WIRE 160 64 0 64
WIRE 272 64 160 64
WIRE 400 64 272 64
WIRE 0 112 0 64
WIRE 160 112 160 64
WIRE 272 112 272 64
WIRE 400 144 400 64
WIRE 160 208 160 192
WIRE 224 208 160 208
WIRE 272 208 272 176
WIRE 272 208 224 208
WIRE 0 256 0 192
WIRE 160 256 160 208
WIRE 400 288 400 224
WIRE 480 288 400 288
WIRE -128 304 -176 304
WIRE -64 304 -128 304
WIRE 400 304 400 288
WIRE 400 304 224 304
WIRE 480 304 480 288
WIRE 400 352 400 304
WIRE -176 368 -176 304
WIRE 0 384 0 352
WIRE 160 384 160 352
WIRE -176 496 -176 448
WIRE 0 496 0 464
WIRE 80 496 0 496
WIRE 160 496 160 464
WIRE 160 496 80 496
WIRE 80 512 80 496
WIRE 80 624 80 592
WIRE 400 624 400 432
WIRE 400 624 80 624
SYMBOL voltage -176 352 R0
WINDOW 3 -323 109 Left 0
WINDOW 123 35 82 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 45 43 Left 0
SYMATTR Value SINE(0 0.1 1000 0 0 0 10)
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMBOL res -16 96 R0
WINDOW 0 41 29 Left 0
WINDOW 3 38 61 Left 0
SYMATTR InstName R1
SYMATTR Value 2500
SYMBOL res -16 368 R0
SYMATTR InstName R3
SYMATTR Value 225
SYMBOL res 144 96 R0
WINDOW 0 39 26 Left 0
WINDOW 3 36 57 Left 0
SYMATTR InstName R2
SYMATTR Value 2500
SYMBOL res 144 368 R0
SYMATTR InstName R4
SYMATTR Value 225
SYMBOL npn -64 256 R0
WINDOW 3 25 42 Left 0
WINDOW 0 67 11 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q1
SYMBOL npn 224 256 M0
WINDOW 3 26 42 Left 0
WINDOW 0 68 9 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q2
SYMBOL voltage 400 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 39 Left 0
WINDOW 3 42 76 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL current 80 512 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 44 25 Left 0
WINDOW 3 34 63 Left 0
SYMATTR InstName I1
SYMATTR Value 2mA
SYMBOL cap 256 112 R0
WINDOW 3 30 50 Left 0
WINDOW 0 36 12 Left 0
SYMATTR Value 10pF
SYMATTR InstName C1
SYMBOL voltage 400 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 41 42 Left 0
WINDOW 3 41 76 Left 0
SYMATTR InstName V2
SYMATTR Value 15
FLAG 480 304 0
FLAG -176 496 0
FLAG -128 304 Vin
FLAG 224 208 Vout
TEXT -600 80 Left 0 !;op
TEXT -600 112 Left 0 !.ac dec 10 1000k 1000000k
TEXT -304 -128 Left 0 ;Demonstration Circuit step Tf of transistor
TEXT -600 152 Left 0 !.step NPN 2N5551C (TF) 200p 1800p 400p
TEXT -208 -88 Left 0 ;Step AC Transistor TF
TEXT -208 -48 Left 0 ;plot FR for different TF
TEXT -600 48 Left 0 !.include Cordell_Mods
TEXT 104 736 Left 0 ;copyright Cordell Audio 12/03/2010
* Z:\tmp\asc_dec_bjh7r6w2\108286491c01_JfetProtect_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
D1 O N001 1N4148
V1 N001 0 3.3
V2 NC_01 NC_02 PULSE(0 30 .01 0.001 0.001 0.1 0.2)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 80 240 80
WIRE 512 112 448 112
WIRE 144 208 80 208
WIRE 384 208 384 80
WIRE 384 208 320 208
WIRE 448 208 448 176
WIRE 448 208 384 208
WIRE 512 288 512 192
SYMBOL diode 464 176 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 512 96 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage 80 368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 30 .01 0.001 0.001 0.1 0.2)
FLAG 512 288 0
FLAG 80 288 0
FLAG 448 208 O
* Z:\home\khalils\Downloads\files\data\raw_asc\1a9fb0841f48_PentoCarG2Step.asc
* Generated by LTspice 26.0.1 for Windows.
Vp N001 0 250
XU1 0 N003 N002 0 N001 EL34Pent Pentrode ;pnba Cathode)G1)G2)G3)Anode
Vg1 N003 0 0
Vg2 N002 0 0
.dc Vg1 0 -50 10 Vg2 250 400 50
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -144 128 -144 96
WIRE -144 304 -144 208
WIRE -64 208 -64 192
WIRE -64 304 -144 304
WIRE -64 304 -64 288
WIRE -16 304 -64 304
WIRE -16 304 -16 160
WIRE 0 160 -16 160
WIRE 0 192 -64 192
WIRE 16 304 -16 304
WIRE 16 304 16 240
WIRE 16 320 16 304
WIRE 48 96 -144 96
WIRE 48 112 48 96
WIRE 144 176 96 176
WIRE 144 192 144 176
WIRE 144 304 16 304
WIRE 144 304 144 272
SYMBOL voltage -64 192 R0
WINDOW 0 -18 61 Left 0
SYMATTR InstName Vg1
SYMATTR Value 0
SYMBOL Misc\\pentode 48 176 R0
SYMATTR InstName U1
SYMATTR SpiceModel EL34Pent
SYMBOL voltage -144 112 R0
WINDOW 0 -16 57 Left 0
SYMATTR InstName Vp
SYMATTR Value 250
SYMBOL voltage 144 176 R0
WINDOW 0 -19 60 Left 0
SYMATTR InstName Vg2
SYMATTR Value 0
FLAG 16 320 0
TEXT -160 360 Left 0 !.dc Vg1 0 -50 10 Vg2 250 400 50
* Z:\home\khalils\Downloads\files\data\raw_asc\2c20f6c26538_Draft15.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 AC 1 0
C1 N002 0 {Ctest}
R2 N002 N001 50
L1 N002 0 100n
.step param Ctest list 10p 20p 30p 40p 50p
.MODEL SMV1130-079LF d CJ0=25.8p Vj=10 M=3.7 Rs=0.8
.lib C:\Users\piyus\Projects\public\fm_radio\sims\varactor_model.lib
.ac dec 10000 10k 100G
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 680
WIRE -672 112 -720 112
WIRE -544 112 -592 112
WIRE -368 112 -544 112
WIRE -144 112 -368 112
WIRE -720 176 -720 112
WIRE -544 192 -544 112
WIRE -368 208 -368 112
WIRE -720 320 -720 256
WIRE -544 384 -544 272
WIRE -432 384 -544 384
WIRE -368 384 -368 272
WIRE -368 384 -432 384
WIRE -432 464 -432 384
DATAFLAG -560 112 ""
SYMBOL res -576 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL ind -560 176 R0
SYMATTR InstName L1
SYMATTR Value 100n
SYMBOL cap -384 208 R0
SYMATTR InstName C1
SYMATTR Value {Ctest}
SYMBOL voltage -720 160 R0
WINDOW 3 -128 70 Left 2
WINDOW 123 -128 42 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMATTR InstName V2
FLAG -720 320 0
FLAG -432 464 0
TEXT 224 64 Left 2 !.step param Ctest list 10p 20p 30p 40p 50p
TEXT 224 128 Left 2 !.MODEL SMV1130-079LF d CJ0=25.8p Vj=10 M=3.7  Rs=0.8
TEXT 224 192 Left 2 !.lib C:\\Users\\piyus\\Projects\\public\\fm_radio\\sims\\varactor_model.lib
TEXT 200 -80 Left 2 !.ac dec 10000 10k 100G
* Z:\tmp\asc_dec_bjh7r6w2\1750e79b03ea_Switch-Mode_Power_Supplies_-_Basso-_Figure_1-6_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
RsOL OUT N001 100
EGs N003 N007 REF N004 20
VK Input N005 SINE(0 1 120)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 852
WIRE -1072 -64 -1088 -64
WIRE -624 -64 -1072 -64
WIRE -528 -48 -560 -48
WIRE -400 -48 -448 -48
WIRE -256 -48 -400 -48
WIRE -240 -48 -256 -48
WIRE -624 -32 -736 -32
WIRE -1072 -16 -1072 -64
WIRE -736 -16 -736 -32
WIRE -784 0 -880 0
WIRE -400 0 -400 -48
WIRE -784 48 -800 48
WIRE -800 96 -800 48
WIRE -736 96 -736 64
WIRE -880 160 -880 0
WIRE -256 160 -256 -48
WIRE -400 176 -400 80
WIRE -400 176 -832 176
WIRE -1072 224 -1072 64
WIRE -768 224 -832 224
WIRE -736 224 -768 224
WIRE -768 304 -768 224
WIRE -1072 432 -1072 304
WIRE -880 432 -880 240
SYMBOL res -432 -64 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName RsOL
SYMATTR Value 100
SYMBOL e2 -880 144 M0
SYMATTR InstName Gs
SYMATTR Value 20
SYMBOL voltage -1072 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName K
SYMATTR Value SINE(0 1 120)
FLAG -240 -48 OUT
FLAG -800 96 0
FLAG -736 96 0
FLAG -736 224 REF
FLAG -1088 -64 Input
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1304-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1304-5.asy)
D1 N001 OUT MBRS140
Rload OUT 0 25
V1 IN 0 3
C1 OUT 0 100 Rser=0.02
L1 IN N001 22 Rser=0.02 Rpar=5000
XU1 N003 N004 IN N001 0 N002 IN OUT LT1304 top=590K bot=194.6K ;pnba LBI)LBO)Vin)SW)GND)Ilim)_SHDN)Sense
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib LT1304.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1668 944
WIRE 544 464 448 464
WIRE 704 464 544 464
WIRE 752 464 704 464
WIRE 880 464 832 464
WIRE 928 464 880 464
WIRE 1040 464 992 464
WIRE 1104 464 1040 464
WIRE 448 480 448 464
WIRE 1104 480 1104 464
WIRE 704 512 704 464
WIRE 448 576 448 560
WIRE 544 576 544 464
WIRE 560 576 544 576
WIRE 880 576 880 464
WIRE 880 576 848 576
WIRE 1104 576 1104 560
WIRE 560 656 544 656
WIRE 1040 656 1040 464
WIRE 1040 656 848 656
WIRE 1040 672 1040 656
WIRE 560 736 544 736
WIRE 864 736 848 736
WIRE 1040 752 1040 736
WIRE 704 816 704 800
SYMBOL PowerProducts\\LT1304-5 704 656 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 448 464 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL IND 736 480 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 22
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL res 1088 464 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL POLCAP 1024 672 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL SCHOTTKY 928 480 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
FLAG 704 816 0
FLAG 1104 576 0
FLAG 1040 752 0
FLAG 448 576 0
FLAG 1104 464 OUT
FLAG 448 464 IN
TEXT 944 800 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1701.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1701.asy)
XU1 N001 0 N004 N003 IN LTC1701 ;pnba SW)GND)FB)Ith/Run)Vin
R4 N003 N002 5.1K
D1 0 N001 1N5817
V1 IN 0 5
C1 OUT 0 47 Rser=.1
R3 IN N003 1Meg
Rload OUT 0 10
R2 N004 0 121K
L1 N001 OUT 4.7
R1 OUT N004 121K
C2 N002 0 330p
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran .5m startup
.lib LTC1701.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2596 1504
WIRE 1600 1184 1392 1184
WIRE 1696 1184 1600 1184
WIRE 2032 1184 1984 1184
WIRE 2080 1184 2032 1184
WIRE 2192 1184 2160 1184
WIRE 2304 1184 2192 1184
WIRE 2416 1184 2304 1184
WIRE 1392 1200 1392 1184
WIRE 1600 1200 1600 1184
WIRE 2032 1200 2032 1184
WIRE 2192 1200 2192 1184
WIRE 2416 1200 2416 1184
WIRE 2304 1216 2304 1184
WIRE 2032 1280 2032 1264
WIRE 1392 1296 1392 1280
WIRE 2304 1296 2304 1280
WIRE 2416 1296 2416 1280
WIRE 1504 1312 1472 1312
WIRE 1600 1312 1600 1280
WIRE 1600 1312 1584 1312
WIRE 1696 1312 1600 1312
WIRE 2192 1312 2192 1280
WIRE 2192 1312 1984 1312
WIRE 2192 1328 2192 1312
WIRE 1472 1344 1472 1312
WIRE 1472 1424 1472 1408
WIRE 1840 1424 1840 1392
WIRE 2192 1424 2192 1408
SYMBOL res 1600 1296 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 5.1K
SYMBOL POWERPRODUCTS\\LTC1701 1840 1248 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1392 1184 R0
WINDOW 3 25 99 Left 2
SYMATTR Value 5
SYMATTR InstName V1
SYMBOL ind 2064 1200 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL res 1584 1184 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL cap 1456 1344 R0
SYMATTR InstName C2
SYMATTR Value 330p
SYMBOL res 2176 1312 R0
SYMATTR InstName R2
SYMATTR Value 121K
SYMBOL polcap 2288 1216 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMATTR SpiceLine Rser=.1
SYMBOL res 2400 1184 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL RES 2176 1184 R0
SYMATTR InstName R1
SYMATTR Value 121K
SYMBOL diode 2016 1264 M180
WINDOW 0 27 63 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5817
FLAG 2032 1280 0
FLAG 2304 1296 0
FLAG 2192 1424 0
FLAG 1840 1424 0
FLAG 1472 1424 0
FLAG 1392 1296 0
FLAG 2416 1296 0
FLAG 2416 1184 OUT
FLAG 1392 1184 IN
TEXT 2072 1480 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\368e85d804d3_laplace_2nd_ordre.asc
* Generated by LTspice 26.0.1 for Windows.
V1 VIN 0 PULSE(0 1 0 1n 1n 0.5m 1m) AC 1
E1 passe-bas 0 VIN 0 Laplace={1 /(s*s/ {w0*w0} + 2*z*s/w0 + 1)}
E2 passe-bande 0 VIN 0 Laplace={2*z*s/w0 /(s*s/ {w0*w0} + 2*z*s/w0 + 1)}
E3 passe-haut 0 VIN 0 Laplace={s*s/ {w0*w0} /(s*s/ {w0*w0} + 2*z*s/w0 + 1)}
E4 coupe-bande 0 VIN 0 Laplace={(1+s*s/ {w0*w0}) /(s*s/ {w0*w0} + 2*z*s/w0 + 1)}
.ac dec 1000 100 10k
;tran 1ms
.params w0=10000
.step param z list 0.2 1 5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1232 692
WIRE 640 -208 512 -208
WIRE 512 -192 512 -208
WIRE 464 -176 384 -176
WIRE 464 -112 464 -128
WIRE 512 -112 464 -112
WIRE 464 -96 464 -112
WIRE 640 -48 512 -48
WIRE 512 -32 512 -48
WIRE 384 -16 384 -176
WIRE 464 -16 384 -16
WIRE 464 48 464 32
WIRE 512 48 464 48
WIRE 464 64 464 48
WIRE 640 80 512 80
WIRE 512 96 512 80
WIRE 384 112 384 -16
WIRE 464 112 384 112
WIRE 464 176 464 160
WIRE 512 176 464 176
WIRE 464 192 464 176
WIRE 608 224 512 224
WIRE 384 240 384 112
WIRE 384 240 320 240
WIRE 464 240 384 240
WIRE 464 304 464 288
WIRE 512 304 464 304
WIRE 464 320 464 304
WIRE 288 352 288 304
WIRE 288 352 256 352
WIRE 320 352 320 240
WIRE 320 352 288 352
WIRE 256 368 256 352
WIRE 256 464 256 448
WIRE 480 464 256 464
WIRE 480 480 480 464
FLAG 480 480 0
FLAG 288 304 VIN
IOPIN 288 304 In
FLAG 464 320 0
FLAG 608 224 passe-bas
IOPIN 608 224 Out
FLAG 464 192 0
FLAG 640 80 passe-bande
IOPIN 640 80 Out
FLAG 464 64 0
FLAG 640 -48 passe-haut
IOPIN 640 -48 Out
FLAG 464 -96 0
FLAG 640 -208 coupe-bande
IOPIN 640 -208 Out
SYMBOL voltage 256 352 R0
WINDOW 3 19 88 Left 0
WINDOW 123 19 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 1 0 1n 1n 0.5m 1m)
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL e 512 208 R0
WINDOW 3 32 59 Left 0
SYMATTR Value Laplace={1 /(s*s/ {w0*w0} + 2*z*s/w0 + 1)}
SYMATTR InstName E1
SYMBOL e 512 80 R0
WINDOW 3 32 59 Left 0
SYMATTR Value Laplace={2*z*s/w0 /(s*s/ {w0*w0} + 2*z*s/w0 + 1)}
SYMATTR InstName E2
SYMBOL e 512 -48 R0
WINDOW 3 32 59 Left 0
SYMATTR Value Laplace={s*s/ {w0*w0} /(s*s/ {w0*w0} + 2*z*s/w0 + 1)}
SYMATTR InstName E3
SYMBOL e 512 -208 R0
WINDOW 3 32 59 Left 0
SYMATTR Value Laplace={(1+s*s/ {w0*w0}) /(s*s/ {w0*w0} + 2*z*s/w0 + 1)}
SYMATTR InstName E4
TEXT 544 528 Left 0 !.ac dec 1000 100 10k
TEXT 552 416 Left 0 !;tran 1ms
TEXT 560 312 Left 0 !.params w0=10000\n.step param z list 0.2 1 5
* Z:\home\khalils\Downloads\files\data\raw_asc\1a0b651b624e_NotH.asc
* Generated by LTspice 26.0.1 for Windows.
* Vt=.7 Vh=1m
RNotLoad _Q V+ 1e4
RNotIn In V- 1g
CNot _Q V- 1p
S1 _Q V- In V- SwNot
.MODEL SwNot Sw(VT={Vref} VH=0 RON=10 ROFF=1e7)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 192 0 192
WIRE 128 192 96 192
WIRE 128 192 128 176
WIRE 128 240 128 192
WIRE 128 352 16 352
WIRE 128 352 128 304
WIRE 192 192 128 192
WIRE 208 352 128 352
WIRE 208 352 208 240
WIRE 256 272 256 240
WIRE 304 240 256 240
WIRE 304 256 304 240
WIRE 304 352 208 352
WIRE 304 352 304 336
WIRE 352 192 272 192
WIRE 352 352 304 352
WIRE 352 352 352 192
IOPIN 128 176 Out
IOPIN 256 272 In
SYMBOL res 288 240 R0
WINDOW 0 -16 -15 Left 0
WINDOW 3 30 49 Left 0
SYMATTR InstName RNotIn
SYMATTR Value 1g
SYMBOL cap 112 240 R0
SYMATTR InstName CNot
SYMATTR Value 1p
SYMBOL sw 176 192 R270
WINDOW 0 -15 39 VRight 0
WINDOW 3 48 39 VRight 0
SYMATTR InstName S1
SYMATTR Value SwNot
SYMBOL res 112 176 R90
WINDOW 0 0 72 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName RNotLoad
SYMATTR Value 1e4
FLAG 128 176 _Q
FLAG 256 272 In
FLAG 16 352 V-
FLAG 0 192 V+
TEXT -200 376 Left 0 !.MODEL SwNot Sw(VT={Vref} VH=0 RON=10 ROFF=1e7)
TEXT 272 176 Left 0 ;Vt=.7 Vh=1m
* Z:\home\khalils\Downloads\files\data\raw_asc\0f31af21495a_Coupling_Block.asc
* Generated by LTspice 26.0.1 for Windows.
D1 P001 Coup D
D2 P001 0 D
K1 L1 L2 1
L2 0 N001 1m
R2 N001 0 7.5Meg
L1 0 decoup 1m Rser=.1
C1 Coup N001 22p
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 128 -128 128
WIRE 0 144 0 128
WIRE 160 144 64 144
WIRE 240 144 160 144
WIRE 288 144 240 144
WIRE 416 144 352 144
WIRE 496 144 416 144
WIRE 512 144 496 144
WIRE 160 160 160 144
WIRE 240 160 240 144
WIRE 496 160 496 144
WIRE 192 224 64 224
WIRE 240 224 192 224
WIRE 0 256 0 224
WIRE 192 272 192 224
WIRE 416 272 416 144
SYMBOL cap 352 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 22p
SYMBOL ind2 16 240 R180
WINDOW 0 -19 108 Left 2
WINDOW 3 -27 139 Left 2
SYMATTR InstName L1
SYMATTR Value 1m
SYMATTR Type ind
SYMATTR SpiceLine Rser=.1
SYMBOL zener 400 336 R0
SYMATTR InstName D2
SYMBOL zener 432 336 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL ind2 80 240 R180
WINDOW 0 -33 45 Left 2
WINDOW 3 -22 25 Left 2
SYMATTR InstName L2
SYMATTR Value 1m
SYMATTR Type ind
SYMBOL res 224 128 R0
SYMATTR InstName R2
SYMATTR Value 7.5Meg
FLAG 192 272 0
FLAG 0 256 0
FLAG 512 144 Coup
FLAG -128 128 decoup
FLAG 416 400 0
TEXT 40 248 Left 2 !K1 L1 L2 1