Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3311-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3311-1.asy)
XU1 IN IN N002 OUT 0 0 N006 N001 IN N005 N003 LTC3311-1 ;pnba Vin)EN)SW)OUT)Agnd)Pgnd)Rt)Pgood)Mode/Sync)Ith)SSTT
R5 N006 0 274K
R3 OUT N001 500K
C1 OUT 0 47 x2
V1 IN 0 3.3
C3 N004 0 330p
L1 N002 OUT 100n Rser=2m
Rload OUT 0 0.125
R4 N005 N004 4.99k
C2 N003 0 3.3n
.tran .4m startup
.lib LTC3311-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2648 1864
WIRE 1536 1248 1376 1248
WIRE 1712 1248 1536 1248
WIRE 1376 1264 1376 1248
WIRE 1712 1280 1712 1248
WIRE 1536 1328 1536 1248
WIRE 1552 1328 1536 1328
WIRE 1904 1328 1872 1328
WIRE 2016 1328 1984 1328
WIRE 1376 1360 1376 1344
WIRE 1536 1424 1536 1328
WIRE 1552 1424 1536 1424
WIRE 1904 1424 1872 1424
WIRE 2016 1424 2016 1328
WIRE 2016 1424 1984 1424
WIRE 2096 1424 2016 1424
WIRE 2208 1424 2096 1424
WIRE 2096 1440 2096 1424
WIRE 2208 1440 2208 1424
WIRE 1472 1520 1456 1520
WIRE 1552 1520 1536 1520
WIRE 2016 1520 2016 1424
WIRE 2016 1520 1872 1520
WIRE 2096 1536 2096 1504
WIRE 2208 1536 2208 1520
WIRE 1424 1616 1360 1616
WIRE 1552 1616 1504 1616
WIRE 1904 1616 1872 1616
WIRE 1360 1632 1360 1616
WIRE 1904 1632 1904 1616
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
WIRE 1360 1712 1360 1696
WIRE 1904 1728 1904 1712
SYMBOL LTC3311-1 1712 1456 R0
SYMATTR InstName U1
SYMBOL cap 1536 1504 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 3.3n
SYMBOL VOLTAGE 1376 1248 R0
SYMATTR Value 3.3
SYMATTR InstName V1
SYMBOL res 2192 1424 R0
SYMATTR InstName Rload
SYMATTR Value 0.125
SYMBOL res 2000 1312 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 500K
SYMBOL res 1520 1600 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 4.99k
SYMBOL res 1888 1616 R0
SYMATTR InstName R5
SYMATTR Value 274K
SYMBOL cap 2080 1440 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 x2
SYMATTR InstName C1
SYMATTR Value 47
SYMBOL cap 1344 1632 R0
SYMATTR InstName C3
SYMATTR Value 330p
SYMBOL ind 1888 1440 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100n
SYMATTR SpiceLine Rser=2m
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1376 1360 0
FLAG 2208 1536 0
FLAG 1456 1520 0
FLAG 2208 1424 OUT
FLAG 1376 1248 IN
FLAG 1360 1712 0
FLAG 2096 1536 0
FLAG 1904 1728 0
TEXT 2048 1616 Left 2 !.tran .4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7185-2.asc
* Generated by LTspice 26.0.1 for Windows.
C2 OUT 0 4.7 Rser=5m
V1 IN 0 -2.5
R3 OUT 0 4
C1 N001 N002 10n
C3 N001 0 1
C4 N003 0 1
XU1 OUT OUT N001 N002 IN 0 N003 IN ADP7185-2 ;pnba Vout)Sense)VA)VAFB)EN)GND)Vreg)Vin
.tran 200m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7185-2.asy)
.lib ADP7185-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 16 -48
WIRE 96 -48 32 -48
WIRE 112 -48 96 -48
WIRE 400 -48 368 -48
WIRE 432 -48 400 -48
WIRE 496 -48 432 -48
WIRE 512 -48 496 -48
WIRE 16 -32 16 -48
WIRE 432 -32 432 -48
WIRE 512 -32 512 -48
WIRE 400 16 400 -48
WIRE 400 16 368 16
WIRE 432 48 432 32
WIRE 16 64 16 48
WIRE 512 64 512 48
WIRE 96 80 96 -48
WIRE 112 80 96 80
WIRE 464 80 368 80
WIRE 384 144 368 144
WIRE 464 144 464 80
WIRE 464 144 448 144
WIRE 464 160 464 144
WIRE 176 224 176 208
WIRE 304 224 304 208
WIRE 464 240 464 224
WIRE 176 320 176 288
FLAG 16 64 0
FLAG 432 48 0
FLAG 304 224 0
FLAG 512 64 0
FLAG 32 -48 IN
FLAG 496 -48 OUT
FLAG 464 240 0
FLAG 176 320 0
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=5m
SYMBOL voltage 16 -48 R0
SYMATTR InstName V1
SYMATTR Value -2.5
SYMBOL res 496 -48 R0
SYMATTR InstName R3
SYMATTR Value 4
SYMBOL cap 448 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap 448 160 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 160 224 R0
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL ADP7185-2 240 48 R0
SYMATTR InstName U1
TEXT 144 360 Left 2 !.tran 200m startup
* Z:\tmp\asc_dec_bjh7r6w2\1927aea48263_Klausur_SS_2008_1_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N003 N005 N004 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
L0b B N007 {L0}
R3 N005 A 1k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 80 64 0
WIRE 240 80 240 0
WIRE 496 96 480 96
WIRE 608 96 576 96
WIRE 240 176 240 160
WIRE 384 176 240 176
WIRE 480 176 480 96
WIRE 480 176 464 176
WIRE 512 176 480 176
WIRE 64 192 64 160
WIRE 240 192 240 176
WIRE 608 192 608 96
WIRE 608 192 576 192
WIRE 64 208 64 192
WIRE 384 208 64 208
WIRE 480 208 464 208
WIRE 512 208 480 208
WIRE 64 224 64 208
WIRE 240 224 240 192
WIRE 480 240 480 208
WIRE 480 368 480 320
WIRE 64 416 64 304
WIRE 240 416 240 304
SYMBOL Opamps\\opamp 544 128 R0
SYMATTR InstName U1
SYMBOL ind 224 208 R0
SYMATTR InstName L0b
SYMATTR Value {L0}
SYMBOL res 480 192 R90
WINDOW 0 60 72 VBottom 2
WINDOW 3 47 106 VTop 2
SYMATTR InstName R3
SYMATTR Value 1k
FLAG 64 192 A
FLAG 240 192 B
FLAG 480 368 0
* Z:\home\khalils\Downloads\files\data\raw_asc\25b7476d7343_anti_aliasing_filter.asc
* Generated by LTspice 26.0.1 for Windows.
+ CJO=2.00p M=0.333 N=1.70 TT=7.20n
;tran 1
V3 0 -2.5V 2.5
C28 N004 0 100p
C27 0 N002 100p
V2 2.5V 0 2.5
V8 N001 N003 AC 1. Rser=1
R51 N002 N001 11
R50 N004 N003 11
C1 N002 N004 1n
R54 N002 N004 10Meg
.MODEL DI_BAS70 D ( IS=99.5p RS=0.600 BV=70.0 IBV=10.0u
.ac dec 100 1 5000k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4816 5224
WIRE 368 -64 304 -64
WIRE 560 -64 560 -96
WIRE 560 -64 448 -64
WIRE 1008 -64 560 -64
WIRE 1440 -64 1008 -64
WIRE -128 0 -128 -144
WIRE 304 32 304 -64
WIRE 304 32 128 32
WIRE 1440 80 1440 -64
WIRE 1008 96 1008 -64
WIRE 128 112 128 32
WIRE -128 128 -128 80
WIRE -128 128 -224 128
WIRE -128 176 -128 128
WIRE 128 272 128 192
WIRE 304 272 128 272
WIRE 304 336 304 272
WIRE 368 336 304 336
WIRE 560 336 448 336
WIRE 1008 336 1008 160
WIRE 1008 336 560 336
WIRE 1440 336 1440 160
WIRE 1440 336 1008 336
WIRE 560 352 560 336
WIRE -128 368 -128 256
WIRE 560 432 560 416
SYMBOL res 464 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R50
SYMATTR Value 11
SYMBOL res 1424 64 R0
SYMATTR InstName R54
SYMATTR Value 10Meg
SYMBOL cap 544 -160 R0
SYMATTR InstName C27
SYMATTR Value 100p
SYMBOL res 464 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R51
SYMATTR Value 11
SYMBOL cap 544 352 R0
SYMATTR InstName C28
SYMATTR Value 100p
SYMBOL voltage 128 96 R0
WINDOW 123 24 124 Left 2
WINDOW 39 24 152 Left 2
SYMATTR Value2 AC 1.
SYMATTR SpiceLine Rser=1
SYMATTR InstName V8
SYMATTR Value ""
SYMBOL voltage -128 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 2.5
SYMBOL cap 992 96 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL voltage -128 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 2.5
FLAG -224 128 0
FLAG -128 -144 2.5V
FLAG -128 368 -2.5V
FLAG 560 -160 0
FLAG 560 432 0
TEXT -64 -360 Left 2 !.MODEL DI_BAS70 D  ( IS=99.5p RS=0.600 BV=70.0 IBV=10.0u\n+ CJO=2.00p  M=0.333 N=1.70 TT=7.20n
TEXT -152 568 Left 2 !;tran 1
TEXT -152 616 Left 2 !.ac dec 100 1 5000k
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1963A-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 1
Rload OUT 0 1K
XU1 IN IN 0 OUT OUT LT1963-1.8 ;pnba _SHDN)IN)GND)OUT)SENSE
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1963A-1.8.asy)
.lib LT1963.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 48 -208 48
WIRE 32 48 16 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 16 144 16 48
WIRE 32 144 16 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL PowerProducts\\LT1963A-1.8 176 96 R0
SYMATTR InstName U1
TEXT 400 216 Left 2 !.tran 1
* Z:\tmp\asc_dec_bjh7r6w2\0ac64165dd67_standard_hold_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M4 VDD Q Qneg VDD EECMOSP l={l_pmos_q_neg} w={w_pmos_q_neg}
M6 VDD Qneg Q VDD EECMOSP l={l_pmos_q} w={w_pmos_q}
Vsweep Qneg 0 {vsweep}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -1024 0 -1024 -64
WIRE -1024 0 -1072 0
WIRE -512 0 -512 -64
WIRE -512 0 -560 0
WIRE -1072 48 -1072 0
WIRE -1024 48 -1072 48
WIRE -512 48 -512 0
WIRE -512 48 -560 48
WIRE -944 80 -976 80
WIRE -608 80 -640 80
WIRE -1040 112 -1280 112
WIRE -1024 112 -1024 96
WIRE -1024 112 -1040 112
WIRE -640 112 -640 80
WIRE -640 112 -1024 112
WIRE -560 112 -560 96
WIRE -512 112 -560 112
WIRE -288 112 -512 112
WIRE -1024 128 -1024 112
WIRE -944 128 -944 80
WIRE -560 128 -560 112
WIRE -560 128 -944 128
WIRE -1024 176 -1072 176
WIRE -512 176 -560 176
WIRE -944 208 -944 128
WIRE -944 208 -976 208
WIRE -640 208 -640 112
WIRE -608 208 -640 208
WIRE -1072 224 -1072 176
WIRE -512 224 -512 176
WIRE -768 272 -800 272
WIRE -736 272 -768 272
WIRE -800 304 -800 272
WIRE -800 432 -800 384
SYMBOL pmos4 -608 0 R0
WINDOW 3 134 15 Left 2
WINDOW 123 137 -28 Left 2
SYMATTR Value EECMOSP
SYMATTR Value2 l={l_pmos_q_neg} w={w_pmos_q_neg}
SYMATTR InstName M4
SYMBOL pmos4 -976 0 M0
WINDOW 3 119 -14 Left 2
WINDOW 123 103 -46 Left 2
SYMATTR Value EECMOSP
SYMATTR Value2 l={l_pmos_q} w={w_pmos_q}
SYMATTR InstName M6
SYMBOL voltage -800 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vsweep
SYMATTR Value {vsweep}
FLAG -864 0 0
FLAG -800 432 0
FLAG -1040 112 Q
FLAG -512 112 Qneg
FLAG -768 272 Qneg
FLAG -688 0 0
FLAG -864 -80 VDD
FLAG -1024 -64 VDD
FLAG -512 -64 VDD
FLAG -688 -80 WL
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1983-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1983-5.asy)
V1 IN 0 5.5
XU1 IN OUT N001 N002 0 IN LTC1983-5 ;pnba Vin)Vout)C+)C-)GND)_SHDN
C2 OUT 0 10
Rload OUT 0 100
C1 N001 N002 1
.tran 1m startup
.lib LTC1983-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2884 1464
WIRE 2416 1008 2096 1008
WIRE 2576 1008 2416 1008
WIRE 2096 1024 2096 1008
WIRE 2416 1024 2416 1008
WIRE 2272 1088 2208 1088
WIRE 2576 1088 2576 1008
WIRE 2576 1088 2560 1088
WIRE 2096 1120 2096 1104
WIRE 2208 1136 2208 1088
WIRE 2208 1248 2208 1200
WIRE 2272 1248 2208 1248
WIRE 2624 1248 2560 1248
WIRE 2736 1248 2624 1248
WIRE 2624 1264 2624 1248
WIRE 2736 1264 2736 1248
WIRE 2416 1328 2416 1312
WIRE 2624 1360 2624 1328
WIRE 2736 1360 2736 1344
SYMBOL PowerProducts\\LTC1983-5 2416 1168 R0
SYMATTR InstName U1
SYMBOL RES 2720 1248 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 2608 1264 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL VOLTAGE 2096 1008 R0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL cap 2192 1136 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 2416 1328 0
FLAG 2624 1360 0
FLAG 2096 1120 0
FLAG 2736 1360 0
FLAG 2736 1248 OUT
FLAG 2096 1008 IN
TEXT 2336 1376 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP161.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP161.asy)
XU1 IN 0 N001 OUT N002 ADP16xad ;pnba Vin)GND)En)Vout)Adj
V1 IN 0 5
R1 OUT N002 230K
Rload OUT 0 330
C1 OUT 0 1
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
R2 N002 0 100K
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 432 96 352 96
WIRE 544 96 432 96
WIRE 624 96 544 96
WIRE -64 112 -64 96
WIRE 432 112 432 96
WIRE 544 112 544 96
WIRE 624 112 624 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 432 208 432 192
WIRE 432 208 352 208
WIRE 544 208 544 176
WIRE 624 208 624 192
WIRE 16 224 16 208
WIRE 432 224 432 208
WIRE 256 272 256 256
WIRE 16 320 16 304
WIRE 432 320 432 304
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL res 608 96 R0
SYMATTR InstName Rload
SYMATTR Value 330
SYMBOL ADP161 256 208 R0
SYMATTR InstName U1
SYMBOL res 416 96 R0
SYMATTR InstName R1
SYMATTR Value 230K
SYMBOL cap 528 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 416 208 R0
SYMATTR InstName R2
SYMATTR Value 100K
FLAG -64 208 0
FLAG 256 272 0
FLAG 432 320 0
FLAG 544 208 0
FLAG 624 208 0
FLAG 624 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3422.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3422.asy)
R4 N002 0 549K
C5 N003 0 .01
C3 OUT 0 22
R1 N006 0 301K
C1 N004 0 1000p Rser=15K Cpar=22p
L1 IN N001 4.7
V1 IN 0 2
C7 N006 0 2200p
R6 OUT 0 6.6
XU1 N001 IN N006 N003 IN N002 N004 N005 MP_01 OUT 0 LTC3422 ;pnba SW)Vin)Burst)SS)_SHDN)FB)Vc)Rt))Vout)GND
R5 OUT N002 931K
R9 N005 0 28K
.tran 4m startup
.lib LTC3422.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1584 2632
WIRE -512 224 -560 224
WIRE -384 224 -432 224
WIRE -384 272 -384 224
WIRE -560 336 -560 224
WIRE -560 336 -672 336
WIRE -528 336 -560 336
WIRE 0 336 -240 336
WIRE 112 336 0 336
WIRE 208 336 112 336
WIRE -672 352 -672 336
WIRE 112 352 112 336
WIRE 208 352 208 336
WIRE -560 432 -560 336
WIRE -528 432 -560 432
WIRE 0 432 0 416
WIRE 0 432 -240 432
WIRE -672 448 -672 432
WIRE 0 448 0 432
WIRE 112 448 112 416
WIRE 208 448 208 432
WIRE -608 528 -640 528
WIRE -528 528 -544 528
WIRE -144 528 -240 528
WIRE -64 528 -80 528
WIRE 0 544 0 528
WIRE -624 624 -640 624
WIRE -528 624 -544 624
WIRE -176 624 -240 624
WIRE -80 624 -176 624
WIRE -176 640 -176 624
WIRE -80 656 -80 624
WIRE -384 704 -384 688
WIRE -176 736 -176 720
WIRE -80 736 -80 720
SYMBOL ind -528 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL res -528 608 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R9
SYMATTR Value 28K
SYMBOL cap 96 352 R0
SYMATTR InstName C3
SYMATTR Value 22
SYMBOL res -192 624 R0
WINDOW 3 29 88 Left 2
SYMATTR Value 301K
SYMATTR InstName R1
SYMBOL res -16 432 R0
SYMATTR InstName R4
SYMATTR Value 549K
SYMBOL res 192 336 R0
SYMATTR InstName R6
SYMATTR Value 6.6
SYMBOL cap -144 544 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
WINDOW 39 -31 35 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1000p
SYMATTR SpiceLine Rser=15K Cpar=22p
SYMBOL cap -96 656 R0
SYMATTR InstName C7
SYMATTR Value 2200p
SYMBOL cap -544 512 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value .01
SYMBOL res -16 320 R0
SYMATTR InstName R5
SYMATTR Value 931K
SYMBOL voltage -672 336 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL LTC3422 -384 480 R0
SYMATTR InstName U1
FLAG 0 544 0
FLAG 112 448 0
FLAG 208 448 0
FLAG -672 448 0
FLAG -640 528 0
FLAG -640 624 0
FLAG -384 704 0
FLAG -64 528 0
FLAG -176 736 0
FLAG -80 736 0
FLAG 208 336 OUT
FLAG -672 336 IN
TEXT 16 640 Left 2 !.tran 4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP162-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP162-1.2.asy)
C1 OUT 0 1
V1 IN 0 5
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
Rload OUT 0 120
XU1 IN 0 N001 OUT ADP16xf K=833.3u ;pnba Vin)GND)En)Vout
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 416 96 352 96
WIRE 512 96 416 96
WIRE -64 112 -64 96
WIRE 416 112 416 96
WIRE 512 112 512 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 416 208 416 176
WIRE 512 208 512 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 120
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADP162-1.2 256 208 R0
SYMATTR InstName U1
FLAG -64 208 0
FLAG 256 272 0
FLAG 416 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6752-3.asc
* Generated by LTspice 26.0.1 for Windows.
* High Speed Differential Line Receiver
* Small differential input\nsignal with large common\nmode component
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC6752-3.asy)
V3 N004 N003 SINE(0 100m 200Meg 0 0 90)
V2 N002 0 2.7
V1 N001 0 5
B1 N003 0 V=.5+2.5*Random(time/50n)
XU1 N002 N001 0 N004 N003 NC_01 NC_02 _Q Q LTC6752-3 ;pnba Vdd)Vcc)Vee)IN+)IN-)_SHDN)_LE/HYST)_Q)Q
.tran 500n
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1956 1060
WIRE 480 -320 480 -336
WIRE 576 -320 576 -336
WIRE 480 -208 480 -240
WIRE 576 -208 576 -240
WIRE 288 -176 48 -176
WIRE 704 -160 672 -160
WIRE 288 -144 288 -176
WIRE 400 -144 288 -144
WIRE 672 -144 672 -160
WIRE 672 -144 656 -144
WIRE -176 -128 -208 -128
WIRE 48 -128 48 -176
WIRE 48 -128 -96 -128
WIRE 400 -112 288 -112
WIRE 672 -112 656 -112
WIRE 672 -96 672 -112
WIRE 704 -96 672 -96
WIRE 48 -80 48 -128
WIRE 128 -80 48 -80
WIRE 288 -80 288 -112
WIRE 288 -80 208 -80
WIRE 576 32 576 16
CIRCLE Normal 368 112 -336 -352 2
SYMBOL bv -80 -128 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName B1
SYMATTR Value V=.5+2.5*Random(time/50n)
SYMBOL LTC6752-3 528 -96 R0
SYMATTR InstName U1
SYMBOL voltage 576 -224 M180
WINDOW 123 24 -26 Left 2
WINDOW 39 24 -5 Left 2
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 2.7
SYMBOL voltage 224 -80 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value SINE(0 100m 200Meg 0 0 90)
SYMATTR InstName V3
SYMBOL voltage 480 -224 M180
WINDOW 123 24 -26 Left 2
WINDOW 39 24 -5 Left 2
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 480 -336 0
FLAG 576 -336 0
FLAG 576 32 0
FLAG 704 -160 Q
FLAG 704 -96 _Q
FLAG -208 -128 0
TEXT 656 40 Left 2 !.tran 500n
TEXT 536 -368 Bottom 2 ;High Speed Differential Line Receiver
TEXT 40 -184 Bottom 2 ;Small differential input\nsignal with large common\nmode component
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3406-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3406-1.2.asy)
C1 OUT 0 22
Rload OUT 0 5
XU1 IN 0 N001 IN OUT LTC3406-x.x top=217K bot=220K ;pnba Run)GND)SW)Vin)Vout
L1 N001 OUT 4.7
V1 IN 0 5
.tran 500u startup
.lib LTC3406-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 700
WIRE 192 64 48 64
WIRE 352 64 192 64
WIRE 48 80 48 64
WIRE 352 80 352 64
WIRE 192 144 192 64
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 624 144 592 144
WIRE 672 144 624 144
WIRE 768 144 672 144
WIRE 672 160 672 144
WIRE 768 160 768 144
WIRE 48 176 48 160
WIRE 672 256 672 224
WIRE 768 256 768 240
WIRE 624 304 624 144
WIRE 624 304 496 304
WIRE 352 384 352 368
SYMBOL PowerProducts\\LTC3406-1.2 352 224 R0
SYMATTR InstName U1
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL polcap 656 160 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL VOLTAGE 48 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 752 144 R0
SYMATTR InstName Rload
SYMATTR Value 5
FLAG 48 176 0
FLAG 352 384 0
FLAG 672 256 0
FLAG 768 256 0
FLAG 768 144 OUT
FLAG 48 64 IN
TEXT 552 352 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4077.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4077.asy)
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
V1 +V 0 15
V2 -V 0 -15
XU1 IN N001 +V -V OUT ADA4077 ;pnba In+)In-)V+)V-)OUT
Rload OUT 0 10K
R2 OUT N001 10K
.tran 1m
.lib ADA4077.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 128 -1120 128 -1136
WIRE 240 -1120 240 -1136
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 128 -1024 128 -1040
WIRE 240 -1024 240 -1040
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 128 -1136 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL ADA4077 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 240 -1136 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
FLAG 128 -1136 +V
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 240 -1136 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 768 -992 0
FLAG 240 -1024 0
FLAG 128 -1024 0
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\061c53d8d28a_Fig9_33_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot d(Id(M1))
M1 0 N002 N003 N001 P_50n l=100n w=5u
VSD 0 N003 100m
VSG 0 N002 0
VBS N001 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSG 0 500m 1m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 688
WIRE 320 96 320 80
WIRE 320 192 320 176
WIRE 400 192 320 192
WIRE 448 80 320 80
WIRE 448 112 448 80
WIRE 448 304 448 208
WIRE 528 160 448 160
WIRE 672 80 448 80
WIRE 672 160 608 160
WIRE 672 160 672 80
WIRE 672 208 672 160
WIRE 672 304 448 304
WIRE 672 304 672 288
WIRE 720 80 672 80
WIRE 720 112 720 80
SYMBOL voltage 672 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 41 57 Left 0
WINDOW 3 41 85 Left 0
SYMATTR InstName VSD
SYMATTR Value 100m
SYMBOL voltage 512 160 M90
WINDOW 0 -32 56 VBottom 0
WINDOW 3 -6 99 VBottom 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VBS
SYMATTR Value 0
SYMBOL voltage 320 80 R0
WINDOW 0 -89 56 Left 0
WINDOW 3 24 104 Invisible 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VSG
SYMATTR Value 0
SYMBOL pmos4 400 112 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=100n w=5u
SYMATTR InstName M1
SYMATTR Value P_50n
FLAG 720 112 0
TEXT 424 336 Left 0 !.dc VSG 0 500m 1m
TEXT 424 360 Left 0 !.lib cmosedu_models.txt
TEXT 488 56 Left 0 ;Plot d(Id(M1))