Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\AD4010.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\AD4010.asy)
V2 N001 0 5
V4 N006 0 PULSE(0 1.8 227n 0.1n 0.1n 40n 1u)
V3 N002 0 1.8
XU1 N001 N002 N004 MP_01 0 N006 MP_02 MP_03 N005 AD4010 EN_Hi_Z=1 ;pnba REF)Vdd)IN))GND)CNV)))Vout
V1 N003 0 PWL(0 0 100u 5)
R1 N004 N003 10
C1 0 N005 10p
.tran 110u
.lib AD4010.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1252
WIRE 704 208 368 208
WIRE 832 208 784 208
WIRE 368 288 368 208
WIRE 704 336 496 336
WIRE 832 336 784 336
WIRE -144 432 -208 432
WIRE -16 432 -64 432
WIRE 128 432 64 432
WIRE 576 432 496 432
WIRE 704 432 640 432
WIRE 704 528 496 528
WIRE 832 528 784 528
WIRE 368 608 368 576
SYMBOL voltage -48 432 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 100u 5)
SYMBOL AD4010 400 432 R0
SYMATTR InstName U1
SYMBOL res 80 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage 688 208 R270
WINDOW 0 45 70 VLeft 2
WINDOW 3 -46 68 VLeft 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 688 336 R270
WINDOW 0 47 41 VRight 2
WINDOW 3 -44 39 VRight 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 1.8
SYMBOL voltage 688 528 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 1.8 227n 0.1n 0.1n 40n 1u)
SYMBOL cap 640 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
FLAG 368 608 0
FLAG 832 336 0
FLAG -208 432 0
FLAG 704 432 0
FLAG 832 528 0
FLAG 832 208 0
TEXT 208 624 Left 2 !.tran 110u
* Z:\home\khalils\Downloads\files\data\raw_asc\3d1fc6d5623d_backlash.asc
* Generated by LTspice 26.0.1 for Windows.
* Backlash-Component\n- this may need UIC in .TRAN ! -
* rel. position
* speed
* speed
* NOTE:\ndepending on Roff/Ron ratio there\nmay be a numerical problem when\nthis component is connected such\nthat pin 2 is used as "input".\nFix:\nLower Roff/Ron or ALTERNATE Solver!
* Bc : compensation for Ron,\ncould be left away.
C1 pos 0 1
Bc 2 N002 V=-I(Bc)*(Ron+1n)
S2 1 N003 0 sw SW1
D2 N002 N003 Dsw
B1 sw 0 V=tbl(V(pos),-bl,-10,-(bl-eps),0,(bl-eps),0,bl,10)
G1 0 pos 1 N002 1
S1 N001 1 sw 0 SW1
D1 N001 N002 Dsw
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model sw1 sw(Roff={Roff} Ron={Ron/2} Vt=0.5 Vh=-0.01)
.model dsw d(Roff={Roff} Ron={Ron/2} Vfwd=0)
.param backlash=20m
.param bl=backlash/2
.param eps=bl/50+1u ;transition slack->coupled
.param Ron=0.5E-9
.param Roff=1MEG
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1276 924
WIRE -160 -16 -224 -16
WIRE -160 112 -160 -16
WIRE -160 192 -160 112
WIRE -96 -16 -160 -16
WIRE -80 64 -80 32
WIRE -80 160 -80 64
WIRE -80 272 -80 160
WIRE -32 112 -160 112
WIRE -16 160 -80 160
WIRE 64 240 -224 240
WIRE 64 288 64 240
WIRE 96 -16 -16 -16
WIRE 96 112 48 112
WIRE 96 240 64 240
WIRE 112 192 -160 192
WIRE 160 112 160 -16
WIRE 160 192 160 112
WIRE 288 -16 160 -16
WIRE 528 -16 368 -16
SYMBOL diode 96 0 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D1
SYMATTR Value Dsw
SYMBOL g 80 240 M90
WINDOW 0 48 77 VLeft 0
WINDOW 3 47 103 VLeft 0
SYMATTR InstName G1
SYMATTR Value 1
SYMBOL cap 48 288 R0
WINDOW 3 44 38 Left 0
SYMATTR Value 1
SYMATTR InstName C1
SYMBOL sw 0 -16 M270
WINDOW 0 22 20 VLeft 0
WINDOW 3 29 141 VLeft 0
SYMATTR InstName S1
SYMATTR Value SW1
SYMBOL bv 384 -16 R90
WINDOW 0 -32 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName Bc
SYMATTR Value V=-I(Bc)*(Ron+1n)
SYMBOL bv -80 256 R0
WINDOW 3 -46 136 Left 0
SYMATTR Value V=tbl(V(pos),-bl,-10,-(bl-eps),0,(bl-eps),0,bl,10)
SYMATTR InstName B1
SYMBOL sw -48 112 R270
SYMATTR InstName S2
SYMATTR Value SW1
SYMBOL diode 160 96 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName D2
SYMATTR Value Dsw
FLAG 176 240 0
FLAG 64 352 0
FLAG 528 -16 2
FLAG -224 240 pos
FLAG -224 -16 1
FLAG -80 64 sw
FLAG -80 352 0
FLAG -32 32 0
FLAG 32 160 0
TEXT -232 -112 Left 0 !.model sw1 sw(Roff={Roff} Ron={Ron/2} Vt=0.5 Vh=-0.01)\n.model dsw d(Roff={Roff} Ron={Ron/2} Vfwd=0)
TEXT 64 -208 Left 0 !.param backlash=20m\n.param bl=backlash/2\n.param eps=bl/50+1u ;transition slack->coupled
TEXT -232 -264 Left 0 ;Backlash-Component\n- this may need UIC in .TRAN ! -
TEXT -336 216 Left 0 ;rel. position
TEXT 560 -16 Left 0 ;speed
TEXT -320 -16 Left 0 ;speed
TEXT -232 -176 Left 0 !.param Ron=0.5E-9\n.param Roff=1MEG
TEXT 240 96 Left 0 ;NOTE:\ndepending on Roff/Ron ratio there\nmay be a numerical problem when\nthis component is connected such\nthat pin 2 is used as "input".\nFix:\nLower Roff/Ron or ALTERNATE Solver!
TEXT 360 -80 Left 0 ;Bc : compensation for Ron,\ncould be left away.
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP151-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
Rload OUT 0 12
XU1 IN 0 IN MP_01 OUT ADP151-x.x T=200K ;pnba Vin)GND)EN))Vout
C1 OUT 0 1
.tran 500u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP151-1.2.asy)
.lib ADP151-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 880 1696 880
WIRE 1984 880 1824 880
WIRE 1696 896 1696 880
WIRE 1984 896 1984 880
WIRE 1696 992 1696 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
FLAG 2256 1024 OUT
FLAG 2256 1136 0
FLAG 1696 992 0
FLAG 1696 880 IN
FLAG 1984 1168 0
FLAG 2160 1136 0
SYMBOL VOLTAGE 1696 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 12
SYMBOL PowerProducts\\ADP151-1.2 1984 1024 R0
SYMATTR InstName U1
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1
TEXT 2144 1200 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2a0af1c2c414_wilson_current_mirror.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N003 N003 N004 N004 IRFH5406
V2 0 N004 5
V1 N001 0 5
I1 N001 N002 1m
M3 N002 N003 N004 N004 IRFH5406
M2 0 N002 N003 N003 IRFH5406
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc I1 0m 1m 0.1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 708
WIRE 64 64 -128 64
WIRE 528 64 352 64
WIRE -128 96 -128 64
WIRE 64 96 64 64
WIRE 528 96 528 64
WIRE 352 144 352 64
WIRE 64 224 64 176
WIRE 304 224 64 224
WIRE 352 256 352 240
WIRE 352 256 240 256
WIRE 64 320 64 224
WIRE 352 320 352 256
WIRE 240 400 240 256
WIRE 240 400 112 400
WIRE 304 400 240 400
WIRE 64 512 64 416
WIRE 240 512 64 512
WIRE 352 512 352 416
WIRE 352 512 240 512
WIRE 240 528 240 512
WIRE 240 640 240 608
SYMBOL nmos 112 320 M0
SYMATTR InstName M3
SYMATTR Value IRFH5406
SYMBOL voltage 240 624 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL current 64 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 1m
SYMBOL voltage -128 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL nmos 304 320 R0
SYMATTR InstName M1
SYMATTR Value IRFH5406
SYMBOL nmos 304 144 R0
SYMATTR InstName M2
SYMATTR Value IRFH5406
FLAG -128 176 0
FLAG 240 640 0
FLAG 528 96 0
TEXT -344 216 Left 2 !.dc I1 0m 1m 0.1m
* Z:\home\khalils\Downloads\files\data\raw_asc\05a9ece993ad_BJT_Tran.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 N002 0 0 BC547B
Ibb 0 N002 0
V2 N001 0 {Uce}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Ibb 0 500u
.step param Uce list 5 10 20
.meas dc Ib find Ib(Q1) when Ic(Q1)=20mA
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 368 16 208 16
WIRE 208 80 208 16
WIRE 368 96 368 16
WIRE 144 128 32 128
WIRE 32 144 32 128
WIRE 32 256 32 224
WIRE 208 256 208 176
WIRE 368 256 368 176
SYMBOL npn 144 80 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL current 32 224 R180
WINDOW 0 -63 0 Left 2
WINDOW 3 -66 28 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Ibb
SYMATTR Value 0
SYMBOL voltage 368 80 R0
WINDOW 3 35 85 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 35 57 Left 2
SYMATTR Value {Uce}
SYMATTR InstName V2
FLAG 208 256 0
FLAG 32 256 0
FLAG 368 256 0
TEXT 48 304 Left 2 !.dc Ibb 0 500u
TEXT 48 328 Left 2 !.step param Uce list 5 10 20
TEXT 208 304 Left 2 !.meas dc Ib find Ib(Q1) when Ic(Q1)=20mA
* Z:\home\khalils\Downloads\files\data\raw_asc\3c18c87d7485_CircuitBouchon4.asc
* Generated by LTspice 26.0.1 for Windows.
;.step param freq 1000 24000 2000
; .param freq=50000
L1 OUT2 0 .01
C1 OUT2 0 10n
V1 N001 0 AC 1 0
R1 OUT2 N001 5
.ac dec 100 1e3 1e6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 80 48 80
WIRE 304 80 208 80
WIRE 432 80 304 80
WIRE 736 80 432 80
WIRE 432 128 432 80
WIRE 48 144 48 80
WIRE 304 144 304 80
WIRE 48 256 48 224
WIRE 128 256 48 256
WIRE 304 256 304 208
WIRE 304 256 128 256
WIRE 432 256 432 208
WIRE 432 256 304 256
WIRE 128 272 128 256
SYMBOL res 224 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL voltage 48 128 R0
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value2 AC 1 0
SYMATTR Value ""
SYMATTR InstName V1
SYMBOL cap 288 144 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL ind 416 112 R0
SYMATTR InstName L1
SYMATTR Value .01
FLAG 128 272 0
FLAG 736 80 OUT2
TEXT 40 344 Left 2 !;.step param freq 1000 24000 2000\n; .param freq=50000
TEXT 208 296 Left 2 !.ac dec 100 1e3 1e6
* Z:\home\khalils\Downloads\files\data\raw_asc\c08a83427e01_Assignment_3a__ii_.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Half Wave Rectifier Circuit (Ideal)
R1 N002 0 1000
V1 N001 0 SINE(0 311 50) Rser=0.001
D1 N001 N002 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 64 80 64
WIRE 352 64 256 64
WIRE 80 112 80 64
WIRE 352 112 352 64
WIRE 80 240 80 192
WIRE 176 240 80 240
WIRE 352 240 352 192
WIRE 352 240 176 240
WIRE 176 272 176 240
SYMBOL res 336 96 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL voltage 80 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.001
SYMATTR InstName V1
SYMATTR Value SINE(0 311 50)
SYMBOL diode 192 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG 176 272 0
TEXT 16 272 Left 2 !.tran 0.05
TEXT 240 8 Center 2 ;Positive Half Wave Rectifier Circuit (Ideal)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3605.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3605.asy)
C3 N003 N004 .1
R2 OUT N005 22.6K
Rload OUT 0 .66
R1 N006 0 162K
C2 N001 0 2.2
R3 N005 0 4.99K
D1 N001 N003 CMDSH2-3
C1 N002 0 .001
L1 N004 OUT 1
C4 N007 0 220p Rser=16K
XU1 N006 NC_01 NC_02 N005 N002 N007 IN NC_03 OUT 0 N004 MP_04 MP_05 MP_06 MP_07 MP_08 IN MP_09 IN N003 N001 0 NC_10 0 LTC3605 ;pnba Rt)PhMode)Mode)FB)Track/SS)Ith)Run)Pgood)Von)PGND)SW))))))PVin))SVin)Boost)INTVcc)SGND)CLKOUT)CLKIN
C5 OUT 0 100
V1 IN 0 12
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 400u startup
.lib LTC3605.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 944 680
WIRE 48 -64 -64 -64
WIRE 176 -64 48 -64
WIRE 304 -64 176 -64
WIRE -64 -48 -64 -64
WIRE 176 -48 176 -64
WIRE 304 -48 304 -64
WIRE 48 0 48 -64
WIRE 64 0 48 0
WIRE -64 48 -64 32
WIRE 448 80 416 80
WIRE 496 80 448 80
WIRE 576 80 560 80
WIRE 448 96 448 80
WIRE -16 160 -32 160
WIRE 64 160 48 160
WIRE 448 160 416 160
WIRE 448 176 448 160
WIRE 64 240 48 240
WIRE 448 240 416 240
WIRE 512 240 448 240
WIRE 608 240 592 240
WIRE 720 240 608 240
WIRE 816 240 720 240
WIRE 720 256 720 240
WIRE 816 256 816 240
WIRE 608 288 608 240
WIRE 608 288 448 288
WIRE 608 304 608 288
WIRE 448 320 448 288
WIRE 448 320 416 320
WIRE 720 352 720 320
WIRE 816 352 816 336
WIRE 608 400 608 384
WIRE 608 400 416 400
WIRE 608 416 608 400
WIRE -32 480 -48 480
WIRE 64 480 48 480
WIRE 448 480 416 480
WIRE 544 480 512 480
WIRE 608 512 608 496
WIRE 176 544 176 528
WIRE 304 544 304 528
SYMBOL res 592 288 R0
SYMATTR InstName R2
SYMATTR Value 22.6K
SYMBOL cap 48 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .001
SYMBOL schottky 432 96 R0
WINDOW 0 26 5 Left 2
WINDOW 3 37 49 Left 2
SYMATTR InstName D1
SYMATTR Value CMDSH2-3
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 64 464 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 162K
SYMBOL voltage -64 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL PowerProducts\\LTC3605 240 240 R0
SYMATTR InstName U1
SYMBOL res 800 240 R0
SYMATTR InstName Rload
SYMATTR Value .66
SYMBOL cap 496 96 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 2.2
SYMBOL cap 432 176 R0
WINDOW 3 26 50 Left 2
WINDOW 0 24 12 Left 2
SYMATTR Value .1
SYMATTR InstName C3
SYMBOL ind 496 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL res 592 400 R0
SYMATTR InstName R3
SYMATTR Value 4.99K
SYMBOL cap 704 256 R0
SYMATTR InstName C5
SYMATTR Value 100
SYMBOL cap 448 496 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
WINDOW 39 -28 32 VBottom 2
SYMATTR InstName C4
SYMATTR Value 220p
SYMATTR SpiceLine Rser=16K
FLAG -64 48 0
FLAG 176 544 0
FLAG 304 544 0
FLAG -48 480 0
FLAG 48 240 0
FLAG -32 160 0
FLAG 576 80 0
FLAG 608 512 0
FLAG 544 480 0
FLAG 720 352 0
FLAG 816 352 0
FLAG -64 -64 IN
FLAG 816 240 OUT
TEXT 712 440 Left 2 !.tran 400u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1763-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N004 0 1
C2 N003 0 10n
V1 IN 0 1.5
R2 N001 IN 50K
C3 N002 0 1
R1 OUT 0 .6
C4 OUT 0 10
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1763 Radj=8K ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1763-1.2.asy)
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value .6
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL ADP1763-1.2 224 176 R0
SYMATTR InstName U1
TEXT 504 280 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\35d9cf725495_Prob_4b2.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vds1 Vgs1 0 0 nch_tt l=10u w=15u
V1 Vgs1 0 1
V2 Vds1 0 1.8V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.dc V2 0 1.8 0.01 V1 0 1 0.2
;.dc V1 0 1 1m
* Long Channel
* l=10u w=15u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 948 680
WIRE 192 64 160 64
WIRE 160 80 160 64
WIRE 160 80 16 80
WIRE 16 96 16 80
WIRE 160 96 160 80
WIRE -160 176 -192 176
WIRE -32 176 -160 176
WIRE -160 192 -160 176
WIRE 16 208 16 192
WIRE 160 208 160 176
WIRE -160 288 -160 272
FLAG -160 288 0
FLAG 16 208 0
FLAG 160 208 0
FLAG -192 176 Vgs1
IOPIN -192 176 In
FLAG 192 64 Vds1
IOPIN 192 64 Out
SYMBOL nmos -32 96 R0
SYMATTR InstName M1
SYMATTR Value nch_tt
SYMATTR Value2 l=10u w=15u
SYMBOL voltage -160 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL voltage 160 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.8V
TEXT 344 80 Left 2 !.include TSMC180.lib
TEXT 344 136 Left 2 !.dc V2 0 1.8 0.01 V1 0 1 0.2
TEXT 344 112 Left 2 !;.dc  V1 0 1 1m
TEXT -88 0 Left 2 ;Long Channel
TEXT -24 256 Left 2 ;l=10u w=15u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3585-0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3585-0.asy)
V1 N001 0 5
C1 OUT 0 .1
XU1 N001 N002 N001 N005 N006 N006 N007 N001 N004 MP_01 0 LT3585-0 ;pnba CHRG/Iadj)Vbat)Vin)SW)IBGTPU)IBGTPD)IBGTin)IBGTpwr)_Done))GND
R3 N004 N001 10K
K1 L1 L2 1
V3 N007 0 PWL(30m 0 30.01m 3 30.1m 3 30.11m 0)
V2 N002 0 3
L1 N002 N005 10 Rpar=2K Rser=.1
L2 0 N003 {10u*10.2*10.2} Rpar=1Meg
D1 N003 OUT D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 50m startup
.lib LT3585-0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3528 1804
WIRE 1936 1152 1936 1136
WIRE 1712 1248 1520 1248
WIRE 1824 1248 1712 1248
WIRE 1936 1248 1936 1232
WIRE 2064 1248 1936 1248
WIRE 2224 1248 2112 1248
WIRE 2368 1248 2288 1248
WIRE 2064 1264 2064 1248
WIRE 2112 1264 2112 1248
WIRE 2368 1280 2368 1248
WIRE 1712 1296 1712 1248
WIRE 1824 1296 1824 1248
WIRE 1936 1296 1936 1248
WIRE 1520 1360 1520 1248
WIRE 1568 1360 1520 1360
WIRE 1664 1360 1648 1360
WIRE 2064 1360 2064 1344
WIRE 2064 1360 1984 1360
WIRE 2112 1360 2112 1344
WIRE 2368 1360 2368 1344
WIRE 1520 1440 1520 1360
WIRE 1664 1440 1520 1440
WIRE 2016 1440 1984 1440
WIRE 1520 1456 1520 1440
WIRE 1664 1520 1600 1520
WIRE 2016 1520 2016 1440
WIRE 2016 1520 1984 1520
WIRE 1520 1552 1520 1536
WIRE 1600 1552 1600 1520
WIRE 1824 1584 1824 1568
WIRE 1600 1664 1600 1632
SYMBOL diode 2224 1264 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL PowerProducts\\LT3585-0 1824 1440 R0
SYMATTR InstName U1
SYMBOL voltage 1600 1536 R0
WINDOW 3 12 110 Left 2
SYMATTR Value PWL(30m 0 30.01m 3 30.1m 3 30.11m 0)
SYMATTR InstName V3
SYMBOL misc\\battery 1936 1248 M180
WINDOW 0 25 87 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL ind2 2048 1248 R0
WINDOW 0 -6 35 Right 2
WINDOW 3 -4 73 Right 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rpar=2K Rser=.1
SYMBOL cap 2352 1280 R0
WINDOW 3 27 55 Left 2
SYMATTR Value .1
SYMATTR InstName C1
SYMBOL ind2 2128 1360 R180
WINDOW 0 -3 72 Right 2
WINDOW 3 0 43 Right 2
SYMATTR InstName L2
SYMATTR Value {10u*10.2*10.2}
SYMATTR SpiceLine Rpar=1Meg
SYMBOL res 1664 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL VOLTAGE 1520 1440 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 2368 1360 0
FLAG 1824 1584 0
FLAG 1520 1552 0
FLAG 2112 1360 0
FLAG 1936 1136 0
FLAG 1600 1664 0
FLAG 2368 1248 OUT
TEXT 2048 1560 Left 2 !.tran 50m startup
TEXT 2088 1248 Bottom 2 !K1 L1 L2 1
* Z:\home\khalils\Downloads\files\data\raw_asc\19e763b97f90_RHV-FR.asc
* Generated by LTspice 26.0.1 for Windows.
R1 b 0 1000
V1 a 0 SINE(0 6 200K)
D1 a b RBR5L30A
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 20u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -256 112 -288 112
WIRE -112 112 -256 112
WIRE 80 112 -48 112
WIRE 96 112 80 112
WIRE -288 192 -288 112
WIRE 96 192 96 112
WIRE -288 352 -288 272
WIRE -80 352 -288 352
WIRE 96 352 96 272
WIRE 96 352 -80 352
WIRE -80 368 -80 352
SYMBOL schottky -112 128 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value RBR5L30A
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL Misc\\signal -288 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 6 200K)
SYMBOL Misc\\EuropeanResistor 80 176 R0
SYMATTR InstName R1
SYMATTR Value 1000
FLAG -80 368 0
FLAG -256 112 a
FLAG 80 112 b
TEXT -288 376 Left 2 !.tran 20u
* Z:\home\khalils\Downloads\files\data\raw_asc\f816bd54dbf5_MosfetCharacteristic.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 0 nmos_enchancement_mosfet L=10u W=400u
VGS N002 0 3V
VDS N001 0 0V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model nmos_enchancement_mosfet nmos (kp=20u Vto=+2V lambda={lambda_variable})
.STEP param lambda_variable 0 0.05 0.01; * vary lambda_variable from 0 to 0.05 in increments of 0.01
.DC VDS 0V 10V 100mV
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 960 680
WIRE 640 -48 272 -48
WIRE 272 96 272 -48
WIRE 640 128 640 -48
WIRE 224 176 -16 176
WIRE -16 224 -16 176
WIRE -16 368 -16 304
WIRE 272 368 272 192
WIRE 272 368 -16 368
WIRE 640 368 640 208
WIRE 640 368 272 368
WIRE 272 448 272 368
SYMBOL nmos 224 96 R0
SYMATTR InstName M1
SYMATTR Value nmos_enchancement_mosfet L=10u W=400u
SYMBOL voltage 640 112 R0
SYMATTR InstName VDS
SYMATTR Value 0V
SYMBOL voltage -16 208 R0
SYMATTR InstName VGS
SYMATTR Value 3V
FLAG 272 448 0
TEXT -240 528 Left 2 !.model nmos_enchancement_mosfet nmos (kp=20u Vto=+2V lambda={lambda_variable})\n.STEP param lambda_variable 0 0.05 0.01; * vary lambda_variable from 0 to 0.05 in increments of 0.01\n.DC VDS 0V 10V 100mV