Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1be959ee3a0c_fra_eg1.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac oct 4 100 10Meg
* This example shows the basic principle of extracting\nthe small signal AC characteristics from an \nLTspice Frequency Response Analysis (FRA) simulation.
* To use this technique in your own simulations,\n include an fra device and the .fra directive.\nThe fra device controls the frequency analysis parameters.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
@1 A B delay=100u fstart=100 fend=10Meg oct=4 fcoarse=10k nmax=50k 3 500k 1 pp0=100m pp1=10m f0=50k f1=500k tavgmin=100u tsettle=2u acmag=1
R1 B N001 10K
XU1 0 N001 +V -V A level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
C1 A 0 50n
R2 N001 0 1K
C2 N001 0 100p
V2 -V 0 -5
.fra
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4156 1252
WIRE 1504 544 1472 544
WIRE 1600 544 1584 544
WIRE 1632 544 1600 544
WIRE 1744 544 1712 544
WIRE 1760 544 1744 544
WIRE 1840 544 1824 544
WIRE 1856 544 1840 544
WIRE 1936 576 1936 560
WIRE 2032 576 2032 560
WIRE 1600 640 1600 544
WIRE 1760 640 1600 640
WIRE 1600 656 1600 640
WIRE 1856 656 1856 544
WIRE 1856 656 1824 656
WIRE 1760 672 1744 672
WIRE 1936 672 1936 656
WIRE 2032 672 2032 656
WIRE 1600 736 1600 720
WIRE 1856 736 1856 720
LINE Normal 1680 672 1680 672 2
LINE Normal 1680 672 1680 672 2
LINE Normal 2128 752 2128 752 2
LINE Normal 2128 752 2128 752 2
LINE Normal 2128 752 2128 752 2
LINE Normal 2128 752 2128 752 2
LINE Normal 1712 464 1760 512 2
LINE Normal 1648 656 1648 656 2
SYMBOL cap 1840 656 R0
SYMATTR InstName C1
SYMATTR Value 50n
SYMBOL res 1728 528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 2032 560 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL cap 1584 656 R0
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL res 1600 528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL fra 1760 544 R90
WINDOW 0 -19 -26 VBottom 2
WINDOW 40 37 -28 VBottom 2
SYMATTR InstName @1
SYMATTR SpiceLine delay=100u fstart=100 fend=10Meg oct=4 fcoarse=10k nmax=50k 3 500k 1 pp0=100m pp1=10m f0=50k f1=500k tavgmin=100u tsettle=2u
SYMATTR SpiceLine2 acmag=1
SYMBOL voltage 1936 560 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL Opamps\\UniversalOpamp2 1792 656 R0
SYMATTR InstName U1
FLAG 1936 672 0
FLAG 2032 672 0
FLAG 1936 560 +V
FLAG 1792 624 +V
FLAG 2032 560 -V
FLAG 1792 688 -V
FLAG 1744 672 0
FLAG 1472 544 0
FLAG 1856 736 0
FLAG 1600 736 0
FLAG 1840 544 A
FLAG 1744 544 B
TEXT 2200 560 Left 2 !.fra
TEXT 2112 592 Left 2 ;.ac oct 4 100 10Meg
TEXT 1888 288 Center 2 ;This example shows the basic principle of extracting\nthe small signal AC characteristics from an \nLTspice Frequency Response Analysis (FRA) simulation.
TEXT 1576 392 Left 2 ;To use this technique in your own simulations,\n include an fra device and the .fra directive.\nThe fra device controls the frequency analysis parameters.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6657-4.096.asc
* Generated by LTspice 26.0.1 for Windows.
C1 OUT 0 1
V1 IN 0 PWL(0 0 3m 4.6 7m 4.6 10m 0)
R1 OUT 0 1K
C2 IN 0 .1
XU1 IN IN OUT 0 LT6657-4.096 ;pnba IN)_SHDN)OUT)GND
.tran 10m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6657-4.096.asy)
.lib LT6657.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1652 680
WIRE 208 96 -208 96
WIRE 304 96 208 96
WIRE 320 96 304 96
WIRE 656 96 608 96
WIRE 752 96 656 96
WIRE -208 112 -208 96
WIRE 208 112 208 96
WIRE 656 112 656 96
WIRE 752 112 752 96
WIRE 208 192 208 176
WIRE -208 208 -208 192
WIRE 304 208 304 96
WIRE 320 208 304 208
WIRE 656 208 656 176
WIRE 752 208 752 192
WIRE 464 272 464 256
FLAG 656 208 0
FLAG 464 272 0
FLAG -208 208 0
FLAG 752 96 OUT
FLAG 752 208 0
FLAG 208 192 0
FLAG -208 96 IN
SYMBOL cap 640 112 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMBOL voltage -208 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 3m 4.6 7m 4.6 10m 0)
SYMBOL res 736 96 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL cap 192 112 R0
SYMATTR InstName C2
SYMATTR Value .1u
SYMBOL LT6657-4.096 464 128 R0
SYMATTR InstName U1
TEXT 672 360 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3623.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3623.asy)
C4 0 N004 2.2n Rpar=100K
C2 N002 N003 .1
XU1 N004 NC_01 IN 0 IN N003 MP_02 N001 0 MP_03 MP_04 MP_05 OUT MP_06 MP_07 MP_08 IN N002 N001 NC_09 0 N001 N001 N001 LTC3623 ;pnba Iset)Pgood)Run)Gsns)PVin)SW))Mode/Sync)PGND))))Vout))))SVin)Boost)INTVcc)PGFB)Imon)Vin_reg)Rt)Ith
L1 N003 OUT 1 Rser=5m
C1 0 N001 2.2
C3 OUT 0 100 Rser=10m
V1 IN 0 12
Rload OUT 0 1
.tran 1.8m startup
.lib LTC3623.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 -144 -144 -144
WIRE 80 -112 80 -144
WIRE -144 -64 -144 -144
WIRE -144 -64 -272 -64
WIRE -96 -64 -144 -64
WIRE -272 -48 -272 -64
WIRE -144 16 -144 -64
WIRE -96 16 -144 16
WIRE 288 16 256 16
WIRE 304 16 288 16
WIRE 400 16 368 16
WIRE -272 48 -272 32
WIRE -96 96 -144 96
WIRE 320 96 256 96
WIRE -144 176 -144 96
WIRE -96 176 -144 176
WIRE 320 176 320 160
WIRE 320 176 256 176
WIRE 384 176 320 176
WIRE 496 176 464 176
WIRE 544 176 496 176
WIRE 640 176 544 176
WIRE 544 192 544 176
WIRE 640 192 640 176
WIRE -144 256 -144 176
WIRE -96 256 -144 256
WIRE 496 256 496 176
WIRE 496 256 256 256
WIRE 544 288 544 256
WIRE 640 288 640 272
WIRE -96 336 -112 336
WIRE -96 416 -112 416
WIRE 336 416 256 416
WIRE 432 416 400 416
WIRE 16 480 16 464
WIRE -144 512 -144 256
WIRE 144 512 144 464
WIRE 144 512 -144 512
WIRE 288 512 288 16
WIRE 288 512 144 512
SYMBOL cap 528 192 R0
SYMATTR InstName C3
SYMATTR Value 100
SYMATTR Value2 Rser=10m
SYMBOL voltage -272 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 368 0 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL res 624 176 R0
SYMATTR InstName Rload
SYMATTR Value 1
SYMBOL cap 400 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 123 60 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 2.2n
SYMATTR Value2 Rpar=100K
SYMBOL ind 368 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR Value2 Rser=5m
SYMBOL cap 304 96 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL PowerProducts\\LTC3623 80 176 R0
SYMATTR InstName U1
SYMATTR Description 15V, 5A Synchronous Step-Down Regulator
FLAG -272 48 0
FLAG 400 16 0
FLAG 544 288 0
FLAG 640 288 0
FLAG 432 416 0
FLAG 16 480 0
FLAG -112 416 0
FLAG 640 176 OUT
FLAG -272 -64 IN
FLAG -112 336 0
TEXT 408 528 Left 2 !.tran 1.8m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\56aa3ab79aac_1024.asc
* Generated by LTspice 26.0.1 for Windows.
* Two Op Amp Instrumentation Amplifier
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1024.asy)
XU2 IN+ N002 +V -V OUT LT1012 ;pnba In+)In-)V+)V-)OUT
V3 IN- IN+ SINE(0 1m 100)
XU1 IN- N001 +V -V N003 LT1012 ;pnba In+)In-)V+)V-)OUT
R1 N003 N001 10K
V2 -V 0 -15
R2 N001 0 100K
R5 OUT N002 100K
V4 IN+ 0 SINE(0 1 10)
V1 +V 0 15
R3 N002 N003 10K
R4 N002 N001 2.2K
.tran 1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 272 48 128 48
WIRE 384 48 352 48
WIRE 416 48 384 48
WIRE 512 48 496 48
WIRE 32 112 16 112
WIRE 128 112 128 48
WIRE 128 112 112 112
WIRE 144 112 128 112
WIRE 240 112 224 112
WIRE 192 208 192 192
WIRE 128 224 128 112
WIRE 160 224 128 224
WIRE 432 224 432 208
WIRE 240 240 240 112
WIRE 240 240 224 240
WIRE 288 240 240 240
WIRE 384 240 384 48
WIRE 384 240 368 240
WIRE 400 240 384 240
WIRE -208 256 -208 240
WIRE -112 256 -112 240
WIRE 160 256 0 256
WIRE 512 256 512 48
WIRE 512 256 464 256
WIRE 544 256 512 256
WIRE 0 272 0 256
WIRE 400 272 368 272
WIRE 192 288 192 272
WIRE 432 304 432 288
WIRE -208 352 -208 336
WIRE -112 352 -112 336
WIRE 0 368 0 352
WIRE 272 368 0 368
WIRE 368 368 368 272
WIRE 368 368 272 368
WIRE 0 384 0 368
WIRE 0 480 0 464
SYMBOL opamps\\LT1024 192 176 R0
SYMATTR InstName U1
SYMBOL res 240 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 368 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2.2K
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL res 384 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL voltage 0 256 R0
WINDOW 3 27 95 Left 2
SYMATTR Value SINE(0 1m 100)
SYMATTR InstName V3
SYMBOL opamps\\LT1024 432 192 R0
SYMATTR InstName U2
SYMBOL voltage 0 368 R0
WINDOW 3 23 94 Left 2
SYMATTR Value SINE(0 1 10)
SYMATTR InstName V4
SYMBOL voltage -208 240 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 512 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 100K
SYMBOL voltage -112 240 R0
SYMATTR InstName V1
SYMATTR Value 15
FLAG -112 352 0
FLAG 192 192 +V
FLAG -112 240 +V
FLAG 192 288 -V
FLAG -208 352 0
FLAG -208 240 -V
FLAG 16 112 0
FLAG 432 208 +V
FLAG 432 304 -V
FLAG 0 480 0
FLAG 544 256 OUT
FLAG 0 256 IN-
FLAG 272 368 IN+
TEXT 424 432 Left 2 !.tran 1
TEXT 168 -8 Bottom 2 ;Two Op Amp Instrumentation Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX4730.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:\nSwitch shown for a logic 0 input\nOn resistance performance at 5V supply\nCharge injection is not included\nBandwidth is 266 MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\MAX4730.asy)
XU1 vIN vNO vCOM 0 +V 0 MAX4730 ;pnba IN)SA)D)SB)V+)GND
V1 vNO 0 3
V3 vIN 0 PULSE(0 3.3 0 20n 20n 10u 20u)
C1 vCOM 0 36p
V4 +V 0 3.3
R1 vCOM 0 301
.tran 100u
.lib MAX4730.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1728 -272 -1904 -272
WIRE -1696 -272 -1728 -272
WIRE -1904 -256 -1904 -272
WIRE -1456 -240 -1504 -240
WIRE -1408 -240 -1456 -240
WIRE -1312 -240 -1408 -240
WIRE -1408 -224 -1408 -240
WIRE -1312 -224 -1312 -240
WIRE -1696 -208 -1776 -208
WIRE -1776 -192 -1776 -208
WIRE -1904 -160 -1904 -176
WIRE -1728 -144 -1776 -144
WIRE -1696 -144 -1728 -144
WIRE -1408 -128 -1408 -144
WIRE -1312 -128 -1312 -160
WIRE -1776 -48 -1776 -144
WIRE -1600 -16 -1600 -32
WIRE -1776 48 -1776 32
SYMBOL MAX4730 -1600 -192 R0
SYMATTR InstName U1
SYMBOL res -1424 -240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage -1904 -272 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL cap -1328 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -2064 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 3.3
SYMBOL voltage -1776 -64 R0
WINDOW 3 34 96 Left 2
SYMATTR Value PULSE(0 3.3 0 20n 20n 10u 20u)
SYMATTR InstName V3
FLAG -1904 -160 0
FLAG -1776 -192 0
FLAG -1776 48 0
FLAG -1600 -368 +V
FLAG -1408 -128 0
FLAG -1600 -16 0
FLAG -1312 -128 0
FLAG -2064 -176 0
FLAG -2064 -256 +V
FLAG -1728 -272 vNO
FLAG -1728 -144 vIN
FLAG -1456 -240 vCOM
TEXT -1488 -16 Left 2 !.tran 100u
TEXT -2008 -560 Left 2 ;Notes:\nSwitch shown for a logic 0 input\nOn resistance performance at 5V supply\nCharge injection is not included\nBandwidth is 266 MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2902-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2902-1.asy)
V1 IN1 0 PWL(0 0 1m 5.0 1 5.0 2 4.1 3 4.1 4 5.0)
XU1 Comp3 Comp1 IN3 IN1 N003 0 0 N001 0 _RESET N002 N002 IN4 IN2 Comp4 Comp2 LTC2902-1 ;pnba COMP3)COMP1)V3)V1)CRT)GND)T0)_RDIS)T1)_RST)VPG)Vref)V4)V2)COMP4)COMP2
V2 IN2 0 PWL(0 0 1m 3.0 5 3.0 6 2.5 7 2.5 8 3.0)
V3 IN3 0 PWL(0 0 1m 1.8 9 1.8 10 1.5 11 1.5 12 1.8)
C1 N003 0 100p
V4 IN4 0 PWL(0 0 1m 0.7 13 0.7 14 0.4 15 0.4 16 0.7)
V5 N001 0 5
.tran 16 startup
.lib LTC2902-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1120 840
WIRE 288 48 -288 48
WIRE 368 48 288 48
WIRE 736 48 704 48
WIRE 288 96 -160 96
WIRE 368 96 288 96
WIRE 736 96 704 96
WIRE 288 144 -32 144
WIRE 368 144 288 144
WIRE 736 144 704 144
WIRE 288 192 96 192
WIRE 368 192 288 192
WIRE 736 192 704 192
WIRE 368 240 224 240
WIRE 736 240 704 240
WIRE 224 256 224 240
WIRE 368 288 352 288
WIRE 720 288 704 288
WIRE 368 336 352 336
WIRE 720 336 720 288
WIRE 720 336 704 336
WIRE 96 352 96 192
WIRE 224 352 224 336
WIRE 480 400 480 384
WIRE 592 400 592 384
WIRE -32 416 -32 144
WIRE 96 448 96 432
WIRE 592 480 592 464
WIRE -160 496 -160 96
WIRE -32 512 -32 496
WIRE -288 576 -288 48
WIRE -160 592 -160 576
WIRE -288 672 -288 656
SYMBOL voltage -160 480 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 1m 3.0 5 3.0 6 2.5 7 2.5 8 3.0)
SYMBOL cap 576 400 R0
WINDOW 3 29 57 Left 2
SYMATTR Value 100p
SYMATTR InstName C1
SYMBOL voltage 96 336 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value PWL(0 0 1m 0.7 13 0.7 14 0.4 15 0.4 16 0.7)
SYMBOL voltage -32 400 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 0 1m 1.8 9 1.8 10 1.5 11 1.5 12 1.8)
SYMBOL voltage 224 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V5
SYMATTR Value 5
SYMBOL LTC2902-1 528 192 R0
SYMATTR InstName U1
SYMBOL voltage -288 560 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1m 5.0 1 5.0 2 4.1 3 4.1 4 5.0)
FLAG 96 448 0
FLAG 736 48 Comp1
FLAG 736 96 Comp2
FLAG 736 144 Comp3
FLAG 736 192 Comp4
FLAG 736 240 _RESET
FLAG -288 672 0
FLAG -160 592 0
FLAG -32 512 0
FLAG 352 336 0
FLAG 352 288 0
FLAG 480 400 0
FLAG 592 480 0
FLAG 288 48 IN1
FLAG 288 96 IN2
FLAG 288 144 IN3
FLAG 288 192 IN4
FLAG 224 352 0
TEXT 736 544 Left 2 !.tran 16 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0d5184c3008c_1116.asc
* Generated by LTspice 26.0.1 for Windows.
* Single Supply Crystal Oscillator 10MHz to 15MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1116.asy)
V1 +V 0 5
C1 N001 0 24p
R2 +V N003 1K
R1 N002 N001 2K
R3 N003 0 1K
CY1 N002 N003 .32p Rser=45 Lser=.78m Cpar=18p
XU1 +V N003 N001 0 0 0 N002 OUT LT1116 ;pnba V+)In+)In-)V-)LATCH)GND)OUT+)OUT-
.tran 50u startup
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -240 80 -256 80
WIRE -160 80 -176 80
WIRE -112 80 -160 80
WIRE 32 80 -32 80
WIRE -304 160 -304 144
WIRE -432 192 -432 176
WIRE -96 192 -96 160
WIRE -160 224 -160 80
WIRE -128 224 -160 224
WIRE 32 224 32 80
WIRE 32 224 -48 224
WIRE -304 256 -304 240
WIRE -192 256 -304 256
WIRE -128 256 -192 256
WIRE 64 256 -48 256
WIRE -304 272 -304 256
WIRE -432 288 -432 272
WIRE -112 304 -112 288
WIRE -96 304 -96 288
WIRE -96 304 -112 304
WIRE -80 304 -80 288
WIRE -80 304 -96 304
WIRE -96 320 -96 304
WIRE -192 352 -192 256
WIRE -64 352 -192 352
WIRE 32 352 32 224
WIRE 32 352 0 352
WIRE -304 368 -304 352
SYMBOL res -16 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL res -320 144 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL misc\\xtal 0 336 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 Invisible 2
SYMATTR InstName Y1
SYMATTR Value .32p
SYMATTR SpiceLine Rser=45 Lser=.78m Cpar=18p
SYMBOL res -320 256 R0
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL Comparators\\LT1116 -96 176 R0
SYMATTR InstName U1
SYMBOL cap -176 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 24p
SYMBOL voltage -432 176 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -432 288 0
FLAG -432 176 +V
FLAG -96 160 +V
FLAG -96 320 0
FLAG -256 80 0
FLAG -304 368 0
FLAG -304 144 +V
FLAG 64 256 OUT
TEXT 64 376 Left 2 !.tran 50u startup
TEXT -120 24 Bottom 2 ;Single Supply Crystal Oscillator 10MHz to 15MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3494.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3494.asy)
C1 0 N002 .22
XU1 N001 0 IN IN IN N003 OUT N002 LT3494 ;pnba SW)GND)Vcc)CTRL)_SHDN)FB)Vout)CAP
L1 IN N001 15
Rload OUT 0 640
R1 OUT N003 2.21Meg
C2 OUT 0 2.2
V1 IN 0 3.6
.tran 1m startup
.lib LT3494.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 96 -176 96
WIRE -32 96 -48 96
WIRE 64 96 48 96
WIRE 352 96 320 96
WIRE 432 96 416 96
WIRE -176 112 -176 96
WIRE -48 160 -48 96
WIRE 64 160 -48 160
WIRE 448 160 320 160
WIRE 480 160 448 160
WIRE 560 160 480 160
WIRE 480 176 480 160
WIRE 560 176 560 160
WIRE -176 208 -176 192
WIRE -48 224 -48 160
WIRE 64 224 -48 224
WIRE 352 224 320 224
WIRE 448 224 448 160
WIRE 448 224 432 224
WIRE 480 272 480 240
WIRE 560 272 560 256
WIRE -48 288 -48 224
WIRE 64 288 -48 288
WIRE 352 288 320 288
SYMBOL ind -48 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 15
SYMBOL cap 416 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .22
SYMBOL res 544 160 R0
SYMATTR InstName Rload
SYMATTR Value 640
SYMBOL LT3494 192 192 R0
SYMATTR InstName U1
SYMBOL voltage -176 96 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL res 448 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2.21Meg
SYMBOL cap 464 176 R0
SYMATTR InstName C2
SYMATTR Value 2.2
FLAG -176 208 0
FLAG 352 288 0
FLAG 432 96 0
FLAG 480 272 0
FLAG 560 272 0
FLAG 560 160 OUT
FLAG -176 96 IN
TEXT 408 328 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8614.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8614.asy)
R3 N005 0 243K
C7 IN 0 .1
Rload OUT 0 1.25
C2 N001 0 1
L1 N003 OUT 2.2 Rser=10m
C1 N004 0 1n
XU1 OUT N001 N002 IN MP_01 0 MP_02 N003 MP_03 0 MP_04 MP_05 IN IN N006 N004 NC_06 0 NC_07 N005 LT8614 ;pnba Bias)INTVcc)BST)Vin1))GND1))SW))GND2)))Vin2)EN/UV)Rt)TR/SS)Mode)GND)PG)FB
C4 OUT 0 47 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
R2 OUT N005 1Meg
R1 N006 0 41.2K
C3 N002 N003 .1
C6 IN 0 .1
C5 OUT N005 10p
V1 IN 0 36
.tran 750u startup
.lib LT8614.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1020 680
WIRE 48 -80 -48 -80
WIRE 256 -80 48 -80
WIRE 432 -80 256 -80
WIRE -48 -64 -48 -80
WIRE 256 -64 256 -80
WIRE 48 0 48 -80
WIRE 112 0 48 0
WIRE 432 0 432 -80
WIRE 432 0 400 0
WIRE 48 16 48 0
WIRE 432 16 432 0
WIRE -48 32 -48 16
WIRE 48 96 48 80
WIRE 112 96 48 96
WIRE 432 96 432 80
WIRE 432 96 400 96
WIRE 48 112 48 96
WIRE 432 112 432 96
WIRE 32 192 16 192
WIRE 112 192 96 192
WIRE 592 192 400 192
WIRE 432 288 400 288
WIRE 432 304 432 288
WIRE 432 384 432 368
WIRE 432 384 400 384
WIRE 480 384 432 384
WIRE 592 384 592 192
WIRE 592 384 560 384
WIRE 704 384 592 384
WIRE 800 384 704 384
WIRE 896 384 800 384
WIRE 592 400 592 384
WIRE 704 400 704 384
WIRE 800 400 800 384
WIRE 896 400 896 384
WIRE 32 480 16 480
WIRE 112 480 96 480
WIRE 592 480 400 480
WIRE 704 480 704 464
WIRE 704 480 592 480
WIRE 592 496 592 480
WIRE 800 496 800 464
WIRE 896 496 896 480
WIRE 208 560 208 544
WIRE 304 560 304 544
WIRE 592 592 592 576
WIRE 208 656 208 640
SYMBOL res 576 384 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 576 480 R0
SYMATTR InstName R3
SYMATTR Value 243K
SYMBOL cap 96 208 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 416 304 R0
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL cap 688 400 R0
SYMATTR InstName C5
SYMATTR Value 10p
SYMBOL cap 32 16 R0
SYMATTR InstName C6
SYMATTR Value .1
SYMBOL cap 784 400 R0
SYMATTR InstName C4
SYMATTR Value 47
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL cap 96 496 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 880 384 R0
SYMATTR InstName Rload
SYMATTR Value 1.25
SYMBOL ind 464 400 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=10m
SYMBOL voltage -48 -80 R0
SYMATTR InstName V1
SYMATTR Value 36
SYMBOL cap 416 16 R0
SYMATTR InstName C7
SYMATTR Value .1
SYMBOL PowerProducts\\LT8614 256 240 R0
SYMATTR InstName U1
SYMBOL res 192 544 R0
SYMATTR InstName R1
SYMATTR Value 41.2K
FLAG 304 560 0
FLAG 208 656 0
FLAG -48 32 0
FLAG 16 192 0
FLAG 800 496 0
FLAG 592 592 0
FLAG 896 496 0
FLAG 896 384 OUT
FLAG -48 -80 IN
FLAG 48 112 0
FLAG 432 112 0
FLAG 16 480 0
TEXT 768 600 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2dac5c3cd1d2_cs_amp.asc
* Generated by LTspice 26.0.1 for Windows.
* .op
* .tf V(Vout) V1
* .tran 5m
V2 Vdd 0 1.8
V1 Vin 0 SINE(0.65 1m 1k) AC 1
M2 Vout Vout Vdd Vdd PMOS l=0.36u w=6.1u
M1 Vout Vin 0 0 NMOS l=0.36u w=10.13u
C1 Vout 0 1p
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.options plotwinsize=0
.include tsmc180.txt
.ac dec 10 10 1gig
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 16 272 -48
WIRE 352 16 272 16
WIRE 272 32 272 16
WIRE 224 48 176 48
WIRE 352 80 352 16
WIRE 352 80 272 80
WIRE 176 144 176 48
WIRE 272 144 272 128
WIRE 272 144 176 144
WIRE 272 192 272 144
WIRE 512 192 272 192
WIRE 560 192 512 192
WIRE 272 208 272 192
WIRE 512 224 512 192
WIRE 368 256 272 256
WIRE 224 288 144 288
WIRE -288 320 -288 256
WIRE -144 320 -144 256
WIRE 272 320 272 304
WIRE 368 320 368 256
WIRE 368 320 272 320
WIRE 512 320 512 288
WIRE 272 400 272 320
WIRE -288 480 -288 400
WIRE -144 480 -144 400
IOPIN 560 192 Out
SYMBOL pmos4 224 128 M180
WINDOW 123 65 4 Left 2
SYMATTR InstName M2
SYMATTR Value2 l=0.36u w=6.1u
SYMBOL voltage -144 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.8
SYMBOL voltage -288 304 R0
WINDOW 3 -268 103 Left 2
WINDOW 123 -125 139 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0.65 1m 1k)
SYMATTR Value2 AC 1
SYMBOL nmos4 224 208 R0
WINDOW 123 62 141 Left 2
SYMATTR InstName M1
SYMATTR Value2 l=0.36u w=10.13u
SYMBOL cap 496 224 R0
SYMATTR InstName C1
SYMATTR Value 1p
FLAG 272 -48 Vdd
FLAG 560 192 Vout
FLAG 144 288 Vin
FLAG 272 400 0
FLAG 512 320 0
FLAG -288 256 Vin
FLAG -144 256 Vdd
FLAG -288 480 0
FLAG -144 480 0
TEXT -360 -80 Left 2 !.options plotwinsize=0
TEXT -360 -48 Left 2 !.include tsmc180.txt
TEXT -360 -24 Left 2 ;.op
TEXT -360 0 Left 2 ;.tf V(Vout) V1
TEXT -360 24 Left 2 ;.tran 5m
TEXT -360 48 Left 2 !.ac dec 10 10 1gig
* Z:\tmp\asc_dec_bjh7r6w2\0d43f9e872d8_ahpf_gain_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V3 Vn 0 -5
R2 2+ N001 9k
R3 N001 0 1k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 -576 160 -576
WIRE 352 -576 256 -576
WIRE -400 -512 -400 -544
WIRE -304 -512 -304 -544
WIRE 240 -464 240 -480
WIRE 160 -448 160 -576
WIRE 208 -448 160 -448
WIRE 352 -432 352 -576
WIRE 352 -432 272 -432
WIRE 400 -432 352 -432
WIRE -128 -416 -144 -416
WIRE -48 -416 -128 -416
WIRE 64 -416 16 -416
WIRE 208 -416 64 -416
WIRE 352 -416 352 -432
WIRE -400 -400 -400 -432
WIRE -304 -400 -304 -432
WIRE -128 -384 -128 -416
WIRE 64 -384 64 -416
WIRE 160 -384 160 -448
WIRE 240 -384 240 -400
WIRE 64 -272 64 -304
WIRE 160 -272 160 -304
SYMBOL voltage -304 -528 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL res 272 -592 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 9k
SYMBOL res 144 -400 R0
SYMATTR InstName R3
SYMATTR Value 1k
FLAG 64 -272 0
FLAG 160 -272 0
FLAG -400 -400 0
FLAG -304 -400 0
FLAG -400 -544 Vp
FLAG -304 -544 Vn
FLAG 240 -480 Vp
FLAG 240 -384 Vn
FLAG 400 -432 2+
FLAG -144 -416 W1
FLAG -128 -416 1+