Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\00ce4231d683_EJ2_2.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 N001 1.5
C2 Vo 0 2
R3 Vo 0 0.16666
C1 N002 N001 0.6666
R1 Vo N002 1
V1 N001 0 AC 1 0
.ac dec 100 0.001 1000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 0 16 0
WIRE 144 0 112 0
WIRE 16 32 16 0
WIRE 16 32 -64 32
WIRE 144 32 144 0
WIRE 240 32 224 32
WIRE 336 32 240 32
WIRE 16 80 16 32
WIRE 32 80 16 80
WIRE 144 80 144 32
WIRE 144 80 96 80
WIRE -64 96 -64 32
WIRE 240 96 240 32
WIRE 336 96 336 32
WIRE -64 256 -64 176
WIRE 96 256 -64 256
WIRE 240 256 240 176
WIRE 240 256 96 256
WIRE 336 256 336 160
WIRE 336 256 240 256
WIRE 96 288 96 256
SYMBOL cap 320 96 R0
SYMATTR InstName C2
SYMATTR Value 2
SYMBOL voltage -64 80 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1 0
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL res 240 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL res 128 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1.5
SYMBOL cap 96 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.6666
SYMBOL res 224 80 R0
SYMATTR InstName R3
SYMATTR Value 0.16666
FLAG 96 288 0
FLAG 336 32 Vo
TEXT -96 312 Left 2 !.ac dec 100 0.001 1000
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1111-12.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1111-12.asy)
D1 N001 OUT MBRS140
C2 OUT 0 33 Rser=0.02
V1 IN 0 5
XU1 IN IN N001 0 0 N002 N003 OUT LT1111 top=220K bot=25.5K ;pnba Ilim)Vin)SW1)SW2)GND)AO)SET)Sense
L1 IN N001 22 Rser=0.02 Rpar=5000
Rload OUT 0 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LT1111.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2512 1432
WIRE 1472 896 1296 896
WIRE 1600 896 1472 896
WIRE 1648 896 1600 896
WIRE 1776 896 1728 896
WIRE 1824 896 1776 896
WIRE 1936 896 1888 896
WIRE 2000 896 1936 896
WIRE 1296 912 1296 896
WIRE 2000 912 2000 896
WIRE 1472 960 1472 896
WIRE 1600 960 1600 896
WIRE 1296 1008 1296 992
WIRE 2000 1008 2000 992
WIRE 1392 1024 1376 1024
WIRE 1776 1024 1776 896
WIRE 1776 1024 1680 1024
WIRE 1936 1104 1936 896
WIRE 1936 1104 1680 1104
WIRE 1936 1120 1936 1104
WIRE 1392 1184 1376 1184
WIRE 1696 1184 1680 1184
WIRE 1936 1200 1936 1184
WIRE 1536 1264 1536 1248
SYMBOL PowerProducts\\LT1111-12 1536 1104 R0
SYMATTR InstName U1
SYMBOL IND 1632 912 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 22
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL VOLTAGE 1296 896 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL schottky 1824 912 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL res 1984 896 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL POLCAP 1920 1120 R0
SYMATTR InstName C2
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02
FLAG 1536 1264 0
FLAG 1696 1184 0
FLAG 1296 1008 0
FLAG 2000 1008 0
FLAG 1936 1200 0
FLAG 2000 896 OUT
FLAG 1296 896 IN
TEXT 1704 1240 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\4057b12e4314_Qgate.asc
* Generated by LTspice 26.0.1 for Windows.
M2 N001 gate 0 0 Si4410DY
V1 N002 0 15
B1 0 gate I=100u*(time > 0) Rpar=1G
D1 N001 N002 D
I1 0 N001 10.
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran .6m
.model D D(Ron=1u Roff=1T)
.options maxstep=.1u
.model Si4410DY VDMOS(Rd=3m Rs=3m Vto=2.6 Kp=60
+ Cgdmax=1.9n Cgdmin=50p Cgs=3.1n Cjo=1n Is=5.5p
+ Rb=5.7m mfg=Siliconix Vds=30 Ron=15m Qg=60n)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 5945688 13421568
WIRE 1248 -512 1248 -528
WIRE 1248 -416 1248 -432
WIRE 1376 -528 1248 -528
WIRE 1440 -528 1376 -528
WIRE 1488 -608 1488 -640
WIRE 1488 -416 1488 -512
WIRE 1648 -640 1488 -640
WIRE 1648 -560 1648 -640
WIRE 1648 -416 1648 -480
WIRE 1696 -640 1648 -640
WIRE 1808 -640 1760 -640
WIRE 1808 -560 1808 -640
WIRE 1808 -416 1808 -480
FLAG 1248 -416 0
FLAG 1488 -416 0
FLAG 1808 -416 0
FLAG 1648 -416 0
FLAG 1376 -528 gate
SYMBOL nmos 1440 -608 R0
WINDOW 0 52 12 Left 0
WINDOW 3 52 80 Left 0
SYMATTR InstName M2
SYMATTR Value Si4410DY
SYMBOL voltage 1808 -576 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL bi2 1248 -512 R0
WINDOW 3 40 42 Left 0
WINDOW 39 23 80 Left 0
SYMATTR Value I=100u*(time > 0)
SYMATTR SpiceLine Rpar=1G
SYMATTR InstName B1
SYMBOL diode 1696 -624 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D1
SYMBOL current 1648 -480 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName I1
SYMATTR Value 10.
TEXT 1064 -392 Left 0 !.tran .6m
TEXT 1064 -344 Left 0 !.model D D(Ron=1u Roff=1T)
TEXT 1064 -368 Left 0 !.options maxstep=.1u
TEXT 1064 -320 Left 0 !.model Si4410DY VDMOS(Rd=3m Rs=3m Vto=2.6 Kp=60\n+ Cgdmax=1.9n Cgdmin=50p Cgs=3.1n Cjo=1n Is=5.5p\n+ Rb=5.7m mfg=Siliconix Vds=30 Ron=15m Qg=60n)
* Z:\home\khalils\Downloads\files\data\raw_asc\13c820cefbe1_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
* Tau=69.12n/1m=69.12uS
V1 N001 0 SINE(0 1 {Fre})
L1 N001 N002 {L} Rpar=1e37
C1 N002 0 {C} Rpar=1e37
.param Fre=1/(2*pi*sqrt(L*C))
.param L=69.12n C=19p
.tran 0 70u 0 1n
.opt reltol=1p vntol=1n abstol=1f
.opt itl4=500 chgtol=0.01f
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 48 112 48
WIRE 112 64 112 48
WIRE 304 144 304 128
WIRE 112 176 112 144
SYMBOL cap 288 144 R0
SYMATTR InstName C1
SYMATTR Value {C}
SYMATTR SpiceLine Rpar=1e37
SYMBOL ind 288 32 R0
SYMATTR InstName L1
SYMATTR Value {L}
SYMATTR SpiceLine Rpar=1e37
SYMBOL voltage 112 48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 1 {Fre})
FLAG 304 208 0
FLAG 112 176 0
TEXT 88 -8 Left 2 !.param Fre=1/(2*pi*sqrt(L*C))
TEXT 88 -48 Left 2 !.param L=69.12n C=19p
TEXT 78 232 Left 2 !.tran 0 70u 0 1n
TEXT 128 -88 Left 2 !.opt reltol=1p vntol=1n abstol=1f
TEXT 208 24 Left 2 ;Tau=69.12n/1m=69.12uS
TEXT 128 -120 Left 2 !.opt itl4=500 chgtol=0.01f
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7159-03.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 3.5
C3 OUT 0 10
R1 N003 N005 107K
R2 N005 0 100K
C4 N003 0 1
C1 N004 0 1
C2 N002 0 1
R4 OUT 0 2.5
R3 IN N001 100K
XU1 OUT MP_01 OUT N002 N001 N005 N003 N004 IN 0 ADP7158_9 Vreg=3.211 Vref=1.216 ;pnba Vout))Vout_Sense)Byp)EN)Ref_Sense)Ref)Vreg)Vin)GND
.tran 5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7159-03.asy)
.lib ADP7158_9.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -144 32
WIRE 80 32 -32 32
WIRE 416 32 400 32
WIRE 464 32 416 32
WIRE 560 32 464 32
WIRE -144 48 -144 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE 416 128 416 32
WIRE 416 128 400 128
WIRE -144 144 -144 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE 0 224 -16 224
WIRE 80 224 64 224
WIRE 464 224 400 224
WIRE 560 224 464 224
WIRE 464 240 464 224
WIRE 560 240 560 224
WIRE 0 320 -16 320
WIRE 80 320 64 320
WIRE 416 320 400 320
WIRE 560 320 560 304
WIRE 416 336 416 320
WIRE 464 336 464 320
WIRE 464 336 416 336
WIRE 464 352 464 336
WIRE 240 400 240 384
WIRE 464 448 464 432
FLAG 240 400 0
FLAG 560 320 0
FLAG 464 144 0
FLAG -16 320 0
FLAG -16 224 0
FLAG -144 144 0
FLAG 560 144 0
FLAG 464 448 0
FLAG -144 32 IN
FLAG 560 32 OUT
SYMBOL voltage -144 32 R0
SYMATTR InstName V1
SYMATTR Value 3.5
SYMBOL cap 448 48 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res 448 224 R0
SYMATTR InstName R1
SYMATTR Value 107K
SYMBOL res 448 336 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL cap 544 240 R0
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap 64 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 544 32 R0
SYMATTR InstName R4
SYMATTR Value 2.5
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL ADP7159-03 240 176 R0
SYMATTR InstName U1
TEXT 568 432 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\4bfdeb663ad2_2N7000_Input_Characteristic_Curve.asc
* Generated by LTspice 26.0.1 for Windows.
* https://www.youtube.com/watch?v=7WWJ2kfJ3oc
Rc N001 Vds 0.001
M1 Vds N002 0 0 2N7000
Vcc N001 0 12
Vg N002 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vg 1.5 20 .01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1232 680
WIRE 448 16 256 16
WIRE 256 32 256 16
WIRE 256 128 256 112
WIRE 320 128 256 128
WIRE 256 144 256 128
WIRE 448 144 448 16
WIRE 208 224 48 224
WIRE 448 240 448 224
WIRE 48 272 48 224
WIRE 256 272 256 240
WIRE 48 368 48 352
SYMBOL voltage 448 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 12
SYMBOL nmos 208 144 R0
SYMATTR InstName M1
SYMATTR Value 2N7000
SYMBOL voltage 48 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vg
SYMATTR Value 0
SYMBOL res 240 16 R0
SYMATTR InstName Rc
SYMATTR Value 0.001
FLAG 256 272 0
FLAG 448 240 0
FLAG 48 368 0
FLAG 320 128 Vds
TEXT 144 336 Left 2 !.dc Vg 1.5 20 .01
TEXT 584 16 Left 2 ;https://www.youtube.com/watch?v=7WWJ2kfJ3oc
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1946A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1946A.asy)
C3 N004 0 .005
L1 IN N001 5.4 Rser=.05
XU1 N003 N002 IN 0 N001 IN N003 N004 LT1946A ;pnba Vc)FB)_SHDN)GND)SW)Vin)Comp)SS
D1 N001 OUT MBRS340
C2 OUT 0 20 Rser=50m
R2 N002 0 5.23K
Rload OUT 0 20
V1 IN 0 3.3
R1 OUT N002 28.7K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 750u startup
.lib LT1946A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2688 1672
WIRE 1568 1200 1456 1200
WIRE 1680 1200 1568 1200
WIRE 1696 1200 1680 1200
WIRE 1808 1200 1776 1200
WIRE 1888 1200 1808 1200
WIRE 2032 1200 1952 1200
WIRE 2160 1200 2032 1200
WIRE 2272 1200 2160 1200
WIRE 1456 1216 1456 1200
WIRE 2160 1216 2160 1200
WIRE 2272 1216 2272 1200
WIRE 2032 1248 2032 1200
WIRE 1680 1264 1680 1200
WIRE 1808 1264 1808 1200
WIRE 1456 1312 1456 1296
WIRE 2160 1312 2160 1280
WIRE 2272 1312 2272 1296
WIRE 1568 1344 1568 1200
WIRE 1600 1344 1568 1344
WIRE 2032 1344 2032 1328
WIRE 2032 1344 1888 1344
WIRE 2032 1360 2032 1344
WIRE 1600 1408 1568 1408
WIRE 2032 1456 2032 1440
WIRE 1568 1472 1568 1408
WIRE 1600 1472 1568 1472
WIRE 1904 1472 1888 1472
WIRE 1984 1472 1968 1472
WIRE 1744 1568 1744 1552
SYMBOL cap 2144 1216 R0
SYMATTR InstName C2
SYMATTR Value 20
SYMATTR SpiceLine Rser=50m
SYMBOL RES 2016 1232 R0
SYMATTR InstName R1
SYMATTR Value 28.7K
SYMBOL VOLTAGE 1456 1200 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL RES 2256 1200 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL schottky 1888 1184 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMBOL cap 1904 1488 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value .005
SYMBOL res 2016 1344 R0
SYMATTR InstName R2
SYMATTR Value 5.23K
SYMBOL PowerProducts\\LT1946A 1744 1408 R0
SYMATTR InstName U1
SYMBOL ind 1680 1216 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 5.4
SYMATTR SpiceLine Rser=.05
FLAG 2032 1456 0
FLAG 1744 1568 0
FLAG 1984 1472 0
FLAG 2160 1312 0
FLAG 1456 1312 0
FLAG 2272 1312 0
FLAG 2272 1200 OUT
FLAG 1456 1200 IN
TEXT 2104 1488 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8610.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8610.asy)
C4 OUT 0 47 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
C5 OUT N006 10p
C2 N001 0 1
R2 OUT N006 1Meg
XU1 0 N003 N005 IN IN N006 N004 NC_01 0 OUT N001 N002 0 LT8610 ;pnba SYNC)TR/SS)RT)EN/UV)VIN)FB)SW)PG)GND)BIAS)INTVcc)BST)PGND
C3 N002 N004 0.1
V1 IN 0 12
Rload OUT 0 2
R3 N006 0 243K
C1 N003 0 .001
L1 N004 OUT 4.7 Rser=3m
R1 N005 0 60.4K
.tran 750u startup
.lib LT8610.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 680
WIRE 64 -80 -32 -80
WIRE 256 -80 64 -80
WIRE -32 -48 -32 -80
WIRE 256 -48 256 -80
WIRE 64 0 64 -80
WIRE 112 0 64 0
WIRE 416 0 400 0
WIRE 496 0 480 0
WIRE -32 48 -32 32
WIRE 112 96 64 96
WIRE 624 96 400 96
WIRE 432 192 400 192
WIRE 432 208 432 192
WIRE 32 288 16 288
WIRE 112 288 96 288
WIRE 432 288 432 272
WIRE 432 288 400 288
WIRE 512 288 432 288
WIRE 624 288 624 96
WIRE 624 288 592 288
WIRE 736 288 624 288
WIRE 832 288 736 288
WIRE 928 288 832 288
WIRE 624 304 624 288
WIRE 736 304 736 288
WIRE 832 304 832 288
WIRE 928 304 928 288
WIRE 112 384 32 384
WIRE 624 384 400 384
WIRE 736 384 736 368
WIRE 736 384 624 384
WIRE 32 400 32 384
WIRE 624 400 624 384
WIRE 832 400 832 368
WIRE 928 400 928 384
WIRE 192 448 192 432
WIRE 320 448 320 432
WIRE 32 496 32 480
WIRE 624 496 624 480
SYMBOL res 912 288 R0
SYMATTR InstName Rload
SYMATTR Value 2
SYMBOL ind 496 304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=3m
SYMBOL LT8610 256 192 R0
SYMATTR InstName U1
SYMBOL res 608 384 R0
SYMATTR InstName R3
SYMATTR Value 243K
SYMBOL cap 816 304 R0
SYMATTR InstName C4
SYMATTR Value 47
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL cap 416 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL voltage -32 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 416 208 R0
SYMATTR InstName C3
SYMATTR Value 0.1
SYMBOL cap 96 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .001
SYMBOL cap 720 304 R0
SYMATTR InstName C5
SYMATTR Value 10p
SYMBOL res 608 288 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 16 384 R0
SYMATTR InstName R1
SYMATTR Value 60.4K
FLAG 192 448 0
FLAG 320 448 0
FLAG 32 496 0
FLAG 16 288 0
FLAG -32 48 0
FLAG 496 0 0
FLAG 832 400 0
FLAG 624 496 0
FLAG 928 400 0
FLAG 928 288 OUT
FLAG -32 -80 IN
FLAG 64 96 0
TEXT 848 488 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3563.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3563.asy)
V1 IN 0 3.6
C1 OUT 0 10
Rload OUT 0 2.56
XU1 OUT IN 0 N001 0 IN LTC3563 ;pnba Vout)Vin)GND)SW)Vsel)Run
L1 N001 OUT 2.2
.tran 2m startup
.lib LTC3563.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 16 -48 16
WIRE 224 16 64 16
WIRE -48 32 -48 16
WIRE 224 32 224 16
WIRE 64 96 64 16
WIRE 80 96 64 96
WIRE 384 96 368 96
WIRE 480 96 464 96
WIRE 528 96 480 96
WIRE 608 96 528 96
WIRE 528 112 528 96
WIRE 608 112 608 96
WIRE -48 128 -48 112
WIRE 528 208 528 176
WIRE 608 208 608 192
WIRE 80 256 64 256
WIRE 480 256 480 96
WIRE 480 256 368 256
WIRE 224 336 224 320
SYMBOL ind 368 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL cap 512 112 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LTC3563 224 176 R0
SYMATTR InstName U1
SYMBOL res 592 96 R0
SYMATTR InstName Rload
SYMATTR Value 2.56
SYMBOL voltage -48 16 R0
SYMATTR InstName V1
SYMATTR Value 3.6
FLAG -48 128 0
FLAG 224 336 0
FLAG 608 208 0
FLAG 528 208 0
FLAG 608 96 OUT
FLAG -48 16 IN
FLAG 64 256 0
TEXT 424 312 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD4000.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\AD4000.asy)
V4 N004 0 PULSE(0 1.8 227n 0.1n 0.1n 40n 500n)
R1 IN N003 10
C1 0 Vout 10p
V3 N002 0 1.8
V1 N003 0 SINE(3 4 10k)
XU1 N001 N002 IN MP_01 0 N004 MP_02 MP_03 Vout AD4000 EN_Hi_Z=1 ;pnba REF)Vdd)IN))GND)CNV)))Vout
V2 N001 0 5
.tran 110u
.lib AD4000.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1252
WIRE 704 208 368 208
WIRE 832 208 784 208
WIRE 368 288 368 208
WIRE 704 336 496 336
WIRE 832 336 784 336
WIRE -144 432 -208 432
WIRE -16 432 -64 432
WIRE 96 432 64 432
WIRE 128 432 96 432
WIRE 544 432 496 432
WIRE 576 432 544 432
WIRE 704 432 640 432
WIRE 704 528 496 528
WIRE 832 528 784 528
WIRE 368 608 368 576
SYMBOL voltage 688 528 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 1.8 227n 0.1n 0.1n 40n 500n)
SYMBOL voltage 688 336 R270
WINDOW 0 47 41 VRight 2
WINDOW 3 -44 39 VRight 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 1.8
SYMBOL voltage 688 208 R270
WINDOW 0 45 70 VLeft 2
WINDOW 3 -46 68 VLeft 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL cap 640 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage -48 432 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(3 4 10k)
SYMBOL res 80 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL AD4000 400 432 R0
SYMATTR InstName U1
FLAG 368 608 0
FLAG 832 336 0
FLAG -208 432 0
FLAG 704 432 0
FLAG 832 528 0
FLAG 832 208 0
FLAG 96 432 IN
FLAG 544 432 Vout
TEXT 184 624 Left 2 !.tran 110u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1963A-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1963A-1.5.asy)
XU1 IN IN 0 OUT OUT LT1963-1.5 ;pnba _SHDN)IN)GND)OUT)SENSE
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 1
Rload OUT 0 1K
.tran 1
.lib LT1963.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 48 -208 48
WIRE 32 48 16 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 16 144 16 48
WIRE 32 144 16 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE -208 176 -208 144
WIRE 176 240 176 208
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL PowerProducts\\LT1963A-1.5 176 96 R0
SYMATTR InstName U1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG -208 176 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG 512 48 OUT
FLAG -208 48 IN
TEXT 376 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\07ab3c1e79b8_Assignment_4b__i_.asc
* Generated by LTspice 26.0.1 for Windows.
* Full Wave Rectifier (Diode Bridge) (Ideal)
V1 0 N002 SINE(0 311 50) Rser=0.001
D2 N003 0 1N4148
D3 N002 N001 1N4148
D4 N003 N002 1N4148
D1 0 N001 1N4148
R1 N001 N003 1000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 448 64 144 64
WIRE 144 80 144 64
WIRE 144 80 -16 80
WIRE 304 80 144 80
WIRE 304 112 304 80
WIRE -16 128 -16 80
WIRE 448 192 448 64
WIRE -16 240 -16 192
WIRE 64 240 -16 240
WIRE 144 240 64 240
WIRE 304 240 304 176
WIRE 304 240 224 240
WIRE 64 272 64 240
WIRE 304 272 304 240
WIRE -16 288 -16 240
WIRE -16 384 -16 352
WIRE 144 384 -16 384
WIRE 304 384 304 336
WIRE 304 384 144 384
WIRE 144 400 144 384
WIRE 448 400 448 272
WIRE 448 400 144 400
SYMBOL res 432 176 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL diode 320 336 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL diode 320 176 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL voltage 128 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 -60 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value SINE(0 311 50)
SYMATTR SpiceLine Rser=0.001
SYMBOL diode 0 352 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL diode 0 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG 64 272 0
TEXT -16 424 Left 2 !.tran 0.05
TEXT -24 24 Left 2 ;Full Wave Rectifier (Diode Bridge) (Ideal)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADR3625.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR3625.asy)
XU1 IN IN 0 0 OUT OUT ADR3625 ;pnba EN)IN)GNDF)GNDS)OUTF)OUTS
V1 IN 0 5
I1 OUT 0 PULSE(1m 2m 2m 1n 1n 2m 4m)
C1 OUT 0 1
C2 IN 0 0.1
.tran 6m
.lib ADR3625.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 680
WIRE 32 128 -96 128
WIRE 80 128 32 128
WIRE 400 128 336 128
WIRE -96 192 -96 128
WIRE 32 192 32 128
WIRE 80 192 32 192
WIRE 400 192 400 128
WIRE 400 192 336 192
WIRE 512 192 400 192
WIRE 512 208 512 192
WIRE 32 224 32 192
WIRE 400 224 400 192
WIRE 160 272 160 240
WIRE 208 272 160 272
WIRE 256 272 256 240
WIRE 256 272 208 272
WIRE -96 304 -96 272
WIRE 32 304 32 288
WIRE 208 304 208 272
WIRE 400 304 400 288
WIRE 512 304 512 288
SYMBOL current 512 208 R0
WINDOW 3 44 53 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(1m 2m 2m 1n 1n 2m 4m)
SYMATTR InstName I1
SYMBOL cap 16 224 R0
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL ADR3625 208 144 R0
SYMATTR InstName U1
SYMBOL cap 384 224 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -96 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 400 304 0
FLAG 208 304 0
FLAG 400 128 OUT
FLAG -96 304 0
FLAG 32 304 0
FLAG -96 128 IN
FLAG 512 304 0
TEXT -128 352 Left 2 !.tran 6m
* Z:\home\khalils\Downloads\files\data\raw_asc\08322eadb1cd_BuckConverter.asc
* Generated by LTspice 26.0.1 for Windows.
* MUHAMMAD GHIYATS AR RAHMANIEY\n22/503896/TK/55089\nBUCK CONVERTER
C1 out 0 {C}
L1 N002 out {L}
V2 VPulse 0 PULSE(0 10 0 1n 1n {D*Ts} {Ts})
S1 N002 N001 VPulse 0 ideal_sw
D1 0 N002 D
V1 N001 0 12
R1 out 0 {R}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m
.meas TRAN current_ripple PP I(L1) FROM 4m to4.5m
.meas TRAN voltage_ripple PP V(out) FROM 4m to4.5m
.inc paramTask1.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -64 -32 -64
WIRE 144 -16 144 -64
WIRE 224 0 224 -48
WIRE 224 0 192 0
WIRE 288 0 288 -64
WIRE 192 96 192 48
WIRE -32 128 -32 -64
WIRE 288 128 288 80
WIRE 144 192 144 64
WIRE 352 192 144 192
WIRE 560 192 432 192
WIRE 656 192 560 192
WIRE 688 192 656 192
WIRE 688 224 688 192
WIRE 560 240 560 192
WIRE 144 256 144 192
WIRE -32 368 -32 208
WIRE 144 368 144 320
WIRE 144 368 -32 368
WIRE 560 368 560 304
WIRE 560 368 144 368
WIRE 688 368 688 304
WIRE 688 368 560 368
WIRE 144 432 144 368
SYMBOL sw 144 80 R180
SYMATTR InstName S1
SYMATTR Value ideal_sw
SYMBOL ind 336 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value {L}
SYMBOL cap 544 240 R0
SYMATTR InstName C1
SYMATTR Value {C}
SYMBOL res 672 208 R0
SYMATTR InstName R1
SYMATTR Value {R}
SYMBOL voltage -32 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL diode 160 320 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL voltage 288 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 10 0 1n 1n {D*Ts} {Ts})
FLAG 144 432 0
FLAG 288 -64 VPulse
FLAG 224 -48 VPulse
FLAG 656 192 out
FLAG 192 96 0
FLAG 288 128 0
TEXT -64 520 Left 2 !.tran 5m
TEXT -792 264 Left 2 !.meas TRAN current_ripple PP I(L1) FROM 4m to4.5m\n.meas TRAN voltage_ripple PP V(out) FROM 4m to4.5m
TEXT -784 432 Left 2 !.inc paramTask1.txt
TEXT -784 112 Left 2 ;MUHAMMAD GHIYATS AR RAHMANIEY\n22/503896/TK/55089\nBUCK CONVERTER