Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG854.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG854.asy)
V3 IN 0 PULSE(0 5 0 20n 20n 10u 20u)
XU2 IN SA D SB +V 0 ADG854 ;pnba IN)S1)D)S2)Vdd)GND
R1 D 0 300
V1 SA 0 5
C1 D 0 35p
V2 SB 0 0
V4 +V 0 5
.tran 100u
.lib ADG854.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1744 -272 -2032 -272
WIRE -1696 -272 -1744 -272
WIRE -2032 -256 -2032 -272
WIRE -1424 -240 -1504 -240
WIRE -1312 -240 -1424 -240
WIRE -1424 -224 -1424 -240
WIRE -1312 -224 -1312 -240
WIRE -1744 -208 -1920 -208
WIRE -1696 -208 -1744 -208
WIRE -1920 -192 -1920 -208
WIRE -2032 -160 -2032 -176
WIRE -2176 -144 -2176 -160
WIRE -1744 -144 -1776 -144
WIRE -1696 -144 -1744 -144
WIRE -1424 -128 -1424 -144
WIRE -1312 -128 -1312 -160
WIRE -1920 -96 -1920 -112
WIRE -1776 -80 -1776 -144
WIRE -2176 -48 -2176 -64
WIRE -1600 -16 -1600 -32
WIRE -1776 32 -1776 0
SYMBOL voltage -1920 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL cap -1328 -224 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL voltage -1776 -96 R0
WINDOW 3 24 136 Left 2
SYMATTR Value PULSE(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V3
SYMBOL voltage -2176 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL res -1440 -240 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL voltage -2032 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADG854 -1600 -192 R0
SYMATTR InstName U2
FLAG -2032 -160 0
FLAG -1920 -96 0
FLAG -1776 32 0
FLAG -1600 -368 +V
FLAG -1424 -128 0
FLAG -1600 -16 0
FLAG -1312 -128 0
FLAG -2176 -48 0
FLAG -2176 -160 +V
FLAG -1744 -272 SA
FLAG -1744 -208 SB
FLAG -1744 -144 IN
FLAG -1424 -240 D
TEXT -1360 -40 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\38e9cabf7774_guitar_waveform_clamp_sim.asc
* Generated by LTspice 26.0.1 for Windows.
* Hunter Drake\nOLED Guitar Pedal Project (clamp stage)\n7/9/2024\n \nCreates a 3.3V ADC friendly signal at Vout.\nVin should not go below -0.5V or above 4V to be safe\n \nNEEDS TO BE TEST IRL PLEASE TEST MF
R2 N002 0 8.2k
V2 Vin 0 1
Q2 Vout N002 N003 0 2N3906
V1 N001 0 3.3
R1 N001 N002 1k
R3 Vout Vin 100k
D1 0 Vout 1N4148
Q1 Vout N003 0 0 2N3904
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V2 -1 5 .1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2320 1472
WIRE 96 0 48 0
WIRE 240 0 176 0
WIRE 320 0 240 0
WIRE 464 0 400 0
WIRE 608 0 464 0
WIRE 720 0 608 0
WIRE 608 32 608 0
WIRE 128 80 0 80
WIRE 464 80 464 0
WIRE 464 80 320 80
WIRE 128 96 128 80
WIRE 320 112 320 80
WIRE 608 128 608 96
WIRE 0 144 0 80
WIRE 256 160 224 160
WIRE 128 192 128 176
WIRE 224 192 224 160
WIRE 224 192 128 192
WIRE 128 208 128 192
WIRE 464 208 464 80
WIRE 320 256 320 208
WIRE 400 256 320 256
WIRE 0 304 0 224
WIRE 128 304 128 288
WIRE 128 304 0 304
WIRE 464 320 464 304
SYMBOL pnp 256 112 R0
SYMATTR InstName Q2
SYMATTR Value 2N3906
SYMBOL res 112 80 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 192 0 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL res 112 192 R0
SYMATTR InstName R2
SYMATTR Value 8.2k
SYMBOL res 416 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL npn 400 208 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL diode 624 96 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 0 128 R0
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG 128 304 0
FLAG 608 128 0
FLAG 464 320 0
FLAG 48 0 0
FLAG 720 0 Vout
FLAG 240 0 Vin
TEXT 400 408 Left 2 !.dc V2 -1 5 .1
TEXT 824 48 Left 2 ;Hunter Drake\nOLED Guitar Pedal Project (clamp stage)\n7/9/2024\n \nCreates a 3.3V ADC friendly signal at Vout.\nVin should not go below -0.5V or above 4V to be safe\n \nNEEDS TO BE TEST IRL PLEASE TEST MF
* Z:\home\khalils\Downloads\files\data\raw_asc\2015f5394071_lc_tank_orientation.asc
* Generated by LTspice 26.0.1 for Windows.
C1 v1 0 0.001 IC=1 Rser=0 Lser=0 Rpar=0 Cpar=0
L1 v1 v2 0.001 IC=0 Rser=0 Rpar=0 Cpar=0
L2 v2 0 0.001 IC=0 Rser=0 Rpar=0 Cpar=0
C2 v3 v4 0.001 IC=1 Rser=0 Lser=0 Rpar=0 Cpar=0
L3 v3 0 0.001 IC=0 Rser=0 Rpar=0 Cpar=0
L4 0 v4 0.001 IC=0 Rser=0 Rpar=0 Cpar=0
.tran 0.1
* we can see that waveform of v3-v4 is the same as v1-gnd.\nthe point of setting ground in the inductor center tap \nis just for the phase inversion. \n \nIn a hartely oscillator, v4 is used as input to the amp\nand the amp will amplify and invert(common emitter) \nthen supply energy back at node v3.
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1944 680
WIRE 384 -224 256 -224
WIRE 448 -224 384 -224
WIRE 880 -224 784 -224
WIRE 976 -224 880 -224
WIRE 448 -192 448 -224
WIRE 976 -192 976 -224
WIRE 256 -128 256 -224
WIRE 784 -128 784 -224
WIRE 976 -96 976 -112
WIRE 1184 -96 976 -96
WIRE 448 -80 448 -112
WIRE 448 -64 448 -80
WIRE 976 -64 976 -96
WIRE 1184 -48 1184 -96
WIRE 256 48 256 -64
WIRE 384 48 256 48
WIRE 448 48 448 16
WIRE 448 48 384 48
WIRE 784 48 784 -64
WIRE 880 48 784 48
WIRE 976 48 976 16
WIRE 976 48 880 48
WIRE 384 80 384 48
FLAG 384 80 0
FLAG 384 -224 v1
FLAG 448 -80 v2
FLAG 1184 -48 0
FLAG 880 -224 v3
FLAG 880 48 v4
SYMBOL cap 240 -128 R0
SYMATTR InstName C1
SYMATTR Value 0.001 IC=1
SYMATTR SpiceLine Rser=0 Lser=0 Rpar=0 Cpar=0
SYMBOL ind 432 -208 R0
SYMATTR InstName L1
SYMATTR Value 0.001 IC=0
SYMATTR SpiceLine Rser=0 Rpar=0 Cpar=0
SYMBOL ind 432 -80 R0
SYMATTR InstName L2
SYMATTR Value 0.001 IC=0
SYMATTR SpiceLine Rser=0 Rpar=0 Cpar=0
SYMBOL cap 768 -128 R0
SYMATTR InstName C2
SYMATTR Value 0.001 IC=1
SYMATTR SpiceLine Rser=0 Lser=0 Rpar=0 Cpar=0
SYMBOL ind 960 -208 R0
SYMATTR InstName L3
SYMATTR Value 0.001 IC=0
SYMATTR SpiceLine Rser=0 Rpar=0 Cpar=0
SYMBOL ind 960 -80 R0
SYMATTR InstName L4
SYMATTR Value 0.001 IC=0
SYMATTR SpiceLine Rser=0 Rpar=0 Cpar=0
TEXT 592 112 Left 2 !.tran 0.1
TEXT 1264 -208 Left 2 ;we can see that waveform of v3-v4 is the same as v1-gnd.\nthe point of setting ground in the inductor center tap \nis just for the phase inversion. \n \nIn a hartely oscillator, v4 is used as input to the amp\nand the amp will amplify and invert(common emitter) \nthen supply energy back at node v3.
* Z:\home\khalils\Downloads\files\data\raw_asc\0e44934550c4_setup_ch0_transfer-function_lpa.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1782.asy)
;tran 100m
R7 0 N001 100k
R3 N001 out 100k
XU1 N002 N001 supp supn out supn LT1782 ;pnba In+)In-)V+)V-)OUT)SHDN
V3 supp 0 15V
V1 in 0 0 AC 100m
C1 N002 0 1n IC=0
R1 in N002 100k
R2 N002 0 100k
V2 supn 0 -15V
C5 N001 out 1n IC=0
.ac oct 1000 1 10Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3288 1092
WIRE 2256 112 2208 112
WIRE 2464 112 2336 112
WIRE 2208 224 2208 112
WIRE 2256 224 2208 224
WIRE 2464 224 2464 112
WIRE 2464 224 2320 224
WIRE 2096 368 2080 368
WIRE 2208 368 2208 224
WIRE 2208 368 2176 368
WIRE 2240 368 2208 368
WIRE 2464 400 2464 224
WIRE 2464 400 2384 400
WIRE 2592 400 2464 400
WIRE 2640 400 2592 400
WIRE 1872 432 1856 432
WIRE 1952 432 1872 432
WIRE 2080 432 2032 432
WIRE 2144 432 2080 432
WIRE 2240 432 2144 432
WIRE 2144 496 2144 432
WIRE 2080 512 2080 432
WIRE 1856 528 1856 432
SYMBOL res 2240 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL cap 2256 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C5
SYMATTR Value 1n
SYMATTR SpiceLine IC=0
SYMBOL res 2080 384 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R7
SYMATTR Value 100k
SYMBOL res 1936 448 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage 1856 512 R0
WINDOW 0 34 37 Left 2
WINDOW 3 34 66 Left 2
WINDOW 123 34 94 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 0
SYMATTR Value2 AC 100m
SYMBOL cap 2064 512 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMATTR SpiceLine IC=0
SYMBOL voltage 2576 512 R0
WINDOW 0 34 37 Left 2
WINDOW 3 34 66 Left 2
WINDOW 123 34 116 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 15V
SYMBOL Opamps\\LT1782 2272 400 R0
SYMATTR InstName U1
SYMBOL voltage 2704 512 R0
WINDOW 0 34 37 Left 2
WINDOW 3 34 66 Left 2
WINDOW 123 34 116 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value -15V
SYMBOL res 2128 480 R0
SYMATTR InstName R2
SYMATTR Value 100k
FLAG 2576 608 0
FLAG 2272 320 supp
FLAG 1856 608 0
FLAG 2576 528 supp
FLAG 2080 368 0
FLAG 2592 400 out
FLAG 1872 432 in
FLAG 2704 608 0
FLAG 2704 528 supn
FLAG 2272 480 supn
FLAG 2320 480 supn
FLAG 2080 576 0
FLAG 2144 576 0
TEXT 1848 208 Left 2 !;tran 100m
TEXT 1848 176 Left 2 !.ac oct 1000 1 10Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\2e887c59df7d_kadai1.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 N001 100k
V3 N003 0 SINE(0 0.5 50k 0 0)
V1 Vcc 0 15
R1 N001 N003 10k
V2 Vee 0 -15
XU1 0 N001 Vcc Vee N002 MC1458 ;pnba In+)In-)V+)V-)OUT
.include MC1458.301.sub
.tran 0.0001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 592 -64 544 -64
WIRE 736 -64 672 -64
WIRE 624 96 624 32
WIRE 432 112 304 112
WIRE 544 112 544 -64
WIRE 544 112 512 112
WIRE 592 112 544 112
WIRE 736 128 736 -64
WIRE 736 128 656 128
WIRE 816 128 736 128
WIRE 304 144 304 112
WIRE 592 144 544 144
WIRE 544 192 544 144
WIRE 624 224 624 160
WIRE 304 272 304 224
SYMBOL res 688 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL voltage 48 128 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL OpAmps\\opamp2 624 64 R0
SYMATTR InstName U1
SYMATTR Value MC1458
SYMBOL res 528 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 304 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 0.5 50k 0 0)
SYMBOL voltage 128 128 R0
SYMATTR InstName V1
SYMATTR Value 15
FLAG 48 224 0
FLAG 128 224 0
FLAG 128 144 Vcc
FLAG 48 144 Vee
FLAG 304 272 0
FLAG 624 32 Vcc
FLAG 624 224 Vee
FLAG 544 192 0
TEXT 304 328 Left 2 !.include MC1458.301.sub
TEXT 8 352 Left 2 !.tran 0.0001
* Z:\home\khalils\Downloads\files\data\raw_asc\1174e09515c5_inv2x.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 2.5
M2 InvOut InvIn 0 0 NMOS l=2.4u w=7.68u
M1 N001 InvIn InvOut N001 PMOS l=2.4u w=23.04u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 -32 64 -32
WIRE 64 0 64 -32
WIRE 176 64 176 -32
WIRE 224 64 176 64
WIRE 224 112 224 64
WIRE 224 112 176 112
WIRE 128 144 96 144
WIRE 96 192 96 144
WIRE 96 192 64 192
WIRE 176 192 176 160
WIRE 208 192 176 192
WIRE 176 224 176 192
WIRE 224 272 176 272
WIRE 96 304 96 192
WIRE 128 304 96 304
WIRE 224 320 224 272
WIRE 224 320 176 320
WIRE 176 352 176 320
IOPIN 64 192 In
IOPIN 208 192 Out
SYMBOL nmos4 128 224 R0
SYMATTR InstName M2
SYMATTR Value2 l=2.4u w=7.68u
SYMBOL pmos4 128 64 R0
SYMATTR InstName M1
SYMATTR Value2 l=2.4u w=23.04u
SYMBOL voltage 192 -32 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
FLAG 176 352 0
FLAG 64 0 0
FLAG 64 192 InvIn
FLAG 208 192 InvOut
* Z:\home\khalils\Downloads\files\data\raw_asc\116bd6b15739_opamp2Offset.asc
* Generated by LTspice 26.0.1 for Windows.
I1 N001 0 {IIB1}
V1 V1 N001 {VIO}
I2 V2 0 {IIB2}
XU1 N001 V2 V+ V- VO LM324 ;pnba In+)In-)V+)V-)OUT
.param VIO=0.00032
.param IIB1=-27.13e-9
.param IIB2=-28.21e-9
.include LM324.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 128 208 80
WIRE 0 144 -80 144
WIRE 176 144 0 144
WIRE 320 160 240 160
WIRE 112 176 48 176
WIRE 176 176 112 176
WIRE 208 256 208 192
WIRE -64 288 -80 288
WIRE 48 288 48 176
WIRE 48 288 16 288
IOPIN -80 288 In
IOPIN -80 144 In
IOPIN 208 80 In
IOPIN 208 256 In
IOPIN 320 160 Out
SYMBOL current 112 176 R0
WINDOW 3 -35 113 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value {IIB1}
SYMATTR InstName I1
SYMBOL current 0 144 R0
WINDOW 3 -110 46 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value {IIB2}
SYMATTR InstName I2
SYMBOL voltage -80 288 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {VIO}
SYMBOL OpAmps\\opamp2 208 96 R0
SYMATTR InstName U1
SYMATTR Value LM324
FLAG 0 224 0
FLAG 112 256 0
FLAG -80 288 V1
FLAG -80 144 V2
FLAG 208 80 V+
FLAG 208 256 V-
FLAG 320 160 VO
TEXT 288 24 Left 2 !.param VIO=0.00032
TEXT 288 56 Left 2 !.param IIB1=-27.13e-9
TEXT 288 88 Left 2 !.param IIB2=-28.21e-9
TEXT 288 -8 Left 2 !.include LM324.txt
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX22701E.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX22701E.asy)
V2 IN 0 PULSE(0 5 0 2n 2n 6u 12u)
XU1 VDD1 IN _EN 0 VDD2 OUT CLAMP 0 MAX22701E ;pnba VDDA)IN)_EN)GNDA)VDDB)OUT)CLAMP)VSSB
V1 VDD1 0 5
V5 VDD2 0 20
V3 _EN 0 PULSE(0 5 0 2n 2n 3u 5u)
R1 CLAMP OUT 10
.tran 50u
.lib MAX22701E.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2212 708
WIRE -48 -112 -128 -112
WIRE 16 -112 -48 -112
WIRE 480 -112 432 -112
WIRE 560 -112 480 -112
WIRE 560 -80 560 -112
WIRE -128 -48 -128 -112
WIRE 560 48 560 0
WIRE -128 64 -128 32
WIRE 16 64 16 -112
WIRE 80 64 16 64
WIRE 432 64 432 -112
WIRE 432 64 384 64
WIRE 16 144 -416 144
WIRE 80 144 16 144
WIRE 448 144 384 144
WIRE 512 144 448 144
WIRE 688 144 592 144
WIRE -416 176 -416 144
WIRE 16 224 -256 224
WIRE 80 224 16 224
WIRE 448 224 384 224
WIRE -256 272 -256 224
WIRE -416 288 -416 256
WIRE 80 304 16 304
WIRE 464 304 384 304
WIRE 688 304 688 144
WIRE 688 304 464 304
WIRE -256 384 -256 352
SYMBOL res 608 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL MAX22701E 224 144 R0
SYMATTR InstName U1
SYMBOL voltage -256 256 R0
WINDOW 3 25 -12 Left 2
WINDOW 0 25 96 Left 2
SYMATTR Value PULSE(0 5 0 2n 2n 3u 5u)
SYMATTR InstName V3
SYMBOL voltage 560 -96 R0
SYMATTR InstName V5
SYMATTR Value 20
SYMBOL voltage -128 -64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -416 160 R0
WINDOW 3 30 2 Left 2
WINDOW 0 29 97 Left 2
SYMATTR Value PULSE(0 5 0 2n 2n 6u 12u)
SYMATTR InstName V2
FLAG 16 304 0
FLAG -256 384 0
FLAG -416 288 0
FLAG 16 144 IN
FLAG 16 224 _EN
FLAG 448 144 OUT
FLAG -48 -112 VDD1
FLAG 480 -112 VDD2
FLAG 464 304 CLAMP
FLAG 448 224 0
FLAG -128 64 0
FLAG 560 48 0
TEXT 280 408 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1109A-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1109A-5.asy)
Rload OUT 0 25
D1 N001 OUT MBRS140
XU1 IN MP_01 N001 0 MP_02 MP_03 N002 OUT LT1109A top=250K bot=83K ;pnba Vin))SW)GND)))_SDN)Sense
V1 IN 0 3 Rser=0.1
C1 OUT 0 22 Rser=0.02
L1 IN N001 33 Rser=0.02 Rpar=5000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LT1109A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2376 1416
WIRE 1520 944 1296 944
WIRE 1584 944 1520 944
WIRE 1696 944 1664 944
WIRE 1744 944 1696 944
WIRE 1856 944 1808 944
WIRE 1920 944 1856 944
WIRE 1296 960 1296 944
WIRE 1920 960 1920 944
WIRE 1520 1008 1520 944
WIRE 1296 1056 1296 1040
WIRE 1920 1056 1920 1040
WIRE 1696 1072 1696 944
WIRE 1696 1072 1648 1072
WIRE 1392 1104 1376 1104
WIRE 1856 1136 1856 944
WIRE 1856 1136 1648 1136
WIRE 1856 1152 1856 1136
WIRE 1856 1232 1856 1216
WIRE 1520 1248 1520 1200
SYMBOL schottky 1744 960 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL IND 1568 960 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL VOLTAGE 1296 944 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMATTR SpiceLine Rser=0.1
SYMBOL POLCAP 1840 1152 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine Rser=0.02
SYMBOL PowerProducts\\LT1109A-5 1520 1088 R0
SYMATTR InstName U1
SYMBOL res 1904 944 R0
SYMATTR InstName Rload
SYMATTR Value 25
FLAG 1920 944 OUT
FLAG 1856 1232 0
FLAG 1920 1056 0
FLAG 1296 1056 0
FLAG 1520 1248 0
FLAG 1296 944 IN
TEXT 1624 1264 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2164-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2164-1.5.asy)
L1 N002 OUT 1 Rser=6m
R3 OUT N004 100K
V1 IN 0 5
C1 N001 0 100n
Rload OUT 0 0.5
C3 OUT 0 83 Rser=2m
R5 IN N001 10
XU1 N001 N003 IN OUT 0 0 N002 IN N001 N001 N004 ADP2164-x.x Rtop=600K Rbot=400K ;pnba Sync)Rt)TRK)FB)GND)PGND)SW)Pvin)Vin)EN)Pgood
R4 N003 0 45.3K
.tran 2m startup
.lib ADP2164-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 728
WIRE -80 -112 -304 -112
WIRE 176 -112 -80 -112
WIRE 400 -112 176 -112
WIRE -304 -96 -304 -112
WIRE -80 -96 -80 -112
WIRE 176 -80 176 -112
WIRE -304 0 -304 -16
WIRE -160 0 -176 0
WIRE -80 0 -80 -16
WIRE -80 0 -96 0
WIRE 0 0 -80 0
WIRE 400 0 400 -112
WIRE 400 0 352 0
WIRE -80 112 -80 0
WIRE 0 112 -80 112
WIRE 368 112 352 112
WIRE 480 112 448 112
WIRE 544 112 480 112
WIRE 640 112 544 112
WIRE 544 128 544 112
WIRE 640 128 640 112
WIRE -80 224 -80 112
WIRE 0 224 -80 224
WIRE 480 224 480 112
WIRE 480 224 352 224
WIRE 544 224 544 192
WIRE 640 224 640 208
WIRE -96 368 -112 368
WIRE 0 368 -16 368
WIRE 368 368 352 368
WIRE 480 368 480 224
WIRE 480 368 448 368
WIRE 112 496 112 480
WIRE 240 496 240 480
SYMBOL res 624 112 R0
SYMATTR InstName Rload
SYMATTR Value 0.5
SYMBOL ind 352 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=6m
SYMBOL voltage -304 -112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADP2164-1.5 176 192 R0
SYMATTR InstName U1
SYMBOL res 464 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res 0 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 45.3K
SYMBOL res -96 -112 R0
SYMATTR InstName R5
SYMATTR Value 10
SYMBOL cap 528 128 R0
SYMATTR InstName C3
SYMATTR Value 83
SYMATTR SpiceLine Rser=2m
SYMBOL cap -96 16 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 100n
FLAG 112 496 0
FLAG -112 368 0
FLAG -304 0 0
FLAG 544 224 0
FLAG 640 224 0
FLAG 640 112 OUT
FLAG -304 -112 IN
FLAG 240 496 0
FLAG -176 0 0
TEXT 488 464 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\cb4b56537e78_j113_swee_.asc
* Generated by LTspice 26.0.1 for Windows.
J1 N003 N002 0 J113
R1 N001 N003 20
VDS N001 0 20
VGS N002 0 V
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.dc VDS 0 20 0.1 VGS 0 -5 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 656 80 400 80
WIRE 320 128 256 128
WIRE 400 128 400 80
WIRE 256 160 256 128
WIRE 400 240 400 208
WIRE 656 256 656 80
WIRE 320 304 320 128
WIRE 352 304 320 304
WIRE 400 416 400 336
WIRE 656 416 656 336
WIRE 656 416 400 416
WIRE 400 448 400 416
SYMBOL Res 384 112 R0
SYMATTR InstName R1
SYMATTR Value 20
SYMBOL njf 352 240 R0
SYMATTR InstName J1
SYMATTR Value J113
SYMBOL Voltage 256 144 R0
SYMATTR InstName VGS
SYMBOL Voltage 656 240 R0
WINDOW 3 24 38 Left 2
SYMATTR InstName VDS
SYMATTR Value 20
FLAG 400 448 0
FLAG 256 240 0
TEXT 112 464 Left 2 !.dc VDS 0 20 0.1 VGS 0 -5 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7102-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7102-1.5.asy)
XU1 IN OUT IN N001 OUT 0 ADP7102 Vref=1.5 ;pnba Vin)Sense)EN)PG)Vout)GND
V1 IN 0 3.3
Rload OUT 0 10
C1 OUT 0 2.2 Rser=1.5m
R1 OUT N001 100k
.tran 3m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -16 48 -16 32
WIRE 368 128 352 128
WIRE 464 128 464 32
WIRE 464 128 368 128
WIRE 560 128 464 128
WIRE -16 144 -16 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 368 224 368 128
WIRE 368 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
SYMBOL ADP7102-1.5 224 128 R0
SYMATTR InstName U1
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage -16 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG 224 304 0
FLAG -16 144 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -16 32 IN
FLAG 560 128 OUT
TEXT 432 288 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2066.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC2066.asy)
R5 N002 N003 {5/Iload}
XU1 N004 N001 +V 0 OUT +V LTC2066 ;pnba IN+)IN-)VCC)VEE)OUT)SHDN
R2 N001 0 10K
R3 N004 N003 10K
V3 +V 0 3.3
R4 N003 0 100m
R1 OUT N001 1Meg
V2 N002 0 5
.op
.step dec param Iload .1m 250m 2
.lib LTC2066.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2188 680
WIRE 992 64 976 64
WIRE 1088 64 1072 64
WIRE 1152 64 1088 64
WIRE 1280 64 1232 64
WIRE 848 128 704 128
WIRE 704 144 704 128
WIRE 848 144 848 128
WIRE 1088 192 1088 64
WIRE 1120 192 1088 192
WIRE 576 224 576 208
WIRE 1280 224 1280 64
WIRE 1280 224 1264 224
WIRE 1296 224 1280 224
WIRE 704 240 704 224
WIRE 848 256 848 224
WIRE 976 256 848 256
WIRE 1120 256 1056 256
WIRE 848 272 848 256
WIRE 576 320 576 304
WIRE 1152 336 1152 304
WIRE 848 368 848 352
SYMBOL voltage 576 208 R0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL res 1088 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL LTC2066 1152 224 R0
SYMATTR InstName U1
SYMBOL res 832 256 R0
SYMATTR InstName R4
SYMATTR Value 100m
SYMBOL res 832 128 R0
SYMATTR InstName R5
SYMATTR Value {5/Iload}
SYMBOL voltage 704 128 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 1072 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res 1248 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1Meg
FLAG 1296 224 OUT
FLAG 1152 336 0
FLAG 976 64 0
FLAG 1200 304 +V
FLAG 848 368 0
FLAG 704 240 0
FLAG 576 320 0
FLAG 576 208 +V
FLAG 1152 144 +V
TEXT 1040 344 Left 2 !.op\n.step dec param Iload .1m 250m 2