Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3303C-05.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3303C-05.asy)
Rload OUT 0 0.45
C1 OUT 0 10 m=3 Rser=10m
C3 OUT N004 10p
V1 IN 0 5
L1 N003 OUT 150n Rser=2m
R4 OUT N002 500K
R1 OUT N004 47.5K
R3 IN N001 10
C2 N001 0 1
XU2 IN N001 N003 N004 0 0 N001 N002 N001 LTC3303C-05 ;pnba VIN)EN)SW)FB)AGND)PGND)AVIN)PGOOD)MODE/SYNC
R2 N004 0 18.2K
.tran 1.5m startup
.lib LTC3303C-05.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2652 1736
WIRE 1392 1248 1360 1248
WIRE 1488 1248 1392 1248
WIRE 1712 1248 1488 1248
WIRE 1360 1264 1360 1248
WIRE 1488 1264 1488 1248
WIRE 1712 1296 1712 1248
WIRE 1360 1360 1360 1344
WIRE 1488 1360 1488 1344
WIRE 1488 1360 1424 1360
WIRE 1552 1360 1488 1360
WIRE 1904 1360 1872 1360
WIRE 2016 1360 1984 1360
WIRE 1424 1376 1424 1360
WIRE 1424 1456 1424 1440
WIRE 1488 1472 1488 1360
WIRE 1552 1472 1488 1472
WIRE 1904 1472 1872 1472
WIRE 2016 1472 2016 1360
WIRE 2016 1472 1984 1472
WIRE 2128 1472 2016 1472
WIRE 2224 1472 2128 1472
WIRE 2272 1472 2224 1472
WIRE 2320 1472 2272 1472
WIRE 2016 1488 2016 1472
WIRE 2128 1488 2128 1472
WIRE 2224 1488 2224 1472
WIRE 2320 1488 2320 1472
WIRE 1488 1584 1488 1472
WIRE 1552 1584 1488 1584
WIRE 2016 1584 2016 1568
WIRE 2016 1584 1872 1584
WIRE 2128 1584 2128 1552
WIRE 2128 1584 2016 1584
WIRE 2224 1584 2224 1552
WIRE 2320 1584 2320 1568
WIRE 2016 1600 2016 1584
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
WIRE 2016 1696 2016 1680
SYMBOL RES 2000 1472 R0
SYMATTR InstName R1
SYMATTR Value 47.5K
SYMBOL cap 2112 1488 R0
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL ind 1888 1488 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150n
SYMATTR SpiceLine Rser=2m
SYMBOL res 2000 1584 R0
SYMATTR InstName R2
SYMATTR Value 18.2K
SYMBOL res 1472 1248 R0
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL LTC3303C-05 1712 1456 R0
SYMATTR InstName U2
SYMBOL cap 1408 1376 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 2304 1472 R0
SYMATTR InstName Rload
SYMATTR Value 0.45
SYMBOL res 2000 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 500K
SYMBOL VOLTAGE 1360 1248 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2208 1488 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 m=3
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=10m
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1360 1360 0
FLAG 2320 1584 0
FLAG 2016 1696 0
FLAG 2224 1584 0
FLAG 1392 1248 IN
FLAG 2272 1472 OUT
FLAG 1424 1456 0
TEXT 2200 1696 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2fdf4fe4a2d7_circuito_extremos.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N001 + - Out LMX24_LM2902 ;pnba In+)In-)V+)V-)OUT
R2 Out N002 100k
R11 N001 N003 1Meg
V4 0 - 10
R1 N002 N001 100k
V2 N004 0 SINE(0 1 1k) AC 0 Rser=50
V3 + 0 10
R12 N001 N004 1Meg
V1 N003 0 SINE(0 1 1k) Rser=50
R3 0 N002 330
.include LM324.lib
.tran 0 4m 0 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1556 1528
WIRE 16 -64 -16 -64
WIRE 128 -64 96 -64
WIRE 160 -64 128 -64
WIRE 256 -64 240 -64
WIRE 928 -64 928 -96
WIRE 1024 -64 928 -64
WIRE 128 -48 128 -64
WIRE 1024 -48 1024 -64
WIRE 928 -32 928 -64
WIRE 128 48 128 32
WIRE -160 96 -304 96
WIRE -16 96 -16 -64
WIRE -16 96 -80 96
WIRE 160 96 -16 96
WIRE -304 112 -304 96
WIRE 256 112 256 -64
WIRE 256 112 224 112
WIRE 288 112 256 112
WIRE 160 128 128 128
WIRE -160 160 -208 160
WIRE -16 160 -16 96
WIRE -16 160 -80 160
WIRE -208 176 -208 160
WIRE -304 224 -304 192
WIRE 128 272 128 128
WIRE -208 304 -208 256
IOPIN 288 112 Out
SYMBOL res 256 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL voltage -208 160 R0
WINDOW 3 24 152 Left 2
WINDOW 123 24 180 Left 2
WINDOW 39 24 124 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 1 1k)
SYMATTR Value2 AC 0
SYMATTR SpiceLine Rser=50
SYMBOL res 112 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage 928 -192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL res 144 48 R180
WINDOW 0 43 45 Left 2
WINDOW 3 33 17 Left 2
SYMATTR InstName R3
SYMATTR Value 330
SYMBOL res -64 80 R90
WINDOW 0 -24 59 VBottom 2
WINDOW 3 -3 54 VBottom 2
SYMATTR InstName R11
SYMATTR Value 1Meg
SYMBOL voltage 928 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 10
SYMBOL OpAmps\\opamp2 192 48 R0
SYMATTR InstName U1
SYMATTR Value LMX24_LM2902
SYMBOL voltage -304 96 R0
WINDOW 3 -129 143 Left 2
WINDOW 123 -129 143 Left 2
WINDOW 39 -129 115 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1k)
SYMATTR SpiceLine Rser=50
SYMBOL res -64 144 R90
WINDOW 0 55 37 VBottom 2
WINDOW 3 85 30 VBottom 2
SYMATTR InstName R12
SYMATTR Value 1Meg
FLAG 288 112 Out
FLAG 192 80 +
FLAG 192 144 -
FLAG 928 -176 +
FLAG -304 224 0
FLAG -208 304 0
FLAG 1024 -48 0
FLAG 128 48 0
FLAG 128 272 0
FLAG 928 48 -
TEXT 816 -240 Left 2 !.include LM324.lib
TEXT -432 368 Left 2 !.tran 0 4m 0 1m
* Z:\tmp\asc_dec_bjh7r6w2\1a28c5144d1e_fig-02-05-15_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
VP1 VINN 0 SINE(0 0.5 1k)
XU2 0 N003 VCC VEE VOUTN level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
VS1 VCC 0 5
VS2 0 VEE 5
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1332 680
WIRE 16 -272 -16 -272
WIRE 16 -240 16 -272
WIRE 16 -240 -80 -240
WIRE 48 -240 16 -240
WIRE -80 -176 -80 -240
WIRE 400 -112 400 -240
WIRE 400 -112 288 -112
WIRE 224 -96 160 -96
WIRE 752 -64 752 -96
WIRE -80 -48 -80 -96
WIRE 0 -48 -80 -48
WIRE 160 -48 160 -96
WIRE 160 -48 112 -48
WIRE 256 -48 256 -80
WIRE 704 -48 656 -48
WIRE 256 -32 256 -48
WIRE 0 0 0 -48
WIRE 112 0 112 -48
WIRE 704 0 656 0
WIRE 256 16 256 0
WIRE -80 32 -80 -48
WIRE 256 48 256 16
WIRE 752 48 752 16
WIRE 160 64 160 -48
WIRE 224 64 160 64
WIRE 400 80 288 80
WIRE 224 96 160 96
WIRE 624 96 624 80
WIRE 688 96 688 80
WIRE 256 144 256 112
WIRE 624 144 624 96
WIRE 688 144 688 96
WIRE 256 160 256 144
WIRE 160 208 160 96
WIRE 160 208 128 208
WIRE 272 208 160 208
WIRE 400 208 400 80
WIRE 400 208 352 208
WIRE 432 208 400 208
WIRE 624 240 624 224
WIRE 688 240 688 224
SYMBOL voltage -80 -192 R0
WINDOW 0 31 26 Bottom 2
WINDOW 3 87 111 Bottom 2
WINDOW 123 35 89 Top 2
WINDOW 39 0 0 Left 0
SYMATTR InstName VP1
SYMATTR Value SINE(0 0.5 1k)
SYMBOL Opamps\\UniversalOpamp2 256 80 M180
SYMATTR InstName U2
SYMBOL Misc\\battery 688 128 R0
WINDOW 0 17 6 Left 2
WINDOW 3 17 95 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS1
SYMATTR Value 5
SYMBOL Misc\\battery 624 240 R180
WINDOW 0 24 104 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS2
SYMATTR Value 5
FLAG 624 240 0
FLAG 688 240 0
FLAG 624 96 VEE
FLAG 688 96 VCC
FLAG 256 16 VEE
FLAG 432 208 VOUTN
FLAG -16 -272 VINN
FLAG 752 48 0
FLAG 656 0 VINP
FLAG 656 -48 VINN
FLAG 256 -48 VEE
FLAG 256 144 VCC
FLAG 112 0 0
FLAG 0 0 0
* Z:\home\khalils\Downloads\files\data\raw_asc\56e9d143b81a_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
* MOSFET: Transfer Output Characteristics
* ketaki mahajan / A-3 / 16014022050
R1 G N002 100k
R2 N001 D 1k
M1 D G 0 0 NMOS1
VGG N002 0
VDD N001 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model NMOS1 NMOS(Vto=1V L=1um W=1um)
.dc VDD 0 15 0.1 VGG 0 4 0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1756 680
WIRE 640 -144 464 -144
WIRE 800 -144 720 -144
WIRE 464 -96 464 -144
WIRE 464 -48 464 -96
WIRE 208 32 48 32
WIRE 336 32 288 32
WIRE 416 32 336 32
WIRE 800 64 800 -144
WIRE 48 144 48 32
WIRE 464 144 464 48
WIRE 48 352 48 224
WIRE 464 352 464 144
WIRE 464 352 48 352
WIRE 800 352 800 144
WIRE 800 352 464 352
WIRE 464 400 464 352
SYMBOL res 736 -160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 800 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value ""
SYMBOL res 304 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage 48 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGG
SYMATTR Value ""
SYMBOL nmos 416 -48 R0
SYMATTR InstName M1
SYMATTR Value NMOS1
FLAG 464 400 0
FLAG 464 144 S
FLAG 464 -96 D
FLAG 336 32 G
TEXT 968 -144 Left 2 !.model NMOS1 NMOS(Vto=1V L=1um W=1um)
TEXT 968 -96 Left 2 !.dc VDD 0 15 0.1 VGG 0 4 0.5
TEXT 224 -240 Left 2 ;MOSFET: Transfer Output Characteristics
TEXT 976 -48 Left 2 ;ketaki mahajan / A-3 / 16014022050
* Z:\home\khalils\Downloads\files\data\raw_asc\1700c48e6529_photodiode.asc
* Generated by LTspice 26.0.1 for Windows.
Rsh Cathode N001 {Rsh}
Rs N001 Anode {Rs}
GIph Cathode N001 +Vl -Vl .5
D1 N001 Cathode PDBC156
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.MODEL PDBC156 D(IS=3.1e-12 N=1.03 RS=0 KF=0.01 Cjo={Cjo} M=0.13 + Vj={Vj} BV={BV})
.param Rs=3 Rsh=150MEG Cjo=10p BV=50 Vj=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2040 680
WIRE 496 64 448 64
WIRE 592 64 496 64
WIRE 656 64 592 64
WIRE 448 112 448 64
WIRE 448 112 272 112
WIRE 272 128 272 112
WIRE 448 128 448 112
WIRE 496 128 496 64
WIRE 224 144 160 144
WIRE 224 192 160 192
WIRE 272 224 272 208
WIRE 448 224 448 192
WIRE 448 224 272 224
WIRE 448 240 448 224
WIRE 496 240 496 208
WIRE 496 240 448 240
WIRE 576 240 496 240
WIRE 688 240 656 240
SYMBOL res 560 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -6 55 VBottom 2
SYMATTR InstName Rs
SYMATTR Value {Rs}
SYMBOL res 480 112 R0
SYMATTR InstName Rsh
SYMATTR Value {Rsh}
SYMBOL diode 464 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value PDBC156
SYMBOL g 272 224 M180
SYMATTR InstName Iph
SYMATTR Value .5
FLAG 592 64 Cathode
FLAG 688 240 Anode
FLAG 160 144 -Vl
FLAG 160 192 +Vl
TEXT 64 400 Left 1 !.MODEL PDBC156 D(IS=3.1e-12 N=1.03 RS=0 KF=0.01 Cjo={Cjo} M=0.13 + Vj={Vj} BV={BV})
TEXT 64 376 Left 2 !.param Rs=3 Rsh=150MEG Cjo=10p BV=50 Vj=1
* Z:\home\khalils\Downloads\files\data\raw_asc\280a23567f45_6103.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6103.asy)
R6 N001 N004 100
R3 OUT2 0 4.99K
Iload1 N002 0 SINE(2 1 10)
R2 N001 N005 100
V1 N001 0 50
R1 N003 N001 1m
R4 OUT1 0 4.99K
Iload2 N003 0 SINE(2 1 20)
R5 N001 N002 1m
XU1 OUT1 OUT2 0 N003 N005 N004 N002 LTC6103 ;pnba OUTA)OUTB)V-)+INB)-INB)-INA)+INA
.tran 300m
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1348 680
WIRE 464 -128 -16 -128
WIRE -16 -112 -16 -128
WIRE 304 -80 112 -80
WIRE 320 -80 304 -80
WIRE 416 -80 400 -80
WIRE 464 -80 464 -128
WIRE 464 -80 416 -80
WIRE 512 -80 464 -80
WIRE 528 -80 512 -80
WIRE 624 -80 608 -80
WIRE 752 -80 624 -80
WIRE 112 -64 112 -80
WIRE 752 -64 752 -80
WIRE 416 -48 416 -80
WIRE 512 -48 512 -80
WIRE -16 -16 -16 -32
WIRE 112 32 112 16
WIRE 752 32 752 16
WIRE 304 48 304 -80
WIRE 416 48 416 32
WIRE 512 48 512 32
WIRE 624 48 624 -80
WIRE 416 320 416 304
WIRE 416 320 144 320
WIRE 464 320 464 304
WIRE 512 320 512 304
WIRE 752 320 512 320
WIRE 144 336 144 320
WIRE 752 336 752 320
WIRE 144 432 144 416
WIRE 752 432 752 416
SYMBOL res 736 320 R0
SYMATTR InstName R3
SYMATTR Value 4.99K
SYMBOL current 112 -64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Iload1
SYMATTR Value SINE(2 1 10)
SYMBOL res 128 320 R0
SYMATTR InstName R4
SYMATTR Value 4.99K
SYMBOL res 400 -64 R0
SYMATTR InstName R6
SYMATTR Value 100
SYMBOL current 752 -64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Iload2
SYMATTR Value SINE(2 1 20)
SYMBOL res 496 -64 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL LTC6103 464 160 R0
SYMATTR InstName U1
SYMBOL res 416 -96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1m
SYMBOL voltage -16 -128 R0
WINDOW 3 26 96 Left 2
SYMATTR Value 50
SYMATTR InstName V1
SYMBOL res 624 -96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1m
FLAG 112 32 0
FLAG 464 320 0
FLAG 752 432 0
FLAG 144 432 0
FLAG 752 32 0
FLAG -16 -16 0
FLAG 144 320 OUT1
FLAG 752 320 OUT2
TEXT 880 432 Left 2 !.tran 300m
* Z:\home\khalils\Downloads\files\data\raw_asc\0d121eeba1b6_ADA4000-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4000-1.asy)
Vin IN 0 SINE(0 1 500K)
V2 -V 0 -15
XU1 IN N001 +V -V OUT ADA4000 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
R1 N001 0 10K
R2 OUT N001 10K
.tran 20u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 736 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 432 -976 432 -992
SYMBOL Opamps\\ADA4000-1 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 500K)
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 144 -1168 +V
FLAG 432 -976 0
FLAG 736 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 256 -1056 0
FLAG 144 -1056 0
TEXT 744 -984 Left 2 !.tran 20u
* Z:\home\khalils\Downloads\files\data\raw_asc\f5c7bf9ca7f6_Draft7.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 N001 1N4148
V1 N001 0 SINE(0 1 1k)
D3 0 N003 1N4148
D4 N001 N003 1N4148
R1 N003 N002 1000k
D2 N002 0 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1716 680
WIRE 240 32 16 32
WIRE 240 96 240 32
WIRE 240 96 144 96
WIRE 368 96 240 96
WIRE 16 144 16 32
WIRE 144 176 144 160
WIRE 144 176 96 176
WIRE 368 176 368 160
WIRE 464 176 368 176
WIRE 544 176 464 176
WIRE 144 192 144 176
WIRE 368 192 368 176
WIRE 256 256 144 256
WIRE 368 256 256 256
WIRE 464 256 432 256
WIRE 544 256 464 256
WIRE 96 304 96 176
WIRE 432 304 432 256
WIRE 432 304 96 304
WIRE 16 336 16 224
WIRE 176 336 16 336
WIRE 256 336 256 256
WIRE 256 336 176 336
SYMBOL res 448 160 R0
SYMATTR InstName R1
SYMATTR Value 1000k
SYMBOL diode 384 256 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL voltage 16 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1k)
SYMBOL diode 128 192 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL diode 352 96 R0
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL diode 160 160 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG 176 336 0
TEXT -16 360 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\b96ae1f6b705_IRFPE50_Cxss.asc
* Generated by LTspice 26.0.1 for Windows.
* MOSFET Capacitances Versus Drain-Source Voltage
+CGDMIN=100p CJO=3990p Vj=0.75 M=0.6595 CGS=2610p N=1 IS=1.00E-06 RB=0.1781 TT=936n)
M2 d2 N002 0 0 IRFPE50
V2 N001 0 0 AC 0
V4 N002 0 0 AC 1
H2 Crss 0 V2 -1e-3
H3 Ciss 0 V4 -1e-3
V3 d2 0 { VDS} AC 0
V1 d1 0 { VDS} AC 1
H1 Coss 0 V1 -1e-3
M1 d1 N001 0 0 IRFPE50
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.MODEL IRFPE50 VDMOS(KP=3.3362 RS=0.0114 RD=1.1438 RG=1.0 VTO=3.31 CGDMAX=6810p
.step param VDS 0.1 25 0.1
.ac list {1e3/2/pi} ; jw=1e3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1084 788
WIRE 512 96 480 96
WIRE 176 112 112 112
WIRE 256 112 176 112
WIRE 480 128 480 96
WIRE 112 144 112 112
WIRE 64 224 -16 224
WIRE 256 224 256 112
WIRE -16 240 -16 224
WIRE 480 240 480 208
WIRE 512 304 480 304
WIRE -16 336 -16 320
WIRE 112 336 112 240
WIRE 256 336 256 304
WIRE 480 336 480 304
WIRE 176 432 112 432
WIRE 256 432 176 432
WIRE 480 448 480 416
WIRE 112 464 112 432
WIRE 512 512 480 512
WIRE 64 544 -16 544
WIRE 256 544 256 432
WIRE 480 544 480 512
WIRE -16 560 -16 544
WIRE -16 656 -16 640
WIRE 112 656 112 560
WIRE 256 656 256 624
WIRE 480 656 480 624
SYMBOL voltage -16 224 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL h 480 320 R0
SYMATTR InstName H2
SYMATTR Value V2 -1e-3
SYMBOL h 480 528 R0
SYMATTR InstName H3
SYMATTR Value V4 -1e-3
SYMBOL h 480 112 R0
SYMATTR InstName H1
SYMATTR Value V1 -1e-3
SYMBOL voltage 256 528 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 0
SYMATTR InstName V3
SYMATTR Value { VDS}
SYMBOL NMOS 64 144 R0
SYMATTR InstName M1
SYMATTR Value IRFPE50
SYMBOL voltage -16 544 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V4
SYMATTR Value 0
SYMBOL voltage 256 208 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value { VDS}
SYMBOL NMOS 64 464 R0
SYMATTR InstName M2
SYMATTR Value IRFPE50
FLAG 112 336 0
FLAG -16 336 0
FLAG 256 336 0
FLAG 176 112 d1
FLAG 112 656 0
FLAG -16 656 0
FLAG 256 656 0
FLAG 176 432 d2
FLAG 480 240 0
FLAG 480 448 0
FLAG 480 656 0
FLAG 512 96 Coss
FLAG 512 304 Crss
FLAG 512 512 Ciss
TEXT -376 -8 Left 0 !.MODEL IRFPE50 VDMOS(KP=3.3362 RS=0.0114 RD=1.1438 RG=1.0 VTO=3.31 CGDMAX=6810p\n+CGDMIN=100p CJO=3990p Vj=0.75 M=0.6595 CGS=2610p N=1 IS=1.00E-06 RB=0.1781 TT=936n)
TEXT -376 96 Left 0 !.step param VDS 0.1 25 0.1
TEXT -376 120 Left 0 !.ac list {1e3/2/pi} ; jw=1e3
TEXT -368 -80 Left 0 ;MOSFET Capacitances Versus Drain-Source Voltage
* Z:\home\khalils\Downloads\files\data\raw_asc\6a2fba6b1e07_Draft56.asc
* Generated by LTspice 26.0.1 for Windows.
* bootstrapping the emitters, still leaves voltage offset at the base\nand some leakage.
* there's a voltage offset of 0.57V or so.\n \n10G we get -9pA leakaage\n1G get -9pA.\n100Meg -9pA.
* bootstrap
* signal impedance
* DOES NOT MAKE SENSE.\njust pulling a opto-led again a low-imipedance diode clamp\nwill be just as strong,
V1 N001 0 5
V2 VCC 0 15
R2 N002 N001 100G
V3 0 VEE 15
R1 N003 N001 100k
Q3 VCC N002 N003 0 2N3904
Q4 VEE N002 N003 0 2N3906
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1904 680
WIRE 48 -96 -16 -96
WIRE 464 -96 128 -96
WIRE -192 80 -272 80
WIRE 384 80 352 80
WIRE -272 96 -272 80
WIRE -192 96 -192 80
WIRE -16 128 -16 -96
WIRE 48 128 -16 128
WIRE 288 128 128 128
WIRE 384 128 384 80
WIRE 464 128 464 -96
WIRE 464 128 384 128
WIRE 480 128 464 128
WIRE 384 176 384 128
WIRE 384 176 352 176
WIRE -16 368 -16 128
SYMBOL voltage -272 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL res 144 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100G
SYMBOL res 144 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL npn 352 32 M0
SYMATTR InstName Q3
SYMATTR Value 2N3904
SYMBOL voltage -272 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 48 40 Left 2
SYMATTR Value 15
SYMATTR InstName V2
SYMBOL voltage -16 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 48 40 Left 2
SYMATTR Value 5
SYMATTR InstName V1
SYMBOL pnp 352 224 R180
SYMATTR InstName Q4
SYMATTR Value 2N3906
FLAG -192 96 0
FLAG -272 0 VCC
FLAG -272 176 VEE
FLAG 288 32 VCC
FLAG 288 224 VEE
FLAG -16 448 0
TEXT -456 304 Left 2 !.tran 1ms
TEXT -1144 -8 Left 2 ;bootstrapping the emitters, still leaves voltage offset at the base\nand some leakage.
TEXT 592 -40 Left 2 ;there's a voltage offset of 0.57V or so.\n \n10G we get -9pA leakaage\n1G get -9pA.\n100Meg -9pA.
TEXT 40 64 Left 2 ;bootstrap
TEXT 40 -160 Left 2 ;signal impedance
TEXT 624 -168 Left 2 ;DOES NOT MAKE SENSE.\njust pulling a opto-led again a low-imipedance diode clamp\nwill be just as strong,
* Z:\home\khalils\Downloads\files\data\raw_asc\bd5f8e79d085_Low_Pass.asc
* Generated by LTspice 26.0.1 for Windows.
R1 out N001 10k
V_in N001 0 AC 1
C1 out 0 2.65n
.ac dec 100 1 100k
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 208 48 96 48
WIRE 416 48 288 48
WIRE 464 48 416 48
WIRE 96 144 96 48
WIRE 416 144 416 48
WIRE 96 272 96 224
WIRE 416 272 416 208
IOPIN 464 48 Out
SYMBOL res 304 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 96 128 R0
SYMATTR InstName V_in
SYMATTR Value AC 1
SYMBOL cap 400 144 R0
SYMATTR InstName C1
SYMATTR Value 2.65n
FLAG 96 272 0
FLAG 416 272 0
FLAG 464 48 out
TEXT 520 136 Left 2 !.ac dec 100 1 100k
* Z:\home\khalils\Downloads\files\data\raw_asc\307ddbcf3f6f_Fig4_6.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Vin, Vout1, and Vout2
O1 Vin 0 Vout1 0 poly_nosilicide
O2 Vin 0 Vout2 0 poly_silicide
Vin Vin 0 PULSE(0 1 50p)
Rload1 Vout1 0 1G
Rload2 Vout2 0 1G
.model poly_nosilicide ltra R=200 C=9e-18 len=1000
.model poly_silicide ltra R=5 C=9e-18 len=1000
.tran 2500p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 688
WIRE -160 304 -160 288
WIRE -112 208 -160 208
WIRE -112 464 -160 464
WIRE -96 288 -96 240
WIRE -96 544 -96 496
WIRE -48 208 -112 208
WIRE -48 240 -96 240
WIRE -48 464 -112 464
WIRE -48 496 -96 496
WIRE 96 240 48 240
WIRE 96 288 96 240
WIRE 96 496 48 496
WIRE 96 544 96 496
WIRE 112 208 48 208
WIRE 112 464 48 464
WIRE 160 208 112 208
WIRE 160 304 160 288
WIRE 160 464 112 464
WIRE 160 560 160 544
SYMBOL ltline 0 224 R0
SYMATTR InstName O1
SYMATTR Value poly_nosilicide
SYMBOL res 144 448 R0
SYMATTR InstName Rload2
SYMATTR Value 1G
SYMBOL res 144 192 R0
SYMATTR InstName Rload1
SYMATTR Value 1G
SYMBOL ltline 0 480 R0
SYMATTR InstName O2
SYMATTR Value poly_silicide
SYMBOL voltage -160 192 R0
WINDOW 0 -72 57 Left 0
WINDOW 3 -198 96 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(0 1 50p)
FLAG -160 304 0
FLAG -96 288 0
FLAG 96 288 0
FLAG 160 304 0
FLAG -112 208 Vin
FLAG 112 208 Vout1
FLAG -96 544 0
FLAG 96 544 0
FLAG 160 560 0
FLAG -112 464 Vin
FLAG 112 464 Vout2
TEXT -248 360 Left 0 !.model poly_nosilicide ltra R=200 C=9e-18 len=1000\n.model poly_silicide ltra R=5 C=9e-18 len=1000
TEXT -64 320 Left 0 !.tran 2500p
TEXT -96 144 Left 0 ;Plot Vin, Vout1, and Vout2
* Z:\tmp\asc_dec_bjh7r6w2\085024c4c043_SM881K04L_Model_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R3 0 N001 R=rsh_t
R2 vout N001 R=rs_t
B1 0 N001 I=ipv_t*V(illu)/1000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1892 756
WIRE 976 80 640 80
WIRE 1280 80 976 80
WIRE 1408 80 1280 80
WIRE 1584 80 1488 80
WIRE 1616 80 1584 80
WIRE 640 144 640 80
WIRE 1616 144 1616 80
WIRE 1280 160 1280 80
WIRE 640 288 640 224
WIRE 1280 288 1280 240
WIRE 1616 304 1616 224
SYMBOL res 1296 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value R=rsh_t
SYMBOL res 1504 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value R=rs_t
SYMBOL bi2 640 144 R0
SYMATTR InstName B1
SYMATTR Value I=ipv_t*V(illu)/1000
FLAG 1280 288 0
FLAG 640 288 0
FLAG 1584 80 vout