Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_mix_bvbm4pog\mix_254.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 10 Rser=.1
Rload OUT 0 500
XU1 IN IN 0 OUT OUT LT1764-1.8 ;pnba _SHDN)IN)GND)OUT)Sense
M1 N004 N005 0 N006 NMOS l=0.18u w=18u
M2 Vout N002 N004 N003 NMOS l=0.36u w=18u
RD N001 Vout 8000
VDD N001 0 3.3
VB N002 0 1.1
VIN N005 0 V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1
.model NMOS NMOS (LEVEL=1 KP=150u VTO=0.5 LAMBDA=0 GAMMA=0 PHI=0.6)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1764A-1.8.asy)
.lib LT1764.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1424 496
WIRE 0 48 -224 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 512 48 384 48
WIRE -224 64 -224 48
WIRE 384 64 384 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -224 160 -224 144
WIRE 384 160 384 128
WIRE 512 160 512 144
WIRE 160 240 160 208
WIRE 1040 -256 944 -256
WIRE 1040 -128 1040 -176
WIRE 1040 -96 1040 -128
WIRE 992 -16 896 -16
WIRE 1040 -16 1040 -48
WIRE 1040 32 1040 0
WIRE 992 112 896 112
WIRE 1040 112 1040 80
WIRE 1040 128 1040 128
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 368 64 R0
WINDOW 39 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=.1
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT1764A-1.8 160 96 R0
SYMATTR InstName U1
SYMBOL nmos4 992 32 R0
SYMATTR InstName M1
SYMATTR Value2 l=0.18u w=18u
SYMBOL nmos4 992 -96 R0
SYMATTR InstName M2
SYMATTR Value2 l=0.36u w=18u
SYMBOL res 1024 -272 R0
SYMATTR InstName RD
SYMATTR Value 8000
SYMBOL voltage 944 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 3.3
SYMBOL voltage 896 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value 1.1
SYMBOL voltage 896 96 R0
SYMATTR InstName VIN
FLAG -224 160 0
FLAG 384 160 0
FLAG 512 160 0
FLAG 160 240 0
FLAG -224 48 IN
FLAG 512 48 OUT
FLAG 1040 128 0
FLAG 896 64 0
FLAG 896 192 0
FLAG 944 -176 0
FLAG 1040 -128 Vout
TEXT 360 248 Left 2 !.tran 1
TEXT -88 -384 Left 2 !.dc VIN 0 3.3 0.01
TEXT -88 -360 Left 2 !.model NMOS NMOS (LEVEL=1 KP=150u VTO=0.5 LAMBDA=0 GAMMA=0 PHI=0.6)
* Z:\home\khalils\Downloads\files\data\raw_asc\28e09038af56_meros_1o__e_.asc
* Generated by LTspice 26.0.1 for Windows.
I2 vdd N001 1m
V2 vout 0 AC 1
V1 vdd 0 10
Q5 N001 N001 0 0 2N3904
Q4 vout N001 0 0 2N3904
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc dec V2 1 9 0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 992 680
WIRE 96 64 96 32
WIRE 752 144 752 48
WIRE 912 144 912 48
WIRE 96 208 96 144
WIRE 192 208 96 208
WIRE 96 240 96 208
WIRE 320 240 320 32
WIRE 192 288 192 208
WIRE 192 288 160 288
WIRE 256 288 192 288
WIRE 752 384 752 224
WIRE 912 384 912 224
WIRE 96 432 96 336
WIRE 320 432 320 336
SYMBOL voltage 752 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL current 96 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I2
SYMATTR Value 1m
SYMBOL npn 160 240 M0
SYMATTR InstName Q5
SYMATTR Value 2N3904
SYMBOL npn 256 240 R0
SYMATTR InstName Q4
SYMATTR Value 2N3904
SYMBOL voltage 912 128 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V2
SYMATTR Value ""
FLAG 752 384 0
FLAG 912 384 0
FLAG 320 432 0
FLAG 96 432 0
FLAG 96 32 vdd
FLAG 752 48 vdd
FLAG 320 32 vout
FLAG 912 48 vout
TEXT 12 456 Left 2 !.dc dec V2 1 9 0.5
* Z:\tmp\asc_dec_bjh7r6w2\15a35902961b_MesnyOscillator1_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
C3 N004 N001 47p
XU1 N001 N003 0 12AU7 12AU7 ;pnba Plate)Grid)Cathode
L1 N005 N007 110nH
L2 N007 N006 110nH
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1012
WIRE 0 144 -96 144
WIRE 464 144 384 144
WIRE 0 176 0 144
WIRE 384 176 384 144
WIRE 80 224 48 224
WIRE 336 224 320 224
WIRE 32 320 32 272
WIRE 352 320 352 272
WIRE -96 352 -96 144
WIRE 224 352 -96 352
WIRE 320 352 320 224
WIRE 320 352 288 352
WIRE 80 416 80 224
WIRE 96 416 80 416
WIRE 464 416 464 144
WIRE 464 416 160 416
WIRE 80 464 80 416
WIRE 320 464 320 352
WIRE 464 512 464 416
WIRE -96 528 -96 352
WIRE 176 688 96 688
WIRE 320 688 240 688
WIRE 96 800 96 688
WIRE 96 800 -96 800
WIRE 128 800 96 800
WIRE 320 800 320 688
WIRE 320 800 288 800
WIRE 464 800 320 800
WIRE 208 880 208 800
WIRE 208 992 208 960
SYMBOL cap 288 336 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 47p
SYMBOL Misc\\triode 0 224 M0
SYMATTR InstName U1
SYMATTR Value 12AU7
SYMATTR SpiceModel 12AU7
SYMBOL ind 112 816 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 110nH
SYMBOL ind 192 816 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 110nH
FLAG 32 320 0
FLAG 352 320 0
FLAG 208 992 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1762.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1762.asy)
C2 N003 0 10n
C4 OUT 0 10
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1762 Radj=1T ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
R2 N001 IN 50K
R3 N005 0 10K
C1 N004 0 1
C3 N002 0 1
R1 OUT 0 1
V1 IN 0 1.8
.tran 1m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 464 320 448 320
WIRE 224 384 224 368
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL res 352 336 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL ADP1762 224 176 R0
WINDOW 0 0 -64 Center 2
WINDOW 3 0 64 Center 2
SYMATTR InstName U1
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value 1
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 320 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT4423.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT4423.asy)
R1 OUT 0 1
XU1 IN IN OUT NC_01 0 LT4423 ;pnba SHDN#)IN)OUT)STATUS)GND
V1 IN 0 12
C1 IN 0 0.1
C2 OUT 0 47
.tran 1m startup
.lib LT4423.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -192 96 -208 96
WIRE -96 96 -192 96
WIRE -32 96 -96 96
WIRE 16 96 -32 96
WIRE 608 96 480 96
WIRE 688 96 608 96
WIRE 720 96 688 96
WIRE -208 144 -208 96
WIRE 608 144 608 96
WIRE 720 144 720 96
WIRE -96 160 -96 96
WIRE -32 176 -32 96
WIRE 16 176 -32 176
WIRE 608 256 608 208
WIRE 720 256 720 224
WIRE -208 272 -208 224
WIRE -96 272 -96 224
WIRE 240 336 240 272
SYMBOL cap 592 144 R0
SYMATTR InstName C2
SYMATTR Value 47
SYMBOL LT4423 240 160 R0
SYMATTR InstName U1
SYMBOL res 704 128 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL cap -112 160 R0
SYMATTR InstName C1
SYMATTR Value 0.1
SYMBOL voltage -208 128 R0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 240 336 0
FLAG -96 272 0
FLAG 608 256 0
FLAG -208 272 0
FLAG -192 96 IN
FLAG 688 96 OUT
FLAG 720 256 0
TEXT -216 360 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3c18c87d7485_CircuitBouchon4.asc
* Generated by LTspice 26.0.1 for Windows.
;.step param freq 1000 24000 2000
; .param freq=50000
L1 OUT2 0 .01
C1 OUT2 0 10n
V1 N001 0 AC 1 0
R1 OUT2 N001 5
.ac dec 100 1e3 1e6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 80 48 80
WIRE 304 80 208 80
WIRE 432 80 304 80
WIRE 736 80 432 80
WIRE 432 128 432 80
WIRE 48 144 48 80
WIRE 304 144 304 80
WIRE 48 256 48 224
WIRE 128 256 48 256
WIRE 304 256 304 208
WIRE 304 256 128 256
WIRE 432 256 432 208
WIRE 432 256 304 256
WIRE 128 272 128 256
SYMBOL ind 416 112 R0
SYMATTR InstName L1
SYMATTR Value .01
SYMBOL voltage 48 128 R0
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value2 AC 1 0
SYMATTR Value ""
SYMATTR InstName V1
SYMBOL cap 288 144 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 224 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5
FLAG 128 272 0
FLAG 736 80 OUT2
TEXT 40 344 Left 2 !;.step param freq 1000 24000 2000\n; .param freq=50000
TEXT 208 296 Left 2 !.ac dec 100 1e3 1e6
* Z:\home\khalils\Downloads\files\data\raw_asc\26cc0b9fd7d2_Ideal_clocked_comparator.asc
* Generated by LTspice 26.0.1 for Windows.
E1 diff 0 Vinp Vinm 1
C1 sample 0 100p
C2 hold 0 100p
B1 Vout 0 V=v(hold)>0?v(vdd):0
E2 N001 0 sample 0 1
Etp tp 0 Vdd 0 0.5
S4 hold N001 Clock tp switch
S3 sample diff tp Clock switch
.model switch SW
.ic v(hold)=1 v(sample)=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 6308 700
WIRE 800 -352 800 -368
WIRE 752 -336 720 -336
WIRE 752 -272 752 -288
WIRE 800 -272 752 -272
WIRE 800 -256 800 -272
WIRE 1616 -176 1616 -208
WIRE 1760 -112 1664 -112
WIRE 1664 -96 1664 -112
WIRE 656 -80 640 -80
WIRE 704 -80 656 -80
WIRE 864 -80 784 -80
WIRE 960 -80 864 -80
WIRE 1104 -80 1008 -80
WIRE 1248 -80 1184 -80
WIRE 1360 -80 1248 -80
WIRE 640 -64 640 -80
WIRE 864 -64 864 -80
WIRE 1008 -64 1008 -80
WIRE 1248 -64 1248 -80
WIRE 592 -48 560 -48
WIRE 960 -48 960 -80
WIRE 592 0 560 0
WIRE 1664 0 1664 -16
WIRE 864 16 864 0
WIRE 960 16 960 0
WIRE 1008 16 960 16
WIRE 1248 16 1248 0
WIRE 1008 32 1008 16
IOPIN 1760 -112 Out
IOPIN 1616 -208 Out
IOPIN 560 -48 In
IOPIN 560 0 In
SYMBOL cap 848 -64 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL sw 1200 -80 M270
WINDOW 3 24 -12 Left 0
WINDOW 38 39 37 Left 0
WINDOW 0 35 82 Left 0
SYMATTR Value ""
SYMATTR SpiceModel switch
SYMATTR InstName S4
SYMBOL e 1008 -80 R0
WINDOW 0 36 32 Left 0
WINDOW 3 37 73 Left 0
SYMATTR InstName E2
SYMATTR Value 1
SYMBOL bv 1664 -112 R0
SYMATTR InstName B1
SYMATTR Value V=v(hold)>0?v(vdd):0
SYMBOL sw 800 -80 M270
WINDOW 3 24 -12 Left 0
WINDOW 38 39 37 Left 0
WINDOW 0 35 82 Left 0
SYMATTR Value ""
SYMATTR SpiceModel switch
SYMATTR InstName S3
SYMBOL cap 1232 -64 R0
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL e 800 -368 R0
WINDOW 0 36 32 Left 0
WINDOW 3 37 73 Left 0
SYMATTR InstName Etp
SYMATTR Value 0.5
SYMBOL e 640 -80 R0
SYMATTR InstName E1
SYMATTR Value 1
FLAG 1760 -112 Vout
FLAG 1616 -208 VDD
FLAG 560 -48 Vinp
FLAG 768 -32 Clock
FLAG 560 0 Vinm
FLAG 640 16 0
FLAG 864 16 0
FLAG 1248 16 0
FLAG 720 -336 Vdd
FLAG 800 -256 0
FLAG 800 -368 tp
FLAG 720 -32 tp
FLAG 1168 -32 tp
FLAG 656 -80 diff
FLAG 864 -80 sample
FLAG 1248 -80 hold
FLAG 1120 -32 Clock
FLAG 1008 32 0
FLAG 1664 0 0
TEXT 952 152 Left 0 !.model switch SW
TEXT 600 80 Left 0 !.ic v(hold)=1 v(sample)=1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2371-ADJ.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2371-ADJ.asy)
V1 IN 0 12
L1 N002 OUT 10 Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
XU1 IN IN IN IN N002 N003 N001 0 ADP2371-ADJ IPSM=400m Rt=100MEG Rb=100MEG C1=1.6p Rc1=100k R3=5.92k Rshort=100m PD=1 ;pnba FSEL)SYNC)EN)Vin)SW)FB)PG)PGND
R2 OUT N003 232K
Rload OUT 0 20
C1 OUT 0 10
R1 OUT N001 10K
R3 N003 0 44.2K
.tran 500u startup
.lib ADP2371-ADJ.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 904 692
WIRE 160 96 48 96
WIRE 176 96 160 96
WIRE 464 96 400 96
WIRE 640 96 544 96
WIRE 48 112 48 96
WIRE 160 176 160 96
WIRE 176 176 160 176
WIRE 416 176 400 176
WIRE 544 176 496 176
WIRE 640 176 640 96
WIRE 640 176 544 176
WIRE 784 176 640 176
WIRE 784 192 784 176
WIRE 48 208 48 192
WIRE 640 208 640 176
WIRE 160 256 160 176
WIRE 176 256 160 256
WIRE 544 256 544 240
WIRE 544 256 400 256
WIRE 544 272 544 256
WIRE 784 288 784 272
WIRE 160 336 160 256
WIRE 176 336 160 336
WIRE 640 336 640 288
WIRE 640 336 400 336
WIRE 640 352 640 336
WIRE 640 448 640 432
SYMBOL VOLTAGE 48 96 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 560 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL cap 528 176 R0
WINDOW 0 29 15 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 624 192 R0
SYMATTR InstName R2
SYMATTR Value 232K
SYMBOL ind 400 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
SYMBOL ADP2371-ADJ 288 208 R0
SYMATTR InstName U1
SYMBOL res 624 336 R0
SYMATTR InstName R3
SYMATTR Value 44.2K
SYMBOL res 768 176 R0
SYMATTR InstName Rload
SYMATTR Value 20
FLAG 48 208 0
FLAG 48 96 IN
FLAG 544 272 0
FLAG 784 176 OUT
FLAG 640 448 0
FLAG 784 288 0
TEXT 392 416 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\RH27C.asc
* Generated by LTspice 26.0.1 for Windows.
* Low noise, bandwidth limited, AV=10,000 amplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\RH27C.asy)
V3 IN 0 PULSE(0 100u 0 100n 100n 40m 80m)
XU1 IN N001 +V -V OUT RH27C ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -15
R2 N001 0 10
C1 OUT N001 .05
R1 OUT N001 100K
V1 +V 0 15
.tran 200m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1560 680
WIRE 928 144 896 144
WIRE 1056 144 1008 144
WIRE 1088 144 1056 144
WIRE 1216 144 1168 144
WIRE 608 208 608 192
WIRE 736 208 736 192
WIRE 1056 240 1056 144
WIRE 1120 240 1056 240
WIRE 1216 240 1216 144
WIRE 1216 240 1184 240
WIRE 608 304 608 288
WIRE 736 304 736 288
WIRE 1104 320 1104 304
WIRE 1056 336 1056 240
WIRE 1072 336 1056 336
WIRE 1216 352 1216 240
WIRE 1216 352 1136 352
WIRE 1248 352 1216 352
WIRE 1072 368 848 368
WIRE 848 384 848 368
WIRE 1104 400 1104 384
WIRE 848 480 848 464
SYMBOL RH27C 1104 288 R0
SYMATTR InstName U1
SYMBOL voltage 848 368 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 100u 0 100n 100n 40m 80m)
SYMBOL voltage 736 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 1184 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 1024 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL cap 1184 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .05
SYMBOL voltage 608 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
FLAG 608 304 0
FLAG 736 304 0
FLAG 608 192 +V
FLAG 736 192 -V
FLAG 896 144 0
FLAG 848 480 0
FLAG 1248 352 OUT
FLAG 848 368 IN
FLAG 1104 304 +V
FLAG 1104 400 -V
TEXT 1320 512 Left 2 !.tran 200m
TEXT 1000 88 Bottom 2 ;Low noise, bandwidth limited,  AV=10,000 amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\1800f6b44798_1_2-10kohm.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 -5
D2 N002 0 D
R1 N002 N001 10k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -5 15 1
.model D ako: 1N750 Bv=2.7
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 64 96 64
WIRE 352 64 256 64
WIRE 96 128 96 64
WIRE 352 128 352 64
WIRE 96 256 96 208
WIRE 304 256 96 256
WIRE 352 256 352 192
WIRE 352 256 304 256
WIRE 304 272 304 256
SYMBOL zener 336 128 R0
SYMATTR InstName D2
SYMBOL voltage 96 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -5
SYMBOL res 272 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
FLAG 304 272 0
TEXT 64 296 Left 2 !.dc V1 -5 15 1
TEXT 376 64 Left 2 !.model D ako: 1N750 Bv=2.7
* Z:\tmp\asc_dec_bjh7r6w2\19d29c4aee55_variable_zener_npn_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N004 N006 {R1}
B1 Vz 0 V={VzaS}
R5 0 N003 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2456 1188
WIRE 160 64 160 0
WIRE 656 64 656 48
WIRE 864 64 864 48
WIRE 656 160 656 144
WIRE 864 160 864 144
WIRE 160 192 160 144
WIRE 336 192 160 192
WIRE 352 192 336 192
WIRE 160 240 160 192
WIRE 656 272 656 240
WIRE 864 272 864 240
WIRE 160 352 160 320
WIRE 224 352 160 352
WIRE 288 352 224 352
WIRE 160 400 160 352
WIRE 720 432 656 432
WIRE 736 432 720 432
WIRE 656 464 656 432
WIRE 656 576 656 544
SYMBOL res 144 224 R0
SYMATTR InstName R2
SYMATTR Value {R1}
SYMBOL bv 656 448 R0
SYMATTR InstName B1
SYMATTR Value V={VzaS}
SYMBOL res 848 48 R0
SYMATTR InstName R5
SYMATTR Value 1
FLAG 656 272 0
FLAG 656 48 0
FLAG 656 576 0
FLAG 656 432 Vz
FLAG 864 48 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7102-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7102-3.0.asy)
C1 OUT 0 2.2 Rser=1.5m
Rload OUT 0 15
R1 OUT N001 100k
XU1 IN OUT IN N001 OUT 0 ADP7102 Vref=3 ;pnba Vin)Sense)EN)PG)Vout)GND
V1 IN 0 4
.tran 3m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -16 48 -16 32
WIRE 384 128 352 128
WIRE 464 128 464 32
WIRE 464 128 384 128
WIRE 560 128 464 128
WIRE -16 144 -16 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 384 224 384 128
WIRE 384 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
SYMBOL voltage -16 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADP7102-3.0 224 128 R0
SYMATTR InstName U1
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 15
FLAG 224 304 0
FLAG -16 144 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -16 32 IN
FLAG 560 128 OUT
TEXT 432 296 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17291B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17291B.asy)
R3 OUT N002 3.48Meg
C3 OUT 0 4.7
V1 IN 0 3.6
R4 OUT 0 1.2K
L1 IN N001 10
XU2 0 IN IN N001 OUT N002 MAX17291B ;pnba GND)EN)IN)LX)OUT)FB
R5 N002 0 402K
.tran 10m startup
.lib MAX17291B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1416 868
WIRE -32 -48 -96 -48
WIRE 16 -48 -32 -48
WIRE 48 -48 16 -48
WIRE 160 -48 128 -48
WIRE 160 0 160 -48
WIRE -96 16 -96 -48
WIRE 16 64 16 -48
WIRE 48 64 16 64
WIRE 320 64 272 64
WIRE 448 64 320 64
WIRE 512 64 448 64
WIRE 560 64 512 64
WIRE 320 80 320 64
WIRE 560 80 560 64
WIRE 448 96 448 64
WIRE -96 128 -96 96
WIRE 16 176 16 64
WIRE 48 176 16 176
WIRE 320 176 320 160
WIRE 320 176 272 176
WIRE 448 176 448 160
WIRE 560 176 560 160
WIRE 320 192 320 176
WIRE 160 256 160 240
WIRE 320 288 320 272
SYMBOL res 304 176 R0
SYMATTR InstName R5
SYMATTR Value 402K
SYMBOL res 304 64 R0
SYMATTR InstName R3
SYMATTR Value 3.48Meg
SYMBOL res 544 64 R0
SYMATTR InstName R4
SYMATTR Value 1.2K
SYMBOL VOLTAGE -96 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL ind2 32 -32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR Type ind
SYMBOL MAX17291B 160 128 R0
SYMATTR InstName U2
SYMBOL cap 432 96 R0
WINDOW 123 42 54 Left 2
WINDOW 0 41 3 Left 2
WINDOW 3 37 29 Left 2
SYMATTR InstName C3
SYMATTR Value 4.7
FLAG -96 128 0
FLAG 320 288 0
FLAG 448 176 0
FLAG 560 176 0
FLAG -32 -48 IN
FLAG 512 64 OUT
FLAG 160 256 0
TEXT 104 344 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2fd9edd809e1_Draft12.asc
* Generated by LTspice 26.0.1 for Windows.
R2 v+ N001 10k
V2 N003 0 {V}
R1 N002 N003 10k
Q1 N002 0 N001 0 PNP
V1 v+ 0 12
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 10m
.step param V 0 12 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1032 680
WIRE 112 128 112 80
WIRE 112 256 112 208
WIRE 480 288 480 240
WIRE 48 304 -16 304
WIRE -16 368 -16 304
WIRE 112 400 112 352
WIRE 480 400 480 368
WIRE 624 400 480 400
WIRE 624 448 624 400
WIRE 112 528 112 480
WIRE 112 656 112 608
SYMBOL voltage 112 512 R0
SYMATTR InstName V2
SYMATTR Value {V}
SYMBOL voltage 480 272 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 96 112 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL pnp 48 352 M180
SYMATTR InstName Q1
SYMBOL res 96 384 R0
SYMATTR InstName R1
SYMATTR Value 10k
FLAG -16 368 0
FLAG 624 448 0
FLAG 480 240 v+
FLAG 112 80 v+
FLAG 112 656 0
TEXT 696 176 Left 2 !.tran 10m\n.step param V 0 12 1
* Z:\home\khalils\Downloads\files\data\raw_asc\10422822d535_ampTest0.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N002 N001 VDD 0 OUT LTC6241 ;pnba IN+)IN-)VCC)VEE)OUT
V1 VDD 0 3.3
R1 OUT N001 26.7k
C1 OUT N001 100p
R2 VDD N002 649k
R3 N002 0 53.6k
V2 SIG 0 PULSE(0 0.248 0 0.01u 0.01u 4u 20u)
R4 N001 0 2.4k
R5 N002 SIG 2.4k
.tran 0 120u 0 1n
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6241.asy)
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 576 -160 512 -160
WIRE 688 -160 656 -160
WIRE 400 -64 384 -64
WIRE 512 -64 512 -160
WIRE 512 -64 480 -64
WIRE 576 -64 512 -64
WIRE 688 -64 688 -160
WIRE 688 -64 640 -64
WIRE 384 -32 384 -64
WIRE 224 48 224 16
WIRE 608 96 608 64
WIRE 512 112 512 -64
WIRE 576 112 512 112
WIRE 688 128 688 -64
WIRE 688 128 640 128
WIRE 816 128 688 128
WIRE 224 144 224 128
WIRE 512 144 224 144
WIRE 576 144 512 144
WIRE 224 160 224 144
WIRE 608 192 608 160
WIRE 400 208 368 208
WIRE 512 208 512 144
WIRE 512 208 480 208
WIRE 224 272 224 240
WIRE 48 288 48 256
WIRE -80 304 -80 272
WIRE -80 400 -80 368
WIRE 48 400 48 368
FLAG -80 400 0
FLAG 608 192 0
FLAG -80 272 VDD
FLAG 608 64 VDD
FLAG 224 272 0
FLAG 224 16 VDD
FLAG 384 -32 0
FLAG 368 208 SIG
FLAG 48 400 0
FLAG 48 256 SIG
FLAG 816 128 OUT
SYMBOL Opamps\\LTC6241 608 128 R0
SYMATTR InstName U1
SYMBOL Misc\\cell -80 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 672 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 26.7k
SYMBOL cap 640 -80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL res 208 32 R0
SYMATTR InstName R2
SYMATTR Value 649k
SYMBOL res 208 144 R0
SYMATTR InstName R3
SYMATTR Value 53.6k
SYMBOL Misc\\signal 48 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 0.248 0 0.01u 0.01u 4u 20u)
SYMBOL res 496 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2.4k
SYMBOL res 496 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 2.4k
TEXT -112 424 Left 2 !.tran 0 120u 0 1n