Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\3ca8a9fc3ff6_Parte3.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vout N002 0 N003 N_1u l=1.5u w=9.23u
Rd N001 Vout 10k
Vgs N002 0 SINE(0 200m 1k)
Vdd N001 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.dc Vgs 0 5 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 -160 144 -160
WIRE 144 -144 144 -160
WIRE 192 -96 144 -96
WIRE 288 -16 288 -160
WIRE 288 -16 192 -16
WIRE 144 16 144 -96
WIRE 144 128 144 96
WIRE 224 128 144 128
WIRE 64 176 -32 176
WIRE 176 176 144 176
WIRE 64 208 64 176
WIRE 96 208 64 208
WIRE 176 208 176 176
WIRE 176 208 144 208
WIRE 144 272 144 224
WIRE -32 304 -32 256
SYMBOL voltage 192 -112 R0
SYMATTR InstName Vdd
SYMATTR Value 5
SYMBOL voltage -32 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vgs
SYMATTR Value SINE(0 200m 1k)
SYMBOL nmos4 96 128 R0
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=1.5u w=9.23u
SYMBOL res 128 0 R0
SYMATTR InstName Rd
SYMATTR Value 10k
FLAG -32 304 0
FLAG 144 272 0
FLAG 144 -144 0
FLAG 224 128 Vout
TEXT -240 -32 Left 2 !.include cmosedu_models.txt
TEXT -242 328 Left 2 !.dc Vgs 0 5 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL40502-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
V1 vIN 0 3.3
Rload vOUT 0 14
C1 vOUT 0 1 Rser=1m
XU1 vIN 0 vIN vOUT ADPL40502-2.8 ;pnba Vin)GND)EN)Vout
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL40502-2.8.asy)
.lib ADPL40502-2.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2808 1464
WIRE 1824 880 1728 880
WIRE 1984 880 1824 880
WIRE 1728 896 1728 880
WIRE 1984 896 1984 880
WIRE 1728 992 1728 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
FLAG 2256 1024 vOUT
FLAG 2256 1136 0
FLAG 1728 992 0
FLAG 1728 880 vIN
FLAG 1984 1168 0
FLAG 2160 1136 0
SYMBOL VOLTAGE 1728 880 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 14
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMATTR SpiceLine Rser=1m
SYMBOL ADPL40502-2.8 1984 1024 R0
SYMATTR InstName U1
TEXT 2144 1200 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1517-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1517-5.asy)
XU1 IN 0 OUT N002 N001 LTC1517-5 ;pnba Vin)GND)Vout)Cap+)Cap-
Rload OUT 0 500
C2 N002 N001 .1
V1 IN 0 3
C1 OUT 0 6.8
.tran 1m startup
.lib LTC1517-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3300 2376
WIRE 2832 1872 2784 1872
WIRE 2944 1872 2896 1872
WIRE 2784 1936 2784 1872
WIRE 2944 1936 2944 1872
WIRE 2736 2048 2624 2048
WIRE 3056 2048 2992 2048
WIRE 3152 2048 3056 2048
WIRE 2624 2064 2624 2048
WIRE 3056 2064 3056 2048
WIRE 3152 2064 3152 2048
WIRE 2624 2160 2624 2144
WIRE 3056 2160 3056 2128
WIRE 3152 2160 3152 2144
WIRE 2864 2208 2864 2160
SYMBOL POWERPRODUCTS\\LTC1517-5 2864 2048 R0
WINDOW 3 8 136 Left 2
SYMATTR InstName U1
SYMBOL cap 3040 2064 R0
SYMATTR InstName C1
SYMATTR Value 6.8
SYMBOL cap 2896 1856 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL RES 3136 2048 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL VOLTAGE 2624 2048 R0
SYMATTR InstName V1
SYMATTR Value 3
FLAG 3056 2160 0
FLAG 2864 2208 0
FLAG 2624 2160 0
FLAG 3152 2160 0
FLAG 3152 2048 OUT
FLAG 2624 2048 IN
TEXT 2976 2216 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\5b6a66c7ce35_ev.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N007 4.2R pwr=4.2
C4 N009 N010 1F
M1 N001 N003 0 0 NMOS
C1 N003 N004 1F
C3 N008 N009 1F
M2 N002 N003 0 0 NMOS
C2 N004 N008 1F
Dled1 N003 N004 D
D3 N005 N006 D
V2 N007 N010 14
XU1 NC_01 N010 N006 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R2 N002 N005 4.2R pwr=4.2
Dled2 N003 N008 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1384 788
WIRE 224 -112 80 -112
WIRE 1216 -112 1216 -128
WIRE 1216 -112 976 -112
WIRE 80 -96 80 -112
WIRE 272 -32 176 -32
WIRE 544 -32 272 -32
WIRE 752 -32 544 -32
WIRE 928 -32 752 -32
WIRE 272 64 272 -32
WIRE 544 64 544 -32
WIRE 752 64 752 -32
WIRE 272 144 272 128
WIRE 544 144 544 128
WIRE 544 144 272 144
WIRE 1216 160 1216 -48
WIRE 1312 160 1216 160
WIRE 272 208 272 144
WIRE 1376 224 1312 224
WIRE 80 320 80 -16
WIRE 272 352 272 272
WIRE 752 352 752 128
WIRE 752 352 272 352
WIRE 1376 384 1376 224
WIRE 272 528 272 416
WIRE 80 736 80 400
WIRE 272 736 272 592
WIRE 272 736 80 736
WIRE 1312 736 1312 400
WIRE 1312 736 272 736
SYMBOL res 1200 -144 R0
SYMATTR InstName R2
SYMATTR Value 4.2R
SYMATTR SpiceLine pwr=4.2
SYMBOL diode 1296 160 R0
SYMATTR InstName D3
SYMBOL cap 256 64 R0
SYMATTR InstName C1
SYMATTR Value 1F
SYMBOL nmos 176 -112 R0
SYMATTR InstName M1
SYMBOL LED 736 64 R0
SYMATTR InstName led2
SYMBOL OpAmps\\opamp 1344 320 R0
SYMATTR InstName U1
SYMBOL res 64 -112 R0
SYMATTR InstName R1
SYMATTR Value 4.2R
SYMATTR SpiceLine pwr=4.2
SYMBOL cap 256 528 R0
SYMATTR InstName C4
SYMATTR Value 1F
SYMBOL LED 528 64 R0
SYMATTR InstName led1
SYMBOL nmos 928 -112 R0
SYMATTR InstName M2
SYMBOL Misc\\battery 80 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 14
SYMBOL cap 256 352 R0
SYMATTR InstName C3
SYMATTR Value 1F
SYMBOL cap 256 208 R0
SYMATTR InstName C2
SYMATTR Value 1F
FLAG 224 -16 0
FLAG 976 -16 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3407-3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
C1 OUT1 0 10
L1 N002 OUT1 2.2
C3 OUT2 0 10
L2 N001 OUT2 2.2
Rload1 OUT1 0 3
Rload2 OUT2 0 5
XU1 OUT1 IN IN N002 0 IN N001 MP_01 IN OUT2 LTC3407-3 ;pnba Vout1)Run1)Vin)SW1)GND)Mode)SW2))Run2)Vout2
.tran 200u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3407-3.asy)
.lib LTC3407-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1252 868
WIRE 192 48 48 48
WIRE 272 48 192 48
WIRE 352 48 272 48
WIRE 432 48 352 48
WIRE 48 64 48 48
WIRE 272 64 272 48
WIRE 352 64 352 48
WIRE 432 64 432 48
WIRE 192 128 192 48
WIRE 208 128 192 128
WIRE 48 160 48 144
WIRE 0 224 -144 224
WIRE 64 224 0 224
WIRE 96 224 64 224
WIRE 208 224 176 224
WIRE 512 224 496 224
WIRE 624 224 592 224
WIRE 704 224 624 224
WIRE 800 224 704 224
WIRE -144 240 -144 224
WIRE 0 240 0 224
WIRE 704 240 704 224
WIRE 800 240 800 224
WIRE -144 336 -144 320
WIRE 0 336 0 304
WIRE 64 336 64 224
WIRE 208 336 64 336
WIRE 624 336 624 224
WIRE 624 336 496 336
WIRE 704 336 704 304
WIRE 800 336 800 320
WIRE 352 400 352 384
FLAG 48 160 0
FLAG 352 400 0
FLAG 704 336 0
FLAG 800 336 0
FLAG 800 224 OUT1
FLAG 0 336 0
FLAG -144 336 0
FLAG -144 224 OUT2
FLAG 48 48 IN
SYMBOL VOLTAGE 48 48 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL polcap 688 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ind 496 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL polcap -16 240 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL ind 192 240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 2.2
SYMBOL res 784 224 R0
SYMATTR InstName Rload1
SYMATTR Value 3
SYMBOL res -160 224 R0
SYMATTR InstName Rload2
SYMATTR Value 5
SYMBOL PowerProducts\\LTC3407-3 352 224 R0
SYMATTR InstName U1
TEXT 576 384 Left 2 !.tran 200u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\7285c1e26c59_1006S8.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain 100 Amplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1006S8.asy)
R2 N001 0 1K
R3 OUT 0 660
V1 +V 0 5
V3 IN 0 SINE(5m 1m 1K)
R1 OUT N001 99K
XU1 IN N001 +V 0 OUT LT1006 ;pnba In+)In-)V+)V-)OUT
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 112 16 112
WIRE 128 112 112 112
WIRE 160 112 128 112
WIRE 272 112 240 112
WIRE 192 208 192 192
WIRE 128 224 128 112
WIRE 160 224 128 224
WIRE -80 240 -80 224
WIRE 272 240 272 112
WIRE 272 240 224 240
WIRE 336 240 272 240
WIRE 160 256 48 256
WIRE 336 256 336 240
WIRE 48 272 48 256
WIRE 192 288 192 272
WIRE -80 336 -80 320
WIRE 336 352 336 336
WIRE 48 368 48 352
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 99K
SYMBOL voltage -80 224 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 320 240 R0
SYMATTR InstName R3
SYMATTR Value 660
SYMBOL opamps\\LT1006S8 192 176 R0
SYMATTR InstName U1
SYMBOL voltage 48 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(5m 1m 1K)
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
FLAG -80 336 0
FLAG 192 192 +V
FLAG -80 224 +V
FLAG 16 112 0
FLAG 48 368 0
FLAG 192 288 0
FLAG 336 352 0
FLAG 336 240 OUT
FLAG 48 256 IN
TEXT 288 400 Left 2 !.tran 3m
TEXT 152 56 Bottom 2 ;Gain 100 Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\f1c48c0f0c26_ej2.asc
* Generated by LTspice 26.0.1 for Windows.
C1 V1 0 1.58823
C2 V2 V1 0.093426
I1 0 V1 AC 2
L2 V1 V2 1.1893 Rser=0
RL V2 0 1
C3 V2 0 0.41176
.ac dec 1000 1m 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 16 240 16
WIRE 384 16 352 16
WIRE 112 64 -32 64
WIRE 240 64 240 16
WIRE 240 64 112 64
WIRE 384 64 384 16
WIRE 496 64 384 64
WIRE 640 64 496 64
WIRE -32 112 -32 64
WIRE 240 112 240 64
WIRE 272 112 240 112
WIRE 384 112 384 64
WIRE 384 112 336 112
WIRE 640 112 640 64
WIRE 112 128 112 64
WIRE 496 128 496 64
WIRE -32 240 -32 192
WIRE 112 240 112 192
WIRE 112 240 -32 240
WIRE 496 240 496 192
WIRE 496 240 112 240
WIRE 640 240 640 192
WIRE 640 240 496 240
WIRE 112 256 112 240
SYMBOL ind 256 32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 1.1893
SYMATTR SpiceLine Rser=0
SYMBOL current -32 192 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 17 -5 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value ""
SYMATTR Value2 AC 2
SYMBOL cap 336 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 0.093426
SYMBOL res 624 96 R0
SYMATTR InstName RL
SYMATTR Value 1
SYMBOL cap 96 128 R0
SYMATTR InstName C1
SYMATTR Value 1.58823
SYMBOL cap 480 128 R0
SYMATTR InstName C3
SYMATTR Value 0.41176
FLAG 112 256 0
FLAG 112 64 V1
FLAG 496 64 V2
TEXT -144 264 Left 2 !.ac dec 1000 1m 10
* Z:\home\khalils\Downloads\files\data\raw_asc\1227fa4f174f_Differentiator_Amp.asc
* Generated by LTspice 26.0.1 for Windows.
* The Differentiator Amplifier\nOperational Amplifiler\nVout=-RC*(dVin/dt)
R1 N002 N001 10
C1 N001 N003 10n
XU1 N001 0 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
V1 N003 0 PULSE(0 1 0 1n 1n 5u 10u)
R2 N002 0 1
.lib opamp.sub
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1624 680
WIRE 640 96 544 96
WIRE 800 96 720 96
WIRE 416 240 240 240
WIRE 544 240 544 96
WIRE 544 240 480 240
WIRE 624 240 544 240
WIRE 800 256 800 96
WIRE 800 256 688 256
WIRE 912 256 800 256
WIRE 624 272 544 272
WIRE 240 320 240 240
WIRE 912 320 912 256
WIRE 240 496 240 400
WIRE 544 496 544 272
WIRE 912 496 912 400
SYMBOL res 896 304 R0
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL voltage 240 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1n 1n 5u 10u)
SYMBOL cap 480 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL OpAmps\\opamp 656 192 R0
SYMATTR InstName U1
SYMBOL res 736 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
FLAG 240 496 0
FLAG 544 496 0
FLAG 912 496 0
TEXT -264 96 Left 2 ;The Differentiator Amplifier\nOperational Amplifiler\nVout=-RC*(dVin/dt)
TEXT 592 312 Left 2 !.lib opamp.sub
TEXT -264 520 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\1b7d535d857a_004-low-power-difference-amplifier.asc
* Generated by LTspice 26.0.1 for Windows.
* There's phase-shift and filtering effect
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8541.asy)
XU1 N003 N002 N001 N004 Vout AD8541 ;pnba In+)In-)V+)V-)OUT
R4 0 N003 20Meg
V1 N004 0 -15
V3 Vin- 0 SINE(0 0.2 50)
V4 Vin+ 0 SINE(0 0.2 50 {1/50/2})
R1 N002 Vin- 10Meg
C1 N003 0 10p
R3 N003 Vin+ 10Meg
C2 Vout N002 10p
R2 Vout N002 20Meg
V2 N001 0 15
.tran 0 60m 0 1u
.lib AD8541.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -368 -336 -432 -336
WIRE -432 -304 -432 -336
WIRE -432 -208 -432 -224
WIRE -496 -112 -528 -112
WIRE -400 -112 -432 -112
WIRE -528 -32 -528 -112
WIRE -496 -32 -528 -32
WIRE -400 -32 -400 -112
WIRE -400 -32 -416 -32
WIRE -256 -32 -400 -32
WIRE -368 48 -368 -336
WIRE -640 64 -1040 64
WIRE -528 64 -528 -32
WIRE -528 64 -560 64
WIRE -400 64 -528 64
WIRE -256 80 -256 -32
WIRE -256 80 -336 80
WIRE -192 80 -256 80
WIRE -1040 96 -1040 64
WIRE -400 96 -480 96
WIRE -1040 112 -1040 96
WIRE -640 144 -816 144
WIRE -480 144 -480 96
WIRE -480 144 -560 144
WIRE -432 144 -480 144
WIRE -816 176 -816 144
WIRE -480 176 -480 144
WIRE -432 176 -432 144
WIRE -368 176 -368 112
WIRE -816 192 -816 176
WIRE -1040 224 -1040 192
WIRE -480 272 -480 256
WIRE -432 272 -432 240
WIRE -432 272 -480 272
WIRE -480 288 -480 272
WIRE -368 288 -368 256
WIRE -816 304 -816 272
IOPIN -1040 96 In
IOPIN -192 80 Out
IOPIN -816 176 In
SYMBOL voltage -1040 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 0.2 50)
SYMBOL voltage -368 160 R0
SYMATTR InstName V1
SYMATTR Value -15
SYMBOL voltage -816 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value SINE(0 0.2 50 {1/50/2})
SYMBOL res -544 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10Meg
SYMBOL Opamps\\AD8541 -368 16 R0
SYMATTR InstName U1
SYMBOL cap -448 176 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL res -544 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10Meg
SYMBOL res -464 272 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 20Meg
SYMBOL voltage -432 -320 R0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL res -400 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 20Meg
SYMBOL cap -432 -128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10p
FLAG -368 288 0
FLAG -432 -208 0
FLAG -1040 96 Vin-
FLAG -192 80 Vout
FLAG -1040 224 0
FLAG -480 288 0
FLAG -816 176 Vin+
FLAG -816 304 0
TEXT -192 224 Left 2 !.tran 0 60m 0 1u
TEXT -184 320 Left 2 ;There's phase-shift and filtering effect
* Z:\home\khalils\Downloads\files\data\raw_asc\e674b93b2701_Nand_.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vout a N002 N002 NMOS
M2 N002 b 0 0 NMOS
M3 N001 a Vout Vout PMOS
M4 N001 b Vout Vout PMOS
Vdd N001 0 5
V1 a 0 PULSE(0 1.8 0 5n 5n 20m 40m)
V2 b 0 PULSE(0 1.8 0 5n 5n 40m 80m)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 80m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 -64 256 -80
WIRE 256 -64 176 -64
WIRE 336 -64 256 -64
WIRE 176 -32 176 -64
WIRE 336 -32 336 -64
WIRE 176 80 176 64
WIRE 240 80 176 80
WIRE 336 80 336 64
WIRE 336 80 240 80
WIRE 240 144 240 80
WIRE 272 144 240 144
WIRE 240 176 240 144
WIRE 240 320 240 272
WIRE 240 432 240 416
FLAG 240 432 0
FLAG 272 144 Vout
IOPIN 272 144 Out
FLAG -288 -48 a
FLAG 128 48 a
FLAG 192 256 a
FLAG -288 144 b
FLAG 288 48 b
FLAG 192 400 b
FLAG -288 32 0
FLAG -288 224 0
FLAG 256 -160 0
SYMBOL nmos 192 176 R0
SYMATTR InstName M1
SYMBOL nmos 192 320 R0
SYMATTR InstName M2
SYMBOL pmos 128 -32 R0
SYMATTR InstName M3
SYMBOL pmos 288 -32 R0
SYMATTR InstName M4
SYMBOL voltage 256 -64 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName Vdd
SYMATTR Value 5
SYMBOL voltage -288 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1.8 0 5n 5n 20m 40m)
SYMBOL voltage -288 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1.8 0 5n 5n 40m 80m)
TEXT -320 464 Left 2 !.tran 80m
* Z:\home\khalils\Downloads\files\data\raw_asc\9fd2acc6256e_trafo_real_mna.asc
* Generated by LTspice 26.0.1 for Windows.
V1 v1 0 0 AC 1 0 Rser=0
L1 v3 v1 {L1} Rser=0
L2 v3 v2 {L2} Rser=0
C2 v3 0 {C2}
C1 v2 v1 {C1}
K1 L1 L2 {k1}
* 1:1
* Directiva SPICE para transformadores
.param k1=kv L1=lv1 L2=lv2 C1=cv1 C2=cv2
.net V(v2) V1
.ac dec 100 .001 100
.param lv1=1 lv2=4 kv=1 cv1=1 cv2=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1328
WIRE 320 384 192 384
WIRE 512 384 384 384
WIRE 128 464 0 464
WIRE 192 464 192 384
WIRE 192 464 128 464
WIRE 304 464 192 464
WIRE 512 464 512 384
WIRE 512 464 400 464
WIRE 576 464 512 464
WIRE 0 528 0 464
WIRE 304 528 304 464
WIRE 400 528 400 464
WIRE 304 624 304 608
WIRE 352 624 304 624
WIRE 400 624 400 608
WIRE 400 624 352 624
WIRE 0 688 0 608
WIRE 352 688 0 688
WIRE 576 688 352 688
WIRE 0 704 0 688
WIRE 352 704 352 688
FLAG 0 704 0
FLAG 128 464 v1
FLAG 576 464 v2
FLAG 352 704 0
FLAG 352 624 v3
SYMBOL voltage 0 512 R0
WINDOW 3 24 96 Invisible 2
SYMATTR Value 0
SYMATTR InstName V1
SYMATTR Value2 AC 1 0
SYMATTR SpiceLine Rser=0
SYMBOL ind2 288 624 M180
WINDOW 0 -34 90 Left 2
WINDOW 3 -24 44 Invisible 2
SYMATTR InstName L1
SYMATTR Value {L1}
SYMATTR Type ind
SYMATTR SpiceLine Rser=0
SYMBOL ind2 416 624 R180
WINDOW 0 -37 95 Left 2
WINDOW 3 -51 22 Left 2
SYMATTR InstName L2
SYMATTR Value {L2}
SYMATTR Type ind
SYMATTR SpiceLine Rser=0
SYMBOL cap 336 624 R0
WINDOW 0 -38 31 Left 2
WINDOW 3 47 30 Left 2
SYMATTR InstName C2
SYMATTR Value {C2}
SYMBOL cap 384 368 R90
WINDOW 0 -7 62 VBottom 2
WINDOW 3 30 65 VTop 2
SYMATTR InstName C1
SYMATTR Value {C1}
TEXT 0 800 Left 2 !K1 L1 L2 {k1}
TEXT 336 496 Left 2 ;1:1
TEXT 0 768 Left 1 ;Directiva SPICE para transformadores
TEXT 312 800 Left 2 !.param k1=kv L1=lv1 L2=lv2 C1=cv1 C2=cv2
TEXT 8 888 Left 2 !.net V(v2) V1
TEXT 0 848 Left 2 !.ac dec 100 .001 100
TEXT 304 840 Left 2 !.param lv1=1 lv2=4 kv=1 cv1=1 cv2=1
* Z:\home\khalils\Downloads\files\data\raw_asc\e9452b9f6876_IXFX120N20_test.asc
* Generated by LTspice 26.0.1 for Windows.
* 1. Add a "nmos" component to the schematic.\n \n2. Replace the value NMOS with IXFX120N20 \n on your nmos-transistor in the schematic.\n \n6. Put the model either on the schematic or into a file.\n \nAdd the line \n .include IXFX120N20.lib\nif you use a model file. \nI recommend to keep the model file in the same \nfolder as the schematic. This makes a complete\nbackup of a circuit easy.
* .include IXFX120N20.lib
* PSpice Model Editor - Version 9.2
*$
*DEVICE=IXFX120N20,NMOS
* IXFX120N20 NMOS model
* updated using Model Editor release 9.2.1 on 03/03/04 at 11:42
* The Model Editor is a PSpice product HEM.
*$
+ LEVEL=3
+ L=2.0000E-6
+ W=380
+ KP=1.0340E-6
+ RS=10.000E-3
+ RD=3.6882E-3
+ VTO=3.9426
+ RDS=2.0000E6
+ TOX=2.0000E-6
+ CGSO=26.316E-18
+ CGDO=4.0478E-12
+ CBD=6.3639E-9
+ MJ=1.2063
+ PB=3
+ RG=10.000E-3
+ IS=78.723E-6
+ N=2.6043
+ RB=1.0000E-9
+ GAMMA=0
+ KAPPA=0
M1 N001 N002 0 0 IXFX120N20
V1 N002 0 0
V2 N001 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 -0 5 0.01 V1 3.9 4.5 0.2
.MODEL IXFX120N20 NMOS
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1512 988
WIRE -448 432 -448 400
WIRE -448 272 -448 240
WIRE -448 240 -304 240
WIRE -256 128 -256 160
WIRE -256 256 -256 400
WIRE -256 400 -448 400
WIRE -448 400 -448 352
WIRE -32 176 -32 128
WIRE -32 128 -256 128
WIRE -256 400 -32 400
WIRE -32 400 -32 256
SYMBOL voltage -448 256 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL nmos -304 160 R0
SYMATTR InstName M1
SYMATTR Value IXFX120N20
SYMBOL voltage -32 160 R0
SYMATTR InstName V2
SYMATTR Value 5
FLAG -448 432 0
TEXT -448 16 Left 0 !.dc V2 -0 5 0.01 V1 3.9 4.5 0.2
TEXT -472 488 Left 0 ;1. Add a "nmos" component to the schematic.\n \n2. Replace the value NMOS with IXFX120N20 \n    on your nmos-transistor in the schematic.\n \n6. Put the model either  on the schematic or into a file.\n \nAdd the line  \n    .include IXFX120N20.lib\nif you use a model file. \nI recommend to keep the model file in the same \nfolder as the schematic. This makes a complete\nbackup of a circuit easy.
TEXT -448 64 Left 0 ;.include IXFX120N20.lib
TEXT 176 32 Left 0 !* PSpice Model Editor - Version 9.2\n \n*$\n*DEVICE=IXFX120N20,NMOS\n \n* IXFX120N20 NMOS model\n* updated using Model Editor release 9.2.1 on 03/03/04 at 11:42\n* The Model Editor is a PSpice product HEM.\n.MODEL IXFX120N20 NMOS\n+ LEVEL=3\n+ L=2.0000E-6\n+ W=380\n+ KP=1.0340E-6\n+ RS=10.000E-3\n+ RD=3.6882E-3\n+ VTO=3.9426\n+ RDS=2.0000E6\n+ TOX=2.0000E-6\n+ CGSO=26.316E-18\n+ CGDO=4.0478E-12\n+ CBD=6.3639E-9\n+ MJ=1.2063\n+ PB=3\n+ RG=10.000E-3\n+ IS=78.723E-6\n+ N=2.6043\n+ RB=1.0000E-9\n+ GAMMA=0\n+ KAPPA=0\n*$
* Z:\home\khalils\Downloads\files\data\raw_asc\483529c7d341_Draft5.asc
* Generated by LTspice 26.0.1 for Windows.
S2 0 0 0 0 KILL
D1 VBAT N001 RB088BM100
M1 OUT N002 N001 N001 Si7489DP
R1 N001 N002 100k
V1 VBAT 0 48
V2 N003 0 PULSE(0 5 0 0.01m 0.01m 10m 20m)
S1 0 START_SW N003 0 START
R2 N002 START_SW 20k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model START SW(Ron=1 Roff=1Meg)
.tran 40m
.model KILL SW()
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 692
WIRE 48 32 0 32
WIRE 304 32 48 32
WIRE 464 32 368 32
WIRE 544 32 464 32
WIRE 816 32 640 32
WIRE 848 32 816 32
WIRE 464 96 464 32
WIRE 0 112 0 32
WIRE 464 192 464 176
WIRE 560 192 560 80
WIRE 560 192 464 192
WIRE 464 208 464 192
WIRE 288 320 112 320
WIRE 464 320 464 288
WIRE 464 320 288 320
WIRE 112 352 112 320
WIRE 64 368 -128 368
WIRE -128 416 -128 368
SYMBOL voltage -128 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 0.01m 0.01m 10m 20m)
SYMBOL pmos 640 80 M270
SYMATTR InstName M1
SYMATTR Value Si7489DP
SYMBOL voltage 0 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL res 448 80 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL sw 112 688 M180
SYMATTR InstName S2
SYMATTR Value KILL
SYMBOL schottky 304 48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value RB088BM100
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 448 192 R0
SYMATTR InstName R2
SYMATTR Value 20k
SYMBOL sw 112 448 M180
SYMATTR InstName S1
SYMATTR Value START
FLAG 0 192 0
FLAG -128 496 0
FLAG 64 416 0
FLAG 112 432 0
FLAG 64 656 0
FLAG 112 672 0
FLAG 48 32 VBAT
FLAG 816 32 OUT
FLAG 288 320 START_SW
FLAG 64 608 0
FLAG 112 592 0
TEXT 360 440 Left 2 !.model START SW(Ron=1 Roff=1Meg)
TEXT -162 616 Left 2 !.tran 40m
TEXT 368 536 Left 2 !.model KILL SW()