Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\35ded4dedb85_AD8617.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 2.5
Vin IN 0 SINE(0 1 1K)
R1 N001 0 10K
R2 OUT N001 10K
V2 -V 0 -2.5
Rload OUT 0 10K
XU1 IN N001 +V -V OUT AD8617 ;pnba In+)In-)V+)V-)OUT
.tran 10m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8617.asy)
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 1K)
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL Opamps\\AD8617 576 -1168 R0
SYMATTR InstName U1
TEXT 680 -944 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\8f53bf58fb4a_12.asc
* Generated by LTspice 26.0.1 for Windows.
Rb N004 N003 1K
Rc N001 N002 1K
Q1 N002 N004 0 0 2N2222
Vi N003 0
Vcc N001 0 5
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Vi 0 5 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 544 -96 272 -96
WIRE 272 -48 272 -96
WIRE 272 128 272 32
WIRE -32 176 -208 176
WIRE 208 176 48 176
WIRE 544 176 544 -96
WIRE -208 256 -208 176
WIRE -208 432 -208 336
WIRE 272 432 272 224
WIRE 272 432 -208 432
WIRE 544 432 544 256
WIRE 544 432 272 432
WIRE 272 496 272 432
SYMBOL res 64 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rb
SYMATTR Value 1K
SYMBOL voltage 544 160 R0
SYMATTR InstName Vcc
SYMATTR Value 5
SYMBOL npn 208 128 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL voltage -208 240 R0
SYMATTR InstName Vi
SYMATTR Value ""
SYMBOL res 256 -64 R0
SYMATTR InstName Rc
SYMATTR Value 1K
FLAG 272 496 0
TEXT 424 480 Left 2 !.dc Vi 0 5 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2119-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2119-1.8.asy)
C2 OUT 0 10
Rload OUT 0 1.8
L1 N002 OUT 1.5
XU1 IN IN N002 0 0 OUT IN N001 IN IN ADP2119-1.8 ;pnba Vin)Pvin)SW)PGND)GND)FB)TRK)Pgood)Sync/Mode)EN
C1 OUT 0 22
R1 OUT N001 100K
V1 IN 0 5
.tran 1m
.lib ADP2119-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 0 64 0
WIRE 288 0 128 0
WIRE 64 16 64 0
WIRE 288 32 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 624 64 576 64
WIRE 64 112 64 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 624 144 624 64
WIRE 624 144 560 144
WIRE 688 144 624 144
WIRE 752 144 688 144
WIRE 560 160 560 144
WIRE 624 160 624 144
WIRE 752 160 752 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 624 224 560 224
WIRE 560 256 560 224
WIRE 752 256 752 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 688 304 688 144
WIRE 688 304 416 304
WIRE 288 368 288 352
SYMBOL cap 608 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL voltage 64 0 R0
WINDOW 0 27 27 Left 2
WINDOW 3 29 88 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 736 144 R0
WINDOW 3 34 68 Left 2
SYMATTR Value 1.8
SYMATTR InstName Rload
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.5
SYMBOL ADP2119-1.8 288 272 R0
SYMATTR InstName U1
FLAG 560 256 0
FLAG 288 368 0
FLAG 64 112 0
FLAG 752 144 OUT
FLAG 752 256 0
FLAG 64 0 IN
TEXT 504 344 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\092a1e9b3fa5_mos_param_visibility.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc V1 0 5 .01
* How to make L and W visible, but not the other like AD, PS ...\n \nAdd symbols "nmos4" and "pmos4" to the schematic.\nThe Mosfets become an instance after you you placed it.\nChange NMOS to the model name, e.g. NMOS1.\nChange PMOS to the model name, e.g. PMOS2. \nCtrl-RightMouseClick on the body of a Mosfet.\nAdd L= ... W= ... into the field "Value2". Enable visibility!\nAdd AD= PS= ......... into the field "SpiceLine".\n \nLook in the Spice Error Log file for results after a RUN.\nView->SPICE Error Log\n \nSome parameters are from here:\nhttp://myqu.qu.edu.qa/malani/VLSI/2-Input%20NOR%20Gate.doc
V1 in 0 2.5
M2 out in vdd vdd PMOS1 L=2u W=10u AD=80p PD=25u AS=80p PS=25u
V2 vdd 0 5
M3 out in 0 0 NMOS1 L=2u W=10u AD=80p PD=25u AS=80p PS=25u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.op
.model PMOS1 pmos level=2 nsub=4e15 tox=50n
.model NMOS1 nmos level=2 nsub=4e15 tox=50n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1404 948
WIRE 48 400 48 320
WIRE 48 544 48 480
WIRE 64 32 64 -32
WIRE 64 176 64 112
WIRE 112 320 48 320
WIRE 256 320 112 320
WIRE 256 320 256 160
WIRE 256 464 256 320
WIRE 352 160 256 160
WIRE 352 464 256 464
WIRE 400 -32 64 -32
WIRE 400 80 400 -32
WIRE 400 144 400 80
WIRE 400 320 400 240
WIRE 400 384 400 320
WIRE 400 544 400 480
WIRE 496 192 400 192
WIRE 496 432 400 432
WIRE 560 320 400 320
SYMBOL voltage 48 384 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL nmos4 352 384 R0
WINDOW 123 56 100 Left 0
SYMATTR InstName M3
SYMATTR Value NMOS1
SYMATTR Value2 L=2u W=10u
SYMATTR SpiceLine AD=80p PD=25u AS=80p PS=25u
SYMBOL pmos4 352 240 M180
WINDOW 0 59 69 Left 0
WINDOW 3 57 27 Left 0
WINDOW 123 57 -1 Left 0
SYMATTR InstName M2
SYMATTR Value PMOS1
SYMATTR Value2 L=2u W=10u
SYMATTR SpiceLine AD=80p PD=25u AS=80p PS=25u
SYMBOL voltage 64 16 R0
SYMATTR InstName V2
SYMATTR Value 5
FLAG 112 320 in
FLAG 400 544 0
FLAG 496 432 0
FLAG 496 192 vdd
FLAG 400 80 vdd
FLAG 560 320 out
FLAG 64 176 0
FLAG 48 544 0
TEXT 24 -104 Left 0 !.op
TEXT 24 624 Left 0 !.model PMOS1 pmos level=2 nsub=4e15 tox=50n\n.model NMOS1 nmos level=2 nsub=4e15 tox=50n
TEXT 24 -136 Left 0 ;.dc V1 0 5 .01
TEXT 16 -608 Left 0 ;How to make L and W visible, but not the other like AD, PS ...\n \nAdd symbols "nmos4" and "pmos4" to the schematic.\nThe Mosfets become an instance after you you placed it.\nChange NMOS to the model name, e.g. NMOS1.\nChange PMOS to the model name, e.g. PMOS2. \nCtrl-RightMouseClick on the body of a Mosfet.\nAdd L= ... W= ... into the field "Value2". Enable visibility!\nAdd AD= PS= ......... into the field "SpiceLine".\n \nLook in the Spice Error Log file for results after a RUN.\nView->SPICE Error Log\n \nSome parameters are from here:\nhttp://myqu.qu.edu.qa/malani/VLSI/2-Input%20NOR%20Gate.doc
* Z:\home\khalils\Downloads\files\data\raw_asc\0260e9b226ac_MyComparator.asc
* Generated by LTspice 26.0.1 for Windows.
R2 neg 0 1e6
E1 out 0 value={if(V(in+,in-)>0, V(pos),V(neg))}
R3 pos 0 1e6
R1 in- in+ 1e6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 976 680
WIRE 608 -288 528 -288
WIRE 672 -288 608 -288
WIRE 256 -272 160 -272
WIRE 304 -272 256 -272
WIRE 304 -240 304 -272
WIRE 672 -240 672 -288
WIRE 304 -128 304 -160
WIRE 672 -128 672 -160
WIRE 544 -64 480 -64
WIRE 640 -64 544 -64
WIRE 208 0 128 0
WIRE 336 0 208 0
WIRE 480 0 480 -64
WIRE 336 16 336 0
WIRE 224 112 144 112
WIRE 336 112 336 96
WIRE 336 112 224 112
WIRE 480 144 480 80
IOPIN 528 -288 In
IOPIN 160 -272 In
IOPIN 144 112 In
IOPIN 128 0 In
IOPIN 640 -64 Out
SYMBOL res 656 -256 R0
SYMATTR InstName R3
SYMATTR Value 1e6
SYMBOL res 320 0 R0
SYMATTR InstName R1
SYMATTR Value 1e6
SYMBOL res 288 -256 R0
SYMATTR InstName R2
SYMATTR Value 1e6
SYMBOL Misc\\Epoly 480 -16 R0
SYMATTR InstName E1
SYMATTR Value value={if(V(in+,in-)>0, V(pos),V(neg))}
FLAG 480 144 0
FLAG 224 112 in+
FLAG 208 0 in-
FLAG 544 -64 pwm
FLAG 608 -288 pos
FLAG 256 -272 neg
FLAG 528 -288 pos
FLAG 160 -272 neg
FLAG 144 112 in+
FLAG 128 0 in-
FLAG 640 -64 out
FLAG 304 -128 0
FLAG 672 -128 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6992-4.asc
* Generated by LTspice 26.0.1 for Windows.
* 400Hz, 95% to 0% Duty Cycle\nSwept Pulse Width Modulated Output\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6992-4.asy)
R3 N002 N004 392K
XU1 N001 0 N003 N004 N002 PWMout LTC6992-4 ;pnba MOD)GND)SET)DIV)V+)OUT
V1 N002 0 3
V2 N001 0 PULSE(0 1 10m 50m 50m 5m 110m)
R4 PWMout 0 10K
R1 N003 0 487K
R2 N004 0 1000K
.tran 120m startup
.lib LTC6992-4.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -176 96 -192 96
WIRE 96 96 -96 96
WIRE 624 96 320 96
WIRE 624 112 624 96
WIRE 96 176 80 176
WIRE 368 176 320 176
WIRE 496 176 368 176
WIRE 368 192 368 176
WIRE 496 192 496 176
WIRE 624 208 624 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 336 256 320 256
WIRE 336 288 336 256
WIRE 368 288 368 272
WIRE 368 288 336 288
WIRE 496 288 496 272
WIRE 368 304 368 288
WIRE 368 400 368 384
SYMBOL SpecialFunctions\\LTC6992-4 208 176 R0
SYMATTR InstName U1
SYMBOL res 608 96 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 487K
SYMBOL voltage 496 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL voltage -80 96 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 1 10m 50m 50m 5m 110m)
SYMATTR InstName V2
SYMBOL res 352 288 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL res 352 176 R0
SYMATTR InstName R3
SYMATTR Value 392K
FLAG -192 96 0
FLAG 368 400 0
FLAG 496 288 0
FLAG 624 96 PWMout
FLAG 80 176 0
FLAG -16 256 0
FLAG 624 208 0
TEXT 528 368 Left 2 !.tran 120m startup
TEXT 208 56 Bottom 2 ;400Hz, 95% to 0% Duty Cycle\nSwept Pulse Width Modulated Output\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\0de55b386468_Tab9_1_ftn.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1)/I(vgs)
VSB 0 N002 0
M1 N001 N003 0 N002 N_1u l=2u w=10u
VGS N003 0 1.05V AC 1
VDS N001 0 250m
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.ac dec 100 1MEG 1G
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1128 680
WIRE 352 208 352 192
WIRE 352 304 352 288
WIRE 400 192 352 192
WIRE 448 112 448 80
WIRE 448 272 448 208
WIRE 704 160 448 160
WIRE 704 272 704 240
WIRE 848 80 448 80
WIRE 848 112 848 80
WIRE 848 224 848 192
SYMBOL voltage 704 256 R180
WINDOW 0 -37 57 Right 0
WINDOW 3 -37 29 Right 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VSB
SYMATTR Value 0
SYMBOL voltage 352 192 R0
WINDOW 0 -91 57 Left 0
WINDOW 3 -91 113 Left 0
WINDOW 123 -91 85 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 1.05V
SYMATTR Value2 AC 1
SYMBOL nmos4 400 112 R0
WINDOW 0 59 18 Left 0
WINDOW 3 64 75 Left 0
WINDOW 123 64 103 Left 0
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=2u w=10u
SYMBOL voltage 848 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 40 57 Left 0
WINDOW 3 40 85 Left 0
SYMATTR InstName VDS
SYMATTR Value 250m
FLAG 352 304 0
FLAG 448 272 0
FLAG 848 224 0
FLAG 704 272 0
TEXT 448 320 Left 0 !.ac dec 100 1MEG 1G
TEXT 448 344 Left 0 !.lib cmosedu_models.txt
TEXT 488 56 Left 0 ;Plot Id(M1)/I(vgs)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2301.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2301.asy)
C2 N001 N002 100n
XU1 IN IN N001 N002 N003 0 ADP2300_1 FREQ=1 CSGain=0.25 ;pnba Vin)EN)BST)SW)FB)GND
V1 IN 0 12
R2 N003 0 13.3K
Rload OUT 0 15
R1 OUT N003 69.8K
L1 N002 OUT 6.8 Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
C1 OUT 0 10
D1 0 N002 MBRS340
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib ADP2300_1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1000 692
WIRE 128 48 16 48
WIRE 160 48 128 48
WIRE 448 48 416 48
WIRE 16 64 16 48
WIRE 448 80 448 48
WIRE 16 160 16 144
WIRE 128 176 128 48
WIRE 160 176 128 176
WIRE 448 176 448 144
WIRE 448 176 416 176
WIRE 544 176 448 176
WIRE 672 176 624 176
WIRE 768 176 672 176
WIRE 912 176 768 176
WIRE 448 192 448 176
WIRE 672 192 672 176
WIRE 912 192 912 176
WIRE 768 208 768 176
WIRE 448 272 448 256
WIRE 672 272 672 256
WIRE 912 288 912 272
WIRE 160 304 128 304
WIRE 768 304 768 288
WIRE 768 304 416 304
WIRE 768 320 768 304
WIRE 768 416 768 400
SYMBOL VOLTAGE 16 48 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 656 192 R0
WINDOW 0 29 15 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ind 528 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMATTR SpiceLine Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
SYMBOL res 752 192 R0
SYMATTR InstName R1
SYMATTR Value 69.8K
SYMBOL ADP2301 288 176 R0
SYMATTR InstName U1
SYMBOL cap 432 80 R0
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL schottky 432 256 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 752 304 R0
SYMATTR InstName R2
SYMATTR Value 13.3K
SYMBOL res 896 176 R0
SYMATTR InstName Rload
SYMATTR Value 15
FLAG 16 160 0
FLAG 16 48 IN
FLAG 672 272 0
FLAG 912 176 OUT
FLAG 128 304 0
FLAG 448 272 0
FLAG 768 416 0
FLAG 912 288 0
TEXT 520 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\478afd4d7ec1_meros_4o_A_.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 UC1 N001 N003 0 2N2222
Q2 UC2 N002 N003 0 2N2222
RC2 VCC UC2 {R}
RC1 VCC UC1 {R}
VUB2 N002 0 0
V1 VCC 0 10
I1 N003 -VCC 2m
Vub1 N001 0 AC 1
V2 0 -vcc 10
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.step param R list 100 500 1k 2k 5k 10k
.dc UB1 -0.25 0.25 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 948 680
WIRE -256 -320 -256 -368
WIRE 0 -320 0 -368
WIRE -256 -208 -256 -240
WIRE -256 -208 -320 -208
WIRE 0 -208 0 -240
WIRE 64 -208 0 -208
WIRE -256 -128 -256 -208
WIRE 0 -128 0 -208
WIRE 704 -128 704 -176
WIRE 912 -128 912 -176
WIRE -320 -80 -544 -80
WIRE 288 -80 64 -80
WIRE -544 -16 -544 -80
WIRE 288 -16 288 -80
WIRE 704 32 704 -48
WIRE 912 32 912 -48
WIRE -544 144 -544 64
WIRE -256 144 -256 -32
WIRE -128 144 -256 144
WIRE 0 144 0 -32
WIRE 0 144 -128 144
WIRE 288 144 288 64
WIRE -128 176 -128 144
WIRE -128 272 -128 256
FLAG 704 32 0
FLAG 704 -176 VCC
FLAG 0 -368 VCC
FLAG -256 -368 VCC
FLAG -256 -208 UC1
FLAG 0 -208 UC2
FLAG -128 272 -VCC
FLAG 912 -176 -vcc
FLAG 912 32 0
FLAG 288 144 0
FLAG -544 144 0
SYMBOL npn -320 -128 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL npn 64 -128 M0
SYMATTR InstName Q2
SYMATTR Value 2N2222
SYMBOL res -16 -336 R0
SYMATTR InstName RC2
SYMATTR Value {R}
SYMBOL res -272 -336 R0
SYMATTR InstName RC1
SYMATTR Value {R}
SYMBOL voltage 288 -32 R0
SYMATTR InstName UB2
SYMATTR Value 0
SYMBOL voltage 704 -144 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL current -128 176 R0
SYMATTR InstName I1
SYMATTR Value 2m
SYMBOL voltage -544 -32 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMATTR InstName ub1
SYMBOL voltage 912 -32 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 10
TEXT -568 376 Left 2 !.step param R list 100 500 1k 2k 5k 10k
TEXT -608 400 Left 2 !.dc UB1 -0.25 0.25 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\1d27dde79883_ideal_oscillations.asc
* Generated by LTspice 26.0.1 for Windows.
* Oscillation Between Capacitor and Inductor
C1 N001 0 1F
V2 N002 0 PULSE(0 1 10m 1n 1n 10m 20m 10)
S1 N001 N003 N002 0 MYSW
V1 N003 0 10V
L1 N001 0 0.025H
.tran 0 25ms 15ms
.model MYSW SW(Ron=1 Roff=1Meg Vt=0.5)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 240 16 160 16
WIRE 160 48 160 16
WIRE 112 64 -48 64
WIRE -48 96 -48 64
WIRE 112 112 16 112
WIRE 240 112 240 16
WIRE 384 112 240 112
WIRE 384 128 384 112
WIRE 160 144 160 128
WIRE 240 144 240 112
WIRE 16 160 16 112
WIRE 240 224 240 208
WIRE 384 224 384 208
WIRE 384 224 240 224
WIRE 160 256 160 224
WIRE 240 256 240 224
WIRE 240 256 160 256
WIRE 16 272 16 240
WIRE 240 272 240 256
SYMBOL sw 160 32 R0
SYMATTR InstName S1
SYMATTR Value MYSW
SYMBOL voltage 160 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10V
SYMBOL ind 368 112 R0
SYMATTR InstName L1
SYMATTR Value 0.025H
SYMBOL cap 224 144 R0
SYMATTR InstName C1
SYMATTR Value 1uF
SYMBOL voltage 16 144 R0
WINDOW 3 -151 197 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 1 10m 1n 1n 10m 20m 10)
SYMATTR InstName V2
FLAG 240 272 0
FLAG -48 96 0
FLAG 16 272 0
TEXT -56 392 Left 2 !.tran 0 25ms 15ms
TEXT -200 368 Left 2 !.model MYSW SW(Ron=1 Roff=1Meg Vt=0.5)
TEXT -64 -72 Left 2 ;Oscillation Between Capacitor and Inductor
* Z:\home\khalils\Downloads\files\data\raw_asc\100de62ee06a_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 2k
D2 N004 0 D
R2 N004 N003 2k
V1 N001 0 2.5
D1 N002 N003 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 96 96 96
WIRE 352 96 272 96
WIRE 512 96 416 96
WIRE 96 144 96 96
WIRE 512 160 512 96
WIRE 512 272 512 240
WIRE 96 368 96 224
WIRE 512 368 512 336
SYMBOL res 528 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 2k
SYMBOL diode 496 272 R0
SYMATTR InstName D2
SYMBOL diode 352 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL res 288 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2k
SYMBOL voltage 96 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.5
FLAG 96 368 0
FLAG 512 368 0
TEXT 62 392 Left 2 !.tran 10ms
* Z:\home\khalils\Downloads\files\data\raw_asc\875bffe873cb_DN2535_test.asc
* Generated by LTspice 26.0.1 for Windows.
* 1. Add a "nmos" component to the schematic.\n \n2. Replace the value NMOS with DN2535\n on your nmos-transistor in the schematic.\n \n6. Put the model either on the schematic or into a file.\n \nAdd the SPICE line \n .include supertex.lib\nto your schematic if you use a model file. \nI recommend to keep the model file in the same \nfolder as the schematic. This makes a complete\nbackup of a circuit easy.
* Vgs -2, -1, 0
* Plot Id(M1)
* Depletion Mode NMOSFET DN2535 From Supertex
* Warning, the original supertex.lib file contains 75 useless/wrong ".ENDS" lines.\nThey have to be removed or made to comments, e.g. "*.ENDS".
V2 N001 0 5
V1 N002 0 0
M1 N001 N002 0 0 DN2535
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 0 10 0.01 V1 -2 0 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1512 988
WIRE -32 128 -256 128
WIRE -256 160 -256 128
WIRE -32 176 -32 128
WIRE -304 240 -448 240
WIRE -448 272 -448 240
WIRE -448 400 -448 352
WIRE -256 400 -256 256
WIRE -256 400 -448 400
WIRE -32 400 -32 256
WIRE -32 400 -256 400
WIRE -448 432 -448 400
SYMBOL voltage -32 160 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -448 256 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL nmos -304 160 R0
SYMATTR InstName M1
SYMATTR Value DN2535
FLAG -448 432 0
TEXT -488 -32 Left 0 !.dc V2 0 10 0.01 V1 -2 0 1
TEXT -472 488 Left 0 ;1. Add a "nmos" component to the schematic.\n \n2. Replace the value NMOS with DN2535\n    on your nmos-transistor in the schematic.\n \n6. Put the model either  on the schematic or into a file.\n \nAdd the SPICE line  \n    .include supertex.lib\nto your schematic if you use a model file. \nI recommend to keep the model file in the same \nfolder as the schematic. This makes a complete\nbackup of a circuit easy.
TEXT -176 -32 Left 0 ;Vgs  -2, -1, 0
TEXT -488 -104 Left 0 ;Plot Id(M1)
TEXT -488 -224 Left 0 ;Depletion Mode NMOSFET DN2535 From Supertex
TEXT -488 -176 Left 0 ;Warning, the original supertex.lib file contains 75 useless/wrong  ".ENDS" lines.\nThey have to be removed or made to comments, e.g. "*.ENDS".
* Z:\home\khalils\Downloads\files\data\raw_asc\129648a0c45e_AFE_bandpass_v3.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac dec 100 1 100k
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
;step param R1 LIST 5.544 5.6 5.656
;step param L1 LIST 19.8u 22u 24.2u
;step param C1 LIST 0.95u 1u 1.05u
R2 N001 0 1k
V1 5V 0 5
V2 -5V 0 -5
XU1 N002 N001 5V -5V OUT level2 Avol=1Meg GBW=33Meg Slew=11Meg Vos=5u Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R3 OUT N001 900k
C1 N002 0 13n
R1 N002 IN 309
L1 N002 0 2.2m
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1364 680
WIRE 432 -64 368 -64
WIRE 592 -64 512 -64
WIRE 688 -64 592 -64
WIRE 832 -64 768 -64
WIRE 368 -16 368 -64
WIRE 592 80 592 -64
WIRE 688 80 592 80
WIRE 832 96 832 -64
WIRE 832 96 752 96
WIRE 928 96 832 96
WIRE 944 96 928 96
WIRE 272 112 240 112
WIRE 464 112 352 112
WIRE 592 112 464 112
WIRE 688 112 592 112
WIRE 464 160 464 112
WIRE 592 160 592 112
WIRE 464 272 464 240
WIRE 592 272 592 224
WIRE 592 272 464 272
WIRE 592 288 592 272
IOPIN 928 96 Out
IOPIN 240 112 In
SYMBOL OpAmps\\UniversalOpAmp2 720 96 R0
SYMATTR InstName U1
SYMATTR Value2 Avol=1Meg GBW=33Meg Slew=11Meg Vos=5u
SYMBOL voltage 768 -352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 448 144 R0
SYMATTR InstName L1
SYMATTR Value 2.2m
SYMBOL cap 576 160 R0
SYMATTR InstName C1
SYMATTR Value 13n
SYMBOL res 784 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 900k
SYMBOL voltage 880 -352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 528 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 368 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 309
FLAG 592 288 0
FLAG 368 -16 0
FLAG 768 -256 0
FLAG 880 -256 0
FLAG 720 64 5V
FLAG 768 -336 5V
FLAG 880 -336 -5V
FLAG 720 128 -5V
FLAG 928 96 OUT
FLAG 240 112 IN
TEXT 872 208 Left 2 ;.ac dec 100 1 100k
TEXT 880 256 Left 2 !;step param R1 LIST 5.544 5.6 5.656
TEXT 880 304 Left 2 !;step param L1 LIST 19.8u 22u 24.2u
TEXT 880 352 Left 2 !;step param C1 LIST 0.95u 1u 1.05u