Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\13a5433f4fb3_CMOS_NOR.asc
* Generated by LTspice 26.0.1 for Windows.
M4 Out B Vdd N003 NMOD1 l=1u w=25u
M3 Out A Vdd N002 NMOD1 l=1u w=25u
M2 N001 B Out Vss PMOD1 l=1u w=100u
M1 Vss A N001 Vss PMOD1 l=1u w=100u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model PMOD1 pmos (KP=100u GAMMA=0.9 phi=0.6 lambda=0.02 VTO=-0.7)
.model NMOD1 nmos (KP=200u GAMMA=0.9 phi=0.6 lambda=0.02 VTO=0.7)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 48 208 32
WIRE 240 48 208 48
WIRE 208 64 208 48
WIRE 240 112 240 48
WIRE 240 112 208 112
WIRE 160 144 128 144
WIRE 208 208 208 160
WIRE 240 256 240 112
WIRE 240 256 208 256
WIRE 160 288 128 288
WIRE 208 352 208 304
WIRE 208 352 96 352
WIRE 320 352 208 352
WIRE 352 352 320 352
WIRE 96 368 96 352
WIRE 320 368 320 352
WIRE 48 448 16 448
WIRE 96 448 96 416
WIRE 272 448 240 448
WIRE 320 448 320 416
WIRE 96 480 96 464
WIRE 208 480 96 480
WIRE 320 480 320 464
WIRE 320 480 208 480
WIRE 208 512 208 480
IOPIN 208 32 In
IOPIN 208 512 In
IOPIN 16 448 In
IOPIN 128 144 In
IOPIN 240 448 In
IOPIN 128 288 In
IOPIN 352 352 Out
SYMBOL nmos4 48 368 R0
SYMATTR InstName M3
SYMATTR Value NMOD1
SYMATTR Value2 l=1u w=25u
SYMBOL pmos4 160 208 R0
SYMATTR InstName M2
SYMATTR Value PMOD1
SYMATTR Value2 l=1u w=100u
SYMBOL pmos4 160 64 R0
SYMATTR InstName M1
SYMATTR Value PMOD1
SYMATTR Value2 l=1u w=100u
SYMBOL nmos4 272 368 R0
SYMATTR InstName M4
SYMATTR Value NMOD1
SYMATTR Value2 l=1u w=25u
FLAG 208 32 Vss
FLAG 208 512 Vdd
FLAG 16 448 A
FLAG 128 144 A
FLAG 240 448 B
FLAG 128 288 B
FLAG 352 352 Out
TEXT -112 640 Left 2 !.model PMOD1 pmos (KP=100u GAMMA=0.9 phi=0.6 lambda=0.02 VTO=-0.7)
TEXT -112 608 Left 2 !.model NMOD1 nmos (KP=200u GAMMA=0.9 phi=0.6 lambda=0.02 VTO=0.7)
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17606.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N001 DRN GATE N003 N002 MAX17606 ;pnba GND)VIN)DRN)GATE)VDRV)TOFF
V1 N001 0 12
C8 N003 0 2.2
R11 N002 0 40.2k
V2 DRN 0 pulse(-150m 40m 0.3m 2n 2n 1.67u 3.33u)
.tran 0.4m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17606.asy)
.lib MAX17606.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2104 680
WIRE 1216 -480 960 -480
WIRE 960 -448 960 -480
WIRE 960 -352 960 -368
WIRE 1216 -320 1216 -480
WIRE 1040 -288 592 -288
WIRE 1088 -288 1040 -288
WIRE 1392 -256 1344 -256
WIRE 592 -192 592 -288
WIRE 1392 -192 1392 -256
WIRE 1040 -160 1008 -160
WIRE 1088 -160 1040 -160
WIRE 592 -96 592 -112
WIRE 1392 -48 1392 -112
WIRE 1392 -48 1344 -48
WIRE 1088 -16 1008 -16
WIRE 1392 -16 1392 -48
WIRE 1008 0 1008 -16
WIRE 1008 80 1008 64
FLAG 960 -352 0
FLAG 1008 80 0
FLAG 1392 -16 0
FLAG 592 -96 0
FLAG 1040 -160 GATE
FLAG 1040 -288 DRN
SYMBOL MAX17606 1216 -160 R0
SYMATTR InstName U1
SYMBOL voltage 960 -464 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 992 0 R0
SYMATTR InstName C8
SYMATTR Value 2.2
SYMBOL res 1376 -208 R0
SYMATTR InstName R11
SYMATTR Value 40.2k
SYMBOL voltage 592 -208 R0
SYMATTR InstName V2
SYMATTR Value pulse(-150m 40m 0.3m 2n 2n 1.67u 3.33u)
TEXT 1352 48 Left 2 !.tran 0.4m
* Z:\home\khalils\Downloads\files\data\raw_asc\0a5d2e180d11_AND_Gate_Negative.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vout N003 1k
V2 N002 0 V
D2 N002 Vout D
D1 N001 Vout D
V3 N003 0 5
V1 N001 0 V
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -144 -48 -480 -48
WIRE 128 -48 -80 -48
WIRE 128 16 128 -48
WIRE 320 16 128 16
WIRE 448 16 320 16
WIRE 320 32 320 16
WIRE -144 64 -240 64
WIRE 128 64 128 16
WIRE 128 64 -80 64
WIRE 320 144 320 112
WIRE -480 176 -480 -48
WIRE -240 176 -240 64
WIRE -480 320 -480 256
WIRE -240 320 -240 256
WIRE 320 320 320 224
SYMBOL diode -144 -32 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL voltage 320 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -480 160 R0
SYMATTR InstName V1
SYMBOL diode -144 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL voltage -240 160 R0
SYMATTR InstName V2
SYMBOL res 304 16 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG -480 320 0
FLAG -240 320 0
FLAG 320 320 0
FLAG 448 16 Vout
* Z:\tmp\asc_dec_bjh7r6w2\128b55efef1d_Circuitul_electric_rezistiv_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
VE6 7 8 43
VE5 5 N006 4
VE7 N003 N007 18
IJ1 N003 N002 1
VE1 N001 N002 7
R6 N005 8 2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2972 764
WIRE 384 -112 96 -112
WIRE 768 -112 464 -112
WIRE 960 -112 768 -112
WIRE 1216 -112 1040 -112
WIRE 768 240 768 80
WIRE 928 240 768 240
WIRE 1216 240 1216 -112
WIRE 96 288 96 192
WIRE 96 288 -352 288
WIRE 96 352 96 288
WIRE 768 384 768 240
WIRE -64 400 -64 336
WIRE -64 400 -144 400
WIRE -352 448 -352 400
WIRE 96 480 96 432
WIRE -352 608 -352 528
WIRE -352 608 -544 608
WIRE -224 608 -352 608
WIRE 96 608 96 560
WIRE 96 608 -144 608
WIRE 288 608 96 608
WIRE 768 608 768 464
WIRE 1040 608 944 608
WIRE 1216 608 1216 240
WIRE 1216 608 1120 608
SYMBOL voltage -240 608 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName E6
SYMATTR Value 43
SYMBOL voltage 768 368 R0
SYMATTR InstName E5
SYMATTR Value 4
SYMBOL voltage 1136 608 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName E7
SYMATTR Value 18
SYMBOL current 1040 -112 R90
WINDOW 0 -32 40 VBottom 2
WINDOW 3 32 40 VTop 2
SYMATTR InstName J1
SYMATTR Value 1
SYMBOL voltage 368 -112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName E1
SYMATTR Value 7
SYMBOL res 80 464 R0
SYMATTR InstName R6
SYMATTR Value 2
FLAG 96 288 4
FLAG 768 240 5
FLAG -352 608 7
FLAG 96 608 8
FLAG -64 336 4
* Z:\home\khalils\Downloads\files\data\raw_asc\3b4a4f3b3f59_lab1Scheme.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1097.asy)
;dc V3 -400m 400m .1m
;tran 10ms
V2 0 N005 12
V3 N004 0 SINE(0 80m 1k) AC 1
R2 N003 N002 50.42k
V1 N001 0 12
XU1 0 N002 N001 N005 N003 LT1097 ;pnba In+)In-)V+)V-)OUT
R1 N002 N004 990.3
.ac dec 100 1 10e6
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 916 680
WIRE 560 -272 384 -272
WIRE 256 -192 192 -192
WIRE 432 -192 336 -192
WIRE 560 -160 560 -272
WIRE 384 -96 384 -272
WIRE 384 -96 304 -96
WIRE 304 -48 304 -96
WIRE -48 -32 -368 -32
WIRE 192 -32 192 -192
WIRE 192 -32 32 -32
WIRE 272 -32 192 -32
WIRE 432 -16 432 -192
WIRE 432 -16 336 -16
WIRE 560 -16 560 -80
WIRE 912 -16 560 -16
WIRE 272 0 192 0
WIRE -368 32 -368 -32
WIRE 560 48 560 -16
WIRE 304 192 304 16
WIRE 560 192 560 128
WIRE 560 192 304 192
WIRE -368 432 -368 112
WIRE 192 432 192 0
WIRE 192 432 -368 432
WIRE 912 432 912 -16
WIRE 912 432 192 432
WIRE 192 480 192 432
SYMBOL Misc\\battery 560 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL Misc\\battery 560 -176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 48 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 990.3
SYMBOL OpAmps\\LT1097 304 -80 R0
SYMATTR InstName U1
SYMBOL res 352 -208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50.42k
SYMBOL voltage -368 16 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value SINE(0 80m 1k)
FLAG 192 480 0
TEXT -736 224 Left 2 !;dc V3 -400m 400m .1m
TEXT -728 32 Left 2 !;tran 10ms
TEXT -712 112 Left 2 !.ac dec 100 1 10e6
* Z:\home\khalils\Downloads\files\data\raw_asc\644e181f5845_scheme3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1014.asy)
V2 N003 0 {Vcc}
R1 N002 N004 1k
XU1 0 N002 N003 N005 N001 LT1013 ;pnba In+)In-)V+)V-)OUT
R2 N001 N002 2k
V3 0 N005 {Vcc}
Vin N004 0 DC 0
D2 N002 P001 EDZV10B
D1 N001 P001 1N5818
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.param Vcc=22
.dc Vin {-1.1*Vcc} {1.1*Vcc} 0.01
.inc "C:\Users\alexe\study\electronic-devices-labs\lib\edzv10b_ltspice.lib"
.lib LT1013.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1264 680
WIRE 272 -48 240 -48
WIRE 112 48 112 -48
WIRE 160 48 112 48
WIRE 272 48 272 -48
WIRE 272 48 240 48
WIRE 512 96 192 96
WIRE 512 112 512 96
WIRE 192 176 192 96
WIRE 0 192 -96 192
WIRE 112 192 112 48
WIRE 112 192 80 192
WIRE 160 192 112 192
WIRE -96 208 -96 192
WIRE 272 208 272 48
WIRE 272 208 224 208
WIRE 384 208 272 208
WIRE 512 208 512 192
WIRE 512 208 432 208
WIRE 160 224 128 224
WIRE 432 224 432 208
WIRE 512 224 512 208
WIRE 128 256 128 224
WIRE -96 304 -96 288
WIRE 192 336 192 240
WIRE 512 336 512 304
WIRE 512 336 192 336
SYMBOL zener 112 -32 R270
WINDOW 0 36 32 VTop 2
WINDOW 3 46 -41 VBottom 2
SYMATTR InstName D2
SYMATTR Value EDZV10B
SYMBOL voltage 512 208 R0
SYMATTR InstName V3
SYMATTR Value {Vcc}
SYMBOL voltage 512 96 R0
SYMATTR InstName V2
SYMATTR Value {Vcc}
SYMBOL OpAmps\\LT1014 192 144 R0
SYMATTR InstName U1
SYMBOL res 96 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 240 -64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 -10 -32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N5818
SYMBOL voltage -96 192 R0
SYMATTR InstName Vin
SYMATTR Value DC 0
SYMBOL res 256 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2k
FLAG 128 256 0
FLAG -96 304 0
FLAG 432 224 0
TEXT 304 -24 Left 2 !.param Vcc=22
TEXT 304 48 Left 2 !.dc Vin {-1.1*Vcc} {1.1*Vcc} 0.01
TEXT 304 8 Left 2 !.inc "C:\\Users\\alexe\\study\\electronic-devices-labs\\lib\\edzv10b_ltspice.lib"
* Z:\home\khalils\Downloads\files\data\raw_asc\cf2a95dfa53d_AND.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N003 N002 N005 0 C5NNMOS l=0.6u w=3.6u
M2 N005 N004 0 0 C5NNMOS l=0.6u w=3.6u
M3 N001 N002 N003 N001 C5NPMOS l=0.6u w=7.2u
M4 N001 N004 N003 N001 C5NPMOS l=0.6u w=7.2u
V1 N001 0 5
VA N002 0 PULSE(0 5 0 1n 1n 5u 10u)
VB N004 0 PULSE(0 5 0 1n 1n 10u 20u)
M5 N001 N003 Vout N001 C5NPMOS l=0.6u w=7.2u
M6 Vout N003 0 0 C5NNMOS l=0.6u w=3.6u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include D:\NIELIT\ENGR3426\ENGR3426\engr3426.sub
.tran 100u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1200 680
WIRE 672 -160 256 -160
WIRE 896 -160 672 -160
WIRE 1040 -160 896 -160
WIRE 672 -112 672 -160
WIRE 160 -64 48 -64
WIRE 256 -64 256 -160
WIRE 256 -64 160 -64
WIRE 416 -64 256 -64
WIRE 512 -64 416 -64
WIRE 672 0 672 -32
WIRE 48 32 48 -64
WIRE 416 32 416 -64
WIRE 896 48 896 -160
WIRE 160 80 160 -64
WIRE 160 80 48 80
WIRE 512 80 512 -64
WIRE 512 80 416 80
WIRE 1040 96 1040 -160
WIRE 1040 96 896 96
WIRE -64 112 -496 112
WIRE 0 112 -64 112
WIRE 848 128 704 128
WIRE -112 144 -272 144
WIRE 368 144 368 112
WIRE 368 144 -112 144
WIRE -496 192 -496 112
WIRE -272 192 -272 144
WIRE 896 192 896 144
WIRE 1088 192 896 192
WIRE 48 208 48 128
WIRE 160 208 48 208
WIRE 416 208 416 128
WIRE 416 208 160 208
WIRE 896 224 896 192
WIRE 160 256 160 208
WIRE 704 256 704 128
WIRE 704 256 160 256
WIRE 160 272 160 256
WIRE 1056 272 896 272
WIRE 704 304 704 256
WIRE 848 304 704 304
WIRE -496 320 -496 272
WIRE -272 320 -272 272
WIRE 288 320 160 320
WIRE -64 352 -64 112
WIRE 112 352 -64 352
WIRE 160 416 160 368
WIRE 288 464 288 320
WIRE 288 464 160 464
WIRE -112 496 -112 144
WIRE 112 496 -112 496
WIRE 288 512 288 464
WIRE 288 512 160 512
WIRE 896 512 896 320
WIRE 896 512 288 512
WIRE 1056 512 1056 272
WIRE 1056 512 896 512
WIRE 160 544 160 512
FLAG -496 320 0
FLAG -272 320 0
FLAG 672 0 0
FLAG 160 544 0
FLAG 1088 192 Vout
IOPIN 1088 192 Out
SYMBOL nmos4 112 272 R0
SYMATTR InstName M1
SYMATTR Value C5NNMOS
SYMATTR Value2 l=0.6u w=3.6u
SYMBOL nmos4 112 416 R0
SYMATTR InstName M2
SYMATTR Value C5NNMOS
SYMATTR Value2 l=0.6u w=3.6u
SYMBOL pmos4 0 32 R0
SYMATTR InstName M3
SYMATTR Value C5NPMOS
SYMATTR Value2 l=0.6u w=7.2u
SYMBOL pmos4 368 32 R0
SYMATTR InstName M4
SYMATTR Value C5NPMOS
SYMATTR Value2 l=0.6u w=7.2u
SYMBOL voltage 672 -128 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -496 176 R0
WINDOW 3 -238 189 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VA
SYMATTR Value PULSE(0 5 0 1n 1n 5u 10u)
SYMBOL voltage -272 176 R0
WINDOW 3 -99 191 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value PULSE(0 5 0 1n 1n 10u 20u)
SYMBOL pmos4 848 48 R0
SYMATTR InstName M5
SYMATTR Value C5NPMOS
SYMATTR Value2 l=0.6u w=7.2u
SYMBOL nmos4 848 224 R0
SYMATTR InstName M6
SYMATTR Value C5NNMOS
SYMATTR Value2 l=0.6u w=3.6u
TEXT -760 544 Left 2 !.include D:\\NIELIT\\ENGR3426\\ENGR3426\\engr3426.sub
TEXT -760 568 Left 2 !.tran 100u
* Z:\tmp\asc_dec_bjh7r6w2\0ec10bfb3a6e_Lab_1_Circ_3__Vin_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N002 10k
XU2 V2 N003 Vcc Vss V_02 LM324 ;pnba In+)In-)V+)V-)OUT
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1560 680
WIRE 192 -320 176 -320
WIRE 400 -320 272 -320
WIRE 528 -320 480 -320
WIRE 64 -208 48 -208
WIRE 176 -208 176 -320
WIRE 176 -208 144 -208
WIRE 352 -208 176 -208
WIRE 528 -208 528 -320
WIRE 592 -208 528 -208
WIRE 704 -208 672 -208
WIRE 48 -192 48 -208
WIRE 176 -96 176 -208
WIRE 528 -96 528 -208
WIRE 544 -96 528 -96
WIRE 352 -80 352 -208
WIRE 704 -80 704 -208
WIRE 704 -80 608 -80
WIRE 720 -80 704 -80
WIRE 544 -64 528 -64
SYMBOL res 176 -304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL OpAmps\\opamp2 576 -144 R0
SYMATTR InstName U2
SYMATTR Value LM324
FLAG 48 -192 0
FLAG 224 -112 Vcc
FLAG 720 -80 V_02
FLAG 576 -112 Vcc
FLAG 576 -48 Vss
FLAG 528 -64 V2
* Z:\home\khalils\Downloads\files\data\raw_asc\3db4a37660dc_1013D.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1013D.asy)
V3 N003 0 sine(0 .5 10K)
R2 N001 0 5K
V1 +V 0 15
V2 -V 0 -15
XU1 N003 N001 +V -V N002 LT1013 ;pnba In+)In-)V+)V-)OUT
R1 N002 N001 50K
.tran 1m
.lib LT1013.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 680
WIRE 192 0 176 0
WIRE 288 0 272 0
WIRE 352 0 288 0
WIRE 448 0 432 0
WIRE -80 64 -80 48
WIRE 32 64 32 48
WIRE 336 96 336 80
WIRE 288 112 288 0
WIRE 304 112 288 112
WIRE 448 128 448 0
WIRE 448 128 368 128
WIRE 304 144 160 144
WIRE -80 160 -80 144
WIRE 32 160 32 144
WIRE 160 160 160 144
WIRE 336 176 336 160
WIRE 160 256 160 240
SYMBOL opamps\\LT1013D 336 64 R0
SYMATTR InstName U1
SYMBOL voltage 32 48 R0
WINDOW 39 24 125 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -80 48 R0
WINDOW 39 24 125 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 448 -16 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 50K
SYMBOL res 288 -16 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL voltage 160 144 R0
SYMATTR InstName V3
SYMATTR Value sine(0 .5 10K)
FLAG -80 160 0
FLAG 336 80 +V
FLAG -80 48 +V
FLAG 176 0 0
FLAG 160 256 0
FLAG 32 160 0
FLAG 32 48 -V
FLAG 336 176 -V
TEXT 384 240 Left 0 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\906c5064f7b3_Set_unit.asc
* Generated by LTspice 26.0.1 for Windows.
;tran 0 1 0
V3 -12V 0 -12V
V1 LM35 0 PWL(0 0 0.2 0 0.8 1 1 1)
XU3 N002 Vset 12V -12V Vset LM741/NS ;pnba In+)In-)V+)V-)OUT
V5 R_POT_1 0
R_POT_1 N002 N003 R=V(R_POT_1)
R2 12V N001 40k
R1 0 N003 3k
R_POT2 N001 N002 R= 100k-V(R_POT_1)
V4 5V 0 5V
V2 12V 0 12
.include D:\GITHUB\EE313-Term-project\Simulation\Sensing Unit\LM741.MOD
.dc V5 1 100000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4272 2160
WIRE -912 320 -912 256
WIRE -624 320 -624 256
WIRE -480 320 -480 256
WIRE -336 320 -336 256
WIRE -912 448 -912 400
WIRE -624 448 -624 400
WIRE -480 448 -480 400
WIRE -336 448 -336 400
WIRE 416 1392 336 1392
WIRE 512 1392 496 1392
WIRE 880 1392 672 1392
WIRE 336 1456 336 1392
WIRE 752 1504 752 1456
WIRE 672 1520 672 1392
WIRE 720 1520 672 1520
WIRE 880 1536 880 1392
WIRE 880 1536 784 1536
WIRE 928 1536 880 1536
WIRE 176 1552 176 1536
WIRE 336 1552 336 1536
WIRE 720 1552 336 1552
WIRE 336 1584 336 1552
WIRE 752 1648 752 1568
WIRE 176 1664 176 1632
WIRE 336 1712 336 1664
WIRE 400 1712 336 1712
WIRE 512 1712 480 1712
SYMBOL voltage -912 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 0.2 0 0.8 1 1 1)
SYMBOL res 320 1568 R0
SYMATTR InstName R_POT_1
SYMATTR Value R=V(R_POT_1)
SYMBOL voltage -624 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL voltage -480 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -12V
SYMBOL res 496 1696 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3k
SYMBOL voltage -336 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5V
SYMBOL res 320 1440 R0
SYMATTR InstName R_POT2
SYMATTR Value R= 100k-V(R_POT_1)
SYMBOL res 512 1376 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 40k
SYMBOL OpAmps\\opamp2 752 1472 R0
SYMATTR InstName U3
SYMATTR Value LM741/NS
SYMBOL voltage 176 1536 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value ""
FLAG -912 448 0
FLAG -912 256 LM35
FLAG -624 448 0
FLAG -624 256 12V
FLAG -480 448 0
FLAG -480 256 -12V
FLAG -336 448 0
FLAG -336 256 5V
FLAG 752 1456 12V
FLAG 752 1648 -12V
FLAG 928 1536 Vset
FLAG 512 1392 12V
FLAG 512 1712 0
FLAG 176 1664 0
FLAG 176 1536 R_POT_1
TEXT -160 352 Left 2 !.include D:\\GITHUB\\EE313-Term-project\\Simulation\\Sensing Unit\\LM741.MOD
TEXT -1096 352 Left 2 !;tran 0 1 0
TEXT 128 1480 VRight 2 !.dc V5 1 100000
* Z:\home\khalils\Downloads\files\data\raw_asc\8e29ceb47ae8_apbp.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N001 0 10.417k
V1 Vref 0 5
R1 N001 Vin 10k
XU1 Vout N001 Vout opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
Vin Vin 0 0
R3 N001 Vref 250k
.dc Vin -1 1 0.01
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 800
WIRE -112 -48 -144 -48
WIRE 0 -48 -32 -48
WIRE -112 64 -144 64
WIRE 0 64 0 -48
WIRE 0 64 -32 64
WIRE 160 64 0 64
WIRE 304 80 224 80
WIRE 400 80 304 80
WIRE 0 96 0 64
WIRE 160 96 96 96
WIRE 96 208 96 96
WIRE 304 208 304 80
WIRE 304 208 96 208
WIRE 0 224 0 176
WIRE 64 544 64 512
WIRE 160 544 160 512
WIRE 64 656 64 624
WIRE 160 656 160 624
SYMBOL res -16 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 250k
SYMBOL res -16 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 64 528 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 160 528 R0
SYMATTR InstName Vin
SYMATTR Value 0
SYMBOL Opamps\\opamp 192 144 M180
SYMATTR InstName U1
SYMBOL res -16 80 R0
SYMATTR InstName R2
SYMATTR Value 10.417k
FLAG 64 512 Vref
FLAG 64 656 0
FLAG 160 656 0
FLAG 400 80 Vout
FLAG -144 64 Vin
FLAG 160 512 Vin
FLAG 0 224 0
FLAG -144 -48 Vref
TEXT 32 784 Left 2 !.dc Vin -1 1 0.01
TEXT 32 752 Left 2 !.lib opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7104.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7104.asy)
R2 N002 0 10K
Rload OUT 0 12
XU1 IN N002 IN N001 OUT 0 ADP7104 ;pnba Vin)ADJ)EN)PG)Vout)GND
R1 OUT N002 17.4k
C1 OUT 0 2.2 Rser=3m
V1 IN 0 PWL(0 0 20u 4.3)
R3 OUT N001 100k
.tran 3m startup
.lib ADP7104.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -144 32
WIRE 96 32 80 32
WIRE 400 32 352 32
WIRE 528 32 480 32
WIRE -144 48 -144 32
WIRE 400 128 352 128
WIRE 528 128 528 32
WIRE 528 128 400 128
WIRE 608 128 528 128
WIRE 624 128 608 128
WIRE -144 144 -144 128
WIRE 528 144 528 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 400 224 400 208
WIRE 400 224 352 224
WIRE 528 224 528 208
WIRE 624 224 624 208
WIRE 400 240 400 224
WIRE 224 304 224 288
WIRE 400 336 400 320
SYMBOL res 384 112 R0
SYMATTR InstName R1
SYMATTR Value 17.4k
SYMBOL ADP7104 224 128 R0
SYMATTR InstName U1
SYMBOL cap 512 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=3m
SYMBOL res 608 112 R0
SYMATTR InstName Rload
SYMATTR Value 12
SYMBOL res 496 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 384 224 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage -144 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 20u 4.3)
FLAG 224 304 0
FLAG -144 144 0
FLAG -144 32 IN
FLAG 624 224 0
FLAG 528 224 0
FLAG 608 128 OUT
FLAG 400 336 0
TEXT 512 304 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\068b7fe980aa_Lab07P01B.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N003 N002 10
R1 N003 N001 1
R2 0 N003 40
R5 N002 N001 15
I1 0 N001 1
R4 N002 0 50
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1624 680
WIRE 368 -96 112 -96
WIRE 704 -96 448 -96
WIRE 112 48 112 -96
WIRE 224 48 112 48
WIRE 416 48 304 48
WIRE 512 48 416 48
WIRE 704 48 704 -96
WIRE 704 48 592 48
WIRE 112 144 112 48
WIRE 416 144 416 48
WIRE 704 144 704 48
WIRE 112 336 112 224
WIRE 416 336 416 224
WIRE 416 336 112 336
WIRE 704 336 704 224
WIRE 704 336 416 336
DATAFLAG 112 32 ""
SYMBOL res 432 240 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 40
SYMBOL res 496 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL res 688 128 R0
SYMATTR InstName R4
SYMATTR Value 50
SYMBOL res 464 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 15
SYMBOL current 112 224 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName I1
SYMATTR Value 1
SYMBOL res 320 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
FLAG 112 336 0
TEXT 872 328 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1073-12.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1073-12.asy)
V1 IN 0 2.8
Rload OUT 0 240
XU1 IN IN N001 0 0 MP_01 MP_02 OUT LT1073 top=904K bot=16.3K ;pnba Ilim)Vin)SW1)SW2)GND)))FB
C2 OUT 0 100 Rser=0.02
L1 IN N001 33 Rser=0.02 Rpar=5000
D1 N001 OUT MBRS140
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 25m startup
.lib LT1073.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2392 1424
WIRE 1376 912 1200 912
WIRE 1504 912 1376 912
WIRE 1552 912 1504 912
WIRE 1680 912 1632 912
WIRE 1728 912 1680 912
WIRE 1840 912 1792 912
WIRE 1936 912 1840 912
WIRE 1200 928 1200 912
WIRE 1936 928 1936 912
WIRE 1376 960 1376 912
WIRE 1504 960 1504 912
WIRE 1200 1024 1200 1008
WIRE 1936 1024 1936 1008
WIRE 1680 1040 1680 912
WIRE 1680 1040 1568 1040
WIRE 1840 1104 1840 912
WIRE 1840 1104 1568 1104
WIRE 1840 1120 1840 1104
WIRE 1584 1168 1568 1168
WIRE 1840 1200 1840 1184
WIRE 1440 1264 1440 1248
SYMBOL schottky 1728 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL VOLTAGE 1200 912 R0
SYMATTR InstName V1
SYMATTR Value 2.8
SYMBOL res 1920 912 R0
SYMATTR InstName Rload
SYMATTR Value 240
SYMBOL PowerProducts\\LT1073-12 1440 1104 R0
SYMATTR InstName U1
SYMBOL POLCAP 1824 1120 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL IND 1536 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02 Rpar=5000
FLAG 1584 1168 0
FLAG 1440 1264 0
FLAG 1200 1024 0
FLAG 1936 1024 0
FLAG 1840 1200 0
FLAG 1936 912 OUT
FLAG 1200 912 IN
TEXT 1728 1264 Left 2 !.tran 25m startup