Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3007-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 1
Rload OUT 0 330
XU1 IN OUT OUT 0 IN LT3008-3.3 ;pnba IN)OUT)Sense)GND)_SHDN
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3007-3.3.asy)
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 330
SYMBOL PowerProducts\\LT3007-3.3 176 96 R0
SYMATTR InstName U1
TEXT 336 248 Left 2 !.tran 1
* Z:\tmp\asc_dec_bjh7r6w2\177d5da9cb8f_Power_arbitration_proposal_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 0 10000
D3 N002 N003 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 144 16 144
WIRE 192 144 176 144
WIRE 304 144 192 144
WIRE 336 144 304 144
WIRE 448 144 400 144
WIRE 192 208 192 144
WIRE 16 240 16 144
WIRE 192 336 192 288
WIRE 16 368 16 320
WIRE 304 432 304 144
WIRE 448 480 448 144
SYMBOL res 176 192 R0
SYMATTR InstName R1
SYMATTR Value 10000
SYMBOL schottky 336 160 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D3
FLAG 192 336 0
FLAG 16 368 0
* Z:\home\khalils\Downloads\files\data\raw_asc\002a86ca3041_Fig6_13_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Is(M1)
VSG 0 N001 0
VBS N002 0 0
VSD 0 N003 2
M1 N003 N001 0 N002 P_1u L=1u W=10u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSG 0 2 VBS 0 5 1
.include cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 688
WIRE 448 16 320 16
WIRE 672 16 448 16
WIRE 720 16 672 16
WIRE 320 32 320 16
WIRE 720 48 720 16
WIRE 448 112 448 16
WIRE 320 128 320 112
WIRE 400 128 320 128
WIRE 528 160 448 160
WIRE 672 160 672 16
WIRE 672 160 608 160
WIRE 672 208 672 160
WIRE 448 304 448 208
WIRE 672 304 672 288
WIRE 672 304 448 304
SYMBOL voltage 672 192 R0
WINDOW 0 41 57 Left 2
WINDOW 3 41 85 Left 2
SYMATTR InstName VSD
SYMATTR Value 2
SYMBOL voltage 512 160 M90
WINDOW 0 64 52 VBottom 2
WINDOW 3 62 93 VBottom 2
SYMATTR InstName VBS
SYMATTR Value 0
SYMBOL voltage 320 16 R0
WINDOW 0 -89 56 Left 2
WINDOW 3 -89 84 Left 2
SYMATTR InstName VSG
SYMATTR Value 0
SYMBOL pmos4 400 208 M180
WINDOW 123 56 100 Left 2
SYMATTR Value2 L=1u W=10u
SYMATTR InstName M1
SYMATTR Value P_1u
FLAG 720 48 0
TEXT 424 328 Left 2 !.dc VSG 0 2  VBS 0 5 1
TEXT 424 360 Left 2 !.include cmosedu_models.txt
TEXT 488 -8 Left 2 ;Plot Is(M1)
* Z:\home\khalils\Downloads\files\data\raw_asc\caccc3daf8b2_Lowpass.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 AC 1
C1 N002 0 14.6349p
R1 N002 0 50
R2 N002 N001 50
.ac dec 20 1MEG 10G
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -608 112 -640 112
WIRE -480 112 -528 112
WIRE -48 112 -480 112
WIRE -640 144 -640 112
WIRE -480 144 -480 112
WIRE -48 144 -48 112
WIRE -640 256 -640 224
WIRE -560 256 -640 256
WIRE -480 256 -480 208
WIRE -480 256 -560 256
WIRE -48 256 -48 224
WIRE -48 256 -480 256
WIRE -560 272 -560 256
SYMBOL voltage -640 128 R0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL res -512 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL res -64 128 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL cap -496 144 R0
SYMATTR InstName C1
SYMATTR Value 14.6349p
FLAG -560 272 0
TEXT -552 328 Left 2 !.ac dec 20 1MEG 10G
* Z:\home\khalils\Downloads\files\data\raw_asc\53e5fdef2f60_DAC.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac lin 1000 1 10000
V1 N001 0 SINE(0 10 5) AC 10
R4 0 N002 32
R1 N003 0 16
R2 N001 0 3300
C1 N001 N003 0.000000022
C2 N002 N001 0.00047
R3 N002 0 3300
.tran 2
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 964 680
WIRE 416 80 272 80
WIRE 528 80 416 80
WIRE 672 80 592 80
WIRE 832 80 672 80
WIRE 944 80 912 80
WIRE 272 96 272 80
WIRE 272 96 48 96
WIRE 48 128 48 96
WIRE 944 160 944 80
WIRE 272 176 272 160
WIRE 416 176 416 80
WIRE 672 176 672 80
WIRE 48 256 48 208
WIRE 272 256 48 256
WIRE 416 256 272 256
WIRE 672 256 416 256
WIRE 48 352 48 256
SYMBOL voltage 48 112 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 5)
SYMATTR Value2 AC 10
SYMBOL cap 592 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 0.00047
SYMBOL res 256 160 R0
SYMATTR InstName R1
SYMATTR Value 16
SYMBOL res 656 160 R0
SYMATTR InstName R3
SYMATTR Value 3300
SYMBOL cap 256 96 R0
SYMATTR InstName C1
SYMATTR Value 0.000000022
SYMBOL res 400 160 R0
SYMATTR InstName R2
SYMATTR Value 3300
SYMBOL res 928 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 32
FLAG 48 352 0
FLAG 944 160 0
TEXT 8 376 Left 2 !.tran 2
TEXT 112 376 Left 2 ;.ac lin 1000 1 10000
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1607.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 0.9
Cout OUT 0 6 Rser=10m
L1 IN N001 2.2 Rser=22m
Rload OUT 0 22K
XU1 OUT N002 IN MP_01 N001 MP_02 IN MP_03 MP_04 MP_05 0 ADP1607 ;pnba Vout)FB)Vin))SW))EN))))GND
R1 OUT N002 100K
R2 N002 0 60K
.tran 1.6m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1607.asy)
.lib ADP1607.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 980 680
WIRE 128 -16 32 -16
WIRE 320 -16 208 -16
WIRE 32 80 32 -16
WIRE 32 80 -48 80
WIRE 48 80 32 80
WIRE 320 80 320 -16
WIRE 320 80 304 80
WIRE -48 96 -48 80
WIRE 32 176 32 80
WIRE 48 176 32 176
WIRE 368 176 304 176
WIRE 480 176 368 176
WIRE 640 176 480 176
WIRE -48 192 -48 176
WIRE 368 192 368 176
WIRE 480 192 480 176
WIRE 640 192 640 176
WIRE 48 272 32 272
WIRE 368 272 304 272
WIRE 368 288 368 272
WIRE 480 288 480 256
WIRE 640 288 640 272
WIRE 368 384 368 368
FLAG -48 80 IN
FLAG 640 176 OUT
FLAG 32 272 0
FLAG -48 192 0
FLAG 640 288 0
FLAG 368 384 0
FLAG 480 288 0
SYMBOL voltage -48 80 R0
SYMATTR InstName V1
SYMATTR Value 0.9
SYMBOL cap 464 192 R0
WINDOW 3 40 38 Left 2
WINDOW 39 25 61 Left 2
SYMATTR Value 6
SYMATTR SpiceLine Rser=10m
SYMATTR InstName Cout
SYMBOL ind 112 0 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 7 58 VBottom 2
WINDOW 39 -45 59 VTop 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=22m
SYMBOL res 624 176 R0
SYMATTR InstName Rload
SYMATTR Value 22K
SYMBOL ADP1607 176 176 R0
SYMATTR InstName U1
SYMBOL res 352 176 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 352 272 R0
SYMATTR InstName R2
SYMATTR Value 60K
TEXT 456 392 Left 2 !.tran 1.6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\629abdb296c8_SummingAmplifire.asc
* Generated by LTspice 26.0.1 for Windows.
* Summing Amplifier\nOpAmp\nI4 = I1 + I2 + I3 \n= -(V1/R1 + V2/R2 + V3/R3)\nVout = -(R4/R1*V1 + R4/R2*V2 + R4/R3*V3)
R4 N002 N001 2
R5 0 N002 1
R1 N001 N003 1
V2 N004 0 15
V1 N003 0 10
R3 N001 N005 1
V3 N005 0 20
R2 N001 N004 1
XU1 N001 0 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
.lib opamp.sub
.tran 50m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 256 -96 96 -96
WIRE 496 -96 336 -96
WIRE -192 32 -576 32
WIRE -16 32 -112 32
WIRE -16 64 -16 32
WIRE 96 64 96 -96
WIRE 96 64 -16 64
WIRE 240 64 96 64
WIRE -576 80 -576 32
WIRE 496 80 496 -96
WIRE 496 80 304 80
WIRE 704 80 496 80
WIRE 240 96 144 96
WIRE -192 144 -416 144
WIRE -16 144 -16 64
WIRE -16 144 -112 144
WIRE 704 160 704 80
WIRE -416 208 -416 144
WIRE 144 256 144 96
WIRE -192 272 -256 272
WIRE -16 272 -16 144
WIRE -16 272 -112 272
WIRE 704 320 704 240
WIRE -256 368 -256 272
WIRE -576 576 -576 160
WIRE -416 576 -416 288
WIRE -256 576 -256 448
SYMBOL res -96 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL res 720 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 1
SYMBOL OpAmps\\opamp 272 16 R0
SYMATTR InstName U1
SYMBOL voltage -256 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 20
SYMBOL voltage -576 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL voltage -416 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL res -96 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL res 352 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2
SYMBOL res -96 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
FLAG -576 576 0
FLAG -416 576 0
FLAG -256 576 0
FLAG 704 320 0
FLAG 144 256 0
TEXT -936 -208 Left 2 ;Summing Amplifier\nOpAmp\nI4 = I1 + I2 + I3 \n= -(V1/R1 + V2/R2 + V3/R3)\nVout = -(R4/R1*V1 + R4/R2*V2 + R4/R3*V3)
TEXT 192 168 Left 2 !.lib opamp.sub
TEXT -936 600 Left 2 !.tran 50m
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX74840.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX74840.asy)
R1 N001 0 10k
V2 -V 0 -15
Rload OUT 0 10k
Vin IN 0 SINE(0 1 10k)
XU1 IN N001 +V -V OUT MAX74840 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 10k
V1 +V 0 15
.tran 1m
.lib MAX74840.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 656 -1232 624 -1232
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 656 -1104 656 -1232
WIRE 656 -1104 608 -1104
WIRE 752 -1104 656 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10k)
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL MAX74840 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10k
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 752 -992 0
FLAG 256 -1056 0
TEXT 456 -960 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1706-63.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1706-63.asy)
XU1 N005 N006 N001 0 N004 OUT N002 N003 N008 LTC1706-63 ;pnba VID2)VID3)Vcc)GND)FB)Sense)VID0)VID1)VID4
G1 0 OUT N007 N004 1
V4 N003 0 PULSE(0 2.4 0 1n 1n 1m 2m)
V1 N001 0 3.3
V2 N007 0 .6
C1 OUT 0 .1
V3 N002 0 PULSE(0 2.4 0 1n 1n .5m 1m)
V5 N005 0 PULSE(0 2.4 0 1n 1n 2m 4m)
V6 N006 0 PULSE(0 2.4 0 1n 1n 4m 8m)
V7 N008 0 PULSE(0 2.4 0 1n 1n 8m 16m)
.tran 16m
.lib LTC1706-63.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2536 1332
WIRE 944 720 864 720
WIRE 1328 720 944 720
WIRE 864 736 864 720
WIRE 1168 784 1008 784
WIRE 1008 800 1008 784
WIRE 864 816 864 800
WIRE 1168 816 1168 784
WIRE 1328 816 1328 720
WIRE 1856 880 1392 880
WIRE 1008 896 1008 880
WIRE 1856 896 1856 880
WIRE 1744 928 1392 928
WIRE 1744 960 1744 928
WIRE 1104 976 992 976
WIRE 1632 976 1392 976
WIRE 944 992 944 720
WIRE 1856 992 1856 976
WIRE 992 1008 992 976
WIRE 1632 1008 1632 976
WIRE 1536 1024 1392 1024
WIRE 1536 1056 1536 1024
WIRE 1744 1056 1744 1040
WIRE 992 1072 992 1056
WIRE 1440 1072 1392 1072
WIRE 1632 1104 1632 1088
WIRE 1440 1120 1440 1072
WIRE 1248 1136 1248 1120
WIRE 1536 1152 1536 1136
WIRE 944 1184 944 1072
WIRE 992 1184 992 1152
WIRE 1440 1216 1440 1200
SYMBOL PowerProducts\\LTC1706-63 1248 976 R0
SYMATTR InstName U1
SYMBOL voltage 1536 1040 R0
SYMATTR InstName V6
SYMATTR Value PULSE(0 2.4 0 1n 1n 4m 8m)
SYMBOL voltage 992 1056 R0
SYMATTR InstName V2
SYMATTR Value .6
SYMBOL cap 848 736 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage 1744 944 R0
SYMATTR InstName V4
SYMATTR Value PULSE(0 2.4 0 1n 1n 1m 2m)
SYMBOL voltage 1632 992 R0
SYMATTR InstName V5
SYMATTR Value PULSE(0 2.4 0 1n 1n 2m 4m)
SYMBOL voltage 1008 784 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage 1440 1104 R0
SYMATTR InstName V7
SYMATTR Value PULSE(0 2.4 0 1n 1n 8m 16m)
SYMBOL g2 944 976 M0
SYMATTR InstName G1
SYMATTR Value 1
SYMBOL voltage 1856 880 R0
SYMATTR InstName V3
SYMATTR Value PULSE(0 2.4 0 1n 1n .5m 1m)
FLAG 1008 896 0
FLAG 1248 1136 0
FLAG 992 1184 0
FLAG 944 1184 0
FLAG 1856 992 0
FLAG 1744 1056 0
FLAG 1632 1104 0
FLAG 1536 1152 0
FLAG 864 816 0
FLAG 864 720 OUT
FLAG 1440 1216 0
TEXT 1912 1184 Left 2 !.tran 16m
* Z:\home\khalils\Downloads\files\data\raw_asc\4f7f7a4bc83a_part3_a_vgs_sweep.asc
* Generated by LTspice 26.0.1 for Windows.
VDS drain 0 8
M1 drain gate 0 0 NMOS
VGS gate 0 7
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model nmos NMOS (kp=100u, vt0=0.5, l={x}, w=.36u)
.dc VGS 0 10 0.01
.step param X list .09u .13u .2u .3u .6u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 48 96 48
WIRE 240 48 160 48
WIRE 96 112 96 48
WIRE 240 144 240 48
WIRE -64 192 -96 192
WIRE 48 192 -64 192
WIRE -96 208 -96 192
WIRE -96 336 -96 288
WIRE 96 336 96 208
WIRE 96 336 -96 336
WIRE 176 336 96 336
WIRE 240 336 240 224
WIRE 240 336 176 336
SYMBOL nmos 48 112 R0
SYMATTR InstName M1
SYMBOL voltage 240 128 R0
SYMATTR InstName VDS
SYMATTR Value 8
SYMBOL voltage -96 192 R0
SYMATTR InstName VGS
SYMATTR Value 7
FLAG 96 336 0
FLAG -64 192 gate
FLAG 160 48 drain
FLAG 176 336 source
TEXT -104 376 Left 2 !.model nmos NMOS (kp=100u, vt0=0.5, l={x}, w=.36u)
TEXT -104 408 Left 2 !.dc VGS 0 10 0.01
TEXT -104 440 Left 2 !.step param X list .09u .13u .2u .3u .6u
* Z:\home\khalils\Downloads\files\data\raw_asc\5a989c92049f_90nm_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N003 0 N002 PMOS l=90nm w=405nm
vsd N001 0 -1.2
vsg N003 0 -1.2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc vsg 0 -1.2 .1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 64 224 64
WIRE 224 96 224 64
WIRE 368 96 368 64
WIRE 224 144 224 112
WIRE 176 176 80 176
WIRE 80 192 80 176
WIRE 208 272 80 272
WIRE 224 272 224 192
WIRE 224 272 208 272
WIRE 368 272 368 176
WIRE 368 272 224 272
WIRE 208 288 208 272
FLAG 208 288 0
SYMBOL pmos4 176 96 R0
SYMATTR InstName M1
SYMATTR Value2 l=90nm w=405nm
SYMBOL voltage 368 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vsd
SYMATTR Value -1.2
SYMBOL voltage 80 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vsg
SYMATTR Value -1.2
TEXT 48 312 Left 2 !.dc vsg 0 -1.2 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1706-19.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1706-19.asy)
V5 N005 0 PULSE(0 2.4 0 1n 1n 2m 4m)
V3 N002 0 PULSE(0 2.4 0 1n 1n .5m 1m)
G1 0 OUT N006 N004 100m
V6 N007 0 PULSE(0 2.4 0 1n 1n 4m 8m)
V1 N001 0 3.3
C1 OUT 0 .1
XU1 N005 N007 N001 0 N004 OUT N002 N003 LTC1706-19 ;pnba VID2)VID3)Vcc)GND)FB)Sense)VID0)VID1
V4 N003 0 PULSE(0 2.4 0 1n 1n 1m 2m)
V2 N006 0 1.19
.tran 8m
.lib LTC1706-19.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2248 1272
WIRE 912 720 832 720
WIRE 1328 720 912 720
WIRE 832 736 832 720
WIRE 1168 784 1008 784
WIRE 1008 800 1008 784
WIRE 832 816 832 800
WIRE 1168 816 1168 784
WIRE 1328 816 1328 720
WIRE 1856 880 1392 880
WIRE 1008 896 1008 880
WIRE 1856 912 1856 880
WIRE 1744 944 1392 944
WIRE 912 960 912 720
WIRE 1104 976 960 976
WIRE 1744 992 1744 944
WIRE 1616 1008 1392 1008
WIRE 1008 1024 960 1024
WIRE 1856 1024 1856 992
WIRE 912 1056 912 1040
WIRE 1008 1056 1008 1024
WIRE 1488 1072 1392 1072
WIRE 1616 1072 1616 1008
WIRE 1744 1104 1744 1072
WIRE 1248 1136 1248 1120
WIRE 1488 1136 1488 1072
WIRE 1008 1152 1008 1136
WIRE 1616 1184 1616 1152
WIRE 1488 1248 1488 1216
SYMBOL voltage 1488 1120 R0
SYMATTR InstName V6
SYMATTR Value PULSE(0 2.4 0 1n 1n 4m 8m)
SYMBOL voltage 1856 896 R0
SYMATTR InstName V3
SYMATTR Value PULSE(0 2.4 0 1n 1n .5m 1m)
SYMBOL voltage 1008 784 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap 816 736 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL PowerProducts\\LTC1706-19 1248 976 R0
SYMATTR InstName U1
SYMBOL voltage 1008 1040 R0
SYMATTR InstName V2
SYMATTR Value 1.19
SYMBOL voltage 1616 1056 R0
SYMATTR InstName V5
SYMATTR Value PULSE(0 2.4 0 1n 1n 2m 4m)
SYMBOL g2 912 944 M0
WINDOW 0 -18 8 Right 2
WINDOW 3 -18 97 Right 2
SYMATTR InstName G1
SYMATTR Value 100m
SYMBOL voltage 1744 976 R0
SYMATTR InstName V4
SYMATTR Value PULSE(0 2.4 0 1n 1n 1m 2m)
FLAG 1008 896 0
FLAG 1248 1136 0
FLAG 1008 1152 0
FLAG 912 1056 0
FLAG 1856 1024 0
FLAG 1744 1104 0
FLAG 1616 1184 0
FLAG 1488 1248 0
FLAG 832 816 0
FLAG 832 720 OUT
TEXT 1912 1224 Left 2 !.tran 8m
* Z:\home\khalils\Downloads\files\data\raw_asc\92b2833e5c4d_2polefilter.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N005 N004 1k
C4 N005 0 1n
C5 N002 N005 220n
C6 Vout N003 220n
C7 N003 N002 100p
XU1 N002 N006 N003 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
V1 N001 0 9
R4 N001 N006 100k
R5 N006 0 100k
R6 N003 N002 4.7k
V2 N004 0 AC
;tran 0 50us 30us
* .step param p 0 10p 1p
.lib opamp.sub
.ac dec 5 0.01 10MEG
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1256 756
WIRE 624 -112 560 -112
WIRE 560 -64 560 -112
WIRE 624 -64 624 -112
WIRE 736 -16 720 -16
WIRE 848 -16 800 -16
WIRE 720 16 720 -16
WIRE 720 16 656 16
WIRE 560 32 560 16
WIRE 848 32 848 -16
WIRE 880 32 848 32
WIRE 720 64 720 16
WIRE 736 64 720 64
WIRE 848 64 848 32
WIRE 848 64 816 64
WIRE 400 128 304 128
WIRE 512 128 480 128
WIRE 544 128 512 128
WIRE 656 128 656 16
WIRE 656 128 608 128
WIRE 688 128 656 128
WIRE 512 144 512 128
WIRE 880 144 880 32
WIRE 880 144 752 144
WIRE 896 144 880 144
WIRE 976 144 960 144
WIRE 624 160 624 16
WIRE 688 160 624 160
WIRE 624 208 624 160
WIRE 304 240 304 208
WIRE 512 240 512 208
WIRE 624 320 624 288
FLAG 512 240 0
FLAG 560 32 0
FLAG 624 320 0
FLAG 976 144 Vout
FLAG 304 240 0
SYMBOL res 496 112 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL cap 496 144 R0
SYMATTR InstName C4
SYMATTR Value 1n
SYMBOL cap 608 112 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C5
SYMATTR Value 220n
SYMBOL cap 960 128 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C6
SYMATTR Value 220n
SYMBOL cap 800 -32 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C7
SYMATTR Value 100p
SYMBOL Opamps\\opamp 720 80 R0
SYMATTR InstName U1
SYMBOL voltage 560 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL res 608 -80 R0
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL res 608 192 R0
SYMATTR InstName R5
SYMATTR Value 100k
SYMBOL res 832 48 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R6
SYMATTR Value 4.7k
SYMBOL voltage 304 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value AC
TEXT 328 480 Left 0 !;tran 0 50us 30us
TEXT 328 440 Left 0 ;.step param p 0 10p 1p
TEXT 328 504 Left 0 !.lib opamp.sub
TEXT 328 536 Left 0 !.ac dec 5 0.01 10MEG
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3642.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N001 IN NC_01 NC_02 IN N002 NC_03 0 LTC3642 ;pnba SW)Vin)Iset)SS)Run)FB)Hyst)GND
V1 IN 0 45
L1 N001 OUT 150
R1 OUT N002 4.2Meg
R2 N002 0 800K
C1 OUT 0 10
Rload OUT 0 100
.tran 2.5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3642.asy)
.lib LTC3642.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 80 0 80
WIRE 112 80 96 80
WIRE 352 80 336 80
WIRE 448 80 432 80
WIRE 576 80 448 80
WIRE 656 80 576 80
WIRE 0 96 0 80
WIRE 576 96 576 80
WIRE 656 96 656 80
WIRE 96 176 96 80
WIRE 112 176 96 176
WIRE 448 176 448 160
WIRE 448 176 336 176
WIRE 0 192 0 176
WIRE 448 192 448 176
WIRE 576 192 576 160
WIRE 656 192 656 176
WIRE 448 288 448 272
WIRE 352 368 336 368
FLAG 0 192 0
FLAG 352 368 0
FLAG 448 288 0
FLAG 576 192 0
FLAG 656 192 0
FLAG 0 80 IN
FLAG 656 80 OUT
SYMBOL PowerProducts\\LTC3642 224 224 R0
SYMATTR InstName U1
SYMBOL voltage 0 80 R0
SYMATTR InstName V1
SYMATTR Value 45
SYMBOL ind 336 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMBOL res 432 64 R0
SYMATTR InstName R1
SYMATTR Value 4.2Meg
SYMBOL res 432 176 R0
SYMATTR InstName R2
SYMATTR Value 800K
SYMBOL cap 560 96 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 640 80 R0
SYMATTR InstName Rload
SYMATTR Value 100
TEXT 448 360 Left 2 !.tran 2.5m startup