Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6082.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6082.asy)
V1 +V 0 2.5
R3 N002 IN 2Meg
V3 IN 0 ac 1
XU1 N003 N001 +V -V OUT LTC6082 ;pnba IN+)IN-)VCC)VEE)OUT
V2 -V 0 -2.5
C1 OUT N001 47p
C2 N004 IN 3.9p
R2 OUT N001 1Meg
C3 N003 N004 3.9p
R5 0 N004 1Meg
R4 N003 N002 2Meg
R1 N001 0 10K
C4 N002 0 8.2p
.ac oct 10 1 1Meg
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -176 48 -176 32
WIRE -80 48 -80 32
WIRE 96 48 80 48
WIRE 192 48 176 48
WIRE 208 48 192 48
WIRE 352 48 272 48
WIRE 192 112 192 48
WIRE 256 112 192 112
WIRE 352 112 352 48
WIRE 352 112 336 112
WIRE -176 144 -176 128
WIRE -80 144 -80 128
WIRE 48 144 48 128
WIRE 192 192 192 112
WIRE 208 192 192 192
WIRE 352 208 352 112
WIRE 352 208 272 208
WIRE 384 208 352 208
WIRE -64 224 -80 224
WIRE 48 224 48 208
WIRE 48 224 16 224
WIRE 96 224 48 224
WIRE 192 224 176 224
WIRE 208 224 192 224
WIRE -80 272 -80 224
WIRE -80 272 -192 272
WIRE -192 288 -192 272
WIRE -80 320 -80 272
WIRE -48 320 -80 320
WIRE 48 320 16 320
WIRE 96 320 48 320
WIRE 192 320 192 224
WIRE 192 320 160 320
WIRE 48 336 48 320
WIRE -192 384 -192 368
WIRE 48 432 48 416
SYMBOL voltage -176 32 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 192 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 192 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2Meg
SYMBOL res 32 432 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL cap 272 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 47p
SYMBOL voltage -80 32 R0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL opamps\\LTC6082 240 208 R0
SYMATTR InstName U1
SYMBOL res 352 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL cap 16 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 3.9p
SYMBOL res 32 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2Meg
SYMBOL cap 160 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 3.9p
SYMBOL voltage -192 272 R0
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL cap 32 208 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C4
SYMATTR Value 8.2p
FLAG -176 144 0
FLAG -80 144 0
FLAG 240 176 +V
FLAG -176 32 +V
FLAG -80 32 -V
FLAG 240 240 -V
FLAG 80 48 0
FLAG -192 384 0
FLAG 48 432 0
FLAG 48 128 0
FLAG -192 272 IN
FLAG 384 208 OUT
TEXT 192 384 Left 2 !.ac oct 10 1 1Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\3becc99ed8b5_trans-1-1-2.asc
* Generated by LTspice 26.0.1 for Windows.
Vds UDS 0 -12V
M1 UDS UGS 0 0 IRF9640
V2 UGS 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 -2 -5V
.step temp list 25 175
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1292 680
WIRE -624 -176 -720 -176
WIRE -560 -176 -624 -176
WIRE -720 -128 -720 -176
WIRE -560 -80 -560 -176
WIRE -880 -48 -896 -48
WIRE -768 -48 -880 -48
WIRE -896 -32 -896 -48
WIRE -896 64 -896 48
WIRE -720 64 -720 -32
WIRE -560 64 -560 0
SYMBOL voltage -896 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 53 Left 2
WINDOW 3 -97 181 Left 2
WINDOW 0 35 44 Left 2
SYMATTR Value ""
SYMATTR InstName V2
SYMBOL pmos -768 -128 R0
SYMATTR InstName M1
SYMATTR Value IRF9640
SYMBOL voltage -560 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 36 82 Left 2
SYMATTR InstName Vds
SYMATTR Value -12V
FLAG -560 64 0
FLAG -896 64 0
FLAG -720 64 0
FLAG -880 -48 UGS
FLAG -624 -176 UDS
TEXT -904 96 Left 2 !.dc V2 -2 -5V
TEXT -904 112 Left 2 !.step temp list 25 175
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17612C.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17612C.asy)
C2 OUT 0 15
R6 N004 N003 20K
V3 N001 0 PULSE(0 1 70m 1m 1m 100m)
XU1 IN N006 0 NC_01 N002 N003 N005 OUT MAX17612C ;pnba IN)SETI)GND)CLMODE)EN)_FWD)_REV)OUT
R8 N006 0 1.2K
V1 IN 0 48
S1 0 OUT N001 0 SHORT
V4 N002 0 2
R7 N004 N005 20K
V2 N004 0 5
.model SHORT SW(Ron=24 Roff=100K Vt=.5 Vh=-.4)
.tran 1.25 startup
.lib MAX17612C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1800 680
WIRE -16 -352 -256 -352
WIRE 400 -352 272 -352
WIRE 512 -352 400 -352
WIRE 672 -352 560 -352
WIRE -256 -336 -256 -352
WIRE 400 -336 400 -352
WIRE 512 -336 512 -352
WIRE 672 -336 672 -352
WIRE 560 -320 560 -352
WIRE -256 -240 -256 -256
WIRE 400 -240 400 -272
WIRE 512 -240 512 -256
WIRE 672 -240 672 -256
WIRE -16 -160 -256 -160
WIRE 384 -160 272 -160
WIRE 496 -160 464 -160
WIRE -256 -144 -256 -160
WIRE 496 -112 496 -160
WIRE 576 -112 496 -112
WIRE 576 -80 576 -112
WIRE 384 -64 272 -64
WIRE 496 -64 496 -112
WIRE 496 -64 464 -64
WIRE -256 -48 -256 -64
WIRE 336 16 272 16
WIRE 576 16 576 0
WIRE 336 32 336 16
WIRE 336 128 336 112
WIRE 336 128 272 128
WIRE 336 160 336 128
SYMBOL res 480 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 20K
SYMBOL res 320 16 R0
SYMATTR InstName R8
SYMATTR Value 1.2K
SYMBOL voltage -256 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL res 480 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 20K
SYMBOL voltage 576 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL MAX17612C 128 -112 R0
SYMATTR InstName U1
SYMBOL cap 384 -336 R0
SYMATTR InstName C2
SYMATTR Value 15
SYMBOL sw 512 -240 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL voltage 672 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 70m 1m 1m 100m)
SYMBOL voltage -256 -160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 2
FLAG -256 -240 0
FLAG 400 -240 0
FLAG 512 -352 OUT
FLAG -256 -352 IN
FLAG 512 -240 0
FLAG 560 -272 0
FLAG 672 -240 0
FLAG 336 160 0
FLAG 576 16 0
FLAG -256 -48 0
TEXT 480 144 Left 2 !.model SHORT SW(Ron=24 Roff=100K Vt=.5 Vh=-.4)
TEXT 480 184 Left 2 !.tran 1.25 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4616.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4616.asy)
V2 IN2 0 3.6
Rload2 OUT2 0 .3125
XU1 OUT1 0 NC_01 IN1 NC_02 NC_03 NC_04 NC_05 NC_06 NC_07 NC_08 NC_09 0 IN2 0 MP_10 0 IN2 NC_11 NC_12 NC_13 NC_14 N002 NC_15 NC_16 IN2 IN2 NC_17 N001 IN1 NC_18 NC_19 0 IN1 0 NC_20 IN1 NC_21 OUT2 LTM4616 ;pnba Vout1)SGND1)PLLLPF1)Vin1)PLLLPF2)SW1)CLKin2)CLKout2)PHmode2)Mode1)CLKin1)PHmode1)GND1)SVin2)SGND2))GND2)Vin2)SW2)MGN1)Bsel1)Pgood1)FB2)MGN2)Bsel2)Track2)Run2)Mode2)FB1)Track1)Ith2)Ith1)IthM1)SVin1)IthM2)Pgood2)Run1)CLKout1)Vout2
V1 IN1 0 5
R2 N001 0 2.21K
R1 N002 0 3.09K
C3 OUT2 0 100
Rload1 OUT1 0 .4125
C1 OUT1 0 100
.tran 300u startup
.lib LTM4616.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1260 708
WIRE -128 -976 -240 -976
WIRE -112 -976 -128 -976
WIRE 656 -976 528 -976
WIRE 752 -976 656 -976
WIRE -240 -960 -240 -976
WIRE 656 -960 656 -976
WIRE 752 -960 752 -976
WIRE -128 -912 -128 -976
WIRE -112 -912 -128 -912
WIRE -240 -864 -240 -880
WIRE 656 -864 656 -896
WIRE 752 -864 752 -880
WIRE -128 -848 -128 -912
WIRE -112 -848 -128 -848
WIRE 592 -848 528 -848
WIRE 592 -832 592 -848
WIRE -128 -784 -128 -848
WIRE -112 -784 -128 -784
WIRE 592 -736 592 -752
WIRE 544 -720 528 -720
WIRE -128 -528 -240 -528
WIRE -112 -528 -128 -528
WIRE 656 -528 528 -528
WIRE 752 -528 656 -528
WIRE -240 -512 -240 -528
WIRE 656 -512 656 -528
WIRE 752 -512 752 -528
WIRE -128 -464 -128 -528
WIRE -112 -464 -128 -464
WIRE -240 -416 -240 -432
WIRE 656 -416 656 -448
WIRE 752 -416 752 -432
WIRE -128 -400 -128 -464
WIRE -112 -400 -128 -400
WIRE 592 -400 528 -400
WIRE 592 -384 592 -400
WIRE -128 -336 -128 -400
WIRE -112 -336 -128 -336
WIRE 592 -288 592 -304
WIRE 544 -272 528 -272
WIRE -16 -64 -16 -80
WIRE 96 -64 96 -80
WIRE 208 -64 208 -80
WIRE 320 -64 320 -80
SYMBOL cap 640 -960 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMBOL cap 640 -512 R0
SYMATTR InstName C3
SYMATTR Value 100
SYMBOL voltage -240 -528 R0
SYMATTR InstName V2
SYMATTR Value 3.6
SYMBOL res 736 -528 R0
SYMATTR InstName Rload2
SYMATTR Value .3125
SYMBOL res 736 -976 R0
SYMATTR InstName Rload1
SYMATTR Value .4125
SYMBOL res 576 -848 R0
SYMATTR InstName R2
SYMATTR Value 2.21K
SYMBOL res 576 -400 R0
SYMATTR InstName R1
SYMATTR Value 3.09K
SYMBOL voltage -240 -976 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LTM4616 208 -560 R0
SYMATTR InstName U1
FLAG -16 -64 0
FLAG 96 -64 0
FLAG -240 -864 0
FLAG 656 -864 0
FLAG 752 -864 0
FLAG 592 -736 0
FLAG 752 -976 OUT1
FLAG -240 -976 IN1
FLAG 544 -720 0
FLAG 208 -64 0
FLAG 320 -64 0
FLAG 656 -416 0
FLAG 752 -416 0
FLAG 592 -288 0
FLAG 752 -528 OUT2
FLAG 544 -272 0
FLAG -240 -416 0
FLAG -240 -528 IN2
TEXT 584 -184 Left 2 !.tran 300u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\24c03e797e95_Draft103.asc
* Generated by LTspice 26.0.1 for Windows.
* Can just use a cmos op-amp running at 5V\nAnd a cmos comparator.\nGain has already been added.\nSo noise, and thermal wander of Vos. doesn't matter\nAnd the Vos is within the loop
* No. this isn't right. it is not at an input zero cross.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1006.asy)
;dc V1 0 10 0.01
Q1 N003 N006 VOUT 0 2N3904
R2 0 VOUT 10k
D4 N002 P001 1N4148
D2 N001 P002 1N4148
V1 0 VEE 5
D3 P002 N002 1N4148
R1 N005 N004 10k
VIN N004 0 SINE(0 10 50)
V2 VCC 0 5
XU2 N003 N005 VCC VEE N006 LT1006 ;pnba In+)In-)V+)V-)OUT
D1 P001 N001 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0.1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1316 680
WIRE 496 -240 496 -320
WIRE 624 -240 624 -320
WIRE 96 -160 -16 -160
WIRE 576 0 352 0
WIRE 576 16 576 0
WIRE 240 80 -96 80
WIRE 384 80 320 80
WIRE 512 96 512 64
WIRE 512 96 448 96
WIRE 352 112 352 0
WIRE 384 112 352 112
WIRE -96 128 -96 80
WIRE 576 144 576 112
WIRE 736 144 576 144
WIRE 752 144 736 144
SYMBOL voltage -16 -176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 55 55 Left 2
SYMATTR Value 5
SYMATTR InstName V1
SYMBOL diode 560 -256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 -35 -122 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage -16 -256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 55 55 Left 2
SYMATTR Value 5
SYMATTR InstName V2
SYMBOL res 336 64 R90
WINDOW 0 -23 59 VBottom 2
WINDOW 3 -25 66 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL npn 512 16 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL diode 624 -256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 -5 -113 VTop 2
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL voltage -96 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value SINE(0 10 50)
SYMATTR InstName VIN
SYMBOL diode 496 -304 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 34 179 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL OpAmps\\LT1006 416 32 R0
SYMATTR InstName U2
SYMBOL diode 560 -304 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 13 187 VBottom 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL res 592 240 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 10k
FLAG -96 208 0
FLAG 96 -160 0
FLAG 448 -96 VOUT
FLAG -16 -240 VCC
FLAG 416 64 VCC
FLAG -16 -80 VEE
FLAG 416 128 VEE
FLAG 144 -32 VEE
FLAG 576 224 0
FLAG 736 144 VOUT
TEXT -168 232 Left 2 !;dc V1 0 10 0.01
TEXT -136 368 Left 2 !.tran 0.1
TEXT 704 -160 Left 2 ;Can just use a cmos op-amp running at 5V\nAnd a cmos comparator.\nGain has already been added.\nSo  noise, and thermal wander of Vos. doesn't matter\nAnd the Vos is within the loop
TEXT 720 48 Left 2 ;No. this isn't right. it is not at an input  zero cross.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8337.asc
* Generated by LTspice 26.0.1 for Windows.
* 2MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8337.asy)
R2 N004 0 71.5K
R3 IN N003 100K
R4 N006 0 47.5K
V1 IN 0 9
C3 OUT 0 22 x4 Rser=10m
C2 N001 N002 0.1
L1 IN N001 2.2 Rser=9m
XU1 0 N006 0 N004 OUT N001 N002 N005 IN IN N003 LT8337 ;pnba SYNC/MODE)RT)GND)FB)VOUT)SW)BST)INTVcc)VIN)EN/UVLO)PG
Rload OUT 0 75
C1 N005 0 1
R1 OUT N004 1Meg
.tran 1.8m startup
.lib LT8337.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1352 740
WIRE -272 0 -336 0
WIRE -192 0 -272 0
WIRE -96 0 -192 0
WIRE -64 0 -96 0
WIRE 48 0 16 0
WIRE 192 0 48 0
WIRE -336 16 -336 0
WIRE 192 16 192 0
WIRE -96 96 -96 0
WIRE 48 96 48 0
WIRE 192 96 192 80
WIRE -336 112 -336 96
WIRE -272 128 -272 0
WIRE -192 176 -192 0
WIRE -160 176 -192 176
WIRE 336 176 256 176
WIRE 480 176 336 176
WIRE 624 176 480 176
WIRE 336 192 336 176
WIRE 624 192 624 176
WIRE 480 208 480 176
WIRE -272 240 -272 208
WIRE -160 240 -272 240
WIRE 480 288 480 272
WIRE 624 288 624 272
WIRE -160 304 -208 304
WIRE 336 304 336 272
WIRE 336 304 256 304
WIRE 336 320 336 304
WIRE -80 400 -80 384
WIRE 176 400 176 384
WIRE 48 416 48 384
WIRE 336 416 336 400
WIRE -80 480 -80 464
WIRE 48 528 48 496
SYMBOL res 32 400 R0
SYMATTR InstName R4
SYMATTR Value 47.5K
SYMBOL LT8337 48 240 R0
SYMATTR InstName U1
SYMBOL res 320 304 R0
SYMATTR InstName R2
SYMATTR Value 71.5K
SYMBOL cap 464 208 R0
WINDOW 3 40 35 Left 2
WINDOW 123 31 60 Left 2
SYMATTR Value 22
SYMATTR Value2 x4
SYMATTR SpiceLine Rser=10m
SYMATTR InstName C3
SYMBOL voltage -336 0 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL res 320 176 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL res 608 176 R0
SYMATTR InstName Rload
SYMATTR Value 75
SYMBOL cap 176 16 R0
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL ind -80 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=9m
SYMBOL res -288 112 R0
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap -96 400 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG -80 480 0
FLAG 176 400 0
FLAG -336 112 0
FLAG 336 416 0
FLAG 624 288 0
FLAG 480 288 0
FLAG -336 0 IN
FLAG 624 176 OUT
FLAG -208 304 0
FLAG 48 528 0
TEXT 368 496 Left 2 !.tran 1.8m startup
TEXT 72 512 Left 2 ;2MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2165-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2165-3.3.asy)
V1 IN 0 5
C4 N002 0 1
Rload OUT 0 .66
C5 N006 0 680p
C3 OUT 0 60 Rser=2m
C1 N008 0 2n
R1 N005 0 100K
R2 N007 N006 36K
L1 N004 OUT 1.5 Rser=6m
C2 N003 N004 .1
R3 OUT N001 100K
C6 N007 0 1p
XU1 N002 N005 N002 OUT 0 0 N004 IN IN IN N001 N008 N007 N003 N002 ADP2165-x.x Rtop=818K Rbot=182K ;pnba SYNC)Rt)TRK)FB)Gnd)Pgnd)SW)Pvin)Avin)EN)Pgood)SS)Comp)Bst)Vreg
.tran 1m startup
.lib ADP2165-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 680
WIRE 48 -96 -128 -96
WIRE 176 -96 48 -96
WIRE 272 -96 176 -96
WIRE -128 -80 -128 -96
WIRE 176 -80 176 -96
WIRE 272 -80 272 -96
WIRE 48 -16 48 -96
WIRE 64 -16 48 -16
WIRE 448 -16 384 -16
WIRE 608 -16 528 -16
WIRE -128 16 -128 0
WIRE -32 64 -48 64
WIRE 48 64 32 64
WIRE 64 64 48 64
WIRE 432 64 384 64
WIRE 48 144 48 64
WIRE 64 144 48 144
WIRE 432 144 432 128
WIRE 432 144 384 144
WIRE 480 144 432 144
WIRE 608 144 608 -16
WIRE 608 144 560 144
WIRE 720 144 608 144
WIRE 832 144 720 144
WIRE 720 160 720 144
WIRE 832 160 832 144
WIRE 48 224 48 144
WIRE 64 224 48 224
WIRE 720 256 720 224
WIRE 832 256 832 240
WIRE -32 304 -48 304
WIRE 64 304 48 304
WIRE 608 304 608 144
WIRE 608 304 384 304
WIRE -160 384 -224 384
WIRE -32 384 -80 384
WIRE 64 384 -32 384
WIRE 400 384 384 384
WIRE 480 384 464 384
WIRE -224 400 -224 384
WIRE -32 400 -32 384
WIRE 176 464 176 448
WIRE 272 464 272 448
WIRE -224 480 -224 464
WIRE -32 480 -32 464
SYMBOL cap -240 400 R0
SYMATTR InstName C5
SYMATTR Value 680p
SYMBOL cap 416 64 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL res -64 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 36K
SYMBOL res 816 144 R0
SYMATTR InstName Rload
SYMATTR Value .66
SYMBOL cap 704 160 R0
WINDOW 40 24 74 Left 2
SYMATTR Value 60
SYMATTR InstName C3
SYMATTR SpiceLine Rser=2m
SYMBOL cap -48 400 R0
SYMATTR InstName C6
SYMATTR Value 1p
SYMBOL res 544 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL ind 464 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=6m
SYMBOL cap 32 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL voltage -128 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADP2165-3.3 224 176 R0
SYMATTR InstName U1
SYMBOL res 64 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 400 368 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2n
FLAG 480 384 0
FLAG 272 464 0
FLAG -48 304 0
FLAG -224 480 0
FLAG -128 16 0
FLAG 720 256 0
FLAG 832 256 0
FLAG 832 144 OUT
FLAG -128 -96 IN
FLAG -48 64 0
FLAG -32 480 0
FLAG 176 464 0
TEXT 696 424 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\34fe30074230_brakerectifier.asc
* Generated by LTspice 26.0.1 for Windows.
D1 Phase_A VDC+ 1N914
R3 Brake N003 {R1}
M2 Phase_B N002 VDC- VDC- Si7336ADP
M1 Phase_A N001 VDC- VDC- Si7336ADP
R2 Brake N002 {R1}
R1 Brake N001 {R1}
D3 Phase_C VDC+ 1N914
M3 Phase_C N003 VDC- VDC- Si7336ADP
D2 Phase_B VDC+ 1N914
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.param R1 = 16
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1372 680
WIRE 240 -48 208 -48
WIRE 0 0 -64 0
WIRE 240 0 240 -48
WIRE 240 0 64 0
WIRE 336 0 240 0
WIRE 608 0 432 0
WIRE 416 80 416 48
WIRE 448 80 416 80
WIRE 560 80 528 80
WIRE -208 160 -272 160
WIRE 240 160 208 160
WIRE 608 160 608 0
WIRE 672 160 608 160
WIRE -272 208 -272 160
WIRE -64 208 -64 0
WIRE -64 208 -272 208
WIRE 0 208 -64 208
WIRE 240 208 240 160
WIRE 240 208 64 208
WIRE 336 208 240 208
WIRE 608 208 608 160
WIRE 608 208 432 208
WIRE 416 288 416 256
WIRE 448 288 416 288
WIRE 560 288 560 80
WIRE 560 288 528 288
WIRE 240 368 208 368
WIRE -64 416 -64 208
WIRE 0 416 -64 416
WIRE 240 416 240 368
WIRE 240 416 64 416
WIRE 336 416 240 416
WIRE 608 416 608 208
WIRE 608 416 432 416
WIRE 416 496 416 464
WIRE 448 496 416 496
WIRE 560 496 560 288
WIRE 560 496 528 496
WIRE 560 592 560 496
WIRE 560 592 528 592
IOPIN 208 -48 In
IOPIN 208 160 In
IOPIN 208 368 In
IOPIN -208 160 Out
IOPIN 672 160 Out
IOPIN 528 592 In
SYMBOL res 544 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R1}
SYMBOL diode 64 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D3
SYMATTR Value 1N914
SYMBOL nmos 336 464 R270
WINDOW 0 73 15 VRight 2
WINDOW 3 117 12 VRight 2
SYMATTR InstName M3
SYMATTR Value Si7336ADP
SYMBOL res 544 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL res 544 480 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value {R1}
SYMBOL diode 64 -16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL nmos 336 256 R270
WINDOW 0 73 15 VRight 2
WINDOW 3 117 12 VRight 2
SYMATTR InstName M2
SYMATTR Value Si7336ADP
SYMBOL nmos 336 48 R270
WINDOW 0 73 15 VRight 2
WINDOW 3 117 12 VRight 2
SYMATTR InstName M1
SYMATTR Value Si7336ADP
SYMBOL diode 64 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N914
FLAG 208 -48 Phase_A
FLAG 208 160 Phase_B
FLAG 208 368 Phase_C
FLAG -208 160 VDC+
FLAG 672 160 VDC-
FLAG 528 592 Brake
TEXT 648 256 Left 2 !.param R1 = 16
* Z:\home\khalils\Downloads\files\data\raw_asc\0e9d849c9eae_ReverseProtection.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 0 100
R2 N002 0 1k
M1 N001 N003 N002 N002 RSL020P03
V1 N001 0 8.4
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V1 -8.4 8.4 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 96 0 96
WIRE 480 96 240 96
WIRE 0 144 0 96
WIRE 480 144 480 96
WIRE 224 192 224 144
WIRE 0 320 0 224
WIRE 224 320 224 272
WIRE 224 320 0 320
WIRE 480 320 480 224
WIRE 480 320 224 320
WIRE 224 368 224 320
SYMBOL res 464 128 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL pmos 144 144 R270
SYMATTR InstName M1
SYMATTR Value RSL020P03
SYMBOL voltage 0 128 R0
SYMATTR InstName V1
SYMATTR Value 8.4
SYMBOL res 208 176 R0
SYMATTR InstName R1
SYMATTR Value 100
FLAG 224 368 0
TEXT -32 392 Left 2 !.dc V1 -8.4 8.4 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\02aa06bafee5_isolated_gate_driver_using_pulse_transformer_LTSPICE.asc
* Generated by LTspice 26.0.1 for Windows.
* ISOLATED GATE DRIVER USING PULSE TRANSFORMER
* to get 1:3 turns ratio you will have to give 1:9 inductance ratio
K L1 L2 1
L1 N006 N003 100
D2 N004 N005 1N5818
R3 N002 N001 24
R2 N008 N007 10
D1 N006 N003 1N5818
M1 N006 N008 0 0 AO6408
M2 N001 N005 0 0 FDMC8462
V2 N007 0 PULSE(0 5 0 1n 1n 2.25m 0.5m) Rser=0.001
R1 N008 0 1K
L2 0 N004 900
R4 N005 0 1K
V3 N002 0 24
V1 N003 0 5V
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 904 744
WIRE 720 32 608 32
WIRE 848 32 800 32
WIRE 608 48 608 32
WIRE 64 64 -128 64
WIRE 160 64 64 64
WIRE 304 64 208 64
WIRE 448 64 368 64
WIRE 528 64 448 64
WIRE -128 96 -128 64
WIRE 160 96 160 64
WIRE 208 96 208 64
WIRE 64 112 64 64
WIRE 528 128 528 64
WIRE 560 128 528 128
WIRE 848 128 848 32
WIRE 448 176 448 144
WIRE 448 176 208 176
WIRE 608 176 608 144
WIRE 608 176 448 176
WIRE 64 192 64 176
WIRE 160 192 160 176
WIRE 160 192 64 192
WIRE 608 192 608 176
WIRE 848 224 848 208
WIRE 160 272 160 192
WIRE -64 352 -224 352
WIRE 64 352 16 352
WIRE 112 352 64 352
WIRE -224 384 -224 352
WIRE -224 400 -224 384
WIRE 64 400 64 352
WIRE -224 512 -224 464
WIRE 64 512 64 480
WIRE 112 512 64 512
WIRE 160 512 160 368
WIRE 160 512 112 512
WIRE 112 528 112 512
SYMBOL res 48 384 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL zener 304 80 R270
WINDOW 0 36 32 VTop 2
WINDOW 3 -4 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N5818
SYMBOL nmos 560 48 R0
SYMATTR InstName M2
SYMATTR Value FDMC8462
SYMBOL res 432 48 R0
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL nmos 112 272 R0
SYMATTR InstName M1
SYMATTR Value AO6408
SYMBOL ind2 144 192 M180
WINDOW 0 -37 85 Left 2
WINDOW 3 -21 35 Left 2
SYMATTR InstName L1
SYMATTR Value 100µ
SYMBOL voltage -128 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5V
SYMBOL voltage 848 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 24
SYMBOL ind2 224 192 R180
WINDOW 0 -36 86 Left 2
WINDOW 3 -25 37 Left 2
SYMATTR InstName L2
SYMATTR Value 900µ
SYMBOL zener 80 176 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5818
SYMBOL voltage -224 368 R0
WINDOW 3 -188 101 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 -188 129 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1n 1n 2.25m 0.5m)
SYMATTR SpiceLine Rser=0.001
SYMBOL res 816 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 24
SYMBOL res 32 336 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
FLAG -128 176 0
FLAG -224 512 0
FLAG 112 528 0
FLAG 608 192 0
FLAG 848 224 0
TEXT 96 -120 Left 2 ;ISOLATED GATE DRIVER USING PULSE TRANSFORMER
TEXT -24 704 Left 2 ;to get 1:3 turns ratio you will have to give 1:9 inductance ratio
TEXT 128 24 Left 2 !K L1 L2 1
TEXT -416 728 Left 2 !.tran 100m