Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_mix_bvbm4pog\mix_117.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N004 1
L1 N004 0 1
R2 N005 N004 1
V1 N001 N005 AC 12 0
C1 N005 0 1
R4 N006 0 1
R5 N001 N007 1
V2 N007 0 AC 4 0
I1 N006 N001 AC 2 0
I2 N005 N006 AC 4 0
Q1 N002 N003 0 0 myNPN
Vce N002 0 0
Ib 0 N003 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.ac list {1/(2*pi))}
.model myNPN NPN
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1904 656
WIRE 352 64 112 64
WIRE 592 64 352 64
WIRE 800 64 592 64
WIRE 112 96 112 64
WIRE 352 96 352 64
WIRE 592 96 592 64
WIRE 800 96 800 64
WIRE 112 208 112 176
WIRE 192 208 112 208
WIRE 352 208 352 176
WIRE 352 208 272 208
WIRE 448 208 352 208
WIRE 592 208 592 176
WIRE 592 208 528 208
WIRE 112 240 112 208
WIRE 352 256 352 208
WIRE 592 256 592 208
WIRE 800 256 800 176
WIRE 112 352 112 320
WIRE 352 352 352 320
WIRE 592 352 592 336
WIRE 800 352 800 336
WIRE 1504 80 1328 80
WIRE 1328 128 1328 80
WIRE 1504 144 1504 80
WIRE 1264 176 1200 176
WIRE 1200 272 1200 256
WIRE 1328 272 1328 224
WIRE 1504 272 1504 224
SYMBOL res 96 80 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL ind 96 224 R0
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL res 288 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL voltage 352 80 R0
WINDOW 123 39 58 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 12 0
SYMBOL cap 336 256 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 576 240 R0
SYMATTR InstName R4
SYMATTR Value 1
SYMBOL res 784 80 R0
SYMATTR InstName R5
SYMATTR Value 1
SYMBOL voltage 800 240 R0
WINDOW 123 37 87 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value ""
SYMATTR Value2 AC 4 0
SYMBOL current 592 176 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 -110 37 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value ""
SYMATTR Value2 AC 2 0
SYMBOL current 448 208 R270
WINDOW 0 32 40 VTop 2
WINDOW 3 -32 40 VBottom 2
WINDOW 123 -60 40 VBottom 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I2
SYMATTR Value ""
SYMATTR Value2 AC 4 0
SYMBOL npn 1264 128 R0
SYMATTR InstName Q1
SYMATTR Value myNPN
SYMBOL voltage 1504 128 R0
WINDOW 0 46 39 Left 0
WINDOW 3 48 65 Left 0
SYMATTR InstName Vce
SYMATTR Value 0
SYMBOL current 1200 256 R180
WINDOW 0 46 51 Left 0
WINDOW 3 50 22 Left 0
SYMATTR InstName Ib
SYMATTR Value 0
FLAG 112 352 0
FLAG 352 352 0
FLAG 592 352 0
FLAG 800 352 0
FLAG 1328 272 0
FLAG 1200 272 0
FLAG 1504 272 0
TEXT 80 448 Left 2 !.ac list {1/(2*pi))}
TEXT 56 328 Left 0 !.dc Vce 0 5 1m Ib 5u 25u 5u
TEXT 88 360 Left 0 !.model myNPN NPN
* Z:\home\khalils\Downloads\files\data\raw_asc\3446b2b5ac99_MOSFET_Trans.asc
* Generated by LTspice 26.0.1 for Windows.
Vgs N002 0
Vds N001 0 5V
M1 N001 N002 0 0 BS170
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vgs 0 3.5V 0.1V
.step temp list -55 25 175
.meas dc Uth find Vgs when Id(M1)=250uA
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1292 680
WIRE -544 -224 -720 -224
WIRE -720 -208 -720 -224
WIRE -544 -160 -544 -224
WIRE -768 -128 -880 -128
WIRE -880 -96 -880 -128
WIRE -880 0 -880 -16
WIRE -720 0 -720 -112
WIRE -544 0 -544 -80
SYMBOL voltage -880 -112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 53 Left 2
WINDOW 3 -97 181 Left 2
WINDOW 0 35 44 Left 2
SYMATTR Value ""
SYMATTR InstName Vgs
SYMBOL nmos -768 -208 R0
SYMATTR InstName M1
SYMATTR Value BS170
SYMBOL voltage -544 -176 R0
WINDOW 123 0 0 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 36 82 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName Vds
SYMATTR Value 5V
FLAG -544 0 0
FLAG -880 0 0
FLAG -720 0 0
TEXT -896 32 Left 2 !.dc Vgs 0 3.5V 0.1V
TEXT -896 48 Left 2 !.step temp list -55 25 175
TEXT -896 64 Left 2 !.meas dc Uth find Vgs when Id(M1)=250uA
* Z:\home\khalils\Downloads\files\data\raw_asc\3cd0e2d296aa_Fig20_16.asc
* Generated by LTspice 26.0.1 for Windows.
* start-up ckt
* Plot Id(m1) and Id(m2)
M3 Vbiasn Vbiasp VDD VDD P_1u l=2u w=30u
MSU1 N001 Vbiasn 0 0 N_1u l=2u w=10u
R1 N002 0 6.5k TC1=0.002
MSU3 Vbiasp N001 Vbiasn 0 N_1u l=1u w=10u
M1 Vbiasn Vbiasn 0 0 N_1u l=2u w=10u
VDD VDD 0 5
MSU2 N001 N001 VDD VDD P_1u l=100u w=10u
M4 Vbiasp Vbiasp VDD VDD P_1u l=2u w=30u
M2 Vbiasp Vbiasn N002 0 N_1u l=2u w=40u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.dc vdd 0 6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1516 680
WIRE 1088 -176 688 -176
WIRE 288 -96 288 -128
WIRE 288 -80 288 -96
WIRE 608 -80 592 -80
WIRE 1088 -80 1088 -176
WIRE 1088 -80 1056 -80
WIRE 1104 -80 1088 -80
WIRE 1120 -80 1104 -80
WIRE 688 -64 688 -176
WIRE 544 16 544 0
WIRE 608 16 608 -80
WIRE 608 16 544 16
WIRE 640 16 608 16
WIRE 1104 16 1104 -80
WIRE 1168 16 1168 0
WIRE 1168 16 1104 16
WIRE 1408 16 1168 16
WIRE 1008 32 1008 0
WIRE 1008 32 848 32
WIRE 1008 48 1008 32
WIRE 1072 48 1008 48
WIRE 1408 48 1072 48
WIRE 1008 64 1008 48
WIRE 1168 64 1168 16
WIRE 544 80 544 16
WIRE 1072 144 1072 48
WIRE 1072 144 1056 144
WIRE 1120 144 1072 144
WIRE 688 160 688 32
WIRE 688 160 592 160
WIRE 848 160 848 32
WIRE 848 160 688 160
WIRE 1168 176 1168 160
WIRE 1008 192 1008 160
WIRE 544 208 544 176
WIRE 1168 288 1168 256
SYMBOL nmos4 640 -64 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=1u w=10u
SYMATTR InstName MSU3
SYMATTR Value N_1u
SYMBOL voltage 288 -96 R0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL res 1152 160 R0
SYMATTR InstName R1
SYMATTR Value 6.5k TC1=0.002
SYMBOL nmos4 1056 64 M0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M1
SYMATTR Value N_1u
SYMBOL nmos4 1120 64 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=2u w=40u
SYMATTR InstName M2
SYMATTR Value N_1u
SYMBOL nmos4 592 80 M0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=2u w=10u
SYMATTR InstName MSU1
SYMATTR Value N_1u
SYMBOL pmos4 1056 0 R180
WINDOW 0 63 16 Left 2
WINDOW 123 56 100 Left 2
SYMATTR InstName M3
SYMATTR Value2 l=2u w=30u
SYMATTR Value P_1u
SYMBOL pmos4 1120 0 M180
WINDOW 0 63 16 Left 2
WINDOW 123 56 100 Left 2
SYMATTR InstName M4
SYMATTR Value2 l=2u w=30u
SYMATTR Value P_1u
SYMBOL pmos4 592 0 R180
WINDOW 0 63 16 Left 2
WINDOW 123 56 100 Left 2
SYMATTR InstName MSU2
SYMATTR Value2 l=100u w=10u
SYMATTR Value P_1u
FLAG 288 0 0
FLAG 288 -96 VDD
FLAG 544 -48 VDD
FLAG 544 -96 VDD
FLAG 544 208 0
FLAG 544 128 0
FLAG 688 -16 0
FLAG 1008 -48 VDD
FLAG 1008 -96 VDD
FLAG 1168 -48 VDD
FLAG 1168 -96 VDD
FLAG 1408 16 Vbiasp
FLAG 1008 192 0
FLAG 1008 112 0
FLAG 1168 288 0
FLAG 1168 112 0
FLAG 1408 48 Vbiasn
TEXT 592 256 Left 2 !.include cmosedu_models.txt
TEXT 592 232 Left 2 !.dc vdd 0 6
TEXT 552 48 Left 2 ;start-up ckt
TEXT 1216 -144 Left 2 ;Plot Id(m1) and Id(m2)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3568.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3568.asy)
R4 IN N002 100K
C3 OUT N003 47p
R2 N003 0 332K
R3 N004 0 324K
Rload OUT 0 1
R1 OUT N003 412K
V1 IN 0 5
C1 OUT 0 100 Rser=10m
C2 N005 0 1000p Rser=13K
L1 N001 OUT 1.7
XU1 N004 IN 0 N001 0 IN IN N002 N003 N005 LTC3568 ;pnba SHDN/Rt)Mode)SGND)SW)PGND)PVin)SVin)Pgood)FB)Ith
.tran 1m startup
.lib LTC3568.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2460 1748
WIRE 1456 1280 1360 1280
WIRE 1520 1280 1456 1280
WIRE 1648 1280 1520 1280
WIRE 1776 1280 1648 1280
WIRE 1360 1296 1360 1280
WIRE 1648 1296 1648 1280
WIRE 1776 1296 1776 1280
WIRE 1936 1344 1904 1344
WIRE 2048 1344 2016 1344
WIRE 2144 1344 2048 1344
WIRE 2240 1344 2144 1344
WIRE 2336 1344 2240 1344
WIRE 1456 1360 1456 1280
WIRE 2048 1360 2048 1344
WIRE 2144 1360 2144 1344
WIRE 2240 1360 2240 1344
WIRE 2336 1360 2336 1344
WIRE 1520 1376 1520 1280
WIRE 1552 1376 1520 1376
WIRE 1904 1376 1904 1344
WIRE 1904 1376 1872 1376
WIRE 1360 1392 1360 1376
WIRE 1456 1456 1456 1440
WIRE 1552 1456 1456 1456
WIRE 2048 1456 2048 1440
WIRE 2048 1456 1872 1456
WIRE 2144 1456 2144 1424
WIRE 2144 1456 2048 1456
WIRE 2240 1456 2240 1424
WIRE 2336 1456 2336 1440
WIRE 2048 1472 2048 1456
WIRE 1552 1536 1456 1536
WIRE 1904 1536 1872 1536
WIRE 1456 1552 1456 1536
WIRE 1904 1568 1904 1536
WIRE 2048 1568 2048 1552
WIRE 1456 1648 1456 1632
WIRE 1648 1648 1648 1616
WIRE 1776 1648 1776 1616
WIRE 1904 1648 1904 1632
SYMBOL res 1440 1344 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL RES 2032 1344 R0
SYMATTR InstName R1
SYMATTR Value 412K
SYMBOL cap 2224 1360 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=10m
SYMBOL ind 1920 1360 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.7
SYMBOL res 2320 1344 R0
SYMATTR InstName Rload
SYMATTR Value 1
SYMBOL cap 1888 1568 R0
WINDOW 3 36 34 Left 2
WINDOW 39 26 58 Left 2
SYMATTR Value 1000p
SYMATTR SpiceLine Rser=13K
SYMATTR InstName C2
SYMBOL cap 2128 1360 R0
SYMATTR InstName C3
SYMATTR Value 47p
SYMBOL res 1440 1536 R0
SYMATTR InstName R3
SYMATTR Value 324K
SYMBOL res 2032 1456 R0
SYMATTR InstName R2
SYMATTR Value 332K
SYMBOL PowerProducts\\LTC3568 1712 1456 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1360 1280 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 1776 1648 0
FLAG 1648 1648 0
FLAG 1360 1392 0
FLAG 1456 1648 0
FLAG 2336 1456 0
FLAG 2048 1568 0
FLAG 2240 1456 0
FLAG 1904 1648 0
FLAG 2336 1344 OUT
FLAG 1360 1280 IN
TEXT 2088 1632 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT4200.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT4200.asy)
S1 0 OUT N001 0 SHORT
V1 IN 0 12
R4 OUT N003 150K
C1 N006 0 1
R3 N003 0 20K
R5 OUT N004 20K
R1 N005 0 20K
C2 OUT 0 680
V3 N001 0 PULSE(0 1 240m 1m 1m 10m)
XU1 NC_01 IN N002 0 N006 N006 0 OUT TjFET IN MP_02 MP_03 Gate N004 N002 N003 N005 NC_04 LT4200 Rpcb=12 Tamb=25 ;pnba Sense)Vdd)UV)OV)Timer)IntVcc)GND)Out)Tj)Sense+)))Gate)PG)_FLT)FB)Imon)Iset
R2 N002 IN 20K
.model SHORT SW(Ron=10m Roff=1K Vt=.5 Vh=-.4)
.tran 1.4 startup
.lib LT4200.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1800 680
WIRE 240 -384 128 -384
WIRE -176 -352 -256 -352
WIRE -128 -352 -176 -352
WIRE -48 -352 -128 -352
WIRE 128 -352 128 -384
WIRE 480 -352 432 -352
WIRE 592 -352 480 -352
WIRE 688 -352 592 -352
WIRE 800 -352 688 -352
WIRE -256 -336 -256 -352
WIRE -128 -336 -128 -352
WIRE 480 -336 480 -352
WIRE 688 -336 688 -352
WIRE 800 -336 800 -352
WIRE 960 -320 848 -320
WIRE -48 -304 -48 -352
WIRE -16 -304 -48 -304
WIRE 432 -304 432 -352
WIRE 432 -304 272 -304
WIRE 592 -304 592 -352
WIRE 960 -304 960 -320
WIRE -256 -240 -256 -256
WIRE -128 -240 -128 -256
WIRE -16 -240 -128 -240
WIRE 480 -240 480 -256
WIRE 480 -240 272 -240
WIRE 688 -240 688 -272
WIRE 800 -240 800 -256
WIRE 480 -224 480 -240
WIRE 960 -208 960 -224
WIRE -16 -176 -32 -176
WIRE 432 -176 272 -176
WIRE 480 -128 480 -144
WIRE -128 -112 -128 -240
WIRE -16 -112 -128 -112
WIRE 288 -112 272 -112
WIRE 384 -112 368 -112
WIRE 432 -96 432 -176
WIRE 592 -96 592 -224
WIRE 592 -96 432 -96
WIRE 320 -48 272 -48
WIRE -176 16 -176 -352
WIRE -16 16 -176 16
WIRE 320 16 320 -48
WIRE 320 16 272 16
WIRE 320 80 272 80
WIRE 320 112 320 80
WIRE 336 208 272 208
SYMBOL cap 672 -336 R0
SYMATTR InstName C2
SYMATTR Value 680
SYMBOL res 464 -352 R0
SYMATTR InstName R4
SYMATTR Value 150K
SYMBOL LT4200 128 -144 R0
SYMATTR InstName U1
SYMBOL res 576 -320 R0
SYMATTR InstName R5
SYMATTR Value 20K
SYMBOL res 464 -240 R0
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL voltage -256 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 272 -96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 20K
SYMBOL voltage 960 -320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 240m 1m 1m 10m)
SYMBOL res -144 -240 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 20K
SYMBOL sw 800 -240 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL cap 304 16 R0
WINDOW 0 28 11 Left 2
SYMATTR InstName C1
SYMATTR Value 1
FLAG 480 -128 0
FLAG 320 112 0
FLAG 384 -112 0
FLAG -256 -240 0
FLAG 688 -240 0
FLAG 800 -352 OUT
FLAG -256 -352 IN
FLAG 336 208 TjFET
FLAG 800 -240 0
FLAG 848 -272 0
FLAG 960 -208 0
FLAG -32 -176 0
FLAG 240 -384 Gate
TEXT 528 -64 Left 2 !.model SHORT SW(Ron=10m Roff=1K Vt=.5 Vh=-.4)
TEXT 32 344 Left 2 !.tran 1.4 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0d53d4698b7d_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N002 N001 0 0 NMOS
M2 VDD N001 N002 VDD PMOS
VDD NC_01 0 1.8
Vin N001 0 V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vin 0 3 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 32 416 16
WIRE 496 32 416 32
WIRE 416 48 416 32
WIRE 496 96 496 32
WIRE 496 96 416 96
WIRE 368 128 336 128
WIRE 336 192 336 128
WIRE 336 192 192 192
WIRE 416 192 416 144
WIRE 192 208 192 192
WIRE 496 240 416 240
WIRE 336 272 336 192
WIRE 368 272 336 272
WIRE 416 304 416 288
WIRE 496 304 496 240
WIRE 496 304 416 304
WIRE 416 336 416 304
FLAG 416 336 0
FLAG 192 288 0
FLAG 112 112 0
FLAG 416 16 VDD
SYMBOL nmos4 368 192 R0
SYMATTR InstName M1
SYMBOL pmos4 368 48 R0
SYMATTR InstName M2
SYMBOL Voltage 112 16 R0
SYMATTR InstName VDD
SYMATTR Value 1.8
SYMBOL Voltage 192 192 R0
SYMATTR InstName Vin
TEXT 568 -32 Left 2 !.dc Vin 0 3 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG784.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nOff Isolation is -75 dB at 10MHz\nOnly one channel included\nCharge Injection not included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG784.asy)
V3 N004 0 PULSE(0 3 0 20n 20n 10u 20u)
V1 N001 0 3
V5 +V 0 5
XU1 N004 N001 N002 N003 +V 0 0 ADG784 ;pnba IN)SA)D)SB)Vdd)GND)_EN
V2 N003 0 0
R1 N002 0 49.9
C1 N002 0 36p
.tran 100u
.lib ADG784.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1696 -272 -1920 -272
WIRE -1920 -256 -1920 -272
WIRE -1408 -240 -1504 -240
WIRE -1296 -240 -1408 -240
WIRE -1408 -224 -1408 -240
WIRE -1296 -224 -1296 -240
WIRE -1696 -208 -1840 -208
WIRE -1840 -192 -1840 -208
WIRE -1920 -160 -1920 -176
WIRE -1696 -144 -1760 -144
WIRE -1472 -144 -1504 -144
WIRE -1472 -128 -1472 -144
WIRE -1408 -128 -1408 -144
WIRE -1296 -128 -1296 -160
WIRE -1840 -96 -1840 -112
WIRE -1760 -80 -1760 -144
WIRE -1600 -16 -1600 -32
WIRE -1760 32 -1760 0
SYMBOL voltage -2144 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 5
SYMBOL res -1424 -240 R0
SYMATTR InstName R1
SYMATTR Value 49.9
SYMBOL ADG784 -1600 -192 R0
SYMATTR InstName U1
SYMBOL voltage -1920 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL voltage -1840 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL cap -1312 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -1760 -96 R0
WINDOW 3 24 136 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 20n 20n 10u 20u)
SYMATTR InstName V3
FLAG -1920 -160 0
FLAG -1840 -96 0
FLAG -1760 32 0
FLAG -1600 -368 +V
FLAG -1408 -128 0
FLAG -1600 -16 0
FLAG -1296 -128 0
FLAG -1472 -128 0
FLAG -2144 -64 0
FLAG -2144 -144 +V
TEXT -1360 -40 Left 2 !.tran 100u
TEXT -2160 -472 Left 2 ;Note:\nOff Isolation is -75 dB at 10MHz\nOnly one channel included\nCharge Injection not included\nSwitch shown for a logic 0 input
* Z:\tmp\asc_dec_bjh7r6w2\091b9626115f_CompPwm_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
D2 0 N006 1N914
R2 N005 0 100k
D4 N002 Out 1N914
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1444 680
WIRE 16 176 16 144
WIRE 16 256 16 240
WIRE 16 352 16 320
WIRE 16 384 16 352
WIRE 16 480 16 448
WIRE 48 176 16 176
WIRE 112 352 16 352
WIRE 112 384 112 352
WIRE 112 480 16 480
WIRE 112 480 112 448
WIRE 144 176 112 176
WIRE 176 240 16 240
WIRE 176 240 176 208
WIRE 224 368 224 272
WIRE 224 384 224 368
WIRE 224 480 112 480
WIRE 224 480 224 464
WIRE 224 496 224 480
WIRE 256 240 176 240
WIRE 256 272 224 272
WIRE 272 176 208 176
WIRE 288 224 288 208
WIRE 288 480 224 480
WIRE 288 480 288 288
WIRE 400 144 16 144
WIRE 400 176 336 176
WIRE 400 176 400 144
WIRE 400 256 320 256
WIRE 400 256 400 176
WIRE 400 272 400 256
WIRE 400 368 224 368
WIRE 400 368 400 352
WIRE 432 256 400 256
WIRE 528 208 288 208
WIRE 528 368 400 368
WIRE 624 480 288 480
SYMBOL diode 96 448 M180
WINDOW 0 25 61 Left 0
WINDOW 3 24 -10 Left 0
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL res 208 368 R0
WINDOW 3 24 82 Left 0
SYMATTR Value 100k
SYMATTR InstName R2
SYMBOL diode 272 160 M90
WINDOW 0 16 79 VBottom 0
WINDOW 3 17 88 VTop 0
SYMATTR InstName D4
SYMATTR Value 1N914
FLAG 224 496 0
FLAG 432 256 Out
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1772B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1772B.asy)
Rload OUT 0 2
R3 OUT N005 169K
R1 N001 IN 0.03
L1 N006 OUT 4.7
R2 N005 0 78.7K
D1 0 N006 MBRS340
V1 IN 0 5
C2 N003 N002 220p
R4 N002 0 10K
MQ1 N006 N004 N001 N001 FDC638P
XU1 N003 0 N005 N001 IN N004 LTC1772B ;pnba Ith/Run)GND)FB)Sense-)Vin)Pgate
C1 OUT 0 47 Rser=.1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 250u startup
.lib LTC1772B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2248 1200
WIRE 1600 544 1312 544
WIRE 1760 544 1600 544
WIRE 1600 560 1600 544
WIRE 1760 560 1760 544
WIRE 1312 576 1312 544
WIRE 1600 656 1600 640
WIRE 1600 656 1488 656
WIRE 1760 656 1760 640
WIRE 1600 720 1600 656
WIRE 944 736 928 736
WIRE 1056 736 1024 736
WIRE 1136 736 1120 736
WIRE 1552 736 1488 736
WIRE 1520 816 1488 816
WIRE 1600 832 1600 816
WIRE 1680 832 1600 832
WIRE 1840 832 1760 832
WIRE 1968 832 1840 832
WIRE 2080 832 1968 832
WIRE 1840 848 1840 832
WIRE 2080 848 2080 832
WIRE 1600 864 1600 832
WIRE 1968 864 1968 832
WIRE 1312 928 1312 896
WIRE 1600 928 1600 912
WIRE 1968 944 1968 928
WIRE 2080 944 2080 928
WIRE 1520 960 1520 816
WIRE 1840 960 1840 928
WIRE 1840 960 1520 960
WIRE 1840 976 1840 960
WIRE 1840 1072 1840 1056
SYMBOL VOLTAGE 1760 544 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 1664 848 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL RES 1584 656 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 0.03
SYMBOL res 2064 832 R0
SYMATTR InstName Rload
SYMATTR Value 2
SYMBOL PowerProducts\\LTC1772B 1312 736 R0
SYMATTR InstName U1
SYMBOL PMOS 1552 816 M180
WINDOW 0 56 80 Left 2
WINDOW 3 56 44 Left 2
SYMATTR InstName Q1
SYMATTR Value FDC638P
SYMBOL res 1040 720 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL cap 1120 720 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 220p
SYMBOL schottky 1584 928 M180
WINDOW 0 37 58 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 1824 832 R0
SYMATTR InstName R3
SYMATTR Value 169K
SYMBOL res 1824 960 R0
SYMATTR InstName R2
SYMATTR Value 78.7K
SYMBOL polcap 1952 864 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMATTR SpiceLine Rser=.1
FLAG 2080 832 OUT
FLAG 1760 656 0
FLAG 1968 944 0
FLAG 2080 944 0
FLAG 1840 1072 0
FLAG 928 736 0
FLAG 1600 928 0
FLAG 1312 928 0
FLAG 1760 544 IN
TEXT 1968 1032 Left 2 !.tran 250u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\bac0e9b897d9_Draft4.asc
* Generated by LTspice 26.0.1 for Windows.
D1 a b D
R b 0 220 tol=1 pwr=0.1
VE a 0 SINE(0 10 10)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 64 48 64
WIRE 192 64 112 64
WIRE 288 64 256 64
WIRE 320 64 288 64
WIRE 320 128 320 64
WIRE 48 144 48 64
WIRE 48 256 48 224
WIRE 288 256 48 256
WIRE 320 256 320 208
WIRE 320 256 288 256
WIRE 48 272 48 256
SYMBOL voltage 48 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName E
SYMATTR Value SINE(0 10 10)
SYMBOL res 304 112 R0
SYMATTR InstName R
SYMATTR Value 220
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL diode 192 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
FLAG 48 272 0
FLAG 112 64 a
FLAG 288 64 b
FLAG 288 256 c
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3048.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3048.asy)
Rload OUT 0 167
C3 OUT 0 1 Rser=10m
XU1 N002 IN 0 N003 OUT N004 IN N001 LT3048 ;pnba SW)Vin)GND)BYP)LDOOUT)FB)EN)BSTOUT
C2 OUT N003 .1n
R2 N004 0 100K
C1 N001 0 4.7
L1 IN N002 5.6 Rser=.12
V1 IN 0 3.2
R1 OUT N004 301K
.tran 1m startup
.lib LT3048.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 -16 256 -32
WIRE 256 64 256 48
WIRE 112 128 80 128
WIRE 448 128 400 128
WIRE 512 128 448 128
WIRE 624 128 512 128
WIRE 704 128 624 128
WIRE 448 144 448 128
WIRE 624 144 624 128
WIRE 704 144 704 128
WIRE 512 208 512 128
WIRE 80 224 80 208
WIRE 80 224 -32 224
WIRE 112 224 80 224
WIRE 448 224 448 208
WIRE 448 224 400 224
WIRE -32 240 -32 224
WIRE 624 240 624 208
WIRE 704 240 704 224
WIRE 80 320 80 224
WIRE 112 320 80 320
WIRE 512 320 512 288
WIRE 512 320 400 320
WIRE -32 336 -32 320
WIRE 256 400 256 384
WIRE 512 416 512 400
SYMBOL ind 96 224 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value 5.6
SYMATTR SpiceLine Rser=.12
SYMBOL cap 608 144 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMATTR SpiceLine Rser=10m
SYMBOL res 496 192 R0
SYMATTR InstName R1
SYMATTR Value 301K
SYMBOL voltage -32 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3.2
SYMBOL res 688 128 R0
SYMATTR InstName Rload
SYMATTR Value 167
SYMBOL res 496 304 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL PowerProducts\\LT3048 256 224 R0
SYMATTR InstName U1
SYMBOL cap 432 144 R0
SYMATTR InstName C2
SYMATTR Value .1n
SYMBOL cap 240 48 M180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 4.7
FLAG 256 400 0
FLAG -32 336 0
FLAG 256 -32 0
FLAG 624 240 0
FLAG 704 240 0
FLAG -32 224 IN
FLAG 704 128 OUT
FLAG 512 416 0
TEXT 568 432 Left 2 !.tran 1m startup