Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\60f309d3b696_part3_schematic.asc
* Generated by LTspice 26.0.1 for Windows.
* X2
* X1
* X3
+IS=1.26532e-10 BF=206.302 NF=1.5 VAF=1000
+IKF=0.0272221 ISE=2.30771e-09 NE=3.31052 BR=20.6302
+NR=2.89609 VAR=9.39809 IKR=0.272221 ISC=2.30771e-09
+NC=1.9876 RB=5.8376 IRB=50.3624 RBM=0.634251
+RE=0.0001 RC=2.65711 XTB=0.1 XTI=1
+EG=1.05 CJE=4.64214e-12 VJE=0.4 MJE=0.256227
+TF=4.19578e-10 XTF=0.906167 VTF=8.75418 ITF=0.0105823
+CJC=3.76961e-12 VJC=0.4 MJC=0.238109 XCJC=0.8
+FC=0.512134 CJS=0 VJS=0.75 MJS=0.5
+TR=6.82023e-08 PTF=0 KF=0 AF=1
Q1 N001 N002 VE 0 My2n3904
VCC N001 0 -5
R1 0 N002 13.09k
R3 VE N003 3.67k
R2 N002 N003 100k
VEE N003 0 -5
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.MODEL My2n3904 npn
.dc VCC -5 5 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1464 704
WIRE 176 -16 64 -16
WIRE 784 -16 512 -16
WIRE 64 64 64 -16
WIRE 176 64 176 -16
WIRE 784 64 784 -16
WIRE 512 144 512 -16
WIRE 176 192 176 144
WIRE 448 192 176 192
WIRE 784 208 784 144
WIRE 512 272 512 240
WIRE 176 288 176 192
WIRE 512 288 512 272
WIRE 176 432 176 368
WIRE 512 432 512 368
WIRE 512 432 176 432
WIRE 512 512 512 432
WIRE 512 656 512 592
SYMBOL res 496 272 R0
SYMATTR InstName R3
SYMATTR Value 3.67k
SYMBOL npn 448 144 R0
SYMATTR InstName Q1
SYMATTR Value My2n3904
SYMBOL res 160 272 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res 160 48 R0
SYMATTR InstName R1
SYMATTR Value 13.09k
SYMBOL voltage 784 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VCC
SYMATTR Value -5
SYMBOL voltage 512 496 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VEE
SYMATTR Value -5
FLAG 64 64 0
FLAG 512 656 0
FLAG 784 208 0
FLAG 512 272 VE
TEXT 720 352 Left 2 !.MODEL My2n3904 npn\n+IS=1.26532e-10 BF=206.302 NF=1.5 VAF=1000\n+IKF=0.0272221 ISE=2.30771e-09 NE=3.31052 BR=20.6302\n+NR=2.89609 VAR=9.39809 IKR=0.272221 ISC=2.30771e-09\n+NC=1.9876 RB=5.8376 IRB=50.3624 RBM=0.634251\n+RE=0.0001 RC=2.65711 XTB=0.1 XTI=1\n+EG=1.05 CJE=4.64214e-12 VJE=0.4 MJE=0.256227\n+TF=4.19578e-10 XTF=0.906167 VTF=8.75418 ITF=0.0105823\n+CJC=3.76961e-12 VJC=0.4 MJC=0.238109 XCJC=0.8\n+FC=0.512134 CJS=0 VJS=0.75 MJS=0.5\n+TR=6.82023e-08 PTF=0 KF=0 AF=1
TEXT 816 216 Left 2 ;X2
TEXT 544 664 Left 2 ;X1
TEXT 8 64 Left 2 ;X3
TEXT 8 688 Left 2 !.dc VCC -5 5 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\2291d0b48343_Q5.asc
* Generated by LTspice 26.0.1 for Windows.
;.step param t_r list 10p 20p 50p 100p 200p 500p 1n 2n 5n 10n
V1 N001 0 PULSE(0 1 0 0.01P 0 1)
R1 Out N001 1k
C1 Out 0 1p
.tran 0 50n 0 1p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 80 112 80
WIRE 368 80 304 80
WIRE 432 80 368 80
WIRE 112 144 112 80
WIRE 368 144 368 80
WIRE 112 256 112 224
WIRE 368 256 368 208
IOPIN 432 80 Out
SYMBOL res 320 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 112 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -102 100 Left 2
SYMATTR Value PULSE(0 1 0 0.01P 0 1)
SYMATTR InstName V1
SYMBOL cap 352 144 R0
SYMATTR InstName C1
SYMATTR Value 1p
FLAG 112 256 0
FLAG 368 256 0
FLAG 432 80 Out
TEXT 80 280 Left 2 !.tran 0 50n 0 1p
TEXT -192 312 Left 2 !;.step param t_r list 10p 20p 50p 100p 200p 500p 1n 2n 5n 10n
* Z:\home\khalils\Downloads\files\data\raw_asc\RH101A.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
V3 N003 0 PULSE(5 -5 10u .5u .5u 53u 200u)
C1 N002 N001 30p
XU1 N001 OUT1 N003 -V OUT1 +V N002 RH101A ;pnba COMP1)In-)In+)V-)OUT)V+)COMP2
C2 N005 N004 30p
XU2 N004 OUT2 N003 -V OUT2 +V NC_01 RH101A ;pnba COMP1)In-)In+)V-)OUT)V+)COMP2
C3 OUT2 N005 300p
R1 N005 0 10K
.tran 100u
* Single Pole Compensation
* Two Pole Compensation
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\RH101A.asy)
.lib RH101A.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 992
WIRE 48 176 -160 176
WIRE -112 224 -128 224
WIRE -32 224 -48 224
WIRE -128 288 -128 224
WIRE -48 288 -128 288
WIRE -48 304 -48 288
WIRE -32 304 -32 224
WIRE -16 304 -16 288
WIRE -160 320 -160 176
WIRE -64 320 -160 320
WIRE 48 336 48 176
WIRE 48 336 0 336
WIRE 320 336 48 336
WIRE -64 352 -144 352
WIRE -32 384 -32 368
WIRE 224 448 -96 448
WIRE -384 464 -384 448
WIRE -256 464 -256 448
WIRE -32 496 -48 496
WIRE 64 496 32 496
WIRE 128 496 64 496
WIRE 224 496 224 448
WIRE 224 496 192 496
WIRE 64 512 64 496
WIRE -384 560 -384 544
WIRE -256 560 -256 544
WIRE 64 608 64 592
WIRE -48 624 -48 496
WIRE -16 624 -16 608
WIRE -96 640 -96 448
WIRE -64 640 -96 640
WIRE 224 656 224 496
WIRE 224 656 0 656
WIRE 320 656 224 656
WIRE -144 672 -144 352
WIRE -64 672 -144 672
WIRE -32 704 -32 688
WIRE -144 720 -144 672
WIRE -144 816 -144 800
FLAG -256 560 0
FLAG -16 288 +V
FLAG -256 448 +V
FLAG -32 384 -V
FLAG -384 560 0
FLAG -384 448 -V
FLAG -144 816 0
FLAG -16 608 +V
FLAG -32 704 -V
FLAG 64 608 0
FLAG 320 336 OUT1
FLAG 320 656 OUT2
SYMBOL voltage -256 448 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -384 448 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -144 704 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(5 -5 10u .5u .5u 53u 200u)
SYMBOL cap -48 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 30p
SYMBOL RH101A -32 272 R0
SYMATTR InstName U1
SYMBOL cap 32 480 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 123 60 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 30p
SYMBOL RH101A -32 592 R0
SYMATTR InstName U2
SYMBOL cap 192 480 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 123 60 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 300p
SYMBOL res 48 496 R0
SYMATTR InstName R1
SYMATTR Value 10K
TEXT 384 816 Left 2 !.tran 100u
TEXT 192 256 Left 2 ;Single Pole Compensation
TEXT 248 584 Left 2 ;Two Pole Compensation
* Z:\home\khalils\Downloads\files\data\raw_asc\47f00b150a0d_ADR5044.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR5044.asy)
Rbias IN OUT 715
Rload OUT 0 10k
XU1 OUT 0 ADR5044 ;pnba 1)2
Vin IN 0 4.5
.dc TEMP -40 125 .1
.lib ADR5044.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 960
WIRE 32 64 -80 64
WIRE 208 64 112 64
WIRE 464 64 208 64
WIRE -80 112 -80 64
WIRE 208 112 208 64
WIRE 464 112 464 64
WIRE -80 224 -80 192
WIRE 208 224 208 176
WIRE 208 224 -80 224
WIRE 464 224 464 192
WIRE 464 224 208 224
WIRE -80 256 -80 224
SYMBOL voltage -80 96 R0
WINDOW 3 36 62 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 30 32 Left 2
SYMATTR Value 4.5
SYMATTR InstName Vin
SYMBOL res 448 96 R0
SYMATTR InstName Rload
SYMATTR Value 10k
SYMBOL ADR5044 208 144 R0
SYMATTR InstName U1
SYMBOL res 16 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rbias
SYMATTR Value 715
FLAG -80 64 IN
FLAG -80 256 0
FLAG 464 64 OUT
TEXT -88 -32 Left 2 !.dc TEMP -40 125 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3407-2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
C1 OUT1 0 10
L1 N002 OUT1 2.2
R1 N004 0 443.5K
R2 OUT1 N004 887K
C3 OUT2 0 10
L2 N001 OUT2 2.2
R3 N003 0 280K
R4 OUT2 N003 887K
C4 OUT2 N003 22p
C5 OUT1 N004 22p
XU1 N004 IN IN N002 0 IN N001 MP_01 IN N003 LTC3407-2 ;pnba FB1)Run1)Vin)SW1)GND)Mode)SW2))Run2)FB2
Rload1 OUT1 0 100
Rload2 OUT2 0 100
.tran 250u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3407-2.asy)
.lib LTC3407-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 868
WIRE 192 48 32 48
WIRE 272 48 192 48
WIRE 352 48 272 48
WIRE 432 48 352 48
WIRE 32 64 32 48
WIRE 272 64 272 48
WIRE 352 64 352 48
WIRE 432 64 432 48
WIRE 192 128 192 48
WIRE 208 128 192 128
WIRE 32 160 32 144
WIRE -96 224 -224 224
WIRE -32 224 -96 224
WIRE 48 224 -32 224
WIRE 96 224 48 224
WIRE 208 224 176 224
WIRE 512 224 496 224
WIRE 624 224 592 224
WIRE 736 224 624 224
WIRE 816 224 736 224
WIRE 912 224 816 224
WIRE -224 240 -224 224
WIRE -32 240 -32 224
WIRE 48 240 48 224
WIRE 624 240 624 224
WIRE 736 240 736 224
WIRE 912 240 912 224
WIRE -96 256 -96 224
WIRE 816 256 816 224
WIRE -224 336 -224 320
WIRE -96 336 -96 320
WIRE -32 336 -32 304
WIRE 48 336 48 320
WIRE 48 336 -32 336
WIRE 208 336 48 336
WIRE 624 336 624 320
WIRE 624 336 496 336
WIRE 736 336 736 304
WIRE 736 336 624 336
WIRE 816 336 816 320
WIRE 912 336 912 320
WIRE 48 352 48 336
WIRE 624 352 624 336
WIRE 352 400 352 384
WIRE 48 448 48 432
WIRE 624 448 624 432
FLAG 32 160 0
FLAG 352 400 0
FLAG 816 336 0
FLAG 912 336 0
FLAG 912 224 OUT1
FLAG 624 448 0
FLAG -96 336 0
FLAG -224 336 0
FLAG -224 224 OUT2
FLAG 48 448 0
FLAG 32 48 IN
SYMBOL VOLTAGE 32 48 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL polcap 800 256 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ind 496 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL res 608 336 R0
SYMATTR InstName R1
SYMATTR Value 443.5K
SYMBOL res 608 224 R0
SYMATTR InstName R2
SYMATTR Value 887K
SYMBOL polcap -112 256 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL ind 192 240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 2.2
SYMBOL res 32 336 R0
SYMATTR InstName R3
SYMATTR Value 280K
SYMBOL res 32 224 R0
SYMATTR InstName R4
SYMATTR Value 887K
SYMBOL cap -48 240 R0
SYMATTR InstName C4
SYMATTR Value 22p
SYMBOL cap 720 240 R0
SYMATTR InstName C5
SYMATTR Value 22p
SYMBOL PowerProducts\\LTC3407-2 352 224 R0
SYMATTR InstName U1
SYMBOL res 896 224 R0
SYMATTR InstName Rload1
SYMATTR Value 100
SYMBOL res -240 224 R0
SYMATTR InstName Rload2
SYMATTR Value 100
TEXT 752 472 Left 2 !.tran 250u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1761-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1761-1.5.asy)
V1 IN 0 1.8
R2 N001 IN 50K
C2 N003 0 10n
C3 N002 0 1
C4 OUT 0 10
R1 OUT 0 2
C1 N004 0 1
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1761 Radj=10K ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
.tran 1m startup
.lib ADP1761.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL ADP1761-1.5 224 176 R0
SYMATTR InstName U1
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\902661a52717_TransmissionLineInverter.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax. The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors. A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements. One for the normal(differential) mode and\nthe other for the common mode. Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world. These modes\nwith have different propagation speeds and impedances. If both modes\nare modeled, then you can simulate a transmission line inverter.
T1 IN 0 0 OUT Td=50n Z0=50
T2 0 0 OUT 0 Td=30n Z0=150
V1 IN 0 PULSE(0 1 0 1n 1n 10n) Rser=50
.tran 0 500n 0 1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 680
WIRE 128 192 -368 192
WIRE 320 192 224 192
WIRE -368 208 -368 192
WIRE 128 224 64 224
WIRE 288 224 224 224
WIRE 64 272 64 224
WIRE 64 272 16 272
WIRE 288 272 288 224
WIRE 336 272 288 272
WIRE -368 304 -368 288
WIRE 64 304 64 272
WIRE 128 304 64 304
WIRE 288 304 288 272
WIRE 288 304 224 304
WIRE 128 336 64 336
WIRE 288 336 224 336
WIRE 64 368 64 336
WIRE 288 368 288 336
SYMBOL voltage -368 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 56 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1n 1n 10n)
SYMBOL tline 176 320 R0
WINDOW 0 -1 -21 Bottom 2
WINDOW 3 0 21 Top 2
SYMATTR InstName T2
SYMATTR Value Td=30n Z0=150
SYMBOL tline 176 208 R0
WINDOW 0 2 -19 Bottom 2
WINDOW 3 3 20 Top 2
SYMATTR InstName T1
FLAG 64 368 0
FLAG 288 368 0
FLAG -368 304 0
FLAG 16 272 0
FLAG 320 192 0
FLAG -368 192 IN
FLAG 336 272 OUT
TEXT 376 368 Left 2 !.tran 0 500n 0 1n
TEXT 0 408 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT -376 -200 Left 2 ;This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax.  The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors.  A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements.  One for the normal(differential) mode and\nthe other for the common mode.  Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world.  These modes\nwith have different propagation speeds and impedances.  If both modes\nare modeled, then you can simulate a transmission line inverter.
* Z:\home\khalils\Downloads\files\data\raw_asc\43449a1ca8df_Schematic.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1007.asy)
;.tran 100m
R6 N004 +V 3k
R7 N005 0 3.5k
XU2 N004 N001 +V -V V_OUT LT1007 ;pnba In+)In-)V+)V-)OUT
R2 N003 N002 10k
R4 V_OUT N001 3k
R3 N001 N003 1k
R8 N005 +V 3k
XU1 N005 N002 +V -V N003 LT1007 ;pnba In+)In-)V+)V-)OUT
M1 N002 N006 0 0 NMOS
R5 N004 0 5k
V1 +V 0 5
V2 -V 0 -1
V3 N006 0 SINE(2 1 100)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V3 1 3 0.1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 680
WIRE 496 80 480 80
WIRE 608 80 576 80
WIRE 144 112 128 112
WIRE 272 112 224 112
WIRE 272 192 272 112
WIRE 384 192 272 192
WIRE 480 192 480 80
WIRE 480 192 464 192
WIRE 496 192 480 192
WIRE 192 208 192 192
WIRE 608 208 608 80
WIRE 608 208 560 208
WIRE 656 208 608 208
WIRE 128 224 128 112
WIRE 128 224 -80 224
WIRE 160 224 128 224
WIRE 496 224 480 224
WIRE -384 240 -384 224
WIRE -288 240 -288 224
WIRE -80 240 -80 224
WIRE 272 240 272 192
WIRE 272 240 224 240
WIRE 160 256 128 256
WIRE 448 256 432 256
WIRE 480 256 480 224
WIRE 480 256 448 256
WIRE 192 288 192 272
WIRE 128 304 128 256
WIRE 128 304 112 304
WIRE -128 320 -192 320
WIRE 128 320 128 304
WIRE -384 336 -384 320
WIRE -288 336 -288 320
WIRE -192 336 -192 320
WIRE 448 352 448 336
WIRE -80 368 -80 336
WIRE 128 416 128 400
WIRE -192 432 -192 416
IOPIN 656 208 Out
SYMBOL voltage -192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(2 1 100)
SYMBOL res 432 240 R0
SYMATTR InstName R5
SYMATTR Value 5k
SYMBOL LT1007 192 176 R0
SYMATTR InstName U1
SYMBOL res 592 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 3k
SYMBOL res 240 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage -384 224 R0
SYMATTR InstName V2
SYMATTR Value -1
SYMBOL res 480 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 128 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R8
SYMATTR Value 3k
SYMBOL LT1007 528 144 R0
SYMATTR InstName U2
SYMBOL nmos -128 240 R0
SYMATTR InstName M1
SYMBOL res 448 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 3k
SYMBOL voltage -288 224 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 112 304 R0
SYMATTR InstName R7
SYMATTR Value 3.5k
FLAG -288 336 0
FLAG 192 192 +V
FLAG -288 224 +V
FLAG 192 288 -V
FLAG -384 336 0
FLAG -384 224 -V
FLAG 528 176 +V
FLAG 528 240 -V
FLAG 352 256 +V
FLAG 448 352 0
FLAG 128 416 0
FLAG 32 304 +V
FLAG -80 368 0
FLAG -192 432 0
FLAG 656 208 V_OUT
TEXT -424 32 Left 2 !;.tran 100m
TEXT -448 72 Left 2 !.dc V3 1 3 0.1
* Z:\tmp\asc_dec_bjh7r6w2\052b7d484206_hw7_prob2_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 N002 0
L1 N003 vxpos 100m Rser=0
C1 N004 vxpos 5m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -608 -80 -672 -80
WIRE -464 -80 -528 -80
WIRE -336 -80 -384 -80
WIRE -208 -80 -256 -80
WIRE -176 -80 -208 -80
WIRE -48 -80 -112 -80
WIRE -672 -32 -672 -80
WIRE -48 -32 -48 -80
WIRE -672 80 -672 48
WIRE -512 80 -672 80
WIRE -464 80 -512 80
WIRE -352 80 -384 80
WIRE -304 80 -352 80
WIRE -48 80 -48 48
WIRE -48 80 -224 80
WIRE -512 112 -512 80
SYMBOL voltage -624 -80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL ind -352 -64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100m
SYMATTR SpiceLine Rser=0
SYMBOL cap -112 -96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 5m
FLAG -512 112 0
FLAG -208 -80 vxpos
FLAG -352 80 vxneg
* Z:\home\khalils\Downloads\files\data\raw_asc\7ec12baf725c_temperatura.asc
* Generated by LTspice 26.0.1 for Windows.
D1 vd1 0 1N3198
V1 N001 0 0
R1 vd1 N001 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -10 10 10m
.model 1N3198 D (IS=2.0e-7 N=1.20 RS=1.0 EG=1.11 XTI=-2 CJO=40p VJ=0.75 M=0.333 BV=2.25 IBV=5m KF=0 AF=1 FC=0.5)
.step temp list 20 100 125
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1892 680
WIRE 80 64 -16 64
WIRE 240 64 160 64
WIRE -16 112 -16 64
WIRE 240 112 240 64
WIRE -16 240 -16 192
WIRE 112 240 -16 240
WIRE 240 240 240 176
WIRE 240 240 112 240
WIRE 112 256 112 240
SYMBOL diode 224 112 R0
SYMATTR InstName D1
SYMATTR Value 1N3198
SYMBOL res 176 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -16 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0
FLAG 112 256 0
FLAG 240 64 vd1
TEXT -48 280 Left 2 !.dc V1 -10 10 10m
TEXT 384 128 Left 2 !.model 1N3198 D (IS=2.0e-7 N=1.20 RS=1.0 EG=1.11 XTI=-2 CJO=40p VJ=0.75 M=0.333 BV=2.25 IBV=5m KF=0 AF=1 FC=0.5)
TEXT -48 320 Left 2 !.step temp list 20 100 125
* Z:\home\khalils\Downloads\files\data\raw_asc\2b1057e90d94_ADA4830.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4830.asy)
V1 N001 0 5
R1 N001 N002 5K
V5 N005 0 PULSE(0 3 1u 1n 1n 10u 20u)
V3 N004 0 SINE(0 1 1Meg)
XU1 N003 N004 0 N001 0 N005 N002 OUT ADA4830 ;pnba VREF)IN+)IN-)V+)V-)ENA)STB)OUT
V4 N003 0 2.5
R2 OUT 0 1K
.tran 100u
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1256 680
WIRE 16 16 -128 16
WIRE 64 16 16 16
WIRE -128 32 -128 16
WIRE 64 32 64 16
WIRE 16 112 16 16
WIRE -128 128 -128 112
WIRE 64 128 64 112
WIRE -16 160 -32 160
WIRE -16 192 -336 192
WIRE 336 192 192 192
WIRE -336 208 -336 192
WIRE 336 208 336 192
WIRE -16 224 -208 224
WIRE -208 240 -208 224
WIRE 16 288 16 272
WIRE 64 288 64 272
WIRE -336 304 -336 288
WIRE 336 304 336 288
WIRE -208 336 -208 320
WIRE 64 384 64 368
SYMBOL res 48 16 R0
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL voltage -336 192 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName V4
SYMATTR Value 2.5
SYMBOL ADA4830 48 192 R0
WINDOW 0 50 -38 Left 2
SYMATTR InstName U1
SYMBOL voltage 64 272 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR Value PULSE(0 3 1u 1n 1n 10u 20u)
SYMATTR InstName V5
SYMBOL voltage -208 224 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR Value SINE(0 1 1Meg)
SYMATTR InstName V3
SYMBOL res 320 192 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -128 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 16 288 0
FLAG 336 192 OUT
FLAG -336 304 0
FLAG -208 336 0
FLAG -128 128 0
FLAG 336 304 0
FLAG 64 384 0
FLAG -32 160 0
TEXT 328 416 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\1cfb54b001bd_cauer_o.asc
* Generated by LTspice 26.0.1 for Windows.
L2 N002 0 5 Rser=0
L1 N001 0 1.25 Rser=0
C2 N002 N001 0.08
V1 Vi 0 AC 1
C1 N001 Vi 0.666
.ac dec 1000 1m 10
.net V(vi) V1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 80 -48 80
WIRE 192 80 112 80
WIRE 272 80 192 80
WIRE 400 80 336 80
WIRE -48 112 -48 80
WIRE 192 112 192 80
WIRE 400 112 400 80
WIRE -48 224 -48 192
WIRE 192 224 192 192
WIRE 192 224 -48 224
WIRE 400 224 400 192
WIRE 400 224 192 224
WIRE -48 240 -48 224
SYMBOL ind 176 96 R0
SYMATTR InstName L1
SYMATTR Value 1.25
SYMATTR SpiceLine Rser=0
SYMBOL cap 336 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 0.08
SYMBOL voltage -48 96 R0
WINDOW 123 18 106 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL cap 112 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.666
SYMBOL ind 384 96 R0
SYMATTR InstName L2
SYMATTR Value 5
SYMATTR SpiceLine Rser=0
FLAG -48 240 0
FLAG -48 80 Vi
TEXT -336 184 Left 2 !.ac dec 1000 1m 10
TEXT -336 216 Left 2 !.net V(vi) V1