Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5679R.asc
* Generated by LTspice 26.0.1 for Windows.
RLOAD NC_01 0 1k
CLOAD vOUT 0 10n
Vdac vDAC 0 PWL(0 0 10u 0 +1u 1.875)
V1 Vdd 0 5.5
XU1 vDAC Vdd 0 vOUT AD5679R Gain=2 ;pnba Vdac)Vdd)GND)Vout
.tran 50u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5679R.asy)
.lib AD5679R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -240 -80 Vdd
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -800 128 R0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0 10u 0 +1u 1.875)
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL AD5679R -208 112 R0
SYMATTR InstName U1
TEXT -160 312 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\5a66b8f17ce0_Common_Emitter.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N001 N004 1K
VBB N002 0 0
VCC N004 0 0
Q1 N001 N003 0 0 BC547B
R1 N003 N002 100K
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VCC 0 10 0.1 VBB 0.5 1 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 608 192 480 192
WIRE 608 224 608 192
WIRE 480 240 480 192
WIRE 288 288 208 288
WIRE 416 288 368 288
WIRE 608 336 608 304
WIRE 208 352 208 288
WIRE 208 480 208 432
WIRE 480 480 480 336
WIRE 480 480 208 480
WIRE 608 480 608 416
WIRE 608 480 480 480
WIRE 480 496 480 480
SYMBOL voltage 208 336 R0
SYMATTR InstName VBB
SYMATTR Value 0
SYMBOL res 384 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 592 208 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 608 320 R0
SYMATTR InstName VCC
SYMATTR Value 0
SYMBOL npn 416 240 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
FLAG 480 496 0
TEXT 112 504 Left 2 !.dc VCC 0 10 0.1 VBB 0.5 1 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4693.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4693.asy)
C5 N003 0 2.2n
C6 OUT 0 22 x3 Rser=1m
C1 OUT N001 100p
R2 N003 N002 10k
XU1 NC_01 NC_02 OUT IN IN N002 N001 0 NC_03 IN 0 LTM4693 ;pnba SW1)SW2)Vout)Run)SS)Comp)FB)GND)Rt)Vin)Mode
V1 IN 0 2.8
R1 N001 0 26.4k
Rload OUT 0 1
.tran 2.5m startup
.lib LTM4693.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1736 680
WIRE 48 16 -48 16
WIRE 64 16 48 16
WIRE 464 16 384 16
WIRE 560 16 464 16
WIRE 656 16 560 16
WIRE -48 32 -48 16
WIRE 464 32 464 16
WIRE 656 32 656 16
WIRE 560 48 560 16
WIRE 48 112 48 16
WIRE 64 112 48 112
WIRE 464 112 464 96
WIRE 464 112 384 112
WIRE -48 128 -48 112
WIRE 464 128 464 112
WIRE 560 144 560 112
WIRE 656 144 656 112
WIRE 656 144 560 144
WIRE 656 160 656 144
WIRE 48 208 48 112
WIRE 64 208 48 208
WIRE 464 224 464 208
WIRE 64 304 48 304
WIRE 416 304 384 304
WIRE 512 304 496 304
WIRE 592 304 576 304
WIRE 224 384 224 368
SYMBOL cap 544 48 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 x3
SYMATTR InstName C6
SYMATTR Value 22
SYMATTR SpiceLine Rser=1m
SYMBOL res 512 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL cap 512 320 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
WINDOW 39 -21 32 VBottom 2
SYMATTR InstName C5
SYMATTR Value 2.2n
SYMBOL cap 448 32 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL LTM4693 224 144 R0
WINDOW 3 1 71 Center 2
SYMATTR InstName U1
SYMBOL res 448 112 R0
SYMATTR InstName R1
SYMATTR Value 26.4k
SYMBOL res 640 16 R0
SYMATTR InstName Rload
SYMATTR Value 1
SYMBOL voltage -48 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.8
FLAG 224 384 0
FLAG -48 128 0
FLAG 48 304 0
FLAG 656 160 0
FLAG -48 16 IN
FLAG 656 16 OUT
FLAG 592 304 0
FLAG 464 224 0
TEXT 432 384 Left 2 !.tran 2.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\74a15cebb42d_IXFK27N80Q_test.asc
* Generated by LTspice 26.0.1 for Windows.
* 1. Add a "nmos" component to the schematic.\n \n2. Replace the value NMOS with IXFK27N80Q\n on your nmos-transistor in the schematic.\n \n6. Put the model either on the schematic or into a file.\n \nAdd the line \n .include IXFK27N80Q.lib\nif you use a model file. \nI recommend to keep the model file in the same \nfolder as the schematic. This makes a complete\nbackup of a circuit easy.
* Plot Id(M1) to get the current Idrain depending on Vgs and Vds.
V1 N002 0 0
M1 N001 N002 0 0 IXFK27N80Q
V2 N001 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 -0 5 0.01 V1 3.9 4.5 0.2
.include IXFK27N80Q.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1512 988
WIRE -448 272 -448 240
WIRE -448 400 -448 352
WIRE -448 432 -448 400
WIRE -304 240 -448 240
WIRE -256 160 -256 128
WIRE -256 400 -448 400
WIRE -256 400 -256 256
WIRE -32 128 -256 128
WIRE -32 176 -32 128
WIRE -32 400 -256 400
WIRE -32 400 -32 256
SYMBOL nmos -304 160 R0
SYMATTR InstName M1
SYMATTR Value IXFK27N80Q
SYMBOL voltage -448 256 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL voltage -32 160 R0
SYMATTR InstName V2
SYMATTR Value 5
FLAG -448 432 0
TEXT -448 16 Left 0 !.dc V2 -0 5 0.01 V1 3.9 4.5 0.2
TEXT -472 488 Left 0 ;1. Add a "nmos" component to the schematic.\n \n2. Replace the value NMOS with IXFK27N80Q\n    on your nmos-transistor in the schematic.\n \n6. Put the model either  on the schematic or into a file.\n \nAdd the line  \n    .include IXFK27N80Q.lib\nif you use a model file. \nI recommend to keep the model file in the same \nfolder as the schematic. This makes a complete\nbackup of a circuit easy.
TEXT -448 64 Left 0 !.include IXFK27N80Q.lib
TEXT -456 -48 Left 0 ;Plot Id(M1) to get the current Idrain depending on Vgs and Vds.
* Z:\home\khalils\Downloads\files\data\raw_asc\1513269bf28e_tc3_sim.asc
* Generated by LTspice 26.0.1 for Windows.
* GND
* n1 150V
* n2 111.71V
* n3 11.71V
* n4 -63.063
R3 0 N001 20
R2 N003 N002 12.5
I1 0 N002 5A
V1 N003 0 150
R1 0 N004 25
V2 N002 N001 100
R4 N004 N001 10
I2 N004 N003 10
.tran 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 -16 -48 -16
WIRE 240 -16 112 -16
WIRE 352 -16 240 -16
WIRE 528 -16 432 -16
WIRE 240 48 240 -16
WIRE -48 208 -48 -16
WIRE 32 208 -48 208
WIRE 240 208 240 128
WIRE 240 208 112 208
WIRE 352 208 240 208
WIRE 528 208 528 -16
WIRE 528 208 432 208
WIRE 240 256 240 208
WIRE -48 384 -48 208
WIRE 32 384 -48 384
WIRE 240 384 240 336
WIRE 240 384 112 384
WIRE 352 384 240 384
WIRE 528 384 528 208
WIRE 528 384 432 384
SYMBOL res 224 240 R0
SYMATTR InstName R1
SYMATTR Value 25
SYMBOL current 352 384 R270
WINDOW 0 32 40 VTop 2
WINDOW 3 -32 40 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I2
SYMATTR Value 10
SYMBOL voltage 448 208 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 150
SYMBOL voltage 128 -16 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value 100
SYMBOL res 128 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 20
SYMBOL res 128 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL current 240 128 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 5A
SYMBOL res 448 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 12.5
FLAG 240 208 0
TEXT 256 184 Left 2 ;GND
TEXT 552 176 Left 2 ;n1 150V
TEXT -48 456 Left 2 !.tran 10
TEXT 200 -56 Left 2 ;n2 111.71V
TEXT -200 208 Left 2 ;n3 11.71V
TEXT 176 432 Left 2 ;n4 -63.063
* Z:\home\khalils\Downloads\files\data\raw_asc\21b1441c93e7_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N003 N005 R
R1 N001 N003 R
RE N001 N002 R
RC N004 N005 R
Q1 N004 N003 N002 0 PNP
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 320 -32 112 -32
WIRE 320 128 320 48
WIRE 112 176 112 48
WIRE 256 176 112 176
WIRE 112 320 112 176
WIRE 320 320 320 224
WIRE 320 400 112 400
SYMBOL res 96 -48 R0
SYMATTR InstName R1
SYMBOL pnp 256 224 M180
SYMATTR InstName Q1
SYMBOL res 304 304 R0
SYMATTR InstName RC
SYMBOL res 304 -48 R0
SYMATTR InstName RE
SYMBOL res 96 304 R0
SYMATTR InstName R2
* Z:\home\khalils\Downloads\files\data\raw_asc\44e53cce212c_flickernoise2a.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 0 Denoise
H1 out 0 Vesen {enoise/iref}
Ien 0 N001 {iref**2/q/2}
Cen N001 N002 1
Vesen N002 0 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model Denoise D(kf ={2*q*fce}, af =1)
.noise v(out) Vesen dec 10 0.001 10k
.op
.params iref = 1e-12 q=1.602e-19 enoise=20e-9 fce=200
* taken from "low noise electronic system designs" by Mothenbacher &Connelly
* Modeling 1/f and white voltage noise in LTspice (enoise [V/sqrHz] and fce [Hz])
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 176 -64 128
WIRE -64 320 -64 256
WIRE 32 128 -64 128
WIRE 32 144 32 128
WIRE 32 224 32 208
WIRE 32 320 -64 320
WIRE 32 320 32 304
WIRE 32 352 32 320
WIRE 128 128 32 128
WIRE 128 192 128 128
WIRE 128 320 32 320
WIRE 128 320 128 256
WIRE 336 176 336 144
WIRE 336 352 336 256
WIRE 464 144 336 144
FLAG 32 352 0
FLAG 336 352 0
FLAG 464 144 out
IOPIN 464 144 Out
SYMBOL diode 112 192 R0
SYMATTR InstName D1
SYMATTR Value Denoise
SYMBOL h 336 160 R0
WINDOW 38 -43 56 Left 0
SYMATTR InstName H1
SYMATTR Value {enoise/iref}
SYMATTR SpiceModel Vesen
SYMBOL current -64 256 R180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Ien
SYMATTR Value {iref**2/q/2}
SYMBOL cap 16 144 R0
WINDOW 0 -36 6 Left 0
WINDOW 3 27 6 Left 0
SYMATTR InstName Cen
SYMATTR Value 1
SYMBOL voltage 32 208 R0
WINDOW 0 -83 89 Left 0
WINDOW 3 32 89 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vesen
SYMATTR Value 0
TEXT -56 416 Left 0 !.model Denoise D(kf ={2*q*fce}, af =1)
TEXT -56 472 Left 0 !.noise v(out) Vesen dec 10 0.001 10k
TEXT -56 448 Left 0 !.op
TEXT -56 384 Left 0 !.params iref = 1e-12 q=1.602e-19 enoise=20e-9 fce=200
TEXT -200 80 Left 0 ;taken from "low noise electronic system designs" by Mothenbacher &Connelly
TEXT -200 48 Left 0 ;Modeling 1/f and white voltage noise in LTspice (enoise [V/sqrHz] and fce [Hz])
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4091.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4091.asy)
V1 +V 0 15
Vin IN 0 SINE(0 1 10K)
V2 -V 0 -15
XU1 IN N001 +V -V OUT ADA4091 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 10K
Rload OUT 0 10K
R1 N001 0 10K
.tran 1m
.lib ADA4091.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 416 -1232 400 -1232
WIRE 528 -1232 496 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1168 144 -1184
WIRE 256 -1168 256 -1184
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 144 -1072 144 -1088
WIRE 256 -1072 256 -1088
WIRE 432 -1072 432 -1088
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Opamps\\ADA4091 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 256 -1184 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 512 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 144 -1184 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
FLAG 144 -1184 +V
FLAG 256 -1072 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1184 -V
FLAG 576 -1072 -V
FLAG 400 -1232 0
FLAG 768 -992 0
FLAG 144 -1072 0
TEXT 712 -952 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7104-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7104-2.5.asy)
Rload OUT 0 7
R1 OUT N001 100k
C1 OUT 0 2.2 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADP7104-2.5 ;pnba Vin)Sense)EN)PG)Vout)GND
V1 IN 0 PWL(0 0 20u 3.5)
.tran 3m startup
.lib ADP7104-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -160 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -160 48 -160 32
WIRE 368 128 352 128
WIRE 464 128 464 32
WIRE 464 128 368 128
WIRE 560 128 464 128
WIRE -160 144 -160 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 368 224 368 128
WIRE 368 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
SYMBOL voltage -160 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 20u 3.5)
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 7
SYMBOL ADP7104-2.5 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -160 144 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -160 32 IN
FLAG 560 128 OUT
TEXT 432 288 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3547.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3547.asy)
Rload2 OUT2 0 6
Rload1 OUT1 0 8.33
C1 OUT2 0 4.7
V1 IN 0 5
C2 OUT2 N003 10p
R2 N003 0 237K
R1 OUT2 N003 475K
L2 N002 OUT1 4.7
C3 OUT1 N004 10p
L1 N001 OUT2 4.7
R4 N004 0 150K
R3 OUT1 N004 475K
XU1 N004 IN IN N002 0 N001 IN N003 LTC3547 ;pnba FB1)Run1)Vin)SW1)GND)SW2)Run2)FB2
C4 OUT1 0 4.7
.tran 800u startup
.lib LTC3547.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 700
WIRE 272 48 -304 48
WIRE 352 48 272 48
WIRE 432 48 352 48
WIRE -304 64 -304 48
WIRE 272 80 272 48
WIRE 352 80 352 48
WIRE 432 80 432 48
WIRE -80 144 -208 144
WIRE 0 144 -80 144
WIRE 80 144 0 144
WIRE 208 144 160 144
WIRE 576 144 496 144
WIRE 672 144 656 144
WIRE 736 144 672 144
WIRE 848 144 736 144
WIRE -304 160 -304 144
WIRE -208 160 -208 144
WIRE -80 160 -80 144
WIRE 736 160 736 144
WIRE 848 160 848 144
WIRE 0 208 0 144
WIRE 16 208 0 208
WIRE 144 208 80 208
WIRE 544 208 528 208
WIRE 672 208 672 144
WIRE 672 208 608 208
WIRE -208 256 -208 240
WIRE -80 256 -80 224
WIRE 736 256 736 224
WIRE 848 256 848 240
WIRE 0 288 0 208
WIRE 48 288 0 288
WIRE 144 288 144 208
WIRE 144 288 128 288
WIRE 208 288 144 288
WIRE 528 288 528 208
WIRE 528 288 496 288
WIRE 576 288 528 288
WIRE 672 288 672 208
WIRE 672 288 656 288
WIRE 144 304 144 288
WIRE 528 304 528 288
WIRE 352 368 352 336
WIRE 144 400 144 384
WIRE 528 400 528 384
SYMBOL ind 176 160 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL res 512 288 R0
SYMATTR InstName R4
SYMATTR Value 150K
SYMBOL res 128 288 R0
SYMATTR InstName R2
SYMATTR Value 237K
SYMBOL res -224 144 R0
SYMATTR InstName Rload2
SYMATTR Value 6
SYMBOL res 832 144 R0
SYMATTR InstName Rload1
SYMATTR Value 8.33
SYMBOL res 32 272 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 475K
SYMBOL VOLTAGE -304 48 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 608 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL cap -96 160 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL PowerProducts\\LTC3547 352 208 R0
WINDOW 0 0 -48 Center 2
SYMATTR InstName U1
SYMBOL res 672 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 475K
SYMBOL cap 720 160 R0
SYMATTR InstName C4
SYMATTR Value 4.7
SYMBOL ind 560 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 4.7
SYMBOL cap 16 192 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10p
FLAG -304 160 0
FLAG 352 368 0
FLAG -304 48 IN
FLAG -80 256 0
FLAG -208 256 0
FLAG 144 400 0
FLAG 736 256 0
FLAG 848 256 0
FLAG 528 400 0
FLAG 848 144 OUT1
FLAG -208 144 OUT2
TEXT 648 376 Left 2 !.tran 800u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5423.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5423.asy)
R2 N002 0 1k
R4 OUT N003 1k
V1 0 N007 24
XU1 N001 N001 0 MP_01 MP_02 MP_03 N006 NC_04 N002 N002 MP_05 N007 N005 MP_06 N003 N004 IN AD5423 RANGE = 0, OVRNG_EN = 0, NEG_OFFSET_EN = 0 SR_EN = 0, SR_STEP = 0, SR_CLOCK = 0 VIOUT_PULLDOWN_EN = 0, HART_EN = 0 ;pnba AVDD1)AVDD2)GND))))REFOUT)CHART)VLDO)VLOGIC))AVSS)-VSENSE))+VSENSE)VIOUT)INPUT
R1 N006 0 1k
R3 0 N005 1k
V2 N001 0 24
V4 IN 0 PULSE(1 2 100u 1u 1u 1m)
R6 OUT 0 1k
R5 N004 OUT 10
.tran 200u
.lib AD5423.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2016 1328
WIRE -96 -320 -96 -384
WIRE 160 -320 160 -384
WIRE -96 -160 -96 -240
WIRE 32 -160 -96 -160
WIRE 160 -160 160 -240
WIRE 272 -160 160 -160
WIRE -96 -96 -96 -160
WIRE 32 -96 32 -160
WIRE 160 -96 160 -160
WIRE 272 -96 272 -160
WIRE 528 96 464 96
WIRE 816 96 608 96
WIRE -176 224 -512 224
WIRE 576 224 528 224
WIRE 816 224 816 96
WIRE 816 224 656 224
WIRE 864 224 816 224
WIRE 816 240 816 224
WIRE -512 288 -512 224
WIRE 544 352 464 352
WIRE 816 352 816 320
WIRE 816 352 624 352
WIRE -512 432 -512 368
WIRE 816 432 816 352
WIRE 464 464 416 464
WIRE 464 528 464 464
WIRE -16 640 -16 560
WIRE 208 640 208 560
WIRE 464 656 464 608
WIRE -16 800 -16 720
SYMBOL res 448 512 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 560 208 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10
SYMBOL voltage -96 -224 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 24
SYMBOL res 144 -224 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -16 736 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL voltage -512 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(1 2 100u 1u 1u 1m)
SYMBOL res 800 224 R0
SYMATTR InstName R6
SYMATTR Value 1k
SYMBOL AD5423 80 224 R0
SYMATTR InstName U1
SYMBOL res 640 336 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 624 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1k
FLAG 208 640 0
FLAG -16 800 0
FLAG -96 -384 0
FLAG 464 656 0
FLAG 160 -384 0
FLAG -512 432 0
FLAG 816 432 0
FLAG -512 224 IN
FLAG 864 224 OUT
TEXT 504 -64 Left 2 !.tran 200u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP163.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
R1 OUT N002 230K
R2 N002 0 100K
C1 OUT 0 1
Rload OUT 0 330
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
XU1 IN 0 N001 OUT N002 ADP16xa ;pnba Vin)GND)En)Vout)Adj
.tran 4m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP163.asy)
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -112 96
WIRE 432 96 352 96
WIRE 544 96 432 96
WIRE 624 96 544 96
WIRE -112 112 -112 96
WIRE 432 112 432 96
WIRE 544 112 544 96
WIRE 624 112 624 96
WIRE -112 208 -112 192
WIRE 160 208 16 208
WIRE 432 208 432 192
WIRE 432 208 352 208
WIRE 544 208 544 176
WIRE 624 208 624 192
WIRE 16 224 16 208
WIRE 432 224 432 208
WIRE 256 272 256 256
WIRE 16 320 16 304
WIRE 432 320 432 304
FLAG -112 208 0
FLAG 256 272 0
FLAG 432 320 0
FLAG 544 208 0
FLAG 624 208 0
FLAG 624 96 OUT
FLAG -112 96 IN
FLAG 16 320 0
SYMBOL voltage -112 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 416 96 R0
SYMATTR InstName R1
SYMATTR Value 230K
SYMBOL res 416 208 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL cap 528 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 608 96 R0
SYMATTR InstName Rload
SYMATTR Value 330
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL ADP163 256 208 R0
SYMATTR InstName U1
TEXT 512 248 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\866448fafd06_3rd_MFB.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
;tran 0 100u 50u
R2 N003 N002 820
R1 N002 N001 150
XU1 0 N004 NC_01 NC_02 OUT level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
C2 N003 0 1000p
C3 OUT N004 100p
R4 OUT N003 1k
C1 N002 0 3300p
V1 N001 0 PULSE(-1 1 0 2.5u 2.5u 0 5u) AC 1
R3 N004 N003 2.2k
.ac oct 10 10 100Meg
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 980 680
WIRE 688 0 528 0
WIRE 832 0 688 0
WIRE 528 32 528 0
WIRE 688 48 688 0
WIRE 256 144 192 144
WIRE 368 144 336 144
WIRE 416 144 368 144
WIRE 528 144 528 112
WIRE 528 144 496 144
WIRE 576 144 528 144
WIRE 688 144 688 112
WIRE 688 144 656 144
WIRE 736 144 688 144
WIRE 832 160 832 0
WIRE 832 160 800 160
WIRE 864 160 832 160
WIRE 192 176 192 144
WIRE 368 176 368 144
WIRE 528 176 528 144
WIRE 736 176 704 176
WIRE 368 256 368 240
WIRE 528 256 528 240
WIRE 704 256 704 176
WIRE 192 272 192 256
IOPIN 864 160 Out
SYMBOL voltage 192 160 R0
WINDOW 3 -53 155 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(-1 1 0 2.5u 2.5u 0 5u)
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL res 672 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2.2k
SYMBOL cap 672 48 R0
SYMATTR InstName C3
SYMATTR Value 100p
SYMBOL Opamps\\UniversalOpamp2 768 160 R0
SYMATTR InstName U1
SYMBOL cap 512 176 R0
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL cap 352 176 R0
SYMATTR InstName C1
SYMATTR Value 3300p
SYMBOL res 512 16 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL res 352 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 150
SYMBOL res 512 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 820
FLAG 192 272 0
FLAG 528 256 0
FLAG 704 256 0
FLAG 368 256 0
FLAG 864 160 OUT
TEXT 520 344 Left 2 !.ac oct 10 10 100Meg
TEXT 520 312 Left 2 !;tran 0 100u 50u