Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8618.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8618.asy)
C1 OUT 0 22
R4 OUT FB 1.62Meg
C3 N003 0 1
R2 RT 0 110k
C2 N002 SW 47n
Rload OUT 0 50
XU1 N003 SW OUT N002 RT FB TRSS PG N001 N001 0 LT8604C LT8604=0 DFN=1 VOUT33=0 ;pnba INTVCC)SW)Bias)BST)Rt)FB)TR/SS)PG)EN/UV)Vin)GND
V1 N001 0 12
L1 SW OUT 120 Rser=1
R3 OUT PG 100k
R1 FB 0 301k
.tran 3m steady nodiscard
.lib LT8604C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1748 780
WIRE -32 48 -192 48
WIRE 16 48 -32 48
WIRE 368 48 304 48
WIRE 368 64 368 48
WIRE -192 128 -192 48
WIRE -32 144 -32 48
WIRE 16 144 -32 144
WIRE 336 144 304 144
WIRE 368 144 368 128
WIRE 368 144 336 144
WIRE 432 144 368 144
WIRE 528 144 512 144
WIRE 608 144 528 144
WIRE 800 144 608 144
WIRE 912 144 800 144
WIRE 944 144 912 144
WIRE 800 160 800 144
WIRE 944 160 944 144
WIRE 608 192 608 144
WIRE -64 240 -96 240
WIRE 16 240 0 240
WIRE 528 240 528 144
WIRE 528 240 304 240
WIRE 800 256 800 224
WIRE 944 256 944 240
WIRE -192 272 -192 208
WIRE 336 336 304 336
WIRE 608 336 608 272
WIRE 608 336 336 336
WIRE 608 352 608 336
WIRE -64 432 -112 432
WIRE 16 432 -64 432
WIRE 608 464 608 432
WIRE -48 528 -192 528
WIRE 16 528 -48 528
WIRE 336 528 304 528
WIRE 384 528 336 528
WIRE 528 528 528 240
WIRE 528 528 464 528
WIRE -192 576 -192 528
WIRE 160 624 160 576
WIRE -192 720 -192 656
SYMBOL res 480 512 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL voltage -192 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 592 176 R0
SYMATTR InstName R4
SYMATTR Value 1.62Meg
SYMBOL cap 352 64 R0
SYMATTR InstName C2
SYMATTR Value 47n
SYMBOL res -208 560 R0
SYMATTR InstName R2
SYMATTR Value 110k
SYMBOL res 928 144 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL cap 0 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 784 160 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL ind 416 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 120
SYMATTR SpiceLine Rser=1
SYMBOL LT8618 160 240 R0
SYMATTR InstName U1
SYMBOL res 592 336 R0
SYMATTR InstName R1
SYMATTR Value 301k
FLAG 608 464 0
FLAG 800 256 0
FLAG 912 144 OUT
FLAG -192 720 0
FLAG -192 272 0
FLAG 336 528 PG
FLAG 336 336 FB
FLAG 336 144 SW
FLAG -48 528 RT
FLAG -64 432 TRSS
FLAG 160 624 0
FLAG 944 256 0
FLAG -96 240 0
TEXT 608 616 Left 2 !.tran 3m steady nodiscard
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1736.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1736.asy)
C1 N002 0 36p
XU1 +V N004 NC_01 N005 N002 N001 N003 NC_02 NC_03 NC_04 0 ADG1736 ;pnba VDD)IN1)IN2)EN)D1)S1A)S1B)D2)S2A)S2B)GND
R1 N002 0 49.9
V5 N005 0 1.8
V2 N003 0 0
V1 N001 0 3
V4 +V 0 5
V3 N004 0 PULSE(0 1.17 0 1n 1n 10u 20u)
.tran 100u
.lib ADG1736.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2888 1548
WIRE -976 -480 -976 -512
WIRE -1088 -416 -1376 -416
WIRE -1376 -400 -1376 -416
WIRE -784 -384 -864 -384
WIRE -672 -384 -784 -384
WIRE -784 -368 -784 -384
WIRE -672 -368 -672 -384
WIRE -1088 -352 -1264 -352
WIRE -1264 -336 -1264 -352
WIRE -1376 -304 -1376 -320
WIRE -1088 -288 -1168 -288
WIRE -784 -272 -784 -288
WIRE -672 -272 -672 -304
WIRE -1264 -240 -1264 -256
WIRE -1168 -224 -1168 -288
WIRE -1168 -112 -1168 -144
WIRE -784 -96 -864 -96
WIRE -784 -80 -784 -96
WIRE -784 32 -784 0
WIRE -976 80 -976 64
SYMBOL ADG1736 -992 -336 R0
SYMATTR InstName U1
SYMBOL res -800 -384 R0
SYMATTR InstName R1
SYMATTR Value 49.9
SYMBOL voltage -1264 -352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage -1376 -416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL voltage -1376 -176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL voltage -784 -96 R0
WINDOW 3 32 87 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 1.8
SYMATTR InstName V5
SYMBOL voltage -1168 -240 R0
WINDOW 3 -412 256 Left 2
SYMATTR Value PULSE(0 1.17 0 1n 1n 10u 20u)
SYMATTR InstName V3
SYMBOL cap -688 -368 R0
SYMATTR InstName C1
SYMATTR Value 36p
FLAG -1376 -304 0
FLAG -1264 -240 0
FLAG -1168 -112 0
FLAG -976 -512 +V
FLAG -784 -272 0
FLAG -976 80 0
FLAG -672 -272 0
FLAG -1376 -80 0
FLAG -1376 -160 +V
FLAG -784 32 0
TEXT -728 80 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\0bb7d1b1d616_LPF.asc
* Generated by LTspice 26.0.1 for Windows.
V1 V+ 0 5
V2 0 V- 5
XLPF 0 N001 V+ V- Vout LT1001 ;pnba In+)In-)V+)V-)OUT
Rf Vout N001 {Rf}
Rs N001 Vin {Rs}
Cf Vout N001 {Cf}
* LPF to filter out high frequency noise. Cutoff frequency should be between 200-250Hz, chose 248.9Hz
.param cutoff = 248.9
.param gain = -1
.param Cf=20n
.param Rs = {-Rf/gain}
.param Rf={1/(2*pi*cutoff*Cf)}
* Library below included based on ModelFile attribute of instance XLPF (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1440 680
WIRE 496 112 416 112
WIRE 624 112 560 112
WIRE 416 208 416 112
WIRE 480 208 416 208
WIRE 624 208 624 112
WIRE 624 208 560 208
WIRE 288 304 64 304
WIRE 416 304 416 208
WIRE 416 304 368 304
WIRE 480 304 416 304
WIRE 624 320 624 208
WIRE 624 320 544 320
WIRE 672 320 624 320
WIRE 480 336 416 336
WIRE 416 400 416 336
FLAG 704 528 0
FLAG 784 528 0
FLAG 416 400 0
FLAG 512 352 V-
FLAG 704 448 V-
FLAG 512 288 V+
FLAG 784 448 V+
FLAG 64 304 Vin
FLAG 672 320 Vout
SYMBOL voltage 784 432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 704 544 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL OpAmps\\OP07 512 256 R0
SYMATTR InstName LPF
SYMBOL res 576 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rf
SYMATTR Value {Rf}
SYMBOL res 384 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rs
SYMATTR Value {Rs}
SYMBOL cap 560 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName Cf
SYMATTR Value {Cf}
TEXT 24 24 Left 2 ;LPF to filter out high frequency noise. Cutoff frequency should be between 200-250Hz, chose 248.9Hz
TEXT 1040 176 Left 2 !.param cutoff = 248.9\n.param gain = -1\n.param Cf=20n\n.param Rs = {-Rf/gain}\n.param Rf={1/(2*pi*cutoff*Cf)}
* Z:\home\khalils\Downloads\files\data\raw_asc\15e4a517dc17_AD5766.asc
* Generated by LTspice 26.0.1 for Windows.
* Dither with 0.5V offset\nRange is one of {1,2,...,8}
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5766.asy)
XU1 IN N002 N001 N003 OUT 0 AD5766 Range=8 dither_scale=0 dither_inv=0 ;pnba Vdac)NO)AVdd)AVss)Vout)GND
V2 N002 0 SINE(0.5 50m 1K 100u)
C1 0 OUT 100p
V1 IN 0 PWL(0 0 100u 0 +1u 0.625 +5m 0.625 +1u 1.25 +5m 1.25 +1u 1.875 +5m 1.875 +1u 2.5 +5m 2.5)
V3 N001 0 12
V4 N003 0 -12
.tran 21m
.lib AD5766.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1520
WIRE 176 400 128 400
WIRE 304 400 256 400
WIRE 128 480 128 400
WIRE -480 528 -512 528
WIRE -272 528 -400 528
WIRE -272 560 -272 528
WIRE -64 560 -272 560
WIRE 352 624 304 624
WIRE 400 624 352 624
WIRE 496 624 464 624
WIRE -224 704 -256 704
WIRE -64 704 -144 704
WIRE 16 816 16 768
WIRE 128 848 128 768
WIRE 176 848 128 848
WIRE 304 848 256 848
SYMBOL cap 464 608 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL voltage 160 848 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V4
SYMATTR Value -12
SYMBOL voltage -128 704 M270
WINDOW 0 48 44 VRight 2
WINDOW 3 -50 -29 VRight 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0.5 50m 1K 100u)
SYMBOL AD5766 96 624 R0
WINDOW 39 4 70 Center 2
SYMATTR InstName U1
SYMBOL voltage 160 400 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V3
SYMATTR Value 12
SYMBOL voltage -384 528 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 35 42 VTop 2
WINDOW 123 63 42 VTop 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 100u 0 +1u 0.625 +5m 0.625 +1u 1.25 +5m 1.25
SYMATTR Value2 +1u 1.875 +5m 1.875 +1u 2.5 +5m 2.5)
FLAG -512 528 0
FLAG 496 624 0
FLAG 352 624 OUT
FLAG 304 400 0
FLAG -256 704 0
FLAG 16 816 0
FLAG 304 848 0
FLAG -272 528 IN
TEXT -216 392 Left 2 !.tran 21m
TEXT -344 808 Left 2 ;Dither with 0.5V offset\nRange is one of {1,2,...,8}
* Z:\home\khalils\Downloads\files\data\raw_asc\2e6dd915c426_Astable_Multivibrator.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N002 400
R2 N001 N003 200k
R3 N001 N004 200k
R4 N001 OUT 300
C1 N003 N002 10p
C2 OUT N004 10p
Q1 N002 N004 N009 0 BC547B
Q2 OUT N003 N008 0 BC547B
D1 N009 0 D
D2 N008 0 D
V1 N001 0 5
Q3 N001 N005 P001 0 NPN
D3 OUT N005 D
D4 P001 N006 D
D5 N006 N007 D
R5 0 N007 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0.0001 startup
* Voltage regulation and rise time optimization part
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1248 680
WIRE 176 80 64 80
WIRE 224 80 224 -32
WIRE 224 80 176 80
WIRE 272 80 224 80
WIRE 368 80 272 80
WIRE 592 80 368 80
WIRE 64 224 64 160
WIRE 96 224 64 224
WIRE 176 224 176 160
WIRE 176 224 160 224
WIRE 272 224 272 160
WIRE 288 224 272 224
WIRE 368 224 368 160
WIRE 368 224 352 224
WIRE 592 224 592 80
WIRE 368 272 368 224
WIRE 400 272 400 240
WIRE 400 272 368 272
WIRE 432 272 400 272
WIRE 528 272 496 272
WIRE 64 304 64 224
WIRE 400 304 400 272
WIRE 176 352 176 224
WIRE 336 352 176 352
WIRE 128 368 128 352
WIRE 288 368 288 224
WIRE 288 368 128 368
WIRE 592 400 592 384
WIRE 608 400 592 400
WIRE 736 400 672 400
WIRE 848 400 816 400
WIRE 400 464 400 400
WIRE 64 480 64 400
WIRE 64 608 64 544
WIRE 400 608 400 528
FLAG 400 608 0
FLAG 224 -112 0
FLAG 64 608 0
FLAG 848 400 0
FLAG 400 240 OUT
SYMBOL res 48 64 R0
SYMATTR InstName R1
SYMATTR Value 400
SYMBOL res 160 64 R0
SYMATTR InstName R2
SYMATTR Value 200k
SYMBOL res 256 64 R0
SYMATTR InstName R3
SYMATTR Value 200k
SYMBOL res 352 64 R0
SYMATTR InstName R4
SYMATTR Value 300
SYMBOL cap 160 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL cap 352 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL npn 128 304 M0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL npn 336 304 R0
SYMATTR InstName Q2
SYMATTR Value BC547B
SYMBOL LED 48 480 R0
SYMATTR InstName D1
SYMBOL LED 384 464 R0
SYMATTR InstName D2
SYMBOL voltage 224 -16 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL npn 528 224 R0
SYMATTR InstName Q3
SYMBOL diode 432 288 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D3
SYMBOL diode 576 320 R0
SYMATTR InstName D4
SYMBOL diode 608 416 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D5
SYMBOL res 832 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1k
TEXT -16 632 Left 2 !.tran 0.0001 startup
TEXT 664 208 Left 2 ;Voltage regulation and rise time optimization part
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1764-1.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1764-1.0.asy)
C4 OUT 0 10
C2 N003 0 10n
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1764 Radj=6688.96 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
R1 OUT 0 .5
V1 IN 0 1.3
C1 N004 0 1
C3 N002 0 1
R2 N001 IN 50K
.tran 1m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value .5
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ADP1764-1.0 224 176 R0
SYMATTR InstName U1
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.3
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\4e4e656bd5c0_Assignment_3b__i_.asc
* Generated by LTspice 26.0.1 for Windows.
* Negative Half Wave Rectifier Circuit (Practical)
V1 N001 0 SINE(0 5 1000) Rser=0.001
R1 N002 0 1000
D1 N002 N001 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5ms
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 64 80 64
WIRE 352 64 256 64
WIRE 80 112 80 64
WIRE 352 112 352 64
WIRE 80 240 80 192
WIRE 176 240 80 240
WIRE 352 240 352 192
WIRE 352 240 176 240
WIRE 176 272 176 240
SYMBOL diode 256 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 80 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.001
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1000)
SYMBOL res 336 96 R0
SYMATTR InstName R1
SYMATTR Value 1000
FLAG 176 272 0
TEXT 16 272 Left 2 !.tran 5ms
TEXT -24 8 Left 2 ;Negative Half Wave Rectifier Circuit (Practical)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3972.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3972.asy)
C3 N002 0 680p
D1 0 N004 MBRS340
V1 IN 0 30
Rload OUT 0 1.43
R6 IN N001 500K
C1 OUT 0 47
R5 OUT N007 100K
R1 OUT N008 536K
R3 N003 N002 15K
R2 N008 0 100K
R4 N005 0 63.4K
C2 N004 N006 .47
L1 N004 OUT 4.7 Rpar=2K
XU1 OUT N006 N004 IN N001 MP_01 N007 N008 N003 N005 0 LT3972 ;pnba BD)Boost)SW)Vin)Run/SS))Pgood)FB)Vc)Rt)GND
C4 N001 0 .01
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LT3972.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1236 740
WIRE -352 64 -448 64
WIRE 96 64 -352 64
WIRE -448 80 -448 64
WIRE -352 80 -352 64
WIRE 96 112 96 64
WIRE -64 160 -352 160
WIRE 560 160 256 160
WIRE -448 176 -448 160
WIRE -352 176 -352 160
WIRE -240 240 -256 240
WIRE -160 240 -176 240
WIRE -64 240 -80 240
WIRE 288 240 256 240
WIRE 384 240 288 240
WIRE 448 240 384 240
WIRE 560 240 560 160
WIRE 560 240 528 240
WIRE 656 240 560 240
WIRE 752 240 656 240
WIRE 848 240 752 240
WIRE -352 256 -352 240
WIRE 288 256 288 240
WIRE 384 256 384 240
WIRE 752 256 752 240
WIRE 848 256 848 240
WIRE 560 272 560 240
WIRE -208 320 -256 320
WIRE -64 320 -128 320
WIRE 288 320 256 320
WIRE 384 336 384 320
WIRE 656 336 656 240
WIRE 752 352 752 320
WIRE 848 352 848 336
WIRE -64 400 -80 400
WIRE 560 400 560 352
WIRE 560 400 256 400
WIRE 560 416 560 400
WIRE 96 464 96 448
WIRE 560 512 560 496
WIRE -80 544 -80 400
WIRE 656 544 656 416
WIRE 656 544 -80 544
SYMBOL res -64 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 15K
SYMBOL cap -368 176 R0
SYMATTR InstName C4
SYMATTR Value .01
SYMBOL cap 272 256 R0
WINDOW 3 30 49 Left 2
SYMATTR Value .47
SYMATTR InstName C2
SYMBOL res 832 240 R0
SYMATTR InstName Rload
SYMATTR Value 1.43
SYMBOL res 640 320 R0
SYMATTR InstName R5
SYMATTR Value 100K
SYMBOL PowerProducts\\LT3972 96 288 R0
SYMATTR InstName U1
SYMBOL res -368 64 R0
SYMATTR InstName R6
SYMATTR Value 500K
SYMBOL ind 432 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=2K
SYMBOL res -112 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 63.4K
SYMBOL cap 736 256 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMBOL schottky 368 320 M180
WINDOW 0 28 62 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 544 256 R0
SYMATTR InstName R1
SYMATTR Value 536K
SYMBOL voltage -448 64 R0
SYMATTR InstName V1
SYMATTR Value 30
SYMBOL cap -176 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 680p
SYMBOL res 544 400 R0
SYMATTR InstName R2
SYMATTR Value 100K
FLAG 384 336 0
FLAG 752 352 0
FLAG 560 512 0
FLAG -256 240 0
FLAG -448 176 0
FLAG 96 464 0
FLAG 848 352 0
FLAG -256 320 0
FLAG -352 256 0
FLAG 848 240 OUT
FLAG -448 64 IN
TEXT 264 496 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4122B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4122B.asy)
R2 OUT N004 10
V2 N002 0 15
R1 OUT N003 10
V3 IN 0 PULSE(0 5 0 2n 2n 998n 2u)
C1 OUT 0 2n
V1 N001 0 5
XU1 N001 IN 0 0 N003 N002 0 N004 ADuM4122x Vrun2=7.2 ;pnba Vdd1)Vin)GND1)GND2)Vout)Vdd2)_SRC)Vout_SRC
.tran 10u
.lib ADuM4122x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -16 0 -16
WIRE 448 -16 320 -16
WIRE 0 0 0 -16
WIRE 448 0 448 -16
WIRE 160 48 160 -16
WIRE 320 48 320 -16
WIRE 0 96 0 80
WIRE 448 96 448 80
WIRE 112 160 -288 160
WIRE 400 160 368 160
WIRE 496 160 480 160
WIRE 544 160 496 160
WIRE 576 160 544 160
WIRE -288 176 -288 160
WIRE 544 176 544 160
WIRE 112 240 96 240
WIRE 400 240 368 240
WIRE 496 240 496 160
WIRE 496 240 480 240
WIRE 544 256 544 240
WIRE -288 272 -288 256
WIRE 160 352 160 336
WIRE 320 352 320 336
SYMBOL voltage 0 -16 R0
WINDOW 0 25 25 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 496 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL voltage 448 -16 R0
WINDOW 0 29 30 Left 2
WINDOW 3 31 84 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL ADuM4122B 240 160 R0
SYMATTR InstName U1
SYMBOL res 496 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage -288 160 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 2n 2n 998n 2u)
SYMBOL cap 528 176 R0
SYMATTR InstName C1
SYMATTR Value 2n
FLAG 544 256 0
FLAG 576 160 OUT
FLAG 448 96 0
FLAG 0 96 0
FLAG -288 272 0
FLAG 320 352 0
FLAG 160 352 0
FLAG 96 240 0
FLAG -288 160 IN
TEXT 416 336 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\1d9ccca49825_varactor_model.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 Anode 0.7n
R1 N001 N002 0.8
D1 N002 Cathode S1672 area=1
C2 N001 Cathode 1.8p
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model S1672 D(Is=1e-14 Rs=0 N=1 Tt=0 Cjo=25.8p M=3.7 Vj=10 Eg=1.11 Xti=3 Kf=0 Af=1 Fc=0.5 Ibv=1e-3 Isr=0 Nr=2 Ikf=0 Ibv=0 Tnom=27)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2068 680
WIRE 128 32 -128 32
WIRE 128 64 128 32
WIRE 240 64 128 64
WIRE 432 64 304 64
WIRE -128 112 -128 32
WIRE -64 112 -128 112
WIRE 432 112 432 64
WIRE 528 112 432 112
WIRE 736 112 608 112
WIRE 128 176 128 64
WIRE 176 176 128 176
WIRE 304 176 240 176
WIRE 432 176 432 112
WIRE 432 176 384 176
IOPIN -64 112 BiDir
IOPIN 736 112 BiDir
SYMBOL varactor 240 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value S1672 area=1
SYMATTR Type diode
SYMBOL res 400 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 0.8
SYMBOL cap 304 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1.8p
SYMBOL ind 512 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 0.7n
FLAG -64 112 Cathode
FLAG 736 112 Anode
TEXT -16 392 Left 2 !.model S1672 D(Is=1e-14 Rs=0 N=1 Tt=0 Cjo=25.8p M=3.7 Vj=10 Eg=1.11 Xti=3 Kf=0 Af=1 Fc=0.5 Ibv=1e-3 Isr=0 Nr=2 Ikf=0 Ibv=0 Tnom=27)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6119-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6119-1.asy)
R1 N001 N002 .1
C1 N002 0 .1
C2 N004 0 100n
V1 N001 0 PWL(0 0 5u 12)
V4 N006 0 5
R9 N006 N007 10K
I1 N002 0 PWL(20u 0 250u .5 400u .5 500u .2 600u .2 700u 0) load
XU1 N002 N004 N007 N009 0 N008 N010 N005 N001 N003 LT6119-1 ;pnba SenseLo)LE)OutC2)OutC1)V-)INC1)INC2)OutA)V+)SenseHi
R3 N008 N010 2.73K
R5 N008 0 1.6K
R6 N001 N004 24.9K
R2 N005 N010 6.04K
R4 N006 N009 10K
R8 N001 N003 100
.tran .7m
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2204 1236
WIRE -144 -32 -400 -32
WIRE 80 -32 -144 -32
WIRE 288 -32 80 -32
WIRE 352 -32 288 -32
WIRE 480 -32 432 -32
WIRE 560 -32 480 -32
WIRE 672 -32 560 -32
WIRE -400 -16 -400 -32
WIRE 288 -16 288 -32
WIRE 560 -16 560 -32
WIRE 672 -16 672 -32
WIRE -400 80 -400 64
WIRE -144 80 -144 -32
WIRE 288 80 288 64
WIRE 560 80 560 48
WIRE 672 80 672 64
WIRE 80 128 80 -32
WIRE 128 128 80 128
WIRE 480 128 480 -32
WIRE 480 128 448 128
WIRE -144 240 -144 160
WIRE 128 240 -144 240
WIRE 704 240 448 240
WIRE 704 304 704 240
WIRE -144 320 -144 304
WIRE -16 352 -128 352
WIRE 16 352 -16 352
WIRE 128 352 96 352
WIRE 480 352 448 352
WIRE 544 352 480 352
WIRE 640 352 624 352
WIRE -128 368 -128 352
WIRE 480 368 480 352
WIRE -128 464 -128 448
WIRE -16 464 -16 352
WIRE 16 464 -16 464
WIRE 128 464 96 464
WIRE 480 464 480 448
WIRE 480 464 448 464
WIRE 704 464 704 384
WIRE 704 464 480 464
WIRE 288 528 288 512
SYMBOL res 688 288 R0
SYMATTR InstName R2
SYMATTR Value 6.04K
SYMBOL voltage -128 352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL voltage -400 -32 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 5u 12)
SYMBOL res -160 64 R0
SYMATTR InstName R6
SYMATTR Value 24.9K
SYMBOL res 0 368 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R9
SYMATTR Value 10K
SYMBOL res 272 -32 R0
SYMATTR InstName R8
SYMATTR Value 100
SYMBOL LT6119-1 288 304 R0
SYMATTR InstName U1
SYMBOL res 336 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value .1
SYMBOL cap -160 240 R0
WINDOW 0 34 20 Left 2
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL res 464 352 R0
SYMATTR InstName R3
SYMATTR Value 2.73K
SYMBOL cap 544 -16 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL res 0 480 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL current 672 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 39 48 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMATTR Value PWL(20u 0 250u .5 400u .5 500u .2 600u .2 700u 0)
SYMBOL res 528 368 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 1.6K
FLAG 288 528 0
FLAG -400 80 0
FLAG 672 80 0
FLAG 640 352 0
FLAG 560 80 0
FLAG -128 464 0
FLAG -144 320 0
TEXT 816 440 Left 2 !.tran .7m