* Z:\home\khalils\Downloads\files\data\raw_asc\3f86b460549e_tl431a.asc
* Generated by LTspice 26.0.1 for Windows.
* TL431A behavioral model by analog@ieee.org
D4 A 4 2V5
R1 R A 1e6
C1 5 A 1n Rpar=1k
G2 K 4 6 A 90m
C2 K 6 40p Rser=6k Rpar=400k
D3 A 6 Di
G1 A 5 R 4 1
R2 6 5 700k
D5 A K Dc
D2 4 R Dc
D1 R K Dc
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model Di D(Ron=10m)
.model Dc D(Ron=7 Vfwd=.6 Vrev=36)
.model 2V5 D(Ron=.13 Vfwd=.6 Vrev=2.5 Roff=7k)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1008 680
WIRE 272 -64 224 -64
WIRE 736 80 816 80
WIRE 272 -32 272 -64
WIRE 272 48 272 80
WIRE 272 80 352 80
WIRE 816 -144 816 -304
WIRE 736 80 736 48
WIRE 272 -176 272 -112
WIRE 736 -16 736 -112
WIRE 368 -64 352 -64
WIRE 352 -64 352 80
WIRE 352 80 464 80
WIRE 448 -64 464 -64
WIRE 464 80 624 80
WIRE 272 -112 272 -64
WIRE 688 -160 688 80
WIRE 688 80 736 80
WIRE 736 -144 736 -112
WIRE 736 -304 816 -304
WIRE 624 -304 624 -288
WIRE 624 -224 624 -208
WIRE 624 -304 736 -304
WIRE 432 -112 464 -112
WIRE 384 -112 352 -112
WIRE 272 -304 624 -304
WIRE 272 -304 272 -240
WIRE 464 -64 464 -16
WIRE 464 48 464 80
WIRE 464 -64 496 -64
WIRE 352 -112 352 -160
WIRE 352 -112 272 -112
WIRE 352 -160 368 -160
WIRE 432 -160 464 -160
WIRE 464 -160 464 -112
WIRE 464 -112 496 -112
WIRE 496 -112 736 -112
WIRE 624 80 624 48
WIRE 624 80 688 80
WIRE 624 -16 624 -64
WIRE 624 -64 592 -64
WIRE 656 -208 624 -208
WIRE 656 -208 688 -208
WIRE 624 -64 624 -208
WIRE 496 -64 512 -64
WIRE 816 -80 816 80
WIRE 816 -304 864 -304
WIRE 816 80 864 80
WIRE 736 -224 736 -304
WIRE 128 -464 128 -432
WIRE 128 -464 160 -464
WIRE 976 -464 976 -432
WIRE 976 -464 944 -464
WIRE 128 240 128 208
WIRE 128 240 160 240
WIRE 976 240 976 208
WIRE 976 240 944 240
IOPIN 224 -64 In
IOPIN 864 -304 In
IOPIN 864 80 In
RECTANGLE Normal 960 224 144 -448
SYMBOL diode 256 -176 M180
WINDOW 0 32 64 Left 0
WINDOW 3 32 0 Left 0
SYMATTR InstName D1
SYMATTR Value Dc
SYMBOL res 608 -80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 700k
SYMBOL cap 448 -16 R0
WINDOW 0 32 8 Left 0
WINDOW 3 32 56 Left 0
WINDOW 39 32 80 Left 0
SYMATTR InstName C1
SYMATTR Value 1n
SYMATTR SpiceLine Rpar=1k
SYMBOL diode 432 -176 R90
WINDOW 0 0 24 VBottom 0
WINDOW 3 32 24 VTop 0
SYMATTR InstName D2
SYMATTR Value Dc
SYMBOL diode 832 -80 R180
WINDOW 0 32 64 Left 0
WINDOW 3 32 0 Left 0
SYMATTR InstName D5
SYMATTR Value Dc
SYMBOL cap 640 -288 M0
WINDOW 0 32 8 Left 0
WINDOW 3 32 56 Left 0
WINDOW 39 16 -32 Bottom 0
SYMATTR InstName C2
SYMATTR Value 40p
SYMATTR SpiceLine Rser=6k Rpar=400k
SYMBOL res 256 -48 R0
WINDOW 0 40 40 Left 0
WINDOW 3 40 72 Left 0
SYMATTR InstName R1
SYMATTR Value 1e6
SYMBOL zener 720 48 M180
WINDOW 0 32 64 Left 0
WINDOW 3 32 0 Left 0
SYMATTR InstName D4
SYMATTR Value 2V5
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL g2 736 -128 M180
WINDOW 0 -16 104 Right 0
WINDOW 3 16 104 Left 0
SYMATTR InstName G2
SYMATTR Value 90m
SYMBOL diode 608 48 M180
WINDOW 0 32 64 Left 0
WINDOW 3 32 0 Left 0
SYMATTR InstName D3
SYMATTR Value Di
SYMBOL g2 464 -64 R90
WINDOW 0 56 56 VCenter 0
WINDOW 3 80 56 VCenter 0
SYMATTR InstName G1
SYMATTR Value 1
FLAG 224 -64 R
FLAG 864 -304 K
FLAG 864 80 A
FLAG 496 -112 4
FLAG 496 -64 5
FLAG 656 -208 6
TEXT 272 120 Left 0 !.model Di D(Ron=10m)\n.model Dc D(Ron=7 Vfwd=.6 Vrev=36)\n.model 2V5 D(Ron=.13 Vfwd=.6 Vrev=2.5 Roff=7k)
TEXT 544 -392 Center 0 ;TL431A behavioral model by analog@ieee.org