Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3311S.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3311S.asy)
R4 N006 N005 1K
R3 OUT N001 500K
V1 IN 0 5
R5 N007 0 274K
Rload OUT 0 0.3
L1 N002 OUT 200n Rser=2m
C2 N003 0 4.7n
R1 OUT N004 562K
C1 OUT 0 22 m=2 Rser=10m
C5 OUT N004 10p
XU1 IN IN N002 N004 0 0 N007 N001 IN N006 N003 LTC3311S ;pnba VIN)EN)SW)FB)AGND)PGND)RT)PGOOD)MODE/SYNC)ITH)SSTT
R2 N004 0 100K
C3 N005 0 1500p
.tran 1.2m startup
.step temp list 25 100 150
.lib LTC3311S.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2648 1864
WIRE 1408 1248 1376 1248
WIRE 1520 1248 1408 1248
WIRE 1712 1248 1520 1248
WIRE 1376 1280 1376 1248
WIRE 1712 1280 1712 1248
WIRE 1520 1328 1520 1248
WIRE 1552 1328 1520 1328
WIRE 1904 1328 1872 1328
WIRE 2016 1328 1984 1328
WIRE 1376 1376 1376 1360
WIRE 1520 1424 1520 1328
WIRE 1552 1424 1520 1424
WIRE 1904 1424 1872 1424
WIRE 2016 1424 2016 1328
WIRE 2016 1424 1984 1424
WIRE 2144 1424 2016 1424
WIRE 2256 1424 2144 1424
WIRE 2336 1424 2256 1424
WIRE 2384 1424 2336 1424
WIRE 2144 1440 2144 1424
WIRE 2256 1440 2256 1424
WIRE 2384 1440 2384 1424
WIRE 1424 1520 1408 1520
WIRE 1552 1520 1488 1520
WIRE 2016 1520 2016 1504
WIRE 2016 1520 1872 1520
WIRE 2144 1520 2144 1504
WIRE 2144 1520 2016 1520
WIRE 2016 1536 2016 1520
WIRE 2256 1536 2256 1504
WIRE 2384 1536 2384 1520
WIRE 1424 1616 1360 1616
WIRE 1552 1616 1504 1616
WIRE 1904 1616 1872 1616
WIRE 1360 1632 1360 1616
WIRE 1904 1632 1904 1616
WIRE 2016 1632 2016 1616
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
WIRE 1360 1712 1360 1696
WIRE 1904 1728 1904 1712
SYMBOL res 1888 1616 R0
SYMATTR InstName R5
SYMATTR Value 274K
SYMBOL cap 1488 1504 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL res 2368 1424 R0
SYMATTR InstName Rload
SYMATTR Value 0.3
SYMBOL RES 2000 1408 R0
SYMATTR InstName R1
SYMATTR Value 562K
SYMBOL LTC3311S 1712 1456 R0
SYMATTR InstName U1
SYMBOL cap 2128 1440 R0
SYMATTR InstName C5
SYMATTR Value 10p
SYMBOL cap 2240 1440 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 m=2
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine Rser=10m
SYMBOL res 1520 1600 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL res 2000 1312 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 500K
SYMBOL ind 1888 1440 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 200n
SYMATTR SpiceLine Rser=2m
SYMBOL VOLTAGE 1376 1264 R0
SYMATTR Value 5
SYMATTR InstName V1
SYMBOL res 2000 1520 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL cap 1344 1632 R0
SYMATTR InstName C3
SYMATTR Value 1500p
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1376 1376 0
FLAG 2384 1536 0
FLAG 2016 1632 0
FLAG 1408 1520 0
FLAG 2336 1424 OUT
FLAG 1408 1248 IN
FLAG 1360 1712 0
FLAG 2256 1536 0
FLAG 1904 1728 0
TEXT 2104 1760 Left 2 !.tran 1.2m startup
TEXT 2104 1720 Left 2 !.step temp list 25 100 150
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6909.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6909.asy)
XU1 N001 0 N001 N001 N002 N003 N004 N005 N006 N007 N009 N011 N001 N010 0 N008 LTC6909 ;pnba V+A)GND)PH0)PH1)OUT1)OUT2)OUT3)OUT4)OUT5)OUT6)OUT7)OUT8)V+D)MOD)PH2)SET
V1 N001 0 3.3
C1 N010 0 .01
R1 N001 N008 71.5K
.tran .5m startup
.lib LTC6909.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 -32 -128 -32
WIRE 112 -32 -32 -32
WIRE 384 -32 368 -32
WIRE -128 -16 -128 -32
WIRE 112 32 96 32
WIRE 384 32 368 32
WIRE -128 80 -128 64
WIRE -32 96 -32 -32
WIRE 112 96 -32 96
WIRE 384 96 368 96
WIRE -32 160 -32 96
WIRE 112 160 -32 160
WIRE 384 160 368 160
WIRE -32 224 -32 160
WIRE 112 224 -32 224
WIRE 384 224 368 224
WIRE -32 240 -32 224
WIRE 112 288 96 288
WIRE 384 288 368 288
WIRE -32 352 -32 320
WIRE 112 352 -32 352
WIRE 384 352 368 352
WIRE 32 416 16 416
WIRE 112 416 96 416
WIRE 384 416 368 416
SYMBOL res -48 224 R0
SYMATTR Value 71.5K
SYMATTR InstName R1
SYMBOL voltage -128 -32 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL SpecialFunctions\\LTC6909 240 192 R0
SYMATTR InstName U1
SYMBOL cap 96 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .01
FLAG -128 80 0
FLAG 96 32 0
FLAG 96 288 0
FLAG 16 416 0
TEXT 496 424 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3561.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3561.asy)
Rload OUT 0 2.5
R3 OUT N005 887K
C2 OUT 0 22
XU1 N004 MP_01 0 N003 0 IN IN MP_02 N005 N002 LTC3561 ;pnba SHDN/Rt))SGND)SW)PGND)PVin)SVin))FB)Ith
R1 N004 0 324K
R4 N005 0 412K
C1 N001 0 1000p
L1 N003 OUT 2.2
R2 N002 N001 13K
V1 IN 0 4
.tran 1m startup
.lib LTC3561.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2480 1756
WIRE 1136 1328 784 1328
WIRE 1264 1328 1136 1328
WIRE 784 1344 784 1328
WIRE 1136 1360 1136 1328
WIRE 1264 1360 1264 1328
WIRE 896 1424 880 1424
WIRE 976 1424 960 1424
WIRE 1072 1424 1056 1424
WIRE 1344 1424 1328 1424
WIRE 1456 1424 1424 1424
WIRE 1568 1424 1456 1424
WIRE 1664 1424 1568 1424
WIRE 784 1440 784 1424
WIRE 1456 1440 1456 1424
WIRE 1568 1440 1568 1424
WIRE 1664 1440 1664 1424
WIRE 976 1536 960 1536
WIRE 1072 1536 1056 1536
WIRE 1456 1536 1456 1520
WIRE 1456 1536 1328 1536
WIRE 1568 1536 1568 1504
WIRE 1664 1536 1664 1520
WIRE 1456 1552 1456 1536
WIRE 1136 1632 1136 1616
WIRE 1264 1632 1264 1616
WIRE 1456 1648 1456 1632
SYMBOL res 1440 1424 R0
SYMATTR InstName R3
SYMATTR Value 887K
SYMBOL PowerProducts\\LTC3561 1200 1472 R0
SYMATTR InstName U1
SYMBOL cap 960 1408 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000p
SYMBOL res 1072 1520 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 324K
SYMBOL res 1648 1424 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL res 1072 1408 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 13K
SYMBOL res 1440 1536 R0
SYMATTR InstName R4
SYMATTR Value 412K
SYMBOL voltage 784 1328 R0
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL cap 1552 1440 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL ind 1328 1440 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
FLAG 960 1536 0
FLAG 880 1424 0
FLAG 1136 1632 0
FLAG 1264 1632 0
FLAG 784 1440 0
FLAG 1456 1648 0
FLAG 1568 1536 0
FLAG 1664 1536 0
FLAG 784 1328 IN
FLAG 1664 1424 OUT
TEXT 1216 1672 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\107f2aa32e23_DAC_Filter.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
V2 +5V 0 5
C2 DAC_Out_Filtered N002 500p
C1 N001 0 1n
XU2 0 N002 +5V -5V DAC_Out_Filtered level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R1 N001 DAC_Out 3.3k
V3 -5V 0 -5
R3 DAC_Out_Filtered N001 3.3k
B2 DAC_Out 0 V={floor(V(vs0)/vrange*nlevels)/nlevels*vrange}
V1 vs0 0 SINE(0 1 {f0})
R2 N002 N001 1.6k
.tran 0 500u 0 5p
.param f0=1k fs=20k
.param vrange = 1
.param nlevels=65536
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1152 680
WIRE -320 -320 -416 -320
WIRE -192 -320 -272 -320
WIRE -416 -256 -416 -320
WIRE -272 -256 -272 -320
WIRE -416 -128 -416 -176
WIRE -272 -128 -272 -176
WIRE 496 -32 336 -32
WIRE 736 -32 576 -32
WIRE -416 80 -416 16
WIRE -304 80 -304 16
WIRE 208 80 176 80
WIRE 336 80 336 -32
WIRE 336 80 288 80
WIRE 384 80 336 80
WIRE 512 80 464 80
WIRE 624 80 512 80
WIRE 736 80 736 -32
WIRE 736 80 688 80
WIRE 816 80 736 80
WIRE 336 128 336 80
WIRE 592 176 592 144
WIRE 512 192 512 80
WIRE 560 192 512 192
WIRE -416 208 -416 160
WIRE -304 208 -304 160
WIRE 736 208 736 80
WIRE 736 208 624 208
WIRE 336 224 336 192
WIRE 560 224 496 224
WIRE 496 272 496 224
WIRE 592 272 592 240
SYMBOL cap 320 128 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL bv -272 -272 R0
SYMATTR InstName B2
SYMATTR Value V={floor(V(vs0)/vrange*nlevels)/nlevels*vrange}
SYMBOL voltage -304 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 592 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 3.3k
SYMBOL cap 688 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 500p
SYMBOL voltage -416 -272 R0
WINDOW 3 -83 185 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 {f0})
SYMBOL voltage -416 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL OpAmps\\UniversalOpAmp 592 208 R0
WINDOW 0 -40 -46 Left 2
SYMATTR InstName U2
SYMBOL res 480 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1.6k
SYMBOL res 304 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3.3k
FLAG -416 -128 0
FLAG 336 224 0
FLAG 496 272 0
FLAG 176 80 DAC_Out
FLAG 816 80 DAC_Out_Filtered
FLAG -304 208 0
FLAG -304 16 +5V
FLAG -416 208 0
FLAG -416 16 -5V
FLAG 592 144 +5V
FLAG 592 272 -5V
FLAG -272 -128 0
FLAG -320 -320 vs0
FLAG -192 -320 DAC_Out
TEXT -432 376 Left 2 !.tran 0 500u 0 5p
TEXT -432 328 Left 2 !.param f0=1k fs=20k
TEXT -144 344 Left 2 !.param vrange = 1\n.param nlevels=65536
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1716.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1716.asy)
V1 +V 0 5
V3 N001 0 PULSE(0 2 0 .5m .5m 0 1m)
V2 N003 0 1
XU1 N003 N001 +V 0 N002 LT1716 ;pnba In+)In-)V+)V-)OUT
.tran 3m
.lib LT1716.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 800
WIRE 208 256 208 224
WIRE 176 272 -320 272
WIRE -320 288 -320 272
WIRE 336 288 240 288
WIRE -448 304 -448 288
WIRE 176 304 64 304
WIRE 64 320 64 304
WIRE 208 336 208 320
WIRE -448 400 -448 384
WIRE -320 400 -320 368
WIRE 64 416 64 400
SYMBOL voltage 64 304 R0
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL Comparators\\LT1716 208 288 R0
SYMATTR InstName U1
SYMBOL voltage -448 288 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -320 272 R0
WINDOW 3 17 101 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 2 0 .5m .5m 0 1m)
SYMATTR InstName V3
FLAG -448 400 0
FLAG -448 288 +V
FLAG 208 224 +V
FLAG -320 400 0
FLAG 64 416 0
FLAG 208 336 0
TEXT 168 416 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7105-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7105-5.0.asy)
R1 OUT N001 100k
Rload OUT 0 15
XU1 IN OUT IN N002 OUT 0 N001 ADP7105 Vref=5 ;pnba Vin)Sense)EN)SS)Vout)GND)PG
C1 OUT 0 2.2 Rser=1.5m
V1 IN 0 6
C2 N002 0 2.7n
.tran 6m startup
.lib ADP7105.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE 384 128 352 128
WIRE 464 128 464 32
WIRE 464 128 384 128
WIRE 560 128 464 128
WIRE -32 144 -32 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 128
WIRE 384 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 2.7n
SYMBOL ADP7105-5.0 224 128 R0
SYMATTR InstName U1
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 15
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -32 32 IN
FLAG 560 128 OUT
TEXT 432 296 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD744.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD746.asy)
XU1 IN N001 +V -V OUT AD746 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 10K
V1 +V 0 15
V2 -V 0 -15
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
.tran 1m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 720 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 432 -976 432 -992
SYMBOL AD746 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 720 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 256 -1056 0
TEXT 752 -952 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\9f8a811f643a_Low-Dropout-Linear-Regulator.asc
* Generated by LTspice 26.0.1 for Windows.
* Low-Dropout-Voltage-Regulator in linear version\nCreated by AblL
R1 Ue N001 560
V1 Ue N002 15V
QT Ue N001 Ua 0 BD139
RL Ua 0 44
D1 0 N001 1N750
V2 N002 0 SINE(0 1 50)
RVL Ua 0 470
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 100ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 224 -32 80 -32
WIRE 400 -32 224 -32
WIRE 480 -32 400 -32
WIRE 624 -32 576 -32
WIRE 704 -32 624 -32
WIRE 752 -32 704 -32
WIRE 80 0 80 -32
WIRE 400 0 400 -32
WIRE 624 0 624 -32
WIRE 752 0 752 -32
WIRE 400 112 400 80
WIRE 528 112 528 32
WIRE 528 112 400 112
WIRE 624 112 624 80
WIRE 688 112 624 112
WIRE 752 112 752 80
WIRE 752 112 688 112
WIRE 80 128 80 80
WIRE 400 144 400 112
WIRE 688 144 688 112
WIRE 80 240 80 208
WIRE 400 240 400 208
SYMBOL Misc\\EuropeanResistor 608 -16 R0
SYMATTR InstName RVL
SYMATTR Value 470
SYMBOL Misc\\EuropeanResistor 736 -16 R0
SYMATTR InstName RL
SYMATTR Value 44
SYMBOL npn 480 32 R270
WINDOW 0 110 16 VRight 2
WINDOW 3 84 13 VRight 2
SYMATTR InstName T
SYMATTR Value BD139
SYMBOL voltage 80 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15V
SYMBOL zener 416 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N750
SYMBOL voltage 80 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 1 50)
SYMBOL Misc\\EuropeanResistor 384 -16 R0
SYMATTR InstName R1
SYMATTR Value 560
FLAG 80 240 0
FLAG 400 240 0
FLAG 688 144 0
FLAG 224 -32 Ue
FLAG 704 -32 Ua
TEXT 176 -120 Left 2 !.tran 100ms
TEXT 168 -176 Left 2 ;Low-Dropout-Voltage-Regulator in linear version\nCreated by AblL
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8071.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8071.asy)
XU2 N001 N001 IN IN N004 N003 NC_01 OUT NC_02 N002 NC_03 0 LTM8071 ;pnba BIAS)AUX)RUN)VIN)FB)TR/SS)SHARE)VOUT)PG)RT)SYNC)GND
C2 OUT 0 100
R2 0 N004 102K
R3 OUT 0 1
R1 N002 0 56.2K
V1 IN 0 22
C1 N003 0 1n
.tran 10m startup
.lib LTM8071.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 -64 -16 -64
WIRE 192 -32 192 -64
WIRE -16 32 -16 -64
WIRE 96 32 -16 32
WIRE 480 32 384 32
WIRE 592 32 480 32
WIRE 480 48 480 32
WIRE 592 48 592 32
WIRE -16 64 -16 32
WIRE 416 128 384 128
WIRE 480 144 480 112
WIRE 592 144 592 128
WIRE -16 160 -16 144
WIRE 0 224 -16 224
WIRE 96 224 80 224
WIRE 416 224 416 128
WIRE 416 224 384 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 400 320 384 320
WIRE 496 320 480 320
WIRE 192 400 192 384
SYMBOL LTM8071 240 176 R0
SYMATTR InstName U2
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL voltage -16 48 R0
SYMATTR InstName V1
SYMATTR Value 22
SYMBOL res 576 32 R0
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL cap 464 48 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMBOL res 496 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 102K
SYMBOL res 96 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 56.2K
FLAG -16 160 0
FLAG -16 224 0
FLAG -16 320 0
FLAG 192 400 0
FLAG 496 320 0
FLAG 480 144 0
FLAG 592 144 0
FLAG -16 -64 IN
FLAG 592 32 OUT
TEXT 448 424 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0297a32fd387__Fig1_27_AC_MSD.asc
* Generated by LTspice 26.0.1 for Windows.
* Reduce feedback to < 1 so gain \ndoesn't become infinite valued.
E1 Vout 0 Vin N001 1
Vin Vin 0 AC 1
T1 N002 0 Vout 0 Td=10n Z0=50
R1 N002 0 50
E2 N001 0 0 N002 0.95
.ac lin 1000 1k 200MEG
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 688
WIRE 512 288 144 288
WIRE 576 288 512 288
WIRE 144 320 144 288
WIRE -16 336 -32 336
WIRE 96 336 -16 336
WIRE -32 352 -32 336
WIRE -32 448 -32 432
WIRE 96 448 96 384
WIRE 272 512 144 512
WIRE 400 512 272 512
WIRE 576 512 576 288
WIRE 576 512 496 512
WIRE 272 528 272 512
WIRE 400 544 384 544
WIRE 528 544 496 544
WIRE 272 640 272 608
SYMBOL e 144 304 R0
WINDOW 0 42 39 Left 0
WINDOW 3 44 69 Left 0
SYMATTR InstName E1
SYMATTR Value 1
SYMBOL e 96 432 M0
WINDOW 0 42 39 Left 0
WINDOW 3 44 69 Left 0
SYMATTR InstName E2
SYMATTR Value 0.95
SYMBOL res 256 512 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL tline 448 528 R0
SYMATTR InstName T1
SYMATTR Value Td=10n Z0=50
SYMBOL voltage -32 336 R0
WINDOW 0 -73 38 Left 0
WINDOW 123 -82 95 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value2 AC 1
SYMATTR Value ""
FLAG 272 640 0
FLAG 528 544 0
FLAG 384 544 0
FLAG -32 448 0
FLAG -16 336 Vin
FLAG 512 288 Vout
FLAG 144 400 0
FLAG 96 528 0
FLAG 144 464 0
TEXT 360 616 Left 0 !.ac lin 1000 1k 200MEG
TEXT -128 568 Left 0 ;Reduce feedback to < 1 so gain \ndoesn't become infinite valued.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8608.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8608.asy)
C1 N004 0 .001
C5 OUT N005 10p
Rload OUT 0 2.5
R1 N006 0 18.2K
C4 OUT 0 22 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
C2 N001 0 1
L1 N003 OUT 2.2 Rser=3m
C3 N002 N003 0.1
R2 OUT N005 976K
XU1 N002 N003 N001 N006 NC_01 N005 N004 NC_02 IN IN 0 LT8608 ;pnba BST)SW)INTVcc)RT)SYNC)FB)TR/SS)PG)VIN)EN/UV)GND
V1 IN 0 24
R3 N005 0 178K
.tran 500u startup
.lib LT8608.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1044 680
WIRE 96 -64 0 -64
WIRE 256 -64 96 -64
WIRE 0 -48 0 -64
WIRE 256 -48 256 -64
WIRE 96 0 96 -64
WIRE 112 0 96 0
WIRE 416 0 400 0
WIRE 496 0 480 0
WIRE 0 48 0 32
WIRE 432 96 400 96
WIRE 432 112 432 96
WIRE 432 192 432 176
WIRE 432 192 400 192
WIRE 496 192 432 192
WIRE 608 192 576 192
WIRE 720 192 608 192
WIRE 816 192 720 192
WIRE 912 192 816 192
WIRE 608 208 608 192
WIRE 720 208 720 192
WIRE 816 208 816 192
WIRE 912 208 912 192
WIRE 32 288 0 288
WIRE 112 288 96 288
WIRE 608 288 400 288
WIRE 720 288 720 272
WIRE 720 288 608 288
WIRE 608 304 608 288
WIRE 816 304 816 272
WIRE 912 304 912 288
WIRE 16 384 0 384
WIRE 112 384 96 384
WIRE 416 384 400 384
WIRE 608 400 608 384
SYMBOL cap 96 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .001
SYMBOL res 112 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 18.2K
SYMBOL cap 416 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 704 208 R0
SYMATTR InstName C5
SYMATTR Value 10p
SYMBOL ind 480 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=3m
SYMBOL res 896 192 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL res 592 192 R0
SYMATTR InstName R2
SYMATTR Value 976K
SYMBOL cap 416 112 R0
SYMATTR InstName C3
SYMATTR Value 0.1
SYMBOL LT8608 256 192 R0
SYMATTR InstName U1
SYMBOL voltage 0 -64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 592 288 R0
SYMATTR InstName R3
SYMATTR Value 178K
SYMBOL cap 800 208 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
FLAG 0 384 0
FLAG 0 288 0
FLAG 0 48 0
FLAG 496 0 0
FLAG 816 304 0
FLAG 608 400 0
FLAG 912 304 0
FLAG 912 192 OUT
FLAG 0 -64 IN
FLAG 416 384 0
TEXT 736 384 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\416b1af02e29_StageA_LowPassSallenKey_AD711.asc
* Generated by LTspice 26.0.1 for Windows.
* This subcircuit is not simulatable. \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD711.asy)
R2 N002 N001 95.3k
XU1 N002 OUT V+ V- OUT AD712 ;pnba In+)In-)V+)V-)OUT
C2 N002 REF 1n
C1 OUT N001 10n
R1 N001 IN 26.7k
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4112 860
WIRE 512 -128 240 -128
WIRE 320 64 320 -32
WIRE 320 112 320 64
WIRE 240 128 240 -128
WIRE 288 128 288 112
WIRE 288 128 240 128
WIRE 304 128 288 128
WIRE 432 144 352 144
WIRE 512 144 512 -128
WIRE 512 144 432 144
WIRE -160 160 -176 160
WIRE -128 160 -160 160
WIRE -16 160 -48 160
WIRE 16 160 -16 160
WIRE 144 160 96 160
WIRE 288 160 144 160
WIRE 304 160 288 160
WIRE 512 160 512 144
WIRE 576 160 512 160
WIRE 608 160 576 160
WIRE 288 176 288 160
WIRE 144 192 144 160
WIRE 320 224 320 176
WIRE 144 272 144 256
WIRE 320 336 320 224
WIRE -16 400 -16 160
WIRE 176 400 -16 400
WIRE 512 400 512 160
WIRE 512 400 240 400
SYMBOL cap 240 384 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res -32 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 26.7k
SYMBOL cap 128 192 R0
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 95.3k
SYMBOL Opamps\\AD711 320 80 R0
SYMATTR InstName U1
FLAG 320 -32 V+
FLAG 320 336 V-
FLAG 576 160 OUT
FLAG -160 160 IN
FLAG 144 272 REF
TEXT -176 504 Left 4 ;This subcircuit is not simulatable.  \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.