Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1583978718c8_transmission_Gate.asc
* Generated by LTspice 26.0.1 for Windows.
M6 Vout N002 0 N003 NMOS
M5 N001 B N002 N001 PMOS
M4 N001 A N002 N001 PMOS
M1 N002 A N004 0 NMOS
V2 B 0 PULSE(0 5 0 5n 5n 20m 40m)
V3 N001 0 5
M2 N004 B 0 0 NMOS
M3 N001 N002 Vout N001 PMOS
V1 A 0 PULSE(0 5 0 5n 5n 40m 80m)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 80m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 48 -2848 -176 -2848
WIRE 112 -2848 48 -2848
WIRE -176 -2832 -176 -2848
WIRE -48 -2832 -176 -2832
WIRE -176 -2816 -176 -2832
WIRE -176 -2816 -272 -2816
WIRE -80 -2816 -176 -2816
WIRE -176 -2768 -176 -2816
WIRE -176 -2768 -272 -2768
WIRE -48 -2768 -48 -2832
WIRE -48 -2768 -80 -2768
WIRE 112 -2752 112 -2848
WIRE 224 -2752 112 -2752
WIRE -128 -2736 -224 -2736
WIRE -192 -2720 -272 -2720
WIRE -80 -2720 -192 -2720
WIRE 112 -2720 112 -2752
WIRE -224 -2704 -224 -2736
WIRE -224 -2704 -288 -2704
WIRE 224 -2672 224 -2752
WIRE 224 -2672 112 -2672
WIRE -192 -2640 -192 -2720
WIRE 64 -2640 -192 -2640
WIRE 160 -2624 112 -2624
WIRE -192 -2608 -192 -2640
WIRE -192 -2608 -208 -2608
WIRE -320 -2576 -320 -2736
WIRE -320 -2576 -368 -2576
WIRE 208 -2576 112 -2576
WIRE -112 -2560 -208 -2560
WIRE 64 -2544 64 -2640
WIRE 208 -2544 208 -2576
WIRE 208 -2544 112 -2544
WIRE -320 -2528 -320 -2576
WIRE -256 -2528 -320 -2528
WIRE -208 -2496 -208 -2512
WIRE -288 -2464 -288 -2704
WIRE -288 -2464 -368 -2464
WIRE -112 -2448 -112 -2560
WIRE -112 -2448 -208 -2448
WIRE -288 -2416 -288 -2464
WIRE -256 -2416 -288 -2416
WIRE -208 -2384 -208 -2400
WIRE -112 -2384 -112 -2448
WIRE -112 -2384 -208 -2384
WIRE -208 -2368 -208 -2384
IOPIN -528 -2576 In
IOPIN -368 -2464 In
IOPIN -528 -2784 In
IOPIN -368 -2576 In
IOPIN 160 -2624 Out
SYMBOL pmos4 -128 -2816 R0
SYMATTR InstName M5
SYMBOL pmos4 64 -2720 R0
SYMATTR InstName M3
SYMBOL voltage 48 -2864 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL nmos4 -256 -2496 R0
SYMATTR InstName M2
SYMBOL nmos4 -256 -2608 R0
SYMATTR InstName M1
SYMBOL voltage -528 -2592 R0
WINDOW 3 -154 191 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 0 5n 5n 20m 40m)
SYMATTR InstName V2
SYMBOL nmos4 64 -2624 R0
SYMATTR InstName M6
SYMBOL voltage -528 -2800 R0
WINDOW 0 56 16 Right 2
WINDOW 3 -177 -43 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 5n 5n 40m 80m)
SYMBOL pmos4 -320 -2816 R0
SYMATTR InstName M4
FLAG -208 -2368 0
FLAG -528 -2576 B
FLAG -368 -2464 B
FLAG -528 -2784 A
FLAG -368 -2576 A
FLAG -528 -2496 0
FLAG -528 -2704 0
FLAG 48 -2768 0
FLAG 112 -2528 0
FLAG 160 -2624 Vout
TEXT -40 -2504 Left 2 !.tran 80m
* Z:\home\khalils\Downloads\files\data\raw_asc\b9fab507a88d_mosfet-driver.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N002 N004 0 0 2N2222
V1 N003 0 PULSE(0 3.3 0 20n 20n 20u 50u)
R1 N004 N003 200R
V2 N001 0 8
C2 N002 0 1480p
R2 N002 N001 100R
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 8m
* This circuit simulate the driving of the MOSFET\n \nWith this choise of components the slew rate of the signal at the \noutput is of about 1us, which means we are losing 1us of duty-cycle.\n \nR1 is chose in order to limit the current sinked from the microcontroller and \nalso to speed up the bjt commutation.\nIt also saturates the bjt with V2/R2 < Ib*B.\n \nR2 is a pull-up resistor. It soure the gate capacitance during ON-time.\nIt is chosen in order to mantain low current trhought the bjt, but low enought \nto charge C2 (gate capacitance) as fast as possible.
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1816 680
WIRE 336 -224 -144 -224
WIRE -144 -144 -144 -224
WIRE 336 -64 336 -224
WIRE -144 -16 -144 -64
WIRE 336 80 336 16
WIRE 624 80 336 80
WIRE 624 112 624 80
WIRE 336 128 336 80
WIRE 144 176 -32 176
WIRE 272 176 224 176
WIRE -32 240 -32 176
WIRE 624 272 624 176
WIRE -32 448 -32 320
WIRE 336 448 336 224
FLAG -32 448 0
FLAG 336 448 0
FLAG -144 -16 0
FLAG 624 272 0
SYMBOL npn 272 128 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL voltage -32 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 20n 20n 20u 50u)
SYMBOL res 240 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200R
SYMBOL voltage -144 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 8
SYMBOL cap 608 112 R0
SYMATTR InstName C2
SYMATTR Value 1480p
SYMBOL res 352 32 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 100R
TEXT -178 472 Left 2 !.tran 8m
TEXT 904 -368 Left 2 ;This circuit simulate the driving of the MOSFET\n \nWith this choise of components the slew rate of the signal at the \noutput is of about 1us, which means we are losing 1us of duty-cycle.\n \nR1 is chose in order to limit the current sinked from the microcontroller and \nalso to speed up the bjt commutation.\nIt also saturates the bjt with V2/R2 < Ib*B.\n \nR2 is a pull-up resistor. It soure the gate capacitance during ON-time.\nIt is chosen in order to mantain low current trhought the bjt, but low enought \nto charge C2 (gate capacitance) as fast as possible.
* Z:\home\khalils\Downloads\files\data\raw_asc\0dc4f08a5742_OpAmp.asc
* Generated by LTspice 26.0.1 for Windows.
C3 N007 0 79.58p
R1 ViP Vim 1m
E1 N002 0 ViP Vim 1
R2 N003 N002 100
E3 N006 0 N005 0 1
E2 N004 0 N003 0 1
C1 N003 0 1.592n
Ro Vo N001 20
R4 N007 N006 100
C2 N005 0 198.9p
E4 N001 0 N007 0 10000
R3 N005 N004 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1708 680
WIRE 1488 -32 1456 -32
WIRE 1616 -32 1568 -32
WIRE -80 0 -208 0
WIRE 80 0 -80 0
WIRE 208 0 128 0
WIRE 352 0 288 0
WIRE 480 0 352 0
WIRE 624 0 528 0
WIRE 800 0 704 0
WIRE 976 0 800 0
WIRE 1104 0 1024 0
WIRE 1264 0 1184 0
WIRE 1408 0 1264 0
WIRE -80 32 -80 0
WIRE 128 32 128 0
WIRE 352 32 352 0
WIRE 80 48 80 0
WIRE 528 48 528 0
WIRE 1024 48 1024 0
WIRE 1456 48 1456 -32
WIRE 480 64 480 0
WIRE 800 64 800 0
WIRE 976 64 976 0
WIRE 1264 64 1264 0
WIRE 1408 64 1408 0
WIRE 1264 80 1264 64
WIRE -80 128 -80 112
WIRE -80 128 -208 128
WIRE 80 128 80 96
WIRE 80 128 -80 128
WIRE 128 160 128 112
WIRE 208 160 128 160
WIRE 352 160 352 96
WIRE 352 160 208 160
WIRE 480 160 480 112
WIRE 480 160 352 160
WIRE 528 160 528 128
WIRE 624 160 528 160
WIRE 800 160 800 128
WIRE 800 160 624 160
WIRE 976 160 976 112
WIRE 976 160 800 160
WIRE 1024 160 1024 128
WIRE 1120 160 1024 160
WIRE 1264 160 1264 128
WIRE 1264 160 1120 160
WIRE 1408 160 1408 112
WIRE 1408 160 1264 160
WIRE 208 208 208 160
WIRE 624 208 624 160
WIRE 1120 208 1120 160
WIRE 1456 240 1456 128
IOPIN -208 0 In
IOPIN -208 128 In
IOPIN 1616 -32 Out
SYMBOL cap 1248 64 R0
SYMATTR InstName C3
SYMATTR Value 79.58p
SYMBOL res 720 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL res 1584 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Ro
SYMATTR Value 20
SYMBOL cap 784 64 R0
SYMATTR InstName C2
SYMATTR Value 198.9p
SYMBOL e 1456 32 R0
SYMATTR InstName E4
SYMATTR Value 10000
SYMBOL e 128 16 R0
WINDOW 0 44 40 Left 2
WINDOW 3 40 88 Left 2
SYMATTR InstName E1
SYMATTR Value 1
SYMBOL res -96 16 R0
SYMATTR InstName R1
SYMATTR Value 1m
SYMBOL res 1200 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL e 1024 32 R0
SYMATTR InstName E3
SYMATTR Value 1
SYMBOL cap 336 32 R0
SYMATTR InstName C1
SYMATTR Value 1.592n
SYMBOL res 304 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL e 528 32 R0
SYMATTR InstName E2
SYMATTR Value 1
FLAG -208 0 ViP
FLAG -208 128 Vim
FLAG 208 208 0
FLAG 624 208 0
FLAG 1120 208 0
FLAG 1456 240 0
FLAG 1616 -32 Vo
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1761-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1761-1.2.asy)
XU1 IN 0 IN N001 OUT LT1761-1.2 ;pnba IN)GND)_SHDN)BYP)OUT
C2 OUT N001 .01
V1 IN 0 PWL(0 0 1 10)
Rload OUT 0 500
C1 OUT 0 10
.tran 1
.lib LT1761.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 48 -224 48
WIRE 16 48 -16 48
WIRE 336 48 304 48
WIRE 416 48 336 48
WIRE 512 48 416 48
WIRE -224 64 -224 48
WIRE 336 64 336 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE -16 144 -16 48
WIRE 16 144 -16 144
WIRE 336 144 336 128
WIRE 336 144 304 144
WIRE -224 160 -224 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 160 240 160 208
SYMBOL PowerProducts\\LT1761-1.2 160 96 R0
SYMATTR InstName U1
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL cap 320 64 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
FLAG -224 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 160 240 0
FLAG -224 48 IN
FLAG 512 48 OUT
TEXT 352 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\2cabda8b40df_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
A1 N001 N002 0 0 0 0 v2 0 OTA G=1n Vlow=-10
A2 N002 N001 0 0 0 0 v1 0 OTA G=1n Vlow=-10
A3 v2 v1 0 0 0 0 N002 0 OTA G=1n Vlow=-10
A4 v2 N001 0 0 0 0 v2 0 OTA G=1n Vlow=-10
C1 N002 N001 10p
C2 v2 v1 1p
C4 v2 N001 10p
C3 v1 N001 5p
V1 v1 N001 0 AC 1
.ac dec 100 0.1 10000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -304 -48 -432 -48
WIRE -208 -48 -304 -48
WIRE -144 -48 -208 -48
WIRE -16 -48 -80 -48
WIRE 80 -48 -16 -48
WIRE 160 -48 80 -48
WIRE 240 -48 160 -48
WIRE 304 -48 240 -48
WIRE -208 16 -208 -48
WIRE -128 16 -208 16
WIRE -16 16 -16 -48
WIRE -16 16 -96 16
WIRE -304 48 -304 -48
WIRE -208 48 -208 16
WIRE -128 48 -128 16
WIRE -96 48 -96 16
WIRE -16 48 -16 16
WIRE 80 48 80 -48
WIRE 160 64 160 -48
WIRE 192 64 160 64
WIRE 304 80 304 -48
WIRE 304 80 272 80
WIRE 192 96 160 96
WIRE -432 128 -432 -48
WIRE -192 160 -192 128
WIRE -112 160 -112 128
WIRE -112 160 -192 160
WIRE -32 160 -32 128
WIRE -32 160 -112 160
WIRE -432 240 -432 208
WIRE -304 240 -304 112
WIRE -304 240 -432 240
WIRE -224 240 -224 128
WIRE -224 240 -304 240
WIRE -112 240 -112 224
WIRE -112 240 -224 240
WIRE 0 240 0 128
WIRE 0 240 -112 240
WIRE 80 240 80 112
WIRE 80 240 0 240
WIRE 160 240 160 96
WIRE 160 240 80 240
SYMBOL cap -128 160 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL SpecialFunctions\\ota 48 96 M270
WINDOW 3 31 97 Left 2
SYMATTR InstName A1
SYMATTR Value G=1n Vlow=-10
SYMBOL SpecialFunctions\\ota -48 80 R90
WINDOW 3 2 96 Left 2
SYMATTR InstName A3
SYMATTR Value G=1n Vlow=-10
SYMBOL cap 64 48 R0
SYMATTR InstName C4
SYMATTR Value 10p
SYMBOL voltage -432 112 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMBOL SpecialFunctions\\ota 224 16 R0
WINDOW 3 31 97 Left 2
SYMATTR InstName A4
SYMATTR Value G=1n Vlow=-10
SYMBOL cap -320 48 R0
SYMATTR InstName C3
SYMATTR Value 5p
SYMBOL cap -80 -64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1p
SYMBOL SpecialFunctions\\ota -144 96 M270
WINDOW 3 -5 95 Left 2
SYMATTR InstName A2
SYMATTR Value G=1n Vlow=-10
FLAG 240 -48 v2
FLAG -304 -48 v1
TEXT -58 368 Left 2 !.ac dec 100 0.1 10000
* Z:\home\khalils\Downloads\files\data\raw_asc\296c265b1005_AC-equiv__Q1_Rin.asc
* Generated by LTspice 26.0.1 for Windows.
* Rin
* Rb
Rs vb N002 1k
RQ1re vb P001
IQ1Beta-ib N001 vb
R21 vb 0
Vs N002 0
RE1 P001 0
R11 vb 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 512 -32 512 -64
WIRE 288 96 160 96
WIRE 368 96 288 96
WIRE 512 96 512 48
WIRE 512 96 368 96
WIRE 80 128 80 96
WIRE 288 128 288 96
WIRE 368 128 368 96
WIRE 512 128 512 96
WIRE 512 160 512 128
WIRE 80 240 80 208
WIRE 288 240 288 208
WIRE 288 240 80 240
WIRE 368 240 368 208
WIRE 368 240 288 240
WIRE 288 272 288 240
WIRE 512 336 512 320
IOPIN 512 128 Out
LINE Normal 240 144 240 32 2
LINE Normal 448 144 448 32 2
LINE Normal 272 64 176 64
LINE Normal 480 64 400 64
LINE Normal 480 64 480 64
LINE Normal 272 64 256 48
LINE Normal 256 80 272 64
LINE Normal 480 64 464 48
LINE Normal 464 80 480 64
SYMBOL current 512 -32 R0
SYMATTR InstName Q1Beta-ib
SYMATTR Value ""
SYMBOL res 272 112 R0
WINDOW 0 -34 99 Left 2
SYMATTR InstName R11
SYMATTR Value ""
SYMBOL res 352 112 R0
WINDOW 0 -36 97 Left 2
SYMATTR InstName R21
SYMATTR Value ""
SYMBOL voltage 80 112 R0
WINDOW 0 -12 56 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vs
SYMATTR Value ""
SYMBOL res 176 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rs
SYMATTR Value 1k
SYMBOL res 496 144 R0
WINDOW 0 36 49 Left 2
SYMATTR InstName Q1re
SYMATTR Value ""
SYMBOL res 496 224 R0
SYMATTR InstName RE1
SYMATTR Value ""
FLAG 288 272 0
FLAG 512 336 0
FLAG 512 128 vb
TEXT 184 40 Left 2 ;Rin
TEXT 400 40 Left 2 ;Rb
* Z:\home\khalils\Downloads\files\data\raw_asc\009751c7ab1c_1818.asc
* Generated by LTspice 26.0.1 for Windows.
* 80MHz, 20dB Gain Block
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1818.asy)
XU1 IN N002 N003 +V -V LT1818 ;pnba IN+)IN-)OUT)VCC)VEE
XU2 N003 N001 OUT +V -V LT1818 ;pnba IN+)IN-)OUT)VCC)VEE
R3 OUT N001 432
V2 -V 0 -5
R2 N002 0 200
R1 N003 N002 432
V3 IN 0 AC 1
V1 +V 0 5
R4 N001 0 200
.ac oct 10 100K 500Meg
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 240 32 224 32
WIRE 336 32 320 32
WIRE 352 32 336 32
WIRE 464 32 432 32
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -160 160 -160 144
WIRE -64 160 -64 144
WIRE 400 192 400 176
WIRE 192 208 192 192
WIRE 336 208 336 32
WIRE 368 208 336 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 464 224 464 32
WIRE 464 224 432 224
WIRE 496 224 464 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 368 240 256 240
WIRE -160 256 -160 240
WIRE -64 256 -64 240
WIRE 160 256 32 256
WIRE 32 272 32 256
WIRE 400 272 400 256
WIRE 192 288 192 272
WIRE 32 368 32 352
SYMBOL voltage 32 256 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL opamps\\LT1818 400 224 R0
SYMATTR InstName U2
SYMBOL voltage -64 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 432
SYMBOL res 448 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 432
SYMBOL opamps\\LT1818 192 240 R0
SYMATTR InstName U1
SYMBOL voltage -160 144 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL res 336 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 200
FLAG -64 256 0
FLAG 192 192 +V
FLAG -64 144 +V
FLAG 192 288 -V
FLAG -160 256 0
FLAG -160 144 -V
FLAG 16 96 0
FLAG 32 368 0
FLAG 400 176 +V
FLAG 400 272 -V
FLAG 224 32 0
FLAG 496 224 OUT
FLAG 32 256 IN
TEXT 232 344 Left 2 !.ac oct 10 100K 500Meg
TEXT 264 -32 Bottom 2 ;80MHz, 20dB Gain Block
* Z:\home\khalils\Downloads\files\data\raw_asc\2bb41214fdd3_bjtchar_03_02_03_incvbb.asc
* Generated by LTspice 26.0.1 for Windows.
ve N007 N008 0
R1 N005 N004 1Meg
vb N005 N006 0
R2 N001 N002 1k
R3 N008 0 220
V1 N001 0 12
vc N002 N003 0
Q1 N003 N006 N007 0 BC238
V2 N004 0 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V2 0 5 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 576 -144 240 -144
WIRE 240 -112 240 -144
WIRE 240 0 240 -32
WIRE 240 112 240 80
WIRE 576 112 576 -144
WIRE -96 160 -192 160
WIRE 48 160 -16 160
WIRE 176 160 128 160
WIRE -192 256 -192 160
WIRE 240 272 240 208
WIRE 240 400 240 352
WIRE -192 528 -192 336
WIRE 240 528 240 480
WIRE 576 528 576 192
SYMBOL voltage 32 160 M90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName vb
SYMATTR Value 0
SYMBOL voltage 240 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName ve
SYMATTR Value 0
SYMBOL res 224 -128 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -192 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage 240 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName vc
SYMATTR Value 0
SYMBOL res 0 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1meg
SYMBOL res 224 384 R0
SYMATTR InstName R3
SYMATTR Value 220
SYMBOL npn 176 112 R0
SYMATTR InstName Q1
SYMATTR Value BC238
SYMBOL voltage 576 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
FLAG 576 528 0
FLAG 240 528 0
FLAG -192 528 0
TEXT -226 552 Left 2 !.dc V2 0 5 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\58316210966f_Circuito_2.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N003 N004 Vcc Vss N001 LM324 ;pnba In+)In-)V+)V-)OUT
R1 N001 N003 100
R2 N001 N004 10k
R3 N003 N002 1k
R4 0 N004 100k
RL 0 N003 3858
V1 Vcc 0 10
V2 0 Vss 10
Vin N002 0 SINE(0 2 1k)
.include LM324.txt
.tran 0 10000 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 0 -16 0
WIRE 272 0 128 0
WIRE -16 96 -16 0
WIRE 272 96 272 0
WIRE 128 112 128 0
WIRE -144 256 -288 256
WIRE -16 256 -16 176
WIRE -16 256 -64 256
WIRE 112 256 112 176
WIRE 112 256 -16 256
WIRE 144 256 144 176
WIRE 272 256 272 176
WIRE 272 256 144 256
WIRE -288 288 -288 256
WIRE 272 288 272 256
WIRE -16 304 -16 256
WIRE -288 416 -288 368
WIRE -16 416 -16 384
WIRE 272 416 272 368
FLAG -16 416 0
FLAG 272 416 0
FLAG 32 640 0
FLAG 272 640 0
FLAG 32 560 Vcc
FLAG 272 560 Vss
FLAG -288 416 0
FLAG 160 144 Vcc
FLAG 96 144 Vss
DATAFLAG 64 304 "-I(Rl)"
DATAFLAG 128 0 ""
DATAFLAG -16 48 "I(R1)"
DATAFLAG -224 240 "I(R3)"
DATAFLAG 368 32 "I(R2)"
DATAFLAG 368 384 "I(R4)"
DATAFLAG 128 0 ""
DATAFLAG 128 0 ""
DATAFLAG 128 0 ""
SYMBOL OpAmps\\opamp2 192 144 M270
SYMATTR InstName U1
SYMATTR Value LM324
SYMBOL res -32 80 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 256 80 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res -48 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 288 384 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL res 0 400 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName RL
SYMATTR Value 3858
SYMBOL voltage 32 544 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL voltage 272 656 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 10
SYMBOL voltage -288 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value SINE(0 2 1k)
TEXT -376 -88 Left 2 !.include LM324.txt
TEXT -376 664 Left 2 !.tran 0 10000 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6203.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6203.asy)
R1 OUT N001 1K
V2 -V 0 -5
V1 +V 0 5
XU1 IN N001 OUT +V -V LT6202 ;pnba IN+)IN-)OUT)VCC)VEE
R2 N001 0 1K
V3 IN 0 SINE(0 1 1Meg)
.tran 10u
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -208 144 -208 128
WIRE -80 144 -80 128
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE -208 240 -208 224
WIRE -80 240 -80 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 304 240 256 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL voltage -208 128 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -80 128 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL opamps\\LT6203 192 240 R0
SYMATTR InstName U1
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1Meg)
FLAG -80 240 0
FLAG 192 192 +V
FLAG -80 128 +V
FLAG 192 288 -V
FLAG -208 240 0
FLAG -208 128 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 304 240 OUT
FLAG 0 256 IN
TEXT 280 344 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6376.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V3 0 -V 15
Rload N002 0 500
Rsense N001 N002 1
V2 N001 0 PWL(0 0 10m 220 30m -140)
XU1 N001 MP_01 0 0 0 0 NC_02 OUT +V 0 0 0 MP_03 N002 -V LT6376 ;pnba +IN))+REFA)+REFB)+REFC)REF)_SHDN)OUT)V+)-REFC)-REFB)-REFA))-IN)V-
.tran 30m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6376.asy)
.lib LT6376.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4832 1408
WIRE 672 496 672 480
WIRE 816 496 816 480
WIRE 976 576 976 560
WIRE 1056 576 1056 560
WIRE 1136 576 1136 560
WIRE 1328 576 1328 544
WIRE 672 592 672 576
WIRE 816 592 816 576
WIRE 496 656 448 656
WIRE 752 656 576 656
WIRE 864 656 752 656
WIRE 752 672 752 656
WIRE 944 688 912 688
WIRE 1456 704 1424 704
WIRE 912 720 864 656
WIRE 944 720 912 720
WIRE 752 768 752 752
WIRE 864 768 912 688
WIRE 864 768 752 768
WIRE 1440 768 1424 768
WIRE 752 784 752 768
WIRE 976 848 976 832
WIRE 1056 848 1056 832
WIRE 1136 848 1136 832
WIRE 1328 864 1328 832
WIRE 752 880 752 864
FLAG 672 592 0
FLAG 816 592 0
FLAG 1328 544 +V
FLAG 1328 864 -V
FLAG 672 480 +V
FLAG 816 480 -V
FLAG 1456 704 OUT
FLAG 976 560 0
FLAG 1136 848 0
FLAG 1136 560 0
FLAG 976 848 0
FLAG 1440 768 0
FLAG 1056 848 0
FLAG 1056 560 0
FLAG 752 880 0
FLAG 448 656 0
SYMBOL voltage 672 480 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 816 592 M180
WINDOW 0 43 70 Left 2
WINDOW 3 39 33 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL res 736 768 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL res 736 656 R0
SYMATTR InstName Rsense
SYMATTR Value 1
SYMBOL voltage 592 656 R90
WINDOW 123 68 56 VTop 2
WINDOW 39 50 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 10m 220 30m -140)
SYMBOL LT6376 1200 704 R0
SYMATTR InstName U1
TEXT 1408 920 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\31bc697b7e9f_Mod_Generator.asc
* Generated by LTspice 26.0.1 for Windows.
V1 low_freq 0 PULSE(0.7 1.3 0 50u 50u 0 100u)
V2 high_freq 0 SINE(0 1 1Meg 0 0 90)
B1 mod 0 V=V(low_freq)*V(high_freq)
R2 N001 0 10k
C2 N001 0 2n
D2 mod N001 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.5e-3
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1668 680
WIRE 1168 -16 1088 -16
WIRE 1296 -16 1168 -16
WIRE 1168 16 1168 -16
WIRE 1296 16 1296 -16
WIRE -208 112 -208 16
WIRE 256 128 256 32
WIRE 640 144 640 32
WIRE 1168 160 1168 80
WIRE 1248 160 1168 160
WIRE 1296 160 1296 96
WIRE 1296 160 1248 160
WIRE 1248 208 1248 160
WIRE -208 288 -208 192
WIRE 256 304 256 208
WIRE 640 304 640 224
SYMBOL cap 1152 16 R0
SYMATTR InstName C2
SYMATTR Value 2n
SYMBOL bv 640 128 R0
SYMATTR InstName B1
SYMATTR Value V=V(low_freq)*V(high_freq)
SYMBOL voltage -208 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0.7 1.3 0 50u 50u 0 100u)
SYMBOL voltage 256 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 1 1Meg 0 0 90)
SYMBOL diode 1024 0 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL res 1280 0 R0
SYMATTR InstName R2
SYMATTR Value 10k
FLAG -208 288 0
FLAG 256 304 0
FLAG -208 16 low_freq
FLAG 256 32 high_freq
FLAG 640 304 0
FLAG 640 32 mod
FLAG 1024 -16 mod
FLAG 1248 208 0
TEXT -240 312 Left 2 !.tran 0.5e-3