Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2912-2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N007 0 PWL(0 0 3.3 0 13 0 13.001 3.3 20 3.3 20.001 0)
V2 N001 0 PWL(0 0 5 5 6 5 7 6 8 6 10 4 11 4 12 5 13 5 14 6 15 6 17 4 18 4 19 5 20 5 25 0)
R1 N003 N005 1K
R2 N001 N003 44.2K
R3 N005 0 4.53K
R4 N002 N004 10K
R5 N002 N006 10K
C1 N008 0 .01
V3 N002 0 PWL(0 0 3.3 3.3 20 3.3 23.3 0)
XU1 N007 N004 N006 0 N008 N005 N003 N002 LTC2912-2 ;pnba DIS)_UV)_OV)GND)TMR)VL)VH)Vcc
.tran 25
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2912-2.asy)
.lib LTC2912-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1212 680
WIRE 16 -16 -64 -16
WIRE 368 -16 224 -16
WIRE 448 -16 368 -16
WIRE 576 -16 448 -16
WIRE 16 0 16 -16
WIRE 368 0 368 -16
WIRE 576 0 576 -16
WIRE 224 48 224 -16
WIRE 16 96 16 80
WIRE 112 96 16 96
WIRE 368 96 368 80
WIRE 368 96 336 96
WIRE 576 96 576 80
WIRE 16 112 16 96
WIRE 448 112 448 -16
WIRE 16 208 16 192
WIRE 112 208 16 208
WIRE 448 208 448 192
WIRE 448 208 336 208
WIRE 16 224 16 208
WIRE 400 304 336 304
WIRE 16 320 16 304
WIRE 400 320 400 304
WIRE 272 384 272 368
WIRE 176 400 176 368
WIRE 400 416 400 400
WIRE -64 432 -64 -16
WIRE 272 464 272 448
WIRE -64 544 -64 512
FLAG 16 320 0
FLAG 176 400 0
FLAG 400 416 0
FLAG -64 544 0
FLAG 272 464 0
FLAG 576 96 0
SYMBOL voltage 400 304 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 3.3 0 13 0 13.001 3.3 20 3.3 20.001 0)
SYMBOL voltage -64 416 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR Value PWL(0 0 5 5 6 5 7 6 8 6 10 4 11 4 12 5 13 5 14 6 15 6 17 4 18 4 19 5 20 5 25 0)
SYMATTR InstName V2
SYMBOL res 0 96 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 0 -16 R0
SYMATTR InstName R2
SYMATTR Value 44.2K
SYMBOL res 0 208 R0
SYMATTR InstName R3
SYMATTR Value 4.53K
SYMBOL res 352 -16 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 432 96 R0
SYMATTR InstName R5
SYMATTR Value 10K
SYMBOL cap 256 384 R0
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL voltage 576 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 0 3.3 3.3 20 3.3 23.3 0)
SYMBOL LTC2912-2 224 208 R0
SYMATTR InstName U1
TEXT 736 472 Left 2 !.tran 25
* Z:\home\khalils\Downloads\files\data\raw_asc\1be0ea3e24c3_CrossDist.asc
* Generated by LTspice 26.0.1 for Windows.
* Negative feedback eliminates crossover distortion.\nSchuler, 7th edition, Chapters 8 and 9.\nProbe V1, the OP-AMP output, and R1.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1678.asy)
V2 Vplus 0 12
V1 N003 0 SINE(0 1.5 1000)
Q2 Vmin N002 N001 0 2N3906
R1 N001 0 1k
V3 0 Vmin 12
Q1 Vplus N002 N001 0 2N3904
XU1 N003 N001 N002 Vplus Vmin LT1678 ;pnba IN+)IN-)OUT)VCC)VEE
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran .004
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 400 0 48 0
WIRE 288 96 288 80
WIRE 224 144 208 144
WIRE 112 176 112 160
WIRE 48 192 48 0
WIRE 80 192 48 192
WIRE 208 208 208 144
WIRE 208 208 144 208
WIRE 288 208 288 192
WIRE 400 208 400 0
WIRE 400 208 288 208
WIRE 80 224 -16 224
WIRE 288 224 288 208
WIRE 400 224 400 208
WIRE -16 240 -16 224
WIRE 208 272 208 208
WIRE 224 272 208 272
WIRE 112 288 112 240
WIRE 400 320 400 304
WIRE -16 352 -16 320
WIRE 80 352 80 336
WIRE 176 352 176 336
WIRE 288 368 288 320
WIRE 80 448 80 432
WIRE 176 448 176 432
SYMBOL pnp 224 320 M180
WINDOW 0 31 44 Left 0
WINDOW 3 60 68 Left 0
SYMATTR InstName Q2
SYMATTR Value 2N3906
SYMBOL Opamps\\LT1678 112 208 R0
WINDOW 3 7 38 Left 0
SYMATTR InstName U1
SYMBOL npn 224 96 R0
WINDOW 0 22 50 Left 0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage -16 224 R0
WINDOW 3 -125 -19 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1.5 1000)
SYMBOL voltage 176 448 R180
WINDOW 0 -64 55 Left 0
WINDOW 3 -63 25 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 12
SYMBOL voltage 80 336 R0
WINDOW 0 -63 60 Left 0
WINDOW 3 -62 88 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL res 384 208 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG -16 352 0
FLAG 400 320 0
FLAG 112 160 Vplus
FLAG 288 80 Vplus
FLAG 112 288 Vmin
FLAG 288 368 Vmin
FLAG 80 448 0
FLAG 176 448 0
FLAG 80 336 Vplus
FLAG 176 336 Vmin
TEXT 328 384 Left 0 !.tran .004
TEXT -144 488 Left 0 ;Negative feedback eliminates crossover distortion.\nSchuler, 7th edition, Chapters 8 and 9.\nProbe V1, the OP-AMP output, and R1.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1011.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1011.asy)
V2 -V 0 -15
V4 N004 0 PULSE(0 2.7 0 1u 1u 5m 10m)
V1 +V 0 15
Q1 N003 N004 N005 0 2N3904
XU1 0 0 N001 -V NC_01 N003 N002 +V LT1011 ;pnba GND)In+)In-)V-)BAL)STROBE)OUT)V+
R1 +V N002 2K
R2 N005 0 3K
V3 N001 0 PULSE(-100m 100m 0 .5m .5m 0 1m)
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 30m
.lib LT1011.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -384 96 -384 80
WIRE -288 96 -288 80
WIRE -96 128 -96 112
WIRE 0 128 -96 128
WIRE 0 144 0 128
WIRE -384 192 -384 176
WIRE -288 192 -288 176
WIRE -96 192 -96 128
WIRE -128 224 -656 224
WIRE -656 240 -656 224
WIRE 0 240 0 224
WIRE 0 240 -48 240
WIRE -128 256 -144 256
WIRE -112 304 -112 288
WIRE -112 304 -144 304
WIRE -144 320 -144 304
WIRE -656 336 -656 320
WIRE -80 336 -80 288
WIRE -144 384 -496 384
WIRE -496 400 -496 384
WIRE -80 448 -80 432
WIRE -496 496 -496 480
WIRE -80 544 -80 528
SYMBOL voltage -656 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(-100m 100m 0 .5m .5m 0 1m)
SYMBOL npn -144 336 R0
WINDOW 0 58 22 Left 2
WINDOW 3 54 66 Left 2
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res -96 432 R0
SYMATTR InstName R2
SYMATTR Value 3K
SYMBOL LT1011 -96 240 R0
SYMATTR InstName U1
SYMBOL voltage -288 80 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res -16 128 R0
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL voltage -384 80 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -496 384 R0
SYMATTR InstName V4
SYMATTR Value PULSE(0 2.7 0 1u 1u 5m 10m)
FLAG -288 192 0
FLAG -384 192 0
FLAG -384 80 +V
FLAG -96 288 -V
FLAG -288 80 -V
FLAG -96 112 +V
FLAG -656 336 0
FLAG -144 256 0
FLAG -80 544 0
FLAG -496 496 0
FLAG -144 320 0
TEXT 48 488 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\070f2c501526_electronics_lc_tank_2.asc
* Generated by LTspice 26.0.1 for Windows.
L1 V1 V2 0.0001
V1 V1 0 PULSE(0 3.3 0 1n 1n 0.1m 0.1m 1)
C1 V2 0 0.0001
.tran 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 48 80 0
WIRE 80 48 32 48
WIRE 128 48 80 48
WIRE 256 48 256 0
WIRE 256 48 208 48
WIRE 288 48 256 48
WIRE 32 112 32 48
WIRE 288 112 288 48
WIRE 32 240 32 192
WIRE 160 240 32 240
WIRE 288 240 288 176
WIRE 288 240 160 240
WIRE 160 272 160 240
SYMBOL cap 272 112 R0
SYMATTR InstName C1
SYMATTR Value 0.0001
SYMBOL voltage 32 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 1n 1n 0.1m 0.1m 1)
SYMBOL ind 112 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 0.0001
FLAG 80 0 V1
FLAG 256 0 V2
FLAG 160 272 0
TEXT 0 296 Left 2 !.tran 0.2
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7105.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7105.asy)
C1 OUT 0 2.2 Rser=3m
R2 N003 0 10K
R3 OUT N001 100k
R1 OUT N003 17.4k
C2 N002 0 2.7n
Rload OUT 0 11
V1 IN 0 4.3
XU1 IN N003 IN N002 OUT 0 N001 ADP7105 Vref=1.22 ;pnba Vin)ADJ)EN)SS)Vout)GND)PG
.tran 6m startup
.lib ADP7105.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 400 32 352 32
WIRE 528 32 480 32
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE 400 128 352 128
WIRE 528 128 528 32
WIRE 528 128 400 128
WIRE 608 128 528 128
WIRE 624 128 608 128
WIRE -32 144 -32 128
WIRE 528 144 528 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 400 224 400 208
WIRE 400 224 352 224
WIRE 528 224 528 208
WIRE 624 224 624 208
WIRE 400 240 400 224
WIRE 224 304 224 288
WIRE 400 336 400 320
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 2.7n
SYMBOL res 384 224 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 496 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL cap 512 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=3m
SYMBOL res 384 112 R0
SYMATTR InstName R1
SYMATTR Value 17.4k
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.3
SYMBOL res 608 112 R0
SYMATTR InstName Rload
SYMATTR Value 11
SYMBOL ADP7105 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG -32 32 IN
FLAG 624 224 0
FLAG 528 224 0
FLAG 608 128 OUT
FLAG 400 336 0
TEXT 512 304 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4891-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4891-2.asy)
XU1 IN N001 +V -V OUT ADA4891-1 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -2.5
R2 OUT N001 10K
R1 N001 0 10K
Rload OUT 0 10K
Vin IN 0 SINE(0 1 10K)
V1 +V 0 2.5
.tran 1m
.lib ADA4891-1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1136 144 -1152
WIRE 256 -1136 256 -1152
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1040 144 -1056
WIRE 256 -1040 256 -1056
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 144 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL ADA4891-2 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 256 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 144 -1152 +V
FLAG 144 -1040 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1152 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 768 -992 0
FLAG 256 -1040 0
TEXT 752 -936 Left 2 !.tran 1m
* Z:\tmp\asc_dec_bjh7r6w2\13d533ed9689_decoder_amplifaer_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V3 VDD 0 1.5
M2 out N001 Ep Ep PMOS l=260e-9 w=2600e-9 ad=676000e-18 as=676000e-18 pd=3640e-9 ps=3640e-9
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 32 48 32
WIRE 176 32 64 32
WIRE 272 32 176 32
WIRE 288 32 272 32
WIRE 128 48 112 48
WIRE 224 48 192 48
WIRE 48 80 48 32
WIRE 64 80 48 80
WIRE 288 80 288 32
WIRE 288 80 272 80
WIRE 64 144 64 128
WIRE 128 144 192 48
WIRE 128 144 64 144
WIRE 192 144 128 48
WIRE 272 144 272 128
WIRE 272 144 192 144
WIRE 64 176 64 144
WIRE 272 176 272 144
WIRE 80 224 64 224
WIRE 272 224 256 224
WIRE 80 272 80 224
WIRE 80 272 64 272
WIRE 160 272 80 272
WIRE 256 272 256 224
WIRE 256 272 160 272
WIRE 272 272 256 272
WIRE 160 288 160 272
WIRE 320 400 320 256
SYMBOL voltage -656 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 1.5
SYMBOL pmos4 224 128 M180
SYMATTR InstName M2
SYMATTR Value2 l=260e-9 w=2600e-9 ad=676000e-18 as=676000e-18 pd=3640e-9 ps=3640e-9
FLAG 160 288 0
FLAG 176 32 Ep
FLAG 272 176 out
FLAG -656 144 0
FLAG -656 64 dec
FLAG -656 304 0
FLAG -656 224 VDD
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2138-0.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2138-0.8.asy)
C1 OUT 0 10
L1 N001 OUT 1 Rser=60m
Rload OUT 0 2
V1 IN 0 4
XU1 IN IN N001 OUT 0 IN ADP2138-x.x Rtop=48K ;pnba Vin)EN)SW)Vout)GND)Mode
.tran .5m startup
.lib ADP2138-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 192 224 192 144
WIRE 208 224 192 224
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 224
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=60m
SYMBOL ADP2138-0.8 352 224 R0
SYMATTR InstName U1
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 2
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
TEXT 600 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8092.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8092.asy)
R2 OUT N001 1K
V1 +V 0 5
XU1 IN N001 +V -V OUT AD8092 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -5
Vin IN 0 SINE(0 1 10Meg)
Rload OUT 0 2K
R1 N001 0 1K
.tran 1u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 400 -1184 384 -1184
WIRE 496 -1184 480 -1184
WIRE 512 -1184 496 -1184
WIRE 608 -1184 592 -1184
WIRE 160 -1088 160 -1104
WIRE 256 -1088 256 -1104
WIRE 496 -1072 496 -1184
WIRE 512 -1072 496 -1072
WIRE 608 -1056 608 -1184
WIRE 608 -1056 576 -1056
WIRE 720 -1056 608 -1056
WIRE 512 -1040 400 -1040
WIRE 720 -1040 720 -1056
WIRE 400 -1024 400 -1040
WIRE 160 -992 160 -1008
WIRE 256 -992 256 -1008
WIRE 720 -944 720 -960
WIRE 400 -928 400 -944
SYMBOL voltage 400 -1040 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10Meg)
SYMBOL res 608 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 256 -1104 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL Opamps\\AD8092 544 -1120 R0
SYMATTR InstName U1
SYMBOL res 704 -1056 R0
SYMATTR InstName Rload
SYMATTR Value 2K
SYMBOL res 496 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 160 -1104 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 400 -928 0
FLAG 720 -1056 OUT
FLAG 400 -1040 IN
FLAG 544 -1088 +V
FLAG 544 -1024 -V
FLAG 384 -1184 0
FLAG 720 -944 0
FLAG 160 -1104 +V
FLAG 160 -992 0
FLAG 256 -1104 -V
FLAG 256 -992 0
TEXT 752 -848 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\13fd25a6f385_Diode-Rectifier-9.asc
* Generated by LTspice 26.0.1 for Windows.
D3 b out RBR2VWM60A
R1 out 0 100
D1 0 a RBR2VWM60A
D4 0 b RBR2VWM60A
V1 a b SINE(0 50 100) Rser=0.5
D2 a out RBR2VWM60A
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 50m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 -240 -144 -240
WIRE 112 -240 64 -240
WIRE 176 -240 112 -240
WIRE 304 -240 240 -240
WIRE 400 -240 304 -240
WIRE 448 -240 400 -240
WIRE 176 -128 96 -128
WIRE 304 -128 304 -240
WIRE 304 -128 240 -128
WIRE -144 -112 -144 -240
WIRE 448 -112 448 -240
WIRE 112 -32 112 -240
WIRE 176 -32 112 -32
WIRE 304 -32 240 -32
WIRE -144 96 -144 -32
WIRE 64 96 -144 96
WIRE 96 96 96 -128
WIRE 96 96 64 96
WIRE 176 96 96 96
WIRE 304 96 304 -32
WIRE 304 96 240 96
WIRE 448 96 448 -32
WIRE 448 96 304 96
WIRE 448 128 448 96
SYMBOL Misc\\EuropeanResistor 432 -128 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL diode 176 -112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D3
SYMATTR Value RBR2VWM60A
SYMBOL diode 240 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D4
SYMATTR Value RBR2VWM60A
SYMBOL Misc\\signal -144 -128 R0
WINDOW 123 0 0 Left 2
SYMATTR SpiceLine Rser=0.5
SYMATTR InstName V1
SYMATTR Value SINE(0 50 100)
SYMBOL diode 240 -48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value RBR2VWM60A
SYMBOL diode 176 -224 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value RBR2VWM60A
FLAG 448 128 0
FLAG 64 -240 a
FLAG 400 -240 out
FLAG 64 96 b
TEXT -144 128 Left 2 !.tran 50m
* Z:\home\khalils\Downloads\files\data\raw_asc\f5f9989d1b37_RC_filter.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 OUT1 1e3
R2 OUT2 OUT1 1e3
C1 0 OUT1 1e-9
C2 0 OUT2 1e-9
V1 N001 0 AC 1 0
.ac dec 1e3 1000 100000000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 80 -32 80
WIRE 112 80 112 0
WIRE 112 80 96 80
WIRE 224 80 112 80
WIRE 320 80 320 0
WIRE 320 80 304 80
WIRE -32 128 -32 80
WIRE 112 128 112 80
WIRE 320 128 320 80
WIRE -32 224 -32 208
WIRE 112 224 112 192
WIRE 112 224 -32 224
WIRE 320 224 320 192
WIRE 320 224 112 224
WIRE 320 240 320 224
FLAG 320 240 0
FLAG 112 0 OUT1
IOPIN 112 0 Out
FLAG 320 0 OUT2
IOPIN 320 0 Out
SYMBOL res 0 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1e3
SYMBOL res 320 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1e3
SYMBOL cap 128 192 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 1e-9
SYMBOL cap 336 192 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 1e-9
SYMBOL voltage -32 112 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1 0
TEXT -66 264 Left 2 !.ac dec 1e3 1000 100000000
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX4231.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX4231.asy)
XU1 IN OUT Vcc Vee OUT Vcc MAX4231 ;pnba In+)In-)V+)V-)OUT)SHDN
CL OUT 0 15p
RL OUT 0 100k
Vcc Vcc 0 2.5
Vee 0 Vee 2.5
V1 IN 0 SINE(0 50m 10k)
.tran 100u
.lib MAX4231.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 64 288 64 272
WIRE 416 352 416 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 64 448 64 400
WIRE 416 448 416 416
WIRE 448 448 448 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 64 544 64 528
WIRE 304 592 304 576
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 100k
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 10k)
SYMBOL MAX4231 432 400 R0
SYMATTR InstName U1
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
FLAG 720 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
FLAG 448 448 Vcc
TEXT 16 632 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\188fed4475f8_MOS-OUT-3.asc
* Generated by LTspice 26.0.1 for Windows.
Vds N001 0
Vgs N002 0
M1 N001 N002 0 0 IRF7220
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vds 0 -10V Vgs -0.8V -1.1V 0.1V
.meas dc Id_5V find Id(M1) when Vds=5V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1292 680
WIRE -560 -144 -720 -144
WIRE -720 -64 -720 -144
WIRE -560 -16 -560 -144
WIRE -768 16 -912 16
WIRE -912 32 -912 16
WIRE -912 128 -912 112
WIRE -720 128 -720 32
WIRE -560 128 -560 64
FLAG -560 128 0
FLAG -912 128 0
FLAG -720 128 0
SYMBOL voltage -560 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 37 60 Left 2
SYMATTR InstName Vds
SYMATTR Value ""
SYMBOL voltage -912 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 53 Left 2
WINDOW 3 40 69 Left 2
WINDOW 0 36 56 Left 2
SYMATTR Value ""
SYMATTR InstName Vgs
SYMBOL pmos -768 -64 R0
SYMATTR InstName M1
SYMATTR Value IRF7220
TEXT -920 160 Left 2 !.dc Vds 0 -10V  Vgs -0.8V -1.1V 0.1V
TEXT -920 184 Left 2 !.meas dc Id_5V find Id(M1) when Vds=5V
* Z:\home\khalils\Downloads\files\data\raw_asc\01ce586fbc2d_gatedriver.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 SOURCE 10
S1 GATE N001 EN GROUND MYSW1
R1 GATE N002 0.01 tol=1
S2 SOURCE N002 EN GROUND MYSW2
.model MYSW1 SW(Ron=0.0001 Roff=10Meg Vt=1.4 Vh=-.6)
.model MYSW2 SW(Ron=10Meg Roff=0.0001 Vt=1.4 Vh=-.6)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1276 680
WIRE 336 144 192 144
WIRE 192 176 192 144
WIRE 80 192 16 192
WIRE 144 192 80 192
WIRE 336 192 336 144
WIRE 48 240 16 240
WIRE 144 240 48 240
WIRE 192 288 192 256
WIRE 240 288 192 288
WIRE 336 288 336 272
WIRE 368 288 336 288
WIRE 192 304 192 288
WIRE 240 304 240 288
WIRE 336 304 336 288
WIRE 240 400 240 384
WIRE 80 416 80 192
WIRE 192 416 80 416
WIRE 48 464 48 240
WIRE 192 464 48 464
WIRE 240 512 240 480
WIRE 368 512 368 288
WIRE 368 512 240 512
IOPIN 16 192 In
IOPIN 192 304 Out
IOPIN 336 304 Out
IOPIN 16 240 BiDir
SYMBOL sw 192 272 M180
WINDOW 0 12 104 Left 2
WINDOW 3 17 11 Left 2
SYMATTR InstName S1
SYMATTR Value MYSW1
SYMBOL sw 240 496 M180
WINDOW 0 12 104 Left 2
WINDOW 3 17 11 Left 2
SYMATTR InstName S2
SYMATTR Value MYSW2
SYMBOL res 224 288 R0
SYMATTR InstName R1
SYMATTR Value 0.01
SYMATTR SpiceLine tol=1
SYMBOL voltage 336 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName V2
SYMATTR Value 10
FLAG 16 192 EN
FLAG 192 304 GATE
FLAG 336 304 SOURCE
FLAG 16 240 GROUND
TEXT -136 632 Left 2 !.model MYSW1 SW(Ron=0.0001 Roff=10Meg Vt=1.4 Vh=-.6)
TEXT -136 656 Left 2 !.model MYSW2 SW(Ron=10Meg Roff=0.0001 Vt=1.4 Vh=-.6)
* Z:\home\khalils\Downloads\files\data\raw_asc\00c42e0eed4d_Flux.asc
* Generated by LTspice 26.0.1 for Windows.
R2 OUT 0 1
R1 N001 IN 0.01
L1 N001 OUT Hc=22 Bs=.45 Br=.15 A={A1} Lm=0.057 Lg=0.0005 N={N1}
B1 Flux 0 V=sdt(V(n001,OUT))/(N1*A1)
V1 IN 0 SINE(0 20 1k)
.tran 0 10m 8m
.params N1=20 A1=0.000125
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1356 680
WIRE 144 192 144 128
WIRE 144 384 144 272
WIRE 352 128 144 128
WIRE 528 128 432 128
WIRE 768 128 608 128
WIRE 768 192 768 128
WIRE 768 384 768 272
WIRE 976 208 976 160
WIRE 976 336 976 288
WIRE 1008 160 976 160
IOPIN 1008 160 Out
SYMBOL voltage 144 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 20 1k)
SYMBOL bv 976 192 R0
SYMATTR InstName B1
SYMATTR Value V=sdt(V(n001,OUT))/(N1*A1)
SYMBOL ind 512 144 R270
WINDOW 0 59 56 VBottom 0
WINDOW 3 69 46 VTop 0
SYMATTR InstName L1
SYMATTR Value Hc=22 Bs=.45 Br=.15 A={A1} Lm=0.057 Lg=0.0005 N={N1}
SYMBOL res 752 176 R0
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL res 448 112 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 0.01
FLAG 144 384 0
FLAG 768 384 0
FLAG 144 128 IN
FLAG 768 128 OUT
FLAG 976 336 0
FLAG 1008 160 Flux
TEXT -306 216 Left 0 !.tran 0 10m 8m
TEXT -312 272 Left 0 !.params N1=20 A1=0.000125