Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8053.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 24
R1 N003 0 41.2K
Rload OUT 0 3
C1 OUT 0 100 Rser=10m
XU1 N001 IN N001 IN NC_01 N003 N002 OUT 0 0 N004 NC_02 LTM8053 ;pnba BIAS)RUN)AUX)VIN)SHARE)RT)TR/SS)VOUT)GND)SYNC)FB)PG
R2 0 N004 60.4K
C2 N002 0 0.001
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8053.asy)
.lib LTM8053.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 -64 -144 -64
WIRE 192 -64 0 -64
WIRE -144 -48 -144 -64
WIRE 192 -32 192 -64
WIRE 0 0 0 -64
WIRE 32 0 0 0
WIRE 384 0 352 0
WIRE -144 48 -144 32
WIRE 32 64 16 64
WIRE 384 64 384 0
WIRE 384 64 352 64
WIRE -64 128 -96 128
WIRE 32 128 0 128
WIRE 544 128 352 128
WIRE 656 128 544 128
WIRE 544 144 544 128
WIRE 656 144 656 128
WIRE 544 240 544 208
WIRE 656 240 656 224
WIRE -80 256 -96 256
WIRE 32 256 0 256
WIRE 368 256 352 256
WIRE 464 256 448 256
WIRE 192 320 192 304
FLAG -144 48 0
FLAG -96 256 0
FLAG 192 320 0
FLAG 656 240 0
FLAG -144 -64 IN
FLAG 656 128 OUT
FLAG 544 240 0
FLAG 16 64 0
FLAG -96 128 0
FLAG 464 256 0
SYMBOL voltage -144 -64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 16 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 41.2K
SYMBOL res 640 128 R0
SYMATTR InstName Rload
SYMATTR Value 3
SYMBOL cap 528 144 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=10m
SYMBOL LTM8053 192 144 R0
SYMATTR InstName U1
SYMBOL res 464 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 60.4K
SYMBOL cap 0 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 0.001
TEXT 392 352 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\32f049f043ad_Nested.asc
* Generated by LTspice 26.0.1 for Windows.
I1 0 N001 AC 1
C1 N001 0 {C}
R1 N001 0 10K
L1 N001 0 {L}
.step param L 90u 200u .5u
.step param C 40p 60p 10p
.ac list 2Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 320 80 272
WIRE 80 208 80 144
WIRE 80 144 224 144
WIRE 224 144 224 192
WIRE 224 272 224 320
WIRE -32 320 -32 272
WIRE -32 192 -32 144
WIRE -32 144 80 144
WIRE 224 144 336 144
WIRE 336 144 336 192
WIRE 336 272 336 320
SYMBOL res 320 176 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL current -32 272 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName I1
SYMATTR Value AC 1
SYMBOL cap 64 208 R0
SYMATTR InstName C1
SYMATTR Value {C}
SYMBOL ind 208 176 R0
SYMATTR InstName L1
SYMATTR Value {L}
FLAG 224 320 0
FLAG 80 320 0
FLAG -32 320 0
FLAG 336 320 0
TEXT 16 376 Left 0 !.step param L 90u 200u .5u\n.step param C 40p 60p 10p
TEXT 16 448 Left 0 !.ac list 2Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1616.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1616.asy)
R2 0 N004 10K
R3 IN N003 15K
C1 N001 N002 .01
Rload OUT 0 6.6
D1 0 N002 MBRS130L
C3 N003 0 1
V1 IN 0 5
R1 OUT N004 16.5K
L1 N002 OUT 22
D2 OUT N001 BAT54
C2 OUT 0 22
XU1 N001 0 N004 N003 IN N002 LT1616 ;pnba Boost)GND)FB)_SHDN)Vin)SW
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 4.5m startup
.lib LT1616.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2752 1392
WIRE 2016 896 1824 896
WIRE 2080 896 2016 896
WIRE 2224 896 2144 896
WIRE 2016 928 2016 896
WIRE 1824 992 1824 896
WIRE 2016 1024 2016 992
WIRE 2016 1024 1984 1024
WIRE 2080 1024 2016 1024
WIRE 2224 1024 2224 896
WIRE 2224 1024 2160 1024
WIRE 2352 1024 2224 1024
WIRE 2464 1024 2352 1024
WIRE 2352 1040 2352 1024
WIRE 2464 1040 2464 1024
WIRE 1568 1056 1472 1056
WIRE 1680 1056 1568 1056
WIRE 1984 1056 1984 1024
WIRE 1984 1056 1968 1056
WIRE 2224 1056 2224 1024
WIRE 1472 1072 1472 1056
WIRE 1568 1072 1568 1056
WIRE 2016 1072 2016 1024
WIRE 2352 1136 2352 1104
WIRE 2464 1136 2464 1120
WIRE 2016 1152 2016 1136
WIRE 1472 1168 1472 1152
WIRE 1568 1184 1568 1152
WIRE 1680 1184 1568 1184
WIRE 2224 1184 2224 1136
WIRE 2224 1184 1968 1184
WIRE 1568 1200 1568 1184
WIRE 2224 1200 2224 1184
WIRE 1568 1280 1568 1264
WIRE 1824 1280 1824 1248
WIRE 2224 1296 2224 1280
SYMBOL schottky 2000 1136 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS130L
SYMBOL cap 2000 928 R0
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL POWERPRODUCTS\\LT1616 1824 1120 R0
SYMATTR InstName U1
SYMBOL res 2448 1024 R0
SYMATTR InstName Rload
SYMATTR Value 6.6
SYMBOL res 2208 1296 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL VOLTAGE 1472 1056 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL schottky 2144 880 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value BAT54
SYMBOL RES 2208 1040 R0
SYMATTR InstName R1
SYMATTR Value 16.5K
SYMBOL cap 1552 1200 R0
WINDOW 3 26 55 Left 2
SYMATTR Value 1
SYMATTR InstName C3
SYMBOL RES 1552 1056 R0
SYMATTR InstName R3
SYMATTR Value 15K
SYMBOL ind 2064 1040 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 22
SYMBOL cap 2336 1040 R0
SYMATTR InstName C2
SYMATTR Value 22
FLAG 1824 1280 0
FLAG 2224 1296 0
FLAG 2016 1152 0
FLAG 2352 1136 0
FLAG 1472 1168 0
FLAG 2464 1136 0
FLAG 2464 1024 OUT
FLAG 1568 1280 0
FLAG 1472 1056 IN
TEXT 1904 1344 Left 2 !.tran 4.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\19ac29740603_OP_AMP_impedance_matching.asc
* Generated by LTspice 26.0.1 for Windows.
* Measurement
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4805.asy)
R2 N002 N001 1000
R7 +2.25 0 1k
R5 NC_01 N003 50
R4 N004 +2.25 5k
R1 N001 vin 50
R6 +4.5 +2.25 1k
XU2 N004 N003 +4.5 0 N003 +4.5 ADA4805 ;pnba 100)101)102)103)104)106
V1 +4.5 0 4.5
V2 vin 0 SINE(2.25 10u 10.7Meg) Rser=50
XU1 +2.25 N001 +4.5 0 N002 +4.5 ADA4805 ;pnba 100)101)102)103)104)106
R3 vout N002 5k
.meas vout_max max V(vout)
.meas vout_min min V(vout)
.meas vout_vpp param vout_max-vout_min
.meas vin_max max V(vin)
.meas vin_min min V(vin)
.meas vin_vpp param vin_max-vin_min
.meas amp_gain PARAM -vout_vpp/vin_vpp
.tran 50u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 -48 48 -48
WIRE 160 -48 144 -48
WIRE 624 -32 512 -32
WIRE 512 64 512 -32
WIRE 528 64 512 64
WIRE 48 80 48 -48
WIRE 48 80 32 80
WIRE 64 80 48 80
WIRE 624 80 624 -32
WIRE 624 80 592 80
WIRE 160 96 160 -48
WIRE 160 96 128 96
WIRE 464 96 432 96
WIRE 528 96 464 96
WIRE 64 112 48 112
WIRE 576 128 576 112
WIRE 48 144 48 112
WIRE 112 144 112 128
WIRE 544 144 544 112
WIRE 80 160 80 128
WIRE -64 256 -160 256
WIRE -160 288 -160 256
WIRE -32 336 -64 336
WIRE -160 416 -160 368
WIRE -64 416 -160 416
WIRE -160 432 -160 416
SYMBOL res -80 320 R0
SYMATTR InstName R7
SYMATTR Value 1k
SYMBOL res 448 80 R0
SYMATTR InstName R4
SYMATTR Value 5k
SYMBOL res 48 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL OpAmps\\ADA4805 560 80 R0
WINDOW 3 61 66 Left 2
SYMATTR InstName U2
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5k
SYMBOL res 720 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 50
SYMBOL res -80 240 R0
SYMATTR InstName R6
SYMATTR Value 1k
SYMBOL voltage -160 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.5
SYMBOL OpAmps\\ADA4805 96 96 R0
WINDOW 3 61 66 Left 2
SYMATTR InstName U1
SYMBOL res 160 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1000
SYMBOL voltage -272 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 -147 43 Left 2
WINDOW 3 -325 69 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V2
SYMATTR Value SINE(2.25 10u 10.7Meg)
FLAG 80 64 +4.5
FLAG 80 160 0
FLAG 112 144 +4.5
FLAG -160 432 0
FLAG -160 256 +4.5
FLAG 544 48 +4.5
FLAG 544 144 0
FLAG 576 128 +4.5
FLAG -272 368 0
FLAG -272 288 vin
FLAG -32 336 +2.25
FLAG 48 144 +2.25
FLAG 464 176 +2.25
FLAG -48 80 vin
FLAG 240 96 vout
TEXT -704 -144 Left 4 ;Measurement
TEXT -704 -104 Left 2 !.meas vout_max max V(vout)\n.meas vout_min min V(vout)\n.meas vout_vpp param vout_max-vout_min\n.meas vin_max max V(vin)\n.meas vin_min min V(vin)\n.meas vin_vpp param vin_max-vin_min\n.meas amp_gain PARAM -vout_vpp/vin_vpp
TEXT -706 456 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8625SP.asc
* Generated by LTspice 26.0.1 for Windows.
* 2MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8625SP.asy)
Rload OUT 0 0.4
XU1 SW N004 0 CLKout IN NC_01 IN IN N004 N004 SET N003 OUT PGFB N001 PG LT8625SP ;pnba SW)Sync/Mode)GND)CLKout)PVin)BST)SVin)EN/UVLO)INTVcc)PHMode)SET)Vc)OUTS)PGFB)RT)PG
C3 N002 0 2n
L1 SW OUT 1 Rser=6m
C2 OUT 0 470 Rser=5m
R1 N001 0 47k
R4 N002 N003 499
V1 IN 0 12
R6 OUT PG 100k
R2 PGFB 0 49.9k
C1 SET 0 1
R3 OUT PGFB 280k
R5 SET 0 33.2k
.tran 1.5m startup
.lib LT8625SP.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1080 680
WIRE 96 -128 -64 -128
WIRE 272 -128 96 -128
WIRE -64 -112 -64 -128
WIRE 272 -112 272 -128
WIRE 96 -64 96 -128
WIRE 128 -64 96 -64
WIRE -64 -16 -64 -32
WIRE 96 32 96 -64
WIRE 128 32 96 32
WIRE 448 32 416 32
WIRE 512 32 448 32
WIRE 688 32 592 32
WIRE -32 128 -64 128
WIRE 128 128 48 128
WIRE 448 128 416 128
WIRE 512 128 448 128
WIRE 688 128 688 32
WIRE 688 128 592 128
WIRE 768 128 688 128
WIRE 880 128 768 128
WIRE 976 128 880 128
WIRE 976 144 976 128
WIRE 880 160 880 128
WIRE 768 176 768 128
WIRE -80 224 -96 224
WIRE 16 224 -16 224
WIRE 128 224 96 224
WIRE 688 224 688 128
WIRE 688 224 416 224
WIRE 880 240 880 224
WIRE 976 240 976 224
WIRE 128 320 96 320
WIRE 464 320 416 320
WIRE 768 320 768 256
WIRE 768 320 464 320
WIRE 768 336 768 320
WIRE 96 416 96 320
WIRE 128 416 96 416
WIRE 448 416 416 416
WIRE 592 416 448 416
WIRE 672 416 592 416
WIRE 672 432 672 416
WIRE 768 432 768 416
WIRE 592 448 592 416
WIRE 96 512 96 416
WIRE 128 512 96 512
WIRE 448 512 416 512
WIRE 592 528 592 512
WIRE 672 528 672 512
WIRE 272 592 272 576
SYMBOL res 960 128 R0
SYMATTR InstName Rload
SYMATTR Value 0.4
SYMBOL res 656 416 R0
SYMATTR InstName R5
SYMATTR Value 33.2k
SYMBOL cap 864 160 R0
SYMATTR InstName C2
SYMATTR Value 470
SYMATTR SpiceLine Rser=5m
SYMBOL LT8625SP 272 192 R0
SYMATTR InstName U1
SYMBOL res 0 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 499
SYMBOL ind 496 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=6m
SYMBOL cap 576 448 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 752 160 R0
SYMATTR InstName R3
SYMATTR Value 280k
SYMBOL voltage -64 -128 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap -16 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 2n
SYMBOL res 752 320 R0
SYMATTR InstName R2
SYMATTR Value 49.9k
SYMBOL res 608 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 100k
SYMBOL res 64 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 47k
FLAG -64 -16 0
FLAG -64 128 0
FLAG 272 592 0
FLAG 768 432 0
FLAG 976 240 0
FLAG -96 224 0
FLAG 976 128 OUT
FLAG -64 -128 IN
FLAG 672 528 0
FLAG 592 528 0
FLAG 880 240 0
FLAG 448 512 CLKout
FLAG 448 32 PG
FLAG 448 128 SW
FLAG 464 320 PGFB
FLAG 448 416 SET
TEXT 728 552 Left 2 !.tran 1.5m startup
TEXT 48 104 Left 2 ;2MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1728-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1728-3.3.asy)
V4 N003 0 PWL(0 3.3 1 3.3 2 3 3 3.3)
R1 N002 N001 10K
V2 N004 0 PWL(0 1.05 7 1.05 8 .95 9 1.05)
V1 N001 0 5
XU1 N002 0 N004 N005 N003 LTC1728-3.3 ;pnba _RST)GND)VccA)Vcc1.8)Vcc3
V3 N005 0 PWL(0 1.8 4 1.8 5 1.5 6 1.8)
.tran 10
.lib LTC1728-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1100 756
WIRE -160 144 -224 144
WIRE 48 144 -80 144
WIRE 464 144 272 144
WIRE 464 160 464 144
WIRE -224 176 -224 144
WIRE 48 208 16 208
WIRE 464 256 464 240
WIRE 48 272 -64 272
WIRE 384 272 272 272
WIRE -224 288 -224 256
WIRE 384 288 384 272
WIRE -64 304 -64 272
WIRE 384 384 384 368
WIRE -64 416 -64 384
SYMBOL voltage 464 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value PWL(0 3.3 1 3.3 2 3 3 3.3)
SYMBOL voltage -64 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 1.05 7 1.05 8 .95 9 1.05)
SYMBOL LTC1728-3.3 160 240 R0
SYMATTR InstName U1
SYMBOL voltage 384 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 1.8 4 1.8 5 1.5 6 1.8)
SYMBOL res -64 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -224 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 16 208 0
FLAG -224 288 0
FLAG -64 416 0
FLAG 384 384 0
FLAG 464 256 0
TEXT 528 432 Left 2 !.tran 10
* Z:\home\khalils\Downloads\files\data\raw_asc\0e0fd639486a_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 -1m
R3 N003 N001 50
R4 0 N003 1.2k
R1 N003 N001 2.5k
R5 0 N002 20k
R2 N002 N003 25k
I1 N002 N001 10m
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 0 0 0
WIRE 240 0 176 0
WIRE 336 0 320 0
WIRE 176 32 176 0
WIRE 0 144 0 0
WIRE 32 144 0 144
WIRE 176 144 176 112
WIRE 176 144 112 144
WIRE 224 144 176 144
WIRE 336 144 336 0
WIRE 336 144 304 144
WIRE 0 192 0 144
WIRE 176 192 176 144
WIRE 336 192 336 144
WIRE 0 304 0 272
WIRE 176 304 176 272
WIRE 176 304 0 304
WIRE 336 304 336 272
WIRE 336 304 176 304
WIRE 176 320 176 304
SYMBOL res 352 288 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 20k
SYMBOL res 192 288 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 1.2k
SYMBOL res 320 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 25k
SYMBOL res 192 128 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 50
SYMBOL res 128 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2.5k
SYMBOL current 320 0 R90
WINDOW 0 -32 40 VBottom 2
WINDOW 3 31 40 VTop 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value 10m
SYMBOL voltage 0 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value -1m
FLAG 176 320 0
TEXT 400 24 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\20179abfe57b_Ex3.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 Vout 0 nch l=0.18u w=10u
I1 Vout 0 1m
VDD N001 0 1.8
Vin N002 0 1 AC 1 0
C1 N002 Vout 1p
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib 'C:\Program Files\LTC\LTspiceXVII\lib\cmp\log018.l' TT
.op
.ac dec 10 0.9k 1.1k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 448 64 240 64
WIRE 240 112 240 64
WIRE 336 160 240 160
WIRE 160 192 48 192
WIRE 192 192 160 192
WIRE 240 224 240 208
WIRE 256 224 240 224
WIRE 48 240 48 192
WIRE 240 256 240 224
WIRE 240 256 160 256
WIRE 448 256 448 64
WIRE 48 400 48 320
WIRE 240 400 240 336
WIRE 240 400 48 400
WIRE 272 400 240 400
WIRE 336 400 336 160
WIRE 336 400 272 400
WIRE 448 400 448 336
WIRE 448 400 336 400
WIRE 272 416 272 400
FLAG 272 416 0
FLAG 256 224 Vout
IOPIN 256 224 Out
SYMBOL nmos4 192 112 R0
SYMATTR InstName M1
SYMATTR Value nch
SYMATTR Value2 l=0.18u w=10u
SYMBOL current 240 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 1m
SYMBOL voltage 448 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1.8
SYMBOL voltage 48 224 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1 0
SYMATTR InstName Vin
SYMATTR Value 1
SYMBOL cap 144 192 R0
SYMATTR InstName C1
SYMATTR Value 1p
TEXT 40 456 Left 2 !.lib 'C:\\Program Files\\LTC\\LTspiceXVII\\lib\\cmp\\log018.l' TT
TEXT 40 488 Left 2 !.op
TEXT 40 528 Left 2 !.ac dec 10 0.9k 1.1k
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1580-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N004 0 12
C1 N003 N006 22
Iload N003 N006 PULSE(400m 7 150u 100n 100n 200u 600u)
V2 N001 0 5
Rpar1 N003 N002 10m
Rpar2 N006 0 10m
C2 N005 N006 20
XU1 N005 N006 N003 N002 N001 N004 LT1580-2.5 ;pnba ADJ)GND)SENSE)OUTPUT)POWER)CONTROL
.tran 500u
* Vout
* +
* -
* Remote Load Sensing
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1580-2.5.asy)
.lib LT1584.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1492 680
WIRE 16 -96 -192 -96
WIRE -192 -80 -192 -96
WIRE 16 -48 16 -96
WIRE -192 16 -192 0
WIRE 272 16 256 16
WIRE 368 16 352 16
WIRE -96 96 -192 96
WIRE -192 112 -192 96
WIRE 368 176 368 16
WIRE 368 176 256 176
WIRE 528 176 368 176
WIRE -192 208 -192 192
WIRE 528 208 528 176
WIRE 368 224 368 176
WIRE 144 256 144 240
WIRE 16 336 16 240
WIRE 144 336 144 320
WIRE 144 336 16 336
WIRE 368 336 368 288
WIRE 368 336 144 336
WIRE 528 336 528 288
WIRE 528 336 368 336
WIRE 368 352 368 336
WIRE 368 448 368 432
FLAG -192 208 0
FLAG -192 16 0
FLAG 368 448 0
SYMBOL voltage -192 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 352 224 R0
WINDOW 39 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL current 528 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 108 Left 2
SYMATTR InstName Iload
SYMATTR Value PULSE(400m 7 150u 100n 100n 200u 600u)
SYMBOL voltage -192 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 368 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rpar1
SYMATTR Value 10m
SYMBOL res 352 336 R0
SYMATTR InstName Rpar2
SYMATTR Value 10m
SYMBOL cap 128 256 R0
SYMATTR InstName C2
SYMATTR Value 20
SYMBOL LT1580-2.5 80 96 R0
SYMATTR InstName U1
TEXT 528 392 Left 2 !.tran 500u
TEXT 432 248 Left 2 ;Vout
TEXT 448 200 Left 2 ;+
TEXT 456 296 Left 2 ;-
TEXT 88 -120 Bottom 2 ;Remote Load Sensing
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1761-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 10
Rload OUT 0 500
XU1 IN 0 IN N001 OUT LT1761-1.5 ;pnba IN)GND)_SHDN)BYP)OUT
C2 OUT N001 .01
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1761-1.5.asy)
.lib LT1761.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 48 -224 48
WIRE 16 48 -16 48
WIRE 336 48 304 48
WIRE 416 48 336 48
WIRE 512 48 416 48
WIRE -224 64 -224 48
WIRE 336 64 336 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE -16 144 -16 48
WIRE 16 144 -16 144
WIRE 336 144 336 128
WIRE 336 144 304 144
WIRE -224 160 -224 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 160 240 160 208
FLAG -224 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 160 240 0
FLAG -224 48 IN
FLAG 512 48 OUT
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT1761-1.5 160 96 R0
SYMATTR InstName U1
SYMBOL cap 320 64 R0
SYMATTR InstName C2
SYMATTR Value .01
TEXT 352 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\2fdd5d569226_Draft4.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 0 NMOS
V1 N002 0 5
V2 N001 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V1 0 5 0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 96 208 96
WIRE 160 144 0 144
WIRE 160 176 160 144
WIRE 208 192 128 192
WIRE 128 224 128 192
WIRE 128 224 0 224
WIRE 384 224 384 176
WIRE 384 224 128 224
WIRE 128 240 128 224
SYMBOL voltage 384 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 0 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL nmos 160 96 R0
SYMATTR InstName M1
FLAG 128 240 0
TEXT -34 264 Left 2 !.dc V1 0 5 0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP122-2.85.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP122-2.85.asy)
Rload OUT 0 100
C2 OUT 0 1
V1 IN 0 5.5
XU1 OUT MP_01 0 IN MP_02 IN ADP122 K=1/5700 ;pnba Vout))GND)En))Vin
C1 IN 0 1
.tran 10m startup
.lib ADP122.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL ADP122-2.85 256 208 R0
SYMATTR InstName U1
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\4a19c9b5c052_widlar-bandgap.asc
* Generated by LTspice 26.0.1 for Windows.
* Vref = V_BE + R3 / R1 * dV_BE
Q4 Vref N001 Vin 0 BC557C
R4 N001 0 2.2k
R3 Vref N002 6.2k
R1 N004 0 620
Q3 N001 N001 Vin 0 BC557C
Q6 N002 N003 N004 0 BC547B
Q2 Vref N002 0 0 BC547B
R2 Vref N003 620
VUdc Vin 0 10V
Q1 N003 N003 0 0 BC547B
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran .01
.TEMP 0 10 20 30 40 50
.OPTIONS NOOPITER
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1928 680
WIRE 720 -240 656 -240
WIRE 912 -240 720 -240
WIRE 720 -192 720 -240
WIRE 912 -192 912 -240
WIRE 816 -144 784 -144
WIRE 848 -144 816 -144
WIRE 720 -48 720 -96
WIRE 816 -48 816 -144
WIRE 816 -48 720 -48
WIRE 912 -48 912 -96
WIRE 1072 -48 912 -48
WIRE 1216 -48 1072 -48
WIRE 1328 -48 1216 -48
WIRE 1072 -32 1072 -48
WIRE 912 16 912 -48
WIRE 1216 32 1216 -48
WIRE 1072 80 1072 48
WIRE 1152 80 1072 80
WIRE 1072 112 1072 80
WIRE 912 160 912 96
WIRE 912 160 816 160
WIRE 1008 160 912 160
WIRE 720 208 720 -48
WIRE 912 224 912 160
WIRE 1072 240 1072 208
WIRE 816 272 816 160
WIRE 848 272 816 272
WIRE -96 304 -96 256
WIRE 720 384 720 288
WIRE 912 384 912 320
WIRE 912 384 720 384
WIRE 1072 384 1072 320
WIRE 1072 384 912 384
WIRE 1216 384 1216 128
WIRE 1216 384 1072 384
WIRE -96 416 -96 384
WIRE 1216 448 1216 384
IOPIN 656 -240 In
IOPIN -96 256 In
SYMBOL npn 848 224 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL pnp 848 -96 M180
WINDOW 0 49 31 Left 2
WINDOW 3 50 59 Left 2
SYMATTR InstName Q4
SYMATTR Value BC557C
SYMBOL res 1056 224 R0
SYMATTR InstName R1
SYMATTR Value 620
SYMBOL npn 1152 32 R0
SYMATTR InstName Q2
SYMATTR Value BC547B
SYMBOL voltage -96 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Udc
SYMATTR Value 10V
SYMBOL pnp 784 -96 R180
WINDOW 0 61 28 Left 2
WINDOW 3 62 56 Left 2
SYMATTR InstName Q3
SYMATTR Value BC557C
SYMBOL res 896 0 R0
SYMATTR InstName R2
SYMATTR Value 620
SYMBOL res 1056 -48 R0
SYMATTR InstName R3
SYMATTR Value 6.2k
SYMBOL res 704 192 R0
SYMATTR InstName R4
SYMATTR Value 2.2k
SYMBOL npn 1008 112 R0
SYMATTR InstName Q6
SYMATTR Value BC547B
FLAG 1216 448 0
FLAG -96 416 0
FLAG 1328 -48 Vref
FLAG 656 -240 Vin
FLAG -96 256 Vin
TEXT 8 312 Left 2 !.tran .01
TEXT 8 344 Left 2 !.TEMP 0 10 20 30 40 50\n.OPTIONS NOOPITER
TEXT -104 464 Left 2 ;Vref = V_BE + R3 / R1 * dV_BE