Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1f5363ae5bbe_Draft61.asc
* Generated by LTspice 26.0.1 for Windows.
* +100V overvoltage, leakage is still very low. 100pA\n-10V (==gate), jfet conducts -1mA.
* ltspice. source reference doesn't matter if gnd.
V3 P001 0 10V
R1 N003 P001 10k
I2 0 N004 10m
V2 N001 0 -5
V1 0 N002 10V
R2 N004 P002 10k
I1 0 N003 10m
R3 N005 0 10k
J1 N001 N002 0 J201
V4 P002 0 -10
I3 0 N005 10m
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.tran 10ms
.include 74hc.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2756 1020
WIRE -16 -176 -288 -176
WIRE -288 -64 -288 -176
WIRE -16 16 -16 -176
WIRE -112 80 -128 80
WIRE -64 80 -112 80
WIRE -112 224 -112 80
WIRE -112 224 -192 224
WIRE 512 320 512 240
WIRE 784 320 784 240
WIRE 976 320 976 240
WIRE 976 480 976 400
SYMBOL voltage -192 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
WINDOW 3 32 8 Left 2
SYMATTR InstName V1
SYMATTR Value 10V
SYMBOL current 976 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I3
SYMATTR Value 10m
SYMBOL res 960 304 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 768 304 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL current 512 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 10m
SYMBOL current 784 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I2
SYMATTR Value 10m
SYMBOL voltage 784 384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -88 37 Left 2
WINDOW 3 -95 65 Left 2
SYMATTR InstName V4
SYMATTR Value -10
SYMBOL res 496 304 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL njf -64 16 R0
WINDOW 0 132 56 Right 2
WINDOW 3 158 82 Right 2
SYMATTR InstName J1
SYMATTR Value J201
SYMBOL voltage 512 384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 55 35 Left 2
WINDOW 3 50 63 Left 2
SYMATTR InstName V3
SYMATTR Value 10V
SYMBOL voltage -288 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
WINDOW 3 32 8 Left 2
SYMATTR InstName V2
SYMATTR Value -5
FLAG -288 16 0
FLAG -16 112 0
FLAG -192 144 0
FLAG 512 160 0
FLAG 512 480 0
FLAG 784 160 0
FLAG 784 480 0
FLAG 976 160 0
FLAG 976 480 0
TEXT -672 -192 Left 2 !.tran 10ms
TEXT -672 -112 Left 2 !.include 74hc.lib
TEXT 224 -104 Left 2 ;+100V overvoltage, leakage is still very low. 100pA\n-10V (==gate), jfet conducts -1mA.
TEXT 496 64 Left 2 ;ltspice. source reference doesn't matter if gnd.
* Z:\tmp\asc_dec_bjh7r6w2\100e44504354_Triangle_osc_fm_am1_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
B1 N001 0 I=-V(freq)*(1-2*V(tri_cmp))*4e-4
B2 tri_out 0 V=V(ampl)*V(tri_c) tripdt=0.1u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 932
WIRE -192 176 -544 176
WIRE 16 176 -96 176
WIRE 176 176 80 176
WIRE 16 208 -32 208
WIRE -32 240 -32 208
WIRE -544 272 -544 176
WIRE 176 288 112 288
WIRE 112 320 112 288
WIRE -544 416 -544 352
WIRE 112 416 112 400
SYMBOL bi -544 272 R0
SYMATTR InstName B1
SYMATTR Value I=-V(freq)*(1-2*V(tri_cmp))*4e-4
SYMBOL bv 112 304 R0
SYMATTR InstName B2
SYMATTR Value V=V(ampl)*V(tri_c)
SYMATTR Value2 tripdt=0.1u
FLAG -32 240 0
FLAG 176 176 tri_cmp
FLAG -544 416 0
FLAG 176 288 tri_out
FLAG 112 416 0
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17553B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17553B.asy)
R2 N002 0 287k
R1 vIN N002 3.32Meg
V1 vIN 0 24
Rload vOUT 0 100
XU1 0 vIN N002 N004 vOUT N001 N003 N005 MAX17553B ;pnba GND)IN)EN/UV)HYST)FB/VO)LX)_RESET)RT
R3 N002 N004 953k
R7 N005 0 274k
R4 vOUT N003 100k
C2 vOUT 0 10
L1 N001 vOUT 180 Rser=2.5
.tran 4m startup
.lib MAX17553B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 992 680
WIRE -176 -32 -192 -32
WIRE 48 -32 -176 -32
WIRE 176 -32 48 -32
WIRE 512 -32 464 -32
WIRE 624 -32 592 -32
WIRE 704 -32 624 -32
WIRE 768 -32 704 -32
WIRE 864 -32 768 -32
WIRE 896 -32 864 -32
WIRE 48 -16 48 -32
WIRE 624 -16 624 -32
WIRE 896 -16 896 -32
WIRE -192 16 -192 -32
WIRE 624 64 624 48
WIRE 896 80 896 64
WIRE 48 96 48 64
WIRE 48 96 -64 96
WIRE 176 96 48 96
WIRE -64 112 -64 96
WIRE 48 112 48 96
WIRE -192 128 -192 96
WIRE 512 128 464 128
WIRE 704 128 704 -32
WIRE 704 128 592 128
WIRE -64 224 -64 192
WIRE 48 224 48 192
WIRE 176 224 48 224
WIRE 768 224 768 -32
WIRE 768 224 464 224
WIRE 176 320 48 320
WIRE 48 336 48 320
WIRE 320 384 320 368
WIRE 48 432 48 416
SYMBOL res 880 -32 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL voltage -192 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 608 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL ind 496 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 180
SYMATTR SpiceLine Rser=2.5
SYMBOL cap 608 -16 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res 32 320 R0
SYMATTR InstName R7
SYMATTR Value 274k
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 3.32Meg
SYMBOL MAX17553B 320 144 R0
SYMATTR InstName U1
SYMBOL res -80 96 R0
SYMATTR InstName R2
SYMATTR Value 287k
SYMBOL res 32 96 R0
SYMATTR InstName R3
SYMATTR Value 953k
FLAG -192 128 0
FLAG 320 384 0
FLAG 624 64 0
FLAG 896 80 0
FLAG -176 -32 vIN
FLAG 864 -32 vOUT
FLAG -64 224 0
FLAG 48 432 0
TEXT 480 392 Left 2 !.tran 4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1575-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1575-3.3.asy)
C1 OUT 0 24
C3 N005 0 1000p
C2 N004 0 10p
XU1 0 N002 0 OUT N004 N003 N001 N001 LT1575-3.3 ;pnba SHDN)Vin)GND)OUT)Comp)Gate)Ineg)Ipos
R3 N004 N005 7.5K
V1 N001 0 5
M3 N001 N003 OUT OUT IRFZ24
I2 OUT 0 PULSE(.2 5 300u 100n 100n 300u 600u) load
V2 N002 0 12
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m
.lib LT1575.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4232 1996
WIRE 2352 -32 2336 -32
WIRE 2688 -32 2640 -32
WIRE 2896 -32 2688 -32
WIRE 3088 -32 2896 -32
WIRE 3088 -16 3088 -32
WIRE 2352 64 2208 64
WIRE 2688 64 2688 -32
WIRE 2688 64 2640 64
WIRE 2208 80 2208 64
WIRE 2896 80 2896 -32
WIRE 3088 80 3088 64
WIRE 2352 160 2336 160
WIRE 2848 160 2640 160
WIRE 2208 176 2208 160
WIRE 2352 256 2336 256
WIRE 2672 256 2640 256
WIRE 2704 256 2672 256
WIRE 2800 256 2784 256
WIRE 2672 272 2672 256
WIRE 2800 272 2800 256
WIRE 2672 352 2672 336
WIRE 2800 352 2800 336
WIRE 2336 384 2336 256
WIRE 2896 384 2896 176
WIRE 2896 384 2336 384
WIRE 3024 384 2896 384
WIRE 2896 400 2896 384
WIRE 3024 400 3024 384
WIRE 2896 496 2896 464
WIRE 3024 496 3024 480
SYMBOL cap 2880 400 R0
SYMATTR InstName C1
SYMATTR Value 24
SYMBOL res 2688 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 7.5K
SYMBOL current 3024 400 R0
WINDOW 123 0 0 Left 2
WINDOW 39 39 39 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I2
SYMATTR Value PULSE(.2 5 300u 100n 100n 300u 600u)
SYMBOL cap 2784 272 R0
SYMATTR InstName C3
SYMATTR Value 1000p
SYMBOL nmos 2848 80 R0
SYMATTR InstName M3
SYMATTR Value IRFZ24
SYMBOL cap 2656 272 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL voltage 2208 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL voltage 3088 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL LT1575-3.3 2496 112 R0
SYMATTR InstName U1
FLAG 2896 496 0
FLAG 3024 496 0
FLAG 3088 80 0
FLAG 2800 352 0
FLAG 2672 352 0
FLAG 2336 -32 0
FLAG 2208 176 0
FLAG 2336 160 0
FLAG 3024 384 OUT
TEXT 3152 560 Left 2 !.tran 1m
* Z:\tmp\asc_dec_bjh7r6w2\05179ed82fa5_uebung_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R4 N005 N001 390k
R5 0 N005 100k
Q4 N002 N004 N010 0 myNPN
Q2 N001 N003 N008 0 myNPN
R7 0 N010 1.8k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1868 720
WIRE 384 -48 160 -48
WIRE 576 -48 384 -48
WIRE 736 -48 576 -48
WIRE 1632 -48 1440 -48
WIRE 1792 -48 1632 -48
WIRE 160 -16 160 -48
WIRE 384 -16 384 -48
WIRE 1440 -16 1440 -48
WIRE 576 128 576 -48
WIRE 1632 128 1632 -48
WIRE 384 176 384 64
WIRE 512 176 384 176
WIRE 1440 176 1440 64
WIRE 1568 176 1440 176
WIRE 384 208 384 176
WIRE 1440 208 1440 176
WIRE 160 256 160 64
WIRE 320 256 160 256
WIRE 1376 256 1328 256
WIRE 1792 272 1792 -48
WIRE 160 368 160 256
WIRE 384 368 384 304
WIRE 576 368 576 224
WIRE 1440 368 1440 304
WIRE 1632 368 1632 224
WIRE 160 496 160 448
WIRE 1632 496 1632 448
WIRE 1792 496 1792 352
SYMBOL res 176 80 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 390k
SYMBOL res 176 464 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 100k
SYMBOL npn 1568 128 R0
SYMATTR InstName Q4
SYMATTR Value myNPN
SYMBOL npn 512 128 R0
SYMATTR InstName Q2
SYMATTR Value myNPN
SYMBOL res 1648 464 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R7
SYMATTR Value 1.8k
FLAG 160 496 0
FLAG 1792 496 0
FLAG 1632 496 0
* Z:\home\khalils\Downloads\files\data\raw_asc\4078f3c3a626_1001S8.asc
* Generated by LTspice 26.0.1 for Windows.
* Precision Absolute Value Circuit
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001S8.asy)
XU2 N005 N003 +V -V OUT LT1001 ;pnba In+)In-)V+)V-)OUT
R5 OUT N003 10K
XU1 0 N001 +V -V N004 LT1001 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
V3 IN 0 SINE(0 10 100)
R2 N001 IN 10K
D1 N002 N004 1N4148
D2 N004 N005 1N4148
R4 N003 N002 10K
R1 N002 N001 10K
R3 N005 N001 10K
V2 -V 0 -15
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -16 96 -96 96
WIRE 112 96 64 96
WIRE 160 96 112 96
WIRE 336 96 240 96
WIRE 384 96 336 96
WIRE 480 96 464 96
WIRE 496 96 480 96
WIRE 608 96 576 96
WIRE -96 128 -96 96
WIRE 336 128 336 96
WIRE 192 208 192 192
WIRE 528 208 528 192
WIRE 112 224 112 96
WIRE 160 224 112 224
WIRE 480 224 480 96
WIRE 496 224 480 224
WIRE -96 240 -96 208
WIRE 336 240 336 192
WIRE 336 240 224 240
WIRE 608 240 608 96
WIRE 608 240 560 240
WIRE 640 240 608 240
WIRE 160 256 144 256
WIRE 496 256 480 256
WIRE 192 288 192 272
WIRE 336 288 336 240
WIRE 528 288 528 272
WIRE -96 336 -96 320
WIRE 0 336 0 320
WIRE 112 384 112 224
WIRE 160 384 112 384
WIRE 336 384 336 352
WIRE 336 384 240 384
WIRE 480 384 480 256
WIRE 480 384 336 384
WIRE -96 448 -96 416
WIRE 0 448 0 416
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL opamps\\LT1001S8 528 176 R0
SYMATTR InstName U2
SYMBOL res 80 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL diode 320 288 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL opamps\\LT1001S8 192 176 R0
SYMATTR InstName U1
SYMBOL res 480 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL voltage 0 320 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 256 368 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL diode 320 128 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage -96 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 10 100)
SYMBOL res 592 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R5
SYMATTR Value 10K
SYMBOL voltage -96 320 R0
SYMATTR InstName V2
SYMATTR Value -15
FLAG 0 448 0
FLAG 192 192 +V
FLAG 0 320 +V
FLAG 192 288 -V
FLAG -96 448 0
FLAG -96 320 -V
FLAG -96 240 0
FLAG 528 192 +V
FLAG 528 288 -V
FLAG 144 256 0
FLAG -96 96 IN
FLAG 640 240 OUT
TEXT 536 352 Left 0 !.tran 30m
TEXT 256 40 Bottom 0 ;Precision Absolute Value Circuit
* Z:\home\khalils\Downloads\files\data\raw_asc\19099e73d83a_2.4_Practical__real__diode_model_.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 1k
D1 N002 0 1N4148
V1 N001 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 1 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 432 224 224 224
WIRE 576 224 512 224
WIRE 224 272 224 224
WIRE 576 288 576 224
WIRE 224 400 224 352
WIRE 576 400 576 352
WIRE 576 400 224 400
WIRE 224 448 224 400
SYMBOL Voltage 224 256 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL diode 560 288 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL Res 528 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 224 448 0
TEXT 224 136 Left 2 !.dc V1 0 1 0.01
* Z:\tmp\asc_dec_bjh7r6w2\0951eaa64682_reverse_polarity_protection_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 0 100k
C2 N003 0 4.7n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 144 272 80
WIRE 512 208 512 80
WIRE 160 256 160 128
WIRE 272 256 272 208
WIRE 272 256 160 256
WIRE 352 256 272 256
WIRE 160 304 160 256
WIRE 352 304 352 256
WIRE 160 416 160 384
WIRE 352 416 352 368
WIRE 512 416 512 288
SYMBOL res 144 288 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL cap 336 304 R0
SYMATTR InstName C2
SYMATTR Value 4.7n
FLAG 160 416 0
FLAG 512 416 0
FLAG 352 416 0
* Z:\home\khalils\Downloads\files\data\raw_asc\0134c8312490_3_pmos_.asc
* Generated by LTspice 26.0.1 for Windows.
VDS DS 0 50m
M2 DS N002 0 N001 CMOSP l=0.18u w=1.8u ad=0.81p as=0.81p pd=4.5u ps=4.5u
VGS N002 0 V
VBS N001 0 -900m
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC_180nm.txt
.dc VGS 0 1.8 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1012 680
WIRE 496 64 336 64
WIRE 496 80 496 64
WIRE 496 192 496 160
WIRE 336 240 336 64
WIRE 512 288 336 288
WIRE 288 320 176 320
WIRE 176 352 176 320
WIRE 512 448 512 288
WIRE 176 496 176 432
WIRE 336 496 336 336
WIRE 336 496 176 496
WIRE 336 560 336 496
WIRE 512 576 512 528
SYMBOL voltage 176 336 R0
SYMATTR InstName VGS
SYMBOL voltage 496 64 R0
SYMATTR InstName VDS
SYMATTR Value 50m
SYMBOL pmos4 288 240 R0
SYMATTR InstName M2
SYMATTR Value CMOSP
SYMATTR Value2 l=0.18u w=1.8u ad=0.81p as=0.81p pd=4.5u ps=4.5u
SYMBOL voltage 512 432 R0
SYMATTR InstName VBS
SYMATTR Value -900m
FLAG 336 560 0
FLAG 512 576 0
FLAG 496 192 0
FLAG 496 64 DS
TEXT 616 192 Left 2 !.include TSMC_180nm.txt
TEXT 624 256 Left 2 !.dc VGS 0 1.8 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8508.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8508.asy)
R1 N001 0 10K
V1 +V 0 2.5
XU1 IN N001 +V -V OUT AD8508 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -2.5
Vin IN 0 SINE(0 1 1K)
Rload OUT 0 10K
R2 OUT N001 10K
.tran 10m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL opamps\\AD8508 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 1K)
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
TEXT 712 -952 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3020-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 PWL(0 0 1 10)
Rload OUT 0 100
C1 OUT 0 2.2
XU1 OUT MP_01 MP_02 0 N001 MP_03 N001 LT3020-1.2 ;pnba OUT)))GND)_SHDN))IN
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3020-1.2.asy)
.lib LT3020.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 160 -176 160
WIRE 16 160 0 160
WIRE 368 160 304 160
WIRE 464 160 368 160
WIRE 368 176 368 160
WIRE 464 176 464 160
WIRE -176 192 -176 160
WIRE 0 256 0 160
WIRE 16 256 0 256
WIRE 368 272 368 240
WIRE 464 272 464 256
WIRE -176 288 -176 272
WIRE 160 336 160 320
FLAG 160 336 0
FLAG 368 272 0
FLAG 464 272 0
FLAG -176 288 0
FLAG 464 160 OUT
SYMBOL voltage -176 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 448 160 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 352 176 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL PowerProducts\\LT3020-1.2 160 192 R0
SYMATTR InstName U1
TEXT 384 352 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\10dace6d6683_NOR.asc
* Generated by LTspice 26.0.1 for Windows.
V2 A 0 PULSE(5 0 0 30n 30n 2m 4m)
M2 S B 0 0 NMOS
V3 B 0 PULSE(5 0 0 30n 30n 1m 2m)
V+5V N001 0 5V
M1 S A 0 0 NMOS
M4 P001 A N001 N001 PMOS
M3 S B P001 P001 PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 48 80 48
WIRE 352 80 352 48
WIRE 304 96 256 96
WIRE -224 160 -400 160
WIRE 80 192 80 48
WIRE 304 192 256 192
WIRE -224 208 -304 208
WIRE -400 240 -400 160
WIRE -304 240 -304 208
WIRE 352 288 352 272
WIRE 528 288 352 288
WIRE 352 304 352 288
WIRE 352 304 272 304
WIRE 432 304 352 304
WIRE 272 336 272 304
WIRE 432 336 432 304
WIRE -400 384 -400 320
WIRE -352 384 -400 384
WIRE -304 384 -304 320
WIRE -304 384 -352 384
WIRE -352 416 -352 384
WIRE 224 416 192 416
WIRE 512 416 480 416
WIRE 80 464 80 272
WIRE 224 464 80 464
WIRE 272 464 272 432
WIRE 272 464 224 464
WIRE 432 464 432 432
WIRE 432 464 272 464
WIRE 224 496 224 464
SYMBOL pmos 304 272 M180
SYMATTR InstName M3
SYMBOL voltage 80 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName +5V
SYMATTR Value 5V
SYMBOL voltage -400 224 R0
WINDOW 3 -339 32 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(5 0 0 30n 30n 2m 4m)
SYMATTR InstName V2
SYMBOL pmos 304 176 M180
SYMATTR InstName M4
SYMBOL voltage -304 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(5 0 0 30n 30n 1m 2m)
SYMBOL nmos 224 336 R0
SYMATTR InstName M1
SYMBOL nmos 480 336 M0
SYMATTR InstName M2
FLAG -352 416 0
FLAG -224 160 A
FLAG -224 208 B
FLAG 256 96 A
FLAG 256 192 B
FLAG 224 496 0
FLAG 192 416 A
FLAG 512 416 B
FLAG 528 288 S
TEXT -352 520 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7112-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7112-3.3.asy)
C2 N001 0 4.7n
V1 IN 0 4.3
C1 OUT 0 2.2 Rser=1.5m
Rload OUT 0 22
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=3.3 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 6m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 22
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.3
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL ADP7112-3.3 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1110.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1110.asy)
L1 IN N001 47 Rser=0.02 Rpar=5000
R2 N002 0 13.8K
V1 IN 0 1.5 Rser=0.1
R1 OUT N002 300K
XU1 IN IN N001 0 0 MP_01 MP_02 N002 LT1110 top=1K bot=1T ;pnba Ilim)Vin)SW1)SW2)GND)))FB
Rload OUT 0 300
D1 N001 OUT MBRS140
C2 OUT 0 15 Rser=0.02
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 4m startup
.lib LT1110.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2504 1688
WIRE 1472 912 1328 912
WIRE 1600 912 1472 912
WIRE 1632 912 1600 912
WIRE 1744 912 1712 912
WIRE 1792 912 1744 912
WIRE 1904 912 1856 912
WIRE 2016 912 1904 912
WIRE 2112 912 2016 912
WIRE 1328 928 1328 912
WIRE 2016 928 2016 912
WIRE 2112 928 2112 912
WIRE 1904 944 1904 912
WIRE 1472 960 1472 912
WIRE 1600 960 1600 912
WIRE 1328 1024 1328 1008
WIRE 2016 1024 2016 992
WIRE 2112 1024 2112 1008
WIRE 1744 1040 1744 912
WIRE 1744 1040 1664 1040
WIRE 1904 1104 1904 1024
WIRE 1904 1104 1664 1104
WIRE 1904 1120 1904 1104
WIRE 1680 1168 1664 1168
WIRE 1904 1216 1904 1200
WIRE 1536 1264 1536 1248
SYMBOL schottky 1792 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL RES 1888 1104 R0
SYMATTR InstName R2
SYMATTR Value 13.8K
SYMBOL PowerProducts\\LT1110 1536 1104 R0
SYMATTR InstName U1
SYMBOL RES 2096 912 R0
SYMATTR InstName Rload
SYMATTR Value 300
SYMBOL IND 1616 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 47
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL POLCAP 2000 928 R0
SYMATTR InstName C2
SYMATTR Value 15
SYMATTR SpiceLine Rser=0.02
SYMBOL RES 1888 928 R0
SYMATTR InstName R1
SYMATTR Value 300K
SYMBOL VOLTAGE 1328 912 R0
SYMATTR InstName V1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=0.1
FLAG 2112 912 OUT
FLAG 1904 1216 0
FLAG 2016 1024 0
FLAG 2112 1024 0
FLAG 1328 1024 0
FLAG 1680 1168 0
FLAG 1536 1264 0
FLAG 1328 912 IN
TEXT 1704 1256 Left 2 !.tran 4m startup
* Z:\tmp\asc_dec_bjh7r6w2\0353242a39e3_nor_gate_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N003 A 0 N004 NMOS
V2 B 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 0 192 -160
WIRE 192 0 48 0
WIRE 224 0 192 0
WIRE 272 0 272 -32
WIRE -432 32 -528 32
WIRE -336 32 -432 32
WIRE 224 96 112 96
WIRE 272 96 272 64
WIRE 272 128 272 112
WIRE 528 128 272 128
WIRE 272 144 272 128
WIRE 272 144 192 144
WIRE 368 144 272 144
WIRE 112 176 112 96
WIRE 112 176 48 176
WIRE 112 224 112 176
WIRE 144 224 112 224
WIRE 192 224 192 192
WIRE 272 240 192 240
WIRE 368 240 272 240
WIRE 272 256 272 240
SYMBOL nmos4 144 144 R0
SYMATTR InstName M1
SYMBOL voltage -432 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
FLAG 272 256 0
FLAG 48 176 A
FLAG 48 0 B
FLAG -528 -48 A
FLAG -432 -48 B
FLAG -336 -48 Vdd
FLAG -432 32 0