Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2371-ADJ.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2371-ADJ.asy)
R2 OUT N003 232K
XU1 IN IN IN IN N002 N003 N001 0 ADP2371-ADJ IPSM=400m Rt=100MEG Rb=100MEG C1=1.6p Rc1=100k R3=5.92k Rshort=100m PD=1 ;pnba FSEL)SYNC)EN)Vin)SW)FB)PG)PGND
L1 N002 OUT 10 Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
C1 OUT 0 10
R1 OUT N001 10K
R3 N003 0 44.2K
Rload OUT 0 20
V1 IN 0 12
.tran 500u startup
.lib ADP2371-ADJ.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 904 692
WIRE 160 96 48 96
WIRE 176 96 160 96
WIRE 464 96 400 96
WIRE 640 96 544 96
WIRE 48 112 48 96
WIRE 160 176 160 96
WIRE 176 176 160 176
WIRE 416 176 400 176
WIRE 544 176 496 176
WIRE 640 176 640 96
WIRE 640 176 544 176
WIRE 784 176 640 176
WIRE 784 192 784 176
WIRE 48 208 48 192
WIRE 640 208 640 176
WIRE 160 256 160 176
WIRE 176 256 160 256
WIRE 544 256 544 240
WIRE 544 256 400 256
WIRE 544 272 544 256
WIRE 784 288 784 272
WIRE 160 336 160 256
WIRE 176 336 160 336
WIRE 640 336 640 288
WIRE 640 336 400 336
WIRE 640 352 640 336
WIRE 640 448 640 432
SYMBOL ind 400 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
SYMBOL res 624 192 R0
SYMATTR InstName R2
SYMATTR Value 232K
SYMBOL ADP2371-ADJ 288 208 R0
SYMATTR InstName U1
SYMBOL res 624 336 R0
SYMATTR InstName R3
SYMATTR Value 44.2K
SYMBOL cap 528 176 R0
WINDOW 0 29 15 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL VOLTAGE 48 96 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 560 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 768 176 R0
SYMATTR InstName Rload
SYMATTR Value 20
FLAG 48 208 0
FLAG 48 96 IN
FLAG 544 272 0
FLAG 784 176 OUT
FLAG 640 448 0
FLAG 784 288 0
TEXT 392 416 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\b97d0e2a77a3_Draft15.asc
* Generated by LTspice 26.0.1 for Windows.
V1 VC 0 PWL REPEAT FOREVER (0 0 0.999m 10 +1u 0) ENDREPEAT TRIGGER V(v2)>0
V2 V2 0 2
V3 VB 0 PWL REPEAT FOREVER (0 0 +999u 0 +1u 1 +999u 1 +1u 2 ++999u 2 +1u 3 +999u 3 +1u 4 +999u 4 +1u 5 +999u 5 +1u 6 +999u 6 +1u 7 +999u 7 +1u 8 +999u 8 +1u 0) ENDREPEAT TRIGGER V(v2)>0
RC VC Vce 100
RB N001 VB 15K
Q1 Vce N001 0 0 2N2222
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 10m 0 1u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2500 680
WIRE 1536 -160 1536 -192
WIRE 1536 -64 1536 -80
WIRE 1536 -32 1536 -64
WIRE 1344 16 1312 16
WIRE 1472 16 1424 16
WIRE -160 80 -160 32
WIRE 128 80 128 32
WIRE 1536 128 1536 64
WIRE -160 208 -160 160
WIRE 128 208 128 160
WIRE 128 416 128 368
WIRE 128 544 128 496
FLAG -160 32 V2
FLAG -160 208 0
FLAG 128 32 VC
FLAG 128 208 0
FLAG 128 368 VB
FLAG 128 544 0
FLAG 1536 128 0
FLAG 1536 -192 VC
FLAG 1312 16 VB
FLAG 1536 -64 Vce
SYMBOL voltage 128 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL REPEAT FOREVER (0 0 0.999m 10 +1u 0) ENDREPEAT TRIGGER V(v2)>0
SYMBOL voltage -160 64 R0
SYMATTR InstName V2
SYMATTR Value 2
SYMBOL voltage 128 400 R0
SYMATTR InstName V3
SYMATTR Value PWL REPEAT FOREVER (0 0 +999u 0 +1u 1 +999u 1 +1u 2 ++999u 2 +1u 3 +999u 3 +1u 4 +999u 4 +1u 5 +999u 5 +1u 6 +999u 6 +1u 7 +999u 7 +1u 8 +999u 8 +1u 0) ENDREPEAT TRIGGER V(v2)>0
SYMBOL res 1520 -176 R0
SYMATTR InstName RC
SYMATTR Value 100
SYMBOL res 1440 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RB
SYMATTR Value 15K
SYMBOL npn 1472 -32 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
TEXT -176 344 Left 2 !.tran 0 10m 0 1u
* Z:\tmp\asc_dec_bjh7r6w2\00d8b4000356_Howland_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 1K
V3 IN 0 SINE(0 1 1K)
R2 N001 IN 1K
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 696
WIRE 32 160 -96 160
WIRE 144 160 112 160
WIRE 192 160 144 160
WIRE 304 160 272 160
WIRE -96 176 -96 160
WIRE 144 256 144 160
WIRE 160 256 144 256
WIRE -96 272 -96 256
WIRE 304 272 304 160
WIRE 304 272 224 272
WIRE 160 288 144 288
WIRE -176 336 -176 320
WIRE 144 368 144 288
WIRE 304 368 304 272
SYMBOL res 288 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -96 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 128 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
FLAG 192 240 +V
FLAG -176 320 -V
FLAG 192 304 -V
FLAG -96 272 0
FLAG -96 160 IN
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2941-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2941-1.asy)
XU1 N001 0 N004 N005 N003 N002 LTC2941-1 B_Reg=60 CD_Reg=32767 EF_Reg=65535 GH_Reg=0 EF_Reg=65535 GH_Reg=0 ;pnba Sense+)GND)StatusReg)ACRreg)_AL/CC)Sense-
R1 N001 N003 10K
V2 N002 0 PULSE(3.9 3.5 1s 10m 10m 1 2)
Vbatt N001 0 3.7
.tran 5
.lib LTC2941-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1432 680
WIRE 64 -96 -48 -96
WIRE 832 -96 64 -96
WIRE -48 -80 -48 -96
WIRE 832 -48 832 -96
WIRE -48 16 -48 0
WIRE 64 16 64 -96
WIRE 96 16 64 16
WIRE 576 16 416 16
WIRE 720 16 656 16
WIRE 96 112 80 112
WIRE 832 112 832 32
WIRE 832 112 416 112
WIRE 96 208 80 208
WIRE 432 208 416 208
SYMBOL LTC2941-1 256 112 R0
SYMATTR InstName U1
SYMATTR Value B_Reg=60 CD_Reg=32767
SYMBOL res 816 -64 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -48 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vbatt
SYMATTR Value 3.7
SYMBOL voltage 560 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value PULSE(3.9 3.5 1s 10m 10m 1 2)
FLAG -48 16 0
FLAG 80 112 0
FLAG 720 16 0
TEXT 600 272 Left 2 !.tran 5
* Z:\home\khalils\Downloads\files\data\raw_asc\2236ff8f50c0_1799.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1799.asy)
V1 N001 0 3
XU1 N001 0 N002 0 OUT LTC1799 ;pnba V+)GND)SET)DIV)OUT
R1 N001 N002 10K
.tran 10u
.lib LTC1799.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 80 -112 80
WIRE 96 80 -16 80
WIRE 352 80 320 80
WIRE -112 112 -112 80
WIRE -16 112 -16 80
WIRE 96 160 80 160
WIRE -112 208 -112 192
WIRE -16 240 -16 192
WIRE 96 240 -16 240
WIRE 336 240 320 240
SYMBOL SpecialFunctions\\LTC1799 208 160 R0
SYMATTR InstName U1
SYMBOL res -32 96 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -112 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3
FLAG 80 160 0
FLAG 336 240 0
FLAG -112 208 0
FLAG 352 80 OUT
TEXT 408 256 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8615.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8615.asy)
C4 OUT 0 22 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
XU1 N004 N001 NC_01 IN N007 N002 IN N005 N006 0 N003 LT8615 ;pnba TR/SS)INTVcc)SYNC)VIN)FB)PG)EN/UV)SW)RT)GND)BST
C1 N004 0 1n
L1 N005 OUT 2.2 Rser=37m Rpar=5k
V1 IN 0 12
R1 N006 0 18.2K
Rload OUT 0 2.2
R2 OUT N007 1Meg
C2 N001 0 1
C5 OUT N007 10p
R3 N007 0 309K
R4 N001 N002 100K
C3 N003 N005 0.1
.tran 750u startup
.lib LT8615.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1044 680
WIRE 80 0 0 0
WIRE 112 0 80 0
WIRE 464 0 400 0
WIRE 528 0 464 0
WIRE 608 0 592 0
WIRE 0 16 0 0
WIRE 464 16 464 0
WIRE 80 96 80 0
WIRE 112 96 80 96
WIRE 464 96 400 96
WIRE 0 112 0 96
WIRE 432 192 400 192
WIRE 432 208 432 192
WIRE 32 288 0 288
WIRE 112 288 96 288
WIRE 432 288 432 272
WIRE 432 288 400 288
WIRE 512 288 432 288
WIRE 624 288 592 288
WIRE 736 288 624 288
WIRE 832 288 736 288
WIRE 928 288 832 288
WIRE 624 304 624 288
WIRE 736 304 736 288
WIRE 832 304 832 288
WIRE 928 304 928 288
WIRE 16 384 0 384
WIRE 112 384 96 384
WIRE 624 384 400 384
WIRE 736 384 736 368
WIRE 736 384 624 384
WIRE 624 400 624 384
WIRE 832 400 832 368
WIRE 928 400 928 384
WIRE 256 448 256 432
WIRE 624 496 624 480
SYMBOL res 112 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 18.2K
SYMBOL voltage 0 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 608 288 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL cap 720 304 R0
SYMATTR InstName C5
SYMATTR Value 10p
SYMBOL cap 96 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL cap 416 208 R0
SYMATTR InstName C3
SYMATTR Value 0.1
SYMBOL ind 496 304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=37m Rpar=5k
SYMBOL cap 528 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 608 384 R0
SYMATTR InstName R3
SYMATTR Value 309K
SYMBOL res 912 288 R0
SYMATTR InstName Rload
SYMATTR Value 2.2
SYMBOL res 448 0 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL LT8615 256 160 R0
SYMATTR InstName U1
SYMBOL cap 816 304 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
FLAG 0 384 0
FLAG 0 288 0
FLAG 0 112 0
FLAG 608 0 0
FLAG 832 400 0
FLAG 624 496 0
FLAG 928 400 0
FLAG 928 288 OUT
FLAG 0 0 IN
FLAG 256 448 0
TEXT 480 584 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6400-20.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N004 0 SINE(0 10m 100Meg)
XU1 0 0 N001 N002 N006 N007 N007 N004 N005 N003 LTC6400-20 ;pnba IN-)Vocm)V+)OUT+)OUT-)V-)_EN)IN+)OUTF-)OUTF+
V2 N001 0 1.5
V3 N007 0 -1.5
.tran 100n
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6400-20.asy)
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 112 -48 112
WIRE -48 128 -48 112
WIRE 192 128 192 112
WIRE 352 160 336 160
WIRE 80 208 64 208
WIRE 352 208 336 208
WIRE -48 224 -48 208
WIRE -176 272 -192 272
WIRE 80 272 -96 272
WIRE 352 272 336 272
WIRE 352 320 336 320
WIRE 240 384 240 368
WIRE 144 400 144 368
WIRE 192 400 192 368
WIRE 192 400 144 400
WIRE 192 432 192 400
WIRE 192 528 192 512
FLAG -48 224 0
FLAG -192 272 0
FLAG 64 208 0
FLAG 240 384 0
FLAG 192 528 0
SYMBOL voltage -80 272 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10m 100Meg)
SYMBOL LTC6400-20 208 240 R0
WINDOW 3 53 144 Left 2
SYMATTR InstName U1
SYMBOL voltage -48 112 R0
SYMATTR InstName V2
SYMATTR Value 1.5
SYMBOL voltage 192 416 R0
SYMATTR InstName V3
SYMATTR Value -1.5
TEXT 376 448 Left 2 !.tran 100n
* Z:\tmp\asc_dec_bjh7r6w2\1640aeb0b747_4357_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 PWL(0 48 50m 0 100m 48)
V2 N002 0 PWL(0 0 50m 48 100m 0)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 948 1284
WIRE -32 144 -400 144
WIRE -400 160 -400 144
WIRE -400 256 -400 240
WIRE -32 512 -400 512
WIRE -400 528 -400 512
WIRE -400 624 -400 608
SYMBOL voltage -400 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PWL(0 48 50m 0 100m 48)
SYMATTR InstName V1
SYMBOL voltage -400 512 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PWL(0 0 50m 48 100m 0)
SYMATTR InstName V2
FLAG -400 256 0
FLAG -400 624 0
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX14662.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input\nSPI and I2C not included\nOnly one channel modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\MAX14662.asy)
V3 N001 0 3
V2 vIN 0 PULSE(0 2.5 20n 20n 20n 150m 300m)
V1 vA 0 SINE(0 5.5 20)
R1 vB 0 100
XU1 vIN vB vA 0 N001 MAX14662 ;pnba IN)D)S)GND)VCC
C1 vB 0 33p
.tran 1
.lib MAX14662.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 832
WIRE 224 0 224 -16
WIRE 224 144 224 80
WIRE -96 224 -128 224
WIRE 96 224 -16 224
WIRE 128 224 96 224
WIRE 368 224 320 224
WIRE 448 224 368 224
WIRE 560 224 448 224
WIRE 448 256 448 224
WIRE 560 256 560 224
WIRE 80 288 32 288
WIRE 128 288 80 288
WIRE 32 336 32 288
WIRE 448 352 448 336
WIRE 560 352 560 320
WIRE 224 416 224 400
WIRE 32 464 32 416
SYMBOL voltage 32 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 30 177 Left 2
SYMATTR Value PULSE(0 2.5 20n 20n 20n 150m 300m)
SYMATTR InstName V2
SYMBOL voltage 0 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5.5 20)
SYMBOL voltage 224 96 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 3
SYMBOL res 432 240 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL MAX14662 224 272 R0
SYMATTR InstName U1
SYMBOL cap 544 256 R0
SYMATTR InstName C1
SYMATTR Value 33p
FLAG -128 224 0
FLAG 32 464 0
FLAG 448 352 0
FLAG 224 416 0
FLAG 368 224 vB
FLAG 96 224 vA
FLAG 80 288 vIN
FLAG 224 -16 0
FLAG 560 352 0
TEXT 328 440 Left 2 !.tran 1
TEXT -296 -72 Left 2 ;Note:\nSwitch shown for a logic 0 input\nSPI and I2C not included\nOnly one channel modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\3377a09c8343_2941-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2941-1.asy)
R1 N001 N003 10K
V2 N002 0 PULSE(3.9 3.5 1s 10m 10m 1 2)
Vbatt N001 0 3.7
XU2 N001 0 N004 N005 N003 N002 LTC2941-1 B_Reg=60 CD_Reg=32767 EF_Reg=65535 GH_Reg=0 EF_Reg=65535 GH_Reg=0 ;pnba Sense+)GND)StatusReg)ACRreg)_AL/CC)Sense-
.tran 5
.lib LTC2941-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1432 680
WIRE 64 -96 -48 -96
WIRE 832 -96 64 -96
WIRE -48 -80 -48 -96
WIRE 832 -48 832 -96
WIRE -48 16 -48 0
WIRE 64 16 64 -96
WIRE 96 16 64 16
WIRE 576 16 416 16
WIRE 720 16 656 16
WIRE 96 112 80 112
WIRE 832 112 832 32
WIRE 832 112 416 112
WIRE 96 208 80 208
WIRE 432 208 416 208
SYMBOL voltage 560 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value PULSE(3.9 3.5 1s 10m 10m 1 2)
SYMBOL res 816 -64 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -48 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vbatt
SYMATTR Value 3.7
SYMBOL LTC2941-1 256 112 R0
SYMATTR InstName U2
SYMATTR Value B_Reg=60 CD_Reg=32767
FLAG -48 16 0
FLAG 80 112 0
FLAG 720 16 0
TEXT 600 272 Left 2 !.tran 5
* Z:\home\khalils\Downloads\files\data\raw_asc\902661a52717_TransmissionLineInverter.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax. The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors. A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements. One for the normal(differential) mode and\nthe other for the common mode. Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world. These modes\nwith have different propagation speeds and impedances. If both modes\nare modeled, then you can simulate a transmission line inverter.
T1 IN 0 0 OUT Td=50n Z0=50
V1 IN 0 PULSE(0 1 0 1n 1n 10n) Rser=50
T2 0 0 OUT 0 Td=30n Z0=150
.tran 0 500n 0 1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 680
WIRE 128 192 -368 192
WIRE 320 192 224 192
WIRE -368 208 -368 192
WIRE 128 224 64 224
WIRE 288 224 224 224
WIRE 64 272 64 224
WIRE 64 272 16 272
WIRE 288 272 288 224
WIRE 336 272 288 272
WIRE -368 304 -368 288
WIRE 64 304 64 272
WIRE 128 304 64 304
WIRE 288 304 288 272
WIRE 288 304 224 304
WIRE 128 336 64 336
WIRE 288 336 224 336
WIRE 64 368 64 336
WIRE 288 368 288 336
SYMBOL tline 176 320 R0
WINDOW 0 -1 -21 Bottom 2
WINDOW 3 0 21 Top 2
SYMATTR InstName T2
SYMATTR Value Td=30n Z0=150
SYMBOL tline 176 208 R0
WINDOW 0 2 -19 Bottom 2
WINDOW 3 3 20 Top 2
SYMATTR InstName T1
SYMBOL voltage -368 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 56 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1n 1n 10n)
FLAG 64 368 0
FLAG 288 368 0
FLAG -368 304 0
FLAG 16 272 0
FLAG 320 192 0
FLAG -368 192 IN
FLAG 336 272 OUT
TEXT 376 368 Left 2 !.tran 0 500n 0 1n
TEXT 0 408 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT -376 -200 Left 2 ;This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax.  The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors.  A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements.  One for the normal(differential) mode and\nthe other for the common mode.  Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world.  These modes\nwith have different propagation speeds and impedances.  If both modes\nare modeled, then you can simulate a transmission line inverter.
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2164-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2164-1.5.asy)
R5 IN N001 10
R4 N003 0 45.3K
R3 OUT N004 100K
C1 N001 0 100n
V1 IN 0 5
XU1 N001 N003 IN OUT 0 0 N002 IN N001 N001 N004 ADP2164-x.x Rtop=600K Rbot=400K ;pnba Sync)Rt)TRK)FB)GND)PGND)SW)Pvin)Vin)EN)Pgood
L1 N002 OUT 1 Rser=6m
Rload OUT 0 0.5
C3 OUT 0 83 Rser=2m
.tran 2m startup
.lib ADP2164-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 728
WIRE -80 -112 -304 -112
WIRE 176 -112 -80 -112
WIRE 400 -112 176 -112
WIRE -304 -96 -304 -112
WIRE -80 -96 -80 -112
WIRE 176 -80 176 -112
WIRE -304 0 -304 -16
WIRE -160 0 -176 0
WIRE -80 0 -80 -16
WIRE -80 0 -96 0
WIRE 0 0 -80 0
WIRE 400 0 400 -112
WIRE 400 0 352 0
WIRE -80 112 -80 0
WIRE 0 112 -80 112
WIRE 368 112 352 112
WIRE 480 112 448 112
WIRE 544 112 480 112
WIRE 640 112 544 112
WIRE 544 128 544 112
WIRE 640 128 640 112
WIRE -80 224 -80 112
WIRE 0 224 -80 224
WIRE 480 224 480 112
WIRE 480 224 352 224
WIRE 544 224 544 192
WIRE 640 224 640 208
WIRE -96 368 -112 368
WIRE 0 368 -16 368
WIRE 368 368 352 368
WIRE 480 368 480 224
WIRE 480 368 448 368
WIRE 112 496 112 480
WIRE 240 496 240 480
SYMBOL cap 528 128 R0
SYMATTR InstName C3
SYMATTR Value 83
SYMATTR SpiceLine Rser=2m
SYMBOL ADP2164-1.5 176 192 R0
SYMATTR InstName U1
SYMBOL cap -96 16 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL ind 352 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=6m
SYMBOL res -96 -112 R0
SYMATTR InstName R5
SYMATTR Value 10
SYMBOL voltage -304 -112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 624 112 R0
SYMATTR InstName Rload
SYMATTR Value 0.5
SYMBOL res 0 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 45.3K
SYMBOL res 464 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
FLAG 112 496 0
FLAG -112 368 0
FLAG -304 0 0
FLAG 544 224 0
FLAG 640 224 0
FLAG 640 112 OUT
FLAG -304 -112 IN
FLAG 240 496 0
FLAG -176 0 0
TEXT 488 464 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\093e7753b54e_Motor_Driver.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Optos\4N25.asy)
XU1 N004 0 VCC N003 NC_01 4N25 ;pnba A)K)C)E)B
R2 VCC N002 3
V2 N001 0 PULSE(0 3.3 0 0 0 1m 5m)
R5 N003 0 500
R1 N005 0 4
R3 N001 N004 100
V1 VCC 0 5
Q1 N002 N003 N005 0 2N2222
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1
.lib 4N25.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 0 64 0
WIRE 240 0 144 0
WIRE 240 16 240 0
WIRE -112 32 -192 32
WIRE -192 64 -192 32
WIRE -112 64 -112 32
WIRE 240 112 240 96
WIRE 176 160 96 160
WIRE 64 176 64 0
WIRE 128 176 64 176
WIRE 96 208 96 160
WIRE 160 208 96 208
WIRE -112 240 -112 144
WIRE -96 240 -112 240
WIRE 128 240 128 176
WIRE 128 240 96 240
WIRE 240 240 240 208
WIRE 144 304 96 304
WIRE 160 304 160 208
WIRE 160 304 144 304
WIRE 176 304 160 304
WIRE -192 336 -192 144
WIRE -160 336 -192 336
WIRE -96 336 -160 336
WIRE 144 336 144 304
WIRE 240 368 240 320
WIRE 240 368 192 368
WIRE 240 400 240 368
WIRE 192 416 192 368
WIRE 192 416 144 416
SYMBOL res -128 48 R0
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL voltage -192 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 0 0 0 1m 5m)
SYMBOL voltage 464 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL npn 176 112 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL Optos\\4N25 0 304 R0
SYMATTR InstName U1
SYMBOL res 224 224 R0
SYMATTR InstName R1
SYMATTR Value 4
SYMBOL res 224 0 R0
SYMATTR InstName R2
SYMATTR Value 3
SYMBOL res 128 320 R0
SYMATTR InstName R5
SYMATTR Value 500
FLAG 240 400 0
FLAG 464 96 0
FLAG 144 0 VCC
FLAG 464 16 VCC
FLAG -160 336 0
TEXT -226 426 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\16eebf081216_Assignment_Simple_Resistive_Voltage_Divider.asc
* Generated by LTspice 26.0.1 for Windows.
R2 OUT 0 1k
R1 OUT IN 1k
V1 IN 0 10
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 16 128 -16 128
WIRE 64 128 16 128
WIRE 192 128 144 128
WIRE 224 128 192 128
WIRE 224 192 224 128
WIRE -16 208 -16 128
WIRE -16 368 -16 288
WIRE 224 368 224 272
WIRE 224 368 -16 368
WIRE -16 400 -16 368
SYMBOL voltage -16 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 208 176 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 160 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG -16 400 0
FLAG 16 128 IN
FLAG 192 128 OUT
TEXT -48 424 Left 2 !.tran 100m