Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\045c1b8831fc_circuit1.asc
* Generated by LTspice 26.0.1 for Windows.
R3 0 N002 20k
R2 0 N002 10k
V1 N001 0 10
R1 N002 N001 5.1k
V2 0 N003 8
R4 N002 N003 15k
.tran .1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -64 48 -160 48
WIRE 112 48 16 48
WIRE 352 48 112 48
WIRE 432 48 352 48
WIRE 608 48 512 48
WIRE -160 144 -160 48
WIRE 608 144 608 48
WIRE 112 160 112 48
WIRE 352 160 352 48
WIRE -160 336 -160 224
WIRE 112 336 112 240
WIRE 112 336 -160 336
WIRE 240 336 112 336
WIRE 352 336 352 240
WIRE 352 336 240 336
WIRE 608 336 608 224
WIRE 608 336 352 336
SYMBOL res 32 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5.1k
SYMBOL voltage 608 240 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 8
SYMBOL voltage -160 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 368 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 20k
SYMBOL res 128 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 416 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 15k
FLAG 240 336 0
TEXT -544 144 Left 2 !.tran .1
* Z:\home\khalils\Downloads\files\data\raw_asc\f6776dbda8eb_ethanfirsttry.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
R3 0 N004 R
R4 0 N001 R
R1 N004 N002 R
XU1 N004 N003 NC_01 0 N001 LT1001 ;pnba In+)In-)V+)V-)OUT
V1 N002 0 V
R2 N003 N002 R
R5 N003 N001 R
.fra
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 608 -288 512 -288
WIRE 208 -144 144 -144
WIRE 432 -144 432 -288
WIRE 432 -144 288 -144
WIRE 464 -144 432 -144
WIRE 464 -112 464 -144
WIRE 496 -112 464 -112
WIRE 608 -96 608 -288
WIRE 608 -96 560 -96
WIRE 144 -32 144 -144
WIRE 208 -32 144 -32
WIRE 384 -32 288 -32
WIRE 496 -32 496 -80
WIRE 496 -32 384 -32
WIRE 144 48 144 -32
WIRE 384 48 384 -32
WIRE 608 48 608 -96
WIRE 256 128 144 128
WIRE 384 128 256 128
WIRE 608 128 384 128
WIRE 256 240 256 128
SYMBOL OpAmps\\OP07 528 -160 R0
SYMATTR InstName U1
SYMBOL res 400 144 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMBOL res 416 -272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMBOL res 304 -160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMBOL voltage 144 32 R0
SYMATTR InstName V1
SYMBOL res 624 144 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMBOL res 304 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
FLAG 256 240 0
FLAG 528 -64 0
FLAG 0 0 0
TEXT 104 264 Left 2 !.fra
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7158-2.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7158-2.0.asy)
XU1 OUT MP_01 OUT N002 N001 N003 N003 N004 IN 0 ADP7158_9 Vreg=2.611 Vref=2.016 ;pnba Vout))Vout_Sense)Byp)EN)Ref_Sense)Ref)Vreg)Vin)GND
C4 N002 0 1
C2 N003 0 1
V1 IN 0 3.0
C3 N004 0 1
R1 IN N001 100K
Rload OUT 0 2.0
C1 OUT 0 10
.tran 5m startup
.lib ADP7158_9.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -144 32
WIRE 80 32 -32 32
WIRE 416 32 400 32
WIRE 464 32 416 32
WIRE 560 32 464 32
WIRE -144 48 -144 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE 416 128 416 32
WIRE 416 128 400 128
WIRE -144 144 -144 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE 80 224 64 224
WIRE 416 224 400 224
WIRE 464 224 416 224
WIRE 464 240 464 224
WIRE 0 320 -16 320
WIRE 80 320 64 320
WIRE 416 320 416 224
WIRE 416 320 400 320
WIRE 464 320 464 304
WIRE 240 400 240 384
SYMBOL ADP7158-2.0 240 176 R0
SYMATTR InstName U1
SYMBOL cap 448 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage -144 32 R0
SYMATTR InstName V1
SYMATTR Value 3.0
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 64 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 448 240 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 544 32 R0
SYMATTR InstName Rload
SYMATTR Value 2.0
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
FLAG 240 400 0
FLAG 464 320 0
FLAG 464 144 0
FLAG -16 320 0
FLAG 0 224 0
FLAG -144 144 0
FLAG 560 144 0
FLAG -144 32 IN
FLAG 560 32 OUT
TEXT 504 368 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1555c9ae9d88_Prob_4c2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 0 Vgs 0.9
V2 0 Vds 1.8V
M1 Vds Vgs 0 0 pch_tt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.dc V2 0 1.8 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 144 -32 144
WIRE -32 160 -32 144
WIRE -32 160 -176 160
WIRE -176 176 -176 160
WIRE -32 176 -32 160
WIRE -352 256 -384 256
WIRE -224 256 -352 256
WIRE -352 272 -352 256
WIRE -176 288 -176 272
WIRE -32 288 -32 256
WIRE -352 368 -352 352
IOPIN -384 256 In
IOPIN 0 144 Out
SYMBOL pmos -224 176 R0
SYMATTR InstName M1
SYMATTR Value pch_tt
SYMBOL voltage -352 368 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0.9
SYMBOL voltage -32 272 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.8V
FLAG -352 368 0
FLAG -176 288 0
FLAG -32 288 0
FLAG -384 256 Vgs
FLAG 0 144 Vds
TEXT -464 184 Left 2 !.include TSMC180.lib
TEXT -464 216 Left 2 !.dc V2 0 1.8 0.01
* Z:\tmp\asc_dec_bjh7r6w2\0ea635167fa3_LED_strip_drive_push-pull_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V1 PWM 0 PULSE(0 5 .2m 1n 1n 0.05m .1m)
Q3 N005 N004 N002 0 2N2907
R1 N003 PWM 47k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE 256 -32 256 -128
WIRE 288 -32 256 -32
WIRE 256 0 256 -32
WIRE 512 32 512 0
WIRE 752 32 512 32
WIRE 32 48 -64 48
WIRE 192 48 112 48
WIRE 400 48 400 -112
WIRE 432 48 432 -48
WIRE 432 48 400 48
WIRE 512 64 512 32
WIRE -64 96 -64 48
WIRE 432 112 432 48
WIRE 448 112 432 112
WIRE 256 192 256 96
WIRE 352 192 352 16
WIRE 352 192 256 192
WIRE 512 192 512 160
WIRE 768 192 512 192
WIRE -64 224 -64 176
WIRE 256 224 256 192
SYMBOL voltage -64 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 .2m 1n 1n 0.05m .1m)
SYMBOL pnp 448 160 M180
SYMATTR InstName Q3
SYMATTR Value 2N2907
SYMBOL res 128 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 47k
FLAG -64 224 0
FLAG 256 224 0
FLAG 0 -96 0
FLAG -64 48 PWM
* Z:\home\khalils\Downloads\files\data\raw_asc\19640942f36d_6011.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6011.asy)
R2 N001 0 1K
V3 N003 0 SINE(0 1 1K)
V1 +V 0 10
XU1 N003 N001 N002 +V -V LT6011 ;pnba IN+)IN-)OUT)VCC)VEE
R1 N002 N001 1K
V2 -V 0 -10
.tran 3m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -112 48 -128 48
WIRE 0 48 -32 48
WIRE 96 48 0 48
WIRE 208 48 176 48
WIRE 64 112 64 96
WIRE -416 160 -416 144
WIRE -288 160 -288 144
WIRE 0 160 0 48
WIRE 32 160 0 160
WIRE 208 192 208 48
WIRE 208 192 176 192
WIRE 32 224 -160 224
WIRE -160 240 -160 224
WIRE -416 256 -416 240
WIRE -288 256 -288 240
WIRE 64 288 64 272
WIRE -160 336 -160 320
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res -16 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -416 144 R0
SYMATTR InstName V2
SYMATTR Value -10
SYMBOL opamps\\LT6011 64 192 R0
SYMATTR InstName U1
SYMBOL res 192 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -160 224 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
FLAG -288 256 0
FLAG 64 96 +V
FLAG -288 144 +V
FLAG 64 288 -V
FLAG -416 256 0
FLAG -416 144 -V
FLAG -128 48 0
FLAG -160 336 0
TEXT 144 360 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8074.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8074.asy)
XU1 MP_01 OUT MP_02 N005 NC_03 N003 N004 N002 IN N001 0 LTM8074 ;pnba )Vout))Rt)Sync)FB)TR/SS)PG)Vin)EN/UV)GND
R1 0 N003 76.8K
C7 N004 0 .002
C10 OUT 0 4.7 Rser=3m
R5 IN N001 1Meg
R3 N005 0 18.2K
R6 OUT 0 2.75
V1 IN 0 12
R4 OUT N002 100K
C11 OUT 0 47 Rser=8m
.tran 1m startup
.lib LTM8074.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1652 1516
WIRE -48 672 -144 672
WIRE 64 672 -48 672
WIRE 416 672 352 672
WIRE 528 672 416 672
WIRE 624 672 528 672
WIRE 736 672 624 672
WIRE -144 688 -144 672
WIRE 416 688 416 672
WIRE 528 688 528 672
WIRE 624 688 624 672
WIRE 736 688 736 672
WIRE -48 768 -48 672
WIRE -32 768 -48 768
WIRE 64 768 48 768
WIRE -144 784 -144 768
WIRE 528 784 528 752
WIRE 624 784 624 752
WIRE 736 784 736 768
WIRE 416 800 416 768
WIRE 416 800 352 800
WIRE 384 928 352 928
WIRE 496 928 464 928
WIRE -32 960 -48 960
WIRE 64 960 32 960
WIRE -32 1056 -48 1056
WIRE 64 1056 48 1056
WIRE 384 1056 352 1056
SYMBOL res -48 784 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL voltage -144 672 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 32 944 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C7
SYMATTR Value .002
SYMBOL res 64 1040 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 18.2K
SYMBOL res 480 912 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 76.8K
SYMBOL res 400 672 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL cap 512 688 R0
SYMATTR InstName C10
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=3m
SYMBOL LTM8074 208 864 R0
SYMATTR InstName U1
SYMBOL res 720 672 R0
SYMATTR InstName R6
SYMATTR Value 2.75
SYMBOL cap 608 688 R0
SYMATTR InstName C11
SYMATTR Value 47
SYMATTR SpiceLine Rser=8m
FLAG 736 672 OUT
FLAG -144 672 IN
FLAG 496 928 0
FLAG -48 1056 0
FLAG -48 960 0
FLAG -144 784 0
FLAG 528 784 0
FLAG 624 784 0
FLAG 736 784 0
FLAG 384 1056 0
TEXT 376 1152 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1c948790554a_1004-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1004-2.5.asy)
XU1 OUT 0 LT1004-2.5 ;pnba VOUT)GND
V1 N001 0 PULSE(0 5 100u 10n 10n 500u 1)
R1 OUT N001 24K
.tran 700u
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 980 680
WIRE 96 112 -144 112
WIRE 368 112 176 112
WIRE -144 128 -144 112
WIRE 368 128 368 112
WIRE 368 208 368 192
WIRE -144 224 -144 208
SYMBOL voltage -144 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 100u 10n 10n 500u 1)
SYMBOL res 192 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 24K
SYMBOL LT1004-2.5 368 160 R0
SYMATTR InstName U1
FLAG 368 208 0
FLAG -144 224 0
FLAG 368 112 OUT
TEXT 384 304 Left 2 !.tran 700u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1109-12.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1109-12.asy)
L1 IN N001 33 Rser=0.02 Rpar=5000
V1 IN 0 5 Rser=0.1
Rload OUT 0 200
C1 OUT 0 22 Rser=0.02
XU1 IN MP_01 N001 0 MP_02 MP_03 N002 OUT LT1109 top=250K bot=29K ;pnba Vin))SW)GND)))_SDN)Sense
D1 N001 OUT MBRS140
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m startup
.lib LT1109.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2376 1416
WIRE 1520 944 1328 944
WIRE 1584 944 1520 944
WIRE 1696 944 1664 944
WIRE 1728 944 1696 944
WIRE 1840 944 1792 944
WIRE 1888 944 1840 944
WIRE 1328 960 1328 944
WIRE 1888 960 1888 944
WIRE 1520 1008 1520 944
WIRE 1328 1056 1328 1040
WIRE 1888 1056 1888 1040
WIRE 1696 1072 1696 944
WIRE 1696 1072 1648 1072
WIRE 1392 1104 1376 1104
WIRE 1840 1136 1840 944
WIRE 1840 1136 1648 1136
WIRE 1840 1152 1840 1136
WIRE 1840 1232 1840 1216
WIRE 1520 1248 1520 1200
SYMBOL PowerProducts\\LT1109-12 1520 1088 R0
SYMATTR InstName U1
SYMBOL schottky 1728 960 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL res 1872 944 R0
SYMATTR InstName Rload
SYMATTR Value 200
SYMBOL POLCAP 1824 1152 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine Rser=0.02
SYMBOL VOLTAGE 1328 944 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMATTR SpiceLine Rser=0.1
SYMBOL IND 1568 960 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02 Rpar=5000
FLAG 1888 944 OUT
FLAG 1840 1232 0
FLAG 1888 1056 0
FLAG 1328 1056 0
FLAG 1520 1248 0
FLAG 1328 944 IN
TEXT 1608 1272 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0093fb0b0dba_sch1.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 0 D
R1 N001 0 {Rsh}
B1 N001 0 I=v(illu)/1000*Iph
V1 illu 0 1000
I2 v+ 0 PULSE(0 1 0 1 1)
R3 illu 0 100Meg
R2 v+ N001 {Rs}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1472 680
WIRE 288 48 80 48
WIRE 464 48 288 48
WIRE 592 48 464 48
WIRE 848 48 672 48
WIRE 1248 96 1248 64
WIRE 80 112 80 48
WIRE 288 112 288 48
WIRE 464 112 464 48
WIRE 1248 208 1248 176
WIRE 80 256 80 192
WIRE 288 256 288 176
WIRE 288 256 80 256
WIRE 464 256 464 192
WIRE 464 256 288 256
WIRE 688 256 464 256
WIRE 848 256 688 256
WIRE 688 288 688 256
WIRE 928 288 688 288
WIRE 928 320 928 288
WIRE 240 448 176 448
WIRE -272 480 -272 448
WIRE 240 496 240 448
WIRE -272 624 -272 560
WIRE 240 624 240 576
SYMBOL current 1248 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I2
SYMATTR Value PULSE(0 1 0 1 1)
SYMBOL res 224 480 R0
SYMATTR InstName R3
SYMATTR Value 100Meg
SYMBOL res 688 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {Rs}
SYMBOL bi 80 112 R0
WINDOW 3 -12 83 Right 2
SYMATTR InstName B1
SYMATTR Value I=v(illu)/1000*Iph
SYMBOL voltage -272 464 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1000
SYMBOL res 448 96 R0
SYMATTR InstName R1
SYMATTR Value {Rsh}
SYMBOL diode 272 112 R0
SYMATTR InstName D1
FLAG 928 320 0
FLAG 240 624 0
FLAG 176 448 illu
FLAG 848 48 v+
FLAG 848 256 v-
FLAG -272 624 0
FLAG -272 448 illu
FLAG 1248 208 0
FLAG 1248 64 v+
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP122-2.85.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5.5
C2 OUT 0 1
Rload OUT 0 100
C1 IN 0 1
XU1 OUT MP_01 0 IN MP_02 IN ADP122 K=1/5700 ;pnba Vout))GND)En))Vin
.tran 10m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP122-2.85.asy)
.lib ADP122.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ADP122-2.85 256 208 R0
SYMATTR InstName U1
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1222.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1222.asy)
XU1 N003 N002 N001 -V 0 +V ADG1222 ;pnba IN)D)S)Vss)GND)Vdd
V2 -V 0 -15
V1 +V 0 15
C1 N002 0 35p
R1 N002 0 300
V4 N003 0 pulse(0 3.3 0 1u 1u 5m 10m)
V3 N001 0 10
.tran 30m
.lib ADG1222.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -112 -128 -112 -144
WIRE -464 -48 -464 -64
WIRE -336 -48 -368 -48
WIRE -208 -48 -256 -48
WIRE 48 -48 -16 -48
WIRE 144 -48 48 -48
WIRE 48 -16 48 -48
WIRE 144 0 144 -48
WIRE -208 16 -336 16
WIRE -464 48 -464 32
WIRE 48 80 48 64
WIRE 144 80 144 64
WIRE -336 96 -336 16
WIRE -464 144 -464 128
WIRE -176 144 -176 128
WIRE -48 144 -48 128
WIRE -464 240 -464 224
WIRE -336 240 -336 176
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL voltage -336 80 R0
WINDOW 3 19 116 Left 2
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMATTR InstName V4
SYMBOL voltage -240 -48 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL voltage -464 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL ADG1222 -112 0 R0
SYMATTR InstName U1
SYMBOL cap 128 0 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL voltage -464 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
FLAG -464 240 0
FLAG -464 48 0
FLAG -464 -64 +V
FLAG -464 128 -V
FLAG -368 -48 0
FLAG -176 144 -V
FLAG -112 -144 +V
FLAG -48 144 0
FLAG -336 240 0
FLAG 48 80 0
FLAG 144 80 0
TEXT 40 232 Left 2 !.tran 30m
* Z:\tmp\asc_dec_bjh7r6w2\114701754178_BC548_Teste1_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N001 N003 5
R5 N002 N005 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 0 -288 0
WIRE 416 64 416 0
WIRE 592 144 416 144
WIRE -288 256 -288 80
WIRE 416 336 416 240
WIRE 592 336 592 224
SYMBOL Misc\\signal -288 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 576 128 R0
SYMATTR InstName R5
SYMATTR Value 10k
* Z:\tmp\asc_dec_bjh7r6w2\0e5725ea9fe0_Diodo-Ceifador-LTSpice_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 SINE(0 10 60)
V2 N002 N001 3V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 -144 -16 -192
WIRE 448 -144 -16 -144
WIRE -16 -128 -16 -144
WIRE 64 32 -16 32
WIRE 304 32 144 32
WIRE -16 96 -16 32
WIRE -16 224 -16 176
WIRE 448 224 -16 224
WIRE -16 240 -16 224
SYMBOL voltage -16 80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -71 33 Left 2
WINDOW 3 -181 71 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10 60)
SYMBOL voltage 160 32 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 65 65 VRight 2
WINDOW 3 43 67 VRight 2
SYMATTR InstName V2
SYMATTR Value 3V
FLAG -16 240 0
FLAG -16 -128 0
* Z:\tmp\asc_dec_bjh7r6w2\06393ae9987f_1630_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V3 IN 0 5 AC 1
R1 N002 N001 2.32K
C2 N001 0 220p
XU1 N005 N003 +V 0 N002 LT1630 ;pnba In+)In-)V+)V-)OUT
R3 N001 IN 2.32K
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1630.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1020 680
WIRE 256 96 144 96
WIRE 416 96 336 96
WIRE -160 160 -160 144
WIRE 48 160 -32 160
WIRE 144 160 144 96
WIRE 144 160 128 160
WIRE 192 160 144 160
WIRE 288 160 272 160
WIRE 320 160 288 160
WIRE 416 160 416 96
WIRE 416 160 384 160
WIRE 464 160 416 160
WIRE 576 160 544 160
WIRE -32 176 -32 160
WIRE 144 176 144 160
WIRE -160 256 -160 240
WIRE 144 256 144 240
WIRE 352 256 352 240
WIRE -32 272 -32 256
WIRE 288 272 288 160
WIRE 320 272 288 272
WIRE 416 288 416 160
WIRE 416 288 384 288
WIRE 320 304 288 304
WIRE 352 336 352 320
WIRE 288 368 288 304
WIRE 512 368 288 368
WIRE 720 368 512 368
WIRE 512 384 512 368
SYMBOL voltage -32 160 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 352 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2.32K
SYMBOL cap 128 176 R0
SYMATTR InstName C2
SYMATTR Value 220p
SYMBOL opamps\\LT1630 352 224 R0
SYMATTR InstName U1
SYMBOL res 144 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2.32K
FLAG -160 256 0
FLAG 352 240 +V
FLAG -160 144 +V
FLAG 352 336 0
FLAG 144 256 0
FLAG -32 272 0
FLAG -32 160 IN
* Z:\home\khalils\Downloads\files\data\raw_asc\180cfac0f3b6_Fig_4-29_STEP-regend.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 OUT {R}
V1 N001 0 PULSE( 0 1 0.5m 1n 1n 2m 5m)
C1 OUT 0 {C}
.tran 10m
.STEP param R 4k 6k 1k
.STEP param C list 22n 33n 47n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 80 32 80
WIRE 272 80 224 80
WIRE 304 80 272 80
WIRE 32 112 32 80
WIRE 304 112 304 80
WIRE 32 224 32 192
WIRE 304 224 304 176
SYMBOL res 128 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value {R}
SYMBOL cap 288 112 R0
SYMATTR InstName C1
SYMATTR Value {C}
SYMBOL voltage 32 96 R0
WINDOW 3 -4 160 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE( 0 1 0.5m 1n 1n 2m 5m)
FLAG 32 224 0
FLAG 272 80 OUT
FLAG 304 224 0
TEXT 16 32 Left 2 !.tran 10m
TEXT 24 288 Left 2 !.STEP param R 4k 6k 1k\n.STEP param C list 22n 33n 47n
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1782.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Supply Rail Current Sense
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1782.asy)
Q1 N001 N004 OUT 0 2N3904
I1 N002 0 SINE(1 1 1K)
R3 N003 N002 200
V1 +V 0 10
R1 +V N002 .2
XU1 N001 N003 +V 0 N004 NC_01 LT1782 ;pnba In+)In-)V+)V-)OUT)SHDN
R4 OUT 0 2K
R2 N001 +V 200
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -32 32 -32 16
WIRE 0 32 -32 32
WIRE 128 32 80 32
WIRE 400 32 128 32
WIRE -32 64 -32 32
WIRE -192 112 -192 96
WIRE 192 112 192 96
WIRE 400 144 400 32
WIRE -32 160 -32 144
WIRE 16 160 -32 160
WIRE 160 160 96 160
WIRE 336 192 304 192
WIRE -192 208 -192 192
WIRE 128 224 128 32
WIRE 160 224 128 224
WIRE -32 240 -32 160
WIRE 400 256 400 240
WIRE 448 256 400 256
WIRE 400 272 400 256
WIRE 192 288 192 272
WIRE -32 336 -32 320
WIRE 400 368 400 352
SYMBOL res -48 48 R0
SYMATTR InstName R1
SYMATTR Value .2
SYMBOL voltage -192 96 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 96 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL npn 336 144 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL current -32 240 R0
SYMATTR InstName I1
SYMATTR Value SINE(1 1 1K)
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 200
SYMBOL res 384 256 R0
SYMATTR InstName R4
SYMATTR Value 2K
SYMBOL opamps\\LT1782 192 192 R0
SYMATTR InstName U1
FLAG -192 208 0
FLAG 192 96 +V
FLAG -192 96 +V
FLAG 192 288 0
FLAG 400 368 0
FLAG -32 336 0
FLAG -32 16 +V
FLAG 448 256 OUT
TEXT 488 320 Left 2 !.tran 3m
TEXT 184 -24 Bottom 2 ;Positive Supply Rail Current Sense