Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\3e897243c102_zero_gain_ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
* Zero Gain Amplifier
Q1 2_+ 2+ 0 0 2N3904
R2 2+ 2_+ 47
R1 W1 2+ 2.2k
V1 W1 0 PWL REPEAT FOREVER (0 0 0.5m 3 1m 0) ENDREPEAT
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -224 208 -272
WIRE 208 -224 128 -224
WIRE -240 -176 -240 -224
WIRE 208 -176 208 -224
WIRE -240 -48 -240 -96
WIRE 208 -48 208 -96
WIRE 208 -48 96 -48
WIRE 208 -32 208 -48
WIRE 288 -32 208 -32
WIRE 208 -16 208 -32
WIRE 208 80 208 64
WIRE 288 80 208 80
WIRE 208 112 208 80
WIRE 96 160 96 -48
WIRE 144 160 96 160
WIRE 208 288 208 208
IOPIN 128 -224 In
IOPIN -240 -224 In
IOPIN 208 -272 In
IOPIN 288 -32 In
IOPIN 288 80 In
SYMBOL res 192 -192 R0
SYMATTR InstName R1
SYMATTR Value 2.2k
SYMBOL npn 144 112 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage -240 -192 R0
WINDOW 3 -455 192 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PWL REPEAT FOREVER (0 0 0.5m 3 1m 0) ENDREPEAT
SYMATTR InstName V1
SYMBOL res 192 -32 R0
SYMATTR InstName R2
SYMATTR Value 47
FLAG 208 288 0
FLAG 128 -224 W1
FLAG -240 -48 0
FLAG -240 -224 W1
FLAG 208 -272 1+
FLAG 288 -32 2+
FLAG 288 80 2_+
TEXT -136 296 Left 2 !.tran 10m
TEXT -32 -416 Left 2 ;Zero Gain Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4645.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4645.asy)
C1 N005 0 1n
C3 OUT N004 47p
XU1 IN IN 0 OUT N005 IN OUT N004 NC_01 0 N003 N003 MP_02 NC_03 NC_04 NC_05 N001 MP_06 MP_07 MP_08 0 MP_09 MP_10 MP_11 MP_12 MP_13 MP_14 MP_15 MP_16 NC_17 N002 NC_18 NC_19 N001 LTM4645 ;pnba Vin)SVin)Vosns-)Vout)TK/SS)HiZB)Vosns+)VFB)Run)SGND)CompA)CompB))PGood)PWM)SW)DrVcc))))PGND)))))))))PhaseMD)Freq)Mode/PLLIN)Clkout)IntVcc
Rload OUT 0 40.2m
V1 IN 0 12
R3 N004 0 90.6K
C2 OUT 0 100 Rser=3m x10
R1 N002 0 43.2K
C4 N001 0 4.7
.tran 1m startup
.lib LTM4645.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1044 680
WIRE -272 -176 -288 -176
WIRE 16 -176 -272 -176
WIRE 144 -176 16 -176
WIRE 272 -176 144 -176
WIRE 544 -176 400 -176
WIRE -288 -160 -288 -176
WIRE 16 -144 16 -176
WIRE 144 -144 144 -176
WIRE 272 -144 272 -176
WIRE 400 -144 400 -176
WIRE -80 -80 -192 -80
WIRE 544 -80 544 -176
WIRE 544 -80 496 -80
WIRE -288 -64 -288 -80
WIRE -192 -64 -192 -80
WIRE 544 -64 544 -80
WIRE 544 16 544 0
WIRE -192 32 -192 16
WIRE 528 208 496 208
WIRE 592 208 528 208
WIRE 704 208 592 208
WIRE 832 208 704 208
WIRE 848 208 832 208
WIRE 704 224 704 208
WIRE 848 224 848 208
WIRE 592 272 592 208
WIRE -80 304 -96 304
WIRE 528 304 528 208
WIRE 528 304 496 304
WIRE 704 336 704 288
WIRE 848 336 848 304
WIRE -96 400 -96 304
WIRE -80 400 -96 400
WIRE 592 400 592 336
WIRE 592 400 496 400
WIRE 592 416 592 400
WIRE -160 496 -176 496
WIRE -80 496 -96 496
WIRE 512 496 496 496
WIRE 512 512 512 496
WIRE 592 512 592 496
WIRE 592 512 512 512
WIRE 592 528 592 512
WIRE 144 576 144 560
WIRE 272 576 272 560
SYMBOL cap -96 480 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL cap 576 272 R0
SYMATTR InstName C3
SYMATTR Value 47p
SYMBOL voltage -288 -176 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 528 -64 R0
SYMATTR InstName C4
SYMATTR Value 4.7
SYMBOL PowerProducts\\LTM4645 224 208 R0
SYMATTR InstName U1
SYMBOL res -208 -80 R0
SYMATTR InstName R1
SYMATTR Value 43.2K
SYMBOL res 576 400 R0
SYMATTR InstName R3
SYMATTR Value 90.6K
SYMBOL res 832 208 R0
SYMATTR InstName Rload
SYMATTR Value 40.2m
SYMBOL cap 688 224 R0
WINDOW 39 33 91 Left 2
WINDOW 3 40 38 Left 2
WINDOW 123 29 64 Left 2
SYMATTR SpiceLine x10
SYMATTR Value 100
SYMATTR InstName C2
SYMATTR Value2 Rser=3m
FLAG -288 -64 0
FLAG -192 32 0
FLAG -176 496 0
FLAG 144 576 0
FLAG 272 576 0
FLAG 704 336 0
FLAG 848 336 0
FLAG 592 528 0
FLAG 544 16 0
FLAG 832 208 OUT
FLAG -272 -176 IN
TEXT 680 552 Left 2 !.tran 1m startup
* Z:\tmp\asc_dec_bjh7r6w2\05df4343e063_sigma_delta_dual_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N004 in 10k
R4 0 N003 10k
C1 N005 N004 1n
V2 Vee 0 -5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 680
WIRE 960 80 640 80
WIRE 576 96 112 96
WIRE 784 112 640 112
WIRE 784 160 784 112
WIRE 880 160 864 160
WIRE 880 176 880 160
WIRE 112 224 112 96
WIRE 176 224 112 224
WIRE 288 224 256 224
WIRE 320 224 288 224
WIRE 480 224 384 224
WIRE 928 272 816 272
WIRE 816 304 816 272
WIRE 144 320 112 320
WIRE 176 320 144 320
WIRE 288 320 288 224
WIRE 288 320 256 320
WIRE 352 320 288 320
WIRE 480 336 480 224
WIRE 480 336 416 336
WIRE 560 336 480 336
WIRE 352 352 336 352
WIRE 736 352 624 352
WIRE 960 352 960 80
WIRE 112 368 112 320
WIRE 560 368 528 368
WIRE 336 400 336 352
WIRE 528 400 528 368
WIRE 736 400 672 400
WIRE 928 464 928 272
WIRE 672 528 672 400
SYMBOL res 272 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 880 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL cap 384 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL voltage 496 512 R0
SYMATTR InstName V2
SYMATTR Value -5
FLAG 384 368 Vee
FLAG 496 528 Vee
FLAG 400 528 Vcc
FLAG 384 304 Vcc
FLAG 496 608 0
FLAG 400 608 0
FLAG 704 160 Vcc
FLAG 880 176 0
FLAG 528 400 0
FLAG 672 608 0
FLAG 112 448 0
FLAG 336 400 0
FLAG 592 320 Vee
FLAG 144 320 in
FLAG 592 384 Vcc
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1794.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
R1 N002 N001 10K
R2 N001 0 1K
V3 N003 0 SINE(0 .1 1Meg)
XU1 N003 N001 +V -V N002 +V 0 LT1794 ;pnba In+)In-)V+)V-)OUT)S)SR
.tran 3u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1794.asy)
.lib LT1794.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2336 1256
WIRE 960 -176 960 -192
WIRE 1056 -176 1056 -192
WIRE 1296 -176 1280 -176
WIRE 1392 -176 1376 -176
WIRE 1408 -176 1392 -176
WIRE 1520 -176 1488 -176
WIRE 960 -80 960 -96
WIRE 1056 -80 1056 -96
WIRE 1392 -48 1392 -176
WIRE 1408 -48 1392 -48
WIRE 1520 -32 1520 -176
WIRE 1520 -32 1488 -32
WIRE 1408 -16 1136 -16
WIRE 1136 0 1136 -16
WIRE 1424 32 1424 16
WIRE 1424 32 1392 32
WIRE 1440 32 1440 16
WIRE 1456 32 1456 16
WIRE 1488 32 1456 32
WIRE 1488 64 1488 32
WIRE 1392 80 1392 32
WIRE 1136 96 1136 80
FLAG 960 -80 0
FLAG 1056 -80 0
FLAG 1440 -80 +V
FLAG 960 -192 +V
FLAG 1056 -192 -V
FLAG 1440 32 -V
FLAG 1280 -176 0
FLAG 1136 96 0
FLAG 1488 64 0
FLAG 1392 80 +V
SYMBOL voltage 960 -192 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 1056 -192 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 1504 -192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 1392 -192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 1136 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 .1 1Meg)
SYMBOL LT1794 1440 -32 R0
SYMATTR InstName U1
TEXT 1504 144 Left 2 !.tran 3u
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5766.asc
* Generated by LTspice 26.0.1 for Windows.
* Dither with 0.125V offset and amplitude\nRange is one of {1,2,...,8}\ndither_scale is one of {0,1,2,3}\ndither_inv is one of {0,1}
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5766.asy)
V3 IN 0 PWL(0 0 100u 0 +1u 0.625 +100u 0.625 +1u 1.25 +100u 1.25 +1u 1.875 +100u 1.875 +1u 2.5)
V5 N002 0 SINE(0.125 0.125 30k)
XU2 IN N002 N001 N003 OUT 0 AD5766 Range=8 dither_scale=0 dither_inv=0 ;pnba Vdac)NO)AVdd)AVss)Vout)GND
I1 OUT 0 100
V2 N003 0 -25
V1 N001 0 25
.tran 1m
.lib AD5766.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1520
WIRE 656 400 128 400
WIRE 128 480 128 400
WIRE -224 560 -768 560
WIRE -64 560 -224 560
WIRE -768 592 -768 560
WIRE 400 624 304 624
WIRE 656 672 656 400
WIRE 400 688 400 624
WIRE -64 704 -672 704
WIRE -672 736 -672 704
WIRE 128 832 128 768
WIRE -768 960 -768 672
WIRE -672 960 -672 816
WIRE -672 960 -768 960
WIRE 16 960 16 768
WIRE 16 960 -672 960
WIRE 128 960 128 912
WIRE 128 960 16 960
WIRE 400 960 400 768
WIRE 400 960 128 960
WIRE 656 960 656 752
WIRE 656 960 400 960
SYMBOL voltage -672 720 R0
WINDOW 0 -32 56 VBottom 2
WINDOW 3 123 84 Top 1
WINDOW 123 63 42 VTop 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value SINE(0.125 0.125 30k)
SYMBOL voltage -768 576 R0
WINDOW 0 -32 56 VBottom 2
WINDOW 3 377 87 Top 1
WINDOW 123 63 42 VTop 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PWL(0 0 100u 0 +1u 0.625 +100u 0.625 +1u 1.25 +100u 1.25 +1u 1.875 +100u 1.875 +1u 2.5)
SYMBOL current 400 688 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 100
SYMBOL voltage 128 816 R0
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -25
SYMBOL voltage 656 656 R0
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 25
SYMBOL AD5766 96 624 R0
SYMATTR InstName U2
FLAG -224 560 IN
FLAG -768 960 0
FLAG 400 624 OUT
TEXT -64 416 Left 2 !.tran 1m
TEXT -344 792 Left 2 ;Dither with 0.125V offset and amplitude\nRange is one of {1,2,...,8}\ndither_scale is one of {0,1,2,3}\ndither_inv is one of {0,1}
* Z:\home\khalils\Downloads\files\data\raw_asc\ba2c0dca089b_BJT-for-simple-current-regulation.asc
* Generated by LTspice 26.0.1 for Windows.
* Adjusting the potentiometer, the current through R1 is (approximately)\nlinearly regulated.
* Sizing: \n \nAssume BJT works in saturation -> Vce = 0.3. On the load the voltage drop is 4.7V,\nAssume the load draws 100 mA.\n \nBase current for the polarization is Ic/hfe. Assuming a hfe of 100 the required base\ncurrent is 100ma/100 = 1mA\n \nVbe is fixed at 0.8 V (PN junction). I set R2 so as to have exactly 1 mA of base current\ni.e. R2 = 4.2/0.001 = 4.2k
* BJT for simple current regulation
V1 Vin 0 5
RPot Vin N002 {10k*x}
RPotenziometro N002 0 {10k*(1-x)}
R2 N003 N002 4.2k
R1 Vin N001 47
Q1 N001 N003 0 0 2N3904
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.step param x 1n 0.99 0.5
.tran 1s
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1704 680
WIRE -16 16 -16 0
WIRE 272 64 272 32
WIRE 80 80 80 48
WIRE 272 176 272 144
WIRE 80 224 80 160
WIRE 112 224 80 224
WIRE 208 224 192 224
WIRE 272 288 272 272
WIRE 80 304 80 224
SYMBOL res 256 48 R0
SYMATTR InstName R1
SYMATTR Value 47
SYMBOL res 64 64 R0
SYMATTR InstName Pot
SYMATTR Value {10k*x}
SYMBOL npn 208 176 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 64 288 R0
SYMATTR InstName Potenziometro
SYMATTR Value {10k*(1-x)}
SYMBOL voltage -16 0 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 208 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.2k
FLAG 80 384 0
FLAG 272 288 0
FLAG -16 0 Vin
FLAG 272 32 Vin
FLAG -16 96 0
FLAG 80 48 Vin
TEXT 360 128 Left 2 !.step param x 1n 0.99 0.5
TEXT 360 168 Left 2 !.tran 1s
TEXT -120 -144 Left 2 ;Adjusting the potentiometer, the current through R1 is (approximately)\nlinearly regulated.
TEXT 456 240 Left 2 ;Sizing: \n \nAssume BJT works in saturation -> Vce = 0.3. On the load the voltage drop is 4.7V,\nAssume the load draws 100 mA.\n \nBase current for the polarization is Ic/hfe. Assuming a hfe of 100 the required base\ncurrent is 100ma/100 = 1mA\n \nVbe is fixed at 0.8 V (PN junction). I set R2 so as to have exactly 1 mA of base current\ni.e. R2 = 4.2/0.001 = 4.2k
TEXT 368 -264 Left 4 ;BJT for simple current regulation
* Z:\home\khalils\Downloads\files\data\raw_asc\061c53d8d28a_Fig9_33_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot d(Id(M1))
M1 0 N002 N003 N001 P_50n l=100n w=5u
VBS N001 0 0
VSG 0 N002 0
VSD 0 N003 100m
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSG 0 500m 1m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 688
WIRE 320 96 320 80
WIRE 320 192 320 176
WIRE 400 192 320 192
WIRE 448 80 320 80
WIRE 448 112 448 80
WIRE 448 304 448 208
WIRE 528 160 448 160
WIRE 672 80 448 80
WIRE 672 160 608 160
WIRE 672 160 672 80
WIRE 672 208 672 160
WIRE 672 304 448 304
WIRE 672 304 672 288
WIRE 720 80 672 80
WIRE 720 112 720 80
SYMBOL voltage 672 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 41 57 Left 0
WINDOW 3 41 85 Left 0
SYMATTR InstName VSD
SYMATTR Value 100m
SYMBOL pmos4 400 112 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=100n w=5u
SYMATTR InstName M1
SYMATTR Value P_50n
SYMBOL voltage 320 80 R0
WINDOW 0 -89 56 Left 0
WINDOW 3 24 104 Invisible 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VSG
SYMATTR Value 0
SYMBOL voltage 512 160 M90
WINDOW 0 -32 56 VBottom 0
WINDOW 3 -6 99 VBottom 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VBS
SYMATTR Value 0
FLAG 720 112 0
TEXT 424 336 Left 0 !.dc VSG 0 500m 1m
TEXT 424 360 Left 0 !.lib cmosedu_models.txt
TEXT 488 56 Left 0 ;Plot d(Id(M1))
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17555A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17555A.asy)
L1 N001 vOUT 180 Rser=2.5
R3 vOUT N003 100k
Rload vOUT 0 66
V1 vIN 0 12
C1 vOUT 0 22
R1 vIN N002 3.32Meg
XU1 0 vIN N002 0 vOUT N001 N003 MAX17555A ;pnba GND)IN)EN/UV)HYST)FB/VO)LX)_RESET
R2 N002 0 665k
.tran 1.6m startup
.lib MAX17555A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 992 680
WIRE -48 -32 -64 -32
WIRE 48 -32 -48 -32
WIRE 176 -32 48 -32
WIRE 512 -32 464 -32
WIRE 624 -32 592 -32
WIRE 704 -32 624 -32
WIRE 752 -32 704 -32
WIRE 784 -32 752 -32
WIRE 48 -16 48 -32
WIRE 624 -16 624 -32
WIRE 784 -16 784 -32
WIRE -64 16 -64 -32
WIRE 624 64 624 48
WIRE 784 80 784 64
WIRE 48 96 48 64
WIRE 176 96 48 96
WIRE 48 112 48 96
WIRE -64 128 -64 96
WIRE 512 128 464 128
WIRE 704 128 704 -32
WIRE 704 128 592 128
WIRE 48 224 48 192
WIRE 176 224 48 224
WIRE 704 224 704 128
WIRE 704 224 464 224
WIRE 48 240 48 224
WIRE 320 384 320 368
SYMBOL MAX17555A 320 144 R0
SYMATTR InstName U1
SYMBOL res 768 -32 R0
SYMATTR InstName Rload
SYMATTR Value 66
SYMBOL cap 608 -16 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 608 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 32 96 R0
SYMATTR InstName R2
SYMATTR Value 665k
SYMBOL ind 496 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 180
SYMATTR SpiceLine Rser=2.5
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 3.32Meg
SYMBOL voltage -64 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
FLAG -64 128 0
FLAG 320 384 0
FLAG 624 64 0
FLAG 784 80 0
FLAG -48 -32 vIN
FLAG 752 -32 vOUT
FLAG 48 240 0
TEXT 472 400 Left 2 !.tran 1.6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\302433c4271e_Something-With-Transistors.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6090.asy)
Q2 Vcc- fb out 0 PNP
C1 out 0 3e-10
Q1 Vcc+ fb out 0 NPN
R1 out fb 1k
V7 Vcc- 0 -70V
XU1 NC_01 fb in NC_02 NC_03 fb NC_04 NC_05 LTC6090 ;pnba COM)IN-)IN+)V-)_TF)OUT)V+)_OD
V5 in 0 SINE(0 6V 40k)
V6 Vcc+ 0 70V
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 1s
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1264 680
WIRE 576 64 576 32
WIRE 576 80 576 64
WIRE 512 128 416 128
WIRE 240 144 240 128
WIRE 240 176 240 144
WIRE 1056 208 1056 192
WIRE 1184 208 1184 192
WIRE 144 224 96 224
WIRE 224 224 144 224
WIRE 1056 224 1056 208
WIRE 1184 224 1184 208
WIRE 416 256 416 128
WIRE 416 256 384 256
WIRE 464 256 416 256
WIRE 576 256 576 176
WIRE 576 256 544 256
WIRE 688 256 576 256
WIRE 736 256 688 256
WIRE 752 256 736 256
WIRE 176 288 96 288
WIRE 224 288 176 288
WIRE 576 336 576 256
WIRE 688 336 688 256
WIRE 1056 336 1056 304
WIRE 1184 336 1184 304
WIRE 240 368 240 336
WIRE 96 384 96 288
WIRE 240 384 240 368
WIRE 416 384 416 256
WIRE 432 384 416 384
WIRE 512 384 432 384
WIRE 688 464 688 400
WIRE 576 480 576 432
WIRE 576 496 576 480
WIRE 96 512 96 464
SYMBOL voltage 1056 208 R0
SYMATTR InstName V6
SYMATTR Value 70V
SYMBOL pnp 512 432 M180
SYMATTR InstName Q2
SYMBOL Misc/signal 96 368 R0
SYMATTR InstName V5
SYMATTR Value SINE(0 6V 40k)
SYMBOL npn 512 80 R0
SYMATTR InstName Q1
SYMBOL voltage 1184 208 R0
SYMATTR InstName V7
SYMATTR Value -70V
SYMBOL res 560 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL Opamps/LTC6090 288 256 R0
SYMATTR InstName U1
SYMBOL cap 672 336 R0
SYMATTR InstName C1
SYMATTR Value 3e-10
FLAG 176 288 in
FLAG 96 512 0
FLAG 736 256 out
FLAG 432 384 fb
FLAG 1056 336 0
FLAG 1056 208 Vcc+
FLAG 1184 336 0
FLAG 1184 208 Vcc-
FLAG 576 64 Vcc+
FLAG 576 480 Vcc-
FLAG 240 144 Vcc+
FLAG 240 368 Vcc-
FLAG 688 464 0
FLAG 144 224 fb
TEXT 248 592 Left 2 !.tran 0 1s
* Z:\home\khalils\Downloads\files\data\raw_asc\1065aefe923a_MUXinputs.asc
* Generated by LTspice 26.0.1 for Windows.
V2 A 0 PULSE(0 5 0 10n 10n 0.25m 0.5m)
V1 B 0 PULSE(0 5 0 10n 10n 1.5m 4m)
V3 Sel 0 PULSE(0 5 0 1n 1n 5m 10m)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1.1
SHEET 1 956 680
WIRE 304 -48 192 -48
WIRE 96 0 -48 0
WIRE 192 0 192 -48
WIRE -48 48 -48 0
WIRE 560 160 192 160
WIRE 192 208 192 160
IOPIN 96 0 Out
IOPIN 304 -48 Out
IOPIN 560 160 Out
SYMBOL voltage -48 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 1n 1n 5m 10m)
SYMBOL voltage 192 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 10n 10n 1.5m 4m)
SYMBOL voltage 192 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 10n 10n 0.25m 0.5m)
FLAG -48 128 0
FLAG 192 80 0
FLAG 192 288 0
FLAG 96 0 Sel
FLAG 304 -48 A
FLAG 560 160 B
* Z:\home\khalils\Downloads\files\data\raw_asc\19cadbe77e1d_currect_regulator.asc
* Generated by LTspice 26.0.1 for Windows.
J1 N001 N002 N002 2N4119
R1 N002 0 100
V1 N001 0 10
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.dc V1 0 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 48 32 48
WIRE 208 80 208 48
WIRE 160 144 144 144
WIRE 32 160 32 48
WIRE 144 192 144 144
WIRE 208 192 208 176
WIRE 208 192 144 192
WIRE 208 208 208 192
WIRE 32 304 32 240
WIRE 208 304 208 288
WIRE 208 304 32 304
WIRE 208 320 208 304
SYMBOL njf 160 80 R0
SYMATTR InstName J1
SYMATTR Value 2N4119
SYMBOL voltage 32 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL Misc\\EuropeanResistor 192 192 R0
SYMATTR InstName R1
SYMATTR Value 100
FLAG 208 320 0
TEXT 280 48 Left 2 !.dc V1 0 10
* Z:\home\khalils\Downloads\files\data\raw_asc\09b54d27db73_switch_mat_new.asc
* Generated by LTspice 26.0.1 for Windows.
M5 RIGHT S5 LEFT 0 N_1u l=0.9u w=1.8u
M1 TOP S1 LEFT 0 N_1u l=0.9u w=1.8u
M2 TOP S2 RIGHT 0 N_1u l=0.9u w=1.8u
M4 LEFT S4 BOTTOM 0 N_1u l=0.9u w=1.8u
M6 TOP S6 BOTTOM 0 N_1u l=0.9u w=1.8u
M3 RIGHT S3 BOTTOM 0 N_1u l=0.9u w=1.8u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include model.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1664 832
WIRE 224 -64 224 -112
WIRE 224 -64 -96 -64
WIRE 544 -64 224 -64
WIRE -96 32 -96 -64
WIRE 544 32 544 -64
WIRE -144 112 -288 112
WIRE 768 112 592 112
WIRE 80 192 80 128
WIRE -96 240 -96 128
WIRE -96 240 -192 240
WIRE 64 240 -96 240
WIRE 544 240 544 128
WIRE 544 240 160 240
WIRE 640 240 544 240
WIRE -96 352 -96 240
WIRE 224 352 224 -64
WIRE 544 352 544 240
WIRE -144 432 -288 432
WIRE 384 432 272 432
WIRE 768 432 592 432
WIRE -96 560 -96 448
WIRE 224 560 224 448
WIRE 224 560 -96 560
WIRE 544 560 544 448
WIRE 544 560 224 560
WIRE 224 592 224 560
WIRE 592 624 560 624
IOPIN -288 112 In
IOPIN -288 432 In
IOPIN 768 112 In
IOPIN 768 432 In
IOPIN 384 432 In
IOPIN 80 128 In
IOPIN 592 624 BiDir
IOPIN 640 240 BiDir
IOPIN -192 240 BiDir
IOPIN 224 -112 BiDir
IOPIN 224 592 BiDir
SYMBOL nmos4 -144 352 R0
WINDOW 0 -41 22 Left 2
WINDOW 3 -75 61 Left 2
SYMATTR InstName M4
SYMATTR Value N_1u
SYMATTR Value2 l=0.9u w=1.8u
SYMBOL nmos4 -144 32 R0
WINDOW 0 -43 31 Left 2
WINDOW 3 -79 66 Left 2
WINDOW 123 -79 94 Left 2
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=0.9u w=1.8u
SYMBOL nmos4 592 352 M0
WINDOW 0 -44 28 Left 2
WINDOW 3 -80 58 Left 2
SYMATTR InstName M3
SYMATTR Value N_1u
SYMATTR Value2 l=0.9u w=1.8u
SYMBOL nmos4 592 32 M0
WINDOW 0 -46 32 Left 2
WINDOW 3 -80 66 Left 2
SYMATTR InstName M2
SYMATTR Value N_1u
SYMATTR Value2 l=0.9u w=1.8u
SYMBOL nmos4 160 192 R90
WINDOW 0 -44 9 Left 2
WINDOW 3 -81 42 Left 2
SYMATTR InstName M5
SYMATTR Value N_1u
SYMATTR Value2 l=0.9u w=1.8u
SYMBOL nmos4 272 352 M0
WINDOW 0 -44 29 Left 2
WINDOW 3 -79 64 Left 2
SYMATTR InstName M6
SYMATTR Value N_1u
SYMATTR Value2 l=0.9u w=1.8u
FLAG -288 112 S1
FLAG -288 432 S4
FLAG 768 112 S2
FLAG 768 432 S3
FLAG 384 432 S6
FLAG 80 128 S5
FLAG 592 624 GND
FLAG 640 240 RIGHT
FLAG -192 240 LEFT
FLAG 224 -112 TOP
FLAG 224 592 BOTTOM
FLAG 560 624 G
FLAG 224 400 G
FLAG -96 400 G
FLAG -96 80 G
FLAG 112 240 G
FLAG 544 80 G
FLAG 544 400 G
TEXT 824 0 Left 2 !.include model.txt
* Z:\home\khalils\Downloads\files\data\raw_asc\077d2d949229_Power_Transformer.asc
* Generated by LTspice 26.0.1 for Windows.
V1 in 0 SINE(0 155.5635 60) Rser=0.01
L1 in 0 5.12
L2 out1 0 61m
L3 0 out2 61m
K L1 L2 L3 0.99
.tran 50m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 -32 -32 -32
WIRE 464 -32 416 -32
WIRE 416 32 416 -32
WIRE -32 112 -32 -32
WIRE 256 144 256 -32
WIRE 416 176 416 112
WIRE 480 176 416 176
WIRE 480 192 480 176
WIRE 416 256 416 176
WIRE -32 416 -32 192
WIRE 256 416 256 224
WIRE 256 416 -32 416
WIRE 416 416 416 336
WIRE 464 416 416 416
WIRE -32 448 -32 416
FLAG -32 448 0
FLAG 480 192 0
FLAG 256 -32 in
IOPIN 256 -32 In
FLAG 464 -32 out1
IOPIN 464 -32 Out
FLAG 464 416 out2
IOPIN 464 416 Out
SYMBOL voltage -32 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 155.5635 60)
SYMATTR SpiceLine Rser=0.01
SYMBOL ind2 240 128 R0
SYMATTR InstName L1
SYMATTR Value 5.12
SYMATTR Type ind
SYMBOL ind2 432 16 M0
SYMATTR InstName L2
SYMATTR Value 61m
SYMATTR Type ind
SYMBOL ind2 432 240 M0
SYMATTR InstName L3
SYMATTR Value 61m
SYMATTR Type ind
TEXT 272 464 Left 2 !K L1 L2 L3 0.99
TEXT -66 538 Left 2 !.tran 50m
* Z:\tmp\asc_dec_bjh7r6w2\169269b6567b_ADuM4122B_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
C1 OUT 0 2n
R1 OUT N002 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 448 -16 320 -16
WIRE 448 0 448 -16
WIRE 320 48 320 -16
WIRE 448 96 448 80
WIRE 400 160 368 160
WIRE 496 160 480 160
WIRE 544 160 496 160
WIRE 576 160 544 160
WIRE 544 176 544 160
WIRE 400 240 368 240
WIRE 496 240 496 160
WIRE 496 240 480 240
WIRE 544 256 544 240
WIRE 320 352 320 336
SYMBOL cap 528 176 R0
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL res 496 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
FLAG 544 256 0
FLAG 576 160 OUT
FLAG 448 96 0