Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0f56ab335a3d_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
* NMOS Output Characteristics
V2 N001 0 3.3V
M1 N001 N002 0 0 TSMC35N l=0.5u w=5u
V1 N002 0 1.65V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include /home/akash/.wine/dosdevices/c:/users/akash/Desktop/ActiveFiltersPractice/tsmc035.lib
.dc V2 0 3.3 0.001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1052 680
WIRE 544 208 384 208
WIRE 384 288 384 208
WIRE 544 304 544 208
WIRE 464 336 384 336
WIRE 240 368 208 368
WIRE 336 368 320 368
WIRE 384 400 384 384
WIRE 464 400 464 336
WIRE 464 400 384 400
WIRE 208 448 208 368
WIRE 256 448 208 448
WIRE 384 448 384 400
WIRE 544 448 544 384
SYMBOL voltage 544 288 R0
SYMATTR InstName V2
SYMATTR Value 3.3V
SYMBOL voltage 336 368 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value 1.65V
SYMBOL nmos4 336 288 R0
WINDOW 0 51 66 Left 2
WINDOW 3 49 29 Left 2
SYMATTR InstName M1
SYMATTR Value TSMC35N
SYMATTR Value2 l=0.5u w=5u
FLAG 256 448 0
FLAG 384 448 0
FLAG 544 448 0
TEXT -112 16 Left 2 !.include /home/akash/.wine/dosdevices/c:/users/akash/Desktop/ActiveFiltersPractice/tsmc035.lib
TEXT 344 616 Left 2 !.dc V2 0 3.3 0.001
TEXT 288 568 Left 2 ;NMOS Output Characteristics
* Z:\home\khalils\Downloads\files\data\raw_asc\18bdb2dc791b_1728-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1728-3.3.asy)
V1 N001 0 5
V4 N003 0 PWL(0 3.3 1 3.3 2 3 3 3.3)
XU1 N002 0 N004 N005 N003 LTC1728-3.3 ;pnba _RST)GND)VccA)Vcc1.8)Vcc3
R1 N002 N001 10K
V3 N005 0 PWL(0 1.8 4 1.8 5 1.5 6 1.8)
V2 N004 0 PWL(0 1.05 7 1.05 8 .95 9 1.05)
.tran 10
.lib LTC1728-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1100 756
WIRE -160 144 -224 144
WIRE 48 144 -80 144
WIRE 464 144 272 144
WIRE 464 160 464 144
WIRE -224 176 -224 144
WIRE 48 208 16 208
WIRE 464 256 464 240
WIRE 48 272 -64 272
WIRE 384 272 272 272
WIRE -224 288 -224 256
WIRE 384 288 384 272
WIRE -64 304 -64 272
WIRE 384 384 384 368
WIRE -64 416 -64 384
SYMBOL voltage 464 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value PWL(0 3.3 1 3.3 2 3 3 3.3)
SYMBOL voltage -64 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 1.05 7 1.05 8 .95 9 1.05)
SYMBOL voltage -224 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 384 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 1.8 4 1.8 5 1.5 6 1.8)
SYMBOL LTC1728-3.3 160 240 R0
SYMATTR InstName U1
SYMBOL res -64 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 16 208 0
FLAG -224 288 0
FLAG -64 416 0
FLAG 384 384 0
FLAG 464 256 0
TEXT 528 432 Left 2 !.tran 10
* Z:\home\khalils\Downloads\files\data\raw_asc\1dd57b37ff70_trial.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N001 N002 15
R1 N001 N003 27k
V1 N001 0 9
R2 N003 0 100k
R4 0 N004 10
Q1 N004 N003 N002 0 BC308
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.include BC308.txt
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE 224 16 224 -80
WIRE 224 16 128 16
WIRE 288 16 224 16
WIRE 128 96 128 16
WIRE 288 160 288 96
WIRE 128 208 128 176
WIRE 224 208 128 208
WIRE 128 256 128 208
WIRE 288 272 288 256
WIRE 432 272 288 272
SYMBOL res 528 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL res 112 80 R0
SYMATTR InstName R1
SYMATTR Value 27k
SYMBOL res 112 240 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL pnp 224 256 M180
SYMATTR InstName Q1
SYMATTR Value BC308
SYMBOL res 272 0 R0
SYMATTR InstName R3
SYMATTR Value 15
SYMBOL voltage 224 -64 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9
FLAG 224 -160 0
FLAG 128 336 0
FLAG 512 272 0
TEXT 800 16 Left 2 !.include BC308.txt
TEXT 108 360 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6900.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N001 0 N002 0 OUT LTC6900 ;pnba V+)GND)SET)DIV)OUT
R1 N001 N002 20K
V1 N001 0 3
.tran 10u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6900.asy)
.lib LTC6900.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 80 -112 80
WIRE 96 80 -16 80
WIRE 352 80 320 80
WIRE -112 96 -112 80
WIRE -16 112 -16 80
WIRE 96 160 80 160
WIRE -112 192 -112 176
WIRE -16 240 -16 192
WIRE 96 240 -16 240
WIRE 336 240 320 240
FLAG 80 160 0
FLAG 336 240 0
FLAG -112 192 0
FLAG 352 80 OUT
SYMBOL LTC6900 208 160 R0
SYMATTR InstName U1
SYMBOL res -32 96 R0
SYMATTR InstName R1
SYMATTR Value 20K
SYMBOL voltage -112 80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3
TEXT 408 256 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\1571cdc38848_nor.asc
* Generated by LTspice 26.0.1 for Windows.
M2 out in2 P001 vdd PMOS l=90n w=400n
M1 P001 in1 vdd N001 PMOS l=90n w=400n
M4 out in2 0 N003 NMOS l=90n w=200n
M3 out in1 0 N002 NMOS l=90n w=200n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 -128 288 -144
WIRE 384 -128 288 -128
WIRE 288 -112 288 -128
WIRE 240 -96 64 -96
WIRE 288 -64 288 -96
WIRE 240 0 80 0
WIRE 384 32 384 -128
WIRE 384 32 288 32
WIRE 64 96 64 -96
WIRE 64 96 48 96
WIRE 288 128 288 80
WIRE 448 128 288 128
WIRE 80 160 80 0
WIRE 80 160 48 160
WIRE 288 160 288 128
WIRE 288 160 224 160
WIRE 368 160 288 160
WIRE 224 176 224 160
WIRE 368 176 368 160
WIRE 64 256 64 96
WIRE 176 256 64 256
WIRE 224 256 224 224
WIRE 320 256 304 256
WIRE 368 256 368 224
WIRE 80 304 80 160
WIRE 304 304 304 256
WIRE 304 304 80 304
WIRE 224 336 224 272
WIRE 288 336 224 336
WIRE 368 336 368 272
WIRE 368 336 288 336
WIRE 288 352 288 336
IOPIN 48 96 In
IOPIN 48 160 In
IOPIN 448 128 Out
IOPIN 288 -144 In
SYMBOL nmos4 176 176 R0
SYMATTR InstName M3
SYMATTR Value2 l=90n w=200n
SYMBOL pmos4 240 80 M180
SYMATTR InstName M2
SYMATTR Value2 l=90n w=400n
SYMBOL pmos4 240 -16 M180
SYMATTR InstName M1
SYMATTR Value2 l=90n w=400n
SYMBOL nmos4 320 176 R0
SYMATTR InstName M4
SYMATTR Value2 l=90n w=200n
FLAG 48 96 in1
FLAG 48 160 in2
FLAG 448 128 out
FLAG 288 -144 vdd
FLAG 288 352 0
* Z:\home\khalils\Downloads\files\data\raw_asc\eb9597d8df02_SCHEMATIC.asc
* Generated by LTspice 26.0.1 for Windows.
* .op
* EDIC WINTER INTERNSHIP\nMohammed Ahmed Majid\nGP5405, 23EEBEA666
* IO Characterstics of PMOS
M1 0 N002 N001 N001 PMOS l=1u w=10u
vsg N001 N002 0.6
vsd N001 0 0.9
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include tsmc180.txt
.dc vsd 0 1.8 0.1 vsg 0.2 1 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 0 96 0
WIRE 416 0 256 0
WIRE 416 32 416 0
WIRE 256 96 256 0
WIRE 336 96 256 96
WIRE 256 112 256 96
WIRE 208 128 192 128
WIRE 336 160 336 96
WIRE 336 160 256 160
WIRE 96 192 96 0
WIRE 256 256 256 208
WIRE 368 256 256 256
WIRE 416 256 416 112
WIRE 416 256 368 256
WIRE 192 272 192 128
WIRE 192 272 96 272
WIRE 368 288 368 256
SYMBOL voltage 96 176 R0
WINDOW 3 23 109 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vsg
SYMATTR Value 0.6
SYMBOL pmos4 208 208 M180
WINDOW 123 61 8 Left 2
SYMATTR InstName M1
SYMATTR Value2 l=1u w=10u
SYMBOL voltage 416 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vsd
SYMATTR Value 0.9
FLAG 368 288 0
TEXT -264 0 Left 2 !.include tsmc180.txt
TEXT -264 24 Left 2 !.dc vsd 0 1.8 0.1 vsg 0.2 1 0.2
TEXT -264 48 Left 2 ;.op
TEXT -264 -96 Left 2 ;EDIC WINTER INTERNSHIP\nMohammed Ahmed Majid\nGP5405, 23EEBEA666
TEXT 104 -56 Left 2 ;IO Characterstics of PMOS
* Z:\home\khalils\Downloads\files\data\raw_asc\1675700c3ab6_SPICE_RESIT.asc
* Generated by LTspice 26.0.1 for Windows.
R2 Vout N001 100k
Q2 0 0 N003 0 PNP5 m=32
E2 Vout 0 NC_01 NC_02 10k
R1 N001 N003 100k
R3 Vout N002 100k
Q1 0 0 N002 0 PNP5
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.step temp list -40 27 85
.lib 'C:\Program Files\LTC\LTspiceXVII\lib\cmp\log018_mod.l' TT
.lib 'C:\Program Files\LTC\LTspiceXVII\lib\cmp\log018_mod.l' TT_BIP
.dc V1 1.6 1.8 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2248 1144
WIRE 400 0 208 0
WIRE 848 0 400 0
WIRE 1440 0 848 0
WIRE 1488 0 1440 0
WIRE 400 48 400 0
WIRE 848 48 848 0
WIRE 208 144 208 0
WIRE 848 272 848 128
WIRE 400 384 400 128
WIRE 848 384 848 352
WIRE 336 432 272 432
WIRE 784 432 720 432
WIRE 208 608 208 224
WIRE 272 608 272 432
WIRE 272 608 208 608
WIRE 400 608 400 480
WIRE 400 608 272 608
WIRE 720 608 720 432
WIRE 720 608 400 608
WIRE 848 608 848 480
WIRE 848 608 720 608
WIRE 400 640 400 608
SYMBOL res 832 32 R0
WINDOW 3 36 92 Left 2
SYMATTR Value 100k
SYMATTR InstName R2
SYMBOL pnp2 336 480 M180
WINDOW 0 -2 -11 Left 2
SYMATTR InstName Q1
SYMATTR Value PNP5
SYMBOL res 832 256 R0
WINDOW 3 36 92 Left 2
SYMATTR Value 100k
SYMATTR InstName R1
SYMBOL res 384 32 R0
WINDOW 3 36 92 Left 2
SYMATTR Value 100k
SYMATTR InstName R3
SYMBOL e2 208 128 M0
SYMATTR InstName E2
SYMATTR Value 10k
SYMBOL pnp2 784 480 M180
WINDOW 123 84 40 Left 2
WINDOW 0 3 -4 Left 2
SYMATTR Value2 m=32
SYMATTR InstName Q2
SYMATTR Value PNP5
FLAG 400 640 0
FLAG 1440 0 Vout
TEXT 216 -480 Left 2 !.step temp list -40 27 85
TEXT 216 -512 Left 2 !.lib 'C:\\Program Files\\LTC\\LTspiceXVII\\lib\\cmp\\log018_mod.l' TT
TEXT 216 -544 Left 2 !.lib 'C:\\Program Files\\LTC\\LTspiceXVII\\lib\\cmp\\log018_mod.l' TT_BIP
TEXT 576 -480 Left 2 !.dc V1 1.6 1.8 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\e3b0fe30fcdd_DQ-ABC.asc
* Generated by LTspice 26.0.1 for Windows.
BVb out2 0 V = (cos(V(in4) - 2*pi/3)*V(in1) - sin(V(in4) - 2*pi/3)*V(in2))
BVa out1 0 V = (cos(V(in4))*V(in1) - sin(V(in4))*V(in2))
BVc out3 0 V = (cos(V(in4) - 4*pi/3)*V(in1) - sin(V(in4) - 4*pi/3)*V(in2))
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1920 680
WIRE 752 -32 416 -32
WIRE 752 16 528 16
WIRE 752 64 640 64
WIRE 352 112 272 112
WIRE 416 128 416 -32
WIRE 528 128 528 16
WIRE 640 128 640 64
WIRE 352 160 272 160
WIRE 352 208 272 208
WIRE 416 224 416 208
WIRE 528 224 528 208
WIRE 640 224 640 208
IOPIN 272 112 In
IOPIN 272 160 In
IOPIN 272 208 In
IOPIN 752 -32 Out
IOPIN 752 16 Out
IOPIN 752 64 Out
SYMBOL bv 528 112 R0
WINDOW 3 -28 224 Left 2
SYMATTR Value V = (cos(V(in4) - 2*pi/3)*V(in1) - sin(V(in4) - 2*pi/3)*V(in2))
SYMATTR InstName Vb
SYMBOL bv 640 112 R0
WINDOW 3 -93 261 Left 2
SYMATTR Value V = (cos(V(in4) - 4*pi/3)*V(in1) - sin(V(in4) - 4*pi/3)*V(in2))
SYMATTR InstName Vc
SYMBOL bv 416 112 R0
WINDOW 3 35 188 Left 2
SYMATTR Value V = (cos(V(in4))*V(in1) - sin(V(in4))*V(in2))
SYMATTR InstName Va
FLAG 272 112 in1
FLAG 272 160 in2
FLAG 272 208 in4
FLAG 416 224 0
FLAG 528 224 0
FLAG 752 -32 out1
FLAG 752 16 out2
FLAG 640 224 0
FLAG 752 64 out3
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2109-1.1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
L1 N001 OUT 1
Rload OUT 0 4
C1 OUT 0 10
XU1 IN IN N001 OUT 0 ADP2109-x.x Rtop=96K ;pnba Vin)EN)SW)FB)GND
.tran .5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2109-1.1.asy)
.lib ADP2109-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 144
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 4
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ADP2109-1.1 352 224 R0
SYMATTR InstName U1
TEXT 544 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1957b1d000ad_biasSim.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N001 N003 100
Q1 N003 base 0 0 NPN
V1 N002 0 2
R3 N002 base 4700
V2 N001 0 12
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 -80 224 -80
WIRE -48 -32 -256 -32
WIRE 336 0 336 -80
WIRE 224 112 224 0
WIRE 224 112 208 112
WIRE 336 112 336 80
WIRE -256 128 -256 -32
WIRE -48 160 -48 48
WIRE 16 160 -48 160
WIRE 144 160 16 160
WIRE -256 240 -256 208
WIRE 208 272 208 208
DATAFLAG 224 48 ""
SYMBOL res -64 -48 R0
SYMATTR InstName R3
SYMATTR Value 4700
SYMBOL res 208 -96 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL voltage 336 -16 R0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL voltage -256 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL npn 144 112 R0
SYMATTR InstName Q1
FLAG 208 272 0
FLAG -256 240 0
FLAG 336 112 0
FLAG 16 160 base
TEXT -290 296 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3528.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3528.asy)
C1 OUT 0 10 Rser=1m
R1 OUT N002 499K
V1 IN 0 2
R2 N002 0 287K
XU1 IN N002 NC_01 OUT N001 0 0 IN LTC3528 ;pnba _SHDN)FB)Pgood)Vout)SW)PGND)SGND)Vin
Rload OUT 0 8.25
L1 IN N001 4.7 Rpar=5K
.tran 500u startup
.lib LTC3528.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 64 -112 64
WIRE 64 64 -32 64
WIRE 96 64 64 64
WIRE 192 64 176 64
WIRE -112 80 -112 64
WIRE 64 112 64 64
WIRE 192 112 192 64
WIRE -112 176 -112 160
WIRE -32 192 -32 64
WIRE -16 192 -32 192
WIRE 320 192 272 192
WIRE 432 192 320 192
WIRE 512 192 432 192
WIRE 320 208 320 192
WIRE 432 208 432 192
WIRE 512 208 512 192
WIRE 320 304 320 288
WIRE 320 304 272 304
WIRE 432 304 432 272
WIRE 512 304 512 288
WIRE 320 320 320 304
WIRE 64 400 64 384
WIRE 192 400 192 384
WIRE 320 416 320 400
SYMBOL ind 80 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=5K
SYMBOL cap 416 208 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=1m
SYMBOL res 304 192 R0
SYMATTR InstName R1
SYMATTR Value 499K
SYMBOL res 304 304 R0
SYMATTR InstName R2
SYMATTR Value 287K
SYMBOL PowerProducts\\LTC3528 128 256 R0
SYMATTR InstName U1
SYMBOL voltage -112 64 R0
WINDOW 0 20 15 Left 2
WINDOW 3 25 97 Left 2
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL res 496 192 R0
SYMATTR InstName Rload
SYMATTR Value 8.25
FLAG -112 176 0
FLAG 64 400 0
FLAG 320 416 0
FLAG 432 304 0
FLAG 512 304 0
FLAG 192 400 0
FLAG 512 192 OUT
FLAG -112 64 IN
TEXT 440 456 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4221-1A.asc
* Generated by LTspice 26.0.1 for Windows.
* GND1 is modeled as common GND
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4221-1A.asy)
C2 Gate_B 0 2.2n
R2 Gate_A N001 5.11
V3 N005 0 0
V1 Vin 0 PULSE(0 5 0 2n 2n 5u 10u)
R3 Gate_B N007 5.11
C1 Gate_A 0 2.2n
V5 N002 0 15
V2 N003 0 5
R1 N006 0 10k
V4 N004 0 15
XU1 Vin N003 0 N005 N006 0 N007 N004 0 N001 N002 ADuM4221-1A ;pnba PWM)VDD1)GND1)DISABLE)DT)GNDB)VOB)VDDB)GNDA)VOA)VDDA
.tran 50u
.lib ADuM4221-1A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 3080 680
WIRE -1824 -432 -2208 -432
WIRE -1728 -432 -1824 -432
WIRE -1136 -432 -1424 -432
WIRE -1008 -432 -1056 -432
WIRE -880 -432 -1008 -432
WIRE -832 -432 -880 -432
WIRE -1008 -400 -1008 -432
WIRE -2208 -384 -2208 -432
WIRE -1248 -368 -1424 -368
WIRE -1728 -352 -2096 -352
WIRE -1248 -352 -1248 -368
WIRE -1008 -320 -1008 -336
WIRE -1392 -304 -1424 -304
WIRE -2096 -288 -2096 -352
WIRE -1728 -272 -1760 -272
WIRE -1248 -224 -1424 -224
WIRE -1248 -208 -1248 -224
WIRE -1728 -176 -1984 -176
WIRE -1392 -160 -1424 -160
WIRE -1728 -112 -1872 -112
WIRE -1136 -96 -1424 -96
WIRE -1008 -96 -1056 -96
WIRE -880 -96 -1008 -96
WIRE -832 -96 -880 -96
WIRE -1984 -80 -1984 -176
WIRE -1872 -64 -1872 -112
WIRE -1008 -64 -1008 -96
WIRE -1008 32 -1008 0
WIRE -2208 128 -2208 -304
WIRE -2096 128 -2096 -208
WIRE -1984 128 -1984 0
WIRE -1872 128 -1872 16
SYMBOL voltage -1248 -368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 43 29 Left 2
WINDOW 3 46 61 Left 2
SYMATTR InstName V5
SYMATTR Value 15
SYMBOL cap -1024 -64 R0
SYMATTR InstName C2
SYMATTR Value 2.2n
SYMBOL res -1888 -80 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -2096 -304 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -1248 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 34 Left 2
WINDOW 3 45 64 Left 2
SYMATTR InstName V4
SYMATTR Value 15
SYMBOL cap -1024 -400 R0
SYMATTR InstName C1
SYMATTR Value 2.2n
SYMBOL res -1040 -448 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5.11
SYMBOL voltage -1984 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 0
SYMBOL res -1040 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5.11
SYMBOL voltage -2208 -400 R0
WINDOW 0 26 98 Left 2
WINDOW 3 33 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 2n 2n 5u 10u)
SYMBOL ADuM4221-1A -1568 -336 R0
SYMATTR InstName U1
FLAG -1984 128 0
FLAG -1392 -160 0
FLAG -2208 128 0
FLAG -2096 128 0
FLAG -1824 -432 Vin
FLAG -1392 -304 0
FLAG -1760 -272 0
FLAG -1872 128 0
FLAG -1248 -128 0
FLAG -880 -96 Gate_B
FLAG -880 -432 Gate_A
FLAG -1008 32 0
FLAG -1008 -320 0
FLAG -1248 -272 0
TEXT -1728 8 Left 2 !.tran 50u
TEXT -1728 -16 Left 1 ;GND1 is modeled as common GND
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1144.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1144.asy)
Rload OUT 0 244
XU1 N001 N002 0 N005 OUT N004 N003 IN LTC1144 ;pnba Boost)Cap+)GND)Cap-)Vout)_SHDN)OSC)Vin
C2 N002 N005 10
V1 IN 0 15
C1 OUT 0 10
.tran 100m
.lib LTC1144.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3532 1764
WIRE 3008 1440 2992 1440
WIRE 3408 1440 3264 1440
WIRE 3408 1456 3408 1440
WIRE 3008 1504 2912 1504
WIRE 3280 1504 3264 1504
WIRE 2912 1536 2912 1504
WIRE 3408 1552 3408 1536
WIRE 3008 1568 2976 1568
WIRE 3280 1568 3264 1568
WIRE 2912 1632 2912 1600
WIRE 3008 1632 2912 1632
WIRE 3328 1632 3264 1632
WIRE 3440 1632 3328 1632
WIRE 3328 1648 3328 1632
WIRE 3440 1648 3440 1632
WIRE 3328 1744 3328 1712
WIRE 3440 1744 3440 1728
SYMBOL PowerProducts\\LTC1144 3136 1536 R0
SYMATTR InstName U1
SYMBOL cap 2896 1536 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res 3424 1632 R0
SYMATTR InstName Rload
SYMATTR Value 244
SYMBOL VOLTAGE 3408 1440 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL cap 3312 1648 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 3408 1552 0
FLAG 2976 1568 0
FLAG 3328 1744 0
FLAG 3440 1744 0
FLAG 3440 1632 OUT
FLAG 3408 1440 IN
TEXT 3160 1728 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1147-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1147-3.3.asy)
C2 N004 0 3300p
V1 IN 0 10
Rload OUT 0 2
R1 N005 N004 1K
L1 N001 N002 50
MQ1 N001 N003 IN IN FDC638P
C1 N006 0 470p
C3 OUT 0 390 Rser=0.01
XU1 IN N006 N005 OUT N002 0 0 N003 LTC1147-3.3 ;pnba Vin)Ct)Ith)Sense-)Sense+)SHDN)GND)Pdrive
R2 N002 OUT 50m
D1 0 N001 MBRS340
C4 N002 OUT 1000p
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1.5m startup
.lib LTC1147-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2456 1568
WIRE 1392 1008 1088 1008
WIRE 1568 1008 1392 1008
WIRE 1728 1008 1664 1008
WIRE 1760 1008 1728 1008
WIRE 1856 1008 1840 1008
WIRE 1872 1008 1856 1008
WIRE 1968 1008 1952 1008
WIRE 2032 1008 1968 1008
WIRE 2144 1008 2032 1008
WIRE 1088 1024 1088 1008
WIRE 2032 1024 2032 1008
WIRE 2144 1024 2144 1008
WIRE 1728 1056 1728 1008
WIRE 1392 1072 1392 1008
WIRE 1088 1120 1088 1104
WIRE 2032 1120 2032 1088
WIRE 2144 1120 2144 1104
WIRE 1232 1136 1200 1136
WIRE 1584 1136 1584 1056
WIRE 1584 1136 1552 1136
WIRE 1728 1136 1728 1120
WIRE 1056 1216 1040 1216
WIRE 1136 1216 1120 1216
WIRE 1232 1216 1216 1216
WIRE 1584 1216 1552 1216
WIRE 1856 1216 1856 1008
WIRE 1856 1216 1584 1216
WIRE 1104 1296 1040 1296
WIRE 1232 1296 1168 1296
WIRE 1584 1296 1584 1280
WIRE 1584 1296 1552 1296
WIRE 1968 1296 1968 1008
WIRE 1968 1296 1584 1296
WIRE 1392 1376 1392 1360
SYMBOL PowerProducts\\LTC1147-3.3 1392 1216 R0
SYMATTR InstName U1
SYMBOL ind 1744 1024 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 50
SYMBOL res 1232 1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL cap 1568 1216 R0
WINDOW 0 35 15 Left 2
WINDOW 3 32 48 Left 2
SYMATTR InstName C4
SYMATTR Value 1000p
SYMBOL VOLTAGE 1088 1008 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 1856 1024 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 50m
SYMBOL res 2128 1008 R0
SYMATTR InstName Rload
SYMATTR Value 2
SYMBOL polcap 2016 1024 R0
SYMATTR InstName C3
SYMATTR Value 390
SYMATTR SpiceLine Rser=0.01
SYMBOL PMOS 1664 1056 M270
WINDOW 0 66 48 VLeft 2
WINDOW 3 -14 70 VLeft 2
SYMATTR InstName Q1
SYMATTR Value FDC638P
SYMBOL cap 1120 1200 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 3300p
SYMBOL cap 1168 1280 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 470p
SYMBOL schottky 1712 1120 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS340
FLAG 1728 1136 0
FLAG 1392 1376 0
FLAG 1040 1296 0
FLAG 1040 1216 0
FLAG 1088 1120 0
FLAG 2032 1120 0
FLAG 2144 1120 0
FLAG 2144 1008 OUT
FLAG 1200 1136 0
FLAG 1088 1008 IN
TEXT 1704 1352 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5673R.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5673R.asy)
CLOAD vOUT 0 10n
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
RLOAD vOUT 0 1k
XU2 vDAC Vdd 0 vOUT AD5673R Gain=2 ;pnba Vdac)Vdd)GND)Vout
V1 Vdd 0 5
.tran 50u
.lib AD5673R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 112 112 0 112
WIRE 192 112 112 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL AD5673R -208 112 R0
SYMATTR InstName U2
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -240 -80 Vdd
TEXT -160 312 Left 2 !.tran 50u