Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8614.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8614.asy)
XU1 OUT N001 N002 IN MP_01 0 MP_02 N003 MP_03 0 MP_04 MP_05 IN IN N006 N004 NC_06 0 NC_07 N005 LT8614 ;pnba Bias)INTVcc)BST)Vin1))GND1))SW))GND2)))Vin2)EN/UV)Rt)TR/SS)Mode)GND)PG)FB
Rload OUT 0 1.25
C5 OUT N005 10p
C4 OUT 0 47 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
L1 N003 OUT 2.2 Rser=10m
C3 N002 N003 .1
R3 N005 0 243K
R2 OUT N005 1Meg
C7 IN 0 .1
C2 N001 0 1
V1 IN 0 36
C1 N004 0 1n
C6 IN 0 .1
R1 N006 0 41.2K
.tran 750u startup
.lib LT8614.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1020 680
WIRE 48 -80 -48 -80
WIRE 256 -80 48 -80
WIRE 432 -80 256 -80
WIRE -48 -64 -48 -80
WIRE 256 -64 256 -80
WIRE 48 0 48 -80
WIRE 112 0 48 0
WIRE 432 0 432 -80
WIRE 432 0 400 0
WIRE 48 16 48 0
WIRE 432 16 432 0
WIRE -48 32 -48 16
WIRE 48 96 48 80
WIRE 112 96 48 96
WIRE 432 96 432 80
WIRE 432 96 400 96
WIRE 48 112 48 96
WIRE 432 112 432 96
WIRE 32 192 16 192
WIRE 112 192 96 192
WIRE 592 192 400 192
WIRE 432 288 400 288
WIRE 432 304 432 288
WIRE 432 384 432 368
WIRE 432 384 400 384
WIRE 480 384 432 384
WIRE 592 384 592 192
WIRE 592 384 560 384
WIRE 704 384 592 384
WIRE 800 384 704 384
WIRE 896 384 800 384
WIRE 592 400 592 384
WIRE 704 400 704 384
WIRE 800 400 800 384
WIRE 896 400 896 384
WIRE 32 480 16 480
WIRE 112 480 96 480
WIRE 592 480 400 480
WIRE 704 480 704 464
WIRE 704 480 592 480
WIRE 592 496 592 480
WIRE 800 496 800 464
WIRE 896 496 896 480
WIRE 208 560 208 544
WIRE 304 560 304 544
WIRE 592 592 592 576
WIRE 208 656 208 640
SYMBOL res 192 544 R0
SYMATTR InstName R1
SYMATTR Value 41.2K
SYMBOL res 576 480 R0
SYMATTR InstName R3
SYMATTR Value 243K
SYMBOL PowerProducts\\LT8614 256 240 R0
SYMATTR InstName U1
SYMBOL cap 416 304 R0
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL cap 784 400 R0
SYMATTR InstName C4
SYMATTR Value 47
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL res 880 384 R0
SYMATTR InstName Rload
SYMATTR Value 1.25
SYMBOL ind 464 400 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=10m
SYMBOL cap 96 496 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL voltage -48 -80 R0
SYMATTR InstName V1
SYMATTR Value 36
SYMBOL res 576 384 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL cap 416 16 R0
SYMATTR InstName C7
SYMATTR Value .1
SYMBOL cap 32 16 R0
SYMATTR InstName C6
SYMATTR Value .1
SYMBOL cap 96 208 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 688 400 R0
SYMATTR InstName C5
SYMATTR Value 10p
FLAG 304 560 0
FLAG 208 656 0
FLAG -48 32 0
FLAG 16 192 0
FLAG 800 496 0
FLAG 592 592 0
FLAG 896 496 0
FLAG 896 384 OUT
FLAG -48 -80 IN
FLAG 48 112 0
FLAG 432 112 0
FLAG 16 480 0
TEXT 768 600 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL42002-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL42002-3.3.asy)
V1 IN 0 7
C2 N001 0 4.7n
Rload OUT 0 16.5
C1 OUT 0 2.2 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADPL42002-3.3 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 6m startup
.lib ADPL42002-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADPL42002-3.3 224 128 R0
SYMATTR InstName U1
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 16.5
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 7
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1ae695552e20_2_resistenze.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 10
R2 0 N002 2000
R1 N002 N001 1000
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 112 48 112
WIRE 208 112 160 112
WIRE 336 112 288 112
WIRE 48 240 48 112
WIRE 128 240 48 240
WIRE 336 240 336 112
WIRE 336 240 208 240
WIRE 336 272 336 240
SYMBOL voltage 112 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 176 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL res 304 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2000
FLAG 336 272 0
TEXT 46 306 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3303A-05.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3303A-05.asy)
R2 N004 0 100K
C3 OUT N004 10p
V1 IN 0 5
R3 IN N001 10
Rload OUT 0 0.3
C1 OUT 0 22 m=3 Rser=10m
XU1 IN N001 N003 N004 0 0 N001 N002 N001 LTC3303A-05 ;pnba VIN)EN)SW)FB)AGND)PGND)AVIN)PGOOD)MODE/SYNC
L1 N003 OUT 330n Rser=2m
R4 OUT N002 500K
R1 OUT N004 140K
C2 N001 0 1
.tran 1.5m startup
.lib LTC3303A-05.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2652 1736
WIRE 1392 1248 1360 1248
WIRE 1488 1248 1392 1248
WIRE 1712 1248 1488 1248
WIRE 1360 1264 1360 1248
WIRE 1488 1264 1488 1248
WIRE 1712 1296 1712 1248
WIRE 1360 1360 1360 1344
WIRE 1488 1360 1488 1344
WIRE 1488 1360 1424 1360
WIRE 1552 1360 1488 1360
WIRE 1904 1360 1872 1360
WIRE 2016 1360 1984 1360
WIRE 1424 1376 1424 1360
WIRE 1424 1456 1424 1440
WIRE 1488 1472 1488 1360
WIRE 1552 1472 1488 1472
WIRE 1904 1472 1872 1472
WIRE 2016 1472 2016 1360
WIRE 2016 1472 1984 1472
WIRE 2128 1472 2016 1472
WIRE 2224 1472 2128 1472
WIRE 2272 1472 2224 1472
WIRE 2320 1472 2272 1472
WIRE 2016 1488 2016 1472
WIRE 2128 1488 2128 1472
WIRE 2224 1488 2224 1472
WIRE 2320 1488 2320 1472
WIRE 1488 1584 1488 1472
WIRE 1552 1584 1488 1584
WIRE 2016 1584 2016 1568
WIRE 2016 1584 1872 1584
WIRE 2128 1584 2128 1552
WIRE 2128 1584 2016 1584
WIRE 2224 1584 2224 1552
WIRE 2320 1584 2320 1568
WIRE 2016 1600 2016 1584
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
WIRE 2016 1696 2016 1680
SYMBOL cap 2208 1488 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 m=3
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine Rser=10m
SYMBOL ind 1888 1488 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 330n
SYMATTR SpiceLine Rser=2m
SYMBOL cap 2112 1488 R0
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL RES 2000 1472 R0
SYMATTR InstName R1
SYMATTR Value 140K
SYMBOL res 1472 1248 R0
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL res 2304 1472 R0
SYMATTR InstName Rload
SYMATTR Value 0.3
SYMBOL res 2000 1584 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL VOLTAGE 1360 1248 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL LTC3303A-05 1712 1456 R0
SYMATTR InstName U1
SYMBOL cap 1408 1376 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 2000 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 500K
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1360 1360 0
FLAG 2320 1584 0
FLAG 2016 1696 0
FLAG 2224 1584 0
FLAG 1392 1248 IN
FLAG 2272 1472 OUT
FLAG 1424 1456 0
TEXT 2200 1696 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\071fb5fec442_not.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 in {Rb}
Q1 out N001 Vss 0 NPN
R2 Vdd out {R}
C1 out Vss {C}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.param R=470
.param Rb=2.7k
.param C=1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 -240 -96 -272
WIRE -96 -144 -96 -160
WIRE -16 -144 -96 -144
WIRE -96 -128 -96 -144
WIRE -16 -128 -16 -144
WIRE -272 -80 -336 -80
WIRE -160 -80 -192 -80
WIRE -16 0 -16 -64
WIRE -96 32 -96 -32
SYMBOL res -176 -96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {Rb}
SYMBOL cap -32 -128 R0
SYMATTR InstName C1
SYMATTR Value {C}
SYMBOL res -112 -256 R0
SYMATTR InstName R2
SYMATTR Value {R}
SYMBOL npn -160 -128 R0
SYMATTR InstName Q1
FLAG -16 -144 out
FLAG -336 -80 in
FLAG -96 32 Vss
FLAG -96 -272 Vdd
FLAG -16 0 Vss
TEXT 128 -184 Left 2 !.param R=470\n.param Rb=2.7k\n.param C=1n
* Z:\home\khalils\Downloads\files\data\raw_asc\2686220eece8_Draft29.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vd N001 300
D1 Vd 0 MyLed
V1 N001 0 V
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 5 0.1
.model MyLed D (IS=93.1P RS=2.8 N=5)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 224 -96 224
WIRE 128 224 64 224
WIRE 128 240 128 224
WIRE -96 288 -96 224
WIRE 128 304 128 240
WIRE -96 432 -96 368
WIRE 16 432 -96 432
WIRE 128 432 128 368
WIRE 128 432 16 432
SYMBOL LED 112 304 R0
SYMATTR InstName D1
SYMATTR Value MyLed
SYMBOL voltage -96 272 R0
SYMATTR InstName V1
SYMBOL res 80 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 300
FLAG 16 432 0
FLAG 128 240 Vd
TEXT -48 488 Left 2 !.dc V1 0 5 0.1\n.model MyLed D (IS=93.1P RS=2.8 N=5)
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8421.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8421.asy)
Rload OUT 0 10K
Vin V+ V- SINE(0 1m 10K)
V2 -V 0 0
Vref N003 0 2.5
R1 N001 N002 100
Vcm V- 0 PWL(0 2.4 2.5m 3.1 5m 2.4)
V1 +V 0 15
XU1 V- N001 N002 V+ -V N003 OUT +V AD8421 ;pnba IN-)RG1)RG2)IN+)VEE)REF)OUT)VCC
.tran 5m
.lib AD8421.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 640 -1264 640 -1280
WIRE 752 -1264 752 -1280
WIRE 304 -1184 96 -1184
WIRE 464 -1184 304 -1184
WIRE 640 -1168 640 -1184
WIRE 752 -1168 752 -1184
WIRE 96 -1152 96 -1184
WIRE 464 -1152 368 -1152
WIRE 752 -1104 640 -1104
WIRE 752 -1088 752 -1104
WIRE 368 -1056 368 -1072
WIRE 464 -1056 368 -1056
WIRE 96 -1024 96 -1072
WIRE 304 -1024 96 -1024
WIRE 464 -1024 304 -1024
WIRE 576 -1024 576 -1040
WIRE 96 -1008 96 -1024
WIRE 752 -992 752 -1008
WIRE 576 -928 576 -944
WIRE 96 -912 96 -928
SYMBOL res 352 -1168 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage 96 -1024 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName Vcm
SYMATTR Value PWL(0 2.4 2.5m 3.1 5m 2.4)
SYMBOL voltage 752 -1280 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 576 -1040 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName Vref
SYMATTR Value 2.5
SYMBOL voltage 96 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1m 10K)
SYMBOL voltage 640 -1280 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL AD8421 496 -1104 R0
SYMATTR InstName U1
FLAG 640 -1280 +V
FLAG 640 -1168 0
FLAG 752 -1104 OUT
FLAG 496 -1200 +V
FLAG 752 -1280 -V
FLAG 496 -1008 -V
FLAG 752 -992 0
FLAG 752 -1168 0
FLAG 96 -912 0
FLAG 576 -928 0
FLAG 304 -1024 V-
FLAG 304 -1184 V+
TEXT 328 -960 Left 2 !.tran 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\ff9c76940dd6_lab7.asc
* Generated by LTspice 26.0.1 for Windows.
V4 Va 0 -.75
V2 Vb 0 -.75
Q4 0 N001 V_OR 0 CA3086N7
R3 0 N001 313
V1 N004 0 -5.2
Q5 N002 Va N003 0 CA3086N7
Q2 N001 Vr N003 0 CA3086N7
Q3 0 N002 V_NOR 0 CA3086N7
R5 V_OR N004 1.5k
R4 V_NOR N004 1.5k
V3 Vr 0 -1.125
R2 0 N002 517
R1 N003 N004 1.23k
Q1 N002 Vb N003 0 CA3086N7
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.inc CA3086.mod
.tran 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 932 680
WIRE 176 -320 176 -384
WIRE 176 -320 128 -320
WIRE 304 -320 176 -320
WIRE 576 -320 304 -320
WIRE 800 -320 576 -320
WIRE 800 -208 800 -320
WIRE 304 -160 304 -240
WIRE 736 -160 304 -160
WIRE 576 -64 576 -320
WIRE 128 -16 128 -240
WIRE 512 -16 128 -16
WIRE 128 48 128 -16
WIRE 128 48 -80 48
WIRE -80 96 -80 48
WIRE -64 96 -80 96
WIRE 128 112 128 48
WIRE 304 112 304 -160
WIRE 800 112 800 -112
WIRE -64 128 -64 96
WIRE 576 176 576 32
WIRE -64 256 -64 224
WIRE 128 256 128 208
WIRE 128 256 -64 256
WIRE 208 256 128 256
WIRE 304 256 304 208
WIRE 304 256 208 256
WIRE 576 272 576 176
WIRE 800 272 800 112
WIRE 208 304 208 256
WIRE 208 416 208 384
WIRE 416 416 208 416
WIRE 576 416 576 352
WIRE 576 416 416 416
WIRE 800 416 800 352
WIRE 800 416 576 416
WIRE 416 480 416 416
SYMBOL npn 736 -208 R0
SYMATTR InstName Q4
SYMATTR Value CA3086N7
SYMBOL res 192 288 R0
SYMATTR InstName R1
SYMATTR Value 1.23k
SYMBOL npn 512 -64 R0
SYMATTR InstName Q3
SYMATTR Value CA3086N7
SYMBOL npn 368 112 M0
SYMATTR InstName Q2
SYMATTR Value CA3086N7
SYMBOL npn 64 112 R0
SYMATTR InstName Q1
SYMATTR Value CA3086N7
SYMBOL res 288 -336 R0
SYMATTR InstName R3
SYMATTR Value 313
SYMBOL voltage 416 464 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value -5.2
SYMBOL res 112 -336 R0
SYMATTR InstName R2
SYMATTR Value 517
SYMBOL voltage -592 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value -.75
SYMBOL res 784 256 R0
SYMATTR InstName R5
SYMATTR Value 1.5k
SYMBOL res 560 256 R0
SYMATTR InstName R4
SYMATTR Value 1.5k
SYMBOL voltage -464 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value -1.125
SYMBOL npn -128 128 R0
SYMATTR InstName Q5
SYMATTR Value CA3086N7
SYMBOL voltage -720 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value -.75
FLAG 176 -384 0
FLAG 416 560 0
FLAG 64 160 Vb
FLAG 368 160 Vr
FLAG 576 176 V_NOR
FLAG 800 112 V_OR
FLAG -592 224 0
FLAG -592 144 Vb
FLAG -464 224 0
FLAG -464 144 Vr
FLAG -128 176 Va
FLAG -720 224 0
FLAG -720 144 Va
TEXT 0 616 Left 2 !.inc CA3086.mod
TEXT -626 636 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\216e8adae336_NAND_2.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 B 0 0 NMOS l=600n w=3u
M2 ANANDB A N001 0 NMOS l=600n w=3u
M3 ANANDB B vdd vdd PMOS l=600n w=3u
M4 ANANDB A vdd vdd PMOS l=600n w=3u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 -96 176 -128
WIRE 400 -96 176 -96
WIRE 176 -64 176 -96
WIRE 400 -64 400 -96
WIRE 128 -48 112 -48
WIRE 352 -48 256 -48
WIRE 176 48 176 32
WIRE 272 48 176 48
WIRE 400 48 400 32
WIRE 400 48 272 48
WIRE 528 48 400 48
WIRE 256 64 256 -48
WIRE 256 64 208 64
WIRE 272 64 272 48
WIRE 208 144 208 64
WIRE 208 144 80 144
WIRE 224 144 208 144
WIRE 272 192 272 160
WIRE 112 272 112 -48
WIRE 112 272 80 272
WIRE 224 272 112 272
WIRE 272 336 272 288
FLAG 272 336 0
FLAG 272 240 0
FLAG 272 112 0
FLAG 80 144 A
IOPIN 80 144 In
FLAG 80 272 B
IOPIN 80 272 In
FLAG 176 -128 vdd
IOPIN 176 -128 In
FLAG 176 -16 vdd
FLAG 400 -16 vdd
FLAG 528 48 ANANDB
IOPIN 528 48 Out
SYMBOL nmos4 224 192 R0
WINDOW 123 56 100 Left 2
SYMATTR InstName M1
SYMATTR Value2 l=600n w=3u
SYMBOL nmos4 224 64 R0
WINDOW 123 56 100 Left 2
SYMATTR InstName M2
SYMATTR Value2 l=600n w=3u
SYMBOL pmos4 128 32 M180
WINDOW 123 56 100 Left 2
SYMATTR InstName M3
SYMATTR Value2 l=600n w=3u
SYMBOL pmos4 352 32 M180
WINDOW 123 56 100 Left 2
SYMATTR InstName M4
SYMATTR Value2 l=600n w=3u
* Z:\home\khalils\Downloads\files\data\raw_asc\1e3f84002aba_CMOS_Inverter.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vout Vin 0 0 nmos-45n l=45n w=90n
V1 Vdd 0 1.8
V2 Vin 0 0
M2 Vout Vin Vdd Vdd pmos-45n l=45n w=90n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include 45nm_HP.txt
.dc V2 0 1.8 0.01
* CMOS Inverter
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 -32 112 -48
WIRE 128 -32 112 -32
WIRE 128 16 128 -32
WIRE 128 16 112 16
WIRE 64 80 64 -16
WIRE 64 80 -16 80
WIRE 112 80 112 64
WIRE 160 80 112 80
WIRE 112 96 112 80
WIRE -128 112 -128 96
WIRE -16 128 -16 80
WIRE 128 144 112 144
WIRE 64 176 64 80
WIRE 128 192 128 144
WIRE 128 192 112 192
WIRE -128 208 -128 192
WIRE 112 208 112 192
FLAG -16 208 0
FLAG 112 208 0
FLAG -128 208 0
FLAG -128 96 Vdd
FLAG 112 -48 Vdd
FLAG -16 80 Vin
FLAG 160 80 Vout
SYMBOL nmos4 64 96 R0
WINDOW 3 69 52 Left 2
WINDOW 123 68 70 Left 2
WINDOW 0 69 35 Left 2
SYMATTR Value nmos-45n
SYMATTR Value2 l=45n w=90n
SYMATTR InstName M1
SYMBOL voltage -128 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL voltage -16 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 30 85 Left 2
SYMATTR Value 0
SYMATTR InstName V2
SYMBOL pmos4 64 64 M180
WINDOW 0 73 95 Left 2
WINDOW 3 72 76 Left 2
WINDOW 123 70 55 Left 2
SYMATTR InstName M2
SYMATTR Value pmos-45n
SYMATTR Value2 l=45n w=90n
TEXT 40 256 Left 2 !.include 45nm_HP.txt
TEXT 48 240 Left 2 !.dc V2 0 1.8 0.01
TEXT 0 -72 Left 2 ;CMOS Inverter
* Z:\home\khalils\Downloads\files\data\raw_asc\1e6ebb6df8bb_diode-va-reverse.asc
* Generated by LTspice 26.0.1 for Windows.
D1 b a 1SR154-400
R1 b 0 1k
V1 a 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 20V
.step temp list 0 25 50 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 208 -64 208
WIRE 160 208 80 208
WIRE -64 240 -64 208
WIRE 160 240 160 208
WIRE -64 352 -64 320
WIRE 48 352 -64 352
WIRE 160 352 160 320
WIRE 160 352 48 352
WIRE 48 368 48 352
FLAG -64 208 a
FLAG 160 208 b
FLAG 48 368 0
SYMBOL diode 80 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1SR154-400
SYMBOL Misc\\EuropeanResistor 144 224 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -64 224 R0
SYMATTR InstName V1
SYMATTR Value ""
TEXT -64 400 Left 2 !.dc V1 0 20V
TEXT -64 424 Left 2 !.step temp list 0 25 50 100
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8608.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8608.asy)
L1 N003 OUT 2.2 Rser=3m
C2 N001 0 1
Rload OUT 0 2.5
V1 IN 0 24
C3 N002 N003 0.1
XU1 N002 N003 N001 N006 NC_01 N005 N004 NC_02 IN IN 0 LT8608 ;pnba BST)SW)INTVcc)RT)SYNC)FB)TR/SS)PG)VIN)EN/UV)GND
C5 OUT N005 10p
C1 N004 0 .001
R1 N006 0 18.2K
R3 N005 0 178K
C4 OUT 0 22 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
R2 OUT N005 976K
.tran 500u startup
.lib LT8608.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1044 680
WIRE 96 -64 0 -64
WIRE 256 -64 96 -64
WIRE 0 -48 0 -64
WIRE 256 -48 256 -64
WIRE 96 0 96 -64
WIRE 112 0 96 0
WIRE 416 0 400 0
WIRE 496 0 480 0
WIRE 0 48 0 32
WIRE 432 96 400 96
WIRE 432 112 432 96
WIRE 432 192 432 176
WIRE 432 192 400 192
WIRE 496 192 432 192
WIRE 608 192 576 192
WIRE 720 192 608 192
WIRE 816 192 720 192
WIRE 912 192 816 192
WIRE 608 208 608 192
WIRE 720 208 720 192
WIRE 816 208 816 192
WIRE 912 208 912 192
WIRE 32 288 0 288
WIRE 112 288 96 288
WIRE 608 288 400 288
WIRE 720 288 720 272
WIRE 720 288 608 288
WIRE 608 304 608 288
WIRE 816 304 816 272
WIRE 912 304 912 288
WIRE 16 384 0 384
WIRE 112 384 96 384
WIRE 416 384 400 384
WIRE 608 400 608 384
SYMBOL ind 480 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=3m
SYMBOL cap 416 112 R0
SYMATTR InstName C3
SYMATTR Value 0.1
SYMBOL cap 96 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .001
SYMBOL cap 416 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 112 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 18.2K
SYMBOL res 592 192 R0
SYMATTR InstName R2
SYMATTR Value 976K
SYMBOL cap 800 208 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL voltage 0 -64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 704 208 R0
SYMATTR InstName C5
SYMATTR Value 10p
SYMBOL res 896 192 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL LT8608 256 192 R0
SYMATTR InstName U1
SYMBOL res 592 288 R0
SYMATTR InstName R3
SYMATTR Value 178K
FLAG 0 384 0
FLAG 0 288 0
FLAG 0 48 0
FLAG 496 0 0
FLAG 816 304 0
FLAG 608 400 0
FLAG 912 304 0
FLAG 912 192 OUT
FLAG 0 -64 IN
FLAG 416 384 0
TEXT 736 384 Left 2 !.tran 500u startup
* Z:\tmp\asc_dec_bjh7r6w2\1992f4a77a7c_linear_regulator_fixed_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
C2 Vout 0 C
XU1 N002 Vout N001 LT1117 ;pnba ADJ)OUT)IN
R1 Vout N002 460
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1117.asy)
.lib LT1117.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 112 -112 112
WIRE 400 112 320 112
WIRE 464 112 400 112
WIRE 592 112 464 112
WIRE 400 160 400 112
WIRE 192 272 192 208
WIRE 400 272 400 240
WIRE 400 272 192 272
WIRE 304 368 304 320
WIRE 400 368 400 272
WIRE 496 368 496 320
WIRE 592 368 592 112
WIRE 400 480 400 448
WIRE 496 480 496 448
WIRE 592 480 592 432
SYMBOL cap 576 368 R0
SYMATTR InstName C2
SYMBOL PowerProducts\\LT1117 192 112 R0
SYMATTR InstName U1
SYMBOL res 384 144 R0
SYMATTR InstName R1
SYMATTR Value 460
FLAG 400 480 0
FLAG 464 112 Vout
FLAG 496 480 0
FLAG 592 480 0
* Z:\tmp\asc_dec_bjh7r6w2\07ca49e66ec5_logic_level_shifter_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vout 3V3 3V3_IN 3V3_IN NMOS
R1 3V3 3V3_IN 1k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1116 1080
WIRE 496 32 496 -16
WIRE 560 32 496 32
WIRE 496 48 496 32
WIRE 672 64 672 -16
WIRE 560 96 560 32
WIRE 496 144 496 128
WIRE 496 144 448 144
WIRE 544 144 496 144
WIRE 672 144 640 144
WIRE 816 144 672 144
SYMBOL nmos 640 96 R90
SYMATTR InstName M1
SYMBOL Res 480 32 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 448 144 3V3_IN
FLAG 672 -16 5V
FLAG 496 -16 3V3
FLAG 816 144 Vout
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1963A-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1963A-3.3.asy)
XU1 IN IN 0 OUT OUT LT1963-3.3 ;pnba _SHDN)IN)GND)OUT)SENSE
Rload OUT 0 1K
C1 OUT 0 1
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT1963.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 48 -208 48
WIRE 32 48 16 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 16 144 16 48
WIRE 32 144 16 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL PowerProducts\\LT1963A-3.3 176 96 R0
SYMATTR InstName U1
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG 512 48 OUT
FLAG -208 48 IN
TEXT 400 232 Left 2 !.tran 1