Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0c4244242f03_Draft102.asc
* Generated by LTspice 26.0.1 for Windows.
* Can just use a cmos op-amp running at 5V\nAnd a cmos comparator.\nGain has already been added.\nSo noise, and thermal wander of Vos. doesn't matter\nAnd the Vos is within the loop
* No. this isn't right. it is not at an input zero cross.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
;dc V1 0 10 0.01
D4 N002 P001 1N4148
D3 P002 N002 1N4148
R2 N002 N001 10k
D1 P001 N001 1N4148
D2 N001 P002 1N4148
R3 NC_01 N002 10k
V1 0 VEE 5
XU1 0 N001 VCC VEE VOUT LT1001 ;pnba In+)In-)V+)V-)OUT
R1 N001 N003 10k
V2 VCC 0 5
VIN N003 0 SINE(0 10 50)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1316 680
WIRE 96 -160 -16 -160
WIRE 368 -80 368 -160
WIRE 496 -80 496 -160
WIRE 368 -32 368 -80
WIRE 368 -32 224 -32
WIRE 368 0 368 -32
WIRE 400 0 368 0
WIRE 496 0 496 -80
WIRE 496 0 480 0
WIRE 288 80 -48 80
WIRE 368 80 368 0
WIRE 384 80 368 80
WIRE 560 96 448 96
WIRE 384 112 368 112
WIRE -48 128 -48 80
SYMBOL diode 368 -144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 34 179 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL voltage -48 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value SINE(0 10 50)
SYMATTR InstName VIN
SYMBOL voltage -16 -176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 55 55 Left 2
SYMATTR Value 5
SYMATTR InstName V1
SYMBOL diode 432 -144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 13 187 VBottom 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL diode 496 -96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 -5 -113 VTop 2
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL OpAmps\\OP07 416 32 R0
WINDOW 0 40 50 Left 2
SYMATTR InstName U1
SYMBOL res 384 64 R90
WINDOW 0 -23 59 VBottom 2
WINDOW 3 -25 66 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -16 -256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 55 55 Left 2
SYMATTR Value 5
SYMATTR InstName V2
SYMBOL res 496 -16 R90
WINDOW 0 -12 -47 VBottom 2
WINDOW 3 -2 -48 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL diode 432 -96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 -35 -122 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 592 -16 R90
WINDOW 0 -12 -47 VBottom 2
WINDOW 3 -2 -48 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
FLAG -48 208 0
FLAG 96 -160 0
FLAG 560 96 VOUT
FLAG 368 112 0
FLAG -16 -240 VCC
FLAG 416 64 VCC
FLAG -16 -80 VEE
FLAG 416 128 VEE
FLAG 144 -32 VEE
TEXT -120 232 Left 2 !;dc V1 0 10 0.01
TEXT -136 368 Left 2 !.tran 0.1
TEXT 704 -160 Left 2 ;Can just use a cmos op-amp running at 5V\nAnd a cmos comparator.\nGain has already been added.\nSo  noise, and thermal wander of Vos. doesn't matter\nAnd the Vos is within the loop
TEXT 720 48 Left 2 ;No. this isn't right. it is not at an input  zero cross.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2935-2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 PWL(0 0 3.6 3.6 16 3.6 19.6 0 20.1 0 23.7 3.6)
V2 N005 0 PWL(0 0 9.599 0 9.6 3.6 9.999 3.6 10 0)
XU1 0 0 0 0 N003 N002 N004 N001 LTC2935-2 ;pnba S2)S1)S0)GND)_PFO)_RST)MR)VCC
MQ1 N004 N005 0 0 BSS123
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 21
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2935-2.asy)
.lib LTC2935-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1052 680
WIRE 192 -64 -256 -64
WIRE 192 -48 192 -64
WIRE 96 0 80 0
WIRE 336 0 288 0
WIRE 96 80 80 80
WIRE 336 80 288 80
WIRE 96 160 80 160
WIRE 400 160 288 160
WIRE 400 176 400 160
WIRE -256 192 -256 -64
WIRE 192 224 192 208
WIRE 544 256 448 256
WIRE 544 272 544 256
WIRE -256 304 -256 272
WIRE 400 304 400 272
WIRE 544 368 544 352
FLAG 192 224 0
FLAG 544 368 0
FLAG -256 304 0
FLAG 400 304 0
FLAG 80 160 0
FLAG 80 80 0
FLAG 80 0 0
SYMBOL voltage -256 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 3.6 3.6 16 3.6 19.6 0 20.1 0 23.7 3.6)
SYMBOL voltage 544 256 R0
SYMATTR InstName V2
SYMATTR Value PWL(0 0 9.599 0 9.6 3.6 9.999 3.6 10 0)
SYMBOL LTC2935-2 192 80 R0
SYMATTR InstName U1
SYMBOL nmos 448 176 M0
WINDOW 0 39 -6 Right 2
WINDOW 3 32 97 Right 2
SYMATTR InstName Q1
SYMATTR Value BSS123
TEXT 152 352 Left 2 !.tran 21
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP124-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP124-3.3.asy)
V1 IN 0 5.5
XU1 OUT MP_01 OUT 0 IN MP_02 MP_03 IN ADP124 K=35714.3 ;pnba Vout))Sense)GND)En)))Vin
Rload OUT 0 100
C2 OUT 0 1
C1 IN 0 1
.tran 10m startup
.lib ADP124.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 384 96 352 96
WIRE 432 96 384 96
WIRE 512 96 432 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 432 112 432 96
WIRE 512 112 512 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 384 208 384 96
WIRE 384 208 352 208
WIRE 432 208 432 176
WIRE 512 208 512 192
WIRE 256 272 256 256
SYMBOL ADP124-3.3 256 208 R0
SYMATTR InstName U1
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 416 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
FLAG 0 208 0
FLAG 256 272 0
FLAG 432 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT4422.asc
* Generated by LTspice 26.0.1 for Windows.
C1 IN 0 0.1
V1 IN 0 12
C2 OUT 0 47
R1 OUT 0 2
XU1 IN IN OUT NC_01 0 LT4422 ;pnba SHDN#)IN)OUT)STATUS)GND
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT4422.asy)
.lib LT4422.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -192 96 -208 96
WIRE -96 96 -192 96
WIRE -32 96 -96 96
WIRE 16 96 -32 96
WIRE 608 96 480 96
WIRE 688 96 608 96
WIRE 720 96 688 96
WIRE -208 144 -208 96
WIRE 608 144 608 96
WIRE 720 144 720 96
WIRE -96 160 -96 96
WIRE -32 176 -32 96
WIRE 16 176 -32 176
WIRE 608 256 608 208
WIRE 720 256 720 224
WIRE -208 272 -208 224
WIRE -96 272 -96 224
WIRE 240 336 240 272
FLAG 240 336 0
FLAG -96 272 0
FLAG 608 256 0
FLAG -208 272 0
FLAG -192 96 IN
FLAG 688 96 OUT
FLAG 720 256 0
SYMBOL cap -112 160 R0
SYMATTR InstName C1
SYMATTR Value 0.1
SYMBOL voltage -208 128 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 592 144 R0
SYMATTR InstName C2
SYMATTR Value 47
SYMBOL res 704 128 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL LT4422 240 160 R0
SYMATTR InstName U1
TEXT -216 360 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL40502-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL40502-1.8.asy)
Rload vOUT 0 9
V1 vIN 0 2.3
C1 vOUT 0 1 Rser=1m
XU1 vIN 0 vIN vOUT ADPL40502-1.8 ;pnba Vin)GND)EN)Vout
.tran 1m startup
.lib ADPL40502-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2808 1464
WIRE 1824 880 1728 880
WIRE 1984 880 1824 880
WIRE 1728 896 1728 880
WIRE 1984 896 1984 880
WIRE 1728 992 1728 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMATTR SpiceLine Rser=1m
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 9
SYMBOL VOLTAGE 1728 880 R0
SYMATTR InstName V1
SYMATTR Value 2.3
SYMBOL ADPL40502-1.8 1984 1024 R0
SYMATTR InstName U1
FLAG 2256 1024 vOUT
FLAG 2256 1136 0
FLAG 1728 992 0
FLAG 1728 880 vIN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7182-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7182-2.5.asy)
R1 OUT 0 50
C1 IN 0 2.2
XU1 OUT MP_01 MP_02 N001 MP_03 0 IN ADP7182-x.x Rset=500k ;pnba Vout)))EN))GND)Vin
C2 OUT 0 2.2
V2 N001 0 PULSE(0 2 200u 1n 1n 10m)
V1 IN 0 -8
.tran 1m
.lib ADP7182-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 -80 -48
WIRE 112 -48 32 -48
WIRE 432 -48 368 -48
WIRE 544 -48 432 -48
WIRE -80 -32 -80 -48
WIRE 32 -32 32 -48
WIRE 432 -32 432 -48
WIRE 544 -32 544 -48
WIRE -80 64 -80 48
WIRE 32 64 32 32
WIRE 432 64 432 32
WIRE 544 64 544 48
WIRE 112 144 32 144
WIRE 32 160 32 144
WIRE 32 256 32 240
WIRE 240 256 240 208
SYMBOL voltage -80 -48 R0
SYMATTR InstName V1
SYMATTR Value -8
SYMBOL ADP7182-2.5 240 48 R0
SYMATTR InstName U1
SYMBOL voltage 32 144 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 200u 1n 1n 10m)
SYMBOL res 528 -48 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 2.2
SYMBOL cap 16 -32 R0
SYMATTR InstName C1
SYMATTR Value 2.2
FLAG -80 64 0
FLAG 32 64 0
FLAG 432 64 0
FLAG 32 256 0
FLAG 240 256 0
FLAG 544 64 0
FLAG 32 -48 IN
FLAG 432 -48 OUT
TEXT 528 248 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\5bc275d26aba_1002.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
R1 N003 N001 10K
R2 N001 0 100K
V3 IN- IN+ SINE(0 1m 100)
XU1 IN- N001 +V -V N003 LT1001 ;pnba In+)In-)V+)V-)OUT
XU2 IN+ N002 +V -V OUT LT1001 ;pnba In+)In-)V+)V-)OUT
R3 N002 N001 2.2K
R4 N002 N003 10K
R5 OUT N002 100K
V4 IN+ 0 SINE(0 1 10)
.tran 300m
* Two Op Amp Instrumentation Amplifier
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1002.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 272 48 128 48
WIRE 384 48 352 48
WIRE 416 48 384 48
WIRE 528 48 496 48
WIRE -256 64 -256 48
WIRE -128 64 -128 48
WIRE 32 112 16 112
WIRE 128 112 128 48
WIRE 128 112 112 112
WIRE 160 112 128 112
WIRE 272 112 240 112
WIRE -256 160 -256 144
WIRE -128 160 -128 144
WIRE 192 208 192 192
WIRE 128 224 128 112
WIRE 160 224 128 224
WIRE 432 224 432 208
WIRE 272 240 272 112
WIRE 272 240 224 240
WIRE 288 240 272 240
WIRE 384 240 384 48
WIRE 384 240 368 240
WIRE 400 240 384 240
WIRE 48 256 -96 256
WIRE 160 256 48 256
WIRE 528 256 528 48
WIRE 528 256 464 256
WIRE 560 256 528 256
WIRE -96 272 -96 256
WIRE 400 272 384 272
WIRE 192 288 192 272
WIRE 432 304 432 288
WIRE -96 384 -96 352
WIRE 192 384 -96 384
WIRE 384 384 384 272
WIRE 384 384 192 384
WIRE -96 400 -96 384
WIRE -96 496 -96 480
FLAG -128 160 0
FLAG 192 192 +V
FLAG -128 48 +V
FLAG 192 288 -V
FLAG -256 160 0
FLAG -256 48 -V
FLAG 16 112 0
FLAG -96 496 0
FLAG 432 208 +V
FLAG 432 304 -V
FLAG 48 256 IN-
FLAG 192 384 IN+
FLAG 560 256 OUT
SYMBOL voltage -128 48 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -256 48 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL voltage -96 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1m 100)
SYMBOL opamps\\LT1002 192 176 R0
SYMATTR InstName U1
SYMBOL opamps\\LT1002 432 192 R0
SYMATTR InstName U2
SYMBOL res 368 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2.2K
SYMBOL res 384 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 512 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 100K
SYMBOL voltage -96 384 R0
SYMATTR InstName V4
SYMATTR Value SINE(0 1 10)
TEXT 440 392 Left 2 !.tran 300m
TEXT -32 -32 Left 2 ;Two Op Amp Instrumentation Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\5fe3bbe1638b_Draft5.asc
* Generated by LTspice 26.0.1 for Windows.
VE a 0 6.0
R b a 220 tol=1 pwr=0.1
D 0 b D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 64 80 64
WIRE 208 64 144 64
WIRE 352 64 288 64
WIRE 400 64 352 64
WIRE 80 144 80 64
WIRE 400 144 400 64
WIRE 400 224 400 208
WIRE 80 240 80 224
WIRE 400 240 400 224
WIRE 400 240 80 240
WIRE 80 256 80 240
FLAG 80 256 0
FLAG 144 64 a
FLAG 352 64 b
FLAG 400 224 c
SYMBOL voltage 80 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName E
SYMATTR Value 6.0
SYMBOL res 304 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R
SYMATTR Value 220
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL diode 416 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D
TEXT 46 280 Left 2 !.tran 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1762-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1762-1.5.asy)
V1 IN 0 1.8
R2 N001 IN 50K
C4 OUT 0 10
C3 N002 0 1
C2 N003 0 10n
C1 N004 0 1
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1762 Radj=10K ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
R1 OUT 0 1
.tran 1m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL ADP1762-1.5 224 176 R0
SYMATTR InstName U1
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value 1
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4210-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4210-1.asy)
C2 N004 0 .01
MQ1 N001 N002 OUT OUT Si4410DY
XU1 N005 0 IN N003 N001 IN LTC4210-1 ;pnba Timer)Gnd)On)Gate)Sense)Vcc
R1 N002 N003 100
C3 N005 0 .22
V1 IN 0 PWL(0 0 15m 0 15.001m 5)
R3 N001 IN .01
C1 OUT 0 470
R2 N003 N004 100
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m
.lib LTC4210-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 -16 -320 -16
WIRE 160 -16 64 -16
WIRE 208 -16 160 -16
WIRE 320 -16 288 -16
WIRE 432 -16 320 -16
WIRE 640 -16 528 -16
WIRE -320 0 -320 -16
WIRE 640 0 640 -16
WIRE 512 48 512 32
WIRE 160 80 160 -16
WIRE 320 80 320 -16
WIRE 640 80 640 64
WIRE -320 96 -320 80
WIRE 64 192 64 -16
WIRE 112 192 64 192
WIRE 512 192 512 128
WIRE 512 192 368 192
WIRE 512 208 512 192
WIRE 512 304 512 288
WIRE 160 320 160 304
WIRE 320 320 320 304
WIRE 512 384 512 368
WIRE 160 400 160 384
SYMBOL cap 144 320 R0
SYMATTR InstName C3
SYMATTR Value .22
SYMBOL res 496 32 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 496 192 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL cap 624 0 R0
SYMATTR InstName C1
SYMATTR Value 470
SYMBOL res 304 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value .01
SYMBOL PowerProducts\\LTC4210-1 240 192 R0
WINDOW 0 1 -42 Center 2
WINDOW 3 2 38 Center 2
SYMATTR InstName U1
SYMBOL nmos 432 32 R270
WINDOW 0 56 41 VTop 2
WINDOW 3 -14 74 VLeft 2
SYMATTR InstName Q1
SYMATTR Value Si4410DY
SYMBOL cap 496 304 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL voltage -320 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 15m 0 15.001m 5)
FLAG 320 320 0
FLAG 640 80 0
FLAG 512 384 0
FLAG 160 400 0
FLAG -320 96 0
FLAG 640 -16 OUT
FLAG -320 -16 IN
TEXT 616 360 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\24e3cf5706e8_Comparator_with_hysteresis.asc
* Generated by LTspice 26.0.1 for Windows.
* Comparator with hysteresis
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8552.asy)
R2 IN1 0 180k
R1 N001 IN1 220k
V1 N001 0 PWL(0 3.6 1 2.5 2 2.5 3 2.5 4 2.5 5 3.6 6 3.7 7 3.7 8 3.8 9 3.9)
V2 Vcc 0 5
XU1 REF1 IN1 Vcc 0 OUT AD8552 ;pnba In+)In-)V+)V-)OUT
R4 REF1 0 10k
R3 OUT REF1 150k
R5 Vcc REF1 32k
.tran 0 10 0 0.001
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 948 680
WIRE 256 176 128 176
WIRE 880 176 736 176
WIRE 256 192 256 176
WIRE 880 192 880 176
WIRE 128 272 128 176
WIRE 464 272 464 256
WIRE 736 272 736 176
WIRE 256 288 256 272
WIRE 432 288 256 288
WIRE 256 304 256 288
WIRE 576 304 496 304
WIRE 624 304 576 304
WIRE 880 304 880 272
WIRE 352 320 352 256
WIRE 432 320 352 320
WIRE 256 336 256 304
WIRE 880 336 880 304
WIRE 464 352 464 336
WIRE 352 384 352 320
WIRE 528 384 352 384
WIRE 624 384 624 304
WIRE 624 384 608 384
WIRE 128 432 128 352
WIRE 256 432 256 416
WIRE 256 432 128 432
WIRE 736 432 736 352
WIRE 736 432 256 432
WIRE 880 432 880 416
WIRE 880 432 736 432
WIRE 880 448 880 432
SYMBOL res 896 320 M0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL voltage 128 256 R0
WINDOW 3 -17 221 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PWL(0 3.6 1 2.5 2 2.5 3 2.5 4 2.5 5 3.6 6 3.7 7 3.7 8 3.8 9 3.9)
SYMATTR InstName V1
SYMBOL voltage 736 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 864 176 R0
SYMATTR InstName R5
SYMATTR Value 32k
SYMBOL res 240 320 R0
SYMATTR InstName R2
SYMATTR Value 180k
SYMBOL res 624 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 150k
SYMBOL res 240 176 R0
SYMATTR InstName R1
SYMATTR Value 220k
SYMBOL OpAmps\\AD8552 464 240 R0
WINDOW 0 42 -11 Left 2
WINDOW 3 42 12 Left 2
SYMATTR InstName U1
FLAG 736 176 Vcc
FLAG 880 304 REF1
FLAG 464 256 Vcc
FLAG 464 352 0
FLAG 880 448 0
FLAG 352 256 REF1
FLAG 576 304 OUT
FLAG 256 304 IN1
TEXT 128 104 Left 2 ;Comparator with hysteresis
TEXT 128 136 Left 2 !.tran 0 10 0 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP172-1.7.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP172-1.7.asy)
XU1 OUT IN IN 0 ADP172-1.7 ;pnba Vout)Vin)En)GND
V1 IN 0 3.6
RLOAD OUT 0 5.69
C1 OUT 0 1
.tran 2m startup
.lib ADP172-1.7.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 80 -48 80
WIRE 48 80 -32 80
WIRE 64 80 48 80
WIRE 304 80 256 80
WIRE 336 80 304 80
WIRE 384 80 336 80
WIRE -48 96 -48 80
WIRE 304 96 304 80
WIRE 304 176 304 160
WIRE 384 176 384 160
WIRE -48 192 -48 176
WIRE 48 192 48 80
WIRE 64 192 48 192
WIRE 272 192 256 192
SYMBOL cap 288 96 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ADP172-1.7 160 192 R0
SYMATTR InstName U1
SYMBOL res 368 64 R0
SYMATTR InstName RLOAD
SYMATTR Value 5.69
SYMBOL voltage -48 80 R0
SYMATTR InstName V1
SYMATTR Value 3.6
FLAG -48 192 0
FLAG 304 176 0
FLAG 272 192 0
FLAG 384 176 0
FLAG -32 80 IN
FLAG 336 80 OUT
TEXT 160 256 Center 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1173-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1173-5.asy)
C2 OUT 0 100 Rser=0.02
V1 IN 0 3
XU1 IN IN N001 0 0 MP_01 MP_02 OUT LT1173 top=753K bot=250K ;pnba Ilim)Vin)SW1)SW2)GND)))Sense
Rload OUT 0 25
D1 N001 OUT MBRS140
L1 IN N001 100 Rser=0.02 Rpar=5000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m startup
.lib LT1173.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2528 1408
WIRE 1472 912 1328 912
WIRE 1600 912 1472 912
WIRE 1632 912 1600 912
WIRE 1744 912 1712 912
WIRE 1792 912 1744 912
WIRE 1888 912 1856 912
WIRE 1984 912 1888 912
WIRE 1328 928 1328 912
WIRE 1984 928 1984 912
WIRE 1472 960 1472 912
WIRE 1600 960 1600 912
WIRE 1328 1024 1328 1008
WIRE 1984 1024 1984 1008
WIRE 1744 1040 1744 912
WIRE 1744 1040 1664 1040
WIRE 1888 1104 1888 912
WIRE 1888 1104 1664 1104
WIRE 1888 1120 1888 1104
WIRE 1696 1168 1664 1168
WIRE 1888 1200 1888 1184
WIRE 1536 1264 1536 1248
SYMBOL VOLTAGE 1328 912 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL schottky 1792 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL res 1968 912 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL IND 1616 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL PowerProducts\\LT1173-5 1536 1104 R0
SYMATTR InstName U1
SYMBOL POLCAP 1872 1120 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
FLAG 1536 1264 0
FLAG 1696 1168 0
FLAG 1984 1024 0
FLAG 1888 1200 0
FLAG 1328 1024 0
FLAG 1984 912 OUT
FLAG 1328 912 IN
TEXT 1712 1248 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\945dd535d21e_MOSFET_output.asc
* Generated by LTspice 26.0.1 for Windows.
VDS N001 0 1
M1 N001 N002 0 0 MC8
VGS N002 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VDS 0 5 0.01 VGS 0.6 1 0.1
.model MC8 NMOS (KP=60e-3 VTO=0.5 LAMBDA=0)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1412 680
WIRE 320 80 160 80
WIRE 160 112 160 80
WIRE 320 128 320 80
WIRE 240 160 160 160
WIRE 112 192 32 192
WIRE 32 208 32 192
WIRE 160 288 160 208
WIRE 240 288 240 160
WIRE 320 288 320 208
WIRE 32 320 32 288
SYMBOL voltage 32 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 0
SYMBOL nmos4 112 112 R0
SYMATTR InstName M1
SYMATTR Value MC8
SYMBOL voltage 320 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 1
FLAG 32 320 0
FLAG 160 288 0
FLAG 320 288 0
FLAG 240 288 0
TEXT 8 368 Left 2 !.dc VDS 0 5 0.01 VGS 0.6 1 0.1
TEXT 8 408 Left 2 !.model MC8 NMOS (KP=60e-3 VTO=0.5 LAMBDA=0)