Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2503-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
* PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2503-2.8.asy)
Rload OUT 0 10
V1 IN 0 3.3
L1 N001 N002 1.5 Rser=80m
XU1 N001 N002 OUT IN IN 0 OUT NC_01 ADP2503-2.8 ;pnba SW1)SW2)FB)EN)PVin)GND)Vout)Sync
C1 OUT 0 18
.tran 400u startup
.lib ADP2503-2.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 48 64 32 64
WIRE 336 64 304 64
WIRE -64 80 -64 64
WIRE 32 144 32 64
WIRE 48 144 32 144
WIRE 336 144 304 144
WIRE -64 176 -64 160
WIRE 320 224 304 224
WIRE 368 224 320 224
WIRE 480 224 368 224
WIRE 368 240 368 224
WIRE 480 240 480 224
WIRE 48 304 32 304
WIRE 320 304 320 224
WIRE 320 304 304 304
WIRE 368 336 368 304
WIRE 480 336 480 320
SYMBOL ADP2503-2.8 176 176 R0
SYMATTR InstName U1
SYMBOL ind 320 48 R0
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=80m
SYMBOL res 464 224 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL voltage -64 64 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap 352 240 R0
SYMATTR InstName C1
SYMATTR Value 18
FLAG 368 336 0
FLAG 32 304 0
FLAG -64 176 0
FLAG 480 336 0
FLAG -64 64 IN
FLAG 480 224 OUT
TEXT 400 400 Left 2 !.tran 400u startup
TEXT 184 0 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1568.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\FilterProducts\LT1568.asy)
R3 N004 N003 511
C1 N009 0 .1
V2 IN 0 2.5 AC 1
R1 N001 N002 511
R5 N004 N006 511
R4 IN N004 511
R2 IN N001 511
R6 N001 N005 511
V1 +V 0 5
XU1 +V N002 N001 N005 N007 N009 NC_01 0 0 0 N009 N008 N006 N004 N003 +V LT1568 ;pnba V+)INVA)SA)OUTA)_OUTA)GNDA)NC)V-)V-)_EN)GNDB)_OUTB)OUTB)SB)INVB)V+
.ac oct 100 1 100Meg
.lib LT1568.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1940 800
WIRE 1920 -112 1056 -112
WIRE 1296 -32 1264 -32
WIRE 1712 -32 1680 -32
WIRE 1056 48 1056 -112
WIRE 1056 48 816 48
WIRE 1072 48 1056 48
WIRE 1168 48 1152 48
WIRE 1184 48 1168 48
WIRE 1296 48 1264 48
WIRE 1712 48 1680 48
WIRE 1808 48 1792 48
WIRE 1824 48 1808 48
WIRE 1920 48 1920 -112
WIRE 1920 48 1904 48
WIRE 816 64 816 48
WIRE 1168 128 1168 48
WIRE 1296 128 1168 128
WIRE 1808 128 1808 48
WIRE 1808 128 1680 128
WIRE 816 160 816 144
WIRE 1168 208 1168 128
WIRE 1200 208 1168 208
WIRE 1296 208 1280 208
WIRE 1696 208 1680 208
WIRE 1808 208 1808 128
WIRE 1808 208 1776 208
WIRE 1296 288 1200 288
WIRE 1776 288 1680 288
WIRE 1296 368 1232 368
WIRE 1744 368 1680 368
WIRE 1696 448 1680 448
WIRE 928 496 928 480
WIRE 1296 528 1280 528
WIRE 1696 528 1680 528
WIRE 928 592 928 576
WIRE 1232 592 1232 368
WIRE 1744 592 1744 368
WIRE 1744 592 1232 592
WIRE 1744 608 1744 592
WIRE 1744 688 1744 672
SYMBOL voltage 816 48 R0
WINDOW 123 39 56 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value2 AC 1
SYMATTR Value 2.5
SYMATTR InstName V2
SYMBOL res 1168 32 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 511
SYMBOL FilterProducts\\LT1568 1488 384 R0
SYMATTR InstName U1
SYMBOL res 1792 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 511
SYMBOL voltage 928 480 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 1920 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 511
SYMBOL res 1184 192 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 511
SYMBOL res 1056 32 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 511
SYMBOL cap 1728 608 R0
WINDOW 3 26 57 Left 2
SYMATTR Value .1
SYMATTR InstName C1
SYMBOL res 1808 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 511
FLAG 928 592 0
FLAG 928 480 +V
FLAG 816 160 0
FLAG 1264 -32 +V
FLAG 1712 -32 +V
FLAG 1696 528 0
FLAG 1280 528 0
FLAG 1696 448 0
FLAG 1744 688 0
FLAG 816 48 IN
TEXT 1352 640 Left 2 !.ac oct 100 1 100Meg
* Z:\tmp\asc_dec_bjh7r6w2\0a2d2285757c_nonInvertingStage_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V3 0 N006 12
R2 N001 0 1k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 680
WIRE 384 208 320 208
WIRE 544 208 464 208
WIRE 432 272 432 128
WIRE 176 288 144 288
WIRE 320 288 320 208
WIRE 320 288 256 288
WIRE 400 288 320 288
WIRE 544 304 464 304
WIRE 144 320 144 288
WIRE 400 320 304 320
WIRE 304 384 304 320
WIRE 432 448 432 336
SYMBOL voltage 432 544 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V3
SYMATTR Value 12
SYMBOL res 272 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 144 320 0
FLAG 304 464 0
FLAG 432 528 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2960-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Automotive Supervisor (H-Grade)
* 12V
* 3.3V
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3008-3.3.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2960-3.asy)
R4 N003 0 1Meg
C2 OUT 0 22
R1 IN N002 825K
XU2 OUT OUT _UV N001 0 N001 N003 N002 LTC2960-3 ;pnba Vin)DVCC)_RST)OUT)GND)_MR)ADJ)IN+
XU1 IN OUT OUT 0 IN LT3008-3.3 ;pnba IN)OUT)Sense)GND)_SHDN
R3 OUT N003 6.04Meg
R2 N002 0 80.6K
Vbat IN 0 PWL(0 0 20 28 40 0)
.tran 40
.lib LT3009.lib
.lib LTC2960-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3200 984
WIRE -2016 -7168 -2032 -7168
WIRE -1664 -7168 -2016 -7168
WIRE -1616 -7168 -1664 -7168
WIRE -1600 -7168 -1616 -7168
WIRE -1280 -7168 -1312 -7168
WIRE -1072 -7168 -1280 -7168
WIRE -944 -7168 -1072 -7168
WIRE -816 -7168 -944 -7168
WIRE -672 -7168 -816 -7168
WIRE -2032 -7152 -2032 -7168
WIRE -672 -7152 -672 -7168
WIRE -928 -7120 -1200 -7120
WIRE -1072 -7104 -1072 -7168
WIRE -1616 -7072 -1616 -7168
WIRE -1600 -7072 -1616 -7072
WIRE -1280 -7072 -1280 -7168
WIRE -1280 -7072 -1312 -7072
WIRE -672 -7072 -672 -7088
WIRE -2032 -7056 -2032 -7072
WIRE -1200 -7056 -1200 -7120
WIRE -1184 -7056 -1200 -7056
WIRE -944 -7056 -944 -7168
WIRE -944 -7056 -960 -7056
WIRE -1664 -7040 -1664 -7168
WIRE -1456 -6976 -1456 -7008
WIRE -1664 -6944 -1664 -6960
WIRE -1184 -6944 -1664 -6944
WIRE -928 -6944 -928 -7120
WIRE -928 -6944 -960 -6944
WIRE -1664 -6928 -1664 -6944
WIRE -1664 -6832 -1664 -6848
WIRE -1184 -6832 -1216 -6832
WIRE -912 -6832 -960 -6832
WIRE -816 -6832 -816 -7168
WIRE -1072 -6768 -1072 -6784
WIRE -1216 -6736 -1216 -6832
WIRE -816 -6736 -816 -6752
WIRE -816 -6736 -1216 -6736
WIRE -816 -6720 -816 -6736
WIRE -816 -6624 -816 -6640
SYMBOL PowerProducts\\LT3008-3.3 -1456 -7120 R0
SYMATTR InstName U1
SYMBOL voltage -2032 -7168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vbat
SYMATTR Value PWL(0 0 20 28 40 0)
SYMBOL res -832 -6848 R0
SYMATTR InstName R3
SYMATTR Value 6.04Meg
SYMBOL res -1680 -7056 R0
SYMATTR InstName R1
SYMATTR Value 825K
SYMBOL res -832 -6736 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL res -1680 -6944 R0
SYMATTR InstName R2
SYMATTR Value 80.6K
SYMBOL cap -688 -7152 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL LTC2960-3 -1072 -6944 R0
SYMATTR InstName U2
FLAG -1664 -6832 0
FLAG -816 -6624 0
FLAG -672 -7168 OUT
FLAG -2032 -7056 0
FLAG -1072 -6768 0
FLAG -912 -6832 _UV
FLAG -1456 -6976 0
FLAG -672 -7072 0
FLAG -2016 -7168 IN
TEXT -1368 -7248 Bottom 2 ;Automotive Supervisor (H-Grade)
TEXT -2024 -7208 Bottom 2 ;12V
TEXT -896 -7168 Bottom 2 ;3.3V
TEXT -688 -6656 Left 2 !.tran 40
* Z:\home\khalils\Downloads\files\data\raw_asc\0c6b576e1d4a_Power_Transistors.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc V5 0 5 0.5
* .dc V6 0 5 0.5
V5 N013 N015 V
R4 N010 N014 330
R2 N001 N003 3300
Q1 N003 N006 0 0 NPN
V3 N007 0 V
R1 N006 N005 10k
V6 N014 N016 V
Q2 N004 N008 0 0 NPN
M2 N010 N012 N016 N016 NMOS
V1 N005 0 V
M1 N009 N011 N015 N015 NMOS
V4 N002 0 V
V2 N001 0 V
R3 N009 N013 330
R5 N002 N004 330
R6 N008 N007 1k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V1 0 100 1 V2 0 100 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2488 1304
WIRE 464 0 240 0
WIRE 1440 0 1216 0
WIRE 464 80 464 0
WIRE 1440 80 1440 0
WIRE 240 96 240 0
WIRE 1216 96 1216 0
WIRE 240 208 240 176
WIRE 1216 208 1216 176
WIRE -80 256 -160 256
WIRE 176 256 0 256
WIRE 896 256 816 256
WIRE 1152 256 976 256
WIRE -160 304 -160 256
WIRE 816 304 816 256
WIRE -160 464 -160 384
WIRE 240 464 240 304
WIRE 240 464 -160 464
WIRE 464 464 464 160
WIRE 464 464 240 464
WIRE 816 464 816 384
WIRE 1216 464 1216 304
WIRE 1216 464 816 464
WIRE 1440 464 1440 160
WIRE 1440 464 1216 464
WIRE 240 528 240 464
WIRE 1216 528 1216 464
WIRE 576 816 240 816
WIRE 1472 816 1136 816
WIRE 240 960 240 816
WIRE 1136 960 1136 816
WIRE 576 976 576 816
WIRE 1472 976 1472 816
WIRE 192 1040 128 1040
WIRE 1088 1040 1008 1040
WIRE 576 1152 576 1056
WIRE 1472 1152 1472 1056
WIRE 240 1296 240 1056
WIRE 240 1296 128 1296
WIRE 576 1296 576 1232
WIRE 576 1296 240 1296
WIRE 1136 1296 1136 1056
WIRE 1136 1296 1008 1296
WIRE 1472 1296 1472 1232
WIRE 1472 1296 1136 1296
SYMBOL res 16 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 464 64 R0
SYMATTR InstName V2
SYMBOL res 992 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 1k
SYMBOL voltage 816 288 R0
SYMATTR InstName V3
SYMBOL res 1200 80 R0
SYMATTR InstName R5
SYMATTR Value 330
SYMBOL npn 1152 208 R0
SYMATTR InstName Q2
SYMBOL res 1456 960 R0
SYMATTR InstName R4
SYMATTR Value 330
SYMBOL voltage 1472 1136 R0
SYMATTR InstName V6
SYMBOL res 560 960 R0
SYMATTR InstName R3
SYMATTR Value 330
SYMBOL npn 176 208 R0
SYMATTR InstName Q1
SYMBOL voltage 1440 64 R0
SYMATTR InstName V4
SYMBOL res 224 80 R0
SYMATTR InstName R2
SYMATTR Value 3300
SYMBOL nmos 192 960 R0
SYMATTR InstName M1
SYMBOL nmos 1088 960 R0
SYMATTR InstName M2
SYMBOL voltage -160 288 R0
SYMATTR InstName V1
SYMBOL voltage 576 1136 R0
SYMATTR InstName V5
FLAG 240 528 0
FLAG 1216 528 0
TEXT -200 -120 Left 2 !.dc V1 0 100 1 V2 0 100 10
TEXT -168 752 Left 2 ;.dc V5 0 5 0.5
TEXT 912 744 Left 2 ;.dc V6 0 5 0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\084b9bbd5d43_BT-CE-SWITCH-VIN-2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 a 0 PULSE({Vin} 0 1u 1n 1n 4u 8u)
Q1 c N002 0 0 2N3904
Rb N002 a 10k
Rc N001 c 1k
V2 N001 0 {Vcc}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 8u
.step param Vin list 3V 1.5V
.measure toff TRIG v(a) VAL=1 FALL=1 TARG V(c) VAL={Vcc/2} RISE=1
.param Vcc=5V
.measure ton TRIG v(a) VAL=1 RISE=1 TARG V(c) VAL={Vcc/2} FALL=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 -96 208 -96
WIRE 208 -64 208 -96
WIRE 416 32 416 -96
WIRE 208 48 208 16
WIRE 208 80 208 48
WIRE -64 128 -80 128
WIRE 0 128 -64 128
WIRE 144 128 80 128
WIRE -80 144 -80 128
WIRE -80 240 -80 224
WIRE 208 240 208 176
WIRE 416 240 416 112
SYMBOL Misc\\EuropeanResistor 96 112 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName Rb
SYMATTR Value 10k
SYMBOL Misc\\EuropeanResistor 192 -80 R0
SYMATTR InstName Rc
SYMATTR Value 1k
SYMBOL voltage -80 128 R0
WINDOW 3 -3 164 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 42 61 Left 2
SYMATTR Value PULSE({Vin} 0 1u 1n 1n 4u 8u)
SYMATTR InstName V1
SYMBOL npn 144 80 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage 416 16 R0
WINDOW 3 22 18 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 18 -11 Left 2
SYMATTR Value {Vcc}
SYMATTR InstName V2
FLAG 208 240 0
FLAG -80 240 0
FLAG 416 240 0
FLAG -64 128 a
FLAG 208 48 c
TEXT -216 336 Left 2 !.tran 8u
TEXT -216 368 Left 2 !.step param Vin list 3V 1.5V
TEXT -216 432 Left 2 !.measure toff TRIG v(a) VAL=1 FALL=1 TARG V(c) VAL={Vcc/2} RISE=1
TEXT -216 400 Left 2 !.param Vcc=5V
TEXT -216 464 Left 2 !.measure ton TRIG v(a) VAL=1 RISE=1 TARG V(c) VAL={Vcc/2} FALL=1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP5300-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP5300-1.asy)
R1 OUT N001 1Meg
L1 N002 OUT 2.2 Rser=80m
Rload OUT 0 36
C1 OUT 0 10
XU1 IN IN 0 N003 OUT N001 0 0 N002 0 ADP5300-1 OVO=0 OD=0 ;pnba EN)PVin)Sync/Mode)VID)FB)VoutOK)Pgnd)Agnd)SW)Stop
V1 IN 0 5
R2 N003 0 19.6K
.tran 1m startup
.lib ADP5300-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 64 64 64
WIRE 160 64 144 64
WIRE 496 64 416 64
WIRE 608 64 576 64
WIRE 64 80 64 64
WIRE 144 144 144 64
WIRE 160 144 144 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 608 144 608 64
WIRE 608 144 560 144
WIRE 688 144 608 144
WIRE 608 160 608 144
WIRE 688 160 688 144
WIRE 64 176 64 160
WIRE 160 224 144 224
WIRE 560 224 560 144
WIRE 560 224 416 224
WIRE 608 256 608 224
WIRE 688 256 688 240
WIRE 160 304 144 304
WIRE 448 304 416 304
WIRE 544 304 528 304
WIRE 240 384 240 368
WIRE 336 384 336 368
SYMBOL voltage 64 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADP5300-1 288 192 R0
SYMATTR InstName U1
SYMBOL cap 592 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 432 320 R270
WINDOW 3 0 56 VBottom 2
WINDOW 0 32 56 VTop 2
SYMATTR Value 19.6K
SYMATTR InstName R2
SYMBOL res 672 144 R0
SYMATTR Value 36
SYMATTR InstName Rload
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=80m
FLAG 544 304 0
FLAG 608 256 0
FLAG 240 384 0
FLAG 64 176 0
FLAG 688 144 OUT
FLAG 688 256 0
FLAG 64 64 IN
FLAG 336 384 0
FLAG 144 304 0
FLAG 144 224 0
TEXT 440 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0050549bc95a_2_Rev1.asc
* Generated by LTspice 26.0.1 for Windows.
C3 N001 N003 {3/2}
L3 N003 0 {2/27}
L4 N002 N001 {34/27}
C1 N002 0 {1/2}
I1 0 N001 AC 1 0
R1 N002 0 1
.param f = w/(2*pi)
.step dec param w 0.001 10000 100
.ac list {f}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 932 680
WIRE -32 64 -144 64
WIRE 48 64 -32 64
WIRE 192 64 128 64
WIRE 304 64 192 64
WIRE -32 80 -32 64
WIRE -144 144 -144 64
WIRE 192 144 192 64
WIRE 304 144 304 64
WIRE -32 192 -32 144
WIRE -144 336 -144 224
WIRE -32 336 -32 272
WIRE -32 336 -144 336
WIRE 192 336 192 208
WIRE 192 336 -32 336
WIRE 304 336 304 224
WIRE 304 336 192 336
FLAG 192 336 0
SYMBOL cap -48 80 R0
SYMATTR InstName C3
SYMATTR Value {3/2}
SYMBOL ind -48 176 R0
SYMATTR InstName L3
SYMATTR Value {2/27}
SYMBOL ind 144 48 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L4
SYMATTR Value {34/27}
SYMBOL cap 176 144 R0
SYMATTR InstName C1
SYMATTR Value {1/2}
SYMBOL current -144 224 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 24 -28 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMBOL res 288 128 R0
SYMATTR InstName R1
SYMATTR Value 1
TEXT -136 368 Left 2 !.param f = w/(2*pi)\n.step dec param w 0.001 10000 100\n.ac list {f}
* Z:\home\khalils\Downloads\files\data\raw_asc\32503b99aa8e_Fig11_4_long.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Vout and Id(M2)
* 10/1
* 10/1
Vin Vin 0 0
VDD VDD 0 5
M2 VDD Vin Vout VDD P_1u l=1u w=10u
M1 Vout Vin 0 0 N_1u l=1u w=10u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vin 0 5 1m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 680
WIRE 192 -368 192 -384
WIRE 192 -352 192 -368
WIRE 192 -240 192 -272
WIRE 208 -96 208 -112
WIRE 208 0 208 -16
WIRE 320 -176 304 -176
WIRE 368 -176 320 -176
WIRE 368 -176 368 -224
WIRE 368 -96 368 -176
WIRE 400 -224 368 -224
WIRE 400 -96 368 -96
WIRE 448 -304 448 -352
WIRE 448 -176 448 -208
WIRE 448 -32 448 -80
WIRE 624 -176 448 -176
WIRE 656 -176 624 -176
SYMBOL nmos4 400 -176 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=1u w=10u
SYMBOL pmos4 400 -304 R0
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M2
SYMATTR Value P_1u
SYMATTR Value2 l=1u w=10u
SYMBOL voltage 192 -368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL voltage 208 -112 R0
WINDOW 0 -72 21 Left 0
WINDOW 3 -60 74 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 0
FLAG 208 0 0
FLAG 624 -176 Vout
FLAG 208 -112 Vin
FLAG 448 -128 0
FLAG 192 -240 0
FLAG 192 -368 VDD
FLAG 448 -256 VDD
FLAG 448 -32 0
FLAG 448 -352 VDD
FLAG 320 -176 Vin
TEXT 264 8 Left 0 !.dc Vin 0 5 1m
TEXT 264 32 Left 0 !.lib cmosedu_models.txt
TEXT 496 -360 Left 0 ;Plot Vout and Id(M2)
TEXT 344 -272 Left 0 ;10/1
TEXT 344 -72 Left 0 ;10/1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4223B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4223B.asy)
XU1 VIA VIB VDD1 0 0 0 VOB N002 0 VOA N001 ADuM4223B ;pnba VIA)VIB)VDD1)GND1)DISABLE)GNDB)VOB)VDDB)GNDA)VOA)VDDA
C5 VOB 0 2n
V6 N002 0 12
C1 0 VDD1 10n
C3 VOA 0 2n
V5 N001 0 12
V3 VDD1 0 5
V2 VIB 0 PULSE(5 0 0 1n 1n 5u 10u)
V1 VIA 0 PULSE(0 5 0 1n 1n 5u 10u)
.tran 50u
.lib ADuM4223B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1216 680
WIRE 656 16 368 16
WIRE 688 16 656 16
WIRE -48 32 -608 32
WIRE 64 32 -48 32
WIRE 688 32 688 16
WIRE -608 80 -608 32
WIRE 560 80 368 80
WIRE -48 112 -464 112
WIRE 64 112 -48 112
WIRE 688 112 688 96
WIRE 432 144 368 144
WIRE -176 192 -336 192
WIRE -64 192 -176 192
WIRE 64 192 -64 192
WIRE -608 224 -608 160
WIRE -464 224 -464 192
WIRE -336 224 -336 192
WIRE 560 224 368 224
WIRE -176 272 -176 192
WIRE -128 272 -176 272
WIRE 0 272 -64 272
WIRE 64 272 0 272
WIRE 432 288 368 288
WIRE -336 320 -336 304
WIRE 0 352 0 272
WIRE 64 352 0 352
WIRE 656 352 368 352
WIRE 688 352 656 352
WIRE 688 368 688 352
WIRE 0 384 0 352
WIRE 688 448 688 432
SYMBOL voltage -608 64 R0
WINDOW 0 30 80 Left 2
WINDOW 3 18 -5 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 1n 1n 5u 10u)
SYMBOL ADuM4223B 224 112 R0
SYMATTR InstName U1
SYMBOL cap 672 368 R0
SYMATTR InstName C5
SYMATTR Value 2n
SYMBOL cap 672 32 R0
SYMATTR InstName C3
SYMATTR Value 2n
SYMBOL voltage -464 96 R0
WINDOW 0 20 108 Left 2
WINDOW 3 39 40 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(5 0 0 1n 1n 5u 10u)
SYMBOL voltage 560 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 12
SYMBOL voltage 560 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 12
SYMBOL voltage -336 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL cap -64 256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
FLAG -336 320 0
FLAG -608 224 0
FLAG -464 224 0
FLAG 688 112 0
FLAG 688 448 0
FLAG 656 352 VOB
FLAG 656 16 VOA
FLAG 0 384 0
FLAG 432 288 0
FLAG 432 144 0
FLAG -48 32 VIA
FLAG -48 112 VIB
FLAG 560 304 0
FLAG 560 160 0
FLAG -64 192 VDD1
TEXT 64 440 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\ac047d49aba9_Assignment_3a__iv_.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Half Wave Rectifier Circuit (with 1microF Capacitor) (Practical)
D1 N001 N002 1N4148
C1 N002 0 0.000001
V1 N001 0 SINE(0 5 1000) Rser=0.001
R1 N002 0 1000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5ms
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 320 64 208 64
WIRE 480 64 384 64
WIRE 592 64 480 64
WIRE 208 112 208 64
WIRE 480 112 480 64
WIRE 592 128 592 64
WIRE 208 240 208 192
WIRE 304 240 208 240
WIRE 480 240 480 192
WIRE 480 240 304 240
WIRE 592 240 592 192
WIRE 592 240 480 240
WIRE 304 272 304 240
SYMBOL cap 576 128 R0
SYMATTR InstName C1
SYMATTR Value 0.000001
SYMBOL diode 320 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 464 96 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL voltage 208 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.001
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1000)
FLAG 304 272 0
TEXT 144 272 Left 2 !.tran 5ms
TEXT -24 8 Left 2 ;Positive Half Wave Rectifier Circuit (with 1microF Capacitor) (Practical)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADR225.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR225.asy)
C1 OUT 0 1
XU1 IN 0 OUT ADR225 ;pnba IN)GND)OUT
V1 IN 0 PWL(0 0 1 5)
Rload OUT 0 250
.tran 1
.lib ADR.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE 720 -96 528 -96
WIRE 1008 -96 944 -96
WIRE 1120 -96 1008 -96
WIRE 528 -80 528 -96
WIRE 1008 -80 1008 -96
WIRE 1120 -80 1120 -96
WIRE 528 16 528 0
WIRE 1008 16 1008 -16
WIRE 1120 16 1120 0
WIRE 832 64 832 32
SYMBOL cap 992 -80 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 1104 -96 R0
SYMATTR InstName Rload
SYMATTR Value 250
SYMBOL References\\ADR225 832 -48 R0
SYMATTR InstName U1
SYMBOL voltage 528 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 5)
FLAG 528 16 0
FLAG 832 64 0
FLAG 1008 16 0
FLAG 1120 16 0
FLAG 1120 -96 OUT
FLAG 528 -96 IN
TEXT 992 96 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\3c5aae79c4e0_Cmos_inverter.asc
* Generated by LTspice 26.0.1 for Windows.
* CMOS Inverter
V1 N002 0 PULSE(0 2.5 0 1n 1n 10m 20m)
M2 N003 N002 N001 N001 PMOS
M1 N003 N002 0 0 NMOS
V2 N001 0 2.5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 -208 -112 -208
WIRE 224 -176 224 -208
WIRE 224 -32 224 -96
WIRE 176 -16 112 -16
WIRE 112 96 112 -16
WIRE 112 96 -48 96
WIRE 224 112 224 64
WIRE 368 112 224 112
WIRE -48 128 -48 96
WIRE 224 160 224 112
WIRE 112 240 112 96
WIRE 176 240 112 240
WIRE -112 288 -112 -208
WIRE -48 288 -48 208
WIRE -48 288 -112 288
WIRE 224 288 224 256
WIRE 224 288 -48 288
WIRE 224 336 224 288
SYMBOL nmos 176 160 R0
SYMATTR InstName M1
SYMBOL pmos 176 64 M180
SYMATTR InstName M2
SYMBOL voltage -48 112 R0
WINDOW 3 -372 97 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 2.5 0 1n 1n 10m 20m)
SYMBOL voltage 224 -80 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 2.5
FLAG 224 336 0
TEXT -168 360 Left 2 !.tran 100m
TEXT -304 -48 Left 2 ;CMOS Inverter