* Z:\home\khalils\Downloads\files\data\raw_asc\1402efc88fc6_Swept_Sine3.asc
* Generated by LTspice 26.0.1 for Windows.
* continuously time optimally swept sine with start delay\n(continuous equivalent to Stepped_Sine1.asc)
* Most likely this swept source works only\nwith this non charge preserving controlled\ncapacitor type.\n(did not check for that)
A1 f 0 0 0 0 C S 0 MODULATOR space=0 mark={f2} Vhigh={Amp} Vlow={-Amp}
V2 P001 0 {k1}
R1 fh2 f 1k
Bc1 fh2 0 I=1/V(f)*I(Vs)-I(Vs)
S2 fh2 P001 N001 0 XSW
V1 N001 0 PULSE(1 -1 {kd})
Cref1 fh2 P002 {Ct}
B1 f 0 V=limit(k1,V(fh2)*fmul,1)
Vs P002 0 0
.tran {Ts}
.param f1=20 f2=20k Ts=1.705
.param k1=f1/f2
.param fmul=sqrt(2)
.param Amp=1
.ic v(fh2)={k1}
.param Ct=1u
.model xsw sw(ron=1u roff=1G)
.param kd=0 ;delay to start /sec
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1680 680
WIRE 592 128 352 128
WIRE 64 192 -64 192
WIRE 112 192 64 192
WIRE 144 192 112 192
WIRE 352 192 352 128
WIRE 352 192 224 192
WIRE 416 192 352 192
WIRE 592 192 560 192
WIRE -112 256 -192 256
WIRE 352 256 352 192
WIRE 592 256 560 256
WIRE -192 272 -192 256
WIRE 112 368 112 192
WIRE 128 368 112 368
WIRE 64 432 64 192
WIRE 160 432 64 432
WIRE 160 464 160 432
WIRE 160 576 160 544
IOPIN 592 192 Out
IOPIN 592 256 Out
IOPIN 592 128 Out
SYMBOL res 128 176 M90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL bv 352 240 R0
WINDOW 3 -133 136 Left 0
WINDOW 0 -32 8 Left 0
WINDOW 123 -32 36 Left 0
SYMATTR Value V=limit(k1,V(fh2)*fmul,1)
SYMATTR InstName B1
SYMBOL bi 160 464 R0
WINDOW 3 13 86 Left 0
SYMATTR Value I=1/V(f)*I(Vs)-I(Vs)
SYMATTR InstName Bc1
SYMBOL SpecialFunctions\\modulate2 416 192 R0
WINDOW 3 0 112 Left 0
WINDOW 123 0 130 Left 0
WINDOW 39 0 148 Left 0
WINDOW 0 0 -46 Left 0
SYMATTR Value space=0 mark={f2}
SYMATTR Value2 Vhigh={Amp}
SYMATTR SpiceLine Vlow={-Amp}
SYMATTR InstName A1
SYMBOL voltage -64 256 R0
WINDOW 0 33 70 Left 0
WINDOW 3 33 98 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value {k1}
SYMBOL cap 48 432 R0
WINDOW 3 23 53 Left 0
WINDOW 0 35 20 Left 0
SYMATTR Value {Ct}
SYMATTR InstName Cref1
SYMBOL sw -64 176 R0
WINDOW 0 27 40 Left 0
SYMATTR InstName S2
SYMATTR Value XSW
SYMBOL voltage -192 256 R0
WINDOW 0 32 42 Left 0
WINDOW 3 -48 129 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(1 -1 {kd})
SYMBOL voltage 64 480 R0
WINDOW 0 -52 17 Left 0
WINDOW 3 -53 52 Left 0
SYMATTR InstName Vs
SYMATTR Value 0
FLAG 352 336 0
FLAG 592 192 S
FLAG 592 256 C
FLAG 592 128 f
FLAG 128 368 fh2
FLAG -112 208 0
FLAG -192 352 0
FLAG -64 352 0
FLAG 160 576 0
FLAG 64 576 0
TEXT -184 -120 Left 0 !.tran {Ts}
TEXT -128 -72 Left 0 !.param f1=20 f2=20k Ts=1.705
TEXT -128 -40 Left 0 !.param k1=f1/f2
TEXT -128 24 Left 0 !.param fmul=sqrt(2)
TEXT 400 96 Left 0 !.param Amp=1
TEXT 136 296 Left 0 !.ic v(fh2)={k1}
TEXT -128 64 Left 0 !.param Ct=1u
TEXT -240 144 Left 0 !.model xsw sw(ron=1u roff=1G)
TEXT -128 -8 Left 0 !.param kd=0 ;delay to start /sec
TEXT -40 -136 Left 0 ;continuously time optimally swept sine with start delay\n(continuous equivalent to Stepped_Sine1.asc)
TEXT 232 432 Left 0 ;Most likely this swept source works only\nwith this non charge preserving controlled\ncapacitor type.\n(did not check for that)