Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3495-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3495-1.asy)
D1 N001 N002 1N5817
V1 IN 0 3.6 Rser=0.1
C1 N002 0 2.2
L1 IN N001 10
Rload OUT 0 500
XU1 0 MP_01 IN IN IN N003 OUT N002 MP_02 N001 LT3495-1 ;pnba GND))Vcc)CTRL)_SHDN)FB)Vout)CAP))SW
C2 OUT 0 1
R1 OUT N003 909K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib LT3495-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1456
WIRE 1616 880 1520 880
WIRE 1648 880 1616 880
WIRE 1760 880 1728 880
WIRE 1792 880 1760 880
WIRE 1888 880 1856 880
WIRE 2016 880 1888 880
WIRE 1520 896 1520 880
WIRE 2016 896 2016 880
WIRE 1760 944 1760 880
WIRE 1888 944 1888 880
WIRE 2016 976 2016 960
WIRE 1520 992 1520 976
WIRE 1616 1008 1616 880
WIRE 1680 1008 1616 1008
WIRE 2000 1008 1968 1008
WIRE 2112 1008 2000 1008
WIRE 2208 1008 2112 1008
WIRE 2112 1024 2112 1008
WIRE 2208 1024 2208 1008
WIRE 2000 1040 2000 1008
WIRE 1616 1088 1616 1008
WIRE 1680 1088 1616 1088
WIRE 2112 1120 2112 1088
WIRE 2208 1120 2208 1104
WIRE 1616 1168 1616 1088
WIRE 1680 1168 1616 1168
WIRE 2000 1168 2000 1120
WIRE 2000 1168 1968 1168
WIRE 1824 1248 1824 1232
SYMBOL VOLTAGE 1520 880 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMATTR SpiceLine Rser=0.1
SYMBOL ind 1632 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL cap 2096 1024 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL schottky 1792 896 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 2192 1008 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT3495-1 1824 1088 R0
SYMATTR InstName U1
SYMBOL RES 1984 1024 R0
SYMATTR InstName R1
SYMATTR Value 909K
SYMBOL cap 2000 896 R0
SYMATTR InstName C1
SYMATTR Value 2.2
FLAG 2208 1008 OUT
FLAG 1824 1248 0
FLAG 1520 992 0
FLAG 1520 880 IN
FLAG 2016 976 0
FLAG 2112 1120 0
FLAG 2208 1120 0
TEXT 2032 1208 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\00ccec2cdc4e_2641A-16.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2641A-16.asy)
XU1 N003 N001 N004 N005 N006 OUT N002 0 LTC2641A-16 ;pnba REF)_CS)SCLK)DIN)_CLR)Vout)Vdd)GND
V5 N001 0 PWL(0 3.3 0.6u 3.3 +2n 0 +0.31u 0 +2n 3.3)
V6 N006 0 PWL(0 3.3 2u 3.3 +2n 0 +30n 0 +2n 3.3)
V2 N002 0 5
V3 N003 0 2.5
V1 N005 0 PULSE(0 3.3 0 0.1n 0.1n 19.8n 40n)
C1 OUT 0 10p
V4 N004 0 PULSE(0 3.3 0 0.1n 0.1n 9.9n 20n)
.tran 3u
.lib LTC2641A-16.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 932
WIRE 320 16 320 -16
WIRE 448 16 448 -16
WIRE -32 64 -48 64
WIRE 192 64 48 64
WIRE 320 128 320 96
WIRE 448 128 448 96
WIRE 192 176 192 64
WIRE 240 176 192 176
WIRE -32 192 -48 192
WIRE 160 192 48 192
WIRE 160 240 160 192
WIRE 240 240 160 240
WIRE 608 272 528 272
WIRE 608 288 608 272
WIRE -32 304 -48 304
WIRE 240 304 48 304
WIRE 240 368 176 368
WIRE 608 368 608 352
WIRE 384 416 384 400
WIRE -32 448 -48 448
WIRE 176 448 176 368
WIRE 176 448 48 448
SYMBOL voltage 64 448 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -99 VRight 2
SYMATTR InstName V6
SYMATTR Value PWL(0 3.3 2u 3.3 +2n 0 +30n 0 +2n 3.3)
SYMBOL voltage 448 112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 2.5
SYMBOL voltage 64 304 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -99 VRight 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 0.1n 0.1n 19.8n 40n)
SYMBOL voltage 64 64 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -122 VRight 2
SYMATTR InstName V5
SYMATTR Value PWL(0 3.3 0.6u 3.3 +2n 0 +0.31u 0 +2n 3.3)
SYMBOL voltage 64 192 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -89 VRight 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 3.3 0 0.1n 0.1n 9.9n 20n)
SYMBOL LTC2641A-16 384 272 R0
SYMATTR InstName U1
SYMBOL cap 592 288 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 320 112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 5
FLAG 384 416 0
FLAG -48 304 0
FLAG 320 -16 0
FLAG 448 -16 0
FLAG -48 192 0
FLAG -48 64 0
FLAG -48 448 0
FLAG 608 272 OUT
FLAG 608 368 0
TEXT 632 432 Left 2 !.tran 3u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6119-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6119-1.asy)
V4 N006 0 5
C1 N002 0 .1
I1 N002 0 PWL(20u 0 250u .5 400u .5 500u .2 600u .2 700u 0) load
V1 N001 0 PWL(0 0 5u 12)
R8 N001 N003 100
XU1 N002 N004 N007 N009 0 N008 N010 N005 N001 N003 LT6119-1 ;pnba SenseLo)LE)OutC2)OutC1)V-)INC1)INC2)OutA)V+)SenseHi
R5 N008 0 1.6K
R3 N008 N010 2.73K
R4 N006 N009 10K
R1 N001 N002 .1
C2 N004 0 100n
R6 N001 N004 24.9K
R2 N005 N010 6.04K
R9 N006 N007 10K
.tran .7m
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2204 1236
WIRE -144 -32 -400 -32
WIRE 80 -32 -144 -32
WIRE 288 -32 80 -32
WIRE 352 -32 288 -32
WIRE 480 -32 432 -32
WIRE 560 -32 480 -32
WIRE 672 -32 560 -32
WIRE -400 -16 -400 -32
WIRE 288 -16 288 -32
WIRE 560 -16 560 -32
WIRE 672 -16 672 -32
WIRE -400 80 -400 64
WIRE -144 80 -144 -32
WIRE 288 80 288 64
WIRE 560 80 560 48
WIRE 672 80 672 64
WIRE 80 128 80 -32
WIRE 128 128 80 128
WIRE 480 128 480 -32
WIRE 480 128 448 128
WIRE -144 240 -144 160
WIRE 128 240 -144 240
WIRE 704 240 448 240
WIRE 704 304 704 240
WIRE -144 320 -144 304
WIRE -16 352 -128 352
WIRE 16 352 -16 352
WIRE 128 352 96 352
WIRE 480 352 448 352
WIRE 544 352 480 352
WIRE 640 352 624 352
WIRE -128 368 -128 352
WIRE 480 368 480 352
WIRE -128 464 -128 448
WIRE -16 464 -16 352
WIRE 16 464 -16 464
WIRE 128 464 96 464
WIRE 480 464 480 448
WIRE 480 464 448 464
WIRE 704 464 704 384
WIRE 704 464 480 464
WIRE 288 528 288 512
SYMBOL cap -160 240 R0
WINDOW 0 34 20 Left 2
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL res 464 352 R0
SYMATTR InstName R3
SYMATTR Value 2.73K
SYMBOL LT6119-1 288 304 R0
SYMATTR InstName U1
SYMBOL res 0 368 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R9
SYMATTR Value 10K
SYMBOL res 0 480 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 336 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value .1
SYMBOL res 688 288 R0
SYMATTR InstName R2
SYMATTR Value 6.04K
SYMBOL res 528 368 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 1.6K
SYMBOL res -160 64 R0
SYMATTR InstName R6
SYMATTR Value 24.9K
SYMBOL voltage -128 352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL cap 544 -16 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL current 672 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 39 48 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMATTR Value PWL(20u 0 250u .5 400u .5 500u .2 600u .2 700u 0)
SYMBOL res 272 -32 R0
SYMATTR InstName R8
SYMATTR Value 100
SYMBOL voltage -400 -32 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 5u 12)
FLAG 288 528 0
FLAG -400 80 0
FLAG 672 80 0
FLAG 640 352 0
FLAG 560 80 0
FLAG -128 464 0
FLAG -144 320 0
TEXT 816 440 Left 2 !.tran .7m
* Z:\home\khalils\Downloads\files\data\raw_asc\0f54e9a3181f_Nand2.asc
* Generated by LTspice 26.0.1 for Windows.
V2 VDD 0 PULSE(0 1 1n 10p 10p 10n 20n)
M1 N003 N001 0 0 NMOS l=1u w=10u
M2 N002 N001 N003 0 NMOS l=1u w=10u
M3 NAND N001 N002 0 NMOS l=1u w=10u
M4 VDD N001 NAND VDD PMOS l=1u w=10u
M5 VDD N001 NAND VDD PMOS l=1u w=10u
M6 VDD N001 NAND VDD PMOS l=1u w=10u
V1 N001 0 PULSE(0 1 1n 10p 10p 20n 40n)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.tran 0 100n 0 1p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE 256 -160 96 -160
WIRE 512 -160 480 -160
WIRE 752 -160 720 -160
WIRE 96 -128 96 -160
WIRE 480 -128 480 -160
WIRE 480 -128 96 -128
WIRE 720 -128 720 -160
WIRE 720 -128 480 -128
WIRE 304 -96 304 -144
WIRE 560 -96 560 -144
WIRE 560 -96 304 -96
WIRE 800 -96 800 -144
WIRE 800 -96 560 -96
WIRE 928 -96 800 -96
WIRE 256 -16 208 -16
WIRE 96 48 96 -128
WIRE 96 48 0 48
WIRE 208 48 208 -16
WIRE 208 48 96 48
WIRE 304 64 304 0
WIRE 208 144 208 48
WIRE 256 144 208 144
WIRE 304 224 304 160
WIRE 208 304 208 144
WIRE 256 304 208 304
FLAG 304 112 0
FLAG 304 272 0
FLAG 304 -48 0
FLAG 640 96 0
FLAG 0 128 0
FLAG 304 320 0
FLAG 640 16 VDD
FLAG 304 -192 VDD
FLAG 560 -192 VDD
FLAG 800 -192 VDD
FLAG 800 -240 VDD
FLAG 560 -240 VDD
FLAG 304 -240 VDD
FLAG 928 -96 NAND
IOPIN 928 -96 Out
SYMBOL voltage 640 0 R0
WINDOW 3 35 76 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 1n 10p 10p 10n 20n)
SYMBOL nmos4 256 224 R0
WINDOW 123 56 100 Left 2
SYMATTR InstName M1
SYMATTR Value2 l=1u w=10u
SYMBOL nmos4 256 64 R0
WINDOW 123 56 100 Left 2
SYMATTR InstName M2
SYMATTR Value2 l=1u w=10u
SYMBOL nmos4 256 -96 R0
WINDOW 123 57 100 Left 2
SYMATTR InstName M3
SYMATTR Value2 l=1u w=10u
SYMBOL pmos4 256 -240 R0
WINDOW 123 75 -34 Left 2
SYMATTR InstName M4
SYMATTR Value2 l=1u w=10u
SYMBOL pmos4 512 -240 R0
WINDOW 123 76 -34 Left 2
SYMATTR InstName M5
SYMATTR Value2 l=1u w=10u
SYMBOL pmos4 752 -240 R0
WINDOW 123 74 -33 Left 2
SYMATTR InstName M6
SYMATTR Value2 l=1u w=10u
SYMBOL voltage 0 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 1n 10p 10p 20n 40n)
TEXT 720 120 Left 2 !.include cmosedu_models.txt
TEXT -48 344 Left 2 !.tran 0 100n 0 1p
* Z:\home\khalils\Downloads\files\data\raw_asc\606830e3fc8b_comparator_logic_IE.asc
* Generated by LTspice 26.0.1 for Windows.
* magic output
* motor 1
* motor 2
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
XU2 N005 N004 N002 N007 N001 LT1001 ;pnba In+)In-)V+)V-)OUT
V7 N009 0 6
D1 N008 N001 D
V4 N003 N007 6
R1 N008 0 10k
V1 N004 0 7
XU1 N005 N010 N009 N011 N003 LT1001 ;pnba In+)In-)V+)V-)OUT
Vamplifier_output N005 0 0
V5 N010 0 3
R2 0 N006 10k
D2 N001 N006 D
V8 0 N011 6
V3 N002 N003 6
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc amplifier_output 0 8 0.05
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1540 1016
WIRE 896 -240 368 -240
WIRE 512 -80 208 -80
WIRE 512 -16 512 -80
WIRE 208 112 208 -80
WIRE 512 112 512 64
WIRE 752 112 512 112
WIRE 176 128 -48 128
WIRE 368 144 368 -240
WIRE 368 144 240 144
WIRE 176 160 80 160
WIRE -48 176 -48 128
WIRE 512 176 512 112
WIRE 896 320 896 -240
WIRE 1136 320 896 320
WIRE 1216 320 1136 320
WIRE 1344 320 1280 320
WIRE 1520 320 1424 320
WIRE 208 336 208 176
WIRE 512 336 512 256
WIRE 512 336 208 336
WIRE 80 352 80 160
WIRE 80 352 -288 352
WIRE -288 416 -288 352
WIRE 1136 416 1136 320
WIRE 752 480 752 112
WIRE 752 480 384 480
WIRE 1136 528 1136 480
WIRE 512 544 208 544
WIRE -288 560 -288 496
WIRE 512 592 512 544
WIRE 1136 656 1136 608
WIRE 208 736 208 544
WIRE 176 752 -192 752
WIRE 384 768 384 480
WIRE 384 768 240 768
WIRE 512 768 512 672
WIRE 704 768 512 768
WIRE -192 784 -192 752
WIRE 80 784 80 352
WIRE 176 784 80 784
WIRE 512 848 512 768
WIRE 208 992 208 800
WIRE 512 992 512 928
WIRE 512 992 208 992
SYMBOL voltage -192 768 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 3
SYMBOL OpAmps\\LT1001 208 704 R0
SYMATTR InstName U1
SYMBOL voltage 512 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 6
SYMBOL res 1440 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 512 576 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V7
SYMATTR Value 6
SYMBOL voltage -48 160 R0
WINDOW 3 38 50 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 7
SYMATTR InstName V1
SYMBOL diode 1216 336 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL voltage -288 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName amplifier_output
SYMATTR Value 0
SYMBOL voltage 512 832 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V8
SYMATTR Value 6
SYMBOL OpAmps\\LT1001 208 80 R0
SYMATTR InstName U2
SYMBOL res 1120 512 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL diode 1152 480 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL voltage 512 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 6
FLAG -192 864 0
FLAG 704 768 0
FLAG -48 256 0
FLAG 1136 656 0
FLAG 1520 320 0
FLAG -288 560 0
TEXT 936 296 Left 2 ;magic output
TEXT 1352 384 Left 2 ;motor 1
TEXT 1016 544 Left 2 ;motor 2
TEXT -322 998 Left 2 !.dc amplifier_output 0 8 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\SampleAndHold.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* This output follows the input whenever the S/H input is true.
* This output latches to the input when the CLK input goes TRUE.
* The behavioral Sample and Hold has two modes of operation.
A1 IN 0 0 N001 0 0 A 0 SAMPLEHOLD
A2 IN 0 N001 0 0 0 B 0 SAMPLEHOLD
V2 N001 0 PULSE(0 1 0 1u 1u 50u 100u)
V1 IN 0 SINE(0 1 300)
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 680
WIRE 128 64 32 64
WIRE 336 112 304 112
WIRE 128 160 64 160
WIRE 32 272 32 64
WIRE 32 272 -160 272
WIRE 128 272 32 272
WIRE -160 288 -160 272
WIRE 336 320 304 320
WIRE 64 336 64 160
WIRE 128 336 64 336
WIRE -160 384 -160 368
WIRE 64 400 64 336
WIRE 64 512 64 480
SYMBOL voltage 64 384 R0
WINDOW 0 18 18 Left 2
WINDOW 3 23 97 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 0 1u 1u 50u 100u)
SYMBOL voltage -160 272 R0
WINDOW 3 23 92 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 1 300)
SYMATTR InstName V1
SYMBOL SpecialFunctions\\sample 208 304 R0
SYMATTR InstName A2
SYMBOL SpecialFunctions\\sample 208 96 R0
SYMATTR InstName A1
FLAG 64 512 0
FLAG -160 384 0
FLAG 336 112 A
FLAG 336 320 B
FLAG -160 272 IN
TEXT 472 528 Left 2 !.tran 10m
TEXT 208 552 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT 360 112 Left 2 ;This output follows the input whenever the S/H input is true.
TEXT 360 320 Left 2 ;This output latches to the input when the CLK input goes TRUE.
TEXT 208 -8 Bottom 2 ;The behavioral Sample and Hold has two modes of operation.
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP172-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP172-1.2.asy)
C1 OUT 0 1
RLOAD OUT 0 4.02
V1 IN 0 3.6
XU1 OUT IN IN 0 ADP172-1.2 ;pnba Vout)Vin)En)GND
.tran 2m startup
.lib ADP172-1.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 80 -48 80
WIRE 48 80 -32 80
WIRE 64 80 48 80
WIRE 304 80 256 80
WIRE 336 80 304 80
WIRE 384 80 336 80
WIRE -48 96 -48 80
WIRE 304 96 304 80
WIRE 304 176 304 160
WIRE 384 176 384 160
WIRE -48 192 -48 176
WIRE 48 192 48 80
WIRE 64 192 48 192
WIRE 272 192 256 192
SYMBOL res 368 64 R0
SYMATTR InstName RLOAD
SYMATTR Value 4.02
SYMBOL voltage -48 80 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL ADP172-1.2 160 192 R0
SYMATTR InstName U1
SYMBOL cap 288 96 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG -48 192 0
FLAG 304 176 0
FLAG 272 192 0
FLAG 384 176 0
FLAG -32 80 IN
FLAG 336 80 OUT
TEXT 160 256 Center 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP172-2.1.asc
* Generated by LTspice 26.0.1 for Windows.
C1 OUT 0 1
V1 IN 0 3.6
RLOAD OUT 0 7.06
XU1 OUT IN IN 0 ADP172-2.1 ;pnba Vout)Vin)En)GND
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP172-2.1.asy)
.lib ADP172-2.1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 80 -48 80
WIRE 48 80 -32 80
WIRE 64 80 48 80
WIRE 304 80 256 80
WIRE 336 80 304 80
WIRE 384 80 336 80
WIRE -48 96 -48 80
WIRE 304 96 304 80
WIRE 304 176 304 160
WIRE 384 176 384 160
WIRE -48 192 -48 176
WIRE 48 192 48 80
WIRE 64 192 48 192
WIRE 272 192 256 192
FLAG -48 192 0
FLAG 304 176 0
FLAG 272 192 0
FLAG 384 176 0
FLAG -32 80 IN
FLAG 336 80 OUT
SYMBOL cap 288 96 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -48 80 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL res 368 64 R0
SYMATTR InstName RLOAD
SYMATTR Value 7.06
SYMBOL ADP172-2.1 160 192 R0
SYMATTR InstName U1
TEXT 160 256 Center 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\05595497982c_Uebungsblatt_3_wolfrum.asc
* Generated by LTspice 26.0.1 for Windows.
R1 NC_01 NC_02 R
R2 NC_03 NC_04 R
R3 NC_05 NC_06 R
R4 NC_07 NC_08 R
R5 NC_09 NC_10 R
R6 NC_11 NC_12 R
Rm NC_13 NC_14 1Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
SYMBOL res 208 112 R90
WINDOW 0 7 56 VBottom 2
WINDOW 3 25 56 VTop 2
SYMATTR InstName R1
SYMBOL res 336 112 R90
WINDOW 0 7 56 VBottom 2
WINDOW 3 25 56 VTop 2
SYMATTR InstName R2
SYMBOL res 464 112 R90
WINDOW 0 7 56 VBottom 2
WINDOW 3 25 56 VTop 2
SYMATTR InstName R3
SYMBOL res 640 112 R90
WINDOW 0 7 56 VBottom 2
WINDOW 3 25 56 VTop 2
SYMATTR InstName R4
SYMBOL res 768 112 R90
WINDOW 0 7 56 VBottom 2
WINDOW 3 25 56 VTop 2
SYMATTR InstName R5
SYMBOL res 896 112 R90
WINDOW 0 7 56 VBottom 2
WINDOW 3 25 56 VTop 2
SYMATTR InstName R6
SYMBOL res 336 -32 R90
WINDOW 0 7 56 VBottom 2
WINDOW 3 25 56 VTop 2
SYMATTR InstName Rm
SYMATTR Value 1meg
* Z:\home\khalils\Downloads\files\data\raw_asc\1590cc06e0c9_Reverse_battery_protection_-_diode.asc
* Generated by LTspice 26.0.1 for Windows.
Rload load 0 5
Vbat battery 0 PWL(0 13V 20ms 13V 21ms -13V)
D1 battery load RB085BGE-40
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 50m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 240 -48 240
WIRE 144 240 0 240
WIRE 320 240 208 240
WIRE 400 240 320 240
WIRE -48 352 -48 240
WIRE 400 352 400 240
WIRE -48 544 -48 432
WIRE 400 544 400 432
WIRE 400 544 -48 544
WIRE -48 576 -48 544
SYMBOL schottky 144 256 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value RB085BGE-40
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL Misc\\EuropeanResistor 384 336 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL voltage -48 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 2
WINDOW 3 17 160 Left 2
WINDOW 0 -57 4 Left 2
SYMATTR Value PWL(0 13V 20ms 13V 21ms -13V)
SYMATTR InstName Vbat
FLAG -48 576 0
FLAG 0 240 battery
FLAG 320 240 load
TEXT -8 616 Left 2 !.tran 50m
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5676R.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5676R.asy)
XU1 vDAC Vdd 0 vOUT AD5676R Gain=2 ;pnba Vdac)Vdd)GND)Vout
RLOAD vOUT 0 1k
V1 Vdd 0 5
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
CLOAD vOUT 0 10n
.tran 50u
.lib AD5676R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 112 112 0 112
WIRE 192 112 112 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL AD5676R -208 112 R0
SYMATTR InstName U1
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -240 -80 Vdd
TEXT -160 312 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1154.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1154.asy)
XU1 N001 0 N006 0 0 N007 N003 N002 LTC1154 ;pnba IN)_EN)STATUS)GND)SD)G)DS)Vs
MQ1 N004 N007 N008 N008 Si9936DY
C1 N002 N003 .1
V3 N005 0 5
V1 N001 0 PULSE(0 5 0 1u 1u 5m 10m)
Rload N008 0 10
R3 N006 N005 51K
V2 N002 0 PWL(0 5 1 16)
R1 N002 N004 .036
R2 N004 N003 100K
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1 startup
.lib LTC1154.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 680
WIRE 16 128 -512 128
WIRE 336 128 304 128
WIRE 544 128 336 128
WIRE 656 128 544 128
WIRE -512 144 -512 128
WIRE 336 144 336 128
WIRE 656 144 656 128
WIRE 16 224 -16 224
WIRE 336 224 336 208
WIRE 336 224 304 224
WIRE 400 224 336 224
WIRE 544 224 544 208
WIRE 544 224 480 224
WIRE -512 240 -512 224
WIRE 544 240 544 224
WIRE 656 240 656 224
WIRE -80 320 -144 320
WIRE 16 320 0 320
WIRE 496 320 304 320
WIRE -144 336 -144 320
WIRE 544 352 544 336
WIRE 16 416 -16 416
WIRE 336 416 304 416
WIRE -144 432 -144 416
WIRE 544 448 544 432
SYMBOL nmos 496 240 R0
WINDOW 0 55 5 Left 2
WINDOW 3 54 62 Left 2
SYMATTR InstName Q1
SYMATTR Value Si9936DY
SYMBOL cap 320 144 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage -512 128 R0
SYMATTR Value PULSE(0 5 0 1u 1u 5m 10m)
SYMATTR InstName V1
SYMBOL res 496 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL voltage 656 128 R0
WINDOW 123 32 56 VTop 2
WINDOW 39 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value PWL(0 5 1 16)
SYMBOL res 528 336 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL voltage -144 320 R0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 16 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 51K
SYMBOL res 528 112 R0
SYMATTR InstName R1
SYMATTR Value .036
SYMBOL PowerProducts\\LTC1154 160 272 R0
SYMATTR InstName U1
FLAG -16 416 0
FLAG -512 240 0
FLAG -16 224 0
FLAG 544 448 0
FLAG 336 416 0
FLAG 656 240 0
FLAG -144 432 0
TEXT 344 504 Left 2 !.tran 1 startup
* Z:\tmp\asc_dec_bjh7r6w2\1409eda8be43_SSR_simulation_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N006 0 10pF
R6 N003 N007 40
L1 N005 N008 194.4mH
R1 N001 N004 250
V3 N003 N005 SINE(0 24 60)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2192 680
WIRE 336 -128 64 -128
WIRE 1056 -128 992 -128
WIRE 1216 -128 1136 -128
WIRE 1456 -128 1216 -128
WIRE 1696 -128 1456 -128
WIRE 1968 -128 1696 -128
WIRE 336 -112 336 -128
WIRE 1696 -112 1696 -128
WIRE 1968 -112 1968 -128
WIRE 1216 -80 1216 -128
WIRE 336 0 336 -32
WIRE 720 0 336 0
WIRE 1968 0 1968 -32
WIRE 1696 64 1696 -32
WIRE 1216 96 1216 0
WIRE 1968 112 1968 80
WIRE 1696 208 1696 128
WIRE 1696 208 1456 208
WIRE 1968 208 1696 208
WIRE 1696 256 1696 208
SYMBOL cap 1680 64 R0
SYMATTR InstName C2
SYMATTR Value 10pF
SYMBOL res 1200 -96 R0
SYMATTR InstName R6
SYMATTR Value 40
SYMBOL ind 1952 -16 R0
SYMATTR InstName L1
SYMATTR Value 194.4mH
SYMBOL res 320 -128 R0
SYMATTR InstName R1
SYMATTR Value 250
SYMBOL Misc\\signal 1968 -128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 24 60)
FLAG 1696 256 0