Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX44281V.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX44281V.asy)
V1 IN 0 SINE(825m 50m 10k)
RL OUT 0 10k
CL OUT 0 1p
Vcc Vcc 0 3.3
XU1 IN Vcc 0 OUT MAX44281V ;pnba IN)VDD)GND)OUT
.tran 100u
.lib MAX44281V.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 448 192 416 192
WIRE 544 192 528 192
WIRE 544 208 544 192
WIRE 416 240 416 192
WIRE 416 272 416 240
WIRE 384 304 304 304
WIRE 576 304 448 304
WIRE 672 304 576 304
WIRE 576 336 576 304
WIRE 416 352 416 336
WIRE 672 352 672 304
WIRE 304 416 304 304
WIRE 576 448 576 416
WIRE 672 448 672 416
WIRE 304 512 304 496
SYMBOL MAX44281V 416 240 R0
SYMATTR InstName U1
SYMBOL res 560 320 R0
SYMATTR InstName RL
SYMATTR Value 10k
SYMBOL voltage 304 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 31 94 Left 2
SYMATTR Value SINE(825m 50m 10k)
SYMATTR InstName V1
SYMBOL cap 656 352 R0
SYMATTR InstName CL
SYMATTR Value 1p
SYMBOL voltage 432 192 R270
WINDOW 123 0 0 Left 2
WINDOW 0 47 35 VRight 2
WINDOW 3 -45 40 VRight 2
SYMATTR InstName Vcc
SYMATTR Value 3.3
FLAG 672 304 OUT
FLAG 416 240 Vcc
FLAG 544 208 0
FLAG 304 512 0
FLAG 576 448 0
FLAG 304 304 IN
FLAG 672 448 0
FLAG 416 352 0
TEXT 288 560 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3025-4.asc
* Generated by LTspice 26.0.1 for Windows.
Rload OUT 0 3.6
C1 OUT 0 1
V1 N001 0 PWL(0 0 1 5.5)
V2 IN 0 3.6
XU1 IN 0 N001 OUT OUT N001 LTC3025-4 ;pnba BIAS)GND)IN)OUT)Sense)_SHDN
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3025-4.asy)
.lib LTC3025.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 192 -256 192
WIRE 368 192 336 192
WIRE 432 192 368 192
WIRE 512 192 432 192
WIRE -256 208 -256 192
WIRE 432 208 432 192
WIRE 512 208 512 192
WIRE 32 272 -160 272
WIRE 48 272 32 272
WIRE 368 272 368 192
WIRE 368 272 336 272
WIRE -160 288 -160 272
WIRE -256 304 -256 288
WIRE 432 304 432 272
WIRE 512 304 512 288
WIRE 32 352 32 272
WIRE 48 352 32 352
WIRE 368 352 336 352
WIRE -160 384 -160 368
FLAG 368 352 0
FLAG 512 304 0
FLAG 432 304 0
FLAG -160 384 0
FLAG -256 304 0
FLAG -256 192 IN
FLAG 512 192 OUT
SYMBOL res 496 192 R0
SYMATTR InstName Rload
SYMATTR Value 3.6
SYMBOL cap 416 208 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -160 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 5.5)
SYMBOL voltage -256 192 R0
SYMATTR InstName V2
SYMATTR Value 3.6
SYMBOL PowerProducts\\LTC3025-4 192 272 R0
SYMATTR InstName U1
TEXT 432 368 Left 2 !.tran 1
* Z:\tmp\asc_dec_bjh7r6w2\02a0f6b9049d_Ampli_horizontal_sans_capa_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V2 NC_01 0 32
R3 0 N001 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 -48 64 -48
WIRE 368 0 368 -48
WIRE -32 32 -48 32
WIRE 64 32 64 -48
WIRE 64 32 48 32
WIRE -48 80 -48 32
WIRE 64 128 64 32
WIRE 160 128 64 128
WIRE 368 160 368 80
WIRE 368 160 320 160
WIRE 400 160 368 160
WIRE 112 192 80 192
WIRE 160 192 112 192
WIRE 112 224 112 192
SYMBOL voltage 192 96 R180
WINDOW 0 31 88 Left 2
WINDOW 3 31 34 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 32
SYMBOL res -48 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 10k
FLAG -48 80 0
FLAG 192 0 0
FLAG 80 192 ao
* Z:\home\khalils\Downloads\files\data\raw_asc\3f8d5d0fb02a_quiz1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 0 10k
V1 N002 0 3.3
V2 N001 0
M1 N001 N002 0 0 NMOS l=10u w=w
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc library.mod
.dc V2 0 3.3 0.1
.step param div 1 5 0.2
.param w=10u/3.6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 464 32 336 32
WIRE 464 48 464 32
WIRE 528 64 496 64
WIRE 256 96 64 96
WIRE 336 96 336 32
WIRE 336 96 256 96
WIRE 496 96 496 64
WIRE 496 96 464 96
WIRE 528 96 528 64
WIRE 256 144 256 96
WIRE 464 176 464 144
WIRE 64 208 64 176
WIRE 416 208 416 128
WIRE 256 256 256 224
WIRE 416 320 416 288
SYMBOL res 48 80 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL nmos4 416 48 R0
SYMATTR InstName M1
SYMATTR Value2 l=10u w=w
SYMBOL voltage 256 128 R0
SYMATTR InstName V2
SYMATTR Value ""
SYMBOL voltage 416 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG 64 208 0
FLAG 256 256 0
FLAG 416 320 0
FLAG 464 176 0
FLAG 528 96 0
TEXT 312 -48 Left 2 !.inc library.mod
TEXT 312 -8 Left 2 !.dc V2 0 3.3 0.1
TEXT 0 8 Left 2 !.step param div 1 5 0.2
TEXT -120 -40 Left 2 !.param w=10u/3.6
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1461-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1461-2.5.asy)
XU1 0 N001 N001 N002 LT1461-2.5 ;pnba GND)IN)_SHDN)OUT
C1 N002 0 2
V1 N001 0 5
I1 N002 0 PULSE(0 10m 1.5m 10n 10n 2m 200m)
.tran 7m
.lib LT1461.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1376 680
WIRE 112 112 32 112
WIRE 144 112 112 112
WIRE 512 112 432 112
WIRE 672 112 512 112
WIRE 32 128 32 112
WIRE 512 128 512 112
WIRE 672 128 672 112
WIRE 112 176 112 112
WIRE 144 176 112 176
WIRE 32 224 32 208
WIRE 512 224 512 192
WIRE 672 224 672 208
WIRE 288 240 288 208
SYMBOL LT1461-2.5 288 144 R0
SYMATTR InstName U1
SYMBOL current 672 128 R0
WINDOW 123 24 122 Left 2
WINDOW 39 24 101 Left 2
SYMATTR Value PULSE(0 10m 1.5m 10n 10n 2m 200m)
SYMATTR InstName I1
SYMBOL cap 496 128 R0
WINDOW 123 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 2
SYMBOL voltage 32 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 32 224 0
FLAG 288 240 0
FLAG 672 224 0
FLAG 512 224 0
TEXT 776 288 Left 2 !.tran 7m
* Z:\home\khalils\Downloads\files\data\raw_asc\39d0249bd129_fig-01-03-21.asc
* Generated by LTspice 26.0.1 for Windows.
VS1 VCC 0 15
VS2 0 VEE 15
R1 N001 VIN 10k
Q1 N001 0 N002 0 2N2222
V1 VIN 0 0
XU1 0 N001 VCC VEE N002 ADA4177 ;pnba In+)In-)V+)V-)OUT
E1 VOUT 0 N002 0 -1
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc dec V1 10n 100 100
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4177-2.asy)
.lib ADA4177.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -32 128 -32
WIRE 304 -32 256 -32
WIRE 208 48 208 32
WIRE 208 96 208 80
WIRE 480 96 432 96
WIRE 208 144 208 96
WIRE -32 160 -48 160
WIRE 16 160 -32 160
WIRE 128 160 128 -32
WIRE 128 160 96 160
WIRE 176 160 128 160
WIRE 432 160 432 96
WIRE 304 176 304 -32
WIRE 304 176 240 176
WIRE 384 176 304 176
WIRE 176 192 128 192
WIRE -48 208 -48 160
WIRE 128 224 128 192
WIRE 384 224 368 224
WIRE 208 240 208 208
WIRE 208 256 208 240
WIRE 368 256 368 224
WIRE 432 256 432 240
WIRE 432 256 368 256
WIRE 432 272 432 256
WIRE 272 288 272 272
WIRE 336 288 336 272
WIRE -48 336 -48 288
WIRE 272 336 272 288
WIRE 336 336 336 288
WIRE 272 432 272 416
WIRE 336 432 336 416
FLAG -48 336 0
FLAG -32 160 VIN
FLAG 272 432 0
FLAG 336 432 0
FLAG 272 288 VEE
FLAG 336 288 VCC
FLAG 208 96 VCC
FLAG 208 240 VEE
FLAG 480 96 VOUT
IOPIN 480 96 Out
FLAG 208 48 0
FLAG 128 224 0
FLAG 432 272 0
SYMBOL Misc\\battery 336 320 R0
WINDOW 0 9 8 Left 2
WINDOW 3 15 97 Left 2
SYMATTR InstName VS1
SYMATTR Value 15
SYMBOL Misc\\battery 272 432 R180
WINDOW 0 24 104 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName VS2
SYMATTR Value 15
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL npn 160 32 R270
WINDOW 0 79 -30 VRight 2
WINDOW 3 79 74 VRight 2
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL voltage -48 192 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL Opamps\\ADA4177-2 208 176 R0
SYMATTR InstName U1
SYMBOL e 432 144 R0
SYMATTR InstName E1
SYMATTR Value -1
TEXT -72 400 Left 2 !.dc dec V1 10n 100 100
* Z:\home\khalils\Downloads\files\data\raw_asc\d4c73f554478_TS0.asc
* Generated by LTspice 26.0.1 for Windows.
R2 V2 N001 {R3}
R1 N001 V1 {R3}
XU1 N001 N002 V2 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
V1 V1 N003 SINE(0 1 0 0 0 0 1000) AC 1 0
R3 0 N002 {R3}
C1 N002 N003 {1/R3}
.ac dec 100 .1 10
.param R3=1
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
WIRE 208 32 64 32
WIRE 352 32 288 32
WIRE 640 32 352 32
WIRE 752 32 720 32
WIRE 64 96 64 32
WIRE 352 128 352 32
WIRE 400 128 352 128
WIRE 752 144 752 32
WIRE 752 144 464 144
WIRE 800 144 752 144
WIRE 400 160 352 160
WIRE 64 240 64 176
WIRE 160 240 64 240
WIRE 256 240 224 240
WIRE 352 240 352 160
WIRE 352 240 256 240
WIRE 256 288 256 240
WIRE 256 400 256 368
IOPIN 64 32 In
IOPIN 800 144 Out
SYMBOL res 304 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R3}
SYMBOL voltage 64 80 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 24 152 Left 2
SYMATTR Value2 AC 1 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 0 0 0 0 1000)
SYMBOL res 272 384 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value {R3}
SYMBOL res 736 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R3}
SYMBOL OpAmps\\opamp 432 80 R0
SYMATTR InstName U1
SYMBOL cap 224 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {1/R3}
FLAG 256 400 0
FLAG 64 32 V1
FLAG 800 144 V2
TEXT 488 272 Left 2 !.ac dec 100 .1 10
TEXT 496 312 Left 2 !.param R3=1
TEXT 496 344 Left 2 !.lib opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\19f6e8d51f0c_Simulacion_SPICE_Montecarlo_Capacitor.asc
* Generated by LTspice 26.0.1 for Windows.
* Circuit
* Source / Switch
* Parameters
* Simulation setup
R3 VL- 0 {R3}
L1 VL+ VL- {L}
C1 VL+ N001 {mc({C},tol_C)}
R1 VL+ Vcc {R1}
R2 N001 0 {R2}
V1 Vcc 0 PULSE(0 10 10m 1n 1n 200m 400m 10)
.param R1 = 50
.param R2 = 7
.param R3 = 6
.param C = 300u
.param L = 450m
.param tol_R=0
.param tol_C = 0.1
.param tol_L = 0
.step param run 1 50 1
.tran 0 400m 0 1u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -368 -176 -560 -176
WIRE -128 -176 -288 -176
WIRE 144 -176 -128 -176
WIRE -128 -80 -128 -176
WIRE 144 -80 144 -176
WIRE -560 -16 -560 -176
WIRE 144 48 144 0
WIRE -128 112 -128 -16
WIRE 144 112 144 48
WIRE -560 272 -560 64
WIRE -128 272 -128 192
WIRE -128 272 -560 272
WIRE 144 272 144 192
WIRE 144 272 -128 272
WIRE -128 304 -128 272
RECTANGLE Normal -496 -288 -1024 336 2
RECTANGLE Normal 208 -288 -480 336 2
RECTANGLE Normal 608 144 240 304 2
RECTANGLE Normal 608 -288 240 112 2
SYMBOL cap -144 -80 R0
WINDOW 3 -178 55 Left 2
SYMATTR Value {mc({C},tol_C)}
SYMATTR InstName C1
SYMBOL voltage -560 -32 R0
WINDOW 3 -440 106 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 10 10m 1n 1n 200m 400m 10)
SYMATTR InstName V1
SYMBOL res -144 96 R0
WINDOW 3 -87 51 Left 2
WINDOW 0 44 53 Left 2
SYMATTR Value {R2}
SYMATTR InstName R2
SYMBOL res -272 -192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 37 72 VTop 2
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL res 128 96 R0
WINDOW 3 -78 46 Left 2
SYMATTR Value {R3}
SYMATTR InstName R3
SYMBOL ind 128 -96 R0
WINDOW 3 -59 51 Left 2
SYMATTR Value {L}
SYMATTR InstName L1
FLAG -128 304 0
FLAG -560 -176 Vcc
FLAG 144 -176 VL+
FLAG 144 48 VL-
TEXT -400 -264 Left 3 ;Circuit
TEXT -944 -264 Left 3 ;Source / Switch
TEXT 264 -264 Left 3 ;Parameters
TEXT 312 -208 Left 2 !.param R1 = 50
TEXT 312 -176 Left 2 !.param R2 = 7
TEXT 312 -144 Left 2 !.param R3 = 6
TEXT 312 -48 Left 2 !.param C = 300u
TEXT 312 48 Left 2 !.param L = 450m
TEXT 256 168 Left 3 ;Simulation setup
TEXT 312 -112 Left 2 !.param tol_R=0
TEXT 312 -16 Left 2 !.param tol_C = 0.1
TEXT 312 80 Left 2 !.param tol_L = 0
TEXT 320 224 Left 2 !.step param run 1 50 1
TEXT 328 248 Left 2 !.tran 0 400m 0 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\43a921b83a22_TRR-8.asc
* Generated by LTspice 26.0.1 for Windows.
D1 a b RFN2L6S
R1 b 0 500
V1 a 0 PULSE(500 -500 1u 5n 5n 9u 20u) Rser=10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 6u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -176 128 -208 128
WIRE -112 128 -176 128
WIRE 16 128 -48 128
WIRE 32 128 16 128
WIRE -208 176 -208 128
WIRE 32 176 32 128
WIRE -208 304 -208 256
WIRE -80 304 -208 304
WIRE 32 304 32 256
WIRE 32 304 -80 304
WIRE -80 320 -80 304
FLAG -80 320 0
FLAG -176 128 a
FLAG 16 128 b
SYMBOL diode -112 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value RFN2L6S
SYMBOL Misc\\EuropeanResistor 16 160 R0
SYMATTR InstName R1
SYMATTR Value 500
SYMBOL voltage -208 160 R0
WINDOW 3 10 105 Invisible 2
WINDOW 123 0 0 Left 2
SYMATTR Value PULSE(500 -500 1u 5n 5n 9u 20u)
SYMATTR SpiceLine Rser=10
SYMATTR InstName V1
TEXT -208 320 Left 2 !.tran 6u
* Z:\home\khalils\Downloads\files\data\raw_asc\15d831e38f4b_1819.asc
* Generated by LTspice 26.0.1 for Windows.
* 80MHz, 20dB Gain Block
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1819.asy)
V3 IN 0 AC 1
V2 -V 0 -5
R3 OUT N001 432
R2 N002 0 200
R1 N003 N002 432
XU2 N003 N001 OUT +V -V LT1818 ;pnba IN+)IN-)OUT)VCC)VEE
V1 +V 0 5
R4 N001 0 200
XU1 IN N002 N003 +V -V LT1818 ;pnba IN+)IN-)OUT)VCC)VEE
.ac oct 10 100K 100Meg
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 240 32 224 32
WIRE 336 32 320 32
WIRE 352 32 336 32
WIRE 464 32 432 32
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -160 160 -160 128
WIRE -64 160 -64 128
WIRE 400 192 400 176
WIRE 192 208 192 192
WIRE 336 208 336 32
WIRE 368 208 336 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 464 224 464 32
WIRE 464 224 432 224
WIRE 496 224 464 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 368 240 256 240
WIRE 160 256 32 256
WIRE -160 272 -160 240
WIRE -64 272 -64 240
WIRE 32 272 32 256
WIRE 400 272 400 256
WIRE 192 288 192 272
WIRE 32 368 32 352
SYMBOL voltage -64 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL opamps\\LT1819 400 224 R0
SYMATTR InstName U2
SYMBOL voltage -160 144 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 32 256 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 432
SYMBOL res 448 16 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 432
SYMBOL res 336 16 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R4
SYMATTR Value 200
SYMBOL opamps\\LT1819 192 240 R0
SYMATTR InstName U1
FLAG -64 272 0
FLAG 192 192 +V
FLAG -64 128 +V
FLAG 192 288 -V
FLAG -160 272 0
FLAG -160 128 -V
FLAG 16 96 0
FLAG 32 368 0
FLAG 400 176 +V
FLAG 400 272 -V
FLAG 224 32 0
FLAG 496 224 OUT
FLAG 32 256 IN
TEXT 230 346 Left 0 !.ac oct 10 100K 100Meg
TEXT 264 -32 Bottom 0 ;80MHz, 20dB Gain Block
* Z:\home\khalils\Downloads\files\data\raw_asc\18d6ca5dd7e2_Phasors_meas.asc
* Generated by LTspice 26.0.1 for Windows.
V3 V3 0 SINE(0 100 50)
V1 V1 0 SINE(0 100 50)
V2 V2 V1 SINE(0 50 50 0 0 -45)
V4 V3 V4 SINE(0 50 50 0 0 -45)
.tran 0 100m 0 0.02m
.measure t1 when V(V1)=0 RISE=2
.measure t2 when V(V2)=0 RISE=2
.measure ph2 param -(t2-t1)*50*360
.measure v2max max V(V2)
.measure t3 when V(V3)=0 RISE=2
.measure t4 when V(V4)=0 RISE=2
.measure ph4 param if((t4-t3)*50*360>180,360-(t4-t3)*50*360,-(t4-t3)*50*360)
.measure v4max max V(V4)
.options plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1604 872
WIRE -64 -528 -176 -528
WIRE 224 -528 112 -528
WIRE -176 -496 -176 -528
WIRE 112 -496 112 -528
WIRE -176 -368 -176 -416
WIRE -112 -368 -176 -368
WIRE 112 -368 112 -416
WIRE 192 -368 112 -368
WIRE -176 -336 -176 -368
WIRE 112 -336 112 -368
WIRE -176 -224 -176 -256
WIRE -80 -224 -176 -224
WIRE 112 -224 112 -256
WIRE 208 -224 112 -224
WIRE -80 -208 -80 -224
WIRE 208 -208 208 -224
SYMBOL voltage -176 -352 R0
WINDOW 0 41 36 Left 0
WINDOW 3 24 97 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 100 50)
SYMBOL voltage 112 -352 R0
WINDOW 0 39 40 Left 0
WINDOW 3 22 98 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 100 50)
SYMBOL voltage 112 -400 R180
WINDOW 0 -68 84 Left 0
WINDOW 3 -226 12 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value SINE(0 50 50 0 0 -45)
SYMBOL voltage -176 -512 R0
WINDOW 0 42 30 Left 0
WINDOW 3 15 103 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 50 50 0 0 -45)
FLAG -80 -208 0
FLAG -112 -368 V1
FLAG -64 -528 V2
FLAG 208 -208 0
FLAG 192 -368 V3
FLAG 224 -528 V4
TEXT 400 -536 Left 0 !.tran 0 100m 0 0.02m
TEXT 400 -448 Left 0 !.measure t1 when V(V1)=0 RISE=2\n.measure t2 when V(V2)=0 RISE=2\n.measure ph2 param -(t2-t1)*50*360\n.measure v2max max V(V2)
TEXT 392 -304 Left 0 !.measure t3 when V(V3)=0 RISE=2\n.measure t4 when V(V4)=0 RISE=2\n.measure ph4 param if((t4-t3)*50*360>180,360-(t4-t3)*50*360,-(t4-t3)*50*360)\n.measure v4max max V(V4)
TEXT 400 -512 Left 0 !.options plotwinsize=0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1763-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1763-2.5.asy)
C2 OUT N001 .01
C1 OUT 0 10
V1 IN 0 PWL(0 0 1 10)
XU1 OUT OUT 0 N001 IN MP_01 MP_02 IN LT1763-2.5 ;pnba OUT)Sense)GND)BYP)_SHDN)))IN
Rload OUT 0 500
.tran 1
.lib LT1763.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 32 304 32
WIRE 352 32 320 32
WIRE 432 32 352 32
WIRE 528 32 432 32
WIRE 0 48 -208 48
WIRE 16 48 0 48
WIRE 432 48 432 32
WIRE 528 48 528 32
WIRE -208 64 -208 48
WIRE 352 64 352 32
WIRE 320 96 320 32
WIRE 320 96 304 96
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 432 144 432 112
WIRE 528 144 528 128
WIRE -208 160 -208 144
WIRE 352 160 352 128
WIRE 352 160 304 160
WIRE 160 240 160 208
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL PowerProducts\\LT1763-2.5 160 96 R0
SYMATTR InstName U1
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL cap 416 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL cap 336 64 R0
SYMATTR InstName C2
SYMATTR Value .01
FLAG -208 160 0
FLAG 432 144 0
FLAG 528 144 0
FLAG 160 240 0
FLAG -208 48 IN
FLAG 528 32 OUT
TEXT 384 216 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8479.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N002 0 SINE(0 10 500)
V2 +V 0 15
V3 -V 0 -15
V4 N001 N002 SINE(0 5 1K)
R1 OUT 0 10K
XU1 0 N001 N002 -V 0 OUT +V AD8479 ;pnba REF-)-IN)+IN)-V)REF+)OUTPUT)+V
.tran 10m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8479.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1108 692
WIRE 176 32 176 16
WIRE 32 80 16 80
WIRE -48 128 -256 128
WIRE -256 144 -256 128
WIRE -48 144 -48 128
WIRE 32 144 -48 144
WIRE -528 176 -528 160
WIRE -432 176 -432 160
WIRE 416 176 304 176
WIRE 416 192 416 176
WIRE 32 208 -48 208
WIRE -256 240 -256 224
WIRE -48 240 -48 208
WIRE -48 240 -256 240
WIRE -256 256 -256 240
WIRE -528 272 -528 256
WIRE -432 272 -432 256
WIRE 320 272 304 272
WIRE 416 288 416 272
WIRE 176 336 176 320
WIRE -256 352 -256 336
FLAG 176 336 -V
FLAG 320 272 0
FLAG 416 176 OUT
FLAG 176 16 +V
FLAG -528 272 0
FLAG -432 272 0
FLAG -528 160 +V
FLAG -432 160 -V
FLAG -256 352 0
FLAG 16 80 0
FLAG 416 288 0
SYMBOL voltage -256 240 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value SINE(0 10 500)
SYMATTR InstName V1
SYMBOL voltage -528 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage -432 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -15
SYMBOL voltage -256 128 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V4
SYMATTR Value SINE(0 5 1K)
SYMBOL res 400 176 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL opamps\\AD8479 176 176 R0
SYMATTR InstName U1
TEXT 432 368 Left 2 !.tran 10m
* Z:\tmp\asc_dec_bjh7r6w2\164b2c019682_array_multiplier_tb_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V7 N006 0 PULSE(0 5 0 5n 5n 10m 20m)
V5 N004 0 PULSE(0 5 0 5n 5n 40m 80m)
V9 N008 0 PULSE(0 5 0 5n 5n 40m 80m)
V3 N002 0 PULSE(0 5 0 5n 5n 10m 20m)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 -128 176 -128
WIRE 336 -80 192 -80
WIRE 448 -32 208 -32
WIRE 576 16 224 16
WIRE 176 64 176 -128
WIRE 192 64 192 -80
WIRE 208 64 208 -32
WIRE 224 64 224 16
WIRE 400 112 352 112
WIRE 384 128 352 128
WIRE 64 144 -336 144
WIRE 416 144 352 144
WIRE 64 160 -256 160
WIRE 448 160 352 160
WIRE -336 176 -336 144
WIRE 64 176 -176 176
WIRE 480 176 352 176
WIRE 64 192 -96 192
WIRE 512 192 352 192
WIRE -256 208 -256 160
WIRE 544 208 352 208
WIRE -176 240 -176 176
WIRE -96 272 -96 192
SYMBOL voltage -256 192 R0
WINDOW 3 -343 -288 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 0 5n 5n 10m 20m)
SYMATTR InstName V7
SYMBOL voltage 560 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -36 -984 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value PULSE(0 5 0 5n 5n 40m 80m)
SYMBOL voltage -96 256 R0
WINDOW 3 -504 -303 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 0 5n 5n 40m 80m)
SYMATTR InstName V9
SYMBOL voltage 320 -80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -85 -744 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 5n 5n 10m 20m)
FLAG 400 112 po
FLAG 416 144 p2
FLAG 384 128 p1
FLAG 448 160 p3
FLAG 480 176 p4
FLAG 512 192 p5
FLAG 544 208 p6
FLAG 304 -128 0
FLAG 416 -80 0
FLAG 528 -32 0
FLAG 656 16 0
FLAG -336 256 0
FLAG -256 288 0
FLAG -176 320 0
FLAG -96 352 0
* Z:\home\khalils\Downloads\files\data\raw_asc\107d18a57279_and_block.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Vdd 0 5V
V2 A 0 PULSE(0 5 0 1p 1p 10m 20m)
V3 B 0 PULSE(0 5 0 1p 1p 20m 40m)
AX1 0 0 0 0 0 0 0 0 AND
* Power
* A
.tran 40m
* B
* A B | Y\n------|---\n0 0 | 1\n0 1 | 1\n1 0 | 1\n1 1 | 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -560 -416 -560 -448
WIRE -384 -416 -384 -448
WIRE -208 -416 -208 -448
WIRE -560 -304 -560 -336
WIRE -384 -304 -384 -336
WIRE -208 -304 -208 -336
WIRE -80 -112 -80 -160
WIRE -96 -96 -176 -96
WIRE 64 -80 -16 -80
WIRE -96 -64 -176 -64
WIRE -80 16 -80 -48
FLAG 64 -80 out
FLAG -176 -96 A
FLAG -80 -160 Vdd
FLAG -80 16 0
FLAG -560 -304 0
FLAG -560 -448 Vdd
FLAG -384 -304 0
FLAG -384 -448 A
FLAG -176 -64 B
FLAG -208 -304 0
FLAG -208 -448 B
SYMBOL voltage -560 -432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5V
SYMBOL voltage -384 -432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -82 -81 Left 2
SYMATTR Value PULSE(0 5 0 1p 1p 10m 20m)
SYMATTR InstName V2
SYMBOL voltage -208 -432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 1p 1p 20m 40m)
SYMBOL and -96 -48 R0
SYMATTR InstName X1
TEXT -592 -256 Left 2 ;Power
TEXT -408 -248 Left 2 ;A
TEXT -608 40 Left 2 !.tran 40m
TEXT -232 -248 Left 2 ;B
TEXT 256 -240 Left 2 ;A B  | Y\n------|---\n0  0 | 1\n0  1 | 1\n1  0 | 1\n1  1 | 0
RECTANGLE Normal -496 -496 -608 -224 2
RECTANGLE Normal -320 -496 -464 -224 2
RECTANGLE Normal -144 -496 -288 -224 2