* Z:\home\khalils\Downloads\files\data\raw_asc\644645c20cfc_metal_SMPS_200v_IR2110_whiteness_PART_DEUX_THE_NUDE_GENERATION_III__400v_target_100.asc
* Generated by LTspice 26.0.1 for Windows.
;.step param freq 10k,70k,15k
;.step param pulse_width = 1u,10u,1u
;.step param pri_I list 2uH 5uH 10uH 20uH 40uH 100uH 200uH
C4 N002 0 200n
V3 VDD_logic 0 5 Rser=20
L1 0 N003 {pri_I} Rser=.0003
D6 N001 N002 1SR154-600
V1 hi 0 PULSE(0 20 0 1e-7 1e-7 {pulse_width} {1/freq}) Rser=0
L5 0 N001 {sec_I} Rser=.42
R4 N002 0 160k
V1 + 0 12 Rser=0
R2 hi P001 10
M6 + P001 N003 N003 IRF740
K2 L1 L5 1.0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.param freq =50k
.param pulse_width = 4u
.param pri_I 40uH
.param sec_I 60mH
.lib NE5532.sub
.lib LM318.sub
.include ir2110.sub
.tran .02
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 6068 1612
WIRE 3344 -2608 3344 -2640
WIRE 3904 -2560 3792 -2560
WIRE 3920 -2560 3904 -2560
WIRE 3904 -2544 3904 -2560
WIRE 3408 -2512 3392 -2512
WIRE 3520 -2512 3472 -2512
WIRE 3632 -2512 3520 -2512
WIRE 3728 -2512 3632 -2512
WIRE 3392 -2432 3392 -2512
WIRE 3408 -2432 3392 -2432
WIRE 3488 -2432 3472 -2432
WIRE 3344 -2352 3344 -2512
WIRE 3392 -2352 3392 -2432
WIRE 3632 -2352 3632 -2512
WIRE 3728 -2352 3728 -2512
WIRE 3344 -2240 3344 -2272
WIRE 3392 -2208 3392 -2272
WIRE 3488 -2208 3488 -2432
WIRE 3488 -2208 3392 -2208
WIRE 3632 -2208 3632 -2288
WIRE 3632 -2208 3488 -2208
WIRE 3728 -2208 3728 -2272
WIRE 3728 -2208 3632 -2208
WIRE 3632 -2176 3632 -2208
WIRE 3392 -2144 3392 -2208
WIRE 3408 -2144 3392 -2144
WIRE 3520 -2144 3520 -2512
WIRE 3520 -2144 3472 -2144
IOPIN 2976 -2240 BiDir
IOPIN 3792 -2560 BiDir
IOPIN 4032 -2528 BiDir
IOPIN 3920 -2560 BiDir
IOPIN 3344 -2640 BiDir
IOPIN 3216 -2528 BiDir
SYMBOL voltage 2992 -2240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 Invisible 2
WINDOW 123 0 0 Left 2
SYMATTR InstName 1
SYMATTR Value PULSE(0 20 0 1e-7 1e-7 {pulse_width} {1/freq})
SYMATTR SpiceLine Rser=0
SYMBOL ind2 3376 -2256 M180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L5
SYMATTR Value {sec_I}
SYMATTR SpiceLine Rser=.42
SYMATTR Type ind
SYMBOL Misc\\EuropeanResistor 3200 -2544 M90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL voltage 4032 -2544 R0
WINDOW 123 0 0 Left 2
SYMATTR SpiceLine Rser=20
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage 3904 -2560 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 36 Left 2
SYMATTR SpiceLine Rser=0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ind2 3360 -2256 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value {pri_I}
SYMATTR SpiceLine Rser=.0003
SYMATTR Type ind
SYMBOL nmos 3296 -2608 R0
WINDOW 0 -21 44 Left 2
WINDOW 3 -12 -5 Left 2
SYMATTR InstName M6
SYMATTR Value IRF740
SYMBOL diode 3408 -2496 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D6
SYMATTR Value 1SR154-600
SYMBOL Misc\\EuropeanCap 3616 -2352 R0
SYMATTR InstName C4
SYMATTR Value 200n
SYMBOL Misc\\EuropeanResistor 3744 -2368 M0
SYMATTR InstName R4
SYMATTR Value 160k
FLAG 3632 -2176 0
FLAG 2976 -2240 hi
FLAG 3792 -2560 VCC_mosfet_drive
FLAG 2896 -2240 0
FLAG 4032 -2448 0
FLAG 4032 -2528 VDD_logic
FLAG 3920 -2560 +
FLAG 3904 -2464 0
FLAG 3344 -2640 +
FLAG 3344 -2240 0
FLAG 3216 -2528 hi
TEXT 2880 -2176 Left 2 !;.step param freq 10k,70k,15k\n.param freq             =50k\n;.step param pulse_width = 1u,10u,1u\n.param pulse_width = 4u\n \n;.step param pri_I list 2uH 5uH 10uH 20uH 40uH 100uH 200uH\n.param pri_I 40uH\n.param sec_I 60mH
TEXT 2848 -2600 Left 2 !.lib NE5532.sub
TEXT 2848 -2576 Left 2 !.lib LM318.sub
TEXT 2848 -2624 Left 2 !.include ir2110.sub
TEXT 2880 -2656 Left 2 !.tran .02
TEXT 3208 -2328 Left 2 !K2 L1 L5 1.0