Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\288a0d3b5f69_Experiment1_NPN.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 Vce Vbe 0 0 2N2222
R1 VcIN Vce 200
R2 Vbe VbIN 10k
V1 VbIN 0 0
V2 VcIN 0 5
R3 VcIN Vce 200
R4 Vbe VbIN 10k
Q2 Vce Vbe 0 0 NPN
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 1 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1112 756
WIRE 368 -48 208 -48
WIRE 208 -32 208 -48
WIRE 208 80 208 48
WIRE 288 80 208 80
WIRE 208 96 208 80
WIRE 0 144 -48 144
WIRE 128 144 80 144
WIRE 144 144 128 144
WIRE 208 272 208 192
WIRE 336 416 176 416
WIRE 176 432 176 416
WIRE 176 544 176 512
WIRE 256 544 176 544
WIRE 176 560 176 544
WIRE -32 608 -80 608
WIRE 96 608 48 608
WIRE 112 608 96 608
WIRE 176 736 176 656
FLAG 208 272 0
FLAG 368 -48 VcIN
FLAG -48 144 VbIN
FLAG 128 144 Vbe
FLAG 288 80 Vce
FLAG 944 80 VbIN
FLAG 1056 80 VcIN
FLAG 944 160 0
FLAG 1056 160 0
FLAG 176 736 0
FLAG 336 416 VcIN
FLAG -80 608 VbIN
FLAG 96 608 Vbe
FLAG 256 544 Vce
SYMBOL npn 144 96 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL res 192 -48 R0
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL res 96 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 944 64 R0
WINDOW 3 36 80 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 0
SYMATTR InstName V1
SYMBOL voltage 1056 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 160 416 R0
SYMATTR InstName R3
SYMATTR Value 200
SYMBOL res 64 592 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL npn2 112 560 R0
SYMATTR InstName Q2
TEXT 840 280 Left 2 !.dc V1 0 1 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\26b52451bcab_6100.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6100.asy)
V2 +V 0 5
XU1 N002 +V FIL 0 OUT N003 N003 N001 LT6100 ;pnba VS-)VCC)FIL)VEE)VOUT)A2)A4)VS+
R1 N002 N001 0.01
I1 N002 0 PULSE(.9 1 100n 1u 1u .5m 1m)
V1 N001 0 48
.tran 3m
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 112 -96 112
WIRE 80 112 16 112
WIRE 208 112 160 112
WIRE 320 112 208 112
WIRE -96 128 -96 112
WIRE 320 128 320 112
WIRE 208 208 208 112
WIRE 208 208 64 208
WIRE -96 224 -96 208
WIRE 320 224 320 208
WIRE 320 304 288 304
WIRE 208 320 208 304
WIRE 288 320 288 304
WIRE 320 320 320 304
WIRE -96 352 -96 336
WIRE 16 384 16 112
WIRE 160 384 16 384
WIRE 448 416 400 416
WIRE -96 448 -96 432
WIRE 64 448 64 208
WIRE 160 448 64 448
WIRE 272 496 272 480
WIRE 320 496 320 480
SYMBOL LT6100 288 448 R0
SYMATTR InstName U1
SYMBOL res 176 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 0.01
SYMBOL current 320 128 R0
WINDOW 123 24 116 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value PULSE(.9 1 100n 1u 1u .5m 1m)
SYMBOL voltage -96 336 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -96 112 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 48
FLAG -96 224 0
FLAG 320 224 0
FLAG -96 448 0
FLAG 448 416 OUT
FLAG 272 496 0
FLAG 320 496 FIL
FLAG -96 336 +V
FLAG 208 304 +V
TEXT 480 504 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7171-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N001 0 1n
V1 IN 0 3.5
Rload OUT 0 5
C1 OUT 0 4.7 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADM7171-3.0 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7171-3.0.asy)
.lib ADM7171-3.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
SYMBOL cap 80 240 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.5
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADM7171-3.0 224 128 R0
SYMATTR InstName U1
TEXT 376 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\4a19c9b5c052_widlar-bandgap.asc
* Generated by LTspice 26.0.1 for Windows.
* Vref = V_BE + R3 / R1 * dV_BE
R4 N001 0 2.2k
R2 Vref N003 620
Q2 Vref N002 0 0 BC547B
VUdc Vin 0 10V
R3 Vref N002 6.2k
Q3 N001 N001 Vin 0 BC557C
Q1 N003 N003 0 0 BC547B
Q6 N002 N003 N004 0 BC547B
Q4 Vref N001 Vin 0 BC557C
R1 N004 0 620
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran .01
.TEMP 0 10 20 30 40 50
.OPTIONS NOOPITER
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1928 680
WIRE 720 -240 656 -240
WIRE 912 -240 720 -240
WIRE 720 -192 720 -240
WIRE 912 -192 912 -240
WIRE 816 -144 784 -144
WIRE 848 -144 816 -144
WIRE 720 -48 720 -96
WIRE 816 -48 816 -144
WIRE 816 -48 720 -48
WIRE 912 -48 912 -96
WIRE 1072 -48 912 -48
WIRE 1216 -48 1072 -48
WIRE 1328 -48 1216 -48
WIRE 1072 -32 1072 -48
WIRE 912 16 912 -48
WIRE 1216 32 1216 -48
WIRE 1072 80 1072 48
WIRE 1152 80 1072 80
WIRE 1072 112 1072 80
WIRE 912 160 912 96
WIRE 912 160 816 160
WIRE 1008 160 912 160
WIRE 720 208 720 -48
WIRE 912 224 912 160
WIRE 1072 240 1072 208
WIRE 816 272 816 160
WIRE 848 272 816 272
WIRE -96 304 -96 256
WIRE 720 384 720 288
WIRE 912 384 912 320
WIRE 912 384 720 384
WIRE 1072 384 1072 320
WIRE 1072 384 912 384
WIRE 1216 384 1216 128
WIRE 1216 384 1072 384
WIRE -96 416 -96 384
WIRE 1216 448 1216 384
IOPIN 656 -240 In
IOPIN -96 256 In
SYMBOL voltage -96 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Udc
SYMATTR Value 10V
SYMBOL res 896 0 R0
SYMATTR InstName R2
SYMATTR Value 620
SYMBOL npn 1152 32 R0
SYMATTR InstName Q2
SYMATTR Value BC547B
SYMBOL npn 848 224 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL res 1056 224 R0
SYMATTR InstName R1
SYMATTR Value 620
SYMBOL npn 1008 112 R0
SYMATTR InstName Q6
SYMATTR Value BC547B
SYMBOL res 704 192 R0
SYMATTR InstName R4
SYMATTR Value 2.2k
SYMBOL res 1056 -48 R0
SYMATTR InstName R3
SYMATTR Value 6.2k
SYMBOL pnp 848 -96 M180
WINDOW 0 49 31 Left 2
WINDOW 3 50 59 Left 2
SYMATTR InstName Q4
SYMATTR Value BC557C
SYMBOL pnp 784 -96 R180
WINDOW 0 61 28 Left 2
WINDOW 3 62 56 Left 2
SYMATTR InstName Q3
SYMATTR Value BC557C
FLAG 1216 448 0
FLAG -96 416 0
FLAG 1328 -48 Vref
FLAG 656 -240 Vin
FLAG -96 256 Vin
TEXT 8 312 Left 2 !.tran .01
TEXT 8 344 Left 2 !.TEMP 0 10 20 30 40 50\n.OPTIONS NOOPITER
TEXT -104 464 Left 2 ;Vref = V_BE + R3 / R1 * dV_BE
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX4354.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX4354.asy)
V1 IN 0 SINE(0 50m 10k)
CL OUT 0 15p
XU1 IN OUT Vcc Vee OUT MAX4354 ;pnba In+)In-)V+)V-)OUT
Vee 0 Vee 2.5
Vcc Vcc 0 2.5
RL OUT 0 1k
.tran 100u
.lib MAX4354.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 144 288 144 272
WIRE 432 352 432 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 144 400 144 368
WIRE 144 400 112 400
WIRE 400 400 304 400
WIRE 112 416 112 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 144 448 144 400
WIRE 432 448 432 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 144 544 144 528
WIRE 304 592 304 576
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL voltage 144 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL MAX4354 432 320 R0
SYMATTR InstName U1
SYMBOL voltage 144 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 10k)
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 1k
FLAG 720 384 OUT
FLAG 144 272 Vcc
FLAG 144 544 Vee
FLAG 432 320 Vcc
FLAG 432 448 Vee
FLAG 112 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
TEXT 96 632 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17610.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17610.asy)
V4 N002 0 2
S1 0 OUT N001 0 SHORT
V1 IN 0 48
C2 OUT 0 15
R6 N004 N003 20K
R8 N006 0 1.5K
R7 N004 N005 20K
XU1 IN N006 0 NC_01 N002 N003 N005 OUT MAX17610 ;pnba IN)SETI)GND)CLMODE)EN)_FWD)_REV)OUT
V3 N001 0 PULSE(0 1 70m 1m 1m 100m)
V2 N004 0 5
.model SHORT SW(Ron=24 Roff=100K Vt=.5 Vh=-.4)
.tran 1.25 startup
.lib MAX17610.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1800 680
WIRE -16 -352 -256 -352
WIRE 400 -352 272 -352
WIRE 512 -352 400 -352
WIRE 672 -352 560 -352
WIRE -256 -336 -256 -352
WIRE 400 -336 400 -352
WIRE 512 -336 512 -352
WIRE 672 -336 672 -352
WIRE 560 -320 560 -352
WIRE -256 -240 -256 -256
WIRE 400 -240 400 -272
WIRE 512 -240 512 -256
WIRE 672 -240 672 -256
WIRE -16 -160 -256 -160
WIRE 384 -160 272 -160
WIRE 496 -160 464 -160
WIRE -256 -144 -256 -160
WIRE 496 -112 496 -160
WIRE 576 -112 496 -112
WIRE 576 -80 576 -112
WIRE 384 -64 272 -64
WIRE 496 -64 496 -112
WIRE 496 -64 464 -64
WIRE -256 -48 -256 -64
WIRE 336 16 272 16
WIRE 576 16 576 0
WIRE 336 32 336 16
WIRE 336 128 336 112
WIRE 336 128 272 128
WIRE 336 160 336 128
SYMBOL res 320 16 R0
SYMATTR InstName R8
SYMATTR Value 1.5K
SYMBOL res 480 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 20K
SYMBOL MAX17610 128 -112 R0
SYMATTR InstName U1
SYMBOL sw 512 -240 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL voltage 672 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 70m 1m 1m 100m)
SYMBOL voltage -256 -160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 2
SYMBOL cap 384 -336 R0
SYMATTR InstName C2
SYMATTR Value 15
SYMBOL res 480 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 20K
SYMBOL voltage -256 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL voltage 576 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
FLAG -256 -240 0
FLAG 400 -240 0
FLAG 512 -352 OUT
FLAG -256 -352 IN
FLAG 512 -240 0
FLAG 560 -272 0
FLAG 672 -240 0
FLAG 336 160 0
FLAG 576 16 0
FLAG -256 -48 0
TEXT 480 144 Left 2 !.model SHORT SW(Ron=24 Roff=100K Vt=.5 Vh=-.4)
TEXT 480 184 Left 2 !.tran 1.25 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\4d7afa1f6e04_1007CS.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain 1000 Amplifier with .01% Accuracy
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1007CS.asy)
V2 -V 0 -15
R1 OUT N001 355K
XU1 IN N001 +V -V OUT LT1007 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
R2 N001 0 365
V3 IN 0 SINE(0 1m .01)
.tran 300
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 160 96 128 96
WIRE 272 96 240 96
WIRE -272 176 -272 160
WIRE -144 176 -144 160
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 272 240 272 96
WIRE 272 240 224 240
WIRE 304 240 272 240
WIRE 160 256 0 256
WIRE -272 272 -272 256
WIRE -144 272 -144 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL voltage -144 160 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -272 160 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1m .01)
SYMBOL opamps\\LT1007CS 192 176 R0
SYMATTR InstName U1
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 355K
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 365
FLAG -144 272 0
FLAG 192 192 +V
FLAG -144 160 +V
FLAG 192 288 -V
FLAG -272 272 0
FLAG -272 160 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 304 240 OUT
FLAG 0 256 IN
TEXT 232 352 Left 0 !.tran 300
TEXT 136 48 Bottom 0 ;Gain 1000 Amplifier with .01% Accuracy
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4647.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4647.asy)
C3 OUT N004 47p
C1 N005 0 1n
XU1 IN IN 0 OUT N005 IN OUT N004 NC_01 0 N003 N003 N001 NC_02 NC_03 NC_04 N001 NC_05 N002 NC_06 0 NC_07 LTM4647 ;pnba VIN)SVIN)VOSNS-)VOUT)TRACK/SS)HIZB)VOSNS+)VFB)RUN)SGND)COMPa)COMPb)INTVCC)PGOOD)PWM)SW)DRVCC)PHASMD)FREQ)MODE/PLLIN)PGND)CLKOUT
R3 N004 0 90.6K
C2 OUT 0 100 Rser=3m x10
R1 N002 0 43.2K
R2 OUT 0 33m
C4 N001 0 4.7
V1 IN 0 12
.tran 1m startup
.lib LTM4647.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 924 680
WIRE 16 -176 -288 -176
WIRE 144 -176 16 -176
WIRE 272 -176 144 -176
WIRE 544 -176 400 -176
WIRE -288 -160 -288 -176
WIRE 16 -144 16 -176
WIRE 144 -144 144 -176
WIRE 272 -144 272 -176
WIRE 400 -144 400 -176
WIRE -80 -80 -192 -80
WIRE 544 -80 544 -176
WIRE 544 -80 496 -80
WIRE -288 -64 -288 -80
WIRE -192 -64 -192 -80
WIRE 544 -64 544 -80
WIRE 544 16 544 0
WIRE -192 32 -192 16
WIRE 528 208 496 208
WIRE 592 208 528 208
WIRE 704 208 592 208
WIRE 848 208 704 208
WIRE 704 224 704 208
WIRE 848 224 848 208
WIRE 592 272 592 208
WIRE -80 304 -128 304
WIRE 528 304 528 208
WIRE 528 304 496 304
WIRE 704 320 704 288
WIRE 848 320 848 304
WIRE -128 400 -128 304
WIRE -80 400 -128 400
WIRE 592 400 592 336
WIRE 592 400 496 400
WIRE 592 416 592 400
WIRE -176 496 -224 496
WIRE -80 496 -112 496
WIRE 512 496 496 496
WIRE 512 512 512 496
WIRE 592 512 592 496
WIRE 592 512 512 512
WIRE 592 528 592 512
WIRE 144 576 144 560
WIRE 272 576 272 560
SYMBOL res -208 -80 R0
SYMATTR InstName R1
SYMATTR Value 43.2K
SYMBOL cap 528 -64 R0
SYMATTR InstName C4
SYMATTR Value 4.7
SYMBOL voltage -288 -176 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL LTM4647 224 208 R0
SYMATTR InstName U1
SYMBOL res 832 208 R0
SYMATTR InstName R2
SYMATTR Value 33m
SYMBOL cap -112 480 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL cap 688 224 R0
WINDOW 39 25 67 Left 2
WINDOW 3 40 38 Left 2
SYMATTR SpiceLine x10
SYMATTR Value 100
SYMATTR InstName C2
SYMATTR Value2 Rser=3m
SYMBOL cap 576 272 R0
SYMATTR InstName C3
SYMATTR Value 47p
SYMBOL res 576 400 R0
SYMATTR InstName R3
SYMATTR Value 90.6K
FLAG -288 -64 0
FLAG -192 32 0
FLAG -224 496 0
FLAG 144 576 0
FLAG 272 576 0
FLAG 704 320 0
FLAG 848 320 0
FLAG 592 528 0
FLAG 544 16 0
FLAG 848 208 OUT
FLAG -288 -176 IN
TEXT 680 552 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\13a22afd18d4_Diode_Compensation.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4857.asy)
+ M=.20134 VJ=.3905 ISR=12.216E-9 NR=4.9950 FC=0.5 TT=0 XTI=2)
D2 N001 Compensated BAR18
V2 VCC5 0 5
V1 IN 0 SINE(2.5 1.2 70Meg)
XU1 IN Compensated VCC5 0 N001 0 ADA4857 ;pnba 100)101)102)103)104)106
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100n
.model BAR18 D(IS=2.2017E-18 N=.2 RS=48.717 IKF=2.3793 CJO=1.4285E-12
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1892 680
WIRE 640 32 640 16
WIRE 672 32 672 16
WIRE 624 48 64 48
WIRE 64 64 64 48
WIRE 816 64 688 64
WIRE 912 64 880 64
WIRE 1008 64 912 64
WIRE 624 80 608 80
WIRE 64 112 64 64
WIRE 608 192 608 80
WIRE 912 192 912 64
WIRE 912 192 608 192
IOPIN -224 80 Out
IOPIN 640 96 In
IOPIN 1008 64 Out
SYMBOL voltage -224 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL schottky 816 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value BAR18
SYMBOL voltage 64 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(2.5 1.2 70Meg)
SYMBOL OpAmps\\ADA4857 656 64 M180
SYMATTR InstName U1
FLAG 64 64 IN
FLAG 64 192 0
FLAG -224 160 0
FLAG -224 80 VCC5
FLAG 640 96 VCC5
FLAG 640 16 0
FLAG 672 16 0
FLAG 1008 64 Compensated
TEXT 136 -56 Left 2 !.tran 100n
TEXT 368 -56 Left 0 !.model BAR18 D(IS=2.2017E-18 N=.2 RS=48.717 IKF=2.3793 CJO=1.4285E-12\n+ M=.20134 VJ=.3905 ISR=12.216E-9 NR=4.9950 FC=0.5 TT=0 XTI=2)
* Z:\home\khalils\Downloads\files\data\raw_asc\097931730ed0_voltage_follower.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 N002 vout 0 NPN
V1 vin 0 SINE(0 5 1k)
R1 N002 vin 270
R2 vout 0 3.3k
V2 N001 0 15
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 432 32 256 32
WIRE 256 80 256 32
WIRE 432 96 432 32
WIRE 80 128 -16 128
WIRE 192 128 160 128
WIRE -16 160 -16 128
WIRE 256 208 256 176
WIRE 352 208 256 208
WIRE 256 224 256 208
WIRE -16 352 -16 240
WIRE 256 352 256 304
WIRE 256 352 -16 352
WIRE 432 352 432 176
WIRE 432 352 256 352
WIRE 256 384 256 352
SYMBOL npn 192 80 R0
SYMATTR InstName Q1
SYMBOL res 176 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 270
SYMBOL voltage 432 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage -16 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1k)
SYMBOL res 240 208 R0
SYMATTR InstName R2
SYMATTR Value 3.3k
FLAG 256 384 0
FLAG 352 208 vout
FLAG -16 128 vin
TEXT -48 408 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX42410B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX42410B.asy)
L1 N002 vOUT 680n Rser=2m
R3 N004 0 15.8k
C4 vOUT N004 47p
C2 N001 N002 0.1
V1 vIN 0 12
R1 PGOOD N003 20k
Rload vOUT 0 0.33
C1 N003 0 2.2
R2 vOUT N004 49.9k
XU1 0 0 vIN vIN N002 N001 N003 NC_01 N004 PGOOD N003 NC_02 vOUT MAX42410B ;pnba GND)PGND)EN)SUP)LX)BST)BIAS)SYNCOUT)FB)PGOOD)SYNC)VEA)OUT
C3 vOUT 0 22 m=3 Rser=1m
.tran 4m startup
.lib MAX42410B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1272 680
WIRE 80 -144 64 -144
WIRE 144 -144 80 -144
WIRE 176 -144 144 -144
WIRE 512 -144 464 -144
WIRE 64 -128 64 -144
WIRE 512 -128 512 -144
WIRE 144 -96 144 -144
WIRE 176 -96 144 -96
WIRE 64 -32 64 -48
WIRE 512 -32 512 -64
WIRE 512 -32 464 -32
WIRE 592 -32 512 -32
WIRE 720 -32 672 -32
WIRE 848 -32 720 -32
WIRE 960 -32 848 -32
WIRE 1024 -32 960 -32
WIRE 1056 -32 1024 -32
WIRE 720 -16 720 -32
WIRE 1056 -16 1056 -32
WIRE 848 0 848 -32
WIRE 960 0 960 -32
WIRE 176 16 144 16
WIRE 656 32 720 -32
WIRE 656 32 464 32
WIRE 720 64 720 48
WIRE 1056 80 1056 64
WIRE 848 96 848 80
WIRE 848 96 464 96
WIRE 960 96 960 64
WIRE 960 96 848 96
WIRE 848 128 848 96
WIRE 480 224 464 224
WIRE 848 224 848 208
WIRE 144 272 144 16
WIRE 144 272 64 272
WIRE 176 272 144 272
WIRE 64 288 64 272
WIRE 512 288 464 288
WIRE 608 288 512 288
WIRE 320 352 320 336
WIRE 64 368 64 352
WIRE 144 400 144 272
WIRE 496 400 144 400
WIRE 608 400 608 288
WIRE 608 400 576 400
SYMBOL res 832 -16 R0
SYMATTR InstName R2
SYMATTR Value 49.9k
SYMBOL cap 496 -128 R0
SYMATTR InstName C2
SYMATTR Value 0.1u
SYMBOL ind 576 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 680n
SYMATTR SpiceLine Rser=2m
SYMBOL cap 48 288 R0
SYMATTR InstName C1
SYMATTR Value 2.2u
SYMBOL res 832 112 R0
SYMATTR InstName R3
SYMATTR Value 15.8k
SYMBOL cap 704 -16 R0
WINDOW 3 43 38 Left 2
WINDOW 123 48 63 Left 2
SYMATTR Value 22u
SYMATTR Value2 m=3
SYMATTR InstName C3
SYMATTR SpiceLine Rser=1m
SYMBOL MAX42410B 320 96 R0
SYMATTR InstName U1
SYMBOL res 1040 -32 R0
SYMATTR InstName Rload
SYMATTR Value 0.33
SYMBOL voltage 64 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 592 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20k
SYMBOL cap 944 0 R0
SYMATTR InstName C4
SYMATTR Value 47p
FLAG 64 -32 0
FLAG 64 368 0
FLAG 320 352 0
FLAG 720 64 0
FLAG 1056 80 0
FLAG 80 -144 vIN
FLAG 1024 -32 vOUT
FLAG 480 224 0
FLAG 848 224 0
FLAG 512 288 PGOOD
TEXT 648 376 Left 2 !.tran 4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\562f1ee60c5d_Parte4.asc
* Generated by LTspice 26.0.1 for Windows.
Rd N001 Vout 10k
M1 Vout N002 0 N003 N_1u l=1.5u w=9.23u
Vdd N001 0 5
V1 N002 0 1.7858314
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.dc Vdd 0 5 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 -160 144 -160
WIRE 144 -144 144 -160
WIRE 192 -96 144 -96
WIRE 288 -16 288 -160
WIRE 288 -16 192 -16
WIRE 144 16 144 -96
WIRE 144 128 144 96
WIRE 224 128 144 128
WIRE 64 176 -32 176
WIRE 176 176 144 176
WIRE 64 208 64 176
WIRE 96 208 64 208
WIRE 176 208 176 176
WIRE 176 208 144 208
WIRE 144 272 144 224
WIRE -32 304 -32 256
SYMBOL res 128 0 R0
SYMATTR InstName Rd
SYMATTR Value 10k
SYMBOL voltage 192 -112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vdd
SYMATTR Value 5
SYMBOL nmos4 96 128 R0
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=1.5u w=9.23u
SYMBOL voltage -32 160 R0
SYMATTR InstName V1
SYMATTR Value 1.7858314
FLAG -32 304 0
FLAG 144 272 0
FLAG 144 -144 0
FLAG 224 128 Vout
TEXT -240 -32 Left 2 !.include cmosedu_models.txt
TEXT -240 328 Left 2 !.dc Vdd 0 5 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\38efc4ca1deb_ADA4177-4.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4177-4.asy)
Vin IN 0 SINE(0 1 10K)
V1 +V 0 15
V2 -V 0 -15
XU1 IN N001 +V -V OUT ADA4177 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 10K
R1 N001 0 10K
.tran 1m
.lib ADA4177.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 416 -1232 400 -1232
WIRE 512 -1232 496 -1232
WIRE 544 -1232 512 -1232
WIRE 656 -1232 624 -1232
WIRE 128 -1136 128 -1152
WIRE 240 -1136 240 -1152
WIRE 512 -1120 512 -1232
WIRE 544 -1120 512 -1120
WIRE 656 -1104 656 -1232
WIRE 656 -1104 608 -1104
WIRE 720 -1104 656 -1104
WIRE 544 -1088 432 -1088
WIRE 432 -1072 432 -1088
WIRE 128 -1040 128 -1056
WIRE 240 -1040 240 -1056
WIRE 432 -976 432 -992
SYMBOL voltage 240 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 128 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 512 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL opamps\\ADA4177-4 576 -1104 R0
SYMATTR InstName U1
FLAG 128 -1152 +V
FLAG 128 -1040 0
FLAG 432 -976 0
FLAG 720 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 240 -1152 -V
FLAG 576 -1072 -V
FLAG 400 -1232 0
FLAG 240 -1040 0
TEXT 704 -992 Left 2 !.tran 1m