Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\phaseshift2.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
C3 0 N004 .1
R3 N003 N002 {R}
C1 0 N002 .1
R1 N001 OUT 20K
R4 N004 N003 {R}
C2 0 N003 .1
V1 N001 0 10
R2 N002 OUT {R}
Q1 OUT N004 0 0 2N3904
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 100m startup
.params R=10K
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2124 2568
WIRE 2032 2016 1856 2016
WIRE 1856 2032 1856 2016
WIRE 2032 2032 2032 2016
WIRE 2032 2128 2032 2112
WIRE 1856 2144 1856 2112
WIRE 1856 2144 1360 2144
WIRE 1920 2144 1856 2144
WIRE 1856 2176 1856 2144
WIRE 1360 2224 1360 2144
WIRE 1376 2224 1360 2224
WIRE 1472 2224 1456 2224
WIRE 1504 2224 1472 2224
WIRE 1616 2224 1584 2224
WIRE 1648 2224 1616 2224
WIRE 1760 2224 1728 2224
WIRE 1792 2224 1760 2224
WIRE 1472 2256 1472 2224
WIRE 1616 2256 1616 2224
WIRE 1760 2256 1760 2224
WIRE 1856 2288 1856 2272
WIRE 1472 2336 1472 2320
WIRE 1616 2336 1616 2320
WIRE 1760 2336 1760 2320
SYMBOL res 1600 2208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value {R}
SYMBOL npn 1792 2176 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage 2032 2016 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL cap 1600 2320 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL res 1472 2208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R}
SYMBOL res 1744 2208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value {R}
SYMBOL res 1840 2016 R0
SYMATTR InstName R1
SYMATTR Value 20K
SYMBOL cap 1456 2320 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL cap 1744 2320 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value .1
FLAG 1856 2288 0
FLAG 1760 2336 0
FLAG 1616 2336 0
FLAG 1472 2336 0
FLAG 2032 2128 0
FLAG 1920 2144 OUT
TEXT 1760 2408 Left 2 !.tran 100m startup
TEXT 1296 2392 Left 2 !.params R=10K
TEXT 1624 2456 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1468.asc
* Generated by LTspice 26.0.1 for Windows.
* 100KHz Low Distortion Bandpass Filter
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1468.asy)
V2 -V 0 -15
XU1 0 N002 +V -V OUT LT1468 ;pnba In+)In-)V+)V-)OUT
C2 OUT N001 1000p
C1 N002 N001 1000p
V1 +V 0 15
V3 IN 0 AC 1
R2 N001 IN 11K
R3 0 N001 121
R1 OUT N002 22.1K
.ac oct 100 10K 1Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -224 16 -224 0
WIRE -96 16 -96 0
WIRE 80 32 0 32
WIRE 304 32 144 32
WIRE 192 96 176 96
WIRE 304 96 304 32
WIRE 304 96 272 96
WIRE -224 112 -224 96
WIRE -96 112 -96 96
WIRE 240 208 240 192
WIRE -144 224 -208 224
WIRE 0 224 0 32
WIRE 0 224 -64 224
WIRE 80 224 0 224
WIRE 176 224 176 96
WIRE 176 224 144 224
WIRE 208 224 176 224
WIRE -208 240 -208 224
WIRE 0 240 0 224
WIRE 304 240 304 96
WIRE 304 240 272 240
WIRE 352 240 304 240
WIRE 208 256 176 256
WIRE 240 288 240 272
WIRE -208 336 -208 320
WIRE 0 336 0 320
SYMBOL voltage -96 0 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res -16 336 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 121
SYMBOL voltage -224 0 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL cap 144 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000p
SYMBOL res -48 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 11K
SYMBOL res 288 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 22.1K
SYMBOL opamps\\LT1468 240 176 R0
SYMATTR InstName U1
SYMBOL voltage -208 224 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL cap 144 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1000p
FLAG -96 112 0
FLAG 240 192 +V
FLAG -96 0 +V
FLAG 240 288 -V
FLAG -224 112 0
FLAG -224 0 -V
FLAG -208 336 0
FLAG 176 256 0
FLAG 0 336 0
FLAG 352 240 OUT
FLAG -208 224 IN
TEXT 96 352 Left 2 !.ac oct 100 10K 1Meg
TEXT 80 -56 Bottom 2 ;100KHz Low Distortion Bandpass Filter
* Z:\home\khalils\Downloads\files\data\raw_asc\Vswitch.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* This shows an example of suppling a .model statement as a SPICE\ndirective directly on the schematic to define a voltage controlled switch.
R1 N001 OUT 1K
S1 0 OUT IN 0 MYSW
V2 N001 0 3.3
V1 IN 0 PULSE(0 1 0 .5m .5m 0 1m)
.model MYSW SW(Ron=1 Roff=1Meg Vt=.5 Vh=-.4)
.tran 3m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1276 680
WIRE 224 144 192 144
WIRE 336 144 304 144
WIRE 192 176 192 144
WIRE 144 192 -208 192
WIRE 336 192 336 144
WIRE -208 208 -208 192
WIRE 144 240 128 240
WIRE 192 272 192 256
WIRE 336 304 336 272
WIRE -208 320 -208 288
SYMBOL sw 192 272 M180
WINDOW 0 12 104 Left 2
WINDOW 3 17 11 Left 2
SYMATTR InstName S1
SYMATTR Value MYSW
SYMBOL voltage -208 192 R0
WINDOW 3 13 107 Left 2
SYMATTR Value PULSE(0 1 0 .5m .5m 0 1m)
SYMATTR InstName V1
SYMBOL res 320 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 336 176 R0
SYMATTR InstName V2
SYMATTR Value 3.3
FLAG 336 304 0
FLAG 192 272 0
FLAG 128 240 0
FLAG -208 320 0
FLAG -208 192 IN
FLAG 192 144 OUT
TEXT -224 400 Left 2 !.model MYSW SW(Ron=1 Roff=1Meg Vt=.5 Vh=-.4)
TEXT 192 344 Left 2 !.tran 3m
TEXT 96 432 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT 56 88 Bottom 2 ;This shows an example of suppling a .model statement as a SPICE\ndirective directly on the schematic to define a voltage controlled switch.
* Z:\home\khalils\Downloads\files\data\raw_asc\024ac841a257_Fig9_24_pmos.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1) and 1/d(Id(M1)) (to get ro)
M1 0 N001 N002 0 P_1u l=2u w=30u
VSG 0 N001 1.15
VSD 0 N002 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSD 0 5 1m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 688
WIRE 320 96 320 80
WIRE 320 192 320 176
WIRE 400 192 320 192
WIRE 448 80 320 80
WIRE 448 112 448 80
WIRE 448 304 448 208
WIRE 672 80 448 80
WIRE 672 160 448 160
WIRE 672 160 672 80
WIRE 672 192 672 160
WIRE 672 304 448 304
WIRE 672 304 672 272
WIRE 848 80 672 80
WIRE 848 112 848 80
SYMBOL voltage 320 80 R0
WINDOW 0 -93 54 Left 0
WINDOW 3 -93 82 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VSG
SYMATTR Value 1.15
SYMBOL pmos4 400 112 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=2u w=30u
SYMATTR InstName M1
SYMATTR Value P_1u
SYMBOL voltage 672 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 38 54 Left 0
WINDOW 3 24 104 Invisible 0
SYMATTR InstName VSD
SYMATTR Value 0
FLAG 848 112 0
TEXT 384 336 Left 0 !.dc VSD 0 5 1m
TEXT 384 360 Left 0 !.lib cmosedu_models.txt
TEXT 368 48 Left 0 ;Plot Id(M1) and 1/d(Id(M1)) (to get ro)
* Z:\tmp\asc_dec_bjh7r6w2\0114d40776ca_audioamp-output-cap_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N003 N002 4.7nF
R3 N005 0 10k
C N004 IN 100nF
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2344 2032
WIRE 1152 1168 1024 1168
WIRE 864 1200 864 1184
WIRE 1008 1200 928 1200
WIRE 864 1312 864 1200
WIRE 880 1312 864 1312
WIRE 928 1312 880 1312
WIRE 1008 1312 1008 1200
WIRE 1040 1312 1008 1312
WIRE 624 1360 560 1360
WIRE 752 1360 688 1360
WIRE 1024 1360 1024 1168
WIRE 1024 1360 1008 1360
WIRE 1008 1392 1008 1360
WIRE 560 1408 560 1360
WIRE 752 1408 752 1360
WIRE 768 1408 752 1408
WIRE 880 1408 880 1312
WIRE 880 1408 848 1408
WIRE 976 1408 880 1408
WIRE 1040 1408 1040 1312
WIRE 944 1424 880 1424
WIRE 912 1440 800 1440
WIRE 944 1440 944 1424
WIRE 976 1440 944 1440
WIRE 912 1520 912 1440
WIRE 976 1520 912 1520
WIRE 560 1536 560 1488
WIRE 800 1536 800 1520
WIRE 880 1536 880 1424
WIRE 880 1536 800 1536
WIRE 800 1552 800 1536
SYMBOL cap 928 1184 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7nF
SYMBOL res 784 1536 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL cap 688 1344 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C
SYMATTR Value 100nF
FLAG 800 1632 0
FLAG 560 1536 0
FLAG 560 1360 IN
FLAG 976 1600 0
* Z:\home\khalils\Downloads\files\data\raw_asc\40ee0e7b2def_Fig9_30_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
VSG 0 N001 0
VSD 0 N003 1
VBS N002 0 0
M1 N003 N001 0 N002 P_50n l=100n w=5u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSG 0 1
.include cmosedu_models.txt
* Plot Is(M1)
.temp 0 50 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 688
WIRE 448 16 320 16
WIRE 672 16 448 16
WIRE 720 16 672 16
WIRE 320 32 320 16
WIRE 720 48 720 16
WIRE 448 112 448 16
WIRE 320 128 320 112
WIRE 400 128 320 128
WIRE 528 160 448 160
WIRE 672 160 672 16
WIRE 672 160 608 160
WIRE 672 208 672 160
WIRE 448 304 448 208
WIRE 672 304 672 288
WIRE 672 304 448 304
FLAG 720 48 0
SYMBOL voltage 320 16 R0
WINDOW 0 -89 56 Left 2
WINDOW 3 24 104 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VSG
SYMATTR Value 0
SYMBOL voltage 672 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 41 57 Left 2
WINDOW 3 41 85 Left 2
SYMATTR InstName VSD
SYMATTR Value 1
SYMBOL voltage 512 160 M90
WINDOW 0 64 48 VBottom 2
WINDOW 3 52 90 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VBS
SYMATTR Value 0
SYMBOL pmos4 400 208 M180
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=100n w=5u
SYMATTR InstName M1
SYMATTR Value P_50n
TEXT 424 344 Left 2 !.dc VSG 0 1
TEXT 424 392 Left 2 !.include cmosedu_models.txt
TEXT 488 -8 Left 2 ;Plot Is(M1)
TEXT 424 368 Left 2 !.temp 0 50 100
* Z:\home\khalils\Downloads\files\data\raw_asc\37e16d2c2ebf_Circuito_sesion6.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
V1 N002 0 2
V2 N003 0 PULSE(-1 1 0 0.5m 0.5m 0 1m 1000)
R1 N001 N003 1000
R3 Output N001 1000
V4 Vcc- 0 -5
V3 Vcc+ 0 5
R2 N001 N002 2200
XU1 0 N001 Vcc+ Vcc- Output level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.tran 0 10m 5m 0.005m
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
WIRE 208 -416 -64 -416
WIRE 464 -416 288 -416
WIRE 336 -192 336 -240
WIRE -64 -176 -64 -416
WIRE 144 -176 -64 -176
WIRE 304 -176 144 -176
WIRE 464 -160 464 -416
WIRE 464 -160 368 -160
WIRE 304 -144 272 -144
WIRE -64 -128 -64 -176
WIRE 144 -128 144 -176
WIRE 336 -80 336 -128
WIRE -64 0 -64 -48
WIRE 144 0 144 -48
WIRE 672 0 672 -48
WIRE 816 0 816 -48
WIRE -64 112 -64 80
WIRE 144 112 144 80
WIRE 144 112 -64 112
WIRE 272 112 272 -144
WIRE 272 112 144 112
WIRE 672 112 672 80
WIRE 816 112 816 80
SYMBOL res 304 -432 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1000
SYMBOL res 128 -144 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL voltage 816 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value -5
SYMBOL Opamps\\UniversalOpamp2 336 -160 R0
SYMATTR InstName U1
SYMBOL res -80 -144 R0
SYMATTR InstName R2
SYMATTR Value 2200
SYMBOL voltage 144 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(-1 1 0 0.5m 0.5m 0 1m 1000)
SYMBOL voltage 672 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -64 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2
FLAG 144 112 0
FLAG 672 112 0
FLAG 816 112 0
FLAG 672 -48 Vcc+
FLAG 336 -240 Vcc+
FLAG 816 -48 Vcc-
FLAG 336 -80 Vcc-
FLAG 464 -160 Output
TEXT 528 -320 Left 2 !.tran 0 10m 5m 0.005m
* Z:\home\khalils\Downloads\files\data\raw_asc\54d489d33e68_RN-3.asc
* Generated by LTspice 26.0.1 for Windows.
R1 b 0 100
V1 a 0 SINE(0 14 1k)
D1 b a RFN2L6S
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -176 144 -208 144
WIRE -112 144 -176 144
WIRE 32 144 -48 144
WIRE 48 144 32 144
WIRE -208 192 -208 144
WIRE 48 192 48 144
WIRE -208 320 -208 272
WIRE -80 320 -208 320
WIRE 48 320 48 272
WIRE 48 320 -80 320
WIRE -80 336 -80 320
SYMBOL Misc\\EuropeanResistor 32 176 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL Misc\\signal -208 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 14 1k)
SYMBOL diode -48 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value RFN2L6S
FLAG -80 336 0
FLAG -176 144 a
FLAG 32 144 b
TEXT -248 336 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\0bf65ebef417_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
V3 DRV 0 0
R1 N003 0 470
V1 LED1 0 5
DP1 DRV N001 D
DP2 DRV N002 D
D5 DRV N003 D
R3 N001 LED1 470
R2 N002 LED2 470
DP3 N001 DRV D
V2 LED2 0 0
DP4 N002 DRV D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 1060
WIRE 384 176 256 176
WIRE 48 272 -80 272
WIRE 192 272 192 176
WIRE 192 272 128 272
WIRE 192 352 192 272
WIRE 384 352 384 176
WIRE 384 352 256 352
WIRE 384 464 384 352
WIRE 384 464 256 464
WIRE 48 544 -80 544
WIRE 192 544 192 464
WIRE 192 544 128 544
WIRE 192 608 192 544
WIRE 384 608 384 464
WIRE 384 608 256 608
WIRE -832 720 -832 688
WIRE -688 720 -688 688
WIRE -528 720 -528 688
WIRE 384 736 384 608
WIRE 384 736 80 736
WIRE 384 768 384 736
WIRE -832 848 -832 800
WIRE -688 848 -688 800
WIRE -528 848 -528 800
WIRE 384 896 384 832
WIRE 384 1040 384 976
SYMBOL voltage -528 704 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 0
SYMBOL LED 368 768 R0
SYMATTR InstName D5
SYMBOL res 368 880 R0
SYMATTR InstName R1
SYMATTR Value 470
SYMBOL voltage -832 704 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 144 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 470
SYMBOL voltage -688 704 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL LED 192 368 R270
WINDOW 0 72 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName P3
SYMBOL LED 256 448 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 72 32 VTop 2
SYMATTR InstName P2
SYMBOL LED 256 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 72 32 VTop 2
SYMATTR InstName P1
SYMBOL res 144 528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 470
SYMBOL LED 192 624 R270
WINDOW 0 72 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName P4
FLAG 384 1040 0
FLAG -832 848 0
FLAG -688 848 0
FLAG -528 848 0
FLAG -528 688 DRV
FLAG -688 688 LED2
FLAG -832 688 LED1
FLAG 80 736 DRV
FLAG -80 272 LED1
FLAG -80 544 LED2
TEXT -200 952 Left 2 !.tran 0 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1773.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1773.asy)
C1 OUT 0 180 Rser=.1
V1 IN 0 5
C4 N003 0 .001
R3 IN N001 .025
R2 0 N006 80.6K
Rload OUT 0 2
R1 OUT N006 169K
C3 N004 0 220p Rser=30K
L1 N005 OUT 5
MQ2 N005 N007 0 0 IRF7201
XU1 N004 N003 IN N006 0 N007 N002 IN N001 N005 LTC1773 ;pnba Ith)Run/SS)FCB)FB)GND)BG)TG)Vin)Sense-)SW
MQ1 N005 N002 N001 N001 FDC638P
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m startup
.lib LTC1773.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2908 1472
WIRE 1632 896 1504 896
WIRE 1824 896 1632 896
WIRE 2064 896 1824 896
WIRE 1504 912 1504 896
WIRE 2064 912 2064 896
WIRE 1824 944 1824 896
WIRE 1504 1008 1504 992
WIRE 1632 1008 1632 896
WIRE 1664 1008 1632 1008
WIRE 2064 1008 2064 992
WIRE 2064 1008 1984 1008
WIRE 2064 1024 2064 1008
WIRE 2016 1040 2000 1040
WIRE 1584 1072 1568 1072
WIRE 1664 1072 1648 1072
WIRE 2000 1072 2000 1040
WIRE 2000 1072 1984 1072
WIRE 1504 1136 1472 1136
WIRE 1664 1136 1568 1136
WIRE 2064 1136 2064 1120
WIRE 2064 1136 1984 1136
WIRE 2112 1136 2064 1136
WIRE 2240 1136 2192 1136
WIRE 2352 1136 2240 1136
WIRE 2464 1136 2352 1136
WIRE 2064 1152 2064 1136
WIRE 2240 1152 2240 1136
WIRE 2352 1152 2352 1136
WIRE 2464 1152 2464 1136
WIRE 1664 1200 1632 1200
WIRE 2000 1200 1984 1200
WIRE 2000 1232 2000 1200
WIRE 2016 1232 2000 1232
WIRE 2240 1248 2240 1232
WIRE 2240 1248 2160 1248
WIRE 2352 1248 2352 1216
WIRE 2464 1248 2464 1232
WIRE 2064 1264 2064 1248
WIRE 2240 1264 2240 1248
WIRE 1824 1280 1824 1264
WIRE 1632 1312 1632 1200
WIRE 2160 1312 2160 1248
WIRE 2160 1312 1632 1312
WIRE 2240 1360 2240 1344
SYMBOL NMOS 2016 1152 R0
SYMATTR InstName Q2
SYMATTR Value IRF7201
SYMBOL res 2224 1360 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 80.6K
SYMBOL res 2448 1136 R0
SYMATTR InstName Rload
SYMATTR Value 2
SYMBOL cap 1648 1056 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value .001
SYMBOL RES 2048 896 R0
SYMATTR InstName R3
SYMATTR Value .025
SYMBOL polcap 2336 1152 R0
SYMATTR SpiceLine Rser=.1
SYMATTR InstName C1
SYMATTR Value 180
SYMBOL ind 2096 1152 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 5
SYMBOL VOLTAGE 1504 896 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL POWERPRODUCTS\\LTC1773 1824 1104 R0
WINDOW 3 -45 67 Left 2
SYMATTR InstName U1
SYMBOL RES 2224 1136 R0
SYMATTR InstName R1
SYMATTR Value 169K
SYMBOL PMOS 2016 1120 M180
WINDOW 0 60 79 Left 2
WINDOW 3 58 47 Left 2
SYMATTR InstName Q1
SYMATTR Value FDC638P
SYMBOL cap 1568 1120 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 39 56 34 VTop 2
SYMATTR InstName C3
SYMATTR Value 220p
SYMATTR SpiceLine Rser=30K
FLAG 1824 1280 0
FLAG 2240 1360 0
FLAG 2352 1248 0
FLAG 1504 1008 0
FLAG 2464 1248 0
FLAG 2464 1136 OUT
FLAG 2064 1264 0
FLAG 1472 1136 0
FLAG 1568 1072 0
FLAG 1504 896 IN
TEXT 2360 1328 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX42402B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX42402B.asy)
L1 N002 vOUT 2.2 Rser=13.5m
C4 vOUT N004 47p
XU1 0 0 vIN vIN N002 N001 N003 N003 N004 PGOOD N003 MAX42402B ;pnba GND)PGND)EN)SUP)LX)BST)BIAS)SPS)FB)PGOOD)SYNC
C2 N001 N002 0.1
C1 N003 0 2.2
Rload vOUT 0 1.32
R1 PGOOD N003 20k
R3 N004 0 15.8k
R2 vOUT N004 49.9k
C3 vOUT 0 47 Rser=2m
V1 vIN 0 12
.tran 4m startup
.lib MAX42402B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 680
WIRE 64 -144 48 -144
WIRE 144 -144 64 -144
WIRE 176 -144 144 -144
WIRE 512 -144 464 -144
WIRE 48 -128 48 -144
WIRE 512 -128 512 -144
WIRE 144 -96 144 -144
WIRE 176 -96 144 -96
WIRE 48 -32 48 -48
WIRE 512 -32 512 -64
WIRE 512 -32 464 -32
WIRE 608 -32 512 -32
WIRE 736 -32 688 -32
WIRE 832 -32 736 -32
WIRE 960 -32 832 -32
WIRE 1024 -32 960 -32
WIRE 1056 -32 1024 -32
WIRE 736 -16 736 -32
WIRE 1056 -16 1056 -32
WIRE 832 0 832 -32
WIRE 960 0 960 -32
WIRE 176 16 112 16
WIRE 736 64 736 48
WIRE 1056 80 1056 64
WIRE 832 96 832 80
WIRE 832 96 464 96
WIRE 960 96 960 64
WIRE 960 96 832 96
WIRE 112 128 112 16
WIRE 176 128 112 128
WIRE 832 128 832 96
WIRE 480 224 464 224
WIRE 832 224 832 208
WIRE 112 272 112 128
WIRE 112 272 32 272
WIRE 176 272 112 272
WIRE 32 288 32 272
WIRE 512 288 464 288
WIRE 608 288 512 288
WIRE 320 352 320 336
WIRE 32 368 32 352
WIRE 112 400 112 272
WIRE 496 400 112 400
WIRE 608 400 608 288
WIRE 608 400 576 400
SYMBOL cap 496 -128 R0
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL res 816 112 R0
SYMATTR InstName R3
SYMATTR Value 15.8k
SYMBOL res 1040 -32 R0
SYMATTR InstName Rload
SYMATTR Value 1.32
SYMBOL cap 944 0 R0
SYMATTR InstName C4
SYMATTR Value 47p
SYMBOL ind 592 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=13.5m
SYMBOL res 816 -16 R0
SYMATTR InstName R2
SYMATTR Value 49.9k
SYMBOL cap 16 288 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL res 592 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20k
SYMBOL cap 720 -16 R0
SYMATTR InstName C3
SYMATTR Value 47
SYMATTR SpiceLine Rser=2m
SYMBOL MAX42402B 320 96 R0
SYMATTR InstName U1
SYMBOL voltage 48 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 48 -32 0
FLAG 32 368 0
FLAG 320 352 0
FLAG 736 64 0
FLAG 1056 80 0
FLAG 64 -144 vIN
FLAG 1024 -32 vOUT
FLAG 480 224 0
FLAG 832 224 0
FLAG 512 288 PGOOD
TEXT 648 376 Left 2 !.tran 4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1328.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1328.asy)
V1 +V 0 5
I1 N001 0 PULSE(7u 100u 0 10n 10n .5u 1u)
C3 0 N002 1000p
XU1 N001 N003 N004 0 N005 +V 0 N002 LT1328 ;pnba IN)FILT)FILT_SW)GND)DATA)VCC)MODE)Vbias
C1 N003 N004 10n Rser=.1
C2 N003 0 330p
.tran 10u
.lib LT1328.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -528 -144 -624 -144
WIRE -208 -144 -448 -144
WIRE 64 -144 48 -144
WIRE 144 -144 128 -144
WIRE -272 -80 -352 -80
WIRE -208 -80 -272 -80
WIRE 80 -80 48 -80
WIRE -352 -64 -352 -80
WIRE -208 -16 -272 -16
WIRE 80 -16 48 -16
WIRE -528 0 -528 -16
WIRE -352 16 -352 0
WIRE -208 48 -240 48
WIRE 80 48 48 48
WIRE -528 96 -528 80
SYMBOL current -448 -144 R90
WINDOW 0 -32 40 VBottom 2
WINDOW 3 32 40 VTop 2
WINDOW 123 32 40 VTop 2
WINDOW 39 32 40 VTop 2
SYMATTR InstName I1
SYMATTR Value PULSE(7u 100u 0 10n 10n .5u 1u)
SYMBOL cap -368 -64 R0
WINDOW 0 27 13 Left 2
WINDOW 3 29 51 Left 2
SYMATTR InstName C2
SYMATTR Value 330p
SYMBOL opamps\\LT1328 -80 -48 R0
SYMATTR InstName U1
SYMBOL voltage -528 -16 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap -288 -80 R0
WINDOW 0 27 13 Left 2
WINDOW 3 29 51 Left 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMATTR SpiceLine Rser=.1
SYMBOL cap 128 -160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1000p
FLAG -528 96 0
FLAG -528 -16 +V
FLAG -240 48 0
FLAG 80 -16 +V
FLAG -624 -144 0
FLAG -352 16 0
FLAG 144 -144 0
FLAG 80 -80 0
TEXT 80 88 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\61545ca18409_BD139_Input_Characteristic_Curve.asc
* Generated by LTspice 26.0.1 for Windows.
* https://www.youtube.com/watch?v=7WWJ2kfJ3oc
Vcc N001 0 12
Rc N001 Vce 1
Vb N002 0 0
Q1 Vce N002 0 0 BD139
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Vb 0.1 7 .01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1232 680
WIRE 448 16 256 16
WIRE 256 32 256 16
WIRE 256 128 256 112
WIRE 320 128 256 128
WIRE 256 144 256 128
WIRE 448 144 448 16
WIRE 192 192 32 192
WIRE 32 240 32 192
WIRE 448 240 448 224
WIRE 256 272 256 240
WIRE 32 336 32 320
SYMBOL npn 192 144 R0
SYMATTR InstName Q1
SYMATTR Value BD139
SYMBOL voltage 32 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vb
SYMATTR Value 0
SYMBOL voltage 448 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 12
SYMBOL res 240 16 R0
SYMATTR InstName Rc
SYMATTR Value 1
FLAG 256 272 0
FLAG 448 240 0
FLAG 32 336 0
FLAG 320 128 Vce
TEXT 144 336 Left 2 !.dc Vb 0.1 7 .01
TEXT 584 16 Left 2 ;https://www.youtube.com/watch?v=7WWJ2kfJ3oc