Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\e0ea26ce6fcd_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 V
V2 P001 0 V
R1 N002 N001 R
R2 P001 P002 R
Q1 P002 N002 0 0 BC547C
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1344 680
WIRE 128 112 80 112
WIRE 240 112 208 112
WIRE 80 160 80 112
WIRE 192 240 80 240
WIRE 304 240 304 160
WIRE 304 240 192 240
FLAG 192 240 0
FLAG 304 -96 0
SYMBOL voltage 80 144 R0
SYMATTR InstName V1
SYMBOL voltage 304 0 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMBOL res 224 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMBOL res 288 -32 R0
SYMATTR InstName R2
SYMBOL npn2 240 64 R0
SYMATTR InstName Q1
SYMATTR Value BC547C
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3526L-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3526L-2.asy)
C2 OUT N002 10p
R2 N002 0 1Meg
L1 IN N001 2.2 Rpar=5K
Rload OUT 0 16.5
C1 OUT 0 4.7 Rser=1m
XU1 N001 0 IN IN N002 OUT LTC3526L-2 ;pnba SW)GND)Vin)_SHDN)FB)Vout
R1 OUT N002 1.78Meg
V1 IN 0 2
.tran 500u startup
.lib LTC3526L-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 64 -128 64
WIRE 0 64 -48 64
WIRE 128 64 80 64
WIRE -128 80 -128 64
WIRE 128 112 128 64
WIRE -128 176 -128 160
WIRE -48 176 -48 64
WIRE -16 176 -48 176
WIRE 320 176 272 176
WIRE 448 176 320 176
WIRE 528 176 448 176
WIRE 640 176 528 176
WIRE 528 192 528 176
WIRE 640 192 640 176
WIRE 320 208 320 176
WIRE 448 208 448 176
WIRE 528 288 528 256
WIRE 640 288 640 272
WIRE -48 336 -48 176
WIRE -16 336 -48 336
WIRE 320 336 320 288
WIRE 320 336 272 336
WIRE 448 336 448 272
WIRE 448 336 320 336
WIRE 320 352 320 336
WIRE 128 416 128 400
WIRE 320 448 320 432
SYMBOL ind -16 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rpar=5K
SYMBOL res 304 336 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL PowerProducts\\LTC3526L-2 128 256 R0
SYMATTR InstName U1
SYMBOL res 624 176 R0
SYMATTR InstName Rload
SYMATTR Value 16.5
SYMBOL cap 512 192 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1m
SYMBOL cap 432 208 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL voltage -128 64 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL res 304 192 R0
SYMATTR InstName R1
SYMATTR Value 1.78Meg
FLAG -128 176 0
FLAG 128 416 0
FLAG 320 448 0
FLAG 528 288 0
FLAG 640 288 0
FLAG -128 64 IN
FLAG 640 176 OUT
TEXT 464 424 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\608ac321afe3_ID_vs_UGS_small_signal.asc
* Generated by LTspice 26.0.1 for Windows.
V1 VDD 0 12
M1 UDS UGS 0 0 BSP89
RD UDS VDD 8
V2 UGS 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 0 6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1292 680
WIRE -720 -272 -720 -304
WIRE -720 -160 -720 -192
WIRE -624 -160 -720 -160
WIRE -720 -128 -720 -160
WIRE -928 -48 -944 -48
WIRE -768 -48 -928 -48
WIRE -944 0 -944 -48
WIRE -480 0 -480 -32
WIRE -944 128 -944 80
WIRE -720 128 -720 -32
WIRE -480 128 -480 80
SYMBOL voltage -944 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 53 Left 2
WINDOW 3 -97 181 Left 2
WINDOW 0 35 44 Left 2
SYMATTR Value ""
SYMATTR InstName V2
SYMBOL Misc\\EuropeanResistor -704 -176 R180
WINDOW 0 -49 65 Left 2
WINDOW 3 -51 33 Left 2
SYMATTR InstName RD
SYMATTR Value 8
SYMBOL nmos -768 -128 R0
SYMATTR InstName M1
SYMATTR Value BSP89
SYMBOL voltage -480 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 36 82 Left 2
SYMATTR InstName V1
SYMATTR Value 12
FLAG -480 128 0
FLAG -944 128 0
FLAG -720 128 0
FLAG -480 -32 VDD
FLAG -720 -304 VDD
FLAG -624 -160 UDS
FLAG -928 -48 UGS
TEXT -960 168 Left 2 !.dc V2  0 6
* Z:\home\khalils\Downloads\files\data\raw_asc\ADGM3121.asc
* Generated by LTspice 26.0.1 for Windows.
V1 VDD 0 {Vdd}
R1 vRFCA 0 300
XU1 0 VDD vIN1 NC_01 NC_02 NC_03 vRFCA vRF1A NC_04 NC_05 NC_06 NC_07 ADGM3121 ;pnba GND)VDD)IN1)IN2)IN3)IN4)RFCA)RF1A)RF2A)RFCB)RF1B)RF2B
V3 vIN1 0 PULSE(3.3 0 0 10u 10u 10m 20m)
V2 vRF1A 0 3
.tran 100m
* Notes:
.param Vdd = 3.3
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADGM3121.asy)
.lib ADGM3121.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2244 1360
WIRE 1072 -240 1040 -240
WIRE 1072 -208 1072 -240
WIRE 768 -128 736 -128
WIRE 896 -128 848 -128
WIRE 944 -128 896 -128
WIRE 1264 -128 1200 -128
WIRE 1328 -128 1264 -128
WIRE 896 -48 672 -48
WIRE 944 -48 896 -48
WIRE 1328 -48 1328 -128
WIRE 672 -16 672 -48
WIRE 672 96 672 64
WIRE 1328 112 1328 32
WIRE 720 192 672 192
WIRE 672 256 672 192
WIRE 672 384 672 336
WIRE 1072 528 1072 480
FLAG 672 384 0
FLAG 1328 112 0
FLAG 1072 528 0
FLAG 672 96 0
FLAG 736 -128 0
FLAG 1264 -128 vRFCA
FLAG 896 -128 vRF1A
FLAG 896 -48 vIN1
FLAG 1040 -240 VDD
FLAG 720 192 VDD
SYMBOL voltage 672 240 R0
WINDOW 0 55 43 Bottom 2
WINDOW 3 65 85 Top 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vdd}
SYMBOL res 1312 -64 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL ADGM3121 1072 -80 R0
SYMATTR InstName U1
SYMBOL voltage 672 -32 R0
WINDOW 0 18 8 Left 2
WINDOW 3 -218 178 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(3.3 0 0 10u 10u 10m 20m)
SYMBOL voltage 864 -128 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3
TEXT 1272 536 Left 2 !.tran 100m
TEXT 32 -696 Left 2 ;Notes:
TEXT 32 -392 Left 2 !.param Vdd = 3.3
RECTANGLE Normal 768 -432 16 -720 2
* Z:\home\khalils\Downloads\files\data\raw_asc\02aea261c345_ID_vs_UDS-4_2.asc
* Generated by LTspice 26.0.1 for Windows.
* ID_vs_UDS-4_2
Vgs N002 0
Vds N001 0
M1 N001 N002 0 0 IRF7220
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vds 0 -10V Vgs -1V -2V 0.2V
.meas dc Id find Id(M1) when Vds=-5V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1292 680
WIRE -560 -144 -720 -144
WIRE -720 -64 -720 -144
WIRE -560 -16 -560 -144
WIRE -768 16 -912 16
WIRE -912 32 -912 16
WIRE -912 128 -912 112
WIRE -720 128 -720 32
WIRE -560 128 -560 64
SYMBOL pmos -768 -64 R0
WINDOW 3 55 52 Left 2
SYMATTR Value IRF7220
SYMATTR InstName M1
SYMBOL voltage -560 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 37 60 Left 2
SYMATTR InstName Vds
SYMATTR Value ""
SYMBOL voltage -912 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 53 Left 2
WINDOW 3 40 69 Left 2
WINDOW 0 36 56 Left 2
SYMATTR Value ""
SYMATTR InstName Vgs
FLAG -560 128 0
FLAG -912 128 0
FLAG -720 128 0
TEXT -920 160 Left 2 !.dc Vds 0 -10V  Vgs -1V -2V 0.2V
TEXT -920 184 Left 2 !.meas dc Id find Id(M1) when Vds=-5V
TEXT -904 -136 Left 2 ;ID_vs_UDS-4_2
* Z:\tmp\asc_dec_bjh7r6w2\1321e31e083c_LTM4656_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 0 20k
R3 N009 N008 4.99k
R6 0 N010 87.6k
C2 N003 0 100 Rser=30m
C1 N003 0 20 Rser=15m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3696 1528
WIRE 48 336 -336 336
WIRE -96 432 -160 432
WIRE 48 432 -16 432
WIRE 752 432 528 432
WIRE 864 432 752 432
WIRE 976 432 864 432
WIRE 752 464 752 432
WIRE 864 464 864 432
WIRE 976 464 976 432
WIRE 672 528 432 528
WIRE 752 576 752 528
WIRE 864 576 864 528
WIRE 976 576 976 528
WIRE 48 720 -320 720
WIRE 480 720 432 720
WIRE 672 720 672 528
WIRE 672 720 560 720
WIRE -80 816 -128 816
WIRE 48 816 0 816
WIRE 672 816 672 720
WIRE 672 816 432 816
WIRE -144 912 -208 912
WIRE 48 912 -64 912
WIRE 480 912 432 912
WIRE 608 912 560 912
WIRE -80 1008 -128 1008
WIRE 48 1008 0 1008
WIRE 496 1008 432 1008
WIRE 608 1008 560 1008
WIRE 48 1088 -16 1088
WIRE -208 1216 -208 912
WIRE 672 1216 672 816
SYMBOL res 0 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 20k
SYMBOL res -48 896 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 4.99k
SYMBOL res 576 896 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 87.6k
SYMBOL cap 848 464 R0
SYMATTR InstName C2
SYMATTR Value 100u
SYMATTR SpiceLine Rser=30m
SYMBOL cap 736 464 R0
SYMATTR InstName C1
SYMATTR Value 20u
SYMATTR SpiceLine Rser=15m
FLAG 752 576 0
FLAG 864 576 0
FLAG 976 576 0
FLAG -160 432 0
FLAG -16 1088 0
FLAG -128 1008 0
FLAG -128 816 0
FLAG 608 912 0
FLAG 608 1008 0
* Z:\home\khalils\Downloads\files\data\raw_asc\a1737be6ba6f_example.asc
* Generated by LTspice 26.0.1 for Windows.
* "Oscilloscope"
* PMT Capacitance
* finite rise time filter
* detector pulse mock-up
* total pulse charge
* detector capacitance
* step voltage
* simulation length
R1 N002 N001 0.1
R7 output 0 50
B1 output_charge 0 V=idt(V(output))/50
C2 output N002 {C_PMT}
C1 0 N002 30n
V3 N001 0 PULSE(0 {U} 10n 10p 10p 1)
.tran 0 200n 0
.param Q -50p
.param C_PMT 200p
.param U Q/C_PMT
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 19840
WIRE -5840 1488 -6000 1488
WIRE -5712 1488 -5840 1488
WIRE -6000 1568 -6000 1488
WIRE -6000 1728 -6000 1648
WIRE -6752 1840 -6912 1840
WIRE -6544 1840 -6672 1840
WIRE -6320 1840 -6544 1840
WIRE -6000 1840 -6256 1840
WIRE -5808 1840 -6000 1840
WIRE -5648 1840 -5808 1840
WIRE -6544 1904 -6544 1840
WIRE -6912 1920 -6912 1840
WIRE -6000 1920 -6000 1840
WIRE -6912 2080 -6912 2000
WIRE -6544 2080 -6544 1968
WIRE -6000 2080 -6000 2000
SYMBOL cap -6528 1968 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 30n
SYMBOL bv -6000 1552 R0
SYMATTR InstName B1
SYMATTR Value V=idt(V(output))/50
SYMBOL res -6016 1904 R0
SYMATTR InstName R7
SYMATTR Value 50
SYMBOL voltage -6912 1904 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -442 107 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 {U} 10n 10p 10p 1)
SYMBOL cap -6256 1824 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {C_PMT}
SYMBOL res -6656 1824 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 0.1
FLAG -6912 2080 0
FLAG -6000 2080 0
FLAG -5808 1840 output
FLAG -6544 2080 0
FLAG -6000 1728 0
FLAG -5840 1488 output_charge
TEXT -6576 1624 Left 2 !.tran 0 200n 0
TEXT -5888 1960 Left 2 ;"Oscilloscope"
TEXT -6368 1752 Left 2 ;PMT Capacitance
TEXT -6784 1752 Left 2 ;finite rise time filter
TEXT -6960 1448 Left 5 ;detector pulse mock-up
TEXT -6904 1536 Left 2 ;total pulse charge
TEXT -6576 1536 Left 2 !.param Q -50p
TEXT -6904 1576 Left 2 ;detector capacitance
TEXT -6576 1576 Left 2 !.param C_PMT 200p
TEXT -7376 1952 Left 2 ;step voltage
TEXT -7200 1952 Left 2 !.param U Q/C_PMT
TEXT -6904 1624 Left 2 ;simulation length
* Z:\tmp\asc_dec_bjh7r6w2\19ac29740603_OP_AMP_impedance_matching_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R4 N004 +2.25 5k
R1 N001 vin 50
XU1 +2.25 N001 +4.5 0 N002 +4.5 ADA4805 ;pnba 100)101)102)103)104)106
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4805.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 -48 48 -48
WIRE 160 -48 144 -48
WIRE 624 -32 512 -32
WIRE 512 64 512 -32
WIRE 528 64 512 64
WIRE 48 80 48 -48
WIRE 48 80 32 80
WIRE 64 80 48 80
WIRE 624 80 624 -32
WIRE 624 80 592 80
WIRE 160 96 160 -48
WIRE 160 96 128 96
WIRE 464 96 432 96
WIRE 528 96 464 96
WIRE 64 112 48 112
WIRE 576 128 576 112
WIRE 48 144 48 112
WIRE 112 144 112 128
WIRE 544 144 544 112
WIRE 80 160 80 128
WIRE -64 256 -160 256
SYMBOL res 448 80 R0
SYMATTR InstName R4
SYMATTR Value 5k
SYMBOL res 48 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL OpAmps\\ADA4805 96 96 R0
WINDOW 3 61 66 Left 2
SYMATTR InstName U1
FLAG 80 64 +4.5
FLAG 80 160 0
FLAG 112 144 +4.5
FLAG 544 48 +4.5
FLAG 544 144 0
FLAG 576 128 +4.5
FLAG 48 144 +2.25
FLAG 464 176 +2.25
FLAG -48 80 vin
FLAG 240 96 vout
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6014.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain of 10 Single Ended to Differential Converter
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6014.asy)
V3 IN 0 SINE(0 1 1K)
V1 +V 0 15
R4 N001 0 2K
R1 OUT- N002 10K
XU1 0 N002 OUT- +V -V LT6013 ;pnba IN+)IN-)OUT)VCC)VEE
V2 -V 0 -15
R2 N002 IN 2K
R3 OUT+ N001 8.06K
XU2 IN N001 OUT+ +V -V LT6013 ;pnba IN+)IN-)OUT)VCC)VEE
.tran 3m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 192 -160 192 -176
WIRE -32 -144 -240 -144
WIRE 160 -144 -32 -144
WIRE -240 -128 -240 -144
WIRE 304 -128 224 -128
WIRE 352 -128 304 -128
WIRE 160 -112 128 -112
WIRE 192 -80 192 -96
WIRE -240 -32 -240 -48
WIRE 32 16 16 16
WIRE 128 16 128 -112
WIRE 128 16 112 16
WIRE 160 16 128 16
WIRE 304 16 304 -128
WIRE 304 16 240 16
WIRE -32 112 -32 -144
WIRE 32 112 -32 112
WIRE 128 112 112 112
WIRE 160 112 128 112
WIRE 304 112 240 112
WIRE -224 160 -224 144
WIRE -96 160 -96 144
WIRE 192 224 192 208
WIRE 128 240 128 112
WIRE 160 240 128 240
WIRE -224 256 -224 240
WIRE -96 256 -96 240
WIRE 304 256 304 112
WIRE 304 256 224 256
WIRE 352 256 304 256
WIRE 160 272 128 272
WIRE 192 304 192 288
SYMBOL voltage -96 144 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT6014 192 -128 M180
WINDOW 0 24 27 Left 2
WINDOW 3 20 -30 Left 2
SYMATTR InstName U2
SYMBOL voltage -240 -144 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 128 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2K
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 256 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 8.06K
SYMBOL voltage -224 144 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL opamps\\LT6014 192 256 R0
SYMATTR InstName U1
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2K
FLAG -96 256 0
FLAG 192 208 +V
FLAG -96 144 +V
FLAG 192 304 -V
FLAG -224 256 0
FLAG -224 144 -V
FLAG -240 -32 0
FLAG 192 -80 +V
FLAG 192 -176 -V
FLAG 16 16 0
FLAG 128 272 0
FLAG 352 -128 OUT+
FLAG 352 256 OUT-
FLAG -240 -144 IN
TEXT 312 336 Left 2 !.tran 3m
TEXT 72 -208 Bottom 2 ;Gain of 10 Single Ended to Differential Converter
* Z:\home\khalils\Downloads\files\data\raw_asc\acc6b51324af_sim.asc
* Generated by LTspice 26.0.1 for Windows.
R4 N001 0 1k
XU1 N001 Vin N002 opamp Aol=1000K GBW=100Meg ;pnba invin)noninvin)out
R3 N001 N002 1k
R2 Vin N002 1k
R1 Vin 0 1k
I1 Vin 0 SINE(0 1 1 0 0 0 100) AC 1 0
.ac dec 100 1 1e5
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 80 -96 80
WIRE 224 80 80 80
WIRE 304 80 224 80
WIRE 400 80 336 80
WIRE 544 80 400 80
WIRE -96 112 -96 80
WIRE 80 112 80 80
WIRE 224 112 224 80
WIRE 400 112 400 80
WIRE 544 112 544 80
WIRE 304 128 304 80
WIRE 336 128 336 80
WIRE 224 224 224 192
WIRE 320 224 320 192
WIRE 320 224 224 224
WIRE 400 224 400 192
WIRE 400 224 320 224
WIRE -96 256 -96 192
WIRE 80 256 80 192
WIRE 80 256 -96 256
WIRE 544 256 544 192
WIRE 544 256 80 256
SYMBOL current -96 112 R0
WINDOW 3 -9 183 Left 2
WINDOW 123 -9 209 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value SINE(0 1 1 0 0 0 100)
SYMATTR Value2 AC 1 0
SYMBOL res 64 96 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 208 96 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 528 96 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL Opamps\\opamp 384 160 R90
SYMATTR InstName U1
SYMATTR SpiceLine Aol=1000K
SYMATTR SpiceLine2 GBW=100Meg
SYMBOL res 384 96 R0
SYMATTR InstName R3
SYMATTR Value 1k
FLAG 80 256 0
FLAG -96 80 Vin
TEXT -106 348 Left 2 !.ac dec 100 1 1e5
TEXT 168 296 Left 2 !.lib opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\acb9966715a8_twint-filter.asc
* Generated by LTspice 26.0.1 for Windows.
* 60Hz NOTCH FILTER
* INCLUDES
R5 N004 0 {RQ2}
XU1 OUT N002 OUT opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R3 N005 N006 {R2}
C2 N006 IN {C1}
R4 N003 N005 {Rpot}
V1 IN 0 AC 1
R2 N001 IN {R1}
R1 N002 N001 {R1}
C3 N002 N006 {C1}
C1 N001 N003 {C2}
XU2 N003 N004 N003 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R6 OUT N004 {RQ1}
.param Rnotch=5k
.param C1=0.1u
.param C2=2*C1
.ac dec 1000 0.1 10k
.param R1=26.5k
.param R2=(R1/2)-1k
.step param Rpot 0.5k 2k 0.5k
.param RQ1=4k
.param RQ2=26.5k
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1092 680
WIRE 976 64 816 64
WIRE 816 112 816 64
WIRE 848 112 816 112
WIRE 976 128 976 64
WIRE 976 128 912 128
WIRE 1024 128 976 128
WIRE 416 144 384 144
WIRE 432 144 416 144
WIRE 544 144 512 144
WIRE 576 144 544 144
WIRE 672 144 656 144
WIRE 848 144 672 144
WIRE 976 176 976 128
WIRE 544 192 544 144
WIRE 928 224 800 224
WIRE 928 272 928 224
WIRE 928 272 912 272
WIRE 544 288 544 256
WIRE 800 288 800 224
WIRE 800 288 544 288
WIRE 848 288 800 288
WIRE 976 304 976 256
WIRE 976 304 912 304
WIRE 544 320 544 288
WIRE 976 352 976 304
WIRE -272 384 -272 368
WIRE 544 416 544 400
WIRE -272 480 -272 464
WIRE 416 560 416 144
WIRE 448 560 416 560
WIRE 544 560 544 496
WIRE 544 560 512 560
WIRE 576 560 544 560
WIRE 672 560 672 144
WIRE 672 560 640 560
WIRE 976 560 976 432
SYMBOL cap 528 192 R0
SYMATTR InstName C1
SYMATTR Value {C2}
SYMBOL res 528 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R1}
SYMBOL res 528 400 R0
SYMATTR InstName R3
SYMATTR Value {R2}
SYMBOL res 960 336 R0
SYMATTR InstName R5
SYMATTR Value {RQ2}
SYMBOL res 960 160 R0
SYMATTR InstName R6
SYMATTR Value {RQ1}
SYMBOL Opamps\\opamp 880 224 M0
SYMATTR InstName U2
SYMBOL res 528 304 R0
SYMATTR InstName R4
SYMATTR Value {Rpot}
SYMBOL res 672 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL cap 640 544 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value {C1}
SYMBOL Opamps\\opamp 880 64 R0
SYMATTR InstName U1
SYMBOL cap 512 544 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {C1}
SYMBOL voltage -272 368 R0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
FLAG 976 560 0
FLAG -272 368 IN
FLAG -272 480 0
FLAG 384 144 IN
FLAG 1024 128 OUT
TEXT -448 8 Left 2 !.param Rnotch=5k
TEXT 352 72 Left 2 ;60Hz NOTCH FILTER
TEXT -632 64 Left 2 !.param C1=0.1u\n.param C2=2*C1
TEXT -624 312 Left 2 !.ac dec 1000 0.1 10k
TEXT -400 64 Left 2 !.param R1=26.5k\n.param R2=(R1/2)-1k\n.step param Rpot 0.5k 2k 0.5k
TEXT -400 168 Left 2 !.param RQ1=4k\n.param RQ2=26.5k
TEXT -632 -48 Left 2 !.lib opamp.sub
TEXT -632 -80 Left 2 ;INCLUDES
* Z:\home\khalils\Downloads\files\data\raw_asc\071fb5fec442_not.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 out N001 Vss 0 NPN
R1 N001 in {Rb}
R2 Vdd out {R}
C1 out Vss {C}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.param R=470
.param Rb=2.7k
.param C=1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 -240 -96 -272
WIRE -96 -144 -96 -160
WIRE -16 -144 -96 -144
WIRE -96 -128 -96 -144
WIRE -16 -128 -16 -144
WIRE -272 -80 -336 -80
WIRE -160 -80 -192 -80
WIRE -16 0 -16 -64
WIRE -96 32 -96 -32
FLAG -16 -144 out
FLAG -336 -80 in
FLAG -96 32 Vss
FLAG -96 -272 Vdd
FLAG -16 0 Vss
SYMBOL npn -160 -128 R0
SYMATTR InstName Q1
SYMBOL res -176 -96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {Rb}
SYMBOL res -112 -256 R0
SYMATTR InstName R2
SYMATTR Value {R}
SYMBOL cap -32 -128 R0
SYMATTR InstName C1
SYMATTR Value {C}
TEXT 128 -184 Left 2 !.param R=470\n.param Rb=2.7k\n.param C=1n
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3970-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N002 OUT 22
R3 N004 0 226K
C1 N001 N002 .22
C2 OUT 0 22
R4 IN N003 100K
V1 IN 0 10
Rload OUT 0 10
XU1 OUT IN IN 0 MP_01 N002 N001 OUT N003 N004 LT3970-3.3 ;pnba Vout)EN)Vin)GND))SW)Boost)BD)PG)Rt
.tran 750u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3970-3.3.asy)
.lib LT3970-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 724
WIRE 48 0 -64 0
WIRE 128 0 48 0
WIRE 208 0 128 0
WIRE 352 0 336 0
WIRE 432 0 416 0
WIRE -64 16 -64 0
WIRE 208 48 208 0
WIRE 336 48 336 0
WIRE -64 112 -64 96
WIRE 48 112 48 0
WIRE 128 112 128 0
WIRE 144 112 128 112
WIRE 432 112 432 0
WIRE 432 112 400 112
WIRE 448 112 432 112
WIRE 544 112 528 112
WIRE 608 112 544 112
WIRE 688 112 608 112
WIRE 608 128 608 112
WIRE 688 128 688 112
WIRE 48 208 48 192
WIRE 144 208 48 208
WIRE 544 208 544 112
WIRE 544 208 400 208
WIRE 608 224 608 192
WIRE 688 224 688 208
WIRE 48 304 32 304
WIRE 144 304 128 304
WIRE 544 304 544 208
WIRE 544 304 400 304
WIRE 272 384 272 368
FLAG 272 384 0
FLAG 32 304 0
FLAG 608 224 0
FLAG 688 224 0
FLAG -64 112 0
FLAG -64 0 IN
FLAG 688 112 OUT
SYMBOL ind 432 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 22
SYMBOL res 144 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 226K
SYMBOL cap 352 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value .22
SYMBOL cap 592 128 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL res 32 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL voltage -64 0 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 672 112 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL PowerProducts\\LT3970-3.3 272 208 R0
SYMATTR InstName U1
TEXT 496 352 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG636.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG636.asy)
V5 D 0 SINE(0 4 2k)
V2 -V 0 -5
V1 +V 0 5
V4 IN 0 pulse(0 3.3 0 1u 1u 5m 10m)
R1 SA 0 1K
V3 N001 0 3.3
R2 SB 0 1K
XU1 IN SA D SB -V 0 +V N001 ADG636 ;pnba IN)SA)D)SB)Vss)GND)Vdd)EN
.tran 30m
.lib ADG636.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -752 -368 -800 -368
WIRE -800 -320 -800 -368
WIRE -1216 -256 -1216 -272
WIRE -1088 -256 -1104 -256
WIRE -928 -256 -1008 -256
WIRE -896 -256 -928 -256
WIRE -688 -224 -704 -224
WIRE -656 -224 -688 -224
WIRE -544 -224 -576 -224
WIRE -1040 -192 -1104 -192
WIRE -928 -192 -960 -192
WIRE -896 -192 -928 -192
WIRE -1216 -160 -1216 -176
WIRE -896 -128 -1072 -128
WIRE -640 -128 -704 -128
WIRE -640 -112 -640 -128
WIRE -1216 -48 -1216 -64
WIRE -1072 -16 -1072 -128
WIRE -736 0 -736 -16
WIRE -640 0 -640 -32
WIRE -864 16 -864 -16
WIRE -832 16 -864 16
WIRE -1216 48 -1216 32
WIRE -1072 80 -1072 64
SYMBOL voltage -1216 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -1216 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -992 -240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -640 -128 R0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL voltage -672 -224 R270
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 47 41 VRight 2
WINDOW 3 -46 -22 VRight 2
SYMATTR InstName V5
SYMATTR Value SINE(0 4 2k)
SYMBOL ADG636 -800 -176 R0
SYMATTR InstName U1
SYMBOL res -944 -176 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -1072 -32 R0
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
FLAG -1216 48 0
FLAG -1216 -160 0
FLAG -1216 -272 +V
FLAG -1216 -64 -V
FLAG -544 -224 0
FLAG -1072 80 0
FLAG -1104 -256 0
FLAG -1104 -192 0
FLAG -752 -368 +V
FLAG -736 0 0
FLAG -832 16 -V
FLAG -640 0 0
FLAG -928 -256 SA
FLAG -928 -192 SB
FLAG -688 -224 D
FLAG -1072 -128 IN
TEXT -664 64 Left 2 !.tran 30m