Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP151-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP151-3.3.asy)
C1 OUT 0 1
V1 IN 0 5
Rload OUT 0 33
XU1 IN 0 IN MP_01 OUT ADP151-x.x T=2.3Meg ;pnba Vin)GND)EN))Vout
.tran 500u startup
.lib ADP151-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 880 1696 880
WIRE 1984 880 1824 880
WIRE 1696 896 1696 880
WIRE 1984 896 1984 880
WIRE 1696 992 1696 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL PowerProducts\\ADP151-3.3 1984 1024 R0
SYMATTR InstName U1
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 33
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL VOLTAGE 1696 880 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 2256 1024 OUT
FLAG 2256 1136 0
FLAG 1696 992 0
FLAG 1696 880 IN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2504-3.5.asc
* Generated by LTspice 26.0.1 for Windows.
* PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2504-3.5.asy)
XU1 N001 N002 OUT IN IN 0 OUT NC_01 ADP2504-3.5 ;pnba SW1)SW2)FB)EN)PVin)GND)Vout)Sync
Rload OUT 0 50
C1 OUT 0 10
L1 N001 N002 1.5 Rser=80m
V1 IN 0 3.3
.tran 400u startup
.lib ADP2504-3.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 48 64 32 64
WIRE 336 64 304 64
WIRE -64 80 -64 64
WIRE 32 144 32 64
WIRE 48 144 32 144
WIRE 336 144 304 144
WIRE -64 176 -64 160
WIRE 320 224 304 224
WIRE 384 224 320 224
WIRE 496 224 384 224
WIRE 384 240 384 224
WIRE 496 240 496 224
WIRE 48 304 32 304
WIRE 320 304 320 224
WIRE 320 304 304 304
WIRE 384 336 384 304
WIRE 496 336 496 320
SYMBOL voltage -64 64 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap 368 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 480 224 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL ADP2504-3.5 176 176 R0
SYMATTR InstName U1
SYMBOL ind 320 48 R0
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=80m
FLAG 384 336 0
FLAG 32 304 0
FLAG -64 176 0
FLAG 496 336 0
FLAG 496 224 OUT
FLAG -64 64 IN
TEXT 432 376 Left 2 !.tran 400u startup
TEXT 192 0 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX20313.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX20313.asy)
V3 N001 0 PULSE(0 1 10m 1m 1m 30m)
V4 N002 0 2
R8 N005 0 681
V2 N004 0 5
V1 IN 0 5
XU1 IN N005 0 N003 N002 OUT MAX20313 ;pnba IN)SETI)GND)_FLAG)EN)OUT
S1 0 OUT N001 0 SHORT
C2 OUT 0 150
R6 N004 N003 20K
.model SHORT SW(Ron=0.05 Roff=1K Vt=.5 Vh=-.4)
.tran 50m startup
.lib MAX20313.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1800 680
WIRE -16 -352 -224 -352
WIRE 400 -352 272 -352
WIRE 512 -352 400 -352
WIRE 672 -352 560 -352
WIRE -224 -336 -224 -352
WIRE 400 -336 400 -352
WIRE 512 -336 512 -352
WIRE 672 -336 672 -352
WIRE 560 -320 560 -352
WIRE -224 -240 -224 -256
WIRE 400 -240 400 -272
WIRE 512 -240 512 -256
WIRE 672 -240 672 -256
WIRE -16 -160 -224 -160
WIRE 384 -160 272 -160
WIRE 576 -160 464 -160
WIRE -224 -144 -224 -160
WIRE 576 -128 576 -160
WIRE -16 -64 -128 -64
WIRE 336 -64 272 -64
WIRE -224 -48 -224 -64
WIRE -128 -48 -128 -64
WIRE 336 -32 336 -64
WIRE 576 -32 576 -48
WIRE -128 80 -128 32
SYMBOL voltage -224 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL MAX20313 128 -208 R0
SYMATTR InstName U1
SYMBOL voltage 576 -144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res -144 -64 R0
SYMATTR InstName R8
SYMATTR Value 681
SYMBOL res 480 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 20K
SYMBOL sw 512 -240 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL cap 384 -336 R0
SYMATTR InstName C2
SYMATTR Value 150
SYMBOL voltage 672 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 10m 1m 1m 30m)
SYMBOL voltage -224 -160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 2
FLAG -224 -240 0
FLAG 400 -240 0
FLAG 512 -352 OUT
FLAG -224 -352 IN
FLAG 512 -240 0
FLAG 560 -272 0
FLAG 672 -240 0
FLAG -128 80 0
FLAG 576 -32 0
FLAG -224 -48 0
FLAG 336 -32 0
TEXT 480 144 Left 2 !.model SHORT SW(Ron=0.05 Roff=1K Vt=.5 Vh=-.4)
TEXT 480 184 Left 2 !.tran 50m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0093fb0b0dba_sch1.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 0 D
R1 N001 0 {Rsh}
R2 v+ N001 {Rs}
R3 illu 0 100Meg
V1 illu 0 1000
I2 v+ 0 PULSE(0 1 0 1 1)
B1 N001 0 I=v(illu)/1000*Iph
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1472 680
WIRE 288 48 80 48
WIRE 464 48 288 48
WIRE 592 48 464 48
WIRE 848 48 672 48
WIRE 1248 96 1248 64
WIRE 80 112 80 48
WIRE 288 112 288 48
WIRE 464 112 464 48
WIRE 1248 208 1248 176
WIRE 80 256 80 192
WIRE 288 256 288 176
WIRE 288 256 80 256
WIRE 464 256 464 192
WIRE 464 256 288 256
WIRE 688 256 464 256
WIRE 848 256 688 256
WIRE 688 288 688 256
WIRE 928 288 688 288
WIRE 928 320 928 288
WIRE 240 448 176 448
WIRE -272 480 -272 448
WIRE 240 496 240 448
WIRE -272 624 -272 560
WIRE 240 624 240 576
FLAG 928 320 0
FLAG 240 624 0
FLAG 176 448 illu
FLAG 848 48 v+
FLAG 848 256 v-
FLAG -272 624 0
FLAG -272 448 illu
FLAG 1248 208 0
FLAG 1248 64 v+
SYMBOL diode 272 112 R0
SYMATTR InstName D1
SYMBOL res 448 96 R0
SYMATTR InstName R1
SYMATTR Value {Rsh}
SYMBOL res 688 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {Rs}
SYMBOL res 224 480 R0
SYMATTR InstName R3
SYMATTR Value 100Meg
SYMBOL voltage -272 464 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1000
SYMBOL current 1248 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I2
SYMATTR Value PULSE(0 1 0 1 1)
SYMBOL bi 80 112 R0
WINDOW 3 -12 83 Right 2
SYMATTR InstName B1
SYMATTR Value I=v(illu)/1000*Iph
* Z:\home\khalils\Downloads\files\data\raw_asc\2109573082ff_AD4022.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\AD4022.asy)
V3 N001 0 5
C1 0 N005 10p
V2 N007 0 PWL(0 5 100u 0)
V4 N008 0 PULSE(0 1.8 227n 0.1n 0.1n 40n 1u)
R1 N004 N003 10
V6 N002 0 1.8
R2 N006 N007 10
V1 N003 0 PWL(0 0 100u 5)
XU1 N001 N002 N004 MP_01 0 N006 N005 N008 AD4022 EN_Hi_Z=1 ;pnba REF)Vdd)IN+))GND)IN-)Vout)CNV
.tran 110u
.lib AD4022.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1252
WIRE 704 224 368 224
WIRE 832 224 784 224
WIRE 368 288 368 224
WIRE 704 336 496 336
WIRE 832 336 784 336
WIRE -208 368 -240 368
WIRE -80 368 -128 368
WIRE 80 368 0 368
WIRE 80 416 80 368
WIRE 144 416 80 416
WIRE 560 432 496 432
WIRE 688 432 624 432
WIRE 144 448 80 448
WIRE -208 496 -240 496
WIRE -80 496 -128 496
WIRE 80 496 80 448
WIRE 80 496 0 496
WIRE 704 528 496 528
WIRE 832 528 784 528
WIRE 368 608 368 576
SYMBOL voltage 688 336 M90
WINDOW 0 47 41 VRight 2
WINDOW 3 -44 39 VRight 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V6
SYMATTR Value 1.8
SYMBOL voltage 688 528 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 1.8 227n 0.1n 0.1n 40n 1u)
SYMBOL voltage -112 368 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 100u 5)
SYMBOL res 16 480 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL cap 624 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL AD4022 400 432 R0
SYMATTR InstName U1
SYMBOL res 16 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage -112 496 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 5 100u 0)
SYMBOL voltage 688 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V3
SYMATTR Value 5
FLAG 368 608 0
FLAG 832 336 0
FLAG -240 368 0
FLAG 688 432 0
FLAG 832 528 0
FLAG 832 224 0
FLAG -240 496 0
TEXT 208 616 Left 2 !.tran 110u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1373HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1373HV.asy)
R3 N006 0 5K
V1 IN 0 5
R2 N002 0 24.9K
C4 N005 N006 .05
XU1 N005 N002 N004 N003 IN 0 0 N001 LT1373 ;pnba Vc)FB)NFB)_SHDN)Vin)SGND)PGND)SW
D1 N001 OUT MBRS360
C2 OUT 0 22 Rser=.05
R4 OUT 0 50
R1 OUT N002 215K
L1 IN N001 22 Rser=0.02 Rpar=5000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
.lib LT1373.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2708 1432
WIRE 1824 880 1584 880
WIRE 1888 880 1824 880
WIRE 2016 880 1968 880
WIRE 2064 880 2016 880
WIRE 2208 880 2128 880
WIRE 2320 880 2208 880
WIRE 2432 880 2320 880
WIRE 1584 896 1584 880
WIRE 2320 896 2320 880
WIRE 2432 896 2432 880
WIRE 1824 928 1824 880
WIRE 2208 928 2208 880
WIRE 1584 992 1584 976
WIRE 2016 992 2016 880
WIRE 2016 992 1968 992
WIRE 2320 992 2320 960
WIRE 2432 992 2432 976
WIRE 2208 1056 2208 1008
WIRE 2208 1056 1968 1056
WIRE 2208 1072 2208 1056
WIRE 1680 1088 1648 1088
WIRE 2016 1120 1968 1120
WIRE 2208 1168 2208 1152
WIRE 1984 1184 1968 1184
WIRE 2064 1184 2048 1184
WIRE 2160 1184 2144 1184
WIRE 1744 1264 1744 1248
WIRE 1904 1264 1904 1248
SYMBOL RES 2192 912 R0
SYMATTR InstName R1
SYMATTR Value 215K
SYMBOL RES 2192 1056 R0
SYMATTR InstName R2
SYMATTR Value 24.9K
SYMBOL PowerProducts\\LT1373HV 1824 1088 R0
SYMATTR InstName U1
SYMBOL polcap 2304 896 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMATTR SpiceLine Rser=.05
SYMBOL RES 2048 1200 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 5K
SYMBOL CAP 1984 1200 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C4
SYMATTR Value .05
SYMBOL schottky 2064 896 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL VOLTAGE 1584 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 2416 880 R0
SYMATTR InstName R4
SYMATTR Value 50
SYMBOL IND 1872 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 22
SYMATTR SpiceLine Rser=0.02 Rpar=5000
FLAG 1904 1264 0
FLAG 1584 992 0
FLAG 1744 1264 0
FLAG 2160 1184 0
FLAG 2432 992 0
FLAG 2320 992 0
FLAG 2208 1168 0
FLAG 2432 880 OUT
FLAG 1584 880 IN
TEXT 2200 1248 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG824.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nCharge Injection not included\nOnly One channel included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG824.asy)
XU1 IN SA D SB +V 0 ADG824 ;pnba IN)SA)D)SB)Vdd)GND
R1 D 0 49.9
V1 IN 0 PULSE(0 3 25u 1n 1n 20u)
V2 SA 0 2
V4 SB 0 0
V3 +V 0 3.3
C1 D 0 36p
.tran 75u
.lib ADG824.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -32 -64 -48 -64
WIRE -48 0 -48 -64
WIRE -176 64 -512 64
WIRE -144 64 -176 64
WIRE -512 96 -512 64
WIRE 80 96 48 96
WIRE 128 96 80 96
WIRE 256 96 128 96
WIRE -176 128 -400 128
WIRE -144 128 -176 128
WIRE 128 128 128 96
WIRE 256 128 256 96
WIRE -512 192 -512 176
WIRE -400 192 -400 128
WIRE -176 192 -288 192
WIRE -144 192 -176 192
WIRE 128 240 128 208
WIRE 256 240 256 192
WIRE -496 288 -512 288
WIRE -400 304 -400 272
WIRE -288 304 -288 192
WIRE -512 336 -512 288
WIRE -48 336 -48 304
WIRE -512 432 -512 416
WIRE -288 448 -288 384
SYMBOL voltage -400 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 0
SYMBOL cap 240 128 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -512 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL voltage -512 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 2
SYMBOL ADG824 -48 144 R0
SYMATTR InstName U1
SYMBOL voltage -288 288 R0
WINDOW 3 24 102 Left 2
SYMATTR Value PULSE(0 3 25u 1n 1n 20u)
SYMATTR InstName V1
SYMBOL res 112 112 R0
SYMATTR InstName R1
SYMATTR Value 49.9
FLAG 128 240 0
FLAG 256 240 0
FLAG -48 336 0
FLAG -288 448 0
FLAG -512 192 0
FLAG -32 -64 +V
FLAG -512 432 0
FLAG -496 288 +V
FLAG -400 304 0
FLAG -176 64 SA
FLAG -176 128 SB
FLAG -176 192 IN
FLAG 80 96 D
TEXT 56 336 Left 2 !.tran 75u
TEXT -520 -136 Left 2 ;Note:\nCharge Injection not included\nOnly One channel included\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2165-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N008 0 2n
L1 N004 OUT 1.5 Rser=6m
C2 N003 N004 .1
C3 OUT 0 70 Rser=2m
R1 N005 0 100K
C5 N006 0 680p
R2 N007 N006 36K
V1 IN 0 5
R3 OUT N001 100K
C4 N002 0 1
C6 N007 0 1p
Rload OUT 0 .5
XU1 N002 N005 N002 OUT 0 0 N004 IN IN IN N001 N008 N007 N003 N002 ADP2165-x.x Rtop=760K Rbot=240K ;pnba SYNC)Rt)TRK)FB)Gnd)Pgnd)SW)Pvin)Avin)EN)Pgood)SS)Comp)Bst)Vreg
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2165-2.5.asy)
.lib ADP2165-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 680
WIRE 32 -96 -112 -96
WIRE 176 -96 32 -96
WIRE 272 -96 176 -96
WIRE -112 -80 -112 -96
WIRE 176 -80 176 -96
WIRE 272 -80 272 -96
WIRE 32 -16 32 -96
WIRE 64 -16 32 -16
WIRE 448 -16 384 -16
WIRE 608 -16 528 -16
WIRE -112 16 -112 0
WIRE -48 64 -64 64
WIRE 32 64 16 64
WIRE 64 64 32 64
WIRE 432 64 384 64
WIRE 32 144 32 64
WIRE 64 144 32 144
WIRE 432 144 432 128
WIRE 432 144 384 144
WIRE 480 144 432 144
WIRE 608 144 608 -16
WIRE 608 144 560 144
WIRE 656 144 608 144
WIRE 768 144 656 144
WIRE 656 160 656 144
WIRE 768 160 768 144
WIRE 32 224 32 144
WIRE 64 224 32 224
WIRE 656 256 656 224
WIRE 768 256 768 240
WIRE -32 304 -64 304
WIRE 64 304 48 304
WIRE 608 304 608 144
WIRE 608 304 384 304
WIRE -160 384 -224 384
WIRE -32 384 -80 384
WIRE 64 384 -32 384
WIRE 400 384 384 384
WIRE 480 384 464 384
WIRE -224 400 -224 384
WIRE -32 400 -32 384
WIRE 176 464 176 448
WIRE 272 464 272 448
WIRE -224 480 -224 464
WIRE -32 480 -32 464
FLAG 480 384 0
FLAG 272 464 0
FLAG -64 304 0
FLAG -224 480 0
FLAG -112 16 0
FLAG 656 256 0
FLAG 768 256 0
FLAG 768 144 OUT
FLAG -112 -96 IN
FLAG -64 64 0
FLAG -32 480 0
FLAG 176 464 0
SYMBOL cap 400 368 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL ind 464 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=6m
SYMBOL cap 416 64 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL cap 640 160 R0
WINDOW 40 24 74 Left 2
SYMATTR Value 70
SYMATTR InstName C3
SYMATTR SpiceLine Rser=2m
SYMBOL res 64 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap -240 400 R0
SYMATTR InstName C5
SYMATTR Value 680p
SYMBOL res -64 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 36K
SYMBOL voltage -112 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 544 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 16 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap -48 400 R0
SYMATTR InstName C6
SYMATTR Value 1p
SYMBOL res 752 144 R0
SYMATTR InstName Rload
SYMATTR Value .5
SYMBOL ADP2165-2.5 224 176 R0
SYMATTR InstName U1
TEXT 584 440 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7182-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
C1 IN 0 2.2
C2 OUT 0 2.2
V1 IN 0 -8
V2 N001 0 PULSE(0 2 200u 1n 1n 10m)
R1 OUT 0 50
XU1 OUT MP_01 MP_02 N001 MP_03 0 IN ADP7182-x.x Rset=500k ;pnba Vout)))EN))GND)Vin
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7182-2.5.asy)
.lib ADP7182-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 -80 -48
WIRE 112 -48 32 -48
WIRE 432 -48 368 -48
WIRE 544 -48 432 -48
WIRE -80 -32 -80 -48
WIRE 32 -32 32 -48
WIRE 432 -32 432 -48
WIRE 544 -32 544 -48
WIRE -80 64 -80 48
WIRE 32 64 32 32
WIRE 432 64 432 32
WIRE 544 64 544 48
WIRE 112 144 32 144
WIRE 32 160 32 144
WIRE 32 256 32 240
WIRE 240 256 240 208
FLAG -80 64 0
FLAG 32 64 0
FLAG 432 64 0
FLAG 32 256 0
FLAG 240 256 0
FLAG 544 64 0
FLAG 32 -48 IN
FLAG 432 -48 OUT
SYMBOL cap 16 -32 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 2.2
SYMBOL voltage -80 -48 R0
SYMATTR InstName V1
SYMATTR Value -8
SYMBOL voltage 32 144 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 200u 1n 1n 10m)
SYMBOL res 528 -48 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL ADP7182-2.5 240 48 R0
SYMATTR InstName U1
TEXT 528 248 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\67d700f8ac95_Diode_Clipping_Circuit.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 0 1N914
R1 N002 N001 2860
V1 N001 0 SINE(0 15 50 0 0)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 0 -64 0
WIRE 224 0 128 0
WIRE 256 0 224 0
WIRE -64 32 -64 0
WIRE 224 32 224 0
WIRE -64 128 -64 112
WIRE 224 128 224 96
WIRE 224 128 -64 128
WIRE 256 128 224 128
WIRE -64 144 -64 128
FLAG -64 144 0
SYMBOL diode 208 32 R0
WINDOW 0 36 1 VBottom 0
WINDOW 3 49 54 Top 1
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL res 144 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2860
SYMBOL voltage -64 16 R0
WINDOW 0 24 16 Left 1
WINDOW 3 33 86 Top 1
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 15 50 0 0)
TEXT 184 176 Left 2 !.tran 100ms
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6268.asc
* Generated by LTspice 26.0.1 for Windows.
* PhotoDiode
* FCI-125G-006
* 20K Ohm Gain Trans-Impedance Amplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6268.asy)
I1 +V N001 0 AC 1
XU1 0 N001 +V -V Out +V LTC6268 ;pnba IN+)IN-)VCC)VEE)OUT)SHDN_L
Cparasitic Out N001 150f
V1 +V 0 2.5
C3 +V N001 700f
R3 Out N001 20K
V2 -V 0 -2.5
.ac oct 10 10K 1G
.lib LTC6268.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4472 1028
WIRE -2784 -656 -2784 -720
WIRE -2784 -656 -2912 -656
WIRE -2784 -624 -2784 -656
WIRE -2912 -608 -2912 -656
WIRE -2576 -608 -2640 -608
WIRE -2448 -608 -2512 -608
WIRE -2912 -512 -2912 -544
WIRE -2784 -512 -2784 -544
WIRE -2784 -512 -2912 -512
WIRE -2640 -512 -2640 -608
WIRE -2640 -512 -2784 -512
WIRE -2576 -512 -2640 -512
WIRE -2448 -512 -2448 -608
WIRE -2448 -512 -2496 -512
WIRE -2960 -352 -2960 -368
WIRE -2832 -352 -2832 -368
WIRE -2640 -352 -2640 -512
WIRE -2624 -352 -2640 -352
WIRE -2448 -320 -2448 -512
WIRE -2448 -320 -2480 -320
WIRE -2416 -320 -2448 -320
WIRE -2624 -288 -2656 -288
WIRE -2960 -256 -2960 -272
WIRE -2832 -256 -2832 -272
RECTANGLE Normal -2696 -464 -2992 -704 2
SYMBOL current -2784 -624 R0
WINDOW 3 38 44 Left 2
WINDOW 123 16 80 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMBOL voltage -2960 -368 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL LTC6268 -2592 -320 R0
SYMATTR InstName U1
SYMBOL voltage -2832 -368 R0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL cap -2928 -608 R0
SYMATTR InstName C3
SYMATTR Value 700f
SYMBOL cap -2512 -624 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName Cparasitic
SYMATTR Value 150f
SYMBOL res -2480 -528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 20K
FLAG -2960 -256 0
FLAG -2832 -256 0
FLAG -2960 -368 +V
FLAG -2832 -368 -V
FLAG -2656 -288 0
FLAG -2416 -320 Out
FLAG -2784 -720 +V
FLAG -2592 -400 +V
FLAG -2544 -240 +V
FLAG -2592 -240 -V
TEXT -2432 -240 Left 2 !.ac oct 10 10K 1G
TEXT -2872 -680 Center 2 ;PhotoDiode
TEXT -2848 -488 Center 2 ;FCI-125G-006
TEXT -2696 -800 Bottom 2 ;20K Ohm Gain Trans-Impedance Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\7c8c40ff2fb4_Draft6.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N005 N006 1N4148
D4 N002 N003 1N4148
V1 N001 0 V
XU1 N007 N011 N008 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R4 0 N011 1k69
M1 N006 N009 N007 N007 FDZ7064N
D5 N001 N002 1N4148
R2 0 N007 R
R1 N009 N008 100
D3 N003 N004 1N4148
V2 N010 0 V
D2 N004 N005 1N4148
R3 N011 N010 5k38
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0.1
.lib "opamp.ckt"
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 -64 -80 -64
WIRE 128 -48 128 -64
WIRE 192 -48 160 -48
WIRE 256 -48 224 -48
WIRE 320 -48 288 -48
WIRE 384 -48 352 -48
WIRE 160 16 160 -48
WIRE 160 16 128 16
WIRE 224 16 224 -48
WIRE 224 16 192 16
WIRE 288 16 288 -48
WIRE 288 16 256 16
WIRE 352 16 352 -48
WIRE 352 16 320 16
WIRE -80 48 -80 -64
WIRE 384 48 384 16
WIRE 384 48 352 48
WIRE 352 80 352 48
WIRE 256 96 16 96
WIRE 16 144 16 96
WIRE 32 144 16 144
WIRE 160 160 96 160
WIRE 304 160 240 160
WIRE -272 176 -304 176
WIRE 0 176 -192 176
WIRE 32 176 0 176
WIRE -304 192 -304 176
WIRE 0 208 0 176
WIRE 256 208 256 96
WIRE 352 208 352 176
WIRE 352 208 256 208
WIRE 352 224 352 208
WIRE -80 288 -80 128
WIRE -304 304 -304 272
WIRE 0 304 0 288
WIRE 352 320 352 304
SYMBOL diode 368 -48 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage -304 176 R0
SYMATTR InstName V2
SYMBOL diode 304 -48 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL diode 176 -48 R0
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL Opamps\\opamp 64 96 R0
SYMATTR InstName U1
SYMBOL res 368 320 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMBOL res 16 304 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 1k69
SYMBOL voltage -80 32 R0
SYMATTR InstName V1
SYMBOL nmos 304 80 R0
SYMATTR InstName M1
SYMATTR Value FDZ7064N
SYMBOL diode 112 -48 R0
SYMATTR InstName D5
SYMATTR Value 1N4148
SYMBOL res 256 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res -176 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5k38
SYMBOL diode 240 -48 R0
SYMATTR InstName D3
SYMATTR Value 1N4148
FLAG 352 320 0
FLAG -80 288 0
FLAG 0 304 0
FLAG -304 304 0
TEXT -338 344 Left 2 !.tran 0.1
TEXT -344 392 Left 2 !.lib "opamp.ckt"