Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\stepAC.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* This example demonstrates .stepping a global parameter,\nC, while computing the transfer function of the filter.
C1 OUT 0 420p
L2 IN 0 1
I1 0 IN 0 AC 5m
C3 OUT IN {C}
R2 IN 0 300
L1 OUT 0 1
C2 IN 0 420p
R1 OUT 0 300
.ac oct 200 5Meg 10Meg
.step param C 50p 150p 50p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2412 1664
WIRE 1520 1248 1376 1248
WIRE 1664 1248 1520 1248
WIRE 1776 1248 1664 1248
WIRE 1856 1248 1776 1248
WIRE 1984 1248 1920 1248
WIRE 2096 1248 1984 1248
WIRE 2256 1248 2096 1248
WIRE 1376 1280 1376 1248
WIRE 1520 1280 1520 1248
WIRE 1664 1280 1664 1248
WIRE 1776 1280 1776 1248
WIRE 1984 1280 1984 1248
WIRE 2096 1280 2096 1248
WIRE 2256 1280 2256 1248
WIRE 1376 1392 1376 1360
WIRE 1520 1392 1520 1360
WIRE 1664 1392 1664 1360
WIRE 1776 1392 1776 1344
WIRE 1984 1392 1984 1344
WIRE 2096 1392 2096 1360
WIRE 2256 1392 2256 1360
SYMBOL cap 1760 1280 R0
SYMATTR InstName C2
SYMATTR Value 420p
SYMBOL ind 2080 1264 R0
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL RES 2240 1264 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL res 1504 1264 R0
SYMATTR InstName R2
SYMATTR Value 300
SYMBOL cap 1968 1280 R0
SYMATTR InstName C1
SYMATTR Value 420p
SYMBOL cap 1920 1232 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value {C}
SYMBOL ind 1648 1264 R0
SYMATTR InstName L2
SYMATTR Value 1
SYMBOL CURRENT 1376 1360 M180
WINDOW 0 24 88 Left 2
WINDOW 3 38 36 Left 2
WINDOW 39 0 0 Left 2
WINDOW 123 8 -8 Left 2
SYMATTR InstName I1
SYMATTR Value 0
SYMATTR Value2 AC 5m
FLAG 2096 1392 0
FLAG 1984 1392 0
FLAG 1664 1392 0
FLAG 1776 1392 0
FLAG 2256 1392 0
FLAG 1520 1392 0
FLAG 1376 1392 0
FLAG 1376 1248 IN
FLAG 2256 1248 OUT
TEXT 1656 1440 Left 2 !.ac oct 200 5Meg 10Meg
TEXT 1656 1472 Left 2 !.step param C 50p 150p 50p
TEXT 1824 1584 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT 1504 1520 Left 2 ;This example demonstrates .stepping a global parameter,\nC, while computing the transfer function of the filter.
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5671R.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5671R.asy)
XU2 vDAC Vdd 0 vOUT AD5671R Gain=2 ;pnba Vdac)Vdd)GND)Vout
V1 Vdd 0 5
RLOAD vOUT 0 1k
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
CLOAD vOUT 0 10n
.tran 50u
.lib AD5671R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 112 112 0 112
WIRE 192 112 112 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL AD5671R -208 112 R0
SYMATTR InstName U2
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -240 -80 Vdd
TEXT -160 312 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8040.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8040.asy)
R2 OUT N001 10K
Vin1 IN 0 SINE(0 1 100K)
R1 N001 0 10K
V2 -V 0 -5
XU1 IN N001 +V -V OUT AD8040 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
.tran 100u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 960 680
WIRE 272 128 256 128
WIRE 368 128 352 128
WIRE 384 128 368 128
WIRE 480 128 464 128
WIRE 32 208 32 192
WIRE 160 208 160 192
WIRE 368 224 368 128
WIRE 384 224 368 224
WIRE 480 240 480 128
WIRE 480 240 448 240
WIRE 544 240 480 240
WIRE 384 256 304 256
WIRE 304 272 304 256
WIRE 32 304 32 288
WIRE 160 304 160 288
WIRE 304 368 304 352
SYMBOL voltage 32 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 368 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 160 192 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 304 256 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin1
SYMATTR Value SINE(0 1 100K)
SYMBOL opamps\\AD8040 416 176 R0
SYMATTR InstName U1
SYMBOL res 480 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 32 192 +V
FLAG 304 368 0
FLAG 544 240 OUT
FLAG 304 256 IN
FLAG 416 208 +V
FLAG 160 192 -V
FLAG 416 272 -V
FLAG 256 128 0
FLAG 160 304 0
FLAG 32 304 0
TEXT 560 360 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\9d3827646092_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD549.asy)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\NE555.asy)
V1 VDD 0 5
R1 N003 N001 10k
XU2 NC_03 N001 VDD 0 N002 AD549 ;pnba In+)In-)V+)V-)OUT
XU1 0 N001 N003 VDD NC_01 N001 NC_02 VDD NE555 ;pnba GND)TRIG)OUT)RST)CV)THRS)DIS)Vcc
C1 N001 0 4.7n
.tran 0 0.01 0 0.0001
.lib ADI1.lib
.lib NE555.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 128 -112 128
WIRE 432 160 368 160
WIRE 640 176 496 176
WIRE -112 192 -112 128
WIRE -96 192 -112 192
WIRE 0 192 -16 192
WIRE 368 192 368 160
WIRE 368 192 224 192
WIRE -112 304 -112 192
WIRE 368 304 368 192
WIRE 368 304 -112 304
WIRE -112 320 -112 304
WIRE -112 416 -112 384
IOPIN -288 144 Out
IOPIN 224 64 In
IOPIN 0 256 In
IOPIN 464 144 In
SYMBOL Misc\\NE555 112 160 R0
SYMATTR InstName U1
SYMBOL res 0 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL OpAmps\\AD549 464 112 R0
SYMATTR InstName U2
SYMBOL voltage -288 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap -128 320 R0
SYMATTR InstName C1
SYMATTR Value 4.7n
FLAG -288 224 0
FLAG 0 64 0
FLAG -288 144 VDD
FLAG 224 64 VDD
FLAG 0 256 VDD
FLAG -112 416 0
FLAG 464 144 VDD
FLAG 464 208 0
TEXT -358 440 Left 2 !.tran 0 0.01 0 0.0001
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC7001.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC7001.asy)
V1 N001 0 10
C2 N002 N005 0.1
C1 OUT 0 10 Rser=7m
R1 OUT 0 10
V2 N003 0 PULSE(0 8 0 10n 10n 0.3u 3.33u)
D1 N001 N002 RF071MM2S
D2 0 N005 RF1001NS2D
L1 N005 OUT 10 Rser=3m
M1 IN N004 N005 N005 IPB039N10N3
XU1 N001 0 0 N003 0 N004 N004 N005 N002 LTC7001 ;pnba Vcc)Vccuv)GND)INP)OVLO)TGdn)TGup)TS)BST
V3 IN 0 48
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0.5m startup
.lib LTC7001.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2336 1256
WIRE 1120 -288 976 -288
WIRE 1328 -288 1184 -288
WIRE 1392 -288 1328 -288
WIRE 1584 -288 1520 -288
WIRE 1584 -272 1584 -288
WIRE 1392 -224 1392 -288
WIRE 864 -176 832 -176
WIRE 976 -176 976 -288
WIRE 976 -176 944 -176
WIRE 1008 -176 976 -176
WIRE 1328 -176 1328 -288
WIRE 1328 -176 1296 -176
WIRE 1520 -176 1520 -288
WIRE 1584 -176 1584 -192
WIRE 736 -96 688 -96
WIRE 1008 -96 816 -96
WIRE 1328 -96 1296 -96
WIRE 1472 -96 1328 -96
WIRE 1392 -32 1392 -160
WIRE 1520 -32 1520 -80
WIRE 1520 -32 1392 -32
WIRE 1616 -32 1520 -32
WIRE 1744 -32 1696 -32
WIRE 1856 -32 1744 -32
WIRE 1008 -16 976 -16
WIRE 1328 -16 1328 -96
WIRE 1328 -16 1296 -16
WIRE 1520 -16 1520 -32
WIRE 1744 -16 1744 -32
WIRE 1856 -16 1856 -32
WIRE 976 64 976 -16
WIRE 976 64 944 64
WIRE 1008 64 976 64
WIRE 1392 64 1392 -32
WIRE 1392 64 1296 64
WIRE 1520 80 1520 48
WIRE 1744 80 1744 48
WIRE 1856 80 1856 64
WIRE 1152 144 1152 112
SYMBOL nmos 1472 -176 R0
SYMATTR InstName M1
SYMATTR Value IPB039N10N3
SYMBOL ind 1600 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=3m
SYMBOL LTC7001 1152 -48 R0
SYMATTR InstName U1
SYMBOL voltage 1584 -288 R0
SYMATTR InstName V3
SYMATTR Value 48
SYMBOL diode 1504 48 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value RF1001NS2D
SYMBOL voltage 832 -96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 8 0 10n 10n 0.3u 3.33u)
SYMBOL voltage 960 -176 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 1840 -32 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL diode 1120 -272 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value RF071MM2S
SYMBOL cap 1376 -224 R0
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL cap 1728 -16 R0
WINDOW 3 32 52 Left 2
SYMATTR Value 10
SYMATTR SpiceLine Rser=7m
SYMATTR InstName C1
FLAG 944 64 0
FLAG 832 -176 0
FLAG 688 -96 0
FLAG 1584 -176 0
FLAG 1744 80 0
FLAG 1856 80 0
FLAG 1856 -32 OUT
FLAG 1520 80 0
FLAG 1152 144 0
FLAG 1584 -288 IN
TEXT 1440 192 Left 2 !.tran 0.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2138-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2138-2.5.asy)
C1 OUT 0 10
Rload OUT 0 5
V1 IN 0 5
XU1 IN IN N001 OUT 0 IN ADP2138-x.x Rtop=320K ;pnba Vin)EN)SW)Vout)GND)Mode
L1 N001 OUT 1 Rser=60m
.tran .5m startup
.lib ADP2138-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 192 224 192 144
WIRE 208 224 192 224
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 224
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=60m
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADP2138-2.5 352 224 R0
SYMATTR InstName U1
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
TEXT 600 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2370-ADJ.asc
* Generated by LTspice 26.0.1 for Windows.
* 5.4V\nR1=280k\nR2=48.7k\n \n3.9V\nR1=232k\nR2=60.4k
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2370-ADJ.asy)
R3 OUT N001 10K
C1 OUT 0 10
Rload OUT 0 20
V1 IN 0 14.4
XU1 IN 0 IN IN N002 N003 N001 0 ADP2370-ADJ IPSM=400m Rt=100MEG Rb=100MEG C1=1.6p Rc1=100k R3=5.92k Rshort=100m PD=0 ;pnba FSEL)SYNC)EN)Vin)SW)FB)PG)PGND
L1 N002 OUT 10 Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0
C2 IN 0 10
R2 N003 0 48.7k
R1 OUT N003 280k
.tran 500u startup
.lib ADP2370-ADJ.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1024 692
WIRE 80 96 -16 96
WIRE 144 96 80 96
WIRE 176 96 144 96
WIRE 464 96 400 96
WIRE 624 96 544 96
WIRE -16 112 -16 96
WIRE 80 112 80 96
WIRE 144 176 144 96
WIRE 176 176 144 176
WIRE 416 176 400 176
WIRE 544 176 496 176
WIRE 624 176 624 96
WIRE 624 176 544 176
WIRE 752 176 624 176
WIRE 752 192 752 176
WIRE -16 208 -16 192
WIRE 80 208 80 176
WIRE 624 224 624 176
WIRE 144 256 144 176
WIRE 176 256 144 256
WIRE 544 256 544 240
WIRE 544 256 400 256
WIRE 544 272 544 256
WIRE 752 288 752 272
WIRE 176 336 144 336
WIRE 624 336 624 304
WIRE 624 336 400 336
WIRE 624 352 624 336
WIRE 144 416 144 336
WIRE 624 448 624 432
SYMBOL cap 528 176 R0
WINDOW 0 29 15 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL VOLTAGE -16 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 14.4
SYMBOL res 608 336 R0
SYMATTR InstName R2
SYMATTR Value 48.7k
SYMBOL res 736 176 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL res 560 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL ind 400 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0
SYMBOL res 608 208 R0
SYMATTR InstName R1
SYMATTR Value 280k
SYMBOL ADP2370-ADJ 288 208 R0
SYMATTR InstName U1
SYMBOL cap 64 112 R0
SYMATTR InstName C2
SYMATTR Value 10
FLAG -16 208 0
FLAG -16 96 IN
FLAG 624 448 0
FLAG 544 272 0
FLAG 752 176 OUT
FLAG 752 288 0
FLAG 144 416 0
FLAG 80 208 0
TEXT 368 416 Left 2 !.tran 500u startup
TEXT 904 144 Left 2 ;5.4V\nR1=280k\nR2=48.7k\n \n3.9V\nR1=232k\nR2=60.4k
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1763-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1763-1.5.asy)
C1 OUT 0 10
Rload OUT 0 500
C2 OUT N001 .01
V1 IN 0 PWL(0 0 1 10)
XU1 OUT OUT 0 N001 IN MP_01 MP_02 IN LT1763-1.5 ;pnba OUT)Sense)GND)BYP)_SHDN)))IN
.tran 1
.lib LT1763.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 32 304 32
WIRE 352 32 320 32
WIRE 432 32 352 32
WIRE 528 32 432 32
WIRE 0 48 -208 48
WIRE 16 48 0 48
WIRE 432 48 432 32
WIRE 528 48 528 32
WIRE -208 64 -208 48
WIRE 352 64 352 32
WIRE 320 96 320 32
WIRE 320 96 304 96
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 432 144 432 112
WIRE 528 144 528 128
WIRE -208 160 -208 144
WIRE 352 160 352 128
WIRE 352 160 304 160
WIRE 160 240 160 208
SYMBOL cap 336 64 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL cap 416 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT1763-1.5 160 96 R0
SYMATTR InstName U1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -208 160 0
FLAG 432 144 0
FLAG 528 144 0
FLAG 160 240 0
FLAG 528 32 OUT
FLAG -208 48 IN
TEXT 376 240 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP5302-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP5302-2.asy)
R1 OUT N001 1Meg
C1 OUT 0 10
R2 N003 0 19.6K
XU1 IN IN 0 N003 OUT N001 0 0 N002 0 ADP5302 OD=1 ;pnba EN)PVin)Sync/Mode)VID)FB)VoutOK)Pgnd)Agnd)SW)Stop
L1 N002 OUT 2.2 Rser=80m
Rload OUT 0 36
V1 IN 0 5
.tran .6m startup
.lib ADP5302.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 64 64 64
WIRE 160 64 144 64
WIRE 496 64 416 64
WIRE 608 64 576 64
WIRE 64 80 64 64
WIRE 144 144 144 64
WIRE 160 144 144 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 608 144 608 64
WIRE 608 144 560 144
WIRE 688 144 608 144
WIRE 608 160 608 144
WIRE 688 160 688 144
WIRE 64 176 64 160
WIRE 160 224 144 224
WIRE 560 224 560 144
WIRE 560 224 416 224
WIRE 608 256 608 224
WIRE 688 256 688 240
WIRE 160 304 144 304
WIRE 448 304 416 304
WIRE 544 304 528 304
WIRE 240 384 240 368
WIRE 336 384 336 368
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=80m
SYMBOL ADP5302-2 288 192 R0
SYMATTR InstName U1
SYMBOL cap 592 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL res 432 320 R270
WINDOW 3 0 56 VBottom 2
WINDOW 0 32 56 VTop 2
SYMATTR Value 19.6K
SYMATTR InstName R2
SYMBOL res 672 144 R0
SYMATTR Value 36
SYMATTR InstName Rload
SYMBOL voltage 64 64 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 544 304 0
FLAG 608 256 0
FLAG 240 384 0
FLAG 64 176 0
FLAG 688 144 OUT
FLAG 688 256 0
FLAG 64 64 IN
FLAG 336 384 0
FLAG 144 304 0
FLAG 144 224 0
TEXT 440 384 Left 2 !.tran .6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\001c5a57b2d9__Fig3_28_MSD_alt.asc
* Generated by LTspice 26.0.1 for Windows.
* Delay is Ts (=10n when clocked at 100 Mhz)
Vin N001 0 AC 1
T1 Voadd2 0 Vout 0 Td=10n Z0=50
Eadd1 Voadd1 0 N001 Vout 0.1
Eadd2 Voadd2 0 Voadd1 Voutm 1
Eneg Voutm 0 Vout 0 -1
R1 Vout 0 50
.ac dec 1000 10k 200MEG
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2740 696
WIRE 896 -432 816 -432
WIRE 1008 -432 896 -432
WIRE 1184 -432 1104 -432
WIRE 1264 -432 1184 -432
WIRE 1280 -432 1264 -432
WIRE 816 -416 816 -432
WIRE 656 -400 608 -400
WIRE 768 -400 656 -400
WIRE 1264 -400 1264 -432
WIRE 608 -368 608 -400
WIRE 560 -352 432 -352
WIRE 432 -336 432 -352
WIRE 816 -320 816 -336
WIRE 1264 -288 1264 -320
WIRE 768 -256 768 -352
WIRE 928 -256 768 -256
WIRE 1024 -256 928 -256
WIRE 1184 -240 1184 -432
WIRE 1184 -240 1072 -240
WIRE 432 -224 432 -256
WIRE 1072 -176 1072 -192
WIRE 1024 -160 1024 -176
WIRE 560 -128 560 -304
WIRE 1184 -128 1184 -240
WIRE 1184 -128 560 -128
SYMBOL voltage 432 -352 R0
WINDOW 0 38 56 Left 0
WINDOW 123 35 82 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMBOL e 608 -384 R0
WINDOW 0 43 43 Left 0
WINDOW 3 44 74 Left 0
SYMATTR InstName Eadd1
SYMATTR Value 0.1
SYMBOL e 1024 -272 M0
WINDOW 0 43 43 Left 0
WINDOW 3 44 74 Left 0
SYMATTR InstName Eneg
SYMATTR Value -1
SYMBOL res 1248 -416 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL e 816 -432 R0
WINDOW 0 43 43 Left 0
WINDOW 3 44 74 Left 0
SYMATTR InstName Eadd2
SYMATTR Value 1
SYMBOL tline 1056 -416 R0
WINDOW 0 -18 -31 Left 0
WINDOW 3 -63 53 Left 0
SYMATTR InstName T1
SYMATTR Value Td=10n Z0=50
FLAG 1104 -400 0
FLAG 1008 -400 0
FLAG 608 -288 0
FLAG 656 -400 Voadd1
FLAG 432 -224 0
FLAG 896 -432 Voadd2
FLAG 1280 -432 Vout
FLAG 1264 -288 0
FLAG 816 -320 0
FLAG 1024 -160 0
FLAG 1072 -176 0
FLAG 928 -256 Voutm
TEXT 592 -192 Left 0 !.ac dec 1000 10k 200MEG
TEXT 840 -488 Left 0 ;Delay is Ts (=10n when clocked at 100 Mhz)
* Z:\home\khalils\Downloads\files\data\raw_asc\4e1394e9955e_bss83.asc
* Generated by LTspice 26.0.1 for Windows.
* GAMMA added
* Enhanced model of the BSS83 from Philips\n \nSweep of Vgs from 0 to 5V at Vsb=-8, -4, 0V\n.dc V1 0 5 .1 V2 -8 0 4\nPlot Id(M1) to see how Vsb changes the behaviour.\n \nI added GAMMA=0.2 to the model to get the correct Ids(Vgs, Vsb).\nThe simulated drain current is independent of Vsb if GAMMA is \nomitted. This was clearly a missing parameter in the original model.\n \nThe complete ".model"-statement can be also put into a file \nlike BSS83.mod and added with a SPICEdirective.\n.include BSS83.mod
* * Philips model\n.MODEL BSS83 NMOS\n+ LEVEL=3\n+ W=1E-3\n+ L=1E-6\n+ VTO=2\n+ VMAX=1E6\n+ RS=3\n+ RD=3\n+ CJ=0.001396\n+ MJ=0.3936\n+ THETA=1E-6\n+ ETA=0.009307\n+ KAPPA=2.226
+ LEVEL=3
+ W=1E-3
+ L=1E-6
+ VTO=2
+ VMAX=1E6
+ RS=3
+ RD=3
+ CJ=0.001396
+ MJ=0.3936
+ THETA=1E-6
+ ETA=0.009307
+ KAPPA=2.226
+ GAMMA=0.2
M1 N001 N003 0 N002 BSS83
V3 N001 0 5
V1 N003 0 2
V2 N002 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.MODEL BSS83 NMOS
.dc V1 0 5 .1 V2 -8 0 4
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1088 680
WIRE 32 256 32 224
WIRE 32 384 32 336
WIRE 128 224 32 224
WIRE 176 144 176 -32
WIRE 176 384 176 240
WIRE 288 -32 176 -32
WIRE 288 0 288 -32
WIRE 288 112 288 80
WIRE 288 192 176 192
WIRE 288 224 288 192
WIRE 288 384 288 304
SYMBOL voltage 288 208 R0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL nmos4 128 144 R0
SYMATTR InstName M1
SYMATTR Value BSS83
SYMBOL voltage 32 240 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL voltage 288 -16 R0
SYMATTR InstName V3
SYMATTR Value 5
FLAG 288 112 0
FLAG 288 384 0
FLAG 32 384 0
FLAG 176 384 0
TEXT 448 0 Left 0 !* GAMMA added\n.MODEL BSS83 NMOS\n+ LEVEL=3\n+ W=1E-3\n+ L=1E-6\n+ VTO=2\n+ VMAX=1E6\n+ RS=3\n+ RD=3\n+ CJ=0.001396\n+ MJ=0.3936\n+ THETA=1E-6\n+ ETA=0.009307\n+ KAPPA=2.226\n+ GAMMA=0.2
TEXT 32 -112 Left 0 !.dc V1 0 5  .1 V2 -8 0 4
TEXT 32 -72 Left 0 !.op
TEXT 32 -496 Left 0 ;Enhanced model of the BSS83 from Philips\n \nSweep of Vgs from 0 to 5V at Vsb=-8, -4, 0V\n.dc V1 0 5  .1 V2 -8 0 4\nPlot Id(M1) to see how Vsb changes the behaviour.\n \nI added GAMMA=0.2 to the model to get the correct Ids(Vgs, Vsb).\nThe simulated drain current is independent of Vsb if GAMMA is \nomitted. This was clearly a missing parameter in the original model.\n \nThe complete ".model"-statement can be also put into a file \nlike BSS83.mod and added with a SPICEdirective.\n.include BSS83.mod
TEXT 720 0 Left 0 ;* Philips model\n.MODEL BSS83 NMOS\n+ LEVEL=3\n+ W=1E-3\n+ L=1E-6\n+ VTO=2\n+ VMAX=1E6\n+ RS=3\n+ RD=3\n+ CJ=0.001396\n+ MJ=0.3936\n+ THETA=1E-6\n+ ETA=0.009307\n+ KAPPA=2.226
* Z:\home\khalils\Downloads\files\data\raw_asc\ed5bfee20ad7_Assignment_4b__iv_.asc
* Generated by LTspice 26.0.1 for Windows.
V1 0 N002 SINE(0 10 1000) Rser=0.001
D1 0 N001 1N4148
D2 N003 0 1N4148
D3 N002 N001 1N4148
D4 N003 N002 1N4148
R1 N001 N003 1000
C1 N001 N003 0.000001
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5ms
* Full Wave Rectifier (Diode Bridge) (with 1microF Capacitor) (Practical)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 448 64 144 64
WIRE 592 64 448 64
WIRE 144 80 144 64
WIRE 144 80 -16 80
WIRE 304 80 144 80
WIRE 304 112 304 80
WIRE -16 128 -16 80
WIRE 448 192 448 64
WIRE 592 208 592 64
WIRE -16 240 -16 192
WIRE 64 240 -16 240
WIRE 144 240 64 240
WIRE 304 240 304 176
WIRE 304 240 224 240
WIRE 64 272 64 240
WIRE 304 272 304 240
WIRE -16 288 -16 240
WIRE -16 384 -16 352
WIRE 144 384 -16 384
WIRE 304 384 304 336
WIRE 304 384 144 384
WIRE 144 400 144 384
WIRE 448 400 448 272
WIRE 448 400 144 400
WIRE 592 400 592 272
WIRE 592 400 448 400
FLAG 64 272 0
SYMBOL voltage 128 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 -60 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10 1000)
SYMATTR SpiceLine Rser=0.001
SYMBOL diode 0 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL diode 0 352 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL diode 320 176 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL diode 320 336 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL res 432 176 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL cap 576 208 R0
SYMATTR InstName C1
SYMATTR Value 0.000001
TEXT -16 424 Left 2 !.tran 5ms
TEXT -96 24 Left 2 ;Full Wave Rectifier (Diode Bridge) (with 1microF Capacitor) (Practical)