Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT5400-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\LT5400-1.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1468.asy)
XU2 N002 N001 +V -V OUT LT1468 ;pnba In+)In-)V+)V-)OUT
V3 IN 0 AC 1
C1 N001 OUT 4.7p
V2 -V 0 -15
XU1 OUT IN 0 0 N002 N002 N001 N001 NC_01 LT5400-1 ;pnba 1)2)3)4)5)6)7)8)PAD
C2 N002 0 4.7p
V1 +V 0 15
.ac oct 10 1K 10Meg
.lib LT5400-1.sub
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1472
WIRE 2304 624 1936 624
WIRE 1936 688 1936 624
WIRE 2016 688 1936 688
WIRE 2192 688 2080 688
WIRE 1936 816 1936 688
WIRE 1952 816 1936 816
WIRE 2192 816 2192 688
WIRE 2192 816 2144 816
WIRE 1952 880 1744 880
WIRE 2192 880 2192 816
WIRE 2192 880 2144 880
WIRE 1392 896 1392 880
WIRE 1520 896 1520 880
WIRE 1744 896 1744 880
WIRE 2192 896 2192 880
WIRE 2208 896 2192 896
WIRE 2304 912 2304 624
WIRE 2304 912 2272 912
WIRE 2336 912 2304 912
WIRE 2208 928 2192 928
WIRE 1952 944 1936 944
WIRE 2192 944 2192 928
WIRE 2192 944 2144 944
WIRE 1392 992 1392 976
WIRE 1520 992 1520 976
WIRE 1744 992 1744 976
WIRE 1920 1008 1872 1008
WIRE 1952 1008 1920 1008
WIRE 2192 1008 2192 944
WIRE 2192 1008 2144 1008
WIRE 1920 1120 1920 1008
WIRE 2016 1120 1920 1120
WIRE 2192 1120 2192 1008
WIRE 2192 1120 2080 1120
SYMBOL voltage 1520 880 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL cap 2080 672 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7p
SYMBOL opamps\\LT1468 2240 848 R0
SYMATTR InstName U2
SYMBOL misc\\LT5400-1 2048 912 R0
SYMATTR InstName U1
SYMBOL cap 2080 1104 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7p
SYMBOL voltage 1744 880 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL voltage 1392 880 R0
SYMATTR InstName V2
SYMATTR Value -15
FLAG 2240 880 +V
FLAG 2240 944 -V
FLAG 2336 912 OUT
FLAG 1520 992 0
FLAG 1520 880 +V
FLAG 1392 992 0
FLAG 1392 880 -V
FLAG 1744 992 0
FLAG 1744 880 IN
FLAG 1872 1008 0
FLAG 1936 944 0
TEXT 2312 1064 Left 2 !.ac oct 10 1K 10Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\0bbd10d4eccf_loop_probe.asc
* Generated by LTspice 26.0.1 for Windows.
Iinj 0 probe AC {0.5*lpvar*(lpvar-1)}
Vinj probe in AC {0.5*lpvar*(lpvar+1)}
Vprobe probe out 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -160 144 -80 144
WIRE 0 144 112 144
WIRE 112 224 112 144
WIRE 112 144 160 144
WIRE 112 352 112 304
WIRE 288 144 368 144
WIRE 160 144 208 144
IOPIN -160 144 In
IOPIN 368 144 Out
SYMBOL voltage 192 144 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 VBottom 0
WINDOW 123 -32 56 VBottom 0
WINDOW 39 -32 56 VBottom 0
SYMATTR InstName Vprobe
SYMATTR Value 0
SYMBOL current 112 304 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
WINDOW 123 23 -4 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Iinj
SYMATTR Value ""
SYMATTR Value2 AC {0.5*lpvar*(lpvar-1)}
SYMBOL voltage 16 144 M270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 VBottom 0
WINDOW 123 -32 56 VBottom 0
WINDOW 39 -32 56 VBottom 0
SYMATTR InstName Vinj
SYMATTR Value ""
SYMATTR Value2 AC {0.5*lpvar*(lpvar+1)}
FLAG 112 352 0
FLAG -160 144 in
FLAG 368 144 out
FLAG 160 144 probe
* Z:\home\khalils\Downloads\files\data\raw_asc\3f8d5d0fb02a_quiz1.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0
V1 N002 0 3.3
M1 N001 N002 0 0 NMOS l=10u w=w
R1 N001 0 10k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc library.mod
.dc V2 0 3.3 0.1
.step param div 1 5 0.2
.param w=10u/3.6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 464 32 336 32
WIRE 464 48 464 32
WIRE 528 64 496 64
WIRE 256 96 64 96
WIRE 336 96 336 32
WIRE 336 96 256 96
WIRE 496 96 496 64
WIRE 496 96 464 96
WIRE 528 96 528 64
WIRE 256 144 256 96
WIRE 464 176 464 144
WIRE 64 208 64 176
WIRE 416 208 416 128
WIRE 256 256 256 224
WIRE 416 320 416 288
SYMBOL voltage 256 128 R0
SYMATTR InstName V2
SYMATTR Value ""
SYMBOL nmos4 416 48 R0
SYMATTR InstName M1
SYMATTR Value2 l=10u w=w
SYMBOL res 48 80 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 416 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG 64 208 0
FLAG 256 256 0
FLAG 416 320 0
FLAG 464 176 0
FLAG 528 96 0
TEXT 312 -48 Left 2 !.inc library.mod
TEXT 312 -8 Left 2 !.dc V2 0 3.3 0.1
TEXT 0 8 Left 2 !.step param div 1 5 0.2
TEXT -120 -40 Left 2 !.param w=10u/3.6
* Z:\home\khalils\Downloads\files\data\raw_asc\d3a2d662c920_sumopamp.asc
* Generated by LTspice 26.0.1 for Windows.
* Summing Amplifier\nSee https://www.electronics-tutorials.ws/opamp/opamp_4.html
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
R4 N001 N004 20K tol=1 pwr=0.1
V4 N005 0 SINE(0 5 3k)
V2 N002 0 SINE(0 5 1k)
R5 N001 N005 28K tol=1 pwr=0.1
V5 0 N006 12
R2 Output 0 1Meg tol=1 pwr=0.1
V1 N003 0 12
XU1 0 N001 N003 N006 Output level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R1 Output N001 1K tol=1 pwr=0.1
V3 N004 0 SINE(0 5 2k)
R3 N001 N002 10K tol=1 pwr=0.1
.tran 1
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 -16 192 -16
WIRE 336 -16 304 -16
WIRE -16 0 -336 0
WIRE 80 0 64 0
WIRE -336 32 -336 0
WIRE 240 32 128 32
WIRE 128 48 128 32
WIRE -16 96 -240 96
WIRE 80 96 80 0
WIRE 80 96 64 96
WIRE -240 128 -240 96
WIRE 240 160 240 32
WIRE 80 176 80 96
WIRE 192 176 192 -16
WIRE 192 176 80 176
WIRE 208 176 192 176
WIRE -16 192 -144 192
WIRE 80 192 80 176
WIRE 80 192 64 192
WIRE 336 192 336 -16
WIRE 336 192 272 192
WIRE 528 192 336 192
WIRE 128 208 128 128
WIRE 128 208 80 208
WIRE 208 208 192 208
WIRE 336 208 336 192
WIRE -144 224 -144 192
WIRE 128 224 128 208
WIRE 128 320 128 304
WIRE 240 320 240 224
WIRE 240 320 128 320
WIRE -336 336 -336 112
WIRE -240 336 -240 208
WIRE -240 336 -336 336
WIRE -144 336 -144 304
WIRE -144 336 -240 336
WIRE 80 336 80 208
WIRE 80 336 -144 336
WIRE 192 336 192 208
WIRE 192 336 80 336
WIRE 336 336 336 288
WIRE 336 336 192 336
WIRE 80 384 80 336
IOPIN 528 192 Out
SYMBOL res 80 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 28K
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL res 320 192 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL res 80 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 20K
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL voltage -144 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value SINE(0 5 3k)
SYMBOL voltage 128 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL voltage 128 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 12
SYMBOL res 80 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL OpAmps\\UniversalOpAmp 240 192 R0
SYMATTR InstName U1
SYMBOL voltage -336 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 5 1k)
SYMBOL res 320 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL voltage -240 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 5 2k)
FLAG 80 384 0
FLAG 528 192 Output
TEXT -368 408 Left 2 !.tran 1
TEXT -336 -128 Left 2 ;Summing Amplifier\nSee https://www.electronics-tutorials.ws/opamp/opamp_4.html
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3252.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3252.asy)
Rload2 OUT2 0 10
C2 OUT2 0 4.7
Rload1 OUT1 0 10
R3 OUT1 N001 470K
C4 N004 N006 1
XU1 N001 IN IN N002 OUT1 N003 0 N006 OUT2 N004 IN N005 LTC3252 ;pnba FB1)EN1)Vin)C1+)OUT1)C1-)GND)C2-)OUT2)C2+)EN2)FB2
V1 IN 0 5
R4 N001 0 510K
C3 OUT1 0 4.7
C1 N002 N003 1
R1 OUT2 N005 261K
R2 N005 0 510K
.tran 1m startup
.lib LTC3252.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1160 1716
WIRE 736 896 656 896
WIRE 864 896 736 896
WIRE 960 896 864 896
WIRE 736 912 736 896
WIRE 864 912 864 896
WIRE 960 912 960 896
WIRE 304 944 192 944
WIRE 432 944 304 944
WIRE 528 944 432 944
WIRE 192 960 192 944
WIRE 432 976 432 944
WIRE 528 976 528 944
WIRE 864 992 864 976
WIRE 736 1008 736 992
WIRE 736 1008 688 1008
WIRE 960 1008 960 992
WIRE 304 1024 304 944
WIRE 336 1024 304 1024
WIRE 656 1024 656 896
WIRE 656 1024 624 1024
WIRE 736 1024 736 1008
WIRE 192 1056 192 1040
WIRE 336 1088 272 1088
WIRE 688 1088 688 1008
WIRE 688 1088 624 1088
WIRE 736 1120 736 1104
WIRE 336 1152 272 1152
WIRE 736 1152 624 1152
WIRE 864 1152 736 1152
WIRE 976 1152 864 1152
WIRE 736 1168 736 1152
WIRE 864 1168 864 1152
WIRE 976 1168 976 1152
WIRE 336 1216 272 1216
WIRE 688 1216 624 1216
WIRE 864 1248 864 1232
WIRE 688 1264 688 1216
WIRE 736 1264 736 1248
WIRE 736 1264 688 1264
WIRE 976 1264 976 1248
WIRE 336 1280 272 1280
WIRE 656 1280 624 1280
WIRE 736 1280 736 1264
WIRE 736 1376 736 1360
SYMBOL cap 256 1216 R0
WINDOW 0 36 20 Left 2
WINDOW 3 34 45 Left 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL res 720 1264 R0
SYMATTR InstName R2
SYMATTR Value 510K
SYMBOL VOLTAGE 192 944 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 848 912 R0
SYMATTR InstName C3
SYMATTR Value 4.7
SYMBOL res 720 896 R0
SYMATTR InstName R3
SYMATTR Value 470K
SYMBOL PowerProducts\\LTC3252 480 1152 R0
SYMATTR InstName U1
SYMBOL cap 256 1088 R0
WINDOW 0 36 20 Left 2
WINDOW 3 34 45 Left 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 720 1152 R0
SYMATTR InstName R1
SYMATTR Value 261K
SYMBOL cap 848 1168 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL res 720 1008 R0
SYMATTR InstName R4
SYMATTR Value 510K
SYMBOL res 960 1152 R0
SYMATTR InstName Rload2
SYMATTR Value 10
SYMBOL res 944 896 R0
SYMATTR InstName Rload1
SYMATTR Value 10
FLAG 960 1008 0
FLAG 192 1056 0
FLAG 960 896 OUT1
FLAG 192 944 IN
FLAG 656 1280 0
FLAG 736 1376 0
FLAG 864 1248 0
FLAG 736 1120 0
FLAG 864 992 0
FLAG 976 1264 0
FLAG 976 1152 OUT2
TEXT 888 1328 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\d669157dd8b2_Tutorial_LTSpice_Ep5-CurvasBJT.asc
* Generated by LTspice 26.0.1 for Windows.
I1 0 N002 {corrente}
Rc N001 CE 10
V1 N001 0 PULSE(0 40 0 1 0 0 1)
Q1 CE N002 0 0 BC546B
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1
.step param corrente 5u 10m 1m
.model Transistor NPN(BF=100)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 32 176 32
WIRE 432 32 352 32
WIRE 176 112 176 32
WIRE 224 112 176 112
WIRE 176 128 176 112
WIRE 432 144 432 32
WIRE 112 176 0 176
WIRE 0 224 0 176
WIRE 0 336 0 304
WIRE 176 336 176 224
WIRE 432 336 432 224
SYMBOL npn 112 128 R0
SYMATTR InstName Q1
SYMATTR Value BC546B
SYMBOL voltage 432 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 40 0 1 0 0 1)
SYMBOL current 0 304 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value {corrente}
SYMBOL res 368 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rc
SYMATTR Value 10
FLAG 176 336 0
FLAG 432 336 0
FLAG 0 336 0
FLAG 224 112 CE
TEXT -16 488 Left 2 !.tran 1
TEXT -16 424 Left 2 !.step param corrente 5u 10m 1m
TEXT -16 456 Left 2 !.model Transistor NPN(BF=100)
* Z:\home\khalils\Downloads\files\data\raw_asc\aa6a7061c33e_rc.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Input 0 SINE(0 1 1K) AC 1
R1 Output Input 1K
C1 Output 0 10nF
.ac oct 20 1000 200000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 80 -80 80
WIRE -16 80 -64 80
WIRE 160 80 64 80
WIRE 336 80 160 80
WIRE 160 112 160 80
WIRE -64 128 -64 80
WIRE -64 240 -64 208
WIRE 160 240 160 176
WIRE 160 240 -64 240
WIRE 160 288 160 240
IOPIN -80 80 In
IOPIN 336 80 Out
SYMBOL res 80 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL Misc\\signal -64 112 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL cap 144 112 R0
SYMATTR InstName C1
SYMATTR Value 10nF
FLAG -80 80 Input
FLAG 336 80 Output
FLAG 160 288 0
TEXT 208 216 Left 2 !.ac oct 20 1000 200000
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG621.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nCharge Injection not included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG621.asy)
C1 N002 0 36p
R1 N002 0 301
V4 -V 0 -5
V1 N003 0 PULSE(0 3 25u 1n 1n 20u)
XU1 N003 N002 N001 -V 0 +V ADG621 ;pnba IN)D)S)Vss)GND)Vdd
V2 N001 0 3
V3 +V 0 5
.tran 75u
.lib ADG621.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 16 -48 -32
WIRE -144 96 -320 96
WIRE 128 96 48 96
WIRE 256 96 128 96
WIRE -320 128 -320 96
WIRE 128 128 128 96
WIRE 256 128 256 96
WIRE -144 160 -240 160
WIRE -512 176 -512 128
WIRE -432 176 -432 128
WIRE -320 224 -320 208
WIRE 128 240 128 208
WIRE 256 240 256 192
WIRE -512 272 -512 256
WIRE -432 272 -432 256
WIRE -240 272 -240 160
WIRE -112 304 -112 272
WIRE 16 304 16 272
WIRE -240 416 -240 352
SYMBOL voltage -320 112 R0
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL cap 240 128 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -432 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -5
SYMBOL voltage -512 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL ADG621 -48 144 R0
SYMATTR InstName U1
SYMBOL res 112 112 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage -240 256 R0
WINDOW 3 24 102 Left 2
SYMATTR Value PULSE(0 3 25u 1n 1n 20u)
SYMATTR InstName V1
FLAG 128 240 0
FLAG 256 240 0
FLAG 16 304 0
FLAG -240 416 0
FLAG -320 224 0
FLAG -48 -32 +V
FLAG -512 272 0
FLAG -512 128 +V
FLAG -432 272 0
FLAG -432 128 -V
FLAG -112 304 -V
TEXT -224 392 Left 2 !.tran 75u
TEXT -520 -152 Left 2 ;Note:\nCharge Injection not included\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\7c138b4877f2_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
* CMOS Inverter
M1 VDD IN Out VDD PMOS
M2 Out IN 0 0 NMOS
V2 VDD 0 5V
V1 IN 0 V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 96 240 48
WIRE 288 96 240 96
WIRE 288 144 288 96
WIRE 288 144 240 144
WIRE 192 176 128 176
WIRE 128 208 128 176
WIRE 128 208 16 208
WIRE 240 208 240 192
WIRE 368 208 240 208
WIRE 240 224 240 208
WIRE 128 304 128 208
WIRE 192 304 128 304
WIRE -352 320 -352 240
WIRE -240 320 -240 240
WIRE 240 416 240 320
IOPIN 16 208 In
IOPIN 368 208 Out
IOPIN 240 48 In
IOPIN -240 160 In
IOPIN -352 160 In
SYMBOL voltage -352 144 R0
SYMATTR InstName V1
SYMBOL voltage -240 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5V
SYMBOL nmos 192 224 R0
SYMATTR InstName M2
SYMBOL pmos4 192 96 R0
SYMATTR InstName M1
FLAG 240 416 0
FLAG 16 208 IN
FLAG 368 208 Out
FLAG 240 48 VDD
FLAG -240 160 VDD
FLAG -352 160 IN
FLAG -352 320 0
FLAG -240 320 0
TEXT 32 64 Left 2 ;CMOS Inverter
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3406B.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
C2 OUT 0 22
L1 N001 OUT 4.7
Rload OUT 0 5
R1 OUT N002 887K
R2 N002 0 280K
XU1 IN 0 N001 IN N002 LTC3406B ;pnba Run)GND)SW)Vin)FB
.tran 500u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3406B.asy)
.lib LTC3406B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 700
WIRE 192 64 96 64
WIRE 352 64 192 64
WIRE 96 80 96 64
WIRE 352 80 352 64
WIRE 192 144 192 64
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 624 144 592 144
WIRE 736 144 624 144
WIRE 848 144 736 144
WIRE 736 160 736 144
WIRE 848 160 848 144
WIRE 96 176 96 160
WIRE 624 176 624 144
WIRE 736 256 736 224
WIRE 848 256 848 240
WIRE 624 304 624 256
WIRE 624 304 496 304
WIRE 624 320 624 304
WIRE 352 384 352 368
WIRE 624 416 624 400
FLAG 96 176 0
FLAG 352 384 0
FLAG 736 256 0
FLAG 848 256 0
FLAG 848 144 OUT
FLAG 624 416 0
FLAG 96 64 IN
SYMBOL VOLTAGE 96 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL polcap 720 160 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL RES 832 144 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL res 608 160 R0
SYMATTR InstName R1
SYMATTR Value 887K
SYMBOL res 608 304 R0
SYMATTR InstName R2
SYMATTR Value 280K
SYMBOL PowerProducts\\LTC3406B 352 224 R0
SYMATTR InstName U1
TEXT 752 376 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL40505A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL40505A.asy)
C3 OUT 0 4.7
R3 N003 0 301k
R4 IN N002 100k
V3 IN 0 1.7
R2 OUT N003 200k
C2 OUT N001 10n
XU1 IN OUT IN N003 N002 N001 IN 0 ADPL40505A ;pnba IN)OUT)EN)FB)POK)BYP)MODE)GND
R1 OUT 0 2
.tran 10m startup
.lib ADPL40505A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1988 1984
WIRE -64 1104 -144 1104
WIRE -16 1104 -64 1104
WIRE 80 1104 -16 1104
WIRE 96 1104 80 1104
WIRE 368 1104 320 1104
WIRE 448 1104 368 1104
WIRE 560 1104 448 1104
WIRE 656 1104 560 1104
WIRE -144 1120 -144 1104
WIRE 368 1120 368 1104
WIRE 560 1120 560 1104
WIRE 656 1120 656 1104
WIRE -16 1136 -16 1104
WIRE 448 1152 448 1104
WIRE 80 1200 80 1104
WIRE 96 1200 80 1200
WIRE 368 1200 368 1184
WIRE 368 1200 320 1200
WIRE -144 1216 -144 1200
WIRE 560 1216 560 1184
WIRE 656 1216 656 1200
WIRE -16 1280 -16 1216
WIRE 96 1280 -16 1280
WIRE 448 1280 448 1232
WIRE 448 1280 320 1280
WIRE 448 1312 448 1280
WIRE -64 1344 -64 1104
WIRE 96 1344 -64 1344
WIRE 208 1408 208 1392
WIRE 448 1408 448 1392
SYMBOL res 432 1296 R0
SYMATTR InstName R3
SYMATTR Value 301k
SYMBOL cap 544 1120 R0
SYMATTR InstName C3
SYMATTR Value 4.7
SYMBOL cap 352 1120 R0
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -144 1104 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 1.7
SYMBOL res 432 1136 R0
SYMATTR InstName R2
SYMATTR Value 200k
SYMBOL ADPL40505A 208 1184 R0
SYMATTR InstName U1
SYMBOL res 640 1104 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL res -32 1120 R0
SYMATTR InstName R4
SYMATTR Value 100k
FLAG -144 1216 0
FLAG -144 1104 IN
FLAG 560 1216 0
FLAG 656 1216 0
FLAG 656 1104 OUT
FLAG 448 1408 0
FLAG 208 1408 0
TEXT 96 1448 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX9638.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX9638.asy)
RL OUT 0 10k
Vcc Vcc 0 2.5
XU1 IN OUT Vcc Vee OUT Vcc MAX9638 ;pnba In+)In-)V+)V-)OUT)SHDN
CL OUT 0 15p
Vee 0 Vee 2.5
V1 IN 0 SINE(0 50m 10k)
.tran 100u
.lib MAX9638.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 64 288 64 272
WIRE 416 352 416 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 64 448 64 400
WIRE 416 448 416 416
WIRE 448 448 448 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 64 544 64 528
WIRE 304 592 304 576
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 10k)
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 10k
SYMBOL MAX9638 432 400 R0
SYMATTR InstName U1
FLAG 720 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
FLAG 448 448 Vcc
TEXT 16 632 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\4feb2d2f25e2_3S_Charging_Control_Circuit.asc
* Generated by LTspice 26.0.1 for Windows.
* Charging Control
* 3S BMS Charging Control Circuit
* [Driver circuit is same as Output control Circuit]
* NMOS Transistor - IRFZ44N
* - 1 Control input
* For safety during sleep and wake up -->
M1 N004 N005 0 0 NMOS
VChargin_Source N001 N004 13 volt
V3 N003 0 4. 2
V1 N001 N002 4. 2
R1 N005 0 pull_down
V2 N002 N003 4. 2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1220
WIRE 192 -96 -656 -96
WIRE 192 32 192 -96
WIRE -656 272 -656 -96
WIRE 192 336 192 112
WIRE 192 624 192 416
WIRE -656 880 -656 352
WIRE -16 880 -656 880
WIRE -16 912 -16 880
WIRE -176 992 -224 992
WIRE -64 992 -176 992
WIRE -176 1040 -176 992
WIRE -176 1152 -176 1120
WIRE -16 1152 -16 1008
WIRE -16 1152 -176 1152
WIRE 192 1152 192 704
WIRE 192 1152 -16 1152
WIRE 192 1200 192 1152
SYMBOL voltage 192 608 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 4. 2
SYMBOL voltage 192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 4. 2
SYMBOL nmos -64 912 R0
SYMATTR InstName M1
SYMBOL voltage -656 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Chargin_Source
SYMATTR Value 13 volt
SYMBOL voltage 192 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4. 2
SYMBOL res -192 1024 R0
WINDOW 3 36 68 Left 2
SYMATTR InstName R1
SYMATTR Value pull_down
FLAG 192 1200 0
TEXT -336 968 Left 2 ;Charging Control
TEXT -1504 112 Left 4 ;3S BMS Charging Control Circuit
TEXT -1440 216 Left 2 ;[Driver circuit is same as Output control Circuit]
TEXT -1432 328 Left 2 ;NMOS Transistor - IRFZ44N
TEXT -1400 632 Left 2 ;- 1 Control input
TEXT -680 1072 Left 2 ;For safety during sleep and wake up -->
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1262.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N001 N002 N003 N004 IN OUT 0 0 LTC1262 ;pnba C1-)C1+)C2-)C2+)Vcc)OUT)GND)SHDN
C1 N001 N002 .22
C2 N003 N004 .22
C3 OUT 0 4.7
V1 IN 0 5
Rload OUT 0 1K
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1262.asy)
.lib LTC1262.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3308 2256
WIRE 2624 1904 2544 1904
WIRE 2960 1904 2912 1904
WIRE 2624 1968 2544 1968
WIRE 2960 1968 2960 1904
WIRE 2960 1968 2912 1968
WIRE 2960 1984 2960 1968
WIRE 2624 2032 2544 2032
WIRE 3056 2032 2912 2032
WIRE 3168 2032 3056 2032
WIRE 3056 2048 3056 2032
WIRE 3168 2048 3168 2032
WIRE 2624 2096 2544 2096
WIRE 2960 2096 2912 2096
WIRE 2960 2112 2960 2096
WIRE 3056 2144 3056 2112
WIRE 3168 2144 3168 2128
WIRE 2960 2208 2960 2192
FLAG 2960 1984 0
FLAG 2960 2208 0
FLAG 3168 2144 0
FLAG 3056 2144 0
FLAG 3168 2032 OUT
FLAG 2960 2096 IN
SYMBOL PowerProducts\\LTC1262 2768 2000 R0
SYMATTR InstName U1
SYMBOL cap 2528 1904 R0
WINDOW 0 39 18 Left 2
WINDOW 3 33 48 Left 2
SYMATTR InstName C1
SYMATTR Value .22
SYMBOL cap 2528 2032 R0
WINDOW 0 39 14 Left 2
WINDOW 3 36 46 Left 2
SYMATTR InstName C2
SYMATTR Value .22
SYMBOL cap 3040 2048 R0
SYMATTR InstName C3
SYMATTR Value 4.7
SYMBOL voltage 2960 2096 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 3152 2032 R0
SYMATTR InstName Rload
SYMATTR Value 1K
TEXT 3128 2240 Left 2 !.tran 1m