Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\07e3932f7d56_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N001 N002 1527
R1 N001 N003 10000
R2 N003 0 10000
R4 N004 0 1000
M1 N002 N003 N004 N004 N4007
V1 N001 0 12
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include 4007.lib
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1072 680
WIRE 256 64 80 64
WIRE 288 64 256 64
WIRE 432 64 368 64
WIRE 432 96 432 64
WIRE 80 144 80 64
WIRE 256 144 256 64
WIRE 256 272 256 224
WIRE 256 272 192 272
WIRE 80 352 80 224
WIRE 144 352 80 352
WIRE 256 368 192 368
WIRE 80 416 80 352
WIRE 256 416 256 368
WIRE 80 544 80 496
WIRE 256 544 256 496
WIRE 256 544 80 544
WIRE 256 576 256 544
SYMBOL res 64 128 R0
SYMATTR InstName R1
SYMATTR Value 10000
SYMBOL res 64 400 R0
SYMATTR InstName R2
SYMATTR Value 10000
SYMBOL nmos 144 272 R0
SYMATTR InstName M1
SYMATTR Value N4007
SYMBOL voltage 272 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 240 400 R0
WINDOW 3 47 72 Left 2
SYMATTR InstName R4
SYMATTR Value 1000
SYMBOL res 240 128 R0
SYMATTR InstName R3
SYMATTR Value 1527
FLAG 432 96 0
FLAG 256 576 0
TEXT 448 328 Left 2 !.include 4007.lib
TEXT -264 240 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1028.asc
* Generated by LTspice 26.0.1 for Windows.
* Phono Preamplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1028.asy)
R1 OUT N001 10K
R3 N002 N001 787
V2 -V 0 -15
C2 OUT N002 .33
R2 N001 0 10
C3 IN 0 100p
R4 IN 0 47K
C1 N002 N001 .1
V1 +V 0 15
V3 IN 0 ac 1
XU1 IN N001 +V -V OUT LT1028 ;pnba In+)In-)V+)V-)OUT
.ac oct 10 10 20K
.lib LT1028.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 128 -48 96 -48
WIRE 240 -48 208 -48
WIRE -256 32 -256 16
WIRE -128 32 -128 16
WIRE 96 48 96 -48
WIRE 144 48 96 48
WIRE 240 48 240 -48
WIRE 240 48 208 48
WIRE 256 48 240 48
WIRE 336 48 320 48
WIRE -256 128 -256 112
WIRE -128 128 -128 112
WIRE 0 144 -16 144
WIRE 96 144 96 48
WIRE 96 144 80 144
WIRE 208 144 96 144
WIRE 336 144 336 48
WIRE 336 144 288 144
WIRE 192 208 192 192
WIRE 96 224 96 144
WIRE 160 224 96 224
WIRE 336 240 336 144
WIRE 336 240 224 240
WIRE 368 240 336 240
WIRE 0 256 -112 256
WIRE 96 256 0 256
WIRE 160 256 96 256
WIRE -112 272 -112 256
WIRE 0 272 0 256
WIRE 96 272 96 256
WIRE 192 288 192 272
WIRE -112 368 -112 352
WIRE 0 368 0 352
WIRE 96 368 96 336
SYMBOL res 224 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 787
SYMBOL voltage -112 256 R0
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL cap 80 272 R0
SYMATTR InstName C3
SYMATTR Value 100p
SYMBOL res 96 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL cap 208 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage -128 16 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -256 16 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 304 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL opamps\\LT1028 192 176 R0
SYMATTR InstName U1
SYMBOL cap 320 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .33
SYMBOL res -16 256 R0
SYMATTR InstName R4
SYMATTR Value 47K
FLAG -128 128 0
FLAG 192 192 +V
FLAG -128 16 +V
FLAG 192 288 -V
FLAG -256 128 0
FLAG -256 16 -V
FLAG -16 144 0
FLAG -112 368 0
FLAG 96 368 0
FLAG 0 368 0
FLAG -112 256 IN
FLAG 368 240 OUT
TEXT 200 360 Left 2 !.ac oct 10 10 20K
TEXT 40 -88 Bottom 2 ;Phono Preamplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\17fc2efa157d_lab2_task1.asc
* Generated by LTspice 26.0.1 for Windows.
VEK N001 0 5
Q1 N001 N002 0 0 2SC4081UB
VEB N002 0 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc EB 0 2 0.001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 192 272 192
WIRE 192 256 192 192
WIRE -32 304 -48 304
WIRE 128 304 48 304
WIRE 192 432 192 352
SYMBOL voltage 176 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName EK
SYMATTR Value 5
SYMBOL voltage 64 304 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName EB
SYMATTR Value 0
SYMBOL npn 128 256 R0
SYMATTR InstName Q1
SYMATTR Value 2SC4081UB
FLAG 304 192 0
FLAG -48 304 0
FLAG 192 432 0
TEXT -136 456 Left 2 !.dc EB 0 2 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8672.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8672.asy)
Rload OUT 0 10
D1 N001 0 EDZV15B
C2 OUT 0 10 Rser=10m
L1 OUT N004 100 Rser=5
C1 OUT N003 1
D2 N001 IN EDZV33B
C3 OUT 0 1000 Rser=20m
V1 IN 0 SINE(12 3 50K 0.2)
MQ1 OUT N002 IN IN BSC028N06LS3
XU1 OUT 0 NC_01 MP_02 MP_03 N004 N003 OUT IN N002 LT8672 ;pnba EN/UVLO)GND)PG)))AUXSW)AUX)DRAIN)SOURCE)GATE
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 210m
.lib LT8672.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -272 -64 -576 -64
WIRE -32 -64 -272 -64
WIRE 80 -64 -32 -64
WIRE 224 -64 176 -64
WIRE 352 -64 224 -64
WIRE 480 -64 352 -64
WIRE 624 -64 480 -64
WIRE 704 -64 624 -64
WIRE 864 -64 704 -64
WIRE -576 -48 -576 -64
WIRE -272 -48 -272 -64
WIRE 480 -48 480 -64
WIRE 624 -48 624 -64
WIRE 704 -48 704 -64
WIRE 864 -48 864 -64
WIRE 352 -32 352 -64
WIRE -272 32 -272 16
WIRE 224 32 224 -64
WIRE 224 32 -128 32
WIRE -576 48 -576 32
WIRE -32 48 -32 -64
WIRE 96 48 96 -16
WIRE 224 48 224 32
WIRE 352 48 352 32
WIRE 480 48 480 32
WIRE 624 48 624 16
WIRE 704 48 704 16
WIRE 864 48 864 32
WIRE -272 112 -272 96
WIRE -128 176 -128 32
WIRE -96 176 -128 176
WIRE 224 320 224 304
SYMBOL ind 464 -64 R0
WINDOW 123 38 94 Left 2
WINDOW 0 38 28 Left 2
WINDOW 3 38 61 Left 2
SYMATTR Value2 Rser=5
SYMATTR InstName L1
SYMATTR Value 100
SYMBOL LT8672 224 176 R0
WINDOW 3 1 47 Center 2
SYMATTR InstName U1
SYMBOL cap 608 -48 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMATTR Value2 Rser=10m
SYMBOL voltage -576 -64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(12 3 50K 0.2)
SYMBOL zener -288 32 R0
WINDOW 0 28 8 Left 2
WINDOW 3 21 62 Left 2
SYMATTR InstName D1
SYMATTR Value EDZV15B
SYMBOL cap 688 -48 R0
WINDOW 123 23 57 Left 2
WINDOW 3 39 35 Left 2
SYMATTR Value2 Rser=20m
SYMATTR Value 1000
SYMATTR InstName C3
SYMBOL res 848 -64 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL nmos 176 -16 M270
WINDOW 0 83 47 VTop 2
WINDOW 3 56 47 VTop 2
SYMATTR InstName Q1
SYMATTR Value BSC028N06LS3
SYMBOL cap 336 -32 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL zener -288 16 M180
WINDOW 0 24 57 Left 2
WINDOW 3 21 10 Left 2
SYMATTR InstName D2
SYMATTR Value EDZV33B
FLAG 624 48 0
FLAG 704 48 0
FLAG 864 48 0
FLAG 224 320 0
FLAG -272 112 0
FLAG -576 -64 IN
FLAG 864 -64 OUT
FLAG -576 48 0
TEXT 528 344 Left 2 !.tran 210m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4077.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4077.asy)
V2 -V 0 -15
V1 +V 0 15
Vin IN 0 SINE(0 1 10K)
R2 OUT N001 10K
Rload OUT 0 10K
XU1 IN N001 +V -V OUT ADA4077 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 10K
.tran 1m
.lib ADA4077.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 128 -1120 128 -1136
WIRE 240 -1120 240 -1136
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 128 -1024 128 -1040
WIRE 240 -1024 240 -1040
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 128 -1136 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 240 -1136 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL ADA4077 576 -1168 R0
SYMATTR InstName U1
FLAG 128 -1136 +V
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 240 -1136 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 768 -992 0
FLAG 240 -1024 0
FLAG 128 -1024 0
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\043fdc83e779_MAX9638.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX9638.asy)
Vee 0 Vee 2.5
CL OUT 0 15p
Vcc Vcc 0 2.5
V1 IN 0 SINE(0 50m 10k)
XU1 IN OUT Vcc Vee OUT Vcc MAX9638 ;pnba In+)In-)V+)V-)OUT)SHDN
RL OUT 0 10k
.tran 100u
.lib MAX9638.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 64 288 64 272
WIRE 416 352 416 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 64 448 64 400
WIRE 416 448 416 416
WIRE 448 448 448 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 64 544 64 528
WIRE 304 592 304 576
SYMBOL MAX9638 432 400 R0
SYMATTR InstName U1
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 10k)
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 10k
FLAG 720 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
FLAG 448 448 Vcc
TEXT 16 632 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\6c98b8d1d2e9_2NAND.asc
* Generated by LTspice 26.0.1 for Windows.
M1 VHIGH A Vout VHIGH PMOS l=50n w=1u
M2 VHIGH NC_01 Vout VHIGH PMOS l=50n w=1u
M4 Vout A N001 VLOW NMOS l=50n w=0.5u
M5 N001 B VLOW VLOW NMOS l=50n w=0.5u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include models.txt
.tran 11u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 960 708
WIRE 256 -32 208 -32
WIRE 160 16 80 16
WIRE 208 16 208 -32
WIRE 208 16 160 16
WIRE 256 16 208 16
WIRE 304 16 256 16
WIRE 160 64 160 16
WIRE 160 64 80 64
WIRE 304 64 304 16
WIRE 304 64 256 64
WIRE 32 96 -16 96
WIRE 80 144 80 112
WIRE 176 144 80 144
WIRE 256 144 256 112
WIRE 256 144 176 144
WIRE 368 144 256 144
WIRE 224 192 176 192
WIRE -16 224 -16 96
WIRE -16 224 -128 224
WIRE 128 224 -16 224
WIRE 176 288 176 240
WIRE 224 336 224 192
WIRE 224 336 176 336
WIRE 128 368 -128 368
WIRE 224 384 224 336
WIRE 224 384 176 384
WIRE 256 384 224 384
WIRE 256 448 256 384
FLAG -128 224 A
FLAG -128 368 B
FLAG 256 -32 VHIGH
FLAG 256 448 VLOW
FLAG 368 144 Vout
SYMBOL pmos4 32 16 R0
SYMATTR InstName M1
SYMATTR Value2 l=50n w=1u
SYMBOL pmos4 208 16 R0
SYMATTR InstName M2
SYMATTR Value2 l=50n w=1u
SYMBOL nmos4 128 144 R0
SYMATTR InstName M4
SYMATTR Value2 l=50n w=0.5u
SYMBOL nmos4 128 288 R0
SYMATTR InstName M5
SYMATTR Value2 l=50n w=0.5u
TEXT -376 312 Left 2 !.include models.txt
TEXT -352 384 Left 2 !.tran 11u
* Z:\home\khalils\Downloads\files\data\raw_asc\08f90bcc6f6e_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N003 10
R2 0 N003 5
V1 N001 0 5
XU1 N003 N001 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
.tran 0 4ms 0
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1148 688
WIRE 768 304 640 304
WIRE 896 320 832 320
WIRE 768 336 736 336
WIRE 640 384 640 304
WIRE 736 464 736 336
WIRE 768 464 736 464
WIRE 816 464 768 464
WIRE 896 464 896 320
WIRE 768 496 768 464
WIRE 640 608 640 464
WIRE 768 608 768 576
WIRE 768 608 640 608
WIRE 640 656 640 608
SYMBOL res 912 448 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL Opamps/opamp 800 384 M180
SYMATTR InstName U1
SYMBOL voltage 640 368 R0
WINDOW 3 24 38 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 784 592 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 5
FLAG 640 656 0
TEXT 568 256 Left 2 !.tran 0 4ms 0\n.lib opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\44a1e6405ecf_simulation.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 0 8.2k
I1 vs 0 125m
R2 vg 0 4.7k
XM1 vd vg vs Si2301CDS ;pnba D)G)S
Q2 vg N002 vs 0 DI_DMMT3906
D1 N001 vs Dideal
R3 vin vd 390m
Q1 N002 N002 vin 0 DI_DMMT3906
V2 vin 0 PWL(0 3.4 1 3.24 2 3.4)
V1 N001 0 PWL(0 3.3 1 3.3 1.001 0)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.include si2301cds_ps_rc.lib
.tran 2
.include DMMT3906.spice
.model Dideal D(Ron=0.0001 Roff=100G Vfwd=0)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1036 680
WIRE -16 0 -128 0
WIRE 128 0 64 0
WIRE 176 0 128 0
WIRE 336 0 272 0
WIRE 592 0 336 0
WIRE 624 0 592 0
WIRE 720 0 688 0
WIRE -128 80 -128 0
WIRE 112 80 -128 80
WIRE 336 80 336 0
WIRE -128 96 -128 80
WIRE 592 96 592 0
WIRE 720 96 720 0
WIRE 192 128 176 128
WIRE 272 128 192 128
WIRE 112 208 112 176
WIRE 192 208 192 128
WIRE 192 208 112 208
WIRE 256 208 256 48
WIRE 336 208 336 176
WIRE 336 208 256 208
WIRE 112 224 112 208
WIRE 336 224 336 208
WIRE -128 352 -128 176
WIRE 112 352 112 304
WIRE 336 352 336 304
WIRE 592 352 592 176
WIRE 720 352 720 176
SYMBOL res 320 208 R0
SYMATTR InstName R2
SYMATTR Value 4.7k
SYMBOL pnp 272 176 M180
SYMATTR InstName Q2
SYMATTR Value DI_DMMT3906
SYMBOL voltage 720 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 3.3 1 3.3 1.001 0)
SYMBOL pnp 176 176 R180
SYMATTR InstName Q1
SYMATTR Value DI_DMMT3906
SYMBOL diode 688 -16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value Dideal
SYMBOL current 592 96 R0
SYMATTR InstName I1
SYMATTR Value 125m
SYMBOL voltage -128 80 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 3.4 1 3.24 2 3.4)
SYMBOL pmos 176 48 R270
SYMATTR InstName M1
SYMATTR Value Si2301CDS
SYMATTR Prefix X
SYMBOL res 96 208 R0
SYMATTR InstName R1
SYMATTR Value 8.2k
SYMBOL res -32 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 390m
FLAG 112 352 0
FLAG 336 352 0
FLAG 592 352 0
FLAG -128 352 0
FLAG 336 208 vg
FLAG 336 0 vs
FLAG -128 0 vin
FLAG 720 352 0
FLAG 128 0 vd
TEXT 344 -128 Left 2 !.include si2301cds_ps_rc.lib
TEXT 344 -64 Left 2 !.tran 2
TEXT 344 -96 Left 2 !.include DMMT3906.spice
TEXT 352 -160 Left 2 !.model Dideal D(Ron=0.0001 Roff=100G Vfwd=0)
* Z:\home\khalils\Downloads\files\data\raw_asc\2237394b5a46_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 PILE 0 4.2
V2 EN 0 PULSE(4.2 0 2 0 0 0.1)
M1 VCC N001 PILE PILE FDC638P
M2 N001 N002 0 0 IRLML6244
R1 PILE N001 2Meg tol=1 pwr=0.1
R2 VCC 0 100K tol=1 pwr=0.1
V3 UC 0 PULSE(0 3.3 6 0 0 0.1)
R3 VCC N002 2Meg tol=1 pwr=0.1
M3 N002 UC 0 0 BSS123
R5 UC 0 1Meg tol=1 pwr=0.1
D1 N001 EN 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1156 680
WIRE 176 -352 128 -352
WIRE 224 -352 176 -352
WIRE 480 -352 320 -352
WIRE 816 -352 480 -352
WIRE 176 -256 176 -272
WIRE 240 -256 240 -304
WIRE 240 -256 176 -256
WIRE 816 -240 816 -352
WIRE 240 -224 240 -256
WIRE 96 -192 32 -192
WIRE 176 -192 176 -256
WIRE 176 -192 160 -192
WIRE -448 -144 -448 -176
WIRE -176 -144 -176 -176
WIRE -80 -144 -80 -176
WIRE 448 -144 288 -144
WIRE 480 -144 480 -272
WIRE 480 -144 448 -144
WIRE 560 -64 496 -64
WIRE 624 -64 560 -64
WIRE -448 -32 -448 -64
WIRE -176 -32 -176 -64
WIRE -80 -32 -80 -64
WIRE 240 64 240 -128
WIRE 448 64 448 -48
WIRE 560 64 560 16
WIRE 816 64 816 -160
FLAG 240 64 0
FLAG -80 -32 0
FLAG -176 -32 0
FLAG 816 -352 VCC
FLAG -448 -176 UC
FLAG 624 -64 UC
FLAG 816 64 0
FLAG 32 -192 EN
FLAG -176 -176 EN
FLAG -448 -32 0
FLAG 448 64 0
FLAG 128 -352 PILE
FLAG -80 -176 PILE
FLAG 560 64 0
SYMBOL voltage -80 -160 R0
WINDOW 3 46 57 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 4.2
SYMATTR InstName V1
SYMBOL voltage -176 -160 R0
WINDOW 3 -102 163 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(4.2 0 2 0 0 0.1)
SYMATTR InstName V2
SYMBOL pmos 320 -304 M270
SYMATTR InstName M1
SYMATTR Value FDC638P
SYMBOL nmos 288 -224 M0
WINDOW 3 -137 42 Left 2
SYMATTR Value IRLML6244
SYMATTR InstName M2
SYMBOL res 160 -368 R0
WINDOW 3 -78 56 Left 2
SYMATTR Value 2Meg
SYMATTR InstName R1
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL res 800 -256 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL voltage -448 -160 R0
WINDOW 3 -284 155 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3.3 6 0 0 0.1)
SYMATTR InstName V3
SYMBOL res 464 -368 R0
WINDOW 3 33 82 Left 2
SYMATTR Value 2Meg
SYMATTR InstName R3
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL nmos 496 -144 M0
SYMATTR InstName M3
SYMATTR Value BSS123
SYMBOL res 544 -80 R0
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL diode 160 -208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
TEXT -392 48 Left 2 !.tran 10
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP124-2.7.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5.5
C2 OUT 0 1
Rload OUT 0 100
C1 IN 0 1
XU1 OUT MP_01 OUT 0 IN MP_02 MP_03 IN ADP124 K=45454.5 ;pnba Vout))Sense)GND)En)))Vin
.tran 10m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP124-2.7.asy)
.lib ADP124.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 384 96 352 96
WIRE 432 96 384 96
WIRE 512 96 432 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 432 112 432 96
WIRE 512 112 512 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 384 208 384 96
WIRE 384 208 352 208
WIRE 432 208 432 176
WIRE 512 208 512 192
WIRE 256 272 256 256
FLAG 0 208 0
FLAG 256 272 0
FLAG 432 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL cap 416 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ADP124-2.7 256 208 R0
SYMATTR InstName U1
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\d74dbcc9072f_LT1224.asc
* Generated by LTspice 26.0.1 for Windows.
* 1MHz, 2nd Order Butterworth Filter
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1224.asy)
C3 0 N001 500p
R2 N002 N001 825
V3 IN 0 ac 1
C2 OUT N002 100p
XU1 0 N002 +V -V OUT LT1224 ;pnba In+)In-)V+)V-)OUT
R1 OUT N001 619
V2 -V 0 -15
V1 +V 0 15
R3 N001 IN 619
.ac oct 10 1K 100Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -208 48 -208 32
WIRE -112 48 -112 32
WIRE 128 64 96 64
WIRE 352 64 208 64
WIRE 256 112 224 112
WIRE 352 112 352 64
WIRE 352 112 320 112
WIRE -208 144 -208 128
WIRE -112 144 -112 128
WIRE 288 208 288 192
WIRE 0 224 -96 224
WIRE 96 224 96 64
WIRE 96 224 80 224
WIRE 128 224 96 224
WIRE 224 224 224 112
WIRE 224 224 208 224
WIRE 256 224 224 224
WIRE -96 240 -96 224
WIRE 352 240 352 112
WIRE 352 240 320 240
WIRE 384 240 352 240
WIRE 96 256 96 224
WIRE 256 256 224 256
WIRE 288 288 288 272
WIRE -96 336 -96 320
WIRE 96 336 96 320
SYMBOL res 224 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 619
SYMBOL voltage -96 224 R0
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL res 96 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 619
SYMBOL voltage -112 32 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 224 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 825
SYMBOL opamps\\LT1224 288 176 R0
SYMATTR InstName U1
SYMBOL cap 320 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL voltage -208 32 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL cap 80 320 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value 500p
FLAG -112 144 0
FLAG 288 192 +V
FLAG -112 32 +V
FLAG 288 288 -V
FLAG -208 144 0
FLAG -208 32 -V
FLAG 96 336 0
FLAG 224 256 0
FLAG -96 336 0
FLAG 384 240 OUT
FLAG -96 224 IN
TEXT 224 368 Left 2 !.ac oct 10 1K 100Meg
TEXT 224 -8 Bottom 2 ;1MHz, 2nd Order Butterworth Filter
* Z:\tmp\asc_dec_bjh7r6w2\115ff5df0564_1006A_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N001 0 1K
V3 IN 0 SINE(5m 1m 1K)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 112 16 112
WIRE 128 112 112 112
WIRE 160 112 128 112
WIRE 272 112 240 112
WIRE 192 208 192 192
WIRE 128 224 128 112
WIRE 160 224 128 224
WIRE -80 240 -80 224
WIRE 272 240 272 112
WIRE 272 240 224 240
WIRE 336 240 272 240
WIRE 160 256 48 256
WIRE 48 272 48 256
WIRE 192 288 192 272
WIRE -80 336 -80 320
WIRE 48 368 48 352
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 48 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(5m 1m 1K)
FLAG -80 336 0
FLAG 192 192 +V
FLAG -80 224 +V
FLAG 16 112 0
FLAG 48 368 0
FLAG 192 288 0
FLAG 48 256 IN