* Z:\home\khalils\Downloads\files\data\raw_asc\d764f5dd7b0b_demo.asc
* Generated by LTspice 26.0.1 for Windows.
V1 0 N002 10
M1 N002 N005 N004 N004 NM1
M2 N002 N005 N006 N006 NM2
M3 N002 N005 N008 N008 NM1
XU1 N001 N004 0 N002 N003 LT1001 ;pnba In+)In-)V+)V-)OUT
L1 0 P001 .5
L2 0 N007 .5
L3 0 N009 .5
R1 N001 N003 1k
R2 N001 0 1k
V2 N005 0 PULSE(0 2 0 1 1 0 2)
V4 N007 N006 6.5
V5 N009 N008 7
V3 P001 N003 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 10mS 10S
.model NM1 NMOS(Rg=1 Rd=0 Rs=30 Vto=3 Kp=70)
.model NM2 NMOS(Rg=1 Rd=0 Rs=25 Vto=3 Kp=60)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 964 680
WIRE 384 -192 224 -192
WIRE 464 -192 384 -192
WIRE 576 -192 544 -192
WIRE 288 -144 -32 -144
WIRE 288 -128 288 -144
WIRE 224 -112 224 -192
WIRE 256 -112 224 -112
WIRE 384 -96 384 -112
WIRE 384 -96 320 -96
WIRE 400 -96 384 -96
WIRE 576 -96 544 -96
WIRE -32 -80 -32 -144
WIRE 128 -80 -32 -80
WIRE 256 -80 224 -80
WIRE 288 -48 288 -64
WIRE 240 -32 208 -32
WIRE -32 0 -32 -80
WIRE 128 0 -32 0
WIRE 368 0 224 0
WIRE 464 0 432 0
WIRE 576 0 544 0
WIRE 240 48 240 -32
WIRE 240 48 208 48
WIRE -32 80 -32 0
WIRE 128 80 -32 80
WIRE 336 80 224 80
WIRE 464 80 400 80
WIRE 576 80 544 80
WIRE 240 128 240 48
WIRE 240 128 208 128
WIRE 240 160 240 128
WIRE 240 256 240 240
FLAG -32 -208 0
FLAG 576 -96 0
FLAG 576 0 0
FLAG 576 80 0
FLAG 576 -192 0
FLAG 240 256 0
FLAG 288 -48 0
SYMBOL Misc/cell -32 -208 M0
WINDOW 0 24 8 Left 1
WINDOW 3 24 56 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL nmos 128 -32 R270
WINDOW 0 56 32 Left 1
WINDOW 3 56 72 Left 0
SYMATTR InstName M1
SYMATTR Value NM1
SYMBOL nmos 128 48 R270
WINDOW 0 56 32 Left 1
WINDOW 3 56 72 Left 0
SYMATTR InstName M2
SYMATTR Value NM2
SYMBOL nmos 128 128 R270
WINDOW 0 56 32 Left 1
WINDOW 3 56 72 Left 0
SYMATTR InstName M3
SYMATTR Value NM1
SYMBOL OpAmps/OP07 288 -32 M180
WINDOW 0 16 32 Left 1
SYMATTR InstName U1
SYMBOL ind 560 -112 R90
WINDOW 0 5 56 VBottom 1
WINDOW 3 32 56 VTop 0
SYMATTR InstName L1
SYMATTR Value .5
SYMBOL ind 560 -16 R90
WINDOW 0 5 56 VBottom 1
WINDOW 3 32 56 VTop 0
SYMATTR InstName L2
SYMATTR Value .5
SYMBOL ind 560 64 R90
WINDOW 0 5 56 VBottom 1
WINDOW 3 32 56 VTop 0
SYMATTR InstName L3
SYMATTR Value .5
SYMBOL res 368 -208 R0
WINDOW 0 36 40 Left 1
WINDOW 3 36 76 Left 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 448 -176 R270
WINDOW 0 32 56 VTop 1
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 240 144 R0
WINDOW 0 24 16 Left 1
WINDOW 3 24 96 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 0 1 1 0 2)
SYMBOL Misc/cell 432 0 R90
WINDOW 0 -32 32 VBottom 1
WINDOW 3 32 32 VTop 0
SYMATTR InstName V4
SYMATTR Value 6.5
SYMBOL Misc/cell 400 80 R90
WINDOW 0 -32 32 VBottom 1
WINDOW 3 32 32 VTop 0
SYMATTR InstName V5
SYMATTR Value 7
SYMBOL Misc/cell 464 -96 R90
WINDOW 0 -32 32 VBottom 1
WINDOW 3 32 32 VTop 0
SYMATTR InstName V3
SYMATTR Value 5
TEXT 384 216 Left 0 !.tran 10mS 10S
TEXT 352 160 Left 0 !.model NM1 NMOS(Rg=1 Rd=0 Rs=30 Vto=3 Kp=70)
TEXT 352 184 Left 0 !.model NM2 NMOS(Rg=1 Rd=0 Rs=25 Vto=3 Kp=60)