Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1636.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1636.asy)
V5 N001 0 2.5
V6 N003 0 3.3
V1 +V 0 5
V4 N004 0 PULSE(0 5 0 20n 20n 10u 20u)
XU1 N004 N001 N002 N003 N005 -V 0 +V ADG1636 ;pnba IN)SA)D)SB)EN)Vss)GND)Vdd
C1 N002 0 35p
V3 N005 0 5
R1 N002 0 300
V2 -V 0 -5
.tran 120u
.lib ADG1636.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -800 -320 -800 -336
WIRE -1024 -256 -1040 -256
WIRE -896 -256 -944 -256
WIRE -640 -224 -704 -224
WIRE -560 -224 -640 -224
WIRE -1104 -192 -1136 -192
WIRE -896 -192 -1024 -192
WIRE -640 -192 -640 -224
WIRE -560 -176 -560 -224
WIRE -1344 -144 -1344 -160
WIRE -1232 -144 -1232 -160
WIRE -896 -128 -1072 -128
WIRE -640 -96 -640 -112
WIRE -560 -96 -560 -112
WIRE -896 -64 -992 -64
WIRE -1344 -48 -1344 -64
WIRE -1232 -48 -1232 -64
WIRE -1072 -48 -1072 -128
WIRE -992 -48 -992 -64
WIRE -864 0 -864 -16
WIRE -736 0 -736 -16
WIRE -1072 48 -1072 32
WIRE -992 48 -992 32
SYMBOL voltage -1344 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -1232 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -1072 -64 M0
WINDOW 3 412 79 Right 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V4
SYMBOL voltage -928 -256 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 2.5
SYMBOL cap -576 -176 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL voltage -1008 -192 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 3.3
SYMBOL ADG1636 -800 -176 R0
SYMATTR InstName U1
SYMBOL voltage -992 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res -656 -208 R0
SYMATTR InstName R1
SYMATTR Value 300
FLAG -1344 -48 0
FLAG -1232 -48 0
FLAG -1232 -160 +V
FLAG -1344 -160 -V
FLAG -1072 48 0
FLAG -1040 -256 0
FLAG -1136 -192 0
FLAG -800 -336 +V
FLAG -736 0 0
FLAG -864 0 -V
FLAG -992 48 0
FLAG -640 -96 0
FLAG -560 -96 0
TEXT -1488 40 Left 2 !.tran 120u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1763-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1763-2.5.asy)
C1 OUT 0 10
V1 IN 0 PWL(0 0 1 10)
C2 OUT N001 .01
Rload OUT 0 500
XU1 OUT OUT 0 N001 IN MP_01 MP_02 IN LT1763-2.5 ;pnba OUT)Sense)GND)BYP)_SHDN)))IN
.tran 1
.lib LT1763.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 32 304 32
WIRE 352 32 320 32
WIRE 432 32 352 32
WIRE 528 32 432 32
WIRE 0 48 -208 48
WIRE 16 48 0 48
WIRE 432 48 432 32
WIRE 528 48 528 32
WIRE -208 64 -208 48
WIRE 352 64 352 32
WIRE 320 96 320 32
WIRE 320 96 304 96
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 432 144 432 112
WIRE 528 144 528 128
WIRE -208 160 -208 144
WIRE 352 160 352 128
WIRE 352 160 304 160
WIRE 160 240 160 208
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 336 64 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL cap 416 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT1763-2.5 160 96 R0
SYMATTR InstName U1
FLAG -208 160 0
FLAG 432 144 0
FLAG 528 144 0
FLAG 160 240 0
FLAG -208 48 IN
FLAG 528 32 OUT
TEXT 384 216 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\22ba57e37557_transmission_char.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 1
V2 g 0 1
M1 d g 0 0 NMOS l=32e-9 w=320e-9 ad=51200e-18 as=51200e-18 pd=960e-9 ps=960e-9
R1 N001 d 1e3
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 0 2.5 1e-2 V1 0 2 0.4
.inc 32nm_bulk.pm
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 480 -16 192 -16
WIRE 480 48 480 -16
WIRE 192 112 192 64
WIRE 192 144 192 112
WIRE 240 192 192 192
WIRE 96 224 0 224
WIRE 144 224 96 224
WIRE 192 304 192 240
WIRE 192 304 0 304
WIRE 240 304 240 192
WIRE 240 304 192 304
WIRE 336 304 240 304
WIRE 480 304 480 128
WIRE 480 304 336 304
WIRE 336 352 336 304
SYMBOL res 176 -32 R0
SYMATTR InstName R1
SYMATTR Value 1e3
SYMBOL nmos4 144 144 R0
SYMATTR InstName M1
SYMATTR Value2 l=32e-9 w=320e-9 ad=51200e-18 as=51200e-18 pd=960e-9 ps=960e-9
SYMBOL voltage 0 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL voltage 480 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1
FLAG 336 352 0
FLAG 192 112 d
FLAG 96 224 g
TEXT -32 376 Left 2 !.dc V2 0 2.5 1e-2 V1 0 2 0.4
TEXT -40 416 Left 2 !.inc 32nm_bulk.pm
* Z:\home\khalils\Downloads\files\data\raw_asc\31f4e01978ce_Fig_2-70_AC_BI-Source.asc
* Generated by LTspice 26.0.1 for Windows.
R1 IN C1 1
C1 C1 0 20n
B1 0 Nor I=I(R1)
V1 IN 0 AC 1
R2 Nor 0 1
.ac dec 1000 10K 100Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1612 884
WIRE 304 256 256 256
WIRE 336 256 304 256
WIRE 464 256 416 256
WIRE 496 256 464 256
WIRE 832 256 672 256
WIRE 864 256 832 256
WIRE 256 272 256 256
WIRE 496 272 496 256
WIRE 672 272 672 256
WIRE 832 272 832 256
WIRE 256 368 256 352
WIRE 496 368 496 336
WIRE 672 368 672 352
WIRE 832 368 832 352
SYMBOL voltage 256 256 R0
WINDOW 123 22 97 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMATTR InstName V1
SYMBOL res 320 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL cap 480 272 R0
SYMATTR InstName C1
SYMATTR Value 20n
SYMBOL res 816 256 R0
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL bi 672 352 R180
WINDOW 0 24 80 Left 2
WINDOW 3 -113 -1 Left 2
SYMATTR InstName B1
SYMATTR Value I=I(R1)
FLAG 496 368 0
FLAG 256 368 0
FLAG 304 256 IN
FLAG 464 256 C1
FLAG 672 368 0
FLAG 864 256 Nor
FLAG 832 368 0
TEXT 440 208 Left 2 !.ac dec 1000 10K 100Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3073.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3073.asy)
XU1 IN 0 NC_01 NC_02 N003 N004 OUT N001 NC_03 OUT 0 IN N005 NC_04 0 N002 LT3073 TA=25 Rth=42 single=1 module=0 ;pnba EN)Vo0)Vo1)Vo2)PG)VIOC)OUT)BIAS)TEMP)SENSE)GND)IN)REF)MARG)IMON)BIASF
C4 N005 0 4.7
V1 N001 0 5
R2 OUT 0 4.8
C2 OUT 0 10 Rser=2m
C1 N002 0 4.7
C3 P001 0 20p
I3 OUT 0 PULSE(0 2.77 5m 1u 1u 1m 2m)
R1 OUT N003 499k
R3 N004 P001 40.2k
V2 IN 0 1.65
.tran 10m startup
.lib LT3073.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1988 1632
WIRE 208 1008 -128 1008
WIRE 480 1008 336 1008
WIRE 592 1008 544 1008
WIRE -128 1040 -128 1008
WIRE 208 1040 208 1008
WIRE 336 1040 336 1008
WIRE 80 1104 -32 1104
WIRE 96 1104 80 1104
WIRE 528 1104 448 1104
WIRE 672 1104 608 1104
WIRE -32 1120 -32 1104
WIRE -128 1136 -128 1120
WIRE 80 1168 80 1104
WIRE 96 1168 80 1168
WIRE 560 1168 448 1168
WIRE -32 1216 -32 1200
WIRE 96 1232 80 1232
WIRE 560 1232 560 1168
WIRE 560 1232 448 1232
WIRE 672 1232 672 1104
WIRE 672 1232 560 1232
WIRE 784 1232 672 1232
WIRE 560 1248 560 1232
WIRE 672 1248 672 1232
WIRE 784 1248 784 1232
WIRE 560 1328 560 1312
WIRE 672 1344 672 1328
WIRE 784 1344 784 1328
WIRE 464 1360 448 1360
WIRE 96 1424 64 1424
WIRE 480 1424 448 1424
WIRE 560 1424 544 1424
WIRE 208 1504 208 1488
SYMBOL res 80 1408 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 40.2k
SYMBOL voltage -32 1104 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.65
SYMBOL cap -16 1408 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 39 53 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 20p
SYMBOL LT3073 272 1216 R0
SYMATTR InstName U1
SYMBOL cap 480 1440 R270
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 39 53 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 4.7
SYMBOL res 656 1232 R0
SYMATTR InstName R2
SYMATTR Value 4.8
SYMBOL cap 480 1024 R270
WINDOW 3 0 32 VBottom 2
WINDOW 0 32 32 VTop 2
SYMATTR Value 4.7
SYMATTR InstName C1
SYMBOL current 784 1248 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I3
SYMATTR Value PULSE(0 2.77 5m 1u 1u 1m 2m)
SYMBOL res 624 1088 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 499k
SYMBOL cap 544 1248 R0
WINDOW 3 26 56 Left 2
SYMATTR Value 10
SYMATTR InstName C2
SYMATTR SpiceLine Rser=2m
SYMBOL voltage -128 1024 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 208 1504 0
FLAG -80 1424 0
FLAG 80 1232 0
FLAG -32 1216 0
FLAG -32 1104 IN
FLAG -128 1136 0
FLAG 560 1328 0
FLAG 672 1344 0
FLAG 784 1232 OUT
FLAG 784 1344 0
FLAG 464 1360 0
FLAG 560 1424 0
FLAG 592 1008 0
TEXT 880 1416 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1aeeef0a64c3_VNH_Current_sense.asc
* Generated by LTspice 26.0.1 for Windows.
C2 VNH_CS2 0 10n
R1 N002 VNH_CS 10K
C1 VNH_CS 0 10n
V1 N004 0 PULSE(0 630mV 0 0 0 0.01ms 0.05ms)
I1 0 N003 PULSE(0 1mA 0 0 0 0.1ms 1ms)
R3 N004 VNH_CS2 10K
S1 N003 N002 N001 0 MySwitch
R2 0 N002 680
V2 N001 0 PULSE(0 1 0 0 0 0.1ms 1ms)
.tran 0 0.002 0
.model MySwitch SW(Ron=0.0001 Roff=10Meg Vt=0 Vh=0 Lser=0 Vser=0)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1436 680
WIRE 320 -32 320 -64
WIRE 320 64 320 48
WIRE 32 112 -80 112
WIRE 48 112 32 112
WIRE 224 112 128 112
WIRE 304 112 224 112
WIRE 448 112 384 112
WIRE 560 112 528 112
WIRE 32 160 32 112
WIRE 224 160 224 112
WIRE 32 256 32 224
WIRE 224 256 224 240
WIRE 560 256 560 112
WIRE 32 448 -48 448
WIRE 48 448 32 448
WIRE 192 448 128 448
WIRE 32 480 32 448
WIRE 32 560 32 544
WIRE 192 560 192 528
SYMBOL cap 16 480 R0
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 144 432 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL sw 400 112 R90
SYMATTR InstName S1
SYMATTR Value MySwitch
SYMBOL res 144 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 192 432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 630mV 0 0 0 0.01ms 0.05ms)
SYMBOL res 240 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 680
SYMBOL voltage 320 64 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 0 0 0 0.1ms 1ms)
SYMBOL cap 16 160 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL current 528 112 R90
WINDOW 0 -32 40 VBottom 2
WINDOW 3 32 40 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value PULSE(0 1mA 0 0 0 0.1ms 1ms)
FLAG 32 256 0
FLAG 224 256 0
FLAG -80 112 VNH_CS
FLAG 32 560 0
FLAG 192 560 0
FLAG -48 448 VNH_CS2
FLAG 560 256 0
FLAG 368 64 0
FLAG 320 -64 0
TEXT -24 352 Left 2 !.tran 0 0.002 0
TEXT 560 40 Left 2 !.model MySwitch SW(Ron=0.0001 Roff=10Meg Vt=0 Vh=0 Lser=0 Vser=0)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1706-81.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1706-81.asy)
G1 0 OUT N007 N004 100m
V1 N001 0 3.3
V7 N008 0 PULSE(0 2.4 0 1n 1n 8m 16m)
C1 OUT 0 .1
V5 N005 0 PULSE(0 2.4 0 1n 1n 2m 4m)
V2 N007 0 .8
V4 N003 0 PULSE(0 2.4 0 1n 1n 1m 2m)
V6 N006 0 PULSE(0 2.4 0 1n 1n 4m 8m)
V3 N002 0 PULSE(0 2.4 0 1n 1n .5m 1m)
XU1 N005 N006 N001 0 N004 OUT N002 N003 N008 LTC1706-81 ;pnba VID2)VID3)Vcc)GND)FB)Sense)VID0)VID1)VID4
.tran 16m
.lib LTC1706-81.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2536 1332
WIRE 944 736 864 736
WIRE 1328 736 944 736
WIRE 864 752 864 736
WIRE 1168 784 1008 784
WIRE 1008 800 1008 784
WIRE 1168 816 1168 784
WIRE 1328 816 1328 736
WIRE 864 832 864 816
WIRE 1856 880 1392 880
WIRE 1008 896 1008 880
WIRE 1856 896 1856 880
WIRE 1744 928 1392 928
WIRE 1744 960 1744 928
WIRE 1104 976 992 976
WIRE 1632 976 1392 976
WIRE 944 992 944 736
WIRE 1856 992 1856 976
WIRE 992 1008 992 976
WIRE 1632 1008 1632 976
WIRE 1536 1024 1392 1024
WIRE 1536 1056 1536 1024
WIRE 1744 1056 1744 1040
WIRE 992 1072 992 1056
WIRE 1440 1072 1392 1072
WIRE 1632 1104 1632 1088
WIRE 1440 1120 1440 1072
WIRE 1248 1136 1248 1120
WIRE 1536 1152 1536 1136
WIRE 944 1168 944 1072
WIRE 992 1168 992 1152
WIRE 1440 1216 1440 1200
SYMBOL voltage 1536 1040 R0
SYMATTR InstName V6
SYMATTR Value PULSE(0 2.4 0 1n 1n 4m 8m)
SYMBOL voltage 1856 880 R0
SYMATTR InstName V3
SYMATTR Value PULSE(0 2.4 0 1n 1n .5m 1m)
SYMBOL voltage 1632 992 R0
SYMATTR InstName V5
SYMATTR Value PULSE(0 2.4 0 1n 1n 2m 4m)
SYMBOL voltage 1440 1104 R0
SYMATTR InstName V7
SYMATTR Value PULSE(0 2.4 0 1n 1n 8m 16m)
SYMBOL voltage 992 1056 R0
SYMATTR InstName V2
SYMATTR Value .8
SYMBOL PowerProducts\\LTC1706-81 1248 976 R0
SYMATTR InstName U1
SYMBOL voltage 1744 944 R0
SYMATTR InstName V4
SYMATTR Value PULSE(0 2.4 0 1n 1n 1m 2m)
SYMBOL g2 944 976 M0
SYMATTR InstName G1
SYMATTR Value 100m
SYMBOL cap 848 752 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage 1008 784 R0
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG 1008 896 0
FLAG 1248 1136 0
FLAG 992 1168 0
FLAG 944 1168 0
FLAG 1856 992 0
FLAG 1744 1056 0
FLAG 1632 1104 0
FLAG 1536 1152 0
FLAG 864 832 0
FLAG 864 736 OUT
FLAG 1440 1216 0
TEXT 1896 1192 Left 2 !.tran 16m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8063.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8063.asy)
R2 N001 0 45.3K
R1 N004 0 27.4K
C1 OUT 0 22
Rload OUT 0 2.5
C2 N003 0 1n
XU1 MP_01 OUT MP_02 N004 NC_03 N001 N003 N002 IN IN 0 LTM8063 ;pnba )Vout))Rt)Sync)FB)TR/SS)PG)Vin)Run)GND
R3 N002 OUT 50K
V1 IN 0 12
.tran 750u startup
.lib LTM8063.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1192 680
WIRE 80 32 -48 32
WIRE 96 32 80 32
WIRE 496 32 352 32
WIRE 544 32 496 32
WIRE 640 32 544 32
WIRE -48 48 -48 32
WIRE 544 48 544 32
WIRE 640 48 640 32
WIRE 80 128 80 32
WIRE 96 128 80 128
WIRE 368 128 352 128
WIRE 464 128 448 128
WIRE -48 144 -48 128
WIRE 544 144 544 112
WIRE 640 144 640 128
WIRE 368 224 352 224
WIRE 496 224 496 32
WIRE 496 224 448 224
WIRE 16 320 0 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 464 320 448 320
WIRE 224 384 224 368
SYMBOL res 624 32 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL voltage -48 32 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 528 48 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 352 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 50K
SYMBOL PowerProducts\\LTM8063 224 176 R0
SYMATTR InstName U1
SYMBOL res 352 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 45.3K
SYMBOL res 352 336 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 27.4K
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
FLAG -48 144 0
FLAG 224 384 0
FLAG 464 128 0
FLAG 544 144 0
FLAG 464 320 0
FLAG 640 144 0
FLAG -48 32 IN
FLAG 640 32 OUT
FLAG 0 320 0
TEXT 544 296 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\24b805479d29_Bridge_Rectifier_Circuit.asc
* Generated by LTspice 26.0.1 for Windows.
D4 0 N001 D
D2 N003 N002 D
D1 N001 N002 D
D3 0 N003 D
V1 N001 N003 SINE(0 24 60 0)
R1 N002 0 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 0 64 0
WIRE 320 0 256 0
WIRE 448 0 384 0
WIRE 608 0 448 0
WIRE 256 64 256 0
WIRE 448 64 448 0
WIRE 64 80 64 0
WIRE 608 144 608 0
WIRE 256 192 256 128
WIRE 256 192 192 192
WIRE 320 192 256 192
WIRE 448 192 448 128
WIRE 448 192 384 192
WIRE 192 240 192 192
WIRE 64 288 64 160
WIRE 448 288 448 192
WIRE 448 288 64 288
SYMBOL diode 320 208 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D3
SYMBOL diode 272 128 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMBOL diode 464 128 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMBOL res 592 128 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 320 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL voltage 64 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 24 60 0)
FLAG 192 240 0
FLAG 608 224 0
TEXT 24 296 Left 2 !.tran 100m
* Z:\tmp\asc_dec_bjh7r6w2\19ef61a8593d_Draft14_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 VCC2 N001 15
V4 N001 0 50
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1688 680
WIRE 16 336 -192 336
SYMBOL voltage -192 240 R0
WINDOW 0 54 29 Left 2
WINDOW 3 50 56 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -192 320 R0
WINDOW 0 54 29 Left 2
WINDOW 3 50 56 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 50
FLAG -192 416 0
FLAG -192 256 VCC2
FLAG 0 112 VEE2
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1844-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1844-1.8.asy)
V1 IN 0 PWL(0 0 1 6.5)
XU1 IN 0 IN OUT LTC1844-1.8 ;pnba IN)GND)_SHDN)OUT
R1 OUT 0 12
C1 OUT 0 1
.tran 1
.lib LTC1844-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1940 1316
WIRE 64 80 -32 80
WIRE 80 80 64 80
WIRE 432 80 368 80
WIRE 528 80 432 80
WIRE -32 96 -32 80
WIRE 528 96 528 80
WIRE 432 112 432 80
WIRE -32 192 -32 176
WIRE 432 192 432 176
WIRE 528 192 528 176
WIRE 64 240 64 80
WIRE 80 240 64 240
WIRE 224 304 224 288
SYMBOL cap 416 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -32 80 R0
WINDOW 3 -89 162 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 6.5)
SYMBOL LTC1844-1.8 224 160 R0
SYMATTR InstName U1
SYMBOL res 512 80 R0
SYMATTR InstName R1
SYMATTR Value 12
FLAG 224 304 0
FLAG -32 192 0
FLAG 528 192 0
FLAG 528 80 OUT
FLAG -32 80 IN
FLAG 432 192 0
TEXT 184 368 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\2e425a585fa0_PT2_selfmade.asc
* Generated by LTspice 26.0.1 for Windows.
* PT2 test
L1 N003 N002 {L}
G2 0 2 N003 0 1
R1 0 N001 1
G1 0 N001 1 0 {k}
R3 N002 N001 {R}
C1 N003 0 {C}
R2 2 0 1
.param L=1
.param C={T**2/L}
.param R={2*d*sqrt(L*C)/C+L}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1168 680
WIRE 352 112 272 112
WIRE 512 112 400 112
WIRE 544 112 512 112
WIRE 656 112 624 112
WIRE 784 112 736 112
WIRE 880 112 784 112
WIRE 1008 112 928 112
WIRE 1104 112 1008 112
WIRE 1120 112 1104 112
WIRE 400 128 400 112
WIRE 928 128 928 112
WIRE 352 144 352 112
WIRE 512 144 512 112
WIRE 784 144 784 112
WIRE 880 144 880 112
WIRE 1008 160 1008 112
WIRE 352 224 352 192
WIRE 400 224 400 208
WIRE 400 224 352 224
WIRE 512 224 512 208
WIRE 880 224 880 192
WIRE 928 224 928 208
WIRE 928 224 880 224
WIRE 400 256 400 224
WIRE 512 256 512 224
WIRE 784 256 784 208
WIRE 928 256 928 224
WIRE 1008 256 1008 240
IOPIN 272 112 In
IOPIN 1104 112 Out
RECTANGLE Normal 1072 368 312 40 2
SYMBOL g 400 112 R0
WINDOW 3 11 101 Left 2
SYMATTR Value {k}
SYMATTR InstName G1
SYMBOL cap 768 144 R0
WINDOW 3 25 58 Left 2
SYMATTR Value {C}
SYMATTR InstName C1
SYMBOL res 528 240 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL ind 752 96 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value {L}
SYMBOL res 640 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value {R}
SYMBOL g 928 112 R0
SYMATTR InstName G2
SYMATTR Value 1
SYMBOL res 992 144 R0
SYMATTR InstName R2
SYMATTR Value 1
FLAG 400 256 0
FLAG 928 256 0
FLAG 512 256 0
FLAG 1008 256 0
FLAG 784 256 0
FLAG 272 112 1
FLAG 1104 112 2
TEXT 664 64 Left 2 ;PT2 test
TEXT 528 232 Left 2 !.param L=1\n.param C={T**2/L}\n.param R={2*d*sqrt(L*C)/C+L}
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1235.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1235.asy)
R3 IN N007 10K
Rload OUT 0 1K
V4 IN N005 PWL(0 0 0.5 0 +1u 5 +9m 5 +1u 0 0.7 0 +1u 5 +43m 5 +1u 0)
XU1 N001 OUT IN 0 NC_01 NC_02 N005 N007 NC_03 N006 N004 NC_04 NC_05 N003 N002 NC_06 LTC1235 ;pnba Vbatt)Vout)Vcc)GND)Batt_On)_Low_Line)_PB_RST)Backup)PFI)_PFO)WDI)_CE Out)_CE In)_WDO)_Reset)Reset
V2 N001 0 3 Rser=10m
C1 OUT 0 0.22
R1 IN N002 10K
V1 IN 0 PWL(0 0 25u 5 0.23 5 +50u 2 +25m 2 +50u 5) Rser=10m
V3 N004 0 PULSE(0 2 0 1u 1u 20m 40m) Rser=0.1
R2 IN N006 10K
.tran 1
.lib LTC1235.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1152 680
WIRE 976 -304 -784 -304
WIRE -288 -144 -336 -144
WIRE -176 -144 -224 -144
WIRE -32 -128 -64 -128
WIRE 80 -128 48 -128
WIRE -288 -48 -336 -48
WIRE -176 -48 -176 -144
WIRE -176 -48 -208 -48
WIRE -128 -48 -176 -48
WIRE 80 -48 -128 -48
WIRE 576 -48 528 -48
WIRE 976 -48 976 -304
WIRE 976 -48 656 -48
WIRE -784 32 -784 -304
WIRE -784 32 -1360 32
WIRE -672 32 -784 32
WIRE 80 32 -672 32
WIRE 544 32 528 32
WIRE -1360 48 -1360 32
WIRE 80 112 48 112
WIRE 976 128 976 -48
WIRE -1360 144 -1360 128
WIRE -672 224 -672 32
WIRE 736 272 528 272
WIRE 848 272 816 272
WIRE -784 288 -784 32
WIRE -672 352 -672 304
WIRE 80 352 -672 352
WIRE 976 352 976 208
WIRE 976 352 528 352
WIRE -784 432 -784 368
WIRE 80 432 -784 432
SYMBOL VOLTAGE 64 -128 R90
WINDOW 123 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value 3
SYMATTR SpiceLine Rser=10m
SYMBOL res 672 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res -192 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL res 960 112 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL VOLTAGE 720 272 R270
WINDOW 123 -53 56 VBottom 2
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 2 0 1u 1u 20m 40m)
SYMATTR SpiceLine Rser=0.1
SYMBOL LTC1235 304 160 R0
SYMATTR InstName U1
SYMBOL res -800 272 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL VOLTAGE -1360 32 R0
WINDOW 123 24 117 Left 2
SYMATTR Value PWL(0 0 25u 5 0.23 5 +50u 2 +25m 2 +50u 5)
SYMATTR InstName V1
SYMATTR SpiceLine Rser=10m
SYMBOL cap -224 -160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.22
SYMBOL voltage -672 208 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V4
SYMATTR Value PWL(0 0 0.5 0 +1u 5 +9m 5 +1u 0 0.7 0 +1u 5 +43m 5 +1u 0)
FLAG 48 112 0
FLAG -128 -48 OUT
FLAG -1360 144 0
FLAG -64 -128 0
FLAG -336 -48 0
FLAG 848 272 0
FLAG -336 -144 0
FLAG -1360 32 IN
TEXT 792 456 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP172-0.9.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP172-0.9.asy)
C1 OUT 0 1
XU1 OUT IN IN 0 ADP172-0.9 ;pnba Vout)Vin)En)GND
RLOAD OUT 0 3
V1 IN 0 3.6
.tran 2m startup
.lib ADP172-0.9.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 80 -48 80
WIRE 48 80 -32 80
WIRE 64 80 48 80
WIRE 304 80 256 80
WIRE 336 80 304 80
WIRE 384 80 336 80
WIRE -48 96 -48 80
WIRE 304 96 304 80
WIRE 304 176 304 160
WIRE 384 176 384 160
WIRE -48 192 -48 176
WIRE 48 192 48 80
WIRE 64 192 48 192
WIRE 272 192 256 192
SYMBOL res 368 64 R0
SYMATTR InstName RLOAD
SYMATTR Value 3
SYMBOL cap 288 96 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -48 80 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL ADP172-0.9 160 192 R0
SYMATTR InstName U1
FLAG -48 192 0
FLAG 304 176 0
FLAG 272 192 0
FLAG 384 176 0
FLAG -32 80 IN
FLAG 336 80 OUT
TEXT 160 256 Center 2 !.tran 2m startup