* Z:\home\khalils\Downloads\files\data\raw_asc\67b386417a54_TIA_ltc6241.asc
* Generated by LTspice 26.0.1 for Windows.
* .include myopamp.abc
* .tran 0 1m 0 10n
* .noise V(out) I1 dec 100 1 1e6
* 1. Choose a value for R1 to get the highest signal voltage.\n2. Choose a low noise opamp with enough GBW\n3. Adjust C1 for flat frequency or pulse response (.AC and .TRAN)\n4. Run a noise analysis (.NOISE) over the BW of interest\nPlot V(onoise), Ctrl-LeftMouseButton on the plot label to get \nRMS-noise. Watch the noise peaking caused by the \ncapacitance at the amplifier input.\n \nRepeat steps 2 to 4 until it exceeds the requirement.\n \n(Optionally a DC-value in source I1 can be set to get shot noise,\nbut this effect can be neglected in the actual circuit design.)
* universalopamp2.asy
* PHOTO DIODE WITH TRANSIMPEDANCE AMPLIFIER
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6241.asy)
Rload out 0 10k
R2 N001 out 20
Ccable in 0 100p
I1 in 0 PULSE(0u 1u 10u 100n 100n 100u 200u) AC 1
D1 0 in DP
Rsh in 0 10Meg
Cload out 0 10p
V2 VEE 0 -2.5
C1 in N001 35n
V1 VCC 0 2.5
XU1 0 in VCC VEE out LTC6241 ;pnba IN+)IN-)VCC)VEE)OUT
R1 in out 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.options plotwinsize=0
.ac dec 100 1k 1e7
.model DP D(Is=1e-7 Cjo=10u Rs=.10)
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 680
WIRE 160 -16 112 -16
WIRE 272 -16 224 -16
WIRE 272 0 272 -16
WIRE 448 48 448 16
WIRE 576 48 576 16
WIRE -256 112 -384 112
WIRE -160 112 -256 112
WIRE -48 112 -160 112
WIRE 112 112 112 -16
WIRE 112 112 -48 112
WIRE 160 112 112 112
WIRE 272 112 272 80
WIRE 272 112 240 112
WIRE 448 160 448 128
WIRE 576 160 576 128
WIRE -256 192 -256 112
WIRE -176 192 -256 192
WIRE -384 224 -384 112
WIRE -176 224 -176 192
WIRE -48 224 -48 112
WIRE -256 240 -256 192
WIRE 208 240 208 224
WIRE 112 256 112 112
WIRE 176 256 112 256
WIRE 272 272 272 112
WIRE 272 272 240 272
WIRE 432 272 272 272
WIRE 528 272 432 272
WIRE 624 272 528 272
WIRE 176 288 112 288
WIRE 528 288 528 272
WIRE 432 304 432 272
WIRE 208 320 208 304
WIRE -256 336 -256 304
WIRE -176 336 -176 304
WIRE -176 336 -256 336
WIRE -384 368 -384 304
WIRE -256 368 -256 336
WIRE -48 368 -48 288
WIRE 112 368 112 288
WIRE 432 400 432 368
WIRE 528 400 528 368
SYMBOL voltage 448 32 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 512 272 R0
SYMATTR InstName Rload
SYMATTR Value 10k
SYMBOL diode -272 304 M180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D1
SYMATTR Value DP
SYMBOL res 144 128 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL cap 416 304 R0
SYMATTR InstName Cload
SYMATTR Value 10p
SYMBOL res -192 208 R0
SYMATTR InstName Rsh
SYMATTR Value 10meg
SYMBOL current -384 224 R0
WINDOW 3 -31 195 Left 0
WINDOW 123 24 116 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0u 1u 10u 100n 100n 100u 200u)
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMBOL voltage 576 32 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL Opamps\\LTC6241 208 272 R0
SYMATTR InstName U1
SYMBOL res 256 -16 R0
SYMATTR InstName R2
SYMATTR Value 20
SYMBOL cap -64 224 R0
SYMATTR InstName Ccable
SYMATTR Value 100p
SYMBOL cap 160 0 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName C1
SYMATTR Value 35n
FLAG 112 368 0
FLAG 208 224 VCC
FLAG 448 160 0
FLAG 448 16 VCC
FLAG -48 368 0
FLAG -256 368 0
FLAG -384 368 0
FLAG 432 400 0
FLAG 624 272 out
FLAG 208 320 VEE
FLAG 528 400 0
FLAG 576 160 0
FLAG 576 16 VEE
FLAG -160 112 in
TEXT -400 -264 Left 0 ;.include myopamp.abc
TEXT -400 -160 Left 0 ;.tran 0 1m 0 10n
TEXT -400 -136 Left 0 !.options plotwinsize=0
TEXT -400 -200 Left 0 !.ac dec 100 1k 1e7
TEXT -400 -88 Left 0 ;.noise V(out) I1 dec 100 1 1e6
TEXT -408 -32 Left 0 !.model DP D(Is=1e-7 Cjo=10u Rs=.10)
TEXT -8 -392 Left 0 ;1. Choose a value for R1 to get the highest signal voltage.\n2. Choose a low noise opamp with enough GBW\n3. Adjust C1 for flat frequency or pulse response (.AC and .TRAN)\n4. Run a noise analysis (.NOISE) over the BW of interest\nPlot V(onoise), Ctrl-LeftMouseButton on the plot label to get \nRMS-noise. Watch the noise peaking caused by the \ncapacitance at the amplifier input.\n \nRepeat steps 2 to 4 until it exceeds the requirement.\n \n(Optionally a DC-value in source I1 can be set to get shot noise,\nbut this effect can be neglected in the actual circuit design.)
TEXT 72 408 Left 0 ;universalopamp2.asy
TEXT -416 -448 Left 0 ;PHOTO DIODE WITH TRANSIMPEDANCE AMPLIFIER