Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\51ef478ff13e_supply-protection.asc
* Generated by LTspice 26.0.1 for Windows.
* As power supply DC voltage is used.\nAC source is applied only for simulation\nto figure out when the circuit conducts.
RL OUT 0 10
Q1 N003 N002 N001 0 2SB1198K
M2 OUT N003 N001 N001 Si7143DP
D2 N003 N001 KDZ12B
VS IN 0 SINE(0 20 1)
R3 N002 N004 10K
R1 N003 0 10K
M1 IN N003 N001 N001 Si7143DP
D1 0 N004 KDZ12B
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1012 680
WIRE 48 112 -144 112
WIRE 256 112 144 112
WIRE 384 112 256 112
WIRE 496 112 384 112
WIRE 720 112 592 112
WIRE -144 144 -144 112
WIRE 256 144 256 112
WIRE 384 144 384 112
WIRE 720 144 720 112
WIRE 352 192 320 192
WIRE -144 240 -144 224
WIRE 720 240 720 224
WIRE 128 256 128 160
WIRE 256 256 256 240
WIRE 256 256 128 256
WIRE 384 256 384 208
WIRE 384 256 256 256
WIRE 512 256 512 160
WIRE 512 256 384 256
WIRE 256 272 256 256
WIRE 352 272 352 192
WIRE 352 368 352 352
WIRE 256 448 256 352
WIRE 352 448 352 432
SYMBOL pnp 320 240 R180
WINDOW 0 65 79 Left 2
WINDOW 3 65 46 Left 2
SYMATTR InstName Q1
SYMATTR Value 2SB1198K
SYMBOL pmos 48 160 R270
WINDOW 0 65 32 VLeft 2
WINDOW 3 64 50 VRight 2
SYMATTR InstName M1
SYMATTR Value Si7143DP
SYMBOL res 704 128 R0
SYMATTR InstName RL
SYMATTR Value 10
SYMBOL pmos 592 160 M270
WINDOW 0 65 66 VRight 2
WINDOW 3 65 45 VLeft 2
SYMATTR InstName M2
SYMATTR Value Si7143DP
SYMBOL zener 368 432 R180
WINDOW 0 -10 46 Right 2
WINDOW 3 -9 20 Right 2
SYMATTR InstName D1
SYMATTR Value KDZ12B
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 240 256 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 336 256 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL voltage -144 128 R0
WINDOW 0 41 44 Left 2
WINDOW 3 38 72 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value SINE(0 20 1)
SYMBOL zener 400 208 R180
WINDOW 0 -12 44 Right 2
WINDOW 3 -12 18 Right 2
SYMATTR InstName D2
SYMATTR Value KDZ12B
SYMATTR Description Diode
SYMATTR Type diode
FLAG 256 448 0
FLAG 720 240 0
FLAG -144 240 0
FLAG 352 448 0
FLAG 720 112 OUT
FLAG -144 112 IN
TEXT -242 408 Left 2 !.tran 1
TEXT -240 304 Left 2 ;As power supply DC voltage is used.\nAC source is applied only for simulation\nto figure out when the circuit conducts.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6658-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6658-1.2.asy)
C3 OUT1 0 1
XU1 IN IN IN IN N001 OUT1 OUT1 OUT2 OUT2 0 N002 LT6658-1.2 ;pnba Vin)Vin1)Vin2)_OD)Bypass)Vout1_F)Vout1_S)Vout2_F)Vout2_S)Gnd)NR
C1 N001 0 1
C2 OUT2 0 1
V3 IN 0 PWL(0 0 100u 0 +2u 4.5)
.tran 500u
.lib LT6658.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1448 1048
WIRE 16 -32 -336 -32
WIRE 128 -32 16 -32
WIRE 224 -32 128 -32
WIRE 320 -32 224 -32
WIRE -336 0 -336 -32
WIRE 128 0 128 -32
WIRE 224 0 224 -32
WIRE 320 0 320 -32
WIRE 432 64 416 64
WIRE 496 64 432 64
WIRE 496 80 496 64
WIRE -336 96 -336 80
WIRE 432 144 432 64
WIRE 432 144 416 144
WIRE 496 160 496 144
WIRE 16 192 16 -32
WIRE 48 192 16 192
WIRE 432 224 416 224
WIRE 480 224 432 224
WIRE 480 240 480 224
WIRE 432 304 432 224
WIRE 432 304 416 304
WIRE 480 320 480 304
WIRE 128 400 128 384
WIRE 224 400 224 384
WIRE 320 400 320 384
WIRE 224 480 224 464
SYMBOL LT6658-1.2 224 192 R0
SYMATTR InstName U1
SYMBOL cap 480 80 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL voltage -336 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 0 100u 0 +2u 4.5)
SYMBOL cap 464 240 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 208 400 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 128 400 0
FLAG 224 480 0
FLAG -336 96 0
FLAG 496 160 0
FLAG 480 320 0
FLAG -336 -32 IN
FLAG 496 64 OUT2
FLAG 480 224 OUT1
TEXT 464 464 Left 2 !.tran 500u
* Z:\home\khalils\Downloads\files\data\raw_asc\1a8a19a0847b_op_amp_intro.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R2 Vo N002 5k
XU1 0 N002 N001 N003 Vo level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R1 N002 Vin 1k
V1 Vin 0 SINE(0 5 60)
Vpp N001 0 100V
Vpn N003 0 -100V
.tran 0 0.5 0 .01
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 -48 -272 -48
WIRE 128 32 96 32
WIRE 432 32 208 32
WIRE 240 144 240 -48
WIRE -96 160 -128 160
WIRE -32 160 -96 160
WIRE 96 160 96 32
WIRE 96 160 48 160
WIRE 208 160 96 160
WIRE 432 176 432 32
WIRE 432 176 272 176
WIRE 480 176 432 176
WIRE 208 192 112 192
WIRE -272 240 -272 -48
WIRE -128 240 -128 160
WIRE 240 256 240 208
WIRE 112 272 112 192
WIRE -272 368 -272 320
WIRE -128 368 -128 320
WIRE 240 400 240 336
SYMBOL Opamps\\UniversalOpamp2 240 176 R0
SYMATTR InstName U1
SYMBOL voltage 240 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vpn
SYMATTR Value -100V
SYMBOL res 224 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5k
SYMBOL voltage -272 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vpp
SYMATTR Value 100V
SYMBOL res 64 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -128 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 60)
FLAG -128 368 0
FLAG 112 272 0
FLAG 480 176 Vo
FLAG -96 160 Vin
FLAG -272 368 0
FLAG 240 400 0
TEXT -40 448 Left 2 !.tran 0 0.5 0 .01
* Z:\home\khalils\Downloads\files\data\raw_asc\7cdfce5840d1_1078.asc
* Generated by LTspice 26.0.1 for Windows.
* Absolute Value Circuit(Full-Wave Rectifier)
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1078.asy)
D1 N003 N002 1N4148
V3 IN 0 SINE(0 1 100)
R2 N001 IN 200K
R1 N002 N001 200K
V1 +V 0 5
XU1 0 N001 +V 0 N003 LT1078 ;pnba In+)In-)V+)V-)OUT
XU2 N002 OUT +V 0 OUT LT1078 ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 -80 96
WIRE 128 96 112 96
WIRE 224 96 128 96
WIRE 384 96 304 96
WIRE -80 112 -80 96
WIRE 528 128 432 128
WIRE -192 160 -192 144
WIRE 480 192 480 176
WIRE -80 208 -80 192
WIRE 192 208 192 192
WIRE 432 208 432 128
WIRE 448 208 432 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 528 224 528 128
WIRE 528 224 512 224
WIRE 576 224 528 224
WIRE 304 240 224 240
WIRE 384 240 384 96
WIRE 384 240 368 240
WIRE 448 240 384 240
WIRE 160 256 128 256
WIRE -192 272 -192 240
WIRE 480 272 480 256
WIRE 192 288 192 272
SYMBOL opamps\\LT1078 480 160 R0
SYMATTR InstName U2
SYMBOL voltage -80 96 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
SYMBOL diode 304 256 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL opamps\\LT1078 192 176 R0
SYMATTR InstName U1
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL voltage -192 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 320 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 200K
FLAG -192 272 0
FLAG 192 192 +V
FLAG -192 144 +V
FLAG -80 208 0
FLAG 192 288 0
FLAG 480 176 +V
FLAG 480 272 0
FLAG -80 96 IN
FLAG 576 224 OUT
FLAG 128 256 0
TEXT 400 344 Left 0 !.tran 30m
TEXT 272 40 Bottom 0 ;Absolute Value Circuit(Full-Wave Rectifier)
* Z:\home\khalils\Downloads\files\data\raw_asc\0a611bc5cc36_Draft5.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N002 N003 1.2k
R2 0 N002 1.8k
V1 N001 0 15
R1 N002 N001 1.5k
.tran 5ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 112 -16 112
WIRE 224 112 160 112
WIRE 272 112 224 112
WIRE 384 112 352 112
WIRE -16 128 -16 112
WIRE 224 144 224 112
WIRE -16 272 -16 208
WIRE 224 272 224 224
WIRE 224 272 -16 272
WIRE 384 272 224 272
SYMBOL voltage -16 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 256 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1.2k
SYMBOL res 176 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1.5k
SYMBOL res 240 240 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 1.8k
FLAG 224 272 0
TEXT -48 296 Left 2 !.tran 5ms
* Z:\home\khalils\Downloads\files\data\raw_asc\f6cc17f2664d_Balancer_voltage.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
+ Nfs=1000000000 Eta=0 Level=3 L=1e-4 W=1e-4
+ Gamma=0 Phi=0.6 Is=1e-24 Js=0 Pb=0.8 Cj=0
+ Cjsw=0 Cgso=0 Cgdo=0 Cgbo=0 Tox=1e-07 Xj=0
+ U0=600 Vmax=3000)
R4 Vd 0 4.7k
C2 N002 N003 100n
C1 N001 N002 00n
R1 N001 N002 4.7k
XU1 N002 Vs N001 N003 Vg level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
M1 Vd Vg Vs Vs P-MOS
C4 Vd 0 100n
R2 N002 N003 22k
V1 N001 N003 PWL(0 2.5 100m 2.5 400m 4.5 480m 4.5 490m 2.5 600m 2.5 900m 4.5 1 4.5) AC 1
V2 N003 0 PWL(0 0 510m 0 520m 20 1 20)
R3 N001 Vs 4.7k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.ac dec 100 1 1meg
.MODEL P-MOS PMOS(Vto=-1.66 Kp=1.3807e-01
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 680
WIRE 128 -16 -80 -16
WIRE 224 -16 128 -16
WIRE 320 -16 224 -16
WIRE 464 -16 320 -16
WIRE 128 0 128 -16
WIRE 224 0 224 -16
WIRE 464 0 464 -16
WIRE 400 96 256 96
WIRE 464 96 464 80
WIRE 464 96 400 96
WIRE -80 112 -80 -16
WIRE 320 112 320 -16
WIRE 256 128 256 96
WIRE 288 128 256 128
WIRE 464 128 464 96
WIRE 400 144 352 144
WIRE 416 144 400 144
WIRE 128 160 128 80
WIRE 224 160 224 64
WIRE 224 160 128 160
WIRE 288 160 224 160
WIRE 128 176 128 160
WIRE 224 176 224 160
WIRE 464 256 464 224
WIRE -80 272 -80 192
WIRE 128 272 128 256
WIRE 128 272 -80 272
WIRE 224 272 224 240
WIRE 224 272 128 272
WIRE 320 272 320 176
WIRE 320 272 224 272
WIRE -80 352 -80 272
WIRE 464 384 464 256
WIRE 576 384 464 384
WIRE 464 400 464 384
WIRE 576 416 576 384
WIRE -80 496 -80 432
WIRE 464 496 464 480
WIRE 576 496 576 480
SYMBOL voltage -80 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 0 510m 0 520m 20 1 20)
SYMBOL res 448 -16 R0
SYMATTR InstName R3
SYMATTR Value 4.7k
SYMBOL res 112 -16 R0
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL res 112 160 R0
SYMATTR InstName R2
SYMATTR Value 22k
SYMBOL OpAmps\\UniversalOpAmp2 320 144 R0
SYMATTR InstName U1
SYMBOL pmos 416 224 M180
SYMATTR InstName M1
SYMATTR Value P-MOS
SYMBOL voltage -80 96 R0
WINDOW 3 -444 62 Invisible 2
WINDOW 39 0 0 Left 0
SYMATTR Value PWL(0 2.5 100m 2.5 400m 4.5 480m 4.5 490m 2.5 600m 2.5 900m 4.5 1 4.5)
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL cap 208 0 R0
SYMATTR InstName C1
SYMATTR Value 00n
SYMBOL res 448 384 R0
SYMATTR InstName R4
SYMATTR Value 4.7k
SYMBOL cap 560 416 R0
SYMATTR InstName C4
SYMATTR Value 100n
SYMBOL cap 208 176 R0
SYMATTR InstName C2
SYMATTR Value 100n
FLAG 464 496 0
FLAG -80 496 0
FLAG 400 144 Vg
FLAG 400 96 Vs
FLAG 464 256 Vd
FLAG 576 496 0
TEXT -112 520 Left 2 !.ac dec 100 1 1meg
TEXT -896 152 Left 2 !.MODEL P-MOS PMOS(Vto=-1.66 Kp=1.3807e-01\n+ Nfs=1000000000 Eta=0 Level=3 L=1e-4 W=1e-4 \n+ Gamma=0 Phi=0.6 Is=1e-24 Js=0 Pb=0.8  Cj=0 \n+ Cjsw=0 Cgso=0 Cgdo=0 Cgbo=0 Tox=1e-07 Xj=0\n+ U0=600 Vmax=3000)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP121-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP121-1.8.asy)
C2 OUT 0 1
C1 IN 0 1
XU1 OUT MP_01 0 IN MP_02 IN ADP121 K=1/2250 ;pnba Vout))GND)En))Vin
V1 IN 0 5.5
Rload OUT 0 22
.tran 10m startup
.lib ADP121.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL ADP121-1.8 256 208 R0
SYMATTR InstName U1
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 22
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2015f5394071_lc_tank_orientation.asc
* Generated by LTspice 26.0.1 for Windows.
* we can see that waveform of v3-v4 is the same as v1-gnd.\nthe point of setting ground in the inductor center tap \nis just for the phase inversion. \n \nIn a hartely oscillator, v4 is used as input to the amp\nand the amp will amplify and invert(common emitter) \nthen supply energy back at node v3.
L2 v2 0 0.001 IC=0 Rser=0 Rpar=0 Cpar=0
L4 0 v4 0.001 IC=0 Rser=0 Rpar=0 Cpar=0
L1 v1 v2 0.001 IC=0 Rser=0 Rpar=0 Cpar=0
C2 v3 v4 0.001 IC=1 Rser=0 Lser=0 Rpar=0 Cpar=0
L3 v3 0 0.001 IC=0 Rser=0 Rpar=0 Cpar=0
C1 v1 0 0.001 IC=1 Rser=0 Lser=0 Rpar=0 Cpar=0
.tran 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1944 680
WIRE 384 -224 256 -224
WIRE 448 -224 384 -224
WIRE 880 -224 784 -224
WIRE 976 -224 880 -224
WIRE 448 -192 448 -224
WIRE 976 -192 976 -224
WIRE 256 -128 256 -224
WIRE 784 -128 784 -224
WIRE 976 -96 976 -112
WIRE 1184 -96 976 -96
WIRE 448 -80 448 -112
WIRE 448 -64 448 -80
WIRE 976 -64 976 -96
WIRE 1184 -48 1184 -96
WIRE 256 48 256 -64
WIRE 384 48 256 48
WIRE 448 48 448 16
WIRE 448 48 384 48
WIRE 784 48 784 -64
WIRE 880 48 784 48
WIRE 976 48 976 16
WIRE 976 48 880 48
WIRE 384 80 384 48
SYMBOL cap 240 -128 R0
SYMATTR InstName C1
SYMATTR Value 0.001 IC=1
SYMATTR SpiceLine Rser=0 Lser=0 Rpar=0 Cpar=0
SYMBOL ind 432 -80 R0
SYMATTR InstName L2
SYMATTR Value 0.001 IC=0
SYMATTR SpiceLine Rser=0 Rpar=0 Cpar=0
SYMBOL ind 960 -80 R0
SYMATTR InstName L4
SYMATTR Value 0.001 IC=0
SYMATTR SpiceLine Rser=0 Rpar=0 Cpar=0
SYMBOL ind 960 -208 R0
SYMATTR InstName L3
SYMATTR Value 0.001 IC=0
SYMATTR SpiceLine Rser=0 Rpar=0 Cpar=0
SYMBOL cap 768 -128 R0
SYMATTR InstName C2
SYMATTR Value 0.001 IC=1
SYMATTR SpiceLine Rser=0 Lser=0 Rpar=0 Cpar=0
SYMBOL ind 432 -208 R0
SYMATTR InstName L1
SYMATTR Value 0.001 IC=0
SYMATTR SpiceLine Rser=0 Rpar=0 Cpar=0
FLAG 384 80 0
FLAG 384 -224 v1
FLAG 448 -80 v2
FLAG 1184 -48 0
FLAG 880 -224 v3
FLAG 880 48 v4
TEXT 592 112 Left 2 !.tran 0.1
TEXT 1264 -208 Left 2 ;we can see that waveform of v3-v4 is the same as v1-gnd.\nthe point of setting ground in the inductor center tap \nis just for the phase inversion. \n \nIn a hartely oscillator, v4 is used as input to the amp\nand the amp will amplify and invert(common emitter) \nthen supply energy back at node v3.
* Z:\home\khalils\Downloads\files\data\raw_asc\341c48b65239_2N2222A_Input_Characteristic_Curve.asc
* Generated by LTspice 26.0.1 for Windows.
* https://www.youtube.com/watch?v=7WWJ2kfJ3oc
Rc N001 Vc .0001
Q1 Vc N002 N003 0 2N2222
Re N003 0 .0001
Vcc N001 0 12
Vb N002 0 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Vb .6 5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1232 680
WIRE 448 16 256 16
WIRE 256 32 256 16
WIRE 256 128 256 112
WIRE 320 128 256 128
WIRE 256 144 256 128
WIRE 448 144 448 16
WIRE 192 192 -32 192
WIRE -32 224 -32 192
WIRE 448 240 448 224
WIRE 256 272 256 240
WIRE -32 320 -32 304
WIRE 256 384 256 352
SYMBOL voltage 448 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 12
SYMBOL res 240 256 R0
SYMATTR InstName Re
SYMATTR Value .0001
SYMBOL voltage -32 208 R0
SYMATTR InstName Vb
SYMATTR Value 0
SYMBOL res 240 16 R0
SYMATTR InstName Rc
SYMATTR Value .0001
SYMBOL npn 192 144 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
FLAG 256 384 0
FLAG 448 240 0
FLAG 320 128 Vc
FLAG -32 320 0
TEXT 384 312 Left 2 !.dc Vb .6 5
TEXT 584 16 Left 2 ;https://www.youtube.com/watch?v=7WWJ2kfJ3oc
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP160-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP160-3.0.asy)
XU1 IN 0 N001 OUT ADP16xfd K=333.3u ;pnba Vin)GND)En)Vout
V1 IN 0 5
C1 OUT 0 1
Rload OUT 0 300
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 432 96 352 96
WIRE 528 96 432 96
WIRE -64 112 -64 96
WIRE 432 112 432 96
WIRE 528 112 528 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 432 208 432 176
WIRE 528 208 528 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL cap 416 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL ADP160-3.0 256 208 R0
SYMATTR InstName U1
SYMBOL res 512 96 R0
SYMATTR InstName Rload
SYMATTR Value 300
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -64 208 0
FLAG 256 272 0
FLAG 432 208 0
FLAG 528 208 0
FLAG 528 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\3d03135a8f2e_DampedSine.asc
* Generated by LTspice 26.0.1 for Windows.
B1 in 0 V=exp(-20*time)*3.5*sin(1884*time)
R1 in in1 50
D1 0 in1 1N914
R2 in1 out 1k
R3 in10 in11 50
D2 0 in11 1N914
R4 in11 out10 1k
V1 in10 0 SINE(0 3.5 300 0 20 0)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 100m 0 0.01m
* Damped Sine with B-Source
* Damped Sine with Standard SPICE SINE-Source
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1232 680
WIRE 48 96 -48 96
WIRE -48 96 -48 144
WIRE 128 96 416 96
WIRE -48 224 -48 256
WIRE 416 144 416 96
WIRE 416 96 512 96
WIRE 416 208 416 256
WIRE 592 96 656 96
WIRE 48 400 -48 400
WIRE -48 400 -48 448
WIRE 128 400 416 400
WIRE -48 528 -48 560
WIRE 416 448 416 400
WIRE 416 400 496 400
WIRE 416 512 416 560
WIRE 576 400 640 400
FLAG -48 256 0
FLAG 416 256 0
FLAG 656 96 out
IOPIN 656 96 Out
FLAG -48 96 in
FLAG 416 96 in1
FLAG -48 560 0
FLAG 416 560 0
FLAG 640 400 out10
IOPIN 640 400 Out
FLAG -48 400 in10
FLAG 416 400 in11
SYMBOL bv -48 128 R0
WINDOW 3 20 100 Left 0
SYMATTR Value V=exp(-20*time)*3.5*sin(1884*time)
SYMATTR InstName B1
SYMBOL res 32 112 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL diode 432 208 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL res 496 112 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 32 416 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R3
SYMATTR Value 50
SYMBOL diode 432 512 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL res 480 416 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL voltage -48 432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 3.5 300 0 20 0)
TEXT -60 -38 Left 0 !.tran 0 100m 0 0.01m
TEXT -56 32 Left 0 ;Damped Sine with B-Source
TEXT -48 336 Left 0 ;Damped Sine with Standard SPICE SINE-Source
* Z:\home\khalils\Downloads\files\data\raw_asc\12a307d57a59_AD8552.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8552.asy)
R1 N001 0 10K
Vin IN 0 SINE(0 1 10K)
V1 +V 0 5
R2 OUT N001 10K
XU1 IN N001 +V -V OUT AD8552 ;pnba In+)In-)V+)V-)OUT
Rload OUT 0 10K
V2 -V 0 -5
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 240 -992 224 -992
WIRE 336 -992 320 -992
WIRE 352 -992 336 -992
WIRE 448 -992 432 -992
WIRE -16 -896 -16 -912
WIRE 80 -896 80 -912
WIRE 336 -880 336 -992
WIRE 352 -880 336 -880
WIRE 448 -864 448 -992
WIRE 448 -864 416 -864
WIRE 560 -864 448 -864
WIRE 352 -848 240 -848
WIRE 560 -848 560 -864
WIRE 240 -832 240 -848
WIRE -16 -800 -16 -816
WIRE 80 -800 80 -816
WIRE 560 -752 560 -768
WIRE 240 -736 240 -752
SYMBOL voltage -16 -912 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL Opamps\\AD8552 384 -928 R0
SYMATTR InstName U1
SYMBOL res 336 -1008 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 80 -912 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 448 -1008 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 240 -848 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 544 -864 R0
SYMATTR InstName Rload
SYMATTR Value 10K
FLAG -16 -912 +V
FLAG -16 -800 0
FLAG 240 -736 0
FLAG 560 -864 OUT
FLAG 240 -848 IN
FLAG 384 -896 +V
FLAG 80 -912 -V
FLAG 384 -832 -V
FLAG 224 -992 0
FLAG 560 -752 0
FLAG 80 -800 0
TEXT 496 -712 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1307.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1307.asy)
C1 N002 0 680p
R4 OUT 0 100
R3 N003 N002 100K
C2 OUT 0 33 Rser=0.02
D1 N001 OUT MBRS140
R1 OUT N004 1Meg
XU1 N003 N004 IN 0 N001 IN N005 N006 LT1307 ;pnba Vc)FB)_SHDN)GND)SW)Vin)LBI)LBO
R2 N004 0 324K
V1 IN 0 1.8
L1 IN N001 10 Rser=0.02 Rpar=5000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LT1307.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1716 968
WIRE 528 464 416 464
WIRE 704 464 528 464
WIRE 752 464 704 464
WIRE 880 464 832 464
WIRE 928 464 880 464
WIRE 1056 464 992 464
WIRE 1200 464 1056 464
WIRE 1328 464 1200 464
WIRE 416 480 416 464
WIRE 1200 480 1200 464
WIRE 1328 480 1328 464
WIRE 704 512 704 464
WIRE 1056 512 1056 464
WIRE 416 576 416 560
WIRE 528 576 528 464
WIRE 560 576 528 576
WIRE 880 576 880 464
WIRE 880 576 848 576
WIRE 1200 576 1200 544
WIRE 1328 576 1328 560
WIRE 464 656 432 656
WIRE 560 656 544 656
WIRE 1056 656 1056 592
WIRE 1056 656 848 656
WIRE 432 672 432 656
WIRE 1056 672 1056 656
WIRE 560 736 544 736
WIRE 864 736 848 736
WIRE 432 752 432 736
WIRE 1056 768 1056 752
WIRE 704 816 704 800
SYMBOL RES 1312 464 R0
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL IND 736 480 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL SCHOTTKY 928 480 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL POWERPRODUCTS\\LT1307 704 656 R0
SYMATTR InstName U1
SYMBOL RES 1040 656 R0
SYMATTR InstName R2
SYMATTR Value 324K
SYMBOL VOLTAGE 416 464 R0
WINDOW 3 26 94 Left 2
SYMATTR Value 1.8
SYMATTR InstName V1
SYMBOL RES 560 640 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL RES 1040 496 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL CAP 416 672 R0
SYMATTR InstName C1
SYMATTR Value 680p
SYMBOL POLCAP 1184 480 R0
SYMATTR InstName C2
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02
FLAG 1328 464 OUT
FLAG 1056 768 0
FLAG 1200 576 0
FLAG 1328 576 0
FLAG 432 752 0
FLAG 416 576 0
FLAG 704 816 0
FLAG 416 464 IN
TEXT 1096 816 Left 2 !.tran 1.5m startup