Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\562848f8c2b9_cmos_inv_ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
M1 2+ W1 0 0 CD4007-NMOS
M2 2+ W1 Vp Vp CD4007-PMOS
V1 Vp 0 5
V2 W1 0 PULSE(0 5 0 1n 1n 1u 2u)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.MODEL CD4007-PMOS PMOS ( LEVEL = 1 L=5u W=100u
+VTO = -1.40 KP = 3.2e-5 GAMMA = 3.30
+PHI = 0.65 LAMBDA = 9e-2 CBD = 65e-12
+CBS = 2e-14 IS = 1e-15 PB = 0.87
+CGSO = 0 CGDO = 0 CGBO = 1e-5
+CJ = 2e-10 MJ = 0.5 CJSW = 1e-9
+MJSW = 0.33 JS = 1e-8 TOX = 6.89e-10)
.MODEL CD4007-NMOS NMOS ( LEVEL = 1 L=5u W=20u
+VTO = 1.77 Kp = 2.169e-4 GAMMA = 4.10
+PHI = 0.65 LAMBDA = 1.5e-2 CBD = 20e-12
+CBS = 0 IS = 1e-15 PB = 0.87
+CBS = 2e-14 CGDO = 88e-8 CGBO = 0
+CJ = 2e-10 MJ = 0.5 CJSW = 1e-9
+MJSW = 0.33 JS = 1e-8 TOX = 1.265e-10)
.tran 10u
* CMOS Inverter
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1416 680
WIRE -544 -224 -544 -256
WIRE -416 -224 -416 -256
WIRE -544 -112 -544 -144
WIRE -416 -112 -416 -144
WIRE 160 -96 160 -288
WIRE 112 -80 -16 -80
WIRE -192 48 -192 16
WIRE -192 48 -240 48
WIRE -16 48 -16 -80
WIRE -16 48 -192 48
WIRE 160 48 160 0
WIRE 224 48 160 48
WIRE 160 112 160 48
WIRE -16 192 -16 48
WIRE 112 192 -16 192
WIRE 160 288 160 208
FLAG -240 48 W1
IOPIN -240 48 In
FLAG 224 48 2+
IOPIN 224 48 In
FLAG 160 -288 Vp
IOPIN 160 -288 In
FLAG 160 288 0
FLAG -544 -112 0
FLAG -416 -112 0
FLAG -544 -256 Vp
IOPIN -544 -256 In
FLAG -416 -256 W1
IOPIN -416 -256 In
FLAG -192 16 1+
IOPIN -192 16 In
SYMBOL nmos 112 112 R0
SYMATTR InstName M1
SYMATTR Value CD4007-NMOS
SYMBOL pmos 112 0 M180
SYMATTR InstName M2
SYMATTR Value CD4007-PMOS
SYMBOL voltage -544 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -416 -240 R0
WINDOW 3 -79 179 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 0 1n 1n 1u 2u)
SYMATTR InstName V2
TEXT 504 -112 Left 1 !.MODEL CD4007-PMOS    PMOS    ( LEVEL   = 1           L=5u    W=100u                \n+VTO    = -1.40         KP      = 3.2e-5        GAMMA   = 3.30  \n+PHI    = 0.65          LAMBDA  = 9e-2          CBD     = 65e-12\n+CBS    = 2e-14         IS      = 1e-15         PB      = 0.87\n+CGSO   = 0             CGDO    = 0             CGBO    = 1e-5\n+CJ     = 2e-10         MJ      = 0.5           CJSW    = 1e-9\n+MJSW   = 0.33          JS      = 1e-8          TOX     = 6.89e-10)
TEXT 504 56 Left 1 !.MODEL CD4007-NMOS    NMOS    ( LEVEL   = 1           L=5u    W=20u             \n+VTO    = 1.77          Kp      = 2.169e-4      GAMMA   = 4.10  \n+PHI    = 0.65          LAMBDA  = 1.5e-2        CBD     = 20e-12\n+CBS    = 0             IS      = 1e-15         PB      = 0.87\n+CBS    = 2e-14         CGDO    = 88e-8         CGBO    = 0\n+CJ     = 2e-10         MJ      = 0.5           CJSW    = 1e-9\n+MJSW   = 0.33          JS      = 1e-8          TOX     = 1.265e-10)
TEXT -336 248 Left 2 !.tran 10u
TEXT -128 -480 Left 2 ;CMOS Inverter
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP122-2.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP122-2.0.asy)
Rload OUT 0 100
C2 OUT 0 1
V1 IN 0 5.5
XU1 OUT MP_01 0 IN MP_02 IN ADP122 K=1/4000 ;pnba Vout))GND)En))Vin
C1 IN 0 1
.tran 10m startup
.lib ADP122.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL ADP122-2.0 256 208 R0
SYMATTR InstName U1
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\tmp\asc_dec_bjh7r6w2\19aa72b9e44b_pwm-highpass_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 N003 SINE(1 1 100 0 0 0 10)
C1 N002 N001 100n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 980 680
WIRE 400 240 176 240
WIRE 544 240 464 240
WIRE 704 240 544 240
WIRE 544 272 544 240
WIRE 176 304 176 240
WIRE 400 384 320 384
WIRE 544 384 544 352
WIRE 544 384 464 384
WIRE 704 384 544 384
WIRE 176 480 176 384
WIRE 320 480 320 384
WIRE 320 480 176 480
WIRE 176 496 176 480
SYMBOL voltage 176 288 R0
SYMATTR InstName V1
SYMATTR Value SINE(1 1 100 0 0 0 10)
SYMBOL cap 464 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100n
* Z:\home\khalils\Downloads\files\data\raw_asc\9a33e9b6d45c_AD8554.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 IN N001 +V -V OUT AD8554 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
R2 OUT N001 10K
V2 -V 0 -5
Rload OUT 0 10K
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8554.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 336 -1120 320 -1120
WIRE 432 -1120 416 -1120
WIRE 448 -1120 432 -1120
WIRE 544 -1120 528 -1120
WIRE 80 -1024 80 -1040
WIRE 176 -1024 176 -1040
WIRE 432 -1008 432 -1120
WIRE 448 -1008 432 -1008
WIRE 544 -992 544 -1120
WIRE 544 -992 512 -992
WIRE 656 -992 544 -992
WIRE 448 -976 336 -976
WIRE 656 -976 656 -992
WIRE 336 -960 336 -976
WIRE 80 -928 80 -944
WIRE 176 -928 176 -944
WIRE 656 -880 656 -896
WIRE 336 -864 336 -880
FLAG 80 -1040 +V
FLAG 80 -928 0
FLAG 336 -864 0
FLAG 656 -992 OUT
FLAG 336 -976 IN
FLAG 480 -1024 +V
FLAG 176 -1040 -V
FLAG 480 -960 -V
FLAG 320 -1120 0
FLAG 656 -880 0
FLAG 176 -928 0
SYMBOL Opamps\\AD8554 480 -1056 R0
SYMATTR InstName U1
SYMBOL voltage 80 -1040 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 336 -976 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 432 -1136 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 544 -1136 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 176 -1040 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 640 -992 R0
SYMATTR InstName Rload
SYMATTR Value 10K
TEXT 592 -840 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\0094f5a9a175_limiter_diod_positive.asc
* Generated by LTspice 26.0.1 for Windows.
D1 b 0 1N4148
V1 a 0 SINE(0 10 50)
R1 b a 500
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05s
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 208 -48 208
WIRE 144 208 96 208
WIRE -48 224 -48 208
WIRE 144 240 144 208
WIRE -48 336 -48 304
WIRE 48 336 -48 336
WIRE 144 336 144 304
WIRE 144 336 48 336
WIRE 48 352 48 336
FLAG -48 208 a
FLAG 144 208 b
FLAG 48 352 0
SYMBOL diode 128 240 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL Misc\\signal -48 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 38 63 Left 2
SYMATTR Value SINE(0 10 50)
SYMATTR InstName V1
SYMBOL Misc\\EuropeanResistor 112 192 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 500
TEXT -64 352 Left 2 !.tran 0.05s
* Z:\home\khalils\Downloads\files\data\raw_asc\0d7c8ecdfb90_Transistor_Switch.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 N001 1000
Q1 N001 N004 N005 0 2N2222
V1 N003 0 5
R1 N004 N003 100
V2 N002 0 10
D1 N005 0 L128-PCA1003500000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 32 192 32
WIRE 416 32 336 32
WIRE 416 48 416 32
WIRE 192 80 192 32
WIRE 32 96 -16 96
WIRE -16 128 -16 96
WIRE 112 128 112 96
WIRE 128 128 112 128
WIRE 240 176 192 176
WIRE 240 224 240 176
SYMBOL res 352 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1000
SYMBOL LED 224 224 R0
SYMATTR InstName D1
SYMATTR Value L128-PCA1003500000
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL Misc\\battery -16 112 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL npn 128 80 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL Misc\\battery 416 32 R0
SYMATTR InstName V2
SYMATTR Value 10
FLAG -16 208 0
FLAG 240 288 0
FLAG 416 128 0
TEXT 56 248 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\19b22da50da2_Fig26_18_ID_VDS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1) and 1/d(Id(M1)) for output resistance
VDS N001 0 0
M1 N001 N002 0 0 N_50n l=50n w=500n
VGS N002 0 400m
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VDS 0 1 1m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 288 208 288 192
WIRE 288 304 288 288
WIRE 400 192 288 192
WIRE 448 112 448 80
WIRE 448 224 448 208
WIRE 496 160 448 160
WIRE 640 80 448 80
WIRE 640 112 640 80
WIRE 640 224 640 192
SYMBOL voltage 288 192 R0
WINDOW 0 -90 57 Left 0
WINDOW 3 -90 85 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 400m
SYMBOL voltage 640 96 R0
WINDOW 0 41 55 Left 0
WINDOW 3 41 83 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 0
SYMBOL nmos4 400 112 R0
WINDOW 0 59 18 Left 0
WINDOW 3 64 75 Left 0
WINDOW 123 64 103 Left 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
FLAG 288 304 0
FLAG 448 224 0
FLAG 640 224 0
FLAG 496 160 0
TEXT 384 272 Left 0 !.dc VDS 0 1 1m
TEXT 384 296 Left 0 !.lib cmosedu_models.txt
TEXT 224 56 Left 0 ;Plot Id(M1) and 1/d(Id(M1)) for output resistance
* Z:\home\khalils\Downloads\files\data\raw_asc\3563c70a567f_Fig_9-4_Howland.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 +15
V2 -V 0 -15
R1 N001 N002 1K
R2 IN N001 1K
V3 IN 0 SINE(0 1 1K)
R3 N003 N002 1K
R4 0 N003 1K
Rload N003 0 {x}
XU2 N003 N001 +V -V N002 LT1001 ;pnba In+)In-)V+)V-)OUT
.tran 3m
.step param X list 1 10 100 1K
* Iout = V(in)/1K
* This example schematic is supplied for informational/educational purposes only.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 696
WIRE 16 160 -96 160
WIRE 144 160 96 160
WIRE 192 160 144 160
WIRE 304 160 272 160
WIRE -96 176 -96 160
WIRE 144 256 144 160
WIRE 160 256 144 256
WIRE -96 272 -96 256
WIRE 304 272 304 160
WIRE 304 272 224 272
WIRE 160 288 144 288
WIRE -256 368 -256 352
WIRE -128 368 -128 352
WIRE 16 368 -16 368
WIRE 144 368 144 288
WIRE 144 368 96 368
WIRE 192 368 144 368
WIRE 304 368 304 272
WIRE 304 368 272 368
WIRE 144 416 144 368
WIRE 448 416 144 416
WIRE 560 416 528 416
WIRE -256 464 -256 448
WIRE -128 464 -128 448
FLAG -128 464 0
FLAG -256 464 0
FLAG 192 240 +V
FLAG -256 352 +V
FLAG -128 352 -V
FLAG 192 304 -V
FLAG -96 272 0
FLAG -96 160 IN
FLAG -16 368 0
FLAG 560 416 0
SYMBOL voltage -256 352 R0
SYMATTR InstName V1
SYMATTR Value +15
SYMBOL voltage -128 352 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 176 144 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 0 144 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -96 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 176 352 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL res 0 352 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL res 432 432 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rload
SYMATTR Value {x}
SYMBOL opamps\\LT1001 192 208 R0
SYMATTR InstName U2
TEXT -56 496 Left 2 !.tran 3m
TEXT -56 528 Left 2 !.step param X list 1 10 100 1K
TEXT 248 464 Bottom 2 ;Iout = V(in)/1K
TEXT -296 576 Left 2 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\262932f1e0da_OP177F.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N004 0 0
XU1 N003 N002 N001 N004 output OP177F ;pnba In+)In-)V+)V-)OUT
V4 N003 0 0
V3 N002 0 0
R1 output 0 100
V2 N001 0 15
.INCLUDE OP177F.lib
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 -144 96 -144
WIRE 176 -80 176 -144
WIRE 176 96 176 0
WIRE 144 112 -80 112
WIRE 336 128 208 128
WIRE 368 128 336 128
WIRE 144 144 0 144
WIRE 368 176 368 128
WIRE 176 208 176 160
WIRE -80 224 -80 112
WIRE 0 224 0 144
WIRE -80 336 -80 304
WIRE 0 336 0 304
WIRE 0 336 -80 336
WIRE 96 336 96 -144
WIRE 96 336 0 336
WIRE 176 336 176 288
WIRE 176 336 96 336
WIRE 368 336 368 256
WIRE 368 336 176 336
WIRE 176 352 176 336
SYMBOL voltage 176 16 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL res 352 160 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage 176 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL voltage 0 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 0
SYMBOL voltage -80 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 0
SYMBOL Opamps\\opamp2 176 64 R0
SYMATTR InstName U1
SYMATTR Value OP177F
FLAG 176 352 0
FLAG 336 128 output
TEXT 344 64 Left 2 !.INCLUDE OP177F.lib
TEXT 472 328 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1550LCS8-4.1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1550LCS8-4.1.asy)
XU1 IN IN N002 OUT N003 0 N001 OUT LTC1550LCS8-4.1 ;pnba _SHDN)Vin)C+)Vout)C-)GND)CPout)REG
C3 OUT 0 10
C1 N001 0 .1
Rload OUT 0 1K
C2 N003 N002 .1
V1 IN 0 4.5
.tran 1m startup
.lib LTC1550LCS8-4.1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1600 1220
WIRE 576 720 144 720
WIRE 208 784 32 784
WIRE 240 784 208 784
WIRE 576 784 576 720
WIRE 576 784 528 784
WIRE 32 800 32 784
WIRE 208 848 208 784
WIRE 240 848 208 848
WIRE 560 848 528 848
WIRE 656 848 624 848
WIRE 32 896 32 880
WIRE 240 912 208 912
WIRE 544 912 528 912
WIRE 144 976 144 720
WIRE 144 976 32 976
WIRE 240 976 144 976
WIRE 544 976 528 976
WIRE 32 992 32 976
WIRE 144 1008 144 976
WIRE 32 1088 32 1072
WIRE 144 1088 144 1072
WIRE 208 1104 208 912
WIRE 352 1104 208 1104
WIRE 544 1104 544 976
WIRE 544 1104 416 1104
SYMBOL cap 560 864 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL VOLTAGE 32 784 R0
SYMATTR InstName V1
SYMATTR Value 4.5
SYMBOL RES 16 976 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL cap 416 1088 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL PowerProducts\\LTC1550LCS8-4.1 384 880 R0
SYMATTR InstName U1
SYMBOL cap 128 1008 R0
SYMATTR InstName C3
SYMATTR Value 10
FLAG 656 848 0
FLAG 544 912 0
FLAG 32 896 0
FLAG 32 1088 0
FLAG 144 1088 0
FLAG 32 976 OUT
FLAG 32 784 IN
TEXT 616 1064 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8607.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8607.asy)
XU1 N002 N003 N001 N006 NC_01 N005 N004 NC_02 IN IN 0 LT8607 ;pnba BST)SW)INTVcc)Rt)Sync)FB)TR/SS)PG)Vin)EN/UV)GND
C5 OUT N005 10p
V1 IN 0 24
C2 N001 0 1
R1 N006 0 18.2K
Rload OUT 0 6.67
C3 N002 N003 0.1
L1 N003 OUT 4.7 Rser=3m
C1 N004 0 .001
C4 OUT 0 22 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
R3 N005 0 187K
R2 OUT N005 1Meg
.tran 500u startup
.lib LT8607.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1044 680
WIRE 96 -64 0 -64
WIRE 256 -64 96 -64
WIRE 0 -48 0 -64
WIRE 256 -48 256 -64
WIRE 96 0 96 -64
WIRE 112 0 96 0
WIRE 416 0 400 0
WIRE 496 0 480 0
WIRE 0 48 0 32
WIRE 432 96 400 96
WIRE 432 112 432 96
WIRE 432 192 432 176
WIRE 432 192 400 192
WIRE 496 192 432 192
WIRE 608 192 576 192
WIRE 720 192 608 192
WIRE 816 192 720 192
WIRE 896 192 816 192
WIRE 912 192 896 192
WIRE 608 208 608 192
WIRE 720 208 720 192
WIRE 816 208 816 192
WIRE 912 208 912 192
WIRE 32 288 0 288
WIRE 112 288 96 288
WIRE 608 288 400 288
WIRE 720 288 720 272
WIRE 720 288 608 288
WIRE 608 304 608 288
WIRE 816 304 816 272
WIRE 912 304 912 288
WIRE 16 384 0 384
WIRE 112 384 96 384
WIRE 416 384 400 384
WIRE 608 400 608 384
SYMBOL cap 416 112 R0
SYMATTR InstName C3
SYMATTR Value 0.1
SYMBOL res 896 192 R0
SYMATTR InstName Rload
SYMATTR Value 6.67
SYMBOL res 592 288 R0
SYMATTR InstName R3
SYMATTR Value 187K
SYMBOL cap 800 208 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL ind 480 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=3m
SYMBOL LT8607 256 192 R0
SYMATTR InstName U1
SYMBOL res 112 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 18.2K
SYMBOL cap 416 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 96 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .001
SYMBOL cap 704 208 R0
SYMATTR InstName C5
SYMATTR Value 10p
SYMBOL voltage 0 -64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 592 192 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
FLAG 0 384 0
FLAG 0 288 0
FLAG 0 48 0
FLAG 496 0 0
FLAG 816 304 0
FLAG 608 400 0
FLAG 912 304 0
FLAG 896 192 OUT
FLAG 0 -64 IN
FLAG 416 384 0
TEXT 736 384 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\a23c824f6b8a_Wein_Bridge_Oscillator.asc
* Generated by LTspice 26.0.1 for Windows.
* WEIN BRIDGE OSCILLATOR
V2 N006 0 12
XU1 N002 N005 N006 N001 N004 LM741/NS ;pnba In+)In-)V+)V-)OUT
R2 N004 N005 100k
C2 0 N002 3n
C1 N003 N002 3n
V1 0 N001 12
R3 0 N005 47k
R4 0 N002 10.2k
R1 N004 N003 10.2k
.include LM741.MOD
.tran 0 30ms 10ms 0.1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1004 680
WIRE 768 -128 480 -128
WIRE 768 -64 768 -128
WIRE 176 -16 96 -16
WIRE 304 -16 240 -16
WIRE 640 -16 384 -16
WIRE 480 64 480 -128
WIRE 32 80 -112 80
WIRE 96 80 96 -16
WIRE 96 80 32 80
WIRE 448 80 96 80
WIRE 640 96 640 -16
WIRE 640 96 512 96
WIRE 768 96 768 16
WIRE 816 96 768 96
WIRE 448 112 256 112
WIRE 768 144 768 96
WIRE -112 176 -112 80
WIRE 32 176 32 80
WIRE 256 208 256 112
WIRE 320 208 256 208
WIRE 640 208 640 96
WIRE 640 208 400 208
WIRE 256 240 256 208
WIRE 480 304 480 128
WIRE 768 304 768 224
WIRE 768 304 480 304
WIRE -112 368 -112 256
WIRE 32 368 32 240
WIRE 32 368 -112 368
WIRE 256 368 256 320
WIRE 256 368 32 368
WIRE 32 384 32 368
SYMBOL cap 240 -32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 3n
SYMBOL res -96 272 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 10.2k
SYMBOL voltage 768 32 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL OpAmps\\opamp2 480 160 M180
SYMATTR InstName U1
SYMATTR Value LM741/NS
SYMBOL cap 48 240 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 3n
SYMBOL voltage 768 240 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL res 272 336 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 47k
SYMBOL res 416 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res 400 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10.2k
FLAG 816 96 0
FLAG 32 384 0
TEXT -104 -40 Left 2 !.include LM741.MOD
TEXT 96 392 Left 2 !.tran 0 30ms 10ms 0.1m
TEXT -40 -96 Left 2 ;WEIN BRIDGE OSCILLATOR
* Z:\home\khalils\Downloads\files\data\raw_asc\453467b897ef_DelayOff.asc
* Generated by LTspice 26.0.1 for Windows.
* Inverter with delay to off
A1 N001 0 0 0 0 0 OUT 0 SCHMITT VT=1 Vh=0.1
S1 0 N001 IN 0 SW
I1 0 N001 {100n/Td}
C1 N001 0 100n Rpar=100Meg
.model SW SW(Roff=1G Vt=0.5)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 80 16 80
WIRE 272 80 160 80
WIRE 368 80 272 80
WIRE 480 80 432 80
WIRE 16 96 16 80
WIRE 272 96 272 80
WIRE -32 112 -144 112
WIRE 160 112 160 80
WIRE -32 160 -48 160
WIRE -48 192 -48 160
WIRE 16 192 16 176
WIRE 160 192 160 176
WIRE 272 192 272 176
IOPIN -144 112 In
IOPIN 480 80 Out
SYMBOL Digital\\schmtbuf 368 144 M180
WINDOW 3 8 60 Invisible 2
SYMATTR Value VT=1 Vh=0.1
SYMATTR InstName A1
SYMBOL cap 176 112 M0
SYMATTR InstName C1
SYMATTR Value 100n
SYMATTR SpiceLine Rpar=100Meg
SYMBOL sw 16 192 M180
SYMATTR InstName S1
SYMBOL current 272 176 M180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value {100n/Td}
FLAG 272 192 0
FLAG 160 192 0
FLAG 16 192 0
FLAG -48 192 0
FLAG -144 112 IN
FLAG 480 80 OUT
TEXT 0 32 Left 2 !.model SW SW(Roff=1G Vt=0.5)
TEXT 72 -40 Left 2 ;Inverter with delay to off
* Z:\tmp\asc_dec_bjh7r6w2\0ba331f20d3d_ALDO_LED_Driver_ac_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N003 0 100
R7 0 N004 100
R1 0 0 {OPEN}
V4 +5V 0 5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 920 1220
WIRE -544 -96 -592 -96
WIRE -512 -96 -544 -96
WIRE -512 -64 -512 -96
WIRE -512 48 -512 16
WIRE -800 80 -800 32
WIRE -1056 224 -1088 224
WIRE -976 224 -1056 224
WIRE -800 224 -800 160
WIRE -800 224 -912 224
WIRE -736 224 -800 224
WIRE -352 224 -352 208
WIRE -384 240 -512 240
WIRE -240 256 -320 256
WIRE -384 272 -432 272
WIRE -1088 288 -1088 224
WIRE -240 288 -240 256
WIRE -800 320 -800 224
WIRE -432 384 -432 272
WIRE -240 384 -240 352
WIRE -240 384 -432 384
WIRE -240 400 -240 384
WIRE -1088 416 -1088 368
WIRE -800 448 -800 400
WIRE -992 592 -1088 592
WIRE -1088 624 -1088 592
SYMBOL res -256 384 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL res -896 576 R90
WINDOW 0 7 56 VBottom 2
WINDOW 3 25 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 100
SYMBOL res -976 32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value {OPEN}
SYMBOL voltage -512 -80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 44 Left 2
SYMATTR InstName V4
SYMATTR Value 5
FLAG -512 48 0
FLAG -1088 416 0
FLAG -1056 224 In
FLAG -240 480 0
FLAG -800 448 0
FLAG -240 256 LED
FLAG -800 32 +5V
FLAG -544 -96 +5V
FLAG -352 288 +5V
FLAG -352 208 0
FLAG -960 16 0
FLAG -880 16 0
FLAG -1088 704 0
FLAG -912 592 0