Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\34d227fc43c8_inv_amp_adder.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 N002 1+0~50K
R5 N002 NC_01 1k
R4 N001 -2.5V 40+0~20K
XU1 0 N001 5V 0V Vo opamp2 ;pnba In+)In-)V+)V-)OUT
R3 N001 Vin 1k
XU2 0 N002 +2.5V -2.5V N003 opamp2 ;pnba In+)In-)V+)V-)OUT
R2 Vo N001 50k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 0 -96 0
WIRE 64 0 32 0
WIRE 112 0 64 0
WIRE 224 0 192 0
WIRE -512 48 -544 48
WIRE -368 48 -432 48
WIRE -48 80 -80 80
WIRE 32 80 32 0
WIRE 160 80 144 80
WIRE 144 112 144 80
WIRE -448 128 -480 128
WIRE 64 128 64 0
WIRE 112 128 64 128
WIRE 224 144 224 0
WIRE 224 144 176 144
WIRE 256 144 224 144
WIRE -480 160 -480 128
WIRE 112 160 64 160
WIRE -544 176 -544 48
WIRE -544 176 -576 176
WIRE -512 176 -544 176
WIRE -368 192 -368 48
WIRE -368 192 -448 192
WIRE -304 192 -368 192
WIRE -512 208 -544 208
WIRE 144 208 144 176
WIRE 160 208 144 208
WIRE -480 224 -480 192
WIRE 64 240 64 160
WIRE -480 256 -480 224
WIRE -464 256 -480 256
WIRE -544 272 -544 208
SYMBOL res 48 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 48 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 40+0~20K
SYMBOL Opamps\\opamp2 -480 128 R0
SYMATTR InstName U2
SYMBOL res -416 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1+0~50K
SYMBOL Opamps\\opamp2 144 80 R0
SYMATTR InstName U1
SYMBOL res -560 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL res 208 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50k
FLAG 64 240 0
FLAG 160 80 5V
FLAG 160 208 0V
FLAG -96 0 Vin
FLAG -80 80 -2.5V
FLAG 256 144 Vo
FLAG -464 256 -2.5V
FLAG -448 128 +2.5V
FLAG -544 272 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7172-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N001 0 1n
V1 IN 0 2.3
Rload OUT 0 1.5
C1 OUT 0 4.7 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADM7172-1.8 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7172-1.8.asy)
.lib ADM7172-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.3
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 1.5
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADM7172-1.8 224 128 R0
SYMATTR InstName U1
TEXT 408 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8609B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8609B.asy)
L1 N003 OUT 2.2 Rser=3m
C3 N002 N003 0.1
R3 N005 0 187K
C4 OUT 0 22 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
R2 OUT N005 1Meg
R1 N006 0 18.2K
XU1 N002 N003 N001 N006 0 N005 N004 NC_01 IN IN LT8609B ;pnba BST)SW)INTVcc)RT)GND)FB)TR/SS)PG)VIN)EN/UV
Rload OUT 0 2.5
V1 IN 0 24
C5 OUT N005 10p
C2 N001 0 1
C1 N004 0 1n
.tran 500u startup
.lib LT8609B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 680
WIRE 48 -80 0 -80
WIRE 80 -80 48 -80
WIRE 256 -80 80 -80
WIRE 0 -48 0 -80
WIRE 256 -48 256 -80
WIRE 80 0 80 -80
WIRE 112 0 80 0
WIRE 416 0 400 0
WIRE 496 0 480 0
WIRE 0 48 0 32
WIRE 432 96 400 96
WIRE 432 112 432 96
WIRE 432 192 432 176
WIRE 432 192 400 192
WIRE 512 192 432 192
WIRE 624 192 592 192
WIRE 736 192 624 192
WIRE 832 192 736 192
WIRE 880 192 832 192
WIRE 928 192 880 192
WIRE 624 208 624 192
WIRE 736 208 736 192
WIRE 832 208 832 192
WIRE 928 208 928 192
WIRE 32 288 0 288
WIRE 112 288 96 288
WIRE 624 288 400 288
WIRE 736 288 736 272
WIRE 736 288 624 288
WIRE 624 304 624 288
WIRE 832 304 832 272
WIRE 928 304 928 288
WIRE 16 384 0 384
WIRE 112 384 96 384
WIRE 416 384 400 384
WIRE 624 400 624 384
SYMBOL cap 720 208 R0
SYMATTR InstName C5
SYMATTR Value 10p
SYMBOL cap 816 208 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL cap 96 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL cap 416 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 912 192 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL res 112 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 18.2K
SYMBOL LT8609B 256 192 R0
SYMATTR InstName U1
SYMBOL voltage 0 -64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 416 112 R0
SYMATTR InstName C3
SYMATTR Value 0.1
SYMBOL res 608 288 R0
SYMATTR InstName R3
SYMATTR Value 187K
SYMBOL res 608 192 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL ind 496 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=3m
FLAG 0 384 0
FLAG 0 288 0
FLAG 0 48 0
FLAG 496 0 0
FLAG 832 304 0
FLAG 624 400 0
FLAG 928 304 0
FLAG 880 192 OUT
FLAG 48 -80 IN
FLAG 416 384 0
TEXT 624 448 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\56a2d4e2fe0b_Draft81.asc
* Generated by LTspice 26.0.1 for Windows.
* Note current spike 1A, for 6ns.
* fdn360p/fdn337n switch time about 1us/3.6A
* DMP/ switch time about 30ns/ 200mA.
* CMOS - compare fets. for cross-conduction
R1 VCC P002 0.01R
V2 VCC 0 5
R5 N002 SW1 200R
R4 N004 0 50R
V1 SW1 0 PULSE(0 5 1us 10ns 10ns 25us 50us 20)
R3 N003 0 50R
XM1 N003 N001 0 DMN63D8L ;pnba D)G)S
XM3 N004 N002 P002 FDN360P VTEMP=30 ;pnba D)G)S
R2 VCC P001 0.01R
R6 N001 SW1 200R
XM4 N004 N002 0 FDN337N ;pnba D)G)S
XM2 N003 N001 P001 DMP31D7L ;pnba D)G)S
.tran 1.2ms
.include my.lib
.param temperature=25
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4244 1268
WIRE 896 -304 848 -304
WIRE 1536 -304 1504 -304
WIRE 512 -224 224 -224
WIRE 1216 -224 944 -224
WIRE 1760 -224 1584 -224
WIRE 848 -144 848 -304
WIRE 896 -144 848 -144
WIRE 1504 -144 1504 -304
WIRE 1536 -144 1504 -144
SYMBOL res 1200 -240 R0
SYMATTR InstName R3
SYMATTR Value 50R
SYMBOL res 1744 -240 R0
SYMATTR InstName R4
SYMATTR Value 50R
SYMBOL voltage 224 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 48 40 Left 2
SYMATTR Value PULSE(0 5 1us 10ns 10ns 25us 50us 20)
SYMATTR InstName V1
SYMBOL res 1568 -416 R0
SYMATTR InstName R1
SYMATTR Value 0.01R
SYMBOL nmos 1536 -224 R0
SYMATTR InstName M4
SYMATTR Value FDN337N
SYMATTR Prefix X
SYMBOL res 1520 -160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 200R
SYMBOL pmos 1536 -224 M180
SYMATTR InstName M3
SYMATTR Value FDN360P
SYMATTR Prefix X
SYMATTR Value2 VTEMP=30
SYMBOL pmos 896 -224 M180
SYMATTR InstName M2
SYMATTR Value DMP31D7L
SYMATTR Prefix X
SYMBOL res 864 -160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 200R
SYMBOL voltage 384 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 48 40 Left 2
SYMATTR Value 5
SYMATTR InstName V2
SYMBOL nmos 896 -224 R0
SYMATTR InstName M1
SYMATTR Value DMN63D8L
SYMATTR Prefix X
SYMBOL res 928 -416 R0
SYMATTR InstName R2
SYMATTR Value 0.01R
FLAG 384 -16 0
FLAG 384 -96 VCC
FLAG 224 -144 0
FLAG 512 -224 SW1
FLAG 944 -400 VCC
FLAG 944 -128 0
FLAG 768 -144 SW1
FLAG 1216 -144 0
FLAG 1584 -400 VCC
FLAG 1424 -144 SW1
FLAG 1584 -128 0
FLAG 1760 -144 0
TEXT 392 -288 Left 2 !.tran 1.2ms
TEXT 512 -520 Left 2 !.include my.lib
TEXT 1024 -576 Left 2 ;Note current spike 1A, for 6ns.
TEXT 432 -456 Left 2 !.param temperature=25
TEXT 1888 -368 Left 2 ;fdn360p/fdn337n switch time about 1us/3.6A
TEXT 744 -8 Left 2 ;DMP/  switch time about 30ns/ 200mA.
TEXT 1168 -720 Left 2 ;CMOS - compare fets. for cross-conduction
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8038.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8038.asy)
R2 OUT N001 2K
V2 -V 0 -5
XU1 IN N001 +V -V OUT AD8038 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
R1 N001 0 2K
Vin IN 0 PULSE(-1 1 20n 10n 10n 90n 200n 10)
.tran 2u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 400 -1248 384 -1248
WIRE 512 -1248 480 -1248
WIRE 528 -1248 512 -1248
WIRE 624 -1248 608 -1248
WIRE 16 -1136 16 -1152
WIRE 112 -1136 112 -1152
WIRE 512 -1120 512 -1248
WIRE 528 -1120 512 -1120
WIRE 624 -1104 624 -1248
WIRE 624 -1104 592 -1104
WIRE 688 -1104 624 -1104
WIRE 528 -1088 256 -1088
WIRE 256 -1072 256 -1088
WIRE 16 -1040 16 -1056
WIRE 112 -1040 112 -1056
WIRE 256 -976 256 -992
SYMBOL Opamps\\AD8038 560 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 256 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value PULSE(-1 1 20n 10n 10n 90n 200n 10)
SYMBOL res 624 -1264 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2K
SYMBOL voltage 16 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 112 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 496 -1264 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2K
FLAG 256 -976 0
FLAG 688 -1104 OUT
FLAG 256 -1088 IN
FLAG 560 -1136 +V
FLAG 560 -1072 -V
FLAG 384 -1248 0
FLAG 16 -1152 +V
FLAG 16 -1040 0
FLAG 112 -1152 -V
FLAG 112 -1040 0
TEXT 736 -928 Left 2 !.tran 2u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4234.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4234.asy)
R2 N003 IN 20K
S1 0 OUT N002 0 SHORT
R3 N004 0 20K
C1 N008 0 1
XU1 N007 IN N003 0 N008 N008 0 OUT TjFET N007 MP_01 MP_02 N001 N005 N003 N004 N006 NC_03 LTC4234 Rpcb=15 Tamb=25 ;pnba Sense)Vdd)UV)OV)Timer)IntVcc)GND)Out)Tj)Sense-)))Gate)PG)_FLT)FB)Imon)Iset
C2 OUT 0 680
V3 N002 0 PULSE(0 1 240m 1m 1m 10m)
R4 OUT N004 150K
R1 N006 0 20K
R5 OUT N005 20K
V1 IN 0 12
.model SHORT SW(Ron=10m Roff=1K Vt=.5 Vh=-.4)
.tran 1.4 startup
.lib LTC4234.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1800 680
WIRE -128 -352 -256 -352
WIRE -48 -352 -128 -352
WIRE 128 -352 128 -384
WIRE 480 -352 432 -352
WIRE 592 -352 480 -352
WIRE 688 -352 592 -352
WIRE 800 -352 688 -352
WIRE -256 -336 -256 -352
WIRE -128 -336 -128 -352
WIRE 480 -336 480 -352
WIRE 688 -336 688 -352
WIRE 800 -336 800 -352
WIRE 960 -320 848 -320
WIRE -48 -304 -48 -352
WIRE -16 -304 -48 -304
WIRE 432 -304 432 -352
WIRE 432 -304 272 -304
WIRE 592 -304 592 -352
WIRE 960 -304 960 -320
WIRE -256 -240 -256 -256
WIRE -128 -240 -128 -256
WIRE -16 -240 -128 -240
WIRE 480 -240 480 -256
WIRE 480 -240 272 -240
WIRE 688 -240 688 -272
WIRE 800 -240 800 -256
WIRE 480 -224 480 -240
WIRE 960 -208 960 -224
WIRE -16 -176 -32 -176
WIRE 432 -176 272 -176
WIRE 480 -128 480 -144
WIRE -128 -112 -128 -240
WIRE -16 -112 -128 -112
WIRE 288 -112 272 -112
WIRE 384 -112 368 -112
WIRE 432 -96 432 -176
WIRE 592 -96 592 -224
WIRE 592 -96 432 -96
WIRE -16 -48 -48 -48
WIRE 320 -48 272 -48
WIRE -48 16 -48 -48
WIRE -16 16 -48 16
WIRE 320 16 320 -48
WIRE 320 16 272 16
WIRE 320 80 272 80
WIRE 320 112 320 80
WIRE 336 208 272 208
SYMBOL res 272 -96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 20K
SYMBOL voltage 960 -320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 240m 1m 1m 10m)
SYMBOL res 576 -320 R0
SYMATTR InstName R5
SYMATTR Value 20K
SYMBOL sw 800 -240 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL res 464 -240 R0
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL res -144 -240 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 20K
SYMBOL cap 304 16 R0
WINDOW 0 28 11 Left 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 672 -336 R0
SYMATTR InstName C2
SYMATTR Value 680
SYMBOL res 464 -352 R0
SYMATTR InstName R4
SYMATTR Value 150K
SYMBOL LTC4234 128 -144 R0
SYMATTR InstName U1
SYMBOL voltage -256 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
FLAG 480 -128 0
FLAG 320 112 0
FLAG 384 -112 0
FLAG -256 -240 0
FLAG 688 -240 0
FLAG 800 -352 OUT
FLAG -256 -352 IN
FLAG 336 208 TjFET
FLAG 800 -240 0
FLAG 848 -272 0
FLAG 960 -208 0
FLAG -32 -176 0
TEXT 528 -64 Left 2 !.model SHORT SW(Ron=10m Roff=1K Vt=.5 Vh=-.4)
TEXT 536 208 Left 2 !.tran 1.4 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2906e13f61f2_OpAmpInvert.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1057.asy)
V2 N002 0 10V
R31/R32 N003 IN 10K tol=1 pwr=0.1
V1 0 N004 10V
R33 N001 N003 100K tol=1 pwr=0.1
V3 IN 0 SINE(0 0.5 50)
XU1 0 N003 N002 N004 N001 LT1057 ;pnba In+)In-)V+)V-)OUT
.tran 0 2 0
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -128 160 -128
WIRE 352 -48 160 -48
WIRE 160 -16 160 -48
WIRE -160 0 -192 0
WIRE -96 0 -160 0
WIRE 80 0 80 -128
WIRE 80 0 -16 0
WIRE 128 0 80 0
WIRE 272 16 272 -128
WIRE 272 16 192 16
WIRE 480 16 272 16
WIRE 128 32 80 32
WIRE -192 48 -192 0
WIRE 80 96 80 32
WIRE -192 144 -192 128
WIRE 160 352 160 48
WIRE 256 352 240 352
WIRE 272 352 256 352
WIRE 352 352 352 -48
WIRE 256 432 256 352
SYMBOL res 176 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R33
SYMATTR Value 100K
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL voltage -192 32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 0.5 50)
SYMBOL Opamps\\LT1057 160 -48 R0
SYMATTR InstName U1
SYMBOL voltage 368 352 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 10V
SYMBOL res 0 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R31/R32
SYMATTR Value 10K
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL voltage 256 352 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 10V
FLAG 80 96 0
FLAG 256 432 0
FLAG 512 32 OUT
FLAG -160 0 IN
FLAG -192 144 0
TEXT -216 392 Left 2 !.tran 0 2 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3474.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3474.asy)
D2 N008 0 LXHL-BW02
R1 N005 0 80.6K
C2 N007 0 .01
V1 IN 0 10
V2 N006 0 PULSE(0 1 0 1u 1u .25m .5m)
C1 N001 N002 .22
L1 N002 N003 10 Rpar=2K
C3 N003 0 2.2
D1 0 N002 1N5818
XU1 MP_01 N003 N008 IN N002 N001 N003 0 N005 IN N004 N007 N004 N006 LT3474 ;pnba )OUT)LED)Vin)SW)Boost)BIAS)GND)Rt)_SHDN)Ref)Vc)Vadj)PWM
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
.lib LT3474.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1132 688
WIRE 16 -16 -64 -16
WIRE 112 -16 16 -16
WIRE 368 -16 240 -16
WIRE -64 0 -64 -16
WIRE 368 0 368 -16
WIRE 112 16 112 -16
WIRE 240 16 240 -16
WIRE 16 80 16 -16
WIRE 32 80 16 80
WIRE 368 80 368 64
WIRE 368 80 320 80
WIRE 432 80 368 80
WIRE 544 80 512 80
WIRE 592 80 544 80
WIRE -64 96 -64 80
WIRE 368 96 368 80
WIRE 592 96 592 80
WIRE 32 144 16 144
WIRE 336 144 320 144
WIRE 368 176 368 160
WIRE 592 192 592 160
WIRE 16 208 16 144
WIRE 32 208 16 208
WIRE 336 208 336 144
WIRE 336 208 320 208
WIRE 544 208 544 80
WIRE 544 208 336 208
WIRE -64 272 -80 272
WIRE 32 272 16 272
WIRE 512 272 320 272
WIRE 608 272 592 272
WIRE 32 336 -16 336
WIRE 400 336 320 336
WIRE -16 352 -16 336
WIRE 400 352 400 336
WIRE 176 384 176 368
WIRE -16 432 -16 416
WIRE 400 432 400 416
SYMBOL ind 416 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rpar=2K
SYMBOL cap 352 0 R0
SYMATTR InstName C1
SYMATTR Value .22
SYMBOL PowerProducts\\LT3474 176 192 R0
SYMATTR InstName U1
SYMBOL voltage -64 -16 R0
WINDOW 0 26 19 Left 2
WINDOW 3 24 99 Left 2
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL voltage 496 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 0 1u 1u .25m .5m)
SYMBOL cap 576 96 R0
SYMATTR InstName C3
SYMATTR Value 2.2
SYMBOL schottky 352 160 M180
WINDOW 0 37 59 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5818
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 32 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 80.6K
SYMBOL LED 384 352 R0
WINDOW 3 28 65 Left 2
SYMATTR Value LXHL-BW02
SYMATTR InstName D2
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap -32 352 R0
SYMATTR InstName C2
SYMATTR Value .01
FLAG -64 96 0
FLAG 592 192 0
FLAG 176 384 0
FLAG -16 432 0
FLAG -80 272 0
FLAG 368 176 0
FLAG 400 432 0
FLAG 608 272 0
FLAG -64 -16 IN
TEXT 616 424 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1638.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Supply Rail Current Sense
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1638.asy)
R4 N003 N002 200
R3 N001 +V 200
XU1 N001 N003 +V 0 N004 LT1638 ;pnba In+)In-)V+)V-)OUT
Q1 N001 N004 OUT 0 2N3904
V1 +V 0 5
I1 N002 0 SINE(1 1 1K)
R1 OUT 0 2K
R2 +V N002 .2
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -80 80 -80 64
WIRE -32 80 -80 80
WIRE 64 80 48 80
WIRE 288 80 64 80
WIRE -80 112 -80 80
WIRE -288 160 -288 144
WIRE 288 176 288 80
WIRE 128 192 128 176
WIRE -80 208 -80 192
WIRE -32 208 -80 208
WIRE 96 208 48 208
WIRE 224 224 160 224
WIRE -80 240 -80 208
WIRE 64 240 64 80
WIRE 96 240 64 240
WIRE -288 256 -288 240
WIRE 128 272 128 256
WIRE 288 288 288 272
WIRE 368 288 288 288
WIRE 288 304 288 288
WIRE -80 352 -80 320
WIRE 288 400 288 384
SYMBOL npn 224 176 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL current -80 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value SINE(1 1 1K)
SYMBOL res -96 96 R0
SYMATTR InstName R2
SYMATTR Value .2
SYMBOL opamps\\LT1638 128 160 R0
SYMATTR InstName U1
SYMBOL res 64 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 200
SYMBOL res 64 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 200
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 272 288 R0
SYMATTR InstName R1
SYMATTR Value 2K
FLAG -288 256 0
FLAG 128 176 +V
FLAG -288 144 +V
FLAG 128 272 0
FLAG 288 400 0
FLAG -80 64 +V
FLAG -80 352 0
FLAG 368 288 OUT
TEXT 376 368 Left 2 !.tran 3m
TEXT 128 -16 Bottom 2 ;Positive Supply Rail Current Sense
* Z:\home\khalils\Downloads\files\data\raw_asc\0f3498fbdc9b_AS1.asc
* Generated by LTspice 26.0.1 for Windows.
+params: Vdrm=60 Itrms=0.8A Itsm=10A Igt=200uA Vgt=0.8
+ Ihold=5mA Ileak=50uA Cak=50pF GRratio=4
+params: Vdrm=800 Itrms=12 Itsm=120 Igt=15mA Vgt=1.5
+ Ihold=20mA Ileak=500uA GRratio=3
Q2 1 3 K 0 QNL OFF
C1 A K {Cak}
I2 3 K {Ihold} load
I1 A 1 {Ihold} load
D2 A 4 DVA
Q1 2 G K 0 QNG
R1 N001 VAK 4.7k
Q3 3 1 A 0 QPL OFF
RS A 1 1000k
D1 1 2 Drev
V1 N002 N004 1.5
D3 K 4 DVA
XU1 VAK N003 0 BT151-800R ;pnba A)G)K
R2 N003 N002 4.7k
V2 N001 N004 0
RL A K {Rleak}
XSCR1 A G K 2N5061
.SUBCKT 2N5061 A G K ; Motorola 2N5061 - model default
.param Grbe=(Vgt/Igt)/GRratio
.param Ggain=Ihold/Igt
.param Rleak=Vdrm/Ileak
.model QNL NPN(IS=640F Bf=50 RC=.45 TF=5.95u)
.model QNG NPN(Bf=Ggain Rb=Grbe Vje=Vgt Tf=.3nS Tr=6nS Cje=2pF Cjc=1pF)
.model QPL PNP(IS=640F Bf=50 RC=.45 TF=5.95u)
.model DVA D(Vj=.71 BV=Vdrm Cjo=1p)
.model Drev D(Vfwd=.71)
.ENDS
.SUBCKT BT151-800R A G K ; Philips BT151-800R
.ENDS
.dc v1 0.2 1.5 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1776 920
WIRE 736 -112 576 -112
WIRE 576 -96 576 -112
WIRE 576 16 576 -16
WIRE 576 48 576 16
WIRE 304 112 176 112
WIRE 528 112 384 112
WIRE 176 144 176 112
WIRE 736 144 736 -112
WIRE 176 240 176 224
WIRE 736 240 736 224
WIRE 736 240 176 240
WIRE 576 288 576 112
SYMBOL res 400 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.7k
SYMBOL Misc\\SCR 560 48 R0
SYMATTR InstName U1
SYMATTR Value BT151-800R
SYMBOL voltage 736 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage 176 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL res 560 -112 R0
SYMATTR InstName R1
SYMATTR Value 4.7k
FLAG 576 288 0
FLAG 576 16 VAK
TEXT 832 184 Left 2 !.SUBCKT 2N5061 A G K ; Motorola 2N5061 - model default\n+params: Vdrm=60 Itrms=0.8A Itsm=10A Igt=200uA Vgt=0.8\n+ Ihold=5mA Ileak=50uA Cak=50pF GRratio=4\n \nQ1 2 G K 0 QNG\nQ2 1 3 K 0 QNL OFF\nQ3 3 1 A 0 QPL OFF\nD1 1 2 Drev\nD2 A 4 DVA\nD3 K 4 DVA\nI1 A 1 {Ihold} load\nI2 3 K {Ihold} load\nRS A 1 1000k\nRL A K {Rleak}\nC1 A K {Cak}\n \n.param Grbe=(Vgt/Igt)/GRratio\n.param Ggain=Ihold/Igt\n.param Rleak=Vdrm/Ileak\n \n.model QNL NPN(IS=640F Bf=50 RC=.45 TF=5.95u)\n.model QNG NPN(Bf=Ggain Rb=Grbe Vje=Vgt Tf=.3nS Tr=6nS Cje=2pF Cjc=1pF)\n.model QPL PNP(IS=640F Bf=50 RC=.45 TF=5.95u)\n.model DVA D(Vj=.71 BV=Vdrm Cjo=1p)\n.model Drev D(Vfwd=.71)\n.ENDS
TEXT 840 -40 Left 2 !.SUBCKT BT151-800R A G K ; Philips BT151-800R\nXSCR1 A G K 2N5061\n+params: Vdrm=800 Itrms=12 Itsm=120 Igt=15mA Vgt=1.5\n+ Ihold=20mA Ileak=500uA GRratio=3\n.ENDS
TEXT 168 272 Left 2 !.dc v1 0.2 1.5 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1118.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 MP_01 N001 N003 N001 N002 LT1118 ;pnba GND))EN)FB)IN)OUT
V1 N001 0 5
R1 N002 N003 16.9K
R2 N003 0 10K
C1 N002 0 1
.tran 3m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1118.asy)
.lib LT1118.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 112 -32 112
WIRE 96 112 80 112
WIRE 400 112 352 112
WIRE 528 112 400 112
WIRE -32 128 -32 112
WIRE 400 128 400 112
WIRE 528 128 528 112
WIRE 528 208 528 192
WIRE -32 224 -32 208
WIRE 80 224 80 112
WIRE 96 224 80 224
WIRE 400 224 400 208
WIRE 400 224 352 224
WIRE 400 240 400 224
WIRE 224 288 224 272
WIRE 400 336 400 320
FLAG 224 288 0
FLAG -32 224 0
FLAG 400 336 0
FLAG 528 208 0
SYMBOL PowerProducts\\LT1118 224 176 R0
SYMATTR InstName U1
SYMBOL voltage -32 112 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 384 112 R0
SYMATTR InstName R1
SYMATTR Value 16.9K
SYMBOL res 384 224 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL cap 512 128 R0
SYMATTR InstName C1
SYMATTR Value 1
TEXT 520 312 Left 2 !.tran 3m startup