Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\4985326e9309_RD_series.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 N002 D
R1 0 N002 1k
V1 N001 0 SINE(0 5 1000)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 0.01 0 0.000001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 112 -16 112
WIRE 208 112 144 112
WIRE 336 112 288 112
WIRE -16 176 -16 112
WIRE -16 336 -16 256
WIRE 320 336 -16 336
WIRE 336 336 336 112
WIRE 336 336 320 336
WIRE 320 368 320 336
SYMBOL diode 80 128 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL voltage -16 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1000)
SYMBOL res 304 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 320 368 0
TEXT 392 256 Left 2 !.tran 0 0.01 0 0.000001
* Z:\home\khalils\Downloads\files\data\raw_asc\2780622cdf51_quiz_q14.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 N001 1n
V1 N001 0 PULSE(0 1 1u 0.1u 0.1u 0.4u 1u)
C2 0 N002 2n
.tran 2u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 80 128 80
WIRE 608 80 400 80
WIRE 608 112 608 80
WIRE 128 192 128 160
WIRE 608 208 608 176
SYMBOL cap 400 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL voltage 128 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 1u 0.1u 0.1u 0.4u 1u)
SYMBOL cap 624 176 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 2n
FLAG 128 192 0
FLAG 608 208 0
TEXT 88 232 Left 2 !.tran 2u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7172-1.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7172-1.3.asy)
Rload OUT 0 1.2
V1 IN 0 2.3
XU1 IN OUT IN N001 OUT 0 ADM7172-1.3 ;pnba Vin)Sense)EN)SS)Vout)GND
C1 OUT 0 4.7 Rser=1.5m
C2 N001 0 1n
.tran 5m startup
.lib ADM7172-1.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 1.2
SYMBOL ADM7172-1.3 224 128 R0
SYMATTR InstName U1
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.3
SYMBOL cap 80 240 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\46fd58aa0614_ADR5041.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR5041.asy)
XU1 OUT 0 ADR5041 ;pnba 1)2
Rbias IN OUT 1.24k
Vin IN 0 3
Rload OUT 0 10k
.dc TEMP -40 125 .1
.lib ADR5041.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 960
WIRE 32 64 -80 64
WIRE 208 64 112 64
WIRE 464 64 208 64
WIRE -80 112 -80 64
WIRE 208 112 208 64
WIRE 464 112 464 64
WIRE -80 224 -80 192
WIRE 208 224 208 176
WIRE 208 224 -80 224
WIRE 464 224 464 192
WIRE 464 224 208 224
WIRE -80 256 -80 224
SYMBOL voltage -80 96 R0
WINDOW 3 36 62 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 30 32 Left 2
SYMATTR Value 3
SYMATTR InstName Vin
SYMBOL ADR5041 208 144 R0
SYMATTR InstName U1
SYMBOL res 16 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rbias
SYMATTR Value 1.24k
SYMBOL res 448 96 R0
SYMATTR InstName Rload
SYMATTR Value 10k
FLAG -80 64 IN
FLAG -80 256 0
FLAG 464 64 OUT
TEXT -88 -32 Left 2 !.dc TEMP -40 125 .1
* Z:\tmp\asc_dec_bjh7r6w2\16ecfc1e4410_AD8538_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
Vin IN 0 SINE(0 1 10K)
V1 +V 0 2.5
R2 OUT N001 10K
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 384 -1104 368 -1104
WIRE 480 -1104 464 -1104
WIRE 496 -1104 480 -1104
WIRE 592 -1104 576 -1104
WIRE 144 -992 144 -1008
WIRE 256 -992 256 -1008
WIRE 480 -992 480 -1104
WIRE 496 -992 480 -992
WIRE 592 -976 592 -1104
WIRE 592 -976 560 -976
WIRE 704 -976 592 -976
WIRE 496 -960 384 -960
WIRE 704 -960 704 -976
WIRE 384 -944 384 -960
WIRE 144 -896 144 -912
WIRE 256 -896 256 -912
WIRE 384 -848 384 -864
SYMBOL voltage 384 -960 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 144 -1008 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 592 -1120 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 144 -1008 +V
FLAG 144 -896 0
FLAG 384 -848 0
FLAG 704 -976 OUT
FLAG 384 -960 IN
FLAG 528 -1008 +V
FLAG 256 -1008 -V
FLAG 528 -944 -V
FLAG 368 -1104 0
FLAG 256 -896 0
* Z:\home\khalils\Downloads\files\data\raw_asc\3d359c4d7a30_AD8047.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8047.asy)
R1 N001 0 200
V1 +V 0 5
XU1 IN N001 +V -V OUT AD8047 ;pnba In+)In-)V+)V-)OUT
Vin IN 0 SINE(0 1 10Meg)
R2 OUT N001 200
V2 -V 0 -5
Rload OUT 0 150
.tran 1u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1432 700
WIRE 560 -1184 544 -1184
WIRE 656 -1184 640 -1184
WIRE 672 -1184 656 -1184
WIRE 768 -1184 752 -1184
WIRE 320 -1088 320 -1104
WIRE 416 -1088 416 -1104
WIRE 656 -1072 656 -1184
WIRE 672 -1072 656 -1072
WIRE 768 -1056 768 -1184
WIRE 768 -1056 736 -1056
WIRE 896 -1056 768 -1056
WIRE 672 -1040 560 -1040
WIRE 896 -1040 896 -1056
WIRE 560 -1024 560 -1040
WIRE 320 -992 320 -1008
WIRE 416 -992 416 -1008
WIRE 896 -944 896 -960
WIRE 560 -928 560 -944
SYMBOL voltage 416 -1104 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 768 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL voltage 320 -1104 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 880 -1056 R0
SYMATTR InstName Rload
SYMATTR Value 150
SYMBOL voltage 560 -1040 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10Meg)
SYMBOL res 656 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL Opamps\\AD8047 704 -1120 R0
SYMATTR InstName U1
FLAG 560 -928 0
FLAG 896 -1056 OUT
FLAG 560 -1040 IN
FLAG 704 -1088 +V
FLAG 704 -1024 -V
FLAG 544 -1184 0
FLAG 896 -944 0
FLAG 320 -1104 +V
FLAG 320 -992 0
FLAG 416 -1104 -V
FLAG 416 -992 0
TEXT 912 -848 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5696R.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5696R.asy)
I1 0 0 100 AC 1
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
CLOAD vOUT 0 10n
V1 Vdd 0 5
XU2 vDAC Vdd 0 vOUT AD5696R Gain=2 ;pnba Vdac)Vdd)GND)Vout
Vdac1 NC_01 0 1.25
.tran 200u
.lib AD5696R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 272 112 192 112
WIRE 464 112 272 112
WIRE -800 144 -800 112
WIRE 272 160 272 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL AD5696R -208 112 R0
SYMATTR InstName U2
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 100
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2
* Z:\home\khalils\Downloads\files\data\raw_asc\172170e1cd68_1764.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1764.asy)
XU1 IN IN 0 OUT OUT LT1764 ;pnba _SHDN)IN)GND)OUT)ADJ
C1 OUT 0 10 Rser=100m
V1 IN 0 PWL(0 0 1 10)
Rload OUT 0 500
.tran 1
.lib LT1764.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -224 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 544 48 384 48
WIRE -224 64 -224 48
WIRE 384 64 384 48
WIRE 544 64 544 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -224 160 -224 144
WIRE 384 160 384 128
WIRE 544 160 544 144
WIRE 160 240 160 208
SYMBOL cap 368 64 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 Rser=100m
SYMATTR InstName C1
SYMATTR Value 10u
SYMBOL PowerProducts\\LT1764 160 96 R0
SYMATTR InstName U1
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 528 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
FLAG -224 160 0
FLAG 384 160 0
FLAG 544 160 0
FLAG 160 240 0
FLAG 544 48 OUT
FLAG -224 48 IN
TEXT 352 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8054.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8054.asy)
R3 N001 0 11K
R2 OUT N001 100K
C2 OUT 0 68 V=50 Irms=410m Rser=0.2 Lser=0 mfg="Nichicon" pn="UPL1H680MPH" type="Al electrolytic"
R1 N002 0 36.5K
C1 OUT 0 22 V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
XU1 NC_01 NC_02 MP_03 0 MP_04 MP_05 NC_06 NC_07 IN IN IN IN MP_08 MP_09 MP_10 MP_11 MP_12 MP_13 MP_14 MP_15 MP_16 MP_17 MP_18 MP_19 OUT OUT MP_20 MP_21 MP_22 0 MP_23 NC_24 NC_25 NC_26 N002 NC_27 N001 LTM8054 ;pnba CTL)SS))LL)))IOUTmon)IINmon)Run)Iin)Vin)SVin)))))))))))))Vout)Iout))))GND))Mode)CLKout)Sync)RT)Comp)FB
Rload OUT 0 2.5
V1 IN 0 24
.tran 1.5m startup
.lib LTM8054.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 728
WIRE -32 -192 -128 -192
WIRE -16 -192 -32 -192
WIRE 416 -192 400 -192
WIRE 464 -192 416 -192
WIRE 576 -192 464 -192
WIRE 656 -192 576 -192
WIRE 736 -192 656 -192
WIRE -128 -176 -128 -192
WIRE 464 -176 464 -192
WIRE 576 -176 576 -192
WIRE 656 -176 656 -192
WIRE 736 -176 736 -192
WIRE -32 -96 -32 -192
WIRE -16 -96 -32 -96
WIRE 416 -96 416 -192
WIRE 416 -96 400 -96
WIRE -128 -80 -128 -96
WIRE 576 -80 576 -112
WIRE 656 -80 656 -112
WIRE 736 -80 736 -96
WIRE -32 0 -32 -96
WIRE -16 0 -32 0
WIRE 464 0 464 -96
WIRE 464 0 400 0
WIRE 464 16 464 0
WIRE -32 96 -32 0
WIRE -16 96 -32 96
WIRE 464 112 464 96
WIRE -16 480 -32 480
WIRE -112 576 -128 576
WIRE -16 576 -32 576
WIRE 416 576 400 576
SYMBOL res -16 560 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 36.5K
SYMBOL voltage -128 -192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 448 0 R0
SYMATTR InstName R3
SYMATTR Value 11K
SYMBOL polcap 640 -176 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 68
SYMATTR InstName C2
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=50 Irms=410m Rser=0.2 Lser=0 mfg="Nichicon" pn="UPL1H680MPH" type="Al electrolytic"
SYMBOL PowerProducts\\LTM8054 192 192 R0
SYMATTR InstName U1
SYMBOL res 720 -192 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL res 448 -192 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL cap 560 -176 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
FLAG -128 576 0
FLAG -32 480 0
FLAG -128 -80 0
FLAG 416 576 0
FLAG 464 112 0
FLAG 576 -80 0
FLAG 656 -80 0
FLAG 736 -80 0
FLAG 736 -192 OUT
FLAG -128 -192 IN
TEXT 576 560 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7112-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7112-2.5.asy)
V1 IN 0 3.5
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=2.5 ;pnba Vin)Sense)EN)SS)Vout)GND
C1 OUT 0 2.2 Rser=1.5m
Rload OUT 0 20
C2 N001 0 4.7n
.tran 6m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.5
SYMBOL ADP7112-2.5 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7182-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7182-1.5.asy)
V2 N001 0 PULSE(0 2 200u 1n 1n 10m)
XU1 OUT MP_01 MP_02 N001 MP_03 0 IN ADP7182-x.x Rset=300k ;pnba Vout)))EN))GND)Vin
C1 IN 0 2.2
R1 OUT 0 50
C2 OUT 0 2.2
V1 IN 0 -8
.tran 1m
.lib ADP7182-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 -80 -48
WIRE 112 -48 32 -48
WIRE 432 -48 368 -48
WIRE 544 -48 432 -48
WIRE -80 -32 -80 -48
WIRE 32 -32 32 -48
WIRE 432 -32 432 -48
WIRE 544 -32 544 -48
WIRE -80 64 -80 48
WIRE 32 64 32 32
WIRE 432 64 432 32
WIRE 544 64 544 48
WIRE 112 144 32 144
WIRE 32 160 32 144
WIRE 32 256 32 240
WIRE 240 256 240 208
SYMBOL voltage -80 -48 R0
SYMATTR InstName V1
SYMATTR Value -8
SYMBOL ADP7182-1.5 240 48 R0
SYMATTR InstName U1
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 2.2
SYMBOL cap 16 -32 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL voltage 32 144 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 200u 1n 1n 10m)
SYMBOL res 528 -48 R0
SYMATTR InstName R1
SYMATTR Value 50
FLAG -80 64 0
FLAG 32 64 0
FLAG 432 64 0
FLAG 32 256 0
FLAG 240 256 0
FLAG 544 64 0
FLAG 32 -48 IN
FLAG 432 -48 OUT
TEXT 528 248 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1195.asc
* Generated by LTspice 26.0.1 for Windows.
* Fast Pulse Detector
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1195.asy)
V3 IN 0 PWL(0 0 20n 1 150n 1 170n 0)
R2 N001 -V 10K
C1 N003 0 60p
R3 IN 0 50
R4 N003 IN 1K
C2 OUT 0 1000p
V1 +V 0 5
XU1 N003 N001 +V -V N002 NC_01 LT1195 ;pnba In+)In-)V+)V-)OUT)SHDN
D1 N002 N001 5082-2800
R1 -V OUT 10K
V2 -V 0 -5
D2 N002 OUT 5082-2800
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3u
.model 5082-2800 D(BV=75 Cjo=1.6p Eg=0.69 IBV=10E-5 Is=2.2E-9 N=1.08 Rs=25 Vj=.6 XTI=2 M=.5)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1320 680
WIRE -128 96 -128 80
WIRE 0 96 0 80
WIRE 176 96 160 96
WIRE 272 96 256 96
WIRE 336 96 272 96
WIRE 448 96 400 96
WIRE -128 192 -128 176
WIRE 0 192 0 176
WIRE 320 208 320 192
WIRE 272 224 272 96
WIRE 304 224 272 224
WIRE 448 240 448 96
WIRE 448 240 368 240
WIRE 496 240 448 240
WIRE 624 240 560 240
WIRE 720 240 624 240
WIRE 768 240 720 240
WIRE 96 256 -320 256
WIRE 144 256 96 256
WIRE 256 256 224 256
WIRE 304 256 256 256
WIRE 624 256 624 240
WIRE 720 256 720 240
WIRE -320 272 -320 256
WIRE 96 272 96 256
WIRE 256 272 256 256
WIRE 320 288 320 272
WIRE 720 336 720 320
WIRE 624 352 624 336
WIRE -320 368 -320 352
WIRE 96 368 96 352
WIRE 256 368 256 336
SYMBOL voltage -128 80 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL schottky 400 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 5082-2800
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 704 256 R0
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL res 608 352 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -320 256 R0
SYMATTR InstName V3
SYMATTR Value PWL(0 0 20n 1 150n 1 170n 0)
SYMBOL cap 240 272 R0
SYMATTR InstName C1
SYMATTR Value 60p
SYMBOL schottky 496 224 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 5082-2800
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 272 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 0 80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 80 256 R0
SYMATTR InstName R3
SYMATTR Value 50
SYMBOL res 240 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL opamps\\LT1195 336 240 R0
SYMATTR InstName U1
FLAG 0 192 0
FLAG 320 192 +V
FLAG 0 80 +V
FLAG 320 288 -V
FLAG -128 192 0
FLAG -128 80 -V
FLAG -320 368 0
FLAG 256 368 0
FLAG 96 368 0
FLAG 160 96 -V
FLAG 624 352 -V
FLAG 720 336 0
FLAG 768 240 OUT
FLAG -320 256 IN
TEXT 712 504 Left 2 !.tran 3u
TEXT -352 440 Left 2 !.model 5082-2800 D(BV=75 Cjo=1.6p Eg=0.69 IBV=10E-5 Is=2.2E-9 N=1.08 Rs=25 Vj=.6 XTI=2 M=.5)
TEXT 272 40 Bottom 2 ;Fast Pulse Detector
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3466.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3466.asy)
D1 N002 N003 NSPW500BS N=8
R2 N005 0 63.4K
R1 N003 0 10
V2 N004 0 2
V1 IN 0 3
C1 N002 0 2.2
L1 IN N001 47
XU1 N002 N001 IN MP_01 MP_02 MP_03 MP_04 N005 N004 N003 0 LT3466 ;pnba Vout)SW)Vin)))))Rt)CTRL)FB)GND
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
.lib LT3466.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1280 680
WIRE -16 80 -96 80
WIRE 16 80 -16 80
WIRE 128 80 96 80
WIRE 384 80 288 80
WIRE 512 80 384 80
WIRE 384 96 384 80
WIRE -96 112 -96 80
WIRE 512 112 512 80
WIRE 128 160 128 80
WIRE 288 160 288 80
WIRE 384 176 384 160
WIRE -96 224 -96 192
WIRE -16 240 -16 80
WIRE 64 240 -16 240
WIRE 512 240 512 176
WIRE 512 240 352 240
WIRE 512 256 512 240
WIRE 512 352 512 336
WIRE 64 368 -48 368
WIRE 400 368 352 368
WIRE -48 384 -48 368
WIRE 400 384 400 368
WIRE 208 464 208 448
WIRE -48 480 -48 464
WIRE 400 480 400 464
SYMBOL res 384 368 R0
SYMATTR InstName R2
SYMATTR Value 63.4K
SYMBOL PowerProducts\\LT3466 208 304 R0
SYMATTR InstName U1
SYMBOL LED 496 112 R0
WINDOW 123 24 85 Left 2
SYMATTR InstName D1
SYMATTR Value NSPW500BS
SYMATTR Description Diode
SYMATTR Type diode
SYMATTR Value2 N=8
SYMBOL voltage -48 368 R0
WINDOW 0 29 23 Left 2
WINDOW 3 30 92 Left 2
SYMATTR InstName V2
SYMATTR Value 2
SYMBOL voltage -96 96 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL cap 368 96 R0
WINDOW 3 29 52 Left 2
SYMATTR Value 2.2
SYMATTR InstName C1
SYMBOL ind 0 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 47
SYMBOL res 496 240 R0
SYMATTR InstName R1
SYMATTR Value 10
FLAG 512 352 0
FLAG 400 480 0
FLAG 208 464 0
FLAG -96 224 0
FLAG -48 480 0
FLAG 384 176 0
FLAG -96 80 IN
TEXT 592 360 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\105f3366e1bd_6016.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6016.asy)
XU1 N003 N002 +V -V Out LT6016 ;pnba IN+)IN-)VCC)VEE)OUT
R4 Out N002 100K
V1 +V 0 5
R1 N002 N001 1K
Vin N001 N004 SINE(0 10m 1K)
R2 N003 N004 1K
R3 0 N003 100K
V2 -V 0 -5
Vcom N001 0 50
.tran 5m
.lib LT6016.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 64 -48 64
WIRE 192 64 80 64
WIRE 336 64 272 64
WIRE 416 64 336 64
WIRE 528 64 496 64
WIRE -48 80 -48 64
WIRE 80 144 80 64
WIRE 416 160 416 144
WIRE -48 176 -48 160
WIRE 336 176 336 64
WIRE 384 176 336 176
WIRE 528 192 528 64
WIRE 528 192 448 192
WIRE 576 192 528 192
WIRE 384 208 336 208
WIRE 416 240 416 224
WIRE 80 304 80 224
WIRE 192 304 80 304
WIRE 336 304 336 208
WIRE 336 304 272 304
WIRE 416 304 336 304
WIRE 576 304 496 304
WIRE -144 320 -144 304
WIRE -48 320 -48 304
WIRE 576 320 576 304
WIRE -144 416 -144 400
WIRE -48 416 -48 400
SYMBOL res 512 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL voltage 80 128 R0
SYMATTR InstName Vin
SYMATTR Value SINE(0 10m 1K)
SYMBOL res 512 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL voltage -48 304 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 288 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 288 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL LT6016 416 192 R0
SYMATTR InstName U1
SYMBOL voltage -48 64 R0
SYMATTR InstName Vcom
SYMATTR Value 50
SYMBOL voltage -144 304 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -144 416 0
FLAG -48 416 0
FLAG -144 304 +V
FLAG 416 240 -V
FLAG -48 176 0
FLAG 576 320 0
FLAG 576 192 Out
FLAG 416 144 +V
FLAG -48 304 -V
TEXT 520 384 Left 2 !.tran 5m