Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\112b125786ee_Controlled_Cap_non_phys_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
Bc1 c1 0 I=V(ctrl)*I(Vs)-I(Vs)
I1 0 c1 PULSE(0 1 10n 10n 10n 999)
Vctrl ctrl 0 PULSE(1 2 1 10n 10n)
Rdummy c2 0 1G
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 -176 -128 -176
WIRE 432 -176 -32 -176
WIRE 560 -176 432 -176
WIRE -32 -144 -32 -176
WIRE 432 -96 432 -176
WIRE -32 -32 -32 -64
WIRE -368 0 -432 0
WIRE -432 32 -432 0
WIRE -160 96 -256 96
WIRE 96 96 -160 96
WIRE 432 96 96 96
WIRE 560 96 432 96
WIRE -32 144 -112 144
WIRE -256 176 -256 96
WIRE -112 176 -112 144
WIRE 432 176 432 96
WIRE -160 192 -160 96
SYMBOL bi -32 -144 R0
WINDOW 3 13 86 Left 0
SYMATTR Value I=V(ctrl)*I(Vs)-I(Vs)
SYMATTR InstName Bc1
SYMBOL current 432 -16 R180
WINDOW 0 24 88 Left 0
WINDOW 3 -135 -37 Left 0
SYMATTR InstName I1
SYMATTR Value PULSE(0 1 10n 10n 10n 999)
SYMBOL voltage -432 16 R0
WINDOW 0 29 36 Left 0
WINDOW 3 -99 135 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vctrl
SYMATTR Value PULSE(1 2 1 10n 10n)
SYMBOL res -272 160 R0
WINDOW 0 -8 131 Left 0
SYMATTR InstName Rdummy
SYMATTR Value 1G
FLAG -112 256 0
FLAG -160 240 0
FLAG 560 96 c2
FLAG -432 112 0
FLAG -368 0 ctrl
FLAG -256 256 0
FLAG -32 -32 0
FLAG -128 -32 0
FLAG 560 -176 c1
FLAG 432 -16 0
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX4239.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX4239.asy)
CL OUT 0 15p
V1 IN 0 SINE(0 50m 10k)
XU1 IN OUT Vcc Vee OUT Vcc MAX4239 ;pnba In+)In-)V+)V-)OUT)SHDN
RL OUT 0 10k
Vee 0 Vee 2.5
Vcc Vcc 0 2.5
.tran 100u
.lib MAX4239.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 64 288 64 272
WIRE 416 352 416 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 64 448 64 400
WIRE 416 448 416 416
WIRE 448 448 448 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 64 544 64 528
WIRE 304 592 304 576
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 10k
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 10k)
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL MAX4239 432 400 R0
SYMATTR InstName U1
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
FLAG 720 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
FLAG 448 448 Vcc
TEXT 16 632 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\46c38b8a867d_CMOSP_2500muA.asc
* Generated by LTspice 26.0.1 for Windows.
;dc VG -5 0 0.1
M1 N001 N002 0 0 CMOSP
VD N001 0 -5
VG N002 0 -3.9044
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.INCLUDE CD4007.lib
.dc VD -5 0 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 464 48 224 48
WIRE 464 80 464 48
WIRE 224 128 224 48
WIRE 176 208 -16 208
WIRE 464 208 464 160
WIRE -16 224 -16 208
WIRE -16 336 -16 304
WIRE 224 336 224 224
SYMBOL pmos 176 128 R0
SYMATTR InstName M1
SYMATTR Value CMOSP
SYMBOL voltage 464 64 R0
SYMATTR InstName VD
SYMATTR Value -5
SYMBOL voltage -16 208 R0
SYMATTR InstName VG
SYMATTR Value -3.9044
FLAG -16 336 0
FLAG 224 336 0
FLAG 464 208 0
TEXT 0 0 Left 2 !.INCLUDE CD4007.lib
TEXT 8 56 Left 2 !;dc VG -5 0 0.1
TEXT 16 104 Left 2 !.dc VD -5 0 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1991.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1991.asy)
V4 N001 0 SINE(0 .1 100)
XU1 N001 NC_01 NC_02 -V 0 OUT +V NC_03 NC_04 0 LT1991 ;pnba P1)P3)P9)Vee)Ref)OUT)VCC)M9)M3)M1
V1 -V 0 -5
V2 +V 0 +5
.tran .1
.lib LT1991.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1156 980
WIRE 496 400 400 400
WIRE 144 432 144 400
WIRE 320 432 320 416
WIRE 400 432 400 400
WIRE -144 528 -144 512
WIRE -16 528 -16 512
WIRE -144 624 -144 608
WIRE -16 624 -16 608
WIRE 320 704 320 688
WIRE 400 720 400 688
WIRE 144 752 144 688
WIRE 144 848 144 832
SYMBOL voltage 144 736 R0
SYMATTR InstName V4
SYMATTR Value SINE(0 .1 100)
SYMBOL voltage -144 512 R0
SYMATTR InstName V1
SYMATTR Value -5
SYMBOL voltage -16 512 R0
SYMATTR InstName V2
SYMATTR Value +5
SYMBOL LT1991 320 560 R0
SYMATTR InstName U1
FLAG -16 624 0
FLAG -144 624 0
FLAG -144 512 -V
FLAG -16 512 +V
FLAG 320 416 +V
FLAG 320 704 -V
FLAG 400 720 0
FLAG 144 400 0
FLAG 144 848 0
FLAG 496 400 OUT
TEXT 440 792 Left 2 !.tran .1
* Z:\home\khalils\Downloads\files\data\raw_asc\11676a6c03a7_TriangularSawtoothWaveforms.asc
* Generated by LTspice 26.0.1 for Windows.
V6 SAWTOOTH_PWL 0 PWL REPEAT FOREVER (0 0 1 1 +1n 0) ENDREPEAT
V4 SAWTOOTH 0 PULSE(0 1 0 1 0 0 1)
V5 TRIANGULAR_PWL 0 PWL REPEAT FOREVER (0 0 .5 1 1 0) ENDREPEAT
V2 SQUARE 0 PULSE(0 1 .25 1n 1n .5 1)
V3 TRIANGULAR 0 PULSE(0 1 0 .5 .5 0 1)
V1 SINE 0 SINE(.5 .5 1 0 0 -90)
.tran 5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1748 680
WIRE 16 -608 0 -608
WIRE 112 -608 96 -608
WIRE 16 -464 0 -464
WIRE 112 -464 96 -464
WIRE 16 -320 0 -320
WIRE 112 -320 96 -320
WIRE 16 -176 0 -176
WIRE 112 -176 96 -176
WIRE 16 -32 0 -32
WIRE 112 -32 96 -32
WIRE 16 112 0 112
WIRE 112 112 96 112
SYMBOL voltage 112 -176 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 1 0 1 0 0 1)
SYMBOL voltage 112 -608 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value SINE(.5 .5 1 0 0 -90)
SYMBOL voltage 112 -320 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 0 .5 .5 0 1)
SYMBOL voltage 112 -464 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 .25 1n 1n .5 1)
SYMBOL voltage 112 112 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V6
SYMATTR Value PWL REPEAT FOREVER (0 0 1 1 +1n 0) ENDREPEAT
SYMBOL voltage 112 -32 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V5
SYMATTR Value PWL REPEAT FOREVER (0 0 .5 1 1 0) ENDREPEAT
FLAG 0 -320 0
FLAG 112 -320 TRIANGULAR
FLAG 0 -464 0
FLAG 112 -464 SQUARE
FLAG 0 -176 0
FLAG 112 -176 SAWTOOTH
FLAG 0 -608 0
FLAG 112 -608 SINE
FLAG 0 -32 0
FLAG 112 -32 TRIANGULAR_PWL
FLAG 0 112 0
FLAG 112 112 SAWTOOTH_PWL
TEXT 328 216 Right 2 !.tran 5
* Z:\home\khalils\Downloads\files\data\raw_asc\972740e93290_3rd.asc
* Generated by LTspice 26.0.1 for Windows.
;tran 0.01m
M4 N006 N007 0 0 CMOSN l=180n w=770.4n
M3 Vout N005 N006 0 CMOSN l=180n w=770.4n
V2 N007 0 SINE(0.7 1m 1.25e6) AC 1
V4 N004 0 0.93V
V1 N001 0 1.8V
C1 Vout 0 1e-12
V3 N002 0 1.1V
M1 N001 N002 N003 N001 CMOSP l=180n w=3811.32n
M2 N003 N004 Vout N001 CMOSP l=180n w=3811.32n
V5 N005 0 0.903V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc TSMC180nm.txt
.ac dec 150 1 15meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 728
WIRE 288 -144 224 -144
WIRE 288 -128 288 -144
WIRE 224 -112 224 -144
WIRE 224 0 224 -32
WIRE 304 0 224 0
WIRE 224 32 224 0
WIRE 304 80 304 0
WIRE 304 80 224 80
WIRE 0 112 -96 112
WIRE 176 112 80 112
WIRE -96 144 -96 112
WIRE 224 176 224 128
WIRE 304 224 304 80
WIRE 304 224 224 224
WIRE 0 256 -96 256
WIRE 176 256 80 256
WIRE 224 288 224 272
WIRE 448 288 224 288
WIRE 528 288 448 288
WIRE -96 320 -96 256
WIRE 448 320 448 288
WIRE 224 336 224 288
WIRE 320 384 224 384
WIRE 0 416 -96 416
WIRE 176 416 80 416
WIRE 448 416 448 384
WIRE 224 464 224 432
WIRE -96 480 -96 416
WIRE 320 512 320 384
WIRE 320 512 224 512
WIRE 176 544 0 544
WIRE 0 576 0 544
WIRE 224 576 224 560
WIRE 320 576 320 512
WIRE 320 576 224 576
WIRE 224 592 224 576
WIRE 0 688 0 656
IOPIN 528 288 Out
SYMBOL voltage 96 112 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 1.1V
SYMBOL voltage 0 560 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V2
SYMATTR Value SINE(0.7 1m 1.25e6)
SYMBOL nmos4 176 464 R0
SYMATTR InstName M4
SYMATTR Value2 l=180n w=770.4n
SYMATTR Value CMOSN
SYMBOL pmos4 176 32 R0
SYMATTR InstName M1
SYMATTR Value2 l=180n w=3811.32n
SYMATTR Value CMOSP
SYMBOL nmos4 176 336 R0
SYMATTR InstName M3
SYMATTR Value2 l=180n w=770.4n
SYMATTR Value CMOSN
SYMBOL voltage 224 -16 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8V
SYMBOL cap 432 320 R0
SYMATTR InstName C1
SYMATTR Value 1e-12
SYMBOL voltage 96 256 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 0.93V
SYMBOL pmos4 176 176 R0
SYMATTR InstName M2
SYMATTR Value2 l=180n w=3811.32n
SYMATTR Value CMOSP
SYMBOL voltage 96 416 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 0.903V
FLAG 288 -128 0
FLAG 0 688 0
FLAG 448 416 0
FLAG 224 592 0
FLAG -96 144 0
FLAG -96 320 0
FLAG -96 480 0
FLAG 528 288 Vout
TEXT -416 488 Left 2 !.inc TSMC180nm.txt
TEXT -416 712 Left 2 !;tran 0.01m
TEXT -416 568 Left 2 !.ac dec 150 1 15meg
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX44281U.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX44281U.asy)
V1 IN 0 SINE(165m 50m 10k)
XU1 IN Vcc 0 OUT MAX44281U ;pnba IN)VDD)GND)OUT
Vcc Vcc 0 3.3
RL OUT 0 10k
CL OUT 0 1p
.tran 100u
.lib MAX44281U.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 448 192 416 192
WIRE 544 192 528 192
WIRE 544 208 544 192
WIRE 416 240 416 192
WIRE 416 272 416 240
WIRE 384 304 304 304
WIRE 576 304 448 304
WIRE 672 304 576 304
WIRE 576 336 576 304
WIRE 416 352 416 336
WIRE 672 352 672 304
WIRE 304 416 304 304
WIRE 576 448 576 416
WIRE 672 448 672 416
WIRE 304 512 304 496
SYMBOL MAX44281U 416 240 R0
SYMATTR InstName U1
SYMBOL res 560 320 R0
SYMATTR InstName RL
SYMATTR Value 10k
SYMBOL voltage 304 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 31 94 Left 2
SYMATTR Value SINE(165m 50m 10k)
SYMATTR InstName V1
SYMBOL voltage 432 192 R270
WINDOW 123 0 0 Left 2
WINDOW 0 47 35 VRight 2
WINDOW 3 -45 40 VRight 2
SYMATTR InstName Vcc
SYMATTR Value 3.3
SYMBOL cap 656 352 R0
SYMATTR InstName CL
SYMATTR Value 1p
FLAG 672 304 OUT
FLAG 416 240 Vcc
FLAG 544 208 0
FLAG 304 512 0
FLAG 576 448 0
FLAG 304 304 IN
FLAG 672 448 0
FLAG 416 352 0
TEXT 288 560 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\30de2612192e_3PhaseRect.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N003 N005 SINE(0 170 60)
V3 N002 N005 SINE(0 170 60 0 0 -120)
R1 N001 0 10
V2 N004 N005 SINE(0 170 60 0 0 120)
D1 N002 N001 D
D2 0 N002 D
D3 N003 N001 D
D4 0 N003 D
D5 N004 N001 D
D6 0 N004 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 33.3333e-3
* This is a 3-Phase rectifier circuit.\nReference: Schuler, 7th edition, page 71.\nRun the simulation and probe the waveform across R1.\nLeft-click the vertical axis and change the bottom axis limit to 0 V.\nThe low ripple content of three-phase rectification is apparent.
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 932 680
WIRE 416 48 336 48
WIRE 496 48 416 48
WIRE 544 48 496 48
WIRE 336 64 336 48
WIRE 416 64 416 48
WIRE 496 64 496 48
WIRE 272 80 -80 80
WIRE 224 128 80 128
WIRE 544 144 544 48
WIRE 272 160 272 80
WIRE 336 160 336 128
WIRE 336 160 272 160
WIRE 224 176 224 128
WIRE 416 176 416 128
WIRE 416 176 224 176
WIRE -80 192 -80 80
WIRE 80 192 80 128
WIRE 496 192 496 128
WIRE 496 192 288 192
WIRE 336 224 336 160
WIRE 416 224 416 176
WIRE 496 224 496 192
WIRE 496 240 496 224
WIRE -80 288 -80 272
WIRE 80 288 80 272
WIRE 80 288 -80 288
WIRE 336 304 336 288
WIRE 416 304 416 288
WIRE 416 304 336 304
WIRE 496 304 496 288
WIRE 496 304 416 304
WIRE 544 304 544 224
WIRE 544 304 496 304
WIRE 544 336 544 304
WIRE 80 352 80 288
WIRE 80 464 80 432
WIRE 288 464 288 192
WIRE 288 464 80 464
FLAG 544 336 0
SYMBOL voltage 80 176 R0
WINDOW 3 -76 -69 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 40 56 Left 0
SYMATTR Value SINE(0 170 60)
SYMATTR InstName V1
SYMBOL voltage -80 176 R0
WINDOW 3 -105 139 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 38 57 Left 0
SYMATTR Value SINE(0 170 60 0 0 -120)
SYMATTR InstName V3
SYMBOL res 528 128 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage 80 448 R180
WINDOW 0 36 54 Left 0
WINDOW 3 -122 -39 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 170 60 0 0 120)
SYMBOL diode 352 128 R180
WINDOW 0 27 63 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D1
SYMBOL diode 352 288 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D2
SYMBOL diode 432 128 R180
WINDOW 0 28 64 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D3
SYMBOL diode 432 288 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D4
SYMBOL diode 512 128 R180
WINDOW 0 24 64 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D5
SYMBOL diode 512 288 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D6
TEXT 344 408 Left 0 !.tran 33.3333e-3
TEXT -128 -104 Left 0 ;This is a 3-Phase rectifier circuit.\nReference: Schuler, 7th edition, page 71.\nRun the simulation and probe the waveform across R1.\nLeft-click the vertical axis and change the bottom axis limit to 0 V.\nThe low ripple content of three-phase rectification is apparent.
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG784.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nOff Isolation is -75 dB at 10MHz\nOnly one channel included\nCharge Injection not included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG784.asy)
V3 N004 0 PULSE(0 3 0 20n 20n 10u 20u)
V5 +V 0 5
C1 N002 0 36p
XU1 N004 N001 N002 N003 +V 0 0 ADG784 ;pnba IN)SA)D)SB)Vdd)GND)_EN
V2 N003 0 0
R1 N002 0 49.9
V1 N001 0 3
.tran 100u
.lib ADG784.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1696 -272 -1920 -272
WIRE -1920 -256 -1920 -272
WIRE -1408 -240 -1504 -240
WIRE -1296 -240 -1408 -240
WIRE -1408 -224 -1408 -240
WIRE -1296 -224 -1296 -240
WIRE -1696 -208 -1840 -208
WIRE -1840 -192 -1840 -208
WIRE -1920 -160 -1920 -176
WIRE -1696 -144 -1760 -144
WIRE -1472 -144 -1504 -144
WIRE -1472 -128 -1472 -144
WIRE -1408 -128 -1408 -144
WIRE -1296 -128 -1296 -160
WIRE -1840 -96 -1840 -112
WIRE -1760 -80 -1760 -144
WIRE -1600 -16 -1600 -32
WIRE -1760 32 -1760 0
SYMBOL voltage -1760 -96 R0
WINDOW 3 24 136 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 20n 20n 10u 20u)
SYMATTR InstName V3
SYMBOL cap -1312 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL ADG784 -1600 -192 R0
SYMATTR InstName U1
SYMBOL voltage -2144 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 5
SYMBOL res -1424 -240 R0
SYMATTR InstName R1
SYMATTR Value 49.9
SYMBOL voltage -1920 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL voltage -1840 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
FLAG -1920 -160 0
FLAG -1840 -96 0
FLAG -1760 32 0
FLAG -1600 -368 +V
FLAG -1408 -128 0
FLAG -1600 -16 0
FLAG -1296 -128 0
FLAG -1472 -128 0
FLAG -2144 -64 0
FLAG -2144 -144 +V
TEXT -1360 -40 Left 2 !.tran 100u
TEXT -2160 -472 Left 2 ;Note:\nOff Isolation is -75 dB at 10MHz\nOnly one channel included\nCharge Injection not included\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\08d976d09b9f_Assignment_4b__iii_.asc
* Generated by LTspice 26.0.1 for Windows.
V1 0 N002 SINE(0 311 50) Rser=0.001
D1 0 N001 1N4148
D2 N003 0 1N4148
D3 N002 N001 1N4148
D4 N003 N002 1N4148
R1 N001 N003 1000
C1 N001 N003 0.000001
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05
* Full Wave Rectifier (Diode Bridge) (with 1microF Capacitor) (Ideal)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 368 80 64 80
WIRE 512 80 368 80
WIRE 64 96 64 80
WIRE 64 96 -96 96
WIRE 224 96 64 96
WIRE 224 128 224 96
WIRE -96 144 -96 96
WIRE 368 208 368 80
WIRE 512 224 512 80
WIRE -96 256 -96 208
WIRE -16 256 -96 256
WIRE 64 256 -16 256
WIRE 224 256 224 192
WIRE 224 256 144 256
WIRE -16 288 -16 256
WIRE 224 288 224 256
WIRE -96 304 -96 256
WIRE -96 400 -96 368
WIRE 64 400 -96 400
WIRE 224 400 224 352
WIRE 224 400 64 400
WIRE 64 416 64 400
WIRE 368 416 368 288
WIRE 368 416 64 416
WIRE 512 416 512 288
WIRE 512 416 368 416
FLAG -16 288 0
SYMBOL voltage 48 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 -60 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value SINE(0 311 50)
SYMATTR SpiceLine Rser=0.001
SYMBOL diode -80 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL diode -80 368 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL diode 240 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL diode 240 352 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL res 352 192 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL cap 496 224 R0
SYMATTR InstName C1
SYMATTR Value 0.000001
TEXT -64 424 Left 2 !.tran 0.05
TEXT -160 40 Left 2 ;Full Wave Rectifier (Diode Bridge) (with 1microF Capacitor) (Ideal)
* Z:\tmp\asc_dec_bjh7r6w2\0d121eeba1b6_ADA4000-1_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 IN N001 +V -V OUT ADA4000 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 10K
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4000-1.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 736 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 432 -1072 432 -1088
WIRE 432 -976 432 -992
SYMBOL Opamps\\ADA4000-1 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 432 -976 0
FLAG 736 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 576 -1072 -V
FLAG 416 -1232 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4940.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4940.asy)
VS+ N002 0 2.5
RF1 OUT- N001 1k
RL1 0 OUT- 499
Vin IN 0 PULSE(-50m 50m 20n 1n 1n 100n)
RG1 N001 IN 1k
VS- N005 0 -2.5
RF2 OUT+ N004 1k
G1 0 OUT_DIFF OUT- OUT+ -1m
Vocm N003 0 0
RG2 N004 0 1k
RL2 OUT+ 0 499
R1 OUT_DIFF 0 1k
XU1 NC_01 NC_02 N001 N004 N002 N005 OUT+ OUT- N003 NC_03 ADA4940 ;pnba 1)2)3)4)5)6)7)8)9)10
.tran 150n
.lib ADA4940.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 956 680
WIRE 224 -144 80 -144
WIRE 400 -144 304 -144
WIRE 160 -64 144 -64
WIRE 320 -64 240 -64
WIRE 320 -48 320 -64
WIRE 448 32 448 0
WIRE 224 48 176 48
WIRE 320 48 304 48
WIRE 320 64 320 48
WIRE 144 80 144 -64
WIRE 176 80 176 48
WIRE 720 96 624 96
WIRE -32 128 -320 128
WIRE 80 128 80 -144
WIRE 80 128 48 128
WIRE 112 128 80 128
WIRE 624 128 624 96
WIRE 720 128 720 96
WIRE -320 144 -320 128
WIRE 400 144 400 -144
WIRE 400 144 272 144
WIRE 448 144 448 112
WIRE 448 144 400 144
WIRE 528 144 448 144
WIRE 576 144 528 144
WIRE -32 192 -64 192
WIRE 80 192 48 192
WIRE 112 192 80 192
WIRE 400 208 272 208
WIRE 448 208 400 208
WIRE 528 208 448 208
WIRE 576 208 576 192
WIRE 576 208 528 208
WIRE -64 224 -64 192
WIRE 448 240 448 208
WIRE 624 240 624 208
WIRE 720 240 720 208
WIRE -320 256 -320 224
WIRE 144 352 144 272
WIRE 160 352 144 352
WIRE 304 352 240 352
WIRE 448 352 448 320
WIRE 304 368 304 352
WIRE 80 448 80 192
WIRE 224 448 80 448
WIRE 400 448 400 208
WIRE 400 448 304 448
SYMBOL voltage 144 -64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName VS+
SYMATTR Value 2.5
SYMBOL res 432 224 R0
SYMATTR InstName RL2
SYMATTR Value 499
SYMBOL g 624 112 R0
SYMATTR InstName G1
SYMATTR Value -1m
SYMBOL res 64 112 R90
WINDOW 0 -26 54 VBottom 2
WINDOW 3 -28 55 VTop 2
SYMATTR InstName RG1
SYMATTR Value 1k
SYMBOL voltage -320 128 R0
WINDOW 0 76 31 Right 2
WINDOW 3 -124 -42 Left 2
WINDOW 123 90 88 Right 2
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(-50m 50m 20n 1n 1n 100n)
SYMBOL ADA4940 144 176 R0
SYMATTR InstName U1
SYMBOL voltage 208 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName Vocm
SYMATTR Value 0
SYMBOL res 704 112 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 432 16 R0
SYMATTR InstName RL1
SYMATTR Value 499
SYMBOL res 320 432 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RF2
SYMATTR Value 1k
SYMBOL res 64 176 R90
WINDOW 0 65 57 VBottom 2
WINDOW 3 65 58 VTop 2
SYMATTR InstName RG2
SYMATTR Value 1k
SYMBOL res 320 -160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 36 57 VTop 2
SYMATTR InstName RF1
SYMATTR Value 1k
SYMBOL voltage 144 352 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName VS-
SYMATTR Value -2.5
FLAG 448 352 0
FLAG 720 96 OUT_DIFF
FLAG 320 64 0
FLAG 320 -48 0
FLAG 304 368 0
FLAG 448 0 0
FLAG -64 224 0
FLAG -320 128 IN
FLAG -320 256 0
FLAG 528 144 OUT-
FLAG 528 208 OUT+
FLAG 624 240 0
FLAG 720 240 0
TEXT 520 416 Left 2 !.tran 150n
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG701.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG701.asy)
R1 N002 0 300
V4 N003 0 PULSE(0 3 0 10n 10n 980n 2u)
V1 +V 0 5
C1 N002 0 35p
VS N001 0 3
XU1 N003 N002 N001 0 +V ADG701 ;pnba IN)D)S)GND)Vdd
.tran 10u
.lib ADG701.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -368 -16 -400 -16
WIRE -240 -16 -288 -16
WIRE 0 -16 -48 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE -480 32 -480 16
WIRE 112 32 112 -16
WIRE -240 48 -368 48
WIRE -368 112 -368 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -480 128 -480 112
WIRE -144 176 -144 160
WIRE -368 272 -368 192
SYMBOL voltage -368 96 R0
WINDOW 3 17 129 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 10n 10n 980n 2u)
SYMATTR InstName V4
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL voltage -272 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL voltage -480 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADG701 -144 32 R0
SYMATTR InstName U1
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 35p
FLAG -480 128 0
FLAG -480 16 +V
FLAG -400 -16 0
FLAG -144 -112 +V
FLAG -144 176 0
FLAG -368 272 0
FLAG 0 112 0
FLAG 112 112 0
TEXT -536 200 Left 2 !.tran 10u