Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8055.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8055.asy)
XU1 NC_01 NC_02 MP_03 0 MP_04 MP_05 NC_06 NC_07 IN IN IN IN MP_08 MP_09 MP_10 MP_11 MP_12 MP_13 MP_14 MP_15 MP_16 MP_17 MP_18 MP_19 OUT OUT MP_20 MP_21 MP_22 0 MP_23 NC_24 NC_25 NC_26 N002 NC_27 N001 LTM8055 ;pnba CTL)SS))LL)))IOUTmon)IINmon)Run)Iin)Vin)SVin)))))))))))))Vout)Iout))))GND))Mode)CLKout)Sync)RT)Comp)FB
V1 IN 0 12
R2 OUT N001 100K
C1 OUT 0 22 V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
R1 N002 0 36.5K
R3 N001 0 11K
Rload OUT 0 2
C2 OUT 0 68 V=50 Irms=410m Rser=0.2 Lser=0 mfg="Nichicon" pn="UPL1H680MPH" type="Al electrolytic"
.tran 1m startup
.lib LTM8055.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 728
WIRE -32 -192 -128 -192
WIRE -16 -192 -32 -192
WIRE 416 -192 400 -192
WIRE 464 -192 416 -192
WIRE 576 -192 464 -192
WIRE 672 -192 576 -192
WIRE 768 -192 672 -192
WIRE -128 -176 -128 -192
WIRE 464 -176 464 -192
WIRE 576 -176 576 -192
WIRE 672 -176 672 -192
WIRE 768 -176 768 -192
WIRE -32 -96 -32 -192
WIRE -16 -96 -32 -96
WIRE 416 -96 416 -192
WIRE 416 -96 400 -96
WIRE -128 -80 -128 -96
WIRE 576 -80 576 -112
WIRE 672 -80 672 -112
WIRE 768 -80 768 -96
WIRE -32 0 -32 -96
WIRE -16 0 -32 0
WIRE 464 0 464 -96
WIRE 464 0 400 0
WIRE 464 16 464 0
WIRE -32 96 -32 0
WIRE -16 96 -32 96
WIRE 464 112 464 96
WIRE -16 480 -32 480
WIRE -112 576 -128 576
WIRE -16 576 -32 576
WIRE 416 576 400 576
SYMBOL voltage -128 -192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL PowerProducts\\LTM8055 192 192 R0
SYMATTR InstName U1
SYMBOL res 752 -192 R0
SYMATTR InstName Rload
SYMATTR Value 2
SYMBOL cap 560 -176 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
SYMBOL polcap 656 -176 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 68
SYMATTR InstName C2
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=50 Irms=410m Rser=0.2 Lser=0 mfg="Nichicon" pn="UPL1H680MPH" type="Al electrolytic"
SYMBOL res 448 -192 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL res -16 560 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 36.5K
SYMBOL res 448 0 R0
SYMATTR InstName R3
SYMATTR Value 11K
FLAG -128 576 0
FLAG -32 480 0
FLAG -128 -80 0
FLAG 416 576 0
FLAG 464 112 0
FLAG 576 -80 0
FLAG 672 -80 0
FLAG 768 -80 0
FLAG 768 -192 OUT
FLAG -128 -192 IN
TEXT 576 560 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1224.asc
* Generated by LTspice 26.0.1 for Windows.
* 1MHz, 2nd Order Butterworth Filter
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1224.asy)
R1 OUT N001 619
C2 OUT N002 100p
C3 0 N001 500p
V2 -V 0 -15
XU1 0 N002 +V -V OUT LT1224 ;pnba In+)In-)V+)V-)OUT
R3 N001 IN 619
V3 IN 0 ac 1
V1 +V 0 15
R2 N002 N001 825
.ac oct 10 1K 100Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -208 48 -208 32
WIRE -112 48 -112 32
WIRE 128 64 96 64
WIRE 352 64 208 64
WIRE 256 112 224 112
WIRE 352 112 352 64
WIRE 352 112 320 112
WIRE -208 144 -208 128
WIRE -112 144 -112 128
WIRE 288 208 288 192
WIRE 0 224 -96 224
WIRE 96 224 96 64
WIRE 96 224 80 224
WIRE 128 224 96 224
WIRE 224 224 224 112
WIRE 224 224 208 224
WIRE 256 224 224 224
WIRE -96 240 -96 224
WIRE 352 240 352 112
WIRE 352 240 320 240
WIRE 384 240 352 240
WIRE 96 256 96 224
WIRE 256 256 224 256
WIRE 288 288 288 272
WIRE -96 336 -96 320
WIRE 96 336 96 320
SYMBOL voltage -96 224 R0
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL voltage -112 32 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -208 32 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL cap 80 320 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value 500p
SYMBOL cap 320 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL opamps\\LT1224 288 176 R0
SYMATTR InstName U1
SYMBOL res 224 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 619
SYMBOL res 96 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 619
SYMBOL res 224 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 825
FLAG -112 144 0
FLAG 288 192 +V
FLAG -112 32 +V
FLAG 288 288 -V
FLAG -208 144 0
FLAG -208 32 -V
FLAG 96 336 0
FLAG 224 256 0
FLAG -96 336 0
FLAG 384 240 OUT
FLAG -96 224 IN
TEXT 224 368 Left 2 !.ac oct 10 1K 100Meg
TEXT 224 -8 Bottom 2 ;1MHz, 2nd Order Butterworth Filter
* Z:\home\khalils\Downloads\files\data\raw_asc\ca562015a4b1_Single-phase-rectifier-constant-voltage-load.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N003 N001 D
D2 0 N004 D
D3 N004 N001 D
D4 0 N003 D
V1 N002 N004 SINE(0 325 50)
L1 N002 N003 10m
V2 N001 0 200
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
* Maximum load voltage so that we have continuous conduction mode: \n \nVs = RMS value of sinusoidal voltage source \nVo_max = (2*sqrt(2)*Vs/pi) / sqrt(1+4/pi^2)
* Single phase AC/DC converter (rectifier)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1420 680
WIRE 208 -32 64 -32
WIRE 352 -32 208 -32
WIRE 64 32 64 -32
WIRE 208 32 208 -32
WIRE 352 112 352 -32
WIRE -112 128 -256 128
WIRE 64 128 64 96
WIRE 64 128 -32 128
WIRE -256 144 -256 128
WIRE -256 240 -256 224
WIRE 208 240 208 96
WIRE 208 240 -256 240
WIRE 64 256 64 128
WIRE 208 256 208 240
WIRE 64 368 64 320
WIRE 208 368 208 320
WIRE 208 368 64 368
WIRE 352 368 352 192
WIRE 352 368 208 368
WIRE 64 384 64 368
FLAG 64 384 0
SYMBOL diode 80 96 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL diode 224 320 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMBOL diode 224 96 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMBOL diode 80 320 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMBOL voltage -256 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 325 50)
SYMBOL ind -128 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10m
SYMBOL voltage 352 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 200
TEXT -136 16 Left 2 !.tran 30m
TEXT -144 464 Left 2 ;Maximum load voltage so that we have continuous conduction mode: \n \nVs = RMS value of sinusoidal voltage source \nVo_max = (2*sqrt(2)*Vs/pi) / sqrt(1+4/pi^2)
TEXT -16 -104 Left 2 ;Single phase AC/DC converter (rectifier)
* Z:\home\khalils\Downloads\files\data\raw_asc\23ada078ffff_Fig26_18_ID_VSG.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot d(Id(M1)) to get gm
VSD 0 N003 100m
VBS N001 0 0
VSG 0 N002 0
M1 0 N002 N003 N001 P_50n l=50n w=1u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSG 0 500m 1m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 688
WIRE 320 96 320 80
WIRE 320 192 320 176
WIRE 400 192 320 192
WIRE 448 80 320 80
WIRE 448 112 448 80
WIRE 448 304 448 208
WIRE 528 160 448 160
WIRE 672 80 448 80
WIRE 672 160 608 160
WIRE 672 160 672 80
WIRE 672 208 672 160
WIRE 672 304 448 304
WIRE 672 304 672 288
WIRE 720 80 672 80
WIRE 720 112 720 80
SYMBOL voltage 672 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 41 57 Left 0
WINDOW 3 41 85 Left 0
SYMATTR InstName VSD
SYMATTR Value 100m
SYMBOL voltage 320 80 R0
WINDOW 0 -89 56 Left 0
WINDOW 3 24 104 Invisible 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VSG
SYMATTR Value 0
SYMBOL voltage 512 160 M90
WINDOW 0 -32 56 VBottom 0
WINDOW 3 -6 99 VBottom 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VBS
SYMATTR Value 0
SYMBOL pmos4 400 112 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=50n w=1u
SYMATTR InstName M1
SYMATTR Value P_50n
FLAG 720 112 0
TEXT 424 336 Left 0 !.dc VSG 0 500m 1m
TEXT 424 360 Left 0 !.lib cmosedu_models.txt
TEXT 488 56 Left 0 ;Plot d(Id(M1)) to get gm
* Z:\home\khalils\Downloads\files\data\raw_asc\118eda882195_TBJ03CAop.asc
* Generated by LTspice 26.0.1 for Windows.
RB C B {RB}
Vcc C 0 {Vcc}
Q1 C B E 0 TBJ
RE E 0 {RE}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.param Vcc=30 RB=820k RE=680 RL=100k Vipk=0.01m fi=10k
.model TBJ NPN(IS=10F BF=350 VAF=100)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1608 1200
WIRE 128 -16 -32 -16
WIRE 288 -16 128 -16
WIRE -32 48 -32 -16
WIRE 128 64 128 -16
WIRE -32 176 -32 128
WIRE 288 176 288 -16
WIRE 288 208 288 176
WIRE 128 256 128 144
WIRE 224 256 128 256
WIRE 288 320 288 304
WIRE 288 352 288 320
WIRE 288 496 288 432
FLAG -32 176 0
FLAG 288 496 0
FLAG 128 -16 cc
FLAG 128 256 B
FLAG 288 176 C
FLAG 288 320 E
SYMBOL res 112 48 R0
SYMATTR InstName RB
SYMATTR Value {RB}
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vcc
SYMATTR Value {Vcc}
SYMBOL npn 224 208 R0
SYMATTR InstName Q1
SYMATTR Value TBJ
SYMBOL res 272 336 R0
SYMATTR InstName RE
SYMATTR Value {RE}
TEXT -200 608 Left 2 !.op
TEXT -200 536 Left 2 !.param Vcc=30 RB=820k RE=680 RL=100k Vipk=0.01m fi=10k
TEXT -200 568 Left 2 !.model TBJ NPN(IS=10F BF=350 VAF=100)
* Z:\home\khalils\Downloads\files\data\raw_asc\125979d7dab0_lab11_oscilator_Wien_si_AO.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
R5 Uo N005 10k
C2 N005 Ur 10n
D2 N002 Uo 1N750
V1 N004 0 10
D1 N001 N002 1N750
C1 Ur 0 10n
V2 N006 0 -10
R4 Ur 0 10k
R1 N003 N001 10k
XU1 Ur N001 N004 N006 Uo LT1001 ;pnba In+)In-)V+)V-)OUT
R3 N001 0 10k
R2 Uo N003 15k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 30m 0 0.001m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 -80 192 -112
WIRE 256 16 128 16
WIRE 384 16 320 16
WIRE 496 16 448 16
WIRE 128 96 128 16
WIRE 256 96 128 96
WIRE 384 96 336 96
WIRE 496 96 496 16
WIRE 496 96 464 96
WIRE 192 144 192 0
WIRE -48 160 -96 160
WIRE 128 160 128 96
WIRE 128 160 32 160
WIRE 160 160 128 160
WIRE 496 176 496 96
WIRE 496 176 224 176
WIRE 512 176 496 176
WIRE 528 176 512 176
WIRE 160 192 48 192
WIRE -96 208 -96 160
WIRE 48 256 48 192
WIRE 48 272 48 256
WIRE 128 272 48 272
WIRE 240 272 128 272
WIRE 352 272 304 272
WIRE 496 272 496 176
WIRE 496 272 432 272
WIRE 48 288 48 272
WIRE 128 288 128 272
WIRE 192 368 192 208
WIRE 48 416 48 368
WIRE 128 416 128 352
WIRE 192 480 192 448
SYMBOL res 48 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL voltage 192 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -10
SYMBOL res 480 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 15k
SYMBOL res 32 272 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL res 352 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 448 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL zener 256 32 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N750
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL zener 384 32 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N750
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 304 256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL OpAmps\\OP07 192 112 R0
SYMATTR InstName U1
SYMBOL voltage 192 16 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL cap 112 288 R0
SYMATTR InstName C1
SYMATTR Value 10n
FLAG 192 480 0
FLAG 192 -112 0
FLAG -96 208 0
FLAG 48 416 0
FLAG 128 416 0
FLAG 48 256 Ur
FLAG 512 176 Uo
TEXT -112 504 Left 2 !.tran 0 30m 0 0.001m
* Z:\tmp\asc_dec_bjh7r6w2\1929cd84c71d_nr31_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
M1 NC_01 NC_02 NC_03 NC_04 pch w=12.6u l=1u
M0 NC_05 NC_06 NC_07 NC_08 pch w=12.6u l=1u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1040 1344
WIRE 224 416 672 416
WIRE 160 256 672 256
WIRE 736 528 736 464
WIRE 736 368 736 304
WIRE 768 176 768 96
WIRE 736 416 768 416
WIRE 768 416 768 256
WIRE 736 256 768 256
WIRE 768 256 768 176
WIRE 736 208 736 176
WIRE 736 176 768 176
WIRE 768 576 768 416
WIRE 736 576 768 576
WIRE 288 576 672 576
SYMBOL PMOS 672 416 R0
SYMATTR InstName M1
SYMATTR Value pch
SYMATTR Value2 w=12.6u l=1u
SYMBOL PMOS 672 256 R0
SYMATTR InstName M0
SYMATTR Value pch
SYMATTR Value2 w=12.6u l=1u
FLAG 768 96 VDD
* Z:\home\khalils\Downloads\files\data\raw_asc\1f4dc29f0d3b_318A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT318A.asy)
R1 N002 N001 1K
V3 N003 0 SINE(0 1 1K)
R2 N001 0 1K
XU1 N003 N001 +V -V N002 LT118A ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -15
V1 +V 0 15
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -32 96 -48 96
WIRE 64 96 48 96
WIRE 80 96 64 96
WIRE 192 96 160 96
WIRE -256 112 -256 96
WIRE -160 112 -160 96
WIRE 128 208 128 192
WIRE -256 224 -256 192
WIRE -160 224 -160 192
WIRE 64 224 64 96
WIRE 96 224 64 224
WIRE 192 240 192 96
WIRE 192 240 160 240
WIRE 96 256 -64 256
WIRE -64 272 -64 256
WIRE 128 288 128 272
WIRE -64 368 -64 352
SYMBOL voltage -160 96 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -256 96 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 176 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL opamps\\LT318A 128 240 R0
SYMATTR InstName U1
SYMBOL voltage -64 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 64 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
FLAG -160 224 0
FLAG 128 192 +V
FLAG -160 96 +V
FLAG 128 288 -V
FLAG -256 224 0
FLAG -256 96 -V
FLAG -48 96 0
FLAG -64 368 0
TEXT 136 344 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\37e16d2c2ebf_Circuito_sesion6.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R1 N001 N003 1000
V3 Vcc+ 0 5
XU1 0 N001 Vcc+ Vcc- Output level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 N002 0 2
R2 N001 N002 2200
V2 N003 0 PULSE(-1 1 0 0.5m 0.5m 0 1m 1000)
V4 Vcc- 0 -5
R3 Output N001 1000
.tran 0 10m 5m 0.005m
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
WIRE 208 -416 -64 -416
WIRE 464 -416 288 -416
WIRE 336 -192 336 -240
WIRE -64 -176 -64 -416
WIRE 144 -176 -64 -176
WIRE 304 -176 144 -176
WIRE 464 -160 464 -416
WIRE 464 -160 368 -160
WIRE 304 -144 272 -144
WIRE -64 -128 -64 -176
WIRE 144 -128 144 -176
WIRE 336 -80 336 -128
WIRE -64 0 -64 -48
WIRE 144 0 144 -48
WIRE 672 0 672 -48
WIRE 816 0 816 -48
WIRE -64 112 -64 80
WIRE 144 112 144 80
WIRE 144 112 -64 112
WIRE 272 112 272 -144
WIRE 272 112 144 112
WIRE 672 112 672 80
WIRE 816 112 816 80
SYMBOL res 128 -144 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL voltage 816 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value -5
SYMBOL voltage 144 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(-1 1 0 0.5m 0.5m 0 1m 1000)
SYMBOL voltage -64 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL res -80 -144 R0
SYMATTR InstName R2
SYMATTR Value 2200
SYMBOL res 304 -432 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1000
SYMBOL Opamps\\UniversalOpamp2 336 -160 R0
SYMATTR InstName U1
SYMBOL voltage 672 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 5
FLAG 144 112 0
FLAG 672 112 0
FLAG 816 112 0
FLAG 672 -48 Vcc+
FLAG 336 -240 Vcc+
FLAG 816 -48 Vcc-
FLAG 336 -80 Vcc-
FLAG 464 -160 Output
TEXT 528 -320 Left 2 !.tran 0 10m 5m 0.005m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1790-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1790-3.asy)
C1 OUT 0 1
Rload OUT 0 1K
V1 IN 0 PWL(0 0 1 10)
XU1 IN 0 OUT LT1790-3 ;pnba IN)GND)OUT
.tran 1
.lib LT1790.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 48 -208 48
WIRE 352 48 288 48
WIRE 448 48 352 48
WIRE -208 64 -208 48
WIRE 352 64 352 48
WIRE 448 64 448 48
WIRE -208 160 -208 144
WIRE 352 160 352 128
WIRE 448 160 448 144
WIRE 160 176 160 160
SYMBOL cap 336 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 432 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL PowerProducts\\LT1790-3 160 48 R0
SYMATTR InstName U1
FLAG -208 160 0
FLAG 352 160 0
FLAG 448 160 0
FLAG 160 176 0
FLAG 448 48 OUT
FLAG -208 48 IN
TEXT 232 200 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1370HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1370HV.asy)
Rload OUT 0 10
L1 IN N001 6.8 Rser=0.072
XU1 N006 N004 N003 0 N001 N005 IN LT1370 ;pnba Vc)FB)_SHDN)GND)SW)NFB)Vin
R2 OUT N004 53.6K
R3 N004 0 6.19K
D1 N001 OUT MBR745
C3 0 N007 .1
V1 IN 0 5
C2 OUT 0 180 Rser=0.05
R1 N001 N002 10
R4 N006 N007 470
C1 N002 OUT 1000p Rser=0.04
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
.lib LT1370.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2768 1444
WIRE 2032 784 2016 784
WIRE 2144 784 2112 784
WIRE 2224 784 2208 784
WIRE 1824 880 1600 880
WIRE 1872 880 1824 880
WIRE 2016 880 2016 784
WIRE 2016 880 1952 880
WIRE 2096 880 2016 880
WIRE 2224 880 2224 784
WIRE 2224 880 2160 880
WIRE 2352 880 2224 880
WIRE 2464 880 2352 880
WIRE 1600 896 1600 880
WIRE 2352 896 2352 880
WIRE 2464 896 2464 880
WIRE 1824 928 1824 880
WIRE 2224 944 2224 880
WIRE 1600 992 1600 976
WIRE 2016 992 2016 880
WIRE 2016 992 1968 992
WIRE 2352 992 2352 960
WIRE 2464 992 2464 976
WIRE 1680 1072 1648 1072
WIRE 2224 1072 2224 1024
WIRE 2224 1072 1968 1072
WIRE 2224 1088 2224 1072
WIRE 2000 1152 1968 1152
WIRE 2224 1184 2224 1168
WIRE 1744 1232 1744 1216
WIRE 1904 1232 1904 1216
WIRE 1904 1328 1904 1312
WIRE 1904 1408 1904 1392
SYMBOL VOLTAGE 1600 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LT1370HV 1824 1072 R0
SYMATTR InstName U1
SYMBOL RES 2208 1072 R0
SYMATTR InstName R3
SYMATTR Value 6.19K
SYMBOL CAP 2144 800 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1000p
SYMATTR SpiceLine Rser=0.04
SYMBOL schottky 2096 896 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBR745
SYMBOL RES 2016 800 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL polcap 2336 896 R0
SYMATTR InstName C2
SYMATTR Value 180
SYMATTR SpiceLine Rser=0.05
SYMBOL CAP 1888 1392 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL RES 1888 1216 R0
SYMATTR InstName R4
SYMATTR Value 470
SYMBOL IND 1856 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMATTR SpiceLine Rser=0.072
SYMBOL RES 2448 880 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL RES 2208 928 R0
SYMATTR InstName R2
SYMATTR Value 53.6K
FLAG 2464 880 OUT
FLAG 2224 1184 0
FLAG 2352 992 0
FLAG 2464 992 0
FLAG 1904 1408 0
FLAG 1744 1232 0
FLAG 1600 992 0
FLAG 1600 880 IN
TEXT 2056 1328 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\efdf493de8a3_Fig1.asc
* Generated by LTspice 26.0.1 for Windows.
VCE N001 0 -3V
Q1 N001 N002 0 0 2SAR372P5
VBE N002 0 3V
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VBE -0.8V -0.4V 3mV
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 688 208 464 208
WIRE 464 240 464 208
WIRE 400 288 304 288
WIRE 688 320 688 208
WIRE 304 352 304 288
WIRE 304 480 304 432
WIRE 464 480 464 336
WIRE 464 480 304 480
WIRE 688 480 688 400
WIRE 688 480 464 480
WIRE 464 512 464 480
SYMBOL Voltage 304 336 R0
WINDOW 3 24 96 Invisible 2
SYMATTR Value 3V
SYMATTR InstName VBE
SYMBOL Voltage 688 304 R0
SYMATTR InstName VCE
SYMATTR Value -3V
SYMBOL pnp 400 240 R0
SYMATTR InstName Q1
SYMATTR Value 2SAR372P5
FLAG 464 512 0
TEXT 304 544 Left 2 !.dc VBE -0.8V -0.4V 3mV
* Z:\tmp\asc_dec_bjh7r6w2\1422f4c9158b_101_lec_exercise_diode_einweg_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N004 N005 1N4001
V1 N001 0 SINE(0 325 50)
Ri N004 N003 7.2
Lp N002 0 {Lp}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2120 680
WIRE -48 48 -96 48
WIRE 112 48 32 48
WIRE 288 48 272 48
WIRE 416 48 368 48
WIRE 512 48 480 48
WIRE 608 48 512 48
WIRE -96 64 -96 48
WIRE 112 80 112 48
WIRE 272 80 272 48
WIRE 512 80 512 48
WIRE 608 80 608 48
WIRE -96 192 -96 144
WIRE 112 192 112 160
WIRE 112 192 -96 192
WIRE 272 192 272 160
WIRE 448 192 272 192
WIRE 512 192 512 144
WIRE 512 192 448 192
WIRE 608 192 608 160
WIRE 608 192 512 192
WIRE -96 208 -96 192
WIRE 448 208 448 192
SYMBOL diode 416 64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4001
SYMBOL voltage -96 48 R0
WINDOW 0 8 103 Left 2
WINDOW 3 -54 144 VLeft 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 325 50)
SYMBOL res 384 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Ri
SYMATTR Value 7.2
SYMBOL ind2 96 64 R0
SYMATTR InstName Lp
SYMATTR Value {Lp}
SYMATTR Type ind
FLAG -96 208 0
FLAG 448 208 0