Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\7695032d4a88_module_1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 SCL N002 10k
R2 SDA N001 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 -128 -64 -288
WIRE 160 -128 160 -336
WIRE 160 16 160 -48
WIRE 336 16 160 16
WIRE 672 16 480 16
WIRE -64 48 -64 -48
WIRE 336 48 -64 48
WIRE 800 48 480 48
WIRE 672 128 672 16
WIRE 672 128 480 128
WIRE 272 144 272 -288
WIRE 336 144 272 144
WIRE 800 160 800 48
WIRE 800 160 480 160
WIRE 672 352 672 128
WIRE 672 352 480 352
WIRE 800 368 800 160
WIRE 800 368 480 368
WIRE 672 416 672 352
WIRE 800 416 800 368
FLAG 672 416 0
FLAG -64 -288 SCL
IOPIN -64 -288 BiDir
FLAG 160 -336 SDA
IOPIN 160 -336 BiDir
FLAG 400 48 BM388
FLAG 416 160 dht22
FLAG 800 416 5v
FLAG 416 368 OLED
FLAG 272 -288 DOUT
IOPIN 272 -288 BiDir
SYMBOL res -80 -144 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 144 -144 R0
SYMATTR InstName R2
SYMATTR Value 10k
RECTANGLE Normal 480 80 336 -16
RECTANGLE Normal 480 192 336 96
RECTANGLE Normal 480 384 320 336
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2119-1.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2119-1.0.asy)
R1 OUT N001 100K
C2 OUT 0 22
Rload OUT 0 1
XU1 IN IN N002 0 0 OUT IN N001 IN IN ADP2119-1.0 ;pnba Vin)Pvin)SW)PGND)GND)FB)TRK)Pgood)Sync/Mode)EN
C1 OUT 0 22
L1 N002 OUT 1
V1 IN 0 5
.tran 1m
.lib ADP2119-1.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 0 64 0
WIRE 288 0 128 0
WIRE 64 16 64 0
WIRE 288 32 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 624 64 576 64
WIRE 64 112 64 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 624 144 624 64
WIRE 624 144 560 144
WIRE 688 144 624 144
WIRE 736 144 688 144
WIRE 560 160 560 144
WIRE 624 160 624 144
WIRE 736 160 736 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 624 224 560 224
WIRE 560 256 560 224
WIRE 736 256 736 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 688 304 688 144
WIRE 688 304 416 304
WIRE 288 368 288 352
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL cap 608 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL voltage 64 0 R0
WINDOW 0 27 27 Left 2
WINDOW 3 29 88 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADP2119-1.0 288 272 R0
SYMATTR InstName U1
SYMBOL res 720 144 R0
WINDOW 3 34 68 Left 2
SYMATTR Value 1
SYMATTR InstName Rload
FLAG 560 256 0
FLAG 288 368 0
FLAG 64 112 0
FLAG 736 144 OUT
FLAG 736 256 0
FLAG 64 0 IN
TEXT 504 344 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7185.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7185.asy)
R2 N003 0 24.9k
R1 N002 N003 100k
C2 OUT 0 4.7
V2 N001 0 1.5
RLOAD OUT 0 5
C3 N002 0 1
C1 N002 N003 10n
C4 N004 0 1
XU1 OUT OUT N002 N003 N001 0 N004 IN ADP7185 ;pnba Vout)Sense)VA)VAFB)EN)GND)Vreg)Vin
V1 IN 0 -3.8
.tran 20m startup
.lib ADP7185.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE 16 -48 0 -48
WIRE 112 -48 16 -48
WIRE 384 -48 368 -48
WIRE 416 -48 384 -48
WIRE 512 -48 416 -48
WIRE 528 -48 512 -48
WIRE 0 -32 0 -48
WIRE 416 -32 416 -48
WIRE 384 16 384 -48
WIRE 384 16 368 16
WIRE 416 48 416 32
WIRE 528 48 528 32
WIRE 0 64 0 48
WIRE 112 80 48 80
WIRE 416 80 368 80
WIRE 512 80 416 80
WIRE 576 80 512 80
WIRE 416 96 416 80
WIRE 512 96 512 80
WIRE 576 96 576 80
WIRE 48 112 48 80
WIRE 384 144 368 144
WIRE 384 192 384 144
WIRE 416 192 416 176
WIRE 416 192 384 192
WIRE 512 192 512 160
WIRE 512 192 416 192
WIRE 576 192 576 160
WIRE 48 208 48 192
WIRE 416 208 416 192
WIRE 176 224 176 208
WIRE 304 224 304 208
WIRE 176 304 176 288
WIRE 416 304 416 288
SYMBOL res 400 192 R0
SYMATTR InstName R2
SYMATTR Value 24.9k
SYMBOL voltage 0 -48 R0
SYMATTR InstName V1
SYMATTR Value -3.8
SYMBOL ADP7185 240 48 R0
SYMATTR InstName U1
SYMBOL cap 160 224 R0
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap 496 96 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL voltage 48 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.5
SYMBOL res 400 80 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL cap 400 -32 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL cap 560 96 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 512 -64 R0
SYMATTR InstName RLOAD
SYMATTR Value 5
FLAG 0 64 0
FLAG 416 48 0
FLAG 48 208 0
FLAG 304 224 0
FLAG 528 48 0
FLAG 16 -48 IN
FLAG 512 -48 OUT
FLAG 576 192 0
FLAG 176 304 0
FLAG 416 304 0
TEXT 240 352 Center 2 !.tran 20m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2119-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2119-2.5.asy)
Rload OUT 0 2.5
XU1 IN IN N002 0 0 OUT IN N001 IN IN ADP2119-2.5 ;pnba Vin)Pvin)SW)PGND)GND)FB)TRK)Pgood)Sync/Mode)EN
L1 N002 OUT 1.5
R1 OUT N001 100K
V1 IN 0 5
C1 OUT 0 22
.tran 1m
.lib ADP2119-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 0 64 0
WIRE 288 0 128 0
WIRE 64 16 64 0
WIRE 288 32 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 640 64 576 64
WIRE 64 112 64 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 640 144 640 64
WIRE 640 144 560 144
WIRE 736 144 640 144
WIRE 560 160 560 144
WIRE 736 160 736 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 560 256 560 224
WIRE 736 256 736 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 640 304 640 144
WIRE 640 304 416 304
WIRE 288 368 288 352
SYMBOL voltage 64 0 R0
WINDOW 0 27 27 Left 2
WINDOW 3 29 88 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL ADP2119-2.5 288 272 R0
SYMATTR InstName U1
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.5
SYMBOL res 720 144 R0
WINDOW 3 34 68 Left 2
SYMATTR Value 2.5
SYMATTR InstName Rload
FLAG 560 256 0
FLAG 288 368 0
FLAG 64 112 0
FLAG 736 144 OUT
FLAG 736 256 0
FLAG 64 0 IN
TEXT 504 344 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1368.asc
* Generated by LTspice 26.0.1 for Windows.
* Positive Supply Rail Current Sense
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1368.asy)
R2 +V N003 .1
R1 N001 +V 200
C1 OUT 0 .1
MQ1 N004 N002 N001 N001 BSS84
I1 N003 0 SINE(.2 .1 1K)
R3 N004 0 20K
XU2 N004 OUT +V 0 OUT LT1368 ;pnba In+)In-)V+)V-)OUT
XU1 N003 N001 +V 0 N002 LT1368 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1388 720
WIRE 32 16 -112 16
WIRE 80 16 32 16
WIRE 176 16 160 16
WIRE 384 16 176 16
WIRE -112 32 -112 16
WIRE 32 32 32 16
WIRE 224 80 224 64
WIRE 176 96 176 16
WIRE 192 96 176 96
WIRE 384 96 384 16
WIRE 608 96 496 96
WIRE 336 112 256 112
WIRE -112 128 -112 112
WIRE 32 128 32 112
WIRE 192 128 32 128
WIRE 32 144 32 128
WIRE 224 160 224 144
WIRE 544 160 544 144
WIRE 496 176 496 96
WIRE 512 176 496 176
WIRE 608 192 608 96
WIRE 608 192 576 192
WIRE 672 192 608 192
WIRE 720 192 672 192
WIRE 384 208 384 192
WIRE 512 208 384 208
WIRE 672 208 672 192
WIRE 384 224 384 208
WIRE 32 240 32 224
WIRE 544 240 544 224
WIRE 672 288 672 272
WIRE 384 320 384 304
SYMBOL res 368 208 R0
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL opamps\\LT1368 544 128 R0
SYMATTR InstName U2
SYMBOL cap 656 208 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL res 176 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL res 16 16 R0
SYMATTR InstName R2
SYMATTR Value .1
SYMBOL pmos 336 192 M180
WINDOW 0 61 66 Left 2
WINDOW 3 59 31 Left 2
SYMATTR InstName Q1
SYMATTR Value BSS84
SYMBOL voltage -112 16 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL opamps\\LT1368 224 48 R0
SYMATTR InstName U1
SYMBOL current 32 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value SINE(.2 .1 1K)
FLAG -112 128 0
FLAG 224 64 +V
FLAG 720 192 OUT
FLAG 32 240 0
FLAG 224 160 0
FLAG 32 16 +V
FLAG 384 320 0
FLAG 544 144 +V
FLAG 544 240 0
FLAG 672 288 0
TEXT 464 312 Left 2 !.tran 3m
TEXT 408 -16 Bottom 2 ;Positive Supply Rail Current Sense
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG811.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 3.3
VS N001 0 3
V2 N003 0 PULSE(0 2.4 0 10n 10n 980n 2u)
R1 N002 0 47
C1 N002 0 33p
XU1 +V N003 NC_01 NC_02 NC_03 N001 N002 NC_04 NC_05 NC_06 NC_07 NC_08 NC_09 0 ADG811 ;pnba VDD)IN1)IN2)IN3)IN4)S1)D1)S2)D2)S3)D3)S4)D4)GND
.tran 10u
* Note:\nSwitch shown for a logic 1 input.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG811.asy)
.lib ADG811.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -432 -16 -464 -16
WIRE -256 -16 -352 -16
WIRE 0 -16 -32 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE 112 32 112 -16
WIRE -256 48 -432 48
WIRE -592 112 -592 64
WIRE -432 112 -432 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -592 272 -592 192
WIRE -432 272 -432 192
WIRE -144 576 -144 560
FLAG -592 272 0
FLAG -592 64 +V
FLAG -464 -16 0
FLAG -144 -112 +V
FLAG -144 576 0
FLAG -432 272 0
FLAG 0 112 0
FLAG 112 112 0
SYMBOL voltage -592 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage -336 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL voltage -432 96 R0
WINDOW 3 -261 238 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 2.4 0 10n 10n 980n 2u)
SYMATTR InstName V2
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 47
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 33p
SYMBOL ADG811 -144 32 R0
SYMATTR InstName U1
TEXT 104 568 Left 2 !.tran 10u
TEXT -712 -200 Left 2 ;Note:\nSwitch shown for a logic 1 input.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6240.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 -V 0 -5
V3 IN 0 PULSE(-1 1 0 1n 1n 100u 200u)
R1 OUT 0 1K
C1 OUT 0 5p
XU1 IN OUT +V -V OUT LTC6241 ;pnba IN+)IN-)VCC)VEE)OUT
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6240.asy)
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 144 -96 128
WIRE 0 144 0 128
WIRE -96 240 -96 224
WIRE 0 240 0 224
WIRE 256 256 128 256
WIRE 128 320 128 256
WIRE 160 320 128 320
WIRE 256 336 256 256
WIRE 256 336 224 336
WIRE 352 336 256 336
WIRE 448 336 352 336
WIRE 160 352 -80 352
WIRE 352 352 352 336
WIRE 448 352 448 336
WIRE -80 368 -80 352
WIRE 352 448 352 432
WIRE 448 448 448 416
WIRE -80 464 -80 448
FLAG -96 240 0
FLAG 0 240 0
FLAG -80 464 0
FLAG -80 352 IN
FLAG 448 336 OUT
FLAG 352 448 0
FLAG 448 448 0
FLAG 0 128 -V
FLAG -96 128 +V
FLAG 192 304 +V
FLAG 192 368 -V
SYMBOL voltage -96 128 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 0 128 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -80 352 R0
SYMATTR InstName V3
SYMATTR Value PULSE(-1 1 0 1n 1n 100u 200u)
SYMBOL res 336 336 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL cap 432 352 R0
SYMATTR InstName C1
SYMATTR Value 5p
SYMBOL opamps\\LTC6240 192 336 R0
SYMATTR InstName U1
TEXT 544 448 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\16e458f0273f_6255.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6255.asy)
V2 +V 0 5
XU1 IN OUT+ +V 0 OUT+ NC_01 LTC6255 ;pnba In+)In-)V+)V-)OUT)SHDN
V4 IN 0 SINE(2.5 1 25K)
.tran 250u
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 624 -1200 512 -1200
WIRE 288 -1136 288 -1152
WIRE 544 -1136 544 -1152
WIRE 512 -1120 512 -1200
WIRE 528 -1120 512 -1120
WIRE 624 -1104 624 -1200
WIRE 624 -1104 592 -1104
WIRE 656 -1104 624 -1104
WIRE 528 -1088 416 -1088
WIRE 416 -1072 416 -1088
WIRE 544 -1056 544 -1072
WIRE 288 -1040 288 -1056
WIRE 416 -976 416 -992
SYMBOL opamps\\LTC6255 560 -1104 R0
SYMATTR InstName U1
SYMBOL voltage 288 -1152 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 416 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V4
SYMATTR Value SINE(2.5 1 25K)
FLAG 288 -1152 +V
FLAG 288 -1040 0
FLAG 416 -976 0
FLAG 656 -1104 OUT+
FLAG 544 -1056 0
FLAG 416 -1088 IN
FLAG 544 -1152 +V
TEXT 672 -992 Left 2 !.tran 250u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1761-1.1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1761-1.1.asy)
V1 IN 0 1.4
C3 N002 0 1
C1 N004 0 1
R1 OUT 0 1.5
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1761 Radj=7333.33 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
R2 N001 IN 50K
C2 0 N003 10n
C4 OUT 0 10
.tran 1m startup
.lib ADP1761.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL cap 432 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.4
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value 1.5
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL ADP1761-1.1 224 176 R0
SYMATTR InstName U1
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0db9dcab4a2d_Fig_2-134_Vswitch.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N002 0 -1
V2 N001 0 1
V1 CONT 0 PULSE(0 1 0 0.5m 0.5m 0 1m)
S1 SW N002 CONT 0 MYSW
R1 SW N001 1K
.model MYSW SW(Ron=1 Roff=1Meg Vt=0.5 Vh=0.2)
.tran 3m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 724
WIRE 224 64 208 64
WIRE 272 64 224 64
WIRE 416 64 352 64
WIRE 208 96 208 64
WIRE 416 96 416 64
WIRE 160 112 112 112
WIRE -48 160 -208 160
WIRE 160 160 -48 160
WIRE -208 208 -208 160
WIRE 208 224 208 176
WIRE 416 224 416 176
WIRE -208 320 -208 288
WIRE 208 336 208 304
SYMBOL res 256 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 416 80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL voltage -208 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 0.5m 0.5m 0 1m)
SYMBOL voltage 208 208 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value -1
SYMBOL sw 208 80 R0
SYMATTR InstName S1
SYMATTR Value MYSW
FLAG 112 112 0
FLAG 416 224 0
FLAG 208 336 0
FLAG -208 320 0
FLAG -48 160 CONT
FLAG 224 64 SW
TEXT -224 416 Left 2 !.model MYSW SW(Ron=1 Roff=1Meg Vt=0.5 Vh=0.2)
TEXT -224 368 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3204-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3204-5.asy)
XU1 0 IN OUT N001 N002 IN LTC3204-5 ;pnba GND)Vin)Vout)C+)C-)_SHDN
V1 IN 0 3.6
Rload OUT 0 300
C2 OUT 0 2.2
C1 N001 N002 2.2
.tran 1m startup
.lib LTC3204-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 160 -96 160
WIRE 16 160 0 160
WIRE 400 160 272 160
WIRE 496 160 400 160
WIRE -96 176 -96 160
WIRE 400 176 400 160
WIRE 496 176 496 160
WIRE 0 240 0 160
WIRE 16 240 0 240
WIRE 304 240 272 240
WIRE 400 272 400 240
WIRE 496 272 496 256
WIRE -96 288 -96 256
WIRE 16 320 0 320
WIRE 304 320 304 304
WIRE 304 320 272 320
SYMBOL res 480 160 R0
SYMATTR InstName Rload
SYMATTR Value 300
SYMBOL voltage -96 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL cap 288 240 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL PowerProducts\\LTC3204-5 144 240 R0
SYMATTR InstName U1
SYMBOL cap 384 176 R0
SYMATTR InstName C2
SYMATTR Value 2.2
FLAG 400 272 0
FLAG 496 272 0
FLAG 0 320 0
FLAG -96 288 0
FLAG 496 160 OUT
FLAG -96 160 IN
TEXT 336 360 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3377a09c8343_2941-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2941-1.asy)
R1 N001 N003 10K
Vbatt N001 0 3.7
XU2 N001 0 N004 N005 N003 N002 LTC2941-1 B_Reg=60 CD_Reg=32767 EF_Reg=65535 GH_Reg=0 EF_Reg=65535 GH_Reg=0 ;pnba Sense+)GND)StatusReg)ACRreg)_AL/CC)Sense-
V2 N002 0 PULSE(3.9 3.5 1s 10m 10m 1 2)
.tran 5
.lib LTC2941-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1432 680
WIRE 64 -96 -48 -96
WIRE 832 -96 64 -96
WIRE -48 -80 -48 -96
WIRE 832 -48 832 -96
WIRE -48 16 -48 0
WIRE 64 16 64 -96
WIRE 96 16 64 16
WIRE 576 16 416 16
WIRE 720 16 656 16
WIRE 96 112 80 112
WIRE 832 112 832 32
WIRE 832 112 416 112
WIRE 96 208 80 208
WIRE 432 208 416 208
SYMBOL voltage 560 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value PULSE(3.9 3.5 1s 10m 10m 1 2)
SYMBOL LTC2941-1 256 112 R0
SYMATTR InstName U2
SYMATTR Value B_Reg=60 CD_Reg=32767
SYMBOL voltage -48 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vbatt
SYMATTR Value 3.7
SYMBOL res 816 -64 R0
SYMATTR InstName R1
SYMATTR Value 10K
FLAG -48 16 0
FLAG 80 112 0
FLAG 720 16 0
TEXT 600 272 Left 2 !.tran 5
* Z:\home\khalils\Downloads\files\data\raw_asc\0b620862918f_oscillator40.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD820.asy)
XU1 N004 N003 +VCC -VCC N002 AD820 ;pnba In+)In-)V+)V-)OUT
C2 N002 P001 1nf
R5 N002 N001 3k9
V2 -VCC 0 -15
R3 N003 0 10k
C1 N004 0 1nf
V1 +VCC 0 15
D1 N002 N001 1N4148
D2 N001 N002 1N4148
R4 N001 N003 18k
R2 P001 N004 3k74
R1 N004 0 3k74
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran .002 startup uic
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 464 -240 384 -240
WIRE 384 -176 384 -240
WIRE 528 -176 528 -240
WIRE 528 -176 448 -176
WIRE 384 -80 384 -176
WIRE 384 -80 256 -80
WIRE 528 -80 528 -176
WIRE 528 -80 464 -80
WIRE 672 -80 528 -80
WIRE 256 -16 256 -80
WIRE 256 80 256 64
WIRE 400 80 256 80
WIRE 672 96 672 -80
WIRE 672 96 464 96
WIRE 400 112 352 112
WIRE 256 208 256 80
WIRE 352 208 352 112
WIRE 416 208 352 208
WIRE 528 208 416 208
WIRE 672 208 672 96
WIRE 352 288 352 272
WIRE 384 288 352 288
WIRE 416 288 384 288
SYMBOL voltage 144 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL cap 336 208 R0
SYMATTR InstName C1
SYMATTR Value 1nf
SYMBOL diode 464 -224 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL res 480 -96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 3k9
SYMBOL voltage 32 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL cap 672 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1nf
SYMBOL res 240 192 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL OpAmps\\AD820 432 32 R0
SYMATTR InstName U1
SYMBOL res 624 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 3k74
SYMBOL res 400 192 R0
SYMATTR InstName R1
SYMATTR Value 3k74
SYMBOL diode 448 -192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 240 -32 R0
SYMATTR InstName R4
SYMATTR Value 18k
FLAG 32 192 0
FLAG 144 192 0
FLAG 32 112 +VCC
FLAG 144 112 -VCC
FLAG 432 128 -VCC
FLAG 432 64 +VCC
FLAG 384 288 0
FLAG 256 288 0
TEXT -2 312 Left 2 !.tran .002 startup uic