Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1474-5.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 10
L1 N001 OUT 100
D1 0 N001 MBR0530L
C1 OUT 0 100
XU1 OUT N003 N002 0 N001 IN IN N004 LTC1474 top=3.05Meg bot=1Meg ;pnba FB)LBO)LBI)GND)SW)Sense)Vin)Run
Rload OUT 0 25
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1474-5.asy)
.lib LTC1474.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2704 1608
WIRE 1600 1184 1488 1184
WIRE 1776 1184 1600 1184
WIRE 1488 1200 1488 1184
WIRE 1776 1200 1776 1184
WIRE 1600 1264 1600 1184
WIRE 1632 1264 1600 1264
WIRE 2000 1264 1920 1264
WIRE 2064 1264 2000 1264
WIRE 2176 1264 2144 1264
WIRE 2224 1264 2176 1264
WIRE 2336 1264 2224 1264
WIRE 2224 1280 2224 1264
WIRE 2336 1280 2336 1264
WIRE 1488 1296 1488 1280
WIRE 2000 1296 2000 1264
WIRE 1632 1344 1616 1344
WIRE 1936 1344 1920 1344
WIRE 2000 1376 2000 1360
WIRE 2224 1392 2224 1344
WIRE 2336 1392 2336 1360
WIRE 1632 1424 1616 1424
WIRE 2176 1424 2176 1264
WIRE 2176 1424 1920 1424
WIRE 1776 1504 1776 1488
FLAG 1488 1296 0
FLAG 2000 1376 0
FLAG 2224 1392 0
FLAG 2336 1392 0
FLAG 1776 1504 0
FLAG 2336 1264 OUT
FLAG 1488 1184 IN
SYMBOL VOLTAGE 1488 1184 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL ind 2048 1280 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMBOL schottky 1984 1360 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBR0530L
SYMBOL polcap 2208 1280 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMBOL PowerProducts\\LTC1474-5 1776 1344 R0
SYMATTR InstName U1
SYMBOL res 2320 1264 R0
SYMATTR InstName Rload
SYMATTR Value 25
TEXT 2032 1464 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2d2c94a5ac5e_Highpass.asc
* Generated by LTspice 26.0.1 for Windows.
* Watch how the distortion depends on the {SaveTime}\n \nThe reason is a startup transient at V(Vout).\nYou will discover this if you set in .tran the \n{SaveTime} to 0 and watch V(Vout).
R1 Vout 0 18k
C1 Vin Vout {cap}
V1 Vin 0 SINE(0 {InputV} {Freq})
.options plotwinsize 0
.param InputV=20
.param Freq=10
.param Start=0
.param TimeStep=(1/Freq)/40000
.param Stop=15/Freq+TimeStep
.param SaveTime=10/Freq
.tran {Start} {Stop} {SaveTime} {Timestep}
.four {Freq} V(Vout)
.four {Freq} V(Vin)
.step param Cap list 1u 10u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 80 160 80
WIRE 160 80 160 160
WIRE -16 80 -160 80
WIRE -160 80 -160 176
WIRE -160 256 -160 304
WIRE 160 240 160 304
SYMBOL cap -16 96 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName C1
SYMATTR Value {cap}
SYMBOL res 144 144 R0
SYMATTR InstName R1
SYMATTR Value 18k
SYMBOL voltage -160 160 R0
SYMATTR InstName V1
SYMATTR Value SINE(0 {InputV} {Freq})
FLAG -160 304 0
FLAG 160 304 0
FLAG 160 80 Vout
FLAG -160 80 Vin
TEXT -168 -320 Left 0 !.options plotwinsize 0\n.param InputV=20\n.param Freq=10\n.param Start=0\n.param TimeStep=(1/Freq)/40000\n.param Stop=15/Freq+TimeStep\n.param SaveTime=10/Freq\n.tran {Start} {Stop} {SaveTime} {Timestep}\n.four {Freq} V(Vout)\n.four {Freq} V(Vin)\n.step param Cap list 1u 10u
TEXT -176 -520 Left 0 ;Watch how the distortion depends on the {SaveTime}\n \nThe reason is a startup transient at V(Vout).\nYou will discover this if you set in .tran the \n{SaveTime} to 0 and watch V(Vout).
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1083.asc
* Generated by LTspice 26.0.1 for Windows.
R1 OUT N001 121
R2 N001 0 365
V1 IN 0 PWL(0 0 1 10) Rser=0.1
XU1 N001 OUT IN LT1083 ;pnba ADJ)OUT)IN
Rload OUT 0 10
C1 OUT 0 10
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1083.asy)
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1440 896
WIRE 1856 896 1808 896
WIRE 1952 896 1856 896
WIRE 2064 896 1952 896
WIRE 1856 912 1856 896
WIRE 2064 912 2064 896
WIRE 1440 928 1440 896
WIRE 1952 928 1952 896
WIRE 1952 1008 1952 992
WIRE 2064 1008 2064 992
WIRE 1680 1024 1680 992
WIRE 1856 1024 1856 992
WIRE 1856 1024 1680 1024
WIRE 1440 1040 1440 1008
WIRE 1856 1040 1856 1024
WIRE 1856 1136 1856 1120
FLAG 2064 896 OUT
FLAG 1856 1136 0
FLAG 2064 1008 0
FLAG 1440 1040 0
FLAG 1952 1008 0
FLAG 1440 896 IN
SYMBOL RES 1840 896 R0
SYMATTR InstName R1
SYMATTR Value 121
SYMBOL RES 1840 1024 R0
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL VOLTAGE 1440 912 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMATTR SpiceLine Rser=0.1
SYMBOL PowerProducts\\LT1083 1680 896 R0
SYMATTR InstName U1
SYMBOL RES 2048 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL cap 1936 928 R0
SYMATTR InstName C1
SYMATTR Value 10
TEXT 1992 1088 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\f093e3918ef2_opamp.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2, XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Contrib\Toshiba\diode\TBAT54.asy)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
XU2 N002 N003 TBAT54 ;pnba 1)2
R2 Vout N001 10k
V2 Vin 0 0
V1 V28 0 28V
R1 N001 Vin 10k
R3 Vout N002 100k
XU3 N003 0 TBAT54 ;pnba 1)2
XU1 N002 N001 V28 0 Vout LT1001 ;pnba In+)In-)V+)V-)OUT
.dc V2 -10 10 0.5
.lib Contrib/Toshiba/DIODE/TBAT54_enc.lib
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 272 -64 224 -64
WIRE 400 -64 352 -64
WIRE 80 48 64 48
WIRE 224 48 224 -64
WIRE 224 48 160 48
WIRE 256 48 224 48
WIRE 400 64 400 -64
WIRE 400 64 320 64
WIRE 464 64 400 64
WIRE 256 80 224 80
WIRE 224 192 224 80
WIRE 288 192 224 192
WIRE 400 192 400 64
WIRE 400 192 368 192
WIRE -416 240 -416 208
WIRE -272 240 -272 160
WIRE 224 240 224 192
WIRE 224 336 224 304
WIRE 224 432 224 400
IOPIN 464 64 Out
IOPIN 64 48 In
IOPIN -272 160 Out
IOPIN -416 208 Out
RECTANGLE Normal -80 64 -464 -160 2
RECTANGLE Normal -80 448 -528 80 2
RECTANGLE Normal -64 512 608 -160 2
SYMBOL Contrib\\Toshiba\\diode\\TBAT54 208 240 R0
SYMATTR InstName U2
SYMBOL res 368 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 384 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL voltage -272 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL res 176 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -416 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 28V
SYMBOL Contrib\\Toshiba\\diode\\TBAT54 208 336 R0
SYMATTR InstName U3
SYMBOL OpAmps\\OP07 288 0 R0
SYMATTR InstName U1
FLAG 224 432 0
FLAG 288 96 0
FLAG -416 320 0
FLAG -272 320 0
FLAG 464 64 Vout
FLAG 64 48 Vin
FLAG -272 160 Vin
FLAG -416 208 V28
FLAG 288 32 V28
TEXT -448 -104 Left 2 !.dc V2 -10 10 0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\14d34bc083b6_ADG5412BF.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nInterrupt Flag recovery time with pull-up resistor not included\nQinj not included\nOnly one channel included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG5412BF.asy)
XU2 vIN vDrain vSource -V 0 +V vFF ADG5412BF ;pnba IN)D)S)Vss)GND)Vdd)FF
C1 vDrain 0 36p
V2 -V 0 -15
V4 vIN 0 pulse(0 5 0 20n 20n 10u 20u)
V1 +V 0 15
V3 vSource 0 10
C2 vFF 0 12p
R1 vDrain 0 301
.tran 0.1m
.lib ADG5412BF.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -112 -128 -112 -144
WIRE -624 -64 -624 -80
WIRE -400 -48 -432 -48
WIRE -272 -48 -320 -48
WIRE -208 -48 -272 -48
WIRE 48 -48 -16 -48
WIRE 128 -48 48 -48
WIRE 224 -48 128 -48
WIRE 128 -16 128 -48
WIRE 224 0 224 -48
WIRE -240 16 -272 16
WIRE -208 16 -240 16
WIRE 32 16 -16 16
WIRE -624 32 -624 16
WIRE -272 32 -272 16
WIRE 32 48 32 16
WIRE 128 80 128 64
WIRE 224 80 224 64
WIRE -272 112 -272 96
WIRE -624 128 -624 112
WIRE -160 144 -160 128
WIRE -64 144 -64 128
WIRE 32 144 32 128
WIRE -624 224 -624 208
SYMBOL ADG5412BF -112 0 R0
SYMATTR InstName U2
SYMBOL voltage 32 32 R0
WINDOW 3 17 95 Left 2
SYMATTR Value pulse(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V4
SYMBOL voltage -624 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL cap -288 32 R0
SYMATTR InstName C2
SYMATTR Value 12p
SYMBOL voltage -624 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL cap 208 0 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL res 112 -32 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage -304 -48 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
FLAG -624 224 0
FLAG -624 32 0
FLAG -624 -80 +V
FLAG -624 112 -V
FLAG -432 -48 0
FLAG -160 144 -V
FLAG -112 -144 +V
FLAG -64 144 0
FLAG 32 144 0
FLAG 128 80 0
FLAG 224 80 0
FLAG -272 112 0
FLAG 48 -48 vDrain
FLAG -272 -48 vSource
FLAG -240 16 vFF
FLAG 32 16 vIN
TEXT -368 192 Left 2 !.tran 0.1m
TEXT -648 -320 Left 2 ;Note:\nInterrupt Flag recovery time with pull-up resistor not included\nQinj not included\nOnly one channel included\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\107bb11397ec_1990.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1990.asy)
V3 N002 0 SINE(0 1 10K)
V2 -V 0 -5
XU1 0 N002 0 -V N003 OUT +V N001 LT1990 ;pnba REF)IN-)IN+)VEE)GAIN2)OUT)VCC)GAIN1
V1 +V 0 5
.tran 1m
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 112 144 80
WIRE 368 160 336 160
WIRE -32 192 -256 192
WIRE -256 208 -256 192
WIRE -32 224 -32 192
WIRE -16 224 -32 224
WIRE -496 240 -496 224
WIRE -384 240 -384 224
WIRE 384 240 336 240
WIRE -16 256 -32 256
WIRE 368 288 336 288
WIRE -256 304 -256 288
WIRE -32 304 -32 256
WIRE -32 304 -256 304
WIRE -256 320 -256 304
WIRE -496 336 -496 320
WIRE -384 336 -384 320
WIRE 80 432 80 400
WIRE 144 432 144 400
SYMBOL voltage -496 224 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -256 192 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1 10K)
SYMBOL LT1990 160 240 R0
SYMATTR InstName U1
SYMBOL voltage -384 224 R0
SYMATTR InstName V2
SYMATTR Value -5
FLAG -256 320 0
FLAG -496 336 0
FLAG -384 336 0
FLAG 384 240 OUT
FLAG 80 432 0
FLAG -496 224 +V
FLAG -384 224 -V
FLAG 144 80 +V
FLAG 144 432 -V
TEXT 368 352 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1962.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1962.asy)
Rload OUT 0 1K
XU1 OUT OUT N001 0 IN MP_01 MP_02 IN LT1962 ;pnba OUT)ADJ)BYP)GND)_SHDN)))IN
C1 OUT 0 1
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT1962.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 32 320 32
WIRE 416 32 352 32
WIRE 512 32 416 32
WIRE 16 48 -208 48
WIRE 32 48 16 48
WIRE 416 48 416 32
WIRE 512 48 512 32
WIRE -208 64 -208 48
WIRE 352 96 352 32
WIRE 352 96 320 96
WIRE 16 144 16 48
WIRE 32 144 16 144
WIRE 416 144 416 112
WIRE 512 144 512 128
WIRE -208 160 -208 144
WIRE 352 160 320 160
WIRE 176 240 176 208
SYMBOL cap 400 48 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LT1962 176 96 R0
SYMATTR InstName U1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 496 32 R0
SYMATTR InstName Rload
SYMATTR Value 1K
FLAG -208 160 0
FLAG 416 144 0
FLAG 512 144 0
FLAG 176 240 0
FLAG 512 32 OUT
FLAG -208 48 IN
TEXT 384 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\006c0adad7a4_CircuitoBS170.asc
* Generated by LTspice 26.0.1 for Windows.
M1 0 Port1 Port2 Port2 BS170
V1 Port1 0 0 AC 1
I1 Port2 0 100m
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model BS170 VDMOS VTO=1.824 RG=270 RS=1.572 RD=1.436 RB=.768 KP=.1233 Cgdmax=20p Cgdmin=3p CGS=28p Cjo=35p Rds=1.2E8 IS=5p Bv=60 Ibv=10u Tt=161.6n
.net V(port2) V1
.ac dec 1000 100 100Meg
.OPTIONS ALLOW_AMBIGUOUS_MODELS
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2096 680
WIRE 384 -16 240 -16
WIRE 464 -16 384 -16
WIRE 464 16 464 -16
WIRE 240 64 240 -16
WIRE 384 64 384 -16
WIRE 80 144 64 144
WIRE 192 144 80 144
WIRE 80 176 80 144
WIRE 240 176 240 160
WIRE 384 176 384 144
WIRE 384 176 240 176
WIRE 432 176 384 176
WIRE 80 288 80 256
FLAG 64 144 Port1
IOPIN 64 144 In
FLAG 432 176 Port2
IOPIN 432 176 Out
FLAG 80 288 0
FLAG 464 16 0
SYMBOL nmos 192 64 R0
SYMATTR InstName M1
SYMATTR Value BS170
SYMBOL voltage 80 160 R0
WINDOW 3 24 152 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL current 384 144 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 100m
TEXT -472 -200 Left 2 !.model BS170 VDMOS VTO=1.824 RG=270 RS=1.572 RD=1.436 RB=.768 KP=.1233 Cgdmax=20p Cgdmin=3p CGS=28p Cjo=35p Rds=1.2E8 IS=5p Bv=60 Ibv=10u Tt=161.6n
TEXT 616 96 Left 2 !.net V(port2) V1
TEXT -472 232 Left 2 !.ac dec 1000 100 100Meg
TEXT -464 -168 Left 2 !.OPTIONS ALLOW_AMBIGUOUS_MODELS
* Z:\tmp\asc_dec_bjh7r6w2\0bda9a99ecaa_buffer_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
M7 supply IN N002 supply EECMOSP l=l_min_pmos w=w_min_pmos
M4 N003 N001 0 0 EECMOSN l=l_min_nmos w={w_min_nmos*S2}
M8 N002 IN 0 0 EECMOSN l=l_min_nmos w=w_min_nmos
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2424 948
WIRE -848 48 -848 0
WIRE 384 48 384 0
WIRE -768 96 -768 0
WIRE -768 96 -848 96
WIRE 464 96 464 0
WIRE 464 96 384 96
WIRE -896 128 -944 128
WIRE 336 128 288 128
WIRE -992 160 -1056 160
WIRE -944 160 -944 128
WIRE -944 160 -992 160
WIRE -848 160 -848 144
WIRE -400 160 -848 160
WIRE 288 160 288 128
WIRE 288 160 -224 160
WIRE 384 160 384 144
WIRE 880 160 384 160
WIRE -848 176 -848 160
WIRE 384 176 384 160
WIRE -1056 192 -1056 160
WIRE -768 224 -848 224
WIRE 464 224 384 224
WIRE -944 256 -944 160
WIRE -896 256 -944 256
WIRE 288 256 288 160
WIRE 336 256 288 256
WIRE -848 304 -848 272
WIRE -768 304 -768 224
WIRE -768 304 -848 304
WIRE 384 304 384 272
WIRE 464 304 464 224
WIRE 464 304 384 304
WIRE -1056 320 -1056 272
WIRE -848 320 -848 304
WIRE 384 320 384 304
SYMBOL pmos4 -896 48 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=l_min_pmos w=w_min_pmos
SYMATTR InstName M7
SYMATTR Value EECMOSP
SYMBOL nmos4 336 176 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=l_min_nmos w={w_min_nmos*S2}
SYMATTR InstName M4
SYMATTR Value EECMOSN
SYMBOL nmos4 -896 176 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=l_min_nmos w=w_min_nmos
SYMATTR InstName M8
SYMATTR Value EECMOSN
FLAG -1056 320 0
FLAG -992 160 IN
FLAG -848 320 0
FLAG 384 320 0
FLAG 384 0 supply
FLAG 464 0 supply
FLAG -768 0 supply
FLAG -848 0 supply
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4077-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4077-2.asy)
V1 +V 0 15
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
R2 OUT N001 10K
XU1 NC_01 NC_02 NC_03 NC_04 IN NC_05 NC_06 NC_07 ADA4077-2 ;pnba +INA)-INA)OUTA)V+)V-)+INB)-INB)OUTB
Rload OUT 0 10K
V2 -V 0 -15
.tran 1m
.lib ADA4077-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 128 -1120 128 -1136
WIRE 240 -1120 240 -1136
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 128 -1024 128 -1040
WIRE 240 -1024 240 -1040
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 128 -1136 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL Opamps\\ADA4077-2 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 240 -1136 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
FLAG 128 -1136 +V
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 240 -1136 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 768 -992 0
FLAG 240 -1024 0
FLAG 128 -1024 0
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\f4b59c3c1eaf_esquematico_circuitos2.asc
* Generated by LTspice 26.0.1 for Windows.
vref N008 0 10
R6 N001 N002 1k
R4 N010 0 10k
R5 N001 N003 1k
Q6 N006 N004 N003 0 2N3906
R3 N007 0 3.33
QMI_TRANSISTOR2 N007 N005 N001 0 PNP
Q1 N004 N008 N010 0 2N3904
Q5 N004 N004 N002 0 2N3906
QMI_TRANSISTOR N005 N006 N007 0 NPN
R1 N009 0 4k
R2 N007 N009 1k
Q4 N006 N009 N010 0 2N3904
vin N001 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc vin 12 30 0.01
.MODEL MI_TRANSISTOR NPN ( BF=50)
.MODEL MI_TRANSISTOR2 PNP ( BF=50)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1440 680
WIRE -112 -400 -320 -400
WIRE 112 -400 -112 -400
WIRE 464 -400 112 -400
WIRE -112 -288 -112 -320
WIRE 112 -288 112 -320
WIRE 0 -240 -48 -240
WIRE 48 -240 0 -240
WIRE -320 -224 -320 -400
WIRE 464 -208 464 -400
WIRE 400 -160 368 -160
WIRE -112 -144 -112 -192
WIRE 0 -144 0 -240
WIRE 0 -144 -112 -144
WIRE 368 -128 368 -160
WIRE 368 -128 272 -128
WIRE 112 -80 112 -192
WIRE 208 -80 112 -80
WIRE 464 -32 464 -112
WIRE 464 -32 272 -32
WIRE -112 16 -112 -144
WIRE 112 16 112 -80
WIRE -176 64 -272 64
WIRE 240 64 176 64
WIRE 320 64 240 64
WIRE 464 64 464 -32
WIRE 464 64 400 64
WIRE -272 112 -272 64
WIRE 0 112 -112 112
WIRE 112 112 0 112
WIRE 464 128 464 64
WIRE 240 144 240 64
WIRE 0 160 0 112
WIRE -272 224 -272 192
WIRE 464 240 464 208
SYMBOL npn 176 16 M0
SYMATTR InstName Q4
SYMATTR Value 2N3904
SYMBOL voltage -320 -240 R0
SYMATTR InstName vin
SYMATTR Value ""
SYMBOL pnp -48 -192 R180
SYMATTR InstName Q5
SYMATTR Value 2N3906
SYMBOL res 224 128 R0
SYMATTR InstName R1
SYMATTR Value 4k
SYMBOL npn -176 16 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 448 112 R0
SYMATTR InstName R3
SYMATTR Value 3.33
SYMBOL res 96 -416 R0
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL pnp 48 -192 M180
SYMATTR InstName Q6
SYMATTR Value 2N3906
SYMBOL pnp 400 -112 M180
SYMATTR InstName MI_TRANSISTOR2
SYMBOL voltage -272 96 R0
SYMATTR InstName vref
SYMATTR Value 10
SYMBOL res -16 144 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL res 416 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL npn 208 -128 R0
SYMATTR InstName MI_TRANSISTOR
SYMBOL res -128 -416 R0
SYMATTR InstName R6
SYMATTR Value 1k
FLAG 240 224 0
FLAG 464 240 0
FLAG 0 240 0
FLAG -272 224 0
FLAG -320 -144 0
TEXT -354 264 Left 2 !.dc vin 12 30 0.01
TEXT 80 -504 Left 2 !.MODEL MI_TRANSISTOR NPN ( BF=50)
TEXT 616 -480 Left 2 !.MODEL MI_TRANSISTOR2 PNP ( BF=50)
* Z:\home\khalils\Downloads\files\data\raw_asc\d4c73f554478_TS0.asc
* Generated by LTspice 26.0.1 for Windows.
V1 V1 N003 SINE(0 1 0 0 0 0 1000) AC 1 0
R1 N001 V1 {R3}
R2 V2 N001 {R3}
R3 0 N002 {R3}
C1 N002 N003 {1/R3}
XU1 N001 N002 V2 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
.ac dec 100 .1 10
.param R3=1
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
WIRE 208 32 64 32
WIRE 352 32 288 32
WIRE 640 32 352 32
WIRE 752 32 720 32
WIRE 64 96 64 32
WIRE 352 128 352 32
WIRE 400 128 352 128
WIRE 752 144 752 32
WIRE 752 144 464 144
WIRE 800 144 752 144
WIRE 400 160 352 160
WIRE 64 240 64 176
WIRE 160 240 64 240
WIRE 256 240 224 240
WIRE 352 240 352 160
WIRE 352 240 256 240
WIRE 256 288 256 240
WIRE 256 400 256 368
FLAG 256 400 0
FLAG 64 32 V1
IOPIN 64 32 In
FLAG 800 144 V2
IOPIN 800 144 Out
SYMBOL voltage 64 80 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 24 152 Left 2
SYMATTR Value2 AC 1 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 0 0 0 0 1000)
SYMBOL res 304 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R3}
SYMBOL res 736 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R3}
SYMBOL res 272 384 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value {R3}
SYMBOL cap 224 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {1/R3}
SYMBOL OpAmps\\opamp 432 80 R0
SYMATTR InstName U1
TEXT 488 272 Left 2 !.ac dec 100 .1 10
TEXT 496 312 Left 2 !.param R3=1
TEXT 496 344 Left 2 !.lib opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6016.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N003 N002 +V -V Out LT6016 ;pnba IN+)IN-)VCC)VEE)OUT
V1 +V 0 5
V2 -V 0 -5
Vcom N001 0 50
R1 N002 N001 1K
R2 N003 N004 1K
Vin N001 N004 SINE(0 10m 1K)
R3 0 N003 100K
R4 Out N002 100K
.tran 5m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6016.asy)
.lib LT6016.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 64 -48 64
WIRE 192 64 80 64
WIRE 336 64 272 64
WIRE 416 64 336 64
WIRE 528 64 496 64
WIRE -48 80 -48 64
WIRE 80 144 80 64
WIRE 416 160 416 144
WIRE -48 176 -48 160
WIRE 336 176 336 64
WIRE 384 176 336 176
WIRE 528 192 528 64
WIRE 528 192 448 192
WIRE 576 192 528 192
WIRE 384 208 336 208
WIRE 416 240 416 224
WIRE 80 304 80 224
WIRE 192 304 80 304
WIRE 336 304 336 208
WIRE 336 304 272 304
WIRE 416 304 336 304
WIRE 576 304 496 304
WIRE -144 320 -144 304
WIRE -48 320 -48 304
WIRE 576 320 576 304
WIRE -144 416 -144 400
WIRE -48 416 -48 400
FLAG -144 416 0
FLAG -48 416 0
FLAG -144 304 +V
FLAG 416 240 -V
FLAG -48 176 0
FLAG 576 320 0
FLAG 576 192 Out
FLAG 416 144 +V
FLAG -48 304 -V
SYMBOL LT6016 416 192 R0
SYMATTR InstName U1
SYMBOL voltage -144 304 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -48 304 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -48 64 R0
SYMATTR InstName Vcom
SYMATTR Value 50
SYMBOL res 288 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 288 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 80 128 R0
SYMATTR InstName Vin
SYMATTR Value SINE(0 10m 1K)
SYMBOL res 512 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res 512 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100K
TEXT 520 384 Left 2 !.tran 5m