Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP160-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP160-1.5.asy)
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
C1 OUT 0 1
Rload OUT 0 150
XU1 IN 0 N001 OUT ADP16xfd K=666.7u ;pnba Vin)GND)En)Vout
V1 IN 0 5
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -48 96
WIRE 400 96 352 96
WIRE 496 96 400 96
WIRE -48 112 -48 96
WIRE 400 112 400 96
WIRE 496 112 496 96
WIRE -48 208 -48 192
WIRE 160 208 16 208
WIRE 400 208 400 176
WIRE 496 208 496 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL res 480 96 R0
SYMATTR InstName Rload
SYMATTR Value 150
SYMBOL cap 384 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -48 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL ADP160-1.5 256 208 R0
SYMATTR InstName U1
FLAG -48 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 496 208 0
FLAG 496 96 OUT
FLAG -48 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\b20ee90a939e_Draft5.asc
* Generated by LTspice 26.0.1 for Windows.
* Current Mirror Circuit
R2 N002 N004 100
R1 N001 N003 100
M2 N003 N003 0 0 NMOS
M1 N004 N003 0 0 NMOS
V2 N002 0 12V
V1 N001 0 12V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 -16 -80 -16
WIRE 528 -16 352 -16
WIRE -80 32 -80 -16
WIRE 80 32 80 -16
WIRE 352 32 352 -16
WIRE 528 32 528 -16
WIRE 80 128 80 112
WIRE 176 128 80 128
WIRE 80 144 80 128
WIRE 352 144 352 112
WIRE -80 208 -80 112
WIRE 176 224 176 128
WIRE 176 224 128 224
WIRE 304 224 176 224
WIRE 528 240 528 112
WIRE 80 320 80 240
WIRE 352 320 352 240
WIRE 352 320 80 320
WIRE 352 384 352 320
SYMBOL res 64 16 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage -80 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12V
SYMBOL nmos 304 144 R0
SYMATTR InstName M1
SYMBOL nmos 128 144 M0
SYMATTR InstName M2
SYMBOL voltage 528 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12V
SYMBOL res 336 16 R0
SYMATTR InstName R2
SYMATTR Value 100
FLAG 352 384 0
FLAG -80 208 0
FLAG 528 240 0
TEXT -112 408 Left 2 !.tran 100m
TEXT 104 -56 Left 2 ;Current Mirror Circuit
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3548.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3548.asy)
L2 N001 OUT2 4.7
Rload1 OUT1 0 5
XU1 N004 IN IN N002 0 IN N001 MP_01 IN N003 LTC3548 ;pnba FB1)Run1)Vin)SW1)GND)Mode)SW2))Run2)FB2
R3 N003 0 280K
R1 N004 0 301K
C3 OUT2 N003 68p
C4 OUT1 N004 33p
Rload2 OUT2 0 20
R4 OUT2 N003 887K
V1 IN 0 2.8
R2 OUT1 N004 604K
C2 OUT2 0 4.7
L1 N002 OUT1 2.2
C1 OUT1 0 10
.tran 1m startup
.lib LTC3548.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 708
WIRE 176 32 16 32
WIRE 272 32 176 32
WIRE 352 32 272 32
WIRE 432 32 352 32
WIRE 16 48 16 32
WIRE 272 64 272 32
WIRE 352 64 352 32
WIRE 432 64 432 32
WIRE 176 128 176 32
WIRE 208 128 176 128
WIRE 16 144 16 128
WIRE -128 224 -272 224
WIRE -48 224 -128 224
WIRE 48 224 -48 224
WIRE 96 224 48 224
WIRE 208 224 176 224
WIRE 528 224 496 224
WIRE 640 224 608 224
WIRE 752 224 640 224
WIRE 832 224 752 224
WIRE 928 224 832 224
WIRE -272 240 -272 224
WIRE -128 240 -128 224
WIRE -48 240 -48 224
WIRE 48 240 48 224
WIRE 640 240 640 224
WIRE 752 240 752 224
WIRE 832 240 832 224
WIRE 928 240 928 224
WIRE -272 336 -272 320
WIRE -128 336 -128 304
WIRE -48 336 -48 304
WIRE 48 336 48 320
WIRE 48 336 -48 336
WIRE 208 336 48 336
WIRE 640 336 640 320
WIRE 640 336 496 336
WIRE 752 336 752 304
WIRE 752 336 640 336
WIRE 832 336 832 304
WIRE 928 336 928 320
WIRE 48 352 48 336
WIRE 640 352 640 336
WIRE 352 400 352 384
WIRE 48 448 48 432
WIRE 640 448 640 432
SYMBOL res 32 224 R0
SYMATTR InstName R4
SYMATTR Value 887K
SYMBOL cap 736 240 R0
SYMATTR InstName C4
SYMATTR Value 33p
SYMBOL res -288 224 R0
SYMATTR InstName Rload2
SYMATTR Value 20
SYMBOL res 912 224 R0
SYMATTR InstName Rload1
SYMATTR Value 5
SYMBOL ind 512 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL VOLTAGE 16 32 R0
SYMATTR InstName V1
SYMATTR Value 2.8
SYMBOL res 32 336 R0
SYMATTR InstName R3
SYMATTR Value 280K
SYMBOL res 624 336 R0
SYMATTR InstName R1
SYMATTR Value 301K
SYMBOL polcap -144 240 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL ind 192 240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 4.7
SYMBOL PowerProducts\\LTC3548 352 224 R0
SYMATTR InstName U1
SYMBOL cap -64 240 R0
SYMATTR InstName C3
SYMATTR Value 68p
SYMBOL res 624 224 R0
SYMATTR InstName R2
SYMATTR Value 604K
SYMBOL polcap 816 240 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 16 144 0
FLAG 352 400 0
FLAG 832 336 0
FLAG 928 336 0
FLAG 16 32 IN
FLAG 928 224 OUT1
FLAG 640 448 0
FLAG -128 336 0
FLAG -272 336 0
FLAG -272 224 OUT2
FLAG 48 448 0
TEXT 272 440 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3531-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 N002 10
V1 IN 0 3.6
C1 OUT 0 10
Rload OUT 0 20
XU1 N001 IN 0 IN MP_01 OUT N002 0 LTC3531-X Vout=3.3 ;pnba SW1)Vin)GND)_SHDN))OUT)SW2)PGND
.tran 500u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3531-3.3.asy)
.lib LTC3531-X.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 96 128 96
WIRE 288 96 256 96
WIRE 128 144 128 96
WIRE 288 144 288 96
WIRE 48 224 -32 224
WIRE 64 224 48 224
WIRE 416 224 352 224
WIRE 528 224 416 224
WIRE -32 240 -32 224
WIRE 416 240 416 224
WIRE 528 240 528 224
WIRE -32 336 -32 320
WIRE 48 336 48 224
WIRE 64 336 48 336
WIRE 416 336 416 304
WIRE 528 336 528 320
WIRE 128 432 128 416
WIRE 288 432 288 416
FLAG -32 336 0
FLAG 288 432 0
FLAG 128 432 0
FLAG 416 336 0
FLAG 528 336 0
FLAG 528 224 OUT
FLAG -32 224 IN
SYMBOL ind 160 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL voltage -32 224 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL cap 400 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 512 224 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL PowerProducts\\LTC3531-3.3 208 272 R0
SYMATTR InstName U1
TEXT 400 400 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1eaca87bdaa6_circuito_base.asc
* Generated by LTspice 26.0.1 for Windows.
Cn N001 N004 C
L1b N001 VCC L
L1a VCC N002 Ls
Q1 N002 N004 0 0 NPN
RL N003 0 R
CA N003 N002 C
C1 N002 0 cs
K1 L1a L1b 1
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 -80 32 -80
WIRE 192 -32 192 -80
WIRE 32 32 32 -80
WIRE 288 48 192 48
WIRE 192 144 192 128
WIRE 304 144 192 144
WIRE 352 144 304 144
WIRE 464 144 416 144
WIRE 192 160 192 144
WIRE 304 176 304 144
WIRE 464 176 464 144
WIRE 32 208 32 96
WIRE 32 208 -48 208
WIRE 128 208 32 208
WIRE 192 304 192 256
WIRE 304 304 304 240
WIRE 464 304 464 256
SYMBOL cap 416 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName CA
SYMBOL res 448 160 R0
SYMATTR InstName RL
SYMBOL cap 16 32 R0
SYMATTR InstName Cn
SYMBOL npn 128 160 R0
SYMATTR InstName Q1
SYMBOL cap 288 176 R0
SYMATTR InstName C1
SYMATTR Value cs
SYMBOL ind2 176 32 R0
SYMATTR InstName L1a
SYMATTR Value Ls
SYMATTR Type ind
SYMBOL ind2 176 -48 R0
SYMATTR InstName L1b
SYMATTR Type ind
FLAG 192 304 0
FLAG 304 304 0
FLAG 464 304 0
FLAG 288 48 VCC
TEXT 256 -48 Left 2 !K1 L1a L1b 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3089.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3089.asy)
R3 N004 0 30.1K
R4 OUT N003 5.1k
C1 OUT 0 10 V=6.3 Irms=0 Rser=0.001 Lser=0 mfg="TDK" pn="C3216X5ROJ106M" type="X5R"
V1 IN 0 5
XU1 N003 N004 N002 OUT N001 IN LT3089 ;pnba Ilim)SET)Imon)OUT)Temp)IN
C3 IN 0 1
R5 OUT 0 390
Rload OUT 0 1.875
R1 N001 0 1K
C2 N004 0 0.01
R2 N002 0 1K
.tran .1 startup
.lib LT3089.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 680
WIRE -112 64 -256 64
WIRE 224 64 -112 64
WIRE -256 80 -256 64
WIRE -112 80 -112 64
WIRE 224 96 224 64
WIRE 0 160 -16 160
WIRE 96 160 80 160
WIRE 400 160 352 160
WIRE 528 160 400 160
WIRE 624 160 528 160
WIRE 736 160 624 160
WIRE -256 176 -256 160
WIRE -112 176 -112 144
WIRE 400 176 400 160
WIRE 624 176 624 160
WIRE 736 176 736 160
WIRE 528 192 528 160
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 400 256 352 256
WIRE 528 272 528 256
WIRE 624 272 624 256
WIRE 624 272 528 272
WIRE 736 272 736 256
WIRE 528 288 528 272
WIRE 224 336 224 320
WIRE 320 336 224 336
WIRE 320 416 320 400
WIRE 320 416 224 416
WIRE 224 432 224 416
SYMBOL res 96 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL cap -128 80 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 208 320 R0
SYMATTR InstName R3
SYMATTR Value 30.1K
SYMBOL cap 304 336 R0
SYMATTR InstName C2
SYMATTR Value 0.01
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 384 160 R0
SYMATTR InstName R4
SYMATTR Value 5.1k
SYMBOL res 720 160 R0
SYMATTR InstName Rload
SYMATTR Value 1.875
SYMBOL voltage -256 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 608 160 R0
SYMATTR InstName R5
SYMATTR Value 390
SYMBOL cap 512 192 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.001 Lser=0 mfg="TDK" pn="C3216X5ROJ106M" type="X5R"
SYMBOL LT3089 224 208 R0
SYMATTR InstName U1
FLAG -16 160 0
FLAG -16 256 0
FLAG 224 432 0
FLAG -256 176 0
FLAG -256 64 IN
FLAG 736 160 OUT
FLAG 528 288 0
FLAG 736 272 0
FLAG -112 176 0
TEXT 432 352 Left 2 !.tran .1 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX44280.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX44280.asy)
R1 OUT 0 10k
R2 OUT N002 1k
V2 V+ 0 3.3
XU1 IN N002 V+ 0 OUT V+ MAX44280 ;pnba 1)2)3)4)5)6
R3 N002 N001 250
V4 N001 0 1.65
V1 IN N001 SINE(0 10m 1Meg)
.tran 2u
.lib MAX44280.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -192 -32 -208 -32
WIRE -48 -32 -64 -32
WIRE 48 -32 32 -32
WIRE 96 -32 48 -32
WIRE 224 -32 176 -32
WIRE -208 0 -208 -32
WIRE 112 64 112 48
WIRE 48 80 48 -32
WIRE 96 80 48 80
WIRE -208 96 -208 80
WIRE 224 96 224 -32
WIRE 224 96 160 96
WIRE 336 96 224 96
WIRE 96 112 48 112
WIRE 336 112 336 96
WIRE 112 144 112 128
WIRE 144 144 144 128
WIRE 48 160 48 112
WIRE 336 208 336 192
WIRE -64 272 -64 -32
WIRE 48 272 48 240
WIRE 48 272 -64 272
WIRE -64 288 -64 272
WIRE -64 384 -64 368
SYMBOL res 320 96 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -208 -16 R0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL voltage 48 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 43 50 Left 2
WINDOW 3 38 80 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10m 1Meg)
SYMBOL voltage -64 272 R0
SYMATTR InstName V4
SYMATTR Value 1.65
SYMBOL MAX44280 128 96 R0
SYMATTR InstName U1
SYMBOL res 48 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 250
SYMBOL res 192 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 336 208 0
FLAG 336 96 OUT
FLAG 48 112 IN
FLAG -64 384 0
FLAG -208 96 0
FLAG -208 -32 V+
FLAG 112 48 V+
FLAG 144 144 V+
FLAG 112 144 0
TEXT -248 376 Left 2 !.tran 2u
* Z:\home\khalils\Downloads\files\data\raw_asc\945dd535d21e_MOSFET_output.asc
* Generated by LTspice 26.0.1 for Windows.
VGS N002 0 0
M1 N001 N002 0 0 MC8
VDS N001 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VDS 0 5 0.01 VGS 0.6 1 0.1
.model MC8 NMOS (KP=60e-3 VTO=0.5 LAMBDA=0)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1412 680
WIRE 320 80 160 80
WIRE 160 112 160 80
WIRE 320 128 320 80
WIRE 240 160 160 160
WIRE 112 192 32 192
WIRE 32 208 32 192
WIRE 160 288 160 208
WIRE 240 288 240 160
WIRE 320 288 320 208
WIRE 32 320 32 288
SYMBOL voltage 320 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 1
SYMBOL nmos4 112 112 R0
SYMATTR InstName M1
SYMATTR Value MC8
SYMBOL voltage 32 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 0
FLAG 32 320 0
FLAG 160 288 0
FLAG 320 288 0
FLAG 240 288 0
TEXT 8 368 Left 2 !.dc VDS 0 5 0.01 VGS 0.6 1 0.1
TEXT 8 408 Left 2 !.model MC8 NMOS (KP=60e-3 VTO=0.5 LAMBDA=0)
* Z:\home\khalils\Downloads\files\data\raw_asc\19abd5b24485_tsmcInverter_ring_osc.asc
* Generated by LTspice 26.0.1 for Windows.
C2 out2 0 2.18p
R2 vcc out2 823.7
R1 vcc out1 823.7
M2 out2 out1 0 0 cmosn l=0.2u w={x}
R3 vcc out3 823.7
C1 out1 0 2.18p
C3 out3 0 2.18p
M1 out1 out3 0 0 cmosn l=0.2u w={x}
M3 out3 out2 0 0 cmosn l=0.2u w={x}
V1 vcc 0 2.5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include pretendTsmcModels_18.lib
.tran 0 200n 0 .1n
.options plotwinsize=0
.param x=10u
.ic V(out3)=2 ; quick startup
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 680
WIRE 976 -96 -48 -96
WIRE 64 -32 -176 -32
WIRE 432 -32 64 -32
WIRE 800 -32 432 -32
WIRE 64 0 64 -32
WIRE 432 0 432 -32
WIRE 800 0 800 -32
WIRE -176 16 -176 -32
WIRE 64 112 64 80
WIRE 144 112 64 112
WIRE 240 112 144 112
WIRE 336 112 240 112
WIRE 432 112 432 80
WIRE 512 112 432 112
WIRE 608 112 512 112
WIRE 704 112 608 112
WIRE 800 112 800 80
WIRE 880 112 800 112
WIRE 976 112 976 -96
WIRE 976 112 880 112
WIRE -176 128 -176 96
WIRE 64 160 64 112
WIRE 432 160 432 112
WIRE 800 160 800 112
WIRE 240 176 240 112
WIRE 608 176 608 112
WIRE 976 176 976 112
WIRE 128 208 64 208
WIRE 496 208 432 208
WIRE 864 208 800 208
WIRE -48 240 -48 -96
WIRE 16 240 -48 240
WIRE 336 240 336 112
WIRE 384 240 336 240
WIRE 704 240 704 112
WIRE 752 240 704 240
WIRE 64 288 64 256
WIRE 240 288 240 240
WIRE 432 288 432 256
WIRE 608 288 608 240
WIRE 800 288 800 256
WIRE 976 288 976 240
SYMBOL nmos4 752 160 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=0.2u w={x}
SYMATTR InstName M3
SYMATTR Value cmosn
SYMBOL res 48 -16 R0
SYMATTR InstName R1
SYMATTR Value 823.7
SYMBOL nmos4 16 160 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=0.2u w={x}
SYMATTR InstName M1
SYMATTR Value cmosn
SYMBOL cap 960 176 R0
SYMATTR InstName C3
SYMATTR Value 2.18p
SYMBOL nmos4 384 160 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=0.2u w={x}
SYMATTR InstName M2
SYMATTR Value cmosn
SYMBOL cap 592 176 R0
SYMATTR InstName C2
SYMATTR Value 2.18p
SYMBOL voltage -176 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL cap 224 176 R0
SYMATTR InstName C1
SYMATTR Value 2.18p
SYMBOL res 416 -16 R0
SYMATTR InstName R2
SYMATTR Value 823.7
SYMBOL res 784 -16 R0
SYMATTR InstName R3
SYMATTR Value 823.7
FLAG 64 288 0
FLAG 144 112 out1
FLAG -176 128 0
FLAG 240 288 0
FLAG 128 208 0
FLAG 432 -32 vcc
FLAG 432 288 0
FLAG 512 112 out2
FLAG 608 288 0
FLAG 496 208 0
FLAG 800 288 0
FLAG 880 112 out3
FLAG 976 288 0
FLAG 864 208 0
TEXT -64 -272 Left 0 !.include pretendTsmcModels_18.lib
TEXT -64 -232 Left 0 !.tran 0 200n 0 .1n
TEXT -64 -184 Left 0 !.options plotwinsize=0
TEXT 264 -224 Left 0 !.param x=10u
TEXT 272 -184 Left 0 !.ic V(out3)=2 ; quick startup
TEXT -48 -136 Left 0 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\0213aa848440_SparkGap.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\neonbulb.asy)
XU1 2 0 Spark_Gap ;pnba V+)V-
R_ion 1 2 R=10/V(ion)**.75 ; dynamic ionization resistance
C_ion ion 0 190n Rpar=1 ; ionization time constant
R_off 1 2 1e6 ; dark resistance (affects breakdown voltage)
R1 2 1 10
V1 1 0 SINE(0 300 100k)
V_ion 3 4 0 ; current sense for behavioral sources
B_ion 0 ion I=I(V_ion)**2 ; measure of channel ionization
Dfall 2 3 10V ; bidirectional cathode fall voltage
.subckt spark_gap 1 4
.model 10V d(Vfwd=10 Vrev=10 Ron=10m)
.ends spark_gap
.tran 0 20u 0 50n
.lib neonbulb.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -464 -32 -480 -32
WIRE -400 -32 -464 -32
WIRE -256 -32 -320 -32
WIRE -240 -32 -256 -32
WIRE -240 0 -240 -32
WIRE -480 16 -480 -32
WIRE -480 128 -480 96
WIRE -240 128 -240 96
SYMBOL voltage -480 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 300 100k)
SYMBOL Misc\\neonbulb -240 48 R0
WINDOW 3 17 56 Left 0
SYMATTR InstName U1
SYMATTR Value2 ""
SYMATTR SpiceModel ""
SYMATTR SpiceLine ""
SYMATTR SpiceLine2 ""
SYMATTR Value Spark_Gap
SYMBOL res -304 -48 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 10
FLAG -240 128 0
FLAG -480 128 0
FLAG -464 -32 1
FLAG -256 -32 2
TEXT -536 224 Left 0 !.subckt spark_gap 1 4\nR_off 1 2 1e6 ; dark resistance (affects breakdown voltage)\nR_ion 1 2 R=10/V(ion)**.75 ; dynamic ionization resistance\nDfall 2 3 10V ; bidirectional cathode fall voltage\nV_ion 3 4 0 ; current sense for behavioral sources\nB_ion 0 ion I=I(V_ion)**2 ; measure of channel ionization\nC_ion ion 0 190n Rpar=1 ; ionization time constant\n.model 10V d(Vfwd=10 Vrev=10 Ron=10m)\n.ends spark_gap
TEXT -536 160 Left 0 !.tran 0 20u 0 50n
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP172-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP172-1.5.asy)
C1 OUT 0 1
XU1 OUT IN IN 0 ADP172-1.5 ;pnba Vout)Vin)En)GND
V1 IN 0 3.6
RLOAD OUT 0 5
.tran 2m startup
.lib ADP172-1.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 80 -48 80
WIRE 48 80 -32 80
WIRE 64 80 48 80
WIRE 304 80 256 80
WIRE 336 80 304 80
WIRE 384 80 336 80
WIRE -48 96 -48 80
WIRE 304 96 304 80
WIRE 304 176 304 160
WIRE 384 176 384 160
WIRE -48 192 -48 176
WIRE 48 192 48 80
WIRE 64 192 48 192
WIRE 272 192 256 192
SYMBOL voltage -48 80 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL cap 288 96 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ADP172-1.5 160 192 R0
SYMATTR InstName U1
SYMBOL res 368 64 R0
SYMATTR InstName RLOAD
SYMATTR Value 5
FLAG -48 192 0
FLAG 304 176 0
FLAG 272 192 0
FLAG 384 176 0
FLAG -32 80 IN
FLAG 336 80 OUT
TEXT 160 256 Center 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\15926eb2eaab_LT1016.asc
* Generated by LTspice 26.0.1 for Windows.
* 10MHz
* 10MHz to 25MHz Crystal Oscillator
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1016.asy)
R2 N003 0 4K
R1 N002 N001 2K
C2 N003 N004 820p
R3 +V N003 4K
V1 +V 0 PWL(0 0 .5u 5)
CY1 N002 N003 .32p Rser=45 Lser=.78m Cpar=18p
C1 N001 0 200p
XU1 +V N003 N001 0 0 0 N002 OUT LT1016 ;pnba V+)In+)In-)V-)LATCH)GND)OUT+)OUT-
R4 N004 0 22
.tran 10u
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE 336 -16 320 -16
WIRE 416 -16 400 -16
WIRE 432 -16 416 -16
WIRE 576 -16 512 -16
WIRE 224 32 224 16
WIRE 416 96 416 -16
WIRE 432 96 416 96
WIRE 576 96 576 -16
WIRE 576 96 512 96
WIRE 224 128 224 112
WIRE 320 128 224 128
WIRE 416 128 320 128
WIRE 432 128 416 128
WIRE 608 128 512 128
WIRE 224 144 224 128
WIRE 320 144 320 128
WIRE 448 176 448 160
WIRE 464 176 464 160
WIRE 464 176 448 176
WIRE 480 176 480 160
WIRE 480 176 464 176
WIRE 464 192 464 176
WIRE 96 208 96 192
WIRE 320 224 320 208
WIRE 224 240 224 224
WIRE 416 240 416 128
WIRE 480 240 416 240
WIRE 576 240 576 96
WIRE 576 240 544 240
WIRE 96 304 96 288
WIRE 320 320 320 304
SYMBOL res 208 128 R0
SYMATTR InstName R2
SYMATTR Value 4K
SYMBOL res 304 208 R0
SYMATTR InstName R4
SYMATTR Value 22
SYMBOL Comparators\\LT1016 464 48 R0
WINDOW 3 24 102 Left 2
SYMATTR InstName U1
SYMBOL res 528 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL res 208 16 R0
SYMATTR InstName R3
SYMATTR Value 4K
SYMBOL cap 304 144 R0
SYMATTR InstName C2
SYMATTR Value 820p
SYMBOL cap 400 -32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 200p
SYMBOL misc\\xtal 544 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 Invisible 2
SYMATTR InstName Y1
SYMATTR Value .32p
SYMATTR SpiceLine Rser=45 Lser=.78m Cpar=18p
SYMBOL voltage 96 192 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 .5u 5)
FLAG 96 304 0
FLAG 464 64 +V
FLAG 224 16 +V
FLAG 320 -16 0
FLAG 224 240 0
FLAG 464 192 0
FLAG 320 320 0
FLAG 96 192 +V
FLAG 608 128 OUT
TEXT 528 312 Left 2 !.tran 10u
TEXT 512 264 Top 2 ;10MHz
TEXT 440 -72 Bottom 2 ;10MHz to 25MHz Crystal Oscillator
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP172-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP172-1.5.asy)
RLOAD OUT 0 5
C1 OUT 0 1
V1 IN 0 3.6
XU1 OUT IN IN 0 ADP172-1.5 ;pnba Vout)Vin)En)GND
.tran 2m startup
.lib ADP172-1.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 80 -48 80
WIRE 48 80 -32 80
WIRE 64 80 48 80
WIRE 304 80 256 80
WIRE 336 80 304 80
WIRE 384 80 336 80
WIRE -48 96 -48 80
WIRE 304 96 304 80
WIRE 304 176 304 160
WIRE 384 176 384 160
WIRE -48 192 -48 176
WIRE 48 192 48 80
WIRE 64 192 48 192
WIRE 272 192 256 192
SYMBOL res 368 64 R0
SYMATTR InstName RLOAD
SYMATTR Value 5
SYMBOL ADP172-1.5 160 192 R0
SYMATTR InstName U1
SYMBOL voltage -48 80 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL cap 288 96 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG -48 192 0
FLAG 304 176 0
FLAG 272 192 0
FLAG 384 176 0
FLAG -32 80 IN
FLAG 336 80 OUT
TEXT 160 256 Center 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4891.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4891.asy)
R1 N001 0 10K
Rload OUT 0 10K
V1 +V 0 2.5
R2 OUT N001 10K
Vin IN 0 SINE(0 1 10K)
XU1 IN N001 +V -V OUT ADA4891-1 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -2.5
.tran 1m
.lib ADA4891-1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1136 144 -1152
WIRE 256 -1136 256 -1152
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1040 144 -1056
WIRE 256 -1040 256 -1056
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL ADA4891 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 256 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 144 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 144 -1152 +V
FLAG 144 -1040 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1152 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 768 -992 0
FLAG 256 -1040 0
TEXT 752 -936 Left 2 !.tran 1m