Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\OP282.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP282.asy)
R3 OUT N001 2Meg
C3 N003 0 0.15
V2 V- 0 -5
C1 OUT N002 0.15
R2 N002 IN 1Meg
R1 N003 N002 1Meg
V3 IN 0 SINE(0 0.1 0.1)
C2 OUT N001 0.01
XU1 N003 N001 V+ V- OUT OP282 ;pnba In+)In-)V+)V-)OUT
V1 V+ 0 5
.tran 0 10 0
.lib OP282.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 400 -208 304 -208
WIRE 560 -208 464 -208
WIRE 304 -112 304 -208
WIRE 384 -112 304 -112
WIRE 560 -112 560 -208
WIRE 560 -112 464 -112
WIRE 384 -16 368 -16
WIRE 368 16 368 -16
WIRE 304 32 304 -112
WIRE 336 32 304 32
WIRE 512 48 400 48
WIRE 560 48 560 -112
WIRE 560 48 512 48
WIRE -32 64 -48 64
WIRE 64 64 -32 64
WIRE 208 64 144 64
WIRE 224 64 208 64
WIRE 320 64 304 64
WIRE 336 64 320 64
WIRE -48 96 -48 64
WIRE 320 96 320 64
WIRE 368 128 368 80
WIRE 384 128 368 128
WIRE 320 176 320 160
WIRE -48 208 -48 176
WIRE 208 224 208 64
WIRE 320 224 208 224
WIRE 560 224 560 48
WIRE 560 224 384 224
WIRE 48 336 32 336
WIRE 160 336 144 336
WIRE 32 368 32 336
WIRE 144 368 144 336
WIRE 32 464 32 448
WIRE 144 464 144 448
SYMBOL voltage 144 352 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL cap 384 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.15u
SYMBOL voltage -48 80 R0
WINDOW 3 48 60 Left 2
WINDOW 123 47 83 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 0.1 0.1)
SYMATTR InstName V3
SYMBOL res 320 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL res 480 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2Meg
SYMBOL voltage 32 352 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 160 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL cap 464 -224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 123 79 33 VBottom 2
SYMATTR InstName C2
SYMATTR Value 0.01u
SYMBOL OP282 368 -16 R0
SYMATTR InstName U1
SYMBOL cap 304 96 R0
SYMATTR InstName C3
SYMATTR Value 0.15u
FLAG 32 464 0
FLAG 144 464 0
FLAG 48 336 V+
FLAG 160 336 V-
FLAG 384 -16 V+
FLAG 384 128 V-
FLAG 320 176 0
FLAG -48 208 0
FLAG -32 64 IN
FLAG 512 48 OUT
TEXT 472 424 Left 2 !.tran 0 10 0
* Z:\home\khalils\Downloads\files\data\raw_asc\f4c0412f8e2e_NOR.asc
* Generated by LTspice 26.0.1 for Windows.
VA N002 0 PULSE(0 5 0 1n 1n 5u 10u)
VDD N001 0 5
M1 N001 N002 N004 N001 C5NPMOS l=0.6u w=7.2u
VB N003 0 PULSE(0 5 0 1n 1n 10u 20u)
M2 N004 N003 Vout N001 C5NPMOS l=0.6u w=7.2u
M3 Vout N002 0 0 C5NNMOS l=0.6u w=3.6u
M4 Vout N003 0 0 C5NNMOS l=0.6u w=3.6u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100u
.include D:\NIELIT\ENGR3426\ENGR3426\engr3426.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 -112 208 -112
WIRE 368 -112 320 -112
WIRE 368 -48 368 -112
WIRE 368 64 368 32
WIRE 208 96 208 -112
WIRE 320 144 320 -112
WIRE 320 144 208 144
WIRE -128 176 -432 176
WIRE 160 176 -128 176
WIRE -32 240 -240 240
WIRE 80 240 -32 240
WIRE 208 240 208 192
WIRE 320 288 320 144
WIRE 320 288 208 288
WIRE -432 304 -432 176
WIRE -240 304 -240 240
WIRE 80 320 80 240
WIRE 160 320 80 320
WIRE 624 336 208 336
WIRE 208 352 208 336
WIRE 208 352 96 352
WIRE 448 352 208 352
WIRE -432 416 -432 384
WIRE -240 416 -240 384
WIRE 96 416 96 352
WIRE 448 416 448 352
WIRE 208 464 96 464
WIRE 576 464 448 464
WIRE -128 496 -128 176
WIRE 48 496 -128 496
WIRE -32 528 -32 240
WIRE 400 528 400 496
WIRE 400 528 -32 528
WIRE 96 560 96 512
WIRE 256 560 96 560
WIRE 448 560 448 512
WIRE 448 560 256 560
WIRE 208 592 208 464
WIRE 256 592 256 560
WIRE 256 592 208 592
WIRE 576 592 576 464
WIRE 576 592 256 592
WIRE 256 640 256 592
IOPIN 624 336 Out
SYMBOL pmos4 160 96 R0
SYMATTR InstName M1
SYMATTR Value C5NPMOS
SYMATTR Value2 l=0.6u w=7.2u
SYMBOL pmos4 160 240 R0
SYMATTR InstName M2
SYMATTR Value C5NPMOS
SYMATTR Value2 l=0.6u w=7.2u
SYMBOL voltage -432 288 R0
WINDOW 3 -258 169 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VA
SYMATTR Value PULSE(0 5 0 1n 1n 5u 10u)
SYMBOL nmos4 48 416 R0
SYMATTR InstName M3
SYMATTR Value C5NNMOS
SYMATTR Value2 l=0.6u w=3.6u
SYMBOL nmos4 400 416 R0
SYMATTR InstName M4
SYMATTR Value C5NNMOS
SYMATTR Value2 l=0.6u w=3.6u
SYMBOL voltage -240 288 R0
WINDOW 3 -128 172 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value PULSE(0 5 0 1n 1n 10u 20u)
SYMBOL voltage 368 -64 R0
SYMATTR InstName VDD
SYMATTR Value 5
FLAG 368 64 0
FLAG -432 416 0
FLAG -240 416 0
FLAG 256 640 0
FLAG 624 336 Vout
TEXT -696 576 Left 2 !.tran 100u
TEXT -696 528 Left 2 !.include D:\\NIELIT\\ENGR3426\\ENGR3426\\engr3426.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1108.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1108.asy)
R1 OUT N003 753K
V1 IN 0 2.8
L1 IN N001 33 Rser=0.02 Rpar=5000
C2 OUT 0 100 Rser=0.02
D1 N001 OUT MBRS140
Rload OUT 0 25
XU1 IN IN N001 0 0 N002 N004 N003 LT1108 top=1K bot=1T ;pnba Ilim)Vin)SW1)SW2)GND)AO)SET)FB
R2 N003 0 250K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
.lib LT1108.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2456 1432
WIRE 1472 912 1296 912
WIRE 1600 912 1472 912
WIRE 1664 912 1600 912
WIRE 1792 912 1744 912
WIRE 1840 912 1792 912
WIRE 1952 912 1904 912
WIRE 2064 912 1952 912
WIRE 2176 912 2064 912
WIRE 1296 928 1296 912
WIRE 2064 928 2064 912
WIRE 2176 928 2176 912
WIRE 1952 944 1952 912
WIRE 1472 960 1472 912
WIRE 1600 960 1600 912
WIRE 1296 1024 1296 1008
WIRE 1392 1024 1376 1024
WIRE 1792 1024 1792 912
WIRE 1792 1024 1680 1024
WIRE 2064 1024 2064 992
WIRE 2176 1024 2176 1008
WIRE 1952 1104 1952 1024
WIRE 1952 1104 1680 1104
WIRE 1952 1120 1952 1104
WIRE 1392 1184 1376 1184
WIRE 1696 1184 1680 1184
WIRE 1952 1216 1952 1200
WIRE 1536 1264 1536 1248
SYMBOL RES 1936 1104 R0
SYMATTR InstName R2
SYMATTR Value 250K
SYMBOL RES 1936 928 R0
SYMATTR InstName R1
SYMATTR Value 753K
SYMBOL POLCAP 2048 928 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL res 2160 912 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL schottky 1840 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL IND 1648 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL VOLTAGE 1296 912 R0
SYMATTR InstName V1
SYMATTR Value 2.8
SYMBOL POWERPRODUCTS\\LT1108 1536 1104 R0
SYMATTR InstName U1
FLAG 2176 912 OUT
FLAG 1952 1216 0
FLAG 2064 1024 0
FLAG 2176 1024 0
FLAG 1296 1024 0
FLAG 1696 1184 0
FLAG 1536 1264 0
FLAG 1296 912 IN
TEXT 1712 1256 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1110-12.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 3
C2 OUT 0 15 Rser=0.02
D1 N001 OUT MBRS140
L1 IN N001 47 Rser=0.02 Rpar=5000
XU1 IN IN N001 0 0 MP_01 MP_02 OUT LT1110 top=300K bot=5.6K ;pnba Ilim)Vin)SW1)SW2)GND)))FB
Rload OUT 0 500
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1110-12.asy)
.lib LT1110.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2504 1688
WIRE 1472 912 1312 912
WIRE 1600 912 1472 912
WIRE 1632 912 1600 912
WIRE 1744 912 1712 912
WIRE 1792 912 1744 912
WIRE 1904 912 1856 912
WIRE 2000 912 1904 912
WIRE 1312 928 1312 912
WIRE 2000 928 2000 912
WIRE 1472 960 1472 912
WIRE 1600 960 1600 912
WIRE 1312 1024 1312 1008
WIRE 2000 1024 2000 1008
WIRE 1744 1040 1744 912
WIRE 1744 1040 1664 1040
WIRE 1904 1104 1904 912
WIRE 1904 1104 1664 1104
WIRE 1904 1120 1904 1104
WIRE 1680 1168 1664 1168
WIRE 1904 1200 1904 1184
WIRE 1536 1264 1536 1248
FLAG 2000 912 OUT
FLAG 1904 1200 0
FLAG 2000 1024 0
FLAG 1312 1024 0
FLAG 1680 1168 0
FLAG 1536 1264 0
FLAG 1312 912 IN
SYMBOL VOLTAGE 1312 912 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL POLCAP 1888 1120 R0
SYMATTR InstName C2
SYMATTR Value 15
SYMATTR SpiceLine Rser=0.02
SYMBOL schottky 1792 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL IND 1616 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 47
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL PowerProducts\\LT1110-12 1536 1104 R0
SYMATTR InstName U1
SYMBOL res 1984 912 R0
SYMATTR InstName Rload
SYMATTR Value 500
TEXT 1728 1256 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\6e912dba12e1_NMOS_Char.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 0
M1 N001 N002 0 0 NMOS l=100n w=1u
V1 N002 0 0.6
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc 65nm_bulk.txt
.dc V2 0 1.2 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 464 80 176 80
WIRE 176 96 176 80
WIRE 464 112 464 80
WIRE 304 144 176 144
WIRE 128 176 -16 176
WIRE -16 192 -16 176
WIRE 176 256 176 192
WIRE 304 256 304 144
WIRE 464 256 464 192
WIRE -16 320 -16 272
SYMBOL voltage -16 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0.6
SYMBOL nmos4 128 96 R0
SYMATTR InstName M1
SYMATTR Value2 l=100n w=1u
SYMBOL voltage 464 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
FLAG -16 320 0
FLAG 176 256 0
FLAG 304 256 0
FLAG 464 256 0
TEXT -152 0 Left 2 !.inc 65nm_bulk.txt
TEXT -144 40 Left 2 !.dc V2 0 1.2 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6992-4.asc
* Generated by LTspice 26.0.1 for Windows.
* 400Hz, 95% to 0% Duty Cycle\nSwept Pulse Width Modulated Output\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6992-4.asy)
V1 N002 0 3
R1 N003 0 487K
R3 N002 N004 392K
XU1 N001 0 N003 N004 N002 PWMout LTC6992-4 ;pnba MOD)GND)SET)DIV)V+)OUT
R4 PWMout 0 10K
R2 N004 0 1000K
V2 N001 0 PULSE(0 1 10m 50m 50m 5m 110m)
.tran 120m startup
.lib LTC6992-4.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -176 96 -192 96
WIRE 96 96 -96 96
WIRE 624 96 320 96
WIRE 624 112 624 96
WIRE 96 176 80 176
WIRE 368 176 320 176
WIRE 496 176 368 176
WIRE 368 192 368 176
WIRE 496 192 496 176
WIRE 624 208 624 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 336 256 320 256
WIRE 336 288 336 256
WIRE 368 288 368 272
WIRE 368 288 336 288
WIRE 496 288 496 272
WIRE 368 304 368 288
WIRE 368 400 368 384
SYMBOL voltage 496 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL SpecialFunctions\\LTC6992-4 208 176 R0
SYMATTR InstName U1
SYMBOL res 352 288 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL res 608 96 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 487K
SYMBOL voltage -80 96 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 1 10m 50m 50m 5m 110m)
SYMATTR InstName V2
SYMBOL res 352 176 R0
SYMATTR InstName R3
SYMATTR Value 392K
FLAG -192 96 0
FLAG 368 400 0
FLAG 496 288 0
FLAG 624 96 PWMout
FLAG 80 176 0
FLAG -16 256 0
FLAG 624 208 0
TEXT 528 368 Left 2 !.tran 120m startup
TEXT 208 56 Bottom 2 ;400Hz, 95% to 0% Duty Cycle\nSwept Pulse Width Modulated Output\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG858.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nCharge Injection not included\nOnly One channel included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG858.asy)
C1 N002 0 36p
V4 N003 0 0
R1 N002 0 49.9
V2 N001 0 3
XU1 N004 N001 N002 N003 +V 0 ADG858 ;pnba IN)SA)D)SB)Vdd)GND
V3 +V 0 5
V1 N004 0 PULSE(0 3 25u 1n 1n 20u)
.tran 75u
.lib ADG858.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 0 -48 -48
WIRE -144 64 -512 64
WIRE -512 96 -512 64
WIRE 128 96 48 96
WIRE 256 96 128 96
WIRE -144 128 -400 128
WIRE 128 128 128 96
WIRE 256 128 256 96
WIRE -512 192 -512 176
WIRE -400 192 -400 128
WIRE -144 192 -288 192
WIRE 128 240 128 208
WIRE 256 240 256 192
WIRE -400 304 -400 272
WIRE -288 304 -288 192
WIRE -512 320 -512 304
WIRE -48 336 -48 304
WIRE -512 416 -512 400
WIRE -288 448 -288 384
SYMBOL res 112 112 R0
SYMATTR InstName R1
SYMATTR Value 49.9
SYMBOL cap 240 128 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -512 80 R0
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL ADG858 -48 144 R0
SYMATTR InstName U1
SYMBOL voltage -512 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -400 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 0
SYMBOL voltage -288 288 R0
WINDOW 3 24 102 Left 2
SYMATTR Value PULSE(0 3 25u 1n 1n 20u)
SYMATTR InstName V1
FLAG 128 240 0
FLAG 256 240 0
FLAG -48 336 0
FLAG -288 448 0
FLAG -512 192 0
FLAG -48 -48 +V
FLAG -512 416 0
FLAG -512 304 +V
FLAG -400 304 0
TEXT -264 416 Left 2 !.tran 75u
TEXT -536 -112 Left 2 ;Note:\nCharge Injection not included\nOnly One channel included\nSwitch shown for a logic 0 input
* Z:\tmp\asc_dec_bjh7r6w2\155ef4fde6ac_NoiseAnalysis_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
VNOISE IN N001 SINE(0 3.5 340m) AC 1
V3 Vn 0 -5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 5196 728
WIRE 0 32 0 0
WIRE 128 32 128 0
WIRE 272 32 272 0
WIRE 0 144 0 112
WIRE 128 144 128 112
WIRE 272 144 272 112
WIRE 432 208 304 208
WIRE 608 208 432 208
WIRE 304 352 304 208
WIRE 304 544 304 432
SYMBOL voltage 304 336 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
* Put Input Sine Values from design here
SYMATTR Value2 AC 1
SYMATTR InstName VNOISE
SYMATTR Value SINE(0 3.5 340m)
SYMBOL voltage 128 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
* Put Vn value from design here
SYMATTR Value -5
FLAG 0 144 0
FLAG 128 144 0
FLAG 0 0 Vp
FLAG 128 0 Vn
FLAG 272 144 0
FLAG 272 0 Vref
FLAG 432 208 IN
* Z:\tmp\asc_dec_bjh7r6w2\1836bd363368_1022_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R5 OUT N002 10K
R3 N006 N004 10K
R4 N002 N001 10K
V1 +V 0 15
C2 OUT N002 10p
XU2 N006 N002 +V -V OUT LT1022 ;pnba In+)In-)V+)V-)OUT
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1022.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 304 16 240 16
WIRE 432 16 416 16
WIRE 528 16 496 16
WIRE 304 112 304 16
WIRE 304 112 240 112
WIRE 320 112 304 112
WIRE 416 112 416 16
WIRE 416 112 400 112
WIRE 432 112 416 112
WIRE 528 112 528 16
WIRE 528 112 512 112
WIRE -112 144 -112 112
WIRE 304 160 304 112
WIRE 192 208 192 192
WIRE 464 208 464 192
WIRE 96 224 96 112
WIRE 160 224 96 224
WIRE 416 224 416 112
WIRE 432 224 416 224
WIRE -112 240 -112 224
WIRE 304 240 304 224
WIRE 304 240 224 240
WIRE 528 240 528 112
WIRE 528 240 496 240
WIRE 560 240 528 240
WIRE 160 256 128 256
WIRE 432 256 416 256
WIRE 304 272 304 240
WIRE 192 288 192 272
WIRE 464 288 464 272
WIRE -112 352 -112 336
WIRE -16 352 -16 336
WIRE 96 368 96 224
WIRE 144 368 96 368
WIRE 304 368 304 336
WIRE 304 368 224 368
WIRE 416 368 416 256
WIRE 416 368 304 368
WIRE -112 448 -112 432
WIRE -16 448 -16 432
SYMBOL res 528 96 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R5
SYMATTR Value 10K
SYMBOL res 240 352 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res 416 96 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL voltage -16 336 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL cap 496 0 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL opamps\\LT1022 464 176 R0
SYMATTR InstName U2
FLAG -16 448 0
FLAG 192 192 +V
FLAG -16 336 +V
FLAG 192 288 -V
FLAG -112 448 0
FLAG -112 336 -V
FLAG -112 240 0
FLAG 464 192 +V
FLAG 464 288 -V
FLAG 128 256 0
FLAG 560 240 OUT
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP122-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP122-3.0.asy)
C2 OUT 0 1
V1 IN 0 5.5
Rload OUT 0 100
C1 IN 0 1
XU1 OUT MP_01 0 IN MP_02 IN ADP122 K=1/6000 ;pnba Vout))GND)En))Vin
.tran 10m startup
.lib ADP122.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL ADP122-3.0 256 208 R0
SYMATTR InstName U1
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6752.asc
* Generated by LTspice 26.0.1 for Windows.
* Small differential input\nsignal with large common\nmode component
* High Speed Differential Line Receiver
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC6752.asy)
V2 N002 0 5
B1 N001 0 V=.5+2.5*Random(time/50n)
XU1 N003 N001 N002 0 Q LTC6752 ;pnba +In)-In)VCC)VEE)Q
V1 N003 N001 SINE(0 100m 200Meg 0 0 90)
.tran 500n
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1956 1060
WIRE 480 -272 480 -288
WIRE 336 -176 96 -176
WIRE 480 -160 480 -192
WIRE 336 -144 336 -176
WIRE 448 -144 336 -144
WIRE -128 -128 -160 -128
WIRE 96 -128 96 -176
WIRE 96 -128 -48 -128
WIRE 608 -128 512 -128
WIRE 448 -112 336 -112
WIRE 96 -80 96 -128
WIRE 176 -80 96 -80
WIRE 336 -80 336 -112
WIRE 336 -80 256 -80
WIRE 480 -80 480 -96
CIRCLE Normal 416 112 -288 -352 2
SYMBOL voltage 272 -80 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value SINE(0 100m 200Meg 0 0 90)
SYMATTR InstName V1
SYMBOL bv -32 -128 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName B1
SYMATTR Value V=.5+2.5*Random(time/50n)
SYMBOL voltage 480 -176 M180
WINDOW 123 24 -26 Left 2
WINDOW 39 24 -5 Left 2
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL LTC6752 480 -192 R0
SYMATTR InstName U1
FLAG 480 -288 0
FLAG 480 -80 0
FLAG 608 -128 Q
FLAG -160 -128 0
TEXT 496 -16 Left 2 !.tran 500n
TEXT 88 -184 Bottom 2 ;Small differential input\nsignal with large common\nmode component
TEXT 480 -360 Bottom 2 ;High Speed Differential Line Receiver
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4891-3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 2.5
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
R2 OUT N001 10K
V2 -V 0 -2.5
Rload OUT 0 10K
XU1 IN N001 +V -V OUT NC_01 ADA4891-3 ;pnba In+)In-)V+)V-)OUT)SHDN
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4891-3.asy)
.lib ADA4891-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 656 -1216 624 -1216
WIRE 160 -1152 144 -1152
WIRE 272 -1152 256 -1152
WIRE 576 -1152 560 -1152
WIRE 144 -1136 144 -1152
WIRE 256 -1136 256 -1152
WIRE 560 -1136 560 -1152
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 656 -1104 656 -1216
WIRE 656 -1104 608 -1104
WIRE 768 -1104 656 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 560 -1056 560 -1072
WIRE 576 -1056 560 -1056
WIRE 144 -1040 144 -1056
WIRE 256 -1040 256 -1056
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
FLAG 144 -1152 +V
FLAG 144 -1040 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1152 +V
FLAG 256 -1152 -V
FLAG 576 -1056 -V
FLAG 416 -1216 0
FLAG 768 -992 0
FLAG 256 -1040 0
SYMBOL voltage 144 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 256 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL ADA4891-3 576 -1088 R0
WINDOW 0 20 -34 Left 2
WINDOW 3 36 4 Left 2
SYMATTR InstName U1
TEXT 752 -936 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1270.asc
* Generated by LTspice 26.0.1 for Windows.
L1 IN N001 10
D1 N001 OUT MBRS360
R1 OUT N002 8.7K
R2 N002 0 1K
R3 N003 N004 1K
C1 OUT 0 500
C3 N004 0 1
V1 IN 0 5
XU1 N003 N002 0 N001 IN LT1270 ;pnba Vc)FB)GND)SW)Vin
Rload OUT 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 15m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1270.asy)
.lib LT1270.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1472
WIRE 1824 896 1616 896
WIRE 1888 896 1824 896
WIRE 2000 896 1968 896
WIRE 2048 896 2000 896
WIRE 2160 896 2112 896
WIRE 2272 896 2160 896
WIRE 2368 896 2272 896
WIRE 1616 912 1616 896
WIRE 2272 912 2272 896
WIRE 2368 912 2368 896
WIRE 1824 944 1824 896
WIRE 2160 960 2160 896
WIRE 1616 1008 1616 992
WIRE 2272 1008 2272 976
WIRE 2368 1008 2368 992
WIRE 2000 1024 2000 896
WIRE 2000 1024 1952 1024
WIRE 2160 1088 2160 1040
WIRE 2160 1088 1952 1088
WIRE 2160 1104 2160 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2160 1200 2160 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
FLAG 2368 896 OUT
FLAG 2160 1200 0
FLAG 2272 1008 0
FLAG 2368 1008 0
FLAG 2064 1248 0
FLAG 1824 1248 0
FLAG 1616 1008 0
FLAG 1616 896 IN
SYMBOL IND 1872 912 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL schottky 2048 912 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL RES 2144 944 R0
SYMATTR InstName R1
SYMATTR Value 8.7K
SYMBOL RES 2144 1088 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL polcap 2256 912 R0
SYMATTR InstName C1
SYMATTR Value 500
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL VOLTAGE 1616 896 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL POWERPRODUCTS\\LT1270 1824 1088 R0
SYMATTR InstName U1
SYMBOL RES 2352 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
TEXT 2280 1280 Left 2 !.tran 15m startup