Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0ffed7cdf8ac_Demonstration_circuit_DC.asc
* Generated by LTspice 26.0.1 for Windows.
* Demonstration Circuit DC
* copyright Cordell Audio 12/03/2010
* View SPICE error log to see
* transistor operating parameters
C1 N001 Vout 100pF
V1 N001 0 15
Q2 Vout 0 N004 0 2N5551C
R3 N003 N005 225
R4 N004 N005 225
V3 Vin 0 AC 1
R2 N001 Vout 2500
R1 N001 N002 2500
V2 0 N006 15
I1 N005 N006 2mA
Q1 N002 Vin N003 0 2N5551C
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.include Cordell_Mods
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 724
WIRE 160 64 0 64
WIRE 272 64 160 64
WIRE 400 64 272 64
WIRE 0 112 0 64
WIRE 160 112 160 64
WIRE 272 112 272 64
WIRE 400 112 400 64
WIRE 160 224 160 192
WIRE 224 224 160 224
WIRE 272 224 272 176
WIRE 272 224 224 224
WIRE 0 256 0 192
WIRE 160 256 160 224
WIRE -112 304 -160 304
WIRE -64 304 -112 304
WIRE 304 304 224 304
WIRE 400 304 400 192
WIRE 400 304 304 304
WIRE 304 352 304 304
WIRE -160 368 -160 304
WIRE 0 384 0 352
WIRE 160 384 160 352
WIRE -160 496 -160 448
WIRE 0 496 0 464
WIRE 80 496 0 496
WIRE 160 496 160 464
WIRE 160 496 80 496
WIRE 400 496 400 304
WIRE 80 512 80 496
WIRE 80 624 80 592
WIRE 400 624 400 576
WIRE 400 624 80 624
SYMBOL res 144 368 R0
SYMATTR InstName R4
SYMATTR Value 225
SYMBOL npn -64 256 R0
WINDOW 3 22 55 Left 0
WINDOW 0 59 23 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q1
SYMBOL res 144 96 R0
WINDOW 0 -42 41 Left 0
WINDOW 3 -63 76 Left 0
SYMATTR InstName R2
SYMATTR Value 2500
SYMBOL voltage 400 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 44 Left 0
WINDOW 3 43 76 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res -16 96 R0
WINDOW 0 -42 41 Left 0
WINDOW 3 -60 74 Left 0
SYMATTR InstName R1
SYMATTR Value 2500
SYMBOL npn 224 256 M0
WINDOW 3 24 55 Left 0
WINDOW 0 61 25 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q2
SYMBOL voltage 400 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 39 44 Left 0
WINDOW 3 41 76 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL res -16 368 R0
WINDOW 0 -42 39 Left 0
WINDOW 3 -52 73 Left 0
SYMATTR InstName R3
SYMATTR Value 225
SYMBOL voltage -160 352 R0
WINDOW 3 -181 172 Left 0
WINDOW 123 -101 83 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -77 40 Left 0
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMBOL current 80 512 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 24 Left 0
WINDOW 3 37 62 Left 0
SYMATTR InstName I1
SYMATTR Value 2mA
SYMBOL cap 256 112 R0
WINDOW 3 26 62 Left 0
WINDOW 0 40 25 Left 0
SYMATTR Value 100pF
SYMATTR InstName C1
FLAG 304 352 0
FLAG -160 496 0
FLAG -112 304 Vin
FLAG 224 224 Vout
TEXT -456 120 Left 0 !.op
TEXT -104 -8 Left 0 ;Demonstration Circuit DC
TEXT -456 72 Left 0 !.include Cordell_Mods
TEXT 56 704 Left 0 ;copyright Cordell Audio 12/03/2010
TEXT -456 576 Left 0 ;View SPICE error log to see
TEXT -456 608 Left 0 ;transistor operating parameters
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG749.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PULSE(0 3 25u 1n 1n 20u)
R1 D 0 301
C1 D 0 36p
V2 SA 0 3
V3 +V 0 5
V4 SB 0 0
XU2 IN SA D SB +V 0 ADG749 ;pnba IN)SA)D)SB)Vdd)GND
.tran 75u
* Note:\nCharge Injection measurement not included in the data sheet \nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG749.asy)
.lib ADG749.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 0 -48 -48
WIRE -176 64 -512 64
WIRE -144 64 -176 64
WIRE -624 96 -624 64
WIRE -512 96 -512 64
WIRE 80 96 48 96
WIRE 128 96 80 96
WIRE 256 96 128 96
WIRE -176 128 -400 128
WIRE -144 128 -176 128
WIRE 128 128 128 96
WIRE 256 128 256 96
WIRE -624 192 -624 176
WIRE -512 192 -512 176
WIRE -400 192 -400 128
WIRE -176 192 -288 192
WIRE -144 192 -176 192
WIRE 128 240 128 208
WIRE 256 240 256 192
WIRE -400 304 -400 272
WIRE -288 304 -288 192
WIRE -48 336 -48 304
WIRE -288 416 -288 384
FLAG 128 240 0
FLAG 256 240 0
FLAG -48 336 0
FLAG -288 416 0
FLAG -512 192 0
FLAG -48 -48 +V
FLAG -624 192 0
FLAG -624 64 +V
FLAG -400 304 0
FLAG -176 64 SA
FLAG -176 128 SB
FLAG -176 192 IN
FLAG 80 96 D
SYMBOL voltage -288 288 R0
WINDOW 3 24 102 Left 2
SYMATTR Value PULSE(0 3 25u 1n 1n 20u)
SYMATTR InstName V1
SYMBOL res 112 112 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL cap 240 128 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -512 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL voltage -624 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -400 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 0
SYMBOL ADG749 -48 144 R0
SYMATTR InstName U2
TEXT 176 392 Left 2 !.tran 75u
TEXT -640 -216 Left 2 ;Note:\nCharge Injection measurement not included in the data sheet \nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\012ca27cc9cf_6200.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6200.asy)
V2 -V 0 -5
R2 N001 0 1K
V1 +V 0 5
V3 N002 0 SINE(0 1 1Meg)
XU1 N002 N001 OUT +V -V NC_01 LT6200 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN_L
R1 OUT N001 1K
.tran 10u
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -112 48 -128 48
WIRE 0 48 -32 48
WIRE 96 48 0 48
WIRE 208 48 176 48
WIRE 64 112 64 96
WIRE -416 160 -416 144
WIRE -288 160 -288 144
WIRE 0 160 0 48
WIRE 32 160 0 160
WIRE 208 192 208 48
WIRE 208 192 176 192
WIRE 256 192 208 192
WIRE 32 224 -112 224
WIRE -112 240 -112 224
WIRE -416 272 -416 240
WIRE -288 272 -288 240
WIRE 64 288 64 272
WIRE -112 336 -112 320
SYMBOL res 192 32 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -112 224 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1Meg)
SYMBOL opamps\\LT6200 64 192 R0
SYMATTR InstName U1
SYMBOL res -16 32 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -416 144 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -288 272 0
FLAG 64 96 +V
FLAG -288 144 +V
FLAG 64 288 -V
FLAG -416 272 0
FLAG -416 144 -V
FLAG -128 48 0
FLAG -112 336 0
FLAG 256 192 OUT
TEXT 152 312 Left 0 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1236-10.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 pwl(0 0 1u 12)
XU1 NC_01 0 OUT LT1236-10 ;pnba IN)GND)OUT
R1 IN OUT 1K
.tran 20u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1236-10.asy)
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2336 1256
WIRE 1360 -48 896 -48
WIRE 896 -32 896 -48
WIRE 1360 -16 1360 -48
WIRE 896 64 896 48
WIRE 1360 80 1360 64
WIRE 1360 80 1328 80
WIRE 1232 192 1232 176
FLAG 896 64 0
FLAG 1232 192 0
FLAG 1360 80 OUT
FLAG 896 -48 IN
SYMBOL voltage 896 -48 R0
SYMATTR InstName V1
SYMATTR Value pwl(0 0 1u 12)
SYMBOL LT1236-10 1232 80 R0
SYMATTR InstName U1
SYMBOL res 1344 -32 R0
SYMATTR InstName R1
SYMATTR Value 1K
TEXT 1376 192 Left 2 !.tran 20u
* Z:\home\khalils\Downloads\files\data\raw_asc\0fd7fd881807_LTC6244.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 2.5
V2 -V 0 -2.5
XU1 IN OUT +V -V OUT LTC6244 ;pnba IN+)IN-)VCC)VEE)OUT
V3 IN 0 PULSE(-1 1 0 1n 1n 10u 20u)
.tran 100u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6244.asy)
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 256 208 256
WIRE 208 336 208 256
WIRE 256 336 208 336
WIRE 384 352 384 256
WIRE 384 352 320 352
WIRE 416 352 384 352
WIRE 256 368 144 368
WIRE -80 384 -80 368
WIRE 32 384 32 368
WIRE 144 384 144 368
WIRE 288 400 288 384
WIRE -80 480 -80 464
WIRE 32 480 32 464
WIRE 144 480 144 464
FLAG -80 480 0
FLAG 32 480 0
FLAG -80 368 +V
FLAG 144 480 0
FLAG 144 368 IN
FLAG 416 352 OUT
FLAG 288 320 +V
FLAG 32 368 -V
FLAG 288 400 -V
SYMBOL voltage -80 368 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 32 368 R0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL LTC6244 288 352 R0
SYMATTR InstName U1
SYMBOL voltage 144 368 R0
SYMATTR InstName V3
SYMATTR Value PULSE(-1 1 0 1n 1n 10u 20u)
TEXT 384 560 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\2de6583df266_expt_1_b.asc
* Generated by LTspice 26.0.1 for Windows.
* .op
* .tran 5m
* .ac dec 20 0.1 1T
VDD N001 0 1.8
M1 N001 N002 N003 N001 CMOSP l=180n w=0.2u
VB N002 0 -5
Vin N004 0 SINE(0.9 50m 1k) AC 50m
M2 N003 N004 0 0 CMOSN l=700n w=697.5n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib tsmc018.lib
.dc Vin 0 1.8 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 972 680
WIRE 368 32 240 32
WIRE 512 32 368 32
WIRE 240 96 240 32
WIRE 368 144 368 32
WIRE 368 144 240 144
WIRE 512 160 512 32
WIRE 192 176 -80 176
WIRE -80 208 -80 176
WIRE 240 320 240 192
WIRE 400 368 240 368
WIRE 192 400 -32 400
WIRE -32 448 -32 400
WIRE 240 448 240 416
WIRE 400 448 400 368
WIRE 400 448 240 448
WIRE 240 480 240 448
SYMBOL pmos4 192 96 R0
SYMATTR InstName M1
SYMATTR Value CMOSP
SYMATTR Value2 l=180n w=0.2u
SYMBOL voltage -32 432 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 50m
SYMATTR InstName Vin
SYMATTR Value SINE(0.9 50m 1k)
SYMBOL voltage 512 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1.8
SYMBOL nmos4 192 320 R0
SYMATTR InstName M2
SYMATTR Value CMOSN
SYMATTR Value2 l=700n w=697.5n
SYMBOL voltage -80 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value -5
FLAG -32 528 0
FLAG 512 240 0
FLAG -80 288 0
FLAG 240 480 0
TEXT 792 240 Left 2 !.lib tsmc018.lib
TEXT 768 464 Left 2 ;.op
TEXT 816 320 Left 2 ;.tran 5m
TEXT -32 632 Left 2 ;.ac dec 20 0.1 1T
TEXT 512 648 Left 2 !.dc Vin 0 1.8 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\3c696e2f26dc_schematic.asc
* Generated by LTspice 26.0.1 for Windows.
D1 0 N003 D
L1 0 N004 L
R1 N003 N004 R
V1 N002 N003 V
R2 N001 N002 R
C1 N001 0 C
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1000 750
WIRE 156 412 156 512
WIRE 156 192 156 332
WIRE 536 156 536 224
WIRE 536 288 536 708
WIRE 156 412 156 512
WIRE 156 592 156 672
WIRE 536 288 536 708
WIRE 156 672 252 672
WIRE 332 672 536 672
WIRE 156 192 292 192
WIRE 372 156 536 156
WIRE 156 440 324 440
WIRE 388 412 536 412
WIRE 372 156 372 192
WIRE 388 412 388 440
SYMBOL voltage 156 316 R0
SYMATTR InstName V1
SYMBOL res 140 496 R0
SYMATTR InstName R1
SYMBOL cap 520 224 R0
SYMATTR InstName C1
SYMBOL diode 388 424 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL ind 348 656 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName L1
SYMBOL res 388 176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName R2
FLAG 536 708 0
* Z:\home\khalils\Downloads\files\data\raw_asc\06bf507b6e5a_1217.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
R1 N002 N001 3K
R2 N001 0 3K
V3 IN 0 AC 1
XU1 IN N001 +V -V N002 LT1217 ;pnba In+)In-)V+)V-)OUT
R3 N003 N002 75
R4 0 OUT 75
T1 N003 0 OUT 0 Td=75n Z0=75
.ac oct 10 10K 100Meg
* Cable Driver
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1217.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 416 64 416 48
WIRE 544 64 544 48
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE 416 160 416 144
WIRE 544 160 544 144
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 304 240 256 240
WIRE 432 240 384 240
WIRE 624 240 528 240
WIRE 160 256 0 256
WIRE 624 256 624 240
WIRE 0 272 0 256
WIRE 432 272 416 272
WIRE 544 272 528 272
WIRE 192 288 192 272
WIRE 624 352 624 336
WIRE 0 368 0 352
FLAG 544 160 0
FLAG 192 192 +V
FLAG 544 48 +V
FLAG 192 288 -V
FLAG 416 160 0
FLAG 416 48 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 624 352 0
FLAG 416 272 0
FLAG 544 272 0
FLAG 624 240 OUT
FLAG 0 256 IN
SYMBOL voltage 544 48 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 416 48 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3K
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 3K
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL opamps\\LT1217 192 176 R0
SYMATTR InstName U1
SYMBOL res 400 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 75
SYMBOL res 608 352 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 75
SYMBOL tline 480 256 R0
WINDOW 3 -69 48 Left 2
SYMATTR Value Td=75n Z0=75
SYMATTR InstName T1
TEXT 320 400 Left 2 !.ac oct 10 10K 100Meg
TEXT 248 40 Bottom 2 ;Cable Driver
* Z:\home\khalils\Downloads\files\data\raw_asc\3a6dd6d48ad8_Versuch01_Lab1.asc
* Generated by LTspice 26.0.1 for Windows.
XSchottky Schottky 0 BAT41 ;pnba +)-
RD Si N001 200
RD3 Zener N001 200
XZener Zener 0 ZD3V9 ;pnba +)-
RD1 Schottky N001 200
Vi N001 0 5
DSi Si 0 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc Vi -5 5 .01
.include BAT41.txt
.include ZD3V9.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1456 680
WIRE 432 -224 -64 -224
WIRE 144 -160 64 -160
WIRE 240 -160 224 -160
WIRE 272 -160 240 -160
WIRE 368 -160 336 -160
WIRE -64 -64 -64 -224
WIRE 64 -64 64 -160
WIRE 64 -64 16 -64
WIRE 144 -64 64 -64
WIRE 240 -64 224 -64
WIRE 272 -64 240 -64
WIRE 368 -64 368 -160
WIRE 368 -64 336 -64
WIRE 432 -64 432 -224
WIRE 432 -64 368 -64
WIRE 64 32 64 -64
WIRE 144 32 64 32
WIRE 240 32 224 32
WIRE 272 32 240 32
WIRE 368 32 368 -64
WIRE 368 32 336 32
SYMBOL voltage 32 -64 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Vi
SYMATTR Value 5
SYMBOL zener 272 -48 R270
WINDOW 0 36 32 VTop 2
WINDOW 3 -4 32 VBottom 2
SYMATTR InstName Schottky
SYMATTR Value BAT41
SYMATTR Prefix X
SYMBOL schottky 272 -144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName Zener
SYMATTR Value ZD3V9
SYMATTR Prefix X
SYMBOL res 240 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RD1
SYMATTR Value 200
SYMBOL res 240 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RD
SYMATTR Value 200
SYMBOL diode 272 48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName Si
SYMATTR Value 1N4148
SYMBOL res 240 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RD3
SYMATTR Value 200
FLAG 240 32 Si
FLAG 240 -64 Schottky
FLAG 240 -160 Zener
FLAG 432 -64 0
TEXT -32 72 Left 2 !.dc Vi -5 5 .01
TEXT 24 120 Left 2 !.include BAT41.txt
TEXT 32 160 Left 2 !.include ZD3V9.txt
* Z:\home\khalils\Downloads\files\data\raw_asc\ADGS1412.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1412.asy)
V2 -V 0 -15
V1 +V 0 15
V4 IN 0 pulse(0 3.3 0 1u 1u 5m 10m)
R1 D 0 1K
XU1 IN S D -V +V 0 ADG1412 ;pnba IN)S)D)Vss)Vdd)GND
V3 S 0 sine(0 5 1K)
.tran 30m
.lib ADG1412.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2844 1336
WIRE -96 -160 -112 -160
WIRE -112 -128 -112 -160
WIRE -640 -112 -656 -112
WIRE -656 -80 -656 -112
WIRE -240 -48 -512 -48
WIRE -208 -48 -240 -48
WIRE 48 -48 -16 -48
WIRE 48 -16 48 -48
WIRE -512 0 -512 -48
WIRE -656 16 -656 0
WIRE -240 16 -336 16
WIRE -208 16 -240 16
WIRE -640 80 -656 80
WIRE 48 80 48 64
WIRE -336 96 -336 16
WIRE -656 112 -656 80
WIRE -512 112 -512 80
WIRE -48 144 -48 128
WIRE -176 160 -176 128
WIRE -176 160 -192 160
WIRE -656 208 -656 192
WIRE -336 240 -336 176
SYMBOL voltage -656 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -336 80 R0
WINDOW 3 19 116 Left 2
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMATTR InstName V4
SYMBOL voltage -512 -16 R0
SYMATTR InstName V3
SYMATTR Value sine(0 5 1K)
SYMBOL ADG1412 -112 0 R0
SYMATTR InstName U1
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -656 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
FLAG -656 208 0
FLAG -656 16 0
FLAG -640 -112 +V
FLAG -640 80 -V
FLAG -512 112 0
FLAG -192 160 -V
FLAG -96 -160 +V
FLAG -48 144 0
FLAG -336 240 0
FLAG 48 80 0
FLAG -240 -48 S
FLAG 48 -48 D
FLAG -240 16 IN
TEXT 16 160 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\TransmissionLineInverter.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax. The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors. A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements. One for the normal(differential) mode and\nthe other for the common mode. Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world. These modes\nwith have different propagation speeds and impedances. If both modes\nare modeled, then you can simulate a transmission line inverter.
T2 0 0 OUT 0 Td=30n Z0=150
V1 IN 0 PULSE(0 1 0 1n 1n 10n) Rser=50
T1 IN 0 0 OUT Td=50n Z0=50
.tran 0 500n 0 1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 680
WIRE 128 192 -368 192
WIRE 320 192 224 192
WIRE -368 208 -368 192
WIRE 128 224 64 224
WIRE 288 224 224 224
WIRE 64 272 64 224
WIRE 64 272 16 272
WIRE 288 272 288 224
WIRE 336 272 288 272
WIRE -368 304 -368 288
WIRE 64 304 64 272
WIRE 128 304 64 304
WIRE 288 304 288 272
WIRE 288 304 224 304
WIRE 128 336 64 336
WIRE 288 336 224 336
WIRE 64 368 64 336
WIRE 288 368 288 336
SYMBOL voltage -368 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 56 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1n 1n 10n)
SYMBOL tline 176 320 R0
WINDOW 0 -1 -21 Bottom 2
WINDOW 3 0 21 Top 2
SYMATTR InstName T2
SYMATTR Value Td=30n Z0=150
SYMBOL tline 176 208 R0
WINDOW 0 2 -19 Bottom 2
WINDOW 3 3 20 Top 2
SYMATTR InstName T1
FLAG 64 368 0
FLAG 288 368 0
FLAG -368 304 0
FLAG 16 272 0
FLAG 320 192 0
FLAG -368 192 IN
FLAG 336 272 OUT
TEXT 376 368 Left 2 !.tran 0 500n 0 1n
TEXT 0 408 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT -376 -200 Left 2 ;This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax.  The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors.  A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements.  One for the normal(differential) mode and\nthe other for the common mode.  Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world.  These modes\nwith have different propagation speeds and impedances.  If both modes\nare modeled, then you can simulate a transmission line inverter.
* Z:\tmp\asc_dec_bjh7r6w2\0d6ee6e6d110_Draft2_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N005 N006 10k
V1 N001 N007 15
R4 N002 N001 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -720 224 -720 64
WIRE -720 480 -720 304
WIRE -288 64 -720 64
WIRE -288 144 -288 64
WIRE -256 144 -288 144
WIRE -144 144 -176 144
WIRE -144 272 -480 272
WIRE -16 64 -288 64
WIRE -16 112 -16 64
WIRE 144 400 112 400
WIRE 144 480 -16 480
WIRE 144 480 144 400
WIRE 224 272 112 272
WIRE 224 336 224 272
WIRE 224 480 144 480
WIRE 224 480 224 416
WIRE 336 144 112 144
WIRE 336 176 336 144
WIRE 336 480 224 480
WIRE 336 480 336 256
SYMBOL res 208 320 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage -720 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res -160 128 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R4
SYMATTR Value 10k
* Z:\home\khalils\Downloads\files\data\raw_asc\629abdb296c8_SummingAmplifire.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N003 1
R2 N001 N004 1
R3 N001 N005 1
R4 N002 N001 2
R5 0 N002 1
V1 N003 0 10
V2 N004 0 15
V3 N005 0 20
XU1 N001 0 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
* Summing Amplifier\nOpAmp\nI4 = I1 + I2 + I3 \n= -(V1/R1 + V2/R2 + V3/R3)\nVout = -(R4/R1*V1 + R4/R2*V2 + R4/R3*V3)
.lib opamp.sub
.tran 50m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 256 -96 96 -96
WIRE 496 -96 336 -96
WIRE -192 32 -576 32
WIRE -16 32 -112 32
WIRE -16 64 -16 32
WIRE 96 64 96 -96
WIRE 96 64 -16 64
WIRE 240 64 96 64
WIRE -576 80 -576 32
WIRE 496 80 496 -96
WIRE 496 80 304 80
WIRE 704 80 496 80
WIRE 240 96 144 96
WIRE -192 144 -416 144
WIRE -16 144 -16 64
WIRE -16 144 -112 144
WIRE 704 160 704 80
WIRE -416 208 -416 144
WIRE 144 256 144 96
WIRE -192 272 -256 272
WIRE -16 272 -16 144
WIRE -16 272 -112 272
WIRE 704 320 704 240
WIRE -256 368 -256 272
WIRE -576 576 -576 160
WIRE -416 576 -416 288
WIRE -256 576 -256 448
FLAG -576 576 0
FLAG -416 576 0
FLAG -256 576 0
FLAG 704 320 0
FLAG 144 256 0
SYMBOL res -96 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL res -96 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL res -96 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL res 352 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2
SYMBOL res 720 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 1
SYMBOL voltage -576 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL voltage -416 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage -256 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 20
SYMBOL OpAmps\\opamp 272 16 R0
SYMATTR InstName U1
TEXT -936 -208 Left 2 ;Summing Amplifier\nOpAmp\nI4 = I1 + I2 + I3 \n= -(V1/R1 + V2/R2 + V3/R3)\nVout = -(R4/R1*V1 + R4/R2*V2 + R4/R3*V3)
TEXT 192 168 Left 2 !.lib opamp.sub
TEXT -936 600 Left 2 !.tran 50m