Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\15b3bfcd6e37_Lab2_NonIdeal_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
Rsec N007 N006 5
Vs N003 0 Sin(0 325 50)
Rprimary N005 N004 70
Rload N007 0 100
Rs N004 N003 50
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 932 680
WIRE 160 0 112 0
WIRE 544 0 448 0
WIRE 160 16 160 0
WIRE 304 32 208 32
WIRE 304 128 208 128
WIRE 208 160 208 128
WIRE -176 176 -336 176
WIRE -48 176 -96 176
WIRE 160 176 160 96
WIRE 160 176 32 176
WIRE 592 176 448 176
WIRE 720 176 672 176
WIRE -336 192 -336 176
WIRE 720 192 720 176
WIRE -32 224 -288 224
WIRE 112 224 112 0
WIRE 160 224 112 224
WIRE 544 224 544 0
WIRE 544 224 448 224
WIRE 656 224 544 224
WIRE -32 256 -32 224
WIRE 32 256 -32 256
WIRE 112 256 112 224
WIRE 112 256 32 256
WIRE 208 256 208 240
WIRE 656 272 656 224
WIRE 720 272 656 272
WIRE -336 288 -336 272
WIRE -288 288 -288 224
WIRE -288 288 -336 288
WIRE 720 288 720 272
SYMBOL res 688 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rsec
SYMATTR Value 5
SYMBOL voltage -336 176 R0
SYMATTR InstName Vs
SYMATTR Value Sin(0 325 50)
SYMBOL res 48 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rprimary
SYMATTR Value 70
SYMBOL res 704 176 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL res -80 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rs
SYMATTR Value 50
FLAG -336 288 0
FLAG 208 256 0
FLAG 208 80 0
FLAG 720 288 0
* Z:\home\khalils\Downloads\files\data\raw_asc\339ff444f934_6228.asc
* Generated by LTspice 26.0.1 for Windows.
* Differential to Single-Ended Converter
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6228.asy)
V2 -V 0 -5
R4 N004 N003 49.9
R6 N005 N007 150
R2 OUT N002 49.9
C2 N004 N007 18p
C1 N002 N001 18p
V3 N003 N006 AC 1
R3 N001 N004 348
R5 N007 N006 49.9
R7 0 N005 101
XU1 N005 N001 N002 +V -V +V LTC6228 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN_L
R1 N002 N001 200
V1 +V 0 5
.ac oct 8 100K 200Meg
.lib LTC6228.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4472 1028
WIRE -2592 -624 -2688 -624
WIRE -2464 -624 -2528 -624
WIRE -3136 -528 -3136 -544
WIRE -2976 -528 -2976 -544
WIRE -2688 -512 -2688 -624
WIRE -2608 -512 -2688 -512
WIRE -2464 -512 -2464 -624
WIRE -2464 -512 -2528 -512
WIRE -3136 -432 -3136 -448
WIRE -2976 -432 -2976 -448
WIRE -2592 -400 -2592 -416
WIRE -2960 -352 -3024 -352
WIRE -2848 -352 -2880 -352
WIRE -2816 -352 -2848 -352
WIRE -2688 -352 -2688 -512
WIRE -2688 -352 -2736 -352
WIRE -2624 -352 -2688 -352
WIRE -2464 -320 -2464 -512
WIRE -2464 -320 -2480 -320
WIRE -2448 -320 -2464 -320
WIRE -2352 -320 -2368 -320
WIRE -3024 -304 -3024 -352
WIRE -2848 -304 -2848 -352
WIRE -2624 -288 -2720 -288
WIRE -2592 -224 -2592 -240
WIRE -2544 -224 -2544 -240
WIRE -3024 -160 -3024 -224
WIRE -2960 -160 -3024 -160
WIRE -2848 -160 -2848 -240
WIRE -2848 -160 -2880 -160
WIRE -2816 -160 -2848 -160
WIRE -2720 -160 -2720 -288
WIRE -2720 -160 -2736 -160
WIRE -2688 -160 -2720 -160
WIRE -2576 -160 -2608 -160
WIRE -2576 -128 -2576 -160
SYMBOL voltage -3024 -320 R0
WINDOW 123 19 102 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value ""
SYMBOL cap -2864 -304 R0
SYMATTR InstName C2
SYMATTR Value 18p
SYMBOL res -2720 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 150
SYMBOL res -2352 -336 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 49.9
SYMBOL res -2720 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 348
SYMBOL res -2864 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 49.9
SYMBOL voltage -2976 -544 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL LTC6228 -2592 -320 R0
SYMATTR InstName U1
SYMBOL cap -2528 -640 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 18p
SYMBOL res -2864 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 49.9
SYMBOL res -2512 -528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL res -2592 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 101
SYMBOL voltage -3136 -544 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -3136 -432 0
FLAG -2976 -432 0
FLAG -3136 -544 +V
FLAG -2976 -544 -V
FLAG -2352 -320 OUT
FLAG -2576 -128 0
FLAG -2592 -416 +V
FLAG -2544 -224 +V
FLAG -2592 -224 -V
TEXT -2424 -136 Left 2 !.ac oct 8 100K 200Meg
TEXT -2944 -624 Bottom 2 ;Differential to Single-Ended Converter
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1964-SD.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1964-SD.asy)
XU1 0 IN IN OUT OUT LT1964-SD ;pnba GND)IN)_SHDN)ADJ)OUT
V1 IN 0 PWL(0 0 1 -10)
C1 OUT 0 1
Rload OUT 0 1K
.tran 1
.lib LT1964.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 48 -208 48
WIRE 32 48 16 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 16 144 16 48
WIRE 32 144 16 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL PowerProducts\\LT1964-SD 176 96 R0
SYMATTR InstName U1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 -10)
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 384 240 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\158fcf527cdd_Crss_Coss_againstVds.asc
* Generated by LTspice 26.0.1 for Windows.
* Vertical axis : Read xF instead xA !
V1 d 0 PULSE(0 50 0 50u)
C-Ref d N002 100p
VCrss N001 N003 0
M1 d N001 N003 N003 STP8NM60
VCref N002 0 0
VCoss N003 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 50u 0 100n startup uic
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1480 680
WIRE 416 -224 32 -224
WIRE 704 -224 416 -224
WIRE 416 -192 416 -224
WIRE 704 -192 704 -224
WIRE 32 -160 32 -224
WIRE 368 -112 336 -112
WIRE 336 -80 336 -112
WIRE 32 -48 32 -80
WIRE 704 -48 704 -128
WIRE 336 32 336 0
WIRE 416 32 416 -96
WIRE 416 32 336 32
WIRE 416 80 416 32
WIRE 704 80 704 32
WIRE 416 208 416 160
SYMBOL cap 688 -192 R0
SYMATTR InstName C-Ref
SYMATTR Value 100p
SYMBOL voltage 32 -176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 50 0 50u)
SYMBOL voltage 704 -64 R0
SYMATTR InstName Cref
SYMATTR Value 0
SYMBOL nmos 368 -192 R0
SYMATTR InstName M1
SYMATTR Value STP8NM60
SYMBOL voltage 336 -96 R0
SYMATTR InstName Crss
SYMATTR Value 0
SYMBOL voltage 416 64 R0
SYMATTR InstName Coss
SYMATTR Value 0
FLAG 32 -48 0
FLAG 416 208 0
FLAG 704 80 0
FLAG 416 -224 d
TEXT 24 16 Left 0 !.tran 0 50u 0 100n startup uic
TEXT 40 -280 Left 0 ;Vertical axis : Read xF instead xA !
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1726-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1726-5.asy)
V4 N007 0 5
V2 N003 0 PULSE(5 0 .5 .5 .5 .5)
R1 N001 N004 56K
V6 N009 0 PULSE(0 2 1m 1u 1u 50u 800m 9)
XU1 N002 N003 N004 0 N009 N006 N008 N005 LTC1726-5 ;pnba VCC3)VCC5)VCCA)GND)WDI)_RST)WT)RT
C2 N008 0 100n
R2 N004 0 300K
V3 N002 0 PULSE(3.3 0 2.5 0.5 0.5 0.5)
C1 N005 0 47n
V1 N001 0 PULSE(1.2 0 4.5 .5 .5 .5)
R3 N007 N006 10K
.tran 10
.lib LTC1726-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1576 848
WIRE 672 48 528 48
WIRE 528 64 528 48
WIRE 672 64 672 48
WIRE 224 112 -384 112
WIRE 128 144 -208 144
WIRE -208 160 -208 144
WIRE 528 160 528 144
WIRE 528 160 320 160
WIRE 672 160 672 144
WIRE 528 176 528 160
WIRE 128 192 128 144
WIRE 224 192 224 112
WIRE 320 192 320 160
WIRE -208 256 -208 240
WIRE 528 272 528 256
WIRE -384 288 -384 112
WIRE 0 304 -32 304
WIRE 80 304 64 304
WIRE 384 304 368 304
WIRE 528 304 464 304
WIRE 528 320 528 304
WIRE -384 384 -384 368
WIRE 528 416 528 400
WIRE 0 432 -32 432
WIRE 80 432 64 432
WIRE 448 432 368 432
WIRE 448 448 448 432
WIRE 224 496 224 480
WIRE 448 544 448 528
SYMBOL voltage 528 304 R0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL cap 64 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL res 480 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res 512 160 R0
SYMATTR InstName R2
SYMATTR Value 300K
SYMBOL voltage 672 48 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PULSE(1.2 0 4.5 .5 .5 .5)
SYMATTR InstName V1
SYMBOL LTC1726-5 224 400 R0
SYMATTR InstName U1
SYMBOL voltage -384 272 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PULSE(3.3 0 2.5 0.5 0.5 0.5)
SYMATTR InstName V3
SYMBOL voltage -208 144 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PULSE(5 0 .5 .5 .5 .5)
SYMATTR InstName V2
SYMBOL res 512 48 R0
SYMATTR InstName R1
SYMATTR Value 56K
SYMBOL cap 64 288 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 47n
SYMBOL voltage 448 432 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V6
SYMATTR Value PULSE(0 2 1m 1u 1u 50u 800m 9)
FLAG 448 544 0
FLAG 528 416 0
FLAG 672 160 0
FLAG -208 256 0
FLAG -384 384 0
FLAG 224 496 0
FLAG -32 304 0
FLAG -32 432 0
FLAG 528 272 0
TEXT 744 576 Left 2 !.tran 10
* Z:\home\khalils\Downloads\files\data\raw_asc\06c689c6b730_time_reference.asc
* Generated by LTspice 26.0.1 for Windows.
VMains N003 N005 SINE(0 325 50)
R3 N004 ESP32_DIGITAL 330k
D1 N005 N001 D
R4 ESP32_DIGITAL 0 330k
Dzener1 0 ESP32_DIGITAL 3V6
D2 N003 N001 D
D3 0 N005 D
R1 N001 N002 330k
D4 0 N003 D
R2 N002 N004 330k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 -64 240 -64
WIRE 368 -48 368 -64
WIRE 240 0 240 -64
WIRE 240 0 192 0
WIRE 288 0 240 0
WIRE 192 16 192 0
WIRE 288 16 288 0
WIRE 368 48 368 32
WIRE 288 96 288 80
WIRE 288 96 112 96
WIRE 112 112 112 96
WIRE 368 144 368 128
WIRE 112 208 112 192
WIRE 192 208 192 80
WIRE 192 208 112 208
WIRE 192 240 192 208
WIRE 288 240 288 96
WIRE 368 240 368 224
WIRE 512 240 368 240
WIRE 560 240 512 240
WIRE 368 256 368 240
WIRE 512 272 512 240
WIRE 192 320 192 304
WIRE 240 320 192 320
WIRE 288 320 288 304
WIRE 288 320 240 320
WIRE 240 352 240 320
WIRE 368 352 368 336
WIRE 368 352 240 352
WIRE 512 352 512 336
WIRE 512 352 368 352
WIRE 560 352 512 352
WIRE 560 368 560 352
SYMBOL diode 304 80 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMBOL diode 208 304 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMBOL diode 208 80 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL res 352 240 R0
SYMATTR InstName R4
SYMATTR Value 330k
SYMBOL voltage 112 96 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Mains
SYMATTR Value SINE(0 325 50)
SYMBOL res 352 32 R0
SYMATTR InstName R2
SYMATTR Value 330k
SYMBOL zener 528 336 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName zener1
SYMATTR Value 3V6
SYMBOL res 352 -64 R0
SYMATTR InstName R1
SYMATTR Value 330k
SYMBOL res 352 128 R0
SYMATTR InstName R3
SYMATTR Value 330k
SYMBOL diode 304 304 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
FLAG 560 368 0
FLAG 560 240 ESP32_DIGITAL
* Z:\home\khalils\Downloads\files\data\raw_asc\20942bb7bd63_part2_a_1.asc
* Generated by LTspice 26.0.1 for Windows.
VGS gate 0 {X}
VDS drain 0 10
M1 drain gate 0 0 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model nmos NMOS (kp=100u, vt0=0.5, l=0.18u, w=.36u)
.dc VDS 0 10 0.01
.step param X list 2 5 7 9 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 48 96 48
WIRE 240 48 160 48
WIRE 96 112 96 48
WIRE 240 144 240 48
WIRE -64 192 -96 192
WIRE 48 192 -64 192
WIRE -96 208 -96 192
WIRE -96 336 -96 288
WIRE 96 336 96 208
WIRE 96 336 -96 336
WIRE 176 336 96 336
WIRE 240 336 240 224
WIRE 240 336 176 336
FLAG 96 336 0
FLAG -64 192 gate
FLAG 160 48 drain
FLAG 176 336 source
SYMBOL voltage -96 192 R0
SYMATTR InstName VGS
SYMATTR Value {X}
SYMBOL voltage 240 128 R0
SYMATTR InstName VDS
SYMATTR Value 10
SYMBOL nmos 48 112 R0
SYMATTR InstName M1
TEXT -104 376 Left 2 !.model nmos NMOS (kp=100u, vt0=0.5, l=0.18u, w=.36u)
TEXT -104 408 Left 2 !.dc VDS 0 10 0.01
TEXT -104 440 Left 2 !.step param X list 2 5 7 9 10
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3021-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3021-1.8.asy)
C1 OUT 0 3.3
Rload OUT 0 100
V1 N001 0 PWL(0 0 1 10)
XU1 MP_01 MP_02 OUT MP_03 MP_04 MP_05 OUT MP_06 N001 0 MP_07 N001 LT3021-1.8 ;pnba ))OUT))))SENSE))_SHDN)GND))IN
.tran 1
.lib LT3021.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 160 -176 160
WIRE 16 160 0 160
WIRE 352 160 304 160
WIRE 464 160 352 160
WIRE 560 160 464 160
WIRE 464 176 464 160
WIRE 560 176 560 160
WIRE -176 192 -176 160
WIRE 0 256 0 160
WIRE 16 256 0 256
WIRE 352 256 352 160
WIRE 352 256 304 256
WIRE 464 272 464 240
WIRE 560 272 560 256
WIRE -176 288 -176 272
WIRE 160 336 160 320
SYMBOL cap 448 176 R0
SYMATTR InstName C1
SYMATTR Value 3.3
SYMBOL res 544 160 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL voltage -176 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL PowerProducts\\LT3021-1.8 160 192 R0
SYMATTR InstName U1
FLAG 160 336 0
FLAG 464 272 0
FLAG 560 272 0
FLAG -176 288 0
FLAG 560 160 OUT
TEXT 480 352 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL42002-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL42002-2.5.asy)
C1 OUT 0 2.2 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADPL42002-2.5 ;pnba Vin)Sense)EN)SS)Vout)GND
C2 N001 0 4.7n
V1 IN 0 7
Rload OUT 0 12.5
.tran 6m startup
.lib ADPL42002-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL ADPL42002-2.5 224 128 R0
SYMATTR InstName U1
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 7
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 12.5
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\OP4177.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP4177.asy)
V2 -V 0 -15
V1 +V 0 15
R2 OUT N001 10K
R1 N001 0 10K
Rload OUT 0 10K
Vin IN 0 SINE(0 1 10K)
XU1 IN N001 +V -V OUT OP4177 ;pnba In+)In-)V+)V-)OUT
.tran 1m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL OP4177 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
TEXT 768 -952 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\25226b232d8f_CMOS_inverter.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
M1 N003 N002 N001 N001 AO6407
M2 N003 N002 0 0 BSP89
V2 N002 0 PULSE(0 5 1 1n 1n 2 4 10)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 50
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 -96 -160 -96
WIRE 224 32 224 -16
WIRE 272 48 176 48
WIRE -160 208 -160 -96
WIRE 176 208 176 48
WIRE 176 208 -80 208
WIRE 224 240 224 128
WIRE 176 320 176 208
WIRE -160 368 -160 208
WIRE 224 368 224 336
WIRE 224 368 -160 368
WIRE 224 416 224 368
SYMBOL pmos 272 128 R180
SYMATTR InstName M1
SYMATTR Value AO6407
SYMBOL nmos 176 240 R0
SYMATTR InstName M2
SYMATTR Value BSP89
SYMBOL voltage 224 0 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -64 208 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 1 1n 1n 2 4 10)
FLAG 224 416 0
TEXT -272 440 Left 2 !.tran 50
* Z:\home\khalils\Downloads\files\data\raw_asc\244a5acfec90_Solar_cell_4_wire.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 FF 1000
I1 FF N001 1
D1 N001 FF 1N4148
R4 MB FB 100k
R2 FB N001 0.5
R3 MF FF 100k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 32 384 32
WIRE 528 32 496 32
WIRE 112 96 16 96
WIRE 208 96 112 96
WIRE 288 96 208 96
WIRE 384 96 384 32
WIRE 384 96 368 96
WIRE 432 96 384 96
WIRE 16 112 16 96
WIRE 208 112 208 96
WIRE 112 128 112 96
WIRE 16 224 16 192
WIRE 112 224 112 192
WIRE 112 224 16 224
WIRE 208 224 208 192
WIRE 208 224 112 224
WIRE 384 224 208 224
WIRE 432 224 384 224
WIRE 384 304 384 224
WIRE 416 304 384 304
WIRE 528 304 496 304
SYMBOL res 384 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 0.5
SYMBOL res 192 96 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL res 512 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 512 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL current 16 192 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 1
SYMBOL diode 96 128 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG 432 96 FB
FLAG 432 224 FF
FLAG 528 32 MB
FLAG 528 304 MF
* Z:\tmp\asc_dec_bjh7r6w2\094757473fbc_Draft6_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
VBAT+ VBAT+ 0 30 Rser=100m
R4 N006 VBAT- 100
M1 N001 N002 N005 N005 Si7489DP
Vdd Vdd 0 -6 Rser=100m
V1 N003 0 PULSE(0 3.3 0 1n 1n 500u 1m 5)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 772
WIRE 304 -64 48 -64
WIRE 768 -64 304 -64
WIRE 304 16 304 -64
WIRE 256 96 160 96
WIRE -320 112 -496 112
WIRE -256 112 -320 112
WIRE -496 128 -496 112
WIRE -320 144 -320 112
WIRE -432 208 -496 208
WIRE -256 208 -352 208
WIRE 160 208 160 96
WIRE 160 208 112 208
WIRE 192 208 160 208
WIRE 304 208 304 112
WIRE 304 208 272 208
WIRE 160 304 160 208
WIRE 304 304 304 208
WIRE 304 400 304 304
WIRE 160 416 160 304
WIRE 256 416 160 416
WIRE 304 528 304 496
WIRE -720 544 -720 512
WIRE -608 544 -608 512
WIRE -496 544 -496 512
WIRE -368 544 -368 512
WIRE -720 656 -720 624
WIRE -608 656 -608 624
WIRE -496 656 -496 624
WIRE -368 656 -368 624
WIRE 304 656 304 608
SYMBOL voltage -496 528 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName VBAT+
SYMATTR Value 30
SYMATTR SpiceLine Rser=100m
SYMBOL res 288 512 R0
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL pmos 256 16 R0
SYMATTR InstName M1
SYMATTR Value Si7489DP
SYMBOL voltage -608 528 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName Vdd
SYMATTR Value -6
SYMATTR SpiceLine Rser=100m
SYMBOL voltage -496 224 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 1n 1n 500u 1m 5)
FLAG -320 144 0
FLAG -720 656 0
FLAG -608 656 0
FLAG -496 656 0
FLAG -368 656 0
FLAG -720 512 Vss
FLAG -608 512 Vdd
FLAG -496 512 VBAT+
FLAG -368 512 VBAT-
FLAG 304 656 VBAT-