Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1881.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1881.asy)
XU1 N003 N001 +V -V N002 LT1881 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
V3 N003 0 SINE(0 1 1K)
R1 N002 N001 1K
V2 -V 0 -5
R2 N001 0 1K
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -208 128 -208 112
WIRE -80 128 -80 112
WIRE 192 208 192 192
WIRE -208 224 -208 208
WIRE -80 224 -80 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL voltage -208 112 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -80 112 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL opamps\\LT1881 192 176 R0
SYMATTR InstName U1
FLAG -80 224 0
FLAG 192 192 +V
FLAG -80 112 +V
FLAG 192 288 -V
FLAG -208 224 0
FLAG -208 112 -V
FLAG 16 96 0
FLAG 0 368 0
TEXT 224 352 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3022-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3022-1.5.asy)
V1 IN 0 PWL(0 0 1 10)
Rload OUT 0 10
C1 OUT 0 10
XU1 MP_01 MP_02 OUT MP_03 MP_04 MP_05 OUT MP_06 IN 0 MP_07 IN LT3022-1.5 ;pnba ))OUT))))Sense))_SHDN)GND))IN
.tran 1
.lib LT3022-1.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 160 -208 160
WIRE 16 160 0 160
WIRE 320 160 304 160
WIRE 400 160 320 160
WIRE 496 160 400 160
WIRE -208 176 -208 160
WIRE 400 176 400 160
WIRE 496 176 496 160
WIRE 0 256 0 160
WIRE 16 256 0 256
WIRE 320 256 320 160
WIRE 320 256 304 256
WIRE -208 272 -208 256
WIRE 400 272 400 240
WIRE 496 272 496 256
WIRE 160 336 160 320
SYMBOL LT3022-1.5 160 192 R0
SYMATTR InstName U1
SYMBOL cap 384 176 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage -208 160 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 480 160 R0
SYMATTR InstName Rload
SYMATTR Value 10
FLAG 160 336 0
FLAG 400 272 0
FLAG 496 272 0
FLAG -208 272 0
FLAG 496 160 OUT
FLAG -208 160 IN
TEXT 424 344 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\31c7c697eb3f_parallel_RC_RL.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 AC 1
R1 N002 N001 10R
R3 0 RL 10R
C1 N002 RC 1e-3C
R2 0 RC 10R
L1 N002 RL 1e-3L
.ac oct 1000 1 96000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -576 48 -656 48
WIRE -400 48 -496 48
WIRE -192 48 -400 48
WIRE -192 80 -192 48
WIRE -400 96 -400 48
WIRE -656 192 -656 48
WIRE -400 192 -400 160
WIRE -368 192 -400 192
WIRE -192 192 -192 160
WIRE -160 192 -192 192
WIRE -400 224 -400 192
WIRE -192 224 -192 192
WIRE -656 352 -656 272
WIRE -400 352 -400 304
WIRE -192 352 -192 304
IOPIN -368 192 Out
IOPIN -160 192 Out
SYMBOL res -384 320 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 10R
SYMBOL ind -208 64 R0
SYMATTR InstName L1
SYMATTR Value 1e-3L
SYMBOL res -176 320 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 10R
SYMBOL cap -416 96 R0
SYMATTR InstName C1
SYMATTR Value 1e-3C
SYMBOL voltage -656 176 R0
WINDOW 123 24 124 Left 2
WINDOW 39 24 152 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL res -480 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10R
FLAG -656 352 0
FLAG -400 352 0
FLAG -192 352 0
FLAG -368 192 RC
FLAG -160 192 RL
TEXT -1048 144 Left 2 !.ac oct 1000 1 96000
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP165-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP165-3.0.asy)
V1 IN 0 5
C1 OUT 0 1
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
XU1 IN 0 N001 OUT ADP16xfd K=333.3u ;pnba Vin)GND)En)Vout
Rload OUT 0 300
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 416 96 352 96
WIRE 512 96 416 96
WIRE -64 112 -64 96
WIRE 416 112 416 96
WIRE 512 112 512 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 416 208 416 176
WIRE 512 208 512 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ADP165-3.0 256 208 R0
SYMATTR InstName U1
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 300
FLAG -64 208 0
FLAG 256 272 0
FLAG 416 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\05830d64fa86_Fig26_18_ID_VDS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1) and 1/d(Id(M1)) for output resistance
VGS N002 0 400m
M1 N001 N002 0 0 N_50n l=50n w=500n
VDS N001 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VDS 0 1 1m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 288 208 288 192
WIRE 288 304 288 288
WIRE 400 192 288 192
WIRE 448 112 448 80
WIRE 448 224 448 208
WIRE 496 160 448 160
WIRE 640 80 448 80
WIRE 640 112 640 80
WIRE 640 224 640 192
SYMBOL voltage 288 192 R0
WINDOW 0 -90 57 Left 0
WINDOW 3 -90 85 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 400m
SYMBOL voltage 640 96 R0
WINDOW 0 41 55 Left 0
WINDOW 3 41 83 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 0
SYMBOL nmos4 400 112 R0
WINDOW 0 59 18 Left 0
WINDOW 3 64 75 Left 0
WINDOW 123 64 103 Left 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
FLAG 288 304 0
FLAG 448 224 0
FLAG 640 224 0
FLAG 496 160 0
TEXT 384 272 Left 0 !.dc VDS 0 1 1m
TEXT 384 296 Left 0 !.lib cmosedu_models.txt
TEXT 224 56 Left 0 ;Plot Id(M1) and 1/d(Id(M1)) for output resistance
* Z:\home\khalils\Downloads\files\data\raw_asc\1d5ea0425c4a_transistor.asc
* Generated by LTspice 26.0.1 for Windows.
* Example of DC sweep in LTSpice
V1 N001 0
R1 N002 N001 1k
D1 N002 0 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -10 10 3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 80 80 80
WIRE 272 80 240 80
WIRE 80 112 80 80
WIRE 272 128 272 80
WIRE 80 224 80 192
WIRE 272 224 272 192
SYMBOL voltage 80 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL diode 256 128 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 256 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 80 224 0
FLAG 272 224 0
TEXT 344 72 Left 2 !.dc V1 -10 10 3
TEXT 128 -8 Left 2 ;Example of DC sweep in LTSpice
* Z:\home\khalils\Downloads\files\data\raw_asc\1ff4cfea1dcf_t4.asc
* Generated by LTspice 26.0.1 for Windows.
VGS_DC N001 0 1.01
M1 out in 0 0 N_1u l=4.37u w=87.35u
vgs_ac in N001 AC 1
Rd VDD out 92.342k
VDD VDD 0 5V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.ac oct 10 1 1MEG
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 96 208 64
WIRE 256 96 208 96
WIRE 208 112 208 96
WIRE 272 160 208 160
WIRE 160 192 32 192
WIRE 32 208 32 192
WIRE 272 208 272 160
WIRE 272 208 208 208
WIRE 32 304 32 288
WIRE 32 400 32 384
WIRE 208 400 208 208
FLAG 32 400 0
FLAG 208 400 0
FLAG 208 -16 VDD
FLAG 256 96 out
FLAG 384 400 0
FLAG 384 320 VDD
FLAG 32 192 in
SYMBOL voltage 32 288 R0
WINDOW 0 -128 47 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 -110 75 Left 2
SYMATTR InstName VGS_DC
SYMATTR Value 1.01
SYMBOL nmos4 160 112 R0
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=4.37u w=87.35u
SYMBOL voltage 32 192 R0
WINDOW 0 -111 37 Left 2
WINDOW 3 -118 -5 Left 2
WINDOW 123 -101 61 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName vgs_ac
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL res 192 -32 R0
SYMATTR InstName Rd
SYMATTR Value 92.342k
SYMBOL voltage 384 304 R0
WINDOW 0 -69 12 Left 2
WINDOW 3 -55 -7 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VDD
SYMATTR Value 5V
TEXT -80 496 Left 2 !.include cmosedu_models.txt
TEXT -80 472 Left 2 !.ac oct 10 1 1MEG
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1124.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain 1000 Amplifier with 0.01% Accuracy, DC to 1Hz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1124.asy)
V1 +V 0 15
XU1 N002 N001 +V -V OUT LT1124 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -15
R2 N001 0 365
V3 IN 0 ac 1
R1 OUT N001 364.76K
R3 N002 IN 365
.ac oct 100 1m 1Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -64 96 -80 96
WIRE 32 96 16 96
WIRE 48 96 32 96
WIRE 160 96 128 96
WIRE -336 160 -336 144
WIRE -208 160 -208 144
WIRE 96 208 96 192
WIRE 32 224 32 96
WIRE 64 224 32 224
WIRE 160 240 160 96
WIRE 160 240 128 240
WIRE 208 240 160 240
WIRE -336 256 -336 240
WIRE -208 256 -208 240
WIRE -48 256 -96 256
WIRE 64 256 32 256
WIRE -96 272 -96 256
WIRE 96 288 96 272
WIRE -96 368 -96 352
SYMBOL res 32 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL voltage -96 256 R0
WINDOW 0 25 19 Left 2
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL res 144 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 364.76K
SYMBOL voltage -336 144 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 48 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 365
SYMBOL opamps\\LT1124 96 176 R0
SYMATTR InstName U1
SYMBOL voltage -208 144 R0
SYMATTR InstName V1
SYMATTR Value 15
FLAG -208 256 0
FLAG 96 192 +V
FLAG -208 144 +V
FLAG 96 288 -V
FLAG -336 256 0
FLAG -336 144 -V
FLAG -80 96 0
FLAG -96 368 0
FLAG 208 240 OUT
FLAG -96 256 IN
TEXT 48 344 Left 2 !.ac oct 100 1m 1Meg
TEXT -96 48 Bottom 2 ;Gain 1000 Amplifier with 0.01% Accuracy, DC to 1Hz
* Z:\home\khalils\Downloads\files\data\raw_asc\422700b22fe3_EP4.asc
* Generated by LTspice 26.0.1 for Windows.
* .MODEL DI_1N4004 D ( IS=76.9p RS=42.0m BV=400 IBV=5.00u\n+ CJO=39.8p M=0.333 N=1.45 TT=4.32u )
I1 0 N001 PULSE(0 5 0 1 0 0 0 10)
D1 N001 0 DI_1N4004
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1
.inc 1n4004.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1316 680
WIRE 288 32 128 32
WIRE 128 80 128 32
WIRE 128 192 128 160
WIRE 128 272 128 256
WIRE 288 272 288 32
WIRE 288 272 128 272
WIRE 128 304 128 272
SYMBOL diode 112 192 R0
SYMATTR InstName D1
SYMATTR Value DI_1N4004
SYMBOL current 128 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value PULSE(0 5 0 1 0 0 0 10)
FLAG 128 304 0
TEXT 72 400 Left 2 ;.MODEL DI_1N4004 D  ( IS=76.9p RS=42.0m BV=400 IBV=5.00u\n+ CJO=39.8p  M=0.333 N=1.45 TT=4.32u )
TEXT 88 328 Left 2 !.tran 1
TEXT 144 -64 Left 2 !.inc 1n4004.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\20c708c7e5fe_TS3_DESNORMALIZADO.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 Vi 846.79
C1 N001 0 100n
V1 Vi 0 AC 1
L1 Vo2 N002 71.75m
R2 Vo2 0 846.79
C2 Vo2 0 100n
XU1 N002 N001 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
.ac dec 1000 100 5k
.inc opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 80 -48 80
WIRE 112 80 80 80
WIRE 208 80 112 80
WIRE 384 80 336 80
WIRE 560 80 464 80
WIRE -48 128 -48 80
WIRE 112 128 112 80
WIRE 208 144 208 80
WIRE 256 144 208 144
WIRE 560 144 560 80
WIRE 560 144 512 144
WIRE 608 144 560 144
WIRE 336 160 336 80
WIRE 336 160 320 160
WIRE 256 176 240 176
WIRE 240 224 240 176
WIRE 336 224 336 160
WIRE 336 224 240 224
WIRE -48 240 -48 208
WIRE 64 240 -48 240
WIRE 112 240 112 192
WIRE 112 240 64 240
WIRE 512 240 512 224
WIRE 560 240 512 240
WIRE 608 240 608 208
WIRE 608 240 560 240
WIRE 64 272 64 240
WIRE 560 272 560 240
FLAG -48 80 Vi
FLAG 64 272 0
FLAG 560 272 0
FLAG 560 80 Vo2
SYMBOL res 96 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 846.79
SYMBOL cap 96 128 R0
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL voltage -48 112 R0
WINDOW 123 24 95 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL ind 480 64 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value 71.75m
SYMBOL res 496 128 R0
WINDOW 3 -68 102 Left 2
SYMATTR InstName R2
SYMATTR Value 846.79
SYMBOL cap 592 144 R0
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL Opamps\\opamp 288 224 M180
SYMATTR InstName U1
TEXT -82 296 Left 2 !.ac dec 1000 100 5k
TEXT -344 296 Left 2 !.inc opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7182-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
C1 IN 0 2.2
C2 OUT 0 2.2
V1 IN 0 -8
V2 N001 0 PULSE(0 2 200u 1n 1n 10m)
R1 OUT 0 50
XU1 OUT MP_01 MP_02 N001 MP_03 0 IN ADP7182-x.x Rset=600k ;pnba Vout)))EN))GND)Vin
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7182-3.0.asy)
.lib ADP7182-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 -80 -48
WIRE 112 -48 32 -48
WIRE 432 -48 368 -48
WIRE 544 -48 432 -48
WIRE -80 -32 -80 -48
WIRE 32 -32 32 -48
WIRE 432 -32 432 -48
WIRE 544 -32 544 -48
WIRE -80 64 -80 48
WIRE 32 64 32 32
WIRE 432 64 432 32
WIRE 544 64 544 48
WIRE 112 144 32 144
WIRE 32 160 32 144
WIRE 32 256 32 240
WIRE 240 256 240 208
FLAG -80 64 0
FLAG 32 64 0
FLAG 432 64 0
FLAG 32 256 0
FLAG 240 256 0
FLAG 544 64 0
FLAG 32 -48 IN
FLAG 432 -48 OUT
SYMBOL cap 16 -32 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 2.2
SYMBOL voltage -80 -48 R0
SYMATTR InstName V1
SYMATTR Value -8
SYMBOL voltage 32 144 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 200u 1n 1n 10m)
SYMBOL res 528 -48 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL ADP7182-3.0 240 48 R0
SYMATTR InstName U1
TEXT 528 248 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\124000622116_CmosLinTest_1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N003 0 SINE(0 10m 1e6) AC 1
C2 Out N002 10n
M1 N002 In N001 N001 PMOS
R1 In N002 1e5 tol=1 pwr=0.1
C1 In N003 1n
V2 N001 0 10
M2 N002 In 0 0 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 10u 0 1n
.Fourier 1e6 V(In)
.Fourier 1e6 V(Out)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -256 80 -272 80
WIRE -256 128 -256 80
WIRE -256 224 -256 192
WIRE -256 368 -256 304
WIRE -160 80 -256 80
WIRE -160 192 -160 80
WIRE -160 304 -160 192
WIRE -128 192 -160 192
WIRE -48 80 -160 80
WIRE -48 304 -160 304
WIRE 0 64 0 48
WIRE 0 192 -48 192
WIRE 0 192 0 160
WIRE 0 224 0 192
WIRE 0 368 -256 368
WIRE 0 368 0 320
WIRE 32 192 0 192
WIRE 112 192 96 192
WIRE 112 192 112 176
WIRE 160 336 160 320
WIRE 192 48 0 48
WIRE 192 176 192 48
WIRE 192 320 160 320
WIRE 192 320 192 256
WIRE 192 368 0 368
WIRE 192 368 192 320
IOPIN -272 80 In
IOPIN 112 176 Out
SYMBOL cap -240 128 M0
WINDOW 0 -33 0 Left 0
WINDOW 3 -47 31 Left 0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL pmos -48 160 M180
SYMATTR InstName M1
SYMBOL cap 96 176 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL nmos -48 224 R0
SYMATTR InstName M2
SYMBOL voltage 192 160 M0
WINDOW 0 4 10 Left 0
WINDOW 3 15 56 Right 0
WINDOW 123 -67 188 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 10
SYMBOL voltage -256 208 M0
WINDOW 0 -15 57 Left 0
WINDOW 3 51 161 VLeft 0
WINDOW 123 -81 108 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10m 1e6)
SYMATTR Value2 AC 1
SYMBOL res -144 176 M90
WINDOW 0 -2 49 VBottom 0
WINDOW 3 46 51 VTop 0
SYMATTR InstName R1
SYMATTR Value 1e5
SYMATTR SpiceLine tol=1 pwr=0.1
FLAG -272 80 In
FLAG 160 336 0
FLAG 112 176 Out
TEXT -192 32 Left 0 !.tran 0 10u 0 1n
TEXT -240 384 Left 0 !.Fourier 1e6 V(In)
TEXT 8 384 Left 0 !.Fourier 1e6 V(Out)
* Z:\home\khalils\Downloads\files\data\raw_asc\31f265cc71f8_Biquad.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N002 0 SINE(0 1 1k) AC AC 1
R4 -VB N003 10k
R3 N003 VB 10k
C2 VL N004 10n
C1 VB N001 10n
R6 VL N001 16k
XU5 N003 0 -VB opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R2 VB N001 33k
R1 N001 N002 33k
R5 N004 -VB 16k
XU4 N001 0 VB opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
XU6 N004 0 VL opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
.ac dec 200 1 10k
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1688 680
WIRE 368 -128 -16 -128
WIRE 736 -128 448 -128
WIRE -16 -64 -16 -128
WIRE 64 -64 -16 -64
WIRE 144 -64 128 -64
WIRE -192 16 -304 16
WIRE -16 16 -16 -64
WIRE -16 16 -112 16
WIRE 32 16 -16 16
WIRE 144 16 144 -64
WIRE 144 16 112 16
WIRE 208 16 144 16
WIRE 304 16 288 16
WIRE 336 16 304 16
WIRE 448 16 416 16
WIRE 480 16 448 16
WIRE 592 16 560 16
WIRE 624 16 592 16
WIRE 736 16 736 -128
WIRE 736 16 688 16
WIRE -304 48 -304 16
WIRE -16 80 -16 16
WIRE 16 80 -16 80
WIRE 304 80 304 16
WIRE 336 80 304 80
WIRE 592 80 592 16
WIRE 624 80 592 80
WIRE 144 96 144 16
WIRE 144 96 80 96
WIRE 176 96 144 96
WIRE 448 96 448 16
WIRE 448 96 400 96
WIRE 480 96 448 96
WIRE 736 96 736 16
WIRE 736 96 688 96
WIRE 768 96 736 96
WIRE 16 112 -16 112
WIRE 336 112 304 112
WIRE 624 112 592 112
WIRE -304 160 -304 128
WIRE -16 160 -16 112
WIRE 304 160 304 112
WIRE 592 160 592 112
SYMBOL cap 128 -80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 128 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 33k
SYMBOL res 432 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL cap 688 0 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 576 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 16k
SYMBOL OpAmps\\opamp 368 32 R0
SYMATTR InstName U5
SYMBOL OpAmps\\opamp 48 32 R0
SYMATTR InstName U4
SYMBOL OpAmps\\opamp 656 32 R0
SYMATTR InstName U6
SYMBOL res -96 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 33k
SYMBOL res 304 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 464 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 16k
SYMBOL voltage -304 32 R0
WINDOW 3 -168 92 Left 2
WINDOW 123 -159 123 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 1 1k)
SYMATTR Value2 AC AC 1
SYMATTR InstName V2
FLAG 304 160 0
FLAG 592 160 0
FLAG -304 160 0
FLAG -16 160 0
FLAG 176 96 VB
FLAG 480 96 -VB
FLAG 768 96 VL
TEXT -256 144 Left 2 !.ac dec 200 1 10k
TEXT -256 120 Left 2 !.lib opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP160-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP160-1.2.asy)
V1 IN 0 5
XU1 IN 0 N001 OUT ADP16xfd K=833.3u ;pnba Vin)GND)En)Vout
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
Rload OUT 0 120
C1 OUT 0 1
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -80 96
WIRE 416 96 352 96
WIRE 512 96 416 96
WIRE -80 112 -80 96
WIRE 416 112 416 96
WIRE 512 112 512 96
WIRE -80 208 -80 192
WIRE 160 208 16 208
WIRE 416 208 416 176
WIRE 512 208 512 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL voltage -80 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 120
SYMBOL ADP160-1.2 256 208 R0
SYMATTR InstName U1
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
FLAG -80 208 0
FLAG 256 272 0
FLAG 416 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG -80 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\3388d01dcf9d_MAX44243.asc
* Generated by LTspice 26.0.1 for Windows.
Vee 0 Vee 15
Vcc Vcc 0 15
RL OUT 0 5k
V1 IN 0 SINE(0 50m 100k)
CL OUT 0 15p
XU1 IN OUT Vcc Vee OUT MAX44243 ;pnba In+)In-)V+)V-)OUT
.tran 10u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX44243.asy)
.lib MAX44243.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 656 256 304 256
WIRE 64 288 64 272
WIRE 432 352 432 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 656 384 656 256
WIRE 656 384 464 384
WIRE 752 384 656 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 656 416 656 384
WIRE 752 432 752 384
WIRE 64 448 64 400
WIRE 432 448 432 416
WIRE 304 496 304 400
WIRE 656 528 656 496
WIRE 752 528 752 496
WIRE 64 544 64 528
WIRE 304 592 304 576
FLAG 752 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 432 320 Vcc
FLAG 432 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 656 528 0
FLAG 304 400 IN
FLAG 752 528 0
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 15
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 15
SYMBOL res 640 400 R0
SYMATTR InstName RL
SYMATTR Value 5k
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 100k)
SYMBOL cap 736 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL MAX44243 432 320 R0
SYMATTR InstName U1
TEXT 16 632 Left 2 !.tran 10u