Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1962.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1962.asy)
V1 IN 0 PWL(0 0 1 10)
XU1 OUT OUT N001 0 IN MP_01 MP_02 IN LT1962 ;pnba OUT)ADJ)BYP)GND)_SHDN)))IN
Rload OUT 0 1K
C1 OUT 0 1
.tran 1
.lib LT1962.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 32 320 32
WIRE 416 32 352 32
WIRE 512 32 416 32
WIRE 16 48 -208 48
WIRE 32 48 16 48
WIRE 416 48 416 32
WIRE 512 48 512 32
WIRE -208 64 -208 48
WIRE 352 96 352 32
WIRE 352 96 320 96
WIRE 16 144 16 48
WIRE 32 144 16 144
WIRE 416 144 416 112
WIRE 512 144 512 128
WIRE -208 160 -208 144
WIRE 352 160 320 160
WIRE 176 240 176 208
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 400 48 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LT1962 176 96 R0
SYMATTR InstName U1
SYMBOL res 496 32 R0
SYMATTR InstName Rload
SYMATTR Value 1K
FLAG -208 160 0
FLAG 416 144 0
FLAG 512 144 0
FLAG 176 240 0
FLAG 512 32 OUT
FLAG -208 48 IN
TEXT 384 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\3340115ee8d1_6605-14.asc
* Generated by LTspice 26.0.1 for Windows.
V1 V+ 0 1.5
V2 V- 0 -1.5
E1 N001 0 N002 0 .5
E2 0 N006 N002 0 .5
E3 OUT 0 N005 N003 1
R1 0 N003 300
R2 0 N005 300
XU1 N001 N004 V+ N004 N006 N005 0 V- V+ N003 LTC6605-14 ;pnba IN4+)IN1+)BIAS)IN1-)IN4-)OUT+)Vocm)V-)V+)OUT-1
V3 N002 0 AC 1
.ac oct 20 100k 200Meg
.measure pt1 find V(out) at 7Meg
.measure pt2 find V(out) at 10.5Meg
.measure pt3 find V(out) at 14Meg
.measure pt4 find V(out) at 28Meg
.measure pt5 find V(out) at 70Meg
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\FilterProducts\LTC6605-14.asy)
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1756 680
WIRE -368 -16 -368 -32
WIRE -256 -16 -256 -32
WIRE 304 32 304 16
WIRE 32 64 -112 64
WIRE -368 80 -368 64
WIRE -256 80 -256 64
WIRE -112 96 -112 64
WIRE -160 112 -224 112
WIRE 480 112 448 112
WIRE 496 112 480 112
WIRE 592 112 576 112
WIRE 704 112 656 112
WIRE 32 128 -32 128
WIRE 656 144 656 112
WIRE -160 160 -176 160
WIRE 448 160 448 112
WIRE 448 160 400 160
WIRE 480 160 480 112
WIRE 608 160 480 160
WIRE -112 192 -112 176
WIRE -112 192 -144 192
WIRE 32 192 16 192
WIRE -112 208 -112 192
WIRE 608 208 480 208
WIRE -224 224 -224 112
WIRE -160 224 -224 224
WIRE 448 224 400 224
WIRE 656 240 656 224
WIRE -32 256 -32 128
WIRE 32 256 -32 256
WIRE -160 272 -176 272
WIRE 448 272 448 224
WIRE 480 272 480 208
WIRE 480 272 448 272
WIRE 496 272 480 272
WIRE 592 272 576 272
WIRE 416 288 400 288
WIRE -224 320 -224 224
WIRE -112 320 -112 288
WIRE 32 320 -112 320
WIRE 304 368 304 352
WIRE -224 416 -224 400
FLAG -368 80 0
FLAG -256 80 0
FLAG 416 288 0
FLAG -368 -32 V+
FLAG 16 192 V+
FLAG -144 192 0
FLAG -176 160 0
FLAG -176 272 0
FLAG -224 416 0
FLAG 656 240 0
FLAG 704 112 OUT
FLAG 592 112 0
FLAG 592 272 0
FLAG 304 16 V+
FLAG 304 368 V-
FLAG -256 -32 V-
SYMBOL voltage -368 -32 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL voltage -256 -32 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V2
SYMATTR Value -1.5
SYMBOL e -112 80 R0
SYMATTR InstName E1
SYMATTR Value .5
SYMBOL e -112 192 R0
SYMATTR InstName E2
SYMATTR Value .5
SYMBOL e2 656 128 R0
SYMATTR InstName E3
SYMATTR Value 1
SYMBOL res 592 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL res 592 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 300
SYMBOL LTC6605-14 224 192 R0
SYMATTR InstName U1
SYMBOL voltage -224 304 R0
SYMATTR InstName V3
SYMATTR Value AC 1
TEXT 408 504 Left 2 !.ac oct 20 100k 200Meg
TEXT 416 344 Left 2 !.measure pt1 find V(out) at 7Meg\n.measure pt2 find V(out) at 10.5Meg\n.measure pt3 find V(out) at  14Meg\n.measure pt4 find V(out) at 28Meg\n.measure pt5 find V(out) at 70Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\00e23973d6e6_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
M1 N001 N002 0 0 NMOS_mod
V2 N002 0 V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model NMOS_mod NMOS (VTO=1 BETA=0.1)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 -128 96 -128
WIRE 96 -16 96 -128
WIRE -16 16 -96 16
WIRE -96 48 -96 16
WIRE -16 64 -16 16
WIRE 48 64 -16 64
SYMBOL nmos 48 -16 R0
SYMATTR InstName M1
SYMATTR Value NMOS_mod
SYMBOL voltage -96 32 R0
SYMATTR InstName V2
SYMBOL voltage 320 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 320 -48 0
FLAG 96 80 0
FLAG -96 128 0
TEXT 48 176 Left 2 !.model NMOS_mod NMOS (VTO=1 BETA=0.1)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6360.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 5
XU1 N003 N003 N001 N001 N002 N002 NC_01 IN 0 LTC6360 ;pnba -IN)OUT)Vcc)Vdd)CPO)CPI)_SHDN)+IN)GND
V1 IN 0 SINE(2.5 1 300K)
C1 OUT 0 330p
C2 N002 0 1.1
R1 N003 OUT 10
.tran 50u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6360.asy)
.lib LTC6360.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2244 1252
WIRE 1328 496 1216 496
WIRE 1504 496 1328 496
WIRE 1056 512 720 512
WIRE 1504 512 1504 496
WIRE 720 528 720 512
WIRE 1056 528 1056 512
WIRE 1216 528 1216 496
WIRE 1328 528 1328 496
WIRE 1456 592 1408 592
WIRE 1504 608 1504 592
WIRE 720 624 720 608
WIRE 1456 688 1456 592
WIRE 1456 688 1408 688
WIRE 1456 704 1456 688
WIRE 1216 768 1216 752
WIRE 1056 784 1056 752
WIRE 1152 784 1152 752
WIRE 1152 784 1056 784
WIRE 1456 784 1456 768
WIRE 1152 800 1152 784
WIRE 1152 896 1152 880
WIRE 1216 896 1152 896
WIRE 1152 912 1152 896
WIRE 1152 992 1152 976
FLAG 720 624 0
FLAG 1504 608 0
FLAG 1216 768 0
FLAG 1152 992 0
FLAG 1456 784 0
FLAG 720 512 IN
FLAG 1216 896 OUT
SYMBOL voltage 1504 496 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL LTC6360 1216 640 R0
SYMATTR InstName U1
SYMBOL voltage 720 512 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(2.5 1 300K)
SYMBOL cap 1136 912 R0
SYMATTR InstName C1
SYMATTR Value 330p
SYMBOL cap 1440 704 R0
SYMATTR InstName C2
SYMATTR Value 1.1
SYMBOL res 1136 784 R0
SYMATTR InstName R1
SYMATTR Value 10
TEXT 1440 896 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\e94fa959bffb_exp6a.asc
* Generated by LTspice 26.0.1 for Windows.
* Saiprasad Patil 60001200090
#.step param R 100 115 5
#.step param R 18.52 390.481 10
R4 N002 0 10k
R3 Va 0 10k
R2 N001 Vb 10k
R1 N001 Va 10k
V1 N001 0 5V
R5 Vb N002 {R}
.op
.step param R 10 20 0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1044 680
WIRE 272 -32 64 -32
WIRE 560 -32 272 -32
WIRE 272 48 272 -32
WIRE 560 48 560 -32
WIRE 64 128 64 -32
WIRE 272 176 272 128
WIRE 320 176 272 176
WIRE 560 176 560 128
WIRE 608 176 560 176
WIRE 272 208 272 176
WIRE 560 208 560 176
WIRE 560 336 560 288
WIRE 64 448 64 208
WIRE 272 448 272 288
WIRE 272 448 64 448
WIRE 560 448 560 416
WIRE 560 448 272 448
SYMBOL res 544 320 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL res 544 32 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 256 32 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 64 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5V
SYMBOL res 256 192 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 544 192 R0
SYMATTR InstName R5
SYMATTR Value {R}
FLAG 272 448 0
FLAG 320 176 Va
FLAG 608 176 Vb
TEXT 30 472 Left 2 !.op
TEXT 632 200 Left 2 !#.step param R 100 115 5
TEXT 648 232 Left 2 !.step param R 10 20 0.5
TEXT 640 128 Left 2 ;Saiprasad Patil 60001200090
TEXT 648 272 Left 2 !#.step param R 18.52 390.481 10
* Z:\home\khalils\Downloads\files\data\raw_asc\b4b3dfa18de5_circuit_1.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 N003 LXHL-BW02
Q1 N003 N004 0 0 2N2222
R1 N004 N001 100
V1 N001 0 5 Rser=0.01
R2 N002 N001 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0.2s
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 144 0 144
WIRE 96 144 80 144
WIRE 304 144 176 144
WIRE 464 144 368 144
WIRE 0 240 0 144
WIRE 464 240 464 144
WIRE 80 288 80 144
WIRE 208 288 80 288
WIRE 400 288 288 288
WIRE 0 400 0 320
WIRE 208 400 0 400
WIRE 464 400 464 336
WIRE 464 400 208 400
SYMBOL npn 400 240 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL LED 304 128 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 72 32 VTop 2
SYMATTR InstName D1
SYMATTR Value LXHL-BW02
SYMBOL voltage 0 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMATTR SpiceLine Rser=0.01
SYMBOL res 192 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL res 304 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
FLAG 208 400 0
TEXT -34 424 Left 2 !.tran 0.2s
* Z:\home\khalils\Downloads\files\data\raw_asc\1af3ae0ad497_nr21.asc
* Generated by LTspice 26.0.1 for Windows.
M0 NC_13 NC_14 NC_15 NC_16 nch w=2u l=1u
M3 NC_01 NC_02 NC_03 NC_04 pch w=6u l=1u
M1 NC_09 NC_10 NC_11 NC_12 nch w=2u l=1u
M2 NC_05 NC_06 NC_07 NC_08 pch w=6u l=1u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 944 1056
WIRE 448 704 480 704
WIRE 448 704 448 672
WIRE 480 704 480 624
WIRE 448 624 480 624
WIRE 704 784 736 784
WIRE 736 864 736 784
WIRE 704 864 736 864
WIRE 704 864 704 832
WIRE 448 896 704 896
WIRE 704 896 704 864
WIRE 448 896 448 704
WIRE 704 960 704 896
WIRE 704 208 736 208
WIRE 736 208 736 128
WIRE 704 128 736 128
WIRE 704 128 704 96
WIRE 736 368 736 208
WIRE 704 368 736 368
WIRE 704 160 704 128
WIRE 704 320 704 256
WIRE 704 512 864 512
WIRE 704 512 704 416
WIRE 704 544 704 512
WIRE 704 736 704 544
WIRE 448 544 704 544
WIRE 448 576 448 544
WIRE 256 368 640 368
WIRE 256 784 256 368
WIRE 256 784 640 784
WIRE 96 784 256 784
WIRE 192 208 640 208
WIRE 192 624 192 208
WIRE 192 624 384 624
WIRE 96 624 192 624
IOPIN 864 512 Out
IOPIN 704 960 BiDir
IOPIN 704 96 BiDir
IOPIN 96 784 In
IOPIN 96 624 In
SYMBOL NMOS 384 624 R0
SYMATTR InstName M0
SYMATTR Value nch
SYMATTR Value2 w=2u l=1u
SYMBOL PMOS 640 368 R0
SYMATTR InstName M2
SYMATTR Value pch
SYMATTR Value2 w=6u l=1u
SYMBOL PMOS 640 208 R0
SYMATTR InstName M3
SYMATTR Value pch
SYMATTR Value2 w=6u l=1u
SYMBOL NMOS 640 784 R0
SYMATTR InstName M1
SYMATTR Value nch
SYMATTR Value2 w=2u l=1u
FLAG 864 512 YB
FLAG 704 960 VSS
FLAG 704 96 VDD
FLAG 96 784 B
FLAG 96 624 A
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3032.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3032.asy)
R4 N004 0 29K
R6 N006 0 100
R1 N002 N003 50K
V1 N005 0 pwl(0 0 1 -10)
R2 N003 0 29K
V2 N001 0 pwl(0 0 1 10)
C2 N006 0 10
XU1 N002 N003 NC_01 0 MP_02 N005 N006 N004 MP_03 N001 NC_04 N001 MP_05 N001 LT3032 ;pnba OUTP)ADJP)BYPP)GND))INN)OUTN)ADJN))_SHDNN)BYPN)_SHDNP))INP
R5 N002 0 100
C1 N002 0 10
R3 N006 N004 50K
.tran 1
.lib LT3032.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1000 680
WIRE -48 -64 -80 -64
WIRE 80 -64 32 -64
WIRE 96 -64 80 -64
WIRE 432 -64 352 -64
WIRE 528 -64 432 -64
WIRE 608 -64 528 -64
WIRE 432 -48 432 -64
WIRE 528 -48 528 -64
WIRE 608 -48 608 -64
WIRE 432 48 432 32
WIRE 432 48 384 48
WIRE 528 48 528 16
WIRE 608 48 608 32
WIRE 432 64 432 48
WIRE 80 128 80 -64
WIRE 96 128 80 128
WIRE 384 128 384 48
WIRE 384 128 352 128
WIRE 432 160 432 144
WIRE 368 224 352 224
WIRE 432 304 432 288
WIRE 80 320 80 128
WIRE 96 320 80 320
WIRE 384 320 352 320
WIRE 384 400 384 320
WIRE 432 400 432 384
WIRE 432 400 384 400
WIRE 432 416 432 400
WIRE 608 416 608 400
WIRE 528 432 528 400
WIRE -64 512 -96 512
WIRE 96 512 16 512
WIRE 432 512 432 496
WIRE 432 512 352 512
WIRE 528 512 528 496
WIRE 528 512 432 512
WIRE 608 512 608 496
WIRE 608 512 528 512
SYMBOL res 592 512 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R6
SYMATTR Value 100
SYMBOL res 416 512 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 50K
SYMBOL cap 512 496 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res 416 -64 R0
SYMATTR InstName R1
SYMATTR Value 50K
SYMBOL res 416 400 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 29K
SYMBOL PowerProducts\\LT3032 224 224 R0
SYMATTR InstName U1
SYMBOL cap 512 -48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage 48 -64 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value pwl(0 0 1 10)
SYMBOL res 592 -64 R0
SYMATTR InstName R5
SYMATTR Value 100
SYMBOL voltage 32 512 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value pwl(0 0 1 -10)
SYMBOL res 416 48 R0
SYMATTR InstName R2
SYMATTR Value 29K
FLAG 368 224 0
FLAG -96 512 0
FLAG -80 -64 0
FLAG 528 48 0
FLAG 432 160 0
FLAG 528 400 0
FLAG 432 288 0
FLAG 608 48 0
FLAG 608 400 0
TEXT 648 544 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\0a9b4a50281c_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
A1 S 0 CLK 0 N001 QBAR Q 0 DFLOP
V1 S 0 PULSE(0 1 0 3ns 3ns 2ms 4ms 0)
V3 CLR 0 PULSE(0 1 0 3ns 3ns 2ms 8)
V2 CLK 0 PULSE(1 0 0 3ns 3ns 1ms 2ms)
.tran 10ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1276 680
WIRE -432 -288 -432 -400
WIRE -416 -208 -432 -208
WIRE 800 48 640 48
WIRE 1152 48 960 48
WIRE -448 64 -448 -32
WIRE 800 96 640 96
WIRE 1152 96 976 96
WIRE 880 256 880 144
WIRE -448 416 -448 288
FLAG -448 496 0
FLAG -416 -208 0
FLAG -432 -400 S
IOPIN -432 -400 In
FLAG 640 48 S
IOPIN 640 48 In
FLAG -448 -32 CLK
IOPIN -448 -32 In
FLAG 640 96 CLK
IOPIN 640 96 In
FLAG -448 288 CLR
IOPIN -448 288 In
FLAG 1152 48 Q
IOPIN 1152 48 Out
FLAG 1152 96 QBAR
IOPIN 1152 96 Out
FLAG -448 144 0
FLAG 816 256 CLR
IOPIN 816 256 Out
SYMBOL Digital\\dflop 880 0 R0
SYMATTR InstName A1
SYMBOL voltage -432 -304 R0
WINDOW 3 -90 134 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 3ns 3ns 2ms 4ms 0)
SYMBOL voltage -448 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 0 3ns 3ns 2ms 8)
SYMBOL voltage -448 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(1 0 0 3ns 3ns 1ms 2ms)
TEXT 972 290 Left 2 !.tran 10ms
* Z:\home\khalils\Downloads\files\data\raw_asc\06133ebdec21_Circuit_Diagram.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 N004 82kOhm
R2 N003 N004 82kOhm
R3 N001 N004 47kOhm
VAC N004 N001 Power Source
Relay_dim N003 N002
Relay_transparent N004 N002
XPanel N002 N001 2ndOrderComplexzero ;pnba IN)OUT
* Library below included based on ModelFile attribute of instance XPanel (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\2ndOrdComplexzero.asy)
.lib 2ndOrderComplexzero.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 680
WIRE 736 -176 224 -176
WIRE 1024 -176 736 -176
WIRE 224 -144 224 -176
WIRE 736 -80 736 -176
WIRE 224 128 224 96
WIRE 416 128 224 128
WIRE 528 128 496 128
WIRE 560 128 528 128
WIRE 656 128 624 128
WIRE 736 128 736 -16
WIRE 736 128 656 128
WIRE 816 128 736 128
WIRE 880 128 816 128
WIRE 1024 128 1024 -176
WIRE 1024 128 960 128
WIRE 528 240 528 128
WIRE 560 240 528 240
WIRE 656 240 656 128
WIRE 656 240 624 240
WIRE 224 368 224 128
WIRE 640 368 224 368
WIRE 816 368 816 128
WIRE 816 368 720 368
SYMBOL res2 560 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName R1
SYMATTR Value 82kOhm
SYMBOL res2 560 256 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName R2
SYMATTR Value 82kOhm
SYMBOL res2 720 -80 R0
SYMATTR InstName R3
SYMATTR Value 47kOhm
SYMBOL voltage 864 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName AC
SYMATTR Value Power Source
SYMBOL Misc/EuropeanResistor 512 112 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName Relay_dim
SYMATTR Value ""
SYMBOL Misc/EuropeanResistor 736 352 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName Relay_transparent
SYMATTR Value ""
SYMBOL SpecialFunctions/2ndOrdComplexzero 208 16 R270
SYMATTR InstName Panel
SYMATTR Value ""
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6119-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6119-1.asy)
R1 N001 N002 .1
V1 N001 0 PWL(0 0 5u 12)
C1 N002 0 .1
R3 N008 N010 2.73K
R2 N005 N010 6.04K
V4 N006 0 5
XU1 N002 N004 N007 N009 0 N008 N010 N005 N001 N003 LT6119-1 ;pnba SenseLo)LE)OutC2)OutC1)V-)INC1)INC2)OutA)V+)SenseHi
R5 N008 0 1.6K
R8 N001 N003 100
R4 N006 N009 10K
C2 N004 0 100n
R6 N001 N004 24.9K
R9 N006 N007 10K
I1 N002 0 PWL(20u 0 250u .5 400u .5 500u .2 600u .2 700u 0) load
.tran .7m
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2204 1236
WIRE -144 -32 -400 -32
WIRE 80 -32 -144 -32
WIRE 288 -32 80 -32
WIRE 352 -32 288 -32
WIRE 480 -32 432 -32
WIRE 560 -32 480 -32
WIRE 672 -32 560 -32
WIRE -400 -16 -400 -32
WIRE 288 -16 288 -32
WIRE 560 -16 560 -32
WIRE 672 -16 672 -32
WIRE -400 80 -400 64
WIRE -144 80 -144 -32
WIRE 288 80 288 64
WIRE 560 80 560 48
WIRE 672 80 672 64
WIRE 80 128 80 -32
WIRE 128 128 80 128
WIRE 480 128 480 -32
WIRE 480 128 448 128
WIRE -144 240 -144 160
WIRE 128 240 -144 240
WIRE 704 240 448 240
WIRE 704 304 704 240
WIRE -144 320 -144 304
WIRE -16 352 -128 352
WIRE 16 352 -16 352
WIRE 128 352 96 352
WIRE 480 352 448 352
WIRE 544 352 480 352
WIRE 640 352 624 352
WIRE -128 368 -128 352
WIRE 480 368 480 352
WIRE -128 464 -128 448
WIRE -16 464 -16 352
WIRE 16 464 -16 464
WIRE 128 464 96 464
WIRE 480 464 480 448
WIRE 480 464 448 464
WIRE 704 464 704 384
WIRE 704 464 480 464
WIRE 288 528 288 512
SYMBOL voltage -128 352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL voltage -400 -32 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 5u 12)
SYMBOL LT6119-1 288 304 R0
SYMATTR InstName U1
SYMBOL res 688 288 R0
SYMATTR InstName R2
SYMATTR Value 6.04K
SYMBOL res 0 368 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R9
SYMATTR Value 10K
SYMBOL cap 544 -16 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL res -160 64 R0
SYMATTR InstName R6
SYMATTR Value 24.9K
SYMBOL res 272 -32 R0
SYMATTR InstName R8
SYMATTR Value 100
SYMBOL res 464 352 R0
SYMATTR InstName R3
SYMATTR Value 2.73K
SYMBOL cap -160 240 R0
WINDOW 0 34 20 Left 2
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL current 672 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 39 48 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMATTR Value PWL(20u 0 250u .5 400u .5 500u .2 600u .2 700u 0)
SYMBOL res 0 480 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 528 368 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 1.6K
SYMBOL res 336 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value .1
FLAG 288 528 0
FLAG -400 80 0
FLAG 672 80 0
FLAG 640 352 0
FLAG 560 80 0
FLAG -128 464 0
FLAG -144 320 0
TEXT 816 440 Left 2 !.tran .7m
* Z:\home\khalils\Downloads\files\data\raw_asc\07662abea9f7_Vswitch.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* This shows an example of suppling a .model statement as a SPICE\ndirective directly on the schematic to define a voltage controlled switch.
V1 IN 0 PULSE(0 1 0 .5m .5m 0 1m)
R1 N001 OUT 1K
V2 N001 0 3.3
S1 0 OUT IN 0 MYSW
.model MYSW SW(Ron=1 Roff=1Meg Vt=.5 Vh=-.4)
.tran 3m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1276 680
WIRE 224 144 192 144
WIRE 336 144 304 144
WIRE 192 176 192 144
WIRE 144 192 -208 192
WIRE 336 192 336 144
WIRE -208 208 -208 192
WIRE 144 240 128 240
WIRE 192 272 192 256
WIRE 336 304 336 272
WIRE -208 320 -208 288
SYMBOL voltage -208 192 R0
WINDOW 3 13 107 Left 2
SYMATTR Value PULSE(0 1 0 .5m .5m 0 1m)
SYMATTR InstName V1
SYMBOL res 320 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 336 176 R0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL sw 192 272 M180
WINDOW 0 12 104 Left 2
WINDOW 3 17 11 Left 2
SYMATTR InstName S1
SYMATTR Value MYSW
FLAG 336 304 0
FLAG 192 272 0
FLAG 128 240 0
FLAG -208 320 0
FLAG -208 192 IN
FLAG 192 144 OUT
TEXT -224 400 Left 2 !.model MYSW SW(Ron=1 Roff=1Meg Vt=.5 Vh=-.4)
TEXT 192 344 Left 2 !.tran 3m
TEXT 96 432 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT 56 88 Bottom 2 ;This shows an example of suppling a .model statement as a SPICE\ndirective directly on the schematic to define a voltage controlled switch.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1575-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1575-1.5.asy)
V2 N002 0 12
R3 N004 N005 5K
V1 N001 0 5
C2 N004 0 10p
XU1 0 N002 0 OUT N004 N003 N001 N001 LT1575-1.5 ;pnba SHDN)Vin)GND)OUT)Comp)Gate)Ineg)Ipos
M3 N001 N003 OUT OUT IRFZ24
I2 OUT 0 PULSE(.2 5 300u 100n 100n 300u 600u) load
C1 OUT 0 24
C3 N005 0 1000p
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m
.lib LT1575.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4232 1996
WIRE 2352 -32 2336 -32
WIRE 2688 -32 2640 -32
WIRE 2928 -32 2688 -32
WIRE 3024 -32 2928 -32
WIRE 3024 -16 3024 -32
WIRE 2352 64 2240 64
WIRE 2688 64 2688 -32
WIRE 2688 64 2640 64
WIRE 2240 80 2240 64
WIRE 2928 80 2928 -32
WIRE 3024 80 3024 64
WIRE 2352 160 2336 160
WIRE 2880 160 2640 160
WIRE 2240 176 2240 160
WIRE 2352 256 2336 256
WIRE 2672 256 2640 256
WIRE 2704 256 2672 256
WIRE 2800 256 2784 256
WIRE 2672 272 2672 256
WIRE 2800 272 2800 256
WIRE 2672 352 2672 336
WIRE 2800 352 2800 336
WIRE 2336 384 2336 256
WIRE 2928 384 2928 176
WIRE 2928 384 2336 384
WIRE 3056 384 2928 384
WIRE 2928 400 2928 384
WIRE 3056 400 3056 384
WIRE 2928 496 2928 464
WIRE 3056 496 3056 480
SYMBOL cap 2656 272 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL res 2688 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 5K
SYMBOL cap 2784 272 R0
SYMATTR InstName C3
SYMATTR Value 1000p
SYMBOL LT1575-1.5 2496 112 R0
SYMATTR InstName U1
SYMBOL voltage 3024 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 2240 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL nmos 2880 80 R0
SYMATTR InstName M3
SYMATTR Value IRFZ24
SYMBOL current 3056 400 R0
WINDOW 123 0 0 Left 2
WINDOW 39 39 39 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I2
SYMATTR Value PULSE(.2 5 300u 100n 100n 300u 600u)
SYMBOL cap 2912 400 R0
SYMATTR InstName C1
SYMATTR Value 24
FLAG 2928 496 0
FLAG 3056 496 0
FLAG 3024 80 0
FLAG 2800 352 0
FLAG 2672 352 0
FLAG 2336 -32 0
FLAG 2240 176 0
FLAG 2336 160 0
FLAG 3056 384 OUT
TEXT 3104 528 Left 2 !.tran 1m