* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4283.asc
* Generated by LTspice 26.0.1 for Windows.
V1 0 VEE PWL(0 0 10u 48)
M1 OUT N017 N018 N018 PSMN4R8100BSE M=2
RS1 N018 VEE .5m
RD N015 OUT 100K
RDT N012 OUT 200K
RDB N012 VEE 5.11K
R6 N001 N008 100K
R7 N001 PGIO1 100K
RRT N002 0 200K
RRB VEE N002 5.11K
RIN 0 N001 4K
RUV3 0 N005 487K
RUV1 N005 N007 14.3K
CTMR N010 VEE 4.7n
CL 0 OUT 500
ROT N004 N006 1.4K
ROB N006 VEE 10K
S1 0 OUT N013 0 SSHORT
V2 N013 0 PWL(0 0 1.2 0 +10n 0 +20m 0 +10n 0)
CVCC VEE N003 1
CIN N001 VEE .1
XU1 VEE N005 N005 N007 N004 N006 MP_01 MP_02 MP_03 MP_04 VEE MP_05 MP_06 VEE N018 MP_07 MP_08 N014 MP_09 N015 N012 N002 N011 N010 MP_10 MP_11 MP_12 MP_13 PGIO1 N008 VEE N003 MP_14 MP_15 MP_16 MP_17 MP_18 MP_19 MP_20 MP_21 MP_22 N003 N001 N001 LTC4283 A6=0 A5=0 A4=1 A3=1 A2=0 B7=0 B6=0 B5=0 B4=0 B3=0 B2=0 B1=1 B0=1 D7=0 D6=0 D5=0 D4=1 D3=1 D2=1 D1=0 D0=0 E7=1 E6=1 E5=0 E4=0 E3=0 E2=0 E1=0 F7=0 ;pnba _EN)UVL)UVH)OV)Vref)Voutth)))))Vee)))Sense-)Sense+)))Gate))Drain)Drns)Rtns)Ramp)Tmr)))))PGIO1)PGIO2)PGIO3)PGIO4))))))))))IntVcc)Vin)Vz
RG2 N014 N016 470
CG2 N016 VEE 100n
RUV2 N007 VEE 10K
R1 N010 N009 18.2K
CTMR1 N009 VEE 68n
R2 N009 VEE 1.13Meg
RG1 N014 N017 10
B1 0 OUT I=if(V(PGIO1,VEE)<.5 & time > .1,MIN(Power/MAX(V(0,OUT),12),Imax),0)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1.6
.model SSHORT SW(Ron=10m Roff=1k vt=.5 vh=-200m)
* UV ON = -38.6V\nUV OFF = -71.9V\nOV OFF = 70.7V
* Non Default Bits:\n(set as params on symbol)\nDVDT = 0 (A6)\nVILIM = 0001 (D7,D6,D5,D4) \nFB = 11b (D3,D2)\nFTBD_DL = 00b (E5,4)
* Note: All bits must be set to 0 or 1\nUndefined behaivor for other values\n \nSee datasheet for further description.\n \nBit Name Default\n Description\n \nCONTROL_1 (0x0A)\n \nA6 DVDT 0\n 1->Enable DVDT startup\nA5 THERM_TMR 0\n 1->Turns off 2 uA TMR pulldown\nA4 FET_BAD_TURN_OFF 1\n 1-> Turn MOSFET Off after FET_BAD\nA3 PWRG_RESET_CNTRL 1\n 1-> Vout Low resets Power Good\n 0-> MOSFET Off resets Power Good\nA2 PGIO2_ACLB 0\n 1-> PGIO2 configured as inverted ACL\n 0-> PGIO2 configured as inverted second Power Good\n \nCONTROL_2 (0x0B)\n \nB7 EXT_FAULT_RETRY 0\n 1->Enables Auto Retry after EXT_FAULT\nB6 PGI_RETRY 0\n 1->Enables Auto Retry after PGI_FAULT\nB5-4 FET_BAD_RETRY 00 \n Configures FET_BAD Retry\n B5,B4 Number of Retries\n 00 0 (Latch-Off)\n 01 1\n 10 7\n 11 infinite\n \nB3-2 OC_RETRY 00\n Configures OC (Over Current) Retry\n B3,B2 Number of Retries\n 00 0 (Latch-Off)\n 01 1\n 10 7\n 11 infinite\n \nB1 UV_RETRY 1\n 1-> Enables Auto Retry after UV_FAULT\nB0 OV_RETRY 1\n 1-> Enables Auto Retry after OV_FAULT
* CONFIG_1 (0x0D) \n \nD7-4 ILIM 0000\n Configures Current Limit Voltage (VILIM)\n (VILIM(FAST) = 2*VILIM)\n D7,D6,D5,D4 VILIM\n 0000 15m 1000 23m\n 0001 16m 1001 24m\n 0010 17m 1010 25m\n 0011 18m 1011 26m\n 0100 19m 1100 27m\n 0101 20m 1101 28m\n 0110 21m 1110 29m\n 0111 22m 1111 30m\n \nD3-2 FB 00\n Configures Current Limit Foldback\n D3,D2 Foldback Factor\n 00 100% (no foldback)\n 01 50%\n 10 20%\n 11 10%\n \nD1 FB_DIS 0\n 1->Foldback after Startup Disabled\nD0 LPFB 0\n 1->Load Power Foldback after Startup Enabled
* CONFIG_2 (0x0E) \n \nE7-6 VDTH 11\n Configures Drain Voltage threshold\n for starting FET bad timer\n \n E7,E6 VD,FET(TH)\n 00 72 mV\n 01 102 mV\n 10 143 mV\n 11 203 mV\n \nE5-4 FTBD_DL 00\n Configures FET_BAD filtering timer delay\n \n E5,E4 TDL(FETBAD)\n 00 0.256 sec\n 01 0.512 sec\n 10 1.02 sec\n 11 2.05 sec\n \nE3-1 COOLING_DL 000\n Configures Cooling delay before retry\n for OC_FAULT, FET_BAD_FAULT or EXT_FAULT\n \n E3,E2,E1 TDL(RTRY)\n 000 0.512 sec 100 8.19 sec\n 001 1.02 sec 101 16.4 sec\n 010 2.05 sec 110 32.8 sec\n 011 4.1 sec 111 65.5 sec\n \nCONFIG_3 (0x0F) \n \nF7 EXTFLT_TURN_OFF 0\n 1->Turn MOSFET off after External Fault
* LTC4283 Programing Parameters
* Use PWL(0 0 1.2 0 +10n 1 +20m 1 +10n 0) to short the output at 1.2sec
* M=2 Indicates 2\nparallel devices
* Increase CTMR1 to prevent timeout
.param Power=600
.param Imax=120
* 600W Constant Power Switched Load
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4283.asy)
.lib LTC4283.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2876 6124
WIRE -16 -896 -16 -912
WIRE -256 -800 -1072 -800
WIRE -144 -800 -256 -800
WIRE -16 -800 -16 -816
WIRE -16 -800 -80 -800
WIRE -256 -768 -256 -800
WIRE 560 -768 528 -768
WIRE 672 -768 640 -768
WIRE 704 -768 672 -768
WIRE 1280 -768 784 -768
WIRE -1008 -704 -1008 -720
WIRE -16 -704 -16 -800
WIRE 80 -704 -16 -704
WIRE 1104 -704 80 -704
WIRE -256 -688 -256 -704
WIRE 832 -688 -256 -688
WIRE -256 -672 -256 -688
WIRE -16 -672 -16 -704
WIRE 80 -672 80 -704
WIRE 672 -672 672 -768
WIRE 1168 -640 816 -640
WIRE 1168 -624 1168 -640
WIRE -1008 -608 -1008 -624
WIRE -368 -608 -1008 -608
WIRE 1136 -576 816 -576
WIRE -1008 -544 -1008 -608
WIRE -368 -544 -1008 -544
WIRE -1008 -528 -1008 -544
WIRE 1136 -528 1136 -576
WIRE 1168 -528 1168 -544
WIRE 1168 -528 1136 -528
WIRE 880 -512 816 -512
WIRE 992 -512 880 -512
WIRE 1104 -512 1104 -704
WIRE 1104 -512 1072 -512
WIRE 1168 -512 1168 -528
WIRE -368 -480 -864 -480
WIRE 928 -448 816 -448
WIRE 1104 -448 1104 -512
WIRE 1104 -448 1008 -448
WIRE -1008 -432 -1008 -448
WIRE -864 -432 -864 -480
WIRE -864 -432 -1008 -432
WIRE -688 -416 -832 -416
WIRE -640 -416 -688 -416
WIRE -528 -416 -560 -416
WIRE -368 -416 -528 -416
WIRE -1008 -400 -1008 -432
WIRE -832 -384 -832 -416
WIRE 1168 -384 1168 -432
WIRE 1168 -384 816 -384
WIRE 1280 -384 1280 -768
WIRE 1280 -384 1168 -384
WIRE -368 -352 -400 -352
WIRE -688 -336 -688 -416
WIRE -528 -336 -528 -416
WIRE 832 -320 832 -688
WIRE 832 -320 816 -320
WIRE -368 -288 -448 -288
WIRE 1408 -288 1408 -320
WIRE 1472 -272 1456 -272
WIRE 928 -256 816 -256
WIRE 1040 -256 928 -256
WIRE 1488 -224 1456 -224
WIRE 400 -208 400 -224
WIRE 400 -208 240 -208
WIRE 672 -208 672 -224
WIRE 1488 -208 1488 -224
WIRE -1072 -192 -1072 -800
WIRE -1008 -192 -1008 -320
WIRE -1008 -192 -1072 -192
WIRE -832 -192 -832 -304
WIRE -832 -192 -1008 -192
WIRE -688 -192 -688 -272
WIRE -688 -192 -832 -192
WIRE -528 -192 -528 -272
WIRE -528 -192 -688 -192
WIRE -448 -192 -448 -288
WIRE -448 -192 -528 -192
WIRE -256 -192 -256 -224
WIRE -256 -192 -448 -192
WIRE 240 -192 240 -208
WIRE 928 -176 928 -256
WIRE 1040 -176 1040 -256
WIRE 400 -160 400 -208
WIRE -1280 -112 -1280 -144
WIRE 240 -96 240 -112
WIRE 1488 -96 1488 -128
WIRE 400 -48 400 -80
WIRE -1280 0 -1280 -32
WIRE -256 0 -256 -192
WIRE -256 0 -1280 0
WIRE -64 0 -64 -224
WIRE -64 0 -256 0
WIRE -48 0 -64 0
WIRE 48 0 48 -224
WIRE 48 0 32 0
WIRE 384 0 48 0
WIRE 672 0 672 -128
WIRE 672 0 480 0
WIRE 1296 0 1296 -32
WIRE 1536 0 1536 -32
WIRE -256 80 -256 0
WIRE 240 80 240 -32
WIRE 240 80 -256 80
WIRE 1040 80 1040 -96
WIRE 1040 80 240 80
WIRE 1168 80 1168 -384
WIRE 1168 80 1040 80
WIRE 672 112 672 0
WIRE 928 112 928 -96
WIRE 928 112 672 112
WIRE 1296 112 1296 64
WIRE 1296 112 928 112
WIRE 1408 112 1408 -208
WIRE 1408 112 1296 112
WIRE 1536 112 1536 80
WIRE 1536 112 1408 112
FLAG -1280 -144 0
FLAG 528 -768 0
FLAG -16 -912 0
FLAG -1008 -720 0
FLAG 1296 -32 0
FLAG 1408 -320 0
FLAG 1488 -96 0
FLAG 1472 -272 0
FLAG -1280 0 VEE
FLAG 1536 112 OUT
FLAG 880 -512 PGIO1
FLAG 1536 -32 0
SYMBOL voltage -1280 -128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 10u 48)
SYMBOL nmos 480 -48 R90
WINDOW 0 -18 -6 VRight 2
WINDOW 3 73 50 VCenter 2
WINDOW 123 101 50 VCenter 2
SYMATTR InstName M1
SYMATTR Value PSMN4R8100BSE
SYMATTR Value2 M=2
SYMBOL res 48 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RS1
SYMATTR Value .5m
SYMBOL res 656 -224 R0
SYMATTR InstName RD
SYMATTR Value 100K
SYMBOL res 912 -192 R0
SYMATTR InstName RDT
SYMATTR Value 200K
SYMBOL res 1024 -192 R0
SYMATTR InstName RDB
SYMATTR Value 5.11K
SYMBOL res 1024 -464 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 100K
SYMBOL res 1088 -528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 100K
SYMBOL res 656 -784 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RRT
SYMATTR Value 200K
SYMBOL res 800 -784 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RRB
SYMATTR Value 5.11K
SYMBOL res -32 -912 R0
SYMATTR InstName RIN
SYMATTR Value 4K
SYMBOL res -1024 -720 R0
SYMATTR InstName RUV3
SYMATTR Value 487K
SYMBOL res -1024 -544 R0
SYMATTR InstName RUV1
SYMATTR Value 14.3K
SYMBOL cap -544 -336 R0
SYMATTR InstName CTMR
SYMATTR Value 4.7n
SYMBOL cap 1280 0 R0
WINDOW 123 24 36 Left 2
SYMATTR InstName CL
SYMATTR Value 500
SYMBOL res 1152 -640 R0
SYMATTR InstName ROT
SYMATTR Value 1.4K
SYMBOL res 1152 -528 R0
SYMATTR InstName ROB
SYMATTR Value 10K
SYMBOL sw 1408 -304 M0
SYMATTR InstName S1
SYMATTR Value SSHORT
SYMBOL voltage 1488 -224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 1.2 0 +10n 0 +20m 0 +10n 0)
SYMBOL cap -272 -768 R0
SYMATTR InstName CVCC
SYMATTR Value 1
SYMBOL cap -80 -816 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName CIN
SYMATTR Value .1
SYMBOL LTC4283 224 -448 R0
SYMATTR InstName U1
SYMATTR SpiceLine D7=0 D6=0 D5=0 D4=1 D3=1 D2=1 D1=0 D0=0
SYMATTR Value2 A6=0 A5=0 A4=1 A3=1 A2=0 B7=0 B6=0 B5=0 B4=0 B3=0 B2=0 B1=1 B0=1
SYMBOL res 224 -208 R0
SYMATTR InstName RG2
SYMATTR Value 470
SYMBOL cap 224 -96 R0
SYMATTR InstName CG2
SYMATTR Value 100n
SYMBOL res -1024 -416 R0
SYMATTR InstName RUV2
SYMATTR Value 10K
SYMBOL res -544 -432 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 18.2K
SYMBOL cap -704 -336 R0
SYMATTR InstName CTMR1
SYMATTR Value 68n
SYMBOL res -848 -400 R0
SYMATTR InstName R2
SYMATTR Value 1.13Meg
SYMBOL res 384 -176 R0
SYMATTR InstName RG1
SYMATTR Value 10
SYMBOL bi 1536 0 R0
SYMATTR InstName B1
SYMATTR Value I=if(V(PGIO1,VEE)<.5 & time > .1,MIN(Power/MAX(V(0,OUT),12),Imax),0)
TEXT 1808 152 Left 2 !.tran 1.6
TEXT 1600 -272 Left 2 !.model SSHORT SW(Ron=10m Roff=1k vt=.5 vh=-200m)
TEXT -696 -704 Left 2 ;UV ON = -38.6V\nUV OFF = -71.9V\nOV OFF = 70.7V
TEXT -1088 144 Left 3 ;Non Default Bits:\n(set as params on symbol)\nDVDT = 0                (A6)\nVILIM = 0001         (D7,D6,D5,D4) \nFB = 11b                 (D3,D2)\nFTBD_DL = 00b     (E5,4)
TEXT -1192 456 Left 2 ;Note: All bits must be set to 0 or 1\nUndefined behaivor for other values\n \nSee datasheet for further description.\n \nBit  Name   Default\n      Description\n \nCONTROL_1 (0x0A)\n                                                     \nA6   DVDT 0\n                                                  1->Enable DVDT startup\nA5   THERM_TMR 0\n                                                  1->Turns off 2 uA TMR pulldown\nA4   FET_BAD_TURN_OFF 1\n                                                  1-> Turn MOSFET Off after FET_BAD\nA3   PWRG_RESET_CNTRL 1\n                                                  1-> Vout Low resets Power Good\n                                                  0-> MOSFET Off resets Power Good\nA2   PGIO2_ACLB  0\n                                                  1-> PGIO2 configured as inverted ACL\n                                                  0-> PGIO2 configured as inverted second Power Good\n \nCONTROL_2 (0x0B)\n \nB7   EXT_FAULT_RETRY 0\n                                                  1->Enables Auto Retry after EXT_FAULT\nB6   PGI_RETRY 0\n                                                  1->Enables Auto Retry after PGI_FAULT\nB5-4 FET_BAD_RETRY 00  \n                                                        Configures FET_BAD Retry\n     B5,B4  Number of Retries\n     00     0 (Latch-Off)\n     01     1\n     10     7\n     11     infinite\n \nB3-2 OC_RETRY 00\n                                                       Configures OC (Over Current) Retry\n     B3,B2  Number of Retries\n     00     0 (Latch-Off)\n     01     1\n     10     7\n     11     infinite\n \nB1   UV_RETRY 1\n                                                  1-> Enables Auto Retry after UV_FAULT\nB0   OV_RETRY 1\n                                                  1-> Enables Auto Retry after OV_FAULT
TEXT -184 496 Left 2 ;CONFIG_1 (0x0D) \n \nD7-4 ILIM 0000\n                            Configures Current Limit Voltage (VILIM)\n                         (VILIM(FAST) = 2*VILIM)\n     D7,D6,D5,D4 VILIM\n     0000    15m      1000    23m\n     0001    16m      1001    24m\n     0010    17m      1010    25m\n     0011    18m      1011    26m\n     0100    19m      1100    27m\n     0101    20m      1101    28m\n     0110    21m      1110    29m\n     0111    22m      1111    30m\n \nD3-2 FB  00\n                            Configures Current Limit Foldback\n    D3,D2  Foldback Factor\n    00     100% (no foldback)\n    01     50%\n    10     20%\n    11     10%\n \nD1   FB_DIS 0\n                          1->Foldback after Startup Disabled\nD0   LPFB  0\n                          1->Load Power Foldback after Startup Enabled
TEXT 656 488 Left 2 ;CONFIG_2 (0x0E) \n \nE7-6 VDTH 11\n                              Configures Drain Voltage threshold\n                              for starting FET bad timer\n \n    E7,E6  VD,FET(TH)\n     00     72  mV\n     01     102 mV\n     10     143 mV\n     11     203 mV\n \nE5-4 FTBD_DL 00\n                            Configures FET_BAD filtering timer delay\n \n    E5,E4  TDL(FETBAD)\n     00     0.256 sec\n     01     0.512 sec\n     10     1.02 sec\n     11     2.05 sec\n \nE3-1 COOLING_DL   000\n                            Configures Cooling delay before retry\n                             for OC_FAULT, FET_BAD_FAULT or EXT_FAULT\n \n    E3,E2,E1 TDL(RTRY)\n     000    0.512 sec      100    8.19 sec\n     001    1.02 sec      101    16.4 sec\n     010    2.05 sec      110    32.8 sec\n     011    4.1  sec      111    65.5 sec\n \nCONFIG_3 (0x0F) \n \nF7  EXTFLT_TURN_OFF  0\n                           1->Turn MOSFET off after External Fault
TEXT -136 376 Left 5 ;LTC4283 Programing Parameters
TEXT 1608 -192 Left 2 ;Use PWL(0 0 1.2 0 +10n 1 +20m 1 +10n 0) to short the output at 1.2sec
TEXT 360 112 Left 2 ;M=2 Indicates 2\nparallel devices
TEXT -792 88 Left 2 ;Increase CTMR1 to prevent timeout
TEXT 1616 -56 Left 2 !.param Power=600\n.param Imax=120
TEXT 1608 24 Left 4 ;600W Constant Power Switched Load