Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7105.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7105.asy)
Rload OUT 0 11
R3 OUT N001 100k
C2 N002 0 2.7n
V1 IN 0 4.3
R1 OUT N003 17.4k
R2 N003 0 10K
XU1 IN N003 IN N002 OUT 0 N001 ADP7105 Vref=1.22 ;pnba Vin)ADJ)EN)SS)Vout)GND)PG
C1 OUT 0 2.2 Rser=3m
.tran 6m startup
.lib ADP7105.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 400 32 352 32
WIRE 528 32 480 32
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE 400 128 352 128
WIRE 528 128 528 32
WIRE 528 128 400 128
WIRE 608 128 528 128
WIRE 624 128 608 128
WIRE -32 144 -32 128
WIRE 528 144 528 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 400 224 400 208
WIRE 400 224 352 224
WIRE 528 224 528 208
WIRE 624 224 624 208
WIRE 400 240 400 224
WIRE 224 304 224 288
WIRE 400 336 400 320
SYMBOL res 384 224 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.3
SYMBOL res 608 112 R0
SYMATTR InstName Rload
SYMATTR Value 11
SYMBOL res 384 112 R0
SYMATTR InstName R1
SYMATTR Value 17.4k
SYMBOL cap 512 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=3m
SYMBOL ADP7105 224 128 R0
SYMATTR InstName U1
SYMBOL res 496 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 2.7n
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG -32 32 IN
FLAG 624 224 0
FLAG 528 224 0
FLAG 608 128 OUT
FLAG 400 336 0
TEXT 512 304 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0a6645ea7a5a_1843.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1843.asy)
V2 N002 0 PULSE(0 3.3 0 .5m .5m 0 1m)
XU1 N004 0 N002 N002 N006 N005 N001 N003 LTC1843 ;pnba OUTA)GND)INA+)INB-)Hyst)Ref)Vcc)OUTB
R2 N001 N004 10K
R1 N001 N003 10K
V1 N001 0 5
.tran 3m
.lib LTC1843.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1264 800
WIRE 928 64 736 64
WIRE 1040 64 928 64
WIRE 1136 64 1040 64
WIRE 736 80 736 64
WIRE 1040 80 1040 64
WIRE 1136 80 1136 64
WIRE 928 112 928 64
WIRE 848 160 816 160
WIRE 736 176 736 160
WIRE 1040 176 1040 160
WIRE 1040 176 1008 176
WIRE 560 240 528 240
WIRE 816 240 816 160
WIRE 816 240 640 240
WIRE 848 240 816 240
WIRE 1136 256 1136 160
WIRE 1136 256 1008 256
WIRE 848 304 832 304
WIRE 976 400 976 384
WIRE 880 416 880 384
SYMBOL Comparators\\LTC1843 928 240 R0
SYMATTR InstName U1
SYMBOL voltage 736 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 1024 64 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 656 240 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0 .5m .5m 0 1m)
SYMATTR InstName V2
SYMBOL res 1120 64 R0
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 736 176 0
FLAG 528 240 0
FLAG 880 416 0
TEXT 1120 344 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\2690cb28dedc_voltage_divider.asc
* Generated by LTspice 26.0.1 for Windows.
* SIMPLE VOLTAGE DIVIDER
V1 vin 0 10
R1 vout vin 1
R2 0 vout 1
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 112 32 112
WIRE 256 112 256 96
WIRE 256 112 240 112
WIRE 320 112 256 112
WIRE 432 112 400 112
WIRE 32 160 32 112
WIRE 32 288 32 240
WIRE 432 288 432 112
WIRE 432 288 32 288
IOPIN 32 112 In
IOPIN 256 96 Out
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL voltage 32 144 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 416 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
FLAG 32 288 0
FLAG 32 112 vin
FLAG 256 96 vout
TEXT 64 -8 Left 2 ;SIMPLE VOLTAGE DIVIDER
TEXT -128 24 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\2109573082ff_AD4022.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\AD4022.asy)
C1 0 N005 10p
V1 N003 0 PWL(0 0 100u 5)
V4 N008 0 PULSE(0 1.8 227n 0.1n 0.1n 40n 1u)
XU1 N001 N002 N004 MP_01 0 N006 N005 N008 AD4022 EN_Hi_Z=1 ;pnba REF)Vdd)IN+))GND)IN-)Vout)CNV
V6 N002 0 1.8
R2 N006 N007 10
V2 N007 0 PWL(0 5 100u 0)
R1 N004 N003 10
V3 N001 0 5
.tran 110u
.lib AD4022.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1252
WIRE 704 224 368 224
WIRE 832 224 784 224
WIRE 368 288 368 224
WIRE 704 336 496 336
WIRE 832 336 784 336
WIRE -208 368 -240 368
WIRE -80 368 -128 368
WIRE 80 368 0 368
WIRE 80 416 80 368
WIRE 144 416 80 416
WIRE 560 432 496 432
WIRE 688 432 624 432
WIRE 144 448 80 448
WIRE -208 496 -240 496
WIRE -80 496 -128 496
WIRE 80 496 80 448
WIRE 80 496 0 496
WIRE 704 528 496 528
WIRE 832 528 784 528
WIRE 368 608 368 576
SYMBOL AD4022 400 432 R0
SYMATTR InstName U1
SYMBOL voltage 688 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 16 480 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL res 16 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage -112 496 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 5 100u 0)
SYMBOL voltage 688 336 M90
WINDOW 0 47 41 VRight 2
WINDOW 3 -44 39 VRight 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V6
SYMATTR Value 1.8
SYMBOL voltage 688 528 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 1.8 227n 0.1n 0.1n 40n 1u)
SYMBOL voltage -112 368 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 100u 5)
SYMBOL cap 624 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
FLAG 368 608 0
FLAG 832 336 0
FLAG -240 368 0
FLAG 688 432 0
FLAG 832 528 0
FLAG 832 224 0
FLAG -240 496 0
TEXT 208 616 Left 2 !.tran 110u
* Z:\home\khalils\Downloads\files\data\raw_asc\09a8508ef238_Fig23_5.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot VREF
M6B VREF VREF 0 0 N_1u l=2u w=10u
VDD VDD 0 5
R1 VDD VREF 10k TC1=0.002
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib cmosedu_models.txt
.DC VDD 4 6 1m
.step temp 0 100 25
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1784 680
WIRE 1088 -48 1088 -80
WIRE 1088 -32 1088 -48
WIRE 1312 112 1312 16
WIRE 1328 112 1312 112
WIRE 1376 -96 1376 -160
WIRE 1376 0 1376 -16
WIRE 1376 16 1312 16
WIRE 1376 16 1376 0
WIRE 1376 32 1376 16
WIRE 1376 160 1376 128
WIRE 1488 0 1376 0
SYMBOL nmos4 1328 32 R0
WINDOW 123 56 100 Left 0
WINDOW 0 69 31 Left 0
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M6B
SYMATTR Value N_1u
SYMBOL res 1360 -112 R0
SYMATTR InstName R1
SYMATTR Value 10k TC1=0.002
SYMBOL voltage 1088 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 5
FLAG 1088 48 0
FLAG 1088 -48 VDD
FLAG 1376 80 0
FLAG 1376 160 0
FLAG 1376 -160 VDD
FLAG 1488 0 VREF
TEXT 1040 144 Left 0 !.lib cmosedu_models.txt
TEXT 1136 -176 Left 0 ;Plot VREF
TEXT 1040 96 Left 0 !.DC VDD 4 6 1m
TEXT 1040 120 Left 0 !.step temp 0 100 25
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1763-1.25.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1763-1.25.asy)
C2 N003 0 10n
R2 N001 IN 50K
C1 N004 0 1
C3 N002 0 1
C4 OUT 0 10
R1 OUT 0 .6
V1 IN 0 1.6
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1763 Radj=8333.33 m=1.5 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
.tran 1m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL ADP1763-1.25 224 176 R0
SYMATTR InstName U1
SYMATTR Value2 ADP1763 Radj=8333.33 m=1.5
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value .6
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -128 -32 R0
SYMATTR InstName V1
SYMATTR Value 1.6
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2285bf0a8119_2055.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC2055.asy)
XU1 N003 N001 N002 +V -V LTC2054 ;pnba IN+)IN-)OUT)VCC)VEE
R1 N002 N001 10K
V2 -V 0 -2.5
R2 N001 0 10K
V3 N003 0 SINE(0 1 1K)
V1 +V 0 2.5
.tran 3m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -48 -16 -64 -16
WIRE 48 -16 32 -16
WIRE 112 -16 48 -16
WIRE 208 -16 192 -16
WIRE 112 64 112 48
WIRE 48 80 48 -16
WIRE 80 80 48 80
WIRE 208 96 208 -16
WIRE 208 96 144 96
WIRE -400 112 -400 80
WIRE -272 112 -272 80
WIRE 80 112 -16 112
WIRE -16 144 -16 112
WIRE 112 144 112 128
WIRE -400 240 -400 192
WIRE -272 240 -272 192
WIRE -16 256 -16 224
SYMBOL voltage -400 96 R0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL voltage -16 128 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 208 -32 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL opamps\\LTC2055 112 96 R0
SYMATTR InstName U1
SYMBOL res 48 -32 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage -272 96 R0
SYMATTR InstName V1
SYMATTR Value 2.5
FLAG -272 240 0
FLAG 112 48 +V
FLAG -272 80 +V
FLAG 112 144 -V
FLAG -400 240 0
FLAG -400 80 -V
FLAG -16 256 0
FLAG -64 -16 0
TEXT -192 296 Left 0 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\6370e4974929_FDP2532_Cxss.asc
* Generated by LTspice 26.0.1 for Windows.
* MOSFET Capacitances Versus Drain-Source Voltage
+CGDMIN=50p CJO=2648p Vj=0.75 M=0.4812 CGS=5735p N=1 IS=1.00E-14 RB=0.0099 TT=151n)
V1 d1 0 { VDS} AC 1
V2 N001 0 0 AC 0
H3 Ciss 0 V4 -1e-3
V4 N002 0 0 AC 1
M2 d2 N002 0 0 FDP2532
H2 Crss 0 V2 -1e-3
H1 Coss 0 V1 -1e-3
M1 d1 N001 0 0 FDP2532
V3 d2 0 { VDS} AC 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.MODEL FDP2532 VDMOS(KP=32.1269 RS=0.0001 RD=0.0094 RG=0.5 VTO=3.0 CGDMAX=1605p
.step param VDS 0.1 25 0.1
.ac list {1e3/2/pi} ; jw=1e3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1084 788
WIRE 512 96 480 96
WIRE 176 112 112 112
WIRE 256 112 176 112
WIRE 480 128 480 96
WIRE 112 144 112 112
WIRE 64 224 -16 224
WIRE 256 224 256 112
WIRE -16 240 -16 224
WIRE 480 240 480 208
WIRE 512 304 480 304
WIRE -16 336 -16 320
WIRE 112 336 112 240
WIRE 256 336 256 304
WIRE 480 336 480 304
WIRE 176 432 112 432
WIRE 256 432 176 432
WIRE 480 448 480 416
WIRE 112 464 112 432
WIRE 512 512 480 512
WIRE 64 544 -16 544
WIRE 256 544 256 432
WIRE 480 544 480 512
WIRE -16 560 -16 544
WIRE -16 656 -16 640
WIRE 112 656 112 560
WIRE 256 656 256 624
WIRE 480 656 480 624
SYMBOL h 480 528 R0
SYMATTR InstName H3
SYMATTR Value V4 -1e-3
SYMBOL voltage 256 528 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 0
SYMATTR InstName V3
SYMATTR Value { VDS}
SYMBOL NMOS 64 464 R0
SYMATTR InstName M2
SYMATTR Value FDP2532
SYMBOL h 480 320 R0
SYMATTR InstName H2
SYMATTR Value V2 -1e-3
SYMBOL h 480 112 R0
SYMATTR InstName H1
SYMATTR Value V1 -1e-3
SYMBOL NMOS 64 144 R0
SYMATTR InstName M1
SYMATTR Value FDP2532
SYMBOL voltage -16 224 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage 256 208 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value { VDS}
SYMBOL voltage -16 544 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V4
SYMATTR Value 0
FLAG 112 336 0
FLAG -16 336 0
FLAG 256 336 0
FLAG 176 112 d1
FLAG 112 656 0
FLAG -16 656 0
FLAG 256 656 0
FLAG 176 432 d2
FLAG 480 240 0
FLAG 480 448 0
FLAG 480 656 0
FLAG 512 96 Coss
FLAG 512 304 Crss
FLAG 512 512 Ciss
TEXT -376 -8 Left 0 !.MODEL FDP2532 VDMOS(KP=32.1269 RS=0.0001 RD=0.0094 RG=0.5 VTO=3.0 CGDMAX=1605p \n+CGDMIN=50p CJO=2648p Vj=0.75 M=0.4812 CGS=5735p N=1 IS=1.00E-14 RB=0.0099 TT=151n)
TEXT -376 96 Left 0 !.step param VDS 0.1 25 0.1
TEXT -376 120 Left 0 !.ac list {1e3/2/pi} ; jw=1e3
TEXT -368 -80 Left 0 ;MOSFET Capacitances Versus Drain-Source Voltage
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3002.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 24
C1 N004 0 1
L1 IN N002 9 Rser=36m
L2 0 N001 1 Rser=7m
D1 N001 OUT B520C
C2 OUT 0 220
C3 IN N002 470p Rser=39
R1 N002 N003 154K
R2 N005 0 10K
R3 N005 N006 115K
Rload OUT 0 1.7
XU1 IN N004 IN 0 N002 N003 N005 N006 LT3002 ;pnba EN/UVLO)INTVcc)Vin)GND)SW)RFB)Rref)Tc
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
K1 L1 L2 1
.tran 7m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3002.asy)
.lib LT3002.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 996 680
WIRE 368 -64 -16 -64
WIRE 544 -64 368 -64
WIRE 656 -64 592 -64
WIRE 784 -64 720 -64
WIRE 896 -64 784 -64
WIRE 368 -48 368 -64
WIRE 544 -48 544 -64
WIRE 592 -48 592 -64
WIRE 784 -48 784 -64
WIRE 896 -48 896 -64
WIRE -16 48 -16 -64
WIRE 64 48 -16 48
WIRE 80 48 64 48
WIRE 368 48 368 16
WIRE 368 48 304 48
WIRE 544 48 544 32
WIRE 544 48 368 48
WIRE 592 48 592 32
WIRE 784 48 784 16
WIRE 784 48 592 48
WIRE 896 48 896 32
WIRE 896 48 784 48
WIRE -16 64 -16 48
WIRE 368 64 368 48
WIRE 896 64 896 48
WIRE 64 144 64 48
WIRE 80 144 64 144
WIRE 368 144 304 144
WIRE -16 160 -16 144
WIRE 0 240 -16 240
WIRE 80 240 64 240
WIRE 352 240 304 240
WIRE 416 240 352 240
WIRE 512 240 496 240
WIRE 80 336 64 336
WIRE 352 336 352 320
WIRE 352 336 304 336
FLAG 64 336 0
FLAG -16 160 0
FLAG -16 240 0
FLAG 512 240 0
FLAG 896 64 0
FLAG -16 -64 IN
FLAG 896 -64 OUT
SYMBOL voltage -16 48 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 64 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ind2 528 -64 R0
WINDOW 0 1 27 Right 2
WINDOW 3 1 80 Right 2
SYMATTR InstName L1
SYMATTR Value 9
SYMATTR Type ind
SYMATTR SpiceLine Rser=36m
SYMBOL ind2 608 48 R180
WINDOW 0 1 84 Right 2
WINDOW 3 4 34 Right 2
SYMATTR InstName L2
SYMATTR Value 1
SYMATTR Type ind
SYMATTR SpiceLine Rser=7m
SYMBOL schottky 656 -48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value B520C
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 768 -48 R0
SYMATTR InstName C2
SYMATTR Value 220
SYMBOL cap 352 -48 R0
WINDOW 39 23 64 Left 2
WINDOW 3 41 35 Left 2
SYMATTR SpiceLine Rser=39
SYMATTR Value 470p
SYMATTR InstName C3
SYMBOL res 352 48 R0
SYMATTR InstName R1
SYMATTR Value 154K
SYMBOL res 400 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 336 224 R0
SYMATTR InstName R3
SYMATTR Value 115K
SYMBOL res 880 -64 R0
SYMATTR InstName Rload
SYMATTR Value 1.7
SYMBOL LT3002 192 192 R0
SYMATTR InstName U1
TEXT 504 -88 Left 2 !K1 L1 L2 1
TEXT 640 304 Left 2 !.tran 7m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADR5045.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR5045.asy)
Vin IN 0 5.5
Rload OUT 0 10k
Rbias IN OUT 768
XU1 OUT 0 ADR5045 ;pnba 1)2
.dc TEMP -40 125 .1
.lib ADR5045.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 960
WIRE 32 64 -80 64
WIRE 208 64 112 64
WIRE 464 64 208 64
WIRE -80 112 -80 64
WIRE 208 112 208 64
WIRE 464 112 464 64
WIRE -80 224 -80 192
WIRE 208 224 208 176
WIRE 208 224 -80 224
WIRE 464 224 464 192
WIRE 464 224 208 224
WIRE -80 256 -80 224
SYMBOL voltage -80 96 R0
WINDOW 3 36 62 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 30 32 Left 2
SYMATTR Value 5.5
SYMATTR InstName Vin
SYMBOL res 16 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rbias
SYMATTR Value 768
SYMBOL res 448 96 R0
SYMATTR InstName Rload
SYMATTR Value 10k
SYMBOL ADR5045 208 144 R0
SYMATTR InstName U1
FLAG -80 64 IN
FLAG -80 256 0
FLAG 464 64 OUT
TEXT -88 -32 Left 2 !.dc TEMP -40 125 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1515-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1515-3.3.asy)
XU1 IN N001 0 0 N003 N002 IN OUT LTC1515-3.3 ;pnba _SHDN)POR)5/3.3)GND)C1-)C1+)Vin)Vout
C1 N002 N003 1
Rload OUT 0 100
R1 IN N001 5K
C2 OUT 0 10
V1 IN 0 3
.tran 2.5m startup
.lib LTC1515-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3112 2708
WIRE 2016 2176 1920 2176
WIRE 2096 2176 2016 2176
WIRE 2448 2176 2096 2176
WIRE 1920 2192 1920 2176
WIRE 2016 2208 2016 2176
WIRE 2096 2256 2096 2176
WIRE 2128 2256 2096 2256
WIRE 2528 2256 2416 2256
WIRE 2624 2256 2528 2256
WIRE 2624 2272 2624 2256
WIRE 1920 2288 1920 2272
WIRE 2528 2288 2528 2256
WIRE 2016 2320 2016 2288
WIRE 2128 2320 2016 2320
WIRE 2448 2320 2448 2176
WIRE 2448 2320 2416 2320
WIRE 2528 2368 2528 2352
WIRE 2624 2368 2624 2352
WIRE 2128 2384 2096 2384
WIRE 2448 2384 2416 2384
WIRE 2128 2448 2096 2448
WIRE 2448 2448 2416 2448
SYMBOL PowerProducts\\LTC1515-3.3 2272 2352 R0
SYMATTR InstName U1
SYMBOL cap 2512 2288 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL VOLTAGE 1920 2176 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res 2608 2256 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL RES 2000 2192 R0
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL cap 2432 2384 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 2528 2368 0
FLAG 2096 2448 0
FLAG 1920 2288 0
FLAG 2624 2368 0
FLAG 2624 2256 OUT
FLAG 2096 2384 0
FLAG 1920 2176 IN
TEXT 2440 2504 Left 2 !.tran 2.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7118-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N001 0 4.7n
V1 IN 0 3.5
Rload OUT 0 20
C1 OUT 0 2.2 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=2.5 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 6m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7118-2.5.asy)
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.5
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADP7118-2.5 224 128 R0
SYMATTR InstName U1
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADR5045.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR5045.asy)
Rload OUT 0 10k
XU1 OUT 0 ADR5045 ;pnba 1)2
Vin IN 0 5.5
Rbias IN OUT 768
.dc TEMP -40 125 .1
.lib ADR5045.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 960
WIRE 32 64 -80 64
WIRE 208 64 112 64
WIRE 464 64 208 64
WIRE -80 112 -80 64
WIRE 208 112 208 64
WIRE 464 112 464 64
WIRE -80 224 -80 192
WIRE 208 224 208 176
WIRE 208 224 -80 224
WIRE 464 224 464 192
WIRE 464 224 208 224
WIRE -80 256 -80 224
SYMBOL voltage -80 96 R0
WINDOW 3 36 62 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 30 32 Left 2
SYMATTR Value 5.5
SYMATTR InstName Vin
SYMBOL res 448 96 R0
SYMATTR InstName Rload
SYMATTR Value 10k
SYMBOL ADR5045 208 144 R0
SYMATTR InstName U1
SYMBOL res 16 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rbias
SYMATTR Value 768
FLAG -80 64 IN
FLAG -80 256 0
FLAG 464 64 OUT
TEXT -88 -32 Left 2 !.dc TEMP -40 125 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1086H.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1086H.asy)
V1 IN 0 PWL(0 0 1 10) Rser=0.1
R1 OUT N001 121
XU1 IN N001 OUT LT1086H ;pnba IN)ADJ)OUT
C1 OUT 0 10
R3 OUT 0 10
R2 N001 0 365
.tran 1
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1328 896
WIRE 1856 896 1808 896
WIRE 1952 896 1856 896
WIRE 2064 896 1952 896
WIRE 1328 912 1328 896
WIRE 1856 912 1856 896
WIRE 1952 912 1952 896
WIRE 2064 912 2064 896
WIRE 1328 1008 1328 992
WIRE 1952 1008 1952 976
WIRE 2064 1008 2064 992
WIRE 1680 1024 1680 992
WIRE 1856 1024 1856 992
WIRE 1856 1024 1680 1024
WIRE 1856 1040 1856 1024
WIRE 1856 1136 1856 1120
SYMBOL cap 1936 912 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL VOLTAGE 1328 896 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMATTR SpiceLine Rser=0.1
SYMBOL RES 1840 896 R0
SYMATTR InstName R1
SYMATTR Value 121
SYMBOL RES 2048 896 R0
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL RES 1840 1024 R0
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL PowerProducts\\LT1086H 1680 896 R0
SYMATTR InstName U1
FLAG 2064 896 OUT
FLAG 1856 1136 0
FLAG 2064 1008 0
FLAG 1328 1008 0
FLAG 1952 1008 0
FLAG 1328 896 IN
TEXT 1968 1080 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\AD590.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 0
XU1 IN 0 AD590 ;pnba V+)V-
.dc V1 0 10 1m
.temp -55 25 150
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\AD590.asy)
.lib ADR.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE 832 -96 528 -96
WIRE 528 -80 528 -96
WIRE 832 -80 832 -96
WIRE 528 16 528 0
WIRE 832 80 832 48
FLAG 528 16 0
FLAG 528 -96 IN
FLAG 832 80 0
SYMBOL voltage 528 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL References\\AD590 832 -16 R0
SYMATTR InstName U1
TEXT 584 80 Left 2 !.dc V1 0 10 1m\n.temp -55 25 150