Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\28b476733013_Montagem_Id_Vs_.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Id 0 1.2
VS Is 0 0
M1 Id Id Is Is NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc "/Users/sofia/Documents/Uni/EDAn/Labs/modelos/modelo_130n_L120.txt"
.dc VS 0.0 0.9 1e-3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1012 704
WIRE 384 432 384 384
WIRE 384 448 384 432
WIRE 336 528 288 528
WIRE 384 576 384 544
WIRE 384 608 384 576
SYMBOL nmos 336 448 R0
SYMATTR InstName M1
SYMBOL voltage 384 592 R0
SYMATTR InstName VS
SYMATTR Value 0
SYMBOL voltage 112 464 R0
SYMATTR InstName V1
SYMATTR Value 1.2
FLAG 112 560 0
FLAG 112 480 VDD
FLAG 384 384 VDD
FLAG 288 528 VDD
FLAG 384 688 0
FLAG 384 432 Id
FLAG 384 576 Is
TEXT 112 256 Left 2 !.inc "/Users/sofia/Documents/Uni/EDAn/Labs/modelos/modelo_130n_L120.txt"
TEXT 112 304 Left 2 !.dc VS 0.0 0.9 1e-3
* Z:\tmp\asc_dec_bjh7r6w2\0c99d03324a8_Transmission_gate_vani_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
M3 clock_bar clock 0 N003 NMOS l=2u w=40u
M2 in clock N004 N005 NMOS
M4 N001 clock clock_bar N002 PMOS l=2u w=20u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1052 680
WIRE 768 -272 768 -320
WIRE 768 -224 768 -256
WIRE 720 -192 672 -192
WIRE 608 -144 528 -144
WIRE 672 -144 672 -192
WIRE 672 -144 608 -144
WIRE 768 -144 768 -176
WIRE 880 -144 768 -144
WIRE 528 -128 528 -144
WIRE 768 -96 768 -144
WIRE 672 -16 672 -144
WIRE 720 -16 672 -16
WIRE 768 -16 768 -48
WIRE 16 224 -96 224
WIRE 112 224 112 144
WIRE 112 224 16 224
WIRE 352 224 352 144
WIRE 448 224 352 224
WIRE 112 304 112 224
WIRE 176 304 112 304
WIRE 256 304 224 304
WIRE 352 304 352 224
WIRE 352 304 272 304
SYMBOL nmos4 720 -96 R0
SYMATTR InstName M3
SYMATTR Value2 l=2u w=40u
SYMBOL nmos4 176 352 R270
SYMATTR InstName M2
SYMBOL pmos4 720 -272 R0
SYMATTR InstName M4
SYMATTR Value2 l=2u w=20u
FLAG 768 0 0
FLAG 768 -400 0
FLAG 528 -48 0
FLAG 608 -144 clock
FLAG 256 352 clock
FLAG 880 -144 clock_bar
FLAG 16 224 in
* Z:\home\khalils\Downloads\files\data\raw_asc\3416b8fcd574_Aufgabe_1.2_NichtInvertierenderVerstaerker.asc
* Generated by LTspice 26.0.1 for Windows.
;tran 20m
R1 out N001 200e3
V1 V+ 0 5
V2 0 V- 5
XU1 in N001 V+ V- out LM324 ;pnba In+)In-)V+)V-)OUT
V4 in 0 AC 10m
R2 N001 0 10e3
.include LM324.txt
.ac oct 100 10 10MEG
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 -16 416 -32
WIRE -32 0 -64 0
WIRE 112 0 48 0
WIRE 160 0 112 0
WIRE 256 0 240 0
WIRE 416 0 416 -16
WIRE -224 16 -224 0
WIRE -64 32 -64 0
WIRE 416 96 416 80
WIRE 416 96 368 96
WIRE 192 112 192 96
WIRE 368 112 368 96
WIRE 112 128 112 0
WIRE 160 128 112 128
WIRE 416 128 416 96
WIRE -224 144 -224 96
WIRE 256 144 256 0
WIRE 256 144 224 144
WIRE 288 144 256 144
WIRE 304 144 288 144
WIRE 160 160 128 160
WIRE 192 208 192 176
WIRE 416 224 416 208
WIRE 416 240 416 224
SYMBOL res 64 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10e3
SYMBOL voltage -224 0 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 24 160 Left 2
SYMATTR Value2 AC 10m
SYMATTR Value ""
SYMATTR InstName V4
SYMBOL voltage 416 -16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL Opamps\\opamp2 192 80 R0
SYMATTR InstName U1
SYMATTR Value LM324
SYMBOL voltage 416 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 256 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200e3
FLAG 368 112 0
FLAG 416 -16 V+
FLAG 416 224 V-
FLAG 192 96 V+
FLAG 192 208 V-
FLAG 288 144 out
FLAG -224 144 0
FLAG -64 32 0
FLAG -224 0 in
FLAG 128 160 in
TEXT -248 280 Left 2 !.include LM324.txt
TEXT -256 240 Left 2 !;tran 20m
TEXT -248 224 Left 0 !.ac oct 100 10 10MEG
* Z:\home\khalils\Downloads\files\data\raw_asc\012a72a3660d_ADG1209.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1209.asy)
V2 -V 0 -15
V1 +V 0 15
V5 N002 0 SINE(0 5 2K)
V6 N005 0 SINE(0 5 4K)
V4 N007 0 PULSE(3.3 0 0 1u 1u 10m 20m)
V3 N006 0 PULSE(3.3 0 0 1u 1u 5m 10m)
R1 N003 0 10K
XU1 +V NC_01 NC_02 NC_03 NC_04 NC_05 N001 N002 N004 N005 N003 N006 N007 NC_06 NC_07 NC_08 ADG1209 ;pnba VDD)A0)A1)EN)VSS)GND)S1A)S2A)S3A)S4A)DA)S1B)S2B)S3B)S4B)DB
V7 N001 0 SINE(0 5 1K)
V8 N004 0 SINE(0 5 3K)
.tran 20m
.lib ADG1209.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE 784 -400 784 -416
WIRE 352 -336 320 -336
WIRE 656 -336 432 -336
WIRE 528 -272 496 -272
WIRE 656 -272 608 -272
WIRE 32 -256 32 -272
WIRE 144 -256 144 -272
WIRE 960 -240 912 -240
WIRE 1056 -240 1040 -240
WIRE 352 -208 320 -208
WIRE 656 -208 432 -208
WIRE 32 -160 32 -176
WIRE 144 -160 144 -176
WIRE 528 -144 496 -144
WIRE 656 -144 608 -144
WIRE 416 -80 368 -80
WIRE 656 -80 496 -80
WIRE 928 -80 912 -80
WIRE 128 -16 80 -16
WIRE 656 -16 208 -16
WIRE 720 48 720 32
WIRE 848 48 848 32
SYMBOL voltage 144 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 224 -16 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(3.3 0 0 1u 1u 10m 20m)
SYMBOL voltage 448 -336 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V7
SYMATTR Value SINE(0 5 1K)
SYMBOL res 944 -224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 624 -272 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value SINE(0 5 2K)
SYMBOL ADG1209 784 -80 R0
SYMATTR InstName U1
SYMBOL voltage 624 -144 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value SINE(0 5 4K)
SYMBOL voltage 448 -208 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V8
SYMATTR Value SINE(0 5 3K)
SYMBOL voltage 512 -80 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(3.3 0 0 1u 1u 5m 10m)
SYMBOL voltage 32 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
FLAG 32 -160 0
FLAG 144 -160 0
FLAG 144 -272 +V
FLAG 32 -272 -V
FLAG 720 48 -V
FLAG 784 -416 +V
FLAG 848 48 0
FLAG 368 -80 0
FLAG 1056 -240 0
FLAG 80 -16 0
FLAG 496 -272 0
FLAG 496 -144 0
FLAG 320 -336 0
FLAG 320 -208 0
FLAG 928 -80 +V
TEXT 976 112 Left 2 !.tran 20m
* Z:\home\khalils\Downloads\files\data\raw_asc\211488120338_primeiraOrdem.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N003 0 C
R1 N003 N002 R
XU1 N003 N001 NC_01 NC_02 N001 opamp2 ;pnba In+)In-)V+)V-)OUT
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 96 0 96
WIRE 0 160 0 96
WIRE 32 160 0 160
WIRE 128 176 128 96
WIRE 128 176 96 176
WIRE 176 176 128 176
WIRE -112 192 -144 192
WIRE 0 192 -32 192
WIRE 32 192 0 192
WIRE 0 224 0 192
SYMBOL res -16 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMBOL OpAmps\\opamp2 64 112 R0
SYMATTR InstName U1
SYMBOL cap -16 224 R0
SYMATTR InstName C1
FLAG 0 288 0
* Z:\home\khalils\Downloads\files\data\raw_asc\7243b60f84e3_Fig11_4_short.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Vout and Id(M1)
* 10/1
* 10/1
Vin Vin 0 0
M1 Vout Vin 0 0 N_50n l=50n w=500n
VDD VDD 0 1
M2 Vout Vin VDD VDD P_50n l=50n w=500n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vin 0 1
.include cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 680
WIRE 192 -368 192 -384
WIRE 192 -352 192 -368
WIRE 448 -304 448 -352
WIRE 400 -288 368 -288
WIRE 192 -240 192 -272
WIRE 320 -176 304 -176
WIRE 368 -176 368 -288
WIRE 368 -176 320 -176
WIRE 448 -176 448 -208
WIRE 624 -176 448 -176
WIRE 656 -176 624 -176
WIRE 208 -96 208 -112
WIRE 368 -96 368 -176
WIRE 400 -96 368 -96
WIRE 448 -32 448 -80
WIRE 208 0 208 -16
SYMBOL pmos4 400 -208 M180
WINDOW 0 88 9 Right 2
WINDOW 3 168 20 Right 2
WINDOW 123 206 76 Right 2
SYMATTR InstName M2
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 400 -176 R0
WINDOW 0 104 24 Right 2
WINDOW 3 179 41 Right 2
WINDOW 123 213 74 Right 2
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 208 -112 R0
WINDOW 0 -72 21 Left 2
WINDOW 3 -60 74 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vin
SYMATTR Value 0
SYMBOL voltage 192 -368 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VDD
SYMATTR Value 1
FLAG 208 0 0
FLAG 624 -176 Vout
FLAG 208 -112 Vin
FLAG 448 -128 0
FLAG 192 -240 0
FLAG 192 -368 VDD
FLAG 448 -256 VDD
FLAG 448 -32 0
FLAG 448 -352 VDD
FLAG 320 -176 Vin
TEXT 264 8 Left 2 !.dc Vin 0 1
TEXT 264 32 Left 2 !.include cmosedu_models.txt
TEXT 496 -360 Left 2 ;Plot Vout and Id(M1)
TEXT 344 -312 Left 2 ;10/1
TEXT 344 -64 Left 2 ;10/1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1551LCS8-4.1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1551LCS8-4.1.asy)
V1 IN 0 5
XU1 0 IN N002 OUT N003 0 N001 OUT LTC1551LCS8-4.1 ;pnba SHDN)Vin)C+)Vout)C-)GND)CPout)REG
C1 N003 N002 .1
Rload OUT 0 1K
C3 OUT 0 10
C2 N001 0 .1
.tran 1m
.lib LTC1551LCS8-4.1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1600 908
WIRE 544 32 144 32
WIRE 240 112 224 112
WIRE 544 112 544 32
WIRE 544 112 528 112
WIRE 240 176 -80 176
WIRE 560 176 528 176
WIRE 656 176 624 176
WIRE -80 192 -80 176
WIRE 240 240 224 240
WIRE 544 240 528 240
WIRE -80 288 -80 272
WIRE 144 304 144 32
WIRE 144 304 16 304
WIRE 240 304 144 304
WIRE 544 304 528 304
WIRE 16 320 16 304
WIRE 144 336 144 304
WIRE 16 416 16 400
WIRE 144 416 144 400
WIRE 224 416 224 240
WIRE 368 416 224 416
WIRE 544 416 544 304
WIRE 544 416 432 416
SYMBOL voltage -80 176 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 0 304 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL PowerProducts\\LTC1551LCS8-4.1 384 208 R0
SYMATTR InstName U1
SYMBOL cap 432 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL cap 128 336 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL cap 560 192 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value .1
FLAG 656 176 0
FLAG 544 240 0
FLAG 16 416 0
FLAG 144 416 0
FLAG -80 288 0
FLAG 224 112 0
FLAG 16 304 OUT
FLAG -80 176 IN
TEXT 544 488 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX4730.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:\nSwitch shown for a logic 0 input\nOn resistance performance at 5V supply\nCharge injection is not included\nBandwidth is 266 MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\MAX4730.asy)
XU1 vIN vNO vCOM 0 +V 0 MAX4730 ;pnba IN)SA)D)SB)V+)GND
R1 vCOM 0 301
V1 vNO 0 3
C1 vCOM 0 36p
V3 vIN 0 PULSE(0 3.3 0 20n 20n 10u 20u)
V4 +V 0 3.3
.tran 100u
.lib MAX4730.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1728 -272 -1904 -272
WIRE -1696 -272 -1728 -272
WIRE -1904 -256 -1904 -272
WIRE -1456 -240 -1504 -240
WIRE -1408 -240 -1456 -240
WIRE -1312 -240 -1408 -240
WIRE -1408 -224 -1408 -240
WIRE -1312 -224 -1312 -240
WIRE -1696 -208 -1776 -208
WIRE -1776 -192 -1776 -208
WIRE -1904 -160 -1904 -176
WIRE -1728 -144 -1776 -144
WIRE -1696 -144 -1728 -144
WIRE -1408 -128 -1408 -144
WIRE -1312 -128 -1312 -160
WIRE -1776 -48 -1776 -144
WIRE -1600 -16 -1600 -32
WIRE -1776 48 -1776 32
SYMBOL res -1424 -240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage -1904 -272 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL cap -1328 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL MAX4730 -1600 -192 R0
SYMATTR InstName U1
SYMBOL voltage -2064 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 3.3
SYMBOL voltage -1776 -64 R0
WINDOW 3 34 96 Left 2
SYMATTR Value PULSE(0 3.3 0 20n 20n 10u 20u)
SYMATTR InstName V3
FLAG -1904 -160 0
FLAG -1776 -192 0
FLAG -1776 48 0
FLAG -1600 -368 +V
FLAG -1408 -128 0
FLAG -1600 -16 0
FLAG -1312 -128 0
FLAG -2064 -176 0
FLAG -2064 -256 +V
FLAG -1728 -272 vNO
FLAG -1728 -144 vIN
FLAG -1456 -240 vCOM
TEXT -1488 -16 Left 2 !.tran 100u
TEXT -2008 -560 Left 2 ;Notes:\nSwitch shown for a logic 0 input\nOn resistance performance at 5V supply\nCharge injection is not included\nBandwidth is 266 MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\23bce3bb1bb2_nideal03op.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R1 i neg {R1}
RL o 0 {RL}
V2 0 Vnn {Vs}
R2 neg o {R2}
V1 Vpp 0 {Vs}
XU1 0 neg Vpp Vnn o level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
Vi i 0 {Vi}
.op
.meas G param V(o)/V(i)
.param Vs=15 Vi=2 R1=5.1k R2=1.8k RL=6.8k
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE 144 80 96 80
WIRE 256 80 224 80
WIRE 512 144 464 144
WIRE 464 160 464 144
WIRE 512 176 512 144
WIRE -48 208 -128 208
WIRE 80 208 32 208
WIRE 96 208 96 80
WIRE 96 208 80 208
WIRE 128 208 96 208
WIRE 256 224 256 80
WIRE 256 224 192 224
WIRE 320 224 256 224
WIRE 128 240 80 240
WIRE -128 256 -128 208
WIRE 320 256 320 224
WIRE 80 288 80 240
WIRE -128 368 -128 336
WIRE 320 368 320 336
SYMBOL res 304 240 R0
SYMATTR InstName RL
SYMATTR Value {RL}
SYMBOL voltage 512 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vs}
SYMBOL voltage 512 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value {Vs}
SYMBOL res -64 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL res 128 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL voltage -128 240 R0
WINDOW 3 42 66 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 50 38 Left 2
SYMATTR Value {Vi}
SYMATTR InstName Vi
SYMBOL Opamps\\UniversalOpamp2 160 224 R0
SYMATTR InstName U1
FLAG 512 64 Vpp
FLAG 464 160 0
FLAG 512 256 Vnn
FLAG 320 368 0
FLAG -128 368 0
FLAG 160 192 Vpp
FLAG 160 256 Vnn
FLAG 80 288 0
FLAG 320 224 o
FLAG -128 208 i
FLAG 80 208 neg
TEXT -280 8 Left 2 !.op
TEXT -280 -72 Left 2 !.meas G param V(o)/V(i)
TEXT -280 -32 Left 2 !.param Vs=15 Vi=2 R1=5.1k R2=1.8k RL=6.8k
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7172-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7172-3.0.asy)
V1 IN 0 3.5
XU1 IN OUT IN N001 OUT 0 ADM7172-3.0 ;pnba Vin)Sense)EN)SS)Vout)GND
C2 N001 0 1n
C1 OUT 0 4.7 Rser=1.5m
Rload OUT 0 2.5
.tran 5m startup
.lib ADM7172-3.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL ADM7172-3.0 224 128 R0
SYMATTR InstName U1
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.5
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL cap 80 240 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1n
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 376 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\27bc3332c2e7_GenericTee.asc
* Generated by LTspice 26.0.1 for Windows.
R2 OUT N001 1m
R4 REF N001 1e9
R3 TAP N001 1m
R1 N001 IN 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 144 32 144
WIRE 192 144 144 144
WIRE 256 144 192 144
WIRE 368 144 336 144
WIRE 192 160 192 144
WIRE 240 160 192 160
WIRE 192 208 192 160
WIRE 240 240 240 160
WIRE 256 240 240 240
WIRE 192 320 192 288
WIRE 336 320 336 240
IOPIN 32 144 In
IOPIN 368 144 Out
IOPIN 192 320 Out
IOPIN 336 320 BiDir
SYMBOL res 208 304 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 1m
SYMBOL res 352 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1m
SYMBOL res 160 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1m
SYMBOL res 352 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1e9
FLAG 32 144 IN
FLAG 368 144 OUT
FLAG 192 320 TAP
FLAG 336 320 REF
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1764A-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1764A-2.5.asy)
Rload OUT 0 500
C1 OUT 0 10 Rser=.1
XU1 IN IN 0 OUT OUT LT1764-2.5 ;pnba _SHDN)IN)GND)OUT)Sense
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT1764.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -224 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 512 48 384 48
WIRE -224 64 -224 48
WIRE 384 64 384 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -224 160 -224 144
WIRE 384 160 384 128
WIRE 512 160 512 144
WIRE 160 240 160 208
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 368 64 R0
WINDOW 39 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=.1
SYMBOL PowerProducts\\LT1764A-2.5 160 96 R0
SYMATTR InstName U1
FLAG -224 160 0
FLAG 384 160 0
FLAG 512 160 0
FLAG 160 240 0
FLAG 512 48 OUT
FLAG -224 48 IN
TEXT 360 248 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\00ee2ceb468a_Diode-Clipper-Vref.asc
* Generated by LTspice 26.0.1 for Windows.
D1 b N001 1N4148
V1 a 0 SINE(0 3V 50Hz)
R1 b a 1000
V2 N001 0 {Vref}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05s
.step param vref list 0 1V 2V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 96 -112 96
WIRE 208 96 80 96
WIRE 224 96 208 96
WIRE 224 128 224 96
WIRE -112 192 -112 96
WIRE 224 224 224 192
WIRE -112 336 -112 272
WIRE 48 336 -112 336
WIRE 224 336 224 304
WIRE 224 336 48 336
WIRE 48 352 48 336
SYMBOL diode 208 128 R0
WINDOW 3 41 28 Left 2
SYMATTR Value 1N4148
SYMATTR InstName D1
SYMBOL voltage 224 208 R0
SYMATTR InstName V2
SYMATTR Value {Vref}
SYMBOL Misc\\signal -112 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 38 63 Left 2
SYMATTR Value SINE(0 3V 50Hz)
SYMATTR InstName V1
SYMBOL Misc\\EuropeanResistor 96 80 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1000
FLAG -112 96 a
FLAG 208 96 b
FLAG 48 352 0
TEXT -112 368 Left 2 !.tran 0.05s
TEXT -112 408 Left 2 !.step param vref list 0 1V 2V
* Z:\home\khalils\Downloads\files\data\raw_asc\e0af76f104cb_Task3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD549.asy)
XU1 N002 N001 Vpp+ Vpp- Uout AD549 ;pnba In+)In-)V+)V-)OUT
V1 Vpp+ 0 15
Roc Uout N001 120k
R2 0 N001 6.32k
V2 0 Vpp- 15
Rl Uout 0 100k
R1 N002 Uin 6.32k
V3 Uin 0 SINE(0 0.1 50)
.tran 0.1
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1072 680
WIRE 112 -16 112 -32
WIRE 112 80 112 64
WIRE 192 80 112 80
WIRE 304 80 272 80
WIRE 192 128 176 128
WIRE 192 160 192 128
WIRE 608 160 608 112
WIRE 720 160 720 112
WIRE 848 160 848 112
WIRE 112 176 112 80
WIRE 160 176 112 176
WIRE 304 192 304 80
WIRE 304 192 224 192
WIRE 352 192 304 192
WIRE 384 192 352 192
WIRE 32 208 -32 208
WIRE 160 208 112 208
WIRE 352 224 352 192
WIRE 608 256 608 240
WIRE 720 256 720 240
WIRE 848 256 848 240
WIRE 192 272 192 224
WIRE 192 272 176 272
WIRE 352 320 352 304
IOPIN -32 208 In
IOPIN 384 192 Out
IOPIN 608 112 In
IOPIN 176 128 In
IOPIN 720 112 In
IOPIN 176 272 In
IOPIN 848 112 In
SYMBOL voltage 720 144 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 336 208 R0
SYMATTR InstName Rl
SYMATTR Value 100k
SYMBOL res 288 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Roc
SYMATTR Value 120k
SYMBOL OpAmps\\AD549 192 128 R0
SYMATTR InstName U1
SYMBOL res 96 -32 R0
SYMATTR InstName R2
SYMATTR Value 6.32k
SYMBOL voltage 848 256 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage 608 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 0.1 50)
SYMBOL res 128 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 6.32k
FLAG -32 208 Uin
FLAG 112 -32 0
FLAG 384 192 Uout
FLAG 352 320 0
FLAG 608 112 Uin
FLAG 176 128 Vpp+
FLAG 720 112 Vpp+
FLAG 176 272 Vpp-
FLAG 848 112 Vpp-
FLAG 608 256 0
FLAG 720 256 0
FLAG 848 256 0
TEXT -128 348 Left 2 !.tran 0.1
* Z:\tmp\asc_dec_bjh7r6w2\19969a7b160b_EC370M-6-120FB_370_Wp_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
D19 NC_01 NC_02 D
D41 NC_03 NC_04 D
D3 NC_05 P001 D
D33 NC_06 NC_07 D
D2 P001 NC_08 D
D25 P002 NC_09 D
D28 NC_10 NC_11 D
D37 P003 NC_12 D
D17 NC_13 NC_14 D
D22 P004 NC_15 D
D31 NC_16 NC_17 D
D23 NC_18 P004 D
D7 NC_19 NC_20 D
D26 NC_21 P002 D
D38 P005 P003 D
D39 NC_22 P005 D
R1 V+ N001 10m
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 -2848 0 -2848
WIRE 176 -2848 96 -2848
WIRE 368 -2848 256 -2848
WIRE 0 -1552 0 -2848
WIRE 0 160 0 -1472
WIRE 48 160 0 160
WIRE 96 160 48 160
SYMBOL diode 80 -1056 R0
SYMATTR InstName D19
SYMBOL diode 80 -2464 R0
SYMATTR InstName D41
SYMBOL diode 80 -32 R0
SYMATTR InstName D3
SYMBOL diode 80 -1952 R0
SYMATTR InstName D33
SYMBOL diode 80 32 R0
SYMATTR InstName D2
SYMBOL diode 80 -1440 R0
SYMATTR InstName D25
SYMBOL diode 80 -1632 R0
SYMATTR InstName D28
SYMBOL diode 80 -2208 R0
SYMATTR InstName D37
SYMBOL diode 80 -928 R0
SYMATTR InstName D17
SYMBOL diode 80 -1248 R0
SYMATTR InstName D22
SYMBOL diode 80 -1824 R0
SYMATTR InstName D31
SYMBOL diode 80 -1312 R0
SYMATTR InstName D23
SYMBOL diode 80 -288 R0
SYMATTR InstName D7
SYMBOL diode 80 -1504 R0
SYMATTR InstName D26
SYMBOL diode 80 -2272 R0
SYMATTR InstName D38
SYMBOL diode 80 -2336 R0
SYMATTR InstName D39
SYMBOL res 272 -2864 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10m
FLAG 368 -2848 V+
FLAG 48 160 V-