Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\09dce248f467_SLOPE_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
B1 out 0 V=IF(V(in)>0.5, se*(V(a)-V(b)), 0)
R1 o 0 1k
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2080 1228
WIRE 1200 288 1120 288
WIRE 768 336 768 288
WIRE 928 336 928 288
WIRE 1120 336 1120 288
WIRE 768 448 768 416
WIRE 928 448 928 416
WIRE 1120 448 1120 416
SYMBOL bv 1120 320 R0
SYMATTR InstName B1
SYMATTR Value V=IF(V(in)>0.5, se*(V(a)-V(b)), 0)
SYMBOL res 752 320 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 1200 288 out
FLAG 1120 448 0
FLAG 768 448 0
FLAG 768 288 o
FLAG 928 448 0
FLAG 928 288 b
* Z:\home\khalils\Downloads\files\data\raw_asc\5e0b3540b7ad_not_gate.asc
* Generated by LTspice 26.0.1 for Windows.
D1 P002 P001 D
R1 N001 N002 100k
M2 Vout N002 0 0 NMOS
M1 N002 P001 0 0 NMOS
V1 P002 0 0.5
V2 N001 0 5
R2 N001 Vout 100k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V1 0 10 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 -144 208 -144
WIRE 304 -64 208 -64
WIRE 304 16 304 -64
SYMBOL diode 96 32 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL nmos 160 -64 R0
SYMATTR InstName M1
SYMBOL voltage 208 -128 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 336 -160 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL nmos 304 -64 R0
SYMATTR InstName M2
SYMBOL voltage 112 16 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0.5
SYMBOL res 192 -160 R0
SYMATTR InstName R1
SYMATTR Value 100k
FLAG 208 32 0
FLAG 16 16 0
FLAG 208 -224 0
FLAG 352 -64 Vout
FLAG 352 32 0
TEXT 60 82 Left 2 !.dc V1 0 10 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\f9e1b75bbd54_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
VDD N001 0 10
M1 OUT IN N001 N001 IRF7309P
M2 OUT IN 0 0 IRFZ44N
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 960 680
WIRE 608 -144 256 -144
WIRE 256 -128 256 -144
WIRE 208 -112 176 -112
WIRE 176 16 176 -112
WIRE 176 16 32 16
WIRE 256 32 256 -32
WIRE 416 32 256 32
WIRE 256 64 256 32
WIRE 176 144 176 16
WIRE 208 144 176 144
WIRE 256 240 256 160
FLAG 256 240 0
FLAG 608 -64 0
FLAG 32 16 IN
IOPIN 32 16 In
FLAG 416 32 OUT
IOPIN 416 32 Out
SYMBOL voltage 608 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 10
SYMBOL pmos 208 -32 M180
SYMATTR InstName M1
SYMATTR Value IRF7309P
SYMBOL nmos 208 64 R0
SYMATTR InstName M2
SYMATTR Value IRFZ44N
* Z:\home\khalils\Downloads\files\data\raw_asc\03b31c0b0dd5_8040.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N001 N001 N003 N004 N004 N002 N006 N005 LTM8040 ;pnba GND)Vin)_SHDN)Rt)BIAS)LPWR)LEDA)Adj)PWM
V1 N001 0 24
R1 N003 0 215K
D1 N002 0 LXK2-PW14 N=2
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8040.asy)
.lib LTM8040.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 16 -128 16
WIRE 224 16 48 16
WIRE -128 32 -128 16
WIRE 224 48 224 16
WIRE 48 96 48 16
WIRE 80 96 48 96
WIRE 480 96 368 96
WIRE 480 112 480 96
WIRE -128 128 -128 112
WIRE -16 160 -32 160
WIRE 80 160 64 160
WIRE 384 160 368 160
WIRE 80 224 64 224
WIRE 384 224 384 160
WIRE 384 224 368 224
WIRE 480 240 480 176
WIRE 80 288 64 288
WIRE 224 352 224 336
FLAG -128 128 0
FLAG -32 160 0
FLAG 224 352 0
FLAG 480 240 0
SYMBOL PowerProducts\\LTM8040 224 192 R0
SYMATTR InstName U1
SYMBOL voltage -128 16 R0
WINDOW 3 30 97 Left 2
SYMATTR Value 24
SYMATTR InstName V1
SYMBOL res 80 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 215K
SYMBOL LED 464 112 R0
WINDOW 123 24 100 Left 2
SYMATTR Value2 N=2
SYMATTR InstName D1
SYMATTR Value LXK2-PW14
TEXT 408 328 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\46707cacbc79_Input_Voltage_Polarity_Protection.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 0 100
D1 N003 N002 1N5819
V1 N001 0 -5.5
M1 N001 N003 N002 N002 PMOS
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 5 0.1 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 64 0 64
WIRE 304 64 272 64
WIRE 384 64 304 64
WIRE 304 80 304 64
WIRE 0 96 0 64
WIRE 256 176 256 112
WIRE 304 176 304 144
WIRE 304 176 256 176
WIRE 0 288 0 176
WIRE 256 288 256 256
SYMBOL schottky 320 144 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMATTR Description Zener Diode
SYMATTR Type zener
SYMBOL pmos 176 112 R270
SYMATTR InstName M1
SYMBOL res 240 160 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage 0 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -5.5
FLAG 256 288 0
FLAG 0 288 0
TEXT -34 312 Left 2 !.tran 0 5 0.1 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7185-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7185-1.2.asy)
R3 OUT 0 2.4
C3 N001 0 1
XU1 OUT OUT N001 N002 IN 0 N003 IN ADP7185-1.2 ;pnba Vout)Sense)VA)VAFB)EN)GND)Vreg)Vin
C2 OUT 0 4.7 Rser=5m
C1 N001 N002 10n
V1 IN 0 -2
C4 N003 0 1
.tran 200m startup
.lib ADP7185-1.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 16 -48
WIRE 96 -48 32 -48
WIRE 112 -48 96 -48
WIRE 400 -48 368 -48
WIRE 432 -48 400 -48
WIRE 496 -48 432 -48
WIRE 512 -48 496 -48
WIRE 16 -32 16 -48
WIRE 432 -32 432 -48
WIRE 400 16 400 -48
WIRE 400 16 368 16
WIRE 432 48 432 32
WIRE 512 48 512 32
WIRE 16 64 16 48
WIRE 96 80 96 -48
WIRE 112 80 96 80
WIRE 464 80 368 80
WIRE 384 144 368 144
WIRE 464 144 464 80
WIRE 464 144 448 144
WIRE 464 160 464 144
WIRE 176 224 176 208
WIRE 304 224 304 208
WIRE 464 240 464 224
WIRE 176 304 176 288
SYMBOL ADP7185-1.2 240 48 R0
SYMATTR InstName U1
SYMBOL res 496 -64 R0
SYMATTR InstName R3
SYMATTR Value 2.4
SYMBOL cap 448 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap 448 160 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 160 224 R0
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL voltage 16 -48 R0
SYMATTR InstName V1
SYMATTR Value -2
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=5m
FLAG 16 64 0
FLAG 432 48 0
FLAG 304 224 0
FLAG 512 48 0
FLAG 32 -48 IN
FLAG 496 -48 OUT
FLAG 464 240 0
FLAG 176 304 0
TEXT 240 360 Center 2 !.tran 200m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\326f9b8a9852_Peak_Detector_aus_Art_of_Electronics.asc
* Generated by LTspice 26.0.1 for Windows.
* Simuliert nicht bei >4pF und 70MHz.\nCap muss aber >4pF
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4857.asy)
+ M=.20134 VJ=.3905 ISR=12.216E-9 NR=4.9950 FC=0.5 TT=0 XTI=2)
XU1 IN FEEDBACK VCC5 0 N001 0 ADA4857 ;pnba 100)101)102)103)104)106
D1 FEEDBACK N001 BAR18
XU2 P001 PEAK VCC5 0 PEAK 0 ADA4857 ;pnba 100)101)102)103)104)106
R1 PEAK FEEDBACK 20k
C1 N002 0 4p
V2 VCC5 0 5
D2 N001 N002 BAR18
V1 IN 0 SINE(2.5 1.2 70Meg)
R2 P001 N002 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 150n
.model BAR18 D(IS=2.2017E-18 N=.2 RS=48.717 IKF=2.3793 CJO=1.4285E-12
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1892 680
WIRE 496 -128 432 -128
WIRE 640 -128 496 -128
WIRE 736 -128 640 -128
WIRE 912 -128 816 -128
WIRE 1040 -128 912 -128
WIRE 640 -112 640 -128
WIRE 912 0 912 -128
WIRE 928 0 912 0
WIRE 432 16 432 -128
WIRE 464 16 432 16
WIRE 1040 16 1040 -128
WIRE 1040 16 992 16
WIRE 1104 16 1040 16
WIRE 640 32 640 -48
WIRE 640 32 528 32
WIRE 656 32 640 32
WIRE 800 32 720 32
WIRE 848 32 800 32
WIRE 464 48 64 48
WIRE 64 64 64 48
WIRE 800 64 800 32
WIRE 944 64 944 48
WIRE 976 64 976 48
WIRE 480 80 480 64
WIRE 512 80 512 64
WIRE 64 112 64 64
WIRE 800 160 800 128
IOPIN -224 80 Out
IOPIN 480 0 In
IOPIN 944 -16 In
IOPIN 1104 16 Out
SYMBOL schottky 624 -112 R0
SYMATTR InstName D1
SYMATTR Value BAR18
SYMBOL OpAmps\\ADA4857 496 32 R0
SYMATTR InstName U1
SYMBOL res 832 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20k
SYMBOL schottky 656 48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value BAR18
SYMBOL voltage -224 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 944 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL cap 784 64 R0
SYMATTR InstName C1
SYMATTR Value 4p
SYMBOL voltage 64 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(2.5 1.2 70Meg)
SYMBOL OpAmps\\ADA4857 960 16 R0
SYMATTR InstName U2
FLAG 64 64 IN
FLAG 64 192 0
FLAG -224 160 0
FLAG -224 80 VCC5
FLAG 480 0 VCC5
FLAG 512 80 0
FLAG 480 80 0
FLAG 944 -16 VCC5
FLAG 976 64 0
FLAG 944 64 0
FLAG 800 160 0
FLAG 1104 16 PEAK
FLAG 496 -128 FEEDBACK
TEXT 136 -56 Left 2 !.tran 150n
TEXT -184 -120 Left 0 !.model BAR18 D(IS=2.2017E-18 N=.2 RS=48.717 IKF=2.3793 CJO=1.4285E-12\n+ M=.20134 VJ=.3905 ISR=12.216E-9 NR=4.9950 FC=0.5 TT=0 XTI=2)
TEXT 856 120 Left 2 ;Simuliert nicht bei >4pF und 70MHz.\nCap muss aber >4pF
* Z:\home\khalils\Downloads\files\data\raw_asc\5623ffba39af_scheme7.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1014.asy)
V2 N006 0 1
V3 N001 0 {Vcc}
Vin N002 0 DC 0
R2 N005 N006 10k
XU1 N005 N003 N001 N007 N004 LT1013 ;pnba In+)In-)V+)V-)OUT
R1 N003 N002 10k
V4 0 N007 {Vcc}
.dc Vin {-1.1*Vcc} {1.1*Vcc} 0.01
.param Vcc=22
.lib LT1013.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 416 48 240 48
WIRE 416 64 416 48
WIRE 64 96 -80 96
WIRE 176 96 144 96
WIRE -80 112 -80 96
WIRE 240 128 240 48
WIRE 176 144 176 96
WIRE 208 144 176 144
WIRE 368 160 272 160
WIRE 416 160 416 144
WIRE 496 160 416 160
WIRE 208 176 176 176
WIRE 416 176 416 160
WIRE 496 176 496 160
WIRE 64 208 -16 208
WIRE 176 208 176 176
WIRE 176 208 144 208
WIRE -16 240 -16 208
WIRE 240 272 240 192
WIRE 416 272 416 256
WIRE 416 272 240 272
SYMBOL res 160 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -16 224 R0
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL voltage -80 96 R0
SYMATTR InstName Vin
SYMATTR Value DC 0
SYMBOL voltage 416 48 R0
SYMATTR InstName V3
SYMATTR Value {Vcc}
SYMBOL voltage 416 160 R0
SYMATTR InstName V4
SYMATTR Value {Vcc}
SYMBOL OpAmps\\LT1014 240 96 R0
SYMATTR InstName U1
SYMBOL res 160 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
FLAG 496 176 0
FLAG -16 320 0
FLAG -80 192 0
TEXT 80 320 Left 2 !.dc Vin {-1.1*Vcc} {1.1*Vcc} 0.01
TEXT -104 64 Left 2 !.param Vcc=22
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7102-9.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7102-9.0.asy)
XU1 IN OUT IN N001 OUT 0 ADP7102 Vref=9 ;pnba Vin)Sense)EN)PG)Vout)GND
V1 IN 0 10
R1 OUT N001 100k
C1 OUT 0 2.2 Rser=1.5m
Rload OUT 0 50
.tran 3m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -16 48 -16 32
WIRE 384 128 352 128
WIRE 464 128 464 32
WIRE 464 128 384 128
WIRE 560 128 464 128
WIRE -16 144 -16 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 384 224 384 128
WIRE 384 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
SYMBOL voltage -16 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL ADP7102-9.0 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -16 144 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -16 32 IN
FLAG 560 128 OUT
TEXT 432 296 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\f3cf166fd77f_part1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP747.asy)
R2 N001 0 10k
V2 N002 N004 10
R1 N003 N005 3.617k
XU1 N003 N001 N002 N004 N001 OP747 ;pnba In+)In-)V+)V-)OUT
C1 N003 0 220n
V1 N005 0 SINE(0 10 1) AC 10 0
.ac lin 1000 2 20000
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 432 -64 288 -64
WIRE 352 -48 240 -48
WIRE 352 -32 352 -48
WIRE 288 -16 288 -64
WIRE 320 -16 288 -16
WIRE 432 0 432 -64
WIRE 432 0 384 0
WIRE 320 16 288 16
WIRE 352 32 240 32
WIRE 144 64 64 64
WIRE 288 64 288 16
WIRE 288 64 224 64
WIRE 432 96 432 0
WIRE 64 112 64 64
WIRE 288 112 288 64
WIRE 64 224 64 192
WIRE 288 224 288 176
WIRE 288 224 64 224
WIRE 432 224 432 176
WIRE 432 224 288 224
WIRE 64 240 64 224
SYMBOL cap 272 112 R0
SYMATTR InstName C1
SYMATTR Value 220n
SYMBOL voltage 64 96 R0
WINDOW 3 -200 57 Left 2
WINDOW 123 -175 87 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 1)
SYMATTR Value2 AC 10 0
SYMBOL voltage 240 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 10
SYMBOL res 416 80 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL Opamps\\OP747 352 -64 R0
SYMATTR InstName U1
SYMBOL res 240 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3.617k
FLAG 64 240 0
TEXT -138 264 Left 2 !.ac lin 1000 2 20000
* Z:\home\khalils\Downloads\files\data\raw_asc\1b6e83d7e59b_transmission_gate.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vin n_in Vout 0 n_65 l=65n w=1u
M2 Vout p_in Vin VDD p_65 l=65n w=2u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include 65nm_bulk.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 924
WIRE 64 368 64 288
WIRE 48 416 16 416
WIRE 176 416 144 416
WIRE 16 528 16 416
WIRE 16 528 -16 528
WIRE 176 528 176 416
WIRE 208 528 176 528
WIRE 16 640 16 528
WIRE 48 640 16 640
WIRE 96 640 96 624
WIRE 176 640 176 528
WIRE 176 640 144 640
WIRE 128 752 128 688
FLAG 96 624 0
FLAG 96 416 VDD
FLAG 128 752 n_in
IOPIN 128 752 In
FLAG 64 288 p_in
IOPIN 64 288 In
FLAG -16 528 Vin
IOPIN -16 528 In
FLAG 208 528 Vout
IOPIN 208 528 Out
SYMBOL nmos4 48 688 R270
WINDOW 123 56 94 Left 2
SYMATTR Value2 l=65n w=1u
SYMATTR InstName M1
SYMATTR Value n_65
SYMBOL pmos4 144 368 R90
WINDOW 123 56 50 Left 2
SYMATTR Value2 l=65n w=2u
SYMATTR InstName M2
SYMATTR Value p_65
TEXT -224 88 Left 2 !.include 65nm_bulk.txt
* Z:\home\khalils\Downloads\files\data\raw_asc\a7dc8b107f17_EP3_step.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 1
R1 N001 N002 {upper}
R2 N002 0 {lower}
.step param upper list 1k 10k 100k
.step param lower 1k 10k 1k
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 224 -32 112 -32
WIRE 224 16 224 -32
WIRE 112 64 112 -32
WIRE 224 112 224 96
WIRE 112 208 112 144
WIRE 224 208 224 192
FLAG 112 208 0
FLAG 224 208 0
SYMBOL voltage 112 48 R0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL res 208 0 R0
SYMATTR InstName R1
SYMATTR Value {upper}
SYMBOL res 208 96 R0
SYMATTR InstName R2
SYMATTR Value {lower}
TEXT 80 -88 Left 2 !.step param upper list 1k 10k 100k
TEXT 80 -120 Left 2 !.step param lower 1k 10k 1k
TEXT 64 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\2d5e1505253a_1_d_Diodo_Schottky_Analisis_temp_e_is_differentes.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
D1 N001 0 1N5819
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -2 4 0.01
.temp 0 20 40 60 80 100 120 140 200 250 300
.model 1N5819 D(Is=40m Rs=.051 N=1.373 Cjo=110p M=.35 Eg=.69 Xti=2 Iave=1 Vpk=40 mfg=OnSemi type=Schottky)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 16 80 16
WIRE 80 64 80 16
WIRE 240 64 240 16
WIRE 80 192 80 144
WIRE 160 192 80 192
WIRE 240 192 240 128
WIRE 240 192 160 192
WIRE 160 208 160 192
FLAG 160 208 0
SYMBOL voltage 80 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL schottky 224 64 R0
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMATTR Description Diode
SYMATTR Type diode
TEXT 200 216 Left 2 !.dc V1 -2 4 0.01
TEXT 200 240 Left 2 !.temp 0 20 40 60 80 100 120 140 200 250 300
TEXT -576 264 Left 2 !.model 1N5819 D(Is=40m Rs=.051 N=1.373 Cjo=110p M=.35 Eg=.69 Xti=2 Iave=1 Vpk=40 mfg=OnSemi type=Schottky)
* Z:\home\khalils\Downloads\files\data\raw_asc\21f36681fd3f_LeakSensor.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 0 1k
R1 N001 N002 27k
R3 N003 0 100
V1 N001 0 3.3
M1 N003 N002 N001 N001 AO6407
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 -160 304 -160
WIRE 304 -128 304 -160
WIRE 416 -96 416 -160
WIRE 304 16 304 -48
WIRE 304 16 160 16
WIRE 160 48 160 16
WIRE 304 112 304 16
WIRE 256 128 160 128
WIRE 160 160 160 128
WIRE 160 256 160 240
WIRE 304 256 304 208
WIRE 400 256 304 256
SYMBOL pmos 256 208 M180
SYMATTR InstName M1
SYMATTR Value AO6407
SYMBOL res 144 32 R0
SYMATTR InstName R1
SYMATTR Value 27k
SYMBOL res 384 240 R0
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL res 144 144 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 304 -32 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG 400 336 0
FLAG 416 -96 0
FLAG 160 256 0
TEXT -80 64 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL40502-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
V1 vIN 0 3.3
Rload vOUT 0 12.5
C1 vOUT 0 1 Rser=1m
XU1 vIN 0 vIN vOUT ADPL40502-2.5 ;pnba Vin)GND)EN)Vout
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL40502-2.5.asy)
.lib ADPL40502-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2808 1464
WIRE 1824 880 1728 880
WIRE 1984 880 1824 880
WIRE 1728 896 1728 880
WIRE 1984 896 1984 880
WIRE 1728 992 1728 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
FLAG 2256 1024 vOUT
FLAG 2256 1136 0
FLAG 1728 992 0
FLAG 1728 880 vIN
FLAG 1984 1168 0
FLAG 2160 1136 0
SYMBOL VOLTAGE 1728 880 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 12.5
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMATTR SpiceLine Rser=1m
SYMBOL ADPL40502-2.5 1984 1024 R0
SYMATTR InstName U1
TEXT 2144 1200 Left 2 !.tran 1m startup
* Z:\tmp\asc_dec_bjh7r6w2\1675700c3ab6_SPICE_RESIT_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 0 0 N002 0 PNP5
E2 N001 0 NC_01 NC_02 10k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2248 1144
WIRE 400 0 208 0
WIRE 848 0 400 0
WIRE 400 48 400 0
WIRE 208 144 208 0
WIRE 400 384 400 128
WIRE 336 432 272 432
WIRE 208 608 208 224
WIRE 272 608 272 432
WIRE 272 608 208 608
WIRE 400 608 400 480
WIRE 400 608 272 608
WIRE 720 608 400 608
WIRE 400 640 400 608
SYMBOL pnp2 336 480 M180
WINDOW 0 -2 -11 Left 2
SYMATTR InstName Q1
SYMATTR Value PNP5
SYMBOL e2 208 128 M0
SYMATTR InstName E2
SYMATTR Value 10k
FLAG 400 640 0
* Z:\tmp\asc_dec_bjh7r6w2\09ccbffef365_Key_Input_LTspice_Model_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
D1 0 Vz MYD
R3 N001 Vmcu 20K
V1 Vin 0 PULSE(0 20 0 1 0 0 0 1)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -368 128 -480 128
WIRE -336 128 -368 128
WIRE -192 128 -256 128
WIRE -160 128 -192 128
WIRE -48 128 -80 128
WIRE -16 128 -48 128
WIRE 256 128 176 128
WIRE 336 128 256 128
WIRE 464 128 416 128
WIRE -480 144 -480 128
WIRE -192 144 -192 128
WIRE 464 144 464 128
WIRE -368 224 -480 224
WIRE -192 224 -192 208
WIRE -192 224 -368 224
WIRE -16 224 -192 224
WIRE 240 224 176 224
WIRE 464 224 240 224
WIRE -368 272 -368 224
WIRE 240 272 240 224
SYMBOL zener -176 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MYD
SYMBOL res 432 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL voltage -480 128 R0
WINDOW 3 -222 129 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 20 0 1 0 0 0 1)
FLAG 240 272 0
FLAG -368 272 0
FLAG 256 128 Vmcu
FLAG -368 128 Vin
FLAG -192 128 Vz
FLAG -48 128 Vled
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7156-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7156-3.0.asy)
C1 OUT 0 10
XU1 OUT MP_01 OUT N002 N001 N003 N003 N004 IN 0 ADP7156_7 Vreg=3.611 Vref=3.016 ;pnba Vout))Vout_Sense)Byp)EN)Ref_Sense)Ref)Vreg)Vin)GND
V1 IN 0 3.8
C2 N003 0 1
R1 IN N001 100K
Rload OUT 0 3
C3 N004 0 1
C4 N002 0 1 Rser=10m Lser=1n
.tran 5m startup
.lib ADP7156_7.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -160 32
WIRE 80 32 -32 32
WIRE 416 32 400 32
WIRE 464 32 416 32
WIRE 560 32 464 32
WIRE -160 48 -160 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE 416 128 416 32
WIRE 416 128 400 128
WIRE -160 144 -160 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE 0 224 -16 224
WIRE 80 224 64 224
WIRE 416 224 400 224
WIRE 464 224 416 224
WIRE 464 240 464 224
WIRE 0 320 -16 320
WIRE 80 320 64 320
WIRE 416 320 416 224
WIRE 416 320 400 320
WIRE 464 320 464 304
WIRE 240 400 240 384
SYMBOL ADP7156-3.0 240 176 R0
SYMATTR InstName U1
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 448 240 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMATTR Value2 Rser=10m
SYMATTR SpiceLine Lser=1n
SYMBOL cap 448 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL cap 64 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 544 32 R0
SYMATTR InstName Rload
SYMATTR Value 3
SYMBOL voltage -160 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.8
FLAG 240 400 0
FLAG 464 320 0
FLAG 464 144 0
FLAG -16 320 0
FLAG -16 224 0
FLAG -160 144 0
FLAG 560 144 0
FLAG -160 32 IN
FLAG 560 32 OUT
TEXT 504 368 Left 2 !.tran 5m startup