Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG412.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG412.asy)
V1 +V 0 15
R1 N002 0 1K
V4 N003 0 pulse(0 3.3 0 1u 1u 5m 10m)
V3 N001 0 SINE(0 15 1k)
V2 -V 0 -15
XU1 N003 N002 N001 -V 0 +V ADG412 ;pnba IN)D)S)Vss)GND)Vdd
.tran 30m
.lib ADG412.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -96
WIRE -528 -32 -528 -48
WIRE -368 0 -400 0
WIRE -240 0 -288 0
WIRE 0 0 -48 0
WIRE 0 16 0 0
WIRE -528 64 -528 48
WIRE -240 64 -336 64
WIRE 0 112 0 96
WIRE -528 160 -528 144
WIRE -336 160 -336 64
WIRE -208 192 -208 176
WIRE -80 192 -80 176
WIRE -528 256 -528 240
WIRE -336 256 -336 240
SYMBOL voltage -272 0 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 15 1k)
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -528 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -528 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL ADG412 -144 48 R0
SYMATTR InstName U1
SYMBOL voltage -336 144 R0
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
FLAG -528 256 0
FLAG -528 64 0
FLAG -528 -48 +V
FLAG -528 144 -V
FLAG -400 0 0
FLAG -208 192 -V
FLAG -144 -96 +V
FLAG -80 192 0
FLAG -336 256 0
FLAG 0 112 0
TEXT 16 176 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\0abb011940e2_ProportionalSummingCircuit.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD712.asy)
R1 OUT 0 5.1k
XU2 IN OUT +V -V OUT AD712 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -15
V1 +V 0 15
Vin1 IN 0
.dc Vin1 -2 2 0.5
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1716 680
WIRE 1536 -240 1536 -256
WIRE 1648 -240 1648 -256
WIRE 1536 -144 1536 -160
WIRE 1648 -144 1648 -160
WIRE 480 32 368 32
WIRE 368 128 368 32
WIRE 384 128 368 128
WIRE 480 144 480 32
WIRE 480 144 448 144
WIRE 512 144 480 144
WIRE 528 144 512 144
WIRE 384 160 272 160
WIRE 272 176 272 160
WIRE 512 208 512 144
WIRE 272 272 272 256
SYMBOL AD712 416 80 R0
SYMATTR InstName U2
SYMBOL voltage 1648 -256 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 496 192 R0
SYMATTR InstName R1
SYMATTR Value 5.1k
SYMBOL voltage 1536 -256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 272 160 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin1
SYMATTR Value ""
FLAG 1536 -256 +V
FLAG 1536 -144 0
FLAG 272 272 0
FLAG 528 144 OUT
FLAG 272 160 IN
FLAG 416 112 +V
FLAG 1648 -256 -V
FLAG 416 176 -V
FLAG 1648 -144 0
FLAG 512 288 0
TEXT 232 336 Left 2 !.dc Vin1 -2 2 0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3048-12.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3048-12.asy)
XU1 N002 IN 0 N003 OUT N001 IN N001 LT3048-12 ;pnba SW)Vin)GND)BYP)LDOOUT)LDOIN)EN)BSTOUT
V1 IN 0 3.3
Rload OUT 0 413.8
C1 N001 0 4.7
C2 OUT N003 .1n
L1 IN N002 10 Rser=.65
C3 OUT 0 1 Rser=10m
.tran 1.5m startup
.lib LT3048-12.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 48 256 48
WIRE 464 48 416 48
WIRE 256 64 256 48
WIRE 464 64 464 48
WIRE 112 128 80 128
WIRE 416 128 416 48
WIRE 416 128 400 128
WIRE 464 144 464 128
WIRE 80 224 80 208
WIRE 80 224 -32 224
WIRE 112 224 80 224
WIRE 448 224 400 224
WIRE 528 224 448 224
WIRE 608 224 528 224
WIRE -32 240 -32 224
WIRE 448 240 448 224
WIRE 528 240 528 224
WIRE 608 240 608 224
WIRE 80 320 80 224
WIRE 112 320 80 320
WIRE 448 320 448 304
WIRE 448 320 400 320
WIRE -32 336 -32 320
WIRE 528 336 528 304
WIRE 608 336 608 320
WIRE 256 400 256 384
SYMBOL ind 96 224 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value 10u
SYMATTR SpiceLine Rser=.65
SYMBOL res 592 224 R0
SYMATTR InstName Rload
SYMATTR Value 413.8
SYMBOL cap 432 240 R0
SYMATTR InstName C2
SYMATTR Value .1n
SYMBOL cap 448 64 R0
SYMATTR InstName C1
SYMATTR Value 4.7u
SYMBOL cap 512 240 R0
SYMATTR InstName C3
SYMATTR Value 1u
SYMATTR SpiceLine Rser=10m
SYMBOL PowerProducts\\LT3048-12 256 224 R0
SYMATTR InstName U1
SYMBOL voltage -32 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG 256 400 0
FLAG -32 336 0
FLAG 464 144 0
FLAG 528 336 0
FLAG 608 336 0
FLAG -32 224 IN
FLAG 608 224 OUT
TEXT 432 384 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\17cb0f6cf0e3_current-sensing-common-mode.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N001 N004 N006 0 N003 LM358 ;pnba In+)In-)V+)V-)OUT
V2 N006 0 7
R2 N005 0 10
R5 N007 0 200
R4 N005 N004 200
V1 N002 0 {Vs}
R3 N002 N001 200
R1 N002 N005 0.1
Q1 N001 N003 N007 0 KT940A
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.inc LM358.101
.tran 1ms
.STEP param Vs 0 7 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 496 32 272 32
WIRE 112 48 -112 48
WIRE -112 80 -112 48
WIRE 112 80 112 48
WIRE 176 80 112 80
WIRE 272 80 272 32
WIRE 272 80 256 80
WIRE 496 80 496 32
WIRE 112 96 112 80
WIRE 336 96 336 80
WIRE 272 112 272 80
WIRE 304 112 272 112
WIRE 432 128 368 128
WIRE 304 144 272 144
WIRE -112 176 -112 160
WIRE 112 192 112 176
WIRE 176 192 112 192
WIRE 272 192 272 144
WIRE 272 192 256 192
WIRE 336 208 336 160
WIRE 496 224 496 176
WIRE 112 256 112 192
WIRE 336 304 336 288
WIRE 496 320 496 304
WIRE 112 352 112 336
SYMBOL res 96 240 R0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL res 160 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 200
SYMBOL npn 432 80 R0
SYMATTR InstName Q1
SYMATTR Value KT940A
SYMBOL Opamps\\opamp2 336 192 M180
SYMATTR InstName U1
SYMATTR Value LM358
SYMBOL voltage 336 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 7
SYMBOL res 96 80 R0
SYMATTR InstName R1
SYMATTR Value 0.1
SYMBOL voltage -112 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value {Vs}
SYMBOL res 480 208 R0
SYMATTR InstName R5
SYMATTR Value 200
SYMBOL res 160 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 200
FLAG -112 176 0
FLAG 112 352 0
FLAG 336 304 0
FLAG 336 80 0
FLAG 496 320 0
TEXT -216 272 Left 2 !.inc LM358.101
TEXT -200 312 Left 2 !.tran 1ms
TEXT -224 352 Left 2 !.STEP param Vs 0 7 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\2ndOrderNotch.asc
* Generated by LTspice 26.0.1 for Windows.
* Set notch frequency and quality factor
* R1 is arbitary
* This version puts 1/2 the R1 resistance in the capacitor
* Vout
* Vin
* The parameter "H" is the gain at frequencies away from the notch
R2 N003 N002 {R1/2}
V1 1 0 AC 1
R4 2 0 .1
R1 N002 0 {R1/2}
R3 N003 0 {R1}
G1 0 N002 1 0 {4/R1}
C1 N003 0 {C1} Lser={L1}
G2 0 2 N003 0 {10*H}
R5 2 0 1Meg
.param f0= 1k Q=.5
.param R1=1k
.param L1=R1*Q/(4*pi*f0)
.param C1=1/(L1*(2*pi*f0)**2)
.ac dec 101 100 10k
.param H=0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE -624 -112 -688 -112
WIRE -528 -112 -560 -112
WIRE -320 -112 -480 -112
WIRE -192 -112 -320 -112
WIRE -64 -112 -112 -112
WIRE 112 -112 -64 -112
WIRE 304 -112 112 -112
WIRE 464 -112 352 -112
WIRE 528 -112 464 -112
WIRE 560 -112 528 -112
WIRE 688 -112 624 -112
WIRE -688 -80 -688 -112
WIRE -480 -80 -480 -112
WIRE 688 -80 688 -112
WIRE -528 -64 -528 -112
WIRE -320 -48 -320 -112
WIRE -64 -48 -64 -112
WIRE 112 -48 112 -112
WIRE 352 -48 352 -112
WIRE 464 -48 464 -112
WIRE 304 -32 304 -112
WIRE -688 16 -688 0
WIRE -528 16 -528 -16
WIRE -480 32 -480 0
WIRE 304 48 304 16
WIRE 352 48 352 32
WIRE 464 48 464 32
WIRE 688 48 688 0
WIRE -320 64 -320 32
WIRE -64 64 -64 16
WIRE 112 64 112 32
SYMBOL cap -80 -48 R0
WINDOW 0 50 9 Left 2
WINDOW 3 44 40 Left 2
WINDOW 123 45 71 Left 2
SYMATTR InstName C1
SYMATTR Value {C1}
SYMATTR Value2 Lser={L1}
SYMBOL Misc\\jumper 592 -176 R0
SYMATTR InstName J2
SYMBOL res -96 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R1/2}
SYMBOL voltage -688 -96 R0
WINDOW 0 36 21 Left 2
WINDOW 123 31 86 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMBOL res -336 -64 R0
SYMATTR InstName R1
SYMATTR Value {R1/2}
SYMBOL Misc\\jumper -592 -176 M0
SYMATTR InstName J1
SYMBOL g 352 -64 R0
SYMATTR InstName G2
SYMATTR Value {10*H}
SYMBOL res 448 -64 R0
SYMATTR InstName R4
SYMATTR Value .1
SYMBOL res 96 -64 R0
SYMATTR InstName R3
SYMATTR Value {R1}
SYMBOL g -480 -96 R0
SYMATTR InstName G1
SYMATTR Value {4/R1}
SYMBOL res 672 -96 R0
SYMATTR InstName R5
SYMATTR Value 1Meg
FLAG -320 64 0
FLAG -480 32 0
FLAG -528 16 0
FLAG -64 64 0
FLAG 112 64 0
FLAG 304 48 0
FLAG 352 48 0
FLAG 464 48 0
FLAG 528 -112 2
FLAG -528 -112 1
FLAG -688 16 0
FLAG 688 48 0
TEXT -240 152 Left 2 !.param f0= 1k Q=.5
TEXT -520 272 Left 2 !.param R1=1k
TEXT -704 312 Left 2 !.param L1=R1*Q/(4*pi*f0)
TEXT -696 152 Left 2 ;Set notch frequency and quality factor
TEXT -696 272 Left 2 ;R1 is arbitary
TEXT -696 232 Left 2 ;This version puts 1/2 the R1 resistance in the capacitor
TEXT -704 344 Left 2 !.param C1=1/(L1*(2*pi*f0)**2)
TEXT 640 -128 Left 2 ;Vout
TEXT -640 -128 Right 2 ;Vin
TEXT -704 376 Left 2 !.ac dec 101 100 10k
TEXT 72 192 Left 2 !.param H=0.1
TEXT -696 192 Left 2 ;The parameter "H" is the gain at frequencies away from the notch
* Z:\home\khalils\Downloads\files\data\raw_asc\129648a0c45e_AFE_bandpass_v3.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac dec 100 1 100k
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
;step param R1 LIST 5.544 5.6 5.656
;step param L1 LIST 19.8u 22u 24.2u
;step param C1 LIST 0.95u 1u 1.05u
XU1 N002 N001 5V -5V OUT level2 Avol=1Meg GBW=33Meg Slew=11Meg Vos=5u Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V2 -5V 0 -5
C1 N002 0 13n
R2 N001 0 1k
V1 5V 0 5
R3 OUT N001 900k
L1 N002 0 2.2m
R1 N002 IN 309
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1364 680
WIRE 432 -64 368 -64
WIRE 592 -64 512 -64
WIRE 688 -64 592 -64
WIRE 832 -64 768 -64
WIRE 368 -16 368 -64
WIRE 592 80 592 -64
WIRE 688 80 592 80
WIRE 832 96 832 -64
WIRE 832 96 752 96
WIRE 928 96 832 96
WIRE 944 96 928 96
WIRE 272 112 240 112
WIRE 464 112 352 112
WIRE 592 112 464 112
WIRE 688 112 592 112
WIRE 464 160 464 112
WIRE 592 160 592 112
WIRE 464 272 464 240
WIRE 592 272 592 224
WIRE 592 272 464 272
WIRE 592 288 592 272
IOPIN 928 96 Out
IOPIN 240 112 In
SYMBOL voltage 880 -352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL cap 576 160 R0
SYMATTR InstName C1
SYMATTR Value 13n
SYMBOL ind 448 144 R0
SYMATTR InstName L1
SYMATTR Value 2.2m
SYMBOL res 528 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL OpAmps\\UniversalOpAmp2 720 96 R0
SYMATTR InstName U1
SYMATTR Value2 Avol=1Meg GBW=33Meg Slew=11Meg Vos=5u
SYMBOL res 368 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 309
SYMBOL res 784 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 900k
SYMBOL voltage 768 -352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 592 288 0
FLAG 368 -16 0
FLAG 768 -256 0
FLAG 880 -256 0
FLAG 720 64 5V
FLAG 768 -336 5V
FLAG 880 -336 -5V
FLAG 720 128 -5V
FLAG 928 96 OUT
FLAG 240 112 IN
TEXT 872 208 Left 2 ;.ac dec 100 1 100k
TEXT 880 256 Left 2 !;step param R1 LIST 5.544 5.6 5.656
TEXT 880 304 Left 2 !;step param L1 LIST 19.8u 22u 24.2u
TEXT 880 352 Left 2 !;step param C1 LIST 0.95u 1u 1.05u
* Z:\home\khalils\Downloads\files\data\raw_asc\748f9813cca8_MOSFET-Lambda.asc
* Generated by LTspice 26.0.1 for Windows.
+NSUB=9e14 LD=0.08e-6 UO=350 LAMBDA={LAM}
+TOX=9e-9 PB=0.9 CJ=0.56e-3 CJSW=0.35e-11
+MJ=0.45 MJSW=0.2 CGDO=0.4e-9 JS=1.0e-8
M1 N001 N002 0 0 N l=4u w=1u
VDS N001 0 5
VGS1 N002 0 3
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.MODEL N NMOS LEVEL=1 VTO=0.7 GAMMA=0.45 PHI=0.9
.dc VDS 0 5 0.1
.step PARAM LAM 0 0.2 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 -16 -304 -16
WIRE -32 16 -32 -16
WIRE -304 64 -304 -16
WIRE 32 64 -32 64
WIRE -80 96 -192 96
WIRE -192 112 -192 96
WIRE -304 224 -304 144
WIRE -272 224 -304 224
WIRE -192 224 -192 192
WIRE -192 224 -272 224
WIRE -32 224 -32 112
WIRE -32 224 -192 224
WIRE 32 224 32 64
WIRE 32 224 -32 224
WIRE -272 240 -272 224
SYMBOL voltage -192 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS1
SYMATTR Value 3
SYMBOL nmos4 -80 16 R0
SYMATTR InstName M1
SYMATTR Value N
SYMATTR Value2 l=4u w=1u
SYMBOL voltage -304 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 5
FLAG -272 240 0
TEXT 96 0 Left 2 !.MODEL N NMOS LEVEL=1 VTO=0.7 GAMMA=0.45 PHI=0.9\n+NSUB=9e14 LD=0.08e-6 UO=350 LAMBDA={LAM}\n+TOX=9e-9 PB=0.9 CJ=0.56e-3 CJSW=0.35e-11\n+MJ=0.45 MJSW=0.2 CGDO=0.4e-9 JS=1.0e-8
TEXT 96 136 Left 2 !.dc VDS 0 5 0.1
TEXT 96 176 Left 2 !.step PARAM LAM 0 0.2 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5674R.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5674R.asy)
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
XU1 vDAC Vdd 0 vOUT AD5674R Gain=2 ;pnba Vdac)Vdd)GND)Vout
V1 Vdd 0 5
CLOAD vOUT 0 10n
RLOAD vOUT 0 1k
.tran 50u
.lib AD5674R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 112 112 0 112
WIRE 192 112 112 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
SYMBOL AD5674R -208 112 R0
SYMATTR InstName U1
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -240 -80 Vdd
TEXT -160 312 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1521-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1521-5.asy)
Rload OUT 0 500
C1 OUT 0 1.5
V1 IN 0 PWL(0 0 1 10)
XU1 OUT OUT 0 MP_01 N001 MP_02 MP_03 IN LT1521-5 ;pnba OUT)Sense)GND))_SHDN)))IN
.tran 1
.lib LT1521.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 176 -192 176
WIRE 368 176 320 176
WIRE 432 176 368 176
WIRE 528 176 432 176
WIRE -192 192 -192 176
WIRE 432 192 432 176
WIRE 528 192 528 176
WIRE 32 272 16 272
WIRE 368 272 368 176
WIRE 368 272 320 272
WIRE -192 288 -192 272
WIRE 432 288 432 256
WIRE 528 288 528 272
WIRE 176 368 176 336
SYMBOL res 512 176 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT1521-5 176 224 R0
SYMATTR InstName U1
SYMBOL voltage -192 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 416 192 R0
SYMATTR InstName C1
SYMATTR Value 1.5
FLAG -192 288 0
FLAG 176 368 0
FLAG 432 288 0
FLAG 528 288 0
FLAG -192 176 IN
FLAG 528 176 OUT
TEXT 384 352 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\1f5e229e831c_previoP2.asc
* Generated by LTspice 26.0.1 for Windows.
R2 0 vOUT 1K
R1 vOUT N001 2.2k
V1 N001 0 10
R3 vOUT 0 {R}
.step param R list 1 10M 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 948 680
WIRE 256 64 112 64
WIRE 448 64 336 64
WIRE 576 64 448 64
WIRE 112 128 112 64
WIRE 448 128 448 64
WIRE 576 128 576 64
WIRE 112 272 112 208
WIRE 272 272 112 272
WIRE 448 272 448 208
WIRE 448 272 272 272
WIRE 576 272 576 208
WIRE 576 272 448 272
SYMBOL voltage 112 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 352 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2.2k
SYMBOL res 560 112 R0
SYMATTR InstName R3
SYMATTR Value {R}
SYMBOL res 464 224 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 1K
FLAG 272 272 0
FLAG 448 64 vOUT
TEXT 592 0 Left 2 !.step param R list 1 10M 100
* Z:\home\khalils\Downloads\files\data\raw_asc\0f9496cd191d_1992.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC1992.asy)
R2 N003 N002 30K
V3 N001 N007 SINE(0 0.5 10K)
V1 +V 0 2.7
R4 N005 N006 30K
R1 N002 N001 30K
C2 N005 0 10p
V2 -V 0 0
XU1 N002 N004 +V N003 N005 -V N004 N006 LTC1992 ;pnba IN-)VOCM)V+)OUT+)OUT-)V-)VMID)IN+
C1 N003 0 10p
R3 N006 N007 30K
.tran 1m
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 768
WIRE 16 336 -48 336
WIRE 192 336 96 336
WIRE 320 336 192 336
WIRE 432 336 400 336
WIRE 496 368 496 352
WIRE 240 400 240 384
WIRE -272 432 -272 400
WIRE -160 432 -160 400
WIRE -48 432 -48 336
WIRE 192 432 192 336
WIRE 208 432 192 432
WIRE 432 448 432 336
WIRE 432 448 368 448
WIRE 496 448 496 432
WIRE 496 448 432 448
WIRE 208 464 192 464
WIRE 192 496 192 464
WIRE 208 496 192 496
WIRE 432 512 368 512
WIRE 496 512 432 512
WIRE 208 528 192 528
WIRE 496 528 496 512
WIRE -272 544 -272 512
WIRE -160 544 -160 512
WIRE 240 576 240 560
WIRE 496 608 496 592
WIRE -48 624 -48 512
WIRE 16 624 -48 624
WIRE 192 624 192 528
WIRE 192 624 96 624
WIRE 304 624 192 624
WIRE 432 624 432 512
WIRE 432 624 384 624
SYMBOL voltage -160 416 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL LTC1992 272 480 R0
SYMATTR InstName U1
SYMBOL res 416 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 30K
SYMBOL voltage -48 416 R0
WINDOW 123 40 100 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 0.5 10K)
SYMBOL cap 480 432 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage -272 416 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.7
SYMBOL res 400 608 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 30K
SYMBOL cap 480 528 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL res 112 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 30K
SYMBOL res 112 608 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 30K
FLAG -272 544 0
FLAG -160 544 0
FLAG -272 400 +V
FLAG -160 400 -V
FLAG 496 352 0
FLAG 496 608 0
FLAG 240 384 +V
FLAG 240 576 -V
TEXT 608 576 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\0b1b2f786575_nand.asc
* Generated by LTspice 26.0.1 for Windows.
M2 VDD VIN2 VOUT VDD PMOS l=90n w=400n
M4 N001 VIN2 0 0 NMOS l=90n w=200n
M1 VDD VIN1 VOUT VDD PMOS l=90n w=400n
M3 VOUT VIN1 N001 0 NMOS l=90n w=200n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 884
WIRE 128 112 128 80
WIRE 128 112 112 112
WIRE 320 112 320 80
WIRE 336 112 320 112
WIRE 128 160 128 112
WIRE 128 160 112 160
WIRE 336 160 336 112
WIRE 336 160 320 160
WIRE 64 192 48 192
WIRE 272 192 256 192
WIRE 112 304 112 208
WIRE 240 304 112 304
WIRE 320 304 320 208
WIRE 320 304 240 304
WIRE 352 304 320 304
WIRE 240 320 240 304
WIRE 320 368 240 368
WIRE 192 400 176 400
WIRE 240 448 240 416
WIRE 256 496 240 496
WIRE 192 528 176 528
WIRE 256 544 256 496
WIRE 256 544 240 544
WIRE 320 544 320 368
WIRE 320 544 256 544
WIRE 256 576 256 544
IOPIN 48 192 In
IOPIN 256 192 In
IOPIN 176 400 In
IOPIN 176 528 In
IOPIN 128 80 In
IOPIN 352 304 Out
IOPIN 320 80 In
SYMBOL pmos4 272 112 R0
SYMATTR InstName M2
SYMATTR Value2 l=90n w=400n
SYMBOL nmos4 192 448 R0
SYMATTR InstName M4
SYMATTR Value2 l=90n w=200n
SYMBOL nmos4 192 320 R0
SYMATTR InstName M3
SYMATTR Value2 l=90n w=200n
SYMBOL pmos4 64 112 R0
SYMATTR InstName M1
SYMATTR Value2 l=90n w=400n
FLAG 48 192 VIN1
FLAG 256 192 VIN2
FLAG 256 576 0
FLAG 176 400 VIN1
FLAG 176 528 VIN2
FLAG 128 80 VDD
FLAG 352 304 VOUT
FLAG 320 80 VDD
* Z:\home\khalils\Downloads\files\data\raw_asc\2fd14b37bda1_Scematic01.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N003 0 AC 1
R100k N001 N003 R
XU1 N001 0 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R2 N002 N001 1Meg
.lib.opamp.sub
.dc V1 0 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 32 144 32
WIRE 320 32 288 32
WIRE 48 48 0 48
WIRE 0 128 0 48
WIRE 128 144 128 48
WIRE 144 144 144 32
WIRE 144 144 128 144
WIRE 160 144 144 144
WIRE 320 160 320 32
WIRE 320 160 224 160
WIRE 160 176 128 176
WIRE 128 208 128 176
SYMBOL Opamps\\opamp 192 96 R0
SYMATTR InstName U1
SYMBOL res 304 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1MEG
SYMBOL voltage 0 112 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL res 144 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName 100k
FLAG 0 208 0
FLAG 128 208 0
TEXT 176 288 Left 2 !.lib.opamp.sub
TEXT -34 308 Left 2 !.dc V1 0 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1506-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1506-3.3.asy)
XU1 IN N001 OUT 0 N004 N002 MP_01 N003 LT1506 top=1.82K bot=4.99K ;pnba Vin)Boost)Sense)GND)Vc)_SHDN))SW
L1 N003 OUT 5
C1 N004 0 .0015
D1 OUT N001 1N914
Rload OUT 0 1
C3 N001 N003 .68
D2 0 N003 MBRS340
V1 IN 0 5
C2 OUT 0 100 Rser=50m
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LT1506.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2864 1988
WIRE 1840 1088 1648 1088
WIRE 2128 1088 2000 1088
WIRE 2208 1088 2128 1088
WIRE 2320 1088 2272 1088
WIRE 1648 1104 1648 1088
WIRE 1840 1120 1840 1088
WIRE 2000 1120 2000 1088
WIRE 2128 1120 2128 1088
WIRE 1648 1200 1648 1184
WIRE 1760 1216 1744 1216
WIRE 2128 1216 2128 1184
WIRE 2128 1216 2080 1216
WIRE 2208 1216 2128 1216
WIRE 2320 1216 2320 1088
WIRE 2320 1216 2288 1216
WIRE 2384 1216 2320 1216
WIRE 2128 1232 2128 1216
WIRE 2384 1232 2384 1216
WIRE 2128 1312 2128 1296
WIRE 2384 1328 2384 1312
WIRE 1680 1344 1664 1344
WIRE 1760 1344 1744 1344
WIRE 2320 1344 2320 1216
WIRE 2320 1344 2080 1344
WIRE 2320 1360 2320 1344
WIRE 2320 1440 2320 1424
WIRE 1920 1488 1920 1440
SYMBOL cap 2112 1120 R0
SYMATTR InstName C3
SYMATTR Value .68
SYMBOL polcap 2304 1360 R0
SYMATTR SpiceLine Rser=50m
SYMATTR InstName C2
SYMATTR Value 100
SYMBOL VOLTAGE 1648 1088 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL diode 2272 1072 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL PowerProducts\\LT1506-3.3 1920 1280 R0
SYMATTR InstName U1
SYMBOL schottky 2112 1296 M180
WINDOW 0 39 59 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value MBRS340
SYMBOL ind 2192 1232 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 5
SYMBOL res 2368 1216 R0
SYMATTR InstName Rload
SYMATTR Value 1
SYMBOL cap 1744 1328 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .0015
FLAG 2320 1440 0
FLAG 1920 1488 0
FLAG 1664 1344 0
FLAG 1648 1200 0
FLAG 2384 1328 0
FLAG 2128 1312 0
FLAG 2384 1216 OUT
FLAG 1648 1088 IN
TEXT 2128 1480 Left 2 !.tran 500u startup