Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0e006c79e836_lamp1.asc
* Generated by LTspice 26.0.1 for Windows.
* .param Kc=120 Kf=.7p CTf=5m RTf=10k\n.param Ka=temp-kelvin; ambient temp in deg K
* .param Kc=120 Kf=.7p CTf=5m RTf=10k\n.param Ka=temp-Kelvin ; ambient temp converted to degrees K\nBCf 1 2 I=V(1,2)*Kc/V(Tf)**1.2 ; conductance of filament\nBTf 0 Tf I=V(1,2)*I(BCf)-Kf*(V(Tf)**4-{Ka**4}) ; temp of filament\nCfa Tf Ta {CTf} Rpar={RTf} ; thermal capacitance and res of filament\nVa Ta 0 {Ka} ; ambient temperature in degrees K
* Incandescent Lamp Model by analog@ieee.org
* Lamp 20W, 12V
* My guess is Ramb=Rn/10, but you can enter here your measured resistance
* if lamp is not powered(cold resistance).
*.PARAM Tfil=1800
*.PARAM Tfilk=Tfil+273.15
* Adjust time constant with CTf
BTf 0 Tfilk I=V(1,2)*I(BCf)-{Kf*(V(Tfilk)**4-V(tambk)**4)}
Va Tambk 0 {Tambk}
Cfa Tfilk Tambk {CTf} Rpar={RTf}
BCf 1 2 I=V(1,2)*Kc/V(Tfilk)**1.2
.PARAM Pn=20
.PARAM Vn=12
.PARAM Rn=Vn*Vn/Pn
.PARAM Ramb=Rn/10
.PARAM Tamb=25
.PARAM Tambk=Tamb+273.15
.PARAM Tfilk=Tambk*(Rn/Ramb)**(1/1.2)
.PARAM Kc=1/Ramb*Tambk**1.2
.PARAM Kf=(Pn+(Tambk-Tfilk)/RTF)/(Tfilk**4-Tambk**4)
.param CTf=100m RTf=1k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 680
WIRE 0 432 0 384
WIRE 0 304 0 256
WIRE 240 384 240 432
WIRE -256 256 -256 304
WIRE -256 384 -256 432
WIRE -256 432 -288 432
WIRE -288 256 -256 256
WIRE 240 256 240 304
WIRE 80 256 32 256
WIRE 240 256 208 256
WIRE 32 256 0 256
WIRE 208 256 144 256
IOPIN -288 256 In
IOPIN -288 432 In
SYMBOL voltage 240 288 R0
WINDOW 3 45 60 Left 0
SYMATTR Value {Tambk}
SYMATTR InstName Va
SYMBOL cap 80 272 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
WINDOW 39 -28 32 VBottom 0
SYMATTR InstName Cfa
SYMATTR Value {CTf}
SYMATTR SpiceLine Rpar={RTf}
SYMBOL bi -256 304 R0
WINDOW 3 41 -98 Center 0
SYMATTR Value I=V(1,2)*Kc/V(Tfilk)**1.2
SYMATTR InstName BCf
SYMBOL bi 0 384 R180
WINDOW 0 24 88 Left 0
WINDOW 3 50 199 Right 0
SYMATTR InstName BTf
SYMATTR Value I=V(1,2)*I(BCf)-{Kf*(V(Tfilk)**4-V(tambk)**4)}
FLAG 0 432 0
FLAG 240 432 0
FLAG 32 256 Tfilk
FLAG 208 256 Tambk
FLAG -288 256 1
FLAG -288 432 2
TEXT -392 64 Left 0 ;.param Kc=120 Kf=.7p CTf=5m RTf=10k\n.param Ka=temp-kelvin; ambient temp in deg K
TEXT -392 -120 Left 0 ;.param Kc=120 Kf=.7p CTf=5m RTf=10k\n.param Ka=temp-Kelvin ; ambient temp converted to degrees K\nBCf 1 2 I=V(1,2)*Kc/V(Tf)**1.2 ; conductance of filament\nBTf 0 Tf I=V(1,2)*I(BCf)-Kf*(V(Tf)**4-{Ka**4}) ; temp of filament\nCfa Tf Ta {CTf} Rpar={RTf} ; thermal capacitance and res of filament\nVa Ta 0 {Ka} ; ambient temperature in degrees K
TEXT -144 -152 Center 0 ;Incandescent Lamp Model by analog@ieee.org
TEXT -400 -680 Left 0 !* Lamp 20W, 12V\n.PARAM Pn=20\n.PARAM Vn=12\n.PARAM Rn=Vn*Vn/Pn\n* My guess is Ramb=Rn/10, but you can enter here your measured resistance\n* if lamp is not powered(cold resistance).\n.PARAM Ramb=Rn/10\n \n.PARAM Tamb=25\n.PARAM Tambk=Tamb+273.15\n*.PARAM Tfil=1800\n*.PARAM Tfilk=Tfil+273.15\n.PARAM Tfilk=Tambk*(Rn/Ramb)**(1/1.2)\n.PARAM Kc=1/Ramb*Tambk**1.2\n.PARAM Kf=(Pn+(Tambk-Tfilk)/RTF)/(Tfilk**4-Tambk**4)\n \n * Adjust time constant with CTf\n.param   CTf=100m RTf=1k
* Z:\home\khalils\Downloads\files\data\raw_asc\294d84797409_timer.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\NE555.asy)
C2 N005 0 10nF
R1 N001 N003 1K
XU1 0 N002 N004 N001 N005 N002 N003 N001 NE555 ;pnba GND)TRIG)OUT)RST)CV)THRS)DIS)Vcc
R2 N003 N002 1K
V1 N001 0 5
C1 N002 0 10nF
.tran 0 0.0001 0 1000
.lib NE555.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 -144 -64 -144
WIRE 352 -144 16 -144
WIRE 464 -144 352 -144
WIRE -64 -112 -64 -144
WIRE 464 48 464 -144
WIRE -64 64 -64 -32
WIRE 64 64 -64 64
WIRE 352 64 352 -144
WIRE 352 64 288 64
WIRE 64 128 -32 128
WIRE 400 128 288 128
WIRE 400 160 400 128
WIRE 464 160 464 128
WIRE 464 160 400 160
WIRE 464 176 464 160
WIRE 64 192 -224 192
WIRE 384 192 288 192
WIRE 16 256 16 -144
WIRE 64 256 16 256
WIRE 320 256 288 256
WIRE -32 304 -32 128
WIRE 384 304 384 192
WIRE 384 304 -32 304
WIRE 464 304 464 256
WIRE 464 304 384 304
WIRE 320 320 320 256
WIRE 464 320 464 304
WIRE -64 384 -64 64
WIRE 320 384 -64 384
WIRE 464 384 320 384
WIRE -64 416 -64 384
SYMBOL res 448 32 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -64 -128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL Misc\\NE555 176 160 R0
SYMATTR InstName U1
SYMBOL cap 448 320 R0
SYMATTR InstName C1
SYMATTR Value 10nF
SYMBOL cap 304 320 R0
SYMATTR InstName C2
SYMATTR Value 10nF
SYMBOL res 448 160 R0
SYMATTR InstName R2
SYMATTR Value 1K
FLAG -64 416 0
TEXT -416 440 Left 2 !.tran 0 0.0001 0 1000
* Z:\home\khalils\Downloads\files\data\raw_asc\184590ad99d7_connect-logic.asc
* Generated by LTspice 26.0.1 for Windows.
R4 N001 N002 100K
Q2 N002 N004 0 0 NPN
R1 N001 N003 100K
Q1 N002 N003 0 0 NPN
V1 N001 0 5
R2 N001 N002 100K
R3 N001 N004 100K
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 112 112 112
WIRE 320 112 192 112
WIRE 400 112 320 112
WIRE 528 112 400 112
WIRE 320 144 320 112
WIRE 528 144 528 112
WIRE 112 160 112 112
WIRE 192 208 192 112
WIRE 400 208 400 112
WIRE 320 256 320 224
WIRE 352 256 320 256
WIRE 528 256 528 224
WIRE 576 256 528 256
WIRE 112 272 112 240
WIRE 320 272 320 256
WIRE 528 272 528 256
WIRE 192 320 192 288
WIRE 256 320 192 320
WIRE 400 320 400 288
WIRE 464 320 400 320
WIRE 320 400 320 368
WIRE 528 400 528 368
WIRE 352 480 352 256
WIRE 576 480 576 256
WIRE 576 480 352 480
SYMBOL res 512 128 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL res 384 192 R0
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL npn 464 272 R0
SYMATTR InstName Q2
SYMBOL res 304 128 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL npn 256 272 R0
SYMATTR InstName Q1
SYMBOL voltage 112 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 176 192 R0
SYMATTR InstName R1
SYMATTR Value 100K
FLAG 112 272 0
FLAG 320 400 0
FLAG 192 384 0
FLAG 528 400 0
FLAG 400 384 0
TEXT 528 184 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\1c7e1a267cbf_stepping_models_1.asc
* Generated by LTspice 26.0.1 for Windows.
* Example provided by Mike Engelhardt from Linear Technology.
Q1 C B 0 0 {M}
I1 0 B 0
V1 C 0 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 3 1m I1 20u 100u 20u
.model 3 NPN(BF=100)
.model 4 NPN(BF=101)
.model 5 NPN(BF=102)
.STEP param M list 3 4 5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 384 32 368
WIRE 32 288 32 272
WIRE 32 272 128 272
WIRE 192 384 192 320
WIRE 192 224 192 192
WIRE 192 192 336 192
WIRE 336 192 336 224
WIRE 336 304 336 384
SYMBOL voltage 336 208 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL npn 128 224 R0
SYMATTR InstName Q1
SYMATTR Value {M}
SYMBOL current 32 368 M180
WINDOW 0 24 79 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName I1
SYMATTR Value 0
FLAG 192 384 0
FLAG 336 384 0
FLAG 32 384 0
FLAG 192 192 C
FLAG 32 272 B
TEXT 16 456 Left 0 !.dc V1 0 3 1m I1 20u 100u 20u
TEXT 520 200 Left 0 !.model 3 NPN(BF=100)
TEXT 520 232 Left 0 !.model 4 NPN(BF=101)
TEXT 520 264 Left 0 !.model 5 NPN(BF=102)
TEXT 520 320 Left 0 !.STEP param M list 3 4 5
TEXT 8 80 Left 0 ;Example provided by Mike Engelhardt from Linear Technology.
* Z:\tmp\asc_dec_bjh7r6w2\0dafc92e0d95_Draft9_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
XU4 N006 N008 VDDH 0 N008 OPA462 ;pnba In+)In-)V+)V-)OUT
Rb2 N005 N004 {Rb}
R2 N001 N002 4k
XU2 N006 N004 VDDH 0 N004 OPA462 ;pnba In+)In-)V+)V-)OUT
Rb3 N005 N007 {Rb}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1040 816
WIRE 176 -16 16 -16
WIRE -96 128 -208 128
WIRE 16 128 16 -16
WIRE 16 128 -16 128
WIRE 112 128 16 128
WIRE 368 144 368 -16
WIRE 368 144 176 144
WIRE 544 144 368 144
WIRE 64 160 -128 160
WIRE 112 160 64 160
WIRE -128 256 -128 160
WIRE 464 256 304 256
WIRE 304 352 304 256
WIRE 352 352 304 352
WIRE 464 368 464 256
WIRE 464 368 416 368
WIRE 544 368 464 368
WIRE 656 368 624 368
WIRE 352 384 272 384
WIRE 464 448 304 448
WIRE 304 544 304 448
WIRE 352 544 304 544
WIRE 464 560 464 448
WIRE 464 560 416 560
WIRE 544 560 464 560
WIRE 656 560 656 368
WIRE 656 560 624 560
WIRE 272 576 272 384
WIRE 352 576 272 576
WIRE 464 640 304 640
WIRE 304 736 304 640
WIRE 352 736 304 736
WIRE 464 752 464 640
WIRE 464 752 416 752
WIRE 544 752 464 752
WIRE 656 752 656 560
WIRE 272 768 272 576
WIRE 352 768 272 768
SYMBOL OpAmps\\opamp2 384 688 R0
SYMATTR InstName U4
SYMATTR Value OPA462
SYMBOL res 640 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rb2
SYMATTR Value {Rb}
SYMBOL res 0 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4k
SYMBOL OpAmps\\opamp2 384 304 R0
SYMATTR InstName U2
SYMATTR Value OPA462
SYMBOL res 640 544 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rb3
SYMATTR Value {Rb}
FLAG 64 160 in
FLAG 144 176 0
FLAG 144 112 VDDH
FLAG 384 336 VDDH
FLAG 384 400 0
FLAG 384 528 VDDH
FLAG 384 592 0
FLAG 384 720 VDDH
FLAG 384 784 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1173-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1173-5.asy)
V1 IN 0 3
D1 N001 OUT MBRS140
XU1 IN IN N001 0 0 MP_01 MP_02 OUT LT1173 top=753K bot=250K ;pnba Ilim)Vin)SW1)SW2)GND)))Sense
Rload OUT 0 25
L1 IN N001 100 Rser=0.02 Rpar=5000
C2 OUT 0 100 Rser=0.02
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m startup
.lib LT1173.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2528 1408
WIRE 1472 912 1328 912
WIRE 1600 912 1472 912
WIRE 1632 912 1600 912
WIRE 1744 912 1712 912
WIRE 1792 912 1744 912
WIRE 1888 912 1856 912
WIRE 1984 912 1888 912
WIRE 1328 928 1328 912
WIRE 1984 928 1984 912
WIRE 1472 960 1472 912
WIRE 1600 960 1600 912
WIRE 1328 1024 1328 1008
WIRE 1984 1024 1984 1008
WIRE 1744 1040 1744 912
WIRE 1744 1040 1664 1040
WIRE 1888 1104 1888 912
WIRE 1888 1104 1664 1104
WIRE 1888 1120 1888 1104
WIRE 1696 1168 1664 1168
WIRE 1888 1200 1888 1184
WIRE 1536 1264 1536 1248
SYMBOL PowerProducts\\LT1173-5 1536 1104 R0
SYMATTR InstName U1
SYMBOL IND 1616 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL VOLTAGE 1328 912 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL schottky 1792 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL POLCAP 1872 1120 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL res 1968 912 R0
SYMATTR InstName Rload
SYMATTR Value 25
FLAG 1536 1264 0
FLAG 1696 1168 0
FLAG 1984 1024 0
FLAG 1888 1200 0
FLAG 1328 1024 0
FLAG 1984 912 OUT
FLAG 1328 912 IN
TEXT 1712 1248 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3302A.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N003 OUT 680n Rser=2m
V1 IN 0 5
C1 OUT 0 22
R4 OUT N002 500K
Rload OUT 0 0.5
C2 N001 0 1
XU1 IN N001 N003 OUT 0 0 N001 N002 N001 LTC3302A Vout_trim=1.0 ;pnba VIN)EN)SW)VOUT)AGND)PGND)AVIN)PGOOD)MODE/SYNC
.tran 1.5m startup
* The output voltage is adjustable from \n0.5V to 3.65V in 50mV increments.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3302A.asy)
.lib LTC3302A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2652 1844
WIRE 1408 1248 1376 1248
WIRE 1712 1248 1408 1248
WIRE 1376 1264 1376 1248
WIRE 1712 1296 1712 1248
WIRE 1376 1360 1376 1344
WIRE 1520 1360 1456 1360
WIRE 1552 1360 1520 1360
WIRE 1904 1360 1872 1360
WIRE 2016 1360 1984 1360
WIRE 1456 1376 1456 1360
WIRE 1456 1456 1456 1440
WIRE 1520 1472 1520 1360
WIRE 1552 1472 1520 1472
WIRE 1904 1472 1872 1472
WIRE 2016 1472 2016 1360
WIRE 2016 1472 1984 1472
WIRE 2080 1472 2016 1472
WIRE 2128 1472 2080 1472
WIRE 2176 1472 2128 1472
WIRE 2080 1488 2080 1472
WIRE 2176 1488 2176 1472
WIRE 1520 1584 1520 1472
WIRE 1552 1584 1520 1584
WIRE 2016 1584 2016 1472
WIRE 2016 1584 1872 1584
WIRE 2080 1584 2080 1552
WIRE 2176 1584 2176 1568
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1376 1360 0
FLAG 2176 1584 0
FLAG 2080 1584 0
FLAG 1408 1248 IN
FLAG 2128 1472 OUT
FLAG 1456 1456 0
SYMBOL ind 1888 1488 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 680n
SYMATTR SpiceLine Rser=2m
SYMBOL VOLTAGE 1376 1248 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2064 1488 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 2000 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 500K
SYMBOL res 2160 1472 R0
SYMATTR InstName Rload
SYMATTR Value 0.5
SYMBOL cap 1440 1376 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL LTC3302A 1712 1456 R0
WINDOW 39 -94 371 Center 2
SYMATTR InstName U1
TEXT 2024 1736 Left 2 !.tran 1.5m startup
TEXT 1528 1768 Left 2 ;The output voltage is adjustable from \n0.5V to 3.65V in 50mV increments.
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2503-4.2.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 N002 1.5 Rser=80m
C1 OUT 0 10
V1 IN 0 3.3
Rload OUT 0 50
XU1 N001 N002 OUT IN IN 0 OUT NC_01 ADP2503-4.2 ;pnba SW1)SW2)FB)EN)PVin)GND)Vout)Sync
.tran 400u startup
* PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2503-4.2.asy)
.lib ADP2503-4.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 48 64 32 64
WIRE 336 64 304 64
WIRE -64 80 -64 64
WIRE 32 144 32 64
WIRE 48 144 32 144
WIRE 336 144 304 144
WIRE -64 176 -64 160
WIRE 320 224 304 224
WIRE 368 224 320 224
WIRE 480 224 368 224
WIRE 368 240 368 224
WIRE 480 240 480 224
WIRE 48 304 32 304
WIRE 320 304 320 224
WIRE 320 304 304 304
WIRE 368 336 368 304
WIRE 480 336 480 320
FLAG 368 336 0
FLAG 32 304 0
FLAG -64 176 0
FLAG 480 336 0
FLAG -64 64 IN
FLAG 480 224 OUT
SYMBOL ind 320 48 R0
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=80m
SYMBOL cap 352 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage -64 64 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 464 224 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL ADP2503-4.2 176 176 R0
SYMATTR InstName U1
TEXT 432 392 Left 2 !.tran 400u startup
TEXT 192 8 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\10b4692862b3_AM-FM-signals-sources.asc
* Generated by LTspice 26.0.1 for Windows.
* How to generate AM and FM modulated signal for RF testing
B2 AM_modulated_output 0 V=V(modulating_signal)*sin(50*3.14158*2*time)
B1 FM_modulated_output 0 V=sin(V(modulating_signal)*3.14158*2*time)
V1 modulating_signal 0 SINE(10 10 1)
.tran 0 5 0 0.1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1576 680
WIRE 32 176 32 96
WIRE 352 176 352 96
WIRE 960 192 960 112
WIRE 32 320 32 256
WIRE 352 320 352 256
WIRE 960 336 960 272
SYMBOL voltage 32 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(10 10 1)
SYMBOL bv 960 176 R0
SYMATTR InstName B2
SYMATTR Value V=V(modulating_signal)*sin(50*3.14158*2*time)
SYMBOL bv 352 160 R0
SYMATTR InstName B1
SYMATTR Value V=sin(V(modulating_signal)*3.14158*2*time)
FLAG 32 320 0
FLAG 352 320 0
FLAG 32 96 modulating_signal
FLAG 960 336 0
FLAG 352 96 FM_modulated_output
FLAG 960 112 AM_modulated_output
TEXT 1088 384 Left 2 !.tran 0 5 0 0.1m
TEXT 440 -264 Left 4 ;How to generate AM and FM modulated signal for RF testing
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1173.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 0 250K
R2 OUT N002 753K
L1 IN N001 100 Rser=0.02 Rpar=5000
D1 N001 OUT MBRS140
C1 OUT 0 100 Rser=0.02
V1 IN 0 3
XU1 IN IN N001 0 0 MP_01 MP_02 N002 LT1173 top=1K bot=1T ;pnba Ilim)Vin)SW1)SW2)GND)))FB
Rload OUT 0 50
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1173.asy)
.lib LT1173.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2528 1408
WIRE 1472 912 1344 912
WIRE 1600 912 1472 912
WIRE 1632 912 1600 912
WIRE 1744 912 1712 912
WIRE 1792 912 1744 912
WIRE 1904 912 1856 912
WIRE 2016 912 1904 912
WIRE 2128 912 2016 912
WIRE 1344 928 1344 912
WIRE 2016 928 2016 912
WIRE 2128 928 2128 912
WIRE 1904 944 1904 912
WIRE 1472 960 1472 912
WIRE 1600 960 1600 912
WIRE 1344 1024 1344 1008
WIRE 2016 1024 2016 992
WIRE 2128 1024 2128 1008
WIRE 1744 1040 1744 912
WIRE 1744 1040 1664 1040
WIRE 1904 1104 1904 1024
WIRE 1904 1104 1664 1104
WIRE 1904 1120 1904 1104
WIRE 1696 1168 1664 1168
WIRE 1904 1216 1904 1200
WIRE 1536 1264 1536 1248
FLAG 1536 1264 0
FLAG 1696 1168 0
FLAG 1904 1216 0
FLAG 2128 1024 0
FLAG 2016 1024 0
FLAG 1344 1024 0
FLAG 2128 912 OUT
FLAG 1344 912 IN
SYMBOL RES 1888 1104 R0
SYMATTR InstName R1
SYMATTR Value 250K
SYMBOL RES 1888 928 R0
SYMATTR InstName R2
SYMATTR Value 753K
SYMBOL IND 1616 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL schottky 1792 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL POLCAP 2000 928 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL VOLTAGE 1344 912 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL POWERPRODUCTS\\LT1173 1536 1104 R0
SYMATTR InstName U1
SYMBOL RES 2112 912 R0
SYMATTR InstName Rload
SYMATTR Value 50
TEXT 1704 1256 Left 2 !.tran 100m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1178.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1178.asy)
V3 N003 0 SINE(1.25 .1 1K)
R1 N002 N001 5K
XU1 N003 N001 +V 0 N002 LT1178 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
R2 N001 0 5K
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -192 176 -192 160
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 160 256 0 256
WIRE -192 272 -192 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(1.25 .1 1K)
SYMBOL opamps\\LT1178 192 176 R0
SYMATTR InstName U1
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL voltage -192 160 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -192 272 0
FLAG 192 192 +V
FLAG -192 160 +V
FLAG 16 96 0
FLAG 0 368 0
FLAG 192 288 0
TEXT 248 320 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\2123b365e203_RL-passalto.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N002 10k
V1 N001 0 AC 1
L1 N002 0 1
.ac oct 100 1 1000k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 224 64 224
WIRE 352 224 272 224
WIRE 64 256 64 224
WIRE 352 256 352 224
WIRE 64 384 64 336
WIRE 176 384 64 384
WIRE 352 384 352 336
WIRE 352 384 176 384
WIRE 176 416 176 384
SYMBOL voltage 64 240 R0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL ind 336 240 R0
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL res 176 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 10k
FLAG 176 416 0
TEXT 72 480 Left 2 !.ac oct 100 1 1000k
* Z:\home\khalils\Downloads\files\data\raw_asc\21c29345cc48_simulacion.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 N003 4.7k
V1 N001 N003 10v
R1 N002 N001 10k
R3 N002 N003 3.3k
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 96 80 -32 80
WIRE 272 80 176 80
WIRE 416 80 272 80
WIRE -32 128 -32 80
WIRE 272 144 272 80
WIRE 416 144 416 80
WIRE -32 256 -32 208
WIRE 272 256 272 224
WIRE 272 256 -32 256
WIRE 416 256 416 224
WIRE 416 256 272 256
SYMBOL res 192 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -32 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10v
SYMBOL res 400 128 R0
SYMATTR InstName R3
SYMATTR Value 3.3k
SYMBOL res 256 128 R0
SYMATTR InstName R2
SYMATTR Value 4.7k
* Z:\home\khalils\Downloads\files\data\raw_asc\353102dbec1d_Simulation.asc
* Generated by LTspice 26.0.1 for Windows.
D4 N002 N003 1N914
D3 N001 N002 1N914
D5 N003 N004 1N914
RLoad N004 N005 1k
D1 N001 0 1N914
D2 0 N003 1N914
DLED N001 N005 NSPW500BS
VPiezo N002 0 SINE(0 5)
C1 N001 N004 47F
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc Piezo 0 5 2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 400 -400 80 -400
WIRE 224 -368 -80 -368
WIRE 400 -304 400 -400
WIRE 544 -304 400 -304
WIRE 80 -288 80 -400
WIRE 128 -288 80 -288
WIRE 224 -288 224 -368
WIRE 224 -288 192 -288
WIRE -80 -256 -80 -368
WIRE 80 -240 80 -288
WIRE 224 -240 224 -288
WIRE 400 -208 400 -304
WIRE 544 -208 544 -304
WIRE 544 -192 544 -208
WIRE 80 -128 80 -176
WIRE 128 -128 80 -128
WIRE 224 -128 224 -176
WIRE 224 -128 192 -128
WIRE -80 -80 -80 -176
WIRE 80 -80 80 -128
WIRE 80 -80 -80 -80
WIRE 224 -64 224 -128
WIRE 272 -64 224 -64
WIRE 400 -64 400 -144
WIRE 400 -64 336 -64
WIRE 432 -64 400 -64
WIRE 544 -64 544 -144
WIRE 544 -64 512 -64
WIRE -80 -48 -80 -80
SYMBOL LED 528 -208 R0
SYMATTR InstName LED
SYMATTR Value NSPW500BS
SYMBOL cap 384 -208 R0
SYMATTR InstName C1
SYMATTR Value 47ľF
SYMBOL voltage -80 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Piezo
SYMATTR Value SINE(0 5)
SYMBOL diode 64 -240 R0
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL diode 272 -48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D5
SYMATTR Value 1N914
SYMBOL diode 128 -112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL res 416 -48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Load
SYMATTR Value 1k
SYMBOL diode 208 -240 R0
SYMATTR InstName D4
SYMATTR Value 1N914
SYMBOL diode 128 -272 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D3
SYMATTR Value 1N914
FLAG -80 -48 0
TEXT -112 -16 Left 2 !.dc Piezo 0 5 2