Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1767-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1767-3.3.asy)
D2 OUT N001 1N914
R3 N005 N004 1K
V1 IN 0 5
Rload OUT 0 3
C2 N001 N002 .1
L1 N002 OUT 5
C3 N005 0 4000p
D1 0 N002 MBRS130L
XU1 N001 IN N002 0 N003 OUT N004 LT1767-x.x top=17K bot=10K ;pnba Boost)Vin)SW)GND)_SHDN)FB)Vc
C1 OUT 0 2.2
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100u startup
.lib LT1767-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2972 1416
WIRE 2160 912 1824 912
WIRE 2224 912 2160 912
WIRE 2336 912 2288 912
WIRE 2160 928 2160 912
WIRE 1824 992 1824 912
WIRE 2160 1008 2160 992
WIRE 2160 1008 2128 1008
WIRE 2224 1008 2160 1008
WIRE 2336 1008 2336 912
WIRE 2336 1008 2304 1008
WIRE 2400 1008 2336 1008
WIRE 2400 1024 2400 1008
WIRE 1680 1056 1568 1056
WIRE 2128 1056 2128 1008
WIRE 2128 1056 1968 1056
WIRE 2160 1056 2160 1008
WIRE 1568 1072 1568 1056
WIRE 1680 1120 1664 1120
WIRE 2128 1120 1968 1120
WIRE 2400 1120 2400 1104
WIRE 2160 1136 2160 1120
WIRE 1568 1168 1568 1152
WIRE 2128 1168 2128 1120
WIRE 2336 1168 2336 1008
WIRE 2336 1168 2128 1168
WIRE 1984 1184 1968 1184
WIRE 2080 1184 2064 1184
WIRE 2080 1200 2080 1184
WIRE 2336 1200 2336 1168
WIRE 1824 1264 1824 1248
WIRE 2080 1280 2080 1264
WIRE 2336 1280 2336 1264
SYMBOL schottky 2144 1120 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS130L
SYMBOL cap 2064 1200 R0
SYMATTR InstName C3
SYMATTR Value 4000p
SYMBOL ind 2208 1024 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 5
SYMBOL diode 2288 896 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL res 2384 1008 R0
SYMATTR InstName Rload
SYMATTR Value 3
SYMBOL RES 2080 1168 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL VOLTAGE 1568 1056 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2144 928 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL cap 2320 1200 R0
WINDOW 3 27 60 Left 2
SYMATTR Value 2.2
SYMATTR InstName C1
SYMBOL PowerProducts\\LT1767-3.3 1824 1120 R0
SYMATTR InstName U1
FLAG 2080 1280 0
FLAG 1824 1264 0
FLAG 2160 1136 0
FLAG 2336 1280 0
FLAG 1568 1168 0
FLAG 2400 1120 0
FLAG 2400 1008 OUT
FLAG 1568 1056 IN
TEXT 2120 1344 Left 2 !.tran 100u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\c100ecb70805_90nm_NMOS.asc
* Generated by LTspice 26.0.1 for Windows.
Vgs N001 0 1.2
Vds D 0 1.2
M1 D N001 0 0 NMOS l=90nm w=135nm
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc vgs 0 1.2 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 -16 96 -16
WIRE 96 0 96 -16
WIRE 240 16 240 -16
WIRE 144 48 96 48
WIRE 48 80 -16 80
WIRE -16 112 -16 80
WIRE 96 112 96 96
WIRE 144 112 144 48
WIRE 144 112 96 112
WIRE 240 112 240 96
WIRE 240 112 144 112
WIRE -16 128 -16 112
WIRE 96 128 96 112
WIRE -16 240 -16 192
SYMBOL voltage 240 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vds
SYMATTR Value 1.2
SYMBOL voltage -16 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vgs
SYMATTR Value 1.2
SYMBOL nmos4 48 0 R0
SYMATTR InstName M1
SYMATTR Value2 l=90nm w=135nm
FLAG 96 128 0
FLAG -16 240 0
FLAG 96 -16 D
TEXT -48 264 Left 2 !.dc vgs 0 1.2 0.2
* Z:\home\khalils\Downloads\files\data\raw_asc\45499092219c_Draft9.asc
* Generated by LTspice 26.0.1 for Windows.
C1 vout 0 50f
V2 N001 0 1.2
V1 vin 0
M2 N001 vin vout N001 PMOS l=90nm w=Wp
M1 vout vin 0 0 NMOS l=90nm w=Wn
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.step param Wn 135nm 225nm 45nm
.step param Wp 405nm 495nm 45nm
.dc V1 0 1.2 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 32 192 32
WIRE 368 32 240 32
WIRE 192 48 192 32
WIRE 368 80 368 32
WIRE 240 96 240 32
WIRE 240 96 192 96
WIRE 144 128 128 128
WIRE 128 144 128 128
WIRE 128 144 16 144
WIRE 16 160 16 144
WIRE 368 176 368 160
WIRE 464 176 368 176
WIRE 192 192 192 144
WIRE 352 192 192 192
WIRE 400 192 352 192
WIRE 464 192 464 176
WIRE 352 208 352 192
WIRE 224 240 192 240
WIRE 400 256 400 192
WIRE 432 256 400 256
WIRE 128 272 128 144
WIRE 144 272 128 272
WIRE 16 288 16 240
WIRE 224 288 224 240
WIRE 224 288 192 288
WIRE 352 304 352 272
WIRE 384 304 352 304
WIRE 192 320 192 288
WIRE 384 320 384 304
IOPIN 432 256 Out
IOPIN 16 144 In
SYMBOL voltage 368 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.2
SYMBOL pmos4 144 48 R0
SYMATTR InstName M2
SYMATTR Value2 l=90nm w=Wp
SYMBOL cap 336 208 R0
SYMATTR InstName C1
SYMATTR Value 50f
SYMBOL nmos4 144 192 R0
SYMATTR InstName M1
SYMATTR Value2 l=90nm w=Wn
SYMBOL voltage 16 144 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
FLAG 192 320 0
FLAG 464 192 0
FLAG 384 320 0
FLAG 432 256 vout
FLAG 16 144 vin
FLAG 16 288 0
TEXT 328 16 Left 2 !.step param Wn 135nm 225nm 45nm
TEXT 416 112 Left 2 !.step param Wp 405nm 495nm 45nm
TEXT -24 24 Left 2 !.dc V1 0 1.2 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\920c2e0e9294_Single-phase-rectifier-constant-voltage-load.asc
* Generated by LTspice 26.0.1 for Windows.
* Maximum load voltage so that we have continuous conduction mode: \n \nVs = RMS value of sinusoidal voltage source \nVo_max = (2*sqrt(2)*Vs/pi) / sqrt(1+4/pi^2)
* Single phase AC/DC converter (rectifier)
D2 0 N004 D
D3 N004 N001 D
L1 N002 N003 10m
D1 N003 N001 D
V2 N001 0 200
D4 0 N003 D
V1 N002 N004 SINE(0 325 50)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1420 680
WIRE 208 -32 64 -32
WIRE 352 -32 208 -32
WIRE 64 32 64 -32
WIRE 208 32 208 -32
WIRE 352 112 352 -32
WIRE -112 128 -256 128
WIRE 64 128 64 96
WIRE 64 128 -32 128
WIRE -256 144 -256 128
WIRE -256 240 -256 224
WIRE 208 240 208 96
WIRE 208 240 -256 240
WIRE 64 256 64 128
WIRE 208 256 208 240
WIRE 64 368 64 320
WIRE 208 368 208 320
WIRE 208 368 64 368
WIRE 352 368 352 192
WIRE 352 368 208 368
WIRE 64 384 64 368
SYMBOL diode 224 320 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMBOL diode 80 96 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL voltage -256 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 325 50)
SYMBOL ind -128 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10m
SYMBOL diode 224 96 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMBOL voltage 352 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 200
SYMBOL diode 80 320 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
FLAG 64 384 0
TEXT -136 16 Left 2 !.tran 30m
TEXT 472 40 Left 2 ;Maximum load voltage so that we have continuous conduction mode: \n \nVs = RMS value of sinusoidal voltage source \nVo_max = (2*sqrt(2)*Vs/pi) / sqrt(1+4/pi^2)
TEXT -16 -104 Left 2 ;Single phase AC/DC converter (rectifier)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1959.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1959.asy)
D1 OUT N001 1N914
C1 N004 0 1500p
D2 0 N003 MBRS340
Rload OUT 0 .5
XU1 IN N001 N005 0 N004 N002 N006 N003 LT1959 ;pnba VIN)Boost)FB)GND)VC)_SHDN)SYNC)SW
V2 N006 0 PULSE(0 1.6 10n 10n 10n .5u 1.5u)
V1 IN 0 5
R1 OUT N005 1.21K
C3 N001 N003 .68
L1 N003 OUT 5
R2 N005 0 2.49K
C2 OUT 0 100 Rser=50m
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LT1959.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2856 1568
WIRE 1840 1088 1664 1088
WIRE 2144 1088 2000 1088
WIRE 2224 1088 2144 1088
WIRE 2336 1088 2288 1088
WIRE 1664 1104 1664 1088
WIRE 1840 1120 1840 1088
WIRE 2000 1120 2000 1088
WIRE 2144 1136 2144 1088
WIRE 1664 1200 1664 1184
WIRE 1760 1216 1744 1216
WIRE 2144 1216 2144 1200
WIRE 2144 1216 2080 1216
WIRE 2224 1216 2144 1216
WIRE 2336 1216 2336 1088
WIRE 2336 1216 2304 1216
WIRE 2464 1216 2336 1216
WIRE 2592 1216 2464 1216
WIRE 2144 1232 2144 1216
WIRE 2336 1232 2336 1216
WIRE 2464 1232 2464 1216
WIRE 2592 1232 2592 1216
WIRE 2144 1312 2144 1296
WIRE 2464 1328 2464 1296
WIRE 2592 1328 2592 1312
WIRE 1680 1344 1664 1344
WIRE 1760 1344 1744 1344
WIRE 2336 1344 2336 1312
WIRE 2336 1344 2080 1344
WIRE 2336 1376 2336 1344
WIRE 2000 1456 2000 1440
WIRE 2336 1472 2336 1456
WIRE 1712 1504 1680 1504
WIRE 1840 1504 1840 1440
WIRE 1840 1504 1792 1504
SYMBOL res 2576 1216 R0
SYMATTR InstName Rload
SYMATTR Value .5
SYMBOL cap 1744 1328 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1500p
SYMBOL diode 2288 1072 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL polcap 2448 1232 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=50m
SYMBOL ind 2208 1232 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 5
SYMBOL VOLTAGE 1664 1088 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2128 1136 R0
SYMATTR InstName C3
SYMATTR Value .68
SYMBOL VOLTAGE 1808 1504 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1.6 10n 10n 10n .5u 1.5u)
SYMBOL LT1959 1920 1280 R0
SYMATTR InstName U1
SYMBOL RES 2320 1216 R0
SYMATTR InstName R1
SYMATTR Value 1.21K
SYMBOL res 2320 1360 R0
SYMATTR InstName R2
SYMATTR Value 2.49K
SYMBOL schottky 2128 1296 M180
WINDOW 0 30 65 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value MBRS340
FLAG 2464 1328 0
FLAG 2336 1472 0
FLAG 2000 1456 0
FLAG 1664 1344 0
FLAG 1664 1200 0
FLAG 2592 1328 0
FLAG 2144 1312 0
FLAG 2592 1216 OUT
FLAG 1664 1088 IN
FLAG 1680 1504 0
TEXT 2456 1408 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8602.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8602.asy)
V1 +V 0 2.5
R1 N001 0 10K
V2 -V 0 -2.5
Vin IN 0 SINE(0 1 100K)
XU1 IN N001 +V -V OUT AD8602 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 10K
Rload OUT 0 10K
.tran 100u
.lib AD8602.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 272 -944 256 -944
WIRE 368 -944 352 -944
WIRE 384 -944 368 -944
WIRE 480 -944 464 -944
WIRE 32 -832 32 -848
WIRE 144 -832 144 -848
WIRE 368 -832 368 -944
WIRE 384 -832 368 -832
WIRE 480 -816 480 -944
WIRE 480 -816 448 -816
WIRE 608 -816 480 -816
WIRE 384 -800 272 -800
WIRE 608 -800 608 -816
WIRE 272 -784 272 -800
WIRE 32 -736 32 -752
WIRE 144 -736 144 -752
WIRE 608 -704 608 -720
WIRE 272 -688 272 -704
SYMBOL voltage 144 -848 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL Opamps\\AD8602 416 -880 R0
SYMATTR InstName U1
SYMBOL res 368 -960 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 32 -848 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 272 -800 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100K)
SYMBOL res 480 -960 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 592 -816 R0
SYMATTR InstName Rload
SYMATTR Value 10K
FLAG 32 -848 +V
FLAG 32 -736 0
FLAG 272 -688 0
FLAG 608 -816 OUT
FLAG 272 -800 IN
FLAG 416 -848 +V
FLAG 144 -848 -V
FLAG 416 -784 -V
FLAG 256 -944 0
FLAG 608 -704 0
FLAG 144 -736 0
TEXT 528 -608 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1844-SD.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1844-SD.asy)
C1 OUT 0 1
R3 N001 0 100k
XU1 IN 0 IN N001 OUT LTC1844-SD ;pnba IN)GND)_SHDN)ADJ)OUT
V1 IN 0 PWL(0 0 1 6.5)
R2 OUT N001 301k
Rload OUT 0 34
.tran 1
.lib LTC1844-SD.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1940 1316
WIRE 64 80 -32 80
WIRE 80 80 64 80
WIRE 416 80 368 80
WIRE 528 80 416 80
WIRE 608 80 528 80
WIRE -32 96 -32 80
WIRE 608 96 608 80
WIRE 416 112 416 80
WIRE 528 112 528 80
WIRE -32 192 -32 176
WIRE 528 192 528 176
WIRE 608 192 608 176
WIRE 64 240 64 80
WIRE 80 240 64 240
WIRE 416 240 416 192
WIRE 416 240 368 240
WIRE 416 256 416 240
WIRE 224 304 224 288
WIRE 416 352 416 336
SYMBOL LTC1844-SD 224 160 R0
SYMATTR InstName U1
SYMBOL res 400 240 R0
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 400 96 R0
SYMATTR InstName R2
SYMATTR Value 301k
SYMBOL cap 512 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -32 80 R0
WINDOW 3 -89 162 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PWL(0 0 1 6.5)
SYMATTR InstName V1
SYMBOL res 592 80 R0
SYMATTR InstName Rload
SYMATTR Value 34
FLAG 224 304 0
FLAG -32 192 0
FLAG 608 192 0
FLAG 608 80 OUT
FLAG -32 80 IN
FLAG 528 192 0
FLAG 416 352 0
TEXT 184 368 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4605.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4605.asy)
Rload OUT 0 2.4
XU1 N009 OUT 0 N001 IN N002 N003 N003 0 N006 N004 N010 N005 N011 IN N007 N008 0 0 NC_01 LTM4605 ;pnba FB)Vout)SGND)SW2)Vin)SW1)Rsense)Sense+)Sense-)Pgood)INTVcc)PLLFLTR)STBYMD)SS)Run)Comp)PLLIN)FCB)PGND)EXTVcc
R2 0 N009 7.15K
C2 N011 0 .002
L1 N001 N002 4.7
C1 OUT 0 100
R3 N006 N004 100K
V1 IN 0 15
R1 N003 0 6m
.tran 100m startup
.lib LTM4605.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 992 680
WIRE 208 -96 176 -96
WIRE 320 -96 288 -96
WIRE 176 -48 176 -96
WIRE 320 -48 320 -96
WIRE 32 16 -80 16
WIRE 64 16 32 16
WIRE 560 16 448 16
WIRE 656 16 560 16
WIRE -80 32 -80 16
WIRE 560 32 560 16
WIRE 656 32 656 16
WIRE 32 80 32 16
WIRE 64 80 32 80
WIRE 464 80 448 80
WIRE -80 128 -80 112
WIRE 560 128 560 96
WIRE 656 128 656 112
WIRE 480 144 448 144
WIRE 512 144 480 144
WIRE 512 160 512 144
WIRE 64 208 -48 208
WIRE 480 208 480 144
WIRE 480 208 448 208
WIRE -48 240 -48 208
WIRE 64 272 48 272
WIRE 512 272 512 240
WIRE 512 272 448 272
WIRE 512 288 512 272
WIRE -48 336 -48 320
WIRE 64 336 -48 336
WIRE 464 336 448 336
WIRE 64 400 48 400
WIRE 464 400 448 400
WIRE 560 400 544 400
WIRE 64 464 48 464
WIRE 496 464 448 464
WIRE 496 480 496 464
WIRE 176 544 176 528
WIRE 320 544 320 528
WIRE 496 560 496 544
SYMBOL cap 544 32 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMBOL PowerProducts\\LTM4605 256 240 R0
SYMATTR InstName U1
SYMBOL res -64 336 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 480 480 R0
SYMATTR InstName C2
SYMATTR Value .002
SYMBOL ind 192 -80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL res 560 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 7.15K
SYMBOL res 640 16 R0
SYMATTR InstName Rload
SYMATTR Value 2.4
SYMBOL res 496 144 R0
SYMATTR InstName R1
SYMATTR Value 6m
SYMBOL voltage -80 16 R0
SYMATTR InstName V1
SYMATTR Value 15
FLAG 464 80 0
FLAG 560 128 0
FLAG 656 128 0
FLAG 560 400 0
FLAG 512 288 0
FLAG 320 544 0
FLAG 176 544 0
FLAG -80 128 0
FLAG 496 560 0
FLAG -80 16 IN
FLAG 656 16 OUT
TEXT 584 480 Left 2 !.tran 100m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\097057c10774_LT1260.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1260.asy)
XU1 IN N001 +V -V OUT LT1259 ;pnba In+)In-)V+)V-)OUT
R1 OUT N001 1.6K
V2 -V 0 -5
V3 IN 0 SINE(0 1 1K)
R2 N001 0 1.6K
V1 +V 0 5
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -288 144 -288 128
WIRE -160 144 -160 128
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE -288 240 -288 224
WIRE -160 240 -160 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 288 240 256 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1.6K
SYMBOL voltage -288 128 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1.6K
SYMBOL opamps\\LT1260 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -160 128 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -160 240 0
FLAG 192 192 +V
FLAG -160 128 +V
FLAG 192 288 -V
FLAG -288 240 0
FLAG -288 128 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 288 240 OUT
FLAG 0 256 IN
TEXT 264 336 Left 2 !.tran 3m
* Z:\tmp\asc_dec_bjh7r6w2\075fbc4ac33a_1126_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V3 IN 0 ac 1
V2 -V 0 -15
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE -208 112 -208 96
WIRE -112 112 -112 96
WIRE -208 208 -208 192
WIRE -112 208 -112 192
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL voltage -208 96 R0
SYMATTR InstName V2
SYMATTR Value -15
FLAG -112 208 0
FLAG 192 192 +V
FLAG -112 96 +V
FLAG 192 288 -V
FLAG -208 208 0
FLAG -208 96 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 0 256 IN
* Z:\home\khalils\Downloads\files\data\raw_asc\1cfb54b001bd_cauer_o.asc
* Generated by LTspice 26.0.1 for Windows.
L2 N002 0 5 Rser=0
L1 N001 0 1.25 Rser=0
C1 N001 Vi 0.666
C2 N002 N001 0.08
V1 Vi 0 AC 1
.ac dec 1000 1m 10
.net V(vi) V1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 80 -48 80
WIRE 192 80 112 80
WIRE 272 80 192 80
WIRE 400 80 336 80
WIRE -48 112 -48 80
WIRE 192 112 192 80
WIRE 400 112 400 80
WIRE -48 224 -48 192
WIRE 192 224 192 192
WIRE 192 224 -48 224
WIRE 400 224 400 192
WIRE 400 224 192 224
WIRE -48 240 -48 224
SYMBOL ind 384 96 R0
SYMATTR InstName L2
SYMATTR Value 5
SYMATTR SpiceLine Rser=0
SYMBOL cap 336 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 0.08
SYMBOL voltage -48 96 R0
WINDOW 123 18 106 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL cap 112 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.666
SYMBOL ind 176 96 R0
SYMATTR InstName L1
SYMATTR Value 1.25
SYMATTR SpiceLine Rser=0
FLAG -48 240 0
FLAG -48 80 Vi
TEXT -336 184 Left 2 !.ac dec 1000 1m 10
TEXT -336 216 Left 2 !.net V(vi) V1
* Z:\home\khalils\Downloads\files\data\raw_asc\6f1a88ef4a2d_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 l 0 1k
D1 k l 1N4148
V1 k 0 {v}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -10 0 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 -16 48 -16
WIRE 48 16 48 -16
WIRE 128 80 128 -16
WIRE 128 80 96 80
WIRE 192 80 128 80
WIRE 352 80 272 80
WIRE 96 96 96 80
WIRE 352 96 352 80
WIRE 352 176 352 160
WIRE 352 176 96 176
FLAG 352 176 k
FLAG 352 80 l
FLAG 48 16 0
SYMBOL res 288 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 368 160 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 96 192 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {v}
TEXT 56 200 Left 2 !.dc V1 -10 0 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6993-3.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 0 243K
R2 N002 N004 1000K
R3 N004 0 392K
R4 OUT 0 100K
V1 N002 0 5
V2 N001 0 PULSE(0 3.3 0.25m 1n 1n 2m 15m 3)
XU1 N001 0 N003 N004 N002 OUT LTC6993-3 ;pnba TRIG)GND)SET)DIV)V+)OUT
.tran 60m startup
* LTC6993-3 Non-Retriggerable 20ms One Shot\nFalling Edge Triggered, Positive Output Pulse\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6993-3.asy)
.lib LTC6993-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -224 96 -240 96
WIRE 96 96 -144 96
WIRE 656 96 320 96
WIRE 656 112 656 96
WIRE 96 176 64 176
WIRE 400 176 320 176
WIRE 560 176 400 176
WIRE 400 192 400 176
WIRE 560 192 560 176
WIRE 656 208 656 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 352 256 320 256
WIRE 352 288 352 256
WIRE 400 288 400 272
WIRE 400 288 352 288
WIRE 560 288 560 272
WIRE 400 304 400 288
WIRE 400 400 400 384
FLAG -240 96 0
FLAG 560 288 0
FLAG 656 96 OUT
FLAG 656 208 0
FLAG 400 400 0
FLAG -16 256 0
FLAG 64 176 0
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 243K
SYMBOL res 384 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL res 384 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
SYMBOL res 640 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL voltage 560 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -128 96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0.25m 1n 1n 2m 15m 3)
SYMATTR InstName V2
SYMBOL SpecialFunctions\\LTC6993-3 208 176 R0
SYMATTR InstName U1
TEXT 520 392 Left 2 !.tran 60m startup
TEXT 216 48 Bottom 2 ;LTC6993-3 Non-Retriggerable 20ms One Shot\nFalling Edge Triggered, Positive Output Pulse\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7156-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7156-3.0.asy)
C3 N004 0 1
XU1 OUT MP_01 OUT N002 N001 N003 N003 N004 IN 0 ADP7156_7 Vreg=3.611 Vref=3.016 ;pnba Vout))Vout_Sense)Byp)EN)Ref_Sense)Ref)Vreg)Vin)GND
C2 N003 0 1
C1 OUT 0 10
C4 N002 0 1 Rser=10m Lser=1n
V1 IN 0 3.8
R1 IN N001 100K
Rload OUT 0 3
.tran 5m startup
.lib ADP7156_7.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -160 32
WIRE 80 32 -32 32
WIRE 416 32 400 32
WIRE 464 32 416 32
WIRE 560 32 464 32
WIRE -160 48 -160 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE 416 128 416 32
WIRE 416 128 400 128
WIRE -160 144 -160 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE 0 224 -16 224
WIRE 80 224 64 224
WIRE 416 224 400 224
WIRE 464 224 416 224
WIRE 464 240 464 224
WIRE 0 320 -16 320
WIRE 80 320 64 320
WIRE 416 320 416 224
WIRE 416 320 400 320
WIRE 464 320 464 304
WIRE 240 400 240 384
SYMBOL cap 448 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL cap 64 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMATTR Value2 Rser=10m
SYMATTR SpiceLine Lser=1n
SYMBOL voltage -160 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.8
SYMBOL res 544 32 R0
SYMATTR InstName Rload
SYMATTR Value 3
SYMBOL cap 448 240 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL ADP7156-3.0 240 176 R0
SYMATTR InstName U1
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100K
FLAG 240 400 0
FLAG 464 320 0
FLAG 464 144 0
FLAG -16 320 0
FLAG -16 224 0
FLAG -160 144 0
FLAG 560 144 0
FLAG -160 32 IN
FLAG 560 32 OUT
TEXT 504 368 Left 2 !.tran 5m startup