Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2120-1.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2120-1.0.asy)
C2 OUT 0 22
V1 IN 0 5
L1 N002 OUT 1.5
C1 OUT 0 22
Rload OUT 0 1
R1 OUT N001 100K
XU1 IN IN N002 0 0 OUT IN N001 IN IN ADP2120-1.0 ;pnba Vin)Pvin)SW)PGND)GND)FB)TRK)Pgood)Sync/Mode)EN
.tran 1m
.lib ADP2120-1.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 0 48 0
WIRE 288 0 128 0
WIRE 48 16 48 0
WIRE 288 16 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 688 64 576 64
WIRE 48 112 48 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 624 144 560 144
WIRE 688 144 688 64
WIRE 688 144 624 144
WIRE 752 144 688 144
WIRE 560 160 560 144
WIRE 624 160 624 144
WIRE 752 160 752 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 624 224 560 224
WIRE 560 256 560 224
WIRE 752 256 752 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 688 304 688 144
WIRE 688 304 416 304
WIRE 288 368 288 352
SYMBOL voltage 48 0 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.5
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL ADP2120-1.0 288 272 R0
SYMATTR InstName U1
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 736 144 R0
SYMATTR Value 1
SYMATTR InstName Rload
SYMBOL cap 608 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C2
SYMATTR Value 22
FLAG 560 256 0
FLAG 288 368 0
FLAG 48 112 0
FLAG 752 144 OUT
FLAG 752 256 0
FLAG 48 0 IN
TEXT 504 344 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\1a2a6dab3e95_LogAmp.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001A.asy)
V1 N001 0 15
R2 N005 0 1k
V3 N004 0 1 AC 1
R1 N002 N004 1k
D2 N002 N003 1N914
V2 0 N006 15
XU1 N005 N002 N001 N006 N003 LT1001 ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V3 0 10 1m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 768 -192 320 -192
WIRE 208 -48 160 -48
WIRE 448 -48 272 -48
WIRE 768 32 768 -192
WIRE 320 80 320 -192
WIRE 16 96 -32 96
WIRE 32 96 16 96
WIRE 160 96 160 -48
WIRE 160 96 96 96
WIRE 288 96 160 96
WIRE 448 112 448 -48
WIRE 448 112 352 112
WIRE 288 128 224 128
WIRE 768 128 768 112
WIRE -32 144 -32 96
WIRE 224 144 224 128
WIRE 768 144 768 128
WIRE 224 256 224 224
WIRE -32 272 -32 224
WIRE 320 432 320 144
WIRE 768 432 768 224
WIRE 768 432 320 432
SYMBOL res 208 128 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 768 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL diode 208 -32 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL voltage 768 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage -32 128 R0
WINDOW 0 -72 56 Left 2
WINDOW 3 -301 -26 Invisible 2
WINDOW 123 -79 100 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 1
SYMATTR Value2 AC 1
SYMBOL res 112 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL Opamps\\LT1001A 320 48 R0
SYMATTR InstName U1
FLAG -32 272 0
FLAG 768 128 0
FLAG 224 256 0
TEXT -200 -48 Left 2 !.dc V3 0 10 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\abd349e5af71_transistor_vth.asc
* Generated by LTspice 26.0.1 for Windows.
* .step param Vgate 0.0V 3V 0.2V
Rthresh_res thresh_current 0 100
I1 0 thresh_current {vth_current}
V1 N001 0 10mV
M19 ds gate 0 gate pmos l=access_tran_L w=access_tran_W
R2 N001 ds 100
V2 N002 0 PULSE(0 30 0 1 0 0 1)
R1 N002 gate 1k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include ../DRAM_models/transistor_model.pm
.tran 1
.param access_tran_L={85nm*access_tran_L_factor}
.param access_tran_W={55nm*access_tran_W_factor}
.param access_tran_L_factor={0.95**tech_node}
.param access_tran_W_factor={0.85**tech_node}
.param tech_node=7
.param vth_current={(access_tran_W/access_tran_L)*100nA}
.OPTIONS plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4232 2520
WIRE -2240 -736 -2432 -736
WIRE -2432 -704 -2432 -736
WIRE -2240 -688 -2240 -736
WIRE -2384 -576 -2432 -576
WIRE -2704 -544 -2816 -544
WIRE -2560 -544 -2624 -544
WIRE -2512 -544 -2560 -544
WIRE -2480 -544 -2512 -544
WIRE -2816 -480 -2816 -544
WIRE -2432 -464 -2432 -528
WIRE -2512 -400 -2512 -544
WIRE -2384 -400 -2384 -576
WIRE -2384 -400 -2512 -400
WIRE -2800 -144 -2896 -144
WIRE -2800 -128 -2800 -144
WIRE -2896 -48 -2896 -144
WIRE -2800 -16 -2800 -48
WIRE -2896 16 -2896 -48
SYMBOL res -2720 -528 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res -2448 -720 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL nmos4 -2480 -624 R0
WINDOW 0 104 24 Invisible 2
WINDOW 3 179 41 Invisible 2
SYMATTR InstName M19
SYMATTR Value pmos
SYMATTR Value2 l=access_tran_L w=access_tran_W
SYMBOL voltage -2240 -704 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 10mV
SYMBOL res -2816 -144 R0
SYMATTR InstName thresh_res
SYMATTR Value 100
SYMBOL voltage -2816 -496 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 30 0 1 0 0 1)
SYMBOL current -2896 96 M180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value {vth_current}
FLAG -2240 -608 0
FLAG -2432 -464 0
FLAG -2816 -400 0
FLAG -2432 -624 ds
FLAG -2560 -544 gate
FLAG -2896 96 0
FLAG -2800 -16 0
FLAG -2896 -48 thresh_current
TEXT -2360 -264 Left 2 !.include ../DRAM_models/transistor_model.pm
TEXT -2352 -296 Left 2 !.tran 1
TEXT -2352 -224 Left 2 ;.step param Vgate 0.0V 3V 0.2V
TEXT -2352 -80 Left 2 !.param access_tran_L={85nm*access_tran_L_factor}
TEXT -2352 -48 Left 2 !.param access_tran_W={55nm*access_tran_W_factor}
TEXT -2352 8 Left 2 !.param access_tran_L_factor={0.95**tech_node}
TEXT -2352 40 Left 2 !.param access_tran_W_factor={0.85**tech_node}
TEXT -2344 -120 Left 2 !.param tech_node=7
TEXT -2352 96 Left 2 !.param vth_current={(access_tran_W/access_tran_L)*100nA}
TEXT -2352 -184 Left 2 !.OPTIONS plotwinsize=0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1307B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1307b.asy)
XU1 N003 N004 IN 0 N001 IN N005 N006 LT1307B ;pnba Vc)FB)_SHDN)GND)SW)Vin)LBI)LBO
R1 OUT N004 1Meg
V1 IN 0 1.8
C2 OUT 0 33 Rser=0.02
R2 N004 0 324K
R3 N003 N002 100K
L1 IN N001 10 Rser=0.02 Rpar=5000
D1 N001 OUT MBRS140
Rload OUT 0 100
C1 N002 0 680p
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LT1307B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1716 968
WIRE 528 464 416 464
WIRE 704 464 528 464
WIRE 752 464 704 464
WIRE 880 464 832 464
WIRE 928 464 880 464
WIRE 1040 464 992 464
WIRE 1168 464 1040 464
WIRE 1264 464 1168 464
WIRE 416 480 416 464
WIRE 1168 480 1168 464
WIRE 1264 480 1264 464
WIRE 704 512 704 464
WIRE 1040 512 1040 464
WIRE 416 576 416 560
WIRE 528 576 528 464
WIRE 560 576 528 576
WIRE 880 576 880 464
WIRE 880 576 848 576
WIRE 1168 576 1168 544
WIRE 1264 576 1264 560
WIRE 464 656 432 656
WIRE 560 656 544 656
WIRE 1040 656 1040 592
WIRE 1040 656 848 656
WIRE 432 672 432 656
WIRE 1040 672 1040 656
WIRE 560 736 544 736
WIRE 864 736 848 736
WIRE 432 752 432 736
WIRE 1040 768 1040 752
WIRE 704 816 704 800
SYMBOL VOLTAGE 416 464 R0
WINDOW 3 26 94 Left 2
SYMATTR Value 1.8
SYMATTR InstName V1
SYMBOL SCHOTTKY 928 480 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL IND 736 480 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL CAP 416 672 R0
SYMATTR InstName C1
SYMATTR Value 680p
SYMBOL RES 1024 656 R0
SYMATTR InstName R2
SYMATTR Value 324K
SYMBOL RES 560 640 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL PowerProducts\\LT1307B 704 656 R0
SYMATTR InstName U1
SYMBOL POLCAP 1152 480 R0
SYMATTR InstName C2
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02
SYMBOL RES 1248 464 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL RES 1024 496 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
FLAG 1264 464 OUT
FLAG 1040 768 0
FLAG 1168 576 0
FLAG 1264 576 0
FLAG 432 752 0
FLAG 416 576 0
FLAG 704 816 0
FLAG 416 464 IN
TEXT 960 824 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0134c8312490_3_pmos_.asc
* Generated by LTspice 26.0.1 for Windows.
M2 DS N002 0 N001 CMOSP l=0.18u w=1.8u ad=0.81p as=0.81p pd=4.5u ps=4.5u
VDS DS 0 50m
VBS N001 0 -900m
VGS N002 0 V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC_180nm.txt
.dc VGS 0 1.8 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1012 680
WIRE 496 64 336 64
WIRE 496 80 496 64
WIRE 496 192 496 160
WIRE 336 240 336 64
WIRE 512 288 336 288
WIRE 288 320 176 320
WIRE 176 352 176 320
WIRE 512 448 512 288
WIRE 176 496 176 432
WIRE 336 496 336 336
WIRE 336 496 176 496
WIRE 336 560 336 496
WIRE 512 576 512 528
SYMBOL pmos4 288 240 R0
SYMATTR InstName M2
SYMATTR Value CMOSP
SYMATTR Value2 l=0.18u w=1.8u ad=0.81p as=0.81p pd=4.5u ps=4.5u
SYMBOL voltage 496 64 R0
SYMATTR InstName VDS
SYMATTR Value 50m
SYMBOL voltage 512 432 R0
SYMATTR InstName VBS
SYMATTR Value -900m
SYMBOL voltage 176 336 R0
SYMATTR InstName VGS
FLAG 336 560 0
FLAG 512 576 0
FLAG 496 192 0
FLAG 496 64 DS
TEXT 616 192 Left 2 !.include TSMC_180nm.txt
TEXT 624 256 Left 2 !.dc VGS 0 1.8 0.05
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3048.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3048.asy)
Rload OUT 0 167
R1 OUT N004 301K
C2 OUT N003 .1n
C1 N001 0 4.7
L1 IN N002 5.6 Rser=.12
R2 N004 0 100K
V1 IN 0 3.2
C3 OUT 0 1 Rser=10m
XU1 N002 IN 0 N003 OUT N004 IN N001 LT3048 ;pnba SW)Vin)GND)BYP)LDOOUT)FB)EN)BSTOUT
.tran 1m startup
.lib LT3048.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 -16 256 -32
WIRE 256 64 256 48
WIRE 112 128 80 128
WIRE 448 128 400 128
WIRE 512 128 448 128
WIRE 624 128 512 128
WIRE 704 128 624 128
WIRE 448 144 448 128
WIRE 624 144 624 128
WIRE 704 144 704 128
WIRE 512 208 512 128
WIRE 80 224 80 208
WIRE 80 224 -32 224
WIRE 112 224 80 224
WIRE 448 224 448 208
WIRE 448 224 400 224
WIRE -32 240 -32 224
WIRE 624 240 624 208
WIRE 704 240 704 224
WIRE 80 320 80 224
WIRE 112 320 80 320
WIRE 512 320 512 288
WIRE 512 320 400 320
WIRE -32 336 -32 320
WIRE 256 400 256 384
WIRE 512 416 512 400
SYMBOL res 688 128 R0
SYMATTR InstName Rload
SYMATTR Value 167
SYMBOL voltage -32 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3.2
SYMBOL res 496 192 R0
SYMATTR InstName R1
SYMATTR Value 301K
SYMBOL res 496 304 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL cap 240 48 M180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL cap 432 144 R0
SYMATTR InstName C2
SYMATTR Value .1n
SYMBOL PowerProducts\\LT3048 256 224 R0
SYMATTR InstName U1
SYMBOL cap 608 144 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMATTR SpiceLine Rser=10m
SYMBOL ind 96 224 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value 5.6
SYMATTR SpiceLine Rser=.12
FLAG 256 400 0
FLAG -32 336 0
FLAG 256 -32 0
FLAG 624 240 0
FLAG 704 240 0
FLAG -32 224 IN
FLAG 704 128 OUT
FLAG 512 416 0
TEXT 568 432 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\13187c68b54b_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
V2 N002 0 0
Q1 N001 N002 0 0 2N2369
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V2 0.7 0.85 0.0001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 680
WIRE 576 96 336 96
WIRE 272 144 128 144
WIRE 128 176 128 144
WIRE 368 192 336 192
WIRE 368 224 368 192
SYMBOL npn 272 96 R0
SYMATTR InstName Q1
SYMATTR Value 2N2369
SYMBOL voltage 128 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage 576 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 576 176 0
FLAG 368 224 0
FLAG 128 256 0
TEXT 696 -8 Left 2 !.dc V2 0.7 0.85 0.0001
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2050HV.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 2.5
V2 -V 0 -2.5
V3 N003 0 SINE(0 1 1K)
R1 N002 N001 10K
R2 N001 0 10K
XU1 N003 N001 +V -V N002 NC_01 LTC2050 ;pnba In+)In-)V+)V-)OUT)SHDN
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC2050HV.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -48 -64 -64 -64
WIRE 48 -64 32 -64
WIRE 112 -64 48 -64
WIRE 224 -64 192 -64
WIRE -288 16 -288 0
WIRE -160 16 -160 0
WIRE 48 64 48 -64
WIRE 64 64 48 64
WIRE 224 96 224 -64
WIRE 224 96 208 96
WIRE -288 112 -288 96
WIRE -160 112 -160 96
WIRE 64 128 -96 128
WIRE -96 160 -96 128
WIRE 96 192 96 176
WIRE -96 256 -96 240
FLAG -160 112 0
FLAG 96 16 +V
FLAG -160 0 +V
FLAG 96 192 -V
FLAG -288 112 0
FLAG -288 0 -V
FLAG -96 256 0
FLAG -64 -64 0
SYMBOL voltage -160 0 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage -288 0 R0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL voltage -96 144 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 208 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 48 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL opamps\\LTC2050HV 96 96 R0
SYMATTR InstName U1
TEXT 224 240 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3311S.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3311S.asy)
R1 OUT N004 562K
C2 N003 0 4.7n
C5 OUT N004 10p
R2 N004 0 100K
R4 N006 N005 1K
R3 OUT N001 500K
Rload OUT 0 0.3
V1 IN 0 5
C3 N005 0 1500p
R5 N007 0 274K
XU1 IN IN N002 N004 0 0 N007 N001 IN N006 N003 LTC3311S ;pnba VIN)EN)SW)FB)AGND)PGND)RT)PGOOD)MODE/SYNC)ITH)SSTT
C1 OUT 0 22 m=2 Rser=10m
L1 N002 OUT 200n Rser=2m
.tran 1.2m startup
.step temp list 25 100 150
.lib LTC3311S.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2648 1864
WIRE 1408 1248 1376 1248
WIRE 1520 1248 1408 1248
WIRE 1712 1248 1520 1248
WIRE 1376 1280 1376 1248
WIRE 1712 1280 1712 1248
WIRE 1520 1328 1520 1248
WIRE 1552 1328 1520 1328
WIRE 1904 1328 1872 1328
WIRE 2016 1328 1984 1328
WIRE 1376 1376 1376 1360
WIRE 1520 1424 1520 1328
WIRE 1552 1424 1520 1424
WIRE 1904 1424 1872 1424
WIRE 2016 1424 2016 1328
WIRE 2016 1424 1984 1424
WIRE 2144 1424 2016 1424
WIRE 2256 1424 2144 1424
WIRE 2336 1424 2256 1424
WIRE 2384 1424 2336 1424
WIRE 2144 1440 2144 1424
WIRE 2256 1440 2256 1424
WIRE 2384 1440 2384 1424
WIRE 1424 1520 1408 1520
WIRE 1552 1520 1488 1520
WIRE 2016 1520 2016 1504
WIRE 2016 1520 1872 1520
WIRE 2144 1520 2144 1504
WIRE 2144 1520 2016 1520
WIRE 2016 1536 2016 1520
WIRE 2256 1536 2256 1504
WIRE 2384 1536 2384 1520
WIRE 1424 1616 1360 1616
WIRE 1552 1616 1504 1616
WIRE 1904 1616 1872 1616
WIRE 1360 1632 1360 1616
WIRE 1904 1632 1904 1616
WIRE 2016 1632 2016 1616
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
WIRE 1360 1712 1360 1696
WIRE 1904 1728 1904 1712
SYMBOL cap 2240 1440 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 m=2
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine Rser=10m
SYMBOL res 1520 1600 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL LTC3311S 1712 1456 R0
SYMATTR InstName U1
SYMBOL cap 1344 1632 R0
SYMATTR InstName C3
SYMATTR Value 1500p
SYMBOL res 2000 1312 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 500K
SYMBOL ind 1888 1440 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 200n
SYMATTR SpiceLine Rser=2m
SYMBOL VOLTAGE 1376 1264 R0
SYMATTR Value 5
SYMATTR InstName V1
SYMBOL res 2368 1424 R0
SYMATTR InstName Rload
SYMATTR Value 0.3
SYMBOL RES 2000 1408 R0
SYMATTR InstName R1
SYMATTR Value 562K
SYMBOL cap 2128 1440 R0
SYMATTR InstName C5
SYMATTR Value 10p
SYMBOL res 1888 1616 R0
SYMATTR InstName R5
SYMATTR Value 274K
SYMBOL res 2000 1520 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL cap 1488 1504 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1376 1376 0
FLAG 2384 1536 0
FLAG 2016 1632 0
FLAG 1408 1520 0
FLAG 2336 1424 OUT
FLAG 1408 1248 IN
FLAG 1360 1712 0
FLAG 2256 1536 0
FLAG 1904 1728 0
TEXT 2104 1760 Left 2 !.tran 1.2m startup
TEXT 2104 1720 Left 2 !.step temp list 25 100 150
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP122-2.7.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP122-2.7.asy)
C2 OUT 0 1
V1 IN 0 5.5
C1 IN 0 1
Rload OUT 0 100
XU1 OUT MP_01 0 IN MP_02 IN ADP122 K=1/5400 ;pnba Vout))GND)En))Vin
.tran 10m startup
.lib ADP122.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL ADP122-2.7 256 208 R0
SYMATTR InstName U1
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP166-2.85.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP165-2.85.asy)
Rload OUT 0 285
V1 IN 0 5
XU1 IN 0 N001 OUT ADP16xfd K=350.9u ;pnba Vin)GND)En)Vout
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
C1 OUT 0 1
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 416 96 352 96
WIRE 512 96 416 96
WIRE -64 112 -64 96
WIRE 416 112 416 96
WIRE 512 112 512 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 416 208 416 176
WIRE 512 208 512 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL ADP165-2.85 256 208 R0
SYMATTR InstName U1
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 285
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -64 208 0
FLAG 256 272 0
FLAG 416 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\f410f62417ec_exp-3lpf.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
V1 N001 0 SINE(0 1 1k) AC 1
XU1 N004 N002 vcc vee N003 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
C1 N002 0 47n
V2 vcc 0 14
V3 0 vee 14
R3 N003 N004 10k
R2 N004 0 1k
R1 N002 N001 20k
.ac dec 10 10 30k
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 112 80 112
WIRE 240 112 208 112
WIRE 320 112 240 112
WIRE 240 128 240 112
WIRE 464 128 384 128
WIRE 320 144 304 144
WIRE 80 160 80 112
WIRE 512 176 512 160
WIRE 592 176 512 176
WIRE 512 192 512 176
WIRE 240 208 240 192
WIRE 592 208 592 176
WIRE 304 224 304 144
WIRE 384 224 304 224
WIRE 464 224 464 128
WIRE 80 256 80 240
SYMBOL res 288 208 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 480 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL voltage 512 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 14
SYMBOL Opamps\\UniversalOpamp2 352 128 R0
SYMATTR InstName U1
SYMBOL voltage 80 144 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1k)
SYMATTR Value2 AC 1
SYMBOL res 224 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20k
SYMBOL cap 224 128 R0
SYMATTR InstName C1
SYMATTR Value 47n
SYMBOL voltage 512 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 14
FLAG 80 256 0
FLAG 240 208 0
FLAG 304 304 0
FLAG 592 208 0
FLAG 352 96 vcc
FLAG 512 80 vcc
FLAG 352 160 vee
FLAG 512 272 vee
TEXT 46 360 Left 2 !.ac dec 10 10 30k
* Z:\home\khalils\Downloads\files\data\raw_asc\3b4a4f3b3f59_lab1Scheme.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N004 990.3
R2 N003 N002 50.42k
XU1 0 N002 N001 N005 N003 LT1097 ;pnba In+)In-)V+)V-)OUT
V1 N001 0 12
V2 0 N005 12
V3 N004 0 SINE(0 80m 1k) AC 1
;dc V3 -400m 400m .1m
;tran 10ms
.ac dec 100 1 10e6
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1097.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 916 680
WIRE 560 -272 384 -272
WIRE 256 -192 192 -192
WIRE 432 -192 336 -192
WIRE 560 -160 560 -272
WIRE 384 -96 384 -272
WIRE 384 -96 304 -96
WIRE 304 -48 304 -96
WIRE -48 -32 -368 -32
WIRE 192 -32 192 -192
WIRE 192 -32 32 -32
WIRE 272 -32 192 -32
WIRE 432 -16 432 -192
WIRE 432 -16 336 -16
WIRE 560 -16 560 -80
WIRE 912 -16 560 -16
WIRE 272 0 192 0
WIRE -368 32 -368 -32
WIRE 560 48 560 -16
WIRE 304 192 304 16
WIRE 560 192 560 128
WIRE 560 192 304 192
WIRE -368 432 -368 112
WIRE 192 432 192 0
WIRE 192 432 -368 432
WIRE 912 432 912 -16
WIRE 912 432 192 432
WIRE 192 480 192 432
FLAG 192 480 0
SYMBOL res 48 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 990.3
SYMBOL res 352 -208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50.42k
SYMBOL OpAmps\\LT1097 304 -80 R0
SYMATTR InstName U1
SYMBOL Misc\\battery 560 -176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL Misc\\battery 560 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL voltage -368 16 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value SINE(0 80m 1k)
TEXT -736 224 Left 2 !;dc V3 -400m 400m .1m
TEXT -728 32 Left 2 !;tran 10ms
TEXT -712 112 Left 2 !.ac dec 100 1 10e6