Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3251.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3251.asy)
XU1 N004 IN N001 N002 0 N005 OUT N003 IN N006 LTC3251 ;pnba MD0)Vin)C1+)C1-)GND)C2-)Vout)C2+)MD1)FB
C1 N003 N005 1
V1 IN 0 5
C3 OUT 0 10 Rser=0.01
R2 OUT N006 475K
R1 N006 0 536K
C2 N001 N002 1
Rload OUT 0 25
.tran .5m startup
.lib LTC3251.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 1320
WIRE 96 832 0 832
WIRE 336 832 96 832
WIRE 0 848 0 832
WIRE 336 864 336 832
WIRE 192 912 144 912
WIRE 592 912 480 912
WIRE 704 912 592 912
WIRE 800 912 704 912
WIRE 800 928 800 912
WIRE 0 944 0 928
WIRE 704 944 704 912
WIRE 592 960 592 912
WIRE 192 976 144 976
WIRE 512 976 480 976
WIRE 704 1024 704 1008
WIRE 800 1024 800 1008
WIRE 192 1040 176 1040
WIRE 512 1040 480 1040
WIRE 96 1104 96 832
WIRE 192 1104 96 1104
WIRE 592 1104 592 1040
WIRE 592 1104 480 1104
WIRE 592 1120 592 1104
WIRE 336 1168 336 1152
WIRE 592 1216 592 1200
SYMBOL cap 496 976 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 784 912 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL POWERPRODUCTS\\LTC3251 336 1008 R0
SYMATTR InstName U1
SYMBOL cap 688 944 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMATTR SpiceLine Rser=0.01
SYMBOL res 576 944 R0
SYMATTR InstName R2
SYMATTR Value 475K
SYMBOL cap 128 912 R0
WINDOW 0 31 19 Left 2
WINDOW 3 30 49 Left 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL VOLTAGE 0 832 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 576 1104 R0
SYMATTR InstName R1
SYMATTR Value 536K
FLAG 336 1168 0
FLAG 592 1216 0
FLAG 800 1024 0
FLAG 704 1024 0
FLAG 0 944 0
FLAG 800 912 OUT
FLAG 0 832 IN
TEXT 640 1096 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0050549bc95a_2_Rev1.asc
* Generated by LTspice 26.0.1 for Windows.
L4 N002 N001 {34/27}
C3 N001 N003 {3/2}
R1 N002 0 1
C1 N002 0 {1/2}
L3 N003 0 {2/27}
I1 0 N001 AC 1 0
.param f = w/(2*pi)
.step dec param w 0.001 10000 100
.ac list {f}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 932 680
WIRE -32 64 -144 64
WIRE 48 64 -32 64
WIRE 192 64 128 64
WIRE 304 64 192 64
WIRE -32 80 -32 64
WIRE -144 144 -144 64
WIRE 192 144 192 64
WIRE 304 144 304 64
WIRE -32 192 -32 144
WIRE -144 336 -144 224
WIRE -32 336 -32 272
WIRE -32 336 -144 336
WIRE 192 336 192 208
WIRE 192 336 -32 336
WIRE 304 336 304 224
WIRE 304 336 192 336
SYMBOL ind -48 176 R0
SYMATTR InstName L3
SYMATTR Value {2/27}
SYMBOL cap -48 80 R0
SYMATTR InstName C3
SYMATTR Value {3/2}
SYMBOL cap 176 144 R0
SYMATTR InstName C1
SYMATTR Value {1/2}
SYMBOL res 288 128 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL current -144 224 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 24 -28 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMBOL ind 144 48 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L4
SYMATTR Value {34/27}
FLAG 192 336 0
TEXT -136 368 Left 2 !.param f = w/(2*pi)\n.step dec param w 0.001 10000 100\n.ac list {f}
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1787.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1787.asy)
V4 N002 0 5
R3 N002 N001 1.6m
V1 N003 0 1.25
XU1 NC_01 N001 0 Vout N003 N002 NC_02 LT1787 ;pnba FIL-)Vs-)VEE)Vout)Vbias)Vs+)FIL+
I1 N001 0 PULSE(-100 100 10u 200u 200u 200u 600u)
.tran 600u
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -608 -144 -640 -144
WIRE -288 -144 -528 -144
WIRE -160 -144 -288 -144
WIRE 48 -144 -80 -144
WIRE 160 -144 48 -144
WIRE 160 -128 160 -144
WIRE 160 -32 160 -48
WIRE -288 32 -288 -144
WIRE -240 32 -288 32
WIRE 48 32 48 -144
WIRE 48 32 16 32
WIRE 240 96 16 96
WIRE 240 112 240 96
WIRE -240 160 -272 160
WIRE 48 160 16 160
WIRE 240 208 240 192
SYMBOL res -64 -160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1.6m
SYMBOL voltage 240 96 R0
SYMATTR InstName V1
SYMATTR Value 1.25
SYMBOL current -528 -144 R90
WINDOW 0 -32 40 VBottom 2
WINDOW 3 32 40 VTop 2
WINDOW 123 74 40 VTop 2
WINDOW 39 53 40 VTop 2
SYMATTR InstName I1
SYMATTR Value PULSE(-100 100 10u 200u 200u 200u 600u)
SYMBOL voltage 160 -144 R0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL LT1787 -112 64 R0
SYMATTR InstName U1
FLAG -272 160 0
FLAG 160 -32 0
FLAG -640 -144 0
FLAG 240 208 0
FLAG 48 160 Vout
TEXT 160 280 Left 2 !.tran 600u
* Z:\home\khalils\Downloads\files\data\raw_asc\1c5d286ed63c_Fig10_14.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Vout Vin
VDD N001 0 1
M1 Vout N001 Vin 0 N_50n l=50n w=500n
Vin Vin 0 PULSE(0 1 0 0 0 1n 2n)
C1 Vout 0 5f
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 5n
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 680
WIRE 208 -96 208 -112
WIRE 208 0 208 -16
WIRE 272 -112 208 -112
WIRE 384 -112 272 -112
WIRE 400 -160 400 -208
WIRE 432 -32 432 -112
WIRE 560 -112 480 -112
WIRE 672 -112 560 -112
WIRE 672 -80 672 -112
WIRE 672 16 672 -16
WIRE 784 -208 400 -208
WIRE 784 -176 784 -208
WIRE 784 -64 784 -96
SYMBOL cap 656 -80 R0
SYMATTR InstName C1
SYMATTR Value 5f
SYMBOL voltage 208 -112 R0
WINDOW 0 -85 56 Left 0
WINDOW 3 -114 148 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(0 1 0 0 0 1n 2n)
SYMBOL nmos4 480 -160 R90
WINDOW 0 70 70 VRight 0
WINDOW 3 99 70 VRight 0
WINDOW 123 100 -119 VRight 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 784 -192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
FLAG 208 0 0
FLAG 672 16 0
FLAG 560 -112 Vout
FLAG 272 -112 Vin
FLAG 432 -32 0
FLAG 784 -64 0
TEXT 392 32 Left 0 !.tran 5n
TEXT 392 56 Left 0 !.lib cmosedu_models.txt
TEXT 512 -240 Left 0 ;Plot Vout Vin
* Z:\tmp\asc_dec_bjh7r6w2\128f13ec5929_ADuM4221-1C_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N005 N008 10K
C2 Gate_B 0 2.2n
C1 Gate_A 0 2.2n
V5 N002 0 15
R3 Gate_B N006 5.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3080 680
WIRE -1136 -432 -1424 -432
WIRE -1008 -432 -1056 -432
WIRE -880 -432 -1008 -432
WIRE -832 -432 -880 -432
WIRE -1008 -400 -1008 -432
WIRE -1248 -368 -1424 -368
WIRE -1248 -352 -1248 -368
WIRE -1008 -320 -1008 -336
WIRE -1392 -304 -1424 -304
WIRE -1728 -272 -1760 -272
WIRE -1248 -224 -1424 -224
WIRE -1248 -208 -1248 -224
WIRE -1728 -176 -1984 -176
WIRE -1728 -112 -1872 -112
WIRE -1136 -96 -1424 -96
WIRE -1008 -96 -1056 -96
WIRE -880 -96 -1008 -96
WIRE -832 -96 -880 -96
WIRE -1984 -80 -1984 -176
WIRE -1872 -64 -1872 -112
WIRE -1008 -64 -1008 -96
WIRE -1008 32 -1008 0
WIRE -1984 128 -1984 0
WIRE -1872 128 -1872 16
SYMBOL res -1888 -80 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL cap -1024 -64 R0
SYMATTR InstName C2
SYMATTR Value 2.2n
SYMBOL cap -1024 -400 R0
SYMATTR InstName C1
SYMATTR Value 2.2n
SYMBOL voltage -1248 -368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 43 29 Left 2
WINDOW 3 46 61 Left 2
SYMATTR InstName V5
SYMATTR Value 15
SYMBOL res -1040 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5.1
FLAG -1392 -304 0
FLAG -1760 -272 0
FLAG -880 -96 Gate_B
FLAG -880 -432 Gate_A
FLAG -1008 32 0
FLAG -1008 -320 0
FLAG -1248 -272 0
* Z:\home\khalils\Downloads\files\data\raw_asc\0123c126a2b9_Parte3.asc
* Generated by LTspice 26.0.1 for Windows.
Vgs1 in N001 AC 1
VGS N001 0 1.10
MN_1u Vout in 0 0 N_1u l=7.0u w=7.0598e+1u
RD VDD Vout 96813.97
VDS VDD 0 5V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.ac dec 10 1 1000000
.measure AC GAIN FIND V(vout) AT = 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 608 -224 608 -256
WIRE 336 -208 336 -256
WIRE 608 -96 608 -144
WIRE 336 -80 336 -128
WIRE 448 -80 336 -80
WIRE 336 -48 336 -80
WIRE 384 0 336 0
WIRE 64 32 -16 32
WIRE 288 32 64 32
WIRE 64 48 64 32
WIRE 384 48 384 0
WIRE 384 48 336 48
WIRE 336 144 336 48
WIRE 64 176 64 128
WIRE 64 304 64 256
FLAG 336 144 0
FLAG 64 304 0
FLAG 448 -80 Vout
FLAG -16 32 in
FLAG 336 -256 VDD
FLAG 608 -96 0
FLAG 608 -256 VDD
SYMBOL voltage 64 32 R0
WINDOW 3 24 44 Left 2
WINDOW 123 24 72 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMATTR InstName Vgs1
SYMBOL voltage 64 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VGS
SYMATTR Value 1.10
SYMBOL nmos4 288 -48 R0
SYMATTR InstName N_1u
SYMATTR Value N_1u
SYMATTR Value2 l=7.0u w=7.0598e+1u
SYMBOL res 320 -224 R0
SYMATTR InstName RD
SYMATTR Value 96813.97
SYMBOL voltage 608 -240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VDS
SYMATTR Value 5V
TEXT -240 -104 Left 2 !.include cmosedu_models.txt
TEXT -240 -64 Left 2 !.ac dec 10 1 1000000
TEXT -232 -144 Left 2 !.measure AC GAIN FIND V(vout) AT = 1
* Z:\home\khalils\Downloads\files\data\raw_asc\2c03080e65da_Audio_Trap_03.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N003 N002 2.2K
V1 N001 0 SINE(0 3.3 1000) AC 3.3
C2 N002 0 47n
R2 0 N003 2.2K
R1 N002 N001 1K
.ac dec 20 1000 50000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 32 -32 32
WIRE 432 32 128 32
WIRE 496 32 432 32
WIRE 832 32 576 32
WIRE 832 144 832 32
WIRE -32 160 -32 32
WIRE 432 160 432 32
WIRE -32 256 -32 240
WIRE 432 256 432 224
WIRE 432 256 -32 256
WIRE 832 256 832 224
WIRE 832 256 432 256
WIRE 832 288 832 256
SYMBOL res 848 240 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 2.2K
SYMBOL res 592 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2.2K
SYMBOL cap 416 160 R0
SYMATTR InstName C2
SYMATTR Value 47n
SYMBOL voltage -32 144 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 3.3
SYMATTR InstName V1
SYMATTR Value SINE(0 3.3 1000)
SYMBOL res 144 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG 832 288 0
TEXT -64 312 Left 2 !.ac dec 20 1000 50000
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1741.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N002 0 10n
V1 IN 0 1.8
C1 OUT 0 4.7 Rser=3m
R1 IN N001 100k
R2 OUT N003 106k
R3 N003 0 59k
R4 OUT 0 1
XU1 IN N003 IN N002 OUT N001 0 ADP1741 ;pnba Vin)ADJ)EN)SS)Vout)PG)GND
.tran 50m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1741.asy)
.lib ADP1741.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1064 680
WIRE -112 32 -128 32
WIRE -16 32 -112 32
WIRE 64 32 -16 32
WIRE 96 32 64 32
WIRE 448 32 352 32
WIRE 592 32 448 32
WIRE 672 32 592 32
WIRE 704 32 672 32
WIRE -128 48 -128 32
WIRE -16 48 -16 32
WIRE 592 48 592 32
WIRE 704 48 704 32
WIRE 448 80 448 32
WIRE 64 96 64 32
WIRE 96 96 64 96
WIRE -128 144 -128 128
WIRE 592 144 592 112
WIRE 704 144 704 128
WIRE -16 176 -16 128
WIRE 96 176 -16 176
WIRE 16 240 0 240
WIRE 96 240 80 240
WIRE 448 240 448 160
WIRE 448 240 352 240
WIRE 448 288 448 240
WIRE 224 304 224 288
WIRE 448 416 448 368
FLAG 224 304 0
FLAG -128 144 0
FLAG 0 240 0
FLAG -112 32 IN
FLAG 704 144 0
FLAG 592 144 0
FLAG 672 32 OUT
FLAG 448 416 0
SYMBOL cap 80 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -128 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL cap 576 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=3m
SYMBOL res -32 32 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res 432 64 R0
SYMATTR InstName R2
SYMATTR Value 106k
SYMBOL res 432 272 R0
SYMATTR InstName R3
SYMATTR Value 59k
SYMBOL res 688 32 R0
SYMATTR InstName R4
SYMATTR Value 1
SYMBOL ADP1741 224 128 R0
SYMATTR InstName U1
TEXT 128 352 Left 2 !.tran 50m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2138-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2138-2.5.asy)
Rload OUT 0 5
C1 OUT 0 10
V1 IN 0 5
L1 N001 OUT 1 Rser=60m
XU1 IN IN N001 OUT 0 IN ADP2138-x.x Rtop=320K ;pnba Vin)EN)SW)Vout)GND)Mode
.tran .5m startup
.lib ADP2138-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 192 224 192 144
WIRE 208 224 192 224
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 224
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=60m
SYMBOL ADP2138-2.5 352 224 R0
SYMATTR InstName U1
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
TEXT 600 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG752.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG752.asy)
V1 SA 0 3
XU1 IN SA D SB +V 0 ADG752 ;pnba IN)SA)D)SB)Vdd)GND
V2 SB 0 0
R1 D 0 301
C1 D 0 36p
V4 +V 0 5
V3 IN 0 PULSE(0 3 0 20n 20n 10u 20u)
.tran 100u
.lib ADG752.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1728 -272 -2032 -272
WIRE -1696 -272 -1728 -272
WIRE -2032 -256 -2032 -272
WIRE -1472 -240 -1504 -240
WIRE -1424 -240 -1472 -240
WIRE -1312 -240 -1424 -240
WIRE -1424 -224 -1424 -240
WIRE -1312 -224 -1312 -240
WIRE -1728 -208 -1920 -208
WIRE -1696 -208 -1728 -208
WIRE -1920 -192 -1920 -208
WIRE -2032 -160 -2032 -176
WIRE -1728 -144 -1776 -144
WIRE -1696 -144 -1728 -144
WIRE -1424 -128 -1424 -144
WIRE -1312 -128 -1312 -160
WIRE -1920 -96 -1920 -112
WIRE -1776 -80 -1776 -144
WIRE -1600 -16 -1600 -32
WIRE -1776 32 -1776 0
SYMBOL cap -1328 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -2032 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL voltage -2032 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL voltage -1776 -96 R0
WINDOW 3 24 136 Left 2
SYMATTR Value PULSE(0 3 0 20n 20n 10u 20u)
SYMATTR InstName V3
SYMBOL voltage -1920 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL ADG752 -1600 -192 R0
SYMATTR InstName U1
SYMBOL res -1440 -240 R0
SYMATTR InstName R1
SYMATTR Value 301
FLAG -2032 -160 0
FLAG -1920 -96 0
FLAG -1776 32 0
FLAG -1600 -368 +V
FLAG -1424 -128 0
FLAG -1600 -16 0
FLAG -1312 -128 0
FLAG -2032 16 0
FLAG -2032 -64 +V
FLAG -1728 -272 SA
FLAG -1728 -208 SB
FLAG -1728 -144 IN
FLAG -1472 -240 D
TEXT -1960 8 Left 2 !.tran 100u
TEXT -2088 -480 Left 2 ;Note:\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\416b1af02e29_StageA_LowPassSallenKey_AD711.asc
* Generated by LTspice 26.0.1 for Windows.
* This subcircuit is not simulatable. \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD711.asy)
XU1 N002 OUT V+ V- OUT AD712 ;pnba In+)In-)V+)V-)OUT
R2 N002 N001 95.3k
R1 N001 IN 26.7k
C1 OUT N001 10n
C2 N002 REF 1n
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4112 860
WIRE 512 -128 240 -128
WIRE 320 64 320 -32
WIRE 320 112 320 64
WIRE 240 128 240 -128
WIRE 288 128 288 112
WIRE 288 128 240 128
WIRE 304 128 288 128
WIRE 432 144 352 144
WIRE 512 144 512 -128
WIRE 512 144 432 144
WIRE -160 160 -176 160
WIRE -128 160 -160 160
WIRE -16 160 -48 160
WIRE 16 160 -16 160
WIRE 144 160 96 160
WIRE 288 160 144 160
WIRE 304 160 288 160
WIRE 512 160 512 144
WIRE 576 160 512 160
WIRE 608 160 576 160
WIRE 288 176 288 160
WIRE 144 192 144 160
WIRE 320 224 320 176
WIRE 144 272 144 256
WIRE 320 336 320 224
WIRE -16 400 -16 160
WIRE 176 400 -16 400
WIRE 512 400 512 160
WIRE 512 400 240 400
SYMBOL cap 128 192 R0
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL Opamps\\AD711 320 80 R0
SYMATTR InstName U1
SYMBOL cap 240 384 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res -32 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 26.7k
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 95.3k
FLAG 320 -32 V+
FLAG 320 336 V-
FLAG 576 160 OUT
FLAG -160 160 IN
FLAG 144 272 REF
TEXT -176 504 Left 4 ;This subcircuit is not simulatable.  \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX22702D.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX22702D.asy)
V4 VDDB 0 20
C1 OUT 0 200p
V3 IN- 0 PULSE(0 5 0 2n 2n 3u 5u)
V1 VDDA 0 5
V2 IN+ 0 PULSE(0 5 0 2n 2n 6u 12u)
XU1 VDDA IN+ IN- 0 VDDB OUT NC_01 0 MAX22702D ;pnba VDDA)IN+)IN-)GNDA)VDDB)OUT)ADJ)VSSB
.tran 50u
.lib MAX22702D.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2212 708
WIRE 16 64 -592 64
WIRE 64 64 16 64
WIRE 448 64 384 64
WIRE 640 64 448 64
WIRE -592 112 -592 64
WIRE 640 128 640 64
WIRE 16 144 -464 144
WIRE 64 144 16 144
WIRE 448 144 384 144
WIRE 512 144 448 144
WIRE 512 160 512 144
WIRE -464 176 -464 144
WIRE 16 224 -304 224
WIRE 64 224 16 224
WIRE 512 224 512 208
WIRE 512 224 384 224
WIRE -592 272 -592 192
WIRE -304 272 -304 224
WIRE 512 272 512 224
WIRE 640 272 640 208
WIRE -464 288 -464 256
WIRE 64 304 16 304
WIRE -304 384 -304 352
WIRE 16 384 16 304
SYMBOL voltage -304 256 R0
WINDOW 3 22 -12 Left 2
WINDOW 0 25 96 Left 2
SYMATTR Value PULSE(0 5 0 2n 2n 3u 5u)
SYMATTR InstName V3
SYMBOL MAX22702D 224 144 R0
SYMATTR InstName U1
SYMBOL voltage 640 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 20
SYMBOL cap 496 160 R0
SYMATTR InstName C1
SYMATTR Value 200p
SYMBOL voltage -592 96 R0
WINDOW 0 21 107 Left 2
WINDOW 3 22 -9 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -464 160 R0
WINDOW 3 32 1 Left 2
WINDOW 0 28 101 Left 2
SYMATTR Value PULSE(0 5 0 2n 2n 6u 12u)
SYMATTR InstName V2
FLAG 16 384 0
FLAG -304 384 0
FLAG -464 288 0
FLAG 16 144 IN+
FLAG 16 224 IN-
FLAG 448 144 OUT
FLAG 16 64 VDDA
FLAG 448 64 VDDB
FLAG 512 272 0
FLAG -592 272 0
FLAG 640 272 0
TEXT 280 408 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\20c70d05ad2c_sim2.asc
* Generated by LTspice 26.0.1 for Windows.
C2 0 N001 {4/3}
L1 vi N001 1.5
V1 vi 0 AC 1
L3 N001 vo 0.5
R vo 0 1
.ac dec 1000 0.01 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 144 -80 144
WIRE 80 144 -16 144
WIRE 192 144 160 144
WIRE 224 144 192 144
WIRE 336 144 304 144
WIRE 416 144 336 144
WIRE -80 176 -80 144
WIRE 336 192 336 144
WIRE 192 208 192 144
WIRE -80 320 -80 256
WIRE 192 320 192 272
WIRE 192 320 -80 320
WIRE 336 320 336 272
WIRE 336 320 192 320
WIRE 192 368 192 320
SYMBOL voltage -80 160 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL ind 208 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L3
SYMATTR Value 0.5
SYMBOL ind 64 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.5
SYMBOL res 320 176 R0
SYMATTR InstName R
SYMATTR Value 1
SYMBOL cap 208 272 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value {4/3}
FLAG 192 368 0
FLAG 416 144 vo
FLAG -16 144 vi
TEXT -114 354 Left 2 !.ac dec 1000 0.01 10
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1254.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1254.asy)
XU1 IN N001 +V -V N002 LT1254 ;pnba In+)In-)V+)V-)OUT
T1 N003 0 OUT 0 Td=50n Z0=75
R1 N002 N001 620
V3 IN 0 SINE(0 1 1Meg)
R2 N001 0 620
V2 -V 0 -5
R3 N002 N003 75
R4 OUT 0 75
V1 +V 0 5
.tran 10u
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -176 176 -176 160
WIRE -48 176 -48 160
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 320 240 256 240
WIRE 464 240 400 240
WIRE 672 240 560 240
WIRE 160 256 48 256
WIRE 672 256 672 240
WIRE -176 272 -176 256
WIRE -48 272 -48 256
WIRE 48 272 48 256
WIRE 464 272 432 272
WIRE 592 272 560 272
WIRE 192 288 192 272
WIRE 672 352 672 336
WIRE 48 368 48 352
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 620
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 620
SYMBOL opamps\\LT1254 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -48 160 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 48 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1Meg)
SYMBOL voltage -176 160 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 304 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 75
SYMBOL res 656 240 R0
SYMATTR InstName R4
SYMATTR Value 75
SYMBOL tline 512 256 R0
WINDOW 3 -81 49 Left 2
SYMATTR Value Td=50n Z0=75
SYMATTR InstName T1
FLAG -48 272 0
FLAG 192 192 +V
FLAG -48 160 +V
FLAG 192 288 -V
FLAG -176 272 0
FLAG -176 160 -V
FLAG 16 96 0
FLAG 48 368 0
FLAG 672 352 0
FLAG 592 272 0
FLAG 432 272 0
FLAG 48 256 IN
FLAG 672 240 OUT
TEXT 432 368 Left 2 !.tran 10u