Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1575.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1575.asy)
V2 N002 0 12
R2 N004 0 1K
M3 N001 N003 OUT OUT IRFZ24
C2 N005 0 10p
R1 OUT N004 1.727K
C3 N006 0 1000p
R3 N005 N006 7.5K
I2 OUT 0 PULSE(.2 5 300u 100n 100n 300u 600u) load
V1 N001 0 5
C1 OUT 0 24
XU1 0 N002 0 N004 N005 N003 N001 N001 LT1575 ;pnba SHDN)Vin)GND)FB)Comp)Gate)Ineg)Ipos
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m
.lib LT1575.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4232 1996
WIRE 2352 -32 2336 -32
WIRE 2688 -32 2640 -32
WIRE 2944 -32 2688 -32
WIRE 3040 -32 2944 -32
WIRE 3040 -16 3040 -32
WIRE 2352 64 2224 64
WIRE 2688 64 2688 -32
WIRE 2688 64 2640 64
WIRE 2944 80 2944 -32
WIRE 3040 80 3040 64
WIRE 2224 96 2224 64
WIRE 2352 160 2336 160
WIRE 2896 160 2640 160
WIRE 2224 208 2224 176
WIRE 2944 240 2944 176
WIRE 3104 240 2944 240
WIRE 3232 240 3104 240
WIRE 2352 256 2304 256
WIRE 2672 256 2640 256
WIRE 2720 256 2672 256
WIRE 2832 256 2800 256
WIRE 3104 256 3104 240
WIRE 3232 256 3232 240
WIRE 2672 272 2672 256
WIRE 2832 272 2832 256
WIRE 2944 272 2944 240
WIRE 2672 352 2672 336
WIRE 2832 352 2832 336
WIRE 3104 352 3104 320
WIRE 3232 352 3232 336
WIRE 2304 384 2304 256
WIRE 2944 384 2944 352
WIRE 2944 384 2304 384
WIRE 2944 400 2944 384
WIRE 2944 496 2944 480
SYMBOL voltage 3040 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2704 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 7.5K
SYMBOL res 2928 384 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL LT1575 2496 112 R0
SYMATTR InstName U1
SYMBOL cap 2656 272 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL voltage 2224 80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL cap 2816 272 R0
SYMATTR InstName C3
SYMATTR Value 1000p
SYMBOL res 2928 256 R0
SYMATTR InstName R1
SYMATTR Value 1.727K
SYMBOL cap 3088 256 R0
SYMATTR InstName C1
SYMATTR Value 24
SYMBOL nmos 2896 80 R0
SYMATTR InstName M3
SYMATTR Value IRFZ24
SYMBOL current 3232 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 39 40 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I2
SYMATTR Value PULSE(.2 5 300u 100n 100n 300u 600u)
FLAG 3104 352 0
FLAG 2944 496 0
FLAG 3232 352 0
FLAG 3040 80 0
FLAG 2832 352 0
FLAG 2672 352 0
FLAG 2336 -32 0
FLAG 2224 208 0
FLAG 2336 160 0
FLAG 3232 240 OUT
TEXT 3248 424 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1633.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1633.asy)
V3 D1 0 sine(0 5 1K)
V1 +V 0 8
XU1 +V S1A D1 S1B MP_01 MP_02 MP_03 MP_04 MP_05 MP_06 MP_07 MP_08 -V NC_09 IN1 0 ADG1633 ;pnba Vdd)SA)D)SB)))))))))Vss)_EN)IN1)GND
V2 -V 0 -8
R1 S1B 0 1K
R2 S1A 0 1K
V4 IN1 0 pulse(0 3.3 0 1u 1u 5m 10m)
.tran 30m
.lib ADG1633.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -512 -112 -512 -128
WIRE -400 -112 -400 -128
WIRE 0 -96 0 -112
WIRE 144 -32 96 -32
WIRE 224 -32 144 -32
WIRE 320 -32 304 -32
WIRE -512 -16 -512 -32
WIRE -400 -16 -400 -32
WIRE -272 0 -304 0
WIRE -144 0 -192 0
WIRE -96 0 -144 0
WIRE 144 32 96 32
WIRE 176 32 144 32
WIRE 320 32 256 32
WIRE -416 96 -432 96
WIRE -144 96 -336 96
WIRE -96 96 -144 96
WIRE -96 192 -112 192
WIRE -64 224 -64 208
WIRE 64 224 64 208
SYMBOL res 160 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL ADG1633 0 48 R0
SYMATTR InstName U1
SYMBOL res 208 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -512 -128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -8
SYMBOL voltage -176 0 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V3
SYMATTR Value sine(0 5 1K)
SYMBOL voltage -400 -128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 8
SYMBOL voltage -320 96 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
FLAG -512 -16 0
FLAG -400 -16 0
FLAG -400 -128 +V
FLAG -512 -128 -V
FLAG -304 0 0
FLAG -64 224 -V
FLAG 0 -112 +V
FLAG 64 224 0
FLAG -432 96 0
FLAG -112 192 0
FLAG 320 -32 0
FLAG 320 32 0
FLAG -144 0 D1
FLAG -144 96 IN1
FLAG 144 -32 S1B
FLAG 144 32 S1A
TEXT 176 192 Left 2 !.tran 30m
* Z:\tmp\asc_dec_bjh7r6w2\1a3bfb92f5c4_LDO_-_Closed_Loop_Input_Change_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R4 +ve1 N005 10k
Vin N001 N014 PWL(0 15 10u 15 11u 500)
Cf N008 N007 100n
R3 N004 N015 50
XX2 N001 0 V+ V- N002 level1 Avol=0.05 GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
* Library below included based on ModelFile attribute of instance XX2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp1.asy)
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1952 680
WIRE 256 -80 80 -80
WIRE 544 -64 320 -64
WIRE 256 -48 224 -48
WIRE 656 -48 608 -48
WIRE 928 -48 736 -48
WIRE 1072 -48 1072 -128
WIRE 1072 -48 928 -48
WIRE 224 -16 224 -48
WIRE 1792 32 1744 32
WIRE 1904 32 1872 32
WIRE 416 48 416 16
WIRE 592 96 528 96
WIRE 720 96 672 96
WIRE 832 96 784 96
WIRE 928 96 928 -48
WIRE 80 144 80 -80
WIRE 1072 144 1072 -48
WIRE 400 160 400 112
WIRE 1808 160 1808 144
WIRE 672 176 592 176
WIRE 1744 176 1744 32
WIRE 1744 176 1712 176
WIRE 1776 176 1744 176
WIRE 832 192 832 96
WIRE 832 192 704 192
WIRE 928 192 928 176
WIRE 928 192 832 192
WIRE 1904 192 1904 32
WIRE 1904 192 1840 192
WIRE 432 208 432 112
WIRE 640 208 528 208
WIRE 1776 208 1760 208
WIRE 768 224 704 224
WIRE 672 240 592 240
WIRE 768 256 768 224
WIRE 928 256 928 192
WIRE 1760 256 1760 208
WIRE 80 384 80 224
WIRE 1072 384 1072 224
SYMBOL res 1888 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL voltage 80 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -50 11 Left 2
WINDOW 3 -347 101 Left 2
SYMATTR InstName Vin
SYMATTR Value PWL(0 15 10u 15 11u 500)
SYMBOL cap 784 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName Cf
SYMATTR Value 100n
SYMBOL res 1056 128 R0
SYMATTR InstName R3
SYMATTR Value 50
SYMBOL OpAmps\\UniversalOpAmp1 288 -64 M180
WINDOW 0 20 -21 Left 2
SYMATTR InstName X2
SYMATTR Value2 Avol=0.05 GBW=10Meg Vos=0
FLAG 592 176 V+
FLAG 592 240 V-
FLAG 1904 192 +ve1
FLAG 1808 144 v-
FLAG 384 80 V+
FLAG 448 80 V-
FLAG 416 16 -ve1
FLAG 288 -32 V+
FLAG 288 -96 V-
FLAG 224 -16 0
* Z:\home\khalils\Downloads\files\data\raw_asc\21a3623f4f5e_Simulacion_LTspice.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 Vi 1
R2 N002 N001 0.707
R3b N005 N002 1
R4a N004 N003 1
R4b Vo N004 1
R3a Vo N001 1
XU1 N001 0 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
XU2 0 N005 Vo opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
XU3 N004 0 N003 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
C2 N003 N005 1
C1 N002 N001 1
Vi Vi 0 AC 1
.lib opamp.sub
.ac lin 10000 0.01 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 912 680
WIRE 432 -80 160 -80
WIRE 864 -80 512 -80
WIRE 160 0 160 -80
WIRE 208 0 160 0
WIRE 320 0 288 0
WIRE 640 0 624 0
WIRE 736 0 720 0
WIRE 768 0 736 0
WIRE 864 0 864 -80
WIRE 864 0 848 0
WIRE 160 96 160 0
WIRE 208 96 160 96
WIRE 320 96 320 0
WIRE 320 96 272 96
WIRE 736 96 736 0
WIRE 736 96 704 96
WIRE 528 112 496 112
WIRE 624 112 624 0
WIRE 624 112 592 112
WIRE 640 112 624 112
WIRE 736 128 704 128
WIRE 736 160 736 128
WIRE -16 192 -64 192
WIRE 160 192 160 96
WIRE 160 192 64 192
WIRE 224 192 160 192
WIRE 320 208 320 96
WIRE 320 208 288 208
WIRE 384 208 320 208
WIRE 496 208 496 112
WIRE 496 208 464 208
WIRE 560 208 496 208
WIRE -64 224 -64 192
WIRE 224 224 208 224
WIRE 864 224 864 0
WIRE 864 224 624 224
WIRE 560 240 544 240
WIRE 208 256 208 224
WIRE 544 272 544 240
FLAG 208 256 0
FLAG 544 272 0
FLAG 736 160 0
FLAG -64 192 Vi
FLAG 864 224 Vo
FLAG -64 304 0
SYMBOL res 80 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL res 304 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 0.707
SYMBOL res 480 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3b
SYMATTR Value 1
SYMBOL res 736 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4a
SYMATTR Value 1
SYMBOL res 864 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4b
SYMATTR Value 1
SYMBOL res 528 -96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3a
SYMATTR Value 1
SYMBOL OpAmps\\opamp 256 144 R0
SYMATTR InstName U1
SYMBOL OpAmps\\opamp 592 288 M180
SYMATTR InstName U2
SYMBOL OpAmps\\opamp 672 48 M0
SYMATTR InstName U3
SYMBOL cap 592 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 272 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -64 208 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName Vi
SYMATTR Value ""
TEXT 352 344 Left 2 !.lib opamp.sub
TEXT 352 368 Left 2 !.ac lin 10000 0.01 10
* Z:\tmp\asc_dec_bjh7r6w2\0a7ab884496f_1726-2.5_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 NC_01 NC_02 NC_03 0 N007 N004 N006 N003 LTC1726-2.5 ;pnba VCC3)VCC25)VCCA)GND)WDI)_RST)WT)RT
V4 N005 0 5
R2 N002 0 100K
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1726-2.5.asy)
.lib LTC1726-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2616 848
WIRE 768 48 592 48
WIRE 592 64 592 48
WIRE 768 128 768 48
WIRE 592 160 592 144
WIRE 592 160 320 160
WIRE 592 176 592 160
WIRE 768 240 768 208
WIRE 592 272 592 256
WIRE 80 304 64 304
WIRE 400 304 368 304
WIRE 528 304 480 304
WIRE 528 336 528 304
WIRE 80 432 64 432
WIRE 448 432 368 432
WIRE 528 432 528 416
WIRE 448 464 448 432
WIRE 224 496 224 480
SYMBOL LTC1726-2.5 224 400 R0
SYMATTR InstName U1
SYMBOL voltage 528 320 R0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL res 576 160 R0
SYMATTR InstName R2
SYMATTR Value 100K
FLAG 528 432 0
FLAG 768 240 0
FLAG 224 496 0
FLAG 592 272 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6108-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6108-2.asy)
XU1 N002 N004 N007 0 N008 N005 N001 N003 LT6108-2 ;pnba SenseLo)EN/_RST)OutC)V-)INC)OutA)V+)SenseHi
V3 N006 0 3.3
R3 N005 N008 6.04K
R2 N001 N002 .1
I1 N002 0 PWL(10u 0 30u 500m 50u 0)
R1 N001 N003 100
V1 N001 0 12
C1 N002 0 .1
R5 N008 0 1.6K
R7 N006 N007 10K
V2 N004 0 PWL(4u 0 4.01u 5)
.tran 60u
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2204 980
WIRE 288 -96 112 -96
WIRE 352 -96 288 -96
WIRE 480 -96 432 -96
WIRE 528 -96 480 -96
WIRE 640 -96 528 -96
WIRE 288 -80 288 -96
WIRE 640 -80 640 -96
WIRE 528 -64 528 -96
WIRE 288 16 288 0
WIRE 528 16 528 0
WIRE 640 16 640 0
WIRE 112 64 112 -96
WIRE 112 64 -192 64
WIRE 128 64 112 64
WIRE 480 64 480 -96
WIRE 480 64 448 64
WIRE -192 80 -192 64
WIRE -192 176 -192 160
WIRE -64 176 -80 176
WIRE 128 176 16 176
WIRE 480 176 448 176
WIRE 480 192 480 176
WIRE 32 288 -48 288
WIRE 128 288 112 288
WIRE 480 288 480 272
WIRE 480 288 448 288
WIRE -48 304 -48 288
WIRE 480 304 480 288
WIRE 288 352 288 336
WIRE -48 400 -48 384
WIRE 480 400 480 384
SYMBOL voltage 32 176 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value PWL(4u 0 4.01u 5)
SYMBOL res 336 -80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value .1
SYMBOL res 272 -96 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL current 640 -80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value PWL(10u 0 30u 500m 50u 0)
SYMBOL res 464 176 R0
SYMATTR InstName R3
SYMATTR Value 6.04K
SYMBOL LT6108-2 288 224 R0
SYMATTR InstName U1
SYMBOL cap 512 -64 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage -48 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL res 16 304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R7
SYMATTR Value 10K
SYMBOL voltage -192 64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 464 288 R0
SYMATTR InstName R5
SYMATTR Value 1.6K
FLAG 288 352 0
FLAG -192 176 0
FLAG -80 176 0
FLAG 640 16 0
FLAG 480 400 0
FLAG -48 400 0
FLAG 528 16 0
TEXT 744 376 Left 2 !.tran 60u
* Z:\home\khalils\Downloads\files\data\raw_asc\Cohn.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
L6 N006 0 {Lm}
V1 N004 0 AC 2
L5 N003 N006 {L}
L3 N002 N005 {2*L}
L1 N001 N005 {L}
L4 N002 N006 {2*L}
C2 IN 0 {C2}
C5 N002 0 {C3}
L2 N005 0 {Lm}
C3 N003 OUT {C1}
C4 OUT 0 {C2}
C1 N001 IN {C1}
R2 OUT 0 {R}
R1 IN N004 {R}
.ac oct 1000 10Meg 22Meg
.param x=.54 ; trimer postion
.param R=50
.param L=2.95u Lm=.27u C1=22p+x*25p C2=240p C3=34p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2316 1728
WIRE 1360 1168 1232 1168
WIRE 1664 1168 1536 1168
WIRE 1760 1168 1664 1168
WIRE 2080 1168 1952 1168
WIRE 1232 1184 1232 1168
WIRE 2080 1184 2080 1168
WIRE 1360 1200 1360 1168
WIRE 1536 1200 1536 1168
WIRE 1760 1200 1760 1168
WIRE 1952 1200 1952 1168
WIRE 1664 1280 1664 1168
WIRE 1072 1296 1024 1296
WIRE 1184 1296 1152 1296
WIRE 1232 1296 1232 1248
WIRE 1232 1296 1184 1296
WIRE 1360 1296 1360 1280
WIRE 1456 1296 1360 1296
WIRE 1536 1296 1536 1280
WIRE 1536 1296 1456 1296
WIRE 1760 1296 1760 1280
WIRE 1872 1296 1760 1296
WIRE 1952 1296 1952 1280
WIRE 1952 1296 1872 1296
WIRE 2080 1296 2080 1248
WIRE 2240 1296 2080 1296
WIRE 2240 1312 2240 1296
WIRE 1024 1328 1024 1296
WIRE 1232 1328 1232 1296
WIRE 1456 1328 1456 1296
WIRE 1872 1328 1872 1296
WIRE 2080 1328 2080 1296
WIRE 1024 1424 1024 1408
WIRE 1232 1424 1232 1392
WIRE 1456 1424 1456 1408
WIRE 1664 1424 1664 1344
WIRE 1872 1424 1872 1408
WIRE 2080 1424 2080 1392
WIRE 2240 1424 2240 1392
SYMBOL ind 1744 1184 R0
SYMATTR InstName L4
SYMATTR Value {2*L}
SYMBOL cap 1648 1280 R0
SYMATTR InstName C5
SYMATTR Value {C3}
SYMBOL ind 1344 1184 R0
SYMATTR InstName L1
SYMATTR Value {L}
SYMBOL cap 1216 1328 R0
SYMATTR InstName C2
SYMATTR Value {C2}
SYMBOL ind 1936 1184 R0
SYMATTR InstName L5
SYMATTR Value {L}
SYMBOL ind 1856 1312 R0
SYMATTR InstName L6
SYMATTR Value {Lm}
SYMBOL cap 2064 1184 R0
SYMATTR InstName C3
SYMATTR Value {C1}
SYMBOL ind 1520 1184 R0
SYMATTR InstName L3
SYMATTR Value {2*L}
SYMBOL VOLTAGE 1024 1312 R0
WINDOW 3 25 97 Left 2
SYMATTR Value AC 2
SYMATTR InstName V1
SYMBOL res 2224 1296 R0
SYMATTR InstName R2
SYMATTR Value {R}
SYMBOL cap 2064 1328 R0
SYMATTR InstName C4
SYMATTR Value {C2}
SYMBOL cap 1216 1184 R0
SYMATTR InstName C1
SYMATTR Value {C1}
SYMBOL RES 1168 1280 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R}
SYMBOL ind 1440 1312 R0
SYMATTR InstName L2
SYMATTR Value {Lm}
FLAG 2080 1424 0
FLAG 1872 1424 0
FLAG 1456 1424 0
FLAG 1232 1424 0
FLAG 1664 1424 0
FLAG 1024 1424 0
FLAG 2240 1424 0
FLAG 2240 1296 OUT
FLAG 1184 1296 IN
TEXT 1920 1480 Left 2 !.ac oct 1000 10Meg 22Meg
TEXT 1152 1472 Left 2 !.param x=.54 ; trimer postion\n.param R=50\n.param L=2.95u Lm=.27u C1=22p+x*25p C2=240p C3=34p
TEXT 1616 1584 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\0a495bb34fe8_npn_output_sim.asc
* Generated by LTspice 26.0.1 for Windows.
* V(out)-V(ref) = 1.25V\nV(out) = V(ref) * (1 + R2/R1) + I(adj)*R2
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
Q1 5v N002 N001 0 2n3904
V2 cmd 0 PULSE(0 4.5 0 10m 0 10m 50m)
R1 N001 0 10
XU1 cmd N001 5v 0 N002 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 5v 0 5
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 10m 0 1u
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1124
WIRE 432 -48 64 -48
WIRE 304 144 304 96
WIRE 128 160 128 144
WIRE 64 176 64 -48
WIRE 96 176 64 176
WIRE 240 192 160 192
WIRE 64 208 0 208
WIRE 96 208 64 208
WIRE 0 224 0 208
WIRE -192 240 -192 224
WIRE 128 240 128 224
WIRE 304 272 304 240
WIRE 432 272 432 -48
WIRE 432 272 304 272
WIRE 304 288 304 272
WIRE 0 352 0 304
WIRE -192 368 -192 320
WIRE 304 400 304 368
SYMBOL voltage 0 208 R0
WINDOW 3 18 110 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 4.5 0 10m 0 10m 50m)
SYMATTR InstName V2
SYMBOL res 288 272 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL npn 240 144 R0
SYMATTR InstName Q1
SYMATTR Value 2n3904
SYMBOL OpAmps\\UniversalOpAmp2 128 192 R0
SYMATTR InstName U1
SYMBOL voltage -192 224 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -192 368 0
FLAG 0 352 0
FLAG 64 208 cmd
FLAG 128 144 5v
FLAG 128 240 0
FLAG 304 400 0
FLAG 304 96 5v
FLAG -192 224 5v
TEXT -32 392 Left 2 !.tran 0 10m 0 1u
TEXT 8 -16 Left 2 ;V(out)-V(ref) = 1.25V\nV(out) = V(ref) * (1 + R2/R1) + I(adj)*R2
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3407-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3407-3.asy)
V1 IN 0 5
L2 N001 OUT2 2.2
Rload2 OUT2 0 5
XU1 OUT1 IN IN N002 0 IN N001 MP_01 IN OUT2 LTC3407-3 ;pnba Vout1)Run1)Vin)SW1)GND)Mode)SW2))Run2)Vout2
C3 OUT2 0 10
C1 OUT1 0 10
Rload1 OUT1 0 3
L1 N002 OUT1 2.2
.tran 200u startup
.lib LTC3407-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1252 868
WIRE 192 48 48 48
WIRE 272 48 192 48
WIRE 352 48 272 48
WIRE 432 48 352 48
WIRE 48 64 48 48
WIRE 272 64 272 48
WIRE 352 64 352 48
WIRE 432 64 432 48
WIRE 192 128 192 48
WIRE 208 128 192 128
WIRE 48 160 48 144
WIRE 0 224 -144 224
WIRE 64 224 0 224
WIRE 96 224 64 224
WIRE 208 224 176 224
WIRE 512 224 496 224
WIRE 624 224 592 224
WIRE 704 224 624 224
WIRE 800 224 704 224
WIRE -144 240 -144 224
WIRE 0 240 0 224
WIRE 704 240 704 224
WIRE 800 240 800 224
WIRE -144 336 -144 320
WIRE 0 336 0 304
WIRE 64 336 64 224
WIRE 208 336 64 336
WIRE 624 336 624 224
WIRE 624 336 496 336
WIRE 704 336 704 304
WIRE 800 336 800 320
WIRE 352 400 352 384
SYMBOL VOLTAGE 48 48 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 192 240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 2.2
SYMBOL res 784 224 R0
SYMATTR InstName Rload1
SYMATTR Value 3
SYMBOL polcap -16 240 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res -160 224 R0
SYMATTR InstName Rload2
SYMATTR Value 5
SYMBOL polcap 688 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LTC3407-3 352 224 R0
SYMATTR InstName U1
SYMBOL ind 496 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
FLAG 48 160 0
FLAG 352 400 0
FLAG 704 336 0
FLAG 800 336 0
FLAG 800 224 OUT1
FLAG 0 336 0
FLAG -144 336 0
FLAG -144 224 OUT2
FLAG 48 48 IN
TEXT 576 384 Left 2 !.tran 200u startup
* Z:\tmp\asc_dec_bjh7r6w2\0d34fe2043b7_Imply_Logic_new_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N005 0 PWL file=b_imply_swch.csv
V4 N004 0 PWL file=a_imply_swch.csv
V2 N001 0 PWL file=a_imply.csv
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 16 -448 16
WIRE -448 80 -448 16
WIRE 96 80 96 16
WIRE 224 112 224 16
WIRE -128 128 -160 128
WIRE 64 128 32 128
WIRE -208 240 -320 240
WIRE 192 256 80 256
WIRE -320 272 -320 240
WIRE -160 272 -160 192
WIRE 32 272 32 192
WIRE 192 272 192 256
WIRE -208 288 -208 240
WIRE 80 288 80 256
WIRE -320 384 -320 352
WIRE -208 384 -208 336
WIRE -208 384 -320 384
WIRE -160 384 -160 352
WIRE -48 384 -160 384
WIRE 32 384 32 352
WIRE 32 384 -48 384
WIRE 80 384 80 336
WIRE 192 384 192 352
WIRE 192 384 80 384
SYMBOL voltage 192 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PWL file=b_imply_swch.csv
SYMBOL voltage -320 256 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PWL file=a_imply_swch.csv
SYMBOL voltage -448 64 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL file=a_imply.csv
FLAG 224 192 0
FLAG -448 160 0
FLAG -320 384 0
FLAG 192 384 0
FLAG -128 128 A
FLAG 64 128 B
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3009-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3009-3.3.asy)
Rload OUT 0 330
C1 OUT 0 1
XU1 IN OUT MP_01 0 IN LT3009-3.3 ;pnba IN)OUT))GND)_SHDN
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 416 48 320 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LT3009-3.3 176 96 R0
SYMATTR InstName U1
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 330
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 336 248 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\fed7b74effa8_ring_osc.asc
* Generated by LTspice 26.0.1 for Windows.
M3 osc N006 0 0 NMOS
M6 N001 N006 osc N004 PMOS
V1 N001 0 1
M4 N001 osc N005 N002 PMOS
M2 N006 N005 0 0 NMOS
M1 N005 osc 0 0 NMOS
M5 N001 N005 N006 N003 PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 50n
.ic v(osc)=1
.include BSIM4_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1020 680
WIRE 352 16 64 16
WIRE 352 48 352 16
WIRE 352 48 192 48
WIRE 496 48 352 48
WIRE 192 64 192 48
WIRE 352 64 352 48
WIRE 496 64 496 48
WIRE 192 112 192 80
WIRE 352 112 352 80
WIRE 496 112 496 80
WIRE 64 176 64 16
WIRE 144 176 144 144
WIRE 144 176 128 176
WIRE 192 176 192 160
WIRE 304 176 304 144
WIRE 304 176 192 176
WIRE 352 176 352 160
WIRE 448 176 448 144
WIRE 448 176 352 176
WIRE 496 176 496 160
WIRE 624 176 496 176
WIRE 192 208 192 176
WIRE 352 208 352 176
WIRE 496 208 496 176
WIRE 208 256 192 256
WIRE 368 256 352 256
WIRE 512 256 496 256
WIRE 144 288 144 176
WIRE 304 288 304 176
WIRE 448 288 448 176
WIRE 208 304 208 256
WIRE 208 304 192 304
WIRE 368 304 368 256
WIRE 368 304 352 304
WIRE 512 304 512 256
WIRE 512 304 496 304
WIRE 128 352 128 176
WIRE 624 352 624 176
WIRE 624 352 128 352
SYMBOL pmos4 448 64 R0
SYMATTR InstName M6
SYMBOL pmos4 144 64 R0
SYMATTR InstName M4
SYMBOL voltage 80 176 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL nmos4 304 208 R0
SYMATTR InstName M2
SYMBOL nmos4 448 208 R0
SYMATTR InstName M3
SYMBOL nmos4 144 208 R0
SYMATTR InstName M1
SYMBOL pmos4 304 64 R0
SYMATTR InstName M5
FLAG -16 176 0
FLAG 208 304 0
FLAG 368 304 0
FLAG 512 304 0
FLAG 624 176 osc
TEXT 424 -48 Left 2 !.tran 50n
TEXT 696 144 Left 2 !.ic v(osc)=1
TEXT 704 -16 Left 2 !.include BSIM4_models.txt