Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\3762fe748186_full_wave_rectifier.asc
* Generated by LTspice 26.0.1 for Windows.
* Full Wave Rectifier With Smoothing Capacitor
* Ripple Voltage, V = Iload / 2* f* C
D3 0 0 1N4148
D1 VIN vout 1N4148
D4 0 vout 1N4148
D2 0 VIN 1N4148
V1 VIN 0 SINE(0 2V 1k)
C1 vout 0 10
R1 vout 0 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 2ms 0 10u
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 64 112 32 112
WIRE 176 112 128 112
WIRE 224 112 176 112
WIRE 304 112 288 112
WIRE 32 192 32 112
WIRE 32 192 -16 192
WIRE 304 192 304 112
WIRE 400 192 304 192
WIRE 512 192 400 192
WIRE 400 240 400 192
WIRE 512 256 512 192
WIRE 32 272 32 192
WIRE 64 272 32 272
WIRE 160 272 128 272
WIRE 224 272 160 272
WIRE 304 272 304 192
WIRE 304 272 288 272
WIRE 160 304 160 272
WIRE -16 384 -16 192
WIRE 400 384 400 320
WIRE 400 384 -16 384
WIRE 512 384 512 320
WIRE 512 384 400 384
WIRE 400 432 400 384
SYMBOL diode 64 288 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL diode 64 128 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL diode 224 288 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL diode 224 128 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage -112 144 R0
WINDOW 3 -71 132 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 2V 1k)
SYMBOL cap 496 256 R0
SYMATTR InstName C1
SYMATTR Value 10u
SYMBOL res 384 224 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 176 112 VIN
FLAG 160 304 0
FLAG -112 240 0
FLAG -112 160 VIN
FLAG 400 432 0
FLAG 512 192 vout
TEXT -104 -72 Left 2 ;Full Wave Rectifier With Smoothing Capacitor
TEXT 40 -16 Left 2 !.tran 0 2ms 0 10u
TEXT -48 24 Left 2 ;Ripple Voltage, V = Iload / 2* f* C
* Z:\home\khalils\Downloads\files\data\raw_asc\a28562b4de01_Demonstration_circuit_Step_ac_TF.asc
* Generated by LTspice 26.0.1 for Windows.
* Demonstration Circuit step Tf of transistor
* Step AC Transistor TF
* plot FR for different TF
* copyright Cordell Audio 12/03/2010
;op
V3 Vin 0 SINE(0 0.1 1000 0 0 0 10) AC 1
R4 N004 N005 225
Q2 Vout 0 N004 0 2N5551C
R1 N001 N002 2500
Q1 N002 Vin N003 0 2N5551C
R3 N003 N005 225
R2 N001 Vout 2500
V2 0 N006 15
C1 N001 Vout 10pF
V1 N001 0 15
I1 N005 N006 2mA
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.ac dec 10 1000k 1000000k
.step NPN 2N5551C (TF) 200p 1800p 400p
.include Cordell_Mods
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 788
WIRE 160 64 0 64
WIRE 272 64 160 64
WIRE 400 64 272 64
WIRE 0 112 0 64
WIRE 160 112 160 64
WIRE 272 112 272 64
WIRE 400 144 400 64
WIRE 160 208 160 192
WIRE 224 208 160 208
WIRE 272 208 272 176
WIRE 272 208 224 208
WIRE 0 256 0 192
WIRE 160 256 160 208
WIRE 400 288 400 224
WIRE 480 288 400 288
WIRE -128 304 -176 304
WIRE -64 304 -128 304
WIRE 400 304 400 288
WIRE 400 304 224 304
WIRE 480 304 480 288
WIRE 400 352 400 304
WIRE -176 368 -176 304
WIRE 0 384 0 352
WIRE 160 384 160 352
WIRE -176 496 -176 448
WIRE 0 496 0 464
WIRE 80 496 0 496
WIRE 160 496 160 464
WIRE 160 496 80 496
WIRE 80 512 80 496
WIRE 80 624 80 592
WIRE 400 624 400 432
WIRE 400 624 80 624
SYMBOL res -16 96 R0
WINDOW 0 41 29 Left 0
WINDOW 3 38 61 Left 0
SYMATTR InstName R1
SYMATTR Value 2500
SYMBOL voltage -176 352 R0
WINDOW 3 -323 109 Left 0
WINDOW 123 35 82 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 45 43 Left 0
SYMATTR Value SINE(0 0.1 1000 0 0 0 10)
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMBOL voltage 400 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 39 Left 0
WINDOW 3 42 76 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 400 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 41 42 Left 0
WINDOW 3 41 76 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL npn 224 256 M0
WINDOW 3 26 42 Left 0
WINDOW 0 68 9 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q2
SYMBOL current 80 512 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 44 25 Left 0
WINDOW 3 34 63 Left 0
SYMATTR InstName I1
SYMATTR Value 2mA
SYMBOL res 144 368 R0
SYMATTR InstName R4
SYMATTR Value 225
SYMBOL res 144 96 R0
WINDOW 0 39 26 Left 0
WINDOW 3 36 57 Left 0
SYMATTR InstName R2
SYMATTR Value 2500
SYMBOL cap 256 112 R0
WINDOW 3 30 50 Left 0
WINDOW 0 36 12 Left 0
SYMATTR Value 10pF
SYMATTR InstName C1
SYMBOL res -16 368 R0
SYMATTR InstName R3
SYMATTR Value 225
SYMBOL npn -64 256 R0
WINDOW 3 25 42 Left 0
WINDOW 0 67 11 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q1
FLAG 480 304 0
FLAG -176 496 0
FLAG -128 304 Vin
FLAG 224 208 Vout
TEXT -600 80 Left 0 !;op
TEXT -600 112 Left 0 !.ac dec 10 1000k 1000000k
TEXT -304 -128 Left 0 ;Demonstration Circuit step Tf of transistor
TEXT -600 152 Left 0 !.step NPN 2N5551C (TF) 200p 1800p 400p
TEXT -208 -88 Left 0 ;Step AC Transistor TF
TEXT -208 -48 Left 0 ;plot FR for different TF
TEXT -600 48 Left 0 !.include Cordell_Mods
TEXT 104 736 Left 0 ;copyright Cordell Audio 12/03/2010
* Z:\home\khalils\Downloads\files\data\raw_asc\19b34ead5a6f_gm_of_vgs_const_vds_ac.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot transconductance Gm as Id(M1) or I(Vds) to get Gm at 1Hz.
* Forward Conductance "Gm" Versus Gate Source Voltage at 1Hz\n \nPlot Id(M1) to get Gm versus Vgs. \nThe .AC command perfforms a small signal analysis and thus Id(M1)\nis the transconductance Gm.
* Gerneral hint for plots:\nMake the plot window active. \n"PlotSettings->Add Trace" and select an item\nor "right mouse button ->Add Trace" and select an item.
* Model from Philips Semiconductor
+ LEVEL=3
+ W=1E-3
+ L=1E-6
+ VTO=2
+ VMAX=1E6
+ RS=3
+ RD=3
+ CJ=0.001396
+ MJ=0.3936
+ THETA=1E-6
+ ETA=0.009307
+ KAPPA=2.226
M1 Vd Vg 0 0 BSS83
Vgs Vg 0 {VGS} AC 1
Vds Vd 0 {VDS}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.STEP PARAM VGS 0 5 .01
.OP
.AC LIST 1
.param VDS=5
.MODEL BSS83 NMOS
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1208 724
WIRE -96 320 -96 272
WIRE 96 432 96 608
WIRE 96 608 -96 608
WIRE -96 464 -96 416
WIRE -96 544 -96 608
WIRE -96 640 -96 608
WIRE -96 192 -96 144
WIRE 48 416 -96 416
WIRE -96 144 96 144
WIRE 96 144 96 336
SYMBOL voltage -96 176 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vds
SYMATTR Value {VDS}
SYMBOL voltage -96 448 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName Vgs
SYMATTR Value {VGS}
SYMBOL nmos 48 336 R0
SYMATTR InstName M1
SYMATTR Value BSS83
FLAG -96 640 0
FLAG -96 320 0
FLAG -96 144 Vd
FLAG -96 416 Vg
TEXT -112 -224 Left 0 !.STEP PARAM  VGS 0 5 .01
TEXT -112 -184 Left 0 !.OP
TEXT -112 -136 Left 0 !.AC LIST 1
TEXT 48 -136 Left 0 ;Plot transconductance Gm as Id(M1) or I(Vds) to get Gm at 1Hz.
TEXT -112 -416 Left 0 ;Forward Conductance "Gm" Versus Gate Source Voltage at 1Hz\n \nPlot Id(M1) to get Gm versus Vgs.  \nThe .AC command perfforms a small signal analysis and thus Id(M1)\nis the transconductance Gm.
TEXT -104 -40 Left 0 ;Gerneral hint for plots:\nMake the plot window active. \n"PlotSettings->Add Trace" and select an item\nor "right mouse button  ->Add Trace" and select an item.
TEXT -112 -264 Left 0 !.param VDS=5
TEXT 240 192 Left 0 !* Model from Philips Semiconductor\n.MODEL BSS83 NMOS\n+ LEVEL=3\n+ W=1E-3\n+ L=1E-6\n+ VTO=2\n+ VMAX=1E6\n+ RS=3\n+ RD=3\n+ CJ=0.001396\n+ MJ=0.3936\n+ THETA=1E-6\n+ ETA=0.009307\n+ KAPPA=2.226
* Z:\tmp\asc_dec_bjh7r6w2\033745688a27_TriangWave_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
C triang N001 1nF
R1 N002 triang 10K
R2 Sqr N002 47K
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -320 224 -320 -48
WIRE -272 224 -320 224
WIRE -208 112 -208 96
WIRE -144 224 -192 224
WIRE -144 224 -144 128
WIRE -128 96 -208 96
WIRE -128 128 -144 128
WIRE -112 224 -144 224
WIRE -96 80 -96 64
WIRE -96 176 -96 160
WIRE -32 112 -48 112
WIRE 0 112 -32 112
WIRE 0 112 0 80
WIRE 0 224 -32 224
WIRE 0 224 0 112
WIRE 16 112 0 112
WIRE 128 112 96 112
WIRE 128 112 128 0
WIRE 128 160 128 144
WIRE 160 0 128 0
WIRE 160 112 128 112
WIRE 160 144 128 144
WIRE 272 -48 -320 -48
WIRE 272 0 224 0
WIRE 272 0 272 -48
WIRE 272 128 224 128
WIRE 272 128 272 0
SYMBOL cap 224 -16 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C
SYMATTR Value 1nF
SYMBOL res -176 208 R90
WINDOW 0 58 109 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res -16 208 R90
WINDOW 0 53 -4 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 47K
FLAG -16 368 -V
FLAG -96 176 -V
FLAG 192 160 -V
FLAG 128 160 0
FLAG -208 112 0
FLAG 272 128 triang
FLAG -96 64 +V
FLAG -160 368 +V
FLAG 192 96 +V
FLAG -32 112 Sqr
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1962-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 1
Rload OUT 0 1K
XU1 OUT OUT N001 0 IN MP_01 MP_02 IN LT1962-1.8 ;pnba OUT)SENSE)BYP)GND)_SHDN)))IN
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1962-1.8.asy)
.lib LT1962-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 352 32 320 32
WIRE 416 32 352 32
WIRE 512 32 416 32
WIRE 16 48 -208 48
WIRE 32 48 16 48
WIRE 416 48 416 32
WIRE 512 48 512 32
WIRE -208 64 -208 48
WIRE 352 96 352 32
WIRE 352 96 320 96
WIRE 16 144 16 48
WIRE 32 144 16 144
WIRE 416 144 416 112
WIRE 512 144 512 128
WIRE -208 160 -208 144
WIRE 352 160 320 160
WIRE 176 240 176 208
FLAG -208 160 0
FLAG 416 144 0
FLAG 512 144 0
FLAG 176 240 0
FLAG 512 32 OUT
FLAG -208 48 IN
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 400 48 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMBOL res 496 32 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL LT1962-1.8 176 96 R0
SYMATTR InstName U1
TEXT 384 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\4a32ddbe0f03_ampl_op.asc
* Generated by LTspice 26.0.1 for Windows.
* https://vpayaem.ru/inf_transistor_oe.html?ysclid=m2sxfrgcad778345452
* .STEP temp list 20 50
+ BF={BF} IKF=0.3 XTB=1.5 BR=3
+ CJC=8E-12 CJE=25E-12 TR=100E-9 TF=400E-12
+ ITF=1 VTF=2 XTF=3 RB=10 RC=.3 RE=.2 Vceo=30 Icrating=800m mfg=NXP)
VCC N001 0 {VCC}
Q1 out N002 0 0 2N2222
R1 N001 out 99
R2 N001 N002 38.5k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.param BF=240
.model 2N2222 NPN(IS=1E-14 VAF=100
.param VCC=4.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 680
WIRE 240 -48 144 -48
WIRE 352 -48 240 -48
WIRE 240 -32 240 -48
WIRE 144 0 144 -48
WIRE 352 16 352 -48
WIRE 240 64 240 48
WIRE 240 80 240 64
WIRE 144 128 144 80
WIRE 176 128 144 128
WIRE 240 192 240 176
WIRE 352 192 352 96
WIRE 352 192 240 192
WIRE 240 208 240 192
SYMBOL res 128 -16 R0
WINDOW 3 -74 69 Left 2
SYMATTR Value 38.5k
SYMATTR InstName R2
SYMBOL voltage 352 0 R0
WINDOW 0 34 52 Left 2
WINDOW 3 35 93 Left 2
SYMATTR InstName VCC
SYMATTR Value {VCC}
SYMBOL res 224 -48 R0
WINDOW 3 36 61 Left 2
SYMATTR Value 99
SYMATTR InstName R1
SYMBOL npn 176 80 R0
WINDOW 3 34 50 Left 2
SYMATTR Value 2N2222
SYMATTR InstName Q1
FLAG 240 208 0
FLAG 240 64 out
TEXT 216 248 Left 2 !.op
TEXT -48 -80 Left 2 ;https://vpayaem.ru/inf_transistor_oe.html?ysclid=m2sxfrgcad778345452
TEXT 360 216 Left 2 !.param BF=240
TEXT 16 304 Left 2 !.model 2N2222 NPN(IS=1E-14 VAF=100\n+   BF={BF} IKF=0.3 XTB=1.5 BR=3\n+   CJC=8E-12 CJE=25E-12 TR=100E-9 TF=400E-12\n+   ITF=1 VTF=2 XTF=3 RB=10 RC=.3 RE=.2 Vceo=30 Icrating=800m  mfg=NXP)
TEXT 104 432 Left 2 ;.STEP temp list 20 50
TEXT 368 248 Left 2 !.param VCC=4.5
* Z:\home\khalils\Downloads\files\data\raw_asc\06a3a67595aa_slew_rate.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N004 N003 1k
XM1 N001 N004 0 BSS138P ;pnba D)G)S
V3 3V3 0 3.3
R2 5V OUT 1k
V1 5V 0 5
C1 OUT 0 1n
R4 OUT N001 47
C2 N001 N004 1n
R3 3V3 N003 1k
XM2 N003 N002 0 BSS138P ;pnba D)G)S
V2 N002 0 PULSE(0 3.3 0 1n 1n {1/baud} {2/baud})
.lib BSS138P_2011.txt
.tran {6/baud}
.param baud=25k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1400 680
WIRE 1088 80 784 80
WIRE 784 128 784 80
WIRE 1088 176 1088 80
WIRE 1088 176 1024 176
WIRE 1104 176 1088 176
WIRE 1200 176 1184 176
WIRE 1216 176 1200 176
WIRE 1344 176 1344 80
WIRE 1344 176 1216 176
WIRE 208 208 -32 208
WIRE 1200 224 1200 176
WIRE -32 256 -32 208
WIRE 528 256 528 208
WIRE 672 256 528 256
WIRE 784 256 784 192
WIRE 784 256 752 256
WIRE 976 256 784 256
WIRE 1024 320 1024 272
WIRE 1200 320 1200 288
WIRE 208 336 208 208
WIRE 480 336 208 336
SYMBOL res 1328 -16 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 1200 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 47
SYMBOL res 768 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -272 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 1184 224 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL nmos 480 256 R0
SYMATTR InstName M2
SYMATTR Value BSS138P
SYMATTR Prefix X
SYMBOL voltage -368 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL nmos 976 176 R0
SYMATTR InstName M1
SYMATTR Value BSS138P
SYMATTR Prefix X
SYMBOL voltage -32 240 R0
WINDOW 3 -512 59 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3.3 0 1n 1n {1/baud} {2/baud})
SYMATTR InstName V2
SYMBOL res 512 112 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL cap 768 128 R0
SYMATTR InstName C2
SYMATTR Value 1n
FLAG -368 16 0
FLAG -272 16 0
FLAG -32 336 0
FLAG -272 -64 5V
FLAG 1344 0 5V
FLAG -368 -64 3V3
FLAG 1216 176 OUT
FLAG 1024 320 0
FLAG 528 352 0
FLAG 528 128 3V3
FLAG 1200 320 0
TEXT -384 -240 Left 2 !.lib BSS138P_2011.txt
TEXT -392 152 Left 2 !.tran {6/baud}
TEXT -536 240 Left 2 !.param baud=25k
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1789-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1789-1.asy)
R1 N001 N002 {R}
V1 +v 0 5
V3 IN 0 AC 1
V2 -V 0 -5
XU1 N001 0 IN -V 0 OUT +v N002 LT1789-1 ;pnba RG1)IN-)IN+)VEE)REF)OUT)VCC)RG2
.ac dec 100 100 1Meg
.step PARAM R list 1e308 22.22K 2.0202K
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 788
WIRE -224 448 -224 432
WIRE -256 464 -464 464
WIRE -464 480 -464 464
WIRE -256 496 -352 496
WIRE -704 512 -704 496
WIRE -624 512 -624 496
WIRE 16 544 -80 544
WIRE -464 576 -464 560
WIRE -352 592 -352 576
WIRE -256 592 -352 592
WIRE -704 608 -704 592
WIRE -624 608 -624 592
WIRE -256 624 -288 624
WIRE -144 624 -144 608
WIRE -288 656 -288 624
WIRE -224 656 -224 640
SYMBOL voltage -464 464 R0
WINDOW 123 26 105 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value ""
SYMBOL voltage -624 496 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL LT1789-1 -224 544 R0
SYMATTR InstName U1
SYMBOL voltage -704 496 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -368 480 R0
SYMATTR InstName R1
SYMATTR Value {R}
FLAG -704 608 0
FLAG -624 608 0
FLAG -704 496 +v
FLAG -624 496 -V
FLAG -464 576 0
FLAG -464 464 IN
FLAG -144 624 0
FLAG 16 544 OUT
FLAG -288 656 0
FLAG -224 656 -V
FLAG -224 432 +v
TEXT -72 664 Left 2 !.ac dec 100 100 1Meg\n.step PARAM R list 1e308 22.22K 2.0202K
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3473A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3473A.asy)
C3 N004 0 .1
R2 N005 0 100K
V1 IN 0 3.6
R5 N004 IN 100K
C2 OUT 0 2.2
XU1 N003 OUT N007 N009 N006 N008 N005 IN N002 N004 IN N001 0 LT3473A ;pnba CAP)OUT)NB1)NE1)NB2)NE2)FB)CTRL)_Pgood)_SHDN)Vin)SW)GND
L1 IN N001 6.8
R4 N002 IN 10K
Rload OUT 0 312.5
C1 N003 0 .47
R1 N003 N005 2Meg
.tran 6m startup
.lib LT3473A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 692
WIRE -192 64 -288 64
WIRE 128 64 -192 64
WIRE 336 64 208 64
WIRE -288 80 -288 64
WIRE -192 144 -192 64
WIRE 16 144 -192 144
WIRE 336 144 336 64
WIRE 336 144 304 144
WIRE -288 176 -288 160
WIRE -192 224 -192 144
WIRE -112 224 -192 224
WIRE 16 224 -32 224
WIRE 544 224 304 224
WIRE 640 224 544 224
WIRE 640 240 640 224
WIRE 544 256 544 224
WIRE -192 304 -192 224
WIRE 16 304 -192 304
WIRE 352 304 304 304
WIRE 464 304 352 304
WIRE 464 320 464 304
WIRE 544 336 544 320
WIRE 640 336 640 320
WIRE -192 384 -192 304
WIRE -176 384 -192 384
WIRE -64 384 -96 384
WIRE 16 384 -64 384
WIRE 352 384 304 384
WIRE 352 400 352 384
WIRE 464 400 464 384
WIRE 16 464 0 464
WIRE 320 464 304 464
WIRE 352 496 352 480
WIRE 16 544 0 544
WIRE 320 544 304 544
WIRE 160 608 160 592
SYMBOL cap 528 256 R0
SYMATTR InstName C2
SYMATTR Value 2.2
SYMBOL cap 448 320 R0
SYMATTR InstName C1
SYMATTR Value .47
SYMBOL cap -80 384 R0
WINDOW 0 34 17 Left 2
WINDOW 3 35 50 Left 2
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL res 624 224 R0
SYMATTR InstName Rload
SYMATTR Value 312.5
SYMBOL voltage -288 64 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL res -16 240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 336 288 R0
SYMATTR InstName R1
SYMATTR Value 2Meg
SYMBOL ind 112 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMBOL PowerProducts\\LT3473A 160 336 R0
SYMATTR InstName U1
SYMBOL res -80 400 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 100K
SYMBOL res 336 384 R0
SYMATTR InstName R2
SYMATTR Value 100K
FLAG 160 608 0
FLAG 352 496 0
FLAG 544 336 0
FLAG 464 400 0
FLAG -288 176 0
FLAG 640 336 0
FLAG -64 448 0
FLAG -288 64 IN
FLAG 640 224 OUT
TEXT 472 464 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1559205db2ee_Fig20_13.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Is(M4P) and Id(M2N)
M3P N002 N002 VDD VDD P_1u l=90u w=10u
M1P N002 N002 0 0 N_1u l=2u w=10u
VDD VDD 0 5
M1N N001 N001 0 0 N_1u l=270u w=10u
M2N VDD N002 0 0 N_1u l=2u w=10u
M3N N001 N001 VDD VDD P_1u l=2u w=30u
M4P 0 N001 VDD VDD P_1u l=2u w=30u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.dc vdd 4.5 5.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1296 680
WIRE 592 -32 576 -32
WIRE 624 -32 592 -32
WIRE 1056 -32 1040 -32
WIRE 288 -16 288 -48
WIRE 288 0 288 -16
WIRE 528 64 528 48
WIRE 592 64 592 -32
WIRE 592 64 528 64
WIRE 992 64 992 48
WIRE 1056 64 1056 -32
WIRE 1056 64 992 64
WIRE 528 96 528 64
WIRE 992 96 992 64
WIRE 1136 96 1136 -48
WIRE 592 176 592 64
WIRE 592 176 576 176
WIRE 1056 176 1056 64
WIRE 1056 176 1040 176
WIRE 1088 176 1056 176
WIRE 528 224 528 192
WIRE 672 224 672 48
WIRE 992 224 992 192
WIRE 1136 224 1136 192
SYMBOL voltage 288 -16 R0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL pmos4 576 48 R180
WINDOW 0 63 16 Left 2
WINDOW 123 56 100 Left 2
SYMATTR InstName M3N
SYMATTR Value2 l=2u w=30u
SYMATTR Value P_1u
SYMBOL pmos4 1040 48 R180
WINDOW 0 63 16 Left 2
WINDOW 123 56 100 Left 2
SYMATTR InstName M3P
SYMATTR Value2 l=90u w=10u
SYMATTR Value P_1u
SYMBOL nmos4 1088 96 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M2N
SYMATTR Value N_1u
SYMBOL nmos4 576 96 M0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=270u w=10u
SYMATTR InstName M1N
SYMATTR Value N_1u
SYMBOL nmos4 1040 96 M0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M1P
SYMATTR Value N_1u
SYMBOL pmos4 624 48 M180
WINDOW 0 64 16 Left 2
WINDOW 123 56 100 Left 2
SYMATTR InstName M4P
SYMATTR Value2 l=2u w=30u
SYMATTR Value P_1u
FLAG 288 80 0
FLAG 288 -16 VDD
FLAG 528 0 VDD
FLAG 672 0 VDD
FLAG 528 -48 VDD
FLAG 672 -48 VDD
FLAG 528 224 0
FLAG 672 224 0
FLAG 528 144 0
FLAG 992 0 VDD
FLAG 992 -48 VDD
FLAG 992 224 0
FLAG 1136 224 0
FLAG 992 144 0
FLAG 1136 144 0
FLAG 1136 -48 VDD
TEXT 584 296 Left 2 !.include cmosedu_models.txt
TEXT 592 -136 Left 2 ;Plot Is(M4P) and Id(M2N)
TEXT 584 272 Left 2 !.dc vdd 4.5 5.5
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX22702D.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX22702D.asy)
C1 OUT 0 200p
V1 VDDA 0 5
V2 IN+ 0 PULSE(0 5 0 2n 2n 6u 12u)
V4 VDDB 0 20
XU1 VDDA IN+ IN- 0 VDDB OUT NC_01 0 MAX22702D ;pnba VDDA)IN+)IN-)GNDA)VDDB)OUT)ADJ)VSSB
V3 IN- 0 PULSE(0 5 0 2n 2n 3u 5u)
.tran 50u
.lib MAX22702D.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2212 708
WIRE 16 64 -592 64
WIRE 64 64 16 64
WIRE 448 64 384 64
WIRE 640 64 448 64
WIRE -592 112 -592 64
WIRE 640 128 640 64
WIRE 16 144 -464 144
WIRE 64 144 16 144
WIRE 448 144 384 144
WIRE 512 144 448 144
WIRE 512 160 512 144
WIRE -464 176 -464 144
WIRE 16 224 -304 224
WIRE 64 224 16 224
WIRE 512 224 512 208
WIRE 512 224 384 224
WIRE -592 272 -592 192
WIRE -304 272 -304 224
WIRE 512 272 512 224
WIRE 640 272 640 208
WIRE -464 288 -464 256
WIRE 64 304 16 304
WIRE -304 384 -304 352
WIRE 16 384 16 304
SYMBOL MAX22702D 224 144 R0
SYMATTR InstName U1
SYMBOL voltage -592 96 R0
WINDOW 0 21 107 Left 2
WINDOW 3 22 -9 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -304 256 R0
WINDOW 3 22 -12 Left 2
WINDOW 0 25 96 Left 2
SYMATTR Value PULSE(0 5 0 2n 2n 3u 5u)
SYMATTR InstName V3
SYMBOL voltage 640 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 20
SYMBOL voltage -464 160 R0
WINDOW 3 32 1 Left 2
WINDOW 0 28 101 Left 2
SYMATTR Value PULSE(0 5 0 2n 2n 6u 12u)
SYMATTR InstName V2
SYMBOL cap 496 160 R0
SYMATTR InstName C1
SYMATTR Value 200p
FLAG 16 384 0
FLAG -304 384 0
FLAG -464 288 0
FLAG 16 144 IN+
FLAG 16 224 IN-
FLAG 448 144 OUT
FLAG 16 64 VDDA
FLAG 448 64 VDDB
FLAG 512 272 0
FLAG -592 272 0
FLAG 640 272 0
TEXT 280 408 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1172HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1172HV.asy)
XU1 N003 N002 0 N001 IN LT1172 ;pnba Vc)FB)GND)SW)Vin
C3 N004 0 1
V1 IN 0 5
R3 N003 N004 1K
L1 IN N001 150 Rser=0.02 Rpar=5000
R2 N002 0 1.24K
Rload OUT 0 24
D1 N001 OUT MBRS360
C1 OUT 0 500 Rser=0.05
R1 OUT N002 10.7K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 25m startup
.lib LT1172.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2824 1472
WIRE 1824 880 1616 880
WIRE 1872 880 1824 880
WIRE 1984 880 1952 880
WIRE 2032 880 1984 880
WIRE 2176 880 2096 880
WIRE 2304 880 2176 880
WIRE 2432 880 2304 880
WIRE 1616 896 1616 880
WIRE 2304 896 2304 880
WIRE 2432 896 2432 880
WIRE 2176 928 2176 880
WIRE 1824 944 1824 880
WIRE 1616 992 1616 976
WIRE 2304 992 2304 960
WIRE 2432 992 2432 976
WIRE 1984 1024 1984 880
WIRE 1984 1024 1952 1024
WIRE 2176 1088 2176 1008
WIRE 2176 1088 1952 1088
WIRE 2176 1104 2176 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2176 1200 2176 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
SYMBOL RES 2160 1088 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
SYMBOL schottky 2032 896 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL VOLTAGE 1616 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LT1172HV 1824 1088 R0
SYMATTR InstName U1
SYMBOL RES 2160 912 R0
SYMATTR InstName R1
SYMATTR Value 10.7K
SYMBOL IND 1856 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL polcap 2288 896 R0
SYMATTR InstName C1
SYMATTR Value 500
SYMATTR SpiceLine Rser=0.05
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL RES 2416 880 R0
SYMATTR InstName Rload
SYMATTR Value 24
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1K
FLAG 2432 880 OUT
FLAG 2176 1200 0
FLAG 2304 992 0
FLAG 2432 992 0
FLAG 2064 1248 0
FLAG 1824 1248 0
FLAG 1616 992 0
FLAG 1616 880 IN
TEXT 2184 1248 Left 2 !.tran 25m startup