Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4221-2B.asc
* Generated by LTspice 26.0.1 for Windows.
* GND1 is modeled as common GND
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4221-2B.asy)
V1 VIA 0 PULSE(0 5 0 2n 2n 5u 10u)
R3 Gate_B N006 5.11
R2 Gate_A N001 5.11
V5 N002 0 15
V4 N005 0 0
V3 N003 0 5
C5 Gate_B 0 2.2n
XU2 VIA VIB N003 0 N005 0 N006 N004 0 N001 N002 ADuM4221-2B ;pnba VIA)VIB)VDD1)GND1)DISABLE)GNDB)VOB)VDDB)GNDA)VOA)VDDA
V2 VIB 0 PULSE(5 0 0 2n 2n 5u 10u)
V6 N004 0 15
C4 Gate_A 0 2.2n
.tran 50u
.lib ADuM4221-2B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 3080 680
WIRE -1808 -448 -2288 -448
WIRE -1728 -448 -1808 -448
WIRE -1120 -448 -1424 -448
WIRE -992 -448 -1040 -448
WIRE -864 -448 -992 -448
WIRE -816 -448 -864 -448
WIRE -2288 -416 -2288 -448
WIRE -992 -416 -992 -448
WIRE -1808 -384 -2192 -384
WIRE -1728 -384 -1808 -384
WIRE -1232 -384 -1424 -384
WIRE -1232 -368 -1232 -384
WIRE -2192 -352 -2192 -384
WIRE -992 -336 -992 -352
WIRE -1728 -320 -2064 -320
WIRE -1392 -320 -1424 -320
WIRE -1728 -240 -1760 -240
WIRE -1232 -240 -1424 -240
WIRE -2064 -224 -2064 -320
WIRE -1232 -224 -1232 -240
WIRE -1728 -176 -1984 -176
WIRE -1392 -176 -1424 -176
WIRE -1984 -128 -1984 -176
WIRE -1120 -112 -1424 -112
WIRE -992 -112 -1040 -112
WIRE -864 -112 -992 -112
WIRE -816 -112 -864 -112
WIRE -992 -80 -992 -112
WIRE -2288 16 -2288 -336
WIRE -2192 16 -2192 -272
WIRE -2064 16 -2064 -144
WIRE -1984 16 -1984 -48
WIRE -992 16 -992 -16
SYMBOL voltage -1984 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 0
SYMBOL ADuM4221-2B -1568 -352 R0
SYMATTR InstName U2
SYMBOL voltage -2288 -432 R0
WINDOW 0 26 98 Left 2
WINDOW 3 33 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 2n 2n 5u 10u)
SYMBOL voltage -1232 -384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 43 29 Left 2
WINDOW 3 46 61 Left 2
SYMATTR InstName V5
SYMATTR Value 15
SYMBOL voltage -2192 -368 R0
WINDOW 0 26 98 Left 2
WINDOW 3 33 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(5 0 0 2n 2n 5u 10u)
SYMBOL voltage -2064 -240 R0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res -1024 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5.11
SYMBOL cap -1008 -80 R0
SYMATTR InstName C5
SYMATTR Value 2.2n
SYMBOL voltage -1232 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 34 Left 2
WINDOW 3 45 64 Left 2
SYMATTR InstName V6
SYMATTR Value 15
SYMBOL cap -1008 -416 R0
SYMATTR InstName C4
SYMATTR Value 2.2n
SYMBOL res -1024 -464 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5.11
FLAG -1984 16 0
FLAG -1392 -176 0
FLAG -1232 -144 0
FLAG -864 -112 Gate_B
FLAG -864 -448 Gate_A
FLAG -992 16 0
FLAG -2288 16 0
FLAG -2064 16 0
FLAG -992 -336 0
FLAG -1808 -448 VIA
FLAG -1392 -320 0
FLAG -1760 -240 0
FLAG -1232 -288 0
FLAG -2192 16 0
FLAG -1808 -384 VIB
TEXT -1728 -8 Left 2 !.tran 50u
TEXT -1728 -32 Left 1 ;GND1 is modeled as common GND
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3009-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3009-3.3.asy)
Rload OUT 0 330
V1 IN 0 PWL(0 0 1 10)
XU1 IN OUT MP_01 0 IN LT3009-3.3 ;pnba IN)OUT))GND)_SHDN
C1 OUT 0 1
.tran 1
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 416 48 320 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 330
SYMBOL PowerProducts\\LT3009-3.3 176 96 R0
SYMATTR InstName U1
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 336 248 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1797.asc
* Generated by LTspice 26.0.1 for Windows.
* Ultra-Low Noise 5V Supply, Rail-to-Rail Output Amplier
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1028.asy)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1797.asy)
R3 N002 P001 1K
R2 N003 0 4.99K
XU1 N002 N003 +V -V OUT LT1797 ;pnba In+)In-)V+)V-)OUT
R5 OUT N001 4.87K tol=1 pwr=0.1
V1 +V 0 5
XU2 IN N001 +V -V N002 LT1028 ;pnba In+)In-)V+)V-)OUT
C1 P001 N001 2200p
V2 -V 0 -5
R1 OUT N003 10K
V3 IN 0 sine(0 10m 1K)
R4 N001 0 10
.tran 3m
.lib LT1028.lib
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -400 -48 -416 -48
WIRE -304 -48 -320 -48
WIRE -128 -48 -304 -48
WIRE 160 -48 -48 -48
WIRE -512 48 -512 32
WIRE -416 48 -416 32
WIRE -304 48 -304 -48
WIRE -288 48 -304 48
WIRE -128 48 -144 48
WIRE -64 48 -80 48
WIRE 32 48 16 48
WIRE 48 48 32 48
WIRE 160 48 160 -48
WIRE 160 48 128 48
WIRE -512 144 -512 128
WIRE -416 144 -416 128
WIRE 96 144 96 128
WIRE -224 160 -224 144
WIRE 32 160 32 48
WIRE 64 160 32 160
WIRE -304 176 -304 48
WIRE -256 176 -304 176
WIRE 160 176 160 48
WIRE 160 176 128 176
WIRE 208 176 160 176
WIRE -128 192 -128 48
WIRE -128 192 -192 192
WIRE 64 192 -128 192
WIRE -256 208 -352 208
WIRE -352 224 -352 208
WIRE 96 224 96 208
WIRE -224 240 -224 224
WIRE -352 320 -352 304
SYMBOL res -32 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 4.87K
SYMATTR SpiceLine tol=1 pwr=0.1
SYMBOL opamps\\LT1797 96 112 R0
SYMATTR InstName U1
SYMBOL res 32 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.99K
SYMBOL opamps\\LT1028 -224 128 R0
SYMATTR InstName U2
SYMBOL voltage -512 32 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -416 32 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -128 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL voltage -352 208 R0
SYMATTR InstName V3
SYMATTR Value sine(0  10m 1K)
SYMBOL res -304 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL cap -224 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2200p
SYMBOL res 144 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG -416 144 0
FLAG 96 128 +V
FLAG -416 32 +V
FLAG 96 224 -V
FLAG -512 144 0
FLAG -512 32 -V
FLAG -80 48 0
FLAG -224 144 +V
FLAG -224 240 -V
FLAG -416 -48 0
FLAG -352 320 0
FLAG 208 176 OUT
FLAG -352 208 IN
TEXT 48 288 Left 2 !.tran 3m
TEXT -96 -120 Bottom 2 ;Ultra-Low Noise 5V Supply, Rail-to-Rail Output Amplier
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8610.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N005 0 60.4K
C1 N003 0 .001
V1 IN 0 12
C2 N001 0 1
L1 N004 OUT 4.7 Rser=3m
C3 N002 N004 0.1
C4 OUT 0 47 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
R2 OUT N006 1Meg
R3 N006 0 243K
C5 OUT N006 10p
Rload OUT 0 2
XU1 0 N003 N005 IN IN N006 N004 NC_01 0 OUT N001 N002 0 LT8610 ;pnba SYNC)TR/SS)RT)EN/UV)VIN)FB)SW)PG)GND)BIAS)INTVcc)BST)PGND
.tran 750u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8610.asy)
.lib LT8610.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 680
WIRE 64 -80 -32 -80
WIRE 256 -80 64 -80
WIRE -32 -48 -32 -80
WIRE 256 -48 256 -80
WIRE 64 0 64 -80
WIRE 112 0 64 0
WIRE 416 0 400 0
WIRE 496 0 480 0
WIRE -32 48 -32 32
WIRE 112 96 64 96
WIRE 624 96 400 96
WIRE 432 192 400 192
WIRE 432 208 432 192
WIRE 32 288 16 288
WIRE 112 288 96 288
WIRE 432 288 432 272
WIRE 432 288 400 288
WIRE 512 288 432 288
WIRE 624 288 624 96
WIRE 624 288 592 288
WIRE 736 288 624 288
WIRE 832 288 736 288
WIRE 928 288 832 288
WIRE 624 304 624 288
WIRE 736 304 736 288
WIRE 832 304 832 288
WIRE 928 304 928 288
WIRE 112 384 32 384
WIRE 624 384 400 384
WIRE 736 384 736 368
WIRE 736 384 624 384
WIRE 32 400 32 384
WIRE 624 400 624 384
WIRE 832 400 832 368
WIRE 928 400 928 384
WIRE 192 448 192 432
WIRE 320 448 320 432
WIRE 32 496 32 480
WIRE 624 496 624 480
FLAG 192 448 0
FLAG 320 448 0
FLAG 32 496 0
FLAG 16 288 0
FLAG -32 48 0
FLAG 496 0 0
FLAG 832 400 0
FLAG 624 496 0
FLAG 928 400 0
FLAG 928 288 OUT
FLAG -32 -80 IN
FLAG 64 96 0
SYMBOL res 16 384 R0
SYMATTR InstName R1
SYMATTR Value 60.4K
SYMBOL cap 96 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .001
SYMBOL voltage -32 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 416 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL ind 496 304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=3m
SYMBOL cap 416 208 R0
SYMATTR InstName C3
SYMATTR Value 0.1
SYMBOL cap 816 304 R0
SYMATTR InstName C4
SYMATTR Value 47
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL res 608 288 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 608 384 R0
SYMATTR InstName R3
SYMATTR Value 243K
SYMBOL cap 720 304 R0
SYMATTR InstName C5
SYMATTR Value 10p
SYMBOL res 912 288 R0
SYMATTR InstName Rload
SYMATTR Value 2
SYMBOL LT8610 256 192 R0
SYMATTR InstName U1
TEXT 848 488 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0bf65ebef417_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N001 LED1 470
D5 DRV N003 D
DP2 DRV N002 D
DP1 DRV N001 D
R1 N003 0 470
DP3 N001 DRV D
V1 LED1 0 5
V3 DRV 0 0
V2 LED2 0 0
DP4 N002 DRV D
R2 N002 LED2 470
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 1060
WIRE 384 176 256 176
WIRE 48 272 -80 272
WIRE 192 272 192 176
WIRE 192 272 128 272
WIRE 192 352 192 272
WIRE 384 352 384 176
WIRE 384 352 256 352
WIRE 384 464 384 352
WIRE 384 464 256 464
WIRE 48 544 -80 544
WIRE 192 544 192 464
WIRE 192 544 128 544
WIRE 192 608 192 544
WIRE 384 608 384 464
WIRE 384 608 256 608
WIRE -832 720 -832 688
WIRE -688 720 -688 688
WIRE -528 720 -528 688
WIRE 384 736 384 608
WIRE 384 736 80 736
WIRE 384 768 384 736
WIRE -832 848 -832 800
WIRE -688 848 -688 800
WIRE -528 848 -528 800
WIRE 384 896 384 832
WIRE 384 1040 384 976
SYMBOL res 144 528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 470
SYMBOL LED 368 768 R0
SYMATTR InstName D5
SYMBOL LED 256 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 72 32 VTop 2
SYMATTR InstName P1
SYMBOL res 144 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 470
SYMBOL voltage -528 704 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 0
SYMBOL LED 192 368 R270
WINDOW 0 72 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName P3
SYMBOL voltage -688 704 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL res 368 880 R0
SYMATTR InstName R1
SYMATTR Value 470
SYMBOL LED 192 624 R270
WINDOW 0 72 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName P4
SYMBOL voltage -832 704 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL LED 256 448 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 72 32 VTop 2
SYMATTR InstName P2
FLAG 384 1040 0
FLAG -832 848 0
FLAG -688 848 0
FLAG -528 848 0
FLAG -528 688 DRV
FLAG -688 688 LED2
FLAG -832 688 LED1
FLAG 80 736 DRV
FLAG -80 272 LED1
FLAG -80 544 LED2
TEXT -200 952 Left 2 !.tran 0 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8310.asc
* Generated by LTspice 26.0.1 for Windows.
* RF Signal Generator
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8310.asy)
XU1 INLO 0 N006 vOUT N001 N005 N002 INHI AD8310 ;pnba INLO)COMM)OFLT)VOUT)VPOS)BFIN)ENBL)INHI
R3 vOUT 0 10Meg
C2 INLO 0 10n
V3 N001 0 5
C3 N005 0 10p
V4 N002 0 5
R1 N004 0 52.3
C4 N006 0 10p
V1 N003 0 SINE(0 {2*pow(10,dBV/20)} {fin})
R2 N003 N004 50
C1 INHI N004 10n
.tran 400n
.param fin=1e8
.param dBV 10
.lib AD8310.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 7424 924
WIRE 2736 -1200 2256 -1200
WIRE 2736 -1104 2736 -1200
WIRE 2816 -1104 2736 -1104
WIRE 3472 -1104 3136 -1104
WIRE 3472 -1072 3472 -1104
WIRE 2432 -1056 2368 -1056
WIRE 2592 -1056 2512 -1056
WIRE 2640 -1056 2592 -1056
WIRE 2736 -1056 2704 -1056
WIRE 2256 -1008 2256 -1200
WIRE 2368 -1008 2368 -1056
WIRE 2592 -1008 2592 -1056
WIRE 2736 -1008 2736 -1056
WIRE 2768 -1008 2736 -1008
WIRE 2816 -1008 2768 -1008
WIRE 3376 -1008 3136 -1008
WIRE 3376 -960 3376 -1008
WIRE 3472 -960 3472 -992
WIRE 2768 -912 2736 -912
WIRE 2816 -912 2768 -912
WIRE 3200 -912 3136 -912
WIRE 3296 -912 3200 -912
WIRE 2256 -880 2256 -928
WIRE 2368 -864 2368 -928
WIRE 2432 -864 2368 -864
WIRE 2592 -864 2592 -928
WIRE 2592 -864 2432 -864
WIRE 2640 -864 2592 -864
WIRE 2736 -864 2736 -912
WIRE 2736 -864 2704 -864
WIRE 3296 -864 3296 -912
WIRE 3376 -864 3376 -896
WIRE 2432 -832 2432 -864
WIRE 2816 -816 2784 -816
WIRE 3216 -816 3136 -816
WIRE 3216 -784 3216 -816
WIRE 3296 -768 3296 -784
WIRE 3216 -688 3216 -720
RECTANGLE Normal 2528 -800 2320 -1120 2
SYMBOL cap 2704 -1072 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL voltage 2368 -1024 R0
WINDOW 3 -143 259 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 {2*pow(10,dBV/20)} {fin})
SYMATTR InstName V1
SYMBOL cap 3360 -960 R0
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL voltage 3472 -1088 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL AD8310 2976 -960 R0
SYMATTR InstName U1
SYMBOL res 3280 -880 R0
SYMATTR InstName R3
SYMATTR Value 10Meg
SYMBOL res 2416 -1040 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL res 2576 -1024 R0
SYMATTR InstName R1
SYMATTR Value 52.3
SYMBOL voltage 2256 -1024 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL cap 3200 -784 R0
SYMATTR InstName C4
SYMATTR Value 10p
SYMBOL cap 2704 -880 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
FLAG 3200 -912 vOUT
FLAG 2784 -816 0
FLAG 3472 -960 0
FLAG 2432 -832 0
FLAG 3296 -768 0
FLAG 3376 -864 0
FLAG 3216 -688 0
FLAG 2256 -880 0
FLAG 2768 -1008 INHI
FLAG 2768 -912 INLO
TEXT 2896 -696 Left 2 !.tran 400n
TEXT 2312 -1136 Left 2 ;RF Signal Generator
TEXT 2576 -720 Left 2 !.param fin=1e8\n.param dBV 10
* Z:\home\khalils\Downloads\files\data\raw_asc\1de0eb63222c_LP_RC_FILT.asc
* Generated by LTspice 26.0.1 for Windows.
R1 0 N001 12
C1 N001 in 1n
V1 in 0 AC 1 0
R2 out 0 50
C2 out N001 25n
.ac oct 1000 150k 150meg
* RC High Pass Filter
* Case 1, Load has high input impedence (open).\nCut-off Frequency = 1/ (2*PI*R*C).\nCut-off Frequency = 12.7 MHz..\nCase 2. Load has 50 ohms impedence ( My R3261C).\nFrom Simulation, Cut-off Frequency = 15.7 MHz.
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 32 160 -96 160
WIRE 96 160 32 160
WIRE 224 160 160 160
WIRE 256 160 224 160
WIRE 368 160 320 160
WIRE 368 176 368 160
WIRE -96 192 -96 160
WIRE 224 192 224 160
WIRE 224 304 224 272
FLAG 32 160 in
FLAG 368 160 out
FLAG 224 304 0
FLAG -96 272 0
FLAG 368 256 0
SYMBOL res 240 288 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 12
SYMBOL cap 160 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL voltage -96 176 R0
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1 0
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL res 352 160 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL cap 320 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 25n
TEXT -120 328 Left 2 !.ac oct 1000 150k 150meg
TEXT -24 72 Left 4 ;RC High Pass Filter
TEXT 440 152 Left 2 ;Case 1, Load has high input impedence (open).\nCut-off Frequency = 1/ (2*PI*R*C).\nCut-off Frequency = 12.7 MHz..\nCase 2. Load has 50 ohms impedence ( My R3261C).\nFrom Simulation, Cut-off Frequency = 15.7 MHz.
* Z:\home\khalils\Downloads\files\data\raw_asc\3259c3b93aea_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
V2 P001 0 V
XU1 N002 N001 P001 P002 N001 opamp2 ;pnba In+)In-)V+)V-)OUT
V1 0 P002 V
V3 N002 0 PULSE(0 1 0 1n 1n 5u 10u)
C1 N001 0 10f
.tran 100u
.lib LM741.MOD
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 0 96 0
WIRE 96 144 96 0
WIRE 176 144 96 144
WIRE 304 160 304 0
WIRE 304 160 240 160
WIRE 400 160 304 160
WIRE 176 176 -32 176
SYMBOL Opamps\\opamp2 208 96 R0
SYMATTR InstName U1
SYMBOL cap 384 160 R0
SYMATTR InstName C1
SYMATTR Value 10f
SYMBOL voltage -32 160 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 0 1n 1n 5u 10u)
SYMBOL voltage 208 144 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMBOL voltage 208 288 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
FLAG 208 272 0
FLAG 208 48 0
FLAG -32 256 0
FLAG 400 224 0
TEXT 288 328 Left 2 !.tran 100u
TEXT 288 368 Left 2 !.lib LM741.MOD
* Z:\tmp\asc_dec_bjh7r6w2\103324341d24_Draft1_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
Rout Vout 0 100k
R_fb Vout N001 50k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 -16 0 -16
WIRE 480 -16 304 -16
WIRE 224 96 32 96
WIRE 224 128 224 96
WIRE 192 144 0 144
WIRE 320 160 256 160
WIRE 480 160 480 -16
WIRE 480 160 320 160
WIRE 480 192 480 160
WIRE 480 320 480 272
SYMBOL res 464 176 R0
SYMATTR InstName Rout
SYMATTR Value 100k
SYMBOL res 320 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R_fb
SYMATTR Value 50k
FLAG 480 320 0
FLAG 320 160 Vout
* Z:\home\khalils\Downloads\files\data\raw_asc\0bb778c1d221_CH04-KP2-01.asc
* Generated by LTspice 26.0.1 for Windows.
V3 ctrl 0 PULSE(0 1 0 1n 1n 50 50 1)
V2 N004 0 8
L1 N003 vc 1 Rser=0
V1 N001 0 5
S2 N004 N002 ctrl 0 SW2
C1 vc 0 0.4
S1 N001 N002 ctrl 0 SW1
R1 N003 N002 10
.model SW2 SW(Ron=1n Roff=1Meg Vt=.5)
.model SW1 SW(Ron=1Meg Roff=1n Vt=.5)
.tran 15
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 992 680
WIRE 16 144 -48 144
WIRE 448 144 96 144
WIRE 560 144 448 144
WIRE 768 144 640 144
WIRE 32 208 32 192
WIRE 768 208 768 144
WIRE 256 256 128 256
WIRE 448 256 448 144
WIRE 448 256 336 256
WIRE 272 320 272 304
WIRE 768 320 768 288
WIRE 768 336 768 320
WIRE -48 352 -48 144
WIRE 128 352 128 256
WIRE 128 448 128 432
WIRE 768 448 768 400
WIRE 768 448 128 448
WIRE -48 464 -48 432
WIRE 128 464 128 448
WIRE 656 640 656 608
SYMBOL sw 240 256 R270
SYMATTR InstName S2
SYMATTR Value SW2
SYMBOL voltage -48 336 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 752 192 R0
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=0
SYMBOL voltage 656 512 R0
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 0 1n 1n 50 50 1)
SYMBOL sw 0 144 R270
SYMATTR InstName S1
SYMATTR Value SW1
SYMBOL cap 752 336 R0
SYMATTR InstName C1
SYMATTR Value 0.4
SYMBOL res 656 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage 128 336 R0
SYMATTR InstName V2
SYMATTR Value 8
FLAG 656 640 0
FLAG 128 464 0
FLAG -48 464 0
FLAG 32 208 0
FLAG 272 320 0
FLAG 656 528 ctrl
FLAG 80 192 ctrl
FLAG 320 304 ctrl
FLAG 768 320 vc
TEXT -56 552 Left 2 !.model SW2 SW(Ron=1n Roff=1Meg Vt=.5)\n.model SW1 SW(Ron=1Meg Roff=1n Vt=.5)\n.tran 15
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3542-1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 3.6
L1 N001 OUT 2.2
C1 OUT 0 10
Rload OUT 0 5.6
XU1 OUT IN 0 N001 0 IN LTC3542-1 ;pnba Vout)Vin)GND)SW)Mode)Run
.tran 2.5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3542-1.asy)
.lib LTC3542-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 16 -16 16
WIRE 224 16 64 16
WIRE -16 32 -16 16
WIRE 224 32 224 16
WIRE 64 96 64 16
WIRE 80 96 64 96
WIRE 400 96 368 96
WIRE 512 96 480 96
WIRE 560 96 512 96
WIRE 656 96 560 96
WIRE 560 112 560 96
WIRE 656 112 656 96
WIRE -16 128 -16 112
WIRE 560 208 560 176
WIRE 656 208 656 192
WIRE 80 256 64 256
WIRE 512 256 512 96
WIRE 512 256 368 256
WIRE 224 336 224 320
FLAG -16 128 0
FLAG 64 256 0
FLAG 224 336 0
FLAG 656 208 0
FLAG 560 208 0
FLAG 656 96 OUT
FLAG -16 16 IN
SYMBOL voltage -16 16 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL ind 384 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL cap 544 112 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 640 96 R0
SYMATTR InstName Rload
SYMATTR Value 5.6
SYMBOL PowerProducts\\LTC3542-1 224 176 R0
SYMATTR InstName U1
TEXT 456 328 Left 2 !.tran 2.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5770R.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5770R.asy)
V1 N001 0 1.95
CLOAD iOUT 0 4.7
RLOAD iOUT 0 5
XU1 vDAC iOUT N001 N002 0 AD5770R Range=1 ;pnba Vdac)Iout)PVdd)PVee)GND
V2 N002 0 -1.5
Vdac vDAC 0 PWL(0 0 10u 0 +10n 1.95 200u 1.95 +10n 0.9)
.tran 350u
.lib AD5770R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -32 -240 -128
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 64 112 0 112
WIRE 112 112 64 112
WIRE 272 112 112 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -800 272 -800 112
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -304 288 -304 256
WIRE -176 352 -176 256
WIRE -800 384 -800 352
WIRE -176 464 -176 432
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 4.7
SYMBOL voltage -176 336 R0
SYMATTR InstName V2
SYMATTR Value -1.5
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
SYMATTR Value 1.95
SYMBOL voltage -800 256 R0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0 10u 0 +10n 1.95 200u 1.95 +10n 0.9)
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 5
SYMBOL AD5770R -208 112 R0
SYMATTR InstName U1
FLAG 64 112 iOUT
FLAG -800 384 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -304 288 0
FLAG -176 464 0
FLAG 112 272 0
FLAG 272 272 0
TEXT 48 392 Left 2 !.tran 350u