Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\3c5aae79c4e0_Cmos_inverter.asc
* Generated by LTspice 26.0.1 for Windows.
* CMOS Inverter
M1 N003 N002 0 0 NMOS
M2 N003 N002 N001 N001 PMOS
V2 N001 0 2.5
V1 N002 0 PULSE(0 2.5 0 1n 1n 10m 20m)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 -208 -112 -208
WIRE 224 -176 224 -208
WIRE 224 -32 224 -96
WIRE 176 -16 112 -16
WIRE 112 96 112 -16
WIRE 112 96 -48 96
WIRE 224 112 224 64
WIRE 368 112 224 112
WIRE -48 128 -48 96
WIRE 224 160 224 112
WIRE 112 240 112 96
WIRE 176 240 112 240
WIRE -112 288 -112 -208
WIRE -48 288 -48 208
WIRE -48 288 -112 288
WIRE 224 288 224 256
WIRE 224 288 -48 288
WIRE 224 336 224 288
SYMBOL pmos 176 64 M180
SYMATTR InstName M2
SYMBOL voltage 224 -80 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 2.5
SYMBOL nmos 176 160 R0
SYMATTR InstName M1
SYMBOL voltage -48 112 R0
WINDOW 3 -372 97 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 2.5 0 1n 1n 10m 20m)
FLAG 224 336 0
TEXT -168 360 Left 2 !.tran 100m
TEXT -304 -48 Left 2 ;CMOS Inverter
* Z:\home\khalils\Downloads\files\data\raw_asc\7f053e0880e0_highpass1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 P001 0 5k
C1 N001 P001 0.001micro
V1 N001 0 SINE(0 2 16khz)
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 64 128 64
WIRE 128 144 128 64
WIRE 128 256 128 224
WIRE 304 256 304 208
SYMBOL cap 288 64 R0
WINDOW 0 24 8 Left 1
WINDOW 3 127 40 Right 1
SYMATTR InstName C1
SYMATTR Value 0.001micro
SYMBOL res 288 112 R0
WINDOW 0 58 40 Right 1
WINDOW 3 36 76 Left 1
SYMATTR InstName R1
SYMATTR Value 5k
SYMBOL voltage 128 128 R0
WINDOW 3 -158 76 Left 1
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 2 16khz)
FLAG 128 256 0
FLAG 304 256 0
TEXT -32 280 Left 2 !.tran 1
* Z:\tmp\asc_dec_bjh7r6w2\070be14aa3cc_Pierce_new1_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N002 N001 0 0 MHCNEN
C1 N001 0 62p
R1 N003 N001 1Meg
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1372 904
WIRE 208 -64 208 -128
WIRE -32 -48 -32 -80
WIRE 16 -48 -32 -48
WIRE 160 -48 144 -48
WIRE -32 -32 -32 -48
WIRE 208 48 208 32
WIRE 320 48 208 48
WIRE 368 48 320 48
WIRE -32 64 -32 48
WIRE 144 64 144 -48
WIRE 144 64 80 64
WIRE 208 64 208 48
WIRE 320 112 320 48
WIRE 144 144 144 64
WIRE 160 144 144 144
WIRE 208 176 208 160
WIRE 80 240 80 64
WIRE 144 240 80 240
WIRE 160 240 144 240
WIRE 256 240 224 240
WIRE 320 240 320 192
WIRE 320 240 256 240
WIRE 80 256 80 240
WIRE 320 256 320 240
WIRE 144 320 144 240
WIRE 160 320 144 320
WIRE 256 320 256 240
WIRE 256 320 240 320
WIRE 320 352 320 320
WIRE 80 368 80 320
SYMBOL nmos 160 64 R0
SYMATTR InstName M1
SYMATTR Value MHCNEN
SYMBOL cap 64 256 R0
SYMATTR InstName C1
SYMATTR Value 62p
SYMBOL res 256 304 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1Meg
FLAG 320 352 0
FLAG -32 64 0
FLAG 208 -128 VCC
FLAG 80 368 0
FLAG 208 176 0
FLAG 16 -48 G
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8056.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 0 43.2K
V1 IN 0 32
R2 OUT N001 100K
R3 N001 0 5.32K
C1 OUT 0 22 V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
C2 OUT 0 33 V=20 Irms=0 Rser=0.2 Lser=0 mfg="KEMET" pn="T495D336M020AS" type="Tantalum"
Rload OUT 0 6
XU1 NC_01 NC_02 MP_03 0 MP_04 MP_05 NC_06 NC_07 IN IN IN IN MP_08 MP_09 MP_10 MP_11 MP_12 MP_13 MP_14 MP_15 MP_16 MP_17 MP_18 MP_19 OUT OUT MP_20 MP_21 MP_22 0 MP_23 NC_24 NC_25 NC_26 N002 NC_27 N001 LTM8056 ;pnba CTL)SS))LL)))IOUTmon)IINmon)Run)Iin)Vin)SVin)))))))))))))Vout)Iout))))GND))Mode)CLKout)Sync)RT)Comp)FB
.tran 1.5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8056.asy)
.lib LTM8056.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 728
WIRE -32 -192 -128 -192
WIRE -16 -192 -32 -192
WIRE 416 -192 400 -192
WIRE 464 -192 416 -192
WIRE 576 -192 464 -192
WIRE 656 -192 576 -192
WIRE 736 -192 656 -192
WIRE -128 -176 -128 -192
WIRE 464 -176 464 -192
WIRE 576 -176 576 -192
WIRE 656 -176 656 -192
WIRE 736 -176 736 -192
WIRE -32 -96 -32 -192
WIRE -16 -96 -32 -96
WIRE 416 -96 416 -192
WIRE 416 -96 400 -96
WIRE -128 -80 -128 -96
WIRE 576 -80 576 -112
WIRE 656 -80 656 -112
WIRE 736 -80 736 -96
WIRE -32 0 -32 -96
WIRE -16 0 -32 0
WIRE 464 0 464 -96
WIRE 464 0 400 0
WIRE 464 16 464 0
WIRE -32 96 -32 0
WIRE -16 96 -32 96
WIRE 464 112 464 96
WIRE -16 480 -32 480
WIRE -112 576 -128 576
WIRE -16 576 -32 576
WIRE 416 576 400 576
FLAG -128 576 0
FLAG -32 480 0
FLAG -128 -80 0
FLAG 416 576 0
FLAG 464 112 0
FLAG 576 -80 0
FLAG 656 -80 0
FLAG 736 -80 0
FLAG 736 -192 OUT
FLAG -128 -192 IN
SYMBOL res -16 560 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 43.2K
SYMBOL voltage -128 -192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 32
SYMBOL res 448 -192 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL res 448 0 R0
SYMATTR InstName R3
SYMATTR Value 5.32K
SYMBOL cap 560 -176 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
SYMBOL polcap 640 -176 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 33
SYMATTR InstName C2
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=20 Irms=0 Rser=0.2 Lser=0 mfg="KEMET" pn="T495D336M020AS" type="Tantalum"
SYMBOL res 720 -192 R0
SYMATTR InstName Rload
SYMATTR Value 6
SYMBOL PowerProducts\\LTM8056 192 192 R0
SYMATTR InstName U1
TEXT 632 560 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\280be2dbbd15_circuito_simulacin_T2_normalizado.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 N002 0.664
XU3 N005 0 V3 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R3 V3 N001 2.02
R6 N004 N006 1
R4 N002 N001 0.664
C2 V3 N005 1.6
R5 N006 Vin 1
XU1 N001 N006 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
XU2 N003 0 N004 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
V1 Vin 0 AC 1
C1 N004 N003 1.6
R2 N005 N004 0.391
.lib opamp.sub
.ac dec 1000 0.001 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 -48 -32 -48
WIRE 624 -48 320 -48
WIRE -32 0 -32 -48
WIRE 0 0 -32 0
WIRE 96 0 80 0
WIRE 272 32 240 32
WIRE 352 32 336 32
WIRE 528 32 496 32
WIRE 624 32 624 -48
WIRE 624 32 592 32
WIRE -32 96 -32 0
WIRE 0 96 -32 96
WIRE 96 112 96 0
WIRE 96 112 64 112
WIRE 128 112 96 112
WIRE 240 112 240 32
WIRE 240 112 208 112
WIRE 272 112 240 112
WIRE -144 128 -224 128
WIRE -32 128 -64 128
WIRE 0 128 -32 128
WIRE 352 128 352 32
WIRE 352 128 336 128
WIRE 384 128 352 128
WIRE 496 128 496 32
WIRE 496 128 464 128
WIRE 528 128 496 128
WIRE 272 144 256 144
WIRE 624 144 624 32
WIRE 624 144 592 144
WIRE 528 160 512 160
WIRE -224 176 -224 128
WIRE 256 176 256 144
WIRE 512 192 512 160
WIRE -32 256 -32 128
WIRE 80 256 -32 256
WIRE 352 256 352 128
WIRE 352 256 160 256
SYMBOL res 96 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 0.664
SYMBOL res 480 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 0.391
SYMBOL voltage -224 160 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL OpAmps\\opamp 304 64 R0
SYMATTR InstName U2
SYMBOL OpAmps\\opamp 32 48 R0
SYMATTR InstName U1
SYMBOL res -48 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1
SYMBOL res 336 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2.02
SYMBOL cap 592 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1.6
SYMBOL res 224 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 0.664
SYMBOL res 176 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 1
SYMBOL OpAmps\\opamp 560 80 R0
SYMATTR InstName U3
SYMBOL cap 336 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1.6
FLAG 256 176 0
FLAG 512 192 0
FLAG -224 128 Vin
FLAG 624 144 V3
FLAG -224 256 0
TEXT 224 312 Left 2 !.lib opamp.sub
TEXT 224 336 Left 2 !.ac dec 1000 0.001 10
* Z:\home\khalils\Downloads\files\data\raw_asc\d3aab9215306_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
VCC N001 0 15
RB B N002 22K
VBB N002 0 5
RC C N001 100
Q1 C B 0 0 NPN
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VBB 0 5 0.5m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 400 -160 368 -160
WIRE 512 -160 400 -160
WIRE 688 -160 592 -160
WIRE 128 -112 32 -112
WIRE 272 -112 208 -112
WIRE 304 -112 272 -112
WIRE 688 -80 688 -160
WIRE 32 -48 32 -112
WIRE 368 0 368 -64
WIRE 688 32 688 0
WIRE 32 64 32 32
SYMBOL res 224 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RB
SYMATTR Value 22K
SYMBOL res 496 -176 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RC
SYMATTR Value 100
SYMBOL voltage 32 -64 R0
SYMATTR InstName VBB
SYMATTR Value 5
SYMBOL npn 304 -160 R0
SYMATTR InstName Q1
SYMBOL voltage 688 -96 R0
SYMATTR InstName VCC
SYMATTR Value 15
FLAG 688 32 0
FLAG 368 0 0
FLAG 32 64 0
FLAG 272 -112 B
FLAG 400 -160 C
FLAG 368 -64 E
TEXT 336 128 Left 2 !.dc VBB 0 5 0.5m
* Z:\home\khalils\Downloads\files\data\raw_asc\0e8ab75284d6_1N4007.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 0 D1N4007
V1 N001 0 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
* .lib http://www.onsemi.com/pub_link/Collateral/1N4007.REV0.LIB
.dc V1 -1 1 10m
**************************************
* Model Generated by MODPEX *
*Copyright(c) Symmetry Design Systems*
* All Rights Reserved *
* UNPUBLISHED LICENSED SOFTWARE *
* Contains Proprietary Information *
* Which is The Property of *
* SYMMETRY OR ITS LICENSORS *
*Commercial Use or Resale Restricted *
* by Symmetry License Agreement *
**************************************
* Model generated on May 30, 03
* MODEL FORMAT: PSpice
.MODEL D1N4007 D
+IS=7.02767e-09 RS=0.0341512 N=1.80803 EG=1.05743
+XTI=5 BV=1000 IBV=5e-08 CJO=1e-11
+VJ=0.7 M=0.5 FC=0.5 TT=1e-07
+KF=0 AF=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1540 680
WIRE 192 64 64 64
WIRE 64 112 64 64
WIRE 192 112 192 64
WIRE 64 240 64 192
WIRE 192 240 192 176
FLAG 64 240 0
FLAG 192 240 0
SYMBOL diode 176 112 R0
SYMATTR InstName D1
SYMATTR Value D1N4007
SYMBOL voltage 64 96 R0
SYMATTR InstName V1
SYMATTR Value 0
TEXT -8 440 Left 0 ;.lib http://www.onsemi.com/pub_link/Collateral/1N4007.REV0.LIB
TEXT 48 312 Left 0 !.dc V1 -1 1 10m
TEXT 352 -72 Left 0 !**************************************\n*      Model Generated by MODPEX     *\n*Copyright(c) Symmetry Design Systems*\n*         All Rights Reserved        *\n*    UNPUBLISHED LICENSED SOFTWARE   *\n*   Contains Proprietary Information *\n*      Which is The Property of      *\n*     SYMMETRY OR ITS LICENSORS      *\n*Commercial Use or Resale Restricted *\n*   by Symmetry License Agreement    *\n**************************************\n* Model generated on May 30, 03\n* MODEL FORMAT: PSpice\n.MODEL D1N4007 D\n+IS=7.02767e-09 RS=0.0341512 N=1.80803 EG=1.05743\n+XTI=5 BV=1000 IBV=5e-08 CJO=1e-11\n+VJ=0.7 M=0.5 FC=0.5 TT=1e-07\n+KF=0 AF=1
* Z:\home\khalils\Downloads\files\data\raw_asc\1b066b48e646_Draft59.asc
* Generated by LTspice 26.0.1 for Windows.
* leakage very low. even in overvoltage situation.
R1 PV P001 100k
J1 P001 N001 0 J201
V2 PV 0 100V
V1 0 N001 10V
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.tran 10ms
.include 74hc.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2756 1020
WIRE -112 80 -128 80
WIRE -64 80 -112 80
WIRE -112 224 -112 80
WIRE -112 224 -192 224
SYMBOL voltage -336 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
WINDOW 3 32 8 Left 2
SYMATTR InstName V2
SYMATTR Value 100V
SYMBOL res -32 -80 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage -192 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
WINDOW 3 32 8 Left 2
SYMATTR InstName V1
SYMATTR Value 10V
SYMBOL njf -64 16 R0
WINDOW 0 132 56 Right 2
WINDOW 3 158 82 Right 2
SYMATTR InstName J1
SYMATTR Value J201
FLAG -336 48 PV
FLAG -336 128 0
FLAG -16 -64 PV
FLAG -16 112 0
FLAG -192 144 0
TEXT -376 -200 Left 2 !.tran 10ms
TEXT -376 -120 Left 2 !.include 74hc.lib
TEXT 224 -104 Left 2 ;leakage very low. even in overvoltage situation.
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP122-2.6.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP122-2.6.asy)
C2 OUT 0 1
XU1 OUT MP_01 0 IN MP_02 IN ADP122 K=1/5200 ;pnba Vout))GND)En))Vin
Rload OUT 0 100
C1 IN 0 1
V1 IN 0 5.5
.tran 10m startup
.lib ADP122.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL ADP122-2.6 256 208 R0
SYMATTR InstName U1
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\265d7acf47e9_am.asc
* Generated by LTspice 26.0.1 for Windows.
* Amplitude modulation demonstrator:\n \nA = the audio signal\nB = the carrier signal\nAM is ordinary amplitude modulation\nDSBSC is a double sideband supressed carier signal\nSSBSC is a single sideband supressed carrier signal (lower sideband)\nUSB is also SSBSC but is the upper sideband signal\nAcos and Bcos are phase shifted (90 degrees) audio and carrier signals\nSchuler, 7th edition, Chapter 12 and page 516
* Run the simulation\nand inspect the waveforms.\nRight-click in the waveform\nwindow and choose FFT\nto view the spectral content.
B3 SSBSC 0 V=V(acos)*V(bcos)+V(a)*V(b)
B4 USB 0 V=V(acos)*V(bcos)-V(a)*V(b)
B1 AM 0 V=V(a)*V(b)+V(b)
V3 Acos 0 SINE(0 .9 30 0 0 90)
V2 B 0 SINE(0 1 1000)
B2 DSBSC 0 V=V(a)*V(b)
V1 A 0 SINE(0 .9 30)
V4 Bcos 0 SINE(0 1 1000 0 0 90)
.tran .1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -992 -80 -992 -128
WIRE -768 -80 -768 -128
WIRE -528 -80 -528 -128
WIRE -288 -80 -288 -128
WIRE -80 -80 -80 -128
WIRE -992 48 -992 0
WIRE -768 48 -768 0
WIRE -528 48 -528 0
WIRE -288 48 -288 0
WIRE -80 48 -80 0
WIRE -992 224 -992 176
WIRE -752 224 -752 176
WIRE -80 224 -80 176
WIRE -992 352 -992 304
WIRE -752 352 -752 304
WIRE -80 352 -80 304
SYMBOL VOLTAGE -992 -96 R0
WINDOW 39 0 0 Left 0
WINDOW 123 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 .9 30)
SYMBOL BV -288 -96 R0
SYMATTR InstName B2
SYMATTR Value V=V(a)*V(b)
SYMBOL voltage -752 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 6 104 Left 0
SYMATTR Value SINE(0 1 1000 0 0 90)
SYMATTR InstName V4
SYMBOL VOLTAGE -992 208 R0
WINDOW 39 0 0 Left 0
WINDOW 123 0 0 Left 0
WINDOW 3 4 103 Left 0
SYMATTR Value SINE(0 .9 30 0 0 90)
SYMATTR InstName V3
SYMBOL BV -528 -96 R0
SYMATTR InstName B1
SYMATTR Value V=V(a)*V(b)+V(b)
SYMBOL BV -80 -96 R0
SYMATTR InstName B3
SYMATTR Value V=V(acos)*V(bcos)+V(a)*V(b)
SYMBOL BV -80 208 R0
SYMATTR InstName B4
SYMATTR Value V=V(acos)*V(bcos)-V(a)*V(b)
SYMBOL voltage -768 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 1 1000)
FLAG -528 48 0
FLAG -528 -128 AM
FLAG -992 48 0
FLAG -768 48 0
FLAG -992 -128 A
FLAG -768 -128 B
FLAG -288 48 0
FLAG -288 -128 DSBSC
FLAG -80 48 0
FLAG -80 -128 SSBSC
FLAG -992 352 0
FLAG -992 176 Acos
FLAG -752 352 0
FLAG -752 176 Bcos
FLAG -80 352 0
FLAG -80 176 USB
TEXT 40 152 Left 0 !.tran .1
TEXT -640 368 Left 0 ;Amplitude modulation demonstrator:\n \nA = the audio signal\nB = the carrier signal\nAM is ordinary amplitude modulation\nDSBSC is a double sideband supressed carier signal\nSSBSC is a single sideband supressed carrier signal (lower sideband)\nUSB is also SSBSC but is the upper sideband signal\nAcos and Bcos are phase shifted (90 degrees) audio and carrier signals\nSchuler, 7th edition, Chapter 12 and page 516
TEXT -488 152 Left 0 ;Run the simulation\nand inspect the waveforms.\nRight-click in the waveform\nwindow and choose FFT\nto view the spectral content.
* Z:\home\khalils\Downloads\files\data\raw_asc\a736bbcb28cb_EDM_Powersupply_Lpara.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N005 0 PULSE(0 5 0 2n 2n 2u 20u)
R4 drain N004 10
V4 N003 0 10
M1 drain N005 0 0 NMOS
L1 N003 N004 6.4
D1 N002 N001 1N914
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include C:\Users\joey2\Documents\3e jaar\BAP\Github\EDM_Powersupply\Library\IPW65R037C6_mosfet\SimulationModel_CoolMOS_C6_MOSFET_650V_Spice.lib
.tran 0 140u 0 10u
.model 1N914 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75 mfg=OnSemi type=silicon)
.model NMOS NMOS(vto=2.5 kp=150)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1668 680
WIRE 1184 -144 1072 -144
WIRE 1344 -144 1248 -144
WIRE 752 -112 624 -112
WIRE 864 -112 800 -112
WIRE 624 -32 624 -112
WIRE 672 -32 624 -32
WIRE 768 -32 752 -32
WIRE 864 -32 864 -112
WIRE 864 -32 848 -32
WIRE 976 -32 864 -32
WIRE 624 32 624 -32
WIRE 624 48 624 32
WIRE 976 64 976 -32
WIRE 576 128 352 128
WIRE 624 160 624 144
WIRE 352 192 352 128
WIRE 624 256 624 160
WIRE 976 256 976 144
WIRE 976 256 624 256
WIRE 976 272 976 256
WIRE 352 320 352 272
FLAG 352 320 0
FLAG 624 32 drain
FLAG 624 160 source
FLAG 976 272 0
SYMBOL voltage 352 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -51 153 VLeft 2
SYMATTR Value PULSE(0 5 0 2n 2n 2u 20u)
SYMATTR InstName V1
SYMBOL res 656 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL voltage 976 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 10
SYMBOL nmos 576 48 R0
SYMATTR InstName M1
SYMBOL ind 864 -48 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value 6.4u
SYMBOL diode 1248 -160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N914
TEXT 416 440 Left 2 !.include C:\\Users\\joey2\\Documents\\3e jaar\\BAP\\Github\\EDM_Powersupply\\Library\\IPW65R037C6_mosfet\\SimulationModel_CoolMOS_C6_MOSFET_650V_Spice.lib
TEXT 416 400 Left 2 !.tran 0 140u 0 10u
TEXT 952 -80 Left 2 !.model 1N914 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75 mfg=OnSemi type=silicon)
TEXT 416 480 Left 2 !.model NMOS NMOS(vto=2.5 kp=150)
* Z:\home\khalils\Downloads\files\data\raw_asc\84b75454735d_Rectificador.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001A.asy)
R3 0 N006 2k
V2 0 N007 15
XU1 N006 N001 N004 N007 N003 LT1001 ;pnba In+)In-)V+)V-)OUT
R1 N001 N005 10k
R2 N002 N001 20k
D2 N003 N002 D
D1 N001 N003 D
V3 N005 0 1 AC 1
V1 N004 0 15
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V3 -10 10 1m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 -128 224 -128
WIRE 448 -128 384 -128
WIRE 224 -32 224 -128
WIRE 288 -32 224 -32
WIRE 368 -32 352 -32
WIRE 768 -16 640 -16
WIRE 640 32 640 -16
WIRE 640 32 320 32
WIRE 768 32 768 -16
WIRE 80 48 -32 48
WIRE 224 48 224 -32
WIRE 224 48 160 48
WIRE -32 64 -32 48
WIRE 320 80 320 32
WIRE 224 96 224 48
WIRE 288 96 224 96
WIRE 368 112 368 -32
WIRE 368 112 352 112
WIRE 384 112 368 112
WIRE 448 112 448 -128
WIRE 288 128 256 128
WIRE 768 128 768 112
WIRE 768 144 768 128
WIRE 256 176 256 128
WIRE -32 192 -32 144
WIRE 256 272 256 256
WIRE 320 272 320 144
WIRE 768 272 768 224
WIRE 768 272 320 272
SYMBOL res 176 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL diode 288 -16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL voltage 768 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL Opamps\\LT1001A 320 48 R0
SYMATTR InstName U1
SYMBOL diode 384 128 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL voltage -32 48 R0
WINDOW 0 -72 56 Left 2
WINDOW 3 -301 -26 Invisible 2
WINDOW 123 -79 100 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 1
SYMATTR Value2 AC 1
SYMBOL voltage 768 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 400 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 20k
SYMBOL res 272 272 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 2k
FLAG -32 192 0
FLAG 256 272 0
FLAG 768 128 0
TEXT -200 -48 Left 2 !.dc V3 -10 10 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1078.asc
* Generated by LTspice 26.0.1 for Windows.
* Absolute Value Circuit(Full-Wave Rectifier)
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1078.asy)
R2 N001 IN 200K
V3 IN 0 SINE(0 1 100)
V1 +V 0 5
R1 N002 N001 200K
XU1 0 N001 +V 0 N003 LT1078 ;pnba In+)In-)V+)V-)OUT
D1 N003 N002 1N4148
XU2 N002 OUT +V 0 OUT LT1078 ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 -80 96
WIRE 128 96 112 96
WIRE 224 96 128 96
WIRE 400 96 304 96
WIRE -80 112 -80 96
WIRE 560 128 448 128
WIRE -192 160 -192 144
WIRE 496 192 496 176
WIRE -80 208 -80 192
WIRE 192 208 192 192
WIRE 448 208 448 128
WIRE 464 208 448 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 560 224 560 128
WIRE 560 224 528 224
WIRE 592 224 560 224
WIRE 320 240 224 240
WIRE 400 240 400 96
WIRE 400 240 384 240
WIRE 464 240 400 240
WIRE -192 256 -192 240
WIRE 160 256 128 256
WIRE 496 272 496 256
WIRE 192 288 192 272
SYMBOL diode 320 256 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL opamps\\LT1078 496 160 R0
SYMATTR InstName U2
SYMBOL voltage -80 96 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL res 320 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200K
SYMBOL opamps\\LT1078 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -192 144 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -192 256 0
FLAG 192 192 +V
FLAG -192 144 +V
FLAG -80 208 0
FLAG 192 288 0
FLAG 496 176 +V
FLAG 496 272 0
FLAG -80 96 IN
FLAG 592 224 OUT
FLAG 128 256 0
TEXT 416 344 Left 2 !.tran 30m
TEXT 392 32 Bottom 2 ;Absolute Value Circuit(Full-Wave Rectifier)