Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6560.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6560.asy)
I1 IN1 0 PULSE(0 30u 1.5n .1n .1n 6.5n 60n)
V1 N001 0 5
V2 N004 0 PWL(0 5 10n 5 +5n 0)
XU1 N001 MP_01 MP_02 MP_03 IN1 N003 MP_04 MP_05 MP_06 MP_07 N001 N004 MP_08 NC_09 N002 MP_10 0 LTC6560 ;pnba Vcco))))In)Vref)))))Vcci)O_Mux))OutTerm)Out))Gnd
C2 N003 0 1
R1 OUT N002 50
R2 OUT 0 50
C1 IN1 0 4p
.tran 150n
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2212 2336
WIRE 272 -96 64 -96
WIRE 432 -96 272 -96
WIRE 64 -80 64 -96
WIRE 272 -32 272 -96
WIRE 432 -32 432 -96
WIRE 64 16 64 0
WIRE -16 64 -480 64
WIRE 160 64 -16 64
WIRE 544 64 512 64
WIRE 688 64 624 64
WIRE -480 80 -480 64
WIRE -16 80 -16 64
WIRE 688 80 688 64
WIRE -480 176 -480 160
WIRE -16 176 -16 144
WIRE 688 176 688 160
WIRE 80 192 64 192
WIRE 160 192 144 192
WIRE 272 304 272 288
WIRE 432 304 432 288
WIRE 432 400 432 384
SYMBOL res 672 64 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL current -480 80 R0
WINDOW 123 24 122 Left 2
WINDOW 39 24 101 Left 2
SYMATTR Value PULSE(0 30u 1.5n .1n .1n 6.5n 60n)
SYMATTR InstName I1
SYMBOL voltage 432 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 5 10n 5 +5n 0)
SYMBOL LTC6560 336 128 R0
SYMATTR InstName U1
SYMBOL voltage 64 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 144 176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 640 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL cap -32 80 R0
SYMATTR InstName C1
SYMATTR Value 4p
FLAG 64 16 0
FLAG 688 64 OUT
FLAG -480 64 IN1
FLAG -16 176 0
FLAG -480 176 0
FLAG 688 176 0
FLAG 272 304 0
FLAG 64 192 0
FLAG 432 400 0
TEXT 616 456 Left 2 !.tran 150n
* Z:\home\khalils\Downloads\files\data\raw_asc\144448407811_VoltageDivider01.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N004 1k
R2 N004 0 1k
V1 N001 0 6
R3 N002 N005 1k
R4 N005 0 2k
V2 N002 0 6
R5 N003 N006 2k
R6 N006 0 1k
V3 N003 0 6
.op 1
;op 1
;op1 1
* Two 1K Resistors
* Evenly divided
* 1k and 2k Resistors\n1k has 4V across
* 2k and 1k Resistors\n2k has 2V across
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1384 680
WIRE 432 -1104 192 -1104
WIRE 912 -1104 672 -1104
WIRE 1328 -1104 1088 -1104
WIRE 432 -1072 432 -1104
WIRE 912 -1072 912 -1104
WIRE 1328 -1072 1328 -1104
WIRE 192 -1008 192 -1104
WIRE 672 -1008 672 -1104
WIRE 1088 -1008 1088 -1104
WIRE 432 -928 432 -992
WIRE 912 -928 912 -992
WIRE 1328 -928 1328 -992
WIRE 192 -848 192 -928
WIRE 432 -848 192 -848
WIRE 672 -848 672 -928
WIRE 912 -848 672 -848
WIRE 1088 -848 1088 -928
WIRE 1328 -848 1088 -848
WIRE 192 -816 192 -848
WIRE 672 -816 672 -848
WIRE 1088 -816 1088 -848
FLAG 192 -816 0
FLAG 672 -816 0
FLAG 1088 -816 0
DATAFLAG 432 -960 ""
DATAFLAG 304 -1104 ""
DATAFLAG 912 -960 ""
DATAFLAG 784 -1104 ""
DATAFLAG 1328 -960 ""
DATAFLAG 1200 -1104 ""
SYMBOL res 416 -1088 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 416 -944 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 192 -1024 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 2
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL res 896 -1088 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 896 -944 R0
SYMATTR InstName R4
SYMATTR Value 2k
SYMBOL voltage 672 -1024 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 2
SYMATTR InstName V2
SYMATTR Value 6
SYMBOL res 1312 -1088 R0
SYMATTR InstName R5
SYMATTR Value 2k
SYMBOL res 1312 -944 R0
SYMATTR InstName R6
SYMATTR Value 1k
SYMBOL voltage 1088 -1024 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 2
SYMATTR InstName V3
SYMATTR Value 6
TEXT 160 -792 Left 2 !.op 1
TEXT 640 -792 Left 2 !;op 1
TEXT 1056 -792 Left 2 !;op1 1
TEXT 216 -1216 Left 2 ;Two 1K Resistors
TEXT 224 -1184 Left 2 ;Evenly divided
TEXT 704 -1224 Left 2 ;1k and 2k Resistors\n1k has 4V across
TEXT 1120 -1224 Left 2 ;2k and 1k Resistors\n2k has 2V across
* Z:\home\khalils\Downloads\files\data\raw_asc\20aa1bd47027_RLC_only.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 RLC_only 1mH
R1 0 RLC_only 100
V1 IN 0 PULSE(-5 5 0 0 0 0.0025m 0.05m)
C1 N001 IN 1nF
.tran 1ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1428 680
WIRE -256 144 -368 144
WIRE -112 144 -192 144
WIRE 256 144 -32 144
WIRE 320 144 256 144
WIRE 256 240 256 144
WIRE -368 256 -368 144
WIRE -368 432 -368 336
WIRE -64 432 -368 432
WIRE 256 432 256 320
WIRE 256 432 -64 432
WIRE -64 480 -64 432
IOPIN 320 144 Out
IOPIN -368 144 In
SYMBOL res 272 336 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL ind -128 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1mH
SYMBOL voltage -368 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(-5 5 0 0 0 0.0025m 0.05m)
SYMBOL cap -192 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1nF
FLAG -64 480 0
FLAG 320 144 RLC_only
FLAG -368 144 IN
TEXT -536 352 Left 2 !.tran 1ms
* Z:\home\khalils\Downloads\files\data\raw_asc\27d709c5c707_AEkg2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 SINE(0 4 50)
D4 Feedback N001 1N4007
C1 Modstand Feedback 0.01
D1 N001 Modstand 1N4007
D2 Feedback 0 1N4007
R1 Modstand Feedback 1k
D3 0 Modstand 1N4007
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 0.25 0 0.00001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 64 176 64
WIRE 176 96 176 64
WIRE 176 96 96 96
WIRE 304 96 304 64
WIRE 416 96 368 96
WIRE 304 112 304 96
WIRE 304 112 240 112
WIRE 96 128 96 96
WIRE 416 144 416 96
WIRE 448 144 416 144
WIRE 512 144 448 144
WIRE 512 160 512 144
WIRE 448 176 448 144
WIRE 176 192 176 112
WIRE 272 192 240 192
WIRE 304 192 272 192
WIRE 416 192 416 144
WIRE 416 192 368 192
WIRE 96 256 96 208
WIRE 272 256 272 192
WIRE 272 256 96 256
WIRE 96 288 96 256
WIRE 176 288 176 192
WIRE 448 288 448 256
WIRE 448 288 176 288
WIRE 512 288 512 224
WIRE 512 288 448 288
SYMBOL diode 176 128 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D4
SYMATTR Value 1N4007
SYMBOL diode 176 208 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N4007
SYMBOL diode 304 208 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D3
SYMATTR Value 1N4007
SYMBOL res 432 160 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL cap 496 160 R0
SYMATTR InstName C1
SYMATTR Value 0.01
SYMBOL Misc\\signal 96 112 R0
WINDOW 3 -153 -3 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 4 50)
SYMBOL diode 304 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4007
FLAG 96 288 0
FLAG 176 192 Feedback
FLAG 416 144 Modstand
TEXT -16 344 Left 2 !.tran 0 0.25 0 0.00001
* Z:\home\khalils\Downloads\files\data\raw_asc\0dc4f08a5742_OpAmp.asc
* Generated by LTspice 26.0.1 for Windows.
E3 N006 0 N005 0 1
C1 N003 0 1.592n
R4 N007 N006 100
E1 N002 0 ViP Vim 1
E2 N004 0 N003 0 1
E4 N001 0 N007 0 10000
R2 N003 N002 100
C3 N007 0 79.58p
Ro Vo N001 20
R3 N005 N004 100
R1 ViP Vim 1m
C2 N005 0 198.9p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1708 680
WIRE 1488 -32 1456 -32
WIRE 1616 -32 1568 -32
WIRE -80 0 -208 0
WIRE 80 0 -80 0
WIRE 208 0 128 0
WIRE 352 0 288 0
WIRE 480 0 352 0
WIRE 624 0 528 0
WIRE 800 0 704 0
WIRE 976 0 800 0
WIRE 1104 0 1024 0
WIRE 1264 0 1184 0
WIRE 1408 0 1264 0
WIRE -80 32 -80 0
WIRE 128 32 128 0
WIRE 352 32 352 0
WIRE 80 48 80 0
WIRE 528 48 528 0
WIRE 1024 48 1024 0
WIRE 1456 48 1456 -32
WIRE 480 64 480 0
WIRE 800 64 800 0
WIRE 976 64 976 0
WIRE 1264 64 1264 0
WIRE 1408 64 1408 0
WIRE 1264 80 1264 64
WIRE -80 128 -80 112
WIRE -80 128 -208 128
WIRE 80 128 80 96
WIRE 80 128 -80 128
WIRE 128 160 128 112
WIRE 208 160 128 160
WIRE 352 160 352 96
WIRE 352 160 208 160
WIRE 480 160 480 112
WIRE 480 160 352 160
WIRE 528 160 528 128
WIRE 624 160 528 160
WIRE 800 160 800 128
WIRE 800 160 624 160
WIRE 976 160 976 112
WIRE 976 160 800 160
WIRE 1024 160 1024 128
WIRE 1120 160 1024 160
WIRE 1264 160 1264 128
WIRE 1264 160 1120 160
WIRE 1408 160 1408 112
WIRE 1408 160 1264 160
WIRE 208 208 208 160
WIRE 624 208 624 160
WIRE 1120 208 1120 160
WIRE 1456 240 1456 128
IOPIN -208 0 In
IOPIN -208 128 In
IOPIN 1616 -32 Out
SYMBOL res 304 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL e 128 16 R0
WINDOW 0 44 40 Left 2
WINDOW 3 40 88 Left 2
SYMATTR InstName E1
SYMATTR Value 1
SYMBOL cap 1248 64 R0
SYMATTR InstName C3
SYMATTR Value 79.58p
SYMBOL e 1024 32 R0
SYMATTR InstName E3
SYMATTR Value 1
SYMBOL cap 336 32 R0
SYMATTR InstName C1
SYMATTR Value 1.592n
SYMBOL cap 784 64 R0
SYMATTR InstName C2
SYMATTR Value 198.9p
SYMBOL res -96 16 R0
SYMATTR InstName R1
SYMATTR Value 1m
SYMBOL e 528 32 R0
SYMATTR InstName E2
SYMATTR Value 1
SYMBOL res 720 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL res 1200 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL res 1584 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Ro
SYMATTR Value 20
SYMBOL e 1456 32 R0
SYMATTR InstName E4
SYMATTR Value 10000
FLAG -208 0 ViP
FLAG -208 128 Vim
FLAG 208 208 0
FLAG 624 208 0
FLAG 1120 208 0
FLAG 1456 240 0
FLAG 1616 -32 Vo
* Z:\home\khalils\Downloads\files\data\raw_asc\ba977df796df_Assignment_3b__iii_.asc
* Generated by LTspice 26.0.1 for Windows.
* Negative Half Wave Rectifier Circuit (with 1microF Capacitor) (Ideal)
R1 N002 0 1000
C1 N002 0 0.000001
V1 N001 0 SINE(0 311 50) Rser=0.001
D1 N002 N001 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 320 64 208 64
WIRE 480 64 384 64
WIRE 608 64 480 64
WIRE 208 112 208 64
WIRE 480 112 480 64
WIRE 608 128 608 64
WIRE 208 240 208 192
WIRE 304 240 208 240
WIRE 480 240 480 192
WIRE 480 240 304 240
WIRE 608 240 608 192
WIRE 608 240 480 240
WIRE 304 272 304 240
SYMBOL cap 592 128 R0
SYMATTR InstName C1
SYMATTR Value 0.000001
SYMBOL diode 384 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 464 96 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL voltage 208 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.001
SYMATTR InstName V1
SYMATTR Value SINE(0 311 50)
FLAG 304 272 0
TEXT 144 272 Left 2 !.tran 0.05
TEXT -8 8 Left 2 ;Negative Half Wave Rectifier Circuit (with 1microF Capacitor) (Ideal)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1764-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1764-2.5.asy)
C1 OUT 0 10 Rser=100m
Rload OUT 0 500
V1 IN 0 PWL(0 0 1 10)
XU1 IN IN 0 OUT OUT LT1764-2.5 ;pnba _SHDN)IN)GND)OUT)Sense
.tran 1
.lib LT1764.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -224 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 560 48 384 48
WIRE -224 64 -224 48
WIRE 384 64 384 48
WIRE 560 64 560 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -224 160 -224 144
WIRE 384 160 384 128
WIRE 560 160 560 144
WIRE 160 240 160 208
SYMBOL cap 368 64 R0
WINDOW 39 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 10u
SYMATTR SpiceLine Rser=100m
SYMBOL PowerProducts\\LT1764-2.5 160 96 R0
SYMATTR InstName U1
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 544 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
FLAG -224 160 0
FLAG 384 160 0
FLAG 560 160 0
FLAG 160 240 0
FLAG 560 48 OUT
FLAG -224 48 IN
TEXT 368 224 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\9a5462c4af9a_CMOS_Inverter.asc
* Generated by LTspice 26.0.1 for Windows.
* CMOS Inverter
M2 Out IN 0 0 NMOS
M1 VDD IN Out VDD PMOS
V2 VDD 0 5V
V1 IN 0 PULSE(0 5 0 0 0 5m 10m 100)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 96 240 48
WIRE 304 96 240 96
WIRE 304 144 304 96
WIRE 304 144 240 144
WIRE 192 176 128 176
WIRE -352 192 -352 112
WIRE 128 208 128 176
WIRE 128 208 16 208
WIRE 240 208 240 192
WIRE 368 208 240 208
WIRE 240 224 240 208
WIRE 128 304 128 208
WIRE 192 304 128 304
WIRE -240 320 -240 240
WIRE 240 416 240 320
IOPIN 16 208 In
IOPIN 368 208 Out
IOPIN 240 48 In
IOPIN -240 160 In
IOPIN -352 32 In
SYMBOL pmos4 192 96 R0
SYMATTR InstName M1
SYMBOL nmos 192 224 R0
SYMATTR InstName M2
SYMBOL voltage -240 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5V
SYMBOL voltage -352 16 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 0 0 0 5m 10m 100)
SYMATTR InstName V1
FLAG 240 416 0
FLAG 16 208 IN
FLAG 368 208 Out
FLAG 240 48 VDD
FLAG -240 160 VDD
FLAG -352 32 IN
FLAG -352 192 0
FLAG -240 320 0
TEXT 32 64 Left 2 ;CMOS Inverter
TEXT -424 440 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2370-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2370-1.2.asy)
V1 IN 0 12
C1 OUT 0 10
Rload OUT 0 10
L1 N002 OUT 10 Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
R1 OUT N001 10K
XU1 NC_01 IN IN IN N002 OUT N001 0 ADP2370-1.2 IPSM=320m Rt=166.6667k Rb=333.33333k C1=9.6p Rc1=100k R3=5.92k Rshort=100MEG PD=0 ;pnba FSEL)SYNC)EN)Vin)SW)FB)PG)PGND
.tran 500u startup
.lib ADP2370-1.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 948 692
WIRE 128 96 16 96
WIRE 160 96 128 96
WIRE 464 96 384 96
WIRE 640 96 544 96
WIRE 16 112 16 96
WIRE 128 176 128 96
WIRE 160 176 128 176
WIRE 416 176 384 176
WIRE 544 176 496 176
WIRE 640 176 640 96
WIRE 640 176 544 176
WIRE 736 176 640 176
WIRE 736 192 736 176
WIRE 16 208 16 192
WIRE 128 336 128 176
WIRE 544 256 544 240
WIRE 544 256 384 256
WIRE 544 272 544 256
WIRE 736 288 736 272
WIRE 160 336 128 336
WIRE 640 336 640 176
WIRE 640 336 384 336
SYMBOL res 720 176 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL ADP2370-1.2 272 208 R0
SYMATTR InstName U1
SYMBOL ind 400 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
SYMBOL res 560 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL VOLTAGE 16 96 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 528 176 R0
WINDOW 0 29 15 Left 2
SYMATTR InstName C1
SYMATTR Value 10
FLAG 16 208 0
FLAG 16 96 IN
FLAG 544 272 0
FLAG 736 176 OUT
FLAG 736 288 0
TEXT 488 392 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1301.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1301.asy)
V1 IN 0 2.5
L1 IN N001 33 Rser=0.02 Rpar=5000
D1 N001 OUT MBRS140
C2 OUT 0 33 Rser=0.02
Rload OUT 0 25
XU1 0 0 N002 OUT N003 IN N001 0 LT1301 ;pnba GND)Sel)SHDN)FB)Ilim)Vin)SW)PGND
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LT1301.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1556 952
WIRE 704 448 480 448
WIRE 736 448 704 448
WIRE 864 448 816 448
WIRE 896 448 864 448
WIRE 992 448 960 448
WIRE 1072 448 992 448
WIRE 480 464 480 448
WIRE 1072 464 1072 448
WIRE 704 512 704 448
WIRE 480 560 480 544
WIRE 1072 560 1072 544
WIRE 864 592 864 448
WIRE 864 592 832 592
WIRE 576 608 560 608
WIRE 992 656 992 448
WIRE 992 656 832 656
WIRE 992 672 992 656
WIRE 576 704 560 704
WIRE 848 720 832 720
WIRE 992 752 992 736
WIRE 640 816 640 800
WIRE 768 816 768 800
SYMBOL res 1056 448 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL POWERPRODUCTS\\LT1301 704 656 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 480 448 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL POLCAP 976 672 R0
SYMATTR InstName C2
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02
SYMBOL IND 720 464 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL SCHOTTKY 896 464 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
FLAG 560 704 0
FLAG 480 560 0
FLAG 640 816 0
FLAG 768 816 0
FLAG 992 752 0
FLAG 1072 560 0
FLAG 1072 448 OUT
FLAG 480 448 IN
TEXT 944 808 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4608.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4608.asy)
Rload OUT 0 .225
R2 N001 0 4.87K
XU1 OUT 0 NC_01 IN MP_02 NC_03 MP_04 MP_05 MP_06 NC_07 NC_08 NC_09 0 MP_10 MP_11 MP_12 MP_13 MP_14 MP_15 NC_16 NC_17 NC_18 MP_19 MP_20 MP_21 MP_22 MP_23 MP_24 N001 IN MP_25 NC_26 0 IN MP_27 MP_28 IN NC_29 LTM4608 ;pnba Vout)SGND)PLLLPF)Vin))SW))))Mode)CLKin)PHmode)GND)))))))MGN)Bsel)Pgood)))))))FB)Track))Ith)IthM)SVin)))Run)CLKout
V1 IN 0 3.6
C1 OUT 0 100
.tran 200u startup
.lib LTM4608.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1260 708
WIRE -48 16 -192 16
WIRE 80 16 -48 16
WIRE 272 16 80 16
WIRE -192 32 -192 16
WIRE 80 48 80 16
WIRE 272 48 272 16
WIRE 432 112 368 112
WIRE 528 112 432 112
WIRE -192 128 -192 112
WIRE 432 128 432 112
WIRE 528 128 528 112
WIRE -48 192 -48 16
WIRE -16 192 -48 192
WIRE 432 224 432 192
WIRE 528 224 528 208
WIRE -48 272 -48 192
WIRE -16 272 -48 272
WIRE 432 272 368 272
WIRE 432 288 432 272
WIRE 432 384 432 368
WIRE 384 432 368 432
WIRE 80 672 80 656
WIRE 272 672 272 656
SYMBOL res 416 272 R0
SYMATTR InstName R2
SYMATTR Value 4.87K
SYMBOL PowerProducts\\LTM4608 176 352 R0
SYMATTR InstName U1
SYMBOL cap 416 128 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMBOL voltage -192 16 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL res 512 112 R0
SYMATTR InstName Rload
SYMATTR Value .225
FLAG 80 672 0
FLAG 272 672 0
FLAG -192 128 0
FLAG 432 224 0
FLAG 528 224 0
FLAG 432 384 0
FLAG 384 432 0
FLAG 528 112 OUT
FLAG -192 16 IN
TEXT 432 600 Left 2 !.tran 200u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2b7642e1f168_Current_Sensing_Detect.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
V1 N006 0 SINE(0 3.3 1kHz)
V6 N004 0 0
V5 0 -5V 5V
V7 N003 0 5V
V2 N002 0 5V
V3 N001 0 12V
R5 N010 0 1k
Q1 N003 N008 N010 0 2N3904
D1 N009 0 D
XU1 0 N007 5V 0 N008 LT1001 ;pnba In+)In-)V+)V-)OUT
V4 5V 0 5V
R1 N002 N005 1k
R2 N007 0 1K
M2 N001 N004 N007 N007 BSB012N03LX3
M1 N005 N006 N009 N009 NMOS
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100ms
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1172 1220
WIRE 336 -432 224 -432
WIRE 224 -384 224 -432
WIRE 224 -272 224 -304
WIRE 336 -272 224 -272
WIRE 336 -256 336 -272
WIRE 592 -256 592 -320
WIRE 224 -240 224 -272
WIRE 224 -112 224 -160
WIRE 336 -112 224 -112
WIRE 592 -48 592 -176
WIRE 208 -32 48 -32
WIRE 864 -32 784 -32
WIRE 208 0 208 -32
WIRE 784 0 784 -32
WIRE 48 32 48 -32
WIRE 544 32 384 32
WIRE 208 96 208 80
WIRE 384 96 384 32
WIRE 784 112 784 80
WIRE 48 160 48 112
WIRE 160 176 80 176
WIRE 864 192 864 -32
WIRE 384 208 384 176
WIRE 704 208 704 176
WIRE 592 224 592 48
WIRE 672 224 592 224
WIRE 80 240 80 176
WIRE 592 240 592 224
WIRE 800 240 736 240
WIRE 208 256 208 192
WIRE 672 256 640 256
WIRE 704 304 704 272
WIRE 864 320 864 288
WIRE 592 336 592 320
WIRE 640 336 640 256
WIRE 640 336 592 336
WIRE 80 352 80 320
WIRE 208 384 208 320
WIRE 592 384 592 336
WIRE 864 432 864 400
IOPIN 336 -432 In
IOPIN 336 -112 In
IOPIN 704 176 In
SYMBOL nmos 160 96 R0
SYMATTR InstName M1
SYMBOL LED 192 256 R0
SYMATTR InstName D1
SYMBOL voltage 384 80 R0
SYMATTR InstName V6
SYMATTR Value 0
SYMBOL nmos 544 -48 R0
SYMATTR InstName M2
SYMATTR Value BSB012N03LX3
SYMBOL res 576 224 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 48 16 R0
SYMATTR InstName V2
SYMATTR Value 5V
SYMBOL voltage 224 -400 R0
SYMATTR InstName V4
SYMATTR Value 5V
SYMBOL voltage 224 -256 R0
SYMATTR InstName V5
SYMATTR Value 5V
SYMBOL res 848 304 R0
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL OpAmps\\LT1001 704 176 R0
SYMATTR InstName U1
SYMBOL voltage 80 224 R0
WINDOW 0 -73 68 Left 2
WINDOW 3 -143 97 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 3.3 1kHz)
SYMBOL res 192 -16 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL npn 800 192 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage 592 -160 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V3
SYMATTR Value 12V
SYMBOL voltage 784 -16 R0
SYMATTR InstName V7
SYMATTR Value 5V
FLAG 80 352 0
FLAG 48 160 0
FLAG 208 384 0
FLAG 592 -320 0
FLAG 336 -256 0
FLAG 336 -432 5V
FLAG 336 -112 -5V
FLAG 704 176 5V
FLAG 592 384 0
FLAG 384 208 0
FLAG 784 112 0
FLAG 864 432 0
FLAG 704 304 0
TEXT -96 408 Left 2 !.tran 100ms
* Z:\home\khalils\Downloads\files\data\raw_asc\3f6a8a43517e_1844-SD.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1844-SD.asy)
R1 N001 0 100K
XU2 IN 0 IN N001 OUT LTC1844-SD ;pnba IN)GND)_SHDN)ADJ)OUT
I1 OUT 0 {iload} load
V1 IN 0 5
R2 OUT N001 164K
.dc v1 5 2 10m
.measure DC vdrop WHEN V(out)=3.2
.measure DC dropout param Vdrop-3.2
.step param iload list 1u 10m 25m 50m 75m 100m 125m 150m
.lib LTC1844-SD.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1940 1316
WIRE 64 80 -80 80
WIRE 80 80 64 80
WIRE 416 80 368 80
WIRE 560 80 416 80
WIRE -80 96 -80 80
WIRE 560 96 560 80
WIRE 416 112 416 80
WIRE -80 192 -80 176
WIRE 560 192 560 176
WIRE 64 240 64 80
WIRE 80 240 64 240
WIRE 416 240 416 192
WIRE 416 240 368 240
WIRE 416 256 416 240
WIRE 224 304 224 288
WIRE 416 352 416 336
SYMBOL voltage -80 80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 400 240 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 400 96 R0
SYMATTR InstName R2
SYMATTR Value 164K
SYMBOL LTC1844-SD 224 160 R0
SYMATTR InstName U2
SYMBOL current 560 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 19 82 Left 2
WINDOW 3 39 36 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMATTR Value {iload}
FLAG 224 304 0
FLAG 416 352 0
FLAG -80 192 0
FLAG 560 192 0
FLAG 560 80 OUT
FLAG -80 80 IN
TEXT 744 120 Left 2 !.dc v1 5 2 10m
TEXT 744 208 Left 2 !.measure DC vdrop WHEN V(out)=3.2\n.measure DC dropout param Vdrop-3.2
TEXT 744 160 Left 2 !.step param iload list 1u 10m 25m 50m 75m 100m 125m 150m