Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\7285c1e26c59_1006S8.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain 100 Amplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1006S8.asy)
XU1 IN N001 +V 0 OUT LT1006 ;pnba In+)In-)V+)V-)OUT
R2 N001 0 1K
V3 IN 0 SINE(5m 1m 1K)
R3 OUT 0 660
R1 OUT N001 99K
V1 +V 0 5
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 112 16 112
WIRE 128 112 112 112
WIRE 160 112 128 112
WIRE 272 112 240 112
WIRE 192 208 192 192
WIRE 128 224 128 112
WIRE 160 224 128 224
WIRE -80 240 -80 224
WIRE 272 240 272 112
WIRE 272 240 224 240
WIRE 336 240 272 240
WIRE 160 256 48 256
WIRE 336 256 336 240
WIRE 48 272 48 256
WIRE 192 288 192 272
WIRE -80 336 -80 320
WIRE 336 352 336 336
WIRE 48 368 48 352
SYMBOL res 320 240 R0
SYMATTR InstName R3
SYMATTR Value 660
SYMBOL voltage 48 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(5m 1m 1K)
SYMBOL opamps\\LT1006S8 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -80 224 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 99K
FLAG -80 336 0
FLAG 192 192 +V
FLAG -80 224 +V
FLAG 16 112 0
FLAG 48 368 0
FLAG 192 288 0
FLAG 336 352 0
FLAG 336 240 OUT
FLAG 48 256 IN
TEXT 288 400 Left 2 !.tran 3m
TEXT 152 56 Bottom 2 ;Gain 100 Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\1a60da367939_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
+ IKF=24.3m ISE=1.28p NE=2.00 BR=4.00 NR=1.00
+ VAR=16.0 IKR=60.0m RE=1.51 RB=6.05 RC=0.605
+ XTB=1.5 CJE=6.27p VJE=1.10 MJE=0.500 CJC=2.02p VJC=0.300
+ MJC=0.300 TF=130p TR=27.4n EG=1.12 )
C1 N002 0 12p
R1 N002 N001 5
C2 N003 0 56p
L1 N002 N003 12n
C3 N003 0 5.6p
C4 P001 N003 470p
R2 P001 0 50
V1 N001 0 SINE(0 200m 144.39Meg 0 0 0)
.MODEL DI_MMBTH10 NPN (IS=1.26e-016 NF=1.00 BF={beta} VAF=114
.tran 0 2u 0 50p
.meas reQ1 AVG (V(Q1B)-V(Q1E))/Ic(Q1)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1380 680
WIRE -256 96 -288 96
WIRE -160 96 -176 96
WIRE -144 96 -160 96
WIRE -48 96 -64 96
WIRE 16 96 -48 96
WIRE 64 96 16 96
WIRE -160 112 -160 96
WIRE -48 112 -48 96
WIRE 16 112 16 96
WIRE -288 128 -288 96
SYMBOL cap 0 112 R0
SYMATTR InstName C3
SYMATTR Value 5.6p
SYMBOL res -160 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL ind -160 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 12n
SYMBOL voltage -288 112 R0
WINDOW 3 -522 11 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 200m 144.39Meg 0 0 0)
SYMATTR InstName V1
SYMBOL cap 128 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 470p
SYMBOL res 112 80 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL cap -64 112 R0
SYMATTR InstName C2
SYMATTR Value 56p
SYMBOL cap -176 112 R0
SYMATTR InstName C1
SYMATTR Value 12p
FLAG -288 208 0
FLAG 16 176 0
FLAG -48 176 0
FLAG -160 176 0
FLAG 128 176 0
TEXT 256 416 Left 2 !.MODEL DI_MMBTH10  NPN (IS=1.26e-016 NF=1.00 BF={beta} VAF=114\n+ IKF=24.3m ISE=1.28p NE=2.00 BR=4.00 NR=1.00\n+ VAR=16.0 IKR=60.0m RE=1.51 RB=6.05 RC=0.605\n+ XTB=1.5 CJE=6.27p VJE=1.10 MJE=0.500 CJC=2.02p VJC=0.300\n+ MJC=0.300 TF=130p TR=27.4n EG=1.12 )
TEXT -816 176 Left 2 !.tran 0 2u 0 50p
TEXT -816 272 Left 2 !.meas reQ1 AVG (V(Q1B)-V(Q1E))/Ic(Q1)
* Z:\home\khalils\Downloads\files\data\raw_asc\1065192f14ed_AND_SYM.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 Vin1 Vpos Vpos PMOS
M2 N001 Vin2 Vpos Vpos PMOS
M3 N001 Vin1 N002 N002 NMOS
M4 N002 Vin2 Vneg Vneg NMOS
M5 Vout N001 Vpos Vpos PMOS
M6 Vout N001 Vneg Vneg NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -16 272 -48
WIRE 272 -16 176 -16
WIRE 416 -16 272 -16
WIRE 624 0 624 -32
WIRE 704 0 624 0
WIRE 576 16 544 16
WIRE 176 32 176 -16
WIRE 256 32 176 32
WIRE 416 32 416 -16
WIRE 496 32 416 32
WIRE 704 48 704 0
WIRE 704 48 624 48
WIRE 256 80 256 32
WIRE 256 80 176 80
WIRE 496 80 496 32
WIRE 496 80 416 80
WIRE 176 144 176 128
WIRE 272 144 176 144
WIRE 416 144 416 128
WIRE 416 144 272 144
WIRE 272 192 272 144
WIRE 544 192 544 16
WIRE 544 192 272 192
WIRE 624 192 624 96
WIRE 720 192 624 192
WIRE 272 224 272 192
WIRE 624 240 624 192
WIRE 352 272 272 272
WIRE 704 288 624 288
WIRE 352 320 352 272
WIRE 352 320 272 320
WIRE 544 320 544 192
WIRE 576 320 544 320
WIRE 704 336 704 288
WIRE 704 336 624 336
WIRE 272 352 272 320
WIRE 624 368 624 336
WIRE 352 400 272 400
WIRE 352 448 352 400
WIRE 352 448 272 448
WIRE 272 480 272 448
IOPIN 272 -48 In
IOPIN 128 48 In
IOPIN 224 304 In
IOPIN 224 432 In
IOPIN 720 192 Out
IOPIN 368 48 In
IOPIN 272 480 In
IOPIN 624 -32 In
IOPIN 624 368 In
SYMBOL nmos4 576 240 R0
SYMATTR InstName M6
SYMBOL pmos4 576 96 M180
SYMATTR InstName M5
SYMBOL nmos4 224 352 R0
SYMATTR InstName M4
SYMBOL pmos4 368 128 M180
SYMATTR InstName M2
SYMBOL pmos4 128 128 M180
SYMATTR InstName M1
SYMBOL nmos4 224 224 R0
SYMATTR InstName M3
FLAG 272 -48 Vpos
FLAG 128 48 Vin1
FLAG 224 304 Vin1
FLAG 224 432 Vin2
FLAG 720 192 Vout
FLAG 368 48 Vin2
FLAG 272 480 Vneg
FLAG 624 -32 Vpos
FLAG 624 368 Vneg
* Z:\home\khalils\Downloads\files\data\raw_asc\13c254658ed8_Differential_Amplifier.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
V1 vcc 0 15
R3 out N001 10k
XU1 N003 N001 vcc vee out level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V2 vee 0 -15
V3 N002 0 1
R4 N003 0 10k
R1 N003 N004 10k
R2 N001 N002 10k
V4 N004 0 2
.tran 5m
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 96 -80 48 -80
WIRE 240 -80 176 -80
WIRE 144 16 128 16
WIRE -96 32 -192 32
WIRE 48 32 48 -80
WIRE 48 32 -16 32
WIRE 144 48 144 16
WIRE 48 64 48 32
WIRE 112 64 48 64
WIRE -192 80 -192 32
WIRE 240 80 240 -80
WIRE 240 80 176 80
WIRE 336 80 240 80
WIRE 112 96 48 96
WIRE 528 112 512 112
WIRE 656 112 640 112
WIRE -64 128 -112 128
WIRE 48 128 48 96
WIRE 48 128 16 128
WIRE 144 160 144 112
WIRE 144 160 128 160
WIRE 528 160 528 112
WIRE 656 160 656 112
WIRE -192 192 -192 160
WIRE -112 192 -112 128
WIRE 48 192 48 128
WIRE 528 288 528 240
WIRE 656 288 656 240
WIRE -112 304 -112 272
WIRE 48 304 48 272
SYMBOL voltage -112 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 2
SYMBOL res 0 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 656 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 32 176 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL res 192 -96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL voltage -192 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 1
SYMBOL OpAmps\\UniversalOpAmp2 144 80 R0
SYMATTR InstName U1
SYMBOL voltage 528 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 32 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
FLAG 656 288 0
FLAG 528 288 0
FLAG 512 112 vcc
FLAG 640 112 vee
FLAG 128 16 vcc
FLAG 128 160 vee
FLAG -192 192 0
FLAG -112 304 0
FLAG 336 80 out
FLAG 48 304 0
TEXT 376 288 Left 2 !.tran 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4373.asc
* Generated by LTspice 26.0.1 for Windows.
* UNDERVOLTAGE CUTOFF = 24V\nUNDERVOLTAGE RECOVERY = 28V
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4373.asy)
R4 N002 0 200K
M1 OUT N001 IN IN BSC026N08NS5
R3 IN N002 3.83Meg
C1 N004 0 100n
C2 OUT 0 10
XU2 OUT N001 IN IN N004 0 N003 N002 LTC4373 ;pnba OUT)GATE)SOURCE)IN)INTVcc)GND)_UVOUT)UV
V1 IN 0 28
R1 OUT 0 2.8
R5 N003 N002 1.3Meg
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1 startup
.lib LTC4373.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1032 680
WIRE -368 -128 -384 -128
WIRE -256 -128 -368 -128
WIRE 64 -128 -256 -128
WIRE 224 -128 64 -128
WIRE 304 -128 224 -128
WIRE 448 -128 400 -128
WIRE 560 -128 448 -128
WIRE 640 -128 560 -128
WIRE 688 -128 640 -128
WIRE -256 -64 -256 -128
WIRE 560 -64 560 -128
WIRE 688 -64 688 -128
WIRE -384 -16 -384 -128
WIRE 64 48 64 -128
WIRE 224 48 224 -128
WIRE 320 48 320 -80
WIRE 448 48 448 -128
WIRE -256 112 -256 16
WIRE -144 112 -256 112
WIRE 16 112 -144 112
WIRE -384 128 -384 64
WIRE 560 128 560 0
WIRE 688 128 688 16
WIRE -256 160 -256 112
WIRE -144 240 -144 112
WIRE -96 240 -144 240
WIRE 16 240 -16 240
WIRE -256 288 -256 240
WIRE 416 320 416 304
WIRE 176 416 176 304
WIRE 416 416 416 384
WIRE 416 416 176 416
WIRE 176 448 176 416
SYMBOL LTC4373 256 176 R0
SYMATTR InstName U2
SYMBOL cap 544 -64 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL nmos 400 -80 M270
WINDOW 0 107 89 VLeft 2
WINDOW 3 74 87 VLeft 2
SYMATTR InstName M1
SYMATTR Value BSC026N08NS5
SYMBOL cap 400 320 R0
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL res 672 -80 R0
SYMATTR InstName R1
SYMATTR Value 2.8
SYMBOL res 0 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1.3Meg
SYMBOL voltage -384 -32 R0
WINDOW 3 48 100 Right 2
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR Value 28
SYMATTR InstName V1
SYMBOL res -272 -80 R0
SYMATTR InstName R3
SYMATTR Value 3.83Meg
SYMBOL res -272 144 R0
SYMATTR InstName R4
SYMATTR Value 200K
FLAG 176 448 0
FLAG -368 -128 IN
FLAG 640 -128 OUT
FLAG -256 288 0
FLAG -384 128 0
FLAG 560 128 0
FLAG 688 128 0
TEXT -280 392 Left 2 !.tran 1 startup
TEXT -360 -208 Left 2 ;UNDERVOLTAGE CUTOFF = 24V\nUNDERVOLTAGE RECOVERY = 28V
* Z:\tmp\asc_dec_bjh7r6w2\0f596f585f60_Driverx_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
C6 OUT CS 725p
R2 N002 BOT 10
S2 CS OUT N002 0 SW
D1 CS OUT D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -192 176 -192 96
WIRE -192 176 -224 176
WIRE -176 176 -192 176
WIRE -64 176 -64 96
WIRE -64 176 -96 176
WIRE 64 176 64 160
WIRE 64 176 -64 176
WIRE 96 176 64 176
WIRE -64 192 -64 176
WIRE 96 224 16 224
WIRE -64 272 -64 256
WIRE 16 272 16 224
WIRE 16 272 -64 272
WIRE 144 272 144 240
WIRE 144 272 64 272
WIRE 240 272 240 240
WIRE 240 272 144 272
WIRE 320 272 320 224
WIRE 320 272 240 272
WIRE 400 272 320 272
WIRE -160 288 -192 288
WIRE -64 288 -96 288
WIRE 64 288 64 272
WIRE 144 352 144 272
WIRE 320 352 320 272
WIRE -192 368 -192 288
WIRE -192 368 -224 368
WIRE -176 368 -192 368
WIRE -64 368 -64 288
WIRE -64 368 -96 368
WIRE 64 368 64 352
WIRE 64 368 -64 368
WIRE 96 368 64 368
WIRE -64 384 -64 368
WIRE 240 384 240 272
WIRE 96 416 64 416
WIRE -64 464 -64 448
WIRE 16 464 16 272
WIRE 16 464 -64 464
WIRE 64 464 64 416
WIRE 64 464 16 464
WIRE 144 464 144 432
WIRE 240 464 240 448
WIRE 240 464 144 464
WIRE 320 464 320 416
WIRE 320 464 240 464
WIRE 400 464 320 464
WIRE 16 496 16 464
SYMBOL cap 224 384 R0
SYMATTR InstName C6
SYMATTR Value 725p
SYMBOL res -80 352 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL sw 144 448 M180
SYMATTR InstName S2
SYMBOL diode 304 416 M180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D1
FLAG 16 496 0
FLAG -224 176 TOP
FLAG -224 368 BOT
FLAG 400 272 OUT
FLAG 400 464 CS
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1930.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1930.asy)
XU1 N001 0 N002 IN IN LT1930 ;pnba SW)GND)FB)_SHDN)Vin
L1 IN N001 10 Rser=0.182
Rload OUT 0 50
C2 OUT 0 4.7 Rser=.05
R2 N002 0 13.3K
D1 N001 OUT MBRS130L
V1 IN 0 5
R1 OUT N002 113K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LT1930.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1376 984
WIRE 384 480 288 480
WIRE 512 480 384 480
WIRE 560 480 512 480
WIRE 672 480 640 480
WIRE 768 480 672 480
WIRE 912 480 832 480
WIRE 1024 480 912 480
WIRE 1136 480 1024 480
WIRE 288 496 288 480
WIRE 1024 496 1024 480
WIRE 1136 496 1136 480
WIRE 912 512 912 480
WIRE 512 560 512 480
WIRE 672 560 672 480
WIRE 288 592 288 576
WIRE 1024 592 1024 560
WIRE 1136 592 1136 576
WIRE 384 656 384 480
WIRE 432 656 384 656
WIRE 912 656 912 592
WIRE 912 656 752 656
WIRE 912 672 912 656
WIRE 592 768 592 752
WIRE 912 768 912 752
SYMBOL RES 896 496 R0
SYMATTR InstName R1
SYMATTR Value 113K
SYMBOL POLCAP 1008 496 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=.05
SYMBOL POWERPRODUCTS\\LT1930 592 656 R0
WINDOW 0 0 -120 Center 2
WINDOW 3 32 120 Left 2
SYMATTR InstName U1
SYMBOL VOLTAGE 288 480 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL schottky 768 496 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS130L
SYMBOL RES 896 656 R0
SYMATTR InstName R2
SYMATTR Value 13.3K
SYMBOL RES 1120 480 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL IND 544 496 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=0.182
FLAG 1136 480 OUT
FLAG 912 768 0
FLAG 1024 592 0
FLAG 1136 592 0
FLAG 592 768 0
FLAG 288 592 0
FLAG 288 480 IN
TEXT 952 832 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\15b3bfcd6e37_Lab2_NonIdeal.asc
* Generated by LTspice 26.0.1 for Windows.
* Ac 325
Rs N003 N002 50
G2 0 N001 N005 0 {1/N}
G1 0 N001 N004 0 1
G4 N005 0 N001 0 {1/N}
Rprimary N004 N003 70
G3 N004 0 N001 0 1
Riron N004 0 30k
Rload N006 0 100
R2 N001 0 1G
Vs N002 0 Sin(0 325 50)
Rsec N006 N005 5
.tran 50m
.param N=15 ; turns ratio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 932 680
WIRE 160 0 112 0
WIRE 544 0 448 0
WIRE 160 16 160 0
WIRE 448 16 448 0
WIRE 304 32 208 32
WIRE 400 32 304 32
WIRE 304 128 304 32
WIRE 304 128 208 128
WIRE 400 128 304 128
WIRE 208 160 208 128
WIRE 304 160 304 128
WIRE 400 160 400 128
WIRE -176 176 -336 176
WIRE -48 176 -96 176
WIRE 160 176 160 96
WIRE 160 176 32 176
WIRE 448 176 448 96
WIRE 592 176 448 176
WIRE 720 176 672 176
WIRE -336 192 -336 176
WIRE 720 192 720 176
WIRE -32 224 -288 224
WIRE 112 224 112 0
WIRE 160 224 112 224
WIRE 544 224 544 0
WIRE 544 224 448 224
WIRE 656 224 544 224
WIRE -32 256 -32 224
WIRE 32 256 -32 256
WIRE 112 256 112 224
WIRE 112 256 32 256
WIRE 208 256 208 240
WIRE 304 256 304 240
WIRE 400 256 400 240
WIRE 656 272 656 224
WIRE 720 272 656 272
WIRE -336 288 -336 272
WIRE -288 288 -288 224
WIRE -288 288 -336 288
WIRE 720 288 720 272
RECTANGLE Normal 576 312 48 -96 2
SYMBOL g 208 144 R0
SYMATTR InstName G1
SYMATTR Value 1
SYMBOL res 288 144 R0
SYMATTR InstName R2
SYMATTR Value 1G
SYMBOL res -80 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rs
SYMATTR Value 50
SYMBOL res 704 176 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL g 400 144 M0
WINDOW 0 -10 9 Right 2
WINDOW 3 -15 96 Right 2
SYMATTR InstName G2
SYMATTR Value {1/N}
SYMBOL res 48 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rprimary
SYMATTR Value 70
SYMBOL res 688 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rsec
SYMATTR Value 5
SYMBOL res 16 160 R0
SYMATTR InstName Riron
SYMATTR Value 30k
SYMBOL voltage -336 176 R0
SYMATTR InstName Vs
SYMATTR Value Sin(0 325 50)
SYMBOL g 160 0 M0
WINDOW 0 -10 10 Right 2
WINDOW 3 -16 104 Right 2
SYMATTR InstName G3
SYMATTR Value 1
SYMBOL g 448 0 R0
WINDOW 0 13 18 Left 2
WINDOW 3 12 101 Left 2
SYMATTR InstName G4
SYMATTR Value {1/N}
FLAG -336 288 0
FLAG 400 256 0
FLAG 208 256 0
FLAG 208 80 0
FLAG 400 80 0
FLAG 304 256 0
FLAG 720 288 0
TEXT 528 336 Left 2 !.tran 50m
TEXT 192 296 Left 2 !.param N=15 ; turns ratio
TEXT -288 296 Left 2 ;Ac 325
* Z:\home\khalils\Downloads\files\data\raw_asc\0b4d67169a27_6700-3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
V3 N002 0 PULSE(0 5 0 .5m .5m 0 1m)
R1 N001 N003 10K
R2 N001 N004 10K
XU1 N004 0 N002 N002 N001 N003 LT6700-3 ;pnba OUTA)GND)+INA)+INB)Vs)OUTB
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT6700-3.asy)
.lib LT6700-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 800
WIRE 368 160 144 160
WIRE 496 160 368 160
WIRE 592 160 496 160
WIRE 144 176 144 160
WIRE 496 176 496 160
WIRE 368 208 368 160
WIRE 592 224 592 160
WIRE 304 256 256 256
WIRE 144 272 144 256
WIRE 496 272 496 256
WIRE 496 272 432 272
WIRE 256 336 256 256
WIRE 256 336 -64 336
WIRE -64 352 -64 336
WIRE 592 400 592 304
WIRE 592 400 432 400
WIRE 256 416 256 336
WIRE 304 416 256 416
WIRE -64 448 -64 432
WIRE 368 496 368 464
FLAG 144 272 0
FLAG -64 448 0
FLAG 368 496 0
SYMBOL voltage 144 160 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -64 336 R0
WINDOW 3 17 101 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 5 0 .5m .5m 0 1m)
SYMATTR InstName V3
SYMBOL res 480 160 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 576 208 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Comparators\\LT6700-3 368 336 R0
SYMATTR InstName U1
TEXT 464 520 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\ad1b261ca2c9_Output_LP_Filter.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 N002 738n
L2 N002 N003 866n
L3 N003 S21 738n
C1 N001 0 180p
C2 N002 0 390p
C3 N003 0 390p
C4 S21 0 180p
R1 S21 0 50
V1 N001 0 AC 1 Rser=50
.ac dec 50 100k 100Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 176 -304 176
WIRE -64 176 -112 176
WIRE 48 176 16 176
WIRE 96 176 48 176
WIRE 208 176 176 176
WIRE 240 176 208 176
WIRE 352 176 320 176
WIRE 432 176 352 176
WIRE -112 192 -112 176
WIRE 48 192 48 176
WIRE 208 192 208 176
WIRE 352 192 352 176
WIRE -304 208 -304 176
FLAG -112 256 0
FLAG 48 256 0
FLAG 208 256 0
FLAG 352 256 0
FLAG 432 256 0
FLAG -304 288 0
FLAG 432 176 S21
SYMBOL ind -80 192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
SYMATTR InstName L1
SYMATTR Value 738n
SYMBOL ind 80 192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
SYMATTR InstName L2
SYMATTR Value 866n
SYMBOL ind 224 192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
SYMATTR InstName L3
SYMATTR Value 738n
SYMBOL cap -128 192 R0
SYMATTR InstName C1
SYMATTR Value 180p
SYMBOL cap 32 192 R0
SYMATTR InstName C2
SYMATTR Value 390p
SYMBOL cap 192 192 R0
SYMATTR InstName C3
SYMATTR Value 390p
SYMBOL cap 336 192 R0
SYMATTR InstName C4
SYMATTR Value 180p
SYMBOL res 416 160 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL Misc\\signal -304 192 R0
WINDOW 123 24 132 Left 0
WINDOW 39 24 160 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMATTR SpiceLine Rser=50
TEXT -338 506 Left 0 !.ac dec 50 100k 100Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\24e3cf5706e8_Comparator_with_hysteresis.asc
* Generated by LTspice 26.0.1 for Windows.
* Comparator with hysteresis
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8552.asy)
V2 Vcc 0 5
R4 REF1 0 10k
V1 N001 0 PWL(0 3.6 1 2.5 2 2.5 3 2.5 4 2.5 5 3.6 6 3.7 7 3.7 8 3.8 9 3.9)
R1 N001 IN1 220k
R2 IN1 0 180k
R3 OUT REF1 150k
R5 Vcc REF1 32k
XU1 REF1 IN1 Vcc 0 OUT AD8552 ;pnba In+)In-)V+)V-)OUT
.tran 0 10 0 0.001
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 948 680
WIRE 256 176 128 176
WIRE 880 176 736 176
WIRE 256 192 256 176
WIRE 880 192 880 176
WIRE 128 272 128 176
WIRE 464 272 464 256
WIRE 736 272 736 176
WIRE 256 288 256 272
WIRE 432 288 256 288
WIRE 256 304 256 288
WIRE 576 304 496 304
WIRE 624 304 576 304
WIRE 880 304 880 272
WIRE 352 320 352 256
WIRE 432 320 352 320
WIRE 256 336 256 304
WIRE 880 336 880 304
WIRE 464 352 464 336
WIRE 352 384 352 320
WIRE 528 384 352 384
WIRE 624 384 624 304
WIRE 624 384 608 384
WIRE 128 432 128 352
WIRE 256 432 256 416
WIRE 256 432 128 432
WIRE 736 432 736 352
WIRE 736 432 256 432
WIRE 880 432 880 416
WIRE 880 432 736 432
WIRE 880 448 880 432
SYMBOL res 624 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 150k
SYMBOL voltage 128 256 R0
WINDOW 3 -17 221 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PWL(0 3.6 1 2.5 2 2.5 3 2.5 4 2.5 5 3.6 6 3.7 7 3.7 8 3.8 9 3.9)
SYMATTR InstName V1
SYMBOL OpAmps\\AD8552 464 240 R0
WINDOW 0 42 -11 Left 2
WINDOW 3 42 12 Left 2
SYMATTR InstName U1
SYMBOL res 864 176 R0
SYMATTR InstName R5
SYMATTR Value 32k
SYMBOL res 896 320 M0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL res 240 320 R0
SYMATTR InstName R2
SYMATTR Value 180k
SYMBOL voltage 736 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 240 176 R0
SYMATTR InstName R1
SYMATTR Value 220k
FLAG 736 176 Vcc
FLAG 880 304 REF1
FLAG 464 256 Vcc
FLAG 464 352 0
FLAG 880 448 0
FLAG 352 256 REF1
FLAG 576 304 OUT
FLAG 256 304 IN1
TEXT 128 104 Left 2 ;Comparator with hysteresis
TEXT 128 136 Left 2 !.tran 0 10 0 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\cab8a9ba309f_TransmissionLineInverter.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax. The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors. A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements. One for the normal(differential) mode and\nthe other for the common mode. Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world. These modes\nwith have different propagation speeds and impedances. If both modes\nare modeled, then you can simulate a transmission line inverter.
T2 0 0 OUT 0 Td=30n Z0=150
T1 IN 0 0 OUT Td=50n Z0=50
V1 IN 0 PULSE(0 1 0 1n 1n 10n) Rser=50
.tran 0 500n 0 1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 680
WIRE 128 192 -368 192
WIRE 320 192 224 192
WIRE -368 208 -368 192
WIRE 128 224 64 224
WIRE 288 224 224 224
WIRE 64 272 64 224
WIRE 64 272 16 272
WIRE 288 272 288 224
WIRE 336 272 288 272
WIRE -368 304 -368 288
WIRE 64 304 64 272
WIRE 128 304 64 304
WIRE 288 304 288 272
WIRE 288 304 224 304
WIRE 128 336 64 336
WIRE 288 336 224 336
WIRE 64 368 64 336
WIRE 288 368 288 336
SYMBOL tline 176 320 R0
WINDOW 0 -1 -21 Bottom 2
WINDOW 3 0 21 Top 2
SYMATTR InstName T2
SYMATTR Value Td=30n Z0=150
SYMBOL tline 176 208 R0
WINDOW 0 2 -19 Bottom 2
WINDOW 3 3 20 Top 2
SYMATTR InstName T1
SYMBOL voltage -368 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 56 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1n 1n 10n)
FLAG 64 368 0
FLAG 288 368 0
FLAG -368 304 0
FLAG 16 272 0
FLAG 320 192 0
FLAG -368 192 IN
FLAG 336 272 OUT
TEXT 376 368 Left 2 !.tran 0 500n 0 1n
TEXT 0 408 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT -376 -200 Left 2 ;This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax.  The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors.  A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements.  One for the normal(differential) mode and\nthe other for the common mode.  Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world.  These modes\nwith have different propagation speeds and impedances.  If both modes\nare modeled, then you can simulate a transmission line inverter.