Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\332541ecc720_pwm-soldering.asc
* Generated by LTspice 26.0.1 for Windows.
* 500kHz SQUARE
* Test falling and rising edge for FET toggling (gate)
V2 N001 0 24
R5 0 N005 1k
Q1 0 base N003 0 BC856B
R2 N001 npn 3k3
R1 base npn 3k
V1 N004 0 PULSE(0 3.3 0 1ps 1ps 1us 2us 2)
R4 N006 0 6
D2 N003 N002 TFZV18B
R7 N001 N002 1Mega
M1 N006 N002 N001 N001 RRS050P03
Q3 N001 base N002 0 BC847B
R3 N005 N004 2k
Q4 npn N005 0 0 2N2222
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 4us 0 10us
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1716 680
WIRE 736 -576 -80 -576
WIRE 1104 -576 736 -576
WIRE 1312 -576 1104 -576
WIRE 1456 -576 1312 -576
WIRE 1312 -512 1312 -576
WIRE 736 -480 736 -576
WIRE 1104 -448 1104 -576
WIRE 992 -400 960 -400
WIRE 1040 -400 992 -400
WIRE 1456 -320 1456 -576
WIRE 1104 -304 1104 -352
WIRE 1312 -304 1312 -432
WIRE 1312 -304 1104 -304
WIRE 1408 -304 1312 -304
WIRE 736 -224 736 -400
WIRE 768 -224 736 -224
WIRE 816 -224 768 -224
WIRE 960 -224 960 -400
WIRE 960 -224 896 -224
WIRE 1104 -224 1104 -304
WIRE 736 -96 736 -224
WIRE 1104 -64 1104 -160
WIRE 496 -48 64 -48
WIRE 624 -48 576 -48
WIRE 672 -48 624 -48
WIRE 1456 -48 1456 -224
WIRE 960 -16 960 -224
WIRE 1040 -16 960 -16
WIRE -80 0 -80 -576
WIRE 64 0 64 -48
WIRE 624 0 624 -48
WIRE -80 112 -80 80
WIRE 64 112 64 80
WIRE 64 112 -80 112
WIRE 624 112 624 80
WIRE 624 112 64 112
WIRE 736 112 736 0
WIRE 736 112 624 112
WIRE 1104 112 1104 32
WIRE 1104 112 736 112
WIRE 1456 112 1456 32
WIRE 1456 112 1104 112
WIRE 64 144 64 112
SYMBOL npn 1040 -448 R0
SYMATTR InstName Q3
SYMATTR Value BC847B
SYMBOL res 1440 -64 R0
SYMATTR InstName R4
SYMATTR Value 6
SYMBOL npn 672 -96 R0
SYMATTR InstName Q4
SYMATTR Value 2N2222
SYMBOL res 592 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2k
SYMBOL res 912 -240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3k
SYMBOL zener 1088 -160 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value TFZV18B
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL pmos 1408 -224 M180
SYMATTR InstName M1
SYMATTR Value RRS050P03
SYMBOL res 720 -496 R0
SYMATTR InstName R2
SYMATTR Value 3k3
SYMBOL voltage -80 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 24
SYMBOL res 640 96 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL voltage 64 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 1ps 1ps 1us 2us 2)
SYMBOL res 1296 -528 R0
SYMATTR InstName R7
SYMATTR Value 1Mega
SYMBOL pnp 1040 32 M180
SYMATTR InstName Q1
SYMATTR Value BC856B
FLAG 64 144 0
FLAG 768 -224 npn
FLAG 992 -400 base
TEXT 32 168 Left 2 !.tran 0 4us 0 10us
TEXT -88 -624 Left 5 ;500kHz SQUARE
TEXT -88 -688 Left 3 ;Test falling and rising edge for FET toggling (gate)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6657-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6657-3.asy)
C2 IN 0 .1
XU1 IN IN OUT 0 LT6657-3 ;pnba IN)_SHDN)OUT)GND
V1 IN 0 PWL(0 0 3m 3.5 7m 3.5 10m 0)
R1 OUT 0 500
C1 OUT 0 1
.tran 10m
.lib LT6657.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1652 680
WIRE 208 96 -208 96
WIRE 304 96 208 96
WIRE 320 96 304 96
WIRE 656 96 608 96
WIRE 752 96 656 96
WIRE -208 112 -208 96
WIRE 208 112 208 96
WIRE 656 112 656 96
WIRE 752 112 752 96
WIRE 208 192 208 176
WIRE -208 208 -208 192
WIRE 304 208 304 96
WIRE 320 208 304 208
WIRE 656 208 656 176
WIRE 752 208 752 192
WIRE 464 272 464 256
SYMBOL cap 192 112 R0
SYMATTR InstName C2
SYMATTR Value .1u
SYMBOL cap 640 112 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMBOL voltage -208 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 3m 3.5 7m 3.5 10m 0)
SYMBOL LT6657-3 464 128 R0
SYMATTR InstName U1
SYMBOL res 736 96 R0
SYMATTR InstName R1
SYMATTR Value 500
FLAG 656 208 0
FLAG 464 272 0
FLAG -208 208 0
FLAG 752 96 OUT
FLAG 752 208 0
FLAG 208 192 0
FLAG -208 96 IN
TEXT 672 360 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3564.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3564.asy)
L1 N001 OUT 1.1 Rser=2m
R2 N002 0 316K
C2 OUT 0 22 Rser=5m
XU1 N002 0 IN N001 IN LTC3564 ;pnba FB)GND)Vin)SW)Run
Rload OUT 0 1.44
V1 IN 0 3.6
R1 OUT N002 634K
C1 OUT N002 22p
.tran 1.5m startup
.lib LTC3564.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1644 700
WIRE 224 160 144 160
WIRE 240 160 224 160
WIRE 480 160 464 160
WIRE 576 160 560 160
WIRE 672 160 576 160
WIRE 768 160 672 160
WIRE 864 160 768 160
WIRE 144 176 144 160
WIRE 768 176 768 160
WIRE 864 176 864 160
WIRE 576 192 576 160
WIRE 672 192 672 160
WIRE 144 272 144 256
WIRE 768 272 768 240
WIRE 864 272 864 256
WIRE 224 288 224 160
WIRE 240 288 224 288
WIRE 576 288 576 272
WIRE 576 288 464 288
WIRE 672 288 672 256
WIRE 672 288 576 288
WIRE 576 304 576 288
WIRE 352 352 352 336
WIRE 576 400 576 384
SYMBOL PowerProducts\\LTC3564 352 224 R0
WINDOW 0 0 -48 Center 2
WINDOW 3 0 48 Center 2
SYMATTR InstName U1
SYMBOL res 560 288 R0
SYMATTR InstName R2
SYMATTR Value 316K
SYMBOL cap 752 176 R0
WINDOW 0 27 13 Left 2
SYMATTR InstName C2
SYMATTR Value 22
SYMATTR SpiceLine Rser=5m
SYMBOL res 848 160 R0
SYMATTR InstName Rload
SYMATTR Value 1.44
SYMBOL VOLTAGE 144 160 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL cap 656 192 R0
SYMATTR InstName C1
SYMATTR Value 22p
SYMBOL ind 464 176 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.1
SYMATTR SpiceLine Rser=2m
SYMBOL res 560 176 R0
SYMATTR InstName R1
SYMATTR Value 634K
FLAG 144 272 0
FLAG 352 352 0
FLAG 768 272 0
FLAG 864 272 0
FLAG 576 400 0
FLAG 864 160 OUT
FLAG 144 160 IN
TEXT 704 376 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\4f4a5fc9764f_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N002 10K
MQ8 N002 GATE 0 0 NMOS
MQ6 V-UNSW N002 N001 N001 FDS4685
R3 VOUT 0 500
R2 N001 N002 100K
D10 GATE 5V D
R33 GATE 0 100K
R4 VOUT N003 1.4K
V1 V-UNSW 0 14.4
R34 GATE N004 1K
V3 M10 0 PULSE(0 5 .25 0 0 .25)
D2 N003 0 D
MQ7 VOUT N002 N001 N001 FDS4685
V2 5V 0 5
D9 M10 N004 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1376 728
WIRE -240 112 -640 112
WIRE 80 112 -240 112
WIRE 256 112 176 112
WIRE 352 112 256 112
WIRE 480 112 352 112
WIRE 720 112 576 112
WIRE 752 112 720 112
WIRE 880 112 752 112
WIRE 256 144 256 112
WIRE 352 144 352 112
WIRE -640 224 -640 112
WIRE 160 256 160 160
WIRE 256 256 256 224
WIRE 256 256 160 256
WIRE 304 256 256 256
WIRE 352 256 352 224
WIRE 352 256 304 256
WIRE 496 256 496 160
WIRE 496 256 352 256
WIRE 720 256 720 112
WIRE 304 288 304 256
WIRE 880 304 880 112
WIRE -400 368 -432 368
WIRE -352 368 -400 368
WIRE 80 368 -288 368
WIRE 176 368 80 368
WIRE 208 368 176 368
WIRE 256 368 208 368
WIRE 720 416 720 336
WIRE -224 432 -240 432
WIRE -176 432 -224 432
WIRE -48 432 -112 432
WIRE 80 432 80 368
WIRE 80 432 32 432
WIRE 176 432 176 368
WIRE -432 480 -432 368
WIRE -240 480 -240 432
WIRE -640 640 -640 304
WIRE -432 640 -432 560
WIRE -432 640 -640 640
WIRE -240 640 -240 560
WIRE -240 640 -432 640
WIRE 176 640 176 512
WIRE 176 640 -240 640
WIRE 304 640 304 384
WIRE 304 640 176 640
WIRE 720 640 720 480
WIRE 720 640 304 640
WIRE 880 640 880 384
WIRE 880 640 720 640
WIRE -640 688 -640 640
SYMBOL nmos 256 288 R0
SYMATTR InstName Q8
SYMBOL res 704 240 R0
SYMATTR InstName R4
SYMATTR Value 1.4K
SYMBOL res 48 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R34
SYMATTR Value 1K
SYMBOL LED 704 416 R0
SYMATTR InstName D2
SYMBOL pmos 576 160 M270
SYMATTR InstName Q7
SYMATTR Value FDS4685
SYMBOL res 160 416 R0
SYMATTR InstName R33
SYMATTR Value 100K
SYMBOL res 864 288 R0
SYMATTR InstName R3
SYMATTR Value 500
SYMBOL diode -176 448 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D9
SYMBOL voltage -640 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 14.4
SYMBOL diode -288 352 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D10
SYMBOL voltage -240 464 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 .25 0 0 .25)
SYMBOL pmos 80 160 R270
SYMATTR InstName Q6
SYMATTR Value FDS4685
SYMBOL res 240 128 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -432 464 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 336 128 R0
SYMATTR InstName R2
SYMATTR Value 100K
FLAG -640 688 0
FLAG 752 112 VOUT
FLAG -240 112 V-UNSW
FLAG 208 368 GATE
FLAG -400 368 5V
FLAG -224 432 M10
TEXT -674 712 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\29af1b138518_1213.asc
* Generated by LTspice 26.0.1 for Windows.
* Single Supply 3-Pole 1MHz Filter
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1213.asy)
C4 N002 0 390p
R1 OUT N001 4.12K
R4 N003 N002 680
V3 IN 0 3.75 AC 1
C3 OUT N003 200p
R3 N004 N003 680
C2 N004 0 150p
R5 N002 IN 680
C1 OUT N001 5p
XU1 N004 N001 +V 0 OUT LT1213 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
R2 N001 0 4.12K
.options gminsteps=0
.ac oct 100 1K 10Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 176 0 144 0
WIRE 304 0 240 0
WIRE -224 48 -224 32
WIRE 48 96 32 96
WIRE 144 96 144 0
WIRE 144 96 128 96
WIRE 176 96 144 96
WIRE 304 96 304 0
WIRE 304 96 256 96
WIRE -224 144 -224 128
WIRE 192 208 192 192
WIRE 144 224 144 96
WIRE 160 224 144 224
WIRE 304 240 304 96
WIRE 304 240 224 240
WIRE 320 240 304 240
WIRE -240 256 -384 256
WIRE -144 256 -160 256
WIRE -112 256 -144 256
WIRE -16 256 -32 256
WIRE 0 256 -16 256
WIRE 112 256 80 256
WIRE 160 256 112 256
WIRE -384 272 -384 256
WIRE -144 272 -144 256
WIRE 112 272 112 256
WIRE 192 288 192 272
WIRE 112 352 112 336
WIRE -384 368 -384 352
WIRE -144 368 -144 336
WIRE -16 384 -16 256
WIRE 192 384 -16 384
WIRE 304 384 304 240
WIRE 304 384 256 384
SYMBOL res -16 240 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R4
SYMATTR Value 680
SYMBOL res 272 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 4.12K
SYMBOL cap 256 368 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C3
SYMATTR Value 200p
SYMBOL res -144 240 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R5
SYMATTR Value 680
SYMBOL opamps\\LT1213 192 176 R0
SYMATTR InstName U1
SYMBOL res 144 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 4.12K
SYMBOL cap 240 -16 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C1
SYMATTR Value 5p
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 680
SYMBOL cap 96 272 R0
SYMATTR InstName C2
SYMATTR Value 150p
SYMBOL voltage -384 256 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value 3.75
SYMBOL voltage -224 32 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL cap -160 272 R0
SYMATTR InstName C4
SYMATTR Value 390p
FLAG -224 144 0
FLAG 192 192 +V
FLAG -224 32 +V
FLAG -384 368 0
FLAG 192 288 0
FLAG 32 96 0
FLAG 112 352 0
FLAG -144 368 0
FLAG 320 240 OUT
FLAG -384 256 IN
TEXT 16 -48 Bottom 0 ;Single Supply 3-Pole 1MHz Filter
TEXT -128 448 Left 0 !.options gminsteps=0
TEXT -128 424 Left 0 !.ac oct 100 1K 10Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\b807c76a5e67_Raw-voltage-regulator-with-zener-diode..asc
* Generated by LTspice 26.0.1 for Windows.
* Raw voltage regulator with zener diode.
* The zener diode regulates the voltage by working in the breakdown region.\nR1 limits the current from the source.\n \nSizing: the load voltage is the nominal zener voltage 4.7V.\nThen IR_2 = 4.7/R2\n \nFrom the datasheet the zener current is found. R1 must be equal to:\n \nR1 = (V1 - Vz)/(Iz + IR_2) = (12 - 4.7)/(20mA + 10mA)
R4 voltage_divider 0 470
D1 0 Diode_BreakDownV 1N750
V2 N002 0 12
R2 Diode_BreakDownV 0 470
R1 N001 Diode_BreakDownV 242
R3 N002 voltage_divider 242
V1 N001 0 12
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1392 1008
WIRE 352 128 224 128
WIRE 864 128 736 128
WIRE 224 160 224 128
WIRE 352 160 352 128
WIRE 736 160 736 128
WIRE 864 160 864 128
WIRE 352 272 352 240
WIRE 464 272 352 272
WIRE 512 272 512 256
WIRE 512 272 464 272
WIRE 864 272 864 240
WIRE 976 272 864 272
WIRE 352 288 352 272
WIRE 464 304 464 272
WIRE 976 304 976 272
WIRE 352 416 352 352
WIRE 464 416 464 384
WIRE 976 416 976 384
SYMBOL res 336 144 R0
SYMATTR InstName R1
SYMATTR Value 242
SYMBOL voltage 736 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL voltage 224 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 848 144 R0
SYMATTR InstName R3
SYMATTR Value 242
SYMBOL res 960 288 R0
SYMATTR InstName R4
SYMATTR Value 470
SYMBOL res 448 288 R0
SYMATTR InstName R2
SYMATTR Value 470
SYMBOL zener 368 352 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N750
FLAG 224 240 0
FLAG 352 416 0
FLAG 464 416 0
FLAG 736 240 0
FLAG 976 416 0
FLAG 864 272 voltage_divider
FLAG 512 256 Diode_BreakDownV
TEXT 160 -32 Left 4 ;Raw voltage regulator with zener diode.
TEXT 224 528 Left 2 ;The zener diode regulates the voltage by working in the breakdown region.\nR1 limits the current from the source.\n \nSizing: the load voltage is the nominal zener voltage 4.7V.\nThen IR_2 = 4.7/R2\n \nFrom the datasheet the zener current is found. R1 must be equal to:\n \nR1 = (V1 - Vz)/(Iz + IR_2) = (12 - 4.7)/(20mA + 10mA)
TEXT 192 440 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\332d2349c5d0_SX1276434M.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N001 0 15p
C2 N002 0 12p
C3 N003 0 4p7
L1 N001 N002 12n
L2 N002 N003 18n
C5 N003 N002 0p
R1 N003 0 50
R2 N005 N004 50
V1 N004 0 SINE() AC 1
C4 N002 N001 2p7
L3 N005 N001 22n
.ac dec 100 100Meg 1000Meg
* SX1276 434MHz Low Pass Filter
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 112 0 112
WIRE 128 112 112 112
WIRE 176 112 128 112
WIRE 256 112 240 112
WIRE -320 208 -368 208
WIRE -128 208 -240 208
WIRE 0 208 0 112
WIRE 0 208 -48 208
WIRE 32 208 0 208
WIRE 128 208 128 112
WIRE 128 208 112 208
WIRE 160 208 128 208
WIRE 256 208 256 112
WIRE 256 208 240 208
WIRE 432 208 256 208
WIRE -368 240 -368 208
WIRE 432 256 432 208
WIRE 0 272 0 208
WIRE 128 272 128 208
WIRE 256 272 256 208
WIRE -368 368 -368 320
WIRE 0 368 0 336
WIRE 128 368 128 336
WIRE 256 368 256 336
WIRE 432 368 432 336
FLAG 0 368 0
FLAG 128 368 0
FLAG 256 368 0
FLAG 432 368 0
FLAG -368 368 0
SYMBOL cap -16 272 R0
SYMATTR InstName C1
SYMATTR Value 15p
SYMBOL cap 112 272 R0
SYMATTR InstName C2
SYMATTR Value 12p
SYMBOL cap 240 272 R0
SYMATTR InstName C3
SYMATTR Value 4p7
SYMBOL ind 16 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 12n
SYMBOL ind 144 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 18n
SYMBOL cap 240 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 0p
SYMBOL res 416 240 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL res -224 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL voltage -368 224 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value SINE()
SYMBOL cap 112 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 2p7
SYMBOL ind -144 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L3
SYMATTR Value 22n
TEXT 272 416 Left 2 !.ac dec 100 100Meg 1000Meg
TEXT -432 56 Left 2 ;SX1276 434MHz Low Pass Filter
* Z:\home\khalils\Downloads\files\data\raw_asc\2611e1f8693f_318A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT318A.asy)
R2 N001 0 1K
XU1 N003 N001 +V -V N002 LT118A ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
V3 N003 0 SINE(0 1 1K)
V2 -V 0 -15
R1 N002 N001 1K
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -32 96 -48 96
WIRE 64 96 48 96
WIRE 80 96 64 96
WIRE 192 96 160 96
WIRE -256 112 -256 96
WIRE -160 112 -160 96
WIRE 128 208 128 192
WIRE -256 224 -256 192
WIRE -160 224 -160 192
WIRE 64 224 64 96
WIRE 96 224 64 224
WIRE 192 240 192 96
WIRE 192 240 160 240
WIRE 96 256 -64 256
WIRE -64 272 -64 256
WIRE 128 288 128 272
WIRE -64 368 -64 352
SYMBOL voltage -64 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL voltage -256 96 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 64 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -160 96 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT318A 128 240 R0
SYMATTR InstName U1
SYMBOL res 176 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG -160 224 0
FLAG 128 192 +V
FLAG -160 96 +V
FLAG 128 288 -V
FLAG -256 224 0
FLAG -256 96 -V
FLAG -48 96 0
FLAG -64 368 0
TEXT 136 344 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\162416c5aae1_d-flip-flop.asc
* Generated by LTspice 26.0.1 for Windows.
A1 N001 0 in 0 0 N001 out 0 DFLOP vlow=0 vhigh=5
V1 in 0 PULSE(0 5 {1/2/f} 10n 10n {1/2/f} {1/f})
.tran {5/f}
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 384 16 48 16
WIRE 224 64 96 64
WIRE 224 112 224 64
WIRE 48 160 48 16
WIRE 144 160 48 160
WIRE 464 160 304 160
WIRE -80 208 -144 208
WIRE 144 208 -80 208
WIRE 384 208 384 16
WIRE 384 208 320 208
WIRE -80 272 -80 208
WIRE 96 304 96 64
WIRE 224 304 224 256
WIRE 224 304 96 304
WIRE -80 368 -80 352
WIRE 224 368 224 304
WIRE 224 368 -80 368
WIRE -80 416 -80 368
FLAG -80 416 0
FLAG -144 208 in
IOPIN -144 208 In
FLAG 464 160 out
IOPIN 464 160 Out
SYMBOL Digital\\dflop 224 112 R0
WINDOW 3 8 12 Left 2
SYMATTR InstName A1
SYMATTR Value vlow=0 vhigh=5
SYMBOL voltage -80 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 {1/2/f} 10n 10n {1/2/f} {1/f})
TEXT -216 440 Left 2 !.tran {5/f}
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1110.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1110.asy)
Rload OUT 0 300
V1 IN 0 1.5 Rser=0.1
R2 N002 0 13.8K
D1 N001 OUT MBRS140
C2 OUT 0 15 Rser=0.02
L1 IN N001 47 Rser=0.02 Rpar=5000
XU1 IN IN N001 0 0 MP_01 MP_02 N002 LT1110 top=1K bot=1T ;pnba Ilim)Vin)SW1)SW2)GND)))FB
R1 OUT N002 300K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 4m startup
.lib LT1110.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2504 1688
WIRE 1472 912 1328 912
WIRE 1600 912 1472 912
WIRE 1632 912 1600 912
WIRE 1744 912 1712 912
WIRE 1792 912 1744 912
WIRE 1904 912 1856 912
WIRE 2016 912 1904 912
WIRE 2112 912 2016 912
WIRE 1328 928 1328 912
WIRE 2016 928 2016 912
WIRE 2112 928 2112 912
WIRE 1904 944 1904 912
WIRE 1472 960 1472 912
WIRE 1600 960 1600 912
WIRE 1328 1024 1328 1008
WIRE 2016 1024 2016 992
WIRE 2112 1024 2112 1008
WIRE 1744 1040 1744 912
WIRE 1744 1040 1664 1040
WIRE 1904 1104 1904 1024
WIRE 1904 1104 1664 1104
WIRE 1904 1120 1904 1104
WIRE 1680 1168 1664 1168
WIRE 1904 1216 1904 1200
WIRE 1536 1264 1536 1248
SYMBOL schottky 1792 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL RES 1888 928 R0
SYMATTR InstName R1
SYMATTR Value 300K
SYMBOL VOLTAGE 1328 912 R0
SYMATTR InstName V1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=0.1
SYMBOL POLCAP 2000 928 R0
SYMATTR InstName C2
SYMATTR Value 15
SYMATTR SpiceLine Rser=0.02
SYMBOL PowerProducts\\LT1110 1536 1104 R0
SYMATTR InstName U1
SYMBOL RES 2096 912 R0
SYMATTR InstName Rload
SYMATTR Value 300
SYMBOL IND 1616 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 47
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL RES 1888 1104 R0
SYMATTR InstName R2
SYMATTR Value 13.8K
FLAG 2112 912 OUT
FLAG 1904 1216 0
FLAG 2016 1024 0
FLAG 2112 1024 0
FLAG 1328 1024 0
FLAG 1680 1168 0
FLAG 1536 1264 0
FLAG 1328 912 IN
TEXT 1704 1256 Left 2 !.tran 4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\efdf493de8a3_Fig1.asc
* Generated by LTspice 26.0.1 for Windows.
VBE N002 0 3V
Q1 N001 N002 0 0 2SAR372P5
VCE N001 0 -3V
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VBE -0.8V -0.4V 3mV
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 688 208 464 208
WIRE 464 240 464 208
WIRE 400 288 304 288
WIRE 688 320 688 208
WIRE 304 352 304 288
WIRE 304 480 304 432
WIRE 464 480 464 336
WIRE 464 480 304 480
WIRE 688 480 688 400
WIRE 688 480 464 480
WIRE 464 512 464 480
SYMBOL Voltage 688 304 R0
SYMATTR InstName VCE
SYMATTR Value -3V
SYMBOL pnp 400 240 R0
SYMATTR InstName Q1
SYMATTR Value 2SAR372P5
SYMBOL Voltage 304 336 R0
WINDOW 3 24 96 Invisible 2
SYMATTR Value 3V
SYMATTR InstName VBE
FLAG 464 512 0
TEXT 304 544 Left 2 !.dc VBE -0.8V -0.4V 3mV
* Z:\home\khalils\Downloads\files\data\raw_asc\05830d64fa86_Fig26_18_ID_VDS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1) and 1/d(Id(M1)) for output resistance
M1 N001 N002 0 0 N_50n l=50n w=500n
VGS N002 0 400m
VDS N001 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VDS 0 1 1m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 288 208 288 192
WIRE 288 304 288 288
WIRE 400 192 288 192
WIRE 448 112 448 80
WIRE 448 224 448 208
WIRE 496 160 448 160
WIRE 640 80 448 80
WIRE 640 112 640 80
WIRE 640 224 640 192
SYMBOL nmos4 400 112 R0
WINDOW 0 59 18 Left 0
WINDOW 3 64 75 Left 0
WINDOW 123 64 103 Left 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 640 96 R0
WINDOW 0 41 55 Left 0
WINDOW 3 41 83 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 0
SYMBOL voltage 288 192 R0
WINDOW 0 -90 57 Left 0
WINDOW 3 -90 85 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 400m
FLAG 288 304 0
FLAG 448 224 0
FLAG 640 224 0
FLAG 496 160 0
TEXT 384 272 Left 0 !.dc VDS 0 1 1m
TEXT 384 296 Left 0 !.lib cmosedu_models.txt
TEXT 224 56 Left 0 ;Plot Id(M1) and 1/d(Id(M1)) for output resistance