Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1024.asc
* Generated by LTspice 26.0.1 for Windows.
* Two Op Amp Instrumentation Amplifier
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1024.asy)
R1 N003 N001 10K
V2 -V 0 -15
V1 +V 0 15
R5 OUT N002 100K
XU1 IN- N001 +V -V N003 LT1012 ;pnba In+)In-)V+)V-)OUT
V4 IN+ 0 SINE(0 1 10)
XU2 IN+ N002 +V -V OUT LT1012 ;pnba In+)In-)V+)V-)OUT
R4 N002 N001 2.2K
R3 N002 N003 10K
V3 IN- IN+ SINE(0 1m 100)
R2 N001 0 100K
.tran 1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 272 48 128 48
WIRE 384 48 352 48
WIRE 416 48 384 48
WIRE 512 48 496 48
WIRE 32 112 16 112
WIRE 128 112 128 48
WIRE 128 112 112 112
WIRE 144 112 128 112
WIRE 240 112 224 112
WIRE 192 208 192 192
WIRE 128 224 128 112
WIRE 160 224 128 224
WIRE 432 224 432 208
WIRE 240 240 240 112
WIRE 240 240 224 240
WIRE 288 240 240 240
WIRE 384 240 384 48
WIRE 384 240 368 240
WIRE 400 240 384 240
WIRE -208 256 -208 240
WIRE -112 256 -112 240
WIRE 160 256 0 256
WIRE 512 256 512 48
WIRE 512 256 464 256
WIRE 544 256 512 256
WIRE 0 272 0 256
WIRE 400 272 368 272
WIRE 192 288 192 272
WIRE 432 304 432 288
WIRE -208 352 -208 336
WIRE -112 352 -112 336
WIRE 0 368 0 352
WIRE 272 368 0 368
WIRE 368 368 368 272
WIRE 368 368 272 368
WIRE 0 384 0 368
WIRE 0 480 0 464
SYMBOL voltage -208 240 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 0 256 R0
WINDOW 3 27 95 Left 2
SYMATTR Value SINE(0 1m 100)
SYMATTR InstName V3
SYMBOL res 240 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL opamps\\LT1024 432 192 R0
SYMATTR InstName U2
SYMBOL opamps\\LT1024 192 176 R0
SYMATTR InstName U1
SYMBOL voltage 0 368 R0
WINDOW 3 23 94 Left 2
SYMATTR Value SINE(0 1 10)
SYMATTR InstName V4
SYMBOL res 384 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL res 512 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 100K
SYMBOL voltage -112 240 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 368 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2.2K
FLAG -112 352 0
FLAG 192 192 +V
FLAG -112 240 +V
FLAG 192 288 -V
FLAG -208 352 0
FLAG -208 240 -V
FLAG 16 112 0
FLAG 432 208 +V
FLAG 432 304 -V
FLAG 0 480 0
FLAG 544 256 OUT
FLAG 0 256 IN-
FLAG 272 368 IN+
TEXT 424 432 Left 2 !.tran 1
TEXT 168 -8 Bottom 2 ;Two Op Amp Instrumentation Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\7bd4cb34dd15_VoltageBuffer.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
V2 0 N004 15
V3 N003 0 SINE(0 .5 10)
XU1 N003 N002 N001 N004 N002 LT1001 ;pnba In+)In-)V+)V-)OUT
V1 N001 0 15
.tran 1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 400 -96 128 -96
WIRE 544 0 288 0
WIRE 128 48 128 -96
WIRE 400 80 400 -96
WIRE 288 96 288 0
WIRE 368 96 288 96
WIRE 544 112 544 0
WIRE 544 112 432 112
WIRE 672 112 544 112
WIRE 368 128 272 128
WIRE 128 160 128 128
WIRE 192 160 128 160
WIRE 128 176 128 160
WIRE 272 208 272 128
WIRE 272 208 32 208
WIRE 192 224 192 160
WIRE 32 240 32 208
WIRE 192 368 192 304
WIRE 400 368 400 144
WIRE 400 368 192 368
SYMBOL OpAmps\\OP07 400 48 R0
SYMATTR InstName U1
SYMBOL voltage 32 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 .5 10)
SYMBOL voltage 128 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 192 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
FLAG 128 176 0
FLAG 32 320 0
TEXT -2 374 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP122-2.85.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP122-2.85.asy)
XU1 OUT MP_01 0 IN MP_02 IN ADP122 K=1/5700 ;pnba Vout))GND)En))Vin
C2 OUT 0 1
Rload OUT 0 100
V1 IN 0 5.5
C1 IN 0 1
.tran 10m startup
.lib ADP122.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL ADP122-2.85 256 208 R0
SYMATTR InstName U1
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX4232.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX4232.asy)
XU1 IN OUT Vcc Vee OUT MAX4232 ;pnba In+)In-)V+)V-)OUT
CL OUT 0 15p
RL OUT 0 100k
Vcc Vcc 0 2.5
V1 IN 0 SINE(0 50m 100k)
Vee 0 Vee 2.5
.tran 10u
.lib MAX4232.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 144 288 144 272
WIRE 432 352 432 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 144 400 144 368
WIRE 144 400 112 400
WIRE 400 400 304 400
WIRE 112 416 112 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 144 448 144 400
WIRE 432 448 432 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 144 544 144 528
WIRE 304 592 304 576
SYMBOL voltage 144 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL MAX4232 432 320 R0
SYMATTR InstName U1
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 100k)
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 100k
SYMBOL voltage 144 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
FLAG 720 384 OUT
FLAG 144 272 Vcc
FLAG 144 544 Vee
FLAG 432 320 Vcc
FLAG 432 448 Vee
FLAG 112 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
TEXT 96 632 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1043.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1013.asy)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC1043.asy)
C2 S2A 0 .1
C1 N003 0 1000p
XU2 0 N001 +V -V OUT LT1013 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
XU1 S1A S2A N002 0 0 N004 N003 +V -V LTC1043 ;pnba S1A)S2A)Ca+)S3A)S4A)Ca-)Cosc)Vdd)Vss
R2 N001 S2A 10K
V3 S1A 0 SINE(0 10m 100)
R1 OUT N001 10K
V2 -V 0 -5
C4 OUT N001 .1
C3 N002 N004 .1
.tran 1 startup
.lib LT1013.sub
.lib LTC1043.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 896 680
WIRE 560 0 544 0
WIRE 656 0 624 0
WIRE 192 96 192 80
WIRE 384 96 352 96
WIRE 416 96 384 96
WIRE 448 96 416 96
WIRE 544 96 544 0
WIRE 544 96 528 96
WIRE 560 96 544 96
WIRE 656 96 656 0
WIRE 656 96 640 96
WIRE 416 144 416 96
WIRE 0 160 -176 160
WIRE 64 160 0 160
WIRE 352 160 352 96
WIRE 352 160 320 160
WIRE -176 176 -176 160
WIRE -400 208 -400 192
WIRE -304 208 -304 192
WIRE 592 208 592 192
WIRE 64 224 48 224
WIRE 352 224 320 224
WIRE 544 224 544 96
WIRE 560 224 544 224
WIRE 656 240 656 96
WIRE 656 240 624 240
WIRE 688 240 656 240
WIRE 352 256 352 224
WIRE 416 256 416 208
WIRE 416 256 352 256
WIRE 496 256 416 256
WIRE 560 256 496 256
WIRE -176 272 -176 256
WIRE 496 272 496 256
WIRE 352 288 320 288
WIRE 592 288 592 272
WIRE -400 304 -400 288
WIRE -304 304 -304 288
WIRE -16 352 -32 352
WIRE 64 352 48 352
WIRE 352 352 320 352
WIRE 192 432 192 416
SYMBOL res 544 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL cap 48 336 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000p
SYMBOL voltage -400 192 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 656 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL LTC1043 192 256 R0
SYMATTR InstName U1
SYMBOL opamps\\LT1013 592 176 R0
SYMATTR InstName U2
SYMBOL voltage -304 192 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 624 -16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value .1
SYMBOL cap 400 144 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL voltage -176 160 R0
WINDOW 3 16 98 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 10m 100)
SYMATTR InstName V3
SYMBOL cap 336 288 R0
WINDOW 3 25 57 Left 2
SYMATTR Value .1
SYMATTR InstName C3
FLAG -32 352 0
FLAG -304 304 0
FLAG -304 192 +V
FLAG -400 304 0
FLAG -400 192 -V
FLAG 592 192 +V
FLAG 192 80 +V
FLAG 592 288 -V
FLAG 192 432 -V
FLAG -176 272 0
FLAG 48 224 0
FLAG 496 272 0
FLAG 0 160 S1A
FLAG 384 96 S2A
FLAG 688 240 OUT
TEXT 120 504 Left 2 !.tran 1 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\4585e7bb6cec_555.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\NE555.asy)
R4 N004 0 1k
R1 N001 N002 1000
R2 N002 N003 1000
C2 N003 0 1F
V1 N001 0 12
C1 N005 0 1F
XU1 0 N003 N004 N001 N005 N003 N002 N001 NE555 ;pnba GND)TRIG)OUT)RST)CV)THRS)DIS)Vcc
D1 N002 N003 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1
.lib NE555.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 744
WIRE 400 -400 256 -400
WIRE 256 -320 -288 -320
WIRE 528 -208 -176 -208
WIRE 400 -128 400 -400
WIRE 400 -128 32 -128
WIRE 464 -128 400 -128
WIRE 416 -16 96 -16
WIRE 32 80 32 -128
WIRE 32 80 -48 80
WIRE 80 80 32 80
WIRE 128 96 112 96
WIRE 464 96 464 -128
WIRE 464 96 352 96
WIRE 96 160 96 -16
WIRE 128 160 96 160
WIRE 528 160 528 -208
WIRE 528 160 352 160
WIRE -176 208 -176 -208
WIRE -144 208 -176 208
WIRE -48 208 -48 160
WIRE -48 208 -144 208
WIRE 128 224 -512 224
WIRE 416 224 416 -16
WIRE 416 224 352 224
WIRE -144 256 -144 208
WIRE -48 256 -48 208
WIRE 80 288 80 80
WIRE 128 288 80 288
WIRE 464 288 352 288
WIRE -512 320 -512 224
WIRE -144 336 -144 320
WIRE -48 336 -144 336
WIRE 96 336 96 160
WIRE 96 336 -48 336
WIRE -48 416 -48 336
WIRE 464 416 464 288
WIRE 464 416 240 416
WIRE -288 544 -288 -320
WIRE -48 544 -48 480
WIRE -48 544 -288 544
WIRE -48 560 -48 544
WIRE 112 560 112 96
WIRE 112 560 -48 560
WIRE 240 560 240 480
WIRE 240 560 112 560
WIRE -512 592 -512 400
WIRE 112 592 112 560
WIRE 112 592 -512 592
WIRE 112 656 112 592
WIRE 144 656 112 656
WIRE 144 704 144 656
SYMBOL res -528 304 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL cap 224 416 R0
SYMATTR InstName C1
SYMATTR Value 1F
SYMBOL diode -160 256 R0
SYMATTR InstName D1
SYMBOL res -64 240 R0
SYMATTR InstName R2
SYMATTR Value 1000
SYMBOL cap -64 416 R0
SYMATTR InstName C2
SYMATTR Value 1F
SYMBOL Misc\\NE555 240 192 R0
SYMATTR InstName U1
SYMBOL res -64 64 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL voltage 256 -416 R0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 144 704 0
TEXT -514 728 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\0787bf4e2468_Level9Comparison.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N003 0 1Gig
R1 N002 0 1Gig
V1 N001 0 1
QGP N002 N001 0 0 BC856_PHI_1
QVBIC N003 N001 0 0 BC856_PHI_3
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.MODEL BC856_PHI_1
.INC GP-BC856_PHI.mod
.dc V1 5 6 100m
.TEMP -55 +25 +150
.PARAM tnom=25
.PARAM Vbbe=5 ibbe=10u
.LIB GP-BC856_PHI.par
.MODEL BC856_PHI_3
.INC GP2VBIC.mod
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 5756 2000
WIRE 1840 704 1680 704
WIRE 2064 704 1840 704
WIRE 1936 720 1920 720
WIRE 2160 720 2144 720
WIRE 1936 736 1936 720
WIRE 2160 736 2160 720
WIRE 1840 768 1840 704
WIRE 1856 768 1840 768
WIRE 2064 768 2064 704
WIRE 2080 768 2064 768
WIRE 1680 784 1680 704
WIRE 1920 832 1920 816
WIRE 2144 832 2144 816
WIRE 1680 928 1680 864
WIRE 1920 928 1920 912
WIRE 2144 928 2144 912
SYMBOL pnp 2080 816 M180
SYMATTR InstName QVBIC
SYMATTR Value BC856_PHI_3
SYMBOL pnp 1856 816 M180
SYMATTR InstName QGP
SYMATTR Value BC856_PHI_1
SYMBOL voltage 1680 768 R0
WINDOW 3 24 104 Invisible 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 1
SYMATTR InstName V1
SYMBOL res 1904 816 R0
SYMATTR InstName R1
SYMATTR Value 1Gig
SYMBOL res 2128 816 R0
SYMATTR InstName R3
SYMATTR Value 1Gig
FLAG 1936 736 0
FLAG 1680 928 0
FLAG 1920 928 0
FLAG 2160 736 0
FLAG 2144 928 0
TEXT 1680 1040 Left 0 !.MODEL BC856_PHI_1\n.INC GP-BC856_PHI.mod
TEXT 1680 1008 Left 0 !.dc V1 5 6 100m
TEXT 1680 976 Left 0 !.TEMP -55 +25 +150
TEXT 2128 960 Left 0 !.PARAM tnom=25\n.PARAM Vbbe=5 ibbe=10u \n.LIB GP-BC856_PHI.par\n.MODEL BC856_PHI_3\n.INC GP2VBIC.mod
* Z:\home\khalils\Downloads\files\data\raw_asc\1836966d0b52_nonlin_inductor_tanh1.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot V(ind)/1V to get the inductance in Henry.\n(Change the scale of the y-axis to "linear".)\n \nTarget has been 800uH @0A and 180uH @10A.
I1 0 ind {I_DC} AC {1/(2*pi)}
L1 ind 0 flux=(800u-10u)/0.14*tanh(0.14*x)+10u*x Rser=1e-9
.ac list 1
.step param I_DC -20 20 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1260 680
WIRE -16 80 -16 32
WIRE -16 224 -16 160
WIRE 128 32 -16 32
WIRE 128 80 128 32
WIRE 128 224 128 160
WIRE 224 32 128 32
IOPIN 224 32 Out
SYMBOL ind 112 64 R0
SYMATTR InstName L1
SYMATTR Value flux=(800u-10u)/0.14*tanh(0.14*x)+10u*x
SYMATTR SpiceLine Rser=1e-9
SYMBOL current -16 160 R180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
WINDOW 123 24 -28 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value {I_DC}
SYMATTR Value2 AC {1/(2*pi)}
FLAG -16 224 0
FLAG 128 224 0
FLAG 224 32 ind
TEXT -144 -56 Left 0 !.ac list 1
TEXT -144 -112 Left 0 !.step param I_DC -20 20 0.1
TEXT -144 -232 Left 0 ;Plot   V(ind)/1V   to get the inductance in Henry.\n(Change the scale of the y-axis to "linear".)\n \nTarget has been 800uH @0A and 180uH @10A.
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4097-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4097-1.asy)
C1 OUT 0 10p
V1 +V 0 5
Vin IN 0 SINE(0 10m 1k)
R2 OUT N001 1k
V2 -V 0 -5
R3 OUT 0 10k
XU1 IN N001 +V -V OUT NC_01 ADA4097-1 ;pnba In+)In-)V+)V-)OUT)SD
R1 N001 0 1k
.tran 2m
.lib ADA4097-1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 752 -1216 624 -1216
WIRE 160 -1152 160 -1168
WIRE 272 -1152 272 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 704 -1104 608 -1104
WIRE 752 -1104 752 -1216
WIRE 752 -1104 704 -1104
WIRE 848 -1104 752 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 848 -1072 848 -1104
WIRE 560 -1056 560 -1072
WIRE 160 -1040 160 -1072
WIRE 272 -1040 272 -1072
WIRE 432 -976 432 -992
WIRE 752 -976 752 -1008
WIRE 848 -976 848 -1008
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 10m 1k)
SYMBOL voltage 272 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL cap 832 -1072 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL OpAmps\\ADA4097-1 576 -1104 R0
SYMATTR InstName U1
SYMBOL voltage 160 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 736 -1104 R0
SYMATTR InstName R3
SYMATTR Value 10k
FLAG 160 -1168 +V
FLAG 432 -976 0
FLAG 704 -1104 OUT
FLAG 432 -1088 IN
FLAG 560 -1136 +V
FLAG 272 -1168 -V
FLAG 560 -1056 -V
FLAG 416 -1216 0
FLAG 272 -1040 0
FLAG 160 -1040 0
FLAG 752 -976 0
FLAG 848 -976 0
TEXT 680 -936 Left 2 !.tran 2m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADGS2414D.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input\nQinj not included\nSPI functionality is not modelled\nOny one channel is modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADGS2414D.asy)
XU1 vIN vD vS v- 0 v+ ADGS2414D ;pnba IN)D)S)Vss)GND)Vdd
R1 vD 0 301
C1 vD 0 36p
V4 v- 0 -15
V2 vIN 0 PULSE(0 2.5 20n 20n 20n 150m 300m)
V1 vS 0 SINE(0 10 20)
V3 v+ 0 15
.tran 1
.lib ADGS2414D.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 832
WIRE 240 160 240 128
WIRE -80 224 -112 224
WIRE 112 224 0 224
WIRE 144 224 112 224
WIRE 384 224 336 224
WIRE 464 224 384 224
WIRE 576 224 464 224
WIRE 464 256 464 224
WIRE 576 256 576 224
WIRE 112 288 48 288
WIRE 144 288 112 288
WIRE -288 336 -288 304
WIRE -192 336 -192 304
WIRE 48 336 48 288
WIRE 464 352 464 336
WIRE 576 352 576 320
WIRE 288 416 288 400
WIRE 192 432 192 400
WIRE -288 464 -288 416
WIRE -192 464 -192 416
WIRE 48 464 48 416
SYMBOL voltage 16 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 20)
SYMBOL res 448 240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage -288 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL cap 560 256 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL ADGS2414D 240 272 R0
SYMATTR InstName U1
SYMBOL voltage -192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -15
SYMBOL voltage 48 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 30 177 Left 2
SYMATTR Value PULSE(0 2.5 20n 20n 20n 150m 300m)
SYMATTR InstName V2
FLAG -112 224 0
FLAG 48 464 0
FLAG 464 352 0
FLAG 288 416 0
FLAG 384 224 vD
FLAG 112 224 vS
FLAG 112 288 vIN
FLAG 576 352 0
FLAG -288 304 v+
FLAG 240 128 v+
FLAG -288 464 0
FLAG -192 464 0
FLAG -192 304 v-
FLAG 192 432 v-
TEXT 80 528 Left 2 !.tran 1
TEXT -288 8 Left 2 ;Note:\nSwitch shown for a logic 0 input\nQinj not included\nSPI functionality is not modelled\nOny one channel is modelled
* Z:\tmp\asc_dec_bjh7r6w2\012a0951b172_Solenoid_1_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N002 4.7k
R3 0 N002 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 576 240 576 48
WIRE 720 240 576 240
WIRE 576 272 576 240
WIRE 224 400 -128 400
WIRE 384 400 224 400
WIRE 576 400 576 352
WIRE 576 400 464 400
WIRE 768 400 576 400
WIRE 224 464 224 400
SYMBOL res 560 256 R0
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL res 368 384 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1
FLAG 224 464 0
* Z:\home\khalils\Downloads\files\data\raw_asc\041af22a3cbd_Draft9.asc
* Generated by LTspice 26.0.1 for Windows.
;.op dec 10000000 10Meg 300Meg
;.step param Ctest list 10p 20p 30p
V1 N003 0 AC 1 0
C1 0 N001 20p
C2 N001 N003 20p
R1 0 N002 1000000
V2 N002 N001 {Vtest}
D1 N001 0 MV2201
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.step param Vtest list 1 2 3 4 5
.ac dec 10000000 10Meg 300Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1300 680
WIRE -80 -48 -112 -48
WIRE 16 -48 0 -48
WIRE 128 -48 96 -48
WIRE -112 64 -112 -48
WIRE -32 64 -112 64
WIRE 128 64 128 -48
WIRE 128 64 32 64
WIRE -240 160 -320 160
WIRE -112 160 -112 64
WIRE -112 160 -176 160
WIRE -80 160 -112 160
WIRE 16 160 -16 160
WIRE 128 160 128 64
WIRE 128 160 16 160
WIRE -320 224 -320 160
WIRE 16 240 16 160
WIRE -320 368 -320 304
SYMBOL voltage 16 -48 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value {Vtest}
SYMBOL cap -16 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 20p
SYMBOL res 112 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1000000
SYMBOL cap -176 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 20p
SYMBOL varactor -32 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MV2201
SYMATTR Type diode
SYMBOL voltage -320 208 R0
WINDOW 3 -128 70 Left 2
WINDOW 123 -128 42 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMATTR InstName V1
FLAG -320 368 0
FLAG 16 240 0
TEXT 888 -56 Left 2 !.step param Vtest list 1 2 3 4 5
TEXT -576 40 Left 2 !.ac dec 10000000 10Meg 300Meg
TEXT 568 360 Left 2 !;.op dec 10000000 10Meg 300Meg
TEXT 888 8 Left 2 !;.step param Ctest list 10p 20p 30p
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2050.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC2050.asy)
V1 +V 0 2.5
V3 N003 0 SINE(0 1 1K)
XU1 N003 N001 +V -V N002 NC_01 LTC2050 ;pnba In+)In-)V+)V-)OUT)SHDN
V2 -V 0 -2.5
R2 N001 0 10K
R1 N002 N001 10K
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -48 -64 -64 -64
WIRE 48 -64 32 -64
WIRE 112 -64 48 -64
WIRE 224 -64 192 -64
WIRE -288 16 -288 0
WIRE -160 16 -160 0
WIRE 48 64 48 -64
WIRE 64 64 48 64
WIRE 224 96 224 -64
WIRE 224 96 208 96
WIRE -288 112 -288 96
WIRE -160 112 -160 96
WIRE 64 128 -96 128
WIRE -96 160 -96 128
WIRE 96 192 96 176
WIRE -96 256 -96 240
SYMBOL opamps\\LTC2050 96 96 R0
SYMATTR InstName U1
SYMBOL voltage -96 144 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 48 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage -160 0 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 208 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -288 0 R0
SYMATTR InstName V2
SYMATTR Value -2.5
FLAG -160 112 0
FLAG 96 16 +V
FLAG -160 0 +V
FLAG 96 192 -V
FLAG -288 112 0
FLAG -288 0 -V
FLAG -96 256 0
FLAG -64 -64 0
TEXT 224 240 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\02aea261c345_ID_vs_UDS-4_2.asc
* Generated by LTspice 26.0.1 for Windows.
* ID_vs_UDS-4_2
M1 N001 N002 0 0 IRF7220
Vgs N002 0
Vds N001 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vds 0 -10V Vgs -1V -2V 0.2V
.meas dc Id find Id(M1) when Vds=-5V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1292 680
WIRE -560 -144 -720 -144
WIRE -720 -64 -720 -144
WIRE -560 -16 -560 -144
WIRE -768 16 -912 16
WIRE -912 32 -912 16
WIRE -912 128 -912 112
WIRE -720 128 -720 32
WIRE -560 128 -560 64
SYMBOL voltage -560 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 37 60 Left 2
SYMATTR InstName Vds
SYMATTR Value ""
SYMBOL pmos -768 -64 R0
WINDOW 3 55 52 Left 2
SYMATTR Value IRF7220
SYMATTR InstName M1
SYMBOL voltage -912 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 53 Left 2
WINDOW 3 40 69 Left 2
WINDOW 0 36 56 Left 2
SYMATTR Value ""
SYMATTR InstName Vgs
FLAG -560 128 0
FLAG -912 128 0
FLAG -720 128 0
TEXT -920 160 Left 2 !.dc Vds 0 -10V  Vgs -1V -2V 0.2V
TEXT -920 184 Left 2 !.meas dc Id find Id(M1) when Vds=-5V
TEXT -904 -136 Left 2 ;ID_vs_UDS-4_2