Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1640aeb0b747_4357.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4357.asy)
MQ2 N002 N005 N004 N004 IRF530
MQ1 N002 N003 N001 N001 IRF530
Rload N002 0 10
XU2 N002 N004 N005 0 N002 LTC4357 ;pnba OUT)IN)Gate)GND)Vdd
V2 N004 0 PWL(0 0 50m 48 100m 0)
V1 N001 0 PWL(0 48 50m 0 100m 48)
XU1 N002 N001 N003 0 N002 LTC4357 ;pnba OUT)IN)Gate)GND)Vdd
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m
.lib LTC4357.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 948 1284
WIRE -32 144 -400 144
WIRE 112 144 -32 144
WIRE 304 144 208 144
WIRE -400 160 -400 144
WIRE 128 224 128 192
WIRE -400 256 -400 240
WIRE -32 288 -32 144
WIRE 0 288 -32 288
WIRE 304 288 304 144
WIRE 304 288 256 288
WIRE 304 384 304 288
WIRE 304 384 256 384
WIRE 304 448 304 384
WIRE 448 448 304 448
WIRE 128 464 128 448
WIRE 448 464 448 448
WIRE -32 512 -400 512
WIRE 112 512 -32 512
WIRE 304 512 304 448
WIRE 304 512 208 512
WIRE -400 528 -400 512
WIRE 448 560 448 544
WIRE 128 592 128 560
WIRE -400 624 -400 608
WIRE -32 656 -32 512
WIRE 0 656 -32 656
WIRE 304 656 304 512
WIRE 304 656 256 656
WIRE 304 752 304 656
WIRE 304 752 256 752
WIRE 128 832 128 816
SYMBOL nmos 208 560 M270
WINDOW 0 55 46 VTop 2
WINDOW 3 -13 73 VLeft 2
SYMATTR InstName Q2
SYMATTR Value IRF530
SYMBOL res 432 448 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL LTC4357 128 336 R0
SYMATTR InstName U1
SYMBOL LTC4357 128 704 R0
SYMATTR InstName U2
SYMBOL voltage -400 512 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PWL(0 0 50m 48 100m 0)
SYMATTR InstName V2
SYMBOL nmos 208 192 M270
WINDOW 0 55 46 VTop 2
WINDOW 3 -13 73 VLeft 2
SYMATTR InstName Q1
SYMATTR Value IRF530
SYMBOL voltage -400 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PWL(0 48 50m 0 100m 48)
SYMATTR InstName V1
FLAG 128 464 0
FLAG -400 256 0
FLAG 448 560 0
FLAG 128 832 0
FLAG -400 624 0
TEXT 360 720 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\459697b69d18_Fig_3-52_Ex_Machine-1.asc
* Generated by LTspice 26.0.1 for Windows.
* * inverter state machine example \n V1 1 0 pulse(0 1 0 1u 1u .5m 1m) \n R1 2 0 1K ; an impedance for the .output statement \n .machine \n .output (2) V(1) < .5 \n .endmachine \n .tran 3m \n .end
R1 2 0 1k
C1 2 0 10n
V1 1 0 pulse(0 1 0 1u 1u .5m 1m)
.machine
.output (2) V(1) < .5
.endmachine
.tran 3m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 948
WIRE 64 368 32 368
WIRE 512 368 432 368
WIRE 544 368 512 368
WIRE 32 416 32 368
WIRE 432 416 432 368
WIRE 512 432 512 368
WIRE 32 528 32 496
WIRE 432 528 432 496
WIRE 512 528 512 496
SYMBOL res 416 400 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 32 400 R0
SYMATTR InstName V1
SYMATTR Value pulse(0 1 0 1u 1u .5m 1m)
SYMBOL cap 496 432 R0
SYMATTR InstName C1
SYMATTR Value 10n
FLAG 32 528 0
FLAG 64 368 1
FLAG 432 528 0
FLAG 544 368 2
FLAG 512 528 0
TEXT 8 720 Left 2 ;* inverter state machine example \n   V1 1 0 pulse(0 1 0 1u 1u .5m 1m) \n   R1 2 0 1K ; an impedance for the .output statement \n   .machine \n   .output (2) V(1) < .5 \n   .endmachine \n   .tran 3m \n   .end
TEXT 32 600 Left 2 !.machine \n.output (2) V(1) < .5 \n.endmachine
TEXT 408 584 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\0f3498fbdc9b_AS1.asc
* Generated by LTspice 26.0.1 for Windows.
+params: Vdrm=60 Itrms=0.8A Itsm=10A Igt=200uA Vgt=0.8
+ Ihold=5mA Ileak=50uA Cak=50pF GRratio=4
+params: Vdrm=800 Itrms=12 Itsm=120 Igt=15mA Vgt=1.5
+ Ihold=20mA Ileak=500uA GRratio=3
Q2 1 3 K 0 QNL OFF
RS A 1 1000k
R2 N003 N002 4.7k
V2 N001 N004 0
I1 A 1 {Ihold} load
RL A K {Rleak}
C1 A K {Cak}
Q3 3 1 A 0 QPL OFF
D1 1 2 Drev
D2 A 4 DVA
V1 N002 N004 1.5
I2 3 K {Ihold} load
XU1 VAK N003 0 BT151-800R ;pnba A)G)K
XSCR1 A G K 2N5061
D3 K 4 DVA
R1 N001 VAK 4.7k
Q1 2 G K 0 QNG
.SUBCKT 2N5061 A G K ; Motorola 2N5061 - model default
.param Grbe=(Vgt/Igt)/GRratio
.param Ggain=Ihold/Igt
.param Rleak=Vdrm/Ileak
.model QNL NPN(IS=640F Bf=50 RC=.45 TF=5.95u)
.model QNG NPN(Bf=Ggain Rb=Grbe Vje=Vgt Tf=.3nS Tr=6nS Cje=2pF Cjc=1pF)
.model QPL PNP(IS=640F Bf=50 RC=.45 TF=5.95u)
.model DVA D(Vj=.71 BV=Vdrm Cjo=1p)
.model Drev D(Vfwd=.71)
.ENDS
.SUBCKT BT151-800R A G K ; Philips BT151-800R
.ENDS
.dc v1 0.2 1.5 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1776 920
WIRE 736 -112 576 -112
WIRE 576 -96 576 -112
WIRE 576 16 576 -16
WIRE 576 48 576 16
WIRE 304 112 176 112
WIRE 528 112 384 112
WIRE 176 144 176 112
WIRE 736 144 736 -112
WIRE 176 240 176 224
WIRE 736 240 736 224
WIRE 736 240 176 240
WIRE 576 288 576 112
SYMBOL res 400 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.7k
SYMBOL res 560 -112 R0
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL Misc\\SCR 560 48 R0
SYMATTR InstName U1
SYMATTR Value BT151-800R
SYMBOL voltage 736 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage 176 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.5
FLAG 576 288 0
FLAG 576 16 VAK
TEXT 832 184 Left 2 !.SUBCKT 2N5061 A G K ; Motorola 2N5061 - model default\n+params: Vdrm=60 Itrms=0.8A Itsm=10A Igt=200uA Vgt=0.8\n+ Ihold=5mA Ileak=50uA Cak=50pF GRratio=4\n \nQ1 2 G K 0 QNG\nQ2 1 3 K 0 QNL OFF\nQ3 3 1 A 0 QPL OFF\nD1 1 2 Drev\nD2 A 4 DVA\nD3 K 4 DVA\nI1 A 1 {Ihold} load\nI2 3 K {Ihold} load\nRS A 1 1000k\nRL A K {Rleak}\nC1 A K {Cak}\n \n.param Grbe=(Vgt/Igt)/GRratio\n.param Ggain=Ihold/Igt\n.param Rleak=Vdrm/Ileak\n \n.model QNL NPN(IS=640F Bf=50 RC=.45 TF=5.95u)\n.model QNG NPN(Bf=Ggain Rb=Grbe Vje=Vgt Tf=.3nS Tr=6nS Cje=2pF Cjc=1pF)\n.model QPL PNP(IS=640F Bf=50 RC=.45 TF=5.95u)\n.model DVA D(Vj=.71 BV=Vdrm Cjo=1p)\n.model Drev D(Vfwd=.71)\n.ENDS
TEXT 840 -40 Left 2 !.SUBCKT BT151-800R A G K ; Philips BT151-800R\nXSCR1 A G K 2N5061\n+params: Vdrm=800 Itrms=12 Itsm=120 Igt=15mA Vgt=1.5\n+ Ihold=20mA Ileak=500uA GRratio=3\n.ENDS
TEXT 168 272 Left 2 !.dc v1 0.2 1.5 0.1
* Z:\tmp\asc_dec_bjh7r6w2\122b780af2ab_charger_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R4 VOUT 0 10
R3 VADJ 0 1300
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 160 368 128
WIRE 368 272 368 240
WIRE 496 272 368 272
WIRE 560 272 496 272
WIRE 368 304 368 272
WIRE 560 368 560 272
WIRE 240 416 96 416
WIRE 368 416 368 384
WIRE 368 416 240 416
WIRE 368 432 368 416
WIRE 368 544 368 512
WIRE 560 544 560 448
WIRE 560 544 368 544
WIRE 768 544 560 544
WIRE 368 576 368 544
SYMBOL res 544 352 R0
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL res 352 416 R0
SYMATTR InstName R3
SYMATTR Value 1300
FLAG 368 576 0
FLAG 496 272 VOUT
FLAG 240 416 VADJ
* Z:\home\khalils\Downloads\files\data\raw_asc\412644f6ec1b_1N4007.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 0
D1 vd1 0 1N4007
R1 vd1 N001 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -2 10 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 80 64 -16 64
WIRE 240 64 160 64
WIRE -16 112 -16 64
WIRE 240 112 240 64
WIRE -16 240 -16 192
WIRE 112 240 -16 240
WIRE 240 240 240 176
WIRE 240 240 112 240
WIRE 112 256 112 240
FLAG 112 256 0
FLAG 240 64 vd1
SYMBOL voltage -16 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL diode 224 112 R0
SYMATTR InstName D1
SYMATTR Value 1N4007
SYMBOL res 176 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
TEXT -48 280 Left 2 !.dc V1 -2 10 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\3335662b63dc_HighPeak.asc
* Generated by LTspice 26.0.1 for Windows.
* 2
RBoostHi2 out N001 {HiBPot*10k}
RBoostHi1 N001 in {(1-HiBPot)*10k}
RHiBQ1 out P002 {QPot*2k5}
L1 P001 P002 100m
Vin1 in 0 AC 1
RLoad 0 out 50
C1 N001 P001 10n
.step param HiBPot list 0.0001 0.25 0.5 0.75 0.9999
.step param QPot list 0.0001 0.25 0.5 0.75 1
.ac oct 10000 10 20000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 852
WIRE 32 96 -48 96
WIRE 192 96 112 96
WIRE 288 96 192 96
WIRE 288 128 288 96
WIRE 192 192 192 96
WIRE -48 272 -48 96
WIRE 192 384 192 272
WIRE 240 384 192 384
WIRE 288 384 288 352
WIRE 288 384 240 384
WIRE 320 384 288 384
WIRE 240 416 240 384
WIRE -48 528 -48 352
WIRE 240 528 240 496
IOPIN 320 384 Out
SYMBOL voltage -48 256 R0
WINDOW 3 24 96 Invisible 2
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMATTR InstName Vin1
SYMBOL res 256 512 R180
WINDOW 0 36 20 Left 2
WINDOW 3 36 48 Invisible 2
SYMATTR InstName Load
SYMATTR Value 50
SYMBOL res 208 288 R180
WINDOW 0 36 20 Left 2
WINDOW 3 36 48 Invisible 2
SYMATTR InstName RBoostHi2
SYMATTR Value {HiBPot*10k}
SYMBOL res 304 368 R180
WINDOW 0 -92 66 Left 2
WINDOW 3 -142 30 Left 2
SYMATTR InstName RHiBQ1
SYMATTR Value {QPot*2k5}
SYMBOL ind 272 176 R0
SYMATTR InstName L1
SYMATTR Value 100m
SYMBOL res 128 80 R90
WINDOW 0 0 54 VBottom 2
WINDOW 3 -10 54 Invisible 2
SYMATTR InstName RBoostHi1
SYMATTR Value {(1-HiBPot)*10k}
SYMBOL cap 272 128 R0
SYMATTR InstName C1
SYMATTR Value 10n
FLAG -48 528 0
FLAG -48 96 in
FLAG 240 528 0
FLAG 320 384 out
TEXT -8 80 Left 2 ;2
TEXT 464 136 Left 2 !.step param HiBPot list 0.0001 0.25 0.5 0.75 0.9999
TEXT 464 168 Left 2 !.step param QPot list 0.0001 0.25 0.5 0.75 1
TEXT -176 360 Left 2 !.ac oct 10000 10 20000
* Z:\home\khalils\Downloads\files\data\raw_asc\9ef8a0af591e_1078.asc
* Generated by LTspice 26.0.1 for Windows.
* Absolute Value Circuit(Full-Wave Rectifier)
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1078.asy)
V1 +V 0 5
V3 IN 0 SINE(0 1 100)
R1 N002 N001 200K
R2 N001 IN 200K
XU2 N002 OUT +V 0 OUT LT1078 ;pnba In+)In-)V+)V-)OUT
D1 N003 N002 1N4148
XU1 0 N001 +V 0 N003 LT1078 ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 -80 96
WIRE 128 96 112 96
WIRE 224 96 128 96
WIRE 400 96 304 96
WIRE -80 112 -80 96
WIRE 560 128 448 128
WIRE -192 160 -192 144
WIRE 496 192 496 176
WIRE -80 208 -80 192
WIRE 192 208 192 192
WIRE 448 208 448 128
WIRE 464 208 448 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 560 224 560 128
WIRE 560 224 528 224
WIRE 592 224 560 224
WIRE 320 240 224 240
WIRE 400 240 400 96
WIRE 400 240 384 240
WIRE 464 240 400 240
WIRE -192 256 -192 240
WIRE 160 256 128 256
WIRE 496 272 496 256
WIRE 192 288 192 272
SYMBOL res 320 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200K
SYMBOL diode 320 256 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage -192 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL opamps\\LT1078 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -80 96 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
SYMBOL opamps\\LT1078 496 160 R0
SYMATTR InstName U2
FLAG -192 256 0
FLAG 192 192 +V
FLAG -192 144 +V
FLAG -80 208 0
FLAG 192 288 0
FLAG 496 176 +V
FLAG 496 272 0
FLAG -80 96 IN
FLAG 592 224 OUT
FLAG 128 256 0
TEXT 416 344 Left 2 !.tran 30m
TEXT 392 32 Bottom 2 ;Absolute Value Circuit(Full-Wave Rectifier)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1468.asc
* Generated by LTspice 26.0.1 for Windows.
* 100KHz Low Distortion Bandpass Filter
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1468.asy)
R3 0 N001 121
R1 OUT N002 22.1K
C2 OUT N001 1000p
V1 +V 0 15
V3 IN 0 AC 1
V2 -V 0 -15
R2 N001 IN 11K
C1 N002 N001 1000p
XU1 0 N002 +V -V OUT LT1468 ;pnba In+)In-)V+)V-)OUT
.ac oct 100 10K 1Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -224 16 -224 0
WIRE -96 16 -96 0
WIRE 80 32 0 32
WIRE 304 32 144 32
WIRE 192 96 176 96
WIRE 304 96 304 32
WIRE 304 96 272 96
WIRE -224 112 -224 96
WIRE -96 112 -96 96
WIRE 240 208 240 192
WIRE -144 224 -208 224
WIRE 0 224 0 32
WIRE 0 224 -64 224
WIRE 80 224 0 224
WIRE 176 224 176 96
WIRE 176 224 144 224
WIRE 208 224 176 224
WIRE -208 240 -208 224
WIRE 0 240 0 224
WIRE 304 240 304 96
WIRE 304 240 272 240
WIRE 352 240 304 240
WIRE 208 256 176 256
WIRE 240 288 240 272
WIRE -208 336 -208 320
WIRE 0 336 0 320
SYMBOL res -16 336 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 121
SYMBOL res 288 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 22.1K
SYMBOL cap 144 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1000p
SYMBOL cap 144 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000p
SYMBOL res -48 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 11K
SYMBOL voltage -96 0 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT1468 240 176 R0
SYMATTR InstName U1
SYMBOL voltage -208 224 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL voltage -224 0 R0
SYMATTR InstName V2
SYMATTR Value -15
FLAG -96 112 0
FLAG 240 192 +V
FLAG -96 0 +V
FLAG 240 288 -V
FLAG -224 112 0
FLAG -224 0 -V
FLAG -208 336 0
FLAG 176 256 0
FLAG 0 336 0
FLAG 352 240 OUT
FLAG -208 224 IN
TEXT 96 352 Left 2 !.ac oct 100 10K 1Meg
TEXT 80 -56 Bottom 2 ;100KHz Low Distortion Bandpass Filter
* Z:\tmp\asc_dec_bjh7r6w2\051a8011225e_EDM_Powersupply_V4c_noGD_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
XM1 drain Vg source IPW65R070C6_L0 ;pnba D)G)S
L1 N002 drain 6.4
V1 Vg 0 PULSE(0 15 0 2000n 2000n 2u 20u)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1876 680
WIRE 624 -32 544 -32
WIRE 976 -32 624 -32
WIRE 544 0 544 -32
WIRE 624 16 624 -32
WIRE 624 128 624 96
WIRE 544 240 544 176
WIRE 624 240 624 208
WIRE 624 240 544 240
WIRE 624 256 624 240
WIRE 672 256 624 256
WIRE 688 256 672 256
WIRE 800 256 784 256
WIRE 976 256 800 256
WIRE 352 336 304 336
WIRE 560 336 432 336
WIRE 768 336 768 304
WIRE 768 336 560 336
SYMBOL nmos 688 304 R270
SYMATTR InstName M1
SYMATTR Value IPW65R070C6_L0
SYMATTR Prefix X
SYMBOL ind 608 112 R0
SYMATTR InstName L1
SYMATTR Value 6.4u
SYMBOL voltage 448 336 R90
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -51 153 VLeft 2
SYMATTR Value PULSE(0 15 0 2000n 2000n 2u 20u)
SYMATTR InstName V1
FLAG 304 336 0
FLAG 560 336 Vg
FLAG 672 256 drain
FLAG 800 256 source
* Z:\home\khalils\Downloads\files\data\raw_asc\09ce5669062e_1398.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 -V 0 -5
R1 OUT N001 324
R2 N001 0 200
V3 IN 0 SINE(0 1 10K)
XU1 IN N001 +V -V OUT _SHDN LT1398 ;pnba In+)In-)V+)V-)OUT)SHDN
V4 _SHDN 0 PULSE(0 5 0 1u 1u .5m 1m)
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1398.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 48 64 32 64
WIRE 144 64 128 64
WIRE 224 64 144 64
WIRE 352 64 304 64
WIRE -208 112 -208 96
WIRE -80 112 -80 96
WIRE 208 128 208 112
WIRE 144 176 144 64
WIRE 176 176 144 176
WIRE 352 208 352 64
WIRE 352 208 320 208
WIRE 416 208 352 208
WIRE -208 224 -208 192
WIRE -80 224 -80 192
WIRE 176 240 16 240
WIRE 16 256 16 240
WIRE 208 304 208 288
WIRE 256 336 256 288
WIRE 400 336 256 336
WIRE 16 352 16 336
WIRE 400 352 400 336
WIRE 400 448 400 432
FLAG -80 224 0
FLAG 208 112 +V
FLAG -80 96 +V
FLAG 208 304 -V
FLAG -208 224 0
FLAG -208 96 -V
FLAG 32 64 0
FLAG 16 352 0
FLAG 400 448 0
FLAG 16 240 IN
FLAG 416 208 OUT
FLAG 400 336 _SHDN
SYMBOL voltage -80 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -208 96 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 320 48 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 324
SYMBOL res 144 48 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL voltage 16 240 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 10K)
SYMBOL opamps\\LT1398 208 208 R0
SYMATTR InstName U1
SYMBOL voltage 400 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 5 0 1u 1u .5m 1m)
TEXT 166 402 Left 0 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\030d15d29b17_lab5_task2.asc
* Generated by LTspice 26.0.1 for Windows.
M1 P001 N003 N001 N001 BSS84
Vi1 N002 0 PULSE(5 0 0 50n 50n 500u 1m)
Rb1 N003 N002 4.7k
Rc1 P001 0 1k
Vcc1 N001 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 5m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1040 680
WIRE 416 -144 416 -176
WIRE 416 64 416 -64
WIRE 32 80 -16 80
WIRE 240 80 112 80
WIRE 368 80 320 80
WIRE 416 272 416 240
SYMBOL res 400 144 R0
SYMATTR InstName Rc1
SYMATTR Value 1k
SYMBOL res 336 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rb1
SYMATTR Value 4.7k
SYMBOL voltage 416 -48 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 24 68 Left 2
SYMATTR InstName Vcc1
SYMATTR Value 5
SYMBOL pmos 368 160 M180
SYMATTR InstName M1
SYMATTR Value BSS84
SYMBOL voltage 128 80 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vi1
SYMATTR Value PULSE(5 0 0 50n 50n 500u 1m)
FLAG 416 272 0
FLAG -16 80 0
FLAG 416 -176 0
TEXT -72 376 Left 2 !.tran 0 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\1fc5ecb5334d_External_Library_Example.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 Vn V+ V- Vo UA741 ;pnba In+)In-)V+)V-)OUT
V1 V+ 0 15
V2 V- 0 -15
R1 Vo Vn 2k
R2 Vn Vin 1k
V3 Vin 0 SINE(0 1 1k)
* Simulation
.inc UA741.lib
*.op
.tran 0 5m 0 100u
* Spice Directives
* Power Supplies
* Libraries
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1432 696
WIRE 384 176 336 176
WIRE 496 176 464 176
WIRE 400 288 400 272
WIRE 224 304 160 304
WIRE 336 304 336 176
WIRE 336 304 304 304
WIRE 368 304 336 304
WIRE 496 320 496 176
WIRE 496 320 432 320
WIRE 528 320 496 320
WIRE 160 336 160 304
WIRE 368 336 336 336
WIRE 400 368 400 352
WIRE 688 368 688 336
WIRE 784 368 784 336
WIRE 336 384 336 336
WIRE 160 448 160 416
WIRE 688 480 688 448
WIRE 784 480 784 448
FLAG 784 480 0
FLAG 688 480 0
FLAG 688 336 V+
FLAG 784 336 V-
FLAG 400 272 V+
FLAG 400 368 V-
FLAG 528 320 Vo
FLAG 336 384 0
FLAG 160 448 0
FLAG 160 304 Vin
FLAG 336 304 Vn
SYMBOL OpAmps\\opamp2 400 256 R0
SYMATTR InstName U1
SYMATTR Value UA741
SYMBOL voltage 688 352 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 784 352 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 480 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2k
SYMBOL res 320 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 160 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1k)
TEXT 640 16 Left 2 ;Simulation
TEXT 368 88 Left 2 !.inc UA741.lib
TEXT 648 56 Left 2 !*.op\n.tran 0 5m 0 100u
TEXT 640 144 Left 2 ;Spice Directives
TEXT 640 272 Left 2 ;Power Supplies
TEXT 352 48 Left 2 ;Libraries
RECTANGLE Normal 1024 240 640 160 2
RECTANGLE Normal 880 528 640 288 2
RECTANGLE Normal 576 112 352 64 2
RECTANGLE Normal 880 112 640 32 2
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1584.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 22
Rload OUT 0 500
XU1 N001 OUT IN LT1584 ;pnba ADJ)OUT)IN
R1 OUT N001 500
R2 N001 0 500
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1584.asy)
.lib LT1584.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 176 -176 176
WIRE 352 176 288 176
WIRE 448 176 352 176
WIRE 544 176 448 176
WIRE -176 192 -176 176
WIRE 352 192 352 176
WIRE 448 192 448 176
WIRE 544 192 544 176
WIRE -176 288 -176 272
WIRE 448 288 448 256
WIRE 544 288 544 272
WIRE 160 304 160 272
WIRE 352 304 352 272
WIRE 352 304 160 304
WIRE 352 320 352 304
WIRE 352 416 352 400
FLAG -176 288 0
FLAG 352 416 0
FLAG 448 288 0
FLAG 544 288 0
FLAG -176 176 IN
FLAG 544 176 OUT
SYMBOL voltage -176 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 432 192 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 528 176 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT1584 160 176 R0
SYMATTR InstName U1
SYMBOL res 336 176 R0
SYMATTR InstName R1
SYMATTR Value 500
SYMBOL res 336 304 R0
SYMATTR InstName R2
SYMATTR Value 500
TEXT 456 376 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG836.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nCharge Injection not included\nOnly One channel included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG836.asy)
C1 N002 0 36p
V4 +V 0 3.3
V3 N004 0 PULSE(0 3 0 20n 20n 10u 20u)
R1 N002 0 49.9
V2 N003 0 0
V1 N001 0 3
XU1 N004 N001 N002 N003 +V 0 ADG836 ;pnba IN)SA)D)SB)Vdd)GND
.tran 100u
.lib ADG836.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1696 -272 -2032 -272
WIRE -2032 -256 -2032 -272
WIRE -1424 -240 -1504 -240
WIRE -1312 -240 -1424 -240
WIRE -1424 -224 -1424 -240
WIRE -1312 -224 -1312 -240
WIRE -1696 -208 -1920 -208
WIRE -1920 -192 -1920 -208
WIRE -2032 -160 -2032 -176
WIRE -1696 -144 -1776 -144
WIRE -1424 -128 -1424 -144
WIRE -1312 -128 -1312 -160
WIRE -1920 -96 -1920 -112
WIRE -1776 -80 -1776 -144
WIRE -1600 -16 -1600 -32
WIRE -1776 32 -1776 0
SYMBOL voltage -1920 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL res -1440 -240 R0
SYMATTR InstName R1
SYMATTR Value 49.9
SYMBOL ADG836 -1600 -192 R0
SYMATTR InstName U1
SYMBOL voltage -1776 -96 R0
WINDOW 3 24 136 Left 2
SYMATTR Value PULSE(0 3 0 20n 20n 10u 20u)
SYMATTR InstName V3
SYMBOL voltage -2032 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL voltage -2032 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 3.3
SYMBOL cap -1328 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
FLAG -2032 -160 0
FLAG -1920 -96 0
FLAG -1776 32 0
FLAG -1600 -368 +V
FLAG -1424 -128 0
FLAG -1600 -16 0
FLAG -1312 -128 0
FLAG -2032 16 0
FLAG -2032 -64 +V
TEXT -1960 -24 Left 2 !.tran 100u
TEXT -2080 -472 Left 2 ;Note:\nCharge Injection not included\nOnly One channel included\nSwitch shown for a logic 0 input