Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2503-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2503-5.0.asy)
XU1 N001 N002 OUT IN IN 0 OUT NC_01 ADP2503-5.0 ;pnba SW1)SW2)FB)EN)PVin)GND)Vout)Sync
V1 IN 0 3.3
Rload OUT 0 50
L1 N001 N002 1.5 Rser=80m
C1 OUT 0 10
.tran 400u startup
.lib ADP2503-5.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 48 64 32 64
WIRE 336 64 304 64
WIRE -64 80 -64 64
WIRE 32 144 32 64
WIRE 48 144 32 144
WIRE 336 144 304 144
WIRE -64 176 -64 160
WIRE 320 224 304 224
WIRE 368 224 320 224
WIRE 480 224 368 224
WIRE 368 240 368 224
WIRE 480 240 480 224
WIRE 48 304 32 304
WIRE 320 304 320 224
WIRE 320 304 304 304
WIRE 368 336 368 304
WIRE 480 336 480 320
SYMBOL ADP2503-5.0 176 176 R0
SYMATTR InstName U1
SYMBOL res 464 224 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL voltage -64 64 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap 352 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ind 320 48 R0
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=80m
FLAG 368 336 0
FLAG 32 304 0
FLAG -64 176 0
FLAG 480 336 0
FLAG -64 64 IN
FLAG 480 224 OUT
TEXT 384 384 Left 2 !.tran 400u startup
TEXT 184 0 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\78987b9b5bfc_transient_ideal.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
V2 N001 0 1.8
XU1 N002 Vc N001 0 Vc level2 Avol=1500 GBW=40Meg Slew=10Meg Ilimit=35m Rail=0.2 Vos=200m En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R1 N002 N003 10k
C1 Vc 0 2.3p
V1 N003 0 1.25
.tran 70n
.ic V(n002)=1
.ic V(vc)=1
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1008 680
WIRE 160 -48 -80 -48
WIRE 272 64 80 64
WIRE -80 112 -80 -48
WIRE 160 128 160 -48
WIRE 80 144 80 64
WIRE 128 144 80 144
WIRE 272 160 272 64
WIRE 272 160 192 160
WIRE 448 160 272 160
WIRE 128 176 80 176
WIRE 80 208 80 176
WIRE 160 208 160 192
WIRE 448 208 448 160
WIRE -80 224 -80 192
WIRE 448 304 448 272
WIRE 80 320 80 288
WIRE 80 432 80 400
SYMBOL res 64 192 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 80 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.25
SYMBOL OpAmps\\UniversalOpAmp2 160 160 R0
SYMATTR InstName U1
SYMATTR Value2 Avol=1500 GBW=40Meg Slew=10Meg
SYMATTR SpiceLine Ilimit=35m Rail=0.2 Vos=200m
SYMBOL voltage -80 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.8
SYMBOL cap 432 208 R0
SYMATTR InstName C1
SYMATTR Value 2.3p
FLAG 80 432 0
FLAG 160 208 0
FLAG -80 224 0
FLAG 448 304 0
FLAG 448 160 Vc
TEXT -112 456 Left 2 !.tran 70n
TEXT 360 104 Left 2 !.ic V(n002)=1
TEXT 368 64 Left 2 !.ic V(vc)=1
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5689R.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5689R.asy)
Vdac1 NC_01 0 1.25
CLOAD vOUT 0 10n
XU1 vDAC Vdd 0 vOUT AD5689R Gain=2 ;pnba Vdac)Vdd)GND)Vout
V1 Vdd 0 5
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
I1 0 0 100 AC 1
.tran 200u
.lib AD5689R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 272 112 192 112
WIRE 464 112 272 112
WIRE -800 144 -800 112
WIRE 272 160 272 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL AD5689R -208 112 R0
SYMATTR InstName U1
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 100
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC7004.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC7004.asy)
L1 N005 OUT 10 Rser=3m
V2 N003 0 PULSE(0 8 0 10n 10n 0.3u 3.33u)
XU1 IN 0 0 N003 0 N004 N004 N005 N001 LTC7004 ;pnba Vcc)Vccuv)GND)INP)OVLO)TGdn)TGup)TS)BST
V3 N002 0 36
R1 OUT 0 10
D1 IN N001 RF071MM2S
C2 N001 N005 .1
D2 0 N005 RF1001NS2D
C1 OUT 0 10 Rser=7m
V1 IN 0 10
M1 N002 N004 N005 N005 IPB039N10N3
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran .5m startup
.lib LTC7004.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2336 1256
WIRE 992 -272 832 -272
WIRE 1120 -272 992 -272
WIRE 1328 -272 1184 -272
WIRE 1392 -272 1328 -272
WIRE 1520 -272 1520 -304
WIRE 832 -256 832 -272
WIRE 1392 -224 1392 -272
WIRE 992 -176 992 -272
WIRE 1008 -176 992 -176
WIRE 1328 -176 1328 -272
WIRE 1328 -176 1296 -176
WIRE 1520 -176 1520 -192
WIRE 832 -160 832 -176
WIRE 1008 -96 816 -96
WIRE 1328 -96 1296 -96
WIRE 1472 -96 1328 -96
WIRE 1392 -32 1392 -160
WIRE 1520 -32 1520 -80
WIRE 1520 -32 1392 -32
WIRE 1616 -32 1520 -32
WIRE 1760 -32 1696 -32
WIRE 1904 -32 1760 -32
WIRE 1008 -16 976 -16
WIRE 1328 -16 1328 -96
WIRE 1328 -16 1296 -16
WIRE 1520 -16 1520 -32
WIRE 1760 -16 1760 -32
WIRE 1904 -16 1904 -32
WIRE 976 64 976 -16
WIRE 976 64 944 64
WIRE 1008 64 976 64
WIRE 1392 64 1392 -32
WIRE 1392 64 1296 64
WIRE 1520 80 1520 48
WIRE 1760 80 1760 48
WIRE 1904 80 1904 64
WIRE 816 96 816 -96
WIRE 1152 144 1152 112
WIRE 816 192 816 176
SYMBOL ind 1600 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=3m
SYMBOL diode 1504 48 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value RF1001NS2D
SYMBOL res 1888 -32 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL nmos 1472 -176 R0
SYMATTR InstName M1
SYMATTR Value IPB039N10N3
SYMBOL voltage 816 80 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 8 0 10n 10n 0.3u 3.33u)
SYMBOL voltage 832 -272 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL cap 1744 -16 R0
SYMATTR Value 10
SYMATTR SpiceLine Rser=7m
SYMATTR InstName C1
SYMBOL voltage 1520 -176 M180
WINDOW 0 26 88 Left 2
WINDOW 3 28 26 Left 2
SYMATTR InstName V3
SYMATTR Value 36
SYMBOL LTC7004 1152 -48 R0
SYMATTR InstName U1
SYMBOL cap 1376 -224 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL diode 1120 -256 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value RF071MM2S
FLAG 944 64 0
FLAG 832 -160 0
FLAG 816 192 0
FLAG 1520 -304 0
FLAG 1760 80 0
FLAG 1904 80 0
FLAG 1904 -32 OUT
FLAG 1520 80 0
FLAG 1152 144 0
FLAG 832 -272 IN
TEXT 1392 208 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\OP37.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
Vin IN 0 SINE(0 1 10K)
R1 N001 0 1K
R2 OUT N001 10K
XU1 IN N001 +V -V OUT OP37 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -15
Rload OUT 0 10K
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP37.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1168 144 -1184
WIRE 256 -1168 256 -1184
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 144 -1072 144 -1088
WIRE 256 -1072 256 -1088
WIRE 432 -1072 432 -1088
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
FLAG 144 -1184 +V
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1184 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 256 -1072 0
FLAG 144 -1072 0
SYMBOL voltage 144 -1184 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Opamps\\OP37 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 256 -1184 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\342b9367a938_1101.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
V3 IN 0 SINE(0 .1 1K)
XU1 0 N001 IN -V +V 0 N002 OUT LT1101 ;pnba GND)Tap1)In-)V-)V+)In+)Tap2)Out
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1101.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 80 64 64 64
WIRE 352 64 336 64
WIRE -368 96 -368 80
WIRE -240 96 -240 80
WIRE 80 128 64 128
WIRE 352 128 336 128
WIRE -368 192 -368 176
WIRE -240 192 -240 176
WIRE 80 192 -112 192
WIRE 352 192 336 192
WIRE -112 208 -112 192
WIRE 80 256 64 256
WIRE 368 256 336 256
WIRE -112 304 -112 288
FLAG -240 192 0
FLAG -240 80 +V
FLAG 64 256 -V
FLAG -368 192 0
FLAG -368 80 -V
FLAG -112 304 0
FLAG 368 256 +V
FLAG 64 64 0
FLAG 352 192 0
FLAG 352 64 OUT
FLAG -112 192 IN
SYMBOL voltage -240 80 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -368 80 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -112 192 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 .1 1K)
SYMBOL opamps\\LT1101 208 160 R0
SYMATTR InstName U1
TEXT 328 328 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1178.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1178.asy)
V1 +V 0 5
V3 N003 0 SINE(1.25 .1 1K)
XU1 N003 N001 +V 0 N002 LT1178 ;pnba In+)In-)V+)V-)OUT
R1 N002 N001 5K
R2 N001 0 5K
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -192 176 -192 160
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 160 256 0 256
WIRE -192 272 -192 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL opamps\\LT1178 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -192 160 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(1.25 .1 1K)
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
FLAG -192 272 0
FLAG 192 192 +V
FLAG -192 160 +V
FLAG 16 96 0
FLAG 0 368 0
FLAG 192 288 0
TEXT 248 320 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1693-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1693-2.asy)
V1 N001 0 5
V2 N002 0 PULSE(0 5 0 1n 1n 5u 10u)
XU1 N002 0 N002 0 N004 N001 N003 N001 LTC1693-2 ;pnba IN1)GND1)IN2)GND2)_OUT2)Vcc2)OUT1)Vcc1
.tran 100u
.lib LTC1693-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2388 1428
WIRE 1632 1008 1504 1008
WIRE 1856 1008 1632 1008
WIRE 1856 1024 1856 1008
WIRE 1504 1040 1504 1008
WIRE 1632 1040 1632 1008
WIRE 1440 1120 1104 1120
WIRE 1712 1120 1696 1120
WIRE 1856 1120 1856 1104
WIRE 1104 1216 1104 1120
WIRE 1440 1216 1104 1216
WIRE 1712 1216 1696 1216
WIRE 1104 1232 1104 1216
WIRE 1504 1312 1504 1296
WIRE 1632 1312 1632 1296
WIRE 1104 1328 1104 1312
SYMBOL PowerProducts\\LTC1693-2 1568 1168 R0
SYMATTR InstName U1
SYMBOL voltage 1104 1216 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1n 1n 5u 10u)
SYMBOL voltage 1856 1008 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 1856 1120 0
FLAG 1632 1312 0
FLAG 1504 1312 0
FLAG 1104 1328 0
TEXT 1616 1400 Left 2 !.tran 100u
* Z:\tmp\asc_dec_bjh7r6w2\17b6a739896a_negative_gm_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vdd N002 1k
Vdd Vdd 0 9
Vbias1 N005 0 0
XM2 N002 N004 N006 2n7000 ;pnba D)G)S
R3 N006 N008 {r}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1940 1232
WIRE 400 -176 400 -208
WIRE 496 -176 496 -208
WIRE 400 -64 400 -96
WIRE 496 -64 496 -96
WIRE 704 224 704 144
WIRE 1392 352 928 352
WIRE 704 416 704 304
WIRE 928 416 928 352
WIRE 528 496 256 496
WIRE 656 496 608 496
WIRE 1088 496 976 496
WIRE 1184 496 1168 496
WIRE 704 560 704 512
WIRE 1184 560 1184 496
WIRE 928 576 928 512
WIRE 528 624 528 592
WIRE 704 704 704 640
WIRE 928 704 928 656
WIRE 928 704 704 704
WIRE 528 736 528 704
WIRE 592 736 528 736
WIRE 528 752 528 736
WIRE 704 752 704 704
WIRE 592 832 592 736
SYMBOL res 688 208 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 400 -192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vdd
SYMATTR Value 9
SYMBOL battery 1072 496 M90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Vbias1
SYMATTR Value 0
SYMBOL nmos 656 416 R0
SYMATTR InstName M2
SYMATTR Value 2n7000
SYMATTR Prefix X
SYMBOL res 688 544 R0
SYMATTR InstName R3
SYMATTR Value {r}
FLAG 400 -64 0
FLAG 400 -208 Vdd
FLAG 496 -64 0
FLAG 496 -208 Vss
FLAG 528 592 Vdd
FLAG 704 144 Vdd
FLAG 1184 560 0
* Z:\home\khalils\Downloads\files\data\raw_asc\1e9c7087c5e6_1843.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
V2 N002 0 PULSE(0 3.3 0 .5m .5m 0 1m)
R1 N001 N003 10K
R2 N001 N004 10K
XU1 N004 0 N002 N002 N006 N005 N001 N003 LTC1843 ;pnba OUTA)GND)INA+)INB-)Hyst)Ref)Vcc)OUTB
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1843.asy)
.lib LTC1843.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1264 800
WIRE 928 64 736 64
WIRE 1040 64 928 64
WIRE 1136 64 1040 64
WIRE 736 80 736 64
WIRE 1040 80 1040 64
WIRE 1136 80 1136 64
WIRE 928 112 928 64
WIRE 848 160 816 160
WIRE 736 176 736 160
WIRE 1040 176 1040 160
WIRE 1040 176 1008 176
WIRE 560 240 528 240
WIRE 816 240 816 160
WIRE 816 240 640 240
WIRE 848 240 816 240
WIRE 1136 256 1136 160
WIRE 1136 256 1008 256
WIRE 848 304 832 304
WIRE 976 400 976 384
WIRE 880 416 880 384
FLAG 736 176 0
FLAG 528 240 0
FLAG 880 416 0
SYMBOL voltage 736 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 656 240 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0 .5m .5m 0 1m)
SYMATTR InstName V2
SYMBOL res 1024 64 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 1120 64 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Comparators\\LTC1843 928 240 R0
SYMATTR InstName U1
TEXT 1120 344 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1086.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1086.asy)
C1 OUT 0 10
R2 N001 0 365
XU1 N001 OUT IN LT1086 ;pnba ADJ)OUT)IN
Rload OUT 0 10
R1 OUT N001 121
V1 IN 0 PWL(0 0 1 10) Rser=0.1
.tran 1
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1344 896
WIRE 1856 896 1808 896
WIRE 1952 896 1856 896
WIRE 2064 896 1952 896
WIRE 1344 912 1344 896
WIRE 1856 912 1856 896
WIRE 1952 912 1952 896
WIRE 2064 912 2064 896
WIRE 1344 1008 1344 992
WIRE 1952 1008 1952 976
WIRE 2064 1008 2064 992
WIRE 1680 1024 1680 992
WIRE 1856 1024 1856 992
WIRE 1856 1024 1680 1024
WIRE 1856 1040 1856 1024
WIRE 1856 1136 1856 1120
SYMBOL RES 1840 1024 R0
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL RES 1840 896 R0
SYMATTR InstName R1
SYMATTR Value 121
SYMBOL cap 1936 912 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL VOLTAGE 1344 896 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMATTR SpiceLine Rser=0.1
SYMBOL PowerProducts\\LT1086 1680 896 R0
SYMATTR InstName U1
SYMBOL RES 2048 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
FLAG 2064 896 OUT
FLAG 1856 1136 0
FLAG 2064 1008 0
FLAG 1344 1008 0
FLAG 1952 1008 0
FLAG 1344 896 IN
TEXT 1960 1096 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\stepmodelparam.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
Q1 N001 N002 0 0 2N2222
I1 0 N002 0
V1 N001 0 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 10 10m I1 10u 50u 10u
.step NPN 2N2222(Vaf) 100 50 25
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2252 1608
WIRE 1872 1232 1728 1232
WIRE 1728 1248 1728 1232
WIRE 1872 1248 1872 1232
WIRE 1664 1296 1520 1296
WIRE 1520 1312 1520 1296
WIRE 1872 1344 1872 1328
WIRE 1728 1360 1728 1344
WIRE 1520 1408 1520 1392
SYMBOL voltage 1872 1232 R0
WINDOW 39 0 0 Left 2
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL current 1520 1392 M180
WINDOW 0 23 76 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName I1
SYMATTR Value 0
SYMBOL npn 1664 1248 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
FLAG 1520 1408 0
FLAG 1728 1360 0
FLAG 1872 1344 0
TEXT 1560 1448 Left 2 !.dc V1 0 10 10m I1 10u 50u 10u
TEXT 1552 1480 Left 2 !.step NPN 2N2222(Vaf) 100 50 25
TEXT 1736 1512 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\018208bd0941_TRR-2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 a 0 PULSE(50 -50 1u 5n 5n 9u 20u) Rser=10
D1 a b RB060M-60
R1 b 0 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 6u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -176 128 -208 128
WIRE -112 128 -176 128
WIRE 16 128 -48 128
WIRE 32 128 16 128
WIRE -208 176 -208 128
WIRE 32 176 32 128
WIRE -208 304 -208 256
WIRE -80 304 -208 304
WIRE 32 304 32 256
WIRE 32 304 -80 304
WIRE -80 320 -80 304
SYMBOL voltage -208 160 R0
WINDOW 3 10 105 Invisible 2
WINDOW 123 0 0 Left 2
SYMATTR Value PULSE(50 -50 1u 5n 5n 9u 20u)
SYMATTR SpiceLine Rser=10
SYMATTR InstName V1
SYMBOL Misc\\EuropeanResistor 16 160 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL schottky -112 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value RB060M-60
SYMATTR Description Diode
SYMATTR Type diode
FLAG -80 320 0
FLAG -176 128 a
FLAG 16 128 b
TEXT -208 320 Left 2 !.tran 6u
* Z:\home\khalils\Downloads\files\data\raw_asc\646d8726cf64_Diode-trr-2.asc
* Generated by LTspice 26.0.1 for Windows.
D1 a b RB085BGE-30
R1 b 0 5
V1 a 0 PULSE(-10V 10V 20n 1n 1n 20n 200n)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100n
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -192 80 -208 80
WIRE -80 80 -192 80
WIRE 80 80 -16 80
WIRE 96 80 80 80
WIRE -208 144 -208 80
WIRE 96 144 96 80
WIRE -208 272 -208 224
WIRE -32 272 -208 272
WIRE 96 272 96 224
WIRE 96 272 -32 272
WIRE -32 304 -32 272
SYMBOL schottky -80 96 R270
WINDOW 0 41 32 VTop 2
WINDOW 3 -7 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value RB085BGE-30
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL Voltage -208 128 R0
WINDOW 3 -77 116 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(-10V 10V 20n 1n 1n 20n 200n)
SYMATTR InstName V1
SYMBOL Misc\\EuropeanResistor 80 128 R0
WINDOW 0 44 39 Left 2
WINDOW 3 47 76 Left 2
SYMATTR InstName R1
SYMATTR Value 5
FLAG -32 304 0
FLAG 80 80 b
FLAG -192 80 a
TEXT -208 288 Left 2 !.tran 100n
* Z:\home\khalils\Downloads\files\data\raw_asc\3de0290713c4_andgate.asc
* Generated by LTspice 26.0.1 for Windows.
* output
V2 N004 0 PULSE(5 0 5 0.01m 0.01m 1m 2m)
M5 N002 N007 N009 N006 PMOS
M2 N012 N008 0 N013 NMOS
M3 N001 N004 N007 N003 PMOS
V3 N001 0 5
M1 N007 N004 N012 N010 NMOS
V4 N002 0 5
M4 N001 N008 N007 N005 PMOS
M6 N009 N007 0 N011 NMOS
V1 N008 0 PULSE(0 5 0 0.01m 0.01m 1m 2m)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 -208 176 -208
WIRE 176 -176 176 -208
WIRE 256 -176 256 -208
WIRE 832 -128 736 -128
WIRE 832 -80 832 -128
WIRE 176 -64 176 -96
WIRE 176 -64 96 -64
WIRE 288 -64 176 -64
WIRE 96 -48 96 -64
WIRE 288 -16 288 -64
WIRE 736 -16 736 -48
WIRE 96 0 96 -32
WIRE 32 32 -64 32
WIRE 48 32 32 32
WIRE 288 32 288 0
WIRE 736 32 736 0
WIRE 688 64 624 64
WIRE 16 80 -176 80
WIRE 240 80 240 64
WIRE 240 80 16 80
WIRE 96 112 96 48
WIRE 224 112 96 112
WIRE 288 112 288 80
WIRE 288 112 224 112
WIRE 224 128 224 112
WIRE 624 128 624 64
WIRE 624 128 224 128
WIRE 736 128 736 80
WIRE 784 128 736 128
WIRE 224 144 224 128
WIRE -176 160 -176 80
WIRE -64 160 -64 32
WIRE 736 160 736 128
WIRE 224 192 224 160
WIRE 736 208 736 176
WIRE 32 224 32 32
WIRE 176 224 32 224
WIRE 624 240 624 128
WIRE 688 240 624 240
WIRE -176 256 -176 240
WIRE -128 256 -176 256
WIRE -64 256 -64 240
WIRE -64 256 -128 256
WIRE 224 256 224 240
WIRE -128 272 -128 256
WIRE 224 304 224 272
WIRE 16 336 16 80
WIRE 176 336 16 336
WIRE 736 336 736 256
WIRE 224 384 224 352
SYMBOL pmos4 688 -16 R0
SYMATTR InstName M5
SYMBOL pmos4 240 -16 R0
SYMATTR InstName M4
SYMBOL pmos4 48 -48 R0
SYMATTR InstName M3
SYMBOL voltage 736 -32 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL nmos4 176 144 R0
SYMATTR InstName M1
SYMBOL nmos4 688 160 R0
SYMATTR InstName M6
SYMBOL voltage -176 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 0.01m 0.01m 1m 2m)
SYMBOL voltage 176 -80 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL nmos4 176 256 R0
SYMATTR InstName M2
SYMBOL voltage -64 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(5 0 5 0.01m 0.01m 1m 2m)
FLAG -128 272 0
FLAG 224 384 0
FLAG 256 -176 0
FLAG 736 336 0
FLAG 832 -80 0
TEXT -208 408 Left 2 !.tran 10m
TEXT 784 128 Left 2 ;output