Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1336.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N001 N003 N007 N009 N006 0 0 N008 N008 N003 0 N005 N005 N004 0 N002 LT1336 ;pnba Isense)SV+)InTop)InBottom)_UVOUT)SGND)PGND)BgateFB)BgateDR)PV+)Tsource)TgateFB)TgateDR)Boost)SWGND)Switch
L1 N001 N002 200
R1 N001 N003 2
D1 N002 N004 1N4148
C1 0 N004 10
C2 N005 0 10000p
C3 N008 0 10000p
R2 N003 N006 10K
V1 N003 0 10
V2 N007 0 PULSE(0 3 0 0 0 5u 10u)
V3 N009 0 PULSE(0 3 2.5u 0 0 5u 10u)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1336.asy)
.lib LT1336.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2404 1860
WIRE 1696 1072 1472 1072
WIRE 1744 1072 1696 1072
WIRE 1888 1072 1824 1072
WIRE 2064 1072 1888 1072
WIRE 1472 1088 1472 1072
WIRE 2064 1088 2064 1072
WIRE 1696 1168 1696 1072
WIRE 1888 1168 1888 1072
WIRE 1472 1232 1472 1168
WIRE 1472 1232 1328 1232
WIRE 1568 1232 1472 1232
WIRE 2064 1232 2064 1152
WIRE 2064 1232 2016 1232
WIRE 2080 1232 2064 1232
WIRE 2160 1232 2144 1232
WIRE 1328 1248 1328 1232
WIRE 1472 1296 1472 1232
WIRE 1568 1296 1472 1296
WIRE 2224 1296 2016 1296
WIRE 1472 1312 1472 1296
WIRE 2224 1328 2224 1296
WIRE 2304 1328 2224 1328
WIRE 1328 1344 1328 1328
WIRE 2304 1344 2304 1328
WIRE 2224 1360 2224 1328
WIRE 2224 1360 2016 1360
WIRE 1472 1424 1472 1392
WIRE 1568 1424 1472 1424
WIRE 2160 1424 2160 1232
WIRE 2160 1424 2016 1424
WIRE 2304 1424 2304 1408
WIRE 2304 1424 2160 1424
WIRE 2160 1440 2160 1424
WIRE 1568 1488 1376 1488
WIRE 2064 1488 2016 1488
WIRE 2064 1520 2064 1488
WIRE 2144 1520 2064 1520
WIRE 1568 1552 1504 1552
WIRE 2064 1552 2064 1520
WIRE 2064 1552 2016 1552
WIRE 2144 1568 2144 1520
WIRE 1504 1632 1504 1552
WIRE 1648 1632 1648 1616
WIRE 1792 1632 1792 1616
WIRE 1936 1632 1936 1616
WIRE 2144 1664 2144 1632
WIRE 1376 1712 1376 1488
WIRE 1504 1744 1504 1712
WIRE 1376 1808 1376 1792
FLAG 1648 1632 0
FLAG 1792 1632 0
FLAG 1936 1632 0
FLAG 2144 1664 0
FLAG 1328 1344 0
FLAG 1376 1808 0
FLAG 1504 1744 0
FLAG 2160 1440 0
SYMBOL POWERPRODUCTS\\LT1336 1792 1392 R0
SYMATTR InstName U1
SYMBOL ind 1728 1088 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 200
SYMBOL RES 1456 1072 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL diode 2048 1088 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL cap 2144 1216 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL cap 2288 1344 R0
SYMATTR InstName C2
SYMATTR Value 10000p
SYMBOL cap 2128 1568 R0
SYMATTR InstName C3
SYMATTR Value 10000p
SYMBOL res 1456 1296 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL VOLTAGE 1328 1232 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL voltage 1376 1696 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3 0 0 0 5u 10u)
SYMBOL voltage 1504 1616 R0
SYMATTR InstName V3
SYMATTR Value PULSE(0 3 2.5u 0 0 5u 10u)
TEXT 1968 1784 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\2b723713759f_ADGS2414D.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input\nQinj not included\nSPI functionality is not modelled\nOny one channel is modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADGS2414D.asy)
V4 v- 0 -15
XU1 vIN vD vS v- 0 v+ ADGS2414D ;pnba IN)D)S)Vss)GND)Vdd
V2 vIN 0 PULSE(0 2.5 20n 20n 20n 150m 300m)
C1 vD 0 36p
R1 vD 0 301
V3 v+ 0 15
V1 vS 0 SINE(0 10 20)
.tran 1
.lib ADGS2414D.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 832
WIRE 240 160 240 128
WIRE -80 224 -112 224
WIRE 112 224 0 224
WIRE 144 224 112 224
WIRE 384 224 336 224
WIRE 464 224 384 224
WIRE 576 224 464 224
WIRE 464 256 464 224
WIRE 576 256 576 224
WIRE 112 288 48 288
WIRE 144 288 112 288
WIRE -288 336 -288 304
WIRE -192 336 -192 304
WIRE 48 336 48 288
WIRE 464 352 464 336
WIRE 576 352 576 320
WIRE 288 416 288 400
WIRE 192 432 192 400
WIRE -288 464 -288 416
WIRE -192 464 -192 416
WIRE 48 464 48 416
SYMBOL ADGS2414D 240 272 R0
SYMATTR InstName U1
SYMBOL cap 560 256 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage 48 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 30 177 Left 2
SYMATTR Value PULSE(0 2.5 20n 20n 20n 150m 300m)
SYMATTR InstName V2
SYMBOL voltage -288 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL voltage 16 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 20)
SYMBOL res 448 240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage -192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -15
FLAG -112 224 0
FLAG 48 464 0
FLAG 464 352 0
FLAG 288 416 0
FLAG 384 224 vD
FLAG 112 224 vS
FLAG 112 288 vIN
FLAG 576 352 0
FLAG -288 304 v+
FLAG 240 128 v+
FLAG -288 464 0
FLAG -192 464 0
FLAG -192 304 v-
FLAG 192 432 v-
TEXT 80 528 Left 2 !.tran 1
TEXT -288 8 Left 2 ;Note:\nSwitch shown for a logic 0 input\nQinj not included\nSPI functionality is not modelled\nOny one channel is modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\076e083f7095_Q4.asc
* Generated by LTspice 26.0.1 for Windows.
Vds N001 0 1.8
Vgs N002 0 {Vgs}
M1 N001 N002 0 0 nch_tt l=10u w=15u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.step param Vgs list 0.4 0.5 0.6 0.7 0.8 0.9
.dc Vds 0 1.8 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 624 -64 352 -64
WIRE 352 16 352 -64
WIRE 624 32 624 -64
WIRE 304 96 96 96
WIRE 96 144 96 96
WIRE 96 352 96 224
WIRE 352 352 352 112
WIRE 352 352 96 352
WIRE 624 352 624 112
WIRE 624 352 352 352
WIRE 352 384 352 352
SYMBOL voltage 624 16 R0
SYMATTR InstName Vds
SYMATTR Value 1.8
SYMBOL voltage 96 128 R0
SYMATTR InstName Vgs
SYMATTR Value {Vgs}
SYMBOL nmos 304 16 R0
SYMATTR InstName M1
SYMATTR Value nch_tt
SYMATTR Value2 l=10u w=15u
FLAG 352 384 0
TEXT -200 80 Left 2 !.include TSMC180.lib
TEXT -416 128 Left 2 !.step param Vgs list 0.4 0.5 0.6 0.7 0.8 0.9
TEXT -184 168 Left 2 !.dc Vds 0 1.8 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\4309e275d2b2_AD8643.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8643.asy)
Vin IN 0 SINE(0 1 100K)
R2 OUT N001 10K
R1 N001 0 10K
XU1 IN N001 +V -V OUT AD8643 ;pnba In+)In-)V+)V-)OUT
Rload OUT 0 10K
V1 +V 0 12
V2 -V 0 -12
.tran 100u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 192 -1152 192 -1168
WIRE 304 -1152 304 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 192 -1056 192 -1072
WIRE 304 -1056 304 -1072
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100K)
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 304 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL voltage 192 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL Opamps\\AD8643 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 192 -1168 +V
FLAG 304 -1168 -V
FLAG 304 -1056 0
FLAG 192 -1056 0
TEXT 744 -928 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\b20ee90a939e_Draft5.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N004 N003 0 0 NMOS
M2 N003 N003 0 0 NMOS
R1 N001 N003 100
R2 N002 N004 100
V1 N001 0 12V
V2 N002 0 12V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m
* Current Mirror Circuit
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 -16 -80 -16
WIRE 528 -16 352 -16
WIRE -80 32 -80 -16
WIRE 80 32 80 -16
WIRE 352 32 352 -16
WIRE 528 32 528 -16
WIRE 80 128 80 112
WIRE 176 128 80 128
WIRE 80 144 80 128
WIRE 352 144 352 112
WIRE -80 208 -80 112
WIRE 176 224 176 128
WIRE 176 224 128 224
WIRE 304 224 176 224
WIRE 528 240 528 112
WIRE 80 320 80 240
WIRE 352 320 352 240
WIRE 352 320 80 320
WIRE 352 384 352 320
FLAG 352 384 0
FLAG -80 208 0
FLAG 528 240 0
SYMBOL nmos 304 144 R0
SYMATTR InstName M1
SYMBOL nmos 128 144 M0
SYMATTR InstName M2
SYMBOL res 64 16 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 336 16 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL voltage -80 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12V
SYMBOL voltage 528 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12V
TEXT -112 408 Left 2 !.tran 100m
TEXT 104 -56 Left 2 ;Current Mirror Circuit
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3801B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3801B.asy)
R2 N004 N003 10K
Rload OUT 0 1
R1 IN N001 25m
V1 IN 0 5
L1 N005 OUT 4.7
D1 0 N005 MBRS360
C2 OUT 0 47 Rser=50m
C1 N003 0 220p
R3 OUT N006 866K
R4 N006 0 402K
XU1 N004 0 N006 N001 IN N002 LTC3801B ;pnba Ith/Run)GND)FB)Sense-)Vin)Pgate
MQ1 N005 N002 N001 N001 Si4465DY
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m startup
.lib LTC3801B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 976 680
WIRE 144 64 -16 64
WIRE 176 64 144 64
WIRE 272 64 256 64
WIRE 416 64 272 64
WIRE -16 80 -16 64
WIRE 144 128 144 64
WIRE 272 128 272 64
WIRE 416 160 416 64
WIRE -16 176 -16 160
WIRE 368 176 336 176
WIRE -96 256 -112 256
WIRE -16 256 -32 256
WIRE 80 256 64 256
WIRE 528 256 416 256
WIRE 640 256 608 256
WIRE 736 256 640 256
WIRE 848 256 736 256
WIRE 416 272 416 256
WIRE 640 272 640 256
WIRE 736 272 736 256
WIRE 848 272 848 256
WIRE 368 336 336 336
WIRE 416 352 416 336
WIRE 640 352 640 336
WIRE 848 368 848 352
WIRE 368 384 368 336
WIRE 736 384 736 352
WIRE 736 384 368 384
WIRE 208 400 208 384
WIRE 736 400 736 384
WIRE 736 496 736 480
SYMBOL voltage -16 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 832 256 R0
SYMATTR InstName Rload
SYMATTR Value 1
SYMBOL pmos 368 256 M180
WINDOW 0 58 82 Left 2
WINDOW 3 54 34 Left 2
SYMATTR InstName Q1
SYMATTR Value Si4465DY
SYMBOL schottky 400 336 M180
WINDOW 0 38 54 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 720 384 R0
SYMATTR InstName R4
SYMATTR Value 402K
SYMBOL res 160 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 25m
SYMBOL res 80 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL ind 512 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL PowerProducts\\LTC3801B 208 256 R0
SYMATTR InstName U1
SYMBOL res 720 256 R0
SYMATTR InstName R3
SYMATTR Value 866K
SYMBOL cap 624 272 R0
WINDOW 3 26 58 Left 2
SYMATTR Value 47
SYMATTR InstName C2
SYMATTR SpiceLine Rser=50m
SYMBOL cap -32 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 220p
FLAG 208 400 0
FLAG -16 176 0
FLAG -112 256 0
FLAG 416 352 0
FLAG 640 352 0
FLAG 848 368 0
FLAG 736 496 0
FLAG 848 256 OUT
FLAG -16 64 IN
TEXT 384 424 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4442.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4442.asy)
R1 N006 0 .5
MQ1 N004 N005 N003 N003 IRF7468
V3 N004 0 32
D1 N001 N002 1N5819
V1 N001 0 5
MQ2 N003 N008 0 0 IRF7468
XU1 N005 N003 N008 0 N007 N001 N001 N002 LTC4442 ;pnba TG)TS)BG)GND)IN)Vlogic)Vcc)Boost
C2 N006 0 10
V2 N007 0 PULSE(0 5 0 10n 10n .1u 1u)
C1 N003 N002 .1
L1 N003 N006 1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100u startup
.lib LTC4442.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -48 48
WIRE 112 48 64 48
WIRE 176 48 112 48
WIRE 272 48 240 48
WIRE 496 80 336 80
WIRE 336 96 336 80
WIRE 496 96 496 80
WIRE 112 112 112 48
WIRE -48 176 -48 48
WIRE -48 176 -288 176
WIRE -16 176 -48 176
WIRE 288 176 240 176
WIRE -288 192 -288 176
WIRE 496 192 496 176
WIRE -48 256 -48 176
WIRE -16 256 -48 256
WIRE 272 256 272 48
WIRE 272 256 240 256
WIRE 336 256 336 192
WIRE 336 256 272 256
WIRE 384 256 336 256
WIRE 496 256 464 256
WIRE 576 256 496 256
WIRE 496 272 496 256
WIRE 576 272 576 256
WIRE -288 288 -288 272
WIRE -16 336 -288 336
WIRE 288 336 240 336
WIRE -288 352 -288 336
WIRE 336 368 336 352
WIRE 496 368 496 336
WIRE 576 368 576 352
WIRE 112 416 112 400
WIRE -288 448 -288 432
SYMBOL cap 240 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage 496 80 R0
SYMATTR InstName V3
SYMATTR Value 32
SYMBOL voltage -288 336 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 10n 10n .1u 1u)
SYMBOL res 560 256 R0
SYMATTR InstName R1
SYMATTR Value .5
SYMBOL voltage -288 176 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL nmos 288 256 R0
SYMATTR InstName Q2
SYMATTR Value IRF7468
SYMBOL cap 480 272 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL schottky 0 64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL nmos 288 96 R0
SYMATTR InstName Q1
SYMATTR Value IRF7468
SYMBOL PowerProducts\\LTC4442 112 256 R0
SYMATTR InstName U1
SYMBOL ind 368 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
FLAG 112 416 0
FLAG -288 448 0
FLAG -288 288 0
FLAG 336 368 0
FLAG 496 192 0
FLAG 496 368 0
FLAG 576 368 0
TEXT 392 440 Left 2 !.tran 100u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1248933d7701_.asc
* Generated by LTspice 26.0.1 for Windows.
B1 N001 0 V=Tamb
Cth1 T N001 2.5e-13
Rf 1 2 R=Rpf()
B2 0 T I=joule()
Rth1 T N001 1.8e5
.FUNC joule()=Rpf()*i(Rf)**2
.FUNC Rpf()=R0*exp(q*(Ea-delta())/(k*v(T)))
.FUNC delta()=pow(q*E()/(pi*e0*er),0.5)
.FUNC E()=dv()/d
.FUNC dv()=v(1)-v(2)
.PARAM R0=65
.PARAM Ea=0.215
.PARAM Tamb=298
.tran 0 1 0 1e-4
.PARAM q=1.6e-19
.PARAM e0=8.85e-12
.PARAM er=45
.PARAM k=1.38e-23
.PARAM d=1.8e-8
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 -320 -240 -320
WIRE 32 -320 -112 -320
WIRE 32 -288 32 -320
WIRE -112 -272 -112 -320
WIRE -512 -240 -576 -240
WIRE -512 -208 -512 -240
WIRE -240 -208 -240 -320
WIRE -112 -176 -112 -208
WIRE 32 -176 32 -208
WIRE 32 -176 -112 -176
WIRE -112 -144 -112 -176
WIRE -512 -96 -512 -128
WIRE -512 -96 -576 -96
WIRE -240 -32 -240 -128
WIRE -112 -32 -112 -64
WIRE -112 -32 -240 -32
WIRE -240 0 -240 -32
SYMBOL bi -240 -128 R180
WINDOW 0 26 81 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName B2
SYMATTR Value I=joule()
SYMBOL Misc\\EuropeanResistor -528 -224 R0
SYMATTR InstName Rf
SYMATTR Value R=Rpf()
SYMBOL bv -112 -160 R0
SYMATTR InstName B1
SYMATTR Value V=Tamb
SYMBOL cap -128 -272 R0
SYMATTR InstName Cth1
SYMATTR Value 2.5e-13
SYMBOL Misc\\EuropeanResistor 16 -304 R0
SYMATTR InstName Rth1
SYMATTR Value 1.8e5
FLAG -240 0 0
FLAG -112 -320 T
FLAG -576 -240 1
FLAG -576 -96 2
TEXT 224 -280 Left 2 !.FUNC joule()=Rpf()*i(Rf)**2\n \n.FUNC Rpf()=R0*exp(q*(Ea-delta())/(k*v(T)))\n \n.FUNC delta()=pow(q*E()/(pi*e0*er),0.5)\n \n.FUNC E()=dv()/d\n \n.FUNC dv()=v(1)-v(2)
TEXT -688 56 Left 2 !.PARAM R0=65\n.PARAM Ea=0.215\n.PARAM Tamb=298
TEXT -816 -400 Left 2 !.tran 0 1 0 1e-4
TEXT -360 56 Left 2 !.PARAM q=1.6e-19 \n.PARAM e0=8.85e-12 \n.PARAM er=45 \n.PARAM k=1.38e-23 \n.PARAM d=1.8e-8
* Z:\home\khalils\Downloads\files\data\raw_asc\5668ec6b330c_Fig14_2_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
VDD VDD 0 1
VSG VDD VSG 0
M1 VDD VSG 0 VDD P_50n l=50n w=500n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSG 0 1 1m
.lib cmosedu_models.txt
* Plot log10(Id(M1))
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3172 680
WIRE 192 -256 192 -304
WIRE 272 -176 192 -176
WIRE 400 -176 272 -176
WIRE 448 -304 192 -304
WIRE 448 -256 448 -304
WIRE 448 -112 448 -160
WIRE 496 -304 448 -304
WIRE 496 -208 448 -208
WIRE 496 -208 496 -304
WIRE 576 -304 496 -304
WIRE 704 -304 576 -304
WIRE 704 -224 704 -304
WIRE 704 -112 704 -144
FLAG 704 -112 0
FLAG 576 -304 VDD
FLAG 448 -112 0
FLAG 272 -176 VSG
SYMBOL voltage 704 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL voltage 192 -272 R0
WINDOW 3 -49 87 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -72 12 Left 0
SYMATTR Value 0
SYMATTR InstName VSG
SYMBOL pmos4 400 -256 R0
WINDOW 123 57 102 Left 0
SYMATTR Value2 l=50n w=500n
SYMATTR InstName M1
SYMATTR Value P_50n
TEXT 112 -96 Left 0 !.dc VSG 0 1 1m
TEXT 112 -72 Left 0 !.lib cmosedu_models.txt
TEXT 216 -280 Left 0 ;Plot log10(Id(M1))
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1740-1.1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1740-1.1.asy)
C2 N002 0 10n
R1 IN N001 100k
XU1 IN OUT IN N002 OUT N001 MP_01 0 ADP1740-1.1 ;pnba Vin)Sense)EN)SS)Vout)PG))GND
V1 IN 0 1.8
C1 OUT 0 4.7 Rser=3m
Rload OUT 0 0.55
.tran 10m startup
.lib ADP1740-1.1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE -112 32 -128 32
WIRE -16 32 -112 32
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 416 32 368 32
WIRE 496 32 416 32
WIRE 528 32 496 32
WIRE -128 48 -128 32
WIRE -16 48 -16 32
WIRE 416 48 416 32
WIRE 528 48 528 32
WIRE 80 96 80 32
WIRE 96 96 80 96
WIRE -128 144 -128 128
WIRE 416 144 416 112
WIRE 528 144 528 128
WIRE -16 176 -16 128
WIRE 96 176 -16 176
WIRE 16 240 0 240
WIRE 96 240 80 240
WIRE 368 240 368 32
WIRE 368 240 352 240
WIRE 224 304 224 288
SYMBOL cap 400 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=3m
SYMBOL cap 80 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res -32 32 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 0.55
SYMBOL voltage -128 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL ADP1740-1.1 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -128 144 0
FLAG 0 240 0
FLAG -112 32 IN
FLAG 528 144 0
FLAG 416 144 0
FLAG 496 32 OUT
TEXT 128 352 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0919bb51b19b_beta_measuring2.asc
* Generated by LTspice 26.0.1 for Windows.
* .op
Q1 P001 N002 P002 0 BD136
R4 P001 0 100
R1 N001 P002 100
R2 N001 N002 100
V1 N001 0 5
R3 N002 0 100
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.lib BD136.sub
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 112 288 112
WIRE 320 112 304 112
WIRE 160 224 160 176
WIRE 160 224 96 224
WIRE 208 224 160 224
WIRE 304 224 304 112
WIRE 304 224 288 224
SYMBOL res 112 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL voltage 304 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 304 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL pnp 112 176 R270
SYMATTR InstName Q1
SYMATTR Value BD136
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL res 304 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
FLAG 32 112 0
FLAG 16 224 0
FLAG 400 112 0
TEXT 48 40 Left 2 ;.op
TEXT 368 256 Left 2 !.lib BD136.sub
TEXT 48 72 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP122-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP122-3.0.asy)
C2 OUT 0 1
C1 IN 0 1
V1 IN 0 5.5
Rload OUT 0 100
XU1 OUT MP_01 0 IN MP_02 IN ADP122 K=1/6000 ;pnba Vout))GND)En))Vin
.tran 10m startup
.lib ADP122.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL ADP122-3.0 256 208 R0
SYMATTR InstName U1
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6204.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 -V 0 -5
R1 OUT N001 1K
R2 N001 0 1K
V3 IN 0 SINE(0 1 1Meg)
XU1 IN N001 OUT +V -V LT6202 ;pnba IN+)IN-)OUT)VCC)VEE
.tran 10u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6204.asy)
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -208 144 -208 128
WIRE -80 144 -80 128
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE -208 240 -208 224
WIRE -80 240 -80 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 304 240 256 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
FLAG -80 240 0
FLAG 192 192 +V
FLAG -80 128 +V
FLAG 192 288 -V
FLAG -208 240 0
FLAG -208 128 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 304 240 OUT
FLAG 0 256 IN
SYMBOL voltage -80 128 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -208 128 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1Meg)
SYMBOL opamps\\LT6204 192 240 R0
SYMATTR InstName U1
TEXT 280 344 Left 2 !.tran 10u