Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM3223A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM3223A.asy)
XU1 inputA inputB VDD1 0 disable 0 VOB N002 0 VOA N001 ADuM3223A ;pnba VIA)VIB)VDD1)GND1)DISABLE)GNDB)VOB)VDDB)GNDA)VOA)VDDA
C5 VOB 0 2n
V6 N002 0 12
C1 0 VDD1 0.01
C3 VOA 0 2n
V2 inputB 0 PULSE(5 0 0 1n 1n 5u 10u)
V4 disable 0 0
V5 N001 0 12
V3 VDD1 0 5
V1 inputA 0 PULSE(0 5 0 1n 1n 5u 10u)
.tran 50u
.lib ADuM3223A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1216 680
WIRE 768 16 368 16
WIRE 848 16 768 16
WIRE -48 32 -720 32
WIRE 64 32 -48 32
WIRE 768 32 768 16
WIRE -720 80 -720 32
WIRE 640 80 368 80
WIRE -48 112 -560 112
WIRE 64 112 -48 112
WIRE 768 112 768 96
WIRE 432 144 368 144
WIRE -176 192 -480 192
WIRE -64 192 -176 192
WIRE 64 192 -64 192
WIRE -480 224 -480 192
WIRE 640 224 368 224
WIRE -176 272 -176 192
WIRE -128 272 -176 272
WIRE 0 272 -64 272
WIRE 64 272 0 272
WIRE 432 288 368 288
WIRE 0 304 0 272
WIRE -480 320 -480 304
WIRE -720 352 -720 160
WIRE -560 352 -560 192
WIRE 0 352 -176 352
WIRE 64 352 0 352
WIRE 768 352 368 352
WIRE 848 352 768 352
WIRE -176 368 -176 352
WIRE 768 368 768 352
WIRE 768 448 768 432
WIRE -176 464 -176 448
SYMBOL cap 752 32 R0
SYMATTR InstName C3
SYMATTR Value 2n
SYMBOL voltage 640 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 12
SYMBOL cap 752 368 R0
SYMATTR InstName C5
SYMATTR Value 2n
SYMBOL voltage 640 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 12
SYMBOL cap -64 256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.01
SYMBOL ADuM3223A 224 112 R0
SYMATTR InstName U1
SYMBOL voltage -480 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -720 64 R0
WINDOW 0 30 80 Left 2
WINDOW 3 18 -5 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 1n 1n 5u 10u)
SYMBOL voltage -560 96 R0
WINDOW 0 20 108 Left 2
WINDOW 3 39 40 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(5 0 0 1n 1n 5u 10u)
SYMBOL voltage -176 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 0
FLAG -480 320 0
FLAG -176 464 0
FLAG -720 352 0
FLAG -560 352 0
FLAG 768 112 0
FLAG 768 448 0
FLAG 848 352 VOB
FLAG 848 16 VOA
FLAG 0 304 0
FLAG 432 288 0
FLAG 432 144 0
FLAG 0 352 disable
FLAG -48 32 inputA
FLAG -48 112 inputB
FLAG 640 304 0
FLAG 640 160 0
FLAG -64 192 VDD1
TEXT 168 440 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\5bada4c2e239_OvervoltageProtection.asc
* Generated by LTspice 26.0.1 for Windows.
;op
V1 Vin 0 20
R2 Vout 0 10
R4 Gate_logic Zener_In 47k
M2 Gate_pwr Gate_logic Vin Vin BSS84
D4 Gate_logic Vin BZX84C10VL
D3 NC_01 NC_02 KDZ20B
M1 Vout Gate_pwr Vin Vin Si7461DP
D1 Gate_pwr Vin BZX84C10VL
D5 NC_03 NC_04 MMBZ20VAL
D2 0 Zener_In BZX84C20VL
R3 Vin Zener_In 47k
R1 0 Gate_pwr 47k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V1 15 26 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -288 80 -368 80
WIRE -144 80 -288 80
WIRE 128 80 -144 80
WIRE 384 80 128 80
WIRE 448 80 384 80
WIRE 704 80 544 80
WIRE 768 80 704 80
WIRE 800 80 768 80
WIRE 384 128 384 80
WIRE -368 144 -368 80
WIRE -144 144 -144 80
WIRE 128 160 128 80
WIRE 128 160 48 160
WIRE 48 176 48 160
WIRE 384 224 384 192
WIRE 464 224 464 128
WIRE 464 224 384 224
WIRE 128 272 128 160
WIRE -144 288 -144 224
WIRE -112 288 -144 288
WIRE -48 288 -112 288
WIRE 48 288 48 240
WIRE 48 288 32 288
WIRE 64 288 48 288
WIRE 80 288 64 288
WIRE 704 288 704 80
WIRE -144 352 -144 288
WIRE -16 384 -64 384
WIRE 64 384 64 288
WIRE 64 384 -16 384
WIRE 128 384 128 368
WIRE 304 384 128 384
WIRE 384 384 304 384
WIRE 464 384 464 224
WIRE 464 384 384 384
WIRE 304 400 304 384
WIRE -368 496 -368 224
WIRE -256 496 -368 496
WIRE -144 496 -144 416
WIRE -144 496 -256 496
WIRE 304 496 304 480
WIRE 304 496 -144 496
WIRE 704 496 704 368
WIRE 704 496 304 496
WIRE -256 528 -256 496
SYMBOL zener 64 240 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMATTR Value BZX84C10VL
SYMBOL zener -784 400 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D5
SYMATTR Value MMBZ20VAL
SYMBOL zener -128 416 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value BZX84C20VL
SYMBOL zener 400 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BZX84C10VL
SYMBOL res 48 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 47k
SYMBOL pmos 544 128 M270
SYMATTR InstName M1
SYMATTR Value Si7461DP
SYMBOL zener -880 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value KDZ20B
SYMBOL res 688 272 R0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL res -160 128 R0
SYMATTR InstName R3
SYMATTR Value 47k
SYMBOL pmos 80 368 M180
SYMATTR InstName M2
SYMATTR Value BSS84
SYMBOL voltage -368 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 20
SYMBOL res 320 496 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 47k
FLAG -256 528 0
FLAG -288 80 Vin
FLAG 768 80 Vout
FLAG 384 384 Gate_pwr
FLAG -16 384 Gate_logic
FLAG -112 288 Zener_In
TEXT -480 56 Left 2 !;op
TEXT -480 -16 Left 2 !.dc V1 15 26 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\20199d993149_AD8544.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8544.asy)
R1 N001 0 10K
Rload OUT 0 10K
Vin IN 0 SINE(0 1 10K)
XU1 IN N001 +V -V OUT AD8544 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 2.5
V2 -V 0 -2.5
R2 OUT N001 10K
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 64 -1072 48 -1072
WIRE 160 -1072 144 -1072
WIRE 176 -1072 160 -1072
WIRE 272 -1072 256 -1072
WIRE -176 -960 -176 -976
WIRE -64 -960 -64 -976
WIRE 160 -960 160 -1072
WIRE 176 -960 160 -960
WIRE 272 -944 272 -1072
WIRE 272 -944 240 -944
WIRE 400 -944 272 -944
WIRE 176 -928 64 -928
WIRE 400 -928 400 -944
WIRE 64 -912 64 -928
WIRE -176 -864 -176 -880
WIRE -64 -864 -64 -880
WIRE 400 -832 400 -848
WIRE 64 -816 64 -832
SYMBOL res 160 -1088 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 384 -944 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 64 -928 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL Opamps\\AD8544 208 -1008 R0
SYMATTR InstName U1
SYMBOL voltage -176 -976 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage -64 -976 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 272 -1088 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG -176 -976 +V
FLAG -176 -864 0
FLAG 64 -816 0
FLAG 400 -944 OUT
FLAG 64 -928 IN
FLAG 208 -976 +V
FLAG -64 -976 -V
FLAG 208 -912 -V
FLAG 48 -1072 0
FLAG 400 -832 0
FLAG -64 -864 0
TEXT 416 -736 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2903-B1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2903-B1.asy)
XU1 V1 0 V2 V3 V4 _RST LTC2903-B1 ;pnba V1)GND)V2)V3)V4)_RST
R1 _RST V1 10K
V3 V3 0 PULSE(0 2.5 0 100n 100n 250m 500m)
V2 V2 0 PULSE(0 3.3 0 100n 100n 250m 500m)
V4 V4 0 PULSE(0 1.8 0 100n 100n 250m 500m)
V1 V1 0 PULSE(0 5 0 100n 100n 250m 500m)
.tran 1
.lib LTC2903-B1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 64 48 64
WIRE 304 64 208 64
WIRE 0 176 -384 176
WIRE 48 176 48 64
WIRE 48 176 0 176
WIRE 80 176 48 176
WIRE 304 176 304 64
WIRE 304 176 272 176
WIRE 336 176 304 176
WIRE -384 192 -384 176
WIRE 80 240 48 240
WIRE 304 240 272 240
WIRE 400 240 304 240
WIRE 400 256 400 240
WIRE -384 288 -384 272
WIRE 0 320 -208 320
WIRE 80 320 0 320
WIRE 304 320 272 320
WIRE -208 336 -208 320
WIRE 304 336 304 320
WIRE 400 352 400 336
WIRE -208 432 -208 416
WIRE 304 432 304 416
SYMBOL voltage -208 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 0 100n 100n 250m 500m)
SYMBOL voltage 304 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 2.5 0 100n 100n 250m 500m)
SYMATTR InstName V3
SYMBOL res 224 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -384 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 5 0 100n 100n 250m 500m)
SYMATTR InstName V1
SYMBOL voltage 400 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 1.8 0 100n 100n 250m 500m)
SYMBOL LTC2903-B1 176 240 R0
SYMATTR InstName U1
FLAG 48 240 0
FLAG -384 288 0
FLAG -208 432 0
FLAG 304 432 0
FLAG 400 352 0
FLAG 0 176 V1
FLAG 0 320 V2
FLAG 304 320 V3
FLAG 304 240 V4
FLAG 336 176 _RST
TEXT 400 480 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1528.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 3.3
Rload OUT 0 500
XU1 OUT OUT 0 0 IN LT1528 ;pnba OUT)Sense)GND)_SHDN)IN
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1528.asy)
.lib LT1528.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 176 -208 176
WIRE 368 176 320 176
WIRE 432 176 368 176
WIRE 528 176 432 176
WIRE -208 192 -208 176
WIRE 432 192 432 176
WIRE 528 192 528 176
WIRE 32 272 16 272
WIRE 368 272 368 176
WIRE 368 272 320 272
WIRE -208 288 -208 272
WIRE 432 288 432 256
WIRE 528 288 528 272
WIRE 176 368 176 336
FLAG -208 288 0
FLAG 176 368 0
FLAG 432 288 0
FLAG 528 288 0
FLAG -208 176 IN
FLAG 528 176 OUT
FLAG 16 272 0
SYMBOL voltage -208 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 416 192 R0
SYMATTR InstName C1
SYMATTR Value 3.3
SYMBOL res 512 176 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT1528 176 224 R0
SYMATTR InstName U1
TEXT 368 384 Left 2 !.tran 1
* Z:\tmp\asc_dec_bjh7r6w2\17b6a739896a_negative_gm_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
Rd Vdd output 2k
XMmirror4 N008 N008 Vss 2n7000 ;pnba D)G)S
XMmirror3 N007 N008 Vss 2n7000 ;pnba D)G)S
XMcasc output N001 N002 2n7000 ;pnba D)G)S
R2 N006 N007 {r}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1940 1232
WIRE 1392 -112 1392 -144
WIRE 1392 0 1392 -32
WIRE 1392 32 1392 0
WIRE 1344 112 1248 112
WIRE 1248 208 1248 192
WIRE 1392 352 1392 128
WIRE 928 416 928 352
WIRE 1088 496 976 496
WIRE 704 560 704 512
WIRE 928 576 928 512
WIRE 528 624 528 592
WIRE 704 704 704 640
WIRE 928 704 928 656
WIRE 928 704 704 704
WIRE 528 736 528 704
WIRE 592 736 528 736
WIRE 528 752 528 736
WIRE 704 752 704 704
WIRE 592 832 592 736
WIRE 592 832 576 832
WIRE 656 832 592 832
WIRE 528 896 528 848
WIRE 704 896 704 848
SYMBOL res 1376 -128 R0
SYMATTR InstName Rd
SYMATTR Value 2k
SYMBOL nmos 576 752 M0
SYMATTR InstName Mmirror4
SYMATTR Value 2n7000
SYMATTR Prefix X
SYMBOL nmos 656 752 R0
SYMATTR InstName Mmirror3
SYMATTR Value 2n7000
SYMATTR Prefix X
SYMBOL nmos 1344 32 R0
SYMATTR InstName Mcasc
SYMATTR Value 2n7000
SYMATTR Prefix X
SYMBOL res 912 560 R0
SYMATTR InstName R2
SYMATTR Value {r}
FLAG 1392 -144 Vdd
FLAG 1248 208 0
FLAG 528 592 Vdd
FLAG 528 896 Vss
FLAG 704 896 Vss
FLAG 1392 0 output
* Z:\tmp\asc_dec_bjh7r6w2\13ffcecf19f0_Howland_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V2 -V 0 -15
XU2 N003 N001 +V -V N002 LT1001 ;pnba In+)In-)V+)V-)OUT
R3 N002 N003 1K
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 696
WIRE 32 160 -96 160
WIRE 144 160 112 160
WIRE 192 160 144 160
WIRE 304 160 272 160
WIRE -96 176 -96 160
WIRE 144 256 144 160
WIRE 160 256 144 256
WIRE -96 272 -96 256
WIRE 304 272 304 160
WIRE 304 272 224 272
WIRE 160 288 144 288
WIRE -304 336 -304 320
WIRE -176 336 -176 320
WIRE 16 368 -16 368
WIRE 144 368 144 288
WIRE 144 368 96 368
WIRE 192 368 144 368
WIRE 304 368 304 272
WIRE 304 368 272 368
WIRE 144 416 144 368
WIRE 544 416 144 416
WIRE -304 432 -304 416
WIRE -176 432 -176 416
SYMBOL voltage -176 320 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL opamps\\LT1001 192 208 R0
SYMATTR InstName U2
SYMBOL res 288 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
FLAG -176 432 0
FLAG -304 432 0
FLAG 192 240 +V
FLAG -304 320 +V
FLAG -176 320 -V
FLAG 192 304 -V
FLAG -96 272 0
FLAG -96 160 IN
FLAG -16 368 0
* Z:\home\khalils\Downloads\files\data\raw_asc\3752e431c38c_npn_curve.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 N002 0 0 2N3904
I1 0 N002 {Ib}
V1 N001 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.step param Ib 2u 500u 50u
.dc V1 0 10 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 64 240 64
WIRE 416 64 368 64
WIRE 416 96 416 64
WIRE 240 112 240 64
WIRE 64 160 32 160
WIRE 176 160 144 160
WIRE 32 192 32 160
WIRE 240 240 240 208
SYMBOL npn 176 112 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage 272 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL current 64 160 R270
WINDOW 0 32 40 VTop 2
WINDOW 3 -32 40 VBottom 2
SYMATTR InstName I1
SYMATTR Value {Ib}
FLAG 32 192 0
FLAG 416 96 0
FLAG 240 240 0
TEXT -48 24 Left 2 !.step param Ib 2u 500u 50u
TEXT -48 56 Left 2 !.dc V1 0 10 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8055.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 NC_01 NC_02 MP_03 0 MP_04 MP_05 NC_06 NC_07 IN IN IN IN MP_08 MP_09 MP_10 MP_11 MP_12 MP_13 MP_14 MP_15 MP_16 MP_17 MP_18 MP_19 OUT OUT MP_20 MP_21 MP_22 0 MP_23 NC_24 NC_25 NC_26 N002 NC_27 N001 LTM8055 ;pnba CTL)SS))LL)))IOUTmon)IINmon)Run)Iin)Vin)SVin)))))))))))))Vout)Iout))))GND))Mode)CLKout)Sync)RT)Comp)FB
R1 N002 0 36.5K
V1 IN 0 12
R2 OUT N001 100K
R3 N001 0 11K
C1 OUT 0 22 V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
C2 OUT 0 68 V=50 Irms=410m Rser=0.2 Lser=0 mfg="Nichicon" pn="UPL1H680MPH" type="Al electrolytic"
Rload OUT 0 2
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8055.asy)
.lib LTM8055.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 728
WIRE -32 -192 -128 -192
WIRE -16 -192 -32 -192
WIRE 416 -192 400 -192
WIRE 464 -192 416 -192
WIRE 576 -192 464 -192
WIRE 672 -192 576 -192
WIRE 768 -192 672 -192
WIRE -128 -176 -128 -192
WIRE 464 -176 464 -192
WIRE 576 -176 576 -192
WIRE 672 -176 672 -192
WIRE 768 -176 768 -192
WIRE -32 -96 -32 -192
WIRE -16 -96 -32 -96
WIRE 416 -96 416 -192
WIRE 416 -96 400 -96
WIRE -128 -80 -128 -96
WIRE 576 -80 576 -112
WIRE 672 -80 672 -112
WIRE 768 -80 768 -96
WIRE -32 0 -32 -96
WIRE -16 0 -32 0
WIRE 464 0 464 -96
WIRE 464 0 400 0
WIRE 464 16 464 0
WIRE -32 96 -32 0
WIRE -16 96 -32 96
WIRE 464 112 464 96
WIRE -16 480 -32 480
WIRE -112 576 -128 576
WIRE -16 576 -32 576
WIRE 416 576 400 576
FLAG -128 576 0
FLAG -32 480 0
FLAG -128 -80 0
FLAG 416 576 0
FLAG 464 112 0
FLAG 576 -80 0
FLAG 672 -80 0
FLAG 768 -80 0
FLAG 768 -192 OUT
FLAG -128 -192 IN
SYMBOL PowerProducts\\LTM8055 192 192 R0
SYMATTR InstName U1
SYMBOL res -16 560 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 36.5K
SYMBOL voltage -128 -192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 448 -192 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL res 448 0 R0
SYMATTR InstName R3
SYMATTR Value 11K
SYMBOL cap 560 -176 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
SYMBOL polcap 656 -176 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 68
SYMATTR InstName C2
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=50 Irms=410m Rser=0.2 Lser=0 mfg="Nichicon" pn="UPL1H680MPH" type="Al electrolytic"
SYMBOL res 752 -192 R0
SYMATTR InstName Rload
SYMATTR Value 2
TEXT 576 560 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3221-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3221-5.asy)
XU1 N001 N002 IN 0 IN OUT LTC3221-5 ;pnba C+)C-)_SHDN)GND)Vin)Vout
C2 OUT 0 4.7
V1 IN 0 3
C1 N001 N002 1
Rload OUT 0 83
.tran 1m startup
.lib LTC3221-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 96 0 96
WIRE 96 96 80 96
WIRE 464 96 352 96
WIRE 560 96 464 96
WIRE 0 112 0 96
WIRE 464 112 464 96
WIRE 560 112 560 96
WIRE 80 192 80 96
WIRE 96 192 80 192
WIRE 384 192 352 192
WIRE 0 208 0 192
WIRE 384 208 384 192
WIRE 464 208 464 176
WIRE 560 208 560 192
WIRE 96 288 80 288
WIRE 384 288 384 272
WIRE 384 288 352 288
SYMBOL voltage 0 96 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL PowerProducts\\LTC3221-5 224 192 R0
SYMATTR InstName U1
SYMBOL cap 368 208 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 448 112 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL res 544 96 R0
SYMATTR InstName Rload
SYMATTR Value 83
FLAG 0 208 0
FLAG 560 208 0
FLAG 464 208 0
FLAG 560 96 OUT
FLAG 0 96 IN
FLAG 80 288 0
TEXT 448 288 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\d07c04ce0430_Reg_5V_800mA.asc
* Generated by LTspice 26.0.1 for Windows.
* 5V Regulator with 800mA current limit
* Regulator
* Testload
R1 vreg 0 R=10*(1-time*0.5)
V1 N001 0 5
I1 N001 vreg TBL(0 0 10m 0.8 100 0.81)
.tran 0 1 0 1m
.options plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 0 16 0
WIRE 448 0 240 0
WIRE 560 0 448 0
WIRE 560 64 560 0
WIRE 16 80 16 0
WIRE 16 208 16 160
WIRE 560 208 560 144
WIRE 560 208 16 208
WIRE 16 224 16 208
RECTANGLE Normal 368 272 -80 -80
SYMBOL current 160 0 R270
WINDOW 0 32 40 VTop 0
WINDOW 3 -32 40 VBottom 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value TBL(0 0 10m 0.8 100 0.81)
SYMBOL voltage 16 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 544 48 R0
SYMATTR InstName R1
SYMATTR Value R=10*(1-time*0.5)
FLAG 16 224 0
FLAG 448 0 vreg
TEXT -32 -152 Left 0 !.tran 0 1 0 1m
TEXT -32 -120 Left 0 !.options plotwinsize=0
TEXT -32 -200 Left 0 ;5V Regulator with 800mA current limit
TEXT -56 -56 Left 0 ;Regulator
TEXT 584 48 Left 0 ;Testload
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3526-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3526-2.asy)
L1 N001 N002 2.2 Rpar=5K
R1 OUT N003 1.78Meg
C1 OUT 0 4.7 Rser=1m
R2 N003 0 1Meg
V1 N001 0 2
Rload OUT 0 250
XU1 N002 0 N001 N001 N003 OUT LTC3526-2 ;pnba SW)GND)Vin)_SHDN)FB)Vout
.tran 350u startup
.lib LTC3526-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 80 -144 80
WIRE 0 80 -48 80
WIRE 128 80 80 80
WIRE -144 96 -144 80
WIRE 128 128 128 80
WIRE -144 192 -144 176
WIRE -48 192 -48 80
WIRE -16 192 -48 192
WIRE 320 192 272 192
WIRE 464 192 320 192
WIRE 576 192 464 192
WIRE 320 208 320 192
WIRE 576 208 576 192
WIRE 464 224 464 192
WIRE 464 304 464 288
WIRE 576 304 576 288
WIRE -48 320 -48 192
WIRE -16 320 -48 320
WIRE 320 320 320 288
WIRE 320 320 272 320
WIRE 320 336 320 320
WIRE 128 400 128 384
WIRE 320 432 320 416
SYMBOL voltage -144 80 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL ind -16 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rpar=5K
SYMBOL PowerProducts\\LTC3526-2 128 256 R0
SYMATTR InstName U1
SYMBOL res 304 320 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 304 192 R0
SYMATTR InstName R1
SYMATTR Value 1.78Meg
SYMBOL cap 448 224 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1m
SYMBOL res 560 192 R0
SYMATTR InstName Rload
SYMATTR Value 250
FLAG -144 192 0
FLAG 128 400 0
FLAG 320 432 0
FLAG 464 304 0
FLAG 576 304 0
FLAG 576 192 OUT
TEXT 448 376 Left 2 !.tran 350u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1107-12.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1107-12.asy)
V1 IN 0 6
L1 IN N001 33 Rser=0.02 Rpar=5000
D1 N001 OUT MBRS140
XU1 IN IN N001 0 0 N002 N003 OUT LT1107 top=220K bot=25.5K ;pnba Ilim)Vin)SW1)SW2)GND)AO)SET)Sense
Rload OUT 0 30
C1 OUT 0 100 Rser=0.02
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m startup
.lib LT1107.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2488 1440
WIRE 1472 912 1280 912
WIRE 1600 912 1472 912
WIRE 1632 912 1600 912
WIRE 1744 912 1712 912
WIRE 1792 912 1744 912
WIRE 1920 912 1856 912
WIRE 2016 912 1920 912
WIRE 1280 928 1280 912
WIRE 2016 928 2016 912
WIRE 1472 960 1472 912
WIRE 1600 960 1600 912
WIRE 1280 1024 1280 1008
WIRE 1392 1024 1376 1024
WIRE 1744 1024 1744 912
WIRE 1744 1024 1680 1024
WIRE 2016 1024 2016 1008
WIRE 1920 1104 1920 912
WIRE 1920 1104 1680 1104
WIRE 1920 1120 1920 1104
WIRE 1392 1184 1376 1184
WIRE 1712 1184 1680 1184
WIRE 1920 1200 1920 1184
WIRE 1536 1264 1536 1248
SYMBOL res 2000 912 R0
SYMATTR InstName Rload
SYMATTR Value 30
SYMBOL VOLTAGE 1280 912 R0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL schottky 1792 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL POLCAP 1904 1120 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL IND 1616 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL PowerProducts\\LT1107-12 1536 1104 R0
SYMATTR InstName U1
FLAG 1536 1264 0
FLAG 1712 1184 0
FLAG 1920 1200 0
FLAG 1280 1024 0
FLAG 2016 1024 0
FLAG 2016 912 OUT
FLAG 1280 912 IN
TEXT 1768 1296 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\44bdf5d38c73_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
* .tran 100s
Vin N002 0 1.2
M1 N001 N002 N003 N001 PMOS l=90nm w=405nm
M2 N003 N002 0 0 NMOS l=90nm w=135nm
V2 N001 0 1.2
C1 N003 0 50f V=16 Irms=0 Rser=11 Lser=0 mfg="AVX" pn="TAJA105K016" type="Tantalum"
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vin 0 1.2 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 16 160 16
WIRE 400 16 240 16
WIRE 400 32 400 16
WIRE 240 64 240 16
WIRE 240 64 160 64
WIRE 80 96 -32 96
WIRE 112 96 80 96
WIRE -32 160 -32 96
WIRE 160 192 160 112
WIRE 384 192 160 192
WIRE 464 192 384 192
WIRE 160 224 160 192
WIRE 384 224 384 192
WIRE 240 272 160 272
WIRE 80 304 80 96
WIRE 112 304 80 304
WIRE 240 304 240 272
WIRE 384 304 384 288
SYMBOL polcap 368 224 R0
WINDOW 3 24 56 Left 2
SYMATTR InstName C1
SYMATTR Value 50f
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=16 Irms=0 Rser=11 Lser=0 mfg="AVX" pn="TAJA105K016" type="Tantalum"
SYMBOL voltage -32 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 1.2
SYMBOL voltage 400 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.2
SYMBOL nmos4 112 224 R0
SYMATTR InstName M2
SYMATTR Value2 l=90nm w=135nm
SYMBOL pmos4 112 16 R0
SYMATTR InstName M1
SYMATTR Value2 l=90nm w=405nm
FLAG 160 320 0
FLAG 240 304 0
FLAG -32 240 0
FLAG 400 112 0
FLAG 384 304 0
TEXT -64 344 Left 2 ;.tran 100s
TEXT -120 304 Left 2 !.dc Vin 0 1.2 0.01