Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\076cadb1dd40_PNP-transistor-biasing.asc
* Generated by LTspice 26.0.1 for Windows.
* E
* B
* C
* PNP Transistor biasing
V1 N001 0 12
Q1 N003 N002 N001 0 2N2907
R1 N003 0 1
R3 N002 0 11.2k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 -64 -16 -64
WIRE -16 -32 -16 -64
WIRE 192 16 192 -64
WIRE 272 64 256 64
WIRE 400 64 352 64
WIRE 192 128 192 112
WIRE 192 240 192 208
WIRE 400 240 400 64
WIRE 400 240 192 240
WIRE 192 288 192 240
SYMBOL res 176 112 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL pnp 256 112 R180
SYMATTR InstName Q1
SYMATTR Value 2N2907
SYMBOL voltage -16 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 256 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 11.2k
FLAG 192 288 0
FLAG -16 48 0
TEXT 40 152 Right 2 !.tran 1
TEXT 160 8 Right 2 ;E
TEXT 264 88 Right 2 ;B
TEXT 168 112 Right 2 ;C
TEXT 104 -120 Left 2 ;PNP Transistor biasing
* Z:\home\khalils\Downloads\files\data\raw_asc\f2134fb2b198_IXFX120N20_test.asc
* Generated by LTspice 26.0.1 for Windows.
* 1. Add a "nmos" component to the schematic.\n \n2. Replace the value NMOS with IXFX120N20 \n on your nmos-transistor in the schematic.\n \n6. Put the model either on the schematic or into a file.\n \nAdd the line \n .include IXFX120N20.lib\nif you use a model file. \nI recommend to keep the model file in the same \nfolder as the schematic. This makes a complete\nbackup of a circuit easy.
* .include IXFX120N20.lib
* PSpice Model Editor - Version 9.2
*$
*DEVICE=IXFX120N20,NMOS
* IXFX120N20 NMOS model
* updated using Model Editor release 9.2.1 on 03/03/04 at 11:42
* The Model Editor is a PSpice product HEM.
*$
+ LEVEL=3
+ L=2.0000E-6
+ W=380
+ KP=1.0340E-6
+ RS=10.000E-3
+ RD=3.6882E-3
+ VTO=3.9426
+ RDS=2.0000E6
+ TOX=2.0000E-6
+ CGSO=26.316E-18
+ CGDO=4.0478E-12
+ CBD=6.3639E-9
+ MJ=1.2063
+ PB=3
+ RG=10.000E-3
+ IS=78.723E-6
+ N=2.6043
+ RB=1.0000E-9
+ GAMMA=0
+ KAPPA=0
V2 N001 0 5
V1 N002 0 0
M1 N001 N002 0 0 IXFX120N20
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 -0 5 0.01 V1 3.9 4.5 0.2
.MODEL IXFX120N20 NMOS
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1512 988
WIRE -448 432 -448 400
WIRE -448 272 -448 240
WIRE -448 240 -304 240
WIRE -256 128 -256 160
WIRE -256 256 -256 400
WIRE -256 400 -448 400
WIRE -448 400 -448 352
WIRE -32 176 -32 128
WIRE -32 128 -256 128
WIRE -256 400 -32 400
WIRE -32 400 -32 256
SYMBOL voltage -32 160 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL nmos -304 160 R0
SYMATTR InstName M1
SYMATTR Value IXFX120N20
SYMBOL voltage -448 256 R0
SYMATTR InstName V1
SYMATTR Value 0
FLAG -448 432 0
TEXT -448 16 Left 0 !.dc V2 -0 5 0.01 V1 3.9 4.5 0.2
TEXT -472 488 Left 0 ;1. Add a "nmos" component to the schematic.\n \n2. Replace the value NMOS with IXFX120N20 \n    on your nmos-transistor in the schematic.\n \n6. Put the model either  on the schematic or into a file.\n \nAdd the line  \n    .include IXFX120N20.lib\nif you use a model file. \nI recommend to keep the model file in the same \nfolder as the schematic. This makes a complete\nbackup of a circuit easy.
TEXT -448 64 Left 0 ;.include IXFX120N20.lib
TEXT 176 32 Left 0 !* PSpice Model Editor - Version 9.2\n \n*$\n*DEVICE=IXFX120N20,NMOS\n \n* IXFX120N20 NMOS model\n* updated using Model Editor release 9.2.1 on 03/03/04 at 11:42\n* The Model Editor is a PSpice product HEM.\n.MODEL IXFX120N20 NMOS\n+ LEVEL=3\n+ L=2.0000E-6\n+ W=380\n+ KP=1.0340E-6\n+ RS=10.000E-3\n+ RD=3.6882E-3\n+ VTO=3.9426\n+ RDS=2.0000E6\n+ TOX=2.0000E-6\n+ CGSO=26.316E-18\n+ CGDO=4.0478E-12\n+ CBD=6.3639E-9\n+ MJ=1.2063\n+ PB=3\n+ RG=10.000E-3\n+ IS=78.723E-6\n+ N=2.6043\n+ RB=1.0000E-9\n+ GAMMA=0\n+ KAPPA=0\n*$
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4123.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:\n1. To simulate rectifier and input power control, the user needs to construct\n a proper AC source to connect to ACIN pin.\n2. The model supports the charge voltage temperature compensation feature.\n However, the user needs to specify ".temp" for the certain die temperature.\n3. Variables Tzn_air and Tchg, are introduced to reduce the simulation time\n artificially. Please make sure to have Tchg>Tzn_air for meaningful results.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4123.asy)
C1 N001 0 10 Rser=5m
XU1 NC_01 N002 NC_02 N003 N001 0 LTC4123 Tzn_air=2 Tchg=100 ;pnba ACIN)VCC)_CHRG)PROG)BAT)GND
CBAT N001 0 .1
R1 N003 0 1K
V1 N002 0 5
.tran 100 startup
.lib LTC4123.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1744 680
WIRE 496 112 352 112
WIRE 592 112 496 112
WIRE 496 128 496 112
WIRE 592 128 592 112
WIRE 96 208 0 208
WIRE 432 208 352 208
WIRE 496 208 496 192
WIRE 592 208 592 192
WIRE 0 224 0 208
WIRE 432 224 432 208
WIRE 368 304 352 304
WIRE 0 320 0 304
WIRE 432 320 432 304
SYMBOL cap 480 128 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=5m
SYMBOL PowerProducts\\LTC4123 224 208 R0
SYMATTR InstName U1
SYMATTR Description Low Power Wireless Charger for Hearing Aids
SYMBOL VOLTAGE 0 208 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 576 128 R0
SYMATTR InstName BAT
SYMATTR Value .1
SYMBOL res 416 208 R0
SYMATTR InstName R1
SYMATTR Value 1K
FLAG 0 320 0
FLAG 432 320 0
FLAG 368 304 0
FLAG 496 208 0
FLAG 592 208 0
TEXT 480 320 Left 2 !.tran 100 startup
TEXT -40 400 Left 1 ;Notes:\n1. To simulate rectifier and input power control, the user needs to construct\n     a proper AC source to connect to ACIN pin.\n2. The model supports the charge voltage temperature compensation feature.\n    However, the user needs to specify ".temp" for the certain die temperature.\n3. Variables Tzn_air and Tchg, are introduced to reduce the simulation time\n    artificially. Please make sure to have Tchg>Tzn_air for meaningful results.
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8546.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8546.asy)
V1 +V 0 5
R1 N001 0 1K
V2 -V 0 -5
R2 OUT N001 10K
XU1 IN N001 +V -V OUT AD8546 ;pnba In+)In-)V+)V-)OUT
Vin IN 0 SINE(0 .1 10K)
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1336 700
WIRE 448 -1200 432 -1200
WIRE 544 -1200 528 -1200
WIRE 560 -1200 544 -1200
WIRE 656 -1200 640 -1200
WIRE 208 -1104 208 -1120
WIRE 304 -1104 304 -1120
WIRE 544 -1088 544 -1200
WIRE 560 -1088 544 -1088
WIRE 656 -1072 656 -1200
WIRE 656 -1072 624 -1072
WIRE 736 -1072 656 -1072
WIRE 560 -1056 448 -1056
WIRE 448 -1040 448 -1056
WIRE 208 -1008 208 -1024
WIRE 304 -1008 304 -1024
WIRE 448 -944 448 -960
SYMBOL voltage 448 -1056 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 .1 10K)
SYMBOL Opamps\\AD8546 592 -1136 R0
SYMATTR InstName U1
SYMBOL res 544 -1216 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 656 -1216 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 208 -1120 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 304 -1120 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
FLAG 448 -944 0
FLAG 736 -1072 OUT
FLAG 448 -1056 IN
FLAG 592 -1104 +V
FLAG 592 -1040 -V
FLAG 432 -1200 0
FLAG 208 -1120 +V
FLAG 208 -1008 0
FLAG 304 -1120 -V
FLAG 304 -1008 0
TEXT 688 -912 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1516.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1516.asy)
C3 OUT 0 10
C2 N004 N003 .22
XU1 N001 IN OUT N003 N004 0 0 N002 LTC1516 ;pnba C1+)Vin)Vout)C2+)C2-)GND)SHDN)C1-
C1 N002 N001 .22
Rload OUT 0 100
V1 IN 0 3
.tran 1m startup
.lib LTC1516.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2712 2560
WIRE 2368 2048 2240 2048
WIRE 2560 2048 2432 2048
WIRE 2240 2144 2240 2048
WIRE 2256 2144 2240 2144
WIRE 2560 2144 2560 2048
WIRE 2560 2144 2544 2144
WIRE 2256 2208 1936 2208
WIRE 2560 2208 2544 2208
WIRE 1936 2224 1936 2208
WIRE 2176 2272 2064 2272
WIRE 2256 2272 2176 2272
WIRE 2560 2272 2544 2272
WIRE 2064 2288 2064 2272
WIRE 2176 2288 2176 2272
WIRE 1936 2320 1936 2304
WIRE 2256 2336 2240 2336
WIRE 2560 2336 2544 2336
WIRE 2064 2384 2064 2368
WIRE 2176 2384 2176 2352
WIRE 2240 2448 2240 2336
WIRE 2368 2448 2240 2448
WIRE 2560 2448 2560 2336
WIRE 2560 2448 2432 2448
SYMBOL voltage 1936 2208 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL cap 2160 2288 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res 2048 2272 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 2432 2032 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .22
SYMBOL cap 2432 2432 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .22
SYMBOL PowerProducts\\LTC1516 2400 2240 R0
SYMATTR InstName U1
FLAG 2560 2208 0
FLAG 2560 2272 0
FLAG 1936 2320 0
FLAG 2176 2384 0
FLAG 2064 2384 0
FLAG 2064 2272 OUT
FLAG 1936 2208 IN
TEXT 2496 2496 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\b6698de94a32_relax_osc.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R3 N003 Vcc 10K
R2 N003 0 10K
R4 N002 N001 560
V1 Vcc 0 5
R1 N002 N003 7.5k
XU2 N003 N001 Vcc 0 N002 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
C1 N001 0 22n
.tran 0 1m 0
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 112 128 112
WIRE 240 112 224 112
WIRE 256 112 240 112
WIRE 416 112 336 112
WIRE 128 144 128 112
WIRE 240 208 240 112
WIRE 320 208 240 208
WIRE 416 224 416 112
WIRE 416 224 384 224
WIRE 320 240 272 240
WIRE 160 384 128 384
WIRE 272 384 272 240
WIRE 272 384 240 384
WIRE 304 384 272 384
WIRE 416 384 416 224
WIRE 416 384 384 384
WIRE 272 416 272 384
WIRE 272 528 272 496
SYMBOL OpAmps\\UniversalOpAmp2 352 224 R0
SYMATTR InstName U2
SYMBOL voltage -64 288 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 224 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL res 400 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 7.5k
SYMBOL res 256 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res 256 400 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 352 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 560
FLAG 272 528 0
FLAG -64 384 0
FLAG -64 304 Vcc
FLAG 352 192 Vcc
FLAG 352 256 0
FLAG 128 144 0
FLAG 128 384 Vcc
TEXT 272 656 Left 2 !.tran 0 1m 0
* Z:\home\khalils\Downloads\files\data\raw_asc\6b7a82361c3a__2.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N005 N004 21n
R5 N003 0 50
C2 N003 N002 19.29n
V2 N004 0 SINE() AC 5 0
R1 N001 N005 3.9k
R3 N001 N002 500
R4 N006 0 755
R2 N005 0 1k
Q1 N002 N005 N006 0 2N3904
V1 N001 0 5
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.ac dec 10 10 100k V2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 448 80 240 80
WIRE 816 80 448 80
WIRE 240 128 240 80
WIRE 448 128 448 80
WIRE 448 256 448 208
WIRE 592 256 448 256
WIRE 704 256 656 256
WIRE 448 272 448 256
WIRE 816 288 816 80
WIRE 112 320 0 320
WIRE 240 320 240 208
WIRE 240 320 176 320
WIRE 384 320 240 320
WIRE 704 336 704 256
WIRE 0 400 0 320
WIRE 240 432 240 320
WIRE 448 432 448 368
WIRE 0 560 0 480
WIRE 240 560 240 512
WIRE 240 560 0 560
WIRE 448 560 448 512
WIRE 448 560 240 560
WIRE 704 560 704 416
WIRE 704 560 448 560
WIRE 816 560 816 368
WIRE 816 560 704 560
WIRE 448 592 448 560
SYMBOL Res 688 320 R0
SYMATTR InstName R5
SYMATTR Value 50
SYMBOL Res 432 112 R0
SYMATTR InstName R3
SYMATTR Value 500
SYMBOL Res 224 416 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL Res 432 416 R0
SYMATTR InstName R4
SYMATTR Value 755
SYMBOL Res 224 112 R0
SYMATTR InstName R1
SYMATTR Value 3.9k
SYMBOL npn 384 272 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL Cap 656 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 19.29n
SYMBOL Cap 176 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 21n
SYMBOL Voltage 816 272 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL Voltage 0 384 R0
WINDOW 3 24 96 Invisible 2
WINDOW 123 24 118 Left 2
SYMATTR InstName V2
SYMATTR Value SINE()
SYMATTR Value2 AC 5 0
FLAG 448 592 0
TEXT -232 656 Left 2 !.ac dec 10 10 100k V2
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3410B-1.875.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3410B-1.875.asy)
V1 IN 0 5
XU1 IN 0 N001 IN MP_01 OUT LTC3410B-x.x top=484K bot=360K ;pnba Run)GND)SW)Vin))FB
Rload OUT 0 20
L1 N001 OUT 4.7
C1 OUT 0 4.7
.tran 250u startup
.lib LTC3410B-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 700
WIRE 192 64 96 64
WIRE 352 64 192 64
WIRE 96 80 96 64
WIRE 352 80 352 64
WIRE 192 144 192 64
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 624 144 592 144
WIRE 672 144 624 144
WIRE 768 144 672 144
WIRE 672 160 672 144
WIRE 768 160 768 144
WIRE 96 176 96 160
WIRE 672 256 672 224
WIRE 768 256 768 240
WIRE 624 304 624 144
WIRE 624 304 496 304
WIRE 352 384 352 368
SYMBOL RES 752 144 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL cap 656 160 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL VOLTAGE 96 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LTC3410B-1.875 352 224 R0
SYMATTR InstName U1
FLAG 96 176 0
FLAG 352 384 0
FLAG 672 256 0
FLAG 768 256 0
FLAG 96 64 IN
FLAG 768 144 OUT
TEXT 544 344 Left 2 !.tran 250u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4611.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4611.asy)
XU1 0 NC_01 OUT 0 OUT N001 N001 NC_02 0 N002 N005 N003 N004 IN IN 0 LTM4611 ;pnba Mode_PLLin)Pgood)Vosns+)Vosns-)Vout)Vout_lcl)DiffVout)IntVcc)SGND)PLLFLTR/Fset)FB)Comp)Track/SS)Run)Vin)PGND
Rload OUT 0 67m
C1 OUT 0 500
R1 N005 0 240K
C2 N004 0 .001
V1 IN 0 3.3
.tran 1m startup
.lib LTM4611.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 -96 -112 -96
WIRE 144 -96 0 -96
WIRE -112 -80 -112 -96
WIRE 144 -80 144 -96
WIRE 0 -32 0 -96
WIRE 16 -32 0 -32
WIRE 416 -32 368 -32
WIRE 496 -32 416 -32
WIRE 592 -32 496 -32
WIRE 496 -16 496 -32
WIRE 592 -16 592 -32
WIRE -112 16 -112 0
WIRE 384 64 368 64
WIRE 496 80 496 48
WIRE 592 80 592 64
WIRE 16 160 0 160
WIRE 384 160 384 64
WIRE 384 160 368 160
WIRE 16 256 -16 256
WIRE 416 256 416 -32
WIRE 416 256 368 256
WIRE 16 352 0 352
WIRE 400 352 368 352
WIRE -64 448 -80 448
WIRE 16 448 0 448
WIRE 384 448 368 448
WIRE 480 448 464 448
WIRE 144 512 144 496
WIRE 240 512 240 496
SYMBOL PowerProducts\\LTM4611 192 208 R0
SYMATTR InstName U1
SYMBOL voltage -112 -96 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap 0 432 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .001
SYMBOL res 368 464 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 240K
SYMBOL cap 480 -16 R0
SYMATTR InstName C1
SYMATTR Value 500
SYMBOL res 576 -32 R0
SYMATTR InstName Rload
SYMATTR Value 67m
FLAG -112 16 0
FLAG 400 352 0
FLAG 240 512 0
FLAG 144 512 0
FLAG 480 448 0
FLAG 496 80 0
FLAG 592 80 0
FLAG 592 -32 OUT
FLAG -112 -96 IN
FLAG -80 448 0
FLAG -16 256 0
TEXT 480 312 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1270A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1270A.asy)
Rload OUT 0 10
XU1 N003 N002 0 N001 IN LT1270A ;pnba Vc)FB)GND)SW)Vin
C1 OUT 0 500
R1 OUT N002 8.7K
L1 IN N001 10
R3 N003 N004 1K
D1 N001 OUT MBRS360
V1 IN 0 5
C3 N004 0 1
R2 N002 0 1K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 15m startup
.lib LT1270A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1472
WIRE 1824 880 1616 880
WIRE 1872 880 1824 880
WIRE 1984 880 1952 880
WIRE 2032 880 1984 880
WIRE 2144 880 2096 880
WIRE 2256 880 2144 880
WIRE 2368 880 2256 880
WIRE 1616 896 1616 880
WIRE 2256 896 2256 880
WIRE 2368 896 2368 880
WIRE 1824 944 1824 880
WIRE 2144 960 2144 880
WIRE 1616 992 1616 976
WIRE 2256 992 2256 960
WIRE 2368 992 2368 976
WIRE 1984 1024 1984 880
WIRE 1984 1024 1952 1024
WIRE 2144 1088 2144 1040
WIRE 2144 1088 1952 1088
WIRE 2144 1104 2144 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2144 1200 2144 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
SYMBOL PowerProducts\\LT1270A 1824 1088 R0
SYMATTR InstName U1
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL RES 2128 944 R0
SYMATTR InstName R1
SYMATTR Value 8.7K
SYMBOL res 2352 880 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL RES 2128 1088 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL IND 1856 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL schottky 2032 896 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL polcap 2240 896 R0
SYMATTR InstName C1
SYMATTR Value 500
SYMBOL VOLTAGE 1616 880 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 2368 880 OUT
FLAG 2144 1200 0
FLAG 2256 992 0
FLAG 2368 992 0
FLAG 2064 1248 0
FLAG 1824 1248 0
FLAG 1616 992 0
FLAG 1616 880 IN
TEXT 2208 1248 Left 2 !.tran 15m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\43a921b83a22_TRR-8.asc
* Generated by LTspice 26.0.1 for Windows.
R1 b 0 500
D1 a b RFN2L6S
V1 a 0 PULSE(500 -500 1u 5n 5n 9u 20u) Rser=10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 6u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -176 128 -208 128
WIRE -112 128 -176 128
WIRE 16 128 -48 128
WIRE 32 128 16 128
WIRE -208 176 -208 128
WIRE 32 176 32 128
WIRE -208 304 -208 256
WIRE -80 304 -208 304
WIRE 32 304 32 256
WIRE 32 304 -80 304
WIRE -80 320 -80 304
SYMBOL Misc\\EuropeanResistor 16 160 R0
SYMATTR InstName R1
SYMATTR Value 500
SYMBOL diode -112 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value RFN2L6S
SYMBOL voltage -208 160 R0
WINDOW 3 10 105 Invisible 2
WINDOW 123 0 0 Left 2
SYMATTR Value PULSE(500 -500 1u 5n 5n 9u 20u)
SYMATTR SpiceLine Rser=10
SYMATTR InstName V1
FLAG -80 320 0
FLAG -176 128 a
FLAG 16 128 b
TEXT -208 320 Left 2 !.tran 6u
* Z:\home\khalils\Downloads\files\data\raw_asc\23a083fd47e5_RayWindPulseIsolator.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Optos\4N25.asy)
V1 In 0 PULSE(3.3 0 0.01 0.0005 0.0005 0.002 0.05 100)
XU2 N003 In N001 Out NC_01 4N25 ;pnba A)K)C)E)B
R3 Out 0 10K
V3 N002 0 3.3
V2 N001 0 3.3
R1 N002 N003 1K
.tran 100m startup
.lib 4N25.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 608 80 368 80
WIRE 32 96 -192 96
WIRE -192 144 -192 96
WIRE 608 144 608 80
WIRE 32 160 32 96
WIRE -192 240 -192 224
WIRE 608 256 608 224
WIRE 32 272 32 240
WIRE 112 272 32 272
WIRE 368 272 368 80
WIRE 368 272 304 272
WIRE 368 336 304 336
WIRE 48 368 32 368
WIRE 112 368 48 368
WIRE 368 368 368 336
WIRE 32 416 32 368
WIRE 32 416 -208 416
WIRE 368 416 368 368
WIRE -208 528 -208 496
WIRE 368 560 368 496
SYMBOL voltage -208 400 R0
SYMATTR InstName V1
SYMATTR Value PULSE(3.3 0 0.01 0.0005 0.0005 0.002 0.05 100)
SYMBOL res 16 144 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -192 128 R0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL voltage 608 128 R0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL res 352 400 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL Optos/4N25 208 336 R0
SYMATTR InstName U2
FLAG 608 256 0
FLAG 368 560 0
FLAG -208 528 0
FLAG 368 368 Out
FLAG -192 240 0
FLAG 48 368 In
TEXT 648 352 Left 2 !.tran 100m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1db2a9c6a30b_Comparador.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2, XU3, XU4 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
XU3 10 9 4 11 8 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
XU1 3 2 4 11 1 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
XU2 5 6 4 11 7 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
XU4 12 13 4 11 14 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 0 -16 0
WIRE 96 32 96 0
WIRE 96 32 48 32
WIRE 96 48 96 32
WIRE 64 64 -16 64
WIRE 192 80 128 80
WIRE 64 96 -16 96
WIRE 96 112 0 112
WIRE 48 128 48 32
WIRE 96 128 48 128
WIRE 96 144 96 128
WIRE 64 160 -16 160
WIRE 192 176 128 176
WIRE 64 192 -16 192
WIRE 0 208 0 112
WIRE 96 208 0 208
WIRE 48 224 48 128
WIRE 96 224 48 224
WIRE 96 240 96 224
WIRE 64 256 -16 256
WIRE 192 272 128 272
WIRE 64 288 -16 288
WIRE 0 304 0 208
WIRE 96 304 0 304
WIRE 48 320 48 224
WIRE 96 320 48 320
WIRE 96 336 96 320
WIRE 64 352 -16 352
WIRE 192 368 128 368
WIRE 64 384 -16 384
WIRE 0 416 0 304
WIRE 96 416 96 400
WIRE 96 416 0 416
WIRE 0 464 0 416
IOPIN 192 80 Out
IOPIN 192 176 Out
IOPIN 192 272 Out
IOPIN 192 368 Out
IOPIN -16 96 In
IOPIN -16 64 In
IOPIN -16 160 In
IOPIN -16 192 In
IOPIN -16 256 In
IOPIN -16 288 In
IOPIN -16 352 In
IOPIN -16 384 In
IOPIN -16 0 In
IOPIN 0 464 In
SYMBOL Opamps\\UniversalOpamp2 96 368 R0
SYMATTR InstName U4
SYMBOL Opamps\\UniversalOpamp2 96 272 R0
SYMATTR InstName U3
SYMBOL Opamps\\UniversalOpamp2 96 176 R0
SYMATTR InstName U2
SYMBOL Opamps\\UniversalOpamp2 96 80 R0
SYMATTR InstName U1
FLAG 192 80 1
FLAG 192 176 7
FLAG 192 272 8
FLAG 192 368 14
FLAG -16 96 3
FLAG -16 64 2
FLAG -16 160 6
FLAG -16 192 5
FLAG -16 256 9
FLAG -16 288 10
FLAG -16 352 13
FLAG -16 384 12
FLAG -16 0 4
FLAG 0 464 11