Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\48627f651534_LoopFilter.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N004 N003 50R
R2 N005 N004 150R
C1 N004 0 22n
C2 N005 0 220n
V1 N003 0 AC 1.
R3 N001 N005 22k
R4 N006 N001 39k
C3 N002 N001 1p
XU1 N007 N006 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
C4 N006 0 1p
R5 N007 0 10k
R6 N002 N007 18k
.ac oct 10 1 200000
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1236 680
WIRE 800 -160 720 -160
WIRE 1152 -160 864 -160
WIRE 48 -48 -64 -48
WIRE 208 -48 128 -48
WIRE 304 -48 208 -48
WIRE 448 -48 384 -48
WIRE 592 -48 448 -48
WIRE 720 -48 720 -160
WIRE 720 -48 672 -48
WIRE 768 -48 720 -48
WIRE 896 -48 848 -48
WIRE 976 -48 896 -48
WIRE 1152 -32 1152 -160
WIRE 1152 -32 1040 -32
WIRE 1168 -32 1152 -32
WIRE 1232 -32 1168 -32
WIRE -64 -16 -64 -48
WIRE 208 -16 208 -48
WIRE 448 -16 448 -48
WIRE 976 -16 960 -16
WIRE 896 0 896 -48
WIRE 960 32 960 -16
WIRE 1040 32 960 32
WIRE 1168 32 1168 -32
WIRE 1168 32 1120 32
WIRE -64 112 -64 64
WIRE 96 112 -64 112
WIRE 208 112 208 48
WIRE 208 112 96 112
WIRE 448 112 448 48
WIRE 448 112 208 112
WIRE 896 112 896 64
WIRE 896 112 448 112
WIRE 960 112 896 112
WIRE 1200 112 960 112
WIRE 96 128 96 112
FLAG 96 128 0
SYMBOL res 144 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50R
SYMBOL res 400 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 150R
SYMBOL cap 192 -16 R0
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL cap 432 -16 R0
SYMATTR InstName C2
SYMATTR Value 220n
SYMBOL voltage -64 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value AC 1.
SYMBOL res 688 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 22k
SYMBOL res 864 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 39k
SYMBOL cap 864 -176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1p
SYMBOL Opamps\\opamp 1008 32 M180
SYMATTR InstName U1
SYMBOL cap 880 0 R0
SYMATTR InstName C4
SYMATTR Value 1p
SYMBOL res 944 16 R0
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL res 1136 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 18k
TEXT -98 152 Left 2 !.ac oct 10 1 200000
TEXT 608 168 Left 2 !.lib opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1230.asc
* Generated by LTspice 26.0.1 for Windows.
* Single Supply Cable Driver for Composite Video
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1230.asy)
C3 N001 0 1
V1 +V 0 5
C2 N005 N004 1
Q1 +V N001 N005 0 2N3904
R2 N002 0 750
R7 N001 0 2K
R3 +V N002 1.5K
R4 P001 OUT 75
C1 P001 N003 1000
R1 N003 N002 510
V3 N004 0 SINE(0 .7 1K)
R6 +V N001 3K
XU1 N005 N002 +V 0 N003 LT1229 ;pnba In+)In-)V+)V-)OUT
R5 OUT 0 10K
R8 N005 0 150K
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 300m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1260 680
WIRE -48 -48 -128 -48
WIRE 224 -48 -48 -48
WIRE 416 -48 224 -48
WIRE -48 -32 -48 -48
WIRE 224 -32 224 -48
WIRE 416 -16 416 -48
WIRE -128 16 -128 -48
WIRE -48 64 -48 48
WIRE -48 64 -64 64
WIRE 32 64 -48 64
WIRE -48 80 -48 64
WIRE 32 96 32 64
WIRE 128 96 112 96
WIRE 224 96 224 48
WIRE 224 96 208 96
WIRE 240 96 224 96
WIRE 352 96 320 96
WIRE 416 96 416 64
WIRE -48 176 -48 160
WIRE 32 176 32 160
WIRE 288 208 288 192
WIRE 224 224 224 96
WIRE 256 224 224 224
WIRE 352 240 352 96
WIRE 352 240 320 240
WIRE 416 240 352 240
WIRE 592 240 560 240
WIRE 640 240 592 240
WIRE -240 256 -336 256
WIRE -128 256 -128 112
WIRE -128 256 -176 256
WIRE 256 256 -128 256
WIRE 592 256 592 240
WIRE -336 272 -336 256
WIRE -128 272 -128 256
WIRE 288 288 288 272
WIRE 592 352 592 336
WIRE -336 368 -336 352
WIRE -128 368 -128 352
SYMBOL cap -176 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL npn -64 16 M0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res -144 256 R0
SYMATTR InstName R8
SYMATTR Value 150K
SYMBOL res 576 240 R0
SYMATTR InstName R5
SYMATTR Value 10K
SYMBOL res -64 64 R0
SYMATTR InstName R7
SYMATTR Value 2K
SYMBOL voltage -336 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 .7 1K)
SYMBOL voltage 416 -32 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -64 -48 R0
SYMATTR InstName R6
SYMATTR Value 3K
SYMBOL cap 480 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000
SYMBOL opamps\\LT1230 288 176 R0
SYMATTR InstName U1
SYMBOL res 464 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 75
SYMBOL cap 16 96 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 224 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 750
SYMBOL res 208 -48 R0
SYMATTR InstName R3
SYMATTR Value 1.5K
SYMBOL res 336 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 510
FLAG 416 96 0
FLAG 288 192 +V
FLAG 416 -48 +V
FLAG 112 96 0
FLAG -336 368 0
FLAG 288 288 0
FLAG 592 352 0
FLAG 640 240 OUT
FLAG -48 176 0
FLAG -128 368 0
FLAG 32 176 0
TEXT 360 360 Left 2 !.tran 300m
TEXT 128 -64 Bottom 2 ;Single Supply Cable Driver for Composite Video
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1575-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1575-2.8.asy)
C3 N005 0 1000p
V2 N002 0 12
I2 OUT 0 PULSE(.2 5 300u 100n 100n 300u 600u) load
V1 N001 0 5
XU1 0 N002 0 OUT N004 N003 N001 N001 LT1575-2.8 ;pnba SHDN)Vin)GND)OUT)Comp)Gate)Ineg)Ipos
R3 N004 N005 5K
C1 OUT 0 24
M3 N001 N003 OUT OUT IRFZ24
C2 N004 0 10p
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m
.lib LT1575.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4232 1996
WIRE 2352 -32 2336 -32
WIRE 2688 -32 2640 -32
WIRE 2928 -32 2688 -32
WIRE 3008 -32 2928 -32
WIRE 3008 -16 3008 -32
WIRE 2352 64 2240 64
WIRE 2688 64 2688 -32
WIRE 2688 64 2640 64
WIRE 2240 80 2240 64
WIRE 2928 80 2928 -32
WIRE 3008 80 3008 64
WIRE 2352 160 2336 160
WIRE 2880 160 2640 160
WIRE 2240 176 2240 160
WIRE 2352 256 2336 256
WIRE 2672 256 2640 256
WIRE 2704 256 2672 256
WIRE 2816 256 2784 256
WIRE 2672 272 2672 256
WIRE 2816 272 2816 256
WIRE 2672 352 2672 336
WIRE 2816 352 2816 336
WIRE 2336 400 2336 256
WIRE 2928 400 2928 176
WIRE 2928 400 2336 400
WIRE 3056 400 2928 400
WIRE 2928 416 2928 400
WIRE 3056 416 3056 400
WIRE 2928 512 2928 480
WIRE 3056 512 3056 496
SYMBOL cap 2656 272 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL cap 2912 416 R0
SYMATTR InstName C1
SYMATTR Value 24
SYMBOL voltage 3008 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL nmos 2880 80 R0
SYMATTR InstName M3
SYMATTR Value IRFZ24
SYMBOL LT1575-2.8 2496 112 R0
SYMATTR InstName U1
SYMBOL current 3056 416 R0
WINDOW 123 0 0 Left 2
WINDOW 39 46 42 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I2
SYMATTR Value PULSE(.2 5 300u 100n 100n 300u 600u)
SYMBOL voltage 2240 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL res 2688 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 5K
SYMBOL cap 2800 272 R0
SYMATTR InstName C3
SYMATTR Value 1000p
FLAG 2928 512 0
FLAG 3056 512 0
FLAG 3008 80 0
FLAG 2816 352 0
FLAG 2672 352 0
FLAG 2336 -32 0
FLAG 2240 176 0
FLAG 2336 160 0
FLAG 3056 400 OUT
TEXT 3288 576 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2504-4.2.asc
* Generated by LTspice 26.0.1 for Windows.
* PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2504-4.2.asy)
L1 N001 N002 1.5 Rser=80m
C1 OUT 0 10
V1 IN 0 3.3
XU1 N001 N002 OUT IN IN 0 OUT NC_01 ADP2504-4.2 ;pnba SW1)SW2)FB)EN)PVin)GND)Vout)Sync
Rload OUT 0 50
.tran 400u startup
.lib ADP2504-4.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 48 64 32 64
WIRE 336 64 304 64
WIRE -64 80 -64 64
WIRE 32 144 32 64
WIRE 48 144 32 144
WIRE 336 144 304 144
WIRE -64 176 -64 160
WIRE 320 224 304 224
WIRE 368 224 320 224
WIRE 480 224 368 224
WIRE 368 240 368 224
WIRE 480 240 480 224
WIRE 48 304 32 304
WIRE 320 304 320 224
WIRE 320 304 304 304
WIRE 368 336 368 304
WIRE 480 336 480 320
SYMBOL ADP2504-4.2 176 176 R0
SYMATTR InstName U1
SYMBOL voltage -64 64 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL ind 320 48 R0
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=80m
SYMBOL cap 352 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 464 224 R0
SYMATTR InstName Rload
SYMATTR Value 50
FLAG 368 336 0
FLAG 32 304 0
FLAG -64 176 0
FLAG 480 336 0
FLAG -64 64 IN
FLAG 480 224 OUT
TEXT 344 392 Left 2 !.tran 400u startup
TEXT 168 0 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\5a66b8f17ce0_Common_Emitter.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 N003 0 0 BC547B
VBB N002 0 0
R2 N001 N004 1K
R1 N003 N002 100K
VCC N004 0 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VCC 0 10 0.1 VBB 0.5 1 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 608 192 480 192
WIRE 608 224 608 192
WIRE 480 240 480 192
WIRE 288 288 208 288
WIRE 416 288 368 288
WIRE 608 336 608 304
WIRE 208 352 208 288
WIRE 208 480 208 432
WIRE 480 480 480 336
WIRE 480 480 208 480
WIRE 608 480 608 416
WIRE 608 480 480 480
WIRE 480 496 480 480
SYMBOL res 592 208 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 208 336 R0
SYMATTR InstName VBB
SYMATTR Value 0
SYMBOL res 384 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL npn 416 240 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL voltage 608 320 R0
SYMATTR InstName VCC
SYMATTR Value 0
FLAG 480 496 0
TEXT 112 504 Left 2 !.dc VCC 0 10 0.1 VBB 0.5 1 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8539.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8539.asy)
Vin IN 0 SINE(0 1 10K)
Rload OUT 0 10K
V1 +V 0 2.5
R1 N001 0 10K
XU1 IN N001 +V -V OUT AD8539 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -2.5
R2 OUT N001 10K
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1136 144 -1152
WIRE 256 -1136 256 -1152
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1040 144 -1056
WIRE 256 -1040 256 -1056
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 144 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 256 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL Opamps\\AD8539 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 144 -1152 +V
FLAG 144 -1040 0
FLAG 256 -1152 -V
FLAG 256 -1040 0
TEXT 736 -936 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\0efe78f44b1e_AmpSimp.asc
* Generated by LTspice 26.0.1 for Windows.
R nAmp 0 {REq}
Rin nP nN 1G
R1 nOut N001 {RsOut}
GAmp 0 nAmp nP nN {Trans}
C nAmp 0 {CEq}
EOut N001 0 Value={Limit(V(nAmp),{VHigh},{VLow})}
.Param Gain=30000 Pole=30
.Param VHigh=4V VLow=-4V
.Param Trans=100u RsOut=10
.Param REq=Gain/Trans CEq=1/(2*pi*REq*Pole)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 680
WIRE 0 64 -64 64
WIRE 96 64 0 64
WIRE 272 96 144 96
WIRE 416 96 272 96
WIRE 624 96 544 96
WIRE 768 96 704 96
WIRE 0 128 0 64
WIRE 144 128 144 96
WIRE 272 128 272 96
WIRE 544 128 544 96
WIRE 96 144 96 64
WIRE 416 144 416 96
WIRE 144 240 144 208
WIRE 272 240 272 208
WIRE 272 240 144 240
WIRE 416 240 416 208
WIRE 416 240 272 240
WIRE 544 240 544 208
WIRE 544 240 416 240
WIRE 0 272 0 208
WIRE 0 272 -64 272
WIRE 96 272 96 192
WIRE 96 272 0 272
WIRE 272 272 272 240
IOPIN -64 64 In
IOPIN -64 272 In
IOPIN 768 96 Out
SYMBOL res 720 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {RsOut}
SYMBOL Misc\\Epoly 544 112 R0
WINDOW 0 32 96 Left 2
WINDOW 3 -208 160 Left 2
SYMATTR InstName EOut
SYMATTR Value Value={Limit(V(nAmp),{VHigh},{VLow})}
SYMBOL res -16 112 R0
SYMATTR InstName Rin
SYMATTR Value 1G
SYMBOL g 144 112 R0
SYMATTR InstName GAmp
SYMATTR Value {Trans}
SYMBOL cap 400 144 R0
SYMATTR InstName C
SYMATTR Value {CEq}
SYMBOL res 256 112 R0
SYMATTR InstName R
SYMATTR Value {REq}
FLAG -64 64 nP
FLAG -64 272 nN
FLAG 272 272 0
FLAG 272 96 nAmp
FLAG 768 96 nOut
TEXT -32 -80 Left 2 !.Param Gain=30000 Pole=30\n.Param VHigh=4V VLow=-4V\n.Param Trans=100u RsOut=10\n.Param REq=Gain/Trans CEq=1/(2*pi*REq*Pole)
* Z:\home\khalils\Downloads\files\data\raw_asc\a046904b9523_Transistor_PNP.asc
* Generated by LTspice 26.0.1 for Windows.
* PNP Transistor biasing
R1 N003 0 1
V1 N001 0 12
Q1 N003 N002 N001 0 2N2907
R3 N002 0 11.2k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 -64 -16 -64
WIRE -16 -32 -16 -64
WIRE 192 16 192 -64
WIRE 272 64 256 64
WIRE 400 64 352 64
WIRE 400 112 400 64
WIRE 192 128 192 112
WIRE 192 288 192 208
SYMBOL voltage -16 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL pnp 256 112 R180
SYMATTR InstName Q1
SYMATTR Value 2N2907
SYMBOL res 256 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 11.2k
SYMBOL res 176 112 R0
SYMATTR InstName R1
SYMATTR Value 1
FLAG 400 112 0
FLAG 192 288 0
FLAG -16 48 0
TEXT 40 152 Right 2 !.tran 1
TEXT 104 -120 Left 2 ;PNP Transistor biasing
* Z:\home\khalils\Downloads\files\data\raw_asc\RH1028.asc
* Generated by LTspice 26.0.1 for Windows.
* Phono Preamplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\RH1028.asy)
XU1 IN N001 +V -V OUT RH1028 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -15
R4 IN 0 47K
R2 N001 0 10
V1 +V 0 15
C1 N002 N001 .1
V3 IN 0 ac 1
C3 IN 0 100p
R3 N002 N001 787
R1 OUT N001 10K
C2 OUT N002 .33
.ac oct 10 10 20K
.lib RH1028.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 896 680
WIRE 128 -48 96 -48
WIRE 240 -48 208 -48
WIRE -256 32 -256 16
WIRE -128 32 -128 16
WIRE 96 48 96 -48
WIRE 144 48 96 48
WIRE 240 48 240 -48
WIRE 240 48 208 48
WIRE 256 48 240 48
WIRE 336 48 320 48
WIRE -256 128 -256 112
WIRE -128 128 -128 112
WIRE 0 144 -16 144
WIRE 96 144 96 48
WIRE 96 144 80 144
WIRE 208 144 96 144
WIRE 336 144 336 48
WIRE 336 144 288 144
WIRE 192 208 192 192
WIRE 96 224 96 144
WIRE 160 224 96 224
WIRE 336 240 336 144
WIRE 336 240 224 240
WIRE 368 240 336 240
WIRE 0 256 -112 256
WIRE 96 256 0 256
WIRE 160 256 96 256
WIRE -112 272 -112 256
WIRE 0 272 0 256
WIRE 96 272 96 256
WIRE 192 288 192 272
WIRE -112 368 -112 352
WIRE 0 368 0 352
WIRE 96 368 96 336
SYMBOL cap 320 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .33
SYMBOL voltage -128 16 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res -16 256 R0
SYMATTR InstName R4
SYMATTR Value 47K
SYMBOL cap 80 272 R0
SYMATTR InstName C3
SYMATTR Value 100p
SYMBOL res 96 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL res 304 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -256 16 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -112 256 R0
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL cap 208 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL RH1028 192 176 R0
SYMATTR InstName U1
SYMBOL res 224 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 787
FLAG -128 128 0
FLAG 192 192 +V
FLAG -128 16 +V
FLAG 192 288 -V
FLAG -256 128 0
FLAG -256 16 -V
FLAG -16 144 0
FLAG -112 368 0
FLAG 96 368 0
FLAG 0 368 0
FLAG -112 256 IN
FLAG 368 240 OUT
TEXT 200 360 Left 2 !.ac oct 10 10 20K
TEXT 40 -88 Bottom 2 ;Phono Preamplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\6e1413878be4_OP291.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP291.asy)
V2 -V 0 -5
R2 OUT N001 10K
R1 N001 0 10K
XU1 IN N001 +V -V OUT OP291 ;pnba In+)In-)V+)V-)OUT
Rload OUT 0 10K
Vin IN 0 SINE(0 1 10K)
V1 +V 0 5
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 192 -1136 192 -1152
WIRE 288 -1136 288 -1152
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 192 -1024 192 -1056
WIRE 288 -1024 288 -1056
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 288 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL Opamps\\OP291 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 192 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 192 -1152 +V
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 288 -1152 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 288 -1024 0
FLAG 192 -1024 0
TEXT 768 -936 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\1b1bbd92b8ac_Draft4.asc
* Generated by LTspice 26.0.1 for Windows.
C1 vout 0 50f
V2 N001 0 1.8
M1 N001 vin vout N001 PMOS l=180nm w=810nm
V1 vin 0 PULSE(0 1.8 0 0.1n 0.1n 10n 20n)
M2 vout vin 0 0 NMOS l=180nm w=270nm
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 80n 0 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 48 112 48
WIRE 304 48 208 48
WIRE 304 64 304 48
WIRE 208 96 208 48
WIRE 208 96 112 96
WIRE 64 128 -48 128
WIRE -48 144 -48 128
WIRE 112 176 112 144
WIRE 240 176 112 176
WIRE 240 192 240 176
WIRE 112 208 112 176
WIRE 208 256 112 256
WIRE 64 288 64 128
WIRE 208 304 208 256
IOPIN 240 176 Out
IOPIN -48 128 In
SYMBOL voltage -48 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1.8 0 0.1n 0.1n 10n 20n)
SYMBOL nmos4 64 208 R0
SYMATTR InstName M2
SYMATTR Value2 l=180nm w=270nm
SYMBOL cap 224 192 R0
SYMATTR InstName C1
SYMATTR Value 50f
SYMBOL pmos4 64 48 R0
SYMATTR InstName M1
SYMATTR Value2 l=180nm w=810nm
SYMBOL voltage 304 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.8
FLAG -48 224 0
FLAG 112 304 0
FLAG 240 256 0
FLAG 208 304 0
FLAG 304 144 0
FLAG 240 176 vout
FLAG -48 128 vin
TEXT -136 328 Left 2 !.tran 0 80n 0 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\566458f84f4f_dc_ideal.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc lin V2 0 1.8 0.001
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
XU1 VREF_in VREF_out N001 0 VREF_out level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 N001 0 1.8
V2 VREF_in 0 1.25
.op
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 -128 -240 -128
WIRE 352 -64 -64 -64
WIRE 112 80 112 -128
WIRE -240 96 -240 -128
WIRE -64 96 -64 -64
WIRE 0 96 -64 96
WIRE 80 96 0 96
WIRE 288 112 144 112
WIRE 352 112 352 -64
WIRE 352 112 288 112
WIRE 0 128 -64 128
WIRE 80 128 0 128
WIRE -64 208 -64 128
WIRE -240 320 -240 176
WIRE -64 320 -64 288
WIRE -64 320 -240 320
WIRE -240 336 -240 320
WIRE 112 352 112 144
SYMBOL OpAmps\\UniversalOpAmp 112 112 R0
SYMATTR InstName U1
SYMBOL voltage -64 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.25
SYMBOL voltage -240 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
FLAG 112 352 0
FLAG -240 336 0
FLAG 0 128 VREF_in
FLAG 288 112 VREF_out
FLAG 0 96 V_feedback
TEXT 336 184 Left 2 !.op
TEXT 336 216 Left 2 ;.dc lin V2 0 1.8 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6990.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N001 0 N003 N004 N001 OUT LTC6990 ;pnba OE)GND)SET)DIV)V+)OUT
R1 N001 N004 1Meg
R2 N004 0 887K
R3 N003 0 196K
R4 N003 N002 261K
V1 N001 0 5
V2 N002 0 PULSE(2 1 5m 20m 20m 5m 50m)
* TimerBlox\n500Hz to 2KHz Voltage Controlled Oscillator\nControl Voltage Ramps from 2V to 1V\nStartup Modeled
.tran 60m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6990.asy)
.lib LTC6990.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
WIRE 512 32 80 32
WIRE 80 80 80 32
WIRE 112 80 80 80
WIRE 400 80 336 80
WIRE 112 160 96 160
WIRE 384 160 336 160
WIRE 512 160 512 32
WIRE 512 160 384 160
WIRE 384 176 384 160
WIRE 512 176 512 160
WIRE -336 240 -352 240
WIRE -96 240 -256 240
WIRE 48 240 -16 240
WIRE 112 240 48 240
WIRE 352 240 336 240
WIRE 48 256 48 240
WIRE 352 272 352 240
WIRE 384 272 384 256
WIRE 384 272 352 272
WIRE 512 272 512 256
WIRE 384 288 384 272
WIRE 48 352 48 336
WIRE 384 384 384 368
FLAG 512 272 0
FLAG -352 240 0
FLAG 96 160 0
FLAG 400 80 OUT
FLAG 48 352 0
FLAG 384 384 0
SYMBOL LTC6990 224 160 R0
SYMATTR InstName U1
SYMBOL res 368 160 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL res 368 272 R0
SYMATTR InstName R2
SYMATTR Value 887K
SYMBOL res 32 240 R0
SYMATTR InstName R3
SYMATTR Value 196K
SYMBOL res 0 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 261K
SYMBOL voltage 512 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -240 240 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(2 1 5m 20m 20m 5m 50m)
SYMATTR InstName V2
TEXT 224 24 Bottom 2 ;TimerBlox\n500Hz to 2KHz Voltage Controlled Oscillator\nControl Voltage Ramps from 2V to 1V\nStartup Modeled
TEXT 488 368 Left 2 !.tran 60m startup
* Z:\tmp\asc_dec_bjh7r6w2\0266092db54e_lpf_2nd_ord_1khz_cutoff_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 0 100n
C2 N003 0 100n
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 48 112 -32 112
WIRE 208 112 128 112
WIRE 256 112 208 112
WIRE 384 112 336 112
WIRE 512 112 384 112
WIRE 208 144 208 112
WIRE 384 144 384 112
WIRE 512 144 512 112
WIRE 208 256 208 208
WIRE 384 256 384 208
WIRE 512 256 512 208
SYMBOL cap 192 144 R0
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL cap 368 144 R0
SYMATTR InstName C2
SYMATTR Value 100n
FLAG 208 256 0
FLAG 384 256 0
FLAG 512 256 0