* Z:\home\khalils\Downloads\files\data\raw_asc\ed2358e71beb_74HC4046A_H.asc
* Generated by LTspice 26.0.1 for Windows.
A1 SIG1 0 0 0 0 0 N002 0 BUF ref={vcc1/2}
A11 COMP1 0 0 0 0 0 N009 0 BUF ref={vcc1/2}
M1 PC2 N041 0 0 MHCNEN W=250u L=2.5u
M2 PC2 N034 VCC VCC MHCPEN W=500u L=2.4u
A3 N003 0 0 0 0 N004 0 0 BUF td={0.5*tdel1} tripdt={tripdt1}
A23 N007 0 0 0 0 0 N008 0 BUF td={tdel1} tripdt={tripdt1} ref=0.5 vhigh={vcc1}
A13 N010 0 0 0 0 N005 0 0 BUF td={0.5*tdel1} tripdt={tripdt1}
A14 N005 0 0 0 0 N024 0 0 BUF td={0.5*tdel1} tripdt={tripdt1}
A4 N004 0 0 0 0 N016 0 0 BUF td={0.5*tdel1} tripdt={tripdt1}
A39 N020 0 0 0 0 N021 0 0 BUF td={0.5*tdel1} tripdt={tripdt1}
A81 N027 0 0 0 0 N032 0 0 BUF td={tdel1} tripdt={tripdt1}
A82 N032 0 0 0 0 N033 0 0 BUF td={tdel1} tripdt={tripdt1} ref=0.5 Vhigh={vcc1}
A73 N035 0 0 0 0 N031 0 0 BUF td={0.5*tdel1} tripdt={tripdt1}
A72 N036 0 0 0 0 N035 0 0 BUF td={0.5*tdel1} tripdt={tripdt1}
A31 0 N011 0 N016 0 N012 0 0 AND td={tdel1} tripdt={tripdt1}
A32 0 N024 0 N020 0 N025 0 0 AND td={tdel1} tripdt={tripdt1}
A33 0 N012 0 N017 0 N018 0 0 AND td={tdel1} tripdt={tripdt1}
A35 0 N012 0 N018 0 N019 0 0 AND td={1.2*tdel1} tripdt={tripdt1}
A34 0 N018 0 N025 0 N017 0 0 AND td={tdel1} tripdt={tripdt1}
A36 0 N017 0 N025 0 N026 0 0 AND td={1.2*tdel1} tripdt={tripdt1}
A37 0 N019 0 N011 0 N020 0 0 AND td={tdel1} tripdt={tripdt1}
A38 0 N020 0 N026 0 N011 0 0 AND td={tdel1} tripdt={tripdt1}
A51 0 N016 0 N027 0 N028 0 0 AND td={tdel1} tripdt={tripdt1}
A52 0 N028 N031 N030 0 N027 0 0 AND td={tdel1} tripdt={tripdt1}
A53 0 N028 0 N029 0 N030 0 0 AND td={tdel1} tripdt={tripdt1}
A54 0 N030 0 N031 0 N029 0 0 AND td={tdel1} tripdt={tripdt1}
A61 0 N038 N031 N037 0 N039 0 0 AND td={tdel1} tripdt={tripdt1}
A64 0 N042 0 N037 0 N038 0 0 AND td={tdel1} tripdt={tripdt1}
A63 0 N031 0 N038 0 N042 0 0 AND td={tdel1} tripdt={tripdt1}
A62 0 N039 N024 0 0 N037 0 0 AND td={tdel1} tripdt={tripdt1}
A84 0 N027 0 N039 0 N043 0 0 AND td={tdel1} tripdt={tripdt1}
A71 N030 N028 0 N037 N038 N036 0 0 AND td={tdel1} tripdt={tripdt1}
A22 N006 0 0 0 0 N007 0 0 BUF td={tdel1} tripdt={tripdt1}
A2 N002 0 0 0 0 N003 0 0 BUF td={0.5*tdel1} tripdt={tripdt1}
A12 N009 0 0 0 0 N010 0 0 BUF td={0.5*tdel1} tripdt={tripdt1}
A41 N022 0 0 0 0 0 N023 0 BUF td={tdel1} tripdt={tripdt1} ref=0.5 vhigh={vcc1}
A86 N044 0 0 0 0 0 N045 0 BUF td={tdel1} tripdt={tripdt1} ref=0.5 vhigh={vcc1}
A85 N043 0 0 0 0 N044 0 0 BUF td={0.5*tdel1} tripdt={tripdt1}
A83 N039 0 0 0 0 N040 0 0 BUF td={2*tdel1} tripdt={tripdt1} ref=0.5 Vhigh={vcc1}
A18 nf 0 0 0 0 0 N015 0 MODULATOR mark={fmax} space={fmin}
A19 N015 0 0 0 0 0 N014 0 BUF ref=0 Vhigh={vcc1} vlow=0 td={tdel1} tripdt={tripdt1}
R10 N033 N034 1k
C6 VCC N034 10p
R11 N040 N041 1k
C7 N041 0 10p
A21 0 N004 0 N005 0 N006 0 0 XOR td={tdel1} tripdt={tripdt1}
A40 N021 0 0 0 0 N022 0 0 BUF td={0.5*tdel1} tripdt={tripdt1}
B1 nf 0 V=Table(V(VCOin), 0,0, 0.9, 0, {vcc1-0.9}, 1)
R7 VCOin 0 1G
R13 VCOout N013 100
A5 0 N014 0 INH 0 0 N013 0 OR ref={vcc1/2} Vhigh={vcc1} vlow=0
R4 INH 0 1G
R3 C1A 0 1G
R9 R2 0 1G
R15 R1 0 1G
R17 C1B 0 1G
R16 VCOin 0 1G
R18 C1A 0 1G
R19 R2 0 1G
R20 R1 0 1G
R21 C1B 0 1G
B2 SIG1 0 V=V(vcch,0)*(1-tanh(v(sig,vcch)))
B3 VCCH 0 V=0.5*V(vcc,0)
R23 SIG SIG1 1e6
B4 COMP1 0 V=V(vcch,0)*(1-tanh(v(comp,vcch)))
R24 COMP COMP1 1e6
R1 0 VSS 1G
R2 0 VSS 1G
R5 N008 PC1 100
R6 N023 PC3 100
R8 N045 PCP 100
B5 N001 0 V=limit(0,V(vcoin,0),{vcc1-2})
R12 N001 DEMout 50
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
************************************************
* NOMINAL N-Channel Transistor *
* UCB-3 Parameter Set *
* HIGH-SPEED CMOS Logic Family *
* 10-Jan.-1995 *
************************************************
.Model MHCNEN NMOS (
+LEVEL = 3
+KP = 45.3E-6
+VTO = 0.72
+TOX = 51.5E-9
+NSUB = 2.8E15
+GAMMA = 0.94e-6
+PHI = 0.65
+VMAX = 150E3
+RS = 40
+RD = 40
+XJ = 0.11E-6
+LD = 0.52E-6
+DELTA = 0.315
+THETA = 0.054
+ETA = 0.025
+KAPPA = 0.0
+WD = 0.0 )
***********************************************
* NOMINAL P-Channel transistor *
* UCB-3 Parameter Set *
* HIGH-SPEED CMOS Logic Family *
* 10-Jan.-1995 *
***********************************************
.Model MHCPEN PMOS (
+LEVEL = 3
+KP = 22.1E-6
+VTO = -0.71
+TOX = 51.5E-9
+NSUB = 3.3E16
+GAMMA = 0.92e-6
+PHI = 0.65
+VMAX = 970E3
+RS = 80
+RD = 80
+XJ = 0.63E-6
+LD = 0.23E-6
+DELTA = 2.24
+THETA = 0.108
+ETA = 0.322
+KAPPA = 0.0
+WD = 0.0 )
* VCC/2
* Buffered VCOin
* x_delay
* x_delay
* x_delay
* x_delay
* "x_delay" means this gate required a different delay\nto solve a self oscillation problem caused by the feedback.
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2124 1976
WIRE -576 448 -608 448
WIRE -576 464 -576 448
WIRE -576 560 -576 544
WIRE -560 -208 -592 -208
WIRE -560 672 -560 608
WIRE -560 768 -560 752
WIRE -560 880 -608 880
WIRE -560 992 -608 992
WIRE -560 1104 -608 1104
WIRE -560 1216 -608 1216
WIRE -560 1328 -608 1328
WIRE -544 320 -608 320
WIRE -528 64 -592 64
WIRE -528 160 -592 160
WIRE -448 880 -480 880
WIRE -448 992 -480 992
WIRE -448 1104 -480 1104
WIRE -448 1216 -480 1216
WIRE -448 1328 -480 1328
WIRE -432 -208 -480 -208
WIRE -432 -176 -432 -208
WIRE -432 -64 -432 -96
WIRE -432 320 -464 320
WIRE -432 608 -560 608
WIRE -400 608 -432 608
WIRE -368 -208 -432 -208
WIRE -368 64 -464 64
WIRE -368 160 -464 160
WIRE -320 320 -368 320
WIRE -288 352 -368 352
WIRE -288 448 -576 448
WIRE -288 448 -288 352
WIRE -272 880 -320 880
WIRE -272 992 -320 992
WIRE -272 1104 -320 1104
WIRE -272 1216 -320 1216
WIRE -272 1328 -320 1328
WIRE -256 64 -304 64
WIRE -256 160 -304 160
WIRE -224 320 -256 320
WIRE -224 640 -256 640
WIRE -224 640 -224 320
WIRE -160 880 -192 880
WIRE -160 992 -192 992
WIRE -160 1104 -192 1104
WIRE -160 1216 -192 1216
WIRE -160 1328 -192 1328
WIRE -144 64 -192 64
WIRE -144 352 -144 64
WIRE -112 160 -192 160
WIRE -112 160 -112 96
WIRE -112 448 -112 160
WIRE -80 -208 -128 -208
WIRE -64 352 -144 352
WIRE -64 448 -112 448
WIRE 32 -208 0 -208
WIRE 32 -176 32 -208
WIRE 32 -64 32 -96
WIRE 48 448 0 448
WIRE 48 1312 48 448
WIRE 80 352 0 352
WIRE 80 688 80 352
WIRE 96 -208 32 -208
WIRE 112 928 112 832
WIRE 112 1008 112 928
WIRE 112 1088 112 1008
WIRE 112 1184 112 1088
WIRE 128 320 128 240
WIRE 128 560 128 480
WIRE 128 752 128 720
WIRE 128 816 128 768
WIRE 128 896 128 848
WIRE 128 1168 128 1120
WIRE 128 1232 128 1200
WIRE 128 1296 128 1248
WIRE 160 320 128 320
WIRE 160 352 80 352
WIRE 160 448 48 448
WIRE 160 480 128 480
WIRE 160 688 80 688
WIRE 160 720 128 720
WIRE 160 816 128 816
WIRE 160 832 112 832
WIRE 160 848 128 848
WIRE 160 1008 112 1008
WIRE 160 1168 128 1168
WIRE 160 1184 112 1184
WIRE 160 1200 128 1200
WIRE 160 1296 128 1296
WIRE 160 1312 48 1312
WIRE 256 720 224 720
WIRE 256 768 128 768
WIRE 256 768 256 720
WIRE 256 1200 224 1200
WIRE 256 1248 128 1248
WIRE 256 1248 256 1200
WIRE 272 1008 224 1008
WIRE 288 752 128 752
WIRE 288 848 224 848
WIRE 288 848 288 752
WIRE 288 1232 128 1232
WIRE 288 1328 224 1328
WIRE 288 1328 288 1232
WIRE 304 320 304 272
WIRE 304 352 224 352
WIRE 304 352 304 320
WIRE 304 480 224 480
WIRE 304 512 304 480
WIRE 320 848 288 848
WIRE 320 848 320 688
WIRE 320 1200 256 1200
WIRE 320 1360 320 1200
WIRE 336 384 336 352
WIRE 336 448 336 400
WIRE 352 720 256 720
WIRE 352 768 352 720
WIRE 352 832 352 800
WIRE 352 896 128 896
WIRE 352 896 352 848
WIRE 352 1120 128 1120
WIRE 352 1152 352 1120
WIRE 352 1216 352 1168
WIRE 352 1328 288 1328
WIRE 352 1328 352 1248
WIRE 368 320 304 320
WIRE 368 352 336 352
WIRE 368 448 336 448
WIRE 368 480 304 480
WIRE 384 768 352 768
WIRE 384 800 352 800
WIRE 384 896 352 896
WIRE 384 928 112 928
WIRE 384 1088 112 1088
WIRE 384 1120 352 1120
WIRE 384 1216 352 1216
WIRE 384 1248 352 1248
WIRE 464 352 432 352
WIRE 464 400 336 400
WIRE 464 400 464 352
WIRE 480 384 336 384
WIRE 480 480 432 480
WIRE 480 480 480 384
WIRE 480 800 448 800
WIRE 480 848 352 848
WIRE 480 848 480 800
WIRE 480 1120 448 1120
WIRE 480 1168 352 1168
WIRE 480 1168 480 1120
WIRE 496 -176 496 -208
WIRE 496 -64 496 -96
WIRE 512 272 304 272
WIRE 512 320 512 272
WIRE 512 832 352 832
WIRE 512 928 448 928
WIRE 512 928 512 832
WIRE 512 1152 352 1152
WIRE 512 1248 448 1248
WIRE 512 1248 512 1152
WIRE 544 -208 496 -208
WIRE 544 320 512 320
WIRE 544 352 464 352
WIRE 544 480 480 480
WIRE 544 512 304 512
WIRE 560 64 -144 64
WIRE 560 96 -112 96
WIRE 560 1008 336 1008
WIRE 656 800 480 800
WIRE 656 960 624 960
WIRE 656 960 656 800
WIRE 656 1024 624 1024
WIRE 656 1248 512 1248
WIRE 656 1248 656 1024
WIRE 672 -208 624 -208
WIRE 672 416 672 384
WIRE 672 480 672 432
WIRE 672 720 352 720
WIRE 672 976 624 976
WIRE 672 976 672 720
WIRE 672 1008 624 1008
WIRE 672 1328 352 1328
WIRE 672 1328 672 1008
WIRE 704 352 608 352
WIRE 704 384 672 384
WIRE 704 480 672 480
WIRE 704 512 608 512
WIRE 704 688 320 688
WIRE 704 832 704 688
WIRE 704 1264 704 832
WIRE 768 832 704 832
WIRE 800 384 768 384
WIRE 800 432 672 432
WIRE 800 432 800 384
WIRE 816 1296 816 1088
WIRE 816 1360 320 1360
WIRE 816 1360 816 1296
WIRE 832 240 128 240
WIRE 832 416 672 416
WIRE 832 416 832 240
WIRE 832 512 768 512
WIRE 832 512 832 416
WIRE 848 1264 704 1264
WIRE 848 1296 816 1296
WIRE 864 384 800 384
WIRE 864 560 128 560
WIRE 864 560 864 384
WIRE 864 832 832 832
WIRE 864 1088 816 1088
WIRE 912 -176 912 -208
WIRE 912 -64 912 -96
WIRE 960 384 864 384
WIRE 992 832 928 832
WIRE 992 1088 928 1088
WIRE 1024 -208 912 -208
WIRE 1024 1296 912 1296
WIRE 1056 96 640 96
WIRE 1056 384 1024 384
WIRE 1088 736 1088 720
WIRE 1088 832 1072 832
WIRE 1088 832 1088 800
WIRE 1088 1088 1072 1088
WIRE 1088 1104 1088 1088
WIRE 1088 1184 1088 1168
WIRE 1120 832 1088 832
WIRE 1120 1088 1088 1088
WIRE 1136 1296 1088 1296
WIRE 1152 96 1120 96
WIRE 1152 384 1120 384
WIRE 1168 720 1088 720
WIRE 1168 816 1168 720
WIRE 1168 960 1168 912
WIRE 1168 1008 1168 960
WIRE 1168 1184 1088 1184
WIRE 1168 1184 1168 1104
WIRE 1216 -176 1184 -176
WIRE 1216 -80 1184 -80
WIRE 1232 384 1216 384
WIRE 1232 1296 1200 1296
WIRE 1248 96 1216 96
WIRE 1264 720 1168 720
WIRE 1264 960 1168 960
WIRE 1264 1184 1168 1184
WIRE 1328 -176 1296 -176
WIRE 1328 -80 1296 -80
WIRE 1328 -80 1328 -176
WIRE 1376 -80 1328 -80
WIRE 1376 96 1328 96
WIRE 1376 384 1312 384
WIRE 1376 1296 1312 1296
FLAG 1376 384 PC3
IOPIN 1376 384 Out
FLAG 1264 720 VCC
IOPIN 1264 720 In
FLAG 1264 960 PC2
IOPIN 1264 960 Out
FLAG 1376 1296 PCP
IOPIN 1376 1296 Out
FLAG -592 64 SIG1
FLAG -592 160 COMP1
FLAG 1376 96 PC1
IOPIN 1376 96 Out
FLAG -432 608 nf
FLAG -560 768 0
FLAG -608 880 VCOin
IOPIN -608 880 In
FLAG -608 320 VCOout
IOPIN -608 320 Out
FLAG -576 560 0
FLAG -608 448 INH
IOPIN -608 448 In
FLAG -608 1216 C1A
IOPIN -608 1216 In
FLAG -448 1216 0
FLAG -608 1104 R2
IOPIN -608 1104 In
FLAG -448 1104 0
FLAG -608 992 R1
IOPIN -608 992 In
FLAG -448 992 0
FLAG -448 880 0
FLAG -608 1328 C1B
IOPIN -608 1328 In
FLAG -448 1328 0
FLAG -320 880 VCOin
FLAG -320 1216 C1A
FLAG -160 1216 0
FLAG -320 1104 R2
FLAG -160 1104 0
FLAG -320 992 R1
FLAG -160 992 0
FLAG -160 880 0
FLAG -320 1328 C1B
FLAG -160 1328 0
FLAG 912 -64 0
FLAG 1024 -208 VCCH
FLAG -432 -64 0
FLAG -592 -208 SIG
IOPIN -592 -208 In
FLAG -368 -208 SIG1
FLAG 32 -64 0
FLAG -128 -208 COMP
IOPIN -128 -208 In
FLAG 96 -208 COMP1
FLAG 1264 1184 0
FLAG 1376 -80 VSS
IOPIN 1376 -80 Out
FLAG 1184 -80 0
FLAG 1184 -176 0
FLAG 496 -64 0
FLAG 672 -208 DEMout
IOPIN 672 -208 Out
SYMBOL Digital\\buf1 -528 0 R0
WINDOW 3 21 90 Left 0
SYMATTR Value ref={vcc1/2}
SYMATTR InstName A1
SYMBOL Digital\\buf1 -528 96 R0
WINDOW 3 19 87 Left 0
SYMATTR Value ref={vcc1/2}
SYMATTR InstName A11
SYMBOL nmos 1120 1008 R0
SYMATTR InstName M1
SYMATTR Value MHCNEN
SYMATTR Value2 W=250u L=2.5u
SYMBOL pmos 1120 912 M180
SYMATTR InstName M2
SYMATTR Value MHCPEN
SYMATTR Value2 W=500u L=2.4u
SYMBOL Digital\\inv -256 0 R0
WINDOW 3 -52 103 Invisible 0
SYMATTR Value td={0.5*tdel1} tripdt={tripdt1}
SYMATTR InstName A3
SYMBOL Digital\\buf1 1152 32 R0
WINDOW 3 -47 95 Invisible 0
WINDOW 39 -74 110 Left 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR SpiceLine vhigh={vcc1}
SYMATTR InstName A23
SYMATTR Value2 ref=0.5
SYMBOL Digital\\inv -256 96 R0
WINDOW 3 -52 103 Invisible 0
SYMATTR Value td={0.5*tdel1} tripdt={tripdt1}
SYMATTR InstName A13
SYMBOL Digital\\inv -64 384 R0
WINDOW 3 -52 103 Invisible 0
SYMATTR Value td={0.5*tdel1} tripdt={tripdt1}
SYMATTR InstName A14
SYMBOL Digital\\inv -64 288 R0
WINDOW 3 -52 103 Invisible 0
SYMATTR Value td={0.5*tdel1} tripdt={tripdt1}
SYMATTR InstName A4
SYMBOL Digital\\inv 960 320 R0
WINDOW 3 -52 103 Invisible 0
SYMATTR Value td={0.5*tdel1} tripdt={tripdt1}
SYMATTR InstName A39
SYMBOL Digital\\inv 768 768 R0
WINDOW 3 -52 103 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A81
SYMBOL Digital\\inv 864 768 R0
WINDOW 3 -52 103 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A82
SYMATTR Value2 ref=0.5
SYMATTR SpiceLine Vhigh={vcc1}
SYMBOL Digital\\inv 224 944 M0
WINDOW 3 -52 103 Invisible 0
SYMATTR Value td={0.5*tdel1} tripdt={tripdt1}
SYMATTR InstName A73
SYMBOL Digital\\inv 336 944 M0
WINDOW 3 -52 103 Invisible 0
SYMATTR Value td={0.5*tdel1} tripdt={tripdt1}
SYMATTR InstName A72
SYMBOL Digital\\and 192 272 R0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A31
SYMBOL Digital\\and 192 400 R0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A32
SYMBOL Digital\\and 400 272 R0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A33
SYMBOL Digital\\and 576 272 R0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={1.2*tdel1} tripdt={tripdt1}
SYMATTR InstName A35
SYMBOL Digital\\and 400 400 R0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A34
SYMBOL Digital\\and 576 432 R0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={1.2*tdel1} tripdt={tripdt1}
SYMATTR InstName A36
SYMBOL Digital\\and 736 304 R0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A37
SYMBOL Digital\\and 736 432 R0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A38
SYMBOL Digital\\and 192 640 R0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A51
SYMBOL Digital\\and 192 768 R0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A52
SYMBOL Digital\\and 416 720 R0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A53
SYMBOL Digital\\and 416 848 R0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A54
SYMBOL Digital\\and 192 1120 R0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A61
SYMBOL Digital\\and 416 1168 R0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A64
SYMBOL Digital\\and 416 1040 R0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A63
SYMBOL Digital\\and 192 1248 R0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A62
SYMBOL Digital\\and 880 1216 R0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A84
SYMBOL Digital\\and 592 928 M0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A71
SYMBOL Digital\\inv 1056 32 R0
WINDOW 3 -52 103 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A22
SYMBOL Digital\\inv -368 0 R0
WINDOW 3 -52 103 Invisible 0
SYMATTR Value td={0.5*tdel1} tripdt={tripdt1}
SYMATTR InstName A2
SYMBOL Digital\\inv -368 96 R0
WINDOW 3 -52 103 Invisible 0
SYMATTR Value td={0.5*tdel1} tripdt={tripdt1}
SYMATTR InstName A12
SYMBOL Digital\\buf1 1152 320 R0
WINDOW 3 -47 95 Invisible 0
WINDOW 39 -87 108 Left 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR SpiceLine vhigh={vcc1}
SYMATTR InstName A41
SYMATTR Value2 ref=0.5
SYMBOL Digital\\buf1 1136 1232 R0
WINDOW 3 -47 95 Invisible 0
WINDOW 39 -63 111 Left 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR SpiceLine vhigh={vcc1}
SYMATTR InstName A86
SYMATTR Value2 ref=0.5
SYMBOL Digital\\inv 1024 1232 R0
WINDOW 3 -52 103 Invisible 0
SYMATTR Value td={0.5*tdel1} tripdt={tripdt1}
SYMATTR InstName A85
SYMBOL Digital\\inv 864 1024 R0
WINDOW 3 -52 103 Invisible 0
SYMATTR Value td={2*tdel1} tripdt={tripdt1}
SYMATTR InstName A83
SYMATTR Value2 ref=0.5
SYMATTR SpiceLine Vhigh={vcc1}
SYMBOL SpecialFunctions\\modulate -400 608 R0
WINDOW 3 -98 114 Left 0
SYMATTR Value mark={fmax} space={fmin}
SYMATTR InstName A18
SYMBOL Digital\\buf1 -256 256 M0
WINDOW 3 -24 -6 Left 0
SYMATTR Value ref=0 Vhigh={vcc1} vlow=0
SYMATTR InstName A19
SYMATTR Value2 td={tdel1} tripdt={tripdt1}
SYMBOL res 976 848 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R10
SYMATTR Value 1k
SYMBOL cap 1072 736 R0
WINDOW 3 24 57 Left 0
SYMATTR Value 10p
SYMATTR InstName C6
SYMBOL res 976 1104 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R11
SYMATTR Value 1k
SYMBOL cap 1072 1104 R0
WINDOW 3 24 57 Left 0
SYMATTR Value 10p
SYMATTR InstName C7
SYMBOL Digital\\xor 608 16 R0
WINDOW 3 16 52 Invisible 0
SYMATTR Value td={tdel1} tripdt={tripdt1}
SYMATTR InstName A21
SYMBOL Digital\\inv 1056 320 R0
WINDOW 3 -52 103 Invisible 0
SYMATTR Value td={0.5*tdel1} tripdt={tripdt1}
SYMATTR InstName A40
SYMBOL bv -560 656 R0
WINDOW 3 31 120 Left 0
SYMATTR Value V=Table(V(VCOin), 0,0, 0.9, 0, {vcc1-0.9}, 1)
SYMATTR InstName B1
SYMBOL res -576 896 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R7
SYMATTR Value 1G
SYMBOL res -560 336 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R13
SYMATTR Value 100
SYMBOL Digital\\or -400 272 M0
WINDOW 3 -94 126 Left 0
SYMATTR Value ref={vcc1/2} Vhigh={vcc1} vlow=0
SYMATTR InstName A5
SYMBOL res -592 448 R0
SYMATTR InstName R4
SYMATTR Value 1G
SYMBOL res -576 1232 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R3
SYMATTR Value 1G
SYMBOL res -576 1120 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R9
SYMATTR Value 1G
SYMBOL res -576 1008 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R15
SYMATTR Value 1G
SYMBOL res -576 1344 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R17
SYMATTR Value 1G
SYMBOL res -288 896 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R16
SYMATTR Value 1G
SYMBOL res -288 1232 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R18
SYMATTR Value 1G
SYMBOL res -288 1120 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R19
SYMATTR Value 1G
SYMBOL res -288 1008 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R20
SYMATTR Value 1G
SYMBOL res -288 1344 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R21
SYMATTR Value 1G
SYMBOL bv -432 -192 R0
SYMATTR InstName B2
SYMATTR Value V=V(vcch,0)*(1-tanh(v(sig,vcch)))
SYMBOL bv 912 -192 R0
SYMATTR InstName B3
SYMATTR Value V=0.5*V(vcc,0)
SYMBOL res -576 -192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R23
SYMATTR Value 1e6
SYMBOL bv 32 -192 R0
SYMATTR InstName B4
SYMATTR Value V=V(vcch,0)*(1-tanh(v(comp,vcch)))
SYMBOL res -96 -192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R24
SYMATTR Value 1e6
SYMBOL res 1200 -64 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1G
SYMBOL res 1200 -160 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R2
SYMATTR Value 1G
SYMBOL res 1232 112 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R5
SYMATTR Value 100
SYMBOL res 1216 400 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R6
SYMATTR Value 100
SYMBOL res 1216 1312 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R8
SYMATTR Value 100
SYMBOL bv 496 -192 R0
SYMATTR InstName B5
SYMATTR Value V=limit(0,V(vcoin,0),{vcc1-2})
SYMBOL res 528 -192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R12
SYMATTR Value 50
TEXT 1544 -64 Left 0 !************************************************\n*         NOMINAL N-Channel Transistor         *\n*            UCB-3 Parameter Set               *\n*         HIGH-SPEED CMOS Logic Family         *\n*                10-Jan.-1995                  *\n************************************************\n.Model MHCNEN NMOS (\n+LEVEL = 3\n+KP    = 45.3E-6\n+VTO   = 0.72\n+TOX   = 51.5E-9\n+NSUB  = 2.8E15\n+GAMMA = 0.94e-6\n+PHI   = 0.65\n+VMAX  = 150E3\n+RS    = 40\n+RD    = 40\n+XJ    = 0.11E-6\n+LD    = 0.52E-6\n+DELTA = 0.315\n+THETA = 0.054\n+ETA   = 0.025\n+KAPPA = 0.0\n+WD    = 0.0 )\n \n***********************************************\n*        NOMINAL P-Channel transistor         *\n*           UCB-3 Parameter Set               *\n*         HIGH-SPEED CMOS Logic Family        *\n*               10-Jan.-1995                  *\n***********************************************\n.Model MHCPEN PMOS (\n+LEVEL = 3\n+KP    = 22.1E-6\n+VTO   = -0.71\n+TOX   = 51.5E-9\n+NSUB  = 3.3E16\n+GAMMA = 0.92e-6\n+PHI   = 0.65\n+VMAX  = 970E3\n+RS    = 80\n+RD    = 80\n+XJ    = 0.63E-6\n+LD    = 0.23E-6\n+DELTA = 2.24\n+THETA = 0.108\n+ETA   = 0.322\n+KAPPA = 0.0\n+WD    = 0.0 )
TEXT 1016 -152 Left 0 ;VCC/2
TEXT 600 -152 Left 0 ;Buffered VCOin
TEXT 528 272 Left 0 ;x_delay
TEXT 528 424 Left 0 ;x_delay
TEXT 160 1048 Left 0 ;x_delay
TEXT 272 1048 Left 0 ;x_delay
TEXT 328 608 Left 0 ;"x_delay" means this gate required a different delay\nto solve a self oscillation problem caused by the feedback.