Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0736ab00e592_6275.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6275.asy)
V1 +V 0 15
V2 -V 0 -15
R2 N002 N001 1K
XU1 0 N002 +V -V N003 LT6275 ;pnba In+)In-)V+)V-)OUT
V3 N001 0 SINE(0 10 3Meg)
R1 N003 N002 1K
.tran 10u
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -112 0 -112
WIRE 256 -112 224 -112
WIRE 288 -112 256 -112
WIRE 416 -112 368 -112
WIRE 0 -96 0 -112
WIRE -336 -80 -336 -96
WIRE -176 -80 -176 -96
WIRE 0 0 0 -16
WIRE 336 0 336 -16
WIRE -336 16 -336 0
WIRE -176 16 -176 0
WIRE 256 16 256 -112
WIRE 304 16 256 16
WIRE 416 32 416 -112
WIRE 416 32 368 32
WIRE 304 48 288 48
WIRE 336 80 336 64
SYMBOL voltage -176 -96 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 384 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 0 -112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 10 3Meg)
SYMBOL voltage -336 -96 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL LT6275 336 32 R0
SYMATTR InstName U1
SYMBOL res 240 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
FLAG -336 16 0
FLAG -176 16 0
FLAG -336 -96 +V
FLAG -176 -96 -V
FLAG 336 -16 +V
FLAG 336 80 -V
FLAG 0 0 0
FLAG 288 48 0
TEXT 432 136 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\3e0554961593_Z-VAR.asc
* Generated by LTspice 26.0.1 for Windows.
V1 a 0
D1 0 b BZX84C12L
R4 b 0 1k
R1 b a 50
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 8V 18V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -256 256 -256
WIRE 368 -256 272 -256
WIRE 576 -256 448 -256
WIRE 672 -256 576 -256
WIRE 256 -224 256 -256
WIRE 672 -224 672 -256
WIRE 576 -208 576 -256
WIRE 256 -96 256 -144
WIRE 416 -96 256 -96
WIRE 576 -96 576 -144
WIRE 576 -96 416 -96
WIRE 672 -96 672 -144
WIRE 672 -96 576 -96
WIRE 416 -80 416 -96
SYMBOL Misc\\EuropeanResistor 656 -240 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL zener 592 -144 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BZX84C12L
SYMBOL voltage 256 -240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL Misc\\EuropeanResistor 464 -272 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
FLAG 416 -80 0
FLAG 672 -256 b
FLAG 272 -256 a
TEXT 232 -64 Left 2 !.dc V1 8V 18V
* Z:\home\khalils\Downloads\files\data\raw_asc\897c122cd02b_320531-real_channel.asc
* Generated by LTspice 26.0.1 for Windows.
* TODO: Include power supply
* Convergence Aid
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5676R.asy)
V2 Vcc 0 5
V3 0 Vee 5
V1 N001 0 SINE(0 5 1)
XU2 N002 N003 Vcc Vee Vout TCA0372 ;pnba In+)In-)V+)V-)OUT
XU1 N001 Vcc 0 N002 AD5676R Gain=2 ;pnba Vdac)Vdd)GND)Vout
R_coil Vout N003 0.5
R1 N003 0 2.45
.include TCA0372.mod
.tran 0 2 0
.options gmin=1e-11 abstol=1e-11
.lib AD5676R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1596 680
WIRE 112 -48 112 -96
WIRE 608 -48 608 -80
WIRE 1008 80 1008 64
WIRE 112 96 112 32
WIRE 112 96 48 96
WIRE 480 96 320 96
WIRE 976 96 848 96
WIRE 48 112 48 96
WIRE 1120 112 1040 112
WIRE 1152 112 1120 112
WIRE 976 128 928 128
WIRE 112 144 112 96
WIRE 320 144 320 96
WIRE 1120 144 1120 112
WIRE 1008 160 1008 144
WIRE 928 256 928 128
WIRE 1120 256 1120 224
WIRE 1120 256 928 256
WIRE 112 272 112 224
WIRE 320 272 320 224
WIRE 608 272 608 240
WIRE 1120 288 1120 256
WIRE 1120 400 1120 368
IOPIN 1152 112 Out
IOPIN 608 -80 In
IOPIN 112 -96 In
IOPIN 112 272 In
IOPIN 1008 160 Out
IOPIN 1008 64 Out
SYMBOL OpAmps\\opamp2 1008 176 M180
SYMATTR InstName U2
SYMATTR Value TCA0372
SYMBOL voltage 112 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL DAC\\AD5676R 640 96 R0
SYMATTR InstName U1
SYMBOL voltage 112 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 1104 272 R0
SYMATTR InstName R1
SYMATTR Value 2.45
SYMBOL res 1104 128 R0
SYMATTR InstName R_coil
SYMATTR Value 0.5
SYMBOL voltage 320 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1)
FLAG 48 112 0
FLAG 320 272 0
FLAG 608 272 0
FLAG 1120 400 0
FLAG 1152 112 Vout
FLAG 608 -80 Vcc
FLAG 112 -96 Vcc
FLAG 112 272 Vee
FLAG 1008 160 Vcc
FLAG 1008 64 Vee
TEXT -56 -184 Left 2 ;TODO: Include power supply
TEXT 872 -144 Left 2 !.include TCA0372.mod
TEXT -58 424 Left 2 !.tran 0 2 0
TEXT 872 -72 Left 2 !.options gmin=1e-11 abstol=1e-11
TEXT 872 -96 Left 2 ;Convergence Aid
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG821.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 1 input.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG821.asy)
VS N001 0 3
XU1 +V N003 NC_01 N001 N002 NC_02 NC_03 0 ADG821 ;pnba VDD)IN1)IN2)S1)D1)S2)D2)GND
V2 N003 0 PULSE(0 2.4 0 10n 10n 980n 2u)
C1 N002 0 33p
R1 N002 0 47
V1 +V 0 5
.tran 10u
.lib ADG821.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -432 -16 -464 -16
WIRE -256 -16 -352 -16
WIRE 0 -16 -32 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE 112 32 112 -16
WIRE -256 48 -432 48
WIRE -592 112 -592 64
WIRE -432 112 -432 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -592 272 -592 192
WIRE -432 272 -432 192
WIRE -144 336 -144 304
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 33p
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 47
SYMBOL ADG821 -144 32 R0
SYMATTR InstName U1
SYMBOL voltage -592 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -336 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL voltage -432 96 R0
WINDOW 3 -261 238 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 2.4 0 10n 10n 980n 2u)
SYMATTR InstName V2
FLAG -592 272 0
FLAG -592 64 +V
FLAG -464 -16 0
FLAG -144 -112 +V
FLAG -144 336 0
FLAG -432 272 0
FLAG 0 112 0
FLAG 112 112 0
TEXT 96 336 Left 2 !.tran 10u
TEXT -712 -200 Left 2 ;Note:\nSwitch shown for a logic 1 input.
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4500.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4500.asy)
Vin IN 0 SINE(0 1 10K)
V1 +V 0 2.5
Rload OUT 0 10K
R1 N001 0 10K
V2 -V 0 -2.5
XU1 IN N001 +V -V OUT ADA4500 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 10K
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1152 144 -1168
WIRE 272 -1152 272 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 272 -1056 272 -1072
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL Opamps\\ADA4500 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 272 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
FLAG 144 -1168 +V
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 272 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 272 -1056 0
FLAG 144 -1056 0
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3402.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N006 0 30K
R2 N004 N003 82K
C1 N003 0 470p
C2 N004 0 4.7p
V1 IN 0 3
L1 IN N001 2.2
R3 N005 0 549K
R4 OUT N005 909K
C3 OUT 0 22 Rser=.1
Rload OUT 0 6
R6 IN N002 100K
XU1 N006 0 IN N001 0 N002 OUT N005 N004 IN LTC3402 ;pnba Rt)MODE)Vin)SW)GND)Pgood)Vout)FB)Vc)_SHDN
.tran 250u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3402.asy)
.lib LTC3402.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2588 1768
WIRE 1568 1248 1472 1248
WIRE 1664 1248 1568 1248
WIRE 1792 1248 1664 1248
WIRE 1824 1248 1792 1248
WIRE 1952 1248 1904 1248
WIRE 1472 1264 1472 1248
WIRE 1792 1296 1792 1248
WIRE 1952 1296 1952 1248
WIRE 1568 1344 1568 1248
WIRE 1472 1360 1472 1344
WIRE 1664 1376 1664 1248
WIRE 1696 1376 1664 1376
WIRE 2176 1376 2048 1376
WIRE 2288 1376 2176 1376
WIRE 2384 1376 2288 1376
WIRE 2176 1392 2176 1376
WIRE 2288 1392 2288 1376
WIRE 2384 1392 2384 1376
WIRE 1568 1440 1568 1424
WIRE 1696 1440 1568 1440
WIRE 2288 1488 2288 1456
WIRE 2384 1488 2384 1472
WIRE 1488 1504 1440 1504
WIRE 1584 1504 1568 1504
WIRE 1696 1504 1584 1504
WIRE 2176 1504 2176 1472
WIRE 2176 1504 2048 1504
WIRE 1440 1520 1440 1504
WIRE 1584 1520 1584 1504
WIRE 2176 1520 2176 1504
WIRE 1696 1568 1680 1568
WIRE 2080 1568 2048 1568
WIRE 2080 1584 2080 1568
WIRE 1440 1600 1440 1584
WIRE 1584 1600 1584 1584
WIRE 2176 1616 2176 1600
WIRE 1872 1664 1872 1648
WIRE 2080 1680 2080 1664
FLAG 1872 1664 0
FLAG 2080 1680 0
FLAG 1584 1600 0
FLAG 1440 1600 0
FLAG 1472 1360 0
FLAG 2176 1616 0
FLAG 2288 1488 0
FLAG 2384 1488 0
FLAG 1680 1568 0
FLAG 2384 1376 OUT
FLAG 1472 1248 IN
SYMBOL RES 2064 1568 R0
SYMATTR InstName R1
SYMATTR Value 30K
SYMBOL res 1584 1488 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 82K
SYMBOL cap 1424 1520 R0
SYMATTR InstName C1
SYMATTR Value 470p
SYMBOL cap 1568 1520 R0
SYMATTR InstName C2
SYMATTR Value 4.7p
SYMBOL VOLTAGE 1472 1248 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL ind 1808 1264 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL res 2160 1504 R0
SYMATTR InstName R3
SYMATTR Value 549K
SYMBOL res 2160 1376 R0
SYMATTR InstName R4
SYMATTR Value 909K
SYMBOL polcap 2272 1392 R0
SYMATTR InstName C3
SYMATTR Value 22
SYMATTR SpiceLine Rser=.1
SYMBOL res 2368 1376 R0
SYMATTR InstName Rload
SYMATTR Value 6
SYMBOL res 1552 1328 R0
SYMATTR InstName R6
SYMATTR Value 100K
SYMBOL PowerProducts\\LTC3402 1872 1472 R0
SYMATTR InstName U1
TEXT 2296 1696 Left 2 !.tran 250u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2370-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2370-5.0.asy)
V1 IN 0 12
C1 OUT 0 10
R1 OUT N001 10K
L1 N002 OUT 10 Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
Rload OUT 0 20
XU1 IN IN IN IN N002 OUT N001 0 ADP2370-5.0 IPSM=440m Rt=420000 Rb=80000 C1=1.6p Rc1=300k R3=5.92k Rshort=100MEG PD=0 ;pnba FSEL)SYNC)EN)Vin)SW)FB)PG)PGND
.tran 500u startup
.lib ADP2370-5.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 692
WIRE 160 96 48 96
WIRE 176 96 160 96
WIRE 464 96 400 96
WIRE 624 96 544 96
WIRE 48 112 48 96
WIRE 160 176 160 96
WIRE 176 176 160 176
WIRE 416 176 400 176
WIRE 544 176 496 176
WIRE 624 176 624 96
WIRE 624 176 544 176
WIRE 688 176 624 176
WIRE 688 192 688 176
WIRE 48 208 48 192
WIRE 160 256 160 176
WIRE 176 256 160 256
WIRE 544 256 544 240
WIRE 544 256 400 256
WIRE 544 272 544 256
WIRE 688 288 688 272
WIRE 160 336 160 256
WIRE 176 336 160 336
WIRE 624 336 624 176
WIRE 624 336 400 336
SYMBOL ADP2370-5.0 288 208 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 48 96 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 560 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 672 176 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL ind 400 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Ipk=1.84 Rser=0.056 Rpar=942 Cpar=0 mfg="Coilcraft" pn="MSS6132-103"
SYMBOL cap 528 176 R0
WINDOW 0 29 15 Left 2
SYMATTR InstName C1
SYMATTR Value 10
FLAG 48 208 0
FLAG 48 96 IN
FLAG 544 272 0
FLAG 688 176 OUT
FLAG 688 288 0
TEXT 560 384 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL40502-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL40502-1.5.asy)
C1 vOUT 0 1 Rser=1m
V1 vIN 0 2.3
Rload vOUT 0 7.5
XU1 vIN 0 vIN vOUT ADPL40502-1.5 ;pnba Vin)GND)EN)Vout
.tran 1m startup
.lib ADPL40502-1.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2808 1464
WIRE 1824 880 1728 880
WIRE 1984 880 1824 880
WIRE 1728 896 1728 880
WIRE 1984 896 1984 880
WIRE 1728 992 1728 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL ADPL40502-1.5 1984 1024 R0
SYMATTR InstName U1
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMATTR SpiceLine Rser=1m
SYMBOL VOLTAGE 1728 880 R0
SYMATTR InstName V1
SYMATTR Value 2.3
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 7.5
FLAG 2256 1024 vOUT
FLAG 2256 1136 0
FLAG 1728 992 0
FLAG 1728 880 vIN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0dc4148e1cfb_VA-R.asc
* Generated by LTspice 26.0.1 for Windows.
V1 a 0
D1 b a RFU02VS8S
R1 b 0 10k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 100
.step temp list -25 50 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 128 -144 128
WIRE 240 128 80 128
WIRE -144 192 -144 128
WIRE 240 192 240 128
WIRE -144 352 -144 272
WIRE 48 352 -144 352
WIRE 240 352 240 272
WIRE 240 352 48 352
WIRE 48 368 48 352
SYMBOL diode 80 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value RFU02VS8S
SYMBOL voltage -144 176 R0
WINDOW 3 24 96 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value ""
SYMATTR InstName V1
SYMBOL Misc\\EuropeanResistor 224 176 R0
SYMATTR InstName R1
SYMATTR Value 10k
FLAG -144 128 a
FLAG 240 128 b
FLAG 48 368 0
TEXT -144 392 Left 2 !.dc V1 0 100
TEXT -152 424 Left 2 !.step temp list -25 50 100
* Z:\home\khalils\Downloads\files\data\raw_asc\LT118A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT118A.asy)
R2 N001 0 5K
V1 +V 0 15
V2 -V 0 -15
XU1 N003 N001 +V -V N002 LT118A ;pnba In+)In-)V+)V-)OUT
R1 N002 N001 5K
V3 N003 0 SINE(0 1 1Meg)
.tran 3u
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -256 160 -256 144
WIRE -128 160 -128 144
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE -256 256 -256 240
WIRE -128 256 -128 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL voltage -128 144 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -256 144 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1Meg)
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL opamps\\LT118A 192 240 R0
SYMATTR InstName U1
FLAG -128 256 0
FLAG 192 192 +V
FLAG -128 144 +V
FLAG 192 288 -V
FLAG -256 256 0
FLAG -256 144 -V
FLAG 16 96 0
FLAG 0 368 0
TEXT 240 392 Left 2 !.tran 3u
* Z:\home\khalils\Downloads\files\data\raw_asc\46ee1ee6de56_simplified_ring_mod.asc
* Generated by LTspice 26.0.1 for Windows.
V1 CARRIER 0 SINE(0 3 10k)
V2 MESSAGE 0 SINE(0 0.5 1k)
B1 SUM 0 V=V(CARRIER)+V(MESSAGE)
B2 DIFFERENCE 0 V=V(CARRIER)-V(MESSAGE)
R1 SUM N001 100
D1 N001 1+ 1N914
D2 1+ N002 1N914
D3 N002 1- 1N914
D4 1- N001 1N914
R2 DIFFERENCE N002 100
R3 0 1- 1Meg
R4 1+ 0 1Meg
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m
* Simplified Transformerless Ring Modulator
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1540 680
WIRE 256 -48 256 -64
WIRE 480 -48 480 -64
WIRE 960 -32 960 -64
WIRE 256 48 256 32
WIRE 480 48 480 32
WIRE 960 96 960 48
WIRE 992 96 960 96
WIRE 1088 96 1056 96
WIRE 1184 96 1088 96
WIRE 960 128 960 96
WIRE 1088 128 1088 96
WIRE 960 224 960 192
WIRE 992 224 960 224
WIRE 1088 224 1088 192
WIRE 1088 224 1056 224
WIRE 1216 224 1088 224
WIRE 1328 224 1296 224
WIRE 256 304 256 288
WIRE 480 304 480 288
WIRE 960 368 960 224
WIRE 976 368 960 368
WIRE 1072 368 1056 368
WIRE 1088 368 1072 368
WIRE 1184 368 1184 96
WIRE 1184 368 1168 368
WIRE 256 400 256 384
WIRE 480 400 480 384
WIRE 1072 400 1072 368
WIRE 960 416 960 368
WIRE 1184 416 1184 368
FLAG 256 -64 CARRIER
IOPIN 256 -64 In
FLAG 480 -64 MESSAGE
IOPIN 480 -64 In
FLAG 256 48 0
FLAG 480 48 0
FLAG 256 288 SUM
IOPIN 256 288 In
FLAG 480 288 DIFFERENCE
IOPIN 480 288 In
FLAG 256 400 0
FLAG 480 400 0
FLAG 1072 400 0
FLAG 960 -64 SUM
IOPIN 960 -64 In
FLAG 1328 224 DIFFERENCE
IOPIN 1328 224 In
FLAG 960 416 1-
IOPIN 960 416 In
FLAG 1184 416 1+
IOPIN 1184 416 In
SYMBOL voltage 256 -64 R0
WINDOW 3 -82 146 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 3 10k)
SYMATTR InstName V1
SYMBOL voltage 480 -64 R0
WINDOW 3 -90 145 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 0.5 1k)
SYMATTR InstName V2
SYMBOL bv 256 288 R0
WINDOW 3 -80 156 Left 2
SYMATTR Value V=V(CARRIER)+V(MESSAGE)
SYMATTR InstName B1
SYMBOL bv 480 288 R0
SYMATTR InstName B2
SYMATTR Value V=V(CARRIER)-V(MESSAGE)
SYMBOL res 944 -48 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL diode 992 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL diode 1072 128 R0
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL diode 1056 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D3
SYMATTR Value 1N914
SYMBOL diode 976 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMATTR Value 1N914
SYMBOL res 1312 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL res 1072 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL res 1184 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1Meg
TEXT 184 496 Left 2 !.tran 10m
TEXT 720 -216 Left 3 ;Simplified Transformerless Ring Modulator
* Z:\tmp\asc_dec_bjh7r6w2\158fcf527cdd_Crss_Coss_againstVds_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
C-Ref N001 N003 100p
VCoss N004 0 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1480 680
WIRE 704 -224 416 -224
WIRE 704 -192 704 -224
WIRE 368 -112 336 -112
WIRE 336 -80 336 -112
WIRE 704 -48 704 -128
WIRE 336 32 336 0
WIRE 416 32 416 -96
WIRE 416 32 336 32
WIRE 416 80 416 32
WIRE 416 208 416 160
SYMBOL cap 688 -192 R0
SYMATTR InstName C-Ref
SYMATTR Value 100p
SYMBOL voltage 416 64 R0
SYMATTR InstName Coss
SYMATTR Value 0
FLAG 416 208 0
* Z:\tmp\asc_dec_bjh7r6w2\0f058ea2fbe7_Loop2_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 ac 1
V3 +V 0 15
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1180 680
WIRE 560 224 560 208
WIRE 528 240 416 240
WIRE 416 256 416 240
WIRE 656 256 592 256
WIRE 128 272 128 256
WIRE 224 272 224 256
WIRE 528 272 512 272
WIRE 560 304 560 288
WIRE 416 352 416 336
WIRE 128 368 128 352
WIRE 224 368 224 352
SYMBOL voltage 416 240 R0
WINDOW 0 25 20 Left 0
WINDOW 3 24 100 Left 0
SYMATTR InstName V1
SYMATTR Value ac 1
SYMBOL voltage 128 256 R0
SYMATTR InstName V3
SYMATTR Value 15
FLAG 416 352 0
FLAG 560 208 +V
FLAG 560 304 -V
FLAG 512 272 0
FLAG 224 368 0
FLAG 128 368 0
FLAG 128 256 +V
FLAG 224 256 -V
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8609.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N006 0 18.2K
C1 N004 0 1n
V1 IN 0 24
C2 N001 0 1
L1 N003 OUT 2.2 Rser=3m
C3 N002 N003 0.1
C4 OUT 0 22 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
R2 OUT N005 1Meg
R3 N005 0 187K
C5 OUT N005 10p
Rload OUT 0 2.5
XU1 N002 N003 N001 N006 NC_01 N005 N004 NC_02 IN IN 0 LT8609 ;pnba BST)SW)INTVCC)RT)SYNC)FB)TR/SS)PG)VIN)EN/UV)GND
.tran 500u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8609.asy)
.lib LT8609.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE 48 -80 0 -80
WIRE 80 -80 48 -80
WIRE 256 -80 80 -80
WIRE 0 -48 0 -80
WIRE 256 -48 256 -80
WIRE 80 0 80 -80
WIRE 112 0 80 0
WIRE 416 0 400 0
WIRE 496 0 480 0
WIRE 0 48 0 32
WIRE 432 96 400 96
WIRE 432 112 432 96
WIRE 432 192 432 176
WIRE 432 192 400 192
WIRE 512 192 432 192
WIRE 624 192 592 192
WIRE 736 192 624 192
WIRE 832 192 736 192
WIRE 880 192 832 192
WIRE 928 192 880 192
WIRE 624 208 624 192
WIRE 736 208 736 192
WIRE 832 208 832 192
WIRE 928 208 928 192
WIRE 32 288 0 288
WIRE 112 288 96 288
WIRE 624 288 400 288
WIRE 736 288 736 272
WIRE 736 288 624 288
WIRE 624 304 624 288
WIRE 832 304 832 272
WIRE 928 304 928 288
WIRE 16 384 0 384
WIRE 112 384 96 384
WIRE 416 384 400 384
WIRE 624 400 624 384
FLAG 0 384 0
FLAG 0 288 0
FLAG 0 48 0
FLAG 496 0 0
FLAG 832 304 0
FLAG 624 400 0
FLAG 928 304 0
FLAG 880 192 OUT
FLAG 48 -80 IN
FLAG 416 384 0
SYMBOL res 112 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 18.2K
SYMBOL cap 96 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL voltage 0 -64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 416 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL ind 496 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=3m
SYMBOL cap 416 112 R0
SYMATTR InstName C3
SYMATTR Value 0.1
SYMBOL cap 816 208 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL res 608 192 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 608 288 R0
SYMATTR InstName R3
SYMATTR Value 187K
SYMBOL cap 720 208 R0
SYMATTR InstName C5
SYMATTR Value 10p
SYMBOL res 912 192 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL LT8609 256 192 R0
SYMATTR InstName U1
TEXT 624 456 Left 2 !.tran 500u startup