Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\15a4034c7b68_VoltageClamp_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 VB CDZV15B
R2 VOUT 0 R=if(abs(v(VOUT)), 10, (V(VOUT)**2)/0.4)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1000 680
WIRE 336 0 208 0
WIRE 528 0 432 0
WIRE 560 0 528 0
WIRE 528 48 528 0
WIRE 208 112 208 80
WIRE 384 112 384 64
WIRE 384 112 208 112
WIRE 432 112 384 112
WIRE 64 160 64 112
WIRE 352 176 256 176
WIRE 208 192 208 112
WIRE 352 192 352 176
WIRE 528 192 528 128
WIRE 208 272 208 256
WIRE 256 272 256 176
WIRE 256 272 208 272
WIRE 352 304 352 256
WIRE 352 304 208 304
SYMBOL zener 224 256 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value CDZV15B
SYMBOL res 512 32 R0
SYMATTR InstName R2
SYMATTR Value R=if(abs(v(VOUT)), 10, (V(VOUT)**2)/0.4)
FLAG 208 304 0
FLAG 528 192 0
FLAG 64 160 0
FLAG 560 0 VOUT
FLAG 432 112 VB
FLAG 688 192 0
* Z:\home\khalils\Downloads\files\data\raw_asc\4feb2d2f25e2_3S_Charging_Control_Circuit.asc
* Generated by LTspice 26.0.1 for Windows.
* Charging Control
* 3S BMS Charging Control Circuit
* [Driver circuit is same as Output control Circuit]
* NMOS Transistor - IRFZ44N
* - 1 Control input
* For safety during sleep and wake up -->
V3 N003 0 4. 2
R1 N005 0 pull_down
M1 N004 N005 0 0 NMOS
VChargin_Source N001 N004 13 volt
V2 N002 N003 4. 2
V1 N001 N002 4. 2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1220
WIRE 192 -96 -656 -96
WIRE 192 32 192 -96
WIRE -656 272 -656 -96
WIRE 192 336 192 112
WIRE 192 624 192 416
WIRE -656 880 -656 352
WIRE -16 880 -656 880
WIRE -16 912 -16 880
WIRE -176 992 -224 992
WIRE -64 992 -176 992
WIRE -176 1040 -176 992
WIRE -176 1152 -176 1120
WIRE -16 1152 -16 1008
WIRE -16 1152 -176 1152
WIRE 192 1152 192 704
WIRE 192 1152 -16 1152
WIRE 192 1200 192 1152
SYMBOL voltage 192 608 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 4. 2
SYMBOL voltage 192 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4. 2
SYMBOL res -192 1024 R0
WINDOW 3 36 68 Left 2
SYMATTR InstName R1
SYMATTR Value pull_down
SYMBOL voltage -656 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Chargin_Source
SYMATTR Value 13 volt
SYMBOL voltage 192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 4. 2
SYMBOL nmos -64 912 R0
SYMATTR InstName M1
FLAG 192 1200 0
TEXT -336 968 Left 2 ;Charging Control
TEXT -1504 112 Left 4 ;3S BMS Charging Control Circuit
TEXT -1440 216 Left 2 ;[Driver circuit is same as Output control Circuit]
TEXT -1432 328 Left 2 ;NMOS Transistor - IRFZ44N
TEXT -1400 632 Left 2 ;- 1 Control input
TEXT -680 1072 Left 2 ;For safety during sleep and wake up -->
* Z:\home\khalils\Downloads\files\data\raw_asc\ADGM1144.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADGM1144.asy)
V3 +V 0 3.3
V2 N003 0 PULSE(3.3 0 0 10u 10u 10m 20m)
V1 N001 0 2
XU1 +V N003 N001 N002 0 ADGM1144 ;pnba Vdd)IN)RF1)RFC)GND
R1 N002 0 300
.tran 100m
.lib ADGM1144.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2144 2724
WIRE 912 96 912 32
WIRE 704 176 672 176
WIRE 816 176 784 176
WIRE 1088 176 1008 176
WIRE 1088 192 1088 176
WIRE 816 240 736 240
WIRE 1088 288 1088 272
WIRE 560 304 560 272
WIRE 736 304 736 240
WIRE 912 368 912 352
WIRE 560 416 560 384
WIRE 736 432 736 384
SYMBOL ADGM1144 912 224 R0
SYMATTR InstName U1
SYMBOL voltage 800 176 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL res 1072 176 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL voltage 560 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL voltage 736 288 R0
WINDOW 3 33 134 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(3.3 0 0 10u 10u 10m 20m)
SYMATTR InstName V2
FLAG 672 176 0
FLAG 1088 288 0
FLAG 912 368 0
FLAG 736 432 0
FLAG 912 32 +V
FLAG 560 416 0
FLAG 560 272 +V
TEXT 1088 352 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\55cd9deb0441_NOR_gate.asc
* Generated by LTspice 26.0.1 for Windows.
* NOR Gate
V2 nor1 0 PWL(0 0 2 0 4 0 4.005 4)
V3 nor2 0 PWL(0 0 2 0 2.005 4 4 4 4.005 0 6 0 6.005 4)
Q2 0 nor2 nor 0 2N2222
R2 +Vcc nor 1k
V1 +Vcc 0 5
R1 +Vcc nor 1k
Q1 nor nor1 0 0 2N2222
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 8
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1284 680
WIRE 448 -112 448 -144
WIRE 448 -112 288 -112
WIRE 608 -112 448 -112
WIRE 288 -32 288 -112
WIRE 608 -32 608 -112
WIRE 48 80 48 -32
WIRE 288 112 288 48
WIRE 416 112 288 112
WIRE 608 112 608 48
WIRE 608 112 416 112
WIRE 416 160 416 112
WIRE 448 160 416 160
WIRE 288 176 288 112
WIRE 608 176 608 112
WIRE 144 224 96 224
WIRE 224 224 144 224
WIRE 736 224 672 224
WIRE 816 224 736 224
WIRE 144 288 144 224
WIRE 736 288 736 224
WIRE 48 304 48 160
WIRE 288 416 288 272
WIRE 608 416 608 272
WIRE 144 432 144 368
WIRE 736 432 736 368
IOPIN 96 224 In
IOPIN 816 224 In
IOPIN 448 160 Out
SYMBOL res 272 -48 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL npn 672 272 R180
SYMATTR InstName Q2
SYMATTR Value 2N2222
SYMBOL voltage 736 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PWL(0 0 2 0 2.005 4 4 4 4.005 0 6 0 6.005 4)
SYMBOL voltage 48 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 144 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 0 2 0 4 0 4.005 4)
SYMBOL npn 224 176 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL res 592 -48 R0
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 48 304 0
FLAG 288 416 0
FLAG 608 416 0
FLAG 48 -32 +Vcc
FLAG 448 -144 +Vcc
FLAG 144 432 0
FLAG 736 432 0
FLAG 96 224 nor1
FLAG 816 224 nor2
FLAG 448 160 nor
TEXT 184 552 Left 2 !.tran 8
TEXT 400 624 Left 2 ;NOR Gate
* Z:\home\khalils\Downloads\files\data\raw_asc\343ae22cf328_6242.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6242.asy)
R1 OUT 0 1K
V3 IN 0 PULSE(-1 1 0 1n 1n 100u 200u)
V1 +V 0 5
C1 OUT 0 5p
XU1 IN OUT +V -V OUT LTC6241 ;pnba IN+)IN-)VCC)VEE)OUT
V2 -V 0 -5
.tran 1m
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 144 -96 128
WIRE 0 144 0 128
WIRE -96 256 -96 224
WIRE 0 256 0 224
WIRE 256 256 128 256
WIRE 128 320 128 256
WIRE 160 320 128 320
WIRE 256 336 256 256
WIRE 256 336 224 336
WIRE 352 336 256 336
WIRE 448 336 352 336
WIRE 160 352 -80 352
WIRE 352 352 352 336
WIRE 448 352 448 336
WIRE -80 368 -80 352
WIRE 352 448 352 432
WIRE 448 448 448 416
WIRE -80 464 -80 448
SYMBOL voltage -80 352 R0
SYMATTR InstName V3
SYMATTR Value PULSE(-1 1 0 1n 1n 100u 200u)
SYMBOL voltage -96 128 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 0 128 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL opamps\\LTC6242 192 336 R0
SYMATTR InstName U1
SYMBOL cap 432 352 R0
SYMATTR InstName C1
SYMATTR Value 5p
SYMBOL res 336 336 R0
SYMATTR InstName R1
SYMATTR Value 1K
FLAG -96 256 0
FLAG 0 256 0
FLAG -80 464 0
FLAG -80 352 IN
FLAG 448 336 OUT
FLAG 352 448 0
FLAG 448 448 0
FLAG 0 128 -V
FLAG -96 128 +V
FLAG 192 304 +V
FLAG 192 368 -V
TEXT 544 448 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\604dcace2bb1_Vbe_break.asc
* Generated by LTspice 26.0.1 for Windows.
*Choose Is of diode 10^-10 lower than Is of transistor
* With external diode
* With subcircuit
* Including Vbe Breakdown in Transistor Models\n \nThis requires an additional diode in parallel to the base and the emitter.\nChoose IS of the diode a factor of 10^-10 lower than IS of the transistor. \nThis avoids any impact on the normal transistor operation.
Q1 C B E 2N2907
R4 N004 0 1k
R1 in N001 1k
D1 N003 N001 VBEDIO
R3 in N002 1k
R2 N003 0 1k
Q1 0 N001 N003 0 2N2907
XQ2 0 N002 N004 Q2N2907 ;pnba C)B)E
V1 in 0 0
D1 E B DEB
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 -10 10 0.1
.MODEL VBEDIO D(Is=1e-24 BV=5 IBV=1m RS=20)
.SUBCKT Q2N2907 C B E
.MODEL DEB D(Is=1e-24 BV=5 IBV=1m RS=20)
.ENDS
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1480 744
WIRE 304 224 304 288
WIRE 304 480 -128 480
WIRE 208 208 208 176
WIRE 208 176 240 176
WIRE 208 176 48 176
WIRE -128 480 -128 304
WIRE -128 176 -128 224
WIRE -32 176 -128 176
WIRE -128 512 -128 480
WIRE 304 128 304 48
WIRE 304 48 448 48
WIRE 448 48 448 480
WIRE 448 480 304 480
WIRE 304 416 304 480
WIRE 208 272 208 288
WIRE 208 288 304 288
WIRE 304 288 304 336
WIRE 960 224 960 336
WIRE 816 176 896 176
WIRE 960 128 960 48
WIRE 960 48 1104 48
WIRE 1104 48 1104 480
WIRE 1104 480 960 480
WIRE 960 416 960 480
WIRE 736 176 672 176
WIRE 960 512 960 480
RECTANGLE Normal 416 320 96 96
SYMBOL res 288 320 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 720 192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL pnp 240 128 R0
SYMATTR InstName Q1
SYMATTR Value 2N2907
SYMBOL res -48 192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -128 208 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL res 944 320 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL pnp 896 128 R0
WINDOW 3 79 79 Left 0
SYMATTR Value Q2N2907
SYMATTR InstName Q2
SYMATTR Prefix X
SYMBOL diode 224 272 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName D1
SYMATTR Value VBEDIO
FLAG -128 512 0
FLAG -128 176 in
FLAG 672 176 in
FLAG 960 512 0
TEXT -128 -200 Left 0 !.dc V1 -10 10 0.1
TEXT -144 -8 Left 0 !.MODEL VBEDIO D(Is=1e-24 BV=5 IBV=1m RS=20)
TEXT 640 -136 Left 0 !.SUBCKT Q2N2907  C B E\nQ1 C B E  2N2907\nD1 E B DEB\n*Choose Is of diode 10^-10 lower than Is of transistor\n.MODEL DEB D(Is=1e-24 BV=5 IBV=1m RS=20)\n.ENDS
TEXT -136 -56 Left 0 ;With external diode
TEXT 640 -184 Left 0 ;With subcircuit
TEXT -144 -424 Left 0 ;Including Vbe Breakdown in Transistor Models\n \nThis requires an additional diode in parallel to the base and the emitter.\nChoose IS of the diode a factor of 10^-10 lower than IS of the transistor. \nThis avoids any impact on the normal  transistor operation.
* Z:\home\khalils\Downloads\files\data\raw_asc\6e2520e5f289_Fig_3-40_savebias_Tr-DC.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 C B 0 0 2N2222
V1 C 0 1
I1 0 B 1
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 10 0.01 I1 2m 20m 2m
.savebias DC_Bias.txt DC1=5 DC2=10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 64 -32 64
WIRE 256 112 256 64
WIRE -32 128 -32 64
WIRE 160 160 96 160
WIRE 192 160 160 160
WIRE -32 256 -32 208
WIRE 96 256 96 240
WIRE 256 256 256 208
FLAG 256 256 0
FLAG -32 256 0
FLAG 96 256 0
FLAG 160 160 B
FLAG 256 64 C
SYMBOL npn 192 112 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL voltage -32 112 R0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL current 96 240 R180
WINDOW 0 24 88 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value 1
TEXT -40 304 Left 2 !.dc V1 0 10 0.01 I1 2m 20m 2m
TEXT -40 336 Left 2 !.savebias DC_Bias.txt DC1=5 DC2=10m
* Z:\home\khalils\Downloads\files\data\raw_asc\204fb582ee30_nand_sym.asc
* Generated by LTspice 26.0.1 for Windows.
M5 N001 clk_b VDD VDD p_65 l=65n w=4u
V1 VDD 0 1.2
M4 Vout B N001 VDD p_65 l=65n w=1u
M2 N002 B N003 0 n_65 l=65n w=1u
M1 Vout A N002 0 n_65 l=65n w=1u
M3 Vout A N001 VDD p_65 l=65n w=1u
M6 N003 clk 0 0 n_65 l=65n w=4u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include 65nm_bulk.txt
.tran 0 20u 0 1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1728 992
WIRE 592 -240 592 -272
WIRE 0 -128 0 -192
WIRE 32 -128 0 -128
WIRE -48 -112 -96 -112
WIRE 32 -80 32 -128
WIRE 32 -80 0 -80
WIRE 0 16 0 -32
WIRE 0 16 -112 16
WIRE 112 16 0 16
WIRE -112 96 -112 16
WIRE 112 96 112 16
WIRE -160 112 -224 112
WIRE 64 112 -32 112
WIRE -80 144 -80 96
WIRE -80 144 -112 144
WIRE 144 144 144 96
WIRE 144 144 112 144
WIRE -112 240 -112 192
WIRE 0 240 -112 240
WIRE 112 240 112 192
WIRE 112 240 0 240
WIRE 176 240 112 240
WIRE -224 256 -224 112
WIRE -224 256 -288 256
WIRE -32 288 -32 112
WIRE -32 288 -112 288
WIRE 0 320 0 240
WIRE 16 368 0 368
WIRE -224 400 -224 256
WIRE -48 400 -224 400
WIRE -112 480 -112 288
WIRE -112 480 -176 480
WIRE 0 480 0 416
WIRE 16 528 0 528
WIRE -112 560 -112 480
WIRE -48 560 -112 560
WIRE 0 608 0 576
WIRE 16 656 0 656
WIRE -48 688 -96 688
IOPIN -288 256 In
IOPIN -176 480 In
IOPIN -96 -112 In
IOPIN -96 688 In
IOPIN 176 240 Out
SYMBOL pmos4 -48 -32 M180
WINDOW 123 56 50 Left 2
SYMATTR Value2 l=65n w=4u
SYMATTR InstName M5
SYMATTR Value p_65
SYMBOL Voltage 592 -256 R0
SYMATTR InstName V1
SYMATTR Value 1.2
SYMBOL nmos4 -48 320 R0
WINDOW 123 56 94 Left 2
SYMATTR Value2 l=65n w=1u
SYMATTR InstName M1
SYMATTR Value n_65
SYMBOL pmos4 64 192 M180
WINDOW 123 56 50 Left 2
SYMATTR Value2 l=65n w=1u
SYMATTR InstName M4
SYMATTR Value p_65
SYMBOL pmos4 -160 192 M180
WINDOW 123 56 50 Left 2
SYMATTR Value2 l=65n w=1u
SYMATTR InstName M3
SYMATTR Value p_65
SYMBOL nmos4 -48 480 R0
WINDOW 123 56 94 Left 2
SYMATTR Value2 l=65n w=1u
SYMATTR InstName M2
SYMATTR Value n_65
SYMBOL nmos4 -48 608 R0
WINDOW 123 56 94 Left 2
SYMATTR Value2 l=65n w=4u
SYMATTR InstName M6
SYMATTR Value n_65
FLAG 0 -192 VDD
FLAG 16 368 0
FLAG 16 528 0
FLAG -288 256 A
FLAG -176 480 B
FLAG -80 96 VDD
FLAG 144 96 VDD
FLAG 16 656 0
FLAG 0 704 0
FLAG -96 -112 clk_b
FLAG -96 688 clk
FLAG 176 240 Vout
FLAG 592 -272 VDD
FLAG 592 -160 0
TEXT -488 -408 Left 2 !.include 65nm_bulk.txt
TEXT 744 -72 Left 2 !.tran 0 20u 0 1n
* Z:\home\khalils\Downloads\files\data\raw_asc\42876a6356e5_tema1.asc
* Generated by LTspice 26.0.1 for Windows.
D4 N003 Vo 1N4148
R2 N007 0 1k
QT2 Vo N007 0 0 2N2222
Vi N008 0 0
R3 N001 N002 1.6k
QT1 N002 N006 N007 0 2N2222
D2 N005 N004 1N4148
D3 N005 N006 1N4148
QT3 N001 N002 N003 0 2N2222
V1 N001 0 5
V2 N004 0 5
R1 N001 N005 4k
D1 N005 N008 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Vi 0 5 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1248 680
WIRE 512 -176 208 -176
WIRE 752 -176 512 -176
WIRE 976 -176 752 -176
WIRE 512 -144 512 -176
WIRE 976 -112 976 -176
WIRE 208 -80 208 -176
WIRE 752 -64 752 -176
WIRE 512 -16 512 -64
WIRE 688 -16 512 -16
WIRE 704 -16 688 -16
WIRE 976 16 976 -32
WIRE 752 64 752 32
WIRE 512 80 512 -16
WIRE 64 128 -80 128
WIRE 208 128 208 0
WIRE 208 128 128 128
WIRE 304 128 208 128
WIRE 448 128 368 128
WIRE -80 160 -80 128
WIRE 752 176 752 128
WIRE 976 176 752 176
WIRE 752 224 752 176
WIRE 512 272 512 176
WIRE 688 272 512 272
WIRE -80 288 -80 240
WIRE 96 320 16 320
WIRE 208 320 208 128
WIRE 208 320 160 320
WIRE 512 352 512 272
WIRE 16 368 16 320
WIRE 512 480 512 432
WIRE 752 480 752 320
WIRE 16 496 16 448
IOPIN 976 176 Out
SYMBOL voltage 976 -128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL npn 688 -64 R0
WINDOW 0 6 -9 Left 2
WINDOW 3 43 46 Left 2
SYMATTR InstName T3
SYMATTR Value 2N2222
SYMBOL npn 448 80 R0
WINDOW 0 6 -10 Left 2
WINDOW 3 39 44 Left 2
SYMATTR InstName T1
SYMATTR Value 2N2222
SYMBOL npn 688 224 R0
WINDOW 0 10 -6 Left 2
WINDOW 3 43 46 Left 2
SYMATTR InstName T2
SYMATTR Value 2N2222
SYMBOL res 496 -160 R0
WINDOW 3 36 75 Left 2
SYMATTR InstName R3
SYMATTR Value 1.6k
SYMBOL diode 128 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 40 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL diode 160 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 39 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 192 -96 R0
SYMATTR InstName R1
SYMATTR Value 4k
SYMBOL diode 736 64 R0
WINDOW 0 42 17 Left 2
WINDOW 3 35 64 Left 2
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL voltage -80 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 39 79 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 496 336 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL diode 304 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 -11 32 VBottom 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL voltage 16 352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -70 83 Left 2
WINDOW 3 39 79 Left 2
SYMATTR InstName Vi
SYMATTR Value 0
FLAG 512 480 0
FLAG 976 16 0
FLAG 752 480 0
FLAG -80 288 0
FLAG 16 496 0
FLAG 976 176 Vo
TEXT -210 520 Left 2 !.dc Vi 0 5 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\094646d5ccbb_classe-lnet-10Mhz.asc
* Generated by LTspice 26.0.1 for Windows.
* Drawn by 'ClassE - www.TonneSoftware.com'
* L total = 1.49024uH
C3 N005 0 495.846pF
C1 N002 0 229.337pF
L3 N004 N005 356.688nH
L2 N003 N004 1.13355H
C2 N003 N002 294.699pF
S1 0 N002 N007 0 MySwitch
RLoad N005 0 50
RGen N007 N006 10
Vgen N006 0 PULSE (0 12 0 5n 5n 44.5n 99.01n
L1 N001 N002 11.3355H
Vbattery N001 0 13.8
.model MySwitch SW(Ron= 1.856641 Roff=10000 Vt=3.5 Vh=0)
.TRAN 0 19.8u 19.5u 495p startup
.backanno
.end

* LTspice schematic (.asc):
WIRE 192 0 224 0
WIRE 192 48 224 48
WIRE 192 48 192 112
WIRE 272 -80 272 -16
WIRE 0 160 0 208
WIRE 0 80 0 0
WIRE 0 0 64 0
WIRE 144 0 192 0
WIRE 272 64 272 112
WIRE 0 -96 0 -144
WIRE 0 -224 0 -272
WIRE 0 -272 272 -272
WIRE 272 -272 272 -224
WIRE 272 -144 272 -112
WIRE 272 -112 272 -80
WIRE 272 -112 416 -112
WIRE 416 -112 416 -48
WIRE 416 16 416 64
WIRE 416 -112 496 -112
WIRE 560 -112 624 -112
WIRE 704 -112 768 -112
WIRE 896 -112 896 -48
WIRE 896 16 896 64
WIRE 848 -112 896 -112
WIRE 896 -112 976 -112
WIRE 976 -112 976 -64
WIRE 976 16 976 64
SYMBOL res  960 -80 R0
SYMATTR InstName RLoad
SYMATTR Value 50
SYMBOL ind  752 -96 R270
WINDOW 0 32 56 Vtop 0
WINDOW 3 5 56 Vbottom 0
SYMATTR InstName L3
SYMATTR Value 356.688nH
SYMBOL cap  400 -48 R0
SYMATTR InstName C1
SYMATTR Value 229.337pF
SYMBOL res 160  -16 R90
WINDOW 0 0 56 Vbottom 0
WINDOW 3 32 56 Vtop 0
SYMATTR InstName RGen
SYMATTR Value 10
SYMBOL sw  272  80 M180
WINDOW 0 12 104 Left 0
WINDOW 3 17 11 Left 0
SYMATTR InstName S1
SYMATTR Value MySwitch
SYMBOL voltage  0 64 R0
WINDOW 123 24 132 Left 0
SYMATTR InstName Vgen
SYMATTR Value PULSE (0 12 0 5n 5n 44.5n 99.01n
SYMBOL ind  256 -240 R0
SYMATTR InstName L1
SYMATTR Value 11.3355uH
SYMBOL cap  912 -48 M0
SYMATTR InstName C3
SYMATTR Value 495.846pF
SYMBOL ind  608 -96 R270
WINDOW 0 32 56 Vtop 0
WINDOW 3 5 56 Vbottom 0
SYMATTR InstName L2
SYMATTR Value 1.13355uH
SYMBOL voltage 0 -240 R0
WINDOW 123 24 132 Left 0
SYMATTR InstName Vbattery
SYMATTR Value 13.8
SYMBOL cap  560 -128 R90
WINDOW 0 0 32 Vbottom 0
WINDOW 3 32 32 Vtop 0
SYMATTR InstName C2
SYMATTR Value 294.699pF
FLAG 192 112 0
FLAG 0 208 0
FLAG 272 112 0
FLAG 0 -96 0
FLAG 416 64 0
FLAG 896 64 0
FLAG 976 64 0
TEXT 488 136 Left 0 !.model MySwitch SW(Ron= 1.856641 Roff=10000 Vt=3.5 Vh=0)
TEXT 488 168 Left 0 !.TRAN 0 19.8u 19.5u 495p startup
TEXT 488 232 Left 0 ;Drawn by 'ClassE - www.TonneSoftware.com'
TEXT 640 -164 Left 0 ;L total = 1.49024uH
* Z:\home\khalils\Downloads\files\data\raw_asc\7243b60f84e3_Fig11_4_short.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Vout and Id(M1)
* 10/1
* 10/1
M2 Vout Vin VDD VDD P_50n l=50n w=500n
M1 Vout Vin 0 0 N_50n l=50n w=500n
VDD VDD 0 1
Vin Vin 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vin 0 1
.include cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 680
WIRE 192 -368 192 -384
WIRE 192 -352 192 -368
WIRE 448 -304 448 -352
WIRE 400 -288 368 -288
WIRE 192 -240 192 -272
WIRE 320 -176 304 -176
WIRE 368 -176 368 -288
WIRE 368 -176 320 -176
WIRE 448 -176 448 -208
WIRE 624 -176 448 -176
WIRE 656 -176 624 -176
WIRE 208 -96 208 -112
WIRE 368 -96 368 -176
WIRE 400 -96 368 -96
WIRE 448 -32 448 -80
WIRE 208 0 208 -16
SYMBOL nmos4 400 -176 R0
WINDOW 0 104 24 Right 2
WINDOW 3 179 41 Right 2
WINDOW 123 213 74 Right 2
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 192 -368 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL voltage 208 -112 R0
WINDOW 0 -72 21 Left 2
WINDOW 3 -60 74 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vin
SYMATTR Value 0
SYMBOL pmos4 400 -208 M180
WINDOW 0 88 9 Right 2
WINDOW 3 168 20 Right 2
WINDOW 123 206 76 Right 2
SYMATTR InstName M2
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=500n
FLAG 208 0 0
FLAG 624 -176 Vout
FLAG 208 -112 Vin
FLAG 448 -128 0
FLAG 192 -240 0
FLAG 192 -368 VDD
FLAG 448 -256 VDD
FLAG 448 -32 0
FLAG 448 -352 VDD
FLAG 320 -176 Vin
TEXT 264 8 Left 2 !.dc Vin 0 1
TEXT 264 32 Left 2 !.include cmosedu_models.txt
TEXT 496 -360 Left 2 ;Plot Vout and Id(M1)
TEXT 344 -312 Left 2 ;10/1
TEXT 344 -64 Left 2 ;10/1
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX74821.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX74821.asy)
V1 +V 0 2.5
Rload OUT 0 10K
XU1 IN N001 +V -V OUT MAX74821 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 10K
V2 -V 0 -2.5
R1 N001 0 10K
Vin IN 0 SINE(0 1 100K)
.tran 100u
.lib MAX74821.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE 464 -1184 448 -1184
WIRE 560 -1184 544 -1184
WIRE 576 -1184 560 -1184
WIRE 672 -1184 656 -1184
WIRE 224 -1072 224 -1088
WIRE 336 -1072 336 -1088
WIRE 560 -1072 560 -1184
WIRE 576 -1072 560 -1072
WIRE 672 -1056 672 -1184
WIRE 672 -1056 640 -1056
WIRE 800 -1056 672 -1056
WIRE 576 -1040 464 -1040
WIRE 800 -1040 800 -1056
WIRE 464 -1024 464 -1040
WIRE 224 -976 224 -992
WIRE 336 -976 336 -992
WIRE 800 -944 800 -960
WIRE 464 -928 464 -944
SYMBOL voltage 336 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 672 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 224 -1088 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 464 -1040 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100K)
SYMBOL MAX74821 608 -1120 R0
SYMATTR InstName U1
SYMBOL res 784 -1056 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 560 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 224 -1088 +V
FLAG 224 -976 0
FLAG 464 -928 0
FLAG 800 -1056 OUT
FLAG 464 -1040 IN
FLAG 608 -1088 +V
FLAG 336 -1088 -V
FLAG 608 -1024 -V
FLAG 448 -1184 0
FLAG 800 -944 0
FLAG 336 -976 0
TEXT 752 -880 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\39ee6612ff9b_112.asc
* Generated by LTspice 26.0.1 for Windows.
* .tran 200u
R1 N002 0 1K
D1 N001 N002 1N4148
Vi N001 0 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc Vi -8 8 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 96 64 96
WIRE 384 96 256 96
WIRE 64 176 64 96
WIRE 384 176 384 96
WIRE 64 320 64 256
WIRE 240 320 64 320
WIRE 384 320 384 256
WIRE 384 320 240 320
WIRE 240 368 240 320
SYMBOL diode 192 80 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 64 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vi
SYMATTR Value 0
SYMBOL res 368 160 R0
SYMATTR InstName R1
SYMATTR Value 1K
FLAG 240 368 0
TEXT 72 -64 Left 2 ;.tran 200u
TEXT 72 -16 Left 2 !.dc Vi -8 8 0.05