* Z:\home\khalils\Downloads\files\data\raw_asc\LTP8802A-1B.asc
* Generated by LTspice 26.0.1 for Windows.
* 105A static load
* 35A switched load
* 3.3V at 140A
* *********************************************************************************************************************\n**************************************************HOW TO USE *************************************************\n*********************************************************************************************************************\n \nThis model does not include PMBus functionality. Many parameters set by PMBus are configured by editing the SPICE directives. \nWhenever possible, the values for the parameters are the same as would be set in the physical hardware. See below for details and exceptions. \nHowever, please be aware that:\n-Parameters must be set before a simulation is run. \n-All parameter values are in decimal format, not hexadecimal or binary format.\n-There is no error checking for parameters that are out-of-range, including non-integer values. \n-Parameters may be set with a precision that is not realizable in the physical hardware.\n \n********************************************EDITABLE PARAMETERS******************************************\n \n****Control Loop****\n \nValues are the same as in the physical hardware. Enter each as a decimal integer.\n \nNM_DIGFILT_POLE_SETTING (0xFE03)\nNM_DIGFILT_ZERO_SETTING (0xFE02)\nNM_DIGFILT_HF_GAIN_SETTING (0xFE04)\nNM_DIGFILT_LF_GAIN_SETTING (0xFE01)\n \n****Output Voltage****\n \nValues differ from the physical hardware. Enter each value directly as a decimal number. \n \nVOUT_COMMAND (0x21) -- It is not necessary to set VOUT_MODE[4:0]\nVOUT_SCALE_LOOP (0x29)\n \n****Interleaving****\n \nINTERLEAVE (0x37) - only the interleave order is supported (bits [3:0])\n \n****Other Parameters****\n \nValues differ from the physical hardware. Enter each value directly as a decimal number. \n \nVIN_ON (0x35)\nVIN_OFF (0x36)\nTON_DELAY (0x60)\nTON_RISE (0x61)\n \n ***************************************************EXAMPLES*****************************************************\n \nExample 1: To set the output voltage to 750mV, enter "VOUT_COMMAND = 750m"\n \nExample 2: To set the scaling of the resistor divider to 0.66, enter "VOUT_SCALE_LOOP = 0.66"\n \nExample 3: To set the interleaving to 90 degrees, set "INTERLEAVE = 4"\n \n **************************************SYNCHRONIZATION FUNCTION****************************************\n \nThe model will automatically synchronize when a 0-3.3V, 50% duty cycle signal is applied to the SYNC pin. \nEnabling/disabling the SYNC function (register 0xFE55[6]) is not necessary. \n \n*******************************OTHER FUNCTIONS THAT ARE NOT MODELED ***************************\n \n-Fault handling.\n-Over-current conditions and regulation\n-Startup behavior. Given the timescales involved, it is also generally impractical and unnecessary to simulate this)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTP8802A-1B.asy)
C2 OUT 0 680 Rser=18m X16
R4 OUT 0 31.4m
R2 OUT N003 2.80k tol=500
R3 N003 0 499
C3 N003 N005 100p
C1 OUT 0 100 Rser=3m X8
R1 0 N005 7.5
V1 IN 0 54
V2 N002 0 7
V4 N001 0 PULSE(0 5 400u 1u 1u 100u 1m 1)
V3 N004 0 3.3
S1 0 OUT N001 0 SSW
XU2 N002 NC_01 IN OUT N003 N005 0 N004 0 LTP8802A-1B VIN_ON=40 VIN_OFF=30 TON_RISE=100u TON_DELAY=10u VOUT_SCALE_LOOP=(0.1513) VOUT_COMMAND=3.3 INTERLEAVE=12 NM_DIGFILT_POLE_SETTING=195 NM_DIGFILT_ZERO_SETTING=205 NM_DIGFILT_HF_GAIN_SETTING=70 NM_DIGFILT_LF_GAIN_SETTING = 30 ;pnba 7V0)ISHARE)Vin)Vout)Vs+)Vs-)SYNC)3V3)GND
.tran 600u startup
.model SSW SW(ron=94.3m roff=100Meg Vt=1 Vh=10m)
.lib LTP8802A-1B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4580 2664
WIRE 416 -32 144 -32
WIRE 448 -32 416 -32
WIRE 816 -32 768 -32
WIRE 1056 -32 816 -32
WIRE 1184 -32 1056 -32
WIRE 1376 -32 1184 -32
WIRE 1568 -32 1376 -32
WIRE 1760 -32 1568 -32
WIRE 1056 -16 1056 -32
WIRE 144 16 144 -32
WIRE 1968 32 1888 32
WIRE 1568 64 1568 -32
WIRE 1760 64 1760 -32
WIRE 1968 64 1968 32
WIRE 448 80 256 80
WIRE 848 80 768 80
WIRE 1056 80 1056 64
WIRE 1056 80 848 80
WIRE 1184 80 1184 -32
WIRE 1376 80 1376 -32
WIRE 1888 80 1888 32
WIRE 1888 80 1808 80
WIRE 848 96 848 80
WIRE 1056 96 1056 80
WIRE 256 128 256 80
WIRE 1888 128 1808 128
WIRE 144 160 144 96
WIRE 448 192 352 192
WIRE 848 192 848 160
WIRE 848 192 768 192
WIRE 896 192 848 192
WIRE 1056 192 1056 176
WIRE 1056 192 976 192
WIRE 1056 224 1056 192
WIRE 1184 224 1184 144
WIRE 1376 224 1376 144
WIRE 1568 224 1568 144
WIRE 1760 224 1760 144
WIRE 1888 224 1888 128
WIRE 1968 224 1968 144
WIRE 256 240 256 208
WIRE 352 240 352 192
WIRE 352 352 352 320
WIRE 448 416 400 416
WIRE 400 464 400 416
WIRE 608 512 608 480
SYMBOL voltage 352 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL res 1072 -32 M0
SYMATTR InstName R2
SYMATTR Value 2.80k
SYMATTR SpiceLine tol=500
SYMBOL sw 1760 160 R180
SYMATTR InstName S1
SYMATTR Value SSW
SYMBOL cap 1360 80 R0
WINDOW 39 48 70 Left 2
WINDOW 0 50 14 Left 2
WINDOW 3 47 39 Left 2
WINDOW 40 49 92 Left 2
SYMATTR SpiceLine Rser=18m
SYMATTR InstName C2
SYMATTR Value 680
SYMATTR SpiceLine2 X16
SYMBOL res 1552 48 R0
SYMATTR InstName R4
SYMATTR Value 31.4m
SYMBOL cap 864 96 M0
SYMATTR InstName C3
SYMATTR Value 100p
SYMBOL voltage 144 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 54
SYMBOL cap 1168 80 R0
WINDOW 39 62 69 Left 2
WINDOW 0 56 9 Left 2
WINDOW 3 52 39 Left 2
WINDOW 40 58 93 Left 2
SYMATTR SpiceLine Rser=3m
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine2 X8
SYMBOL voltage 256 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 7
SYMBOL res 992 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 7.5
SYMBOL LTP8802A-1B 608 240 R0
WINDOW 39 -1 -372 Center 1
WINDOW 40 26 -354 Center 1
SYMATTR InstName U2
SYMBOL res 1072 80 M0
SYMATTR InstName R3
SYMATTR Value 499
SYMBOL voltage 1968 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 5 400u 1u 1u 100u 1m 1)
FLAG 352 352 0
FLAG 144 160 0
FLAG 256 240 0
FLAG 400 464 0
FLAG 608 512 0
FLAG 1184 224 0
FLAG 1376 224 0
FLAG 1568 224 0
FLAG 1056 224 0
FLAG 416 -32 IN
FLAG 816 -32 OUT
FLAG 1760 224 0
FLAG 1888 224 0
FLAG 1968 224 0
TEXT 504 592 Left 2 !.tran 600u startup
TEXT 1728 312 Left 2 !.model SSW SW(ron=94.3m roff=100Meg Vt=1 Vh=10m)
TEXT 1472 -64 Left 2 ;105A static load
TEXT 1720 -64 Left 2 ;35A switched load
TEXT 1208 -64 Left 2 ;3.3V at 140A
TEXT -1008 -888 Left 2 ;*********************************************************************************************************************\n**************************************************HOW TO USE *************************************************\n*********************************************************************************************************************\n \nThis model does not include PMBus functionality.  Many parameters set by PMBus are configured by editing the SPICE directives.  \nWhenever possible, the values for the parameters are the same as would be set in the physical hardware.  See below for details and exceptions.  \nHowever, please be aware that:\n-Parameters must be set before a simulation is run.  \n-All parameter values are in decimal format, not hexadecimal or binary format.\n-There is no error checking for parameters that are out-of-range, including non-integer values.  \n-Parameters may be set with a precision that is not realizable in the physical hardware.\n \n********************************************EDITABLE PARAMETERS******************************************\n \n****Control Loop****\n \nValues are the same as in the physical hardware.  Enter each as a decimal integer.\n \nNM_DIGFILT_POLE_SETTING (0xFE03)\nNM_DIGFILT_ZERO_SETTING (0xFE02)\nNM_DIGFILT_HF_GAIN_SETTING (0xFE04)\nNM_DIGFILT_LF_GAIN_SETTING (0xFE01)\n \n****Output Voltage****\n \nValues differ from the physical hardware.  Enter each value directly as a decimal number.  \n \nVOUT_COMMAND (0x21) -- It is not necessary to set VOUT_MODE[4:0]\nVOUT_SCALE_LOOP (0x29)\n \n****Interleaving****\n \nINTERLEAVE (0x37) - only the interleave order is supported (bits [3:0])\n \n****Other Parameters****\n \nValues differ from the physical hardware.  Enter each value directly as a decimal number.  \n \nVIN_ON (0x35)\nVIN_OFF (0x36)\nTON_DELAY (0x60)\nTON_RISE (0x61)\n \n ***************************************************EXAMPLES*****************************************************\n \nExample 1: To set the output voltage to 750mV, enter "VOUT_COMMAND = 750m"\n \nExample 2: To set the scaling of the resistor divider to 0.66, enter "VOUT_SCALE_LOOP = 0.66"\n \nExample 3: To set the interleaving to 90 degrees, set "INTERLEAVE = 4"\n \n **************************************SYNCHRONIZATION FUNCTION****************************************\n \nThe model will automatically synchronize when a 0-3.3V, 50% duty cycle signal is applied to the SYNC pin.  \nEnabling/disabling the SYNC function (register 0xFE55[6]) is not necessary.  \n \n*******************************OTHER FUNCTIONS THAT ARE NOT MODELED ***************************\n \n-Fault handling.\n-Over-current conditions and regulation\n-Startup behavior.  Given the timescales involved, it is also generally impractical and unnecessary to simulate this)