* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3337.asc
* Generated by LTspice 26.0.1 for Windows.
* NOTES FOR SIMULATION\n \n--I2C communication and address related functions and pins are not modeled. \n \n--Changes to parameter values while the simulation is running will not take effect\n unless the simulation is stopped and restarted. This is different from the way\n the part operates which will respond to the changes while running.\n \n \nParameters A_REG and CD_REG can be defined by Ctrl + right click on the \nLTC3337 symbol.\n \nA_REG default of 65295 and CD_REG of 65530 will test this circuit with the over \ncounter IRQ pulling low in ~215ms. M is set by bits A[4:0] of A_REG and AMAX is \nset by bits A[15:8] of the A_REG. CD_REG set the initial count.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3337.asy)
RLoad BAT_OUT 0 160
V2 N002 0 3.3
C3 0 N001 1 IC=0.7
C2 N001 BAT_OUT 1 IC=0.7
R2 N002 _IRQ 10k
R1 N002 Batout_ok 10k
V1 BAT_IN 0 3.7 Rser=3m
C1 BAT_OUT 0 100
XU1 BAT_IN 0 N001 BAT_IN BAT_IN BAT_IN BAT_OUT BAT_OUT _IRQ Batout_ok BAT_OUT A_REG B_REG LTC3337 A_REG = 65295 CD_REG = 65530 ;pnba BAT_IN)GND)BAL)IPK0)IPK1)IPK2)BAT_OUT)AVcc)_IRQ)Batout_ok)DVcc)A_Reg)B_Reg
.tran 1
.lib LTC3337.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2124 972
WIRE -128 -64 -176 -64
WIRE 0 -64 -128 -64
WIRE 32 -64 0 -64
WIRE 416 -64 384 -64
WIRE 496 -64 416 -64
WIRE 576 -64 496 -64
WIRE 656 -64 576 -64
WIRE 672 -64 656 -64
WIRE 672 -32 672 -64
WIRE -176 -16 -176 -64
WIRE 576 -16 576 -64
WIRE 0 32 0 -64
WIRE 32 32 0 32
WIRE 416 32 416 -64
WIRE 416 32 384 32
WIRE 496 80 496 -64
WIRE 576 80 576 48
WIRE 672 80 672 48
WIRE -176 96 -176 64
WIRE 0 128 0 32
WIRE 32 128 0 128
WIRE 416 128 416 32
WIRE 416 128 384 128
WIRE 0 224 0 128
WIRE 32 224 0 224
WIRE 496 224 496 144
WIRE 496 224 384 224
WIRE 544 224 496 224
WIRE 672 224 608 224
WIRE 32 320 0 320
WIRE 448 320 384 320
WIRE 528 320 448 320
WIRE 656 320 608 320
WIRE 32 416 0 416
WIRE 432 416 384 416
WIRE 528 416 432 416
WIRE 656 416 656 320
WIRE 656 416 608 416
WIRE 688 416 656 416
WIRE 784 416 768 416
WIRE 208 512 208 496
SYMBOL cap 608 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1 IC=0.7
SYMBOL voltage -176 -32 R0
WINDOW 123 24 124 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=3m
SYMATTR InstName V1
SYMATTR Value 3.7
SYMBOL cap 560 -16 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMBOL res 656 -48 R0
SYMATTR InstName RLoad
SYMATTR Value 160
SYMBOL res 624 400 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL cap 480 144 M180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 1 IC=0.7
SYMBOL res 624 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL LTC3337 208 128 R0
SYMATTR InstName U1
SYMBOL voltage 672 416 M90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
SYMATTR InstName V2
SYMATTR Value 3.3
FLAG -176 96 0
FLAG 576 80 0
FLAG 672 80 0
FLAG -128 -64 BAT_IN
FLAG 656 -64 BAT_OUT
FLAG 784 416 0
FLAG 0 320 A_REG
FLAG 0 416 B_REG
FLAG 208 512 0
FLAG 672 224 0
FLAG 448 320 Batout_ok
FLAG 432 416 _IRQ
TEXT 664 512 Left 2 !.tran 1
TEXT 824 -72 Left 2 ;NOTES FOR SIMULATION\n \n--I2C communication and address related functions and pins are not modeled.  \n \n--Changes to parameter values while the simulation is running will not take effect\n   unless the simulation is stopped and restarted. This is different from the way\n   the part operates which will respond to the changes while running.\n \n \nParameters A_REG and CD_REG can be defined by Ctrl + right click on the \nLTC3337 symbol.\n \nA_REG default of 65295 and CD_REG of 65530 will test this circuit with the over \ncounter IRQ pulling low in ~215ms. M is set by bits A[4:0] of A_REG and AMAX is \nset by bits A[15:8] of the A_REG. CD_REG set the initial count.