* Z:\home\khalils\Downloads\files\data\raw_asc\223cc65cb57e_schmidt_trigger2.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc Vin 0 {Vcc} 0.05
;.step param vcc 5 25 5
;.step temp list -25 25 125
R14 N007 N008 1k
R3 N001 Out 1k
M2 out2 N008 N010 N010 2N7002
R2 N001 N002 1k
Vin In 0 PWL(0 0 1 {VCC} 2 0 3 {VCC})
M1 N008 N009 N010 N010 2N7002
R6 N006 N005 10k
R15 N007 out2 1k
Vcc N001 0 {vcc}
V1 N007 0 {vcc}
R4 N005 0 100
Q2 Out N002 N005 0 2N3904
R16 N010 0 100
R1 N003 In 22k
Q3 0 N006 N004 0 2N3906
R5 N001 N004 1k
Q1 N002 N003 N005 0 2N3904
B2 N009 0 V={V(in)}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.param vcc=5
.tran 3
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 3940 3804
WIRE 208 -240 -320 -240
WIRE 400 -240 208 -240
WIRE 704 -240 400 -240
WIRE 864 -240 704 -240
WIRE 208 -176 208 -240
WIRE 400 -176 400 -240
WIRE 400 -80 400 -96
WIRE 512 -80 400 -80
WIRE 608 -80 512 -80
WIRE 704 -80 704 -240
WIRE 400 -48 400 -80
WIRE 208 0 208 -96
WIRE 336 0 208 0
WIRE 208 80 208 0
WIRE 32 128 0 128
WIRE 144 128 112 128
WIRE 704 160 704 0
WIRE 400 208 400 48
WIRE 496 208 400 208
WIRE 640 208 576 208
WIRE 208 240 208 176
WIRE 400 240 400 208
WIRE 400 240 208 240
WIRE 0 256 0 128
WIRE -320 272 -320 -240
WIRE 400 336 400 240
WIRE -320 480 -320 352
WIRE 0 480 0 336
WIRE 0 480 -320 480
WIRE 48 480 0 480
WIRE 400 480 400 416
WIRE 400 480 48 480
WIRE 704 480 704 256
WIRE 704 480 400 480
WIRE 48 560 48 480
WIRE 224 624 -96 624
WIRE 352 624 224 624
WIRE 752 624 352 624
WIRE 224 656 224 624
WIRE 352 656 352 624
WIRE 352 880 352 736
WIRE 448 880 352 880
WIRE 528 880 448 880
WIRE 352 896 352 880
WIRE 224 976 224 736
WIRE 304 976 224 976
WIRE -96 1024 -96 624
WIRE 224 1040 224 976
WIRE 176 1120 48 1120
WIRE 224 1168 224 1136
WIRE 352 1168 352 992
WIRE 352 1168 224 1168
WIRE 48 1184 48 1120
WIRE 224 1216 224 1168
WIRE -96 1360 -96 1104
WIRE 48 1360 48 1264
WIRE 48 1360 -96 1360
WIRE 224 1360 224 1296
WIRE 224 1360 48 1360
WIRE 576 1360 224 1360
WIRE -96 1392 -96 1360
SYMBOL res 128 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 22k
SYMBOL res 688 -96 R0
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL res 384 320 R0
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL voltage -96 1008 R0
SYMATTR InstName V1
SYMATTR Value {vcc}
SYMBOL nmos 304 896 R0
SYMATTR InstName M2
SYMATTR Value 2N7002
SYMBOL pnp 640 256 M180
SYMATTR InstName Q3
SYMATTR Value 2N3906
SYMBOL npn 336 -48 R0
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL npn 144 80 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 336 640 R0
SYMATTR InstName R15
SYMATTR Value 1k
SYMBOL voltage -320 256 R0
SYMATTR InstName Vcc
SYMATTR Value {vcc}
SYMBOL nmos 176 1040 R0
SYMATTR InstName M1
SYMATTR Value 2N7002
SYMBOL res 208 1200 R0
SYMATTR InstName R16
SYMATTR Value 100
SYMBOL bv 48 1168 R0
SYMATTR InstName B2
SYMATTR Value V={V(in)}
SYMBOL res 192 -192 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 208 640 R0
SYMATTR InstName R14
SYMATTR Value 1k
SYMBOL res 592 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 10k
SYMBOL voltage 0 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PWL(0 0 1 {VCC} 2 0 3 {VCC})
SYMBOL res 384 -192 R0
SYMATTR InstName R3
SYMATTR Value 1k
FLAG 48 560 0
FLAG 512 -80 Out
FLAG 0 128 In
FLAG -96 1392 0
FLAG 448 880 out2
TEXT -192 -96 Left 2 ;.dc Vin 0 {Vcc} 0.05
TEXT -192 -152 Left 2 !;.step param vcc 5 25 5\n.param vcc=5
TEXT -80 -376 Left 2 !;.step temp list -25 25 125
TEXT -352 1416 Left 2 !.tran 3