* Z:\tmp\asc_dec_bjh7r6w2\18113fa9f687_EC1_2b_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
L7 N007 N008 375n
L10 N010 N011 375n
C6 N007 0 66.667p
C4 N005 0 66.667p
L17 N017 N018 375n
C13 N014 0 66.667p
C1 N002 0 66.667p
C19 N020 0 66.667p
C8 N009 0 66.667p
L14 N014 N015 375n
L18 N018 N019 375n
V1 N001 0 PULSE(0 10 1n 1n 1n 0.5 1) Rser=5
L2 N002 N003 375n
L1 N001 N002 375n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2776 680
WIRE 48 80 -32 80
WIRE 144 80 128 80
WIRE 240 80 224 80
WIRE 256 80 240 80
WIRE 352 80 336 80
WIRE 368 80 352 80
WIRE 464 80 448 80
WIRE 480 80 464 80
WIRE 576 80 560 80
WIRE 592 80 576 80
WIRE 688 80 672 80
WIRE 704 80 688 80
WIRE 800 80 784 80
WIRE 816 80 800 80
WIRE 912 80 896 80
WIRE 928 80 912 80
WIRE 1024 80 1008 80
WIRE 1040 80 1024 80
WIRE 1136 80 1120 80
WIRE 1168 80 1136 80
WIRE 1264 80 1248 80
WIRE 1360 80 1344 80
WIRE 1376 80 1360 80
WIRE 1472 80 1456 80
WIRE 1488 80 1472 80
WIRE 1584 80 1568 80
WIRE 1600 80 1584 80
WIRE 1696 80 1680 80
WIRE 1712 80 1696 80
WIRE 1808 80 1792 80
WIRE 1824 80 1808 80
WIRE 1920 80 1904 80
WIRE 1936 80 1920 80
WIRE 2032 80 2016 80
WIRE 2048 80 2032 80
WIRE 2144 80 2128 80
WIRE 2160 80 2144 80
WIRE 2256 80 2240 80
WIRE 2368 80 2256 80
WIRE 128 128 128 80
WIRE 240 128 240 80
WIRE 352 128 352 80
WIRE 464 128 464 80
WIRE 576 128 576 80
WIRE 688 128 688 80
WIRE 800 128 800 80
WIRE 912 128 912 80
WIRE 1024 128 1024 80
WIRE 1136 128 1136 80
WIRE 1360 128 1360 80
WIRE 1472 128 1472 80
WIRE 1584 128 1584 80
WIRE 1696 128 1696 80
WIRE 1808 128 1808 80
WIRE 1920 128 1920 80
WIRE 2032 128 2032 80
WIRE 2144 128 2144 80
WIRE 2256 128 2256 80
WIRE -32 144 -32 80
WIRE 128 208 128 192
WIRE 240 208 240 192
WIRE 240 208 128 208
WIRE 352 208 352 192
WIRE 352 208 240 208
WIRE 464 208 464 192
WIRE 464 208 352 208
WIRE 576 208 576 192
WIRE 576 208 464 208
WIRE 688 208 688 192
WIRE 688 208 576 208
WIRE 800 208 800 192
WIRE 800 208 688 208
WIRE 912 208 912 192
WIRE 912 208 800 208
WIRE 1024 208 1024 192
WIRE 1024 208 912 208
WIRE 1136 208 1136 192
WIRE 1136 208 1024 208
WIRE 1248 208 1136 208
WIRE 1360 208 1360 192
WIRE 1360 208 1248 208
WIRE 1472 208 1472 192
WIRE 1472 208 1360 208
WIRE 1584 208 1584 192
WIRE 1584 208 1472 208
WIRE 1696 208 1696 192
WIRE 1696 208 1584 208
WIRE 1808 208 1808 192
WIRE 1808 208 1696 208
WIRE 1920 208 1920 192
WIRE 1920 208 1808 208
WIRE 2032 208 2032 192
WIRE 2032 208 1920 208
WIRE 2144 208 2144 192
WIRE 2144 208 2032 208
WIRE 2256 208 2256 192
WIRE 2256 208 2144 208
WIRE -32 224 -32 208
WIRE -32 256 -32 224
WIRE 576 256 576 208
WIRE 1696 256 1696 208
SYMBOL ind 688 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L7
SYMATTR Value 375n
SYMBOL ind 1024 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L10
SYMATTR Value 375n
SYMBOL cap 672 128 R0
SYMATTR InstName C6
SYMATTR Value 66.667p
SYMBOL cap 448 128 R0
SYMATTR InstName C4
SYMATTR Value 66.667p
SYMBOL ind 1808 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L17
SYMATTR Value 375n
SYMBOL cap 1456 128 R0
SYMATTR InstName C13
SYMATTR Value 66.667p
SYMBOL cap 112 128 R0
SYMATTR InstName C1
SYMATTR Value 66.667p
SYMBOL cap 2128 128 R0
SYMATTR InstName C19
SYMATTR Value 66.667p
SYMBOL cap 896 128 R0
SYMATTR InstName C8
SYMATTR Value 66.667p
SYMBOL ind 1472 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L14
SYMATTR Value 375n
SYMBOL ind 1920 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L18
SYMATTR Value 375n
SYMBOL voltage -32 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 10 1n 1n 1n 0.5 1)
SYMATTR SpiceLine Rser=5
SYMBOL ind 128 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 375n
SYMBOL ind 32 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 375n
FLAG -32 256 0
FLAG 576 256 0
FLAG 1696 256 0