Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4414.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
C1 N002 0 4.7
R1 N002 0 2
R2 N004 N005 470K
V2 N005 0 5
XU1 N001 0 0 N004 N002 N003 LTC4414 ;pnba Vin)CTL)GND)STAT)Sense)Gate
MQ1 N001 N003 N002 N002 FDR840P
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4414.asy)
.lib LTC4414.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 0 -16 0
WIRE 384 0 352 0
WIRE 448 0 384 0
WIRE 544 0 448 0
WIRE 448 16 448 0
WIRE 544 16 544 0
WIRE -16 112 -16 0
WIRE -16 112 -128 112
WIRE 16 112 -16 112
WIRE 384 112 384 0
WIRE 384 112 272 112
WIRE 448 112 448 80
WIRE 544 112 544 96
WIRE -128 128 -128 112
WIRE 16 192 -16 192
WIRE 336 192 336 48
WIRE 336 192 272 192
WIRE -128 224 -128 208
WIRE 16 272 -16 272
WIRE 288 272 272 272
WIRE 416 272 368 272
WIRE 416 288 416 272
WIRE 416 384 416 368
FLAG -16 192 0
FLAG -128 224 0
FLAG -16 272 0
FLAG 448 112 0
FLAG 544 112 0
FLAG 416 384 0
SYMBOL voltage -128 112 R0
WINDOW 0 17 15 Left 2
WINDOW 3 21 97 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 432 16 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL res 528 0 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL res 272 288 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 470K
SYMBOL voltage 416 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL LTC4414 144 192 R0
SYMATTR InstName U1
SYMBOL pmos 256 48 R270
WINDOW 0 52 48 VTop 2
WINDOW 3 -14 72 VLeft 2
SYMATTR InstName Q1
SYMATTR Value FDR840P
TEXT 40 336 Left 2 !.tran 100m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3e897243c102_zero_gain_ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
* Zero Gain Amplifier
Q1 2_+ 2+ 0 0 2N3904
R1 W1 2+ 2.2k
R2 2+ 2_+ 47
V1 W1 0 PWL REPEAT FOREVER (0 0 0.5m 3 1m 0) ENDREPEAT
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -224 208 -272
WIRE 208 -224 128 -224
WIRE -240 -176 -240 -224
WIRE 208 -176 208 -224
WIRE -240 -48 -240 -96
WIRE 208 -48 208 -96
WIRE 208 -48 96 -48
WIRE 208 -32 208 -48
WIRE 288 -32 208 -32
WIRE 208 -16 208 -32
WIRE 208 80 208 64
WIRE 288 80 208 80
WIRE 208 112 208 80
WIRE 96 160 96 -48
WIRE 144 160 96 160
WIRE 208 288 208 208
IOPIN 128 -224 In
IOPIN -240 -224 In
IOPIN 208 -272 In
IOPIN 288 -32 In
IOPIN 288 80 In
SYMBOL res 192 -32 R0
SYMATTR InstName R2
SYMATTR Value 47
SYMBOL npn 144 112 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage -240 -192 R0
WINDOW 3 -455 192 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PWL REPEAT FOREVER (0 0 0.5m 3 1m 0) ENDREPEAT
SYMATTR InstName V1
SYMBOL res 192 -192 R0
SYMATTR InstName R1
SYMATTR Value 2.2k
FLAG 208 288 0
FLAG 128 -224 W1
FLAG -240 -48 0
FLAG -240 -224 W1
FLAG 208 -272 1+
FLAG 288 -32 2+
FLAG 288 80 2_+
TEXT -136 296 Left 2 !.tran 10m
TEXT -32 -416 Left 2 ;Zero Gain Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\a09664f18a47_Draft2P.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 1.8
VUDS N001 N002 0.9
M1 N001 VG N002 N001 pch l=lset w=wset
VGS2 N001 VG 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib cmos018.txt
.dc VGS2 0 1 1m
.param wset=table(n, 1,0.22u, 2,1u, 3,2u, 4,2u, 5,5u, 6,5u, 7,10u, 8,10u, 9,40u)
.param lset=table(n, 1,0.18u, 2,0.5u, 3,0.5u, 4,1u, 5,1u, 6,2u, 7,5u, 8,10u, 9,10u)
.step param n 1 9 1
.meas DC UTH FIND V(VG) WHEN Id(M1)=100n*wset/lset
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1356 680
WIRE 224 176 32 176
WIRE 544 176 224 176
WIRE 720 176 544 176
WIRE 32 192 32 176
WIRE 224 224 224 176
WIRE 240 224 224 224
WIRE 544 224 544 176
WIRE 720 224 720 176
WIRE 240 272 240 224
WIRE 240 272 224 272
WIRE 32 304 32 272
WIRE 112 304 32 304
WIRE 176 304 112 304
WIRE 224 352 224 320
WIRE 544 352 544 304
WIRE 544 352 224 352
WIRE 720 368 720 304
SYMBOL voltage 720 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL pmos4 176 224 R0
WINDOW 123 75 75 Left 2
WINDOW 0 75 14 Left 2
WINDOW 3 75 45 Left 2
SYMATTR Value2 l=lset w=wset
SYMATTR InstName M1
SYMATTR Value pch
SYMBOL voltage 544 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName UDS
SYMATTR Value 0.9
SYMBOL voltage 32 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS2
SYMATTR Value 1
FLAG 112 304 VG
FLAG 720 368 0
TEXT -40 -64 Left 2 !.lib cmos018.txt
TEXT -40 96 Left 2 !.dc VGS2 0 1 1m
TEXT -40 -16 Left 2 !.param wset=table(n, 1,0.22u, 2,1u, 3,2u, 4,2u, 5,5u, 6,5u, 7,10u, 8,10u, 9,40u)\n.param lset=table(n, 1,0.18u, 2,0.5u, 3,0.5u, 4,1u, 5,1u, 6,2u, 7,5u, 8,10u, 9,10u)\n.step param n 1 9 1\n.meas DC UTH FIND V(VG) WHEN Id(M1)=100n*wset/lset
* Z:\home\khalils\Downloads\files\data\raw_asc\05fdd6c026aa_Prob_4b1.asc
* Generated by LTspice 26.0.1 for Windows.
* Short Channel
* l=0.18u w=0.27u
;.dc V1 0 1 1m
M1 Vds2 Vgs2 0 0 nch_tt l=0.18u w=0.27u
V2 Vds2 0 1.8V
V1 Vgs2 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.dc V2 0 1.8 0.01 V1 0 1 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 80 256 80
WIRE 256 96 256 80
WIRE 256 96 112 96
WIRE 112 112 112 96
WIRE 256 112 256 96
WIRE -64 192 -96 192
WIRE 64 192 -64 192
WIRE -64 208 -64 192
WIRE 112 224 112 208
WIRE 256 224 256 192
WIRE -64 304 -64 288
IOPIN -96 192 In
IOPIN 288 80 Out
SYMBOL voltage 256 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.8V
SYMBOL voltage -64 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL nmos 64 112 R0
SYMATTR InstName M1
SYMATTR Value nch_tt
SYMATTR Value2 l=0.18u w=0.27u
FLAG -64 304 0
FLAG 112 224 0
FLAG 256 224 0
FLAG -96 192 Vgs2
FLAG 288 80 Vds2
TEXT 0 24 Left 2 ;Short Channel
TEXT 384 144 Left 2 !.include TSMC180.lib
TEXT 384 200 Left 2 !.dc V2 0 1.8 0.01 V1 0 1 0.2
TEXT 384 176 Left 2 !;.dc  V1 0 1 1m
TEXT 112 264 Left 2 ;l=0.18u w=0.27u
* Z:\tmp\asc_dec_bjh7r6w2\12697a5f4c18_Schematic_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N004 0 PULSE(0 10 0 0 0 5.8u 10u)
V1 N001 0 12
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 112 80 48 80
WIRE 256 80 208 80
WIRE 272 80 256 80
WIRE 400 80 336 80
WIRE 48 128 48 80
WIRE 256 128 256 80
WIRE 192 160 192 128
WIRE 48 272 48 208
WIRE 192 272 192 240
WIRE 192 272 48 272
WIRE 256 272 256 208
WIRE 256 272 192 272
WIRE 320 272 256 272
WIRE 400 272 320 272
WIRE 320 304 320 272
SYMBOL voltage 192 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 10 0 0 0 5.8u 10u)
SYMBOL voltage 48 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 320 304 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4528-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4528-1.asy)
Rload OUT 0 10K
XU1 IN N001 +V -V OUT ADA4528 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 10K
V1 +V 0 2.5
R2 OUT N001 10K
Vin IN 0 SINE(0 1 10K)
V2 -V 0 -2.5
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 128 -1152 128 -1168
WIRE 240 -1152 240 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 128 -1056 128 -1072
WIRE 240 -1056 240 -1072
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 128 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL Opamps\\ADA4528-1 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 240 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
FLAG 128 -1168 +V
FLAG 128 -1056 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 240 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 240 -1056 0
TEXT 736 -952 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\001f78b224ad_2_bit_Multiplier.asc
* Generated by LTspice 26.0.1 for Windows.
A1 N001 0 0 0 N002 0 op1 0 AND
A2 N002 0 0 0 N006 0 N003 0 AND
A3 N001 0 0 0 N009 0 N004 0 AND
A4 N006 0 0 0 N009 0 N007 0 AND
A5 N004 0 0 0 N003 0 N008 0 AND
A6 N003 0 0 0 N004 0 op2 0 XOR
A7 N007 0 0 0 N008 0 op4 0 AND
A8 N005 0 0 0 N007 0 op3 0 AND
A9 op1 0 0 0 0 N005 0 0 BUF
V1 N001 0 5
V3 N006 0 5
V2 N002 0 5
V4 N009 0 0
.tran 120
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
WIRE -512 64 -832 64
WIRE 128 64 -512 64
WIRE 512 80 192 80
WIRE 640 80 512 80
WIRE 128 128 -64 128
WIRE 272 160 224 160
WIRE 400 160 272 160
WIRE -64 176 -64 128
WIRE -64 176 -256 176
WIRE 128 176 -64 176
WIRE 784 176 464 176
WIRE 224 192 224 160
WIRE 224 192 192 192
WIRE -256 208 -256 176
WIRE -256 208 -832 208
WIRE 400 224 320 224
WIRE 512 224 512 80
WIRE 512 224 496 224
WIRE 544 224 512 224
WIRE 624 224 608 224
WIRE 128 240 -560 240
WIRE 320 272 320 224
WIRE 320 272 256 272
WIRE -512 288 -512 64
WIRE 128 288 -512 288
WIRE 624 288 544 288
WIRE 256 304 256 272
WIRE 256 304 192 304
WIRE 320 304 320 272
WIRE 416 304 320 304
WIRE -656 320 -832 320
WIRE -560 320 -560 240
WIRE -560 320 -656 320
WIRE 512 320 480 320
WIRE 128 352 -432 352
WIRE 272 368 272 160
WIRE 416 368 272 368
WIRE -656 400 -656 320
WIRE 128 400 -656 400
WIRE 624 400 576 400
WIRE 544 416 544 288
WIRE 544 416 192 416
WIRE 576 416 576 400
WIRE 576 416 544 416
WIRE -720 448 -832 448
WIRE -432 448 -432 352
WIRE -432 448 -720 448
WIRE 128 464 64 464
WIRE 512 464 512 320
WIRE 624 464 512 464
WIRE -720 528 -720 448
WIRE 64 528 64 464
WIRE 64 528 -720 528
IOPIN 640 80 Out
IOPIN 784 176 Out
IOPIN 688 240 Out
IOPIN 688 416 Out
SYMBOL Digital\\and 656 368 R0
SYMATTR InstName A7
SYMBOL Digital\\xor 448 128 R0
SYMATTR InstName A6
SYMBOL voltage -832 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL Digital\\inv 544 160 R0
SYMATTR InstName A9
SYMBOL Digital\\and 656 192 R0
SYMATTR InstName A8
SYMBOL voltage -832 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL Digital\\and 160 32 R0
SYMATTR InstName A1
SYMBOL Digital\\and 160 368 R0
SYMATTR InstName A4
SYMBOL Digital\\and 160 144 R0
SYMATTR InstName A2
SYMBOL Digital\\and 448 272 R0
SYMATTR InstName A5
SYMBOL voltage -832 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -832 432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 0
SYMBOL Digital\\and 160 256 R0
SYMATTR InstName A3
FLAG -832 144 0
FLAG -832 288 0
FLAG -832 400 0
FLAG -832 528 0
FLAG 640 80 op1
FLAG 784 176 op2
FLAG 688 240 op3
FLAG 688 416 op4
TEXT -866 552 Left 2 !.tran 120
* Z:\home\khalils\Downloads\files\data\raw_asc\60177209dd3f_STW9N150_test.asc
* Generated by LTspice 26.0.1 for Windows.
* Ctrl-right-mouse-click on the transistor\nto change the Prefix to X in the full dialog.
XM1 out N003 0 STW9N150 ;pnba D)G)S
V2 N001 0 1000
V1 N002 0 0
R1 N001 out 10k
R2 N002 N003 10
.dc V1 0 10 .01
.include STW9N150.lib
.options gmin=1e-10 abstol=1e-10 reltol=0.03
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -80 -16 -80
WIRE -16 -32 -16 -80
WIRE 208 -32 208 -80
WIRE -16 80 -16 48
WIRE 208 80 208 48
WIRE 304 80 208 80
WIRE 208 96 208 80
WIRE 48 176 -16 176
WIRE 160 176 128 176
WIRE -16 208 -16 176
WIRE -16 320 -16 288
WIRE 208 320 208 192
WIRE 208 320 -16 320
WIRE -16 352 -16 320
SYMBOL voltage -16 192 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL res 32 192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL voltage -16 -48 R0
SYMATTR InstName V2
SYMATTR Value 1000
SYMBOL res 192 -48 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL nmos 160 96 R0
SYMATTR InstName M1
SYMATTR Value STW9N150
SYMATTR Prefix X
FLAG -16 352 0
FLAG -16 80 0
FLAG 304 80 out
TEXT -88 -144 Left 0 ;Ctrl-right-mouse-click on the transistor\nto change the Prefix to X in the full dialog.
TEXT -96 -240 Left 0 !.dc V1 0 10 .01
TEXT -96 -272 Left 0 !.include STW9N150.lib
TEXT -96 -208 Left 0 !.options gmin=1e-10 abstol=1e-10 reltol=0.03
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3311-0.75.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3311-0.75.asy)
C1 OUT 0 47 x2
R3 OUT N001 500K
R5 N006 0 274K
C3 N004 0 330p
R4 N005 N004 4.99k
V1 IN 0 3.3
XU1 IN IN N002 OUT 0 0 N006 N001 IN N005 N003 LTC3311-0.75 ;pnba Vin)EN)SW)OUT)Agnd)Pgnd)Rt)Pgood)Mode/Sync)Ith)SSTT
Rload OUT 0 0.094
C2 N003 0 3.3n
L1 N002 OUT 80n Rser=2m
.tran .4m startup
.lib LTC3311-0.75.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2648 1864
WIRE 1536 1248 1376 1248
WIRE 1712 1248 1536 1248
WIRE 1376 1264 1376 1248
WIRE 1712 1280 1712 1248
WIRE 1536 1328 1536 1248
WIRE 1552 1328 1536 1328
WIRE 1904 1328 1872 1328
WIRE 2016 1328 1984 1328
WIRE 1376 1360 1376 1344
WIRE 1536 1424 1536 1328
WIRE 1552 1424 1536 1424
WIRE 1904 1424 1872 1424
WIRE 2016 1424 2016 1328
WIRE 2016 1424 1984 1424
WIRE 2096 1424 2016 1424
WIRE 2208 1424 2096 1424
WIRE 2096 1440 2096 1424
WIRE 2208 1440 2208 1424
WIRE 1472 1520 1456 1520
WIRE 1552 1520 1536 1520
WIRE 2016 1520 2016 1424
WIRE 2016 1520 1872 1520
WIRE 2096 1536 2096 1504
WIRE 2208 1536 2208 1520
WIRE 1424 1616 1360 1616
WIRE 1552 1616 1504 1616
WIRE 1904 1616 1872 1616
WIRE 1360 1632 1360 1616
WIRE 1904 1632 1904 1616
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
WIRE 1360 1712 1360 1696
WIRE 1904 1728 1904 1712
SYMBOL VOLTAGE 1376 1248 R0
SYMATTR Value 3.3
SYMATTR InstName V1
SYMBOL ind 1888 1440 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 80n
SYMATTR SpiceLine Rser=2m
SYMBOL res 1888 1616 R0
SYMATTR InstName R5
SYMATTR Value 274K
SYMBOL res 2000 1312 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 500K
SYMBOL res 2192 1424 R0
SYMATTR InstName Rload
SYMATTR Value 0.094
SYMBOL cap 1344 1632 R0
SYMATTR InstName C3
SYMATTR Value 330p
SYMBOL cap 1536 1504 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 3.3n
SYMBOL LTC3311-0.75 1712 1456 R0
SYMATTR InstName U1
SYMBOL cap 2080 1440 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 x2
SYMATTR InstName C1
SYMATTR Value 47
SYMBOL res 1520 1600 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 4.99k
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1376 1360 0
FLAG 2208 1536 0
FLAG 1456 1520 0
FLAG 2208 1424 OUT
FLAG 1376 1248 IN
FLAG 1360 1712 0
FLAG 2096 1536 0
FLAG 1904 1728 0
TEXT 2048 1616 Left 2 !.tran .4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1493.asc
* Generated by LTspice 26.0.1 for Windows.
* Precision AC to DC Converter(Full Wave Rectifier and Filter)
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1493.asy)
V3 IN 0 SINE(0 1 100 .3 0 0 75)
R5 N001 0 6.49K
XU1 0 N003 +V 0 N005 LT1492 ;pnba In+)In-)V+)V-)OUT
R1 N004 N003 4.99K
R4 N002 N001 10K
XU2 N004 N001 +V 0 N002 LT1492 ;pnba In+)In-)V+)V-)OUT
R3 N005 N004 15K
C1 OUT 0 10
R2 N003 IN 10K
R6 OUT N002 10K
V1 +V 0 9
.tran 2
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -32 -48 -32 -64
WIRE 320 -48 304 -48
WIRE 416 -48 400 -48
WIRE 448 -48 416 -48
WIRE 544 -48 528 -48
WIRE -32 48 -32 32
WIRE 480 48 480 32
WIRE 416 64 416 -48
WIRE 448 64 416 64
WIRE 544 80 544 -48
WIRE 544 80 512 80
WIRE 592 80 544 80
WIRE 704 80 672 80
WIRE 752 80 704 80
WIRE 32 96 -176 96
WIRE 128 96 112 96
WIRE 176 96 128 96
WIRE 288 96 256 96
WIRE 448 96 288 96
WIRE 704 96 704 80
WIRE -176 112 -176 96
WIRE 288 128 288 96
WIRE 480 128 480 112
WIRE 704 176 704 160
WIRE -176 208 -176 192
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 288 240 288 208
WIRE 288 240 224 240
WIRE 160 256 128 256
WIRE 192 288 192 272
SYMBOL res 272 224 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 15K
SYMBOL res 416 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 6.49K
SYMBOL res 688 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 10K
SYMBOL opamps\\LT1493 480 16 R0
SYMATTR InstName U2
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage -32 -64 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL opamps\\LT1493 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -176 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100 .3 0 0 75)
SYMBOL cap 688 96 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 272 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 4.99K
SYMBOL res 544 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10K
FLAG -32 48 0
FLAG 192 192 +V
FLAG -32 -64 +V
FLAG -176 208 0
FLAG 128 256 0
FLAG 192 288 0
FLAG 480 32 +V
FLAG 480 128 0
FLAG 304 -48 0
FLAG 704 176 0
FLAG 752 80 OUT
FLAG -176 96 IN
TEXT 560 232 Left 2 !.tran 2
TEXT 304 -128 Bottom 2 ;Precision AC to DC Converter(Full Wave Rectifier and Filter)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7105-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7105-3.3.asy)
C2 N002 0 2.7n
R1 OUT N001 100k
C1 OUT 0 2.2 Rser=1.5m
XU2 IN OUT IN N002 OUT 0 N001 ADP7105 Vref=3.3 ;pnba Vin)Sense)EN)SS)Vout)GND)PG
Rload OUT 0 11
V1 IN 0 4.3
.tran 6m startup
.lib ADP7105.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE 384 128 352 128
WIRE 464 128 464 32
WIRE 464 128 384 128
WIRE 560 128 464 128
WIRE -32 144 -32 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 128
WIRE 384 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 11
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL ADP7105-3.3 224 128 R0
SYMATTR InstName U2
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 2.7n
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.3
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -32 32 IN
FLAG 560 128 OUT
TEXT 432 296 Left 2 !.tran 6m startup
* Z:\tmp\asc_dec_bjh7r6w2\1402efc88fc6_Swept_Sine3_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
Vs NC_01 0 0
A1 f 0 0 0 0 C S 0 MODULATOR space=0 mark={f2} Vhigh={Amp} Vlow={-Amp}
S2 fh2 NC_05 N001 0 XSW
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1680 680
WIRE 592 128 352 128
WIRE 64 192 -64 192
WIRE 112 192 64 192
WIRE 144 192 112 192
WIRE 352 192 352 128
WIRE 352 192 224 192
WIRE 416 192 352 192
WIRE 592 192 560 192
WIRE -112 256 -192 256
WIRE 352 256 352 192
WIRE 592 256 560 256
WIRE -192 272 -192 256
WIRE 112 368 112 192
WIRE 128 368 112 368
WIRE 64 432 64 192
WIRE 160 432 64 432
WIRE 160 464 160 432
WIRE 160 576 160 544
SYMBOL voltage 64 480 R0
WINDOW 0 -52 17 Left 0
WINDOW 3 -53 52 Left 0
SYMATTR InstName Vs
SYMATTR Value 0
SYMBOL SpecialFunctions\\modulate2 416 192 R0
WINDOW 3 0 112 Left 0
WINDOW 123 0 130 Left 0
WINDOW 39 0 148 Left 0
WINDOW 0 0 -46 Left 0
SYMATTR Value space=0 mark={f2}
SYMATTR Value2 Vhigh={Amp}
SYMATTR SpiceLine Vlow={-Amp}
SYMATTR InstName A1
SYMBOL sw -64 176 R0
WINDOW 0 27 40 Left 0
SYMATTR InstName S2
SYMATTR Value XSW
FLAG 352 336 0
FLAG 592 192 S
FLAG 592 256 C
FLAG 592 128 f
FLAG 128 368 fh2
FLAG -112 208 0
FLAG -192 352 0
FLAG -64 352 0
FLAG 160 576 0
FLAG 64 576 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1260.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1260.asy)
R2 N001 0 1.6K
V1 +V 0 5
R1 OUT N001 1.6K
V3 IN 0 SINE(0 1 1K)
V2 -V 0 -5
XU1 IN N001 +V -V OUT LT1259 ;pnba In+)In-)V+)V-)OUT
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -288 144 -288 128
WIRE -160 144 -160 128
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE -288 240 -288 224
WIRE -160 240 -160 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 288 240 256 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL opamps\\LT1260 192 176 R0
SYMATTR InstName U1
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1.6K
SYMBOL voltage -160 128 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1.6K
SYMBOL voltage -288 128 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
FLAG -160 240 0
FLAG 192 192 +V
FLAG -160 128 +V
FLAG 192 288 -V
FLAG -288 240 0
FLAG -288 128 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 288 240 OUT
FLAG 0 256 IN
TEXT 264 336 Left 2 !.tran 3m