Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\cab8a9ba309f_TransmissionLineInverter.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax. The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors. A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements. One for the normal(differential) mode and\nthe other for the common mode. Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world. These modes\nwith have different propagation speeds and impedances. If both modes\nare modeled, then you can simulate a transmission line inverter.
T2 0 0 OUT 0 Td=30n Z0=150
T1 IN 0 0 OUT Td=50n Z0=50
V1 IN 0 PULSE(0 1 0 1n 1n 10n) Rser=50
.tran 0 500n 0 1n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 680
WIRE 128 192 -368 192
WIRE 320 192 224 192
WIRE -368 208 -368 192
WIRE 128 224 64 224
WIRE 288 224 224 224
WIRE 64 272 64 224
WIRE 64 272 16 272
WIRE 288 272 288 224
WIRE 336 272 288 272
WIRE -368 304 -368 288
WIRE 64 304 64 272
WIRE 128 304 64 304
WIRE 288 304 288 272
WIRE 288 304 224 304
WIRE 128 336 64 336
WIRE 288 336 224 336
WIRE 64 368 64 336
WIRE 288 368 288 336
SYMBOL voltage -368 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 56 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1n 1n 10n)
SYMBOL tline 176 208 R0
WINDOW 0 2 -19 Bottom 2
WINDOW 3 3 20 Top 2
SYMATTR InstName T1
SYMBOL tline 176 320 R0
WINDOW 0 -1 -21 Bottom 2
WINDOW 3 0 21 Top 2
SYMATTR InstName T2
SYMATTR Value Td=30n Z0=150
FLAG 64 368 0
FLAG 288 368 0
FLAG -368 304 0
FLAG 16 272 0
FLAG 320 192 0
FLAG -368 192 IN
FLAG 336 272 OUT
TEXT 376 368 Left 2 !.tran 0 500n 0 1n
TEXT 0 408 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT -376 -200 Left 2 ;This examples illustrates the fundamental difference between a SPICE\ntransmission line element and a length of coax.  The SPICE transmission\nline element supports a single transmission line mode whereas a cable\nwill have any many modes as it has independent conductors.  A piece of\ncoax has two conductors, a central conductor and an outer shield, giving\nrise to two modes.\n \nTo model both modes of a length of coax, you will need two SPICE\ntransmission line elements.  One for the normal(differential) mode and\nthe other for the common mode.  Below, T1 is the normal mode and T2 is\nthe mode between the shield and the rest of the world.  These modes\nwith have different propagation speeds and impedances.  If both modes\nare modeled, then you can simulate a transmission line inverter.
* Z:\home\khalils\Downloads\files\data\raw_asc\1de267ccc5a5_ADG636.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 -V 0 -5
V4 IN 0 pulse(0 3.3 0 1u 1u 5m 10m)
R1 SA 0 1K
R2 SB 0 1K
V5 D 0 SINE(0 4 2k)
V3 N001 0 3.3
XU1 IN SA D SB -V 0 +V N001 ADG636 ;pnba IN)SA)D)SB)Vss)GND)Vdd)EN
.tran 30m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG636.asy)
.lib ADG636.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -752 -368 -800 -368
WIRE -800 -320 -800 -368
WIRE -1216 -256 -1216 -272
WIRE -1088 -256 -1104 -256
WIRE -928 -256 -1008 -256
WIRE -896 -256 -928 -256
WIRE -688 -224 -704 -224
WIRE -656 -224 -688 -224
WIRE -544 -224 -576 -224
WIRE -1040 -192 -1104 -192
WIRE -928 -192 -960 -192
WIRE -896 -192 -928 -192
WIRE -1216 -160 -1216 -176
WIRE -896 -128 -1072 -128
WIRE -640 -128 -704 -128
WIRE -640 -112 -640 -128
WIRE -1216 -48 -1216 -64
WIRE -1072 -16 -1072 -128
WIRE -736 0 -736 -16
WIRE -640 0 -640 -32
WIRE -864 16 -864 -16
WIRE -832 16 -864 16
WIRE -1216 48 -1216 32
WIRE -1072 80 -1072 64
FLAG -1216 48 0
FLAG -1216 -160 0
FLAG -1216 -272 +V
FLAG -1216 -64 -V
FLAG -544 -224 0
FLAG -1072 80 0
FLAG -1104 -256 0
FLAG -1104 -192 0
FLAG -752 -368 +V
FLAG -736 0 0
FLAG -832 16 -V
FLAG -640 0 0
FLAG -928 -256 SA
FLAG -928 -192 SB
FLAG -688 -224 D
FLAG -1072 -128 IN
SYMBOL voltage -1216 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -1216 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -1072 -32 R0
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMBOL res -992 -240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res -944 -176 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -672 -224 R270
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 47 41 VRight 2
WINDOW 3 -46 -22 VRight 2
SYMATTR InstName V5
SYMATTR Value SINE(0 4 2k)
SYMBOL voltage -640 -128 R0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL ADG636 -800 -176 R0
SYMATTR InstName U1
TEXT -664 64 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3463.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3463.asy)
C1 N006 N005 1
R2 N002 0 90.9K
Rload1 OUT1 0 1.5K
R3 N003 N004 154K
R1 OUT1 N002 1Meg
C2 OUT1 0 2.2
V1 IN 0 4
L2 IN N005 10
Rload2 OUT2 0 500
L1 IN N001 10
C3 OUT2 0 4.7
R4 N004 OUT2 1Meg
D1 OUT2 N006 1N5817
XU1 OUT1 N001 IN N005 N006 N004 N003 IN IN N002 0 LT3463 ;pnba Vout1)SW1)Vin)SW2)D2)FB2)Vref)_SHDN2)_SHDN1)FB1)GND
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LT3463.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 32 -160 32
WIRE 16 32 -64 32
WIRE 32 32 16 32
WIRE 128 32 112 32
WIRE 464 32 240 32
WIRE 560 32 464 32
WIRE 656 32 560 32
WIRE -160 48 -160 32
WIRE 464 48 464 32
WIRE 656 48 656 32
WIRE 560 64 560 32
WIRE 16 80 16 32
WIRE 128 80 128 32
WIRE 240 80 240 32
WIRE -160 144 -160 128
WIRE 464 144 464 128
WIRE 464 144 288 144
WIRE 560 144 560 128
WIRE 656 144 656 128
WIRE -64 160 -64 32
WIRE -32 160 -64 160
WIRE 464 160 464 144
WIRE 352 224 288 224
WIRE 464 256 464 240
WIRE -64 288 -64 160
WIRE -32 288 -64 288
WIRE 352 304 288 304
WIRE 352 352 352 304
WIRE 16 384 16 368
WIRE -64 464 -64 288
WIRE 0 464 -64 464
WIRE 128 464 128 368
WIRE 128 464 80 464
WIRE 144 464 128 464
WIRE 240 464 240 368
WIRE 240 464 208 464
WIRE 256 464 240 464
WIRE 352 464 352 432
WIRE 352 464 320 464
WIRE 464 464 352 464
WIRE 352 480 352 464
WIRE 464 480 464 464
WIRE 352 576 352 544
WIRE 464 576 464 560
SYMBOL res 336 336 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL res 640 32 R0
SYMATTR InstName Rload1
SYMATTR Value 1.5K
SYMBOL cap 336 480 R0
SYMATTR InstName C3
SYMATTR Value 4.7
SYMBOL PowerProducts\\LT3463 128 224 R0
SYMATTR InstName U1
SYMBOL schottky 320 448 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 448 144 R0
SYMATTR InstName R2
SYMATTR Value 90.9K
SYMBOL ind -16 480 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 10
SYMBOL ind 16 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL cap 544 64 R0
SYMATTR InstName C2
SYMATTR Value 2.2
SYMBOL res 448 464 R0
SYMATTR InstName Rload2
SYMATTR Value 500
SYMBOL res 448 32 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL cap 208 448 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 336 208 R0
SYMATTR InstName R3
SYMATTR Value 154K
SYMBOL voltage -160 32 R0
WINDOW 3 25 97 Left 2
SYMATTR Value 4
SYMATTR InstName V1
FLAG 16 384 0
FLAG -160 144 0
FLAG 464 256 0
FLAG 560 144 0
FLAG 352 576 0
FLAG 464 576 0
FLAG 656 144 0
FLAG -160 32 IN
FLAG 656 32 OUT1
FLAG 464 464 OUT2
TEXT 456 344 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7170-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7170-1.8.asy)
C2 N001 0 1n
C1 OUT 0 4.7 Rser=1.5m
Rload OUT 0 6
XU1 IN OUT IN N001 OUT 0 ADM7170-1.8 ;pnba Vin)Sense)EN)SS)Vout)GND
V1 IN 0 2.3
.tran 5m startup
.lib ADM7170-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 6
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.3
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADM7170-1.8 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\36d387ad9e0a_Filter01Fig.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
;tran 0.001 0.005 0
Vi i 0 AC 1.
V1 Vpp 0 {Vs}
V2 0 Vnn {Vs}
XU1 0 N001 Vpp Vnn o level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R1 N001 i {R1}
RL o 0 {RL}
C2 o N001 {C2}
R2 o N001 {R2}
.param Vs=?? R1=?? R2=?? C2=?? RL=??
.ac dec 10 1 100k
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE 144 0 64 0
WIRE 288 0 224 0
WIRE 64 96 64 0
WIRE 144 96 64 96
WIRE 288 96 288 0
WIRE 288 96 208 96
WIRE -96 144 -160 144
WIRE 64 144 64 96
WIRE 64 144 -16 144
WIRE 512 144 464 144
WIRE 464 160 464 144
WIRE 512 176 512 144
WIRE 64 208 64 144
WIRE 128 208 64 208
WIRE 288 224 288 96
WIRE 288 224 192 224
WIRE 320 224 288 224
WIRE -160 240 -160 144
WIRE 128 240 64 240
WIRE 320 256 320 224
WIRE 64 288 64 240
WIRE 320 352 320 336
WIRE -160 368 -160 320
SYMBOL res 304 240 R0
SYMATTR InstName RL
SYMATTR Value {RL}
SYMBOL voltage 512 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vs}
SYMBOL res 0 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL voltage -160 224 R0
WINDOW 3 41 76 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 45 41 Left 2
SYMATTR Value AC 1.
SYMATTR InstName Vi
SYMBOL res 240 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL Opamps\\UniversalOpamp2 160 224 R0
SYMATTR InstName U1
SYMBOL voltage 512 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value {Vs}
SYMBOL cap 208 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {C2}
FLAG 512 64 Vpp
FLAG 464 160 0
FLAG 512 256 Vnn
FLAG 320 352 0
FLAG -160 368 0
FLAG 160 192 Vpp
FLAG 160 256 Vnn
FLAG 64 288 0
FLAG 320 224 o
FLAG -160 144 i
TEXT -176 408 Left 2 !.param Vs=?? R1=?? R2=??  C2=?? RL=??
TEXT -400 -160 Left 2 !;tran 0.001 0.005 0
TEXT -104 368 Left 2 !.ac dec 10 1 100k
* Z:\home\khalils\Downloads\files\data\raw_asc\100b8c4a1db8_Level_shifter_simulation.asc
* Generated by LTspice 26.0.1 for Windows.
V3 In1 0 PULSE(0 3.3 1u 1u 1u 1m 2m)
R1 3V3 In1 1k
V1 3V3 0 3.3
V6 Sig2 0 PULSE(0 3.3 1u 1u 1u 1m 2m)
R2 5V0 In2 1k
M1 In2 3V3 In1 In1 Si7336ADP
V2 5V0 0 5
R3 -5V0 Sig1 1k
R4 3V3 Sig2 1k
V4 -5V0 0 -5
M2 Sig2 -5V0 Sig1 Sig1 Si7336ADP
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 5m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1400 680
WIRE 816 32 752 32
WIRE 928 32 816 32
WIRE 1184 32 1104 32
WIRE 0 48 -64 48
WIRE 112 48 0 48
WIRE 368 48 288 48
WIRE 816 48 816 32
WIRE 1104 48 1104 32
WIRE 0 64 0 48
WIRE 288 64 288 48
WIRE 928 144 928 32
WIRE 112 160 112 48
WIRE 816 192 816 128
WIRE 816 192 752 192
WIRE 912 192 816 192
WIRE 1104 192 1104 128
WIRE 1104 192 1008 192
WIRE 1184 192 1104 192
WIRE 0 208 0 144
WIRE 0 208 -64 208
WIRE 96 208 0 208
WIRE 288 208 288 144
WIRE 288 208 192 208
WIRE 368 208 288 208
WIRE 768 336 768 304
WIRE 1024 336 1024 304
WIRE -48 352 -48 320
WIRE 64 352 64 320
WIRE 208 352 208 320
WIRE 768 448 768 416
WIRE 1024 448 1024 416
WIRE -48 464 -48 432
WIRE 64 464 64 432
WIRE 208 464 208 432
SYMBOL nmos 1008 144 R90
WINDOW 0 -41 29 VRight 2
WINDOW 3 -17 -65 VRight 2
SYMATTR InstName M2
SYMATTR Value Si7336ADP
SYMBOL Misc\\battery -48 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 272 48 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res -16 48 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 1024 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value PULSE(0 3.3 1u 1u 1u 1m 2m)
SYMBOL Misc\\battery 768 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -5
SYMBOL voltage 208 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 3.3 1u 1u 1u 1m 2m)
SYMBOL Misc\\battery 64 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 1088 32 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL res 800 32 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL nmos 192 160 R90
WINDOW 0 -41 29 VRight 2
WINDOW 3 -17 -65 VRight 2
SYMATTR InstName M1
SYMATTR Value Si7336ADP
FLAG -64 48 3V3
FLAG -64 208 In1
FLAG 368 208 In2
FLAG -48 464 0
FLAG 64 464 0
FLAG -48 320 3V3
FLAG 64 320 5V0
FLAG 208 464 0
FLAG 208 320 In1
FLAG 368 48 5V0
FLAG 752 32 -5V0
FLAG 752 192 Sig1
FLAG 1184 192 Sig2
FLAG 768 448 0
FLAG 768 304 -5V0
FLAG 1024 448 0
FLAG 1024 304 Sig2
FLAG 1184 32 3V3
TEXT -128 488 Left 2 !.tran 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\19aa72b9e44b_pwm-highpass.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 SINE(1 1 100 0 0 0 10)
R1 N003 N002 301
R2 N005 N004 301
R3 N004 N002 1100
C1 N002 N001 100n
C2 N004 0 100n
C3 N005 N003 4800p
.tran 0 10mS 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 980 680
WIRE 400 240 176 240
WIRE 544 240 464 240
WIRE 704 240 544 240
WIRE 848 240 784 240
WIRE 912 240 848 240
WIRE 544 272 544 240
WIRE 848 288 848 240
WIRE 176 304 176 240
WIRE 400 384 320 384
WIRE 544 384 544 352
WIRE 544 384 464 384
WIRE 704 384 544 384
WIRE 848 384 848 352
WIRE 848 384 784 384
WIRE 912 384 848 384
WIRE 176 480 176 384
WIRE 320 480 320 384
WIRE 320 480 176 480
WIRE 176 496 176 480
FLAG 176 496 0
SYMBOL voltage 176 288 R0
SYMATTR InstName V1
SYMATTR Value SINE(1 1 100 0 0 0 10)
SYMBOL res 800 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL res 800 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 301
SYMBOL res 560 368 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 1100
SYMBOL cap 464 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL cap 464 368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL cap 864 352 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value 4800p
TEXT 168 136 Left 2 !.tran 0 10mS 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1007.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain 1000 Amplifier with .01% Accuracy
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1007.asy)
V2 -V 0 -15
R1 OUT N001 355K
R2 N001 0 365
V3 IN 0 SINE(0 1m .01)
V1 +V 0 15
XU1 IN N001 +V -V OUT LT1007 ;pnba In+)In-)V+)V-)OUT
.tran 300
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 160 96 128 96
WIRE 272 96 240 96
WIRE -272 176 -272 160
WIRE -144 176 -144 160
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 272 240 272 96
WIRE 272 240 224 240
WIRE 304 240 272 240
WIRE 160 256 0 256
WIRE -272 272 -272 256
WIRE -144 272 -144 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL opamps\\LT1007 192 176 R0
SYMATTR InstName U1
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL voltage -144 160 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 355K
SYMBOL voltage -272 160 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1m .01)
FLAG -144 272 0
FLAG 192 192 +V
FLAG -144 160 +V
FLAG 192 288 -V
FLAG -272 272 0
FLAG -272 160 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 304 240 OUT
FLAG 0 256 IN
TEXT 288 392 Left 2 !.tran 300
TEXT 136 16 Bottom 2 ;Gain 1000 Amplifier with .01% Accuracy
* Z:\home\khalils\Downloads\files\data\raw_asc\0f49f459876d_LTMKI.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 13.5
XU2 N002 N004 N001 0 N003 LT1001 ;pnba In+)In-)V+)V-)OUT
R1 N001 N002 200k
R2 N003 N004 1k
R3 N004 0 2k
R5 N003 N002 1k
R4 N003 0 10k
XU1 N005 0 N001 0 ADR1399H ;pnba 1)2)3)4
R6 N002 N005 1e-6
.tran 10
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR1399H.asy)
.lib ADR1399H.sub
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 -128 -208 -128
WIRE 128 -128 32 -128
WIRE 432 -128 128 -128
WIRE 32 -96 32 -128
WIRE 32 0 32 -16
WIRE 272 0 32 0
WIRE 560 0 352 0
WIRE 432 48 432 -128
WIRE 400 64 352 64
WIRE 560 80 560 0
WIRE 560 80 464 80
WIRE 736 80 560 80
WIRE 32 96 32 0
WIRE 400 96 32 96
WIRE 560 128 560 80
WIRE 432 144 432 112
WIRE -208 160 -208 -128
WIRE 32 160 32 96
WIRE 736 192 736 80
WIRE 352 224 352 64
WIRE 560 224 560 208
WIRE 560 224 352 224
WIRE 560 256 560 224
WIRE -208 288 -208 240
WIRE 32 304 32 240
WIRE 128 304 128 -128
WIRE 736 304 736 272
WIRE 560 368 560 336
WIRE 32 496 32 448
WIRE 80 496 32 496
WIRE 128 496 128 448
WIRE 128 496 80 496
WIRE 80 544 80 496
FLAG -208 288 0
FLAG 432 144 0
FLAG 560 368 0
FLAG 736 304 0
FLAG 80 544 0
SYMBOL voltage -208 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 13.5
SYMBOL OpAmps\\LT1001 432 16 R0
SYMATTR InstName U2
SYMBOL res 16 -112 R0
SYMATTR InstName R1
SYMATTR Value 200k
SYMBOL res 544 112 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 544 240 R0
SYMATTR InstName R3
SYMATTR Value 2k
SYMBOL res 368 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL res 720 176 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL References\\ADR1399H 16 368 R0
SYMATTR InstName U1
SYMBOL res 16 144 R0
SYMATTR InstName R6
SYMATTR Value 1e-6
TEXT -240 568 Left 2 !.tran 10
* Z:\home\khalils\Downloads\files\data\raw_asc\2343ac5ffc03_Draft5.asc
* Generated by LTspice 26.0.1 for Windows.
V2 1 0 10
R2 5 4 10
V1 5 1 70
R5 0 4 10
R1 2 4 20
R4 3 0 2
R3 2 1 20
I1 3 2 6
.dc v1 70 70 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 32 0 32
WIRE 480 32 288 32
WIRE 0 112 0 32
WIRE 48 112 0 112
WIRE 160 112 128 112
WIRE 176 112 160 112
WIRE 288 112 256 112
WIRE 352 112 288 112
WIRE 480 112 480 32
WIRE 480 112 432 112
WIRE 0 176 0 112
WIRE 288 192 288 112
WIRE 480 192 480 112
WIRE 0 368 0 256
WIRE 288 368 288 272
WIRE 288 368 0 368
WIRE 320 368 288 368
WIRE 480 368 480 272
WIRE 480 368 400 368
SYMBOL res 16 272 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 10
SYMBOL res 144 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL voltage 160 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 70
SYMBOL res 416 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2
SYMBOL voltage 288 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 10
SYMBOL current 480 272 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 6
SYMBOL res 304 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20
SYMBOL res 448 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 20
FLAG 288 368 0
FLAG 288 112 1
FLAG 480 112 2
FLAG 480 368 3
FLAG 0 112 4
FLAG 160 112 5
TEXT -52 418 Left 2 !.dc v1 70 70 1
* Z:\home\khalils\Downloads\files\data\raw_asc\6a023e5176fa_FailedCapacitor.asc
* Generated by LTspice 26.0.1 for Windows.
D1 0 N005 D
C2 N003 0 1e-9
C3 N001 N005 1e-9
S1 N001 N005 N002 0 switchshort
D2 N005 N003 D
D4 N001 N004 D
D3 N003 N001 D
D5 N004 N006 D
C1 N005 N007 1e-9
V1 0 N007 PULSE(0 15000 0 0 0 3.125e-5 6.25e-5 30)
C4 N004 N003 1e-9
C5 N006 N001 1e-9
V2 N002 0 PULSE(0 10 0.0015625 0 0 1e-3 2e-3 2)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2e-3
.plot V(C1)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 -144 48 -144
WIRE -16 -128 -64 -128
WIRE 64 -112 64 -144
WIRE -16 -96 -16 -128
WIRE -64 -80 -64 -128
WIRE 192 -80 96 -80
WIRE 48 -64 48 -144
WIRE 48 0 48 -16
WIRE 48 0 -64 0
WIRE -240 48 -336 48
WIRE -80 48 -240 48
WIRE -32 48 -80 48
WIRE 80 48 32 48
WIRE 224 48 80 48
WIRE 272 48 224 48
WIRE 384 48 336 48
WIRE 528 48 384 48
WIRE -80 112 -144 112
WIRE 80 112 -80 112
WIRE 96 112 96 0
WIRE 96 112 80 112
WIRE 112 112 96 112
WIRE 192 112 192 -80
WIRE 192 112 176 112
WIRE 224 112 192 112
WIRE 384 112 224 112
WIRE 416 112 384 112
WIRE 528 112 480 112
WIRE -336 160 -336 128
WIRE -208 160 -208 112
WIRE -208 160 -336 160
SYMBOL cap 32 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1e-9
SYMBOL diode 208 48 R0
SYMATTR InstName D3
SYMBOL cap 176 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1e-9
SYMBOL voltage -336 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 15000 0 0 0 3.125e-5 6.25e-5 30)
SYMBOL cap -144 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1e-9
SYMBOL diode 96 112 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMBOL cap 480 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 1e-9
SYMBOL diode 512 48 R0
SYMATTR InstName D5
SYMBOL voltage -64 16 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 10 0.0015625 0 0 1e-3 2e-3 2)
SYMBOL sw 96 -96 R0
SYMATTR InstName S1
SYMATTR Value switchshort
SYMBOL diode 400 112 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMBOL cap 336 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1e-9
SYMBOL diode -96 48 R0
SYMATTR InstName D1
FLAG -240 48 0
FLAG -16 -96 0
FLAG 64 -112 0
TEXT -368 168 Left 2 !.tran 2e-3
TEXT -856 160 Left 2 !.plot V(C1)