Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\030588f23b3e_IoT-asemaprojekti_LTspice.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1632.asy)
R5 N003 N001 56k
XU1 N004 N003 +5 0 N002 LT1632 ;pnba In+)In-)V+)V-)OUT
XU2 N005 N004 +5 0 N004 LT1632 ;pnba In+)In-)V+)V-)OUT
R4 N005 N006 50k
R1 N001 0 4.7k
R2 N002 N001 9.4k
C1 0 N005 68pf
Vin N006 0 0.5 AC 1
V1 +5 0 5
R3 Vout N002 10k
.tran 10ms
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 832
WIRE 320 32 144 32
WIRE 464 32 400 32
WIRE 288 96 288 -16
WIRE 304 96 288 96
WIRE 32 112 0 112
WIRE 144 112 144 32
WIRE 144 112 112 112
WIRE 176 112 144 112
WIRE 272 112 256 112
WIRE 464 128 464 32
WIRE 464 128 336 128
WIRE 592 128 464 128
WIRE 768 128 672 128
WIRE 272 144 176 144
WIRE 304 160 288 160
WIRE -144 176 -144 64
WIRE 176 208 176 144
WIRE 176 208 80 208
WIRE 0 272 0 112
WIRE 176 304 176 208
WIRE 144 336 -16 336
WIRE 288 336 288 160
WIRE 288 336 208 336
WIRE 288 368 288 336
WIRE -144 400 -144 256
WIRE 80 464 80 208
WIRE 160 464 160 368
WIRE 160 464 80 464
WIRE 192 464 192 368
WIRE 224 464 192 464
WIRE 384 464 288 464
WIRE 192 528 192 464
WIRE 192 640 192 608
WIRE 192 752 192 720
SYMBOL res 416 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 9.4k
SYMBOL OpAmps/LT1632 112 336 R270
SYMATTR InstName U2
SYMBOL Misc/battery -144 160 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 688 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 4.7k
SYMBOL OpAmps/LT1632 304 64 R0
SYMATTR InstName U1
SYMBOL cap 288 448 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 68pf
SYMBOL res 176 512 R0
SYMATTR InstName R4
SYMATTR Value 50k
SYMBOL voltage 192 624 R0
SYMATTR InstName Vin
SYMATTR Value 0.5
SYMATTR Value2 AC 1
SYMBOL res 272 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 56k
FLAG -144 64 +5
FLAG 288 368 0
FLAG 288 -16 +5
FLAG 0 272 0
FLAG -144 400 0
FLAG 768 128 Vout
FLAG 192 752 0
FLAG -16 336 +5
FLAG 384 464 0
TEXT -232 480 Left 2 !.tran 10ms
* Z:\home\khalils\Downloads\files\data\raw_asc\1dcc818bb3b5_Triangle_Wave_Gen_10V.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N006 N005 5k
R3 N008 N005 27k
R2 N007 N008 6k
C1 N007 N006 10n
R4 N003 N004 10k
R5 N004 0 10k
V1 N003 0 10
XU1 N008 N004 N003 0 N005 LTC6244 ;pnba IN+)IN-)VCC)VEE)OUT
XU2 N004 N006 N003 0 N007 LTC6244 ;pnba IN+)IN-)VCC)VEE)OUT
C2 N002 0 10n
R6 N002 N001 7500
Vin N001 0 SINE(0 1 200)
.tran 0 1s 0 1us
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6244.asy)
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1480 680
WIRE 112 -240 48 -240
WIRE 272 -240 192 -240
WIRE 48 -224 48 -240
WIRE 272 -224 272 -240
WIRE 48 -112 48 -144
WIRE 256 -112 48 -112
WIRE 272 -112 272 -160
WIRE 272 -112 256 -112
WIRE 256 -80 256 -112
WIRE -80 -16 -208 -16
WIRE 112 -16 -80 -16
WIRE 416 -16 112 -16
WIRE -208 32 -208 -16
WIRE -80 32 -80 -16
WIRE 112 112 112 -16
WIRE -80 128 -80 112
WIRE -16 128 -80 128
WIRE 80 128 -16 128
WIRE -80 144 -80 128
WIRE 160 144 144 144
WIRE 208 144 160 144
WIRE 320 144 288 144
WIRE 368 144 320 144
WIRE 496 144 432 144
WIRE 80 160 32 160
WIRE 112 192 112 176
WIRE 160 208 160 144
WIRE 416 208 416 -16
WIRE 320 224 320 144
WIRE 384 224 320 224
WIRE 496 240 496 144
WIRE 496 240 448 240
WIRE 384 256 320 256
WIRE -208 272 -208 112
WIRE -80 272 -80 224
WIRE 416 288 416 272
WIRE 32 304 32 160
WIRE 160 304 160 288
WIRE 160 304 32 304
WIRE 32 352 32 304
WIRE 208 352 32 352
WIRE 496 352 496 240
WIRE 496 352 288 352
WIRE -16 416 -16 128
WIRE 320 416 320 256
WIRE 320 416 -16 416
FLAG -80 272 0
FLAG 112 192 0
FLAG 416 288 0
FLAG -208 272 0
FLAG 256 -80 0
SYMBOL res 304 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5k
SYMBOL res 176 304 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 27k
SYMBOL res 304 336 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 6k
SYMBOL cap 432 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res -96 16 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL res -96 128 R0
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL voltage -208 16 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL OpAmps\\LTC6244 112 144 R0
SYMATTR InstName U1
SYMBOL OpAmps\\LTC6244 416 240 R0
SYMATTR InstName U2
SYMBOL cap 256 -224 R0
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 208 -256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 7500
SYMBOL voltage 48 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 200)
TEXT -240 424 Left 2 !.tran 0 1s 0 1us
* Z:\home\khalils\Downloads\files\data\raw_asc\74d8bceae788_TSMC250nm.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N002 0 1.65V
V3 N001 0 3.3
V1 N003 0 1.65V
M1 N001 N002 N003 N001 CMOSP l=0.5u w=50u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V1 0 3.3 0.0001
.include /home/akash/.wine/dosdevices/c:/users/akash/Desktop/ActiveFiltersPractice/tsmc035.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1260 4660
WIRE 496 64 400 64
WIRE 528 64 496 64
WIRE 640 64 608 64
WIRE 400 128 400 64
WIRE 496 176 496 64
WIRE 496 176 400 176
WIRE 208 208 144 208
WIRE 352 208 288 208
WIRE 400 240 400 224
WIRE 400 352 400 320
SYMBOL pmos4 352 128 R0
SYMATTR InstName M1
SYMATTR Value CMOSP
SYMATTR Value2 l=0.5u w=50u
SYMBOL voltage 400 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.65V
SYMBOL voltage 512 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL voltage 304 208 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.65V
FLAG 400 352 0
FLAG 144 208 0
FLAG 640 64 0
TEXT 304 408 Left 2 !.dc V1 0 3.3 0.0001
TEXT -104 -40 Left 2 !.include /home/akash/.wine/dosdevices/c:/users/akash/Desktop/ActiveFiltersPractice/tsmc035.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\0606629b8cc0_Fig14_2.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot log10(Id(M1))
VGS VGS 0 0
M1 VDD VGS 0 0 N_50n l=50n w=500n
VDD VDD 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VGS 0 1 1m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3172 680
WIRE 192 -160 192 -176
WIRE 192 -32 192 -80
WIRE 272 -176 192 -176
WIRE 400 -176 272 -176
WIRE 448 -256 448 -304
WIRE 448 -112 448 -160
WIRE 576 -304 448 -304
WIRE 704 -304 576 -304
WIRE 704 -224 704 -304
WIRE 704 -112 704 -144
SYMBOL voltage 192 -176 R0
WINDOW 3 37 90 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 0
SYMATTR InstName VGS
SYMBOL nmos4 400 -256 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 704 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
FLAG 448 -208 0
FLAG 704 -112 0
FLAG 576 -304 VDD
FLAG 448 -112 0
FLAG 192 -32 0
FLAG 272 -176 VGS
TEXT 304 -56 Left 0 !.dc VGS 0 1 1m
TEXT 304 -32 Left 0 !.lib cmosedu_models.txt
TEXT 216 -280 Left 0 ;Plot log10(Id(M1))
* Z:\tmp\asc_dec_bjh7r6w2\01bdb1ffaaa0_Z_filter_4_freq_laplace_a_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 AC 1
B2 z_2 0 V=V(z_1) LAPLACE(exp(-s*{TS}))
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2816 1348
WIRE 16 160 16 128
WIRE 16 240 16 288
WIRE 16 128 240 128
WIRE 432 576 560 576
WIRE 432 624 432 576
WIRE 432 704 432 736
SYMBOL voltage 16 144 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL bv 432 608 R0
SYMATTR InstName B2
SYMATTR Value V=V(z_1)   LAPLACE(exp(-s*{TS}))
FLAG 16 288 0
FLAG 560 576 z_2
FLAG 432 736 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1932.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1932.asy)
V1 IN 0 2
D1 N002 N004 NSPW500BS N=4
R1 N003 0 1.5K
C1 N002 0 1
D5 N001 N002 MBR0540
L1 IN N001 6
XU1 N001 0 N004 N003 IN IN LT1932 ;pnba SW)GND)LED)Rset)_SHDN)Vin
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LT1932.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2460 1624
WIRE 1568 1216 1472 1216
WIRE 1680 1216 1568 1216
WIRE 1728 1216 1680 1216
WIRE 1840 1216 1808 1216
WIRE 1888 1216 1840 1216
WIRE 2016 1216 1952 1216
WIRE 2080 1216 2016 1216
WIRE 1472 1232 1472 1216
WIRE 2016 1232 2016 1216
WIRE 1680 1280 1680 1216
WIRE 1840 1280 1840 1216
WIRE 2016 1312 2016 1296
WIRE 1472 1328 1472 1312
WIRE 2080 1328 2080 1216
WIRE 1568 1360 1568 1216
WIRE 1600 1360 1568 1360
WIRE 1504 1488 1488 1488
WIRE 1600 1488 1584 1488
WIRE 2080 1488 2080 1392
WIRE 2080 1488 1920 1488
WIRE 1760 1584 1760 1568
SYMBOL LED 2064 1328 R0
WINDOW 0 27 6 Left 2
WINDOW 3 24 67 Left 2
WINDOW 123 24 95 Left 2
SYMATTR InstName D1
SYMATTR Value NSPW500BS
SYMATTR Description Diode
SYMATTR Type diode
SYMATTR Value2 N=4
SYMBOL ind 1712 1232 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6
SYMBOL schottky 1888 1232 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D5
SYMATTR Value MBR0540
SYMBOL POWERPRODUCTS\\LT1932 1760 1424 R0
SYMATTR InstName U1
SYMBOL RES 1600 1472 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1.5K
SYMBOL VOLTAGE 1472 1216 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL cap 2000 1232 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 1760 1584 0
FLAG 1488 1488 0
FLAG 1472 1328 0
FLAG 2016 1312 0
FLAG 1472 1216 IN
TEXT 2128 1528 Left 2 !.tran 500u startup
* Z:\tmp\asc_dec_bjh7r6w2\0fa34e5aa308_adder4_main_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 0 100k
VP2 A2 0 PULSE(0 1 4n 10p 10p 4n 8n)
C1 N002 0 100f
R4 N005 0 100k
VP4 B0 0 PULSE(0 1 0n 10p 10p 4n 8n)
R2 N003 0 100k
VP5 B1 0 PULSE(0 1 2n 10p 10p 4n 8n)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1428 2432
WIRE 752 128 752 64
WIRE 80 176 80 128
WIRE 608 176 576 176
WIRE 608 240 608 176
WIRE 816 256 672 256
WIRE 1024 256 816 256
WIRE 80 272 80 224
WIRE 768 288 672 288
WIRE 80 320 80 272
WIRE 752 320 672 320
WIRE 816 320 816 256
WIRE 1024 320 1024 256
WIRE 736 352 672 352
WIRE 80 448 80 400
WIRE 816 448 816 400
WIRE 1024 448 1024 384
WIRE 704 464 672 464
WIRE 80 496 80 480
WIRE 768 496 768 288
WIRE 816 496 768 496
WIRE 1024 496 816 496
WIRE 80 528 80 496
WIRE 816 576 816 496
WIRE 1024 592 1024 496
WIRE 80 656 80 608
WIRE -288 672 -288 624
WIRE 816 688 816 656
WIRE 752 736 752 320
WIRE 816 736 752 736
WIRE 1024 736 816 736
WIRE 80 752 80 704
WIRE -288 768 -288 736
WIRE -288 800 -288 768
WIRE 816 800 816 736
WIRE -288 928 -288 880
WIRE 816 928 816 880
WIRE 736 960 736 352
WIRE 816 960 736 960
WIRE 1024 960 816 960
WIRE 816 1024 816 960
WIRE 816 1152 816 1104
WIRE 704 1184 704 464
WIRE 816 1184 704 1184
WIRE 1024 1184 816 1184
WIRE 816 1248 816 1184
SYMBOL res 800 304 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage 80 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName P2
SYMATTR Value PULSE(0 1 4n 10p 10p 4n 8n)
SYMBOL cap 1008 320 R0
SYMATTR InstName C1
SYMATTR Value 100f
SYMBOL res 800 1008 R0
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL voltage 80 512 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName P4
SYMATTR Value PULSE(0 1 0n 10p 10p 4n 8n)
SYMBOL res 800 560 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL voltage -288 784 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName P5
SYMATTR Value PULSE(0 1 2n 10p 10p 4n 8n)
FLAG 80 176 0
FLAG 752 128 0
FLAG 816 448 0
FLAG 1024 448 0
FLAG 816 688 0
FLAG 816 928 0
FLAG 816 1152 0
FLAG 80 448 0
FLAG -288 672 0
FLAG 80 656 0
FLAG -288 928 0
FLAG 80 272 A2
FLAG 80 496 B0
FLAG -288 768 B1
* Z:\home\khalils\Downloads\files\data\raw_asc\4f7a4ce1ee20_Zener_Breakdown.asc
* Generated by LTspice 26.0.1 for Windows.
R1 vout 0 1k
V1 N001 0 5
D1 N001 vout BZX84B6V8L
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -10 10 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 400 48 272 48
WIRE 560 48 464 48
WIRE 576 48 560 48
WIRE 272 112 272 48
WIRE 576 112 576 48
WIRE 272 256 272 192
WIRE 448 256 272 256
WIRE 576 256 576 192
WIRE 576 256 448 256
WIRE 448 272 448 256
SYMBOL res 560 96 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL zener 400 64 R270
WINDOW 0 36 32 VTop 2
WINDOW 3 -4 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value BZX84B6V8L
SYMBOL voltage 272 96 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 448 272 0
FLAG 560 48 vout
TEXT 208 272 Left 2 !.dc V1 -10 10 0.2
* Z:\home\khalils\Downloads\files\data\raw_asc\1d3217fede89_Demonstration_circuit_Step_ac_TF.asc
* Generated by LTspice 26.0.1 for Windows.
* Demonstration Circuit step Tf of transistor
* Step AC Transistor TF
* plot FR for different TF
* copyright Cordell Audio 12/03/2010
;op
R4 N004 N005 225
I1 N005 N006 2mA
V3 Vin 0 SINE(0 0.1 1000 0 0 0 10) AC 1
V1 N001 0 15
C1 N001 Vout 10pF
R2 N001 Vout 2500
V2 0 N006 15
R1 N001 N002 2500
R3 N003 N005 225
Q2 Vout 0 N004 0 2N5551C
Q1 N002 Vin N003 0 2N5551C
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.ac dec 10 1000k 1000000k
.step NPN 2N5551C (TF) 200p 1800p 400p
.include Cordell_Mods
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 788
WIRE 160 64 0 64
WIRE 272 64 160 64
WIRE 400 64 272 64
WIRE 0 112 0 64
WIRE 160 112 160 64
WIRE 272 112 272 64
WIRE 400 144 400 64
WIRE 160 208 160 192
WIRE 224 208 160 208
WIRE 272 208 272 176
WIRE 272 208 224 208
WIRE 0 256 0 192
WIRE 160 256 160 208
WIRE 400 288 400 224
WIRE 480 288 400 288
WIRE -128 304 -176 304
WIRE -64 304 -128 304
WIRE 400 304 400 288
WIRE 400 304 224 304
WIRE 480 304 480 288
WIRE 400 352 400 304
WIRE -176 368 -176 304
WIRE 0 384 0 352
WIRE 160 384 160 352
WIRE -176 496 -176 448
WIRE 0 496 0 464
WIRE 80 496 0 496
WIRE 160 496 160 464
WIRE 160 496 80 496
WIRE 80 512 80 496
WIRE 80 624 80 592
WIRE 400 624 400 432
WIRE 400 624 80 624
SYMBOL res -16 96 R0
WINDOW 0 41 29 Left 0
WINDOW 3 38 61 Left 0
SYMATTR InstName R1
SYMATTR Value 2500
SYMBOL res 144 368 R0
SYMATTR InstName R4
SYMATTR Value 225
SYMBOL npn -64 256 R0
WINDOW 3 25 42 Left 0
WINDOW 0 67 11 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q1
SYMBOL res 144 96 R0
WINDOW 0 39 26 Left 0
WINDOW 3 36 57 Left 0
SYMATTR InstName R2
SYMATTR Value 2500
SYMBOL voltage 400 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 39 Left 0
WINDOW 3 42 76 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL cap 256 112 R0
WINDOW 3 30 50 Left 0
WINDOW 0 36 12 Left 0
SYMATTR Value 10pF
SYMATTR InstName C1
SYMBOL npn 224 256 M0
WINDOW 3 26 42 Left 0
WINDOW 0 68 9 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q2
SYMBOL res -16 368 R0
SYMATTR InstName R3
SYMATTR Value 225
SYMBOL voltage -176 352 R0
WINDOW 3 -323 109 Left 0
WINDOW 123 35 82 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 45 43 Left 0
SYMATTR Value SINE(0 0.1 1000 0 0 0 10)
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMBOL current 80 512 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 44 25 Left 0
WINDOW 3 34 63 Left 0
SYMATTR InstName I1
SYMATTR Value 2mA
SYMBOL voltage 400 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 41 42 Left 0
WINDOW 3 41 76 Left 0
SYMATTR InstName V2
SYMATTR Value 15
FLAG 480 304 0
FLAG -176 496 0
FLAG -128 304 Vin
FLAG 224 208 Vout
TEXT -600 80 Left 0 !;op
TEXT -600 112 Left 0 !.ac dec 10 1000k 1000000k
TEXT -304 -128 Left 0 ;Demonstration Circuit step Tf of transistor
TEXT -600 152 Left 0 !.step NPN 2N5551C (TF) 200p 1800p 400p
TEXT -208 -88 Left 0 ;Step AC Transistor TF
TEXT -208 -48 Left 0 ;plot FR for different TF
TEXT -600 48 Left 0 !.include Cordell_Mods
TEXT 104 736 Left 0 ;copyright Cordell Audio 12/03/2010
* Z:\home\khalils\Downloads\files\data\raw_asc\223af1708662_noninv_hys_comp.asc
* Generated by LTspice 26.0.1 for Windows.
* Non-Inverting Hysteresis Comparator
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP37.asy)
Vp1 V+ 0 5
R1 N001 W1 10k
R2 +2 N001 20k
XU1 N001 0 V+ V- +2 OP37 ;pnba In+)In-)V+)V-)OUT
V1 W1 0 SINE(0 3 1k)
Vn1 V- 0 -5
R3 +2 0 10k
.tran 10m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -656 16 -656 -32
WIRE -688 32 -800 32
WIRE -576 48 -624 48
WIRE -528 48 -576 48
WIRE -512 48 -528 48
WIRE -1120 64 -1120 48
WIRE -1120 64 -1136 64
WIRE -992 64 -992 48
WIRE -992 64 -1008 64
WIRE -704 64 -768 64
WIRE -688 64 -704 64
WIRE -1120 80 -1120 64
WIRE -992 80 -992 64
WIRE -800 80 -800 32
WIRE -528 80 -528 48
WIRE -768 112 -768 64
WIRE -656 128 -656 80
WIRE -1120 192 -1120 160
WIRE -992 192 -992 160
WIRE -992 192 -1120 192
WIRE -528 192 -528 160
WIRE -992 208 -992 192
WIRE -704 224 -704 64
WIRE -672 224 -704 224
WIRE -576 224 -576 48
WIRE -576 224 -592 224
WIRE -768 240 -768 192
WIRE -768 240 -784 240
WIRE -768 288 -768 240
WIRE -768 288 -784 288
WIRE -768 304 -768 288
WIRE -768 400 -768 384
IOPIN -784 240 In
IOPIN -512 48 In
IOPIN -784 288 In
IOPIN -1136 64 In
IOPIN -1008 64 In
SYMBOL res -544 64 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res -576 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 20k
SYMBOL voltage -768 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 3 1k)
SYMBOL voltage -992 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vn1
SYMATTR Value -5
SYMBOL voltage -1120 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vp1
SYMATTR Value 5
SYMBOL Opamps\\OP37 -656 -16 R0
SYMATTR InstName U1
SYMBOL res -784 96 R0
SYMATTR InstName R1
SYMATTR Value 10k
FLAG -768 400 0
FLAG -656 128 Vn
FLAG -656 -32 Vp
FLAG -528 192 0
FLAG -800 80 0
FLAG -784 240 +1
FLAG -512 48 +2
FLAG -784 288 W1
FLAG -992 208 0
FLAG -1120 48 Vp
FLAG -992 48 Vn
FLAG -1136 64 V+
FLAG -1008 64 V-
TEXT -848 -136 Left 2 ;Non-Inverting Hysteresis Comparator
TEXT -1152 280 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\0606629b8cc0_Fig14_2.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot log10(Id(M1))
VDD VDD 0 1
M1 VDD VGS 0 0 N_50n l=50n w=500n
VGS VGS 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VGS 0 1 1m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3172 680
WIRE 192 -160 192 -176
WIRE 192 -32 192 -80
WIRE 272 -176 192 -176
WIRE 400 -176 272 -176
WIRE 448 -256 448 -304
WIRE 448 -112 448 -160
WIRE 576 -304 448 -304
WIRE 704 -304 576 -304
WIRE 704 -224 704 -304
WIRE 704 -112 704 -144
SYMBOL voltage 704 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL voltage 192 -176 R0
WINDOW 3 37 90 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 0
SYMATTR InstName VGS
SYMBOL nmos4 400 -256 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
FLAG 448 -208 0
FLAG 704 -112 0
FLAG 576 -304 VDD
FLAG 448 -112 0
FLAG 192 -32 0
FLAG 272 -176 VGS
TEXT 304 -56 Left 0 !.dc VGS 0 1 1m
TEXT 304 -32 Left 0 !.lib cmosedu_models.txt
TEXT 216 -280 Left 0 ;Plot log10(Id(M1))
* Z:\home\khalils\Downloads\files\data\raw_asc\6df6d302ac2a_EDM_Powersupply_kicad_test.asc
* Generated by LTspice 26.0.1 for Windows.
* Bipolar gate driver and high-side switching
R2 gate 0 10k
XM1 drain gate 0 IPW65R037C6_L0 ;pnba D)G)S
R1 gate N003 10
V4 N001 0 100
L1 N002 drain 6.4
V1 N003 0 PULSE(0 5 0 2n 2n 2u 20u)
R3 N001 N002 10
.include C:\Users\joey2\Documents\3e jaar\BAP\Github\EDM_Powersupply\Library\IPW65R037C6_mosfet\SimulationModel_CoolMOS_C6_MOSFET_650V_Spice.lib
.tran 0 100u 0 10n
.model NMOS NMOS(vto=2.5 kp=150)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1356 732
WIRE 144 32 48 32
WIRE 144 128 144 112
WIRE 144 272 144 208
WIRE 144 288 144 272
WIRE -224 368 -256 368
WIRE -96 368 -144 368
WIRE 64 368 -96 368
WIRE 96 368 64 368
WIRE 144 400 144 384
WIRE -256 432 -256 368
WIRE 144 496 144 400
WIRE -256 560 -256 512
SYMBOL ind 128 112 R0
SYMATTR InstName L1
SYMATTR Value 6.4u
SYMBOL nmos 96 288 R0
SYMATTR InstName M1
SYMATTR Value IPW65R037C6_L0
SYMATTR Prefix X
SYMBOL voltage 64 32 R90
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 100
SYMBOL voltage -256 416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -51 153 VLeft 2
SYMATTR Value PULSE(0 5 0 2n 2n 2u 20u)
SYMATTR InstName V1
SYMBOL res -128 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL res -112 352 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 128 16 R0
SYMATTR InstName R3
SYMATTR Value 10
FLAG -256 560 0
FLAG 144 272 drain
FLAG 144 400 source
FLAG -96 448 0
FLAG -32 32 0
FLAG 144 496 0
FLAG 64 368 gate
TEXT -736 664 Left 2 !.include C:\\Users\\joey2\\Documents\\3e jaar\\BAP\\Github\\EDM_Powersupply\\Library\\IPW65R037C6_mosfet\\SimulationModel_CoolMOS_C6_MOSFET_650V_Spice.lib
TEXT -736 632 Left 2 !.tran 0 100u 0 10n
TEXT -728 720 Left 2 !.model NMOS NMOS(vto=2.5 kp=150)
TEXT -88 -144 Left 2 ;Bipolar gate driver and high-side switching
* Z:\home\khalils\Downloads\files\data\raw_asc\77c5f8cd4bb0_circuit3.asc
* Generated by LTspice 26.0.1 for Windows.
Rs N001 a 1k
R4 a 0 4.7k
R3 N002 N003 3.3k
R5 N003 0 10k
V1 N003 0 6.5
Vs N001 0 0
R1 a N002 1k
.dc Vs 0 10 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 48 32 48
WIRE 240 48 192 48
WIRE 320 48 240 48
WIRE 448 48 400 48
WIRE 608 48 528 48
WIRE 752 48 608 48
WIRE 32 112 32 48
WIRE 240 112 240 48
WIRE 608 112 608 48
WIRE 752 112 752 48
WIRE 32 240 32 192
WIRE 240 240 240 192
WIRE 240 240 32 240
WIRE 432 240 240 240
WIRE 608 240 608 192
WIRE 608 240 432 240
WIRE 752 240 752 192
WIRE 752 240 608 240
WIRE 432 256 432 240
SYMBOL res 432 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 3.3k
SYMBOL res 592 96 R0
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL voltage 752 96 R0
SYMATTR InstName V1
SYMATTR Value 6.5
SYMBOL res 96 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rs
SYMATTR Value 1k
SYMBOL res 224 96 R0
SYMATTR InstName R4
SYMATTR Value 4.7k
SYMBOL voltage 32 96 R0
SYMATTR InstName Vs
SYMATTR Value 0
SYMBOL res 304 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 432 256 0
FLAG 240 48 a
TEXT 32 304 Left 2 !.dc Vs 0 10 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\2291d0b48343_Q5.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 PULSE(0 1 0 0.01P 0 1)
R1 Out N001 1k
C1 Out 0 1p
.tran 0 50n 0 1p
;.step param t_r list 10p 20p 50p 100p 200p 500p 1n 2n 5n 10n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 80 112 80
WIRE 368 80 304 80
WIRE 432 80 368 80
WIRE 112 144 112 80
WIRE 368 144 368 80
WIRE 112 256 112 224
WIRE 368 256 368 208
FLAG 112 256 0
FLAG 368 256 0
FLAG 432 80 Out
IOPIN 432 80 Out
SYMBOL voltage 112 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -102 100 Left 2
SYMATTR Value PULSE(0 1 0 0.01P 0 1)
SYMATTR InstName V1
SYMBOL res 320 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL cap 352 144 R0
SYMATTR InstName C1
SYMATTR Value 1p
TEXT 80 280 Left 2 !.tran 0 50n 0 1p
TEXT -192 312 Left 2 !;.step param t_r list 10p 20p 50p 100p 200p 500p 1n 2n 5n 10n