Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\10e55adb2145_1053.asc
* Generated by LTspice 26.0.1 for Windows.
* High Performance Low Cost Instrumentation Amplifier
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC1053.asy)
R2 N001 0 100K
R1 N002 N001 499
V1 +V 0 5
R3 N003 N002 499
V4 IN+ 0 SINE(0 1 10)
V3 IN- IN+ SINE(0 1m 100)
XU2 IN+ N003 +V -V OUT LTC1052 ;pnba In+)In-)V+)V-)OUT
XU1 IN- N001 +V -V N002 LTC1052 ;pnba In+)In-)V+)V-)OUT
R4 OUT N003 100K
V2 -V 0 -5
.tran .3
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 64 112 48 112
WIRE 160 112 144 112
WIRE 176 112 160 112
WIRE 272 112 256 112
WIRE 288 112 272 112
WIRE 384 112 368 112
WIRE 400 112 384 112
WIRE 496 112 480 112
WIRE -192 208 -192 192
WIRE -96 208 -96 192
WIRE 208 208 208 192
WIRE 160 224 160 112
WIRE 176 224 160 224
WIRE 432 224 432 208
WIRE 272 240 272 112
WIRE 272 240 240 240
WIRE 384 240 384 112
WIRE 400 240 384 240
WIRE 112 256 16 256
WIRE 176 256 112 256
WIRE 496 256 496 112
WIRE 496 256 464 256
WIRE 544 256 496 256
WIRE 16 272 16 256
WIRE 400 272 352 272
WIRE 208 288 208 272
WIRE 432 304 432 288
WIRE -192 320 -192 288
WIRE -96 320 -96 288
WIRE 16 384 16 352
WIRE 288 384 16 384
WIRE 352 384 352 272
WIRE 352 384 288 384
WIRE 16 400 16 384
WIRE 16 496 16 480
SYMBOL voltage 16 384 R0
SYMATTR InstName V4
SYMATTR Value SINE(0 1 10)
SYMBOL voltage -192 192 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL opamps\\LTC1053 208 176 R0
SYMATTR InstName U1
SYMBOL res 384 96 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 499
SYMBOL res 496 96 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL res 272 96 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 499
SYMBOL voltage -96 192 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 160 96 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL opamps\\LTC1053 432 192 R0
SYMATTR InstName U2
SYMBOL voltage 16 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1m 100)
FLAG -96 320 0
FLAG 208 192 +V
FLAG -96 192 +V
FLAG 208 288 -V
FLAG -192 320 0
FLAG -192 192 -V
FLAG 48 112 0
FLAG 16 496 0
FLAG 432 208 +V
FLAG 432 304 -V
FLAG 544 256 OUT
FLAG 112 256 IN-
FLAG 288 384 IN+
TEXT 384 408 Left 0 !.tran .3
TEXT 208 48 Bottom 0 ;High Performance Low Cost Instrumentation Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\a97f1cea7bd0_2022023_2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 15
D1 N001 N002 D
R1 N002 0 3300
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 15 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 80 48 80
WIRE 320 80 224 80
WIRE 48 144 48 80
WIRE 320 144 320 80
WIRE 48 272 48 224
WIRE 240 272 48 272
WIRE 320 272 320 224
WIRE 320 272 240 272
SYMBOL res 304 128 R0
SYMATTR InstName R1
SYMATTR Value 3300
SYMBOL diode 160 96 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL voltage 48 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
FLAG 240 272 0
TEXT 144 296 Left 2 !.dc V1 0 15 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1461-4.096.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1461-4.096.asy)
I1 N002 0 PULSE(0 10m 1.5m 10n 10n 2m 200m)
V1 N001 0 6.6
XU1 0 N001 N001 N002 LT1461-4.096 ;pnba GND)IN)_SHDN)OUT
C1 N002 0 2
.tran 7m
.lib LT1461.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1376 680
WIRE 112 112 0 112
WIRE 144 112 112 112
WIRE 512 112 432 112
WIRE 672 112 512 112
WIRE 0 128 0 112
WIRE 512 128 512 112
WIRE 672 128 672 112
WIRE 112 176 112 112
WIRE 144 176 112 176
WIRE 0 224 0 208
WIRE 512 224 512 192
WIRE 672 224 672 208
WIRE 288 240 288 208
SYMBOL cap 496 128 R0
WINDOW 123 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 2
SYMBOL current 672 128 R0
WINDOW 123 24 122 Left 2
WINDOW 39 24 101 Left 2
SYMATTR Value PULSE(0 10m 1.5m 10n 10n 2m 200m)
SYMATTR InstName I1
SYMBOL LT1461-4.096 288 144 R0
SYMATTR InstName U1
SYMBOL voltage 0 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 6.6
FLAG 0 224 0
FLAG 288 240 0
FLAG 672 224 0
FLAG 512 224 0
TEXT 736 280 Left 2 !.tran 7m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1761-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1761-1.2.asy)
V1 IN 0 1.4
C3 N002 0 1
R1 OUT 0 1.5
C1 N004 0 1
C2 N003 0 10n
R2 N001 IN 50K
C4 OUT 0 10
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1761 Radj=8K ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
.tran 1m startup
.lib ADP1761.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL ADP1761-1.2 224 176 R0
SYMATTR InstName U1
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.4
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value 1.5
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\06da8cb8514a_74hc86.asc
* Generated by LTspice 26.0.1 for Windows.
A1 A1 B1 VSS VSS VSS VSS Y1 VSS XOR Vhigh=5
A2 A2 B2 VSS VSS VSS VSS Y2 VSS XOR Vhigh=5
A3 A3 B3 VSS VSS VSS VSS Y3 VSS XOR Vhigh=5
A4 A4 B4 VSS VSS VSS VSS Y4 VSS XOR Vhigh=5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1612 680
WIRE 256 0 192 0
WIRE 528 0 464 0
WIRE 256 16 192 16
WIRE 368 16 320 16
WIRE 528 16 464 16
WIRE 656 16 592 16
WIRE 176 96 128 96
WIRE 288 96 288 64
WIRE 560 96 560 64
WIRE 256 160 192 160
WIRE 528 160 464 160
WIRE 256 176 192 176
WIRE 368 176 320 176
WIRE 528 176 464 176
WIRE 656 176 592 176
WIRE 288 256 288 224
WIRE 560 256 560 224
SYMBOL Digital\\xor 304 128 R0
WINDOW 3 15 1 Left 2
SYMATTR InstName A2
SYMATTR Value Vhigh=5
SYMBOL Digital\\xor 576 -32 R0
WINDOW 3 15 1 Left 2
SYMATTR InstName A3
SYMATTR Value Vhigh=5
SYMBOL Digital\\xor 576 128 R0
WINDOW 3 15 1 Left 2
SYMATTR InstName A4
SYMATTR Value Vhigh=5
SYMBOL Digital\\xor 304 -32 R0
WINDOW 3 15 1 Left 2
SYMATTR InstName A1
SYMATTR Value Vhigh=5
FLAG 368 16 Y1
FLAG 368 176 Y2
FLAG 656 16 Y3
FLAG 656 176 Y4
FLAG 192 0 A1
FLAG 192 160 A2
FLAG 464 0 A3
FLAG 464 160 A4
FLAG 192 16 B1
FLAG 192 176 B2
FLAG 464 16 B3
FLAG 464 176 B4
FLAG 288 96 VSS
FLAG 560 96 VSS
FLAG 560 256 VSS
FLAG 288 256 VSS
FLAG 128 96 VDD
* Z:\home\khalils\Downloads\files\data\raw_asc\1a27daebfc20_spark_gap.asc
* Generated by LTspice 26.0.1 for Windows.
B2 voltage_check 0
Carc_capacitance1 SPARK[T] SPARK[B] 3p
R3 0 P001 100
Lead_Inductance1 sgt SPARK[T] 130n
B1 current_check 0 V=IF(I(S1) < -500m, 100V, -10V)
RFlux_Losses1 SPARK[T] sgt 2.5K
R2 spark_control current_check 100
RSpark_Resistance_guess1 sgt N001 -0.5
R1 spark_control voltage_check 100
RLeakage1 SPARK[T] SPARK[B] 100Meg
S1 N001 SPARK[B] spark_control P001 SW
.model sw sw
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2128 820
WIRE 192 -144 -80 -144
WIRE 256 -144 192 -144
WIRE 432 -144 256 -144
WIRE 464 -144 432 -144
WIRE 192 -128 192 -144
WIRE 256 -128 256 -144
WIRE 432 -64 432 -144
WIRE 224 -48 192 -48
WIRE 256 -48 224 -48
WIRE 464 48 464 -144
WIRE 224 96 224 -48
WIRE 224 144 224 96
WIRE -288 272 -288 256
WIRE -272 272 -288 272
WIRE -288 288 -288 272
WIRE 224 304 224 224
WIRE -176 368 -288 368
WIRE 176 368 -176 368
WIRE -288 464 -288 448
WIRE -272 464 -288 464
WIRE -288 480 -288 464
WIRE 224 608 224 384
WIRE 224 608 -80 608
WIRE 432 608 432 16
WIRE 432 608 224 608
WIRE 464 608 464 112
WIRE 464 608 432 608
IOPIN -80 -144 BiDir
IOPIN -80 608 BiDir
SYMBOL res 208 128 R0
WINDOW 0 -11 38 Right 2
WINDOW 3 -14 65 Right 2
SYMATTR InstName Spark_Resistance_guess1
SYMATTR Value -0.5
SYMBOL res -304 352 R0
WINDOW 0 -34 43 Invisible 2
WINDOW 3 -41 51 Left 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL res 240 -144 R0
WINDOW 0 38 39 Left 2
WINDOW 3 39 66 Left 2
SYMATTR InstName Flux_Losses1
SYMATTR Value 2.5K
SYMBOL ind 208 -32 R180
WINDOW 0 41 70 Left 2
WINDOW 3 43 43 Left 2
SYMATTR InstName Lead_Inductance1
SYMATTR Value 130n
SYMBOL cap 448 48 R0
WINDOW 0 51 24 Left 2
WINDOW 3 51 51 Left 2
SYMATTR InstName arc_capacitance1
SYMATTR Value 3p
SYMBOL res -272 384 R180
WINDOW 0 36 76 Invisible 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL bv -288 464 R0
WINDOW 0 24 16 Invisible 2
WINDOW 3 -42 54 Right 2
SYMATTR InstName B1
SYMATTR Value V=IF(I(S1) < -500m, 100V, -10V)
SYMBOL res 80 336 R270
WINDOW 0 32 56 Invisible 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL sw 224 288 R0
SYMATTR InstName S1
SYMBOL res 416 -80 R0
WINDOW 0 -100 46 Left 2
WINDOW 3 -121 76 Left 2
SYMATTR InstName Leakage1
SYMATTR Value 100MEG
SYMBOL bv -288 272 R180
WINDOW 0 24 96 Invisible 2
WINDOW 3 42 56 Left 2
SYMATTR InstName B2
SYMATTR Value ""
FLAG -80 -144 SPARK[T]
FLAG -80 608 SPARK[B]
FLAG -288 176 0
FLAG -288 560 0
FLAG 96 320 0
FLAG -272 272 voltage_check
FLAG -272 464 current_check
FLAG -176 368 spark_control
FLAG 224 96 sgt
TEXT 56 392 Left 2 !.model sw sw
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8643S.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8643S.asy)
XU1 OUT N003 NC_01 IN NC_02 0 N002 N005 0 0 N007 NC_03 IN IN N004 N006 NC_04 LT8643S ;pnba BIAS)INTVcc)BST)VIN1)CLKOUT)GND1)VC)SW)GND)GND2)FB)PG)VIN2)EN/UV)RT)TR/SS)SYNC/MODE
C5 OUT N007 4.7p
C1 N006 0 1n
V1 IN 0 24
C6 N002 N001 330p
R2 OUT N007 1Meg
L1 N005 OUT 3.3 Rser=10m
C4 OUT 0 47 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
Rload OUT 0 835m
R4 N001 0 8.45K
C2 N003 0 1
R1 N004 0 41.2K
R3 N007 0 243K
.tran 1m startup
.lib LT8643S.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1848 740
WIRE 80 -80 -32 -80
WIRE 256 -80 80 -80
WIRE 432 -80 256 -80
WIRE -32 -64 -32 -80
WIRE 256 -64 256 -80
WIRE 80 0 80 -80
WIRE 112 0 80 0
WIRE 432 0 432 -80
WIRE 432 0 400 0
WIRE -32 32 -32 16
WIRE 112 80 80 80
WIRE 432 80 400 80
WIRE -64 160 -80 160
WIRE 32 160 16 160
WIRE 112 160 96 160
WIRE 32 240 0 240
WIRE 112 240 96 240
WIRE 544 240 400 240
WIRE 16 400 0 400
WIRE 112 400 96 400
WIRE 432 400 400 400
WIRE 544 400 544 240
WIRE 544 400 512 400
WIRE 656 400 544 400
WIRE 752 400 656 400
WIRE 848 400 752 400
WIRE 656 416 656 400
WIRE 752 416 752 400
WIRE 848 416 848 400
WIRE 32 480 0 480
WIRE 112 480 96 480
WIRE 544 480 400 480
WIRE 656 480 656 464
WIRE 656 480 544 480
WIRE 544 496 544 480
WIRE 752 512 752 480
WIRE 848 512 848 496
WIRE 304 560 304 544
WIRE 544 592 544 576
SYMBOL cap 736 416 R0
WINDOW 0 40 17 Left 2
SYMATTR InstName C4
SYMATTR Value 47
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL cap 96 496 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 112 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 41.2K
SYMBOL voltage -32 -80 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 832 400 R0
SYMATTR InstName Rload
SYMATTR Value 835m
SYMBOL cap 96 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C6
SYMATTR Value 330p
SYMBOL res 528 480 R0
SYMATTR InstName R3
SYMATTR Value 243K
SYMBOL cap 640 400 R0
WINDOW 0 32 17 Left 2
SYMATTR InstName C5
SYMATTR Value 4.7p
SYMBOL LT8643S 256 240 R0
SYMATTR InstName U1
SYMBOL res 528 384 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL ind 416 416 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=10m
SYMBOL res 32 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 8.45K
SYMBOL cap 96 256 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
FLAG 304 560 0
FLAG 0 400 0
FLAG -32 32 0
FLAG 752 512 0
FLAG 544 592 0
FLAG 848 512 0
FLAG 848 400 OUT
FLAG -32 -80 IN
FLAG 80 80 0
FLAG 432 80 0
FLAG 0 480 0
FLAG -80 160 0
FLAG 0 240 0
TEXT 704 576 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3060-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3060-1.2.asy)
C1 N002 0 10n
C3 OUT 0 10
V1 IN 0 12
C2 OUT N001 10n
XU1 N002 N001 OUT MP_01 IN MP_02 IN 0 LT3060-1.2 ;pnba Ref/Byp)ADJ)OUT))IN))_SHDN)GND
Rload OUT 0 12
.tran .1 startup
.lib LT3060-1.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 112 -16 112
WIRE 96 112 0 112
WIRE 112 112 96 112
WIRE 432 112 368 112
WIRE 544 112 432 112
WIRE 624 112 544 112
WIRE -16 128 -16 112
WIRE 544 128 544 112
WIRE 624 128 624 112
WIRE 432 144 432 112
WIRE -16 224 -16 208
WIRE 96 224 96 112
WIRE 112 224 96 224
WIRE 432 224 432 208
WIRE 432 224 368 224
WIRE 544 224 544 192
WIRE 624 224 624 208
WIRE 112 336 80 336
WIRE 400 336 368 336
WIRE 400 352 400 336
WIRE 400 432 400 416
SYMBOL PowerProducts\\LT3060-1.2 240 224 R0
SYMATTR InstName U1
SYMBOL cap 528 128 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL voltage -16 112 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 608 112 R0
SYMATTR InstName Rload
SYMATTR Value 12
SYMBOL cap 384 352 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap 416 144 R0
SYMATTR InstName C2
SYMATTR Value 10n
FLAG 80 336 0
FLAG -16 224 0
FLAG 400 432 0
FLAG 544 224 0
FLAG 624 224 0
FLAG 624 112 OUT
FLAG 0 112 IN
TEXT 480 320 Left 2 !.tran .1 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1be959ee3a0c_fra_eg1.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N001 +V -V A level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
V2 -V 0 -5
R1 B N001 10K
R2 N001 0 1K
@1 A B delay=100u fstart=100 fend=10Meg oct=4 fcoarse=10k nmax=50k 3 500k 1 pp0=100m pp1=10m f0=50k f1=500k tavgmin=100u tsettle=2u acmag=1
C1 A 0 50n
C2 N001 0 100p
.fra
* .ac oct 4 100 10Meg
* This example shows the basic principle of extracting\nthe small signal AC characteristics from an \nLTspice Frequency Response Analysis (FRA) simulation.
* To use this technique in your own simulations,\n include an fra device and the .fra directive.\nThe fra device controls the frequency analysis parameters.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4156 1252
WIRE 1504 544 1472 544
WIRE 1600 544 1584 544
WIRE 1632 544 1600 544
WIRE 1744 544 1712 544
WIRE 1760 544 1744 544
WIRE 1840 544 1824 544
WIRE 1856 544 1840 544
WIRE 1936 576 1936 560
WIRE 2032 576 2032 560
WIRE 1600 640 1600 544
WIRE 1760 640 1600 640
WIRE 1600 656 1600 640
WIRE 1856 656 1856 544
WIRE 1856 656 1824 656
WIRE 1760 672 1744 672
WIRE 1936 672 1936 656
WIRE 2032 672 2032 656
WIRE 1600 736 1600 720
WIRE 1856 736 1856 720
FLAG 1936 672 0
FLAG 2032 672 0
FLAG 1936 560 +V
FLAG 1792 624 +V
FLAG 2032 560 -V
FLAG 1792 688 -V
FLAG 1744 672 0
FLAG 1472 544 0
FLAG 1856 736 0
FLAG 1600 736 0
FLAG 1840 544 A
FLAG 1744 544 B
SYMBOL Opamps\\UniversalOpamp2 1792 656 R0
SYMATTR InstName U1
SYMBOL voltage 1936 560 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 2032 560 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 1728 528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 1600 528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL fra 1760 544 R90
WINDOW 0 -19 -26 VBottom 2
WINDOW 40 37 -28 VBottom 2
SYMATTR InstName @1
SYMATTR SpiceLine delay=100u fstart=100 fend=10Meg oct=4 fcoarse=10k nmax=50k 3 500k 1 pp0=100m pp1=10m f0=50k f1=500k tavgmin=100u tsettle=2u
SYMATTR SpiceLine2 acmag=1
SYMBOL cap 1840 656 R0
SYMATTR InstName C1
SYMATTR Value 50n
SYMBOL cap 1584 656 R0
SYMATTR InstName C2
SYMATTR Value 100p
TEXT 2200 560 Left 2 !.fra
TEXT 2112 592 Left 2 ;.ac oct 4 100 10Meg
TEXT 1888 288 Center 2 ;This example shows the basic principle of extracting\nthe small signal AC characteristics from an \nLTspice Frequency Response Analysis (FRA) simulation.
TEXT 1576 392 Left 2 ;To use this technique in your own simulations,\n include an fra device and the .fra directive.\nThe fra device controls the frequency analysis parameters.
LINE Normal 1680 672 1680 672 2
LINE Normal 1680 672 1680 672 2
LINE Normal 2128 752 2128 752 2
LINE Normal 2128 752 2128 752 2
LINE Normal 2128 752 2128 752 2
LINE Normal 2128 752 2128 752 2
LINE Normal 1712 464 1760 512 2
LINE Normal 1648 656 1648 656 2
* Z:\home\khalils\Downloads\files\data\raw_asc\696ae2c03f6e_IV_Characteristics_Diode.asc
* Generated by LTspice 26.0.1 for Windows.
* I-V Characteristics of a Diode
D1 Vd 0 1N4001
V1 N001 0 5
R1 N001 Vd 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model 1N4001 D(Is=14.11n N=1.984 Rs=33.89m Ikf=94.81 Xti=3 Eg=1.11 Cjo=25.89p M=.44 Vj=.3245 Fc=.5 Bv=75 Ibv=10u Tt=5.7u Iave=1 Vpk=50 mfg=GI type=silicon)
.dc V1 -5 5 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1340 680
WIRE 352 256 224 256
WIRE 560 256 432 256
WIRE 224 304 224 256
WIRE 560 304 560 256
WIRE 224 432 224 384
WIRE 560 432 560 368
WIRE 560 432 224 432
WIRE 560 464 560 432
SYMBOL Voltage 224 288 R0
WINDOW 3 24 96 Left 1
SYMATTR Value 5
SYMATTR InstName V1
SYMBOL Res 336 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 1
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL Diode 544 304 R0
WINDOW 3 24 64 Left 1
SYMATTR Value 1N4001
SYMATTR InstName D1
FLAG 560 464 0
FLAG 560 256 Vd
TEXT 16 488 Left 0 !.model 1N4001 D(Is=14.11n N=1.984 Rs=33.89m Ikf=94.81 Xti=3 Eg=1.11 Cjo=25.89p M=.44 Vj=.3245 Fc=.5 Bv=75 Ibv=10u Tt=5.7u Iave=1 Vpk=50 mfg=GI type=silicon)
TEXT 56 344 Left 1 !.dc V1 -5 5 0.01
TEXT 288 520 Left 1 ;I-V Characteristics of a Diode
* Z:\home\khalils\Downloads\files\data\raw_asc\17fc2efa157d_lab2_task1.asc
* Generated by LTspice 26.0.1 for Windows.
VEK N001 0 5
Q1 N001 N002 0 0 2SC4081UB
VEB N002 0 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc EB 0 2 0.001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 192 272 192
WIRE 192 256 192 192
WIRE -32 304 -48 304
WIRE 128 304 48 304
WIRE 192 432 192 352
SYMBOL npn 128 256 R0
SYMATTR InstName Q1
SYMATTR Value 2SC4081UB
SYMBOL voltage 64 304 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName EB
SYMATTR Value 0
SYMBOL voltage 176 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName EK
SYMATTR Value 5
FLAG 304 192 0
FLAG -48 304 0
FLAG 192 432 0
TEXT -136 456 Left 2 !.dc EB 0 2 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\57dd37ed1955_Inverter.asc
* Generated by LTspice 26.0.1 for Windows.
* Joel Brigida
* A
* Y
* 0
* 0
* 1
* 1
* Inverter [NOT]
+ TOX = 200E-10
+ PHI = 0.7
+ UO = 250
+ KP = 40E-6
+ RSH = 0
+ XJ = 500E-9
+ CGDO = 200E-12
+ CJ = 400E-6
+ CJSW = 300E-12 NSUB = 1E17 VTO = -0.9 ETA = 0
+ VMAX = 5E4 NFS = 1E12 LD = 100E-9 CGSO = 200E-12
+ PB = 1 MJSW = 0.5 GAMMA = 0.6 DELTA = 0.1
+ THETA = 0.1 KAPPA = 1 TPG = -1 CGBO = 1E-10 MJ= 0.5
+ TOX = 200E-10
+ PHI = 0.7
+ UO = 250
+ KP = 120E-6
+ RSH = 0
+ XJ = 500E-9
+ CGDO = 200E-12
+ CJ = 400E-6
+ CJSW = 300E-12
+ NSUB = 1E17 VTO = -1.0 ETA = 3.0E-6 VMAX = 1E5 NFS = 1E12
+ LD = 100E-9 CGSO = 200E-12 PB = 1 MJSW = 0.5
+ GAMMA = 0.5 DELTA = 3.0 THETA = 0.1
+ KAPPA = 0.3 TPG = 1 CGBO = 1E-10 MJ = 0.5
V1 N002 0 5
V2 A 0 PULSE(0 5 0 1n 1n 50m 100m 2)
M2 Y A 0 0 NMOS
M1 N002 A Y N002 PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.MODEL PMOS PMOS LEVEL = 3
.MODEL PMOS PMOS LEVEL = 3
.tran 200m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 680
WIRE -112 -32 -160 -32
WIRE -64 -32 -112 -32
WIRE 224 -32 0 -32
WIRE -160 0 -160 -32
WIRE -64 0 -64 -32
WIRE -64 0 -160 0
WIRE 0 0 0 -32
WIRE 224 48 224 -32
WIRE 272 48 224 48
WIRE -160 80 -160 0
WIRE -112 80 -112 -32
WIRE -112 80 -160 80
WIRE -64 80 -64 0
WIRE -64 80 -112 80
WIRE 272 96 272 48
WIRE 272 96 224 96
WIRE 0 112 0 80
WIRE 176 128 128 128
WIRE 128 144 128 128
WIRE 128 144 0 144
WIRE 0 176 0 144
WIRE 224 176 224 144
WIRE 368 176 224 176
WIRE 224 192 224 176
WIRE 272 240 224 240
WIRE 128 272 128 144
WIRE 176 272 128 272
WIRE 0 288 0 256
WIRE 272 288 272 240
WIRE 272 288 224 288
WIRE 224 320 224 288
SYMBOL nmos4 176 192 R0
SYMATTR InstName M2
SYMBOL voltage 0 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 32 86 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL pmos4 176 48 R0
SYMATTR InstName M1
SYMBOL voltage 0 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 32 30 Left 2
WINDOW 3 -193 100 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1n 1n 50m 100m 2)
FLAG 224 320 0
FLAG 0 112 0
FLAG 0 288 0
FLAG 368 176 Y
FLAG 0 144 A
TEXT 336 200 Left 2 !.MODEL PMOS PMOS LEVEL = 3\n+ TOX = 200E-10\n+ PHI = 0.7\n+ UO = 250 \n+ KP = 40E-6\n+ RSH = 0\n+ XJ = 500E-9 \n+ CGDO = 200E-12 \n+ CJ = 400E-6\n+ CJSW = 300E-12 NSUB = 1E17 VTO = -0.9 ETA = 0\n+ VMAX = 5E4 NFS = 1E12  LD = 100E-9 CGSO = 200E-12\n+ PB = 1  MJSW = 0.5  GAMMA  = 0.6  DELTA  = 0.1\n+ THETA  = 0.1 KAPPA = 1 TPG = -1  CGBO = 1E-10  MJ= 0.5
TEXT 336 -40 Left 2 !.MODEL PMOS PMOS LEVEL = 3\n+ TOX = 200E-10\n+ PHI = 0.7\n+ UO = 250\n+ KP = 120E-6\n+ RSH = 0\n+ XJ = 500E-9\n+ CGDO = 200E-12\n+ CJ = 400E-6\n+ CJSW = 300E-12\n+ NSUB = 1E17   VTO = -1.0    ETA = 3.0E-6  VMAX = 1E5 NFS = 1E12   \n+ LD = 100E-9   CGSO = 200E-12   PB = 1  MJSW = 0.5\n+ GAMMA  = 0.5  DELTA  = 3.0  THETA  = 0.1\n+ KAPPA  = 0.3  TPG = 1  CGBO = 1E-10  MJ = 0.5
TEXT 8 -56 Left 4 ;Joel Brigida
TEXT -144 -16 Left 3 ;A
TEXT -96 -16 Left 3 ;Y
TEXT -144 24 Left 3 ;0
TEXT -96 56 Left 3 ;0
TEXT -144 56 Left 3 ;1
TEXT -96 24 Left 3 ;1
TEXT -152 -48 Left 2 ;Inverter [NOT]
TEXT 38 310 Left 2 !.tran 200m