Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\44cd5ab44f8c_ComplexDiodeModel.asc
* Generated by LTspice 26.0.1 for Windows.
I1 v+ 0 PULSE(0 10 0 1 1) load
R3 illu 0 100Meg
R1 N001 0 {rsh_t}
V1 illu 0 {illu}
B1 0 N001 I=Iph_T*v(illu)/1000
D1 N001 0 SolarDiode
R2 N001 v+ {rs_t}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1
.temp 25
.temp 10 25 40 55 70
.step param illu list 200 400 600 800 1000
.param illu 1000
.param Voc 44.71
.param Isc 8.947
.param Vmp 37.23
.param Imp 8.06
.param Ki 0.0005
.param Kv -0.0034
.param K 1.38e-23
.param e 1.6e-19
.param a 1.3
.param n Voc/0.7
.param a_n a*n
.param voc_t voc*(1-kv*(25-temp))
.param isc_t isc*(1-ki*(25-temp))
.param vmp_t vmp*(1-kv*(25-temp))
.param imp_t imp*(1-ki*(25-temp))
.param rs_t (voc_t-vmp_t)/(16*imp_t)
.param rsh_t (5*vmp_t)/(isc_t-imp_t)
.param iph_t isc_t*(rsh_t+rs_t)/rsh_t
.param v_t (k*(temp+273.15))/e
.model solardiode d(is=io_t N=a_n Tnom=temp)
.param io_t ((rs_t+rsh_t)*isc_t-voc_t)/(rsh_t*exp(voc_t/(a_n*v_t)))
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 128 -128 128
WIRE -112 160 -112 128
WIRE -112 160 -192 160
WIRE -96 160 -112 160
WIRE 96 160 -16 160
WIRE 240 160 96 160
WIRE 400 160 240 160
WIRE -112 208 -128 208
WIRE -112 240 -112 208
WIRE -112 240 -192 240
WIRE 96 240 -112 240
WIRE 240 240 240 224
WIRE 240 240 96 240
WIRE 400 240 240 240
WIRE -192 256 -192 240
WIRE 432 320 336 320
WIRE 336 352 336 320
WIRE 432 352 432 320
WIRE 336 448 336 432
WIRE 432 448 432 432
SYMBOL voltage 336 336 R0
SYMATTR InstName V1
SYMATTR Value {illu}
SYMBOL res 80 144 R0
SYMATTR InstName R1
SYMATTR Value {rsh_t}
SYMBOL diode 224 160 R0
SYMATTR InstName D1
SYMATTR Value SolarDiode
SYMBOL res 0 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {rs_t}
SYMBOL res 416 336 R0
SYMATTR InstName R3
SYMATTR Value 100Meg
SYMBOL current -192 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 108 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMATTR Value PULSE(0 10 0 1 1)
SYMBOL bi2 400 160 R0
SYMATTR InstName B1
SYMATTR Value I=Iph_T*v(illu)/1000
FLAG -192 256 0
FLAG -128 128 v+
FLAG -128 208 v-
FLAG 336 448 0
FLAG 432 448 0
FLAG 432 320 illu
TEXT -184 -888 Left 2 !.tran 1\n \n.temp 25\n.temp 10 25 40 55 70\n \n.step param illu list 200 400 600 800 1000\n.param illu 1000\n \n.param Voc 44.71\n.param Isc 8.947\n.param Vmp 37.23\n.param Imp 8.06\n.param Ki 0.0005\n.param Kv -0.0034\n.param K 1.38e-23\n.param e 1.6e-19\n.param a 1.3\n.param n Voc/0.7\n.param a_n a*n\n \n.param voc_t voc*(1-kv*(25-temp))\n.param isc_t isc*(1-ki*(25-temp))\n.param vmp_t vmp*(1-kv*(25-temp))\n.param imp_t imp*(1-ki*(25-temp))\n.param rs_t (voc_t-vmp_t)/(16*imp_t)\n.param rsh_t (5*vmp_t)/(isc_t-imp_t)\n.param iph_t isc_t*(rsh_t+rs_t)/rsh_t\n.param v_t (k*(temp+273.15))/e
TEXT -168 56 Left 2 !.model solardiode d(is=io_t N=a_n Tnom=temp)
TEXT -192 -96 Left 2 !.param io_t ((rs_t+rsh_t)*isc_t-voc_t)/(rsh_t*exp(voc_t/(a_n*v_t)))
* Z:\home\khalils\Downloads\files\data\raw_asc\21f097cbee0a_1445.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1445.asy)
XU1 N003 N001 N002 N004 N004 0 N004 LTC1445 ;pnba OUT)V+)In-)In+)REF)V-)HYST
V2 N002 0 PULSE(0 3.3 0 5m 5m 0 10m)
V1 N001 0 5
.tran 30m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1144 800
WIRE 800 96 576 96
WIRE 800 112 800 96
WIRE 576 144 576 96
WIRE 224 192 208 192
WIRE 512 192 304 192
WIRE 688 208 640 208
WIRE 800 208 800 192
WIRE 512 224 496 224
WIRE 496 256 496 224
WIRE 512 256 496 256
WIRE 496 288 496 256
WIRE 512 288 496 288
WIRE 544 368 544 336
SYMBOL Comparators\\LTC1445 576 144 R0
SYMATTR InstName U1
SYMBOL voltage 800 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 320 192 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0 5m 5m 0 10m)
SYMATTR InstName V2
FLAG 800 208 0
FLAG 208 192 0
FLAG 544 368 0
TEXT 640 400 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3388-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3388-1.asy)
Rload OUT 0 24
C1 OUT 0 47 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
XU1 N001 0 N002 IN N003 OUT N001 0 0 NC_01 0 LTC3388-1 ;pnba EN)STBY)CAP)Vin)SW)Vout)Vin2)D1)D0)Pgood)GND
C2 N002 IN 1
V1 IN 0 5
L1 N003 OUT 100 Rser=10m Rpar=20K
.tran 5m startup
.lib LTC3388-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 -64 -16 -64
WIRE 160 -48 16 -48
WIRE 16 -32 16 -48
WIRE 160 0 160 -48
WIRE 256 0 256 -64
WIRE 16 48 16 32
WIRE 16 48 -80 48
WIRE 64 48 16 48
WIRE 384 48 352 48
WIRE 496 48 464 48
WIRE 544 48 496 48
WIRE 624 48 544 48
WIRE 544 64 544 48
WIRE 624 64 624 48
WIRE -80 80 -80 48
WIRE -16 144 -16 -64
WIRE 64 144 -16 144
WIRE 496 144 496 48
WIRE 496 144 352 144
WIRE 544 160 544 128
WIRE 624 160 624 144
WIRE -80 176 -80 160
WIRE 64 240 48 240
WIRE 384 240 352 240
WIRE 384 336 352 336
WIRE 208 400 208 384
SYMBOL voltage -80 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LTC3388-1 208 192 R0
SYMATTR InstName U1
SYMBOL cap 528 64 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL ind 368 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rser=10m Rpar=20K
SYMBOL res 608 48 R0
SYMATTR InstName Rload
SYMATTR Value 24
SYMBOL cap 0 -32 R0
SYMATTR InstName C2
SYMATTR Value 1
FLAG 208 400 0
FLAG -80 176 0
FLAG 48 240 0
FLAG 384 240 0
FLAG 384 336 0
FLAG 544 160 0
FLAG 624 160 0
FLAG -80 48 IN
FLAG 624 48 OUT
TEXT 472 280 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\fabb9a25eeba_highpass.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 0 1k
C1 N002 N001 1e-6
V1 N001 0 SINE(0 5 1k) AC 1 0
.ac dec 1000 1 500k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 336 176 336
WIRE 512 336 400 336
WIRE 512 384 512 336
WIRE 176 512 176 416
WIRE 512 512 512 464
WIRE 512 512 176 512
SYMBOL cap 400 320 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1e-6
SYMBOL voltage 176 320 R0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1k)
SYMATTR Value2 AC 1 0
SYMBOL res 496 368 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 512 512 0
TEXT 480 600 Left 2 !.ac dec 1000 1 500k
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1236.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1236.asy)
V1 +V 0 15
XU1 N004 N001 N002 N003 -V 0 +V ADG1236 ;pnba IN)SA)D)SB)Vss)GND)Vdd
V5 N002 0 SINE(0 10 2k)
R1 N001 0 1K
V2 -V 0 -15
V4 N004 0 pulse(0 3.3 0 1u 1u 5m 10m)
R2 N003 0 1K
.tran 30m
.lib ADG1236.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -752 -368 -800 -368
WIRE -800 -320 -800 -368
WIRE -1216 -256 -1216 -272
WIRE -1056 -256 -1072 -256
WIRE -896 -256 -976 -256
WIRE -656 -224 -704 -224
WIRE -544 -224 -576 -224
WIRE -1008 -192 -1072 -192
WIRE -896 -192 -928 -192
WIRE -1216 -160 -1216 -176
WIRE -896 -128 -1072 -128
WIRE -1216 -48 -1216 -64
WIRE -1072 -16 -1072 -128
WIRE -736 0 -736 -16
WIRE -864 16 -864 -16
WIRE -832 16 -864 16
WIRE -1216 48 -1216 32
WIRE -1072 80 -1072 64
SYMBOL voltage -1216 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -1072 -32 R0
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMBOL voltage -1216 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res -960 -240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -672 -224 R270
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 47 41 VRight 2
WINDOW 3 -46 -22 VRight 2
SYMATTR InstName V5
SYMATTR Value SINE(0 10 2k)
SYMBOL ADG1236 -800 -176 R0
SYMATTR InstName U1
SYMBOL res -912 -176 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 1K
FLAG -1216 48 0
FLAG -1216 -160 0
FLAG -1216 -272 +V
FLAG -1216 -64 -V
FLAG -544 -224 0
FLAG -1072 80 0
FLAG -1072 -256 0
FLAG -1072 -192 0
FLAG -752 -368 +V
FLAG -736 0 0
FLAG -832 16 -V
TEXT -656 -8 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8541.asc
* Generated by LTspice 26.0.1 for Windows.
* Comparator Function
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8541.asy)
R2 Vout N001 1Meg
VS V+ 0 5
XU1 Vref N001 V+ 0 Vout AD8541 ;pnba In+)In-)V+)V-)OUT
R1 N001 Vin 1k
VIN Vin 0 SINE(2.5 1 5k)
VREF Vref 0 2.5
.tran 1m
.lib AD8541.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE -160 144 -208 144
WIRE 64 144 -80 144
WIRE -400 256 -432 256
WIRE -352 256 -400 256
WIRE -208 256 -208 144
WIRE -208 256 -272 256
WIRE -80 256 -208 256
WIRE 64 272 64 144
WIRE 64 272 -16 272
WIRE 112 272 64 272
WIRE 144 272 112 272
WIRE -160 288 -208 288
WIRE -80 288 -160 288
WIRE -208 320 -208 288
WIRE -48 320 -48 304
WIRE -432 352 -432 256
WIRE -704 464 -704 432
WIRE -432 464 -432 432
WIRE -208 464 -208 400
SYMBOL voltage -432 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VIN
SYMATTR Value SINE(2.5 1 5k)
SYMBOL voltage -208 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VREF
SYMATTR Value 2.5
SYMBOL res -64 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL voltage -704 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 5
SYMBOL res -256 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL AD8541 -48 208 R0
SYMATTR InstName U1
FLAG -208 464 0
FLAG -704 464 0
FLAG -704 352 V+
FLAG -48 240 V+
FLAG -160 288 Vref
FLAG 112 272 Vout
FLAG -432 464 0
FLAG -400 256 Vin
FLAG -48 320 0
TEXT -720 200 Left 2 !.tran 1m
TEXT -712 136 Left 2 ;Comparator Function
* Z:\home\khalils\Downloads\files\data\raw_asc\1b9df59de0c9_Draft09.asc
* Generated by LTspice 26.0.1 for Windows.
* amp,ADC ground
* 1k. simulate analog switch return\n8nA. with bjt op
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1006.asy)
R8 N003 N001 50k
V1 VCC 0 15
V4 0 VEE 15
C3 N002 N001 20p
R1 N002 LO-SIDE 1k
R9 N001 N002 50k
XU1 0 N001 VCC VEE N002 LT1006 ;pnba In+)In-)V+)V-)OUT
XU2 BOOT-DCV N003 VCC VEE N003 LT1006 ;pnba In+)In-)V+)V-)OUT
V3 BOOT-DCV LO-SIDE 10V
.tran 1ms
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2756 2104
WIRE -96 -736 -128 -736
WIRE -16 -736 -32 -736
WIRE -128 -656 -128 -736
WIRE -112 -656 -128 -656
WIRE -16 -656 -16 -736
WIRE -16 -656 -32 -656
WIRE -288 -624 -400 -624
WIRE -400 -576 -400 -624
WIRE -384 -576 -400 -576
WIRE -288 -560 -288 -624
WIRE -288 -560 -320 -560
WIRE -208 -560 -288 -560
WIRE -128 -560 -128 -656
WIRE -112 -560 -128 -560
WIRE -592 -544 -752 -544
WIRE -384 -544 -592 -544
WIRE -16 -544 -16 -656
WIRE -16 -544 -48 -544
WIRE 48 -544 -16 -544
WIRE -112 -528 -128 -528
WIRE -752 -400 -752 -464
WIRE -592 -400 -752 -400
WIRE -416 -400 -592 -400
WIRE 48 -400 48 -544
WIRE 48 -400 -336 -400
WIRE -128 -272 -128 -528
WIRE -784 -144 -864 -144
WIRE -864 -128 -864 -144
SYMBOL OpAmps\\LT1006 -80 -608 R0
SYMATTR InstName U1
SYMBOL res -224 -544 R270
WINDOW 0 58 -14 VTop 2
WINDOW 3 87 38 VBottom 2
SYMATTR InstName R8
SYMATTR Value 50k
SYMBOL cap -32 -752 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 20p
SYMBOL res -128 -640 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 59 107 VBottom 2
SYMATTR InstName R9
SYMATTR Value 50k
SYMBOL OpAmps\\LT1006 -352 -624 R0
SYMATTR InstName U2
SYMBOL voltage -864 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
SYMATTR InstName V4
SYMATTR Value 15
SYMBOL res -320 -416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -864 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 42 41 Left 2
SYMATTR Value 15
SYMATTR InstName V1
SYMBOL voltage -752 -560 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -19 -9 Left 2
WINDOW 0 -22 -38 Left 2
SYMATTR Value 10V
SYMATTR InstName V3
FLAG -864 -224 VCC
FLAG -864 -48 VEE
FLAG -784 -144 0
FLAG -80 -576 VCC
FLAG -80 -512 VEE
FLAG -128 -272 0
FLAG -592 -400 LO-SIDE
FLAG -592 -544 BOOT-DCV
FLAG -352 -592 VCC
FLAG -352 -528 VEE
TEXT -728 -176 Left 2 !.tran 1ms
TEXT -128 -232 Left 2 ;amp,ADC ground
TEXT -576 -320 Left 2 ;1k. simulate analog switch return\n8nA. with bjt op
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG601.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input.\nPin capacitance and charge injection not included.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG601.asy)
V3 N003 0 PULSE(0 3 0 10n 10n 5m 10m)
Vs N001 0 SINE(0 5 1k)
V2 -V 0 -5
V1 +V 0 5
C1 N002 0 36p
R1 N002 0 301
XU1 +V -V N003 N001 N002 0 ADG601 ;pnba Vdd)Vss)IN)S)D)GND
.tran 20m
.lib ADG601.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 304 80 304 48
WIRE -128 160 -160 160
WIRE 208 160 -48 160
WIRE 464 160 400 160
WIRE 608 160 464 160
WIRE 464 192 464 160
WIRE 608 192 608 160
WIRE 208 224 80 224
WIRE 464 304 464 272
WIRE 608 304 608 256
WIRE -240 320 -240 272
WIRE -128 320 -128 272
WIRE 80 368 80 224
WIRE 240 384 240 336
WIRE 368 384 368 336
WIRE -240 448 -240 400
WIRE -128 448 -128 400
WIRE 80 496 80 448
SYMBOL voltage -128 304 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -32 160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Vs
SYMATTR Value SINE(0 5 1k)
SYMBOL cap 592 192 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL ADG601 304 208 R0
SYMATTR InstName U1
SYMBOL voltage -240 304 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 80 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 3 0 10n 10n 5m 10m)
SYMBOL res 448 176 R0
SYMATTR InstName R1
SYMATTR Value 301
FLAG 464 304 0
FLAG 608 304 0
FLAG -240 448 0
FLAG -160 160 0
FLAG 80 496 0
FLAG 368 384 0
FLAG 304 48 +V
FLAG -240 272 +V
FLAG 240 384 -V
FLAG -128 448 0
FLAG -128 272 -V
TEXT 536 448 Left 2 !.tran 20m
TEXT -376 -48 Left 2 ;Note:\nSwitch shown for a logic 0 input.\nPin capacitance and charge injection not included.
* Z:\home\khalils\Downloads\files\data\raw_asc\2f987ef302bb_current_source.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP292.asy)
D1 N002 N004 AOT-2015
V1 N002 0 20
V2 N005 0 SINE(1.65 1.65 1)
V3 N001 0 5
Q1 N004 N006 N003 0 NPN
XU2 N005 N003 N002 0 N006 OP292 ;pnba In+)In-)V+)V-)OUT
R1 N003 0 450
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 100
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 -240 112 -240
WIRE 112 -208 112 -240
WIRE 160 -48 96 -48
WIRE 240 -48 224 -48
WIRE 272 -48 240 -48
WIRE 96 -32 96 -48
WIRE 272 -16 272 -48
WIRE 96 64 96 48
WIRE 240 64 240 -48
WIRE 240 64 96 64
WIRE 352 80 16 80
WIRE 272 112 272 48
WIRE -16 128 -80 128
WIRE 96 128 96 64
WIRE 16 144 16 80
WIRE 64 144 16 144
WIRE 208 160 128 160
WIRE -16 176 -16 128
WIRE 64 176 -16 176
WIRE 272 224 272 208
WIRE 352 224 352 80
WIRE 352 224 272 224
WIRE -80 240 -80 208
WIRE 96 256 96 192
WIRE 272 256 272 224
WIRE 288 256 272 256
WIRE 288 384 288 336
SYMBOL voltage 112 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -80 112 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(1.65 1.65 1)
SYMBOL LED 256 -16 R0
SYMATTR InstName D1
SYMATTR Value AOT-2015
SYMBOL OpAmps\\OP292 96 96 R0
WINDOW 3 23 104 Left 2
SYMATTR InstName U2
SYMBOL res 272 240 R0
SYMATTR InstName R1
SYMATTR Value 450
SYMBOL voltage 96 64 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 20
SYMBOL npn 208 112 R0
SYMATTR InstName Q1
FLAG 96 256 0
FLAG -80 240 0
FLAG 160 -48 0
FLAG 288 384 0
FLAG 112 -128 0
TEXT -114 408 Left 2 !.tran 100
* Z:\home\khalils\Downloads\files\data\raw_asc\0b1b2f786575_nand.asc
* Generated by LTspice 26.0.1 for Windows.
M2 VDD VIN2 VOUT VDD PMOS l=90n w=400n
M4 N001 VIN2 0 0 NMOS l=90n w=200n
M3 VOUT VIN1 N001 0 NMOS l=90n w=200n
M1 VDD VIN1 VOUT VDD PMOS l=90n w=400n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 884
WIRE 128 112 128 80
WIRE 128 112 112 112
WIRE 320 112 320 80
WIRE 336 112 320 112
WIRE 128 160 128 112
WIRE 128 160 112 160
WIRE 336 160 336 112
WIRE 336 160 320 160
WIRE 64 192 48 192
WIRE 272 192 256 192
WIRE 112 304 112 208
WIRE 240 304 112 304
WIRE 320 304 320 208
WIRE 320 304 240 304
WIRE 352 304 320 304
WIRE 240 320 240 304
WIRE 320 368 240 368
WIRE 192 400 176 400
WIRE 240 448 240 416
WIRE 256 496 240 496
WIRE 192 528 176 528
WIRE 256 544 256 496
WIRE 256 544 240 544
WIRE 320 544 320 368
WIRE 320 544 256 544
WIRE 256 576 256 544
IOPIN 48 192 In
IOPIN 256 192 In
IOPIN 176 400 In
IOPIN 176 528 In
IOPIN 128 80 In
IOPIN 352 304 Out
IOPIN 320 80 In
SYMBOL nmos4 192 448 R0
SYMATTR InstName M4
SYMATTR Value2 l=90n w=200n
SYMBOL pmos4 272 112 R0
SYMATTR InstName M2
SYMATTR Value2 l=90n w=400n
SYMBOL nmos4 192 320 R0
SYMATTR InstName M3
SYMATTR Value2 l=90n w=200n
SYMBOL pmos4 64 112 R0
SYMATTR InstName M1
SYMATTR Value2 l=90n w=400n
FLAG 48 192 VIN1
FLAG 256 192 VIN2
FLAG 256 576 0
FLAG 176 400 VIN1
FLAG 176 528 VIN2
FLAG 128 80 VDD
FLAG 352 304 VOUT
FLAG 320 80 VDD
* Z:\home\khalils\Downloads\files\data\raw_asc\65cca94cd735_2020_current_sense_sin_drive_osc_v07.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU7 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1711.asy)
V1 COM 0 3.3V
C7 ESD1 0 0.5pF
D2 ESD1 COM D
C_ant ANT 0 8pF
XU7 ESD1 N001 COM 0 0 OUT N001 0 LT1711 ;pnba In+)In-)V+)V-)GND)OUT+)OUT-)LATCH
R_loss ANT 0 2400K
C10 COM ESD1 0.5pF
L1 ANT ESD1 1.5mH Rser=32 Rpar=20Meg
R47 ESD1 N001 12
C_hand ANT 0 0.0001pF
D1 0 ESD1 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 1.2m 0.2m 0.00001m
.IC V(ANT)=1u
.lib LT1711.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3920 3748
WIRE -592 496 -592 448
WIRE -416 496 -592 496
WIRE -240 496 -416 496
WIRE -128 496 -240 496
WIRE 16 496 16 432
WIRE 16 496 -48 496
WIRE 96 496 16 496
WIRE 128 496 96 496
WIRE 240 496 208 496
WIRE 416 496 240 496
WIRE -592 544 -592 496
WIRE -416 544 -416 496
WIRE -240 560 -240 496
WIRE 320 624 320 576
WIRE 240 656 240 496
WIRE 288 656 240 656
WIRE 480 656 368 656
WIRE 96 688 96 496
WIRE 288 688 96 688
WIRE 416 688 416 496
WIRE 416 688 368 688
WIRE -592 704 -592 608
WIRE -416 704 -416 608
WIRE -240 704 -240 640
WIRE 304 752 304 720
WIRE 320 752 320 720
WIRE 320 752 304 752
WIRE 336 752 336 720
WIRE 336 752 320 752
WIRE 320 800 320 752
WIRE -240 832 -240 784
WIRE -240 832 -352 832
WIRE -352 864 -352 832
WIRE -240 864 -240 832
WIRE -544 944 -544 912
WIRE -352 976 -352 928
WIRE -240 976 -240 928
WIRE -240 976 -352 976
WIRE -176 976 -240 976
WIRE -352 1024 -352 976
WIRE -240 1024 -240 976
WIRE -544 1056 -544 1024
WIRE -352 1136 -352 1088
WIRE -240 1136 -240 1088
WIRE -240 1136 -352 1136
WIRE -240 1184 -240 1136
SYMBOL cap -432 544 R0
SYMATTR InstName C_ant
SYMATTR Value 8pF
SYMBOL cap -368 1024 R0
SYMATTR InstName C7
SYMATTR Value 0.5pF
SYMBOL res -256 544 R0
SYMATTR InstName R_loss
SYMATTR Value 2400K
SYMBOL ind -144 512 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.5mH
SYMATTR SpiceLine Rser=32 Rpar=20Meg
SYMBOL diode -224 928 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMBOL res 112 512 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R47
SYMATTR Value 12
SYMBOL diode -224 1088 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL voltage -544 928 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3V
SYMBOL Comparators\\LT1711 320 672 R0
SYMATTR InstName U7
SYMBOL cap -368 864 R0
SYMATTR InstName C10
SYMATTR Value 0.5pF
SYMBOL cap -608 544 R0
SYMATTR InstName C_hand
SYMATTR Value 0.0001pF
FLAG -544 1056 0
FLAG -544 912 COM
FLAG -240 1184 0
FLAG -240 784 COM
FLAG -176 976 ESD1
FLAG -592 448 ANT
FLAG -592 704 0
FLAG -416 704 0
FLAG -240 704 0
FLAG 16 432 ESD1
FLAG 320 800 0
FLAG 320 576 COM
FLAG 480 656 OUT
TEXT -600 240 Left 2 !.tran 0 1.2m 0.2m 0.00001m
TEXT -600 344 Left 2 !.IC V(ANT)=1u
* Z:\home\khalils\Downloads\files\data\raw_asc\279d9e2ec2e7_class_phi2_paper.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 N002 62.7n
L3 N002 N003 357n
C1 N004 N003 96.5p
R1 N004 0 25
C3 0 N002 290p
V1 0 N005 PULSE(0 10 0 1n 1n 11n 36n)
C2 0 N006 95.7p
L2 N002 N006 80n
D1 0 N002 D_ideal
S1 N002 0 0 N005 MYSW
V2 N001 0 24
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model MYSW SW(Ron=30m Roff=1Meg Vt=5 Vh=-.4)
.tran 0 50u 49u
.model D_ideal D(Ron=0.1n Roff=1G Vfwd=0.7)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 192 64 112 64
WIRE 320 64 272 64
WIRE 400 64 320 64
WIRE 560 64 400 64
WIRE 640 64 560 64
WIRE 736 64 640 64
WIRE 848 64 816 64
WIRE 928 64 912 64
WIRE 112 80 112 64
WIRE 640 80 640 64
WIRE 928 128 928 64
WIRE 112 176 112 160
WIRE 320 176 320 64
WIRE 400 176 400 64
WIRE 272 192 208 192
WIRE 560 192 560 64
WIRE 640 192 640 160
WIRE 224 272 208 272
WIRE 272 272 272 240
WIRE 272 272 224 272
WIRE 320 272 320 256
WIRE 400 272 400 240
WIRE 560 272 560 256
WIRE 640 272 640 256
WIRE 928 272 928 208
WIRE 224 288 224 272
SYMBOL cap 912 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 96.5p
SYMBOL sw 320 160 R0
WINDOW 0 -36 4 Left 2
WINDOW 3 -18 142 Left 2
SYMATTR InstName S1
SYMATTR Value MYSW
SYMBOL voltage 208 288 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 10 0 1n 1n 11n 36n)
SYMBOL ind 176 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 62.7n
SYMBOL diode 416 240 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value D_ideal
SYMBOL cap 576 256 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value 290p
SYMBOL cap 656 256 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 95.7p
SYMBOL res 912 112 R0
SYMATTR InstName R1
SYMATTR Value 25
SYMBOL voltage 112 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 24
SYMBOL ind 720 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L3
SYMATTR Value 357n
SYMBOL ind 624 64 R0
SYMATTR InstName L2
SYMATTR Value 80n
FLAG 320 272 0
FLAG 560 272 0
FLAG 640 272 0
FLAG 112 176 0
FLAG 928 272 0
FLAG 224 288 0
FLAG 400 272 0
TEXT 192 352 Left 2 !.model MYSW SW(Ron=30m Roff=1Meg Vt=5 Vh=-.4)
TEXT -188 372 Left 2 !.tran 0 50u 49u
TEXT 200 384 Left 2 !.model D_ideal D(Ron=0.1n Roff=1G Vfwd=0.7)