Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\b0cc69cb88f5_PMOSvtc.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 -1.8
V2 N002 0 -1.8
M1 N001 N002 0 N003 PMOS l=1080nm w=1080nm
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V1 0 -1.80 0.1 V2 0 -1.8 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 64 176 64
WIRE 176 96 176 64
WIRE 176 208 176 176
WIRE 128 288 0 288
WIRE 176 288 176 256
WIRE 0 352 0 288
WIRE 176 368 176 304
WIRE 0 496 0 432
FLAG 0 496 0
FLAG 176 368 0
FLAG 272 64 0
SYMBOL voltage 176 192 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -1.8
SYMBOL voltage 0 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -1.8
SYMBOL pmos4 128 208 R0
SYMATTR InstName M1
SYMATTR Value2 l=1080nm w=1080nm
TEXT -272 80 Left 2 !.dc V1 0 -1.80 0.1 V2 0 -1.8 0.2
* Z:\home\khalils\Downloads\files\data\raw_asc\1a0160fa8df7_A03_-_Simulacao.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N001 0 20m
D3 0 N003 D
K L1 L2 1
R1 N001 0 7.6
V1 N004 0 SINE(0 311 60) Rser=1u
L1 N004 0 1
D4 0 N002 D
D2 N003 N001 D
D1 N002 N001 D
L2 N002 N003 3m
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 0 256 0
WIRE 512 0 384 0
WIRE 656 0 512 0
WIRE 656 64 656 0
WIRE 512 80 512 0
WIRE 256 96 256 64
WIRE 256 96 0 96
WIRE 384 96 384 64
WIRE 384 96 304 96
WIRE 256 128 256 96
WIRE 384 128 384 96
WIRE -144 208 -320 208
WIRE 256 240 256 192
WIRE 384 240 384 192
WIRE 384 240 256 240
WIRE 512 240 512 160
WIRE 512 240 384 240
WIRE 656 240 656 128
WIRE 656 240 512 240
WIRE -320 256 -320 208
WIRE -144 256 -144 208
WIRE 0 256 0 96
WIRE 512 304 512 240
WIRE -320 384 -320 336
WIRE -192 384 -320 384
WIRE -144 384 -144 336
WIRE -144 384 -192 384
WIRE 0 384 0 336
WIRE 304 384 304 96
WIRE 304 384 0 384
WIRE -192 432 -192 384
SYMBOL voltage -320 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 311 60)
SYMATTR SpiceLine Rser=1u
SYMBOL diode 272 64 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL diode 272 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMBOL ind2 -160 240 R0
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR Type ind
SYMBOL diode 400 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMBOL ind2 -16 240 R0
SYMATTR InstName L2
SYMATTR Value 3m
SYMATTR Type ind
SYMBOL diode 400 64 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMBOL res 496 64 R0
SYMATTR InstName R1
SYMATTR Value 7.6
SYMBOL cap 640 64 R0
SYMATTR InstName C1
SYMATTR Value 20m
FLAG -192 432 0
FLAG 512 304 0
TEXT -320 416 Left 2 !K L1 L2 1
TEXT -354 436 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\41ccdb11c2e4_AD8067.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8067.asy)
XU1 N003 N001 +V -V OUT AD8067 ;pnba In+)In-)V+)V-)OUT
R4 N003 N002 49.9
V1 +V 0 12
Vin N002 0 SINE(0 1 1Meg)
V2 -V 0 -12
R2 OUT N001 1K
Rload OUT 0 1K
R1 N001 0 110
.tran 10u
.lib AD8067.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 96 -1200 96 -1216
WIRE 208 -1200 208 -1216
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 96 -1104 96 -1120
WIRE 208 -1104 208 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 720 -1104 640 -1104
WIRE 400 -1088 304 -1088
WIRE 544 -1088 480 -1088
WIRE 720 -1088 720 -1104
WIRE 304 -1072 304 -1088
WIRE 720 -992 720 -1008
WIRE 304 -976 304 -992
SYMBOL voltage 208 -1216 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL voltage 96 -1216 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 110
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 704 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL res 496 -1104 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 49.9
SYMBOL Opamps\\AD8067 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 304 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 1Meg)
FLAG 96 -1216 +V
FLAG 304 -976 0
FLAG 720 -1104 OUT
FLAG 576 -1136 +V
FLAG 208 -1216 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 720 -992 0
FLAG 208 -1104 0
FLAG 96 -1104 0
TEXT 784 -896 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1175.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 IN IN OUT OUT 0 N001 IN LT1175 ;pnba Vin)Ilim2)Output)Sense)GND)_SHDN)Ilim4
V1 IN 0 -5
Rload 0 OUT 100
C1 0 OUT 1 Rser=1
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1175.asy)
.lib LT1175.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 80 144 64
WIRE 304 80 304 64
WIRE 48 144 -80 144
WIRE 80 144 48 144
WIRE 400 144 368 144
WIRE 464 144 400 144
WIRE 576 144 464 144
WIRE -80 160 -80 144
WIRE 464 160 464 144
WIRE 576 160 576 144
WIRE 48 240 48 144
WIRE 80 240 48 240
WIRE -80 256 -80 240
WIRE 464 256 464 224
WIRE 576 256 576 240
WIRE 48 336 48 240
WIRE 80 336 48 336
WIRE 400 336 400 144
WIRE 400 336 368 336
FLAG 304 64 0
FLAG -80 256 0
FLAG 576 256 0
FLAG 464 256 0
FLAG 576 144 OUT
FLAG -80 144 IN
SYMBOL PowerProducts\\LT1175 224 240 R0
SYMATTR InstName U1
SYMBOL voltage -80 144 R0
SYMATTR InstName V1
SYMATTR Value -5
SYMBOL res 560 256 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 448 224 M180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 1
SYMATTR SpiceLine Rser=1
TEXT 424 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1c0313618013_NOR_SYM.asc
* Generated by LTspice 26.0.1 for Windows.
M4 Y A 0 0 NMOS
M1 N001 A VDD VDD PMOS
M2 Y B N001 N001 PMOS
M3 Y B 0 0 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -192 -208 -192 -240
WIRE -112 -208 -192 -208
WIRE -112 -160 -112 -208
WIRE -112 -160 -192 -160
WIRE -192 -64 -192 -112
WIRE -112 -64 -192 -64
WIRE -112 -16 -112 -64
WIRE -112 -16 -192 -16
WIRE -192 64 -192 32
WIRE 32 64 -192 64
WIRE -192 96 -192 64
WIRE -192 96 -288 96
WIRE -80 96 -192 96
WIRE -288 128 -288 96
WIRE -80 128 -80 96
WIRE -208 176 -288 176
WIRE 0 176 -80 176
WIRE -208 224 -208 176
WIRE -208 224 -288 224
WIRE 0 224 0 176
WIRE 0 224 -80 224
WIRE -288 272 -288 224
WIRE -192 272 -288 272
WIRE -80 272 -80 224
WIRE -80 272 -192 272
WIRE -192 304 -192 272
IOPIN -192 -240 In
IOPIN -192 304 In
IOPIN -336 208 In
IOPIN -128 208 In
IOPIN -240 -192 In
IOPIN -240 -48 In
IOPIN 32 64 Out
SYMBOL nmos4 -336 128 R0
SYMATTR InstName M4
SYMBOL pmos4 -240 32 M180
SYMATTR InstName M2
SYMBOL nmos4 -128 128 R0
SYMATTR InstName M3
SYMBOL pmos4 -240 -112 M180
SYMATTR InstName M1
FLAG -192 -240 VDD
FLAG -192 304 GND
FLAG -336 208 A
FLAG -128 208 B
FLAG -240 -192 A
FLAG -240 -48 B
FLAG 32 64 Y
* Z:\home\khalils\Downloads\files\data\raw_asc\2007e83f53a7_ADG774A.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nOff Isolation is -69 dB at 10MHz\nQinj not included\nOnly one channel included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG774A.asy)
V3 N004 0 PULSE(0 3 0 20n 20n 10u 20u)
C1 N002 0 36p
V1 N001 0 3
V5 +V 0 5
XU2 N004 N001 N002 N003 +V 0 0 ADG774A ;pnba IN)SA)D)SB)Vdd)GND)_EN
R1 N002 0 49.9
V2 N003 0 0
.tran 100u
.lib ADG774A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1696 -272 -1920 -272
WIRE -1920 -256 -1920 -272
WIRE -1408 -240 -1504 -240
WIRE -1296 -240 -1408 -240
WIRE -1408 -224 -1408 -240
WIRE -1296 -224 -1296 -240
WIRE -1696 -208 -1840 -208
WIRE -1840 -192 -1840 -208
WIRE -1920 -160 -1920 -176
WIRE -1696 -144 -1760 -144
WIRE -1472 -144 -1504 -144
WIRE -1472 -128 -1472 -144
WIRE -1408 -128 -1408 -144
WIRE -1296 -128 -1296 -160
WIRE -1840 -96 -1840 -112
WIRE -1760 -80 -1760 -144
WIRE -1600 -16 -1600 -32
WIRE -1760 32 -1760 0
SYMBOL cap -1312 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL ADG774A -1600 -192 R0
SYMATTR InstName U2
SYMBOL voltage -1920 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL voltage -1840 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage -1760 -96 R0
WINDOW 3 24 136 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 20n 20n 10u 20u)
SYMATTR InstName V3
SYMBOL res -1424 -240 R0
SYMATTR InstName R1
SYMATTR Value 49.9
SYMBOL voltage -2144 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 5
FLAG -1920 -160 0
FLAG -1840 -96 0
FLAG -1760 32 0
FLAG -1600 -368 +V
FLAG -1408 -128 0
FLAG -1600 -16 0
FLAG -1296 -128 0
FLAG -1472 -128 0
FLAG -2144 -64 0
FLAG -2144 -144 +V
TEXT -1360 -40 Left 2 !.tran 100u
TEXT -2160 -472 Left 2 ;Note:\nOff Isolation is -69 dB at 10MHz\nQinj not included\nOnly one channel included\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4623.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4623.asy)
C2 OUT 0 47 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
C1 N002 0 .005
V1 IN 0 12
Rload OUT 0 .5
R1 N003 0 40.2K
XU1 NC_01 N001 N001 N003 N002 NC_02 IN NC_03 OUT 0 0 IN IN MP_04 MP_05 MP_06 NC_07 NC_08 NC_09 LTM4623 ;pnba FREQ)INTVcc)Mode)FB)Track/SS)COMP)Run)Pgood)Vout)GND)SGND)Vin)SVin))))CLKIN)CLKOUT)PhMode
.tran 1.5m startup
.lib LTM4623.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 448 -112 48 -112
WIRE 64 -96 -64 -96
WIRE 192 -96 64 -96
WIRE 320 -96 192 -96
WIRE -64 -80 -64 -96
WIRE 192 -80 192 -96
WIRE 320 -80 320 -96
WIRE 64 -16 64 -96
WIRE 80 -16 64 -16
WIRE -64 16 -64 0
WIRE 48 80 48 -112
WIRE 80 80 48 80
WIRE 448 80 448 -112
WIRE 448 80 432 80
WIRE -16 176 -32 176
WIRE 80 176 48 176
WIRE 576 176 432 176
WIRE 672 176 576 176
WIRE 576 192 576 176
WIRE 672 192 672 176
WIRE 496 272 432 272
WIRE 496 288 496 272
WIRE 576 288 576 256
WIRE 672 288 672 272
WIRE 496 384 496 368
WIRE 192 544 192 528
WIRE 320 544 320 528
SYMBOL res 480 272 R0
SYMATTR InstName R1
SYMATTR Value 40.2K
SYMBOL res 656 176 R0
SYMATTR InstName Rload
SYMATTR Value .5
SYMBOL cap 560 192 R0
SYMATTR InstName C2
SYMATTR Value 47
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL cap 48 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .005
SYMBOL PowerProducts\\LTM4623 256 224 R0
SYMATTR InstName U1
SYMBOL voltage -64 -96 R0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 192 544 0
FLAG 320 544 0
FLAG -64 16 0
FLAG -64 -96 IN
FLAG -32 176 0
FLAG 496 384 0
FLAG 672 288 0
FLAG 576 288 0
FLAG 672 176 OUT
TEXT 480 456 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6994-2.asc
* Generated by LTspice 26.0.1 for Windows.
* LTC6994-2 10ms Delay Interval Generator\nOutput Transitions to IN Level After Delay From Either IN Edge\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6994-2.asy)
R1 N003 0 121K
R2 N002 N004 1000K
V1 N002 0 5
XU1 N001 0 N003 N004 N002 OUT LTC6994-2 ;pnba IN)GND)SET)DIV)V+)OUT
R4 OUT 0 100K
V2 N001 0 PULSE(0 3.3 0.5m 1n 1n 12.5m 25m 3)
R3 N004 0 392K
.tran 100m startup
.lib LTC6994-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE -192 96 -208 96
WIRE 96 96 -112 96
WIRE 624 96 320 96
WIRE 624 112 624 96
WIRE 96 176 80 176
WIRE 368 176 320 176
WIRE 512 176 368 176
WIRE 368 192 368 176
WIRE 512 192 512 176
WIRE 624 208 624 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 336 256 320 256
WIRE 336 288 336 256
WIRE 368 288 368 272
WIRE 368 288 336 288
WIRE 512 288 512 272
WIRE 368 304 368 288
WIRE 368 400 368 384
SYMBOL res 352 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL SpecialFunctions\\LTC6994-2 208 176 R0
SYMATTR InstName U1
SYMBOL voltage -96 96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0.5m 1n 1n 12.5m 25m 3)
SYMATTR InstName V2
SYMBOL voltage 512 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 608 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL res 352 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 121K
FLAG -208 96 0
FLAG 512 288 0
FLAG 624 96 OUT
FLAG -16 256 0
FLAG 368 400 0
FLAG 624 208 0
FLAG 80 176 0
TEXT 520 352 Left 2 !.tran 100m startup
TEXT 208 56 Bottom 2 ;LTC6994-2 10ms Delay Interval Generator\nOutput Transitions to IN Level After Delay From Either IN Edge\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX40111.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX40111.asy)
XU1 IN OUT Vcc Vee OUT Vcc MAX40111 ;pnba In+)In-)V+)V-)OUT)SHDN
RL OUT 0 10k
Vee 0 Vee 2.5
Vcc Vcc 0 2.5
V1 IN 0 SINE(0 50m 100k)
CL OUT 0 15p
.tran 10u
.lib MAX40111.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 64 288 64 272
WIRE 416 352 416 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 64 448 64 400
WIRE 416 448 416 416
WIRE 448 448 448 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 64 544 64 528
WIRE 304 592 304 576
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 10k
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 100k)
SYMBOL MAX40111 432 400 R0
SYMATTR InstName U1
FLAG 720 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
FLAG 448 448 Vcc
TEXT 16 632 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4891-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4891-1.asy)
XU1 IN N001 +V -V OUT ADA4891-1 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 2.5
R2 OUT N001 10K
Rload OUT 0 10K
V2 -V 0 -2.5
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
.tran 1m
.lib ADA4891-1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1136 144 -1152
WIRE 256 -1136 256 -1152
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1040 144 -1056
WIRE 256 -1040 256 -1056
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 144 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL ADA4891-1 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 256 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
FLAG 144 -1152 +V
FLAG 144 -1040 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1152 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 768 -992 0
FLAG 256 -1040 0
TEXT 752 -936 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3612.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 IN 0 MP_01 MP_02 MP_03 MP_04 IN MP_05 MP_06 N001 MP_07 IN IN IN NC_08 0 N002 IN IN 0 LTC3612 ;pnba DDR)Rt/Sync)SGND)))))PVin)))SW))PVin_drv)SVin)Run)Pgood)Mode)FB)Ith)Trk/SS)PGND
V1 IN 0 3.6
L1 N001 OUT .56 Rpar=5K
C1 OUT 0 47 Rser=2m
R1 OUT N002 665K
R2 N002 0 210K
Rload OUT 0 .82
.tran 1.2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3612.asy)
.lib LTC3612.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 -96 -96 -96
WIRE 160 -96 0 -96
WIRE 288 -96 160 -96
WIRE 400 -96 288 -96
WIRE -96 -80 -96 -96
WIRE 160 -80 160 -96
WIRE 288 -80 288 -96
WIRE 64 -16 48 -16
WIRE 400 -16 400 -96
WIRE 400 -16 384 -16
WIRE -96 16 -96 0
WIRE 432 96 384 96
WIRE 544 96 512 96
WIRE 672 96 544 96
WIRE 752 96 672 96
WIRE 544 112 544 96
WIRE 672 112 672 96
WIRE 752 112 752 96
WIRE 0 208 0 -96
WIRE 64 208 0 208
WIRE 544 208 544 192
WIRE 544 208 384 208
WIRE 672 208 672 176
WIRE 752 208 752 192
WIRE 544 224 544 208
WIRE 64 320 48 320
WIRE 400 320 400 -16
WIRE 400 320 384 320
WIRE 544 320 544 304
WIRE 0 432 0 208
WIRE 64 432 0 432
WIRE 400 432 400 320
WIRE 400 432 384 432
WIRE 160 512 160 496
WIRE 288 512 288 496
FLAG 48 -16 0
FLAG 48 320 0
FLAG 160 512 0
FLAG 288 512 0
FLAG 672 208 0
FLAG 544 320 0
FLAG 752 208 0
FLAG 752 96 OUT
FLAG -96 -96 IN
FLAG -96 16 0
SYMBOL PowerProducts\\LTC3612 224 208 R0
SYMATTR InstName U1
SYMBOL voltage -96 -96 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL ind 416 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value .56
SYMATTR SpiceLine Rpar=5K
SYMBOL cap 656 112 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMATTR SpiceLine Rser=2m
SYMBOL res 528 96 R0
SYMATTR InstName R1
SYMATTR Value 665K
SYMBOL res 528 208 R0
SYMATTR InstName R2
SYMATTR Value 210K
SYMBOL res 736 96 R0
SYMATTR InstName Rload
SYMATTR Value .82
TEXT 520 424 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1cf997ea1f08_TS5.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N002 N005 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
C3 N006 0 10n
XU2 N003 N002 N003 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R3 N006 N003 8k620
C1 N005 0 1n
R2 N005 N001 56k
R1 N001 N004 56k
C2 N002 N001 2n
V1 N004 0 AC 1
.ac dec 1k 1 1MEG
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1144 680
WIRE 352 -208 256 -208
WIRE 528 -208 416 -208
WIRE 752 -96 608 -96
WIRE 608 -48 608 -96
WIRE 640 -48 608 -48
WIRE 160 -32 112 -32
WIRE 256 -32 256 -208
WIRE 256 -32 240 -32
WIRE 272 -32 256 -32
WIRE 432 -32 352 -32
WIRE 752 -32 752 -96
WIRE 752 -32 704 -32
WIRE 832 -32 752 -32
WIRE 976 -32 912 -32
WIRE 528 -16 528 -208
WIRE 528 -16 496 -16
WIRE 640 -16 528 -16
WIRE 432 0 400 0
WIRE 112 16 112 -32
WIRE 352 32 352 -32
WIRE 976 32 976 -32
WIRE 400 48 400 0
WIRE 528 48 528 -16
WIRE 528 48 400 48
WIRE 112 144 112 96
WIRE 352 144 352 96
WIRE 976 144 976 96
SYMBOL res 368 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 56k
SYMBOL cap 416 -224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 2n
SYMBOL cap 336 32 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 928 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 8k620
SYMBOL cap 960 32 R0
SYMATTR InstName C3
SYMATTR Value 10n
SYMBOL OpAmps\\opamp 672 -96 R0
SYMATTR InstName U2
SYMBOL OpAmps\\opamp 464 48 M180
SYMATTR InstName U1
SYMBOL voltage 112 0 R0
WINDOW 123 17 102 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL res 256 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 56k
FLAG 112 144 0
FLAG 352 144 0
FLAG 976 144 0
TEXT 112 216 Left 2 !.ac dec 1k 1 1MEG
TEXT 112 240 Left 2 !.lib opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\bf76be242d65_1078.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
R1 N002 N001 200K
R2 N001 IN 200K
V3 IN 0 SINE(0 1 100)
XU1 0 N001 +V 0 N003 LT1078 ;pnba In+)In-)V+)V-)OUT
D1 N003 N002 1N4148
XU2 N002 OUT +V 0 OUT LT1078 ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
* Absolute Value Circuit(Full-Wave Rectifier)
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1078.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 -80 96
WIRE 128 96 112 96
WIRE 224 96 128 96
WIRE 384 96 304 96
WIRE -80 112 -80 96
WIRE 528 128 432 128
WIRE -192 160 -192 144
WIRE 480 192 480 176
WIRE -80 208 -80 192
WIRE 192 208 192 192
WIRE 432 208 432 128
WIRE 448 208 432 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 528 224 528 128
WIRE 528 224 512 224
WIRE 576 224 528 224
WIRE 304 240 224 240
WIRE 384 240 384 96
WIRE 384 240 368 240
WIRE 448 240 384 240
WIRE 160 256 128 256
WIRE -192 272 -192 240
WIRE 480 272 480 256
WIRE 192 288 192 272
FLAG -192 272 0
FLAG 192 192 +V
FLAG -192 144 +V
FLAG -80 208 0
FLAG 192 288 0
FLAG 480 176 +V
FLAG 480 272 0
FLAG -80 96 IN
FLAG 576 224 OUT
FLAG 128 256 0
SYMBOL voltage -192 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 320 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 200K
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL voltage -80 96 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
SYMBOL opamps\\LT1078 192 176 R0
SYMATTR InstName U1
SYMBOL diode 304 256 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL opamps\\LT1078 480 160 R0
SYMATTR InstName U2
TEXT 400 344 Left 0 !.tran 30m
TEXT 272 40 Bottom 0 ;Absolute Value Circuit(Full-Wave Rectifier)