Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\3313a4bc7aba_SK_lowpass.asc
* Generated by LTspice 26.0.1 for Windows.
* Sallen-Key Lowpass Filter Without Gain
C3 N002 in 10n
R1 N001 N002 160k
C2 0 N003 1n
R2 N003 N001 160k
XOpA out N003 out opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
C1 out N001 1n
R3 N002 V_GND 1Meg
Vin in 0 SINE(0 1m 50) AC 1
Vgnd V_GND 0 1.5
.lib opamp.sub
.ac dec 10 1 100k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 -192 224 -192
WIRE 496 -192 320 -192
WIRE -32 -96 -64 -96
WIRE 48 -96 32 -96
WIRE 128 -96 48 -96
WIRE 224 -96 224 -192
WIRE 224 -96 208 -96
WIRE 240 -96 224 -96
WIRE 352 -96 320 -96
WIRE 416 -96 352 -96
WIRE 496 -80 496 -192
WIRE 496 -80 480 -80
WIRE 528 -80 496 -80
WIRE 48 -64 48 -96
WIRE 416 -64 400 -64
WIRE 352 -48 352 -96
WIRE 400 -32 400 -64
WIRE 496 -32 496 -80
WIRE 496 -32 400 -32
WIRE 48 32 48 16
WIRE 352 32 352 16
WIRE -96 448 -96 432
WIRE 144 448 144 432
WIRE -96 544 -96 528
WIRE 144 544 144 528
IOPIN -96 432 In
IOPIN 48 32 In
IOPIN -64 -96 In
IOPIN 528 -80 Out
IOPIN 144 432 Out
SYMBOL cap 32 -112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 10n
SYMBOL res 32 -80 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL OpAmps\\opamp 448 -16 M180
WINDOW 0 -31 112 Left 2
SYMATTR InstName OpA
SYMBOL voltage 144 432 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName Vgnd
SYMATTR Value 1.5
SYMBOL res 224 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 160k
SYMBOL voltage -96 432 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName Vin
SYMATTR Value SINE(0 1m 50)
SYMBOL res 336 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 160k
SYMBOL cap 368 16 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL cap 320 -208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
FLAG -96 544 0
FLAG -96 432 in
FLAG 48 32 V_GND
FLAG -64 -96 in
FLAG 528 -80 out
FLAG 144 544 0
FLAG 144 432 V_GND
FLAG 352 32 0
TEXT 336 400 Left 2 !.lib opamp.sub
TEXT 336 456 Left 2 !.ac dec 10 1 100k
TEXT -80 -264 Left 3 ;Sallen-Key Lowpass Filter Without Gain
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4234.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4234.asy)
R2 N003 IN 20K
R3 N004 0 20K
C1 N008 0 1
R5 OUT N005 20K
XU1 N007 IN N003 0 N008 N008 0 OUT TjFET N007 MP_01 MP_02 N001 N005 N003 N004 N006 NC_03 LTC4234 Rpcb=15 Tamb=25 ;pnba Sense)Vdd)UV)OV)Timer)IntVcc)GND)Out)Tj)Sense-)))Gate)PG)_FLT)FB)Imon)Iset
C2 OUT 0 680
R4 OUT N004 150K
V3 N002 0 PULSE(0 1 240m 1m 1m 10m)
V1 IN 0 12
R1 N006 0 20K
S1 0 OUT N002 0 SHORT
.model SHORT SW(Ron=10m Roff=1K Vt=.5 Vh=-.4)
.tran 1.4 startup
.lib LTC4234.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1800 680
WIRE -128 -352 -256 -352
WIRE -48 -352 -128 -352
WIRE 128 -352 128 -384
WIRE 480 -352 432 -352
WIRE 592 -352 480 -352
WIRE 688 -352 592 -352
WIRE 800 -352 688 -352
WIRE -256 -336 -256 -352
WIRE -128 -336 -128 -352
WIRE 480 -336 480 -352
WIRE 688 -336 688 -352
WIRE 800 -336 800 -352
WIRE 960 -320 848 -320
WIRE -48 -304 -48 -352
WIRE -16 -304 -48 -304
WIRE 432 -304 432 -352
WIRE 432 -304 272 -304
WIRE 592 -304 592 -352
WIRE 960 -304 960 -320
WIRE -256 -240 -256 -256
WIRE -128 -240 -128 -256
WIRE -16 -240 -128 -240
WIRE 480 -240 480 -256
WIRE 480 -240 272 -240
WIRE 688 -240 688 -272
WIRE 800 -240 800 -256
WIRE 480 -224 480 -240
WIRE 960 -208 960 -224
WIRE -16 -176 -32 -176
WIRE 432 -176 272 -176
WIRE 480 -128 480 -144
WIRE -128 -112 -128 -240
WIRE -16 -112 -128 -112
WIRE 288 -112 272 -112
WIRE 384 -112 368 -112
WIRE 432 -96 432 -176
WIRE 592 -96 592 -224
WIRE 592 -96 432 -96
WIRE -16 -48 -48 -48
WIRE 320 -48 272 -48
WIRE -48 16 -48 -48
WIRE -16 16 -48 16
WIRE 320 16 320 -48
WIRE 320 16 272 16
WIRE 320 80 272 80
WIRE 320 112 320 80
WIRE 336 208 272 208
SYMBOL res 464 -352 R0
SYMATTR InstName R4
SYMATTR Value 150K
SYMBOL res 576 -320 R0
SYMATTR InstName R5
SYMATTR Value 20K
SYMBOL sw 800 -240 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL cap 304 16 R0
WINDOW 0 28 11 Left 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 672 -336 R0
SYMATTR InstName C2
SYMATTR Value 680
SYMBOL voltage -256 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL voltage 960 -320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 240m 1m 1m 10m)
SYMBOL res -144 -240 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 20K
SYMBOL res 464 -240 R0
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL LTC4234 128 -144 R0
SYMATTR InstName U1
SYMBOL res 272 -96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 20K
FLAG 480 -128 0
FLAG 320 112 0
FLAG 384 -112 0
FLAG -256 -240 0
FLAG 688 -240 0
FLAG 800 -352 OUT
FLAG -256 -352 IN
FLAG 336 208 TjFET
FLAG 800 -240 0
FLAG 848 -272 0
FLAG 960 -208 0
FLAG -32 -176 0
TEXT 528 -64 Left 2 !.model SHORT SW(Ron=10m Roff=1K Vt=.5 Vh=-.4)
TEXT 536 208 Left 2 !.tran 1.4 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\16eebf081216_Assignment_Simple_Resistive_Voltage_Divider.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 10
R2 OUT 0 1k
R1 OUT IN 1k
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 16 128 -16 128
WIRE 64 128 16 128
WIRE 192 128 144 128
WIRE 224 128 192 128
WIRE 224 192 224 128
WIRE -16 208 -16 128
WIRE -16 368 -16 288
WIRE 224 368 224 272
WIRE 224 368 -16 368
WIRE -16 400 -16 368
SYMBOL res 160 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -16 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 208 176 R0
SYMATTR InstName R2
SYMATTR Value 1k
FLAG -16 400 0
FLAG 16 128 IN
FLAG 192 128 OUT
TEXT -48 424 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\6b904e1f4754_anbn.asc
* Generated by LTspice 26.0.1 for Windows.
RinB N001 N002 5k
V1 Vref 0 5
RinA N002 Vin 5k
XU1 N001 0 Vout opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
Ratten N002 0 2.5k
Rg N001 Vref 500k
Vin Vin 0 0
Rf Vout N001 10k
.dc Vin -1 1 0.01
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 800
WIRE 16 64 -160 64
WIRE 144 64 96 64
WIRE 176 64 144 64
WIRE 320 64 256 64
WIRE -128 160 -160 160
WIRE -16 160 -48 160
WIRE 16 160 -16 160
WIRE 144 160 144 64
WIRE 144 160 96 160
WIRE 176 160 144 160
WIRE 320 176 320 64
WIRE 320 176 240 176
WIRE 416 176 320 176
WIRE 176 192 144 192
WIRE -16 208 -16 160
WIRE -16 320 -16 288
WIRE 144 320 144 192
WIRE 64 544 64 512
WIRE 160 544 160 512
WIRE 64 656 64 624
WIRE 160 656 160 624
SYMBOL Opamps\\opamp 208 112 R0
SYMATTR InstName U1
SYMBOL res 272 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rf
SYMATTR Value 10k
SYMBOL res 112 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rg
SYMATTR Value 500k
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RinB
SYMATTR Value 5k
SYMBOL voltage 64 528 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -32 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RinA
SYMATTR Value 5k
SYMBOL res -32 192 R0
SYMATTR InstName Ratten
SYMATTR Value 2.5k
SYMBOL voltage 160 528 R0
SYMATTR InstName Vin
SYMATTR Value 0
FLAG 64 512 Vref
FLAG 64 656 0
FLAG 160 656 0
FLAG -160 64 Vref
FLAG 416 176 Vout
FLAG -16 320 0
FLAG -160 160 Vin
FLAG 160 512 Vin
FLAG 144 320 0
TEXT 32 784 Left 2 !.dc Vin -1 1 0.01
TEXT 32 752 Left 2 !.lib opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6402-20.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6402-20.asy)
XU1 N001 N003 N001 0 _OUT NC_01 NC_02 OUT 0 N001 0 0 N002 N002 N004 N004 LT6402-20 ;pnba VccC)VOCM)VccA)VeeA)+OUT)+OUTFILT)-OUTFILT)-OUT)VeeB)VccB)_EN)VeeC)-INB)-INA)+INB)+INA
V2 N003 0 2.2
V1 N001 0 5
V3 N002 N004 SINE(0 .1 10Meg)
.tran 1u
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1564 1892
WIRE 128 368 -256 368
WIRE 208 368 128 368
WIRE 288 368 208 368
WIRE -256 384 -256 368
WIRE 128 400 128 368
WIRE 208 400 208 368
WIRE 288 400 288 368
WIRE 368 400 368 352
WIRE -256 480 -256 464
WIRE 32 480 -176 480
WIRE 64 480 32 480
WIRE 448 496 416 496
WIRE 32 512 32 480
WIRE 64 512 32 512
WIRE -176 528 -176 480
WIRE 480 576 416 576
WIRE 592 576 560 576
WIRE 64 640 32 640
WIRE 448 656 416 656
WIRE -176 672 -176 608
WIRE 32 672 32 640
WIRE 32 672 -176 672
WIRE 64 672 32 672
WIRE 160 784 160 752
WIRE 240 784 240 752
WIRE 320 784 320 752
SYMBOL voltage -256 368 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -176 512 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 .1 10Meg)
SYMBOL LT6402-20 240 576 R0
SYMATTR InstName U1
SYMBOL voltage 464 576 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value 2.2
FLAG -256 480 0
FLAG 592 576 0
FLAG 448 656 OUT
FLAG 448 496 _OUT
FLAG 368 352 0
FLAG 160 784 0
FLAG 240 784 0
FLAG 320 784 0
TEXT 552 704 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2360-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2360-5.0.asy)
XU1 N001 N003 0 OUT N004 0 N002 IN 0 ADP2360-5.0 ;pnba EN)PG)Ith)FB)SS)PGND)SW)Vin)AGND
Rload OUT 0 100
L1 N002 OUT 100 Rpar=50k
C2 OUT 0 10 Rser=3m
C1 N004 0 1.8n
R1 IN N001 100K
V1 IN 0 12
R2 IN N003 22Meg
.tran 3m startup
.lib ADP2360-5.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE -144 -48 -256 -48
WIRE 0 -48 -144 -48
WIRE 224 -48 0 -48
WIRE -256 -32 -256 -48
WIRE 0 -32 0 -48
WIRE -144 16 -144 -48
WIRE 224 32 224 -48
WIRE -256 64 -256 48
WIRE 0 64 0 48
WIRE 96 64 0 64
WIRE 384 64 352 64
WIRE 512 64 464 64
WIRE 560 64 512 64
WIRE 704 64 560 64
WIRE 560 80 560 64
WIRE 704 80 704 64
WIRE -144 128 -144 96
WIRE 96 128 -144 128
WIRE 560 176 560 144
WIRE 704 176 704 160
WIRE 96 192 80 192
WIRE 512 192 512 64
WIRE 512 192 352 192
WIRE 16 256 0 256
WIRE 96 256 80 256
WIRE 176 320 176 304
WIRE 272 320 272 304
SYMBOL voltage -256 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ADP2360-5.0 224 160 R0
SYMATTR InstName U1
SYMBOL ind 368 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rpar=50k
SYMBOL cap 80 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1.8n
SYMBOL cap 544 80 R0
WINDOW 39 24 61 Left 2
WINDOW 3 45 33 Left 2
SYMATTR SpiceLine Rser=3m
SYMATTR Value 10
SYMATTR InstName C2
SYMBOL res -16 -48 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 688 64 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL res -160 0 R0
SYMATTR InstName R2
SYMATTR Value 22Meg
FLAG 0 256 0
FLAG -256 64 0
FLAG 176 320 0
FLAG 272 320 0
FLAG 560 176 0
FLAG 704 176 0
FLAG 704 64 OUT
FLAG 80 192 0
FLAG -256 -48 IN
TEXT 400 280 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4522-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4522-1.asy)
R2 OUT N001 10K
V2 -V 0 -15
Rload OUT 0 10K
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
V1 +V 0 15
XU1 IN N001 +V -V OUT ADA4522-1 ;pnba In+)In-)V+)V-)OUT
.tran 1m
.lib ADA4522-1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1152 144 -1168
WIRE 272 -1152 272 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 272 -1056 272 -1072
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL Opamps\\ADA4522-1 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 272 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 272 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 272 -1056 0
TEXT 720 -944 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\d269eb600f60_equalizer.asc
* Generated by LTspice 26.0.1 for Windows.
M2 BL PRE HV 0 NMOS l={mc(SA_eq_L_half,mc_variation)} w={mc(SA_eq_W_half,mc_variation)}
M1 BLB PRE BL 0 NMOS l={mc(SA_eq_L,mc_variation)} w={mc(SA_eq_W, mc_variation)}
M3 HV ePRE BLB 0 NMOS l={mc(SA_eq_L_half,mc_variation)} w={mc(SA_eq_W_half,mc_variation)}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 96 48 96
WIRE 400 96 288 96
WIRE -80 144 -112 144
WIRE 160 144 -80 144
WIRE 208 144 160 144
WIRE 160 160 160 144
WIRE 336 160 336 144
WIRE 48 208 48 96
WIRE 80 208 48 208
WIRE 208 208 176 208
WIRE 256 208 208 208
WIRE 400 208 400 96
WIRE 400 208 352 208
WIRE 208 224 208 208
IOPIN -80 144 BiDir
IOPIN 48 96 BiDir
IOPIN 400 96 BiDir
IOPIN 208 224 BiDir
IOPIN 336 144 BiDir
SYMBOL nmos4 288 144 M270
WINDOW 0 104 24 Invisible 2
WINDOW 3 179 41 Invisible 2
SYMATTR InstName M1
SYMATTR Value2 l={mc(SA_eq_L,mc_variation)} w={mc(SA_eq_W, mc_variation)}
SYMBOL nmos4 256 160 M90
WINDOW 0 104 24 Invisible 2
WINDOW 3 179 41 Invisible 2
SYMATTR InstName M3
SYMATTR Value2 l={mc(SA_eq_L_half,mc_variation)} w={mc(SA_eq_W_half,mc_variation)}
SYMBOL nmos4 80 160 M90
WINDOW 0 104 24 Invisible 2
WINDOW 3 179 41 Invisible 2
SYMATTR InstName M2
SYMATTR Value2 l={mc(SA_eq_L_half,mc_variation)} w={mc(SA_eq_W_half,mc_variation)}
FLAG 240 96 0
FLAG 128 208 0
FLAG 304 208 0
FLAG -80 144 PRE
FLAG 48 96 BL
FLAG 400 96 BLB
FLAG 208 224 HV
FLAG 336 144 ePRE
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX14774.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 VL 0 3.3
V3 vA 0 10
V4 vEN 0 PULSE(0 3.3 10n 20n 20n 5m 10m)
R1 vB 0 10k
C1 vB 0 15p
XU1 vEN vB vA VL vVP vVN +V 0 MAX14774 ;pnba IN)D)S)VL)VP)VN)Vdd)GND
C2 vVP 0 10n
C3 vVN 0 10n
.tran 30m
* Note:\nSwitch shown for a logic 0 input\nOnly one channel included\nCharge Injection not included
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\MAX14774.asy)
.lib MAX14774.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 80 176 48
WIRE 272 80 272 48
WIRE -208 144 -208 128
WIRE -48 160 -80 160
WIRE 96 160 32 160
WIRE 128 160 96 160
WIRE 352 160 320 160
WIRE 528 160 352 160
WIRE 624 160 528 160
WIRE 528 192 528 160
WIRE 352 208 320 208
WIRE 448 208 352 208
WIRE 624 208 624 160
WIRE 96 224 -16 224
WIRE 128 224 96 224
WIRE 448 224 448 208
WIRE -208 240 -208 224
WIRE 352 240 320 240
WIRE 368 240 352 240
WIRE 368 256 368 240
WIRE 528 288 528 272
WIRE 624 288 624 272
WIRE 448 304 448 288
WIRE -208 336 -208 320
WIRE -16 336 -16 224
WIRE 368 336 368 320
WIRE 224 368 224 352
WIRE -208 432 -208 416
WIRE -16 464 -16 416
FLAG -208 432 0
FLAG -208 240 0
FLAG -208 128 +V
FLAG -208 320 VL
FLAG -80 160 0
FLAG -16 464 0
FLAG 528 288 0
FLAG 624 288 0
FLAG 272 48 +V
FLAG 176 48 VL
FLAG 224 368 0
FLAG 96 160 vA
FLAG 96 224 vEN
FLAG 352 160 vB
FLAG 448 304 0
FLAG 368 336 0
FLAG 352 208 vVP
FLAG 352 240 vVN
SYMBOL voltage -208 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -208 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL voltage 48 160 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL voltage -16 320 R0
WINDOW 3 19 116 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3.3 10n 20n 20n 5m 10m)
SYMATTR InstName V4
SYMBOL res 512 176 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL cap 608 208 R0
SYMATTR InstName C1
SYMATTR Value 15p
SYMBOL MAX14774 224 208 R0
SYMATTR InstName U1
SYMBOL cap 432 224 R0
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL cap 352 256 R0
SYMATTR InstName C3
SYMATTR Value 10n
TEXT -32 512 Left 2 !.tran 30m
TEXT -256 -88 Left 2 ;Note:\nSwitch shown for a logic 0 input\nOnly one channel included\nCharge Injection not included
* Z:\home\khalils\Downloads\files\data\raw_asc\05ce86fc688f_circuit1.asc
* Generated by LTspice 26.0.1 for Windows.
VCC CC 0 10V
R2 B 0 10k
RE E 0 1k
Q1 C B E 0 2N2222
R1 CC B 90k
RC CC C 10k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 -96 32 -96
WIRE 304 -96 256 -96
WIRE 416 -96 304 -96
WIRE 32 -48 32 -96
WIRE 256 -48 256 -96
WIRE 256 64 256 32
WIRE 256 128 256 64
WIRE 416 144 416 -96
WIRE 32 176 32 32
WIRE 192 176 32 176
WIRE 256 288 256 224
WIRE 32 304 32 176
WIRE 256 304 256 288
WIRE 32 432 32 384
WIRE 256 432 256 384
WIRE 256 432 32 432
WIRE 416 432 416 224
WIRE 416 432 256 432
WIRE 256 480 256 432
SYMBOL npn 192 128 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL voltage 416 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VCC
SYMATTR Value 10V
SYMBOL Misc\\EuropeanResistor 240 -64 R0
SYMATTR InstName RC
SYMATTR Value 10k
SYMBOL Misc\\EuropeanResistor 240 288 R0
SYMATTR InstName RE
SYMATTR Value 1k
SYMBOL Misc\\EuropeanResistor 16 -64 R0
SYMATTR InstName R1
SYMATTR Value 90k
SYMBOL Misc\\EuropeanResistor 16 288 R0
SYMATTR InstName R2
SYMATTR Value 10k
FLAG 256 480 0
FLAG 32 176 B
FLAG 256 288 E
FLAG 256 64 C
FLAG 304 -96 CC
TEXT 40 488 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\225851c96a60_ac_math1.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot functions for power in dBm\n \nCartesian plot\n.func dBm(x,R) 10*log10(mag(x)**2/R/1e-3)\n \nBode plot\n.func dBm_(x,R) sqrt(mag(x)**2/R/1e-3)
R1 N001 N002 1k
C1 N002 0 1n
G1 0 out N002 0 0.02
R2 out 0 50
V1 N001 0 AC 1
.ac dec 100 10 10meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 160 0 160
WIRE 288 160 208 160
WIRE 432 160 288 160
WIRE 560 160 480 160
WIRE 640 160 560 160
WIRE 0 208 0 160
WIRE 480 208 480 160
WIRE 640 208 640 160
WIRE 288 224 288 160
WIRE 432 224 432 160
WIRE 0 336 0 288
WIRE 288 336 288 288
WIRE 432 336 432 272
WIRE 480 336 480 288
WIRE 640 336 640 288
SYMBOL res 624 192 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL cap 272 224 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL g 480 192 R0
SYMATTR InstName G1
SYMATTR Value 0.02
SYMBOL res 112 176 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 0 192 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
FLAG 0 336 0
FLAG 288 336 0
FLAG 432 336 0
FLAG 480 336 0
FLAG 640 336 0
FLAG 560 160 out
TEXT -40 80 Left 0 !.ac dec 100 10 10meg
TEXT -48 -176 Left 0 ;Plot functions for power in dBm\n \nCartesian plot\n.func dBm(x,R) 10*log10(mag(x)**2/R/1e-3)\n \nBode plot\n.func dBm_(x,R) sqrt(mag(x)**2/R/1e-3)
* Z:\home\khalils\Downloads\files\data\raw_asc\0951eaa64682_reverse_polarity_protection.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N003 0 4.7n
V1 N001 0 PULSE(-36 36 1 100n 100n 1 2)
R2 N002 0 12
M1 N001 N003 N002 N002 FDS6975
R1 N003 0 100k
D1 N003 N002 1N750
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 {2+1u} {2-1u}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 80 -112 80
WIRE 272 80 176 80
WIRE 512 80 272 80
WIRE 272 144 272 80
WIRE -112 176 -112 80
WIRE 512 208 512 80
WIRE 160 256 160 128
WIRE 272 256 272 208
WIRE 272 256 160 256
WIRE 352 256 272 256
WIRE 160 304 160 256
WIRE 352 304 352 256
WIRE -112 416 -112 256
WIRE 160 416 160 384
WIRE 352 416 352 368
WIRE 512 416 512 288
SYMBOL zener 288 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N750
SYMBOL pmos 80 128 R270
SYMATTR InstName M1
SYMATTR Value FDS6975
SYMBOL res 144 288 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res 496 192 R0
SYMATTR InstName R2
SYMATTR Value 12
SYMBOL voltage -112 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -368 103 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(-36 36 1 100n 100n 1 2)
SYMBOL cap 336 304 R0
SYMATTR InstName C2
SYMATTR Value 4.7n
FLAG 160 416 0
FLAG -112 416 0
FLAG 512 416 0
FLAG 352 416 0
TEXT -144 440 Left 2 !.tran 0 {2+1u} {2-1u}
* Z:\home\khalils\Downloads\files\data\raw_asc\14f9c003e5b2_Q1b.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N003 0 2
R3 Vout N004 1k
V3 N002 0 SINE(0 10 500)
R4 Vout P002 1k
D_ideal1 N002 P002 D_ideal D
V1 N001 0 SINE(0 10 500)
D_ideal N001 P001 D_ideal D
R1 Vout N003 1k
V4 0 N004 2
R2 Vout P001 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model D_ideal D(Ron=0.1n Roff=1G Vfwd=0)
.tran .02
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 680
WIRE 80 80 32 80
WIRE 320 80 224 80
WIRE 416 80 320 80
WIRE 736 80 688 80
WIRE 976 80 880 80
WIRE 1072 80 976 80
WIRE 320 96 320 80
WIRE 976 96 976 80
WIRE 32 208 32 80
WIRE 320 208 320 176
WIRE 688 208 688 80
WIRE 976 208 976 176
WIRE 32 352 32 288
WIRE 320 352 320 288
WIRE 688 352 688 288
WIRE 976 352 976 288
IOPIN 416 80 Out
IOPIN 1072 80 Out
SYMBOL voltage 688 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 10 500)
SYMBOL voltage 32 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 500)
SYMBOL res 896 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL voltage 976 304 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 2
SYMBOL res 304 80 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 736 96 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D_ideal1
SYMATTR SpiceModel D_ideal
SYMBOL res 960 80 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL diode 80 96 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D_ideal
SYMATTR SpiceModel D_ideal
SYMBOL voltage 320 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 2
SYMBOL res 240 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 32 352 0
FLAG 320 352 0
FLAG 416 80 Vout
FLAG 688 352 0
FLAG 976 352 0
FLAG 1072 80 Vout
TEXT 32 408 Left 2 !.model D_ideal D(Ron=0.1n Roff=1G Vfwd=0)
TEXT -2 428 Left 2 !.tran .02