* Z:\home\khalils\Downloads\files\data\raw_asc\fadf530dd290_res.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1497.asy)
R3 N003 ref 1
R7 in_ac in 1000
R4 ref 0 1
R6 N001 N002 100
V1 in 0 SINE(1.65 1.65 2000) Rser=1
V3 N003 0 3 Rser=0
XU1 ref in_ac N003 0 in_ac2 LT1497 ;pnba In+)In-)V+)V-)OUT
C1 in_ac in_ac2 100n
XU2 in_ac2 N002 N003 0 N001 LT1497 ;pnba In+)In-)V+)V-)OUT
R1 in_ac in_ac2 680
K1 L1 L2 0.98
L1 N001 ref 7m Rser=30
L2 NC_01 0 7m
R2 N003 in_ac 1000
R5 N002 ref 500
.tran 0 15mS
.lib LT1497.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1220 680
WIRE 992 -112 688 -112
WIRE 688 -96 688 -112
WIRE 688 -96 592 -96
WIRE 400 0 304 0
WIRE 496 0 400 0
WIRE 592 0 592 -16
WIRE 672 0 592 0
WIRE 592 16 592 0
WIRE 496 80 496 64
WIRE 496 80 400 80
WIRE 592 96 544 96
WIRE 672 112 672 0
WIRE 672 112 576 112
WIRE 624 128 384 128
WIRE 896 128 624 128
WIRE 384 144 384 128
WIRE 384 144 128 144
WIRE 896 208 896 128
WIRE 896 208 768 208
WIRE 176 224 128 224
WIRE 224 224 176 224
WIRE 384 224 384 144
WIRE 624 224 624 128
WIRE 224 240 224 224
WIRE 304 240 304 0
WIRE 304 240 224 240
WIRE 352 240 304 240
WIRE 576 240 576 112
WIRE 592 240 576 240
WIRE 496 256 496 80
WIRE 496 256 416 256
WIRE 576 256 496 256
WIRE 688 256 688 -96
WIRE 688 256 656 256
WIRE 352 272 304 272
WIRE 576 272 576 256
WIRE 592 272 576 272
WIRE 896 272 896 208
WIRE 224 288 224 240
WIRE 32 320 -96 320
WIRE 128 320 128 304
WIRE 128 320 32 320
WIRE 544 320 544 96
WIRE 768 320 768 288
WIRE 768 320 720 320
WIRE 848 320 768 320
WIRE -96 336 -96 320
WIRE 304 336 304 272
WIRE 336 336 304 336
WIRE 544 336 544 320
WIRE 544 336 336 336
WIRE 720 336 720 320
WIRE 720 336 544 336
WIRE 768 336 768 320
WIRE -96 352 -96 336
WIRE 336 368 336 336
WIRE 336 368 224 368
WIRE 896 416 896 352
WIRE 896 416 768 416
WIRE -96 448 -96 416
WIRE 384 448 384 288
WIRE 384 448 -96 448
WIRE 624 448 624 288
WIRE 624 448 384 448
WIRE 768 448 768 416
WIRE 768 448 624 448
WIRE 848 448 848 320
WIRE 992 448 992 -32
WIRE 992 448 848 448
WIRE -96 464 -96 448
WIRE 624 512 624 448
WIRE 1104 512 1104 -32
WIRE 1104 512 624 512
SYMBOL res 576 0 R0
SYMATTR InstName R5
SYMATTR Value 500
SYMBOL ind2 1088 -128 R0
SYMATTR InstName L2
SYMATTR Value 7m
SYMBOL voltage 896 256 R0
SYMATTR InstName V3
SYMATTR Value 3
SYMATTR SpiceLine Rser=0
SYMBOL Opamps/LT1497 624 192 R0
SYMATTR InstName U2
SYMBOL res 752 192 R0
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL cap 480 0 R0
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL ind2 976 -128 R0
SYMATTR InstName L1
SYMATTR Value 7m
SYMATTR Type ind
SYMATTR SpiceLine Rser=30
SYMBOL res 576 -112 R0
SYMATTR InstName R6
SYMATTR Value 100
SYMBOL res 112 128 R0
SYMATTR InstName R2
SYMATTR Value 1000
SYMBOL res 752 320 R0
SYMATTR InstName R4
SYMATTR Value 1
SYMBOL res 384 -16 R0
SYMATTR InstName R1
SYMATTR Value 680
SYMBOL voltage -96 320 R0
SYMATTR InstName V1
SYMATTR Value SINE(1.65 1.65 2000)
SYMATTR SpiceLine Rser=1
SYMBOL Opamps/LT1497 384 192 R0
SYMATTR InstName U1
SYMBOL res 112 208 R0
SYMATTR InstName R7
SYMATTR Value 1000
FLAG -96 464 0
FLAG 32 320 in
FLAG 960 -128 res
FLAG 176 224 in_ac
FLAG 496 256 in_ac2
FLAG 544 320 ref
TEXT 528 -232 Left 2 !.tran 0 15mS
TEXT 808 -232 Left 2 !K1 L1 L2 0.98