Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\a447aef50fcf_Wein_Bridge_Oscillator.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
V1 V+ 0 15
XU1 N003 N001 V+ V- out LT1001 ;pnba In+)In-)V+)V-)OUT
V2 0 V- 15
D2 N001 N002 1N4148
C2 out N004 10n
D1 N002 N001 1N4148
R2 0 N003 80k
R4 N001 0 2.7K
R5 N002 N001 1K
R3 out N002 4.7k
C1 N003 0 10n
R1 N004 N003 80k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran .2 startup
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 -192 -112 -192
WIRE 80 -192 16 -192
WIRE -112 -64 -112 -192
WIRE -48 -64 -112 -64
WIRE 80 -64 80 -192
WIRE 80 -64 16 -64
WIRE -336 16 -432 16
WIRE -208 16 -256 16
WIRE -112 16 -112 -64
WIRE -112 16 -208 16
WIRE -48 16 -112 16
WIRE 80 16 80 -64
WIRE 80 16 16 16
WIRE 128 16 80 16
WIRE 320 16 208 16
WIRE 576 16 576 -64
WIRE -432 96 -432 16
WIRE 240 112 240 64
WIRE -208 128 -208 16
WIRE 208 128 -208 128
WIRE 576 128 576 96
WIRE 704 128 576 128
WIRE 320 144 320 16
WIRE 320 144 272 144
WIRE 384 144 320 144
WIRE 208 160 48 160
WIRE 576 160 576 128
WIRE 704 176 704 128
WIRE 240 224 240 176
WIRE 576 320 576 240
WIRE 48 336 48 160
WIRE 128 336 48 336
WIRE 240 336 208 336
WIRE 320 336 320 144
WIRE 320 336 304 336
WIRE 48 368 48 336
WIRE 48 368 0 368
WIRE 80 368 48 368
WIRE 0 480 0 448
WIRE 48 480 0 480
WIRE 80 480 80 432
WIRE 80 480 48 480
WIRE 48 528 48 480
SYMBOL cap 304 320 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL Opamps\\LT1001 240 80 R0
SYMATTR InstName U1
SYMBOL diode 16 0 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 224 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 4.7k
SYMBOL cap 64 368 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL voltage 576 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage 576 0 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL diode -48 -48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL res 32 -208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1K
SYMBOL res 224 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 80k
SYMBOL res 16 464 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 80k
SYMBOL res -240 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2.7K
FLAG 704 176 0
FLAG 48 528 0
FLAG 576 -64 V+
FLAG 240 64 V+
FLAG 576 320 V-
FLAG 240 224 V-
FLAG 384 144 out
FLAG -432 96 0
TEXT -408 536 Left 2 !.tran .2 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\e62a1ce64134_ej2.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N002 0 0.5051
L3 N001 Vo 0.3666 Rser=0
V1 Vi 0 AC 1
L4 Vo N003 1.8333 Rser=0
C4 N003 0 0.2727
L1 Vi N001 0.8 Rser=0
L2 N001 N002 0.22 Rser=0
.ac dec 1000 10m 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 128 16 128
WIRE 272 128 192 128
WIRE 368 128 272 128
WIRE 528 128 448 128
WIRE 272 160 272 128
WIRE 528 160 528 128
WIRE 16 208 16 128
WIRE 272 272 272 240
WIRE 528 272 528 240
WIRE 16 368 16 288
WIRE 272 368 272 336
WIRE 272 368 16 368
WIRE 528 368 528 336
WIRE 528 368 272 368
WIRE 16 384 16 368
SYMBOL cap 512 272 R0
SYMATTR InstName C4
SYMATTR Value 0.2727
SYMBOL ind 512 144 R0
SYMATTR InstName L4
SYMATTR Value 1.8333
SYMATTR SpiceLine Rser=0
SYMBOL cap 256 272 R0
SYMATTR InstName C2
SYMATTR Value 0.5051
SYMBOL ind 352 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L3
SYMATTR Value 0.3666
SYMATTR SpiceLine Rser=0
SYMBOL voltage 16 192 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL ind 256 144 R0
SYMATTR InstName L2
SYMATTR Value 0.22
SYMATTR SpiceLine Rser=0
SYMBOL ind 96 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 0.8
SYMATTR SpiceLine Rser=0
FLAG 16 384 0
FLAG 16 128 Vi
FLAG 528 128 Vo
TEXT -256 344 Left 2 !.ac dec 1000 10m 10
* Z:\home\khalils\Downloads\files\data\raw_asc\3d35f477d416_NOT1.asc
* Generated by LTspice 26.0.1 for Windows.
M2 Y A 0 0 NMOS
M1 Vdd A Y Vdd PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 16 224 -16
WIRE 288 16 224 16
WIRE 224 32 224 16
WIRE 288 80 288 16
WIRE 288 80 224 80
WIRE 176 112 128 112
WIRE 128 192 128 112
WIRE 128 192 64 192
WIRE 224 192 224 128
WIRE 368 192 224 192
WIRE 224 208 224 192
WIRE 304 256 224 256
WIRE 128 288 128 192
WIRE 176 288 128 288
WIRE 304 304 304 256
WIRE 304 304 224 304
WIRE 224 336 224 304
SYMBOL nmos4 176 208 R0
SYMATTR InstName M2
SYMBOL pmos4 176 32 R0
SYMATTR InstName M1
FLAG 224 336 0
FLAG 224 -16 Vdd
FLAG 64 192 A
FLAG 368 192 Y
* Z:\tmp\asc_dec_bjh7r6w2\041d3da1b40d_Norton_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N003 0 10
V1 N001 0 10
V3 N010 N009 5
R2 N001 N004 20
Rn 0 N002 18
R2B N008 N010 20
R2A N005 N007 20
R4A N007 0 30
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 904
WIRE 96 -160 -48 -160
WIRE 240 -160 96 -160
WIRE 96 -144 96 -160
WIRE 240 -144 240 -160
WIRE 464 -128 384 -128
WIRE 528 -128 464 -128
WIRE -48 -80 -48 -160
WIRE 464 -80 464 -128
WIRE 528 -80 528 -128
WIRE 384 -64 384 -128
WIRE 96 -48 96 -64
WIRE 128 -48 96 -48
WIRE 240 -48 240 -64
WIRE 240 -48 208 -48
WIRE 96 -32 96 -48
WIRE 240 -32 240 -48
WIRE -48 64 -48 0
WIRE 96 64 96 48
WIRE 176 64 96 64
WIRE 240 64 240 48
WIRE 240 64 176 64
WIRE 384 64 384 16
WIRE 464 64 464 0
WIRE 528 64 528 0
WIRE 176 80 176 64
WIRE 96 128 -48 128
WIRE 240 128 96 128
WIRE 96 144 96 128
WIRE 240 144 240 128
WIRE -48 208 -48 128
WIRE 96 240 96 224
WIRE 128 240 96 240
WIRE 240 240 240 224
WIRE 240 240 208 240
WIRE 96 256 96 240
WIRE 240 256 240 240
WIRE 96 352 96 336
WIRE 176 352 96 352
WIRE 240 352 240 336
WIRE 240 352 176 352
WIRE 176 368 176 352
WIRE 96 416 -48 416
WIRE 240 416 96 416
WIRE 96 432 96 416
WIRE 240 432 240 416
WIRE 96 528 96 512
WIRE 128 528 96 528
WIRE 240 528 240 512
WIRE 240 528 208 528
WIRE 96 544 96 528
WIRE 240 544 240 528
WIRE 96 640 96 624
WIRE 176 640 96 640
WIRE 240 640 240 624
WIRE 240 640 176 640
WIRE 176 656 176 640
SYMBOL res 80 -48 R0
WINDOW 0 -33 58 Left 0
WINDOW 3 25 96 Left 0
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL Misc\\battery -48 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL Misc\\battery 224 528 R90
WINDOW 0 -32 56 VBottom 0
WINDOW 3 32 56 VTop 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 224 -160 R0
WINDOW 0 35 56 Left 0
WINDOW 3 -19 24 Left 0
SYMATTR InstName R2
SYMATTR Value 20
SYMBOL res 480 16 R180
WINDOW 0 23 88 Left 0
WINDOW 3 -15 13 Left 0
SYMATTR InstName Rn
SYMATTR Value 18
SYMBOL res 224 416 R0
WINDOW 0 40 61 Left 0
WINDOW 3 -19 24 Left 0
SYMATTR InstName R2B
SYMATTR Value 20
SYMBOL res 224 128 R0
WINDOW 0 35 56 Left 0
WINDOW 3 -19 24 Left 0
SYMATTR InstName R2A
SYMATTR Value 20
SYMBOL res 224 240 R0
WINDOW 0 41 59 Left 0
WINDOW 3 -26 94 Left 0
SYMATTR InstName R4A
SYMATTR Value 30
FLAG -48 64 0
FLAG 176 80 0
FLAG 176 368 0
FLAG 176 656 0
FLAG 384 64 0
FLAG 528 64 0
FLAG 464 64 0
* Z:\home\khalils\Downloads\files\data\raw_asc\5865a9fca519_3.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Name: Sricharan Vinoth Kumar\nRoll No: 2024112022
V_BS N001 0 {vb}
V_DS D 0 1.8
V_GS G 0 0
M1 D G 0 N001 CMOSN l=l w=w ad=2.5*l*w as=2.5*l*w pd=5*l+2*w ps=5*l+2*w
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include "TSMC_180nm.txt"
.param l=0.18u w=1.8u
.dc V_GS 0 1.8 .01
.param vb = 0
.step param vb list 0 0.9 -0.9
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 400 -64 208 -64
WIRE 400 -32 400 -64
WIRE 400 80 400 48
WIRE 208 96 208 -64
WIRE 208 112 208 96
WIRE 400 144 208 144
WIRE 144 176 0 176
WIRE 160 176 144 176
WIRE 0 192 0 176
WIRE 400 192 400 144
WIRE 208 208 208 192
WIRE 0 288 0 272
WIRE 208 288 208 208
WIRE 208 288 0 288
WIRE 208 304 208 288
WIRE 400 304 400 272
SYMBOL voltage 0 176 R0
SYMATTR InstName V_GS
SYMATTR Value 0
SYMBOL nmos4 160 96 R0
SYMATTR InstName M1
SYMATTR Value CMOSN
SYMATTR Value2 l=l w=w ad=2.5*l*w as=2.5*l*w pd=5*l+2*w ps=5*l+2*w
SYMBOL voltage 400 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V_DS
SYMATTR Value 1.8
SYMBOL voltage 400 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V_BS
SYMATTR Value {vb}
FLAG 400 304 0
FLAG 208 304 0
FLAG 400 80 0
FLAG 208 96 D
FLAG 208 208 S
FLAG 144 176 G
TEXT 360 368 Left 2 !.include "TSMC_180nm.txt"
TEXT 360 400 Left 2 !.param l=0.18u w=1.8u
TEXT -112 368 Left 2 !.dc V_GS 0 1.8 .01
TEXT -128 -136 Left 2 ;Name: Sricharan Vinoth Kumar\nRoll No: 2024112022
TEXT -112 400 Left 2 !.param vb = 0
TEXT -112 432 Left 2 !.step param vb list 0 0.9 -0.9
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4221-2A.asc
* Generated by LTspice 26.0.1 for Windows.
C4 Gate_A 0 2.2n
C5 Gate_B 0 2.2n
R2 Gate_A N001 5.11
R3 Gate_B N006 5.11
V1 VIA 0 PULSE(0 5 0 2n 2n 5u 10u)
V4 N005 0 0
V3 N003 0 5
V6 N004 0 15
V5 N002 0 15
V2 VIB 0 PULSE(5 0 0 2n 2n 5u 10u)
XU1 VIA VIB N003 0 N005 0 N006 N004 0 N001 N002 ADuM4221-2A ;pnba VIA)VIB)VDD1)GND1)DISABLE)GNDB)VOB)VDDB)GNDA)VOA)VDDA
.tran 50u
* GND1 is modeled as common GND
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4221-2A.asy)
.lib ADuM4221-2A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 3080 680
WIRE -1808 -448 -2288 -448
WIRE -1728 -448 -1808 -448
WIRE -1120 -448 -1424 -448
WIRE -992 -448 -1040 -448
WIRE -864 -448 -992 -448
WIRE -816 -448 -864 -448
WIRE -2288 -416 -2288 -448
WIRE -992 -416 -992 -448
WIRE -1808 -384 -2192 -384
WIRE -1728 -384 -1808 -384
WIRE -1232 -384 -1424 -384
WIRE -1232 -368 -1232 -384
WIRE -2192 -352 -2192 -384
WIRE -992 -336 -992 -352
WIRE -1728 -320 -2064 -320
WIRE -1392 -320 -1424 -320
WIRE -1728 -240 -1760 -240
WIRE -1232 -240 -1424 -240
WIRE -2064 -224 -2064 -320
WIRE -1232 -224 -1232 -240
WIRE -1728 -176 -1984 -176
WIRE -1392 -176 -1424 -176
WIRE -1984 -128 -1984 -176
WIRE -1120 -112 -1424 -112
WIRE -992 -112 -1040 -112
WIRE -864 -112 -992 -112
WIRE -816 -112 -864 -112
WIRE -992 -80 -992 -112
WIRE -2288 16 -2288 -336
WIRE -2192 16 -2192 -272
WIRE -2064 16 -2064 -144
WIRE -1984 16 -1984 -48
WIRE -992 16 -992 -16
FLAG -1984 16 0
FLAG -1392 -176 0
FLAG -1232 -144 0
FLAG -864 -112 Gate_B
FLAG -864 -448 Gate_A
FLAG -992 16 0
FLAG -2288 16 0
FLAG -2064 16 0
FLAG -992 -336 0
FLAG -1808 -448 VIA
FLAG -1392 -320 0
FLAG -1760 -240 0
FLAG -1232 -288 0
FLAG -2192 16 0
FLAG -1808 -384 VIB
SYMBOL cap -1008 -416 R0
SYMATTR InstName C4
SYMATTR Value 2.2n
SYMBOL cap -1008 -80 R0
SYMATTR InstName C5
SYMATTR Value 2.2n
SYMBOL res -1024 -464 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5.11
SYMBOL res -1024 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5.11
SYMBOL voltage -2288 -432 R0
WINDOW 0 26 98 Left 2
WINDOW 3 33 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 2n 2n 5u 10u)
SYMBOL voltage -1984 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 0
SYMBOL voltage -2064 -240 R0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -1232 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 34 Left 2
WINDOW 3 45 64 Left 2
SYMATTR InstName V6
SYMATTR Value 15
SYMBOL voltage -1232 -384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 43 29 Left 2
WINDOW 3 46 61 Left 2
SYMATTR InstName V5
SYMATTR Value 15
SYMBOL voltage -2192 -368 R0
WINDOW 0 26 98 Left 2
WINDOW 3 33 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(5 0 0 2n 2n 5u 10u)
SYMBOL ADuM4221-2A -1568 -352 R0
SYMATTR InstName U1
TEXT -1728 -8 Left 2 !.tran 50u
TEXT -1728 -32 Left 1 ;GND1 is modeled as common GND
* Z:\tmp\asc_dec_bjh7r6w2\134cdb9dcb0d_1151_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V3 IN- N004 SINE(0 1m 100)
R2 N001 0 1Meg
V4 -V 0 -15
V1 +V 0 15
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 160 96 128 96
WIRE 272 96 240 96
WIRE -192 112 -192 96
WIRE -96 112 -96 96
WIRE -192 208 -192 192
WIRE -96 208 -96 192
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 272 240 272 96
WIRE 272 240 224 240
WIRE 304 240 272 240
WIRE 112 256 -16 256
WIRE 160 256 112 256
WIRE -16 272 -16 256
WIRE 192 288 192 272
WIRE -16 384 -16 352
WIRE 352 384 -16 384
WIRE -16 400 -16 384
SYMBOL voltage -16 256 R0
WINDOW 0 24 24 Left 2
WINDOW 3 24 94 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1m 100)
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL voltage -96 96 R0
SYMATTR InstName V4
SYMATTR Value -15
SYMBOL voltage -192 96 R0
SYMATTR InstName V1
SYMATTR Value 15
FLAG -192 208 0
FLAG 192 192 +V
FLAG -192 96 +V
FLAG 16 96 0
FLAG 112 256 IN-
FLAG -96 208 0
FLAG -96 96 -V
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG719.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG719.asy)
R1 D 0 301
V3 +V 0 5
C1 D 0 36p
V1 IN 0 PULSE(0 3 25u 1n 1n 20u)
V2 S2 0 3
XU2 IN 0 D S2 +V 0 ADG719 ;pnba IN)S1)D)S2)Vdd)GND
.tran 75u
.lib ADG719.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 0 -48 -48
WIRE -192 64 -400 64
WIRE -144 64 -192 64
WIRE -512 96 -512 48
WIRE -400 96 -400 64
WIRE 128 96 48 96
WIRE 256 96 128 96
WIRE -144 128 -288 128
WIRE 128 128 128 96
WIRE 256 128 256 96
WIRE -288 160 -288 128
WIRE -512 192 -512 176
WIRE -400 192 -400 176
WIRE -192 192 -288 192
WIRE -144 192 -192 192
WIRE 128 240 128 208
WIRE 256 240 256 192
WIRE -288 304 -288 192
WIRE -48 336 -48 304
WIRE -288 448 -288 384
SYMBOL voltage -512 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 112 112 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL ADG719 -48 144 R0
SYMATTR InstName U2
SYMBOL cap 240 128 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -288 288 R0
WINDOW 3 24 102 Left 2
SYMATTR Value PULSE(0 3 25u 1n 1n 20u)
SYMATTR InstName V1
SYMBOL voltage -400 80 R0
SYMATTR InstName V2
SYMATTR Value 3
FLAG 128 240 0
FLAG 256 240 0
FLAG -48 336 0
FLAG -288 448 0
FLAG -288 160 0
FLAG -400 192 0
FLAG -48 -48 +V
FLAG -512 192 0
FLAG -512 48 +V
FLAG 128 96 D
FLAG -192 64 S2
FLAG -192 192 IN
TEXT 136 328 Left 2 !.tran 75u
* Z:\tmp\asc_dec_bjh7r6w2\131dd3075d1d_MotorDrive_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 V_BAT N002 8.4 Rser=50
V2 5V N002 5 Rser=50
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 32 -80 32
WIRE 384 32 256 32
WIRE 0 48 0 32
WIRE 256 48 256 32
WIRE -48 112 -256 112
WIRE 384 128 384 32
WIRE -48 160 -48 112
WIRE 0 160 0 128
WIRE 0 160 -48 160
WIRE 96 160 0 160
WIRE 256 160 256 128
WIRE 256 160 160 160
WIRE -80 176 -80 32
WIRE 256 192 256 160
WIRE -80 304 -80 256
WIRE 256 304 256 272
WIRE 256 304 -80 304
WIRE 384 304 384 208
WIRE 384 304 256 304
WIRE 256 320 256 304
SYMBOL voltage -80 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V1
SYMATTR Value 8.4
SYMBOL voltage 384 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName V2
SYMATTR Value 5
FLAG -256 112 out
FLAG -80 32 V_BAT
FLAG 384 32 5V
* Z:\home\khalils\Downloads\files\data\raw_asc\1996ad7a2b18_Prob_4b3.asc
* Generated by LTspice 26.0.1 for Windows.
* Short Channel
* l=0.18u w= 0.27u
;dc V1 0 1 1m
V1 0 Vgs 1
V2 0 Vds 1.8V
M1 Vds Vgs 0 0 pch_tt l=0.18u w= 0.27u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.dc V2 0 1.8 0.01 V1 0 1 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 80 384 80
WIRE 384 96 384 80
WIRE 384 96 240 96
WIRE 240 112 240 96
WIRE 384 112 384 96
WIRE 64 192 32 192
WIRE 192 192 64 192
WIRE 64 208 64 192
WIRE 240 224 240 208
WIRE 384 224 384 192
WIRE 64 304 64 288
IOPIN 32 192 In
IOPIN 416 80 Out
SYMBOL voltage 64 304 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL pmos 192 112 R0
SYMATTR InstName M1
SYMATTR Value pch_tt
SYMATTR Value2 l=0.18u w= 0.27u
SYMBOL voltage 384 208 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.8V
FLAG 64 304 0
FLAG 240 224 0
FLAG 384 224 0
FLAG 32 192 Vgs
FLAG 416 80 Vds
TEXT -120 64 Left 2 !.include TSMC180.lib
TEXT -128 112 Left 2 !.dc V2 0 1.8 0.01 V1 0 1 0.2
TEXT -120 88 Left 2 !;dc  V1 0 1 1m
TEXT 168 64 Left 2 ;Short Channel
TEXT 152 248 Left 2 ;l=0.18u w= 0.27u
* Z:\home\khalils\Downloads\files\data\raw_asc\e9f4e39cf65e_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
A1 N001 0 N001 0 N004 0 N002 0 DFLOP Vhigh = 5
C1 N004 0 150p
R1 N004 N003 33000
R3 N003 0 66000
D1 N004 P001 D
R2 P001 N003 1000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 40m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 496 -128 464 -128
WIRE 496 -112 496 -128
WIRE 464 -48 464 -128
WIRE 352 0 176 0
WIRE 384 0 352 0
WIRE 672 0 544 0
WIRE 352 48 352 0
WIRE 384 48 352 48
WIRE 384 112 384 96
WIRE 240 208 176 208
WIRE 304 208 240 208
WIRE 336 208 304 208
WIRE 464 208 464 96
WIRE 464 208 416 208
WIRE 544 208 464 208
WIRE 544 240 544 208
WIRE 304 304 304 208
WIRE 320 304 304 304
WIRE 464 304 464 208
WIRE 240 336 240 288
WIRE 544 336 544 304
SYMBOL diode 464 288 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL res 432 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 33000
SYMBOL res 224 192 R0
SYMATTR InstName R3
SYMATTR Value 66000
SYMBOL Digital\\dflop 464 -48 R0
WINDOW 3 8 12 Left 2
SYMATTR InstName A1
SYMATTR Value Vhigh = 5
SYMBOL res 416 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1000
SYMBOL cap 528 240 R0
SYMATTR InstName C1
SYMATTR Value 150p
FLAG 384 112 0
FLAG 496 -112 0
FLAG 544 336 0
FLAG 240 336 0
TEXT 56 408 Left 2 !.tran 40m
* Z:\tmp\asc_dec_bjh7r6w2\0d13efbf7f3a_TTL_Vco_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N007 10k
R4 N005 N004 6k8
R2 N001 N005 10k
D2 N007 N003 1N914
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -240 288 -240 192
WIRE -240 464 -240 368
WIRE -160 288 -160 256
WIRE -160 464 -240 464
WIRE -160 464 -160 368
WIRE -128 256 -160 256
WIRE -128 480 -128 256
WIRE -96 192 -240 192
WIRE -96 240 -96 192
WIRE -96 352 -96 320
WIRE -96 368 -96 352
WIRE -96 480 -128 480
WIRE -96 480 -96 448
WIRE -16 272 -16 208
WIRE -16 352 -96 352
WIRE -16 352 -16 336
WIRE 48 352 -16 352
WIRE 48 352 48 336
WIRE 48 384 48 352
WIRE 48 464 -160 464
WIRE 48 464 48 448
WIRE 64 208 -16 208
WIRE 64 224 64 208
WIRE 80 352 80 336
WIRE 128 208 64 208
WIRE 160 352 80 352
WIRE 160 352 160 208
WIRE 160 464 48 464
WIRE 160 496 160 464
WIRE 208 368 128 368
WIRE 208 368 208 336
WIRE 224 208 160 208
WIRE 224 224 224 208
WIRE 240 368 240 336
WIRE 240 384 240 368
WIRE 240 464 160 464
WIRE 240 464 240 448
WIRE 336 208 224 208
WIRE 336 272 336 208
WIRE 336 368 240 368
WIRE 336 368 336 336
WIRE 400 192 -96 192
WIRE 400 272 400 192
WIRE 400 368 336 368
WIRE 400 368 400 352
WIRE 400 384 400 368
WIRE 400 480 -96 480
WIRE 400 480 400 464
SYMBOL res 384 256 R0
WINDOW 0 -26 67 Left 0
WINDOW 3 -38 94 Left 0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res -112 352 R0
SYMATTR InstName R4
SYMATTR Value 6k8
SYMBOL res -112 224 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL diode 352 336 R180
WINDOW 0 24 72 Left 0
WINDOW 3 24 0 Invisible 0
SYMATTR InstName D2
SYMATTR Value 1N914
FLAG 160 496 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG819.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
V2 N002 0 0
V3 IN 0 PULSE(0 5 0 20n 20n 10u 20u)
R1 D 0 300
C1 D 0 35p
V4 +V 0 5
XU1 IN N001 D N002 +V 0 ADG819 ;pnba IN)S1)D)S2)Vdd)GND
.tran 100u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG819.asy)
.lib ADG819.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1696 -272 -2032 -272
WIRE -2032 -256 -2032 -272
WIRE -1488 -240 -1504 -240
WIRE -1424 -240 -1488 -240
WIRE -1312 -240 -1424 -240
WIRE -1424 -224 -1424 -240
WIRE -1312 -224 -1312 -240
WIRE -1696 -208 -1920 -208
WIRE -1920 -192 -1920 -208
WIRE -2032 -160 -2032 -176
WIRE -1712 -144 -1776 -144
WIRE -1696 -144 -1712 -144
WIRE -1424 -128 -1424 -144
WIRE -1312 -128 -1312 -160
WIRE -1920 -96 -1920 -112
WIRE -1776 -80 -1776 -144
WIRE -1600 -16 -1600 -32
WIRE -1776 32 -1776 0
FLAG -2032 -160 0
FLAG -1920 -96 0
FLAG -1776 32 0
FLAG -1600 -368 +V
FLAG -1424 -128 0
FLAG -1600 -16 0
FLAG -1312 -128 0
FLAG -1744 -384 0
FLAG -1744 -464 +V
FLAG -1712 -144 IN
FLAG -1488 -240 D
SYMBOL voltage -2032 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -1920 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage -1776 -96 R0
WINDOW 3 24 136 Left 2
SYMATTR Value PULSE(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V3
SYMBOL res -1440 -240 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL cap -1328 -224 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL voltage -1744 -480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL ADG819 -1600 -192 R0
SYMATTR InstName U1
TEXT -1360 -40 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4622.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4622.asy)
R2 N001 0 90.9K
V1 IN 0 12
Rload1 OUT1 0 .4
C1 OUT1 0 47 Rser=5m
R1 N002 0 40.2K
C2 OUT2 0 47 Rser=5m
Rload2 OUT2 0 .6
XU1 NC_01 OUT2 IN NC_02 NC_03 IN 0 NC_04 N002 NC_05 NC_06 OUT1 IN MP_07 MP_08 MP_09 MP_10 MP_11 IN MP_12 IN MP_13 MP_14 MP_15 MP_16 NC_17 NC_18 N001 LTM4622 ;pnba Pgood1)Vout2)Run1)Sync/Mode)FREQ)Run2)GND)Pgood2)FB2)Track/SS2)COMP2)Vout1)Vin2))))))IntVcc))Vin1)))))COMP1)Track/SS1)FB1
.tran .5m startup
.lib LTM4622.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 772
WIRE 16 -80 -96 -80
WIRE 160 -80 16 -80
WIRE 432 -80 160 -80
WIRE -96 -64 -96 -80
WIRE 160 -64 160 -80
WIRE 16 0 16 -80
WIRE 32 0 16 0
WIRE 432 0 432 -80
WIRE 432 0 416 0
WIRE -96 32 -96 16
WIRE 16 96 16 0
WIRE 32 96 16 96
WIRE 432 96 432 0
WIRE 432 96 416 96
WIRE -128 288 -272 288
WIRE 32 288 -128 288
WIRE 592 288 416 288
WIRE 688 288 592 288
WIRE -272 304 -272 288
WIRE -128 304 -128 288
WIRE 592 304 592 288
WIRE 688 304 688 288
WIRE 32 384 -64 384
WIRE 496 384 416 384
WIRE -272 400 -272 384
WIRE -128 400 -128 368
WIRE -64 400 -64 384
WIRE 496 400 496 384
WIRE 592 400 592 368
WIRE 688 400 688 384
WIRE -64 496 -64 480
WIRE 496 496 496 480
WIRE 160 656 160 640
SYMBOL cap -144 304 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMATTR SpiceLine Rser=5m
SYMBOL cap 576 304 R0
SYMATTR InstName C2
SYMATTR Value 47
SYMATTR SpiceLine Rser=5m
SYMBOL res 672 288 R0
SYMATTR InstName Rload2
SYMATTR Value .6
SYMBOL LTM4622 224 336 R0
SYMATTR InstName U1
SYMBOL res 480 384 R0
SYMATTR InstName R1
SYMATTR Value 40.2K
SYMBOL res -288 288 R0
SYMATTR InstName Rload1
SYMATTR Value .4
SYMBOL res -80 384 R0
SYMATTR InstName R2
SYMATTR Value 90.9K
SYMBOL voltage -96 -80 R0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 160 656 0
FLAG -96 32 0
FLAG 496 496 0
FLAG -64 496 0
FLAG -128 400 0
FLAG -272 400 0
FLAG 592 400 0
FLAG 688 400 0
FLAG 688 288 OUT2
FLAG -272 288 OUT1
FLAG -96 -80 IN
TEXT 480 584 Left 2 !.tran .5m startup