* Z:\home\khalils\Downloads\files\data\raw_asc\LT3741.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 24
C1 0 N002 10
C2 N004 N008 .22
D1 N002 N004 1N5819
MQ1 N001 N006 N008 N008 Si7884DP
MQ2 N008 N012 0 0 Si7884DP
L1 N008 N009 2.2
R1 N009 N010 2.5m
R2 N010 N015 88.7K
R3 N015 0 12.1K
C3 N010 0 300
C4 N014 0 5.6n Rser=39.2K
C5 N013 0 .01
R4 N007 0 82.5K
V2 N003 0 5
V3 N011 0 1
C6 N005 0 .01
XU2 0 N003 N005 N005 MP_01 N011 MP_02 N013 MP_03 N015 N009 N010 MP_04 N014 N007 MP_05 MP_06 MP_07 MP_08 MP_09 MP_10 MP_11 N006 N008 N004 N012 N002 N001 NC_12 LT3741 ;pnba GND)EN/UVLO)Vref)CTRL2))CTRL1))SS))FB)Sense+)Sense-))VC)Rt))))))))HG)SW)CBOOT)LG)Vcc_int)Vin)SYNC
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 2.25m startup
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3741.asy)
.lib LT3741.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1032 680
WIRE 272 -224 272 -240
WIRE 144 -144 -176 -144
WIRE 560 -144 144 -144
WIRE -176 -128 -176 -144
WIRE 272 -128 272 -160
WIRE 432 -128 272 -128
WIRE 144 -112 144 -144
WIRE 272 -112 272 -128
WIRE -64 -48 -80 -48
WIRE 32 -48 16 -48
WIRE 432 -48 432 -64
WIRE 432 -48 384 -48
WIRE -176 -32 -176 -48
WIRE 560 -32 560 -144
WIRE -64 48 -96 48
WIRE 16 48 0 48
WIRE 32 48 16 48
WIRE 512 48 384 48
WIRE 432 64 432 -48
WIRE 16 96 16 48
WIRE 16 96 -144 96
WIRE -64 144 -96 144
WIRE 32 144 16 144
WIRE 432 144 432 128
WIRE 432 144 384 144
WIRE 560 144 560 64
WIRE 560 144 432 144
WIRE 592 144 560 144
WIRE 704 144 672 144
WIRE 720 144 704 144
WIRE 816 144 800 144
WIRE 848 144 816 144
WIRE 896 144 848 144
WIRE 560 160 560 144
WIRE 896 160 896 144
WIRE -64 240 -80 240
WIRE 32 240 16 240
WIRE 512 240 384 240
WIRE 896 240 896 224
WIRE 560 272 560 256
WIRE -144 336 -144 96
WIRE 32 336 -144 336
WIRE 704 336 704 144
WIRE 704 336 384 336
WIRE -80 432 -112 432
WIRE 32 432 -16 432
WIRE 816 432 816 144
WIRE 816 432 384 432
WIRE 848 432 848 144
WIRE -80 528 -112 528
WIRE 32 528 -16 528
WIRE 848 528 848 512
WIRE 848 528 384 528
WIRE 848 544 848 528
WIRE 144 608 144 592
WIRE 848 640 848 624
FLAG 144 608 0
FLAG -176 -32 0
FLAG 272 -240 0
FLAG 560 272 0
FLAG 848 640 0
FLAG 896 240 0
FLAG -112 432 0
FLAG -112 528 0
FLAG -96 144 0
FLAG -80 -48 0
FLAG -80 240 0
FLAG -96 48 0
SYMBOL voltage -176 -144 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 256 -224 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL cap 416 64 R0
SYMATTR InstName C2
SYMATTR Value .22
SYMBOL schottky 416 -128 R0
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL nmos 512 -32 R0
SYMATTR InstName Q1
SYMATTR Value Si7884DP
SYMBOL nmos 512 160 R0
SYMATTR InstName Q2
SYMATTR Value Si7884DP
SYMBOL ind 576 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL res 704 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 2.5m
SYMBOL res 832 416 R0
SYMATTR InstName R2
SYMATTR Value 88.7K
SYMBOL res 832 528 R0
SYMATTR InstName R3
SYMATTR Value 12.1K
SYMBOL cap 880 160 R0
SYMATTR InstName C3
SYMATTR Value 300
SYMBOL cap -16 512 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 39 60 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 5.6n
SYMATTR SpiceLine Rser=39.2K
SYMBOL cap -16 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value .01
SYMBOL res 32 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 82.5K
SYMBOL voltage 32 -48 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 32 240 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V3
SYMATTR Value 1
SYMBOL cap 0 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C6
SYMATTR Value .01
SYMBOL LT3741 208 240 R0
SYMATTR InstName U2
TEXT 512 584 Left 2 !.tran 2.25m startup