Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1574.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1574.asy)
V1 IN 0 9
R1 N002 0 31.5K
L1 N001 OUT 100 Rser=0.02 Rpar=5000
R2 OUT N002 93.5K
XU1 N002 MP_01 MP_02 0 N001 IN IN IN LTC1574 top=1K bot=1T ;pnba FB)))GND)SW)Vin)Ipgm)_SHDN
Rload OUT 0 15
C1 OUT 0 100 Rser=0.02
.tran 3m startup
.lib LTC1574.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1492 912
WIRE 480 528 384 528
WIRE 624 528 480 528
WIRE 384 544 384 528
WIRE 624 544 624 528
WIRE 784 560 768 560
WIRE 896 560 864 560
WIRE 1024 560 896 560
WIRE 1120 560 1024 560
WIRE 896 576 896 560
WIRE 1024 576 1024 560
WIRE 1120 576 1120 560
WIRE 480 608 480 528
WIRE 496 608 480 608
WIRE 768 608 768 560
WIRE 768 608 752 608
WIRE 384 640 384 624
WIRE 480 672 480 608
WIRE 496 672 480 672
WIRE 896 672 896 656
WIRE 896 672 752 672
WIRE 1024 672 1024 640
WIRE 1120 672 1120 656
WIRE 896 688 896 672
WIRE 624 768 624 736
SYMBOL IND 768 576 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL RES 1104 560 R0
SYMATTR InstName Rload
SYMATTR Value 15
SYMBOL RES 880 672 R0
SYMATTR InstName R1
SYMATTR Value 31.5K
SYMBOL POLCAP 1008 576 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL POWERPRODUCTS\\LTC1574 624 624 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 384 528 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL RES 880 560 R0
SYMATTR InstName R2
SYMATTR Value 93.5K
FLAG 1120 560 OUT
FLAG 1024 672 0
FLAG 1120 672 0
FLAG 624 768 0
FLAG 896 768 0
FLAG 384 640 0
FLAG 384 528 IN
TEXT 1064 720 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2109-1.3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
L1 N001 OUT 1
Rload OUT 0 4
C1 OUT 0 10
XU1 IN IN N001 OUT 0 ADP2109-x.x Rtop=128K ;pnba Vin)EN)SW)FB)GND
.tran .5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2109-1.3.asy)
.lib ADP2109-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 144
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 4
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ADP2109-1.3 352 224 R0
SYMATTR InstName U1
TEXT 576 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3f4fafb0c580_Half_Wave_Rectifier.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 SINE(0 1 1k)
R1 N002 0 1k
D1 N001 N002 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 224 64 80 64
WIRE 400 64 288 64
WIRE 400 144 400 64
WIRE 80 160 80 64
WIRE 80 320 80 240
WIRE 400 320 400 224
WIRE 400 320 80 320
WIRE 400 368 400 320
SYMBOL diode 224 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 80 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1k)
SYMBOL res 384 128 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 400 368 0
TEXT 40 392 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADR5044.asc
* Generated by LTspice 26.0.1 for Windows.
Rload OUT 0 10k
Rbias IN OUT 715
Vin IN 0 4.5
XU1 OUT 0 ADR5044 ;pnba 1)2
.dc TEMP -40 125 .1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR5044.asy)
.lib ADR5044.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 960
WIRE 32 64 -80 64
WIRE 208 64 112 64
WIRE 464 64 208 64
WIRE -80 112 -80 64
WIRE 208 112 208 64
WIRE 464 112 464 64
WIRE -80 224 -80 192
WIRE 208 224 208 176
WIRE 208 224 -80 224
WIRE 464 224 464 192
WIRE 464 224 208 224
WIRE -80 256 -80 224
FLAG -80 64 IN
FLAG -80 256 0
FLAG 464 64 OUT
SYMBOL res 448 96 R0
SYMATTR InstName Rload
SYMATTR Value 10k
SYMBOL res 16 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rbias
SYMATTR Value 715
SYMBOL voltage -80 96 R0
WINDOW 3 36 62 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 30 32 Left 2
SYMATTR Value 4.5
SYMATTR InstName Vin
SYMBOL ADR5044 208 144 R0
SYMATTR InstName U1
TEXT -88 -32 Left 2 !.dc TEMP -40 125 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\53ce05535c60_SwitchingTransistor.asc
* Generated by LTspice 26.0.1 for Windows.
* https://www.electricalelibrary.com/en/2018/07/02/how-to-polarize-the-bjt-transistor-part-1/
R6 N001 VCC 75
V2 GPIO 0 PULSE(0 3.3 0 1u 1u 0.5 1)
Q3 N002 N003 0 0 BCW66G
R7 0 GPIO 22k
R4 N003 GPIO 4.3k
V1 VCC 0 12
R5 N002 N001 75
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1584 680
WIRE 672 -144 672 -160
WIRE 672 -48 672 -64
WIRE 672 48 672 32
WIRE -128 96 -128 32
WIRE -32 96 -32 32
WIRE 480 96 432 96
WIRE 496 96 480 96
WIRE 608 96 576 96
WIRE 480 128 480 96
WIRE 672 208 672 144
WIRE 672 208 480 208
WIRE -128 224 -128 176
WIRE -32 224 -32 176
WIRE 672 224 672 208
SYMBOL res 496 224 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R7
SYMATTR Value 22k
SYMBOL res 592 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 4.3k
SYMBOL voltage -32 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 0 1u 1u 0.5 1)
SYMBOL voltage -128 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL npn 608 48 R0
SYMATTR InstName Q3
SYMATTR Value BCW66G
SYMBOL res 688 48 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 75
SYMBOL res 688 -48 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R6
SYMATTR Value 75
FLAG -128 224 0
FLAG -128 32 VCC
FLAG -32 224 0
FLAG -32 32 GPIO
FLAG 672 -160 VCC
FLAG 672 224 0
FLAG 432 96 GPIO
TEXT -64 288 Left 2 !.tran 1
TEXT -168 352 Left 2 ;https://www.electricalelibrary.com/en/2018/07/02/how-to-polarize-the-bjt-transistor-part-1/
* Z:\home\khalils\Downloads\files\data\raw_asc\c7e1de1c4500_part3_b_vgs_sweep.asc
* Generated by LTspice 26.0.1 for Windows.
M1 drain gate 0 0 NMOS
VDS drain 0 7
VGS gate 0 10
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model nmos NMOS (kp=100u, vt0=0.5, l=.18u, w={X})
.dc VGS 0 10 0.01
.step param X list 0.36u 0.8u 1.4u 1.9u 2.4u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 48 96 48
WIRE 240 48 160 48
WIRE 96 112 96 48
WIRE 240 144 240 48
WIRE -64 192 -96 192
WIRE 48 192 -64 192
WIRE -96 208 -96 192
WIRE -96 336 -96 288
WIRE 96 336 96 208
WIRE 96 336 -96 336
WIRE 176 336 96 336
WIRE 240 336 240 224
WIRE 240 336 176 336
SYMBOL voltage 240 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 7
SYMBOL nmos 48 112 R0
SYMATTR InstName M1
SYMBOL voltage -96 192 R0
SYMATTR InstName VGS
SYMATTR Value 10
FLAG 96 336 0
FLAG -64 192 gate
FLAG 160 48 drain
FLAG 176 336 source
TEXT -104 376 Left 2 !.model nmos NMOS (kp=100u, vt0=0.5, l=.18u, w={X})
TEXT -104 408 Left 2 !.dc VGS 0 10 0.01
TEXT -104 440 Left 2 !.step param X list 0.36u 0.8u 1.4u 1.9u 2.4u
* Z:\home\khalils\Downloads\files\data\raw_asc\9857ae9b1bc0_NAND.asc
* Generated by LTspice 26.0.1 for Windows.
M2 N001 A out N003 PMOS
M4 P001 A 0 N004 NMOS
V3 B 0 PULSE(0 1.2 0 500p 500p 20n 40n)
V2 A 0 PULSE(0 1.2 0 500p 500p 10n 20n)
M1 N001 B out N002 PMOS
V1 N001 0 1.2
M3 out B P001 0 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100n
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 496 -48 176 -48
WIRE 176 0 176 -48
WIRE 176 0 32 0
WIRE 352 0 176 0
WIRE 352 48 352 0
WIRE 32 64 32 0
WIRE 352 96 352 64
WIRE 32 112 32 80
WIRE 304 128 112 128
WIRE 160 160 32 160
WIRE 352 160 352 144
WIRE 352 160 160 160
WIRE -208 192 -272 192
WIRE -16 192 -16 144
WIRE -16 192 -208 192
WIRE 160 208 160 160
WIRE 288 208 160 208
WIRE 160 240 160 208
WIRE -80 256 -112 256
WIRE 112 256 112 128
WIRE 112 256 -80 256
WIRE 288 288 160 288
WIRE 112 320 112 256
WIRE -16 416 -16 192
WIRE 112 416 -16 416
WIRE 160 416 160 384
WIRE 288 432 288 288
WIRE 288 432 160 432
WIRE 160 464 160 432
IOPIN -272 192 In
IOPIN -112 256 In
IOPIN 288 208 Out
SYMBOL nmos4 112 240 R0
SYMATTR InstName M3
SYMBOL pmos4 304 48 R0
SYMATTR InstName M1
SYMBOL voltage -80 240 R0
WINDOW 3 -457 74 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 1.2 0 500p 500p 20n 40n)
SYMATTR InstName V3
SYMBOL pmos4 -16 64 R0
SYMATTR InstName M2
SYMBOL voltage -208 176 R0
WINDOW 3 -246 -36 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 1.2 0 500p 500p 10n 20n)
SYMATTR InstName V2
SYMBOL voltage 496 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.2
SYMBOL nmos4 112 336 R0
SYMATTR InstName M4
FLAG 160 464 0
FLAG -208 272 0
FLAG -80 336 0
FLAG 496 32 0
FLAG -272 192 A
FLAG -112 256 B
FLAG 288 208 out
TEXT -48 -24 Left 2 !.tran 100n
* Z:\home\khalils\Downloads\files\data\raw_asc\a990b54cbd60_180p_IDVD.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 N001 PMOS l=180n w=270n
VG N002 0
VD N001 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib tsmc018.lib
.dc VD -1.8 0 0.01 VG -0.01 -1.8 -0.6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1168 680
WIRE 320 128 240 128
WIRE 416 128 320 128
WIRE 320 176 320 128
WIRE 320 176 240 176
WIRE 192 208 16 208
WIRE 416 208 416 128
WIRE 16 240 16 208
WIRE 16 352 16 320
WIRE 240 352 240 224
WIRE 240 352 16 352
WIRE 416 352 416 288
WIRE 416 352 240 352
WIRE 240 368 240 352
FLAG 240 368 0
SYMBOL pmos4 192 128 R0
SYMATTR InstName M1
SYMATTR Value2 l=180n w=270n
SYMBOL voltage 16 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VG
SYMATTR Value ""
SYMBOL voltage 416 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VD
SYMATTR Value ""
TEXT 744 128 Left 2 !.lib tsmc018.lib
TEXT 744 176 Left 2 !.dc VD -1.8 0 0.01 VG -0.01 -1.8 -0.6
* Z:\home\khalils\Downloads\files\data\raw_asc\444d251e8ba9_InvertingSummingAmplifier.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD712.asy)
Vin2 IN2 0 0.2
V2 -V 0 -15
R2 N001 IN1 10k
R3 N002 0 10k
Vin1 IN1 0
V1 +V 0 15
XU1 N002 N001 +V -V OUT AD712 ;pnba In+)In-)V+)V-)OUT
R4 N001 IN2 10k
R1 N001 OUT 100k
.dc Vin1 list 0.3 -0.3 0
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 32 160 32
WIRE -304 128 -320 128
WIRE -208 128 -224 128
WIRE -144 128 -208 128
WIRE 48 128 -64 128
WIRE 80 128 80 32
WIRE 80 128 48 128
WIRE 96 128 80 128
WIRE 192 144 192 32
WIRE 192 144 160 144
WIRE 240 144 192 144
WIRE 384 144 384 128
WIRE 496 144 496 128
WIRE 96 160 64 160
WIRE 64 192 64 160
WIRE -320 224 -336 224
WIRE -176 224 -240 224
WIRE -128 224 -176 224
WIRE 48 224 48 128
WIRE 48 224 -48 224
WIRE 384 240 384 224
WIRE 496 240 496 224
SYMBOL res 64 16 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res -48 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL AD712 128 80 R0
SYMATTR InstName U1
SYMBOL voltage 496 128 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res -32 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL voltage -224 224 R90
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
WINDOW 3 24 44 Left 2
SYMATTR Value 0.2
SYMATTR InstName Vin2
SYMBOL voltage -208 128 R90
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin1
SYMATTR Value ""
SYMBOL voltage 384 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 48 176 R0
SYMATTR InstName R3
SYMATTR Value 10k
FLAG -320 128 0
FLAG 240 144 OUT
FLAG -208 128 IN1
FLAG 128 112 +V
FLAG 128 176 -V
FLAG 64 272 0
FLAG 384 128 +V
FLAG 384 240 0
FLAG 496 128 -V
FLAG 496 240 0
FLAG -336 224 0
FLAG -176 224 IN2
TEXT -56 336 Left 2 !.dc Vin1 list 0.3 -0.3 0
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8603.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8603.asy)
V2 V- 0 -2.5
RF N003 N002 2k
XU1 0 N002 V+ V- N003 AD8603 ;pnba In+)In-)V+)V-)OUT
V1 V+ 0 2.5
RG N002 N001 2k
V3 N001 0 SINE(0 2 1k) AC 1
.tran 5m
.lib AD8603.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1668 868
WIRE -48 16 -144 16
WIRE 64 16 32 16
WIRE 112 16 64 16
WIRE 240 16 192 16
WIRE -144 32 -144 16
WIRE -352 48 -368 48
WIRE -240 48 -256 48
WIRE -368 80 -368 48
WIRE -256 80 -256 48
WIRE -144 128 -144 112
WIRE 144 128 144 112
WIRE 64 144 64 16
WIRE 112 144 64 144
WIRE 240 160 240 16
WIRE 240 160 176 160
WIRE -368 176 -368 160
WIRE -256 176 -256 160
WIRE 112 176 64 176
WIRE 144 208 144 192
WIRE 64 240 64 176
SYMBOL voltage -368 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage -256 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 48 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RG
SYMATTR Value 2k
SYMBOL AD8603 144 96 R0
SYMATTR InstName U1
SYMBOL res 208 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RF
SYMATTR Value 2k
SYMBOL voltage -144 16 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value SINE(0 2 1k)
FLAG -368 176 0
FLAG -256 176 0
FLAG -256 48 V-
FLAG -368 48 V+
FLAG 144 112 V+
FLAG 144 208 V-
FLAG 64 240 0
FLAG -144 128 0
TEXT -344 -72 Left 2 !.tran 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3617.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3617.asy)
C2 N001 0 .1
L1 N002 OUT .15 Rser=1m Rpar=5K
Rload OUT 0 .2
V1 IN 0 2.5
C1 OUT 0 47 x2 Rser=5m
XU1 IN 0 N001 IN N002 MP_01 MP_02 MP_03 MP_04 MP_05 MP_06 MP_07 MP_08 MP_09 MP_10 MP_11 MP_12 IN IN MP_13 NC_14 OUT IN IN 0 LTC3617 ;pnba Rt)SGND)VTTR)PVin)SW)))))))))))))SVin)Run))Pgood)FB)Ith)VDDQin)PGND
.tran 2m startup
.lib LTC3617.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 -64 -80 -64
WIRE 128 -64 16 -64
WIRE 224 -64 128 -64
WIRE 336 -64 224 -64
WIRE -80 -48 -80 -64
WIRE 128 -48 128 -64
WIRE 224 -48 224 -64
WIRE 16 16 16 -64
WIRE 32 16 16 16
WIRE 368 16 320 16
WIRE -80 48 -80 32
WIRE 16 112 16 16
WIRE 32 112 16 112
WIRE 368 112 320 112
WIRE 480 112 448 112
WIRE 544 112 480 112
WIRE 640 112 544 112
WIRE 544 128 544 112
WIRE 640 128 640 112
WIRE 480 208 480 112
WIRE 480 208 320 208
WIRE 544 224 544 192
WIRE 640 224 640 208
WIRE 16 304 16 112
WIRE 32 304 16 304
WIRE 336 304 336 -64
WIRE 336 304 320 304
WIRE 128 384 128 368
WIRE 224 384 224 368
SYMBOL voltage -80 -64 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL ind 352 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value .15
SYMATTR SpiceLine Rser=1m Rpar=5K
SYMBOL PowerProducts\\LTC3617 176 160 R0
SYMATTR InstName U1
SYMBOL res 624 112 R0
SYMATTR InstName Rload
SYMATTR Value .2
SYMBOL cap 528 128 R0
WINDOW 123 31 69 Left 2
WINDOW 3 37 37 Left 2
SYMATTR Value2 x2
SYMATTR Value 47
SYMATTR InstName C1
SYMATTR SpiceLine Rser=5m
SYMBOL cap 368 32 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value .1
FLAG -80 48 0
FLAG 128 384 0
FLAG 544 224 0
FLAG 640 224 0
FLAG 640 112 OUT
FLAG -80 -64 IN
FLAG 224 384 0
FLAG 432 16 0
TEXT 424 312 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1992-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC1992-5.asy)
V1 +V 0 2.7
V2 -V 0 0
V3 N001 N005 SINE(0 0.4 10K)
C1 N002 0 10p
C2 N004 0 10p
XU1 N001 N003 +V N002 N004 -V N003 N005 LTC1992-5 ;pnba IN-)VOCM)V+)OUT+)OUT-)V-)VMID)IN+
.tran 1m
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 768
WIRE 192 336 -48 336
WIRE 496 368 496 352
WIRE 240 400 240 384
WIRE -272 432 -272 416
WIRE -160 432 -160 416
WIRE -48 432 -48 336
WIRE 192 432 192 336
WIRE 208 432 192 432
WIRE 496 448 496 432
WIRE 496 448 368 448
WIRE 208 464 192 464
WIRE 192 496 192 464
WIRE 208 496 192 496
WIRE 496 512 368 512
WIRE -272 528 -272 512
WIRE -160 528 -160 512
WIRE 208 528 192 528
WIRE 496 528 496 512
WIRE 240 576 240 560
WIRE 496 608 496 592
WIRE -48 624 -48 512
WIRE 192 624 192 528
WIRE 192 624 -48 624
SYMBOL voltage -48 416 R0
WINDOW 123 40 100 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 0.4 10K)
SYMBOL LTC1992-5 272 480 R0
SYMATTR InstName U1
SYMBOL voltage -272 416 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.7
SYMBOL cap 480 528 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL voltage -160 416 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL cap 480 432 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 10p
FLAG -272 528 0
FLAG -160 528 0
FLAG -272 416 +V
FLAG -160 416 -V
FLAG 496 352 0
FLAG 496 608 0
FLAG 240 384 +V
FLAG 240 576 -V
TEXT 480 688 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1763.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1763.asy)
C4 OUT 0 10
V1 IN 0 1.8
R2 N001 IN 50K
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1763 Radj=1T ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
C1 N004 0 1
R1 OUT 0 .6
C2 N003 0 10n
C3 N002 0 1
R3 0 N005 10K
.tran 1m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 464 320 448 320
WIRE 224 384 224 368
SYMBOL res 464 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL ADP1763 224 176 R0
WINDOW 0 0 -64 Center 2
WINDOW 3 0 64 Center 2
SYMATTR InstName U1
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value .6
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 320 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3585-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3585-1.asy)
V1 N001 0 5
D1 N003 OUT D
K1 L1 L2 1
L2 0 N003 {10u*10.2*10.2} Rpar=1Meg
XU1 N001 N002 N001 N005 N006 N006 N007 N001 N004 MP_01 0 LT3585-1 ;pnba CHRG/Iadj)Vbat)Vin)SW)IBGTPU)IBGTPD)IBGTin)IBGTpwr)_Done))GND
V3 N007 0 PWL(30m 0 30.01m 3 30.1m 3 30.11m 0)
V2 N002 0 3
C1 OUT 0 .02
R3 N004 N001 10K
L1 N002 N005 10 Rpar=2K Rser=.1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 50m startup
.lib LT3585-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2772 1764
WIRE 1936 1152 1936 1136
WIRE 1712 1248 1520 1248
WIRE 1824 1248 1712 1248
WIRE 1936 1248 1936 1232
WIRE 2064 1248 1936 1248
WIRE 2224 1248 2112 1248
WIRE 2352 1248 2288 1248
WIRE 2064 1264 2064 1248
WIRE 2112 1264 2112 1248
WIRE 2352 1280 2352 1248
WIRE 1712 1296 1712 1248
WIRE 1824 1296 1824 1248
WIRE 1936 1296 1936 1248
WIRE 1520 1360 1520 1248
WIRE 1568 1360 1520 1360
WIRE 1664 1360 1648 1360
WIRE 2064 1360 2064 1344
WIRE 2064 1360 1984 1360
WIRE 2112 1360 2112 1344
WIRE 2352 1360 2352 1344
WIRE 1520 1440 1520 1360
WIRE 1664 1440 1520 1440
WIRE 2016 1440 1984 1440
WIRE 1520 1456 1520 1440
WIRE 1664 1520 1600 1520
WIRE 2016 1520 2016 1440
WIRE 2016 1520 1984 1520
WIRE 1520 1552 1520 1536
WIRE 1600 1552 1600 1520
WIRE 1824 1584 1824 1568
WIRE 1600 1664 1600 1632
SYMBOL PowerProducts\\LT3585-1 1824 1440 R0
SYMATTR InstName U1
SYMBOL cap 2336 1280 R0
WINDOW 3 27 55 Left 2
SYMATTR Value .02
SYMATTR InstName C1
SYMBOL voltage 1600 1536 R0
WINDOW 3 12 110 Left 2
SYMATTR Value PWL(30m 0 30.01m 3 30.1m 3 30.11m 0)
SYMATTR InstName V3
SYMBOL ind2 2048 1248 R0
WINDOW 0 -6 35 Right 2
WINDOW 3 -4 73 Right 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rpar=2K Rser=.1
SYMBOL res 1664 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL misc\\battery 1936 1248 M180
WINDOW 0 25 87 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL VOLTAGE 1520 1440 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL diode 2224 1264 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL ind2 2128 1360 R180
WINDOW 0 -3 72 Right 2
WINDOW 3 0 43 Right 2
SYMATTR InstName L2
SYMATTR Value {10u*10.2*10.2}
SYMATTR SpiceLine Rpar=1Meg
FLAG 2352 1360 0
FLAG 1824 1584 0
FLAG 1520 1552 0
FLAG 2112 1360 0
FLAG 1936 1136 0
FLAG 1600 1664 0
FLAG 2352 1248 OUT
TEXT 2080 1464 Left 2 !.tran 50m startup
TEXT 2088 1248 Bottom 2 !K1 L1 L2 1