Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\Cohn.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 N005 {L}
L2 N005 0 {Lm}
L3 N002 N005 {2*L}
L4 N002 N006 {2*L}
L5 N003 N006 {L}
L6 N006 0 {Lm}
C1 N001 IN {C1}
C2 IN 0 {C2}
C3 N003 OUT {C1}
C4 OUT 0 {C2}
C5 N002 0 {C3}
V1 N004 0 AC 2
R1 IN N004 {R}
R2 OUT 0 {R}
.ac oct 1000 10Meg 22Meg
.param x=.54 ; trimer postion
.param R=50
.param L=2.95u Lm=.27u C1=22p+x*25p C2=240p C3=34p
* This example schematic is supplied for informational/educational purposes only.
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2316 1728
WIRE 1360 1168 1232 1168
WIRE 1664 1168 1536 1168
WIRE 1760 1168 1664 1168
WIRE 2080 1168 1952 1168
WIRE 1232 1184 1232 1168
WIRE 2080 1184 2080 1168
WIRE 1360 1200 1360 1168
WIRE 1536 1200 1536 1168
WIRE 1760 1200 1760 1168
WIRE 1952 1200 1952 1168
WIRE 1664 1280 1664 1168
WIRE 1072 1296 1024 1296
WIRE 1184 1296 1152 1296
WIRE 1232 1296 1232 1248
WIRE 1232 1296 1184 1296
WIRE 1360 1296 1360 1280
WIRE 1456 1296 1360 1296
WIRE 1536 1296 1536 1280
WIRE 1536 1296 1456 1296
WIRE 1760 1296 1760 1280
WIRE 1872 1296 1760 1296
WIRE 1952 1296 1952 1280
WIRE 1952 1296 1872 1296
WIRE 2080 1296 2080 1248
WIRE 2240 1296 2080 1296
WIRE 2240 1312 2240 1296
WIRE 1024 1328 1024 1296
WIRE 1232 1328 1232 1296
WIRE 1456 1328 1456 1296
WIRE 1872 1328 1872 1296
WIRE 2080 1328 2080 1296
WIRE 1024 1424 1024 1408
WIRE 1232 1424 1232 1392
WIRE 1456 1424 1456 1408
WIRE 1664 1424 1664 1344
WIRE 1872 1424 1872 1408
WIRE 2080 1424 2080 1392
WIRE 2240 1424 2240 1392
FLAG 2080 1424 0
FLAG 1872 1424 0
FLAG 1456 1424 0
FLAG 1232 1424 0
FLAG 1664 1424 0
FLAG 1024 1424 0
FLAG 2240 1424 0
FLAG 2240 1296 OUT
FLAG 1184 1296 IN
SYMBOL ind 1344 1184 R0
SYMATTR InstName L1
SYMATTR Value {L}
SYMBOL ind 1440 1312 R0
SYMATTR InstName L2
SYMATTR Value {Lm}
SYMBOL ind 1520 1184 R0
SYMATTR InstName L3
SYMATTR Value {2*L}
SYMBOL ind 1744 1184 R0
SYMATTR InstName L4
SYMATTR Value {2*L}
SYMBOL ind 1936 1184 R0
SYMATTR InstName L5
SYMATTR Value {L}
SYMBOL ind 1856 1312 R0
SYMATTR InstName L6
SYMATTR Value {Lm}
SYMBOL cap 1216 1184 R0
SYMATTR InstName C1
SYMATTR Value {C1}
SYMBOL cap 1216 1328 R0
SYMATTR InstName C2
SYMATTR Value {C2}
SYMBOL cap 2064 1184 R0
SYMATTR InstName C3
SYMATTR Value {C1}
SYMBOL cap 2064 1328 R0
SYMATTR InstName C4
SYMATTR Value {C2}
SYMBOL cap 1648 1280 R0
SYMATTR InstName C5
SYMATTR Value {C3}
SYMBOL VOLTAGE 1024 1312 R0
WINDOW 3 25 97 Left 2
SYMATTR Value AC 2
SYMATTR InstName V1
SYMBOL RES 1168 1280 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R}
SYMBOL res 2224 1296 R0
SYMATTR InstName R2
SYMATTR Value {R}
TEXT 1920 1480 Left 2 !.ac oct 1000 10Meg 22Meg
TEXT 1152 1472 Left 2 !.param x=.54 ; trimer postion\n.param R=50\n.param L=2.95u Lm=.27u C1=22p+x*25p C2=240p C3=34p
TEXT 1616 1584 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX42410B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX42410B.asy)
R1 PGOOD N003 20k
C1 N003 0 2.2
L1 N002 vOUT 680n Rser=2m
R3 N004 0 15.8k
XU1 0 0 vIN vIN N002 N001 N003 NC_01 N004 PGOOD N003 NC_02 vOUT MAX42410B ;pnba GND)PGND)EN)SUP)LX)BST)BIAS)SYNCOUT)FB)PGOOD)SYNC)VEA)OUT
Rload vOUT 0 0.33
V1 vIN 0 12
C4 vOUT N004 47p
C2 N001 N002 0.1
C3 vOUT 0 22 m=3 Rser=1m
R2 vOUT N004 49.9k
.tran 4m startup
.lib MAX42410B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1272 680
WIRE 80 -144 64 -144
WIRE 144 -144 80 -144
WIRE 176 -144 144 -144
WIRE 512 -144 464 -144
WIRE 64 -128 64 -144
WIRE 512 -128 512 -144
WIRE 144 -96 144 -144
WIRE 176 -96 144 -96
WIRE 64 -32 64 -48
WIRE 512 -32 512 -64
WIRE 512 -32 464 -32
WIRE 592 -32 512 -32
WIRE 720 -32 672 -32
WIRE 848 -32 720 -32
WIRE 960 -32 848 -32
WIRE 1024 -32 960 -32
WIRE 1056 -32 1024 -32
WIRE 720 -16 720 -32
WIRE 1056 -16 1056 -32
WIRE 848 0 848 -32
WIRE 960 0 960 -32
WIRE 176 16 144 16
WIRE 656 32 720 -32
WIRE 656 32 464 32
WIRE 720 64 720 48
WIRE 1056 80 1056 64
WIRE 848 96 848 80
WIRE 848 96 464 96
WIRE 960 96 960 64
WIRE 960 96 848 96
WIRE 848 128 848 96
WIRE 480 224 464 224
WIRE 848 224 848 208
WIRE 144 272 144 16
WIRE 144 272 64 272
WIRE 176 272 144 272
WIRE 64 288 64 272
WIRE 512 288 464 288
WIRE 608 288 512 288
WIRE 320 352 320 336
WIRE 64 368 64 352
WIRE 144 400 144 272
WIRE 496 400 144 400
WIRE 608 400 608 288
WIRE 608 400 576 400
SYMBOL voltage 64 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL MAX42410B 320 96 R0
SYMATTR InstName U1
SYMBOL res 592 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20k
SYMBOL cap 496 -128 R0
SYMATTR InstName C2
SYMATTR Value 0.1u
SYMBOL res 832 -16 R0
SYMATTR InstName R2
SYMATTR Value 49.9k
SYMBOL res 832 112 R0
SYMATTR InstName R3
SYMATTR Value 15.8k
SYMBOL res 1040 -32 R0
SYMATTR InstName Rload
SYMATTR Value 0.33
SYMBOL ind 576 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 680n
SYMATTR SpiceLine Rser=2m
SYMBOL cap 704 -16 R0
WINDOW 3 43 38 Left 2
WINDOW 123 48 63 Left 2
SYMATTR Value 22u
SYMATTR Value2 m=3
SYMATTR InstName C3
SYMATTR SpiceLine Rser=1m
SYMBOL cap 48 288 R0
SYMATTR InstName C1
SYMATTR Value 2.2u
SYMBOL cap 944 0 R0
SYMATTR InstName C4
SYMATTR Value 47p
FLAG 64 -32 0
FLAG 64 368 0
FLAG 320 352 0
FLAG 720 64 0
FLAG 1056 80 0
FLAG 80 -144 vIN
FLAG 1024 -32 vOUT
FLAG 480 224 0
FLAG 848 224 0
FLAG 512 288 PGOOD
TEXT 648 376 Left 2 !.tran 4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM3223C.asc
* Generated by LTspice 26.0.1 for Windows.
V1 VIA 0 PULSE(0 5 0 2n 2n 5u 10u)
V2 VIB 0 PULSE(5 0 0 2n 2n 5u 10u)
V3 N001 0 5
V5 VDDB 0 12
C3 VOA 0 2n
C5 VOB 0 2n
C1 0 N001 10n
V6 VDDA 0 12
XU1 VIA VIB N001 0 0 0 VOB VDDB 0 VOA VDDA ADuM3223C ;pnba VIA)VIB)VDD1)GND1)DISABLE)GNDB)VOB)VDDB)GNDA)VOA)VDDA
.tran 50u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM3223C.asy)
.lib ADuM3223C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1108 680
WIRE 416 16 368 16
WIRE 672 16 416 16
WIRE 32 32 -560 32
WIRE 64 32 32 32
WIRE 672 48 672 16
WIRE -560 80 -560 32
WIRE 416 80 368 80
WIRE 560 80 416 80
WIRE 32 112 -400 112
WIRE 64 112 32 112
WIRE 560 112 560 80
WIRE 672 128 672 112
WIRE 448 144 368 144
WIRE -176 192 -288 192
WIRE 64 192 -176 192
WIRE -560 224 -560 160
WIRE -400 224 -400 192
WIRE -288 224 -288 192
WIRE 416 224 368 224
WIRE 560 224 416 224
WIRE 560 240 560 224
WIRE -176 272 -176 192
WIRE -160 272 -176 272
WIRE -48 272 -96 272
WIRE 64 272 -48 272
WIRE 448 288 368 288
WIRE -288 336 -288 304
WIRE -48 352 -48 272
WIRE 64 352 -48 352
WIRE 416 352 368 352
WIRE 672 352 416 352
WIRE -48 384 -48 352
WIRE 672 384 672 352
WIRE 672 464 672 448
FLAG -288 336 0
FLAG -48 384 0
FLAG -560 224 0
FLAG -400 224 0
FLAG 672 128 0
FLAG 672 464 0
FLAG 560 320 0
FLAG 416 352 VOB
FLAG 416 16 VOA
FLAG 448 288 0
FLAG 448 144 0
FLAG 560 192 0
FLAG 32 32 VIA
FLAG 32 112 VIB
FLAG 416 80 VDDA
FLAG 416 224 VDDB
SYMBOL voltage -560 64 R0
WINDOW 0 30 80 Left 2
WINDOW 3 22 -14 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 2n 2n 5u 10u)
SYMBOL voltage -400 96 R0
WINDOW 0 32 102 Left 2
WINDOW 3 33 33 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(5 0 0 2n 2n 5u 10u)
SYMBOL voltage -288 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage 560 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 12
SYMBOL cap 656 48 R0
SYMATTR InstName C3
SYMATTR Value 2n
SYMBOL cap 656 384 R0
SYMATTR InstName C5
SYMATTR Value 2n
SYMBOL cap -96 256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL voltage 560 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 12
SYMBOL ADuM3223C 224 112 R0
SYMATTR InstName U1
TEXT 64 440 Left 2 !.tran 50u
* Z:\tmp\asc_dec_bjh7r6w2\1a61542db3d3_Zener_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 N003 1N4007
R3 N004 0 2K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 944 680
WIRE 64 144 -16 144
WIRE 224 144 144 144
WIRE 336 144 288 144
WIRE 464 144 416 144
WIRE 544 144 464 144
WIRE 704 144 544 144
WIRE 864 144 704 144
WIRE 464 176 464 144
WIRE 544 176 544 144
WIRE 704 176 704 144
WIRE 464 272 464 240
WIRE 544 272 544 256
WIRE 544 272 464 272
WIRE 704 272 704 240
WIRE 704 272 544 272
WIRE 704 288 704 272
SYMBOL diode 224 160 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4007
SYMBOL res 528 160 R0
SYMATTR InstName R3
SYMATTR Value 2K
FLAG 704 288 0
* Z:\tmp\asc_dec_bjh7r6w2\0f5459a25319_Fig27_7a_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
M5 vop vop 0 0 N_1u l=2u w=10u
M1 N001 vp N003 0 N_1u l=2u w=10u
M3 vop N001 VDD VDD P_1u l=2u w=30u
VDD VDD 0 5
M7 vom vop 0 0 N_1u l=2u w=12u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1928 680
WIRE 416 -64 416 -96
WIRE 640 -64 640 -96
WIRE 688 -64 688 -176
WIRE 688 -64 640 -64
WIRE 1200 -64 1200 -176
WIRE 1200 -64 688 -64
WIRE 416 -48 416 -64
WIRE 976 -48 976 -80
WIRE 1488 -48 1488 -176
WIRE 1488 -48 976 -48
WIRE 640 16 640 -64
WIRE 976 16 976 -48
WIRE 976 32 976 16
WIRE 640 112 640 96
WIRE 640 144 640 112
WIRE 800 144 640 144
WIRE 976 144 976 112
WIRE 976 144 800 144
WIRE 1152 144 1120 144
WIRE 1168 144 1152 144
WIRE 1248 144 1248 -96
WIRE 1248 144 1168 144
WIRE 1280 144 1248 144
WIRE 1344 144 1280 144
WIRE 1472 144 1424 144
WIRE 1536 144 1536 -96
WIRE 1536 144 1472 144
WIRE 1568 144 1536 144
WIRE 1616 144 1568 144
WIRE 1664 144 1616 144
WIRE 512 160 496 160
WIRE 528 160 512 160
WIRE 592 160 576 160
WIRE 608 160 592 160
WIRE 496 192 496 160
WIRE 576 192 576 160
WIRE 1168 224 1168 144
WIRE 1344 224 1424 144
WIRE 1344 224 1328 224
WIRE 1424 224 1344 144
SYMBOL nmos4 1168 144 M0
WINDOW 123 -18 134 Left 2
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M5
SYMATTR Value N_1u
SYMBOL nmos4 592 16 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M1
SYMATTR Value N_1u
SYMBOL pmos4 1200 -96 M180
WINDOW 0 63 16 Left 2
WINDOW 123 56 100 Left 2
SYMATTR InstName M3
SYMATTR Value2 l=2u w=30u
SYMATTR Value P_1u
SYMBOL voltage 416 -64 R0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL nmos4 1424 144 R0
WINDOW 123 -5 133 Left 2
SYMATTR Value2 l=2u w=12u
SYMATTR InstName M7
SYMATTR Value N_1u
FLAG 416 32 0
FLAG 416 -64 VDD
FLAG 640 -144 VDD
FLAG 288 80 VDD
FLAG 640 64 0
FLAG 976 64 0
FLAG 592 96 vp
FLAG 1024 96 vm
FLAG 512 160 vp
FLAG 592 160 vm
FLAG 1248 -144 VDD
FLAG 1248 -192 VDD
FLAG 1120 192 0
FLAG 1280 192 0
FLAG 1472 192 0
FLAG 1616 192 0
FLAG 1120 240 0
FLAG 1280 240 0
FLAG 1472 240 0
FLAG 1616 240 0
FLAG 1152 144 vop
FLAG 1568 144 vom
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4601A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4601A.asy)
XU1 IN 0 OUT 0 N005 N005 OUT 0 N001 N003 N006 N011 N009 N008 N007 N004 N002 N010 NC_01 N006 LTM4601 ;pnba Vin)PGND)Vout)Vosns-)Vout_LCL)DiffVout)Vosns+)SGND)Pgood)FB)DRVcc)MARG1)MARG0)Fset)MPGM)Comp)Run)Track/SS)PLLIN)INTVcc
C1 OUT N003 100p
R1 N003 0 40.2K
C2 OUT 0 570
V1 IN 0 12
R3 OUT N001 100K
C3 N010 0 .001
R4 IN N002 100K
R2 N007 0 392K
Rload OUT 0 .125
.tran 750u startup
.lib LTM4601.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1032 680
WIRE 432 -32 -160 -32
WIRE -176 -16 -256 -16
WIRE 128 -16 -176 -16
WIRE -256 0 -256 -16
WIRE 128 0 128 -16
WIRE -160 48 -160 -32
WIRE -144 48 -160 48
WIRE 16 48 -64 48
WIRE 432 48 432 -32
WIRE 432 48 400 48
WIRE 592 48 432 48
WIRE 672 48 592 48
WIRE 592 64 592 48
WIRE -256 96 -256 80
WIRE -176 112 -176 -16
WIRE -80 112 -176 112
WIRE 16 112 0 112
WIRE 432 112 400 112
WIRE 496 112 432 112
WIRE 496 128 496 112
WIRE 592 144 592 128
WIRE 16 176 0 176
WIRE 432 176 400 176
WIRE 496 224 496 208
WIRE 16 240 0 240
WIRE 432 240 432 176
WIRE 432 240 400 240
WIRE 672 272 672 48
WIRE 672 272 576 272
WIRE 720 272 672 272
WIRE 720 288 720 272
WIRE 0 304 0 240
WIRE 16 304 0 304
WIRE 576 304 576 272
WIRE 576 304 400 304
WIRE -80 368 -96 368
WIRE 16 368 0 368
WIRE 576 368 400 368
WIRE 576 384 576 368
WIRE 720 384 720 368
WIRE 720 384 576 384
WIRE 720 400 720 384
WIRE 16 432 0 432
WIRE 416 432 400 432
WIRE -64 496 -80 496
WIRE 16 496 0 496
WIRE 416 496 400 496
WIRE 128 576 128 560
WIRE 288 576 288 560
SYMBOL res -160 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res -96 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL res 16 384 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 392K
SYMBOL res 704 272 R0
SYMATTR InstName Rload
SYMATTR Value .125
SYMBOL PowerProducts\\LTM4601A 208 256 R0
SYMATTR InstName U1
SYMBOL voltage -256 -16 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 480 112 R0
SYMATTR InstName R1
SYMATTR Value 40.2K
SYMBOL cap 576 64 R0
SYMATTR InstName C2
SYMATTR Value 570
SYMBOL cap 0 480 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL cap 416 48 R0
WINDOW 0 34 18 Left 2
WINDOW 3 35 47 Left 2
SYMATTR InstName C1
SYMATTR Value 100p
FLAG 128 576 0
FLAG 288 576 0
FLAG 496 224 0
FLAG -96 368 0
FLAG 592 144 0
FLAG 720 400 0
FLAG -256 96 0
FLAG -80 496 0
FLAG 720 272 OUT
FLAG -256 -16 IN
TEXT 472 496 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP5300-3.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N002 OUT 2.2 Rser=80m
C1 OUT 0 10
R2 N003 0 19.6K
R1 OUT N001 1Meg
V1 IN 0 5
Rload OUT 0 40
XU1 IN IN 0 N003 OUT N001 0 0 N002 0 ADP5300-1 OVO=1 OD=1 ;pnba EN)PVin)Sync/Mode)VID)FB)VoutOK)Pgnd)Agnd)SW)Stop
.tran .6m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP5300-3.asy)
.lib ADP5300-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 64 64 64
WIRE 160 64 144 64
WIRE 496 64 416 64
WIRE 608 64 576 64
WIRE 64 80 64 64
WIRE 144 144 144 64
WIRE 160 144 144 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 608 144 608 64
WIRE 608 144 560 144
WIRE 688 144 608 144
WIRE 608 160 608 144
WIRE 688 160 688 144
WIRE 64 176 64 160
WIRE 160 224 144 224
WIRE 560 224 560 144
WIRE 560 224 416 224
WIRE 608 256 608 224
WIRE 688 256 688 240
WIRE 160 304 144 304
WIRE 448 304 416 304
WIRE 544 304 528 304
WIRE 240 384 240 368
WIRE 336 384 336 368
FLAG 544 304 0
FLAG 608 256 0
FLAG 240 384 0
FLAG 64 176 0
FLAG 688 144 OUT
FLAG 688 256 0
FLAG 64 64 IN
FLAG 336 384 0
FLAG 144 304 0
FLAG 144 224 0
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=80m
SYMBOL cap 592 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 432 320 R270
WINDOW 3 0 56 VBottom 2
WINDOW 0 32 56 VTop 2
SYMATTR Value 19.6K
SYMATTR InstName R2
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL voltage 64 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 672 144 R0
SYMATTR Value 40
SYMATTR InstName Rload
SYMBOL ADP5300-3 288 192 R0
SYMATTR InstName U1
TEXT 440 384 Left 2 !.tran .6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6905-96.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6905-96.asy)
V3 N003 0 PWL(0 3 .35u 3 +10n 1.5 .65u 1.5 +10n 0)
V2 N002 0 PULSE(0 3 100n 10n 10n 200n 300n)
V1 N001 0 3
XU1 N001 0 N002 N003 OUT LTC6905-96 ;pnba V+)GND)0E)DIV)OUT
.tran 1u
.lib LTC6905-96.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 680
WIRE 32 160 -80 160
WIRE 288 160 256 160
WIRE -80 176 -80 160
WIRE 32 240 16 240
WIRE -80 272 -80 256
WIRE 32 320 -176 320
WIRE 368 320 256 320
WIRE -176 336 -176 320
WIRE 368 336 368 320
WIRE -176 432 -176 416
WIRE 368 432 368 416
SYMBOL voltage -80 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL LTC6905-96 144 240 R0
SYMATTR InstName U1
SYMBOL voltage -176 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 3 100n 10n 10n 200n 300n)
SYMBOL voltage 368 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(0 3 .35u 3 +10n 1.5 .65u 1.5 +10n 0)
FLAG -80 272 0
FLAG 16 240 0
FLAG -176 432 0
FLAG 368 432 0
FLAG 288 160 OUT
TEXT 576 472 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\55e4ef516e06_exam5_06_PNP.asc
* Generated by LTspice 26.0.1 for Windows.
RB N002 VI 200k
VCC N001 0 5
Q1 VO N002 N001 0 2N3906
VI VI 0 0
RC VO 0 8k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VI 0 5 .01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -16 -128 -16
WIRE 272 128 272 -16
WIRE 96 176 16 176
WIRE 208 176 176 176
WIRE -128 208 -128 -16
WIRE 16 208 16 176
WIRE 272 240 272 224
WIRE 416 240 272 240
WIRE 272 256 272 240
WIRE -128 368 -128 288
WIRE 16 368 16 288
WIRE 16 368 -128 368
WIRE 272 368 272 336
WIRE 272 368 16 368
WIRE 16 400 16 368
IOPIN 416 240 Out
IOPIN 16 176 Out
SYMBOL res 192 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RB
SYMATTR Value 200k
SYMBOL voltage -128 192 R0
WINDOW 0 -21 55 Left 2
WINDOW 3 12 7 Left 2
SYMATTR InstName VCC
SYMATTR Value 5
SYMBOL pnp 208 224 M180
WINDOW 0 50 32 Left 2
WINDOW 3 48 58 Left 2
SYMATTR InstName Q1
SYMATTR Value 2N3906
SYMBOL voltage 16 192 R0
SYMATTR InstName VI
SYMATTR Value 0
SYMBOL res 256 240 R0
SYMATTR InstName RC
SYMATTR Value 8k
FLAG 16 400 0
FLAG 416 240 VO
FLAG 16 176 VI
TEXT -88 24 Left 2 !.dc VI 0 5 .01
* Z:\home\khalils\Downloads\files\data\raw_asc\45499092219c_Draft9.asc
* Generated by LTspice 26.0.1 for Windows.
M1 vout vin 0 0 NMOS l=90nm w=Wn
C1 vout 0 50f
V1 vin 0
M2 N001 vin vout N001 PMOS l=90nm w=Wp
V2 N001 0 1.2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.step param Wn 135nm 225nm 45nm
.step param Wp 405nm 495nm 45nm
.dc V1 0 1.2 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 32 192 32
WIRE 368 32 240 32
WIRE 192 48 192 32
WIRE 368 80 368 32
WIRE 240 96 240 32
WIRE 240 96 192 96
WIRE 144 128 128 128
WIRE 128 144 128 128
WIRE 128 144 16 144
WIRE 16 160 16 144
WIRE 368 176 368 160
WIRE 464 176 368 176
WIRE 192 192 192 144
WIRE 352 192 192 192
WIRE 400 192 352 192
WIRE 464 192 464 176
WIRE 352 208 352 192
WIRE 224 240 192 240
WIRE 400 256 400 192
WIRE 432 256 400 256
WIRE 128 272 128 144
WIRE 144 272 128 272
WIRE 16 288 16 240
WIRE 224 288 224 240
WIRE 224 288 192 288
WIRE 352 304 352 272
WIRE 384 304 352 304
WIRE 192 320 192 288
WIRE 384 320 384 304
IOPIN 432 256 Out
IOPIN 16 144 In
SYMBOL nmos4 144 192 R0
SYMATTR InstName M1
SYMATTR Value2 l=90nm w=Wn
SYMBOL voltage 16 144 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL cap 336 208 R0
SYMATTR InstName C1
SYMATTR Value 50f
SYMBOL pmos4 144 48 R0
SYMATTR InstName M2
SYMATTR Value2 l=90nm w=Wp
SYMBOL voltage 368 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.2
FLAG 192 320 0
FLAG 464 192 0
FLAG 384 320 0
FLAG 432 256 vout
FLAG 16 144 vin
FLAG 16 288 0
TEXT 328 16 Left 2 !.step param Wn 135nm 225nm 45nm
TEXT 416 112 Left 2 !.step param Wp 405nm 495nm 45nm
TEXT -24 24 Left 2 !.dc V1 0 1.2 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\184590ad99d7_connect-logic.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N001 N002 100K
R1 N001 N003 100K
R4 N001 N002 100K
Q1 N002 N003 0 0 NPN
R3 N001 N004 100K
Q2 N002 N004 0 0 NPN
V1 N001 0 5
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 112 112 112
WIRE 320 112 192 112
WIRE 400 112 320 112
WIRE 528 112 400 112
WIRE 320 144 320 112
WIRE 528 144 528 112
WIRE 112 160 112 112
WIRE 192 208 192 112
WIRE 400 208 400 112
WIRE 320 256 320 224
WIRE 352 256 320 256
WIRE 528 256 528 224
WIRE 576 256 528 256
WIRE 112 272 112 240
WIRE 320 272 320 256
WIRE 528 272 528 256
WIRE 192 320 192 288
WIRE 256 320 192 320
WIRE 400 320 400 288
WIRE 464 320 400 320
WIRE 320 400 320 368
WIRE 528 400 528 368
WIRE 352 480 352 256
WIRE 576 480 576 256
WIRE 576 480 352 480
SYMBOL res 384 192 R0
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res 304 128 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL voltage 112 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL npn 256 272 R0
SYMATTR InstName Q1
SYMBOL res 176 192 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 512 128 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL npn 464 272 R0
SYMATTR InstName Q2
FLAG 112 272 0
FLAG 320 400 0
FLAG 192 384 0
FLAG 528 400 0
FLAG 400 384 0
TEXT 528 184 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8584.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8584.asy)
V1 Vbatt 0 4.2
C1 N001 0 100 Rser=10m
C3 N004 0 47n
L1 N003 N001 10 Rser=10m Rpar=5K
L2 N002 0 160 Rser=.1 Rpar=2K
K1 L1 L2 .99
C2 Vpack 0 1
R1 N001 Vbatt 12m
V3 N005 0 PWL(.5m 0 .51m 2)
D1 N002 Vpack MMSD4148
XU1 0 N003 N005 N001 N001 0 0 N004 N001 Vbatt LT8584 ;pnba GND)SW)DCHRG)VSNS)MODE)RTMR)DIN)OUT)VIN)VCELL
V2 Vpack 0 50
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1.5m startup
.lib LT8584.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 900 680
WIRE 96 -112 -16 -112
WIRE 272 -112 96 -112
WIRE 432 -112 320 -112
WIRE 576 -112 496 -112
WIRE 656 -112 576 -112
WIRE 688 -112 656 -112
WIRE 96 -96 96 -112
WIRE 272 -96 272 -112
WIRE 320 -96 320 -112
WIRE 576 -96 576 -112
WIRE 688 -96 688 -112
WIRE 96 -16 96 -32
WIRE 272 0 272 -16
WIRE 272 0 240 0
WIRE 320 0 320 -16
WIRE 576 0 576 -32
WIRE 688 0 688 -16
WIRE 240 32 240 0
WIRE -16 96 -16 -112
WIRE 64 96 -16 96
WIRE 96 96 64 96
WIRE 464 96 384 96
WIRE 464 112 464 96
WIRE -16 192 -16 96
WIRE 96 192 -16 192
WIRE 400 192 384 192
WIRE 464 192 464 176
WIRE -16 288 -16 272
WIRE -16 288 -96 288
WIRE 96 288 -16 288
WIRE 464 288 384 288
WIRE -96 304 -96 288
WIRE 464 304 464 288
WIRE 64 368 64 96
WIRE 96 368 64 368
WIRE 400 368 384 368
WIRE -96 400 -96 384
WIRE 464 400 464 384
WIRE 240 448 240 432
SYMBOL cap 448 112 R0
SYMATTR InstName C3
SYMATTR Value 47n
SYMBOL LT8584 240 240 R0
SYMATTR InstName U1
SYMBOL voltage 688 -112 R0
SYMATTR InstName V2
SYMATTR Value 50
SYMBOL cap 560 -96 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL ind2 336 -112 M0
WINDOW 0 1 33 Right 2
WINDOW 3 0 79 Right 2
SYMATTR InstName L2
SYMATTR Value 160
SYMATTR Type ind
SYMATTR SpiceLine Rser=.1 Rpar=2K
SYMBOL cap 80 -96 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=10m
SYMBOL voltage -96 288 R0
SYMATTR InstName V1
SYMATTR Value 4.2
SYMBOL res -32 176 R0
SYMATTR InstName R1
SYMATTR Value 12m
SYMBOL voltage 464 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PWL(.5m 0 .51m 2)
SYMBOL ind2 256 0 M180
WINDOW 0 0 75 Right 2
WINDOW 3 0 38 Right 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR Type ind
SYMATTR SpiceLine Rser=10m Rpar=5K
SYMBOL diode 432 -128 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value MMSD4148
FLAG 240 448 0
FLAG -96 400 0
FLAG 96 -16 0
FLAG 320 0 0
FLAG 576 0 0
FLAG 688 0 0
FLAG 400 368 0
FLAG 400 192 0
FLAG 464 192 0
FLAG 464 400 0
FLAG -96 288 Vbatt
FLAG 656 -112 Vpack
TEXT 296 -120 Bottom 2 !K1 L1 L2 .99
TEXT 464 448 Left 2 !.tran 1.5m startup