Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1993-4.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1993-4.asy)
V2 N006 0 2.5
XU1 N001 N006 N001 0 N004 N005 N007 N009 0 N001 0 0 N003 N003 N008 N008 LT1993-4 ;pnba VccC)VOCM)VccA)VeeA)+OUT)+OUTFILT)-OUTFILT)-OUT)VeeB)VccB)_EN)VeeC)-INB)-INA)+INB)+INA
V1 N001 0 5
V3 N002 0 SINE(0 1m 1Meg)
C2 N008 0 .1
R5 N003 N008 100
C1 N003 N002 .1
.tran 10u
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1176 680
WIRE 384 -64 -112 -64
WIRE 464 -64 384 -64
WIRE 544 -64 464 -64
WIRE -112 -48 -112 -64
WIRE 384 -48 384 -64
WIRE 464 -48 464 -64
WIRE 544 -48 544 -64
WIRE 624 -48 624 -64
WIRE 144 32 -16 32
WIRE 240 32 208 32
WIRE 320 32 240 32
WIRE -112 48 -112 32
WIRE -16 48 -16 32
WIRE 704 48 672 48
WIRE 240 64 240 32
WIRE 320 64 240 64
WIRE 240 80 240 64
WIRE 704 80 672 80
WIRE 784 128 672 128
WIRE -16 144 -16 128
WIRE 784 144 784 128
WIRE 704 176 672 176
WIRE 240 192 240 160
WIRE 320 192 240 192
WIRE 704 208 672 208
WIRE 144 224 96 224
WIRE 240 224 240 192
WIRE 240 224 208 224
WIRE 320 224 240 224
WIRE 784 240 784 224
WIRE 416 320 416 304
WIRE 496 320 496 304
WIRE 576 320 576 304
SYMBOL cap 208 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL voltage -16 32 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1m 1Meg)
SYMBOL LT1993-4 496 128 R0
SYMATTR InstName U1
SYMBOL res 224 64 R0
SYMATTR InstName R5
SYMATTR Value 100
SYMBOL voltage -112 -64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 208 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage 784 128 R0
SYMATTR InstName V2
SYMATTR Value 2.5
FLAG -16 144 0
FLAG -112 48 0
FLAG 96 224 0
FLAG 416 320 0
FLAG 496 320 0
FLAG 576 320 0
FLAG 624 -64 0
FLAG 784 240 0
TEXT 736 384 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\57e8f3f6da09_mosfet.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Optos\PC817A.asy)
XU1 N001 N004 N002 N005 PC817 Igain=1m ;pnba A)K)C)E
R5 N003 N002 0.001R
Q1 N002 N007 N009 0 BC817-25
M1 N006 N009 0 0 IRL530NS_L
D1 N008 0 NSCW100
R3 N005 N007 1K
R2 N009 0 10K
R1 N003 N006 10
R4 N004 N008 1K
V1 N001 0 PULSE(0 5 0.1 0.001 0.001 0.1 0.3 10)
V2 N003 0 12
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1s startup
.lib PC817.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 240 -240 240
WIRE 384 240 192 240
WIRE 432 240 384 240
WIRE 576 240 512 240
WIRE 784 240 576 240
WIRE 576 272 576 240
WIRE 0 336 -16 336
WIRE 240 336 192 336
WIRE -240 352 -240 240
WIRE 240 352 240 336
WIRE 784 352 784 240
WIRE -16 384 -16 336
WIRE 384 400 384 240
WIRE 576 416 576 352
WIRE -240 448 -240 432
WIRE 240 448 240 432
WIRE 320 448 240 448
WIRE -16 496 -16 464
WIRE 448 496 384 496
WIRE 528 496 448 496
WIRE 448 528 448 496
WIRE 576 640 576 512
SYMBOL res -32 368 R0
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL res 528 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 0.001R
SYMBOL res 432 512 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL LED -32 496 R0
SYMATTR InstName D1
SYMATTR Value NSCW100
SYMBOL Optos/PC817A 96 288 R0
SYMATTR InstName U1
SYMBOL voltage 784 336 R0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL npn 320 400 R0
SYMATTR InstName Q1
SYMATTR Value BC817-25
SYMBOL res 560 256 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL nmos 528 416 R0
SYMATTR InstName M1
SYMATTR Value IRL530NS_L
SYMBOL voltage -240 336 R0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0.1 0.001 0.001 0.1 0.3 10)
SYMBOL res 224 336 R0
SYMATTR InstName R3
SYMATTR Value 1K
FLAG 576 640 0
FLAG 784 432 0
FLAG 448 608 0
FLAG -16 560 0
FLAG -240 448 0
TEXT 696 552 Left 2 !.tran 1s startup
* Z:\home\khalils\Downloads\files\data\raw_asc\280be2dbbd15_circuito_simulacin_T2_normalizado.asc
* Generated by LTspice 26.0.1 for Windows.
XU2 N003 0 N004 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
XU3 N005 0 V3 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R1 N003 N002 0.664
R2 N005 N004 0.391
R3 V3 N001 2.02
R4 N002 N001 0.664
R5 N006 Vin 1
R6 N004 N006 1
C1 N004 N003 1.6
C2 V3 N005 1.6
V1 Vin 0 AC 1
XU1 N001 N006 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
.lib opamp.sub
.ac dec 1000 0.001 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 -48 -32 -48
WIRE 624 -48 320 -48
WIRE -32 0 -32 -48
WIRE 0 0 -32 0
WIRE 96 0 80 0
WIRE 272 32 240 32
WIRE 352 32 336 32
WIRE 528 32 496 32
WIRE 624 32 624 -48
WIRE 624 32 592 32
WIRE -32 96 -32 0
WIRE 0 96 -32 96
WIRE 96 112 96 0
WIRE 96 112 64 112
WIRE 128 112 96 112
WIRE 240 112 240 32
WIRE 240 112 208 112
WIRE 272 112 240 112
WIRE -144 128 -224 128
WIRE -32 128 -64 128
WIRE 0 128 -32 128
WIRE 352 128 352 32
WIRE 352 128 336 128
WIRE 384 128 352 128
WIRE 496 128 496 32
WIRE 496 128 464 128
WIRE 528 128 496 128
WIRE 272 144 256 144
WIRE 624 144 624 32
WIRE 624 144 592 144
WIRE 528 160 512 160
WIRE -224 176 -224 128
WIRE 256 176 256 144
WIRE 512 192 512 160
WIRE -32 256 -32 128
WIRE 80 256 -32 256
WIRE 352 256 352 128
WIRE 352 256 160 256
FLAG 256 176 0
FLAG 512 192 0
FLAG -224 128 Vin
FLAG 624 144 V3
FLAG -224 256 0
SYMBOL OpAmps\\opamp 304 64 R0
SYMATTR InstName U2
SYMBOL OpAmps\\opamp 560 80 R0
SYMATTR InstName U3
SYMBOL res 224 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 0.664
SYMBOL res 480 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 0.391
SYMBOL res 336 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2.02
SYMBOL res 96 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 0.664
SYMBOL res -48 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1
SYMBOL res 176 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 1
SYMBOL cap 336 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1.6
SYMBOL cap 592 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1.6
SYMBOL voltage -224 160 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL OpAmps\\opamp 32 48 R0
SYMATTR InstName U1
TEXT 224 312 Left 2 !.lib opamp.sub
TEXT 224 336 Left 2 !.ac dec 1000 0.001 10
* Z:\home\khalils\Downloads\files\data\raw_asc\2f38ef848fd5_ej1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 AC 1 0
L1 N002 N001 {1/3}
C2 0 N003 {9/2}
C1 N003 N002 {3/4}
C3 N004 N003 {6}
L2 N004 0 {1/6}
.ac dec 1000 0.01 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 48 64 48
WIRE 336 48 240 48
WIRE 512 48 400 48
WIRE 624 48 512 48
WIRE 736 48 688 48
WIRE 512 80 512 48
WIRE 64 128 64 48
WIRE 512 192 512 144
WIRE 64 304 64 208
WIRE 512 304 512 272
WIRE 512 304 64 304
WIRE 736 304 736 48
WIRE 736 304 512 304
SYMBOL ind 496 176 R0
SYMATTR InstName L2
SYMATTR Value {1/6}
SYMBOL cap 400 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {3/4}
SYMBOL cap 688 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {9/2}
SYMBOL voltage 64 112 R0
WINDOW 3 16 126 Left 2
WINDOW 123 16 98 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMBOL cap 528 144 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value {6}
SYMBOL ind 256 32 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value {1/3}
FLAG 64 304 0
TEXT 30 328 Left 2 !.ac dec 1000 0.01 100
* Z:\tmp\asc_dec_bjh7r6w2\1191eb41c862_Draft1_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
M4 P001 N003 N004 N001 PMOS l=90n w=400n
V1 N002 0 PULSE(0 1 1n 10p 10p 2n 4n)
M3 N001 N002 P001 N001 PMOS l=90n w=400n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 -432 288 -432
WIRE 288 -336 288 -432
WIRE 352 -336 288 -336
WIRE 288 -304 288 -336
WIRE 288 -304 272 -304
WIRE 352 -256 352 -336
WIRE 352 -256 272 -256
WIRE 80 -224 -80 -224
WIRE 224 -224 80 -224
WIRE -80 -176 -80 -224
WIRE 352 -160 352 -256
WIRE 352 -160 272 -160
WIRE 224 -64 224 -128
WIRE 224 -64 -80 -64
WIRE 272 -64 272 -112
WIRE 480 -64 272 -64
WIRE -80 0 -80 -64
WIRE 272 0 272 -64
WIRE 224 16 224 -64
WIRE 80 96 80 -224
SYMBOL pmos4 224 -208 R0
WINDOW 123 142 68 Left 2
SYMATTR InstName M4
SYMATTR Value2 l=90n w=400n
SYMBOL voltage -80 -192 R0
WINDOW 3 -370 89 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 1n 10p 10p 2n 4n)
SYMBOL pmos4 224 -304 R0
WINDOW 123 143 71 Left 2
SYMATTR InstName M3
SYMATTR Value2 l=90n w=400n
FLAG -80 -96 0
FLAG 416 -352 0
* Z:\home\khalils\Downloads\files\data\raw_asc\07c7d4dba36e_Fig10_5_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
VSG N001 N002 0
VSD N001 N003 0
M1 N001 N002 N003 N001 P_1u L=1u W=10u
VDD N001 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSD 0 5 1m VSG 0 5 1
.lib cmosedu_models.txt
* Plot Id(M1)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 688
WIRE 320 96 320 80
WIRE 320 192 320 176
WIRE 400 192 320 192
WIRE 448 80 320 80
WIRE 448 112 448 80
WIRE 448 304 448 208
WIRE 672 80 448 80
WIRE 672 160 448 160
WIRE 672 160 672 80
WIRE 672 192 672 160
WIRE 672 304 448 304
WIRE 672 304 672 272
WIRE 848 80 672 80
WIRE 848 160 848 80
WIRE 848 272 848 240
FLAG 848 272 0
SYMBOL voltage 320 80 R0
WINDOW 0 -93 54 Left 0
WINDOW 3 24 104 Invisible 0
SYMATTR InstName VSG
SYMATTR Value 0
SYMBOL voltage 672 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 38 54 Left 0
WINDOW 3 24 104 Invisible 0
SYMATTR InstName VSD
SYMATTR Value 0
SYMBOL pmos4 400 112 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 L=1u W=10u
SYMATTR InstName M1
SYMATTR Value P_1u
SYMBOL voltage 848 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 38 54 Left 0
WINDOW 3 38 82 Left 0
SYMATTR InstName VDD
SYMATTR Value 5
TEXT 384 336 Left 0 !.dc VSD 0 5 1m VSG 0 5 1
TEXT 384 360 Left 0 !.lib cmosedu_models.txt
TEXT 488 56 Left 0 ;Plot Id(M1)
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8648.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8648.asy)
R1 N001 0 10K
V2 -V 0 -2.5
R2 OUT N001 10K
XU1 IN N001 +V -V OUT AD8648 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 2.5
Vin IN 0 SINE(0 1 1Meg)
Rload OUT 0 10K
.tran 10u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 656 -1232 624 -1232
WIRE 144 -1152 144 -1168
WIRE 240 -1152 240 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 656 -1104 656 -1232
WIRE 656 -1104 608 -1104
WIRE 768 -1104 656 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1040 144 -1072
WIRE 240 -1040 240 -1072
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Opamps\\AD8648 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 1Meg)
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 240 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
FLAG 144 -1168 +V
FLAG 144 -1040 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 240 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 240 -1040 0
TEXT 736 -936 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\TwoTau.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 PULSE(-1 1 0 0 0 5m 10m) AC 1
E2 B 0 N001 0 Laplace=1/(1+.001*s)**2
E1 C 0 N001 0 Laplace=exp(-.001*s)/(1+.001*s)**2
R1 N002 N001 1K
C1 N002 0 1
R2 A N002 100K
C2 A 0 .01
;ac oct 10 .001 1MEG
.tran 30m
* This example schematic is supplied for informational/educational purposes only.
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1656 880
WIRE 1056 256 992 256
WIRE 1168 256 1136 256
WIRE 1248 256 1168 256
WIRE 1376 256 1328 256
WIRE 1472 256 1376 256
WIRE 1168 272 1168 256
WIRE 1376 272 1376 256
WIRE 1168 352 1168 336
WIRE 1376 352 1376 336
WIRE 992 384 992 256
WIRE 992 384 400 384
WIRE 400 416 400 384
WIRE 1472 432 1104 432
WIRE 1104 448 1104 432
WIRE 992 464 992 384
WIRE 1056 464 992 464
WIRE 1056 512 1040 512
WIRE 400 528 400 496
WIRE 1040 560 1040 512
WIRE 1104 560 1104 528
WIRE 1472 624 1104 624
WIRE 1104 640 1104 624
WIRE 992 656 992 464
WIRE 1056 656 992 656
WIRE 1056 704 1040 704
WIRE 1040 752 1040 704
WIRE 1104 752 1104 720
FLAG 400 528 0
FLAG 1472 432 B
FLAG 1472 256 A
FLAG 1104 560 0
FLAG 1472 624 C
FLAG 1104 752 0
FLAG 1040 560 0
FLAG 1040 752 0
FLAG 1168 352 0
FLAG 1376 352 0
SYMBOL voltage 400 400 R0
SYMATTR InstName V1
SYMATTR Value PULSE(-1 1 0 0 0 5m 10m) AC 1
SYMBOL e 1104 432 R0
SYMATTR InstName E2
SYMATTR Value Laplace=1/(1+.001*s)**2
SYMBOL e 1104 624 R0
SYMATTR InstName E1
SYMATTR Value Laplace=exp(-.001*s)/(1+.001*s)**2
SYMBOL res 1152 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL cap 1152 272 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 1344 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL cap 1360 272 R0
SYMATTR InstName C2
SYMATTR Value .01
TEXT 536 704 Left 2 !;ac oct 10 .001 1MEG
TEXT 536 648 Left 2 !.tran 30m
TEXT 944 800 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\1b1bbd92b8ac_Draft4.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 vin vout N001 PMOS l=180nm w=810nm
M2 vout vin 0 0 NMOS l=180nm w=270nm
V1 vin 0 PULSE(0 1.8 0 0.1n 0.1n 10n 20n)
V2 N001 0 1.8
C1 vout 0 50f
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 80n 0 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 48 112 48
WIRE 304 48 208 48
WIRE 304 64 304 48
WIRE 208 96 208 48
WIRE 208 96 112 96
WIRE 64 128 -48 128
WIRE -48 144 -48 128
WIRE 112 176 112 144
WIRE 240 176 112 176
WIRE 240 192 240 176
WIRE 112 208 112 176
WIRE 208 256 112 256
WIRE 64 288 64 128
WIRE 208 304 208 256
FLAG -48 224 0
FLAG 112 304 0
FLAG 240 256 0
FLAG 208 304 0
FLAG 304 144 0
FLAG 240 176 vout
IOPIN 240 176 Out
FLAG -48 128 vin
IOPIN -48 128 In
SYMBOL pmos4 64 48 R0
SYMATTR InstName M1
SYMATTR Value2 l=180nm w=810nm
SYMBOL nmos4 64 208 R0
SYMATTR InstName M2
SYMATTR Value2 l=180nm w=270nm
SYMBOL voltage -48 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1.8 0 0.1n 0.1n 10n 20n)
SYMBOL voltage 304 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.8
SYMBOL cap 224 192 R0
SYMATTR InstName C1
SYMATTR Value 50f
TEXT -136 328 Left 2 !.tran 0 80n 0 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4891-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4891-3.asy)
XU1 IN N001 +V -V OUT NC_01 ADA4891-3 ;pnba In+)In-)V+)V-)OUT)SHDN
R2 OUT N001 10K
R1 N001 0 10K
Vin IN 0 SINE(0 1 10K)
Rload OUT 0 10K
V2 -V 0 -2.5
V1 +V 0 2.5
.tran 1m
.lib ADA4891-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 656 -1216 624 -1216
WIRE 160 -1152 144 -1152
WIRE 272 -1152 256 -1152
WIRE 576 -1152 560 -1152
WIRE 144 -1136 144 -1152
WIRE 256 -1136 256 -1152
WIRE 560 -1136 560 -1152
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 656 -1104 656 -1216
WIRE 656 -1104 608 -1104
WIRE 768 -1104 656 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 560 -1056 560 -1072
WIRE 576 -1056 560 -1056
WIRE 144 -1040 144 -1056
WIRE 256 -1040 256 -1056
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 256 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL ADA4891-3 576 -1088 R0
WINDOW 0 20 -34 Left 2
WINDOW 3 36 4 Left 2
SYMATTR InstName U1
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 144 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
FLAG 144 -1152 +V
FLAG 144 -1040 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1152 +V
FLAG 256 -1152 -V
FLAG 576 -1056 -V
FLAG 416 -1216 0
FLAG 768 -992 0
FLAG 256 -1040 0
TEXT 752 -936 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ad5e31063f54_step-up.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N002 0 5
M1 N003 N001 0 0 PMOS
C1 N004 0 100m
V2 N001 NC_01 PULSE(0 5 0 1m 1m 20m 30m 20)
R1 N004 0 10
D1 N003 N004 D
L1 N003 N002 1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE -240 -304 -304 -304
WIRE -288 -48 -416 -48
WIRE -96 -48 -208 -48
WIRE -16 -48 -96 -48
WIRE 96 -48 48 -48
WIRE 240 -48 96 -48
WIRE -416 32 -416 -48
WIRE 240 32 240 -48
WIRE -96 48 -96 -48
WIRE 96 48 96 -48
WIRE -304 128 -304 -304
WIRE -144 128 -304 128
WIRE -416 208 -416 112
WIRE -96 208 -96 144
WIRE -96 208 -416 208
WIRE 96 208 96 112
WIRE 96 208 -96 208
WIRE 240 208 240 112
WIRE 240 208 96 208
WIRE -416 240 -416 208
SYMBOL ind -192 -64 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL voltage -416 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL diode -16 -32 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL pmos -144 48 R0
SYMATTR InstName M1
SYMBOL res 224 16 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL cap 80 48 R0
SYMATTR InstName C1
SYMATTR Value 100m
SYMBOL voltage -240 -320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1m 1m 20m 30m 20)
FLAG -416 240 0
TEXT -450 264 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\09c312f8d56d_AD8092.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8092.asy)
V1 +V 0 5
Vin IN 0 SINE(0 1 10Meg)
XU1 IN N001 +V -V OUT AD8092 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -5
R1 N001 0 1K
R2 OUT N001 1K
Rload OUT 0 2K
.tran 1u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 400 -1184 384 -1184
WIRE 496 -1184 480 -1184
WIRE 512 -1184 496 -1184
WIRE 608 -1184 592 -1184
WIRE 160 -1088 160 -1104
WIRE 256 -1088 256 -1104
WIRE 496 -1072 496 -1184
WIRE 512 -1072 496 -1072
WIRE 608 -1056 608 -1184
WIRE 608 -1056 576 -1056
WIRE 720 -1056 608 -1056
WIRE 512 -1040 400 -1040
WIRE 720 -1040 720 -1056
WIRE 400 -1024 400 -1040
WIRE 160 -992 160 -1008
WIRE 256 -992 256 -1008
WIRE 720 -944 720 -960
WIRE 400 -928 400 -944
SYMBOL voltage 160 -1104 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 496 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL Opamps\\AD8092 544 -1120 R0
SYMATTR InstName U1
SYMBOL voltage 400 -1040 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10Meg)
SYMBOL res 608 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 704 -1056 R0
SYMATTR InstName Rload
SYMATTR Value 2K
SYMBOL voltage 256 -1104 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
FLAG 400 -928 0
FLAG 720 -1056 OUT
FLAG 400 -1040 IN
FLAG 544 -1088 +V
FLAG 544 -1024 -V
FLAG 384 -1184 0
FLAG 720 -944 0
FLAG 160 -1104 +V
FLAG 160 -992 0
FLAG 256 -1104 -V
FLAG 256 -992 0
TEXT 752 -848 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\60c0ae729597_2SC5706_Ouput_Characteristic_Curve.asc
* Generated by LTspice 26.0.1 for Windows.
* https://www.youtube.com/watch?v=7WWJ2kfJ3oc
Vcc N001 0 0
Rc N001 Vce 2
Q1 Vce N002 0 0 2SC5706
Vb N002 0 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Vcc 0 12 .5 Vb .5 1 .02
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1232 680
WIRE 448 16 256 16
WIRE 256 32 256 16
WIRE 256 128 256 112
WIRE 320 128 256 128
WIRE 256 144 256 128
WIRE 448 144 448 16
WIRE 192 192 32 192
WIRE 32 240 32 192
WIRE 448 240 448 224
WIRE 256 272 256 240
WIRE 32 336 32 320
SYMBOL voltage 448 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 0
SYMBOL res 240 16 R0
SYMATTR InstName Rc
SYMATTR Value 2
SYMBOL voltage 32 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vb
SYMATTR Value 0
SYMBOL npn 192 144 R0
SYMATTR InstName Q1
SYMATTR Value 2SC5706
FLAG 256 272 0
FLAG 448 240 0
FLAG 32 336 0
FLAG 320 128 Vce
TEXT 144 336 Left 2 !.dc Vcc 0 12 .5 Vb .5 1 .02
TEXT 584 16 Left 2 ;https://www.youtube.com/watch?v=7WWJ2kfJ3oc
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7172-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7172-5.0.asy)
C1 OUT 0 4.7 Rser=1.5m
C2 N001 0 1n
Rload OUT 0 4
V1 IN 0 5.5
XU1 IN OUT IN N001 OUT 0 ADM7172-5.0 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 5m startup
.lib ADM7172-5.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL ADM7172-5.0 224 128 R0
SYMATTR InstName U1
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 4
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 5m startup