Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4600HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4600HV.asy)
V1 IN 0 7
R1 N004 0 67K
XU1 N001 N006 N002 N003 N005 N007 N008 N004 0 0 OUT IN LTM4600HV ;pnba Fset)SVin)EXTVcc)FCB)Run)Comp)PwrGD)Voset)SGND)PGND)Vout)Vin
Rload OUT 0 .15
R2 OUT N008 100K
.tran 2.2m startup
.lib LTM4600HV.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1260 692
WIRE 384 64 176 64
WIRE 176 80 176 64
WIRE 384 80 384 64
WIRE 512 80 512 64
WIRE 272 128 256 128
WIRE 768 128 624 128
WIRE 816 128 768 128
WIRE 816 144 816 128
WIRE 176 176 176 160
WIRE 272 176 256 176
WIRE 640 176 624 176
WIRE 736 176 720 176
WIRE 272 224 256 224
WIRE 640 224 624 224
WIRE 816 240 816 224
WIRE 272 272 256 272
WIRE 640 272 624 272
WIRE 768 272 768 128
WIRE 768 272 720 272
WIRE 384 336 384 320
WIRE 512 336 512 320
SYMBOL res 800 128 R0
SYMATTR InstName Rload
SYMATTR Value .15
SYMBOL voltage 176 64 R0
WINDOW 0 23 25 Left 2
WINDOW 3 30 90 Left 2
SYMATTR InstName V1
SYMATTR Value 7
SYMBOL res 736 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL res 624 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 67K
SYMBOL PowerProducts\\LTM4600HV 448 192 R0
SYMATTR InstName U1
FLAG 176 176 0
FLAG 384 336 0
FLAG 512 336 0
FLAG 816 240 0
FLAG 736 176 0
FLAG 176 64 IN
FLAG 816 128 OUT
TEXT 736 336 Left 2 !.tran 2.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2108-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2108-3.0.asy)
Rload OUT 0 8
XU1 IN IN N001 OUT 0 ADP2108-x.x Rtop=400K ;pnba Vin)EN)SW)FB)GND
V1 IN 0 5
L1 N001 OUT 1
C1 OUT 0 10
.tran .5m startup
.lib ADP2108-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 144
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 8
SYMBOL ADP2108-3.0 352 224 R0
SYMATTR InstName U1
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
TEXT 568 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\waveout.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
B1 SYN 0 V=2*V(a)*V(b)*V(c)
V2 A 0 SINE(0 .4 20 10m)
V3 B 0 SIN(0 1 455)
V4 C 0 PWL(0 0 10m 0 11m 1 440m 1 480m 0)
.tran .5
.wave .\ring.wav 8 11025 V(syn) ; This means save node V(syn) as a .wav file, 8 bit resolution, 11025 samples per second
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2680 864
WIRE 1008 560 1008 512
WIRE 1360 560 1360 512
WIRE 1664 560 1664 512
WIRE 2368 560 2368 512
WIRE 1008 688 1008 640
WIRE 1360 688 1360 640
WIRE 1664 688 1664 640
WIRE 2368 688 2368 640
SYMBOL voltage 1360 544 R0
SYMATTR InstName V3
SYMATTR Value SIN(0 1 455)
SYMBOL VOLTAGE 1008 544 R0
WINDOW 39 0 0 Left 2
WINDOW 123 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 .4 20 10m)
SYMBOL voltage 1664 544 R0
WINDOW 39 24 117 Left 2
WINDOW 123 24 138 Left 2
SYMATTR InstName V4
SYMATTR Value PWL(0 0 10m 0 11m 1 440m 1 480m 0)
SYMBOL BV 2368 544 R0
SYMATTR InstName B1
SYMATTR Value V=2*V(a)*V(b)*V(c)
FLAG 1008 688 0
FLAG 1360 688 0
FLAG 1008 512 A
FLAG 1360 512 B
FLAG 2368 688 0
FLAG 1664 688 0
FLAG 1664 512 C
FLAG 2368 512 SYN
TEXT 992 744 Left 2 !.tran .5
TEXT 960 784 Left 2 !.wave .\\ring.wav 8 11025 V(syn) ; This means save node V(syn) as a .wav file, 8 bit resolution, 11025 samples per second
TEXT 1680 840 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\c8940168ac7b_inverter.asc
* Generated by LTspice 26.0.1 for Windows.
V1 VDD 0 1.2
M2 Vout Vin VDD VDD p_65 l=65n w=2u
M1 Vout Vin 0 0 n_65 l=65n w=1u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include 65nm_bulk.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 400 224 400 176
WIRE 416 224 400 224
WIRE 352 240 304 240
WIRE 656 240 656 208
WIRE 416 272 416 224
WIRE 416 272 400 272
WIRE 304 368 304 240
WIRE 304 368 288 368
WIRE 400 368 400 320
WIRE 416 368 400 368
WIRE 400 416 400 368
WIRE 416 464 400 464
WIRE 304 496 304 368
WIRE 352 496 304 496
WIRE 416 512 416 464
WIRE 416 512 400 512
WIRE 400 544 400 512
IOPIN 288 368 In
IOPIN 416 368 Out
SYMBOL pmos4 352 320 M180
WINDOW 123 56 50 Left 2
SYMATTR InstName M2
SYMATTR Value p_65
SYMATTR Value2 l=65n w=2u
SYMBOL nmos4 352 416 R0
WINDOW 123 56 94 Left 2
SYMATTR InstName M1
SYMATTR Value n_65
SYMATTR Value2 l=65n w=1u
SYMBOL Voltage 656 224 R0
SYMATTR InstName V1
SYMATTR Value 1.2
FLAG 400 544 0
FLAG 400 176 VDD
FLAG 656 208 VDD
FLAG 656 320 0
FLAG 288 368 Vin
FLAG 416 368 Vout
TEXT -64 80 Left 2 !.include 65nm_bulk.txt
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3048-15.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3048-15.asy)
L1 IN N002 10 Rser=.2
XU1 N002 IN 0 N003 OUT N001 IN N001 LT3048-15 ;pnba SW)Vin)GND)BYP)LDOOUT)LDOIN)EN)BSTOUT
C2 OUT N003 .1n
C1 N001 0 4.7
C3 OUT 0 1 Rser=10m
Rload OUT 0 750
V1 IN 0 3.2
.tran 2.5m startup
.lib LT3048-15.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 48 256 48
WIRE 464 48 416 48
WIRE 256 64 256 48
WIRE 464 64 464 48
WIRE 112 128 80 128
WIRE 416 128 416 48
WIRE 416 128 400 128
WIRE 464 144 464 128
WIRE 80 224 80 208
WIRE 80 224 -32 224
WIRE 112 224 80 224
WIRE 448 224 400 224
WIRE 528 224 448 224
WIRE 608 224 528 224
WIRE -32 240 -32 224
WIRE 448 240 448 224
WIRE 528 240 528 224
WIRE 608 240 608 224
WIRE 80 320 80 224
WIRE 112 320 80 320
WIRE 448 320 448 304
WIRE 448 320 400 320
WIRE -32 336 -32 320
WIRE 528 336 528 304
WIRE 608 336 608 320
WIRE 256 400 256 384
SYMBOL voltage -32 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3.2
SYMBOL ind 96 224 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=.2
SYMBOL res 592 224 R0
SYMATTR InstName Rload
SYMATTR Value 750
SYMBOL cap 512 240 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMATTR SpiceLine Rser=10m
SYMBOL cap 448 64 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL PowerProducts\\LT3048-15 256 224 R0
SYMATTR InstName U1
SYMBOL cap 432 240 R0
SYMATTR InstName C2
SYMATTR Value .1n
FLAG 256 400 0
FLAG -32 336 0
FLAG 464 144 0
FLAG 528 336 0
FLAG 608 336 0
FLAG -32 224 IN
FLAG 608 224 OUT
TEXT 432 384 Left 2 !.tran 2.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\17cb0f6cf0e3_current-sensing-common-mode.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N001 N004 N006 0 N003 LM358 ;pnba In+)In-)V+)V-)OUT
V1 N002 0 {Vs}
R1 N002 N005 0.1
R2 N005 0 10
V2 N006 0 7
R3 N002 N001 200
R4 N005 N004 200
Q1 N001 N003 N007 0 KT940A
R5 N007 0 200
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.inc LM358.101
.tran 1ms
.STEP param Vs 0 7 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 496 32 272 32
WIRE 112 48 -112 48
WIRE -112 80 -112 48
WIRE 112 80 112 48
WIRE 176 80 112 80
WIRE 272 80 272 32
WIRE 272 80 256 80
WIRE 496 80 496 32
WIRE 112 96 112 80
WIRE 336 96 336 80
WIRE 272 112 272 80
WIRE 304 112 272 112
WIRE 432 128 368 128
WIRE 304 144 272 144
WIRE -112 176 -112 160
WIRE 112 192 112 176
WIRE 176 192 112 192
WIRE 272 192 272 144
WIRE 272 192 256 192
WIRE 336 208 336 160
WIRE 496 224 496 176
WIRE 112 256 112 192
WIRE 336 304 336 288
WIRE 496 320 496 304
WIRE 112 352 112 336
FLAG -112 176 0
FLAG 112 352 0
FLAG 336 304 0
FLAG 336 80 0
FLAG 496 320 0
SYMBOL Opamps\\opamp2 336 192 M180
SYMATTR InstName U1
SYMATTR Value LM358
SYMBOL voltage -112 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value {Vs}
SYMBOL res 96 80 R0
SYMATTR InstName R1
SYMATTR Value 0.1
SYMBOL res 96 240 R0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL voltage 336 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 7
SYMBOL res 160 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 200
SYMBOL res 160 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 200
SYMBOL npn 432 80 R0
SYMATTR InstName Q1
SYMATTR Value KT940A
SYMBOL res 480 208 R0
SYMATTR InstName R5
SYMATTR Value 200
TEXT -216 272 Left 2 !.inc LM358.101
TEXT -200 312 Left 2 !.tran 1ms
TEXT -224 352 Left 2 !.STEP param Vs 0 7 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17553C.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17553C.asy)
R6 N005 0 49.9k
R1 vIN N002 3.32Meg
V1 vIN 0 24
R7 N006 0 118k
R2 N002 0 287k
XU1 0 vIN N002 N004 N005 N001 N003 N006 MAX17553C ;pnba GND)IN)EN/UV)HYST)FB/VO)LX)_RESET)RT
R5 vOUT N005 698k
R4 vOUT N003 100k
Rload vOUT 0 240
C2 vOUT 0 4.7
L1 N001 vOUT 220 Rser=3.7
R3 N002 N004 953k
.tran 4m startup
.lib MAX17553C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 992 680
WIRE -176 -32 -192 -32
WIRE 48 -32 -176 -32
WIRE 176 -32 48 -32
WIRE 512 -32 464 -32
WIRE 624 -32 592 -32
WIRE 704 -32 624 -32
WIRE 768 -32 704 -32
WIRE 864 -32 768 -32
WIRE 896 -32 864 -32
WIRE 48 -16 48 -32
WIRE 624 -16 624 -32
WIRE 768 -16 768 -32
WIRE 896 -16 896 -32
WIRE -192 16 -192 -32
WIRE 624 64 624 48
WIRE 896 80 896 64
WIRE 48 96 48 64
WIRE 48 96 -64 96
WIRE 176 96 48 96
WIRE -64 112 -64 96
WIRE 48 112 48 96
WIRE -192 128 -192 96
WIRE 512 128 464 128
WIRE 704 128 704 -32
WIRE 704 128 592 128
WIRE -64 224 -64 192
WIRE 48 224 48 192
WIRE 176 224 48 224
WIRE 768 224 768 64
WIRE 768 224 464 224
WIRE 768 256 768 224
WIRE 176 320 48 320
WIRE 48 336 48 320
WIRE 768 352 768 336
WIRE 320 384 320 368
WIRE 48 432 48 416
SYMBOL res 752 240 R0
SYMATTR InstName R6
SYMATTR Value 49.9k
SYMBOL res 880 -32 R0
SYMATTR InstName Rload
SYMATTR Value 240
SYMBOL ind 496 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 220
SYMATTR SpiceLine Rser=3.7
SYMBOL res 32 320 R0
SYMATTR InstName R7
SYMATTR Value 118k
SYMBOL res 32 96 R0
SYMATTR InstName R3
SYMATTR Value 953k
SYMBOL MAX17553C 320 144 R0
SYMATTR InstName U1
SYMBOL voltage -192 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 3.32Meg
SYMBOL res 608 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL cap 608 -16 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL res 752 -32 R0
SYMATTR InstName R5
SYMATTR Value 698k
SYMBOL res -80 96 R0
SYMATTR InstName R2
SYMATTR Value 287k
FLAG -192 128 0
FLAG 320 384 0
FLAG 624 64 0
FLAG 896 80 0
FLAG 768 352 0
FLAG -176 -32 vIN
FLAG 864 -32 vOUT
FLAG -64 224 0
FLAG 48 432 0
TEXT 480 392 Left 2 !.tran 4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1210.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
R1 N002 N001 845
R2 N001 0 274
V3 IN 0 SINE(0 2.5 1K)
XU1 IN N001 +V -V N002 NC_01 LT1210 ;pnba In+)In-)V+)V-)OUT)CMP
R3 OUT N002 11
Rload OUT 0 100
.tran 3m
* Twisted Pair Driver
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1210.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 32 16 32
WIRE 128 32 112 32
WIRE 192 32 128 32
WIRE 320 32 272 32
WIRE -208 96 -208 80
WIRE -80 96 -80 80
WIRE 192 128 192 112
WIRE 128 176 128 32
WIRE 160 176 128 176
WIRE -208 192 -208 176
WIRE -80 192 -80 176
WIRE 320 208 320 32
WIRE 320 208 304 208
WIRE 336 208 320 208
WIRE 448 208 416 208
WIRE 448 224 448 208
WIRE 160 240 -16 240
WIRE -16 256 -16 240
WIRE 192 304 192 288
WIRE 448 320 448 304
WIRE -16 352 -16 336
FLAG -80 192 0
FLAG 192 112 +V
FLAG -80 80 +V
FLAG 192 304 -V
FLAG -208 192 0
FLAG -208 80 -V
FLAG 16 32 0
FLAG -16 352 0
FLAG 448 320 0
FLAG 448 208 OUT
FLAG -16 240 IN
SYMBOL voltage -80 80 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -208 80 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 288 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 845
SYMBOL res 128 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 274
SYMBOL voltage -16 240 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 2.5 1K)
SYMBOL opamps\\LT1210 192 208 R0
SYMATTR InstName U1
SYMBOL res 432 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 11
SYMBOL res 432 208 R0
SYMATTR InstName Rload
SYMATTR Value 100
TEXT 280 368 Left 2 !.tran 3m
TEXT 256 -32 Bottom 2 ;Twisted Pair Driver
* Z:\tmp\asc_dec_bjh7r6w2\0ae6818a79de_Fig16_38_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
M10 N006 Inm 0 0 N_50n l=50n w=500n
M7 Outp N002 VDD VDD P_50n l=50n w=1u
M9 Outp N002 N005 0 N_50n l=50n w=500n
M3 Outp N001 VDD VDD P_50n l=50n w=1u
Vclock clock 0 PULSE 0 1 0 10p 10p 5n 10n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1748 680
WIRE 240 -384 240 -416
WIRE 240 -240 240 -272
WIRE 240 -128 240 -160
WIRE 368 -384 368 -416
WIRE 368 -256 368 -288
WIRE 368 -144 368 -176
WIRE 528 -336 528 -560
WIRE 672 -336 528 -336
WIRE 720 -464 720 -480
WIRE 720 -448 656 -448
WIRE 720 -448 720 -464
WIRE 720 -432 720 -448
WIRE 720 -416 720 -432
WIRE 720 -272 720 -320
WIRE 800 -560 768 -560
WIRE 800 -464 720 -464
WIRE 800 -432 720 -432
WIRE 880 -560 800 -464
WIRE 880 -464 800 -560
WIRE 896 -192 800 -432
WIRE 912 -560 880 -560
WIRE 912 -432 800 -192
WIRE 912 -336 672 -336
WIRE 912 -192 896 -192
WIRE 960 -464 880 -464
WIRE 960 -464 960 -480
WIRE 960 -448 960 -464
WIRE 960 -432 912 -432
WIRE 960 -432 960 -448
WIRE 960 -416 960 -432
WIRE 960 -272 960 -320
WIRE 960 -144 960 -176
WIRE 1040 -448 960 -448
WIRE 1056 -64 1008 -64
WIRE 1088 -448 1040 -448
WIRE 1088 -448 1088 -480
WIRE 1088 -64 1056 -64
WIRE 1136 -336 912 -336
WIRE 1136 -336 1136 -560
WIRE 1264 -288 1264 -352
WIRE 1632 -192 1264 -288
SYMBOL nmos4 1008 -144 M0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M10
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL pmos4 1136 -480 R180
WINDOW 0 56 32 Invisible 0
WINDOW 3 56 72 Invisible 0
SYMATTR InstName M7
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL nmos4 912 -416 R0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M9
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL pmos4 912 -480 M180
WINDOW 0 56 32 Invisible 0
WINDOW 3 56 72 Invisible 0
SYMATTR InstName M3
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL voltage 368 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -83 163 Left 0
SYMATTR Value PULSE 0  1 0 10p 10p 5n 10n
SYMATTR InstName Vclock
FLAG 240 -384 0
FLAG 720 -528 VDD
FLAG 960 -528 VDD
FLAG 720 -576 VDD
FLAG 960 -576 VDD
FLAG 960 -224 0
FLAG 720 -224 0
FLAG 368 -384 0
FLAG 240 -128 0
FLAG 240 -272 Inp
FLAG 368 -144 0
FLAG 368 -288 clock
FLAG 1088 -528 VDD
FLAG 1088 -576 VDD
FLAG 720 -368 0
FLAG 960 -368 0
FLAG 960 -96 0
FLAG 960 -48 0
FLAG 1056 -64 Inm
FLAG 1040 -448 Outp
FLAG 1264 -400 Outp
* Z:\home\khalils\Downloads\files\data\raw_asc\09a944ab809e_Fig11_4_long.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Vout and Id(M1)
* 10/1
* 10/1
Vin Vin 0 0
M1 Vout Vin 0 0 N_1u l=1u w=10u
VDD VDD 0 5
M2 Vout Vin VDD VDD P_1u l=1u w=10u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vin 0 5
.include cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 680
WIRE 192 -368 192 -384
WIRE 192 -352 192 -368
WIRE 448 -304 448 -352
WIRE 400 -288 368 -288
WIRE 192 -240 192 -272
WIRE 320 -176 304 -176
WIRE 368 -176 368 -288
WIRE 368 -176 320 -176
WIRE 448 -176 448 -208
WIRE 624 -176 448 -176
WIRE 656 -176 624 -176
WIRE 208 -96 208 -112
WIRE 368 -96 368 -176
WIRE 400 -96 368 -96
WIRE 448 -32 448 -80
WIRE 208 0 208 -16
SYMBOL pmos4 400 -208 M180
WINDOW 0 88 9 Right 2
WINDOW 3 168 20 Right 2
WINDOW 123 206 76 Right 2
SYMATTR InstName M2
SYMATTR Value P_1u
SYMATTR Value2 l=1u w=10u
SYMBOL voltage 208 -112 R0
WINDOW 0 -72 21 Left 2
WINDOW 3 -60 74 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vin
SYMATTR Value 0
SYMBOL nmos4 400 -176 R0
WINDOW 0 104 24 Right 2
WINDOW 3 179 41 Right 2
WINDOW 123 213 74 Right 2
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=1u w=10u
SYMBOL voltage 192 -368 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VDD
SYMATTR Value 5
FLAG 208 0 0
FLAG 624 -176 Vout
FLAG 208 -112 Vin
FLAG 448 -128 0
FLAG 192 -240 0
FLAG 192 -368 VDD
FLAG 448 -256 VDD
FLAG 448 -32 0
FLAG 448 -352 VDD
FLAG 320 -176 Vin
TEXT 264 8 Left 2 !.dc Vin 0 5
TEXT 264 32 Left 2 !.include cmosedu_models.txt
TEXT 496 -360 Left 2 ;Plot Vout and Id(M1)
TEXT 344 -320 Left 2 ;10/1
TEXT 344 -72 Left 2 ;10/1
* Z:\home\khalils\Downloads\files\data\raw_asc\51d495ba1ff3_NOR.asc
* Generated by LTspice 26.0.1 for Windows.
V3 Vin2 0 PULSE(0 1.8 0 .1n .1n 20n 40n)
V1 N001 0 1.8
M2 Vout Vin2 0 0 NMOS l=180nm w=270nm
M1 Vout Vin1 0 0 NMOS l=180nm w=270nm
C1 Vout 0 50f
V2 Vin1 0 PULSE(0 1.8 0 .1n .1n 10n 20n)
M3 N001 Vin1 N003 N002 PMOS l=180nm w=810nm
M4 N003 Vin2 Vout N001 PMOS l=180nm w=810nm
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 100n 0 0.01n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 -112 256 -112
WIRE 544 -112 288 -112
WIRE 256 -64 256 -96
WIRE 208 -32 0 -32
WIRE 0 -16 0 -32
WIRE 0 -16 -144 -16
WIRE -144 0 -144 -16
WIRE 256 16 256 -16
WIRE 288 64 288 -112
WIRE 288 64 256 64
WIRE 208 96 192 96
WIRE 192 128 192 96
WIRE 336 128 192 128
WIRE 256 144 256 112
WIRE 576 144 256 144
WIRE 256 160 256 144
WIRE 256 160 128 160
WIRE 400 160 256 160
WIRE 160 208 128 208
WIRE 432 208 400 208
WIRE 0 240 0 -16
WIRE 80 240 0 240
WIRE 336 240 336 128
WIRE 352 240 336 240
WIRE 160 272 160 208
WIRE 128 288 128 256
WIRE 400 288 400 256
WIRE 336 320 336 240
WIRE 336 320 -112 320
WIRE -112 336 -112 320
IOPIN 576 144 Out
IOPIN -144 -16 In
IOPIN -112 320 In
SYMBOL nmos4 80 160 R0
SYMATTR InstName M1
SYMATTR Value2 l=180nm w=270nm
SYMBOL pmos4 208 -112 R0
SYMATTR InstName M3
SYMATTR Value2 l=180nm w=810nm
SYMBOL voltage 544 -128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL voltage -144 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1.8 0 .1n .1n 10n 20n)
SYMBOL voltage -112 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 1.8 0 .1n .1n 20n 40n)
SYMBOL pmos4 208 16 R0
SYMATTR InstName M4
SYMATTR Value2 l=180nm w=810nm
SYMBOL cap 560 144 R0
SYMATTR InstName C1
SYMATTR Value 50f
SYMBOL nmos4 352 160 R0
SYMATTR InstName M2
SYMATTR Value2 l=180nm w=270nm
FLAG 400 288 0
FLAG 128 288 0
FLAG 576 208 0
FLAG 544 -32 0
FLAG -144 80 0
FLAG -112 416 0
FLAG 576 144 Vout
FLAG -144 -16 Vin1
FLAG -112 320 Vin2
FLAG 432 208 0
FLAG 160 272 0
TEXT 128 480 Left 2 !.tran 0 100n 0 0.01n
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG736.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:\n \nCrosstalk = -60 dB Only
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG736.asy)
V2 vS1A 0 3
R1 vD1 0 301
C1 vD1 0 36p
XU1 0 N001 vIN1 0 vD1 vS1A vS1B NC_01 NC_02 0 ADG736 ;pnba GND)VDD)IN1)IN2)D1)S1A)S1B)D2)S2A)S2B
V3 vS1B 0 0
V4 vIN1 0 PULSE(0 3.3 0 1n 1n 100u 200u)
V1 N001 0 {Vdd}
.tran 1m
.param Vdd = 5
.lib ADG736.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2244 1360
WIRE 944 -336 896 -336
WIRE 1088 -336 1024 -336
WIRE 1088 -224 1088 -336
WIRE 784 -160 752 -160
WIRE 928 -160 864 -160
WIRE 976 -160 928 -160
WIRE 1264 -128 1200 -128
WIRE 1312 -128 1264 -128
WIRE 1408 -128 1312 -128
WIRE 640 -96 592 -96
WIRE 928 -96 720 -96
WIRE 976 -96 928 -96
WIRE 1312 -48 1312 -128
WIRE 928 -32 768 -32
WIRE 976 -32 928 -32
WIRE 1408 -32 1408 -128
WIRE 768 0 768 -32
WIRE 976 96 944 96
WIRE 768 112 768 80
WIRE 1312 112 1312 32
WIRE 1408 112 1408 32
WIRE 976 160 944 160
WIRE 1088 352 1088 320
RECTANGLE Normal 768 -432 16 -720 2
SYMBOL voltage 736 -96 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 0
SYMBOL ADG736 1072 -80 R0
SYMATTR InstName U1
SYMBOL res 1296 -64 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage 768 -16 R0
WINDOW 0 18 8 Left 2
WINDOW 3 -485 107 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 3.3 0 1n 1n 100u 200u)
SYMBOL voltage 1040 -336 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vdd}
SYMBOL cap 1392 -32 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage 880 -160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3
FLAG 896 -336 0
FLAG 1312 112 0
FLAG 1408 112 0
FLAG 1088 352 0
FLAG 768 112 0
FLAG 752 -160 0
FLAG 592 -96 0
FLAG 944 96 0
FLAG 944 160 0
FLAG 1264 -128 vD1
FLAG 928 -160 vS1A
FLAG 928 -96 vS1B
FLAG 928 -32 vIN1
TEXT 1392 360 Left 2 !.tran 1m
TEXT 32 -696 Left 2 ;Notes:\n \nCrosstalk = -60 dB Only
TEXT 32 -392 Left 2 !.param Vdd = 5
* Z:\tmp\asc_dec_bjh7r6w2\085024c4c043_SM881K04L_Model_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 illu 0 100Meg
D1 N001 0 pvdiode2
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1892 756
WIRE 976 80 640 80
WIRE 1280 80 976 80
WIRE 208 96 128 96
WIRE 288 96 208 96
WIRE 976 160 976 80
WIRE 128 176 128 96
WIRE 288 176 288 96
WIRE 976 288 976 224
WIRE 128 304 128 256
WIRE 288 304 288 256
SYMBOL res 272 160 R0
SYMATTR InstName R1
SYMATTR Value 100Meg
SYMBOL diode 960 160 R0
SYMATTR InstName D1
SYMATTR Value pvdiode2
FLAG 128 304 0
FLAG 288 304 0
FLAG 208 96 illu
FLAG 976 288 0