Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT83205.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT83205.asy)
Rload OUT 0 1
C1 N008 0 10n
C3 N009 0 2.2
R1 N003 0 47.5K
L1 N002 OUT 0.47 Rser=10m
C4 OUT 0 100 Rser=10m
R4 OUT N007 49.9K
R6 N004 N008 499
C6 N004 0 82p
R2 N009 0 10K
XU1 N002 NC_01 0 N003 IN N001 N005 IN N006 N009 N004 OUT N007 LT83205 ;pnba SW)SYNC/MODE)GND)RT)VIN)BST)PG)EN/UVLO)INTVCC)SET)VC)OUTS)PGFB
V1 IN 0 12
C2 N006 0 1
C5 N001 N002 0.1
R5 N007 0 49.9K
R3 OUT N005 100K
.tran 2.5m startup
.lib LT83205.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1136 680
WIRE -64 -32 -144 -32
WIRE 32 -32 -64 -32
WIRE 96 -32 32 -32
WIRE 496 -32 432 -32
WIRE -144 -16 -144 -32
WIRE 496 -16 496 -32
WIRE 32 64 32 -32
WIRE 96 64 32 64
WIRE 496 64 496 48
WIRE 496 64 432 64
WIRE 592 64 496 64
WIRE 704 64 672 64
WIRE 768 64 704 64
WIRE 832 64 768 64
WIRE 880 64 832 64
WIRE 768 80 768 64
WIRE 880 80 880 64
WIRE -144 96 -144 64
WIRE -16 160 -32 160
WIRE 96 160 64 160
WIRE 624 160 432 160
WIRE 704 160 704 64
WIRE 704 160 624 160
WIRE 768 176 768 144
WIRE 880 176 880 160
WIRE -80 256 -176 256
WIRE 96 256 -80 256
WIRE 496 256 432 256
WIRE 624 256 624 160
WIRE 624 256 576 256
WIRE 704 256 704 160
WIRE -176 272 -176 256
WIRE 96 352 16 352
WIRE 704 352 704 336
WIRE 704 352 432 352
WIRE -176 368 -176 352
WIRE -80 368 -80 256
WIRE 16 368 16 352
WIRE 704 368 704 352
WIRE -176 448 -176 432
WIRE -80 448 -80 432
WIRE 16 448 16 432
WIRE 496 448 432 448
WIRE 592 448 496 448
WIRE 496 464 496 448
WIRE 592 464 592 448
WIRE 704 464 704 448
WIRE 272 544 272 528
WIRE 496 560 496 528
WIRE 592 560 592 544
SYMBOL cap -192 368 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL voltage -144 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 752 80 R0
SYMATTR SpiceLine Rser=10m
SYMATTR InstName C4
SYMATTR Value 100
SYMBOL res 576 448 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 592 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap -96 368 R0
SYMATTR InstName C6
SYMATTR Value 82p
SYMBOL LT83205 272 224 R0
SYMATTR InstName U1
SYMBOL res -192 256 R0
SYMATTR InstName R6
SYMATTR Value 499
SYMBOL res 864 64 R0
SYMATTR InstName Rload
SYMATTR Value 1
SYMBOL cap 480 -16 R0
SYMATTR InstName C5
SYMATTR Value 0.1
SYMBOL cap 0 368 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 688 352 R0
SYMATTR InstName R5
SYMATTR Value 49.9K
SYMBOL cap 480 464 R0
SYMATTR InstName C3
SYMATTR Value 2.2
SYMBOL res 80 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 47.5K
SYMBOL res 688 240 R0
SYMATTR InstName R4
SYMATTR Value 49.9K
SYMBOL ind 576 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 0.47
SYMATTR SpiceLine Rser=10m
FLAG 272 544 0
FLAG -144 96 0
FLAG -32 160 0
FLAG -176 448 0
FLAG 16 448 0
FLAG 496 560 0
FLAG 592 560 0
FLAG 768 176 0
FLAG 704 464 0
FLAG 880 176 0
FLAG 832 64 OUT
FLAG -64 -32 IN
FLAG -80 448 0
TEXT 184 648 Left 2 !.tran 2.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3cc627b8f745_opamp_gain2.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 in+ in- V+ V- out LT1055 ;pnba In+)In-)V+)V-)OUT
R3 in- out {RF}
R2 z2 in- 10k
C1 in- out 2p
R1 0 z2 2k
.param RF={12k*limit((gain-1),1e-6,1e3)}
.param gain=2
* Amplifier_gain = 1 + R3/(R1+R2)
* This line ".param gain=2" is necessary \nfor the case that no parameter is given \nfrom the higher level schematic.
* Node "z2" is only for educational reason.\nIt can be used to demonstrate that also\ninternal nodes can be plotted in the \nwaveform viewer.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1055A.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -208 48 -272 48
WIRE -48 48 -128 48
WIRE 16 48 -48 48
WIRE 128 -64 -16 -64
WIRE 128 48 96 48
WIRE 128 48 128 -64
WIRE 128 224 128 48
WIRE 160 -64 128 -64
WIRE 160 48 128 48
WIRE 160 224 128 224
WIRE 160 256 -16 256
WIRE 192 208 192 176
WIRE 192 320 192 272
WIRE 272 -64 224 -64
WIRE 272 48 240 48
WIRE 272 48 272 -64
WIRE 272 240 224 240
WIRE 272 240 272 48
WIRE 352 240 272 240
FLAG -272 48 0
FLAG 352 240 out
IOPIN 352 240 Out
FLAG -16 256 in+
IOPIN -16 256 In
FLAG 192 176 V+
IOPIN 192 176 In
FLAG 192 320 V-
IOPIN 192 320 In
FLAG -16 -64 in-
IOPIN -16 -64 In
FLAG -48 48 z2
SYMBOL Opamps\\LT1055A 192 176 R0
SYMATTR InstName U1
SYMBOL res 144 64 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R3
SYMATTR Value {RF}
SYMBOL res 0 64 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL cap 160 -48 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName C1
SYMATTR Value 2p
SYMBOL res -224 64 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 2k
TEXT -192 -216 Left 0 !.param RF={12k*limit((gain-1),1e-6,1e3)}
TEXT -192 -328 Left 0 !.param gain=2
TEXT -8 -168 Left 0 ;Amplifier_gain = 1 + R3/(R1+R2)
TEXT 0 -328 Left 0 ;This line ".param gain=2" is necessary \nfor the case that no parameter is given \nfrom the higher level schematic.
TEXT -8 -464 Left 0 ;Node "z2" is only for educational reason.\nIt can be used to demonstrate that also\ninternal nodes can be plotted in the \nwaveform viewer.
CIRCLE Normal -10 80 -90 0 2
* Z:\home\khalils\Downloads\files\data\raw_asc\2dc4ca19625a_1795.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1795.asy)
XU1 N003 N001 +V -V N002 0 N004 NC_01 LT1795 ;pnba In+)In-)V+)V-)OUT)SHDNREF)SHDN)COMP
R1 N002 N001 1K
V4 N004 0 5
V2 -V 0 -10
V3 N003 0 SINE(0 1 1K)
R2 N001 0 1K
V1 +V 0 10
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -304 0 -320 0
WIRE -208 0 -224 0
WIRE -144 0 -208 0
WIRE -16 0 -64 0
WIRE -576 48 -576 32
WIRE -448 48 -448 32
WIRE -144 96 -144 64
WIRE -208 128 -208 0
WIRE -176 128 -208 128
WIRE -576 144 -576 128
WIRE -448 144 -448 128
WIRE -16 160 -16 0
WIRE -16 160 -48 160
WIRE -176 192 -400 192
WIRE -400 208 -400 192
WIRE -144 256 -144 224
WIRE -80 272 -80 224
WIRE -400 304 -400 288
WIRE -80 368 -80 352
SYMBOL res -208 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL opamps\\LT1795 -112 160 R0
SYMATTR InstName U1
SYMBOL voltage -400 192 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL voltage -448 32 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL voltage -576 32 R0
SYMATTR InstName V2
SYMATTR Value -10
SYMBOL res -48 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -80 256 R0
SYMATTR InstName V4
SYMATTR Value 5
FLAG -448 144 0
FLAG -448 32 +V
FLAG -576 144 0
FLAG -576 32 -V
FLAG -320 0 0
FLAG -400 304 0
FLAG -144 64 +V
FLAG -144 256 -V
FLAG -112 224 0
FLAG -80 368 0
TEXT -288 360 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\0eb0c6eecc84_Demonstration_circuit_Step_ac_BF.asc
* Generated by LTspice 26.0.1 for Windows.
* Demonstration Circuit step BF of transistor
* Step AC Transistor BF
* plot FR for different BF
* copyright Cordell Audio 12/03/2010
;op
R3 N003 N005 225
Q2 Vout 0 N004 0 2N5551C
V3 Vin 0 SINE(0 0.1 1000 0 0 0 10) AC 1
V2 0 N006 15
V1 N001 0 15
Q1 N002 Vin N003 0 2N5551C
R2 N001 Vout 2500
R4 N004 N005 225
R1 N001 N002 2500
C1 N001 Vout 50pF
I1 N005 N006 2mA
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.ac dec 10 10k 1Meg
.step NPN 2N5551C (BF) 10 100 10
.include Cordell_Mods
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 764
WIRE 160 64 0 64
WIRE 272 64 160 64
WIRE 400 64 272 64
WIRE 0 112 0 64
WIRE 160 112 160 64
WIRE 272 112 272 64
WIRE 400 144 400 64
WIRE 160 208 160 192
WIRE 208 208 160 208
WIRE 272 208 272 176
WIRE 272 208 208 208
WIRE 0 256 0 192
WIRE 160 256 160 208
WIRE 400 288 400 224
WIRE 480 288 400 288
WIRE -128 304 -176 304
WIRE -64 304 -128 304
WIRE 400 304 400 288
WIRE 400 304 224 304
WIRE 480 304 480 288
WIRE 400 352 400 304
WIRE -176 368 -176 304
WIRE 0 384 0 352
WIRE 160 384 160 352
WIRE -176 496 -176 448
WIRE 0 496 0 464
WIRE 80 496 0 496
WIRE 160 496 160 464
WIRE 160 496 80 496
WIRE 80 512 80 496
WIRE 80 624 80 592
WIRE 400 624 400 432
WIRE 400 624 80 624
SYMBOL current 80 512 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 45 26 Left 0
WINDOW 3 33 64 Left 0
SYMATTR InstName I1
SYMATTR Value 2mA
SYMBOL npn -64 256 R0
WINDOW 3 26 40 Left 0
WINDOW 0 67 10 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q1
SYMBOL res 144 96 R0
WINDOW 0 37 30 Left 0
WINDOW 3 36 62 Left 0
SYMATTR InstName R2
SYMATTR Value 2500
SYMBOL npn 224 256 M0
WINDOW 3 26 42 Left 0
WINDOW 0 68 13 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q2
SYMBOL res 144 368 R0
SYMATTR InstName R4
SYMATTR Value 225
SYMBOL voltage 400 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 40 44 Left 0
WINDOW 3 40 79 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res -16 368 R0
SYMATTR InstName R3
SYMATTR Value 225
SYMBOL res -16 96 R0
WINDOW 0 38 31 Left 0
WINDOW 3 35 63 Left 0
SYMATTR InstName R1
SYMATTR Value 2500
SYMBOL voltage 400 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 40 43 Left 0
WINDOW 3 43 76 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage -176 352 R0
WINDOW 3 -327 107 Left 0
WINDOW 123 33 84 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 43 43 Left 0
SYMATTR Value SINE(0 0.1 1000 0 0 0 10)
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMBOL cap 256 112 R0
WINDOW 3 33 46 Left 0
WINDOW 0 29 11 Left 0
SYMATTR Value 50pF
SYMATTR InstName C1
FLAG 480 304 0
FLAG -176 496 0
FLAG -128 304 Vin
FLAG 208 208 Vout
TEXT -584 96 Left 0 !;op
TEXT -584 128 Left 0 !.ac dec 10 10k 1Meg
TEXT -280 -104 Left 0 ;Demonstration Circuit step BF of transistor
TEXT -584 168 Left 0 !.step NPN 2N5551C (BF) 10 100 10
TEXT -184 -64 Left 0 ;Step AC Transistor BF
TEXT -184 -24 Left 0 ;plot FR for different BF
TEXT -584 64 Left 0 !.include Cordell_Mods
TEXT 104 720 Left 0 ;copyright Cordell Audio 12/03/2010
* Z:\tmp\asc_dec_bjh7r6w2\01edf337d819_receiver_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R10 N002 0 620
R4 N004 N001 200k
XIC5/1 N006 N002 VCC 0 N003 lm358 ;pnba In+)In-)V+)V-)OUT
VINPUT_SIGNAL N006 0 SINE(0 0.009 1200 0 0 0 0) Rser=0.001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4680 2660
WIRE -592 928 -624 928
WIRE -496 928 -512 928
WIRE -416 928 -496 928
WIRE -384 928 -416 928
WIRE -304 928 -304 848
WIRE -624 960 -624 928
WIRE -496 960 -496 928
WIRE -496 960 -512 960
WIRE -784 1008 -912 1008
WIRE -608 1008 -704 1008
WIRE -512 1040 -512 960
WIRE -400 1040 -432 1040
WIRE -384 1040 -400 1040
WIRE -208 1040 -304 1040
WIRE -304 1136 -336 1136
WIRE -304 1152 -304 1136
WIRE -752 1168 -752 1152
WIRE -912 1184 -912 1008
WIRE -784 1184 -912 1184
WIRE -336 1184 -336 1136
WIRE -608 1200 -608 1008
WIRE -608 1200 -720 1200
WIRE -544 1200 -608 1200
WIRE -512 1200 -544 1200
WIRE -400 1200 -400 1040
WIRE -400 1200 -448 1200
WIRE -368 1200 -400 1200
WIRE -784 1216 -832 1216
WIRE -208 1216 -304 1216
WIRE -416 1232 -416 928
WIRE -752 1264 -752 1232
WIRE -912 1312 -912 1264
WIRE -544 1328 -544 1200
WIRE -832 1408 -832 1216
WIRE -832 1552 -832 1488
SYMBOL res -928 1168 R0
SYMATTR InstName R10
SYMATTR Value 620
SYMBOL res -416 1024 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 200k
SYMBOL Opamps\\opamp2 -752 1136 R0
SYMATTR InstName IC5/1
SYMATTR Value lm358
SYMBOL voltage -832 1392 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
WINDOW 3 37 69 Left 2
SYMATTR SpiceLine Rser=0.001
SYMATTR Value SINE(0 0.009 1200 0 0 0 0)
SYMATTR InstName INPUT_SIGNAL
FLAG -912 1312 0
FLAG -752 1264 0
FLAG -752 1152 VCC
FLAG -832 1552 0
FLAG -304 1152 0
FLAG -624 960 0
FLAG -304 848 VCC
* Z:\home\khalils\Downloads\files\data\raw_asc\48f62985f2f7_NOR2.asc
* Generated by LTspice 26.0.1 for Windows.
M3 n1 In1 Vdd Vdd P_2u l=2u w=48u
M1 Out In1 Vss Vss N_2u l=2u w=6.5u
M2 Out In2 Vss Vss N_2u l=2u w=6.5u
M4 Out In2 n1 n1 P_2u l=2u w=48u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include "../MOSFET models/2um_CMOS.modlib"
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 -64 192 -96
WIRE 208 -64 192 -64
WIRE -96 -48 -160 -48
WIRE 144 -48 -96 -48
WIRE 208 -16 208 -64
WIRE 208 -16 192 -16
WIRE 192 48 192 32
WIRE 240 48 192 48
WIRE 192 64 192 48
WIRE 208 64 192 64
WIRE 128 80 -160 80
WIRE 144 80 128 80
WIRE 208 112 208 64
WIRE 208 112 192 112
WIRE 192 176 192 160
WIRE 192 176 -32 176
WIRE 368 176 192 176
WIRE -32 192 -32 176
WIRE 192 192 192 176
WIRE -16 240 -32 240
WIRE 208 240 192 240
WIRE -96 272 -96 -48
WIRE -80 272 -96 272
WIRE 128 272 128 80
WIRE 144 272 128 272
WIRE -16 288 -16 240
WIRE -16 288 -32 288
WIRE 208 288 208 240
WIRE 208 288 192 288
WIRE -32 304 -32 288
WIRE 192 304 192 288
WIRE 192 304 -32 304
WIRE 192 336 192 304
IOPIN 192 -96 In
IOPIN 192 336 In
IOPIN -160 -48 In
IOPIN -160 80 In
IOPIN 368 176 Out
SYMBOL pmos4 144 32 M180
WINDOW 0 75 15 Left 2
WINDOW 3 73 70 Left 2
WINDOW 123 75 43 Left 2
SYMATTR InstName M3
SYMATTR Value P_2u
SYMATTR Value2 l=2u w=48u
SYMBOL nmos4 144 192 R0
WINDOW 0 78 81 Left 2
WINDOW 3 76 25 Left 2
WINDOW 123 78 53 Left 2
SYMATTR InstName M2
SYMATTR Value N_2u
SYMATTR Value2 l=2u w=6.5u
SYMBOL nmos4 -80 192 R0
WINDOW 0 78 81 Left 2
WINDOW 3 76 25 Left 2
WINDOW 123 78 53 Left 2
SYMATTR InstName M1
SYMATTR Value N_2u
SYMATTR Value2 l=2u w=6.5u
SYMBOL pmos4 144 160 M180
WINDOW 0 75 15 Left 2
WINDOW 3 73 70 Left 2
WINDOW 123 75 43 Left 2
SYMATTR InstName M4
SYMATTR Value P_2u
SYMATTR Value2 l=2u w=48u
FLAG 192 -96 Vdd
FLAG 192 336 Vss
FLAG -160 -48 In1
FLAG -160 80 In2
FLAG 368 176 Out
FLAG 240 48 n1
TEXT -120 432 Left 2 !.include "../MOSFET models/2um_CMOS.modlib"
* Z:\home\khalils\Downloads\files\data\raw_asc\13f1b16264d7_bjt_redriver.asc
* Generated by LTspice 26.0.1 for Windows.
V2 Vcc 0 10
R1 Vcc N002 75k
R3 sink 0 75k
Q2 N003 Vo sink 0 2N2222
R8 a+ 0 5k
R7 Vcc a+ 5k
R5 N004 0 4k
R6 Vo 0 1k
R2 Vcc N003 75k
R4 Vcc N001 2k
Q1 N002 a+ sink 0 2N2222
Q3 N004 N002 N001 0 2N2907
Q4 Vcc N004 Vo 0 2N2222
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 1 0 .00001
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1508 680
WIRE 432 -288 432 -336
WIRE 432 -288 240 -288
WIRE 592 -288 432 -288
WIRE 720 -288 592 -288
WIRE 240 -224 240 -288
WIRE 240 -224 176 -224
WIRE 304 -224 240 -224
WIRE 592 -160 592 -208
WIRE 176 -112 176 -144
WIRE 528 -112 176 -112
WIRE 176 -96 176 -112
WIRE 304 -96 304 -144
WIRE 1168 -96 1168 -144
WIRE -48 -48 -96 -48
WIRE -224 -32 -224 -64
WIRE 432 -32 432 -48
WIRE 240 0 176 0
WIRE 304 0 240 0
WIRE 720 0 720 -288
WIRE 1168 16 1168 -16
WIRE 240 32 240 0
WIRE 592 48 592 -64
WIRE 656 48 592 48
WIRE -224 64 -224 48
WIRE -224 80 -224 64
WIRE 720 128 720 96
WIRE 592 160 592 48
WIRE 720 160 720 128
WIRE -224 176 -224 160
WIRE -208 176 -224 176
WIRE -80 176 -208 176
WIRE -208 224 -208 176
WIRE 656 240 592 240
WIRE 720 240 656 240
WIRE 656 288 656 240
SYMBOL res 576 -304 R0
SYMATTR InstName R4
SYMATTR Value 2k
SYMBOL res 160 -240 R0
SYMATTR InstName R1
SYMATTR Value 75k
SYMBOL res 704 144 R0
SYMATTR InstName R6
SYMATTR Value 1k
SYMBOL res -240 -48 R0
SYMATTR InstName R7
SYMATTR Value 5k
SYMBOL voltage -80 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 10
SYMBOL res 1152 -112 R0
SYMATTR InstName R3
SYMATTR Value 75k
SYMBOL res 576 144 R0
SYMATTR InstName R5
SYMATTR Value 4k
SYMBOL pnp 528 -64 M180
SYMATTR InstName Q3
SYMATTR Value 2N2907
SYMBOL npn 656 0 R0
SYMATTR InstName Q4
SYMATTR Value 2N2222
SYMBOL npn 112 -96 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL res -240 64 R0
SYMATTR InstName R8
SYMATTR Value 5k
SYMBOL res 288 -240 R0
SYMATTR InstName R2
SYMATTR Value 75k
SYMBOL npn 368 -96 M0
SYMATTR InstName Q2
SYMATTR Value 2N2222
FLAG -208 224 0
FLAG -80 96 Vcc
FLAG 656 288 0
FLAG 432 -336 Vcc
FLAG 368 -48 a-
FLAG 112 -48 a+
FLAG 720 128 Vo
FLAG -48 -48 Vref
FLAG -96 -48 a+
FLAG 432 -48 a-
FLAG 432 -32 Vo
FLAG 240 32 sink
FLAG 1168 -144 sink
FLAG 1168 16 0
FLAG -224 -64 Vcc
FLAG -224 64 Vref
TEXT -240 296 Left 2 !.tran 0 1 0 .00001
* Z:\home\khalils\Downloads\files\data\raw_asc\3b1512f19a8e_Clipper.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 N003 D
R1 N002 N001 1k
R2 N002 0 100k
V1 N001 0 SINE(0 5 1k 0 0 0 0)
V2 N003 0 0.5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 128 80 64 80
WIRE 240 80 208 80
WIRE 352 80 240 80
WIRE 240 128 240 80
WIRE 64 160 64 80
WIRE 352 160 352 80
WIRE 240 224 240 192
WIRE 64 352 64 240
WIRE 240 352 240 304
WIRE 240 352 64 352
WIRE 352 352 352 240
WIRE 352 352 240 352
SYMBOL res 224 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 224 128 R0
SYMATTR InstName D1
SYMBOL voltage 240 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0.5
SYMBOL res 336 144 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL voltage 64 144 R0
WINDOW 3 -289 75 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1k 0 0 0 0)
FLAG 352 352 0
TEXT -224 376 Left 2 !.tran 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\MeasureBW.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* Example of using a .measure script to measure the 3dB bandwidth of a response.\nExecute View=>SPICE Error Log after running the simulation to see the output of the\n.measure statements.
C3 N002 OUT 100p
R3 N003 0 1K
V3 IN 0 AC 1
R1 0 N002 10K
R2 N002 N001 100K
Q1 OUT N002 N003 0 2N3904
C2 N003 0 20
C1 N002 IN 1
V1 N001 0 9
R4 N001 OUT 20K
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.ac oct 10 1 10Meg
.measure tmp max mag(V(out))
.measure BW trig mag(V(out))=tmp/sqrt(2) rise=1 targ mag(V(out))=tmp/sqrt(2) fall=last
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2344 1936
WIRE 400 1152 192 1152
WIRE 576 1152 400 1152
WIRE 400 1168 400 1152
WIRE 576 1168 576 1152
WIRE 192 1184 192 1152
WIRE 400 1264 400 1248
WIRE 400 1264 272 1264
WIRE 448 1264 400 1264
WIRE 576 1264 576 1248
WIRE 272 1280 272 1264
WIRE 400 1312 400 1264
WIRE 80 1360 16 1360
WIRE 192 1360 192 1264
WIRE 192 1360 144 1360
WIRE 272 1360 272 1344
WIRE 272 1360 192 1360
WIRE 336 1360 272 1360
WIRE 16 1392 16 1360
WIRE 192 1392 192 1360
WIRE 400 1424 400 1408
WIRE 480 1424 400 1424
WIRE 400 1440 400 1424
WIRE 480 1456 480 1424
WIRE 16 1520 16 1472
WIRE 192 1520 192 1472
WIRE 400 1536 400 1520
WIRE 480 1536 480 1520
SYMBOL res 384 1152 R0
SYMATTR InstName R4
SYMATTR Value 20K
SYMBOL cap 144 1344 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 384 1424 R0
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL npn 336 1312 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 176 1280 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL voltage 576 1152 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL cap 464 1456 R0
SYMATTR InstName C2
SYMATTR Value 20
SYMBOL res 176 1488 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL cap 256 1344 M180
WINDOW 0 28 52 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value 100p
SYMBOL voltage 16 1376 R0
WINDOW 123 24 105 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value ""
FLAG 16 1520 0
FLAG 16 1360 IN
FLAG 192 1520 0
FLAG 400 1536 0
FLAG 448 1264 OUT
FLAG 576 1264 0
FLAG 480 1536 0
TEXT 560 1392 Left 2 !.ac oct 10 1 10Meg
TEXT 424 1632 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT -48 1584 Left 2 !.measure tmp max mag(V(out))\n.measure BW trig mag(V(out))=tmp/sqrt(2) rise=1 targ mag(V(out))=tmp/sqrt(2) fall=last
TEXT -72 1088 Left 2 ;Example of using a .measure script to measure the 3dB bandwidth of a response.\nExecute View=>SPICE Error Log after running the simulation to see the output of the\n.measure statements.
* Z:\home\khalils\Downloads\files\data\raw_asc\a046904b9523_Transistor_PNP.asc
* Generated by LTspice 26.0.1 for Windows.
* PNP Transistor biasing
R3 N002 0 11.2k
Q1 N003 N002 N001 0 2N2907
V1 N001 0 12
R1 N003 0 1
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 -64 -16 -64
WIRE -16 -32 -16 -64
WIRE 192 16 192 -64
WIRE 272 64 256 64
WIRE 400 64 352 64
WIRE 400 112 400 64
WIRE 192 128 192 112
WIRE 192 288 192 208
SYMBOL res 256 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 11.2k
SYMBOL pnp 256 112 R180
SYMATTR InstName Q1
SYMATTR Value 2N2907
SYMBOL voltage -16 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 176 112 R0
SYMATTR InstName R1
SYMATTR Value 1
FLAG 400 112 0
FLAG 192 288 0
FLAG -16 48 0
TEXT 40 152 Right 2 !.tran 1
TEXT 104 -120 Left 2 ;PNP Transistor biasing
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL42005-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL42005-3.3.asy)
XU1 IN OUT IN N001 OUT 0 ADPL42005-3.3 ;pnba Vin)Sense)EN)PG)Vout)GND
Rload OUT 0 6.6
V1 IN 0 4.3
R1 OUT N001 100k
C1 OUT 0 2.2 Rser=1.5m
.tran 3m startup
.lib ADPL42005-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -16 48 -16 32
WIRE 384 128 352 128
WIRE 464 128 464 32
WIRE 464 128 384 128
WIRE 560 128 464 128
WIRE -16 144 -16 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 384 224 384 128
WIRE 384 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
SYMBOL ADPL42005-3.3 224 128 R0
SYMATTR InstName U1
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL voltage -16 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.3
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 6.6
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
FLAG 224 304 0
FLAG -16 144 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -16 32 IN
FLAG 560 128 OUT
TEXT 432 296 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1764A-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1764A-2.5.asy)
XU1 IN IN 0 OUT OUT LT1764-2.5 ;pnba _SHDN)IN)GND)OUT)Sense
C1 OUT 0 10 Rser=.1
Rload OUT 0 500
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT1764.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -224 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 512 48 384 48
WIRE -224 64 -224 48
WIRE 384 64 384 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -224 160 -224 144
WIRE 384 160 384 128
WIRE 512 160 512 144
WIRE 160 240 160 208
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT1764A-2.5 160 96 R0
SYMATTR InstName U1
SYMBOL cap 368 64 R0
WINDOW 39 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=.1
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -224 160 0
FLAG 384 160 0
FLAG 512 160 0
FLAG 160 240 0
FLAG 512 48 OUT
FLAG -224 48 IN
TEXT 360 248 Left 2 !.tran 1