Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\03cc741839f9_filtre_passe-bas.asc
* Generated by LTspice 26.0.1 for Windows.
C1 my_out 0 100p
R1 N001 my_out 10k
V1 N001 0 PULSE(0 1 10u 1u 1u 10u) AC 1 0
;tran 50u
.ac dec 100 1 1G
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 -64 -176 -64
WIRE 176 -16 176 -64
WIRE -176 16 -176 -64
WIRE 176 96 176 64
WIRE 304 96 176 96
WIRE 176 128 176 96
WIRE -176 192 -176 96
WIRE 0 192 -176 192
WIRE 176 192 0 192
WIRE 0 224 0 192
FLAG 304 96 my_out
FLAG 0 224 0
SYMBOL cap 160 128 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL res 160 -32 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -176 0 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 10u 1u 1u 10u)
SYMATTR Value2 AC 1 0
TEXT 16 -120 Left 2 !;tran 50u
TEXT 16 -152 Left 2 !.ac dec 100 1 1G
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5766.asc
* Generated by LTspice 26.0.1 for Windows.
* Dither with 0.125V offset and amplitude\nRange is one of {1,2,...,8}\ndither_scale is one of {0,1,2,3}\ndither_inv is one of {0,1}
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5766.asy)
I1 OUT 0 100
V1 N001 0 25
V5 N002 0 SINE(0.125 0.125 30k)
XU2 IN N002 N001 N003 OUT 0 AD5766 Range=8 dither_scale=0 dither_inv=0 ;pnba Vdac)NO)AVdd)AVss)Vout)GND
V3 IN 0 PWL(0 0 100u 0 +1u 0.625 +100u 0.625 +1u 1.25 +100u 1.25 +1u 1.875 +100u 1.875 +1u 2.5)
V2 N003 0 -25
.tran 1m
.lib AD5766.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1520
WIRE 656 400 128 400
WIRE 128 480 128 400
WIRE -224 560 -768 560
WIRE -64 560 -224 560
WIRE -768 592 -768 560
WIRE 400 624 304 624
WIRE 656 672 656 400
WIRE 400 688 400 624
WIRE -64 704 -672 704
WIRE -672 736 -672 704
WIRE 128 832 128 768
WIRE -768 960 -768 672
WIRE -672 960 -672 816
WIRE -672 960 -768 960
WIRE 16 960 16 768
WIRE 16 960 -672 960
WIRE 128 960 128 912
WIRE 128 960 16 960
WIRE 400 960 400 768
WIRE 400 960 128 960
WIRE 656 960 656 752
WIRE 656 960 400 960
SYMBOL voltage -768 576 R0
WINDOW 0 -32 56 VBottom 2
WINDOW 3 377 87 Top 1
WINDOW 123 63 42 VTop 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PWL(0 0 100u 0 +1u 0.625 +100u 0.625 +1u 1.25 +100u 1.25 +1u 1.875 +100u 1.875 +1u 2.5)
SYMBOL voltage 128 816 R0
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -25
SYMBOL current 400 688 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 100
SYMBOL voltage 656 656 R0
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 25
SYMBOL AD5766 96 624 R0
SYMATTR InstName U2
SYMBOL voltage -672 720 R0
WINDOW 0 -32 56 VBottom 2
WINDOW 3 123 84 Top 1
WINDOW 123 63 42 VTop 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value SINE(0.125 0.125 30k)
FLAG -224 560 IN
FLAG -768 960 0
FLAG 400 624 OUT
TEXT -64 416 Left 2 !.tran 1m
TEXT -344 792 Left 2 ;Dither with 0.125V offset and amplitude\nRange is one of {1,2,...,8}\ndither_scale is one of {0,1,2,3}\ndither_inv is one of {0,1}
* Z:\home\khalils\Downloads\files\data\raw_asc\614e972e4358_DivMod.asc
* Generated by LTspice 26.0.1 for Windows.
B3 MOD 0 V=ROUND(V(INT_IN)-{BASE}*V(DIV))
B2 DIV 0 V=INT(V(INT_IN)/{BASE})
B1 INT_IN 0 V=ROUND(V(IN))
.param BASE=2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2360 1444
WIRE 944 -80 848 -80
WIRE 848 -16 848 -80
WIRE 848 96 848 64
WIRE 464 160 272 160
WIRE 608 208 544 208
WIRE 656 208 608 208
WIRE 960 208 848 208
WIRE 544 240 544 208
WIRE 848 272 848 208
WIRE 544 368 544 320
WIRE 848 384 848 352
IOPIN 960 208 Out
IOPIN 272 160 In
IOPIN 944 -80 Out
SYMBOL bv 544 224 R0
SYMATTR InstName B1
SYMATTR Value V=ROUND(V(IN))
SYMBOL bv 848 -32 R0
SYMATTR InstName B3
SYMATTR Value V=ROUND(V(INT_IN)-{BASE}*V(DIV))
SYMBOL bv 848 256 R0
SYMATTR InstName B2
SYMATTR Value V=INT(V(INT_IN)/{BASE})
FLAG 960 208 DIV
FLAG 272 160 IN
FLAG 944 -80 MOD
FLAG 544 368 0
FLAG 608 208 INT_IN
FLAG 848 384 0
FLAG 848 96 0
TEXT 248 320 Left 2 !.param BASE=2
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1261CS8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1261CS8.asy)
R2 OUT N004 10k
R1 IN N002 10k
V1 IN 0 5
C1 N004 0 100p
R3 N004 0 22.3k
C2 N001 N003 0.1
C3 OUT 0 3.3
Rload OUT 0 800
XU1 IN N001 N003 0 N004 OUT N002 NC_01 LTC1261CS8 ;pnba Vcc)C1+)C1-)GND)ADJ)OUT)REG)SHDN
.tran 2m
.lib LTC1261CS8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2424 2180
WIRE 1680 1056 1536 1056
WIRE 2064 1056 1680 1056
WIRE 1536 1072 1536 1056
WIRE 2064 1088 2064 1056
WIRE 1680 1136 1680 1056
WIRE 1712 1136 1680 1136
WIRE 1536 1168 1536 1152
WIRE 1712 1200 1632 1200
WIRE 2064 1200 2064 1168
WIRE 2064 1200 2000 1200
WIRE 1712 1264 1632 1264
WIRE 2128 1264 2000 1264
WIRE 2240 1264 2128 1264
WIRE 2336 1264 2240 1264
WIRE 2128 1280 2128 1264
WIRE 2240 1280 2240 1264
WIRE 2336 1280 2336 1264
WIRE 1712 1328 1696 1328
WIRE 2032 1328 2000 1328
WIRE 2032 1376 2032 1328
WIRE 2128 1376 2128 1360
WIRE 2128 1376 2032 1376
WIRE 2240 1376 2240 1344
WIRE 2336 1376 2336 1360
WIRE 2128 1392 2128 1376
WIRE 2032 1408 2032 1376
WIRE 2032 1504 2032 1472
WIRE 2128 1504 2128 1472
SYMBOL res 2048 1072 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL VOLTAGE 1536 1056 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2224 1280 R0
SYMATTR InstName C3
SYMATTR Value 3.3
SYMBOL res 2112 1264 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL PowerProducts\\LTC1261CS8 1856 1232 R0
SYMATTR InstName U1
SYMBOL res 2112 1376 R0
SYMATTR InstName R3
SYMATTR Value 22.3k
SYMBOL cap 1616 1200 R0
WINDOW 0 33 18 Left 2
WINDOW 3 30 49 Left 2
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL RES 2320 1264 R0
SYMATTR InstName Rload
SYMATTR Value 800
SYMBOL cap 2016 1408 R0
SYMATTR InstName C1
SYMATTR Value 100p
FLAG 1696 1328 0
FLAG 1536 1168 0
FLAG 2240 1376 0
FLAG 2336 1376 0
FLAG 2336 1264 OUT
FLAG 1536 1056 IN
FLAG 2128 1504 0
FLAG 2032 1504 0
TEXT 1816 1408 Left 2 !.tran 2m
* Z:\tmp\asc_dec_bjh7r6w2\1379435aa50d_Level-Shifter_Transistor_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N003 N005 Cell- Cell- Power-FET
M2 N002 N007 N008 N008 Power-FET
R7 N007 N006 620
V1 N006 0 PULSE(0 3.3 3m 1n 1n 90u 100u 140)
R6 N007 0 100k
R5 N008 0 22k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1812 1420
WIRE 704 -144 416 -144
WIRE 848 -144 704 -144
WIRE 896 -144 848 -144
WIRE 336 -128 336 -144
WIRE 704 -128 704 -144
WIRE 416 -80 416 -144
WIRE 336 -32 336 -48
WIRE 352 -32 336 -32
WIRE 704 -32 704 -48
WIRE 416 48 416 16
WIRE 432 48 416 48
WIRE 528 48 512 48
WIRE 608 48 528 48
WIRE 656 48 608 48
WIRE 336 64 336 -32
WIRE 608 64 608 48
WIRE 528 80 528 48
WIRE 128 144 80 144
WIRE 224 144 208 144
WIRE 288 144 224 144
WIRE 528 160 528 144
WIRE 608 160 608 144
WIRE 608 160 528 160
WIRE 704 160 704 64
WIRE 704 160 608 160
WIRE 848 160 704 160
WIRE 896 160 848 160
WIRE 80 176 80 144
WIRE 224 176 224 144
WIRE 336 176 336 160
WIRE 80 272 80 256
WIRE 224 272 224 256
WIRE 336 272 336 256
SYMBOL nmos 656 -32 R0
SYMATTR InstName M1
SYMATTR Value Power-FET
SYMBOL nmos 288 64 R0
SYMATTR InstName M2
SYMATTR Value Power-FET
SYMBOL res 224 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 620
SYMBOL voltage 80 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
WINDOW 3 10 185 Left 2
SYMATTR Value PULSE(0 3.3 3m 1n 1n 90u 100u 140)
SYMATTR InstName V1
SYMBOL res 208 160 R0
SYMATTR InstName R6
SYMATTR Value 100k
SYMBOL res 320 160 R0
SYMATTR InstName R5
SYMATTR Value 22k
FLAG 80 272 0
FLAG 848 160 Cell-
FLAG 848 -144 Cell+
FLAG 336 272 0
FLAG 224 272 0
* Z:\home\khalils\Downloads\files\data\raw_asc\81181dfd0248_1441.asc
* Generated by LTspice 26.0.1 for Windows.
* 32.768KHz "Watch Crystal" Oscillator
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1441.asy)
C1 OUT N002 .39p Rser=5K Lser=60 Cpar=3.9p
V1 +V 0 3.3
XU1 OUT 0 N002 N001 +V LTC1441 ;pnba OUT)V-)In+)In-)V+
R2 +V N002 1Meg
R1 N002 0 470K
R3 OUT N001 1.2Meg
C2 N001 0 10p
.tran 3m startup
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 800
WIRE 304 112 256 112
WIRE 464 112 384 112
WIRE 0 224 0 208
WIRE 336 240 336 208
WIRE 176 256 160 256
WIRE 256 256 256 112
WIRE 256 256 240 256
WIRE 304 256 256 256
WIRE 464 272 464 112
WIRE 464 272 368 272
WIRE 496 272 464 272
WIRE 304 288 256 288
WIRE 0 320 0 304
WIRE 128 320 128 304
WIRE 336 336 336 304
WIRE 128 416 128 400
WIRE 256 416 256 288
WIRE 256 416 128 416
WIRE 352 416 256 416
WIRE 464 416 464 272
WIRE 464 416 416 416
WIRE 128 432 128 416
WIRE 128 528 128 512
SYMBOL Comparators\\LTC1441 336 208 R0
SYMATTR InstName U1
SYMBOL res 112 304 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL cap 240 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL res 400 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1.2Meg
SYMBOL misc\\xtal 416 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 Invisible 2
SYMATTR InstName C1
SYMATTR Value .39p
SYMATTR SpiceLine Rser=5K Lser=60 Cpar=3.9p
SYMBOL res 112 416 R0
SYMATTR InstName R1
SYMATTR Value 470K
SYMBOL voltage 0 208 R0
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG 0 320 0
FLAG 0 208 +V
FLAG 336 208 +V
FLAG 336 336 0
FLAG 128 528 0
FLAG 128 304 +V
FLAG 160 256 0
FLAG 496 272 OUT
TEXT 400 472 Left 2 !.tran 3m startup
TEXT 368 64 Bottom 2 ;32.768KHz "Watch Crystal" Oscillator
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2139-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
L1 N001 OUT 1 Rser=60m
Rload OUT 0 3
C1 OUT 0 10
XU1 IN IN N001 OUT 0 IN ADP2139-x.x Rtop=208K ;pnba Vin)EN)SW)Vout)GND)Mode
.tran .5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2139-1.8.asy)
.lib ADP2139-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 192 224 192 144
WIRE 208 224 192 224
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 224
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=60m
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 3
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ADP2139-1.8 352 224 R0
SYMATTR InstName U1
TEXT 600 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8410.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 N004 604K
V1 IN 0 3.6 Rser=0.1
L1 IN N001 100
C1 N002 0 .1
C2 OUT 0 .1
Rload OUT 0 20K
XU1 IN IN 0 N001 OUT N002 N003 N004 LT8410 ;pnba _SHDN)Vcc)GND)SW)Vout)CAP)Vref)FBP
R2 N004 0 412K
C3 N003 0 .01 Rser=10m
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8410.asy)
.lib LT8410.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1572
WIRE 1648 880 1552 880
WIRE 1664 880 1648 880
WIRE 1760 880 1744 880
WIRE 2016 880 1888 880
WIRE 1552 896 1552 880
WIRE 2016 896 2016 880
WIRE 1760 944 1760 880
WIRE 1888 944 1888 880
WIRE 2016 976 2016 960
WIRE 1552 992 1552 976
WIRE 1648 1008 1648 880
WIRE 1680 1008 1648 1008
WIRE 2208 1008 1968 1008
WIRE 2304 1008 2208 1008
WIRE 2208 1024 2208 1008
WIRE 2304 1024 2304 1008
WIRE 2000 1088 1968 1088
WIRE 2112 1088 2000 1088
WIRE 2112 1104 2112 1088
WIRE 2208 1120 2208 1088
WIRE 2304 1120 2304 1104
WIRE 1648 1168 1648 1008
WIRE 1680 1168 1648 1168
WIRE 2000 1168 1968 1168
WIRE 2000 1184 2000 1168
WIRE 2112 1184 2112 1168
WIRE 1824 1248 1824 1232
WIRE 2000 1280 2000 1264
FLAG 2304 1008 OUT
FLAG 1824 1248 0
FLAG 1552 992 0
FLAG 1552 880 IN
FLAG 2016 976 0
FLAG 2208 1120 0
FLAG 2304 1120 0
FLAG 2000 1280 0
FLAG 2112 1184 0
SYMBOL RES 1984 1072 R0
SYMATTR InstName R1
SYMATTR Value 604K
SYMBOL VOLTAGE 1552 880 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMATTR SpiceLine Rser=0.1
SYMBOL ind 1648 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMBOL cap 2000 896 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL cap 2192 1024 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL res 2288 1008 R0
SYMATTR InstName Rload
SYMATTR Value 20K
SYMBOL PowerProducts\\LT8410 1824 1088 R0
SYMATTR InstName U1
SYMBOL RES 1984 1168 R0
SYMATTR InstName R2
SYMATTR Value 412K
SYMBOL cap 2096 1104 R0
SYMATTR InstName C3
SYMATTR Value .01
SYMATTR SpiceLine Rser=10m
TEXT 2144 1248 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\601d8bc3f55c_24_09_10_Bomen_Cell.asc
* Generated by LTspice 26.0.1 for Windows.
D113 N001 - Jinko390
I113 - N001 10.11
Rsh112 N001 - 1200
Rs112 N001 + 3.2m
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model Jinko390 D(IS=2e-11 N=0.966)
.dc V1 0 0.7 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 9108 680
WIRE -2000 48 -2176 48
WIRE -1744 48 -2000 48
WIRE -1664 48 -1744 48
WIRE -1488 48 -1584 48
WIRE -2176 128 -2176 48
WIRE -2000 128 -2000 48
WIRE -1744 128 -1744 48
WIRE -2176 272 -2176 208
WIRE -2000 272 -2000 192
WIRE -2000 272 -2176 272
WIRE -1744 272 -1744 208
WIRE -1744 272 -2000 272
WIRE -1488 272 -1744 272
FLAG -1488 272 -
IOPIN -1488 272 BiDir
FLAG -1488 48 +
IOPIN -1488 48 BiDir
SYMBOL diode -2016 128 R0
SYMATTR InstName D113
SYMATTR Value Jinko390
SYMBOL current -2176 208 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I113
SYMATTR Value 10.11
SYMBOL res -1760 112 R0
SYMATTR InstName Rsh112
SYMATTR Value 1200
SYMBOL res -1680 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rs112
SYMATTR Value 3.2m
TEXT -2176 328 Left 2 !.model Jinko390 D(IS=2e-11 N=0.966)
TEXT -2176 368 Left 2 !.dc V1 0 0.7 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP165-2.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP165-2.3.asy)
XU1 IN 0 N001 OUT ADP16xfd K=434.8u ;pnba Vin)GND)En)Vout
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
Rload OUT 0 230
V1 IN 0 5
C1 OUT 0 1
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -48 96
WIRE 432 96 352 96
WIRE 528 96 432 96
WIRE -48 112 -48 96
WIRE 432 112 432 96
WIRE 528 112 528 96
WIRE -48 208 -48 192
WIRE 160 208 16 208
WIRE 432 208 432 176
WIRE 528 208 528 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL res 512 96 R0
SYMATTR InstName Rload
SYMATTR Value 230
SYMBOL voltage -48 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADP165-2.3 256 208 R0
SYMATTR InstName U1
SYMBOL cap 416 112 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG -48 208 0
FLAG 256 272 0
FLAG 432 208 0
FLAG 528 208 0
FLAG 528 96 OUT
FLAG -48 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1762-1.25.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1762-1.25.asy)
R2 N001 IN 50K
C3 N002 0 1
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1762 Radj=8333.33 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
C2 N003 0 10n
C1 N004 0 1
R1 OUT 0 1
V1 IN 0 1.6
C4 OUT 0 10
.tran 1m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL voltage -128 -32 R0
SYMATTR InstName V1
SYMATTR Value 1.6
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL ADP1762-1.25 224 176 R0
SYMATTR InstName U1
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1506-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1506-3.3.asy)
D2 0 N003 MBRS340
C2 OUT 0 100 Rser=50m
C3 N001 N003 .68
XU1 IN N001 OUT 0 N004 N002 MP_01 N003 LT1506 top=1.82K bot=4.99K ;pnba Vin)Boost)Sense)GND)Vc)_SHDN))SW
D1 OUT N001 1N914
V1 IN 0 5
C1 N004 0 .0015
L1 N003 OUT 5
Rload OUT 0 1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LT1506.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2864 1988
WIRE 1840 1088 1648 1088
WIRE 2128 1088 2000 1088
WIRE 2208 1088 2128 1088
WIRE 2320 1088 2272 1088
WIRE 1648 1104 1648 1088
WIRE 1840 1120 1840 1088
WIRE 2000 1120 2000 1088
WIRE 2128 1120 2128 1088
WIRE 1648 1200 1648 1184
WIRE 1760 1216 1744 1216
WIRE 2128 1216 2128 1184
WIRE 2128 1216 2080 1216
WIRE 2208 1216 2128 1216
WIRE 2320 1216 2320 1088
WIRE 2320 1216 2288 1216
WIRE 2384 1216 2320 1216
WIRE 2128 1232 2128 1216
WIRE 2384 1232 2384 1216
WIRE 2128 1312 2128 1296
WIRE 2384 1328 2384 1312
WIRE 1680 1344 1664 1344
WIRE 1760 1344 1744 1344
WIRE 2320 1344 2320 1216
WIRE 2320 1344 2080 1344
WIRE 2320 1360 2320 1344
WIRE 2320 1440 2320 1424
WIRE 1920 1488 1920 1440
SYMBOL res 2368 1216 R0
SYMATTR InstName Rload
SYMATTR Value 1
SYMBOL cap 2112 1120 R0
SYMATTR InstName C3
SYMATTR Value .68
SYMBOL ind 2192 1232 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 5
SYMBOL VOLTAGE 1648 1088 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LT1506-3.3 1920 1280 R0
SYMATTR InstName U1
SYMBOL cap 1744 1328 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .0015
SYMBOL schottky 2112 1296 M180
WINDOW 0 39 59 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value MBRS340
SYMBOL polcap 2304 1360 R0
SYMATTR SpiceLine Rser=50m
SYMATTR InstName C2
SYMATTR Value 100
SYMBOL diode 2272 1072 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N914
FLAG 2320 1440 0
FLAG 1920 1488 0
FLAG 1664 1344 0
FLAG 1648 1200 0
FLAG 2384 1328 0
FLAG 2128 1312 0
FLAG 2384 1216 OUT
FLAG 1648 1088 IN
TEXT 2128 1480 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\100ec9b23e07_Pre-charge_FET.asc
* Generated by LTspice 26.0.1 for Windows.
R4 PRECHG_FET_EN 0 1Meg
R5 SYSTEM_GND Vd 1k
M2 Vd PRECHG_FET_EN 0 0 BSS123
V1 CELL_10_POS 0 30 Rser=500m
V2 15VO 0 15
V3 PRECHG_FET_EN 0 PWL(0 0 .005 0 .0051 15 .05 15 .0501 0)
R_SYSTEM CELL_10_POS SYSTEM_GND 10
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m 150m uic
* Battery simulation\nInternal resistance: ~100mOhm per cell, *10/2 (because 10S2P) = 500mOhm
* Pre-charge FET
* Analysis Setup\n1000ms simulation in 1ms increments
* 15V Linear regulator
* System Load
.step param R5 list 100 1k 2k 5k
* Operating point:\nCurrent draw (battery engaged): 15uA\nCurrent draw (battery not engaged): 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 5144 2508
WIRE 352 416 112 416
WIRE 112 560 112 416
WIRE 1216 656 1072 656
WIRE 112 720 112 640
WIRE 224 720 112 720
WIRE 224 736 224 720
WIRE 1072 768 1072 656
WIRE 112 800 112 720
WIRE 352 800 112 800
WIRE 3024 928 2896 928
WIRE 1072 1024 1072 848
WIRE 1216 1024 1072 1024
WIRE 3024 1104 3024 928
WIRE 464 1216 176 1216
WIRE 1488 1232 1296 1232
WIRE 1664 1232 1488 1232
WIRE 1488 1312 1488 1232
WIRE 176 1360 176 1216
WIRE 3024 1376 3024 1184
WIRE 3024 1376 2896 1376
WIRE 1664 1472 1664 1232
WIRE 1488 1520 1488 1392
WIRE 1488 1520 1296 1520
WIRE 1648 1520 1488 1520
WIRE 1792 1520 1744 1520
WIRE 1872 1520 1792 1520
WIRE 2144 1520 1952 1520
WIRE 176 1584 176 1440
WIRE 464 1584 176 1584
FLAG 1296 1520 BMS_GND
FLAG 1296 1232 PRECHG_FET_EN
FLAG 2144 1520 SYSTEM_GND
FLAG 464 1216 CELL_10_POS
FLAG 464 1584 BMS_GND
FLAG 352 416 15VO
FLAG 352 800 BMS_GND
FLAG 1216 656 PRECHG_FET_EN
FLAG 1216 1024 BMS_GND
FLAG 2896 1376 SYSTEM_GND
FLAG 2896 928 CELL_10_POS
FLAG 224 736 0
FLAG 1792 1520 Vd
DATAFLAG 1488 1232 "$"
SYMBOL res 1472 1296 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL res 1968 1504 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL nmos 1744 1472 R90
SYMATTR InstName M2
SYMATTR Value BSS123
SYMBOL battery 176 1344 R0
SYMATTR InstName V1
SYMATTR Value 30
SYMATTR SpiceLine Rser=500m
SYMBOL voltage 112 544 R0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage 1072 752 R0
SYMATTR InstName V3
SYMATTR Value PWL(0 0 .005 0 .0051 15 .05 15 .0501 0)
SYMBOL res 3008 1088 R0
SYMATTR InstName R_SYSTEM
SYMATTR Value 10
TEXT 88 968 Left 2 !.tran 1m 150m uic
TEXT 88 1128 Left 2 ;Battery simulation\nInternal resistance: ~100mOhm per cell, *10/2 (because 10S2P) = 500mOhm
TEXT 1120 1120 Left 2 ;Pre-charge FET
TEXT 80 888 Left 2 ;Analysis Setup\n1000ms simulation in 1ms increments
TEXT 72 336 Left 2 ;15V Linear regulator
TEXT 2616 848 Left 2 ;System Load
TEXT 1864 1392 Left 2 !.step param R5 list 100 1k 2k 5k
TEXT 1800 600 Left 2 ;Operating point:\nCurrent draw (battery engaged): 15uA\nCurrent draw (battery not engaged): 0
RECTANGLE Normal 60 1088 996 1644 2
RECTANGLE Normal 1068 1084 2372 1648 2
RECTANGLE Normal 40 872 564 1064 2
RECTANGLE Normal 32 300 592 832 2
RECTANGLE Normal 2580 824 3200 1448 2