Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG772.asc
* Generated by LTspice 26.0.1 for Windows.
V1 vSA 0 2
V2 vSB 0 0
V3 vIN 0 PULSE(0 3 0 1n 1n 20u 40u)
R1 vD 0 301
C1 vD 0 36p
V4 +V 0 3.3
XU1 vIN vSA vD vSB +V 0 ADG772 ;pnba IN)SA)D)SB)Vdd)GND
.tran 100u
* Notes:\nSwitch shown for a logic 0 input\nOnly one channel is modeled\nBandwidth is 424 MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG772.asy)
.lib ADG772.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1728 -272 -2032 -272
WIRE -1696 -272 -1728 -272
WIRE -2032 -256 -2032 -272
WIRE -1472 -240 -1504 -240
WIRE -1424 -240 -1472 -240
WIRE -1312 -240 -1424 -240
WIRE -1424 -224 -1424 -240
WIRE -1312 -224 -1312 -240
WIRE -1728 -208 -1920 -208
WIRE -1696 -208 -1728 -208
WIRE -1920 -192 -1920 -208
WIRE -2032 -160 -2032 -176
WIRE -1728 -144 -1776 -144
WIRE -1696 -144 -1728 -144
WIRE -1424 -128 -1424 -144
WIRE -1312 -128 -1312 -160
WIRE -1920 -96 -1920 -112
WIRE -1776 -80 -1776 -144
WIRE -1600 -16 -1600 -32
WIRE -1776 32 -1776 0
FLAG -2032 -160 0
FLAG -1920 -96 0
FLAG -1776 32 0
FLAG -1600 -368 +V
FLAG -1424 -128 0
FLAG -1600 -16 0
FLAG -1312 -128 0
FLAG -2208 -176 0
FLAG -2208 -256 +V
FLAG -1728 -272 vSA
FLAG -1728 -208 vSB
FLAG -1728 -144 vIN
FLAG -1472 -240 vD
SYMBOL voltage -2032 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL voltage -1920 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage -1776 -96 R0
WINDOW 3 24 136 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 1n 1n 20u 40u)
SYMATTR InstName V3
SYMBOL res -1440 -240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL cap -1328 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -2208 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 3.3
SYMBOL ADG772 -1600 -192 R0
SYMATTR InstName U1
TEXT -1480 -24 Left 2 !.tran 100u
TEXT -2056 -584 Left 2 ;Notes:\nSwitch shown for a logic 0 input\nOnly one channel is modeled\nBandwidth is 424 MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\2b0549bdce96_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 N001 10n
V1 N001 0 AC 1
R1 N002 0 {R1}
.ac oct 1100 1 100E4
.step param R1 1k 100k 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 304 96 304
WIRE 368 304 320 304
WIRE 96 320 96 304
SYMBOL cap 320 288 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 352 288 R0
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL voltage 96 304 R0
SYMATTR InstName V1
SYMATTR Value AC 1
FLAG 96 400 0
FLAG 368 384 0
TEXT 520 328 Left 2 !.ac oct 1100 1 100E4
TEXT 528 360 Left 2 !.step param R1 1k 100k 10k
* Z:\home\khalils\Downloads\files\data\raw_asc\279d9e2ec2e7_class_phi2_paper.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 N002 62.7n
C2 0 N006 95.7p
V2 N001 0 24
C3 0 N002 290p
L3 N002 N003 357n
D1 0 N002 D_ideal
S1 N002 0 0 N005 MYSW
C1 N004 N003 96.5p
L2 N002 N006 80n
R1 N004 0 25
V1 0 N005 PULSE(0 10 0 1n 1n 11n 36n)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model MYSW SW(Ron=30m Roff=1Meg Vt=5 Vh=-.4)
.tran 0 50u 49u
.model D_ideal D(Ron=0.1n Roff=1G Vfwd=0.7)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 192 64 112 64
WIRE 320 64 272 64
WIRE 400 64 320 64
WIRE 560 64 400 64
WIRE 640 64 560 64
WIRE 736 64 640 64
WIRE 848 64 816 64
WIRE 928 64 912 64
WIRE 112 80 112 64
WIRE 640 80 640 64
WIRE 928 128 928 64
WIRE 112 176 112 160
WIRE 320 176 320 64
WIRE 400 176 400 64
WIRE 272 192 208 192
WIRE 560 192 560 64
WIRE 640 192 640 160
WIRE 224 272 208 272
WIRE 272 272 272 240
WIRE 272 272 224 272
WIRE 320 272 320 256
WIRE 400 272 400 240
WIRE 560 272 560 256
WIRE 640 272 640 256
WIRE 928 272 928 208
WIRE 224 288 224 272
SYMBOL ind 176 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 62.7n
SYMBOL voltage 208 288 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 10 0 1n 1n 11n 36n)
SYMBOL cap 912 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 96.5p
SYMBOL sw 320 160 R0
WINDOW 0 -36 4 Left 2
WINDOW 3 -18 142 Left 2
SYMATTR InstName S1
SYMATTR Value MYSW
SYMBOL diode 416 240 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value D_ideal
SYMBOL voltage 112 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 24
SYMBOL cap 576 256 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value 290p
SYMBOL res 912 112 R0
SYMATTR InstName R1
SYMATTR Value 25
SYMBOL cap 656 256 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 95.7p
SYMBOL ind 720 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L3
SYMATTR Value 357n
SYMBOL ind 624 64 R0
SYMATTR InstName L2
SYMATTR Value 80n
FLAG 320 272 0
FLAG 560 272 0
FLAG 640 272 0
FLAG 112 176 0
FLAG 928 272 0
FLAG 224 288 0
FLAG 400 272 0
TEXT 192 352 Left 2 !.model MYSW SW(Ron=30m Roff=1Meg Vt=5 Vh=-.4)
TEXT -188 372 Left 2 !.tran 0 50u 49u
TEXT 200 384 Left 2 !.model D_ideal D(Ron=0.1n Roff=1G Vfwd=0.7)
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1021-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1021-5.asy)
V1 IN 0 12
R2 OUT N002 {50K*(1-x)}
D1 N001 N002 1N4148
XU1 IN 0 OUT N001 LT1021-5 ;pnba IN)GND)OUT)TRIM
R3 N002 0 {50K*x}
R1 OUT N001 27K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc TEMP -50 125 1
.step param X list .2 .5 .8
.lib LT1021-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1164 1128
WIRE -256 336 -432 336
WIRE -32 336 -64 336
WIRE 160 336 -32 336
WIRE 240 336 160 336
WIRE -432 352 -432 336
WIRE -32 352 -32 336
WIRE 160 352 160 336
WIRE -256 432 -288 432
WIRE -32 432 -64 432
WIRE 48 432 -32 432
WIRE 160 432 112 432
WIRE -432 448 -432 432
WIRE -288 464 -288 432
WIRE 160 528 160 512
SYMBOL res -48 336 R0
SYMATTR InstName R1
SYMATTR Value 27K
SYMBOL LT1021-5 -160 384 R0
SYMATTR InstName U1
SYMBOL diode 48 448 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 144 336 R0
SYMATTR InstName R2
SYMATTR Value {50K*(1-x)}
SYMBOL res 144 416 R0
SYMATTR InstName R3
SYMATTR Value {50K*x}
SYMBOL voltage -432 336 R0
SYMATTR InstName V1
SYMATTR Value 12
FLAG -432 448 0
FLAG -288 464 0
FLAG 240 336 OUT
FLAG -432 336 IN
FLAG 160 528 0
TEXT -200 528 Left 2 !.dc TEMP -50 125 1\n.step param X list .2 .5 .8
* Z:\home\khalils\Downloads\files\data\raw_asc\3120a96e7aba_NAND_4.asc
* Generated by LTspice 26.0.1 for Windows.
M3 out B VDD VDD P_50n l=50n w=1u
M7 out C VDD VDD P_50n l=50n w=1u
M8 out A VDD VDD P_50n l=50n w=1u
M9 out D VDD VDD P_50n l=50n w=1u
M10 N002 C N003 0 N_50n l=50n w=500n
M11 N001 B N002 0 N_50n l=50n w=500n
M12 out A N001 0 N_50n l=50n w=500n
M13 N003 D 0 0 N_50n l=50n w=500n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 6288 680
WIRE 912 -400 912 -416
WIRE 1168 -400 912 -400
WIRE 1168 -400 1168 -416
WIRE 1168 -368 1168 -400
WIRE 1168 -256 1168 -272
WIRE 1168 -144 1168 -160
WIRE 1168 -32 1168 -48
WIRE 1168 96 1168 64
WIRE 1456 -416 1168 -416
WIRE 1712 -416 1456 -416
WIRE 1840 -416 1712 -416
FLAG 1168 -464 VDD
FLAG 1456 -464 VDD
FLAG 912 -464 VDD
FLAG 1712 -464 VDD
FLAG 1168 -96 0
FLAG 1168 -208 0
FLAG 1168 -320 0
FLAG 1168 16 0
FLAG 1168 -512 VDD
FLAG 1456 -512 VDD
FLAG 1712 -512 VDD
FLAG 912 -512 VDD
IOPIN 912 -512 In
FLAG 1168 96 GND
IOPIN 1168 96 In
FLAG 1840 -416 out
IOPIN 1840 -416 Out
FLAG 864 -496 A
FLAG 1120 -288 A
FLAG 1120 -496 B
FLAG 1120 -176 B
FLAG 1408 -496 C
FLAG 1120 -64 C
FLAG 1664 -496 D
FLAG 1120 48 D
SYMBOL pmos4 1120 -416 M180
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M3
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL pmos4 1408 -416 M180
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M7
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL pmos4 864 -416 M180
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M8
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL pmos4 1664 -416 M180
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M9
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL nmos4 1120 -144 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M10
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 1120 -256 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M11
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 1120 -368 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M12
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 1120 -32 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M13
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
TEXT 1400 -280 Left 0 !.lib cmosedu_models.txt
* Z:\home\khalils\Downloads\files\data\raw_asc\27c282ee3742_Activity_22_NPN.asc
* Generated by LTspice 26.0.1 for Windows.
* BIBLIOTHEK
* PARAMETER
* ANALYSE
* Library below included based on ModelFile attribute of instance XOP484 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R2 IN1 N001 {R2}
R3 IN2 IN1 {R3}
VSS VSS 0 {VSS}
Vtri vin 0 PULSE(-0.92 0.68 0 0.5m 0.5m 1e-10 1m 4)
VDD VDD 0 {VDD}
Q1npn IN2 IN2 0 0 2N3904
R1 N001 vin {R1}
XOP484 0 N001 VDD VSS IN1 OP484 ;pnba In+)In-)V+)V-)OUT
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.inc elk.lib
.param VDD=5.0 VSS=-3.3 VDD33=3.3
.tran 2m
.param R1=2.2k R2=10k R3=1k
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1408 680
WIRE -1504 -304 -1568 -304
WIRE -1312 -304 -1376 -304
WIRE -1568 -208 -1568 -304
WIRE -1376 -208 -1376 -304
WIRE -1568 -48 -1568 -128
WIRE -1376 -48 -1376 -128
WIRE -928 64 -1024 64
WIRE -816 64 -848 64
WIRE -752 64 -816 64
WIRE -896 128 -928 128
WIRE -896 144 -896 128
WIRE -1120 160 -1152 160
WIRE -1024 160 -1024 64
WIRE -1024 160 -1040 160
WIRE -928 160 -1024 160
WIRE -816 176 -816 64
WIRE -816 176 -864 176
WIRE -768 176 -816 176
WIRE -656 176 -688 176
WIRE -608 176 -656 176
WIRE -928 192 -1008 192
WIRE -1152 240 -1152 160
WIRE -896 240 -896 208
WIRE -896 240 -928 240
WIRE -1008 288 -1008 192
WIRE -656 288 -656 176
WIRE -656 288 -752 288
WIRE -656 320 -656 288
WIRE -752 368 -752 288
WIRE -720 368 -752 368
WIRE -1152 384 -1152 320
WIRE -656 480 -656 416
IOPIN -928 128 In
IOPIN -928 240 In
IOPIN -1504 -304 Out
IOPIN -1312 -304 Out
IOPIN -608 176 Out
IOPIN -752 64 Out
SYMBOL voltage -1376 -224 M0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VSS
SYMATTR Value {VSS}
SYMBOL Misc/EuropeanResistor -672 160 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R3
SYMATTR Value {R3}
SYMBOL Misc/EuropeanResistor -832 48 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL Misc/EuropeanResistor -1024 144 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL UniversalOpamp2 -896 176 R0
WINDOW 0 13 43 Left 2
SYMATTR InstName OP484
SYMATTR SpiceModel ""
SYMATTR Value2 ""
SYMATTR SpiceLine ""
SYMATTR SpiceLine2 ""
SYMATTR Value OP484
SYMBOL voltage -1152 224 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vtri
SYMATTR Value PULSE(-0.92 0.68 0 0.5m 0.5m 1e-10 1m 4)
SYMBOL voltage -1568 -224 M0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VDD
SYMATTR Value {VDD}
SYMBOL npn -720 320 R0
SYMATTR InstName Q1npn
SYMATTR Value 2N3904
SYMATTR Prefix ""
FLAG -928 128 VDD
FLAG -928 240 VSS
FLAG -656 480 0
FLAG -1008 288 0
FLAG -1568 -48 0
FLAG -1504 -304 VDD
FLAG -1376 -48 0
FLAG -1312 -304 VSS
FLAG -608 176 IN2
FLAG -752 64 IN1
FLAG -1152 384 0
FLAG -1152 160 vin
TEXT -1152 -272 Left 2 !.inc elk.lib
TEXT -1152 -192 Left 2 !.param VDD=5.0 VSS=-3.3 VDD33=3.3
TEXT -1152 -64 Left 2 !.tran 2m
TEXT -1152 -152 Left 2 !.param R1=2.2k R2=10k R3=1k
TEXT -1144 -304 Left 2 ;BIBLIOTHEK
TEXT -1144 -216 Left 2 ;PARAMETER
TEXT -1144 -88 Left 2 ;ANALYSE
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP5301-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP5301-3.asy)
XU1 IN IN 0 0 OUT N001 0 0 N002 ADP5301 OVO=1 OD=1 ;pnba EN)PVin)Sync/Mode)VID)FB)VoutOK)Pgnd)Agnd)SW
R1 OUT N001 1Meg
L1 N002 OUT 2.2 Rser=80m
C1 OUT 0 10
Rload OUT 0 80
V1 IN 0 5
.tran .6m startup
.lib ADP5301.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 64 64 64
WIRE 160 64 144 64
WIRE 496 64 416 64
WIRE 608 64 576 64
WIRE 64 80 64 64
WIRE 144 144 144 64
WIRE 160 144 144 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 608 144 608 64
WIRE 608 144 560 144
WIRE 688 144 608 144
WIRE 608 160 608 144
WIRE 688 160 688 144
WIRE 64 176 64 160
WIRE 160 224 144 224
WIRE 560 224 560 144
WIRE 560 224 416 224
WIRE 608 256 608 224
WIRE 688 256 688 240
WIRE 160 304 144 304
WIRE 432 304 416 304
WIRE 288 384 288 368
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL res 672 144 R0
SYMATTR Value 80
SYMATTR InstName Rload
SYMBOL cap 592 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=80m
SYMBOL ADP5301-3 288 192 R0
SYMATTR InstName U1
SYMBOL voltage 64 64 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 608 256 0
FLAG 432 304 0
FLAG 64 176 0
FLAG 688 144 OUT
FLAG 688 256 0
FLAG 64 64 IN
FLAG 288 384 0
FLAG 144 304 0
FLAG 144 224 0
TEXT 440 384 Left 2 !.tran .6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6656-1.25.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 0 1
V1 N001 0 PWL(0 0 1m 0 +100n 1.75)
XU1 0 N001 N002 LT6656-1.25 ;pnba GND)IN)OUT
.tran 20m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6656-1.25.asy)
.lib LT6656.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 836
WIRE 96 160 -176 160
WIRE 480 160 320 160
WIRE -176 176 -176 160
WIRE 480 176 480 160
WIRE 208 256 208 224
WIRE 480 256 480 240
WIRE -176 272 -176 256
FLAG 480 256 0
FLAG 208 256 0
FLAG -176 272 0
SYMBOL cap 464 176 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -176 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1m 0 +100n 1.75)
SYMBOL LT6656-1.25 208 160 R0
SYMATTR InstName U1
TEXT 448 344 Left 2 !.tran 20m
* Z:\home\khalils\Downloads\files\data\raw_asc\50bfef822237_Saturation_Type.asc
* Generated by LTspice 26.0.1 for Windows.
* SATURATION TYPE
* PRECISION RECTIFIER
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
V1 N004 0 SINE(0 5 1k)
V3 N001 0 12
R1 N002 0 10k
V2 0 N005 12
XU1 N004 N002 N001 N005 N003 LT1001 ;pnba In+)In-)V+)V-)OUT
D1 N003 N002 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 20m 10m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 -64 176 -64
WIRE 288 -64 272 -64
WIRE 320 0 80 0
WIRE 416 0 320 0
WIRE 320 32 320 0
WIRE 416 112 416 0
WIRE 176 128 176 -64
WIRE 80 144 80 0
WIRE 144 144 80 144
WIRE 320 160 320 96
WIRE 320 160 208 160
WIRE 144 176 -48 176
WIRE -48 192 -48 176
WIRE 416 224 416 192
WIRE 176 256 176 192
WIRE -48 288 -48 272
WIRE 176 352 176 336
SYMBOL voltage 176 -64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V3
SYMATTR Value 12
SYMBOL res 400 96 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage 176 352 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL Opamps\\OP07 176 96 R0
SYMATTR InstName U1
SYMBOL voltage -48 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1k)
SYMBOL diode 336 96 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG 416 224 0
FLAG 176 352 0
FLAG 288 -64 0
FLAG -48 288 0
TEXT -136 -32 Left 2 ;SATURATION TYPE
TEXT -160 -64 Left 2 ;PRECISION RECTIFIER
TEXT 288 288 Left 2 !.tran 0 20m 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\AD4003.asc
* Generated by LTspice 26.0.1 for Windows.
V6 N002 0 1.8
V1 N003 0 PWL(0 0 100u 5)
R1 N004 N003 10
C1 0 N005 10p
V4 N008 0 PULSE(0 1.8 227n 0.1n 0.1n 40n 500n)
V3 N001 0 5
V2 N007 0 PWL(0 5 100u 0)
R2 N006 N007 10
XU1 N001 N002 N004 MP_01 0 N006 N005 N008 AD4003 EN_Hi_Z=1 ;pnba REF)Vdd)IN+))GND)IN-)Vout)CNV
.tran 110u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\AD4003.asy)
.lib AD4003.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1252
WIRE 704 224 368 224
WIRE 832 224 784 224
WIRE 368 288 368 224
WIRE 704 336 496 336
WIRE 832 336 784 336
WIRE -192 368 -240 368
WIRE -80 368 -112 368
WIRE 80 368 0 368
WIRE 80 416 80 368
WIRE 144 416 80 416
WIRE 560 432 496 432
WIRE 688 432 624 432
WIRE 144 448 80 448
WIRE -192 496 -240 496
WIRE -80 496 -112 496
WIRE 80 496 80 448
WIRE 80 496 0 496
WIRE 704 528 496 528
WIRE 816 528 784 528
WIRE 368 608 368 576
FLAG 368 608 0
FLAG 832 336 0
FLAG -240 368 0
FLAG 688 432 0
FLAG 816 528 0
FLAG 832 224 0
FLAG -240 496 0
SYMBOL voltage 688 336 M90
WINDOW 0 47 41 VRight 2
WINDOW 3 -44 39 VRight 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V6
SYMATTR Value 1.8
SYMBOL voltage -96 368 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 100u 5)
SYMBOL res 16 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL cap 624 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 688 528 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 1.8 227n 0.1n 0.1n 40n 500n)
SYMBOL voltage 688 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -96 496 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 5 100u 0)
SYMBOL res 16 480 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL AD4003 400 432 R0
SYMATTR InstName U1
TEXT 192 616 Left 2 !.tran 110u
* Z:\tmp\asc_dec_bjh7r6w2\04f32ae3f5ee_bulb_curve_tracer_circuit_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N004 N001 VCC 0 N002 LT1638 ;pnba In+)In-)V+)V-)OUT
R1 B 0 10
V1 VCC 0 25
Rlamp1 A B R=rcold*10**((V(T)+T0n)/(6*T0n))
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1638.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1952 844
WIRE -400 -304 -464 -304
WIRE -352 -304 -400 -304
WIRE 32 -304 -272 -304
WIRE -304 -176 -304 -192
WIRE -400 -160 -400 -304
WIRE -336 -160 -400 -160
WIRE -240 -144 -272 -144
WIRE -128 -144 -160 -144
WIRE -336 -128 -400 -128
WIRE -864 -96 -864 -144
WIRE -304 -80 -304 -112
WIRE -64 -48 -64 -96
WIRE 32 -48 32 -304
WIRE 32 -48 -64 -48
WIRE -864 16 -864 -16
WIRE 32 32 32 -48
WIRE 160 32 32 32
WIRE 32 80 32 32
WIRE 32 96 32 80
WIRE 32 192 32 176
WIRE -400 224 -400 -128
WIRE 32 240 32 192
WIRE 160 240 32 240
WIRE 32 304 32 240
WIRE 160 304 32 304
WIRE 32 336 32 304
WIRE 32 448 32 416
WIRE 32 448 -400 448
WIRE 160 448 32 448
WIRE 32 512 32 448
SYMBOL OpAmps\\LT1638 -304 -208 R0
WINDOW 3 47 138 Left 2
SYMATTR InstName U1
SYMBOL res 16 320 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage -864 -112 R0
WINDOW 3 38 81 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 25
SYMATTR InstName V1
SYMBOL res 48 80 M0
WINDOW 3 -139 -166 Right 2
WINDOW 0 -102 53 Left 2
SYMATTR Value R=rcold*10**((V(T)+T0n)/(6*T0n))
SYMATTR InstName Rlamp1
FLAG 32 512 0
FLAG 32 80 A
FLAG 32 192 B
FLAG -304 -80 0
FLAG -864 16 0
FLAG -864 -144 VCC
FLAG -304 -192 VCC
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4122C.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4122C.asy)
V2 N002 0 15
XU1 N001 N003 0 0 N004 N002 0 N005 ADuM4122x Vrun2=11.2 ;pnba Vdd1)Vin)GND1)GND2)Vout)Vdd2)_SRC)Vout_SRC
C1 GATE 0 2n
V1 N001 0 5
V3 N003 0 PULSE(0 5 0 2n 2n 998n 2u)
R1 GATE N004 10
R2 GATE N005 10
.tran 10u
.lib ADuM4122x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -16 0 -16
WIRE 448 -16 320 -16
WIRE 0 0 0 -16
WIRE 448 0 448 -16
WIRE 160 48 160 -16
WIRE 320 48 320 -16
WIRE 0 96 0 80
WIRE 448 96 448 80
WIRE 112 160 -288 160
WIRE 400 160 368 160
WIRE 496 160 480 160
WIRE 544 160 496 160
WIRE 576 160 544 160
WIRE -288 176 -288 160
WIRE 544 176 544 160
WIRE 112 240 96 240
WIRE 400 240 368 240
WIRE 496 240 496 160
WIRE 496 240 480 240
WIRE 544 256 544 240
WIRE -288 272 -288 256
WIRE 160 352 160 336
WIRE 320 352 320 336
SYMBOL ADuM4122C 240 160 R0
SYMATTR InstName U1
SYMBOL voltage -288 160 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 2n 2n 998n 2u)
SYMBOL res 496 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL res 496 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL cap 528 176 R0
WINDOW 0 35 16 Left 2
WINDOW 3 36 51 Left 2
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL voltage 448 -16 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage 0 -16 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 544 256 0
FLAG 576 160 GATE
FLAG 448 96 0
FLAG 0 96 0
FLAG -288 272 0
FLAG 320 352 0
FLAG 160 352 0
FLAG 96 240 0
TEXT 416 336 Left 2 !.tran 10u