* Z:\home\khalils\Downloads\files\data\raw_asc\1c70bfb2ec57_xor2.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N002 notA 0 0 NMOS
M2 Xor_out A N002 N002 NMOS
M3 Xor_out notB N002 N002 NMOS
M4 N002 B 0 0 NMOS
M9 notA A Vdd Vdd PMOS
M10 notA A 0 0 NMOS
M11 notB B Vdd Vdd PMOS
M12 notB B 0 0 NMOS
V1 Vdd 0 5
V2 A 0 PULSE(0 5 1n 0.1n 0.1n 5n 10n)
V3 B 0 PULSE(0 5 11n 0.1n 0.1n 10n 20n)
V_pnmos N001 Xor_out 0
M5 N001 0 Vdd Vdd PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 70n
.model pmos pmos w=10u
.model nmos nmos w=80u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1108 756
WIRE -864 -144 -928 -144
WIRE -848 -144 -864 -144
WIRE 144 -112 112 -112
WIRE 176 -112 144 -112
WIRE -928 -96 -928 -144
WIRE 176 -80 176 -112
WIRE 128 -64 96 -64
WIRE 96 -48 96 -64
WIRE -928 16 -928 -16
WIRE 176 64 176 16
WIRE 704 64 672 64
WIRE 720 64 704 64
WIRE -944 80 -992 80
WIRE -928 80 -944 80
WIRE -992 128 -992 80
WIRE 672 128 672 64
WIRE 816 144 720 144
WIRE 176 192 176 144
WIRE 272 192 176 192
WIRE 304 192 272 192
WIRE 672 224 656 224
WIRE -992 256 -992 208
WIRE -368 256 -384 256
WIRE -336 256 -368 256
WIRE 176 256 176 192
WIRE 176 256 16 256
WIRE 368 256 176 256
WIRE -336 320 -336 256
WIRE 816 320 816 144
WIRE 864 320 816 320
WIRE 928 320 864 320
WIRE -960 336 -1008 336
WIRE -928 336 -960 336
WIRE -384 336 -480 336
WIRE -32 336 -64 336
WIRE 544 336 416 336
WIRE 656 336 656 224
WIRE 656 336 544 336
WIRE 176 352 16 352
WIRE 368 352 176 352
WIRE -1008 368 -1008 336
WIRE 656 400 656 336
WIRE -320 416 -336 416
WIRE 176 448 176 352
WIRE 176 448 16 448
WIRE 368 448 176 448
WIRE -1008 480 -1008 448
WIRE 816 480 816 320
WIRE 816 480 704 480
WIRE -480 496 -480 336
WIRE -480 496 -512 496
WIRE -320 528 -320 416
WIRE -208 528 -320 528
WIRE -32 528 -208 528
WIRE 480 528 416 528
WIRE 176 544 16 544
WIRE 368 544 176 544
WIRE 656 544 656 496
WIRE -320 592 -320 528
WIRE 176 592 176 544
WIRE -480 672 -480 496
WIRE -368 672 -480 672
WIRE -320 736 -320 688
FLAG 176 592 0
FLAG -320 736 0
FLAG -368 256 Vdd
FLAG 656 544 0
FLAG 704 64 Vdd
FLAG -928 16 0
FLAG -864 -144 Vdd
FLAG -992 256 0
FLAG -1008 480 0
FLAG -944 80 A
FLAG -960 336 B
FLAG -64 336 A
FLAG -512 496 A
FLAG -208 528 notA
FLAG 480 528 B
FLAG 864 320 B
FLAG 272 192 Xor_out
FLAG 544 336 notB
FLAG 144 -112 Vdd
FLAG 96 -48 0
SYMBOL nmos -32 448 R0
SYMATTR InstName M1
SYMBOL nmos -32 256 R0
SYMATTR InstName M2
SYMBOL nmos 416 256 M0
SYMATTR InstName M3
SYMBOL nmos 416 448 M0
SYMATTR InstName M4
SYMBOL pmos -384 416 M180
SYMATTR InstName M9
SYMBOL nmos -368 592 R0
SYMATTR InstName M10
SYMBOL pmos 720 224 R180
SYMATTR InstName M11
SYMBOL nmos 704 400 M0
SYMATTR InstName M12
SYMBOL voltage -928 -112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -992 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 1n 0.1n 0.1n 5n 10n)
SYMBOL voltage -1008 352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 11n 0.1n 0.1n 10n 20n)
SYMBOL voltage 176 48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V_pnmos
SYMATTR Value 0
SYMBOL pmos 128 16 M180
SYMATTR InstName M5
TEXT -1040 616 Left 2 !.tran 70n
TEXT 592 656 Left 2 !.model pmos pmos w=10u\n.model nmos nmos w=80u