Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT2940.asc
* Generated by LTspice 26.0.1 for Windows.
* 60W Load Power Alarm
* 2W
* Scale = 10 Amps/Volt
* Scale = 48 Watts/Volt
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT2940.asy)
R5 IMON 0 10.0K
R4 PMON 0 49.9K
Vpup N002 0 5
R1 N003 0 10.0K
R3 N002 OVRPWR 100K
Iload LOAD 0 PWL(0 0 120m 12)
R2 LOAD N003 110K
XU1 OVRPWR N004 PMON PMON IMON 0 0 N003 N001 LOAD IN IN LT2940 ;pnba _CmpOut)CmpOut)Cmp+)Pmon)Imon)Gnd)V-)V+)Latch)I-)I+)Vcc
Rsense IN LOAD 10m pwr=2W
Vin IN 0 6
.tran 120m startup
.step Vin list 6 10 15 30 60
.lib LT2940.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE 128 -96 -48 -96
WIRE 240 -96 128 -96
WIRE 256 -96 240 -96
WIRE 352 -96 336 -96
WIRE 480 -96 352 -96
WIRE 624 -96 480 -96
WIRE -48 -80 -48 -96
WIRE 624 -80 624 -96
WIRE 128 -16 128 -96
WIRE 240 -16 240 -96
WIRE 352 -16 352 -96
WIRE 480 0 480 -96
WIRE -48 16 -48 0
WIRE 624 16 624 0
WIRE 48 64 16 64
WIRE -64 112 -336 112
WIRE 480 112 480 80
WIRE 480 112 432 112
WIRE -336 128 -336 112
WIRE -64 128 -64 112
WIRE 48 144 16 144
WIRE 480 144 480 112
WIRE -336 224 -336 208
WIRE -64 224 -64 208
WIRE -64 224 -112 224
WIRE 48 224 -64 224
WIRE 480 256 480 224
WIRE 480 256 432 256
WIRE 480 272 480 256
WIRE 48 304 0 304
WIRE 240 400 240 384
WIRE 0 416 0 304
WIRE 0 416 -32 416
WIRE 128 416 128 384
WIRE 128 416 0 416
WIRE 352 416 352 384
WIRE 384 416 352 416
WIRE 128 432 128 416
WIRE 352 432 352 416
WIRE 128 528 128 512
WIRE 352 528 352 512
SYMBOL current 624 -80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Iload
SYMATTR Value PWL(0 0 120m 12)
SYMBOL res 112 416 R0
SYMATTR InstName R4
SYMATTR Value 49.9K
SYMBOL res -80 112 R0
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res 240 -80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rsense
SYMATTR Value 10m
SYMATTR SpiceLine pwr=2W
SYMBOL voltage -48 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vin
SYMATTR Value 6
SYMBOL res 464 128 R0
SYMATTR InstName R1
SYMATTR Value 10.0K
SYMBOL res 336 416 R0
SYMATTR InstName R5
SYMATTR Value 10.0K
SYMBOL LT2940 240 144 R0
SYMATTR InstName U1
SYMBOL res 464 -16 R0
SYMATTR InstName R2
SYMATTR Value 110K
SYMBOL voltage -336 112 R0
SYMATTR InstName Vpup
SYMATTR Value 5
FLAG 240 400 0
FLAG 128 528 0
FLAG 352 528 0
FLAG 480 272 0
FLAG -336 224 0
FLAG -48 16 0
FLAG -32 416 PMON
FLAG 384 416 IMON
FLAG 624 -96 LOAD
FLAG -48 -96 IN
FLAG 624 16 0
FLAG -112 224 OVRPWR
TEXT 528 464 Left 2 !.tran 120m  startup\n.step Vin list 6 10 15 30 60
TEXT 264 -184 Bottom 2 ;60W Load Power Alarm
TEXT 296 -40 Center 2 ;2W
TEXT 480 416 Left 2 ;Scale = 10 Amps/Volt
TEXT 32 456 Right 2 ;Scale = 48 Watts/Volt
* Z:\home\khalils\Downloads\files\data\raw_asc\1220309484f6_circuito.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 Vi 1.5
R1 Vo 0 1
L2 Vo N001 0.5
V1 Vi 0 AC 1 0
C1 N001 0 1.3333
.param f = w/(2*pi)
.step dec param w 0.01 100 30
.ac list {f}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 96 -96 96
WIRE 176 96 128 96
WIRE 240 96 176 96
WIRE 400 96 320 96
WIRE 480 96 400 96
WIRE -96 144 -96 96
WIRE 176 144 176 96
WIRE 400 144 400 96
WIRE -96 288 -96 224
WIRE 176 288 176 208
WIRE 176 288 -96 288
WIRE 400 288 400 224
WIRE 400 288 176 288
SYMBOL ind 336 80 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L2
SYMATTR Value 0.5
SYMBOL res 384 128 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL voltage -96 128 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMBOL ind 144 80 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value 1.5
SYMBOL cap 160 144 R0
SYMATTR InstName C1
SYMATTR Value 1.3333
FLAG 480 96 Vo
FLAG -96 96 Vi
FLAG 176 288 0
TEXT 520 160 Left 2 !.param f = w/(2*pi)\n.step dec param w 0.01 100 30\n.ac list {f}
* Z:\home\khalils\Downloads\files\data\raw_asc\dd21097d0afd_AnalogFrontend.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
XU1 0 N001 V+ V- N004 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R2 N004 N001 11k
V3 V+ 0 4.5
R1 N001 N003 30k
R3 N002 N004 100k
XU2 N005 N002 V+ V- OUT level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V4 V- 0 -4.5
V2 N005 0 0.825
R4 OUT N002 100k
V1 N003 0 SINE(0 4.5 10k)
.tran 1m
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1356 680
WIRE 464 -96 352 -96
WIRE 880 -32 736 -32
WIRE 256 32 192 32
WIRE 352 32 352 -96
WIRE 352 32 336 32
WIRE 448 32 352 32
WIRE 192 48 192 32
WIRE 544 48 544 -96
WIRE 544 48 512 48
WIRE 624 48 544 48
WIRE 736 48 736 -32
WIRE 736 48 704 48
WIRE 800 48 736 48
WIRE 448 64 416 64
WIRE 960 64 960 -32
WIRE 960 64 864 64
WIRE 1056 64 960 64
WIRE 800 80 736 80
WIRE 416 96 416 64
WIRE 736 96 736 80
IOPIN 480 80 In
IOPIN 832 96 In
IOPIN 736 -272 Out
IOPIN 480 16 In
IOPIN 832 32 In
IOPIN 864 -272 Out
IOPIN 1056 64 Out
SYMBOL voltage 192 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 4.5 10k)
SYMBOL res 560 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 11k
SYMBOL voltage 864 -288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -4.5
SYMBOL res 976 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL res 720 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL OpAmps\\UniversalOpAmp 832 64 R0
SYMATTR InstName U2
SYMBOL OpAmps\\UniversalOpAmp 480 48 R0
SYMATTR InstName U1
SYMBOL voltage 736 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0.825
SYMBOL res 352 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 30k
SYMBOL voltage 736 -288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 4.5
FLAG 736 176 0
FLAG 192 128 0
FLAG 480 80 V-
FLAG 832 96 V-
FLAG 736 -272 V+
FLAG 480 16 V+
FLAG 832 32 V+
FLAG 416 96 0
FLAG 736 -192 0
FLAG 864 -272 V-
FLAG 864 -192 0
FLAG 1056 64 OUT
TEXT 136 192 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\2fdd5d569226_Draft4.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 0 NMOS
V2 N001 0 5
V1 N002 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V1 0 5 0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 96 208 96
WIRE 160 144 0 144
WIRE 160 176 160 144
WIRE 208 192 128 192
WIRE 128 224 128 192
WIRE 128 224 0 224
WIRE 384 224 384 176
WIRE 384 224 128 224
WIRE 128 240 128 224
SYMBOL voltage 384 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL nmos 160 96 R0
SYMATTR InstName M1
SYMBOL voltage 0 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 128 240 0
TEXT -34 264 Left 2 !.dc V1 0 5 0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1584-3.6.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1584-3.6.asy)
C1 OUT 0 22
XU1 0 OUT IN LT1584-3.6 ;pnba GND)OUT)IN
Rload OUT 0 500
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT1584.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 176 -160 176
WIRE 368 176 288 176
WIRE 464 176 368 176
WIRE -160 192 -160 176
WIRE 368 192 368 176
WIRE 464 192 464 176
WIRE -160 288 -160 272
WIRE 368 288 368 256
WIRE 464 288 464 272
WIRE 160 304 160 272
SYMBOL voltage -160 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL PowerProducts\\LT1584-3.6 160 176 R0
SYMATTR InstName U1
SYMBOL cap 352 192 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 448 176 R0
SYMATTR InstName Rload
SYMATTR Value 500
FLAG -160 288 0
FLAG 368 288 0
FLAG 464 288 0
FLAG 160 304 0
FLAG -160 176 IN
FLAG 464 176 OUT
TEXT 288 368 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\3da4ac9165bd_Draft5.asc
* Generated by LTspice 26.0.1 for Windows.
* .tran 1
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Contrib\Toshiba\lvmos\SSM3J352F_G0_00.asy)
R9 N009 0 10k
R8 N002 N007 100
R3 N003 0 1
R4 N002 N001 10k
Q1 N008 N009 0 0 2N2222
D2 N009 N006 BZX84C12L
R6 P001 N008 10k
R1 N005 0 100k
XU1 N001 N005 N001 SSM3J352F_G0_00 ;pnba 1)2)3
V1 N001 0 SINE(0 13 60)
D1 P001 N001 EDZV10B
XU2 N003 N002 N001 SSM3J352F_G0_00 ;pnba 1)2)3
Q2 N007 N008 0 0 2N2222
R2 N001 N005 100k
R7 N001 N006 10k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 -20 20 .01
.lib Contrib/Toshiba/LVMOS/SSM3J352F_G0_00_enc.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1460 900
WIRE -176 -224 -592 -224
WIRE 16 -144 -16 -144
WIRE 432 -144 96 -144
WIRE 816 -144 432 -144
WIRE 816 -112 816 -144
WIRE -592 -64 -592 -224
WIRE -592 -64 -720 -64
WIRE -352 -64 -592 -64
WIRE -176 -64 -176 -224
WIRE -176 -64 -256 -64
WIRE -96 -64 -176 -64
WIRE -16 -64 -16 -144
WIRE -16 -64 -96 -64
WIRE 512 -64 -16 -64
WIRE 720 -64 512 -64
WIRE 800 -64 720 -64
WIRE 1024 -64 896 -64
WIRE 720 -48 720 -64
WIRE -272 16 -272 -16
WIRE -96 16 -272 16
WIRE 432 16 432 -144
WIRE 512 16 512 -64
WIRE -272 48 -272 16
WIRE 720 80 720 32
WIRE 1024 112 1024 -64
WIRE 432 128 432 96
WIRE 512 176 512 160
WIRE 512 176 496 176
WIRE 592 176 512 176
WIRE -720 192 -720 -64
WIRE 720 224 720 144
WIRE 720 224 656 224
WIRE 720 288 720 224
WIRE 592 384 592 272
WIRE -720 400 -720 272
WIRE -272 416 -272 128
WIRE 1024 416 1024 192
WIRE 720 432 720 368
WIRE 432 560 432 224
WIRE 1136 -96 0 0
SYMBOL Contrib\\Toshiba\\lvmos\\SSM3J352F_G0_00 -352 -16 R270
WINDOW 3 116 115 VLeft 2
SYMATTR InstName U1
SYMBOL res 1008 96 R0
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL res 416 0 R0
SYMATTR InstName R8
SYMATTR Value 100
SYMBOL zener 528 80 R180
WINDOW 0 24 64 Left 2
WINDOW 3 -128 71 Left 2
SYMATTR InstName D1
SYMATTR Value EDZV10B
SYMBOL npn 656 176 M0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL res -288 32 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res 704 272 R0
SYMATTR InstName R9
SYMATTR Value 10k
SYMBOL npn 496 128 M0
SYMATTR InstName Q2
SYMATTR Value 2N2222
SYMBOL res 112 -160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL zener 736 144 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value BZX84C12L
SYMBOL res 704 -64 R0
SYMATTR InstName R7
SYMATTR Value 10k
SYMBOL res -112 -80 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res 496 64 R0
SYMATTR InstName R6
SYMATTR Value 10k
SYMBOL voltage -720 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 13 60)
SYMBOL Contrib\\Toshiba\\lvmos\\SSM3J352F_G0_00 896 -112 R90
WINDOW 3 116 115 VLeft 2
SYMATTR InstName U2
FLAG -720 400 0
FLAG 432 560 0
FLAG -272 416 0
FLAG 1024 416 0
FLAG 592 384 0
FLAG 720 432 0
TEXT -672 360 Left 2 !.dc V1 -20 20 .01
TEXT -648 312 Left 2 ;.tran 1
* Z:\tmp\asc_dec_bjh7r6w2\1895853d91a4_Draft2_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 VDD 0 1.8
A9 N010 0 0 0 0 ~VCLK 0 0 BUF Vhigh = 1.8 Vlow = 0 Trise = {tff_rise} Tfall = {tff_rise} Td = {td_DFF}
A11 N006 N015 N009 N003 N016 N015 N007 N015 DFLOP Vhigh = 1.8 Vlow = 0 Trise = {tff_rise} Tfall = {tff_rise} Td = {td_DFF}
V3 VSS 0 0
A5 N004 N012 N008 N002 N013 N012 N005 N012 DFLOP Vhigh = 1.8 Vlow = 0 Trise = {tff_rise} Tfall = {tff_rise} Td = {td_DFF}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2628 680
WIRE -1632 -320 -1856 -320
WIRE -2144 -208 -2144 -272
WIRE -2000 -208 -2000 -272
WIRE -464 -176 -752 -176
WIRE -192 -176 -464 -176
WIRE 704 -176 352 -176
WIRE 1024 -176 704 -176
WIRE -464 -112 -464 -176
WIRE 704 -112 704 -176
WIRE -1856 -64 -1856 -320
WIRE -1776 -64 -1856 -64
WIRE -544 -64 -672 -64
WIRE -272 -64 -384 -64
WIRE 624 -64 432 -64
WIRE 848 -64 848 -352
WIRE 848 -64 784 -64
WIRE 944 -64 848 -64
WIRE -544 -16 -560 -16
WIRE -272 -16 -304 -16
WIRE 624 -16 592 -16
WIRE -1872 64 -1872 -16
WIRE -1872 64 -1952 64
WIRE -1456 64 -1872 64
WIRE -560 64 -560 -16
WIRE -560 64 -848 64
WIRE -304 64 -304 -16
WIRE -304 64 -560 64
WIRE 0 64 -304 64
WIRE 592 64 592 -16
WIRE 592 64 240 64
WIRE 912 64 592 64
WIRE -1872 80 -1872 64
WIRE -1776 96 -1776 32
WIRE -1696 96 -1696 32
WIRE -1696 96 -1776 96
WIRE -1424 96 -1696 96
WIRE -544 96 -544 32
WIRE -464 96 -464 32
WIRE -272 96 -272 32
WIRE 624 96 624 32
WIRE 704 96 704 32
WIRE -1952 224 -1952 64
WIRE -1952 336 -1952 288
WIRE -1952 352 -1952 336
SYMBOL voltage -2144 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL Digital\\inv -1888 224 R90
SYMATTR InstName A9
SYMATTR Value2 Vhigh = 1.8 Vlow = 0
SYMATTR SpiceLine Trise = {tff_rise} Tfall = {tff_rise} Td = {td_DFF}
SYMBOL Digital\\dflop 704 -112 R0
SYMATTR InstName A11
SYMATTR SpiceLine Trise = {tff_rise} Tfall = {tff_rise} Td = {td_DFF}
SYMATTR Value2 Vhigh = 1.8 Vlow = 0
SYMBOL voltage -2000 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 0
SYMBOL Digital\\dflop -464 -112 R0
SYMATTR InstName A5
SYMATTR SpiceLine Trise = {tff_rise} Tfall = {tff_rise} Td = {td_DFF}
SYMATTR Value2 Vhigh = 1.8 Vlow = 0
FLAG -2144 -128 0
FLAG -2144 -272 VDD
FLAG -1872 160 0
FLAG -1952 336 ~VCLK
FLAG -2000 -128 0
FLAG -2000 -272 VSS
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP150-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP150-2.8.asy)
XU1 IN 0 IN MP_01 OUT ADP150-x.x T=1.6Meg ;pnba Vin)GND)EN))Vout
V1 IN 0 5
Rload OUT 0 28
C1 OUT 0 1
.tran 500u startup
.lib ADP150-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 880 1696 880
WIRE 1984 880 1824 880
WIRE 1696 896 1696 880
WIRE 1984 896 1984 880
WIRE 1696 992 1696 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL VOLTAGE 1696 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 28
SYMBOL PowerProducts\\ADP150-2.8 1984 1024 R0
SYMATTR InstName U1
FLAG 2256 1024 OUT
FLAG 2256 1136 0
FLAG 1696 992 0
FLAG 1696 880 IN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 500u startup
* Z:\tmp\asc_dec_bjh7r6w2\129cbd24d63d_p2_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
Q7 N007 N003 N002 0 mypnp
Q15 N016 N007 N010 0 mypnp
Q11 N012 N009 N015 0 mynpn
Q8 N009 N008 N005 0 PNP
R2 Vout N013 100
Q14 N015 N012 N011 0 mypnp
V2 0 N015 10
Q6 N004 N004 N001 0 mypnp
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3304 880
WIRE -496 -816 -736 -816
WIRE 288 -816 -496 -816
WIRE 2208 -816 1136 -816
WIRE 2544 -816 2208 -816
WIRE -496 -720 -496 -816
WIRE 2208 -720 2208 -816
WIRE 2080 -688 1232 -688
WIRE -352 -672 -432 -672
WIRE 752 -672 -352 -672
WIRE 2080 -672 2080 -688
WIRE 2144 -672 2080 -672
WIRE 816 -576 816 -624
WIRE 816 -576 240 -576
WIRE -496 -560 -496 -624
WIRE -352 -560 -352 -672
WIRE -352 -560 -496 -560
WIRE 816 -528 816 -576
WIRE 832 -528 816 -528
WIRE 1152 -528 1072 -528
WIRE 2208 -496 2208 -624
WIRE 2368 -496 2208 -496
WIRE 960 -480 896 -480
WIRE 1008 -480 960 -480
WIRE 3136 -480 2848 -480
WIRE 3232 -480 3136 -480
WIRE 832 -432 816 -432
WIRE 2544 -368 2544 -480
WIRE 3136 -368 3136 -480
WIRE 2368 -320 2368 -496
WIRE 2480 -320 2368 -320
WIRE 2208 -304 2208 -496
WIRE 960 -240 960 -480
WIRE 960 -240 -736 -240
WIRE 816 -192 816 -432
WIRE 944 -192 816 -192
WIRE 2032 -192 2032 -304
WIRE 1072 -176 1072 -432
WIRE 1792 -176 1072 -176
WIRE 1792 -144 1792 -176
WIRE 1968 -144 1792 -144
WIRE 3136 -144 3136 -288
WIRE 816 -128 816 -192
WIRE 1072 -128 1072 -176
WIRE -496 -96 -496 -560
WIRE 944 -80 944 -192
WIRE 944 -80 880 -80
WIRE 1008 -80 944 -80
WIRE 1024 -80 1008 -80
WIRE 816 608 816 -32
WIRE 1072 608 1072 -32
WIRE 1424 608 1072 608
WIRE 2032 608 2032 -96
WIRE 2032 608 1424 608
WIRE 2544 608 2544 -272
SYMBOL pnp 2144 -624 M180
SYMATTR InstName Q7
SYMATTR Value mypnp
SYMBOL pnp 2480 -272 M180
SYMATTR InstName Q15
SYMATTR Value mypnp
SYMBOL npn 1008 -128 R0
SYMATTR InstName Q11
SYMATTR Value mynpn
SYMBOL pnp 896 -432 R180
SYMATTR InstName Q8
SYMBOL res 3120 -384 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL pnp 1968 -96 M180
SYMATTR InstName Q14
SYMATTR Value mypnp
SYMBOL voltage 1424 704 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 10
SYMBOL pnp -432 -624 R180
SYMATTR InstName Q6
SYMATTR Value mypnp
FLAG 1424 688 0
FLAG 3232 -480 Vout
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8065.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8065.asy)
V2 -V 0 -12
R2 OUT N001 499
Vin IN 0 SINE(0 1 10Meg) Rser=50
R4 N002 IN 249
V1 +V 0 12
XU2 N002 N001 +V -V OUT AD8065 ;pnba In+)In-)V+)V-)OUT
C1 OUT N001 2.2p
R1 N001 0 499
Rload OUT 0 1K
.tran 1u
.lib AD8065.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE 560 -1344 528 -1344
WIRE 640 -1344 624 -1344
WIRE 432 -1232 416 -1232
WIRE 528 -1232 528 -1344
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 640 -1344
WIRE 640 -1232 624 -1232
WIRE 48 -1168 32 -1168
WIRE 160 -1168 144 -1168
WIRE 32 -1152 32 -1168
WIRE 144 -1152 144 -1168
WIRE 592 -1152 576 -1152
WIRE 576 -1136 576 -1152
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 400 -1088 272 -1088
WIRE 544 -1088 480 -1088
WIRE 752 -1088 752 -1104
WIRE 272 -1072 272 -1088
WIRE 32 -1056 32 -1072
WIRE 144 -1056 144 -1072
WIRE 576 -1056 576 -1072
WIRE 592 -1056 576 -1056
WIRE 752 -992 752 -1008
WIRE 272 -976 272 -992
SYMBOL AD8065 576 -1168 R0
SYMATTR InstName U2
SYMBOL res 496 -1104 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 249
SYMBOL voltage 144 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL voltage 32 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 499
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL voltage 272 -1088 R0
WINDOW 123 24 138 Left 2
WINDOW 39 37 57 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10Meg)
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 499
SYMBOL cap 624 -1360 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2.2p
FLAG 32 -1168 +V
FLAG 272 -976 0
FLAG 752 -1104 OUT
FLAG 576 -1152 +V
FLAG 144 -1168 -V
FLAG 576 -1056 -V
FLAG 416 -1232 0
FLAG 752 -992 0
FLAG 144 -1056 0
FLAG 32 -1056 0
FLAG 272 -1088 IN
TEXT 696 -928 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\0975334c5376_buzzer.asc
* Generated by LTspice 26.0.1 for Windows.
* SIM\nBUZZER
* PRIMARY SPECIFICATIONS
* DESIGN ESTIMATIONS
* DERIVATIVE CALCULATIONS
* RESISTOR VALUES
* active low
* active low sim
* ---------------------\n2 supplies available,\n+ the relay uses 10mA\n@ 12V, ctrl is 0 to 5\n---------------------
R3 N002 0 {RLoad}
R1 N003 0 {R1}
V2 +5V 0 {Vcc}
R2 +12V N001 {R2}
Q2 N002 N001 +12V 0 2N3906
Q1 N001 +5V N003 0 2N3904
V1 +12V 0 {Vbb}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1m
.param ILoad=10mA
.param Vbb=12V
.param Vcc=5V
.param Q2Vce=0.2V Q2Vbe=0.7V Q2beta=50
.param Q1Vbe=0.6V Q1beta=200
.param RLoad=(Vbb-Q2Vce)/ILoad
.param Q2Ic=ILoad Q2Ib=ILoad/Q2beta
.param IR2=0.1*Q2Ib
.param Q1Ic=Q2Ib+IR2 Q1Ib=Q1Ic/Q1beta
.param Q1Ie=Q1Ic+Q1Ib
.param R2=Q2Vbe/IR2
.param R1=(Vcc-Q1Vbe)/Q1Ie
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -224 -32 -240 -32
WIRE -160 -240 -160 -272
WIRE -160 -112 -160 -160
WIRE -160 -80 -160 -112
WIRE -160 48 -160 16
WIRE -160 160 -448 160
WIRE -160 160 -160 128
WIRE -96 176 -96 160
WIRE -80 -448 -80 -480
WIRE -80 -336 -80 -368
WIRE -48 -112 -160 -112
WIRE 16 -160 16 -224
WIRE 16 -48 16 -64
WIRE 16 96 16 32
WIRE 96 -448 96 -480
WIRE 96 -336 96 -368
WIRE 160 160 -96 160
SYMBOL res 0 -64 R0
SYMATTR InstName R3
SYMATTR Value {RLoad}
SYMBOL res -176 -256 R0
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL res -176 32 R0
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL voltage 96 -464 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value {Vcc}
SYMBOL voltage -80 -464 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vbb}
SYMBOL pnp -48 -64 M180
SYMATTR InstName Q2
SYMATTR Value 2N3906
SYMBOL npn -224 -80 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
FLAG 16 -224 +12V
FLAG -160 -272 +12V
FLAG -80 -336 0
FLAG -80 -480 +12V
FLAG 96 -336 0
FLAG 16 96 0
FLAG 96 -480 +5V
FLAG -448 160 CTRL
FLAG 160 160 CTRL
FLAG -96 176 0
FLAG -240 -32 +5V
TEXT -882 128 Left 0 !.tran 1m
TEXT -880 -416 Left 0 !.param ILoad=10mA
TEXT -880 -480 Left 0 !.param Vbb=12V
TEXT -880 -448 Left 0 !.param Vcc=5V
TEXT 56 56 Left 0 ;SIM\nBUZZER
TEXT -896 -512 Left 0 ;PRIMARY SPECIFICATIONS
TEXT -896 -352 Left 0 ;DESIGN ESTIMATIONS
TEXT -880 -288 Left 0 !.param Q2Vce=0.2V Q2Vbe=0.7V Q2beta=50
TEXT -880 -320 Left 0 !.param Q1Vbe=0.6V Q1beta=200
TEXT -896 -192 Left 0 ;DERIVATIVE CALCULATIONS
TEXT -880 0 Left 0 !.param RLoad=(Vbb-Q2Vce)/ILoad
TEXT -880 -160 Left 0 !.param Q2Ic=ILoad Q2Ib=ILoad/Q2beta
TEXT -880 -256 Left 0 !.param IR2=0.1*Q2Ib
TEXT -880 -128 Left 0 !.param Q1Ic=Q2Ib+IR2 Q1Ib=Q1Ic/Q1beta
TEXT -880 -96 Left 0 !.param Q1Ie=Q1Ic+Q1Ib
TEXT -896 -32 Left 0 ;RESISTOR VALUES
TEXT -880 32 Left 0 !.param R2=Q2Vbe/IR2
TEXT -880 64 Left 0 !.param R1=(Vcc-Q1Vbe)/Q1Ie
TEXT -392 144 Left 0 ;active low
TEXT -88 144 Left 0 ;active low sim
TEXT -560 -480 Left 0 ;---------------------\n2 supplies available,\n+ the relay uses 10mA\n@ 12V, ctrl is 0 to 5\n---------------------