Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\e8dc6e4c905d_mosfet.asc
* Generated by LTspice 26.0.1 for Windows.
**********
*SRC=ARF463AB;ARF463AB;MOSFETs N;Enh;500V 9.0A 1.1ohms PPG Microsemi RF MOSFET
*SYM=POWMOSN
*09-14-09 Rev A GJK PPG Microsemi
* TERMINALS: D G S
*****
VDD VDD 0 125
R1 VDD N001 4
RD 11 1 1.1
LS 30 29 2n
V3 p 0 PULSE(0 1 0 1p 1p 1.25e-05 250e-6)
DSD 3 1 DSUB
D1 5 1 DGD
M1 1 2 3 3 DMOS L=1U W=1U
D2 5 2 DGD
CGS 2 3 1200p
LG 20 19 2.8n
R2 G 0 50
V2 r 0 PWL(0 0 10e-3 8)
B1 G 0 V=V(p)*V(r)
LD 10 11 2n
RS 29 3 2.25m
RG 19 2 .5
XM1 N001 G 0 ARF463AB ;pnba D)G)S
.tran 0 10e-3 0
.SUBCKT ARF463AB 10 20 30
.MODEL DMOS NMOS(LEVEL=3 VMAX=1.04Meg THETA=100.0m ETA=2.00m VTO=3.00 KP=2.60)
.MODEL DSUB D (IS=1.27u N=1.50 RS=5.00m BV=500 CJO=799p VJ=0.800 M=0.420 TT=311n)
.MODEL DGD D (IS=100n N=1.5 RS=10m BV=500 CJO=81.7p M=.5 VJ=.700 TT=1n)
.ENDS
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -480 -784 -624 -784
WIRE -432 -784 -480 -784
WIRE -384 -784 -432 -784
WIRE -480 -736 -480 -784
WIRE -624 -720 -624 -784
WIRE -624 -624 -624 -640
WIRE -1408 -576 -1408 -592
WIRE -1152 -560 -1152 -592
WIRE -480 -560 -480 -656
WIRE -1408 -544 -1408 -576
WIRE -1152 -544 -1152 -560
WIRE -752 -480 -960 -480
WIRE -576 -480 -752 -480
WIRE -528 -480 -576 -480
WIRE -1408 -448 -1408 -464
WIRE -1152 -448 -1152 -464
WIRE -752 -432 -752 -480
WIRE -480 -400 -480 -464
WIRE -960 -384 -960 -480
WIRE -752 -320 -752 -352
WIRE -960 -272 -960 -304
SYMBOL bv -960 -400 R0
SYMATTR InstName B1
SYMATTR Value V=V(p)*V(r)
SYMBOL voltage -1408 -560 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 10e-3 8)
SYMBOL nmos -528 -560 R0
SYMATTR InstName M1
SYMATTR Value ARF463AB
SYMATTR Prefix X
SYMBOL res -768 -448 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL voltage -624 -736 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VDD
SYMATTR Value 125
SYMBOL res -496 -752 R0
SYMATTR InstName R1
SYMATTR Value 4
SYMBOL voltage -1152 -560 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 0 1p 1p 1.25e-05 250e-6)
FLAG -480 -400 0
FLAG -624 -624 0
FLAG -432 -784 VDD
FLAG -576 -480 G
FLAG -752 -320 0
FLAG -960 -272 0
FLAG -1408 -448 0
FLAG -1152 -448 0
FLAG -1152 -560 p
FLAG -1408 -576 r
TEXT -2144 -96 Left 2 !.tran 0 10e-3 0
TEXT -2152 -752 Left 2 !**********\n*SRC=ARF463AB;ARF463AB;MOSFETs N;Enh;500V 9.0A 1.1ohms PPG Microsemi RF MOSFET\n*SYM=POWMOSN\n*09-14-09 Rev A GJK PPG Microsemi\n.SUBCKT ARF463AB   10 20 30\n*     TERMINALS:  D  G  S\nM1   1  2  3  3  DMOS L=1U W=1U\nLD  10  11  2n\nRD  11          1   1.1\nLG  20  19  2.8n\nRG  19  2   .5\nD1   5  1   DGD\nD2   5  2   DGD\nCGS  2  3   1200p\nDSD  3  1   DSUB\nRS  29  3   2.25m\nLS  30  29  2n\n.MODEL DMOS NMOS(LEVEL=3 VMAX=1.04Meg THETA=100.0m ETA=2.00m VTO=3.00 KP=2.60)\n.MODEL DSUB D (IS=1.27u N=1.50 RS=5.00m BV=500 CJO=799p VJ=0.800 M=0.420 TT=311n)\n.MODEL DGD  D (IS=100n N=1.5 RS=10m BV=500 CJO=81.7p M=.5 VJ=.700 TT=1n)\n.ENDS\n*****
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3470A.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 10
L1 N002 OUT 33
R1 N003 0 200K
R2 OUT N003 604K
C1 N002 N001 .22
C2 OUT N003 22p
C3 OUT 0 10
Rload OUT 0 500
XU1 IN MP_01 IN 0 N002 N001 OUT N003 LT3470A ;pnba _SHDN))Vin)GND)SW)Boost)BIAS)FB
.tran 500u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3470A.asy)
.lib LT3470A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 928 680
WIRE 224 48 208 48
WIRE 304 48 288 48
WIRE 0 64 -80 64
WIRE 80 64 0 64
WIRE -80 80 -80 64
WIRE 80 96 80 64
WIRE 208 96 208 48
WIRE 304 160 304 48
WIRE 304 160 272 160
WIRE 320 160 304 160
WIRE 416 160 400 160
WIRE 528 160 416 160
WIRE 624 160 528 160
WIRE -80 176 -80 160
WIRE 528 176 528 160
WIRE 624 176 624 160
WIRE 0 240 0 64
WIRE 16 240 0 240
WIRE 304 240 272 240
WIRE 416 240 416 160
WIRE 416 240 304 240
WIRE 528 272 528 240
WIRE 624 272 624 256
WIRE 304 320 304 304
WIRE 304 320 272 320
WIRE 416 320 304 320
WIRE 416 336 416 320
WIRE 144 384 144 368
WIRE 416 432 416 416
FLAG -80 176 0
FLAG 144 384 0
FLAG 416 432 0
FLAG 528 272 0
FLAG 624 272 0
FLAG -80 64 IN
FLAG 624 160 OUT
SYMBOL voltage -80 64 R0
WINDOW 3 23 93 Left 2
SYMATTR Value 10
SYMATTR InstName V1
SYMBOL ind 304 176 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMBOL res 400 320 R0
SYMATTR InstName R1
SYMATTR Value 200K
SYMBOL res 400 224 R0
SYMATTR InstName R2
SYMATTR Value 604K
SYMBOL cap 288 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .22
SYMBOL cap 288 240 R0
WINDOW 0 31 16 Left 2
WINDOW 3 29 49 Left 2
SYMATTR InstName C2
SYMATTR Value 22p
SYMBOL cap 512 176 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res 608 160 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT3470A 144 240 R0
SYMATTR InstName U1
TEXT 512 360 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL40502-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL40502-2.5.asy)
XU1 vIN 0 vIN vOUT ADPL40502-2.5 ;pnba Vin)GND)EN)Vout
Rload vOUT 0 12.5
C1 vOUT 0 1 Rser=1m
V1 vIN 0 3.3
.tran 1m startup
.lib ADPL40502-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2808 1464
WIRE 1824 880 1728 880
WIRE 1984 880 1824 880
WIRE 1728 896 1728 880
WIRE 1984 896 1984 880
WIRE 1728 992 1728 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMATTR SpiceLine Rser=1m
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 12.5
SYMBOL ADPL40502-2.5 1984 1024 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1728 880 R0
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG 2256 1024 vOUT
FLAG 2256 1136 0
FLAG 1728 992 0
FLAG 1728 880 vIN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8065.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8065.asy)
C2 N002 0 1n
C1 OUT 0 22
R2 OUT 0 2
R3 N003 0 41.2K
R1 N004 0 60.4K
V1 IN 0 12
XU1 N001 MP_01 MP_02 IN MP_03 MP_04 MP_05 OUT MP_06 MP_07 MP_08 MP_09 N001 IN N003 N002 NC_10 0 NC_11 N004 LTM8065 ;pnba Bias)))Vin))))Vout)))))Aux)Run)Rt)TR/SS)Sync)GND)PG)FB
.tran .7m startup
.lib LTM8065.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 -64 64 -64
WIRE 240 -32 240 -64
WIRE 64 32 64 -64
WIRE 64 32 -64 32
WIRE 96 32 64 32
WIRE 416 32 384 32
WIRE -64 48 -64 32
WIRE 416 128 416 32
WIRE 416 128 384 128
WIRE -64 144 -64 128
WIRE 0 224 -16 224
WIRE 96 224 64 224
WIRE 512 224 384 224
WIRE 592 224 512 224
WIRE 512 240 512 224
WIRE 592 240 592 224
WIRE 0 320 -16 320
WIRE 96 320 80 320
WIRE 432 320 384 320
WIRE 432 336 432 320
WIRE 512 336 512 304
WIRE 592 336 592 320
WIRE 288 400 288 384
WIRE 432 432 432 416
SYMBOL res 576 224 R0
SYMATTR InstName R2
SYMATTR Value 2
SYMBOL cap 496 240 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL voltage -64 32 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 416 320 R0
SYMATTR InstName R1
SYMATTR Value 60.4K
SYMBOL PowerProducts\\LTM8065 240 176 R0
SYMATTR InstName U1
SYMBOL res 96 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 41.2K
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
FLAG -64 144 0
FLAG 512 336 0
FLAG 592 336 0
FLAG 432 432 0
FLAG 288 400 0
FLAG -16 320 0
FLAG -16 224 0
FLAG 592 224 OUT
FLAG -64 32 IN
TEXT 488 480 Left 2 !.tran .7m startup
* Z:\tmp\asc_dec_bjh7r6w2\1724a261de13_Task1_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 A 0 PULSE(0 1.8 0 1p 1p 10n 20n 10)
M8 0 C Y 0 NMOS
M9 0 B Y 0 NMOS
M5 Y B N002 N001 PMOS
M4 N002 A N001 N001 PMOS
V4 Vdd 0 1.8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 792
WIRE 416 -32 272 -32
WIRE 496 -32 416 -32
WIRE 496 16 496 -32
WIRE 416 64 416 -32
WIRE 496 64 416 64
WIRE 496 160 496 112
WIRE 416 208 416 64
WIRE 416 208 208 208
WIRE 496 208 416 208
WIRE 352 304 208 304
WIRE 496 304 496 256
WIRE 496 304 352 304
WIRE 352 320 352 304
WIRE 704 320 352 320
WIRE 272 336 112 336
WIRE 352 336 352 320
WIRE 352 336 272 336
WIRE 384 336 352 336
WIRE 496 336 384 336
WIRE 192 416 112 416
WIRE 272 432 272 336
WIRE 384 432 384 336
WIRE 496 432 496 336
WIRE 320 448 320 400
WIRE 192 480 192 416
WIRE 272 480 192 480
WIRE 448 480 384 480
WIRE 496 480 448 480
WIRE 192 560 192 480
WIRE 192 560 112 560
WIRE 336 560 336 512
WIRE 192 608 192 560
WIRE 192 608 112 608
WIRE 272 608 272 528
WIRE 272 608 192 608
WIRE 320 608 272 608
WIRE 384 608 384 528
WIRE 384 608 320 608
WIRE 448 608 448 480
WIRE 448 608 384 608
WIRE 496 608 496 528
WIRE 496 608 448 608
WIRE 320 656 320 608
SYMBOL voltage -272 480 R0
WINDOW 3 -174 135 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 1.8 0 1p 1p 10n 20n 10)
SYMATTR InstName V1
SYMBOL nmos4 320 528 R180
SYMATTR InstName M8
SYMBOL nmos4 544 528 R180
SYMATTR InstName M9
SYMBOL pmos4 544 256 R180
SYMATTR InstName M5
SYMBOL pmos4 544 112 R180
SYMATTR InstName M4
SYMBOL voltage -176 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 1.8
FLAG 320 656 0
FLAG 544 32 A
FLAG 336 560 A
FLAG 320 400 C
FLAG 544 176 B
FLAG 544 448 B
FLAG 704 320 Y
FLAG -272 496 A
FLAG -176 496 B
FLAG -80 496 C
FLAG -80 576 0
FLAG -176 576 0
FLAG -272 576 0
FLAG -176 400 0
FLAG -176 320 Vdd
* Z:\home\khalils\Downloads\files\data\raw_asc\6bbd177a5591_NAND2.asc
* Generated by LTspice 26.0.1 for Windows.
M3 Out In1 Vdd Vdd P_2u l=2u w=24u
M1 Out In2 n1 n1 N_2u l=2u w=13u
M2 n1 In1 Vss Vss N_2u l=2u w=13u
M4 Out In2 Vdd Vdd P_2u l=2u w=24u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include "../MOSFET models/2um_CMOS.modlib"
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 48 192 16
WIRE 192 48 -32 48
WIRE -32 64 -32 48
WIRE -16 64 -32 64
WIRE 192 64 192 48
WIRE 208 64 192 64
WIRE -112 80 -160 80
WIRE -80 80 -112 80
WIRE 144 80 112 80
WIRE -16 112 -16 64
WIRE -16 112 -32 112
WIRE 208 112 208 64
WIRE 208 112 192 112
WIRE -32 176 -32 160
WIRE 192 176 192 160
WIRE 192 176 -32 176
WIRE 368 176 192 176
WIRE 192 192 192 176
WIRE 208 240 192 240
WIRE 112 272 112 80
WIRE 112 272 -160 272
WIRE 144 272 112 272
WIRE 208 288 208 240
WIRE 208 288 192 288
WIRE 192 320 192 288
WIRE 224 320 192 320
WIRE 192 336 192 320
WIRE 208 384 192 384
WIRE -112 416 -112 80
WIRE 144 416 -112 416
WIRE 208 432 208 384
WIRE 208 432 192 432
WIRE 192 464 192 432
IOPIN 192 16 In
IOPIN 192 464 In
IOPIN -160 80 In
IOPIN -160 272 In
IOPIN 368 176 Out
SYMBOL pmos4 144 160 M180
WINDOW 0 75 15 Left 2
WINDOW 3 73 70 Left 2
WINDOW 123 75 43 Left 2
SYMATTR InstName M4
SYMATTR Value P_2u
SYMATTR Value2 l=2u w=24u
SYMBOL pmos4 -80 160 M180
WINDOW 0 75 15 Left 2
WINDOW 3 73 70 Left 2
WINDOW 123 75 43 Left 2
SYMATTR InstName M3
SYMATTR Value P_2u
SYMATTR Value2 l=2u w=24u
SYMBOL nmos4 144 192 R0
WINDOW 0 78 81 Left 2
WINDOW 3 76 25 Left 2
WINDOW 123 78 53 Left 2
SYMATTR InstName M1
SYMATTR Value N_2u
SYMATTR Value2 l=2u w=13u
SYMBOL nmos4 144 336 R0
WINDOW 0 78 81 Left 2
WINDOW 3 76 25 Left 2
WINDOW 123 78 53 Left 2
SYMATTR InstName M2
SYMATTR Value N_2u
SYMATTR Value2 l=2u w=13u
FLAG 192 16 Vdd
FLAG 192 464 Vss
FLAG -160 80 In1
FLAG -160 272 In2
FLAG 368 176 Out
FLAG 224 320 n1
TEXT -120 552 Left 2 !.include "../MOSFET models/2um_CMOS.modlib"
* Z:\home\khalils\Downloads\files\data\raw_asc\b1706d77cd69_FDP2532_Cxss.asc
* Generated by LTspice 26.0.1 for Windows.
M1 d1 N001 0 0 FDP2532
V1 d1 0 { VDS} AC 1
V2 N001 0 0 AC 0
M2 d2 N002 0 0 FDP2532
V3 d2 0 { VDS} AC 0
V4 N002 0 0 AC 1
H1 Coss 0 V1 -1e-3
H2 Crss 0 V2 -1e-3
H3 Ciss 0 V4 -1e-3
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.MODEL FDP2532 VDMOS(KP=32.1269 RS=0.0001 RD=0.0094 RG=0.5 VTO=3.0 CGDMAX=1605p
+CGDMIN=50p CJO=2648p Vj=0.75 M=0.4812 CGS=5735p N=1 IS=1.00E-14 RB=0.0099 TT=151n)
.step param VDS 0.1 25 0.1
.ac list {1e3/2/pi} ; jw=1e3
* MOSFET Capacitances Versus Drain-Source Voltage
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1084 788
WIRE 512 96 480 96
WIRE 176 112 112 112
WIRE 256 112 176 112
WIRE 480 128 480 96
WIRE 112 144 112 112
WIRE 64 224 -16 224
WIRE 256 224 256 112
WIRE -16 240 -16 224
WIRE 480 240 480 208
WIRE 512 304 480 304
WIRE -16 336 -16 320
WIRE 112 336 112 240
WIRE 256 336 256 304
WIRE 480 336 480 304
WIRE 176 432 112 432
WIRE 256 432 176 432
WIRE 480 448 480 416
WIRE 112 464 112 432
WIRE 512 512 480 512
WIRE 64 544 -16 544
WIRE 256 544 256 432
WIRE 480 544 480 512
WIRE -16 560 -16 544
WIRE -16 656 -16 640
WIRE 112 656 112 560
WIRE 256 656 256 624
WIRE 480 656 480 624
FLAG 112 336 0
FLAG -16 336 0
FLAG 256 336 0
FLAG 176 112 d1
FLAG 112 656 0
FLAG -16 656 0
FLAG 256 656 0
FLAG 176 432 d2
FLAG 480 240 0
FLAG 480 448 0
FLAG 480 656 0
FLAG 512 96 Coss
FLAG 512 304 Crss
FLAG 512 512 Ciss
SYMBOL NMOS 64 144 R0
SYMATTR InstName M1
SYMATTR Value FDP2532
SYMBOL voltage 256 208 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value { VDS}
SYMBOL voltage -16 224 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL NMOS 64 464 R0
SYMATTR InstName M2
SYMATTR Value FDP2532
SYMBOL voltage 256 528 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 0
SYMATTR InstName V3
SYMATTR Value { VDS}
SYMBOL voltage -16 544 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V4
SYMATTR Value 0
SYMBOL h 480 112 R0
SYMATTR InstName H1
SYMATTR Value V1 -1e-3
SYMBOL h 480 320 R0
SYMATTR InstName H2
SYMATTR Value V2 -1e-3
SYMBOL h 480 528 R0
SYMATTR InstName H3
SYMATTR Value V4 -1e-3
TEXT -376 -8 Left 0 !.MODEL FDP2532 VDMOS(KP=32.1269 RS=0.0001 RD=0.0094 RG=0.5 VTO=3.0 CGDMAX=1605p \n+CGDMIN=50p CJO=2648p Vj=0.75 M=0.4812 CGS=5735p N=1 IS=1.00E-14 RB=0.0099 TT=151n)
TEXT -376 96 Left 0 !.step param VDS 0.1 25 0.1
TEXT -376 120 Left 0 !.ac list {1e3/2/pi} ; jw=1e3
TEXT -368 -80 Left 0 ;MOSFET Capacitances Versus Drain-Source Voltage
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1880.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1880.asy)
V2 -V 0 -1.5
R1 N003 N002 100K
V1 +V 0 1.5
XU1 0 N002 +V -V N003 LT1880 ;pnba In+)In-)V+)V-)OUT
R2 N002 N001 1Meg
V3 N001 0 SINE(0 13.5 1K)
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 0 96 -112 96
WIRE 128 96 80 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -112 112 -112 96
WIRE -368 128 -368 112
WIRE -240 128 -240 112
WIRE -112 208 -112 192
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE -368 240 -368 208
WIRE -240 240 -240 208
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 160 256 128 256
WIRE 192 288 192 272
SYMBOL voltage -240 112 R0
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL opamps\\LT1880 192 240 R0
SYMATTR InstName U1
SYMBOL voltage -112 96 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 13.5 1K)
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 96 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL voltage -368 112 R0
SYMATTR InstName V2
SYMATTR Value -1.5
FLAG -240 240 0
FLAG 192 192 +V
FLAG -240 112 +V
FLAG 192 288 -V
FLAG -368 240 0
FLAG -368 112 -V
FLAG -112 208 0
FLAG 128 256 0
TEXT -72 304 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\51a4f36baad7_Rc_passo_basso.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N002 0 4.4n
R2 N002 N001 2.7k
V1 N001 0 SINE(0 2 1340) AC 1
.ac dec 1000 1 100Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 208 -32 128 -32
WIRE 352 -32 288 -32
WIRE 128 16 128 -32
WIRE 352 16 352 -32
WIRE 128 128 128 96
WIRE 352 128 352 80
WIRE 352 128 128 128
SYMBOL voltage 128 0 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 2 1340)
SYMATTR Value2 AC 1
SYMBOL cap 336 16 R0
SYMATTR InstName C1
SYMATTR Value 4.4n
SYMBOL res 304 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2.7k
FLAG 128 128 0
TEXT 336 -32 Left 2 !.ac dec 1000 1 100Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\0353242a39e3_nor_gate.asc
* Generated by LTspice 26.0.1 for Windows.
M1 X A 0 N003 NMOS
M4 Vdd B P001 N001 PMOS
V1 A 0 0
V2 B 0 0
M3 P001 A X N002 PMOS
V3 Vdd 0 5
M2 X B 0 N004 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 480 -160 192 -160
WIRE 192 0 192 -160
WIRE 192 0 48 0
WIRE 224 0 192 0
WIRE 272 0 272 -32
WIRE -432 32 -528 32
WIRE -336 32 -432 32
WIRE 224 96 112 96
WIRE 272 96 272 64
WIRE 272 128 272 112
WIRE 528 128 272 128
WIRE 272 144 272 128
WIRE 272 144 192 144
WIRE 368 144 272 144
WIRE 112 176 112 96
WIRE 112 176 48 176
WIRE 112 224 112 176
WIRE 144 224 112 224
WIRE 192 224 192 192
WIRE 368 224 368 192
WIRE 480 224 480 -160
WIRE 480 224 416 224
WIRE 272 240 192 240
WIRE 368 240 272 240
WIRE 272 256 272 240
IOPIN 272 -80 In
IOPIN 48 176 In
IOPIN 48 0 In
IOPIN 528 128 Out
IOPIN -528 -48 In
IOPIN -432 -48 In
IOPIN -336 -48 In
SYMBOL voltage -528 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL nmos4 144 144 R0
SYMATTR InstName M1
SYMBOL voltage -432 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage -336 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL pmos4 224 16 R0
SYMATTR InstName M3
SYMBOL nmos4 416 144 M0
SYMATTR InstName M2
SYMBOL pmos4 224 -80 R0
SYMATTR InstName M4
FLAG 272 256 0
FLAG 272 -80 Vdd
FLAG 48 176 A
FLAG 48 0 B
FLAG 528 128 X
FLAG -528 -48 A
FLAG -432 -48 B
FLAG -336 -48 Vdd
FLAG -432 32 0
TEXT -592 280 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\4952259e488b_scheme1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1014.asy)
R2 N002 N001 2k
D1 N002 N001 1N5818
V3 0 N005 {Vcc}
XU1 0 N001 N003 N005 N002 LT1013 ;pnba In+)In-)V+)V-)OUT
R1 N001 N004 1k
V2 N003 0 {Vcc}
Vin N004 0 DC 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.param Vcc=22
.dc Vin {-1.1*Vcc} {1.1*Vcc} 0.01
.lib LT1013.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 176 -48 112 -48
WIRE 272 -48 240 -48
WIRE 112 48 112 -48
WIRE 160 48 112 48
WIRE 272 48 272 -48
WIRE 272 48 240 48
WIRE 512 96 192 96
WIRE 512 112 512 96
WIRE 192 176 192 96
WIRE 0 192 -96 192
WIRE 112 192 112 48
WIRE 112 192 80 192
WIRE 160 192 112 192
WIRE -96 208 -96 192
WIRE 272 208 272 48
WIRE 272 208 224 208
WIRE 384 208 272 208
WIRE 512 208 512 192
WIRE 512 208 432 208
WIRE 160 224 128 224
WIRE 432 224 432 208
WIRE 512 224 512 208
WIRE 128 256 128 224
WIRE -96 304 -96 288
WIRE 192 336 192 240
WIRE 512 336 512 304
WIRE 512 336 192 336
SYMBOL OpAmps\\LT1014 192 144 R0
SYMATTR InstName U1
SYMBOL res 96 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 256 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2k
SYMBOL voltage 512 208 R0
SYMATTR InstName V3
SYMATTR Value {Vcc}
SYMBOL diode 240 -64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N5818
SYMBOL voltage 512 96 R0
SYMATTR InstName V2
SYMATTR Value {Vcc}
SYMBOL voltage -96 192 R0
SYMATTR InstName Vin
SYMATTR Value DC 0
FLAG 128 256 0
FLAG -96 304 0
FLAG 432 224 0
TEXT 304 -24 Left 2 !.param Vcc=22
TEXT 304 48 Left 2 !.dc Vin {-1.1*Vcc} {1.1*Vcc} 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4600.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 7
XU1 N001 N006 N002 N003 N005 N007 N008 N004 0 0 OUT IN LTM4600 ;pnba Fset)SVin)EXTVcc)FCB)Run)Comp)PwrGD)Voset)SGND)PGND)Vout)Vin
R1 N004 0 67K
R2 OUT N008 100K
Rload OUT 0 .15
C1 OUT 0 22
.tran 2.2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4600.asy)
.lib LTM4600.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1260 692
WIRE 384 64 160 64
WIRE 160 80 160 64
WIRE 384 80 384 64
WIRE 512 80 512 64
WIRE 272 128 256 128
WIRE 768 128 624 128
WIRE 816 128 768 128
WIRE 912 128 816 128
WIRE 816 144 816 128
WIRE 912 144 912 128
WIRE 160 176 160 160
WIRE 272 176 256 176
WIRE 640 176 624 176
WIRE 736 176 720 176
WIRE 272 224 256 224
WIRE 640 224 624 224
WIRE 816 240 816 208
WIRE 912 240 912 224
WIRE 272 272 256 272
WIRE 640 272 624 272
WIRE 768 272 768 128
WIRE 768 272 720 272
WIRE 384 336 384 320
WIRE 512 336 512 320
FLAG 160 176 0
FLAG 384 336 0
FLAG 512 336 0
FLAG 912 240 0
FLAG 736 176 0
FLAG 912 128 OUT
FLAG 160 64 IN
FLAG 816 240 0
SYMBOL voltage 160 64 R0
WINDOW 0 23 25 Left 2
WINDOW 3 30 90 Left 2
SYMATTR InstName V1
SYMATTR Value 7
SYMBOL PowerProducts\\LTM4600 448 192 R0
SYMATTR InstName U1
SYMBOL res 624 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 67K
SYMBOL res 736 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL res 896 128 R0
SYMATTR InstName Rload
SYMATTR Value .15
SYMBOL cap 800 144 R0
SYMATTR InstName C1
SYMATTR Value 22
TEXT 736 336 Left 2 !.tran 2.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0a6418f3f0c3_tran.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 Vout N001 0 0 2N3904
R1 Vcc Vout 220
R2 Vin N001 10k
V1 Vcc 0 5V
V2 Vin 0 PULSE(0 3.3 10n 5n 5n 500u 1m 10)
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 12m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 112 96 112
WIRE 656 112 368 112
WIRE 96 144 96 112
WIRE 656 144 656 112
WIRE 96 256 96 224
WIRE 656 272 656 224
WIRE 736 272 656 272
WIRE 768 272 736 272
WIRE 656 336 656 272
WIRE 208 384 96 384
WIRE 304 384 208 384
WIRE 592 384 384 384
WIRE 96 528 96 464
WIRE 656 528 656 432
WIRE 656 528 96 528
WIRE 96 592 96 528
FLAG 96 256 0
FLAG 736 272 Vout
FLAG 368 112 Vcc
FLAG 208 384 Vin
FLAG 96 592 0
SYMBOL npn 592 336 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 640 128 R0
SYMATTR InstName R1
SYMATTR Value 220
SYMBOL res 288 400 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 96 128 R0
SYMATTR InstName V1
SYMATTR Value 5V
SYMBOL voltage 96 368 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 10n 5n 5n 500u 1m 10)
TEXT 336 592 Left 2 !.tran 12m