Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3527-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3527-1.asy)
C1 OUT2 0 4.7
V1 IN 0 2.5
XU1 IN N003 0 IN OUT1 N001 N002 OUT2 IN 0 N004 IN NC_01 0 IN NC_02 LTC3527-1 ;pnba _SHDN1)FB1)Mode)Vin1)Vout1)SW1)SW2)Vout2)Vin2)Fsel)FB2)_SHDN2)Pgood2)GND)Vin)Pgood1
Rload2 OUT2 0 12
L2 IN N002 4.7 Rpar=2K
L1 IN N001 4.7 Rpar=2K
R3 OUT1 N003 1.78Meg
R4 N003 0 1Meg
R2 N004 0 1.21Meg
R1 OUT2 N004 619K
Rload1 OUT1 0 22
C2 OUT1 0 4.7
.tran 0.7m startup
.lib LTC3527-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 464 -160 -160 -160
WIRE 112 -128 -96 -128
WIRE 192 -128 112 -128
WIRE 272 -128 192 -128
WIRE 368 -128 272 -128
WIRE 112 -112 112 -128
WIRE 192 -112 192 -128
WIRE 272 -112 272 -128
WIRE -96 -32 -96 -128
WIRE 48 -32 -96 -32
WIRE 368 -32 368 -128
WIRE 368 -32 336 -32
WIRE -160 80 -160 -160
WIRE -160 80 -288 80
WIRE -96 80 -96 -32
WIRE -96 80 -160 80
WIRE -64 80 -96 80
WIRE 48 80 16 80
WIRE 352 80 336 80
WIRE 464 80 464 -160
WIRE 464 80 432 80
WIRE -288 96 -288 80
WIRE -288 192 -288 176
WIRE -160 304 -288 304
WIRE -80 304 -160 304
WIRE 48 304 -80 304
WIRE 384 304 336 304
WIRE 496 304 384 304
WIRE 576 304 496 304
WIRE -288 320 -288 304
WIRE -160 320 -160 304
WIRE -80 320 -80 304
WIRE 384 320 384 304
WIRE 496 320 496 304
WIRE 576 320 576 304
WIRE -288 416 -288 400
WIRE -160 416 -160 384
WIRE -80 416 -80 400
WIRE 48 416 -80 416
WIRE 384 416 384 400
WIRE 384 416 336 416
WIRE 496 416 496 384
WIRE 576 416 576 400
WIRE -80 432 -80 416
WIRE 384 432 384 416
WIRE 112 512 112 496
WIRE 192 512 192 496
WIRE 272 512 272 496
WIRE -80 528 -80 512
WIRE 384 528 384 512
SYMBOL cap -176 320 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL res -96 416 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL res 368 416 R0
SYMATTR InstName R2
SYMATTR Value 1.21Meg
SYMBOL res -96 304 R0
SYMATTR InstName R3
SYMATTR Value 1.78Meg
SYMBOL ind 448 96 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=2K
SYMBOL PowerProducts\\LTC3527-1 192 192 R0
SYMATTR InstName U1
SYMBOL cap 480 320 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL res 560 304 R0
SYMATTR InstName Rload2
SYMATTR Value 12
SYMBOL ind -80 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=2K
SYMBOL res 368 304 R0
SYMATTR InstName R1
SYMATTR Value 619K
SYMBOL res -304 304 R0
SYMATTR InstName Rload1
SYMATTR Value 22
SYMBOL voltage -288 80 R0
SYMATTR InstName V1
SYMATTR Value 2.5
FLAG 384 528 0
FLAG 576 416 0
FLAG 496 416 0
FLAG 192 512 0
FLAG 112 512 0
FLAG 272 512 0
FLAG -80 528 0
FLAG -288 416 0
FLAG -160 416 0
FLAG -288 192 0
FLAG -288 80 IN
FLAG -288 304 OUT1
FLAG 576 304 OUT2
TEXT 552 496 Left 2 !.tran 0.7m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3568.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3568.asy)
R4 IN N002 100K
C3 OUT N003 47p
R1 OUT N003 412K
XU1 N004 IN 0 N001 0 IN IN N002 N003 N005 LTC3568 ;pnba SHDN/Rt)Mode)SGND)SW)PGND)PVin)SVin)Pgood)FB)Ith
C2 N005 0 1000p Rser=13K
R2 N003 0 332K
R3 N004 0 324K
C1 OUT 0 100 Rser=10m
V1 IN 0 5
L1 N001 OUT 1.7
Rload OUT 0 1
.tran 1m startup
.lib LTC3568.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2460 1748
WIRE 1456 1280 1360 1280
WIRE 1520 1280 1456 1280
WIRE 1648 1280 1520 1280
WIRE 1776 1280 1648 1280
WIRE 1360 1296 1360 1280
WIRE 1648 1296 1648 1280
WIRE 1776 1296 1776 1280
WIRE 1936 1344 1904 1344
WIRE 2048 1344 2016 1344
WIRE 2144 1344 2048 1344
WIRE 2240 1344 2144 1344
WIRE 2336 1344 2240 1344
WIRE 1456 1360 1456 1280
WIRE 2048 1360 2048 1344
WIRE 2144 1360 2144 1344
WIRE 2240 1360 2240 1344
WIRE 2336 1360 2336 1344
WIRE 1520 1376 1520 1280
WIRE 1552 1376 1520 1376
WIRE 1904 1376 1904 1344
WIRE 1904 1376 1872 1376
WIRE 1360 1392 1360 1376
WIRE 1456 1456 1456 1440
WIRE 1552 1456 1456 1456
WIRE 2048 1456 2048 1440
WIRE 2048 1456 1872 1456
WIRE 2144 1456 2144 1424
WIRE 2144 1456 2048 1456
WIRE 2240 1456 2240 1424
WIRE 2336 1456 2336 1440
WIRE 2048 1472 2048 1456
WIRE 1552 1536 1456 1536
WIRE 1904 1536 1872 1536
WIRE 1456 1552 1456 1536
WIRE 1904 1568 1904 1536
WIRE 2048 1568 2048 1552
WIRE 1456 1648 1456 1632
WIRE 1648 1648 1648 1616
WIRE 1776 1648 1776 1616
WIRE 1904 1648 1904 1632
SYMBOL cap 2224 1360 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=10m
SYMBOL res 1440 1536 R0
SYMATTR InstName R3
SYMATTR Value 324K
SYMBOL cap 2128 1360 R0
SYMATTR InstName C3
SYMATTR Value 47p
SYMBOL cap 1888 1568 R0
WINDOW 3 36 34 Left 2
WINDOW 39 26 58 Left 2
SYMATTR Value 1000p
SYMATTR SpiceLine Rser=13K
SYMATTR InstName C2
SYMBOL ind 1920 1360 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.7
SYMBOL RES 2032 1344 R0
SYMATTR InstName R1
SYMATTR Value 412K
SYMBOL VOLTAGE 1360 1280 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 1440 1344 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL res 2320 1344 R0
SYMATTR InstName Rload
SYMATTR Value 1
SYMBOL res 2032 1456 R0
SYMATTR InstName R2
SYMATTR Value 332K
SYMBOL PowerProducts\\LTC3568 1712 1456 R0
SYMATTR InstName U1
FLAG 1776 1648 0
FLAG 1648 1648 0
FLAG 1360 1392 0
FLAG 1456 1648 0
FLAG 2336 1456 0
FLAG 2048 1568 0
FLAG 2240 1456 0
FLAG 1904 1648 0
FLAG 2336 1344 OUT
FLAG 1360 1280 IN
TEXT 2088 1632 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3808.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3808.asy)
L1 N005 OUT 2.2 Rpar=1K
Rload OUT 0 5
R2 IN N001 100K
C2 N009 N010 220p
R4 N011 0 59K
V1 IN 0 5
MQ1 N005 N008 0 0 FDS6680A
MQ2 N005 N003 IN IN FDC638P
XU1 N004 0 N007 N001 N011 N010 N006 N002 N008 N003 IN IN N005 N005 0 LTC3808 ;pnba PLLLPF)SYNC/Mode)Track/SS)Pgood)Vfb)Ith)Run)Iprg)BG)TG)Sense+)Vin)Sense-)SW)GND
R3 OUT N011 187K
R1 0 N009 15K
C1 OUT 0 47 Rser=50m
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 2.5m startup
.lib LTC3808.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 996
WIRE 48 -80 -160 -80
WIRE 176 -80 48 -80
WIRE 400 -80 176 -80
WIRE -160 -64 -160 -80
WIRE 176 -64 176 -80
WIRE -160 32 -160 16
WIRE 48 32 48 -80
WIRE 176 32 176 16
WIRE -64 80 -80 80
WIRE 400 80 400 -80
WIRE 400 80 288 80
WIRE 400 144 400 80
WIRE -64 160 -80 160
WIRE 352 160 288 160
WIRE -64 240 -80 240
WIRE 400 240 288 240
WIRE 400 288 400 240
WIRE 448 288 400 288
WIRE 560 288 528 288
WIRE 656 288 560 288
WIRE 752 288 656 288
WIRE 656 304 656 288
WIRE 752 304 752 288
WIRE -64 320 -80 320
WIRE 400 320 400 288
WIRE 400 320 288 320
WIRE 560 384 560 288
WIRE -64 400 -80 400
WIRE 352 400 288 400
WIRE 656 400 656 368
WIRE 752 400 752 384
WIRE 400 432 400 416
WIRE -240 480 -256 480
WIRE -144 480 -160 480
WIRE -64 480 -80 480
WIRE 560 480 560 464
WIRE 560 480 288 480
WIRE 560 496 560 480
WIRE 112 544 112 528
WIRE 560 592 560 576
SYMBOL PowerProducts\\LTC3808 112 272 R0
SYMATTR InstName U1
SYMBOL res -256 464 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 15K
SYMBOL pmos 352 240 M180
WINDOW 0 58 64 Left 2
WINDOW 3 53 25 Left 2
SYMATTR InstName Q2
SYMATTR Value FDC638P
SYMBOL res 544 368 R0
SYMATTR InstName R3
SYMATTR Value 187K
SYMBOL res 544 480 R0
SYMATTR InstName R4
SYMATTR Value 59K
SYMBOL nmos 352 320 R0
SYMATTR InstName Q1
SYMATTR Value FDS6680A
SYMBOL ind 432 304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rpar=1K
SYMBOL cap -144 464 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 220p
SYMBOL res 736 288 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL voltage -160 -80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 640 304 R0
SYMATTR SpiceLine Rser=50m
SYMATTR Value 47
SYMATTR InstName C1
SYMBOL res 160 -80 R0
SYMATTR InstName R2
SYMATTR Value 100K
FLAG 400 432 0
FLAG 656 400 0
FLAG -256 480 0
FLAG 112 544 0
FLAG -160 32 0
FLAG 752 400 0
FLAG 560 592 0
FLAG -80 160 0
FLAG -160 -80 IN
FLAG 752 288 OUT
TEXT 648 560 Left 2 !.tran 2.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\4348148787dc_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N004 N003 N005 N002 N006 0 out N001 AD8429 ;pnba IN-)RG1)RG2)IN+)VEE)REF)OUT)VCC
V1 N001 0 5
R1 5V N002 {Rnom - Rs}
R2 5V N004 {Rnom + Rs}
R3 N002 0 {Rnom + Rs}
R4 N004 0 {Rnom - Rs}
V2 5V 0 SINE(5 1u 1k)
R5 N003 N005 6.04 tol=1
R6 out 0 1k
V3 0 N006 5
.noise V(out) Rs lin 100 1 100k
.step param Rs 1m 100m 10m
.param Rnom = 1k
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8429.asy)
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 940 680
WIRE -240 -128 -320 -128
WIRE -160 -128 -240 -128
WIRE -320 -80 -320 -128
WIRE 224 -80 160 -80
WIRE 224 -48 224 -80
WIRE -320 16 -320 0
WIRE -160 16 -160 -128
WIRE -160 16 -208 16
WIRE -112 16 -160 16
WIRE -208 48 -208 16
WIRE -112 48 -112 16
WIRE 160 80 160 -80
WIRE 128 96 32 96
WIRE 128 128 80 128
WIRE -208 144 -208 128
WIRE 32 144 32 96
WIRE 32 144 -208 144
WIRE -112 160 -112 128
WIRE 32 160 -112 160
WIRE -208 176 -208 144
WIRE -112 176 -112 160
WIRE 400 176 304 176
WIRE 432 176 400 176
WIRE 80 224 80 208
WIRE 128 224 80 224
WIRE 32 256 32 160
WIRE 128 256 32 256
WIRE -208 288 -208 256
WIRE -176 288 -208 288
WIRE -112 288 -112 256
WIRE -112 288 -176 288
WIRE 160 320 160 272
WIRE 160 416 160 400
FLAG 224 32 0
FLAG -176 288 0
FLAG -320 16 0
FLAG 240 240 0
FLAG 400 176 out
FLAG -240 -128 5V
FLAG 432 256 0
FLAG 160 416 0
SYMBOL Opamps\\AD8429 160 176 R0
SYMATTR InstName U1
SYMBOL voltage 224 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -224 32 R0
SYMATTR InstName R1
SYMATTR Value {Rnom - Rs}
SYMBOL res -128 32 R0
SYMATTR InstName R2
SYMATTR Value {Rnom + Rs}
SYMBOL res -224 160 R0
SYMATTR InstName R3
SYMATTR Value {Rnom + Rs}
SYMBOL res -128 160 R0
SYMATTR InstName R4
SYMATTR Value {Rnom - Rs}
SYMBOL voltage -320 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(5 1u 1k)
SYMBOL res 64 112 R0
SYMATTR InstName R5
SYMATTR Value 6.04
SYMATTR SpiceLine tol=1
SYMBOL res 416 160 R0
SYMATTR InstName R6
SYMATTR Value 1k
SYMBOL voltage 160 416 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
TEXT -354 312 Left 2 !.noise V(out) Rs lin 100 1 100k
TEXT 536 24 Left 2 !.step param Rs 1m 100m 10m
TEXT 536 80 Left 2 !.param Rnom = 1k
* Z:\tmp\asc_dec_bjh7r6w2\14d447f3b91a_Lab05Pt2_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M13 N001 V2 N003 N001 PMOS l=0.1u w=4u
M1 V1 VTrigger N005 0 NMOS l=0.1u w=4u
M4 N006 N004 0 0 NMOS l=0.1u w=4u
C2 V2 0 7n
VDD N001 0 5
M3 V2 V1 N006 0 NMOS l=0.1u w=4u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1176 680
WIRE 480 -112 480 -144
WIRE 1088 -112 480 -112
WIRE -224 -80 -256 -80
WIRE -96 -80 -224 -80
WIRE -64 -80 -96 -80
WIRE 288 -80 -64 -80
WIRE 320 -80 288 -80
WIRE 432 -80 320 -80
WIRE 464 -80 432 -80
WIRE 480 -80 480 -112
WIRE 480 -80 464 -80
WIRE 800 -80 480 -80
WIRE 832 -80 800 -80
WIRE 928 -80 832 -80
WIRE 960 -80 928 -80
WIRE -224 -32 -224 -80
WIRE -224 -32 -256 -32
WIRE -64 -32 -64 -80
WIRE -64 -32 -96 -32
WIRE 320 -32 320 -80
WIRE 320 -32 288 -32
WIRE 464 -32 464 -80
WIRE 464 -32 432 -32
WIRE 832 -32 832 -80
WIRE 832 -32 800 -32
WIRE 960 -32 928 -32
WIRE -144 0 -224 0
WIRE 240 0 224 0
WIRE 752 32 752 0
WIRE 880 32 880 0
WIRE 880 32 752 32
WIRE -256 48 -256 16
WIRE -160 48 -256 48
WIRE -96 48 -96 16
WIRE -96 48 -160 48
WIRE -64 48 -96 48
WIRE -48 48 -64 48
WIRE 224 48 224 0
WIRE 224 48 -48 48
WIRE 288 48 288 16
WIRE 336 48 288 48
WIRE 432 48 432 16
WIRE 432 48 336 48
WIRE 464 48 432 48
WIRE 480 48 464 48
WIRE 752 48 752 32
WIRE 752 48 480 48
WIRE 800 48 800 16
WIRE 816 48 800 48
WIRE 928 48 928 16
WIRE 928 48 816 48
WIRE 960 48 928 48
WIRE -368 80 -400 80
WIRE -304 80 -304 0
WIRE -304 80 -368 80
WIRE -224 80 -224 0
WIRE -224 80 -304 80
WIRE -160 80 -160 48
WIRE 336 80 336 48
WIRE 816 80 816 48
WIRE -112 128 -160 128
WIRE 368 128 336 128
WIRE -224 160 -224 80
WIRE -208 160 -224 160
WIRE 224 160 224 48
WIRE 288 160 224 160
WIRE 752 160 752 48
WIRE 384 192 384 0
WIRE 384 192 288 192
WIRE 1088 192 384 192
WIRE -160 208 -160 176
WIRE 336 208 336 176
WIRE -112 256 -112 128
WIRE -112 256 -160 256
WIRE 368 256 368 128
WIRE 368 256 336 256
WIRE -224 288 -224 160
WIRE 288 288 288 192
WIRE -112 320 -112 256
WIRE 336 320 336 304
WIRE 336 320 -112 320
WIRE 368 320 368 256
WIRE 368 320 336 320
WIRE 816 320 368 320
WIRE 336 336 336 320
SYMBOL pmos4 752 -80 R0
SYMATTR InstName M13
SYMATTR Value2 l=0.1u w=4u
SYMBOL nmos4 -208 80 R0
SYMATTR InstName M1
SYMATTR Value2 l=0.1u w=4u
SYMBOL nmos4 288 208 R0
SYMATTR InstName M4
SYMATTR Value2 l=0.1u w=4u
SYMBOL cap 464 48 R0
WINDOW 3 31 55 Left 2
SYMATTR InstName C2
SYMATTR Value 7n
SYMBOL voltage 480 -128 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL nmos4 288 80 R0
SYMATTR InstName M3
SYMATTR Value2 l=0.1u w=4u
FLAG 480 -224 0
FLAG -64 48 V1
FLAG -48 112 0
FLAG 480 112 0
FLAG 464 48 V2
FLAG 336 336 0
FLAG -368 80 VTrigger
* Z:\home\khalils\Downloads\files\data\raw_asc\1d27dde79883_ideal_oscillations.asc
* Generated by LTspice 26.0.1 for Windows.
* Oscillation Between Capacitor and Inductor
L1 N001 0 0.025H
V1 N003 0 10V
C1 N001 0 1F
V2 N002 0 PULSE(0 1 10m 1n 1n 10m 20m 10)
S1 N001 N003 N002 0 MYSW
.tran 0 25ms 15ms
.model MYSW SW(Ron=1 Roff=1Meg Vt=0.5)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 240 16 160 16
WIRE 160 48 160 16
WIRE 112 64 -48 64
WIRE -48 96 -48 64
WIRE 112 112 16 112
WIRE 240 112 240 16
WIRE 384 112 240 112
WIRE 384 128 384 112
WIRE 160 144 160 128
WIRE 240 144 240 112
WIRE 16 160 16 112
WIRE 240 224 240 208
WIRE 384 224 384 208
WIRE 384 224 240 224
WIRE 160 256 160 224
WIRE 240 256 240 224
WIRE 240 256 160 256
WIRE 16 272 16 240
WIRE 240 272 240 256
SYMBOL ind 368 112 R0
SYMATTR InstName L1
SYMATTR Value 0.025H
SYMBOL cap 224 144 R0
SYMATTR InstName C1
SYMATTR Value 1uF
SYMBOL sw 160 32 R0
SYMATTR InstName S1
SYMATTR Value MYSW
SYMBOL voltage 16 144 R0
WINDOW 3 -151 197 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 1 10m 1n 1n 10m 20m 10)
SYMATTR InstName V2
SYMBOL voltage 160 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10V
FLAG 240 272 0
FLAG -48 96 0
FLAG 16 272 0
TEXT -56 392 Left 2 !.tran 0 25ms 15ms
TEXT -200 368 Left 2 !.model MYSW SW(Ron=1 Roff=1Meg Vt=0.5)
TEXT -64 -72 Left 2 ;Oscillation Between Capacitor and Inductor
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8664.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8664.asy)
Rload OUT 0 10K
XU1 IN N001 +V -V OUT AD8664 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 10K
R2 OUT N001 10K
V1 +V 0 8
Vin IN 0 SINE(0 1 1K)
V2 -V 0 -8
.tran 10m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 8
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 1K)
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -8
SYMBOL AD8664 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
TEXT 688 -952 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\386dc8c7eccd_BC549Cm.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 N002 0 0 BC549C
I1 0 N002 0
V1 N001 0 6
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.lib BC549C.sub
.dc i1 0 100uA 10uA
.meas ib find Ic(Q1)/Ib(Q1) when Ic(Q1)=6/303
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1472 680
WIRE 704 112 464 112
WIRE 464 144 464 112
WIRE 704 144 704 112
WIRE 640 192 576 192
WIRE 576 208 576 192
WIRE 464 256 464 224
WIRE 704 272 704 240
WIRE 576 304 576 288
SYMBOL current 576 288 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName I1
SYMATTR Value 0
SYMBOL voltage 464 128 R0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL npn 640 144 R0
SYMATTR InstName Q1
SYMATTR Value BC549C
FLAG 464 256 0
FLAG 576 304 0
FLAG 704 272 0
TEXT 824 56 Left 2 !.lib BC549C.sub
TEXT 792 128 Left 2 !.dc i1 0 100uA 10uA\n.meas ib find Ic(Q1)/Ib(Q1) when Ic(Q1)=6/303
* Z:\home\khalils\Downloads\files\data\raw_asc\090edc8fe1d6_1920.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1920.asy)
V1 +V 0 5
V2 -V 0 -5
V3 0 N003 SINE(0 10m 1K)
XU1 N001 N003 0 -V N004 OUT +V N002 LT1920 ;pnba Rg)In-)In+)V-)Ref)Out)V+)Rg
R3 N002 N001 1K
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -32 -64 -128 -64
WIRE 160 -64 48 -64
WIRE -176 48 -400 48
WIRE -128 48 -128 -64
WIRE -112 48 -128 48
WIRE 160 48 160 -64
WIRE 160 48 144 48
WIRE -400 96 -400 48
WIRE 368 96 368 80
WIRE 480 96 480 80
WIRE -176 112 -176 48
WIRE -112 112 -176 112
WIRE 176 112 144 112
WIRE -112 176 -176 176
WIRE 176 176 144 176
WIRE 368 192 368 176
WIRE 480 192 480 176
WIRE -400 224 -400 176
WIRE -176 224 -176 176
WIRE -176 224 -400 224
WIRE -400 240 -400 224
WIRE -112 240 -144 240
WIRE 176 240 144 240
SYMBOL voltage -400 192 M180
WINDOW 0 24 104 Left 0
WINDOW 3 24 16 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 10m 1K)
SYMBOL voltage 480 80 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL opamps\\LT1920 16 144 R0
SYMATTR InstName U1
SYMBOL voltage 368 80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 64 -80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 1K
FLAG 368 192 0
FLAG 368 80 +V
FLAG 176 112 +V
FLAG 480 192 0
FLAG 480 80 -V
FLAG -144 240 -V
FLAG -400 240 0
FLAG 176 176 OUT
TEXT 248 296 Left 0 !.tran 3m
* Z:\tmp\asc_dec_bjh7r6w2\11c2b517709a_vtl5c2_2_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
C1 l1 0 100n
Rdark N006 Ldr2 1e6
Vs N007 K 0
B1 N006 Ldr2 I=if(V(l1)>0,V(Tab,Ldr2)/RLdr(V(l1),b,a,Rs),0)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 -16 240 -48
WIRE 352 -16 352 -48
WIRE 160 0 160 -48
WIRE -336 32 -352 32
WIRE -176 32 -192 32
WIRE -48 32 -112 32
WIRE 64 32 32 32
WIRE -336 64 -336 32
WIRE 240 80 240 64
WIRE 240 80 160 80
WIRE 352 80 352 48
WIRE 352 80 240 80
WIRE 416 80 352 80
WIRE 416 112 416 80
WIRE 432 112 416 112
WIRE -192 144 -192 32
WIRE -176 144 -192 144
WIRE -96 144 -112 144
WIRE -48 144 -96 144
WIRE 64 144 64 32
WIRE 64 144 32 144
WIRE 96 144 64 144
WIRE 240 144 160 144
WIRE 352 144 240 144
WIRE 416 144 416 112
WIRE 416 144 352 144
WIRE -336 160 -336 128
WIRE 240 176 240 144
WIRE 352 176 352 144
WIRE -192 192 -192 144
WIRE 160 192 160 144
WIRE 64 208 64 144
WIRE -336 272 -336 240
WIRE -336 272 -352 272
WIRE 240 272 240 256
WIRE 240 272 160 272
WIRE 352 272 352 240
WIRE 352 272 240 272
WIRE 416 272 352 272
SYMBOL cap 48 208 R0
WINDOW 3 -58 54 Left 0
SYMATTR Value 100n
SYMATTR InstName C1
SYMBOL res 224 160 R0
SYMATTR InstName Rdark
SYMATTR Value 1e6
SYMBOL voltage -336 144 R0
SYMATTR InstName Vs
SYMATTR Value 0
SYMBOL bi 160 192 R0
WINDOW 3 -60 107 Left 0
SYMATTR Value I=if(V(l1)>0,V(Tab,Ldr2)/RLdr(V(l1),b,a,Rs),0)
SYMATTR InstName B1
FLAG -192 272 0
FLAG 96 144 l1
FLAG 64 272 0
FLAG -352 32 A
FLAG 416 272 Ldr2
FLAG -352 272 K
FLAG -96 144 nd
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6254.asc
* Generated by LTspice 26.0.1 for Windows.
* Single-ended in to differential out
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6254.asy)
R1 OUT+ N001 1K
R3 OUT- N002 1K
XU2 OUT- 0 N003 N002 +V LTC6253 ;pnba 1)2)3)4)5
V4 IN 0 SINE(2.5 1 250K)
XU1 OUT+ 0 IN N001 +V LTC6253 ;pnba 1)2)3)4)5
R5 N003 +V 1K
R6 0 N003 1K
R2 N001 IN 1K
V2 +V 0 5
R4 N002 IN 1K
C1 N003 0 0.1
.tran 25u
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 416 -1232 400 -1232
WIRE 512 -1232 496 -1232
WIRE 528 -1232 512 -1232
WIRE 624 -1232 608 -1232
WIRE 560 -1136 560 -1152
WIRE 512 -1120 512 -1232
WIRE 528 -1120 512 -1120
WIRE 624 -1104 624 -1232
WIRE 624 -1104 592 -1104
WIRE 656 -1104 624 -1104
WIRE 400 -1088 400 -1232
WIRE 400 -1088 144 -1088
WIRE 528 -1088 400 -1088
WIRE 144 -1072 144 -1088
WIRE 560 -1056 560 -1072
WIRE 144 -976 144 -992
WIRE 400 -976 400 -1088
WIRE 416 -976 400 -976
WIRE 512 -976 496 -976
WIRE 528 -976 512 -976
WIRE 624 -976 608 -976
WIRE 656 -976 624 -976
WIRE 560 -880 560 -896
WIRE 512 -864 512 -976
WIRE 528 -864 512 -864
WIRE 80 -848 80 -864
WIRE 624 -848 624 -976
WIRE 624 -848 592 -848
WIRE 272 -832 240 -832
WIRE 384 -832 352 -832
WIRE 464 -832 384 -832
WIRE 528 -832 464 -832
WIRE 384 -800 384 -832
WIRE 464 -800 464 -832
WIRE 560 -800 560 -816
WIRE 80 -752 80 -768
WIRE 384 -704 384 -720
WIRE 464 -704 464 -736
SYMBOL voltage 144 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V4
SYMATTR Value SINE(2.5 1 250K)
SYMBOL res 368 -704 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R6
SYMATTR Value 1K
SYMBOL res 624 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 512 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 368 -848 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1K
SYMBOL cap 448 -800 R0
SYMATTR InstName C1
SYMATTR Value 0.1
SYMBOL res 624 -992 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL Opamps\\LTC6254 560 -1104 R0
SYMATTR InstName U1
SYMBOL voltage 80 -864 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL Opamps\\LTC6254 560 -848 R0
SYMATTR InstName U2
SYMBOL res 512 -992 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
FLAG 80 -864 +V
FLAG 80 -752 0
FLAG 144 -976 0
FLAG 656 -1104 OUT+
FLAG 560 -1056 0
FLAG 144 -1088 IN
FLAG 560 -800 0
FLAG 656 -976 OUT-
FLAG 240 -832 +V
FLAG 464 -704 0
FLAG 384 -704 0
FLAG 560 -896 +V
FLAG 560 -1152 +V
TEXT 688 -728 Left 2 !.tran 25u
TEXT 384 -1312 Bottom 2 ;Single-ended in to differential out