* Z:\home\khalils\Downloads\files\data\raw_asc\1101fa5416bf_P3.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vo1 Vin1 N001 N001 mnm
M2 Vo2 0 N001 N001 mnm
V1 Vdd 0 1
V2 0 Vss 1
V3 Vin1 0 SINE(0 1m 1k)
B1 N001 Vss I = 1m * limit((V(n001, 0) + 0.8)/0.001, 0, 1)
M3 Vo1 Vb2 Vdd Vdd mpm
M4 Vo2 Vb2 Vdd Vdd mpm
V5 Vt 0 AC 1
M5 Vb2 Vb2 Vdd Vdd mpm2
B2 Vb2 0 I = 1m
R1 Vo1 0 20k
R2 Vo2 0 20k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model mpm PMOS(Kp=80u vto=-0.6 lambda=0.05 W=9u L=0.18u gamma=0 phi=0)
.model mnm NMOS(Kp=250u vto=0.6 lambda=0.05 W=18u L=0.18u gamma=0 phi=0)
.tran 0 5m 0 1u
.model mpm2 PMOS(Kp=80u vto=-0.6 lambda=0.05 W=18u L=0.18u gamma=0 phi=0)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 740
WIRE -288 -592 -544 -592
WIRE -160 -592 -160 -640
WIRE -160 -592 -288 -592
WIRE -48 -592 -160 -592
WIRE 16 -560 -416 -560
WIRE -544 -544 -544 -592
WIRE -288 -544 -288 -592
WIRE -48 -544 -48 -592
WIRE -416 -528 -416 -560
WIRE -416 -528 -496 -528
WIRE -336 -528 -416 -528
WIRE 16 -528 16 -560
WIRE 16 -528 0 -528
WIRE -544 -416 -544 -448
WIRE -416 -416 -416 -528
WIRE -416 -416 -544 -416
WIRE -288 -416 -288 -448
WIRE -288 -416 -336 -416
WIRE -192 -416 -288 -416
WIRE -48 -416 -48 -448
WIRE -48 -416 -128 -416
WIRE 0 -416 -48 -416
WIRE -288 -384 -288 -416
WIRE -48 -384 -48 -416
WIRE -336 -304 -416 -304
WIRE 64 -304 0 -304
WIRE 80 -304 64 -304
WIRE -544 -240 -544 -416
WIRE -288 -240 -288 -288
WIRE -160 -240 -288 -240
WIRE -48 -240 -48 -288
WIRE -48 -240 -160 -240
WIRE -160 -160 -160 -240
WIRE -544 -112 -544 -160
WIRE -160 -16 -160 -80
WIRE -832 384 -832 352
WIRE -832 384 -864 384
WIRE -832 432 -832 384
FLAG -832 208 0
FLAG -688 128 0
FLAG -832 272 Vin1
FLAG -832 128 Vdd
FLAG -688 208 Vss
FLAG 64 -304 Vin2
FLAG -160 -640 Vdd
FLAG -160 -16 Vss
FLAG -864 384 0
FLAG -832 432 Vin2
FLAG -336 -416 Vo1
FLAG 0 -416 Vo2
FLAG -192 192 0
FLAG -192 112 Vt
FLAG -416 -304 Vin1
FLAG -544 -112 0
FLAG -544 -416 Vb2
FLAG -192 -336 0
FLAG -128 -336 0
SYMBOL nmos -336 -384 R0
SYMATTR InstName M1
SYMATTR Value mnm
SYMBOL nmos 0 -384 M0
SYMATTR InstName M2
SYMATTR Value mnm
SYMBOL voltage -832 112 R0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL voltage -688 112 R0
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL voltage -832 256 R0
WINDOW 3 24 44 Left 2
WINDOW 123 24 72 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 1m 1k)
SYMATTR InstName V3
SYMBOL bi -160 -160 R0
SYMATTR InstName B1
SYMATTR Value I = 1m * limit((V(n001, 0) + 0.8)/0.001, 0, 1)
SYMBOL pmos -336 -448 M180
SYMATTR InstName M3
SYMATTR Value mpm
SYMBOL pmos 0 -448 R180
SYMATTR InstName M4
SYMATTR Value mpm
SYMBOL voltage -192 96 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V5
SYMATTR Value ""
SYMBOL pmos -496 -448 R180
SYMATTR InstName M5
SYMATTR Value mpm2
SYMBOL bi -544 -240 R0
SYMATTR InstName B2
SYMATTR Value I = 1m
SYMBOL res -208 -432 R0
SYMATTR InstName R1
SYMATTR Value 20k
SYMBOL res -144 -432 R0
SYMATTR InstName R2
SYMATTR Value 20k
TEXT -560 304 Left 2 !.model mpm PMOS(Kp=80u vto=-0.6 lambda=0.05 W=9u L=0.18u gamma=0 phi=0)
TEXT -560 336 Left 2 !.model mnm NMOS(Kp=250u vto=0.6 lambda=0.05 W=18u L=0.18u gamma=0 phi=0)
TEXT -848 -48 Left 2 !.tran 0 5m 0 1u
TEXT -560 368 Left 2 !.model mpm2 PMOS(Kp=80u vto=-0.6 lambda=0.05 W=18u L=0.18u gamma=0 phi=0)