Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\55b867730424_LT1797_Gain___Offset.asc
* Generated by LTspice 26.0.1 for Windows.
* .STEP PARAM VAR LIST 4.5 5 5.5
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1797.asy)
Rg2 N001 0 17.32k
Rf N002 Vout 100k
Rg1 N001 N002 71.5k
R1 5V N001 10.22k
V1 5V 0 5
Vin N003 0 0
XU1 N003 N002 5V 0 Vout LT1797 ;pnba In+)In-)V+)V-)OUT
.dc Vin 1.782 3.935 0.001
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 96 32 64
WIRE 720 192 720 160
WIRE 32 240 32 176
WIRE 128 240 32 240
WIRE 288 240 208 240
WIRE 400 240 288 240
WIRE 528 240 480 240
WIRE 32 288 32 240
WIRE 720 304 720 272
WIRE 32 400 32 368
WIRE 352 400 352 384
WIRE 288 416 288 240
WIRE 320 416 288 416
WIRE 528 432 528 240
WIRE 528 432 384 432
WIRE 576 432 528 432
WIRE 320 448 112 448
WIRE 112 480 112 448
WIRE 352 496 352 464
WIRE 112 576 112 560
SYMBOL res 16 80 R0
SYMATTR InstName R1
SYMATTR Value 10.22k
SYMBOL res 384 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rf
SYMATTR Value 100k
SYMBOL OpAmps/LT1797 352 368 R0
SYMATTR InstName U1
SYMBOL voltage 720 176 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 16 272 R0
SYMATTR InstName Rg2
SYMATTR Value 17.32k
SYMBOL voltage 112 464 R0
SYMATTR InstName Vin
SYMATTR Value 0
SYMBOL res 112 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rg1
SYMATTR Value 71.5k
FLAG 32 400 0
FLAG 352 496 0
FLAG 720 160 5V
FLAG 720 304 0
FLAG 352 384 5V
FLAG 32 64 5V
FLAG 576 432 Vout
FLAG 112 576 0
TEXT 232 120 Left 2 !.dc Vin 1.782 3.935 0.001
TEXT 232 80 Left 2 ;.STEP PARAM VAR LIST 4.5 5 5.5
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX9917.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX9917.asy)
CL OUT 0 15p
V1 IN 0 SINE(0 50m 10k)
RL OUT 0 5k
XU1 IN OUT Vcc Vee OUT Vcc MAX9917 ;pnba In+)In-)V+)V-)OUT)SHDN
Vee 0 Vee 2.5
Vcc Vcc 0 2.5
.tran 100u
.lib MAX9917.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 64 288 64 272
WIRE 416 352 416 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 64 448 64 400
WIRE 416 448 416 416
WIRE 448 448 448 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 64 544 64 528
WIRE 304 592 304 576
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
SYMBOL MAX9917 432 400 R0
SYMATTR InstName U1
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 5k
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 10k)
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
FLAG 720 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
FLAG 448 448 Vcc
TEXT 16 632 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3410.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3410.asy)
V1 IN 0 5
Rload OUT 0 100
C1 OUT N002 10p
R1 OUT N002 887K
C2 OUT 0 4.7
XU1 IN 0 N001 IN MP_01 N002 LTC3410 ;pnba Run)GND)SW)Vin))FB
L1 N001 OUT 4.7
R2 N002 0 412K
.tran 250u startup
.lib LTC3410.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 700
WIRE 192 64 112 64
WIRE 352 64 192 64
WIRE 112 80 112 64
WIRE 352 80 352 64
WIRE 192 144 192 64
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 608 144 592 144
WIRE 704 144 608 144
WIRE 800 144 704 144
WIRE 896 144 800 144
WIRE 800 160 800 144
WIRE 896 160 896 144
WIRE 112 176 112 160
WIRE 608 176 608 144
WIRE 704 176 704 144
WIRE 800 256 800 224
WIRE 896 256 896 240
WIRE 608 304 608 256
WIRE 608 304 496 304
WIRE 704 304 704 240
WIRE 704 304 608 304
WIRE 608 320 608 304
WIRE 352 384 352 368
WIRE 608 416 608 400
SYMBOL cap 688 176 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL PowerProducts\\LTC3410 352 224 R0
SYMATTR InstName U1
SYMBOL RES 880 144 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 784 160 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL res 592 304 R0
SYMATTR InstName R2
SYMATTR Value 412K
SYMBOL VOLTAGE 112 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL res 592 160 R0
SYMATTR InstName R1
SYMATTR Value 887K
FLAG 112 176 0
FLAG 352 384 0
FLAG 800 256 0
FLAG 896 256 0
FLAG 608 416 0
FLAG 112 64 IN
FLAG 896 144 OUT
TEXT 728 352 Left 2 !.tran 250u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1a60da367939_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
+ IKF=24.3m ISE=1.28p NE=2.00 BR=4.00 NR=1.00
+ VAR=16.0 IKR=60.0m RE=1.51 RB=6.05 RC=0.605
+ XTB=1.5 CJE=6.27p VJE=1.10 MJE=0.500 CJC=2.02p VJC=0.300
+ MJC=0.300 TF=130p TR=27.4n EG=1.12 )
C3 N003 0 5.6p
C2 N003 0 56p
L1 N002 N003 12n
C4 P001 N003 470p
C1 N002 0 12p
R1 N002 N001 5
R2 P001 0 50
V1 N001 0 SINE(0 200m 144.39Meg 0 0 0)
.MODEL DI_MMBTH10 NPN (IS=1.26e-016 NF=1.00 BF={beta} VAF=114
.tran 0 2u 0 50p
.meas reQ1 AVG (V(Q1B)-V(Q1E))/Ic(Q1)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1380 680
WIRE -256 96 -288 96
WIRE -160 96 -176 96
WIRE -144 96 -160 96
WIRE -48 96 -64 96
WIRE 16 96 -48 96
WIRE 64 96 16 96
WIRE -160 112 -160 96
WIRE -48 112 -48 96
WIRE 16 112 16 96
WIRE -288 128 -288 96
SYMBOL ind -160 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 12n
SYMBOL cap -176 112 R0
SYMATTR InstName C1
SYMATTR Value 12p
SYMBOL cap 128 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 470p
SYMBOL cap -64 112 R0
SYMATTR InstName C2
SYMATTR Value 56p
SYMBOL cap 0 112 R0
SYMATTR InstName C3
SYMATTR Value 5.6p
SYMBOL res 112 80 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL voltage -288 112 R0
WINDOW 3 -522 11 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 200m 144.39Meg 0 0 0)
SYMATTR InstName V1
SYMBOL res -160 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5
FLAG -288 208 0
FLAG 16 176 0
FLAG -48 176 0
FLAG -160 176 0
FLAG 128 176 0
TEXT 256 416 Left 2 !.MODEL DI_MMBTH10  NPN (IS=1.26e-016 NF=1.00 BF={beta} VAF=114\n+ IKF=24.3m ISE=1.28p NE=2.00 BR=4.00 NR=1.00\n+ VAR=16.0 IKR=60.0m RE=1.51 RB=6.05 RC=0.605\n+ XTB=1.5 CJE=6.27p VJE=1.10 MJE=0.500 CJC=2.02p VJC=0.300\n+ MJC=0.300 TF=130p TR=27.4n EG=1.12 )
TEXT -816 176 Left 2 !.tran 0 2u 0 50p
TEXT -816 272 Left 2 !.meas reQ1 AVG (V(Q1B)-V(Q1E))/Ic(Q1)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2068.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC2068.asy)
V3 +V 0 3.3
V2 N002 0 5
R3 N004 N003 10K
R4 N003 0 100m
R5 N002 N003 {5/Iload}
R2 N001 0 10K
XU1 NC_01 NC_02 NC_03 NC_04 NC_05 NC_06 NC_07 NC_08 NC_09 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 LTC2068 ;pnba +INA)-INA)OUTA)V+)V-)+INB)-INB)OUTB)+INC)-INC)OUTC)+IND)-IND)OUTD)_SHDN
R1 OUT N001 1Meg
.op
.step dec param Iload .1m 250m 2
.lib LTC2068.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2188 680
WIRE 992 64 976 64
WIRE 1088 64 1072 64
WIRE 1152 64 1088 64
WIRE 1280 64 1232 64
WIRE 848 112 752 112
WIRE 752 128 752 112
WIRE 848 128 848 112
WIRE 1152 192 1152 160
WIRE 1088 208 1088 64
WIRE 1136 208 1088 208
WIRE 752 224 752 208
WIRE 1280 224 1280 64
WIRE 1280 224 1200 224
WIRE 1296 224 1280 224
WIRE 848 240 848 208
WIRE 992 240 848 240
WIRE 1136 240 1072 240
WIRE 656 256 656 240
WIRE 848 256 848 240
WIRE 1152 288 1152 256
WIRE 1184 288 1184 256
WIRE 656 352 656 336
WIRE 848 352 848 336
SYMBOL res 832 112 R0
SYMATTR InstName R5
SYMATTR Value {5/Iload}
SYMBOL res 1088 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL voltage 752 112 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 656 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL res 1248 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL LTC2068 1168 224 R0
SYMATTR InstName U1
SYMBOL res 1088 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 832 240 R0
SYMATTR InstName R4
SYMATTR Value 100m
FLAG 1296 224 OUT
FLAG 1152 288 0
FLAG 976 64 0
FLAG 1184 288 +V
FLAG 848 352 0
FLAG 752 224 0
FLAG 656 352 0
FLAG 656 240 +V
FLAG 1152 160 +V
TEXT 1040 344 Left 2 !.op\n.step dec param Iload .1m 250m 2
* Z:\home\khalils\Downloads\files\data\raw_asc\37bc6363bb6d_OP_AMP_Integrator.asc
* Generated by LTspice 26.0.1 for Windows.
* OP AMP INTEGRATOR
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
XU1 N005 N001 N003 N006 N002 LT1001 ;pnba In+)In-)V+)V-)OUT
V1 0 N006 12V
R2 N002 N001 100k
C1 N002 N001 10n
V2 N003 0 12V
R4 0 N002 10k
R3 N005 0 10k
R1 N001 N004 10k
V3 N004 0 SINE(0 5 1k)
.tran 0 10m 1m 0.01m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -176 32 -176
WIRE 368 -176 224 -176
WIRE 32 -64 32 -176
WIRE 160 -64 32 -64
WIRE 368 -64 368 -176
WIRE 368 -64 240 -64
WIRE 224 32 176 32
WIRE 320 32 304 32
WIRE 320 64 320 32
WIRE 176 112 176 32
WIRE -128 128 -176 128
WIRE 32 128 32 -64
WIRE 32 128 -48 128
WIRE 144 128 32 128
WIRE 368 144 368 -64
WIRE 368 144 208 144
WIRE 448 144 368 144
WIRE 144 160 32 160
WIRE 448 176 448 144
WIRE -176 192 -176 128
WIRE -80 192 -112 192
WIRE 32 192 32 160
WIRE 32 192 0 192
WIRE 176 224 176 176
WIRE -112 256 -112 192
WIRE 448 288 448 256
WIRE -176 304 -176 272
WIRE 176 336 176 304
SYMBOL res -32 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL OpAmps\\OP07 176 80 R0
SYMATTR InstName U1
SYMBOL voltage -176 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 5 1k)
SYMBOL voltage 208 32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value 12V
SYMBOL voltage 176 320 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
SYMATTR Value 12V
SYMBOL res 16 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 256 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL res 464 272 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL cap 224 -192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
FLAG 320 64 0
FLAG 176 336 0
FLAG 448 288 0
FLAG -112 256 0
FLAG -176 304 0
TEXT -240 40 Left 2 ;OP AMP INTEGRATOR
TEXT -144 344 Left 2 !.tran 0 10m 1m 0.01m
* Z:\home\khalils\Downloads\files\data\raw_asc\1f39d1f16a38_current-limiting-npn.asc
* Generated by LTspice 26.0.1 for Windows.
* Sizing:\nR2 sets max current -> set max current through the load: \nImax = 20 mA\n \nFind R2 at max current assuming its voltage drop is Vbe and Q2 is still not conducting \n-> R2 = 0.6V/Imax = 30 ohm\nFind base current at the limiting condition where Q2 is still not conducting \n-> Ib = Ic/100 = 200 uA\nFind R1 using KVL \n-> 12 = R1*Ib + 0.6 + 0.6 -> R1 = (12 - 1.2)/20 u = 54k ohm\n \nNow see what happens when R load changes -> max current \nthrough the circuit is fixed at 20 mA\nPossible application -> LED driver circuit\n \nAfter running the simulation:\n1) CTRL + L or View SPICE error log\n2) Right click -> Plot .step ed .meas data
* Current limiting circuit using NPN transistors
R3 Vcc N001 {R_load}
Q2 N002 N003 0 0 2N3904
Q1 N001 N002 N003 0 2N3904
R1 N002 Vcc 54k
R2 0 N003 {R2}
V1 Vcc 0 12
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1
.step param R_load 100 1k 50
.meas Load_current AVG I(R3)
.param R2=0.6/{Imax} Imax=50m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1892 728
WIRE -128 -48 -128 -96
WIRE 288 -16 288 -64
WIRE -128 64 -128 32
WIRE 288 128 288 64
WIRE 48 176 -32 176
WIRE 160 176 128 176
WIRE 224 176 160 176
WIRE 160 256 160 176
WIRE 288 304 288 224
WIRE 288 304 224 304
WIRE 288 352 288 304
WIRE 160 464 160 352
WIRE 288 464 288 432
SYMBOL npn 224 128 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage -128 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 272 -32 R0
SYMATTR InstName R3
SYMATTR Value {R_load}
SYMBOL res 144 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 54k
SYMBOL res 304 448 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL npn 224 256 M0
SYMATTR InstName Q2
SYMATTR Value 2N3904
FLAG 288 464 0
FLAG 160 464 0
FLAG -128 64 0
FLAG -128 -96 Vcc
FLAG 288 -64 Vcc
FLAG -32 176 Vcc
TEXT 520 -64 Left 2 ;Sizing:\nR2 sets max current -> set max current through the load: \nImax = 20 mA\n \nFind R2 at max current assuming its voltage drop is Vbe and Q2 is still not conducting \n-> R2 = 0.6V/Imax = 30 ohm\nFind base current at the limiting condition where Q2 is still not conducting \n-> Ib = Ic/100 = 200 uA\nFind R1 using KVL \n-> 12 = R1*Ib + 0.6 + 0.6 -> R1 = (12 - 1.2)/20 u = 54k ohm\n \nNow see what happens when R load changes -> max current \nthrough the circuit is fixed at 20 mA\nPossible application -> LED driver circuit\n \nAfter running the simulation:\n1) CTRL + L or View SPICE error log\n2) Right click -> Plot .step ed .meas data
TEXT 168 664 Left 2 !.tran 1
TEXT 168 552 Left 2 !.step param R_load 100 1k 50
TEXT 168 608 Left 2 !.meas Load_current AVG I(R3)
TEXT 56 -288 Left 4 ;Current limiting circuit using NPN transistors
TEXT 560 544 Left 2 !.param R2=0.6/{Imax} Imax=50m
* Z:\home\khalils\Downloads\files\data\raw_asc\18e0162327c5_exercise1_assignment6.asc
* Generated by LTspice 26.0.1 for Windows.
O1 in 0 out 0 TL1
R1/G out 0 1538.46
RL 0 out 50
RS in N001 50
Vs N001 0 SINE(0 1 1G)
.model TL1 LTRA (L = 286n C = 115p R = 1.8 Len = 1)
.tran 0 10n 0 0.001n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 16 -128 16
WIRE 192 16 32 16
WIRE 384 16 288 16
WIRE 480 16 384 16
WIRE 624 16 560 16
WIRE 384 64 384 16
WIRE -128 80 -128 16
WIRE 192 96 192 16
WIRE 288 96 288 16
WIRE -128 208 -128 160
WIRE 32 208 -128 208
WIRE 192 208 192 128
WIRE 192 208 32 208
WIRE 288 208 288 128
WIRE 384 208 384 144
WIRE 384 208 288 208
WIRE 480 208 384 208
WIRE 624 208 624 16
WIRE 624 208 480 208
WIRE 32 256 32 208
WIRE 480 256 480 208
FLAG 480 256 0
FLAG 32 256 0
FLAG 384 16 out
FLAG 192 16 in
SYMBOL ltline 240 112 R0
SYMATTR InstName O1
SYMATTR Value TL1
SYMBOL res 368 48 R0
SYMATTR InstName 1/G
SYMATTR Value 1538.46
SYMBOL res 576 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RL
SYMATTR Value 50
SYMBOL res 48 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RS
SYMATTR Value 50
SYMBOL voltage -128 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vs
SYMATTR Value SINE(0 1 1G)
TEXT -152 336 Left 2 !.model TL1 LTRA (L = 286n  C = 115p R = 1.8 Len = 1)
TEXT -154 372 Left 2 !.tran 0 10n 0 0.001n
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG452.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG452.asy)
V3 N001 0 SINE(0 15 1k)
V4 N003 0 pulse(0 3.3 0 1u 1u 5m 10m)
V2 -V 0 -15
R1 N002 0 1K
XU2 N003 N002 N001 -V 0 +V ADG452 ;pnba IN)D)S)Vss)GND)Vdd
V1 +V 0 15
.tran 30m
.lib ADG452.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -96
WIRE -528 -32 -528 -48
WIRE -368 0 -400 0
WIRE -240 0 -288 0
WIRE 0 0 -48 0
WIRE 0 16 0 0
WIRE -528 64 -528 48
WIRE -240 64 -336 64
WIRE 0 112 0 96
WIRE -528 160 -528 144
WIRE -336 160 -336 64
WIRE -208 192 -208 176
WIRE -80 192 -80 176
WIRE -528 256 -528 240
WIRE -336 256 -336 240
SYMBOL voltage -336 144 R0
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMBOL voltage -528 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL ADG452 -144 48 R0
SYMATTR InstName U2
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -528 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -272 0 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 15 1k)
FLAG -528 256 0
FLAG -528 64 0
FLAG -528 -48 +V
FLAG -528 144 -V
FLAG -400 0 0
FLAG -208 192 -V
FLAG -144 -96 +V
FLAG -80 192 0
FLAG -336 256 0
FLAG 0 112 0
TEXT 16 176 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6016.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6016.asy)
XU1 N003 N002 +V -V Out LT6016 ;pnba IN+)IN-)VCC)VEE)OUT
R1 N002 N001 1K
R3 0 N003 100K
Vcom N001 0 50
V2 -V 0 -5
Vin N001 N004 SINE(0 10m 1K)
R4 Out N002 100K
V1 +V 0 5
R2 N003 N004 1K
.tran 5m
.lib LT6016.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 64 -48 64
WIRE 192 64 80 64
WIRE 336 64 272 64
WIRE 416 64 336 64
WIRE 528 64 496 64
WIRE -48 80 -48 64
WIRE 80 144 80 64
WIRE 416 160 416 144
WIRE -48 176 -48 160
WIRE 336 176 336 64
WIRE 384 176 336 176
WIRE 528 192 528 64
WIRE 528 192 448 192
WIRE 576 192 528 192
WIRE 384 208 336 208
WIRE 416 240 416 224
WIRE 80 304 80 224
WIRE 192 304 80 304
WIRE 336 304 336 208
WIRE 336 304 272 304
WIRE 416 304 336 304
WIRE 576 304 496 304
WIRE -144 320 -144 304
WIRE -48 320 -48 304
WIRE 576 320 576 304
WIRE -144 416 -144 400
WIRE -48 416 -48 400
SYMBOL voltage -144 304 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -48 304 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 512 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL res 288 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 512 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL voltage -48 64 R0
SYMATTR InstName Vcom
SYMATTR Value 50
SYMBOL res 288 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL LT6016 416 192 R0
SYMATTR InstName U1
SYMBOL voltage 80 128 R0
SYMATTR InstName Vin
SYMATTR Value SINE(0 10m 1K)
FLAG -144 416 0
FLAG -48 416 0
FLAG -144 304 +V
FLAG 416 240 -V
FLAG -48 176 0
FLAG 576 320 0
FLAG 576 192 Out
FLAG 416 144 +V
FLAG -48 304 -V
TEXT 520 384 Left 2 !.tran 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1563-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\FilterProducts\LTC1563-2.asy)
V2 N001 0 3.3
R5 N002 IN 10K
XU1 N001 N002 N004 N006 N007 0 0 N003 N005 OUT N001 LTC1563-2 ;pnba _LP)SA)INVA)LPA)AGND)V-)_EN)SB)INVB)LPB)V+
R2 N006 N002 10K
R3 N005 N003 10K
R6 N003 N006 10K
R4 OUT N003 10K
V1 IN 0 1.66 ac 1
C1 N007 0 .1
R1 N004 N002 10K
.ac oct 10 1 100Meg
.lib LTC1563-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1124 2376
WIRE 240 1632 -16 1632
WIRE 560 1632 240 1632
WIRE -16 1648 -16 1632
WIRE 240 1680 240 1632
WIRE 256 1680 240 1680
WIRE 560 1680 560 1632
WIRE 560 1680 544 1680
WIRE -16 1744 -16 1728
WIRE 256 1760 16 1760
WIRE 592 1760 544 1760
WIRE 656 1760 592 1760
WIRE 784 1760 736 1760
WIRE 16 1840 16 1760
WIRE 144 1840 16 1840
WIRE 256 1840 224 1840
WIRE 576 1840 544 1840
WIRE 784 1840 784 1760
WIRE 784 1840 656 1840
WIRE -80 1920 -160 1920
WIRE 16 1920 16 1840
WIRE 16 1920 0 1920
WIRE 32 1920 16 1920
WIRE 128 1920 112 1920
WIRE 256 1920 128 1920
WIRE 784 1920 784 1840
WIRE 784 1920 544 1920
WIRE -160 1936 -160 1920
WIRE 176 2000 160 2000
WIRE 256 2000 240 2000
WIRE 784 2000 784 1920
WIRE -160 2032 -160 2016
WIRE 256 2080 240 2080
WIRE 560 2080 544 2080
WIRE 128 2144 128 1920
WIRE 784 2144 784 2080
WIRE 784 2144 128 2144
SYMBOL res 768 1984 R0
SYMATTR InstName R6
SYMATTR Value 10K
SYMBOL res 640 1744 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 560 1824 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL VOLTAGE -160 1920 R0
SYMATTR InstName V1
SYMATTR Value 1.66 ac 1
SYMBOL cap 240 1984 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL res 16 1904 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10K
SYMBOL res 128 1904 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL VOLTAGE -16 1632 R0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL res 240 1824 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL LTC1563-2 400 2016 R0
SYMATTR InstName U1
FLAG -16 1744 0
FLAG 240 2080 0
FLAG 560 2080 0
FLAG 160 2000 0
FLAG -160 2032 0
FLAG 592 1760 OUT
FLAG -160 1920 IN
TEXT 664 2184 Left 2 !.ac oct 10 1 100Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\1ed6ccec8ddc__Fig2_23_T_H_MSD.asc
* Generated by LTspice 26.0.1 for Windows.
* Run simulation\nMake waveforms active window\nGo to View -> FFT (note signals are displayed in RMS)\nPress OK then \ngo to Plot Settings -> Reload Plot Settings
A1 Vin 0 0 clock 0 0 Vout 0 SAMPLEHOLD REF=0.5
Vin Vin 0 SINE(0.5 0.5 3MEG)
Vclock clock 0 PULSE(0 1 0 0 0 4.9n 10n)
.tran 0 2000n 0 .1n uic
.model switmod SW
.options plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1344 696
WIRE 384 208 320 208
WIRE 736 208 384 208
WIRE 736 240 672 240
WIRE 992 256 912 256
WIRE 320 272 320 208
WIRE 736 304 608 304
WIRE 608 336 608 304
WIRE 320 416 320 352
WIRE 608 480 608 416
SYMBOL SpecialFunctions\\sample 816 240 R0
WINDOW 3 -31 111 Left 0
SYMATTR InstName A1
SYMATTR Value REF=0.5
SYMBOL voltage 320 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value SINE(0.5 0.5 3MEG)
SYMBOL voltage 608 320 R0
WINDOW 0 36 42 Left 0
WINDOW 3 35 69 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vclock
SYMATTR Value PULSE(0 1 0 0 0 4.9n 10n)
FLAG 320 416 0
FLAG 384 208 Vin
FLAG 608 480 0
FLAG 608 304 clock
FLAG 992 256 Vout
FLAG 672 240 0
TEXT 920 144 Left 0 !.tran 0 2000n 0 .1n uic
TEXT 920 176 Left 0 !.model switmod SW\n.options plotwinsize=0
TEXT 296 8 Left 0 ;Run simulation\nMake waveforms active window\nGo to View -> FFT (note signals are displayed in RMS)\nPress OK then \ngo to Plot Settings -> Reload Plot Settings