Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4357.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4357.asy)
MQ1 N002 N003 N001 N001 IRF530
MQ2 N002 N005 N004 N004 IRF530
Rload N002 0 10
V2 N004 0 PWL(0 0 50m 48 100m 0)
V1 N001 0 PWL(0 48 50m 0 100m 48)
XU1 N002 N001 N003 0 N002 LTC4357 ;pnba OUT)IN)Gate)GND)Vdd
XU2 N002 N004 N005 0 N002 LTC4357 ;pnba OUT)IN)Gate)GND)Vdd
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m
.lib LTC4357.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 948 1284
WIRE -32 144 -400 144
WIRE 112 144 -32 144
WIRE 304 144 208 144
WIRE -400 160 -400 144
WIRE 128 224 128 192
WIRE -400 256 -400 240
WIRE -32 288 -32 144
WIRE 0 288 -32 288
WIRE 304 288 304 144
WIRE 304 288 256 288
WIRE 304 384 304 288
WIRE 304 384 256 384
WIRE 304 448 304 384
WIRE 448 448 304 448
WIRE 128 464 128 448
WIRE 448 464 448 448
WIRE -32 512 -400 512
WIRE 112 512 -32 512
WIRE 304 512 304 448
WIRE 304 512 208 512
WIRE -400 528 -400 512
WIRE 448 560 448 544
WIRE 128 592 128 560
WIRE -400 624 -400 608
WIRE -32 656 -32 512
WIRE 0 656 -32 656
WIRE 304 656 304 512
WIRE 304 656 256 656
WIRE 304 752 304 656
WIRE 304 752 256 752
WIRE 128 832 128 816
SYMBOL LTC4357 128 704 R0
SYMATTR InstName U2
SYMBOL res 432 448 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL LTC4357 128 336 R0
SYMATTR InstName U1
SYMBOL voltage -400 512 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PWL(0 0 50m 48 100m 0)
SYMATTR InstName V2
SYMBOL nmos 208 560 M270
WINDOW 0 55 46 VTop 2
WINDOW 3 -13 73 VLeft 2
SYMATTR InstName Q2
SYMATTR Value IRF530
SYMBOL voltage -400 144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PWL(0 48 50m 0 100m 48)
SYMATTR InstName V1
SYMBOL nmos 208 192 M270
WINDOW 0 55 46 VTop 2
WINDOW 3 -13 73 VLeft 2
SYMATTR InstName Q1
SYMATTR Value IRF530
FLAG 128 464 0
FLAG -400 256 0
FLAG 448 560 0
FLAG 128 832 0
FLAG -400 624 0
TEXT 360 720 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\ee5634535041_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
* DAQ OUTPUT (STAIRCASE FUNCTION)
* LINEAR RAMP OUTPUT
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
R2 N001 IN R
XU2 NC_03 NC_04 NC_05 NC_06 NC_07 LT1001 ;pnba In+)In-)V+)V-)OUT
C1 OUT N001 C
XU1 0 N001 NC_01 NC_02 OUT LT1001 ;pnba In+)In-)V+)V-)OUT
R1 OUT N001 R
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -32 80 -32
WIRE 304 -32 224 -32
WIRE 80 64 80 -32
WIRE 144 64 80 64
WIRE 304 64 304 -32
WIRE 304 64 208 64
WIRE -64 144 -96 144
WIRE 80 144 80 64
WIRE 80 144 16 144
WIRE 160 144 80 144
WIRE 304 160 304 64
WIRE 304 160 224 160
WIRE 416 160 304 160
WIRE 160 176 128 176
WIRE 128 224 128 176
WIRE 128 224 32 224
WIRE 32 256 32 224
SYMBOL OpAmps\\OP07 192 96 R0
SYMATTR InstName U1
SYMBOL cap 208 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMBOL res 240 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMBOL OpAmps\\OP07 -656 16 R0
SYMATTR InstName U2
SYMBOL res 32 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
FLAG 32 256 0
FLAG -96 144 IN
FLAG 416 160 OUT
TEXT -400 24 Left 2 ;DAQ OUTPUT (STAIRCASE FUNCTION)
TEXT 344 128 Left 2 ;LINEAR RAMP OUTPUT
* Z:\home\khalils\Downloads\files\data\raw_asc\6eb9c895f504_Draft9.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N004 0 164.30
R1 N003 0 1k
R3 N001 N002 1000
V1 N001 0 15
J1 N002 N003 N004 NJF
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.tran 0 .01 .001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 560 64 336 64
WIRE 560 160 560 64
WIRE 336 176 336 144
WIRE 288 240 192 240
WIRE 192 304 192 240
WIRE 336 304 336 272
WIRE 272 384 192 384
WIRE 336 384 272 384
WIRE 560 384 560 240
WIRE 560 384 336 384
SYMBOL Voltage 560 144 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL Res 320 48 R0
SYMATTR InstName R3
SYMATTR Value 1000
SYMBOL njf 288 176 R0
SYMATTR InstName J1
SYMBOL Res 320 288 R0
SYMATTR InstName R2
SYMATTR Value 164.30
SYMBOL Res 176 288 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 272 384 0
TEXT 128 504 Left 2 !.tran 0 .01 .001
* Z:\home\khalils\Downloads\files\data\raw_asc\20bde0faf336_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 vin N001 vcc vcc- N002 OP27 ;pnba In+)In-)V+)V-)OUT
R1 N002 N001 2.88k
V1 vcc 0 5
V2 vin 0 SINE(0 0.447 1k)
R2 N001 0 1k
V3 vcc- 0 -5
.tran 10m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP27.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 32 64 32
WIRE 192 32 176 32
WIRE -64 128 -96 128
WIRE 64 128 64 32
WIRE 64 128 16 128
WIRE 96 128 64 128
WIRE -96 144 -96 128
WIRE 192 144 192 32
WIRE 192 144 160 144
WIRE 240 144 192 144
FLAG -320 16 vcc
FLAG -320 96 0
FLAG 128 112 vcc
FLAG -96 144 0
FLAG -320 304 0
FLAG -320 224 vin
FLAG 304 144 vout
FLAG -224 96 0
FLAG -224 16 vcc-
FLAG 128 176 vcc-
FLAG 96 160 vin
SYMBOL OpAmps\\OP27 128 80 R0
SYMATTR InstName U1
SYMBOL res 192 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2.88k
SYMBOL voltage -320 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -320 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 0.447 1k)
SYMBOL res 32 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -224 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -5
TEXT -226 358 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\5351b364c34d_ID_vs_UDS-1_1.asc
* Generated by LTspice 26.0.1 for Windows.
Vds N001 0
Vgs N002 0
M1 N001 N002 0 0 IPP052N06L3
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vds 0 50V Vgs 2V 5V 0.5V
.meas dc Id_6V find Id(M1) when Vds=6V
.meas dc Id_4V find Id(M1) when Vds=4V
* ID_vs_UDS-1_1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1292 680
WIRE -576 -96 -720 -96
WIRE -720 -64 -720 -96
WIRE -576 -16 -576 -96
WIRE -768 16 -912 16
WIRE -912 32 -912 16
WIRE -912 128 -912 112
WIRE -720 128 -720 32
WIRE -576 128 -576 64
FLAG -576 128 0
FLAG -912 128 0
FLAG -720 128 0
SYMBOL voltage -576 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 37 60 Left 2
SYMATTR InstName Vds
SYMATTR Value ""
SYMBOL voltage -912 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 53 Left 2
WINDOW 3 40 69 Left 2
WINDOW 0 36 56 Left 2
SYMATTR Value ""
SYMATTR InstName Vgs
SYMBOL nmos -768 -64 R0
WINDOW 0 69 14 Left 2
WINDOW 3 68 33 Left 2
SYMATTR InstName M1
SYMATTR Value IPP052N06L3
TEXT -920 160 Left 2 !.dc Vds 0 50V  Vgs 2V 5V 0.5V
TEXT -920 184 Left 2 !.meas dc Id_6V find Id(M1) when Vds=6V
TEXT -920 200 Left 2 !.meas dc Id_4V find Id(M1) when Vds=4V
TEXT -912 -80 Left 2 ;ID_vs_UDS-1_1
* Z:\home\khalils\Downloads\files\data\raw_asc\ae4dd309f4ed_1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 0 5
R2 N002 N001 2
I1 0 N001 AC 1 0
R4 0 N003 1
C1 N002 N001 {1/8}
R3 N003 N002 10
C2 N003 N002 {1/10}
.ac dec 30 1m 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 -48 80 -48
WIRE 224 -48 176 -48
WIRE 272 -48 224 -48
WIRE 400 -48 352 -48
WIRE 16 16 -208 16
WIRE 80 16 80 -48
WIRE 80 16 16 16
WIRE 400 16 400 -48
WIRE 576 16 400 16
WIRE 736 16 656 16
WIRE 80 80 80 16
WIRE 112 80 80 80
WIRE 224 80 224 -48
WIRE 224 80 176 80
WIRE 272 80 224 80
WIRE 400 80 400 16
WIRE 400 80 336 80
WIRE 16 128 16 16
WIRE -208 144 -208 16
WIRE -208 320 -208 224
WIRE 16 320 16 208
WIRE 16 320 -208 320
WIRE 304 320 16 320
WIRE 736 320 736 16
WIRE 736 320 304 320
WIRE 304 352 304 320
SYMBOL cap 336 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {1/10}
SYMBOL cap 176 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {1/8}
SYMBOL res 192 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2
SYMBOL res 0 112 R0
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL res 368 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL current -208 224 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 24 -28 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMBOL res 672 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1
FLAG 304 352 0
TEXT 126 266 Left 2 !.ac dec 30 1m 100
* Z:\tmp\asc_dec_bjh7r6w2\085b5f36d316_DC_DC_CPM_ASM_Step_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
B3 v_err 0 V=V(v_ref)-V(v_o)
B2 0 v_2 I=V(i_c)*V(v_1)/V(v_2)
B1 v_1 N001 I=V(i_c)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1448 812
WIRE 656 16 624 16
WIRE 832 16 656 16
WIRE 304 112 48 112
WIRE 336 112 304 112
WIRE 624 128 624 16
WIRE 336 160 336 112
WIRE 336 304 336 240
WIRE 336 304 48 304
WIRE 624 304 624 208
WIRE 960 304 624 304
WIRE 624 320 624 304
WIRE 1008 496 768 496
WIRE 768 528 768 496
WIRE 768 624 768 608
SYMBOL bv 768 512 R0
SYMATTR InstName B3
SYMATTR Value V=V(v_ref)-V(v_o)
SYMBOL bi 624 208 R180
WINDOW 0 24 80 Left 2
WINDOW 3 -293 -5 Left 2
SYMATTR InstName B2
SYMATTR Value I=V(i_c)*V(v_1)/V(v_2)
SYMBOL bi 336 160 R0
SYMATTR InstName B1
SYMATTR Value I=V(i_c)
FLAG 304 112 v_1
FLAG 624 320 0
FLAG 656 16 v_2
FLAG 768 496 v_err
FLAG 768 624 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3026-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3026-1.asy)
R4 N002 0 4.02K
R2 OUT N002 8.06K
XU1 IN MP_01 0 0 N001 IN N003 N002 OUT LTC3026-1 ;pnba IN))GND)GNDS)Bias)_SHDN)PG)ADJ)OUT
C2 OUT 0 10
R1 OUT N003 100K
V1 IN 0 1.5
R3 OUT 0 .8
V2 N001 0 5
.tran .1 startup
.lib LTC3026.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
WIRE -32 112 -128 112
WIRE 32 112 -32 112
WIRE 336 112 320 112
WIRE 432 112 416 112
WIRE -128 128 -128 112
WIRE -32 208 -32 112
WIRE 32 208 -32 208
WIRE 352 208 320 208
WIRE 544 208 352 208
WIRE 592 208 544 208
WIRE 672 208 592 208
WIRE -128 224 -128 208
WIRE 592 224 592 208
WIRE 672 224 672 208
WIRE 32 304 16 304
WIRE 352 304 352 288
WIRE 352 304 320 304
WIRE 416 304 352 304
WIRE 512 304 496 304
WIRE 592 320 592 288
WIRE 672 320 672 304
WIRE 32 400 16 400
WIRE 336 400 320 400
WIRE 544 400 544 208
WIRE 544 400 416 400
SYMBOL PowerProducts\\LTC3026-1 176 256 R0
SYMATTR InstName U1
SYMBOL res 656 208 R0
SYMATTR InstName R3
SYMATTR Value .8
SYMBOL res 400 320 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 4.02K
SYMBOL voltage -128 112 R0
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL res 432 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 576 224 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res 336 192 R0
SYMATTR InstName R2
SYMATTR Value 8.06K
SYMBOL voltage 320 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value 5
FLAG -128 224 0
FLAG 16 400 0
FLAG 512 304 0
FLAG 592 320 0
FLAG 432 112 0
FLAG 672 320 0
FLAG -128 112 IN
FLAG 672 208 OUT
FLAG 16 304 0
TEXT 504 440 Left 2 !.tran .1 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1401.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 1 input\nParameter performance modeled at 15V dual supply\nPin Capacitance not included
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1401.asy)
V1 vS 0 10
XU1 v+ v- vIN vS vD 0 ADG1401 ;pnba Vdd)Vss)IN)S)D)GND
V3 v+ 0 15
R1 vD 0 301
C1 vD 0 36p
V4 v- 0 -15
V2 vIN 0 PULSE(0 3 0 1u 1u 5m 10m)
.tran 30m
.lib ADG1401.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 936 832
WIRE 240 160 240 96
WIRE -80 224 -112 224
WIRE 112 224 0 224
WIRE 144 224 112 224
WIRE 384 224 336 224
WIRE 464 224 384 224
WIRE 576 224 464 224
WIRE 464 256 464 224
WIRE 576 256 576 224
WIRE 112 288 48 288
WIRE 144 288 112 288
WIRE -304 304 -320 304
WIRE -176 304 -192 304
WIRE -320 336 -320 304
WIRE -192 336 -192 304
WIRE 48 336 48 288
WIRE 464 352 464 336
WIRE 576 352 576 320
WIRE 288 448 288 400
WIRE -320 464 -320 416
WIRE -192 464 -192 416
WIRE 48 464 48 416
WIRE 192 464 192 400
SYMBOL voltage 16 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL cap 560 256 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL res 448 240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage 48 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -20 198 Left 2
SYMATTR Value PULSE(0 3 0 1u 1u 5m 10m)
SYMATTR InstName V2
SYMBOL ADG1401 240 272 R0
SYMATTR InstName U1
SYMBOL voltage -192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -15
SYMBOL voltage -320 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15
FLAG -112 224 0
FLAG 48 464 0
FLAG 464 352 0
FLAG 288 448 0
FLAG 384 224 vD
FLAG 112 224 vS
FLAG 112 288 vIN
FLAG 576 352 0
FLAG -192 304 v-
FLAG 240 96 v+
FLAG -192 464 0
FLAG 192 464 v-
FLAG -320 304 v+
FLAG -320 464 0
TEXT 528 512 Left 2 !.tran 30m
TEXT -360 -16 Left 2 ;Note:\nSwitch shown for a logic 1 input\nParameter performance modeled at 15V dual supply\nPin Capacitance not included
* Z:\home\khalils\Downloads\files\data\raw_asc\27765a98e6c6_non_inverter.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp1.asy)
R1 N001 0 1k
R2 N002 N001 10k
XU2 N004 N001 N003 N005 N002 level1 Avol=1Meg GBW=120Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V2 N003 0 5
V1 N004 0 AC 1
V3 0 N005 5
.ac dec 1000 1e6 5e9
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -112 160 -112
WIRE 480 -112 352 -112
WIRE 368 32 304 32
WIRE 0 64 -96 64
WIRE 112 64 80 64
WIRE 160 64 160 -112
WIRE 160 64 112 64
WIRE 304 64 304 32
WIRE 368 64 368 32
WIRE -96 96 -96 64
WIRE 304 192 304 144
WIRE 112 208 112 64
WIRE 272 208 112 208
WIRE 480 224 480 -112
WIRE 480 224 336 224
WIRE 560 224 480 224
WIRE 272 240 -48 240
WIRE -48 272 -48 240
WIRE 304 352 304 256
WIRE -48 416 -48 352
WIRE 304 480 304 432
SYMBOL voltage 304 448 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 368 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 304 160 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -48 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value AC 1
SYMBOL res 96 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL OpAmps\\UniversalOpAmp1 304 224 R0
SYMATTR InstName U2
SYMATTR Value2 Avol=1Meg GBW=120Meg Vos=0
FLAG 304 480 0
FLAG 368 64 0
FLAG -48 416 0
FLAG -96 96 0
TEXT -128 504 Left 2 !.ac dec 1000 1e6 5e9
* Z:\home\khalils\Downloads\files\data\raw_asc\30ef2326443d_ADA4625.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 18
Rf OUT N001 49.9K
Id N001 0 PULSE(0 200u 1u 1p 1p 2u 3u 2)
Cf OUT N001 3p
Cd N001 0 6p
Rsh N001 0 2G
XU1 0 N001 +V -V OUT ADA4625-1 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -18
* PhotoDiode
* PDB-C134
.tran 6u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4625.asy)
.lib ADA4625-1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4472 1028
WIRE -2368 -608 -2384 -608
WIRE -2272 -608 -2304 -608
WIRE -2896 -512 -3008 -512
WIRE -2800 -512 -2896 -512
WIRE -2384 -512 -2384 -608
WIRE -2384 -512 -2800 -512
WIRE -2368 -512 -2384 -512
WIRE -2272 -512 -2272 -608
WIRE -2272 -512 -2288 -512
WIRE -3008 -496 -3008 -512
WIRE -2800 -496 -2800 -512
WIRE -3216 -480 -3216 -496
WIRE -2896 -480 -2896 -512
WIRE -2384 -416 -2384 -512
WIRE -2352 -416 -2384 -416
WIRE -3008 -400 -3008 -416
WIRE -2896 -400 -2896 -416
WIRE -2800 -400 -2800 -416
WIRE -2272 -400 -2272 -512
WIRE -2272 -400 -2288 -400
WIRE -2240 -400 -2272 -400
WIRE -3216 -384 -3216 -400
WIRE -2352 -384 -2384 -384
WIRE -2384 -352 -2384 -384
WIRE -3216 -288 -3216 -304
WIRE -3216 -192 -3216 -208
FLAG -3216 -384 0
FLAG -3216 -496 +V
FLAG -2240 -400 OUT
FLAG -2320 -432 +V
FLAG -2384 -352 0
FLAG -2320 -368 -V
FLAG -2800 -400 0
FLAG -2896 -400 0
FLAG -3008 -400 0
FLAG -3216 -192 0
FLAG -3216 -304 -V
SYMBOL voltage -3216 -496 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 18
SYMBOL res -2272 -528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rf
SYMATTR Value 49.9K
SYMBOL current -2800 -496 R0
WINDOW 123 24 116 Left 2
WINDOW 39 24 98 Left 2
SYMATTR Value PULSE(0 200u 1u 1p 1p 2u 3u 2)
SYMATTR InstName Id
SYMBOL cap -2304 -624 R90
WINDOW 0 -1 29 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName Cf
SYMATTR Value 3p
SYMBOL cap -2912 -480 R0
SYMATTR InstName Cd
SYMATTR Value 6p
SYMBOL res -3024 -512 R0
SYMATTR InstName Rsh
SYMATTR Value 2G
SYMBOL ADA4625 -2320 -464 R0
SYMATTR InstName U1
SYMBOL voltage -3216 -304 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value -18
TEXT -2760 -560 Center 2 ;PhotoDiode
TEXT -2904 -368 Center 2 ;PDB-C134
TEXT -2224 -256 Left 2 !.tran 6u
CIRCLE Normal -2400 -272 -3088 -624 2
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1503-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1503-1.8.asy)
V1 IN 0 PWL(0 6 5m 2.4)
C2 N002 N003 1
Rload OUT 0 18
C4 N005 0 100p
C3 OUT 0 10
C1 N001 N004 1
XU1 OUT N002 N003 IN N005 N004 0 N001 LTC1503-1.8 ;pnba Vout)C1-)C1+)Vin)_SHDN)C2+)GND)C2-
.tran 5m
.lib LTC1503-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1884 2612
WIRE 1296 2208 1168 2208
WIRE 1440 2208 1296 2208
WIRE 1824 2208 1728 2208
WIRE 1168 2224 1168 2208
WIRE 1296 2224 1296 2208
WIRE 1824 2240 1824 2208
WIRE 1440 2272 1376 2272
WIRE 1744 2272 1728 2272
WIRE 1168 2320 1168 2304
WIRE 1296 2320 1296 2288
WIRE 1440 2336 1376 2336
WIRE 1824 2336 1824 2304
WIRE 1824 2336 1728 2336
WIRE 1440 2400 1232 2400
WIRE 1776 2400 1728 2400
WIRE 1232 2416 1232 2400
WIRE 1776 2416 1776 2400
WIRE 1232 2512 1232 2496
WIRE 1776 2512 1776 2480
SYMBOL cap 1280 2224 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL PowerProducts\\LTC1503-1.8 1584 2304 R0
SYMATTR InstName U1
SYMBOL voltage 1232 2400 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 6 5m 2.4)
SYMBOL cap 1808 2240 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 1760 2416 R0
SYMATTR InstName C4
SYMATTR Value 100p
SYMBOL res 1152 2208 R0
SYMATTR InstName Rload
SYMATTR Value 18
SYMBOL cap 1360 2272 R0
WINDOW 0 35 17 Left 2
WINDOW 3 37 48 Left 2
SYMATTR InstName C2
SYMATTR Value 1
FLAG 1232 2512 0
FLAG 1744 2272 0
FLAG 1296 2320 0
FLAG 1168 2320 0
FLAG 1776 2512 0
FLAG 1168 2208 OUT
FLAG 1232 2400 IN
TEXT 1552 2544 Left 2 !.tran 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\3b826e4cc36f_TYPE2.asc
* Generated by LTspice 26.0.1 for Windows.
* Type 2 Compensator
* target gain at fz1\nzero frequency(Hz)\npole frequency(Hz)\nmax ouput voltage(V)\nmin output voltage(V)\nopen loop gain
* feedback
* reference
* 2024-12-29
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R1 N002 N001 {R1}
C1 ve N002 {C1}
V3 -V 0 {vl}
V2 +V 0 {vh}
B1 N003 0 V=V(fb)
C2 ve N001 {C2}
R2 N001 N003 {R2}
XU1 ref N001 +V -V ve level2 Avol={avol} GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.lib opamp.sub
.param g=1
.param fz1=1k
.param fp1=20k
.param vh=5
.param vl=0
.param avol=100k
.param R1=({R2}*{g})
.param C1=1/(2*PI*{R1}*{fz1})
.param C2=1/(2*PI*{R1}*{fp1})
.param R2=100k
.ic V(ve)=0
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1008 680
WIRE 464 -144 464 -160
WIRE 576 -144 576 -160
WIRE 464 -48 464 -64
WIRE 576 -48 576 -64
WIRE 192 -32 96 -32
WIRE 368 -32 256 -32
WIRE 96 64 96 -32
WIRE 144 64 96 64
WIRE 256 64 224 64
WIRE 368 64 368 -32
WIRE 368 64 320 64
WIRE 240 128 240 112
WIRE -208 144 -272 144
WIRE -32 144 -144 144
WIRE 96 144 96 64
WIRE 96 144 48 144
WIRE 208 144 96 144
WIRE 368 160 368 64
WIRE 368 160 272 160
WIRE 880 160 368 160
WIRE -144 176 -144 144
WIRE 208 176 128 176
WIRE 240 208 240 192
WIRE -144 272 -144 256
WIRE 128 336 128 176
WIRE 128 336 -256 336
IOPIN -272 144 In
IOPIN -256 336 In
IOPIN 880 160 Out
SYMBOL bv -144 160 R0
SYMATTR InstName B1
SYMATTR Value V=V(fb)
SYMBOL voltage 464 -160 R0
SYMATTR InstName V2
SYMATTR Value {vh}
SYMBOL cap 256 -48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {C2}
SYMBOL cap 320 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {C1}
SYMBOL res 64 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL UniversalOpAmp2 240 160 R0
WINDOW 123 34 49 Left 2
WINDOW 39 36 78 Left 2
WINDOW 40 32 106 Left 2
SYMATTR Value2 Avol={avol} GBW=10Meg Slew=10Meg
SYMATTR InstName U1
SYMBOL voltage 576 -160 R0
SYMATTR InstName V3
SYMATTR Value {vl}
SYMBOL res 240 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {R1}
FLAG -272 144 fb
FLAG -256 336 ref
FLAG -144 272 0
FLAG 880 160 ve
FLAG 576 -48 0
FLAG 464 -48 0
FLAG 464 -160 +V
FLAG 576 -160 -V
FLAG 240 112 +V
FLAG 240 208 -V
TEXT 272 184 Left 2 !.lib opamp.sub
TEXT -336 -224 Left 2 !.param g=1\n.param fz1=1k\n.param fp1=20k\n.param vh=5\n.param vl=0\n.param avol=100k
TEXT 416 72 Left 2 !.param R1=({R2}*{g})\n.param C1=1/(2*PI*{R1}*{fz1})\n.param C2=1/(2*PI*{R1}*{fp1})
TEXT -352 -288 Left 4 ;Type 2 Compensator
TEXT -80 208 Left 2 !.param R2=100k
TEXT -104 -224 Left 2 ;target gain at fz1\nzero frequency(Hz)\npole frequency(Hz)\nmax ouput voltage(V)\nmin output voltage(V)\nopen loop gain
TEXT -312 112 Left 2 ;feedback
TEXT -312 304 Left 2 ;reference
TEXT 656 176 Left 2 !.ic V(ve)=0
TEXT 448 -264 Left 2 ;2024-12-29
* Z:\home\khalils\Downloads\files\data\raw_asc\140e7bb9988b_FET-switch-on.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 Uds 100
V1 N002 0 PULSE(0 5V 10u 0.1u 0.1u 5m 10m)
M1 Uds Ugs 0 0 AOT2142L
Vdd N001 0 5V
R3 Ugs N002 300
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 30u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1292 680
WIRE -464 -288 -720 -288
WIRE -720 -240 -720 -288
WIRE -464 -128 -464 -288
WIRE -720 -112 -720 -160
WIRE -624 -112 -720 -112
WIRE -720 -96 -720 -112
WIRE -976 -16 -1040 -16
WIRE -848 -16 -896 -16
WIRE -768 -16 -848 -16
WIRE -1040 32 -1040 -16
WIRE -1040 160 -1040 112
WIRE -720 160 -720 0
WIRE -720 160 -1040 160
WIRE -464 160 -464 -48
WIRE -464 160 -720 160
WIRE -720 192 -720 160
SYMBOL voltage -464 -144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 36 82 Left 2
SYMATTR InstName Vdd
SYMATTR Value 5V
SYMBOL Misc\\EuropeanResistor -880 -32 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 300
SYMBOL Misc\\EuropeanResistor -736 -256 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL nmos -768 -96 R0
SYMATTR InstName M1
SYMATTR Value AOT2142L
SYMBOL voltage -1040 16 R0
WINDOW 123 0 0 Left 2
WINDOW 3 -81 162 Left 2
WINDOW 0 35 44 Left 2
WINDOW 39 -81 178 Left 2
SYMATTR Value PULSE(0 5V 10u 0.1u 0.1u 5m 10m)
SYMATTR InstName V1
FLAG -720 192 0
FLAG -624 -112 Uds
FLAG -848 -16 Ugs
TEXT -672 184 Left 2 !.tran 30u