Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG774.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nOff Isolation is -75 dB at 10MHz\nOnly one channel included\nCharge Injection not included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG774.asy)
V3 N004 0 PULSE(0 3 0 20n 20n 10u 20u)
V5 +V 0 5
C1 N002 0 36p
R1 N002 0 49.9
V2 N003 0 0
XU2 N004 N001 N002 N003 +V 0 0 ADG774 ;pnba IN)SA)D)SB)Vdd)GND)_EN
V1 N001 0 3
.tran 100u
.lib ADG774.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1696 -272 -1920 -272
WIRE -1920 -256 -1920 -272
WIRE -1408 -240 -1504 -240
WIRE -1296 -240 -1408 -240
WIRE -1408 -224 -1408 -240
WIRE -1296 -224 -1296 -240
WIRE -1696 -208 -1840 -208
WIRE -1840 -192 -1840 -208
WIRE -1920 -160 -1920 -176
WIRE -1696 -144 -1760 -144
WIRE -1472 -144 -1504 -144
WIRE -1472 -128 -1472 -144
WIRE -1408 -128 -1408 -144
WIRE -1296 -128 -1296 -160
WIRE -1840 -96 -1840 -112
WIRE -1760 -80 -1760 -144
WIRE -1600 -16 -1600 -32
WIRE -1760 32 -1760 0
SYMBOL voltage -1760 -96 R0
WINDOW 3 24 136 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 20n 20n 10u 20u)
SYMATTR InstName V3
SYMBOL voltage -1920 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL cap -1312 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -2144 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 5
SYMBOL voltage -1840 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL ADG774 -1600 -192 R0
SYMATTR InstName U2
SYMBOL res -1424 -240 R0
SYMATTR InstName R1
SYMATTR Value 49.9
FLAG -1920 -160 0
FLAG -1840 -96 0
FLAG -1760 32 0
FLAG -1600 -368 +V
FLAG -1408 -128 0
FLAG -1600 -16 0
FLAG -1296 -128 0
FLAG -1472 -128 0
FLAG -2144 -64 0
FLAG -2144 -144 +V
TEXT -1360 -40 Left 2 !.tran 100u
TEXT -2160 -472 Left 2 ;Note:\nOff Isolation is -75 dB at 10MHz\nOnly one channel included\nCharge Injection not included\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3309B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3309B.asy)
XU1 IN IN N003 N004 0 0 N002 N001 0 LTC3309B ;pnba Vin)EN)SW)FB)AGND)PGND)RT)Pgood)Mode/Sync
R2 N004 0 100K
R1 OUT N004 260K
Rload OUT 0 .4
V1 IN 0 4
L1 N003 OUT 150n Rser=3m
C3 OUT N004 2.2p
C1 OUT 0 47
R4 OUT N001 500K
R3 N002 0 70.7K
.tran 1.5m startup
.lib LTC3309B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2652 1736
WIRE 1536 1280 1440 1280
WIRE 1712 1280 1536 1280
WIRE 1440 1296 1440 1280
WIRE 1712 1296 1712 1280
WIRE 1536 1360 1536 1280
WIRE 1552 1360 1536 1360
WIRE 1920 1360 1872 1360
WIRE 2064 1360 2000 1360
WIRE 1440 1392 1440 1376
WIRE 1440 1472 1424 1472
WIRE 1552 1472 1520 1472
WIRE 1920 1472 1872 1472
WIRE 2064 1472 2064 1360
WIRE 2064 1472 2000 1472
WIRE 2160 1472 2064 1472
WIRE 2240 1472 2160 1472
WIRE 2320 1472 2240 1472
WIRE 2064 1488 2064 1472
WIRE 2160 1488 2160 1472
WIRE 2240 1488 2240 1472
WIRE 2320 1488 2320 1472
WIRE 1552 1584 1536 1584
WIRE 2064 1584 2064 1568
WIRE 2064 1584 1872 1584
WIRE 2160 1584 2160 1552
WIRE 2160 1584 2064 1584
WIRE 2240 1584 2240 1552
WIRE 2320 1584 2320 1568
WIRE 2064 1600 2064 1584
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
WIRE 2064 1696 2064 1680
SYMBOL VOLTAGE 1440 1280 R0
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL RES 2048 1472 R0
SYMATTR InstName R1
SYMATTR Value 260K
SYMBOL cap 2144 1488 R0
SYMATTR InstName C3
SYMATTR Value 2.2p
SYMBOL res 1536 1456 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 70.7K
SYMBOL res 2304 1472 R0
SYMATTR InstName Rload
SYMATTR Value .4
SYMBOL ind 1904 1488 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150n
SYMATTR SpiceLine Rser=3m
SYMBOL res 2016 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 500K
SYMBOL LTC3309B 1712 1456 R0
SYMATTR InstName U1
SYMBOL cap 2224 1488 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMBOL res 2048 1584 R0
SYMATTR InstName R2
SYMATTR Value 100K
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1440 1392 0
FLAG 1536 1584 0
FLAG 2320 1584 0
FLAG 2064 1696 0
FLAG 2240 1584 0
FLAG 1424 1472 0
FLAG 1440 1280 IN
FLAG 2320 1472 OUT
TEXT 2200 1696 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\56f71c45a307_inverting_amplifier.asc
* Generated by LTspice 26.0.1 for Windows.
* Inverting Amplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8541.asy)
R3 2.5V CB-H 10k
V2 5V 0 5
R2 N001 CB-H 4.7k
V1 CA-V 0 SINE(2.5 0.4 500)
V3 2.5V 0 2.5
R1 N001 CA-V 1k
XU1 2.5V N001 5V 0 CB-H AD8541 ;pnba In+)In-)V+)V-)OUT
.tran 10m
.lib AD8541.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 512 -32 480 -32
WIRE 624 -32 592 -32
WIRE 544 96 544 80
WIRE -304 112 -304 80
WIRE -208 112 -208 80
WIRE -112 112 -112 80
WIRE 352 112 320 112
WIRE 480 112 480 -32
WIRE 480 112 432 112
WIRE 512 112 480 112
WIRE 624 128 624 -32
WIRE 624 128 576 128
WIRE 720 128 624 128
WIRE 736 128 720 128
WIRE 512 144 480 144
WIRE 720 160 720 128
WIRE 544 192 544 160
WIRE -304 240 -304 192
WIRE -208 240 -208 192
WIRE -112 240 -112 192
WIRE 480 256 480 144
WIRE 560 256 480 256
WIRE 720 256 720 240
WIRE 720 256 560 256
WIRE 560 288 560 256
IOPIN -112 80 In
IOPIN 320 112 In
IOPIN -304 80 In
IOPIN 560 288 In
IOPIN -208 80 In
IOPIN 544 80 In
IOPIN 736 128 In
SYMBOL res 496 -48 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.7k
SYMBOL Opamps\\AD8541 544 64 R0
SYMATTR InstName U1
SYMBOL voltage -208 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 2.5
SYMBOL res 448 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -112 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(2.5 0.4 500)
SYMBOL voltage -304 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 736 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 10k
FLAG -112 240 0
FLAG -304 240 0
FLAG -112 80 CA-V
FLAG 320 112 CA-V
FLAG -304 80 5V
FLAG 560 288 2.5V
FLAG 544 192 0
FLAG -208 240 0
FLAG -208 80 2.5V
FLAG 544 80 5V
FLAG 736 128 CB-H
TEXT 272 -128 Left 2 ;Inverting Amplifier
TEXT -376 400 Left 2 !.tran 10m
* Z:\tmp\asc_dec_bjh7r6w2\093f8e5acce6_sweep_squarewave_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
B2 0 sc I=IF(V(sr)>0.5, V(vc)*1m, -V(vc)*1m)
E1 out 0 rc 0 20
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1064 680
WIRE 288 16 288 0
WIRE 208 96 0 96
WIRE 960 96 800 96
WIRE 288 144 288 96
WIRE 800 144 800 96
WIRE 544 160 448 160
WIRE 656 160 624 160
WIRE 704 160 656 160
WIRE 752 160 704 160
WIRE 288 176 288 144
WIRE 384 176 288 176
WIRE 480 192 448 192
WIRE 656 192 656 160
WIRE 288 208 288 176
WIRE 656 272 656 256
WIRE 752 272 752 208
WIRE 800 272 800 224
SYMBOL bi 288 16 R0
SYMATTR InstName B2
SYMATTR Value I=IF(V(sr)>0.5, V(vc)*1m, -V(vc)*1m)
SYMBOL e 800 128 R0
SYMATTR InstName E1
SYMATTR Value 20
FLAG 288 0 0
FLAG 480 192 sr
FLAG 288 144 sc
FLAG 656 272 0
FLAG 752 272 0
FLAG 800 272 0
FLAG 960 96 out
FLAG 704 160 rc
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG722.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG722.asy)
C1 N002 0 35p
V4 N003 0 PULSE(0 3 0 10n 10n 980n 2u)
VS N001 0 3
V1 +V 0 5
XU1 N003 N002 N001 0 +V ADG722 ;pnba IN)D)S)GND)Vdd
R1 N002 0 300
.tran 10u
.lib ADG722.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -368 -16 -400 -16
WIRE -240 -16 -288 -16
WIRE 0 -16 -48 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE -480 32 -480 16
WIRE 112 32 112 -16
WIRE -240 48 -368 48
WIRE -368 112 -368 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -480 128 -480 112
WIRE -144 176 -144 160
WIRE -368 272 -368 192
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL ADG722 -144 32 R0
SYMATTR InstName U1
SYMBOL voltage -368 96 R0
WINDOW 3 17 129 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 10n 10n 980n 2u)
SYMATTR InstName V4
SYMBOL voltage -272 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL voltage -480 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -480 128 0
FLAG -480 16 +V
FLAG -400 -16 0
FLAG -144 -112 +V
FLAG -144 176 0
FLAG -368 272 0
FLAG 0 112 0
FLAG 112 112 0
TEXT -536 200 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\13e01a49fd43_kino-pan.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N004 N003 {Rin}
R1 N001 N003 {Rin}
R7 N002 0 10k
R8 N005 0 10k
V1 N003 0 SINE(0 1 1000)
R5 N001 0 5k
R3 N002 N001 {Ra}
R6 0 N004 {Rp*(1-a) + 0.1}
R4 N005 N004 {Ra}
.param Rin=4.7k Rp=10k Ra=0.1
.tran .01
.step param a 0.5 1 .01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 96 208 96
WIRE 384 96 320 96
WIRE 624 96 464 96
WIRE 416 176 320 176
WIRE 128 192 128 96
WIRE 128 192 -64 192
WIRE 416 192 416 176
WIRE 128 288 128 192
WIRE 320 288 320 256
WIRE 320 288 208 288
WIRE 384 288 320 288
WIRE 624 288 464 288
WIRE -64 320 -64 272
SYMBOL res 304 160 R0
SYMATTR InstName R6
SYMATTR Value {Rp*(1-a) + 0.1}
SYMBOL res 480 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value {Ra}
SYMBOL res 608 80 R0
SYMATTR InstName R7
SYMATTR Value 10k
SYMBOL res 224 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {Rin}
SYMBOL res 304 80 R0
SYMATTR InstName R5
SYMATTR Value 5k
SYMBOL voltage -64 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1000)
SYMBOL res 608 272 R0
SYMATTR InstName R8
SYMATTR Value 10k
SYMBOL res 224 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {Rin}
SYMBOL res 480 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value {Ra}
FLAG 416 192 0
FLAG 624 176 0
FLAG 624 368 0
FLAG -64 320 0
TEXT 32 -88 Left 2 !.param Rin=4.7k Rp=10k Ra=0.1
TEXT 32 -56 Left 2 !.tran .01\n.step param a 0.5 1 .01
* Z:\home\khalils\Downloads\files\data\raw_asc\4c5dff18abde_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 0 1N4148
R3 N001 N003 1k
V2 N002 0 SINE(0 2 450k)
V1 N003 0 SINE(0 3 451k)
R1 N001 final 10k
R2 final 0 4.7k
R4 N001 N002 1k
C1 final 0 4700p
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 0.01 0 0.00001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 16 -368 16
WIRE 80 32 80 16
WIRE 80 32 -256 32
WIRE -368 48 -368 16
WIRE -256 48 -256 32
WIRE 80 96 80 32
WIRE 80 96 0 96
WIRE 240 96 80 96
WIRE -256 160 -256 128
WIRE 240 208 240 176
WIRE 432 208 240 208
WIRE 448 208 432 208
WIRE -368 240 -368 128
WIRE 240 240 240 208
WIRE 448 240 448 208
WIRE 0 320 0 160
WIRE 240 320 0 320
WIRE 448 320 448 304
WIRE 448 320 240 320
WIRE 240 368 240 320
SYMBOL res 224 224 R0
SYMATTR InstName R2
SYMATTR Value 4.7k
SYMBOL res 224 80 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res -384 32 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res -272 32 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL Misc\\signal -256 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 2 450k)
SYMBOL diode -16 96 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL cap 432 240 R0
SYMATTR InstName C1
SYMATTR Value 4700p
SYMBOL Misc\\signal -368 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 3 451k)
FLAG 240 368 0
FLAG 432 208 final
FLAG -368 320 0
FLAG -256 240 0
TEXT -400 392 Left 2 !.tran 0 0.01 0 0.00001
* Z:\home\khalils\Downloads\files\data\raw_asc\45f4ef473f35_transistor_Vce_Vbe_and_Vce_Ic_curves.asc
* Generated by LTspice 26.0.1 for Windows.
* Show \n1. Vce vs Vbe\n2. Vce vs Ic\nfor a set of fixed Ib\nLook at the gain with Ic(Q1)/Ib(Q1)
V1 Vce 0 20
B1 0 Vbe I={Ib}
Q1 Vce Vbe 0 0 2N3904
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 20 0.01
.step param Ib 10u 150u 10u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 -32 192 -32
WIRE 384 128 384 -32
WIRE 192 144 192 -32
WIRE 0 192 -48 192
WIRE 80 192 80 96
WIRE 128 192 80 192
WIRE -48 304 -48 192
WIRE 192 304 192 240
WIRE 384 304 384 208
IOPIN 80 96 BiDir
IOPIN 384 -32 BiDir
SYMBOL npn 128 144 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage 384 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 20
SYMBOL bi 0 192 R270
WINDOW 0 32 40 VTop 2
WINDOW 3 -32 40 VBottom 2
SYMATTR InstName B1
SYMATTR Value I={Ib}
FLAG -48 304 0
FLAG 192 304 0
FLAG 384 304 0
FLAG 80 96 Vbe
FLAG 384 -32 Vce
TEXT -72 328 Left 2 !.dc V1 0 20 0.01
TEXT -456 -96 Left 2 ;Show \n1. Vce vs Vbe\n2. Vce vs Ic\nfor a set of fixed Ib\nLook at the gain with Ic(Q1)/Ib(Q1)
TEXT 144 -80 Left 2 !.step param Ib 10u 150u 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1170.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1170.asy)
Rload OUT 0 10
R1 N003 N004 1K
R3 OUT N002 10.7K
R2 N002 0 1.24K
C1 N004 0 1
V1 IN 0 5
XU1 N003 N002 0 N001 IN LT1170 ;pnba Vc)FB)GND)SW)Vin
D1 N001 OUT MBRS360
L1 IN N001 150 Rser=0.02 Rpar=5000
C2 OUT 0 500 Rser=0.05
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 15m startup
.lib LT1170.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 896 1616 896
WIRE 1888 896 1824 896
WIRE 2000 896 1968 896
WIRE 2048 896 2000 896
WIRE 2176 896 2112 896
WIRE 2304 896 2176 896
WIRE 2416 896 2304 896
WIRE 1616 912 1616 896
WIRE 2304 912 2304 896
WIRE 2416 912 2416 896
WIRE 1824 944 1824 896
WIRE 2176 960 2176 896
WIRE 1616 1008 1616 992
WIRE 2304 1008 2304 976
WIRE 2416 1008 2416 992
WIRE 2000 1024 2000 896
WIRE 2000 1024 1952 1024
WIRE 2176 1088 2176 1040
WIRE 2176 1088 1952 1088
WIRE 2176 1104 2176 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2176 1200 2176 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
SYMBOL VOLTAGE 1616 896 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 2160 944 R0
SYMATTR InstName R3
SYMATTR Value 10.7K
SYMBOL schottky 2048 912 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL IND 1872 912 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL POWERPRODUCTS\\LT1170 1824 1088 R0
SYMATTR InstName U1
SYMBOL RES 2400 896 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL polcap 2288 912 R0
SYMATTR InstName C2
SYMATTR Value 500
SYMATTR SpiceLine Rser=0.05
SYMBOL RES 2160 1088 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
FLAG 1616 1008 0
FLAG 1824 1248 0
FLAG 2064 1248 0
FLAG 2416 1008 0
FLAG 2304 1008 0
FLAG 2176 1200 0
FLAG 2416 896 OUT
FLAG 1616 896 IN
TEXT 2168 1248 Left 2 !.tran 15m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8657.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 9
Vin IN 0 SINE(0 1 1K)
R1 N001 0 10K
R2 OUT N001 10K
V2 -V 0 -9
Rload OUT 0 10K
XU1 IN N001 +V -V OUT AD8657 ;pnba In+)In-)V+)V-)OUT
.tran 10m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8657.asy)
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 1K)
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -9
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL AD8657 576 -1168 R0
SYMATTR InstName U1
TEXT 704 -952 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1174HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1174HV.asy)
R2 N004 0 31.5K
XU1 N004 N003 N002 0 N001 IN IN IN LTC1174 top=1K bot=1T ;pnba FB)LBout)LBin)GND)SW)Vin)Ipgm)_SHDN
D1 0 N001 MBRS140
C2 OUT 0 100 Rser=0.02
V1 IN 0 9
Rload OUT 0 20
R1 OUT N004 93.5K
L1 N001 OUT 100 Rser=0.02 Rpar=5000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
.lib LTC1174.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1584 1140
WIRE 464 480 352 480
WIRE 624 480 464 480
WIRE 352 496 352 480
WIRE 624 512 624 480
WIRE 464 560 464 480
WIRE 496 560 464 560
WIRE 816 560 752 560
WIRE 864 560 816 560
WIRE 976 560 944 560
WIRE 1088 560 976 560
WIRE 1184 560 1088 560
WIRE 816 576 816 560
WIRE 976 576 976 560
WIRE 1088 576 1088 560
WIRE 1184 576 1184 560
WIRE 352 592 352 576
WIRE 496 624 480 624
WIRE 768 624 752 624
WIRE 816 656 816 640
WIRE 1088 672 1088 640
WIRE 1184 672 1184 656
WIRE 464 688 464 560
WIRE 496 688 464 688
WIRE 976 688 976 656
WIRE 976 688 752 688
WIRE 976 704 976 688
WIRE 624 752 624 736
WIRE 976 800 976 784
SYMBOL POLCAP 1072 576 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL SCHOTTKY 800 640 M180
WINDOW 0 33 63 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL PowerProducts\\LTC1174HV 624 624 R0
SYMATTR InstName U1
SYMBOL RES 960 688 R0
SYMATTR InstName R2
SYMATTR Value 31.5K
SYMBOL VOLTAGE 352 480 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL RES 960 560 R0
SYMATTR InstName R1
SYMATTR Value 93.5K
SYMBOL RES 1168 560 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL IND 848 576 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02 Rpar=5000
FLAG 1184 560 OUT
FLAG 1088 672 0
FLAG 1184 672 0
FLAG 816 656 0
FLAG 624 752 0
FLAG 976 800 0
FLAG 352 592 0
FLAG 352 480 IN
TEXT 704 776 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2d89228e73b4_NOR2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 + Q 1Meg
M2 Q B 0 0 2N7002
M1 Q A 0 0 2N7002
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 144 272 128
WIRE 272 240 272 224
WIRE 400 240 272 240
WIRE 496 240 400 240
WIRE 224 320 176 320
WIRE 352 368 352 320
WIRE 352 368 176 368
IOPIN 176 320 In
IOPIN 496 240 Out
IOPIN 272 128 In
IOPIN 176 368 In
SYMBOL nmos 352 240 R0
SYMATTR InstName M2
SYMATTR Value 2N7002
SYMBOL nmos 224 240 R0
SYMATTR InstName M1
SYMATTR Value 2N7002
SYMBOL res 256 128 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
FLAG 272 336 0
FLAG 176 320 A
FLAG 496 240 Q
FLAG 272 128 +
FLAG 400 336 0
FLAG 176 368 B
* Z:\home\khalils\Downloads\files\data\raw_asc\2e3cdcc1def6_RL-passbasso.asc
* Generated by LTspice 26.0.1 for Windows.
R1 0 N002 10k
L1 N001 N002 1
V1 N001 0 AC 1
.ac oct 100 1 1000k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 224 64 224
WIRE 352 224 272 224
WIRE 64 256 64 224
WIRE 352 256 352 224
WIRE 64 384 64 336
WIRE 176 384 64 384
WIRE 352 384 352 336
WIRE 352 384 176 384
WIRE 176 416 176 384
SYMBOL res 368 352 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL ind 176 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL voltage 64 240 R0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
FLAG 176 416 0
TEXT 72 480 Left 2 !.ac oct 100 1 1000k
* Z:\tmp\asc_dec_bjh7r6w2\148aa1fc0f56_CMOS_AND_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N004 N001 PULSE(0 8 1 1n 1n 2 4 10)
M1 N003 N004 N002 N002 AO6407
M2 N003 N006 N002 N002 AO6407
M3 N003 N004 N005 N005 BSP89
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -32 -48 -32
WIRE 208 48 80 48
WIRE 256 48 208 48
WIRE 624 112 496 112
WIRE 208 144 80 144
WIRE 256 144 208 144
WIRE 208 192 208 144
WIRE 496 192 496 112
WIRE 496 192 208 192
WIRE -48 208 -48 -32
WIRE 128 208 128 64
WIRE 128 208 32 208
WIRE 208 208 208 192
WIRE 128 288 128 208
WIRE 160 288 128 288
WIRE 208 336 208 304
WIRE -48 416 -48 208
WIRE 304 416 304 64
WIRE 496 448 496 192
SYMBOL voltage 48 208 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 8 1 1n 1n 2 4 10)
SYMBOL pmos 128 144 R180
SYMATTR InstName M1
SYMATTR Value AO6407
SYMBOL pmos 304 144 R180
SYMATTR InstName M2
SYMATTR Value AO6407
SYMBOL nmos 160 208 R0
SYMATTR InstName M3
SYMATTR Value BSP89
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG602.asc
* Generated by LTspice 26.0.1 for Windows.
Vs N001 0 SINE(0 5 1k)
V3 N003 0 PULSE(0 3 0 10n 10n 5m 10m)
R1 N002 0 301
C1 N002 0 36p
V1 +V 0 5
V2 -V 0 -5
XU1 +V -V N003 N001 N002 0 ADG602 ;pnba Vdd)Vss)IN)S)D)GND
.tran 20m
* Note:\nSwitch shown for a logic 0 input.\nPin capacitance and charge injection not included.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG602.asy)
.lib ADG602.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 304 80 304 48
WIRE -128 160 -160 160
WIRE 208 160 -48 160
WIRE 464 160 400 160
WIRE 608 160 464 160
WIRE 464 192 464 160
WIRE 608 192 608 160
WIRE 208 224 80 224
WIRE 464 304 464 272
WIRE 608 304 608 256
WIRE -240 320 -240 272
WIRE -128 320 -128 272
WIRE 80 368 80 224
WIRE 240 384 240 336
WIRE 368 384 368 336
WIRE -240 448 -240 400
WIRE -128 448 -128 400
WIRE 80 496 80 448
FLAG 464 304 0
FLAG 608 304 0
FLAG -240 448 0
FLAG -160 160 0
FLAG 80 496 0
FLAG 368 384 0
FLAG 304 48 +V
FLAG -240 272 +V
FLAG 240 384 -V
FLAG -128 448 0
FLAG -128 272 -V
SYMBOL voltage -32 160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Vs
SYMATTR Value SINE(0 5 1k)
SYMBOL voltage 80 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 3 0 10n 10n 5m 10m)
SYMBOL res 448 176 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL cap 592 192 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -240 304 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -128 304 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL ADG602 304 208 R0
SYMATTR InstName U1
TEXT 536 448 Left 2 !.tran 20m
TEXT -376 -48 Left 2 ;Note:\nSwitch shown for a logic 0 input.\nPin capacitance and charge injection not included.