Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\48976ae2063f_Thevenin_Original.asc
* Generated by LTspice 26.0.1 for Windows.
;op
R4 N002 p 1k
B1 0 b I=2*(V(a)-V(b))
R7 N004 p 1k
R1 a N003 500
R2 b a 1k
Vs N004 0 0
R5 0 N002 10k
V1 N003 0 10
R3 N002 b 5.6k
B2 N001 a V=3*I(R1)
I1 0 a 5m
R6 N001 N002 3.3k
.dc Vs 0 10 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 -16 160 -16
WIRE 320 -16 272 -16
WIRE 496 -16 400 -16
WIRE 32 96 0 96
WIRE 160 96 160 -16
WIRE 160 96 112 96
WIRE 192 96 160 96
WIRE 320 96 272 96
WIRE 368 96 320 96
WIRE 496 96 496 -16
WIRE 496 96 448 96
WIRE 576 96 496 96
WIRE 672 96 656 96
WIRE 704 96 672 96
WIRE 800 96 784 96
WIRE 0 160 0 96
WIRE 160 160 160 96
WIRE 320 160 320 96
WIRE 496 160 496 96
WIRE 800 160 800 96
WIRE 0 304 0 240
WIRE 160 304 160 240
WIRE 160 304 0 304
WIRE 256 304 160 304
WIRE 320 304 320 240
WIRE 320 304 256 304
WIRE 496 304 496 240
WIRE 496 304 320 304
WIRE 800 304 800 240
WIRE 800 304 496 304
WIRE 256 352 256 304
SYMBOL res 512 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL res 800 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 1k
SYMBOL voltage 800 144 R0
SYMATTR InstName Vs
SYMATTR Value 0
SYMBOL bi 320 240 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName B1
SYMATTR Value I=2*(V(a)-V(b))
SYMBOL res 560 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL bv 288 -16 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName B2
SYMATTR Value V=3*I(R1)
SYMBOL res 464 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5.6k
SYMBOL voltage 0 144 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL current 160 240 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName I1
SYMATTR Value 5m
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 500
SYMBOL res 288 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 304 0 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R6
SYMATTR Value 3.3k
FLAG 160 96 a
FLAG 320 96 b
FLAG 256 352 0
FLAG 672 96 p
TEXT 758 8 Left 2 !;op
TEXT 656 352 Left 2 !.dc Vs 0 10 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\2e4729d91f3a_6993-3.asc
* Generated by LTspice 26.0.1 for Windows.
* LTC6993-3 Non-Retriggerable 20ms One Shot\nFalling Edge Triggered, Positive Output Pulse\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6993-3.asy)
R3 N004 0 392K
R1 N003 0 243K
R4 OUT 0 100K
XU1 N001 0 N003 N004 N002 OUT LTC6993-3 ;pnba TRIG)GND)SET)DIV)V+)OUT
V1 N002 0 5
V2 N001 0 PULSE(0 3.3 0.25m 1n 1n 2m 15m 3)
R2 N002 N004 1000K
.tran 60m startup
.lib LTC6993-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -224 96 -240 96
WIRE 96 96 -144 96
WIRE 656 96 320 96
WIRE 656 112 656 96
WIRE 96 176 64 176
WIRE 400 176 320 176
WIRE 560 176 400 176
WIRE 400 192 400 176
WIRE 560 192 560 176
WIRE 656 208 656 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 352 256 320 256
WIRE 352 288 352 256
WIRE 400 288 400 272
WIRE 400 288 352 288
WIRE 560 288 560 272
WIRE 400 304 400 288
WIRE 400 400 400 384
SYMBOL res 640 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL res 384 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL voltage 560 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL SpecialFunctions\\LTC6993-3 208 176 R0
SYMATTR InstName U1
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 243K
SYMBOL voltage -128 96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0.25m 1n 1n 2m 15m 3)
SYMATTR InstName V2
SYMBOL res 384 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
FLAG -240 96 0
FLAG 560 288 0
FLAG 656 96 OUT
FLAG 656 208 0
FLAG 400 400 0
FLAG -16 256 0
FLAG 64 176 0
TEXT 520 392 Left 2 !.tran 60m startup
TEXT 216 48 Bottom 2 ;LTC6993-3 Non-Retriggerable 20ms One Shot\nFalling Edge Triggered, Positive Output Pulse\nStartup Modeled
* Z:\tmp\asc_dec_bjh7r6w2\05179ed82fa5_uebung_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 12V
V2 N002 N011 12V
R3 N003 N001 5.6k
R2 0 N007 2.2k
R8 N004 N002 5.6k
R1 0 N008 1.8k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1868 720
WIRE 384 -48 160 -48
WIRE 576 -48 384 -48
WIRE 736 -48 576 -48
WIRE 1632 -48 1440 -48
WIRE 1792 -48 1632 -48
WIRE 384 -16 384 -48
WIRE 1440 -16 1440 -48
WIRE 576 128 576 -48
WIRE 1632 128 1632 -48
WIRE 384 176 384 64
WIRE 512 176 384 176
WIRE 1440 176 1440 64
WIRE 1568 176 1440 176
WIRE 384 208 384 176
WIRE 1440 208 1440 176
WIRE 320 256 160 256
WIRE 1376 256 1328 256
WIRE 736 272 736 -48
WIRE 1792 272 1792 -48
WIRE 384 368 384 304
WIRE 576 368 576 224
WIRE 1632 368 1632 224
WIRE 384 496 384 448
WIRE 576 496 576 448
WIRE 736 496 736 352
WIRE 1632 496 1632 448
WIRE 1792 496 1792 352
SYMBOL voltage 736 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12V
SYMBOL voltage 1792 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12V
SYMBOL res 400 80 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 5.6k
SYMBOL res 400 464 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 2.2k
SYMBOL res 1456 80 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R8
SYMATTR Value 5.6k
SYMBOL res 592 464 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 1.8k
FLAG 736 496 0
FLAG 384 496 0
FLAG 576 496 0
* Z:\home\khalils\Downloads\files\data\raw_asc\7480f33eee33_BT-CE-OUT-3.asc
* Generated by LTspice 26.0.1 for Windows.
Vce N001 0 0
Ib 0 N002 0
Q1 N001 N002 0 0 2N2907
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Vce 0 -10V Ib list -0.1mA -0.2mA -0.5mA -1mA
.meas dc Ic find Ic(Q1) when Vce=-5V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 16 208 16
WIRE 208 80 208 16
WIRE 416 96 416 16
WIRE 144 128 32 128
WIRE 32 144 32 128
WIRE 32 256 32 224
WIRE 208 256 208 176
WIRE 416 256 416 176
FLAG 208 256 0
FLAG 32 256 0
FLAG 416 256 0
SYMBOL voltage 416 80 R0
WINDOW 3 35 66 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 46 53 Left 2
SYMATTR Value 0
SYMATTR InstName Vce
SYMBOL current 32 224 R180
WINDOW 0 -63 0 Left 2
WINDOW 3 -66 28 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Ib
SYMATTR Value 0
SYMBOL pnp 144 80 R0
SYMATTR InstName Q1
SYMATTR Value 2N2907
TEXT 16 336 Left 2 !.dc Vce 0 -10V  Ib list -0.1mA -0.2mA -0.5mA -1mA
TEXT 16 368 Left 2 !.meas dc Ic  find Ic(Q1) when Vce=-5V
* Z:\home\khalils\Downloads\files\data\raw_asc\332d2349c5d0_SX1276434M.asc
* Generated by LTspice 26.0.1 for Windows.
* SX1276 434MHz Low Pass Filter
L1 N001 N002 12n
C1 N001 0 15p
C3 N003 0 4p7
R2 N005 N004 50
R1 N003 0 50
L2 N002 N003 18n
C2 N002 0 12p
C4 N002 N001 2p7
L3 N005 N001 22n
V1 N004 0 SINE() AC 1
C5 N003 N002 0p
.ac dec 100 100Meg 1000Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 112 0 112
WIRE 128 112 112 112
WIRE 176 112 128 112
WIRE 256 112 240 112
WIRE -320 208 -368 208
WIRE -128 208 -240 208
WIRE 0 208 0 112
WIRE 0 208 -48 208
WIRE 32 208 0 208
WIRE 128 208 128 112
WIRE 128 208 112 208
WIRE 160 208 128 208
WIRE 256 208 256 112
WIRE 256 208 240 208
WIRE 432 208 256 208
WIRE -368 240 -368 208
WIRE 432 256 432 208
WIRE 0 272 0 208
WIRE 128 272 128 208
WIRE 256 272 256 208
WIRE -368 368 -368 320
WIRE 0 368 0 336
WIRE 128 368 128 336
WIRE 256 368 256 336
WIRE 432 368 432 336
SYMBOL cap -16 272 R0
SYMATTR InstName C1
SYMATTR Value 15p
SYMBOL voltage -368 224 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value SINE()
SYMBOL cap 112 272 R0
SYMATTR InstName C2
SYMATTR Value 12p
SYMBOL cap 240 272 R0
SYMATTR InstName C3
SYMATTR Value 4p7
SYMBOL res -224 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL cap 240 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 0p
SYMBOL res 416 240 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL ind 144 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 18n
SYMBOL ind -144 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L3
SYMATTR Value 22n
SYMBOL ind 16 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 12n
SYMBOL cap 112 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 2p7
FLAG 0 368 0
FLAG 128 368 0
FLAG 256 368 0
FLAG 432 368 0
FLAG -368 368 0
TEXT 272 416 Left 2 !.ac dec 100 100Meg 1000Meg
TEXT -432 56 Left 2 ;SX1276 434MHz Low Pass Filter
* Z:\home\khalils\Downloads\files\data\raw_asc\5f59fa59019a_3_jikken_ic_ib.asc
* Generated by LTspice 26.0.1 for Windows.
I1 0 B 0
V1 C 0 10V
Q1 C B 0 0 2SC1815-Y
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc oct I1 1p 400u 100
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 592 -112 272 -112
WIRE 272 128 272 -112
WIRE 272 144 272 128
WIRE 192 192 -96 192
WIRE 208 192 192 192
WIRE 592 192 592 -112
WIRE 272 256 272 240
WIRE -96 272 -96 192
WIRE -96 496 -96 352
WIRE 272 496 272 256
WIRE 592 496 592 272
SYMBOL current -96 352 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 0
SYMBOL npn 208 144 R0
WINDOW 0 65 35 Left 2
SYMATTR InstName Q1
SYMATTR Value 2SC1815-Y
SYMBOL voltage 592 176 R0
SYMATTR InstName V1
SYMATTR Value 10V
FLAG -96 496 0
FLAG 272 496 0
FLAG 592 496 0
FLAG 272 256 E
FLAG 272 128 C
FLAG 192 192 B
TEXT -80 -24 Left 2 !.dc oct I1 1p 400u 100
* Z:\home\khalils\Downloads\files\data\raw_asc\01727687af30_1_WPZ.asc
* Generated by LTspice 26.0.1 for Windows.
* .op
R1 N001 N003 47.4k
VDD N001 0 1.8
M1 N003 N004 0 0 nch l=2u w=5u
M2 N004 N004 0 0 nch l=2u w=10u
M3 N002 N003 N004 0 nch l=2u w=10u
VOUT N002 0 1.8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc cmos018.txt
.dc VOUT 0 1.8 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1180 952
WIRE 176 480 -112 480
WIRE 768 480 416 480
WIRE 176 512 176 480
WIRE 416 576 416 480
WIRE 432 624 416 624
WIRE 768 640 768 480
WIRE 176 656 176 592
WIRE 368 656 176 656
WIRE 416 688 416 672
WIRE 416 688 336 688
WIRE -112 704 -112 480
WIRE 176 704 176 656
WIRE 416 704 416 688
WIRE 176 752 160 752
WIRE 432 752 432 624
WIRE 432 752 416 752
WIRE 336 784 336 688
WIRE 336 784 224 784
WIRE 368 784 336 784
WIRE 160 800 160 752
WIRE 176 800 160 800
WIRE 432 800 432 752
WIRE 432 800 416 800
WIRE -112 832 -112 784
WIRE 176 832 176 800
WIRE 416 832 416 800
WIRE 768 832 768 720
DATAFLAG 512 560 "Is(M3)"
DATAFLAG 64 560 "I(R1)"
SYMBOL nmos4 368 576 R0
WINDOW 123 82 67 Left 2
WINDOW 0 81 19 Left 2
WINDOW 3 82 45 Left 2
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M3
SYMATTR Value nch
SYMBOL voltage 768 624 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VOUT
SYMATTR Value 1.8
SYMBOL voltage -112 688 R0
SYMATTR InstName VDD
SYMATTR Value 1.8
SYMBOL nmos4 224 704 M0
WINDOW 123 82 67 Left 2
WINDOW 0 81 19 Left 2
WINDOW 3 82 45 Left 2
SYMATTR Value2 l=2u w=5u
SYMATTR InstName M1
SYMATTR Value nch
SYMBOL nmos4 368 704 R0
WINDOW 123 82 67 Left 2
WINDOW 0 81 19 Left 2
WINDOW 3 82 45 Left 2
SYMATTR Value2 l=2u w=10u
SYMATTR InstName M2
SYMATTR Value nch
SYMBOL res 160 496 R0
SYMATTR InstName R1
SYMATTR Value 47.4k
FLAG 416 832 0
FLAG -112 832 0
FLAG 176 832 0
FLAG 768 832 0
TEXT 192 400 Left 2 !.inc cmos018.txt
TEXT 192 376 Left 2 !.dc VOUT 0 1.8 1m
TEXT 192 352 Left 2 ;.op
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8642-1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 RT 0 17.8K
V1 IN 0 12
L1 N005 OUT 0.56
C4 OUT 0 220 X2
R2 OUT N006 100K
R3 N006 0 100K
C5 OUT N006 47p
Rload OUT 0 12 m=100
C1 SS 0 1n
C6 N002 N001 150p
R4 N001 0 11K
C2 N004 N005 47n
C3 N003 0 1
XU2 NC_01 N003 N004 IN NC_02 0 N002 N005 0 0 NC_03 0 IN IN RT SS N006 LT8642-1 ;pnba Bias)INTVcc)BST)Vin1)CLKOUT)GND1)Vc)SW)Sync/Mode)GND2)PG)GND)Vin2)EN/UV)Rt)TR/SS)FB
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8642-1.asy)
.lib LT8642-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1848 740
WIRE 96 -80 0 -80
WIRE 256 -80 96 -80
WIRE 416 -80 256 -80
WIRE 0 -64 0 -80
WIRE 256 -64 256 -80
WIRE 96 0 96 -80
WIRE 112 0 96 0
WIRE 416 0 416 -80
WIRE 416 0 400 0
WIRE 0 32 0 16
WIRE 112 80 96 80
WIRE 416 80 400 80
WIRE -96 160 -112 160
WIRE 0 160 -16 160
WIRE 112 160 64 160
WIRE 32 240 16 240
WIRE 112 240 96 240
WIRE 112 320 96 320
WIRE 432 320 400 320
WIRE -16 400 -32 400
WIRE 80 400 64 400
WIRE 112 400 80 400
WIRE 432 400 432 384
WIRE 432 400 400 400
WIRE 480 400 432 400
WIRE 576 400 560 400
WIRE 688 400 576 400
WIRE 784 400 688 400
WIRE 880 400 784 400
WIRE 688 416 688 400
WIRE 784 416 784 400
WIRE 880 416 880 400
WIRE 0 480 -32 480
WIRE 80 480 64 480
WIRE 112 480 80 480
WIRE 576 480 400 480
WIRE 688 480 688 464
WIRE 688 480 576 480
WIRE 576 496 576 480
WIRE 784 512 784 480
WIRE 880 512 880 496
WIRE 304 560 304 544
WIRE 576 592 576 576
FLAG 304 560 0
FLAG -32 400 0
FLAG 0 32 0
FLAG 784 512 0
FLAG 576 592 0
FLAG 880 512 0
FLAG 880 400 OUT
FLAG 0 -80 IN
FLAG 96 80 0
FLAG 416 80 0
FLAG -32 480 0
FLAG -112 160 0
FLAG 16 240 0
FLAG 80 480 SS
FLAG 80 400 RT
FLAG 96 320 0
SYMBOL res 80 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 17.8K
SYMBOL voltage 0 -80 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ind 464 416 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 0.56
SYMBOL cap 768 416 R0
WINDOW 0 40 17 Left 2
WINDOW 123 24 80 Left 2
SYMATTR InstName C4
SYMATTR Value2 X2
SYMATTR Value 220
SYMBOL res 560 384 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL res 560 480 R0
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 672 400 R0
WINDOW 0 32 17 Left 2
SYMATTR InstName C5
SYMATTR Value 47p
SYMBOL res 864 400 R0
WINDOW 123 36 100 Left 2
SYMATTR InstName Rload
SYMATTR Value 12
SYMATTR Value2 m=100
SYMBOL cap 64 496 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL cap 64 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C6
SYMATTR Value 150p
SYMBOL res 0 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 11K
SYMBOL cap 416 320 R0
WINDOW 0 32 17 Left 2
WINDOW 3 32 47 Left 2
SYMATTR InstName C2
SYMATTR Value 47n
SYMBOL cap 96 256 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL LT8642-1 256 240 R0
SYMATTR InstName U2
TEXT 176 616 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3ec561a4b677_3S_cell_balancing_circuit.asc
* Generated by LTspice 26.0.1 for Windows.
* Control 1
* Control 2
* Control 3
* 3s Balancing circuit
* 4.3 volt
* 8.6 volt
* 12.9 volt
* (3.3 volt)
* (-1 volt)
* (-5.3 volt)
* current is very low using pull up transistor
* (The Discharge current is very low using IRFZ44N mosfet in mosfet 3)
* NMOS transistor - IRFZ44N
* Discharge Resistor - 10 ohm
* Transistor at control 3 - 13005A
* [We gonna use NPN transistor instead of NMOS]
* the one with head sink
* - 4 power input
* - 3 control input
R1 N007 N008 10
M3 N008 N009 0 0 NMOS
V1 N001 N004 4.2
M1 N002 N003 N004 N004 NMOS
V3 N007 0 4.2
R3 N001 N002 10
V2 N004 N007 4.2
M2 N005 N006 N007 N007 NMOS
R2 N004 N005 10
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1508 1332
WIRE 672 -208 176 -208
WIRE 672 -96 672 -208
WIRE 176 32 176 -208
WIRE 672 96 672 -16
WIRE 480 176 480 144
WIRE 624 176 480 176
WIRE 176 304 176 112
WIRE 672 304 672 192
WIRE 672 304 176 304
WIRE 672 416 672 304
WIRE 176 480 176 304
WIRE 672 560 672 496
WIRE 480 640 480 608
WIRE 624 640 480 640
WIRE 176 720 176 560
WIRE 672 720 672 656
WIRE 672 720 176 720
WIRE 672 832 672 720
WIRE 176 880 176 720
WIRE 672 1008 672 912
WIRE 480 1088 480 1056
WIRE 624 1088 480 1088
WIRE 176 1232 176 960
WIRE 432 1232 176 1232
WIRE 672 1232 672 1104
WIRE 672 1232 432 1232
WIRE 432 1312 432 1232
SYMBOL voltage 176 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.2
SYMBOL nmos 624 1008 R0
SYMATTR InstName M3
SYMBOL nmos 624 560 R0
SYMATTR InstName M2
SYMBOL nmos 624 96 R0
SYMATTR InstName M1
SYMBOL res 656 816 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL res 656 400 R0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL voltage 176 864 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 4.2
SYMBOL voltage 176 464 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 4.2
SYMBOL res 656 -112 R0
SYMATTR InstName R3
SYMATTR Value 10
FLAG 432 1312 0
TEXT 440 1032 Left 2 ;Control 1
TEXT 432 584 Left 2 ;Control 2
TEXT 432 120 Left 2 ;Control 3
TEXT -640 448 Left 5 ;3s Balancing circuit
TEXT 696 720 Left 2 ;4.3 volt
TEXT 704 320 Left 2 ;8.6 volt
TEXT 696 -184 Left 2 ;12.9 volt
TEXT 416 1008 Left 2 ;(3.3 volt)
TEXT 408 544 Left 2 ;(-1 volt)
TEXT 392 88 Left 2 ;(-5.3 volt)
TEXT 192 -48 Left 2 ;current is very low using pull up transistor
TEXT 696 96 Left 2 ;(The Discharge current is very low using IRFZ44N mosfet in mosfet 3)
TEXT -576 648 Left 3 ;NMOS transistor - IRFZ44N
TEXT -576 704 Left 3 ;Discharge Resistor - 10 ohm
TEXT -576 600 Left 3 ;Transistor at control 3 - 13005A
TEXT 744 144 Left 2 ;[We gonna use NPN transistor instead of NMOS]
TEXT -240 568 Left 2 ;the one with head sink
TEXT -576 824 Left 2 ;- 4 power input
TEXT -576 856 Left 2 ;- 3 control input
* Z:\home\khalils\Downloads\files\data\raw_asc\AD3542R.asc
* Generated by LTspice 26.0.1 for Windows.
* .noise V(Vout) V5 dec 10 0.1 1g
* VDAC input should be within the range 0 to 2.5V\nRANGE_SEL should be an integer within 0 to 4
* Range RFB RANGE_SEL \n0 to 2.5V 1x 0 \n0 to 5V 1x 1\n0 to 10V 2x 2\n-5 to 5V 2x 3\n-2.5 to 7.5V 2x 4
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD3542R.asy)
V1 N002 0 5
C1 Vout N003 10p
V2 N001 0 5
V6 NC_02 0 PWL(0 0 2u 0 +1n 2.5)
V4 vDAC 0 SINE(1.25 1.25 1MEG)
XU2 Vout NC_03 Vout Vout vDAC N001 0 N002 N004 N003 AD3542R RANGE_SEL=0 ;pnba RFBx4)RFBx2)RFBx1)Vout)VDAC)AVDD)AGND)PVDD)PVSS)CAP
V5 NC_01 0 2.5
R1 Vout 0 1k noiseless
V3 N004 0 -5
.tran 0 5u 0 1n
.lib AD3542R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 728
WIRE 224 -96 -240 -96
WIRE 128 -48 -64 -48
WIRE -240 -32 -240 -96
WIRE -64 -32 -64 -48
WIRE 128 0 128 -48
WIRE 224 0 224 -96
WIRE 640 48 352 48
WIRE -240 64 -240 48
WIRE -64 64 -64 48
WIRE 640 144 640 48
WIRE 640 144 416 144
WIRE -16 176 -704 176
WIRE 64 176 -16 176
WIRE 592 176 432 176
WIRE 640 176 640 144
WIRE 640 176 592 176
WIRE -704 224 -704 176
WIRE 480 256 384 256
WIRE 640 256 640 176
WIRE 640 256 544 256
WIRE -704 336 -704 304
WIRE -384 336 -384 304
WIRE -240 336 -240 304
WIRE 640 336 640 256
WIRE 128 400 128 352
WIRE 640 464 640 416
WIRE 224 480 224 352
WIRE 224 480 128 480
WIRE 128 512 128 480
SYMBOL AD3542R 224 176 R0
SYMATTR InstName U2
SYMATTR Value AD3542R
SYMBOL voltage -64 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -384 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 2.5
SYMBOL voltage -240 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL cap 544 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage -704 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value SINE(1.25 1.25 1MEG)
SYMBOL res 624 320 R0
SYMATTR InstName R1
SYMATTR Value 1k noiseless
SYMBOL voltage 128 384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL voltage -240 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value PWL(0 0 2u 0 +1n 2.5)
FLAG -64 64 0
FLAG -240 64 0
FLAG 128 512 0
FLAG 640 464 0
FLAG -704 336 0
FLAG -384 336 0
FLAG 592 176 Vout
FLAG -240 336 0
FLAG -16 176 vDAC
TEXT -272 536 Left 2 !.tran 0 5u 0 1n
TEXT -272 592 Left 2 ;.noise V(Vout) V5 dec 10 0.1 1g
TEXT -840 432 Left 2 ;VDAC input should be within the range 0 to 2.5V\nRANGE_SEL should be an integer within 0 to 4
TEXT -840 -104 Left 2 ;Range              RFB            RANGE_SEL \n0 to 2.5V            1x                       0           \n0 to 5V               1x                       1\n0 to 10V             2x                       2\n-5 to 5V              2x                       3\n-2.5 to 7.5V        2x                       4
* Z:\home\khalils\Downloads\files\data\raw_asc\6a2fba6b1e07_Draft56.asc
* Generated by LTspice 26.0.1 for Windows.
* bootstrapping the emitters, still leaves voltage offset at the base\nand some leakage.
* there's a voltage offset of 0.57V or so.\n \n10G we get -9pA leakaage\n1G get -9pA.\n100Meg -9pA.
* bootstrap
* signal impedance
* DOES NOT MAKE SENSE.\njust pulling a opto-led again a low-imipedance diode clamp\nwill be just as strong,
V2 VCC 0 15
V3 0 VEE 15
R1 N003 N001 100k
Q3 VCC N002 N003 0 2N3904
V1 N001 0 5
R2 N002 N001 100G
Q4 VEE N002 N003 0 2N3906
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1904 680
WIRE 48 -96 -16 -96
WIRE 464 -96 128 -96
WIRE -192 80 -272 80
WIRE 384 80 352 80
WIRE -272 96 -272 80
WIRE -192 96 -192 80
WIRE -16 128 -16 -96
WIRE 48 128 -16 128
WIRE 288 128 128 128
WIRE 384 128 384 80
WIRE 464 128 464 -96
WIRE 464 128 384 128
WIRE 480 128 464 128
WIRE 384 176 384 128
WIRE 384 176 352 176
WIRE -16 368 -16 128
SYMBOL pnp 352 224 R180
SYMATTR InstName Q4
SYMATTR Value 2N3906
SYMBOL voltage -16 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 48 40 Left 2
SYMATTR Value 5
SYMATTR InstName V1
SYMBOL voltage -272 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL voltage -272 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 48 40 Left 2
SYMATTR Value 15
SYMATTR InstName V2
SYMBOL res 144 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100G
SYMBOL npn 352 32 M0
SYMATTR InstName Q3
SYMATTR Value 2N3904
SYMBOL res 144 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
FLAG -192 96 0
FLAG -272 0 VCC
FLAG -272 176 VEE
FLAG 288 32 VCC
FLAG 288 224 VEE
FLAG -16 448 0
TEXT -456 304 Left 2 !.tran 1ms
TEXT -1144 -8 Left 2 ;bootstrapping the emitters, still leaves voltage offset at the base\nand some leakage.
TEXT 592 -40 Left 2 ;there's a voltage offset of 0.57V or so.\n \n10G we get -9pA leakaage\n1G get -9pA.\n100Meg -9pA.
TEXT 40 64 Left 2 ;bootstrap
TEXT 40 -160 Left 2 ;signal impedance
TEXT 624 -168 Left 2 ;DOES NOT MAKE SENSE.\njust pulling a opto-led again a low-imipedance diode clamp\nwill be just as strong,