Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\29969361ef13_sigcond.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N001 vin 50e3
XU1 N003 Vref1 Vcc 0 Vref1 MCP6001 ;pnba In+)In-)V+)V-)OUT
R2 N003 0 51e3
R4 Vref N001 100e3
V1 Vcc 0 5
XU2 N001 N002 Vcc 0 vout MCP6001 ;pnba In+)In-)V+)V-)OUT
R6 N002 0 50e3
V3 vin 0 SINE(0 1 50)
V2 Vref 0 2.5
R1 Vref N003 51e3
R5 N002 vout 100e3
.lib MCP6001.txt
.tran 0 100e-3 0 startup
.options cshunt=5e-14
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 464 16 464 0
WIRE -16 112 -16 96
WIRE 512 128 512 112
WIRE 368 144 352 144
WIRE 464 144 464 96
WIRE 464 144 448 144
WIRE 480 144 464 144
WIRE 624 160 544 160
WIRE 656 160 624 160
WIRE 480 176 464 176
WIRE 112 192 112 176
WIRE -16 208 -16 192
WIRE 80 208 -16 208
WIRE -400 224 -400 208
WIRE -288 224 -288 208
WIRE -160 224 -160 208
WIRE -16 224 -16 208
WIRE 192 224 144 224
WIRE 208 224 192 224
WIRE 512 224 512 192
WIRE 528 224 512 224
WIRE 80 240 64 240
WIRE 368 240 352 240
WIRE 464 240 464 176
WIRE 464 240 448 240
WIRE 112 288 112 256
WIRE 128 288 112 288
WIRE 464 288 464 240
WIRE 512 288 464 288
WIRE 624 288 624 160
WIRE 624 288 592 288
WIRE 64 304 64 240
WIRE 192 304 192 224
WIRE 192 304 64 304
WIRE -400 320 -400 304
WIRE -288 320 -288 304
WIRE -160 320 -160 304
WIRE -16 320 -16 304
SYMBOL res -32 208 R0
SYMATTR InstName R2
SYMATTR Value 51e3
SYMBOL res 448 0 R0
SYMATTR InstName R4
SYMATTR Value 100e3
SYMBOL res 464 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 50e3
SYMBOL voltage -288 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 2.5
SYMBOL OpAmps\\opamp2 112 288 M180
SYMATTR InstName U1
SYMATTR Value MCP6001
SYMBOL res 464 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 50e3
SYMBOL res 496 304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 100e3
SYMBOL OpAmps\\opamp2 512 224 M180
SYMATTR InstName U2
SYMATTR Value MCP6001
SYMBOL voltage -400 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -160 208 R0
WINDOW 3 24 96 Invisible 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 50)
SYMBOL res -32 96 R0
SYMATTR InstName R1
SYMATTR Value 51e3
FLAG -16 320 0
FLAG -400 320 0
FLAG -288 320 0
FLAG -288 208 Vref
FLAG -400 208 Vcc
FLAG -16 96 Vref
FLAG 128 288 Vcc
FLAG 112 176 0
FLAG 208 224 Vref1
FLAG 528 224 Vcc
FLAG 512 112 0
FLAG 464 0 Vref
FLAG -160 320 0
FLAG -160 208 vin
FLAG 352 144 vin
FLAG 352 240 0
FLAG 656 160 vout
TEXT -424 56 Left 2 !.lib MCP6001.txt
TEXT -426 30 Left 2 !.tran 0 100e-3 0 startup
TEXT -424 80 Left 2 !.options cshunt=5e-14
* Z:\home\khalils\Downloads\files\data\raw_asc\0e4ac711db1c_8040.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8040.asy)
XU1 0 N001 N001 N003 N004 N004 N002 N006 N005 LTM8040 ;pnba GND)Vin)_SHDN)Rt)BIAS)LPWR)LEDA)Adj)PWM
D1 N002 0 LXK2-PW14 N=2
R1 N003 0 215K
V1 N001 0 24
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LTM8040.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 16 -128 16
WIRE 224 16 48 16
WIRE -128 32 -128 16
WIRE 224 48 224 16
WIRE 48 96 48 16
WIRE 80 96 48 96
WIRE 480 96 368 96
WIRE 480 112 480 96
WIRE -128 128 -128 112
WIRE -16 160 -32 160
WIRE 80 160 64 160
WIRE 384 160 368 160
WIRE 80 224 64 224
WIRE 384 224 384 160
WIRE 384 224 368 224
WIRE 480 240 480 176
WIRE 80 288 64 288
WIRE 224 352 224 336
SYMBOL PowerProducts\\LTM8040 224 192 R0
SYMATTR InstName U1
SYMBOL res 80 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 215K
SYMBOL LED 464 112 R0
WINDOW 123 24 100 Left 2
SYMATTR Value2 N=2
SYMATTR InstName D1
SYMATTR Value LXK2-PW14
SYMBOL voltage -128 16 R0
WINDOW 3 30 97 Left 2
SYMATTR Value 24
SYMATTR InstName V1
FLAG -128 128 0
FLAG -32 160 0
FLAG 224 352 0
FLAG 480 240 0
TEXT 408 328 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3cd0e81b719b_rectificador_monofasico_de_onda_completa_1N5408.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 0 1000R
V1 N002 N003 SINE(0 155.56 60 0 0) AC 155 0
D2 N003 N001 1N5408
D1 N002 N001 1N5408
D3 0 N002 1N5408
D4 0 N003 1N5408
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 100m 0 0.1m
.model 1N5408 D (IS=1.41E-6 RS=0.0339 N=1.9011 BV=1000 IBV=5E-6 CJO=4.5E-11 M=0.4061 VJ=0.5 FC=0.5 TT=4.761E-6 EG=1.11 XTI=3)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1496 680
WIRE 384 -16 256 -16
WIRE 544 -16 384 -16
WIRE 112 32 -176 32
WIRE 256 64 256 -16
WIRE 384 64 384 -16
WIRE 544 112 544 -16
WIRE -176 144 -176 32
WIRE 112 160 112 32
WIRE 256 160 256 128
WIRE 256 160 112 160
WIRE 384 176 384 128
WIRE 384 176 144 176
WIRE 384 192 384 176
WIRE 256 208 256 160
WIRE -176 224 -176 208
WIRE -176 336 -176 224
WIRE 144 336 144 176
WIRE 144 336 -176 336
WIRE 256 336 256 272
WIRE 384 336 384 256
WIRE 384 336 256 336
WIRE 544 336 544 192
WIRE 544 336 384 336
WIRE 384 400 384 336
SYMBOL diode 272 272 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value 1N5408
SYMBOL res 528 96 R0
SYMATTR InstName R1
SYMATTR Value 1000R
SYMBOL diode 272 128 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5408
SYMBOL diode 400 128 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N5408
SYMBOL diode 400 256 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMATTR Value 1N5408
SYMBOL voltage -176 128 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 155 0
SYMATTR InstName V1
SYMATTR Value SINE(0 155.56 60 0 0)
FLAG 384 400 0
TEXT -176 344 Left 2 !.tran 0 100m 0 0.1m
TEXT -176 368 Left 2 !.model 1N5408 D (IS=1.41E-6 RS=0.0339 N=1.9011 BV=1000 IBV=5E-6 CJO=4.5E-11 M=0.4061 VJ=0.5 FC=0.5 TT=4.761E-6 EG=1.11 XTI=3)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1044A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1044A.asy)
C6 N002 N005 10
V1 IN 0 5
C1 0 N003 100p
C5 OUT 0 10
XU1 N001 N002 0 N005 OUT N004 N003 IN LTC1044A ;pnba Boost)Cap+)GND)Cap-)Vout)LV)OSC)Vin
Rload OUT 0 1K
.tran 100m startup
.lib LTC1044A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3548 1764
WIRE 3008 1440 2976 1440
WIRE 3488 1440 3264 1440
WIRE 3488 1456 3488 1440
WIRE 3008 1504 2912 1504
WIRE 3312 1504 3264 1504
WIRE 3392 1504 3376 1504
WIRE 2912 1536 2912 1504
WIRE 3488 1552 3488 1536
WIRE 3008 1568 2976 1568
WIRE 3296 1568 3264 1568
WIRE 2912 1632 2912 1600
WIRE 3008 1632 2912 1632
WIRE 3328 1632 3264 1632
WIRE 3440 1632 3328 1632
WIRE 3328 1648 3328 1632
WIRE 3440 1648 3440 1632
WIRE 3328 1744 3328 1712
WIRE 3440 1744 3440 1728
SYMBOL VOLTAGE 3488 1440 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2896 1536 R0
SYMATTR InstName C6
SYMATTR Value 10
SYMBOL res 3424 1632 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL cap 3312 1648 R0
SYMATTR InstName C5
SYMATTR Value 10
SYMBOL PowerProducts\\LTC1044A 3136 1536 R0
SYMATTR InstName U1
SYMBOL cap 3376 1488 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100p
FLAG 3488 1552 0
FLAG 2976 1568 0
FLAG 3328 1744 0
FLAG 3392 1504 0
FLAG 3440 1744 0
FLAG 3440 1632 OUT
FLAG 3488 1440 IN
TEXT 3056 1736 Left 2 !.tran 100m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\Vswitch.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
* This shows an example of suppling a .model statement as a SPICE\ndirective directly on the schematic to define a voltage controlled switch.
V1 IN 0 PULSE(0 1 0 .5m .5m 0 1m)
V2 N001 0 3.3
S1 0 OUT IN 0 MYSW
R1 N001 OUT 1K
.model MYSW SW(Ron=1 Roff=1Meg Vt=.5 Vh=-.4)
.tran 3m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1276 680
WIRE 224 144 192 144
WIRE 336 144 304 144
WIRE 192 176 192 144
WIRE 144 192 -208 192
WIRE 336 192 336 144
WIRE -208 208 -208 192
WIRE 144 240 128 240
WIRE 192 272 192 256
WIRE 336 304 336 272
WIRE -208 320 -208 288
SYMBOL voltage 336 176 R0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL voltage -208 192 R0
WINDOW 3 13 107 Left 2
SYMATTR Value PULSE(0 1 0 .5m .5m 0 1m)
SYMATTR InstName V1
SYMBOL res 320 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL sw 192 272 M180
WINDOW 0 12 104 Left 2
WINDOW 3 17 11 Left 2
SYMATTR InstName S1
SYMATTR Value MYSW
FLAG 336 304 0
FLAG 192 272 0
FLAG 128 240 0
FLAG -208 320 0
FLAG -208 192 IN
FLAG 192 144 OUT
TEXT -224 400 Left 2 !.model MYSW SW(Ron=1 Roff=1Meg Vt=.5 Vh=-.4)
TEXT 192 344 Left 2 !.tran 3m
TEXT 96 432 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT 56 88 Bottom 2 ;This shows an example of suppling a .model statement as a SPICE\ndirective directly on the schematic to define a voltage controlled switch.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4381-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4381-1.asy)
R1 N002 IN 200k
Rload OUT 0 100
XU1 N002 N003 N005 N001 OUT 0 NC_01 0 N003 N007 IN N001 N004 LTC4381-1 ;pnba DRN)Vcc)GATE)SNS)OUT)SEL)_FLT)GND)ON)TMR)IN)SRC)GFET
V1 IN 0 PWL(0 0 20u 12 0.1 12 +1m 80 0.2 80 +1m 12 10 12 +0.1u 0 +0.1 0 +0.1u 12)
D1 0 N003 1N5371B
R5 N005 N006 33
R2 IN N003 20k
R3 OUT N001 10m
C4 OUT 0 22
C2 N003 0 0.1
C1 N007 0 0.22
C3 N006 0 47n
R4 N005 N004 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 12 startup
.lib LTC4381-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -416 -32 -432 -32
WIRE -256 -32 -416 -32
WIRE -160 -32 -256 -32
WIRE 64 -32 -160 -32
WIRE 576 -32 528 -32
WIRE 752 -32 656 -32
WIRE 832 -32 752 -32
WIRE 864 -32 832 -32
WIRE 864 -16 864 -32
WIRE -432 0 -432 -32
WIRE -256 0 -256 -32
WIRE 752 0 752 -32
WIRE -160 32 -160 -32
WIRE -112 32 -160 32
WIRE 64 32 -32 32
WIRE 576 32 576 -32
WIRE 576 32 528 32
WIRE 752 80 752 64
WIRE 864 80 864 64
WIRE 656 96 656 -32
WIRE 656 96 528 96
WIRE -432 112 -432 80
WIRE -256 112 -256 80
WIRE 64 112 -256 112
WIRE -256 176 -256 112
WIRE -144 176 -256 176
WIRE 64 176 -144 176
WIRE 576 176 528 176
WIRE 704 176 656 176
WIRE -256 224 -256 176
WIRE -144 240 -144 176
WIRE 64 240 32 240
WIRE 704 240 704 176
WIRE 704 240 528 240
WIRE 704 272 704 240
WIRE -256 368 -256 288
WIRE -144 368 -144 304
WIRE 704 368 704 352
WIRE 176 384 176 368
WIRE 176 464 176 448
WIRE 400 464 400 368
WIRE 704 480 704 432
SYMBOL cap 688 368 R0
SYMATTR InstName C3
SYMATTR Value 47n
SYMBOL zener -160 304 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5371B
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res -272 -16 R0
SYMATTR InstName R2
SYMATTR Value 20k
SYMBOL cap 736 0 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMBOL res 688 256 R0
SYMATTR InstName R5
SYMATTR Value 33
SYMBOL cap 160 384 R0
SYMATTR InstName C1
SYMATTR Value 0.22
SYMBOL res 672 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10m
SYMBOL res 848 -32 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL LTC4381-1 288 176 R0
SYMATTR InstName U1
SYMBOL res 672 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL res -16 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200k
SYMBOL voltage -432 -16 R0
WINDOW 3 -10 -99 Left 2
SYMATTR Value PWL(0 0 20u 12 0.1 12 +1m 80 0.2 80 +1m 12 10 12 +0.1u 0 +0.1 0 +0.1u 12)
SYMATTR InstName V1
SYMBOL cap -272 224 R0
SYMATTR InstName C2
SYMATTR Value 0.1
FLAG 176 464 0
FLAG 400 464 0
FLAG -432 112 0
FLAG -256 368 0
FLAG -144 368 0
FLAG 32 240 0
FLAG 704 480 0
FLAG 752 80 0
FLAG -416 -32 IN
FLAG 832 -32 OUT
FLAG 864 80 0
TEXT -352 472 Left 2 !.tran 12 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8411A.asc
* Generated by LTspice 26.0.1 for Windows.
* Current Sense Output
* Ishunt\n-50A to 50A
* Bidirectional Operation: \n REF1 = VS, REF2 = GND\nUnidirectional Operation: \n VS Referenced: REF1=REF2 = VS \n GND Referenced: REF1=REF2 = GND
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8411A.asy)
VS N001 0 5
VREF2 N003 0 0
VCM +IN 0 48
VREF1 N002 0 5
Rshunt +IN -IN 0.001
XU1 -IN 0 N003 OUT N001 N002 +IN AD8411A ;pnba IN-)GND)REF2)OUT)VS)REF1)IN+
Iload -IN 0 PWL(0 0 +250m -50 +500m 50 +250m 0)
.tran 1
.lib AD8411A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1388 760
WIRE 576 192 480 192
WIRE 704 192 608 192
WIRE 480 224 480 192
WIRE 704 224 704 192
WIRE 480 336 480 304
WIRE 704 336 704 304
WIRE 576 368 576 192
WIRE 608 368 608 192
WIRE 240 384 64 384
WIRE 368 384 240 384
WIRE 64 416 64 384
WIRE 240 416 240 384
WIRE 368 416 368 384
WIRE 512 416 368 416
WIRE 544 416 512 416
WIRE 752 448 688 448
WIRE 512 480 368 480
WIRE 544 480 512 480
WIRE 64 528 64 496
WIRE 240 528 240 496
WIRE 368 528 368 480
WIRE 368 528 240 528
WIRE 240 560 240 528
WIRE 576 560 576 528
WIRE 608 576 608 528
WIRE 240 656 240 624
WIRE 608 688 608 656
SYMBOL AD8411A 576 448 R0
SYMATTR InstName U1
SYMBOL voltage 608 560 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VREF2
SYMATTR Value 0
SYMBOL voltage 704 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VREF1
SYMATTR Value 5
SYMBOL voltage 480 208 R0
SYMATTR InstName VS
SYMATTR Value 5
SYMBOL load 224 560 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 6 184 Left 2
SYMATTR Value PWL(0 0 +250m -50 +500m 50 +250m 0)
SYMATTR InstName Iload
SYMBOL res 224 400 R0
SYMATTR InstName Rshunt
SYMATTR Value 0.001
SYMBOL voltage 64 400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VCM
SYMATTR Value 48
FLAG 480 336 0
FLAG 752 448 OUT
FLAG 240 656 0
FLAG 512 480 -IN
FLAG 512 416 +IN
FLAG 576 560 0
FLAG 64 528 0
FLAG 704 336 0
FLAG 608 688 0
TEXT 832 448 Left 2 ;Current Sense Output
TEXT 784 632 Left 2 !.tran 1
TEXT 320 296 Center 2 ;Ishunt\n-50A to 50A
TEXT 848 192 Left 2 ;Bidirectional Operation: \n          REF1 = VS, REF2 = GND\nUnidirectional Operation: \n          VS Referenced:    REF1=REF2 = VS            \n          GND Referenced: REF1=REF2 = GND
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3092.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 N004 5
XU1 MP_01 N002 N003 MP_02 N001 LT3092 ;pnba )SET)OUT))IN
R2 N002 N004 20K
V1 N001 0 PWL(0 0 1 40)
Rload N004 0 10
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3092.asy)
.lib LT3092.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 80 -176 80
WIRE -176 96 -176 80
WIRE 176 112 176 80
WIRE -176 192 -176 176
WIRE 112 352 112 336
WIRE 256 352 256 336
WIRE 112 448 112 432
WIRE 192 448 112 448
WIRE 256 448 256 432
WIRE 256 448 192 448
WIRE 192 464 192 448
WIRE 192 560 192 544
FLAG 192 560 0
FLAG -176 192 0
SYMBOL res 240 336 R0
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL PowerProducts\\LT3092 176 224 R0
SYMATTR InstName U1
SYMBOL res 96 336 R0
SYMATTR InstName R2
SYMATTR Value 20K
SYMBOL voltage -176 80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 40)
SYMBOL res 176 448 R0
SYMATTR InstName Rload
SYMATTR Value 10
TEXT 376 432 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1117-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1117-3.3.asy)
C1 N002 0 10 V=33 Irms=0 Rser=0.3 Lser=0 mfg="KEMET" pn="T495D106M035AS" type="Tantalum"
V1 N001 0 5
XU1 0 N002 N001 LT1117-3.3 ;pnba GND)OUT)IN
I1 N002 0 pulse(.1 .6 10u 1u 1u 50u 100u)
.tran 300u
.lib LT1117.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1108 680
WIRE 96 176 -16 176
WIRE 464 176 352 176
WIRE 576 176 464 176
WIRE -16 192 -16 176
WIRE 464 192 464 176
WIRE 576 192 576 176
WIRE -16 288 -16 272
WIRE 464 288 464 256
WIRE 576 288 576 272
WIRE 224 304 224 272
SYMBOL voltage -16 176 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LT1117-3.3 224 176 R0
SYMATTR InstName U1
SYMBOL polcap 448 192 R0
WINDOW 3 24 56 Left 2
SYMATTR Value 10
SYMATTR InstName C1
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=33 Irms=0 Rser=0.3 Lser=0 mfg="KEMET" pn="T495D106M035AS" type="Tantalum"
SYMBOL current 576 192 R0
SYMATTR InstName I1
SYMATTR Value pulse(.1 .6 10u 1u 1u 50u 100u)
FLAG -16 288 0
FLAG 464 288 0
FLAG 576 288 0
FLAG 224 304 0
TEXT 472 376 Left 2 !.tran 300u
* Z:\home\khalils\Downloads\files\data\raw_asc\fra_eg1.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac oct 4 100 10Meg
* This example shows the basic principle of extracting\nthe small signal AC characteristics from an \nLTspice Frequency Response Analysis (FRA) simulation.
* To use this technique in your own simulations,\n include an fra device and the .fra directive.\nThe fra device controls the frequency analysis parameters.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
@1 A B delay=100u fstart=100 fend=10Meg oct=4 fcoarse=10k nmax=50k 3 500k 1 pp0=100m pp1=10m f0=50k f1=500k tavgmin=100u tsettle=2u acmag=1
R2 N001 0 1K
C1 A 0 50n
R1 B N001 10K
V2 -V 0 -5
XU1 0 N001 +V -V A level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
C2 N001 0 100p
.fra
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4156 1252
WIRE 1504 544 1472 544
WIRE 1600 544 1584 544
WIRE 1632 544 1600 544
WIRE 1744 544 1712 544
WIRE 1760 544 1744 544
WIRE 1840 544 1824 544
WIRE 1856 544 1840 544
WIRE 1936 576 1936 560
WIRE 2032 576 2032 560
WIRE 1600 640 1600 544
WIRE 1760 640 1600 640
WIRE 1600 656 1600 640
WIRE 1856 656 1856 544
WIRE 1856 656 1824 656
WIRE 1760 672 1744 672
WIRE 1936 672 1936 656
WIRE 2032 672 2032 656
WIRE 1600 736 1600 720
WIRE 1856 736 1856 720
LINE Normal 1680 672 1680 672 2
LINE Normal 1680 672 1680 672 2
LINE Normal 2128 752 2128 752 2
LINE Normal 2128 752 2128 752 2
LINE Normal 2128 752 2128 752 2
LINE Normal 2128 752 2128 752 2
LINE Normal 1712 464 1760 512 2
LINE Normal 1648 656 1648 656 2
SYMBOL voltage 2032 560 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 1728 528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 1600 528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL cap 1584 656 R0
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL Opamps\\UniversalOpamp2 1792 656 R0
SYMATTR InstName U1
SYMBOL voltage 1936 560 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL fra 1760 544 R90
WINDOW 0 -19 -26 VBottom 2
WINDOW 40 37 -28 VBottom 2
SYMATTR InstName @1
SYMATTR SpiceLine delay=100u fstart=100 fend=10Meg oct=4 fcoarse=10k nmax=50k 3 500k 1 pp0=100m pp1=10m f0=50k f1=500k tavgmin=100u tsettle=2u
SYMATTR SpiceLine2 acmag=1
SYMBOL cap 1840 656 R0
SYMATTR InstName C1
SYMATTR Value 50n
FLAG 1936 672 0
FLAG 2032 672 0
FLAG 1936 560 +V
FLAG 1792 624 +V
FLAG 2032 560 -V
FLAG 1792 688 -V
FLAG 1744 672 0
FLAG 1472 544 0
FLAG 1856 736 0
FLAG 1600 736 0
FLAG 1840 544 A
FLAG 1744 544 B
TEXT 2200 560 Left 2 !.fra
TEXT 2112 592 Left 2 ;.ac oct 4 100 10Meg
TEXT 1888 288 Center 2 ;This example shows the basic principle of extracting\nthe small signal AC characteristics from an \nLTspice Frequency Response Analysis (FRA) simulation.
TEXT 1576 392 Left 2 ;To use this technique in your own simulations,\n include an fra device and the .fra directive.\nThe fra device controls the frequency analysis parameters.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1634-4.096.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
R1 N001 N002 90K
XU1 N002 0 LT1634-4.096 ;pnba VCC)VEE
.dc temp -40 80 .1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1634-4.096.asy)
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 144 48 144
WIRE 272 144 208 144
WIRE 48 160 48 144
WIRE 272 176 272 144
WIRE 48 256 48 240
WIRE 272 256 272 240
FLAG 272 256 0
FLAG 48 256 0
SYMBOL voltage 48 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 112 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 90K
SYMBOL References\\LT1634-4.096 272 208 R0
SYMATTR InstName U1
TEXT 72 312 Left 2 !.dc temp -40 80 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7182-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7182-2.5.asy)
C2 OUT 0 2.2
V1 IN 0 -8
C1 IN 0 2.2
V2 N001 0 PULSE(0 2 200u 1n 1n 10m)
XU1 OUT MP_01 MP_02 N001 MP_03 0 IN ADP7182-x.x Rset=500k ;pnba Vout)))EN))GND)Vin
R1 OUT 0 50
.tran 1m
.lib ADP7182-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 -80 -48
WIRE 112 -48 32 -48
WIRE 432 -48 368 -48
WIRE 544 -48 432 -48
WIRE -80 -32 -80 -48
WIRE 32 -32 32 -48
WIRE 432 -32 432 -48
WIRE 544 -32 544 -48
WIRE -80 64 -80 48
WIRE 32 64 32 32
WIRE 432 64 432 32
WIRE 544 64 544 48
WIRE 112 144 32 144
WIRE 32 160 32 144
WIRE 32 256 32 240
WIRE 240 256 240 208
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 2.2
SYMBOL ADP7182-2.5 240 48 R0
SYMATTR InstName U1
SYMBOL res 528 -48 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL voltage -80 -48 R0
SYMATTR InstName V1
SYMATTR Value -8
SYMBOL cap 16 -32 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMBOL voltage 32 144 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 200u 1n 1n 10m)
FLAG -80 64 0
FLAG 32 64 0
FLAG 432 64 0
FLAG 32 256 0
FLAG 240 256 0
FLAG 544 64 0
FLAG 32 -48 IN
FLAG 432 -48 OUT
TEXT 528 248 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\1325ff37aabf_sweep-diagram.asc
* Generated by LTspice 26.0.1 for Windows.
* To find Width by Sweep
* EDIC WINTER INTERNSHIP\nMOHAMMED AHMED MAJID\nGP5405
* Common Source Amplifier with Resistive Load
;.step param wp 1u 50u 1u
V3 N001 0 1.8
V2 N002 0 1.26
M1 N003 N002 N001 N001 PMOS l=0.36u w={wp}
V1 N003 0 0.9
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include tsmc180.txt
.param wp 1u
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 16 256 16
WIRE 416 48 416 16
WIRE 256 64 256 16
WIRE 336 64 256 64
WIRE 256 80 256 64
WIRE 208 96 64 96
WIRE 336 128 336 64
WIRE 336 128 256 128
WIRE 64 176 64 96
WIRE 416 192 416 128
WIRE 256 224 256 176
WIRE 64 304 64 256
WIRE 256 368 256 304
SYMBOL pmos4 208 176 M180
WINDOW 123 29 114 Right 2
SYMATTR InstName M1
SYMATTR Value2 l=0.36u w={wp}
SYMBOL voltage 256 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0.9
SYMBOL voltage 416 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 1.8
SYMBOL voltage 64 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.26
FLAG 64 304 0
FLAG 256 368 0
FLAG 416 192 0
TEXT -400 -56 Left 2 ;To find Width by Sweep
TEXT -400 -16 Left 2 !.include tsmc180.txt
TEXT -400 16 Left 2 !.param wp 1u
TEXT -400 48 Left 2 !;.step param wp 1u 50u 1u
TEXT -400 72 Left 2 !.op
TEXT -408 -160 Left 2 ;EDIC WINTER INTERNSHIP\nMOHAMMED AHMED MAJID\nGP5405
TEXT 16 -64 Left 2 ;Common Source Amplifier with Resistive Load