Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\2ndOrderNotch.asc
* Generated by LTspice 26.0.1 for Windows.
* Set notch frequency and quality factor
* R1 is arbitary
* This version puts 1/2 the R1 resistance in the capacitor
* Vout
* Vin
* The parameter "H" is the gain at frequencies away from the notch
R1 N002 0 {R1/2}
R5 2 0 1Meg
G1 0 N002 1 0 {4/R1}
V1 1 0 AC 1
R3 N003 0 {R1}
C1 N003 0 {C1} Lser={L1}
R2 N003 N002 {R1/2}
G2 0 2 N003 0 {10*H}
R4 2 0 .1
.param f0= 1k Q=.5
.param R1=1k
.param L1=R1*Q/(4*pi*f0)
.param C1=1/(L1*(2*pi*f0)**2)
.ac dec 101 100 10k
.param H=0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE -624 -112 -688 -112
WIRE -528 -112 -560 -112
WIRE -320 -112 -480 -112
WIRE -192 -112 -320 -112
WIRE -64 -112 -112 -112
WIRE 112 -112 -64 -112
WIRE 304 -112 112 -112
WIRE 464 -112 352 -112
WIRE 528 -112 464 -112
WIRE 560 -112 528 -112
WIRE 688 -112 624 -112
WIRE -688 -80 -688 -112
WIRE -480 -80 -480 -112
WIRE 688 -80 688 -112
WIRE -528 -64 -528 -112
WIRE -320 -48 -320 -112
WIRE -64 -48 -64 -112
WIRE 112 -48 112 -112
WIRE 352 -48 352 -112
WIRE 464 -48 464 -112
WIRE 304 -32 304 -112
WIRE -688 16 -688 0
WIRE -528 16 -528 -16
WIRE -480 32 -480 0
WIRE 304 48 304 16
WIRE 352 48 352 32
WIRE 464 48 464 32
WIRE 688 48 688 0
WIRE -320 64 -320 32
WIRE -64 64 -64 16
WIRE 112 64 112 32
SYMBOL g -480 -96 R0
SYMATTR InstName G1
SYMATTR Value {4/R1}
SYMBOL res 448 -64 R0
SYMATTR InstName R4
SYMATTR Value .1
SYMBOL voltage -688 -96 R0
WINDOW 0 36 21 Left 2
WINDOW 123 31 86 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMBOL cap -80 -48 R0
WINDOW 0 50 9 Left 2
WINDOW 3 44 40 Left 2
WINDOW 123 45 71 Left 2
SYMATTR InstName C1
SYMATTR Value {C1}
SYMATTR Value2 Lser={L1}
SYMBOL g 352 -64 R0
SYMATTR InstName G2
SYMATTR Value {10*H}
SYMBOL Misc\\jumper 592 -176 R0
SYMATTR InstName J2
SYMBOL res -96 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R1/2}
SYMBOL res 96 -64 R0
SYMATTR InstName R3
SYMATTR Value {R1}
SYMBOL res 672 -96 R0
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL Misc\\jumper -592 -176 M0
SYMATTR InstName J1
SYMBOL res -336 -64 R0
SYMATTR InstName R1
SYMATTR Value {R1/2}
FLAG -320 64 0
FLAG -480 32 0
FLAG -528 16 0
FLAG -64 64 0
FLAG 112 64 0
FLAG 304 48 0
FLAG 352 48 0
FLAG 464 48 0
FLAG 528 -112 2
FLAG -528 -112 1
FLAG -688 16 0
FLAG 688 48 0
TEXT -240 152 Left 2 !.param f0= 1k Q=.5
TEXT -520 272 Left 2 !.param R1=1k
TEXT -704 312 Left 2 !.param L1=R1*Q/(4*pi*f0)
TEXT -696 152 Left 2 ;Set notch frequency and quality factor
TEXT -696 272 Left 2 ;R1 is arbitary
TEXT -696 232 Left 2 ;This version puts 1/2 the R1 resistance in the capacitor
TEXT -704 344 Left 2 !.param C1=1/(L1*(2*pi*f0)**2)
TEXT 640 -128 Left 2 ;Vout
TEXT -640 -128 Right 2 ;Vin
TEXT -704 376 Left 2 !.ac dec 101 100 10k
TEXT 72 192 Left 2 !.param H=0.1
TEXT -696 192 Left 2 ;The parameter "H" is the gain at frequencies away from the notch
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL42005-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL42005-3.3.asy)
V1 IN 0 4.3
C1 OUT 0 2.2 Rser=1.5m
R1 OUT N001 100k
XU1 IN OUT IN N001 OUT 0 ADPL42005-3.3 ;pnba Vin)Sense)EN)PG)Vout)GND
Rload OUT 0 6.6
.tran 3m startup
.lib ADPL42005-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -16 48 -16 32
WIRE 384 128 352 128
WIRE 464 128 464 32
WIRE 464 128 384 128
WIRE 560 128 464 128
WIRE -16 144 -16 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 384 224 384 128
WIRE 384 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
SYMBOL voltage -16 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.3
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 6.6
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL ADPL42005-3.3 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -16 144 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -16 32 IN
FLAG 560 128 OUT
TEXT 432 296 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7105-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7105-3.3.asy)
C2 N002 0 2.7n
Rload OUT 0 11
XU2 IN OUT IN N002 OUT 0 N001 ADP7105 Vref=3.3 ;pnba Vin)Sense)EN)SS)Vout)GND)PG
R1 OUT N001 100k
V1 IN 0 4.3
C1 OUT 0 2.2 Rser=1.5m
.tran 6m startup
.lib ADP7105.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE 384 128 352 128
WIRE 464 128 464 32
WIRE 464 128 384 128
WIRE 560 128 464 128
WIRE -32 144 -32 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 128
WIRE 384 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.3
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 11
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADP7105-3.3 224 128 R0
SYMATTR InstName U2
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 2.7n
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -32 32 IN
FLAG 560 128 OUT
TEXT 432 296 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\38115db67b1f_steering-diode-protection-circuit.asc
* Generated by LTspice 26.0.1 for Windows.
* connector
* protected circuit
R1 input ESD 100
V1 ESD 0 SINE(0 6 50)
V2 N001 0 3V
D2 input N001 1N4148
D1 0 input 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.04s
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 704 64 448 64
WIRE 448 96 448 64
WIRE 704 176 704 64
WIRE 256 224 192 224
WIRE 448 224 448 160
WIRE 448 224 336 224
WIRE 560 224 448 224
WIRE 192 272 192 224
WIRE 448 288 448 224
WIRE 192 416 192 352
WIRE 448 416 448 352
WIRE 448 416 192 416
WIRE 704 416 704 256
WIRE 704 416 448 416
WIRE 448 448 448 416
RECTANGLE Normal 528 400 384 32 2
RECTANGLE Normal 768 400 544 32 2
SYMBOL Misc\\EuropeanResistor 352 208 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage 704 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3V
SYMBOL diode 464 160 R180
WINDOW 0 24 64 Left 2
WINDOW 3 45 22 Left 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL Misc\\signal 192 256 R0
WINDOW 123 0 0 Left 2
WINDOW 3 -180 48 Left 2
SYMATTR Value SINE(0 6 50)
SYMATTR InstName V1
SYMBOL diode 464 352 R180
WINDOW 0 24 64 Left 2
WINDOW 3 45 19 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG 560 224 input
FLAG 448 448 0
FLAG 192 224 ESD
TEXT 200 440 Left 2 !.tran 0.04s
TEXT 376 200 Left 2 ;connector
TEXT 576 104 Left 2 ;protected circuit
* Z:\tmp\asc_dec_bjh7r6w2\0d902239f55e_OR_gate_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 A 0 PULSE(0 5 0 5n 5n 20 40)
M3 N003 A 0 0 NMOS
M6 N001 N003 Vout N002 PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 752
WIRE 288 48 224 48
WIRE 416 48 288 48
WIRE 528 48 416 48
WIRE 288 112 288 48
WIRE 288 112 224 112
WIRE 176 144 96 144
WIRE 528 176 528 48
WIRE 288 208 288 112
WIRE 288 208 224 208
WIRE 528 224 528 192
WIRE 96 256 96 144
WIRE 608 272 528 272
WIRE 224 288 224 256
WIRE 224 288 144 288
WIRE 336 288 224 288
WIRE 480 288 480 256
WIRE 480 288 336 288
WIRE 176 304 176 240
WIRE 272 304 176 304
WIRE 336 304 336 288
WIRE 144 320 144 288
WIRE 272 352 272 304
WIRE 480 352 480 288
WIRE 272 384 272 352
WIRE 288 384 272 384
WIRE 96 400 96 256
SYMBOL voltage -112 112 R0
WINDOW 3 -123 -44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 0 5n 5n 20 40)
SYMATTR InstName V1
SYMBOL nmos4 96 320 R0
SYMATTR InstName M3
SYMBOL pmos4 480 176 R0
SYMATTR InstName M6
FLAG -112 208 0
FLAG 144 416 0
FLAG 336 352 0
FLAG 144 368 0
FLAG 416 128 0
FLAG -112 128 A
FLAG 96 256 A
FLAG -128 304 B
FLAG 272 352 B
FLAG 528 368 0
FLAG 528 320 0
FLAG 608 272 Vout
* Z:\home\khalils\Downloads\files\data\raw_asc\0118652cfe79_NAND_3.asc
* Generated by LTspice 26.0.1 for Windows.
M10 N002 C 0 0 N_50n l=50n w=500n
M7 out C VDD VDD P_50n l=50n w=1u
M3 out B VDD VDD P_50n l=50n w=1u
M11 N001 B N002 0 N_50n l=50n w=500n
M8 out A VDD VDD P_50n l=50n w=1u
M12 out A N001 0 N_50n l=50n w=500n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 6288 680
WIRE 912 -400 912 -416
WIRE 1168 -400 912 -400
WIRE 1168 -400 1168 -416
WIRE 1168 -368 1168 -400
WIRE 1168 -256 1168 -272
WIRE 1168 -144 1168 -160
WIRE 1168 0 1168 -48
WIRE 1456 -416 1168 -416
WIRE 1616 -416 1456 -416
IOPIN 912 -512 In
IOPIN 1168 0 In
IOPIN 1616 -416 Out
SYMBOL nmos4 1120 -256 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M11
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 1120 -144 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M10
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL pmos4 1120 -416 M180
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M3
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL nmos4 1120 -368 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M12
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL pmos4 1408 -416 M180
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M7
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL pmos4 864 -416 M180
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M8
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
FLAG 1168 -464 VDD
FLAG 1456 -464 VDD
FLAG 912 -464 VDD
FLAG 1168 -96 0
FLAG 1168 -208 0
FLAG 1168 -320 0
FLAG 1168 -512 VDD
FLAG 1456 -512 VDD
FLAG 912 -512 VDD
FLAG 1168 0 GND
FLAG 1616 -416 out
FLAG 864 -496 A
FLAG 1120 -288 A
FLAG 1120 -496 B
FLAG 1120 -176 B
FLAG 1408 -496 C
FLAG 1120 -64 C
TEXT 1360 -336 Left 0 !.lib cmosedu_models.txt
* Z:\home\khalils\Downloads\files\data\raw_asc\3280a733120d_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N002 0 9v
XU1 N003 N001 N002 0 output OP482 ;pnba In+)In-)V+)V-)OUT
V2 N003 0 AC 1 0
R1 N001 N002 2k
R2 0 N001 1k
.ac dec 10 20 20000
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP482.asy)
.lib OP482.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -16 0 -64 0
WIRE -16 16 -16 0
WIRE -64 48 -64 0
WIRE 96 64 -16 64
WIRE 96 144 32 144
WIRE 368 144 96 144
WIRE 32 160 32 144
WIRE -64 176 -64 128
WIRE -16 176 -16 64
WIRE -16 176 -64 176
WIRE 0 176 -16 176
WIRE 144 192 64 192
WIRE 0 208 -320 208
FLAG -320 288 0
FLAG 32 224 0
FLAG 368 224 0
FLAG -16 16 0
FLAG 144 192 output
IOPIN 144 192 Out
SYMBOL voltage 368 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9v
SYMBOL OpAmps\\OP482 32 128 R0
SYMATTR InstName U1
SYMBOL voltage -320 192 R0
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMBOL res 80 48 R0
SYMATTR InstName R1
SYMATTR Value 2k
SYMBOL res -80 32 R0
SYMATTR InstName R2
SYMATTR Value 1k
TEXT -264 304 Left 2 !.ac dec 10 20 20000
* Z:\home\khalils\Downloads\files\data\raw_asc\02076dbbb6da_low-gain-amp-with-out_C_v3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
V1 N003 0 AC 1
R1 N001 N003 1k
XU1 N001 0 N004 N005 N002 level2 Avol=1Meg GBW=100Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V2 N004 0 5
V3 0 N005 5
R2 N002 N001 10k
.ac dec 1000 1e5 5e9
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -112 160 -112
WIRE 480 -112 352 -112
WIRE 160 -16 160 -112
WIRE 272 -16 160 -16
WIRE 480 -16 480 -112
WIRE 480 -16 336 -16
WIRE 368 32 304 32
WIRE 0 64 -96 64
WIRE 160 64 160 -16
WIRE 160 64 80 64
WIRE 304 64 304 32
WIRE 368 64 368 32
WIRE -96 144 -96 64
WIRE 224 144 144 144
WIRE 224 176 224 144
WIRE 304 192 304 144
WIRE 144 208 144 144
WIRE 272 208 144 208
WIRE 480 224 480 -16
WIRE 480 224 336 224
WIRE 560 224 480 224
WIRE 80 240 80 64
WIRE 272 240 80 240
WIRE -96 288 -96 224
WIRE 304 352 304 256
WIRE 304 480 304 432
SYMBOL res 96 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 304 448 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL OpAmps\\UniversalOpAmp2 304 224 R0
SYMATTR InstName U1
SYMATTR Value2 Avol=1Meg GBW=100Meg Slew=10Meg
SYMBOL res 368 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage -96 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value AC 1
SYMBOL voltage 304 160 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
FLAG 304 480 0
FLAG 368 64 0
FLAG 224 176 0
FLAG -96 288 0
TEXT -128 504 Left 2 !.ac dec 1000 1e5 5e9
* Z:\home\khalils\Downloads\files\data\raw_asc\0183ffa9370c_pt2.asc
* Generated by LTspice 26.0.1 for Windows.
M1 vd vd 0 0 N_1u l=1.5u w=3u
I1 vdd vd 3.92966e-005
Vdd vdd 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 -48 176 -80
WIRE 176 80 176 32
WIRE 176 80 128 80
WIRE -32 128 -32 96
WIRE 176 128 176 80
WIRE 208 176 176 176
WIRE 128 208 128 80
WIRE 208 224 208 176
WIRE 208 224 176 224
WIRE -32 256 -32 208
WIRE 176 272 176 224
SYMBOL voltage -32 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vdd
SYMATTR Value 5
SYMBOL nmos4 128 128 R0
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=1.5u w=3u
SYMBOL current 176 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value 3.92966e-005
FLAG 176 272 0
FLAG 176 -80 vdd
FLAG -32 256 0
FLAG -32 96 vdd
FLAG 128 80 vd
TEXT 48 344 Left 2 !.include cmosedu_models.txt
TEXT 48 376 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5679R.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5679R.asy)
V1 Vdd 0 5.5
Vdac vDAC 0 PWL(0 0 10u 0 +1u 1.875)
XU1 vDAC Vdd 0 vOUT AD5679R Gain=2 ;pnba Vdac)Vdd)GND)Vout
RLOAD NC_01 0 1k
CLOAD vOUT 0 10n
.tran 50u
.lib AD5679R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
SYMBOL voltage -800 128 R0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0 10u 0 +1u 1.875)
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
SYMBOL AD5679R -208 112 R0
SYMATTR InstName U1
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -240 -80 Vdd
TEXT -160 312 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1577-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1577-3.3.asy)
MQ1 N001 N003 N004 N004 IRFZ24
V1 N001 0 5
C1 N004 0 24
XU1 0 N002 0 N004 N005 N003 N001 N001 LT1575-3.3 ;pnba SHDN)Vin)GND)OUT)Comp)Gate)Ineg)Ipos
R1 N005 N006 7.5K
I1 N004 0 PULSE(.2 5 300u 100n 100n 300u 600u) load
C2 N005 0 10p
V2 N002 0 12
C3 N006 0 1000p
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m
.lib LT1575.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4232 1996
WIRE 2352 -32 2336 -32
WIRE 2688 -32 2640 -32
WIRE 2928 -32 2688 -32
WIRE 3056 -32 2928 -32
WIRE 3056 -16 3056 -32
WIRE 2352 64 2208 64
WIRE 2688 64 2688 -32
WIRE 2688 64 2640 64
WIRE 2208 80 2208 64
WIRE 2928 80 2928 -32
WIRE 3056 80 3056 64
WIRE 2352 160 2336 160
WIRE 2880 160 2640 160
WIRE 2208 176 2208 160
WIRE 2352 256 2336 256
WIRE 2672 256 2640 256
WIRE 2720 256 2672 256
WIRE 2832 256 2800 256
WIRE 2672 272 2672 256
WIRE 2832 272 2832 256
WIRE 2672 352 2672 336
WIRE 2832 352 2832 336
WIRE 2336 384 2336 256
WIRE 2928 384 2928 176
WIRE 2928 384 2336 384
WIRE 3056 384 2928 384
WIRE 2928 400 2928 384
WIRE 3056 400 3056 384
WIRE 2928 496 2928 464
WIRE 3056 496 3056 480
SYMBOL LT1577-3.3 2496 112 R0
SYMATTR InstName U1
SYMBOL voltage 2208 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL nmos 2880 80 R0
SYMATTR InstName Q1
SYMATTR Value IRFZ24
SYMBOL current 3056 400 R0
WINDOW 123 0 0 Left 2
WINDOW 39 36 40 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMATTR Value PULSE(.2 5 300u 100n 100n 300u 600u)
SYMBOL voltage 3056 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2656 272 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL cap 2816 272 R0
SYMATTR InstName C3
SYMATTR Value 1000p
SYMBOL cap 2912 400 R0
SYMATTR InstName C1
SYMATTR Value 24
SYMBOL res 2704 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 7.5K
FLAG 2928 496 0
FLAG 3056 496 0
FLAG 3056 80 0
FLAG 2336 -32 0
FLAG 2208 176 0
FLAG 2336 160 0
FLAG 2832 352 0
FLAG 2672 352 0
TEXT 3312 544 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1108-12.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
C2 OUT 0 100 Rser=0.02
D1 N001 OUT MBRS360
L1 IN N001 33 Rser=0.02 Rpar=5000
XU1 IN IN N001 0 0 N002 N003 OUT LT1108 top=753K bot=87.4K ;pnba Ilim)Vin)SW1)SW2)GND)AO)SET)Sense
Rload OUT 0 50
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1108-12.asy)
.lib LT1108.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2456 1432
WIRE 1472 912 1264 912
WIRE 1600 912 1472 912
WIRE 1632 912 1600 912
WIRE 1744 912 1712 912
WIRE 1792 912 1744 912
WIRE 1904 912 1856 912
WIRE 1968 912 1904 912
WIRE 1264 928 1264 912
WIRE 1968 928 1968 912
WIRE 1472 960 1472 912
WIRE 1600 960 1600 912
WIRE 1264 1024 1264 1008
WIRE 1392 1024 1376 1024
WIRE 1744 1024 1744 912
WIRE 1744 1024 1680 1024
WIRE 1968 1024 1968 1008
WIRE 1904 1104 1904 912
WIRE 1904 1104 1680 1104
WIRE 1904 1120 1904 1104
WIRE 1392 1184 1376 1184
WIRE 1696 1184 1680 1184
WIRE 1904 1200 1904 1184
WIRE 1536 1264 1536 1248
FLAG 1968 912 OUT
FLAG 1904 1200 0
FLAG 1968 1024 0
FLAG 1264 1024 0
FLAG 1696 1184 0
FLAG 1536 1264 0
FLAG 1264 912 IN
SYMBOL VOLTAGE 1264 912 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL POLCAP 1888 1120 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL schottky 1792 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL IND 1616 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL PowerProducts\\LT1108-12 1536 1104 R0
SYMATTR InstName U1
SYMBOL res 1952 912 R0
SYMATTR InstName Rload
SYMATTR Value 50
TEXT 1712 1248 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX49925.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX49925.asy)
VG1 G1 0 0
Vsense RS+ RS- SINE(0 10m 1k) AC 1
XU1 RS+ RS- OUT 0 VDD 0 VDD G2 G1 MAX49925 ;pnba RS+)RS-)OUT)GND)VDD)REF2)REF1)GAIN2)GAIN1
R1 OUT 0 10k
C1 OUT 0 10p
Vcm RS- 0 48
V1 VDD 0 3.3
VG2 G2 0 0
.tran 2m
.lib MAX49925.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1224 1196
WIRE 560 -112 480 -112
WIRE 656 -112 640 -112
WIRE 656 -96 656 -112
WIRE 480 0 480 -112
WIRE 352 32 64 32
WIRE 384 32 352 32
WIRE 64 48 64 32
WIRE 704 80 576 80
WIRE 800 80 704 80
WIRE 704 112 704 80
WIRE 800 128 800 80
WIRE 64 144 64 128
WIRE 352 144 64 144
WIRE 384 144 352 144
WIRE 64 176 64 144
WIRE 352 208 176 208
WIRE 384 208 352 208
WIRE 624 208 576 208
WIRE 656 208 624 208
WIRE 704 208 704 192
WIRE 800 208 800 192
WIRE 64 272 64 256
WIRE 352 288 288 288
WIRE 384 288 352 288
WIRE 608 288 576 288
WIRE 608 304 608 288
WIRE 176 336 176 208
WIRE 288 336 288 288
WIRE 480 368 480 352
WIRE 176 432 176 416
WIRE 288 432 288 416
SYMBOL voltage 64 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vcm
SYMATTR Value 48
SYMBOL voltage 288 320 R0
SYMATTR InstName VG1
SYMATTR Value 0
SYMBOL voltage 64 32 R0
WINDOW 3 40 50 Left 2
WINDOW 123 42 85 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 10m 1k)
SYMATTR Value2 AC 1
SYMATTR InstName Vsense
SYMBOL MAX49925 480 176 R0
SYMATTR InstName U1
SYMBOL voltage 544 -112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 688 96 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL cap 784 128 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 176 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VG2
SYMATTR Value 0
FLAG 480 368 0
FLAG 656 -96 0
FLAG 480 -112 VDD
FLAG 624 208 VDD
FLAG 608 304 0
FLAG 64 272 0
FLAG 176 432 0
FLAG 288 432 0
FLAG 704 208 0
FLAG 800 208 0
FLAG 800 80 OUT
FLAG 352 32 RS+
FLAG 352 144 RS-
FLAG 352 208 G2
FLAG 352 288 G1
TEXT 40 496 Left 2 !.tran 2m