Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\b1332fe137a7_DC_sweep.asc
* Generated by LTspice 26.0.1 for Windows.
* .step param res 1k 16k 5k
* some graphics
R1 in out 10k tol=1% pwr=0.1
Vin in 0 1
D1 out 0 D
R2 out 0 {res}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc Vin 1 10 9
.param res=10k
.step temp 0 100 50
.op
.param temp = 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 80 128 80
WIRE 288 80 208 80
WIRE 288 128 288 80
WIRE 128 192 128 80
WIRE 288 224 288 208
WIRE 368 224 288 224
WIRE 448 224 368 224
WIRE 288 240 288 224
WIRE 128 352 128 272
WIRE 288 352 288 320
WIRE 288 352 128 352
WIRE 448 352 448 288
WIRE 448 352 288 352
WIRE 128 368 128 352
LINE Normal 612 68 840 324
RECTANGLE Normal 592 52 860 348 2
CIRCLE Normal 720 96 656 300 4
ARC Normal 648 76 832 212 712 296 612 164 3
SYMBOL voltage 128 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -82 53 Left 2
WINDOW 3 -85 83 Left 2
SYMATTR InstName Vin
SYMATTR Value 1
SYMBOL res 272 224 R0
SYMATTR InstName R2
SYMATTR Value {res}
SYMBOL diode 432 224 R0
WINDOW 0 39 36 Left 2
SYMATTR InstName D1
SYMBOL res 272 112 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMATTR SpiceLine tol=1% pwr=0.1
FLAG 128 368 0
FLAG 368 224 out
FLAG 208 80 in
TEXT 56 488 Left 2 !.dc Vin 1 10 9
TEXT 56 440 Left 2 !.param res=10k
TEXT 120 400 Left 2 !.step temp 0 100 50
TEXT 408 400 Left 2 ;.step param res 1k 16k 5k
TEXT 56 512 Left 2 !.op
TEXT 296 488 Left 2 !.param temp = 0
TEXT 640 328 Left 2 ;some graphics
* Z:\home\khalils\Downloads\files\data\raw_asc\3d5e34efd539_comparator_99.asc
* Generated by LTspice 26.0.1 for Windows.
* All parameters that will be optimized\nshould be listed in tables\nwith arbitrary values.
V3 Vin 0
V1 Vdd 0 1.8
M2 Vdd Vin Vout Vdd PMOS l={L2} w={W2} ad={W2*L2} as={W2*L2} pd={2*W1+2*L1} ps={2*W1+2*L1} m=1
V2 N001 0 {Vcomp}
M1 Vout N001 0 0 NMOS l={L1} w={W1} ad={W1*L1} as={W1*L1} pd={2*W1+2*L1} ps={2*W1+2*L1} m=1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.param W1=2.9u
.param W2=2.6u
.param Vcomp=648.0m
.param L1=1.7u
.param L2=2.1u
.dc V3 0 1.8 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4496 2148
WIRE -80 -480 -112 -480
WIRE -64 -480 -80 -480
WIRE -272 -416 -336 -416
WIRE -224 -416 -272 -416
WIRE -112 -416 -112 -480
WIRE -64 -416 -112 -416
WIRE -336 -384 -336 -416
WIRE -64 -368 -64 -416
WIRE -64 -368 -112 -368
WIRE -224 -336 -224 -416
WIRE -160 -336 -224 -336
WIRE -656 -320 -656 -384
WIRE -336 -256 -336 -304
WIRE -112 -240 -112 -320
WIRE 32 -240 -112 -240
WIRE -656 -192 -656 -240
WIRE -112 -192 -112 -240
WIRE -240 -176 -336 -176
WIRE -336 -144 -336 -176
WIRE -80 -144 -112 -144
WIRE -240 -112 -240 -176
WIRE -160 -112 -240 -112
WIRE -112 -80 -112 -96
WIRE -80 -80 -80 -144
WIRE -80 -80 -112 -80
WIRE -112 -32 -112 -80
WIRE -336 -16 -336 -64
SYMBOL voltage -336 -400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value ""
SYMBOL voltage -336 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value {Vcomp}
SYMBOL nmos4 -160 -192 R0
SYMATTR InstName M1
SYMATTR Value2 l={L1} w={W1} ad={W1*L1} as={W1*L1} pd={2*W1+2*L1} ps={2*W1+2*L1} m=1
SYMBOL pmos4 -160 -416 R0
SYMATTR InstName M2
SYMATTR Value2 l={L2} w={W2} ad={W2*L2} as={W2*L2} pd={2*W1+2*L1} ps={2*W1+2*L1} m=1
SYMBOL voltage -656 -336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
FLAG -656 -192 0
FLAG -80 -480 Vdd
FLAG -656 -384 Vdd
FLAG -112 -32 0
FLAG -336 -16 0
FLAG -336 -256 0
FLAG -272 -416 Vin
FLAG 32 -240 Vout
TEXT -360 -728 Left 2 !.param W1=2.9u
TEXT -360 -704 Left 2 !.param W2=2.6u
TEXT -360 -632 Left 2 !.param Vcomp=648.0m
TEXT -360 -680 Left 2 !.param L1=1.7u
TEXT -360 -656 Left 2 !.param L2=2.1u
TEXT 72 -680 Left 2 !.dc V3 0 1.8 0.01
TEXT -384 -848 Left 2 ;All parameters that will be optimized\nshould be listed in tables\nwith arbitrary values.
* Z:\home\khalils\Downloads\files\data\raw_asc\133db7b0177f_ts12.asc
* Generated by LTspice 26.0.1 for Windows.
* Cuadripolo A
* Cuadripolo B
* VNIC
C1 N002 0 {8/7}
XU1 N003 N004 N005 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
C2 N001 0 {48/7}
R5 N003 N005 {39/32}
R4 N002 N001 {49/96}
C3 N003 N005 {8/39}
R1 N004 N005 100
R3 N003 N002 1
R2 N004 0 100
I1 0 N001 SINE(0 1 10k 0) AC 1 0
.ac oct 100 0.001 1K
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 680
WIRE -144 80 -240 80
WIRE -96 80 -144 80
WIRE 48 80 -16 80
WIRE 128 80 48 80
WIRE 512 80 208 80
WIRE 704 80 512 80
WIRE 832 80 704 80
WIRE 1024 80 832 80
WIRE -240 96 -240 80
WIRE 704 96 704 80
WIRE 832 96 832 80
WIRE -144 128 -144 80
WIRE 48 128 48 80
WIRE 336 144 320 144
WIRE 432 144 416 144
WIRE 480 144 432 144
WIRE 480 176 480 144
WIRE 512 176 512 80
WIRE 432 192 432 144
WIRE -240 208 -240 176
WIRE -144 208 -144 192
WIRE -144 208 -240 208
WIRE 48 208 48 192
WIRE 48 208 -144 208
WIRE 208 208 48 208
WIRE 320 208 320 144
WIRE 320 208 208 208
WIRE 704 208 704 176
WIRE 704 208 624 208
WIRE 832 208 832 160
WIRE 832 208 704 208
WIRE 1024 208 832 208
WIRE 208 256 208 208
WIRE 432 336 432 272
WIRE 496 336 496 240
WIRE 496 336 432 336
WIRE 624 336 624 208
WIRE 624 336 496 336
RECTANGLE Normal 256 288 -176 32 2
RECTANGLE Normal 576 400 288 16 2
RECTANGLE Normal 960 336 640 16 2
SYMBOL res 224 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL cap 32 128 R0
SYMATTR InstName C1
SYMATTR Value {8/7}
SYMBOL cap -160 128 R0
SYMATTR InstName C2
SYMATTR Value {48/7}
SYMBOL res 432 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL cap 816 96 R0
SYMATTR InstName C3
SYMATTR Value {8/39}
SYMBOL OpAmps\\opamp 560 208 R90
SYMATTR InstName U1
SYMBOL current -240 176 R180
WINDOW 3 24 136 Left 2
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value SINE(0 1 10k 0)
SYMATTR Value2 AC 1 0
SYMBOL res 416 176 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 0 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value {49/96}
SYMBOL res 688 80 R0
SYMATTR InstName R5
SYMATTR Value {39/32}
FLAG 208 256 0
TEXT -272 -72 Left 2 !.ac oct 100 0.001 1K
TEXT 88 336 Left 2 !.lib opamp.sub
TEXT -32 304 Left 2 ;Cuadripolo A
TEXT 736 352 Left 2 ;Cuadripolo B
TEXT 400 416 Left 2 ;VNIC
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1706-19.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1706-19.asy)
V6 N007 0 PULSE(0 2.4 0 1n 1n 4m 8m)
V2 N006 0 1.19
V4 N003 0 PULSE(0 2.4 0 1n 1n 1m 2m)
XU1 N005 N007 N001 0 N004 OUT N002 N003 LTC1706-19 ;pnba VID2)VID3)Vcc)GND)FB)Sense)VID0)VID1
V5 N005 0 PULSE(0 2.4 0 1n 1n 2m 4m)
C1 OUT 0 .1
V3 N002 0 PULSE(0 2.4 0 1n 1n .5m 1m)
V1 N001 0 3.3
G1 0 OUT N006 N004 100m
.tran 8m
.lib LTC1706-19.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2248 1272
WIRE 912 720 832 720
WIRE 1328 720 912 720
WIRE 832 736 832 720
WIRE 1168 784 1008 784
WIRE 1008 800 1008 784
WIRE 832 816 832 800
WIRE 1168 816 1168 784
WIRE 1328 816 1328 720
WIRE 1856 880 1392 880
WIRE 1008 896 1008 880
WIRE 1856 912 1856 880
WIRE 1744 944 1392 944
WIRE 912 960 912 720
WIRE 1104 976 960 976
WIRE 1744 992 1744 944
WIRE 1616 1008 1392 1008
WIRE 1008 1024 960 1024
WIRE 1856 1024 1856 992
WIRE 912 1056 912 1040
WIRE 1008 1056 1008 1024
WIRE 1488 1072 1392 1072
WIRE 1616 1072 1616 1008
WIRE 1744 1104 1744 1072
WIRE 1248 1136 1248 1120
WIRE 1488 1136 1488 1072
WIRE 1008 1152 1008 1136
WIRE 1616 1184 1616 1152
WIRE 1488 1248 1488 1216
SYMBOL voltage 1488 1120 R0
SYMATTR InstName V6
SYMATTR Value PULSE(0 2.4 0 1n 1n 4m 8m)
SYMBOL voltage 1744 976 R0
SYMATTR InstName V4
SYMATTR Value PULSE(0 2.4 0 1n 1n 1m 2m)
SYMBOL voltage 1008 784 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL voltage 1616 1056 R0
SYMATTR InstName V5
SYMATTR Value PULSE(0 2.4 0 1n 1n 2m 4m)
SYMBOL g2 912 944 M0
WINDOW 0 -18 8 Right 2
WINDOW 3 -18 97 Right 2
SYMATTR InstName G1
SYMATTR Value 100m
SYMBOL cap 816 736 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage 1856 896 R0
SYMATTR InstName V3
SYMATTR Value PULSE(0 2.4 0 1n 1n .5m 1m)
SYMBOL PowerProducts\\LTC1706-19 1248 976 R0
SYMATTR InstName U1
SYMBOL voltage 1008 1040 R0
SYMATTR InstName V2
SYMATTR Value 1.19
FLAG 1008 896 0
FLAG 1248 1136 0
FLAG 1008 1152 0
FLAG 912 1056 0
FLAG 1856 1024 0
FLAG 1744 1104 0
FLAG 1616 1184 0
FLAG 1488 1248 0
FLAG 832 816 0
FLAG 832 720 OUT
TEXT 1912 1224 Left 2 !.tran 8m
* Z:\home\khalils\Downloads\files\data\raw_asc\38e9cabf7774_guitar_waveform_clamp_sim.asc
* Generated by LTspice 26.0.1 for Windows.
* Hunter Drake\nOLED Guitar Pedal Project (clamp stage)\n7/9/2024\n \nCreates a 3.3V ADC friendly signal at Vout.\nVin should not go below -0.5V or above 4V to be safe\n \nNEEDS TO BE TEST IRL PLEASE TEST MF
Q1 Vout N003 0 0 2N3904
R1 N001 N002 1k
R3 Vout Vin 100k
Q2 Vout N002 N003 0 2N3906
R2 N002 0 8.2k
D1 0 Vout 1N4148
V1 N001 0 3.3
V2 Vin 0 1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V2 -1 5 .1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2320 1472
WIRE 96 0 48 0
WIRE 240 0 176 0
WIRE 320 0 240 0
WIRE 464 0 400 0
WIRE 608 0 464 0
WIRE 720 0 608 0
WIRE 608 32 608 0
WIRE 128 80 0 80
WIRE 464 80 464 0
WIRE 464 80 320 80
WIRE 128 96 128 80
WIRE 320 112 320 80
WIRE 608 128 608 96
WIRE 0 144 0 80
WIRE 256 160 224 160
WIRE 128 192 128 176
WIRE 224 192 224 160
WIRE 224 192 128 192
WIRE 128 208 128 192
WIRE 464 208 464 80
WIRE 320 256 320 208
WIRE 400 256 320 256
WIRE 0 304 0 224
WIRE 128 304 128 288
WIRE 128 304 0 304
WIRE 464 320 464 304
SYMBOL diode 624 96 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 112 80 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL pnp 256 112 R0
SYMATTR InstName Q2
SYMATTR Value 2N3906
SYMBOL voltage 192 0 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL res 112 192 R0
SYMATTR InstName R2
SYMATTR Value 8.2k
SYMBOL res 416 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL npn 400 208 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage 0 128 R0
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG 128 304 0
FLAG 608 128 0
FLAG 464 320 0
FLAG 48 0 0
FLAG 720 0 Vout
FLAG 240 0 Vin
TEXT 400 408 Left 2 !.dc V2 -1 5 .1
TEXT 824 48 Left 2 ;Hunter Drake\nOLED Guitar Pedal Project (clamp stage)\n7/9/2024\n \nCreates a 3.3V ADC friendly signal at Vout.\nVin should not go below -0.5V or above 4V to be safe\n \nNEEDS TO BE TEST IRL PLEASE TEST MF
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1174HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1174HV.asy)
D1 0 N001 MBRS140
R1 OUT N004 93.5K
C2 OUT 0 100 Rser=0.02
XU1 N004 N003 N002 0 N001 IN IN IN LTC1174 top=1K bot=1T ;pnba FB)LBout)LBin)GND)SW)Vin)Ipgm)_SHDN
R2 N004 0 31.5K
L1 N001 OUT 100 Rser=0.02 Rpar=5000
V1 IN 0 9
Rload OUT 0 20
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
.lib LTC1174.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1584 1140
WIRE 464 480 352 480
WIRE 624 480 464 480
WIRE 352 496 352 480
WIRE 624 512 624 480
WIRE 464 560 464 480
WIRE 496 560 464 560
WIRE 816 560 752 560
WIRE 864 560 816 560
WIRE 976 560 944 560
WIRE 1088 560 976 560
WIRE 1184 560 1088 560
WIRE 816 576 816 560
WIRE 976 576 976 560
WIRE 1088 576 1088 560
WIRE 1184 576 1184 560
WIRE 352 592 352 576
WIRE 496 624 480 624
WIRE 768 624 752 624
WIRE 816 656 816 640
WIRE 1088 672 1088 640
WIRE 1184 672 1184 656
WIRE 464 688 464 560
WIRE 496 688 464 688
WIRE 976 688 976 656
WIRE 976 688 752 688
WIRE 976 704 976 688
WIRE 624 752 624 736
WIRE 976 800 976 784
SYMBOL POLCAP 1072 576 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL RES 960 560 R0
SYMATTR InstName R1
SYMATTR Value 93.5K
SYMBOL RES 960 688 R0
SYMATTR InstName R2
SYMATTR Value 31.5K
SYMBOL IND 848 576 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL RES 1168 560 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL VOLTAGE 352 480 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL PowerProducts\\LTC1174HV 624 624 R0
SYMATTR InstName U1
SYMBOL SCHOTTKY 800 640 M180
WINDOW 0 33 63 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS140
FLAG 1184 560 OUT
FLAG 1088 672 0
FLAG 1184 672 0
FLAG 816 656 0
FLAG 624 752 0
FLAG 976 800 0
FLAG 352 592 0
FLAG 352 480 IN
TEXT 704 776 Left 2 !.tran 2m startup
* Z:\tmp\asc_dec_bjh7r6w2\088ef73848e2_circuito2.1_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N008 0 -5
RaR2 Vout N007 47k
V3 N009 0 -0.001
R5 N005 N001 99000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -96 144 -144
WIRE 144 -96 128 -96
WIRE 176 -96 144 -96
WIRE 384 -96 176 -96
WIRE 176 -64 176 -96
WIRE 128 -48 128 -96
WIRE 384 -32 384 -96
WIRE -80 0 -80 -48
WIRE -80 0 -128 0
WIRE -32 0 -80 0
WIRE 144 32 128 32
WIRE 160 32 144 32
WIRE 384 80 384 48
WIRE 384 80 192 80
WIRE 448 80 384 80
WIRE -128 112 -128 80
WIRE -128 112 -224 112
WIRE 192 112 192 80
WIRE -32 128 -32 80
WIRE 32 128 -32 128
WIRE 144 128 144 32
WIRE 160 128 144 128
WIRE -128 144 -128 112
WIRE -32 144 -32 128
WIRE 272 144 272 32
WIRE 272 144 224 144
WIRE 336 144 272 144
WIRE 464 144 416 144
WIRE 576 144 544 144
WIRE 32 160 32 128
WIRE 160 160 32 160
WIRE 192 192 192 176
WIRE 208 192 192 192
WIRE 448 192 448 80
WIRE 480 192 448 192
WIRE 480 208 480 192
WIRE -80 224 -128 224
WIRE -32 224 -80 224
WIRE 416 224 416 144
WIRE 448 224 416 224
WIRE 576 240 576 144
WIRE 576 240 512 240
WIRE -224 256 -224 112
WIRE 448 256 -224 256
WIRE 208 272 208 192
WIRE 480 272 208 272
WIRE -80 288 -80 224
WIRE 208 304 208 272
WIRE 80 368 -80 368
WIRE 80 400 80 368
WIRE 208 400 208 384
WIRE 208 400 80 400
WIRE 80 432 80 400
SYMBOL voltage 208 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -5
SYMBOL res 560 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName aR2
SYMATTR Value 47k
SYMBOL voltage -80 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -0.001
SYMBOL res -16 96 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 99000
FLAG 80 432 0
FLAG 176 -64 0
FLAG 576 240 Vout
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1843.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1843.asy)
XU1 N004 0 N002 N002 N006 N005 N001 N003 LTC1843 ;pnba OUTA)GND)INA+)INB-)Hyst)Ref)Vcc)OUTB
V2 N002 0 PULSE(0 3.3 0 .5m .5m 0 1m)
V1 N001 0 5
R2 N001 N004 10K
R1 N001 N003 10K
.tran 3m
.lib LTC1843.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1264 800
WIRE 928 64 736 64
WIRE 1040 64 928 64
WIRE 1136 64 1040 64
WIRE 736 80 736 64
WIRE 1040 80 1040 64
WIRE 1136 80 1136 64
WIRE 928 112 928 64
WIRE 848 160 816 160
WIRE 736 176 736 160
WIRE 1040 176 1040 160
WIRE 1040 176 1008 176
WIRE 560 240 528 240
WIRE 816 240 816 160
WIRE 816 240 640 240
WIRE 848 240 816 240
WIRE 1136 256 1136 160
WIRE 1136 256 1008 256
WIRE 848 304 832 304
WIRE 976 400 976 384
WIRE 880 416 880 384
SYMBOL voltage 656 240 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0 .5m .5m 0 1m)
SYMATTR InstName V2
SYMBOL res 1024 64 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL LTC1843 928 240 R0
SYMATTR InstName U1
SYMBOL voltage 736 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 1120 64 R0
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 736 176 0
FLAG 528 240 0
FLAG 880 416 0
TEXT 1120 344 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6242.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6242.asy)
R1 OUT 0 1K
V1 +V 0 5
XU1 IN OUT +V -V OUT LTC6241 ;pnba IN+)IN-)VCC)VEE)OUT
V2 -V 0 -5
C1 OUT 0 5p
V3 IN 0 PULSE(-1 1 0 1n 1n 100u 200u)
.tran 1m
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 144 -96 128
WIRE 0 144 0 128
WIRE -96 256 -96 224
WIRE 0 256 0 224
WIRE 256 256 128 256
WIRE 128 320 128 256
WIRE 160 320 128 320
WIRE 256 336 256 256
WIRE 256 336 224 336
WIRE 352 336 256 336
WIRE 448 336 352 336
WIRE 160 352 -80 352
WIRE 352 352 352 336
WIRE 448 352 448 336
WIRE -80 368 -80 352
WIRE 352 448 352 432
WIRE 448 448 448 416
WIRE -80 464 -80 448
SYMBOL voltage 0 128 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL cap 432 352 R0
SYMATTR InstName C1
SYMATTR Value 5p
SYMBOL voltage -96 128 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL opamps\\LTC6242 192 336 R0
SYMATTR InstName U1
SYMBOL voltage -80 352 R0
SYMATTR InstName V3
SYMATTR Value PULSE(-1 1 0 1n 1n 100u 200u)
SYMBOL res 336 336 R0
SYMATTR InstName R1
SYMATTR Value 1K
FLAG -96 256 0
FLAG 0 256 0
FLAG -80 464 0
FLAG -80 352 IN
FLAG 448 336 OUT
FLAG 352 448 0
FLAG 448 448 0
FLAG 0 128 -V
FLAG -96 128 +V
FLAG 192 304 +V
FLAG 192 368 -V
TEXT 544 448 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8551.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8551.asy)
XU1 IN N001 +V -V OUT AD8551 ;pnba In+)In-)V+)V-)OUT
Rload OUT 0 10K
R2 OUT N001 10K
V1 +V 0 2.5
R1 N001 0 10K
Vin IN 0 SINE(0 1 10K)
V2 -V 0 -2.5
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 160 -1136 160 -1152
WIRE 272 -1136 272 -1152
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 736 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 736 -1088 736 -1104
WIRE 432 -1072 432 -1088
WIRE 160 -1040 160 -1056
WIRE 272 -1040 272 -1056
WIRE 736 -992 736 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 160 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 272 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 720 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL Opamps\\AD8551 576 -1168 R0
SYMATTR InstName U1
FLAG 432 -976 0
FLAG 736 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 736 -992 0
FLAG 160 -1152 +V
FLAG 160 -1040 0
FLAG 272 -1152 -V
FLAG 272 -1040 0
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6992-1.asc
* Generated by LTspice 26.0.1 for Windows.
* 400Hz, 100% to 0% Duty Cycle\nSwept Pulse Width Modulated Output\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6992-1.asy)
R2 N004 0 1000K
R4 PWMout 0 10K
V2 N001 0 PULSE(0 1 10m 50m 50m 5m 110m)
XU1 N001 0 N003 N004 N002 PWMout LTC6992-1 ;pnba MOD)GND)SET)DIV)V+)OUT
R1 N003 0 487K
R3 N002 N004 392K
V1 N002 0 3
.tran 120m startup
.lib LTC6992-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 996 680
WIRE -208 96 -240 96
WIRE 96 96 -128 96
WIRE 656 96 320 96
WIRE 656 112 656 96
WIRE 96 176 64 176
WIRE 400 176 320 176
WIRE 544 176 400 176
WIRE 400 192 400 176
WIRE 544 192 544 176
WIRE 656 208 656 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 368 256 320 256
WIRE 368 288 368 256
WIRE 400 288 400 272
WIRE 400 288 368 288
WIRE 544 288 544 272
WIRE 400 304 400 288
WIRE 400 400 400 384
SYMBOL voltage -112 96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 1 10m 50m 50m 5m 110m)
SYMATTR InstName V2
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 487K
SYMBOL voltage 544 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res 384 176 R0
SYMATTR InstName R3
SYMATTR Value 392K
SYMBOL SpecialFunctions\\LTC6992-1 208 176 R0
SYMATTR InstName U1
SYMBOL res 640 96 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 384 288 R0
SYMATTR InstName R2
SYMATTR Value 1000K
FLAG -240 96 0
FLAG 544 288 0
FLAG 656 96 PWMout
FLAG 656 208 0
FLAG 400 400 0
FLAG -16 256 0
FLAG 64 176 0
TEXT 536 384 Left 2 !.tran 120m startup
TEXT 208 56 Bottom 2 ;400Hz, 100% to 0% Duty Cycle\nSwept Pulse Width Modulated Output\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\4febf35c685b_HalfAdder.asc
* Generated by LTspice 26.0.1 for Windows.
A1 0 A 0 B 0 sum 0 0 XOR
A2 0 A 0 B 0 Carry 0 0 AND
V1 A 0 V
V3 C 0 V
V2 B 0 V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -384 -64 -432 -64
WIRE -432 -16 -432 -64
WIRE -384 96 -432 96
WIRE 80 112 32 112
WIRE 96 112 80 112
WIRE -432 144 -432 96
WIRE 48 144 32 144
WIRE 96 144 48 144
WIRE 320 144 176 144
WIRE -384 240 -432 240
WIRE 80 240 80 112
WIRE 160 240 80 240
WIRE 48 272 48 144
WIRE 160 272 48 272
WIRE 320 272 224 272
WIRE -432 288 -432 240
IOPIN 32 112 In
IOPIN 32 144 In
IOPIN -304 -64 Out
IOPIN -304 96 Out
IOPIN -304 240 Out
IOPIN 320 144 Out
IOPIN 320 272 Out
SYMBOL voltage -288 -64 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMBOL voltage -288 240 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V3
SYMBOL voltage -288 96 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMBOL Digital\\xor 144 64 R0
SYMATTR InstName A1
SYMBOL Digital\\and 192 192 R0
SYMATTR InstName A2
FLAG 32 112 A
FLAG 32 144 B
FLAG -304 -64 A
FLAG -304 96 B
FLAG -304 240 C
FLAG -432 -16 0
FLAG -432 144 0
FLAG -432 288 0
FLAG 320 144 sum
FLAG 320 272 Carry
* Z:\tmp\asc_dec_bjh7r6w2\06986fcd7f4e_Draft1a_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 N005 15
R1 N003 N006 2
L1 N002 N003 72e-6
D2 N002 N001 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 -432 -80 -432
WIRE 176 -432 64 -432
WIRE -80 -352 -80 -432
WIRE -80 -352 -240 -352
WIRE 0 -352 -80 -352
WIRE 176 -352 176 -432
WIRE 176 -352 96 -352
WIRE 224 -352 176 -352
WIRE 304 -352 224 -352
WIRE 496 -352 384 -352
WIRE 720 -352 496 -352
WIRE 112 -304 80 -304
WIRE 112 -224 112 -304
WIRE -240 -208 -240 -352
WIRE 720 -208 720 -352
WIRE 224 -192 224 -352
WIRE 176 -144 176 -352
WIRE 176 -144 112 -144
WIRE -240 -32 -240 -128
WIRE 224 -32 -240 -32
WIRE 720 -32 720 -128
WIRE 720 -32 496 -32
WIRE 736 -32 720 -32
SYMBOL voltage -240 -224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 704 -224 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL ind 288 -336 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 72e-6
SYMBOL diode 64 -448 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2