Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8052A.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 24
R1 IN N001 510K
R2 N007 0 90.9K
R3 N004 0 9.09K
C1 OUT 0 330 V=6.3 Irms=3.9 Rser=0.01 Lser=0 mfg="KEMET" pn="T520D337M006ASE010" type="Tantalum"
Rload OUT 0 .5
XU1 0 N001 N002 N002 OUT N002 MP_01 N006 MP_02 N004 MP_03 MP_04 MP_05 N005 N007 MP_06 MP_07 MP_08 MP_09 MP_10 MP_11 MP_12 MP_13 MP_14 MP_15 MP_16 MP_17 IN LTM8052A ;pnba GND)RUN)Vref)CTL_T)Vout)CTL_I))SS))ADJ))))Comp)Rt)))))))))))))Vin
C2 OUT 0 100 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C575OX5ROJI07M" type="X5R"
.tran 1.2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8052A.asy)
.lib LTM8052A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 -80 -144 -80
WIRE 208 -80 -32 -80
WIRE -144 -64 -144 -80
WIRE -32 -64 -32 -80
WIRE 208 -32 208 -80
WIRE -144 32 -144 16
WIRE -32 32 -32 16
WIRE 64 32 -32 32
WIRE 432 32 352 32
WIRE 528 32 432 32
WIRE 624 32 528 32
WIRE 432 48 432 32
WIRE 528 48 528 32
WIRE 624 48 624 32
WIRE 64 128 48 128
WIRE 368 128 352 128
WIRE 432 144 432 112
WIRE 528 144 528 112
WIRE 624 144 624 128
WIRE 48 224 48 128
WIRE 64 224 48 224
WIRE 368 224 352 224
WIRE 464 224 448 224
WIRE 48 320 48 224
WIRE 64 320 48 320
WIRE 368 320 352 320
WIRE 64 416 48 416
WIRE 368 416 352 416
WIRE 464 416 448 416
WIRE 208 496 208 480
FLAG 208 496 0
FLAG -144 32 0
FLAG -144 -80 IN
FLAG 464 416 0
FLAG 464 224 0
FLAG 624 144 0
FLAG 432 144 0
FLAG 624 32 OUT
FLAG 528 144 0
SYMBOL voltage -144 -80 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res -48 -80 R0
SYMATTR InstName R1
SYMATTR Value 510K
SYMBOL res 352 432 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 90.9K
SYMBOL res 352 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 9.09K
SYMBOL polcap 416 48 R0
WINDOW 3 24 64 Left 2
SYMATTR Value 330
SYMATTR InstName C1
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=6.3 Irms=3.9 Rser=0.01 Lser=0 mfg="KEMET" pn="T520D337M006ASE010" type="Tantalum"
SYMBOL res 608 32 R0
SYMATTR InstName Rload
SYMATTR Value .5
SYMBOL PowerProducts\\LTM8052A 208 224 R0
SYMATTR InstName U1
SYMBOL cap 512 48 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C575OX5ROJI07M" type="X5R"
TEXT 472 320 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\6682cea32465_Draft01.asc
* Generated by LTspice 26.0.1 for Windows.
V2 VCC 0 5
V4 P15V 0 15
V1 N001 0 SINE(0 15 50)
R1 N002 N001 1k
Q1 N003 N002 0 0 NPN
D3 0 N002 D
R9 N003 VCC 10k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0.2s
* anti-parallel diodes of bjt and discrete are reasonably robust against ESD.\nfaster than optocoupler. albeit gnd referenced.\nalso makes a good rough level-shift, signal comparator.
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 5720 1740
WIRE 1216 -256 1120 -256
WIRE 1344 -256 1296 -256
WIRE 2000 -240 1792 -240
WIRE 1120 -208 1120 -256
WIRE 1344 -192 1344 -256
WIRE 1680 -192 1344 -192
WIRE 1728 -192 1680 -192
WIRE 1504 -128 1120 -128
WIRE 1680 -128 1504 -128
WIRE 1792 -128 1792 -144
WIRE 1792 -128 1680 -128
WIRE 2000 -128 1792 -128
WIRE 1504 -64 1504 -128
FLAG 784 -352 0
FLAG 784 -432 VCC
FLAG 608 -336 0
FLAG 608 -416 P15V
FLAG 1792 -320 VCC
FLAG 1504 -64 0
SYMBOL voltage 784 -448 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 48 40 Left 2
SYMATTR Value 5
SYMATTR InstName V2
SYMBOL voltage 608 -432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 48 40 Left 2
SYMATTR Value 15
SYMATTR InstName V4
SYMBOL voltage 1120 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 48 40 Left 2
SYMATTR Value SINE(0 15 50)
SYMATTR InstName V1
SYMBOL res 1312 -272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL npn 1728 -240 R0
SYMATTR InstName Q1
SYMBOL diode 1696 -128 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMBOL res 1808 -224 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R9
SYMATTR Value 10k
TEXT 992 -416 Left 2 !.tran 0.2s
TEXT 1952 -400 Left 2 ;anti-parallel diodes of bjt and discrete are reasonably robust against ESD.\nfaster than optocoupler. albeit gnd referenced.\nalso makes a good rough level-shift, signal comparator.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1635.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
R1 OUT N001 1K
R2 N001 0 1K
V3 IN 0 SINE(1.25 .5 1K)
XU1 IN N001 +V 0 OUT REF REF LT1635 ;pnba In+)In-)V+)V-)OUT)RefOut)RefFB
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1635.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 64 16 64
WIRE 128 64 112 64
WIRE 208 64 128 64
WIRE 336 64 288 64
WIRE 192 144 192 128
WIRE -320 192 -320 176
WIRE 128 192 128 64
WIRE 160 192 128 192
WIRE 336 224 336 64
WIRE 336 224 304 224
WIRE 384 224 336 224
WIRE 160 256 -64 256
WIRE -64 272 -64 256
WIRE -320 288 -320 272
WIRE 256 320 256 304
WIRE 192 352 192 304
WIRE 224 352 224 304
WIRE 224 352 192 352
WIRE 320 352 224 352
WIRE -64 368 -64 352
FLAG -320 288 0
FLAG 192 128 +V
FLAG -320 176 +V
FLAG 16 64 0
FLAG -64 368 0
FLAG 384 224 OUT
FLAG -64 256 IN
FLAG 256 320 0
FLAG 320 352 REF
SYMBOL voltage -320 176 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 304 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 128 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -64 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(1.25 .5 1K)
SYMBOL opamps\\LT1635 192 224 R0
SYMATTR InstName U1
TEXT 424 312 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\OP213.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP213.asy)
Vin IN 0 SINE(0 1 10K)
R2 OUT N001 10K
R1 N001 0 10K
V1 +V 0 15
V2 -V 0 -15
Rload OUT 0 10K
XU1 IN N001 +V -V OUT OP213 ;pnba In+)In-)V+)V-)OUT
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 416 -1232 400 -1232
WIRE 512 -1232 496 -1232
WIRE 544 -1232 512 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1136 144 -1152
WIRE 272 -1136 272 -1152
WIRE 512 -1120 512 -1232
WIRE 544 -1120 512 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 736 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 736 -1088 736 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1040 144 -1056
WIRE 272 -1040 272 -1056
WIRE 736 -992 736 -1008
WIRE 432 -976 432 -992
SYMBOL res 720 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 512 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 272 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 144 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL Opamps\\OP213 576 -1168 R0
SYMATTR InstName U1
FLAG 144 -1152 +V
FLAG 432 -976 0
FLAG 736 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 272 -1152 -V
FLAG 576 -1072 -V
FLAG 400 -1232 0
FLAG 736 -992 0
FLAG 272 -1040 0
FLAG 144 -1040 0
TEXT 704 -944 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6235.asc
* Generated by LTspice 26.0.1 for Windows.
* Single Supply, Low Noise, Low Power, Bandpass Filter with Gain=10
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6235.asy)
XU1 N003 N002 OUT +V 0 LT6234 ;pnba IN+)IN-)OUT)VCC)VEE
C2 OUT N002 47p
C1 N003 0 .1
R5 N002 N001 732
R3 +V N003 10K
R4 N003 0 10K
V2 IN 0 ac 1
C3 N001 IN 1000p
V1 +V 0 10
R1 OUT N001 732
.ac oct 100 100K 10Meg
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -336 -32 -336 -48
WIRE -192 0 -224 0
WIRE 144 0 -112 0
WIRE -80 48 -96 48
WIRE 144 48 144 0
WIRE 144 48 -16 48
WIRE -336 64 -336 48
WIRE -32 128 -48 128
WIRE 80 128 80 112
WIRE 80 128 48 128
WIRE 80 160 80 128
WIRE -320 176 -400 176
WIRE -224 176 -224 0
WIRE -224 176 -256 176
WIRE -208 176 -224 176
WIRE -96 176 -96 48
WIRE -96 176 -128 176
WIRE 48 176 -96 176
WIRE -400 192 -400 176
WIRE 144 192 144 48
WIRE 144 192 112 192
WIRE 160 192 144 192
WIRE -48 208 -48 128
WIRE -48 208 -128 208
WIRE 48 208 -48 208
WIRE -128 224 -128 208
WIRE -48 224 -48 208
WIRE 80 240 80 224
WIRE -400 288 -400 272
WIRE -128 320 -128 288
WIRE -48 320 -48 304
SYMBOL cap -16 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 47p
SYMBOL res -64 208 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL opamps\\LT6235 80 192 R0
SYMATTR InstName U1
SYMBOL res -96 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 732
SYMBOL res 64 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res -112 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 732
SYMBOL cap -144 224 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL cap -256 160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1000p
SYMBOL voltage -336 -48 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL voltage -400 176 R0
SYMATTR InstName V2
SYMATTR Value ac 1
FLAG -336 64 0
FLAG 80 112 +V
FLAG -336 -48 +V
FLAG -48 320 0
FLAG -128 320 0
FLAG -400 288 0
FLAG 160 192 OUT
FLAG -400 176 IN
FLAG 80 240 0
TEXT 48 312 Left 2 !.ac oct 100 100K 10Meg
TEXT -56 -104 Bottom 2 ;Single Supply, Low Noise, Low Power, Bandpass Filter with Gain=10
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1693-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1693-2.asy)
V1 N001 0 5
XU1 N002 0 N002 0 N004 N001 N003 N001 LTC1693-2 ;pnba IN1)GND1)IN2)GND2)_OUT2)Vcc2)OUT1)Vcc1
V2 N002 0 PULSE(0 5 0 1n 1n 5u 10u)
.tran 100u
.lib LTC1693-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2388 1428
WIRE 1632 1008 1504 1008
WIRE 1856 1008 1632 1008
WIRE 1856 1024 1856 1008
WIRE 1504 1040 1504 1008
WIRE 1632 1040 1632 1008
WIRE 1440 1120 1104 1120
WIRE 1712 1120 1696 1120
WIRE 1856 1120 1856 1104
WIRE 1104 1216 1104 1120
WIRE 1440 1216 1104 1216
WIRE 1712 1216 1696 1216
WIRE 1104 1232 1104 1216
WIRE 1504 1312 1504 1296
WIRE 1632 1312 1632 1296
WIRE 1104 1328 1104 1312
SYMBOL voltage 1104 1216 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1n 1n 5u 10u)
SYMBOL voltage 1856 1008 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LTC1693-2 1568 1168 R0
SYMATTR InstName U1
FLAG 1856 1120 0
FLAG 1632 1312 0
FLAG 1504 1312 0
FLAG 1104 1328 0
TEXT 1616 1400 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\OP191.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP191.asy)
R1 N001 0 10K
Rload OUT 0 10K
Vin IN 0 SINE(0 1 10K)
R2 OUT N001 10K
V2 -V 0 -5
XU1 IN N001 +V -V OUT OP191 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1136 144 -1152
WIRE 272 -1136 272 -1152
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1040 144 -1056
WIRE 272 -1040 272 -1056
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 272 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL Opamps\\OP191 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 144 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 144 -1152 +V
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 272 -1152 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 272 -1040 0
FLAG 144 -1040 0
TEXT 752 -928 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4362-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4362-1.asy)
R2 N008 N007 1K
MQ1 N002 N006 N003 N003 FDS4953
XU1 N006 N003 NC_01 N004 0 N007 0 LTC4362-1 ;pnba GP)In)Sense)Out)_On)_Pwrgd)Gnd
R1 N004 0 10
V1 N008 0 5
C1 N004 0 10
L1 N001 N002 1 Rser=150m
V3 N005 0 PWL(0us 0V 1200m 0 +5n 1 1201m 1 +5n 0)
S1 0 N004 N005 0 SHORT
V2 N001 0 PWL(0u 0 100m 0 +1u 20 150m 20 +10u 0 200m 0 +1u -20 250m -20 +10u 0 400m 0 +1u 5 800m 5 +3u 20 900m 20 +10u 5)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1500m startup
.model SHORT SW (Ron=1 Roff=1T Vt=0.5 Vh=-0.4)
.lib LTC4362-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 9052 3716
WIRE 5328 -1520 4864 -1520
WIRE 5520 -1520 5408 -1520
WIRE 5648 -1520 5616 -1520
WIRE 6000 -1520 5936 -1520
WIRE 6096 -1520 6000 -1520
WIRE 6208 -1520 6096 -1520
WIRE 6000 -1504 6000 -1520
WIRE 6096 -1504 6096 -1520
WIRE 6208 -1504 6208 -1520
WIRE 6544 -1488 6256 -1488
WIRE 6688 -1488 6624 -1488
WIRE 6288 -1440 6256 -1440
WIRE 6000 -1408 6000 -1440
WIRE 6096 -1408 6096 -1424
WIRE 6208 -1408 6208 -1424
WIRE 5600 -1360 5600 -1472
WIRE 5648 -1360 5600 -1360
WIRE 6032 -1360 5936 -1360
WIRE 6032 -1344 6032 -1360
WIRE 5648 -1296 5600 -1296
WIRE 6032 -1248 6032 -1264
WIRE 5792 -1216 5792 -1232
WIRE 4864 -1184 4864 -1520
WIRE 6032 -1152 6032 -1168
WIRE 4864 -1072 4864 -1104
SYMBOL LTC4362-1 5792 -1392 R0
SYMATTR InstName U1
SYMBOL voltage 4864 -1200 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR Value PWL(0u 0 100m 0 +1u 20 150m 20 +10u 0 200m 0 +1u -20 250m -20 +10u 0 400m 0 +1u 5 800m 5 +3u 20 900m 20 +10u 5)
SYMATTR InstName V2
SYMBOL pmos 5520 -1472 R270
WINDOW 0 67 32 VRight 2
WINDOW 3 -18 70 VLeft 2
SYMATTR InstName Q1
SYMATTR Value FDS4953
SYMBOL cap 5984 -1504 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage 6528 -1488 M90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PWL(0us 0V 1200m 0 +5n 1 1201m 1 +5n 0)
SYMATTR InstName V3
SYMBOL res 6016 -1248 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL sw 6208 -1408 R180
WINDOW 0 -17 107 Right 2
WINDOW 3 -31 7 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL voltage 6032 -1264 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR Value 5
SYMATTR InstName V1
SYMBOL ind 5312 -1504 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
WINDOW 39 -16 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=150m
SYMBOL res 6080 -1520 R0
SYMATTR InstName R1
SYMATTR Value 10
FLAG 5792 -1216 0
FLAG 6032 -1152 0
FLAG 6000 -1408 0
FLAG 6096 -1408 0
FLAG 6208 -1408 0
FLAG 6288 -1440 0
FLAG 6688 -1488 0
FLAG 4864 -1072 0
FLAG 5600 -1296 0
TEXT 6176 -1264 Left 2 !.tran 1500m startup\n.model SHORT SW (Ron=1 Roff=1T Vt=0.5 Vh=-0.4)
* Z:\home\khalils\Downloads\files\data\raw_asc\11e795a57c36_BT-CE-SWITCH-modes.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Ube 0 0
Rc N001 Uce 1k
Q1 Uce Ube 0 0 2N3904
VUcc N001 0 12V
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 300mV 900mV
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 -64 208 -64
WIRE 208 -48 208 -64
WIRE 208 48 208 32
WIRE 240 48 208 48
WIRE 208 80 208 48
WIRE 336 80 336 -64
WIRE 64 128 48 128
WIRE 144 128 64 128
WIRE 48 144 48 128
WIRE 48 256 48 224
WIRE 208 256 208 176
WIRE 208 256 48 256
WIRE 336 256 336 160
WIRE 336 256 208 256
WIRE 208 272 208 256
SYMBOL voltage 48 128 R0
WINDOW 3 -4 148 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 42 61 Left 2
SYMATTR Value 0
SYMATTR InstName V1
SYMBOL Misc\\EuropeanResistor 192 -64 R0
SYMATTR InstName Rc
SYMATTR Value 1k
SYMBOL voltage 336 64 R0
WINDOW 3 22 18 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 18 -11 Left 2
SYMATTR Value 12V
SYMATTR InstName Ucc
SYMBOL npn 144 80 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
FLAG 208 272 0
FLAG 64 128 Ube
FLAG 240 48 Uce
TEXT 0 272 Left 2 !.dc V1 300mV 900mV
* Z:\home\khalils\Downloads\files\data\raw_asc\5136d04fd171_coms_vtc_90nm.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 Vin Vout N001 PMOS l=90nm w=135nm
M2 Vout Vin 0 0 NMOS l=90nm w=405nm
V1 N001 0 1.8
V2 Vin 0 1.2
C1 Vout 0 50f
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc v2 0 1.8 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 32 208 32
WIRE 432 32 240 32
WIRE 208 64 208 32
WIRE 240 112 240 32
WIRE 240 112 208 112
WIRE 160 144 80 144
WIRE 432 144 432 112
WIRE 208 208 208 160
WIRE 432 208 208 208
WIRE 80 224 80 144
WIRE 80 224 -48 224
WIRE 208 224 208 208
WIRE -48 272 -48 224
WIRE 224 272 208 272
WIRE 80 304 80 224
WIRE 160 304 80 304
WIRE -48 384 -48 352
WIRE 208 464 208 320
WIRE 224 464 224 272
WIRE 224 464 208 464
WIRE 432 464 432 272
WIRE 432 464 224 464
WIRE 208 480 208 464
FLAG 208 480 0
FLAG 432 144 0
FLAG -48 384 0
FLAG -48 224 Vin
IOPIN -48 224 In
FLAG 432 208 Vout
IOPIN 432 208 Out
SYMBOL pmos4 160 64 R0
SYMATTR InstName M1
SYMATTR Value2 l=90nm w=135nm
SYMBOL nmos4 160 224 R0
SYMATTR InstName M2
SYMATTR Value2 l=90nm w=405nm
SYMBOL voltage 432 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL voltage -48 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.2
SYMBOL cap 416 208 R0
SYMATTR InstName C1
SYMATTR Value 50f
TEXT -40 328 Left 2 !.dc v2 0 1.8 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\061c53d8d28a_Fig9_33_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot d(Id(M1))
VSG 0 N002 0
VSD 0 N003 100m
VBS N001 0 0
M1 0 N002 N003 N001 P_50n l=100n w=5u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSG 0 500m 1m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1184 688
WIRE 320 96 320 80
WIRE 320 192 320 176
WIRE 400 192 320 192
WIRE 448 80 320 80
WIRE 448 112 448 80
WIRE 448 304 448 208
WIRE 528 160 448 160
WIRE 672 80 448 80
WIRE 672 160 608 160
WIRE 672 160 672 80
WIRE 672 208 672 160
WIRE 672 304 448 304
WIRE 672 304 672 288
WIRE 720 80 672 80
WIRE 720 112 720 80
SYMBOL pmos4 400 112 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=100n w=5u
SYMATTR InstName M1
SYMATTR Value P_50n
SYMBOL voltage 512 160 M90
WINDOW 0 -32 56 VBottom 0
WINDOW 3 -6 99 VBottom 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VBS
SYMATTR Value 0
SYMBOL voltage 320 80 R0
WINDOW 0 -89 56 Left 0
WINDOW 3 24 104 Invisible 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VSG
SYMATTR Value 0
SYMBOL voltage 672 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 41 57 Left 0
WINDOW 3 41 85 Left 0
SYMATTR InstName VSD
SYMATTR Value 100m
FLAG 720 112 0
TEXT 424 336 Left 0 !.dc VSG 0 500m 1m
TEXT 424 360 Left 0 !.lib cmosedu_models.txt
TEXT 488 56 Left 0 ;Plot d(Id(M1))
* Z:\home\khalils\Downloads\files\data\raw_asc\1555c9ae9d88_Prob_4c2.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vds Vgs 0 0 pch_tt
V2 0 Vds 1.8V
V1 0 Vgs 0.9
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.dc V2 0 1.8 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 144 -32 144
WIRE -32 160 -32 144
WIRE -32 160 -176 160
WIRE -176 176 -176 160
WIRE -32 176 -32 160
WIRE -352 256 -384 256
WIRE -224 256 -352 256
WIRE -352 272 -352 256
WIRE -176 288 -176 272
WIRE -32 288 -32 256
WIRE -352 368 -352 352
IOPIN -384 256 In
IOPIN 0 144 Out
SYMBOL voltage -32 272 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.8V
SYMBOL pmos -224 176 R0
SYMATTR InstName M1
SYMATTR Value pch_tt
SYMBOL voltage -352 368 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0.9
FLAG -352 368 0
FLAG -176 288 0
FLAG -32 288 0
FLAG -384 256 Vgs
FLAG 0 144 Vds
TEXT -464 184 Left 2 !.include TSMC180.lib
TEXT -464 216 Left 2 !.dc V2 0 1.8 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\ff9565613925_cbpi_out.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N003 N001 3.3V 0 PNP
D1 N002 24V 1N4148
Q2 N003 N005 0 0 NPN
V2 3.3V 0 3.3 Rser=0
R4 24V N002 28
R2 N005 0 4.75K
M1 N002 N004 0 0 RTQ020N05
R3 N004 N003 100
V1 24V 0 24 Rser=0
R1 N001 0 4.75K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 200
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 680
WIRE -96 80 -96 48
WIRE 32 80 32 48
WIRE 608 112 608 80
WIRE 608 112 512 112
WIRE 512 128 512 112
WIRE 608 128 608 112
WIRE -96 176 -96 160
WIRE 32 176 32 160
WIRE 32 176 -96 176
WIRE 304 176 304 112
WIRE -96 192 -96 176
WIRE 96 224 16 224
WIRE 240 224 176 224
WIRE 512 224 512 192
WIRE 608 224 608 208
WIRE 608 224 512 224
WIRE 608 240 608 224
WIRE 16 304 16 224
WIRE 16 304 -64 304
WIRE 304 320 304 272
WIRE 400 320 304 320
WIRE 560 320 480 320
WIRE 304 368 304 320
WIRE 608 400 608 336
WIRE 16 416 16 304
WIRE 96 416 16 416
WIRE 240 416 176 416
WIRE 304 496 304 464
WIRE 608 496 608 400
WIRE 608 496 304 496
WIRE 304 528 304 496
BUSTAP 608 400 624 400
SYMBOL voltage 32 64 R0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=0
SYMBOL res 592 112 R0
SYMATTR InstName R4
SYMATTR Value 28
SYMBOL diode 528 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL npn 240 368 R0
SYMATTR InstName Q2
SYMBOL voltage -96 64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMATTR SpiceLine Rser=0
SYMBOL pnp 240 272 M180
SYMATTR InstName Q1
SYMBOL nmos 560 240 R0
SYMATTR InstName M1
SYMATTR Value RTQ020N05
SYMBOL res 496 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL res 192 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 4.75K
SYMBOL res 192 400 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.75K
FLAG 304 528 0
FLAG 608 80 24V
FLAG -96 192 0
FLAG -96 48 24V
FLAG 32 48 3.3V
FLAG 304 112 3.3V
FLAG -64 304 0
TEXT 888 104 Left 2 !.tran 200