* Z:\home\khalils\Downloads\files\data\raw_asc\061b6a866aac_Transmission_Gate_divide-by-2_unit.asc
* Generated by LTspice 26.0.1 for Windows.
M1 NQ CLK N001 COM PMOS l={Lp} w={Wp}
M2 N001 NCLK NQ 0 NMOS l={Ln} w={Wn}
V1 COM 0 0.7
M5 0 N001 N002 0 NMOS l={Ln} w={Wn}
M6 N002 N001 COM COM PMOS l={Lp} w={Wp}
M7 0 N002 N005 0 NMOS l={Ln} w={Wn}
M8 N005 N002 COM COM PMOS l={Lp} w={Wp}
M9 N001 NCLK N005 COM PMOS l={Lp} w={Wp}
M10 N005 CLK N001 0 NMOS l={Ln} w={Wn}
M11 N002 NCLK N003 COM PMOS l={Lp} w={Wp}
M12 N003 CLK N002 0 NMOS l={Ln} w={Wn}
M13 0 N003 N004 0 NMOS l={Ln} w={Wn}
M14 N004 N003 COM COM PMOS l={Lp} w={Wp}
M15 0 N004 NQ 0 NMOS l={Ln} w={Wn}
M16 NQ N004 COM COM PMOS l={Lp} w={Wp}
M17 N003 CLK NQ COM PMOS l={Lp} w={Wp}
M18 NQ NCLK N003 0 NMOS l={Ln} w={Wn}
A1 CLK 0 0 0 0 NCLK 0 0 BUF Vhigh=0.7
V2 CLK 0 PULSE(0 .7 0 0 0 .03n .06n)
M3 0 N004 N006 0 NMOS l={Ln} w={Wn}
M4 N006 N004 COM COM PMOS l={Lp} w={Wp}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc ../ptm16nmHP.lib
.tran 5n
.param Wp=1u Wn=.8u Lp=16n Ln=16n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 816 48 800 48
WIRE 832 48 816 48
WIRE 896 48 880 48
WIRE -512 64 -512 32
WIRE -512 64 -560 64
WIRE -416 64 -416 32
WIRE -320 64 -416 64
WIRE -224 64 -224 -16
WIRE -224 64 -320 64
WIRE 0 64 -176 64
WIRE 112 64 112 32
WIRE 112 64 0 64
WIRE 208 64 208 32
WIRE 304 64 208 64
WIRE 400 64 400 -16
WIRE 400 64 304 64
WIRE 624 64 448 64
WIRE -224 80 -224 64
WIRE 400 80 400 64
WIRE -512 96 -512 64
WIRE -416 96 -416 64
WIRE 112 96 112 64
WIRE 208 96 208 64
WIRE 624 144 624 64
WIRE 752 144 624 144
WIRE -320 256 -320 64
WIRE -240 256 -240 224
WIRE -240 256 -320 256
WIRE -144 256 -144 224
WIRE -64 256 -144 256
WIRE -16 256 -16 176
WIRE 0 256 0 64
WIRE 0 256 -16 256
WIRE 304 256 304 64
WIRE 384 256 384 224
WIRE 384 256 304 256
WIRE 480 256 480 224
WIRE 512 256 480 256
WIRE 560 256 512 256
WIRE 608 256 608 176
WIRE 624 256 624 144
WIRE 624 256 608 256
WIRE 688 256 640 256
WIRE 736 256 736 176
WIRE 752 256 752 144
WIRE 752 256 736 256
WIRE -16 272 -16 256
WIRE 608 272 608 256
WIRE 736 272 736 256
WIRE -240 288 -240 256
WIRE -144 288 -144 256
WIRE 384 288 384 256
WIRE 480 288 480 256
WIRE 512 416 512 256
WIRE 624 416 512 416
WIRE 672 416 624 416
WIRE -560 464 -560 64
WIRE 624 464 624 416
WIRE 624 464 -560 464
FLAG -432 144 CLK
IOPIN -432 144 In
FLAG -496 -16 NCLK
IOPIN -496 -16 In
FLAG -464 32 0
FLAG -464 96 COM
FLAG 944 -48 COM
FLAG 944 32 0
FLAG 800 48 NCLK
IOPIN 800 48 Out
FLAG 896 48 CLK
IOPIN 896 48 Out
FLAG -176 16 COM
FLAG -176 112 0
FLAG -176 -32 COM
FLAG -176 160 0
FLAG -64 208 COM
FLAG -64 304 0
FLAG -64 160 COM
FLAG -64 352 0
FLAG -160 336 NCLK
IOPIN -160 336 In
FLAG -224 176 CLK
IOPIN -224 176 In
FLAG -192 224 0
FLAG -192 288 COM
FLAG 192 144 NCLK
IOPIN 192 144 In
FLAG 128 -16 CLK
IOPIN 128 -16 In
FLAG 160 32 0
FLAG 160 96 COM
FLAG 448 16 COM
FLAG 448 112 0
FLAG 448 -32 COM
FLAG 448 160 0
FLAG 560 208 COM
FLAG 560 304 0
FLAG 560 160 COM
FLAG 560 352 0
FLAG 464 336 CLK
IOPIN 464 336 In
FLAG 400 176 NCLK
IOPIN 400 176 In
FLAG 432 224 0
FLAG 432 288 COM
FLAG 672 416 NQ
IOPIN 672 416 Out
FLAG 880 64 0
FLAG 816 192 CLK
IOPIN 816 192 Out
FLAG 816 272 0
FLAG 688 208 COM
FLAG 688 304 0
FLAG 688 160 COM
FLAG 688 352 0
SYMBOL pmos4 -512 144 R270
SYMATTR InstName M1
SYMATTR Value2 l={Lp} w={Wp}
SYMBOL nmos4 -416 -16 R90
SYMATTR InstName M2
SYMATTR Value2 l={Ln} w={Wn}
SYMBOL voltage 944 -64 R0
SYMATTR InstName V1
SYMATTR Value 0.7
SYMBOL nmos4 -224 160 M180
SYMATTR InstName M5
SYMATTR Value2 l={Ln} w={Wn}
SYMBOL pmos4 -224 64 M180
SYMATTR InstName M6
SYMATTR Value2 l={Lp} w={Wp}
SYMBOL nmos4 -16 352 R180
SYMATTR InstName M7
SYMATTR Value2 l={Ln} w={Wn}
SYMBOL pmos4 -16 256 R180
SYMATTR InstName M8
SYMATTR Value2 l={Lp} w={Wp}
SYMBOL pmos4 -240 336 R270
SYMATTR InstName M9
SYMATTR Value2 l={Lp} w={Wp}
SYMBOL nmos4 -144 176 R90
SYMATTR InstName M10
SYMATTR Value2 l={Ln} w={Wn}
SYMBOL pmos4 112 144 R270
SYMATTR InstName M11
SYMATTR Value2 l={Lp} w={Wp}
SYMBOL nmos4 208 -16 R90
SYMATTR InstName M12
SYMATTR Value2 l={Ln} w={Wn}
SYMBOL nmos4 400 160 M180
SYMATTR InstName M13
SYMATTR Value2 l={Ln} w={Wn}
SYMBOL pmos4 400 64 M180
SYMATTR InstName M14
SYMATTR Value2 l={Lp} w={Wp}
SYMBOL nmos4 608 352 R180
SYMATTR InstName M15
SYMATTR Value2 l={Ln} w={Wn}
SYMBOL pmos4 608 256 R180
SYMATTR InstName M16
SYMATTR Value2 l={Lp} w={Wp}
SYMBOL pmos4 384 336 R270
SYMATTR InstName M17
SYMATTR Value2 l={Lp} w={Wp}
SYMBOL nmos4 480 176 R90
SYMATTR InstName M18
SYMATTR Value2 l={Ln} w={Wn}
SYMBOL Digital\\inv 880 -16 M0
WINDOW 3 8 44 Left 2
SYMATTR Value Vhigh=0.7
SYMATTR InstName A1
SYMBOL voltage 816 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 .7 0 0 0 .03n .06n)
SYMBOL nmos4 736 352 R180
SYMATTR InstName M3
SYMATTR Value2 l={Ln} w={Wn}
SYMBOL pmos4 736 256 R180
SYMATTR InstName M4
SYMATTR Value2 l={Lp} w={Wp}
TEXT 864 184 Left 2 !.inc ../ptm16nmHP.lib
TEXT -624 456 Left 2 !.tran 5n
TEXT 688 -120 Left 2 !.param Wp=1u Wn=.8u Lp=16n Ln=16n