Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3585-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3585-2.asy)
R3 N005 N001 10K
V2 N002 0 3
L1 N002 N006 10 Rpar=2K Rser=.1
C1 OUT 0 .02
XU1 N001 N002 N001 N006 N007 N007 N008 N004 N005 MP_01 0 LT3585-2 ;pnba CHRG/Iadj)Vbat)Vin)SW)IBGTPU)IBGTPD)IBGTin)IBGTpwr)_Done))GND
V3 N008 0 PWL(30m 0 30.01m 3 30.1m 3 30.11m 0)
K1 L1 L2 1
L2 0 N003 {10u*10.2*10.2} Rpar=1Meg
D1 N003 OUT D
V1 N001 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 50m startup
.lib LT3585-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2900 1764
WIRE 1936 1152 1936 1136
WIRE 1712 1248 1520 1248
WIRE 1936 1248 1936 1232
WIRE 2064 1248 1936 1248
WIRE 2224 1248 2112 1248
WIRE 2368 1248 2288 1248
WIRE 2064 1264 2064 1248
WIRE 2112 1264 2112 1248
WIRE 2368 1264 2368 1248
WIRE 1712 1296 1712 1248
WIRE 1824 1296 1824 1248
WIRE 1936 1296 1936 1248
WIRE 1520 1360 1520 1248
WIRE 1568 1360 1520 1360
WIRE 1664 1360 1648 1360
WIRE 2064 1360 2064 1344
WIRE 2064 1360 1984 1360
WIRE 2112 1360 2112 1344
WIRE 2368 1360 2368 1328
WIRE 1520 1440 1520 1360
WIRE 1664 1440 1520 1440
WIRE 2016 1440 1984 1440
WIRE 1520 1456 1520 1440
WIRE 1664 1520 1600 1520
WIRE 2016 1520 2016 1440
WIRE 2016 1520 1984 1520
WIRE 1520 1552 1520 1536
WIRE 1600 1552 1600 1520
WIRE 1824 1584 1824 1568
WIRE 1600 1664 1600 1632
SYMBOL misc\\battery 1936 1248 M180
WINDOW 0 25 87 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL ind2 2128 1360 R180
WINDOW 0 -3 72 Right 2
WINDOW 3 0 43 Right 2
SYMATTR InstName L2
SYMATTR Value {10u*10.2*10.2}
SYMATTR SpiceLine Rpar=1Meg
SYMBOL PowerProducts\\LT3585-2 1824 1440 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1520 1440 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL diode 2224 1264 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL voltage 1600 1536 R0
WINDOW 3 12 110 Left 2
SYMATTR Value PWL(30m 0 30.01m 3 30.1m 3 30.11m 0)
SYMATTR InstName V3
SYMBOL ind2 2048 1248 R0
WINDOW 0 -6 35 Right 2
WINDOW 3 -4 73 Right 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rpar=2K Rser=.1
SYMBOL cap 2352 1264 R0
WINDOW 3 27 55 Left 2
SYMATTR Value .02
SYMATTR InstName C1
SYMBOL res 1664 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
FLAG 2368 1360 0
FLAG 1824 1584 0
FLAG 1520 1552 0
FLAG 2112 1360 0
FLAG 1936 1136 0
FLAG 1600 1664 0
FLAG 2368 1248 OUT
TEXT 2136 1464 Left 2 !.tran 50m startup
TEXT 2088 1248 Bottom 2 !K1 L1 L2 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3970-5.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N002 OUT 22
R3 N004 0 226K
C1 N001 N002 .22
C2 OUT 0 22
R4 IN N003 100K
V1 IN 0 10
Rload OUT 0 15
XU1 OUT IN IN 0 MP_01 N002 N001 OUT N003 N004 LT3970-5 ;pnba Vout)EN)Vin)GND))SW)Boost)BD)PG)Rt
.tran 750u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3970-5.asy)
.lib LT3970-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 724
WIRE 48 0 -64 0
WIRE 128 0 48 0
WIRE 208 0 128 0
WIRE 352 0 336 0
WIRE 432 0 416 0
WIRE -64 16 -64 0
WIRE 208 48 208 0
WIRE 336 48 336 0
WIRE -64 112 -64 96
WIRE 48 112 48 0
WIRE 128 112 128 0
WIRE 144 112 128 112
WIRE 432 112 432 0
WIRE 432 112 400 112
WIRE 448 112 432 112
WIRE 544 112 528 112
WIRE 608 112 544 112
WIRE 688 112 608 112
WIRE 608 128 608 112
WIRE 688 128 688 112
WIRE 48 208 48 192
WIRE 144 208 48 208
WIRE 544 208 544 112
WIRE 544 208 400 208
WIRE 608 224 608 192
WIRE 688 224 688 208
WIRE 48 304 32 304
WIRE 144 304 128 304
WIRE 544 304 544 208
WIRE 544 304 400 304
WIRE 272 384 272 368
FLAG 272 384 0
FLAG 32 304 0
FLAG 608 224 0
FLAG 688 224 0
FLAG -64 112 0
FLAG -64 0 IN
FLAG 688 112 OUT
SYMBOL ind 432 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 22
SYMBOL res 144 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 226K
SYMBOL cap 352 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value .22
SYMBOL cap 592 128 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL res 32 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL voltage -64 0 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 672 112 R0
SYMATTR InstName Rload
SYMATTR Value 15
SYMBOL PowerProducts\\LT3970-5 272 208 R0
SYMATTR InstName U1
TEXT 496 352 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6600-15.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\FilterProducts\LT6600-15.asy)
XU1 N004 0 N007 N009 N010 N008 N006 N005 LT6600-15 ;pnba IM)VOCM)VCC)OP)OM)VEE)VMID)IP
V1 N008 0 -2.5
E1 N003 0 N001 0 .5
V3 N007 0 2.5
R2 N003 N005 536
C1 0 N006 .01
V2 N001 0 PULSE(0 500m 100n 5n 5n 10u 20u)
R1 N002 N004 536
E2 0 N002 N001 0 .5
.tran .5u
.lib LT6600-15.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2436 800
WIRE 1088 96 960 96
WIRE 1440 96 1168 96
WIRE 1616 96 1440 96
WIRE 1392 144 1392 128
WIRE 1440 144 1440 96
WIRE 1568 144 1568 128
WIRE 1616 144 1616 96
WIRE 1376 192 1296 192
WIRE 1504 192 1456 192
WIRE 1552 192 1504 192
WIRE 1696 192 1632 192
WIRE 1296 208 1296 192
WIRE 1504 208 1504 192
WIRE 1696 208 1696 192
WIRE 1296 304 1296 288
WIRE 1376 304 1296 304
WIRE 1696 304 1696 288
WIRE 1696 304 1600 304
WIRE 1376 384 1360 384
WIRE 1616 384 1600 384
WIRE 1696 384 1680 384
WIRE 1264 464 1248 464
WIRE 1376 464 1344 464
WIRE 1680 464 1600 464
WIRE 1776 464 1760 464
WIRE 1376 544 1344 544
WIRE 1632 544 1600 544
SYMBOL cap 1680 368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL res 1280 192 R0
SYMATTR InstName R1
SYMATTR Value 536
SYMBOL voltage 1664 464 R270
WINDOW 123 -74 56 VBottom 2
WINDOW 39 -53 56 VBottom 2
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value -2.5
SYMBOL LT6600-15 1488 432 R0
SYMATTR InstName U1
SYMBOL res 1680 192 R0
SYMATTR InstName R2
SYMATTR Value 536
SYMBOL voltage 1360 464 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V3
SYMATTR Value 2.5
SYMBOL e 1648 192 R90
WINDOW 0 -24 25 VLeft 2
WINDOW 3 25 24 VLeft 2
SYMATTR InstName E1
SYMATTR Value .5
SYMBOL e 1472 192 R90
WINDOW 0 -23 19 VLeft 2
WINDOW 3 24 25 VLeft 2
SYMATTR InstName E2
SYMATTR Value .5
SYMBOL voltage 1184 96 R90
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
SYMATTR Value PULSE(0 500m 100n 5n 5n 10u 20u)
SYMATTR InstName V2
FLAG 1776 464 0
FLAG 960 96 0
FLAG 1248 464 0
FLAG 1696 384 0
FLAG 1360 384 0
FLAG 1392 128 0
FLAG 1568 128 0
FLAG 1504 208 0
TEXT 1736 560 Left 2 !.tran .5u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3032.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3032.asy)
R1 N002 N003 50K
C1 N002 0 10
R2 N003 0 29K
R6 N006 0 100
R5 N002 0 100
R4 N004 0 29K
V1 N005 0 pwl(0 0 1 -10)
XU1 N002 N003 NC_01 0 MP_02 N005 N006 N004 MP_03 N001 NC_04 N001 MP_05 N001 LT3032 ;pnba OUTP)ADJP)BYPP)GND))INN)OUTN)ADJN))_SHDNN)BYPN)_SHDNP))INP
C2 N006 0 10
R3 N006 N004 50K
V2 N001 0 pwl(0 0 1 10)
.tran 1
.lib LT3032.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1000 680
WIRE -48 -64 -80 -64
WIRE 80 -64 32 -64
WIRE 96 -64 80 -64
WIRE 432 -64 352 -64
WIRE 528 -64 432 -64
WIRE 608 -64 528 -64
WIRE 432 -48 432 -64
WIRE 528 -48 528 -64
WIRE 608 -48 608 -64
WIRE 432 48 432 32
WIRE 432 48 384 48
WIRE 528 48 528 16
WIRE 608 48 608 32
WIRE 432 64 432 48
WIRE 80 128 80 -64
WIRE 96 128 80 128
WIRE 384 128 384 48
WIRE 384 128 352 128
WIRE 432 160 432 144
WIRE 368 224 352 224
WIRE 432 304 432 288
WIRE 80 320 80 128
WIRE 96 320 80 320
WIRE 384 320 352 320
WIRE 384 400 384 320
WIRE 432 400 432 384
WIRE 432 400 384 400
WIRE 432 416 432 400
WIRE 608 416 608 400
WIRE 528 432 528 400
WIRE -64 512 -96 512
WIRE 96 512 16 512
WIRE 432 512 432 496
WIRE 432 512 352 512
WIRE 528 512 528 496
WIRE 528 512 432 512
WIRE 608 512 608 496
WIRE 608 512 528 512
SYMBOL voltage 32 512 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value pwl(0 0 1 -10)
SYMBOL res 416 48 R0
SYMATTR InstName R2
SYMATTR Value 29K
SYMBOL cap 512 -48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage 48 -64 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value pwl(0 0 1 10)
SYMBOL res 416 512 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 50K
SYMBOL cap 512 496 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res 592 512 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R6
SYMATTR Value 100
SYMBOL res 416 400 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 29K
SYMBOL PowerProducts\\LT3032 224 224 R0
SYMATTR InstName U1
SYMBOL res 592 -64 R0
SYMATTR InstName R5
SYMATTR Value 100
SYMBOL res 416 -64 R0
SYMATTR InstName R1
SYMATTR Value 50K
FLAG 368 224 0
FLAG -96 512 0
FLAG -80 -64 0
FLAG 528 48 0
FLAG 432 160 0
FLAG 528 400 0
FLAG 432 288 0
FLAG 608 48 0
FLAG 608 400 0
TEXT 648 544 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG701.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG701.asy)
VS N001 0 3
V1 +V 0 5
C1 N002 0 35p
R1 N002 0 300
XU1 N003 N002 N001 0 +V ADG701 ;pnba IN)D)S)GND)Vdd
V4 N003 0 PULSE(0 3 0 10n 10n 980n 2u)
.tran 10u
.lib ADG701.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -368 -16 -400 -16
WIRE -240 -16 -288 -16
WIRE 0 -16 -48 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE -480 32 -480 16
WIRE 112 32 112 -16
WIRE -240 48 -368 48
WIRE -368 112 -368 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -480 128 -480 112
WIRE -144 176 -144 160
WIRE -368 272 -368 192
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL voltage -368 96 R0
WINDOW 3 17 129 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 10n 10n 980n 2u)
SYMATTR InstName V4
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL voltage -272 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL ADG701 -144 32 R0
SYMATTR InstName U1
SYMBOL voltage -480 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -480 128 0
FLAG -480 16 +V
FLAG -400 -16 0
FLAG -144 -112 +V
FLAG -144 176 0
FLAG -368 272 0
FLAG 0 112 0
FLAG 112 112 0
TEXT -536 200 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\1141ea37a628_TTL_LVTTL_Tamplate.asc
* Generated by LTspice 26.0.1 for Windows.
* TTL(4.5V - 5.5V)
* LVTTL (3V - 3.6V)
A1 Dot4V 0 0 0 0 N001 0 0 BUF
A2 Dot8V 0 0 0 0 N003 0 0 BUF
A3 1V5 0 0 0 0 N005 0 0 BUF
A4 2V 0 0 0 0 N007 0 0 BUF
A5 2V4 0 0 0 0 N009 0 0 BUF
A6 Dot5V 0 0 0 0 N002 0 0 BUF
A7 Dot8V 0 0 0 0 N004 0 0 BUF
A8 1V5 0 0 0 0 N006 0 0 BUF
A9 2V 0 0 0 0 N008 0 0 BUF
A10 2V4 0 0 0 0 N010 0 0 BUF
V6 2V4 0 2.4V
V5 2V 0 2V
V1 Dot4V 0 0.4V
V2 Dot5V 0 0.5V
V3 Dot8V 0 0.8V
V4 1V5 0 1.5V
.tran 1s
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 764
WIRE 112 80 112 32
WIRE 208 80 208 32
WIRE 304 80 304 32
WIRE 400 80 400 32
WIRE 496 80 496 32
WIRE 592 80 592 32
WIRE 112 208 112 160
WIRE 208 208 208 160
WIRE 304 208 304 160
WIRE 400 208 400 160
WIRE 496 208 496 160
WIRE 592 208 592 160
WIRE 304 448 256 448
WIRE 416 448 368 448
WIRE 544 448 496 448
WIRE 656 448 608 448
WIRE 304 512 256 512
WIRE 416 512 368 512
WIRE 544 512 496 512
WIRE 656 512 608 512
WIRE 304 576 256 576
WIRE 416 576 368 576
WIRE 544 576 496 576
WIRE 656 576 608 576
WIRE 304 640 256 640
WIRE 416 640 368 640
WIRE 544 640 496 640
WIRE 656 640 608 640
WIRE 304 704 256 704
WIRE 416 704 368 704
WIRE 544 704 496 704
WIRE 656 704 608 704
SYMBOL Digital\\inv 304 576 R0
SYMATTR InstName A4
SYMBOL Digital\\inv 304 384 R0
SYMATTR InstName A1
SYMBOL voltage 304 64 R0
SYMATTR InstName V3
SYMATTR Value 0.8V
SYMBOL Digital\\inv 304 640 R0
SYMATTR InstName A5
SYMBOL Digital\\inv 304 512 R0
SYMATTR InstName A3
SYMBOL Digital\\inv 544 384 R0
SYMATTR InstName A6
SYMBOL voltage 496 64 R0
SYMATTR InstName V5
SYMATTR Value 2V
SYMBOL voltage 400 64 R0
SYMATTR InstName V4
SYMATTR Value 1.5V
SYMBOL Digital\\inv 544 512 R0
SYMATTR InstName A8
SYMBOL voltage 112 64 R0
SYMATTR InstName V1
SYMATTR Value 0.4V
SYMBOL voltage 592 64 R0
SYMATTR InstName V6
SYMATTR Value 2.4V
SYMBOL Digital\\inv 544 576 R0
SYMATTR InstName A9
SYMBOL Digital\\inv 304 448 R0
SYMATTR InstName A2
SYMBOL voltage 208 64 R0
SYMATTR InstName V2
SYMATTR Value 0.5V
SYMBOL Digital\\inv 544 448 R0
SYMATTR InstName A7
SYMBOL Digital\\inv 544 640 R0
SYMATTR InstName A10
FLAG 112 208 0
FLAG 208 208 0
FLAG 304 208 0
FLAG 400 208 0
FLAG 496 208 0
FLAG 592 208 0
FLAG 112 32 Dot4V
FLAG 208 32 Dot5V
FLAG 304 32 Dot8V
FLAG 400 32 1V5
FLAG 496 32 2V
FLAG 592 32 2V4
FLAG 256 448 Dot4V
FLAG 496 448 Dot5V
FLAG 256 512 Dot8V
FLAG 256 576 1V5
FLAG 256 640 2V
FLAG 256 704 2V4
FLAG 496 576 1V5
FLAG 496 640 2V
FLAG 496 704 2V4
FLAG 496 512 Dot8V
TEXT 384 400 Left 2 ;TTL(4.5V - 5.5V)
TEXT 616 400 Left 2 ;LVTTL (3V - 3.6V)
TEXT 104 272 Left 2 !.tran 1s
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8625SP-1.asc
* Generated by LTspice 26.0.1 for Windows.
* 2MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8625SP-1.asy)
R2 PGFB 0 49.9k
R4 N002 N003 499
XU1 SW N004 0 CLKout IN NC_01 IN IN N004 N004 SET N003 OUT PGFB N001 PG LT8625SP-1 ;pnba SW)Sync/Mode)GND)CLKout)PVin)BST)SVin)EN/UVLO)INTVcc)PHMode)SET)Vc)OUTS)PGFB)RT)PG
R6 OUT PG 100k
R1 N001 0 47k
L1 SW OUT 1 Rser=6m
C2 OUT 0 470 Rser=5m
R3 OUT PGFB 280k
C1 SET 0 1
V1 IN 0 12
Rload OUT 0 0.4
C3 N002 0 2n
R5 SET 0 33.2k
.tran 1.5m startup
.lib LT8625SP-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1080 680
WIRE 96 -128 -64 -128
WIRE 272 -128 96 -128
WIRE -64 -112 -64 -128
WIRE 272 -112 272 -128
WIRE 96 -64 96 -128
WIRE 128 -64 96 -64
WIRE -64 -16 -64 -32
WIRE 96 32 96 -64
WIRE 128 32 96 32
WIRE 448 32 416 32
WIRE 512 32 448 32
WIRE 688 32 592 32
WIRE -32 128 -64 128
WIRE 128 128 48 128
WIRE 448 128 416 128
WIRE 512 128 448 128
WIRE 688 128 688 32
WIRE 688 128 592 128
WIRE 768 128 688 128
WIRE 880 128 768 128
WIRE 976 128 880 128
WIRE 976 144 976 128
WIRE 880 160 880 128
WIRE 768 176 768 128
WIRE -80 224 -96 224
WIRE 16 224 -16 224
WIRE 128 224 96 224
WIRE 688 224 688 128
WIRE 688 224 416 224
WIRE 880 240 880 224
WIRE 976 240 976 224
WIRE 128 320 96 320
WIRE 464 320 416 320
WIRE 768 320 768 256
WIRE 768 320 464 320
WIRE 768 336 768 320
WIRE 96 416 96 320
WIRE 128 416 96 416
WIRE 448 416 416 416
WIRE 592 416 448 416
WIRE 672 416 592 416
WIRE 672 432 672 416
WIRE 768 432 768 416
WIRE 592 448 592 416
WIRE 96 512 96 416
WIRE 128 512 96 512
WIRE 448 512 416 512
WIRE 592 528 592 512
WIRE 672 528 672 512
WIRE 272 592 272 576
SYMBOL ind 496 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=6m
SYMBOL res 608 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 100k
SYMBOL cap 576 448 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 960 128 R0
SYMATTR InstName Rload
SYMATTR Value 0.4
SYMBOL res 0 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 499
SYMBOL voltage -64 -128 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 752 320 R0
SYMATTR InstName R2
SYMATTR Value 49.9k
SYMBOL cap 864 160 R0
SYMATTR InstName C2
SYMATTR Value 470
SYMATTR SpiceLine Rser=5m
SYMBOL res 64 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 47k
SYMBOL LT8625SP-1 272 192 R0
SYMATTR InstName U1
SYMBOL res 656 416 R0
SYMATTR InstName R5
SYMATTR Value 33.2k
SYMBOL res 752 160 R0
SYMATTR InstName R3
SYMATTR Value 280k
SYMBOL cap -16 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 2n
FLAG -64 -16 0
FLAG -64 128 0
FLAG 272 592 0
FLAG 768 432 0
FLAG 976 240 0
FLAG -96 224 0
FLAG 976 128 OUT
FLAG -64 -128 IN
FLAG 672 528 0
FLAG 592 528 0
FLAG 880 240 0
FLAG 448 512 CLKout
FLAG 448 32 PG
FLAG 448 128 SW
FLAG 464 320 PGFB
FLAG 448 416 SET
TEXT 728 552 Left 2 !.tran 1.5m startup
TEXT 48 104 Left 2 ;2MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1212.asc
* Generated by LTspice 26.0.1 for Windows.
V1 vS 0 SINE(0 5 20)
R1 vD 0 301
V2 vIN 0 PULSE(0 2.5 20n 20n 20n 150m 300m)
C1 vD 0 36p
V3 v+ 0 15
V4 v- 0 -15
XU1 vIN vS vD v- v+ 0 ADG1212 ;pnba IN)S)D)Vss)Vdd)GND
.tran 1
* Notes:\nSwitch shown for a logic 0 input\nParameter performance modeled at 15V supply\nOny one channel is modeled\nBandwith is equal to 608 MHz only
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1212.asy)
.lib ADG1212.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 832
WIRE 256 112 240 112
WIRE 240 144 240 112
WIRE -80 224 -112 224
WIRE 112 224 0 224
WIRE 144 224 112 224
WIRE 368 224 336 224
WIRE 416 224 368 224
WIRE 528 224 416 224
WIRE 416 256 416 224
WIRE 528 256 528 224
WIRE 112 288 48 288
WIRE 144 288 112 288
WIRE -272 304 -288 304
WIRE -176 304 -192 304
WIRE -288 336 -288 304
WIRE -192 336 -192 304
WIRE 48 336 48 288
WIRE 416 352 416 336
WIRE 528 352 528 320
WIRE 304 416 304 400
WIRE 176 432 176 400
WIRE 192 432 176 432
WIRE -288 464 -288 416
WIRE -192 464 -192 416
WIRE 48 464 48 416
FLAG -112 224 0
FLAG 48 464 0
FLAG 416 352 0
FLAG 304 416 0
FLAG 368 224 vD
FLAG 112 224 vS
FLAG 112 288 vIN
FLAG 528 352 0
FLAG -288 304 v+
FLAG 240 112 v+
FLAG -288 464 0
FLAG -192 464 0
FLAG -192 304 v-
FLAG 176 432 v-
SYMBOL voltage 16 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 20)
SYMBOL res 400 240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage 48 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 30 177 Left 2
SYMATTR Value PULSE(0 2.5 20n 20n 20n 150m 300m)
SYMATTR InstName V2
SYMBOL cap 512 256 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -288 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL voltage -192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -15
SYMBOL ADG1212 240 272 R0
SYMATTR InstName U1
TEXT 80 528 Left 2 !.tran 1
TEXT -360 -40 Left 2 ;Notes:\nSwitch shown for a logic 0 input\nParameter performance modeled at 15V supply\nOny one channel is modeled\nBandwith is equal to 608 MHz only
* Z:\home\khalils\Downloads\files\data\raw_asc\24b4c4fb588c_60hz_notch_filter_active.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
;step param Rq 2.2Meg 3Meg .1Meg
V1 N001 0 AC 5m
R4 vout N003 {Rq}
R1 N002 N001 {Ro}
C1 N002 N001 {Co}
R6 N005 N001 400k
R5 vout N005 400k
R2 0 N002 {Ro}
C2 N003 N004 {Co}
XU2 N005 N003 NC_03 NC_04 N004 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R3 N002 N004 {Rq}
XU1 N002 N003 NC_01 NC_02 vout level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.ac dec 101 1 500
.param Rq=2.6Meg
.param Ro=10Meg
.param Co=1n
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1464 680
WIRE 144 0 64 0
WIRE 208 0 144 0
WIRE 352 0 272 0
WIRE 512 0 352 0
WIRE 784 0 512 0
WIRE 928 16 848 16
WIRE 992 16 928 16
WIRE 64 32 64 0
WIRE 512 32 512 0
WIRE 784 32 720 32
WIRE 144 112 144 0
WIRE 208 112 144 112
WIRE 352 112 352 0
WIRE 352 112 288 112
WIRE 352 160 352 112
WIRE 512 208 512 112
WIRE 560 208 512 208
WIRE 704 208 624 208
WIRE 720 208 720 32
WIRE 720 208 704 208
WIRE 768 208 720 208
WIRE 928 208 928 16
WIRE 928 208 848 208
WIRE 928 240 928 208
WIRE 352 272 352 240
WIRE 704 304 704 208
WIRE 704 304 608 304
WIRE 512 320 512 208
WIRE 544 320 512 320
WIRE 928 336 928 320
WIRE 928 336 608 336
WIRE 928 368 928 336
WIRE 144 464 144 112
WIRE 928 464 928 448
WIRE 928 464 144 464
SYMBOL res 368 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value {Ro}
SYMBOL Opamps\\UniversalOpamp2 816 16 M180
SYMATTR InstName U1
SYMBOL res 912 224 R0
SYMATTR InstName R5
SYMATTR Value 400k
SYMBOL res 912 352 R0
SYMATTR InstName R6
SYMATTR Value 400k
SYMBOL cap 624 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {Co}
SYMBOL res 864 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value {Rq}
SYMBOL res 496 16 R0
SYMATTR InstName R3
SYMATTR Value {Rq}
SYMBOL cap 272 -16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {Co}
SYMBOL voltage 64 16 R0
WINDOW 123 -19 -54 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 5m
SYMBOL res 304 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {Ro}
SYMBOL Opamps\\UniversalOpamp2 576 320 M0
SYMATTR InstName U2
FLAG 64 112 0
FLAG 352 272 0
FLAG 992 16 vout
TEXT 126 486 Left 2 !.ac dec 101 1 500
TEXT 1040 152 Left 2 !.param Rq=2.6Meg
TEXT 1040 200 Left 2 !.param Ro=10Meg
TEXT 1032 240 Left 2 !.param Co=1n
TEXT 1040 104 Left 2 !;step param Rq 2.2Meg 3Meg .1Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7118-4.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7118-4.5.asy)
C1 OUT 0 2.2 Rser=1.5m
Rload OUT 0 30
V1 IN 0 5.5
C2 N001 0 4.7n
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=4.5 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 6m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL ADP7118-4.5 224 128 R0
SYMATTR InstName U1
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 30
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup