Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1c4485134ae9_1469.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1469.asy)
XU1 N003 N001 +V -V N002 LT1468 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
V2 -V 0 -15
R2 N001 0 1K
V3 N003 0 SINE(0 1 1K)
R1 N002 N001 1K
.tran 3m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -288 144 -288 128
WIRE -160 144 -160 128
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE -288 256 -288 224
WIRE -160 256 -160 224
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL opamps\\LT1469 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -288 128 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -160 128 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
FLAG -160 256 0
FLAG 192 192 +V
FLAG -160 128 +V
FLAG 192 288 -V
FLAG -288 256 0
FLAG -288 128 -V
FLAG 16 96 0
FLAG 0 368 0
TEXT -264 344 Left 0 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\8b1c5cec84d7_Draft12.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 P001 P001 NMOS
R1 P001 0 100
V1 N002 0 3
V2 N001 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V1 0 5 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 -80 256 -80
WIRE 384 -48 384 -80
WIRE 384 96 384 32
WIRE 256 144 256 -80
WIRE 208 224 112 224
WIRE 256 336 256 320
WIRE 112 352 112 304
SYMBOL voltage 112 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL voltage 384 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL nmos 208 144 R0
SYMATTR InstName M1
SYMBOL res 240 224 R0
SYMATTR InstName R1
SYMATTR Value 100
FLAG 112 352 0
FLAG 384 96 0
FLAG 256 336 0
TEXT 576 192 Left 2 !.dc V1 0 5 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\15d831e38f4b_1819.asc
* Generated by LTspice 26.0.1 for Windows.
* 80MHz, 20dB Gain Block
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1819.asy)
V2 -V 0 -5
V3 IN 0 AC 1
XU1 IN N002 N003 +V -V LT1818 ;pnba IN+)IN-)OUT)VCC)VEE
R4 N001 0 200
V1 +V 0 5
R1 N003 N002 432
R3 OUT N001 432
XU2 N003 N001 OUT +V -V LT1818 ;pnba IN+)IN-)OUT)VCC)VEE
R2 N002 0 200
.ac oct 10 100K 100Meg
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 240 32 224 32
WIRE 336 32 320 32
WIRE 352 32 336 32
WIRE 464 32 432 32
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -160 160 -160 128
WIRE -64 160 -64 128
WIRE 400 192 400 176
WIRE 192 208 192 192
WIRE 336 208 336 32
WIRE 368 208 336 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 464 224 464 32
WIRE 464 224 432 224
WIRE 496 224 464 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 368 240 256 240
WIRE 160 256 32 256
WIRE -160 272 -160 240
WIRE -64 272 -64 240
WIRE 32 272 32 256
WIRE 400 272 400 256
WIRE 192 288 192 272
WIRE 32 368 32 352
SYMBOL voltage -160 144 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL opamps\\LT1819 192 240 R0
SYMATTR InstName U1
SYMBOL voltage -64 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 432
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL res 336 16 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R4
SYMATTR Value 200
SYMBOL res 448 16 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 432
SYMBOL voltage 32 256 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL opamps\\LT1819 400 224 R0
SYMATTR InstName U2
FLAG -64 272 0
FLAG 192 192 +V
FLAG -64 128 +V
FLAG 192 288 -V
FLAG -160 272 0
FLAG -160 128 -V
FLAG 16 96 0
FLAG 32 368 0
FLAG 400 176 +V
FLAG 400 272 -V
FLAG 224 32 0
FLAG 496 224 OUT
FLAG 32 256 IN
TEXT 230 346 Left 0 !.ac oct 10 100K 100Meg
TEXT 264 -32 Bottom 0 ;80MHz, 20dB Gain Block
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1701.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1701.asy)
D1 0 N001 1N5817
L1 N001 OUT 4.7
R2 N004 0 121K
R4 N003 N002 5.1K
C2 N002 0 330p
Rload OUT 0 10
XU1 N001 0 N004 N003 IN LTC1701 ;pnba SW)GND)FB)Ith/Run)Vin
R1 OUT N004 121K
C1 OUT 0 47 Rser=.1
V1 IN 0 5
R3 IN N003 1Meg
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran .5m startup
.lib LTC1701.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2596 1504
WIRE 1600 1184 1392 1184
WIRE 1696 1184 1600 1184
WIRE 2032 1184 1984 1184
WIRE 2080 1184 2032 1184
WIRE 2192 1184 2160 1184
WIRE 2304 1184 2192 1184
WIRE 2416 1184 2304 1184
WIRE 1392 1200 1392 1184
WIRE 1600 1200 1600 1184
WIRE 2032 1200 2032 1184
WIRE 2192 1200 2192 1184
WIRE 2416 1200 2416 1184
WIRE 2304 1216 2304 1184
WIRE 2032 1280 2032 1264
WIRE 1392 1296 1392 1280
WIRE 2304 1296 2304 1280
WIRE 2416 1296 2416 1280
WIRE 1504 1312 1472 1312
WIRE 1600 1312 1600 1280
WIRE 1600 1312 1584 1312
WIRE 1696 1312 1600 1312
WIRE 2192 1312 2192 1280
WIRE 2192 1312 1984 1312
WIRE 2192 1328 2192 1312
WIRE 1472 1344 1472 1312
WIRE 1472 1424 1472 1408
WIRE 1840 1424 1840 1392
WIRE 2192 1424 2192 1408
SYMBOL VOLTAGE 1392 1184 R0
WINDOW 3 25 99 Left 2
SYMATTR Value 5
SYMATTR InstName V1
SYMBOL ind 2064 1200 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL res 1600 1296 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 5.1K
SYMBOL res 2400 1184 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL POWERPRODUCTS\\LTC1701 1840 1248 R0
SYMATTR InstName U1
SYMBOL RES 2176 1184 R0
SYMATTR InstName R1
SYMATTR Value 121K
SYMBOL cap 1456 1344 R0
SYMATTR InstName C2
SYMATTR Value 330p
SYMBOL diode 2016 1264 M180
WINDOW 0 27 63 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5817
SYMBOL res 2176 1312 R0
SYMATTR InstName R2
SYMATTR Value 121K
SYMBOL res 1584 1184 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL polcap 2288 1216 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMATTR SpiceLine Rser=.1
FLAG 2032 1280 0
FLAG 2304 1296 0
FLAG 2192 1424 0
FLAG 1840 1424 0
FLAG 1472 1424 0
FLAG 1392 1296 0
FLAG 2416 1296 0
FLAG 2416 1184 OUT
FLAG 1392 1184 IN
TEXT 2072 1480 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP151-2.75.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP151-2.75.asy)
V1 IN 0 5
C1 OUT 0 1
XU1 IN 0 IN MP_01 OUT ADP151-x.x T=1.75Meg ;pnba Vin)GND)EN))Vout
Rload OUT 0 27
.tran 500u startup
.lib ADP151-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 880 1696 880
WIRE 1984 880 1824 880
WIRE 1696 896 1696 880
WIRE 1984 896 1984 880
WIRE 1696 992 1696 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\ADP151-2.75 1984 1024 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1696 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 27
FLAG 2256 1024 OUT
FLAG 2256 1136 0
FLAG 1696 992 0
FLAG 1696 880 IN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17761.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17761.asy)
R1 OUT N005 95.3k
XU1 0 IN EN/UVLO N002 N005 NC_01 N006 N001 N003 N004 Vcc 0 MAX17761 ;pnba GND)VIN)EN/UVLO)EXTVCC)FB)MODE/ILIM)_RESET)LX)SS)RT/SYNC)VCC)PGND
C3 N003 0 10n
C4 N002 0 100n
R5 OUT N002 22
C2 OUT 0 22 Rser=4.6m
L1 N001 OUT 33 Rser=10m
R2 N005 0 18.2k
C1 Vcc 0 1
R3 Vcc N006 10k
R4 N004 0 105k
Rload OUT 0 {5/0.6}
V1 IN 0 24
.tran 4m startup
.lib MAX17761.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1252 680
WIRE -96 -128 -112 -128
WIRE 336 -128 -96 -128
WIRE 336 -112 336 -128
WIRE -112 -48 -112 -128
WIRE 176 -48 144 -48
WIRE 560 -48 496 -48
WIRE 704 -48 640 -48
WIRE 832 -48 704 -48
WIRE 928 -48 832 -48
WIRE 992 -48 928 -48
WIRE 1008 -48 992 -48
WIRE 704 -32 704 -48
WIRE 832 -32 832 -48
WIRE 1008 -32 1008 -48
WIRE 832 48 832 32
WIRE -112 64 -112 32
WIRE 48 64 16 64
WIRE 144 64 112 64
WIRE 176 64 144 64
WIRE 704 64 704 48
WIRE 704 64 496 64
WIRE 1008 64 1008 48
WIRE 704 96 704 64
WIRE 928 112 928 -48
WIRE 48 176 0 176
WIRE 176 176 112 176
WIRE 512 176 496 176
WIRE 704 176 704 160
WIRE 32 288 0 288
WIRE 176 288 112 288
WIRE 928 288 928 192
WIRE 928 288 496 288
WIRE 928 304 928 288
WIRE 560 400 496 400
WIRE 672 400 640 400
WIRE 928 400 928 384
WIRE 336 464 336 448
SYMBOL cap 112 192 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value 10n
SYMBOL res 128 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 105k
SYMBOL cap 112 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -112 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 688 -48 R0
SYMATTR InstName R5
SYMATTR Value 22
SYMBOL ind 544 -32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=10m
SYMBOL cap 816 -32 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMATTR SpiceLine Rser=4.6m
SYMBOL MAX17761 336 160 R0
SYMATTR InstName U1
SYMBOL cap 688 96 R0
SYMATTR InstName C4
SYMATTR Value 100n
SYMBOL res 656 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 912 96 R0
SYMATTR InstName R1
SYMATTR Value 95.3k
SYMBOL res 992 -48 R0
SYMATTR InstName Rload
SYMATTR Value {5/0.6}
SYMBOL res 912 288 R0
SYMATTR InstName R2
SYMATTR Value 18.2k
FLAG -112 64 0
FLAG 0 288 0
FLAG 336 464 0
FLAG 832 48 0
FLAG 1008 64 0
FLAG -96 -128 IN
FLAG 992 -48 OUT
FLAG 0 176 0
FLAG 928 400 0
FLAG 512 176 0
FLAG 16 64 0
FLAG 672 400 Vcc
FLAG 704 176 0
FLAG 144 64 Vcc
FLAG 144 -48 EN/UVLO
TEXT 808 472 Left 2 !.tran 4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8630.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8630.asy)
C5 N003 0 2.2
C2 OUT N007 4.7p
R1 OUT N007 1Meg
XU1 IN MP_01 IN MP_02 0 MP_03 MP_04 N006 MP_05 N005 N007 OUT MP_06 N004 MP_07 N003 MP_08 N001 MP_09 N002 0 LT8630 ;pnba Vin))EN/UV))PG)))Rt))TR/SS)FB)Vout))IND))INTVcc))BST))SW)GND
V1 IN 0 50
L1 N002 N004 22
Rload OUT 0 20
C3 OUT 0 47
C1 N001 N002 .1
C4 N005 0 .005
R2 N007 0 191K
R3 N006 0 8.66K
.tran 2m startup
.lib LT8630.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1192 680
WIRE 16 -32 -112 -32
WIRE 176 -32 16 -32
WIRE -112 -16 -112 -32
WIRE 176 -16 176 -32
WIRE 16 48 16 -32
WIRE 32 48 16 48
WIRE 368 48 320 48
WIRE 368 64 368 48
WIRE -112 80 -112 64
WIRE 32 144 16 144
WIRE 368 144 368 128
WIRE 368 144 320 144
WIRE -64 240 -80 240
WIRE 32 240 0 240
WIRE 368 240 368 224
WIRE 368 240 320 240
WIRE -64 336 -80 336
WIRE 32 336 0 336
WIRE 352 336 320 336
WIRE 448 336 352 336
WIRE 576 336 448 336
WIRE 672 336 576 336
WIRE 352 352 352 336
WIRE 576 352 576 336
WIRE 672 352 672 336
WIRE -64 432 -80 432
WIRE 32 432 16 432
WIRE 352 432 352 416
WIRE 352 432 320 432
WIRE 448 432 448 416
WIRE 448 432 352 432
WIRE 448 448 448 432
WIRE 576 448 576 416
WIRE 672 448 672 432
WIRE 176 512 176 496
WIRE 448 544 448 528
SYMBOL res 32 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 8.66K
SYMBOL cap 560 352 R0
SYMATTR InstName C3
SYMATTR Value 47
SYMBOL PowerProducts\\LT8630 176 240 R0
SYMATTR InstName U1
SYMBOL res 432 320 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL voltage -112 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 50
SYMBOL cap 352 64 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL res 656 336 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL cap 0 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 2.2
SYMBOL res 432 432 R0
SYMATTR InstName R2
SYMATTR Value 191K
SYMBOL ind 352 128 R0
SYMATTR InstName L1
SYMATTR Value 22
SYMBOL cap 336 352 R0
SYMATTR InstName C2
SYMATTR Value 4.7p
SYMBOL cap 0 320 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value .005
FLAG 176 512 0
FLAG -112 80 0
FLAG 448 544 0
FLAG 576 448 0
FLAG -80 432 0
FLAG -80 336 0
FLAG 16 144 0
FLAG -80 240 0
FLAG -112 -32 IN
FLAG 672 336 OUT
FLAG 672 448 0
TEXT 616 528 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3406-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3406-1.5.asy)
V1 IN 0 5
XU1 IN 0 N001 IN OUT LTC3406-x.x top=330K bot=220K ;pnba Run)GND)SW)Vin)Vout
L1 N001 OUT 4.7
Rload OUT 0 10
C1 OUT 0 22
.tran 500u startup
.lib LTC3406-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 700
WIRE 176 64 96 64
WIRE 352 64 176 64
WIRE 96 80 96 64
WIRE 352 80 352 64
WIRE 176 144 176 64
WIRE 208 144 176 144
WIRE 512 144 496 144
WIRE 624 144 592 144
WIRE 672 144 624 144
WIRE 768 144 672 144
WIRE 672 160 672 144
WIRE 768 160 768 144
WIRE 96 176 96 160
WIRE 672 256 672 224
WIRE 768 256 768 240
WIRE 624 304 624 144
WIRE 624 304 496 304
WIRE 352 384 352 368
SYMBOL VOLTAGE 96 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL polcap 656 160 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL RES 752 144 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL PowerProducts\\LTC3406-1.5 352 224 R0
SYMATTR InstName U1
FLAG 96 176 0
FLAG 352 384 0
FLAG 672 256 0
FLAG 768 256 0
FLAG 768 144 OUT
FLAG 96 64 IN
TEXT 568 368 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG774.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 3
V2 N003 0 0
V3 N004 0 PULSE(0 3 0 20n 20n 10u 20u)
R1 N002 0 49.9
C1 N002 0 36p
V5 +V 0 5
XU2 N004 N001 N002 N003 +V 0 0 ADG774 ;pnba IN)SA)D)SB)Vdd)GND)_EN
.tran 100u
* Note:\nOff Isolation is -75 dB at 10MHz\nOnly one channel included\nCharge Injection not included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG774.asy)
.lib ADG774.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1696 -272 -1920 -272
WIRE -1920 -256 -1920 -272
WIRE -1408 -240 -1504 -240
WIRE -1296 -240 -1408 -240
WIRE -1408 -224 -1408 -240
WIRE -1296 -224 -1296 -240
WIRE -1696 -208 -1840 -208
WIRE -1840 -192 -1840 -208
WIRE -1920 -160 -1920 -176
WIRE -1696 -144 -1760 -144
WIRE -1472 -144 -1504 -144
WIRE -1472 -128 -1472 -144
WIRE -1408 -128 -1408 -144
WIRE -1296 -128 -1296 -160
WIRE -1840 -96 -1840 -112
WIRE -1760 -80 -1760 -144
WIRE -1600 -16 -1600 -32
WIRE -1760 32 -1760 0
FLAG -1920 -160 0
FLAG -1840 -96 0
FLAG -1760 32 0
FLAG -1600 -368 +V
FLAG -1408 -128 0
FLAG -1600 -16 0
FLAG -1296 -128 0
FLAG -1472 -128 0
FLAG -2144 -64 0
FLAG -2144 -144 +V
SYMBOL voltage -1920 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL voltage -1840 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage -1760 -96 R0
WINDOW 3 24 136 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 20n 20n 10u 20u)
SYMATTR InstName V3
SYMBOL res -1424 -240 R0
SYMATTR InstName R1
SYMATTR Value 49.9
SYMBOL cap -1312 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -2144 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 5
SYMBOL ADG774 -1600 -192 R0
SYMATTR InstName U2
TEXT -1360 -40 Left 2 !.tran 100u
TEXT -2160 -472 Left 2 ;Note:\nOff Isolation is -75 dB at 10MHz\nOnly one channel included\nCharge Injection not included\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\ISO16750-2_example.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N001 0 4-6-3_12V_StartingProfile ;pnba +)-
XU2 N002 0 4-6-3_24V_StartingProfile ;pnba +)-
.tran 0 20 0 1m
* For documentation see:\n LTspice Models of ISO 7637-2 & ISO 16750-2 Transients\n http://www.linear.com/solutions/7719
* ISO 16750-2 Transients
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ISO16750-2.asy)
.lib ISO16750-2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 904 680
WIRE 128 -64 128 -96
WIRE 544 -64 544 -96
WIRE 128 48 128 16
WIRE 544 48 544 16
FLAG 128 48 0
FLAG 544 48 0
SYMBOL ISO16750-2 128 -64 R0
SYMATTR InstName U1
SYMBOL ISO16750-2 544 -64 R0
SYMATTR InstName U2
SYMATTR SpiceModel 4-6-3_24V_StartingProfile
TEXT 408 144 Left 2 !.tran 0 20 0 1m
TEXT 128 -192 Left 2 ;For documentation see:\n  LTspice Models of ISO 7637-2 & ISO 16750-2 Transients\n  http://www.linear.com/solutions/7719
TEXT 128 -240 Left 4 ;ISO 16750-2 Transients
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4120-1A.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
V2 N002 0 15
R1 GATE N004 5
C1 GATE 0 2n
V3 N003 0 PULSE(0 5 0 2n 2n 998n 2u)
XU1 N001 N003 0 0 N004 N002 ADuM4120xx Glitch=0 Vrun2=4.3 ;pnba Vdd1)Vin)GND1)GND2)Vout)Vdd2
.tran 10u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4120-1A.asy)
.lib ADuM4120xx.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 16 0 16
WIRE 512 16 320 16
WIRE 0 32 0 16
WIRE 512 32 512 16
WIRE 160 48 160 16
WIRE 320 48 320 16
WIRE 0 128 0 112
WIRE 512 128 512 112
WIRE 112 160 -64 160
WIRE 400 160 368 160
WIRE 512 160 480 160
WIRE 544 160 512 160
WIRE 512 176 512 160
WIRE 160 288 160 272
WIRE 320 288 320 272
FLAG 160 288 0
FLAG 320 288 0
FLAG 512 240 0
FLAG 544 160 GATE
FLAG 512 128 0
FLAG 0 128 0
FLAG -144 160 0
SYMBOL voltage 0 16 R0
WINDOW 0 25 25 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 512 16 R0
WINDOW 0 29 30 Left 2
WINDOW 3 31 84 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL res 496 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL cap 496 176 R0
WINDOW 0 35 16 Left 2
WINDOW 3 36 51 Left 2
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL voltage -48 160 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 -74 56 VBottom 2
WINDOW 39 -53 56 VBottom 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 2n 2n 998n 2u)
SYMBOL ADuM4120-1A 240 160 R0
SYMATTR InstName U1
TEXT 400 280 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\5f51150ca504_MSi001_VCO_stuff.asc
* Generated by LTspice 26.0.1 for Windows.
* Loop filter pre-charge connects here?\n(this allows fast charging of cap, bypassing R)
* VCO_VCC connects here
* Charge pump out\n(this is to be filtered by the loop filter)
* This loop filter is based on the PLL reference design given for the ADF4351 \non pg. 25 of its datasheet. This topology is also very close to the one used on\nthe reverse-engineered Mirics TV dongle.
* The charge pump output (phase detector) is probably somwhere around F_ref = 24 MHz.
R2 filter_out filter_input 500
R1 0 N001 360
C1 filter_out 0 2.7nF
I3 0 filter_input PULSE(0 -.001 39.5ns 0 0 1ns 80ns) AC 0
C3 0 filter_input 2.7nF
I1 0 filter_input PULSE(0 .001 0ns 0 0 1ns 42ns) AC 1
C2 N001 filter_input 39nF
.ac dec 1000 1k 0.1G
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1396 812
WIRE -464 128 -560 128
WIRE -464 160 -464 128
WIRE -560 176 -560 128
WIRE -464 272 -464 240
WIRE -304 272 -464 272
WIRE -48 272 -304 272
WIRE 48 272 -48 272
WIRE 176 272 48 272
WIRE 368 272 256 272
WIRE -464 304 -464 272
WIRE -48 304 -48 272
WIRE 48 304 48 272
WIRE 368 336 368 272
WIRE -48 400 -48 368
WIRE -464 416 -464 384
WIRE 368 432 368 400
WIRE -48 496 -48 480
WIRE 48 496 48 368
WIRE 48 496 -48 496
WIRE -48 512 -48 496
LINE Normal -208 384 -64 384 2
LINE Normal -336 512 -208 384 2
LINE Normal 464 272 512 224 2
LINE Normal 400 272 464 272 2
SYMBOL cap 352 336 R0
SYMATTR InstName C1
SYMATTR Value 2.7nF
SYMBOL res 272 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 500
SYMBOL cap 64 368 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value 2.7nF
SYMBOL cap -32 368 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 39nF
SYMBOL res -32 496 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 360
SYMBOL current -464 384 R180
WINDOW 123 -100 40 Left 2
WINDOW 39 0 0 Left 0
WINDOW 0 -76 68 Left 2
WINDOW 3 45 84 Left 2
SYMATTR Value2 AC 0
SYMATTR InstName I3
SYMATTR Value PULSE(0 -.001 39.5ns 0 0 1ns 80ns)
SYMBOL current -464 160 R0
WINDOW 123 45 41 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 -443 55 Left 2
SYMATTR Value2 AC 1
SYMATTR Value PULSE(0 .001 0ns 0 0 1ns 42ns)
SYMATTR InstName I1
FLAG -560 176 0
FLAG -464 416 0
FLAG 368 432 0
FLAG -48 512 0
FLAG -304 272 filter_input
FLAG 368 272 filter_out
TEXT -496 544 Left 2 ;Loop filter pre-charge connects here?\n(this allows fast charging of cap, bypassing R)
TEXT 376 184 Left 2 ;VCO_VCC connects here
TEXT -656 48 Left 2 ;Charge pump out\n(this is to be filtered by the loop filter)
TEXT -720 672 Left 2 !.ac dec 1000 1k 0.1G
TEXT -512 -112 Left 2 ;This loop filter is based on the PLL reference design given for the ADF4351 \non pg. 25 of its datasheet. This topology is also very close to the one used on\nthe reverse-engineered Mirics TV dongle.
TEXT -576 768 Left 2 ;The charge pump output (phase detector) is probably somwhere around F_ref = 24 MHz.
* Z:\home\khalils\Downloads\files\data\raw_asc\14b322586600_vas_stage_pa.asc
* Generated by LTspice 26.0.1 for Windows.
I1 Output_stage V- I
Q1 Output_stage N001 V+ 0 PNP
Q2 0 Input_Stage N001 0 PNP
C1 Output_stage Input_Stage Cdom
R1 V+ N001 R
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 -48 -96 -48
WIRE 256 -48 128 -48
WIRE 416 -48 256 -48
WIRE 256 16 256 -48
WIRE 128 64 128 32
WIRE 192 64 128 64
WIRE 16 112 -96 112
WIRE 64 112 16 112
WIRE 160 160 128 160
WIRE 160 176 160 160
WIRE 16 272 16 112
WIRE 96 272 16 272
WIRE 256 272 256 112
WIRE 256 272 160 272
WIRE 416 272 256 272
WIRE 256 336 256 272
WIRE 256 448 256 416
WIRE 256 448 -96 448
WIRE 416 448 256 448
SYMBOL current 256 336 R0
SYMATTR InstName I1
SYMBOL pnp 64 160 M180
SYMATTR InstName Q2
SYMBOL cap 160 256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value Cdom
SYMBOL pnp 192 112 M180
SYMATTR InstName Q1
SYMBOL res 112 -64 R0
SYMATTR InstName R1
FLAG 160 176 0
FLAG -96 112 Input_Stage
FLAG -96 -48 V+
FLAG 416 272 Output_stage
FLAG -96 448 V-