Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3646-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3646-1.asy)
C1 N002 0 4.7
L1 N003 OUT 3.3 Rser=50m
C2 OUT 0 15 Rser=10m
XU1 0 N004 N002 N002 OUT NC_01 N002 IN N003 N001 N002 0 IN IN 0 LTC3646-1 ;pnba SGND)FB)Ith)Rt)Von)Pgood)Mode/SYNC)PVin)SW)Boost)IntVcc)ExtVcc)Run)SVin)PGND
R2 N004 0 56.2K
V1 IN 0 24
C3 N001 N003 .1
R1 OUT N004 412K
Rload OUT 0 5
.tran 500u startup
.lib LTC3646-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 964 680
WIRE 32 -128 -128 -128
WIRE 208 -128 32 -128
WIRE -128 -112 -128 -128
WIRE 208 -112 208 -128
WIRE 32 -48 32 -128
WIRE 48 -48 32 -48
WIRE -128 -16 -128 -32
WIRE 32 48 32 -48
WIRE 48 48 32 48
WIRE 672 48 368 48
WIRE 48 144 32 144
WIRE 400 144 368 144
WIRE 400 160 400 144
WIRE -48 240 -64 240
WIRE 32 240 16 240
WIRE 48 240 32 240
WIRE 400 240 400 224
WIRE 400 240 368 240
WIRE 448 240 400 240
WIRE 560 240 528 240
WIRE 672 240 672 48
WIRE 672 240 560 240
WIRE 752 240 672 240
WIRE 560 256 560 240
WIRE 752 256 752 240
WIRE 672 272 672 240
WIRE 32 336 32 240
WIRE 48 336 32 336
WIRE 560 336 368 336
WIRE 560 352 560 336
WIRE 672 352 672 336
WIRE 752 352 752 336
WIRE 32 432 32 336
WIRE 48 432 32 432
WIRE 384 432 368 432
WIRE 560 448 560 432
WIRE 160 512 160 496
WIRE 256 512 256 496
WIRE 32 544 32 432
WIRE 384 544 384 432
WIRE 384 544 32 544
SYMBOL voltage -128 -128 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 736 240 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL cap 656 272 R0
SYMATTR InstName C2
SYMATTR Value 15
SYMATTR SpiceLine Rser=10m
SYMBOL cap 384 160 R0
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL PowerProducts\\LTC3646-1 208 192 R0
SYMATTR InstName U1
SYMBOL ind 432 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=50m
SYMBOL cap 16 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL res 544 336 R0
SYMATTR InstName R2
SYMATTR Value 56.2K
SYMBOL res 544 240 R0
SYMATTR InstName R1
SYMATTR Value 412K
FLAG 160 512 0
FLAG 256 512 0
FLAG 32 144 0
FLAG -64 240 0
FLAG -128 -16 0
FLAG 672 352 0
FLAG 752 352 0
FLAG -128 -128 IN
FLAG 752 240 OUT
FLAG 560 448 0
TEXT 712 480 Left 2 !.tran 500u startup
* Z:\tmp\asc_dec_bjh7r6w2\09689b9458cf_TDA8425_spatial_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
Vir Ri 0 3
XUL L- Li Vol opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 0 -96 0
WIRE 160 0 0 0
WIRE 240 16 224 16
WIRE 304 16 240 16
WIRE 160 32 96 32
WIRE 96 128 96 32
WIRE 144 128 96 128
WIRE 240 128 240 16
WIRE 240 128 224 128
WIRE 96 160 96 128
WIRE 96 272 96 240
WIRE 144 272 96 272
WIRE 240 272 224 272
WIRE 96 352 96 272
WIRE 160 352 96 352
WIRE 240 368 240 272
WIRE 0 384 -96 384
WIRE 160 384 0 384
WIRE -96 400 -96 384
WIRE -96 496 -96 480
SYMBOL voltage -96 384 R0
WINDOW 123 24 124 Left 2
WINDOW 39 24 124 Left 2
SYMATTR InstName Vir
SYMATTR Value 3
SYMBOL Opamps\\opamp 192 80 M180
SYMATTR InstName UL
FLAG -96 496 0
FLAG 304 16 Vol
FLAG 0 0 Li
FLAG 96 32 L-
FLAG 96 352 R-
FLAG 0 384 Ri
* Z:\home\khalils\Downloads\files\data\raw_asc\858ef04a1de1_Draft21.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP27.asy)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1116.asy)
;dc V1 0 10 0.01
D1 VOUT N001 D
XU1 CP3V3 VOUT 0 0 0 0 OUT N003 LT1116 ;pnba V+)In+)In-)V-)LATCH)GND)OUT+)OUT-
V4 0 0 3.3
XU2 0 N001 VCC VEE VOUT OP27 ;pnba In+)In-)V+)V-)OUT
VIN N002 0 SINE(0 10 50)
D2 N001 VOUT D
R2 N001 N002 10k
R3 VOUT N001 50k
V2 VCC 0 15
V1 CP3V3 0 3.3
V3 0 VEE 15
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.1
.lib ADI.lib
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 904 680
WIRE 384 -64 384 -112
WIRE 384 -64 368 -64
WIRE 448 -64 448 -112
WIRE 368 0 368 -64
WIRE 448 0 448 -64
WIRE -240 32 -304 32
WIRE -64 32 -144 32
WIRE -144 48 -144 32
WIRE -64 48 -64 32
WIRE 688 64 640 64
WIRE 864 64 864 48
WIRE 864 64 768 64
WIRE 288 80 48 80
WIRE 368 80 368 0
WIRE 384 80 368 80
WIRE 48 96 48 80
WIRE 448 96 448 0
WIRE 528 96 448 96
WIRE 688 96 528 96
WIRE 816 96 768 96
WIRE 384 112 368 112
WIRE 368 144 368 112
WIRE 704 144 704 128
WIRE 720 144 720 128
WIRE 736 144 736 128
WIRE 736 144 720 144
WIRE 704 176 704 144
SYMBOL Comparators\\LT1116 720 16 R0
SYMATTR InstName U1
SYMBOL voltage -304 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 38 43 Left 2
SYMATTR Value 3.3
SYMATTR InstName V1
SYMBOL diode 448 -128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL voltage -144 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL OpAmps\\OP27 416 32 R0
SYMATTR InstName U2
SYMBOL voltage -304 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 3.3
SYMBOL diode 384 -48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL res 384 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 48 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value SINE(0 10 50)
SYMATTR InstName VIN
SYMBOL voltage -144 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 38 43 Left 2
SYMATTR Value 15
SYMATTR InstName V2
SYMBOL res 464 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 50k
FLAG 48 176 0
FLAG -64 48 0
FLAG 528 96 VOUT
FLAG -144 -48 VCC
FLAG 416 64 VCC
FLAG -144 128 VEE
FLAG 416 128 VEE
FLAG 368 144 0
FLAG 640 64 0
FLAG 704 176 0
FLAG -240 32 0
FLAG -304 -48 CP3V3
FLAG 864 48 OUT
FLAG -304 112 CN3V3
FLAG 704 144 CN3V3
FLAG 736 144 0
FLAG 720 32 CP3V3
TEXT -72 264 Left 2 !;dc V1 0 10 0.01
TEXT 136 320 Left 2 !.tran 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\74a15cebb42d_IXFK27N80Q_test.asc
* Generated by LTspice 26.0.1 for Windows.
* 1. Add a "nmos" component to the schematic.\n \n2. Replace the value NMOS with IXFK27N80Q\n on your nmos-transistor in the schematic.\n \n6. Put the model either on the schematic or into a file.\n \nAdd the line \n .include IXFK27N80Q.lib\nif you use a model file. \nI recommend to keep the model file in the same \nfolder as the schematic. This makes a complete\nbackup of a circuit easy.
* Plot Id(M1) to get the current Idrain depending on Vgs and Vds.
M1 N001 N002 0 0 IXFK27N80Q
V1 N002 0 0
V2 N001 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 -0 5 0.01 V1 3.9 4.5 0.2
.include IXFK27N80Q.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1512 988
WIRE -448 272 -448 240
WIRE -448 400 -448 352
WIRE -448 432 -448 400
WIRE -304 240 -448 240
WIRE -256 160 -256 128
WIRE -256 400 -448 400
WIRE -256 400 -256 256
WIRE -32 128 -256 128
WIRE -32 176 -32 128
WIRE -32 400 -256 400
WIRE -32 400 -32 256
SYMBOL voltage -448 256 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL nmos -304 160 R0
SYMATTR InstName M1
SYMATTR Value IXFK27N80Q
SYMBOL voltage -32 160 R0
SYMATTR InstName V2
SYMATTR Value 5
FLAG -448 432 0
TEXT -448 16 Left 0 !.dc V2 -0 5 0.01 V1 3.9 4.5 0.2
TEXT -472 488 Left 0 ;1. Add a "nmos" component to the schematic.\n \n2. Replace the value NMOS with IXFK27N80Q\n    on your nmos-transistor in the schematic.\n \n6. Put the model either  on the schematic or into a file.\n \nAdd the line  \n    .include IXFK27N80Q.lib\nif you use a model file. \nI recommend to keep the model file in the same \nfolder as the schematic. This makes a complete\nbackup of a circuit easy.
TEXT -448 64 Left 0 !.include IXFK27N80Q.lib
TEXT -456 -48 Left 0 ;Plot Id(M1) to get the current Idrain depending on Vgs and Vds.
* Z:\home\khalils\Downloads\files\data\raw_asc\000640553d14_gm_sweep.asc
* Generated by LTspice 26.0.1 for Windows.
* .AC LIST 1K
* Plot Id(M1) or I(V2) to get "gm" at 1KHz.
* Plot transfer_function to get "gm" at DC.
* Plot Id(M1). This is not gm!
* Sweeping transconductance "gm" versus a control voltage.
* Gerneral hint for plots:\nMake the plot window active. \n"PlotSettings->Add Trace" and select an item\nor "right mouse button ->Add Trace" and select an item.
V1 N001 0 {bias} AC 1
V2 N001 N002 0
M1 0 0 N002 N002 BSS84
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.step param bias 0 3 0.01
.OP
.TF I(V2) V1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 288 96 240
WIRE 96 112 -96 112
WIRE 96 384 96 448
WIRE 96 448 16 448
WIRE -96 288 -96 112
WIRE -96 368 -96 448
WIRE 48 304 16 304
WIRE 16 304 16 448
WIRE 16 448 -96 448
WIRE -96 480 -96 448
WIRE 96 160 96 112
SYMBOL voltage 96 144 R0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage -96 272 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {bias}
SYMATTR Value2 AC 1
SYMBOL pmos 48 384 M180
SYMATTR InstName M1
SYMATTR Value BSS84
FLAG -96 480 0
TEXT -112 -216 Left 0 !.step param bias 0 3 0.01
TEXT -112 -160 Left 0 !.OP
TEXT -112 -120 Left 0 !.TF I(V2) V1
TEXT -112 -80 Left 0 ;.AC LIST 1K
TEXT 56 -80 Left 0 ;Plot Id(M1) or I(V2) to get "gm" at 1KHz.
TEXT 56 -120 Left 0 ;Plot transfer_function to get "gm" at DC.
TEXT 56 -160 Left 0 ;Plot Id(M1). This is not gm!
TEXT -112 -272 Left 0 ;Sweeping transconductance "gm" versus a control voltage.
TEXT -104 -16 Left 0 ;Gerneral hint for plots:\nMake the plot window active. \n"PlotSettings->Add Trace" and select an item\nor "right mouse button  ->Add Trace" and select an item.
* Z:\home\khalils\Downloads\files\data\raw_asc\AD4007.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\AD4007.asy)
R1 N004 N003 10
R2 N006 N007 10
V2 N007 0 PWL(0 5 100u 0)
XU1 N001 N002 N004 MP_01 0 N006 N005 N008 AD4007 EN_Hi_Z=1 ;pnba REF)Vdd)IN+))GND)IN-)Vout)CNV
C1 0 N005 10p
V1 N003 0 PWL(0 0 100u 5)
V6 N002 0 1.8
V4 N008 0 PULSE(0 1.8 227n 0.1n 0.1n 40n 1u)
V3 N001 0 5
.tran 110u
.lib AD4007.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1252
WIRE 704 224 368 224
WIRE 832 224 784 224
WIRE 368 288 368 224
WIRE 704 336 496 336
WIRE 832 336 784 336
WIRE -208 368 -240 368
WIRE -80 368 -128 368
WIRE 80 368 0 368
WIRE 80 416 80 368
WIRE 144 416 80 416
WIRE 560 432 496 432
WIRE 688 432 624 432
WIRE 144 448 80 448
WIRE -208 496 -240 496
WIRE -80 496 -128 496
WIRE 80 496 80 448
WIRE 80 496 0 496
WIRE 704 528 496 528
WIRE 832 528 784 528
WIRE 368 608 368 576
SYMBOL voltage 688 336 M90
WINDOW 0 47 41 VRight 2
WINDOW 3 -44 39 VRight 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V6
SYMATTR Value 1.8
SYMBOL cap 624 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage -112 496 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 5 100u 0)
SYMBOL AD4007 400 432 R0
SYMATTR InstName U1
SYMBOL voltage 688 528 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 1.8 227n 0.1n 0.1n 40n 1u)
SYMBOL voltage 688 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 16 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL res 16 480 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL voltage -112 368 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 100u 5)
FLAG 368 608 0
FLAG 832 336 0
FLAG -240 368 0
FLAG 688 432 0
FLAG 832 528 0
FLAG 832 224 0
FLAG -240 496 0
TEXT 176 616 Left 2 !.tran 110u
* Z:\tmp\asc_dec_bjh7r6w2\0185532f378f_Fig18_19_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
VDD VDD 0 1
M1 N002 Vinm N004 0 N_50n l=50n w=500n
M7 Vout N003 0 0 N_50n l=50n w=500n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1496 680
WIRE 224 -544 224 -560
WIRE 224 -528 224 -544
WIRE 224 -416 224 -448
WIRE 304 -400 304 -416
WIRE 576 -544 576 -592
WIRE 576 -432 576 -448
WIRE 576 -416 576 -432
WIRE 576 -288 576 -320
WIRE 688 -464 624 -464
WIRE 688 -432 576 -432
WIRE 688 -432 688 -464
WIRE 688 -192 688 -432
WIRE 752 -288 576 -288
WIRE 880 -464 688 -464
WIRE 1136 -432 928 -432
WIRE 1136 -432 1136 -480
WIRE 1136 -320 1136 -432
WIRE 1184 -560 1184 -608
WIRE 1184 -432 1184 -464
WIRE 1184 -400 1184 -432
WIRE 1184 -256 1184 -304
WIRE 1232 -432 1184 -432
WIRE 1392 -432 1232 -432
SYMBOL voltage 224 -544 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL nmos4 528 -416 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 1136 -400 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M7
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
FLAG 576 -368 0
FLAG 224 -416 0
FLAG 224 -544 VDD
FLAG 576 -496 VDD
FLAG 576 -592 VDD
FLAG 304 -416 Vinm
FLAG 528 -336 Vinm
FLAG 976 -336 Vinp
FLAG 1184 -512 VDD
FLAG 1184 -352 0
FLAG 1184 -256 0
FLAG 1232 -432 Vout
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4414.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4414.asy)
MQ1 N001 N003 N002 N002 FDR840P
R1 N002 0 2
XU1 N001 0 0 N004 N002 N003 LTC4414 ;pnba Vin)CTL)GND)STAT)Sense)Gate
C1 N002 0 4.7
V1 N001 0 5
R2 N004 N005 470K
V2 N005 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m startup
.lib LTC4414.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 0 -16 0
WIRE 384 0 352 0
WIRE 448 0 384 0
WIRE 544 0 448 0
WIRE 448 16 448 0
WIRE 544 16 544 0
WIRE -16 112 -16 0
WIRE -16 112 -128 112
WIRE 16 112 -16 112
WIRE 384 112 384 0
WIRE 384 112 272 112
WIRE 448 112 448 80
WIRE 544 112 544 96
WIRE -128 128 -128 112
WIRE 16 192 -16 192
WIRE 336 192 336 48
WIRE 336 192 272 192
WIRE -128 224 -128 208
WIRE 16 272 -16 272
WIRE 288 272 272 272
WIRE 416 272 368 272
WIRE 416 288 416 272
WIRE 416 384 416 368
SYMBOL cap 432 16 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL voltage 416 272 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 272 288 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 470K
SYMBOL res 528 0 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL pmos 256 48 R270
WINDOW 0 52 48 VTop 2
WINDOW 3 -14 72 VLeft 2
SYMATTR InstName Q1
SYMATTR Value FDR840P
SYMBOL voltage -128 112 R0
WINDOW 0 17 15 Left 2
WINDOW 3 21 97 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL LTC4414 144 192 R0
SYMATTR InstName U1
FLAG -16 192 0
FLAG -128 224 0
FLAG -16 272 0
FLAG 448 112 0
FLAG 544 112 0
FLAG 416 384 0
TEXT 40 336 Left 2 !.tran 100m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\167e010e522e_Transformer2.asc
* Generated by LTspice 26.0.1 for Windows.
R2 VPRI VIN .01
K1 L1 L2 1
L2 0 VSEC .0005
V1 VIN 0 SINE(0 110 60)
D1 VSEC VOUT 1N914
L1 VPRI 0 .03
R1 VOUT 0 1000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 .1 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 48 -112 48
WIRE 128 48 48 48
WIRE 208 48 128 48
WIRE 352 48 272 48
WIRE 384 48 352 48
WIRE 528 48 448 48
WIRE -112 80 -112 48
WIRE 208 80 208 48
WIRE 272 80 272 48
WIRE 528 80 528 48
WIRE -112 208 -112 160
WIRE 112 208 -112 208
WIRE 208 208 208 160
WIRE 208 208 112 208
WIRE 272 208 272 160
WIRE 528 208 528 160
WIRE 528 208 272 208
WIRE 112 224 112 208
WIRE 528 224 528 208
SYMBOL diode 384 64 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL voltage -112 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 110 60)
SYMBOL ind2 192 64 R0
WINDOW 0 -27 28 Left 0
WINDOW 3 -37 62 Left 0
SYMATTR InstName L1
SYMATTR Value .03
SYMATTR Type ind
SYMBOL res 512 64 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL ind2 288 176 R180
WINDOW 0 -31 81 Left 0
WINDOW 3 -47 49 Left 0
SYMATTR InstName L2
SYMATTR Value .0005
SYMATTR Type ind
SYMBOL res 64 32 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value .01
FLAG 528 48 VOUT
FLAG -112 48 VIN
FLAG 528 224 0
FLAG 112 224 0
FLAG 352 48 VSEC
FLAG 128 48 VPRI
TEXT -192 232 Left 0 !.tran 0 .1 0
TEXT 176 24 Left 0 !K1 L1 L2 1
* Z:\home\khalils\Downloads\files\data\raw_asc\0340e79a2bdb_SOURCES.asc
* Generated by LTspice 26.0.1 for Windows.
* Logic 0: 0V\nLogic 1: 5V
* 2-Bits: How many unique numbers can you form?\n00\n01\n10\n11
V4 N4 0 PULSE(0 5 0 1n 1n 1m 2m)
V1 N001 0 0
V3 N3 0 PULSE(0 5 0 1n 1n 0.5m 1m)
V2 N002 0 5
.tran 4m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 576 -32 576 -48
WIRE 112 16 112 -48
WIRE 368 16 368 -48
WIRE 576 16 576 -32
WIRE 112 144 112 96
WIRE 720 144 720 128
WIRE 720 176 720 144
SYMBOL voltage 720 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 5 0 1n 1n 1m 2m)
SYMBOL voltage 112 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL voltage 368 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 576 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 1n 1n 0.5m 1m)
FLAG 112 144 0
FLAG 368 96 0
FLAG 576 96 0
FLAG 720 256 0
FLAG 576 -32 N3
FLAG 720 144 N4
TEXT -48 -152 Left 2 ;Logic 0: 0V\nLogic 1: 5V
TEXT 216 -144 Left 2 ;2-Bits: How many unique numbers can you form?\n00\n01\n10\n11
TEXT -50 280 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADL5304.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADL5304.asy)
I1 N002 N005 {Ipd}
R1 VLOG 0 10k
C1 0 N001 0.1
Rmntr 1P5V N002 50
C2 N007 0 0.1
XU1 1P5V 1P5V N005 N006 N006 1P5V 1P5V N007 N007 0 0 0 NC_01 NC_02 N004 VLOG VLOG N004 1P5V 1P5V N001 N002 N003 N003 ADL5304 ;pnba VSM1)VSM2)INUM)IDEN)IREF)VSM3)VSM4)VDEN)INDN)COMM)VNEG)ACOM)2VLT)SCL3)SCL2)SCL1)VLOG)INMS)INPS)1P5V)VPOS)IMON)INNM)VNUM
V1 N001 0 5
.step dec param Ipd 1p 10m 10
.op
.lib ADL5304.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 -336 384 -336
WIRE 416 -320 416 -336
WIRE 384 -288 384 -336
WIRE 384 -160 384 -208
WIRE 416 -160 384 -160
WIRE 496 -160 480 -160
WIRE 64 -144 -288 -144
WIRE 192 -144 128 -144
WIRE 496 -144 496 -160
WIRE 64 -112 64 -144
WIRE 128 -112 128 -144
WIRE 192 -112 192 -144
WIRE 256 -112 256 -144
WIRE 384 -112 384 -160
WIRE -288 -16 -288 -144
WIRE -192 -16 -288 -16
WIRE -64 -16 -112 -16
WIRE -16 -16 -64 -16
WIRE 16 -16 -16 -16
WIRE 464 -16 432 -16
WIRE -288 16 -288 -16
WIRE -16 48 -16 -16
WIRE 16 48 -16 48
WIRE 496 48 432 48
WIRE -288 112 -288 96
WIRE 16 112 -288 112
WIRE 464 112 432 112
WIRE 576 112 464 112
WIRE 576 144 576 112
WIRE 16 176 -16 176
WIRE 464 176 464 112
WIRE 464 176 432 176
WIRE -16 240 -16 176
WIRE 16 240 -16 240
WIRE 496 240 496 48
WIRE 496 240 432 240
WIRE 576 256 576 224
WIRE -16 304 -48 304
WIRE 16 304 -16 304
WIRE -16 368 -16 304
WIRE 16 368 -16 368
WIRE 96 496 96 464
WIRE 160 496 160 464
WIRE 160 496 96 496
WIRE 224 496 224 464
WIRE 288 496 288 464
WIRE 288 496 224 496
WIRE 352 496 352 464
WIRE 352 496 288 496
WIRE 96 512 96 496
WIRE 288 512 288 496
WIRE 96 592 96 576
SYMBOL cap 80 512 R0
SYMATTR InstName C2
SYMATTR Value 0.1u
SYMBOL res -96 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rmntr
SYMATTR Value 50
SYMBOL voltage 384 -192 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL current -288 16 R0
WINDOW 0 35 5 Left 2
WINDOW 3 40 39 Left 2
WINDOW 123 39 73 Left 2
SYMATTR InstName I1
SYMATTR Value {Ipd}
SYMBOL ADL5304 224 176 R0
SYMATTR InstName U1
SYMBOL cap 480 -176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.1u
SYMBOL res 560 128 R0
SYMATTR InstName R1
SYMATTR Value 10k
FLAG 416 -320 0
FLAG 496 -144 0
FLAG 464 -16 1P5V
FLAG 288 512 0
FLAG 96 592 0
FLAG -48 304 1P5V
FLAG 256 -144 1P5V
FLAG -64 -16 1P5V
FLAG 576 112 VLOG
FLAG 576 256 0
TEXT -360 144 Left 2 !.step dec param Ipd 1p 10m 10
TEXT -360 616 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\4fefb14d2bcc_1126.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain 1000 Amplifier with 0.01% Accuracy, DC to 5Hz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1126.asy)
V2 -V 0 -15
V1 +V 0 15
XU1 IN N001 +V -V OUT LT1126 ;pnba In+)In-)V+)V-)OUT
R2 N001 0 365
V3 IN 0 ac 1
R1 OUT N001 364.76K
.ac oct 10 1m 1Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -208 112 -208 96
WIRE -112 112 -112 96
WIRE 192 208 192 192
WIRE -208 224 -208 192
WIRE -112 224 -112 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 288 240 256 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 364.76K
SYMBOL opamps\\LT1126 192 176 R0
SYMATTR InstName U1
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL voltage -208 96 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL voltage -112 96 R0
SYMATTR InstName V1
SYMATTR Value 15
FLAG -112 224 0
FLAG 192 192 +V
FLAG -112 96 +V
FLAG 192 288 -V
FLAG -208 224 0
FLAG -208 96 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 288 240 OUT
FLAG 0 256 IN
TEXT 158 362 Left 0 !.ac oct 10 1m 1Meg
TEXT 96 40 Bottom 0 ;Gain 1000 Amplifier with 0.01% Accuracy, DC to 5Hz
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3060-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3060-3.asy)
XU1 N002 N001 OUT MP_01 IN MP_02 IN 0 LT3060-3 ;pnba Ref/Byp)ADJ)OUT))IN))_SHDN)GND
V1 IN 0 12
Rload OUT 0 30
C3 OUT 0 10
C2 OUT N001 10n
C1 N002 0 10n
.tran .1 startup
.lib LT3060-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 112 -16 112
WIRE 96 112 0 112
WIRE 112 112 96 112
WIRE 432 112 368 112
WIRE 544 112 432 112
WIRE 624 112 544 112
WIRE -16 128 -16 112
WIRE 544 128 544 112
WIRE 624 128 624 112
WIRE 432 144 432 112
WIRE -16 224 -16 208
WIRE 96 224 96 112
WIRE 112 224 96 224
WIRE 432 224 432 208
WIRE 432 224 368 224
WIRE 544 224 544 192
WIRE 624 224 624 208
WIRE 112 336 80 336
WIRE 400 336 368 336
WIRE 400 352 400 336
WIRE 400 432 400 416
SYMBOL cap 384 352 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 608 112 R0
SYMATTR InstName Rload
SYMATTR Value 30
SYMBOL cap 528 128 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL voltage -16 112 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 416 144 R0
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL PowerProducts\\LT3060-3 240 224 R0
SYMATTR InstName U1
FLAG 80 336 0
FLAG -16 224 0
FLAG 400 432 0
FLAG 544 224 0
FLAG 624 224 0
FLAG 624 112 OUT
FLAG 0 112 IN
TEXT 480 320 Left 2 !.tran .1 startup