Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\9ded349559a1_MOSFET_-_II.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 0.9
M1 N002 N001 0 0 nmos-45n l=45n w=90n
V1 N002 0 1.8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include 45nm_HP.txt
.dc V1 0 1.8 0.01 V2 0 1.8 0.3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 96 16 96
WIRE 320 96 176 96
WIRE 16 112 16 96
WIRE 320 112 320 96
WIRE 192 144 176 144
WIRE 128 176 128 96
WIRE 192 192 192 144
WIRE 192 192 176 192
WIRE 16 208 16 192
WIRE 176 208 176 192
WIRE 320 208 320 192
SYMBOL voltage 16 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 0.9
SYMBOL voltage 320 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 1.8
SYMBOL nmos4 128 96 R0
WINDOW 3 69 51 Left 2
WINDOW 123 66 65 Left 2
SYMATTR Value nmos-45n
SYMATTR Value2 l=45n w=90n
SYMATTR InstName M1
FLAG 16 208 0
FLAG 176 208 0
FLAG 320 208 0
TEXT 112 256 Left 2 !.include 45nm_HP.txt
TEXT 104 240 Left 2 !.dc V1 0 1.8 0.01 V2 0 1.8 0.3
* Z:\home\khalils\Downloads\files\data\raw_asc\2618ed7de3e0_thermistor_sim.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R5 0 t 10000
R2 N001 0 200000
XU2 t N001 3.3V 0 out level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R1 N001 out 100000
V1 3.3V 0 3.3
R6 3.3V t {RT}
.op
.step param RT 1400 217300 1000
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1836 680
WIRE 576 16 336 16
WIRE 976 16 576 16
WIRE 1088 64 912 64
WIRE 576 80 576 16
WIRE 1088 80 1088 64
WIRE 912 112 912 64
WIRE 912 112 752 112
WIRE 976 144 976 16
WIRE 336 160 336 16
WIRE 912 160 912 112
WIRE 944 160 912 160
WIRE 1088 176 1088 160
WIRE 1088 176 1008 176
WIRE 1104 176 1088 176
WIRE 944 192 848 192
WIRE 576 208 576 160
WIRE 624 208 576 208
WIRE 576 256 576 208
WIRE 752 272 752 112
WIRE 336 432 336 240
WIRE 576 432 576 336
WIRE 576 432 336 432
WIRE 752 432 752 352
WIRE 752 432 576 432
WIRE 976 432 976 208
WIRE 976 432 752 432
WIRE 576 464 576 432
SYMBOL res 560 64 R0
SYMATTR InstName R6
SYMATTR Value {RT}
SYMBOL OpAmps\\UniversalOpAmp2 976 176 R0
SYMATTR InstName U2
SYMBOL res 592 352 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 10000
SYMBOL voltage 336 144 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 736 256 R0
SYMATTR InstName R2
SYMATTR Value 200000
SYMBOL res 1072 64 R0
SYMATTR InstName R1
SYMATTR Value 100000
FLAG 576 464 0
FLAG 576 16 3.3V
FLAG 624 208 t
FLAG 1104 176 out
FLAG 848 192 t
TEXT 0 328 Left 2 !.op
TEXT 1408 0 Left 2 !.step param RT 1400 217300 1000
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6012.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6012.asy)
R2 N001 0 1K
V3 N003 0 SINE(0 1 1K)
V1 +V 0 10
V2 -V 0 -10
XU1 N003 N001 N002 +V -V LT6011 ;pnba IN+)IN-)OUT)VCC)VEE
R1 N002 N001 1K
.tran 3m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -112 48 -128 48
WIRE 0 48 -32 48
WIRE 96 48 0 48
WIRE 208 48 176 48
WIRE 64 112 64 96
WIRE -416 160 -416 144
WIRE -288 160 -288 144
WIRE 0 160 0 48
WIRE 32 160 0 160
WIRE 208 192 208 48
WIRE 208 192 176 192
WIRE 32 224 -128 224
WIRE -128 240 -128 224
WIRE -416 256 -416 240
WIRE -288 256 -288 240
WIRE 64 288 64 272
WIRE -128 336 -128 320
SYMBOL res -16 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL opamps\\LT6012 64 192 R0
SYMATTR InstName U1
SYMBOL voltage -128 224 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL voltage -416 144 R0
SYMATTR InstName V2
SYMATTR Value -10
SYMBOL res 192 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG -288 256 0
FLAG 64 96 +V
FLAG -288 144 +V
FLAG 64 288 -V
FLAG -416 256 0
FLAG -416 144 -V
FLAG -128 48 0
FLAG -128 336 0
TEXT 136 336 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT5401.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\LT5401.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6363.asy)
XU1 N003 N001 NC_02 NC_03 N002 N005 NC_04 NC_05 N006 0 NC_06 LT5401 ;pnba IN1)OUT1)T1C)T1B)T1A)T2A)T2B)T2C)OUT2)IN2)PAD
C1 N004 0 .1
V1 +V 0 10
V2 N003 0 SINE(0 1 250K)
XU2 N002 N004 +V N001 N006 0 NC_01 N005 LTC6363 ;pnba IN-)VOCM)V+)OUT+)OUT-)V-)SHDN)IN+
.tran 100u
.lib LT5400.lib
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1696
WIRE 1872 624 1520 624
WIRE 928 688 928 672
WIRE 928 784 928 768
WIRE 1664 800 1552 800
WIRE 1136 816 1120 816
WIRE 1360 816 1216 816
WIRE 1552 816 1552 800
WIRE 1552 816 1520 816
WIRE 1664 816 1664 800
WIRE 1680 816 1664 816
WIRE 1872 816 1872 624
WIRE 1872 816 1840 816
WIRE 1584 848 1568 848
WIRE 1680 848 1648 848
WIRE 1360 880 1344 880
WIRE 1552 880 1520 880
WIRE 1680 880 1664 880
WIRE 1872 880 1840 880
WIRE 1552 896 1552 880
WIRE 1664 896 1664 880
WIRE 1664 896 1552 896
WIRE 1872 1072 1872 880
WIRE 1872 1072 1520 1072
SYMBOL voltage 1232 816 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value SINE(0 1 250K)
SYMBOL voltage 928 672 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL cap 1648 832 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL misc\\LT5401 1440 848 R0
SYMATTR InstName U1
SYMBOL opamps\\LTC6363 1744 848 R0
SYMATTR InstName U2
FLAG 928 784 0
FLAG 928 672 +V
FLAG 1712 928 0
FLAG 1712 768 +V
FLAG 1568 848 0
FLAG 1120 816 0
FLAG 1344 880 0
TEXT 1704 1120 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\137c318942d5_meros_4o_C_.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 UC1 N001 N003 0 2N3904
Q2 UC2 N002 N003 0 2N3904
RC2 VCC UC2 1k
RC1 VCC UC1 1k
VUB2 N002 0 0
V1 VCC 0 10
I1 N003 -VCC 2m
Vub1 N001 0 AC 1
V2 0 -vcc 10
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
* .step param R list 100 500 1k 2k 5k 10k
.dc UB1 -0.25 0.25 0.01
.step temp 0 120 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1044 680
WIRE -160 -304 -160 -352
WIRE 96 -304 96 -352
WIRE -160 -192 -160 -224
WIRE -160 -192 -224 -192
WIRE 96 -192 96 -224
WIRE 160 -192 96 -192
WIRE -160 -112 -160 -192
WIRE 96 -112 96 -192
WIRE 800 -112 800 -160
WIRE 1008 -112 1008 -160
WIRE -224 -64 -448 -64
WIRE 384 -64 160 -64
WIRE -448 0 -448 -64
WIRE 384 0 384 -64
WIRE 800 48 800 -32
WIRE 1008 48 1008 -32
WIRE -448 160 -448 80
WIRE -160 160 -160 -16
WIRE -32 160 -160 160
WIRE 96 160 96 -16
WIRE 96 160 -32 160
WIRE 384 160 384 80
WIRE -32 192 -32 160
WIRE -32 288 -32 272
FLAG 800 48 0
FLAG 800 -160 VCC
FLAG 96 -352 VCC
FLAG -160 -352 VCC
FLAG -160 -192 UC1
FLAG 96 -192 UC2
FLAG -32 288 -VCC
FLAG 1008 -160 -vcc
FLAG 1008 48 0
FLAG 384 160 0
FLAG -448 160 0
SYMBOL npn -224 -112 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL npn 160 -112 M0
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL res 80 -320 R0
SYMATTR InstName RC2
SYMATTR Value 1k
SYMBOL res -176 -320 R0
SYMATTR InstName RC1
SYMATTR Value 1k
SYMBOL voltage 384 -16 R0
SYMATTR InstName UB2
SYMATTR Value 0
SYMBOL voltage 800 -128 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL current -32 192 R0
SYMATTR InstName I1
SYMATTR Value 2m
SYMBOL voltage -448 -16 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMATTR InstName ub1
SYMBOL voltage 1008 -16 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 10
TEXT -472 392 Left 2 ;.step param R list 100 500 1k 2k 5k 10k
TEXT -512 416 Left 2 !.dc UB1 -0.25 0.25 0.01
TEXT -512 464 Left 2 !.step temp 0 120 10
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3642.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3642.asy)
Rload OUT 0 100
V1 IN 0 45
XU1 N001 IN NC_01 NC_02 IN N002 NC_03 0 LTC3642 ;pnba SW)Vin)Iset)SS)Run)FB)Hyst)GND
L1 N001 OUT 150
R1 OUT N002 4.2Meg
C1 OUT 0 10
R2 N002 0 800K
.tran 2.5m startup
.lib LTC3642.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 80 0 80
WIRE 112 80 96 80
WIRE 352 80 336 80
WIRE 448 80 432 80
WIRE 576 80 448 80
WIRE 656 80 576 80
WIRE 0 96 0 80
WIRE 576 96 576 80
WIRE 656 96 656 80
WIRE 96 176 96 80
WIRE 112 176 96 176
WIRE 448 176 448 160
WIRE 448 176 336 176
WIRE 0 192 0 176
WIRE 448 192 448 176
WIRE 576 192 576 160
WIRE 656 192 656 176
WIRE 448 288 448 272
WIRE 352 368 336 368
SYMBOL PowerProducts\\LTC3642 224 224 R0
SYMATTR InstName U1
SYMBOL res 432 64 R0
SYMATTR InstName R1
SYMATTR Value 4.2Meg
SYMBOL cap 560 96 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ind 336 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMBOL voltage 0 80 R0
SYMATTR InstName V1
SYMATTR Value 45
SYMBOL res 640 80 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL res 432 176 R0
SYMATTR InstName R2
SYMATTR Value 800K
FLAG 0 192 0
FLAG 352 368 0
FLAG 448 288 0
FLAG 576 192 0
FLAG 656 192 0
FLAG 0 80 IN
FLAG 656 80 OUT
TEXT 448 360 Left 2 !.tran 2.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8646SA.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8646SA.asy)
C1 N003 0 1n
C4 OUT 0 100 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
Rload OUT 0 0.625
V1 IN 0 12
L1 N002 OUT 2.2 Rser=10m
C5 OUT N004 2.2p
R2 OUT N004 1Meg
C2 N006 0 330p
R3 N004 0 243K
R1 N001 0 41.2K
R4 N005 N006 7.5K
XU1 OUT NC_01 NC_02 IN IN 0 IN N002 N001 0 N003 0 NC_03 N004 0 NC_04 N005 LT8646SA ;pnba BIAS)INTVCC)BST)VIN1)VIN2)GND1)EN/UV)SW)RT)GND2)TR/SS)SYNC/MODE)PG)FB)GND)CLKOUT)VC
.tran 1m startup
.lib LT8646SA.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1848 808
WIRE 16 -96 -16 -96
WIRE 80 -96 16 -96
WIRE 208 -96 80 -96
WIRE 416 -96 208 -96
WIRE -16 -64 -16 -96
WIRE 208 -64 208 -96
WIRE 80 0 80 -96
WIRE 112 0 80 0
WIRE 416 0 416 -96
WIRE 416 0 400 0
WIRE -16 32 -16 16
WIRE 112 96 96 96
WIRE 416 96 400 96
WIRE 544 192 400 192
WIRE 112 288 96 288
WIRE 0 384 -16 384
WIRE 112 384 80 384
WIRE 432 384 400 384
WIRE 544 384 544 192
WIRE 544 384 512 384
WIRE 656 384 544 384
WIRE 752 384 656 384
WIRE 816 384 752 384
WIRE 864 384 816 384
WIRE 544 400 544 384
WIRE 656 400 656 384
WIRE 752 400 752 384
WIRE 864 400 864 384
WIRE 16 480 -16 480
WIRE 112 480 80 480
WIRE 544 480 400 480
WIRE 656 480 656 464
WIRE 656 480 544 480
WIRE 544 496 544 480
WIRE 752 496 752 464
WIRE 864 496 864 480
WIRE 336 560 336 544
WIRE 256 576 256 544
WIRE 544 592 544 576
WIRE 336 656 336 640
WIRE 336 736 336 720
SYMBOL cap 80 496 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 848 384 R0
SYMATTR InstName Rload
SYMATTR Value 0.625
SYMBOL res 96 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 41.2K
SYMBOL res 528 480 R0
SYMATTR InstName R3
SYMATTR Value 243K
SYMBOL cap 320 656 R0
SYMATTR Value 330p
SYMATTR InstName C2
SYMBOL LT8646SA 256 240 R0
SYMATTR InstName U1
SYMBOL res 528 384 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL voltage -16 -80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ind 416 400 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=10m
SYMBOL cap 640 400 R0
SYMATTR InstName C5
SYMATTR Value 2.2p
SYMBOL cap 736 400 R0
SYMATTR InstName C4
SYMATTR Value 100
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL res 320 544 R0
SYMATTR InstName R4
SYMATTR Value 7.5K
FLAG 256 576 0
FLAG -16 384 0
FLAG -16 32 0
FLAG 752 496 0
FLAG 544 592 0
FLAG 864 496 0
FLAG 816 384 OUT
FLAG 16 -96 IN
FLAG 96 96 0
FLAG 416 96 0
FLAG -16 480 0
FLAG 96 288 0
FLAG 336 736 0
TEXT 488 744 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\06c3a1ae4e78_1716.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1716.asy)
XU1 N003 N001 +V 0 N002 LT1716 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
V2 N003 0 1
V3 N001 0 PULSE(0 2 0 .5m .5m 0 1m)
.tran 3m
.lib LT1716.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 800
WIRE 208 256 208 224
WIRE 176 272 -320 272
WIRE -320 288 -320 272
WIRE 336 288 240 288
WIRE -448 304 -448 288
WIRE 176 304 64 304
WIRE 64 320 64 304
WIRE 208 336 208 320
WIRE -448 400 -448 384
WIRE -320 400 -320 368
WIRE 64 416 64 400
SYMBOL voltage -448 288 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL Comparators\\LT1716 208 288 R0
SYMATTR InstName U1
SYMBOL voltage 64 304 R0
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL voltage -320 272 R0
WINDOW 3 17 101 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 2 0 .5m .5m 0 1m)
SYMATTR InstName V3
FLAG -448 400 0
FLAG -448 288 +V
FLAG 208 224 +V
FLAG -320 400 0
FLAG 64 416 0
FLAG 208 336 0
TEXT 168 416 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADR4550.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4000-1.asy)
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR4550.asy)
V3 -V 0 -15
XU1 IN 0 OUT_+5V ADR4550 ;pnba IN)GND)OUT
R1 OUT_+5V N001 10k
XU2 N002 N001 +V -V OUT_-5V ADA4000 ;pnba In+)In-)V+)V-)OUT
R3 N002 0 10k
C1 OUT_+5V 0 1
R2 OUT_-5V N001 10k
V2 +V 0 15
V1 IN 0 10
.tran 0 1m 0.5m startup
.lib ADI.lib
.lib ADR4550.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1444 680
WIRE 160 32 32 32
WIRE 480 32 416 32
WIRE 544 32 480 32
WIRE 592 32 544 32
WIRE 32 48 32 32
WIRE 480 48 480 32
WIRE 592 48 592 32
WIRE 480 144 480 112
WIRE 32 160 32 128
WIRE 288 160 288 128
WIRE 592 160 592 128
WIRE 656 160 592 160
WIRE 768 160 736 160
WIRE 672 208 656 208
WIRE 656 240 656 208
WIRE 592 256 592 160
WIRE 624 256 592 256
WIRE 272 272 256 272
WIRE 384 272 368 272
WIRE 768 272 768 160
WIRE 768 272 688 272
WIRE 832 272 768 272
WIRE 880 272 832 272
WIRE 624 288 592 288
WIRE 256 304 256 272
WIRE 368 304 368 272
WIRE 592 336 592 288
WIRE 656 352 656 304
WIRE 672 352 656 352
WIRE 256 400 256 384
WIRE 368 400 368 384
WIRE 592 432 592 416
SYMBOL res 752 144 R90
WINDOW 0 5 17 VBottom 2
WINDOW 3 34 17 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 368 288 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V3
SYMATTR Value -15
SYMBOL ADR4550 288 32 R0
SYMATTR InstName U1
SYMBOL voltage 256 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL OpAmps\\ADA4000-1 656 208 R0
WINDOW 0 32 42 Left 2
WINDOW 3 31 101 Left 2
SYMATTR InstName U2
SYMBOL cap 464 48 R0
WINDOW 39 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 576 320 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL voltage 32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 26 86 Left 2
SYMATTR Value 10
SYMATTR InstName V1
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value 10k
FLAG 32 160 0
FLAG 288 160 0
FLAG 32 32 IN
FLAG 544 32 OUT_+5V
FLAG 592 432 0
FLAG 832 272 OUT_-5V
FLAG 272 272 +V
FLAG 384 272 -V
FLAG 368 400 0
FLAG 256 400 0
FLAG 672 208 +V
FLAG 672 352 -V
FLAG 480 144 0
TEXT 288 464 Left 2 !.tran 0 1m 0.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3410.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
L1 N001 OUT 4.7
R1 OUT N002 887K
R2 N002 0 412K
XU1 IN 0 N001 IN MP_01 N002 LTC3410 ;pnba Run)GND)SW)Vin))FB
C1 OUT N002 10p
C2 OUT 0 4.7
Rload OUT 0 100
.tran 250u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3410.asy)
.lib LTC3410.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 700
WIRE 192 64 112 64
WIRE 352 64 192 64
WIRE 112 80 112 64
WIRE 352 80 352 64
WIRE 192 144 192 64
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 608 144 592 144
WIRE 704 144 608 144
WIRE 800 144 704 144
WIRE 896 144 800 144
WIRE 800 160 800 144
WIRE 896 160 896 144
WIRE 112 176 112 160
WIRE 608 176 608 144
WIRE 704 176 704 144
WIRE 800 256 800 224
WIRE 896 256 896 240
WIRE 608 304 608 256
WIRE 608 304 496 304
WIRE 704 304 704 240
WIRE 704 304 608 304
WIRE 608 320 608 304
WIRE 352 384 352 368
WIRE 608 416 608 400
FLAG 112 176 0
FLAG 352 384 0
FLAG 800 256 0
FLAG 896 256 0
FLAG 608 416 0
FLAG 112 64 IN
FLAG 896 144 OUT
SYMBOL VOLTAGE 112 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL res 592 160 R0
SYMATTR InstName R1
SYMATTR Value 887K
SYMBOL res 592 304 R0
SYMATTR InstName R2
SYMATTR Value 412K
SYMBOL PowerProducts\\LTC3410 352 224 R0
SYMATTR InstName U1
SYMBOL cap 688 176 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL cap 784 160 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL RES 880 144 R0
SYMATTR InstName Rload
SYMATTR Value 100
TEXT 728 352 Left 2 !.tran 250u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC7103.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC7103.asy)
V1 IN 0 50
XU1 N002 MP_01 IN MP_02 MP_03 0 0 NC_04 N003 OUT 0 0 NC_05 NC_06 NC_07 NC_08 NC_09 NC_10 0 OUT N003 MP_11 MP_12 N001 MP_13 MP_14 MP_15 MP_16 MP_17 IN MP_18 MP_19 MP_20 MP_21 0 LTC7103 ;pnba Boost))Run)))SGND)OVLO)Rind)Ith)Vfb)Freq)PLLin/Mode)CLKOut)PGood)SS)ICTRL)Imon)VPRG1)VPRG2)EXTVcc)INTVcc)))SW))))))Vin)))))PGND
Rload OUT 0 4.99
L1 N001 OUT 18 Rser=5m
C1 OUT 0 100 Rser=15m
C2 N001 N002 0.1
C6 N003 0 1
.tran 1.8m startup
.lib LTC7103.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 6140 3124
WIRE 608 -192 496 -192
WIRE 624 -192 608 -192
WIRE 1136 -192 1008 -192
WIRE 1168 -192 1136 -192
WIRE 1280 -192 1248 -192
WIRE 1376 -192 1280 -192
WIRE 496 -176 496 -192
WIRE 1376 -176 1376 -192
WIRE 1040 -144 1008 -144
WIRE 1136 -144 1136 -192
WIRE 1136 -144 1104 -144
WIRE 608 -112 608 -192
WIRE 624 -112 608 -112
WIRE 1040 -112 1008 -112
WIRE 1280 -112 1280 -192
WIRE 1280 -112 1040 -112
WIRE 1280 -96 1280 -112
WIRE 496 -80 496 -96
WIRE 1376 -80 1376 -96
WIRE 624 -32 608 -32
WIRE 1040 -32 1040 -112
WIRE 1040 -32 1008 -32
WIRE 1280 16 1280 -32
WIRE 624 48 608 48
WIRE 1072 48 1008 48
WIRE 1072 128 1072 48
WIRE 1072 128 1008 128
WIRE 1072 144 1072 128
WIRE 1072 224 1072 208
WIRE 624 288 608 288
WIRE 1024 288 1008 288
WIRE 688 400 688 384
WIRE 816 400 816 384
SYMBOL cap 1104 -160 R90
WINDOW 0 16 1 VBottom 2
WINDOW 3 16 -7 VTop 2
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL cap 1264 -96 R0
WINDOW 39 24 84 Left 2
SYMATTR SpiceLine Rser=15m
SYMATTR Value 100
SYMATTR InstName C1
SYMBOL cap 1056 144 R0
SYMATTR Value 1
SYMATTR InstName C6
SYMBOL ind 1152 -176 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
WINDOW 39 -47 55 VTop 2
SYMATTR InstName L1
SYMATTR Value 18
SYMATTR SpiceLine Rser=5m
SYMBOL res 1360 -192 R0
SYMATTR InstName Rload
SYMATTR Value 4.99
SYMBOL LTC7103 816 48 R0
SYMATTR InstName U1
SYMBOL voltage 496 -192 R0
SYMATTR InstName V1
SYMATTR Value 50
FLAG 496 -80 0
FLAG 496 -192 IN
FLAG 1376 -192 OUT
FLAG 608 -32 0
FLAG 608 288 0
FLAG 1376 -80 0
FLAG 1280 16 0
FLAG 688 400 0
FLAG 816 400 0
FLAG 1024 288 0
FLAG 1072 224 0
FLAG 608 48 0
TEXT 1152 336 Left 2 !.tran 1.8m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX20314.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
C2 OUT 0 150
S1 0 OUT N001 0 SHORT
V3 N001 0 PULSE(0 1 10m 1m 1m 30m)
R6 N004 N003 20K
R8 N005 0 681
V2 N004 0 5
V4 N002 0 2
XU1 IN N005 0 N003 N002 OUT MAX20314 ;pnba IN)SETI)GND)_FLAG)EN)OUT
.model SHORT SW(Ron=0.05 Roff=1K Vt=.5 Vh=-.4)
.tran 50m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX20314.asy)
.lib MAX20314.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1800 680
WIRE -16 -352 -224 -352
WIRE 400 -352 272 -352
WIRE 512 -352 400 -352
WIRE 672 -352 560 -352
WIRE -224 -336 -224 -352
WIRE 400 -336 400 -352
WIRE 512 -336 512 -352
WIRE 672 -336 672 -352
WIRE 560 -320 560 -352
WIRE -224 -240 -224 -256
WIRE 400 -240 400 -272
WIRE 512 -240 512 -256
WIRE 672 -240 672 -256
WIRE -16 -160 -224 -160
WIRE 384 -160 272 -160
WIRE 576 -160 464 -160
WIRE -224 -144 -224 -160
WIRE 576 -128 576 -160
WIRE -16 -64 -128 -64
WIRE 336 -64 272 -64
WIRE -224 -48 -224 -64
WIRE -128 -48 -128 -64
WIRE 336 -32 336 -64
WIRE 576 -32 576 -48
WIRE -128 80 -128 32
FLAG -224 -240 0
FLAG 400 -240 0
FLAG 512 -352 OUT
FLAG -224 -352 IN
FLAG 512 -240 0
FLAG 560 -272 0
FLAG 672 -240 0
FLAG -128 80 0
FLAG 576 -32 0
FLAG -224 -48 0
FLAG 336 -32 0
SYMBOL voltage -224 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 384 -336 R0
SYMATTR InstName C2
SYMATTR Value 150
SYMBOL sw 512 -240 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL voltage 672 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 10m 1m 1m 30m)
SYMBOL res 480 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 20K
SYMBOL res -144 -64 R0
SYMATTR InstName R8
SYMATTR Value 681
SYMBOL voltage 576 -144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -224 -160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 2
SYMBOL MAX20314 128 -208 R0
SYMATTR InstName U1
TEXT 480 144 Left 2 !.model SHORT SW(Ron=0.05 Roff=1K Vt=.5 Vh=-.4)
TEXT 480 184 Left 2 !.tran 50m startup