Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4616.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4616.asy)
V1 IN1 0 5
C3 OUT2 0 100
Rload1 OUT1 0 .4125
V2 IN2 0 3.6
R1 N002 0 3.09K
C1 OUT1 0 100
R2 N001 0 2.21K
XU1 OUT1 0 NC_01 IN1 NC_02 NC_03 NC_04 NC_05 NC_06 NC_07 NC_08 NC_09 0 IN2 0 MP_10 0 IN2 NC_11 NC_12 NC_13 NC_14 N002 NC_15 NC_16 IN2 IN2 NC_17 N001 IN1 NC_18 NC_19 0 IN1 0 NC_20 IN1 NC_21 OUT2 LTM4616 ;pnba Vout1)SGND1)PLLLPF1)Vin1)PLLLPF2)SW1)CLKin2)CLKout2)PHmode2)Mode1)CLKin1)PHmode1)GND1)SVin2)SGND2))GND2)Vin2)SW2)MGN1)Bsel1)Pgood1)FB2)MGN2)Bsel2)Track2)Run2)Mode2)FB1)Track1)Ith2)Ith1)IthM1)SVin1)IthM2)Pgood2)Run1)CLKout1)Vout2
Rload2 OUT2 0 .3125
.tran 300u startup
.lib LTM4616.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1260 708
WIRE -128 -976 -240 -976
WIRE -112 -976 -128 -976
WIRE 656 -976 528 -976
WIRE 752 -976 656 -976
WIRE -240 -960 -240 -976
WIRE 656 -960 656 -976
WIRE 752 -960 752 -976
WIRE -128 -912 -128 -976
WIRE -112 -912 -128 -912
WIRE -240 -864 -240 -880
WIRE 656 -864 656 -896
WIRE 752 -864 752 -880
WIRE -128 -848 -128 -912
WIRE -112 -848 -128 -848
WIRE 592 -848 528 -848
WIRE 592 -832 592 -848
WIRE -128 -784 -128 -848
WIRE -112 -784 -128 -784
WIRE 592 -736 592 -752
WIRE 544 -720 528 -720
WIRE -128 -528 -240 -528
WIRE -112 -528 -128 -528
WIRE 656 -528 528 -528
WIRE 752 -528 656 -528
WIRE -240 -512 -240 -528
WIRE 656 -512 656 -528
WIRE 752 -512 752 -528
WIRE -128 -464 -128 -528
WIRE -112 -464 -128 -464
WIRE -240 -416 -240 -432
WIRE 656 -416 656 -448
WIRE 752 -416 752 -432
WIRE -128 -400 -128 -464
WIRE -112 -400 -128 -400
WIRE 592 -400 528 -400
WIRE 592 -384 592 -400
WIRE -128 -336 -128 -400
WIRE -112 -336 -128 -336
WIRE 592 -288 592 -304
WIRE 544 -272 528 -272
WIRE -16 -64 -16 -80
WIRE 96 -64 96 -80
WIRE 208 -64 208 -80
WIRE 320 -64 320 -80
SYMBOL voltage -240 -528 R0
SYMATTR InstName V2
SYMATTR Value 3.6
SYMBOL res 736 -528 R0
SYMATTR InstName Rload2
SYMATTR Value .3125
SYMBOL voltage -240 -976 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 576 -848 R0
SYMATTR InstName R2
SYMATTR Value 2.21K
SYMBOL cap 640 -512 R0
SYMATTR InstName C3
SYMATTR Value 100
SYMBOL res 576 -400 R0
SYMATTR InstName R1
SYMATTR Value 3.09K
SYMBOL res 736 -976 R0
SYMATTR InstName Rload1
SYMATTR Value .4125
SYMBOL cap 640 -960 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMBOL PowerProducts\\LTM4616 208 -560 R0
SYMATTR InstName U1
FLAG -16 -64 0
FLAG 96 -64 0
FLAG -240 -864 0
FLAG 656 -864 0
FLAG 752 -864 0
FLAG 592 -736 0
FLAG 752 -976 OUT1
FLAG -240 -976 IN1
FLAG 544 -720 0
FLAG 208 -64 0
FLAG 320 -64 0
FLAG 656 -416 0
FLAG 752 -416 0
FLAG 592 -288 0
FLAG 752 -528 OUT2
FLAG 544 -272 0
FLAG -240 -416 0
FLAG -240 -528 IN2
TEXT 584 -184 Left 2 !.tran 300u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1a1ad9f5887c_cs_amp_for_differential.asc
* Generated by LTspice 26.0.1 for Windows.
* COMMON SOURCE AMPLIFIER FOR DESIGNING DIFFERENTIAL PAIR USING LUT FROM ADT
* Specification :\nGBW=1GHz\nGian=10 at 100MHz
;.tf V(vout) vgs
;.tran 100n
C1 vout 0 0.29p
vdd vdd 0 1.8
Vb vb 0 0.9257
M1 vout vg vs 0 nch l=0.36u w=16.92u
vgs vg 0 SINE(1.1917 10m 100meg) AC 1
M2 vout vb vdd vdd pch l=0.36u w=9.9u
vs vs 0 0.45
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include CMOS180.txt
.op
.ac dec 10 1MEG 40G
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 732
WIRE 352 64 352 16
WIRE 448 64 352 64
WIRE 352 80 352 64
WIRE 304 96 256 96
WIRE 448 128 448 64
WIRE 448 128 352 128
WIRE 32 256 32 176
WIRE 352 256 352 176
WIRE 608 256 352 256
WIRE 656 256 608 256
WIRE -256 272 -256 224
WIRE -96 272 -96 224
WIRE 352 272 352 256
WIRE -368 288 -368 256
WIRE 464 320 352 320
WIRE 608 336 608 256
WIRE 304 352 240 352
WIRE -368 416 -368 368
WIRE -256 416 -256 352
WIRE -96 416 -96 352
WIRE 32 416 32 336
WIRE 352 416 352 368
WIRE 608 432 608 400
IOPIN 240 352 In
IOPIN 656 256 In
SYMBOL voltage 32 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vb
SYMATTR Value 0.9257
SYMBOL cap 592 336 R0
SYMATTR InstName C1
SYMATTR Value 0.29p
SYMBOL voltage -96 256 R0
WINDOW 3 -41 -81 VRight 2
WINDOW 123 28 97 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(1.1917 10m 100meg)
SYMATTR Value2 AC 1
SYMATTR InstName vgs
SYMBOL nmos4 304 272 R0
WINDOW 123 55 116 Left 2
SYMATTR Value2 l=0.36u w=16.92u
SYMATTR InstName M1
SYMATTR Value nch
SYMBOL pmos4 304 176 M180
WINDOW 123 120 23 Left 2
SYMATTR Value2 l=0.36u w=9.9u
SYMATTR InstName M2
SYMATTR Value pch
SYMBOL voltage -256 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vdd
SYMATTR Value 1.8
SYMBOL voltage -368 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vs
SYMATTR Value 0.45
FLAG -96 416 0
FLAG -256 416 0
FLAG -368 416 0
FLAG -368 256 vs
FLAG -256 224 vdd
FLAG -96 224 vg
FLAG 240 352 vg
FLAG 656 256 vout
FLAG 608 432 0
FLAG 352 16 vdd
FLAG 32 416 0
FLAG 32 176 vb
FLAG 256 96 vb
FLAG 352 416 vs
FLAG 464 320 0
TEXT -376 16 Left 2 !.include CMOS180.txt
TEXT -376 64 Left 2 !.op
TEXT -376 40 Left 2 !;.tf V(vout) vgs
TEXT -376 88 Left 2 !;.tran 100n
TEXT -376 -80 Left 2 ;COMMON SOURCE AMPLIFIER FOR DESIGNING DIFFERENTIAL PAIR USING LUT FROM ADT
TEXT -376 112 Left 2 !.ac dec 10 1MEG 40G
TEXT 560 -16 Left 2 ;Specification :\nGBW=1GHz\nGian=10 at 100MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\5a66b8f17ce0_Common_Emitter.asc
* Generated by LTspice 26.0.1 for Windows.
VBB N002 0 0
VCC N004 0 0
R1 N003 N002 100K
R2 N001 N004 1K
Q1 N001 N003 0 0 BC547B
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VCC 0 10 0.1 VBB 0.5 1 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 608 192 480 192
WIRE 608 224 608 192
WIRE 480 240 480 192
WIRE 288 288 208 288
WIRE 416 288 368 288
WIRE 608 336 608 304
WIRE 208 352 208 288
WIRE 208 480 208 432
WIRE 480 480 480 336
WIRE 480 480 208 480
WIRE 608 480 608 416
WIRE 608 480 480 480
WIRE 480 496 480 480
FLAG 480 496 0
SYMBOL voltage 208 336 R0
SYMATTR InstName VBB
SYMATTR Value 0
SYMBOL voltage 608 320 R0
SYMATTR InstName VCC
SYMATTR Value 0
SYMBOL res 384 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 592 208 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL npn 416 240 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
TEXT 112 504 Left 2 !.dc VCC 0 10 0.1 VBB 0.5 1 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\waveout.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
V3 B 0 SIN(0 1 455)
B1 SYN 0 V=2*V(a)*V(b)*V(c)
V2 A 0 SINE(0 .4 20 10m)
V4 C 0 PWL(0 0 10m 0 11m 1 440m 1 480m 0)
.tran .5
.wave .\ring.wav 8 11025 V(syn) ; This means save node V(syn) as a .wav file, 8 bit resolution, 11025 samples per second
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2680 864
WIRE 1008 560 1008 512
WIRE 1360 560 1360 512
WIRE 1664 560 1664 512
WIRE 2368 560 2368 512
WIRE 1008 688 1008 640
WIRE 1360 688 1360 640
WIRE 1664 688 1664 640
WIRE 2368 688 2368 640
SYMBOL BV 2368 544 R0
SYMATTR InstName B1
SYMATTR Value V=2*V(a)*V(b)*V(c)
SYMBOL voltage 1664 544 R0
WINDOW 39 24 117 Left 2
WINDOW 123 24 138 Left 2
SYMATTR InstName V4
SYMATTR Value PWL(0 0 10m 0 11m 1 440m 1 480m 0)
SYMBOL VOLTAGE 1008 544 R0
WINDOW 39 0 0 Left 2
WINDOW 123 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 .4 20 10m)
SYMBOL voltage 1360 544 R0
SYMATTR InstName V3
SYMATTR Value SIN(0 1 455)
FLAG 1008 688 0
FLAG 1360 688 0
FLAG 1008 512 A
FLAG 1360 512 B
FLAG 2368 688 0
FLAG 1664 688 0
FLAG 1664 512 C
FLAG 2368 512 SYN
TEXT 992 744 Left 2 !.tran .5
TEXT 960 784 Left 2 !.wave .\\ring.wav 8 11025 V(syn) ; This means save node V(syn) as a .wav file, 8 bit resolution, 11025 samples per second
TEXT 1680 840 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\20c17da87076_TASK2.asc
* Generated by LTspice 26.0.1 for Windows.
M2 N001 N002 N003 N003 NMOS
R1 N001 0 10k
Vgs N002 N003 5
V1 N003 0 -25
R2 N001 0 10k
M1 N001 N002 N003 N003 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model nmos NMOS(kp=100u, vt0=0.5, L=10u, W=20u)
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 400 16 224 16
WIRE 528 16 400 16
WIRE 624 16 528 16
WIRE 224 96 224 16
WIRE 400 96 400 16
WIRE 528 96 528 16
WIRE 624 96 624 16
WIRE 176 176 16 176
WIRE 16 208 16 176
WIRE 352 208 352 176
WIRE 352 208 16 208
WIRE 16 224 16 208
WIRE 224 224 224 192
WIRE 224 224 112 224
WIRE 400 224 400 192
WIRE 400 224 224 224
WIRE 224 288 224 224
WIRE 16 336 16 304
WIRE 112 336 112 224
WIRE 112 336 16 336
WIRE 224 384 224 368
WIRE 528 384 528 176
WIRE 528 384 224 384
WIRE 624 384 624 176
WIRE 624 384 528 384
WIRE 624 416 624 384
SYMBOL nmos 352 96 R0
SYMATTR InstName M2
SYMBOL nmos 176 96 R0
SYMATTR InstName M1
SYMBOL voltage 16 208 R0
SYMATTR InstName Vgs
SYMATTR Value 5
SYMBOL voltage 224 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -25
SYMBOL res 608 80 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 512 80 R0
SYMATTR InstName R1
SYMATTR Value 10k
FLAG 624 416 0
TEXT -24 416 Left 2 !.model nmos NMOS(kp=100u, vt0=0.5, L=10u, W=20u)
TEXT -8 464 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP172-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
C1 OUT 0 1
V1 IN 0 3.6
RLOAD OUT 0 5
XU1 OUT IN IN 0 ADP172-1.5 ;pnba Vout)Vin)En)GND
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP172-1.5.asy)
.lib ADP172-1.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 80 -48 80
WIRE 48 80 -32 80
WIRE 64 80 48 80
WIRE 304 80 256 80
WIRE 336 80 304 80
WIRE 384 80 336 80
WIRE -48 96 -48 80
WIRE 304 96 304 80
WIRE 304 176 304 160
WIRE 384 176 384 160
WIRE -48 192 -48 176
WIRE 48 192 48 80
WIRE 64 192 48 192
WIRE 272 192 256 192
FLAG -48 192 0
FLAG 304 176 0
FLAG 272 192 0
FLAG 384 176 0
FLAG -32 80 IN
FLAG 336 80 OUT
SYMBOL cap 288 96 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -48 80 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL res 368 64 R0
SYMATTR InstName RLOAD
SYMATTR Value 5
SYMBOL ADP172-1.5 160 192 R0
SYMATTR InstName U1
TEXT 160 256 Center 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1949.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1949.asy)
R2 OUT N003 1Meg
XU1 N006 N003 N005 0 N001 IN N004 N002 LT1949 ;pnba Vc)FB)_SHDN)GND)SW)Vin)LBI)LBO
V1 IN 0 3.3
L1 IN N001 10
R3 N003 0 140K
R4 IN N002 1Meg
D1 N001 OUT MBRS130L
Rload OUT 0 57.5
C1 N007 0 330p
R1 N006 N007 68K
C2 OUT 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran .5m startup
.lib LT1949.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2700 680
WIRE 1728 160 1616 160
WIRE 1888 160 1728 160
WIRE 1936 160 1888 160
WIRE 2048 160 2016 160
WIRE 2128 160 2048 160
WIRE 2272 160 2192 160
WIRE 2416 160 2272 160
WIRE 2544 160 2416 160
WIRE 1616 176 1616 160
WIRE 2416 176 2416 160
WIRE 2544 176 2544 160
WIRE 1728 208 1728 160
WIRE 2272 208 2272 160
WIRE 1888 224 1888 160
WIRE 2048 224 2048 160
WIRE 1616 272 1616 256
WIRE 2416 272 2416 240
WIRE 2544 272 2544 256
WIRE 1728 304 1728 288
WIRE 1824 304 1728 304
WIRE 2272 304 2272 288
WIRE 2272 304 2112 304
WIRE 2272 320 2272 304
WIRE 1824 368 1808 368
WIRE 2272 416 2272 400
WIRE 1824 432 1808 432
WIRE 2128 432 2112 432
WIRE 2240 432 2208 432
WIRE 2240 448 2240 432
WIRE 1968 528 1968 512
WIRE 2240 528 2240 512
SYMBOL cap 2224 448 R0
SYMATTR InstName C1
SYMATTR Value 330p
SYMBOL VOLTAGE 1616 160 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL ind 1920 176 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL schottky 2128 176 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS130L
SYMBOL RES 2112 448 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 68K
SYMBOL cap 2400 176 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL PowerProducts\\LT1949 1968 368 R0
SYMATTR InstName U1
SYMBOL res 1712 192 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL res 2256 192 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 2528 160 R0
SYMATTR InstName Rload
SYMATTR Value 57.5
SYMBOL res 2256 304 R0
SYMATTR InstName R3
SYMATTR Value 140K
FLAG 1968 528 0
FLAG 2240 528 0
FLAG 2272 416 0
FLAG 2416 272 0
FLAG 1616 272 0
FLAG 2544 272 0
FLAG 2544 160 OUT
FLAG 1616 160 IN
TEXT 2360 480 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2285bf0a8119_2055.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC2055.asy)
V3 N003 0 SINE(0 1 1K)
XU1 N003 N001 N002 +V -V LTC2054 ;pnba IN+)IN-)OUT)VCC)VEE
R1 N002 N001 10K
V2 -V 0 -2.5
R2 N001 0 10K
V1 +V 0 2.5
.tran 3m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -48 -16 -64 -16
WIRE 48 -16 32 -16
WIRE 112 -16 48 -16
WIRE 208 -16 192 -16
WIRE 112 64 112 48
WIRE 48 80 48 -16
WIRE 80 80 48 80
WIRE 208 96 208 -16
WIRE 208 96 144 96
WIRE -400 112 -400 80
WIRE -272 112 -272 80
WIRE 80 112 -16 112
WIRE -16 144 -16 112
WIRE 112 144 112 128
WIRE -400 240 -400 192
WIRE -272 240 -272 192
WIRE -16 256 -16 224
SYMBOL opamps\\LTC2055 112 96 R0
SYMATTR InstName U1
SYMBOL voltage -16 128 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL res 208 -32 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -272 96 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 48 -32 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage -400 96 R0
SYMATTR InstName V2
SYMATTR Value -2.5
FLAG -272 240 0
FLAG 112 48 +V
FLAG -272 80 +V
FLAG 112 144 -V
FLAG -400 240 0
FLAG -400 80 -V
FLAG -16 256 0
FLAG -64 -16 0
TEXT -192 296 Left 0 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8040.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8040.asy)
XU1 IN N001 +V -V OUT AD8040 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 10K
R2 OUT N001 10K
Vin1 IN 0 SINE(0 1 100K)
V1 +V 0 5
V2 -V 0 -5
.tran 100u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 960 680
WIRE 272 128 256 128
WIRE 368 128 352 128
WIRE 384 128 368 128
WIRE 480 128 464 128
WIRE 32 208 32 192
WIRE 160 208 160 192
WIRE 368 224 368 128
WIRE 384 224 368 224
WIRE 480 240 480 128
WIRE 480 240 448 240
WIRE 544 240 480 240
WIRE 384 256 304 256
WIRE 304 272 304 256
WIRE 32 304 32 288
WIRE 160 304 160 288
WIRE 304 368 304 352
SYMBOL voltage 32 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL opamps\\AD8040 416 176 R0
SYMATTR InstName U1
SYMBOL voltage 160 192 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 368 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 480 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 304 256 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin1
SYMATTR Value SINE(0 1 100K)
FLAG 32 192 +V
FLAG 304 368 0
FLAG 544 240 OUT
FLAG 304 256 IN
FLAG 416 208 +V
FLAG 160 192 -V
FLAG 416 272 -V
FLAG 256 128 0
FLAG 160 304 0
FLAG 32 304 0
TEXT 560 360 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM707.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM707.asy)
R2 0 _RESET 1Meg
V2 _MR 0 PULSE(3.5 0 1 10n 10n 500m 2 1)
V3 N001 0 5
R3 0 RESET 1Meg
R4 0 _PFO 1Meg
V1 VCC 0 PULSE(0 5 0 1 1 0 2)
XU2 RESET 0 VCC N001 _PFO _MR _RESET ADM707 ;pnba RESET)GND)VCC)PFI)_PFO)_MR)_RESET
.tran 2.5 startup
.lib ADM707.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 -16 16 -16
WIRE 176 -16 96 -16
WIRE 16 0 16 -16
WIRE 16 96 16 80
WIRE 464 96 400 96
WIRE 512 96 464 96
WIRE 608 96 592 96
WIRE 96 208 16 208
WIRE 176 208 96 208
WIRE 464 208 400 208
WIRE 512 208 464 208
WIRE 608 208 592 208
WIRE 16 224 16 208
WIRE 16 320 16 304
WIRE 176 320 96 320
WIRE 464 320 400 320
WIRE 512 320 464 320
WIRE 608 320 592 320
WIRE 96 336 96 320
WIRE 288 400 288 384
WIRE 96 432 96 416
SYMBOL voltage 16 208 M0
SYMATTR InstName V2
SYMATTR Value PULSE(3.5 0 1 10n 10n 500m 2 1)
SYMBOL voltage 96 320 R0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage 16 -16 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 1 1 0 2)
SYMBOL ADM707 288 144 R0
SYMATTR InstName U2
SYMBOL res 608 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL res 608 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL res 608 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
FLAG 16 96 0
FLAG 288 400 0
FLAG 608 96 0
FLAG 608 208 0
FLAG 608 320 0
FLAG 16 320 0
FLAG 96 432 0
FLAG 96 -16 VCC
FLAG 96 208 _MR
FLAG 464 96 _RESET
FLAG 464 208 RESET
FLAG 464 320 _PFO
TEXT 216 456 Left 2 !.tran 2.5 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2d4b2ffad8ce_Mod_Generator.asc
* Generated by LTspice 26.0.1 for Windows.
D2 mod N001 D
B1 mod 0 V=V(low_freq)*V(high_freq)
R2 N001 0 10k
C2 N001 0 2n
V2 high_freq 0 SINE(0 1 1Meg 0 0 90)
V1 low_freq 0 PULSE(0 1.3 0 1n 1n 50u 100u)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.5e-3
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1668 680
WIRE 1168 -16 1088 -16
WIRE 1296 -16 1168 -16
WIRE 1168 16 1168 -16
WIRE 1296 16 1296 -16
WIRE -208 112 -208 16
WIRE 256 128 256 32
WIRE 640 144 640 32
WIRE 1168 160 1168 80
WIRE 1248 160 1168 160
WIRE 1296 160 1296 96
WIRE 1296 160 1248 160
WIRE 1248 208 1248 160
WIRE -208 288 -208 192
WIRE 256 304 256 208
WIRE 640 304 640 224
SYMBOL cap 1152 16 R0
SYMATTR InstName C2
SYMATTR Value 2n
SYMBOL voltage 256 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 1 1Meg 0 0 90)
SYMBOL res 1280 0 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL diode 1024 0 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL bv 640 128 R0
SYMATTR InstName B1
SYMATTR Value V=V(low_freq)*V(high_freq)
SYMBOL voltage -208 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1.3 0 1n 1n 50u 100u)
FLAG -208 288 0
FLAG 256 304 0
FLAG -208 16 low_freq
FLAG 256 32 high_freq
FLAG 640 304 0
FLAG 640 32 mod
FLAG 1024 -16 mod
FLAG 1248 208 0
TEXT -240 312 Left 2 !.tran 0.5e-3
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP124-2.7.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP124-2.7.asy)
Rload OUT 0 100
C1 IN 0 1
XU1 OUT MP_01 OUT 0 IN MP_02 MP_03 IN ADP124 K=45454.5 ;pnba Vout))Sense)GND)En)))Vin
C2 OUT 0 1
V1 IN 0 5.5
.tran 10m startup
.lib ADP124.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 384 96 352 96
WIRE 432 96 384 96
WIRE 512 96 432 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 432 112 432 96
WIRE 512 112 512 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 384 208 384 96
WIRE 384 208 352 208
WIRE 432 208 432 176
WIRE 512 208 512 192
WIRE 256 272 256 256
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 416 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL ADP124-2.7 256 208 R0
SYMATTR InstName U1
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
FLAG 0 208 0
FLAG 256 272 0
FLAG 432 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\29245fd77ee8_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
V2 N006 0 5
R4 N005 0 {R2}
R2 N003 N002 {Rl}
C1 N002 N001 {Ch}
XU1 N003 N005 N006 0 N004 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R3 N004 N005 {R1}
C2 0 N003 {Cl}
V1 N001 0 AC 1 0
R1 N002 0 {Rh}
.param Ch=0.1u Rh=10k Rl=10k Cl=0.1u
.param R1=10k R2=10k
.ac dec 1000 0.01 20
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 916 680
WIRE 128 -64 16 -64
WIRE 272 -64 192 -64
WIRE 352 -64 272 -64
WIRE 480 -64 432 -64
WIRE 560 -64 480 -64
WIRE 560 -32 560 -64
WIRE 688 -32 560 -32
WIRE 816 -16 752 -16
WIRE 912 -16 816 -16
WIRE 16 0 16 -64
WIRE 688 0 656 0
WIRE 272 16 272 -64
WIRE 816 16 816 -16
WIRE 480 32 480 -64
WIRE 656 96 656 0
WIRE 816 96 656 96
WIRE 16 128 16 80
WIRE 272 128 272 96
WIRE 272 128 16 128
WIRE 480 128 480 96
WIRE 480 128 272 128
WIRE 16 144 16 128
WIRE 720 176 720 16
SYMBOL voltage 720 160 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 256 0 R0
SYMATTR InstName R1
SYMATTR Value {Rh}
SYMBOL cap 192 -80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {Ch}
SYMBOL res 800 0 R0
SYMATTR InstName R3
SYMATTR Value {R1}
SYMBOL res 800 80 R0
SYMATTR InstName R4
SYMATTR Value {R2}
SYMBOL voltage 16 -16 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMBOL OpAmps\\UniversalOpamp 720 -16 M180
SYMATTR InstName U1
SYMBOL cap 496 96 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value {Cl}
SYMBOL res 448 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {Rl}
FLAG 16 144 0
FLAG 816 176 0
FLAG 720 256 0
FLAG 720 -48 0
TEXT -48 232 Left 2 !.param Ch=0.1u Rh=10k Rl=10k Cl=0.1u
TEXT -40 272 Left 2 !.param R1=10k R2=10k
TEXT -40 312 Left 2 !.ac dec 1000 0.01 20
* Z:\tmp\asc_dec_bjh7r6w2\0cfb06316b97_Impedance_Pt1_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 0 159
V3 N002 0 SINE(0 1 100e3)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2688 680
WIRE 864 48 576 48
WIRE 1392 48 1104 48
WIRE 864 112 864 48
WIRE 1104 128 1104 48
WIRE 864 256 864 192
WIRE 1104 256 1104 208
SYMBOL res 848 96 R0
SYMATTR InstName R1
SYMATTR Value 159
SYMBOL voltage 1104 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100e3)
FLAG 864 256 0
FLAG 1104 256 0