Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8615.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N006 0 18.2K
C1 N004 0 1n
V1 IN 0 12
C2 N001 0 1
L1 N005 OUT 2.2 Rser=37m Rpar=5k
C4 OUT 0 22 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
R2 OUT N007 1Meg
R3 N007 0 309K
C5 OUT N007 10p
Rload OUT 0 2.2
R4 N001 N002 100K
XU1 N004 N001 NC_01 IN N007 N002 IN N005 N006 0 N003 LT8615 ;pnba TR/SS)INTVcc)SYNC)VIN)FB)PG)EN/UV)SW)RT)GND)BST
C3 N003 N005 0.1
.tran 750u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8615.asy)
.lib LT8615.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1044 680
WIRE 80 0 0 0
WIRE 112 0 80 0
WIRE 464 0 400 0
WIRE 528 0 464 0
WIRE 608 0 592 0
WIRE 0 16 0 0
WIRE 464 16 464 0
WIRE 80 96 80 0
WIRE 112 96 80 96
WIRE 464 96 400 96
WIRE 0 112 0 96
WIRE 432 192 400 192
WIRE 432 208 432 192
WIRE 32 288 0 288
WIRE 112 288 96 288
WIRE 432 288 432 272
WIRE 432 288 400 288
WIRE 512 288 432 288
WIRE 624 288 592 288
WIRE 736 288 624 288
WIRE 832 288 736 288
WIRE 928 288 832 288
WIRE 624 304 624 288
WIRE 736 304 736 288
WIRE 832 304 832 288
WIRE 928 304 928 288
WIRE 16 384 0 384
WIRE 112 384 96 384
WIRE 624 384 400 384
WIRE 736 384 736 368
WIRE 736 384 624 384
WIRE 624 400 624 384
WIRE 832 400 832 368
WIRE 928 400 928 384
WIRE 256 448 256 432
WIRE 624 496 624 480
FLAG 0 384 0
FLAG 0 288 0
FLAG 0 112 0
FLAG 608 0 0
FLAG 832 400 0
FLAG 624 496 0
FLAG 928 400 0
FLAG 928 288 OUT
FLAG 0 0 IN
FLAG 256 448 0
SYMBOL res 112 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 18.2K
SYMBOL cap 96 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL voltage 0 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 528 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL ind 496 304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=37m Rpar=5k
SYMBOL cap 816 304 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL res 608 288 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 608 384 R0
SYMATTR InstName R3
SYMATTR Value 309K
SYMBOL cap 720 304 R0
SYMATTR InstName C5
SYMATTR Value 10p
SYMBOL res 912 288 R0
SYMATTR InstName Rload
SYMATTR Value 2.2
SYMBOL res 448 0 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL LT8615 256 160 R0
SYMATTR InstName U1
SYMBOL cap 416 208 R0
SYMATTR InstName C3
SYMATTR Value 0.1
TEXT 480 584 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\6e912dba12e1_NMOS_Char.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 0
M1 N001 N002 0 0 NMOS l=100n w=1u
V1 N002 0 0.6
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc 65nm_bulk.txt
.dc V2 0 1.2 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 464 80 176 80
WIRE 176 96 176 80
WIRE 464 112 464 80
WIRE 304 144 176 144
WIRE 128 176 -16 176
WIRE -16 192 -16 176
WIRE 176 256 176 192
WIRE 304 256 304 144
WIRE 464 256 464 192
WIRE -16 320 -16 272
SYMBOL voltage 464 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage -16 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0.6
SYMBOL nmos4 128 96 R0
SYMATTR InstName M1
SYMATTR Value2 l=100n w=1u
FLAG -16 320 0
FLAG 176 256 0
FLAG 304 256 0
FLAG 464 256 0
TEXT -152 0 Left 2 !.inc 65nm_bulk.txt
TEXT -144 40 Left 2 !.dc V2 0 1.2 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\650a048e77ad_foster.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Vi 0 AC 1
L2 N002 0 2 Rser=0
L1 N001 0 2 Rser=0
C2 Vi N002 0.5
C1 Vi N001 0.166
.ac dec 1000 1m 10
.net V(vi) V1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 64 16 64
WIRE 368 64 208 64
WIRE 208 96 208 64
WIRE 368 96 368 64
WIRE 16 144 16 64
WIRE 208 192 208 160
WIRE 368 192 368 160
WIRE 16 304 16 224
WIRE 208 304 208 272
WIRE 208 304 16 304
WIRE 368 304 368 272
WIRE 368 304 208 304
WIRE 16 320 16 304
SYMBOL cap 352 96 R0
SYMATTR InstName C2
SYMATTR Value 0.5
SYMBOL cap 192 96 R0
SYMATTR InstName C1
SYMATTR Value 0.166
SYMBOL voltage 16 128 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL ind 352 176 R0
SYMATTR InstName L2
SYMATTR Value 2
SYMATTR SpiceLine Rser=0
SYMBOL ind 192 176 R0
SYMATTR InstName L1
SYMATTR Value 2
SYMATTR SpiceLine Rser=0
FLAG 16 320 0
FLAG 16 64 Vi
TEXT -248 256 Left 2 !.ac dec 1000 1m 10
TEXT -248 296 Left 2 !.net V(vi) V1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6020.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6020.asy)
R2 N001 REF 10K
R4 N003 0 10K
V2 -V 0 -15
V1 +V 0 15
C1 OUT N001 10p
XU1 DAC_OUT N001 +V -V OUT LT6020 ;pnba IN+)IN-)V+)V-)OUT
V3 DAC_OUT 0 PULSE(0 2.5 20u 170n 170n 1m 2m)
V4 REF 0 2.5
R3 OUT N003 30K
XU2 N003 N002 +V -V N002 LT6020 ;pnba IN+)IN-)V+)V-)OUT
R1 N002 N001 10K
.tran 200u
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 928 1032
WIRE -144 304 -240 304
WIRE -32 304 -64 304
WIRE -16 304 -32 304
WIRE 528 304 64 304
WIRE -240 320 -240 304
WIRE -32 384 -32 304
WIRE 64 384 -32 384
WIRE 176 384 128 384
WIRE -512 400 -512 384
WIRE -400 400 -400 384
WIRE -240 416 -240 400
WIRE -512 496 -512 480
WIRE -400 496 -400 480
WIRE -32 512 -32 384
WIRE 48 512 -32 512
WIRE 176 528 176 384
WIRE 176 528 144 528
WIRE 272 528 176 528
WIRE 48 544 -272 544
WIRE -272 560 -272 544
WIRE 528 576 528 304
WIRE 528 576 384 576
WIRE 272 592 272 528
WIRE -272 656 -272 640
WIRE 384 656 384 576
WIRE 416 656 384 656
WIRE 528 672 528 576
WIRE 528 672 512 672
WIRE 272 688 272 672
WIRE 416 688 272 688
WIRE 272 704 272 688
WIRE 272 800 272 784
SYMBOL voltage -272 544 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 2.5 20u 170n 170n 1m 2m)
SYMBOL LT6020 464 672 R0
SYMATTR InstName U2
SYMBOL cap 128 368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL res 256 688 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL voltage -400 384 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res -48 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 256 576 R0
SYMATTR InstName R3
SYMATTR Value 30K
SYMBOL LT6020 96 528 R0
SYMATTR InstName U1
SYMBOL res 80 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -240 304 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 2.5
SYMBOL voltage -512 384 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
FLAG -512 496 0
FLAG -400 496 0
FLAG -272 656 0
FLAG -272 544 DAC_OUT
FLAG 272 528 OUT
FLAG 80 480 +V
FLAG -512 384 +V
FLAG -400 384 -V
FLAG 272 800 0
FLAG -240 416 0
FLAG -240 304 REF
FLAG 80 576 -V
FLAG 448 624 +V
FLAG 448 720 -V
TEXT 448 784 Left 2 !.tran 200u
* Z:\home\khalils\Downloads\files\data\raw_asc\0c2a07afedb7_Experiment_2.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N003 N001 BZX84C6V2L
R1 N003 N002 5k
R2 N003 0 1k
D2 N001 N002 D
V1 N001 0 V
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 -48 -96 -48
WIRE 80 -48 16 -48
WIRE 208 -48 160 -48
WIRE -96 80 -96 -48
WIRE 16 80 -96 80
WIRE 208 80 208 -48
WIRE 208 80 80 80
WIRE -96 128 -96 80
WIRE 208 128 208 80
WIRE -96 256 -96 208
WIRE 48 256 -96 256
WIRE 208 256 208 208
WIRE 208 256 48 256
WIRE 48 304 48 256
SYMBOL voltage -96 112 R0
SYMATTR InstName V1
SYMBOL res 176 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5k
SYMBOL res 192 112 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL zener 80 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value BZX84C6V2L
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL diode -48 -32 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
FLAG 48 304 0
* Z:\home\khalils\Downloads\files\data\raw_asc\60598f480ced_1g.asc
* Generated by LTspice 26.0.1 for Windows.
* .ac dec 100 1m 100Meg
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
V3 Vss 0 -15
V1 N003 0 SINE(0 1 1k 0 0 0 10000) AC 1
C1 N002 N001 1p
C2 N001 N004 1n
R1 N002 N001 1k
XU1 0 N001 Vdd Vss N002 LT1001 ;pnba In+)In-)V+)V-)OUT
R2 N004 N003 1k
V2 Vdd 0 15
.tran 0 1 0.990
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 128 -144 48 -144
WIRE 288 -144 192 -144
WIRE 48 -32 48 -144
WIRE 144 -32 48 -32
WIRE 288 -32 288 -144
WIRE 288 -32 224 -32
WIRE 160 112 160 64
WIRE -192 128 -320 128
WIRE -96 128 -112 128
WIRE 48 128 48 -32
WIRE 48 128 -32 128
WIRE 128 128 48 128
WIRE 288 144 288 -32
WIRE 288 144 192 144
WIRE 128 160 16 160
WIRE -320 176 -320 128
WIRE 16 208 16 160
WIRE 160 240 160 176
SYMBOL res -96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL cap 192 -160 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1p
SYMBOL cap -32 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL voltage 640 -160 R0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage 752 -160 R0
SYMATTR InstName V3
SYMATTR Value -15
SYMBOL OpAmps\\OP07 160 80 R0
SYMATTR InstName U1
SYMBOL res 240 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -320 160 R0
WINDOW 3 24 152 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1k 0 0 0 10000)
SYMATTR Value2 AC 1
FLAG 640 -64 0
FLAG 752 -64 0
FLAG 640 -144 Vdd
FLAG 752 -144 Vss
FLAG 160 64 Vdd
FLAG 160 240 Vss
FLAG -320 256 0
FLAG 16 208 0
TEXT -128 456 Left 2 !.tran 0 1 0.990
TEXT -120 432 Left 2 ;.ac dec 100 1m 100Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\3335662b63dc_HighPeak.asc
* Generated by LTspice 26.0.1 for Windows.
* 2
RLoad 0 out 50
L1 P001 P002 100m
Vin1 in 0 AC 1
RHiBQ1 out P002 {QPot*2k5}
C1 N001 P001 10n
RBoostHi1 N001 in {(1-HiBPot)*10k}
RBoostHi2 out N001 {HiBPot*10k}
.step param HiBPot list 0.0001 0.25 0.5 0.75 0.9999
.step param QPot list 0.0001 0.25 0.5 0.75 1
.ac oct 10000 10 20000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 852
WIRE 32 96 -48 96
WIRE 192 96 112 96
WIRE 288 96 192 96
WIRE 288 128 288 96
WIRE 192 192 192 96
WIRE -48 272 -48 96
WIRE 192 384 192 272
WIRE 240 384 192 384
WIRE 288 384 288 352
WIRE 288 384 240 384
WIRE 320 384 288 384
WIRE 240 416 240 384
WIRE -48 528 -48 352
WIRE 240 528 240 496
IOPIN 320 384 Out
SYMBOL voltage -48 256 R0
WINDOW 3 24 96 Invisible 2
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMATTR InstName Vin1
SYMBOL res 304 368 R180
WINDOW 0 -92 66 Left 2
WINDOW 3 -142 30 Left 2
SYMATTR InstName RHiBQ1
SYMATTR Value {QPot*2k5}
SYMBOL res 256 512 R180
WINDOW 0 36 20 Left 2
WINDOW 3 36 48 Invisible 2
SYMATTR InstName Load
SYMATTR Value 50
SYMBOL ind 272 176 R0
SYMATTR InstName L1
SYMATTR Value 100m
SYMBOL res 208 288 R180
WINDOW 0 36 20 Left 2
WINDOW 3 36 48 Invisible 2
SYMATTR InstName RBoostHi2
SYMATTR Value {HiBPot*10k}
SYMBOL res 128 80 R90
WINDOW 0 0 54 VBottom 2
WINDOW 3 -10 54 Invisible 2
SYMATTR InstName RBoostHi1
SYMATTR Value {(1-HiBPot)*10k}
SYMBOL cap 272 128 R0
SYMATTR InstName C1
SYMATTR Value 10n
FLAG -48 528 0
FLAG -48 96 in
FLAG 240 528 0
FLAG 320 384 out
TEXT -8 80 Left 2 ;2
TEXT 464 136 Left 2 !.step param HiBPot list 0.0001 0.25 0.5 0.75 0.9999
TEXT 464 168 Left 2 !.step param QPot list 0.0001 0.25 0.5 0.75 1
TEXT -176 360 Left 2 !.ac oct 10000 10 20000
* Z:\home\khalils\Downloads\files\data\raw_asc\07f06283736e_StageB_LowPassSallenKey_ADA4177-2.asc
* Generated by LTspice 26.0.1 for Windows.
* This subcircuit is not simulatable. \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4177-2.asy)
C1 OUT N001 330n
C3 N002 REF 22n
R3 P002 IN 1.8k
R1 N001 P002 68
R4 N002 P001 320
XU1 N002 OUT V+ V- OUT ADA4177 ;pnba In+)In-)V+)V-)OUT
R2 P001 N001 3.9k
C2 N002 REF 220n
.lib ADA4177.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 4112 860
WIRE 512 -128 240 -128
WIRE 320 112 320 -32
WIRE 240 128 240 -128
WIRE 288 128 288 112
WIRE 288 128 240 128
WIRE 304 128 288 128
WIRE 512 144 512 -128
WIRE 512 144 352 144
WIRE -208 160 -256 160
WIRE -16 160 -48 160
WIRE 16 160 -16 160
WIRE 208 160 176 160
WIRE 256 160 208 160
WIRE 288 160 256 160
WIRE 304 160 288 160
WIRE 512 160 512 144
WIRE 576 160 512 160
WIRE 608 160 576 160
WIRE 288 176 288 160
WIRE 208 192 208 160
WIRE 256 192 256 160
WIRE 256 256 208 256
WIRE 256 288 256 256
WIRE 320 336 320 176
WIRE -16 400 -16 160
WIRE 176 400 -16 400
WIRE 512 400 512 160
WIRE 512 400 240 400
SYMBOL res 192 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 320
SYMBOL cap 240 192 R0
SYMATTR InstName C2
SYMATTR Value 220n
SYMBOL Opamps\\ADA4177-2 320 144 R0
SYMATTR InstName U1
SYMBOL cap 192 192 R0
SYMATTR InstName C3
SYMATTR Value 22n
SYMBOL res -32 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 68
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 3.9k
SYMBOL cap 240 384 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 330n
SYMBOL res -112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1.8k
FLAG 320 -32 V+
FLAG 320 336 V-
FLAG 576 160 OUT
FLAG -256 160 IN
FLAG 256 288 REF
TEXT -176 504 Left 4 ;This subcircuit is not simulatable.  \nPlease open one of the \n"Filter Design*.asc" schematics to \nsimulate your Filter Wizard design.
* Z:\home\khalils\Downloads\files\data\raw_asc\34c5c32c0db0_nand.asc
* Generated by LTspice 26.0.1 for Windows.
* Parametres requis: \nll=longueur \nwn=largeur_nmos \nwp=largeur_pmos
M2 Q in1 N004 N003 NMOS l={ll} w={2*wn} ad={450n*{wn}} as={450n*{wn}} pd={900n+{wn}} ps={1080n+{wn}}
M1 vdd in1 Q N001 PMOS l={ll} w={wp} ad={450n*{wp}} as={450n*{wp}} pd={900n+{wp}} ps={1080n+{wp}}
M4 N004 in2 vss N005 NMOS l={ll} w={2*wn} ad={450n*{wn}} as={450n*{wn}} pd={900n+{wn}} ps={1080n+{wn}}
M3 vdd in2 Q N002 PMOS l={ll} w={wp} ad={450n*{wp}} as={450n*{wp}} pd={900n+{wp}} ps={1080n+{wp}}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib BU_180nm.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1192 836
WIRE 608 160 448 160
WIRE 448 176 448 160
WIRE 448 240 448 176
WIRE 608 240 608 160
WIRE 448 288 448 256
WIRE 608 288 608 256
WIRE 448 384 448 336
WIRE 608 384 608 336
WIRE 608 384 448 384
WIRE 448 416 448 384
WIRE 448 464 448 416
WIRE 448 544 448 512
WIRE 448 624 448 560
WIRE 448 704 448 672
WIRE 448 752 448 720
SYMBOL nmos4 400 464 R0
SYMATTR InstName M2
SYMATTR Value2 l={ll} w={2*wn} ad={450n*{wn}} as={450n*{wn}} pd={900n+{wn}} ps={1080n+{wn}}
SYMBOL pmos4 400 240 R0
SYMATTR InstName M1
SYMATTR Value2 l={ll} w={wp} ad={450n*{wp}} as={450n*{wp}} pd={900n+{wp}} ps={1080n+{wp}}
SYMBOL nmos4 400 624 R0
SYMATTR InstName M4
SYMATTR Value2 l={ll} w={2*wn} ad={450n*{wn}} as={450n*{wn}} pd={900n+{wn}} ps={1080n+{wn}}
SYMBOL pmos4 560 240 R0
SYMATTR InstName M3
SYMATTR Value2 l={ll} w={wp} ad={450n*{wp}} as={450n*{wp}} pd={900n+{wp}} ps={1080n+{wp}}
FLAG 448 176 vdd
FLAG 448 416 Q
FLAG 400 320 in1
FLAG 560 320 in2
FLAG 400 544 in1
FLAG 400 704 in2
FLAG 448 752 vss
TEXT -264 120 Left 2 !.lib BU_180nm.lib
TEXT 936 136 Left 2 ;Parametres requis: \nll=longueur \nwn=largeur_nmos \nwp=largeur_pmos
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7172.asc
* Generated by LTspice 26.0.1 for Windows.
C2 0 N001 1n
V1 IN 0 3.5
Rload OUT 0 2.5
C1 OUT 0 4.7 Rser=1.5m
R1 OUT N002 15K
R2 N002 0 10K
XU1 IN N002 IN N001 OUT 0 ADM7172 ;pnba Vin)Sense)EN)SS)Vout)GND
.tran 5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7172.asy)
.lib ADM7172.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 400 32 352 32
WIRE 528 32 400 32
WIRE 624 32 528 32
WIRE -32 48 -32 32
WIRE 528 48 528 32
WIRE 624 48 624 32
WIRE 400 80 400 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 528 144 528 112
WIRE 624 144 624 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 400 224 400 160
WIRE 400 224 352 224
WIRE 400 240 400 224
WIRE 224 304 224 288
WIRE 400 336 400 320
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 624 144 0
FLAG 528 144 0
FLAG -32 32 IN
FLAG 624 32 OUT
FLAG 400 336 0
SYMBOL cap 16 208 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.5
SYMBOL res 608 32 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL cap 512 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 384 64 R0
SYMATTR InstName R1
SYMATTR Value 15K
SYMBOL res 384 224 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL ADM7172 224 128 R0
SYMATTR InstName U1
TEXT 568 288 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\995fffebf1b2_Basic_opamp1.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain stage and limiter
* Lowpass
* Output resistance
* Basic Opamp Subcircuit
* Model with infinite power supply rejection (PSRR)
* opamp2
XU1 in 0 V+ V- out opatyp1 ;pnba In+)In-)V+)V-)OUT
R1 out0 0 1k
C1 out0 0 1p
VS in 0 0
Rout out 0 {ROUT}
B1 out0 0 I=1m*limit(V(vm), GAIN*V(ip,im), V(vp))
G1 out 0 out0 0 {1/ROUT}
V2 V- 0 5
V1 V+ 0 -5
.subckt opatyp1 ip im vp vm out
.param GAIN=10000
.param ROUT=10
.ends
.dc VS -10m 10m 0.1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1504 680
WIRE 128 128 128 112
WIRE 96 144 64 144
WIRE 256 160 160 160
WIRE -16 176 -32 176
WIRE 96 176 -16 176
WIRE -32 192 -32 176
WIRE 128 208 128 192
WIRE -32 288 -32 272
WIRE -32 400 -32 384
WIRE 112 400 112 384
WIRE -32 496 -32 480
WIRE 112 496 112 480
LINE Normal 160 224 256 288
LINE Normal 176 256 160 224
LINE Normal 160 224 176 256
LINE Normal 192 224 160 224
SYMBOL voltage -32 176 R0
SYMATTR InstName VS
SYMATTR Value 0
SYMBOL Opamps\\opamp2 128 96 R0
SYMATTR InstName U1
SYMATTR Value opatyp1
SYMBOL voltage 112 384 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -32 384 R0
SYMATTR InstName V1
SYMATTR Value -5
FLAG 64 144 0
FLAG 128 112 V+
FLAG 128 208 V-
FLAG -32 288 0
FLAG -32 496 0
FLAG 112 496 0
FLAG -32 384 V+
FLAG 112 384 V-
FLAG 256 160 out
FLAG -16 176 in
TEXT 368 136 Left 0 !.subckt opatyp1 ip im vp vm out\n.param GAIN=10000\n.param ROUT=10\n* Gain stage and limiter\nB1 out0 0 I=1m*limit(V(vm), GAIN*V(ip,im), V(vp))\n* Lowpass\nR1 out0 0 1k\nC1 out0 0 1p\n* Output resistance\nG1 out 0 out0 0 {1/ROUT}\nRout out 0 {ROUT}\n.ends
TEXT -88 32 Left 0 !.dc VS -10m 10m 0.1m
TEXT -88 -24 Left 0 ;Basic Opamp Subcircuit
TEXT 280 72 Left 0 ;Model with infinite power supply rejection (PSRR)
TEXT 216 304 Left 0 ;opamp2
* Z:\home\khalils\Downloads\files\data\raw_asc\LT4422.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT4422.asy)
XU1 IN IN OUT NC_01 0 LT4422 ;pnba SHDN#)IN)OUT)STATUS)GND
V1 IN 0 12
C2 OUT 0 47
C1 IN 0 0.1
R1 OUT 0 2
.tran 1m startup
.lib LT4422.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -192 96 -208 96
WIRE -96 96 -192 96
WIRE -32 96 -96 96
WIRE 16 96 -32 96
WIRE 608 96 480 96
WIRE 688 96 608 96
WIRE 720 96 688 96
WIRE -208 144 -208 96
WIRE 608 144 608 96
WIRE 720 144 720 96
WIRE -96 160 -96 96
WIRE -32 176 -32 96
WIRE 16 176 -32 176
WIRE 608 256 608 208
WIRE 720 256 720 224
WIRE -208 272 -208 224
WIRE -96 272 -96 224
WIRE 240 336 240 272
SYMBOL voltage -208 128 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap -112 160 R0
SYMATTR InstName C1
SYMATTR Value 0.1
SYMBOL res 704 128 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL cap 592 144 R0
SYMATTR InstName C2
SYMATTR Value 47
SYMBOL LT4422 240 160 R0
SYMATTR InstName U1
FLAG 240 336 0
FLAG -96 272 0
FLAG 608 256 0
FLAG -208 272 0
FLAG -192 96 IN
FLAG 688 96 OUT
FLAG 720 256 0
TEXT -216 360 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\7e2e3401fcb0_Oscillator.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N002 0 PULSE(0 9 1 1e-6 1e-6 3 0 1) Rser=1
R1 N002 N005 100e3
L2 N002 N003 150e-3 Rser=90
Q1 N004 N005 0 0 2N2222
D1 N003 N004 QTLP690C
L1 N001 N002 150e-3 Rser=90
C1 N001 N005 100e-6 V=50 Rser=10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2264 1356
WIRE 800 -48 576 -48
WIRE 448 64 -48 64
WIRE 800 64 800 32
WIRE 800 64 448 64
WIRE 800 96 800 64
WIRE -48 208 -48 64
WIRE 448 208 448 64
WIRE 576 224 576 -48
WIRE 800 240 800 176
WIRE -48 352 -48 288
WIRE 800 384 800 304
WIRE 448 432 448 288
WIRE 576 432 576 288
WIRE 576 432 448 432
WIRE 736 432 576 432
WIRE 800 528 800 480
SYMBOL res 432 192 R0
SYMATTR InstName R1
SYMATTR Value 100e3
SYMBOL cap 560 224 R0
SYMATTR InstName C1
SYMATTR Value 100e-6
SYMATTR SpiceLine V=50 Rser=10
SYMBOL ind2 784 80 R0
SYMATTR InstName L2
SYMATTR Value 150e-3
SYMATTR Type ind
SYMATTR SpiceLine Rser=90
SYMBOL LED 784 240 R0
SYMATTR InstName D1
SYMATTR Value QTLP690C
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage -48 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=1
SYMATTR InstName V1
SYMATTR Value PULSE(0 9 1 1e-6 1e-6 3 0 1)
SYMBOL ind2 784 -64 R0
SYMATTR InstName L1
SYMATTR Value 150e-3
SYMATTR Type ind
SYMATTR SpiceLine Rser=90
SYMBOL npn 736 384 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
FLAG 800 528 0
FLAG -48 352 0
TEXT -56 440 Left 2 !.tran 10
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1084-12.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1084-12.asy)
C1 OUT 0 10
V1 IN 0 PWL(0 0 1 20) Rser=0.1
Rload OUT 0 20
XU1 0 OUT IN LT1084-12 ;pnba GND)OUT)IN
.tran 1
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1344 896
WIRE 1872 896 1808 896
WIRE 2000 896 1872 896
WIRE 1344 912 1344 896
WIRE 1872 912 1872 896
WIRE 2000 912 2000 896
WIRE 1344 1008 1344 992
WIRE 1872 1008 1872 976
WIRE 2000 1008 2000 992
WIRE 1680 1024 1680 992
SYMBOL PowerProducts\\LT1084-12 1680 896 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1344 896 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 20)
SYMATTR SpiceLine Rser=0.1
SYMBOL RES 1984 896 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL cap 1856 912 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 2000 896 OUT
FLAG 2000 1008 0
FLAG 1344 1008 0
FLAG 1872 1008 0
FLAG 1344 896 IN
FLAG 1680 1024 0
TEXT 1960 1064 Left 2 !.tran 1