Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\caa8fb22086d_control.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N001 N002 50
D1 N001 N002 1N4007
V2 N001 0 6V
V1 N003 0 3.3V
R1 N004 N003 100
Q1 N002 N004 0 0 2N2222
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 1 0 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 656 -224 480 -224
WIRE 480 -96 480 -144
WIRE 560 -96 480 -96
WIRE 560 -16 560 -32
WIRE 560 -16 480 -16
WIRE 480 112 480 -16
WIRE 256 160 112 160
WIRE 416 160 336 160
WIRE 32 384 32 160
WIRE 480 384 480 208
WIRE 480 384 32 384
WIRE 656 384 656 -224
WIRE 656 384 480 384
WIRE 480 416 480 384
SYMBOL res 352 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 464 -112 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL npn 416 112 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL diode 544 -96 R0
SYMATTR InstName D1
SYMATTR Value 1N4007
SYMBOL voltage 128 160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value 3.3V
SYMBOL voltage 480 -128 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 6V
FLAG 480 416 0
TEXT 26 440 Left 2 !.tran 0 1 0 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\1656eaa37e0e_ADA4830.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4830.asy)
V5 N005 0 PULSE(0 3 1u 1n 1n 10u 20u)
R1 N001 N002 5K
V3 N004 0 SINE(0 1 1Meg)
V4 N003 0 2.5
R2 OUT 0 1K
XU1 N003 N004 0 N001 0 N005 N002 OUT ADA4830 ;pnba VREF)IN+)IN-)V+)V-)ENA)STB)OUT
V1 N001 0 5
.tran 100u
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1256 680
WIRE 16 16 -128 16
WIRE 64 16 16 16
WIRE -128 32 -128 16
WIRE 64 32 64 16
WIRE 16 112 16 16
WIRE -128 128 -128 112
WIRE 64 128 64 112
WIRE -16 160 -32 160
WIRE -16 192 -336 192
WIRE 336 192 192 192
WIRE -336 208 -336 192
WIRE 336 208 336 192
WIRE -16 224 -208 224
WIRE -208 240 -208 224
WIRE 16 288 16 272
WIRE 64 288 64 272
WIRE -336 304 -336 288
WIRE 336 304 336 288
WIRE -208 336 -208 320
WIRE 64 384 64 368
SYMBOL voltage -128 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -208 224 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR Value SINE(0 1 1Meg)
SYMATTR InstName V3
SYMBOL voltage 64 272 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR Value PULSE(0 3 1u 1n 1n 10u 20u)
SYMATTR InstName V5
SYMBOL ADA4830 48 192 R0
WINDOW 0 50 -38 Left 2
SYMATTR InstName U1
SYMBOL res 48 16 R0
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL voltage -336 192 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName V4
SYMATTR Value 2.5
SYMBOL res 320 192 R0
SYMATTR InstName R2
SYMATTR Value 1K
FLAG 16 288 0
FLAG 336 192 OUT
FLAG -336 304 0
FLAG -208 336 0
FLAG -128 128 0
FLAG 336 304 0
FLAG 64 384 0
FLAG -32 160 0
TEXT 328 416 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1419.asc
* Generated by LTspice 26.0.1 for Windows.
V1 V+ 0 {Vdd}
V6 vEN 0 3.3
R1 vD 0 301
C1 vD 0 36p
V2 V- 0 {-Vdd}
V5 vIN 0 PULSE(0 3.3 0 10n 10n 10u 20u)
V4 vSA 0 10
V3 vSB 0 -10
XU1 0 V+ vIN vEN vD vSA vSB V- ADG1419 ;pnba GND)VDD)IN)EN)D)SA)SB)VSS
.tran 100u
* Notes:
.param Vdd = 15
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1419.asy)
.lib ADG1419.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2244 1360
WIRE 1088 -288 1072 -288
WIRE 1072 -224 1072 -288
WIRE 256 -208 240 -208
WIRE 272 -208 256 -208
WIRE 464 -208 448 -208
WIRE 480 -208 464 -208
WIRE 800 -160 736 -160
WIRE 928 -160 880 -160
WIRE 976 -160 928 -160
WIRE 240 -144 240 -208
WIRE 448 -144 448 -208
WIRE 1200 -128 1168 -128
WIRE 1360 -128 1200 -128
WIRE 1456 -128 1360 -128
WIRE 640 -96 592 -96
WIRE 928 -96 720 -96
WIRE 976 -96 928 -96
WIRE 1360 -48 1360 -128
WIRE 928 -32 768 -32
WIRE 976 -32 928 -32
WIRE 1200 -32 1168 -32
WIRE 1264 -32 1200 -32
WIRE 1456 -32 1456 -128
WIRE 240 -16 240 -64
WIRE 448 -16 448 -64
WIRE 1264 -16 1264 -32
WIRE 768 0 768 -32
WIRE 768 112 768 80
WIRE 1008 112 1008 80
WIRE 1008 112 976 112
WIRE 1136 112 1136 80
WIRE 1264 112 1264 64
WIRE 1360 112 1360 32
WIRE 1456 112 1456 32
FLAG 448 -16 0
FLAG 1264 112 0
FLAG 1360 112 0
FLAG 1456 112 0
FLAG 1136 112 0
FLAG 240 -16 0
FLAG 768 112 0
FLAG 736 -160 0
FLAG 592 -96 0
FLAG 464 -208 V+
FLAG 256 -208 V-
FLAG 1088 -288 V+
FLAG 976 112 V-
FLAG 1200 -128 vD
FLAG 928 -160 vSA
FLAG 928 -96 vSB
FLAG 928 -32 vIN
FLAG 1200 -32 vEN
SYMBOL voltage 448 -160 R0
WINDOW 0 64 60 Bottom 2
WINDOW 3 70 85 Top 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vdd}
SYMBOL voltage 1264 -32 R0
WINDOW 0 18 8 Left 2
WINDOW 3 15 104 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 3.3
SYMBOL res 1344 -64 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL cap 1440 -32 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage 240 -160 R0
WINDOW 0 61 59 Bottom 2
WINDOW 3 65 84 Top 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value {-Vdd}
SYMBOL voltage 768 -16 R0
WINDOW 0 18 8 Left 2
WINDOW 3 -485 107 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value PULSE(0 3.3 0 10n 10n 10u 20u)
SYMBOL voltage 896 -160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 10
SYMBOL voltage 736 -96 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -10
SYMBOL ADG1419 1072 -80 R0
SYMATTR InstName U1
TEXT 1416 224 Left 2 !.tran 100u
TEXT 32 -696 Left 2 ;Notes:
TEXT 32 -392 Left 2 !.param Vdd = 15
RECTANGLE Normal 768 -432 16 -720 2
* Z:\home\khalils\Downloads\files\data\raw_asc\295e110d07ca_AD8034.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8034.asy)
V1 +V 0 10
Vin IN 0 SINE(0 1 100K)
XU1 IN N001 +V -V OUT AD8033 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 1K
Rload OUT 0 10K
V2 -V 0 -10
R2 OUT N001 1K
.tran 100u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 160 -1152 160 -1168
WIRE 272 -1152 272 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 736 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 736 -1088 736 -1104
WIRE 432 -1072 432 -1088
WIRE 160 -1040 160 -1072
WIRE 272 -1040 272 -1072
WIRE 736 -992 736 -1008
WIRE 432 -976 432 -992
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 720 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 272 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -10
SYMBOL Opamps\\AD8034 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100K)
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 160 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 10
FLAG 160 -1168 +V
FLAG 432 -976 0
FLAG 736 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 272 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 736 -992 0
FLAG 272 -1040 0
FLAG 160 -1040 0
TEXT 664 -944 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\2c9605364dc6_transformer_sim.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N004 0 10
L3 0 N003 .00492
K L1 L3 0.99925
V1 N001 0 SINE(0 3.45 1k) Rser=0.000001
R1 0 N003 1
L1 N004 N002 .65
R2 N002 N001 10
.tran .0001 .100
.meas REP MAX((V(N001) - V(N002)) / I(R2))
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1064 680
WIRE 256 240 176 240
WIRE 480 240 336 240
WIRE 800 240 640 240
WIRE 960 240 880 240
WIRE 176 288 176 240
WIRE 480 288 480 240
WIRE 640 288 640 240
WIRE 176 432 176 368
WIRE 240 432 176 432
WIRE 480 432 480 368
WIRE 480 432 336 432
WIRE 640 432 640 368
WIRE 960 432 960 240
WIRE 960 432 640 432
WIRE 336 448 336 432
WIRE 176 464 176 432
WIRE 640 464 640 432
WIRE 640 464 416 464
WIRE 240 560 240 432
WIRE 336 560 336 528
WIRE 336 560 240 560
WIRE 416 560 416 464
WIRE 416 560 336 560
SYMBOL ind2 496 384 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value .65
SYMATTR Type ind
SYMBOL Res 896 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL Res 352 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL Voltage 176 272 R0
SYMATTR InstName V1
SYMATTR Value SINE(0 3.45 1k)
SYMATTR SpiceLine Rser=0.000001
SYMBOL ind2 656 384 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L3
SYMATTR Value .00492
SYMATTR Type ind
SYMBOL res 320 432 R0
SYMATTR InstName R3
SYMATTR Value 10
FLAG 176 464 0
TEXT 504 256 Left 2 !K L1 L3 0.99925
TEXT 480 504 Left 2 !.tran .0001 .100
TEXT 448 576 Left 2 !.meas REP MAX((V(N001) - V(N002)) / I(R2))
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3448.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N002 OUT OUT IN N001 0 MP_01 IN 0 LTC3448 ;pnba FB)Vout)Mode)Vin)SW)FREQ))RUN)GND
V1 IN 0 3.3
L1 N001 OUT 2.2
R1 OUT N002 474K
R2 N002 0 316K
C1 OUT N002 22p
C2 OUT 0 15
Rload OUT 0 2.5
.tran 200u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3448.asy)
.lib LTC3448.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 928 680
WIRE 32 48 -48 48
WIRE 48 48 32 48
WIRE 368 48 336 48
WIRE 528 48 448 48
WIRE 608 48 528 48
WIRE 688 48 608 48
WIRE -48 64 -48 48
WIRE 608 64 608 48
WIRE 688 64 688 48
WIRE 32 144 32 48
WIRE 48 144 32 144
WIRE 384 144 336 144
WIRE 448 144 384 144
WIRE 528 144 528 48
WIRE 528 144 448 144
WIRE -48 160 -48 144
WIRE 448 160 448 144
WIRE 608 160 608 128
WIRE 688 160 688 144
WIRE 48 240 32 240
WIRE 448 240 448 224
WIRE 448 240 336 240
WIRE 528 240 528 224
WIRE 528 240 448 240
WIRE 528 256 528 240
WIRE 48 336 32 336
WIRE 384 336 384 144
WIRE 384 336 336 336
WIRE 528 352 528 336
FLAG -48 160 0
FLAG 32 240 0
FLAG 528 352 0
FLAG 32 336 0
FLAG 608 160 0
FLAG 688 160 0
FLAG -48 48 IN
FLAG 688 48 OUT
SYMBOL PowerProducts\\LTC3448 192 192 R0
SYMATTR InstName U1
SYMBOL voltage -48 48 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL ind 352 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL res 512 128 R0
SYMATTR InstName R1
SYMATTR Value 474K
SYMBOL res 512 240 R0
SYMATTR InstName R2
SYMATTR Value 316K
SYMBOL cap 432 160 R0
SYMATTR InstName C1
SYMATTR Value 22p
SYMBOL cap 592 64 R0
SYMATTR InstName C2
SYMATTR Value 15
SYMBOL res 672 48 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
TEXT 464 408 Left 2 !.tran 200u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\98d4371d11e7_Draft2N.asc
* Generated by LTspice 26.0.1 for Windows.
VUDS N001 0 0.9
M1 N001 VG 0 0 nch l=lset w=wset
VGS2 VG 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib cmos018.txt
.dc VGS2 0 1 1m
.param wset=table(n, 1,0.22u, 2,1u, 3,2u, 4,2u, 5,5u, 6,5u, 7,10u, 8,10u, 9,40u)
.param lset=table(n, 1,0.18u, 2,0.5u, 3,0.5u, 4,1u, 5,1u, 6,2u, 7,5u, 8,10u, 9,10u)
.step param n 1 9 1
.meas DC UTH FIND V(VG) WHEN Id(M1)=100n*wset/lset
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1356 680
WIRE 544 176 224 176
WIRE 224 224 224 176
WIRE 544 224 544 176
WIRE 240 272 224 272
WIRE 80 304 32 304
WIRE 176 304 80 304
WIRE 32 320 32 304
WIRE 240 320 240 272
WIRE 240 320 224 320
WIRE 224 416 224 320
WIRE 544 416 544 304
SYMBOL voltage 32 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS2
SYMATTR Value 1
SYMBOL nmos4 176 224 R0
WINDOW 0 71 23 Left 2
WINDOW 3 72 48 Left 2
WINDOW 123 71 80 Left 2
SYMATTR InstName M1
SYMATTR Value nch
SYMATTR Value2 l=lset w=wset
SYMBOL voltage 544 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName UDS
SYMATTR Value 0.9
FLAG 224 416 0
FLAG 544 416 0
FLAG 80 304 VG
FLAG 32 400 0
TEXT -40 -64 Left 2 !.lib cmos018.txt
TEXT -40 96 Left 2 !.dc VGS2 0 1 1m
TEXT -40 -16 Left 2 !.param wset=table(n, 1,0.22u, 2,1u, 3,2u, 4,2u, 5,5u, 6,5u, 7,10u, 8,10u, 9,40u)\n.param lset=table(n, 1,0.18u, 2,0.5u, 3,0.5u, 4,1u, 5,1u, 6,2u, 7,5u, 8,10u, 9,10u)\n.step param n 1 9 1\n.meas DC UTH FIND V(VG) WHEN Id(M1)=100n*wset/lset
* Z:\home\khalils\Downloads\files\data\raw_asc\3e897243c102_zero_gain_ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
* Zero Gain Amplifier
R2 2+ 2_+ 47
V1 W1 0 PWL REPEAT FOREVER (0 0 0.5m 3 1m 0) ENDREPEAT
Q1 2_+ 2+ 0 0 2N3904
R1 W1 2+ 2.2k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -224 208 -272
WIRE 208 -224 128 -224
WIRE -240 -176 -240 -224
WIRE 208 -176 208 -224
WIRE -240 -48 -240 -96
WIRE 208 -48 208 -96
WIRE 208 -48 96 -48
WIRE 208 -32 208 -48
WIRE 288 -32 208 -32
WIRE 208 -16 208 -32
WIRE 208 80 208 64
WIRE 288 80 208 80
WIRE 208 112 208 80
WIRE 96 160 96 -48
WIRE 144 160 96 160
WIRE 208 288 208 208
IOPIN 128 -224 In
IOPIN -240 -224 In
IOPIN 208 -272 In
IOPIN 288 -32 In
IOPIN 288 80 In
SYMBOL res 192 -32 R0
SYMATTR InstName R2
SYMATTR Value 47
SYMBOL npn 144 112 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 192 -192 R0
SYMATTR InstName R1
SYMATTR Value 2.2k
SYMBOL voltage -240 -192 R0
WINDOW 3 -455 192 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PWL REPEAT FOREVER (0 0 0.5m 3 1m 0) ENDREPEAT
SYMATTR InstName V1
FLAG 208 288 0
FLAG 128 -224 W1
FLAG -240 -48 0
FLAG -240 -224 W1
FLAG 208 -272 1+
FLAG 288 -32 2+
FLAG 288 80 2_+
TEXT -136 296 Left 2 !.tran 10m
TEXT -32 -416 Left 2 ;Zero Gain Amplifier
* Z:\tmp\asc_dec_bjh7r6w2\18b591caab38_ADuM4136_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N004 N006 0 0 BSC12DN20NS3
V1 N005 0 PULSE(0 5 0 2n 2n 5u 10u)
V4 N001 0 PULSE(80 100 15.5u 20u 1u 2u)
R6 N003 N002 1K
R4 N008 N007 10K
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1592 680
WIRE 1008 -144 864 -144
WIRE 864 -128 864 -144
WIRE 1008 -112 1008 -144
WIRE 528 -16 400 -16
WIRE 608 -16 528 -16
WIRE 720 -16 688 -16
WIRE 864 -16 864 -48
WIRE 864 -16 784 -16
WIRE 1008 -16 1008 -32
WIRE 864 16 864 -16
WIRE 64 64 -416 64
WIRE -416 80 -416 64
WIRE 816 96 512 96
WIRE 64 144 48 144
WIRE 864 144 864 112
WIRE -416 176 -416 160
WIRE -80 224 -80 -144
WIRE -64 224 -80 224
WIRE 64 224 16 224
WIRE -80 304 -80 224
WIRE -32 304 -80 304
WIRE 64 304 48 304
WIRE 176 384 176 368
SYMBOL nmos 816 16 R0
SYMATTR InstName M1
SYMATTR Value BSC12DN20NS3
SYMBOL voltage -416 64 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PULSE(0 5 0 2n 2n 5u 10u)
SYMATTR InstName V1
SYMBOL voltage 1008 -128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(80 100 15.5u 20u 1u 2u)
SYMBOL res 704 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 1K
SYMBOL res 32 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10K
FLAG 528 48 0
FLAG 176 384 0
FLAG 48 144 0
FLAG -416 176 0
FLAG 864 144 0
FLAG 1008 -16 0
* Z:\home\khalils\Downloads\files\data\raw_asc\044a6beec16e_ADG1612.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 -V 0 -5
V3 N001 0 4
V4 N003 0 pulse(0 3.3 0 1u 1u 5m 10m)
R1 N002 0 1k
XU1 N003 N001 N002 -V +V 0 ADG1612 ;pnba IN)S)D)Vss)Vdd)GND
.tran 30m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1612.asy)
.lib ADG1612.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -96
WIRE -544 -16 -544 -32
WIRE -400 0 -432 0
WIRE -240 0 -320 0
WIRE 0 0 -48 0
WIRE 0 16 0 0
WIRE -240 64 -336 64
WIRE -544 80 -544 64
WIRE 0 112 0 96
WIRE -544 176 -544 160
WIRE -336 192 -336 64
WIRE -208 192 -208 176
WIRE -80 192 -80 176
WIRE -544 272 -544 256
WIRE -336 304 -336 272
FLAG -544 272 0
FLAG -544 80 0
FLAG -544 -32 +V
FLAG -544 160 -V
FLAG -432 0 0
FLAG -208 192 -V
FLAG -144 -96 +V
FLAG -80 192 0
FLAG -336 304 0
FLAG 0 112 0
SYMBOL voltage -544 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -544 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -304 0 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 4
SYMBOL voltage -336 176 R0
SYMATTR InstName V4
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL Switches\\ADG1612 -144 48 R0
SYMATTR InstName U1
TEXT 16 176 Left 2 !.tran 30m
* Z:\tmp\asc_dec_bjh7r6w2\0d6009edb94b_1674_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R7 N006 N007 200
XU2 NC_01 N002 NC_02 NC_03 NC_04 NC_05 NC_06 NC_07 NC_08 NC_09 NC_10 NC_11 N001 NC_12 LT1674 ;pnba +INA)-INA)OUTA)V+)V-)+INB)-INB)OUTB)+INC)-INC)OUTC)+IND)-IND)OUTD
Q1 N006 N004 DISCHARGE 0 2N3904
V2 +V 0 12
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1674.asy)
.lib LT1674.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 0 64 -432 64
WIRE 16 64 0 64
WIRE 496 64 112 64
WIRE 496 80 496 64
WIRE -96 160 -112 160
WIRE 0 160 0 64
WIRE 0 160 -16 160
WIRE 16 160 0 160
WIRE -192 176 -192 160
WIRE 304 176 304 160
WIRE 496 176 496 160
WIRE -112 192 -112 160
WIRE -112 192 -160 192
WIRE -224 208 -304 208
WIRE 416 208 336 208
WIRE -112 224 -160 224
WIRE -192 256 -192 240
WIRE -112 256 -112 224
WIRE -96 256 -112 256
WIRE 16 256 96 160
WIRE 16 256 -16 256
WIRE 96 256 16 160
WIRE 304 256 304 240
WIRE -112 288 -112 256
WIRE -304 336 -304 208
WIRE -176 336 -304 336
WIRE 416 336 416 208
WIRE -112 400 -112 384
WIRE -80 400 -112 400
WIRE -112 416 -112 400
SYMBOL res -112 240 M90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R7
SYMATTR Value 200
SYMBOL opamps\\LT1674 -192 208 M0
SYMATTR InstName U2
SYMBOL npn -176 288 R0
WINDOW 0 42 -2 Right 0
WINDOW 3 38 103 Right 0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL misc\\battery 496 64 R0
SYMATTR InstName V2
SYMATTR Value 12
FLAG 304 160 +V
FLAG 496 64 +V
FLAG 304 256 0
FLAG -192 160 +V
FLAG -192 256 0
FLAG 496 176 0
FLAG -80 400 DISCHARGE
* Z:\home\khalils\Downloads\files\data\raw_asc\4d8f1dd38f0d_Diodo_1N5819_trans.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 0 1N5819
V1 N001 N002 SINE(0 0.5 30 0 0 0 0) Rser=0
R1 0 N002 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 33.333m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 128 80 128
WIRE 192 144 192 128
WIRE 80 192 80 128
WIRE 192 224 192 208
WIRE 288 224 192 224
WIRE 192 240 192 224
WIRE 288 240 288 224
WIRE 80 336 80 272
WIRE 192 336 192 320
WIRE 192 336 80 336
SYMBOL voltage 80 176 R0
WINDOW 3 24 96 Invisible 2
WINDOW 123 0 0 Left 0
SYMATTR Value SINE(0 0.5 30 0 0 0 0)
SYMATTR InstName V1
SYMATTR SpiceLine Rser=0
SYMBOL schottky 176 144 R0
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 176 224 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 288 240 0
TEXT 112 368 Left 2 !.tran 33.333m
* Z:\home\khalils\Downloads\files\data\raw_asc\2760476c45d6_jikken2_denryukikan.asc
* Generated by LTspice 26.0.1 for Windows.
;ac dec 100 1 1000MEG
RL Vcc N001 818
R4 N004 0 181.81
CE N004 0 1686
R1 Vcc N003 15.2k
Vcc Vcc 0 10V
C2 V2 N001 100
V1 N002 0 SINE(0 10m 1kHz) AC 1V
Q1 N001 N003 N004 0 2SC1815-Y
C1 N003 N002 100
Ri V2 0 1k
R2 N003 0 3.4k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 3ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE 256 -208 64 -208
WIRE 416 -208 256 -208
WIRE 256 -112 256 -208
WIRE 64 -32 64 -208
WIRE 256 32 256 -32
WIRE 416 32 256 32
WIRE 608 32 480 32
WIRE 704 32 608 32
WIRE 256 112 256 32
WIRE -80 160 -176 160
WIRE 64 160 64 48
WIRE 64 160 -16 160
WIRE 192 160 64 160
WIRE 896 160 896 32
WIRE 608 192 608 32
WIRE -176 272 -176 160
WIRE 64 272 64 160
WIRE 256 272 256 208
WIRE 400 272 256 272
WIRE 256 304 256 272
WIRE 400 320 400 272
WIRE 896 320 896 240
WIRE -176 512 -176 352
WIRE 64 512 64 352
WIRE 256 512 256 384
WIRE 400 512 400 384
WIRE 608 512 608 272
IOPIN 704 32 Out
SYMBOL res 48 256 R0
SYMATTR InstName R2
SYMATTR Value 3.4k
SYMBOL res 240 -128 R0
SYMATTR InstName RL
SYMATTR Value 818
SYMBOL cap 384 320 R0
SYMATTR InstName CE
SYMATTR Value 1686u
SYMBOL voltage 896 144 R0
SYMATTR InstName Vcc
SYMATTR Value 10V
SYMBOL voltage -176 256 R0
WINDOW 3 -123 88 Top 2
WINDOW 123 -113 64 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 10m 1kHz)
SYMATTR Value2 AC 1V
SYMATTR InstName V1
SYMBOL npn 192 112 R0
SYMATTR InstName Q1
SYMATTR Value 2SC1815-Y
SYMBOL res 592 176 R0
SYMATTR InstName Ri
SYMATTR Value 1k
SYMBOL res 240 288 R0
SYMATTR InstName R4
SYMATTR Value 181.81
SYMBOL cap 480 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 100u
SYMBOL cap -16 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100u
SYMBOL res 48 -48 R0
SYMATTR InstName R1
SYMATTR Value 15.2k
FLAG -176 512 0
FLAG 64 512 0
FLAG 256 512 0
FLAG 608 512 0
FLAG 400 512 0
FLAG 896 320 0
FLAG 896 32 Vcc
FLAG 416 -208 Vcc
FLAG 704 32 V2
TEXT -224 -144 Left 2 !;ac dec 100 1 1000MEG
TEXT -184 -88 Left 2 !.tran 3ms