Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3642.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3642.asy)
V1 IN 0 45
XU1 N001 IN NC_01 NC_02 IN N002 NC_03 0 LTC3642 ;pnba SW)Vin)Iset)SS)Run)FB)Hyst)GND
C1 OUT 0 10
Rload OUT 0 100
L1 N001 OUT 150
R1 OUT N002 4.2Meg
R2 N002 0 800K
.tran 2.5m startup
.lib LTC3642.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 80 0 80
WIRE 112 80 96 80
WIRE 352 80 336 80
WIRE 448 80 432 80
WIRE 576 80 448 80
WIRE 656 80 576 80
WIRE 0 96 0 80
WIRE 576 96 576 80
WIRE 656 96 656 80
WIRE 96 176 96 80
WIRE 112 176 96 176
WIRE 448 176 448 160
WIRE 448 176 336 176
WIRE 0 192 0 176
WIRE 448 192 448 176
WIRE 576 192 576 160
WIRE 656 192 656 176
WIRE 448 288 448 272
WIRE 352 368 336 368
SYMBOL res 432 176 R0
SYMATTR InstName R2
SYMATTR Value 800K
SYMBOL res 432 64 R0
SYMATTR InstName R1
SYMATTR Value 4.2Meg
SYMBOL voltage 0 80 R0
SYMATTR InstName V1
SYMATTR Value 45
SYMBOL ind 336 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMBOL cap 560 96 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LTC3642 224 224 R0
SYMATTR InstName U1
SYMBOL res 640 80 R0
SYMATTR InstName Rload
SYMATTR Value 100
FLAG 0 192 0
FLAG 352 368 0
FLAG 448 288 0
FLAG 576 192 0
FLAG 656 192 0
FLAG 0 80 IN
FLAG 656 80 OUT
TEXT 448 360 Left 2 !.tran 2.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3302C.asc
* Generated by LTspice 26.0.1 for Windows.
* The output voltage is adjustable from \n0.5V to 3.65V in 50mV increments.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3302C.asy)
XU1 IN N001 N003 OUT 0 0 N001 N002 N001 LTC3302C Vout_trim=1.8 ;pnba VIN)EN)SW)VOUT)AGND)PGND)AVIN)PGOOD)MODE/SYNC
R1 OUT N002 500K
V1 IN 0 4
C1 OUT 0 10 m=2 Rser=10m
Rload OUT 0 0.9
L1 N003 OUT 330n Rser=2m
C2 N001 0 1
.tran 1.5m startup
.lib LTC3302C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2652 1844
WIRE 1376 1248 1344 1248
WIRE 1712 1248 1376 1248
WIRE 1344 1264 1344 1248
WIRE 1712 1296 1712 1248
WIRE 1344 1360 1344 1344
WIRE 1488 1360 1424 1360
WIRE 1552 1360 1488 1360
WIRE 1904 1360 1872 1360
WIRE 2016 1360 1984 1360
WIRE 1424 1376 1424 1360
WIRE 1424 1456 1424 1440
WIRE 1488 1472 1488 1360
WIRE 1552 1472 1488 1472
WIRE 1904 1472 1872 1472
WIRE 2016 1472 2016 1360
WIRE 2016 1472 1984 1472
WIRE 2112 1472 2016 1472
WIRE 2160 1472 2112 1472
WIRE 2208 1472 2160 1472
WIRE 2112 1488 2112 1472
WIRE 2208 1488 2208 1472
WIRE 1488 1584 1488 1472
WIRE 1552 1584 1488 1584
WIRE 2016 1584 2016 1472
WIRE 2016 1584 1872 1584
WIRE 2112 1584 2112 1552
WIRE 2208 1584 2208 1568
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
SYMBOL cap 2096 1488 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 m=2
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=10m
SYMBOL LTC3302C 1712 1456 R0
WINDOW 39 -99 368 Center 2
SYMATTR InstName U1
SYMBOL res 2000 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 500K
SYMBOL cap 1408 1376 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL VOLTAGE 1344 1248 R0
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL res 2192 1472 R0
SYMATTR InstName Rload
SYMATTR Value 0.9
SYMBOL ind 1888 1488 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 330n
SYMATTR SpiceLine Rser=2m
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1344 1360 0
FLAG 2208 1584 0
FLAG 2112 1584 0
FLAG 1376 1248 IN
FLAG 2160 1472 OUT
FLAG 1424 1456 0
TEXT 2024 1736 Left 2 !.tran 1.5m startup
TEXT 1528 1768 Left 2 ;The output voltage is adjustable from \n0.5V to 3.65V in 50mV increments.
* Z:\home\khalils\Downloads\files\data\raw_asc\81181dfd0248_1441.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 3.3
XU1 OUT 0 N002 N001 +V LTC1441 ;pnba OUT)V-)In+)In-)V+
C1 OUT N002 .39p Rser=5K Lser=60 Cpar=3.9p
R1 N002 0 470K
R2 +V N002 1Meg
C2 N001 0 10p
R3 OUT N001 1.2Meg
.tran 3m startup
* 32.768KHz "Watch Crystal" Oscillator
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1441.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 800
WIRE 304 112 256 112
WIRE 464 112 384 112
WIRE 0 224 0 208
WIRE 336 240 336 208
WIRE 176 256 160 256
WIRE 256 256 256 112
WIRE 256 256 240 256
WIRE 304 256 256 256
WIRE 464 272 464 112
WIRE 464 272 368 272
WIRE 496 272 464 272
WIRE 304 288 256 288
WIRE 0 320 0 304
WIRE 128 320 128 304
WIRE 336 336 336 304
WIRE 128 416 128 400
WIRE 256 416 256 288
WIRE 256 416 128 416
WIRE 352 416 256 416
WIRE 464 416 464 272
WIRE 464 416 416 416
WIRE 128 432 128 416
WIRE 128 528 128 512
FLAG 0 320 0
FLAG 0 208 +V
FLAG 336 208 +V
FLAG 336 336 0
FLAG 128 528 0
FLAG 128 304 +V
FLAG 160 256 0
FLAG 496 272 OUT
SYMBOL voltage 0 208 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL Comparators\\LTC1441 336 208 R0
SYMATTR InstName U1
SYMBOL misc\\xtal 416 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 Invisible 2
SYMATTR InstName C1
SYMATTR Value .39p
SYMATTR SpiceLine Rser=5K Lser=60 Cpar=3.9p
SYMBOL res 112 416 R0
SYMATTR InstName R1
SYMATTR Value 470K
SYMBOL res 112 304 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL cap 240 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL res 400 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1.2Meg
TEXT 400 472 Left 2 !.tran 3m startup
TEXT 368 64 Bottom 2 ;32.768KHz "Watch Crystal" Oscillator
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP3654.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP3654.asy)
XU1 0 N001 N001 N002 N003 N004 ADP3654 ;pnba PGND)INA)INB)OUTA)OUTB)VDD
V1 N004 0 5
V2 N001 0 PULSE(0 2 0 1n 1n 5u 10u)
.tran 100u
.lib ADP3654.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2548 1428
WIRE 1424 1072 1360 1072
WIRE 1440 1072 1424 1072
WIRE 1712 1072 1696 1072
WIRE 1360 1088 1360 1072
WIRE 1424 1168 1424 1072
WIRE 1440 1168 1424 1168
WIRE 1712 1168 1696 1168
WIRE 1360 1184 1360 1168
WIRE 1440 1264 1360 1264
WIRE 1712 1264 1696 1264
WIRE 1360 1280 1360 1264
WIRE 1360 1376 1360 1360
SYMBOL voltage 1360 1072 M0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 0 1n 1n 5u 10u)
SYMBOL ADP3654 1568 1168 R0
SYMATTR InstName U1
SYMBOL voltage 1360 1264 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 1360 1376 0
FLAG 1712 1264 0
FLAG 1360 1184 0
TEXT 1720 1344 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\15cfb03a526e_Draft10.asc
* Generated by LTspice 26.0.1 for Windows.
M3 vdd N001 N002 vdd PMOS l=0.6u w=0.6u
M4 N005 N004 0 0 NMOS l=0.6u w=0.6u
V2 inp 0 PULSE(0 3.3 1n 10p 10p 20n 40n)
R1 N001 N004 100k
M6 0 N004 N004 0 NMOS l=0.6u w=0.6u
V1 vdd 0 3.3
M1 N002 inp N003 vdd PMOS l=0.35u w=2.5u
C1 N003 0 1f
M2 N003 inp N005 0 NMOS l=0.35u w=2.5u
M5 N001 N001 vdd vdd PMOS l=0.6u w=0.6u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc library.mod
.tran 100n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1368 1028
WIRE 112 144 64 144
WIRE 352 144 112 144
WIRE 352 208 352 144
WIRE 16 256 16 224
WIRE 112 256 112 144
WIRE 112 256 16 256
WIRE 400 272 400 224
WIRE 16 352 16 256
WIRE 352 352 272 352
WIRE 400 416 400 368
WIRE 528 416 400 416
WIRE 528 448 528 416
WIRE 272 464 272 352
WIRE 400 464 400 416
WIRE 16 480 16 432
WIRE 112 480 16 480
WIRE 16 528 16 480
WIRE 272 544 272 464
WIRE 352 544 272 544
WIRE 64 576 64 544
WIRE 112 576 112 480
WIRE 112 576 64 576
WIRE 400 624 400 560
WIRE 64 704 64 576
WIRE 352 704 64 704
SYMBOL nmos4 352 624 R0
SYMATTR InstName M4
SYMATTR Value2 l=0.6u w=0.6u
SYMBOL pmos4 64 224 R180
SYMATTR InstName M5
SYMATTR Value2 l=0.6u w=0.6u
SYMBOL pmos4 352 128 R0
SYMATTR InstName M3
SYMATTR Value2 l=0.6u w=0.6u
SYMBOL voltage -480 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 1n 10p 10p 20n 40n)
SYMBOL cap 512 448 R0
SYMATTR InstName C1
SYMATTR Value 1f
SYMBOL nmos4 352 464 R0
SYMATTR InstName M2
SYMATTR Value2 l=0.35u w=2.5u
SYMBOL nmos4 64 624 R180
SYMATTR InstName M6
SYMATTR Value2 l=0.6u w=0.6u
SYMBOL voltage -496 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL pmos4 352 272 R0
SYMATTR InstName M1
SYMATTR Value2 l=0.35u w=2.5u
SYMBOL res 0 336 R0
SYMATTR InstName R1
SYMATTR Value 100k
FLAG -496 240 0
FLAG -496 160 vdd
FLAG -480 448 0
FLAG -480 368 inp
FLAG 272 464 inp
FLAG 400 128 vdd
FLAG 16 128 vdd
FLAG 16 176 vdd
FLAG 400 176 vdd
FLAG 400 320 vdd
FLAG 400 512 0
FLAG 400 720 0
FLAG 16 624 0
FLAG 16 576 0
FLAG 400 672 0
FLAG 528 512 0
TEXT -136 -128 Left 2 !.inc library.mod
TEXT 168 -72 Left 2 !.tran 100n
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP160-2.1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP160-2.1.asy)
Rload OUT 0 210
C1 OUT 0 1
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
XU1 IN 0 N001 OUT ADP16xfd K=476.2u ;pnba Vin)GND)En)Vout
V1 IN 0 5
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 416 96 352 96
WIRE 512 96 416 96
WIRE -64 112 -64 96
WIRE 416 112 416 96
WIRE 512 112 512 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 416 208 416 176
WIRE 512 208 512 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 210
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ADP160-2.1 256 208 R0
SYMATTR InstName U1
FLAG -64 208 0
FLAG 256 272 0
FLAG 416 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7150-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7150-5.0.asy)
XU1 N004 OUT N002 0 N003 N003 N001 IN ADM7150-5.0 ;pnba Vreg)Vout)Byp)GND)Ref_Sense)Ref)EN)Vin
C1 N004 0 10 Rser=10m Lser=1n
R3 IN N001 100K
C3 OUT 0 10
V1 IN 0 6.2
C4 N003 0 1
R5 OUT 0 18
C2 N002 0 1
.tran 5m startup
.lib ADM7150-5.0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 856
WIRE -32 32 -160 32
WIRE 80 32 -32 32
WIRE 464 32 400 32
WIRE 560 32 464 32
WIRE -160 48 -160 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE -160 144 -160 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE 0 224 -16 224
WIRE 80 224 64 224
WIRE 416 224 400 224
WIRE 464 224 416 224
WIRE 464 240 464 224
WIRE 0 320 -16 320
WIRE 80 320 64 320
WIRE 416 320 416 224
WIRE 416 320 400 320
WIRE 464 320 464 304
WIRE 240 400 240 384
SYMBOL ADM7150-5.0 240 176 R0
SYMATTR InstName U1
SYMBOL cap 64 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR Value2 Rser=10m
SYMATTR SpiceLine Lser=1n
SYMBOL cap 448 48 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res 544 32 R0
SYMATTR InstName R5
SYMATTR Value 18
SYMBOL cap 448 240 R0
WINDOW 0 36 14 Left 2
WINDOW 3 36 50 Left 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL voltage -160 32 R0
SYMATTR InstName V1
SYMATTR Value 6.2
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
FLAG 240 400 0
FLAG 464 320 0
FLAG 464 144 0
FLAG -16 320 0
FLAG -16 224 0
FLAG -160 144 0
FLAG 560 144 0
FLAG -160 32 IN
FLAG 560 32 OUT
TEXT 552 448 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP122-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5.5
C2 OUT 0 1
Rload OUT 0 100
C1 IN 0 1
XU1 OUT MP_01 0 IN MP_02 IN ADP122 K=1/5600 ;pnba Vout))GND)En))Vin
.tran 10m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP122-2.8.asy)
.lib ADP122.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ADP122-2.8 256 208 R0
SYMATTR InstName U1
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\tmp\asc_dec_bjh7r6w2\0f8bed2a278e_LT1723_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 2K
V2 -V 0 -5
R6 N002 N003 62.5
R7 N006 N007 62.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 744
WIRE 176 0 128 0
WIRE 256 0 240 0
WIRE 128 96 128 0
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 256 0
WIRE 256 96 224 96
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE -224 240 -224 224
WIRE -96 240 -96 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 320 240 256 240
WIRE 432 240 400 240
WIRE 160 256 16 256
WIRE 192 288 192 272
WIRE -224 336 -224 320
WIRE -96 336 -96 320
WIRE 176 384 128 384
WIRE 256 384 240 384
WIRE 432 400 432 240
WIRE 512 400 432 400
WIRE 512 464 432 464
WIRE 128 480 128 384
WIRE 128 480 112 480
WIRE 144 480 128 480
WIRE 256 480 256 384
WIRE 256 480 224 480
WIRE 192 592 192 576
WIRE 128 608 128 480
WIRE 160 608 128 608
WIRE 256 624 256 480
WIRE 256 624 224 624
WIRE 320 624 256 624
WIRE 432 624 432 464
WIRE 432 624 400 624
WIRE 160 640 16 640
WIRE 192 672 192 656
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL voltage -224 224 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 304 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R6
SYMATTR Value 62.5
SYMBOL res 304 640 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R7
SYMATTR Value 62.5
FLAG -96 336 0
FLAG 192 192 +V
FLAG -96 224 +V
FLAG 192 288 -V
FLAG -224 336 0
FLAG -224 224 -V
FLAG 192 576 +V
FLAG 192 672 -V
* Z:\home\khalils\Downloads\files\data\raw_asc\44bc52c0737d_BT-CE-TRAN.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 {Uce}
Q1 N001 N002 0 0 BC547B
Ibb 0 N002 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Ibb 0 200uA 10uA
.step param Uce list 5V 20V
.meas dc Ib find Ib(Q1) when Ic(Q1)=20mA
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 16 208 16
WIRE 208 80 208 16
WIRE 368 96 368 16
WIRE 144 128 32 128
WIRE 32 144 32 128
WIRE 32 256 32 224
WIRE 208 256 208 176
WIRE 368 256 368 176
FLAG 208 256 0
FLAG 32 256 0
FLAG 368 256 0
SYMBOL voltage 368 80 R0
WINDOW 3 35 85 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 35 57 Left 2
SYMATTR Value {Uce}
SYMATTR InstName V2
SYMBOL npn 144 80 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL current 32 224 R180
WINDOW 0 -63 0 Left 2
WINDOW 3 -66 28 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Ibb
SYMATTR Value 0
TEXT 56 272 Left 2 !.dc Ibb 0 200uA 10uA
TEXT 56 288 Left 2 !.step param Uce list 5V 20V
TEXT 56 304 Left 2 !.meas dc Ib find Ib(Q1) when Ic(Q1)=20mA
* Z:\tmp\asc_dec_bjh7r6w2\19c18b4abba1_mod_anello_dopp_basic_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N007 N003 100
V2 N007 N008 SINE(0 3 10 0 0 90)
V3 N003 N006 200m
D4 N006 N004 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1172 680
WIRE 208 -48 -32 -48
WIRE -32 0 -32 -48
WIRE 208 0 208 -48
WIRE 336 0 336 -48
WIRE 208 16 208 0
WIRE 336 16 336 0
WIRE -32 96 -32 80
WIRE 48 96 -32 96
WIRE 208 96 208 64
WIRE 208 96 144 96
WIRE 336 96 336 64
WIRE 384 96 384 -48
WIRE 384 96 336 96
WIRE -32 128 -32 96
WIRE 208 128 208 96
WIRE 336 128 336 96
WIRE -32 240 -32 208
WIRE 208 240 208 192
WIRE 208 240 -32 240
WIRE 336 240 336 192
WIRE 336 240 208 240
WIRE 144 272 144 96
WIRE 512 272 144 272
WIRE 48 368 48 96
WIRE 112 368 48 368
WIRE 256 368 192 368
WIRE 448 368 336 368
SYMBOL res 208 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL Misc\\signal 240 368 R270
WINDOW 0 -32 56 VBottom 2
WINDOW 3 -93 52 VTop 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 3 10 0 0 90)
SYMBOL voltage -32 112 R0
WINDOW 3 -73 93 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 -73 121 Left 2
SYMATTR Value 200m
SYMATTR InstName V3
SYMBOL diode 224 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8027.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8027.asy)
R1 IN N001 1Meg
Rload OUT 0 2.88
V1 IN 0 24
R3 N005 0 56.2K
XU1 IN N001 N002 N003 N005 N003 OUT N004 N003 MP_01 MP_02 MP_03 MP_04 MP_05 MP_06 MP_07 0 LTM8027 ;pnba Vin)RUN)SS)Bias2)Adj)Bias1)Vout)Rt)AUX))))))))GND
C2 OUT 0 100
C1 N002 0 1000p
R2 N004 0 48.7K
.tran 1m startup
.lib LTM8027.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1852 804
WIRE 624 -192 528 -192
WIRE 848 -192 624 -192
WIRE 528 -176 528 -192
WIRE 624 -176 624 -192
WIRE 848 -128 848 -192
WIRE 528 -80 528 -96
WIRE 624 -80 624 -96
WIRE 720 -80 624 -80
WIRE 1072 -80 976 -80
WIRE 1168 -80 1072 -80
WIRE 1072 -64 1072 -80
WIRE 1168 -64 1168 -80
WIRE 640 16 624 16
WIRE 720 16 704 16
WIRE 1008 16 976 16
WIRE 1072 32 1072 0
WIRE 1168 32 1168 16
WIRE 608 112 592 112
WIRE 720 112 688 112
WIRE 1008 112 1008 16
WIRE 1008 112 976 112
WIRE 608 208 592 208
WIRE 720 208 688 208
WIRE 1008 208 1008 112
WIRE 1008 208 976 208
WIRE 848 272 848 256
SYMBOL cap 704 0 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000p
SYMBOL res 1152 -80 R0
SYMATTR InstName Rload
SYMATTR Value 2.88
SYMBOL res 704 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 56.2K
SYMBOL cap 1056 -64 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMBOL res 704 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 48.7K
SYMBOL res 608 -192 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL voltage 528 -192 R0
WINDOW 3 25 101 Left 2
SYMATTR Value 24
SYMATTR InstName V1
SYMBOL PowerProducts\\LTM8027 848 64 R0
SYMATTR InstName U1
FLAG 1072 32 0
FLAG 1168 32 0
FLAG 528 -80 0
FLAG 1168 -80 OUT
FLAG 528 -192 IN
FLAG 624 16 0
FLAG 592 112 0
FLAG 848 272 0
FLAG 592 208 0
TEXT 1072 200 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7159-01.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7159-01.asy)
R1 N003 N005 50K
XU1 OUT MP_01 OUT N002 N001 N005 N003 N004 IN 0 ADP7158_9 Vreg=2.111 Vref=1.216 ;pnba Vout))Vout_Sense)Byp)EN)Ref_Sense)Ref)Vreg)Vin)GND
C3 OUT 0 10 Rser=10m Lser=1n
R5 OUT 0 1.8
V1 IN 0 2.4
C1 N004 0 1 Rser=10m Lser=1n
R2 N005 0 100K
C2 N002 0 1 Rser=10m Lser=1n
C4 N003 0 1 Rser=10m Lser=1n
R3 IN N001 100K
.tran 5m startup
.lib ADP7158_9.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -160 32
WIRE 80 32 -32 32
WIRE 416 32 400 32
WIRE 464 32 416 32
WIRE 560 32 464 32
WIRE -160 48 -160 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE 416 128 416 32
WIRE 416 128 400 128
WIRE -160 144 -160 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE 0 224 -16 224
WIRE 80 224 64 224
WIRE 464 224 400 224
WIRE 560 224 464 224
WIRE 464 240 464 224
WIRE 560 240 560 224
WIRE 0 320 -16 320
WIRE 80 320 64 320
WIRE 416 320 400 320
WIRE 560 320 560 304
WIRE 416 336 416 320
WIRE 464 336 464 320
WIRE 464 336 416 336
WIRE 464 352 464 336
WIRE 240 400 240 384
WIRE 464 448 464 432
SYMBOL cap 544 240 R0
WINDOW 0 36 14 Left 2
WINDOW 3 36 50 Left 2
SYMATTR InstName C4
SYMATTR Value 1
SYMATTR Value2 Rser=10m
SYMATTR SpiceLine Lser=1n
SYMBOL res 544 32 R0
SYMATTR InstName R5
SYMATTR Value 1.8
SYMBOL res 448 336 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 64 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMATTR Value2 Rser=10m
SYMATTR SpiceLine Lser=1n
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
SYMATTR Value2 Rser=10m
SYMATTR SpiceLine Lser=1n
SYMBOL cap 448 48 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMATTR Value2 Rser=10m
SYMATTR SpiceLine Lser=1n
SYMBOL ADP7159-01 240 176 R0
SYMATTR InstName U1
SYMBOL res 448 224 R0
SYMATTR InstName R1
SYMATTR Value 50K
SYMBOL voltage -160 32 R0
SYMATTR InstName V1
SYMATTR Value 2.4
FLAG 240 400 0
FLAG 560 320 0
FLAG 464 144 0
FLAG -16 320 0
FLAG -16 224 0
FLAG -160 144 0
FLAG 560 144 0
FLAG 464 448 0
FLAG -160 32 IN
FLAG 560 32 OUT
TEXT 552 448 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7154-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7154-1.2.asy)
XU1 N004 OUT N002 0 N003 N003 N001 IN ADM7154_5 Vreg=2.1022 Vref=1.2152 ;pnba Vreg)Vout)Byp)GND)Ref_Sense)Ref)EN)Vin
C3 N004 0 1
Rload OUT 0 12
V1 IN 0 2.3
R1 IN N001 100K
C4 N002 0 1
C1 OUT 0 10
C2 N003 0 1
.tran 5m startup
.lib ADM7154_5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -144 32
WIRE 80 32 -32 32
WIRE 464 32 400 32
WIRE 560 32 464 32
WIRE -144 48 -144 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE -144 144 -144 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE -16 224 -32 224
WIRE 80 224 48 224
WIRE 416 224 400 224
WIRE 464 224 416 224
WIRE 464 240 464 224
WIRE -16 320 -32 320
WIRE 80 320 48 320
WIRE 416 320 416 224
WIRE 416 320 400 320
WIRE 464 320 464 304
WIRE 240 400 240 384
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL ADM7154-1.2 240 176 R0
SYMATTR InstName U1
SYMBOL res 544 32 R0
SYMATTR InstName Rload
SYMATTR Value 12
SYMBOL cap 448 240 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL voltage -144 32 R0
SYMATTR InstName V1
SYMATTR Value 2.3
SYMBOL cap 48 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap 448 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL cap 48 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
FLAG 240 400 0
FLAG 464 320 0
FLAG 464 144 0
FLAG -32 320 0
FLAG -32 224 0
FLAG -144 144 0
FLAG 560 144 0
FLAG -144 32 IN
FLAG 560 32 OUT
TEXT 432 384 Left 2 !.tran 5m startup