Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\321c65b475be_curva-trans-universal.asc
* Generated by LTspice 26.0.1 for Windows.
+ Beta=1.125m Betatce=-500m
+ Rd=1 Rs=1 Lambda=2.3m
+ Vto=-1.372 Vtotc=-2.5m
+ Is=181.3f Isr=1.747p N=1
+ Nr=2 Xti=3 Alpha=2.543u
+ Vk=152.2 Cgd=4p M=311.4m
+ Pb=500m Fc=500m Cgs=4.627p
+ Kf=1.045e-002f Af=1)
V2 N001 0 {Vdd}
V1 N002 0 -7
J1 N001 N002 0 J2N5457
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.MODEL J2N5457 NJF(
.param Vdd=15
.step param Vdd 0 15 0.2
.dc V1 -7 0 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1584 680
WIRE 432 80 240 80
WIRE 240 128 240 80
WIRE 432 128 432 80
WIRE 192 192 32 192
WIRE 32 224 32 192
WIRE 32 336 32 304
WIRE 240 336 240 224
WIRE 240 336 32 336
WIRE 432 336 432 208
WIRE 432 336 240 336
WIRE 240 368 240 336
SYMBOL voltage 32 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -7
SYMBOL njf 192 128 R0
SYMATTR InstName J1
SYMATTR Value J2N5457
SYMBOL voltage 432 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value {Vdd}
FLAG 240 368 0
TEXT 560 96 Left 2 !.MODEL J2N5457 NJF(\n+ Beta=1.125m Betatce=-500m\n+ Rd=1 Rs=1 Lambda=2.3m\n+ Vto=-1.372 Vtotc=-2.5m\n+ Is=181.3f Isr=1.747p N=1\n+ Nr=2 Xti=3 Alpha=2.543u\n+ Vk=152.2 Cgd=4p M=311.4m\n+ Pb=500m Fc=500m Cgs=4.627p\n+ Kf=1.045e-002f Af=1)
TEXT 296 368 Left 2 !.param Vdd=15\n.step param Vdd 0 15 0.2
TEXT -16 384 Left 2 !.dc V1 -7 0 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\1a0160fa8df7_A03_-_Simulacao.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 N001 D
D2 N003 N001 D
D3 0 N003 D
D4 0 N002 D
C1 N001 0 20m
V1 N004 0 SINE(0 311 60) Rser=1u
L1 N004 0 1
L2 N002 N003 3m
R1 N001 0 7.6
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
K L1 L2 1
.tran 30m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 0 256 0
WIRE 512 0 384 0
WIRE 656 0 512 0
WIRE 656 64 656 0
WIRE 512 80 512 0
WIRE 256 96 256 64
WIRE 256 96 0 96
WIRE 384 96 384 64
WIRE 384 96 304 96
WIRE 256 128 256 96
WIRE 384 128 384 96
WIRE -144 208 -320 208
WIRE 256 240 256 192
WIRE 384 240 384 192
WIRE 384 240 256 240
WIRE 512 240 512 160
WIRE 512 240 384 240
WIRE 656 240 656 128
WIRE 656 240 512 240
WIRE -320 256 -320 208
WIRE -144 256 -144 208
WIRE 0 256 0 96
WIRE 512 304 512 240
WIRE -320 384 -320 336
WIRE -192 384 -320 384
WIRE -144 384 -144 336
WIRE -144 384 -192 384
WIRE 0 384 0 336
WIRE 304 384 304 96
WIRE 304 384 0 384
WIRE -192 432 -192 384
FLAG -192 432 0
FLAG 512 304 0
SYMBOL diode 272 64 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL diode 400 64 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMBOL diode 400 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMBOL diode 272 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMBOL cap 640 64 R0
SYMATTR InstName C1
SYMATTR Value 20m
SYMBOL voltage -320 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 311 60)
SYMATTR SpiceLine Rser=1u
SYMBOL ind2 -160 240 R0
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR Type ind
SYMBOL ind2 -16 240 R0
SYMATTR InstName L2
SYMATTR Value 3m
SYMATTR Type ind
SYMBOL res 496 64 R0
SYMATTR InstName R1
SYMATTR Value 7.6
TEXT -320 416 Left 2 !K L1 L2 1
TEXT -354 436 Left 2 !.tran 30m
* Z:\tmp\asc_dec_bjh7r6w2\0f11bb0d1af1_Simple_ADC_Diagram_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
XU2 NC_01 NC_02 NC_03 NC_04 PC817 Igain=1.5m ;pnba A)K)C)E
A5 N009 0 N011 N003 0 0 N010 0 AND
R2 N008 N006 1k
A2 N002 0 0 0 0 N004 0 0 BUF
R1 N006 N001 1k
A4 N004 0 N002 N002 0 0 N007 0 AND
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Optos\PC817B.asy)
.lib PC817.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2520 788
WIRE 576 0 528 0
WIRE 704 0 656 0
WIRE 704 64 704 0
WIRE 1344 80 1216 80
WIRE 1488 80 1344 80
WIRE 1520 80 1488 80
WIRE 1776 80 1584 80
WIRE 1488 112 1488 80
WIRE 1728 112 1488 112
WIRE 1344 160 1344 80
WIRE 1488 160 1344 160
WIRE 1520 160 1488 160
WIRE 1664 160 1584 160
WIRE 1872 160 1664 160
WIRE 2064 176 1936 176
WIRE 1344 192 1344 160
WIRE 1616 192 1344 192
WIRE 1872 192 1616 192
WIRE 704 208 704 144
WIRE 704 208 640 208
WIRE 1776 208 1776 80
WIRE 1872 208 1776 208
WIRE 640 256 640 208
WIRE 704 304 704 208
WIRE 1152 304 704 304
WIRE 1664 304 1664 160
WIRE 1872 304 1664 304
WIRE 2064 320 1936 320
WIRE 1616 336 1616 192
WIRE 1872 336 1616 336
WIRE 1728 352 1728 112
WIRE 1872 352 1728 352
WIRE 704 368 704 304
WIRE 640 416 640 336
WIRE 640 416 576 416
WIRE 576 432 576 416
WIRE 1488 432 1488 160
WIRE 1872 432 1664 432
WIRE 2064 448 1936 448
WIRE 1872 464 1616 464
WIRE 1776 480 1776 208
WIRE 1872 480 1776 480
WIRE 640 496 640 416
WIRE 1152 496 640 496
WIRE 640 512 640 496
WIRE 576 544 576 512
WIRE 576 544 512 544
WIRE 1872 560 1664 560
WIRE 2064 576 1936 576
WIRE 1872 592 1616 592
WIRE 1728 608 1728 352
WIRE 576 624 576 544
WIRE 512 656 512 544
WIRE 704 768 704 448
SYMBOL Optos\\PC817B 2416 272 R0
SYMATTR InstName U2
SYMBOL Digital\\and 1904 400 R0
SYMATTR InstName A5
SYMBOL res 656 352 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL Digital\\inv 1520 96 R0
SYMATTR InstName A2
SYMBOL res 720 160 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL Digital\\and 1904 272 R0
SYMATTR InstName A4
FLAG 528 0 0
* Z:\home\khalils\Downloads\files\data\raw_asc\254ba25cf629_square_current.asc
* Generated by LTspice 26.0.1 for Windows.
* see: HELP (F1)/LTspice/Circuit Elements/B. Arbitr...\n** Raise left hand side to power of right hand side.
V1 sin 0 SINE(0 2 1k)
B1 0 N001 I=v(sin)**2
R1 N001 0 1
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 48 256 48
WIRE 368 64 368 48
WIRE 256 96 256 48
WIRE 368 176 368 144
SYMBOL bi2 256 96 R0
WINDOW 3 6 122 Left 0
SYMATTR InstName B1
SYMATTR Value I=v(sin)**2
SYMBOL voltage 64 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 2 1k)
SYMBOL res 352 48 R0
SYMATTR InstName R1
SYMATTR Value 1
FLAG 64 176 0
FLAG 64 96 sin
FLAG 256 176 0
FLAG 368 176 0
TEXT 50 254 Left 0 !.tran 10m
TEXT -256 304 Left 0 ;see: HELP (F1)/LTspice/Circuit Elements/B. Arbitr...\n**  Raise left hand side to power of right hand side.
* Z:\tmp\asc_dec_bjh7r6w2\10209fd48f64_Draft3_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
Vs s 0 0 AC 1
RB1 Vcc b {mc(100k,tol1)}
RE e 0 {mc(1.3k,tol1)}
RC Vcc c {mc(4.7k,tol1)}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1412 680
WIRE 560 48 560 0
WIRE 880 48 880 0
WIRE 880 160 880 128
WIRE 944 160 880 160
WIRE 1088 160 944 160
WIRE 880 192 880 160
WIRE 128 240 80 240
WIRE 176 240 128 240
WIRE 320 240 256 240
WIRE 560 240 560 128
WIRE 768 240 560 240
WIRE 816 240 768 240
WIRE 80 288 80 240
WIRE 880 320 880 288
WIRE 944 320 880 320
WIRE 1136 320 944 320
WIRE 880 352 880 320
WIRE 880 480 880 432
SYMBOL voltage 80 272 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName Vs
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMBOL res 544 32 R0
SYMATTR InstName RB1
SYMATTR Value {mc(100k,tol1)}
SYMBOL res 864 336 R0
SYMATTR InstName RE
SYMATTR Value {mc(1.3k,tol1)}
SYMBOL res 864 32 R0
SYMATTR InstName RC
SYMATTR Value {mc(4.7k,tol1)}
FLAG 80 128 0
FLAG 80 368 0
FLAG 128 240 s
FLAG 560 0 Vcc
FLAG 880 0 Vcc
FLAG 880 480 0
FLAG 944 160 c
FLAG 944 320 e
FLAG 768 240 b
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8030.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
Vin1 IN 0 SINE(0 1 100K)
R1 N001 0 10K
R2 OUT N001 10K
V2 -V 0 -5
XU1 IN N001 +V -V OUT AD8040 ;pnba In+)In-)V+)V-)OUT
.tran 100u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8030.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 960 680
WIRE 272 128 256 128
WIRE 368 128 352 128
WIRE 384 128 368 128
WIRE 480 128 464 128
WIRE 32 208 32 192
WIRE 160 208 160 192
WIRE 368 224 368 128
WIRE 384 224 368 224
WIRE 480 240 480 128
WIRE 480 240 448 240
WIRE 544 240 480 240
WIRE 384 256 304 256
WIRE 304 272 304 256
WIRE 32 304 32 288
WIRE 160 304 160 288
WIRE 304 368 304 352
FLAG 32 192 +V
FLAG 304 368 0
FLAG 544 240 OUT
FLAG 304 256 IN
FLAG 416 208 +V
FLAG 160 192 -V
FLAG 416 272 -V
FLAG 256 128 0
FLAG 160 304 0
FLAG 32 304 0
SYMBOL voltage 32 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 304 256 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin1
SYMATTR Value SINE(0 1 100K)
SYMBOL res 368 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 480 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 160 192 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL opamps\\AD8030 416 176 R0
SYMATTR InstName U1
TEXT 560 360 Left 2 !.tran 100u
* Z:\tmp\asc_dec_bjh7r6w2\10422822d535_ampTest0_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R5 N003 SIG 2.4k
V2 SIG 0 PULSE(0 0.248 0 0.01u 0.01u 4u 20u)
R4 N001 0 2.4k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 576 -160 512 -160
WIRE 688 -160 656 -160
WIRE 400 -64 384 -64
WIRE 512 -64 512 -160
WIRE 512 -64 480 -64
WIRE 576 -64 512 -64
WIRE 688 -64 688 -160
WIRE 688 -64 640 -64
WIRE 384 -32 384 -64
WIRE 608 96 608 64
WIRE 512 112 512 -64
WIRE 576 112 512 112
WIRE 688 128 688 -64
WIRE 688 128 640 128
WIRE 816 128 688 128
WIRE 224 144 224 128
WIRE 512 144 224 144
WIRE 576 144 512 144
WIRE 224 160 224 144
WIRE 608 192 608 160
WIRE 400 208 368 208
WIRE 512 208 512 144
WIRE 512 208 480 208
WIRE 224 272 224 240
WIRE 48 288 48 256
WIRE -80 304 -80 272
WIRE -80 400 -80 368
WIRE 48 400 48 368
SYMBOL res 496 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 2.4k
SYMBOL Misc\\signal 48 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 0.248 0 0.01u 0.01u 4u 20u)
SYMBOL res 496 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2.4k
FLAG -80 400 0
FLAG 608 192 0
FLAG -80 272 VDD
FLAG 608 64 VDD
FLAG 224 272 0
FLAG 384 -32 0
FLAG 368 208 SIG
FLAG 48 400 0
FLAG 48 256 SIG
* Z:\home\khalils\Downloads\files\data\raw_asc\801e98c8d774_OR.asc
* Generated by LTspice 26.0.1 for Windows.
VB N005 0 PULSE(0 5 0 1n 1n 10u 20u)
M1 N003 N002 0 0 C5NNMOS l=0.6u w=3.6u
V3 N001 0 5
M4 N004 N005 N003 N001 C5NPMOS l=0.6u w=7.2u
VA N002 0 PULSE(0 5 0 1n 1n 5u 10u)
M3 N001 N002 N004 N001 C5NPMOS l=0.6u w=7.2u
M2 N003 N005 0 0 C5NNMOS l=0.6u w=3.6u
M6 Vout N003 0 0 C5NNMOS l=0.6u w=3.6u
M5 N001 N003 Vout N001 C5NPMOS l=0.6u w=7.2u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include D:\NIELIT\ENGR3426\ENGR3426\engr3426.sub
.tran 100u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1232 680
WIRE 416 -160 288 -160
WIRE 528 -160 416 -160
WIRE 848 -160 528 -160
WIRE 960 -160 848 -160
WIRE 528 -128 528 -160
WIRE 288 -96 288 -160
WIRE 848 -96 848 -160
WIRE 416 -48 416 -160
WIRE 416 -48 288 -48
WIRE 960 -48 960 -160
WIRE 960 -48 848 -48
WIRE -32 -16 -480 -16
WIRE 240 -16 -32 -16
WIRE 528 -16 528 -48
WIRE 800 -16 624 -16
WIRE 288 64 288 0
WIRE 848 64 848 0
WIRE 1120 64 848 64
WIRE 416 112 416 -48
WIRE 416 112 288 112
WIRE 848 128 848 64
WIRE -112 144 -288 144
WIRE 240 144 -112 144
WIRE -288 160 -288 144
WIRE -480 176 -480 -16
WIRE 288 176 288 160
WIRE 624 176 624 -16
WIRE 624 176 288 176
WIRE 976 176 848 176
WIRE 288 208 288 176
WIRE 288 208 128 208
WIRE 400 208 288 208
WIRE 624 208 624 176
WIRE 800 208 624 208
WIRE -288 272 -288 240
WIRE -480 288 -480 256
WIRE 128 288 128 208
WIRE 400 288 400 208
WIRE 256 336 128 336
WIRE 512 336 400 336
WIRE -32 368 -32 -16
WIRE 80 368 -32 368
WIRE -112 400 -112 144
WIRE 352 400 352 368
WIRE 352 400 -112 400
WIRE 128 432 128 384
WIRE 256 432 256 336
WIRE 256 432 128 432
WIRE 400 432 400 384
WIRE 400 432 256 432
WIRE 512 432 512 336
WIRE 512 432 400 432
WIRE 848 432 848 224
WIRE 848 432 512 432
WIRE 976 432 976 176
WIRE 976 432 848 432
WIRE 256 448 256 432
IOPIN 1120 64 Out
SYMBOL voltage -480 160 R0
WINDOW 3 -6 167 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VA
SYMATTR Value PULSE(0 5 0 1n 1n 5u 10u)
SYMBOL nmos4 800 128 R0
SYMATTR InstName M6
SYMATTR Value C5NNMOS
SYMATTR Value2 l=0.6u w=3.6u
SYMBOL pmos4 240 -96 R0
SYMATTR InstName M3
SYMATTR Value C5NPMOS
SYMATTR Value2 l=0.6u w=7.2u
SYMBOL nmos4 352 288 R0
SYMATTR InstName M2
SYMATTR Value C5NNMOS
SYMATTR Value2 l=0.6u w=3.6u
SYMBOL nmos4 80 288 R0
SYMATTR InstName M1
SYMATTR Value C5NNMOS
SYMATTR Value2 l=0.6u w=3.6u
SYMBOL voltage -288 144 R0
WINDOW 3 -200 222 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value PULSE(0 5 0 1n 1n 10u 20u)
SYMBOL voltage 528 -144 R0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL pmos4 240 64 R0
SYMATTR InstName M4
SYMATTR Value C5NPMOS
SYMATTR Value2 l=0.6u w=7.2u
SYMBOL pmos4 800 -96 R0
SYMATTR InstName M5
SYMATTR Value C5NPMOS
SYMATTR Value2 l=0.6u w=7.2u
FLAG -480 288 0
FLAG -288 272 0
FLAG 528 -16 0
FLAG 256 448 0
FLAG 1120 64 Vout
TEXT -512 448 Left 2 !.include D:\\NIELIT\\ENGR3426\\ENGR3426\\engr3426.sub
TEXT -512 472 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\0b4d67169a27_6700-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT6700-3.asy)
R2 N001 N004 10K
V1 N001 0 5
R1 N001 N003 10K
V3 N002 0 PULSE(0 5 0 .5m .5m 0 1m)
XU1 N004 0 N002 N002 N001 N003 LT6700-3 ;pnba OUTA)GND)+INA)+INB)Vs)OUTB
.tran 3m
.lib LT6700-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 800
WIRE 368 160 144 160
WIRE 496 160 368 160
WIRE 592 160 496 160
WIRE 144 176 144 160
WIRE 496 176 496 160
WIRE 368 208 368 160
WIRE 592 224 592 160
WIRE 304 256 256 256
WIRE 144 272 144 256
WIRE 496 272 496 256
WIRE 496 272 432 272
WIRE 256 336 256 256
WIRE 256 336 -64 336
WIRE -64 352 -64 336
WIRE 592 400 592 304
WIRE 592 400 432 400
WIRE 256 416 256 336
WIRE 304 416 256 416
WIRE -64 448 -64 432
WIRE 368 496 368 464
SYMBOL res 480 160 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL Comparators\\LT6700-3 368 336 R0
SYMATTR InstName U1
SYMBOL voltage 144 160 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -64 336 R0
WINDOW 3 17 101 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 5 0 .5m .5m 0 1m)
SYMATTR InstName V3
SYMBOL res 576 208 R0
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 144 272 0
FLAG -64 448 0
FLAG 368 496 0
TEXT 464 520 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6605-7.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\FilterProducts\LTC6605-7.asy)
V3 N002 0 AC 1
E1 N001 0 N002 0 .5
V1 +V 0 1.5
XU1 N001 N004 +V N004 N006 N005 0 -V +V N003 LTC6605-7 ;pnba IN4+)IN1+)BIAS)IN1-)IN4-)OUT+)Vocm)V-)V+)OUT-1
V2 -V 0 -1.5
E3 OUT 0 N005 N003 1
R1 0 N003 300
E2 0 N006 N002 0 .5
R2 0 N005 300
.ac oct 20 100K 100Meg
.measure pt1 find V(out) at 3.5Meg
.measure pt2 find V(out) at 5.25Meg
.measure pt3 find V(out) at 7Meg
.measure pt4 find V(out) at 14Meg
.measure pt5 find V(out) at 35Meg
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1756 680
WIRE -304 -32 -304 -48
WIRE -192 -32 -192 -48
WIRE 336 32 336 16
WIRE -304 64 -304 48
WIRE -192 64 -192 48
WIRE 64 64 -64 64
WIRE -64 96 -64 64
WIRE -112 112 -176 112
WIRE 512 112 480 112
WIRE 528 112 512 112
WIRE 624 112 608 112
WIRE 64 128 0 128
WIRE 736 128 672 128
WIRE 672 144 672 128
WIRE -112 160 -128 160
WIRE 480 160 480 112
WIRE 480 160 432 160
WIRE 512 160 512 112
WIRE 624 160 512 160
WIRE -64 192 -64 176
WIRE -64 192 -96 192
WIRE 64 192 48 192
WIRE -64 208 -64 192
WIRE 624 208 512 208
WIRE -176 224 -176 112
WIRE -112 224 -176 224
WIRE 480 224 432 224
WIRE 672 240 672 224
WIRE 0 256 0 128
WIRE 64 256 0 256
WIRE 480 256 480 224
WIRE 512 256 512 208
WIRE 512 256 480 256
WIRE 528 256 512 256
WIRE 624 256 608 256
WIRE -112 272 -128 272
WIRE 448 288 432 288
WIRE -176 320 -176 224
WIRE -64 320 -64 288
WIRE 64 320 -64 320
WIRE 336 368 336 352
WIRE -176 416 -176 400
SYMBOL res 624 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL LTC6605-7 256 192 R0
SYMATTR InstName U1
SYMBOL e2 672 128 R0
SYMATTR InstName E3
SYMATTR Value 1
SYMBOL voltage -176 304 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL e -64 80 R0
SYMATTR InstName E1
SYMATTR Value .5
SYMBOL e -64 192 R0
SYMATTR InstName E2
SYMATTR Value .5
SYMBOL res 624 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 300
SYMBOL voltage -304 -48 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL voltage -192 -48 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V2
SYMATTR Value -1.5
FLAG -304 64 0
FLAG -192 64 0
FLAG 448 288 0
FLAG -304 -48 +V
FLAG -96 192 0
FLAG -128 160 0
FLAG -128 272 0
FLAG -176 416 0
FLAG 672 240 0
FLAG 736 128 OUT
FLAG 624 112 0
FLAG 624 256 0
FLAG -192 -48 -V
FLAG 336 16 +V
FLAG 48 192 +V
FLAG 336 368 -V
TEXT 480 480 Left 2 !.ac oct 20 100K 100Meg
TEXT 472 328 Left 2 !.measure pt1 find V(out) at 3.5Meg\n.measure pt2 find V(out) at 5.25Meg\n.measure pt3 find V(out) at 7Meg\n.measure pt4 find V(out) at 14Meg\n.measure pt5 find V(out) at 35Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6363-.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6363-.5.asy)
V3 IN 0 SINE(0 500m 250K)
XU1 0 N001 +V +OUT -OUT -V +V IN LTC6363-.5 ;pnba IN-)Vocm)V+)+OUT)-OUT)V-)_SHDN)IN+
V1 +V 0 6
V2 -V 0 -1
C1 N001 0 .1
.tran 20u
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2592 1424
WIRE 464 -16 464 -32
WIRE 336 64 320 64
WIRE 656 64 592 64
WIRE 336 128 80 128
WIRE 656 128 592 128
WIRE -160 144 -160 128
WIRE -48 144 -48 128
WIRE 80 144 80 128
WIRE -160 240 -160 224
WIRE -48 240 -48 224
WIRE 80 240 80 224
WIRE 400 240 400 224
WIRE 464 240 464 224
WIRE 512 272 512 224
WIRE 512 352 512 336
SYMBOL voltage -48 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value -1
SYMBOL LTC6363-.5 464 96 R0
SYMATTR InstName U1
SYMBOL voltage 80 128 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 500m 250K)
SYMBOL cap 496 272 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage -160 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 6
FLAG -160 240 0
FLAG -48 240 0
FLAG -160 128 +V
FLAG -48 128 -V
FLAG 464 -32 +V
FLAG 464 240 -V
FLAG 400 240 +V
FLAG 80 240 0
FLAG 80 128 IN
FLAG 656 64 +OUT
FLAG 656 128 -OUT
FLAG 320 64 0
FLAG 512 352 0
TEXT 640 336 Left 2 !.tran 20u
* Z:\home\khalils\Downloads\files\data\raw_asc\SampleAndHold.asc
* Generated by LTspice 26.0.1 for Windows.
A1 IN 0 0 N001 0 0 A 0 SAMPLEHOLD
A2 IN 0 N001 0 0 0 B 0 SAMPLEHOLD
V1 IN 0 SINE(0 1 300)
V2 N001 0 PULSE(0 1 0 1u 1u 50u 100u)
.tran 10m
* This example schematic is supplied for informational/educational purposes only.
* This output follows the input whenever the S/H input is true.
* This output latches to the input when the CLK input goes TRUE.
* The behavioral Sample and Hold has two modes of operation.
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 680
WIRE 128 64 32 64
WIRE 336 112 304 112
WIRE 128 160 64 160
WIRE 32 272 32 64
WIRE 32 272 -160 272
WIRE 128 272 32 272
WIRE -160 288 -160 272
WIRE 336 320 304 320
WIRE 64 336 64 160
WIRE 128 336 64 336
WIRE -160 384 -160 368
WIRE 64 400 64 336
WIRE 64 512 64 480
FLAG 64 512 0
FLAG -160 384 0
FLAG 336 112 A
FLAG 336 320 B
FLAG -160 272 IN
SYMBOL SpecialFunctions\\sample 208 96 R0
SYMATTR InstName A1
SYMBOL SpecialFunctions\\sample 208 304 R0
SYMATTR InstName A2
SYMBOL voltage -160 272 R0
WINDOW 3 23 92 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 1 300)
SYMATTR InstName V1
SYMBOL voltage 64 384 R0
WINDOW 0 18 18 Left 2
WINDOW 3 23 97 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 0 1u 1u 50u 100u)
TEXT 472 528 Left 2 !.tran 10m
TEXT 208 552 Top 1 ;This example schematic is supplied for informational/educational purposes only.
TEXT 360 112 Left 2 ;This output follows the input whenever the S/H input is true.
TEXT 360 320 Left 2 ;This output latches to the input when the CLK input goes TRUE.
TEXT 208 -8 Bottom 2 ;The behavioral Sample and Hold has two modes of operation.
* Z:\home\khalils\Downloads\files\data\raw_asc\5b5b5f866690_Current-mirrors.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Vcc 0 12
V2 VL 0 1
Q1 VL N001 0 0 2N3904
Q2 N001 N001 0 0 2N3904
R1 Vcc N001 11.4k
Q3 VL N002 N004 0 2N3904
Q4 N002 N002 N003 0 2N3904
R2 Vcc N002 10.4k
R3 N003 0 1k
R4 N004 0 500
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V2 0 10 0.1
* Sizing:\n \n1) Set reference current -> 1 mA\n2) Iref = (Vcc-Vbe)/R1 -> R1 = (Vcc-Vbe)/R1 = (12-0.6)/1m =11.4k\n \nOutput resistance Rout = ?
* The following relation holds: Io/Iref = R3/R4\n \nSizing:\n1) Set Iref = I(R2) = 1mA\n2) Set V(R3) = 1 V -> R3 = 1k ohm\n3) If we want Io = 2 Iref -> R3/R4 = 2 -> R4 = 500 ohm\n4) R is given by R = (Vcc - Vbe - V(R3))/Iref = (12-0.6-1)/1m = 10.4 k ohm
* Io
* Iref
* Current mirrors
* DC sweep analysis
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1348 1060
WIRE -144 -128 -144 -144
WIRE -32 -128 -32 -144
WIRE -144 -16 -144 -48
WIRE -32 -16 -32 -48
WIRE 112 160 112 128
WIRE 112 256 112 240
WIRE 192 256 112 256
WIRE 112 288 112 256
WIRE 304 288 304 128
WIRE 192 336 192 256
WIRE 192 336 176 336
WIRE 240 336 192 336
WIRE 112 416 112 384
WIRE 304 416 304 384
WIRE 112 624 112 592
WIRE 112 720 112 704
WIRE 192 720 112 720
WIRE 112 752 112 720
WIRE 304 752 304 592
WIRE 192 800 192 720
WIRE 192 800 176 800
WIRE 240 800 192 800
WIRE 112 896 112 848
WIRE 304 896 304 848
WIRE 112 1008 112 976
WIRE 304 1008 304 976
FLAG 112 416 0
FLAG 304 416 0
FLAG -144 -16 0
FLAG -32 -16 0
FLAG 304 1008 0
FLAG 112 1008 0
FLAG -32 -144 VL
FLAG 304 128 VL
FLAG 304 592 VL
FLAG 112 592 Vcc
FLAG 112 128 Vcc
FLAG -144 -144 Vcc
SYMBOL voltage -144 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL voltage -32 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL npn 240 288 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL npn 176 288 M0
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL res 96 144 R0
SYMATTR InstName R1
SYMATTR Value 11.4k
SYMBOL npn 240 752 R0
SYMATTR InstName Q3
SYMATTR Value 2N3904
SYMBOL npn 176 752 M0
SYMATTR InstName Q4
SYMATTR Value 2N3904
SYMBOL res 96 608 R0
SYMATTR InstName R2
SYMATTR Value 10.4k
SYMBOL res 96 880 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 288 880 R0
SYMATTR InstName R4
SYMATTR Value 500
TEXT 96 8 Left 2 !.dc V2 0 10 0.1
TEXT 472 88 Left 2 ;Sizing:\n \n1) Set reference current -> 1 mA\n2) Iref = (Vcc-Vbe)/R1 -> R1 = (Vcc-Vbe)/R1 = (12-0.6)/1m =11.4k\n \nOutput resistance Rout = ?
TEXT 464 584 Left 2 ;The following relation holds: Io/Iref = R3/R4\n \nSizing:\n1) Set Iref = I(R2) = 1mA\n2) Set V(R3) = 1 V -> R3 = 1k ohm\n3) If we want Io = 2 Iref -> R3/R4 = 2 -> R4 = 500 ohm\n4) R is given by R = (Vcc - Vbe - V(R3))/Iref = (12-0.6-1)/1m = 10.4 k ohm
TEXT 320 696 Left 2 ;Io
TEXT 48 656 Left 2 ;Iref
TEXT 448 -120 Left 4 ;Current mirrors
TEXT 104 -24 Left 2 ;DC sweep analysis
RECTANGLE Normal 1248 464 0 48 2
RECTANGLE Normal 1248 1056 0 464 2