* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3350.asc
* Generated by LTspice 26.0.1 for Windows.
* Note: 1. The real part allows up to 4 supercap to be charged in series, \n with internal balancer and active shunt regulator to gurantee \n them to have even voltage. The model does not support these\n features, even though users can put capacitors in series.\n 2. GPI pin is not modeled.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3350.asy)
R4 N019 0 121
M2 OUT N002 CAP CAP IRF8910
C8 N018 N020 .1
R7 CAP N016 866K
C6 N007 N010 .1
L1 N010 N011 3.3 Rser=10m
R8 N016 0 118K
C1 N013 0 1
C7 CAP N015 .1
M1 N003 N006 IN IN IRF8910
M3 OUT N008 N010 N010 BSZ060NE2LS
R5 OUT N003 16m
Rload OUT 0 10
Csupercap CAP 0 1m Rser=.1
R3 N017 0 71.5K
R6 N011 CAP 6m
R1 IN N009 806K
R2 N009 0 100K
C11 OUT 0 2.2 x2 V=25 Irms=6.893 Rser=0.005 Lser=0 mfg="KEMET" pn="C1210C225K3PAC" type="X5R"
C4 N004 0 4.7
V1 IN 0 12
D1 N004 N007 CMDSH2-3
C2 N014 0 .01
C5 CAP 0 22 x4 V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
M4 N010 N012 0 0 BSZ060NE2LS
R9 OUT N001 866K
C3 N003 N005 1
R10 N001 0 118K
XU1 MP_01 MP_02 MP_03 NC_04 N014 N016 N001 0 N017 MP_05 N019 MP_06 MP_07 MP_08 MP_09 MP_10 N018 N020 N015 N002 CAP N011 N013 N010 N008 N007 N012 N004 N004 OUT N003 N005 N006 IN MP_11 MP_12 N009 NC_13 0 LTC3350 ;pnba )))CAPGD)Vc)CAPFB)OUTFB)SGND)RT))ITST))))))CFP)CFN)VCAPP5)OUTFET)VCAP)ICAP)VCC2P5)SW)TGATE)BST)BGATE)DRVcc)INTVcc)VOUTSN)VOUTSP)VOUTM5)INFET)Vin)))PFI)_PFO)PGND
C10 OUT 0 47 x2 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 10m startup
.lib LTC3350.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2576 824
WIRE 144 -368 -96 -368
WIRE 704 -368 144 -368
WIRE 816 -368 704 -368
WIRE 1072 -368 816 -368
WIRE 1184 -368 1072 -368
WIRE 1280 -368 1184 -368
WIRE 1392 -368 1280 -368
WIRE -96 -352 -96 -368
WIRE 672 -352 256 -352
WIRE 1072 -352 1072 -368
WIRE 1184 -352 1184 -368
WIRE 1280 -352 1280 -368
WIRE 1392 -352 1392 -368
WIRE 992 -336 368 -336
WIRE 144 -320 144 -368
WIRE 256 -320 256 -352
WIRE 368 -320 368 -336
WIRE 704 -272 704 -368
WIRE 992 -272 992 -336
WIRE 1024 -272 992 -272
WIRE -96 -256 -96 -272
WIRE -64 -256 -96 -256
WIRE 0 -256 -64 -256
WIRE 544 -256 512 -256
WIRE 592 -256 544 -256
WIRE 1184 -256 1184 -288
WIRE 1280 -256 1280 -288
WIRE 1392 -256 1392 -272
WIRE -64 -240 -64 -256
WIRE 592 -240 592 -256
WIRE 672 -176 672 -352
WIRE 704 -176 704 -192
WIRE 704 -176 672 -176
WIRE -64 -160 -64 -176
WIRE 0 -160 -64 -160
WIRE 544 -160 544 -256
WIRE 544 -160 512 -160
WIRE 592 -160 592 -176
WIRE 704 -160 704 -176
WIRE -96 -144 -96 -256
WIRE 544 -144 544 -160
WIRE 0 -64 -48 -64
WIRE 544 -64 544 -80
WIRE 544 -64 512 -64
WIRE 704 -64 704 -80
WIRE 816 -48 816 -368
WIRE -96 32 -96 -48
WIRE -96 32 -240 32
WIRE 0 32 -96 32
WIRE 768 32 512 32
WIRE -240 48 -240 32
WIRE 544 48 544 -64
WIRE -96 128 -96 112
WIRE 0 128 -96 128
WIRE 544 128 544 112
WIRE 544 128 512 128
WIRE 816 128 816 48
WIRE 816 128 544 128
WIRE 848 128 816 128
WIRE 960 128 928 128
WIRE 976 128 960 128
WIRE 1072 128 1072 -256
WIRE 1072 128 1056 128
WIRE 1120 128 1072 128
WIRE 1200 128 1120 128
WIRE -240 144 -240 128
WIRE 816 144 816 128
WIRE 1120 144 1120 128
WIRE 1200 144 1200 128
WIRE 768 224 512 224
WIRE 1120 240 1120 208
WIRE 1200 240 1200 208
WIRE 816 256 816 240
WIRE 960 320 960 128
WIRE 960 320 512 320
WIRE -96 416 -112 416
WIRE 0 416 -32 416
WIRE 560 416 512 416
WIRE 768 416 560 416
WIRE 1072 416 1072 128
WIRE 1072 416 768 416
WIRE 560 432 560 416
WIRE 768 448 768 416
WIRE -96 512 -112 512
WIRE 0 512 -32 512
WIRE 560 512 560 496
WIRE 560 512 512 512
WIRE 768 560 768 528
WIRE 768 560 624 560
WIRE 768 592 768 560
WIRE -96 608 -112 608
WIRE 0 608 -16 608
WIRE 560 608 512 608
WIRE 560 624 560 608
WIRE 768 688 768 672
WIRE -96 704 -112 704
WIRE 0 704 -16 704
WIRE 560 704 560 688
WIRE 560 704 512 704
WIRE 144 784 144 768
WIRE 256 784 256 768
WIRE 368 784 368 768
WIRE 624 784 624 560
WIRE 624 784 368 784
SYMBOL cap 1168 -352 R0
WINDOW 123 22 55 Left 2
WINDOW 0 23 4 Left 2
WINDOW 3 34 32 Left 2
SYMATTR Value2 x2
SYMATTR InstName C10
SYMATTR Value 47
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL nmos 768 144 R0
SYMATTR InstName M4
SYMATTR Value BSZ060NE2LS
SYMBOL cap 544 432 R0
SYMATTR InstName C7
SYMATTR Value .1
SYMBOL cap -32 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 1376 -368 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL res -112 112 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL cap 544 624 R0
SYMATTR InstName C8
SYMATTR Value .1
SYMBOL nmos 1024 -352 R0
SYMATTR InstName M2
SYMATTR Value IRF8910
SYMBOL nmos 768 -48 R0
SYMATTR InstName M3
SYMATTR Value BSZ060NE2LS
SYMBOL res 0 688 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 121
SYMBOL res 688 -176 R0
SYMATTR InstName R10
SYMATTR Value 118K
SYMBOL res 688 -288 R0
SYMATTR InstName R9
SYMATTR Value 866K
SYMBOL res 960 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R6
SYMATTR Value 6m
SYMBOL cap -32 496 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL res -112 -368 R0
SYMATTR InstName R5
SYMATTR Value 16m
SYMBOL cap 576 -240 R0
SYMATTR InstName C4
SYMATTR Value 4.7
SYMBOL cap 1264 -352 R0
WINDOW 123 21 57 Left 2
WINDOW 0 21 4 Left 2
WINDOW 3 34 32 Left 2
SYMATTR Value2 x2
SYMATTR InstName C11
SYMATTR Value 2.2
SYMATTR SpiceLine V=25 Irms=6.893 Rser=0.005 Lser=0 mfg="KEMET" pn="C1210C225K3PAC" type="X5R"
SYMBOL res 752 432 R0
SYMATTR InstName R7
SYMATTR Value 866K
SYMBOL nmos -48 -144 M0
SYMATTR InstName M1
SYMATTR Value IRF8910
SYMBOL res 752 576 R0
SYMATTR InstName R8
SYMATTR Value 118K
SYMBOL PowerProducts\\LTC3350 256 224 R0
SYMATTR InstName U1
SYMBOL ind 832 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=10m
SYMBOL res 0 592 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 71.5K
SYMBOL cap 1184 144 R0
SYMATTR InstName Csupercap
SYMATTR Value 1m
SYMATTR SpiceLine Rser=.1
SYMBOL res -112 16 R0
SYMATTR InstName R1
SYMATTR Value 806K
SYMBOL voltage -240 32 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 528 48 R0
SYMATTR InstName C6
SYMATTR Value .1
SYMBOL cap -80 -240 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 1104 144 R0
WINDOW 123 22 64 Left 2
WINDOW 3 34 36 Left 2
SYMATTR Value2 x4
SYMATTR InstName C5
SYMATTR Value 22
SYMATTR SpiceLine V=25 Irms=0 Rser=0.003 Lser=0 mfg="TDK" pn="C575OX5RIE226M" type="X5R"
SYMBOL schottky 528 -144 R0
SYMATTR InstName D1
SYMATTR Value CMDSH2-3
SYMATTR Description Diode
SYMATTR Type diode
FLAG 144 784 0
FLAG 256 784 0
FLAG -240 144 0
FLAG -96 208 0
FLAG -112 416 0
FLAG -112 512 0
FLAG -112 608 0
FLAG -112 704 0
FLAG 592 -160 0
FLAG 816 256 0
FLAG 1120 240 0
FLAG 768 688 0
FLAG 1200 240 0
FLAG 704 -64 0
FLAG 1184 -256 0
FLAG 1280 -256 0
FLAG 1392 -256 0
FLAG -240 32 IN
FLAG 1392 -368 OUT
FLAG 1200 128 CAP
TEXT 1248 680 Left 2 !.tran 10m startup
TEXT 1224 -152 Left 2 ;Note: 1. The real part allows up to 4 supercap to be charged in series, \n              with internal balancer and active shunt regulator to gurantee \n              them to have even voltage. The model does not support these\n              features, even though users can put capacitors in series.\n          2. GPI pin is not modeled.