Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1504A-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1504A-3.3.asy)
C1 OUT 0 100 Rser=.1
C3 N004 0 5000p
Rload OUT 0 50
XU1 N001 IN N003 0 OUT N002 N006 N005 LTC1504A top=20.4K bot=12.6K ;pnba Imax)Vcc)SW)GND)Sense)_SHND)SS)COMP
V1 IN 0 5
R1 IN N001 47K
L1 N003 OUT 50
R2 N005 N004 5K
C2 N006 0 .01
.tran 5m startup
.lib LTC1504A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2224 1840
WIRE 1328 1280 1136 1280
WIRE 1392 1280 1328 1280
WIRE 1520 1280 1472 1280
WIRE 1136 1296 1136 1280
WIRE 1328 1328 1328 1280
WIRE 1520 1328 1520 1280
WIRE 1136 1392 1136 1376
WIRE 1264 1424 1248 1424
WIRE 1616 1424 1584 1424
WIRE 1728 1424 1696 1424
WIRE 1808 1424 1728 1424
WIRE 1808 1440 1808 1424
WIRE 1168 1520 1136 1520
WIRE 1264 1520 1248 1520
WIRE 1728 1520 1728 1424
WIRE 1728 1520 1584 1520
WIRE 1728 1536 1728 1520
WIRE 1808 1536 1808 1520
WIRE 1136 1552 1136 1520
WIRE 1728 1616 1728 1600
WIRE 1136 1632 1136 1616
WIRE 1312 1632 1312 1616
WIRE 1536 1632 1536 1616
WIRE 1312 1712 1312 1696
SYMBOL polcap 1712 1536 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=.1
SYMBOL res 1792 1424 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL res 1376 1296 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 47K
SYMBOL PowerProducts\\LTC1504A-3.3 1424 1472 R0
SYMATTR InstName U1
SYMBOL cap 1296 1632 R0
WINDOW 3 24 57 Left 2
SYMATTR Value .01
SYMATTR InstName C2
SYMBOL ind 1600 1440 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 50
SYMBOL cap 1120 1552 R0
SYMATTR InstName C3
SYMATTR Value 5000p
SYMBOL VOLTAGE 1136 1280 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 1264 1504 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
FLAG 1136 1392 0
FLAG 1536 1632 0
FLAG 1312 1712 0
FLAG 1728 1616 0
FLAG 1136 1632 0
FLAG 1808 1536 0
FLAG 1808 1424 OUT
FLAG 1136 1280 IN
TEXT 1560 1696 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1dee8679130f_ADCbit.asc
* Generated by LTspice 26.0.1 for Windows.
* Determine if vin is > or < VCM
* Either subtract VCM or nothing to Vin\nand then multiply by 2
* Pass the analog voltage to the output
S5 Vout Vinh Bitout Vtrip switmod
S4 0 Bitout VCM Vin switmod
S6 Vinl Vout Vtrip Bitout switmod
E1 Vinh 0 Vin VCM 2
E2 Vinl 0 Vin 0 2
S3 Bitout VDD Vin VCM switmod
.model switmod SW
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2740 696
WIRE 1088 -944 1040 -944
WIRE 1088 -896 1040 -896
WIRE 1088 -816 1040 -816
WIRE 1088 -768 1040 -768
WIRE 1136 -960 1136 -1008
WIRE 1136 -848 1136 -880
WIRE 1136 -832 1136 -848
WIRE 1136 -704 1136 -752
WIRE 1296 -848 1136 -848
WIRE 1488 -960 1472 -960
WIRE 1488 -800 1472 -800
WIRE 1536 -960 1488 -960
WIRE 1536 -800 1488 -800
WIRE 2016 -944 1968 -944
WIRE 2016 -896 1968 -896
WIRE 2016 -816 1968 -816
WIRE 2016 -768 1968 -768
WIRE 2064 -960 2064 -1008
WIRE 2064 -848 2064 -880
WIRE 2064 -832 2064 -848
WIRE 2064 -704 2064 -752
WIRE 2224 -848 2064 -848
IOPIN 1040 -944 In
IOPIN 1040 -896 In
IOPIN 1296 -848 Out
IOPIN 1136 -1008 In
IOPIN 1968 -896 In
IOPIN 2224 -848 Out
SYMBOL sw 1136 -864 M180
WINDOW 3 24 -12 Left 0
WINDOW 38 39 67 Left 0
WINDOW 0 38 33 Left 0
SYMATTR Value ""
SYMATTR SpiceModel switmod
SYMATTR InstName S3
SYMBOL sw 2064 -736 M180
WINDOW 3 24 -12 Left 0
WINDOW 38 39 67 Left 0
WINDOW 0 38 33 Left 0
SYMATTR Value ""
SYMATTR SpiceModel switmod
SYMATTR InstName S6
SYMBOL e 1584 -832 R0
SYMATTR InstName E2
SYMATTR Value 2
SYMBOL sw 2064 -864 M180
WINDOW 3 24 -12 Left 0
WINDOW 38 39 67 Left 0
WINDOW 0 38 33 Left 0
SYMATTR Value ""
SYMATTR SpiceModel switmod
SYMATTR InstName S5
SYMBOL e 1584 -992 R0
SYMATTR InstName E1
SYMATTR Value 2
SYMBOL sw 1136 -736 M180
WINDOW 3 24 -12 Left 0
WINDOW 38 39 67 Left 0
WINDOW 0 38 33 Left 0
SYMATTR Value ""
SYMATTR SpiceModel switmod
SYMATTR InstName S4
FLAG 1040 -944 Vin
FLAG 1040 -896 VCM
FLAG 1040 -816 VCM
FLAG 1040 -768 Vin
FLAG 1296 -848 Bitout
FLAG 1136 -704 0
FLAG 1136 -1008 VDD
FLAG 1968 -944 Bitout
FLAG 1968 -896 Vtrip
FLAG 1968 -816 Vtrip
FLAG 1968 -768 Bitout
FLAG 2224 -848 Vout
FLAG 1584 -896 0
FLAG 1584 -736 0
FLAG 1584 -976 Vinh
FLAG 1584 -816 Vinl
FLAG 1536 -752 0
FLAG 1536 -912 VCM
FLAG 1488 -960 Vin
FLAG 1488 -800 Vin
FLAG 2064 -1008 Vinh
FLAG 2064 -704 Vinl
TEXT 1000 -664 Left 0 ;Determine if vin is > or < VCM
TEXT 1424 -664 Left 0 ;Either subtract VCM or nothing to Vin\nand then multiply by 2
TEXT 1896 -632 Left 0 ;Pass the analog voltage to the output
TEXT 1264 -1048 Left 0 !.model switmod SW
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4412HV.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 N002 1N5819
MQ1 N003 N004 N002 N002 FDC638P
R1 N002 N005 470K
C1 N002 0 10
R2 N002 0 100
V1 N003 0 5
V2 N001 0 PWL(0 0 1 7)
XU1 N003 0 0 N005 N004 N002 LTC4412 ;pnba Vin)GND)CTL)STAT)Gate)Sense
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4412HV.asy)
.lib LTC4412.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2500 1716
WIRE 1760 1024 1360 1024
WIRE 2096 1024 1824 1024
WIRE 1360 1040 1360 1024
WIRE 1968 1104 1552 1104
WIRE 2096 1104 2096 1024
WIRE 2096 1104 2064 1104
WIRE 2144 1104 2096 1104
WIRE 2272 1104 2144 1104
WIRE 2368 1104 2272 1104
WIRE 2272 1120 2272 1104
WIRE 2368 1120 2368 1104
WIRE 1360 1136 1360 1120
WIRE 2144 1184 2144 1104
WIRE 1552 1216 1552 1104
WIRE 1680 1216 1552 1216
WIRE 2096 1216 2096 1104
WIRE 2096 1216 1936 1216
WIRE 2272 1216 2272 1184
WIRE 2368 1216 2368 1200
WIRE 1552 1232 1552 1216
WIRE 1680 1296 1664 1296
WIRE 2048 1296 2048 1152
WIRE 2048 1296 1936 1296
WIRE 1552 1328 1552 1312
WIRE 1680 1376 1664 1376
WIRE 2144 1376 2144 1264
WIRE 2144 1376 1936 1376
FLAG 1664 1376 0
FLAG 1664 1296 0
FLAG 2272 1216 0
FLAG 2368 1216 0
FLAG 1552 1328 0
FLAG 1360 1136 0
SYMBOL schottky 1760 1040 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMBOL PMOS 1968 1152 R270
WINDOW 0 90 48 VCenter 2
WINDOW 3 63 45 VCenter 2
SYMATTR InstName Q1
SYMATTR Value FDC638P
SYMBOL RES 2128 1168 R0
SYMATTR InstName R1
SYMATTR Value 470K
SYMBOL cap 2256 1120 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 2352 1104 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL VOLTAGE 1552 1216 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 1360 1024 R0
SYMATTR InstName V2
SYMATTR Value PWL(0 0 1 7)
SYMBOL PowerProducts\\LTC4412HV 1808 1296 R0
SYMATTR InstName U1
TEXT 2208 1368 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\AD3531R.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD3531R.asy)
XU1 vDAC Vdd 0 vOUT AD3531R Gain=1 ;pnba Vdac)Vdd)GND)Vout
RLOAD vOUT 0 1k
CLOAD vOUT 0 15n
V1 Vdd 0 5
Vdac vDAC 0 PWL(0 0.625 1u 0.625 +0.5u 1.875)
.tran 10u
.lib AD3531R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 952 680
WIRE -512 -144 -800 -144
WIRE -240 -144 -512 -144
WIRE -800 -112 -800 -144
WIRE -240 -32 -240 -144
WIRE -800 0 -800 -32
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 112 112 0 112
WIRE 192 112 112 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 1u 0.625 +0.5u 1.875)
SYMBOL AD3531R -208 112 R0
SYMATTR InstName U1
SYMATTR SpiceLine Gain=1
SYMBOL voltage -800 -128 R0
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 15n
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -800 0 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -512 -144 Vdd
TEXT -160 312 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3479.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3479.asy)
V1 IN 0 5
L1 N001 N002 4.7
XU1 N002 MP_01 N001 IN IN N006 IN N004 N004 N003 N007 N005 0 LT3479 ;pnba SW))L)Vs)Vin)Rt)_SHDN)Vref)FBP)FBN)Vc)SS)GND
C3 OUT 0 30
R1 N008 N007 10K
Rload OUT 0 25
R3 OUT N003 200K
R2 N006 0 17.8K
D1 N002 OUT 1N5819
C2 N005 0 .001
R4 N003 0 23.2K
C1 N008 0 .0022
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib LT3479.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 64 176 64
WIRE 288 64 272 64
WIRE 304 64 288 64
WIRE 416 64 368 64
WIRE 528 64 416 64
WIRE 608 64 528 64
WIRE 416 80 416 64
WIRE 608 80 608 64
WIRE -16 96 -112 96
WIRE 64 96 -16 96
WIRE 528 96 528 64
WIRE -112 112 -112 96
WIRE 64 112 64 96
WIRE 176 112 176 64
WIRE 288 112 288 64
WIRE -16 176 -16 96
WIRE 16 176 -16 176
WIRE 416 176 416 160
WIRE 416 176 336 176
WIRE 416 192 416 176
WIRE 528 192 528 160
WIRE 608 192 608 160
WIRE -112 208 -112 192
WIRE -16 240 -16 176
WIRE 16 240 -16 240
WIRE 352 240 336 240
WIRE 416 288 416 272
WIRE -64 304 -80 304
WIRE 16 304 0 304
WIRE 352 304 352 240
WIRE 352 304 336 304
WIRE 16 368 -48 368
WIRE 352 368 336 368
WIRE 448 368 432 368
WIRE -48 384 -48 368
WIRE 448 384 448 368
WIRE 176 432 176 416
WIRE 448 464 448 448
WIRE -48 480 -48 464
SYMBOL res -64 368 R0
SYMATTR InstName R2
SYMATTR Value 17.8K
SYMBOL res 400 176 R0
SYMATTR InstName R4
SYMATTR Value 23.2K
SYMBOL ind 176 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL cap 432 384 R0
SYMATTR InstName C1
SYMATTR Value .0022
SYMBOL PowerProducts\\LT3479 176 256 R0
SYMATTR InstName U1
SYMBOL cap 0 288 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .001
SYMBOL voltage -112 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 448 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 592 64 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL schottky 304 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 400 64 R0
SYMATTR InstName R3
SYMATTR Value 200K
SYMBOL cap 512 96 R0
SYMATTR InstName C3
SYMATTR Value 30
FLAG 448 464 0
FLAG 176 432 0
FLAG -80 304 0
FLAG -48 480 0
FLAG -112 208 0
FLAG 528 192 0
FLAG 416 288 0
FLAG 608 192 0
FLAG 608 64 OUT
FLAG -112 96 IN
TEXT 472 320 Left 2 !.tran 1m startup
* Z:\tmp\asc_dec_bjh7r6w2\0495c6f3b833_TP2_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N006 N005 -10
R2 N001 N005 1.8Meg
V4 Vcc 0 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1072 680
WIRE 400 80 384 80
WIRE 496 80 496 16
WIRE 496 80 480 80
WIRE 512 80 496 80
WIRE 224 96 224 80
WIRE 512 160 512 144
WIRE 240 176 176 176
WIRE 384 176 384 80
WIRE 384 176 320 176
WIRE 480 176 384 176
WIRE 608 192 608 80
WIRE 608 192 544 192
WIRE 480 208 464 208
WIRE 288 256 272 256
WIRE 368 256 352 256
WIRE 384 256 384 176
WIRE 384 256 368 256
WIRE 464 256 464 208
WIRE 176 272 176 176
WIRE 512 304 512 224
WIRE 272 448 272 256
WIRE 512 448 512 384
WIRE 512 448 272 448
SYMBOL voltage 512 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -10
SYMBOL res 384 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1.8Meg
SYMBOL voltage 224 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 10
FLAG 224 96 0
FLAG 224 0 Vcc
FLAG 512 144 Vcc
FLAG 464 256 0
* Z:\home\khalils\Downloads\files\data\raw_asc\4ea2ed881c06_char-pmos-1.asc
* Generated by LTspice 26.0.1 for Windows.
Vdd N001 0 1.8
V1 N002 0 0.4
M1 0 N002 N001 N001 p18.6 l=1u w=10u ad={5*W*LAMBDA} as={5*W*LAMBDA} pd={10*LAMBDA+2*W} ps={10*LAMBDA+2*W}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib 'ts18sl_scl.lib' tt_18
.param L=180n W=5u n=1 LAMBDA=0.09u
;op
.dc dec V1 1.5 0.2 1000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1308 704
WIRE 640 224 640 208
WIRE 1232 224 640 224
WIRE 640 272 640 224
WIRE 720 272 640 272
WIRE 640 288 640 272
WIRE 1232 288 1232 224
WIRE 592 304 368 304
WIRE 720 336 720 272
WIRE 720 336 640 336
WIRE 368 352 368 304
WIRE 1232 384 1232 368
FLAG 1232 384 0
FLAG 368 432 0
FLAG 640 384 0
SYMBOL voltage 1232 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdd
SYMATTR Value 1.8
SYMBOL voltage 368 336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0.4
SYMBOL pmos4 592 384 M180
SYMATTR InstName M1
SYMATTR Value p18.6
SYMATTR Value2 l=1u w=10u ad={5*W*LAMBDA} as={5*W*LAMBDA} pd={10*LAMBDA+2*W} ps={10*LAMBDA+2*W}
TEXT 128 72 Left 2 !.lib 'ts18sl_scl.lib' tt_18
TEXT 368 152 Left 2 !.param L=180n W=5u n=1 LAMBDA=0.09u
TEXT 536 88 Left 2 !;op
TEXT 736 48 Left 2 !.dc dec V1 1.5 0.2 1000
* Z:\home\khalils\Downloads\files\data\raw_asc\1fc5ecb5334d_External_Library_Example.asc
* Generated by LTspice 26.0.1 for Windows.
* Simulation
*.op
* Spice Directives
* Power Supplies
* Libraries
V2 V- 0 -15
V1 V+ 0 15
XU1 0 Vn V+ V- Vo UA741 ;pnba In+)In-)V+)V-)OUT
R1 Vo Vn 2k
V3 Vin 0 SINE(0 1 1k)
R2 Vn Vin 1k
.inc UA741.lib
.tran 0 5m 0 100u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1432 696
WIRE 384 176 336 176
WIRE 496 176 464 176
WIRE 400 288 400 272
WIRE 224 304 160 304
WIRE 336 304 336 176
WIRE 336 304 304 304
WIRE 368 304 336 304
WIRE 496 320 496 176
WIRE 496 320 432 320
WIRE 528 320 496 320
WIRE 160 336 160 304
WIRE 368 336 336 336
WIRE 400 368 400 352
WIRE 688 368 688 336
WIRE 784 368 784 336
WIRE 336 384 336 336
WIRE 160 448 160 416
WIRE 688 480 688 448
WIRE 784 480 784 448
RECTANGLE Normal 1024 240 640 160 2
RECTANGLE Normal 880 528 640 288 2
RECTANGLE Normal 576 112 352 64 2
RECTANGLE Normal 880 112 640 32 2
SYMBOL OpAmps\\opamp2 400 256 R0
SYMATTR InstName U1
SYMATTR Value UA741
SYMBOL voltage 160 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1k)
SYMBOL res 480 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2k
SYMBOL voltage 784 352 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 688 352 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 320 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 784 480 0
FLAG 688 480 0
FLAG 688 336 V+
FLAG 784 336 V-
FLAG 400 272 V+
FLAG 400 368 V-
FLAG 528 320 Vo
FLAG 336 384 0
FLAG 160 448 0
FLAG 160 304 Vin
FLAG 336 304 Vn
TEXT 640 16 Left 2 ;Simulation
TEXT 368 88 Left 2 !.inc UA741.lib
TEXT 648 56 Left 2 !*.op\n.tran 0 5m 0 100u
TEXT 640 144 Left 2 ;Spice Directives
TEXT 640 272 Left 2 ;Power Supplies
TEXT 352 48 Left 2 ;Libraries
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1911-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N004 N005 1
C2 N002 N003 1
C3 OUT 0 10
Rload OUT 0 18
V1 IN 0 4
C4 0 N001 .01
XU1 IN N002 N003 0 N005 OUT N004 N001 LTC1911-1.8 ;pnba Vin)C2+)C2-)GND)C1-)Vout)C1+)_SHDN
.tran 8m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1911-1.8.asy)
.lib LTC1911-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2248 2612
WIRE 1440 2160 1264 2160
WIRE 1760 2160 1728 2160
WIRE 1856 2160 1824 2160
WIRE 1264 2176 1264 2160
WIRE 1440 2256 1360 2256
WIRE 1856 2256 1728 2256
WIRE 1968 2256 1856 2256
WIRE 1264 2272 1264 2256
WIRE 1360 2272 1360 2256
WIRE 1856 2272 1856 2256
WIRE 1968 2272 1968 2256
WIRE 1360 2352 1360 2336
WIRE 1440 2352 1360 2352
WIRE 1792 2352 1728 2352
WIRE 1792 2368 1792 2352
WIRE 1856 2368 1856 2336
WIRE 1968 2368 1968 2352
WIRE 1440 2448 1408 2448
WIRE 1792 2448 1792 2432
WIRE 1792 2448 1728 2448
FLAG 1264 2272 0
FLAG 1408 2448 0
FLAG 1856 2368 0
FLAG 1968 2368 0
FLAG 1968 2256 OUT
FLAG 1856 2160 0
FLAG 1264 2160 IN
SYMBOL cap 1776 2368 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 1344 2272 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 1840 2272 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL RES 1952 2256 R0
SYMATTR InstName Rload
SYMATTR Value 18
SYMBOL VOLTAGE 1264 2160 R0
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL cap 1824 2144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value .01
SYMBOL PowerProducts\\LTC1911-1.8 1584 2304 R0
SYMATTR InstName U1
TEXT 1864 2448 Left 2 !.tran 8m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1363f2cac00d_Half_Wave_Rectifier.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
D1 N002 Vout 1N4148
V2 N001 0 15
R2 Vout 0 10k
V3 0 N004 15
XU2 N003 Vout N001 N004 N002 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 N003 0 SINE(0 100m 100)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.1
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -16 176 -16
WIRE 272 16 272 -16
WIRE 352 128 80 128
WIRE 176 144 176 -16
WIRE 80 160 80 128
WIRE 144 160 80 160
WIRE 272 176 208 176
WIRE 352 176 352 128
WIRE 352 176 336 176
WIRE 384 176 352 176
WIRE 464 176 384 176
WIRE 144 192 48 192
WIRE 384 192 384 176
WIRE 48 208 48 192
WIRE 176 304 176 208
WIRE 256 304 176 304
WIRE 384 304 384 272
WIRE 256 320 256 304
IOPIN 464 176 Out
SYMBOL res 368 176 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 256 416 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL diode 272 192 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 48 192 R0
WINDOW 0 -72 30 Left 2
WINDOW 3 -267 63 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 100m 100)
SYMBOL voltage 272 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL OpAmps\\UniversalOpamp2 176 176 R0
SYMATTR InstName U2
FLAG 48 288 0
FLAG 256 400 0
FLAG 272 96 0
FLAG 464 176 Vout
FLAG 384 304 0
TEXT -220 288 Left 2 !.tran 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\801e98c8d774_OR.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N001 0 5
M6 Vout N003 0 0 C5NNMOS l=0.6u w=3.6u
M5 N001 N003 Vout N001 C5NPMOS l=0.6u w=7.2u
M1 N003 N002 0 0 C5NNMOS l=0.6u w=3.6u
VB N005 0 PULSE(0 5 0 1n 1n 10u 20u)
M3 N001 N002 N004 N001 C5NPMOS l=0.6u w=7.2u
M2 N003 N005 0 0 C5NNMOS l=0.6u w=3.6u
VA N002 0 PULSE(0 5 0 1n 1n 5u 10u)
M4 N004 N005 N003 N001 C5NPMOS l=0.6u w=7.2u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include D:\NIELIT\ENGR3426\ENGR3426\engr3426.sub
.tran 100u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1232 680
WIRE 416 -160 288 -160
WIRE 528 -160 416 -160
WIRE 848 -160 528 -160
WIRE 960 -160 848 -160
WIRE 528 -128 528 -160
WIRE 288 -96 288 -160
WIRE 848 -96 848 -160
WIRE 416 -48 416 -160
WIRE 416 -48 288 -48
WIRE 960 -48 960 -160
WIRE 960 -48 848 -48
WIRE -32 -16 -480 -16
WIRE 240 -16 -32 -16
WIRE 528 -16 528 -48
WIRE 800 -16 624 -16
WIRE 288 64 288 0
WIRE 848 64 848 0
WIRE 1120 64 848 64
WIRE 416 112 416 -48
WIRE 416 112 288 112
WIRE 848 128 848 64
WIRE -112 144 -288 144
WIRE 240 144 -112 144
WIRE -288 160 -288 144
WIRE -480 176 -480 -16
WIRE 288 176 288 160
WIRE 624 176 624 -16
WIRE 624 176 288 176
WIRE 976 176 848 176
WIRE 288 208 288 176
WIRE 288 208 128 208
WIRE 400 208 288 208
WIRE 624 208 624 176
WIRE 800 208 624 208
WIRE -288 272 -288 240
WIRE -480 288 -480 256
WIRE 128 288 128 208
WIRE 400 288 400 208
WIRE 256 336 128 336
WIRE 512 336 400 336
WIRE -32 368 -32 -16
WIRE 80 368 -32 368
WIRE -112 400 -112 144
WIRE 352 400 352 368
WIRE 352 400 -112 400
WIRE 128 432 128 384
WIRE 256 432 256 336
WIRE 256 432 128 432
WIRE 400 432 400 384
WIRE 400 432 256 432
WIRE 512 432 512 336
WIRE 512 432 400 432
WIRE 848 432 848 224
WIRE 848 432 512 432
WIRE 976 432 976 176
WIRE 976 432 848 432
WIRE 256 448 256 432
IOPIN 1120 64 Out
SYMBOL nmos4 80 288 R0
SYMATTR InstName M1
SYMATTR Value C5NNMOS
SYMATTR Value2 l=0.6u w=3.6u
SYMBOL pmos4 240 64 R0
SYMATTR InstName M4
SYMATTR Value C5NPMOS
SYMATTR Value2 l=0.6u w=7.2u
SYMBOL voltage -480 160 R0
WINDOW 3 -6 167 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VA
SYMATTR Value PULSE(0 5 0 1n 1n 5u 10u)
SYMBOL pmos4 800 -96 R0
SYMATTR InstName M5
SYMATTR Value C5NPMOS
SYMATTR Value2 l=0.6u w=7.2u
SYMBOL voltage -288 144 R0
WINDOW 3 -200 222 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value PULSE(0 5 0 1n 1n 10u 20u)
SYMBOL nmos4 352 288 R0
SYMATTR InstName M2
SYMATTR Value C5NNMOS
SYMATTR Value2 l=0.6u w=3.6u
SYMBOL pmos4 240 -96 R0
SYMATTR InstName M3
SYMATTR Value C5NPMOS
SYMATTR Value2 l=0.6u w=7.2u
SYMBOL nmos4 800 128 R0
SYMATTR InstName M6
SYMATTR Value C5NNMOS
SYMATTR Value2 l=0.6u w=3.6u
SYMBOL voltage 528 -144 R0
SYMATTR InstName V3
SYMATTR Value 5
FLAG -480 288 0
FLAG -288 272 0
FLAG 528 -16 0
FLAG 256 448 0
FLAG 1120 64 Vout
TEXT -512 448 Left 2 !.include D:\\NIELIT\\ENGR3426\\ENGR3426\\engr3426.sub
TEXT -512 472 Left 2 !.tran 100u