* Z:\home\khalils\Downloads\files\data\raw_asc\1c95976cb7b2_Q4.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vout Vg 0 0 nch_tt W=450n L=180n
R1 N004 Vout 25k
Vdd1 N004 0 1.2
C1 Vout 0 1p
M2 N006 Vg 0 0 nch_tt W=450n L=180n
M3 N001 N001 N006 N006 nch_tt W=450n L=180n
Vdd2 N001 0 1.2
C2 N006 0 1p
M4 N007 Vg 0 0 nch_tt W=450n L=180n
M5 N002 N003 N007 N007 nch_tt W=450n L=180n
Vdd3 N002 0 1.2
C3 N007 0 1p
Vdd4 N003 0 1.6
M6 N008 Vg 0 0 nch_tt W=450n L=180n
M7 N008 Vg N005 N005 PMOS
Vdd5 N005 0 1.2
C4 N008 0 1p
Vg Vg 0 V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include "TSMC180.lib"
* W = 450nm, L = 180nm
.dc Vg 0 1.2 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 680
WIRE 944 -112 704 -112
WIRE 1680 -96 1440 -96
WIRE 704 -80 704 -112
WIRE 704 -80 608 -80
WIRE 1344 -80 1216 -80
WIRE 288 -64 112 -64
WIRE 1216 -64 1216 -80
WIRE 704 -48 704 -80
WIRE 112 -32 112 -64
WIRE 288 -32 288 -64
WIRE 1440 -32 1440 -96
WIRE 2800 -16 2432 -16
WIRE 2800 0 2800 -16
WIRE 608 32 608 -80
WIRE 656 32 608 32
WIRE 1344 48 1344 -80
WIRE 1392 48 1344 48
WIRE 2432 48 2432 -16
WIRE 2384 64 2320 64
WIRE 112 96 112 48
WIRE 208 96 112 96
WIRE 224 96 208 96
WIRE 112 112 112 96
WIRE 704 112 704 48
WIRE 800 112 704 112
WIRE 208 128 208 96
WIRE 1440 128 1440 64
WIRE 1536 128 1440 128
WIRE 2560 144 2432 144
WIRE 704 160 704 112
WIRE 704 176 704 160
WIRE 1440 176 1440 128
WIRE 2560 176 2560 144
WIRE 64 192 -48 192
WIRE 1440 192 1440 176
WIRE 2320 192 2320 64
WIRE 2320 192 2192 192
WIRE -48 224 -48 192
WIRE 2192 224 2192 192
WIRE 656 240 528 240
WIRE 2192 240 2192 224
WIRE 2432 240 2432 144
WIRE 1392 256 1264 256
WIRE 2560 256 2560 240
WIRE 528 288 528 240
WIRE 1264 288 1264 256
WIRE 1264 304 1264 288
WIRE 2320 320 2320 192
WIRE 2384 320 2320 320
WIRE 112 368 112 208
WIRE 2432 368 2432 336
WIRE 704 416 704 256
WIRE 1440 432 1440 272
FLAG 112 368 0
FLAG 288 48 0
FLAG 224 96 Vout
IOPIN 224 96 Out
FLAG 208 192 0
FLAG 944 -32 0
FLAG 704 416 0
FLAG 800 176 0
FLAG 1680 -16 0
FLAG 1440 432 0
FLAG 1536 192 0
FLAG 1216 16 0
FLAG 2800 80 0
FLAG 2432 368 0
FLAG 2560 256 0
FLAG -448 240 0
FLAG -448 160 Vg
FLAG -48 224 Vg
FLAG 528 288 Vg
FLAG 1264 288 Vg
FLAG 2192 224 Vg
SYMBOL nmos 64 112 R0
SYMATTR InstName M1
SYMATTR Value nch_tt
SYMATTR Value2 W=450n L=180n
SYMBOL res 96 -48 R0
SYMATTR InstName R1
SYMATTR Value 25k
SYMBOL voltage 288 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdd1
SYMATTR Value 1.2
SYMBOL cap 192 128 R0
SYMATTR InstName C1
SYMATTR Value 1p
SYMBOL nmos 656 160 R0
SYMATTR InstName M2
SYMATTR Value nch_tt
SYMATTR Value2 W=450n L=180n
SYMBOL nmos 656 -48 R0
SYMATTR InstName M3
SYMATTR Value nch_tt
SYMATTR Value2 W=450n L=180n
SYMBOL voltage 944 -128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdd2
SYMATTR Value 1.2
SYMBOL cap 784 112 R0
SYMATTR InstName C2
SYMATTR Value 1p
SYMBOL nmos 1392 176 R0
SYMATTR InstName M4
SYMATTR Value nch_tt
SYMATTR Value2 W=450n L=180n
SYMBOL nmos 1392 -32 R0
SYMATTR InstName M5
SYMATTR Value nch_tt
SYMATTR Value2 W=450n L=180n
SYMBOL voltage 1680 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdd3
SYMATTR Value 1.2
SYMBOL cap 1520 128 R0
SYMATTR InstName C3
SYMATTR Value 1p
SYMBOL voltage 1216 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdd4
SYMATTR Value 1.6
SYMBOL nmos 2384 240 R0
SYMATTR InstName M6
SYMATTR Value nch_tt
SYMATTR Value2 W=450n L=180n
SYMBOL pmos 2384 144 M180
SYMATTR InstName M7
SYMBOL voltage 2800 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdd5
SYMATTR Value 1.2
SYMBOL cap 2544 176 R0
SYMATTR InstName C4
SYMATTR Value 1p
SYMBOL voltage -448 144 R0
SYMATTR InstName Vg
TEXT 88 -176 Left 2 !.include "TSMC180.lib"
TEXT 88 -136 Left 2 ;W = 450nm, L = 180nm
TEXT -480 456 Left 2 !.dc Vg 0 1.2 1m