* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4416-1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 20m 0 40m 26 60m 0)
R1 0 N003 10K
R2 N004 N003 95.3K
R3 N003 IN 73.2K
V2 N007 0 15
Rload OUT 0 10
C1 OUT 0 10 Rser=10m
M1 OUT N002 N001 N001 IRF7233
M2 OUT N005 N008 N008 IRF7233
M3 IN N002 N001 N001 IRF7233
M4 N007 N005 N008 N008 IRF7233
XU2 N004 N003 0 N003 N006 N005 N007 OUT IN N002 LTC4416-1 ;pnba H1)E1)GND)_E2)_H2)G2)V2)Vs)V1)G1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m startup
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4416-1.asy)
.lib LTC4416-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 940 792
WIRE -432 0 -592 0
WIRE -192 0 -432 0
WIRE 304 0 -192 0
WIRE 352 0 304 0
WIRE 512 0 448 0
WIRE 656 0 608 0
WIRE 688 0 656 0
WIRE 704 0 688 0
WIRE 800 0 704 0
WIRE -592 16 -592 0
WIRE -192 16 -192 0
WIRE 704 16 704 0
WIRE 800 16 800 0
WIRE 432 64 432 48
WIRE 480 64 432 64
WIRE 528 64 528 48
WIRE 528 64 480 64
WIRE -592 112 -592 96
WIRE -192 112 -192 96
WIRE -96 112 -192 112
WIRE 0 112 -96 112
WIRE 16 112 0 112
WIRE 304 112 304 0
WIRE 304 112 272 112
WIRE 704 112 704 80
WIRE 800 112 800 96
WIRE -192 128 -192 112
WIRE 0 192 0 112
WIRE 16 192 0 192
WIRE 480 192 480 64
WIRE 480 192 272 192
WIRE -192 224 -192 208
WIRE 16 272 0 272
WIRE 656 272 656 0
WIRE 656 272 272 272
WIRE -96 352 -96 112
WIRE -80 352 -96 352
WIRE 16 352 0 352
WIRE 480 352 272 352
WIRE 16 432 0 432
WIRE 304 432 272 432
WIRE 480 432 480 352
WIRE 480 432 432 432
WIRE 544 432 480 432
WIRE 432 448 432 432
WIRE 544 448 544 432
WIRE 304 496 304 432
WIRE 304 496 -288 496
WIRE 352 496 304 496
WIRE 528 496 448 496
WIRE 656 496 656 272
WIRE 656 496 624 496
WIRE -288 512 -288 496
WIRE -288 608 -288 592
FLAG -592 112 0
FLAG -192 224 0
FLAG -288 608 0
FLAG 0 272 0
FLAG 800 112 0
FLAG 704 112 0
FLAG -432 0 IN
FLAG 688 0 OUT
SYMBOL voltage -592 0 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PWL(0 0 20m 0 40m 26 60m 0)
SYMATTR InstName V1
SYMBOL res -208 224 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 16 336 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 95.3K
SYMBOL res -208 112 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 73.2K
SYMBOL voltage -288 496 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL res 784 0 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL cap 688 16 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=10m
SYMBOL pmos 608 48 M270
WINDOW 0 121 47 VLeft 2
WINDOW 3 93 48 VLeft 2
SYMATTR InstName M1
SYMATTR Value IRF7233
SYMBOL pmos 624 448 R90
WINDOW 0 121 47 VLeft 2
WINDOW 3 93 48 VLeft 2
SYMATTR InstName M2
SYMATTR Value IRF7233
SYMBOL pmos 352 48 R270
WINDOW 0 121 47 VLeft 2
WINDOW 3 93 48 VLeft 2
SYMATTR InstName M3
SYMATTR Value IRF7233
SYMBOL pmos 352 448 M90
WINDOW 0 121 47 VLeft 2
WINDOW 3 93 48 VLeft 2
SYMATTR InstName M4
SYMATTR Value IRF7233
SYMBOL LTC4416-1 144 272 R0
SYMATTR InstName U2
TEXT 40 560 Left 2 !.tran 100m startup