Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\07836d2ce8cb_butter3_lp10k_mc_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N005 N001 VCC VSS out level3a Avol=1e5 GBW={GBW} Slew={GBW/2} En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V3 VSS 0 -15
R1 N004 N005 {6.8k*E1}
C3 N003 0 {1n*F5}
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2032 1492
WIRE 1648 928 1648 1024
WIRE 1648 1184 1568 1184
WIRE 1504 1200 1456 1200
WIRE 1344 1200 1312 1200
WIRE 1184 1200 1104 1200
WIRE 1504 1168 1472 1168
WIRE 1472 1168 1472 928
WIRE 1312 1056 1312 1024
WIRE 1312 1024 1648 1024
WIRE 1648 1024 1648 1184
WIRE 1312 1120 1312 1200
WIRE 1312 1200 1264 1200
WIRE 1456 1280 1456 1200
WIRE 1456 1200 1424 1200
WIRE 1456 1344 1456 1392
WIRE 960 1200 720 1200
WIRE 1648 1184 1712 1184
WIRE 1712 1184 1728 1184
WIRE 1536 1152 1536 1120
WIRE 1536 1120 1568 1120
WIRE 1536 1216 1536 1296
WIRE 1568 1120 1600 1120
WIRE 1536 1296 1568 1296
WIRE 1568 1296 1600 1296
WIRE 1088 976 1088 944
WIRE 1088 944 1120 944
WIRE 960 976 960 944
WIRE 960 944 992 944
WIRE 992 944 1024 944
WIRE 1120 944 1152 944
WIRE 1088 1056 1088 1088
WIRE 960 1056 960 1088
WIRE 1104 1280 1104 1200
WIRE 1104 1200 1040 1200
WIRE 1104 1344 1104 1392
SYMBOL Opamps\\UniversalOpamp 1536 1184 R0
WINDOW 123 16 44 Left 0
SYMATTR Value2 Avol=1e5 GBW={GBW} Slew={GBW/2}
SYMATTR InstName U1
SYMATTR SpiceModel level3a
SYMBOL voltage 1088 960 R0
WINDOW 39 0 0 Left 0
WINDOW 123 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -15
SYMBOL res 1328 1216 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value {6.8k*E1}
SYMBOL cap 1088 1280 R0
SYMATTR InstName C3
SYMATTR Value {1n*F5}
FLAG 1456 1392 GND
FLAG 1712 1184 out
FLAG 1568 1120 VCC
FLAG 1568 1296 VSS
FLAG 992 944 VCC
FLAG 1120 944 VSS
FLAG 1088 1088 GND
FLAG 960 1088 GND
FLAG 1104 1392 GND
* Z:\home\khalils\Downloads\files\data\raw_asc\017bcb8a89c5_phase_shift_modulator.asc
* Generated by LTspice 26.0.1 for Windows.
B1 out 0 V=delay(V(in),V(td)) tripdt=10n tripdv=.1
V2 td 0 PULSE(0 1e-3 0 20m 20m 0 40m)
V1 in 0 PULSE(0 1 0 .01m .01m .99m 2m)
.tran 40m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 128 -64 128
WIRE 96 128 64 128
WIRE 224 128 192 128
WIRE -64 144 -64 128
WIRE 64 144 64 128
WIRE 192 144 192 128
WIRE -64 240 -64 224
WIRE 64 240 64 224
WIRE 64 240 -64 240
WIRE 192 240 192 224
WIRE 192 240 64 240
WIRE 64 272 64 240
SYMBOL bv 192 128 R0
WINDOW 0 40 49 Left 0
WINDOW 3 -55 131 Left 0
SYMATTR InstName B1
SYMATTR Value V=delay(V(in),V(td))
SYMATTR Value2 tripdt=10n tripdv=.1
SYMBOL voltage -64 128 R0
WINDOW 0 35 42 Left 0
WINDOW 3 24 104 Invisible 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1e-3 0 20m 20m 0 40m)
SYMBOL voltage 64 128 R0
WINDOW 0 38 51 Left 0
WINDOW 3 24 104 Invisible 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 .01m .01m .99m 2m)
FLAG 64 272 0
FLAG -32 128 td
FLAG 96 128 in
FLAG 224 128 out
TEXT -64 88 Left 0 !.tran 40m
* Z:\home\khalils\Downloads\files\data\raw_asc\31bc697b7e9f_Mod_Generator.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N001 0 10k
V2 high_freq 0 SINE(0 1 1Meg 0 0 90)
V1 low_freq 0 PULSE(0.7 1.3 0 50u 50u 0 100u)
B1 mod 0 V=V(low_freq)*V(high_freq)
D2 mod N001 D
C2 N001 0 2n
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.5e-3
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1668 680
WIRE 1168 -16 1088 -16
WIRE 1296 -16 1168 -16
WIRE 1168 16 1168 -16
WIRE 1296 16 1296 -16
WIRE -208 112 -208 16
WIRE 256 128 256 32
WIRE 640 144 640 32
WIRE 1168 160 1168 80
WIRE 1248 160 1168 160
WIRE 1296 160 1296 96
WIRE 1296 160 1248 160
WIRE 1248 208 1248 160
WIRE -208 288 -208 192
WIRE 256 304 256 208
WIRE 640 304 640 224
SYMBOL voltage 256 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 1 1Meg 0 0 90)
SYMBOL diode 1024 0 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL voltage -208 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0.7 1.3 0 50u 50u 0 100u)
SYMBOL bv 640 128 R0
SYMATTR InstName B1
SYMATTR Value V=V(low_freq)*V(high_freq)
SYMBOL res 1280 0 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL cap 1152 16 R0
SYMATTR InstName C2
SYMATTR Value 2n
FLAG -208 288 0
FLAG 256 304 0
FLAG -208 16 low_freq
FLAG 256 32 high_freq
FLAG 640 304 0
FLAG 640 32 mod
FLAG 1024 -16 mod
FLAG 1248 208 0
TEXT -240 312 Left 2 !.tran 0.5e-3
* Z:\tmp\asc_dec_bjh7r6w2\0033015cc921_1361_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
C3 OUT N007 22p
R4 N003 IN 909
C2 N003 0 220p
XU1 0 N006 +V -V N004 LT1361 ;pnba In+)In-)V+)V-)OUT
V3 IN 0 AC 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1361.asy)
.lib LT1361.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -288 32 -288 0
WIRE -160 32 -160 0
WIRE 32 48 16 48
WIRE 256 48 112 48
WIRE 416 64 400 64
WIRE 640 64 496 64
WIRE 160 112 128 112
WIRE 256 112 256 48
WIRE 256 112 224 112
WIRE 544 128 512 128
WIRE 640 128 640 64
WIRE 640 128 608 128
WIRE -288 144 -288 112
WIRE -160 144 -160 112
WIRE 192 208 192 192
WIRE -80 224 -176 224
WIRE 16 224 16 48
WIRE 16 224 0 224
WIRE 32 224 16 224
WIRE 128 224 128 112
WIRE 128 224 112 224
WIRE 160 224 128 224
WIRE 576 224 576 208
WIRE -176 240 -176 224
WIRE 256 240 256 112
WIRE 256 240 224 240
WIRE 304 240 256 240
WIRE 400 240 384 240
WIRE 416 240 400 240
WIRE 512 240 512 128
WIRE 512 240 496 240
WIRE 544 240 512 240
WIRE 160 256 128 256
WIRE 640 256 640 128
WIRE 640 256 608 256
WIRE 672 256 640 256
WIRE 16 272 16 224
WIRE 544 272 512 272
WIRE 192 288 192 272
WIRE 576 304 576 288
WIRE -176 336 -176 320
WIRE 16 352 16 336
SYMBOL cap 608 112 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C3
SYMATTR Value 22p
SYMBOL res 16 208 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R4
SYMATTR Value 909
SYMBOL cap 0 272 R0
SYMATTR InstName C2
SYMATTR Value 220p
SYMBOL opamps\\LT1361 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -176 224 R0
SYMATTR InstName V3
SYMATTR Value AC 1
FLAG -160 144 0
FLAG 192 192 +V
FLAG 192 288 -V
FLAG -288 144 0
FLAG -176 336 0
FLAG 128 256 0
FLAG 16 352 0
FLAG 576 208 +V
FLAG 576 304 -V
FLAG 512 272 0
FLAG 672 256 OUT
FLAG -176 224 IN
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3453.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3453.asy)
R2 0 N007 8.25K
D1 N004 N005 LXK2-PW14
V1 N003 0 3.6
XU1 N003 N003 N007 N005 0 N005 N005 MP_01 N005 N008 N003 N006 N004 N002 N001 N003 LTC3453 ;pnba Vin)EN1)Iset1)LED1)GND)LED2)LED3))LED4)Iset2)EN2)Vc)Vout)SW2)SW1)PVin
L1 N001 N002 4.7
C3 N004 0 4.7
R1 0 N008 3.48K
C2 N006 0 .05 Rser=1K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m startup
.lib LTC3453.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2712 1940
WIRE 1840 1264 1792 1264
WIRE 1952 1264 1920 1264
WIRE 1792 1312 1792 1264
WIRE 1952 1312 1952 1264
WIRE 1504 1376 1408 1376
WIRE 1584 1376 1504 1376
WIRE 1680 1376 1584 1376
WIRE 2144 1376 2064 1376
WIRE 2336 1376 2144 1376
WIRE 1408 1392 1408 1376
WIRE 2336 1392 2336 1376
WIRE 1584 1456 1584 1376
WIRE 1680 1456 1584 1456
WIRE 2144 1456 2144 1440
WIRE 2144 1456 2064 1456
WIRE 2336 1472 2336 1456
WIRE 1408 1488 1408 1472
WIRE 1568 1536 1536 1536
WIRE 1680 1536 1632 1536
WIRE 2144 1536 2144 1456
WIRE 2144 1536 2064 1536
WIRE 1504 1616 1504 1376
WIRE 1680 1616 1504 1616
WIRE 2144 1616 2144 1536
WIRE 2144 1616 2064 1616
WIRE 1504 1696 1504 1616
WIRE 1680 1696 1504 1696
WIRE 2144 1696 2144 1616
WIRE 2144 1696 2064 1696
WIRE 1776 1776 1776 1760
WIRE 1872 1776 1872 1760
WIRE 1968 1776 1968 1760
WIRE 1776 1872 1776 1856
WIRE 1968 1872 1968 1856
SYMBOL ind 1824 1280 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL cap 2320 1392 R0
SYMATTR InstName C3
SYMATTR Value 4.7
SYMBOL cap 1632 1520 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .05 Rser=1K
SYMBOL res 1952 1872 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 3.48K
SYMBOL VOLTAGE 1408 1376 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL res 1760 1872 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 8.25K
SYMBOL LED 2128 1376 R0
WINDOW 0 77 23 Left 2
SYMATTR InstName D1
SYMATTR Value LXK2-PW14
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL PowerProducts\\LTC3453 1872 1536 R0
SYMATTR InstName U1
FLAG 1872 1776 0
FLAG 1408 1488 0
FLAG 1968 1872 0
FLAG 1776 1872 0
FLAG 1536 1536 0
FLAG 2336 1472 0
TEXT 2128 1736 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG733.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nCharge Injection not included\nCrosstalk at -72dB\nOnly One channel included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG733.asy)
V4 -V 0 -2.5
XU1 N004 N001 N002 N003 +V 0 0 -V ADG733 ;pnba IN)SA)D)SB)Vdd)GND)EN)Vss
V3 N004 0 PULSE(0 3 0 20n 20n 10u 20u)
C1 N002 0 36p
R1 N002 0 301
V5 +V 0 2.5
V2 N003 0 0
V1 N001 0 1.5
.tran 100u
.lib ADG733.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1696 -272 -1920 -272
WIRE -1920 -256 -1920 -272
WIRE -1408 -240 -1504 -240
WIRE -1296 -240 -1408 -240
WIRE -1408 -224 -1408 -240
WIRE -1296 -224 -1296 -240
WIRE -1696 -208 -1840 -208
WIRE -1840 -192 -1840 -208
WIRE -1920 -160 -1920 -176
WIRE -1696 -144 -1760 -144
WIRE -1472 -144 -1504 -144
WIRE -1472 -128 -1472 -144
WIRE -1408 -128 -1408 -144
WIRE -1296 -128 -1296 -160
WIRE -1840 -96 -1840 -112
WIRE -1760 -64 -1760 -144
WIRE -1536 -16 -1536 -32
WIRE -1664 0 -1664 -32
WIRE -1760 48 -1760 16
SYMBOL voltage -2048 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -2.5
SYMBOL cap -1312 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL ADG733 -1600 -192 R0
SYMATTR InstName U1
SYMBOL voltage -1840 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage -2144 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 2.5
SYMBOL voltage -1920 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL voltage -1760 -80 R0
WINDOW 3 24 136 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 20n 20n 10u 20u)
SYMATTR InstName V3
SYMBOL res -1424 -240 R0
SYMATTR InstName R1
SYMATTR Value 301
FLAG -1920 -160 0
FLAG -1840 -96 0
FLAG -1760 48 0
FLAG -1600 -368 +V
FLAG -1408 -128 0
FLAG -1536 -16 0
FLAG -1296 -128 0
FLAG -2048 -64 0
FLAG -2048 -144 -V
FLAG -1472 -128 0
FLAG -2144 -64 0
FLAG -2144 -144 +V
FLAG -1664 0 -V
TEXT -1360 -40 Left 2 !.tran 100u
TEXT -2160 -472 Left 2 ;Note:\nCharge Injection not included\nCrosstalk at -72dB\nOnly One channel included\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\14f8df4f25f3_nor_cos.asc
* Generated by LTspice 26.0.1 for Windows.
M2 Vout Vin_b 0 0 NMOS l=180nm w=270nm
M1 Vout Vin_a 0 0 NMOS l=180nm w=270nm
M3 N001 Vin_b Vout N001 PMOS l=180nm w=810nm
M4 vdd Vin_a N001 vdd PMOS l=180nm w=810nm
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 -208 352 -208
WIRE 448 -208 368 -208
WIRE 368 -160 368 -208
WIRE 368 -160 352 -160
WIRE 304 -128 144 -128
WIRE 352 -96 352 -112
WIRE 384 -96 352 -96
WIRE 384 -80 384 -96
WIRE 384 -80 352 -80
WIRE 384 -32 384 -80
WIRE 384 -32 352 -32
WIRE 304 0 96 0
WIRE 384 16 352 16
WIRE 384 64 384 16
WIRE 384 64 368 64
WIRE 576 64 384 64
WIRE 368 128 368 64
WIRE 368 128 240 128
WIRE 432 128 368 128
WIRE 240 176 240 128
WIRE 432 176 432 128
WIRE 256 224 240 224
WIRE 448 224 432 224
WIRE 144 256 144 -128
WIRE 192 256 144 256
WIRE 256 272 256 224
WIRE 256 272 240 272
WIRE 448 272 448 224
WIRE 448 272 432 272
WIRE 96 336 96 0
WIRE 384 336 384 256
WIRE 384 336 96 336
WIRE 256 400 256 272
WIRE 448 400 448 272
WIRE 448 400 256 400
IOPIN 144 -128 In
IOPIN 96 0 In
IOPIN 448 400 Out
IOPIN 448 -208 In
IOPIN 576 64 Out
SYMBOL pmos4 304 -208 R0
SYMATTR InstName M4
SYMATTR Value2 l=180nm w=810nm
SYMBOL nmos4 192 176 R0
SYMATTR InstName M1
SYMATTR Value2 l=180nm w=270nm
SYMBOL nmos4 384 176 R0
SYMATTR InstName M2
SYMATTR Value2 l=180nm w=270nm
SYMBOL pmos4 304 -80 R0
SYMATTR InstName M3
SYMATTR Value2 l=180nm w=810nm
FLAG 144 -128 Vin_a
FLAG 96 0 Vin_b
FLAG 448 400 gnd
FLAG 448 -208 vdd
FLAG 576 64 Vout
* Z:\home\khalils\Downloads\files\data\raw_asc\3be8249c8135_Amp03opFig.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
;.meas G param V(o)/V(i)
R1 N001 N002 {R1}
R2 N003 N002 {R1}
RL o 0 {RL}
V2 N003 0 {V2}
XU1 0 N002 Vpp Vnn o level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R3 N002 o {R2}
Vs2 0 Vnn {Vs}
V1 N001 0 {V1}
Vs1 Vpp 0 {Vs}
.param Vs=?? V1=?? V2=?? R1=?? R2=?? RL=??
.op
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE -64 80 -192 80
WIRE 80 80 16 80
WIRE 160 80 80 80
WIRE 320 80 240 80
WIRE -64 208 -112 208
WIRE 80 208 80 80
WIRE 80 208 16 208
WIRE 128 208 80 208
WIRE 480 208 480 192
WIRE 480 208 432 208
WIRE 320 224 320 80
WIRE 320 224 192 224
WIRE 432 224 432 208
WIRE 128 240 80 240
WIRE 480 240 480 208
WIRE 320 256 320 224
WIRE -192 272 -192 80
WIRE -112 272 -112 208
WIRE 80 304 80 240
WIRE -192 368 -192 352
WIRE -112 368 -112 352
WIRE 320 368 320 336
SYMBOL res -80 224 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value {R1}
SYMBOL voltage 480 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 44 42 Left 2
WINDOW 3 39 70 Left 2
SYMATTR InstName Vs1
SYMATTR Value {Vs}
SYMBOL voltage 480 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 45 30 Left 2
WINDOW 3 41 58 Left 2
SYMATTR InstName Vs2
SYMATTR Value {Vs}
SYMBOL res -80 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL voltage -192 256 R0
WINDOW 3 -98 74 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -86 45 Left 2
SYMATTR Value {V1}
SYMATTR InstName V1
SYMBOL voltage -112 256 R0
WINDOW 3 39 73 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 54 46 Left 2
SYMATTR Value {V2}
SYMATTR InstName V2
SYMBOL res 304 240 R0
WINDOW 0 49 38 Left 2
WINDOW 3 36 67 Left 2
SYMATTR InstName RL
SYMATTR Value {RL}
SYMBOL Opamps\\UniversalOpamp2 160 224 R0
SYMATTR InstName U1
SYMBOL res 144 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value {R2}
FLAG 480 112 Vpp
FLAG 432 224 0
FLAG 480 320 Vnn
FLAG 320 368 0
FLAG -112 368 0
FLAG 160 192 Vpp
FLAG 160 256 Vnn
FLAG -192 368 0
FLAG 320 224 o
FLAG 80 304 0
TEXT -264 424 Left 2 !.param Vs=?? V1=?? V2=?? R1=?? R2=?? RL=??
TEXT 216 368 Left 2 !.op
TEXT -280 -72 Left 2 !;.meas G param V(o)/V(i)
* Z:\home\khalils\Downloads\files\data\raw_asc\62bdc00b1dee_ideal_mult.asc
* Generated by LTspice 26.0.1 for Windows.
* input signals
* internally generated signals
* output signals
* Simulation of analog multiplier
* V1 and V2 represent input signals A and B
* B1 is the inverter for the signal A
* V2 is the internal triangle wave generator
* B2 represents the analog switch which is controlled by a comparator
* B3 generates a reference signal which is the real multiplication of A and B
* ----------------------------------------------
R1 N001 out 1k
V3 ref 0 PULSE(-1 1 0 0.5u 0.5u 0 1u)
B2 N001 0 V=if(V(B)>V(ref),V(A),V(Aneg))
V2 B 0 SINE(0 1 40k)
B1 Aneg 0 V=-V(A)
C1 out 0 1n
V1 A 0 SINE(0 1 41k)
B3 out_mult 0 V=V(A)*V(B)
.tran 0 10m 0 10n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1716 680
WIRE 592 32 416 32
WIRE 928 32 720 32
WIRE 1408 32 1120 32
WIRE 1520 32 1488 32
WIRE 1584 32 1520 32
WIRE 416 48 416 32
WIRE 720 48 720 32
WIRE 1120 48 1120 32
WIRE 1520 48 1520 32
WIRE 1520 128 1520 112
WIRE 592 176 416 176
WIRE 928 176 720 176
WIRE 1584 176 1120 176
WIRE 416 192 416 176
WIRE 720 192 720 176
WIRE 1120 192 1120 176
SYMBOL bv 1120 32 R0
SYMATTR InstName B2
SYMATTR Value V=if(V(B)>V(ref),V(A),V(Aneg))
SYMBOL voltage 720 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(-1 1 0 0.5u 0.5u 0 1u)
SYMBOL res 1392 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL bv 1120 176 R0
SYMATTR InstName B3
SYMATTR Value V=V(A)*V(B)
SYMBOL cap 1504 48 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL bv 720 32 R0
SYMATTR InstName B1
SYMATTR Value V=-V(A)
SYMBOL voltage 416 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 1 40k)
SYMBOL voltage 416 32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 1 41k)
FLAG 416 128 0
FLAG 416 272 0
FLAG 592 32 A
FLAG 592 176 B
FLAG 720 128 0
FLAG 720 272 0
FLAG 928 176 ref
FLAG 928 32 Aneg
FLAG 1120 128 0
FLAG 1120 272 0
FLAG 1584 32 out
FLAG 1584 176 out_mult
FLAG 1520 128 0
TEXT 424 -48 Left 2 ;input signals
TEXT 704 -48 Left 2 ;internally generated signals
TEXT 1256 -48 Left 2 ;output signals
TEXT 382 360 Left 2 !.tran 0 10m 0 10n
TEXT 384 -160 Left 3 ;Simulation of analog multiplier
TEXT 384 464 Left 2 ;V1 and V2 represent input signals A and B
TEXT 384 496 Left 2 ;B1 is the inverter for the signal A
TEXT 384 528 Left 2 ;V2 is the internal triangle wave generator
TEXT 384 560 Left 2 ;B2 represents the analog switch which is controlled by a comparator
TEXT 384 592 Left 2 ;B3 generates a reference signal which is the real multiplication of A and B
TEXT 384 -136 Left 3 ;----------------------------------------------
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3548A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3548A.asy)
R2 OUT1 N004 887K
R1 N004 0 442K
L2 N001 OUT2 4.7
XU1 N004 IN IN N002 0 IN N001 MP_01 IN N003 LTC3548A ;pnba FB1)Run/SS1)Vin)SW1)GND)Mode)SW2))Run/SS2)FB2
Rload2 OUT2 0 6.25
C4 OUT1 N004 22p
R5 N003 0 280K
R6 OUT2 N003 887K
C3 OUT2 N003 22p
V1 IN 0 3.6
L1 N002 OUT1 2.2
C2 OUT1 0 10
C1 OUT2 0 4.7
Rload1 OUT1 0 2.25
.tran .5m startup
.lib LTC3548A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1076 708
WIRE 176 32 32 32
WIRE 272 32 176 32
WIRE 352 32 272 32
WIRE 432 32 352 32
WIRE 32 48 32 32
WIRE 272 64 272 32
WIRE 352 64 352 32
WIRE 432 64 432 32
WIRE 176 128 176 32
WIRE 208 128 176 128
WIRE 32 144 32 128
WIRE -176 224 -320 224
WIRE -80 224 -176 224
WIRE 48 224 -80 224
WIRE 112 224 48 224
WIRE 208 224 192 224
WIRE 512 224 496 224
WIRE 608 224 592 224
WIRE 720 224 608 224
WIRE 816 224 720 224
WIRE 928 224 816 224
WIRE -320 240 -320 224
WIRE -176 240 -176 224
WIRE -80 240 -80 224
WIRE 48 240 48 224
WIRE 608 240 608 224
WIRE 720 240 720 224
WIRE 816 240 816 224
WIRE 928 240 928 224
WIRE -320 336 -320 320
WIRE -176 336 -176 304
WIRE -80 336 -80 304
WIRE 48 336 48 320
WIRE 48 336 -80 336
WIRE 208 336 48 336
WIRE 608 336 608 320
WIRE 608 336 496 336
WIRE 720 336 720 304
WIRE 720 336 608 336
WIRE 816 336 816 304
WIRE 928 336 928 320
WIRE 48 352 48 336
WIRE 608 352 608 336
WIRE 352 400 352 384
WIRE 48 448 48 432
WIRE 608 448 608 432
SYMBOL res 912 224 R0
SYMATTR InstName Rload1
SYMATTR Value 2.25
SYMBOL res 592 224 R0
SYMATTR InstName R2
SYMATTR Value 887K
SYMBOL res -336 224 R0
SYMATTR InstName Rload2
SYMATTR Value 6.25
SYMBOL cap 704 240 R0
SYMATTR InstName C4
SYMATTR Value 22p
SYMBOL res 32 224 R0
SYMATTR InstName R6
SYMATTR Value 887K
SYMBOL PowerProducts\\LTC3548A 352 224 R0
SYMATTR InstName U1
SYMBOL res 32 336 R0
SYMATTR InstName R5
SYMATTR Value 280K
SYMBOL cap -192 240 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL ind 496 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL VOLTAGE 32 32 R0
WINDOW 3 25 98 Left 2
SYMATTR Value 3.6
SYMATTR InstName V1
SYMBOL cap -96 240 R0
SYMATTR InstName C3
SYMATTR Value 22p
SYMBOL ind 208 240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 4.7
SYMBOL cap 800 240 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res 592 336 R0
SYMATTR InstName R1
SYMATTR Value 442K
FLAG 32 144 0
FLAG 352 400 0
FLAG 816 336 0
FLAG 928 336 0
FLAG 32 32 IN
FLAG 928 224 OUT1
FLAG 608 448 0
FLAG -176 336 0
FLAG -320 336 0
FLAG -320 224 OUT2
FLAG 48 448 0
TEXT 248 480 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1169675232a1_WaveOut.asc
* Generated by LTspice 26.0.1 for Windows.
V2 A 0 SINE(0 .4 20 10m)
V3 B 0 SIN(0 1 455)
B1 SYN 0 V=2.5*V(a)*V(b)*V(c)
V4 C 0 PWL( Repeat for 2 Repeat for 2 0 0 10m 0 11m 1 440m 1 480m 0 700m 0 endrepeat 2.5 0 endrepeat)
.tran 3.7
.wave .\ring.wav 8 11025 V(syn) ; This means save node V(syn) as a .wav file, 8 bit resolution, 11025 samples per second
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2868 848
WIRE 1008 560 1008 512
WIRE 1360 560 1360 512
WIRE 1664 560 1664 512
WIRE 2144 560 2144 512
WIRE 1008 688 1008 640
WIRE 1360 688 1360 640
WIRE 1664 688 1664 640
WIRE 2144 688 2144 640
SYMBOL voltage 1664 544 R0
WINDOW 3 42 55 Left 0
WINDOW 40 43 145 Left 0
WINDOW 39 38 117 Left 0
WINDOW 123 42 87 Left 0
SYMATTR Value PWL( Repeat for 2 Repeat for 2
SYMATTR SpiceLine2 2.5 0 endrepeat)
SYMATTR SpiceLine 480m 0 700m 0 endrepeat
SYMATTR Value2 0 0 10m 0 11m 1 440m 1
SYMATTR InstName V4
SYMBOL VOLTAGE 1008 544 R0
WINDOW 39 0 0 Left 0
WINDOW 123 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 .4 20 10m)
SYMBOL BV 2144 544 R0
SYMATTR InstName B1
SYMATTR Value V=2.5*V(a)*V(b)*V(c)
SYMBOL voltage 1360 544 R0
SYMATTR InstName V3
SYMATTR Value SIN(0 1 455)
FLAG 1008 688 0
FLAG 1360 688 0
FLAG 1008 512 A
FLAG 1360 512 B
FLAG 2144 688 0
FLAG 1664 688 0
FLAG 1664 512 C
FLAG 2144 512 SYN
TEXT 992 744 Left 0 !.tran 3.7
TEXT 960 784 Left 0 !.wave .\\ring.wav 8 11025 V(syn) ; This means save node V(syn) as a .wav file, 8 bit resolution, 11025 samples per second