Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17553C.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17553C.asy)
R1 vIN N002 3.32Meg
R6 N005 0 49.9k
R5 vOUT N005 698k
Rload vOUT 0 240
R7 N006 0 118k
R3 N002 N004 953k
R4 vOUT N003 100k
V1 vIN 0 24
XU1 0 vIN N002 N004 N005 N001 N003 N006 MAX17553C ;pnba GND)IN)EN/UV)HYST)FB/VO)LX)_RESET)RT
L1 N001 vOUT 220 Rser=3.7
C2 vOUT 0 4.7
R2 N002 0 287k
.tran 4m startup
.lib MAX17553C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 992 680
WIRE -176 -32 -192 -32
WIRE 48 -32 -176 -32
WIRE 176 -32 48 -32
WIRE 512 -32 464 -32
WIRE 624 -32 592 -32
WIRE 704 -32 624 -32
WIRE 768 -32 704 -32
WIRE 864 -32 768 -32
WIRE 896 -32 864 -32
WIRE 48 -16 48 -32
WIRE 624 -16 624 -32
WIRE 768 -16 768 -32
WIRE 896 -16 896 -32
WIRE -192 16 -192 -32
WIRE 624 64 624 48
WIRE 896 80 896 64
WIRE 48 96 48 64
WIRE 48 96 -64 96
WIRE 176 96 48 96
WIRE -64 112 -64 96
WIRE 48 112 48 96
WIRE -192 128 -192 96
WIRE 512 128 464 128
WIRE 704 128 704 -32
WIRE 704 128 592 128
WIRE -64 224 -64 192
WIRE 48 224 48 192
WIRE 176 224 48 224
WIRE 768 224 768 64
WIRE 768 224 464 224
WIRE 768 256 768 224
WIRE 176 320 48 320
WIRE 48 336 48 320
WIRE 768 352 768 336
WIRE 320 384 320 368
WIRE 48 432 48 416
SYMBOL res 752 -32 R0
SYMATTR InstName R5
SYMATTR Value 698k
SYMBOL res 32 320 R0
SYMATTR InstName R7
SYMATTR Value 118k
SYMBOL res 752 240 R0
SYMATTR InstName R6
SYMATTR Value 49.9k
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 3.32Meg
SYMBOL res 880 -32 R0
SYMATTR InstName Rload
SYMATTR Value 240
SYMBOL ind 496 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 220
SYMATTR SpiceLine Rser=3.7
SYMBOL res -80 96 R0
SYMATTR InstName R2
SYMATTR Value 287k
SYMBOL cap 608 -16 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL res 608 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL MAX17553C 320 144 R0
SYMATTR InstName U1
SYMBOL voltage -192 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 32 96 R0
SYMATTR InstName R3
SYMATTR Value 953k
FLAG -192 128 0
FLAG 320 384 0
FLAG 624 64 0
FLAG 896 80 0
FLAG 768 352 0
FLAG -176 -32 vIN
FLAG 864 -32 vOUT
FLAG -64 224 0
FLAG 48 432 0
TEXT 480 392 Left 2 !.tran 4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\00741a3362c5_AmpSimp.asc
* Generated by LTspice 26.0.1 for Windows.
Rin nP nN 1G
GAmp 0 nAmp nP nN {Trans}
R nAmp 0 {REq}
C nAmp 0 {CEq}
EOut N001 0 Value={Limit(V(nAmp),{VHigh},{VLow})}
R1 nOut N001 {RsOut}
.Param Gain=30000 Pole=30
.Param VHigh=4V VLow=-4V
.Param Trans=100u RsOut=10
.Param REq=Gain/Trans CEq=1/(2*pi*REq*Pole)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 680
WIRE 0 64 -64 64
WIRE 96 64 0 64
WIRE 272 96 144 96
WIRE 416 96 272 96
WIRE 624 96 544 96
WIRE 768 96 704 96
WIRE 0 128 0 64
WIRE 144 128 144 96
WIRE 272 128 272 96
WIRE 544 128 544 96
WIRE 96 144 96 64
WIRE 416 144 416 96
WIRE 144 240 144 208
WIRE 272 240 272 208
WIRE 272 240 144 240
WIRE 416 240 416 208
WIRE 416 240 272 240
WIRE 544 240 544 208
WIRE 544 240 416 240
WIRE 0 272 0 208
WIRE 0 272 -64 272
WIRE 96 272 96 192
WIRE 96 272 0 272
WIRE 272 272 272 240
FLAG -64 64 nP
IOPIN -64 64 In
FLAG -64 272 nN
IOPIN -64 272 In
FLAG 272 272 0
FLAG 272 96 nAmp
FLAG 768 96 nOut
IOPIN 768 96 Out
SYMBOL res -16 112 R0
SYMATTR InstName Rin
SYMATTR Value 1G
SYMBOL g 144 112 R0
SYMATTR InstName GAmp
SYMATTR Value {Trans}
SYMBOL res 256 112 R0
SYMATTR InstName R
SYMATTR Value {REq}
SYMBOL cap 400 144 R0
SYMATTR InstName C
SYMATTR Value {CEq}
SYMBOL Misc\\Epoly 544 112 R0
WINDOW 0 32 96 Left 2
WINDOW 3 -208 160 Left 2
SYMATTR InstName EOut
SYMATTR Value Value={Limit(V(nAmp),{VHigh},{VLow})}
SYMBOL res 720 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {RsOut}
TEXT -32 -80 Left 2 !.Param Gain=30000 Pole=30\n.Param VHigh=4V VLow=-4V\n.Param Trans=100u RsOut=10\n.Param REq=Gain/Trans CEq=1/(2*pi*REq*Pole)
* Z:\home\khalils\Downloads\files\data\raw_asc\039696574f86_MOSFET_2N7002_Fonte_Corrente_LED.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 0 2N7002
VDD VDD 0 0
VGS N002 0 2
D1 VDD N001 QTLP690C
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VDD 5 40 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 32 176 32
WIRE 368 32 320 32
WIRE 400 32 368 32
WIRE 176 64 176 32
WIRE 400 64 400 32
WIRE 128 144 64 144
WIRE 400 160 400 144
WIRE 176 176 176 160
WIRE 64 208 64 144
WIRE 64 304 64 288
FLAG 64 304 0
FLAG 176 176 0
FLAG 400 160 0
FLAG 368 32 VDD
SYMBOL nmos 128 64 R0
SYMATTR InstName M1
SYMATTR Value 2N7002
SYMBOL voltage 400 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 0
SYMBOL voltage 64 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 2
SYMBOL LED 320 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 72 32 VTop 2
SYMATTR InstName D1
SYMATTR Value QTLP690C
TEXT 8 352 Left 2 !.dc VDD 5 40 1
* Z:\home\khalils\Downloads\files\data\raw_asc\AD3542R.asc
* Generated by LTspice 26.0.1 for Windows.
* .noise V(Vout) V5 dec 10 0.1 1g
* VDAC input should be within the range 0 to 2.5V\nRANGE_SEL should be an integer within 0 to 4
* Range RFB RANGE_SEL \n0 to 2.5V 1x 0 \n0 to 5V 1x 1\n0 to 10V 2x 2\n-5 to 5V 2x 3\n-2.5 to 7.5V 2x 4
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD3542R.asy)
V4 vDAC 0 SINE(1.25 1.25 1MEG)
V6 NC_02 0 PWL(0 0 2u 0 +1n 2.5)
V3 N004 0 -5
V5 NC_01 0 2.5
R1 Vout 0 1k noiseless
V2 N001 0 5
C1 Vout N003 10p
V1 N002 0 5
XU2 Vout NC_03 Vout Vout vDAC N001 0 N002 N004 N003 AD3542R RANGE_SEL=0 ;pnba RFBx4)RFBx2)RFBx1)Vout)VDAC)AVDD)AGND)PVDD)PVSS)CAP
.tran 0 5u 0 1n
.lib AD3542R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 728
WIRE 224 -96 -240 -96
WIRE 128 -48 -64 -48
WIRE -240 -32 -240 -96
WIRE -64 -32 -64 -48
WIRE 128 0 128 -48
WIRE 224 0 224 -96
WIRE 640 48 352 48
WIRE -240 64 -240 48
WIRE -64 64 -64 48
WIRE 640 144 640 48
WIRE 640 144 416 144
WIRE -16 176 -704 176
WIRE 64 176 -16 176
WIRE 592 176 432 176
WIRE 640 176 640 144
WIRE 640 176 592 176
WIRE -704 224 -704 176
WIRE 480 256 384 256
WIRE 640 256 640 176
WIRE 640 256 544 256
WIRE -704 336 -704 304
WIRE -384 336 -384 304
WIRE -240 336 -240 304
WIRE 640 336 640 256
WIRE 128 400 128 352
WIRE 640 464 640 416
WIRE 224 480 224 352
WIRE 224 480 128 480
WIRE 128 512 128 480
SYMBOL voltage -240 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 128 384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL cap 544 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage -64 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL AD3542R 224 176 R0
SYMATTR InstName U2
SYMATTR Value AD3542R
SYMBOL voltage -384 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 2.5
SYMBOL voltage -704 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value SINE(1.25 1.25 1MEG)
SYMBOL voltage -240 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value PWL(0 0 2u 0 +1n 2.5)
SYMBOL res 624 320 R0
SYMATTR InstName R1
SYMATTR Value 1k noiseless
FLAG -64 64 0
FLAG -240 64 0
FLAG 128 512 0
FLAG 640 464 0
FLAG -704 336 0
FLAG -384 336 0
FLAG 592 176 Vout
FLAG -240 336 0
FLAG -16 176 vDAC
TEXT -272 536 Left 2 !.tran 0 5u 0 1n
TEXT -272 592 Left 2 ;.noise V(Vout) V5 dec 10 0.1 1g
TEXT -840 432 Left 2 ;VDAC input should be within the range 0 to 2.5V\nRANGE_SEL should be an integer within 0 to 4
TEXT -840 -104 Left 2 ;Range              RFB            RANGE_SEL \n0 to 2.5V            1x                       0           \n0 to 5V               1x                       1\n0 to 10V             2x                       2\n-5 to 5V              2x                       3\n-2.5 to 7.5V        2x                       4
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP160-2.75.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP160-2.75.asy)
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
C1 OUT 0 1
V1 IN 0 5
XU1 IN 0 N001 OUT ADP16xfd K=363.6u ;pnba Vin)GND)En)Vout
Rload OUT 0 275
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 416 96 352 96
WIRE 512 96 416 96
WIRE -64 112 -64 96
WIRE 416 112 416 96
WIRE 512 112 512 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 416 208 416 176
WIRE 512 208 512 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL ADP160-2.75 256 208 R0
SYMATTR InstName U1
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 275
FLAG -64 208 0
FLAG 256 272 0
FLAG 416 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1634-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1634-5.asy)
V1 N001 0 10
R1 N001 N002 500K
XU1 N002 0 LT1634-5 ;pnba VCC)VEE
.dc temp -40 80 .1
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 144 48 144
WIRE 272 144 208 144
WIRE 48 160 48 144
WIRE 272 176 272 144
WIRE 48 256 48 240
WIRE 272 256 272 240
SYMBOL res 112 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 500K
SYMBOL References\\LT1634-5 272 208 R0
SYMATTR InstName U1
SYMBOL voltage 48 144 R0
SYMATTR InstName V1
SYMATTR Value 10
FLAG 272 256 0
FLAG 48 256 0
TEXT 72 312 Left 2 !.dc temp -40 80 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1763-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1763-3.3.asy)
C2 OUT N001 .01
V1 IN 0 PWL(0 0 1 10)
XU1 OUT OUT 0 N001 IN MP_01 MP_02 IN LT1763-3.3 ;pnba OUT)Sense)GND)BYP)_SHDN)))IN
Rload OUT 0 500
C1 OUT 0 10
.tran 1
.lib LT1763.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 32 304 32
WIRE 352 32 320 32
WIRE 432 32 352 32
WIRE 528 32 432 32
WIRE 0 48 -208 48
WIRE 16 48 0 48
WIRE 432 48 432 32
WIRE 528 48 528 32
WIRE -208 64 -208 48
WIRE 352 64 352 32
WIRE 320 96 320 32
WIRE 320 96 304 96
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 432 144 432 112
WIRE 528 144 528 128
WIRE -208 160 -208 144
WIRE 352 160 352 128
WIRE 352 160 304 160
WIRE 160 240 160 208
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 416 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LT1763-3.3 160 96 R0
SYMATTR InstName U1
SYMBOL cap 336 64 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 500
FLAG -208 160 0
FLAG 432 144 0
FLAG 528 144 0
FLAG 160 240 0
FLAG 528 32 OUT
FLAG -208 48 IN
TEXT 336 240 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1461-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1461-3.asy)
I1 N002 0 PULSE(0 10m 1.5m 10n 10n 2m 200m)
XU1 0 N001 N001 N002 LT1461-3 ;pnba GND)IN)_SHDN)OUT
V1 N001 0 5.5
C1 N002 0 2
.tran 7m
.lib LT1461.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1376 680
WIRE 112 112 0 112
WIRE 144 112 112 112
WIRE 512 112 432 112
WIRE 672 112 512 112
WIRE 0 128 0 112
WIRE 512 128 512 112
WIRE 672 128 672 112
WIRE 112 176 112 112
WIRE 144 176 112 176
WIRE 0 224 0 208
WIRE 512 224 512 192
WIRE 672 224 672 208
WIRE 288 240 288 208
SYMBOL current 672 128 R0
WINDOW 123 24 122 Left 2
WINDOW 39 24 101 Left 2
SYMATTR Value PULSE(0 10m 1.5m 10n 10n 2m 200m)
SYMATTR InstName I1
SYMBOL LT1461-3 288 144 R0
SYMATTR InstName U1
SYMBOL voltage 0 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL cap 496 128 R0
WINDOW 123 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 2
FLAG 0 224 0
FLAG 288 240 0
FLAG 672 224 0
FLAG 512 224 0
TEXT 784 272 Left 2 !.tran 7m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1764A-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1764A-1.8.asy)
XU1 IN IN 0 OUT OUT LT1764-1.8 ;pnba _SHDN)IN)GND)OUT)Sense
C1 OUT 0 10 Rser=.1
V1 IN 0 PWL(0 0 1 10)
Rload OUT 0 500
.tran 1
.lib LT1764.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -224 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 512 48 384 48
WIRE -224 64 -224 48
WIRE 384 64 384 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -224 160 -224 144
WIRE 384 160 384 128
WIRE 512 160 512 144
WIRE 160 240 160 208
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL cap 368 64 R0
WINDOW 39 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=.1
SYMBOL PowerProducts\\LT1764A-1.8 160 96 R0
SYMATTR InstName U1
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -224 160 0
FLAG 384 160 0
FLAG 512 160 0
FLAG 160 240 0
FLAG -224 48 IN
FLAG 512 48 OUT
TEXT 360 248 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\0136a5aadc83_Prob_2a.asc
* Generated by LTspice 26.0.1 for Windows.
* F=1kHz
* Long
V1 N001 N002 SINE(0 0.159m 1k)
M1 0 N001 0 0 nch_tt w=6u l=10u
V2 N002 0 {X}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.step param X -1.8 1.8 0.2
.tran 10m
.meas TRAN Capacitance MAX Ig(M1) FROM 2m TO 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 680
WIRE 384 32 272 32
WIRE 272 64 272 32
WIRE 224 112 96 112
WIRE 96 128 96 112
WIRE 224 144 224 112
WIRE 96 224 96 208
WIRE 272 224 272 160
WIRE 272 224 224 224
WIRE 384 224 384 32
WIRE 384 224 272 224
WIRE 272 240 272 224
WIRE 96 320 96 304
WIRE 224 320 224 224
WIRE 224 320 96 320
SYMBOL nmos 224 64 R0
SYMATTR InstName M1
SYMATTR Value nch_tt
SYMATTR Value2 w=6u l=10u
SYMBOL voltage 96 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value {X}
SYMBOL voltage 96 112 R0
WINDOW 3 -136 -65 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 0.159m 1k)
SYMATTR InstName V1
FLAG 272 240 0
TEXT 320 272 Left 2 !.include TSMC180.lib
TEXT 64 80 Left 2 ;F=1kHz
TEXT 208 56 Left 2 ;Long
TEXT 320 304 Left 2 !.step param X -1.8 1.8 0.2
TEXT 320 240 Left 2 !.tran 10m
TEXT 0 352 Left 2 !.meas TRAN Capacitance MAX Ig(M1) FROM 2m TO 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX34406W.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX34406W.asy)
XU1 IN+ IN- VDD 0 OUT OC ENA SHTDN CDLY MAX34406W ;pnba IN+)IN-)VDD)GND)OUT)OC)ENA)SHTDN)CDLY
Ccdly CDLY 0 10n
Rsense IN+ IN- 5m
Vcm IN+ 0 12
VDD VDD 0 5
Rpu1 VDD OC 10k
VENA ENA 0 PWL(0 5 9m 5 +1n 0 +250u 0 +1n 5)
Iload IN- 0 PWL(0 1 1m 1 +1n 2.5 8m 2.5 +1n 1)
R1 OUT 0 1Meg
C1 OUT 0 100p
Rpu2 VDD SHTDN 10k
.tran 10m
.lib MAX34406W.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 -64 112 -64
WIRE 240 -64 208 -64
WIRE 416 -64 240 -64
WIRE 528 -64 416 -64
WIRE 112 -48 112 -64
WIRE 416 -32 416 -64
WIRE 528 -32 528 -64
WIRE 240 0 240 -64
WIRE 240 32 240 0
WIRE -336 64 -448 64
WIRE 112 64 -336 64
WIRE 144 64 112 64
WIRE -336 80 -336 64
WIRE 368 80 336 80
WIRE 416 80 416 48
WIRE 416 80 368 80
WIRE 384 128 336 128
WIRE 528 128 528 48
WIRE 528 128 384 128
WIRE -336 176 -336 160
WIRE 112 176 -336 176
WIRE 144 176 112 176
WIRE 368 176 336 176
WIRE 528 176 368 176
WIRE 640 176 528 176
WIRE -448 208 -448 64
WIRE -336 208 -336 176
WIRE 528 208 528 176
WIRE 112 224 -48 224
WIRE 144 224 112 224
WIRE 640 224 640 176
WIRE 112 272 64 272
WIRE 144 272 112 272
WIRE 528 304 528 288
WIRE 640 304 640 288
WIRE 240 320 240 304
WIRE -448 352 -448 288
WIRE -336 352 -336 288
WIRE -336 352 -448 352
WIRE 64 352 64 272
WIRE -448 368 -448 352
WIRE -48 368 -48 224
WIRE -48 448 -48 432
WIRE 64 448 64 432
SYMBOL voltage 224 -64 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL current -336 208 R0
WINDOW 123 24 106 Left 2
SYMATTR Value2 8m 2.5 +1n 1)
SYMATTR InstName Iload
SYMATTR Value PWL(0 1 1m 1 +1n 2.5
SYMBOL res 512 -48 R0
SYMATTR InstName Rpu2
SYMATTR Value 10k
SYMBOL cap 624 224 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL res 400 -48 R0
SYMATTR InstName Rpu1
SYMATTR Value 10k
SYMBOL voltage -448 192 R0
SYMATTR InstName Vcm
SYMATTR Value 12
SYMBOL voltage 64 336 R0
SYMATTR InstName VENA
SYMATTR Value PWL(0 5 9m 5 +1n 0 +250u 0 +1n 5)
SYMBOL MAX34406W 240 176 R0
WINDOW 0 78 -152 Bottom 2
WINDOW 3 107 136 Top 2
SYMATTR InstName U1
SYMBOL res 512 192 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL res -352 64 R0
SYMATTR InstName Rsense
SYMATTR Value 5m
SYMBOL cap -64 368 R0
SYMATTR InstName Ccdly
SYMATTR Value 10n
FLAG 240 320 0
FLAG -48 448 0
FLAG 528 304 0
FLAG 640 304 0
FLAG 368 176 OUT
FLAG 384 128 SHTDN
FLAG 368 80 OC
FLAG 112 -48 0
FLAG 240 0 VDD
FLAG -448 368 0
FLAG 112 224 CDLY
FLAG 64 448 0
FLAG 112 64 IN+
FLAG 112 176 IN-
FLAG 112 272 ENA
TEXT -496 472 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\0854beaca7a7_R__L.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N002 0 70m
V N001 0 SINE(0 3 2K)
R1 N002 N001 5k
.tran 0 0.01 0 0.00001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 16 16 16
WIRE 432 16 224 16
WIRE 16 128 16 16
WIRE 432 176 432 16
WIRE 16 304 16 208
WIRE 432 304 432 256
WIRE 432 304 16 304
WIRE 16 336 16 304
SYMBOL ind 416 160 R0
SYMATTR InstName L1
SYMATTR Value 70m
SYMBOL res 240 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5k
SYMBOL Misc\\signal 16 112 R0
SYMATTR InstName V
SYMATTR Value SINE(0 3 2K)
FLAG 16 336 0
TEXT 80 408 Left 2 !.tran 0 0.01 0 0.00001
* Z:\home\khalils\Downloads\files\data\raw_asc\29edfe9b8993_Schem_tracker.asc
* Generated by LTspice 26.0.1 for Windows.
* MSP430
* Tracker
* Proteccion/carga
D1 V_EXT N002 1N4007
D2 N002 N003 1N4007
D3 N003 N004 1N4007
R2 DETECT_BASE 0 20k
C1 N001 GND_INT C
D4 N004 DETECT_BASE 1N4007
V1 N001 GND_INT BAT
R1 N001 Vcc 100
R3 RX 0 20k
D6 N001 Vcc 1N5819
D7 GND_INT N005 1N4007
D5 N002 Vcc 1N4007
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 432 -208 368 -208
WIRE 592 -208 512 -208
WIRE -32 -96 -112 -96
WIRE 96 -96 32 -96
WIRE 208 -96 96 -96
WIRE 368 -96 368 -208
WIRE 368 -96 272 -96
WIRE 448 -96 368 -96
WIRE 592 -96 592 -208
WIRE 592 -96 512 -96
WIRE 688 -96 592 -96
WIRE 784 -96 688 -96
WIRE 96 -64 96 -96
WIRE 688 -64 688 -96
WIRE 784 -48 784 -96
WIRE 96 32 96 0
WIRE 688 64 688 16
WIRE 784 64 784 16
WIRE 784 64 688 64
WIRE 96 128 96 96
WIRE 368 160 368 -96
WIRE 384 160 368 160
WIRE 96 224 96 192
WIRE 320 224 96 224
WIRE -192 288 -240 288
WIRE -112 288 -112 -96
WIRE -112 288 -192 288
WIRE -176 336 -240 336
WIRE -64 336 -176 336
WIRE 320 336 -64 336
WIRE -176 384 -240 384
WIRE -64 384 -176 384
WIRE 320 384 -64 384
WIRE -112 432 -240 432
WIRE -112 496 -112 432
WIRE -32 496 -112 496
WIRE 224 496 32 496
WIRE 320 496 224 496
WIRE 224 560 224 496
WIRE 784 560 784 64
WIRE 784 560 224 560
RECTANGLE Normal 688 528 240 128 2
RECTANGLE Normal 848 -272 -240 624 2
RECTANGLE Normal 608 -256 352 -32 2
SYMBOL res 304 208 R0
SYMATTR InstName R2
SYMATTR Value 20k
SYMBOL diode 80 -64 R0
SYMATTR InstName D2
SYMATTR Value 1N4007
SYMBOL diode 32 480 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D7
SYMATTR Value 1N4007
SYMBOL diode 80 32 R0
SYMATTR InstName D3
SYMATTR Value 1N4007
SYMBOL cap 768 -48 R0
SYMATTR InstName C1
SYMBOL diode 208 -80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D5
SYMATTR Value 1N4007
SYMBOL res 528 -224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 304 368 R0
SYMATTR InstName R3
SYMATTR Value 20k
SYMBOL schottky 512 -112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D6
SYMATTR Value 1N5819
SYMBOL diode -32 -80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4007
SYMBOL voltage 688 -80 R0
SYMATTR InstName V1
SYMATTR Value BAT
SYMBOL diode 80 128 R0
SYMATTR InstName D4
SYMATTR Value 1N4007
FLAG 320 224 DETECT_BASE
FLAG 320 304 0
FLAG 384 160 Vcc
FLAG 320 336 SENSE1_3V3
FLAG 320 464 0
FLAG 320 496 GND_INT
FLAG 320 384 SENSE_2
FLAG -192 288 V_EXT
FLAG -176 336 SENSE_1
FLAG -176 384 SENSE_2
FLAG -64 336 TX
FLAG -64 384 RX
TEXT 256 152 Left 2 ;MSP430
TEXT -216 -248 Left 2 ;Tracker
TEXT 400 -48 Left 2 ;Proteccion/carga
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP122-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP122-2.8.asy)
XU1 OUT MP_01 0 IN MP_02 IN ADP122 K=1/5600 ;pnba Vout))GND)En))Vin
C1 IN 0 1
V1 IN 0 5.5
Rload OUT 0 100
C2 OUT 0 1
.tran 10m startup
.lib ADP122.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL ADP122-2.8 256 208 R0
SYMATTR InstName U1
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup