Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\13e90dd22b98_nor-tr-bi_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
D3 0 N007 D
R2 N013 0 10
V3 N007 N006 PULSE(0 4 3n 0 0 2n 6n)
Q2 N010 N009 N012 0 NPN
V1 N001 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1048 744
WIRE 880 -320 768 -320
WIRE 768 -240 768 -320
WIRE 880 -240 880 -320
WIRE 768 -160 432 -160
WIRE 768 -64 768 -80
WIRE 704 -16 560 -16
WIRE 368 48 -64 48
WIRE 768 64 768 32
WIRE -448 128 -592 128
WIRE -304 128 -368 128
WIRE 560 128 560 -16
WIRE -128 160 -128 0
WIRE 16 160 16 0
WIRE 496 176 240 176
WIRE -304 224 -304 128
WIRE -208 224 -304 224
WIRE -176 224 -208 224
WIRE -64 224 -64 48
WIRE -64 224 -80 224
WIRE -448 256 -496 256
WIRE -64 256 -368 256
WIRE -32 256 -32 224
WIRE -32 256 -64 256
WIRE 64 272 64 224
WIRE 240 272 240 176
WIRE 240 272 64 272
WIRE 432 272 432 96
WIRE 560 272 560 224
WIRE 560 272 432 272
WIRE 704 272 560 272
WIRE 432 304 432 272
WIRE -208 320 -208 224
WIRE -64 320 -64 256
WIRE -496 432 -496 256
WIRE -208 432 -208 384
WIRE -64 432 -64 384
WIRE 432 432 432 384
SYMBOL diode -192 384 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMBOL res 416 288 R0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL voltage -352 128 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 4 3n 0 0 2n 6n)
SYMBOL npn 64 160 R90
SYMATTR InstName Q2
SYMBOL voltage 768 -144 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 880 -240 0
FLAG 432 432 0
FLAG -64 432 0
FLAG -208 432 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3526B-2.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 N002 2.2 Rpar=5K
V1 N001 0 2
R1 OUT N003 1.78Meg
R2 N003 0 1Meg
C1 OUT 0 4.7 Rser=1m
Rload OUT 0 250
XU1 N002 0 N001 N001 N003 OUT LTC3526B-2 ;pnba SW)GND)Vin)_SHDN)FB)Vout
.tran 350u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3526B-2.asy)
.lib LTC3526B-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 80 -144 80
WIRE 0 80 -48 80
WIRE 128 80 80 80
WIRE -144 96 -144 80
WIRE 128 128 128 80
WIRE -144 192 -144 176
WIRE -48 192 -48 80
WIRE -16 192 -48 192
WIRE 320 192 272 192
WIRE 464 192 320 192
WIRE 576 192 464 192
WIRE 320 208 320 192
WIRE 464 208 464 192
WIRE 576 208 576 192
WIRE 464 304 464 272
WIRE 576 304 576 288
WIRE -48 320 -48 192
WIRE -16 320 -48 320
WIRE 320 320 320 288
WIRE 320 320 272 320
WIRE 320 336 320 320
WIRE 128 416 128 384
WIRE 320 432 320 416
FLAG -144 192 0
FLAG 128 416 0
FLAG 320 432 0
FLAG 464 304 0
FLAG 576 304 0
FLAG 576 192 OUT
SYMBOL ind -16 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rpar=5K
SYMBOL voltage -144 80 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL res 304 192 R0
SYMATTR InstName R1
SYMATTR Value 1.78Meg
SYMBOL res 304 320 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL cap 448 208 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1m
SYMBOL res 560 192 R0
SYMATTR InstName Rload
SYMATTR Value 250
SYMBOL PowerProducts\\LTC3526B-2 128 256 R0
SYMATTR InstName U1
TEXT 448 376 Left 2 !.tran 350u startup
* Z:\tmp\asc_dec_bjh7r6w2\03c63378239d_adder1_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
AX5 N003 0 P1 0 N006 0 0 0 XOR
AX1 0 0 0 0 0 VDD 0 0 AND
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -80 160 -112
WIRE 160 -80 112 -80
WIRE 192 -80 160 -80
WIRE 320 -80 192 -80
WIRE 112 -32 112 -80
WIRE 80 -16 32 -16
WIRE 256 0 176 0
WIRE 80 16 16 16
WIRE 192 64 192 -80
WIRE 192 64 112 64
WIRE 256 80 256 0
WIRE 288 80 256 80
WIRE 112 96 112 64
WIRE 16 112 16 16
WIRE 80 112 16 112
WIRE 288 112 240 112
WIRE 240 128 240 112
WIRE 240 128 176 128
WIRE 80 144 48 144
WIRE 288 144 256 144
WIRE 192 192 192 64
WIRE 192 192 112 192
WIRE 112 208 112 192
WIRE 32 224 32 -16
WIRE 80 224 32 224
WIRE 256 240 256 144
WIRE 256 240 176 240
WIRE 48 256 48 144
WIRE 80 256 48 256
WIRE 16 272 16 112
WIRE 16 272 -32 272
WIRE 192 320 192 192
WIRE 192 320 176 320
WIRE 384 320 192 320
WIRE 16 368 16 272
WIRE 96 368 16 368
WIRE 176 368 176 320
WIRE 32 400 32 224
WIRE 32 400 -64 400
WIRE 96 400 96 368
WIRE 112 400 96 400
WIRE 32 416 32 400
WIRE 96 416 32 416
WIRE 272 432 256 432
WIRE 48 464 48 256
WIRE 48 464 -64 464
WIRE 96 464 96 416
WIRE 112 464 96 464
WIRE 272 464 272 432
WIRE 304 464 272 464
WIRE 48 592 48 464
WIRE 320 592 48 592
SYMBOL xor 96 400 R0
SYMATTR InstName X5
SYMBOL and 80 0 R0
SYMATTR InstName X1
FLAG -64 464 P1
FLAG -32 272 A
FLAG 160 -112 VDD
FLAG -64 400 B
* Z:\home\khalils\Downloads\files\data\raw_asc\2e982158bcab_inverting__ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
V1 VIN 0 SINE(0 2 1k)
V2 VCC 0 15V
R2 Vout N001 2k
V3 0 VEE 15V
R1 N001 VIN 1k
XU1 0 N001 VCC VEE Vout LT1001 ;pnba In+)In-)V+)V-)OUT
.tran 3ms
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 0 144 0
WIRE 352 0 272 0
WIRE 496 16 496 -16
WIRE 496 64 496 16
WIRE 224 112 224 96
WIRE 224 128 224 112
WIRE 144 144 144 0
WIRE 144 144 96 144
WIRE 192 144 144 144
WIRE 352 160 352 0
WIRE 352 160 256 160
WIRE 400 160 352 160
WIRE 416 160 400 160
WIRE 192 176 160 176
WIRE 496 176 496 144
WIRE 672 176 496 176
WIRE 16 192 16 144
WIRE 672 192 672 176
WIRE 16 208 16 192
WIRE 224 208 224 192
WIRE 496 208 496 176
WIRE 224 224 224 208
WIRE 160 240 160 176
WIRE 16 304 16 288
WIRE 496 304 496 288
WIRE 496 320 496 304
SYMBOL OpAmps\\OP07 224 96 R0
SYMATTR InstName U1
SYMBOL voltage 16 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 2 1k)
SYMBOL res 288 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 2k
SYMBOL voltage 496 48 R0
SYMATTR InstName V2
SYMATTR Value 15V
SYMBOL voltage 496 192 R0
SYMATTR InstName V3
SYMATTR Value 15V
SYMBOL res 112 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 16 304 0
FLAG 160 240 0
FLAG 16 192 VIN
FLAG 400 160 Vout
FLAG 224 208 VEE
FLAG 496 304 VEE
FLAG 672 192 0
FLAG 224 112 VCC
FLAG 496 16 VCC
TEXT -24 376 Left 2 !.tran 3ms
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1021-7.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 IN 0 OUT LT1021-7 ;pnba IN)GND)OUT
V1 IN 0 12
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1021-7.asy)
.lib LT1021-7.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1164 1128
WIRE -272 576 -384 576
WIRE -16 576 -48 576
WIRE -384 592 -384 576
WIRE -384 688 -384 672
WIRE -160 688 -160 656
FLAG -384 688 0
FLAG -160 688 0
FLAG -16 576 OUT
FLAG -384 576 IN
SYMBOL LT1021-7 -160 576 R0
SYMATTR InstName U1
SYMBOL voltage -384 576 R0
SYMATTR InstName V1
SYMATTR Value 12
TEXT -64 736 Left 2 !.tran 1m startup
* Z:\tmp\asc_dec_bjh7r6w2\0fcdd72dd65f_Fig24_20_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
M8B N005 Vbias4 0 0 N_50n l=100n w=2.5u
MCG N002 vin N003 0 N_50n l=100n w=2.5u
M1 N001 vout N004 0 N_50n l=100n w=2.5u
Cc vout N003 240f
VDD VDD 0 1
M4 VDD N001 N002 VDD P_50n l=100n w=5u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2448 680
WIRE 864 -352 864 -384
WIRE 864 -336 864 -352
WIRE 1088 -48 1088 -128
WIRE 1104 -128 1088 -128
WIRE 1136 -128 1104 -128
WIRE 1184 -256 1184 -288
WIRE 1184 -208 1184 -256
WIRE 1184 -80 1184 -112
WIRE 1248 -304 1232 -304
WIRE 1248 -256 1184 -256
WIRE 1248 -256 1248 -304
WIRE 1376 -80 1184 -80
WIRE 1472 -304 1248 -304
WIRE 1472 -256 1472 -304
WIRE 1504 -304 1472 -304
WIRE 1552 -240 1552 -288
WIRE 1552 -208 1552 -240
WIRE 1856 -256 1472 -256
WIRE 1856 -256 1856 -304
WIRE 1904 -240 1552 -240
WIRE 1904 -240 1904 -288
WIRE 1904 -208 1904 -240
WIRE 1904 -80 1904 -112
WIRE 1904 16 1904 -80
WIRE 2112 -80 1904 -80
WIRE 2112 -80 2112 -128
WIRE 2128 -128 2112 -128
WIRE 2176 -240 1904 -240
WIRE 2176 64 2096 64
WIRE 2176 176 2096 176
WIRE 2224 -128 2192 -128
WIRE 2224 -128 2224 -224
WIRE 2224 -112 2224 -128
WIRE 2224 -48 1088 -48
WIRE 2224 -48 2224 -112
WIRE 2224 -16 2224 -48
WIRE 2224 96 2224 80
WIRE 2224 208 2224 192
WIRE 2352 -112 2224 -112
WIRE 2384 -112 2352 -112
WIRE 2384 -16 2384 -48
SYMBOL nmos4 2176 96 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=100n w=2.5u
SYMATTR InstName M8B
SYMATTR Value N_50n
SYMBOL nmos4 1856 -208 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=100n w=2.5u
SYMATTR InstName MCG
SYMATTR Value N_50n
SYMBOL nmos4 1136 -208 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=100n w=2.5u
SYMATTR InstName M1
SYMATTR Value N_50n
SYMBOL cap 2192 -144 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName Cc
SYMATTR Value 240f
SYMBOL voltage 864 -352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL pmos4 1504 -384 R0
WINDOW 123 58 102 Left 0
WINDOW 0 56 16 Left 0
SYMATTR Value2 l=100n w=5u
SYMATTR InstName M4
SYMATTR Value P_50n
FLAG 864 -256 0
FLAG 864 -352 VDD
FLAG 1184 -160 0
FLAG 1552 -384 VDD
FLAG 1552 -336 VDD
FLAG 1184 -336 VDD
FLAG 800 -240 VDD
FLAG 944 -176 Vbias1
FLAG 944 -144 Vhigh
FLAG 944 -112 Vbias2
FLAG 944 -16 Vbias3
FLAG 944 -80 Vpcas
FLAG 944 -48 Vncas
FLAG 1184 -384 VDD
FLAG 1104 -128 vm
FLAG 2224 -320 VDD
FLAG 2224 -272 VDD
FLAG 2224 208 0
FLAG 2224 32 0
FLAG 2224 144 0
FLAG 2096 64 Vbias3
FLAG 2096 176 Vbias4
FLAG 2352 -112 vout
FLAG 2384 -16 0
FLAG 1904 -384 VDD
FLAG 1904 -336 VDD
FLAG 1904 -160 0
FLAG 1856 -128 vin
FLAG 1712 -128 0
* Z:\home\khalils\Downloads\files\data\raw_asc\1354898defe3_Voltage_clamping.asc
* Generated by LTspice 26.0.1 for Windows.
D1 0 Vout_Clamp_zener BZX85C3V3
V1 Vin 0 SINE(2.5 2.5 300 0 50)
R2 Vout_Clamp_zener Vin 220
V2 Vcc 0 3.3V
XU1 Vin Vout_clamp_opamp Vcc 0 Vout_clamp_opamp level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 0.1 0 1u
* https://electronics.stackexchange.com/questions/660780/how-can-i-clip-a-voltage-upper-limit-in-an-analog-signal
.model BZX85C3V3 D ( IS=5n RS=5m BV=3.3 IBV=5m N=1.2 Cjo=200p Vj=0.75 M=0.33 TT=10n )
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1752 720
WIRE 272 112 240 112
WIRE 336 112 272 112
WIRE 272 128 272 112
WIRE 272 208 272 192
WIRE 1280 352 1280 336
WIRE 1248 368 1168 368
WIRE 1344 384 1312 384
WIRE 1376 384 1344 384
WIRE 1248 400 1232 400
WIRE 1168 496 1168 368
WIRE 1344 496 1344 384
WIRE 1344 496 1168 496
FLAG 1056 352 Vin
FLAG 1056 432 0
FLAG 272 208 0
FLAG 160 112 Vin
FLAG 1280 416 0
FLAG 896 448 0
FLAG 1232 400 Vin
FLAG 896 368 Vcc
FLAG 1280 336 Vcc
FLAG 336 112 Vout_Clamp_zener
FLAG 1376 384 Vout_clamp_opamp
SYMBOL zener 288 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BZX85C3V3
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage 1056 336 R0
WINDOW 3 -49 -38 VRight 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(2.5 2.5 300 0 50)
SYMATTR InstName V1
SYMBOL res 256 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 220
SYMBOL voltage 896 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3.3V
SYMBOL OpAmps\\UniversalOpAmp2 1280 384 R0
SYMATTR InstName U1
TEXT 1088 584 Left 2 !.tran 0 0.1 0 1u
TEXT -168 -480 Left 2 ;https://electronics.stackexchange.com/questions/660780/how-can-i-clip-a-voltage-upper-limit-in-an-analog-signal
TEXT -424 40 Left 2 !.model BZX85C3V3 D ( IS=5n RS=5m BV=3.3 IBV=5m N=1.2 Cjo=200p Vj=0.75 M=0.33 TT=10n )
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6236.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6236.asy)
R2 N001 0 1K
V3 N003 0 SINE(0 .1 1K)
XU1 N003 N001 N002 +V -V NC_01 LT6236 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN
V2 -V 0 -5
V1 +V 0 5
R1 N002 N001 5K
.tran 3m
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -112 48 -128 48
WIRE 0 48 -32 48
WIRE 96 48 0 48
WIRE 208 48 176 48
WIRE -368 112 -368 96
WIRE -240 112 -240 96
WIRE 64 112 64 96
WIRE 0 160 0 48
WIRE 32 160 0 160
WIRE 208 192 208 48
WIRE 208 192 176 192
WIRE -368 208 -368 192
WIRE -240 208 -240 192
WIRE 32 224 -144 224
WIRE -144 240 -144 224
WIRE 64 288 64 272
WIRE -144 336 -144 320
SYMBOL LT6236 64 192 R0
SYMATTR InstName U1
SYMBOL voltage -240 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 192 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL voltage -368 96 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res -16 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -144 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 .1 1K)
FLAG -240 208 0
FLAG 64 96 +V
FLAG -240 96 +V
FLAG 64 288 -V
FLAG -368 208 0
FLAG -368 96 -V
FLAG -128 48 0
FLAG -144 336 0
TEXT 136 344 Left 2 !.tran 3m
* Z:\tmp\asc_dec_bjh7r6w2\0ae4273b13cd_BVco_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R2 Out1 N001 1k
B1 Out1 N001 V={sin(v(ctrl)*5e3*time)}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -144 208 -208 208
WIRE -144 224 -144 208
WIRE -144 336 -208 336
WIRE -144 336 -144 304
WIRE -112 208 -144 208
WIRE 0 192 0 160
WIRE 0 336 -144 336
WIRE 0 336 0 272
WIRE 64 160 0 160
WIRE 112 160 64 160
WIRE 112 192 112 160
WIRE 112 336 0 336
WIRE 112 336 112 272
WIRE 224 208 224 160
WIRE 224 336 112 336
WIRE 224 336 224 288
WIRE 288 160 224 160
WIRE 368 160 288 160
WIRE 368 336 224 336
SYMBOL res 96 176 R0
WINDOW 0 -37 37 Left 0
WINDOW 3 -32 73 Left 0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL bv 0 176 R0
WINDOW 3 -182 182 Left 0
WINDOW 0 -15 60 Left 0
SYMATTR Value V={sin(v(ctrl)*5e3*time)}
SYMATTR InstName B1
FLAG -112 208 Ctrl
FLAG 64 160 Out1
FLAG 288 160 Out2
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2118-1.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2118-1.0.asy)
XU1 IN IN IN OUT 0 0 N002 IN IN IN N001 ADP2118-x.x Rtop=400k Rbot=600k Ctop=4p ;pnba Sync/Mode)FREQ)TRK)FB)GND)PGND)SW)Pvin)Vin)EN)Pgood
V1 IN 0 5
R1 OUT N001 100K
Rload OUT 0 .33
C1 OUT 0 147
L1 N002 OUT 1
.tran 2m startup
.lib ADP2118-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1104 680
WIRE 128 0 48 0
WIRE 288 0 128 0
WIRE 48 16 48 0
WIRE 288 32 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 640 64 576 64
WIRE 48 112 48 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 640 144 640 64
WIRE 640 144 560 144
WIRE 704 144 640 144
WIRE 560 160 560 144
WIRE 704 160 704 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 560 256 560 224
WIRE 704 256 704 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 640 304 640 144
WIRE 640 304 416 304
WIRE 128 384 128 304
WIRE 160 384 128 384
WIRE 288 432 288 416
SYMBOL voltage 48 0 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADP2118-1.0 288 272 R0
SYMATTR InstName U1
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 147
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL res 688 144 R0
SYMATTR InstName Rload
SYMATTR Value .33
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
FLAG 560 256 0
FLAG 288 432 0
FLAG 48 112 0
FLAG 704 144 OUT
FLAG 704 256 0
FLAG 48 0 IN
TEXT 504 392 Left 2 !.tran 2m startup
* Z:\tmp\asc_dec_bjh7r6w2\061b6a866aac_Transmission_Gate_divide-by-2_unit_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M3 0 N004 N006 0 NMOS l={Ln} w={Wn}
M2 N001 NCLK NQ 0 NMOS l={Ln} w={Wn}
M10 N005 CLK N001 0 NMOS l={Ln} w={Wn}
M16 NQ N004 COM COM PMOS l={Lp} w={Wp}
V1 COM 0 0.7
M7 0 N002 N005 0 NMOS l={Ln} w={Wn}
M18 NQ NCLK N003 0 NMOS l={Ln} w={Wn}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 816 48 800 48
WIRE 832 48 816 48
WIRE 896 48 880 48
WIRE -512 64 -512 32
WIRE -512 64 -560 64
WIRE -416 64 -416 32
WIRE -320 64 -416 64
WIRE -224 64 -224 -16
WIRE -224 64 -320 64
WIRE 0 64 -176 64
WIRE 112 64 0 64
WIRE 304 64 208 64
WIRE 400 64 400 -16
WIRE 400 64 304 64
WIRE 624 64 448 64
WIRE -224 80 -224 64
WIRE 400 80 400 64
WIRE -512 96 -512 64
WIRE -416 96 -416 64
WIRE 624 144 624 64
WIRE 752 144 624 144
WIRE -320 256 -320 64
WIRE -240 256 -240 224
WIRE -240 256 -320 256
WIRE -144 256 -144 224
WIRE -64 256 -144 256
WIRE -16 256 -16 176
WIRE 0 256 0 64
WIRE 0 256 -16 256
WIRE 304 256 304 64
WIRE 384 256 384 224
WIRE 384 256 304 256
WIRE 480 256 480 224
WIRE 512 256 480 256
WIRE 560 256 512 256
WIRE 608 256 608 176
WIRE 624 256 624 144
WIRE 624 256 608 256
WIRE 688 256 640 256
WIRE 736 256 736 176
WIRE 752 256 752 144
WIRE 752 256 736 256
WIRE -16 272 -16 256
WIRE 608 272 608 256
WIRE 736 272 736 256
WIRE -240 288 -240 256
WIRE -144 288 -144 256
WIRE 384 288 384 256
WIRE 480 288 480 256
WIRE 512 416 512 256
WIRE 624 416 512 416
WIRE 672 416 624 416
WIRE -560 464 -560 64
WIRE 624 464 624 416
WIRE 624 464 -560 464
SYMBOL nmos4 736 352 R180
SYMATTR InstName M3
SYMATTR Value2 l={Ln} w={Wn}
SYMBOL nmos4 -416 -16 R90
SYMATTR InstName M2
SYMATTR Value2 l={Ln} w={Wn}
SYMBOL nmos4 -144 176 R90
SYMATTR InstName M10
SYMATTR Value2 l={Ln} w={Wn}
SYMBOL pmos4 608 256 R180
SYMATTR InstName M16
SYMATTR Value2 l={Lp} w={Wp}
SYMBOL voltage 944 -64 R0
SYMATTR InstName V1
SYMATTR Value 0.7
SYMBOL nmos4 -16 352 R180
SYMATTR InstName M7
SYMATTR Value2 l={Ln} w={Wn}
SYMBOL nmos4 480 176 R90
SYMATTR InstName M18
SYMATTR Value2 l={Ln} w={Wn}
FLAG -432 144 CLK
FLAG -496 -16 NCLK
FLAG -464 32 0
FLAG -464 96 COM
FLAG 944 -48 COM
FLAG 944 32 0
FLAG 800 48 NCLK
FLAG 896 48 CLK
FLAG -176 16 COM
FLAG -176 112 0
FLAG -176 160 0
FLAG -64 208 COM
FLAG -64 304 0
FLAG -64 160 COM
FLAG -64 352 0
FLAG -160 336 NCLK
FLAG -224 176 CLK
FLAG -192 224 0
FLAG -192 288 COM
FLAG 448 16 COM
FLAG 448 112 0
FLAG 448 160 0
FLAG 560 208 COM
FLAG 560 304 0
FLAG 560 160 COM
FLAG 560 352 0
FLAG 464 336 CLK
FLAG 400 176 NCLK
FLAG 432 224 0
FLAG 432 288 COM
FLAG 672 416 NQ
FLAG 880 64 0
FLAG 816 192 CLK
FLAG 816 272 0
FLAG 688 208 COM
FLAG 688 304 0
FLAG 688 160 COM
FLAG 688 352 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4613.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4613.asy)
C2 N008 0 10 x3 Rser=2m
R4 N009 0 392K
C3 N007 0 .002
R3 N002 IN 51K
R5 N003 0 5.23K
C4 OUT N003 22p
Rload OUT 0 1.5
V1 IN 0 30
C1 OUT 0 47 x4 Rser=4m
XU1 IN 0 OUT N008 N004 N004 NC_01 0 N007 N009 N006 N003 NC_02 NC_03 0 N005 N001 N002 LTM4613 ;pnba Vin)PGND)Vout)VD)DRVcc)INTVcc)PLLIN)FCB)Track/SS)MPGM)Fset)FB)MARG0)MARG1)SGND)Comp)Pgood)Run
.tran 1.5m startup
.lib LTM4613.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1032 680
WIRE -96 -16 -176 -16
WIRE 128 -16 -96 -16
WIRE -176 0 -176 -16
WIRE 128 0 128 -16
WIRE 16 48 0 48
WIRE 448 48 368 48
WIRE 544 48 448 48
WIRE 640 48 544 48
WIRE 448 64 448 48
WIRE 544 64 544 48
WIRE 640 64 640 48
WIRE -176 96 -176 80
WIRE -96 128 -96 -16
WIRE -80 128 -96 128
WIRE 16 128 0 128
WIRE 448 128 368 128
WIRE 448 144 448 128
WIRE 544 160 544 128
WIRE 640 160 640 144
WIRE 16 208 0 208
WIRE 384 208 368 208
WIRE 448 240 448 224
WIRE 0 288 0 208
WIRE 16 288 0 288
WIRE 384 288 368 288
WIRE 16 368 0 368
WIRE -64 448 -80 448
WIRE 16 448 0 448
WIRE -64 528 -80 528
WIRE 16 528 0 528
WIRE 384 528 368 528
WIRE 480 528 464 528
WIRE 128 592 128 576
WIRE 256 592 256 576
SYMBOL res 624 48 R0
SYMATTR InstName Rload
SYMATTR Value 1.5
SYMBOL cap 432 64 R0
WINDOW 3 24 54 Left 2
SYMATTR Value 22p
SYMATTR InstName C4
SYMBOL voltage -176 -16 R0
SYMATTR InstName V1
SYMATTR Value 30
SYMBOL res 16 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 51K
SYMBOL PowerProducts\\LTM4613 192 288 R0
SYMATTR InstName U1
SYMBOL res 432 128 R0
SYMATTR InstName R5
SYMATTR Value 5.23K
SYMBOL res 368 544 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 392K
SYMBOL cap 0 432 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .002
SYMBOL cap 0 512 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 123 60 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10
SYMATTR Value2 x3
SYMATTR SpiceLine Rser=2m
SYMBOL cap 528 64 R0
WINDOW 123 27 76 Left 2
WINDOW 3 33 46 Left 2
SYMATTR Value2 x4
SYMATTR Value 47
SYMATTR InstName C1
SYMATTR SpiceLine Rser=4m
FLAG 128 592 0
FLAG 256 592 0
FLAG 544 160 0
FLAG 640 160 0
FLAG -176 96 0
FLAG -80 528 0
FLAG 640 48 OUT
FLAG -176 -16 IN
FLAG -80 448 0
FLAG 480 528 0
FLAG 384 288 0
FLAG 448 240 0
TEXT 488 392 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\b01b1d5aa9ae_1078A.asc
* Generated by LTspice 26.0.1 for Windows.
* Absolute Value Circuit(Full-Wave Rectifier)
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1078A.asy)
D1 N003 N002 1N4148
R2 N001 IN 200K
XU2 N002 OUT +V 0 OUT LT1078 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
V3 IN 0 SINE(0 1 100)
R1 N002 N001 200K
XU1 0 N001 +V 0 N003 LT1078 ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 -80 96
WIRE 128 96 112 96
WIRE 224 96 128 96
WIRE 416 96 304 96
WIRE -80 112 -80 96
WIRE 544 128 432 128
WIRE -192 160 -192 144
WIRE 480 192 480 176
WIRE -80 208 -80 192
WIRE 192 208 192 192
WIRE 432 208 432 128
WIRE 448 208 432 208
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 544 224 544 128
WIRE 544 224 512 224
WIRE 576 224 544 224
WIRE 336 240 224 240
WIRE 416 240 416 96
WIRE 416 240 400 240
WIRE 448 240 416 240
WIRE -192 256 -192 240
WIRE 160 256 128 256
WIRE 480 272 480 256
WIRE 192 288 192 272
SYMBOL opamps\\LT1078A 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -192 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL diode 336 256 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL opamps\\LT1078A 480 160 R0
SYMATTR InstName U2
SYMBOL res 320 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200K
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL voltage -80 96 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
FLAG -192 256 0
FLAG 192 192 +V
FLAG -192 144 +V
FLAG -80 208 0
FLAG 192 288 0
FLAG 480 176 +V
FLAG 480 272 0
FLAG -80 96 IN
FLAG 576 224 OUT
FLAG 128 256 0
TEXT 448 336 Left 2 !.tran 30m
TEXT 392 32 Bottom 2 ;Absolute Value Circuit(Full-Wave Rectifier)