Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2166-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N008 0 2n
L1 N004 OUT 1.5 Rser=6m
C2 N003 N004 .1
C3 OUT 0 60 Rser=2m
R1 N005 0 100K
C5 N006 0 680p
R2 N007 N006 36K
V1 IN 0 5
R3 OUT N001 100K
C4 N002 0 1
C6 N007 0 1p
Rload OUT 0 .66
XU1 N002 N005 N002 OUT 0 0 N004 IN IN IN N001 N008 N007 N003 N002 ADP2166-x.x Rtop=818K Rbot=182K ;pnba SYNC)Rt)TRK)FB)Gnd)Pgnd)SW)Pvin)Avin)EN)Pgood)SS)Comp)Bst)Vreg
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2166-3.3.asy)
.lib ADP2166-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1464 680
WIRE 48 -96 -176 -96
WIRE 176 -96 48 -96
WIRE 272 -96 176 -96
WIRE -176 -80 -176 -96
WIRE 176 -80 176 -96
WIRE 272 -80 272 -96
WIRE 48 -16 48 -96
WIRE 64 -16 48 -16
WIRE 448 -16 384 -16
WIRE 608 -16 528 -16
WIRE -176 16 -176 0
WIRE -32 64 -48 64
WIRE 48 64 32 64
WIRE 64 64 48 64
WIRE 432 64 384 64
WIRE 48 144 48 64
WIRE 64 144 48 144
WIRE 432 144 432 128
WIRE 432 144 384 144
WIRE 480 144 432 144
WIRE 608 144 608 -16
WIRE 608 144 560 144
WIRE 720 144 608 144
WIRE 832 144 720 144
WIRE 720 160 720 144
WIRE 832 160 832 144
WIRE 48 224 48 144
WIRE 64 224 48 224
WIRE 720 256 720 224
WIRE 832 256 832 240
WIRE -32 304 -48 304
WIRE 64 304 48 304
WIRE 608 304 608 144
WIRE 608 304 384 304
WIRE -160 384 -224 384
WIRE -32 384 -80 384
WIRE 64 384 -32 384
WIRE 400 384 384 384
WIRE 480 384 464 384
WIRE -224 400 -224 384
WIRE -32 400 -32 384
WIRE 176 464 176 448
WIRE 272 464 272 448
WIRE -224 480 -224 464
WIRE -32 480 -32 464
FLAG 480 384 0
FLAG 272 464 0
FLAG -48 304 0
FLAG -224 480 0
FLAG -176 16 0
FLAG 720 256 0
FLAG 832 256 0
FLAG 832 144 OUT
FLAG -176 -96 IN
FLAG -48 64 0
FLAG -32 480 0
FLAG 176 464 0
SYMBOL cap 400 368 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL ind 464 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=6m
SYMBOL cap 416 64 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL cap 704 160 R0
WINDOW 40 24 74 Left 2
SYMATTR Value 60
SYMATTR InstName C3
SYMATTR SpiceLine Rser=2m
SYMBOL res 64 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap -240 400 R0
SYMATTR InstName C5
SYMATTR Value 680p
SYMBOL res -64 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 36K
SYMBOL voltage -176 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 544 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 32 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap -48 400 R0
SYMATTR InstName C6
SYMATTR Value 1p
SYMBOL res 816 144 R0
SYMATTR InstName Rload
SYMATTR Value .66
SYMBOL ADP2166-3.3 224 176 R0
SYMATTR InstName U1
TEXT 696 424 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5691R.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5691R.asy)
V1 Vdd 0 5
Vdac1 NC_02 0 1.25
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
XU1 vDAC Vdd 0 vOUT AD5691R Gain=2 ;pnba Vdac)Vdd)GND)Vout
CLOAD NC_01 0 10n
I1 0 0 1m AC 1
.tran 200u
.lib AD5691R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 464 112 192 112
WIRE -800 144 -800 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 1m
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL AD5691R -208 112 R0
SYMATTR InstName U1
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2
* Z:\tmp\asc_dec_bjh7r6w2\19cee9d94910_AD8602_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 2.5
V2 -V 0 -2.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 272 -944 256 -944
WIRE 32 -832 32 -848
WIRE 144 -832 144 -848
WIRE 384 -800 272 -800
WIRE 272 -784 272 -800
WIRE 32 -736 32 -752
WIRE 144 -736 144 -752
WIRE 272 -688 272 -704
SYMBOL voltage 32 -848 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 144 -848 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
FLAG 32 -848 +V
FLAG 32 -736 0
FLAG 272 -688 0
FLAG 272 -800 IN
FLAG 144 -848 -V
FLAG 256 -944 0
FLAG 144 -736 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1764-1.1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1764-1.1.asy)
R1 OUT 0 .6
C2 N003 0 10n
V1 IN 0 1.5
C3 N002 0 1
R2 N001 IN 50K
C1 N004 0 1
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1764 Radj=7357.86 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
C4 OUT 0 10
.tran 1m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL ADP1764-1.1 224 176 R0
SYMATTR InstName U1
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value .6
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\df82bdb7d1e9_Draft10.asc
* Generated by LTspice 26.0.1 for Windows.
C b 0 3.3
R a b 220 tol=1 pwr=0.1
VE a 0 10
.ic v(b)=0
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 48 80 48
WIRE 272 48 224 48
WIRE 320 48 272 48
WIRE 352 48 320 48
WIRE 352 64 352 48
WIRE 80 144 80 48
WIRE 352 176 352 144
WIRE 352 208 352 176
WIRE 80 288 80 224
WIRE 240 288 240 96
WIRE 240 288 80 288
WIRE 320 288 240 288
WIRE 352 288 352 272
WIRE 352 288 320 288
WIRE 80 304 80 288
SYMBOL voltage 80 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName E
SYMATTR Value 10
SYMBOL cap 336 208 R0
SYMATTR InstName C
SYMATTR Value 3.3u
SYMBOL res 336 48 R0
SYMATTR InstName R
SYMATTR Value 220
SYMATTR SpiceLine tol=1 pwr=0.1
FLAG 80 304 0
FLAG 224 48 charge
FLAG 272 48 SW
FLAG 240 96 discharge
FLAG 320 48 a
FLAG 352 176 b
FLAG 320 288 c
TEXT 288 304 Left 2 !.ic v(b)=0
TEXT 46 336 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17291B.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 3.6
L1 IN N001 10
R5 N002 0 402K
C3 OUT 0 4.7
R3 OUT N002 3.48Meg
R4 OUT 0 1.2K
XU2 0 IN IN N001 OUT N002 MAX17291B ;pnba GND)EN)IN)LX)OUT)FB
.tran 10m startup
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17291B.asy)
.lib MAX17291B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1416 868
WIRE -32 -48 -96 -48
WIRE 16 -48 -32 -48
WIRE 48 -48 16 -48
WIRE 160 -48 128 -48
WIRE 160 0 160 -48
WIRE -96 16 -96 -48
WIRE 16 64 16 -48
WIRE 48 64 16 64
WIRE 320 64 272 64
WIRE 448 64 320 64
WIRE 512 64 448 64
WIRE 560 64 512 64
WIRE 320 80 320 64
WIRE 560 80 560 64
WIRE 448 96 448 64
WIRE -96 128 -96 96
WIRE 16 176 16 64
WIRE 48 176 16 176
WIRE 320 176 320 160
WIRE 320 176 272 176
WIRE 448 176 448 160
WIRE 560 176 560 160
WIRE 320 192 320 176
WIRE 160 256 160 240
WIRE 320 288 320 272
FLAG -96 128 0
FLAG 320 288 0
FLAG 448 176 0
FLAG 560 176 0
FLAG -32 -48 IN
FLAG 512 64 OUT
FLAG 160 256 0
SYMBOL VOLTAGE -96 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL ind2 32 -32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR Type ind
SYMBOL res 304 176 R0
SYMATTR InstName R5
SYMATTR Value 402K
SYMBOL cap 432 96 R0
WINDOW 123 42 54 Left 2
WINDOW 0 41 3 Left 2
WINDOW 3 37 29 Left 2
SYMATTR InstName C3
SYMATTR Value 4.7
SYMBOL res 304 64 R0
SYMATTR InstName R3
SYMATTR Value 3.48Meg
SYMBOL res 544 64 R0
SYMATTR InstName R4
SYMATTR Value 1.2K
SYMBOL MAX17291B 160 128 R0
SYMATTR InstName U2
TEXT 104 344 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3221.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3221.asy)
R2 N002 0 107K
R1 OUT N002 154K
XU1 N001 N003 N002 0 IN OUT LTC3221 ;pnba C+)C-)FB)GND)Vin)Vout
Rload OUT 0 50
C2 OUT 0 4.7
V1 IN 0 2.5
C1 N001 N003 1
.tran 2m startup
.lib LTC3221.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 96 -32 96
WIRE 432 96 352 96
WIRE 544 96 432 96
WIRE 640 96 544 96
WIRE -32 112 -32 96
WIRE 432 112 432 96
WIRE 544 112 544 96
WIRE 640 112 640 96
WIRE 96 192 48 192
WIRE 432 192 352 192
WIRE -32 208 -32 192
WIRE 48 208 48 192
WIRE 432 208 432 192
WIRE 544 208 544 176
WIRE 640 208 640 192
WIRE 48 288 48 272
WIRE 96 288 48 288
WIRE 368 288 352 288
WIRE 432 304 432 288
SYMBOL res 624 96 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL voltage -32 96 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 416 96 R0
SYMATTR InstName R1
SYMATTR Value 154K
SYMBOL res 416 192 R0
SYMATTR InstName R2
SYMATTR Value 107K
SYMBOL PowerProducts\\LTC3221 224 192 R0
SYMATTR InstName U1
SYMBOL cap 32 208 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 528 112 R0
SYMATTR InstName C2
SYMATTR Value 4.7
FLAG -32 208 0
FLAG 432 304 0
FLAG 368 288 0
FLAG 640 208 0
FLAG 544 208 0
FLAG 640 96 OUT
FLAG -32 96 IN
TEXT 528 296 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\31f4e01978ce_Fig_2-70_AC_BI-Source.asc
* Generated by LTspice 26.0.1 for Windows.
C1 C1 0 20n
R2 Nor 0 1
V1 IN 0 AC 1
R1 IN C1 1
B1 0 Nor I=I(R1)
.ac dec 1000 10K 100Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1612 884
WIRE 304 256 256 256
WIRE 336 256 304 256
WIRE 464 256 416 256
WIRE 496 256 464 256
WIRE 832 256 672 256
WIRE 864 256 832 256
WIRE 256 272 256 256
WIRE 496 272 496 256
WIRE 672 272 672 256
WIRE 832 272 832 256
WIRE 256 368 256 352
WIRE 496 368 496 336
WIRE 672 368 672 352
WIRE 832 368 832 352
SYMBOL res 816 256 R0
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL cap 480 272 R0
SYMATTR InstName C1
SYMATTR Value 20n
SYMBOL res 320 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL bi 672 352 R180
WINDOW 0 24 80 Left 2
WINDOW 3 -113 -1 Left 2
SYMATTR InstName B1
SYMATTR Value I=I(R1)
SYMBOL voltage 256 256 R0
WINDOW 123 22 97 Left 2
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMATTR InstName V1
FLAG 496 368 0
FLAG 256 368 0
FLAG 304 256 IN
FLAG 464 256 C1
FLAG 672 368 0
FLAG 864 256 Nor
FLAG 832 368 0
TEXT 440 208 Left 2 !.ac dec 1000 10K 100Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1309.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1309.asy)
Rload OUT 0 100
C2 OUT 0 1
D1 N001 OUT MBRS130L
R1 N004 0 1Meg
V1 IN 0 5
XU1 N004 IN 0 N001 0 N003 OUT N002 LT1309 ;pnba SoftStart)Vcc)PGND)SW)GND)_VPPOK)Sense)ON/OFF
C1 N004 0 0.1
L1 IN N001 10 Rser=0.02 Rpar=5000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib LT1309.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2164 1364
WIRE 1344 672 1152 672
WIRE 1376 672 1344 672
WIRE 1504 672 1456 672
WIRE 1568 672 1504 672
WIRE 1680 672 1632 672
WIRE 1744 672 1680 672
WIRE 1856 672 1744 672
WIRE 1152 688 1152 672
WIRE 1744 688 1744 672
WIRE 1856 688 1856 672
WIRE 1344 720 1344 672
WIRE 1504 720 1504 672
WIRE 1152 784 1152 768
WIRE 1744 784 1744 752
WIRE 1856 784 1856 768
WIRE 1248 800 1232 800
WIRE 1680 800 1680 672
WIRE 1680 800 1600 800
WIRE 1248 896 1232 896
WIRE 1632 896 1600 896
WIRE 1728 896 1632 896
WIRE 1632 912 1632 896
WIRE 1728 912 1728 896
WIRE 1344 1008 1344 976
WIRE 1504 1008 1504 976
WIRE 1632 1008 1632 976
WIRE 1728 1008 1728 992
SYMBOL IND 1360 688 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL POLCAP 1728 688 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL RES 1712 896 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL RES 1840 672 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL POLCAP 1616 912 R0
SYMATTR InstName C1
SYMATTR Value 0.1
SYMBOL VOLTAGE 1152 672 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LT1309 1424 848 R0
SYMATTR InstName U1
SYMBOL SCHOTTKY 1568 688 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS130L
FLAG 1632 1008 0
FLAG 1856 784 0
FLAG 1744 784 0
FLAG 1728 1008 0
FLAG 1504 1008 0
FLAG 1344 1008 0
FLAG 1152 784 0
FLAG 1856 672 OUT
FLAG 1152 672 IN
TEXT 1752 1032 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3022.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3022.asy)
XU1 MP_01 MP_02 OUT MP_03 MP_04 MP_05 N001 MP_06 IN 0 MP_07 IN LT3022 ;pnba ))OUT))))ADJ))_SHDN)GND))IN
V1 IN 0 PWL(0 0 1 10)
R1 OUT N001 698
R2 N001 0 200
Rload OUT 0 .9
C1 OUT 0 10
.tran 1
.lib LT3022.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 160 -208 160
WIRE 16 160 0 160
WIRE 352 160 304 160
WIRE 464 160 352 160
WIRE 560 160 464 160
WIRE -208 176 -208 160
WIRE 464 176 464 160
WIRE 560 176 560 160
WIRE 0 256 0 160
WIRE 16 256 0 256
WIRE 352 256 352 240
WIRE 352 256 304 256
WIRE -208 272 -208 256
WIRE 352 272 352 256
WIRE 464 272 464 240
WIRE 560 272 560 256
WIRE 160 336 160 320
WIRE 352 368 352 352
SYMBOL res 544 160 R0
SYMATTR InstName Rload
SYMATTR Value .9
SYMBOL voltage -208 160 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL PowerProducts\\LT3022 160 192 R0
SYMATTR InstName U1
SYMBOL res 336 256 R0
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL res 336 144 R0
SYMATTR InstName R1
SYMATTR Value 698
SYMBOL cap 448 176 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG 160 336 0
FLAG 352 368 0
FLAG 464 272 0
FLAG 560 272 0
FLAG -208 272 0
FLAG 560 160 OUT
FLAG -208 160 IN
TEXT 480 352 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\20bde0faf336_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP27.asy)
R1 N002 N001 2.88k
V2 vin 0 SINE(0 0.447 1k)
R2 N001 0 1k
V1 vcc 0 5
XU1 vin N001 vcc vcc- N002 OP27 ;pnba In+)In-)V+)V-)OUT
V3 vcc- 0 -5
.tran 10m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 32 64 32
WIRE 192 32 176 32
WIRE -64 128 -96 128
WIRE 64 128 64 32
WIRE 64 128 16 128
WIRE 96 128 64 128
WIRE -96 144 -96 128
WIRE 192 144 192 32
WIRE 192 144 160 144
WIRE 240 144 192 144
SYMBOL voltage -320 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 32 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -224 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL res 192 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2.88k
SYMBOL voltage -320 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 0.447 1k)
SYMBOL OpAmps\\OP27 128 80 R0
SYMATTR InstName U1
FLAG -320 16 vcc
FLAG -320 96 0
FLAG 128 112 vcc
FLAG -96 144 0
FLAG -320 304 0
FLAG -320 224 vin
FLAG 304 144 vout
FLAG -224 96 0
FLAG -224 16 vcc-
FLAG 128 176 vcc-
FLAG 96 160 vin
TEXT -226 358 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\1191eb41c862_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
M3 N001 N002 P001 N001 PMOS l=90n w=400n
M2 VOUT N003 0 0 NMOS l=90n w=200n
M1 VOUT N002 0 0 NMOS l=90n w=200n
M4 P001 N003 VOUT N001 PMOS l=90n w=400n
V2 N003 0 PULSE(0 1 1n 10p 10p 4n 8n)
V1 N002 0 PULSE(0 1 1n 10p 10p 2n 4n)
V3 N001 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 8n 0 1p
.include 90nm_bulk.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 -432 288 -432
WIRE 288 -336 288 -432
WIRE 352 -336 288 -336
WIRE 288 -304 288 -336
WIRE 288 -304 272 -304
WIRE 352 -256 352 -336
WIRE 352 -256 272 -256
WIRE 80 -224 -80 -224
WIRE 224 -224 80 -224
WIRE -80 -176 -80 -224
WIRE 352 -160 352 -256
WIRE 352 -160 272 -160
WIRE 224 -64 224 -128
WIRE 224 -64 -80 -64
WIRE 272 -64 272 -112
WIRE 480 -64 272 -64
WIRE -80 0 -80 -64
WIRE 272 0 272 -64
WIRE 272 0 192 0
WIRE 384 0 272 0
WIRE 192 16 192 0
WIRE 224 16 224 -64
WIRE 272 16 224 16
WIRE 384 16 384 0
WIRE 208 64 192 64
WIRE 416 64 384 64
WIRE 80 96 80 -224
WIRE 144 96 80 96
WIRE 272 96 272 16
WIRE 336 96 272 96
WIRE 192 144 192 112
WIRE 208 144 208 64
WIRE 208 144 192 144
WIRE 288 144 208 144
WIRE 384 144 384 112
WIRE 384 144 288 144
WIRE 416 144 416 64
WIRE 416 144 384 144
WIRE 288 176 288 144
IOPIN 480 -64 Out
SYMBOL voltage 416 -448 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 1
SYMBOL voltage -80 -16 R0
WINDOW 3 -357 85 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 1n 10p 10p 4n 8n)
SYMBOL voltage -80 -192 R0
WINDOW 3 -370 89 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 1n 10p 10p 2n 4n)
SYMBOL pmos4 224 -304 R0
WINDOW 123 143 71 Left 2
SYMATTR InstName M3
SYMATTR Value2 l=90n w=400n
SYMBOL nmos4 336 16 R0
WINDOW 123 138 74 Left 2
SYMATTR InstName M2
SYMATTR Value2 l=90n w=200n
SYMBOL pmos4 224 -208 R0
WINDOW 123 142 68 Left 2
SYMATTR InstName M4
SYMATTR Value2 l=90n w=400n
SYMBOL nmos4 144 16 R0
WINDOW 123 -128 107 Left 2
SYMATTR InstName M1
SYMATTR Value2 l=90n w=200n
FLAG -80 -96 0
FLAG -80 80 0
FLAG 288 176 0
FLAG 416 -352 0
FLAG 480 -64 VOUT
TEXT -312 144 Left 2 !.tran 0 8n 0 1p
TEXT 176 -560 Left 2 !.include 90nm_bulk.txt
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7104-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7104-3.3.asy)
V1 IN 0 PWL(0 0 20u 4.3)
XU1 IN OUT IN N001 OUT 0 ADP7104-3.3 ;pnba Vin)Sense)EN)PG)Vout)GND
C1 OUT 0 2.2 Rser=1.5m
R1 OUT N001 100k
Rload OUT 0 10
.tran 3m
.lib ADP7104-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -144 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -144 48 -144 32
WIRE 384 128 352 128
WIRE 464 128 464 32
WIRE 464 128 384 128
WIRE 560 128 464 128
WIRE -144 144 -144 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 384 224 384 128
WIRE 384 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL ADP7104-3.3 224 128 R0
SYMATTR InstName U1
SYMBOL voltage -144 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 20u 4.3)
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
FLAG 224 304 0
FLAG -144 144 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -144 32 IN
FLAG 560 128 OUT
TEXT 432 296 Left 2 !.tran 3m
* Z:\tmp\asc_dec_bjh7r6w2\1992f4a77a7c_linear_regulator_fixed_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 0 270
R3 N004 0 330
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 400 160 400 112
WIRE 192 272 192 208
WIRE 400 272 400 240
WIRE 400 272 192 272
WIRE 304 368 304 320
WIRE 400 368 400 272
WIRE 496 368 496 320
WIRE 592 368 592 112
WIRE 304 480 304 448
WIRE 400 480 400 448
WIRE 496 480 496 448
WIRE 592 480 592 432
SYMBOL res 384 352 R0
SYMATTR InstName R2
SYMATTR Value 270
SYMBOL res 480 352 R0
SYMATTR InstName R3
SYMATTR Value 330
FLAG 400 480 0
FLAG 496 480 0
FLAG 304 480 0
FLAG 592 480 0