* Z:\home\khalils\Downloads\files\data\raw_asc\0e6a38daef87_Draft19.asc
* Generated by LTspice 26.0.1 for Windows.
* TLV247XA 5-V operational amplifier "macromodel" subcircuit
* created using Parts release 8.0 on 04/27/99 at 14:31
* Parts is a MicroSim product.
*
* connections: non-inverting input
* | inverting input
* | | positive power supply
* | | | negative power supply
* | | | | output
* | | | | |
*
*$
c2 6 7 5.5000E-12
R6 N003 0 10k
hlim 90 0 vlim 1K
egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5
vlim 7 8 dc 0
R8 N005 0 10k
dp 4 3 dx
XU2 N008 N007 N001 0 N007 TLV247xA ;pnba In+)In-)V+)V-)OUT
css 10 99 556.53E-15
R5 N002 N003 135k
V4 N001 0 3.3v
gcm 0 6 10 99 32.483E-9
rp 3 4 3.8023E3
R2 N001 N008 10k
vln 0 92 dc 110
rss 10 99 18.667E6
rd1 3 11 12.527E3
ro1 8 5 10
R3 N008 0 10k
iss 10 4 dc 10.714E-6
ioff 0 6 dc 75E-9
ro2 7 99 10
R7 N005 N006 5k
c1 11 12 1.1094E-12
dln 92 90 dx
ve 54 4 dc .842
dc 5 53 dy
dlp 90 91 dx
D1 N003 N001 BAT54
ga 6 0 11 12 79.828E-6
XU1 N004 N005 N001 0 N006 TLV247xA ;pnba In+)In-)V+)V-)OUT
V3 N002 0 SINE(0 48 3000 0 0 0 0)
fb 7 99 poly(5) vb vc ve vlp vln 0 39.614E6 -1E3 1E3 40E6 -40E6
vc 3 53 dc .842
rd2 3 12 12.527E3
vb 9 0 dc 0
vlp 91 0 dc 110
de 54 5 dy
j1 11 2 10 jx1
R1 N004 N003 10k
r2 6 9 100.00E3
R4 N004 N007 10k
j2 12 1 10 jx2
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.subckt TLV247xA 1 2 3 4 5
.model dx D(Is=800.00E-18)
.model dy D(Is=800.00E-18 Rs=1m Cjo=10p)
.model jx1 NJF(Is=1.0825E-12 Beta=594.78E-6 Vto=-1)
.model jx2 NJF(Is=1.0825E-12 Beta=594.78E-6 Vto=-1)
.ends
.tran 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1416 1364
WIRE -160 -96 -224 -96
WIRE -112 -96 -160 -96
WIRE -112 -80 -112 -96
WIRE 256 -32 48 -32
WIRE -320 -16 -480 -16
WIRE -320 16 -320 -16
WIRE -224 16 -224 -96
WIRE 48 16 48 -32
WIRE 48 16 -64 16
WIRE -160 64 -160 -96
WIRE -96 64 -160 64
WIRE -64 64 -64 16
WIRE -64 64 -96 64
WIRE 32 96 -64 96
WIRE 144 96 112 96
WIRE 256 96 256 -32
WIRE -320 112 -320 96
WIRE -224 112 -224 80
WIRE -224 112 -320 112
WIRE -64 112 -64 96
WIRE -64 112 -224 112
WIRE 224 112 192 112
WIRE -320 128 -320 112
WIRE -160 128 -160 64
WIRE 416 128 288 128
WIRE -224 144 -224 112
WIRE -96 144 -96 64
WIRE -64 144 -96 144
WIRE 144 144 144 96
WIRE 224 144 144 144
WIRE 0 160 -128 160
WIRE -64 192 -64 144
WIRE -128 208 -128 160
WIRE -96 208 -128 208
WIRE 0 208 0 160
WIRE 48 208 0 208
WIRE 144 208 144 144
WIRE 144 208 128 208
WIRE 0 224 0 208
WIRE 0 224 -32 224
WIRE -480 240 -480 -16
WIRE -160 240 -160 208
WIRE -96 240 -160 240
WIRE 192 240 192 112
WIRE 256 240 192 240
WIRE 416 240 416 128
WIRE 416 240 336 240
WIRE -160 272 -160 240
WIRE 192 272 192 240
SYMBOL Opamps\\opamp2 256 64 R0
SYMATTR InstName U1
SYMATTR Value TLV247xA
SYMBOL res 176 256 R0
SYMATTR InstName R8
SYMATTR Value 10k
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 240 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R7
SYMATTR Value 5k
SYMBOL voltage -480 224 R0
WINDOW 3 -261 149 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 48 3000 0 0 0 0)
SYMBOL res -176 256 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res -336 0 R0
SYMATTR InstName R5
SYMATTR Value 135k
SYMBOL res 144 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL Opamps\\opamp2 -64 160 R0
SYMATTR InstName U2
SYMATTR Value TLV247xA
SYMBOL res -176 112 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage -112 -96 R0
SYMATTR InstName V4
SYMATTR Value 3.3v
SYMBOL schottky -208 80 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res -336 112 R0
SYMATTR InstName R6
SYMATTR Value 10k
FLAG 256 160 0
FLAG -480 320 0
FLAG -320 208 0
FLAG -112 0 0
FLAG -224 208 0
FLAG -64 256 0
FLAG -160 352 0
FLAG 192 352 0
TEXT 568 0 Left 2 !* TLV247XA 5-V operational amplifier "macromodel" subcircuit\n\n* created using Parts release 8.0 on 04/27/99 at 14:31\n\n* Parts is a MicroSim product.\n\n*\n\n* connections:   non-inverting input\n\n*                | inverting input\n\n*                | | positive power supply\n\n*                | | | negative power supply\n\n*                | | | | output\n\n*                | | | | |\n\n.subckt TLV247xA 1 2 3 4 5\n\n*\n\n  c1   11 12 1.1094E-12\n\n  c2    6  7 5.5000E-12\n\n  css  10 99 556.53E-15\n\n  dc    5 53 dy\n\n  de   54  5 dy\n\n  dlp  90 91 dx\n\n  dln  92 90 dx\n\n  dp    4  3 dx\n\n  egnd 99  0 poly(2) (3,0) (4,0) 0 .5 .5\n\n  fb    7 99 poly(5) vb vc ve vlp vln 0 39.614E6 -1E3 1E3 40E6 -40E6\n\n  ga    6  0 11 12 79.828E-6\n\n  gcm   0  6 10 99 32.483E-9\n\n  iss  10  4 dc 10.714E-6\n\n  hlim 90  0 vlim 1K\n\n  ioff 0 6 dc 75E-9\n\n  j1   11  2 10 jx1\n\n  j2   12  1 10 jx2\n\n  r2    6  9 100.00E3\n\n  rd1   3 11 12.527E3\n\n  rd2   3 12 12.527E3\n\n  ro1   8  5 10\n\n  ro2   7 99 10\n\n  rp    3  4 3.8023E3\n\n  rss  10 99 18.667E6\n\n  vb    9  0 dc 0\n\n  vc    3 53 dc .842\n\n  ve   54  4 dc .842\n\n  vlim  7  8 dc 0\n\n  vlp  91  0 dc 110\n\n  vln   0 92 dc 110\n\n.model dx D(Is=800.00E-18)\n\n.model dy D(Is=800.00E-18 Rs=1m Cjo=10p)\n\n.model jx1 NJF(Is=1.0825E-12 Beta=594.78E-6 Vto=-1)\n\n.model jx2 NJF(Is=1.0825E-12 Beta=594.78E-6 Vto=-1)\n\n.ends\n\n*$
TEXT -742 1336 Left 2 !.tran 0.01