Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\007d18e2d0ed_2b.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
XU1 Vref N002 V -V N001 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 V 0 15
R1 Output N002 {R}
V2 -V 0 -15
V3 Vref 0 3
R2 N002 0 3k
V4 Vin 0 17.024
M1 Vin N001 Output Output NMOS l=1u w=10u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model M1 nmos(vto=0.7 kp=1e-6 lambda=0)
.tran 1m
.step param R 3k 7k 1k
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1228 680
WIRE 384 48 384 -32
WIRE 464 96 384 96
WIRE 144 112 112 112
WIRE 336 128 208 128
WIRE 144 144 96 144
WIRE 464 144 464 96
WIRE 464 144 384 144
WIRE 384 192 384 144
WIRE 464 192 384 192
WIRE 96 304 96 144
WIRE 384 304 384 272
WIRE 384 304 96 304
WIRE 384 336 384 304
IOPIN 464 192 Out
SYMBOL res 368 176 R0
SYMATTR InstName R1
SYMATTR Value {R}
SYMBOL nmos4 336 48 R0
SYMATTR InstName M1
SYMATTR Value2 l=1u w=10u
SYMBOL voltage 880 0 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL OpAmps\\UniversalOpAmp2 176 128 M180
SYMATTR InstName U1
SYMBOL res 368 320 R0
SYMATTR InstName R2
SYMATTR Value 3k
SYMBOL voltage 992 0 R0
SYMATTR InstName V3
SYMATTR Value 3
SYMBOL voltage 768 0 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 1120 0 R0
SYMATTR InstName V4
SYMATTR Value 17.024
FLAG 176 160 V
FLAG 176 96 -V
FLAG 384 416 0
FLAG 112 112 Vref
FLAG 464 192 Output
FLAG 768 96 0
FLAG 880 96 0
FLAG 992 96 0
FLAG 768 16 V
FLAG 880 16 -V
FLAG 992 16 Vref
FLAG 1120 96 0
FLAG 1120 16 Vin
FLAG 384 -32 Vin
TEXT 72 488 Left 2 !.model M1 nmos(vto=0.7 kp=1e-6 lambda=0)
TEXT 48 512 Left 2 !.tran 1m
TEXT 56 544 Left 2 !.step param R 3k 7k 1k
* Z:\home\khalils\Downloads\files\data\raw_asc\eac4baf917ad_Iso_Current_Limit.asc
* Generated by LTspice 26.0.1 for Windows.
V2 CTRL N004 PULSE(0 1 99m 1m 1m 99m 300m 1)
R4 N003 0 1k
XD2 Source Gate DI_DDZ9700 ;pnba +)-
R3 OUT_HV 0 10Meg
M1 HV Gate Source Source IXTP3N120
R5 Gate N001 10k
XD1 OUT_HV N001 DI_DDZ9700 ;pnba +)-
V3 N004 0 PULSE(0 1 200m 1n 1n 5u 5m 20)
S1 N003 OUT_HV CTRL 0 MYSW
R1 Source OUT_HV 10k
R2 HV Gate 10Meg
V1 N002 0 PULSE(0 1000 0 90m 3m 3m 100m 3)
V4 HV N002 PULSE(0 1000 300m 900m 3m 3m 1000m 1)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model MYSW SW(Ron=1m Roff=100Meg Vt=.5 Vh=-.4)
.tran 1300m
.LIB DDZ9700.spice.txt
.LIB IXTP3N120.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1336 808
WIRE -256 32 -480 32
WIRE 16 32 -256 32
WIRE 448 32 16 32
WIRE 16 80 16 32
WIRE 448 128 448 32
WIRE 16 208 16 160
WIRE 144 208 16 208
WIRE 288 208 144 208
WIRE 400 208 288 208
WIRE 16 240 16 208
WIRE 288 240 288 208
WIRE 288 320 288 304
WIRE 384 320 288 320
WIRE 448 320 448 224
WIRE 448 320 384 320
WIRE 448 336 448 320
WIRE 16 352 16 320
WIRE -480 432 -480 32
WIRE 16 448 16 416
WIRE 448 448 448 416
WIRE 448 448 16 448
WIRE 576 448 448 448
WIRE 672 448 576 448
WIRE 448 496 448 448
WIRE 672 496 672 448
WIRE 800 512 720 512
WIRE 880 512 800 512
WIRE 880 544 880 512
WIRE -480 560 -480 512
WIRE 752 560 720 560
WIRE 752 592 752 560
WIRE 448 624 448 576
WIRE 672 624 672 576
WIRE 880 656 880 624
WIRE -480 672 -480 640
WIRE 672 736 672 704
WIRE 880 768 880 736
SYMBOL res 0 224 R0
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL res 656 608 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL voltage -480 416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 1000 300m 900m 3m 3m 1000m 1)
SYMBOL res 432 480 R0
SYMATTR InstName R3
SYMATTR Value 10Meg
SYMBOL nmos 400 128 R0
SYMATTR InstName M1
SYMATTR Value IXTP3N120
SYMBOL res 432 320 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL diode 32 416 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value DI_DDZ9700
SYMATTR Prefix X
SYMBOL res 0 64 R0
SYMATTR InstName R2
SYMATTR Value 10Meg
SYMBOL diode 304 304 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value DI_DDZ9700
SYMATTR Prefix X
SYMBOL voltage 880 640 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 200m 1n 1n 5u 5m 20)
SYMBOL voltage -480 544 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1000 0 90m 3m 3m 100m 3)
SYMBOL voltage 880 528 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 99m 1m 1m 99m 300m 1)
SYMBOL sw 672 592 R180
SYMATTR InstName S1
SYMATTR Value MYSW
FLAG -480 672 0
FLAG 448 624 0
FLAG 672 736 0
FLAG 752 592 0
FLAG 880 768 0
FLAG -256 32 HV
FLAG 576 448 OUT_HV
FLAG 800 512 CTRL
FLAG 144 208 Gate
FLAG 384 320 Source
TEXT -224 696 Left 2 !.model MYSW SW(Ron=1m Roff=100Meg Vt=.5 Vh=-.4)
TEXT -512 792 Left 2 !.tran 1300m
TEXT -224 728 Left 2 !.LIB DDZ9700.spice.txt
TEXT -224 760 Left 2 !.LIB IXTP3N120.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\LT83205.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT83205.asy)
L1 N002 OUT 0.47 Rser=10m
R4 OUT N007 49.9K
C6 N004 0 82p
C2 N006 0 1
R3 OUT N005 100K
R1 N003 0 47.5K
R2 N009 0 10K
C1 N008 0 10n
Rload OUT 0 1
XU1 N002 NC_01 0 N003 IN N001 N005 IN N006 N009 N004 OUT N007 LT83205 ;pnba SW)SYNC/MODE)GND)RT)VIN)BST)PG)EN/UVLO)INTVCC)SET)VC)OUTS)PGFB
R5 N007 0 49.9K
C4 OUT 0 100 Rser=10m
R6 N004 N008 499
C3 N009 0 2.2
V1 IN 0 12
C5 N001 N002 0.1
.tran 2.5m startup
.lib LT83205.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1136 680
WIRE -64 -32 -144 -32
WIRE 32 -32 -64 -32
WIRE 96 -32 32 -32
WIRE 496 -32 432 -32
WIRE -144 -16 -144 -32
WIRE 496 -16 496 -32
WIRE 32 64 32 -32
WIRE 96 64 32 64
WIRE 496 64 496 48
WIRE 496 64 432 64
WIRE 592 64 496 64
WIRE 704 64 672 64
WIRE 768 64 704 64
WIRE 832 64 768 64
WIRE 880 64 832 64
WIRE 768 80 768 64
WIRE 880 80 880 64
WIRE -144 96 -144 64
WIRE -16 160 -32 160
WIRE 96 160 64 160
WIRE 624 160 432 160
WIRE 704 160 704 64
WIRE 704 160 624 160
WIRE 768 176 768 144
WIRE 880 176 880 160
WIRE -80 256 -176 256
WIRE 96 256 -80 256
WIRE 496 256 432 256
WIRE 624 256 624 160
WIRE 624 256 576 256
WIRE 704 256 704 160
WIRE -176 272 -176 256
WIRE 96 352 16 352
WIRE 704 352 704 336
WIRE 704 352 432 352
WIRE -176 368 -176 352
WIRE -80 368 -80 256
WIRE 16 368 16 352
WIRE 704 368 704 352
WIRE -176 448 -176 432
WIRE -80 448 -80 432
WIRE 16 448 16 432
WIRE 496 448 432 448
WIRE 592 448 496 448
WIRE 496 464 496 448
WIRE 592 464 592 448
WIRE 704 464 704 448
WIRE 272 544 272 528
WIRE 496 560 496 528
WIRE 592 560 592 544
SYMBOL cap 752 80 R0
SYMATTR SpiceLine Rser=10m
SYMATTR InstName C4
SYMATTR Value 100
SYMBOL cap 480 464 R0
SYMATTR InstName C3
SYMATTR Value 2.2
SYMBOL res 576 448 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 864 64 R0
SYMATTR InstName Rload
SYMATTR Value 1
SYMBOL res 592 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res 688 352 R0
SYMATTR InstName R5
SYMATTR Value 49.9K
SYMBOL res 80 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 47.5K
SYMBOL cap 480 -16 R0
SYMATTR InstName C5
SYMATTR Value 0.1
SYMBOL LT83205 272 224 R0
SYMATTR InstName U1
SYMBOL voltage -144 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res -192 256 R0
SYMATTR InstName R6
SYMATTR Value 499
SYMBOL cap -96 368 R0
SYMATTR InstName C6
SYMATTR Value 82p
SYMBOL cap 0 368 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap -192 368 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL ind 576 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 0.47
SYMATTR SpiceLine Rser=10m
SYMBOL res 688 240 R0
SYMATTR InstName R4
SYMATTR Value 49.9K
FLAG 272 544 0
FLAG -144 96 0
FLAG -32 160 0
FLAG -176 448 0
FLAG 16 448 0
FLAG 496 560 0
FLAG 592 560 0
FLAG 768 176 0
FLAG 704 464 0
FLAG 880 176 0
FLAG 832 64 OUT
FLAG -64 -32 IN
FLAG -80 448 0
TEXT 184 648 Left 2 !.tran 2.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\09465577d3d5_EJ1.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 N002 1
L2 N002 N003 1
C1 N002 0 2
RL N003 0 1
V1 N001 0 AC 1 Rser=1
.ac dec 1k 0.001 1000
.net I(RL) V1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 96 -48 96
WIRE 176 96 112 96
WIRE 256 96 176 96
WIRE 400 96 336 96
WIRE -48 160 -48 96
WIRE 400 160 400 96
WIRE 176 192 176 96
WIRE -48 304 -48 240
WIRE 176 304 176 256
WIRE 176 304 -48 304
WIRE 400 304 400 240
WIRE 400 304 176 304
WIRE 176 320 176 304
FLAG 176 320 0
SYMBOL ind 16 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL ind 240 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 1
SYMBOL cap 160 192 R0
SYMATTR InstName C1
SYMATTR Value 2
SYMBOL res 384 144 R0
SYMATTR InstName RL
SYMATTR Value 1
SYMBOL voltage -48 144 R0
WINDOW 123 21 105 Left 2
WINDOW 39 20 131 Left 2
SYMATTR Value2 AC 1
SYMATTR SpiceLine Rser=1
SYMATTR InstName V1
SYMATTR Value ""
TEXT -152 352 Left 2 !.ac dec 1k 0.001 1000
TEXT -152 376 Left 2 !.net I(RL) V1
* Z:\home\khalils\Downloads\files\data\raw_asc\2b1057e90d94_ADA4830.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4830.asy)
V3 N004 0 SINE(0 1 1Meg)
V5 N005 0 PULSE(0 3 1u 1n 1n 10u 20u)
R1 N001 N002 5K
XU1 N003 N004 0 N001 0 N005 N002 OUT ADA4830 ;pnba VREF)IN+)IN-)V+)V-)ENA)STB)OUT
V1 N001 0 5
R2 OUT 0 1K
V4 N003 0 2.5
.tran 100u
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1256 680
WIRE 16 16 -128 16
WIRE 64 16 16 16
WIRE -128 32 -128 16
WIRE 64 32 64 16
WIRE 16 112 16 16
WIRE -128 128 -128 112
WIRE 64 128 64 112
WIRE -16 160 -32 160
WIRE -16 192 -336 192
WIRE 336 192 192 192
WIRE -336 208 -336 192
WIRE 336 208 336 192
WIRE -16 224 -208 224
WIRE -208 240 -208 224
WIRE 16 288 16 272
WIRE 64 288 64 272
WIRE -336 304 -336 288
WIRE 336 304 336 288
WIRE -208 336 -208 320
WIRE 64 384 64 368
SYMBOL res 48 16 R0
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL voltage -128 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -336 192 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName V4
SYMATTR Value 2.5
SYMBOL ADA4830 48 192 R0
WINDOW 0 50 -38 Left 2
SYMATTR InstName U1
SYMBOL voltage 64 272 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR Value PULSE(0 3 1u 1n 1n 10u 20u)
SYMATTR InstName V5
SYMBOL res 320 192 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -208 224 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR Value SINE(0 1 1Meg)
SYMATTR InstName V3
FLAG 16 288 0
FLAG 336 192 OUT
FLAG -336 304 0
FLAG -208 336 0
FLAG -128 128 0
FLAG 336 304 0
FLAG 64 384 0
FLAG -32 160 0
TEXT 328 416 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\20ad8f2bac8b_invertingOpAmp.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
V1 N003 0 -100
V2 N001 0 100
R1 Out N002 {Gain}
R3 N002 In 1
XU1 0 N002 N001 N003 Out level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 336 48 272 48
WIRE 160 80 128 80
WIRE 288 80 240 80
WIRE 272 128 272 48
WIRE 272 128 208 128
WIRE 208 144 208 128
WIRE 336 144 336 128
WIRE -48 160 -112 160
WIRE 128 160 128 80
WIRE 128 160 32 160
WIRE 176 160 128 160
WIRE 288 176 288 80
WIRE 288 176 240 176
WIRE 384 176 288 176
WIRE 176 192 128 192
WIRE 128 224 128 192
WIRE 208 240 208 208
WIRE 208 336 208 320
IOPIN -112 160 In
IOPIN 384 176 Out
SYMBOL OpAmps\\UniversalOpAmp 208 176 R0
SYMATTR InstName U1
SYMBOL voltage 336 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 100
SYMBOL res 256 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {Gain}
SYMBOL res 48 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL voltage 208 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value -100
FLAG 128 224 0
FLAG -112 160 In
FLAG 384 176 Out
FLAG 208 336 0
FLAG 336 144 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADGM1304.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADGM1304.asy)
V3 +V 0 3.3
R1 N002 0 300
V1 N001 0 2
V2 N003 0 PULSE(3.3 0 0 10u 10u 10m 20m)
XU1 +V N003 N001 N002 0 ADGM1304 ;pnba VDD)IN)RF1)RFC)GND
.tran 100m
.lib ADGM1304.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2144 2724
WIRE 912 32 880 32
WIRE 912 96 912 32
WIRE 704 176 672 176
WIRE 816 176 784 176
WIRE 1088 176 1008 176
WIRE 1088 192 1088 176
WIRE 816 240 736 240
WIRE 560 272 528 272
WIRE 1088 288 1088 272
WIRE 560 304 560 272
WIRE 736 304 736 240
WIRE 912 368 912 352
WIRE 560 416 560 384
WIRE 736 432 736 384
SYMBOL ADGM1304 912 224 R0
SYMATTR InstName U1
SYMBOL voltage 560 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL voltage 736 288 R0
WINDOW 3 33 134 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(3.3 0 0 10u 10u 10m 20m)
SYMATTR InstName V2
SYMBOL res 1072 176 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL voltage 800 176 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2
FLAG 672 176 0
FLAG 1088 288 0
FLAG 912 368 0
FLAG 736 432 0
FLAG 912 32 +V
FLAG 560 416 0
FLAG 560 272 +V
TEXT 1088 352 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX40110.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX40110.asy)
RL OUT 0 10k
Vcc Vcc 0 2.5
CL OUT 0 15p
V1 IN 0 SINE(0 50m 100k)
Vee 0 Vee 2.5
XU1 IN OUT Vcc Vee OUT Vcc MAX40110 ;pnba In+)In-)V+)V-)OUT)SHDN
.tran 10u
.lib MAX40110.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1720 800
WIRE 624 256 304 256
WIRE 64 288 64 272
WIRE 416 352 416 320
WIRE 304 368 304 256
WIRE 400 368 304 368
WIRE 624 384 624 256
WIRE 624 384 464 384
WIRE 720 384 624 384
WIRE 64 400 64 368
WIRE 64 400 32 400
WIRE 400 400 304 400
WIRE 32 416 32 400
WIRE 624 416 624 384
WIRE 720 432 720 384
WIRE 64 448 64 400
WIRE 416 448 416 416
WIRE 448 448 448 416
WIRE 304 496 304 400
WIRE 624 528 624 496
WIRE 720 528 720 496
WIRE 64 544 64 528
WIRE 304 592 304 576
SYMBOL voltage 304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 50m 100k)
SYMBOL MAX40110 432 400 R0
SYMATTR InstName U1
SYMBOL voltage 64 272 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 2.5
SYMBOL voltage 64 432 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName Vee
SYMATTR Value 2.5
SYMBOL res 608 400 R0
SYMATTR InstName RL
SYMATTR Value 10k
SYMBOL cap 704 432 R0
SYMATTR InstName CL
SYMATTR Value 15p
FLAG 720 384 OUT
FLAG 64 272 Vcc
FLAG 64 544 Vee
FLAG 416 320 Vcc
FLAG 416 448 Vee
FLAG 32 416 0
FLAG 304 592 0
FLAG 624 528 0
FLAG 304 400 IN
FLAG 720 528 0
FLAG 448 448 Vcc
TEXT 16 632 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7182-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7182-3.0.asy)
XU1 OUT MP_01 MP_02 N001 MP_03 0 IN ADP7182-x.x Rset=600k ;pnba Vout)))EN))GND)Vin
V1 IN 0 -8
C1 IN 0 2.2
C2 OUT 0 2.2
R1 OUT 0 50
V2 N001 0 PULSE(0 2 200u 1n 1n 10m)
.tran 1m
.lib ADP7182-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 -80 -48
WIRE 112 -48 32 -48
WIRE 432 -48 368 -48
WIRE 544 -48 432 -48
WIRE -80 -32 -80 -48
WIRE 32 -32 32 -48
WIRE 432 -32 432 -48
WIRE 544 -32 544 -48
WIRE -80 64 -80 48
WIRE 32 64 32 32
WIRE 432 64 432 32
WIRE 544 64 544 48
WIRE 112 144 32 144
WIRE 32 160 32 144
WIRE 32 256 32 240
WIRE 240 256 240 208
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 2.2
SYMBOL voltage 32 144 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 200u 1n 1n 10m)
SYMBOL res 528 -48 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL voltage -80 -48 R0
SYMATTR InstName V1
SYMATTR Value -8
SYMBOL ADP7182-3.0 240 48 R0
SYMATTR InstName U1
SYMBOL cap 16 -32 R0
SYMATTR InstName C1
SYMATTR Value 2.2
FLAG -80 64 0
FLAG 32 64 0
FLAG 432 64 0
FLAG 32 256 0
FLAG 240 256 0
FLAG 544 64 0
FLAG 32 -48 IN
FLAG 432 -48 OUT
TEXT 528 248 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\076e083f7095_Q4.asc
* Generated by LTspice 26.0.1 for Windows.
Vgs N002 0 {Vgs}
Vds N001 0 1.8
M1 N001 N002 0 0 nch_tt l=10u w=15u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.step param Vgs list 0.4 0.5 0.6 0.7 0.8 0.9
.dc Vds 0 1.8 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 624 -64 352 -64
WIRE 352 16 352 -64
WIRE 624 32 624 -64
WIRE 304 96 96 96
WIRE 96 144 96 96
WIRE 96 352 96 224
WIRE 352 352 352 112
WIRE 352 352 96 352
WIRE 624 352 624 112
WIRE 624 352 352 352
WIRE 352 384 352 352
SYMBOL voltage 96 128 R0
SYMATTR InstName Vgs
SYMATTR Value {Vgs}
SYMBOL nmos 304 16 R0
SYMATTR InstName M1
SYMATTR Value nch_tt
SYMATTR Value2 l=10u w=15u
SYMBOL voltage 624 16 R0
SYMATTR InstName Vds
SYMATTR Value 1.8
FLAG 352 384 0
TEXT -200 80 Left 2 !.include TSMC180.lib
TEXT -416 128 Left 2 !.step param Vgs list 0.4 0.5 0.6 0.7 0.8 0.9
TEXT -184 168 Left 2 !.dc Vds 0 1.8 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\41122ef102f5_out.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N008 0 C
L1 N006 N005 L
R3 N005 N008 R
L0 N005 N004 L
C3 N008 N007 C
R4 N001 0 R
C2 N001 N002 C
C5 N005 N008 C
C0 N007 0 C
R2 N004 N007 R
C4 N006 0 C
R0 N003 N002 R
R1 N003 N005 R
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1000 1000
WIRE 216 32 208 32
WIRE 296 32 336 32
WIRE 336 40 336 32
WIRE 336 120 336 144
WIRE 216 144 192 144
WIRE 296 144 336 144
WIRE 192 168 192 144
WIRE 192 248 192 256
WIRE 192 288 192 256
WIRE 192 352 192 344
WIRE 472 144 448 144
WIRE 552 144 576 144
WIRE 448 152 448 144
WIRE 448 232 448 256
WIRE 352 272 352 256
WIRE 352 336 352 336
WIRE 160 0 80 32
WIRE 160 64 208 32
WIRE 192 368 192 344
WIRE 352 368 352 336
WIRE 80 384 80 288
WIRE 576 256 576 216
WIRE 240 256 192 256
WIRE 304 256 352 256
WIRE 576 144 576 144
WIRE 576 208 576 216
WIRE 352 160 336 144
WIRE 352 224 352 256
WIRE 80 152 80 32
WIRE 80 232 80 288
WIRE 448 144 336 144
WIRE 448 256 352 256
SYMBOL Misc\EuropeanResistor 64 136 R0
SYMATTR InstName R4
SYMBOL cap 336 160 R0
SYMATTR InstName C5
SYMBOL Misc\EuropeanResistor 320 24 R0
SYMATTR InstName R1
SYMBOL cap 560 144 R0
SYMATTR InstName C4
SYMBOL Misc\EuropeanResistor 176 152 R0
SYMATTR InstName R2
SYMBOL cap 336 272 R0
SYMATTR InstName C1
SYMBOL Misc\EuropeanResistor 432 136 R0
SYMATTR InstName R3
SYMBOL Misc\EuropeanResistor 312 16 R90
SYMATTR InstName R0
SYMBOL cap 176 288 R0
SYMATTR InstName C0
SYMBOL cap 144 0 R0
SYMATTR InstName C2
SYMBOL cap 304 240 R90
SYMATTR InstName C3
SYMBOL ind 312 128 R90
SYMATTR InstName L0
SYMBOL ind 568 128 R90
SYMATTR InstName L1
FLAG 192 368 0
FLAG 352 368 0
FLAG 80 384 0
FLAG 576 256 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3125.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3125.asy)
V1 IN 0 3.3
R2 OUT N003 1.24Meg
L1 N001 N002 2.2
R3 N003 0 536K
C1 OUT 0 10 Rser=28m
R1 N004 0 44.2K
Rload OUT 0 100
XU1 0 N003 N004 IN N001 IN OUT N002 LTC3125 ;pnba GND)FB)PROG)Vin)CS)_SHDN)Vout)SW
.tran 500u startup
.lib LTC3125.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1340 680
WIRE 192 16 160 16
WIRE 288 16 272 16
WIRE 160 64 160 16
WIRE 288 64 288 16
WIRE 48 112 -48 112
WIRE 64 112 48 112
WIRE 464 112 384 112
WIRE 608 112 464 112
WIRE 704 112 608 112
WIRE -48 128 -48 112
WIRE 464 128 464 112
WIRE 608 128 608 112
WIRE 704 128 704 112
WIRE -48 224 -48 208
WIRE 48 224 48 112
WIRE 64 224 48 224
WIRE 464 224 464 208
WIRE 464 224 384 224
WIRE 608 224 608 192
WIRE 704 224 704 208
WIRE 464 240 464 224
WIRE -32 336 -48 336
WIRE 64 336 48 336
WIRE 400 336 384 336
WIRE 464 336 464 320
SYMBOL res 448 224 R0
WINDOW 3 27 78 Left 2
SYMATTR Value 536K
SYMATTR InstName R3
SYMBOL res 688 112 R0
WINDOW 3 23 87 Left 2
SYMATTR Value 100
SYMATTR InstName Rload
SYMBOL ind 176 32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL PowerProducts\\LTC3125 224 224 R0
SYMATTR InstName U1
SYMBOL cap 592 128 R0
WINDOW 123 24 92 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=28m
SYMBOL res 64 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 44.2K
SYMBOL res 448 112 R0
WINDOW 3 23 87 Left 2
SYMATTR Value 1.24Meg
SYMATTR InstName R2
SYMBOL voltage -48 112 R0
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG -48 224 0
FLAG -48 336 0
FLAG 464 336 0
FLAG 400 336 0
FLAG 608 224 0
FLAG 704 224 0
FLAG -48 112 IN
FLAG 704 112 OUT
TEXT 584 352 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\03c258fce360_AD8554.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8554.asy)
R2 OUT N001 10K
Rload OUT 0 10K
V1 +V 0 5
R1 N001 0 10K
Vin IN 0 SINE(0 1 10K)
XU1 IN N001 +V -V OUT AD8554 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -5
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 336 -1120 320 -1120
WIRE 432 -1120 416 -1120
WIRE 448 -1120 432 -1120
WIRE 544 -1120 528 -1120
WIRE 80 -1024 80 -1040
WIRE 176 -1024 176 -1040
WIRE 432 -1008 432 -1120
WIRE 448 -1008 432 -1008
WIRE 544 -992 544 -1120
WIRE 544 -992 512 -992
WIRE 656 -992 544 -992
WIRE 448 -976 336 -976
WIRE 656 -976 656 -992
WIRE 336 -960 336 -976
WIRE 80 -928 80 -944
WIRE 176 -928 176 -944
WIRE 656 -880 656 -896
WIRE 336 -864 336 -880
SYMBOL res 640 -992 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 544 -1136 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 336 -976 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 80 -1040 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 432 -1136 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL Opamps\\AD8554 480 -1056 R0
SYMATTR InstName U1
SYMBOL voltage 176 -1040 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
FLAG 80 -1040 +V
FLAG 80 -928 0
FLAG 336 -864 0
FLAG 656 -992 OUT
FLAG 336 -976 IN
FLAG 480 -1024 +V
FLAG 176 -1040 -V
FLAG 480 -960 -V
FLAG 320 -1120 0
FLAG 656 -880 0
FLAG 176 -928 0
TEXT 592 -840 Left 2 !.tran 1m