* Z:\home\khalils\Downloads\files\data\raw_asc\LT7170-1.asc
* Generated by LTspice 26.0.1 for Windows.
* The following parameters can be defined by right-clicking on the LT7170 symbol.\n \nFrequency_switch -- in Hz, sets switching frequency\n \nVout_range -- sets maximum output range, 0 for 1.375V, 1 for 2.75V, 2 for 5.5V\n \nVout_command -- in volt, sets output voltage\n \nTon_delay & Ton_rise -- in sec, set ON delay and soft-start time\nToff_delay & Toff_fall -- in sec, set OFF delay and soft-off time \n \nIlim_range -- sets current limit options:\n 0 positive valley current limit of 4.5A per phase, negative valley current limit of -3A\n 1 positive valley current limit of 6.5A per phase, negative valley current limit of -3.8A\n 2 positive valley current limit of 7.8A per phase, negative valley current limit of -4.7A\n 3 positive valley current limit of 10.7A per phase, negative valley current limit of -6A \n \nGMEA_control--Sets Error Amp transconductance, N=0 to 31\n GmEA = 0.15mS*(n+1)/(2^VOUT_RANGE) (relative to VSENSE inputs)\n \nRITH--in ohm, programmable internal compensation\n \nCITH--in Farad, programmable internal compensation\nMFR_PWM_PHASE-- in degree, sets the master phase delay in 15-degree increments with respect to the SYNC frequency if present.\nVout_UV_Fault_Limit and Vout_OV_Fault_Limit --- in volt, set the undervoltage and overvoltage fault limit for the Pgood output\nVout_UV_Warn_Limit and Vout_OV_Warn_Limit-- in volt, set the undervoltage and overvoltage warning limit for the Alert output\nMFR_DISCHARGE_THRESHOLD-- Output voltage threshold to determine that the output has decayed sufficiently to reenable the channel
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT7170-1.asy)
V3 CLK_EXT 0 PULSE(0 5 1.8m 1n 1n 500n 1u 500)
V4 EXTVCC 0 5
R3 EXTVCC _ALERT 100k
R2 SYNC/PWM_CFG 0 162k
C5 0 VDD18 4.7
C2 OUT 0 100 x2 Rser=5m
V1 IN 0 12
R4 OUT 0 0.283
C7 0 INTVCC 10
C6 0 DRVCC 10
R1 EXTVCC PGOOD 100k
C3 BOOST0 SW0 0.1
L1 SW1 OUT 330n Rser=2.5m
C4 BOOST1 SW1 0.1
C1 OUT 0 100 x2 Rser=2m
XU1 IN SW0 0 SW1 BOOST0 BOOST1 DRVCC INTVCC EXTVCC VDD18 _ALERT 0 OUT 0 RUN PGOOD 0 SYNC/PWM_CFG LT7170-1 FREQUENCY_SWITCH=750k VOUT_RANGE=0 VOUT_COMMAND=0.85 VIN_ON= 1.4 VIN_OFF=1.35 TON_DELAY=.01m TON_RISE=.5m TOFF_DELAY=.2m TOFF_FALL=.3m ILIM_RANGE=0 GMEA_CONTROL=10 RITH=7k CITH=320p MFR_PWM_PHASE=0 VOUT_UV_FAULT_LIMIT=0.6 VOUT_OV_FAULT_LIMIT=1 VOUT_UV_WARN_LIMIT=0.5 VOUT_OV_WARN_LIMIT=0.9 MFR_DISCHARGE_THRESHOLD=0.2 ;pnba PVIN)SW0)SGND)SW1)BOOST0)BOOST1)DRVCC)INTVCC)EXTVCC)VDD18)_ALERT)PGND)VSENSEP)VSENSEN)RUN)PGOOD)VOUT_CFG)SYNC/PWM_CFG
L0 SW0 OUT 330n Rser=2.5m
C8 CLK_EXT SYNC/PWM_CFG 1.5n
V2 RUN 0 PWL(500u 0 500.001u 5 2500u 5 2500.001u 0)
.tran 6m startup
.lib LT7170-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2972 1188
WIRE 32 -288 -448 -288
WIRE 512 -288 448 -288
WIRE -448 -272 -448 -288
WIRE 512 -272 512 -288
WIRE -16 -192 -272 -192
WIRE 32 -192 -16 -192
WIRE 480 -192 448 -192
WIRE 512 -192 512 -208
WIRE 512 -192 480 -192
WIRE 576 -192 512 -192
WIRE 704 -192 656 -192
WIRE 752 -192 704 -192
WIRE 848 -192 752 -192
WIRE 912 -192 848 -192
WIRE -448 -176 -448 -192
WIRE -272 -176 -272 -192
WIRE 752 -176 752 -192
WIRE 848 -176 848 -192
WIRE -144 -96 -160 -96
WIRE -16 -96 -80 -96
WIRE 32 -96 -16 -96
WIRE 512 -96 448 -96
WIRE 512 -80 512 -96
WIRE 752 -80 752 -112
WIRE 848 -80 848 -112
WIRE -272 -64 -272 -96
WIRE -144 0 -160 0
WIRE -32 0 -80 0
WIRE 32 0 -32 0
WIRE 480 0 448 0
WIRE 512 0 512 -16
WIRE 512 0 480 0
WIRE 576 0 512 0
WIRE 704 0 704 -192
WIRE 704 0 656 0
WIRE -256 96 -288 96
WIRE -32 96 -176 96
WIRE 32 96 -32 96
WIRE 912 96 912 -192
WIRE 912 96 448 96
WIRE 912 112 912 96
WIRE -144 192 -160 192
WIRE -32 192 -80 192
WIRE 32 192 -32 192
WIRE 912 192 448 192
WIRE 912 224 912 192
WIRE 32 288 16 288
WIRE 528 288 448 288
WIRE 608 288 528 288
WIRE 784 288 688 288
WIRE -240 384 -352 384
WIRE -96 384 -176 384
WIRE -32 384 -96 384
WIRE 32 384 -32 384
WIRE 528 384 448 384
WIRE 608 384 528 384
WIRE 768 384 688 384
WIRE 784 384 784 288
WIRE 784 384 768 384
WIRE -32 400 -32 384
WIRE -352 432 -352 384
WIRE 160 480 160 464
WIRE 320 480 320 464
WIRE -352 560 -352 512
SYMBOL cap -144 -112 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C5
SYMATTR Value 4.7
SYMBOL res 896 96 R0
SYMATTR InstName R4
SYMATTR Value 0.283
SYMBOL cap -144 -16 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C6
SYMATTR Value 10
SYMBOL voltage -448 -288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap -240 368 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C8
SYMATTR Value 1.5n
SYMBOL voltage -272 -192 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(500u 0 500.001u 5 2500u 5 2500.001u 0)
SYMBOL cap 496 -80 R0
SYMATTR InstName C4
SYMATTR Value 0.1
SYMBOL res 704 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL cap -144 176 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C7
SYMATTR Value 10
SYMBOL res 704 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL cap 832 -176 R0
WINDOW 123 24 77 Left 2
SYMATTR Value2 x2
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=5m
SYMBOL ind 560 -176 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L0
SYMATTR Value 330n
SYMATTR SpiceLine Rser=2.5m
SYMBOL ind 560 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 330n
SYMATTR SpiceLine Rser=2.5m
SYMBOL voltage -352 416 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 1.8m 1n 1n 500n 1u 500)
SYMBOL voltage -160 96 M270
WINDOW 123 -74 56 VBottom 2
WINDOW 39 -53 56 VBottom 2
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL cap 496 -272 R0
SYMATTR InstName C3
SYMATTR Value 0.1
SYMBOL res -16 384 M0
SYMATTR InstName R2
SYMATTR Value 162k
SYMBOL LT7170-1 240 0 R0
SYMATTR InstName U1
SYMATTR SpiceLine FREQUENCY_SWITCH=750k VOUT_RANGE=0 VOUT_COMMAND=0.85 VIN_ON= 1.4 VIN_OFF=1.35 TON_DELAY=.01m TON_RISE=.5m TOFF_DELAY=.2m TOFF_FALL=.3m ILIM_RANGE=0
SYMATTR SpiceLine2 GMEA_CONTROL=10 RITH=7k CITH=320p MFR_PWM_PHASE=0 VOUT_UV_FAULT_LIMIT=0.6 VOUT_OV_FAULT_LIMIT=1 VOUT_UV_WARN_LIMIT=0.5 VOUT_OV_WARN_LIMIT=0.9 MFR_DISCHARGE_THRESHOLD=0.2
SYMBOL cap 736 -176 R0
WINDOW 123 24 77 Left 2
SYMATTR Value2 x2
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=2m
FLAG 320 480 0
FLAG 160 480 0
FLAG -160 0 0
FLAG -448 -288 IN
FLAG -448 -176 0
FLAG 848 -80 0
FLAG 912 -192 OUT
FLAG 752 -80 0
FLAG -16 -192 RUN
FLAG 512 -288 BOOST0
FLAG 480 -192 SW0
FLAG 480 0 SW1
FLAG 512 -96 BOOST1
FLAG -352 560 0
FLAG -352 384 CLK_EXT
FLAG -96 384 SYNC/PWM_CFG
FLAG -32 480 0
FLAG 768 384 EXTVCC
FLAG 528 384 _ALERT
FLAG -32 0 DRVCC
FLAG -32 192 INTVCC
FLAG -32 96 EXTVCC
FLAG 528 288 PGOOD
FLAG -160 -96 0
FLAG -16 -96 VDD18
FLAG -160 192 0
FLAG -272 -64 0
FLAG -288 96 0
FLAG 912 224 0
FLAG 16 288 0
TEXT 704 472 Left 2 !.tran 6m startup
TEXT 1136 -320 Left 2 ;The following parameters can be defined by right-clicking on the LT7170 symbol.\n \nFrequency_switch -- in Hz, sets switching frequency\n \nVout_range -- sets maximum output range, 0 for 1.375V, 1 for 2.75V, 2 for 5.5V\n \nVout_command -- in volt, sets output voltage\n \nTon_delay & Ton_rise -- in sec, set ON delay and soft-start time\nToff_delay & Toff_fall -- in sec, set OFF delay and soft-off time \n \nIlim_range -- sets current limit options:\n   0 positive valley current limit of 4.5A per phase, negative valley current limit of -3A\n   1 positive valley current limit of 6.5A per phase, negative valley current limit of -3.8A\n   2 positive valley current limit of 7.8A per phase, negative valley current limit of -4.7A\n   3 positive valley current limit of 10.7A per phase, negative valley current limit of -6A     \n \nGMEA_control--Sets Error Amp transconductance, N=0 to 31\n GmEA = 0.15mS*(n+1)/(2^VOUT_RANGE)     (relative to VSENSE inputs)\n \nRITH--in ohm, programmable internal compensation\n \nCITH--in Farad, programmable internal compensation\nMFR_PWM_PHASE-- in degree, sets the master phase delay in 15-degree increments with respect to the SYNC frequency if present.\nVout_UV_Fault_Limit and Vout_OV_Fault_Limit --- in volt, set the undervoltage and overvoltage fault limit for the Pgood output\nVout_UV_Warn_Limit and Vout_OV_Warn_Limit-- in volt, set the undervoltage and overvoltage warning limit for the Alert output\nMFR_DISCHARGE_THRESHOLD-- Output voltage threshold to determine that the output has decayed sufficiently to reenable the channel