Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7118-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7118-2.5.asy)
C2 N001 0 4.7n
Rload OUT 0 20
V1 IN 0 3.5
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=2.5 ;pnba Vin)Sense)EN)SS)Vout)GND
C1 OUT 0 2.2 Rser=1.5m
.tran 6m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL ADP7118-2.5 224 128 R0
SYMATTR InstName U1
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.5
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\dde0577ca642_diff_opamp.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp1.asy)
XU3 N008 N005 NC_01 NC_02 N001 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R5 N001 N005 10e+6
R3 N005 N004 10e+5
VS+N N002 0 SINE(5 15 1)
RWire2 N007 N006 10e+4
RTransducer N002 N003 10e+3
R4 N008 N007 10e+5
RWire1 N004 N003 10e+4
R6 N008 0 10e+6
VN N006 0 5
.tran 5
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 592 112 512 112
WIRE -32 128 -128 128
WIRE 112 128 48 128
WIRE 192 144 192 128
WIRE 320 144 192 144
WIRE 320 192 320 144
WIRE 336 192 320 192
WIRE 432 192 432 112
WIRE 432 192 416 192
WIRE 448 192 432 192
WIRE 592 208 592 112
WIRE 592 208 512 208
WIRE 224 224 80 224
WIRE 336 224 304 224
WIRE 432 224 416 224
WIRE 448 224 432 224
WIRE 80 240 80 224
WIRE 432 256 432 224
SYMBOL res 208 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RWire1
SYMATTR Value 10e+4
SYMBOL res -48 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Transducer
SYMATTR Value 10e+3
SYMBOL voltage -128 144 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName S+N
SYMATTR Value SINE(5 15 1)
SYMBOL res 320 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RWire2
SYMATTR Value 10e+4
SYMBOL res 432 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10e+5
SYMBOL res 528 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10e+6
SYMBOL res 416 240 R0
SYMATTR InstName R6
SYMATTR Value 10e+6
SYMBOL res 432 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10e+5
SYMBOL voltage 80 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName N
SYMATTR Value 5
SYMBOL OpAmps\\UniversalOpAmp1 480 208 R0
SYMATTR InstName U3
FLAG 80 320 0
FLAG -128 48 0
FLAG 432 336 0
FLAG -32 208 0
TEXT 0 368 Left 2 !.tran 5
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4622A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4622A.asy)
R1 N002 0 40.2K
Rload1 OUT1 0 .4
Rload2 OUT2 0 .6
C2 OUT2 0 47 Rser=5m
V1 IN 0 12
R2 N001 0 90.9K
XU1 NC_01 OUT2 IN NC_02 NC_03 IN 0 NC_04 N002 NC_05 NC_06 OUT1 NC_07 IN IN NC_08 NC_09 N001 LTM4622A ;pnba Pgood1)Vout2)Run1)Mode)FREQ)Run2)SGND)Pgood2)FB2)Track/SS2)COMP2)Vout1)IntVcc)Vin1)Vin2)COMP1)Track/SS1)FB1
C1 OUT1 0 47 Rser=5m
.tran .5m startup
.lib LTM4622A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 -80 -96 -80
WIRE 96 -80 16 -80
WIRE 352 -80 96 -80
WIRE 432 -80 352 -80
WIRE -96 -64 -96 -80
WIRE 96 -64 96 -80
WIRE 352 -64 352 -80
WIRE 16 0 16 -80
WIRE 32 0 16 0
WIRE 432 0 432 -80
WIRE 432 0 416 0
WIRE -96 32 -96 16
WIRE -128 192 -272 192
WIRE 32 192 -128 192
WIRE 592 192 416 192
WIRE 688 192 592 192
WIRE -272 208 -272 192
WIRE -128 208 -128 192
WIRE 592 208 592 192
WIRE 688 208 688 192
WIRE 32 288 -64 288
WIRE 496 288 416 288
WIRE -272 304 -272 288
WIRE -128 304 -128 272
WIRE -64 304 -64 288
WIRE 496 304 496 288
WIRE 592 304 592 272
WIRE 688 304 688 288
WIRE -64 400 -64 384
WIRE 496 400 496 384
WIRE 160 560 160 544
SYMBOL cap -144 208 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMATTR SpiceLine Rser=5m
SYMBOL res -288 192 R0
SYMATTR InstName Rload1
SYMATTR Value .4
SYMBOL res -80 288 R0
SYMATTR InstName R2
SYMATTR Value 90.9K
SYMBOL res 480 288 R0
SYMATTR InstName R1
SYMATTR Value 40.2K
SYMBOL PowerProducts\\LTM4622A 224 240 R0
SYMATTR InstName U1
SYMBOL res 672 192 R0
SYMATTR InstName Rload2
SYMATTR Value .6
SYMBOL voltage -96 -80 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 576 208 R0
SYMATTR InstName C2
SYMATTR Value 47
SYMATTR SpiceLine Rser=5m
FLAG 160 560 0
FLAG -96 32 0
FLAG 496 400 0
FLAG -64 400 0
FLAG -128 304 0
FLAG -272 304 0
FLAG 592 304 0
FLAG 688 304 0
FLAG 688 192 OUT2
FLAG -272 192 OUT1
FLAG -96 -80 IN
TEXT 480 488 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\f872a7d16451_Brain.asc
* Generated by LTspice 26.0.1 for Windows.
* DESCRIPTION: Sixteen step analog memory
D3 N003 PROG_TRIGGER 1N4148
J2 +15 N001 N002 2N3819
D1 N003 STEP_TRIGGER 1N4148
R1 N002 -15 2k
J3 N002 N004 CV_OUT 2N3819
D2 N004 STEP_TRIGGER 1N4148
C1 N001 0 10n
J1 CV_IN N003 N001 2N3819
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 -128 352 -208
WIRE 64 -64 -192 -64
WIRE 240 -64 160 -64
WIRE 304 -64 240 -64
WIRE 240 -16 240 -64
WIRE 352 -16 352 -32
WIRE 480 -16 352 -16
WIRE 624 -16 576 -16
WIRE 128 0 128 -16
WIRE 128 0 64 0
WIRE 352 0 352 -16
WIRE 64 16 64 0
WIRE 128 16 128 0
WIRE 544 48 544 32
WIRE 64 128 64 80
WIRE 128 128 128 80
WIRE 240 128 240 48
WIRE 352 128 352 80
WIRE 544 128 544 112
SYMBOL diode 80 16 M0
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL njf 304 -128 R0
SYMATTR InstName J2
SYMATTR Value 2N3819
SYMBOL diode 528 48 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL cap 224 -16 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL diode 112 16 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL njf 64 -16 R270
SYMATTR InstName J1
SYMATTR Value 2N3819
SYMBOL res 336 -16 R0
SYMATTR InstName R1
SYMATTR Value 2k
SYMBOL njf 480 32 R270
SYMATTR InstName J3
SYMATTR Value 2N3819
FLAG 352 128 -15
FLAG 352 -208 +15
FLAG 240 128 0
FLAG -192 -64 CV_IN
FLAG 624 -16 CV_OUT
FLAG 128 128 STEP_TRIGGER
FLAG 544 128 STEP_TRIGGER
FLAG 64 128 PROG_TRIGGER
TEXT -8 408 Left 0 ;DESCRIPTION: Sixteen step analog memory
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8066.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N002 0 12
Vin IN 0 SINE(0 1 10Meg) Rser=50
R1 N001 0 499
R2 OUT N001 499
Rload OUT 0 1K
R4 N004 IN 249
C1 OUT N001 2.2p
XU2 N004 N001 OUT N002 N005 0 N003 N003 AD8066 ;pnba +INA)-INA)OUTA)V+)V-)+INB)-INB)OUTB
V3 N005 0 -12
.tran 1u
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8066.asy)
.lib AD8066.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE 240 -1056 208 -1056
WIRE 320 -1056 304 -1056
WIRE 400 -1056 320 -1056
WIRE 400 -1040 400 -1056
WIRE 96 -944 80 -944
WIRE 208 -944 208 -1056
WIRE 208 -944 176 -944
WIRE 224 -944 208 -944
WIRE 320 -944 320 -1056
WIRE 320 -944 304 -944
WIRE 400 -944 400 -960
WIRE 320 -896 320 -944
WIRE 464 -896 320 -896
WIRE 832 -896 736 -896
WIRE 832 -864 832 -896
WIRE 208 -800 208 -944
WIRE 464 -800 208 -800
WIRE 768 -800 736 -800
WIRE 832 -768 832 -784
WIRE 336 -704 112 -704
WIRE 464 -704 416 -704
WIRE 768 -704 768 -800
WIRE 768 -704 736 -704
WIRE 112 -688 112 -704
WIRE 464 -608 368 -608
WIRE 768 -608 736 -608
WIRE 112 -592 112 -608
WIRE 368 -592 368 -608
WIRE 368 -496 368 -512
FLAG 112 -592 0
FLAG 400 -1056 OUT
FLAG 80 -944 0
FLAG 400 -944 0
FLAG 832 -768 0
FLAG 112 -704 IN
FLAG 368 -496 0
FLAG 768 -608 0
SYMBOL voltage 832 -880 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL voltage 112 -704 R0
WINDOW 123 24 146 Left 2
WINDOW 39 47 45 Left 2
WINDOW 3 48 73 Left 2
SYMATTR SpiceLine Rser=50
SYMATTR Value SINE(0 1 10Meg)
SYMATTR InstName Vin
SYMBOL res 192 -960 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 499
SYMBOL res 320 -960 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 499
SYMBOL res 384 -1056 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL res 432 -720 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 249
SYMBOL cap 304 -1072 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2.2p
SYMBOL AD8066 608 -704 R0
SYMATTR InstName U2
SYMBOL voltage 368 -608 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V3
SYMATTR Value -12
TEXT 552 -456 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3009-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3009-2.5.asy)
C1 OUT 0 1
Rload OUT 0 250
XU1 IN OUT MP_01 0 IN LT3009-2.5 ;pnba IN)OUT))GND)_SHDN
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 416 48 320 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL PowerProducts\\LT3009-2.5 176 96 R0
SYMATTR InstName U1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 250
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 336 248 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\1b066b48e646_Draft59.asc
* Generated by LTspice 26.0.1 for Windows.
* leakage very low. even in overvoltage situation.
J1 P001 N001 0 J201
V1 0 N001 10V
R1 PV P001 100k
V2 PV 0 100V
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.tran 10ms
.include 74hc.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2756 1020
WIRE -112 80 -128 80
WIRE -64 80 -112 80
WIRE -112 224 -112 80
WIRE -112 224 -192 224
SYMBOL res -32 -80 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage -336 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
WINDOW 3 32 8 Left 2
SYMATTR InstName V2
SYMATTR Value 100V
SYMBOL njf -64 16 R0
WINDOW 0 132 56 Right 2
WINDOW 3 158 82 Right 2
SYMATTR InstName J1
SYMATTR Value J201
SYMBOL voltage -192 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
WINDOW 3 32 8 Left 2
SYMATTR InstName V1
SYMATTR Value 10V
FLAG -336 48 PV
FLAG -336 128 0
FLAG -16 -64 PV
FLAG -16 112 0
FLAG -192 144 0
TEXT -376 -200 Left 2 !.tran 10ms
TEXT -376 -120 Left 2 !.include 74hc.lib
TEXT 224 -104 Left 2 ;leakage very low. even in overvoltage situation.
* Z:\home\khalils\Downloads\files\data\raw_asc\4057b12e4314_Qgate.asc
* Generated by LTspice 26.0.1 for Windows.
+ Cgdmax=1.9n Cgdmin=50p Cgs=3.1n Cjo=1n Is=5.5p
+ Rb=5.7m mfg=Siliconix Vds=30 Ron=15m Qg=60n)
B1 0 gate I=100u*(time > 0) Rpar=1G
M2 N001 gate 0 0 Si4410DY
I1 0 N001 10.
D1 N001 N002 D
V1 N002 0 15
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran .6m
.model D D(Ron=1u Roff=1T)
.options maxstep=.1u
.model Si4410DY VDMOS(Rd=3m Rs=3m Vto=2.6 Kp=60
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 5945688 13421568
WIRE 1248 -512 1248 -528
WIRE 1248 -416 1248 -432
WIRE 1376 -528 1248 -528
WIRE 1440 -528 1376 -528
WIRE 1488 -608 1488 -640
WIRE 1488 -416 1488 -512
WIRE 1648 -640 1488 -640
WIRE 1648 -560 1648 -640
WIRE 1648 -416 1648 -480
WIRE 1696 -640 1648 -640
WIRE 1808 -640 1760 -640
WIRE 1808 -560 1808 -640
WIRE 1808 -416 1808 -480
SYMBOL nmos 1440 -608 R0
WINDOW 0 52 12 Left 0
WINDOW 3 52 80 Left 0
SYMATTR InstName M2
SYMATTR Value Si4410DY
SYMBOL voltage 1808 -576 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL diode 1696 -624 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D1
SYMBOL current 1648 -480 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName I1
SYMATTR Value 10.
SYMBOL bi2 1248 -512 R0
WINDOW 3 40 42 Left 0
WINDOW 39 23 80 Left 0
SYMATTR Value I=100u*(time > 0)
SYMATTR SpiceLine Rpar=1G
SYMATTR InstName B1
FLAG 1248 -416 0
FLAG 1488 -416 0
FLAG 1808 -416 0
FLAG 1648 -416 0
FLAG 1376 -528 gate
TEXT 1064 -392 Left 0 !.tran .6m
TEXT 1064 -344 Left 0 !.model D D(Ron=1u Roff=1T)
TEXT 1064 -368 Left 0 !.options maxstep=.1u
TEXT 1064 -320 Left 0 !.model Si4410DY VDMOS(Rd=3m Rs=3m Vto=2.6 Kp=60\n+ Cgdmax=1.9n Cgdmin=50p Cgs=3.1n Cjo=1n Is=5.5p\n+ Rb=5.7m mfg=Siliconix Vds=30 Ron=15m Qg=60n)
* Z:\home\khalils\Downloads\files\data\raw_asc\fra_eg2_LT8609S.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8609S.asy)
@1 OUT OUTFB delay=150u fstart=2k fend=256k oct=3 fcoarse=4k nmax=3 pp0=200m pp1=50m f0=25k f1=100k tavgmin=50u tsettle=50u
R3 N002 0 182K
XU1 0 N001 NC_01 N003 NC_02 N002 TRSS NC_03 IN IN LT8609S ;pnba GND)SW)INTVcc)RT)SYNC)FB)TR/SS)PG)VIN)EN/UV
L1 N001 OUT 2.2 Rser=23.5m
C5 OUTFB N002 10p
C1 TRSS 0 100p
C2 OUT 0 30.43 Rser=1.9m Lser=0.3598n
V1 IN 0 24
R1 N003 0 18.2K
R2 OUTFB N002 1Meg
Rload OUT 0 2.5
.ic V(OUT)=4.9 V(TRSS)=3.3
.fra
.lib LT8609S.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1384 708
WIRE 96 -64 0 -64
WIRE 256 -64 96 -64
WIRE 0 -48 0 -64
WIRE 256 -48 256 -64
WIRE 96 0 96 -64
WIRE 112 0 96 0
WIRE 0 48 0 32
WIRE 480 192 400 192
WIRE 592 192 560 192
WIRE 800 192 592 192
WIRE 912 192 800 192
WIRE 592 208 592 192
WIRE -32 288 -48 288
WIRE 80 288 32 288
WIRE 112 288 80 288
WIRE 480 288 400 288
WIRE 592 288 592 272
WIRE 672 288 592 288
WIRE 704 288 672 288
WIRE 592 304 592 288
WIRE 704 304 704 288
WIRE 800 304 800 192
WIRE 912 304 912 192
WIRE 16 384 0 384
WIRE 112 384 96 384
WIRE 416 384 400 384
WIRE 480 384 480 288
WIRE 592 384 480 384
WIRE 704 384 704 368
WIRE 704 384 592 384
WIRE 592 400 592 384
WIRE 800 400 800 368
WIRE 912 400 912 384
WIRE 592 496 592 480
SYMBOL cap 32 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL res 576 288 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL PowerProducts\\LT8609S 256 192 R0
SYMATTR InstName U1
SYMBOL ind 464 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=23.5m
SYMBOL res 896 288 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL cap 784 304 R0
SYMATTR InstName C2
SYMATTR Value 30.43
SYMATTR SpiceLine Rser=1.9m Lser=0.3598n
SYMBOL cap 688 304 R0
SYMATTR InstName C5
SYMATTR Value 10p
SYMBOL res 576 384 R0
SYMATTR InstName R3
SYMATTR Value 182K
SYMBOL res 112 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 18.2K
SYMBOL voltage 0 -64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL fra 592 272 R0
SYMATTR InstName @1
SYMATTR SpiceLine delay=150u fstart=2k fend=256k oct=3 fcoarse=4k nmax=3 pp0=200m pp1=50m f0=25k f1=100k tavgmin=50u tsettle=50u
FLAG 0 384 0
FLAG -48 288 0
FLAG 0 48 0
FLAG 800 400 0
FLAG 592 496 0
FLAG 912 400 0
FLAG 912 192 OUT
FLAG 0 -64 IN
FLAG 416 384 0
FLAG 80 288 TRSS
FLAG 672 288 OUTFB
TEXT -24 464 Left 2 !.ic V(OUT)=4.9 V(TRSS)=3.3
TEXT -24 496 Left 2 !.fra
* Z:\home\khalils\Downloads\files\data\raw_asc\1191eb41c862_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
M1 VOUT N002 0 0 NMOS l=90n w=200n
M2 VOUT N003 0 0 NMOS l=90n w=200n
M3 N001 N002 P001 N001 PMOS l=90n w=400n
M4 P001 N003 VOUT N001 PMOS l=90n w=400n
V1 N002 0 PULSE(0 1 1n 10p 10p 2n 4n)
V2 N003 0 PULSE(0 1 1n 10p 10p 4n 8n)
V3 N001 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 8n 0 1p
.include 90nm_bulk.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 -432 288 -432
WIRE 288 -336 288 -432
WIRE 352 -336 288 -336
WIRE 288 -304 288 -336
WIRE 288 -304 272 -304
WIRE 352 -256 352 -336
WIRE 352 -256 272 -256
WIRE 80 -224 -80 -224
WIRE 224 -224 80 -224
WIRE -80 -176 -80 -224
WIRE 352 -160 352 -256
WIRE 352 -160 272 -160
WIRE 224 -64 224 -128
WIRE 224 -64 -80 -64
WIRE 272 -64 272 -112
WIRE 480 -64 272 -64
WIRE -80 0 -80 -64
WIRE 272 0 272 -64
WIRE 272 0 192 0
WIRE 384 0 272 0
WIRE 192 16 192 0
WIRE 224 16 224 -64
WIRE 272 16 224 16
WIRE 384 16 384 0
WIRE 208 64 192 64
WIRE 416 64 384 64
WIRE 80 96 80 -224
WIRE 144 96 80 96
WIRE 272 96 272 16
WIRE 336 96 272 96
WIRE 192 144 192 112
WIRE 208 144 208 64
WIRE 208 144 192 144
WIRE 288 144 208 144
WIRE 384 144 384 112
WIRE 384 144 288 144
WIRE 416 144 416 64
WIRE 416 144 384 144
WIRE 288 176 288 144
FLAG -80 -96 0
FLAG -80 80 0
FLAG 288 176 0
FLAG 416 -352 0
FLAG 480 -64 VOUT
IOPIN 480 -64 Out
SYMBOL nmos4 144 16 R0
WINDOW 123 -128 107 Left 2
SYMATTR InstName M1
SYMATTR Value2 l=90n w=200n
SYMBOL nmos4 336 16 R0
WINDOW 123 138 74 Left 2
SYMATTR InstName M2
SYMATTR Value2 l=90n w=200n
SYMBOL pmos4 224 -304 R0
WINDOW 123 143 71 Left 2
SYMATTR InstName M3
SYMATTR Value2 l=90n w=400n
SYMBOL pmos4 224 -208 R0
WINDOW 123 142 68 Left 2
SYMATTR InstName M4
SYMATTR Value2 l=90n w=400n
SYMBOL voltage -80 -192 R0
WINDOW 3 -370 89 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 1n 10p 10p 2n 4n)
SYMBOL voltage -80 -16 R0
WINDOW 3 -357 85 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 1n 10p 10p 4n 8n)
SYMBOL voltage 416 -448 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 1
TEXT -312 144 Left 2 !.tran 0 8n 0 1p
TEXT 176 -560 Left 2 !.include 90nm_bulk.txt
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3400B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3400B.asy)
R1 OUT N002 1.02Meg
Rload OUT 0 25
L1 IN N001 4.7 Rser=0.1
XU1 N001 0 N002 IN OUT IN LTC3400B ;pnba SW)GND)FB)_SHDN)Vout)Vin
C1 OUT 0 4.7
R2 N002 0 604K
V1 IN 0 1.4
.tran 200u startup
.lib LTC3400B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2552 1624
WIRE 1696 1120 1600 1120
WIRE 1872 1120 1696 1120
WIRE 1920 1120 1872 1120
WIRE 2064 1120 2000 1120
WIRE 1600 1152 1600 1120
WIRE 1872 1184 1872 1120
WIRE 1600 1248 1600 1232
WIRE 2064 1248 2064 1120
WIRE 2064 1248 2016 1248
WIRE 1696 1328 1696 1120
WIRE 1728 1328 1696 1328
WIRE 2080 1328 2016 1328
WIRE 2240 1328 2080 1328
WIRE 2336 1328 2240 1328
WIRE 2336 1344 2336 1328
WIRE 2240 1360 2240 1328
WIRE 2080 1408 2016 1408
WIRE 2080 1424 2080 1408
WIRE 2240 1440 2240 1424
WIRE 2336 1440 2336 1424
WIRE 1872 1488 1872 1472
WIRE 2080 1520 2080 1504
SYMBOL cap 2224 1360 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL ind 1904 1136 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=0.1
SYMBOL RES 2064 1312 R0
SYMATTR InstName R1
SYMATTR Value 1.02Meg
SYMBOL res 2064 1408 R0
SYMATTR InstName R2
SYMATTR Value 604K
SYMBOL RES 2320 1328 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL PowerProducts\\LTC3400B 1872 1328 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1600 1136 R0
SYMATTR InstName V1
SYMATTR Value 1.4
FLAG 1872 1488 0
FLAG 2080 1520 0
FLAG 1600 1248 0
FLAG 2240 1440 0
FLAG 2336 1440 0
FLAG 2336 1328 OUT
FLAG 1600 1120 IN
TEXT 2176 1504 Left 2 !.tran 200u startup
* Z:\tmp\asc_dec_bjh7r6w2\049d30d04b43_AD8642_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 12
R1 N001 0 10K
R2 OUT N001 10K
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 176 -1152 176 -1168
WIRE 288 -1152 288 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 176 -1056 176 -1072
WIRE 288 -1056 288 -1072
WIRE 576 -1056 576 -1072
SYMBOL voltage 176 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 576 -1056 -V
FLAG 416 -1232 0
FLAG 176 -1168 +V
FLAG 288 -1168 -V
FLAG 288 -1056 0
FLAG 176 -1056 0