Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG722.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
VS N001 0 3
V4 N003 0 PULSE(0 3 0 10n 10n 980n 2u)
R1 N002 0 300
C1 N002 0 35p
XU1 N003 N002 N001 0 +V ADG722 ;pnba IN)D)S)GND)Vdd
.tran 10u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG722.asy)
.lib ADG722.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -368 -16 -400 -16
WIRE -240 -16 -288 -16
WIRE 0 -16 -48 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE -480 32 -480 16
WIRE 112 32 112 -16
WIRE -240 48 -368 48
WIRE -368 112 -368 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -480 128 -480 112
WIRE -144 176 -144 160
WIRE -368 272 -368 192
FLAG -480 128 0
FLAG -480 16 +V
FLAG -400 -16 0
FLAG -144 -112 +V
FLAG -144 176 0
FLAG -368 272 0
FLAG 0 112 0
FLAG 112 112 0
SYMBOL voltage -480 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -272 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL voltage -368 96 R0
WINDOW 3 17 129 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 10n 10n 980n 2u)
SYMATTR InstName V4
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL ADG722 -144 32 R0
SYMATTR InstName U1
TEXT -536 200 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\4e7c306b09d6_IE_Tut1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 1k
V1 N001 0 SINE(0 5.7 50)
V2 P001 0 5
D2 N002 P001 1N4148
D1 0 N002 BZX84C10L
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100ms
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 256 64 112 64
WIRE 496 64 336 64
WIRE 736 64 496 64
WIRE 736 112 736 64
WIRE 112 144 112 64
WIRE 496 160 496 64
WIRE 112 320 112 224
WIRE 496 320 496 224
WIRE 496 320 112 320
WIRE 736 320 736 256
WIRE 736 320 496 320
SYMBOL diode 480 224 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BZX84C10L
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage 112 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5.7 50)
SYMBOL res 352 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 720 112 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL voltage 736 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
FLAG 496 320 0
TEXT 72 336 Left 2 !.tran 100ms
* Z:\home\khalils\Downloads\files\data\raw_asc\0e09fff953b6_rtl.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 5
R1 N003 N002 470k
R2 Vo N001 10k
V1 N002 0 5
Q1 Vo N003 0 0 BC547C
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 -16 -176 -16
WIRE 240 0 240 -16
WIRE 400 80 240 80
WIRE 240 96 240 80
WIRE 80 144 16 144
WIRE 176 144 160 144
WIRE -176 208 -176 -16
WIRE 16 208 16 144
WIRE -176 320 -176 288
WIRE 16 320 16 288
WIRE 240 320 240 192
SYMBOL res 176 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 470k
SYMBOL res 256 96 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL voltage 16 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -176 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL npn 176 96 R0
SYMATTR InstName Q1
SYMATTR Value BC547C
FLAG -176 320 0
FLAG 16 320 0
FLAG 240 320 0
FLAG 400 80 Vo
TEXT -210 344 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\3db4a37660dc_1013D.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
R1 N002 N001 50K
R2 N001 0 5K
V3 N003 0 sine(0 .5 10K)
V2 -V 0 -15
XU1 N003 N001 +V -V N002 LT1013 ;pnba In+)In-)V+)V-)OUT
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1013D.asy)
.lib LT1013.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 680
WIRE 192 0 176 0
WIRE 288 0 272 0
WIRE 352 0 288 0
WIRE 448 0 432 0
WIRE -80 64 -80 48
WIRE 32 64 32 48
WIRE 336 96 336 80
WIRE 288 112 288 0
WIRE 304 112 288 112
WIRE 448 128 448 0
WIRE 448 128 368 128
WIRE 304 144 160 144
WIRE -80 160 -80 144
WIRE 32 160 32 144
WIRE 160 160 160 144
WIRE 336 176 336 160
WIRE 160 256 160 240
FLAG -80 160 0
FLAG 336 80 +V
FLAG -80 48 +V
FLAG 176 0 0
FLAG 160 256 0
FLAG 32 160 0
FLAG 32 48 -V
FLAG 336 176 -V
SYMBOL voltage -80 48 R0
WINDOW 39 24 125 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 448 -16 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 50K
SYMBOL res 288 -16 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 5K
SYMBOL voltage 160 144 R0
SYMATTR InstName V3
SYMATTR Value sine(0 .5 10K)
SYMBOL voltage 32 48 R0
WINDOW 39 24 125 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL opamps\\LT1013D 336 64 R0
SYMATTR InstName U1
TEXT 384 240 Left 0 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1762-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1762-3.3.asy)
Rload OUT 0 500
V1 IN 0 PWL(0 0 1 10)
C2 OUT N001 .01
C1 OUT 0 10
XU1 OUT OUT N001 0 IN MP_01 MP_02 IN LT1762-3.3 ;pnba OUT)SENSE)BYP)GND)_SHDN)))IN
.tran 1
.lib LT1762.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 32 304 32
WIRE 352 32 320 32
WIRE 432 32 352 32
WIRE 528 32 432 32
WIRE 0 48 -208 48
WIRE 16 48 0 48
WIRE 432 48 432 32
WIRE 528 48 528 32
WIRE -208 64 -208 48
WIRE 352 64 352 32
WIRE 320 96 320 32
WIRE 320 96 304 96
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 432 144 432 112
WIRE 528 144 528 128
WIRE -208 160 -208 144
WIRE 352 160 352 128
WIRE 352 160 304 160
WIRE 160 240 160 208
SYMBOL cap 416 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LT1762-3.3 160 96 R0
SYMATTR InstName U1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 336 64 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value 500
FLAG -208 160 0
FLAG 432 144 0
FLAG 528 144 0
FLAG 160 240 0
FLAG -208 48 IN
FLAG 528 32 OUT
TEXT 368 216 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3528-2.asc
* Generated by LTspice 26.0.1 for Windows.
L1 IN N001 2.2 Rpar=5K
V1 IN 0 2
R1 OUT N002 499K
R2 N002 0 287K
C1 OUT 0 10 Rser=1m
Rload OUT 0 8.25
XU1 IN N002 NC_01 OUT N001 0 0 IN LTC3528-2 ;pnba _SHDN)FB)Pgood)Vout)SW)PGND)SGND)Vin
C2 OUT N002 68p
.tran .5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3528-2.asy)
.lib LTC3528-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 80 -96 80
WIRE 64 80 -32 80
WIRE 96 80 64 80
WIRE 192 80 176 80
WIRE -96 96 -96 80
WIRE 64 128 64 80
WIRE 192 128 192 80
WIRE -96 192 -96 176
WIRE -32 208 -32 80
WIRE -16 208 -32 208
WIRE 320 208 272 208
WIRE 416 208 320 208
WIRE 528 208 416 208
WIRE 608 208 528 208
WIRE 320 224 320 208
WIRE 416 224 416 208
WIRE 528 224 528 208
WIRE 608 224 608 208
WIRE 320 320 320 304
WIRE 320 320 272 320
WIRE 416 320 416 288
WIRE 416 320 320 320
WIRE 528 320 528 288
WIRE 608 320 608 304
WIRE 320 336 320 320
WIRE 64 416 64 400
WIRE 192 416 192 400
WIRE 320 432 320 416
FLAG -96 192 0
FLAG 64 416 0
FLAG 320 432 0
FLAG 528 320 0
FLAG 608 320 0
FLAG 192 416 0
FLAG 608 208 OUT
FLAG -96 80 IN
SYMBOL ind 80 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rpar=5K
SYMBOL voltage -96 80 R0
WINDOW 0 20 15 Left 2
WINDOW 3 25 97 Left 2
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL res 304 208 R0
SYMATTR InstName R1
SYMATTR Value 499K
SYMBOL res 304 320 R0
SYMATTR InstName R2
SYMATTR Value 287K
SYMBOL cap 512 224 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=1m
SYMBOL res 592 208 R0
SYMATTR InstName Rload
SYMATTR Value 8.25
SYMBOL LTC3528-2 128 272 R0
SYMATTR InstName U1
SYMBOL cap 400 224 R0
SYMATTR InstName C2
SYMATTR Value 68p
TEXT 456 392 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\02d26cdcd9ac_transformer_core.asc
* Generated by LTspice 26.0.1 for Windows.
K1 Lp Ls {kps}
Ls s1 s2 {Ls}
Lp p1 p2 {Lp}
.param kps 1
.param Lp 100u
.param Ls 10u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 80 112 80
WIRE 272 80 224 80
WIRE 160 96 160 80
WIRE 224 96 224 80
WIRE 160 176 112 176
WIRE 272 176 224 176
SYMBOL ind2 208 80 R0
SYMATTR InstName Ls
SYMATTR Value {Ls}
SYMATTR Type ind
SYMBOL ind2 144 80 R0
SYMATTR InstName Lp
SYMATTR Value {Lp}
SYMATTR Type ind
FLAG 112 80 p1
FLAG 112 176 p2
FLAG 272 80 s1
FLAG 272 176 s2
TEXT 104 224 Left 2 !.param kps 1
TEXT 104 264 Left 2 !.param Lp 100u
TEXT 104 296 Left 2 !.param Ls 10u
TEXT 136 48 Left 2 !K1 Lp Ls {kps}
* Z:\home\khalils\Downloads\files\data\raw_asc\27765a98e6c6_non_inverter.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp1.asy)
V3 0 N005 5
R1 N001 0 1k
XU2 N004 N001 N003 N005 N002 level1 Avol=1Meg GBW=120Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 N004 0 AC 1
V2 N003 0 5
R2 N002 N001 10k
.ac dec 1000 1e6 5e9
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -112 160 -112
WIRE 480 -112 352 -112
WIRE 368 32 304 32
WIRE 0 64 -96 64
WIRE 112 64 80 64
WIRE 160 64 160 -112
WIRE 160 64 112 64
WIRE 304 64 304 32
WIRE 368 64 368 32
WIRE -96 96 -96 64
WIRE 304 192 304 144
WIRE 112 208 112 64
WIRE 272 208 112 208
WIRE 480 224 480 -112
WIRE 480 224 336 224
WIRE 560 224 480 224
WIRE 272 240 -48 240
WIRE -48 272 -48 240
WIRE 304 352 304 256
WIRE -48 416 -48 352
WIRE 304 480 304 432
SYMBOL voltage -48 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value AC 1
SYMBOL voltage 304 160 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 304 448 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL OpAmps\\UniversalOpAmp1 304 224 R0
SYMATTR InstName U2
SYMATTR Value2 Avol=1Meg GBW=120Meg Vos=0
SYMBOL res 96 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 368 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
FLAG 304 480 0
FLAG 368 64 0
FLAG -48 416 0
FLAG -96 96 0
TEXT -128 504 Left 2 !.ac dec 1000 1e6 5e9
* Z:\tmp\asc_dec_bjh7r6w2\05029b8982e9_ACAnalysis_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
VIN IN N001 SINE(0 1.55 3.9) AC 1
V2 Vp 0 5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 5196 728
WIRE 0 32 0 0
WIRE 128 32 128 0
WIRE 0 144 0 112
WIRE 128 144 128 112
WIRE 272 144 272 112
WIRE 432 208 304 208
WIRE 608 208 432 208
WIRE 304 352 304 208
WIRE 304 544 304 432
SYMBOL voltage 304 336 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
* Put Input Sine Values from design here
SYMATTR Value2 AC 1
SYMATTR InstName VIN
SYMATTR Value SINE(0 1.55 3.9)
SYMBOL voltage 0 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
* Put Vp value from design here
SYMATTR Value 5
FLAG 0 144 0
FLAG 128 144 0
FLAG 0 0 Vp
FLAG 128 0 Vn
FLAG 272 144 0
FLAG 432 208 IN
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2941-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2941-1.asy)
XU1 N001 0 N004 N005 N003 N002 LTC2941-1 B_Reg=60 CD_Reg=32767 EF_Reg=65535 GH_Reg=0 EF_Reg=65535 GH_Reg=0 ;pnba Sense+)GND)StatusReg)ACRreg)_AL/CC)Sense-
R1 N001 N003 10K
V2 N002 0 PULSE(3.9 3.5 1s 10m 10m 1 2)
Vbatt N001 0 3.7
.tran 5
.lib LTC2941-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1432 680
WIRE 64 -96 -48 -96
WIRE 832 -96 64 -96
WIRE -48 -80 -48 -96
WIRE 832 -48 832 -96
WIRE -48 16 -48 0
WIRE 64 16 64 -96
WIRE 96 16 64 16
WIRE 576 16 416 16
WIRE 720 16 656 16
WIRE 96 112 80 112
WIRE 832 112 832 32
WIRE 832 112 416 112
WIRE 96 208 80 208
WIRE 432 208 416 208
SYMBOL LTC2941-1 256 112 R0
SYMATTR InstName U1
SYMATTR Value B_Reg=60 CD_Reg=32767
SYMBOL voltage 560 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value PULSE(3.9 3.5 1s 10m 10m 1 2)
SYMBOL voltage -48 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vbatt
SYMATTR Value 3.7
SYMBOL res 816 -64 R0
SYMATTR InstName R1
SYMATTR Value 10K
FLAG -48 16 0
FLAG 80 112 0
FLAG 720 16 0
TEXT 600 272 Left 2 !.tran 5
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP172-0.9.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP172-0.9.asy)
C1 OUT 0 1
XU1 OUT IN IN 0 ADP172-0.9 ;pnba Vout)Vin)En)GND
V1 IN 0 3.6
RLOAD OUT 0 3
.tran 2m startup
.lib ADP172-0.9.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 80 -48 80
WIRE 48 80 -32 80
WIRE 64 80 48 80
WIRE 304 80 256 80
WIRE 336 80 304 80
WIRE 384 80 336 80
WIRE -48 96 -48 80
WIRE 304 96 304 80
WIRE 304 176 304 160
WIRE 384 176 384 160
WIRE -48 192 -48 176
WIRE 48 192 48 80
WIRE 64 192 48 192
WIRE 272 192 256 192
SYMBOL voltage -48 80 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL cap 288 96 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 368 64 R0
SYMATTR InstName RLOAD
SYMATTR Value 3
SYMBOL ADP172-0.9 160 192 R0
SYMATTR InstName U1
FLAG -48 192 0
FLAG 304 176 0
FLAG 272 192 0
FLAG 384 176 0
FLAG -32 80 IN
FLAG 336 80 OUT
TEXT 160 256 Center 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1959.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
C1 N004 0 1500p
C2 OUT 0 100 Rser=50m
L1 N003 OUT 5
C3 N001 N003 .68
R1 OUT N005 1.21K
R2 N005 0 2.49K
D1 OUT N001 1N914
D2 0 N003 MBRS340
Rload OUT 0 .5
XU1 IN N001 N005 0 N004 N002 N006 N003 LT1959 ;pnba VIN)Boost)FB)GND)VC)_SHDN)SYNC)SW
V2 N006 0 PULSE(0 1.6 10n 10n 10n .5u 1.5u)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1959.asy)
.lib LT1959.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2856 1568
WIRE 1840 1088 1664 1088
WIRE 2144 1088 2000 1088
WIRE 2224 1088 2144 1088
WIRE 2336 1088 2288 1088
WIRE 1664 1104 1664 1088
WIRE 1840 1120 1840 1088
WIRE 2000 1120 2000 1088
WIRE 2144 1136 2144 1088
WIRE 1664 1200 1664 1184
WIRE 1760 1216 1744 1216
WIRE 2144 1216 2144 1200
WIRE 2144 1216 2080 1216
WIRE 2224 1216 2144 1216
WIRE 2336 1216 2336 1088
WIRE 2336 1216 2304 1216
WIRE 2464 1216 2336 1216
WIRE 2592 1216 2464 1216
WIRE 2144 1232 2144 1216
WIRE 2336 1232 2336 1216
WIRE 2464 1232 2464 1216
WIRE 2592 1232 2592 1216
WIRE 2144 1312 2144 1296
WIRE 2464 1328 2464 1296
WIRE 2592 1328 2592 1312
WIRE 1680 1344 1664 1344
WIRE 1760 1344 1744 1344
WIRE 2336 1344 2336 1312
WIRE 2336 1344 2080 1344
WIRE 2336 1376 2336 1344
WIRE 2000 1456 2000 1440
WIRE 2336 1472 2336 1456
WIRE 1712 1504 1680 1504
WIRE 1840 1504 1840 1440
WIRE 1840 1504 1792 1504
FLAG 2464 1328 0
FLAG 2336 1472 0
FLAG 2000 1456 0
FLAG 1664 1344 0
FLAG 1664 1200 0
FLAG 2592 1328 0
FLAG 2144 1312 0
FLAG 2592 1216 OUT
FLAG 1664 1088 IN
FLAG 1680 1504 0
SYMBOL VOLTAGE 1664 1088 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 1744 1328 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1500p
SYMBOL polcap 2448 1232 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=50m
SYMBOL ind 2208 1232 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 5
SYMBOL cap 2128 1136 R0
SYMATTR InstName C3
SYMATTR Value .68
SYMBOL RES 2320 1216 R0
SYMATTR InstName R1
SYMATTR Value 1.21K
SYMBOL res 2320 1360 R0
SYMATTR InstName R2
SYMATTR Value 2.49K
SYMBOL diode 2288 1072 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL schottky 2128 1296 M180
WINDOW 0 30 65 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value MBRS340
SYMBOL res 2576 1216 R0
SYMATTR InstName Rload
SYMATTR Value .5
SYMBOL LT1959 1920 1280 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1808 1504 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1.6 10n 10n 10n .5u 1.5u)
TEXT 2456 1408 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1305462424bb_INV.asc
* Generated by LTspice 26.0.1 for Windows.
D3 N001 N002 1N4148
R2 V+ I 470
Q1 /Q N002 0 0 BC847B
D2 I N001 1N4148
D1 N002 /Q BAT54
R1 V+ /Q 150
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 64 16 48
WIRE 352 64 16 64
WIRE 16 176 16 144
WIRE 16 176 -48 176
WIRE 48 176 16 176
WIRE 128 176 112 176
WIRE 208 176 192 176
WIRE 224 176 208 176
WIRE 352 176 352 144
WIRE 352 176 288 176
WIRE 352 192 352 176
WIRE 432 192 352 192
WIRE 352 208 352 192
WIRE 208 256 208 176
WIRE 288 256 208 256
IOPIN 432 192 Out
IOPIN 16 48 In
IOPIN -48 176 In
SYMBOL res 336 48 R0
SYMATTR InstName R1
SYMATTR Value 150
SYMBOL schottky 224 192 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 0 48 R0
SYMATTR InstName R2
SYMATTR Value 470
SYMBOL diode 128 160 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL diode 48 160 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL npn 288 208 R0
SYMATTR InstName Q1
SYMATTR Value BC847B
FLAG 352 304 0
FLAG 432 192 /Q
FLAG 16 48 V+
FLAG -48 176 I
* Z:\home\khalils\Downloads\files\data\raw_asc\21b43b6ab311_Delay_sT_Tline_Delay.asc
* Generated by LTspice 26.0.1 for Windows.
* .tran 100u
* .optons plotwinsize=0
* Delay Functions
* Not working in for .AC analysis
E1 N001 0 IN 0 1
T1 N001 0 N002 0 Td={TS} Z0=50
R1 N002 0 50
V1 IN 0 SINE(0 1 100k 0 10k 0) AC 1
B1 OUT 0 V=V(IN) LAPLACE(exp(-s*{TS}))
E2 OUTZ 0 N002 0 1
B2 OUTD 0 V=delay(V(IN), {TS})
.param TS=1u
.ac dec 100 1k 10meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 900
WIRE -16 224 -80 224
WIRE 624 224 256 224
WIRE -80 256 -80 224
WIRE 256 256 256 224
WIRE -80 368 -80 336
WIRE 256 368 256 336
WIRE 368 496 240 496
WIRE 576 496 464 496
WIRE 656 496 576 496
WIRE 768 496 704 496
WIRE 240 512 240 496
WIRE 576 512 576 496
WIRE 704 512 704 496
WIRE 192 528 144 528
WIRE 368 528 352 528
WIRE 480 528 464 528
WIRE 656 528 656 496
WIRE 192 608 192 576
WIRE 240 608 240 592
WIRE 576 608 576 592
WIRE 656 608 656 576
WIRE 704 608 704 592
WIRE 624 736 256 736
WIRE 256 768 256 736
WIRE 256 880 256 848
IOPIN -16 224 In
IOPIN 624 224 Out
IOPIN 624 736 Out
SYMBOL e 704 496 R0
SYMATTR InstName E2
SYMATTR Value 1
SYMBOL tline 416 512 R0
SYMATTR InstName T1
SYMATTR Value Td={TS} Z0=50
SYMBOL e 240 496 R0
SYMATTR InstName E1
SYMATTR Value 1
SYMBOL voltage -80 240 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 100k 0 10k 0)
SYMATTR Value2 AC 1
SYMBOL res 560 496 R0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL bv 256 240 R0
SYMATTR InstName B1
SYMATTR Value V=V(IN)   LAPLACE(exp(-s*{TS}))
SYMBOL bv 256 752 R0
SYMATTR InstName B2
SYMATTR Value V=delay(V(IN), {TS})
FLAG 256 368 0
FLAG -16 224 IN
FLAG 624 224 OUT
FLAG -80 368 0
FLAG 576 608 0
FLAG 352 528 0
FLAG 480 528 0
FLAG 240 608 0
FLAG 192 608 0
FLAG 704 608 0
FLAG 656 608 0
FLAG 768 496 OUTZ
FLAG 144 528 IN
FLAG 256 880 0
FLAG 624 736 OUTD
TEXT -88 40 Left 0 !.param TS=1u
TEXT -88 80 Left 0 !.ac dec 100 1k 10meg
TEXT -88 120 Left 0 ;.tran 100u
TEXT -88 152 Left 0 ;.optons plotwinsize=0
TEXT 280 56 Left 0 ;Delay Functions
TEXT 376 792 Left 0 ;Not working in for .AC analysis
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1411.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input\nPin capacitance and Qinj not included\nParameter performance modeled at 15V supply\nOny one channel is modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1411.asy)
V3 v+ 0 15
C1 vD 0 36p
V1 vS 0 SINE(0 5 20)
R1 vD 0 301
V2 vIN 0 PULSE(0 2.5 20n 20n 20n 150m 300m)
XU1 vIN vS vD v- v+ 0 ADG1411 ;pnba IN)S)D)Vss)Vdd)GND
V4 v- 0 -15
.tran 1
.lib ADG1411.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 832
WIRE 256 112 240 112
WIRE 240 144 240 112
WIRE -80 224 -112 224
WIRE 112 224 0 224
WIRE 144 224 112 224
WIRE 368 224 336 224
WIRE 416 224 368 224
WIRE 528 224 416 224
WIRE 416 256 416 224
WIRE 528 256 528 224
WIRE 112 288 48 288
WIRE 144 288 112 288
WIRE -272 304 -288 304
WIRE -176 304 -192 304
WIRE -288 336 -288 304
WIRE -192 336 -192 304
WIRE 48 336 48 288
WIRE 416 352 416 336
WIRE 528 352 528 320
WIRE 304 416 304 400
WIRE 176 432 176 400
WIRE 192 432 176 432
WIRE -288 464 -288 416
WIRE -192 464 -192 416
WIRE 48 464 48 416
SYMBOL res 400 240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL cap 512 256 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage 48 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 30 177 Left 2
SYMATTR Value PULSE(0 2.5 20n 20n 20n 150m 300m)
SYMATTR InstName V2
SYMBOL voltage -192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -15
SYMBOL voltage -288 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL voltage 16 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 20)
SYMBOL ADG1411 240 272 R0
SYMATTR InstName U1
FLAG -112 224 0
FLAG 48 464 0
FLAG 416 352 0
FLAG 304 416 0
FLAG 368 224 vD
FLAG 112 224 vS
FLAG 112 288 vIN
FLAG 528 352 0
FLAG -272 304 v+
FLAG 256 112 v+
FLAG -288 464 0
FLAG -192 464 0
FLAG -176 304 v-
FLAG 192 432 v-
TEXT 80 528 Left 2 !.tran 1
TEXT -360 -40 Left 2 ;Note:\nSwitch shown for a logic 0 input\nPin capacitance and Qinj not included\nParameter performance modeled at 15V supply\nOny one channel is modeled