Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\32ed723b3b0b_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N001 Vcc Vee Vout LT1001 ;pnba In+)In-)V+)V-)OUT
V1 Vcc 0 9
V2 0 Vee 9
R1 N001 N002 1k
C1 Vout N001 100n
V3 N002 0 V
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -304 64 -336 64
WIRE -288 64 -304 64
WIRE 192 64 128 64
WIRE 368 64 256 64
WIRE -336 112 -336 64
WIRE 224 144 208 144
WIRE 208 160 208 144
WIRE 0 176 -80 176
WIRE 128 176 128 64
WIRE 128 176 80 176
WIRE 176 176 128 176
WIRE -80 192 -80 176
WIRE 368 192 368 64
WIRE 368 192 240 192
WIRE 400 192 368 192
WIRE 432 192 400 192
WIRE -336 208 -336 192
WIRE -240 208 -336 208
WIRE 176 208 144 208
WIRE -240 224 -240 208
WIRE -336 240 -336 208
WIRE 144 240 144 208
WIRE 208 272 208 224
WIRE 224 272 208 272
WIRE -80 288 -80 272
WIRE -336 384 -336 320
WIRE -288 384 -336 384
WIRE -272 384 -288 384
FLAG -304 64 Vcc
FLAG -288 384 Vee
FLAG -240 224 0
FLAG 208 144 Vcc
FLAG 208 272 Vee
FLAG 144 240 0
FLAG 400 192 Vout
FLAG -80 288 0
SYMBOL OpAmps\\LT1001 208 128 R0
SYMATTR InstName U1
SYMBOL voltage -336 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL voltage -336 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 9
SYMBOL res 96 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL cap 256 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL voltage -80 176 R0
SYMATTR InstName V3
* Z:\home\khalils\Downloads\files\data\raw_asc\173e5527c65f_scheme8.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 SINE(0 12.727922 79.577 0 0 0 0)
R1 0 N001 25
L1 0 N001 2.68m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 448 -32 400 -32
WIRE 560 -32 528 -32
WIRE 400 16 400 -32
WIRE 400 16 176 16
WIRE 560 16 560 -32
WIRE 656 16 560 16
WIRE 400 80 400 16
WIRE 448 80 400 80
WIRE 560 80 560 16
WIRE 560 80 528 80
WIRE 176 208 176 16
WIRE 176 320 176 288
WIRE 656 320 656 16
WIRE 656 320 176 320
WIRE 176 352 176 320
SYMBOL voltage 176 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 12.727922 79.577 0 0 0 0)
SYMBOL res 544 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 25
SYMBOL ind 544 64 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value 2.68m
FLAG 176 352 0
* Z:\home\khalils\Downloads\files\data\raw_asc\39e86ca57ff0_TPMOS2.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N002 0 0
V1 N001 0 40V
M1 N001 N002 0 0 BS170
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model BS170 VDMOS(Rg=1.3 Vto=2 Rd=1.436 Rb=2.51m Kp=1.233m Lambda=0.0 Cgdmin=0.25n Cgdmax=7n Cgs=2.8n Cjo=1.89n VJ=.4519 Vds=30 Ron=8m Is=125f N=1.023 Rs=1.281 M=.3423 mfg=Alpha_&_Omega Qg=18n Tt=161.6n)
.dc V1 0 40 0.01 V2 list 0 1 2 3 4 5 6 7 8 9
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2388 680
WIRE 80 96 -96 96
WIRE -96 176 -96 96
WIRE 80 192 80 96
WIRE -144 256 -304 256
WIRE -304 304 -304 256
WIRE -304 432 -304 384
WIRE -96 432 -96 272
WIRE 80 432 80 272
SYMBOL voltage 80 176 R0
SYMATTR InstName V1
SYMATTR Value 40V
SYMBOL nmos -144 176 R0
SYMATTR InstName M1
SYMATTR Value BS170
SYMBOL voltage -304 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
FLAG -304 432 0
FLAG -96 432 0
FLAG 80 432 0
TEXT -432 496 Left 2 !.model BS170 VDMOS(Rg=1.3 Vto=2 Rd=1.436 Rb=2.51m Kp=1.233m Lambda=0.0 Cgdmin=0.25n Cgdmax=7n Cgs=2.8n Cjo=1.89n VJ=.4519 Vds=30 Ron=8m Is=125f N=1.023 Rs=1.281 M=.3423 mfg=Alpha_&_Omega Qg=18n Tt=161.6n)
TEXT -352 64 Left 2 !.dc V1 0 40 0.01 V2 list 0 1 2 3 4 5 6 7 8 9
* Z:\tmp\asc_dec_bjh7r6w2\0ffc6f457131_p6_instance_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
Cb2 Vout_bpf2 N004 {Cb}
R33b N004 0 {R33b}
R11a N001 N002 {R11a}
R22b Vout_bpf2 N005 {R22b}
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1460 960
WIRE 80 -96 -112 -96
WIRE -224 112 -256 112
WIRE -112 112 -112 -96
WIRE -112 112 -144 112
WIRE -48 112 -112 112
WIRE 96 112 16 112
WIRE -112 144 -112 112
WIRE -112 240 -112 224
WIRE -256 352 -256 112
WIRE 80 400 -112 400
WIRE 432 400 144 400
WIRE 208 480 96 480
WIRE 432 480 432 400
WIRE 432 480 288 480
WIRE -256 608 -256 352
WIRE -224 608 -256 608
WIRE -112 608 -112 400
WIRE -112 608 -144 608
WIRE -48 608 -112 608
WIRE 96 608 96 480
WIRE 96 608 16 608
WIRE 192 608 96 608
WIRE 432 624 432 480
WIRE 432 624 256 624
WIRE 496 624 432 624
WIRE -112 640 -112 608
WIRE 192 640 160 640
WIRE -112 736 -112 720
SYMBOL cap 144 384 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName Cb2
SYMATTR Value {Cb}
SYMBOL res -128 624 R0
SYMATTR InstName R33b
SYMATTR Value {R33b}
SYMBOL res -128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R11a
SYMATTR Value {R11a}
SYMBOL res 304 464 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R22b
SYMATTR Value {R22b}
FLAG -112 240 0
FLAG 496 624 Vout_bpf2
FLAG 160 640 Vcm
FLAG -112 736 0
FLAG 224 656 Vcc
FLAG 224 592 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1764-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1764-1.2.asy)
C4 OUT 0 10
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1764 Radj=8026.76 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
R1 OUT 0 .6
C1 N004 0 1
C3 N002 0 1
C2 N003 0 10n
R2 N001 IN 50K
V1 IN 0 1.5
.tran 1m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value .6
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL ADP1764-1.2 224 176 R0
SYMATTR InstName U1
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 504 280 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG711.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 1 input\nParameter performance modeled at 5V single supply\nOny one channel is modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG711.asy)
XU1 v+ vS vD vIN 0 ADG711 ;pnba Vdd)S)D)IN)GND
C1 vD 0 36p
V3 v+ 0 5
R1 vD 0 301
V1 vS 0 3
V2 vIN 0 PULSE(0 3 0 10n 10n 980n 2u)
.tran 10u
.lib ADG711.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 832
WIRE 256 112 240 112
WIRE 240 160 240 112
WIRE -80 224 -112 224
WIRE 112 224 0 224
WIRE 144 224 112 224
WIRE 384 224 336 224
WIRE 464 224 384 224
WIRE 576 224 464 224
WIRE 464 256 464 224
WIRE 576 256 576 224
WIRE 112 288 48 288
WIRE 144 288 112 288
WIRE -176 304 -192 304
WIRE -192 336 -192 304
WIRE 48 336 48 288
WIRE 464 352 464 336
WIRE 576 352 576 320
WIRE 240 432 240 400
WIRE -192 464 -192 416
WIRE 48 464 48 416
SYMBOL voltage 16 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res 448 240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL ADG711 240 272 R0
SYMATTR InstName U1
SYMBOL voltage 48 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 30 177 Left 2
SYMATTR Value PULSE(0 3 0 10n 10n 980n 2u)
SYMATTR InstName V2
SYMBOL voltage -192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL cap 560 256 R0
SYMATTR InstName C1
SYMATTR Value 36p
FLAG -112 224 0
FLAG 48 464 0
FLAG 464 352 0
FLAG 240 432 0
FLAG 384 224 vD
FLAG 112 224 vS
FLAG 112 288 vIN
FLAG 576 352 0
FLAG -192 304 v+
FLAG 240 112 v+
FLAG -192 464 0
TEXT 336 424 Left 2 !.tran 10u
TEXT -360 -16 Left 2 ;Note:\nSwitch shown for a logic 1 input\nParameter performance modeled at 5V single supply\nOny one channel is modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\3f9323b67e77_damp.asc
* Generated by LTspice 26.0.1 for Windows.
R2 OUT N002 20k tol=5
V3 N001 N004 SINE(0 10m 1k)
V1 V+ 0 15
R1 N002 N001 999 tol=5
R3 0 N003 19.99k tol=5
VOffset N001 0 7.5
R4 N003 N004 1k tol=5
XU2 N003 N002 V+ V- OUT UA741 ;pnba In+)In-)V+)V-)OUT
V2 0 V- 15
.include UA741.txt
.dc VOffset 0 10 0.001
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -192 -784 -288 -784
WIRE -288 -768 -288 -784
WIRE -288 -752 -288 -768
WIRE -192 -640 -192 -704
WIRE -96 -640 -112 -640
WIRE -32 -640 -96 -640
WIRE 224 -624 224 -640
WIRE 224 -608 224 -624
WIRE -192 -576 -192 -640
WIRE -96 -544 -96 -640
WIRE -64 -544 -96 -544
WIRE 48 -528 48 -640
WIRE 48 -528 0 -528
WIRE -64 -512 -96 -512
WIRE 224 -512 224 -528
WIRE 224 -512 176 -512
WIRE 176 -496 176 -512
WIRE 224 -480 224 -512
WIRE -192 -432 -192 -496
WIRE -96 -432 -96 -512
WIRE -96 -432 -112 -432
WIRE -32 -432 -96 -432
WIRE 48 -384 48 -432
WIRE 224 -384 224 -400
WIRE 224 -368 224 -384
SYMBOL res 64 -656 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 20k
SYMATTR SpiceLine tol=5
SYMBOL res -96 -448 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1k
SYMATTR SpiceLine tol=5
SYMBOL Opamps\\opamp2 -32 -592 R0
SYMATTR InstName U2
SYMATTR Value UA741
SYMBOL res 64 -448 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 19.99k
SYMATTR SpiceLine tol=5
SYMBOL voltage -192 -688 R180
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VOffset
SYMATTR Value 7.5
SYMBOL voltage 224 -496 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage 224 -624 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res -96 -656 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 999
SYMATTR SpiceLine tol=5
SYMBOL voltage -192 -592 R0
WINDOW 3 -178 105 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 10m 1k)
SYMATTR InstName V3
FLAG 176 -496 0
FLAG 224 -624 V+
FLAG 224 -384 V-
FLAG 48 -528 OUT
FLAG -32 -560 V+
FLAG -32 -496 V-
FLAG 48 -384 0
FLAG -288 -768 0
TEXT 56 -800 Left 2 !.include UA741.txt
TEXT -376 -328 Left 2 !.dc VOffset 0 10 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1550LCS8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1550LCS8.asy)
V1 IN 0 4.5
C1 N002 0 .1
R2 0 N001 1K
C3 OUT 0 10
Rload OUT 0 1K
C2 N004 N003 .1
R1 N001 OUT 3K
XU1 IN IN N003 OUT N004 0 N002 N001 LTC1550LCS8 ;pnba _SHDN)Vin)C+)Vout)C-)GND)CPout)ADJ
.tran .5m startup
.lib LTC1550LCS8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1600 1220
WIRE 576 720 144 720
WIRE 592 720 576 720
WIRE 688 720 672 720
WIRE 208 784 32 784
WIRE 240 784 208 784
WIRE 576 784 576 720
WIRE 576 784 528 784
WIRE 32 800 32 784
WIRE 144 848 144 720
WIRE 208 848 208 784
WIRE 240 848 208 848
WIRE 560 848 528 848
WIRE 656 848 624 848
WIRE 32 896 32 880
WIRE 240 912 208 912
WIRE 544 912 528 912
WIRE 144 976 144 928
WIRE 144 976 -16 976
WIRE 240 976 144 976
WIRE 544 976 528 976
WIRE -16 992 -16 976
WIRE 144 1008 144 976
WIRE -16 1088 -16 1072
WIRE 144 1088 144 1072
WIRE 208 1104 208 912
WIRE 352 1104 208 1104
WIRE 544 1104 544 976
WIRE 544 1104 416 1104
SYMBOL cap 128 1008 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res 688 704 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL RES -32 976 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL VOLTAGE 32 784 R0
SYMATTR InstName V1
SYMATTR Value 4.5
SYMBOL cap 416 1088 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL res 128 832 R0
SYMATTR InstName R1
SYMATTR Value 3K
SYMBOL cap 560 864 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL PowerProducts\\LTC1550LCS8 384 880 R0
SYMATTR InstName U1
FLAG 656 848 0
FLAG 544 912 0
FLAG 32 896 0
FLAG -16 1088 0
FLAG 144 1088 0
FLAG 688 720 0
FLAG -16 976 OUT
FLAG 32 784 IN
TEXT 616 1064 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17553B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17553B.asy)
V1 vIN 0 24
R3 N002 N004 953k
L1 N001 vOUT 180 Rser=2.5
Rload vOUT 0 100
R4 vOUT N003 100k
C2 vOUT 0 10
R2 N002 0 287k
R1 vIN N002 3.32Meg
XU1 0 vIN N002 N004 vOUT N001 N003 N005 MAX17553B ;pnba GND)IN)EN/UV)HYST)FB/VO)LX)_RESET)RT
R7 N005 0 274k
.tran 4m startup
.lib MAX17553B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 992 680
WIRE -176 -32 -192 -32
WIRE 48 -32 -176 -32
WIRE 176 -32 48 -32
WIRE 512 -32 464 -32
WIRE 624 -32 592 -32
WIRE 704 -32 624 -32
WIRE 768 -32 704 -32
WIRE 864 -32 768 -32
WIRE 896 -32 864 -32
WIRE 48 -16 48 -32
WIRE 624 -16 624 -32
WIRE 896 -16 896 -32
WIRE -192 16 -192 -32
WIRE 624 64 624 48
WIRE 896 80 896 64
WIRE 48 96 48 64
WIRE 48 96 -64 96
WIRE 176 96 48 96
WIRE -64 112 -64 96
WIRE 48 112 48 96
WIRE -192 128 -192 96
WIRE 512 128 464 128
WIRE 704 128 704 -32
WIRE 704 128 592 128
WIRE -64 224 -64 192
WIRE 48 224 48 192
WIRE 176 224 48 224
WIRE 768 224 768 -32
WIRE 768 224 464 224
WIRE 176 320 48 320
WIRE 48 336 48 320
WIRE 320 384 320 368
WIRE 48 432 48 416
SYMBOL res 32 320 R0
SYMATTR InstName R7
SYMATTR Value 274k
SYMBOL res 608 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100k
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 3.32Meg
SYMBOL cap 608 -16 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL res -80 96 R0
SYMATTR InstName R2
SYMATTR Value 287k
SYMBOL ind 496 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 180
SYMATTR SpiceLine Rser=2.5
SYMBOL voltage -192 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 32 96 R0
SYMATTR InstName R3
SYMATTR Value 953k
SYMBOL MAX17553B 320 144 R0
SYMATTR InstName U1
SYMBOL res 880 -32 R0
SYMATTR InstName Rload
SYMATTR Value 100
FLAG -192 128 0
FLAG 320 384 0
FLAG 624 64 0
FLAG 896 80 0
FLAG -176 -32 vIN
FLAG 864 -32 vOUT
FLAG -64 224 0
FLAG 48 432 0
TEXT 480 392 Left 2 !.tran 4m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0b4d67169a27_6700-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT6700-3.asy)
V1 N001 0 5
XU1 N004 0 N002 N002 N001 N003 LT6700-3 ;pnba OUTA)GND)+INA)+INB)Vs)OUTB
R2 N001 N004 10K
R1 N001 N003 10K
V3 N002 0 PULSE(0 5 0 .5m .5m 0 1m)
.tran 3m
.lib LT6700-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 800
WIRE 368 160 144 160
WIRE 496 160 368 160
WIRE 592 160 496 160
WIRE 144 176 144 160
WIRE 496 176 496 160
WIRE 368 208 368 160
WIRE 592 224 592 160
WIRE 304 256 256 256
WIRE 144 272 144 256
WIRE 496 272 496 256
WIRE 496 272 432 272
WIRE 256 336 256 256
WIRE 256 336 -64 336
WIRE -64 352 -64 336
WIRE 592 400 592 304
WIRE 592 400 432 400
WIRE 256 416 256 336
WIRE 304 416 256 416
WIRE -64 448 -64 432
WIRE 368 496 368 464
SYMBOL res 480 160 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -64 336 R0
WINDOW 3 17 101 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 5 0 .5m .5m 0 1m)
SYMATTR InstName V3
SYMBOL voltage 144 160 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 576 208 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Comparators\\LT6700-3 368 336 R0
SYMATTR InstName U1
FLAG 144 272 0
FLAG -64 448 0
FLAG 368 496 0
TEXT 464 520 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8548.asc
* Generated by LTspice 26.0.1 for Windows.
Vin IN 0 SINE(0 .1 10K)
R2 OUT N001 10K
XU1 IN N001 +V -V OUT AD8548 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 1K
V1 +V 0 5
V2 -V 0 -5
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8548.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1432 700
WIRE 368 -1184 352 -1184
WIRE 464 -1184 448 -1184
WIRE 480 -1184 464 -1184
WIRE 576 -1184 560 -1184
WIRE 128 -1088 128 -1104
WIRE 224 -1088 224 -1104
WIRE 464 -1072 464 -1184
WIRE 480 -1072 464 -1072
WIRE 576 -1056 576 -1184
WIRE 576 -1056 544 -1056
WIRE 624 -1056 576 -1056
WIRE 480 -1040 368 -1040
WIRE 368 -1024 368 -1040
WIRE 128 -992 128 -1008
WIRE 224 -992 224 -1008
WIRE 368 -928 368 -944
FLAG 368 -928 0
FLAG 624 -1056 OUT
FLAG 368 -1040 IN
FLAG 512 -1088 +V
FLAG 512 -1024 -V
FLAG 352 -1184 0
FLAG 128 -1104 +V
FLAG 128 -992 0
FLAG 224 -1104 -V
FLAG 224 -992 0
SYMBOL voltage 368 -1040 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 .1 10K)
SYMBOL res 576 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Opamps\\AD8548 512 -1120 R0
SYMATTR InstName U1
SYMBOL res 464 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 128 -1104 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 224 -1104 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
TEXT 712 -960 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4807.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4807.asy)
V2 IN 0 SINE(0 0.5 250K)
R2 OUT N001 1K
R1 N001 0 1K
V3 -V 0 -5
XU1 IN N001 +V -V OUT NC_01 ADA4807 ;pnba 100)101)102)103)104)106
V1 +V 0 5
.tran 50u
.lib ADA4807.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 416 -1232 400 -1232
WIRE 512 -1232 496 -1232
WIRE 544 -1232 512 -1232
WIRE 640 -1232 624 -1232
WIRE 176 -1136 176 -1152
WIRE 288 -1136 288 -1152
WIRE 560 -1136 560 -1152
WIRE 512 -1120 512 -1232
WIRE 544 -1120 512 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 704 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 432 -1072 432 -1088
WIRE 560 -1056 560 -1072
WIRE 176 -1040 176 -1056
WIRE 288 -1040 288 -1056
WIRE 432 -976 432 -992
SYMBOL voltage 288 -1152 R0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL ADA4807 576 -1104 R0
SYMATTR InstName U1
SYMBOL res 512 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 176 -1152 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 0.5 250K)
FLAG 176 -1152 +V
FLAG 176 -1040 0
FLAG 432 -976 0
FLAG 704 -1104 OUT
FLAG 432 -1088 IN
FLAG 560 -1152 +V
FLAG 288 -1152 -V
FLAG 288 -1040 0
FLAG 400 -1232 0
FLAG 560 -1056 -V
TEXT 728 -976 Left 2 !.tran 50u
* Z:\tmp\asc_dec_bjh7r6w2\01f58085b77a_2022023_3_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
D2 N003 N004 D
D4 N001 N002 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 80 -32 80
WIRE 112 80 64 80
WIRE 224 80 176 80
WIRE 384 80 224 80
WIRE 64 112 64 80
WIRE 224 112 224 80
WIRE -32 144 -32 80
WIRE 64 208 64 176
WIRE 96 208 64 208
WIRE 224 208 224 176
WIRE 224 208 160 208
WIRE 64 256 64 208
WIRE 384 256 64 256
WIRE -32 288 -32 224
WIRE 224 288 224 208
WIRE 224 288 -32 288
SYMBOL diode 96 224 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL diode 112 96 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D4
* Z:\home\khalils\Downloads\files\data\raw_asc\44a1e6405ecf_simulation.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N001 vs Dideal
Q2 vg N002 vs 0 DI_DMMT3906
I1 vs 0 125m
Q1 N002 N002 vin 0 DI_DMMT3906
R3 vin vd 390m
XM1 vd vg vs Si2301CDS ;pnba D)G)S
V2 vin 0 PWL(0 3.4 1 3.24 2 3.4)
R2 vg 0 4.7k
V1 N001 0 PWL(0 3.3 1 3.3 1.001 0)
R1 N002 0 8.2k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.include si2301cds_ps_rc.lib
.tran 2
.include DMMT3906.spice
.model Dideal D(Ron=0.0001 Roff=100G Vfwd=0)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1036 680
WIRE -16 0 -128 0
WIRE 128 0 64 0
WIRE 176 0 128 0
WIRE 336 0 272 0
WIRE 592 0 336 0
WIRE 624 0 592 0
WIRE 720 0 688 0
WIRE -128 80 -128 0
WIRE 112 80 -128 80
WIRE 336 80 336 0
WIRE -128 96 -128 80
WIRE 592 96 592 0
WIRE 720 96 720 0
WIRE 192 128 176 128
WIRE 272 128 192 128
WIRE 112 208 112 176
WIRE 192 208 192 128
WIRE 192 208 112 208
WIRE 256 208 256 48
WIRE 336 208 336 176
WIRE 336 208 256 208
WIRE 112 224 112 208
WIRE 336 224 336 208
WIRE -128 352 -128 176
WIRE 112 352 112 304
WIRE 336 352 336 304
WIRE 592 352 592 176
WIRE 720 352 720 176
SYMBOL pmos 176 48 R270
SYMATTR InstName M1
SYMATTR Value Si2301CDS
SYMATTR Prefix X
SYMBOL voltage -128 80 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 3.4 1 3.24 2 3.4)
SYMBOL pnp 176 176 R180
SYMATTR InstName Q1
SYMATTR Value DI_DMMT3906
SYMBOL current 592 96 R0
SYMATTR InstName I1
SYMATTR Value 125m
SYMBOL diode 688 -16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value Dideal
SYMBOL res -32 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 390m
SYMBOL res 320 208 R0
SYMATTR InstName R2
SYMATTR Value 4.7k
SYMBOL res 96 208 R0
SYMATTR InstName R1
SYMATTR Value 8.2k
SYMBOL voltage 720 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 3.3 1 3.3 1.001 0)
SYMBOL pnp 272 176 M180
SYMATTR InstName Q2
SYMATTR Value DI_DMMT3906
FLAG 112 352 0
FLAG 336 352 0
FLAG 592 352 0
FLAG -128 352 0
FLAG 336 208 vg
FLAG 336 0 vs
FLAG -128 0 vin
FLAG 720 352 0
FLAG 128 0 vd
TEXT 344 -128 Left 2 !.include si2301cds_ps_rc.lib
TEXT 344 -64 Left 2 !.tran 2
TEXT 344 -96 Left 2 !.include DMMT3906.spice
TEXT 352 -160 Left 2 !.model Dideal D(Ron=0.0001 Roff=100G Vfwd=0)