Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\4d2948d2b4a0_Fig9_24_pmos.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Is(M1) and 1/d(Is(M1)) (to get ro)
VSD 0 N002 0
M1 N002 N001 0 0 P_1u l=2u w=30u
VSG 0 N001 1.15
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSD 0 5
.include cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 688
WIRE 448 0 320 0
WIRE 672 0 448 0
WIRE 848 0 672 0
WIRE 320 32 320 0
WIRE 848 32 848 0
WIRE 448 112 448 0
WIRE 320 128 320 112
WIRE 400 128 320 128
WIRE 672 160 672 0
WIRE 672 160 448 160
WIRE 672 192 672 160
WIRE 448 304 448 208
WIRE 672 304 672 272
WIRE 672 304 448 304
SYMBOL pmos4 400 208 M180
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=2u w=30u
SYMATTR InstName M1
SYMATTR Value P_1u
SYMBOL voltage 320 16 R0
WINDOW 0 -93 54 Left 2
WINDOW 3 -93 82 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VSG
SYMATTR Value 1.15
SYMBOL voltage 672 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 38 54 Left 2
WINDOW 3 24 104 Invisible 2
SYMATTR InstName VSD
SYMATTR Value 0
FLAG 848 32 0
TEXT 384 336 Left 2 !.dc VSD 0 5
TEXT 384 360 Left 2 !.include cmosedu_models.txt
TEXT 368 -32 Left 2 ;Plot Is(M1) and 1/d(Is(M1)) (to get ro)
* Z:\home\khalils\Downloads\files\data\raw_asc\080359a28366_1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp1.asy)
R3 N003 0 38k
R2 N002 N001 6.6k
C1 N002 0 10p
XU1 N002 N003 NC_01 NC_02 out level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R1 N001 in 4.2k
C2 out N001 15p
R4 out N003 68.4k
V1 in 0 AC 1 0
.ac dec 100 10 500Mega
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 48 160 48
WIRE 480 48 368 48
WIRE 48 128 32 128
WIRE 160 128 160 48
WIRE 160 128 128 128
WIRE 192 128 160 128
WIRE 304 128 272 128
WIRE 368 128 304 128
WIRE 480 144 480 48
WIRE 480 144 432 144
WIRE 496 144 480 144
WIRE 304 160 304 128
WIRE 368 160 352 160
WIRE 32 208 32 128
WIRE 352 240 352 160
WIRE 384 240 352 240
WIRE 480 240 480 144
WIRE 480 240 464 240
WIRE 352 272 352 240
SYMBOL res 144 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 4.2k
SYMBOL res 336 256 R0
SYMATTR InstName R3
SYMATTR Value 38k
SYMBOL OpAmps\\UniversalOpAmp1 400 144 M180
SYMATTR InstName U1
SYMBOL res 480 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 68.4k
SYMBOL res 288 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 6.6k
SYMBOL cap 288 160 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 32 192 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMBOL cap 368 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 15p
FLAG 304 224 0
FLAG 352 352 0
FLAG 32 128 in
FLAG 496 144 out
FLAG 32 288 0
TEXT 56 424 Left 2 !.ac dec 100 10 500Mega
* Z:\home\khalils\Downloads\files\data\raw_asc\ADR3625.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR3625.asy)
V1 IN 0 5
XU1 IN IN 0 0 OUT OUT ADR3625 ;pnba EN)IN)GNDF)GNDS)OUTF)OUTS
C2 IN 0 0.1
C1 OUT 0 1
I1 OUT 0 PULSE(1m 2m 2m 1n 1n 2m 4m)
.tran 6m
.lib ADR3625.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 680
WIRE 32 128 -96 128
WIRE 80 128 32 128
WIRE 400 128 336 128
WIRE -96 192 -96 128
WIRE 32 192 32 128
WIRE 80 192 32 192
WIRE 400 192 400 128
WIRE 400 192 336 192
WIRE 512 192 400 192
WIRE 512 208 512 192
WIRE 32 224 32 192
WIRE 400 224 400 192
WIRE 160 272 160 240
WIRE 208 272 160 272
WIRE 256 272 256 240
WIRE 256 272 208 272
WIRE -96 304 -96 272
WIRE 32 304 32 288
WIRE 208 304 208 272
WIRE 400 304 400 288
WIRE 512 304 512 288
SYMBOL ADR3625 208 144 R0
SYMATTR InstName U1
SYMBOL cap 16 224 R0
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL current 512 208 R0
WINDOW 3 44 53 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(1m 2m 2m 1n 1n 2m 4m)
SYMATTR InstName I1
SYMBOL voltage -96 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 384 224 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 400 304 0
FLAG 208 304 0
FLAG 400 128 OUT
FLAG -96 304 0
FLAG 32 304 0
FLAG -96 128 IN
FLAG 512 304 0
TEXT -128 352 Left 2 !.tran 6m
* Z:\home\khalils\Downloads\files\data\raw_asc\20c8d38109fb_ideal-diode.asc
* Generated by LTspice 26.0.1 for Windows.
* https://wiki.analog.com/university/courses/alm1k/alm-active-rectifiers
* Vgs voltage of M1 is always smaller than V2.\nThat's ok, only very little power is wasted in M1.
* Ideal diode has lots of leakage through Q2, R1 & R2.
* D1, D2, R3, R4 increase output voltage range of ideal diode beyond\nbreakdown of BE-junction of Q1.
;dc v1 0 8
Q1 N005 N005 N003 0 BC856B
R3 N003 N005 1Meg
R4 N004 N005 1Meg
V1 N001 0 SINE(0 6 70)
R1 N005 0 22k
M1 N001 N006 N002 N002 FDC638P
D1 N001 N003 BAT54
V2 N002 0 5 Rser=100
R2 N006 0 68k
Q2 N006 N005 N004 0 BC856B
D2 N002 N004 BAT54
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1724 680
WIRE 48 -80 -144 -80
WIRE 208 -80 48 -80
WIRE 624 -80 304 -80
WIRE 848 -80 624 -80
WIRE 624 -48 624 -80
WIRE 48 -32 48 -80
WIRE 48 48 48 32
WIRE 144 48 48 48
WIRE 624 48 624 16
WIRE 624 48 416 48
WIRE 48 80 48 48
WIRE 624 80 624 48
WIRE -144 112 -144 -80
WIRE 848 112 848 -80
WIRE 144 128 112 128
WIRE 416 128 144 128
WIRE 560 128 416 128
WIRE 48 208 48 176
WIRE 144 208 144 128
WIRE 144 208 48 208
WIRE 288 208 288 -32
WIRE 624 208 624 176
WIRE 624 208 288 208
WIRE 48 240 48 208
WIRE 624 240 624 208
WIRE -144 368 -144 192
WIRE 48 368 48 320
WIRE 624 368 624 320
WIRE 848 368 848 192
SYMBOL res 400 32 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL pmos 208 -32 R270
SYMATTR InstName M1
SYMATTR Value FDC638P
SYMBOL voltage -144 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 6 70)
SYMBOL res 128 32 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL schottky 32 -32 R0
SYMATTR InstName D1
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL pnp 560 176 M180
SYMATTR InstName Q2
SYMATTR Value BC856B
SYMBOL pnp 112 176 R180
SYMATTR InstName Q1
SYMATTR Value BC856B
SYMBOL voltage 848 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=100
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL schottky 608 -48 R0
SYMATTR InstName D2
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 32 224 R0
SYMATTR InstName R1
SYMATTR Value 22k
SYMBOL res 608 224 R0
SYMATTR InstName R2
SYMATTR Value 68k
FLAG -144 368 0
FLAG 48 368 0
FLAG 624 368 0
FLAG 848 368 0
TEXT -176 392 Left 2 !;dc v1 0 8
TEXT -120 456 Left 2 ;https://wiki.analog.com/university/courses/alm1k/alm-active-rectifiers
TEXT -120 496 Left 2 ;Vgs voltage of M1 is always smaller than V2.\nThat's ok, only very little power is wasted in M1.
TEXT -176 424 Left 2 !.tran 100m
TEXT -120 608 Left 2 ;Ideal diode has lots of leakage through Q2, R1 & R2.
TEXT 944 -88 Left 2 ;D1, D2, R3, R4 increase output voltage range of ideal diode beyond\nbreakdown of BE-junction of Q1.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3595.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3595.asy)
L1 N001 N004 100
C1 IN N001 .47
V2 N003 0 3.3
R1 0 N005 30.1K
D1 N002 N001 QTLP690C N=5
V3 N007 0 PULSE(0 3.3 0 1u 1u 50u 100u)
XU1 N003 IN N002 N004 0 N005 N007 N003 N006 LT3595 ;pnba _SHDN)Vin)L1)SW1)GND)Rset)PWM1)Vcc)_OpenLED
V1 IN 0 30
R2 N006 N003 100K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 300u startup
.lib LT3595.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1000 804
WIRE 208 -32 0 -32
WIRE 240 -32 208 -32
WIRE 336 -32 304 -32
WIRE 496 -32 336 -32
WIRE 0 -16 0 -32
WIRE 336 -16 336 -32
WIRE 496 0 496 -32
WIRE 208 64 208 -32
WIRE 336 64 336 48
WIRE 0 80 0 64
WIRE 0 128 -96 128
WIRE 112 128 0 128
WIRE 496 128 496 80
WIRE 496 128 432 128
WIRE -96 144 -96 128
WIRE 0 208 0 128
WIRE 112 208 0 208
WIRE 448 208 432 208
WIRE 544 208 528 208
WIRE -96 240 -96 224
WIRE 0 288 0 208
WIRE 16 288 0 288
WIRE 112 288 96 288
WIRE 592 288 432 288
WIRE 704 288 672 288
WIRE 272 368 272 352
SYMBOL voltage -96 128 R0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL LED 320 48 M180
WINDOW 0 23 62 Left 2
WINDOW 3 25 3 Left 2
WINDOW 123 84 37 Left 2
SYMATTR InstName D1
SYMATTR Value QTLP690C
SYMATTR Value2 N=5
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 240 -16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value .47
SYMBOL res 544 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 30.1K
SYMBOL voltage 0 -32 R0
SYMATTR InstName V1
SYMATTR Value 30
SYMBOL res 112 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL ind 480 -16 R0
SYMATTR InstName L1
SYMATTR Value 100
SYMBOL PowerProducts\\LT3595 272 208 R0
SYMATTR InstName U1
SYMBOL voltage 576 288 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 3.3 0 1u 1u 50u 100u)
FLAG 272 368 0
FLAG 0 80 0
FLAG 0 -32 IN
FLAG -96 240 0
FLAG 544 208 0
FLAG 704 288 0
TEXT 504 400 Left 2 !.tran 300u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\44e53cce212c_flickernoise2a.asc
* Generated by LTspice 26.0.1 for Windows.
* taken from "low noise electronic system designs" by Mothenbacher &Connelly
* Modeling 1/f and white voltage noise in LTspice (enoise [V/sqrHz] and fce [Hz])
Cen N001 N002 1
D1 N001 0 Denoise
H1 out 0 Vesen {enoise/iref}
Vesen N002 0 0
Ien 0 N001 {iref**2/q/2}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model Denoise D(kf ={2*q*fce}, af =1)
.noise v(out) Vesen dec 10 0.001 10k
.op
.params iref = 1e-12 q=1.602e-19 enoise=20e-9 fce=200
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 176 -64 128
WIRE -64 320 -64 256
WIRE 32 128 -64 128
WIRE 32 144 32 128
WIRE 32 224 32 208
WIRE 32 320 -64 320
WIRE 32 320 32 304
WIRE 32 352 32 320
WIRE 128 128 32 128
WIRE 128 192 128 128
WIRE 128 320 32 320
WIRE 128 320 128 256
WIRE 336 176 336 144
WIRE 336 352 336 256
WIRE 464 144 336 144
IOPIN 464 144 Out
SYMBOL diode 112 192 R0
SYMATTR InstName D1
SYMATTR Value Denoise
SYMBOL h 336 160 R0
WINDOW 38 -43 56 Left 0
SYMATTR InstName H1
SYMATTR Value {enoise/iref}
SYMATTR SpiceModel Vesen
SYMBOL cap 16 144 R0
WINDOW 0 -36 6 Left 0
WINDOW 3 27 6 Left 0
SYMATTR InstName Cen
SYMATTR Value 1
SYMBOL voltage 32 208 R0
WINDOW 0 -83 89 Left 0
WINDOW 3 32 89 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vesen
SYMATTR Value 0
SYMBOL current -64 256 R180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Ien
SYMATTR Value {iref**2/q/2}
FLAG 32 352 0
FLAG 336 352 0
FLAG 464 144 out
TEXT -56 416 Left 0 !.model Denoise D(kf ={2*q*fce}, af =1)
TEXT -56 472 Left 0 !.noise v(out) Vesen dec 10 0.001 10k
TEXT -56 448 Left 0 !.op
TEXT -56 384 Left 0 !.params iref = 1e-12 q=1.602e-19 enoise=20e-9 fce=200
TEXT -200 80 Left 0 ;taken from "low noise electronic system designs" by Mothenbacher &Connelly
TEXT -200 48 Left 0 ;Modeling 1/f and white voltage noise in LTspice (enoise [V/sqrHz] and fce [Hz])
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3590.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3590.asy)
V1 IN 0 48
C1 IN N001 1
XU1 N003 0 N004 IN N002 N003 LT3590 ;pnba CTRL)GND)SW)Vin)LED)Vreg
C2 N003 0 .1
R1 IN N002 4
D1 N002 N001 QTLP690C N=4
L1 N001 N004 470
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 300u startup
.lib LT3590.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 -96 176 -96
WIRE 512 -96 368 -96
WIRE 176 0 176 -96
WIRE 176 0 -48 0
WIRE 208 0 176 0
WIRE 336 0 288 0
WIRE 400 0 336 0
WIRE 512 0 512 -96
WIRE 512 0 464 0
WIRE -48 16 -48 0
WIRE 176 64 176 0
WIRE 336 64 336 0
WIRE 512 80 512 0
WIRE -48 112 -48 96
WIRE 112 144 48 144
WIRE 512 208 512 160
WIRE 512 208 400 208
WIRE 48 272 48 144
WIRE 112 272 48 272
WIRE 48 288 48 272
WIRE 48 368 48 352
WIRE 256 368 256 352
SYMBOL cap 32 288 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL LED 400 16 R270
WINDOW 0 75 35 VTop 2
WINDOW 3 0 32 VBottom 2
WINDOW 123 -35 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value QTLP690C
SYMATTR Value2 N=4
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 192 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 4
SYMBOL cap 304 -80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ind 496 64 R0
SYMATTR InstName L1
SYMATTR Value 470
SYMBOL voltage -48 0 R0
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL PowerProducts\\LT3590 256 208 R0
SYMATTR InstName U1
FLAG 256 368 0
FLAG 48 368 0
FLAG -48 112 0
FLAG -48 0 IN
TEXT 432 320 Left 2 !.tran 300u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3485-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3485-2.asy)
L1 N002 N005 10 Rpar=2K Rser=.1
L2 0 N003 {10u*10.2*10.2} Rpar=1Meg
D1 N003 OUT D
K1 L1 L2 1
V1 N001 0 5
XU1 N001 N002 N001 N005 MP_01 N008 N007 N001 N004 N006 0 LT3485-2 ;pnba Charge)Vbat)Vin)SW))IBGTout)IBGTin)IBGTpwr)_Done)Vmont)GND
C1 OUT 0 .02
V2 N002 0 3
V3 N007 0 PWL(30m 0 30.01m 3 30.1m 3 30.11m 0)
R3 N004 N001 10K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 50m startup
.lib LT3485-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2900 1764
WIRE 1936 1152 1936 1136
WIRE 1712 1248 1520 1248
WIRE 1824 1248 1712 1248
WIRE 1936 1248 1936 1232
WIRE 2064 1248 1936 1248
WIRE 2224 1248 2112 1248
WIRE 2352 1248 2288 1248
WIRE 2064 1264 2064 1248
WIRE 2112 1264 2112 1248
WIRE 2352 1264 2352 1248
WIRE 1712 1296 1712 1248
WIRE 1824 1296 1824 1248
WIRE 1936 1296 1936 1248
WIRE 1520 1360 1520 1248
WIRE 1568 1360 1520 1360
WIRE 1664 1360 1648 1360
WIRE 2064 1360 2064 1344
WIRE 2064 1360 1984 1360
WIRE 2112 1360 2112 1344
WIRE 2352 1360 2352 1328
WIRE 1520 1440 1520 1360
WIRE 1664 1440 1520 1440
WIRE 2016 1440 1984 1440
WIRE 1520 1456 1520 1440
WIRE 1664 1520 1600 1520
WIRE 2016 1520 1984 1520
WIRE 1520 1552 1520 1536
WIRE 1600 1552 1600 1520
WIRE 1824 1600 1824 1584
WIRE 1600 1664 1600 1632
SYMBOL res 1664 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL cap 2336 1264 R0
WINDOW 3 27 55 Left 2
SYMATTR Value .02
SYMATTR InstName C1
SYMBOL VOLTAGE 1520 1440 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind2 2048 1248 R0
WINDOW 0 -6 35 Right 2
WINDOW 3 -4 73 Right 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rpar=2K Rser=.1
SYMBOL misc\\battery 1936 1248 M180
WINDOW 0 25 87 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL ind2 2128 1360 R180
WINDOW 0 -3 72 Right 2
WINDOW 3 0 43 Right 2
SYMATTR InstName L2
SYMATTR Value {10u*10.2*10.2}
SYMATTR SpiceLine Rpar=1Meg
SYMBOL voltage 1600 1536 R0
WINDOW 3 12 110 Left 2
SYMATTR Value PWL(30m 0 30.01m 3 30.1m 3 30.11m 0)
SYMATTR InstName V3
SYMBOL PowerProducts\\LT3485-2 1824 1440 R0
SYMATTR InstName U1
SYMBOL diode 2224 1264 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
FLAG 2352 1360 0
FLAG 1824 1600 0
FLAG 1520 1552 0
FLAG 2112 1360 0
FLAG 1936 1136 0
FLAG 1600 1664 0
FLAG 2352 1248 OUT
TEXT 2136 1464 Left 2 !.tran 50m startup
TEXT 2032 1224 Left 2 !K1 L1 L2 1
* Z:\home\khalils\Downloads\files\data\raw_asc\f6ba61dc999b_r-l-circuit.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N002 0 10m
R1 N002 N001 5
V1 N001 0 SINE(0 10 60)
.tran 100ms
.IC I(L1)=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 240 208 240
WIRE 496 240 384 240
WIRE 208 272 208 240
WIRE 496 304 496 240
WIRE 208 400 208 352
WIRE 496 400 496 384
WIRE 496 400 208 400
WIRE 208 416 208 400
SYMBOL voltage 208 256 R0
WINDOW 3 24 38 Left 2
WINDOW 123 24 38 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10 60)
SYMBOL res 400 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL ind 480 288 R0
SYMATTR InstName L1
SYMATTR Value 10m
FLAG 208 416 0
TEXT 208 536 Left 2 !.tran 100ms
TEXT 584 248 Left 2 !.IC I(L1)=0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4257.asc
* Generated by LTspice 26.0.1 for Windows.
VPSE 0 N004 PWL(0 0 10m 6 250m 6 260m 5 500m 5 505m 8 555m 8 560m 4 610m 4 611m 17 621m 17 622m 8 627m 8 628m 17 638m 17 639m 8 659m 8 660m 57)
Rclass N002 IN 30.9
R2 N001 N003 100K
Cload N001 OUT 100 Rser=10m
C1 N001 IN .1 Rser=10m
D1 0 N001 MURS120
D2 IN N004 MURS120
Rload N001 OUT 1.3K
XU1 MP_01 N002 MP_02 IN OUT N003 MP_03 N001 LTC4257 ;pnba )Rclass))Vin)Vout)_PWRGD))GND
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.8
* Diode Bridge
* Set for Class 4 Load
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4257.asy)
.lib LTC4257.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1516 692
WIRE -528 208 -1344 208
WIRE -464 208 -528 208
WIRE -352 208 -400 208
WIRE 336 208 -352 208
WIRE 400 208 336 208
WIRE 512 208 400 208
WIRE 656 208 512 208
WIRE -528 240 -528 208
WIRE 400 256 400 208
WIRE -1344 272 -1344 208
WIRE -352 288 -352 208
WIRE 336 288 336 208
WIRE 336 288 320 288
WIRE 656 304 656 208
WIRE 512 320 512 208
WIRE -128 368 -144 368
WIRE -32 368 -48 368
WIRE 400 368 400 336
WIRE 400 368 320 368
WIRE -1344 448 -1344 352
WIRE -480 448 -1344 448
WIRE -352 448 -352 352
WIRE -352 448 -416 448
WIRE -144 448 -144 368
WIRE -144 448 -352 448
WIRE -32 448 -144 448
WIRE 512 448 512 384
WIRE 512 448 320 448
WIRE 656 448 656 384
WIRE 656 448 512 448
FLAG 656 448 OUT
FLAG -528 240 0
FLAG -352 448 IN
SYMBOL voltage -1344 256 R0
WINDOW 3 37 54 Left 2
WINDOW 123 25 90 Left 2
SYMATTR Value PWL(0 0 10m 6 250m 6 260m 5 500m 5 505m 8 555m 8 560m 4 610m 4
SYMATTR Value2 611m 17 621m 17 622m 8 627m 8 628m 17 638m 17 639m 8 659m 8 660m 57)
SYMATTR InstName VPSE
SYMBOL res -32 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rclass
SYMATTR Value 30.9
SYMBOL res 384 240 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL cap 496 320 R0
WINDOW 39 24 84 Left 2
SYMATTR SpiceLine Rser=10m
SYMATTR InstName Cload
SYMATTR Value 100
SYMBOL cap -368 288 R0
WINDOW 39 24 84 Left 2
SYMATTR SpiceLine Rser=10m
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL diode -464 192 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value MURS120
SYMBOL diode -416 464 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value MURS120
SYMBOL res 640 288 R0
SYMATTR InstName Rload
SYMATTR Value 1.3K
SYMBOL LTC4257 144 368 R0
WINDOW 0 0 -63 Center 2
WINDOW 3 0 78 Center 2
SYMATTR InstName U1
TEXT 376 512 Left 2 !.tran 0.8
TEXT -448 400 Bottom 2 ;Diode Bridge
TEXT -144 488 Top 2 ;Set for Class 4 Load
* Z:\home\khalils\Downloads\files\data\raw_asc\1900d0fbb671_FULL_WAVE_GUI.asc
* Generated by LTspice 26.0.1 for Windows.
D3 N002 0 D
D1 N002 N001 D
V1 N001 0 SINE(0 10 1k)
D4 0 N003 D
D2 N001 N003 D
R1 N003 N002 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 64 0 64
WIRE 256 160 256 64
WIRE 208 176 256 160
WIRE 304 176 256 160
WIRE 0 240 0 64
WIRE 112 256 144 176
WIRE 208 256 112 256
WIRE 400 256 368 176
WIRE 400 256 288 256
WIRE 128 336 112 256
WIRE 368 336 400 256
WIRE 256 352 192 336
WIRE 256 352 304 336
WIRE 0 432 0 320
WIRE 256 432 256 352
WIRE 256 432 0 432
WIRE 0 480 0 432
SYMBOL diode 304 192 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMBOL res 304 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 304 352 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D4
SYMBOL diode 128 352 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D3
SYMBOL diode 144 192 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL voltage 0 224 R0
WINDOW 3 -210 50 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 10 1k)
SYMATTR InstName V1
FLAG 0 480 0
TEXT -208 440 Left 2 !.tran 1ms
* Z:\home\khalils\Downloads\files\data\raw_asc\0de55b386468_Tab9_1_ftn.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1)/I(vgs)
VDS N001 0 250m
VGS N003 0 1.05V AC 1
M1 N001 N003 0 N002 N_1u l=2u w=10u
VSB 0 N002 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.ac dec 100 1MEG 1G
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1128 680
WIRE 352 208 352 192
WIRE 352 304 352 288
WIRE 400 192 352 192
WIRE 448 112 448 80
WIRE 448 272 448 208
WIRE 704 160 448 160
WIRE 704 272 704 240
WIRE 848 80 448 80
WIRE 848 112 848 80
WIRE 848 224 848 192
SYMBOL voltage 848 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 40 57 Left 0
WINDOW 3 40 85 Left 0
SYMATTR InstName VDS
SYMATTR Value 250m
SYMBOL voltage 352 192 R0
WINDOW 0 -91 57 Left 0
WINDOW 3 -91 113 Left 0
WINDOW 123 -91 85 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 1.05V
SYMATTR Value2 AC 1
SYMBOL voltage 704 256 R180
WINDOW 0 -37 57 Right 0
WINDOW 3 -37 29 Right 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VSB
SYMATTR Value 0
SYMBOL nmos4 400 112 R0
WINDOW 0 59 18 Left 0
WINDOW 3 64 75 Left 0
WINDOW 123 64 103 Left 0
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=2u w=10u
FLAG 352 304 0
FLAG 448 272 0
FLAG 848 224 0
FLAG 704 272 0
TEXT 448 320 Left 0 !.ac dec 100 1MEG 1G
TEXT 448 344 Left 0 !.lib cmosedu_models.txt
TEXT 488 56 Left 0 ;Plot Id(M1)/I(vgs)