Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\0326935b8dd2_4N25Tst_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
C2 DATA_IN N005 47nF
R6 K2 DATA_IN 10K
R5 N004 DATA_IN 470
V1 N006 N011 24 Rser=0.1
XU2 N001 K2 N002 N003 NC_01 4N25 ;pnba A)K)C)E)B
R3 N009 N003 1Meg
C1 Q1C_OUT N010 1pF
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Optos\4N25.asy)
.lib 4N25.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1624 772
WIRE -464 240 -96 240
WIRE -96 240 -96 144
WIRE -208 -96 -96 -96
WIRE -96 -96 -96 64
WIRE -96 240 208 240
WIRE 1488 -576 1488 -240
WIRE 1488 240 1488 -160
WIRE 1168 -144 1168 -256
WIRE -768 -592 -880 -592
WIRE -464 -592 -624 -592
WIRE -464 -592 -464 -496
WIRE -464 -192 -464 -384
WIRE 1168 240 1168 -80
WIRE -208 -128 -16 -128
WIRE 912 -256 976 -256
WIRE 1168 -256 1168 -352
WIRE 976 -256 1168 -256
WIRE -624 -192 -624 -256
WIRE -624 -336 -624 -384
WIRE -624 -448 -624 -592
WIRE -624 -592 -768 -592
WIRE -16 -128 272 -128
WIRE 128 -928 208 -928
WIRE 208 -928 208 240
WIRE 128 -992 272 -992
WIRE -160 -496 -160 -560
WIRE -160 -640 -160 -688
WIRE -160 -752 -160 -768
WIRE -64 -896 -160 -896
WIRE -160 -496 -464 -496
WIRE -464 -496 -464 -464
WIRE -64 -992 -304 -992
WIRE -304 -800 -304 -768
WIRE -304 -768 -160 -768
WIRE -160 -768 -160 -880
WIRE -160 -880 -160 -896
WIRE -160 -496 -48 -496
WIRE -48 -496 -48 -560
WIRE -160 -768 -48 -768
WIRE -48 -768 -48 -640
SYMBOL cap -640 -448 R0
SYMATTR InstName C2
SYMATTR Value 47nF
SYMBOL res -64 -656 R0
SYMATTR InstName R6
SYMATTR Value 10K
SYMBOL res -176 -656 R0
SYMATTR InstName R5
SYMATTR Value 470
SYMBOL voltage 1488 -256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 0
SYMATTR SpiceLine Rser=0.1
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL Optos\\4N25 32 -928 R0
SYMATTR InstName U2
SYMBOL res -112 48 R0
SYMATTR InstName R3
SYMATTR Value 1MEG
SYMBOL cap 1152 -144 R0
SYMATTR InstName C1
SYMATTR Value 1pF
FLAG -768 -592 DATA_IN
FLAG 976 -256 Q1C_OUT
FLAG -16 -128 Q1B
FLAG -160 -880 K2
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3467A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3467A.asy)
Rload OUT 0 10
V1 IN 0 3
XU1 N001 0 N002 IN N003 IN LT3467A ;pnba SW)GND)FB)_SHDN)SS)Vin
L1 IN N001 2.7 Rser=0.182
R2 N002 0 133K
C3 N003 0 .0047
C4 OUT N002 3.3p
C2 OUT 0 15
D1 N001 OUT MBR0520L
R1 OUT N002 402K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib LT3467A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1376 984
WIRE 384 512 272 512
WIRE 512 512 384 512
WIRE 560 512 512 512
WIRE 672 512 640 512
WIRE 720 512 672 512
WIRE 848 512 784 512
WIRE 960 512 848 512
WIRE 1056 512 960 512
WIRE 1168 512 1056 512
WIRE 272 528 272 512
WIRE 1168 528 1168 512
WIRE 1056 544 1056 512
WIRE 512 560 512 512
WIRE 672 560 672 512
WIRE 848 576 848 512
WIRE 960 576 960 512
WIRE 272 624 272 608
WIRE 384 624 384 512
WIRE 432 624 384 624
WIRE 1056 624 1056 608
WIRE 1168 624 1168 608
WIRE 848 672 848 656
WIRE 848 672 752 672
WIRE 960 672 960 640
WIRE 960 672 848 672
WIRE 848 688 848 672
WIRE 352 720 336 720
WIRE 432 720 416 720
WIRE 848 784 848 768
WIRE 592 800 592 784
SYMBOL RES 832 560 R0
SYMATTR InstName R1
SYMATTR Value 402K
SYMBOL VOLTAGE 272 512 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL cap 944 576 R0
SYMATTR InstName C4
SYMATTR Value 3.3p
SYMBOL SCHOTTKY 720 528 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBR0520L
SYMBOL IND 544 528 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.7
SYMATTR SpiceLine Rser=0.182
SYMBOL cap 416 704 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .0047
SYMBOL RES 832 672 R0
SYMATTR InstName R2
SYMATTR Value 133K
SYMBOL POLCAP 1040 544 R0
SYMATTR InstName C2
SYMATTR Value 15
SYMBOL PowerProducts\\LT3467A 592 672 R0
SYMATTR InstName U1
SYMBOL RES 1152 512 R0
SYMATTR InstName Rload
SYMATTR Value 10
FLAG 1168 512 OUT
FLAG 848 784 0
FLAG 1056 624 0
FLAG 1168 624 0
FLAG 592 800 0
FLAG 272 624 0
FLAG 336 720 0
FLAG 272 512 IN
TEXT 1000 736 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG781.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N003 0 PULSE(3 0 25u 1n 1n 20u)
R1 N002 0 301
C1 N002 0 36p
V2 N001 0 3
V3 +V 0 5
XU1 N003 N002 N001 0 +V ADG781 ;pnba IN)D)S)GND)Vdd
.tran 75u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG781.asy)
.lib ADG781.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 16 -48 -32
WIRE -144 96 -400 96
WIRE 128 96 48 96
WIRE 256 96 128 96
WIRE -512 128 -512 80
WIRE -400 128 -400 96
WIRE 128 128 128 96
WIRE 256 128 256 96
WIRE -144 160 -288 160
WIRE -512 224 -512 208
WIRE -400 224 -400 208
WIRE 128 240 128 208
WIRE 256 240 256 192
WIRE -288 272 -288 160
WIRE -48 304 -48 272
WIRE -288 416 -288 352
FLAG 128 240 0
FLAG 256 240 0
FLAG -48 304 0
FLAG -288 416 0
FLAG -400 224 0
FLAG -48 -32 +V
FLAG -512 224 0
FLAG -512 80 +V
SYMBOL voltage -288 256 R0
WINDOW 3 24 102 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(3 0 25u 1n 1n 20u)
SYMATTR InstName V1
SYMBOL res 112 112 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL cap 240 128 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -400 112 R0
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL voltage -512 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL ADG781 -48 144 R0
SYMATTR InstName U1
TEXT -264 392 Left 2 !.tran 75u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1312.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
V3 N001 0 10
V4 N003 0 pulse(0 3.3 0 1u 1u 5m 10m)
R1 N002 0 300
C1 N002 0 35p
XU1 N003 N002 N001 -V 0 +V ADG1312 ;pnba IN)D)S)Vss)GND)Vdd
.tran 30m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1312.asy)
.lib ADG1312.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -112 -128 -112 -144
WIRE -432 -96 -432 -112
WIRE -304 -48 -320 -48
WIRE -208 -48 -224 -48
WIRE 48 -48 -16 -48
WIRE 144 -48 48 -48
WIRE 48 -16 48 -48
WIRE -432 0 -432 -16
WIRE 144 0 144 -48
WIRE -208 16 -304 16
WIRE 48 80 48 64
WIRE 144 80 144 64
WIRE -432 96 -432 80
WIRE -304 96 -304 16
WIRE -176 144 -176 128
WIRE -48 144 -48 128
WIRE -432 192 -432 176
WIRE -304 224 -304 176
FLAG -432 192 0
FLAG -432 0 0
FLAG -432 -112 +V
FLAG -432 80 -V
FLAG -320 -48 0
FLAG -176 144 -V
FLAG -112 -144 +V
FLAG -48 144 0
FLAG -304 224 0
FLAG 48 80 0
FLAG 144 80 0
SYMBOL voltage -432 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -432 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -208 -48 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL voltage -304 80 R0
WINDOW 3 19 116 Left 2
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMATTR InstName V4
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL cap 128 0 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL ADG1312 -112 0 R0
SYMATTR InstName U1
TEXT 32 144 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\1f2c0603c3e4_circuit4a.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N003 N002 10m
R1 N002 N001 200
V1 N001 0 AC 1.005
C1 N003 0 47n
.ac dec 1000 1 10Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 64 112 -16 112
WIRE 240 112 144 112
WIRE 416 112 320 112
WIRE -16 160 -16 112
WIRE 416 176 416 112
WIRE -16 304 -16 240
WIRE 0 304 -16 304
WIRE 416 304 416 240
WIRE 416 304 0 304
SYMBOL ind 336 96 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value 10m
SYMBOL cap 400 176 R0
SYMATTR InstName C1
SYMATTR Value 47n
SYMBOL voltage -16 144 R0
WINDOW 123 24 114 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1.005
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL res 160 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200
FLAG 0 304 0
TEXT -112 56 Left 2 !.ac dec 1000 1 10Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\f2c1b16c27b5_LAB1_NMOS.asc
* Generated by LTspice 26.0.1 for Windows.
Vgs N002 0 0
M1 N001 N002 0 N003 NMOS l=20u w=100u
Vdd N001 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vgs 0 5 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 680
WIRE 368 240 176 240
WIRE 176 256 176 240
WIRE 368 256 368 240
WIRE 128 336 -96 336
WIRE 176 336 176 304
WIRE 368 384 368 336
WIRE -96 400 -96 336
WIRE -96 512 -96 480
WIRE 176 512 176 352
SYMBOL voltage 368 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdd
SYMATTR Value 5
SYMBOL nmos4 128 256 R0
SYMATTR InstName M1
SYMATTR Value2 l=20u w=100u
SYMBOL voltage -96 384 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vgs
SYMATTR Value 0
FLAG 368 384 0
FLAG -96 512 0
FLAG 176 512 0
TEXT -232 200 Left 2 !.dc Vgs 0 5 0.1
* Z:\tmp\asc_dec_bjh7r6w2\1101fa5416bf_P3_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
M4 Vo2 N001 Vdd Vdd mpm
M1 Vo1 Vin1 N002 N002 mnm
V3 Vin1 0 SINE(0 1m 1k)
M3 Vo1 N001 Vdd Vdd mpm
V2 0 Vss 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 740
WIRE -288 -592 -544 -592
WIRE -160 -592 -160 -640
WIRE -160 -592 -288 -592
WIRE -48 -592 -160 -592
WIRE 16 -560 -416 -560
WIRE -288 -544 -288 -592
WIRE -48 -544 -48 -592
WIRE -416 -528 -416 -560
WIRE -416 -528 -496 -528
WIRE -336 -528 -416 -528
WIRE 16 -528 16 -560
WIRE 16 -528 0 -528
WIRE -416 -416 -416 -528
WIRE -416 -416 -544 -416
WIRE -288 -416 -288 -448
WIRE -288 -416 -336 -416
WIRE -192 -416 -288 -416
WIRE -48 -416 -48 -448
WIRE -48 -416 -128 -416
WIRE 0 -416 -48 -416
WIRE -288 -384 -288 -416
WIRE -48 -384 -48 -416
WIRE -336 -304 -416 -304
WIRE 64 -304 0 -304
WIRE 80 -304 64 -304
WIRE -288 -240 -288 -288
WIRE -160 -240 -288 -240
WIRE -48 -240 -48 -288
WIRE -48 -240 -160 -240
WIRE -160 -160 -160 -240
WIRE -832 384 -832 352
WIRE -832 384 -864 384
WIRE -832 432 -832 384
SYMBOL pmos 0 -448 R180
SYMATTR InstName M4
SYMATTR Value mpm
SYMBOL nmos -336 -384 R0
SYMATTR InstName M1
SYMATTR Value mnm
SYMBOL voltage -832 256 R0
WINDOW 3 24 44 Left 2
WINDOW 123 24 72 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(0 1m 1k)
SYMATTR InstName V3
SYMBOL pmos -336 -448 M180
SYMATTR InstName M3
SYMATTR Value mpm
SYMBOL voltage -688 112 R0
SYMATTR InstName V2
SYMATTR Value 1
FLAG -832 208 0
FLAG -688 128 0
FLAG -832 272 Vin1
FLAG -832 128 Vdd
FLAG -688 208 Vss
FLAG 64 -304 Vin2
FLAG -160 -640 Vdd
FLAG -864 384 0
FLAG -832 432 Vin2
FLAG -336 -416 Vo1
FLAG 0 -416 Vo2
FLAG -416 -304 Vin1
FLAG -192 -336 0
FLAG -128 -336 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8083.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8083.asy)
V1 IN 0 20
R2 N001 0 9.09k
XU1 IN MP_01 IN NC_02 IN 0 0 MP_03 MP_04 NC_05 OUT OUT NC_06 MP_07 NC_08 N001 NC_09 N002 0 MP_10 OUT MP_11 MP_12 MP_13 MP_14 MP_15 MP_16 MP_17 0 LTM8083 ;pnba Vin))SVin)INTVcc)EN/UVLO)OVLO)TST2)))CTRL)ISP)ISN)ISMON))SS)FB)Vc)RT)SYNC))Vout))))))))GND
Rload OUT 0 24
C1 OUT 0 10 V=16 Irms=13.8 Rser=0.00468332 Lser=0 mfg="KEMET" pn="C1210C106K4RAC" type="X7R"
R3 N002 0 40.2k
R1 OUT N001 100k
.tran 1.2m startup
.lib LTM8083.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2644 1404
WIRE -304 -16 -336 -16
WIRE -208 -16 -304 -16
WIRE -144 -16 -208 -16
WIRE 368 -16 288 -16
WIRE 464 -16 368 -16
WIRE 592 -16 464 -16
WIRE 656 -16 592 -16
WIRE 688 -16 656 -16
WIRE 464 0 464 -16
WIRE -336 32 -336 -16
WIRE 688 32 688 -16
WIRE 592 48 592 -16
WIRE -208 80 -208 -16
WIRE -144 80 -208 80
WIRE 320 80 288 80
WIRE 320 112 320 80
WIRE 464 112 464 80
WIRE 464 112 320 112
WIRE -336 144 -336 112
WIRE 464 144 464 112
WIRE 592 160 592 112
WIRE 688 160 688 112
WIRE -208 176 -208 80
WIRE -144 176 -208 176
WIRE 368 176 368 -16
WIRE 368 176 288 176
WIRE 464 256 464 224
WIRE -144 272 -208 272
WIRE 368 272 368 176
WIRE 368 272 288 272
WIRE -208 560 -208 272
WIRE -144 560 -208 560
WIRE -208 656 -208 560
WIRE -144 656 -208 656
WIRE 320 656 288 656
WIRE 432 656 400 656
WIRE -208 800 -208 656
WIRE 80 800 80 736
WIRE 80 800 -208 800
WIRE 80 832 80 800
SYMBOL LTM8083 80 336 R0
SYMATTR InstName U1
SYMBOL res 304 640 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 37 64 VTop 2
SYMATTR InstName R3
SYMATTR Value 40.2k
SYMBOL voltage -336 16 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value 20
SYMATTR InstName V1
SYMBOL res 448 -16 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL cap 576 48 R0
WINDOW 0 24 10 Left 2
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine V=16 Irms=13.8 Rser=0.00468332 Lser=0 mfg="KEMET" pn="C1210C106K4RAC" type="X7R"
SYMBOL res 672 16 R0
SYMATTR InstName Rload
SYMATTR Value 24
SYMBOL res 448 128 R0
SYMATTR InstName R2
SYMATTR Value 9.09k
FLAG -336 144 0
FLAG 464 256 0
FLAG 432 656 0
FLAG 592 160 0
FLAG 688 160 0
FLAG 80 832 0
FLAG 656 -16 OUT
FLAG -304 -16 IN
TEXT 360 808 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1325ff37aabf_sweep-diagram.asc
* Generated by LTspice 26.0.1 for Windows.
* To find Width by Sweep
* EDIC WINTER INTERNSHIP\nMOHAMMED AHMED MAJID\nGP5405
* Common Source Amplifier with Resistive Load
;.step param wp 1u 50u 1u
V1 N003 0 0.9
V3 N001 0 1.8
V2 N002 0 1.26
M1 N003 N002 N001 N001 PMOS l=0.36u w={wp}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include tsmc180.txt
.param wp 1u
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 16 256 16
WIRE 416 48 416 16
WIRE 256 64 256 16
WIRE 336 64 256 64
WIRE 256 80 256 64
WIRE 208 96 64 96
WIRE 336 128 336 64
WIRE 336 128 256 128
WIRE 64 176 64 96
WIRE 416 192 416 128
WIRE 256 224 256 176
WIRE 64 304 64 256
WIRE 256 368 256 304
SYMBOL pmos4 208 176 M180
WINDOW 123 29 114 Right 2
SYMATTR InstName M1
SYMATTR Value2 l=0.36u w={wp}
SYMBOL voltage 416 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 1.8
SYMBOL voltage 64 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.26
SYMBOL voltage 256 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0.9
FLAG 64 304 0
FLAG 256 368 0
FLAG 416 192 0
TEXT -400 -56 Left 2 ;To find Width by Sweep
TEXT -400 -16 Left 2 !.include tsmc180.txt
TEXT -400 16 Left 2 !.param wp 1u
TEXT -400 48 Left 2 !;.step param wp 1u 50u 1u
TEXT -400 72 Left 2 !.op
TEXT -408 -160 Left 2 ;EDIC WINTER INTERNSHIP\nMOHAMMED AHMED MAJID\nGP5405
TEXT 16 -64 Left 2 ;Common Source Amplifier with Resistive Load
* Z:\home\khalils\Downloads\files\data\raw_asc\bb60df987587_TempFilter2.asc
* Generated by LTspice 26.0.1 for Windows.
* .tran 20
* .dc V2 0 5
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP491.asy)
XU1 N003 VOUT VCC 0 VOUT OP491 ;pnba In+)In-)V+)V-)OUT
V3 VCC 0 9
V2 N002 N004 SINE(1.25 1.25 0.2) AC 1
C1 N003 0 300n
R1 N001 N002 375k
V5 N004 0 SINE(0 25m 50) AC 0
C2 VOUT N001 500n
R3 N003 N001 375k
.ac dec 10 0.01 100
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 904 680
WIRE -16 16 -144 16
WIRE 416 16 48 16
WIRE 336 96 288 96
WIRE 336 112 336 96
WIRE 288 128 288 96
WIRE -288 144 -368 144
WIRE -144 144 -144 16
WIRE -144 144 -208 144
WIRE -16 144 -144 144
WIRE 112 144 64 144
WIRE 256 144 112 144
WIRE 368 160 320 160
WIRE 256 176 192 176
WIRE 368 176 368 160
WIRE 416 176 416 16
WIRE 416 176 368 176
WIRE 112 208 112 144
WIRE 192 288 192 176
WIRE 368 288 368 176
WIRE 368 288 192 288
WIRE -368 368 -368 224
SYMBOL cap 96 208 R0
SYMATTR InstName C1
SYMATTR Value 300n
SYMBOL voltage 848 144 R0
WINDOW 3 33 72 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 9
SYMATTR InstName V3
SYMBOL cap 48 0 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 500n
SYMBOL voltage -368 128 R0
WINDOW 3 24 152 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(1.25 1.25 0.2)
SYMATTR Value2 AC 1
SYMATTR InstName V2
SYMBOL OpAmps\\OP491 288 224 M180
WINDOW 3 -33 230 Left 2
SYMATTR InstName U1
SYMBOL res 80 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 375k
SYMBOL voltage -368 352 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 0
SYMATTR InstName V5
SYMATTR Value SINE(0 25m 50)
SYMBOL res -192 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 375k
FLAG 336 112 0
FLAG 848 240 0
FLAG 848 160 VCC
FLAG 288 192 VCC
FLAG 368 160 VOUT
FLAG 112 272 0
FLAG -368 448 0
TEXT 352 392 Left 2 !.ac dec 10 0.01 100
TEXT 352 424 Left 2 ;.tran 20
TEXT 352 456 Left 2 ;.dc V2 0 5
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP160-2.85.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
C1 OUT 0 1
Rload OUT 0 285
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
XU1 IN 0 N001 OUT ADP16xfd K=350.9u ;pnba Vin)GND)En)Vout
.tran 4m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP160-2.85.asy)
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 416 96 352 96
WIRE 512 96 416 96
WIRE -64 112 -64 96
WIRE 416 112 416 96
WIRE 512 112 512 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 416 208 416 176
WIRE 512 208 512 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
FLAG -64 208 0
FLAG 256 272 0
FLAG 416 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 285
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL ADP160-2.85 256 208 R0
SYMATTR InstName U1
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3980.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3980.asy)
C4 OUT 0 47 Rser=5m
C3 OUT N006 22p
XU1 OUT N001 N002 IN IN N004 NC_01 N006 N005 N003 0 LT3980 ;pnba BD)Boost)SW)Vin)Run/SS)DA)Pgood)FB)Vc)Rt)GND
R3 N006 0 100K
V1 IN 0 48
Rload OUT 0 2.5
C1 N005 0 1000p Rser=4.75K
L1 N002 OUT 8.2 Rser=5m Rpar=2K
R2 OUT N006 536K
R1 N003 0 97.6K
D1 N004 N002 MBRS360
C2 N001 N002 .47
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran .5m startup
.lib LT3980.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 944 680
WIRE 16 -32 -80 -32
WIRE 64 -32 16 -32
WIRE 608 -32 352 -32
WIRE -80 -16 -80 -32
WIRE 16 64 16 -32
WIRE 64 64 16 64
WIRE 400 64 352 64
WIRE -80 80 -80 64
WIRE 400 80 400 64
WIRE 400 160 400 144
WIRE 400 160 352 160
WIRE 480 160 400 160
WIRE 608 160 608 -32
WIRE 608 160 560 160
WIRE 688 160 608 160
WIRE 784 160 688 160
WIRE 400 176 400 160
WIRE 688 176 688 160
WIRE 784 176 784 160
WIRE 608 240 608 160
WIRE 608 240 528 240
WIRE -48 256 -64 256
WIRE 64 256 32 256
WIRE 400 256 400 240
WIRE 400 256 352 256
WIRE 528 256 528 240
WIRE 608 256 608 240
WIRE 688 272 688 240
WIRE 784 272 784 256
WIRE -32 352 -64 352
WIRE 64 352 32 352
WIRE 528 352 528 320
WIRE 528 352 352 352
WIRE 608 352 608 336
WIRE 608 352 528 352
WIRE 608 368 608 352
WIRE 208 416 208 400
WIRE 608 464 608 448
SYMBOL cap 512 256 R0
SYMATTR InstName C3
SYMATTR Value 22p
SYMBOL cap 384 80 R0
SYMATTR InstName C2
SYMATTR Value .47
SYMBOL voltage -80 -32 R0
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL res 768 160 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL cap 32 336 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
WINDOW 39 60 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000p
SYMATTR SpiceLine Rser=4.75K
SYMBOL schottky 384 240 M180
WINDOW 0 24 62 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL PowerProducts\\LT3980 208 160 R0
SYMATTR InstName U1
SYMBOL ind 464 176 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 8.2
SYMATTR SpiceLine Rser=5m Rpar=2K
SYMBOL res 592 240 R0
SYMATTR InstName R2
SYMATTR Value 536K
SYMBOL res 592 352 R0
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 672 176 R0
SYMATTR InstName C4
SYMATTR Value 47
SYMATTR SpiceLine Rser=5m
SYMBOL res 48 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 97.6K
FLAG -80 80 0
FLAG -64 256 0
FLAG -64 352 0
FLAG 208 416 0
FLAG 608 464 0
FLAG 688 272 0
FLAG 784 272 0
FLAG -80 -32 IN
FLAG 784 160 OUT
TEXT 744 392 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\44bb3376cf75_Draft8.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 N001 PMOS l=90nm w=405nm
vgs1 N002 0 -1.2
vds1 N001 0 -1.2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc vds1 0 -1.2 0.2 vgs1 0 -1.2 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 64 -192 64
WIRE 96 64 -112 64
WIRE -192 112 -192 64
WIRE -256 160 -352 160
WIRE -112 160 -112 64
WIRE -112 160 -192 160
WIRE 96 160 96 64
WIRE -256 192 -256 160
WIRE -240 192 -256 192
WIRE -48 208 -192 208
WIRE -48 240 -48 208
WIRE -48 240 -80 240
WIRE 16 240 -48 240
WIRE -48 256 -48 240
WIRE 16 256 16 240
WIRE 96 256 96 240
WIRE 96 256 16 256
WIRE -352 272 -352 240
WIRE -80 272 -80 240
WIRE -80 272 -352 272
SYMBOL voltage 96 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vds1
SYMATTR Value -1.2
SYMBOL pmos4 -240 112 R0
SYMATTR InstName M1
SYMATTR Value2 l=90nm w=405nm
SYMBOL voltage -352 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vgs1
SYMATTR Value -1.2
FLAG -48 256 0
TEXT -384 280 Left 2 !.dc vds1 0 -1.2 0.2 vgs1 0 -1.2 0.2
* Z:\tmp\asc_dec_bjh7r6w2\0cd3adb2b131_gaussian_vth_read_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
E3 V1 N001 u 0 {e3}
Vwl WL 0 {vwl}
E8 N005 NC_01 u 0 {e8}
M4 N004 N003 0 0 EECMOSN1 l={l_nmos_q_neg} w={w_nmos_q_neg}
Vdd VDD 0 {vdd}
M3 VDD N003 N004 VDD EECMOSP1 l={l_pmos_q_neg} w={w_pmos_q_neg}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2120 768
WIRE 1472 32 1472 -64
WIRE 384 64 384 -32
WIRE 448 64 384 64
WIRE 496 96 496 80
WIRE 560 96 560 32
WIRE 560 96 496 96
WIRE 496 112 496 96
WIRE -304 144 -304 96
WIRE -160 144 -160 96
WIRE 576 256 576 224
WIRE 576 256 496 256
WIRE -16 288 -64 288
WIRE 576 304 576 256
WIRE 576 304 496 304
WIRE -64 336 -64 288
WIRE 448 336 384 336
WIRE 384 384 384 336
WIRE 384 384 208 384
WIRE 496 384 496 352
WIRE 688 384 496 384
WIRE 496 400 496 384
WIRE 208 448 208 384
WIRE 560 448 496 448
WIRE 384 480 384 384
WIRE 448 480 384 480
WIRE 496 512 496 496
WIRE 560 512 560 448
WIRE 560 512 496 512
WIRE 496 528 496 512
WIRE 208 592 208 528
SYMBOL e 1472 -160 R0
SYMATTR InstName E3
SYMATTR Value {e3}
SYMBOL voltage -160 128 R0
SYMATTR InstName Vwl
SYMATTR Value {vwl}
SYMBOL e 208 576 R0
SYMATTR InstName E8
SYMATTR Value {e8}
SYMBOL nmos4 448 400 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l={l_nmos_q_neg} w={w_nmos_q_neg}
SYMATTR InstName M4
SYMATTR Value EECMOSN1
SYMBOL voltage -304 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdd
SYMATTR Value {vdd}
SYMBOL pmos4 448 256 R0
WINDOW 3 52 87 Left 2
WINDOW 123 56 60 Left 2
SYMATTR Value EECMOSP1
SYMATTR Value2 l={l_pmos_q_neg} w={w_pmos_q_neg}
SYMATTR InstName M3
FLAG -64 288 u
FLAG 496 112 0
FLAG 1424 -80 0
FLAG 1424 -128 u
FLAG 1472 -144 V1
FLAG 160 512 0
FLAG 160 656 0
FLAG 160 608 u
FLAG 160 464 V2
FLAG 496 528 0
FLAG -304 224 0
FLAG -160 224 0
FLAG -304 96 VDD
FLAG 576 224 VDD
FLAG -160 96 WL