Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\00d749119bb8_Circuit_4_2HP.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XHP (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
VU U_e vGND AC 1.5
R1 +3.3V N001 33k
C2 U_e N003 10n
R2 N001 0 33k
V1 +3.3V 0 3.3
R3 U_aH vGND 220k
R7 N002 vGND 16k
XHP N002 U_aH +3.3V 0 U_aH level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
XU1 N001 vGND +3.3V 0 vGND level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R6 U_aH N003 16k
C3 N003 N002 10n
.ac oct 10000 100 10000
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1892 1884
WIRE 64 -16 64 -48
WIRE 208 -16 64 -16
WIRE 208 16 208 -16
WIRE 448 16 272 16
WIRE 64 128 64 -16
WIRE 272 144 272 16
WIRE 304 144 272 144
WIRE 448 160 448 16
WIRE 448 160 368 160
WIRE 480 160 448 160
WIRE 208 176 208 96
WIRE 304 176 208 176
WIRE 208 224 208 176
WIRE 336 224 336 192
WIRE 64 368 64 208
WIRE 208 368 208 304
WIRE 208 368 64 368
WIRE 64 384 64 368
WIRE 464 1328 16 1328
WIRE 256 1456 128 1456
WIRE 320 1456 256 1456
WIRE 464 1456 464 1408
WIRE 464 1456 384 1456
WIRE 528 1456 464 1456
WIRE 592 1456 576 1456
WIRE 656 1456 592 1456
WIRE -80 1472 -112 1472
WIRE 16 1472 16 1328
WIRE 16 1472 -80 1472
WIRE 64 1472 16 1472
WIRE 176 1488 128 1488
WIRE 256 1520 256 1456
WIRE 656 1536 656 1456
WIRE 16 1600 16 1472
WIRE 176 1600 176 1488
WIRE 176 1600 16 1600
WIRE 176 1648 176 1600
WIRE 176 1760 176 1728
IOPIN 336 128 In
IOPIN 64 -48 Out
IOPIN 480 160 Out
IOPIN 656 1616 In
IOPIN 176 1760 In
IOPIN 96 1504 In
IOPIN 256 1600 In
SYMBOL res 240 1504 R0
SYMATTR InstName R7
SYMATTR Value 16k
SYMBOL cap 592 1440 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL OpAmps\\UniversalOpAmp2 96 1472 R180
SYMATTR InstName HP
SYMBOL cap 384 1440 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 10n
SYMBOL OpAmps\\UniversalOpAmp2 336 160 R0
SYMATTR InstName U1
SYMBOL res 192 208 R0
SYMATTR InstName R2
SYMATTR Value 33k
SYMBOL res 448 1312 R0
SYMATTR InstName R6
SYMATTR Value 16k
SYMBOL res 160 1632 R0
SYMATTR InstName R3
SYMATTR Value 220k
SYMBOL voltage 64 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 192 0 R0
SYMATTR InstName R1
SYMATTR Value 33k
SYMBOL voltage 656 1520 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1.5
SYMATTR InstName U
SYMATTR Value ""
FLAG 336 224 0
FLAG 336 128 +3.3V
FLAG 64 -48 +3.3V
FLAG 64 384 0
FLAG 480 160 vGND
FLAG 656 1616 vGND
FLAG 656 1456 U_e
FLAG 176 1760 vGND
FLAG 96 1504 +3.3V
FLAG 96 1440 0
FLAG 256 1600 vGND
FLAG -80 1472 U_aH
TEXT 1064 296 Left 2 !.ac oct 10000 100 10000
* Z:\home\khalils\Downloads\files\data\raw_asc\1f7c18728f18_opamp_05_02_03_sum_tran.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +VCC 0 12
V2 0 -VCC 12
R1 N001 N003 1K
R2 N002 N001 1k
V3 N003 0 SINE(0 1 1K)
XU1 0 N001 +VCC -VCC N002 LM741 ;pnba In+)In-)V+)V-)OUT
R3 N001 N004 2K
V4 N004 0 5
.tran 0 4m 0 0.01m
.lib LM741.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 -16 -112 -16
WIRE 192 -16 96 -16
WIRE 80 48 48 48
WIRE 352 48 352 16
WIRE 48 80 48 48
WIRE -256 96 -384 96
WIRE -112 96 -112 -16
WIRE -112 96 -176 96
WIRE 16 96 -112 96
WIRE 192 112 192 -16
WIRE 192 112 80 112
WIRE 16 128 -32 128
WIRE -384 144 -384 96
WIRE 352 160 352 128
WIRE 448 160 352 160
WIRE 48 176 48 144
WIRE 80 176 48 176
WIRE 352 192 352 160
WIRE 448 192 448 160
WIRE -256 208 -304 208
WIRE -112 208 -112 96
WIRE -112 208 -176 208
WIRE -32 208 -32 128
WIRE -304 256 -304 208
WIRE -384 288 -384 224
WIRE 352 320 352 272
WIRE -304 352 -304 336
FLAG 448 192 0
FLAG 352 16 +VCC
FLAG 352 320 -VCC
FLAG -32 208 0
FLAG -384 288 0
FLAG 80 48 +VCC
FLAG 80 176 -VCC
FLAG -304 352 0
SYMBOL Misc\\battery 352 32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL Misc\\battery 352 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL res -160 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 112 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -384 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 -145 108 Left 2
SYMATTR Value SINE(0 1 1K)
SYMATTR InstName V3
SYMBOL Opamps\\opamp2 48 48 R0
WINDOW 0 34 45 Left 2
WINDOW 3 33 81 Left 2
SYMATTR InstName U1
SYMATTR Value LM741
SYMBOL res -160 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2K
SYMBOL Misc\\battery -304 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 5
TEXT -392 432 Left 2 !.tran 0 4m 0 0.01m
TEXT -392 472 Left 2 !.lib LM741.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8047.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8047.asy)
Vin IN 0 SINE(0 1 10Meg)
R2 OUT N001 200
Rload OUT 0 150
V2 -V 0 -5
XU1 IN N001 +V -V OUT AD8047 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 5
R1 N001 0 200
.tran 1u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1432 700
WIRE 560 -1184 544 -1184
WIRE 656 -1184 640 -1184
WIRE 672 -1184 656 -1184
WIRE 768 -1184 752 -1184
WIRE 320 -1088 320 -1104
WIRE 416 -1088 416 -1104
WIRE 656 -1072 656 -1184
WIRE 672 -1072 656 -1072
WIRE 768 -1056 768 -1184
WIRE 768 -1056 736 -1056
WIRE 896 -1056 768 -1056
WIRE 672 -1040 560 -1040
WIRE 896 -1040 896 -1056
WIRE 560 -1024 560 -1040
WIRE 320 -992 320 -1008
WIRE 416 -992 416 -1008
WIRE 896 -944 896 -960
WIRE 560 -928 560 -944
SYMBOL res 880 -1056 R0
SYMATTR InstName Rload
SYMATTR Value 150
SYMBOL voltage 416 -1104 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage 320 -1104 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 560 -1040 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10Meg)
SYMBOL Opamps\\AD8047 704 -1120 R0
SYMATTR InstName U1
SYMBOL res 768 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL res 656 -1200 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200
FLAG 560 -928 0
FLAG 896 -1056 OUT
FLAG 560 -1040 IN
FLAG 704 -1088 +V
FLAG 704 -1024 -V
FLAG 544 -1184 0
FLAG 896 -944 0
FLAG 320 -1104 +V
FLAG 320 -992 0
FLAG 416 -1104 -V
FLAG 416 -992 0
TEXT 912 -848 Left 2 !.tran 1u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1413.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1413.asy)
R3 N001 N002 10Meg
R6 N004 N003 10Meg
R1 OUT N001 10Meg
V2 N002 N003 SINE(-2 1 1K)
R2 N001 0 1Meg
XU1 N004 N001 +V 0 OUT LT1413 ;pnba In+)In-)V+)V-)OUT
V3 N003 0 SINE(45 40 100)
R4 N004 0 1Meg
V1 +V 0 9
R5 N004 0 10Meg
.tran 10m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -448 160 -448 144
WIRE 32 176 -304 176
WIRE 128 176 128 96
WIRE 128 176 112 176
WIRE 192 208 192 192
WIRE 128 224 128 176
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 288 240 256 240
WIRE -448 256 -448 240
WIRE -96 256 -304 256
WIRE 0 256 -16 256
WIRE 112 256 0 256
WIRE 160 256 112 256
WIRE 0 272 0 256
WIRE 112 272 112 256
WIRE 192 288 192 272
WIRE -304 320 -304 256
WIRE 0 368 0 352
WIRE 112 368 112 352
WIRE -304 416 -304 400
SYMBOL res -16 256 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL voltage -304 160 R0
WINDOW 0 23 -6 Left 2
WINDOW 3 25 119 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(-2 1 1K)
SYMBOL res 0 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 10Meg
SYMBOL res 128 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10Meg
SYMBOL voltage -448 144 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL opamps\\LT1413 192 176 R0
SYMATTR InstName U1
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10Meg
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL voltage -304 304 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(45 40 100)
SYMBOL res 96 256 R0
SYMATTR InstName R5
SYMATTR Value 10Meg
FLAG -448 256 0
FLAG 192 192 +V
FLAG -448 144 +V
FLAG 16 96 0
FLAG 192 288 0
FLAG 112 368 0
FLAG 0 368 0
FLAG -304 416 0
FLAG 288 240 OUT
TEXT 224 424 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1761-1.25.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1761-1.25.asy)
C3 N002 0 1
C1 N004 0 1
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1761 Radj=8333.33 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
C2 N003 0 10n
C4 OUT 0 10
V1 IN 0 1.6
R2 N001 IN 50K
R1 OUT 0 2
.tran 1m startup
.lib ADP1761.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1016 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ADP1761-1.25 224 176 R0
SYMATTR InstName U1
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL voltage -128 -32 R0
SYMATTR InstName V1
SYMATTR Value 1.6
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\21f36681fd3f_LeakSensor.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N003 0 100
R1 N001 N002 27k
M1 N003 N002 N001 N001 AO6407
V1 N001 0 3.3
R2 N002 0 1k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 -160 304 -160
WIRE 304 -128 304 -160
WIRE 416 -96 416 -160
WIRE 304 16 304 -48
WIRE 304 16 160 16
WIRE 160 48 160 16
WIRE 304 112 304 16
WIRE 256 128 160 128
WIRE 160 160 160 128
WIRE 160 256 160 240
WIRE 304 256 304 208
WIRE 400 256 304 256
SYMBOL res 384 240 R0
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL pmos 256 208 M180
SYMATTR InstName M1
SYMATTR Value AO6407
SYMBOL res 144 32 R0
SYMATTR InstName R1
SYMATTR Value 27k
SYMBOL res 144 144 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 304 -32 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG 400 336 0
FLAG 416 -96 0
FLAG 160 256 0
TEXT -80 64 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\2aee8309a19b_1-Bit_SRAM.asc
* Generated by LTspice 26.0.1 for Windows.
VREAD N001 0 PULSE(0 5 0 5n 5n 40m 80m)
M10 N017 N001 N013 N016 NMOS
M7 N012 N005 0 N019 NMOS
M1 OUT N013 N002 N003 PMOS
V2 N014 0 PULSE(0 5 0 5n 5n 20m 40m)
V3 N017 0 PULSE(0 5 0 5n 5n 10m 20m)
M3 N002 N005 N006 N004 PMOS
M9 N012 N006 N006 N007 NMOS
M6 0 N013 N011 N018 NMOS
V1 N002 0 5
M8 N006 N012 N012 N010 PMOS
M4 OUT NC_01 N011 N008 PMOS
M5 N011 OUT OUT N009 NMOS
M2 N005 N001 N014 N015 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 180m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1216 680
WIRE 256 -48 -144 -48
WIRE 704 -48 256 -48
WIRE 384 64 272 64
WIRE 512 64 384 64
WIRE 272 112 272 80
WIRE 512 112 512 80
WIRE 464 144 448 144
WIRE 272 160 96 160
WIRE 96 192 96 160
WIRE 512 224 512 160
WIRE 656 224 512 224
WIRE 96 240 96 192
WIRE 256 240 96 240
WIRE 96 272 96 240
WIRE 96 272 0 272
WIRE 208 272 96 272
WIRE 512 272 512 224
WIRE 512 272 400 272
WIRE 608 272 512 272
WIRE 256 288 256 240
WIRE 656 288 656 224
WIRE 608 320 608 288
WIRE 0 352 0 320
WIRE 208 352 208 320
WIRE 400 352 400 320
WIRE 96 368 0 368
WIRE 208 368 96 368
WIRE 496 368 400 368
WIRE 608 368 496 368
WIRE -144 416 -144 -48
WIRE 320 416 320 80
WIRE 688 416 320 416
WIRE 704 416 704 -48
WIRE 448 432 448 144
WIRE 448 432 160 432
WIRE 96 448 96 368
WIRE 272 448 96 448
WIRE 352 448 352 352
WIRE 496 448 496 368
WIRE 496 448 352 448
WIRE -160 464 -192 464
WIRE -80 464 -112 464
WIRE 160 464 160 432
WIRE 160 464 -64 464
WIRE 320 464 320 416
WIRE 688 464 688 416
WIRE 736 464 704 464
WIRE 848 464 784 464
WIRE 272 528 272 496
WIRE 448 528 448 432
WIRE 496 528 496 496
WIRE 384 544 272 544
WIRE 496 544 384 544
IOPIN 96 192 Out
SYMBOL nmos4 656 368 R180
SYMATTR InstName M9
SYMBOL nmos4 320 544 R180
SYMATTR InstName M6
SYMBOL voltage 384 80 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL pmos4 320 160 R180
SYMATTR InstName M1
SYMBOL pmos4 -48 272 R0
SYMATTR InstName M4
SYMBOL pmos4 464 64 R0
SYMATTR InstName M3
SYMBOL nmos4 256 368 R180
SYMATTR InstName M5
SYMBOL nmos4 -64 416 R90
SYMATTR InstName M2
SYMBOL nmos4 448 448 R0
SYMATTR InstName M7
SYMBOL voltage 256 -32 R180
WINDOW 0 24 96 Left 2
WINDOW 3 -10 186 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName READ
SYMATTR Value PULSE(0 5 0 5n 5n 40m 80m)
SYMBOL voltage 848 448 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 5n 5n 10m 20m)
SYMBOL voltage -192 448 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 5n 5n 20m 40m)
SYMBOL pmos4 352 272 R0
SYMATTR InstName M8
SYMBOL nmos4 784 416 R90
SYMATTR InstName M10
FLAG 384 -16 0
FLAG 384 544 0
FLAG 96 192 OUT
FLAG -192 544 0
FLAG 848 544 0
FLAG 256 -128 0
TEXT -224 568 Left 2 !.tran 180m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4413-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4413-2.asy)
VCC N004 0 5
VWALL IN 0 5
C3 OUT 0 4.7
RLOAD OUT 0 10
R1 N004 N003 470K
XU1 N001 0 0 0 N005 OUT N002 IN N003 OUT LTC4413-2 ;pnba INA)ENBA)GND)ENBB)INB)OUTB)OVP)OVI)STAT)OUTA
C2 N001 0 10
VBAT N005 0 3.6
M1 N001 N002 IN IN IRLML6402
C1 IN 0 0.1 Rser=1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m startup
.lib LTC4413-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 928 680
WIRE 416 -48 -320 -48
WIRE -416 64 -448 64
WIRE -320 64 -320 -48
WIRE -320 64 -416 64
WIRE -224 64 -320 64
WIRE -80 64 -128 64
WIRE 80 64 -80 64
WIRE 368 64 336 64
WIRE 496 64 368 64
WIRE 592 64 496 64
WIRE 496 80 496 64
WIRE 592 80 592 64
WIRE -448 96 -448 64
WIRE -320 96 -320 64
WIRE -80 96 -80 64
WIRE 80 128 32 128
WIRE 416 128 416 -48
WIRE 416 128 336 128
WIRE 496 176 496 144
WIRE 592 176 592 160
WIRE -448 192 -448 176
WIRE -80 192 -80 160
WIRE 32 192 32 128
WIRE 80 192 32 192
WIRE 416 192 336 192
WIRE -320 224 -320 160
WIRE 32 256 32 192
WIRE 80 256 32 256
WIRE 464 256 336 256
WIRE 592 256 544 256
WIRE 32 272 32 256
WIRE 592 272 592 256
WIRE 80 320 -112 320
WIRE 368 320 368 64
WIRE 368 320 336 320
WIRE -112 352 -112 320
WIRE 592 368 592 352
WIRE -112 448 -112 432
WIRE -208 496 -208 112
WIRE 416 496 416 192
WIRE 416 496 -208 496
SYMBOL voltage -448 80 R0
WINDOW 0 17 15 Left 2
WINDOW 3 32 90 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName WALL
SYMATTR Value 5
SYMBOL pmos -128 112 M270
WINDOW 0 92 99 VLeft 2
WINDOW 3 67 100 VLeft 2
SYMATTR InstName M1
SYMATTR Value IRLML6402
SYMBOL cap -336 96 R0
WINDOW 39 24 84 Left 2
SYMATTR SpiceLine Rser=1
SYMATTR InstName C1
SYMATTR Value 0.1
SYMBOL res 560 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 470K
SYMBOL res 576 64 R0
SYMATTR InstName LOAD
SYMATTR Value 10
SYMBOL SpecialFunctions\\LTC4413-2 208 192 R0
SYMATTR InstName U1
SYMBOL voltage 592 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VCC
SYMATTR Value 5
SYMBOL cap 480 80 R0
WINDOW 0 24 16 Left 2
SYMATTR InstName C3
SYMATTR Value 4.7
SYMBOL cap -96 96 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL voltage -112 336 R0
WINDOW 0 17 15 Left 2
WINDOW 3 21 97 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName BAT
SYMATTR Value 3.6
FLAG -448 192 0
FLAG -112 448 0
FLAG -416 64 IN
FLAG 496 176 0
FLAG 592 176 0
FLAG 592 368 0
FLAG 592 64 OUT
FLAG -320 224 0
FLAG -80 192 0
FLAG 32 272 0
TEXT -184 552 Left 2 !.tran 100m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1b89ade6e31a_Controlled_Cap_non_phys.asc
* Generated by LTspice 26.0.1 for Windows.
* Non Charge-preserving (non physical) Voltage Controlled Capacitors
* C=Cref*V(ctrl)
* C=Lref*V(ctrl)
* (usable e.g. for simulation of a depot of shares. C=price/share charge=$$)
Cref c1 P001 1
Vctrl ctrl 0 PULSE(1 2 1 10n 10n)
Vs P001 0 0
Bc1 c1 0 I=V(ctrl)*I(Vs)-I(Vs)
I2 0 c2 PULSE(0 1 10n 10n 10n 999)
G1 0 x1 c2 0 1
I1 0 c1 PULSE(0 1 10n 10n 10n 999)
Bc2 c2 0 I=V(x1)*V(ctrl)
Rdummy c2 0 1G
Lref x1 0 1 Rser=0
.tran 2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 -176 -128 -176
WIRE 432 -176 -32 -176
WIRE 560 -176 432 -176
WIRE -32 -144 -32 -176
WIRE 432 -96 432 -176
WIRE -32 -32 -32 -64
WIRE -368 0 -432 0
WIRE -432 32 -432 0
WIRE -160 96 -256 96
WIRE 96 96 -160 96
WIRE 432 96 96 96
WIRE 560 96 432 96
WIRE -32 144 -112 144
WIRE -256 176 -256 96
WIRE -112 176 -112 144
WIRE -32 176 -32 144
WIRE 96 176 96 96
WIRE 432 176 432 96
WIRE -160 192 -160 96
RECTANGLE Normal 208 0 -208 -192
RECTANGLE Normal 224 320 -288 48
SYMBOL voltage -128 -128 R0
WINDOW 0 -52 17 Left 0
WINDOW 3 -53 52 Left 0
SYMATTR InstName Vs
SYMATTR Value 0
SYMBOL ind -48 160 R0
WINDOW 39 39 95 Left 0
WINDOW 3 41 66 Left 0
SYMATTR SpiceLine Rser=0
SYMATTR InstName Lref
SYMATTR Value 1
SYMBOL current 432 256 R180
WINDOW 0 24 88 Left 0
WINDOW 3 -141 -37 Left 0
SYMATTR InstName I2
SYMATTR Value PULSE(0 1 10n 10n 10n 999)
SYMBOL cap -144 -176 R0
WINDOW 3 23 53 Left 0
WINDOW 0 35 20 Left 0
SYMATTR Value 1
SYMATTR InstName Cref
SYMBOL bi 96 176 R0
WINDOW 3 -58 125 Left 0
SYMATTR InstName Bc2
SYMATTR Value I=V(x1)*V(ctrl)
SYMBOL voltage -432 16 R0
WINDOW 0 29 36 Left 0
WINDOW 3 -99 135 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vctrl
SYMATTR Value PULSE(1 2 1 10n 10n)
SYMBOL current 432 -16 R180
WINDOW 0 24 88 Left 0
WINDOW 3 -135 -37 Left 0
SYMATTR InstName I1
SYMATTR Value PULSE(0 1 10n 10n 10n 999)
SYMBOL bi -32 -144 R0
WINDOW 3 13 86 Left 0
SYMATTR Value I=V(ctrl)*I(Vs)-I(Vs)
SYMATTR InstName Bc1
SYMBOL res -272 160 R0
WINDOW 0 -8 131 Left 0
SYMATTR InstName Rdummy
SYMATTR Value 1G
SYMBOL g -112 160 R0
SYMATTR InstName G1
SYMATTR Value 1
FLAG -112 256 0
FLAG -32 256 0
FLAG 96 256 0
FLAG -160 240 0
FLAG -32 144 x1
FLAG 560 96 c2
FLAG -432 112 0
FLAG -368 0 ctrl
FLAG 432 256 0
FLAG -256 256 0
FLAG -32 -32 0
FLAG -128 -32 0
FLAG 560 -176 c1
FLAG 432 -16 0
TEXT -412 -264 Left 0 !.tran 2
TEXT -248 -272 Left 0 ;Non Charge-preserving (non physical) Voltage Controlled Capacitors
TEXT 32 -112 Left 0 ;C=Cref*V(ctrl)
TEXT -96 72 Left 0 ;C=Lref*V(ctrl)
TEXT -256 -232 Left 0 ;(usable e.g. for simulation of a depot of shares. C=price/share charge=$$)
* Z:\home\khalils\Downloads\files\data\raw_asc\25ddda09b1f6_6269.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 2.5
V2 -V 0 -2.5
R3 Out N001 20K
I1 +V N001 0 AC 1
Cparasitic Out N001 150f
C3 +V N001 700f
XU1 NC_01 NC_02 N001 Out NC_03 NC_04 Out NC_05 NC_06 NC_07 LTC6269 ;pnba +INA)-INA)OUTA)V+)V-)+INB)-INB)OUTB)_SDA)_SDB
.ac oct 10 10K 1G
* PhotoDiode
* FCI-125G-006
* 20K Ohm Gain Trans-Impedance Amplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6269.asy)
.lib LTC6269.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4472 1028
WIRE -2784 -656 -2784 -720
WIRE -2784 -656 -2912 -656
WIRE -2784 -624 -2784 -656
WIRE -2912 -608 -2912 -656
WIRE -2576 -608 -2640 -608
WIRE -2448 -608 -2512 -608
WIRE -2912 -512 -2912 -544
WIRE -2784 -512 -2784 -544
WIRE -2784 -512 -2912 -512
WIRE -2640 -512 -2640 -608
WIRE -2640 -512 -2784 -512
WIRE -2576 -512 -2640 -512
WIRE -2448 -512 -2448 -608
WIRE -2448 -512 -2496 -512
WIRE -2960 -352 -2960 -368
WIRE -2832 -352 -2832 -368
WIRE -2640 -352 -2640 -512
WIRE -2624 -352 -2640 -352
WIRE -2448 -320 -2448 -512
WIRE -2448 -320 -2480 -320
WIRE -2416 -320 -2448 -320
WIRE -2624 -288 -2656 -288
WIRE -2960 -256 -2960 -272
WIRE -2832 -256 -2832 -272
FLAG -2960 -256 0
FLAG -2832 -256 0
FLAG -2960 -368 +V
FLAG -2832 -368 -V
FLAG -2656 -288 0
FLAG -2416 -320 Out
FLAG -2784 -720 +V
FLAG -2592 -400 +V
FLAG -2544 -240 +V
FLAG -2592 -240 -V
SYMBOL voltage -2960 -368 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage -2832 -368 R0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res -2480 -528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL current -2784 -624 R0
WINDOW 3 38 44 Left 2
WINDOW 123 16 80 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMBOL cap -2512 -624 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName Cparasitic
SYMATTR Value 150f
SYMBOL cap -2928 -608 R0
SYMATTR InstName C3
SYMATTR Value 700f
SYMBOL opamps\\LTC6269 -2592 -320 R0
SYMATTR InstName U1
TEXT -2432 -240 Left 2 !.ac oct 10 10K 1G
TEXT -2872 -680 Center 2 ;PhotoDiode
TEXT -2848 -488 Center 2 ;FCI-125G-006
TEXT -2696 -800 Bottom 2 ;20K Ohm Gain Trans-Impedance Amplifier
RECTANGLE Normal -2696 -464 -2992 -704 2
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6656-1.25.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT6656-1.25.asy)
C1 N002 0 1
V1 N001 0 PWL(0 0 1m 0 +100n 1.75)
XU1 0 N001 N002 LT6656-1.25 ;pnba GND)IN)OUT
.tran 20m
.lib LT6656.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 836
WIRE 96 160 -176 160
WIRE 480 160 320 160
WIRE -176 176 -176 160
WIRE 480 176 480 160
WIRE 208 256 208 224
WIRE 480 256 480 240
WIRE -176 272 -176 256
SYMBOL cap 464 176 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL LT6656-1.25 208 160 R0
SYMATTR InstName U1
SYMBOL voltage -176 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1m 0 +100n 1.75)
FLAG 480 256 0
FLAG 208 256 0
FLAG -176 272 0
TEXT 448 344 Left 2 !.tran 20m