Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1963-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1963-1.5.asy)
XU1 IN IN 0 OUT OUT LT1963-1.5 ;pnba _SHDN)IN)GND)OUT)SENSE
Rload OUT 0 1K
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 10 Rser=50m
.tran 1
.lib LT1963.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 48 -208 48
WIRE 32 48 16 48
WIRE 352 48 320 48
WIRE 400 48 352 48
WIRE 560 48 400 48
WIRE -208 64 -208 48
WIRE 400 64 400 48
WIRE 560 64 560 48
WIRE 16 144 16 48
WIRE 32 144 16 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 400 160 400 128
WIRE 560 160 560 144
WIRE 176 240 176 208
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL res 544 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL cap 384 64 R0
WINDOW 3 40 33 Left 2
WINDOW 39 24 59 Left 2
SYMATTR Value 10
SYMATTR SpiceLine Rser=50m
SYMATTR InstName C1
SYMBOL PowerProducts\\LT1963-1.5 176 96 R0
SYMATTR InstName U1
FLAG -208 160 0
FLAG 400 160 0
FLAG 560 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 560 48 OUT
TEXT 376 216 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\3203a550ff53_task_1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0
D1 N001 0 Botov
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model Botov D IS=12n N=1 RS=35m TT=5n CJO=12p
.dc V1 0 1 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1044 680
WIRE 272 -160 96 -160
WIRE 96 -128 96 -160
WIRE 272 -128 272 -160
WIRE 96 -16 96 -48
WIRE 128 -16 96 -16
WIRE 272 -16 272 -64
WIRE 272 -16 128 -16
FLAG 128 -16 0
SYMBOL voltage 96 -144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL diode 256 -128 R0
SYMATTR InstName D1
SYMATTR Value Botov
TEXT 88 304 Left 2 !.model Botov D IS=12n N=1 RS=35m TT=5n CJO=12p
TEXT 88 328 Left 2 !.dc V1 0 1 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\0854beaca7a7_R__L.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N002 0 70m
R1 N002 N001 5k
V N001 0 SINE(0 3 2K)
.tran 0 0.01 0 0.00001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 16 16 16
WIRE 432 16 224 16
WIRE 16 128 16 16
WIRE 432 176 432 16
WIRE 16 304 16 208
WIRE 432 304 432 256
WIRE 432 304 16 304
WIRE 16 336 16 304
SYMBOL Misc\\signal 16 112 R0
SYMATTR InstName V
SYMATTR Value SINE(0 3 2K)
SYMBOL ind 416 160 R0
SYMATTR InstName L1
SYMATTR Value 70m
SYMBOL res 240 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5k
FLAG 16 336 0
TEXT 80 408 Left 2 !.tran 0 0.01 0 0.00001
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2164-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2164-1.8.asy)
R4 N003 0 45.3K
V1 IN 0 5
C1 N001 0 100n
C3 OUT 0 80 Rser=2m
L1 N002 OUT 1 Rser=6m
R3 OUT N004 100K
Rload OUT 0 0.6
XU1 N001 N003 IN OUT 0 0 N002 IN N001 N001 N004 ADP2164-x.x Rtop=667K Rbot=333K ;pnba Sync)Rt)TRK)FB)GND)PGND)SW)Pvin)Vin)EN)Pgood
R5 IN N001 10
.tran 2m startup
.lib ADP2164-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 728
WIRE -80 -112 -288 -112
WIRE 176 -112 -80 -112
WIRE 384 -112 176 -112
WIRE -288 -96 -288 -112
WIRE -80 -96 -80 -112
WIRE 176 -80 176 -112
WIRE -288 0 -288 -16
WIRE -160 0 -176 0
WIRE -80 0 -80 -16
WIRE -80 0 -96 0
WIRE 0 0 -80 0
WIRE 384 0 384 -112
WIRE 384 0 352 0
WIRE -80 112 -80 0
WIRE 0 112 -80 112
WIRE 384 112 352 112
WIRE 496 112 464 112
WIRE 576 112 496 112
WIRE 672 112 576 112
WIRE 576 128 576 112
WIRE 672 128 672 112
WIRE -80 224 -80 112
WIRE 0 224 -80 224
WIRE 496 224 496 112
WIRE 496 224 352 224
WIRE 576 224 576 192
WIRE 672 224 672 208
WIRE -96 368 -112 368
WIRE 0 368 -16 368
WIRE 384 368 352 368
WIRE 496 368 496 224
WIRE 496 368 464 368
WIRE 112 496 112 480
WIRE 240 496 240 480
SYMBOL res 656 112 R0
SYMATTR InstName Rload
SYMATTR Value 0.6
SYMBOL ind 368 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=6m
SYMBOL ADP2164-1.8 176 192 R0
SYMATTR InstName U1
SYMBOL res 480 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 560 128 R0
SYMATTR InstName C3
SYMATTR Value 80
SYMATTR SpiceLine Rser=2m
SYMBOL cap -96 16 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL voltage -288 -112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -96 -112 R0
SYMATTR InstName R5
SYMATTR Value 10
SYMBOL res 0 352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 45.3K
FLAG 112 496 0
FLAG -112 368 0
FLAG -288 0 0
FLAG 576 224 0
FLAG 672 224 0
FLAG 672 112 OUT
FLAG -288 -112 IN
FLAG 240 496 0
FLAG -176 0 0
TEXT 632 400 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7142-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7142-1.8.asy)
C1 OUT 0 2.2 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=1.8 ;pnba Vin)Sense)EN)SS)Vout)GND
C2 N001 0 4.7n
Rload OUT 0 10
V1 IN 0 2.8
.tran 6m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL ADP7142-1.8 224 128 R0
SYMATTR InstName U1
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.8
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\271839e17489_ls_cpr_.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 AC 1
C1 N001 0 {C}
R2 0 N001 {rC}
L1 IN N001 {L} Rser=0
.ac oct 50 1k 30meg
.param L=1m rL=1m
.param C=1m rC=1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 96 -144 96
WIRE -16 96 -96 96
WIRE 144 96 64 96
WIRE 208 96 144 96
WIRE -144 128 -144 96
WIRE 144 128 144 96
WIRE 208 128 208 96
WIRE -144 240 -144 208
WIRE 144 240 144 208
WIRE 144 240 -144 240
WIRE 208 240 208 192
WIRE 208 240 144 240
WIRE -144 256 -144 240
FLAG -144 256 0
FLAG -96 96 IN
SYMBOL voltage -144 112 R0
WINDOW 123 41 58 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL cap 192 128 R0
SYMATTR InstName C1
SYMATTR Value {C}
SYMBOL res 160 224 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value {rC}
SYMBOL ind -32 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value {L}
SYMATTR SpiceLine Rser=0
TEXT -160 312 Left 2 !.ac oct 50 1k 30meg
TEXT -168 352 Left 2 !.param L=1m rL=1m\n.param C=1m rC=1m
* Z:\home\khalils\Downloads\files\data\raw_asc\23ddd7891f6d_integrator.asc
* Generated by LTspice 26.0.1 for Windows.
V2 in 0 PULSE(0 5 8n {dvdt} 4n 100n 200n 1)
R1 0 out 50
C1 out in 1pF
.tran 40n
.param tc {1p * 50}
.param delay {tc}
.step param dvdt list 5n 10n 20n
* Integrator
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 320 240 288 240
WIRE 400 240 320 240
WIRE 544 240 464 240
WIRE 288 272 288 240
WIRE 544 272 544 240
WIRE 544 368 544 352
WIRE 288 384 288 352
FLAG 544 368 0
FLAG 288 384 0
FLAG 544 240 out
FLAG 320 240 in
SYMBOL voltage 288 256 R0
WINDOW 3 -181 158 Left 2
SYMATTR Value PULSE(0 5 8n {dvdt} 4n 100n 200n 1)
SYMATTR InstName V2
SYMBOL Res 560 368 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL Cap 464 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1pF
TEXT 376 512 Left 2 !.tran 40n
TEXT 376 568 Left 2 !.param tc {1p * 50}\n.param delay {tc}
TEXT 376 544 Left 2 !.step param dvdt list 5n 10n 20n
TEXT 240 112 Left 6 ;Integrator
* Z:\home\khalils\Downloads\files\data\raw_asc\b9fab507a88d_mosfet-driver.asc
* Generated by LTspice 26.0.1 for Windows.
* This circuit simulate the driving of the MOSFET\n \nWith this choise of components the slew rate of the signal at the \noutput is of about 1us, which means we are losing 1us of duty-cycle.\n \nR1 is chose in order to limit the current sinked from the microcontroller and \nalso to speed up the bjt commutation.\nIt also saturates the bjt with V2/R2 < Ib*B.\n \nR2 is a pull-up resistor. It soure the gate capacitance during ON-time.\nIt is chosen in order to mantain low current trhought the bjt, but low enought \nto charge C2 (gate capacitance) as fast as possible.
V2 N001 0 8
V1 N003 0 PULSE(0 3.3 0 20n 20n 20u 50u)
R2 N002 N001 100R
Q1 N002 N004 0 0 2N2222
C2 N002 0 1480p
R1 N004 N003 200R
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 8m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1816 680
WIRE 336 -224 -144 -224
WIRE -144 -144 -144 -224
WIRE 336 -64 336 -224
WIRE -144 -16 -144 -64
WIRE 336 80 336 16
WIRE 624 80 336 80
WIRE 624 112 624 80
WIRE 336 128 336 80
WIRE 144 176 -32 176
WIRE 272 176 224 176
WIRE -32 240 -32 176
WIRE 624 272 624 176
WIRE -32 448 -32 320
WIRE 336 448 336 224
SYMBOL res 352 32 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 100R
SYMBOL npn 272 128 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL cap 608 112 R0
SYMATTR InstName C2
SYMATTR Value 1480p
SYMBOL res 240 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200R
SYMBOL voltage -144 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 8
SYMBOL voltage -32 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 20n 20n 20u 50u)
FLAG -32 448 0
FLAG 336 448 0
FLAG -144 -16 0
FLAG 624 272 0
TEXT -178 472 Left 2 !.tran 8m
TEXT 904 -368 Left 2 ;This circuit simulate the driving of the MOSFET\n \nWith this choise of components the slew rate of the signal at the \noutput is of about 1us, which means we are losing 1us of duty-cycle.\n \nR1 is chose in order to limit the current sinked from the microcontroller and \nalso to speed up the bjt commutation.\nIt also saturates the bjt with V2/R2 < Ib*B.\n \nR2 is a pull-up resistor. It soure the gate capacitance during ON-time.\nIt is chosen in order to mantain low current trhought the bjt, but low enought \nto charge C2 (gate capacitance) as fast as possible.
* Z:\home\khalils\Downloads\files\data\raw_asc\1b5eb9f29ccb_2908-C1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2908-C1.asy)
V7 N006 0 .55
R2 N001 N007 10K
XU1 0 N007 N005 N001 N002 N004 N006 N003 LTC2908-C1 ;pnba GND)_RST)Vadj5)V1)Vadj1)Vadj2)Vadj3)Vadj4
V1 N005 0 .55
V2 N002 0 .55
V3 N001 0 2.5
V5 N004 0 PWL(0 0 1 .55 2 .55 2.000001 0)
V4 N003 0 .55
.tran 15
.lib LTC2908-C1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 5272 1528
WIRE -304 -464 -544 -464
WIRE -96 -464 -304 -464
WIRE -544 -448 -544 -464
WIRE -96 -448 -96 -464
WIRE -304 -368 -304 -464
WIRE -544 -352 -544 -368
WIRE -880 -320 -896 -320
WIRE -464 -320 -800 -320
WIRE 0 -320 -144 -320
WIRE 96 -320 80 -320
WIRE -704 -240 -752 -240
WIRE -464 -240 -624 -240
WIRE -64 -240 -144 -240
WIRE 32 -240 16 -240
WIRE -464 -160 -592 -160
WIRE -96 -160 -96 -368
WIRE -96 -160 -144 -160
WIRE -592 -144 -592 -160
WIRE -304 -96 -304 -112
WIRE -592 -48 -592 -64
SYMBOL voltage -784 -320 R90
WINDOW 0 -32 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName V2
SYMATTR Value .55
SYMBOL res -112 -464 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage -544 -464 R0
SYMATTR InstName V3
SYMATTR Value 2.5
SYMBOL voltage -592 -160 R0
SYMATTR InstName V7
SYMATTR Value .55
SYMBOL voltage -80 -240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 VBottom 0
SYMATTR InstName V1
SYMATTR Value .55
SYMBOL voltage -608 -240 R90
WINDOW 0 -32 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName V5
SYMATTR Value PWL(0 0 1 .55 2 .55 2.000001 0)
SYMBOL LTC2908-C1 -304 -240 R0
SYMATTR InstName U1
SYMBOL voltage -16 -320 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 VBottom 0
SYMATTR InstName V4
SYMATTR Value .55
FLAG -304 -96 0
FLAG 96 -320 0
FLAG -752 -240 0
FLAG -896 -320 0
FLAG -592 -48 0
FLAG 32 -240 0
FLAG -544 -352 0
TEXT -48 -104 Left 0 !.tran 15
* Z:\home\khalils\Downloads\files\data\raw_asc\1e032fc602d6_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 PULSE(0 3 5u 1n 1n 5u 10u)
C1 N002 N001 3.3n
R1 N002 0 330
.tran 50u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 160 -16 160
WIRE 192 160 128 160
WIRE -16 192 -16 160
WIRE 192 192 192 160
WIRE -16 288 -16 272
WIRE 192 288 192 272
SYMBOL res 176 176 R0
SYMATTR InstName R1
SYMATTR Value 330
SYMBOL cap 128 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 3.3n
SYMBOL voltage -16 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 3 5u 1n 1n 5u 10u)
FLAG -16 288 0
FLAG 192 288 0
TEXT 40 304 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8031.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8031.asy)
XU1 0 IN N003 NC_01 IN NC_02 N001 N002 OUT N002 NC_03 LTM8031 ;pnba GND)Vin)Adj)Share)Run/SS)Pgood)Rt)BIAS)Out)AUX)Fin
R1 N001 0 44.2K
V1 IN 0 24
R2 N003 0 47.5K
C1 OUT 0 10
Rload OUT 0 5
.tran 1m startup
.lib LTM8031.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 64 -96 64
WIRE 160 64 64 64
WIRE -96 80 -96 64
WIRE 160 80 160 64
WIRE 64 144 64 64
WIRE 80 144 64 144
WIRE 448 144 368 144
WIRE 544 144 448 144
WIRE 448 160 448 144
WIRE 544 160 544 144
WIRE -96 176 -96 160
WIRE -16 208 -32 208
WIRE 80 208 64 208
WIRE 384 208 368 208
WIRE 448 256 448 224
WIRE 544 256 544 240
WIRE 384 272 384 208
WIRE 384 272 368 272
WIRE -16 336 -32 336
WIRE 80 336 64 336
WIRE 224 400 224 384
SYMBOL voltage -96 64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 528 144 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL PowerProducts\\LTM8031 224 240 R0
SYMATTR InstName U1
SYMBOL cap 432 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 80 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 44.2K
SYMBOL res 80 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 47.5K
FLAG -96 176 0
FLAG -32 208 0
FLAG -32 336 0
FLAG 224 400 0
FLAG 448 256 0
FLAG 544 256 0
FLAG -96 64 IN
FLAG 544 144 OUT
TEXT 448 352 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM7223C.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM7223C.asy)
C1 VOA 0 2n
V3 VDD1 0 5
V2 inputB 0 PULSE(5 0 0 2n 2n 5u 10u)
XU1 0 inputA inputB 0 VDD1 0 VOB VDDB 0 VOA VDDA ADuM7223C ;pnba GND1)VIA)VIB)DISABLE)VDD1)GNDB)VOB)VDDB)GNDA)VOA)VDDA
V6 VDDB 0 12
V1 inputA 0 PULSE(0 5 0 2n 2n 5u 10u)
C2 VOB 0 2n
V5 VDDA 0 12
.tran 50u
.lib ADuM7223C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1228 692
WIRE 416 16 368 16
WIRE 688 16 416 16
WIRE 64 32 -64 32
WIRE -64 48 -64 32
WIRE 416 80 368 80
WIRE 592 80 416 80
WIRE 592 96 592 80
WIRE 16 112 -448 112
WIRE 64 112 16 112
WIRE 688 128 688 96
WIRE 432 144 368 144
WIRE -448 160 -448 112
WIRE 592 176 592 160
WIRE 16 192 -288 192
WIRE 64 192 16 192
WIRE 416 224 368 224
WIRE 688 224 416 224
WIRE -448 256 -448 240
WIRE 64 272 -80 272
WIRE 416 288 368 288
WIRE 592 288 416 288
WIRE -288 304 -288 272
WIRE -80 304 -80 272
WIRE 592 304 592 288
WIRE 16 352 -80 352
WIRE 64 352 16 352
WIRE 432 352 368 352
WIRE 432 368 432 352
WIRE -80 384 -80 352
WIRE 592 384 592 368
WIRE -80 480 -80 464
SYMBOL voltage -288 176 R0
WINDOW 0 20 108 Left 2
WINDOW 3 39 40 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(5 0 0 2n 2n 5u 10u)
SYMBOL voltage -80 368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 32 90 Left 2
SYMATTR Value 5
SYMATTR InstName V3
SYMBOL voltage 688 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 12
SYMBOL ADuM7223C 224 112 R0
SYMATTR InstName U1
SYMBOL voltage -448 144 R0
WINDOW 0 30 80 Left 2
WINDOW 3 18 -5 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 2n 2n 5u 10u)
SYMBOL cap 576 304 R0
SYMATTR InstName C2
SYMATTR Value 2n
SYMBOL cap 576 96 R0
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL voltage 688 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName V5
SYMATTR Value 12
FLAG -80 480 0
FLAG -448 256 0
FLAG -288 304 0
FLAG 592 176 0
FLAG 592 384 0
FLAG 416 288 VOB
FLAG 416 80 VOA
FLAG 432 368 0
FLAG 432 144 0
FLAG 16 192 inputB
FLAG 688 304 0
FLAG 688 128 0
FLAG 16 352 VDD1
FLAG -64 48 0
FLAG 416 224 VDDB
FLAG 16 112 inputA
FLAG 416 16 VDDA
FLAG -80 304 0
TEXT 64 440 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1086-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1086-5.asy)
V1 IN 0 PWL(0 0 1 10) Rser=0.1
XU1 0 OUT IN LT1086-5 ;pnba ADJ)OUT)IN
R3 OUT 0 10
C1 OUT 0 10
.tran 1
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1344 896
WIRE 1888 896 1808 896
WIRE 2000 896 1888 896
WIRE 1344 912 1344 896
WIRE 1888 912 1888 896
WIRE 2000 912 2000 896
WIRE 1344 1008 1344 992
WIRE 1888 1008 1888 976
WIRE 2000 1008 2000 992
WIRE 1680 1040 1680 992
SYMBOL PowerProducts\\LT1086-5 1680 896 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1344 896 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMATTR SpiceLine Rser=0.1
SYMBOL cap 1872 912 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL RES 1984 896 R0
SYMATTR InstName R3
SYMATTR Value 10
FLAG 2000 896 OUT
FLAG 2000 1008 0
FLAG 1344 1008 0
FLAG 1888 1008 0
FLAG 1680 1040 0
FLAG 1344 896 IN
TEXT 1848 1088 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\001d4de1faff_Q2_iii__-_PartA.asc
* Generated by LTspice 26.0.1 for Windows.
R N001 0 2
L N001 0 2
C N001 0 0.125
I1 0 N001 10
.tran 0 30s 0 0.00002s
.ic V(n001) = 0
.ic I(L) = 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1360 680
WIRE 208 -208 48 -208
WIRE 368 -208 208 -208
WIRE 528 -208 368 -208
WIRE 48 -160 48 -208
WIRE 208 -144 208 -208
WIRE 368 -144 368 -208
WIRE 528 -144 528 -208
WIRE 48 0 48 -80
WIRE 208 0 208 -64
WIRE 208 0 48 0
WIRE 304 0 208 0
WIRE 368 0 368 -64
WIRE 368 0 304 0
WIRE 528 0 528 -80
WIRE 528 0 368 0
WIRE 304 32 304 0
SYMBOL cap 512 -144 R0
SYMATTR InstName C
SYMATTR Value 0.125
SYMBOL res 192 -160 R0
SYMATTR InstName R
SYMATTR Value 2
SYMBOL ind 352 -160 R0
SYMATTR InstName L
SYMATTR Value 2
SYMBOL current 48 -80 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName I1
SYMATTR Value 10
FLAG 304 32 0
TEXT -72 40 Left 2 !.tran 0 30s 0 0.00002s
TEXT 600 -16 Left 2 !.ic V(n001) = 0
TEXT 600 16 Left 2 !.ic I(L) = 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7185-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7185-2.asy)
R3 OUT 0 4
C4 N003 0 1
V1 IN 0 -2.5
C1 N001 N002 10n
C2 OUT 0 4.7 Rser=5m
C3 N001 0 1
XU1 OUT OUT N001 N002 IN 0 N003 IN ADP7185-2 ;pnba Vout)Sense)VA)VAFB)EN)GND)Vreg)Vin
.tran 200m startup
.lib ADP7185-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE 32 -48 16 -48
WIRE 96 -48 32 -48
WIRE 112 -48 96 -48
WIRE 400 -48 368 -48
WIRE 432 -48 400 -48
WIRE 496 -48 432 -48
WIRE 512 -48 496 -48
WIRE 16 -32 16 -48
WIRE 432 -32 432 -48
WIRE 512 -32 512 -48
WIRE 400 16 400 -48
WIRE 400 16 368 16
WIRE 432 48 432 32
WIRE 16 64 16 48
WIRE 512 64 512 48
WIRE 96 80 96 -48
WIRE 112 80 96 80
WIRE 464 80 368 80
WIRE 384 144 368 144
WIRE 464 144 464 80
WIRE 464 144 448 144
WIRE 464 160 464 144
WIRE 176 224 176 208
WIRE 304 224 304 208
WIRE 464 240 464 224
WIRE 176 320 176 288
SYMBOL voltage 16 -48 R0
SYMATTR InstName V1
SYMATTR Value -2.5
SYMBOL cap 448 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap 448 160 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL ADP7185-2 240 48 R0
SYMATTR InstName U1
SYMBOL res 496 -48 R0
SYMATTR InstName R3
SYMATTR Value 4
SYMBOL cap 416 -32 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=5m
SYMBOL cap 160 224 R0
SYMATTR InstName C4
SYMATTR Value 1
FLAG 16 64 0
FLAG 432 48 0
FLAG 304 224 0
FLAG 512 64 0
FLAG 32 -48 IN
FLAG 496 -48 OUT
FLAG 464 240 0
FLAG 176 320 0
TEXT 144 360 Left 2 !.tran 200m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\271839e17489_ls_cpr_.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 AC 1
R2 0 N001 {rC}
L1 IN N001 {L} Rser=0
C1 N001 0 {C}
.ac oct 50 1k 30meg
.param L=1m rL=1m
.param C=1m rC=1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 96 -144 96
WIRE -16 96 -96 96
WIRE 144 96 64 96
WIRE 208 96 144 96
WIRE -144 128 -144 96
WIRE 144 128 144 96
WIRE 208 128 208 96
WIRE -144 240 -144 208
WIRE 144 240 144 208
WIRE 144 240 -144 240
WIRE 208 240 208 192
WIRE 208 240 144 240
WIRE -144 256 -144 240
SYMBOL res 160 224 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value {rC}
SYMBOL cap 192 128 R0
SYMATTR InstName C1
SYMATTR Value {C}
SYMBOL ind -32 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value {L}
SYMATTR SpiceLine Rser=0
SYMBOL voltage -144 112 R0
WINDOW 123 41 58 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
FLAG -144 256 0
FLAG -96 96 IN
TEXT -160 312 Left 2 !.ac oct 50 1k 30meg
TEXT -168 352 Left 2 !.param L=1m rL=1m\n.param C=1m rC=1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3631-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3631-3.3.asy)
Rload OUT 0 33
XU1 N001 IN NC_01 NC_02 IN OUT NC_03 0 LTC3631-3.3 ;pnba SW)Vin)Iset)SS)Run)OUT)Hyst)GND
C1 OUT 0 10
V1 IN 0 36
L1 N001 OUT 100
.tran 1.5m startup
.lib LTC3631-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 80 0 80
WIRE 112 80 96 80
WIRE 352 80 336 80
WIRE 448 80 432 80
WIRE 512 80 448 80
WIRE 592 80 512 80
WIRE 0 96 0 80
WIRE 512 96 512 80
WIRE 592 96 592 80
WIRE 96 176 96 80
WIRE 112 176 96 176
WIRE 448 176 448 80
WIRE 448 176 336 176
WIRE 0 192 0 176
WIRE 512 192 512 160
WIRE 592 192 592 176
WIRE 352 368 336 368
SYMBOL PowerProducts\\LTC3631-3.3 224 224 R0
SYMATTR InstName U1
SYMBOL ind 336 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMBOL cap 496 96 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 576 80 R0
SYMATTR InstName Rload
SYMATTR Value 33
SYMBOL voltage 0 80 R0
SYMATTR InstName V1
SYMATTR Value 36
FLAG 0 192 0
FLAG 352 368 0
FLAG 512 192 0
FLAG 592 192 0
FLAG 0 80 IN
FLAG 592 80 OUT
TEXT 448 360 Left 2 !.tran 1.5m startup