Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3523.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3523.asy)
R3 OUT2 N003 511K
XU1 N004 IN NC_01 OUT1 N001 0 0 N002 IN NC_02 NC_03 N003 IN 0 IN IN LTC3523 ;pnba FB1)Vin1)Pgood1)Vout)SW1)GND1)GND2)SW2)Vin2)Mode)Pgood2)FB2)_SHDN2)GND3)Vbat)_SHDN1
V1 IN 0 2
C2 OUT2 0 10
L2 N002 OUT2 4.7
L1 IN N001 4.7
R2 N004 0 365K
Rload2 OUT2 0 6
C3 OUT2 N003 10p
C1 OUT1 0 10
R4 N003 0 511K
Rload1 OUT1 0 16.5
R1 OUT1 N004 634K
.tran .6m startup
.lib LTC3523.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 904 680
WIRE 0 -64 -96 -64
WIRE 160 -64 0 -64
WIRE 240 -64 160 -64
WIRE 320 -64 240 -64
WIRE 400 -64 320 -64
WIRE -96 -48 -96 -64
WIRE 160 -48 160 -64
WIRE 240 -48 240 -64
WIRE 320 -48 320 -64
WIRE 0 16 0 -64
WIRE 96 16 0 16
WIRE 400 16 400 -64
WIRE 400 16 384 16
WIRE 0 32 0 16
WIRE -96 48 -96 32
WIRE 0 128 0 112
WIRE 96 128 0 128
WIRE 400 128 384 128
WIRE 512 128 480 128
WIRE 576 128 512 128
WIRE 672 128 576 128
WIRE 752 128 672 128
WIRE 576 144 576 128
WIRE 672 144 672 128
WIRE 752 144 752 128
WIRE 512 160 512 128
WIRE -80 240 -224 240
WIRE 0 240 -80 240
WIRE 96 240 0 240
WIRE 512 240 512 224
WIRE 512 240 384 240
WIRE 576 240 576 224
WIRE 576 240 512 240
WIRE 672 240 672 208
WIRE 752 240 752 224
WIRE -224 256 -224 240
WIRE -80 256 -80 240
WIRE 0 256 0 240
WIRE 576 256 576 240
WIRE -224 352 -224 336
WIRE -80 352 -80 320
WIRE 0 352 0 336
WIRE 96 352 0 352
WIRE 576 352 576 336
WIRE 0 368 0 352
WIRE 0 464 0 448
WIRE 160 544 160 528
WIRE 240 544 240 528
WIRE 320 544 320 528
SYMBOL voltage -96 -64 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL cap -96 256 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res -240 240 R0
SYMATTR InstName Rload1
SYMATTR Value 16.5
SYMBOL cap 656 144 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL ind -16 16 R0
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL res 736 128 R0
SYMATTR InstName Rload2
SYMATTR Value 6
SYMBOL PowerProducts\\LTC3523 240 240 R0
SYMATTR InstName U1
SYMBOL cap 496 160 R0
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL res 560 240 R0
SYMATTR InstName R4
SYMATTR Value 511K
SYMBOL ind 384 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 4.7
SYMBOL res -16 240 R0
SYMATTR InstName R1
SYMATTR Value 634K
SYMBOL res 560 128 R0
SYMATTR InstName R3
SYMATTR Value 511K
SYMBOL res -16 352 R0
SYMATTR InstName R2
SYMATTR Value 365K
FLAG 240 544 0
FLAG 160 544 0
FLAG 320 544 0
FLAG -96 48 0
FLAG 0 464 0
FLAG -80 352 0
FLAG -224 352 0
FLAG 576 352 0
FLAG 672 240 0
FLAG 752 240 0
FLAG -96 -64 IN
FLAG -224 240 OUT1
FLAG 752 128 OUT2
TEXT 512 448 Left 2 !.tran .6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0e610bfebc51_dflop-74hc74-sim.asc
* Generated by LTspice 26.0.1 for Windows.
A1 nOut 0 LO_0 0 0 0 Out 0 DFLOP td=20n trise=5n tfall=5n
A2 Out 0 LO_0 0 0 nOut Out2 0 DFLOP td=20n trise=5n tfall=5n
V2 LO_0 0 PULSE(0 5 0 10n 10n 250n 500n)
.tran 4u
.ic V(out)=0 V(out2)=0
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1132 680
WIRE 784 48 784 -16
WIRE 192 80 192 32
WIRE 704 96 416 96
WIRE 960 96 864 96
WIRE 112 128 48 128
WIRE 416 128 416 96
WIRE 416 128 272 128
WIRE 464 128 416 128
WIRE 704 144 656 144
WIRE 928 144 880 144
WIRE 112 176 80 176
WIRE 784 224 784 192
WIRE -160 240 -160 160
WIRE 192 256 192 224
WIRE -160 336 -160 320
SYMBOL Digital\\dflop 784 48 R0
WINDOW 39 8 12 Left 2
SYMATTR InstName A2
SYMATTR SpiceLine td=20n trise=5n tfall=5n
SYMBOL Digital\\dflop 192 80 R0
WINDOW 39 8 12 Left 2
SYMATTR InstName A1
SYMATTR SpiceLine td=20n trise=5n tfall=5n
SYMBOL voltage -160 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 10n 10n 250n 500n)
FLAG 464 128 Out
FLAG -160 336 0
FLAG 192 256 0
FLAG 192 32 0
FLAG -160 160 LO_0
FLAG 80 176 LO_0
FLAG 656 144 LO_0
FLAG 784 -16 0
FLAG 784 224 0
FLAG 960 96 Out2
FLAG 928 144 nOut
FLAG 48 128 nOut
TEXT -176 472 Left 2 !.tran 4u
TEXT 392 464 Left 2 !.ic V(out)=0 V(out2)=0
* Z:\home\khalils\Downloads\files\data\raw_asc\1eaca87bdaa6_circuito_base.asc
* Generated by LTspice 26.0.1 for Windows.
K1 L1a L1b 1
C1 N002 0 cs
Q1 N002 N004 0 0 NPN
L1a VCC N002 Ls
RL N003 0 R
L1b N001 VCC L
Cn N001 N004 C
CA N003 N002 C
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 -80 32 -80
WIRE 192 -32 192 -80
WIRE 32 32 32 -80
WIRE 288 48 192 48
WIRE 192 144 192 128
WIRE 304 144 192 144
WIRE 352 144 304 144
WIRE 464 144 416 144
WIRE 192 160 192 144
WIRE 304 176 304 144
WIRE 464 176 464 144
WIRE 32 208 32 96
WIRE 32 208 -48 208
WIRE 128 208 32 208
WIRE 192 304 192 256
WIRE 304 304 304 240
WIRE 464 304 464 256
SYMBOL res 448 160 R0
SYMATTR InstName RL
SYMBOL cap 288 176 R0
SYMATTR InstName C1
SYMATTR Value cs
SYMBOL ind2 176 -48 R0
SYMATTR InstName L1b
SYMATTR Type ind
SYMBOL cap 16 32 R0
SYMATTR InstName Cn
SYMBOL cap 416 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName CA
SYMBOL npn 128 160 R0
SYMATTR InstName Q1
SYMBOL ind2 176 32 R0
SYMATTR InstName L1a
SYMATTR Value Ls
SYMATTR Type ind
FLAG 192 304 0
FLAG 304 304 0
FLAG 464 304 0
FLAG 288 48 VCC
TEXT 256 -48 Left 2 !K1 L1a L1b 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1374-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1374-5.asy)
V1 IN 0 12
L1 N002 OUT 5
C3 OUT 0 100
C2 N005 N004 .005
XU1 IN N001 OUT 0 OUT N004 N003 N002 LT1374 top=5.36K bot=4.99K ;pnba Vin)Boost)Sense)GND)BIAS)Vc)_SHDN)SW
R1 N005 0 10K
C1 N001 N002 .27
Rload OUT 0 2
D1 0 N002 MBRS340
D2 OUT N001 1N914
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LT1374.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2928 1440
WIRE 2064 880 1888 880
WIRE 2128 880 2064 880
WIRE 2256 880 2192 880
WIRE 2064 896 2064 880
WIRE 1760 944 1568 944
WIRE 1568 960 1568 944
WIRE 1760 976 1760 944
WIRE 1888 976 1888 880
WIRE 2064 976 2064 960
WIRE 2064 976 2016 976
WIRE 2144 976 2064 976
WIRE 2256 976 2256 880
WIRE 2256 976 2224 976
WIRE 2320 976 2256 976
WIRE 2064 992 2064 976
WIRE 2320 992 2320 976
WIRE 2016 1040 2016 976
WIRE 2016 1040 1984 1040
WIRE 1568 1056 1568 1040
WIRE 2064 1072 2064 1056
WIRE 2320 1088 2320 1072
WIRE 2256 1104 2256 976
WIRE 2256 1104 1984 1104
WIRE 1664 1168 1632 1168
WIRE 2256 1168 2256 1104
WIRE 2256 1168 1984 1168
WIRE 2256 1184 2256 1168
WIRE 2000 1232 1984 1232
WIRE 2080 1232 2064 1232
WIRE 2176 1232 2160 1232
WIRE 2256 1264 2256 1248
WIRE 1824 1312 1824 1296
SYMBOL ind 2128 992 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 5
SYMBOL cap 2048 896 R0
WINDOW 3 27 56 Left 2
SYMATTR Value .27
SYMATTR InstName C1
SYMBOL cap 2064 1216 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .005
SYMBOL PowerProducts\\LT1374-5 1824 1136 R0
SYMATTR InstName U1
SYMBOL diode 2192 864 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value 1N914
SYMBOL schottky 2048 1056 M180
WINDOW 0 37 52 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMBOL VOLTAGE 1568 944 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL polcap 2240 1184 R0
SYMATTR InstName C3
SYMATTR Value 100
SYMBOL res 2304 976 R0
SYMATTR InstName Rload
SYMATTR Value 2
SYMBOL res 2064 1248 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 2176 1232 0
FLAG 1824 1312 0
FLAG 2064 1072 0
FLAG 2256 1264 0
FLAG 1568 1056 0
FLAG 2320 1088 0
FLAG 2320 976 OUT
FLAG 1568 944 IN
TEXT 2024 1328 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\413d2cf5a022_fig-01-03-11.asc
* Generated by LTspice 26.0.1 for Windows.
V1 VIN 0 SINE(0 1 1k)
D1 VIN VOUT 1N4148
R1 VOUT 0 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 2m 0 1u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 176 144 176
WIRE 272 176 192 176
WIRE 368 176 336 176
WIRE 400 176 368 176
WIRE 144 192 144 176
WIRE 368 224 368 176
WIRE 144 320 144 272
WIRE 368 336 368 304
FLAG 144 320 0
FLAG 400 176 VOUT
IOPIN 400 176 Out
FLAG 192 176 VIN
FLAG 368 336 0
SYMBOL voltage 144 176 R0
WINDOW 0 10 99 Left 2
WINDOW 3 -60 179 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1k)
SYMBOL diode 272 192 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 352 208 R0
SYMATTR InstName R1
SYMATTR Value 1k
TEXT 168 104 Left 2 !.tran 0 2m 0 1u
* Z:\tmp\asc_dec_bjh7r6w2\070cb939a6af_3751_charging_circuit_10A_with_leakage_deltaVDrain_2.5..50__dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R4 N011 0 10.0m pwr=0.5
C1 OUT 0 36 V=250
L4 N003 N004 13
R8 N005 N006 261K
R5 N016 0 1k
L2 0 N003 987
XU1 NC_01 N009 N012 N006 N007 not_fault not_done N014 0 0 0 N015 NC_02 N013 N010 N016 MP_03 NC_04 MP_05 NC_06 0 LT3751 ;pnba RVtrans)UVLO1)OVLO1)UVLO2)OVLO2)_Fault)_Done)Charge)Clamp)FB)CSN)CSP)Vcc)LVGate)HVGate)RBG))RVout))RDCM)GND
R10 N008 not_fault 100K
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3751.asy)
.lib LT3751.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1424 712
WIRE -96 -256 -176 -256
WIRE 160 -256 -96 -256
WIRE 672 -256 608 -256
WIRE 800 -256 752 -256
WIRE 944 -256 848 -256
WIRE 1136 -256 1024 -256
WIRE 1264 -256 1200 -256
WIRE 1344 -256 1264 -256
WIRE -176 -240 -176 -256
WIRE 800 -208 800 -256
WIRE 848 -208 848 -256
WIRE 1264 -208 1264 -256
WIRE -176 -144 -176 -160
WIRE 848 -96 848 -128
WIRE 1264 -96 1264 -144
WIRE -64 -80 -272 -80
WIRE -32 -80 -64 -80
WIRE 64 -80 48 -80
WIRE 800 -80 800 -128
WIRE 800 -80 608 -80
WIRE -64 16 -64 -80
WIRE -32 16 -64 16
WIRE 64 16 48 16
WIRE 800 16 800 -80
WIRE 800 16 496 16
WIRE 800 32 800 16
WIRE -32 112 -48 112
WIRE 64 112 48 112
WIRE 432 112 384 112
WIRE 752 112 432 112
WIRE 800 160 800 128
WIRE 800 160 432 160
WIRE 800 176 800 160
WIRE -96 208 -96 -256
WIRE -48 208 -48 112
WIRE 64 208 48 208
WIRE 400 208 400 -160
WIRE 400 208 384 208
WIRE 800 272 800 256
WIRE 64 304 -336 304
WIRE 432 304 384 304
WIRE 64 400 48 400
WIRE 400 400 384 400
WIRE -48 496 -48 208
WIRE -32 496 -48 496
WIRE 64 496 48 496
WIRE 400 496 384 496
WIRE -48 592 -48 496
WIRE -32 592 -48 592
WIRE 64 592 48 592
WIRE 400 592 384 592
WIRE 496 592 480 592
WIRE 224 672 224 656
SYMBOL res 784 160 R0
SYMATTR InstName R4
SYMATTR Value 10.0m
SYMATTR SpiceLine pwr=0.5
SYMBOL cap 1248 -208 R0
SYMATTR InstName C1
SYMATTR Value 36u
SYMATTR SpiceLine V=250
SYMBOL ind 928 -240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L4
SYMATTR Value 13u
SYMBOL res -48 -64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R8
SYMATTR Value 261K
SYMBOL res 384 608 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL ind2 864 -112 R180
WINDOW 0 -40 75 Left 2
WINDOW 3 -73 26 Left 2
SYMATTR InstName L2
SYMATTR Value 987u
SYMATTR Type ind
SYMBOL PowerProducts\\LT3751 224 256 R0
SYMATTR InstName U1
SYMBOL res -48 512 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R10
SYMATTR Value 100K
FLAG -176 -144 0
FLAG 800 272 0
FLAG 400 400 0
FLAG 400 496 0
FLAG 224 672 0
FLAG 496 592 0
FLAG 48 400 0
FLAG 848 -96 0
FLAG 1264 -96 0
FLAG -176 -256 IN
FLAG 1264 -256 OUT
FLAG 800 16 drain
FLAG 1344 -256 v_out
FLAG 48 496 not_fault
FLAG 48 592 not_done
* Z:\home\khalils\Downloads\files\data\raw_asc\ADGS6414D.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:\nSPI functionality is not included\nCharge Injection and Pin Capacitance are not modeled\nOny one channel is modeled\nSwitch shown for a logic 0 input\nParameter performance modeled at 20V dual supply
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADGS6414D.asy)
V3 v+ 0 20
C1 vD 0 36p
V4 v- 0 -20
XU1 v+ vIN v- vS vD 0 ADGS6414D ;pnba Vdd)IN)Vss)S)D)GND
V1 vS 0 SINE(0 15 25)
R1 vD 0 301
V2 vIN 0 PULSE(0 3 0 1n 1n 100m 200m)
.tran 0.5
.lib ADGS6414D.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 832
WIRE 256 112 240 112
WIRE 240 160 240 112
WIRE -80 224 -112 224
WIRE 112 224 0 224
WIRE 144 224 112 224
WIRE 384 224 336 224
WIRE 464 224 384 224
WIRE 576 224 464 224
WIRE 464 256 464 224
WIRE 576 256 576 224
WIRE 112 288 48 288
WIRE 144 288 112 288
WIRE -352 352 -368 352
WIRE -128 352 -144 352
WIRE 464 352 464 336
WIRE 576 352 576 320
WIRE -368 432 -368 352
WIRE -144 432 -144 352
WIRE 48 432 48 288
WIRE 192 432 192 400
WIRE 192 432 176 432
WIRE 288 432 288 400
WIRE -368 560 -368 512
WIRE -144 560 -144 512
WIRE 48 560 48 512
SYMBOL res 448 240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage 48 416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 23 115 Left 2
SYMATTR Value PULSE(0 3 0 1n 1n 100m 200m)
SYMATTR InstName V2
SYMBOL ADGS6414D 240 272 R0
SYMATTR InstName U1
SYMBOL voltage -144 416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -20
SYMBOL voltage -368 416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 20
SYMBOL voltage 16 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 15 25)
SYMBOL cap 560 256 R0
SYMATTR InstName C1
SYMATTR Value 36p
FLAG -112 224 0
FLAG 48 560 0
FLAG 464 352 0
FLAG 288 432 0
FLAG 384 224 vD
FLAG 112 224 vS
FLAG 112 288 vIN
FLAG 576 352 0
FLAG -368 352 v+
FLAG 240 112 v+
FLAG -368 560 0
FLAG -144 352 v-
FLAG -144 560 0
FLAG 192 432 v-
TEXT 416 456 Left 2 !.tran 0.5
TEXT -368 -80 Left 2 ;Notes:\nSPI functionality is not included\nCharge Injection and Pin Capacitance are not modeled\nOny one channel is modeled\nSwitch shown for a logic 0 input\nParameter performance modeled at 20V dual supply
* Z:\home\khalils\Downloads\files\data\raw_asc\146930fe736d_Level_shift.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2, XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1678.asy)
V3 Vref 0 2.5V
XU2 N003 N001 N002 V+ V- LT1678 ;pnba IN+)IN-)OUT)VCC)VEE
R4 N004 N003 10K
XU3 N005 N004 N004 V+ V- LT1678 ;pnba IN+)IN-)OUT)VCC)VEE
R6 0 output 100K
R3 N003 0 10K
V1 V+ 0 15V
V2 input 0 SINE(0 1.25 1)
R7 output N002 100K
R1 N001 input 10K
V4 V- 0 -15V
R8 N005 Vref 100K
R2 N002 N001 10K
R5 0 N005 100K
.tran 1
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2216 948
WIRE 528 48 448 48
WIRE 640 48 608 48
WIRE 688 48 640 48
WIRE 816 48 768 48
WIRE 928 48 816 48
WIRE 448 80 448 48
WIRE 928 144 928 128
WIRE 992 144 928 144
WIRE 640 160 640 48
WIRE 656 160 640 160
WIRE 928 160 928 144
WIRE 816 176 816 48
WIRE 816 176 720 176
WIRE 656 192 640 192
WIRE 448 224 448 160
WIRE 928 256 928 240
WIRE 528 288 496 288
WIRE 640 288 640 192
WIRE 640 288 608 288
WIRE 688 288 640 288
WIRE 928 288 768 288
WIRE 1072 288 928 288
WIRE 496 352 496 288
WIRE 928 416 928 288
WIRE 960 416 928 416
WIRE 1072 432 1072 288
WIRE 1072 432 1024 432
WIRE 848 448 848 432
WIRE 960 448 848 448
WIRE 848 464 848 448
WIRE 848 560 848 544
SYMBOL res 864 560 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 100K
SYMBOL res 624 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL voltage 816 -160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 2.5V
SYMBOL res 624 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 784 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Opamps\\LT1678 992 432 R0
SYMATTR InstName U3
SYMBOL res 864 448 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R8
SYMATTR Value 100K
SYMBOL Opamps\\LT1678 688 176 R0
SYMATTR InstName U2
SYMBOL voltage 512 -160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15V
SYMBOL res 784 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL voltage 656 -160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value -15V
SYMBOL res 944 144 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R7
SYMATTR Value 100K
SYMBOL res 944 256 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R6
SYMATTR Value 100K
SYMBOL voltage 448 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 1.25 1)
FLAG 512 -64 0
FLAG 512 -144 V+
FLAG 656 -64 0
FLAG 656 -144 V-
FLAG 816 -64 0
FLAG 816 -144 Vref
FLAG 448 224 0
FLAG 496 352 0
FLAG 848 352 Vref
FLAG 848 560 0
FLAG 448 48 input
FLAG 688 144 V+
FLAG 688 208 V-
FLAG 992 464 V-
FLAG 992 400 V+
FLAG 992 144 output
FLAG 928 256 0
TEXT 480 472 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3221.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N001 N003 N002 0 IN OUT LTC3221 ;pnba C+)C-)FB)GND)Vin)Vout
C1 N001 N003 1
V1 IN 0 2.5
C2 OUT 0 4.7
R1 OUT N002 154K
R2 N002 0 107K
Rload OUT 0 50
.tran 2m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3221.asy)
.lib LTC3221.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 96 -32 96
WIRE 432 96 352 96
WIRE 544 96 432 96
WIRE 640 96 544 96
WIRE -32 112 -32 96
WIRE 432 112 432 96
WIRE 544 112 544 96
WIRE 640 112 640 96
WIRE 96 192 48 192
WIRE 432 192 352 192
WIRE -32 208 -32 192
WIRE 48 208 48 192
WIRE 432 208 432 192
WIRE 544 208 544 176
WIRE 640 208 640 192
WIRE 48 288 48 272
WIRE 96 288 48 288
WIRE 368 288 352 288
WIRE 432 304 432 288
FLAG -32 208 0
FLAG 432 304 0
FLAG 368 288 0
FLAG 640 208 0
FLAG 544 208 0
FLAG 640 96 OUT
FLAG -32 96 IN
SYMBOL PowerProducts\\LTC3221 224 192 R0
SYMATTR InstName U1
SYMBOL cap 32 208 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -32 96 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL cap 528 112 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL res 416 96 R0
SYMATTR InstName R1
SYMATTR Value 154K
SYMBOL res 416 192 R0
SYMATTR InstName R2
SYMATTR Value 107K
SYMBOL res 624 96 R0
SYMATTR InstName Rload
SYMATTR Value 50
TEXT 528 296 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1303-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1303-5.asy)
XU1 0 N003 0 OUT N002 IN N001 0 LT1303 top=474K bot=156K ;pnba GND)LBO)SHDN)Sense)LBI)Vin)SW)PGND
L1 IN N001 22 Rser=0.02 Rpar=5000
D1 N001 OUT MBRS140
Rload OUT 0 25
V1 IN 0 3.2
C2 OUT 0 100 Rser=0.02
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib LT1303.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1620 936
WIRE 704 448 448 448
WIRE 752 448 704 448
WIRE 880 448 832 448
WIRE 928 448 880 448
WIRE 1040 448 992 448
WIRE 1152 448 1040 448
WIRE 448 464 448 448
WIRE 1152 464 1152 448
WIRE 704 512 704 448
WIRE 448 560 448 544
WIRE 1152 560 1152 544
WIRE 560 576 544 576
WIRE 880 576 880 448
WIRE 880 576 848 576
WIRE 1040 656 1040 448
WIRE 1040 656 848 656
WIRE 1040 672 1040 656
WIRE 560 736 544 736
WIRE 864 736 848 736
WIRE 1040 752 1040 736
WIRE 640 816 640 800
WIRE 768 816 768 800
SYMBOL IND 736 464 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 22
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL POLCAP 1024 672 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL res 1136 448 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL SCHOTTKY 928 464 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL VOLTAGE 448 448 R0
SYMATTR InstName V1
SYMATTR Value 3.2
SYMBOL PowerProducts\\LT1303-5 704 656 R0
SYMATTR InstName U1
FLAG 1152 448 OUT
FLAG 448 560 0
FLAG 1152 560 0
FLAG 640 816 0
FLAG 768 816 0
FLAG 1040 752 0
FLAG 544 736 0
FLAG 448 448 IN
TEXT 1056 824 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4608.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4608.asy)
C1 OUT 0 100
XU1 OUT 0 NC_01 IN MP_02 NC_03 MP_04 MP_05 MP_06 NC_07 NC_08 NC_09 0 MP_10 MP_11 MP_12 MP_13 MP_14 MP_15 NC_16 NC_17 NC_18 MP_19 MP_20 MP_21 MP_22 MP_23 MP_24 N001 IN MP_25 NC_26 0 IN MP_27 MP_28 IN NC_29 LTM4608 ;pnba Vout)SGND)PLLLPF)Vin))SW))))Mode)CLKin)PHmode)GND)))))))MGN)Bsel)Pgood)))))))FB)Track))Ith)IthM)SVin)))Run)CLKout
V1 IN 0 3.6
R2 N001 0 4.87K
Rload OUT 0 .225
.tran 200u startup
.lib LTM4608.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1260 708
WIRE -48 16 -192 16
WIRE 80 16 -48 16
WIRE 272 16 80 16
WIRE -192 32 -192 16
WIRE 80 48 80 16
WIRE 272 48 272 16
WIRE 432 112 368 112
WIRE 528 112 432 112
WIRE -192 128 -192 112
WIRE 432 128 432 112
WIRE 528 128 528 112
WIRE -48 192 -48 16
WIRE -16 192 -48 192
WIRE 432 224 432 192
WIRE 528 224 528 208
WIRE -48 272 -48 192
WIRE -16 272 -48 272
WIRE 432 272 368 272
WIRE 432 288 432 272
WIRE 432 384 432 368
WIRE 384 432 368 432
WIRE 80 672 80 656
WIRE 272 672 272 656
SYMBOL PowerProducts\\LTM4608 176 352 R0
SYMATTR InstName U1
SYMBOL res 416 272 R0
SYMATTR InstName R2
SYMATTR Value 4.87K
SYMBOL voltage -192 16 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL cap 416 128 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMBOL res 512 112 R0
SYMATTR InstName Rload
SYMATTR Value .225
FLAG 80 672 0
FLAG 272 672 0
FLAG -192 128 0
FLAG 432 224 0
FLAG 528 224 0
FLAG 432 384 0
FLAG 384 432 0
FLAG 528 112 OUT
FLAG -192 16 IN
TEXT 432 600 Left 2 !.tran 200u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\144448407811_VoltageDivider01.asc
* Generated by LTspice 26.0.1 for Windows.
* Two 1K Resistors
* Evenly divided
* 1k and 2k Resistors\n1k has 4V across
* 2k and 1k Resistors\n2k has 2V across
;op 1
;op1 1
R3 N002 N005 1k
R2 N004 0 1k
R5 N003 N006 2k
V2 N002 0 6
R4 N005 0 2k
V3 N003 0 6
R1 N001 N004 1k
R6 N006 0 1k
V1 N001 0 6
.op 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1384 680
WIRE 432 -1104 192 -1104
WIRE 912 -1104 672 -1104
WIRE 1328 -1104 1088 -1104
WIRE 432 -1072 432 -1104
WIRE 912 -1072 912 -1104
WIRE 1328 -1072 1328 -1104
WIRE 192 -1008 192 -1104
WIRE 672 -1008 672 -1104
WIRE 1088 -1008 1088 -1104
WIRE 432 -928 432 -992
WIRE 912 -928 912 -992
WIRE 1328 -928 1328 -992
WIRE 192 -848 192 -928
WIRE 432 -848 192 -848
WIRE 672 -848 672 -928
WIRE 912 -848 672 -848
WIRE 1088 -848 1088 -928
WIRE 1328 -848 1088 -848
WIRE 192 -816 192 -848
WIRE 672 -816 672 -848
WIRE 1088 -816 1088 -848
DATAFLAG 432 -960 ""
DATAFLAG 304 -1104 ""
DATAFLAG 912 -960 ""
DATAFLAG 784 -1104 ""
DATAFLAG 1328 -960 ""
DATAFLAG 1200 -1104 ""
SYMBOL res 896 -1088 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 1312 -1088 R0
SYMATTR InstName R5
SYMATTR Value 2k
SYMBOL res 416 -1088 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 192 -1024 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 2
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL voltage 672 -1024 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 2
SYMATTR InstName V2
SYMATTR Value 6
SYMBOL res 896 -944 R0
SYMATTR InstName R4
SYMATTR Value 2k
SYMBOL res 1312 -944 R0
SYMATTR InstName R6
SYMATTR Value 1k
SYMBOL voltage 1088 -1024 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 44 Left 2
SYMATTR InstName V3
SYMATTR Value 6
SYMBOL res 416 -944 R0
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 192 -816 0
FLAG 672 -816 0
FLAG 1088 -816 0
TEXT 160 -792 Left 2 !.op 1
TEXT 640 -792 Left 2 !;op 1
TEXT 1056 -792 Left 2 !;op1 1
TEXT 216 -1216 Left 2 ;Two 1K Resistors
TEXT 224 -1184 Left 2 ;Evenly divided
TEXT 704 -1224 Left 2 ;1k and 2k Resistors\n1k has 4V across
TEXT 1120 -1224 Left 2 ;2k and 1k Resistors\n2k has 2V across