Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3401.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3401.asy)
C2 N004 0 20p
Rload OUT 0 20
L1 IN N001 4.7 Rpar=5K
R3 OUT N005 909K
C3 OUT 0 22 Rser=.1
R1 N006 0 15K
C1 N003 0 470p
R4 N005 0 549K
R5 IN N002 5K
XU1 N006 0 IN N001 0 N002 OUT N005 N004 IN LTC3401 ;pnba Rt)MODE)Vin)SW)GND)Pgood)Vout)FB)Vc)_SHDN
R2 N004 N003 40.2K
V1 IN 0 1.2
.tran 750u startup
.lib LTC3401.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2592 2488
WIRE 1600 1920 1472 1920
WIRE 1680 1920 1600 1920
WIRE 1808 1920 1680 1920
WIRE 1856 1920 1808 1920
WIRE 1968 1920 1936 1920
WIRE 1472 1936 1472 1920
WIRE 1808 1968 1808 1920
WIRE 1968 1968 1968 1920
WIRE 1600 1984 1600 1920
WIRE 1472 2032 1472 2016
WIRE 1680 2048 1680 1920
WIRE 1712 2048 1680 2048
WIRE 2208 2048 2064 2048
WIRE 2320 2048 2208 2048
WIRE 2432 2048 2320 2048
WIRE 2208 2064 2208 2048
WIRE 2320 2064 2320 2048
WIRE 2432 2064 2432 2048
WIRE 1600 2112 1600 2064
WIRE 1712 2112 1600 2112
WIRE 2320 2160 2320 2128
WIRE 2432 2160 2432 2144
WIRE 1504 2176 1456 2176
WIRE 1600 2176 1584 2176
WIRE 1712 2176 1600 2176
WIRE 2208 2176 2208 2144
WIRE 2208 2176 2064 2176
WIRE 1456 2192 1456 2176
WIRE 2208 2192 2208 2176
WIRE 1600 2208 1600 2176
WIRE 1712 2240 1680 2240
WIRE 2096 2240 2064 2240
WIRE 2096 2256 2096 2240
WIRE 1456 2288 1456 2256
WIRE 1600 2288 1600 2272
WIRE 2208 2288 2208 2272
WIRE 1888 2336 1888 2320
WIRE 2096 2352 2096 2336
SYMBOL ind 1840 1936 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=5K
SYMBOL res 1584 1968 R0
SYMATTR InstName R5
SYMATTR Value 5K
SYMBOL res 1600 2160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 40.2K
SYMBOL res 2416 2048 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL polcap 2304 2064 R0
SYMATTR InstName C3
SYMATTR Value 22
SYMATTR SpiceLine Rser=.1
SYMBOL RES 2080 2240 R0
SYMATTR InstName R1
SYMATTR Value 15K
SYMBOL VOLTAGE 1472 1920 R0
SYMATTR InstName V1
SYMATTR Value 1.2
SYMBOL POWERPRODUCTS\\LTC3401 1888 2144 R0
SYMATTR InstName U1
SYMBOL cap 1440 2192 R0
SYMATTR InstName C1
SYMATTR Value 470p
SYMBOL res 2192 2048 R0
SYMATTR InstName R3
SYMATTR Value 909K
SYMBOL cap 1584 2208 R0
SYMATTR InstName C2
SYMATTR Value 20p
SYMBOL res 2192 2176 R0
SYMATTR InstName R4
SYMATTR Value 549K
FLAG 2096 2352 0
FLAG 1888 2336 0
FLAG 1456 2288 0
FLAG 1600 2288 0
FLAG 2208 2288 0
FLAG 1472 2032 0
FLAG 2320 2160 0
FLAG 2432 2160 0
FLAG 2432 2048 OUT
FLAG 1680 2240 0
FLAG 1472 1920 IN
TEXT 2224 2360 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2118-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2118-2.5.asy)
R1 OUT N001 100K
XU1 IN IN IN OUT 0 0 N002 IN IN IN N001 ADP2118-x.x Rtop=760k Rbot=240k Ctop=4p ;pnba Sync/Mode)FREQ)TRK)FB)GND)PGND)SW)Pvin)Vin)EN)Pgood
C1 OUT 0 100
Rload1 OUT 0 .833
L1 N002 OUT 1
V1 IN 0 5
.tran 2m startup
.lib ADP2118-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1104 680
WIRE 128 0 48 0
WIRE 288 0 128 0
WIRE 48 16 48 0
WIRE 288 32 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 640 64 576 64
WIRE 48 112 48 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 640 144 640 64
WIRE 640 144 560 144
WIRE 704 144 640 144
WIRE 560 160 560 144
WIRE 704 160 704 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 560 256 560 224
WIRE 704 256 704 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 640 304 640 144
WIRE 640 304 416 304
WIRE 128 384 128 304
WIRE 160 384 128 384
WIRE 288 432 288 416
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 100
SYMBOL res 688 144 R0
SYMATTR InstName Rload1
SYMATTR Value .833
SYMBOL ADP2118-2.5 288 272 R0
SYMATTR InstName U1
SYMBOL voltage 48 0 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 560 256 0
FLAG 288 432 0
FLAG 48 112 0
FLAG 704 144 OUT
FLAG 704 256 0
FLAG 48 0 IN
TEXT 504 384 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3482.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3482.asy)
R1 N004 N006 1Meg
L1 N001 N002 10
XU1 MP_01 N008 N004 N004 N005 N003 N002 MP_02 0 MP_03 N001 N001 N001 N006 N001 N007 LT3482 ;pnba )APD)MONIN)Vout2)Vout1)PUMP)SW))GND))Vin)_SHDN)CTRL)FB)Fset)MON
R2 N006 0 14K
C7 N008 0 .1
C3 N004 N005 .1
C6 N007 0 .01
R3 N007 0 10K
C4 N005 0 .1
V1 N001 0 5
C5 N004 N006 15p
RAPD N008 0 40K
C2 N003 N002 .1
.tran 2m startup
.lib LT3482.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 32 -96 32
WIRE 80 32 32 32
WIRE 128 32 80 32
WIRE 240 32 192 32
WIRE 80 80 80 32
WIRE 240 80 240 32
WIRE -96 144 -96 32
WIRE -16 144 -96 144
WIRE 16 144 -16 144
WIRE 512 144 304 144
WIRE -96 160 -96 144
WIRE -16 208 -16 144
WIRE 16 208 -16 208
WIRE 336 208 304 208
WIRE 512 208 512 144
WIRE 512 208 336 208
WIRE 592 208 512 208
WIRE 592 224 592 208
WIRE 512 240 512 208
WIRE -96 256 -96 240
WIRE -16 272 -16 208
WIRE 16 272 -16 272
WIRE 336 272 304 272
WIRE 400 272 336 272
WIRE -16 336 -16 272
WIRE 16 336 -16 336
WIRE 512 336 512 304
WIRE 512 336 304 336
WIRE 592 336 592 304
WIRE 592 336 512 336
WIRE 592 352 592 336
WIRE -48 400 -144 400
WIRE 16 400 -48 400
WIRE 352 400 304 400
WIRE 448 400 352 400
WIRE 352 416 352 400
WIRE 448 416 448 400
WIRE -144 432 -144 400
WIRE -48 432 -48 400
WIRE 592 448 592 432
WIRE 160 480 160 464
WIRE 352 512 352 496
WIRE 448 512 448 480
WIRE -144 528 -144 496
WIRE -48 528 -48 512
SYMBOL res 336 400 R0
SYMATTR InstName APD
SYMATTR Value 40K
SYMBOL cap 352 208 M0
WINDOW 0 -27 15 Left 2
WINDOW 3 -37 48 Left 2
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL cap 400 288 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C4
SYMATTR Value .1
SYMBOL PowerProducts\\LT3482 160 272 R0
SYMATTR InstName U1
SYMBOL res 576 336 R0
SYMATTR InstName R2
SYMATTR Value 14K
SYMBOL cap -160 432 R0
SYMATTR InstName C6
SYMATTR Value .01
SYMBOL voltage -96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind -64 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL cap 496 240 R0
SYMATTR InstName C5
SYMATTR Value 15p
SYMBOL res 576 208 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL cap 192 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL res -64 416 R0
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL cap 432 416 R0
SYMATTR InstName C7
SYMATTR Value .1
FLAG -96 256 0
FLAG 464 272 0
FLAG 592 448 0
FLAG 160 480 0
FLAG -144 528 0
FLAG -48 528 0
FLAG 352 512 0
FLAG 448 512 0
TEXT 528 520 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3588-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3588-1.asy)
Rload OUT 0 25K
C1 N003 0 2
C2 OUT 0 47
L1 N004 OUT 10
XU1 N001 N002 N005 N003 N004 OUT N006 0 0 N007 0 LTC3588-1 ;pnba PZ1)PZ2)CAP)Vin)SW)Vout)Vin2)D1)D0)Pgood)GND
C3 N003 N005 1
I1 N002 N001 SINE(0 200u 100 0 0 0 100)
C4 N006 0 1
.tran 5
.lib LTC3588-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -112 80 -112
WIRE 432 -112 288 -112
WIRE 80 0 80 -112
WIRE 112 0 80 0
WIRE 432 0 432 -112
WIRE 432 0 400 0
WIRE -16 96 -32 96
WIRE 64 96 48 96
WIRE 112 96 64 96
WIRE 416 96 400 96
WIRE 512 96 496 96
WIRE 560 96 512 96
WIRE 640 96 560 96
WIRE 64 112 64 96
WIRE 560 112 560 96
WIRE 640 112 640 96
WIRE 64 192 64 176
WIRE 112 192 64 192
WIRE 512 192 512 96
WIRE 512 192 400 192
WIRE 560 208 560 176
WIRE 640 208 640 192
WIRE 32 288 16 288
WIRE 112 288 96 288
WIRE 416 288 400 288
WIRE 112 384 96 384
WIRE 416 384 400 384
WIRE 256 448 256 432
SYMBOL cap 96 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap 48 112 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL current 288 -112 R90
WINDOW 0 -32 40 VBottom 2
WINDOW 3 32 40 VTop 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value SINE(0 200u 100 0 0 0 100)
SYMBOL cap 544 112 R0
SYMATTR InstName C2
SYMATTR Value 47
SYMBOL PowerProducts\\LTC3588-1 256 192 R0
SYMATTR InstName U1
SYMBOL res 624 96 R0
SYMATTR InstName Rload
SYMATTR Value 25K
SYMBOL ind 400 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL cap 48 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 2
FLAG -32 96 0
FLAG 560 208 0
FLAG 416 384 0
FLAG 96 384 0
FLAG 256 448 0
FLAG 640 208 0
FLAG 640 96 OUT
FLAG 16 288 0
TEXT 536 320 Left 2 !.tran 5
* Z:\home\khalils\Downloads\files\data\raw_asc\14b5a1b91e42_16V_EXT_simplified.asc
* Generated by LTspice 26.0.1 for Windows.
R5 16V_Enable 0 10k
R2 N002 16V_EXT 0.002
S2 0 N002 16V_Enable 0 SWL
B2 System_PWR 0 I={if(V(System_PWR) > 0, V(16V_EXT)*(-1)*I(B1)/V(System_PWR), 0)}
S1 N002 N001 16V_Enable 0 SWH
B1 N001 0 V={if(V(System_PWR)>16, 16+0.006*sin(2*pi*400E3*time), V(System_PWR))}
.model SWH SW(Ron=0.0001 Roff=10Meg Vt=1.5 Vh=-.4)
.model SWL SW(Ron=10Meg Roff=0.0001 Vt=1.5 Vh=-.4)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2004 680
WIRE 368 -144 336 -144
WIRE 480 -144 448 -144
WIRE 480 -48 480 -144
WIRE 432 16 384 16
WIRE 480 64 480 32
WIRE 640 64 480 64
WIRE 848 64 720 64
WIRE 480 96 480 64
WIRE -160 160 -160 96
WIRE 432 160 416 160
WIRE -288 176 -288 96
WIRE 480 224 480 176
WIRE -288 304 -288 256
WIRE -160 304 -160 240
IOPIN 848 64 Out
IOPIN -288 96 In
IOPIN 432 -32 In
IOPIN 432 112 In
IOPIN -160 96 In
SYMBOL res 624 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 0.002
SYMBOL sw 480 192 M180
SYMATTR InstName S2
SYMATTR Value SWL
SYMBOL sw 480 48 M180
SYMATTR InstName S1
SYMATTR Value SWH
SYMBOL bv 464 -144 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName B1
SYMATTR Value V={if(V(System_PWR)>16, 16+0.006*sin(2*pi*400E3*time), V(System_PWR))}
SYMBOL res -176 144 R0
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL bi -288 176 R0
WINDOW 3 527 205 Right 2
SYMATTR Value I={if(V(System_PWR) > 0, V(16V_EXT)*(-1)*I(B1)/V(System_PWR), 0)}
SYMATTR InstName B2
FLAG 848 64 16V_EXT
FLAG 336 -144 0
FLAG -288 304 0
FLAG -288 96 System_PWR
FLAG 432 -32 16V_Enable
FLAG 432 112 16V_Enable
FLAG 384 16 0
FLAG 416 160 0
FLAG 480 224 0
FLAG -160 96 16V_Enable
FLAG -160 304 0
TEXT 296 304 Left 2 !.model SWH SW(Ron=0.0001 Roff=10Meg Vt=1.5 Vh=-.4)
TEXT 296 328 Left 2 !.model SWL SW(Ron=10Meg Roff=0.0001 Vt=1.5 Vh=-.4)
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8671.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8671.asy)
R2 OUT N001 1K
V2 -V 0 -15
Rload OUT 0 2K
R1 N001 0 1K
V1 +V 0 15
Vin IN 0 SINE(0 1 100K)
XU1 IN N001 +V -V OUT AD8671 ;pnba In+)In-)V+)V-)OUT
.tran 100u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 416 -1232 400 -1232
WIRE 528 -1232 496 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 176 -1168 176 -1184
WIRE 288 -1168 288 -1184
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 176 -1072 176 -1088
WIRE 288 -1072 288 -1088
WIRE 432 -1072 432 -1088
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 2K
SYMBOL voltage 288 -1184 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 176 -1184 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100K)
SYMBOL Opamps\\AD8671 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 512 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 576 -1072 -V
FLAG 400 -1232 0
FLAG 768 -992 0
FLAG 176 -1184 +V
FLAG 176 -1072 0
FLAG 288 -1184 -V
FLAG 288 -1072 0
TEXT 680 -944 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT4320.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LT4320.asy)
MQ1 OUT N003 N001 N001 IPP084N06L3
MQ3 N001 N006 0 0 IPP084N06L3
MQ4 N002 N005 0 0 IPP084N06L3
MQ2 OUT N004 N002 N002 IPP084N06L3
V1 N002 N001 SINE(0 36 60) Rser=.5
C1 OUT 0 1000
XU1 N001 N003 N005 N006 0 OUT N004 N002 LT4320 ;pnba IN2)TG2)BG2)BG1)Outn)Outp)TG1)IN1
Rload OUT 0 15
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 33m
.lib LT4320.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1352 1428
WIRE 48 -144 -32 -144
WIRE 624 -144 144 -144
WIRE -112 -48 -352 -48
WIRE 416 -48 -112 -48
WIRE 432 -48 416 -48
WIRE 624 -48 624 -144
WIRE 624 -48 528 -48
WIRE 672 -48 624 -48
WIRE 800 -48 672 -48
WIRE 672 -32 672 -48
WIRE 800 -32 800 -48
WIRE -352 0 -352 -48
WIRE -32 48 -32 -144
WIRE 96 48 -32 48
WIRE 416 48 416 -48
WIRE 416 48 384 48
WIRE 672 64 672 32
WIRE 800 64 800 48
WIRE -352 112 -352 80
WIRE -240 112 -352 112
WIRE -32 112 -32 48
WIRE -32 112 -240 112
WIRE 64 112 64 -96
WIRE 96 112 64 112
WIRE 448 112 448 0
WIRE 448 112 384 112
WIRE 96 176 32 176
WIRE 624 176 624 -48
WIRE 624 176 384 176
WIRE 96 240 64 240
WIRE 448 240 384 240
WIRE 32 272 32 176
WIRE 64 288 64 240
WIRE 288 288 64 288
WIRE -112 320 -112 -48
WIRE -48 320 -112 320
WIRE 448 320 448 240
WIRE 448 320 48 320
WIRE 288 352 288 288
WIRE -240 400 -240 112
WIRE 208 400 -240 400
WIRE 448 400 448 320
WIRE 448 400 304 400
WIRE 480 400 448 400
SYMBOL res 784 -48 R0
SYMATTR InstName Rload
SYMATTR Value 15
SYMBOL voltage -352 -16 R0
WINDOW 123 24 138 Left 2
WINDOW 39 41 60 Left 2
SYMATTR SpiceLine Rser=.5
SYMATTR InstName V1
SYMATTR Value SINE(0 36 60)
SYMBOL LT4320 240 144 R0
SYMATTR InstName U1
SYMBOL nmos 208 352 M90
WINDOW 0 -1 48 VBottom 2
WINDOW 3 57 58 VTop 2
SYMATTR InstName Q3
SYMATTR Value IPP084N06L3
SYMBOL nmos 528 0 M270
WINDOW 0 51 49 VTop 2
WINDOW 3 -17 70 VLeft 2
SYMATTR InstName Q2
SYMATTR Value IPP084N06L3
SYMBOL cap 656 -32 R0
SYMATTR InstName C1
SYMATTR Value 1000
SYMBOL nmos -48 272 M90
WINDOW 0 3 47 VBottom 2
WINDOW 3 52 46 VTop 2
SYMATTR InstName Q4
SYMATTR Value IPP084N06L3
SYMBOL nmos 144 -96 M270
WINDOW 0 54 49 VTop 2
WINDOW 3 -13 66 VLeft 2
SYMATTR InstName Q1
SYMATTR Value IPP084N06L3
FLAG 800 -48 OUT
FLAG 672 64 0
FLAG 800 64 0
FLAG 480 400 0
TEXT 728 336 Left 2 !.tran 33m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3424.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3424.asy)
R3 OUT N007 110K
R4 N007 0 249K
XU1 N006 N002 N001 N003 0 N002 OUT N007 N005 N002 LTC3424 ;pnba Rt)Mode)Vin)SW)GND)Vdd)Vout)FB)Vc)_SHDN
C3 N004 0 470p
L1 N001 N003 2.2
C2 OUT 0 44
D1 N003 OUT 1N5817
C1 N005 0 4.7p
V2 N001 0 1.2
R1 N006 0 30.1K
R2 N005 N004 82K
V1 N002 0 3
Rload OUT 0 1K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10m startup
.lib LTC3424.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 48 -176 48
WIRE 400 48 272 48
WIRE -176 64 -176 48
WIRE 400 64 400 48
WIRE 64 80 -32 80
WIRE 176 80 64 80
WIRE -32 96 -32 80
WIRE 176 96 176 80
WIRE 272 96 272 48
WIRE -176 160 -176 144
WIRE 64 160 64 80
WIRE 96 160 64 160
WIRE 400 160 400 144
WIRE 400 160 352 160
WIRE 400 176 400 160
WIRE -32 192 -32 176
WIRE 64 224 64 160
WIRE 96 224 64 224
WIRE 400 272 400 240
WIRE 400 272 352 272
WIRE 512 272 400 272
WIRE 608 272 512 272
WIRE 400 288 400 272
WIRE 512 288 512 272
WIRE 608 288 608 272
WIRE -240 304 -288 304
WIRE -128 304 -160 304
WIRE 96 304 -128 304
WIRE -288 320 -288 304
WIRE -128 320 -128 304
WIRE -16 384 -32 384
WIRE 96 384 64 384
WIRE 400 384 400 368
WIRE 400 384 352 384
WIRE 512 384 512 352
WIRE 608 384 608 368
WIRE 400 400 400 384
WIRE -288 416 -288 384
WIRE -128 416 -128 384
WIRE 224 432 224 416
WIRE 400 496 400 480
SYMBOL res 384 384 R0
SYMATTR InstName R4
SYMATTR Value 249K
SYMBOL res 80 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 30.1K
SYMBOL schottky 384 176 R0
SYMATTR InstName D1
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage -32 80 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL cap 496 288 R0
SYMATTR InstName C2
SYMATTR Value 44
SYMBOL PowerProducts\\LTC3424 224 272 R0
SYMATTR InstName U1
SYMBOL res -144 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 82K
SYMBOL res 592 272 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL voltage -176 48 R0
SYMATTR InstName V2
SYMATTR Value 1.2
SYMBOL cap -304 320 R0
SYMATTR InstName C3
SYMATTR Value 470p
SYMBOL res 384 272 R0
SYMATTR InstName R3
SYMATTR Value 110K
SYMBOL cap -144 320 R0
SYMATTR InstName C1
SYMATTR Value 4.7p
SYMBOL ind 384 48 R0
SYMATTR InstName L1
SYMATTR Value 2.2
FLAG -32 192 0
FLAG -176 160 0
FLAG 400 496 0
FLAG -32 384 0
FLAG -288 416 0
FLAG -128 416 0
FLAG 224 432 0
FLAG 512 384 0
FLAG 608 384 0
FLAG 608 272 OUT
TEXT 512 504 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\697e63469ce5_1844-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1844-1.8.asy)
V1 IN 0 5
XU1 IN 0 IN OUT LTC1844-1.8 ;pnba IN)GND)_SHDN)OUT
I1 OUT 0 {iload} load
.dc v1 5 1 10m
.measure DC vdrop WHEN V(out)=1.7
.measure DC dropout param Vdrop-1.7
.param iload=150m
.lib LTC1844-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1940 1316
WIRE 64 80 -32 80
WIRE 80 80 64 80
WIRE 448 80 368 80
WIRE -32 96 -32 80
WIRE 448 96 448 80
WIRE -32 192 -32 176
WIRE 448 192 448 176
WIRE 64 240 64 80
WIRE 80 240 64 240
WIRE 224 304 224 288
SYMBOL voltage -32 80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL LTC1844-1.8 224 160 R0
SYMATTR InstName U1
SYMBOL current 448 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 25 80 Left 2
WINDOW 3 41 44 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMATTR Value {iload}
FLAG 224 304 0
FLAG -32 192 0
FLAG 448 192 0
FLAG 448 80 OUT
FLAG -32 80 IN
TEXT 648 88 Left 2 !.dc v1 5 1 10m
TEXT 648 176 Left 2 !.measure DC vdrop WHEN V(out)=1.7\n.measure DC dropout param Vdrop-1.7
TEXT 648 128 Left 2 !.param iload=150m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1575-3.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1575-3.5.asy)
R3 N004 N005 7.5K
XU1 0 N002 0 OUT N004 N003 N001 N001 LT1575-3.5 ;pnba SHDN)Vin)GND)OUT)Comp)Gate)Ineg)Ipos
I2 OUT 0 PULSE(.2 5 300u 100n 100n 300u 600u) load
V2 N002 0 12
C2 N004 0 10p
M3 N001 N003 OUT OUT IRFZ24
C1 OUT 0 24
V1 N001 0 5
C3 N005 0 1000p
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m
.lib LT1575.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4232 1996
WIRE 2352 -32 2336 -32
WIRE 2688 -32 2640 -32
WIRE 2944 -32 2688 -32
WIRE 3040 -32 2944 -32
WIRE 3040 -16 3040 -32
WIRE 2352 64 2208 64
WIRE 2688 64 2688 -32
WIRE 2688 64 2640 64
WIRE 2208 80 2208 64
WIRE 2944 80 2944 -32
WIRE 3040 80 3040 64
WIRE 2352 160 2336 160
WIRE 2896 160 2640 160
WIRE 2208 176 2208 160
WIRE 2352 256 2336 256
WIRE 2688 256 2640 256
WIRE 2736 256 2688 256
WIRE 2848 256 2816 256
WIRE 2688 272 2688 256
WIRE 2848 272 2848 256
WIRE 2688 352 2688 336
WIRE 2848 352 2848 336
WIRE 2336 400 2336 256
WIRE 2944 400 2944 176
WIRE 2944 400 2336 400
WIRE 3056 400 2944 400
WIRE 2944 416 2944 400
WIRE 3056 416 3056 400
WIRE 2944 512 2944 480
WIRE 3056 512 3056 496
SYMBOL nmos 2896 80 R0
SYMATTR InstName M3
SYMATTR Value IRFZ24
SYMBOL LT1575-3.5 2496 112 R0
SYMATTR InstName U1
SYMBOL cap 2672 272 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL voltage 2208 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL res 2720 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 7.5K
SYMBOL cap 2928 416 R0
SYMATTR InstName C1
SYMATTR Value 24
SYMBOL current 3056 416 R0
WINDOW 123 0 0 Left 2
WINDOW 39 39 42 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I2
SYMATTR Value PULSE(.2 5 300u 100n 100n 300u 600u)
SYMBOL cap 2832 272 R0
SYMATTR InstName C3
SYMATTR Value 1000p
SYMBOL voltage 3040 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 2944 512 0
FLAG 3056 512 0
FLAG 3040 80 0
FLAG 2848 352 0
FLAG 2688 352 0
FLAG 2336 -32 0
FLAG 2208 176 0
FLAG 2336 160 0
FLAG 3056 400 OUT
TEXT 3264 576 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\44bdf5d38c73_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
* .tran 100s
M1 N001 N002 N003 N001 PMOS l=90nm w=405nm
V2 N001 0 1.2
M2 N003 N002 0 0 NMOS l=90nm w=135nm
C1 N003 0 50f V=16 Irms=0 Rser=11 Lser=0 mfg="AVX" pn="TAJA105K016" type="Tantalum"
Vin N002 0 1.2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vin 0 1.2 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 16 160 16
WIRE 400 16 240 16
WIRE 400 32 400 16
WIRE 240 64 240 16
WIRE 240 64 160 64
WIRE 80 96 -32 96
WIRE 112 96 80 96
WIRE -32 160 -32 96
WIRE 160 192 160 112
WIRE 384 192 160 192
WIRE 464 192 384 192
WIRE 160 224 160 192
WIRE 384 224 384 192
WIRE 240 272 160 272
WIRE 80 304 80 96
WIRE 112 304 80 304
WIRE 240 304 240 272
WIRE 384 304 384 288
SYMBOL voltage -32 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 1.2
SYMBOL pmos4 112 16 R0
SYMATTR InstName M1
SYMATTR Value2 l=90nm w=405nm
SYMBOL nmos4 112 224 R0
SYMATTR InstName M2
SYMATTR Value2 l=90nm w=135nm
SYMBOL voltage 400 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.2
SYMBOL polcap 368 224 R0
WINDOW 3 24 56 Left 2
SYMATTR InstName C1
SYMATTR Value 50f
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=16 Irms=0 Rser=11 Lser=0 mfg="AVX" pn="TAJA105K016" type="Tantalum"
FLAG 160 320 0
FLAG 240 304 0
FLAG -32 240 0
FLAG 400 112 0
FLAG 384 304 0
TEXT -64 344 Left 2 ;.tran 100s
TEXT -120 304 Left 2 !.dc Vin 0 1.2 0.01