Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1af8a85453be_Flash_cells_parasitic_R.asc
* Generated by LTspice 26.0.1 for Windows.
VDD VDD 0 1
M1 VDD 0 0 0 N750 l=50n w=150n
M2 VDD 0 P001 0 N750 l=50n w=150n
R1 P001 0 100k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include flash_models.txt
.dc VDD 0 1 100u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2620 680
WIRE 432 -1520 432 -1552
WIRE 704 -1472 704 -1552
WIRE 960 -1472 960 -1552
WIRE 752 -1424 704 -1424
WIRE 1056 -1424 960 -1424
WIRE 432 -1408 432 -1440
WIRE 656 -1392 640 -1392
WIRE 912 -1392 896 -1392
WIRE 640 -1344 640 -1392
WIRE 704 -1344 704 -1376
WIRE 752 -1344 752 -1424
WIRE 896 -1344 896 -1392
WIRE 1056 -1344 1056 -1424
WIRE 960 -1280 960 -1296
SYMBOL voltage 432 -1536 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 40 53 Left 0
SYMATTR Value 1
SYMATTR InstName VDD
SYMBOL nmos4 912 -1472 R0
WINDOW 0 64 -33 Left 0
WINDOW 3 65 -6 Left 0
WINDOW 123 65 19 Left 0
SYMATTR InstName M2
SYMATTR Value N750
SYMATTR Value2 l=50n w=150n
SYMBOL res 944 -1392 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL nmos4 656 -1472 R0
WINDOW 0 64 -33 Left 0
WINDOW 3 65 -6 Left 0
WINDOW 123 65 19 Left 0
SYMATTR InstName M1
SYMATTR Value N750
SYMATTR Value2 l=50n w=150n
FLAG 432 -1408 0
FLAG 432 -1552 VDD
FLAG 704 -1344 0
FLAG 640 -1344 0
FLAG 752 -1344 0
FLAG 704 -1552 VDD
FLAG 960 -1280 0
FLAG 896 -1344 0
FLAG 1056 -1344 0
FLAG 960 -1552 VDD
TEXT 344 -1304 Left 0 !.include flash_models.txt
TEXT 344 -1368 Left 0 !.dc VDD 0 1 100u
* Z:\tmp\asc_dec_bjh7r6w2\0f8bed2a278e_LT1723_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R4 N004 IN 2K
C2 N005 N004 5p
V3 IN 0 SINE(0 1 1Meg)
R2 N001 IN 750
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 744
WIRE 176 0 128 0
WIRE 256 0 240 0
WIRE 32 96 16 96
WIRE 128 96 128 0
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 256 0
WIRE 256 96 224 96
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 320 240 256 240
WIRE 432 240 400 240
WIRE 16 256 16 96
WIRE 160 256 16 256
WIRE 192 288 192 272
WIRE -224 336 -224 320
WIRE -96 336 -96 320
WIRE 176 384 128 384
WIRE 256 384 240 384
WIRE 432 400 432 240
WIRE 512 400 432 400
WIRE 512 464 432 464
WIRE 16 480 16 256
WIRE 16 480 -256 480
WIRE 32 480 16 480
WIRE 128 480 128 384
WIRE 128 480 112 480
WIRE 144 480 128 480
WIRE 256 480 256 384
WIRE 256 480 224 480
WIRE -256 496 -256 480
WIRE 16 528 16 480
WIRE -256 592 -256 576
WIRE 192 592 192 576
WIRE 128 608 128 480
WIRE 160 608 128 608
WIRE 256 624 256 480
WIRE 256 624 224 624
WIRE 320 624 256 624
WIRE 432 624 432 464
WIRE 16 640 16 608
WIRE 160 640 16 640
WIRE 16 656 16 640
WIRE 192 672 192 656
SYMBOL res 128 464 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 2K
SYMBOL cap 240 368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 5p
SYMBOL voltage -256 480 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1Meg)
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 750
FLAG -96 336 0
FLAG 192 192 +V
FLAG 192 288 -V
FLAG -224 336 0
FLAG -256 592 0
FLAG 192 576 +V
FLAG 16 656 0
FLAG -256 480 IN
* Z:\home\khalils\Downloads\files\data\raw_asc\24d45bbf3f75_reto2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
C1 N005 0 C
L1 N004 N005 L
R2 N004 N003 R
R3 N003 N001 R
XU2 NC_03 NC_04 NC_05 NC_06 N002 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R1 N001 N002 R
XU1 0 N001 NC_01 NC_02 N003 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 464 -48 448 -48
WIRE 336 112 304 112
WIRE 448 112 448 -48
WIRE 448 112 416 112
WIRE 464 112 448 112
WIRE 544 128 544 -48
WIRE 544 128 528 128
WIRE 560 128 544 128
WIRE 656 128 640 128
WIRE 768 128 736 128
WIRE 464 144 448 144
WIRE 448 176 448 144
WIRE 768 224 768 192
SYMBOL cap 752 128 R0
SYMATTR InstName C1
SYMBOL OpAmps\\UniversalOpAmp2 272 112 R0
SYMATTR InstName U2
SYMBOL OpAmps\\UniversalOpAmp2 496 128 R0
SYMATTR InstName U1
SYMBOL ind 640 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMBOL res 560 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMBOL res 656 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMBOL res 432 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
FLAG 768 224 0
FLAG 448 176 0
* Z:\home\khalils\Downloads\files\data\raw_asc\0abb011940e2_ProportionalSummingCircuit.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD712.asy)
Vin1 IN 0
R1 OUT 0 5.1k
XU2 IN OUT +V -V OUT AD712 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
V2 -V 0 -15
.dc Vin1 -2 2 0.5
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1716 680
WIRE 1536 -240 1536 -256
WIRE 1648 -240 1648 -256
WIRE 1536 -144 1536 -160
WIRE 1648 -144 1648 -160
WIRE 480 32 368 32
WIRE 368 128 368 32
WIRE 384 128 368 128
WIRE 480 144 480 32
WIRE 480 144 448 144
WIRE 512 144 480 144
WIRE 528 144 512 144
WIRE 384 160 272 160
WIRE 272 176 272 160
WIRE 512 208 512 144
WIRE 272 272 272 256
SYMBOL AD712 416 80 R0
SYMATTR InstName U2
SYMBOL voltage 272 160 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin1
SYMATTR Value ""
SYMBOL voltage 1648 -256 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 1536 -256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 496 192 R0
SYMATTR InstName R1
SYMATTR Value 5.1k
FLAG 1536 -256 +V
FLAG 1536 -144 0
FLAG 272 272 0
FLAG 528 144 OUT
FLAG 272 160 IN
FLAG 416 112 +V
FLAG 1648 -256 -V
FLAG 416 176 -V
FLAG 1648 -144 0
FLAG 512 288 0
TEXT 232 336 Left 2 !.dc Vin1 -2 2 0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\d354764498cf_Backup_spice.asc
* Generated by LTspice 26.0.1 for Windows.
* Filter for A5
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R4 Vdd Vout 5k
V1 Vdd 0 5
XU1 0 N001 Vdd 0 filterout level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
C1 filterout N001 3nF
R1 N002 input 1k
C2 N001 N002 189nF
V3 input 0 ac 25mV
M1 Vout filterout 0 0 PMOS
V2 0 Vss 0V
R2 filterout N001 50k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.ac dec 10 1hz 200kHz
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 680
WIRE -288 -272 -288 -304
WIRE -288 -272 -400 -272
WIRE -288 -256 -288 -272
WIRE -144 -256 -144 -320
WIRE -288 -112 -288 -176
WIRE -144 -112 -144 -176
WIRE 128 -112 64 -112
WIRE 320 -112 208 -112
WIRE 800 -80 800 -144
WIRE 64 -16 64 -112
WIRE 128 -16 64 -16
WIRE 320 -16 320 -112
WIRE 320 -16 192 -16
WIRE 800 32 800 0
WIRE 864 32 800 32
WIRE -400 48 -400 -272
WIRE 160 48 -400 48
WIRE 800 64 800 32
WIRE 160 112 160 48
WIRE -288 128 -400 128
WIRE -208 128 -288 128
WIRE -80 128 -128 128
WIRE 64 128 64 -16
WIRE 64 128 -16 128
WIRE 128 128 64 128
WIRE -400 144 -400 128
WIRE 256 144 192 144
WIRE 320 144 320 -16
WIRE 320 144 256 144
WIRE 752 144 320 144
WIRE 128 160 80 160
WIRE 80 192 80 160
WIRE 160 224 160 176
WIRE 800 240 800 160
WIRE -400 256 -400 224
SYMBOL cap -16 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 189nF
SYMBOL voltage -144 -160 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 0V
SYMBOL res 224 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50k
SYMBOL voltage -400 128 R0
SYMATTR InstName V3
SYMATTR Value ac 25mV
SYMBOL pmos 752 64 R0
SYMATTR InstName M1
SYMBOL res -112 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL Opamps\\UniversalOpamp2 160 144 R0
SYMATTR InstName U1
SYMBOL cap 192 -32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 3nF
SYMBOL res 784 -96 R0
SYMATTR InstName R4
SYMATTR Value 5k
SYMBOL voltage -288 -272 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 80 192 0
FLAG -288 -304 Vdd
FLAG -144 -320 Vss
FLAG -144 -112 0
FLAG -288 -112 0
FLAG 160 224 0
FLAG -400 256 0
FLAG 800 -144 Vdd
FLAG 800 240 0
FLAG 864 32 Vout
FLAG -288 128 input
FLAG 256 144 filterout
TEXT 104 -216 Left 2 ;Filter for A5
TEXT -434 360 Left 2 !.ac dec 10 1hz 200kHz
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1012A.asc
* Generated by LTspice 26.0.1 for Windows.
* Instrumentation Amplifier with 100V Common Mode Range
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1012A.asy)
R5 N003 IN+ 100Meg
V1 +V 0 15
XU1 N003 N001 +V -V OUT LT1012 ;pnba In+)In-)V+)V-)OUT
V3 IN- IN+ SINE(0 100m 10)
V2 -V 0 -15
R2 N001 IN- 100Meg
R4 N002 OUT 100K
V4 IN+ 0 SINE(0 100 1)
R3 0 N002 100
R6 N003 0 10Meg
R1 N002 N001 10Meg
.tran 3
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -48 112 -224 112
WIRE -16 112 -48 112
WIRE 96 112 64 112
WIRE 144 112 96 112
WIRE 272 112 224 112
WIRE 304 112 272 112
WIRE 400 112 384 112
WIRE -224 128 -224 112
WIRE 272 128 272 112
WIRE -464 192 -464 176
WIRE -336 192 -336 176
WIRE 192 208 192 192
WIRE 96 224 96 112
WIRE 160 224 96 224
WIRE 272 240 272 208
WIRE 272 240 224 240
WIRE 304 240 272 240
WIRE -224 256 -224 208
WIRE -48 256 -224 256
WIRE -16 256 -48 256
WIRE 96 256 64 256
WIRE 160 256 96 256
WIRE -224 272 -224 256
WIRE 96 272 96 256
WIRE -464 288 -464 272
WIRE -336 288 -336 272
WIRE 192 288 192 272
WIRE -224 368 -224 352
WIRE 96 368 96 352
SYMBOL res 400 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL res 80 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 100Meg
SYMBOL res 240 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10Meg
SYMBOL res 80 256 R0
SYMATTR InstName R6
SYMATTR Value 10Meg
SYMBOL voltage -224 112 R0
WINDOW 0 26 22 Left 2
WINDOW 3 22 95 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 100m 10)
SYMBOL res 256 112 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL voltage -336 176 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL opamps\\LT1012A 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -224 256 R0
SYMATTR InstName V4
SYMATTR Value SINE(0 100 1)
SYMBOL res 80 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100Meg
SYMBOL voltage -464 176 R0
SYMATTR InstName V2
SYMATTR Value -15
FLAG -336 288 0
FLAG 192 192 +V
FLAG -336 176 +V
FLAG 192 288 -V
FLAG -464 288 0
FLAG -464 176 -V
FLAG -224 368 0
FLAG 400 112 0
FLAG 96 368 0
FLAG 304 240 OUT
FLAG -48 112 IN-
FLAG -48 256 IN+
TEXT 408 320 Left 2 !.tran 3
TEXT 120 56 Bottom 2 ;Instrumentation Amplifier with 100V Common Mode Range
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2119-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2119-1.5.asy)
Rload OUT 0 1.5
L1 N002 OUT 1.5
V1 IN 0 5
R1 OUT N001 100K
C1 OUT 0 22
C2 OUT 0 10
XU1 IN IN N002 0 0 OUT IN N001 IN IN ADP2119-1.5 ;pnba Vin)Pvin)SW)PGND)GND)FB)TRK)Pgood)Sync/Mode)EN
.tran 1m
.lib ADP2119-1.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 0 64 0
WIRE 288 0 128 0
WIRE 64 16 64 0
WIRE 288 32 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 624 64 576 64
WIRE 64 112 64 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 624 144 624 64
WIRE 624 144 560 144
WIRE 688 144 624 144
WIRE 752 144 688 144
WIRE 560 160 560 144
WIRE 624 160 624 144
WIRE 752 160 752 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 624 224 560 224
WIRE 560 256 560 224
WIRE 752 256 752 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 688 304 688 144
WIRE 688 304 416 304
WIRE 288 368 288 352
SYMBOL res 736 144 R0
WINDOW 3 34 68 Left 2
SYMATTR Value 1.5
SYMATTR InstName Rload
SYMBOL voltage 64 0 R0
WINDOW 0 27 27 Left 2
WINDOW 3 29 88 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADP2119-1.5 288 272 R0
SYMATTR InstName U1
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 608 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1.5
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 22
FLAG 560 256 0
FLAG 288 368 0
FLAG 64 112 0
FLAG 752 144 OUT
FLAG 752 256 0
FLAG 64 0 IN
TEXT 504 344 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL40502-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL40502-3.3.asy)
XU1 vIN 0 vIN vOUT ADPL40502-3.3 ;pnba Vin)GND)EN)Vout
Rload vOUT 0 16.5
C1 vOUT 0 1 Rser=1m
V1 vIN 0 5
.tran 1m startup
.lib ADPL40502-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2808 1464
WIRE 1824 880 1728 880
WIRE 1984 880 1824 880
WIRE 1728 896 1728 880
WIRE 1984 896 1984 880
WIRE 1728 992 1728 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMATTR SpiceLine Rser=1m
SYMBOL VOLTAGE 1728 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ADPL40502-3.3 1984 1024 R0
SYMATTR InstName U1
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 16.5
FLAG 2256 1024 vOUT
FLAG 2256 1136 0
FLAG 1728 992 0
FLAG 1728 880 vIN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6906.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6906.asy)
R1 N003 0 100K
XU1 N002 0 0 N003 NC_01 N001 LTC6906 ;pnba OUT)GND)DIV)SET)GRD)V+
V1 N001 0 3
.tran .1m startup
.lib LTC6906.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 160 -80 160
WIRE 288 160 256 160
WIRE -80 176 -80 160
WIRE 32 240 16 240
WIRE -80 272 -80 256
WIRE 32 320 -16 320
WIRE 304 320 256 320
WIRE 304 336 304 320
WIRE 304 432 304 416
SYMBOL SpecialFunctions\\LTC6906 144 240 R0
SYMATTR InstName U1
SYMBOL res 288 320 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL voltage -80 160 R0
SYMATTR InstName V1
SYMATTR Value 3
FLAG -80 272 0
FLAG 16 240 0
FLAG 304 432 0
FLAG -16 320 0
TEXT 328 264 Left 2 !.tran .1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4896.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4896.asy)
Vin IN 0 SINE(0 1 10K)
V1 +V 0 5
R1 N001 0 249
Rload OUT 0 10K
XU1 IN N001 +V -V OUT ADA4896-2 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -5
R2 OUT N001 249
.tran 1m
.lib ADA4896-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1168 144 -1184
WIRE 256 -1168 256 -1184
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 144 -1072 144 -1088
WIRE 256 -1072 256 -1088
WIRE 432 -1072 432 -1088
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 249
SYMBOL voltage 144 -1184 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 256 -1184 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL Opamps\\ADA4896 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 249
FLAG 144 -1184 +V
FLAG 144 -1072 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1184 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 256 -1072 0
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2935-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2935-2.asy)
V1 N001 0 PWL(0 0 3.6 3.6 16 3.6 19.6 0 20.1 0 23.7 3.6)
MQ1 N004 N005 0 0 BSS123
XU1 0 0 0 0 N003 N002 N004 N001 LTC2935-2 ;pnba S2)S1)S0)GND)_PFO)_RST)MR)VCC
V2 N005 0 PWL(0 0 9.599 0 9.6 3.6 9.999 3.6 10 0)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 21
.lib LTC2935-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1052 680
WIRE 192 -64 -256 -64
WIRE 192 -48 192 -64
WIRE 96 0 80 0
WIRE 336 0 288 0
WIRE 96 80 80 80
WIRE 336 80 288 80
WIRE 96 160 80 160
WIRE 400 160 288 160
WIRE 400 176 400 160
WIRE -256 192 -256 -64
WIRE 192 224 192 208
WIRE 544 256 448 256
WIRE 544 272 544 256
WIRE -256 304 -256 272
WIRE 400 304 400 272
WIRE 544 368 544 352
SYMBOL LTC2935-2 192 80 R0
SYMATTR InstName U1
SYMBOL nmos 448 176 M0
WINDOW 0 39 -6 Right 2
WINDOW 3 32 97 Right 2
SYMATTR InstName Q1
SYMATTR Value BSS123
SYMBOL voltage -256 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 3.6 3.6 16 3.6 19.6 0 20.1 0 23.7 3.6)
SYMBOL voltage 544 256 R0
SYMATTR InstName V2
SYMATTR Value PWL(0 0 9.599 0 9.6 3.6 9.999 3.6 10 0)
FLAG 192 224 0
FLAG 544 368 0
FLAG -256 304 0
FLAG 400 304 0
FLAG 80 160 0
FLAG 80 80 0
FLAG 80 0 0
TEXT 152 352 Left 2 !.tran 21
* Z:\home\khalils\Downloads\files\data\raw_asc\629da080d34f_rectifier_diode.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 0
D1 N002 0 1N914
R1 N002 N001 5k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 112 112 16 112
WIRE 240 112 192 112
WIRE 400 112 304 112
WIRE 16 144 16 112
WIRE 16 288 16 224
WIRE 400 288 400 112
SYMBOL res 208 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 28 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 5k
SYMBOL voltage 16 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL diode 240 128 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N914
FLAG 16 288 0
FLAG 400 288 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6994-2.asc
* Generated by LTspice 26.0.1 for Windows.
* LTC6994-2 10ms Delay Interval Generator\nOutput Transitions to IN Level After Delay From Either IN Edge\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6994-2.asy)
R3 N004 0 392K
R2 N002 N004 1000K
R1 N003 0 121K
XU1 N001 0 N003 N004 N002 OUT LTC6994-2 ;pnba IN)GND)SET)DIV)V+)OUT
V2 N001 0 PULSE(0 3.3 0.5m 1n 1n 12.5m 25m 3)
R4 OUT 0 100K
V1 N002 0 5
.tran 100m startup
.lib LTC6994-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE -192 96 -208 96
WIRE 96 96 -112 96
WIRE 624 96 320 96
WIRE 624 112 624 96
WIRE 96 176 80 176
WIRE 368 176 320 176
WIRE 512 176 368 176
WIRE 368 192 368 176
WIRE 512 192 512 176
WIRE 624 208 624 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 336 256 320 256
WIRE 336 288 336 256
WIRE 368 288 368 272
WIRE 368 288 336 288
WIRE 512 288 512 272
WIRE 368 304 368 288
WIRE 368 400 368 384
SYMBOL voltage -96 96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0.5m 1n 1n 12.5m 25m 3)
SYMATTR InstName V2
SYMBOL res 608 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 121K
SYMBOL res 352 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
SYMBOL voltage 512 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL SpecialFunctions\\LTC6994-2 208 176 R0
SYMATTR InstName U1
SYMBOL res 352 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
FLAG -208 96 0
FLAG 512 288 0
FLAG 624 96 OUT
FLAG -16 256 0
FLAG 368 400 0
FLAG 624 208 0
FLAG 80 176 0
TEXT 520 352 Left 2 !.tran 100m startup
TEXT 208 56 Bottom 2 ;LTC6994-2 10ms Delay Interval Generator\nOutput Transitions to IN Level After Delay From Either IN Edge\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3304A-05.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N003 OUT 220n Rser=2m
R1 OUT N004 140K
V1 IN 0 5
R2 N004 0 100K
C1 OUT 0 22 m=3 Rser=10m
R4 OUT N002 500K
C3 OUT N004 10p
Rload OUT 0 0.2
C2 N001 0 1
R3 IN N001 10
XU2 IN N001 N003 N004 0 0 N001 N002 N001 LTC3304A-05 ;pnba VIN)EN)SW)FB)AGND)PGND)AVIN)PGOOD)MODE/SYNC
.tran 1.5m startup
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3304A-05.asy)
.lib LTC3304A-05.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2652 1736
WIRE 1392 1248 1376 1248
WIRE 1488 1248 1392 1248
WIRE 1712 1248 1488 1248
WIRE 1488 1264 1488 1248
WIRE 1376 1296 1376 1248
WIRE 1712 1296 1712 1248
WIRE 1488 1360 1488 1344
WIRE 1488 1360 1440 1360
WIRE 1552 1360 1488 1360
WIRE 1904 1360 1872 1360
WIRE 2016 1360 1984 1360
WIRE 1376 1392 1376 1376
WIRE 1440 1392 1440 1360
WIRE 1440 1472 1440 1456
WIRE 1488 1472 1488 1360
WIRE 1552 1472 1488 1472
WIRE 1904 1472 1872 1472
WIRE 2016 1472 2016 1360
WIRE 2016 1472 1984 1472
WIRE 2128 1472 2016 1472
WIRE 2224 1472 2128 1472
WIRE 2320 1472 2224 1472
WIRE 2016 1488 2016 1472
WIRE 2128 1488 2128 1472
WIRE 2224 1488 2224 1472
WIRE 2320 1488 2320 1472
WIRE 1488 1584 1488 1472
WIRE 1552 1584 1488 1584
WIRE 2016 1584 2016 1568
WIRE 2016 1584 1872 1584
WIRE 2128 1584 2128 1552
WIRE 2128 1584 2016 1584
WIRE 2224 1584 2224 1552
WIRE 2320 1584 2320 1568
WIRE 2016 1600 2016 1584
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
WIRE 2016 1696 2016 1680
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1376 1392 0
FLAG 2320 1584 0
FLAG 2016 1696 0
FLAG 2224 1584 0
FLAG 1392 1248 IN
FLAG 2320 1472 OUT
FLAG 1440 1472 0
SYMBOL ind 1888 1488 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 220n
SYMATTR SpiceLine Rser=2m
SYMBOL RES 2000 1472 R0
SYMATTR InstName R1
SYMATTR Value 140K
SYMBOL VOLTAGE 1376 1280 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2000 1584 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL cap 2208 1488 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 m=3
SYMATTR InstName C1
SYMATTR Value 22
SYMATTR SpiceLine Rser=10m
SYMBOL res 2000 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 500K
SYMBOL cap 2112 1488 R0
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL res 2304 1472 R0
SYMATTR InstName Rload
SYMATTR Value 0.2
SYMBOL cap 1424 1392 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 1472 1248 R0
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL LTC3304A-05 1712 1456 R0
SYMATTR InstName U2
TEXT 2200 1696 Left 2 !.tran 1.5m startup