Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3772B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3772B.asy)
R3 0 N006 82.5K
R1 N005 N004 20K
D1 0 N001 1N5817
C1 N004 0 680p
MQ1 N001 N003 IN IN FDC638P
C2 OUT 0 47
XU1 N002 N005 N006 0 N003 IN N001 LTC3772B ;pnba Iprog)Ith/Run)FB)GND)Pgate)Vin)SW
Rload 0 OUT 2.5
R2 OUT N006 174K
L1 N001 OUT 3.3
V1 IN 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1.5m startup
.lib LTC3772B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 940 680
WIRE 160 144 -80 144
WIRE 304 144 160 144
WIRE 448 144 400 144
WIRE 496 144 448 144
WIRE 560 144 496 144
WIRE 656 144 640 144
WIRE 752 144 656 144
WIRE 848 144 752 144
WIRE -80 160 -80 144
WIRE 496 160 496 144
WIRE 752 160 752 144
WIRE 848 160 848 144
WIRE 160 176 160 144
WIRE 32 224 16 224
WIRE 320 224 320 192
WIRE 320 224 288 224
WIRE 496 240 496 224
WIRE -80 256 -80 240
WIRE 656 256 656 144
WIRE 752 256 752 224
WIRE 848 256 848 240
WIRE 448 304 448 144
WIRE 448 304 288 304
WIRE -144 384 -160 384
WIRE -64 384 -80 384
WIRE 32 384 16 384
WIRE 656 384 656 336
WIRE 656 384 288 384
WIRE 656 400 656 384
WIRE 160 448 160 432
WIRE 656 496 656 480
SYMBOL pmos 400 192 M270
WINDOW 0 72 55 VLeft 2
WINDOW 3 -15 71 VLeft 2
SYMATTR InstName Q1
SYMATTR Value FDC638P
SYMBOL voltage -80 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 640 496 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 82.5K
SYMBOL res 832 256 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL cap -80 368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 680p
SYMBOL PowerProducts\\LTC3772B 160 304 R0
SYMATTR InstName U1
SYMBOL res 640 240 R0
SYMATTR InstName R2
SYMATTR Value 174K
SYMBOL schottky 480 224 M180
WINDOW 0 40 46 Left 2
WINDOW 3 33 2 Left 2
SYMATTR InstName D1
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 32 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20K
SYMBOL ind 544 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMBOL cap 736 160 R0
WINDOW 3 28 51 Left 2
SYMATTR Value 47
SYMATTR InstName C2
FLAG 160 448 0
FLAG -160 384 0
FLAG -80 256 0
FLAG 496 240 0
FLAG 752 256 0
FLAG 656 496 0
FLAG 848 256 0
FLAG -80 144 IN
FLAG 848 144 OUT
TEXT 368 448 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\05ad62ca7a0e_Differential_Amplifier.asc
* Generated by LTspice 26.0.1 for Windows.
;op dec 10 0.01 10000G
;ac dec 10 0.01 1G
M2 N002 N004 N006 N006 IRFP240
M3 N006 N007 N008 N008 IRFP240
V1 N008 0 -12
R3 N001 N002 545
M4 N007 N007 N008 N008 IRFP240
M1 N003 N005 N006 N006 IRFP240
V3 N005 0 SINE(0 50m 1k) AC -0.5 Rser=1k
V2 N001 0 12
R2 N001 N003 545
R1 N001 N007 500
V4 N004 0 0 AC 0.5 Rser=1k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -384 -352 -688 -352
WIRE 16 -352 -384 -352
WIRE 448 -352 16 -352
WIRE 16 -288 16 -352
WIRE 448 -272 448 -352
WIRE -688 -208 -688 -352
WIRE -688 -80 -688 -128
WIRE -384 -64 -384 -352
WIRE 448 -48 448 -192
WIRE 16 -32 16 -208
WIRE 640 32 496 32
WIRE -32 48 -128 48
WIRE 16 112 16 64
WIRE 288 112 16 112
WIRE 448 112 448 48
WIRE 448 112 288 112
WIRE -128 128 -128 48
WIRE 640 144 640 32
WIRE -384 208 -384 16
WIRE -288 208 -384 208
WIRE -384 240 -384 208
WIRE 288 240 288 112
WIRE 640 272 640 224
WIRE -288 320 -288 208
WIRE -288 320 -336 320
WIRE 240 320 -288 320
WIRE -384 416 -384 336
WIRE -16 416 -384 416
WIRE 288 416 288 336
WIRE 288 416 -16 416
WIRE -16 464 -16 416
WIRE -16 576 -16 544
SYMBOL nmos 240 240 R0
SYMATTR InstName M3
SYMATTR Value IRFP240
SYMBOL nmos -32 -32 R0
SYMATTR InstName M1
SYMATTR Value IRFP240
SYMBOL nmos 496 -48 M0
SYMATTR InstName M2
SYMATTR Value IRFP240
SYMBOL res 0 -304 R0
SYMATTR InstName R2
SYMATTR Value 545
SYMBOL voltage -128 112 R0
WINDOW 123 24 124 Left 2
WINDOW 39 24 152 Left 2
SYMATTR Value2 AC -0.5
SYMATTR SpiceLine Rser=1k
SYMATTR InstName V3
SYMATTR Value SINE(0 50m 1k)
SYMBOL res 432 -288 R0
SYMATTR InstName R3
SYMATTR Value 545
SYMBOL voltage 640 128 R0
WINDOW 123 24 124 Left 2
WINDOW 39 24 152 Left 2
SYMATTR Value2 AC 0.5
SYMATTR SpiceLine Rser=1k
SYMATTR InstName V4
SYMATTR Value 0
SYMBOL res -400 -80 R0
SYMATTR InstName R1
SYMATTR Value 500
SYMBOL voltage -16 448 R0
SYMATTR InstName V1
SYMATTR Value -12
SYMBOL voltage -688 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL nmos -336 240 M0
SYMATTR InstName M4
SYMATTR Value IRFP240
FLAG 640 272 0
FLAG -688 -80 0
FLAG -16 576 0
FLAG -128 208 0
TEXT -600 472 Left 2 !;op dec 10 0.01 10000G
TEXT 408 184 Left 2 !.tran 10m
TEXT 416 392 Left 2 !;ac dec 10 0.01 1G
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1736.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1736.asy)
V3 N004 0 PULSE(0 1.17 0 1n 1n 10u 20u)
R1 N002 0 49.9
V1 N001 0 3
V4 +V 0 5
V2 N003 0 0
V5 N005 0 1.8
XU1 +V N004 NC_01 N005 N002 N001 N003 NC_02 NC_03 NC_04 0 ADG1736 ;pnba VDD)IN1)IN2)EN)D1)S1A)S1B)D2)S2A)S2B)GND
C1 N002 0 36p
.tran 100u
.lib ADG1736.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2888 1548
WIRE -976 -480 -976 -512
WIRE -1088 -416 -1376 -416
WIRE -1376 -400 -1376 -416
WIRE -784 -384 -864 -384
WIRE -672 -384 -784 -384
WIRE -784 -368 -784 -384
WIRE -672 -368 -672 -384
WIRE -1088 -352 -1264 -352
WIRE -1264 -336 -1264 -352
WIRE -1376 -304 -1376 -320
WIRE -1088 -288 -1168 -288
WIRE -784 -272 -784 -288
WIRE -672 -272 -672 -304
WIRE -1264 -240 -1264 -256
WIRE -1168 -224 -1168 -288
WIRE -1168 -112 -1168 -144
WIRE -784 -96 -864 -96
WIRE -784 -80 -784 -96
WIRE -784 32 -784 0
WIRE -976 80 -976 64
SYMBOL voltage -784 -96 R0
WINDOW 3 32 87 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 1.8
SYMATTR InstName V5
SYMBOL voltage -1376 -176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL cap -688 -368 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -1168 -240 R0
WINDOW 3 -412 256 Left 2
SYMATTR Value PULSE(0 1.17 0 1n 1n 10u 20u)
SYMATTR InstName V3
SYMBOL res -800 -384 R0
SYMATTR InstName R1
SYMATTR Value 49.9
SYMBOL voltage -1264 -352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL ADG1736 -992 -336 R0
SYMATTR InstName U1
SYMBOL voltage -1376 -416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
FLAG -1376 -304 0
FLAG -1264 -240 0
FLAG -1168 -112 0
FLAG -976 -512 +V
FLAG -784 -272 0
FLAG -976 80 0
FLAG -672 -272 0
FLAG -1376 -80 0
FLAG -1376 -160 +V
FLAG -784 32 0
TEXT -728 80 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1615.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1615.asy)
Rload OUT 0 2K
XU1 N001 0 N002 IN IN LT1615 ;pnba SW)GND)FB)_SHDN)Vin
R1 N002 0 130K
C2 OUT 0 1
R2 OUT N002 2Meg
L1 IN N001 10 Rpar=20K
D1 N001 OUT MBR0540
V1 IN 0 3.3
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib LT1615.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1360 904
WIRE 416 464 320 464
WIRE 512 464 416 464
WIRE 560 464 512 464
WIRE 672 464 640 464
WIRE 720 464 672 464
WIRE 848 464 784 464
WIRE 944 464 848 464
WIRE 1024 464 944 464
WIRE 320 480 320 464
WIRE 944 480 944 464
WIRE 1024 480 1024 464
WIRE 512 528 512 464
WIRE 672 528 672 464
WIRE 848 560 848 464
WIRE 320 576 320 560
WIRE 944 576 944 544
WIRE 1024 576 1024 560
WIRE 416 656 416 464
WIRE 448 656 416 656
WIRE 848 656 848 640
WIRE 848 656 736 656
WIRE 848 672 848 656
WIRE 848 768 848 752
WIRE 592 800 592 784
SYMBOL RES 1008 464 R0
SYMATTR InstName Rload
SYMATTR Value 2K
SYMBOL SCHOTTKY 720 480 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBR0540
SYMBOL PowerProducts\\LT1615 592 656 R0
SYMATTR InstName U1
SYMBOL RES 832 656 R0
SYMATTR InstName R1
SYMATTR Value 130K
SYMBOL VOLTAGE 320 464 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL ind 544 480 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rpar=20K
SYMBOL POLCAP 928 480 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL RES 832 544 R0
SYMATTR InstName R2
SYMATTR Value 2Meg
FLAG 320 576 0
FLAG 592 800 0
FLAG 1024 576 0
FLAG 944 576 0
FLAG 848 768 0
FLAG 1024 464 OUT
FLAG 320 464 IN
TEXT 968 704 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL26001.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL26001.asy)
C2 OUT N002 4.7p
L1 IN N001 6.8 Rser=.1
XU1 N002 MP_01 N001 MP_02 0 IN N003 IN ADPL26001 ;pnba FBX))SW))GND)Vin)INTVcc)EN/UVLO
Rload OUT 0 355
R2 N002 0 34.8K
D1 N001 OUT BAT46WJ
V1 IN 0 12
C3 OUT 0 4.7 Rser=10m
C1 N003 0 1
R1 OUT N002 1Meg
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m startup
.lib ADPL26001.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 48 -48 48
WIRE 128 48 32 48
WIRE 176 48 128 48
WIRE 288 48 256 48
WIRE 336 48 288 48
WIRE 448 48 400 48
WIRE 560 48 448 48
WIRE 672 48 560 48
WIRE 768 48 672 48
WIRE -48 64 -48 48
WIRE 672 64 672 48
WIRE 768 64 768 48
WIRE 448 80 448 48
WIRE 128 96 128 48
WIRE 288 96 288 48
WIRE 560 96 560 48
WIRE -48 160 -48 144
WIRE 672 160 672 128
WIRE 768 160 768 144
WIRE 32 208 32 48
WIRE 48 208 32 208
WIRE 448 208 448 160
WIRE 448 208 368 208
WIRE 560 208 560 160
WIRE 560 208 448 208
WIRE 448 224 448 208
WIRE 448 320 448 304
WIRE 128 336 128 320
WIRE 288 336 288 320
WIRE 128 416 128 400
SYMBOL schottky 336 64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value BAT46WJ
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 112 336 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 432 208 R0
SYMATTR InstName R2
SYMATTR Value 34.8K
SYMBOL voltage -48 48 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 752 48 R0
SYMATTR InstName Rload
SYMATTR Value 355
SYMBOL cap 656 64 R0
SYMATTR InstName C3
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=10m
SYMBOL ADPL26001 208 208 R0
SYMATTR InstName U1
SYMBOL cap 544 96 R0
SYMATTR InstName C2
SYMATTR Value 4.7p
SYMBOL res 432 64 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL ind 160 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMATTR SpiceLine Rser=.1
FLAG 128 416 0
FLAG 288 336 0
FLAG -48 160 0
FLAG 448 320 0
FLAG 768 160 0
FLAG 672 160 0
FLAG -48 48 IN
FLAG 768 48 OUT
TEXT 464 392 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\e7019a014525_lab5.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N002 N001 1120
D1 N002 0 1N914
V1 N001 0 V
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 10 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 112 0 112
WIRE 224 112 160 112
WIRE 0 128 0 112
WIRE 224 128 224 112
WIRE 0 224 0 208
WIRE 112 224 0 224
WIRE 224 224 224 192
WIRE 224 224 112 224
WIRE 112 240 112 224
SYMBOL res 176 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1120
SYMBOL diode 208 128 R0
SYMATTR InstName D1
SYMATTR Value 1N914
SYMBOL voltage 0 112 R0
SYMATTR InstName V1
FLAG 112 240 0
TEXT 184 288 Left 2 !.dc V1 0 10 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\8ee6557d7145_FET07op.asc
* Generated by LTspice 26.0.1 for Windows.
Rg g N003 {Rg}
Vdd N001 0 {Vdd}
Vgg N003 0 {Vgg}
Rd N001 N002 {Rd}
M1 N002 g 0 0 MOSFET
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.op
.model MOSFET pmos(Kp=1m Vto=-2)
.param Vdd=-15 Vgg=-1 Rd=270 Rg=6.8Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1608 1076
WIRE 384 -128 192 -128
WIRE 192 -80 192 -128
WIRE 192 32 192 0
WIRE 384 48 384 -128
WIRE 16 112 -32 112
WIRE 112 112 96 112
WIRE 144 112 112 112
WIRE -32 144 -32 112
WIRE 192 176 192 128
WIRE 384 176 384 128
WIRE 384 176 192 176
WIRE 192 208 192 176
WIRE -32 272 -32 224
FLAG 192 208 0
FLAG -32 272 0
FLAG 112 112 g
SYMBOL res 112 96 R90
WINDOW 0 -10 57 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rg
SYMATTR Value {Rg}
SYMBOL voltage 384 32 R0
WINDOW 0 55 34 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdd
SYMATTR Value {Vdd}
SYMBOL voltage -32 128 R0
WINDOW 0 -69 6 Left 2
SYMATTR InstName Vgg
SYMATTR Value {Vgg}
SYMBOL res 176 -96 R0
SYMATTR InstName Rd
SYMATTR Value {Rd}
SYMBOL pmos 144 32 R0
SYMATTR InstName M1
SYMATTR Value MOSFET
TEXT 240 208 Left 2 !.op
TEXT 72 328 Left 2 !.model MOSFET pmos(Kp=1m Vto=-2)
TEXT 80 376 Left 2 !.param Vdd=-15 Vgg=-1 Rd=270 Rg=6.8Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\32503b99aa8e_Fig11_4_long.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vout Vin 0 0 N_1u l=1u w=10u
Vin Vin 0 0
VDD VDD 0 5
M2 VDD Vin Vout VDD P_1u l=1u w=10u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vin 0 5 1m
.lib cmosedu_models.txt
* Plot Vout and Id(M2)
* 10/1
* 10/1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 680
WIRE 192 -368 192 -384
WIRE 192 -352 192 -368
WIRE 192 -240 192 -272
WIRE 208 -96 208 -112
WIRE 208 0 208 -16
WIRE 320 -176 304 -176
WIRE 368 -176 320 -176
WIRE 368 -176 368 -224
WIRE 368 -96 368 -176
WIRE 400 -224 368 -224
WIRE 400 -96 368 -96
WIRE 448 -304 448 -352
WIRE 448 -176 448 -208
WIRE 448 -32 448 -80
WIRE 624 -176 448 -176
WIRE 656 -176 624 -176
FLAG 208 0 0
FLAG 624 -176 Vout
FLAG 208 -112 Vin
FLAG 448 -128 0
FLAG 192 -240 0
FLAG 192 -368 VDD
FLAG 448 -256 VDD
FLAG 448 -32 0
FLAG 448 -352 VDD
FLAG 320 -176 Vin
SYMBOL nmos4 400 -176 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=1u w=10u
SYMBOL voltage 208 -112 R0
WINDOW 0 -72 21 Left 0
WINDOW 3 -60 74 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 0
SYMBOL voltage 192 -368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL pmos4 400 -304 R0
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M2
SYMATTR Value P_1u
SYMATTR Value2 l=1u w=10u
TEXT 264 8 Left 0 !.dc Vin 0 5 1m
TEXT 264 32 Left 0 !.lib cmosedu_models.txt
TEXT 496 -360 Left 0 ;Plot Vout and Id(M2)
TEXT 344 -272 Left 0 ;10/1
TEXT 344 -72 Left 0 ;10/1
* Z:\home\khalils\Downloads\files\data\raw_asc\1324a7b6fcb0_6230-10.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6230-10.asy)
XU1 N003 N001 N002 +V -V 0 LT6230-10 ;pnba IN+)IN-)OUT)VCC)VEE)EN_L
V1 +V 0 5
V3 N003 0 SINE(0 .1 1K)
R2 N001 0 1K
V2 -V 0 -5
R1 N002 N001 10K
.tran 3m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -112 48 -128 48
WIRE 0 48 -32 48
WIRE 96 48 0 48
WIRE 208 48 176 48
WIRE 64 112 64 96
WIRE -416 160 -416 144
WIRE -288 160 -288 144
WIRE 0 160 0 48
WIRE 32 160 0 160
WIRE 208 192 208 48
WIRE 208 192 176 192
WIRE 32 224 -144 224
WIRE -144 240 -144 224
WIRE -416 256 -416 240
WIRE -288 256 -288 240
WIRE 64 288 64 272
WIRE -144 336 -144 320
SYMBOL voltage -288 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -16 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -144 224 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 .1 1K)
SYMBOL opamps\\LT6230-10 64 192 R0
SYMATTR InstName U1
SYMBOL res 192 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -416 144 R0
SYMATTR InstName V2
SYMATTR Value -5
FLAG -288 256 0
FLAG 64 96 +V
FLAG -288 144 +V
FLAG 64 288 -V
FLAG -416 256 0
FLAG -416 144 -V
FLAG -128 48 0
FLAG -144 336 0
FLAG 112 272 0
TEXT 176 344 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\44bdf5d38c73_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
* .tran 100s
M1 N001 N002 N003 N001 PMOS l=90nm w=405nm
V2 N001 0 1.2
M2 N003 N002 0 0 NMOS l=90nm w=135nm
C1 N003 0 50f V=16 Irms=0 Rser=11 Lser=0 mfg="AVX" pn="TAJA105K016" type="Tantalum"
Vin N002 0 1.2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vin 0 1.2 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 16 160 16
WIRE 400 16 240 16
WIRE 400 32 400 16
WIRE 240 64 240 16
WIRE 240 64 160 64
WIRE 80 96 -32 96
WIRE 112 96 80 96
WIRE -32 160 -32 96
WIRE 160 192 160 112
WIRE 384 192 160 192
WIRE 464 192 384 192
WIRE 160 224 160 192
WIRE 384 224 384 192
WIRE 240 272 160 272
WIRE 80 304 80 96
WIRE 112 304 80 304
WIRE 240 304 240 272
WIRE 384 304 384 288
SYMBOL nmos4 112 224 R0
SYMATTR InstName M2
SYMATTR Value2 l=90nm w=135nm
SYMBOL voltage 400 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.2
SYMBOL pmos4 112 16 R0
SYMATTR InstName M1
SYMATTR Value2 l=90nm w=405nm
SYMBOL polcap 368 224 R0
WINDOW 3 24 56 Left 2
SYMATTR InstName C1
SYMATTR Value 50f
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=16 Irms=0 Rser=11 Lser=0 mfg="AVX" pn="TAJA105K016" type="Tantalum"
SYMBOL voltage -32 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 1.2
FLAG 160 320 0
FLAG 240 304 0
FLAG -32 240 0
FLAG 400 112 0
FLAG 384 304 0
TEXT -64 344 Left 2 ;.tran 100s
TEXT -120 304 Left 2 !.dc Vin 0 1.2 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX1853.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX1853.asy)
C2 OUT 0 10
C1 N001 N002 1
V1 IN 0 5
Rload OUT 0 50
XU1 IN OUT N001 N002 0 IN MAX1853 ;pnba IN)OUT)C1+)C1-)GND)_SHDN
.tran 2m startup
.lib MAX1853.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2884 1464
WIRE 2416 1008 2080 1008
WIRE 2576 1008 2416 1008
WIRE 2080 1024 2080 1008
WIRE 2416 1024 2416 1008
WIRE 2272 1088 2208 1088
WIRE 2576 1088 2576 1008
WIRE 2576 1088 2560 1088
WIRE 2080 1120 2080 1104
WIRE 2208 1136 2208 1088
WIRE 2208 1248 2208 1200
WIRE 2272 1248 2208 1248
WIRE 2624 1248 2560 1248
WIRE 2736 1248 2624 1248
WIRE 2624 1264 2624 1248
WIRE 2736 1264 2736 1248
WIRE 2416 1328 2416 1312
WIRE 2624 1360 2624 1328
WIRE 2736 1360 2736 1344
SYMBOL RES 2720 1248 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL cap 2192 1136 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL VOLTAGE 2080 1008 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2608 1264 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL MAX1853 2416 1168 R0
SYMATTR InstName U1
FLAG 2416 1328 0
FLAG 2624 1360 0
FLAG 2080 1120 0
FLAG 2736 1360 0
FLAG 2736 1248 OUT
FLAG 2080 1008 IN
TEXT 2352 1376 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\280be2dbbd15_circuito_simulacin_T2_normalizado.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N001 N006 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
C1 N004 N003 1.6
V1 Vin 0 AC 1
C2 V3 N005 1.6
XU2 N003 0 N004 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
XU3 N005 0 V3 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R6 N004 N006 1
R2 N005 N004 0.391
R3 V3 N001 2.02
R5 N006 Vin 1
R1 N003 N002 0.664
R4 N002 N001 0.664
.lib opamp.sub
.ac dec 1000 0.001 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 -48 -32 -48
WIRE 624 -48 320 -48
WIRE -32 0 -32 -48
WIRE 0 0 -32 0
WIRE 96 0 80 0
WIRE 272 32 240 32
WIRE 352 32 336 32
WIRE 528 32 496 32
WIRE 624 32 624 -48
WIRE 624 32 592 32
WIRE -32 96 -32 0
WIRE 0 96 -32 96
WIRE 96 112 96 0
WIRE 96 112 64 112
WIRE 128 112 96 112
WIRE 240 112 240 32
WIRE 240 112 208 112
WIRE 272 112 240 112
WIRE -144 128 -224 128
WIRE -32 128 -64 128
WIRE 0 128 -32 128
WIRE 352 128 352 32
WIRE 352 128 336 128
WIRE 384 128 352 128
WIRE 496 128 496 32
WIRE 496 128 464 128
WIRE 528 128 496 128
WIRE 272 144 256 144
WIRE 624 144 624 32
WIRE 624 144 592 144
WIRE 528 160 512 160
WIRE -224 176 -224 128
WIRE 256 176 256 144
WIRE 512 192 512 160
WIRE -32 256 -32 128
WIRE 80 256 -32 256
WIRE 352 256 352 128
WIRE 352 256 160 256
SYMBOL cap 592 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1.6
SYMBOL res 224 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 0.664
SYMBOL OpAmps\\opamp 304 64 R0
SYMATTR InstName U2
SYMBOL res 336 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2.02
SYMBOL cap 336 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1.6
SYMBOL OpAmps\\opamp 32 48 R0
SYMATTR InstName U1
SYMBOL res 176 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 1
SYMBOL res 96 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 0.664
SYMBOL voltage -224 160 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL res 480 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 0.391
SYMBOL res -48 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1
SYMBOL OpAmps\\opamp 560 80 R0
SYMATTR InstName U3
FLAG 256 176 0
FLAG 512 192 0
FLAG -224 128 Vin
FLAG 624 144 V3
FLAG -224 256 0
TEXT 224 312 Left 2 !.lib opamp.sub
TEXT 224 336 Left 2 !.ac dec 1000 0.001 10
* Z:\tmp\asc_dec_bjh7r6w2\07a27e47a686_Circ1_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N001 N005 1
C2 N006 N002 1
C3 N003 N002 1
XU2 N004 N001 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2000 680
WIRE 944 -32 368 -32
WIRE 1136 -16 1008 -16
WIRE 1616 -16 1136 -16
WIRE 1792 -16 1680 -16
WIRE 1952 -16 1792 -16
WIRE 944 0 832 0
WIRE 1792 64 1792 -16
WIRE 1792 144 1792 128
WIRE 128 160 -192 160
WIRE 144 160 128 160
WIRE 272 160 208 160
WIRE 368 160 368 -32
WIRE 368 160 272 160
WIRE 416 160 368 160
WIRE 832 160 832 0
WIRE 832 160 736 160
WIRE 928 160 832 160
WIRE 1136 160 1136 -16
WIRE 1136 160 1008 160
WIRE 1232 160 1136 160
WIRE 1376 160 1296 160
WIRE 1536 160 1376 160
WIRE 272 224 272 160
WIRE 1792 224 1792 144
WIRE 832 288 832 160
WIRE 1376 320 1376 160
WIRE 1376 320 768 320
WIRE 272 384 272 304
WIRE 128 496 128 160
WIRE 1536 496 1536 160
SYMBOL cap 208 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 1296 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 1680 -32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL OpAmps\\opamp 976 48 M180
SYMATTR InstName U2
* Z:\home\khalils\Downloads\files\data\raw_asc\fbfdaccbd13f_Draft15.asc
* Generated by LTspice 26.0.1 for Windows.
;tran 100m
L Vout Vin 100m
R Vout 0 220 tol=1 pwr=0.1
Vi Vin 0 AC 1
.ac dec 100 10 1000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 80 80 80
WIRE 192 80 128 80
WIRE 320 80 272 80
WIRE 352 80 320 80
WIRE 80 144 80 80
WIRE 352 144 352 80
WIRE 80 240 80 224
WIRE 352 240 352 224
WIRE 352 240 80 240
WIRE 80 256 80 240
SYMBOL voltage 80 128 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName Vi
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL ind 288 64 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L
SYMATTR Value 100m
SYMBOL res 336 128 R0
SYMATTR InstName R
SYMATTR Value 220
SYMATTR SpiceLine tol=1 pwr=0.1
FLAG 80 256 0
FLAG 128 80 Vin
FLAG 320 80 Vout
TEXT 46 280 Left 2 !;tran 100m
TEXT 168 256 Left 2 !.ac dec 100 10 1000