Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\0a2292c5498b_Interview01.asc
* Generated by LTspice 26.0.1 for Windows.
* 5.92
* 4.5
* 6.8
* Q1. Explain the principle of this circuit.\nQ2. What's the reason for having Q1 and Q2 in that topology?\nQ3. Can we replace D3 with something else?\nQ4. What would have happened if the diodes were reversed?
* R1=1 65mV drop instead of 650mV
R1 c N001 1
RL c N004 33
V1 N001 0 10
Q2 N004 N005 N007 0 BCW60A
D3 0 N003 PTZ6_8B
R2 c N002 390
D2 0 N006 MMBZ6V8ALY
R4 N007 0 R=if(time>300m,100,500)
Q1 N002 N003 N005 0 2N2222
C1 c 0 4.7m
D1 N006 N002 STZ5_6N
R3 N002 N003 750
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 500m
.ic V(c)=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1808 1000
WIRE -48 128 -96 128
WIRE 80 128 80 96
WIRE 80 128 32 128
WIRE 288 128 80 128
WIRE 784 128 288 128
WIRE 288 160 288 128
WIRE -96 192 -96 128
WIRE 288 272 288 240
WIRE 496 272 288 272
WIRE 656 272 496 272
WIRE 496 288 496 272
WIRE 784 288 784 128
WIRE 288 400 288 272
WIRE 656 400 656 272
WIRE 80 416 80 128
WIRE 496 448 496 368
WIRE 592 448 496 448
WIRE 784 464 784 368
WIRE 496 512 496 448
WIRE 656 512 656 496
WIRE 720 512 656 512
WIRE 288 544 288 464
WIRE 784 576 784 560
WIRE -96 656 -96 272
WIRE 80 656 80 480
WIRE 80 656 -96 656
WIRE 288 656 288 608
WIRE 288 656 80 656
WIRE 496 656 496 576
WIRE 496 656 288 656
WIRE 784 656 496 656
WIRE 80 688 80 656
SYMBOL res 272 144 R0
SYMATTR InstName R2
SYMATTR Value 390
SYMBOL res 768 272 R0
SYMATTR InstName RL
SYMATTR Value 33
SYMBOL res 480 272 R0
SYMATTR InstName R3
SYMATTR Value 750
SYMBOL npn 720 464 R0
SYMATTR InstName Q2
SYMATTR Value BCW60A
SYMBOL voltage -96 176 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 768 560 R0
SYMATTR InstName R4
SYMATTR Value R=if(time>300m,100,500)
SYMBOL zener 512 576 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value PTZ6_8B
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 64 416 R0
SYMATTR InstName C1
SYMATTR Value 4.7m
SYMBOL zener 304 464 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value STZ5_6N
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL npn 592 400 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL zener 304 608 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value MMBZ6V8ALY
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 48 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
FLAG 80 688 0
FLAG 80 96 c
TEXT 312 432 Left 2 ;5.92
TEXT 320 576 Left 2 ;4.5
TEXT -130 714 Left 2 !.tran 500m
TEXT 552 576 Left 2 ;6.8
TEXT -456 752 Left 5 ;Q1. Explain the principle of this circuit.\nQ2. What's the reason for having Q1 and Q2 in that topology?\nQ3. Can we replace D3 with something else?\nQ4. What would have happened if the diodes were reversed?
TEXT 32 48 Left 2 !.ic V(c)=0
TEXT 32 -8 Left 2 ;R1=1 65mV drop instead of 650mV
* Z:\home\khalils\Downloads\files\data\raw_asc\260c2ad652f1_passabaixa-corte1k.asc
* Generated by LTspice 26.0.1 for Windows.
C1 out N001 {CAP}
V1 in N002 SINE(0 1m 1k) AC 1
V2 N002 0 SINE(0 0 0)
E1 out 0 0 N001 1000000
R1 N001 in {R1}
R2 out N001 {R2}
.ac dec 5m 1 10MEG
.MEAS AC gain max mag(V(out))
.meas AC meas_3db trig mag(V(out))=gain/sqrt(2)
.step param run 1 500 1
.param R2=mc(100k,0.025) CAP=mc(1.59n,0.025) R1=mc(1k,0.025)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1024 680
WIRE 144 48 96 48
WIRE 240 48 208 48
WIRE 96 112 96 48
WIRE 128 112 96 112
WIRE 240 112 240 48
WIRE 240 112 208 112
WIRE -64 192 -128 192
WIRE 96 192 96 112
WIRE 96 192 16 192
WIRE -128 208 -128 192
WIRE 240 208 240 112
WIRE 240 208 192 208
WIRE 288 208 240 208
WIRE 96 224 96 192
WIRE 144 224 96 224
WIRE -128 304 -128 288
WIRE 144 304 144 272
WIRE 192 304 192 288
SYMBOL Misc\\signal -128 192 R0
WINDOW 3 0 48 Left 2
WINDOW 123 13 75 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 1m 1k)
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL Misc\\signal -128 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 0 0)
SYMBOL res 32 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 28 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL e2 192 192 R0
SYMATTR InstName E1
SYMATTR Value 1000000
SYMBOL res 224 96 R90
WINDOW 0 35 57 VBottom 2
WINDOW 3 63 57 VBottom 2
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL cap 208 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {CAP}
FLAG -128 192 in
FLAG 288 208 out
FLAG 144 304 0
FLAG 192 304 0
FLAG -128 384 0
TEXT 280 184 Left 2 !.ac dec 5m 1 10MEG
TEXT 280 88 Left 2 !.MEAS AC gain max mag(V(out))
TEXT 280 104 Left 2 !.meas AC meas_3db trig mag(V(out))=gain/sqrt(2)
TEXT 280 168 Left 2 !.step param run 1 500 1
TEXT 280 152 Left 2 !.param R2=mc(100k,0.025) CAP=mc(1.59n,0.025) R1=mc(1k,0.025)
* Z:\home\khalils\Downloads\files\data\raw_asc\07b2f6ebb731_Series_Voltage_Regulator_1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 10V
D1 0 N003 EDZV6_2B
Q1 N001 N003 N002 0 2N2222
R2 N002 0 10K
R1 N003 N001 1000
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0V 20V 1V
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -176 32
WIRE 80 32 -32 32
WIRE 320 32 176 32
WIRE 320 112 320 32
WIRE -32 128 -32 32
WIRE 128 128 128 96
WIRE 128 128 48 128
WIRE -176 144 -176 32
WIRE 128 176 128 128
WIRE -176 240 -176 208
WIRE 128 240 -176 240
WIRE 320 240 320 192
WIRE 320 240 128 240
WIRE 128 304 128 240
SYMBOL zener 144 240 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value EDZV6_2B
SYMBOL res 64 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL npn 80 96 R270
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL Misc\\cell -176 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10V
SYMBOL res 304 96 R0
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 128 304 0
TEXT -392 240 Left 2 !.dc V1 0V 20V 1V
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4177-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4177-1.asy)
R2 OUT N001 10K
XU1 IN N001 +V -V OUT ADA4177 ;pnba In+)In-)V+)V-)OUT
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
V2 -V 0 -15
V1 +V 0 15
.tran 1m
.lib ADA4177.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 416 -1232 400 -1232
WIRE 512 -1232 496 -1232
WIRE 544 -1232 512 -1232
WIRE 656 -1232 624 -1232
WIRE 128 -1136 128 -1152
WIRE 240 -1136 240 -1152
WIRE 512 -1120 512 -1232
WIRE 544 -1120 512 -1120
WIRE 656 -1104 656 -1232
WIRE 656 -1104 608 -1104
WIRE 720 -1104 656 -1104
WIRE 544 -1088 432 -1088
WIRE 432 -1072 432 -1088
WIRE 128 -1040 128 -1056
WIRE 240 -1040 240 -1056
WIRE 432 -976 432 -992
SYMBOL opamps\\ADA4177-1 576 -1104 R0
SYMATTR InstName U1
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage 240 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 128 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 512 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 128 -1152 +V
FLAG 128 -1040 0
FLAG 432 -976 0
FLAG 720 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 240 -1152 -V
FLAG 576 -1072 -V
FLAG 400 -1232 0
FLAG 240 -1040 0
TEXT 704 -992 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6700-3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
V3 N002 0 PULSE(0 5 0 .5m .5m 0 1m)
R1 N001 N003 10K
R2 N001 N004 10K
XU1 N004 0 N002 N002 N001 N003 LT6700-3 ;pnba OUTA)GND)+INA)+INB)Vs)OUTB
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT6700-3.asy)
.lib LT6700-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 800
WIRE 368 160 144 160
WIRE 496 160 368 160
WIRE 592 160 496 160
WIRE 144 176 144 160
WIRE 496 176 496 160
WIRE 368 208 368 160
WIRE 592 224 592 160
WIRE 304 256 256 256
WIRE 144 272 144 256
WIRE 496 272 496 256
WIRE 496 272 432 272
WIRE 256 336 256 256
WIRE 256 336 -64 336
WIRE -64 352 -64 336
WIRE 592 400 592 304
WIRE 592 400 432 400
WIRE 256 416 256 336
WIRE 304 416 256 416
WIRE -64 448 -64 432
WIRE 368 496 368 464
FLAG 144 272 0
FLAG -64 448 0
FLAG 368 496 0
SYMBOL voltage 144 160 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -64 336 R0
WINDOW 3 17 101 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 5 0 .5m .5m 0 1m)
SYMATTR InstName V3
SYMBOL res 480 160 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 576 208 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL LT6700-3 368 336 R0
SYMATTR InstName U1
TEXT 464 520 Left 2 !.tran 3m
* Z:\tmp\asc_dec_bjh7r6w2\03fea8239bb4_AD8220_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N004 N002 N003 N001 -V N005 OUT +V AD8220 ;pnba IN-)RG-)RG+)IN+)VEE)REF)OUT)VCC
Vref N005 0 .5
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8220.asy)
.lib AD8220.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 640 -1264 640 -1280
WIRE 464 -1184 96 -1184
WIRE 640 -1168 640 -1184
WIRE 752 -1168 752 -1184
WIRE 464 -1152 368 -1152
WIRE 752 -1104 640 -1104
WIRE 752 -1088 752 -1104
WIRE 368 -1056 368 -1072
WIRE 464 -1056 368 -1056
WIRE 464 -1024 96 -1024
WIRE 576 -1024 576 -1040
WIRE 752 -992 752 -1008
WIRE 576 -928 576 -944
SYMBOL AD8220 496 -1104 R0
SYMATTR InstName U1
SYMBOL voltage 576 -1040 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName Vref
SYMATTR Value .5
FLAG 640 -1280 +V
FLAG 640 -1168 0
FLAG 752 -1104 OUT
FLAG 496 -1200 +V
FLAG 496 -1008 -V
FLAG 752 -992 0
FLAG 752 -1168 0
FLAG 576 -928 0
* Z:\home\khalils\Downloads\files\data\raw_asc\9635c027a574_180n_IDVG.asc
* Generated by LTspice 26.0.1 for Windows.
VD N001 0 1.8
M1 N001 N002 0 0 NMOS l=180n w=270n
VG N002 0 1.8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib "tsmc018.lib"
.dc VG 0 1.8 0.01 VD 0.05 1.8 1.75
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 64 224 64
WIRE 368 112 368 64
WIRE 224 144 224 64
WIRE 304 192 224 192
WIRE 176 224 64 224
WIRE 304 240 304 192
WIRE 304 240 224 240
WIRE 64 336 64 304
WIRE 224 336 224 240
WIRE 224 336 64 336
WIRE 368 336 368 192
WIRE 368 336 224 336
WIRE 224 352 224 336
SYMBOL voltage 64 208 R0
SYMATTR InstName VG
SYMATTR Value 1.8
SYMBOL voltage 368 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VD
SYMATTR Value 1.8
SYMBOL nmos4 176 144 R0
SYMATTR InstName M1
SYMATTR Value2 l=180n w=270n
FLAG 224 352 0
TEXT 464 248 Left 2 !.lib "tsmc018.lib"
TEXT 40 432 Left 2 !.dc VG 0 1.8 0.01 VD 0.05 1.8 1.75
* Z:\home\khalils\Downloads\files\data\raw_asc\0fc3fe4d1e6b_Fig13_30.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Vout Vin
M3 Vout N001 0 0 N_50n l=50n w=5u
M4 VDD N001 Vout VDD P_50n l=50n w=500n
V1 Vin 0 PULSE(0 1 500p 1p 1p 1n 6n)
M1 N001 Vin 0 0 N_50n l=50n w=500n
VDD VDD 0 1
Cload Vout 0 50f
M2 VDD Vin N001 VDD P_50n l=50n w=500n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 2n 0 1p
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3172 680
WIRE 192 -368 192 -384
WIRE 192 -352 192 -368
WIRE 192 -240 192 -272
WIRE 192 -160 192 -176
WIRE 192 -32 192 -80
WIRE 272 -176 192 -176
WIRE 368 -176 272 -176
WIRE 368 -176 368 -224
WIRE 368 -96 368 -176
WIRE 400 -224 368 -224
WIRE 400 -96 368 -96
WIRE 448 -304 448 -352
WIRE 448 -176 448 -208
WIRE 448 -32 448 -80
WIRE 624 -176 448 -176
WIRE 624 -176 624 -224
WIRE 624 -96 624 -176
WIRE 656 -224 624 -224
WIRE 656 -96 624 -96
WIRE 704 -304 704 -352
WIRE 704 -192 704 -208
WIRE 704 -176 704 -192
WIRE 704 -32 704 -80
WIRE 896 -192 704 -192
WIRE 960 -192 896 -192
WIRE 960 -48 960 -128
SYMBOL pmos4 400 -304 R0
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M2
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=500n
SYMBOL cap 944 -192 R0
SYMATTR InstName Cload
SYMATTR Value 50f
SYMBOL pmos4 656 -304 R0
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M4
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 192 -176 R0
WINDOW 3 -102 180 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 1 500p 1p 1p 1n 6n)
SYMATTR InstName V1
SYMBOL voltage 192 -368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL nmos4 400 -176 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 656 -176 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M3
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=5u
FLAG 448 -128 0
FLAG 192 -240 0
FLAG 192 -368 VDD
FLAG 448 -256 VDD
FLAG 448 -32 0
FLAG 448 -352 VDD
FLAG 704 -128 0
FLAG 704 -256 VDD
FLAG 704 -32 0
FLAG 704 -352 VDD
FLAG 960 -48 0
FLAG 192 -32 0
FLAG 896 -192 Vout
FLAG 272 -176 Vin
TEXT 88 48 Left 0 !.tran 0 2n 0 1p
TEXT 88 88 Left 0 !.lib cmosedu_models.txt
TEXT 264 -392 Left 0 ;Plot Vout Vin
* Z:\tmp\asc_dec_bjh7r6w2\0d134d10a4c5_ex3_artiom_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V3 0 VSN 5
XU3 N008 N005 VSP VSN N002 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R9 N007 N009 24k
V1 N003 N012 PULSE(0 -10m 1u 1n 1n 100m 2000m) AC 1
V2 VSP 0 5
R4 N005 N001 10k
C1 N009 N011 100n
* Library below included based on ModelFile attribute of instance XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1896 680
WIRE 1040 -64 832 -64
WIRE 1232 -64 1200 -64
WIRE 80 -16 -16 -16
WIRE -16 32 -16 -16
WIRE 368 160 368 -96
WIRE 1632 160 1632 -64
WIRE 1648 160 1632 160
WIRE 1120 176 1120 -64
WIRE 1136 176 1120 176
WIRE 1792 176 1712 176
WIRE -16 192 -16 112
WIRE -16 192 -112 192
WIRE 1232 192 1232 -64
WIRE 1232 192 1200 192
WIRE 1344 192 1232 192
WIRE 1648 192 1504 192
WIRE 1136 208 1120 208
WIRE -112 224 -112 192
WIRE -16 256 -16 192
WIRE 1424 288 1424 192
WIRE 1504 288 1504 192
WIRE -16 384 -16 336
WIRE 80 384 -16 384
WIRE 1040 384 832 384
WIRE 1120 384 1120 208
WIRE 1232 384 1200 384
WIRE 1504 384 1504 352
WIRE 1232 432 1232 384
WIRE 1424 448 1424 352
WIRE 1792 448 1424 448
WIRE 368 480 368 240
SYMBOL voltage -16 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL OpAmps\\UniversalOpAmp2 1168 192 R0
SYMATTR InstName U3
SYMBOL res 1520 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R9
SYMATTR Value 24k
SYMBOL voltage 368 144 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value PULSE(0 -10m 1u 1n 1n 100m 2000m)
SYMBOL voltage -16 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 1136 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL cap 1408 288 R0
SYMATTR InstName C1
SYMATTR Value 100n
FLAG -112 224 0
FLAG 80 -16 VSP
FLAG 80 384 VSN
FLAG 1232 432 0
FLAG 1504 384 0
FLAG 1168 160 VSP
FLAG 1680 144 VSP
FLAG 1168 224 VSN
FLAG 1680 208 VSN
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1910.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1910.asy)
R1 N003 N005 10m
MQ1 N005 N007 N008 N008 FDS6612A
R2 N002 N001 10K
V3 N001 0 5
R3 N008 0 5K
C2 N008 0 20
C1 N006 0 .01
XU1 0 N006 N002 N004 N007 N005 MP_01 N003 LT1910 ;pnba GND)Timer)_Fault)IN)Gate)Sense))V+
V1 N004 0 PULSE(0 5 0 1u 1u .5 1)
V2 N003 0 24
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 3 startup
.lib LT1910.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2336 1256
WIRE 1008 -80 688 -80
WIRE 1136 -80 1088 -80
WIRE 1488 -80 1392 -80
WIRE 1648 -80 1488 -80
WIRE 688 -64 688 -80
WIRE 1648 -64 1648 -80
WIRE 1136 0 768 0
WIRE 1488 0 1392 0
WIRE 768 16 768 0
WIRE 688 32 688 16
WIRE 1648 32 1648 16
WIRE 1136 80 1072 80
WIRE 1440 80 1392 80
WIRE 1072 96 1072 80
WIRE 1600 96 1488 96
WIRE 768 112 768 96
WIRE 1488 112 1488 96
WIRE 1600 112 1600 96
WIRE 1264 144 1264 128
WIRE 1072 176 1072 160
WIRE 1488 208 1488 176
WIRE 1600 208 1600 192
SYMBOL cap 1056 96 R0
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL res 1472 -96 R0
SYMATTR InstName R1
SYMATTR Value 10m
SYMBOL res 1584 96 R0
SYMATTR InstName R3
SYMATTR Value 5K
SYMBOL res 1104 -96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 1648 -80 R0
SYMATTR InstName V2
SYMATTR Value 24
SYMBOL nmos 1440 0 R0
SYMATTR InstName Q1
SYMATTR Value FDS6612A
SYMBOL cap 1472 112 R0
SYMATTR InstName C2
SYMATTR Value 20
SYMBOL voltage 768 0 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 1u 1u .5 1)
SYMBOL PowerProducts\\LT1910 1264 0 R0
SYMATTR InstName U1
SYMBOL voltage 688 -80 R0
SYMATTR InstName V3
SYMATTR Value 5
FLAG 1488 208 0
FLAG 768 112 0
FLAG 1648 32 0
FLAG 688 32 0
FLAG 1072 176 0
FLAG 1264 144 0
FLAG 1600 208 0
TEXT 1232 192 Left 2 !.tran 3 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP166-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP166-3.0.asy)
XU1 IN 0 N001 OUT ADP16xf K=333.3u ;pnba Vin)GND)En)Vout
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
V1 IN 0 5
C1 OUT 0 1
Rload OUT 0 300
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 416 96 352 96
WIRE 512 96 416 96
WIRE -64 112 -64 96
WIRE 416 112 416 96
WIRE 512 112 512 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 416 208 416 176
WIRE 512 208 512 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 300
SYMBOL ADP166-3.0 256 208 R0
SYMATTR InstName U1
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -64 208 0
FLAG 256 272 0
FLAG 416 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\2eb8f33b125a_Diode-Rectifier-4.asc
* Generated by LTspice 26.0.1 for Windows.
D1 b a VS-E5TH1506
R1 b 0 200
V1 a 0 SINE(0 10 50)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 200m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -224 144 -256 144
WIRE -144 144 -224 144
WIRE 32 144 -80 144
WIRE 48 144 32 144
WIRE -256 192 -256 144
WIRE 48 192 48 144
WIRE -256 320 -256 272
WIRE -112 320 -256 320
WIRE 48 320 48 272
WIRE 48 320 -112 320
WIRE -112 336 -112 320
FLAG -112 336 0
FLAG -224 144 a
FLAG 32 144 b
SYMBOL diode -80 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 42 23 VTop 2
SYMATTR InstName D1
SYMATTR Value VS-E5TH1506
SYMBOL Misc\\EuropeanResistor 32 176 R0
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL Misc\\signal -256 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -43 13 Left 2
WINDOW 3 14 103 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10 50)
TEXT -264 352 Left 2 !.tran 200m
* Z:\home\khalils\Downloads\files\data\raw_asc\b6698de94a32_relax_osc.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
XU2 N003 N001 Vcc 0 N002 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V1 Vcc 0 5
R4 N002 N001 560
R3 N003 Vcc 10K
C1 N001 0 22n
R1 N002 N003 7.5k
R2 N003 0 10K
.tran 0 1m 0
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 112 128 112
WIRE 240 112 224 112
WIRE 256 112 240 112
WIRE 416 112 336 112
WIRE 128 144 128 112
WIRE 240 208 240 112
WIRE 320 208 240 208
WIRE 416 224 416 112
WIRE 416 224 384 224
WIRE 320 240 272 240
WIRE 160 384 128 384
WIRE 272 384 272 240
WIRE 272 384 240 384
WIRE 304 384 272 384
WIRE 416 384 416 224
WIRE 416 384 384 384
WIRE 272 416 272 384
WIRE 272 528 272 496
SYMBOL res 400 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 7.5k
SYMBOL res 256 400 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 256 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL cap 224 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 22n
SYMBOL OpAmps\\UniversalOpAmp2 352 224 R0
SYMATTR InstName U2
SYMBOL res 352 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 560
SYMBOL voltage -64 288 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 272 528 0
FLAG -64 384 0
FLAG -64 304 Vcc
FLAG 352 192 Vcc
FLAG 352 256 0
FLAG 128 144 0
FLAG 128 384 Vcc
TEXT 272 656 Left 2 !.tran 0 1m 0
* Z:\home\khalils\Downloads\files\data\raw_asc\10dace6d6683_NOR.asc
* Generated by LTspice 26.0.1 for Windows.
V+5V N001 0 5V
V2 A 0 PULSE(5 0 0 30n 30n 2m 4m)
V3 B 0 PULSE(5 0 0 30n 30n 1m 2m)
M1 S A 0 0 NMOS
M2 S B 0 0 NMOS
M4 P001 A N001 N001 PMOS
M3 S B P001 P001 PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 10m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 48 80 48
WIRE 352 80 352 48
WIRE 304 96 256 96
WIRE -224 160 -400 160
WIRE 80 192 80 48
WIRE 304 192 256 192
WIRE -224 208 -304 208
WIRE -400 240 -400 160
WIRE -304 240 -304 208
WIRE 352 288 352 272
WIRE 528 288 352 288
WIRE 352 304 352 288
WIRE 352 304 272 304
WIRE 432 304 352 304
WIRE 272 336 272 304
WIRE 432 336 432 304
WIRE -400 384 -400 320
WIRE -352 384 -400 384
WIRE -304 384 -304 320
WIRE -304 384 -352 384
WIRE -352 416 -352 384
WIRE 224 416 192 416
WIRE 512 416 480 416
WIRE 80 464 80 272
WIRE 224 464 80 464
WIRE 272 464 272 432
WIRE 272 464 224 464
WIRE 432 464 432 432
WIRE 432 464 272 464
WIRE 224 496 224 464
FLAG -352 416 0
FLAG -224 160 A
FLAG -224 208 B
FLAG 256 96 A
FLAG 256 192 B
FLAG 224 496 0
FLAG 192 416 A
FLAG 512 416 B
FLAG 528 288 S
SYMBOL voltage 80 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName +5V
SYMATTR Value 5V
SYMBOL voltage -400 224 R0
WINDOW 3 -339 32 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(5 0 0 30n 30n 2m 4m)
SYMATTR InstName V2
SYMBOL voltage -304 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(5 0 0 30n 30n 1m 2m)
SYMBOL nmos 224 336 R0
SYMATTR InstName M1
SYMBOL nmos 480 336 M0
SYMATTR InstName M2
SYMBOL pmos 304 176 M180
SYMATTR InstName M4
SYMBOL pmos 304 272 M180
SYMATTR InstName M3
TEXT -352 520 Left 2 !.tran 10m