Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5697R.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5697R.asy)
CLOAD vOUT 0 10n
I1 0 0 100 AC 1
XU2 vDAC Vdd 0 vOUT AD5697R Gain=1 ;pnba Vdac)Vdd)GND)Vout
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
V1 Vdd 0 5
Vdac1 NC_01 0 1.25
.tran 200u
.lib AD5697R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 272 112 192 112
WIRE 464 112 272 112
WIRE -800 144 -800 112
WIRE 272 160 272 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
SYMBOL AD5697R -208 112 R0
SYMATTR InstName U2
SYMATTR SpiceLine Gain=1
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 100
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2
* Z:\home\khalils\Downloads\files\data\raw_asc\348e9928ca7b_gmoverid.asc
* Generated by LTspice 26.0.1 for Windows.
M1 vds vgs 0 0 CMOSN l={ln} w=5u
vgs vgs 0 0.7
vds vds 0 0.9
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include tsmc180.txt
.dc vds 0 1.8 15m
.step param ln 0.18u 0.9u 0.18u
.param ln=1u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -320 32 -320 -32
WIRE -144 32 -144 -48
WIRE 208 96 208 -48
WIRE 400 144 208 144
WIRE 160 176 16 176
WIRE -480 192 -480 80
WIRE -320 192 -320 112
WIRE -144 208 -144 112
WIRE 208 320 208 192
IOPIN 16 176 In
SYMBOL voltage -320 16 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 0.7
SYMATTR InstName vgs
SYMBOL nmos4 160 96 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l={ln} w=5u
SYMATTR InstName M1
SYMATTR Value CMOSN
SYMBOL voltage -144 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vds
SYMATTR Value 0.9
FLAG -320 192 0
FLAG -480 192 0
FLAG -144 208 0
FLAG -480 80 vss
FLAG 400 144 vss
FLAG 208 320 vss
FLAG -320 -32 vgs
FLAG -144 -48 vds
FLAG 16 176 vgs
FLAG 208 -48 vds
TEXT -456 320 Left 2 !.include tsmc180.txt
TEXT -448 344 Left 2 !.dc vds 0  1.8  15m
TEXT -496 384 Left 2 !.step param ln 0.18u 0.9u 0.18u
TEXT -432 432 Left 2 !.param ln=1u
* Z:\tmp\asc_dec_bjh7r6w2\00ec25ef0cb3_cascode_current_mirror_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N005 N004 N006 N006 IRFH5207
M2 N004 N004 N006 N006 IRFH5207
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 -112 112 -160
WIRE 400 -112 400 -192
WIRE 208 -32 208 -160
WIRE 208 -32 160 -32
WIRE 352 -32 208 -32
WIRE 400 0 400 -16
WIRE 400 0 288 0
WIRE 112 64 112 -16
WIRE 400 64 400 0
WIRE 288 144 288 0
WIRE 288 144 160 144
WIRE 352 144 288 144
WIRE 112 256 112 160
WIRE 288 256 112 256
WIRE 400 256 400 160
WIRE 400 256 288 256
WIRE 288 272 288 256
SYMBOL nmos 160 64 M0
SYMATTR InstName M1
SYMATTR Value IRFH5207
SYMBOL nmos 352 64 R0
SYMATTR InstName M2
SYMATTR Value IRFH5207
* Z:\home\khalils\Downloads\files\data\raw_asc\0321c85b4b85_5400-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\LT5400-5.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1468.asy)
V1 +V 0 15
XU2 N002 N001 +V -V OUT LT1468 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -15
XU1 OUT IN 0 0 N002 N002 N001 N001 NC_01 LT5400-5 ;pnba 1)2)3)4)5)6)7)8)PAD
C1 N001 OUT 4.7p
C2 N002 0 4.7p
V3 IN 0 AC 1
.ac oct 10 1K 1Meg
.lib LT5400.lib
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1472
WIRE 2304 624 1936 624
WIRE 1936 688 1936 624
WIRE 2016 688 1936 688
WIRE 2192 688 2080 688
WIRE 1936 816 1936 688
WIRE 1952 816 1936 816
WIRE 2192 816 2192 688
WIRE 2192 816 2144 816
WIRE 1952 880 1744 880
WIRE 2192 880 2192 816
WIRE 2192 880 2144 880
WIRE 1392 896 1392 880
WIRE 1520 896 1520 880
WIRE 1744 896 1744 880
WIRE 2192 896 2192 880
WIRE 2208 896 2192 896
WIRE 2304 912 2304 624
WIRE 2304 912 2272 912
WIRE 2336 912 2304 912
WIRE 2208 928 2192 928
WIRE 1952 944 1936 944
WIRE 2192 944 2192 928
WIRE 2192 944 2144 944
WIRE 1392 992 1392 976
WIRE 1520 992 1520 976
WIRE 1744 992 1744 976
WIRE 1920 1008 1872 1008
WIRE 1952 1008 1920 1008
WIRE 2192 1008 2192 944
WIRE 2192 1008 2144 1008
WIRE 1920 1120 1920 1008
WIRE 2016 1120 1920 1120
WIRE 2192 1120 2192 1008
WIRE 2192 1120 2080 1120
SYMBOL voltage 1744 880 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL voltage 1392 880 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL cap 2080 672 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7p
SYMBOL misc\\LT5400-5 2048 912 R0
SYMATTR InstName U1
SYMBOL opamps\\LT1468 2240 848 R0
SYMATTR InstName U2
SYMBOL cap 2080 1104 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7p
SYMBOL voltage 1520 880 R0
SYMATTR InstName V1
SYMATTR Value 15
FLAG 2240 880 +V
FLAG 2240 944 -V
FLAG 2336 912 OUT
FLAG 1520 992 0
FLAG 1520 880 +V
FLAG 1392 992 0
FLAG 1392 880 -V
FLAG 1744 992 0
FLAG 1744 880 IN
FLAG 1872 1008 0
FLAG 1936 944 0
TEXT 2312 1064 Left 2 !.ac oct 10 1K 1Meg
* Z:\home\khalils\Downloads\files\data\raw_asc\05595497982c_Uebungsblatt_3_wolfrum.asc
* Generated by LTspice 26.0.1 for Windows.
R4 NC_07 NC_08 R
R1 NC_01 NC_02 R
R3 NC_05 NC_06 R
R6 NC_11 NC_12 R
Rm NC_13 NC_14 1Meg
R2 NC_03 NC_04 R
R5 NC_09 NC_10 R
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
SYMBOL res 640 112 R90
WINDOW 0 7 56 VBottom 2
WINDOW 3 25 56 VTop 2
SYMATTR InstName R4
SYMBOL res 208 112 R90
WINDOW 0 7 56 VBottom 2
WINDOW 3 25 56 VTop 2
SYMATTR InstName R1
SYMBOL res 896 112 R90
WINDOW 0 7 56 VBottom 2
WINDOW 3 25 56 VTop 2
SYMATTR InstName R6
SYMBOL res 336 112 R90
WINDOW 0 7 56 VBottom 2
WINDOW 3 25 56 VTop 2
SYMATTR InstName R2
SYMBOL res 464 112 R90
WINDOW 0 7 56 VBottom 2
WINDOW 3 25 56 VTop 2
SYMATTR InstName R3
SYMBOL res 768 112 R90
WINDOW 0 7 56 VBottom 2
WINDOW 3 25 56 VTop 2
SYMATTR InstName R5
SYMBOL res 336 -32 R90
WINDOW 0 7 56 VBottom 2
WINDOW 3 25 56 VTop 2
SYMATTR InstName Rm
SYMATTR Value 1meg
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8029.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
Vin1 IN 0 SINE(0 1 100K)
R1 N001 0 10K
R2 OUT N001 10K
V2 -V 0 -5
XU1 IN N001 +V -V OUT NC_01 AD8029 ;pnba In+)In-)V+)V-)OUT)SHDN
.tran 100u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8029.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 960 680
WIRE 272 128 256 128
WIRE 368 128 352 128
WIRE 384 128 368 128
WIRE 480 128 464 128
WIRE 32 208 32 192
WIRE 160 208 160 192
WIRE 368 224 368 128
WIRE 384 224 368 224
WIRE 480 240 480 128
WIRE 480 240 448 240
WIRE 544 240 480 240
WIRE 384 256 304 256
WIRE 304 272 304 256
WIRE 32 304 32 288
WIRE 160 304 160 288
WIRE 304 368 304 352
FLAG 32 192 +V
FLAG 304 368 0
FLAG 544 240 OUT
FLAG 304 256 IN
FLAG 400 208 +V
FLAG 160 192 -V
FLAG 400 272 -V
FLAG 256 128 0
FLAG 160 304 0
FLAG 32 304 0
SYMBOL voltage 32 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 304 256 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin1
SYMATTR Value SINE(0 1 100K)
SYMBOL res 368 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 480 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 160 192 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL opamps\\AD8029 416 240 R0
SYMATTR InstName U1
TEXT 560 360 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\0544a8b8304e_calculs_amplification_2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy)
R3 N006 N005 22k
XU3 N005 N001 N004 N007 N002 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R1 N001 N003 1k
V1 N006 0 3.3
V5 N003 0 SINE(1.024 1.024 1)
V3 0 N007 10
V4 N004 0 8
R4 N005 0 8350
R2 N002 N001 8k
.tran 10
.lib UniversalOpAmp1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE 368 -32 320 -32
WIRE 592 -32 448 -32
WIRE 144 48 144 -64
WIRE 192 48 144 48
WIRE 320 48 320 -32
WIRE 320 48 272 48
WIRE 912 80 432 80
WIRE 432 112 432 80
WIRE 320 128 320 48
WIRE 400 128 320 128
WIRE 592 144 592 -32
WIRE 592 144 464 144
WIRE 912 144 912 80
WIRE 400 160 224 160
WIRE 48 192 -128 192
WIRE 224 192 224 160
WIRE 224 192 128 192
WIRE -128 208 -128 192
WIRE 224 224 224 192
WIRE 912 272 912 224
WIRE 912 272 832 272
WIRE 832 288 832 272
WIRE 912 320 912 272
WIRE 432 464 432 176
WIRE 912 464 912 400
WIRE 912 464 432 464
SYMBOL res 464 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 8k
SYMBOL voltage 144 -48 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value SINE(1.024 1.024 1)
SYMBOL OpAmps\\UniversalOpAmp 432 144 R0
SYMATTR InstName U3
SYMBOL voltage -128 192 R0
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 208 208 R0
SYMATTR InstName R4
SYMATTR Value 8350
SYMBOL voltage 912 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 8
SYMBOL res 32 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 22k
SYMBOL res 288 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 912 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
FLAG 224 304 0
FLAG -128 288 0
FLAG 144 -144 0
FLAG 832 288 0
TEXT -160 328 Left 2 !.tran 10
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1764.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1764.asy)
XU1 IN IN 0 OUT OUT LT1764 ;pnba _SHDN)IN)GND)OUT)ADJ
C1 OUT 0 10 Rser=100m
Rload OUT 0 500
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT1764.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -224 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 544 48 384 48
WIRE -224 64 -224 48
WIRE 384 64 384 48
WIRE 544 64 544 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -224 160 -224 144
WIRE 384 160 384 128
WIRE 544 160 544 144
WIRE 160 240 160 208
SYMBOL PowerProducts\\LT1764 160 96 R0
SYMATTR InstName U1
SYMBOL res 528 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 368 64 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 Rser=100m
SYMATTR InstName C1
SYMATTR Value 10u
FLAG -224 160 0
FLAG 384 160 0
FLAG 544 160 0
FLAG 160 240 0
FLAG 544 48 OUT
FLAG -224 48 IN
TEXT 352 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\1b7dca1555d9_7th-Order-Chebyshev.asc
* Generated by LTspice 26.0.1 for Windows.
* 7th Order Chebyshev
C3 N003 0 91p
R2 OUT 0 50
L3 N003 OUT 160n
L2 N002 N003 180n
C2 N002 0 91p
C1 N001 0 56p
C4 OUT 0 56p
R1 N001 IN 50
L1 N001 N002 160n
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -64 112 -80 112
WIRE -32 112 -64 112
WIRE 80 112 48 112
WIRE 112 112 80 112
WIRE 224 112 192 112
WIRE 256 112 224 112
WIRE 368 112 336 112
WIRE 480 112 368 112
WIRE 528 112 480 112
WIRE 480 128 480 112
WIRE -64 160 -64 112
WIRE 80 160 80 112
WIRE 224 160 224 112
WIRE 368 160 368 112
WIRE -64 256 -64 224
WIRE 80 256 80 224
WIRE 80 256 -64 256
WIRE 224 256 224 224
WIRE 224 256 80 256
WIRE 368 256 368 224
WIRE 368 256 224 256
WIRE 480 256 480 208
WIRE 480 256 368 256
WIRE 224 272 224 256
IOPIN -160 112 In
IOPIN 528 112 Out
SYMBOL res -64 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL ind -48 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 160n
SYMBOL cap -80 160 R0
SYMATTR InstName C1
SYMATTR Value 56p
SYMBOL ind 240 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L3
SYMATTR Value 160n
SYMBOL cap 64 160 R0
SYMATTR InstName C2
SYMATTR Value 91p
SYMBOL res 464 112 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL cap 352 160 R0
SYMATTR InstName C4
SYMATTR Value 56p
SYMBOL ind 96 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 180n
SYMBOL cap 208 160 R0
SYMATTR InstName C3
SYMATTR Value 91p
FLAG -160 112 IN
FLAG 224 272 0
FLAG 528 112 OUT
TEXT -48 48 Left 2 ;7th Order Chebyshev
* Z:\home\khalils\Downloads\files\data\raw_asc\2ndOrderBandpass.asc
* Generated by LTspice 26.0.1 for Windows.
* f0 and Q set by parameters
* R1 is arbitary
* This version puts 1/2 the R1 resistance in the capacitor
* Vout
* Vin
* The parameter "H" sets the midband gain
G2 0 2 N003 0 {10*H}
R1 N002 0 {R1/2}
R4 2 0 1Meg
V1 1 0 AC 1
G1 0 N002 1 0 {2/R1}
R3 2 0 .1
R2 N003 N002 {R1/2}
L1 N003 0 {L1} Cpar={C1}
.param f0= 1k Q=0.5
.param R1=1k
.param L1=1/(C1*(2*pi*f0)**2)
.param C1=Q/(R1*2*pi*f0)
.param H=1
.ac dec 101 100 10k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1060 680
WIRE -384 -128 -448 -128
WIRE -288 -128 -320 -128
WIRE -112 -128 -240 -128
WIRE -64 -128 -112 -128
WIRE 64 -128 16 -128
WIRE 240 -128 64 -128
WIRE 400 -128 288 -128
WIRE 464 -128 400 -128
WIRE 496 -128 464 -128
WIRE 624 -128 560 -128
WIRE -448 -112 -448 -128
WIRE -240 -96 -240 -128
WIRE -288 -80 -288 -128
WIRE -112 -64 -112 -128
WIRE 64 -64 64 -128
WIRE 288 -64 288 -128
WIRE 400 -64 400 -128
WIRE 624 -64 624 -128
WIRE 240 -48 240 -128
WIRE -448 0 -448 -32
WIRE -288 0 -288 -32
WIRE -240 16 -240 -16
WIRE 240 32 240 0
WIRE 288 32 288 16
WIRE 400 32 400 16
WIRE 624 32 624 16
WIRE -112 48 -112 16
WIRE 64 48 64 16
SYMBOL res 32 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R1/2}
SYMBOL res -128 -80 R0
SYMATTR InstName R1
SYMATTR Value {R1/2}
SYMBOL voltage -448 -128 R0
WINDOW 0 35 41 Left 2
WINDOW 123 33 80 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value2 AC 1
SYMATTR Value ""
SYMBOL Misc\\jumper 528 -192 R0
SYMATTR InstName J2
SYMBOL ind 48 -80 R0
WINDOW 0 59 45 Bottom 2
WINDOW 3 61 50 Top 2
WINDOW 123 102 107 Bottom 2
SYMATTR InstName L1
SYMATTR Value {L1}
SYMATTR Value2 Cpar={C1}
SYMBOL res 608 -80 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL g -240 -112 R0
SYMATTR InstName G1
SYMATTR Value {2/R1}
SYMBOL res 384 -80 R0
SYMATTR InstName R3
SYMATTR Value .1
SYMBOL g 288 -80 R0
SYMATTR InstName G2
SYMATTR Value {10*H}
SYMBOL Misc\\jumper -352 -192 M0
SYMATTR InstName J1
FLAG 64 48 0
FLAG -112 48 0
FLAG -240 16 0
FLAG -288 0 0
FLAG 240 32 0
FLAG 288 32 0
FLAG 400 32 0
FLAG 464 -128 2
FLAG -288 -128 1
FLAG -448 0 0
FLAG 624 32 0
TEXT -96 136 Left 2 !.param f0= 1k Q=0.5
TEXT -264 176 Left 2 !.param R1=1k
TEXT -440 296 Left 2 !.param L1=1/(C1*(2*pi*f0)**2)
TEXT -432 136 Left 2 ;f0 and Q set by parameters
TEXT -432 176 Left 2 ;R1 is arbitary
TEXT -328 -200 Left 2 ;This version puts 1/2 the R1 resistance in the capacitor
TEXT -440 256 Left 2 !.param C1=Q/(R1*2*pi*f0)
TEXT 576 -144 Left 2 ;Vout
TEXT -400 -144 Right 2 ;Vin
TEXT -432 216 Left 2 ;The parameter "H" sets the midband gain
TEXT 64 216 Left 2 !.param H=1
TEXT -440 336 Left 2 !.ac dec 101 100 10k
* Z:\home\khalils\Downloads\files\data\raw_asc\3030d80087a6_01-input_voltage_5v.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
R1 N001 N002 2k2
D1 0 N002 UMZ5_1N
R2 N003 N002 1k
Q1 N005 N003 N001 0 BC857C
Q2 vcc N005 N001 0 BC857C
R3 N005 0 5k6
R4 vcc N004 1k
D2 N004 0 NSCW100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 3 21 0.1
* https://theorycircuit.com/power-circuits/simple-overvoltage-protection-circuit/
* Input Supply Protection (BC857)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 912 680
WIRE 176 -48 16 -48
WIRE 416 -48 176 -48
WIRE 496 -48 416 -48
WIRE 640 -48 592 -48
WIRE 688 -48 640 -48
WIRE 688 -16 688 -48
WIRE 176 16 176 -48
WIRE 416 80 416 -48
WIRE 16 96 16 -48
WIRE 176 128 176 96
WIRE 224 128 176 128
WIRE 352 128 304 128
WIRE 688 128 688 64
WIRE 176 208 176 128
WIRE 416 208 416 176
WIRE 544 208 544 16
WIRE 544 208 416 208
WIRE 416 240 416 208
WIRE 16 336 16 176
WIRE 176 336 176 272
WIRE 176 336 16 336
WIRE 416 336 416 320
WIRE 416 336 176 336
WIRE 688 336 688 192
WIRE 688 336 416 336
WIRE 16 368 16 336
FLAG 16 368 0
FLAG 640 -48 vcc
SYMBOL voltage 16 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 160 0 R0
SYMATTR InstName R1
SYMATTR Value 2k2
SYMBOL zener 192 272 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value UMZ5_1N
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 320 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL pnp 352 176 M180
WINDOW 0 59 34 Left 2
WINDOW 3 53 61 Left 2
SYMATTR InstName Q1
SYMATTR Value BC857C
SYMBOL pnp 592 16 M270
WINDOW 0 67 61 VLeft 2
WINDOW 3 89 84 VLeft 2
SYMATTR InstName Q2
SYMATTR Value BC857C
SYMBOL res 400 224 R0
SYMATTR InstName R3
SYMATTR Value 5k6
SYMBOL res 672 -32 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL LED 672 128 R0
SYMATTR InstName D2
SYMATTR Value NSCW100
SYMATTR Description Diode
SYMATTR Type diode
TEXT 72 376 Left 2 !.dc V1 3 21 0.1
TEXT -32 -136 Left 2 ;https://theorycircuit.com/power-circuits/simple-overvoltage-protection-circuit/
TEXT -32 -176 Left 4 ;Input Supply Protection (BC857)
* Z:\tmp\asc_dec_bjh7r6w2\189cf613a6e2_open_loop_4_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R2 fb N001 1K
XU1 0 inm vcc vee N002 LT6016 ;pnba IN+)IN-)VCC)VEE)OUT
R1 N002 fb 1K
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6016.asy)
.lib LT6016.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 16 -272 16
WIRE 128 16 16 16
WIRE 192 16 128 16
WIRE 384 16 272 16
WIRE 128 80 128 16
WIRE 128 224 128 160
WIRE 240 240 240 208
WIRE 128 256 128 224
WIRE 208 256 128 256
WIRE 384 272 384 16
WIRE 384 272 272 272
WIRE 432 272 384 272
WIRE 480 272 432 272
WIRE 208 288 128 288
WIRE 432 304 432 272
WIRE 128 352 128 288
WIRE 240 384 240 304
WIRE 432 416 432 368
SYMBOL res 32 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL Opamps\\LT6016 240 272 R0
SYMATTR InstName U1
SYMBOL res 288 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG 128 352 0
FLAG 240 384 vee
FLAG 240 208 vcc
FLAG 128 16 fb
FLAG 128 224 inm
FLAG 432 416 0
* Z:\home\khalils\Downloads\files\data\raw_asc\35d6eef04a45_rectification-v3.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 0 20
D1 N001 N002 D
L1 N002 N003 10m
C1 N003 0 0.01
V1 N001 0 SINE(0 10 50 0 0 0 0)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -16 64 -240 64
WIRE 144 64 48 64
WIRE 336 64 224 64
WIRE 496 64 336 64
WIRE 336 128 336 64
WIRE -240 144 -240 64
WIRE 496 144 496 64
WIRE -240 336 -240 224
WIRE 336 336 336 208
WIRE 336 336 -240 336
WIRE 496 336 496 208
WIRE 496 336 336 336
WIRE -240 368 -240 336
FLAG -240 368 0
SYMBOL res 320 112 R0
SYMATTR InstName R1
SYMATTR Value 20
SYMBOL diode -16 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL ind 128 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10m
SYMBOL cap 480 144 R0
SYMATTR InstName C1
SYMATTR Value 0.01
SYMBOL voltage -240 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 10 50 0 0 0 0)
TEXT -272 392 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17562.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17562.asy)
R2 N003 0 200K
V2 N005 0 5
V4 N002 0 2
R1 IN N003 2.1Meg
R6 N005 N004 20K
R3 N006 IN 499K
R8 N007 0 2.87K
R4 0 N006 20K
V3 N001 0 PULSE(0 1 70m 1m 1m 100m)
V1 IN 0 24
S1 0 OUT N001 0 SHORT
C2 OUT 0 150
XU1 IN N007 0 0 N002 N004 0 OUT N003 N006 MAX17562 ;pnba IN)SETI)GND)_HVEN)EN)_FLAG)_RIEN)OUT)UVLO)OVLO
.model SHORT SW(Ron=4 Roff=100K Vt=.5 Vh=-.4)
.tran 0.8 startup
.lib MAX17562.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1800 680
WIRE -304 -352 -432 -352
WIRE -192 -352 -304 -352
WIRE -16 -352 -192 -352
WIRE 400 -352 272 -352
WIRE 512 -352 400 -352
WIRE 672 -352 560 -352
WIRE -432 -336 -432 -352
WIRE 400 -336 400 -352
WIRE 512 -336 512 -352
WIRE 672 -336 672 -352
WIRE 560 -320 560 -352
WIRE -16 -304 -96 -304
WIRE -96 -288 -96 -304
WIRE -304 -272 -304 -352
WIRE -432 -240 -432 -256
WIRE 400 -240 400 -272
WIRE 512 -240 512 -256
WIRE 672 -240 672 -256
WIRE -96 -192 -96 -208
WIRE -304 -160 -304 -192
WIRE -16 -160 -304 -160
WIRE 384 -160 272 -160
WIRE 576 -160 464 -160
WIRE -304 -144 -304 -160
WIRE 576 -128 576 -160
WIRE -192 -96 -192 -352
WIRE 400 -64 272 -64
WIRE -304 -32 -304 -64
WIRE 400 -32 400 -64
WIRE 576 -32 576 -48
WIRE -192 16 -192 -16
WIRE -16 16 -192 16
WIRE 336 16 272 16
WIRE -192 32 -192 16
WIRE 336 32 336 16
WIRE -16 128 -80 128
WIRE 336 128 336 112
WIRE 336 128 272 128
WIRE -192 160 -192 112
WIRE -80 160 -80 128
WIRE 336 160 336 128
SYMBOL cap 384 -336 R0
SYMATTR InstName C2
SYMATTR Value 150
SYMBOL res -208 0 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 499K
SYMBOL res -208 128 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 20K
SYMBOL res -320 -288 R0
SYMATTR InstName R1
SYMATTR Value 2.1Meg
SYMBOL voltage 672 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 70m 1m 1m 100m)
SYMBOL voltage 576 -144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -96 -304 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 2
SYMBOL res 480 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 20K
SYMBOL res 320 16 R0
SYMATTR InstName R8
SYMATTR Value 2.87K
SYMBOL voltage -432 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res -320 -160 R0
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL sw 512 -240 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL MAX17562 128 -112 R0
SYMATTR InstName U1
FLAG -432 -240 0
FLAG 400 -240 0
FLAG 512 -352 OUT
FLAG -432 -352 IN
FLAG 512 -240 0
FLAG 560 -272 0
FLAG 672 -240 0
FLAG -192 160 0
FLAG 336 160 0
FLAG 576 -32 0
FLAG -96 -192 0
FLAG -304 -32 0
FLAG -80 160 0
FLAG 400 -32 0
TEXT 480 144 Left 2 !.model SHORT SW(Ron=4 Roff=100K Vt=.5 Vh=-.4)
TEXT 480 184 Left 2 !.tran 0.8 startup