Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\76ffa4d989a7_BC337V1_Eingangskennlinie.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 N002 0 0 BC337-40
R2 Vcc N001 1R
R1 Vin N002 6500R
VCC Vcc 0 5V
V1 Vin 0 5V
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 -96 208 -96
WIRE 208 -64 208 -96
WIRE 208 64 208 16
WIRE 416 96 416 -96
WIRE 0 112 -96 112
WIRE 144 112 80 112
WIRE -96 192 -96 112
WIRE 208 320 208 160
WIRE 416 320 416 176
WIRE -96 336 -96 272
SYMBOL voltage 416 80 R0
SYMATTR InstName VCC
SYMATTR Value 5V
SYMBOL npn 144 64 R0
SYMATTR InstName Q1
SYMATTR Value BC337-40
SYMBOL res -16 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 6500R
SYMBOL res 192 -80 R0
SYMATTR InstName R2
SYMATTR Value 1R
SYMBOL voltage -96 176 R0
SYMATTR InstName V1
SYMATTR Value 5V
FLAG 208 320 0
FLAG 416 320 0
FLAG -96 336 0
FLAG -96 112 Vin
FLAG 208 -96 Vcc
TEXT -128 360 Left 2 !.dc V1 0 1
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8505.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8505.asy)
V1 +V 0 2.5
V2 -V 0 -2.5
R1 N001 0 10K
Rload OUT 0 10K
R2 OUT N001 10K
XU1 IN N001 +V -V OUT AD8505 ;pnba In+)In-)V+)V-)OUT
Vin IN 0 SINE(0 1 1K)
.tran 10m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL AD8505 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 1K)
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
TEXT 712 -952 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\1cad1d4c5921_tut4_ii.asc
* Generated by LTspice 26.0.1 for Windows.
* Op Amp
* Haricharan B EP21B015
* .ac dec 100 10 1G
E2 N004 N006 N005 N007 1
R3 N003 N007 9k
C2 N002 0 {C2}
E1 N003 0 N002 0 1
G2 N002 0 N001 0 {gm2}
V1 N005 0 1 AC 1
G1 N001 0 N004 N006 {gm1}
C1 N001 0 {C1}
R4 N007 0 1k
R2 N002 0 {R2}
R1 N001 0 {R1}
.params r1=1000k r2=1000k gm1=0.1m gm2=0.1m
.tran 0 5m 0 startup
.step param K list 1 2 3 4 5 6 7 8 9 10
.param c1=table(K, 1, 1n, 2, 10n, 3, 40n, 4, 100n, 5, 141.42n, 6, 200n, 7, 500n, 8, 1u, 9, 2u, 10, 10u)
.param c2=table(K, 1, 1n, 2, 0.1n, 3, 25p, 4, 10p, 5, 7.07p, 6, 5p, 7, 2p, 8, 1p, 9, 0.5p, 10, 0.1p)
.options gshunt=1e-12
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1236 680
WIRE 352 48 256 48
WIRE 432 48 352 48
WIRE 464 48 432 48
WIRE 640 48 544 48
WIRE 720 48 640 48
WIRE 800 48 720 48
WIRE 1008 48 848 48
WIRE 848 80 848 48
WIRE 352 96 352 48
WIRE 432 96 432 48
WIRE 640 96 640 48
WIRE 720 96 720 48
WIRE 800 96 800 48
WIRE 160 112 112 112
WIRE 256 112 256 48
WIRE 64 128 16 128
WIRE 208 128 192 128
WIRE 544 128 544 48
WIRE 1008 128 1008 48
WIRE 64 176 16 176
WIRE 160 176 160 112
WIRE 208 176 160 176
WIRE 192 192 192 128
WIRE 192 192 112 192
WIRE 464 192 464 48
WIRE 496 192 464 192
WIRE 256 208 256 192
WIRE 352 208 352 176
WIRE 352 208 256 208
WIRE 432 208 432 160
WIRE 432 208 352 208
WIRE 544 208 432 208
WIRE 640 208 640 176
WIRE 640 208 544 208
WIRE 720 208 720 160
WIRE 720 208 640 208
WIRE 848 208 848 160
WIRE 848 208 720 208
WIRE 352 224 352 208
WIRE 464 224 352 224
WIRE 464 256 464 224
WIRE 16 272 16 176
WIRE 1008 272 1008 208
WIRE 1008 272 16 272
WIRE 16 288 16 272
WIRE 1008 352 1008 272
RECTANGLE Normal 960 304 -16 16 1
SYMBOL g 544 224 M180
SYMATTR InstName G2
SYMATTR Value {gm2}
SYMBOL e 112 96 R0
SYMATTR InstName E2
SYMATTR Value 1
SYMBOL cap 704 96 R0
SYMATTR InstName C2
SYMATTR Value {C2}
SYMBOL res 992 336 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL cap 416 96 R0
SYMATTR InstName C1
SYMATTR Value {C1}
SYMBOL g 256 208 M180
SYMATTR InstName G1
SYMATTR Value {gm1}
SYMBOL res 336 80 R0
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL e 848 64 R0
SYMATTR InstName E1
SYMATTR Value 1
SYMBOL voltage 16 144 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 24 -12 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1
SYMATTR Value2 AC 1
SYMBOL res 992 112 R0
SYMATTR InstName R3
SYMATTR Value 9k
SYMBOL res 624 80 R0
SYMATTR InstName R2
SYMATTR Value {R2}
FLAG 496 144 0
FLAG 16 48 0
FLAG 464 256 0
FLAG 800 144 0
FLAG 1008 432 0
TEXT 448 -8 Left 2 ;Op Amp
TEXT 168 408 Left 2 !.params r1=1000k r2=1000k gm1=0.1m gm2=0.1m
TEXT 480 448 Left 2 !.tran 0 5m 0 startup
TEXT 320 -56 Left 2 ;Haricharan B EP21B015
TEXT -24 384 Left 2 ;.ac dec 100 10 1G
TEXT -56 504 Left 2 !.step param K list 1 2 3 4 5 6 7 8 9 10
TEXT -56 536 Left 2 !.param c1=table(K, 1, 1n, 2, 10n, 3, 40n, 4, 100n, 5, 141.42n, 6, 200n, 7, 500n, 8, 1u, 9, 2u, 10, 10u)
TEXT -56 568 Left 2 !.param c2=table(K, 1, 1n, 2, 0.1n, 3, 25p, 4, 10p, 5, 7.07p, 6, 5p, 7, 2p, 8, 1p, 9, 0.5p, 10, 0.1p)
TEXT 424 632 Left 2 !.options gshunt=1e-12
* Z:\home\khalils\Downloads\files\data\raw_asc\ADL5304.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 5
C1 0 N001 0.1
C2 N007 0 0.1
I1 N002 N005 {Ipd}
Rmntr 1P5V N002 50
R1 VLOG 0 10k
XU1 1P5V 1P5V N005 N006 N006 1P5V 1P5V N007 N007 0 0 0 NC_01 NC_02 N004 VLOG VLOG N004 1P5V 1P5V N001 N002 N003 N003 ADL5304 ;pnba VSM1)VSM2)INUM)IDEN)IREF)VSM3)VSM4)VDEN)INDN)COMM)VNEG)ACOM)2VLT)SCL3)SCL2)SCL1)VLOG)INMS)INPS)1P5V)VPOS)IMON)INNM)VNUM
.step dec param Ipd 1p 10m 10
.op
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADL5304.asy)
.lib ADL5304.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 -336 384 -336
WIRE 416 -320 416 -336
WIRE 384 -288 384 -336
WIRE 384 -160 384 -208
WIRE 416 -160 384 -160
WIRE 496 -160 480 -160
WIRE 64 -144 -288 -144
WIRE 192 -144 128 -144
WIRE 496 -144 496 -160
WIRE 64 -112 64 -144
WIRE 128 -112 128 -144
WIRE 192 -112 192 -144
WIRE 256 -112 256 -144
WIRE 384 -112 384 -160
WIRE -288 -16 -288 -144
WIRE -192 -16 -288 -16
WIRE -64 -16 -112 -16
WIRE -16 -16 -64 -16
WIRE 16 -16 -16 -16
WIRE 464 -16 432 -16
WIRE -288 16 -288 -16
WIRE -16 48 -16 -16
WIRE 16 48 -16 48
WIRE 496 48 432 48
WIRE -288 112 -288 96
WIRE 16 112 -288 112
WIRE 464 112 432 112
WIRE 576 112 464 112
WIRE 576 144 576 112
WIRE 16 176 -16 176
WIRE 464 176 464 112
WIRE 464 176 432 176
WIRE -16 240 -16 176
WIRE 16 240 -16 240
WIRE 496 240 496 48
WIRE 496 240 432 240
WIRE 576 256 576 224
WIRE -16 304 -48 304
WIRE 16 304 -16 304
WIRE -16 368 -16 304
WIRE 16 368 -16 368
WIRE 96 496 96 464
WIRE 160 496 160 464
WIRE 160 496 96 496
WIRE 224 496 224 464
WIRE 288 496 288 464
WIRE 288 496 224 496
WIRE 352 496 352 464
WIRE 352 496 288 496
WIRE 96 512 96 496
WIRE 288 512 288 496
WIRE 96 592 96 576
FLAG 416 -320 0
FLAG 496 -144 0
FLAG 464 -16 1P5V
FLAG 288 512 0
FLAG 96 592 0
FLAG -48 304 1P5V
FLAG 256 -144 1P5V
FLAG -64 -16 1P5V
FLAG 576 112 VLOG
FLAG 576 256 0
SYMBOL voltage 384 -192 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 480 -176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.1u
SYMBOL cap 80 512 R0
SYMATTR InstName C2
SYMATTR Value 0.1u
SYMBOL current -288 16 R0
WINDOW 0 35 5 Left 2
WINDOW 3 40 39 Left 2
WINDOW 123 39 73 Left 2
SYMATTR InstName I1
SYMATTR Value {Ipd}
SYMBOL res -96 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rmntr
SYMATTR Value 50
SYMBOL res 560 128 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL ADL5304 224 176 R0
SYMATTR InstName U1
TEXT -360 144 Left 2 !.step dec param Ipd 1p 10m 10
TEXT -360 616 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\0109b273ccf9_Draft4.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 AC 1
V2 +15V 0 15
R1 Output +15V 100k
C1 Output N001 1000n
.ac dec 1000 1 500k
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 512 80 496 80
WIRE -64 128 -80 128
WIRE 64 128 16 128
WIRE 144 128 128 128
WIRE 192 128 144 128
WIRE 496 128 496 80
WIRE 144 144 144 128
WIRE 496 224 496 208
WIRE -80 240 -80 128
WIRE 144 240 144 224
WIRE 160 240 144 240
IOPIN 192 128 BiDir
IOPIN 160 240 BiDir
IOPIN 512 80 BiDir
SYMBOL res 128 128 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL voltage 32 128 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 37 44 VTop 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL voltage 496 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL cap 128 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000n
FLAG 192 128 Output
FLAG 160 240 +15V
FLAG 496 224 0
FLAG -80 240 0
FLAG 512 80 +15V
TEXT -64 288 Left 2 !.ac dec 1000 1 500k
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7160-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7160-1.8.asy)
XU1 IN 0 IN MP_01 OUT ADM7160-x.x T=800K ;pnba Vin)GND)EN))Vout
C1 OUT 0 1
Rload OUT 0 18
V1 IN 0 5
.tran 500u startup
.lib ADM7160-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 880 1696 880
WIRE 1984 880 1824 880
WIRE 1696 896 1696 880
WIRE 1984 896 1984 880
WIRE 1696 992 1696 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL VOLTAGE 1696 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\ADM7160-1.8 1984 1024 R0
SYMATTR InstName U1
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 18
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 2256 1024 OUT
FLAG 2256 1136 0
FLAG 1696 992 0
FLAG 1696 880 IN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG733.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nCharge Injection not included\nCrosstalk at -72dB\nOnly One channel included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG733.asy)
V1 N001 0 1.5
R1 N002 0 301
V4 -V 0 -2.5
XU1 N004 N001 N002 N003 +V 0 0 -V ADG733 ;pnba IN)SA)D)SB)Vdd)GND)EN)Vss
V3 N004 0 PULSE(0 3 0 20n 20n 10u 20u)
V2 N003 0 0
V5 +V 0 2.5
C1 N002 0 36p
.tran 100u
.lib ADG733.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1696 -272 -1920 -272
WIRE -1920 -256 -1920 -272
WIRE -1408 -240 -1504 -240
WIRE -1296 -240 -1408 -240
WIRE -1408 -224 -1408 -240
WIRE -1296 -224 -1296 -240
WIRE -1696 -208 -1840 -208
WIRE -1840 -192 -1840 -208
WIRE -1920 -160 -1920 -176
WIRE -1696 -144 -1760 -144
WIRE -1472 -144 -1504 -144
WIRE -1472 -128 -1472 -144
WIRE -1408 -128 -1408 -144
WIRE -1296 -128 -1296 -160
WIRE -1840 -96 -1840 -112
WIRE -1760 -64 -1760 -144
WIRE -1536 -16 -1536 -32
WIRE -1664 0 -1664 -32
WIRE -1760 48 -1760 16
SYMBOL voltage -1920 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL voltage -1760 -80 R0
WINDOW 3 24 136 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 20n 20n 10u 20u)
SYMATTR InstName V3
SYMBOL voltage -1840 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL cap -1312 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL res -1424 -240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL ADG733 -1600 -192 R0
SYMATTR InstName U1
SYMBOL voltage -2144 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 2.5
SYMBOL voltage -2048 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -2.5
FLAG -1920 -160 0
FLAG -1840 -96 0
FLAG -1760 48 0
FLAG -1600 -368 +V
FLAG -1408 -128 0
FLAG -1536 -16 0
FLAG -1296 -128 0
FLAG -2048 -64 0
FLAG -2048 -144 -V
FLAG -1472 -128 0
FLAG -2144 -64 0
FLAG -2144 -144 +V
FLAG -1664 0 -V
TEXT -1360 -40 Left 2 !.tran 100u
TEXT -2160 -472 Left 2 ;Note:\nCharge Injection not included\nCrosstalk at -72dB\nOnly One channel included\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\17b1c53878a2_06._regolatore_di_tensione_con_diodo_zener.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 SINE(10 1 50)
R2 N002 0 940
RS N002 N001 215
D1 0 N002 1N750
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 80 48 80
WIRE 384 80 272 80
WIRE 544 80 384 80
WIRE 384 144 384 80
WIRE 544 144 544 80
WIRE 48 160 48 80
WIRE 48 288 48 240
WIRE 384 288 384 208
WIRE 384 288 48 288
WIRE 544 288 544 224
WIRE 544 288 384 288
WIRE 384 336 384 288
SYMBOL zener 400 208 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N750
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 528 128 R0
SYMATTR InstName R2
SYMATTR Value 940
SYMBOL voltage 48 144 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(10 1 50)
SYMBOL res 288 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RS
SYMATTR Value 215
FLAG 384 336 0
TEXT -136 360 Left 2 !.tran 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\1ad6947bcce0_8040.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8040.asy)
D1 N002 0 LXK2-PW14 N=2
V1 N001 0 24
R1 N003 0 215K
XU1 0 N001 N001 N003 N004 N004 N002 N006 N005 LTM8040 ;pnba GND)Vin)_SHDN)Rt)BIAS)LPWR)LEDA)Adj)PWM
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 500u startup
.lib LTM8040.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 16 -128 16
WIRE 224 16 48 16
WIRE -128 32 -128 16
WIRE 224 48 224 16
WIRE 48 96 48 16
WIRE 80 96 48 96
WIRE 480 96 368 96
WIRE 480 112 480 96
WIRE -128 128 -128 112
WIRE -16 160 -32 160
WIRE 80 160 64 160
WIRE 384 160 368 160
WIRE 80 224 64 224
WIRE 384 224 384 160
WIRE 384 224 368 224
WIRE 480 240 480 176
WIRE 80 288 64 288
WIRE 224 352 224 336
SYMBOL res 80 144 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 215K
SYMBOL PowerProducts\\LTM8040 224 192 R0
SYMATTR InstName U1
SYMBOL voltage -128 16 R0
WINDOW 3 30 97 Left 0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL LED 464 112 R0
WINDOW 123 24 100 Left 0
SYMATTR Value2 N=2
SYMATTR InstName D1
SYMATTR Value LXK2-PW14
FLAG -128 128 0
FLAG -32 160 0
FLAG 224 352 0
FLAG 480 240 0
TEXT 408 328 Left 0 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4600HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4600HV.asy)
V1 IN 0 7
R2 OUT N008 100K
Rload OUT 0 .15
XU1 N001 N006 N002 N003 N005 N007 N008 N004 0 0 OUT IN LTM4600HV ;pnba Fset)SVin)EXTVcc)FCB)Run)Comp)PwrGD)Voset)SGND)PGND)Vout)Vin
R1 N004 0 67K
.tran 2.2m startup
.lib LTM4600HV.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1260 692
WIRE 384 64 176 64
WIRE 176 80 176 64
WIRE 384 80 384 64
WIRE 512 80 512 64
WIRE 272 128 256 128
WIRE 768 128 624 128
WIRE 816 128 768 128
WIRE 816 144 816 128
WIRE 176 176 176 160
WIRE 272 176 256 176
WIRE 640 176 624 176
WIRE 736 176 720 176
WIRE 272 224 256 224
WIRE 640 224 624 224
WIRE 816 240 816 224
WIRE 272 272 256 272
WIRE 640 272 624 272
WIRE 768 272 768 128
WIRE 768 272 720 272
WIRE 384 336 384 320
WIRE 512 336 512 320
SYMBOL res 800 128 R0
SYMATTR InstName Rload
SYMATTR Value .15
SYMBOL PowerProducts\\LTM4600HV 448 192 R0
SYMATTR InstName U1
SYMBOL voltage 176 64 R0
WINDOW 0 23 25 Left 2
WINDOW 3 30 90 Left 2
SYMATTR InstName V1
SYMATTR Value 7
SYMBOL res 736 256 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL res 624 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 67K
FLAG 176 176 0
FLAG 384 336 0
FLAG 512 336 0
FLAG 816 240 0
FLAG 736 176 0
FLAG 176 64 IN
FLAG 816 128 OUT
TEXT 736 336 Left 2 !.tran 2.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3612.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3612.asy)
XU1 0 IN 0 MP_01 MP_02 MP_03 MP_04 IN MP_05 MP_06 N001 MP_07 IN IN IN NC_08 0 N002 IN IN 0 LTC3612 ;pnba DDR)Rt/Sync)SGND)))))PVin)))SW))PVin_drv)SVin)Run)Pgood)Mode)FB)Ith)Trk/SS)PGND
V1 IN 0 3.6
Rload OUT 0 .82
R1 OUT N002 665K
L1 N001 OUT .56 Rpar=5K
C1 OUT 0 47 Rser=2m
R2 N002 0 210K
.tran 1.2m startup
.lib LTC3612.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 -96 -96 -96
WIRE 160 -96 0 -96
WIRE 288 -96 160 -96
WIRE 400 -96 288 -96
WIRE -96 -80 -96 -96
WIRE 160 -80 160 -96
WIRE 288 -80 288 -96
WIRE 64 -16 48 -16
WIRE 400 -16 400 -96
WIRE 400 -16 384 -16
WIRE -96 16 -96 0
WIRE 432 96 384 96
WIRE 544 96 512 96
WIRE 672 96 544 96
WIRE 752 96 672 96
WIRE 544 112 544 96
WIRE 672 112 672 96
WIRE 752 112 752 96
WIRE 0 208 0 -96
WIRE 64 208 0 208
WIRE 544 208 544 192
WIRE 544 208 384 208
WIRE 672 208 672 176
WIRE 752 208 752 192
WIRE 544 224 544 208
WIRE 64 320 48 320
WIRE 400 320 400 -16
WIRE 400 320 384 320
WIRE 544 320 544 304
WIRE 0 432 0 208
WIRE 64 432 0 432
WIRE 400 432 400 320
WIRE 400 432 384 432
WIRE 160 512 160 496
WIRE 288 512 288 496
SYMBOL res 528 208 R0
SYMATTR InstName R2
SYMATTR Value 210K
SYMBOL res 736 96 R0
SYMATTR InstName Rload
SYMATTR Value .82
SYMBOL ind 416 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value .56
SYMATTR SpiceLine Rpar=5K
SYMBOL voltage -96 -96 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL PowerProducts\\LTC3612 224 208 R0
SYMATTR InstName U1
SYMBOL res 528 96 R0
SYMATTR InstName R1
SYMATTR Value 665K
SYMBOL cap 656 112 R0
SYMATTR InstName C1
SYMATTR Value 47
SYMATTR SpiceLine Rser=2m
FLAG 48 -16 0
FLAG 48 320 0
FLAG 160 512 0
FLAG 288 512 0
FLAG 672 208 0
FLAG 544 320 0
FLAG 752 208 0
FLAG 752 96 OUT
FLAG -96 -96 IN
FLAG -96 16 0
TEXT 520 424 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1764.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1764.asy)
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 10 Rser=100m
Rload OUT 0 500
XU1 IN IN 0 OUT OUT LT1764 ;pnba _SHDN)IN)GND)OUT)ADJ
.tran 1
.lib LT1764.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -224 48
WIRE 16 48 0 48
WIRE 320 48 304 48
WIRE 384 48 320 48
WIRE 544 48 384 48
WIRE -224 64 -224 48
WIRE 384 64 384 48
WIRE 544 64 544 48
WIRE 0 144 0 48
WIRE 16 144 0 144
WIRE 320 144 320 48
WIRE 320 144 304 144
WIRE -224 160 -224 144
WIRE 384 160 384 128
WIRE 544 160 544 144
WIRE 160 240 160 208
SYMBOL PowerProducts\\LT1764 160 96 R0
SYMATTR InstName U1
SYMBOL res 528 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL cap 368 64 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 Rser=100m
SYMATTR InstName C1
SYMATTR Value 10u
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -224 160 0
FLAG 384 160 0
FLAG 544 160 0
FLAG 160 240 0
FLAG 544 48 OUT
FLAG -224 48 IN
TEXT 352 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\8e2c8a259da0_pmos_setup.asc
* Generated by LTspice 26.0.1 for Windows.
* ID VS VGS PLOT SETUP
vg vg 0 1.15
M1 0 vg vdd vdd PMOS l=0.18u w=1.44u
vdd vdd 0 1.8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.op
.include tsmc180.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -272 112 -272 80
WIRE -208 112 -272 112
WIRE -272 160 -272 112
WIRE -320 176 -368 176
WIRE -208 208 -208 112
WIRE -208 208 -272 208
WIRE -672 224 -672 176
WIRE -560 224 -560 176
WIRE -672 352 -672 304
WIRE -560 352 -560 304
WIRE -272 352 -272 256
IOPIN -672 176 In
IOPIN -560 176 In
IOPIN -272 80 In
IOPIN -368 176 In
SYMBOL voltage -560 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vdd
SYMATTR Value 1.8
SYMBOL pmos4 -320 256 M180
WINDOW 123 -6 -5 Left 2
SYMATTR InstName M1
SYMATTR Value2 l=0.18u w=1.44u
SYMBOL voltage -672 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vg
SYMATTR Value 1.15
FLAG -272 352 0
FLAG -672 352 0
FLAG -672 176 vg
FLAG -560 352 0
FLAG -560 176 vdd
FLAG -272 80 vdd
FLAG -368 176 vg
TEXT -736 24 Left 2 !.op
TEXT -736 0 Left 2 !.include tsmc180.txt
TEXT -544 -40 Left 2 ;ID VS VGS PLOT SETUP
* Z:\home\khalils\Downloads\files\data\raw_asc\0bef11846188_CMOS.asc
* Generated by LTspice 26.0.1 for Windows.
Vin N002 0 V
VDD N001 0 5
M1 N001 N002 Y N001 PMOS l=180nm w=360um
M2 Y N002 0 0 NMOS l=180nm w=360um
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.noise Y 5 lin 10 1 1000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1192 992
WIRE 720 336 624 336
WIRE 720 384 720 336
WIRE 624 416 624 336
WIRE 720 496 720 464
WIRE 752 496 720 496
WIRE 720 512 720 496
WIRE 752 560 752 496
WIRE 752 560 720 560
WIRE 672 592 624 592
WIRE 624 720 624 592
WIRE 624 720 432 720
WIRE 720 720 720 608
WIRE 928 720 720 720
WIRE 432 752 432 720
WIRE 720 768 720 720
WIRE 752 816 720 816
WIRE 624 848 624 720
WIRE 672 848 624 848
WIRE 432 864 432 832
WIRE 720 880 720 864
WIRE 752 880 752 816
WIRE 752 880 720 880
WIRE 720 912 720 880
IOPIN 928 720 Out
SYMBOL voltage 720 480 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL nmos4 672 768 R0
SYMATTR InstName M2
SYMATTR Value2 l=180nm w=360um
SYMBOL voltage 432 736 R0
SYMATTR InstName Vin
SYMBOL pmos4 672 512 R0
SYMATTR InstName M1
SYMATTR Value2 l=180nm w=360um
FLAG 720 912 0
FLAG 624 416 0
FLAG 928 720 Y
FLAG 432 864 0
TEXT 896 848 Left 2 !.noise Y 5 lin 10 1 1000