Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8032.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8032.asy)
R2 OUT N001 10K
V2 -V 0 -5
R1 N001 0 10K
Vin IN 0 SINE(0 1 100K)
V1 +V 0 5
XU1 IN N001 +V -V OUT AD8031 ;pnba In+)In-)V+)V-)OUT
.tran 100u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 192 -1136 192 -1152
WIRE 320 -1136 320 -1152
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 704 -1104 640 -1104
WIRE 544 -1088 464 -1088
WIRE 464 -1072 464 -1088
WIRE 192 -1040 192 -1056
WIRE 320 -1040 320 -1056
WIRE 464 -976 464 -992
SYMBOL voltage 464 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100K)
SYMBOL voltage 192 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL opamps\\AD8032 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 320 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -5
FLAG 192 -1152 +V
FLAG 464 -976 0
FLAG 704 -1104 OUT
FLAG 464 -1088 IN
FLAG 576 -1136 +V
FLAG 320 -1152 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 320 -1040 0
FLAG 192 -1040 0
TEXT 720 -984 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\95511448a503_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
* Bn/Bp=1
* Bn/Bp=3
* Bn/Bp=0.333
M4 Vout Vin VDD VDD P_1u l=1u w=30u
M2 Vout Vin 0 0 N_1u l=1u w=10u
VDD VDD 0 5
M3 Vout Vin 0 0 N_1u l=1u w=10u
Vin Vin 0 0
M6 Vout Vin VDD VDD P_1u l=1u w=90u
M1 Vout Vin 0 0 N_1u l=1u w=10u
M5 Vout Vin VDD VDD P_1u l=1u w=10u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib D:\software\pure_models.txt
.dc Vin 0 5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 16 48 16
WIRE 464 16 464 -48
WIRE 128 32 128 -48
WIRE 288 32 288 -48
WIRE 416 32 400 32
WIRE 80 48 80 16
WIRE 240 48 224 48
WIRE 224 112 224 48
WIRE 400 112 400 32
WIRE 464 128 464 112
WIRE 496 128 464 128
WIRE 48 144 48 16
WIRE 128 144 128 128
WIRE 144 144 128 144
WIRE 288 144 288 128
WIRE 320 144 288 144
WIRE 464 160 464 128
WIRE 128 176 128 144
WIRE 288 176 288 144
WIRE 576 208 464 208
WIRE 192 224 128 224
WIRE 384 224 288 224
WIRE 400 240 400 112
WIRE 416 240 400 240
WIRE 48 256 48 144
WIRE 80 256 48 256
WIRE 224 256 224 112
WIRE 240 256 224 256
WIRE 576 272 576 208
WIRE 192 288 192 224
WIRE 384 288 384 224
WIRE -48 320 -48 272
IOPIN 144 144 Out
IOPIN 320 144 Out
IOPIN 496 128 Out
SYMBOL nmos4 416 160 R0
WINDOW 123 56 100 Left 2
SYMATTR InstName M3
SYMATTR Value N_1u
SYMATTR Value2 l=1u w=10u
SYMBOL pmos4 416 112 M180
WINDOW 123 56 44 Left 2
SYMATTR InstName M6
SYMATTR Value P_1u
SYMATTR Value2 l=1u w=90u
SYMBOL voltage -48 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL pmos4 240 128 M180
WINDOW 123 56 44 Left 2
SYMATTR InstName M5
SYMATTR Value P_1u
SYMATTR Value2 l=1u w=10u
SYMBOL pmos4 80 128 M180
WINDOW 123 56 44 Left 2
SYMATTR InstName M4
SYMATTR Value P_1u
SYMATTR Value2 l=1u w=30u
SYMBOL voltage -48 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 0
SYMBOL nmos4 240 176 R0
WINDOW 123 56 100 Left 2
SYMATTR InstName M2
SYMATTR Value N_1u
SYMATTR Value2 l=1u w=10u
SYMBOL nmos4 80 176 R0
WINDOW 123 56 100 Left 2
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=1u w=10u
FLAG 144 144 Vout
FLAG 320 144 Vout
FLAG 496 128 Vout
FLAG 128 272 0
FLAG 288 272 0
FLAG 464 256 0
FLAG 192 288 0
FLAG 384 288 0
FLAG 576 272 0
FLAG -48 320 0
FLAG -48 128 0
FLAG 48 144 Vin
FLAG 400 112 Vin
FLAG 224 112 Vin
FLAG 128 -48 VDD
FLAG 288 -48 VDD
FLAG 464 -48 VDD
FLAG -48 48 VDD
FLAG 128 80 VDD
FLAG 288 80 VDD
FLAG 464 64 VDD
FLAG -48 192 Vin
TEXT 376 384 Left 2 !.lib D:\\software\\pure_models.txt
TEXT -82 404 Left 2 !.dc Vin 0 5
TEXT 64 344 Left 2 ;Bn/Bp=1
TEXT 248 336 Left 2 ;Bn/Bp=3
TEXT 504 320 Left 2 ;Bn/Bp=0.333
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6994-1.asc
* Generated by LTspice 26.0.1 for Windows.
* LTC6994-1 10ms Delay Interval Generator\nOutput Low When IN is Low\nRising Edge On IN Starts Delay to Output Rising Edge\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6994-1.asy)
V2 N001 0 PULSE(3.3 0 0.25m 1n 1n 0.5m 25m 3)
R4 OUT 0 100K
XU1 N001 0 N003 N004 N002 OUT LTC6994-1 ;pnba IN)GND)SET)DIV)V+)OUT
R1 N003 0 121K
V1 N002 0 5
R3 N004 0 392K
R2 N002 N004 1000K
.tran 100m startup
.lib LTC6994-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE -224 96 -240 96
WIRE 96 96 -144 96
WIRE 624 96 320 96
WIRE 624 112 624 96
WIRE 96 176 64 176
WIRE 400 176 320 176
WIRE 528 176 400 176
WIRE 400 192 400 176
WIRE 528 192 528 176
WIRE 624 208 624 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 352 256 320 256
WIRE 352 288 352 256
WIRE 400 288 400 272
WIRE 400 288 352 288
WIRE 528 288 528 272
WIRE 400 304 400 288
WIRE 400 400 400 384
SYMBOL voltage -128 96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(3.3 0 0.25m 1n 1n 0.5m 25m 3)
SYMATTR InstName V2
SYMBOL res 608 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL SpecialFunctions\\LTC6994-1 208 176 R0
SYMATTR InstName U1
SYMBOL voltage 528 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 384 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 121K
SYMBOL res 384 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
FLAG -240 96 0
FLAG 528 288 0
FLAG 624 96 OUT
FLAG 624 208 0
FLAG 400 400 0
FLAG -16 256 0
FLAG 64 176 0
TEXT 528 368 Left 2 !.tran 100m startup
TEXT 216 56 Bottom 2 ;LTC6994-1 10ms Delay Interval Generator\nOutput Low When IN is Low\nRising Edge On IN Starts Delay to Output Rising Edge\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3619B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3619B.asy)
R2 N004 0 255K
XU1 N004 IN N005 NC_01 N002 IN N001 NC_02 IN N003 0 LTC3619B ;pnba FB1)Run1)Rlim)Pgood1)SW1)Vin)SW2)Pgood2)Run2)FB2)GND
L1 N002 OUT1 3.3
V1 IN 0 4.2
Rload2 OUT2 0 20
R5 N003 0 255K
R3 N005 0 116K
L2 N001 OUT2 1.5
R1 OUT1 N004 511K
Rload1 OUT1 0 4.5
C1 OUT1 N004 22p
C4 OUT2 0 100 Rser=50m
C2 OUT1 0 10
R4 OUT2 N003 1190K
C3 N005 0 1000p
.tran 1.2m startup
.lib LTC3619B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 -32 -96 -32
WIRE 176 -32 32 -32
WIRE 320 -32 176 -32
WIRE -96 -16 -96 -32
WIRE 176 -16 176 -32
WIRE 32 32 32 -32
WIRE 48 32 32 32
WIRE 320 32 320 -32
WIRE 320 32 304 32
WIRE -96 80 -96 64
WIRE -208 224 -352 224
WIRE -96 224 -208 224
WIRE -48 224 -96 224
WIRE 48 224 32 224
WIRE 320 224 304 224
WIRE 432 224 400 224
WIRE 528 224 432 224
WIRE 608 224 528 224
WIRE 720 224 608 224
WIRE -352 240 -352 224
WIRE -208 240 -208 224
WIRE -96 240 -96 224
WIRE 432 240 432 224
WIRE 528 240 528 224
WIRE 608 240 608 224
WIRE 720 240 720 224
WIRE 48 320 -96 320
WIRE 432 320 304 320
WIRE 528 320 528 304
WIRE 528 320 432 320
WIRE -352 336 -352 320
WIRE -208 336 -208 304
WIRE -96 336 -96 320
WIRE 432 336 432 320
WIRE 608 336 608 304
WIRE 720 336 720 320
WIRE 128 384 128 368
WIRE 128 384 80 384
WIRE 176 384 128 384
WIRE 224 384 224 368
WIRE 80 400 80 384
WIRE 176 400 176 384
WIRE -96 432 -96 416
WIRE 432 432 432 416
WIRE 80 496 80 480
WIRE 176 496 176 464
SYMBOL cap 592 240 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL cap 512 240 R0
SYMATTR InstName C1
SYMATTR Value 22p
SYMBOL ind 304 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMBOL cap -224 240 R0
SYMATTR InstName C4
SYMATTR Value 100
SYMATTR SpiceLine Rser=50m
SYMBOL res 416 320 R0
SYMATTR InstName R2
SYMATTR Value 255K
SYMBOL res -112 320 R0
SYMATTR InstName R5
SYMATTR Value 255K
SYMBOL voltage -96 -32 R0
SYMATTR InstName V1
SYMATTR Value 4.2
SYMBOL ind 48 240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 1.5
SYMBOL res 64 384 R0
SYMATTR InstName R3
SYMATTR Value 116K
SYMBOL cap 160 400 R0
SYMATTR InstName C3
SYMATTR Value 1000p
SYMBOL res 416 224 R0
SYMATTR InstName R1
SYMATTR Value 511K
SYMBOL res -368 224 R0
SYMATTR InstName Rload2
SYMATTR Value 20
SYMBOL PowerProducts\\LTC3619B 176 176 R0
SYMATTR InstName U1
SYMBOL res -112 224 R0
SYMATTR InstName R4
SYMATTR Value 1190K
SYMBOL res 704 224 R0
SYMATTR InstName Rload1
SYMATTR Value 4.5
FLAG 432 432 0
FLAG 608 336 0
FLAG 224 384 0
FLAG 176 496 0
FLAG 80 496 0
FLAG -96 432 0
FLAG -208 336 0
FLAG -96 80 0
FLAG -352 224 OUT2
FLAG 720 224 OUT1
FLAG -96 -32 IN
FLAG 720 336 0
FLAG -352 336 0
TEXT 536 488 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6201.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 -V 0 -5
R1 OUT N001 1K
R2 N001 0 1K
V3 IN 0 SINE(0 1 1Meg)
XU1 IN N001 OUT +V -V LT6201 ;pnba IN+)IN-)OUT)VCC)VEE
.tran 10u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6201.asy)
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -240 112 -240 96
WIRE -112 112 -112 96
WIRE -240 208 -240 192
WIRE -112 208 -112 192
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 304 240 256 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
FLAG -112 208 0
FLAG 192 192 +V
FLAG -112 96 +V
FLAG 192 288 -V
FLAG -240 208 0
FLAG -240 96 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 304 240 OUT
FLAG 0 256 IN
SYMBOL voltage -112 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -240 96 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1Meg)
SYMBOL opamps\\LT6201 192 240 R0
SYMATTR InstName U1
TEXT 272 352 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\280be2dbbd15_circuito_simulacin_T2_normalizado.asc
* Generated by LTspice 26.0.1 for Windows.
XU3 N005 0 V3 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R4 N002 N001 0.664
XU2 N003 0 N004 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
R5 N006 Vin 1
C2 V3 N005 1.6
R3 V3 N001 2.02
C1 N004 N003 1.6
XU1 N001 N006 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
V1 Vin 0 AC 1
R1 N003 N002 0.664
R6 N004 N006 1
R2 N005 N004 0.391
.lib opamp.sub
.ac dec 1000 0.001 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 -48 -32 -48
WIRE 624 -48 320 -48
WIRE -32 0 -32 -48
WIRE 0 0 -32 0
WIRE 96 0 80 0
WIRE 272 32 240 32
WIRE 352 32 336 32
WIRE 528 32 496 32
WIRE 624 32 624 -48
WIRE 624 32 592 32
WIRE -32 96 -32 0
WIRE 0 96 -32 96
WIRE 96 112 96 0
WIRE 96 112 64 112
WIRE 128 112 96 112
WIRE 240 112 240 32
WIRE 240 112 208 112
WIRE 272 112 240 112
WIRE -144 128 -224 128
WIRE -32 128 -64 128
WIRE 0 128 -32 128
WIRE 352 128 352 32
WIRE 352 128 336 128
WIRE 384 128 352 128
WIRE 496 128 496 32
WIRE 496 128 464 128
WIRE 528 128 496 128
WIRE 272 144 256 144
WIRE 624 144 624 32
WIRE 624 144 592 144
WIRE 528 160 512 160
WIRE -224 176 -224 128
WIRE 256 176 256 144
WIRE 512 192 512 160
WIRE -32 256 -32 128
WIRE 80 256 -32 256
WIRE 352 256 352 128
WIRE 352 256 160 256
SYMBOL cap 336 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1.6
SYMBOL res 336 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2.02
SYMBOL res 176 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 1
SYMBOL res 480 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 0.391
SYMBOL res 224 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 0.664
SYMBOL res -48 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1
SYMBOL OpAmps\\opamp 304 64 R0
SYMATTR InstName U2
SYMBOL res 96 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 0.664
SYMBOL OpAmps\\opamp 32 48 R0
SYMATTR InstName U1
SYMBOL voltage -224 160 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL OpAmps\\opamp 560 80 R0
SYMATTR InstName U3
SYMBOL cap 592 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1.6
FLAG 256 176 0
FLAG 512 192 0
FLAG -224 128 Vin
FLAG 624 144 V3
FLAG -224 256 0
TEXT 224 312 Left 2 !.lib opamp.sub
TEXT 224 336 Left 2 !.ac dec 1000 0.001 10
* Z:\home\khalils\Downloads\files\data\raw_asc\b569886d5295_q5a.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vout in 0 0 nch_tt l=180n w=270n
Vin in 0 2.5
R1 N001 Vout 75k
V2 N001 0 2.5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.dc Vin 0 2.5 1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 -112 224 -144
WIRE 224 0 224 -32
WIRE 224 112 224 80
WIRE 352 112 224 112
WIRE 224 128 224 112
WIRE 128 208 96 208
WIRE 176 208 128 208
WIRE 96 272 96 208
WIRE 96 400 96 352
WIRE 224 400 224 224
FLAG 224 -144 0
FLAG 352 112 Vout
FLAG 128 208 in
FLAG 96 400 0
FLAG 224 400 0
SYMBOL nmos 176 128 R0
SYMATTR InstName M1
SYMATTR Value nch_tt
SYMATTR Value2 l=180n w=270n
SYMBOL voltage 96 256 R0
SYMATTR InstName Vin
SYMATTR Value 2.5
SYMBOL res 208 -16 R0
WINDOW 0 -45 40 Left 2
WINDOW 3 -51 83 Left 2
SYMATTR InstName R1
SYMATTR Value 75k
SYMBOL voltage 224 -16 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 2.5
TEXT -200 168 Left 2 !.include TSMC180.lib
TEXT -176 208 Left 2 !.dc Vin 0 2.5 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX6037_ADJ.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\MAX6037_ADJ.asy)
Iload OUT 0 PULSE(5m -5m 2m 1n 1n 5m 10m)
R1 OUT N001 1m
XU1 N001 0 IN IN OUT MAX6037_ADJ ;pnba 1)2)3)4)5
C1 OUT 0 1
V1 IN 0 3
.tran 10m
.lib MAX6037_ADJ.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1384 692
WIRE 16 32 -32 32
WIRE 160 32 16 32
WIRE 160 48 160 32
WIRE 16 80 16 32
WIRE 48 80 16 80
WIRE 336 80 272 80
WIRE 432 80 336 80
WIRE 528 80 432 80
WIRE 336 96 336 80
WIRE 432 96 432 80
WIRE 528 112 528 80
WIRE -32 176 -32 32
WIRE 432 192 432 160
WIRE 336 208 336 176
WIRE 336 208 272 208
WIRE 528 208 528 192
WIRE 160 256 160 240
WIRE -32 272 -32 256
SYMBOL voltage -32 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL MAX6037_ADJ 160 144 R0
SYMATTR InstName U1
SYMBOL cap 416 96 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 320 80 R0
SYMATTR InstName R1
SYMATTR Value 1m
SYMBOL current 528 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 33 84 Left 2
WINDOW 3 27 127 Left 2
SYMATTR InstName Iload
SYMATTR Value PULSE(5m -5m 2m 1n 1n 5m 10m)
FLAG 160 256 0
FLAG 432 192 0
FLAG -32 272 0
FLAG 160 32 IN
FLAG 528 80 OUT
FLAG 528 208 0
TEXT -64 328 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1376.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N005 0 4.99K
R1 OUT N005 5.36K
D2 0 N002 MBRS340
D1 OUT N001 1N4148
C5 OUT 0 1
C3 N001 N002 .1
C2 OUT 0 100 Rser=0.05
L1 N002 OUT 5 Rser=0.02 Rpar=5000
V1 IN 0 10
C4 N004 0 3300p
XU1 N001 IN N002 OUT N003 0 N005 N004 LT1376 top=10 bot=1T ;pnba Boost)Vin)SW)BIAS)_SHDN)GND)FB)Vc
Rload OUT 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1376.asy)
.lib LT1376.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2264 1200
WIRE 1456 640 1296 640
WIRE 1536 640 1456 640
WIRE 1632 640 1600 640
WIRE 1136 656 960 656
WIRE 1456 656 1456 640
WIRE 960 672 960 656
WIRE 1136 704 1136 656
WIRE 1296 704 1296 640
WIRE 1456 736 1456 720
WIRE 1456 736 1408 736
WIRE 1520 736 1456 736
WIRE 1632 736 1632 640
WIRE 1632 736 1600 736
WIRE 1456 752 1456 736
WIRE 960 768 960 752
WIRE 1056 784 1040 784
WIRE 1408 784 1408 736
WIRE 1408 784 1376 784
WIRE 1456 832 1456 816
WIRE 1632 864 1632 736
WIRE 1632 864 1376 864
WIRE 1744 864 1632 864
WIRE 1840 864 1744 864
WIRE 1920 864 1840 864
WIRE 1632 880 1632 864
WIRE 1744 880 1744 864
WIRE 1840 880 1840 864
WIRE 1920 880 1920 864
WIRE 976 944 960 944
WIRE 1056 944 1040 944
WIRE 1408 944 1376 944
WIRE 1408 976 1408 944
WIRE 1632 976 1632 960
WIRE 1632 976 1408 976
WIRE 1744 976 1744 944
WIRE 1840 976 1840 944
WIRE 1920 976 1920 960
WIRE 1632 992 1632 976
WIRE 1216 1040 1216 1024
WIRE 1632 1088 1632 1072
FLAG 1632 1088 0
FLAG 1840 976 0
FLAG 1456 832 0
FLAG 1920 976 0
FLAG 1744 976 0
FLAG 1216 1040 0
FLAG 960 768 0
FLAG 960 944 0
FLAG 1920 864 OUT
FLAG 960 656 IN
SYMBOL RES 1616 976 R0
SYMATTR InstName R2
SYMATTR Value 4.99K
SYMBOL res 1616 864 R0
SYMATTR InstName R1
SYMATTR Value 5.36K
SYMBOL schottky 1440 816 M180
WINDOW 0 33 59 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value MBRS340
SYMBOL DIODE 1600 624 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL POLCAP 1824 880 R0
SYMATTR InstName C5
SYMATTR Value 1
SYMBOL POLCAP 1440 656 R0
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL polcap 1728 880 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.05
SYMBOL IND 1504 752 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 5
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL VOLTAGE 960 656 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL cap 1040 928 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 3300p
SYMBOL POWERPRODUCTS\\LT1376 1216 864 R0
SYMATTR InstName U1
SYMBOL res 1904 864 R0
SYMATTR InstName Rload
SYMATTR Value 10
TEXT 1760 1112 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG2412.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 vIN vD vS -V 0 +V ADG2412 ;pnba IN)D)S)Vss)GND)Vdd
V1 +V 0 15
V2 -V 0 -15
V3 vS 0 10
V4 vIN 0 pulse(0 5 0 20n 20n 10u 20u)
R1 vD 0 301
C1 vD 0 36p
.tran 75u
* Note:\nSwitch shown for a logic 0 input\nOnly one channel included\nCrosstalk parameter not included
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG2412.asy)
.lib ADG2412.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 80 224 48
WIRE -208 144 -208 128
WIRE -48 160 -80 160
WIRE 96 160 32 160
WIRE 128 160 96 160
WIRE 352 160 320 160
WIRE 400 160 352 160
WIRE 496 160 400 160
WIRE 400 192 400 160
WIRE 496 208 496 160
WIRE 96 224 -16 224
WIRE 128 224 96 224
WIRE -208 240 -208 224
WIRE 400 288 400 272
WIRE 496 288 496 272
WIRE -208 336 -208 320
WIRE -16 336 -16 224
WIRE 288 352 288 336
WIRE 160 368 160 336
WIRE -208 432 -208 416
WIRE -16 480 -16 416
FLAG -208 432 0
FLAG -208 240 0
FLAG -208 128 +V
FLAG -208 320 -V
FLAG -80 160 0
FLAG -16 480 0
FLAG 400 288 0
FLAG 496 288 0
FLAG 224 48 +V
FLAG 160 368 -V
FLAG 288 352 0
FLAG 96 160 vS
FLAG 96 224 vIN
FLAG 352 160 vD
SYMBOL ADG2412 224 208 R0
SYMATTR InstName U1
SYMBOL voltage -208 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -208 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 48 160 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL voltage -16 320 R0
WINDOW 3 19 116 Left 2
SYMATTR Value pulse(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V4
SYMBOL res 384 176 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL cap 480 208 R0
SYMATTR InstName C1
SYMATTR Value 36p
TEXT 8 464 Left 2 !.tran 75u
TEXT -224 -56 Left 2 ;Note:\nSwitch shown for a logic 0 input\nOnly one channel included\nCrosstalk parameter not included
* Z:\home\khalils\Downloads\files\data\raw_asc\ADPL40502-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADPL40502-1.2.asy)
V1 vIN 0 2.3
C1 vOUT 0 1 Rser=1m
XU1 vIN 0 vIN vOUT ADPL40502-1.2 ;pnba Vin)GND)EN)Vout
Rload vOUT 0 6
.tran 1m startup
.lib ADPL40502-1.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2808 1464
WIRE 1824 880 1728 880
WIRE 1984 880 1824 880
WIRE 1728 896 1728 880
WIRE 1984 896 1984 880
WIRE 1728 992 1728 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 6
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMATTR SpiceLine Rser=1m
SYMBOL ADPL40502-1.2 1984 1024 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1728 880 R0
SYMATTR InstName V1
SYMATTR Value 2.3
FLAG 2256 1024 vOUT
FLAG 2256 1136 0
FLAG 1728 992 0
FLAG 1728 880 vIN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\44d744915ca7_1N60.asc
* Generated by LTspice 26.0.1 for Windows.
D1 VD1 0 1N60
V1 N001 0 0
R1 VD1 N001 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -100 10 100m
.MODEL 1N60 D RS=50.0559 EG=1.11 XTI=3 VJ=0.8 M=0.1 FC=0.5 BV=40 CJO=1.75p IS=1.37773u N=2 TT=100n type=germanium
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1868 680
WIRE 80 64 -16 64
WIRE 240 64 160 64
WIRE -16 112 -16 64
WIRE 240 112 240 64
WIRE -16 240 -16 192
WIRE 112 240 -16 240
WIRE 240 240 240 176
WIRE 240 240 112 240
WIRE 112 256 112 240
SYMBOL diode 224 112 R0
SYMATTR InstName D1
SYMATTR Value 1N60
SYMBOL res 176 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -16 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0
FLAG 112 256 0
FLAG 240 64 VD1
TEXT -48 280 Left 2 !.dc V1 -100 10 100m
TEXT 320 152 Left 2 !.MODEL 1N60 D RS=50.0559 EG=1.11 XTI=3 VJ=0.8 M=0.1 FC=0.5 BV=40 CJO=1.75p IS=1.37773u N=2 TT=100n type=germanium