Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1534.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:\nSwitch shown for a logic 0 input\nQinj not included in the model\nOnly one channel is modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1534.asy)
V2 -V 0 -8
V5 vSA 0 2.5
V4 vIN 0 PULSE(0 1.8 0 20n 20n 10u 20u)
V6 vSB 0 -8
V1 +V 0 5
C1 vD 0 36p
XU1 vIN vSA vD vSB 0 -V 0 +V ADG1534 ;pnba IN)SA)D)SB)EN)Vss)GND)Vdd
R1 vD 0 301
.tran 120u
.lib ADG1534.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -800 -320 -800 -352
WIRE -1488 -256 -1488 -272
WIRE -1376 -256 -1376 -272
WIRE -928 -256 -960 -256
WIRE -896 -256 -928 -256
WIRE -672 -224 -704 -224
WIRE -640 -224 -672 -224
WIRE -560 -224 -640 -224
WIRE -928 -192 -1040 -192
WIRE -896 -192 -928 -192
WIRE -640 -192 -640 -224
WIRE -560 -176 -560 -224
WIRE -1488 -160 -1488 -176
WIRE -1376 -160 -1376 -176
WIRE -1200 -128 -1248 -128
WIRE -928 -128 -1120 -128
WIRE -896 -128 -928 -128
WIRE -640 -96 -640 -112
WIRE -560 -96 -560 -112
WIRE -896 -64 -928 -64
WIRE -864 16 -864 -16
WIRE -736 16 -736 -16
SYMBOL voltage -1104 -128 M270
WINDOW 3 -45 209 VLeft 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 44 74 VLeft 2
SYMATTR Value PULSE(0 1.8 0 20n 20n 10u 20u)
SYMATTR InstName V4
SYMBOL voltage -944 -256 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 2.5
SYMBOL ADG1534 -800 -176 R0
SYMATTR InstName U1
SYMBOL voltage -1488 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -656 -208 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage -1376 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -8
SYMBOL cap -576 -176 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -1024 -192 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value -8
FLAG -1376 -160 0
FLAG -1488 -160 0
FLAG -1488 -272 +V
FLAG -1376 -272 -V
FLAG -1248 -128 0
FLAG -1040 -256 0
FLAG -1120 -192 0
FLAG -800 -352 +V
FLAG -736 16 0
FLAG -864 16 -V
FLAG -640 -96 0
FLAG -560 -96 0
FLAG -928 -64 0
FLAG -928 -256 vSA
FLAG -928 -192 vSB
FLAG -928 -128 vIN
FLAG -672 -224 vD
TEXT -1496 -72 Left 2 !.tran 120u
TEXT -1496 -480 Left 2 ;Notes:\nSwitch shown for a logic 0 input\nQinj not included in the model\nOnly one channel is modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8029.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8029.asy)
C2 OUT 0 22 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
R3 N003 0 158K
R1 N002 0 309K
R4 IN N001 100K
Rload OUT 0 8.6
V1 IN 0 10
XU1 N002 OUT IN IN 0 MP_01 MP_02 OUT N001 N003 LTM8029 ;pnba FB)OUT)Run)Vin)GND)))Bias)Pgood)Rt
.tran 750u startup
.lib LTM8029.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 680
WIRE 48 16 -64 16
WIRE 128 16 48 16
WIRE 144 16 128 16
WIRE 432 16 400 16
WIRE -64 32 -64 16
WIRE 48 112 48 16
WIRE 128 112 128 16
WIRE 144 112 128 112
WIRE 432 112 432 16
WIRE 432 112 400 112
WIRE 560 112 432 112
WIRE 640 112 560 112
WIRE -64 128 -64 112
WIRE 560 128 560 112
WIRE 640 128 640 112
WIRE 48 208 48 192
WIRE 144 208 48 208
WIRE 480 208 400 208
WIRE 480 224 480 208
WIRE 560 224 560 192
WIRE 640 224 640 208
WIRE 48 304 32 304
WIRE 144 304 128 304
WIRE 416 304 400 304
WIRE 480 320 480 304
SYMBOL res 32 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL voltage -64 16 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL cap 544 128 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL res 464 208 R0
SYMATTR InstName R1
SYMATTR Value 309K
SYMBOL PowerProducts\\LTM8029 272 160 R0
SYMATTR InstName U1
SYMBOL res 144 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 158K
SYMBOL res 624 112 R0
SYMATTR InstName Rload
SYMATTR Value 8.6
FLAG 416 304 0
FLAG 32 304 0
FLAG 560 224 0
FLAG 640 224 0
FLAG -64 128 0
FLAG -64 16 IN
FLAG 640 112 OUT
FLAG 480 320 0
TEXT 600 328 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\14b89643e184_demux_1default-1bit-1to2.asc
* Generated by LTspice 26.0.1 for Windows.
A1 X in 0 0 0 0 N001 0 AND
A4 X in 0 0 0 N003 N002 0 XOR
A5 N001 N002 0 0 0 0 Q[0] 0 OR
A3 N003 N004 0 0 0 0 Q[1] 0 OR
A2 in P001 0 0 0 0 N004 0 AND
A6 X 0 0 0 0 P001 0 0 BUF
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 -224 -112 -224
WIRE -176 -208 -192 -208
WIRE -48 -208 -80 -208
WIRE -192 -192 -192 -208
WIRE -176 -192 -192 -192
WIRE -48 -192 -64 -192
WIRE -192 -176 -192 -192
WIRE -176 -176 -192 -176
WIRE -64 -176 -64 -192
WIRE -48 -176 -64 -176
WIRE -192 -160 -192 -176
WIRE -176 -160 -192 -160
WIRE -160 -160 -160 -176
WIRE -160 -160 -176 -160
WIRE -64 -160 -64 -176
WIRE -48 -160 -64 -160
WIRE -64 -144 -64 -160
WIRE -48 -144 -64 -144
WIRE -32 -144 -32 -160
WIRE -32 -144 -48 -144
WIRE -80 -80 -80 -208
WIRE -80 -80 -112 -80
WIRE -176 -64 -192 -64
WIRE -192 -48 -192 -64
WIRE -176 -48 -192 -48
WIRE -80 -48 -96 -48
WIRE -192 -32 -192 -48
WIRE -176 -32 -192 -32
WIRE -192 -16 -192 -32
WIRE -176 -16 -192 -16
WIRE -144 -16 -144 -32
WIRE -144 -16 -176 -16
WIRE -80 48 -80 -48
WIRE -48 48 -80 48
WIRE -48 64 -112 64
WIRE -176 80 -192 80
WIRE -48 80 -64 80
WIRE -192 96 -192 80
WIRE -176 96 -192 96
WIRE -64 96 -64 80
WIRE -48 96 -64 96
WIRE -192 112 -192 96
WIRE -176 112 -192 112
WIRE -64 112 -64 96
WIRE -48 112 -64 112
WIRE -192 128 -192 112
WIRE -176 128 -192 128
WIRE -160 128 -160 112
WIRE -160 128 -176 128
WIRE -64 128 -64 112
WIRE -48 128 -64 128
WIRE -32 128 -32 112
WIRE -32 128 -48 128
FLAG -176 -160 0
FLAG -112 -192 0
FLAG -176 -80 in
IOPIN -176 -80 In
FLAG 16 -208 Q[0]
IOPIN 16 -208 Out
FLAG -176 -96 X
IOPIN -176 -96 In
FLAG -176 -16 0
FLAG -176 -224 in
IOPIN -176 -224 In
FLAG -176 -240 X
IOPIN -176 -240 In
FLAG -48 -144 0
FLAG 16 -176 0
FLAG 16 64 Q[1]
IOPIN 16 64 Out
FLAG -48 128 0
FLAG 16 96 0
FLAG -176 128 0
FLAG -112 96 0
FLAG -176 48 in
IOPIN -176 48 In
FLAG -240 64 X
IOPIN -240 64 In
FLAG -240 80 0
SYMBOL Digital\\and -144 -272 R0
SYMATTR InstName A1
SYMBOL Digital\\xor -128 -128 R0
SYMATTR InstName A4
SYMBOL Digital\\or -16 -256 R0
SYMATTR InstName A5
SYMBOL Digital\\or -16 16 R0
SYMATTR InstName A3
SYMBOL Digital\\and -144 16 R0
SYMATTR InstName A2
SYMBOL Digital\\inv -240 0 R0
SYMATTR InstName A6
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7158-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7158-1.8.asy)
C3 N004 0 1
Rload OUT 0 1.8
R1 IN N001 100K
V1 IN 0 2.4
C1 OUT 0 10
XU1 OUT MP_01 OUT N002 N001 N003 N003 N004 IN 0 ADP7158_9 Vreg=2.111 Vref=1.816 ;pnba Vout))Vout_Sense)Byp)EN)Ref_Sense)Ref)Vreg)Vin)GND
C2 N003 0 1
C4 N002 0 1
.tran 5m startup
.lib ADP7158_9.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 0 -160 0
WIRE 80 0 -32 0
WIRE 416 0 400 0
WIRE 464 0 416 0
WIRE 560 0 464 0
WIRE -160 16 -160 0
WIRE 464 16 464 0
WIRE 560 16 560 0
WIRE -32 96 -32 0
WIRE -16 96 -32 96
WIRE 80 96 64 96
WIRE 416 96 416 0
WIRE 416 96 400 96
WIRE -160 112 -160 96
WIRE 464 112 464 80
WIRE 560 112 560 96
WIRE 0 192 -16 192
WIRE 80 192 64 192
WIRE 416 192 400 192
WIRE 464 192 416 192
WIRE 464 208 464 192
WIRE 0 288 -16 288
WIRE 80 288 64 288
WIRE 416 288 416 192
WIRE 416 288 400 288
WIRE 464 288 464 272
WIRE 240 368 240 352
SYMBOL res 544 0 R0
SYMATTR InstName Rload
SYMATTR Value 1.8
SYMBOL voltage -160 0 R0
SYMATTR InstName V1
SYMATTR Value 2.4
SYMBOL cap 64 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 448 208 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res -32 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 448 16 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ADP7158-1.8 240 176 R0
SYMATTR InstName U1
SYMBOL cap 64 176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
FLAG 240 368 0
FLAG 464 288 0
FLAG 464 112 0
FLAG -16 288 0
FLAG -16 192 0
FLAG -160 112 0
FLAG 560 112 0
FLAG -160 0 IN
FLAG 560 0 OUT
TEXT 504 368 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7160-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7160-3.3.asy)
XU1 IN 0 IN MP_01 OUT ADM7160-x.x T=2.3Meg ;pnba Vin)GND)EN))Vout
V1 IN 0 5
C1 OUT 0 1
Rload OUT 0 33
.tran 500u startup
.lib ADM7160-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 880 1696 880
WIRE 1984 880 1824 880
WIRE 1696 896 1696 880
WIRE 1984 896 1984 880
WIRE 1696 992 1696 976
WIRE 1824 1024 1824 880
WIRE 1856 1024 1824 1024
WIRE 2160 1024 2112 1024
WIRE 2256 1024 2160 1024
WIRE 2160 1040 2160 1024
WIRE 2256 1040 2256 1024
WIRE 2160 1136 2160 1104
WIRE 2256 1136 2256 1120
WIRE 1984 1168 1984 1152
SYMBOL PowerProducts\\ADM7160-3.3 1984 1024 R0
SYMATTR InstName U1
SYMBOL VOLTAGE 1696 880 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 2240 1024 R0
SYMATTR InstName Rload
SYMATTR Value 33
SYMBOL cap 2144 1040 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG 2256 1024 OUT
FLAG 2256 1136 0
FLAG 1696 992 0
FLAG 1696 880 IN
FLAG 1984 1168 0
FLAG 2160 1136 0
TEXT 2144 1200 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5673R.asc
* Generated by LTspice 26.0.1 for Windows.
RLOAD vOUT 0 1k
CLOAD vOUT 0 10n
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
V1 Vdd 0 5
XU2 vDAC Vdd 0 vOUT AD5673R Gain=2 ;pnba Vdac)Vdd)GND)Vout
.tran 50u
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5673R.asy)
.lib AD5673R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 112 112 0 112
WIRE 192 112 112 112
WIRE 272 112 192 112
WIRE -800 144 -800 112
WIRE 112 144 112 112
WIRE 272 160 272 112
WIRE -800 256 -800 224
WIRE 112 272 112 224
WIRE 272 272 272 224
WIRE -240 288 -240 256
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 112 272 0
FLAG 272 272 0
FLAG -240 -80 Vdd
SYMBOL res 96 128 R0
SYMATTR InstName RLOAD
SYMATTR Value 1k
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL AD5673R -208 112 R0
SYMATTR InstName U2
TEXT -160 312 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3082.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3082.asy)
C1 N001 0 .1
V1 IN 0 9
R1 N001 0 500K
C2 OUT 0 2.2
Rload OUT 0 25
XU1 MP_01 N001 OUT MP_02 IN LT3082 ;pnba )SET)OUT))IN
.tran .5 startup
.lib LT3082.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 32 -16 32
WIRE -16 48 -16 32
WIRE 224 48 224 32
WIRE -16 160 -16 128
WIRE 160 288 160 272
WIRE 160 288 80 288
WIRE 304 288 304 272
WIRE 432 288 304 288
WIRE 80 304 80 288
WIRE 160 304 160 288
WIRE 304 304 304 288
WIRE 432 304 432 288
WIRE 80 400 80 368
WIRE 160 400 160 384
WIRE 304 400 304 368
WIRE 432 400 432 384
SYMBOL res 144 288 R0
SYMATTR InstName R1
SYMATTR Value 500K
SYMBOL cap 64 304 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL PowerProducts\\LT3082 224 160 R0
SYMATTR InstName U1
SYMBOL res 416 288 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL voltage -16 32 R0
SYMATTR InstName V1
SYMATTR Value 9
SYMBOL cap 288 304 R0
SYMATTR InstName C2
SYMATTR Value 2.2
FLAG -16 160 0
FLAG 160 400 0
FLAG 80 400 0
FLAG 304 400 0
FLAG 432 400 0
FLAG -16 32 IN
FLAG 432 288 OUT
TEXT 560 352 Left 2 !.tran .5 startup
* Z:\tmp\asc_dec_bjh7r6w2\00eeff80479d_Projeto1_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
Idx Vp 0 1.9594519962321935e-07
M1 N001 N002 Vp 0 NMOS l=120n w=120n
VG N002 0 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1468 680
WIRE 944 64 448 64
WIRE 448 128 448 64
WIRE 480 176 448 176
WIRE 400 208 144 208
WIRE 448 240 448 224
WIRE 480 240 480 176
WIRE 544 240 480 240
WIRE 448 272 448 240
WIRE 144 304 144 208
WIRE 144 400 144 384
WIRE 448 400 448 352
WIRE 448 400 144 400
WIRE 544 400 544 240
WIRE 544 400 448 400
WIRE 448 416 448 400
SYMBOL current 448 272 R0
SYMATTR InstName Idx
SYMATTR Value 1.9594519962321935e-07
SYMBOL nmos4 400 128 R0
SYMATTR InstName M1
SYMATTR Value2 l=120n w=120n
SYMBOL voltage 144 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value 0
SYMATTR InstName VG
FLAG 448 416 0
FLAG 448 240 Vp
* Z:\home\khalils\Downloads\files\data\raw_asc\0fc3fe4d1e6b_Fig13_30.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 Vin 0 0 N_50n l=50n w=500n
VDD VDD 0 1
M2 VDD Vin N001 VDD P_50n l=50n w=500n
M3 Vout N001 0 0 N_50n l=50n w=5u
M4 VDD N001 Vout VDD P_50n l=50n w=500n
Cload Vout 0 50f
V1 Vin 0 PULSE(0 1 500p 1p 1p 1n 6n)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 2n 0 1p
.lib cmosedu_models.txt
* Plot Vout Vin
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3172 680
WIRE 192 -368 192 -384
WIRE 192 -352 192 -368
WIRE 192 -240 192 -272
WIRE 192 -160 192 -176
WIRE 192 -32 192 -80
WIRE 272 -176 192 -176
WIRE 368 -176 272 -176
WIRE 368 -176 368 -224
WIRE 368 -96 368 -176
WIRE 400 -224 368 -224
WIRE 400 -96 368 -96
WIRE 448 -304 448 -352
WIRE 448 -176 448 -208
WIRE 448 -32 448 -80
WIRE 624 -176 448 -176
WIRE 624 -176 624 -224
WIRE 624 -96 624 -176
WIRE 656 -224 624 -224
WIRE 656 -96 624 -96
WIRE 704 -304 704 -352
WIRE 704 -192 704 -208
WIRE 704 -176 704 -192
WIRE 704 -32 704 -80
WIRE 896 -192 704 -192
WIRE 960 -192 896 -192
WIRE 960 -48 960 -128
FLAG 448 -128 0
FLAG 192 -240 0
FLAG 192 -368 VDD
FLAG 448 -256 VDD
FLAG 448 -32 0
FLAG 448 -352 VDD
FLAG 704 -128 0
FLAG 704 -256 VDD
FLAG 704 -32 0
FLAG 704 -352 VDD
FLAG 960 -48 0
FLAG 192 -32 0
FLAG 896 -192 Vout
FLAG 272 -176 Vin
SYMBOL nmos4 400 -176 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 192 -368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL pmos4 400 -304 R0
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M2
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 656 -176 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M3
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=5u
SYMBOL pmos4 656 -304 R0
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M4
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=500n
SYMBOL cap 944 -192 R0
SYMATTR InstName Cload
SYMATTR Value 50f
SYMBOL voltage 192 -176 R0
WINDOW 3 -102 180 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 1 500p 1p 1p 1n 6n)
SYMATTR InstName V1
TEXT 88 48 Left 0 !.tran 0 2n 0 1p
TEXT 88 88 Left 0 !.lib cmosedu_models.txt
TEXT 264 -392 Left 0 ;Plot Vout Vin
* Z:\home\khalils\Downloads\files\data\raw_asc\1ed6ccec8ddc__Fig2_23_T_H_MSD.asc
* Generated by LTspice 26.0.1 for Windows.
* Run simulation\nMake waveforms active window\nGo to View -> FFT (note signals are displayed in RMS)\nPress OK then \ngo to Plot Settings -> Reload Plot Settings
A1 Vin 0 0 clock 0 0 Vout 0 SAMPLEHOLD REF=0.5
Vin Vin 0 SINE(0.5 0.5 3MEG)
Vclock clock 0 PULSE(0 1 0 0 0 4.9n 10n)
.tran 0 2000n 0 .1n uic
.model switmod SW
.options plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1344 696
WIRE 384 208 320 208
WIRE 736 208 384 208
WIRE 736 240 672 240
WIRE 992 256 912 256
WIRE 320 272 320 208
WIRE 736 304 608 304
WIRE 608 336 608 304
WIRE 320 416 320 352
WIRE 608 480 608 416
SYMBOL voltage 608 320 R0
WINDOW 0 36 42 Left 0
WINDOW 3 35 69 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vclock
SYMATTR Value PULSE(0 1 0 0 0 4.9n 10n)
SYMBOL SpecialFunctions\\sample 816 240 R0
WINDOW 3 -31 111 Left 0
SYMATTR InstName A1
SYMATTR Value REF=0.5
SYMBOL voltage 320 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value SINE(0.5 0.5 3MEG)
FLAG 320 416 0
FLAG 384 208 Vin
FLAG 608 480 0
FLAG 608 304 clock
FLAG 992 256 Vout
FLAG 672 240 0
TEXT 920 144 Left 0 !.tran 0 2000n 0 .1n uic
TEXT 920 176 Left 0 !.model switmod SW\n.options plotwinsize=0
TEXT 296 8 Left 0 ;Run simulation\nMake waveforms active window\nGo to View -> FFT (note signals are displayed in RMS)\nPress OK then \ngo to Plot Settings -> Reload Plot Settings
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4607.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4607.asy)
XU1 N009 OUT 0 N001 IN N002 N003 N003 0 N006 N004 N010 N005 N011 IN N007 N008 0 0 NC_01 LTM4607 ;pnba FB)Vout)SGND)SW2)Vin)SW1)Rsense)Sense+)Sense-)Pgood)INTVcc)PLLFLTR)STBYMD)SS)Run)Comp)PLLIN)FCB)PGND)EXTVcc
V1 IN 0 15
R1 N003 0 7m
R2 0 N009 4.12K
R3 N006 N004 100K
Rload OUT 0 8
L1 N001 N002 4.7
C2 N011 0 .002
C1 OUT 0 330
.tran 100m startup
.lib LTM4607.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 992 680
WIRE 208 -96 176 -96
WIRE 320 -96 288 -96
WIRE 176 -48 176 -96
WIRE 320 -48 320 -96
WIRE 32 16 -80 16
WIRE 64 16 32 16
WIRE 560 16 448 16
WIRE 656 16 560 16
WIRE -80 32 -80 16
WIRE 560 32 560 16
WIRE 656 32 656 16
WIRE 32 80 32 16
WIRE 64 80 32 80
WIRE 464 80 448 80
WIRE -80 128 -80 112
WIRE 560 128 560 96
WIRE 656 128 656 112
WIRE 480 144 448 144
WIRE 512 144 480 144
WIRE 512 160 512 144
WIRE 64 208 -48 208
WIRE 480 208 480 144
WIRE 480 208 448 208
WIRE -48 240 -48 208
WIRE 64 272 48 272
WIRE 512 272 512 240
WIRE 512 272 448 272
WIRE 512 288 512 272
WIRE -48 336 -48 320
WIRE 64 336 -48 336
WIRE 464 336 448 336
WIRE 64 400 48 400
WIRE 464 400 448 400
WIRE 560 400 544 400
WIRE 64 464 48 464
WIRE 496 464 448 464
WIRE 496 480 496 464
WIRE 176 544 176 528
WIRE 320 544 320 528
WIRE 496 560 496 544
SYMBOL ind 192 -80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMBOL PowerProducts\\LTM4607 256 240 R0
SYMATTR InstName U1
SYMBOL voltage -80 16 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 640 16 R0
SYMATTR InstName Rload
SYMATTR Value 8
SYMBOL res 496 144 R0
SYMATTR InstName R1
SYMATTR Value 7m
SYMBOL res 560 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.12K
SYMBOL res -64 336 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 544 32 R0
SYMATTR InstName C1
SYMATTR Value 330
SYMBOL cap 480 480 R0
SYMATTR InstName C2
SYMATTR Value .002
FLAG 464 80 0
FLAG 560 128 0
FLAG 656 128 0
FLAG 560 400 0
FLAG 512 288 0
FLAG 320 544 0
FLAG 176 544 0
FLAG -80 128 0
FLAG 496 560 0
FLAG -80 16 IN
FLAG 656 16 OUT
TEXT 584 480 Left 2 !.tran 100m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2960-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Automotive Supervisor (H-Grade)
* 12V
* 3.3V
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3008-3.3.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2960-3.asy)
R4 N003 0 1Meg
R1 IN N002 825K
C2 OUT 0 22
Vbat IN 0 PWL(0 0 20 28 40 0)
R3 OUT N003 6.04Meg
XU1 IN OUT OUT 0 IN LT3008-3.3 ;pnba IN)OUT)Sense)GND)_SHDN
XU2 OUT OUT _UV N001 0 N001 N003 N002 LTC2960-3 ;pnba Vin)DVCC)_RST)OUT)GND)_MR)ADJ)IN+
R2 N002 0 80.6K
.tran 40
.lib LT3009.lib
.lib LTC2960-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3200 984
WIRE -2016 -7168 -2032 -7168
WIRE -1664 -7168 -2016 -7168
WIRE -1616 -7168 -1664 -7168
WIRE -1600 -7168 -1616 -7168
WIRE -1280 -7168 -1312 -7168
WIRE -1072 -7168 -1280 -7168
WIRE -944 -7168 -1072 -7168
WIRE -816 -7168 -944 -7168
WIRE -672 -7168 -816 -7168
WIRE -2032 -7152 -2032 -7168
WIRE -672 -7152 -672 -7168
WIRE -928 -7120 -1200 -7120
WIRE -1072 -7104 -1072 -7168
WIRE -1616 -7072 -1616 -7168
WIRE -1600 -7072 -1616 -7072
WIRE -1280 -7072 -1280 -7168
WIRE -1280 -7072 -1312 -7072
WIRE -672 -7072 -672 -7088
WIRE -2032 -7056 -2032 -7072
WIRE -1200 -7056 -1200 -7120
WIRE -1184 -7056 -1200 -7056
WIRE -944 -7056 -944 -7168
WIRE -944 -7056 -960 -7056
WIRE -1664 -7040 -1664 -7168
WIRE -1456 -6976 -1456 -7008
WIRE -1664 -6944 -1664 -6960
WIRE -1184 -6944 -1664 -6944
WIRE -928 -6944 -928 -7120
WIRE -928 -6944 -960 -6944
WIRE -1664 -6928 -1664 -6944
WIRE -1664 -6832 -1664 -6848
WIRE -1184 -6832 -1216 -6832
WIRE -912 -6832 -960 -6832
WIRE -816 -6832 -816 -7168
WIRE -1072 -6768 -1072 -6784
WIRE -1216 -6736 -1216 -6832
WIRE -816 -6736 -816 -6752
WIRE -816 -6736 -1216 -6736
WIRE -816 -6720 -816 -6736
WIRE -816 -6624 -816 -6640
SYMBOL res -1680 -6944 R0
SYMATTR InstName R2
SYMATTR Value 80.6K
SYMBOL voltage -2032 -7168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vbat
SYMATTR Value PWL(0 0 20 28 40 0)
SYMBOL cap -688 -7152 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL res -832 -6848 R0
SYMATTR InstName R3
SYMATTR Value 6.04Meg
SYMBOL LTC2960-3 -1072 -6944 R0
SYMATTR InstName U2
SYMBOL res -832 -6736 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL res -1680 -7056 R0
SYMATTR InstName R1
SYMATTR Value 825K
SYMBOL PowerProducts\\LT3008-3.3 -1456 -7120 R0
SYMATTR InstName U1
FLAG -1664 -6832 0
FLAG -816 -6624 0
FLAG -672 -7168 OUT
FLAG -2032 -7056 0
FLAG -1072 -6768 0
FLAG -912 -6832 _UV
FLAG -1456 -6976 0
FLAG -672 -7072 0
FLAG -2016 -7168 IN
TEXT -1368 -7248 Bottom 2 ;Automotive Supervisor (H-Grade)
TEXT -2024 -7208 Bottom 2 ;12V
TEXT -896 -7168 Bottom 2 ;3.3V
TEXT -688 -6656 Left 2 !.tran 40