Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6655-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Turn on and off 5mA of sink current\nand then on and off 5mA of source current
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LTC6655-3.3.asy)
V2 N002 0 PULSE(0 1 600u 10n 10n 200u 10m)
V1 IN 0 3.8
S2 OUT IN N001 0 5mA
XU1 IN IN 0 OUT OUT LTC6655-3.3 ;pnba _SHDN)IN)GND)OUT_S)OUT_F
C1 OUT 0 3.3
V3 N001 0 PULSE(0 1 100u 10n 10n 200u 10m)
S1 0 OUT N002 0 5mA
.tran 1m
.model 5mA SW(Ron=10 Roff=1G Vt=.5 Vh=-.2 Ilimit=5m level=2)
.lib LTC6655-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4212 1120
WIRE 2288 256 1680 256
WIRE 2288 272 2288 256
WIRE 2592 288 2336 288
WIRE 2704 288 2672 288
WIRE 2352 336 2336 336
WIRE 1776 352 1728 352
WIRE 2096 352 2064 352
WIRE 1680 384 1680 256
WIRE 1680 384 1600 384
WIRE 1728 384 1728 352
WIRE 1728 384 1680 384
WIRE 2096 384 2096 352
WIRE 2176 384 2096 384
WIRE 2288 384 2288 352
WIRE 2288 384 2176 384
WIRE 2384 384 2288 384
WIRE 1600 400 1600 384
WIRE 2176 400 2176 384
WIRE 2288 400 2288 384
WIRE 1728 416 1728 384
WIRE 1776 416 1728 416
WIRE 2096 416 2096 384
WIRE 2096 416 2064 416
WIRE 2592 416 2336 416
WIRE 2704 416 2672 416
WIRE 2352 464 2336 464
WIRE 1920 480 1920 448
WIRE 2176 480 2176 464
WIRE 1600 496 1600 480
WIRE 2288 496 2288 480
SYMBOL voltage 2576 416 M90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 600u 10n 10n 200u 10m)
SYMBOL voltage 1600 384 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3.8
SYMBOL LTC6655-3.3 1920 384 R0
SYMATTR InstName U1
SYMBOL sw 2288 368 R180
WINDOW 0 -11 104 Right 2
WINDOW 3 -11 10 Right 2
SYMATTR InstName S2
SYMATTR Value 5mA
SYMBOL voltage 2576 288 M90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 1 100u 10n 10n 200u 10m)
SYMATTR InstName V3
SYMBOL cap 2160 400 R0
SYMATTR InstName C1
SYMATTR Value 3.3
SYMBOL sw 2288 496 R180
WINDOW 0 -7 103 Right 2
WINDOW 3 -10 16 Right 2
SYMATTR InstName S1
SYMATTR Value 5mA
FLAG 1920 480 0
FLAG 2384 384 OUT
FLAG 1600 384 IN
FLAG 1600 496 0
FLAG 2176 480 0
FLAG 2288 496 0
FLAG 2352 464 0
FLAG 2704 416 0
FLAG 2352 336 0
FLAG 2704 288 0
TEXT 2040 592 Left 2 !.tran 1m\n.model 5mA SW(Ron=10 Roff=1G Vt=.5 Vh=-.2 Ilimit=5m level=2)
TEXT 1984 240 Bottom 2 ;Turn on and off 5mA of sink current\nand then on and off 5mA of source current
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1965.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1965.asy)
R1 OUT N001 5.11K
XU1 IN IN 0 OUT N001 LT1965 ;pnba _SHDN)IN)GND)OUT)ADJ
V1 IN 0 PWL(0 0 1 5)
R2 N001 0 4.75K
C1 OUT 0 10
Rload OUT 0 2.5
.tran 1 startup
.lib LT1965.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 128 -144 128
WIRE 64 128 48 128
WIRE 400 128 352 128
WIRE 544 128 400 128
WIRE 656 128 544 128
WIRE -144 144 -144 128
WIRE 400 144 400 128
WIRE 544 144 544 128
WIRE 656 144 656 128
WIRE -144 240 -144 224
WIRE 48 240 48 128
WIRE 64 240 48 240
WIRE 400 240 400 224
WIRE 400 240 352 240
WIRE 544 240 544 208
WIRE 656 240 656 224
WIRE 400 256 400 240
WIRE 208 320 208 304
WIRE 400 352 400 336
SYMBOL res 384 240 R0
SYMATTR InstName R2
SYMATTR Value 4.75K
SYMBOL cap 528 144 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage -144 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 5)
SYMBOL res 640 128 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL PowerProducts\\LT1965 208 192 R0
SYMATTR InstName U1
SYMBOL res 384 128 R0
SYMATTR InstName R1
SYMATTR Value 5.11K
FLAG 208 320 0
FLAG 400 352 0
FLAG -144 240 0
FLAG 544 240 0
FLAG 656 240 0
FLAG -144 128 IN
FLAG 656 128 OUT
TEXT 504 336 Left 2 !.tran 1 startup
* Z:\tmp\asc_dec_bjh7r6w2\06fc9646b120_01-j111_voltage_controlled_resistor_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
J1 out N002 0 J111
VC N001 0 {VC}
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -208 48 -240 48
WIRE -32 48 -208 48
WIRE 144 48 48 48
WIRE 256 48 144 48
WIRE 272 48 256 48
WIRE 256 96 256 48
WIRE 144 128 144 48
WIRE -240 144 -240 48
WIRE -16 192 -64 192
WIRE 96 192 64 192
WIRE 256 208 256 176
WIRE -64 240 -64 192
WIRE -240 256 -240 224
WIRE 144 256 144 224
WIRE 256 336 256 288
WIRE -64 352 -64 320
SYMBOL njf 96 128 R0
SYMATTR InstName J1
SYMATTR Value J111
SYMBOL voltage -64 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VC
SYMATTR Value {VC}
FLAG -64 352 0
FLAG 144 256 0
FLAG -240 256 0
FLAG -208 48 in
FLAG 272 48 out
* Z:\home\khalils\Downloads\files\data\raw_asc\6d53312ee55e_VCO.asc
* Generated by LTspice 26.0.1 for Windows.
C1 a 0 1
R1 b 0 1k
V2 N001 0 1
B2 a 0 I=IF(V(b),V(freq),0)
B1 N001 a I=IF(V(b),0,V(freq))
A1 b 0 0 0 0 0 clk 0 BUF
.machine
.state LO 0
.state HI 1
.rule LO HI V(a)>0.75
.rule HI LO V(a)<0.25
.output (b) state
.endmachine
.ic V(a)=0.25
* Voltage Controlled Oscillator
* frequency(Hz)
* clock
* duty 50%
* 2025-02-15
* <Revision History>\n2024-12-29: Initial version\n2025-02-15: Removed 1Mohm pull down resistor at freq pin to avoid large sink current.
* removed
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1132 680
WIRE 176 -176 80 -176
WIRE 80 -144 80 -176
WIRE 176 -112 176 -176
WIRE 80 -32 80 -64
WIRE -64 48 -112 48
WIRE 176 48 176 -32
WIRE 320 48 176 48
WIRE 400 48 320 48
WIRE 560 48 560 32
WIRE 704 48 560 48
WIRE 816 48 768 48
WIRE -64 64 -64 48
WIRE 320 64 320 48
WIRE 560 64 560 48
WIRE 704 80 704 64
WIRE 176 112 176 48
WIRE 320 144 320 128
WIRE -64 176 -64 144
WIRE 560 176 560 144
WIRE 176 224 176 192
FLAG 320 144 0
FLAG 560 176 0
FLAG 176 224 0
FLAG 80 -32 0
FLAG 400 48 a
FLAG 560 32 b
FLAG 704 80 0
FLAG 816 48 clk
IOPIN 816 48 Out
FLAG -112 48 freq
IOPIN -112 48 In
FLAG -64 176 0
SYMBOL cap 304 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 544 48 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 80 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL bi 176 112 R0
SYMATTR InstName B2
SYMATTR Value I=IF(V(b),V(freq),0)
SYMBOL bi 176 -112 R0
SYMATTR InstName B1
SYMATTR Value I=IF(V(b),0,V(freq))
SYMBOL Digital\\buf1 704 -16 R0
SYMATTR InstName A1
TEXT 544 -176 Left 2 !.machine\n.state LO 0\n.state HI 1\n.rule LO HI V(a)>0.75\n.rule HI LO V(a)<0.25\n.output (b) state\n.endmachine
TEXT 200 24 Left 2 !.ic V(a)=0.25
TEXT -208 -264 Left 4 ;Voltage Controlled Oscillator
TEXT -176 16 Left 2 ;frequency(Hz)
TEXT 808 16 Left 2 ;clock
TEXT 800 80 Left 2 ;duty 50%
TEXT 592 -240 Left 2 ;2025-02-15
TEXT -168 264 Left 2 ;<Revision History>\n2024-12-29: Initial version\n2025-02-15: Removed 1Mohm pull down resistor at freq pin to avoid large sink current.
TEXT -96 112 Left 2 ;removed
* Z:\home\khalils\Downloads\files\data\raw_asc\5f0c01582587_Fig9_31_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1)
M1 0 N001 N002 0 P_50n l=100n w=5u
VSG 0 N001 350m
VSD 0 N002 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSD 0 1 1m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 688
WIRE 320 96 320 80
WIRE 320 192 320 176
WIRE 400 192 320 192
WIRE 448 80 320 80
WIRE 448 112 448 80
WIRE 448 304 448 208
WIRE 672 80 448 80
WIRE 672 160 448 160
WIRE 672 160 672 80
WIRE 672 192 672 160
WIRE 672 304 448 304
WIRE 672 304 672 272
WIRE 848 80 672 80
WIRE 848 112 848 80
SYMBOL pmos4 400 112 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=100n w=5u
SYMATTR InstName M1
SYMATTR Value P_50n
SYMBOL voltage 320 80 R0
WINDOW 0 -93 54 Left 0
WINDOW 3 -93 82 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VSG
SYMATTR Value 350m
SYMBOL voltage 672 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 38 54 Left 0
WINDOW 3 38 82 Left 0
SYMATTR InstName VSD
SYMATTR Value 0
FLAG 848 112 0
TEXT 384 336 Left 0 !.dc VSD 0 1 1m
TEXT 384 360 Left 0 !.lib cmosedu_models.txt
TEXT 432 56 Left 0 ;Plot Id(M1)
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8691.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 2.5
Vin IN 0 SINE(0 1 100K)
R1 N001 0 1K
R2 OUT N001 1K
XU1 IN N001 +V -V OUT AD8691 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -2.5
Rload OUT 0 2K
.tran 100u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8691.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
FLAG 144 -1168 +V
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 256 -1056 0
FLAG 144 -1056 0
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100K)
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL Opamps\\AD8691 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 2K
TEXT 720 -936 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6409.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6409.asy)
V1 N004 0 5
V3 N003 0 PULSE(-.1 .1 .5n .01n .01n 6n 12n)
C3 N007 N006 1.3p
C2 N002 N001 1.3p
XU1 N007 N006 N008 N004 N005 N001 N002 0 LTC6409 ;pnba OUT-)IN+)SHDN)V+)VOCM)IN-)OUT+)V-
R2 N001 N003 150
R1 N002 N001 150
R3 N007 N006 150
C1 N005 0 .1
R4 N006 0 150
.tran 30n
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 992 680
WIRE 48 32 16 32
WIRE 240 32 112 32
WIRE -496 96 -512 96
WIRE -80 96 -416 96
WIRE 16 96 16 32
WIRE 16 96 0 96
WIRE 112 96 16 96
WIRE 240 96 240 32
WIRE 240 96 192 96
WIRE 80 144 -224 144
WIRE -224 160 -224 144
WIRE 80 160 80 144
WIRE 16 208 16 96
WIRE 48 208 16 208
WIRE 240 208 240 96
WIRE 240 208 208 208
WIRE -48 240 -64 240
WIRE 48 240 16 240
WIRE -224 256 -224 240
WIRE 48 272 16 272
WIRE 240 272 208 272
WIRE 80 336 80 320
WIRE 112 336 112 320
WIRE -80 384 -96 384
WIRE 16 384 16 272
WIRE 16 384 0 384
WIRE 112 384 16 384
WIRE 240 384 240 272
WIRE 240 384 192 384
WIRE 16 448 16 384
WIRE 48 448 16 448
WIRE 240 448 240 384
WIRE 240 448 112 448
SYMBOL voltage -400 96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V3
SYMATTR Value PULSE(-.1 .1 .5n .01n .01n 6n 12n)
SYMBOL res 208 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 150
SYMBOL opamps\\LTC6409 112 240 R0
SYMATTR InstName U1
SYMBOL res 16 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 150
SYMBOL res 16 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 150
SYMBOL voltage -224 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 112 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1.3p
SYMBOL res 208 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 150
SYMBOL cap 112 432 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1.3p
SYMBOL cap 16 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
FLAG -512 96 0
FLAG -224 256 0
FLAG -96 384 0
FLAG -64 240 0
FLAG 80 336 0
TEXT 288 472 Left 2 !.tran 30n
* Z:\home\khalils\Downloads\files\data\raw_asc\OP213.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
Vin IN 0 SINE(0 1 10K)
R1 N001 0 10K
R2 OUT N001 10K
XU1 IN N001 +V -V OUT OP213 ;pnba In+)In-)V+)V-)OUT
V2 -V 0 -15
Rload OUT 0 10K
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP213.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 416 -1232 400 -1232
WIRE 512 -1232 496 -1232
WIRE 544 -1232 512 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1136 144 -1152
WIRE 272 -1136 272 -1152
WIRE 512 -1120 512 -1232
WIRE 544 -1120 512 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 736 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 736 -1088 736 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1040 144 -1056
WIRE 272 -1040 272 -1056
WIRE 736 -992 736 -1008
WIRE 432 -976 432 -992
FLAG 144 -1152 +V
FLAG 432 -976 0
FLAG 736 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 272 -1152 -V
FLAG 576 -1072 -V
FLAG 400 -1232 0
FLAG 736 -992 0
FLAG 272 -1040 0
FLAG 144 -1040 0
SYMBOL voltage 144 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 512 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL Opamps\\OP213 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 272 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 720 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
TEXT 704 -944 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\1c9acfbd14a5_4440.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4440.asy)
XU1 N001 0 N002 0 N003 N001 LTC4440 ;pnba VCC)GND)INP)TS)TG)BOOST
V1 N001 0 8
V2 N002 0 PULSE(0 8 0 1n 1n 1u 2u)
.tran 50u
.lib LTC4440.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2336 1256
WIRE 1424 -144 1104 -144
WIRE 1008 -80 992 -80
WIRE 1104 -80 1104 -144
WIRE 1104 -80 1088 -80
WIRE 1136 -80 1104 -80
WIRE 1424 -80 1424 -144
WIRE 1424 -80 1392 -80
WIRE 1136 0 736 0
WIRE 1424 0 1392 0
WIRE 736 16 736 0
WIRE 1136 80 1104 80
WIRE 1424 80 1392 80
WIRE 736 112 736 96
SYMBOL voltage 736 0 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 8 0 1n 1n 1u 2u)
SYMBOL voltage 1104 -80 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value 8
SYMBOL PowerProducts\\LTC4440 1264 0 R0
SYMATTR InstName U1
FLAG 1104 80 0
FLAG 992 -80 0
FLAG 1424 80 0
FLAG 736 112 0
TEXT 1304 176 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3303C-05.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3303C-05.asy)
C3 OUT N004 10p
Rload OUT 0 0.45
R4 OUT N002 500K
XU2 IN N001 N003 N004 0 0 N001 N002 N001 LTC3303C-05 ;pnba VIN)EN)SW)FB)AGND)PGND)AVIN)PGOOD)MODE/SYNC
R3 IN N001 10
R1 OUT N004 47.5K
C2 N001 0 1
L1 N003 OUT 150n Rser=2m
C1 OUT 0 10 m=3 Rser=10m
R2 N004 0 18.2K
V1 IN 0 5
.tran 1.5m startup
.lib LTC3303C-05.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2652 1736
WIRE 1392 1248 1360 1248
WIRE 1488 1248 1392 1248
WIRE 1712 1248 1488 1248
WIRE 1360 1264 1360 1248
WIRE 1488 1264 1488 1248
WIRE 1712 1296 1712 1248
WIRE 1360 1360 1360 1344
WIRE 1488 1360 1488 1344
WIRE 1488 1360 1424 1360
WIRE 1552 1360 1488 1360
WIRE 1904 1360 1872 1360
WIRE 2016 1360 1984 1360
WIRE 1424 1376 1424 1360
WIRE 1424 1456 1424 1440
WIRE 1488 1472 1488 1360
WIRE 1552 1472 1488 1472
WIRE 1904 1472 1872 1472
WIRE 2016 1472 2016 1360
WIRE 2016 1472 1984 1472
WIRE 2128 1472 2016 1472
WIRE 2224 1472 2128 1472
WIRE 2272 1472 2224 1472
WIRE 2320 1472 2272 1472
WIRE 2016 1488 2016 1472
WIRE 2128 1488 2128 1472
WIRE 2224 1488 2224 1472
WIRE 2320 1488 2320 1472
WIRE 1488 1584 1488 1472
WIRE 1552 1584 1488 1584
WIRE 2016 1584 2016 1568
WIRE 2016 1584 1872 1584
WIRE 2128 1584 2128 1552
WIRE 2128 1584 2016 1584
WIRE 2224 1584 2224 1552
WIRE 2320 1584 2320 1568
WIRE 2016 1600 2016 1584
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
WIRE 2016 1696 2016 1680
SYMBOL res 2000 1584 R0
SYMATTR InstName R2
SYMATTR Value 18.2K
SYMBOL LTC3303C-05 1712 1456 R0
SYMATTR InstName U2
SYMBOL res 1472 1248 R0
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL cap 2208 1488 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 m=3
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=10m
SYMBOL cap 1408 1376 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 2304 1472 R0
SYMATTR InstName Rload
SYMATTR Value 0.45
SYMBOL RES 2000 1472 R0
SYMATTR InstName R1
SYMATTR Value 47.5K
SYMBOL ind 1888 1488 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150n
SYMATTR SpiceLine Rser=2m
SYMBOL VOLTAGE 1360 1248 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2112 1488 R0
SYMATTR InstName C3
SYMATTR Value 10p
SYMBOL res 2000 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 500K
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1360 1360 0
FLAG 2320 1584 0
FLAG 2016 1696 0
FLAG 2224 1584 0
FLAG 1392 1248 IN
FLAG 2272 1472 OUT
FLAG 1424 1456 0
TEXT 2200 1696 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\67db4bebc8fd_ttl_two_in_nand_ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
* TTL Two Input NAND Gate
Q5 N005 N003 W1 0 2N3904
R2 Vp N002 2.2k
R4 Vp N001 100
D1 N004 2+ 1N914
V3 W2 0 PWL REPEAT FOREVER (0 3 2.5m 0 5m -3 7.5m 0 10m 3) ENDREPEAT
V2 W1 0 PWL REPEAT FOREVER (0 0 2.5m 3 5m 0 7.5m -3 10m 0) ENDREPEAT
Q3 2+ N006 0 0 2N3904
Q1 N005 N003 W2 0 2N3904
V1 Vp 0 5
Q2 N002 N005 N006 0 2N3904
R3 N006 0 470
Q4 N001 N002 N004 0 2N3904
R1 Vp N003 100k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 50m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 -224 80 -224
WIRE 352 -224 144 -224
WIRE 592 -224 352 -224
WIRE -432 -192 -432 -224
WIRE -320 -192 -320 -224
WIRE -208 -192 -208 -224
WIRE 592 -192 592 -224
WIRE 144 -160 144 -224
WIRE 352 -160 352 -224
WIRE -432 -80 -432 -112
WIRE -320 -80 -320 -112
WIRE -208 -80 -208 -112
WIRE 592 -80 592 -112
WIRE 352 -32 352 -80
WIRE 528 -32 352 -32
WIRE 144 32 144 -80
WIRE 352 48 352 -32
WIRE 592 48 592 16
WIRE 16 96 16 80
WIRE 16 96 0 96
WIRE 96 96 16 96
WIRE 256 96 192 96
WIRE 288 96 256 96
WIRE 592 144 592 112
WIRE 656 144 592 144
WIRE 144 160 144 32
WIRE 592 176 592 144
WIRE 96 224 0 224
WIRE 256 224 256 96
WIRE 256 224 192 224
WIRE 352 224 352 144
WIRE 528 224 352 224
WIRE 352 272 352 224
WIRE 352 400 352 352
WIRE 592 400 592 272
WIRE 592 400 352 400
WIRE 352 464 352 400
IOPIN 80 -224 In
IOPIN 0 96 In
IOPIN 0 224 In
IOPIN 16 80 In
IOPIN 656 144 In
IOPIN -432 -224 In
IOPIN -320 -224 In
IOPIN -208 -224 In
SYMBOL res 576 -208 R0
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL voltage -320 -208 R0
WINDOW 3 -399 199 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL REPEAT FOREVER (0 0 2.5m 3 5m 0 7.5m -3 10m 0) ENDREPEAT
SYMBOL voltage -432 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL npn 528 176 R0
SYMATTR InstName Q3
SYMATTR Value 2N3904
SYMBOL npn 288 48 R0
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL res 128 -176 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL npn 528 -80 R0
SYMATTR InstName Q4
SYMATTR Value 2N3904
SYMBOL npn 192 160 R90
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 336 256 R0
SYMATTR InstName R3
SYMATTR Value 470
SYMBOL npn 192 32 R90
WINDOW 3 37 64 Left 2
SYMATTR InstName Q5
SYMATTR Value 2N3904
SYMBOL res 336 -176 R0
SYMATTR InstName R2
SYMATTR Value 2.2k
SYMBOL voltage -208 -208 R0
WINDOW 3 -469 161 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PWL REPEAT FOREVER (0 3 2.5m 0 5m -3 7.5m 0 10m 3) ENDREPEAT
SYMBOL diode 576 48 R0
SYMATTR InstName D1
SYMATTR Value 1N914
FLAG 352 464 0
FLAG 80 -224 Vp
FLAG 0 96 W1
FLAG 0 224 W2
FLAG 16 80 1+
FLAG 656 144 2+
FLAG -432 -80 0
FLAG -320 -80 0
FLAG -208 -80 0
FLAG -432 -224 Vp
FLAG -320 -224 W1
FLAG -208 -224 W2
TEXT -268 432 Left 2 !.tran 50m
TEXT 32 -352 Left 2 ;TTL Two Input NAND Gate
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7102-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7102-1.5.asy)
C1 OUT 0 2.2 Rser=1.5m
Rload OUT 0 10
XU1 IN OUT IN N001 OUT 0 ADP7102 Vref=1.5 ;pnba Vin)Sense)EN)PG)Vout)GND
V1 IN 0 3.3
R1 OUT N001 100k
.tran 3m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -16 48 -16 32
WIRE 368 128 352 128
WIRE 464 128 464 32
WIRE 464 128 368 128
WIRE 560 128 464 128
WIRE -16 144 -16 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 368 224 368 128
WIRE 368 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL voltage -16 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL ADP7102-1.5 224 128 R0
SYMATTR InstName U1
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
FLAG 224 304 0
FLAG -16 144 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -16 32 IN
FLAG 560 128 OUT
TEXT 432 288 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\180cfac0f3b6_Fig_4-29_STEP-regend.asc
* Generated by LTspice 26.0.1 for Windows.
C1 OUT 0 {C}
R1 N001 OUT {R}
V1 N001 0 PULSE( 0 1 0.5m 1n 1n 2m 5m)
.tran 10m
.STEP param R 4k 6k 1k
.STEP param C list 22n 33n 47n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 80 32 80
WIRE 272 80 224 80
WIRE 304 80 272 80
WIRE 32 112 32 80
WIRE 304 112 304 80
WIRE 32 224 32 192
WIRE 304 224 304 176
SYMBOL res 128 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value {R}
SYMBOL voltage 32 96 R0
WINDOW 3 -4 160 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE( 0 1 0.5m 1n 1n 2m 5m)
SYMBOL cap 288 112 R0
SYMATTR InstName C1
SYMATTR Value {C}
FLAG 32 224 0
FLAG 272 80 OUT
FLAG 304 224 0
TEXT 16 32 Left 2 !.tran 10m
TEXT 24 288 Left 2 !.STEP param R 4k 6k 1k\n.STEP param C list 22n 33n 47n