Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\550f0fcf52df_J310_Input_Charasteristic_Curve.asc
* Generated by LTspice 26.0.1 for Windows.
* .op
R2 Vs 0 50
V1 N001 0 12
R1 N001 Vd .0001
R3 Vg N002 .0001
Vg N002 0 0
J1 Vd Vg Vs J310
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.dc Vg -4.0 1 .01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 944 680
WIRE 432 48 256 48
WIRE 256 64 256 48
WIRE 256 160 256 144
WIRE 304 160 256 160
WIRE 432 160 432 48
WIRE 0 224 -176 224
WIRE 160 224 80 224
WIRE 208 224 160 224
WIRE -176 256 -176 224
WIRE 256 272 256 256
WIRE 304 272 256 272
WIRE 432 272 432 240
WIRE 256 288 256 272
WIRE -176 352 -176 336
WIRE 256 400 256 368
SYMBOL njf 208 160 R0
SYMATTR InstName J1
SYMATTR Value J310
SYMBOL res 240 48 R0
SYMATTR InstName R1
SYMATTR Value .0001
SYMBOL res 240 272 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL res 96 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value .0001
SYMBOL voltage -176 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vg
SYMATTR Value 0
SYMBOL voltage 432 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 432 272 0
FLAG 304 272 Vs
FLAG 304 160 Vd
FLAG -176 352 0
FLAG 256 400 0
FLAG 160 224 Vg
TEXT 632 248 Left 2 !.dc Vg -4.0  1 .01
TEXT 648 288 Left 2 ;.op
* Z:\home\khalils\Downloads\files\data\raw_asc\112b125786ee_Controlled_Cap_non_phys.asc
* Generated by LTspice 26.0.1 for Windows.
* Non Charge-preserving (non physical) Voltage Controlled Capacitors
* C=Cref*V(ctrl)
* C=Lref*V(ctrl)
* (usable e.g. for simulation of a depot of shares. C=price/share charge=$$)
Cref c1 P001 1
Lref x1 0 1 Rser=0
G1 0 x1 c2 0 1
Vctrl ctrl 0 PULSE(1 2 1 10n 10n)
Vs P001 0 0
Rdummy c2 0 1G
Bc1 c1 0 I=V(ctrl)*I(Vs)-I(Vs)
I2 0 c2 PULSE(0 1 10n 10n 10n 999)
I1 0 c1 PULSE(0 1 10n 10n 10n 999)
Bc2 c2 0 I=V(x1)*V(ctrl)
.tran 2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 -176 -128 -176
WIRE 432 -176 -32 -176
WIRE 560 -176 432 -176
WIRE -32 -144 -32 -176
WIRE 432 -96 432 -176
WIRE -32 -32 -32 -64
WIRE -368 0 -432 0
WIRE -432 32 -432 0
WIRE -160 96 -256 96
WIRE 96 96 -160 96
WIRE 432 96 96 96
WIRE 560 96 432 96
WIRE -32 144 -112 144
WIRE -256 176 -256 96
WIRE -112 176 -112 144
WIRE -32 176 -32 144
WIRE 96 176 96 96
WIRE 432 176 432 96
WIRE -160 192 -160 96
RECTANGLE Normal 208 0 -208 -192
RECTANGLE Normal 224 320 -288 48
SYMBOL ind -48 160 R0
WINDOW 39 39 95 Left 0
WINDOW 3 41 66 Left 0
SYMATTR SpiceLine Rser=0
SYMATTR InstName Lref
SYMATTR Value 1
SYMBOL voltage -432 16 R0
WINDOW 0 29 36 Left 0
WINDOW 3 -99 135 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vctrl
SYMATTR Value PULSE(1 2 1 10n 10n)
SYMBOL current 432 256 R180
WINDOW 0 24 88 Left 0
WINDOW 3 -141 -37 Left 0
SYMATTR InstName I2
SYMATTR Value PULSE(0 1 10n 10n 10n 999)
SYMBOL bi 96 176 R0
WINDOW 3 -58 125 Left 0
SYMATTR InstName Bc2
SYMATTR Value I=V(x1)*V(ctrl)
SYMBOL voltage -128 -128 R0
WINDOW 0 -52 17 Left 0
WINDOW 3 -53 52 Left 0
SYMATTR InstName Vs
SYMATTR Value 0
SYMBOL res -272 160 R0
WINDOW 0 -8 131 Left 0
SYMATTR InstName Rdummy
SYMATTR Value 1G
SYMBOL g -112 160 R0
SYMATTR InstName G1
SYMATTR Value 1
SYMBOL current 432 -16 R180
WINDOW 0 24 88 Left 0
WINDOW 3 -135 -37 Left 0
SYMATTR InstName I1
SYMATTR Value PULSE(0 1 10n 10n 10n 999)
SYMBOL bi -32 -144 R0
WINDOW 3 13 86 Left 0
SYMATTR Value I=V(ctrl)*I(Vs)-I(Vs)
SYMATTR InstName Bc1
SYMBOL cap -144 -176 R0
WINDOW 3 23 53 Left 0
WINDOW 0 35 20 Left 0
SYMATTR Value 1
SYMATTR InstName Cref
FLAG -112 256 0
FLAG -32 256 0
FLAG 96 256 0
FLAG -160 240 0
FLAG -32 144 x1
FLAG 560 96 c2
FLAG -432 112 0
FLAG -368 0 ctrl
FLAG 432 256 0
FLAG -256 256 0
FLAG -32 -32 0
FLAG -128 -32 0
FLAG 560 -176 c1
FLAG 432 -16 0
TEXT -412 -264 Left 0 !.tran 2
TEXT -248 -272 Left 0 ;Non Charge-preserving (non physical) Voltage Controlled Capacitors
TEXT 32 -112 Left 0 ;C=Cref*V(ctrl)
TEXT -96 72 Left 0 ;C=Lref*V(ctrl)
TEXT -256 -232 Left 0 ;(usable e.g. for simulation of a depot of shares. C=price/share charge=$$)
* Z:\tmp\asc_dec_bjh7r6w2\0d5184c3008c_1116_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N003 0 1K
CY1 N002 N003 .32p Rser=45 Lser=.78m Cpar=18p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -240 80 -256 80
WIRE -160 80 -176 80
WIRE -112 80 -160 80
WIRE -304 160 -304 144
WIRE -432 192 -432 176
WIRE -96 192 -96 160
WIRE -160 224 -160 80
WIRE -128 224 -160 224
WIRE 32 224 32 80
WIRE 32 224 -48 224
WIRE -304 256 -304 240
WIRE -192 256 -304 256
WIRE -128 256 -192 256
WIRE 64 256 -48 256
WIRE -304 272 -304 256
WIRE -432 288 -432 272
WIRE -112 304 -112 288
WIRE -96 304 -96 288
WIRE -96 304 -112 304
WIRE -80 304 -80 288
WIRE -80 304 -96 304
WIRE -96 320 -96 304
WIRE -192 352 -192 256
WIRE -64 352 -192 352
WIRE 32 352 32 224
WIRE 32 352 0 352
WIRE -304 368 -304 352
SYMBOL res -320 256 R0
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL misc\\xtal 0 336 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 Invisible 2
SYMATTR InstName Y1
SYMATTR Value .32p
SYMATTR SpiceLine Rser=45 Lser=.78m Cpar=18p
FLAG -432 288 0
FLAG -432 176 +V
FLAG -96 160 +V
FLAG -96 320 0
FLAG -256 80 0
FLAG -304 368 0
FLAG -304 144 +V
FLAG 64 256 OUT
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX20336.asc
* Generated by LTspice 26.0.1 for Windows.
V1 vNO 0 SINE(0 5.5 20)
R1 vCOM 0 49.9
V2 vVccEN 0 PULSE(0 2.5 20n 20n 20n 150m 300m)
XU1 vVccEN vCOM vNO 0 MAX20336 ;pnba VccEN)COM)NO)GND
.tran 1
* Note:\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\MAX20336.asy)
.lib MAX20336.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 832
WIRE -112 224 -144 224
WIRE 80 224 -32 224
WIRE 112 224 80 224
WIRE 384 224 336 224
WIRE 464 224 384 224
WIRE 464 256 464 224
WIRE 64 288 16 288
WIRE 112 288 64 288
WIRE 16 336 16 288
WIRE 464 352 464 336
WIRE 224 416 224 400
WIRE 16 464 16 416
FLAG -144 224 0
FLAG 16 464 0
FLAG 464 352 0
FLAG 224 416 0
FLAG 384 224 vCOM
FLAG 80 224 vNO
FLAG 64 288 vVccEN
SYMBOL voltage -16 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5.5 20)
SYMBOL res 448 240 R0
SYMATTR InstName R1
SYMATTR Value 49.9
SYMBOL voltage 16 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 30 177 Left 2
SYMATTR Value PULSE(0 2.5 20n 20n 20n 150m 300m)
SYMATTR InstName V2
SYMBOL MAX20336 224 272 R0
SYMATTR InstName U1
TEXT -288 72 Left 2 !.tran 1
TEXT -288 8 Left 2 ;Note:\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\30ce0d8233aa_1478.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1478.asy)
Iload OUT 0 0
XU1 OUT IN IN N001 0 IN IN LTC1477 ;pnba VOUT)Vin1)Vins)EN)GND)Vin3)Vin2
V1 IN 0 5
V2 N001 0 5
.dc Iload 0 1.5 10m
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4400 2940
WIRE 2976 992 2864 992
WIRE 3152 992 2976 992
WIRE 2864 1008 2864 992
WIRE 3152 1008 3152 992
WIRE 2976 1040 2976 992
WIRE 3008 1040 2976 1040
WIRE 2864 1104 2864 1088
WIRE 2976 1104 2976 1040
WIRE 3008 1104 2976 1104
WIRE 3376 1136 3296 1136
WIRE 3376 1152 3376 1136
WIRE 2976 1168 2976 1104
WIRE 3008 1168 2976 1168
WIRE 3008 1232 2912 1232
WIRE 2912 1248 2912 1232
WIRE 3376 1248 3376 1232
WIRE 3152 1280 3152 1264
WIRE 2912 1344 2912 1328
SYMBOL current 3376 1152 R0
WINDOW 123 24 122 Left 2
WINDOW 39 24 101 Left 2
SYMATTR InstName Iload
SYMATTR Value 0
SYMBOL voltage 2912 1232 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL LTC1478 3152 1136 R0
SYMATTR InstName U1
SYMBOL voltage 2864 992 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 2864 1104 0
FLAG 3152 1280 0
FLAG 2912 1344 0
FLAG 3376 1248 0
FLAG 2864 992 IN
FLAG 3376 1136 OUT
TEXT 3296 1328 Left 2 !.dc Iload 0 1.5 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\28c3dcf9bb66_pmos_diode_conn_ltspice.asc
* Generated by LTspice 26.0.1 for Windows.
* PMOS Diode Connection
V2 +5V 0 5
V1 CA-V 0 PWL REPEAT FOREVER (0 2.5 2.5m 5 5m 2.5 7.5m 0 10m 2.5) ENDREPEAT
R1 CB-H CA-V 100
M2 +5V +5V CB-H CB-H PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 50m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -464 -96 -464 -128
WIRE -352 -96 -352 -128
WIRE -464 16 -464 -16
WIRE -352 16 -352 -16
WIRE 224 80 224 -64
WIRE 224 80 96 80
WIRE 224 112 224 80
WIRE 96 192 96 80
WIRE 176 192 96 192
WIRE 224 224 224 208
WIRE 384 224 224 224
WIRE 224 256 224 224
WIRE 224 416 224 336
WIRE 224 416 176 416
IOPIN 176 416 In
IOPIN -352 -128 In
IOPIN 384 224 In
IOPIN 224 -64 In
IOPIN -464 -128 In
SYMBOL voltage -352 -112 R0
WINDOW 3 -481 174 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL REPEAT FOREVER (0 2.5 2.5m 5 5m 2.5 7.5m 0 10m 2.5) ENDREPEAT
SYMBOL res 208 240 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage -464 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL pmos 176 112 R0
SYMATTR InstName M2
FLAG 176 416 CA-V
FLAG -352 16 0
FLAG -352 -128 CA-V
FLAG 384 224 CB-H
FLAG 224 -64 +5V
FLAG -464 16 0
FLAG -464 -128 +5V
TEXT -410 280 Left 2 !.tran 50m
TEXT -152 -272 Left 2 ;PMOS Diode Connection
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8052.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8052.asy)
Rload OUT 0 .5
R1 IN N001 510K
C1 OUT 0 330 V=6.3 Irms=3.9 Rser=0.01 Lser=0 mfg="KEMET" pn="T520D337M006ASE010" type="Tantalum"
V1 IN 0 24
R3 N003 0 9.09K
R2 N006 0 90.9K
XU1 0 N001 N002 N002 OUT N002 MP_01 N005 MP_02 N003 MP_03 MP_04 MP_05 N004 N006 MP_06 MP_07 MP_08 MP_09 MP_10 MP_11 MP_12 MP_13 MP_14 MP_15 MP_16 MP_17 IN LTM8052 ;pnba GND)RUN)Vref)CTL_T)Vout)CTL_I))SS))ADJ))))Comp)Rt)))))))))))))Vin
.tran 1.2m startup
.lib LTM8052.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 -80 -128 -80
WIRE 208 -80 -32 -80
WIRE -128 -64 -128 -80
WIRE -32 -64 -32 -80
WIRE 208 -32 208 -80
WIRE -128 32 -128 16
WIRE -32 32 -32 16
WIRE 64 32 -32 32
WIRE 432 32 352 32
WIRE 528 32 432 32
WIRE 432 48 432 32
WIRE 528 48 528 32
WIRE 64 128 48 128
WIRE 432 144 432 112
WIRE 528 144 528 128
WIRE 48 224 48 128
WIRE 64 224 48 224
WIRE 368 224 352 224
WIRE 464 224 448 224
WIRE 48 320 48 224
WIRE 64 320 48 320
WIRE 368 320 352 320
WIRE 64 416 48 416
WIRE 368 416 352 416
WIRE 464 416 448 416
WIRE 208 496 208 480
SYMBOL res 512 32 R0
SYMATTR InstName Rload
SYMATTR Value .5
SYMBOL polcap 416 48 R0
WINDOW 3 24 64 Left 2
SYMATTR Value 330
SYMATTR InstName C1
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=6.3 Irms=3.9 Rser=0.01 Lser=0 mfg="KEMET" pn="T520D337M006ASE010" type="Tantalum"
SYMBOL PowerProducts\\LTM8052 208 224 R0
SYMATTR InstName U1
SYMBOL res -48 -80 R0
SYMATTR InstName R1
SYMATTR Value 510K
SYMBOL voltage -128 -80 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 352 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 9.09K
SYMBOL res 352 432 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 90.9K
FLAG 208 496 0
FLAG -128 32 0
FLAG -128 -80 IN
FLAG 464 416 0
FLAG 464 224 0
FLAG 528 144 0
FLAG 432 144 0
FLAG 528 32 OUT
TEXT 520 472 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2387f5be90c0_curvetrace.asc
* Generated by LTspice 26.0.1 for Windows.
* This example schematic is supplied for informational/educational purposes only.
I1 0 N002 0.
Q1 N001 N002 0 0 2N2222
V1 N001 0 0.
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 10 10m I1 0 100u 10u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2472 1528
WIRE 2128 1152 1984 1152
WIRE 1984 1200 1984 1152
WIRE 2128 1216 2128 1152
WIRE 1920 1248 1840 1248
WIRE 1840 1264 1840 1248
WIRE 1840 1360 1840 1344
WIRE 1984 1360 1984 1296
WIRE 2128 1360 2128 1296
SYMBOL voltage 2128 1200 R0
SYMATTR InstName V1
SYMATTR Value 0.
SYMBOL current 1840 1344 M180
WINDOW 0 23 79 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName I1
SYMATTR Value 0.
SYMBOL npn 1920 1200 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
FLAG 2128 1360 0
FLAG 1984 1360 0
FLAG 1840 1360 0
TEXT 1824 1416 Left 0 !.dc V1 0 10 10m I1 0 100u 10u
TEXT 1512 1480 Left 0 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1634.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:\nSwitch shown for a logic 0 input\nOnly one channel is modeled\nQinj is not modeled \nModeled at 5V specification\n_EN is not available on the TSSOP package
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1634.asy)
XU1 vIN vSA vD vSB +V 0 0 -V ADG1634 ;pnba IN)SA)D)SB)Vdd)GND)_EN)Vss
V4 vIN 0 PULSE(0 3 0 10n 10n 10u 20u)
V1 +V 0 5
C1 vD 0 36p
V2 -V 0 -5
V5 vSA 0 2
V6 vSB 0 0
R1 vD 0 301
.tran 120u
.lib ADG1634.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -800 -320 -800 -352
WIRE -1040 -256 -1056 -256
WIRE -928 -256 -960 -256
WIRE -896 -256 -928 -256
WIRE -672 -224 -704 -224
WIRE -608 -224 -672 -224
WIRE -528 -224 -608 -224
WIRE -1136 -192 -1152 -192
WIRE -928 -192 -1056 -192
WIRE -896 -192 -928 -192
WIRE -608 -192 -608 -224
WIRE -528 -176 -528 -224
WIRE -1376 -144 -1376 -160
WIRE -1280 -144 -1280 -160
WIRE -928 -128 -1072 -128
WIRE -896 -128 -928 -128
WIRE -672 -128 -704 -128
WIRE -672 -112 -672 -128
WIRE -608 -96 -608 -112
WIRE -528 -96 -528 -112
WIRE -1376 -48 -1376 -64
WIRE -1280 -48 -1280 -64
WIRE -1072 0 -1072 -128
WIRE -864 16 -864 -16
WIRE -736 16 -736 -16
SYMBOL voltage -1280 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL ADG1634 -800 -176 R0
SYMATTR InstName U1
SYMBOL voltage -1040 -192 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 0
SYMBOL voltage -1072 -16 R0
WINDOW 3 33 91 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 10n 10n 10u 20u)
SYMATTR InstName V4
SYMBOL voltage -944 -256 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 2
SYMBOL voltage -1376 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap -544 -176 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL res -624 -208 R0
SYMATTR InstName R1
SYMATTR Value 301
FLAG -1280 -48 0
FLAG -1376 -48 0
FLAG -1376 -160 +V
FLAG -1280 -160 -V
FLAG -1072 80 0
FLAG -1056 -256 0
FLAG -1152 -192 0
FLAG -800 -352 +V
FLAG -736 16 0
FLAG -864 16 -V
FLAG -608 -96 0
FLAG -528 -96 0
FLAG -672 -112 0
FLAG -928 -256 vSA
FLAG -928 -192 vSB
FLAG -928 -128 vIN
FLAG -672 -224 vD
TEXT -688 24 Left 2 !.tran 120u
TEXT -1408 -552 Left 2 ;Notes:\nSwitch shown for a logic 0 input\nOnly one channel is modeled\nQinj is not modeled \nModeled at 5V specification\n_EN is not available on the TSSOP package
* Z:\home\khalils\Downloads\files\data\raw_asc\fda2f8a8b468_04A-030.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD549.asy)
D1 Vin N001 1N4148
V3 V- 0 -5
XU1 0 N001 V+ V- Vout1 AD549 ;pnba In+)In-)V+)V-)OUT
Q1 N002 0 Vin 0 2N3906
R2 Vout2 N002 1k
V1 V+ 0 5
XU2 0 N002 V+ V- Vout2 AD549 ;pnba In+)In-)V+)V-)OUT
R1 Vout1 N001 1k
V2 Vin 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V2 .3 .7 .00001
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 16 -176 16 -192
WIRE 144 -176 144 -192
WIRE 304 -176 304 -192
WIRE 336 32 288 32
WIRE 448 32 416 32
WIRE 160 144 80 144
WIRE 288 144 288 32
WIRE 288 144 224 144
WIRE 336 144 288 144
WIRE 448 160 448 32
WIRE 448 160 400 160
WIRE 480 160 448 160
WIRE 336 176 304 176
WIRE 304 192 304 176
WIRE 352 320 304 320
WIRE 464 320 432 320
WIRE 160 432 96 432
WIRE 304 432 304 320
WIRE 304 432 256 432
WIRE 352 432 304 432
WIRE 464 448 464 320
WIRE 464 448 416 448
WIRE 496 448 464 448
WIRE 352 464 320 464
WIRE 320 480 320 464
SYMBOL voltage 144 -192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL OpAmps\\AD549 368 96 R0
SYMATTR InstName U1
SYMBOL voltage 16 -192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL diode 160 160 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL OpAmps\\AD549 384 384 R0
SYMATTR InstName U2
SYMBOL pnp 256 496 M270
SYMATTR InstName Q1
SYMATTR Value 2N3906
SYMBOL res 432 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 304 -192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value ""
SYMBOL res 448 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 368 128 V+
FLAG 304 192 0
FLAG 80 144 Vin
FLAG 480 160 Vout1
FLAG 144 -96 0
FLAG 144 -192 V+
FLAG 304 -96 0
FLAG 304 -192 Vin
FLAG 16 -96 0
FLAG 16 -192 V-
FLAG 368 192 V-
FLAG 384 416 V+
FLAG 320 480 0
FLAG 96 432 Vin
FLAG 496 448 Vout2
FLAG 384 480 V-
FLAG 208 496 0
TEXT 464 -144 Left 2 !.dc V2 .3 .7 .00001
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG824.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PULSE(0 3 25u 1n 1n 20u)
R1 D 0 49.9
C1 D 0 36p
V2 SA 0 2
V3 +V 0 3.3
V4 SB 0 0
XU1 IN SA D SB +V 0 ADG824 ;pnba IN)SA)D)SB)Vdd)GND
.tran 75u
* Note:\nCharge Injection not included\nOnly One channel included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG824.asy)
.lib ADG824.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -32 -64 -48 -64
WIRE -48 0 -48 -64
WIRE -176 64 -512 64
WIRE -144 64 -176 64
WIRE -512 96 -512 64
WIRE 80 96 48 96
WIRE 128 96 80 96
WIRE 256 96 128 96
WIRE -176 128 -400 128
WIRE -144 128 -176 128
WIRE 128 128 128 96
WIRE 256 128 256 96
WIRE -512 192 -512 176
WIRE -400 192 -400 128
WIRE -176 192 -288 192
WIRE -144 192 -176 192
WIRE 128 240 128 208
WIRE 256 240 256 192
WIRE -496 288 -512 288
WIRE -400 304 -400 272
WIRE -288 304 -288 192
WIRE -512 336 -512 288
WIRE -48 336 -48 304
WIRE -512 432 -512 416
WIRE -288 448 -288 384
FLAG 128 240 0
FLAG 256 240 0
FLAG -48 336 0
FLAG -288 448 0
FLAG -512 192 0
FLAG -32 -64 +V
FLAG -512 432 0
FLAG -496 288 +V
FLAG -400 304 0
FLAG -176 64 SA
FLAG -176 128 SB
FLAG -176 192 IN
FLAG 80 96 D
SYMBOL voltage -288 288 R0
WINDOW 3 24 102 Left 2
SYMATTR Value PULSE(0 3 25u 1n 1n 20u)
SYMATTR InstName V1
SYMBOL res 112 112 R0
SYMATTR InstName R1
SYMATTR Value 49.9
SYMBOL cap 240 128 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -512 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 2
SYMBOL voltage -512 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 3.3
SYMBOL voltage -400 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 0
SYMBOL ADG824 -48 144 R0
SYMATTR InstName U1
TEXT 56 336 Left 2 !.tran 75u
TEXT -520 -136 Left 2 ;Note:\nCharge Injection not included\nOnly One channel included\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8333.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8333.asy)
R5 N003 0 71.5k
R3 OUT N003 1Meg
C2 N006 0 330pF
R1 N004 0 20k
D1 N001 OUT MBRS340
C4 N002 0 1
C1 SS 0 10n
XU1 0 IN IN N002 0 N005 N003 N004 SS 0 N001 LT8333 ;pnba GND)EN/UVLO)Vin)INTVcc)Bias)Vc)FBX)RT)SS)Sync/Mode)SW
C5 OUT N003 4.7pF
R2 N005 N006 68k
V1 IN 0 5
R4 OUT 0 48
L1 IN N001 3.3 Rser=19.5m
C3 OUT 0 10
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
.lib LT8333.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1416 868
WIRE -16 -64 -128 -64
WIRE 128 -64 -16 -64
WIRE 176 -64 128 -64
WIRE 288 -64 256 -64
WIRE 432 -64 288 -64
WIRE 624 -64 496 -64
WIRE 720 -64 624 -64
WIRE 832 -64 720 -64
WIRE 944 -64 832 -64
WIRE 944 -48 944 -64
WIRE -128 -32 -128 -64
WIRE 832 -32 832 -64
WIRE 128 0 128 -64
WIRE 288 0 288 -64
WIRE 624 32 624 -64
WIRE 720 48 720 -64
WIRE 832 48 832 32
WIRE 944 48 944 32
WIRE -16 64 -16 -64
WIRE 48 64 -16 64
WIRE 384 64 368 64
WIRE 464 64 448 64
WIRE -128 80 -128 48
WIRE 48 160 32 160
WIRE 624 160 624 112
WIRE 624 160 368 160
WIRE 720 160 720 112
WIRE 720 160 624 160
WIRE 624 192 624 160
WIRE -48 256 -80 256
WIRE 48 256 32 256
WIRE 384 256 368 256
WIRE 480 256 464 256
WIRE 560 256 544 256
WIRE 624 288 624 272
WIRE -48 352 -80 352
WIRE 32 352 16 352
WIRE 48 352 32 352
WIRE 384 352 368 352
WIRE 208 432 208 416
SYMBOL res 48 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 20k
SYMBOL cap 816 -32 R0
WINDOW 123 42 54 Left 2
WINDOW 0 41 3 Left 2
WINDOW 3 37 29 Left 2
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL cap 384 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL cap 704 48 R0
SYMATTR InstName C5
SYMATTR Value 4.7pF
SYMBOL VOLTAGE -128 -48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 608 16 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL res 608 176 R0
SYMATTR InstName R5
SYMATTR Value 71.5k
SYMBOL ind2 160 -48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=19.5m
SYMATTR Type ind
SYMBOL cap 16 336 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 928 -64 R0
SYMATTR InstName R4
SYMATTR Value 48
SYMBOL cap 480 272 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 330pF
SYMBOL schottky 432 -48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 -6 35 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS340
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 368 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 68k
SYMBOL LT8333 208 208 R0
SYMATTR InstName U1
FLAG -80 352 0
FLAG -80 256 0
FLAG -128 80 0
FLAG 624 288 0
FLAG 832 48 0
FLAG 944 48 0
FLAG 464 64 0
FLAG -128 -64 IN
FLAG 944 -64 OUT
FLAG 208 432 0
FLAG 560 256 0
FLAG 384 352 0
FLAG 32 352 SS
FLAG 32 160 0
TEXT 136 472 Left 2 !.tran 5m startup