Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG5412BF.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nInterrupt Flag recovery time with pull-up resistor not included\nQinj not included\nOnly one channel included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG5412BF.asy)
R1 vDrain 0 301
XU2 vIN vDrain vSource -V 0 +V vFF ADG5412BF ;pnba IN)D)S)Vss)GND)Vdd)FF
V3 vSource 0 10
C2 vFF 0 12p
V2 -V 0 -15
V1 +V 0 15
V4 vIN 0 pulse(0 5 0 20n 20n 10u 20u)
C1 vDrain 0 36p
.tran 0.1m
.lib ADG5412BF.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -112 -128 -112 -144
WIRE -624 -64 -624 -80
WIRE -400 -48 -432 -48
WIRE -272 -48 -320 -48
WIRE -208 -48 -272 -48
WIRE 48 -48 -16 -48
WIRE 128 -48 48 -48
WIRE 224 -48 128 -48
WIRE 128 -16 128 -48
WIRE 224 0 224 -48
WIRE -240 16 -272 16
WIRE -208 16 -240 16
WIRE 32 16 -16 16
WIRE -624 32 -624 16
WIRE -272 32 -272 16
WIRE 32 48 32 16
WIRE 128 80 128 64
WIRE 224 80 224 64
WIRE -272 112 -272 96
WIRE -624 128 -624 112
WIRE -160 144 -160 128
WIRE -64 144 -64 128
WIRE 32 144 32 128
WIRE -624 224 -624 208
SYMBOL cap 208 0 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL ADG5412BF -112 0 R0
SYMATTR InstName U2
SYMBOL cap -288 32 R0
SYMATTR InstName C2
SYMATTR Value 12p
SYMBOL res 112 -32 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage -304 -48 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL voltage -624 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -624 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 32 32 R0
WINDOW 3 17 95 Left 2
SYMATTR Value pulse(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V4
FLAG -624 224 0
FLAG -624 32 0
FLAG -624 -80 +V
FLAG -624 112 -V
FLAG -432 -48 0
FLAG -160 144 -V
FLAG -112 -144 +V
FLAG -64 144 0
FLAG 32 144 0
FLAG 128 80 0
FLAG 224 80 0
FLAG -272 112 0
FLAG 48 -48 vDrain
FLAG -272 -48 vSource
FLAG -240 16 vFF
FLAG 32 16 vIN
TEXT -368 192 Left 2 !.tran 0.1m
TEXT -648 -320 Left 2 ;Note:\nInterrupt Flag recovery time with pull-up resistor not included\nQinj not included\nOnly one channel included\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\0acbbc5c43b9_analisi-statica.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 lab1 1k
R2 N001 lab1 470
V1 N001 0 12
R4 lab1 0 10k
R3 lab1 0 2k
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 144 80 144
WIRE 352 144 208 144
WIRE 352 256 352 224
WIRE 208 272 208 224
WIRE 352 272 352 256
WIRE 80 352 80 224
WIRE 208 352 80 352
WIRE 352 352 208 352
WIRE 208 384 208 352
DATAFLAG 144 352 "$"
DATAFLAG 304 144 "$"
SYMBOL res 192 256 R0
SYMATTR InstName R3
SYMATTR Value 2k
SYMBOL voltage 80 128 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 336 256 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL res 192 128 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 336 128 R0
SYMATTR InstName R2
SYMATTR Value 470
FLAG 208 384 0
FLAG 208 272 lab1
FLAG 352 256 lab1
TEXT 568 152 Left 2 !.op
* Z:\tmp\asc_dec_bjh7r6w2\0bbefe8fe9ce_6993-2_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N001 0 N003 N004 N002 OUT LTC6993-2 ;pnba TRIG)GND)SET)DIV)V+)OUT
V1 N002 0 5
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6993-2.asy)
.lib LTC6993-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 96 -112 96
WIRE 608 96 320 96
WIRE 608 112 608 96
WIRE 96 176 80 176
WIRE 384 176 320 176
WIRE 512 176 384 176
WIRE 384 192 384 176
WIRE 512 192 512 176
WIRE 608 208 608 192
WIRE 96 256 80 256
WIRE 336 256 320 256
WIRE 336 288 336 256
WIRE 384 288 384 272
WIRE 384 288 336 288
WIRE 512 288 512 272
WIRE 384 304 384 288
SYMBOL SpecialFunctions\\LTC6993-2 208 176 R0
SYMATTR InstName U1
SYMBOL voltage 512 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 512 288 0
FLAG 608 96 OUT
FLAG 80 176 0
FLAG 608 208 0
* Z:\home\khalils\Downloads\files\data\raw_asc\19b22da50da2_Fig26_18_ID_VDS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1) and 1/d(Id(M1)) for output resistance
VDS N001 0 0
M1 N001 N002 0 0 N_50n l=50n w=500n
VGS N002 0 400m
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VDS 0 1 1m
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 288 208 288 192
WIRE 288 304 288 288
WIRE 400 192 288 192
WIRE 448 112 448 80
WIRE 448 224 448 208
WIRE 496 160 448 160
WIRE 640 80 448 80
WIRE 640 112 640 80
WIRE 640 224 640 192
SYMBOL nmos4 400 112 R0
WINDOW 0 59 18 Left 0
WINDOW 3 64 75 Left 0
WINDOW 123 64 103 Left 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 640 96 R0
WINDOW 0 41 55 Left 0
WINDOW 3 41 83 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 0
SYMBOL voltage 288 192 R0
WINDOW 0 -90 57 Left 0
WINDOW 3 -90 85 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 400m
FLAG 288 304 0
FLAG 448 224 0
FLAG 640 224 0
FLAG 496 160 0
TEXT 384 272 Left 0 !.dc VDS 0 1 1m
TEXT 384 296 Left 0 !.lib cmosedu_models.txt
TEXT 224 56 Left 0 ;Plot Id(M1) and 1/d(Id(M1)) for output resistance
* Z:\home\khalils\Downloads\files\data\raw_asc\3a6dd6d48ad8_Versuch01_Lab1.asc
* Generated by LTspice 26.0.1 for Windows.
RD Si N001 200
DSi Si 0 1N4148
XZener Zener 0 ZD3V9 ;pnba +)-
RD1 Schottky N001 200
RD3 Zener N001 200
XSchottky Schottky 0 BAT41 ;pnba +)-
Vi N001 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc Vi -5 5 .01
.include BAT41.txt
.include ZD3V9.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1456 680
WIRE 432 -224 -64 -224
WIRE 144 -160 64 -160
WIRE 240 -160 224 -160
WIRE 272 -160 240 -160
WIRE 368 -160 336 -160
WIRE -64 -64 -64 -224
WIRE 64 -64 64 -160
WIRE 64 -64 16 -64
WIRE 144 -64 64 -64
WIRE 240 -64 224 -64
WIRE 272 -64 240 -64
WIRE 368 -64 368 -160
WIRE 368 -64 336 -64
WIRE 432 -64 432 -224
WIRE 432 -64 368 -64
WIRE 64 32 64 -64
WIRE 144 32 64 32
WIRE 240 32 224 32
WIRE 272 32 240 32
WIRE 368 32 368 -64
WIRE 368 32 336 32
FLAG 240 32 Si
FLAG 240 -64 Schottky
FLAG 240 -160 Zener
FLAG 432 -64 0
SYMBOL res 240 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RD
SYMATTR Value 200
SYMBOL diode 272 48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName Si
SYMATTR Value 1N4148
SYMBOL schottky 272 -144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName Zener
SYMATTR Value ZD3V9
SYMATTR Prefix X
SYMBOL res 240 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RD1
SYMATTR Value 200
SYMBOL res 240 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RD3
SYMATTR Value 200
SYMBOL zener 272 -48 R270
WINDOW 0 36 32 VTop 2
WINDOW 3 -4 32 VBottom 2
SYMATTR InstName Schottky
SYMATTR Value BAT41
SYMATTR Prefix X
SYMBOL voltage 32 -64 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Vi
SYMATTR Value 5
TEXT -32 72 Left 2 !.dc Vi -5 5 .01
TEXT 24 120 Left 2 !.include BAT41.txt
TEXT 32 160 Left 2 !.include ZD3V9.txt
* Z:\home\khalils\Downloads\files\data\raw_asc\51f31038a721_AmpOpDriverBipolarBJT_v3.asc
* Generated by LTspice 26.0.1 for Windows.
RL VL Vs 1
RS Vs 0 0.1
XU1 N001 Vs V+ V- N002 LT1013 ;pnba In+)In-)V+)V-)OUT
R3 Vg N002 1
VIN Vin 0 3
Vcc V+ 0 5
Vee 0 V- 5
R1 Vin N001 19k
R2 N001 0 1k
Q1 V+ Vg VL 0 2SCR542P
Q2 V- Vg VL 0 2SAR542P
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VIN -3 3 0.1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1014.asy)
.lib LT1013.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 -16 128 -48
WIRE -400 16 -400 0
WIRE -544 96 -544 80
WIRE -688 128 -688 112
WIRE -688 128 -704 128
WIRE -400 128 -400 96
WIRE -272 128 -400 128
WIRE -688 144 -688 128
WIRE -128 144 -208 144
WIRE -16 144 -48 144
WIRE 128 144 128 80
WIRE 176 144 128 144
WIRE 208 144 176 144
WIRE 320 144 288 144
WIRE 352 144 320 144
WIRE -400 160 -400 128
WIRE -272 160 -288 160
WIRE -544 192 -544 176
WIRE 128 208 128 144
WIRE -400 256 -400 240
WIRE 128 336 128 304
FLAG 432 144 0
FLAG 128 -48 V+
FLAG -16 144 Vg
FLAG 64 32 Vg
FLAG -704 128 0
FLAG -688 32 V+
FLAG -240 176 V+
FLAG -688 224 V-
FLAG -544 192 0
FLAG -240 112 V-
FLAG 128 336 V-
FLAG 176 144 VL
FLAG 320 144 Vs
FLAG 64 256 Vg
FLAG -288 160 Vs
FLAG -544 80 Vin
FLAG -400 256 0
FLAG -400 0 Vin
SYMBOL res 192 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName RL
SYMATTR Value 1
SYMBOL res 336 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName RS
SYMATTR Value 0.1
SYMBOL OpAmps\\LT1014 -240 208 M180
SYMATTR InstName U1
SYMBOL res -32 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL voltage -544 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VIN
SYMATTR Value 3
SYMBOL voltage -688 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vcc
SYMATTR Value 5
SYMBOL voltage -688 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vee
SYMATTR Value 5
SYMBOL res -416 0 R0
SYMATTR InstName R1
SYMATTR Value 19k
SYMBOL res -416 144 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL npn 64 -16 R0
SYMATTR InstName Q1
SYMATTR Value 2SCR542P
SYMBOL pnp 64 304 M180
SYMATTR InstName Q2
SYMATTR Value 2SAR542P
TEXT -256 -16 Left 2 !.dc VIN -3 3 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\a499dd20a437_OR.asc
* Generated by LTspice 26.0.1 for Windows.
V1 B 0 PULSE(0 1.2 0 500p 500p 20n 40n)
V4 N001 0 1.2
M3 N005 A 0 N008 NMOS
M5 N002 N005 vout N004 PMOS
V3 N002 0 1.2
V2 A 0 PULSE(0 1.2 0 500p 500p 10n 20n)
M1 N001 A P001 N003 PMOS
M4 N005 B 0 N009 NMOS
M2 P001 B N005 N006 PMOS
M6 vout N005 0 N007 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100n
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 304 -64 160 -64
WIRE 304 0 304 -64
WIRE 160 32 160 -64
WIRE 672 32 560 32
WIRE 672 48 672 32
WIRE 160 80 160 48
WIRE 560 80 560 32
WIRE 112 112 -32 112
WIRE 560 128 560 96
WIRE -224 144 -304 144
WIRE -32 144 -32 112
WIRE -32 144 -224 144
WIRE 512 160 480 160
WIRE 160 176 160 144
WIRE 560 192 560 176
WIRE 656 192 560 192
WIRE 560 208 560 192
WIRE 160 240 160 224
WIRE 480 240 480 160
WIRE 480 240 160 240
WIRE -128 256 -256 256
WIRE 112 256 112 208
WIRE 112 256 -128 256
WIRE 160 272 160 240
WIRE 160 272 80 272
WIRE 240 272 160 272
WIRE 80 288 80 272
WIRE 240 288 240 272
WIRE 480 288 480 240
WIRE 512 288 480 288
WIRE 560 288 560 256
WIRE 112 304 112 256
WIRE 192 304 112 304
WIRE -32 368 -32 144
WIRE 32 368 -32 368
WIRE 80 368 80 336
WIRE 192 368 192 304
WIRE 240 368 240 336
WIRE 160 384 80 384
WIRE 240 384 160 384
WIRE 160 432 160 384
IOPIN 656 192 Out
IOPIN -304 144 In
IOPIN -256 256 In
SYMBOL pmos4 112 128 R0
SYMATTR InstName M2
SYMBOL nmos4 512 208 R0
SYMATTR InstName M6
SYMBOL pmos4 512 80 R0
SYMATTR InstName M5
SYMBOL voltage -224 128 R0
WINDOW 3 -108 -60 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1.2 0 500p 500p 10n 20n)
SYMBOL pmos4 112 32 R0
SYMATTR InstName M1
SYMBOL voltage -128 240 R0
WINDOW 3 -439 53 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1.2 0 500p 500p 20n 40n)
SYMBOL voltage 672 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 1.2
SYMBOL nmos4 32 288 R0
SYMATTR InstName M3
SYMBOL voltage 304 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 1.2
SYMBOL nmos4 192 288 R0
SYMATTR InstName M4
FLAG 160 432 0
FLAG 560 304 0
FLAG -128 336 0
FLAG -224 224 0
FLAG 672 128 0
FLAG 304 80 0
FLAG 656 192 vout
FLAG -304 144 A
FLAG -256 256 B
TEXT 32 -72 Left 2 !.tran 100n
* Z:\tmp\asc_dec_bjh7r6w2\069c83030d60_Exp2_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 0 12k
Vcc Vcc 0 12
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2388 680
WIRE 0 16 -32 16
WIRE 112 16 80 16
WIRE 160 16 112 16
WIRE 272 16 240 16
WIRE -32 64 -32 16
WIRE 448 128 448 96
WIRE 560 128 560 96
WIRE 112 144 112 16
WIRE 160 144 112 144
WIRE 272 160 272 16
WIRE 272 160 224 160
WIRE 288 160 272 160
WIRE 16 176 0 176
WIRE 160 176 16 176
WIRE 16 208 16 176
WIRE 448 240 448 208
WIRE 560 240 560 208
SYMBOL res 96 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 12k
SYMBOL Misc\\battery 448 112 R0
SYMATTR InstName Vcc
SYMATTR Value 12
FLAG 560 96 Vee
FLAG 448 96 Vcc
FLAG 192 128 Vcc
FLAG 192 192 Vee
FLAG 448 240 0
FLAG 560 240 0
FLAG 288 160 Vs
FLAG -32 64 0
FLAG 0 176 Ve
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3973.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3973.asy)
Rload OUT 0 10
R1 OUT N005 1Meg
R3 N004 0 215K
C1 OUT 0 22
XU1 N005 OUT IN IN 0 N002 N001 OUT N003 N004 LT3973 ;pnba FB)OUT)EN/UVLO)Vin)GND)SW)Boost)BD)PG)Rt
L1 N002 OUT 15
C2 OUT N005 15p
R2 N005 0 316K
C3 N002 N001 .47
V1 IN 0 10
R4 IN N003 100K
.tran 750u startup
.lib LT3973.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1080 680
WIRE 320 -96 272 -96
WIRE 416 -96 384 -96
WIRE 272 -48 272 -96
WIRE 48 16 -80 16
WIRE 128 16 48 16
WIRE 144 16 128 16
WIRE 416 16 416 -96
WIRE 416 16 400 16
WIRE 432 16 416 16
WIRE 528 16 512 16
WIRE 576 16 528 16
WIRE 656 16 576 16
WIRE 736 16 656 16
WIRE -80 32 -80 16
WIRE 656 32 656 16
WIRE 736 32 736 16
WIRE 48 112 48 16
WIRE 128 112 128 16
WIRE 144 112 128 112
WIRE 448 112 400 112
WIRE 528 112 528 16
WIRE 528 112 448 112
WIRE -80 128 -80 112
WIRE 656 128 656 96
WIRE 736 128 736 112
WIRE 48 208 48 192
WIRE 144 208 48 208
WIRE 448 208 448 112
WIRE 448 208 400 208
WIRE 576 208 576 16
WIRE 448 224 448 208
WIRE 48 304 32 304
WIRE 144 304 128 304
WIRE 448 304 448 288
WIRE 448 304 400 304
WIRE 576 304 576 288
WIRE 576 304 448 304
WIRE 576 320 576 304
WIRE 272 384 272 368
WIRE 576 416 576 400
SYMBOL res 560 192 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL res 720 16 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL res 144 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 215K
SYMBOL res 560 304 R0
SYMATTR InstName R2
SYMATTR Value 316K
SYMBOL cap 640 32 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL PowerProducts\\LT3973 272 160 R0
SYMATTR InstName U1
SYMBOL cap 384 -112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .47
SYMBOL cap 432 224 R0
WINDOW 0 29 14 Left 2
WINDOW 3 31 50 Left 2
SYMATTR InstName C2
SYMATTR Value 15p
SYMBOL voltage -80 16 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL ind 416 32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 15
SYMBOL res 32 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
FLAG 272 384 0
FLAG 32 304 0
FLAG 576 416 0
FLAG 656 128 0
FLAG 736 128 0
FLAG -80 128 0
FLAG -80 16 IN
FLAG 736 16 OUT
TEXT 704 336 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ad5ad8a0197b_AD8628_char.asc
* Generated by LTspice 26.0.1 for Windows.
* .op
* .dc V1 0.3 1.2 0.0001
* .meas DC min MIN v(vout) FROM 0.99 TO 1.01\n.meas DC max MAX v(vout) FROM 0.99 TO 1.02\n.meas DC vtrig TRIG v(vout)=min CROSS=last TARG v(vout)=max\n.meas DC offset FIND v(vout) WHEN v(vout)=3.3/2-0.001
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8628.asy)
V2 N001 0 0
XU2 N001 vout_noise vdd3 0 vout_noise AD8628 ;pnba In+)In-)V+)V-)OUT
XU1 v- v- vdd3 0 vout AD8628 ;pnba In+)In-)V+)V-)OUT
Vdd1 vdd3 0 3.3
V1 v- 0 0.5
R1 vout_noise 0 1k
.noise v(vout_noise) V2 dec 100 1 10g
.lib AD8628.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1252 680
WIRE 896 0 752 0
WIRE 368 32 336 32
WIRE 384 32 368 32
WIRE 448 48 448 16
WIRE 384 64 384 32
WIRE 416 64 384 64
WIRE 576 80 480 80
WIRE 64 96 64 64
WIRE 416 96 384 96
WIRE 816 128 816 80
WIRE 336 144 336 32
WIRE 368 144 336 144
WIRE 384 144 384 96
WIRE 384 144 368 144
WIRE 752 144 752 0
WIRE 784 144 752 144
WIRE 64 160 64 96
WIRE 448 160 448 112
WIRE 896 160 896 0
WIRE 896 160 848 160
WIRE 944 160 896 160
WIRE 784 176 688 176
WIRE 336 192 336 144
WIRE 688 208 688 176
WIRE 944 208 944 160
WIRE 816 224 816 192
SYMBOL OpAmps\\AD8628 448 144 M180
SYMATTR InstName U1
SYMBOL voltage 336 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0.5
SYMBOL voltage 64 144 R0
SYMATTR InstName Vdd1
SYMATTR Value 3.3
SYMBOL voltage 688 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL res 928 192 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL OpAmps\\AD8628 816 96 R0
SYMATTR InstName U2
FLAG 448 160 vdd3
FLAG 448 16 0
FLAG 64 240 0
FLAG 64 96 vdd3
FLAG 576 80 vout
FLAG 368 32 v+
FLAG 368 144 v-
FLAG 336 272 0
FLAG 816 80 vdd3
FLAG 816 224 0
FLAG 944 160 vout_noise
FLAG 688 288 0
FLAG 944 288 0
TEXT -56 352 Left 2 ;.op
TEXT -56 424 Left 2 ;.dc V1 0.3 1.2 0.0001
TEXT -56 456 Left 2 ;.meas DC min MIN v(vout) FROM 0.99 TO 1.01\n.meas DC max MAX v(vout) FROM 0.99 TO 1.02\n.meas DC vtrig TRIG v(vout)=min CROSS=last TARG v(vout)=max\n.meas DC offset FIND v(vout) WHEN v(vout)=3.3/2-0.001
TEXT -56 392 Left 2 !.noise v(vout_noise) V2 dec 100 1 10g
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4121B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4121B.asy)
C3 N002 0 10
XU1 N001 VI+ 0 0 0 OUT N003 N002 ADuM4121B ;pnba Vdd1)VI+)VI-)GND1)GND2)Clamp)Vout)Vdd2
C2 N001 0 0.1
V2 N002 0 15
R1 OUT N003 10
V1 N001 0 5
C4 N002 0 0.1
C1 OUT 0 2n
V3 VI+ 0 PULSE(0 5 0 2n 2n 9.998u 20u)
.tran 100u
.lib ADuM4121B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1064 680
WIRE 16 -80 -112 -80
WIRE 160 -80 16 -80
WIRE 464 -80 320 -80
WIRE 560 -80 464 -80
WIRE 704 -80 560 -80
WIRE -112 -64 -112 -80
WIRE 704 -64 704 -80
WIRE 16 -48 16 -80
WIRE 464 -48 464 -80
WIRE 560 -48 560 -80
WIRE -112 32 -112 16
WIRE 16 32 16 16
WIRE 464 32 464 16
WIRE 560 32 560 16
WIRE 704 32 704 16
WIRE 160 64 160 -80
WIRE 320 64 320 -80
WIRE 48 128 -352 128
WIRE 112 128 48 128
WIRE 464 128 368 128
WIRE 592 128 544 128
WIRE 688 128 592 128
WIRE 688 144 688 128
WIRE -352 160 -352 128
WIRE 112 192 48 192
WIRE 592 192 592 128
WIRE 592 192 368 192
WIRE 688 224 688 208
WIRE -352 288 -352 240
WIRE 160 304 160 256
WIRE 320 304 320 256
SYMBOL ADuM4121B 240 160 R0
SYMATTR InstName U1
SYMBOL res 560 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage -112 -80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 544 -48 R0
SYMATTR InstName C4
SYMATTR Value 0.1
SYMBOL cap 0 -48 R0
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL voltage 704 -80 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL cap 672 144 R0
SYMATTR InstName C1
SYMATTR Value 2n
SYMBOL voltage -352 144 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 2n 2n 9.998u 20u)
SYMBOL cap 448 -48 R0
SYMATTR InstName C3
SYMATTR Value 10
FLAG 160 304 0
FLAG 320 304 0
FLAG 688 224 0
FLAG 688 128 OUT
FLAG 704 32 0
FLAG -112 32 0
FLAG -352 288 0
FLAG 48 192 0
FLAG 16 32 0
FLAG 464 32 0
FLAG 560 32 0
FLAG 48 128 VI+
TEXT 384 344 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\47f2abd3b02b_MOSFET_transfer_body_effect.asc
* Generated by LTspice 26.0.1 for Windows.
+LAMBDA=0.1 PHI=0.6 GAMMA=0.37)
VB N002 0 0
VDS N001 0 5
VGS N003 0 0
M1 N001 N003 0 N002 MC8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VGS 0 1 0.01 VB -1 1 0.5
.model MC8 NMOS (KP=60e-3 VTO=0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1412 680
WIRE 320 80 160 80
WIRE 160 112 160 80
WIRE 320 128 320 80
WIRE 240 160 160 160
WIRE 112 192 -64 192
WIRE -64 208 -64 192
WIRE 240 224 240 160
WIRE 160 256 160 208
WIRE -64 320 -64 288
WIRE 240 384 240 304
WIRE 320 384 320 208
SYMBOL voltage 240 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VB
SYMATTR Value 0
SYMBOL voltage -64 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 0
SYMBOL nmos4 112 112 R0
SYMATTR InstName M1
SYMATTR Value MC8
SYMBOL voltage 320 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 5
FLAG -64 320 0
FLAG 320 384 0
FLAG 240 384 0
FLAG 160 256 0
TEXT -32 448 Left 2 !.dc VGS 0 1 0.01 VB -1 1 0.5
TEXT -32 488 Left 2 !.model MC8 NMOS (KP=60e-3 VTO=0.5 \n+LAMBDA=0.1 PHI=0.6 GAMMA=0.37)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1174.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1174.asy)
D1 0 N001 MBRS140
XU1 N004 N003 N002 0 N001 IN IN IN LTC1174 top=1K bot=1T ;pnba FB)LBout)LBin)GND)SW)Vin)Ipgm)_SHDN
R1 OUT N004 93.5K
L1 N001 OUT 100 Rser=0.02 Rpar=5000
V1 IN 0 9
C2 OUT 0 100 Rser=0.02
R2 N004 0 31.5K
Rload OUT 0 25
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5m startup
.lib LTC1174.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1584 1140
WIRE 464 480 368 480
WIRE 624 480 464 480
WIRE 368 496 368 480
WIRE 624 512 624 480
WIRE 464 560 464 480
WIRE 496 560 464 560
WIRE 816 560 752 560
WIRE 864 560 816 560
WIRE 976 560 944 560
WIRE 1088 560 976 560
WIRE 1184 560 1088 560
WIRE 816 576 816 560
WIRE 976 576 976 560
WIRE 1088 576 1088 560
WIRE 1184 576 1184 560
WIRE 368 592 368 576
WIRE 496 624 480 624
WIRE 768 624 752 624
WIRE 816 656 816 640
WIRE 1088 672 1088 640
WIRE 1184 672 1184 656
WIRE 464 688 464 560
WIRE 496 688 464 688
WIRE 976 688 976 656
WIRE 976 688 752 688
WIRE 976 704 976 688
WIRE 624 752 624 736
WIRE 976 800 976 784
SYMBOL POLCAP 1072 576 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL RES 960 560 R0
SYMATTR InstName R1
SYMATTR Value 93.5K
SYMBOL RES 960 688 R0
SYMATTR InstName R2
SYMATTR Value 31.5K
SYMBOL PowerProducts\\LTC1174 624 624 R0
SYMATTR InstName U1
SYMBOL RES 1168 560 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL IND 848 576 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL SCHOTTKY 800 640 M180
WINDOW 0 27 66 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL VOLTAGE 368 480 R0
SYMATTR InstName V1
SYMATTR Value 9
FLAG 1184 560 OUT
FLAG 1088 672 0
FLAG 1184 672 0
FLAG 816 656 0
FLAG 624 752 0
FLAG 976 800 0
FLAG 368 592 0
FLAG 368 480 IN
TEXT 704 776 Left 2 !.tran 5m startup