Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\35b24eac579f_PMOS_CHART_SETUP.asc
* Generated by LTspice 26.0.1 for Windows.
;.dc vg 0 1.8 10m
M1 N002 N001 vs vs PMOS l=0.36u w={wp}
R2 N001 vg 1Meg
R1 N002 vd 1.5k
vg vg 0 1.125
vd vd 0 0.9
vs vs 0 1.8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include tsmc180.txt
.step param wp 0.18u 70u 0.18u
.param wp=1u
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE 192 112 192 48
WIRE 368 112 368 32
WIRE 720 208 720 128
WIRE 800 208 720 208
WIRE 720 240 720 208
WIRE 560 256 528 256
WIRE 672 256 640 256
WIRE 192 272 192 192
WIRE 368 288 368 192
WIRE 800 288 800 208
WIRE 800 288 720 288
WIRE 720 400 720 336
WIRE 720 560 720 480
IOPIN 528 256 In
SYMBOL voltage 192 96 R0
WINDOW 3 24 44 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 1.125
SYMATTR InstName vg
SYMBOL res 656 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 704 384 R0
SYMATTR InstName R1
SYMATTR Value 1.5k
SYMBOL voltage 368 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vs
SYMATTR Value 1.8
SYMBOL voltage -112 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vd
SYMATTR Value 0.9
SYMBOL pmos4 672 336 M180
WINDOW 123 79 3 Left 2
SYMATTR Value2 l=0.36u w={wp}
SYMATTR InstName M1
FLAG 192 272 0
FLAG 368 288 0
FLAG 192 48 vg
FLAG 368 32 vs
FLAG 528 256 vg
FLAG 720 128 vs
FLAG -112 192 0
FLAG -112 112 vd
FLAG 720 560 vd
TEXT 56 400 Left 2 !.include tsmc180.txt
TEXT 64 424 Left 2 !;.dc vg 0  1.8  10m
TEXT 16 464 Left 2 !.step param wp 0.18u 70u 0.18u
TEXT 80 512 Left 2 !.param wp=1u
TEXT -16 384 Left 2 !.op
* Z:\tmp\asc_dec_bjh7r6w2\0fa5a251238b_EjercicioParaEntregar_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R6 N004 N006 R
C2 N004 COLEC C
R5 N001 EMISOR 1k
V1 N002 0 24
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 -240 -80 -240
WIRE -32 -176 -32 -240
WIRE 208 -176 112 -176
WIRE -80 -128 -80 -240
WIRE 208 -128 208 -176
WIRE 112 -64 112 -96
WIRE -80 0 -80 -48
WIRE 112 32 112 16
WIRE 176 32 112 32
WIRE 304 32 240 32
WIRE 112 64 112 32
WIRE 304 64 304 32
WIRE 112 80 112 64
WIRE -240 128 -336 128
WIRE -80 128 -80 80
WIRE -80 128 -160 128
WIRE 0 128 -80 128
WIRE 48 128 0 128
WIRE 112 208 112 176
WIRE 176 208 112 208
WIRE 320 208 240 208
WIRE -80 224 -80 128
WIRE 112 240 112 208
WIRE 320 240 320 208
WIRE 112 448 112 320
WIRE 320 464 320 320
SYMBOL res 304 224 R0
SYMATTR InstName R6
SYMBOL cap 240 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMBOL res 96 -80 R0
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL voltage -80 -32 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 24
FLAG -32 -176 0
FLAG 208 -128 0
FLAG 0 128 BASE
FLAG 112 64 EMISOR
FLAG 112 208 COLEC
FLAG 304 64 0
* Z:\home\khalils\Downloads\files\data\raw_asc\412644f6ec1b_1N4007.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 0
R1 vd1 N001 1k
D1 vd1 0 1N4007
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -2 10 100m
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 80 64 -16 64
WIRE 240 64 160 64
WIRE -16 112 -16 64
WIRE 240 112 240 64
WIRE -16 240 -16 192
WIRE 112 240 -16 240
WIRE 240 240 240 176
WIRE 240 240 112 240
WIRE 112 256 112 240
SYMBOL voltage -16 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL res 176 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 224 112 R0
SYMATTR InstName D1
SYMATTR Value 1N4007
FLAG 112 256 0
FLAG 240 64 vd1
TEXT -48 280 Left 2 !.dc V1 -2 10 100m
* Z:\home\khalils\Downloads\files\data\raw_asc\AD4000.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N002 0 1.8
V1 N003 0 SINE(3 4 10k)
R1 IN N003 10
C1 0 Vout 10p
V4 N004 0 PULSE(0 1.8 227n 0.1n 0.1n 40n 500n)
V2 N001 0 5
XU1 N001 N002 IN MP_01 0 N004 MP_02 MP_03 Vout AD4000 EN_Hi_Z=1 ;pnba REF)Vdd)IN))GND)CNV)))Vout
.tran 110u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\ADC\AD4000.asy)
.lib AD4000.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 1252
WIRE 704 208 368 208
WIRE 832 208 784 208
WIRE 368 288 368 208
WIRE 704 336 496 336
WIRE 832 336 784 336
WIRE -144 432 -208 432
WIRE -16 432 -64 432
WIRE 96 432 64 432
WIRE 128 432 96 432
WIRE 544 432 496 432
WIRE 576 432 544 432
WIRE 704 432 640 432
WIRE 704 528 496 528
WIRE 832 528 784 528
WIRE 368 608 368 576
FLAG 368 608 0
FLAG 832 336 0
FLAG -208 432 0
FLAG 704 432 0
FLAG 832 528 0
FLAG 832 208 0
FLAG 96 432 IN
FLAG 544 432 Vout
SYMBOL voltage 688 336 R270
WINDOW 0 47 41 VRight 2
WINDOW 3 -44 39 VRight 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 1.8
SYMBOL voltage -48 432 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(3 4 10k)
SYMBOL res 80 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL cap 640 416 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage 688 528 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 1.8 227n 0.1n 0.1n 40n 500n)
SYMBOL voltage 688 208 R270
WINDOW 0 45 70 VLeft 2
WINDOW 3 -46 68 VLeft 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL AD4000 400 432 R0
SYMATTR InstName U1
TEXT 184 624 Left 2 !.tran 110u
* Z:\home\khalils\Downloads\files\data\raw_asc\30db4be036bf_Offset_generisk.asc
* Generated by LTspice 26.0.1 for Windows.
Va N002 0 1.6325
V3 Vcc 0 5.5
V4 Vdd 0 -5.5
Ra N002 N001 100k
Rb N001 Vout 100k
Rc N003 N004 100k
Rd N004 0 100k
Vb N003 0 .
XU1 N004 N001 Vcc Vdd Vout level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.tran 0 5 0.001
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 512 -16 480 -16
WIRE 640 -16 592 -16
WIRE 224 48 144 48
WIRE 480 48 480 -16
WIRE 480 48 304 48
WIRE 480 96 480 48
WIRE 512 96 480 96
WIRE 640 112 640 -16
WIRE 640 112 576 112
WIRE 672 112 640 112
WIRE 144 128 144 48
WIRE 368 128 336 128
WIRE 464 128 448 128
WIRE 512 128 464 128
WIRE 464 160 464 128
WIRE 336 192 336 128
FLAG 336 272 0
FLAG 144 208 0
FLAG 624 336 0
FLAG 720 336 0
FLAG 544 80 Vcc
FLAG 624 256 Vcc
FLAG 544 144 Vdd
FLAG 720 256 Vdd
FLAG 672 112 Vout
IOPIN 672 112 Out
FLAG 464 240 0
SYMBOL voltage 144 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Va
SYMATTR Value 1.6325
SYMBOL voltage 624 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 5.5
SYMBOL voltage 720 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value -5.5
SYMBOL res 208 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Ra
SYMATTR Value 100k
SYMBOL res 496 0 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rb
SYMATTR Value 100k
SYMBOL res 352 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rc
SYMATTR Value 100k
SYMBOL res 448 144 R0
WINDOW 0 36 49 Left 2
SYMATTR InstName Rd
SYMATTR Value 100k
SYMBOL voltage 336 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vb
SYMATTR Value .
SYMBOL Opamps\\UniversalOpamp2 544 112 R0
SYMATTR InstName U1
TEXT 48 392 Left 2 !.tran 0 5 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\b5df47b2889d_DAC.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD549.asy)
V2 0 Von 15
XU1 0 N001 Vop Von Vout AD549 ;pnba In+)In-)V+)V-)OUT
V1 Vop 0 15
V4 x2 0 PULSE(0 5 20m 0 0 20m 40m)
R5 N001 x0 8k
R2 N001 x3 1k
V3 x3 0 PULSE(0 5 40m 0 0 40m 80m)
R3 N001 x2 2k
R4 N001 x1 4k
V5 x1 0 PULSE(0 5 10m 0 0 10m 20m)
R1 Vout N001 1k
V6 x0 0 PULSE(0 5 5m 0 0 5m 10m)
.tran 200m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1148 680
WIRE -240 -128 -320 -128
WIRE -112 -128 -160 -128
WIRE -512 -112 -560 -112
WIRE -384 -112 -432 -112
WIRE -208 -48 -224 -48
WIRE -512 -16 -560 -16
WIRE -384 -16 -384 -112
WIRE -384 -16 -432 -16
WIRE -224 0 -224 -48
WIRE 368 0 368 -64
WIRE 512 0 512 -64
WIRE -384 16 -384 -16
WIRE -320 16 -320 -128
WIRE -320 16 -384 16
WIRE -256 16 -320 16
WIRE -112 32 -112 -128
WIRE -112 32 -192 32
WIRE -48 32 -112 32
WIRE -256 48 -288 48
WIRE -512 80 -560 80
WIRE -384 80 -384 16
WIRE -384 80 -432 80
WIRE -224 80 -224 64
WIRE -208 80 -224 80
WIRE -288 96 -288 48
WIRE 368 128 368 80
WIRE 512 128 512 80
WIRE -512 176 -560 176
WIRE -384 176 -384 80
WIRE -384 176 -432 176
WIRE 368 336 368 272
WIRE 512 336 512 272
WIRE 656 336 656 272
WIRE 800 336 800 272
WIRE 368 464 368 416
WIRE 512 464 512 416
WIRE 656 464 656 416
WIRE 800 464 800 416
SYMBOL voltage 368 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 512 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 5 20m 0 0 20m 40m)
SYMBOL res -416 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 4k
SYMBOL voltage 512 96 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL OpAmps\\AD549 -224 -32 R0
WINDOW 3 -66 19 Left 2
SYMATTR InstName U1
SYMBOL res -416 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 8k
SYMBOL res -416 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 2k
SYMBOL voltage 800 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value PULSE(0 5 5m 0 0 5m 10m)
SYMBOL res -416 -128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 656 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value PULSE(0 5 10m 0 0 10m 20m)
SYMBOL voltage 368 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 40m 0 0 40m 80m)
SYMBOL res -144 -144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 368 128 0
FLAG 368 -64 Vop
FLAG 512 128 0
FLAG 512 -64 Von
FLAG -208 -48 Vop
FLAG -208 80 Von
FLAG -288 96 0
FLAG -560 -112 x3
FLAG -560 -16 x2
FLAG -560 80 x1
FLAG -560 176 x0
FLAG -48 32 Vout
FLAG 368 464 0
FLAG 512 464 0
FLAG 656 464 0
FLAG 800 464 0
FLAG 368 272 x3
FLAG 512 272 x2
FLAG 656 272 x1
FLAG 800 272 x0
TEXT -604 488 Left 2 !.tran 200m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1126.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain 1000 Amplifier with 0.01% Accuracy, DC to 5Hz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1126.asy)
R1 OUT N001 364.76K
XU1 IN N001 +V -V OUT LT1126 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 15
V2 -V 0 -15
R2 N001 0 365
V3 IN 0 ac 1
.ac oct 10 1m 1Meg
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 144 96 128 96
WIRE 256 96 224 96
WIRE -208 112 -208 96
WIRE -112 112 -112 96
WIRE -208 208 -208 192
WIRE -112 208 -112 192
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 288 240 256 240
WIRE 160 256 0 256
WIRE 0 272 0 256
WIRE 192 288 192 272
WIRE 0 368 0 352
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL opamps\\LT1126 192 176 R0
SYMATTR InstName U1
SYMBOL voltage 0 256 R0
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL res 240 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 364.76K
SYMBOL voltage -112 96 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -208 96 R0
SYMATTR InstName V2
SYMATTR Value -15
FLAG -112 208 0
FLAG 192 192 +V
FLAG -112 96 +V
FLAG 192 288 -V
FLAG -208 208 0
FLAG -208 96 -V
FLAG 16 96 0
FLAG 0 368 0
FLAG 288 240 OUT
FLAG 0 256 IN
TEXT 160 360 Left 2 !.ac oct 10 1m 1Meg
TEXT 96 40 Bottom 2 ;Gain 1000 Amplifier with 0.01% Accuracy, DC to 5Hz
* Z:\home\khalils\Downloads\files\data\raw_asc\1d3106c62b1d_simulacionDiodo1N4007.asc
* Generated by LTspice 26.0.1 for Windows.
D1 N002 0 1N4007
V1 N001 0 10
R1 N002 N001 1K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -2 10 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 128 96 48 96
WIRE 272 96 208 96
WIRE 48 128 48 96
WIRE 272 128 272 96
WIRE 48 224 48 192
WIRE 272 224 272 192
WIRE 272 224 48 224
WIRE 48 256 48 224
SYMBOL Misc\\cell 48 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL diode 256 128 R0
SYMATTR InstName D1
SYMATTR Value 1N4007
SYMBOL res 224 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG 48 256 0
TEXT 72 264 Left 2 !.dc V1 -2 10 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADR5043.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR5043.asy)
XU1 OUT 0 ADR5043 ;pnba 1)2
Rbias IN OUT 665
Vin IN 0 3.3
Rload OUT 0 10k
.dc TEMP -40 125 .1
.lib ADR5043.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 960
WIRE 32 64 -80 64
WIRE 208 64 112 64
WIRE 464 64 208 64
WIRE -80 112 -80 64
WIRE 208 112 208 64
WIRE 464 112 464 64
WIRE -80 224 -80 192
WIRE 208 224 208 176
WIRE 208 224 -80 224
WIRE 464 224 464 192
WIRE 464 224 208 224
WIRE -80 256 -80 224
SYMBOL voltage -80 96 R0
WINDOW 3 36 62 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 30 32 Left 2
SYMATTR Value 3.3
SYMATTR InstName Vin
SYMBOL res 16 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName Rbias
SYMATTR Value 665
SYMBOL ADR5043 208 144 R0
SYMATTR InstName U1
SYMBOL res 448 96 R0
SYMATTR InstName Rload
SYMATTR Value 10k
FLAG -80 64 IN
FLAG -80 256 0
FLAG 464 64 OUT
TEXT -88 -32 Left 2 !.dc TEMP -40 125 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\6cc2b839da46_flyback.asc
* Generated by LTspice 26.0.1 for Windows.
V2 A B PULSE(0 5 0 1n 1n {Duty/F} {1/F})
K1 L1 L2 1
L1 N005 N003 {Lm}
D1 N005 N004 D
R1 N002 0 {R}
V1 N003 0 {Vs}
S1 0 N004 A B SW
D2 N001 N002 D
L2 N001 0 {Lm/(N1_N2*N1_N2)}
C1 N002 0 {C} IC=3.5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.param Vs=24
.param R=5
.param C=200u
.param F=40k
.param N1_N2 = 3
.param Lm = 500u
.param Duty=0.385
.model SW SW (Ron=0.05 Roff=10Meg Vt=0.1 Vh=0)
.model D D(Ron=1n Roff=1Meg Vfwd=0)
.tran 0 {(1/F)*1000} 0 5u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 764
WIRE 448 112 432 112
WIRE 528 112 512 112
WIRE 288 128 -32 128
WIRE 432 128 432 112
WIRE 432 128 384 128
WIRE 448 128 432 128
WIRE 528 128 528 112
WIRE 528 128 512 128
WIRE 560 128 528 128
WIRE 720 128 560 128
WIRE 560 208 560 128
WIRE 720 208 720 128
WIRE -32 224 -32 128
WIRE 288 224 288 128
WIRE 384 224 384 128
WIRE -32 368 -32 304
WIRE 0 368 -32 368
WIRE -32 384 -32 368
WIRE 0 384 0 368
WIRE 96 384 0 384
WIRE 192 384 176 384
WIRE 288 384 288 304
WIRE 304 384 288 384
WIRE 384 384 384 304
WIRE 448 384 384 384
WIRE 560 384 560 272
WIRE 560 384 448 384
WIRE 720 384 720 288
WIRE 720 384 560 384
WIRE 192 400 192 384
WIRE 288 400 288 384
WIRE 288 400 256 400
SYMBOL Voltage -32 208 R0
SYMATTR InstName V1
SYMATTR Value {Vs}
SYMBOL Diode 448 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 -29 30 VBottom 2
SYMATTR InstName D2
SYMBOL Cap 544 208 R0
WINDOW 39 24 78 Left 2
SYMATTR InstName C1
SYMATTR Value {C}
SYMATTR SpiceLine IC=3.5
SYMBOL Diode 256 384 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMBOL ind2 304 320 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value {Lm}
SYMATTR Type ind
SYMBOL sw 80 384 R270
SYMATTR InstName S1
SYMBOL ind2 368 208 R0
WINDOW 3 -9 214 Left 1
SYMATTR InstName L2
SYMATTR Value {Lm/(N1_N2*N1_N2)}
SYMATTR Type ind
SYMBOL Voltage 480 624 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1n 1n {Duty/F} {1/F})
SYMBOL Res 704 192 R0
SYMATTR InstName R1
SYMATTR Value {R}
FLAG -32 384 0
FLAG 464 624 A
FLAG 160 432 A
FLAG 112 432 B
FLAG 384 624 B
FLAG 448 384 0
TEXT -56 504 Left 2 !.param Vs=24\n.param R=5\n.param C=200u\n.param F=40k\n.param N1_N2 = 3\n.param Lm = 500u\n.param Duty=0.385
TEXT 248 96 Left 2 !K1 L1 L2 1
TEXT -136 728 Left 2 !.model SW SW (Ron=0.05 Roff=10Meg Vt=0.1 Vh=0)\n.model D D(Ron=1n Roff=1Meg Vfwd=0)
TEXT -128 688 Left 2 !.tran 0 {(1/F)*1000} 0 5u
* Z:\home\khalils\Downloads\files\data\raw_asc\298886ce3f08_ADG7421F.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nThis part is modeled at 3 V supply operation\nCrosstalk is not included
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG7421F.asy)
V4 N006 0 2.5
XU1 N001 N004 N007 0 N005 N002 N003 ADG7421F ;pnba Vdd)IN1)Vss)GND)FF)S1)D1
V1 N001 0 2.5
V3 N004 0 PULSE(0 1.5 0 10u 10u 10m 20m)
V5 N002 0 1.5
C2 N003 0 36p
V2 N007 0 -2.5
R1 N005 N006 1k
C1 N005 0 10p
R3 N003 0 301
.tran 120m
.lib ADG7421F.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1160 936
WIRE 272 -32 -224 -32
WIRE -224 -16 -224 -32
WIRE 272 32 272 -32
WIRE -224 80 -224 64
WIRE 112 112 -224 112
WIRE 672 112 432 112
WIRE 768 112 672 112
WIRE -224 128 -224 112
WIRE 672 128 672 112
WIRE 768 128 768 112
WIRE -224 224 -224 208
WIRE 672 224 672 208
WIRE 768 224 768 192
WIRE 112 240 -32 240
WIRE 480 240 432 240
WIRE 512 240 480 240
WIRE 624 240 592 240
WIRE 480 272 480 240
WIRE 624 272 624 240
WIRE -32 336 -32 240
WIRE -32 336 -224 336
WIRE 480 352 480 336
WIRE -224 368 -224 336
WIRE 624 368 624 352
WIRE 320 432 320 416
WIRE 224 448 224 416
WIRE -224 464 -224 448
WIRE 224 544 224 528
SYMBOL ADG7421F 272 224 R0
SYMATTR InstName U1
SYMBOL voltage 624 256 R0
WINDOW 3 26 94 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 2.5
SYMATTR InstName V4
SYMBOL res 496 256 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 656 112 R0
SYMATTR InstName R3
SYMATTR Value 301
SYMBOL voltage 224 432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL voltage -224 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL cap 464 272 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL cap 752 128 R0
SYMATTR InstName C2
SYMATTR Value 36p
SYMBOL voltage -224 352 M0
WINDOW 3 -416 90 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -58 27 Left 2
SYMATTR Value PULSE(0 1.5 0 10u 10u 10m 20m)
SYMATTR InstName V3
SYMBOL voltage -224 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 1.5
FLAG 224 544 0
FLAG -224 80 0
FLAG -224 464 0
FLAG 320 432 0
FLAG 480 352 0
FLAG 624 368 0
FLAG -224 224 0
FLAG 768 224 0
FLAG 672 224 0
TEXT -232 536 Left 2 !.tran 120m
TEXT 424 496 Left 2 ;Note:\nThis part is modeled at 3 V supply operation\nCrosstalk is not included
* Z:\tmp\asc_dec_bjh7r6w2\06d122a902dd_CPL_AND_NAND_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
M4 B N001 N003 0 NMOS
M3 B1 N001 N002 0 NMOS
A2 N003 0 0 0 0 NAND 0 0 BUF
M1 A1 B N002 0 NMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 512 64 512 48
WIRE 96 144 32 144
WIRE 464 144 96 144
WIRE 288 240 288 48
WIRE 656 240 656 64
WIRE 240 320 32 320
WIRE 608 320 240 320
WIRE 144 352 144 160
WIRE 208 352 144 352
WIRE 288 352 288 336
WIRE 288 352 208 352
WIRE 512 352 512 160
WIRE 576 352 512 352
WIRE 656 352 656 336
WIRE 656 352 576 352
WIRE 208 384 208 352
WIRE 576 384 576 352
SYMBOL nmos4 608 240 R0
SYMATTR InstName M4
SYMBOL nmos4 240 240 R0
SYMATTR InstName M3
SYMBOL Digital\\inv 640 384 R90
SYMATTR InstName A2
SYMBOL nmos4 96 64 R0
SYMATTR InstName M1
FLAG 144 112 0
FLAG 512 112 0
FLAG 288 288 0
FLAG 656 288 0
FLAG 512 48 A
FLAG 656 64 B
FLAG 32 144 B
FLAG 144 64 A1
FLAG 288 48 B1
FLAG 576 448 NAND
* Z:\tmp\asc_dec_bjh7r6w2\16e65830893f_Isolation_detection_v1_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
S2 chassis p N005 0 MYSW
V2 N006 N007 PWL(0 0 {n_short_time} 0 {n_short_time + .1m} 5 {n_short_time + 5m} 0)
XU2 N003 out 3v3 0 out opax320 ;pnba In+)In-)V+)V-)OUT
V4 3v3 0 3.3
R1 chassis N004 10Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3232 11196
WIRE 416 64 416 0
WIRE 416 192 416 144
WIRE 448 192 416 192
WIRE 512 192 448 192
WIRE 608 192 592 192
WIRE 768 208 608 208
WIRE 416 240 416 192
WIRE 1136 256 864 256
WIRE 864 320 864 256
WIRE 912 320 864 320
WIRE 1104 336 976 336
WIRE 1136 336 1136 256
WIRE 1136 336 1104 336
WIRE 768 352 768 208
WIRE 912 352 768 352
WIRE 416 368 416 320
WIRE 1120 704 784 704
WIRE 1168 736 1168 688
WIRE 1120 752 1120 704
WIRE 784 832 784 816
WIRE 992 832 784 832
WIRE 1120 832 1120 800
WIRE 1120 832 992 832
WIRE 1168 864 1168 816
WIRE 1120 992 784 992
WIRE 784 1024 784 992
WIRE 1168 1024 1168 976
WIRE 1120 1040 1120 992
WIRE 784 1120 784 1104
WIRE 992 1120 784 1120
SYMBOL sw 1168 832 M180
SYMATTR InstName S2
SYMATTR Value MYSW
SYMBOL voltage 784 1008 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 0 {n_short_time} 0 {n_short_time + .1m} 5 {n_short_time + 5m} 0)
SYMBOL Opamps\\opamp2 944 272 R0
SYMATTR InstName U2
SYMATTR Value opax320
SYMBOL voltage 896 -304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 3.3
SYMBOL res 400 224 R0
SYMATTR InstName R1
SYMATTR Value 10Meg
FLAG 992 832 0
FLAG 1168 688 p
FLAG 896 -208 0
FLAG 896 -288 3v3
FLAG 944 368 0
FLAG 944 304 3v3
FLAG 1104 336 out
FLAG 448 192 chassis
FLAG 1168 864 chassis
FLAG 1168 976 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADGS1412.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1412.asy)
V2 -V 0 -15
XU1 IN S D -V +V 0 ADG1412 ;pnba IN)S)D)Vss)Vdd)GND
V4 IN 0 pulse(0 3.3 0 1u 1u 5m 10m)
V1 +V 0 15
R1 D 0 1K
V3 S 0 sine(0 5 1K)
.tran 30m
.lib ADG1412.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2844 1336
WIRE -96 -160 -112 -160
WIRE -112 -128 -112 -160
WIRE -640 -112 -656 -112
WIRE -656 -80 -656 -112
WIRE -240 -48 -512 -48
WIRE -208 -48 -240 -48
WIRE 48 -48 -16 -48
WIRE 48 -16 48 -48
WIRE -512 0 -512 -48
WIRE -656 16 -656 0
WIRE -240 16 -336 16
WIRE -208 16 -240 16
WIRE -640 80 -656 80
WIRE 48 80 48 64
WIRE -336 96 -336 16
WIRE -656 112 -656 80
WIRE -512 112 -512 80
WIRE -48 144 -48 128
WIRE -176 160 -176 128
WIRE -176 160 -192 160
WIRE -656 208 -656 192
WIRE -336 240 -336 176
SYMBOL voltage -656 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -512 -16 R0
SYMATTR InstName V3
SYMATTR Value sine(0 5 1K)
SYMBOL voltage -656 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage -336 80 R0
WINDOW 3 19 116 Left 2
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMATTR InstName V4
SYMBOL ADG1412 -112 0 R0
SYMATTR InstName U1
FLAG -656 208 0
FLAG -656 16 0
FLAG -640 -112 +V
FLAG -640 80 -V
FLAG -512 112 0
FLAG -192 160 -V
FLAG -96 -160 +V
FLAG -48 144 0
FLAG -336 240 0
FLAG 48 80 0
FLAG -240 -48 S
FLAG 48 -48 D
FLAG -240 16 IN
TEXT 16 160 Left 2 !.tran 30m