Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\00d749119bb8_Circuit_4_2HP_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
XHP N003 U_aH +3.3V 0 U_aH level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
XU1 N002 vGND +3.3V 0 vGND level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R2 N002 0 33k
* Library below included based on ModelFile attribute of instance XHP, XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1892 1884
WIRE 208 -16 64 -16
WIRE 208 16 208 -16
WIRE 448 16 272 16
WIRE 64 128 64 -16
WIRE 272 144 272 16
WIRE 304 144 272 144
WIRE 448 160 448 16
WIRE 448 160 368 160
WIRE 480 160 448 160
WIRE 208 176 208 96
WIRE 304 176 208 176
WIRE 208 224 208 176
WIRE 336 224 336 192
WIRE 64 368 64 208
WIRE 208 368 208 304
WIRE 208 368 64 368
WIRE 64 384 64 368
WIRE 464 1328 16 1328
WIRE 256 1456 128 1456
WIRE 320 1456 256 1456
WIRE -80 1472 -112 1472
WIRE 16 1472 16 1328
WIRE 16 1472 -80 1472
WIRE 64 1472 16 1472
WIRE 176 1488 128 1488
WIRE 256 1520 256 1456
WIRE 16 1600 16 1472
WIRE 176 1600 176 1488
WIRE 176 1600 16 1600
WIRE 176 1648 176 1600
SYMBOL OpAmps\\UniversalOpAmp2 96 1472 R180
SYMATTR InstName HP
SYMBOL OpAmps\\UniversalOpAmp2 336 160 R0
SYMATTR InstName U1
SYMBOL res 192 208 R0
SYMATTR InstName R2
SYMATTR Value 33k
FLAG 336 224 0
FLAG 336 128 +3.3V
FLAG 64 384 0
FLAG 480 160 vGND
FLAG 96 1504 +3.3V
FLAG 96 1440 0
FLAG 256 1600 vGND
FLAG -80 1472 U_aH
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3406AB.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3406AB.asy)
XU1 IN 0 N001 IN N002 LTC3406AB ;pnba Run)GND)SW)Vin)FB
R3 OUT 0 10
V1 IN 0 3.5
L1 N001 OUT 2.2
R2 N002 0 309K
R1 OUT N002 619K
C2 OUT 0 10
C1 OUT N002 22p
.tran 1.25m startup
.lib LTC3406AB.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1064 700
WIRE 192 64 96 64
WIRE 352 64 192 64
WIRE 96 80 96 64
WIRE 352 80 352 64
WIRE 192 144 192 64
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 624 144 592 144
WIRE 720 144 624 144
WIRE 816 144 720 144
WIRE 928 144 816 144
WIRE 816 160 816 144
WIRE 928 160 928 144
WIRE 96 176 96 160
WIRE 624 176 624 144
WIRE 720 176 720 144
WIRE 816 256 816 224
WIRE 928 256 928 240
WIRE 624 304 624 256
WIRE 624 304 496 304
WIRE 720 304 720 240
WIRE 720 304 624 304
WIRE 624 320 624 304
WIRE 352 384 352 368
WIRE 624 416 624 400
SYMBOL cap 704 176 R0
SYMATTR InstName C1
SYMATTR Value 22p
SYMBOL RES 912 144 R0
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL VOLTAGE 96 64 R0
SYMATTR InstName V1
SYMATTR Value 3.5
SYMBOL PowerProducts\\LTC3406AB 352 224 R0
SYMATTR InstName U1
SYMBOL res 608 160 R0
SYMATTR InstName R1
SYMATTR Value 619K
SYMBOL polcap 800 160 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL res 608 304 R0
SYMATTR InstName R2
SYMATTR Value 309K
FLAG 96 176 0
FLAG 352 384 0
FLAG 816 256 0
FLAG 928 256 0
FLAG 928 144 OUT
FLAG 624 416 0
FLAG 96 64 IN
TEXT 744 392 Left 2 !.tran 1.25m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3ca8a9fc3ff6_Parte3.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vout N002 0 N003 N_1u l=1.5u w=9.23u
Vdd N001 0 5
Rd N001 Vout 10k
Vgs N002 0 SINE(0 200m 1k)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include cmosedu_models.txt
.dc Vgs 0 5 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 -160 144 -160
WIRE 144 -144 144 -160
WIRE 192 -96 144 -96
WIRE 288 -16 288 -160
WIRE 288 -16 192 -16
WIRE 144 16 144 -96
WIRE 144 128 144 96
WIRE 224 128 144 128
WIRE 64 176 -32 176
WIRE 176 176 144 176
WIRE 64 208 64 176
WIRE 96 208 64 208
WIRE 176 208 176 176
WIRE 176 208 144 208
WIRE 144 272 144 224
WIRE -32 304 -32 256
SYMBOL nmos4 96 128 R0
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=1.5u w=9.23u
SYMBOL voltage 192 -112 R0
SYMATTR InstName Vdd
SYMATTR Value 5
SYMBOL voltage -32 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vgs
SYMATTR Value SINE(0 200m 1k)
SYMBOL res 128 0 R0
SYMATTR InstName Rd
SYMATTR Value 10k
FLAG -32 304 0
FLAG 144 272 0
FLAG 144 -144 0
FLAG 224 128 Vout
TEXT -240 -32 Left 2 !.include cmosedu_models.txt
TEXT -242 328 Left 2 !.dc Vgs 0 5 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\22ba57e37557_transmission_char.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 d 1e3
V2 g 0 1
M1 d g 0 0 NMOS l=32e-9 w=320e-9 ad=51200e-18 as=51200e-18 pd=960e-9 ps=960e-9
V1 N001 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 0 2.5 1e-2 V1 0 2 0.4
.inc 32nm_bulk.pm
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 480 -16 192 -16
WIRE 480 48 480 -16
WIRE 192 112 192 64
WIRE 192 144 192 112
WIRE 240 192 192 192
WIRE 96 224 0 224
WIRE 144 224 96 224
WIRE 192 304 192 240
WIRE 192 304 0 304
WIRE 240 304 240 192
WIRE 240 304 192 304
WIRE 336 304 240 304
WIRE 480 304 480 128
WIRE 480 304 336 304
WIRE 336 352 336 304
SYMBOL voltage 0 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL res 176 -32 R0
SYMATTR InstName R1
SYMATTR Value 1e3
SYMBOL voltage 480 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL nmos4 144 144 R0
SYMATTR InstName M1
SYMATTR Value2 l=32e-9 w=320e-9 ad=51200e-18 as=51200e-18 pd=960e-9 ps=960e-9
FLAG 336 352 0
FLAG 192 112 d
FLAG 96 224 g
TEXT -32 376 Left 2 !.dc V2 0 2.5 1e-2 V1 0 2 0.4
TEXT -40 416 Left 2 !.inc 32nm_bulk.pm
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4091.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4091.asy)
V1 +V 0 15
XU1 IN N001 +V -V OUT ADA4091 ;pnba In+)In-)V+)V-)OUT
Rload OUT 0 10K
R1 N001 0 10K
Vin IN 0 SINE(0 1 10K)
R2 OUT N001 10K
V2 -V 0 -15
.tran 1m
.lib ADA4091.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 416 -1232 400 -1232
WIRE 528 -1232 496 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1168 144 -1184
WIRE 256 -1168 256 -1184
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 144 -1072 144 -1088
WIRE 256 -1072 256 -1088
WIRE 432 -1072 432 -1088
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL res 512 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage 144 -1184 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL Opamps\\ADA4091 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 256 -1184 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
FLAG 144 -1184 +V
FLAG 256 -1072 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1184 -V
FLAG 576 -1072 -V
FLAG 400 -1232 0
FLAG 768 -992 0
FLAG 144 -1072 0
TEXT 712 -952 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\14b87a197138_1_Zadatak_Lab3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 in 0 10
D1 out 0 1N4148
R1 out in 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.step temp list -75 0 25 125
.dc V1 0 1 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 64 16 64
WIRE 416 64 256 64
WIRE 16 128 16 64
WIRE 416 144 416 64
WIRE 16 256 16 208
WIRE 224 256 16 256
WIRE 416 256 416 208
WIRE 416 256 224 256
WIRE 224 288 224 256
SYMBOL diode 400 144 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 272 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage 16 112 R0
SYMATTR InstName V1
SYMATTR Value 10
FLAG 224 288 0
FLAG 416 64 out
FLAG 16 64 in
TEXT -176 272 Left 2 !.step temp list -75 0 25 125
TEXT -178 312 Left 2 !.dc V1 0 1 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\OP227.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP227.asy)
R2 OUT N001 1K
V2 -V 0 -15
R1 N001 0 1K
V1 +V 0 15
Rload OUT 0 10K
Vin IN 0 SINE(0 1 10K)
XU1 IN N001 +V -V OUT OP27 ;pnba In+)In-)V+)V-)OUT
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 144 -1168 144 -1184
WIRE 256 -1168 256 -1184
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 144 -1072 144 -1088
WIRE 256 -1072 256 -1088
WIRE 432 -1072 432 -1088
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 256 -1184 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 144 -1184 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL opamps\\OP227 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
FLAG 144 -1184 +V
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1184 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 256 -1072 0
FLAG 144 -1072 0
TEXT 784 -896 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1764-1.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1764-1.3.asy)
C1 N004 0 1
R2 N001 IN 50K
R1 OUT 0 .8
C2 N003 0 10n
C3 N002 0 1
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1764 Radj=8695.65 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
V1 IN 0 1.6
C4 OUT 0 10
.tran 1m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value .8
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL ADP1764-1.3 224 176 R0
SYMATTR InstName U1
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.6
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\36fa21d5f8a7_Example-of-DC-sweep.asc
* Generated by LTspice 26.0.1 for Windows.
* Example of DC sweep in LTSpice
V1 N001 0
R1 N002 N001 1k
D1 N002 0 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -10 10 3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 80 80 80
WIRE 272 80 240 80
WIRE 80 112 80 80
WIRE 272 128 272 80
WIRE 80 224 80 192
WIRE 272 224 272 192
SYMBOL diode 256 128 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 256 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 80 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value ""
FLAG 80 224 0
FLAG 272 224 0
TEXT 344 72 Left 2 !.dc V1 -10 10 3
TEXT 128 -8 Left 2 ;Example of DC sweep in LTSpice
* Z:\home\khalils\Downloads\files\data\raw_asc\178f7a0bf4bc_HWrecFiltt.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N003 0 2m
L2 N002 0 .01
K1 L1 L2 1.
L1 N001 0 1
D1 N002 N003 MUR460
R1 N003 0 100
V1 N001 0 SINE(0 170 60) Rser=.01
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 33.33e-3
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 160 -16 160
WIRE 192 160 176 160
WIRE 272 160 256 160
WIRE 320 160 272 160
WIRE -16 176 -16 160
WIRE 80 176 80 160
WIRE 176 176 176 160
WIRE 320 176 320 160
WIRE 272 192 272 160
WIRE -16 288 -16 256
WIRE 80 288 80 256
WIRE 176 288 176 256
WIRE 272 288 272 256
WIRE 320 288 320 256
SYMBOL ind2 64 160 R0
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR Type ind
SYMBOL diode 192 144 M90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName D1
SYMATTR Value MUR460
SYMBOL ind2 192 160 M0
SYMATTR InstName L2
SYMATTR Value .01
SYMATTR Type ind
SYMBOL res 304 160 R0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL cap 256 192 R0
SYMATTR InstName C1
SYMATTR Value 2m
SYMBOL voltage -16 160 R0
WINDOW 3 -204 56 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 -204 84 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 170 60)
SYMATTR SpiceLine Rser=.01
FLAG -16 288 0
FLAG 80 288 0
FLAG 176 288 0
FLAG 320 288 0
FLAG 272 288 0
TEXT 56 352 Left 0 !.tran 33.33e-3
TEXT 64 120 Left 0 !K1 L1 L2 1.
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4120B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4120B.asy)
R1 GATE N004 5
V3 N003 0 PULSE(0 5 0 2n 2n 998n 2u)
V2 N002 0 15
XU1 N001 N003 0 0 N004 N002 ADuM4120xx Glitch=1 Vrun2=7.2 ;pnba Vdd1)Vin)GND1)GND2)Vout)Vdd2
V1 N001 0 5
C1 GATE 0 2n
.tran 10u
.lib ADuM4120xx.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 16 0 16
WIRE 512 16 320 16
WIRE 0 32 0 16
WIRE 512 32 512 16
WIRE 160 48 160 16
WIRE 320 48 320 16
WIRE 0 128 0 112
WIRE 512 128 512 112
WIRE 112 160 -64 160
WIRE 400 160 368 160
WIRE 512 160 480 160
WIRE 544 160 512 160
WIRE 512 176 512 160
WIRE 160 288 160 272
WIRE 320 288 320 272
SYMBOL ADuM4120B 240 160 R0
SYMATTR InstName U1
SYMBOL voltage 512 16 R0
WINDOW 0 29 30 Left 2
WINDOW 3 31 84 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage 0 16 R0
WINDOW 0 25 25 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 496 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 5
SYMBOL voltage -48 160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 2n 2n 998n 2u)
SYMBOL cap 496 176 R0
WINDOW 0 35 16 Left 2
WINDOW 3 36 51 Left 2
SYMATTR InstName C1
SYMATTR Value 2n
FLAG 160 288 0
FLAG 320 288 0
FLAG 512 240 0
FLAG 544 160 GATE
FLAG 512 128 0
FLAG 0 128 0
FLAG -144 160 0
TEXT 400 280 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\1a9bd3806384_Draft2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N003 220000
R2 N002 0 1000
M2 N003 N004 0 0 NMOS
V1 N001 0 18
M1 N002 N003 N001 N001 PMOS
V2 N004 0 PULSE(0 3 1 0 0 1 1)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 304 -176 144 -176
WIRE 384 -176 304 -176
WIRE 576 -176 480 -176
WIRE 304 -144 304 -176
WIRE 576 -48 576 -176
WIRE 304 -32 304 -64
WIRE 400 -32 400 -128
WIRE 400 -32 304 -32
WIRE 400 -16 400 -32
WIRE 144 16 144 -176
WIRE 352 64 288 64
WIRE 288 96 288 64
WIRE 144 144 144 96
WIRE 400 144 400 80
WIRE 576 144 576 32
WIRE 288 208 288 176
SYMBOL res 288 -160 R0
SYMATTR InstName R1
SYMATTR Value 220000
SYMBOL res 560 -64 R0
SYMATTR InstName R2
SYMATTR Value 1000
SYMBOL voltage 144 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 18
SYMBOL nmos 352 -16 R0
SYMATTR InstName M2
SYMBOL voltage 288 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 3 1 0 0 1 1)
SYMBOL pmos 480 -128 M270
SYMATTR InstName M1
FLAG 144 144 0
FLAG 400 144 0
FLAG 576 144 0
FLAG 288 208 0
* Z:\home\khalils\Downloads\files\data\raw_asc\2a9269e45933_Fig14_2.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot log10(Id(M1))
VGS VGS 0 0
M1 VDD VGS 0 0 N_50n l=50n w=500n
VDD VDD 0 1
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VGS 0 1
.include cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3172 680
WIRE 576 -304 448 -304
WIRE 704 -304 576 -304
WIRE 448 -256 448 -304
WIRE 704 -224 704 -304
WIRE 272 -176 192 -176
WIRE 400 -176 272 -176
WIRE 192 -160 192 -176
WIRE 448 -112 448 -160
WIRE 704 -112 704 -144
WIRE 192 -32 192 -80
SYMBOL nmos4 400 -256 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 192 -176 R0
WINDOW 3 37 90 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value 0
SYMATTR InstName VGS
SYMBOL voltage 704 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
FLAG 448 -208 0
FLAG 704 -112 0
FLAG 576 -304 VDD
FLAG 448 -112 0
FLAG 192 -32 0
FLAG 272 -176 VGS
TEXT 304 -56 Left 0 !.dc VGS 0 1
TEXT 304 -32 Left 0 !.include cmosedu_models.txt
TEXT 216 -280 Left 0 ;Plot log10(Id(M1))
* Z:\home\khalils\Downloads\files\data\raw_asc\33b0a869ae3d_R2.asc
* Generated by LTspice 26.0.1 for Windows.
VinP N001 0 0 AC 1
vdp dp 0
vdd sp 0 1.1367383
M_P dp N001 sp sp P_1u l={Lp2} w={Wp2}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc cmosedu_models.txt
.dc vdp -2.5 2.5 0.0001
.meas id_p_1 FIND Id(M_P) AT -1.3427744+0.05
.meas id_p_2 FIND Id(M_P) AT -1.3427744-0.05
.param Wp=49.992332u Lp=49.986531u Wp2=49.998294u Lp2=9.069192u Wn=41.548244u Ln=47.775368u Wn2=49.906981u Ln2=28.964298u C=0.100001p Iref=10892.687537n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1932 680
WIRE 512 -48 512 -128
WIRE 592 -48 512 -48
WIRE 464 -32 336 -32
WIRE -16 -16 -16 -48
WIRE 160 -16 160 -48
WIRE 336 -16 336 -32
WIRE 592 0 592 -48
WIRE 592 0 512 0
WIRE 512 80 512 48
WIRE -16 128 -16 64
WIRE 160 128 160 64
WIRE 336 128 336 64
SYMBOL voltage -16 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 25 97 Left 2
SYMATTR Value 1.1367383
SYMATTR InstName vdd
SYMBOL voltage 336 -32 R0
WINDOW 3 25 87 Left 2
WINDOW 123 25 115 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMATTR InstName inP
SYMBOL voltage 160 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 24 44 Left 2
SYMATTR Value ""
SYMATTR InstName vdp
SYMBOL pmos4 464 48 M180
SYMATTR InstName M_P
SYMATTR Value P_1u
SYMATTR Value2 l={Lp2} w={Wp2}
FLAG 512 -128 sp
FLAG 336 128 0
FLAG 160 128 0
FLAG 160 -48 dp
FLAG 512 80 dp
FLAG -16 128 0
FLAG -16 -48 sp
TEXT -48 224 Left 2 !.inc cmosedu_models.txt
TEXT -48 272 Left 2 !.dc vdp -2.5 2.5 0.0001
TEXT -48 176 Left 2 !.meas id_p_1 FIND Id(M_P) AT -1.3427744+0.05
TEXT -48 200 Left 2 !.meas id_p_2 FIND Id(M_P) AT -1.3427744-0.05
TEXT -264 248 Left 2 !.param Wp=49.992332u Lp=49.986531u Wp2=49.998294u Lp2=9.069192u Wn=41.548244u Ln=47.775368u Wn2=49.906981u Ln2=28.964298u C=0.100001p Iref=10892.687537n
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4352.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4352.asy)
XU1 N001 N005 N005 0 N006 N007 0 N002 0 N003 N004 N001 LTC4352 ;pnba Vin)Vcc)UV)OV)_Status)_Fault)Rev)Out)GND)CPO)Gate)Source
C2 N003 N001 .1
V2 N008 0 PULSE(0 5 1m 45m 45m 100m 200m)
C1 0 N005 .1
MQ1 N002 N004 N001 N001 Si4864DY
R2 N002 N007 100K
D1 N008 N002 MBR735
R1 N002 N006 100K
Rload N002 0 3
C3 0 N002 100
V1 N001 0 PULSE(0 12 1m 30m 65m 10m 200m)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100m
.lib LTC4352.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1608 1284
WIRE 672 0 0 0
WIRE 784 0 672 0
WIRE 880 0 784 0
WIRE 1008 0 976 0
WIRE 1104 0 1008 0
WIRE 1200 0 1104 0
WIRE 1296 0 1200 0
WIRE 0 16 0 0
WIRE 1200 48 1200 0
WIRE 576 64 560 64
WIRE 672 64 672 0
WIRE 672 64 640 64
WIRE 0 112 0 96
WIRE 560 128 560 64
WIRE 672 128 672 64
WIRE 784 128 784 0
WIRE 896 128 896 48
WIRE 1008 128 1008 0
WIRE 1104 160 1104 0
WIRE 464 192 368 192
WIRE 496 192 464 192
WIRE 368 208 368 192
WIRE 1296 256 1296 0
WIRE 1360 256 1296 256
WIRE 1488 256 1360 256
WIRE 464 272 464 192
WIRE 496 272 464 272
WIRE 1104 272 1104 240
WIRE 1104 272 1072 272
WIRE 1360 272 1360 256
WIRE 1488 272 1488 256
WIRE 368 288 368 272
WIRE 496 352 464 352
WIRE 1200 352 1200 128
WIRE 1200 352 1072 352
WIRE 1360 368 1360 336
WIRE 1488 368 1488 352
WIRE 464 432 464 352
WIRE 496 432 464 432
WIRE 464 480 464 432
WIRE 784 496 784 464
WIRE 800 560 448 560
WIRE 1296 560 1296 256
WIRE 1296 560 864 560
WIRE 448 576 448 560
WIRE 448 672 448 656
SYMBOL cap 576 48 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL res 1184 32 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL nmos 976 48 M270
WINDOW 0 85 40 VTop 2
WINDOW 3 68 93 VLeft 2
SYMATTR InstName Q1
SYMATTR Value Si4864DY
SYMBOL LTC4352 784 304 R0
WINDOW 0 4 -51 Center 2
WINDOW 3 10 70 Center 2
SYMATTR InstName U1
SYMBOL res 1472 256 R0
SYMATTR InstName Rload
SYMATTR Value 3
SYMBOL res 1088 144 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL voltage 448 560 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 5 1m 45m 45m 100m 200m)
SYMATTR InstName V2
SYMBOL schottky 800 576 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBR735
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 1344 336 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value 100
SYMBOL voltage 0 0 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 12 1m 30m 65m 10m 200m)
SYMATTR InstName V1
SYMBOL cap 352 272 M180
WINDOW 0 24 64 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value .1
FLAG 0 112 0
FLAG 1488 368 0
FLAG 368 288 0
FLAG 464 480 0
FLAG 784 496 0
FLAG 448 672 0
FLAG 1360 368 0
TEXT 1344 624 Left 2 !.tran 100m