Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\055c327d6dc0_nand.asc
* Generated by LTspice 26.0.1 for Windows.
M1 out in1 vdd N001 PMOS l=90n w=400n
M2 out in2 vdd N002 PMOS l=90n w=400n
M3 out in1 P001 0 NMOS l=90n w=200n
M5 P001 in2 0 N003 NMOS l=90n w=200n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 -208 -176 -208
WIRE -64 -176 -64 -240
WIRE 80 -176 80 -240
WIRE -144 -160 -208 -160
WIRE -112 -160 -144 -160
WIRE 16 -160 16 -208
WIRE 32 -160 16 -160
WIRE -64 -128 -64 -160
WIRE 80 -128 80 -160
WIRE -176 -64 -176 -208
WIRE -176 -64 -208 -64
WIRE -64 -48 -64 -80
WIRE 0 -48 -64 -48
WIRE 80 -48 80 -80
WIRE 80 -48 0 -48
WIRE 176 -48 80 -48
WIRE 0 -16 0 -48
WIRE 80 32 0 32
WIRE -144 64 -144 -160
WIRE -48 64 -144 64
WIRE -176 160 -176 -64
WIRE -48 160 -176 160
WIRE 0 160 0 128
WIRE 0 192 0 176
WIRE 80 192 80 32
WIRE 80 192 0 192
WIRE 0 240 0 192
FLAG -208 -160 in1
IOPIN -208 -160 In
FLAG -208 -64 in2
IOPIN -208 -64 In
FLAG 176 -48 out
IOPIN 176 -48 Out
FLAG 80 -240 vdd
IOPIN 80 -240 In
FLAG -64 -240 vdd
IOPIN -64 -240 In
FLAG 0 240 0
SYMBOL pmos4 -112 -80 M180
SYMATTR InstName M1
SYMATTR Value2 l=90n w=400n
SYMBOL pmos4 32 -80 M180
SYMATTR InstName M2
SYMATTR Value2 l=90n w=400n
SYMBOL nmos4 -48 -16 R0
SYMATTR InstName M3
SYMATTR Value2 l=90n w=200n
SYMBOL nmos4 -48 80 R0
SYMATTR InstName M5
SYMATTR Value2 l=90n w=200n
* Z:\home\khalils\Downloads\files\data\raw_asc\cbe275dc0224_ClaseD_FET.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N004 0 2
C1 N004 N003 24.5p
L1 N003 N002 5.51n Rser=0.1
SW2 N002 0 A 0 SW2
SW1 N001 N002 0 A SW1
VI N001 0 3
V1 A 0 PULSE(-2 2 0 0 0 1.1545n 2.309n)
.model SW1 SW(Ron=0.1, Roff=1Meg Vt=1)
.tran 0 50n 0 .1p
.model SW2 SW(Ron=0.1, Roff=1Meg Vt=-1)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -832 -656 -1328 -656
WIRE -832 -528 -832 -656
WIRE -880 -512 -1008 -512
WIRE -1328 -320 -1328 -656
WIRE -1008 -288 -1008 -512
WIRE -1008 -288 -1072 -288
WIRE -832 -288 -832 -448
WIRE -608 -288 -832 -288
WIRE -368 -288 -528 -288
WIRE -224 -288 -304 -288
WIRE -1072 -272 -1072 -288
WIRE -224 -176 -224 -288
WIRE -832 -112 -832 -288
WIRE -1008 -48 -1008 -288
WIRE -880 -48 -1008 -48
WIRE -1328 80 -1328 -240
WIRE -832 80 -832 -32
WIRE -832 80 -1328 80
WIRE -640 80 -832 80
WIRE -224 80 -224 -96
WIRE -224 80 -640 80
WIRE -640 96 -640 80
FLAG -144 -640 0
FLAG -144 -720 A
FLAG -640 96 0
FLAG -880 -464 0
FLAG -880 -96 0
FLAG -1072 -272 A
SYMBOL res -240 -192 R0
SYMATTR InstName R1
SYMATTR Value 2
SYMBOL cap -304 -304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 24.5p
SYMBOL ind -512 -304 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value 5.51n
SYMATTR SpiceLine Rser=0.1
SYMBOL sw -832 -128 R0
SYMATTR InstName SW2
SYMATTR Value SW2
SYMBOL sw -832 -544 R0
SYMATTR InstName SW1
SYMATTR Value SW1
SYMBOL voltage -1328 -336 R0
SYMATTR InstName VI
SYMATTR Value 3
SYMBOL voltage -144 -736 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(-2 2 0 0 0 1.1545n 2.309n)
TEXT -144 -584 Left 2 !.model SW1 SW(Ron=0.1, Roff=1Meg Vt=1)
TEXT -1360 120 Left 2 !.tran 0 50n 0 .1p
TEXT -144 -552 Left 2 !.model SW2 SW(Ron=0.1, Roff=1Meg Vt=-1)
* Z:\home\khalils\Downloads\files\data\raw_asc\107bb11397ec_1990.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N002 0 -V N003 OUT +V N001 LT1990 ;pnba REF)IN-)IN+)VEE)GAIN2)OUT)VCC)GAIN1
V3 N002 0 SINE(0 1 10K)
V1 +V 0 5
V2 -V 0 -5
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1990.asy)
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 112 144 80
WIRE 368 160 336 160
WIRE -32 192 -256 192
WIRE -256 208 -256 192
WIRE -32 224 -32 192
WIRE -16 224 -32 224
WIRE -496 240 -496 224
WIRE -384 240 -384 224
WIRE 384 240 336 240
WIRE -16 256 -32 256
WIRE 368 288 336 288
WIRE -256 304 -256 288
WIRE -32 304 -32 256
WIRE -32 304 -256 304
WIRE -256 320 -256 304
WIRE -496 336 -496 320
WIRE -384 336 -384 320
WIRE 80 432 80 400
WIRE 144 432 144 400
FLAG -256 320 0
FLAG -496 336 0
FLAG -384 336 0
FLAG 384 240 OUT
FLAG 80 432 0
FLAG -496 224 +V
FLAG -384 224 -V
FLAG 144 80 +V
FLAG 144 432 -V
SYMBOL LT1990 160 240 R0
SYMATTR InstName U1
SYMBOL voltage -256 192 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage -496 224 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -384 224 R0
SYMATTR InstName V2
SYMATTR Value -5
TEXT 368 352 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\180cfac0f3b6_Fig_4-29_STEP-regend.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 OUT {R}
C1 OUT 0 {C}
V1 N001 0 PULSE( 0 1 0.5m 1n 1n 2m 5m)
.tran 10m
.STEP param R 4k 6k 1k
.STEP param C list 22n 33n 47n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 80 32 80
WIRE 272 80 224 80
WIRE 304 80 272 80
WIRE 32 112 32 80
WIRE 304 112 304 80
WIRE 32 224 32 192
WIRE 304 224 304 176
SYMBOL voltage 32 96 R0
WINDOW 3 -4 160 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE( 0 1 0.5m 1n 1n 2m 5m)
SYMBOL cap 288 112 R0
SYMATTR InstName C1
SYMATTR Value {C}
SYMBOL res 128 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value {R}
FLAG 32 224 0
FLAG 272 80 OUT
FLAG 304 224 0
TEXT 16 32 Left 2 !.tran 10m
TEXT 24 288 Left 2 !.STEP param R 4k 6k 1k\n.STEP param C list 22n 33n 47n
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6752.asc
* Generated by LTspice 26.0.1 for Windows.
* Small differential input\nsignal with large common\nmode component
* High Speed Differential Line Receiver
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC6752.asy)
V1 N003 N001 SINE(0 100m 200Meg 0 0 90)
V2 N002 0 5
XU1 N003 N001 N002 0 Q LTC6752 ;pnba +In)-In)VCC)VEE)Q
B1 N001 0 V=.5+2.5*Random(time/50n)
.tran 500n
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1956 1060
WIRE 480 -272 480 -288
WIRE 336 -176 96 -176
WIRE 480 -160 480 -192
WIRE 336 -144 336 -176
WIRE 448 -144 336 -144
WIRE -128 -128 -160 -128
WIRE 96 -128 96 -176
WIRE 96 -128 -48 -128
WIRE 608 -128 512 -128
WIRE 448 -112 336 -112
WIRE 96 -80 96 -128
WIRE 176 -80 96 -80
WIRE 336 -80 336 -112
WIRE 336 -80 256 -80
WIRE 480 -80 480 -96
CIRCLE Normal 416 112 -288 -352 2
SYMBOL bv -32 -128 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName B1
SYMATTR Value V=.5+2.5*Random(time/50n)
SYMBOL LTC6752 480 -192 R0
SYMATTR InstName U1
SYMBOL voltage 272 -80 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value SINE(0 100m 200Meg 0 0 90)
SYMATTR InstName V1
SYMBOL voltage 480 -176 M180
WINDOW 123 24 -26 Left 2
WINDOW 39 24 -5 Left 2
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 5
FLAG 480 -288 0
FLAG 480 -80 0
FLAG 608 -128 Q
FLAG -160 -128 0
TEXT 496 -16 Left 2 !.tran 500n
TEXT 88 -184 Bottom 2 ;Small differential input\nsignal with large common\nmode component
TEXT 480 -360 Bottom 2 ;High Speed Differential Line Receiver
* Z:\home\khalils\Downloads\files\data\raw_asc\1a777516f1d7_1001S8.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
R1 N002 N001 10K
V3 IN 0 SINE(0 10 100)
D1 N002 N004 1N4148
R2 N001 IN 10K
R3 N005 N001 10K
R4 N003 N002 10K
R5 OUT N003 10K
D2 N004 N005 1N4148
XU1 0 N001 +V -V N004 LT1001 ;pnba In+)In-)V+)V-)OUT
XU2 N005 N003 +V -V OUT LT1001 ;pnba In+)In-)V+)V-)OUT
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
* Precision Absolute Value Circuit
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001S8.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -16 96 -128 96
WIRE 112 96 64 96
WIRE 160 96 112 96
WIRE 336 96 240 96
WIRE 384 96 336 96
WIRE 480 96 464 96
WIRE 496 96 480 96
WIRE 608 96 576 96
WIRE -128 112 -128 96
WIRE 336 128 336 96
WIRE -128 208 -128 192
WIRE 192 208 192 192
WIRE 528 208 528 192
WIRE 112 224 112 96
WIRE 160 224 112 224
WIRE 480 224 480 96
WIRE 496 224 480 224
WIRE 336 240 336 192
WIRE 336 240 224 240
WIRE 608 240 608 96
WIRE 608 240 560 240
WIRE 640 240 608 240
WIRE 160 256 144 256
WIRE 496 256 480 256
WIRE 192 288 192 272
WIRE 336 288 336 240
WIRE 528 288 528 272
WIRE -96 336 -96 320
WIRE 0 336 0 320
WIRE 112 384 112 224
WIRE 160 384 112 384
WIRE 336 384 336 352
WIRE 336 384 240 384
WIRE 480 384 480 256
WIRE 480 384 336 384
WIRE -96 432 -96 416
WIRE 0 432 0 416
FLAG 0 432 0
FLAG 192 192 +V
FLAG 0 320 +V
FLAG 192 288 -V
FLAG -96 432 0
FLAG -96 320 -V
FLAG -128 208 0
FLAG 528 192 +V
FLAG 528 288 -V
FLAG 144 256 0
FLAG -128 96 IN
FLAG 640 240 OUT
SYMBOL voltage 0 320 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -96 320 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -128 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 10 100)
SYMBOL diode 320 128 R0
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 80 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 256 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL res 480 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL res 592 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 10K
SYMBOL diode 320 288 R0
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL opamps\\LT1001S8 192 176 R0
SYMATTR InstName U1
SYMBOL opamps\\LT1001S8 528 176 R0
SYMATTR InstName U2
TEXT 536 352 Left 2 !.tran 30m
TEXT 256 40 Bottom 2 ;Precision Absolute Value Circuit
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4442-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4442-1.asy)
L1 N003 N006 1
C2 N006 0 10
D1 N001 N002 1N5819
V1 N001 0 7
MQ2 N003 N008 0 0 IRF7468
XU1 N005 N003 N008 0 N007 N001 N001 N002 LTC4442-1 ;pnba TG)TS)BG)GND)IN)Vlogic)Vcc)Boost
MQ1 N004 N005 N003 N003 IRF7468
C1 N003 N002 .1
R1 N006 0 .5
V3 N004 0 32
V2 N007 0 PULSE(0 5 0 10n 10n .1u 1u)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 100u startup
.lib LTC4442-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 900 680
WIRE 0 48 -48 48
WIRE 112 48 64 48
WIRE 176 48 112 48
WIRE 272 48 240 48
WIRE 496 80 336 80
WIRE 336 96 336 80
WIRE 496 96 496 80
WIRE 112 112 112 48
WIRE -48 176 -48 48
WIRE -48 176 -192 176
WIRE -16 176 -48 176
WIRE 288 176 240 176
WIRE -192 192 -192 176
WIRE 496 192 496 176
WIRE -48 256 -48 176
WIRE -16 256 -48 256
WIRE 272 256 272 48
WIRE 272 256 240 256
WIRE 336 256 336 192
WIRE 336 256 272 256
WIRE 384 256 336 256
WIRE 496 256 464 256
WIRE 576 256 496 256
WIRE 496 272 496 256
WIRE 576 272 576 256
WIRE -192 288 -192 272
WIRE -16 336 -112 336
WIRE 288 336 240 336
WIRE -112 368 -112 336
WIRE 336 368 336 352
WIRE 496 368 496 336
WIRE 576 368 576 352
WIRE 112 416 112 400
WIRE -112 464 -112 448
SYMBOL res 560 256 R0
SYMATTR InstName R1
SYMATTR Value .5
SYMBOL nmos 288 256 R0
SYMATTR InstName Q2
SYMATTR Value IRF7468
SYMBOL voltage -112 352 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 10n 10n .1u 1u)
SYMBOL voltage 496 80 R0
SYMATTR InstName V3
SYMATTR Value 32
SYMBOL schottky 0 64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5819
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL nmos 288 96 R0
SYMATTR InstName Q1
SYMATTR Value IRF7468
SYMBOL ind 368 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL PowerProducts\\LTC4442-1 112 256 R0
SYMATTR InstName U1
SYMBOL cap 480 272 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL cap 240 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage -192 176 R0
SYMATTR InstName V1
SYMATTR Value 7
FLAG 112 416 0
FLAG -112 464 0
FLAG -192 288 0
FLAG 336 368 0
FLAG 496 192 0
FLAG 496 368 0
FLAG 576 368 0
TEXT 304 432 Left 2 !.tran 100u startup
* Z:\tmp\asc_dec_bjh7r6w2\115671194443_2_bonus_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
C3 0 N001 {1/24}
C1 N002 N003 1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 400 64 368 64
WIRE 400 112 400 64
WIRE 464 112 400 112
WIRE 80 128 16 128
WIRE 160 128 144 128
WIRE 304 128 304 64
WIRE 304 128 160 128
WIRE 304 160 304 128
WIRE 400 160 400 112
WIRE 400 160 384 160
WIRE 16 176 16 128
WIRE 160 192 160 128
WIRE 464 192 464 112
WIRE 16 304 16 256
WIRE 160 304 160 272
WIRE 464 304 464 256
SYMBOL cap 480 256 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C3
SYMATTR Value {1/24}
SYMBOL cap 80 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1
FLAG 464 304 0
FLAG 160 304 0
FLAG 16 304 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1107-12.asc
* Generated by LTspice 26.0.1 for Windows.
L1 IN N001 33 Rser=0.02 Rpar=5000
D1 N001 OUT MBRS140
C1 OUT 0 100 Rser=0.02
V1 IN 0 6
XU1 IN IN N001 0 0 N002 N003 OUT LT1107 top=220K bot=25.5K ;pnba Ilim)Vin)SW1)SW2)GND)AO)SET)Sense
Rload OUT 0 30
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1107-12.asy)
.lib LT1107.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2488 1440
WIRE 1472 912 1280 912
WIRE 1600 912 1472 912
WIRE 1632 912 1600 912
WIRE 1744 912 1712 912
WIRE 1792 912 1744 912
WIRE 1920 912 1856 912
WIRE 2016 912 1920 912
WIRE 1280 928 1280 912
WIRE 2016 928 2016 912
WIRE 1472 960 1472 912
WIRE 1600 960 1600 912
WIRE 1280 1024 1280 1008
WIRE 1392 1024 1376 1024
WIRE 1744 1024 1744 912
WIRE 1744 1024 1680 1024
WIRE 2016 1024 2016 1008
WIRE 1920 1104 1920 912
WIRE 1920 1104 1680 1104
WIRE 1920 1120 1920 1104
WIRE 1392 1184 1376 1184
WIRE 1712 1184 1680 1184
WIRE 1920 1200 1920 1184
WIRE 1536 1264 1536 1248
FLAG 1536 1264 0
FLAG 1712 1184 0
FLAG 1920 1200 0
FLAG 1280 1024 0
FLAG 2016 1024 0
FLAG 2016 912 OUT
FLAG 1280 912 IN
SYMBOL IND 1616 928 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 33
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL schottky 1792 928 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS140
SYMBOL POLCAP 1904 1120 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL VOLTAGE 1280 912 R0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL PowerProducts\\LT1107-12 1536 1104 R0
SYMATTR InstName U1
SYMBOL res 2000 912 R0
SYMATTR InstName Rload
SYMATTR Value 30
TEXT 1768 1296 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG849.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nCharge Injection not included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG849.asy)
C1 N002 0 36p
V4 +V 0 5
V3 N004 0 PULSE(0 5 25u 20n 20n 25u)
R1 N002 0 49.9
V2 N003 0 5
V1 N001 0 0
XU1 N004 N001 N002 N003 +V 0 ADG849 ;pnba IN)SA)D)SB)Vdd)GND
.tran 75u
.lib ADG849.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1696 -272 -2032 -272
WIRE -2032 -256 -2032 -272
WIRE -1424 -240 -1504 -240
WIRE -1312 -240 -1424 -240
WIRE -1424 -224 -1424 -240
WIRE -1312 -224 -1312 -240
WIRE -1696 -208 -1920 -208
WIRE -1920 -192 -1920 -208
WIRE -2032 -160 -2032 -176
WIRE -1696 -144 -1776 -144
WIRE -1424 -128 -1424 -144
WIRE -1312 -128 -1312 -160
WIRE -1920 -96 -1920 -112
WIRE -1776 -80 -1776 -144
WIRE -1600 -16 -1600 -32
WIRE -1776 32 -1776 0
SYMBOL ADG849 -1600 -192 R0
SYMATTR InstName U1
SYMBOL cap -1328 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -1920 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage -1776 -96 R0
WINDOW 3 24 136 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 5 25u 20n 20n 25u)
SYMATTR InstName V3
SYMBOL voltage -2032 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL res -1440 -240 R0
SYMATTR InstName R1
SYMATTR Value 49.9
SYMBOL voltage -2032 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0
FLAG -2032 -160 0
FLAG -1920 -96 0
FLAG -1776 32 0
FLAG -1600 -368 +V
FLAG -1424 -128 0
FLAG -1600 -16 0
FLAG -1312 -128 0
FLAG -2032 32 0
FLAG -2032 -48 +V
TEXT -1968 0 Left 2 !.tran 75u
TEXT -2088 -456 Left 2 ;Note:\nCharge Injection not included\nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1424-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1424-5.asy)
C3 OUT 0 10 Rser=.1
L2 0 N001 20
L1 IN N003 20
XU1 N002 N004 MP_01 0 0 N003 IN N005 LT1424-5 ;pnba _SHDN)Vc))SGND)PGND)SW)Vin)Rccomp
K1 L1 L2 1
V1 IN 0 5
D1 N001 OUT MBRS130L
Rload OUT 0 50
C1 N004 0 1000p
C2 N005 0 .1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib LT1424-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2392 832
WIRE 1424 304 1152 304
WIRE 1680 304 1424 304
WIRE 1824 304 1744 304
WIRE 1936 304 1888 304
WIRE 2016 304 1936 304
WIRE 1152 320 1152 304
WIRE 1680 336 1680 304
WIRE 1744 336 1744 304
WIRE 1936 336 1936 304
WIRE 2016 336 2016 304
WIRE 1424 352 1424 304
WIRE 1152 416 1152 400
WIRE 1264 448 1232 448
WIRE 1680 448 1680 416
WIRE 1680 448 1584 448
WIRE 1744 448 1744 416
WIRE 1936 448 1936 400
WIRE 2016 448 2016 416
WIRE 1184 544 1168 544
WIRE 1264 544 1248 544
WIRE 1600 544 1584 544
WIRE 1680 544 1664 544
WIRE 1328 672 1328 640
WIRE 1520 672 1520 640
SYMBOL schottky 1824 320 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS130L
SYMBOL res 2000 320 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL ind2 1760 432 R180
WINDOW 0 -4 72 Right 2
WINDOW 3 -5 45 Right 2
SYMATTR InstName L2
SYMATTR Value 20
SYMBOL cap 1600 560 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL polcap 1920 336 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMATTR SpiceLine Rser=.1
SYMBOL VOLTAGE 1152 304 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL POWERPRODUCTS\\LT1424-5 1424 496 R0
SYMATTR InstName U1
SYMBOL cap 1248 528 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1000p
SYMBOL ind2 1664 320 R0
WINDOW 0 -3 39 Right 2
WINDOW 3 -4 70 Right 2
SYMATTR InstName L1
SYMATTR Value 20
FLAG 1152 416 0
FLAG 1680 544 0
FLAG 1520 672 0
FLAG 1328 672 0
FLAG 1168 544 0
FLAG 1936 448 0
FLAG 2016 448 0
FLAG 1744 448 0
FLAG 2016 304 OUT
FLAG 1152 304 IN
TEXT 1704 296 Bottom 2 !K1 L1 L2 1
TEXT 1816 544 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\798b2551fe6c_F_vo_50.asc
* Generated by LTspice 26.0.1 for Windows.
D1 PuntaX1Vin PuntaX1Vout D1N4001
R4 PuntaX1Vout 0 1Meg
R1 PuntaX1Vout 0 10k
R3 PuntaX1Vin 0 1Meg
C2 PuntaX1Vout 0 200p
V2 N001 0 SINE(0 5 50)
C1 PuntaX1Vin 0 200p
R2 N001 PuntaX1Vin 50
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.lib Diodos.sub
.tran 0 80m 40m
.meas Vmedio AVG V(Puntax1Vout) from 0ms to 20ms
.meas Vmax MAX V(Puntax1Vout) from 0ms to 20ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 984 680
WIRE -432 64 -480 64
WIRE -288 64 -352 64
WIRE 64 64 -32 64
WIRE 144 64 64 64
WIRE 336 64 208 64
WIRE 432 64 336 64
WIRE 704 64 656 64
WIRE 752 64 704 64
WIRE 432 96 432 64
WIRE 656 96 656 64
WIRE -480 112 -480 64
WIRE 752 112 752 64
WIRE 656 208 656 176
WIRE 704 208 656 208
WIRE 752 208 752 176
WIRE 752 208 704 208
WIRE -480 256 -480 192
WIRE 432 256 432 176
WIRE 704 256 704 208
WIRE 704 336 656 336
WIRE 752 336 704 336
WIRE 656 368 656 336
WIRE 752 384 752 336
WIRE 656 480 656 448
WIRE 704 480 656 480
WIRE 752 480 752 448
WIRE 752 480 704 480
WIRE 704 528 704 480
SYMBOL res -448 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL res 640 352 R0
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL res 640 80 R0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL cap 736 112 R0
SYMATTR InstName C2
SYMATTR Value 200p
SYMBOL diode 144 80 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value D1N4001
SYMBOL res 416 80 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -480 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 5 50)
SYMBOL cap 736 384 R0
SYMATTR InstName C1
SYMATTR Value 200p
FLAG 432 256 0
FLAG -480 256 0
FLAG -288 64 GenF
FLAG -32 64 GenF
FLAG 704 256 0
FLAG 704 64 PuntaX1Vout
FLAG 336 64 PuntaX1Vout
FLAG 704 528 0
FLAG 704 336 PuntaX1Vin
FLAG 64 64 PuntaX1Vin
TEXT -288 344 Left 2 !.lib Diodos.sub
TEXT -64 344 Left 2 !.tran 0 80m 40m
TEXT -280 400 Left 2 !.meas Vmedio AVG V(Puntax1Vout) from 0ms to 20ms
TEXT -272 432 Left 2 !.meas Vmax MAX V(Puntax1Vout) from 0ms to 20ms
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8619.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8619.asy)
C2 N001 0 1
C5 OUT N005 10p
Rload OUT 0 1000
R1 N003 0 60.4K
XU1 IN IN N003 NC_01 0 N005 OUT N001 N002 N004 0 LT8619 ;pnba Vin)EN/UV)RT)PG)SYNC)FB)BIAS)INTVcc)BST)SW)GND
R2 OUT N005 1.05Meg
R3 N005 0 200K
L1 N004 OUT 10 Rser=3m
V1 IN 0 48
C3 N002 N004 .1
C4 OUT 0 22 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
.tran 1m startup
.lib LT8619.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 680
WIRE 96 -64 0 -64
WIRE 256 -64 96 -64
WIRE 0 -48 0 -64
WIRE 256 -48 256 -64
WIRE 96 0 96 -64
WIRE 112 0 96 0
WIRE 416 0 400 0
WIRE 496 0 480 0
WIRE 0 48 0 32
WIRE 112 96 96 96
WIRE 592 96 400 96
WIRE 432 192 400 192
WIRE 432 208 432 192
WIRE 16 288 0 288
WIRE 112 288 96 288
WIRE 432 288 432 272
WIRE 432 288 400 288
WIRE 480 288 432 288
WIRE 592 288 592 96
WIRE 592 288 560 288
WIRE 720 288 592 288
WIRE 816 288 720 288
WIRE 912 288 816 288
WIRE 592 304 592 288
WIRE 720 304 720 288
WIRE 816 304 816 288
WIRE 912 304 912 288
WIRE 192 352 192 336
WIRE 320 384 320 336
WIRE 592 384 320 384
WIRE 720 384 720 368
WIRE 720 384 592 384
WIRE 592 400 592 384
WIRE 816 400 816 368
WIRE 912 400 912 384
WIRE 592 496 592 480
SYMBOL ind 464 304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rser=3m
SYMBOL res 576 288 R0
SYMATTR InstName R2
SYMATTR Value 1.05Meg
SYMBOL PowerProducts\\LT8619 256 144 R0
SYMATTR InstName U1
SYMBOL res 896 288 R0
SYMATTR InstName Rload
SYMATTR Value 1000
SYMBOL cap 416 208 R0
SYMATTR InstName C3
SYMATTR Value .1
SYMBOL voltage 0 -64 R0
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL cap 416 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 800 304 R0
SYMATTR InstName C4
SYMATTR Value 22
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL cap 704 304 R0
SYMATTR InstName C5
SYMATTR Value 10p
SYMBOL res 576 384 R0
SYMATTR InstName R3
SYMATTR Value 200K
SYMBOL res 112 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 60.4K
FLAG 192 352 0
FLAG 0 288 0
FLAG 0 48 0
FLAG 496 0 0
FLAG 816 400 0
FLAG 592 496 0
FLAG 912 400 0
FLAG 912 288 OUT
FLAG 0 -64 IN
FLAG 96 96 0
TEXT 816 480 Left 2 !.tran 1m startup