Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\7abf06b8813d_CurrentSenseSim.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R7 0 N002 800
R2 N006 0 3300
V2 3v3 0 3.3
R5 N002 N004 33000
R9 N003 0 0.05
R1 N004 N003 3300
XU1 N004 N006 3v3 0 N005 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
R10 N001 N003 1
V1 N001 3v3 12
R8 N005 N006 33000
R6 N002 3v3 800
.dc V1 -12 12 0.1
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 -112 -32 -112
WIRE 192 -112 144 -112
WIRE 144 -96 144 -112
WIRE 192 -96 192 -112
WIRE -32 -48 -32 -112
WIRE 64 -16 64 -112
WIRE 144 -16 64 -16
WIRE 144 0 144 -16
WIRE 48 32 48 -48
WIRE 144 32 144 0
WIRE 240 32 224 32
WIRE 256 32 240 32
WIRE 368 32 336 32
WIRE 368 48 368 32
WIRE 240 64 240 32
WIRE 48 160 48 112
WIRE 128 160 48 160
WIRE 240 160 240 144
WIRE 240 160 208 160
WIRE 352 160 304 160
WIRE 304 176 304 160
WIRE 352 176 352 160
WIRE 240 192 240 160
WIRE 272 192 240 192
WIRE 368 208 336 208
WIRE 272 224 240 224
WIRE 48 256 48 240
WIRE 128 256 48 256
WIRE 240 256 240 224
WIRE 240 256 208 256
WIRE 48 288 48 256
WIRE 240 304 240 256
WIRE 256 304 240 304
WIRE 368 304 368 208
WIRE 368 304 336 304
SYMBOL res 352 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R8
SYMATTR Value 33000
SYMBOL voltage 144 0 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL res 224 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 3300
SYMBOL res 224 48 R0
SYMATTR InstName R5
SYMATTR Value 33000
SYMBOL res 352 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 800
SYMBOL res 224 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3300
SYMBOL Opamps\\UniversalOpamp2 304 208 M180
SYMATTR InstName U1
SYMBOL voltage 64 -48 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 32 16 R0
SYMATTR InstName R10
SYMATTR Value 1
SYMBOL res 32 144 R0
SYMATTR InstName R9
SYMATTR Value 0.05
SYMBOL res 240 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 800
FLAG 48 288 0
FLAG 368 48 0
FLAG 192 -96 0
FLAG 352 176 0
FLAG 144 0 3v3
FLAG 304 240 3v3
TEXT -272 248 Left 2 !.dc V1 -12 12 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3440.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3440.asy)
C2 OUT 0 22
XU1 N007 IN N001 N002 0 OUT IN N003 N004 N005 LTC3440 ;pnba Rt)MODE)SW1)SW2)GND)Vout)Vin)_SHDN)FB)Vc
V1 IN 0 3
R4 N006 N005 120K
Rload OUT 0 100
C1 N004 N006 330p
R3 N004 0 200K
C3 N003 0 .01
L1 N001 N002 10
R2 OUT N004 340K
R5 IN N003 1Meg
R1 N007 0 60K
.tran 5m startup
.lib LTC3440.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2628 1848
WIRE 1824 1248 1664 1248
WIRE 2048 1248 1904 1248
WIRE 1664 1328 1664 1248
WIRE 1696 1328 1664 1328
WIRE 2048 1328 2048 1248
WIRE 2048 1328 2016 1328
WIRE 1520 1376 1392 1376
WIRE 1664 1376 1520 1376
WIRE 1392 1392 1392 1376
WIRE 1520 1392 1520 1376
WIRE 1664 1408 1664 1376
WIRE 1696 1408 1664 1408
WIRE 2240 1408 2016 1408
WIRE 2352 1408 2240 1408
WIRE 2448 1408 2352 1408
WIRE 2352 1424 2352 1408
WIRE 2448 1424 2448 1408
WIRE 2240 1440 2240 1408
WIRE 1392 1488 1392 1472
WIRE 1520 1488 1520 1472
WIRE 1696 1488 1520 1488
WIRE 2208 1488 2016 1488
WIRE 1520 1504 1520 1488
WIRE 2352 1520 2352 1488
WIRE 2448 1520 2448 1504
WIRE 1664 1568 1664 1408
WIRE 1696 1568 1664 1568
WIRE 2032 1568 2016 1568
WIRE 2128 1568 2112 1568
WIRE 2208 1568 2208 1488
WIRE 2208 1568 2192 1568
WIRE 2240 1568 2240 1520
WIRE 2240 1568 2208 1568
WIRE 1520 1584 1520 1568
WIRE 2240 1584 2240 1568
WIRE 1600 1648 1584 1648
WIRE 1696 1648 1680 1648
WIRE 2048 1648 2016 1648
WIRE 2240 1680 2240 1664
SYMBOL res 2128 1552 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 120K
SYMBOL RES 1696 1632 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 60K
SYMBOL VOLTAGE 1392 1376 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res 1504 1376 R0
SYMATTR InstName R5
SYMATTR Value 1Meg
SYMBOL cap 2192 1552 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 330p
SYMBOL ind 1808 1264 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL POWERPRODUCTS\\LTC3440 1856 1488 R0
SYMATTR InstName U1
SYMBOL cap 2336 1424 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL res 2224 1568 R0
SYMATTR InstName R3
SYMATTR Value 200K
SYMBOL cap 1504 1504 R0
WINDOW 3 26 58 Left 2
SYMATTR Value .01
SYMATTR InstName C3
SYMBOL res 2224 1424 R0
SYMATTR InstName R2
SYMATTR Value 340K
SYMBOL res 2432 1408 R0
SYMATTR InstName Rload
SYMATTR Value 100
FLAG 1584 1648 0
FLAG 2048 1648 0
FLAG 1392 1488 0
FLAG 2240 1680 0
FLAG 2352 1520 0
FLAG 2448 1520 0
FLAG 1520 1584 0
FLAG 2448 1408 OUT
FLAG 1392 1376 IN
TEXT 2312 1584 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\41f56bde6e0b_nmos_step_w.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1)
* Id versus Vds for different W(idth)
M1 N001 N002 0 0 NMOS1 L={L} W={W}
V1 N002 0 1
V2 N001 0 2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model NMOS1 NMOS(Vto=0.5 Kp=1m)
.step param W list 0.2u 1u 5u
.param L=0.1u
.dc V2 0 2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 -128 96 -128
WIRE 96 -80 96 -128
WIRE 96 48 96 0
WIRE 288 48 288 -128
WIRE 240 128 96 128
WIRE 96 176 96 128
WIRE 288 192 288 144
WIRE 96 304 96 256
SYMBOL voltage 96 160 R0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL nmos 240 48 R0
SYMATTR InstName M1
SYMATTR Value NMOS1 L={L} W={W}
SYMBOL voltage 96 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 2
FLAG 288 192 0
FLAG 96 48 0
FLAG 96 304 0
TEXT 168 256 Left 0 !.model NMOS1 NMOS(Vto=0.5 Kp=1m)
TEXT 336 -48 Left 0 !.step param W list 0.2u 1u 5u
TEXT 336 -80 Left 0 !.param L=0.1u
TEXT 336 -8 Left 0 !.dc V2 0 2
TEXT 336 -120 Left 0 ;Plot Id(M1)
TEXT 88 -176 Left 0 ;Id versus Vds for different W(idth)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4610.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4610.asy)
V2 -V 0 -15
V1 +V 0 15
R2 OUT N001 10K
Vin IN 0 SINE(0 1 10K)
Rload OUT 0 10K
XU1 IN N001 +V -V OUT ADA4610 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 10K
.tran 1m
.lib ADA4610.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL ADA4610 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
TEXT 736 -936 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1962-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1962-3.asy)
V1 IN 0 PWL(0 0 1 10)
XU1 OUT OUT N001 0 IN MP_01 MP_02 IN LT1962-3 ;pnba OUT)SENSE)BYP)GND)_SHDN)))IN
Rload OUT 0 1K
C1 OUT 0 1
.tran 1
.lib LT1962-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 352 32 320 32
WIRE 416 32 352 32
WIRE 512 32 416 32
WIRE 16 48 -208 48
WIRE 32 48 16 48
WIRE 416 48 416 32
WIRE 512 48 512 32
WIRE -208 64 -208 48
WIRE 352 96 352 32
WIRE 352 96 320 96
WIRE 16 144 16 48
WIRE 32 144 16 144
WIRE 416 144 416 112
WIRE 512 144 512 128
WIRE -208 160 -208 144
WIRE 352 160 320 160
WIRE 176 240 176 208
SYMBOL res 496 32 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL cap 400 48 R0
SYMATTR InstName C1
SYMATTR Value 1u
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL LT1962-3 176 96 R0
SYMATTR InstName U1
FLAG -208 160 0
FLAG 416 144 0
FLAG 512 144 0
FLAG 176 240 0
FLAG 512 32 OUT
FLAG -208 48 IN
TEXT 384 232 Left 2 !.tran 1
* Z:\tmp\asc_dec_bjh7r6w2\126d185ee445_Simulation_Bonus_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M3 N002 N005 N004 N004 Mosfet3
M4 N001 N003 N002 N002 Mosfet4
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1464 868
WIRE 704 272 704 -64
WIRE 768 320 704 320
WIRE 656 352 432 352
WIRE 704 384 704 368
WIRE 768 384 768 320
WIRE 768 384 704 384
WIRE 704 464 704 384
WIRE 768 512 704 512
WIRE 656 544 432 544
WIRE 704 576 704 560
WIRE 768 576 768 512
WIRE 768 576 704 576
WIRE 704 624 704 576
WIRE 704 624 432 624
SYMBOL nmos4 656 464 R0
SYMATTR InstName M3
SYMATTR Value Mosfet3
SYMBOL nmos4 656 272 R0
SYMATTR InstName M4
SYMATTR Value Mosfet4
* Z:\tmp\asc_dec_bjh7r6w2\1045c0a1bff5_ex1e_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R3 i N003 {R3}
R1 N002 0 {R1}
XU1 N002 i Vpp Vnn N001 level2 Avol=125 GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 272 -32 176 -32
WIRE 400 -32 352 -32
WIRE 176 48 176 -32
WIRE -256 80 -256 48
WIRE -256 80 -304 80
WIRE 0 80 -128 80
WIRE 176 80 176 48
WIRE 176 80 0 80
WIRE 192 80 176 80
WIRE 400 96 400 -32
WIRE 400 96 256 96
WIRE 432 96 400 96
WIRE -304 112 -304 80
WIRE -256 112 -256 80
WIRE 128 112 16 112
WIRE 192 112 128 112
WIRE -128 144 -128 80
WIRE 16 144 16 112
WIRE 128 144 128 112
WIRE -128 240 -128 224
WIRE 16 240 16 224
WIRE 128 256 128 224
WIRE -128 368 -128 320
WIRE 16 368 16 320
SYMBOL res -144 128 R0
SYMATTR InstName R3
SYMATTR Value {R3}
SYMBOL res 112 128 R0
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL OpAmps\\UniversalOpAmp2 224 96 R0
SYMATTR InstName U1
SYMATTR Value2 Avol=125 GBW=10Meg Slew=10Meg
FLAG -304 112 0
FLAG -256 -32 Vpp
FLAG -256 192 Vnn
FLAG 0 80 i
FLAG 224 64 Vpp
FLAG 224 128 Vnn
FLAG 176 48 n
FLAG 128 256 0
* Z:\home\khalils\Downloads\files\data\raw_asc\a9231a87ae77_es02.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 0 6.3Meg
I1 N001 0 AC 1
C1 N001 0 50f
L1 N001 0 20.2n
.ac dec 10000 1G 20G
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 0 112 -112 112
WIRE 128 112 0 112
WIRE 256 112 128 112
WIRE -112 128 -112 112
WIRE 0 128 0 112
WIRE 128 128 128 112
WIRE 256 128 256 112
WIRE -112 224 -112 208
WIRE 0 224 0 208
WIRE 0 224 -112 224
WIRE 128 224 128 208
WIRE 128 224 0 224
WIRE 256 224 256 192
WIRE 256 224 128 224
WIRE -112 256 -112 224
SYMBOL res 112 112 R0
SYMATTR InstName R1
SYMATTR Value 6.3Meg
SYMBOL current -112 128 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value ""
SYMBOL cap 240 128 R0
SYMATTR InstName C1
SYMATTR Value 50f
SYMBOL ind -16 112 R0
SYMATTR InstName L1
SYMATTR Value 20.2n
FLAG -112 256 0
TEXT 216 40 Left 2 !.ac dec 10000 1G 20G
* Z:\home\khalils\Downloads\files\data\raw_asc\a990b54cbd60_180p_IDVD.asc
* Generated by LTspice 26.0.1 for Windows.
VD N001 0
M1 N001 N002 0 N001 PMOS l=180n w=270n
VG N002 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib tsmc018.lib
.dc VD -1.8 0 0.01 VG -0.01 -1.8 -0.6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1168 680
WIRE 320 128 240 128
WIRE 416 128 320 128
WIRE 320 176 320 128
WIRE 320 176 240 176
WIRE 192 208 16 208
WIRE 416 208 416 128
WIRE 16 240 16 208
WIRE 16 352 16 320
WIRE 240 352 240 224
WIRE 240 352 16 352
WIRE 416 352 416 288
WIRE 416 352 240 352
WIRE 240 368 240 352
SYMBOL voltage 16 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VG
SYMATTR Value ""
SYMBOL voltage 416 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VD
SYMATTR Value ""
SYMBOL pmos4 192 128 R0
SYMATTR InstName M1
SYMATTR Value2 l=180n w=270n
FLAG 240 368 0
TEXT 744 128 Left 2 !.lib tsmc018.lib
TEXT 744 176 Left 2 !.dc VD -1.8 0 0.01 VG -0.01 -1.8 -0.6
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX14575AL.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX14575AL.asy)
V3 N004 0 5
V1 IN 0 5
V2 N002 0 0
S1 0 OUT N001 0 SHORT
R3 N004 N003 20K
R2 N006 0 348
R1 N005 N006 52.3K
XU1 IN N005 0 N003 N002 OUT MAX14575AL ;pnba IN)SETI)GND)_FLAG)_EN)OUT
C1 OUT 0 150
V4 N001 0 PULSE(0 1 10m 1m 1m 30m)
.model SHORT SW(Ron=0.05 Roff=1K Vt=.5 Vh=-.4)
.tran 50m startup
.lib MAX14575AL.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1800 680
WIRE -16 -352 -224 -352
WIRE 400 -352 272 -352
WIRE 512 -352 400 -352
WIRE 672 -352 560 -352
WIRE -224 -336 -224 -352
WIRE 400 -336 400 -352
WIRE 512 -336 512 -352
WIRE 672 -336 672 -352
WIRE 560 -320 560 -352
WIRE -224 -240 -224 -256
WIRE 400 -240 400 -272
WIRE 512 -240 512 -256
WIRE 672 -240 672 -256
WIRE -16 -160 -224 -160
WIRE 384 -160 272 -160
WIRE 576 -160 464 -160
WIRE -224 -144 -224 -160
WIRE 576 -128 576 -160
WIRE -16 -64 -128 -64
WIRE 336 -64 272 -64
WIRE -224 -48 -224 -64
WIRE -128 -48 -128 -64
WIRE 336 -32 336 -64
WIRE 576 -32 576 -48
WIRE -128 48 -128 32
WIRE -128 144 -128 128
SYMBOL res 480 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 20K
SYMBOL voltage 576 -144 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL sw 512 -240 R180
WINDOW 0 -23 102 Right 2
WINDOW 3 -26 2 Right 2
SYMATTR InstName S1
SYMATTR Value SHORT
SYMBOL cap 384 -336 R0
SYMATTR InstName C1
SYMATTR Value 150
SYMBOL voltage -224 -160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL res -144 -64 R0
SYMATTR InstName R1
SYMATTR Value 52.3K
SYMBOL voltage -224 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -144 32 R0
SYMATTR InstName R2
SYMATTR Value 348
SYMBOL MAX14575AL 128 -208 R0
SYMATTR InstName U1
SYMBOL voltage 672 -352 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 1 10m 1m 1m 30m)
FLAG -224 -240 0
FLAG 400 -240 0
FLAG 512 -352 OUT
FLAG -224 -352 IN
FLAG 512 -240 0
FLAG 560 -272 0
FLAG 672 -240 0
FLAG -128 144 0
FLAG 576 -32 0
FLAG -224 -48 0
FLAG 336 -32 0
TEXT 480 144 Left 2 !.model SHORT SW(Ron=0.05 Roff=1K Vt=.5 Vh=-.4)
TEXT 480 184 Left 2 !.tran 50m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6401-14.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6401-14.asy)
V4 N001 0 1.5
V2 N007 0 -1.5
V1 N004 0 SINE(0 100m 100Meg)
XU1 0 0 N001 N002 N006 N007 N007 N004 N005 N003 LTC6401-14 ;pnba IN-)Vocm)V+)OUT+)OUT-)V-)_EN)IN+)OUTF-)OUTF+
.tran 100n
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 772
WIRE 192 112 -32 112
WIRE -32 128 -32 112
WIRE 192 128 192 112
WIRE 352 160 336 160
WIRE 80 208 64 208
WIRE 352 208 336 208
WIRE -32 224 -32 208
WIRE -160 272 -176 272
WIRE 80 272 -80 272
WIRE 352 272 336 272
WIRE 352 320 336 320
WIRE 240 384 240 368
WIRE 144 400 144 368
WIRE 192 400 192 368
WIRE 192 400 144 400
WIRE 192 416 192 400
WIRE 192 512 192 496
SYMBOL voltage -32 112 R0
SYMATTR InstName V4
SYMATTR Value 1.5
SYMBOL voltage -64 272 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value SINE(0 100m 100Meg)
SYMBOL voltage 192 400 R0
SYMATTR InstName V2
SYMATTR Value -1.5
SYMBOL LTC6401-14 208 240 R0
WINDOW 3 55 144 Left 2
SYMATTR InstName U1
FLAG 192 512 0
FLAG -176 272 0
FLAG 64 208 0
FLAG -32 224 0
FLAG 240 384 0
TEXT 376 448 Left 2 !.tran 100n
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8617.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8617.asy)
V1 +V 0 2.5
V2 -V 0 -2.5
Vin IN 0 SINE(0 1 1K)
Rload OUT 0 10K
XU1 IN N001 +V -V OUT AD8617 ;pnba In+)In-)V+)V-)OUT
R2 OUT N001 10K
R1 N001 0 10K
.tran 10m
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1152 144 -1168
WIRE 256 -1152 256 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 752 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 752 -1088 752 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1056 144 -1072
WIRE 256 -1056 256 -1072
WIRE 752 -992 752 -1008
WIRE 432 -976 432 -992
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 736 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 144 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL voltage 256 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 1K)
SYMBOL Opamps\\AD8617 576 -1168 R0
SYMATTR InstName U1
FLAG 144 -1168 +V
FLAG 144 -1056 0
FLAG 432 -976 0
FLAG 752 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 752 -992 0
FLAG 256 -1056 0
TEXT 680 -944 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\0fada9b07c09_6994-1.asc
* Generated by LTspice 26.0.1 for Windows.
* LTC6994-1 10ms Delay Interval Generator\nOutput Low When IN is Low\nRising Edge On IN Starts Delay to Output Rising Edge\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6994-1.asy)
R1 N003 0 121K
R4 OUT 0 100K
V1 N002 0 5
R3 N004 0 392K
R2 N002 N004 1000K
V2 N001 0 PULSE(3.3 0 0.25m 1n 1n 0.5m 25m 3)
XU1 N001 0 N003 N004 N002 OUT LTC6994-1 ;pnba IN)GND)SET)DIV)V+)OUT
.tran 100m startup
.lib LTC6994-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE -224 96 -240 96
WIRE 96 96 -144 96
WIRE 624 96 320 96
WIRE 624 112 624 96
WIRE 96 176 64 176
WIRE 400 176 320 176
WIRE 528 176 400 176
WIRE 400 192 400 176
WIRE 528 192 528 176
WIRE 624 208 624 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 352 256 320 256
WIRE 352 288 352 256
WIRE 400 288 400 272
WIRE 400 288 352 288
WIRE 528 288 528 272
WIRE 400 304 400 288
WIRE 400 400 400 384
SYMBOL res 384 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 121K
SYMBOL voltage -128 96 R90
WINDOW 123 74 56 VTop 0
WINDOW 39 53 56 VTop 0
WINDOW 3 32 56 VTop 0
WINDOW 0 -32 56 VBottom 0
SYMATTR Value PULSE(3.3 0 0.25m 1n 1n 0.5m 25m 3)
SYMATTR InstName V2
SYMBOL res 608 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL res 384 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL SpecialFunctions\\LTC6994-1 208 176 R0
SYMATTR InstName U1
SYMBOL voltage 528 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -240 96 0
FLAG 528 288 0
FLAG 624 96 OUT
FLAG 624 208 0
FLAG 400 400 0
FLAG -16 256 0
FLAG 64 176 0
TEXT 528 368 Left 0 !.tran 100m startup
TEXT 216 64 Bottom 0 ;LTC6994-1 10ms Delay Interval Generator\nOutput Low When IN is Low\nRising Edge On IN Starts Delay to Output Rising Edge\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\ADCMP580.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\ADCMP580.asy)
R1 Q 0 50
V5 _LE 0 0
XU1 0 VP VN 0 VCC _LE LE 0 0 _Q Q VEE HYS ADCMP580 ;pnba VTP)VP)VN)VTN)VCCI)_LE)LE)VTT)GND)_Q)Q)VEE)HYS
R2 _Q 0 50
V4 VCC 0 5
V2 VN 0 1.5
V3 VEE 0 -5
R3 HYS VEE 1k
V6 LE 0 0.4
V1 VP 0 PWL(0 1.4 300p 1.4 +25p 1.7)
.tran 1n
.lib ADCMP580.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 -208 160 -208
WIRE 320 -208 240 -208
WIRE 352 -208 320 -208
WIRE 352 -192 352 -208
WIRE 160 -160 160 -208
WIRE 240 -160 240 -208
WIRE 320 -160 320 -208
WIRE 160 -48 160 -80
WIRE 240 -48 240 -80
WIRE 320 -48 320 -80
WIRE 160 -16 160 -48
WIRE 240 -16 240 -48
WIRE 320 -16 320 -48
WIRE 48 32 -160 32
WIRE 80 32 48 32
WIRE 48 96 -64 96
WIRE 80 96 48 96
WIRE 416 112 384 112
WIRE 528 112 416 112
WIRE -160 128 -160 32
WIRE -64 128 -64 96
WIRE 528 128 528 112
WIRE 80 160 48 160
WIRE 416 208 384 208
WIRE 464 208 416 208
WIRE -160 224 -160 208
WIRE -64 224 -64 208
WIRE 48 224 48 160
WIRE 80 224 48 224
WIRE 464 224 464 208
WIRE 528 224 528 208
WIRE 48 240 48 224
WIRE 48 304 16 304
WIRE 80 304 48 304
WIRE 464 320 464 304
WIRE 16 336 16 304
WIRE 240 368 240 352
WIRE 320 368 320 352
WIRE 320 368 240 368
WIRE 240 384 240 368
WIRE 16 448 16 416
WIRE 96 448 16 448
WIRE 160 448 160 352
WIRE 160 448 96 448
WIRE 160 464 160 448
WIRE 160 560 160 544
SYMBOL voltage 320 -64 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V5
SYMATTR Value 0
SYMBOL voltage 240 -64 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 0.4
SYMBOL voltage -64 112 R0
SYMATTR InstName V2
SYMATTR Value 1.5
SYMBOL voltage -160 112 R0
WINDOW 3 -193 -104 Left 2
SYMATTR Value PWL(0 1.4 300p 1.4 +25p 1.7)
SYMATTR InstName V1
SYMBOL ADCMP580 240 160 R0
SYMATTR InstName U1
SYMBOL voltage 160 -64 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V4
SYMATTR Value 5
SYMBOL res 0 320 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL voltage 160 448 R0
SYMATTR InstName V3
SYMATTR Value -5
SYMBOL res 448 208 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL res 512 112 R0
SYMATTR InstName R1
SYMATTR Value 50
FLAG 464 320 0
FLAG 416 208 _Q
FLAG 528 224 0
FLAG 416 112 Q
FLAG 240 384 0
FLAG 48 240 0
FLAG -160 224 0
FLAG 48 32 VP
FLAG -64 224 0
FLAG 48 96 VN
FLAG 160 560 0
FLAG 96 448 VEE
FLAG 48 304 HYS
FLAG 160 -48 VCC
FLAG 240 -48 LE
FLAG 320 -48 _LE
FLAG 352 -192 0
TEXT -168 536 Left 2 !.tran 1n