Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1751-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1751-5.asy)
C1 N003 N004 1
R1 OUT N001 100K
XU1 N001 OUT IN 0 N004 N003 IN N002 LTC1751-5 ;pnba Pgood)Vout)Vin)GND)C-)C+)_SHDN)SS
C3 OUT 0 10
C2 N002 0 .001
V1 IN 0 3
Rload OUT 0 50
.tran 1m startup
.lib LTC1751-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 680
WIRE 96 160 -32 160
WIRE 128 160 96 160
WIRE 432 160 384 160
WIRE 544 160 432 160
WIRE 656 160 544 160
WIRE -32 176 -32 160
WIRE 544 176 544 160
WIRE 656 176 656 160
WIRE 96 240 96 160
WIRE 128 240 96 240
WIRE 432 240 384 240
WIRE -32 272 -32 256
WIRE 544 272 544 240
WIRE 656 272 656 256
WIRE 48 320 32 320
WIRE 128 320 112 320
WIRE 416 320 384 320
WIRE 128 400 96 400
WIRE 416 400 416 384
WIRE 416 400 384 400
SYMBOL res 416 144 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 112 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .001
SYMBOL cap 528 176 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res 640 160 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL voltage -32 160 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL cap 400 320 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LTC1751-5 256 288 R0
SYMATTR InstName U1
FLAG -32 272 0
FLAG 96 400 0
FLAG 32 320 0
FLAG 544 272 0
FLAG 656 272 0
FLAG 656 160 OUT
FLAG -32 160 IN
TEXT 520 360 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT318A.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
R1 N002 N001 1K
R2 N001 0 1K
V3 N003 0 SINE(0 1 1K)
XU1 N003 N001 +V -V N002 LT118A ;pnba In+)In-)V+)V-)OUT
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT318A.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -32 96 -48 96
WIRE 64 96 48 96
WIRE 80 96 64 96
WIRE 192 96 160 96
WIRE -256 112 -256 96
WIRE -160 112 -160 96
WIRE 128 208 128 192
WIRE -256 224 -256 192
WIRE -160 224 -160 192
WIRE 64 224 64 96
WIRE 96 224 64 224
WIRE 192 240 192 96
WIRE 192 240 160 240
WIRE 96 256 -64 256
WIRE -64 272 -64 256
WIRE 128 288 128 272
WIRE -64 368 -64 352
FLAG -160 224 0
FLAG 128 192 +V
FLAG -160 96 +V
FLAG 128 288 -V
FLAG -256 224 0
FLAG -256 96 -V
FLAG -48 96 0
FLAG -64 368 0
SYMBOL voltage -160 96 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -256 96 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 176 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 64 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -64 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL opamps\\LT318A 128 240 R0
SYMATTR InstName U1
TEXT 136 344 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3007-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3007-1.2.asy)
XU1 IN OUT OUT 0 IN LT3008-1.2 ;pnba IN)OUT)Sense)GND)_SHDN
Rload OUT 0 120
C1 OUT 0 1
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 48 -208 48
WIRE 32 48 16 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 16 144 16 48
WIRE 32 144 16 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL PowerProducts\\LT3007-1.2 176 96 R0
SYMATTR InstName U1
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 120
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 336 248 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\0bb324b6eeb0_yig_current_regulator.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1632.asy)
Vload N001 0 12V
V3 Vcc 0 5V
V1 N003 0 V
R1 N006 N005 150
R5 N004 N003 33k
R4 N004 0 1k
Q1 N002 N006 N007 0 2N2222
Rload N001 N002 72
XU1 N004 N007 Vcc 0 N005 LT1632 ;pnba In+)In-)V+)V-)OUT
R3 0 N007 1
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 0 5 1e-3
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -80 -80 -176 -80
WIRE -176 -48 -176 -80
WIRE 704 -48 464 -48
WIRE 464 0 464 -48
WIRE 704 16 704 -48
WIRE 128 96 80 96
WIRE 80 112 80 96
WIRE 464 128 464 80
WIRE 128 144 128 96
WIRE -128 160 -176 160
WIRE -16 160 -48 160
WIRE 96 160 -16 160
WIRE -16 176 -16 160
WIRE 288 176 160 176
WIRE 400 176 368 176
WIRE 96 192 64 192
WIRE -176 208 -176 160
WIRE 128 240 128 208
WIRE -176 320 -176 288
WIRE 64 432 64 192
WIRE 464 432 464 224
WIRE 464 432 64 432
WIRE 464 448 464 432
SYMBOL res 480 544 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 1
SYMBOL res -32 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 33k
SYMBOL voltage -176 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5V
SYMBOL res 384 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 150
SYMBOL OpAmps\\LT1632 128 240 M180
SYMATTR InstName U1
SYMBOL npn 400 128 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL res -32 160 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL res 448 -16 R0
SYMATTR InstName Rload
SYMATTR Value 72
SYMBOL voltage 704 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vload
SYMATTR Value 12V
SYMBOL voltage -176 192 R0
SYMATTR InstName V1
FLAG -176 320 0
FLAG 704 96 0
FLAG 464 528 0
FLAG 80 112 0
FLAG -176 32 0
FLAG -80 -80 Vcc
FLAG 128 240 Vcc
FLAG -16 256 0
TEXT -208 552 Left 2 !.dc V1 0 5 1e-3
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6703-2.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N003 0 N002 N001 LT6703-2 ;pnba OUT)GND)-IN)Vs
V1 N001 0 5
V2 N002 0 PULSE(390m 410m 0 .5m .5m 0 1m)
R1 N001 N003 10K
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT6703-2.asy)
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 32 -112 32
WIRE 336 32 208 32
WIRE -112 48 -112 32
WIRE 336 48 336 32
WIRE 208 80 208 32
WIRE 128 128 -16 128
WIRE -112 144 -112 128
WIRE 336 144 336 128
WIRE 336 144 288 144
WIRE -16 240 -16 128
WIRE 208 288 208 256
WIRE -16 336 -16 320
FLAG -112 144 0
FLAG -16 336 0
FLAG 208 288 0
SYMBOL LT6703-2 208 144 R0
SYMATTR InstName U1
SYMBOL voltage -112 32 R0
WINDOW 3 26 96 Left 2
SYMATTR Value 5
SYMATTR InstName V1
SYMBOL voltage -16 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(390m 410m 0 .5m .5m 0 1m)
SYMBOL res 320 32 R0
SYMATTR InstName R1
SYMATTR Value 10K
TEXT 416 368 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1574.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1574.asy)
XU1 N002 MP_01 MP_02 0 N001 IN IN IN LTC1574 top=1K bot=1T ;pnba FB)))GND)SW)Vin)Ipgm)_SHDN
R2 OUT N002 93.5K
Rload OUT 0 15
L1 N001 OUT 100 Rser=0.02 Rpar=5000
R1 N002 0 31.5K
C1 OUT 0 100 Rser=0.02
V1 IN 0 9
.tran 3m startup
.lib LTC1574.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1492 912
WIRE 480 528 384 528
WIRE 624 528 480 528
WIRE 384 544 384 528
WIRE 624 544 624 528
WIRE 784 560 768 560
WIRE 896 560 864 560
WIRE 1024 560 896 560
WIRE 1120 560 1024 560
WIRE 896 576 896 560
WIRE 1024 576 1024 560
WIRE 1120 576 1120 560
WIRE 480 608 480 528
WIRE 496 608 480 608
WIRE 768 608 768 560
WIRE 768 608 752 608
WIRE 384 640 384 624
WIRE 480 672 480 608
WIRE 496 672 480 672
WIRE 896 672 896 656
WIRE 896 672 752 672
WIRE 1024 672 1024 640
WIRE 1120 672 1120 656
WIRE 896 688 896 672
WIRE 624 768 624 736
SYMBOL RES 1104 560 R0
SYMATTR InstName Rload
SYMATTR Value 15
SYMBOL POLCAP 1008 576 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02
SYMBOL POWERPRODUCTS\\LTC1574 624 624 R0
SYMATTR InstName U1
SYMBOL IND 768 576 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL RES 880 672 R0
SYMATTR InstName R1
SYMATTR Value 31.5K
SYMBOL RES 880 560 R0
SYMATTR InstName R2
SYMATTR Value 93.5K
SYMBOL VOLTAGE 384 528 R0
SYMATTR InstName V1
SYMATTR Value 9
FLAG 1120 560 OUT
FLAG 1024 672 0
FLAG 1120 672 0
FLAG 624 768 0
FLAG 896 768 0
FLAG 384 640 0
FLAG 384 528 IN
TEXT 1064 720 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4099-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4099-1.asy)
V1 V+ 0 5
R3 N002 N003 1.25k
R1 N001 OUT 1.25k
Vref N003 0 2.5
Vin N004 0 SINE(0 10 2k)
R4 N002 N004 5k
R2 N001 0 5k
XU1 N002 N001 V+ 0 OUT 0 ADA4099-1 ;pnba In+)In-)V+)V-)OUT)SD
.tran 2000u
.lib ADA4099-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 704
WIRE 336 -32 -176 -32
WIRE -304 64 -304 32
WIRE -64 64 -128 64
WIRE 80 64 16 64
WIRE 160 160 160 144
WIRE -304 176 -304 144
WIRE -176 176 -176 -32
WIRE -64 176 -176 176
WIRE 80 176 80 64
WIRE 80 176 16 176
WIRE 144 176 80 176
WIRE 336 192 336 -32
WIRE 336 192 208 192
WIRE 400 192 336 192
WIRE 432 192 400 192
WIRE 144 208 80 208
WIRE 160 240 160 224
WIRE 192 240 192 224
WIRE 192 240 160 240
WIRE 160 256 160 240
WIRE -64 320 -304 320
WIRE 80 320 80 208
WIRE 80 320 16 320
WIRE -64 432 -176 432
WIRE 80 432 80 320
WIRE 80 432 16 432
WIRE -304 496 -304 320
WIRE -176 496 -176 432
WIRE -304 624 -304 576
WIRE -176 624 -176 576
SYMBOL res 32 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1.25k
SYMBOL res 32 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5k
SYMBOL res 32 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1.25k
SYMBOL ADA4099-1 176 192 R0
SYMATTR InstName U1
SYMBOL voltage -304 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 32 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 5k
SYMBOL voltage -176 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value SINE(0 10 2k)
SYMBOL voltage -304 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vref
SYMATTR Value 2.5
FLAG -304 176 0
FLAG -304 32 V+
FLAG 160 144 V+
FLAG -176 624 0
FLAG 400 192 OUT
FLAG -128 64 0
FLAG 160 256 0
FLAG -304 624 0
TEXT -336 688 Left 2 !.tran 2000u
* Z:\home\khalils\Downloads\files\data\raw_asc\2eca3403a9c4_1997-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain = 10 Difference Amplifier
* V(out) = 1mV/mA in RL
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1997-1.asy)
V2 V- 0 -15
RL N001 0 10
Vs N002 0 0
R1 N002 N001 .1
V1 V+ 0 15
R2 N003 N002 1
XU1 N003 MP_01 NC_02 MP_03 NC_04 0 0 V- OUT NC_05 V+ NC_06 MP_07 NC_08 MP_09 N001 LT1997-1 ;pnba +INA))+INB))+INC)REF1)REF2)V-)OUT)_SHDN)V+)-INC))-INB))-INA
.dc Vs 0 26.5 10m
.lib LT1997-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1116 932
WIRE 48 48 -16 48
WIRE -272 80 -432 80
WIRE 48 80 48 48
WIRE 400 80 400 48
WIRE -432 96 -432 80
WIRE -272 160 -272 80
WIRE -208 160 -272 160
WIRE -16 160 -16 48
WIRE -16 160 -144 160
WIRE -432 192 -432 176
WIRE 544 208 496 208
WIRE -208 240 -144 160
WIRE -208 240 -272 240
WIRE -144 240 -208 160
WIRE -128 240 -144 240
WIRE -16 240 -48 240
WIRE -272 256 -272 240
WIRE 544 256 496 256
WIRE 544 288 544 256
WIRE 544 288 496 288
WIRE -528 304 -528 288
WIRE -400 304 -400 288
WIRE 544 304 544 288
WIRE -272 352 -272 336
WIRE -16 368 -16 240
WIRE 48 368 48 336
WIRE 48 368 -16 368
WIRE 400 384 400 336
WIRE -528 400 -528 384
WIRE -400 400 -400 384
SYMBOL res -32 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL res -288 144 R0
SYMATTR InstName R1
SYMATTR Value .1
SYMBOL res -288 240 R0
SYMATTR InstName RL
SYMATTR Value 10
SYMBOL voltage -528 288 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL LT1997-1 272 208 R0
SYMATTR InstName U1
SYMBOL voltage -400 288 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -432 80 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vs
SYMATTR Value 0
FLAG -528 400 0
FLAG -400 400 0
FLAG -528 288 V+
FLAG -400 288 V-
FLAG 400 48 V+
FLAG 400 384 V-
FLAG 544 304 0
FLAG -272 352 0
FLAG 544 208 OUT
FLAG -432 192 0
TEXT 584 400 Left 2 !.dc Vs 0 26.5 10m
TEXT 80 0 Bottom 2 ;Gain = 10 Difference Amplifier
TEXT 544 144 Left 2 ;V(out) = 1mV/mA in RL
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8033.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8034.asy)
XU1 IN N001 +V -V OUT AD8033 ;pnba In+)In-)V+)V-)OUT
V1 +V 0 12
V2 -V 0 -12
R1 N001 0 1K
Vin IN 0 SINE(0 1 100K)
R2 OUT N001 1K
.tran 100u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 160 -1152 160 -1168
WIRE 272 -1152 272 -1168
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 720 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 432 -1072 432 -1088
WIRE 160 -1040 160 -1072
WIRE 272 -1040 272 -1072
WIRE 432 -976 432 -992
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100K)
SYMBOL voltage 272 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL voltage 160 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL Opamps\\AD8034 576 -1168 R0
SYMATTR InstName U1
FLAG 160 -1168 +V
FLAG 432 -976 0
FLAG 720 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 272 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 272 -1040 0
FLAG 160 -1040 0
TEXT 664 -944 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\0b9886147507_nonlinear_capacitance_poly.asc
* Generated by LTspice 26.0.1 for Windows.
Cvar vc 0 Q = 23.3836e-12*x + 5.1258e-12*x*x/2 + 0.5214e-12*x*x*x/3 + 0.0240e-12*x*x*x*x/4 + 0.0004e-12*x*x*x*x*x/5
V7 vc 0 PWL(0 -6 56u 50)
B1 0 cf I= 23.3836e-12 + 5.1258e-12*V(vc) + 0.5214e-12*V(vc)*V(vc) + 0.0240e-12*V(vc)*V(vc)*V(vc) + 0.0004e-12*V(vc)*V(vc)*V(vc)*V(vc)
R1 cf 0 1
.tran 0 11u 1u 0.01u
* Simulation of nonlinear capacitors with POLY parameter\n \nPlot I(Cx)/1e6A to get pico as multiplier on the Y-axis.\nChange the X-axis to time*1e6V/1s or to V(vc)\n \nPOLY capacitor as used in some SPICE programs:\nCname +node -node POLY 0 c1 c2 c3 ...\n \nFormula: C(x) = c0 + c1*V + c2*V*V + c3*V*V*V + c4*V*V*V*V + ...\n \nExample: \nCvar 10 cathode poly 23.3836e-12 5.1258e-12 + 0.5214e-12 0.0240e-12 0.0004e-12\n \n \nQ = Integral(C(x)dx) \n \nQ= c0*x + c1/2*x**2 +c2/3*x**3 + c3/4*x**4 + c4/5*x**5\n \nQ = 23.3836e-12*x + 5.1258e-12*x*x/2 + 0.5214e-12*x*x*x/3 + 0.0240e-12*x*x*x*x/4 + 0.0004e-12*x*x*x*x*x/5\n \nIn the netlist:\nCvar +node -node Q = 23.3836e-12*x + 5.1258e-12*x*x/2 + 0.5214e-12*x*x*x/3 + 0.0240e-12*x*x*x*x/4 + 0.0004e-12*x*x*x*x*x/5
.options plotwinsize=0
* Just for testing
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1856 1860
WIRE 352 -176 64 -176
WIRE 64 -128 64 -176
WIRE 352 -112 352 -176
WIRE 64 0 64 -48
WIRE 352 0 352 -48
WIRE 352 96 64 96
WIRE 352 112 352 96
WIRE 64 176 64 96
WIRE 352 208 352 192
WIRE 64 272 64 256
FLAG 64 0 0
FLAG 352 0 0
FLAG 352 -176 vc
FLAG 352 208 0
FLAG 352 96 cf
FLAG 64 272 0
SYMBOL cap 336 -112 R0
SYMATTR InstName Cvar
SYMATTR Value Q = 23.3836e-12*x + 5.1258e-12*x*x/2 + 0.5214e-12*x*x*x/3 + 0.0240e-12*x*x*x*x/4 + 0.0004e-12*x*x*x*x*x/5
SYMBOL voltage 64 -144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V7
SYMATTR Value PWL(0 -6 56u 50)
SYMBOL bi 64 256 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName B1
SYMATTR Value I= 23.3836e-12 + 5.1258e-12*V(vc) + 0.5214e-12*V(vc)*V(vc) + 0.0240e-12*V(vc)*V(vc)*V(vc) + 0.0004e-12*V(vc)*V(vc)*V(vc)*V(vc)
SYMBOL res 336 96 R0
SYMATTR InstName R1
SYMATTR Value 1
TEXT 80 -312 Left 0 !.tran 0 11u 1u 0.01u
TEXT 40 -968 Left 0 ;Simulation of nonlinear capacitors with POLY parameter\n \nPlot I(Cx)/1e6A  to get pico as multiplier on the Y-axis.\nChange the  X-axis to  time*1e6V/1s or to V(vc)\n \nPOLY capacitor as used in some SPICE programs:\nCname +node -node POLY 0 c1 c2 c3 ...\n \nFormula: C(x) = c0 + c1*V + c2*V*V + c3*V*V*V + c4*V*V*V*V + ...\n \nExample: \nCvar 10 cathode poly 23.3836e-12 5.1258e-12 + 0.5214e-12 0.0240e-12 0.0004e-12\n \n \nQ = Integral(C(x)dx)   \n \nQ= c0*x + c1/2*x**2 +c2/3*x**3 + c3/4*x**4 + c4/5*x**5\n \nQ = 23.3836e-12*x + 5.1258e-12*x*x/2 + 0.5214e-12*x*x*x/3 + 0.0240e-12*x*x*x*x/4 + 0.0004e-12*x*x*x*x*x/5\n \nIn the netlist:\nCvar +node -node Q = 23.3836e-12*x + 5.1258e-12*x*x/2 + 0.5214e-12*x*x*x/3 + 0.0240e-12*x*x*x*x/4 + 0.0004e-12*x*x*x*x*x/5
TEXT 80 -280 Left 0 !.options plotwinsize=0
TEXT 168 136 Left 0 ;Just for testing
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7154-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 3.4
C1 OUT 0 10
C2 N003 0 1
C3 N004 0 1
C4 N002 0 1
R1 IN N001 100K
Rload OUT 0 25
XU1 N004 OUT N002 0 N003 N003 N001 IN ADM7154_5 Vreg=3.2022 Vref=2.5157 ;pnba Vreg)Vout)Byp)GND)Ref_Sense)Ref)EN)Vin
.tran 5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7154-2.5.asy)
.lib ADM7154_5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -144 32
WIRE 80 32 -32 32
WIRE 464 32 400 32
WIRE 560 32 464 32
WIRE -144 48 -144 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE -144 144 -144 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE -16 224 -32 224
WIRE 80 224 48 224
WIRE 416 224 400 224
WIRE 464 224 416 224
WIRE 464 240 464 224
WIRE -16 320 -32 320
WIRE 80 320 48 320
WIRE 416 320 416 224
WIRE 416 320 400 320
WIRE 464 320 464 304
WIRE 240 400 240 384
FLAG 240 400 0
FLAG 464 320 0
FLAG 464 144 0
FLAG -32 320 0
FLAG -32 224 0
FLAG -144 144 0
FLAG 560 144 0
FLAG -144 32 IN
FLAG 560 32 OUT
SYMBOL voltage -144 32 R0
SYMATTR InstName V1
SYMATTR Value 3.4
SYMBOL cap 448 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL cap 448 240 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 48 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 48 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 544 32 R0
SYMATTR InstName Rload
SYMATTR Value 25
SYMBOL ADM7154-2.5 240 176 R0
SYMATTR InstName U1
TEXT 432 384 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2224fe056646_Fig16_67.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 VGS N003 N002 N_50n l=50n w=500n
VGS VGS 0 0
R1 N003 0 1G
VB N002 0 1
R2 N001 0 1G
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib cmosedu_models.txt
.dc VB 0 2 1m
* Plot -I(VGS)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1748 680
WIRE 384 -128 384 -144
WIRE 384 -96 384 -128
WIRE 384 16 384 -16
WIRE 576 -144 384 -144
WIRE 624 -336 624 -368
WIRE 624 -224 624 -256
WIRE 624 -96 624 -128
WIRE 624 16 624 -16
WIRE 736 -176 624 -176
WIRE 880 -176 816 -176
WIRE 880 -112 880 -176
FLAG 384 16 0
FLAG 384 -128 VGS
FLAG 880 -112 0
FLAG 624 16 0
FLAG 624 -368 0
SYMBOL nmos4 576 -224 R0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
WINDOW 123 -114 109 Left 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 384 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 39 90 Left 0
WINDOW 0 39 62 Left 0
SYMATTR Value 0
SYMATTR InstName VGS
SYMBOL res 608 -112 R0
SYMATTR InstName R1
SYMATTR Value 1G
SYMBOL voltage 720 -176 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 VBottom 0
SYMATTR InstName VB
SYMATTR Value 1
SYMBOL res 640 -240 R180
WINDOW 0 36 76 Left 0
WINDOW 3 36 40 Left 0
SYMATTR InstName R2
SYMATTR Value 1G
TEXT 376 80 Left 0 !.lib cmosedu_models.txt
TEXT 376 56 Left 0 !.dc VB 0 2 1m
TEXT 416 -264 Left 0 ;Plot -I(VGS)
* Z:\tmp\asc_dec_bjh7r6w2\06a54b5845e1_Fig18_5_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
VDD VDD 0 1
M1 N002 Vin 0 0 N_50n l=50n w=500n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 680
WIRE 160 -496 160 -512
WIRE 160 -480 160 -496
WIRE 160 -368 160 -400
WIRE 320 -208 304 -208
WIRE 368 -208 320 -208
WIRE 368 -208 368 -272
WIRE 368 -96 368 -208
WIRE 368 64 368 -96
WIRE 400 -96 368 -96
WIRE 400 64 368 64
WIRE 448 -208 448 -256
WIRE 448 -176 448 -208
WIRE 448 -48 448 -80
WIRE 448 -16 448 -48
WIRE 448 128 448 80
WIRE 720 -48 448 -48
WIRE 736 -208 448 -208
SYMBOL voltage 160 -496 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL nmos4 400 -16 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
FLAG 448 32 0
FLAG 160 -368 0
FLAG 160 -496 VDD
FLAG 448 128 0
FLAG 320 -208 Vin
FLAG 448 -128 0
* Z:\home\khalils\Downloads\files\data\raw_asc\571ac8a3ac5b_diodetest.asc
* Generated by LTspice 26.0.1 for Windows.
D1 P001 N001 10MQ060N
V1 P001 0 0.2
R1 N001 0 500k
C1 N001 0 800n
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 272 160 224
WIRE 288 272 160 272
WIRE 288 288 288 272
WIRE 160 368 160 352
WIRE 288 368 288 352
WIRE 288 368 160 368
WIRE 160 384 160 368
SYMBOL res 144 256 R0
SYMATTR InstName R1
SYMATTR Value 500k
SYMBOL schottky 144 160 R0
SYMATTR InstName D1
SYMATTR Value 10MQ060N
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 272 288 R0
SYMATTR InstName C1
SYMATTR Value 800n
SYMBOL voltage 160 176 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0.2
FLAG 160 80 0
FLAG 160 384 0
TEXT 0 272 Left 2 !.tran 10