Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2996.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2996.asy)
V1 IN 0 3.3
R2 N001 N003 43K
XU1 N003 N005 N002 N004 OUT IN 0 N001 NC_01 NC_02 LTC2996 ;pnba Vth)Vtl)D+)D-)Vptat)Vcc)GND)Vref)_UT)_OT
Q1 N002 N002 N004 0 2N3904
R3 N005 0 102K
R1 N003 N005 36K
C1 N002 N004 470p
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 13m startup
.temp -50 -25 0 25 50 85
.lib LTC2996.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 6468 3784
WIRE -1664 -1392 -1936 -1392
WIRE -1936 -1376 -1936 -1392
WIRE -1664 -1360 -1664 -1392
WIRE -1936 -1280 -1936 -1296
WIRE -1744 -1280 -1760 -1280
WIRE -1360 -1280 -1456 -1280
WIRE -1360 -1264 -1360 -1280
WIRE -1936 -1168 -2016 -1168
WIRE -1824 -1168 -1936 -1168
WIRE -1744 -1168 -1824 -1168
WIRE -1360 -1168 -1360 -1184
WIRE -1360 -1168 -1456 -1168
WIRE -1936 -1152 -1936 -1168
WIRE -1360 -1152 -1360 -1168
WIRE -1824 -1136 -1824 -1168
WIRE -2016 -1104 -2016 -1168
WIRE -2000 -1104 -2016 -1104
WIRE -1824 -1056 -1824 -1072
WIRE -1824 -1056 -1936 -1056
WIRE -1744 -1056 -1824 -1056
WIRE -1360 -1056 -1360 -1072
WIRE -1360 -1056 -1456 -1056
WIRE -1360 -1040 -1360 -1056
WIRE -1664 -960 -1664 -976
WIRE -1360 -944 -1360 -960
SYMBOL res -1376 -1168 R0
SYMATTR InstName R1
SYMATTR Value 36K
SYMBOL res -1376 -1280 R0
SYMATTR InstName R2
SYMATTR Value 43K
SYMBOL res -1376 -1056 R0
SYMATTR InstName R3
SYMATTR Value 102K
SYMBOL LTC2996 -1600 -1104 R0
SYMATTR InstName U1
SYMBOL npn -2000 -1152 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL voltage -1936 -1392 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap -1840 -1136 R0
SYMATTR InstName C1
SYMATTR Value 470p
FLAG -1936 -1280 0
FLAG -1360 -944 0
FLAG -1664 -960 0
FLAG -1936 -1392 IN
FLAG -1760 -1280 OUT
TEXT -1640 -912 Left 2 !.tran 13m startup\n.temp -50 -25 0 25 50 85
* Z:\home\khalils\Downloads\files\data\raw_asc\273e9a656fd3_OP413.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP413.asy)
XU1 IN N001 +V -V OUT OP413 ;pnba In+)In-)V+)V-)OUT
Vin IN 0 SINE(0 1 10K)
V2 -V 0 -15
R2 OUT N001 10K
Rload OUT 0 10K
V1 +V 0 15
R1 N001 0 10K
.tran 1m
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1232 416 -1232
WIRE 528 -1232 512 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 96 -1152 96 -1168
WIRE 208 -1152 208 -1168
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 368 -1088
WIRE 768 -1088 768 -1104
WIRE 368 -1072 368 -1088
WIRE 96 -1056 96 -1072
WIRE 208 -1056 208 -1072
WIRE 768 -992 768 -1008
WIRE 368 -976 368 -992
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 528 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL Opamps\\OP413 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 96 -1168 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 368 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage 208 -1168 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
FLAG 96 -1168 +V
FLAG 96 -1056 0
FLAG 368 -976 0
FLAG 768 -1104 OUT
FLAG 368 -1088 IN
FLAG 576 -1136 +V
FLAG 208 -1168 -V
FLAG 576 -1072 -V
FLAG 416 -1232 0
FLAG 768 -992 0
FLAG 208 -1056 0
TEXT 720 -936 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\5e498846c672_Fig9_24_nmos.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1) and 1/d(Id(m1)) (to get ro)
VGS N002 0 1.05
VDS N001 0 0
M1 N001 N002 0 0 N_1u l=2u w=10u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VDS 0 5
.include cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 680
WIRE 640 80 448 80
WIRE 448 112 448 80
WIRE 640 112 640 80
WIRE 496 160 448 160
WIRE 400 192 288 192
WIRE 288 208 288 192
WIRE 448 224 448 208
WIRE 640 224 640 192
WIRE 288 304 288 288
SYMBOL voltage 288 192 R0
WINDOW 0 -85 56 Left 0
WINDOW 3 -85 84 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 1.05
SYMBOL voltage 640 96 R0
WINDOW 0 40 56 Left 0
WINDOW 3 24 104 Invisible 0
SYMATTR InstName VDS
SYMATTR Value 0
SYMBOL nmos4 400 112 R0
WINDOW 0 59 18 Left 0
WINDOW 3 64 75 Left 0
WINDOW 123 64 103 Left 0
SYMATTR InstName M1
SYMATTR Value N_1u
SYMATTR Value2 l=2u w=10u
FLAG 288 304 0
FLAG 448 224 0
FLAG 640 224 0
FLAG 496 160 0
TEXT 392 280 Left 0 !.dc VDS 0 5
TEXT 392 304 Left 0 !.include cmosedu_models.txt
TEXT 416 48 Left 0 ;Plot Id(M1) and 1/d(Id(m1)) (to get ro)
* Z:\home\khalils\Downloads\files\data\raw_asc\44bb3376cf75_Draft8.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 N001 PMOS l=90nm w=405nm
vgs1 N002 0 -1.2
vds1 N001 0 -1.2
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc vds1 0 -1.2 0.2 vgs1 0 -1.2 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 64 -192 64
WIRE 96 64 -112 64
WIRE -192 112 -192 64
WIRE -256 160 -352 160
WIRE -112 160 -112 64
WIRE -112 160 -192 160
WIRE 96 160 96 64
WIRE -256 192 -256 160
WIRE -240 192 -256 192
WIRE -48 208 -192 208
WIRE -48 240 -48 208
WIRE -48 240 -80 240
WIRE 16 240 -48 240
WIRE -48 256 -48 240
WIRE 16 256 16 240
WIRE 96 256 96 240
WIRE 96 256 16 256
WIRE -352 272 -352 240
WIRE -80 272 -80 240
WIRE -80 272 -352 272
SYMBOL voltage -352 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vgs1
SYMATTR Value -1.2
SYMBOL voltage 96 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vds1
SYMATTR Value -1.2
SYMBOL pmos4 -240 112 R0
SYMATTR InstName M1
SYMATTR Value2 l=90nm w=405nm
FLAG -48 256 0
TEXT -384 280 Left 2 !.dc vds1 0 -1.2 0.2 vgs1 0 -1.2 0.2
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG734.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 3
V2 N003 0 0
V3 N004 0 PULSE(0 3.3 0 20n 20n 10u 20u)
R1 N002 0 300
C1 N002 0 35p
XU1 N004 N001 N002 N003 +V 0 ADG734 ;pnba IN)SA)D)SB)Vdd)GND
.tran 100u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG734.asy)
.lib ADG734.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1696 -272 -2032 -272
WIRE -2032 -256 -2032 -272
WIRE -1424 -240 -1504 -240
WIRE -1312 -240 -1424 -240
WIRE -1424 -224 -1424 -240
WIRE -1312 -224 -1312 -240
WIRE -1696 -208 -1920 -208
WIRE -1920 -192 -1920 -208
WIRE -2032 -160 -2032 -176
WIRE -1696 -144 -1776 -144
WIRE -1424 -128 -1424 -144
WIRE -1312 -128 -1312 -160
WIRE -1920 -96 -1920 -112
WIRE -1776 -80 -1776 -144
WIRE -1600 -16 -1600 -32
WIRE -1776 32 -1776 0
FLAG -2032 -160 0
FLAG -1920 -96 0
FLAG -1776 32 0
FLAG -1600 -368 +V
FLAG -1424 -128 0
FLAG -1600 -16 0
FLAG -1312 -128 0
SYMBOL voltage -2032 -272 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL voltage -1920 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage -1776 -96 R0
WINDOW 3 24 136 Left 2
SYMATTR Value PULSE(0 3.3 0 20n 20n 10u 20u)
SYMATTR InstName V3
SYMBOL res -1440 -240 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL cap -1328 -224 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL ADG734 -1600 -192 R0
SYMATTR InstName U1
TEXT -1360 -40 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7142-5.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7142-5.0.asy)
V1 IN 0 6
XU1 IN OUT IN N001 OUT 0 ADP7118 Vref=5 ;pnba Vin)Sense)EN)SS)Vout)GND
C2 N001 0 4.7n
Rload OUT 0 30
C1 OUT 0 2.2 Rser=1.5m
.tran 6m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 30
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 6
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 4.7n
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
SYMBOL ADP7142-5.0 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 6m startup
* Z:\tmp\asc_dec_bjh7r6w2\0fca00d6e7d1_5400-6_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
V2 -V 0 -15
C1 N002 N001 4.7p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2836 1472
WIRE 2304 624 1936 624
WIRE 1936 688 1936 624
WIRE 2016 688 1936 688
WIRE 2192 688 2080 688
WIRE 1936 816 1936 688
WIRE 1952 816 1936 816
WIRE 2192 816 2192 688
WIRE 2192 816 2144 816
WIRE 2192 880 2192 816
WIRE 1392 896 1392 880
WIRE 1520 896 1520 880
WIRE 1392 992 1392 976
WIRE 1520 992 1520 976
SYMBOL voltage 1392 880 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL cap 2080 672 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 4.7p
FLAG 1520 992 0
FLAG 1520 880 +V
FLAG 1392 992 0
FLAG 1392 880 -V
* Z:\home\khalils\Downloads\files\data\raw_asc\36cafe5fd1c1_diodechar_01_02_01_incvs_vd_vr_is.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 0
D1 N001 N002 1N4001
R1 N002 0 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 2 0.01
.lib ../../01_models/1N4001.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 112 48 -16 48
WIRE 288 48 176 48
WIRE -16 128 -16 48
WIRE 288 128 288 48
WIRE -16 272 -16 208
WIRE 144 272 -16 272
WIRE 288 272 288 208
WIRE 288 272 144 272
WIRE 144 288 144 272
SYMBOL res 272 112 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage -16 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL diode 112 64 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4001
FLAG 144 288 0
TEXT -48 312 Left 2 !.dc V1 0 2 0.01
TEXT -48 344 Left 2 !.lib ../../01_models/1N4001.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1762-0.9.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1762-0.9.asy)
C3 N002 0 1
R2 N001 IN 50K
C4 OUT 0 10
V1 IN 0 1.1
C2 N003 0 10n
C1 N004 0 1
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1762 Radj=6K ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
R1 OUT 0 .6
.tran 1m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL ADP1762-0.9 224 176 R0
SYMATTR InstName U1
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -128 -32 R0
SYMATTR InstName V1
SYMATTR Value 1.1
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value .6
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\41122ef102f5_out.asc
* Generated by LTspice 26.0.1 for Windows.
L0 N005 N004 L
C1 N008 0 C
C2 N001 N002 C
R4 N001 0 R
C5 N005 N008 C
R1 N003 N005 R
R0 N003 N002 R
R2 N004 N007 R
C4 N006 0 C
C0 N007 0 C
C3 N008 N007 C
R3 N005 N008 R
L1 N006 N005 L
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1000 1000
WIRE 216 32 208 32
WIRE 296 32 336 32
WIRE 336 40 336 32
WIRE 336 120 336 144
WIRE 216 144 192 144
WIRE 296 144 336 144
WIRE 192 168 192 144
WIRE 192 248 192 256
WIRE 192 288 192 256
WIRE 192 352 192 344
WIRE 472 144 448 144
WIRE 552 144 576 144
WIRE 448 152 448 144
WIRE 448 232 448 256
WIRE 352 272 352 256
WIRE 352 336 352 336
WIRE 160 0 80 32
WIRE 160 64 208 32
WIRE 192 368 192 344
WIRE 352 368 352 336
WIRE 80 384 80 288
WIRE 576 256 576 216
WIRE 240 256 192 256
WIRE 304 256 352 256
WIRE 576 144 576 144
WIRE 576 208 576 216
WIRE 352 160 336 144
WIRE 352 224 352 256
WIRE 80 152 80 32
WIRE 80 232 80 288
WIRE 448 144 336 144
WIRE 448 256 352 256
SYMBOL cap 144 0 R0
SYMATTR InstName C2
SYMBOL cap 304 240 R90
SYMATTR InstName C3
SYMBOL Misc\EuropeanResistor 320 24 R0
SYMATTR InstName R1
SYMBOL cap 336 272 R0
SYMATTR InstName C1
SYMBOL cap 336 160 R0
SYMATTR InstName C5
SYMBOL ind 568 128 R90
SYMATTR InstName L1
SYMBOL Misc\EuropeanResistor 64 136 R0
SYMATTR InstName R4
SYMBOL Misc\EuropeanResistor 312 16 R90
SYMATTR InstName R0
SYMBOL Misc\EuropeanResistor 432 136 R0
SYMATTR InstName R3
SYMBOL Misc\EuropeanResistor 176 152 R0
SYMATTR InstName R2
SYMBOL cap 560 144 R0
SYMATTR InstName C4
SYMBOL cap 176 288 R0
SYMATTR InstName C0
SYMBOL ind 312 128 R90
SYMATTR InstName L0
FLAG 192 368 0
FLAG 352 368 0
FLAG 80 384 0
FLAG 576 256 0
* Z:\home\khalils\Downloads\files\data\raw_asc\121e0390bb8a_Apartado_A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R1 N001 0 1000
R2 Vout N001 1000
V1 Vcc 0 12
XU1 Vin N001 Vcc Vee Vout level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
V3 Vin 0 SINE(0) AC 1 0
V2 0 Vee 12
.ac dec 100000 10 1000000
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 680
WIRE 592 -224 528 -224
WIRE 752 -224 672 -224
WIRE 848 -224 752 -224
WIRE 992 -224 928 -224
WIRE 528 -208 528 -224
WIRE 144 -144 144 -192
WIRE 880 -80 880 -112
WIRE 752 -64 752 -224
WIRE 848 -64 752 -64
WIRE 992 -48 992 -224
WIRE 992 -48 912 -48
WIRE 1040 -48 992 -48
WIRE 848 -32 464 -32
WIRE 144 0 144 -64
WIRE 144 0 80 0
WIRE 80 16 80 0
WIRE 464 16 464 -32
WIRE 880 16 880 -16
WIRE 144 64 144 0
WIRE 464 128 464 96
WIRE 144 192 144 144
SYMBOL voltage 464 0 R0
WINDOW 3 24 96 Invisible 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0)
SYMATTR Value2 AC 1 0
SYMATTR InstName V3
SYMBOL voltage 144 48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL Opamps\\UniversalOpamp2 880 -48 R0
SYMATTR InstName U1
SYMBOL res 688 -240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL res 944 -240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1000
SYMBOL voltage 144 -160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
FLAG 528 -208 0
FLAG 464 128 0
FLAG 80 16 0
FLAG 144 -192 Vcc
FLAG 880 -112 Vcc
FLAG 880 16 Vee
FLAG 144 192 Vee
FLAG 464 -32 Vin
FLAG 1040 -48 Vout
TEXT 256 -152 Left 2 !.ac dec 100000 10 1000000
* Z:\home\khalils\Downloads\files\data\raw_asc\0019e8de1157_2nd_order_butterworth_lp.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6241.asy)
C1 0 N002 112nF
R2 N002 N001 1k
XU1 N002 OUT V+ V- OUT LTC6241 ;pnba IN+)IN-)VCC)VEE)OUT
V1 V+ 0 5
V3 IN 0 PWL(1m 0 1.001m 1 2m 1 2.001m 0) AC 1V
R1 N001 IN 1k
C2 OUT N001 224nF
V2 V- 0 -5
.ac oct 10 10 100k
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1040 680
WIRE -640 -48 -640 -64
WIRE -544 -48 -544 -64
WIRE -640 64 -640 32
WIRE -544 64 -544 32
WIRE -256 208 -288 208
WIRE -160 208 -256 208
WIRE -256 256 -256 208
WIRE -240 256 -256 256
WIRE -160 272 -160 208
WIRE -160 272 -176 272
WIRE -112 272 -160 272
WIRE -96 272 -112 272
WIRE -464 288 -480 288
WIRE -448 288 -464 288
WIRE -352 288 -352 208
WIRE -352 288 -368 288
WIRE -336 288 -352 288
WIRE -240 288 -256 288
WIRE -480 304 -480 288
WIRE -256 320 -256 288
WIRE -480 416 -480 384
WIRE -256 416 -256 384
SYMBOL res -240 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL LTC6241 -208 272 R0
WINDOW 3 -50 -91 Left 2
SYMATTR InstName U1
SYMBOL cap -240 384 R180
WINDOW 0 -26 30 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C1
SYMATTR Value 112nF
SYMBOL cap -288 192 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 224nF
SYMBOL voltage -640 -64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -480 288 R0
WINDOW 3 24 160 Left 2
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PWL(1m 0 1.001m 1 2m 1 2.001m 0)
SYMATTR Value2 AC 1V
SYMATTR InstName V3
SYMBOL voltage -544 -64 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res -352 272 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG -640 64 0
FLAG -544 64 0
FLAG -208 304 V-
FLAG -544 -64 V-
FLAG -640 -64 V+
FLAG -208 240 V+
FLAG -256 416 0
FLAG -480 416 0
FLAG -464 288 IN
FLAG -112 272 OUT
TEXT -136 400 Left 2 !.ac oct 10 10 100k
* Z:\home\khalils\Downloads\files\data\raw_asc\30ac6d3870e8_ADA4523-1.asc
* Generated by LTspice 26.0.1 for Windows.
* V(OUT) = 101*Rsense*Isense
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4523-1.asy)
V1 +V 0 28
XU1 +V N001 N003 0 N002 +V 0 ADA4523-1 ;pnba _SD)IN-)IN+)V-)OUT)V+)SDCOM
D1 N002 OUT 1N4148
Isense 0 N003 0
R2 N001 0 10
R1 OUT N001 1K
Rsense N003 0 1K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc Isense 0 1u 10n
.lib ADA4523-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 948 680
WIRE 112 -64 80 -64
WIRE 240 -64 192 -64
WIRE 448 -64 240 -64
WIRE 592 -64 528 -64
WIRE 16 0 16 -16
WIRE 336 32 336 0
WIRE 368 32 336 32
WIRE 336 64 336 32
WIRE 368 64 368 32
WIRE 240 80 240 -64
WIRE 320 80 240 80
WIRE 464 96 384 96
WIRE 592 96 592 -64
WIRE 592 96 528 96
WIRE 624 96 592 96
WIRE 16 112 16 80
WIRE 320 112 16 112
WIRE -112 128 -112 96
WIRE 16 144 16 112
WIRE 368 160 368 128
WIRE 336 192 336 128
WIRE -112 256 -112 208
WIRE 16 256 16 224
SYMBOL voltage -112 112 R0
SYMATTR InstName V1
SYMATTR Value 28
SYMBOL res 208 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL ADA4523-1 352 96 R0
WINDOW 3 -164 42 Left 2
WINDOW 0 -85 -34 Left 2
SYMATTR InstName U1
SYMBOL res 544 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL diode 464 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 7 99 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 0 128 R0
SYMATTR InstName Rsense
SYMATTR Value 1K
SYMBOL current 16 0 R0
SYMATTR InstName Isense
SYMATTR Value 0
FLAG -112 256 0
FLAG 336 0 +V
FLAG -112 96 +V
FLAG 624 96 OUT
FLAG 16 256 0
FLAG 16 -16 0
FLAG 80 -64 0
FLAG 368 160 0
FLAG 336 192 0
TEXT 296 248 Left 2 ;V(OUT) = 101*Rsense*Isense
TEXT 320 296 Left 2 !.dc Isense 0 1u 10n
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3304C.asc
* Generated by LTspice 26.0.1 for Windows.
* The output voltage is adjustable from \n0.5V to 3.65V in 50mV increments.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3304C.asy)
Rload OUT 0 0.3
C1 OUT 0 10 m=2 Rser=10m
R1 IN N001 10
C2 N001 0 1
V1 IN 0 4
R4 OUT N002 500K
XU1 IN N001 N003 OUT 0 0 N001 N002 N001 LTC3304C Vout_trim=1.8 ;pnba VIN)EN)SW)VOUT)AGND)PGND)AVIN)PGOOD)MODE/SYNC
L1 N003 OUT 100n Rser=2m
.tran 1.5m startup
.lib LTC3304C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2652 1844
WIRE 1376 1248 1344 1248
WIRE 1488 1248 1376 1248
WIRE 1712 1248 1488 1248
WIRE 1344 1264 1344 1248
WIRE 1488 1264 1488 1248
WIRE 1712 1296 1712 1248
WIRE 1344 1360 1344 1344
WIRE 1488 1360 1488 1344
WIRE 1488 1360 1424 1360
WIRE 1552 1360 1488 1360
WIRE 1904 1360 1872 1360
WIRE 2016 1360 1984 1360
WIRE 1424 1376 1424 1360
WIRE 1424 1456 1424 1440
WIRE 1488 1472 1488 1360
WIRE 1552 1472 1488 1472
WIRE 1904 1472 1872 1472
WIRE 2016 1472 2016 1360
WIRE 2016 1472 1984 1472
WIRE 2112 1472 2016 1472
WIRE 2160 1472 2112 1472
WIRE 2208 1472 2160 1472
WIRE 2112 1488 2112 1472
WIRE 2208 1488 2208 1472
WIRE 1488 1584 1488 1472
WIRE 1552 1584 1488 1584
WIRE 2016 1584 2016 1472
WIRE 2016 1584 1872 1584
WIRE 2112 1584 2112 1552
WIRE 2208 1584 2208 1568
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
SYMBOL res 1472 1248 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL ind 1888 1488 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100n
SYMATTR SpiceLine Rser=2m
SYMBOL res 2000 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 500K
SYMBOL LTC3304C 1712 1456 R0
WINDOW 39 -99 370 Center 2
SYMATTR InstName U1
SYMATTR SpiceLine Vout_trim=1.8
SYMBOL cap 2096 1488 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 m=2
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=10m
SYMBOL VOLTAGE 1344 1248 R0
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL cap 1408 1376 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 2192 1472 R0
SYMATTR InstName Rload
SYMATTR Value 0.3
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1344 1360 0
FLAG 2208 1584 0
FLAG 2112 1584 0
FLAG 1376 1248 IN
FLAG 2160 1472 OUT
FLAG 1424 1456 0
TEXT 2024 1736 Left 2 !.tran 1.5m startup
TEXT 1528 1768 Left 2 ;The output voltage is adjustable from \n0.5V to 3.65V in 50mV increments.