Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\8ede20ffc9c2_Draft15.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N002 15k
J1 0 0 N001 LS844
V1 N002 0 -15
.model NJF NJF
.model PJF PJF
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.jft
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 80 64 80
WIRE 304 80 240 80
WIRE 432 80 384 80
WIRE 432 96 432 80
WIRE 64 208 64 80
WIRE 208 208 208 128
WIRE 208 208 64 208
WIRE 432 208 432 176
WIRE 432 208 208 208
DATAFLAG 432 80 ""
SYMBOL voltage 432 80 R0
SYMATTR InstName V1
SYMATTR Value -15
SYMBOL njf 144 128 R270
SYMATTR InstName J1
SYMATTR Value LS844
SYMBOL res 288 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 15k
FLAG 208 208 0
TEXT -80 224 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1990.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1990.asy)
V1 +V 0 5
XU1 0 N002 0 -V N003 OUT +V N001 LT1990 ;pnba REF)IN-)IN+)VEE)GAIN2)OUT)VCC)GAIN1
V2 -V 0 -5
V3 N002 0 SINE(0 1 10K)
.tran 1m
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 112 144 80
WIRE 368 160 336 160
WIRE -32 192 -256 192
WIRE -256 208 -256 192
WIRE -32 224 -32 192
WIRE -16 224 -32 224
WIRE -496 240 -496 224
WIRE -384 240 -384 224
WIRE 384 240 336 240
WIRE -16 256 -32 256
WIRE 368 288 336 288
WIRE -256 304 -256 288
WIRE -32 304 -32 256
WIRE -32 304 -256 304
WIRE -256 320 -256 304
WIRE -496 336 -496 320
WIRE -384 336 -384 320
WIRE 80 432 80 400
WIRE 144 432 144 400
SYMBOL voltage -496 224 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -384 224 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL LT1990 160 240 R0
SYMATTR InstName U1
SYMBOL voltage -256 192 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1 10K)
FLAG -256 320 0
FLAG -496 336 0
FLAG -384 336 0
FLAG 384 240 OUT
FLAG 80 432 0
FLAG -496 224 +V
FLAG -384 224 -V
FLAG 144 80 +V
FLAG 144 432 -V
TEXT 368 352 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1761-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 10
Rload OUT 0 500
C2 OUT N001 .01
XU1 IN 0 IN N001 OUT LT1761-1.2 ;pnba IN)GND)_SHDN)BYP)OUT
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1761-1.2.asy)
.lib LT1761.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 48 -224 48
WIRE 16 48 -16 48
WIRE 336 48 304 48
WIRE 416 48 336 48
WIRE 512 48 416 48
WIRE -224 64 -224 48
WIRE 336 64 336 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE -16 144 -16 48
WIRE 16 144 -16 144
WIRE 336 144 336 128
WIRE 336 144 304 144
WIRE -224 160 -224 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 160 240 160 208
FLAG -224 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 160 240 0
FLAG -224 48 IN
FLAG 512 48 OUT
SYMBOL voltage -224 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL cap 320 64 R0
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL PowerProducts\\LT1761-1.2 160 96 R0
SYMATTR InstName U1
TEXT 352 232 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\7e9b22f24db3_lab6.asc
* Generated by LTspice 26.0.1 for Windows.
V1 VDD 0 5
M3 out N003 0 0 RIT4007N7
M4 out N003 N002 N002 RIT4007P7
V2 A 0 PULSE(0 5 0 1n 1n .5m 1m)
C2 out 0 20p
Q1 N006 N005 A 0 NPN
Q2 N004 N006 N009 0 NPN
Q3 N001 N004 N007 0 NPN
Q4 N008 N009 0 0 NPN
D1 N007 N008 D
R1 VDD N005 3.9k
R2 VDD N004 1.5k
R3 VDD N001 0.1k
R4 N009 0 1.0k
C1 N008 0 20p
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc CMOS/CD4007.mod
.tran 0 10m 0
.ic V(out)=5
.meas avg(V(out)*(Id(M4))
.inc CA3086.mod
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1624 680
WIRE 1200 -144 1200 -176
WIRE 1200 -144 1088 -144
WIRE 1232 -144 1200 -144
WIRE 1424 -144 1232 -144
WIRE 1088 -128 1088 -144
WIRE 80 -48 48 -48
WIRE 192 -48 160 -48
WIRE 1424 -32 1424 -64
WIRE 48 0 48 -48
WIRE 528 0 528 -32
WIRE 528 0 448 0
WIRE 400 16 352 16
WIRE 1232 16 1232 -64
WIRE 1360 16 1232 16
WIRE 1088 80 1088 -48
WIRE 512 96 448 96
WIRE 1232 96 1232 16
WIRE 512 112 512 96
WIRE 688 112 512 112
WIRE 512 128 512 112
WIRE 1168 144 1136 144
WIRE 1424 144 1424 64
WIRE 352 208 352 16
WIRE 464 208 352 208
WIRE 688 224 688 112
WIRE 1424 272 1424 208
WIRE 1568 272 1424 272
WIRE 1424 288 1424 272
WIRE 1232 336 1232 192
WIRE 1360 336 1232 336
WIRE 1232 352 1232 336
WIRE 512 384 512 224
WIRE 1568 384 1568 272
WIRE 1424 400 1424 384
WIRE 1232 464 1232 432
FLAG 48 0 0
FLAG 512 384 0
FLAG 192 -48 VDD
FLAG 16 144 A
IOPIN 16 144 In
FLAG 16 224 0
FLAG 512 96 out
IOPIN 512 96 In
FLAG 688 288 0
FLAG 1232 464 0
FLAG 1424 400 0
FLAG 1200 -176 VDD
IOPIN 1200 -176 In
FLAG 1568 448 0
FLAG 1040 144 A
IOPIN 1040 144 In
SYMBOL voltage 176 -48 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL nmos 464 128 R0
SYMATTR InstName M3
SYMATTR Value RIT4007N7
SYMBOL pmos 400 96 M180
SYMATTR InstName M4
SYMATTR Value RIT4007P7
SYMBOL voltage 16 128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 1n 1n .5m 1m)
SYMBOL cap 672 224 R0
SYMATTR InstName C2
SYMATTR Value 20p
SYMBOL npn 1136 80 R90
SYMATTR InstName Q1
SYMBOL npn 1168 96 R0
SYMATTR InstName Q2
SYMBOL npn 1360 -32 R0
SYMATTR InstName Q3
SYMBOL npn 1360 288 R0
SYMATTR InstName Q4
SYMBOL diode 1408 144 R0
SYMATTR InstName D1
SYMBOL res 1072 -144 R0
SYMATTR InstName R1
SYMATTR Value 3.9k
SYMBOL res 1216 -160 R0
SYMATTR InstName R2
SYMATTR Value 1.5k
SYMBOL res 1408 -160 R0
SYMATTR InstName R3
SYMATTR Value 0.1k
SYMBOL res 1216 336 R0
SYMATTR InstName R4
SYMATTR Value 1.0k
SYMBOL cap 1552 384 R0
SYMATTR InstName C1
SYMATTR Value 20p
TEXT 104 480 Left 2 !.inc CMOS/CD4007.mod
TEXT -56 500 Left 2 !.tran 0 10m 0
TEXT 96 328 Left 2 !.ic V(out)=5
TEXT -176 312 Left 2 !.meas avg(V(out)*(Id(M4))
TEXT 104 520 Left 2 !.inc CA3086.mod
* Z:\home\khalils\Downloads\files\data\raw_asc\05217138f05a_eje2.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N003 N002 1
C2 N003 N005 30p
R2 N001 0 50
L1 N001 N002 2.1187e-04 Rser=0
RL1 N005 0 2
rpc1 N004 0 0.2
I1 0 N001 AC 4
C1 N001 N004 7.797e-09 Rser=0
.ac dec 10000 1.9e6 2.1e6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -112 -48 -272 -48
WIRE -16 -48 -112 -48
WIRE 112 -48 -16 -48
WIRE 240 -48 192 -48
WIRE 352 -48 320 -48
WIRE -16 -32 -16 -48
WIRE 352 -16 352 -48
WIRE -272 0 -272 -48
WIRE -112 16 -112 -48
WIRE -16 64 -16 32
WIRE 352 64 352 48
WIRE -272 160 -272 80
WIRE -112 160 -112 96
WIRE -112 160 -272 160
WIRE -16 160 -16 144
WIRE -16 160 -112 160
WIRE 352 160 352 144
WIRE 352 160 -16 160
SYMBOL res 336 48 R0
SYMATTR InstName RL1
SYMATTR Value 2
SYMBOL current -272 80 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 24 52 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value ""
SYMATTR Value2 AC 4
SYMBOL ind 96 -32 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.1187e-04
SYMATTR SpiceLine Rser=0
SYMBOL cap -32 -32 R0
SYMATTR InstName C1
SYMATTR Value 7.797e-09
SYMATTR SpiceLine Rser=0
SYMBOL cap 336 -16 R0
SYMATTR InstName C2
SYMATTR Value 30p
SYMBOL res -32 48 R0
SYMATTR InstName rpc1
SYMATTR Value 0.2
SYMBOL res -128 0 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL res 336 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1
FLAG 352 160 0
TEXT -304 152 Left 2 !.ac dec 10000 1.9e6 2.1e6
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6995-1.asc
* Generated by LTspice 26.0.1 for Windows.
* 60 Second Power On Reset\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6995-1.asy)
XU1 0 0 N002 N003 N001 OUT LTC6995-1 ;pnba RST)GND)SET)DIV)V+)OUT
R2 N003 0 523K
R1 N001 N003 1000K
R3 N002 OUT 178K
V1 N001 0 PULSE(0 5 5 10 10 100 200 2)
.tran 500 startup
.lib LTC6995-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 996 680
WIRE 368 48 0 48
WIRE 112 96 96 96
WIRE 368 96 368 48
WIRE 368 96 336 96
WIRE 400 96 368 96
WIRE 112 176 96 176
WIRE 384 176 336 176
WIRE 560 176 384 176
WIRE 384 192 384 176
WIRE 560 192 560 176
WIRE 0 256 0 48
WIRE 16 256 0 256
WIRE 112 256 96 256
WIRE 352 256 336 256
WIRE 352 288 352 256
WIRE 384 288 384 272
WIRE 384 288 352 288
WIRE 560 288 560 272
WIRE 384 304 384 288
WIRE 384 400 384 384
SYMBOL res 368 176 R0
SYMATTR InstName R1
SYMATTR Value 1000K
SYMBOL voltage 560 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 5 10 10 100 200 2)
SYMBOL res 112 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 178K
SYMBOL res 368 288 R0
SYMATTR InstName R2
SYMATTR Value 523K
SYMBOL SpecialFunctions\\LTC6995-1 224 176 R0
SYMATTR InstName U1
FLAG 96 176 0
FLAG 400 96 OUT
FLAG 560 288 0
FLAG 384 400 0
FLAG 96 96 0
TEXT 224 16 Bottom 2 ;60 Second Power On Reset\nStartup Modeled
TEXT 520 376 Left 2 !.tran 500 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG749.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nCharge Injection measurement not included in the data sheet \nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG749.asy)
V4 SB 0 0
XU2 IN SA D SB +V 0 ADG749 ;pnba IN)SA)D)SB)Vdd)GND
C1 D 0 36p
V3 +V 0 5
V1 IN 0 PULSE(0 3 25u 1n 1n 20u)
R1 D 0 301
V2 SA 0 3
.tran 75u
.lib ADG749.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 0 -48 -48
WIRE -176 64 -512 64
WIRE -144 64 -176 64
WIRE -624 96 -624 64
WIRE -512 96 -512 64
WIRE 80 96 48 96
WIRE 128 96 80 96
WIRE 256 96 128 96
WIRE -176 128 -400 128
WIRE -144 128 -176 128
WIRE 128 128 128 96
WIRE 256 128 256 96
WIRE -624 192 -624 176
WIRE -512 192 -512 176
WIRE -400 192 -400 128
WIRE -176 192 -288 192
WIRE -144 192 -176 192
WIRE 128 240 128 208
WIRE 256 240 256 192
WIRE -400 304 -400 272
WIRE -288 304 -288 192
WIRE -48 336 -48 304
WIRE -288 416 -288 384
SYMBOL voltage -624 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -400 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 0
SYMBOL voltage -512 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL voltage -288 288 R0
WINDOW 3 24 102 Left 2
SYMATTR Value PULSE(0 3 25u 1n 1n 20u)
SYMATTR InstName V1
SYMBOL res 112 112 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL ADG749 -48 144 R0
SYMATTR InstName U2
SYMBOL cap 240 128 R0
SYMATTR InstName C1
SYMATTR Value 36p
FLAG 128 240 0
FLAG 256 240 0
FLAG -48 336 0
FLAG -288 416 0
FLAG -512 192 0
FLAG -48 -48 +V
FLAG -624 192 0
FLAG -624 64 +V
FLAG -400 304 0
FLAG -176 64 SA
FLAG -176 128 SB
FLAG -176 192 IN
FLAG 80 96 D
TEXT 176 392 Left 2 !.tran 75u
TEXT -640 -216 Left 2 ;Note:\nCharge Injection measurement not included in the data sheet \nSwitch shown for a logic 0 input
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6401-8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6401-8.asy)
XU1 0 0 N001 N002 N006 N007 N007 N004 N005 N003 LTC6401-8 ;pnba IN-)Vocm)V+)OUT+)OUT-)V-)_EN)IN+)OUTF-)OUTF+
V1 N004 0 SINE(0 10m 100Meg)
V4 N001 0 1.5
V2 N007 0 -1.5
.tran 100n
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 112 -80 112
WIRE -80 128 -80 112
WIRE 192 128 192 112
WIRE 352 160 336 160
WIRE 80 208 64 208
WIRE 352 208 336 208
WIRE -80 224 -80 208
WIRE -224 272 -240 272
WIRE 80 272 -144 272
WIRE 352 272 336 272
WIRE 352 320 336 320
WIRE 144 384 144 368
WIRE 192 384 192 368
WIRE 192 384 144 384
WIRE 240 384 240 368
WIRE 192 416 192 384
WIRE 192 512 192 496
SYMBOL LTC6401-8 208 240 R0
WINDOW 3 58 145 Left 2
SYMATTR InstName U1
SYMBOL voltage -128 272 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10m 100Meg)
SYMBOL voltage -80 112 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 1.5
SYMBOL voltage 192 400 R0
SYMATTR InstName V2
SYMATTR Value -1.5
FLAG -240 272 0
FLAG 64 208 0
FLAG -80 224 0
FLAG 192 512 0
FLAG 240 384 0
TEXT 376 448 Left 2 !.tran 100n
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5682R.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5682R.asy)
XU2 vDAC Vdd 0 vOUT AD5682R Gain=2 ;pnba Vdac)Vdd)GND)Vout
V1 Vdd 0 5
I1 0 0 1m AC 1
Vdac1 NC_02 0 1.25
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
CLOAD NC_01 0 10n
.tran 200u
.lib AD5682R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 464 112 192 112
WIRE -800 144 -800 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 1m
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
SYMBOL AD5682R -208 112 R0
SYMATTR InstName U2
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX8627.asc
* Generated by LTspice 26.0.1 for Windows.
V1 vIN 0 3.6
L1 vIN N001 1 Rser=17m
C1 vOUT 0 22 m=2
Rload vOUT 0 50
R1 vOUT N002 2.21Meg
R2 N002 0 294k
R3 N003 vOUT 402k
R4 0 N003 102k
XU1 0 vIN vIN N003 vOUT N001 N002 vOUT MAX8627 fault_delay=0.8m ;pnba GND)BATT)ON)FB)POUT)LX)ILIM)OUTS
.tran 1.4m startup
* Fault delay is parameterized for fast simulation,\nbut it is fixed at 64 ms on the real part.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX8627.asy)
.lib MAX8627.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1080 680
WIRE 288 -112 144 -112
WIRE 496 -112 368 -112
WIRE 48 -32 32 -32
WIRE 144 -32 144 -112
WIRE 144 -32 48 -32
WIRE 176 -32 144 -32
WIRE 496 -32 496 -112
WIRE 496 -32 464 -32
WIRE 32 -16 32 -32
WIRE 496 48 464 48
WIRE 544 48 496 48
WIRE 656 48 544 48
WIRE 752 48 656 48
WIRE 800 48 752 48
WIRE 544 64 544 48
WIRE 800 64 800 48
WIRE 32 80 32 64
WIRE 144 96 144 -32
WIRE 176 96 144 96
WIRE 656 112 656 48
WIRE 496 128 496 48
WIRE 496 128 464 128
WIRE 800 160 800 144
WIRE 544 176 544 128
WIRE -48 224 -80 224
WIRE 80 224 32 224
WIRE 176 224 80 224
WIRE 656 224 656 192
WIRE 656 224 464 224
WIRE 80 240 80 224
WIRE 656 240 656 224
WIRE 80 336 80 320
WIRE 656 336 656 320
WIRE 320 384 320 368
WIRE -80 432 -80 224
WIRE 752 432 752 48
WIRE 752 432 -80 432
FLAG 32 80 0
FLAG 320 384 0
FLAG 544 176 0
FLAG 800 160 0
FLAG 48 -32 vIN
FLAG 800 48 vOUT
FLAG 80 336 0
FLAG 656 336 0
SYMBOL voltage 32 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMBOL ind 272 -96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=17m
SYMBOL cap 528 64 R0
WINDOW 123 24 84 Left 2
SYMATTR Value2 m=2
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 784 48 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL res -64 208 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2.21Meg
SYMBOL res 64 224 R0
SYMATTR InstName R2
SYMATTR Value 294k
SYMBOL res 640 208 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 402k
SYMBOL res 640 336 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R4
SYMATTR Value 102k
SYMBOL MAX8627 320 144 R0
SYMATTR InstName U1
TEXT 472 400 Left 2 !.tran 1.4m startup
TEXT 96 456 Left 2 ;Fault delay is parameterized for fast simulation,\nbut it is fixed at 64 ms on the real part.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4607.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4607.asy)
C1 OUT 0 330
V1 IN 0 15
R2 0 N009 4.12K
R3 N006 N004 100K
R1 N003 0 7m
Rload OUT 0 8
L1 N001 N002 4.7
C2 N011 0 .002
XU1 N009 OUT 0 N001 IN N002 N003 N003 0 N006 N004 N010 N005 N011 IN N007 N008 0 0 NC_01 LTM4607 ;pnba FB)Vout)SGND)SW2)Vin)SW1)Rsense)Sense+)Sense-)Pgood)INTVcc)PLLFLTR)STBYMD)SS)Run)Comp)PLLIN)FCB)PGND)EXTVcc
.tran 100m startup
.lib LTM4607.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 992 680
WIRE 208 -96 176 -96
WIRE 320 -96 288 -96
WIRE 176 -48 176 -96
WIRE 320 -48 320 -96
WIRE 32 16 -80 16
WIRE 64 16 32 16
WIRE 560 16 448 16
WIRE 656 16 560 16
WIRE -80 32 -80 16
WIRE 560 32 560 16
WIRE 656 32 656 16
WIRE 32 80 32 16
WIRE 64 80 32 80
WIRE 464 80 448 80
WIRE -80 128 -80 112
WIRE 560 128 560 96
WIRE 656 128 656 112
WIRE 480 144 448 144
WIRE 512 144 480 144
WIRE 512 160 512 144
WIRE 64 208 -48 208
WIRE 480 208 480 144
WIRE 480 208 448 208
WIRE -48 240 -48 208
WIRE 64 272 48 272
WIRE 512 272 512 240
WIRE 512 272 448 272
WIRE 512 288 512 272
WIRE -48 336 -48 320
WIRE 64 336 -48 336
WIRE 464 336 448 336
WIRE 64 400 48 400
WIRE 464 400 448 400
WIRE 560 400 544 400
WIRE 64 464 48 464
WIRE 496 464 448 464
WIRE 496 480 496 464
WIRE 176 544 176 528
WIRE 320 544 320 528
WIRE 496 560 496 544
SYMBOL cap 480 480 R0
SYMATTR InstName C2
SYMATTR Value .002
SYMBOL res 496 144 R0
SYMATTR InstName R1
SYMATTR Value 7m
SYMBOL res 640 16 R0
SYMATTR InstName Rload
SYMATTR Value 8
SYMBOL PowerProducts\\LTM4607 256 240 R0
SYMATTR InstName U1
SYMBOL cap 544 32 R0
SYMATTR InstName C1
SYMATTR Value 330
SYMBOL res -64 336 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res 560 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.12K
SYMBOL voltage -80 16 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL ind 192 -80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
FLAG 464 80 0
FLAG 560 128 0
FLAG 656 128 0
FLAG 560 400 0
FLAG 512 288 0
FLAG 320 544 0
FLAG 176 544 0
FLAG -80 128 0
FLAG 496 560 0
FLAG -80 16 IN
FLAG 656 16 OUT
TEXT 584 480 Left 2 !.tran 100m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\0197eca502c5_bjt_switch_led.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 C N004 0 0 2N2222
R2 N001 N002 10
R1 N003 N004 100
V2 N001 0 5
D1 N002 C LXZ1-PB01
V1 N003 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 288 0 176 0
WIRE 448 0 368 0
WIRE 176 32 176 0
WIRE 176 144 176 112
WIRE 176 224 176 208
WIRE 176 240 176 224
WIRE 0 288 -128 288
WIRE 112 288 80 288
WIRE -128 304 -128 288
WIRE -128 448 -128 384
WIRE 176 448 176 336
WIRE 176 448 -128 448
WIRE 448 448 448 0
WIRE 448 448 176 448
WIRE 176 496 176 448
SYMBOL voltage 272 0 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL LED 160 144 R0
SYMATTR InstName D1
SYMATTR Value LXZ1-PB01
SYMBOL res -16 304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage -128 288 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL npn 112 240 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL res 160 16 R0
SYMATTR InstName R2
SYMATTR Value 10
FLAG 176 496 0
FLAG 176 224 C
TEXT -248 -16 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP162-3.1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP162-3.1.asy)
XU1 IN 0 N001 OUT ADP16xf K=322.6u ;pnba Vin)GND)En)Vout
V1 IN 0 5
C1 OUT 0 1
Rload OUT 0 310
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 416 96 352 96
WIRE 512 96 416 96
WIRE -64 112 -64 96
WIRE 416 112 416 96
WIRE 512 112 512 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 416 208 416 176
WIRE 512 208 512 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ADP162-3.1 256 208 R0
SYMATTR InstName U1
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 310
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
FLAG -64 208 0
FLAG 256 272 0
FLAG 416 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\1bea6af3fe1d_singleTrace_RCsrc.asc
* Generated by LTspice 26.0.1 for Windows.
RS VS N001 20
CS VS 0 10p
T2 VM 0 VL 0 Td=0.5n Z0=100
T1 VS 0 VM 0 Td=0.5n Z0=100
V1 N001 0 PULSE(0 1 0 1n 1n 9n 20n 1)
RL VL 0 1Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1128 680
WIRE 176 64 128 64
WIRE 288 64 256 64
WIRE 320 64 288 64
WIRE 480 64 320 64
WIRE 672 64 576 64
WIRE 752 64 672 64
WIRE 912 64 848 64
WIRE 1040 64 912 64
WIRE 320 96 320 64
WIRE 480 96 416 96
WIRE 672 96 576 96
WIRE 752 96 672 96
WIRE 928 96 848 96
WIRE 1040 96 1040 64
WIRE 416 128 416 96
WIRE 672 128 672 96
WIRE 928 128 928 96
WIRE 128 160 128 64
WIRE 320 176 320 160
WIRE 1040 208 1040 176
WIRE 128 272 128 240
SYMBOL tline 528 80 R0
SYMATTR InstName T1
SYMATTR Value Td=0.5n Z0=100
SYMBOL voltage 128 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1n 1n 9n 20n 1)
SYMBOL res 1024 80 R0
SYMATTR InstName RL
SYMATTR Value 1Meg
SYMBOL tline 800 80 R0
SYMATTR InstName T2
SYMATTR Value Td=0.5n Z0=100
SYMBOL res 272 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RS
SYMATTR Value 20
SYMBOL cap 304 96 R0
SYMATTR InstName CS
SYMATTR Value 10p
FLAG 128 272 0
FLAG 416 128 0
FLAG 672 128 0
FLAG 928 128 0
FLAG 1040 208 0
FLAG 288 64 VS
FLAG 672 64 VM
FLAG 912 64 VL
FLAG 320 176 0