Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3026.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3026.asy)
C1 N002 0 4.7
C2 OUT 0 10
R2 OUT N003 8.06K
XU1 IN MP_01 0 N001 N002 IN N004 N003 OUT LTC3026 ;pnba IN))GND)SW)BST)_SHDN)PG)ADJ)OUT
V1 IN 0 1.5
R3 OUT 0 .8
R1 OUT N004 100K
L1 IN N001 10
R4 N003 0 4.02K
.tran .1 startup
.lib LTC3026.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
WIRE 32 112 -32 112
WIRE 336 112 320 112
WIRE 416 112 400 112
WIRE -32 208 -32 192
WIRE -32 208 -128 208
WIRE 32 208 -32 208
WIRE 352 208 320 208
WIRE 544 208 352 208
WIRE 592 208 544 208
WIRE 672 208 592 208
WIRE -128 224 -128 208
WIRE 592 224 592 208
WIRE 672 224 672 208
WIRE -32 304 -32 208
WIRE 32 304 -32 304
WIRE 352 304 352 288
WIRE 352 304 320 304
WIRE 416 304 352 304
WIRE 512 304 496 304
WIRE -128 320 -128 304
WIRE 592 320 592 288
WIRE 672 320 672 304
WIRE 32 400 16 400
WIRE 336 400 320 400
WIRE 544 400 544 208
WIRE 544 400 416 400
SYMBOL cap 336 128 R270
WINDOW 3 0 32 VBottom 2
WINDOW 0 32 32 VTop 2
SYMATTR Value 4.7
SYMATTR InstName C1
SYMBOL ind -16 208 R180
WINDOW 0 -2 77 Right 2
WINDOW 3 0 38 Right 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL PowerProducts\\LTC3026 176 256 R0
SYMATTR InstName U1
SYMBOL res 656 208 R0
SYMATTR InstName R3
SYMATTR Value .8
SYMBOL res 432 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 400 320 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 4.02K
SYMBOL res 336 192 R0
SYMATTR InstName R2
SYMATTR Value 8.06K
SYMBOL cap 576 224 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL voltage -128 208 R0
SYMATTR InstName V1
SYMATTR Value 1.5
FLAG -128 320 0
FLAG 16 400 0
FLAG 512 304 0
FLAG 592 320 0
FLAG 416 112 0
FLAG 672 320 0
FLAG -128 208 IN
FLAG 672 208 OUT
TEXT 504 440 Left 2 !.tran .1 startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4440A-5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4440A-5.asy)
V1 N001 0 5
V2 N002 0 PULSE(0 8 0 1n 1n 1u 2u)
XU1 N001 0 N002 0 N003 N001 LTC4440-5 ;pnba VCC)GND)INP)TS)TG)BOOST
.tran 50u
.lib LTC4440-5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2336 1256
WIRE 1104 -144 912 -144
WIRE 1424 -144 1104 -144
WIRE 912 -128 912 -144
WIRE 1104 -80 1104 -144
WIRE 1136 -80 1104 -80
WIRE 1424 -80 1424 -144
WIRE 1424 -80 1392 -80
WIRE 912 -32 912 -48
WIRE 1136 0 736 0
WIRE 1424 0 1392 0
WIRE 736 16 736 0
WIRE 1136 80 1104 80
WIRE 1424 80 1392 80
WIRE 736 112 736 96
SYMBOL voltage 736 0 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 8 0 1n 1n 1u 2u)
SYMBOL PowerProducts\\LTC4440A-5 1264 0 R0
SYMATTR InstName U1
SYMBOL voltage 912 -144 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 1104 80 0
FLAG 912 -32 0
FLAG 1424 80 0
FLAG 736 112 0
TEXT 1376 176 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\05e370202d37_Temperature-Variation-and-Worst-case-LTSpice.asc
* Generated by LTspice 26.0.1 for Windows.
* Temperature Variation Analysis with LTSpice and worst case analysis
* Temperature sweep from -20 degrees to 100 degrees with 120 degrees steps
* Obtained from:\nhttps://k6jca.blogspot.com/2012/07/monte-carlo-and-worst-case-circuit.html
V1 N001 0 12
R1 N002 0 {wc(10k, tol)}
D1 N002 N001 BZX84C6V2L
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.step temp -20 100 120
.tran 1
.param tol=0.2
.step param run 1 50 1
.function wc(nom, tol) if(run==1, nom, if(flat(1) > 0, nom*(1+tol), nom*(1-tol)))
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1320 680
WIRE 224 -32 -96 -32
WIRE 224 0 224 -32
WIRE -96 96 -96 -32
WIRE 224 96 224 64
WIRE -96 208 -96 176
WIRE 224 208 224 176
SYMBOL res 208 80 R0
SYMATTR InstName R1
SYMATTR Value {wc(10k, tol)}
SYMBOL voltage -96 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL zener 240 64 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value BZX84C6V2L
SYMATTR Description Diode
SYMATTR Type diode
FLAG 224 208 0
FLAG -96 208 0
TEXT 456 -40 Left 2 !.step temp -20 100 120
TEXT 456 8 Left 2 !.tran 1
TEXT -160 -208 Left 4 ;Temperature Variation Analysis with LTSpice and worst case analysis
TEXT 456 -80 Left 2 ;Temperature sweep from -20 degrees to 100 degrees with 120 degrees steps
TEXT 456 56 Left 2 !.param tol=0.2
TEXT 456 104 Left 2 !.step param run 1 50 1
TEXT 456 160 Left 2 !.function wc(nom, tol) if(run==1, nom, if(flat(1) > 0, nom*(1+tol), nom*(1-tol)))
TEXT 456 224 Left 2 ;Obtained from:\nhttps://k6jca.blogspot.com/2012/07/monte-carlo-and-worst-case-circuit.html
* Z:\tmp\asc_dec_bjh7r6w2\09d15b786576_Fig_20_22_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N004 N004 0 0 N_50n L=100n W=2.5u
M6 N005 N005 N008 0 N_50n l=100n w=10u
MSU1 N002 N007 0 0 N_50n L=100n W=2.5u
MSU3 Vbiasp N002 N007 0 N_50n L=50n W=500n
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1996 680
WIRE 544 -176 544 -272
WIRE 544 -64 544 -80
WIRE 544 80 544 -64
WIRE 544 272 544 176
WIRE 608 -96 592 -96
WIRE 608 -64 544 -64
WIRE 608 -64 608 -96
WIRE 640 -64 608 -64
WIRE 688 -144 688 -176
WIRE 688 160 592 160
WIRE 688 160 688 -48
WIRE 848 160 688 160
WIRE 1008 -48 848 -48
WIRE 1008 -48 1008 -80
WIRE 1008 48 1008 -48
WIRE 1008 64 1008 48
WIRE 1008 192 1008 160
WIRE 1072 64 1008 64
WIRE 1072 144 1056 144
WIRE 1072 144 1072 64
WIRE 1216 -112 1216 -128
WIRE 1216 64 1216 -112
WIRE 1216 80 1216 64
WIRE 1216 192 1216 160
WIRE 1264 -112 1216 -112
WIRE 1328 48 1008 48
WIRE 1344 144 1328 144
WIRE 1392 -96 1056 -96
WIRE 1392 -96 1392 -128
WIRE 1392 64 1392 -96
WIRE 1392 80 1392 64
WIRE 1392 192 1392 160
WIRE 1504 -96 1392 -96
WIRE 1504 -64 1504 -96
WIRE 1520 144 1520 64
WIRE 1536 -96 1504 -96
WIRE 1536 144 1520 144
WIRE 1584 16 1280 16
WIRE 1584 16 1584 -80
WIRE 1584 64 1520 64
WIRE 1584 64 1584 16
WIRE 1584 176 1584 160
WIRE 1584 288 1584 256
WIRE 1824 -64 1504 -64
SYMBOL nmos4 1056 64 M0
WINDOW 123 56 100 Left 0
SYMATTR Value2 L=100n W=2.5u
SYMATTR InstName M1
SYMATTR Value N_50n
SYMBOL nmos4 1536 64 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=100n w=10u
SYMATTR InstName M6
SYMATTR Value N_50n
SYMBOL nmos4 592 80 M0
WINDOW 123 56 100 Left 0
SYMATTR Value2 L=100n W=2.5u
SYMATTR InstName MSU1
SYMATTR Value N_50n
SYMBOL nmos4 640 -144 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 L=50n W=500n
SYMATTR InstName MSU3
SYMATTR Value N_50n
FLAG 544 -128 VDD
FLAG 688 -176 Vbiasp
FLAG 1008 -128 VDD
FLAG 1584 -128 VDD
FLAG 1584 112 0
FLAG 1392 112 0
FLAG 544 -272 VDD
FLAG 544 272 GND
FLAG 688 -96 0
FLAG 544 128 0
FLAG 1008 192 0
FLAG 1008 112 0
FLAG 1216 112 0
FLAG 1216 192 0
FLAG 1392 192 0
* Z:\home\khalils\Downloads\files\data\raw_asc\0d68d9403a26_Fig1_27_old.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot v(Vin) and V(vout)
Vin Vin 0 PULSE(0 1 6n 0 0 3n 10n)
R1 Vin Vout 1k
C1 Vout 0 1p
.tran 30n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 0 240 0 224
WIRE 0 336 0 320
WIRE 48 224 0 224
WIRE 112 224 48 224
WIRE 320 224 192 224
WIRE 352 224 320 224
WIRE 352 240 352 224
WIRE 352 336 352 304
SYMBOL voltage 0 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(0 1 6n 0 0 3n 10n)
SYMBOL cap 336 240 R0
SYMATTR InstName C1
SYMATTR Value 1p
SYMBOL res 96 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 0 336 0
FLAG 352 336 0
FLAG 320 224 Vout
FLAG 48 224 Vin
TEXT 40 400 Left 0 !.tran 30n
TEXT 24 144 Left 0 ;Plot v(Vin) and V(vout)
* Z:\home\khalils\Downloads\files\data\raw_asc\2dc4ca19625a_1795.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 10
V2 -V 0 -10
R1 N002 N001 1K
R2 N001 0 1K
V3 N003 0 SINE(0 1 1K)
XU1 N003 N001 +V -V N002 0 N004 NC_01 LT1795 ;pnba In+)In-)V+)V-)OUT)SHDNREF)SHDN)COMP
V4 N004 0 5
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1795.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -304 0 -320 0
WIRE -208 0 -224 0
WIRE -144 0 -208 0
WIRE -16 0 -64 0
WIRE -576 48 -576 32
WIRE -448 48 -448 32
WIRE -144 96 -144 64
WIRE -208 128 -208 0
WIRE -176 128 -208 128
WIRE -576 144 -576 128
WIRE -448 144 -448 128
WIRE -16 160 -16 0
WIRE -16 160 -48 160
WIRE -176 192 -400 192
WIRE -400 208 -400 192
WIRE -144 256 -144 224
WIRE -80 272 -80 224
WIRE -400 304 -400 288
WIRE -80 368 -80 352
FLAG -448 144 0
FLAG -448 32 +V
FLAG -576 144 0
FLAG -576 32 -V
FLAG -320 0 0
FLAG -400 304 0
FLAG -144 64 +V
FLAG -144 256 -V
FLAG -112 224 0
FLAG -80 368 0
SYMBOL voltage -448 32 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL voltage -576 32 R0
SYMATTR InstName V2
SYMATTR Value -10
SYMBOL res -48 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res -208 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -400 192 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL opamps\\LT1795 -112 160 R0
SYMATTR InstName U1
SYMBOL voltage -80 256 R0
SYMATTR InstName V4
SYMATTR Value 5
TEXT -288 360 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\2566b1e67b9f_Fahrradakku24V104daAh.asc
* Generated by LTspice 26.0.1 for Windows.
* C = Q/U = I*t/U\n= 10.4Ah/(1V) \n= 10.4*60*60As/(1V)\n= 37440As/V = 37440F
* Sicherung:\nmaximaler\nEntladestrom 15A
* Batterie-Controller schaltet bei 21V ab.
B4 U_kontrolliert 0 V=V(U_unkontrolliert)*(0.5*tanh(100*(V(U_unkontrolliert)-21))+0.5)
R2 N003 - 50m
B1 0 U_fuellstand I=I(R2)
R1 U_fuellstand 0 10k
V1 N002 + 0
B3 N002 N003 V=V(U_kontrolliert)*(-0.5*tanh(100*(I(V1)-15))+0.5)
C1 U_fuellstand 0 37440
B2 U_unkontrolliert 0 V=29.4*(-8.0128*pwr(V(U_fuellstand),5)+22.509*pwr(V(U_fuellstand),4)-19.929*pwr(V(U_fuellstand),3)+4.332*pwr(V(U_fuellstand),2)+2.0965*V(U_fuellstand)+0.0026)
.ic V(U_fuellstand)=1
.model MYSW CSW(Ron=.1 Roff=1Meg It=15 Ih=-14)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2044 680
WIRE -624 -752 -752 -752
WIRE -560 -752 -624 -752
WIRE -752 -704 -752 -752
WIRE -752 -576 -752 -624
WIRE -624 -464 -752 -464
WIRE -560 -464 -624 -464
WIRE -752 -432 -752 -464
WIRE -752 -272 -752 -352
WIRE -752 -96 -800 -96
WIRE -544 -96 -672 -96
WIRE -544 -80 -544 -96
WIRE -544 32 -544 0
WIRE 528 96 448 96
WIRE 640 96 528 96
WIRE 768 96 640 96
WIRE 448 160 448 96
WIRE 640 160 640 96
WIRE 768 176 768 96
WIRE -752 304 -800 304
WIRE -544 304 -544 112
WIRE -544 304 -672 304
WIRE 448 304 448 240
WIRE 640 304 640 240
WIRE 640 304 448 304
WIRE 768 304 768 240
WIRE 768 304 640 304
WIRE 768 368 768 304
IOPIN -800 -96 BiDir
IOPIN -800 304 BiDir
SYMBOL res -656 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 0
SYMBOL voltage -544 16 R180
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL res -656 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50m
SYMBOL bi 448 240 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName B1
SYMATTR Value I=I(R2)
SYMBOL cap 752 176 R0
SYMATTR InstName C1
SYMATTR Value 37440
SYMBOL bv -544 16 R0
SYMATTR InstName B3
SYMATTR Value V=V(U_kontrolliert)*(-0.5*tanh(100*(I(V1)-15))+0.5)
SYMBOL bv -752 -448 R0
SYMATTR InstName B2
SYMATTR Value V=29.4*(-8.0128*pwr(V(U_fuellstand),5)+22.509*pwr(V(U_fuellstand),4)-19.929*pwr(V(U_fuellstand),3)+4.332*pwr(V(U_fuellstand),2)+2.0965*V(U_fuellstand)+0.0026)
SYMBOL bv -752 -720 R0
SYMATTR InstName B4
SYMATTR Value V=V(U_unkontrolliert)*(0.5*tanh(100*(V(U_unkontrolliert)-21))+0.5)
SYMBOL res 624 144 R0
SYMATTR InstName R1
SYMATTR Value 10k
FLAG 528 96 U_fuellstand
FLAG -800 -96 +
FLAG -800 304 -
FLAG -624 -464 U_unkontrolliert
FLAG 768 368 0
FLAG -752 -272 0
FLAG -624 -752 U_kontrolliert
FLAG -752 -576 0
TEXT 888 168 Left 2 ;C = Q/U  = I*t/U\n= 10.4Ah/(1V) \n= 10.4*60*60As/(1V)\n= 37440As/V = 37440F
TEXT 872 336 Left 2 !.ic V(U_fuellstand)=1
TEXT 8 -184 Left 2 !.model MYSW CSW(Ron=.1 Roff=1Meg It=15 Ih=-14)
TEXT -768 64 Left 2 ;Sicherung:\nmaximaler\nEntladestrom 15A
TEXT -536 -680 Left 2 ;Batterie-Controller schaltet bei 21V ab.
* Z:\home\khalils\Downloads\files\data\raw_asc\00d749119bb8_Circuit_4_2HP.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XHP (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
C3 N003 N002 10n
R2 N001 0 33k
R3 U_aH vGND 220k
R6 U_aH N003 16k
VU U_e vGND AC 1.5
R7 N002 vGND 16k
V1 +3.3V 0 3.3
R1 +3.3V N001 33k
C2 U_e N003 10n
XHP N002 U_aH +3.3V 0 U_aH level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
XU1 N001 vGND +3.3V 0 vGND level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
.ac oct 10000 100 10000
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1892 1884
WIRE 64 -16 64 -48
WIRE 208 -16 64 -16
WIRE 208 16 208 -16
WIRE 448 16 272 16
WIRE 64 128 64 -16
WIRE 272 144 272 16
WIRE 304 144 272 144
WIRE 448 160 448 16
WIRE 448 160 368 160
WIRE 480 160 448 160
WIRE 208 176 208 96
WIRE 304 176 208 176
WIRE 208 224 208 176
WIRE 336 224 336 192
WIRE 64 368 64 208
WIRE 208 368 208 304
WIRE 208 368 64 368
WIRE 64 384 64 368
WIRE 464 1328 16 1328
WIRE 256 1456 128 1456
WIRE 320 1456 256 1456
WIRE 464 1456 464 1408
WIRE 464 1456 384 1456
WIRE 528 1456 464 1456
WIRE 592 1456 576 1456
WIRE 656 1456 592 1456
WIRE -80 1472 -112 1472
WIRE 16 1472 16 1328
WIRE 16 1472 -80 1472
WIRE 64 1472 16 1472
WIRE 176 1488 128 1488
WIRE 256 1520 256 1456
WIRE 656 1536 656 1456
WIRE 16 1600 16 1472
WIRE 176 1600 176 1488
WIRE 176 1600 16 1600
WIRE 176 1648 176 1600
WIRE 176 1760 176 1728
IOPIN 336 128 In
IOPIN 64 -48 Out
IOPIN 480 160 Out
IOPIN 656 1616 In
IOPIN 176 1760 In
IOPIN 96 1504 In
IOPIN 256 1600 In
SYMBOL voltage 656 1520 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1.5
SYMATTR InstName U
SYMATTR Value ""
SYMBOL res 240 1504 R0
SYMATTR InstName R7
SYMATTR Value 16k
SYMBOL cap 592 1440 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL OpAmps\\UniversalOpAmp2 96 1472 R180
SYMATTR InstName HP
SYMBOL res 160 1632 R0
SYMATTR InstName R3
SYMATTR Value 220k
SYMBOL res 192 0 R0
SYMATTR InstName R1
SYMATTR Value 33k
SYMBOL cap 384 1440 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 10n
SYMBOL OpAmps\\UniversalOpAmp2 336 160 R0
SYMATTR InstName U1
SYMBOL voltage 64 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 192 208 R0
SYMATTR InstName R2
SYMATTR Value 33k
SYMBOL res 448 1312 R0
SYMATTR InstName R6
SYMATTR Value 16k
FLAG 336 224 0
FLAG 336 128 +3.3V
FLAG 64 -48 +3.3V
FLAG 64 384 0
FLAG 480 160 vGND
FLAG 656 1616 vGND
FLAG 656 1456 U_e
FLAG 176 1760 vGND
FLAG 96 1504 +3.3V
FLAG 96 1440 0
FLAG 256 1600 vGND
FLAG -80 1472 U_aH
TEXT 1064 296 Left 2 !.ac oct 10000 100 10000
* Z:\home\khalils\Downloads\files\data\raw_asc\9a8fada80f92_Clase_B.asc
* Generated by LTspice 26.0.1 for Windows.
**********
*SRC=ARF463AB;ARF463AB;MOSFETs N;Enh;500V 9.0A 1.1ohms PPG Microsemi RF MOSFET
*SYM=POWMOSN
*09-14-09 Rev A GJK PPG Microsemi
* TERMINALS: D G S
*****
RD 11 1 1.1
LG 20 19 2.8n
B1 G 0 V=V(p)*V(r)
D1 5 1 DGD
DSD 3 1 DSUB
D2 5 2 DGD
LD 10 11 2n
VDD VDD 0 125
R1 VDD N001 4
RS 29 3 2.25m
LS 30 29 2n
M1 1 2 3 3 DMOS L=1U W=1U
V3 p 0 PULSE(0 1 0 1p 1p 1.25e-05 250e-6)
CGS 2 3 1200p
RG 19 2 .5
R2 G 0 50
V2 r 0 PWL(0 0 10e-3 8)
XM1 N001 G 0 ARF463AB ;pnba D)G)S
.tran 0 10e-3 0 1e-06
.SUBCKT ARF463AB 10 20 30
.MODEL DMOS NMOS(LEVEL=3 VMAX=1.04Meg THETA=100.0m ETA=2.00m VTO=3.00 KP=2.60)
.MODEL DSUB D (IS=1.27u N=1.50 RS=5.00m BV=500 CJO=799p VJ=0.800 M=0.420 TT=311n)
.MODEL DGD D (IS=100n N=1.5 RS=10m BV=500 CJO=81.7p M=.5 VJ=.700 TT=1n)
.ENDS
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -480 -784 -624 -784
WIRE -432 -784 -480 -784
WIRE -384 -784 -432 -784
WIRE -480 -736 -480 -784
WIRE -624 -720 -624 -784
WIRE -624 -624 -624 -640
WIRE -1408 -576 -1408 -592
WIRE -1152 -560 -1152 -592
WIRE -480 -560 -480 -656
WIRE -1408 -544 -1408 -576
WIRE -1152 -544 -1152 -560
WIRE -752 -480 -960 -480
WIRE -576 -480 -752 -480
WIRE -528 -480 -576 -480
WIRE -1408 -448 -1408 -464
WIRE -1152 -448 -1152 -464
WIRE -752 -432 -752 -480
WIRE -480 -400 -480 -464
WIRE -960 -384 -960 -480
WIRE -752 -320 -752 -352
WIRE -960 -272 -960 -304
SYMBOL nmos -528 -560 R0
SYMATTR InstName M1
SYMATTR Value ARF463AB
SYMATTR Prefix X
SYMBOL voltage -1408 -560 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 10e-3 8)
SYMBOL res -496 -752 R0
SYMATTR InstName R1
SYMATTR Value 4
SYMBOL bv -960 -400 R0
SYMATTR InstName B1
SYMATTR Value V=V(p)*V(r)
SYMBOL res -768 -448 R0
SYMATTR InstName R2
SYMATTR Value 50
SYMBOL voltage -624 -736 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName VDD
SYMATTR Value 125
SYMBOL voltage -1152 -560 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 0 1p 1p 1.25e-05 250e-6)
FLAG -480 -400 0
FLAG -624 -624 0
FLAG -432 -784 VDD
FLAG -576 -480 G
FLAG -752 -320 0
FLAG -960 -272 0
FLAG -1408 -448 0
FLAG -1152 -448 0
FLAG -1152 -560 p
FLAG -1408 -576 r
TEXT -2144 -96 Left 2 !.tran 0 10e-3 0 1e-06
TEXT -2152 -752 Left 2 !**********\n*SRC=ARF463AB;ARF463AB;MOSFETs N;Enh;500V 9.0A 1.1ohms PPG Microsemi RF MOSFET\n*SYM=POWMOSN\n*09-14-09 Rev A GJK PPG Microsemi\n.SUBCKT ARF463AB   10 20 30\n*     TERMINALS:  D  G  S\nM1   1  2  3  3  DMOS L=1U W=1U\nLD  10  11  2n\nRD  11          1   1.1\nLG  20  19  2.8n\nRG  19  2   .5\nD1   5  1   DGD\nD2   5  2   DGD\nCGS  2  3   1200p\nDSD  3  1   DSUB\nRS  29  3   2.25m\nLS  30  29  2n\n.MODEL DMOS NMOS(LEVEL=3 VMAX=1.04Meg THETA=100.0m ETA=2.00m VTO=3.00 KP=2.60)\n.MODEL DSUB D (IS=1.27u N=1.50 RS=5.00m BV=500 CJO=799p VJ=0.800 M=0.420 TT=311n)\n.MODEL DGD  D (IS=100n N=1.5 RS=10m BV=500 CJO=81.7p M=.5 VJ=.700 TT=1n)\n.ENDS\n*****
* Z:\home\khalils\Downloads\files\data\raw_asc\5804bb1eaad6_q1_b_B.asc
* Generated by LTspice 26.0.1 for Windows.
R10 N002 0 18724
V1 N001 0 AC 1.
C1 N002 N001 100n
.ac dec 10 0.1 1k
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 64 96 64
WIRE 272 64 224 64
WIRE 96 144 96 64
WIRE 272 144 272 64
SYMBOL res 256 128 R0
SYMATTR InstName R10
SYMATTR Value 18724
SYMBOL voltage 96 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value AC 1.
SYMBOL cap 224 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100n
FLAG 96 224 0
FLAG 272 224 0
TEXT 56 248 Left 2 !.ac dec 10 0.1 1k
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1028CS.asc
* Generated by LTspice 26.0.1 for Windows.
* Phono Preamplifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1028CS.asy)
V3 IN 0 ac 1
V1 +V 0 15
C3 IN 0 100p
R2 N001 0 10
R3 N002 N001 787
XU1 IN N001 +V -V OUT LT1028 ;pnba In+)In-)V+)V-)OUT
R4 IN 0 47K
R1 OUT N001 10K
V2 -V 0 -15
C1 N002 N001 .1
C2 OUT N002 .33
.ac oct 10 10 20K
.lib LT1028.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 128 -48 96 -48
WIRE 240 -48 208 -48
WIRE -256 32 -256 16
WIRE -128 32 -128 16
WIRE 96 48 96 -48
WIRE 144 48 96 48
WIRE 240 48 240 -48
WIRE 240 48 208 48
WIRE 256 48 240 48
WIRE 336 48 320 48
WIRE -256 128 -256 112
WIRE -128 128 -128 112
WIRE 0 144 -16 144
WIRE 96 144 96 48
WIRE 96 144 80 144
WIRE 208 144 96 144
WIRE 336 144 336 48
WIRE 336 144 288 144
WIRE 192 208 192 192
WIRE 96 224 96 144
WIRE 160 224 96 224
WIRE 336 240 336 144
WIRE 336 240 224 240
WIRE 384 240 336 240
WIRE 0 256 -112 256
WIRE 96 256 0 256
WIRE 160 256 96 256
WIRE -112 272 -112 256
WIRE 0 272 0 256
WIRE 96 272 96 256
WIRE 192 288 192 272
WIRE -112 368 -112 352
WIRE 0 368 0 352
WIRE 96 368 96 336
SYMBOL cap 80 272 R0
SYMATTR InstName C3
SYMATTR Value 100p
SYMBOL res 304 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL opamps\\LT1028CS 192 176 R0
SYMATTR InstName U1
SYMBOL cap 208 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL res -16 256 R0
SYMATTR InstName R4
SYMATTR Value 47K
SYMBOL res 224 -64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 787
SYMBOL res 96 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL voltage -112 256 R0
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL cap 320 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .33
SYMBOL voltage -128 16 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -256 16 R0
SYMATTR InstName V2
SYMATTR Value -15
FLAG -128 128 0
FLAG 192 192 +V
FLAG -128 16 +V
FLAG 192 288 -V
FLAG -256 128 0
FLAG -256 16 -V
FLAG -16 144 0
FLAG -112 368 0
FLAG 96 368 0
FLAG 0 368 0
FLAG -112 256 IN
FLAG 384 240 OUT
TEXT 200 360 Left 2 !.ac oct 10 10 20K
TEXT 40 -88 Bottom 2 ;Phono Preamplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\1e3b2fb1f432_sim2.asc
* Generated by LTspice 26.0.1 for Windows.
RL N002 0 1
I1 0 N001 AC 1
C1 N001 0 {27/17}
C2 N002 N001 {27/289}
L1 N001 N002 {289/243}
C3 N002 0 {7/17}
.ac dec 1000 0.01 10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -48 96 -80 96
WIRE 64 96 16 96
WIRE -144 144 -304 144
WIRE -80 144 -80 96
WIRE -80 144 -144 144
WIRE 64 144 64 96
WIRE 112 144 64 144
WIRE 320 144 112 144
WIRE -304 192 -304 144
WIRE -80 192 -80 144
WIRE -48 192 -80 192
WIRE 64 192 64 144
WIRE 64 192 32 192
WIRE 112 208 112 144
WIRE -144 224 -144 144
WIRE 320 224 320 144
WIRE -304 320 -304 272
WIRE -144 320 -144 288
WIRE -144 320 -304 320
WIRE 112 320 112 272
WIRE 112 320 -144 320
WIRE 320 320 320 304
WIRE 320 320 112 320
WIRE 320 368 320 320
FLAG 320 368 0
SYMBOL res 304 208 R0
SYMATTR InstName RL
SYMATTR Value 1
SYMBOL current -304 272 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 24 -28 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL cap -160 224 R0
SYMATTR InstName C1
SYMATTR Value {27/17}
SYMBOL cap 16 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value {27/289}
SYMBOL ind -64 208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value {289/243}
SYMBOL cap 96 208 R0
SYMATTR InstName C3
SYMATTR Value {7/17}
TEXT -382 358 Left 2 !.ac dec 1000 0.01 10
RECTANGLE Normal 272 352 -192 48 2
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP124-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5.5
C2 OUT 0 1
Rload OUT 0 100
C1 IN 0 1
XU1 OUT MP_01 OUT 0 IN MP_02 MP_03 IN ADP124 K=76923 ;pnba Vout))Sense)GND)En)))Vin
.tran 10m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP124-1.8.asy)
.lib ADP124.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 384 96 352 96
WIRE 432 96 384 96
WIRE 512 96 432 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 432 112 432 96
WIRE 512 112 512 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 384 208 384 96
WIRE 384 208 352 208
WIRE 432 208 432 176
WIRE 512 208 512 192
WIRE 256 272 256 256
FLAG 0 208 0
FLAG 256 272 0
FLAG 432 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL cap 416 112 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ADP124-1.8 256 208 R0
SYMATTR InstName U1
TEXT 0 272 Left 2 !.tran 10m startup