Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\326e6e66796c_4-NAND-111.asc
* Generated by LTspice 26.0.1 for Windows.
M13 N005 SEL0 V+ V+ PMOS
M6 N003 SEL1 V+ V+ PMOS
M12 OUT N001 0 0 NMOS
M3 N004 N003 N002 N002 PMOS
M4 N001 SEL2 0 0 NMOS
M10 OUT IN 0 0 NMOS
M8 N003 SEL1 0 0 NMOS
M11 OUT N005 0 0 NMOS
M9 OUT IN N006 N006 PMOS
M7 OUT N003 0 0 NMOS
M2 N001 SEL2 V+ V+ PMOS
M14 N005 SEL0 0 0 NMOS
M1 N006 N005 N004 N004 PMOS
M5 N002 N001 V+ V+ PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1660 728
WIRE 464 -608 192 -608
WIRE 608 -608 464 -608
WIRE 464 -576 464 -608
WIRE 464 -576 384 -576
WIRE 336 -560 320 -560
WIRE 608 -528 608 -608
WIRE 560 -512 544 -512
WIRE 320 -480 320 -560
WIRE 320 -480 192 -480
WIRE 544 -480 544 -512
WIRE 544 -480 384 -480
WIRE 320 -400 320 -480
WIRE 336 -400 320 -400
WIRE 480 -384 384 -384
WIRE 608 -368 608 -432
WIRE 752 -368 608 -368
WIRE 464 -352 464 -576
WIRE 464 -352 384 -352
WIRE 336 -336 320 -336
WIRE 752 -304 752 -368
WIRE 704 -288 688 -288
WIRE 320 -256 320 -336
WIRE 320 -256 192 -256
WIRE 688 -256 688 -288
WIRE 688 -256 384 -256
WIRE 320 -176 320 -256
WIRE 336 -176 320 -176
WIRE 480 -160 480 -384
WIRE 480 -160 384 -160
WIRE 752 -144 752 -208
WIRE 896 -144 752 -144
WIRE 464 -128 464 -352
WIRE 464 -128 384 -128
WIRE 336 -112 320 -112
WIRE 896 -80 896 -144
WIRE 848 -64 832 -64
WIRE 320 -32 320 -112
WIRE 320 -32 192 -32
WIRE 832 -32 832 -64
WIRE 832 -32 384 -32
WIRE 320 48 320 -32
WIRE 336 48 320 48
WIRE 896 48 896 16
WIRE 1040 48 896 48
WIRE 480 64 480 -160
WIRE 480 64 384 64
WIRE 1040 80 1040 48
WIRE 992 96 976 96
WIRE 976 128 976 96
WIRE 976 128 192 128
WIRE 752 192 608 192
WIRE 896 192 752 192
WIRE 1040 192 1040 176
WIRE 1040 192 896 192
WIRE 1184 192 1040 192
WIRE 608 208 608 192
WIRE 752 208 752 192
WIRE 896 208 896 192
WIRE 1040 208 1040 192
WIRE 544 288 544 -480
WIRE 560 288 544 288
WIRE 688 288 688 -256
WIRE 704 288 688 288
WIRE 832 288 832 -32
WIRE 848 288 832 288
WIRE 976 288 976 128
WIRE 992 288 976 288
WIRE 480 320 480 64
WIRE 608 320 608 304
WIRE 608 320 480 320
WIRE 752 320 752 304
WIRE 752 320 608 320
WIRE 896 320 896 304
WIRE 896 320 752 320
WIRE 1040 320 1040 304
WIRE 1040 320 896 320
WIRE 896 352 896 320
IOPIN 192 128 In
IOPIN 1184 192 Out
IOPIN 192 -32 In
IOPIN 192 -256 In
IOPIN 192 -480 In
IOPIN 192 -608 In
SYMBOL nmos 848 208 R0
SYMATTR InstName M11
SYMBOL nmos 336 -256 R0
SYMATTR InstName M8
SYMBOL pmos 336 -480 M180
SYMATTR InstName M2
SYMBOL pmos 336 -256 M180
SYMATTR InstName M6
SYMBOL pmos 336 -32 M180
SYMATTR InstName M13
SYMBOL nmos 992 208 R0
SYMATTR InstName M10
SYMBOL nmos 560 208 R0
SYMATTR InstName M12
SYMBOL pmos 560 -432 M180
SYMATTR InstName M5
SYMBOL pmos 992 176 M180
SYMATTR InstName M9
SYMBOL nmos 336 -32 R0
SYMATTR InstName M14
SYMBOL pmos 704 -208 M180
SYMATTR InstName M3
SYMBOL pmos 848 16 M180
SYMATTR InstName M1
SYMBOL nmos 704 208 R0
SYMATTR InstName M7
SYMBOL nmos 336 -480 R0
SYMATTR InstName M4
FLAG 896 352 0
FLAG 192 128 IN
FLAG 1184 192 OUT
FLAG 192 -32 SEL0
FLAG 192 -256 SEL1
FLAG 192 -480 SEL2
FLAG 192 -608 V+
* Z:\home\khalils\Downloads\files\data\raw_asc\LT83203.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT83203.asy)
R3 OUT N005 100K
C1 N008 0 10n
C3 N009 0 2.2
C6 N004 0 82p
XU2 N002 NC_01 0 N003 IN N001 N005 IN N006 N009 N004 OUT N007 LT83203 ;pnba SW)SYNC/MODE)GND)RT)VIN)BST)PG)EN/UVLO)INTVCC)SET)VC)OUTS)PGFB
C4 OUT 0 100 Rser=10m
R4 OUT N007 49.9K
R6 N004 N008 499
L1 N002 OUT 0.62 Rser=10m
R5 N007 0 49.9K
Rload OUT 0 1
R2 N009 0 10K
C2 N006 0 1
V1 IN 0 12
R1 N003 0 47.5K
C5 N001 N002 0.1
.tran 5m startup
.lib LT83203.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1136 680
WIRE -64 -32 -160 -32
WIRE 32 -32 -64 -32
WIRE 96 -32 32 -32
WIRE 496 -32 432 -32
WIRE -160 -16 -160 -32
WIRE 496 -16 496 -32
WIRE 32 64 32 -32
WIRE 96 64 32 64
WIRE 496 64 496 48
WIRE 496 64 432 64
WIRE 592 64 496 64
WIRE 704 64 672 64
WIRE 768 64 704 64
WIRE 832 64 768 64
WIRE 880 64 832 64
WIRE 768 80 768 64
WIRE 880 80 880 64
WIRE -160 96 -160 64
WIRE -16 160 -32 160
WIRE 96 160 64 160
WIRE 624 160 432 160
WIRE 704 160 704 64
WIRE 704 160 624 160
WIRE 768 176 768 144
WIRE 880 176 880 160
WIRE -64 256 -160 256
WIRE 96 256 -64 256
WIRE 496 256 432 256
WIRE 624 256 624 160
WIRE 624 256 576 256
WIRE 704 256 704 160
WIRE -160 272 -160 256
WIRE 96 352 16 352
WIRE 704 352 704 336
WIRE 704 352 432 352
WIRE -160 368 -160 352
WIRE -64 368 -64 256
WIRE 16 368 16 352
WIRE 704 368 704 352
WIRE -160 448 -160 432
WIRE -64 448 -64 432
WIRE 16 448 16 432
WIRE 496 448 432 448
WIRE 592 448 496 448
WIRE 496 464 496 448
WIRE 592 464 592 448
WIRE 704 464 704 448
WIRE 272 544 272 528
WIRE 496 560 496 528
WIRE 592 560 592 544
SYMBOL cap 0 368 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 688 240 R0
SYMATTR InstName R4
SYMATTR Value 49.9K
SYMBOL cap 480 464 R0
SYMATTR InstName C3
SYMATTR Value 2.2
SYMBOL res 576 448 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL cap -176 368 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap 480 -16 R0
SYMATTR InstName C5
SYMATTR Value 0.1
SYMBOL cap -80 368 R0
SYMATTR InstName C6
SYMATTR Value 82p
SYMBOL res -176 256 R0
SYMATTR InstName R6
SYMATTR Value 499
SYMBOL res 688 352 R0
SYMATTR InstName R5
SYMATTR Value 49.9K
SYMBOL res 592 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL LT83203 272 224 R0
SYMATTR InstName U2
SYMBOL cap 752 80 R0
SYMATTR SpiceLine Rser=10m
SYMATTR InstName C4
SYMATTR Value 100
SYMBOL ind 576 80 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 0.62
SYMATTR SpiceLine Rser=10m
SYMBOL voltage -160 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 864 64 R0
SYMATTR InstName Rload
SYMATTR Value 1
SYMBOL res 80 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 47.5K
FLAG 272 544 0
FLAG -160 96 0
FLAG -32 160 0
FLAG -160 448 0
FLAG 16 448 0
FLAG 496 560 0
FLAG 592 560 0
FLAG 768 176 0
FLAG 704 464 0
FLAG 880 176 0
FLAG 832 64 OUT
FLAG -64 -32 IN
FLAG -64 448 0
TEXT 184 648 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2109-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
L1 N001 OUT 1
Rload OUT 0 8
C1 OUT 0 10
XU1 IN IN N001 OUT 0 ADP2109-x.x Rtop=400K ;pnba Vin)EN)SW)FB)GND
.tran .5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2109-3.0.asy)
.lib ADP2109-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 144
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 8
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ADP2109-3.0 352 224 R0
SYMATTR InstName U1
TEXT 568 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2108-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2108-3.0.asy)
V1 IN 0 5
L1 N001 OUT 1
XU1 IN IN N001 OUT 0 ADP2108-x.x Rtop=400K ;pnba Vin)EN)SW)FB)GND
C1 OUT 0 10
Rload OUT 0 8
.tran .5m startup
.lib ADP2108-x.x.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1112 700
WIRE 192 144 96 144
WIRE 208 144 192 144
WIRE 528 144 496 144
WIRE 640 144 608 144
WIRE 720 144 640 144
WIRE 800 144 720 144
WIRE 96 160 96 144
WIRE 720 160 720 144
WIRE 800 160 800 144
WIRE 96 256 96 240
WIRE 720 256 720 224
WIRE 800 256 800 240
WIRE 192 304 192 144
WIRE 208 304 192 304
WIRE 640 304 640 144
WIRE 640 304 496 304
WIRE 352 384 352 368
SYMBOL cap 704 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ADP2108-3.0 352 224 R0
SYMATTR InstName U1
SYMBOL ind 512 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL VOLTAGE 96 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL RES 784 144 R0
SYMATTR InstName Rload
SYMATTR Value 8
FLAG 96 256 0
FLAG 352 384 0
FLAG 720 256 0
FLAG 800 256 0
FLAG 800 144 OUT
FLAG 96 144 IN
TEXT 568 352 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\004111f42170_BJT-TRAN-REGIONS.asc
* Generated by LTspice 26.0.1 for Windows.
Ibb 0 N002 0
R1 N001 CE 1k
V2 N001 0 {Ucc}
Q1 CE N002 0 0 BC547B
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Ibb 0 100uA 1uA
.step param Ucc list 5V 10V
.meas dc Ic1 find Ic(Q1) when Ib(Q1)=10uA
.meas dc Ic2 find Ic(Q1) when Ib(Q1)=50uA
.meas beta1 param Ic1/10uA
.meas beta2 param Ic2/50uA
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 240 16 208 16
WIRE 368 16 320 16
WIRE 208 64 208 16
WIRE 208 80 208 64
WIRE 368 96 368 16
WIRE 144 128 32 128
WIRE 32 144 32 128
WIRE 32 256 32 224
WIRE 208 256 208 176
WIRE 368 256 368 176
SYMBOL npn 144 80 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL Misc\\EuropeanResistor 336 0 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 27 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL current 32 224 R180
WINDOW 0 -63 0 Left 2
WINDOW 3 -66 28 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Ibb
SYMATTR Value 0
SYMBOL voltage 368 80 R0
WINDOW 3 35 85 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 35 57 Left 2
SYMATTR Value {Ucc}
SYMATTR InstName V2
FLAG 208 256 0
FLAG 32 256 0
FLAG 368 256 0
FLAG 208 64 CE
TEXT 56 272 Left 2 !.dc Ibb 0 100uA 1uA
TEXT 56 288 Left 2 !.step param Ucc list 5V 10V
TEXT 56 344 Left 2 !.meas dc Ic1 find Ic(Q1) when Ib(Q1)=10uA\n.meas dc Ic2 find Ic(Q1) when Ib(Q1)=50uA\n.meas beta1 param Ic1/10uA\n.meas beta2 param Ic2/50uA
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3048-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3048-3.3.asy)
C3 OUT 0 1 Rser=10m
C2 OUT N003 .1n
L1 IN N002 3.3 Rser=.285
XU1 N002 IN 0 N003 OUT N001 IN N001 LT3048-3.3 ;pnba SW)Vin)GND)BYP)LDOOUT)LDOIN)EN)BSTOUT
Rload OUT 0 82.5
C1 N001 0 4.7
V1 IN 0 3.3
.tran 1m startup
.lib LT3048-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 48 256 48
WIRE 464 48 416 48
WIRE 256 64 256 48
WIRE 464 64 464 48
WIRE 112 128 80 128
WIRE 416 128 416 48
WIRE 416 128 400 128
WIRE 464 144 464 128
WIRE 80 224 80 208
WIRE 80 224 -32 224
WIRE 112 224 80 224
WIRE 448 224 400 224
WIRE 528 224 448 224
WIRE 608 224 528 224
WIRE -32 240 -32 224
WIRE 448 240 448 224
WIRE 528 240 528 224
WIRE 608 240 608 224
WIRE 80 320 80 224
WIRE 112 320 80 320
WIRE 448 320 448 304
WIRE 448 320 400 320
WIRE -32 336 -32 320
WIRE 528 336 528 304
WIRE 608 336 608 320
WIRE 256 400 256 384
SYMBOL ind 96 224 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=.285
SYMBOL cap 448 64 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL res 592 224 R0
SYMATTR InstName Rload
SYMATTR Value 82.5
SYMBOL cap 512 240 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMATTR SpiceLine Rser=10m
SYMBOL PowerProducts\\LT3048-3.3 256 224 R0
SYMATTR InstName U1
SYMBOL cap 432 240 R0
SYMATTR InstName C2
SYMATTR Value .1n
SYMBOL voltage -32 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 3.3
FLAG 256 400 0
FLAG -32 336 0
FLAG 464 144 0
FLAG 528 336 0
FLAG 608 336 0
FLAG -32 224 IN
FLAG 608 224 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1206.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1206.asy)
V1 +V 0 15
V3 IN 0 AC 1
XU1 IN N001 +V -V OUT NC_01 LT1206 ;pnba In+)In-)V+)V-)OUT)COMP
R1 OUT N001 2K
V2 -V 0 -15
R2 N001 0 {R}
.ac oct 10 1 100Meg
.step param R list 100 200 400 800
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 112 16 112
WIRE 128 112 112 112
WIRE 144 112 128 112
WIRE 256 112 224 112
WIRE -176 192 -176 176
WIRE -64 192 -64 176
WIRE 192 208 192 192
WIRE 128 224 128 112
WIRE 160 224 128 224
WIRE 256 240 256 112
WIRE 256 240 224 240
WIRE 304 240 256 240
WIRE 160 256 64 256
WIRE 64 272 64 256
WIRE -176 288 -176 272
WIRE -64 288 -64 272
WIRE 176 288 176 272
WIRE 64 368 64 352
SYMBOL opamps\\LT1206 192 176 R0
SYMATTR InstName U1
SYMBOL res 240 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2K
SYMBOL res 128 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value {R}
SYMBOL voltage -64 176 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 64 256 R0
SYMATTR InstName V3
SYMATTR Value AC 1
SYMBOL voltage -176 176 R0
SYMATTR InstName V2
SYMATTR Value -15
FLAG -64 288 0
FLAG 192 192 +V
FLAG -64 176 +V
FLAG 176 288 -V
FLAG -176 288 0
FLAG -176 176 -V
FLAG 16 112 0
FLAG 64 368 0
FLAG 304 240 OUT
FLAG 64 256 IN
TEXT 200 336 Left 2 !.ac oct 10 1 100Meg\n.step param R list 100 200 400 800
* Z:\home\khalils\Downloads\files\data\raw_asc\b6534e914848_rlc.asc
* Generated by LTspice 26.0.1 for Windows.
; .dc V1 -10V 10V 100mV
; .ac dec 51 1 1MEG
R1 N001 R 1k
R4 N001 L 1k
L1 L 0 159mH
R3 N001 C 1k
C1 C 0 159nF
V1 N001 0 SINE(0 1 1kHz 0 0 0) AC 1 0
R2 R 0 1k
.tran 0 3m 0 3u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1636 732
WIRE 992 224 240 224
WIRE 1312 224 992 224
WIRE 240 304 240 224
WIRE 576 304 240 304
WIRE 816 304 656 304
WIRE 832 304 816 304
WIRE 992 304 992 224
WIRE 1056 304 992 304
WIRE 1312 304 1312 224
WIRE 1408 304 1312 304
WIRE 240 352 240 304
WIRE 1488 368 1488 304
WIRE 1136 384 1136 304
WIRE 832 416 832 304
WIRE 1136 432 1136 384
WIRE 1488 432 1488 368
WIRE 240 544 240 432
WIRE 832 560 832 496
WIRE 1136 560 1136 496
WIRE 1488 560 1488 512
SYMBOL res 1040 320 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL ind 1472 416 R0
SYMATTR InstName L1
SYMATTR Value 159mH
SYMBOL cap 1120 432 R0
SYMATTR InstName C1
SYMATTR Value 159nF
SYMBOL res 560 320 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 240 336 R0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1kHz 0 0 0) AC 1 0
SYMBOL res 1392 320 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL res 816 400 R0
SYMATTR InstName R2
SYMATTR Value 1k
FLAG 240 544 0
FLAG 832 560 0
FLAG 1136 560 0
FLAG 1488 560 0
FLAG 816 304 R
FLAG 1136 384 C
FLAG 1488 368 L
TEXT 752 672 Left 2 !; .dc V1 -10V 10V 100mV\n; .ac dec 51 1 1MEG\n.tran 0 3m 0 3u
* Z:\tmp\asc_dec_bjh7r6w2\0fd8d47ac126_SQRL_Resonator_HALF_Wave_Bridge_Rectifier_RF_Diode_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N002 N001 5k
D2 N003 0 SMS3922
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1508 680
WIRE 800 32 752 32
WIRE 944 32 880 32
WIRE 1056 32 944 32
WIRE 1056 48 1056 32
WIRE 944 112 944 32
WIRE 1056 160 1056 128
WIRE 944 272 944 176
WIRE 1056 272 1056 224
SYMBOL res 896 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5k
SYMBOL schottky 1040 160 R0
SYMATTR InstName D2
SYMATTR Value SMS3922
SYMATTR Description Diode
SYMATTR Type diode
FLAG 1056 272 0
FLAG 944 272 0
* Z:\home\khalils\Downloads\files\data\raw_asc\2aeae36cb776_FOCUS_AMP.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1800.asy)
XU2 N005 N002 5v 0 N004 LT1800 ;pnba In+)In-)V+)V-)OUT
C2 N004 N003 100p
V4 N001 0 2000
V2 N007 0 PULSE(0 2 1p 40ms 40ms 20ms 0 10)
R6 vout N006 100k
Q1 N006 N004 0 0 NPN
R1 vout 0 R=table(time,0,1000Meg,200ms,1000Meg,200.001ms,10Meg, 700ms,10Meg, 700.001ms, 1000Meg)
V1 5v 0 10
R5 N003 N002 100k
R2 N002 N007 5k
C1 N006 0 100p
R3 N006 N005 5Meg
R4 N005 0 10k
R12 N001 N006 3Meg
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 1s
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2456 680
WIRE 1472 80 1024 80
WIRE 672 128 656 128
WIRE 768 128 752 128
WIRE 944 128 832 128
WIRE 1024 128 1024 80
WIRE 832 208 672 208
WIRE 1024 208 912 208
WIRE 1088 208 1024 208
WIRE 1120 208 1088 208
WIRE 1264 208 1200 208
WIRE 1328 208 1264 208
WIRE 1088 224 1088 208
WIRE 560 240 496 240
WIRE 656 240 656 128
WIRE 656 240 640 240
WIRE 720 240 656 240
WIRE 1328 240 1328 208
WIRE 1472 240 1472 80
WIRE 944 256 944 128
WIRE 944 256 784 256
WIRE 960 256 944 256
WIRE 672 272 672 208
WIRE 720 272 672 272
WIRE 672 288 672 272
WIRE 944 288 944 256
WIRE 976 288 944 288
WIRE -32 320 -80 320
WIRE -16 320 -32 320
WIRE 496 320 496 240
WIRE -80 352 -80 320
WIRE 1024 368 1024 304
WIRE 1072 368 1024 368
WIRE 1088 368 1088 288
WIRE 1088 368 1072 368
WIRE 1072 480 1072 368
SYMBOL Cap 832 112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 100p
SYMBOL Res 928 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5Meg
SYMBOL Res 1312 224 R0
SYMATTR InstName R1
SYMATTR Value R=table(time,0,1000Meg,200ms,1000Meg,200.001ms,10Meg, 700ms,10Meg, 700.001ms, 1000Meg)
SYMBOL Voltage 1472 224 R0
SYMATTR InstName V4
SYMATTR Value 2000
SYMBOL Res 1008 112 R0
SYMATTR InstName R12
SYMATTR Value 3Meg
SYMBOL Res 656 272 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL Res 1216 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 100k
SYMBOL Cap 1072 224 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL Res 656 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5k
SYMBOL OpAmps/LT1800 752 192 R0
SYMATTR InstName U2
SYMBOL npn 960 208 R0
SYMATTR InstName Q1
SYMBOL Voltage -80 336 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL Res 768 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 100k
SYMBOL Voltage 496 304 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 1p 40ms 40ms 20ms 0 10)
FLAG -80 432 0
FLAG -32 320 5v
FLAG 752 224 5v
FLAG 1072 480 0
FLAG 1472 320 0
FLAG 752 288 0
FLAG 496 400 0
FLAG 1328 320 0
FLAG 672 368 0
FLAG 1264 208 vout
TEXT 592 528 Left 2 !.tran 1s
* Z:\home\khalils\Downloads\files\data\raw_asc\19ef61a8593d_Draft14.asc
* Generated by LTspice 26.0.1 for Windows.
* OK. Half works. translates 1V sin at 50V to near 0V. \nBut 0.2V offset.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1006.asy)
;dc V1 0 10 0.01
VIN N001 VEE2 SINE(2 1 50)
R3 N003 N001 10k
V4 VEE2 0 50
R4 N002 N003 10k
R1 VOUT 0 10k
XU1 VEE2 N003 VCC2 VEE2 N004 LT1006 ;pnba In+)In-)V+)V-)OUT
V1 VCC2 VEE2 15
Q1 VOUT N004 N002 0 2N3906
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0.1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1688 680
WIRE 256 16 0 16
WIRE 672 16 416 16
WIRE 0 32 0 16
WIRE 672 48 672 16
WIRE 336 80 336 16
WIRE 384 80 336 80
WIRE 608 96 448 96
WIRE 384 112 304 112
WIRE 672 224 672 144
WIRE 736 224 672 224
WIRE 752 224 736 224
WIRE 672 272 672 224
WIRE 16 336 -192 336
SYMBOL res 432 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL res 656 256 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL OpAmps\\LT1006 416 32 R0
SYMATTR InstName U1
SYMBOL res 352 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL voltage -192 240 R0
WINDOW 0 54 29 Left 2
WINDOW 3 50 56 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage 0 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value SINE(2 1 50)
SYMATTR InstName VIN
SYMBOL voltage -192 320 R0
WINDOW 0 54 29 Left 2
WINDOW 3 50 56 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 50
SYMBOL pnp 608 144 M180
SYMATTR InstName Q1
SYMATTR Value 2N3906
FLAG -192 416 0
FLAG 16 336 VEE2
FLAG -192 256 VCC2
FLAG 672 352 0
FLAG 416 128 VEE2
FLAG 416 64 VCC2
FLAG 0 112 VEE2
FLAG 304 112 VEE2
FLAG 736 224 VOUT
TEXT -336 -112 Left 2 !;dc V1 0 10 0.01
TEXT 304 448 Left 2 !.tran 0.1
TEXT 912 88 Left 2 ;OK. Half works. translates 1V sin at 50V to near 0V. \nBut 0.2V offset.
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3007-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3007-2.5.asy)
C1 OUT 0 1
V1 IN 0 PWL(0 0 1 10)
XU1 IN OUT OUT 0 IN LT3008-2.5 ;pnba IN)OUT)Sense)GND)_SHDN
Rload OUT 0 250
.tran 1
.lib LT3009.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 32 48 0 48
WIRE 352 48 320 48
WIRE 416 48 352 48
WIRE 512 48 416 48
WIRE -208 64 -208 48
WIRE 416 64 416 48
WIRE 512 64 512 48
WIRE 0 144 0 48
WIRE 32 144 0 144
WIRE 352 144 352 48
WIRE 352 144 320 144
WIRE -208 160 -208 144
WIRE 416 160 416 128
WIRE 512 160 512 144
WIRE 176 240 176 208
SYMBOL res 496 48 R0
SYMATTR InstName Rload
SYMATTR Value 250
SYMBOL cap 400 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LT3007-2.5 176 96 R0
SYMATTR InstName U1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -208 160 0
FLAG 416 160 0
FLAG 512 160 0
FLAG 176 240 0
FLAG -208 48 IN
FLAG 512 48 OUT
TEXT 336 248 Left 2 !.tran 1