Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\7acf6748c0f8_Transistor_BJT_Beta.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Ic/Ib to find beta
* Transistor's beta
V1 Vcc 0 5
R1 Vcc N001 1
Q1 N001 N002 0 0 2N3904
I1 0 N002 {A}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.step PARAM A 1m 200m 1m
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 976 680
WIRE 160 96 160 64
WIRE 96 144 64 144
WIRE 160 208 160 192
SYMBOL npn 96 96 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 144 -32 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL voltage 304 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL current -16 144 R270
WINDOW 0 32 40 VTop 2
WINDOW 3 -32 40 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value {A}
FLAG 160 -16 Vcc
FLAG 304 80 Vcc
FLAG -16 144 0
FLAG 160 208 0
FLAG 304 160 0
TEXT 456 56 Left 2 !.step PARAM A 1m 200m 1m
TEXT 264 0 Left 2 !.op
TEXT 456 96 Left 2 ;Plot Ic/Ib to find beta
TEXT 176 -128 Left 4 ;Transistor's beta
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7155-03.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7155-03.asy)
R5 OUT 0 25
V1 IN 0 3.4
C3 OUT 0 10
XU1 N004 OUT N002 0 N005 N003 N001 IN ADM7154_5 Vreg=3.2022 Vref=1.2152 ;pnba Vreg)Vout)Byp)GND)Ref_Sense)Ref)EN)Vin
C2 N002 0 1
R3 IN N001 100K
R2 N005 0 100K
R1 N003 N005 110k
C4 N003 0 1
C1 N004 0 1
.tran 5m startup
.lib ADM7154_5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -160 32
WIRE 80 32 -32 32
WIRE 464 32 400 32
WIRE 560 32 464 32
WIRE -160 48 -160 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE -160 144 -160 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE 0 224 -16 224
WIRE 80 224 64 224
WIRE 464 224 400 224
WIRE 560 224 464 224
WIRE 464 240 464 224
WIRE 560 240 560 224
WIRE 560 320 560 304
WIRE 0 336 -16 336
WIRE 80 336 64 336
WIRE 464 336 464 320
WIRE 464 336 400 336
WIRE 464 352 464 336
WIRE 240 416 240 400
WIRE 464 448 464 432
SYMBOL res 544 32 R0
SYMATTR InstName R5
SYMATTR Value 25
SYMBOL cap 448 48 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL cap 544 240 R0
WINDOW 0 36 14 Left 2
WINDOW 3 36 50 Left 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res 448 224 R0
SYMATTR InstName R1
SYMATTR Value 110k
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL voltage -160 32 R0
SYMATTR InstName V1
SYMATTR Value 3.4
SYMBOL res 448 336 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL cap 64 320 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL ADM7155-03 240 176 R0
SYMATTR InstName U1
FLAG 240 416 0
FLAG 560 320 0
FLAG 464 144 0
FLAG -16 336 0
FLAG -16 224 0
FLAG -160 144 0
FLAG 560 144 0
FLAG 464 448 0
FLAG -160 32 IN
FLAG 560 32 OUT
TEXT 552 448 Left 2 !.tran 5m startup
* Z:\tmp\asc_dec_bjh7r6w2\0e3fc9753ca8_PWMGenerator_with555Timer_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N004 0 1n
D2 N006 N001 D
C1 N002 0 110n
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1068 680
WIRE 480 80 448 80
WIRE 448 96 448 80
WIRE 384 128 384 -32
WIRE 384 128 96 128
WIRE 480 144 432 144
WIRE 96 176 96 128
WIRE 384 176 384 128
WIRE 480 208 448 208
WIRE 736 208 704 208
WIRE 480 272 464 272
WIRE 752 272 704 272
WIRE 96 288 96 240
WIRE 128 288 96 288
WIRE 240 288 208 288
WIRE 272 288 240 288
WIRE 384 288 384 240
WIRE 384 288 352 288
WIRE 432 320 432 144
WIRE 736 320 736 208
WIRE 736 320 432 320
WIRE 240 336 240 288
WIRE 432 336 432 320
WIRE 432 336 240 336
WIRE 448 336 448 208
WIRE 864 336 448 336
WIRE 240 352 240 336
WIRE 752 368 752 272
WIRE 128 448 -64 448
WIRE 240 448 240 416
WIRE 240 448 128 448
WIRE 752 464 752 432
WIRE 128 480 128 448
WIRE 464 544 464 272
SYMBOL cap 736 368 R0
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL diode 400 240 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMBOL cap 224 352 R0
SYMATTR InstName C1
SYMATTR Value 110n
FLAG 128 480 0
FLAG 448 96 0
FLAG 864 336 out
FLAG 752 464 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6100.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 48
I1 N002 0 PULSE(.9 1 100n 1u 1u .5m 1m)
R1 N002 N001 0.01
V2 +V 0 5
XU1 N002 +V FIL 0 OUT N003 N003 N001 LT6100 ;pnba VS-)VCC)FIL)VEE)VOUT)A2)A4)VS+
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6100.asy)
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 112 -96 112
WIRE 80 112 16 112
WIRE 208 112 160 112
WIRE 320 112 208 112
WIRE -96 128 -96 112
WIRE 320 128 320 112
WIRE 208 208 208 112
WIRE 208 208 64 208
WIRE -96 224 -96 208
WIRE 320 224 320 208
WIRE 320 304 288 304
WIRE 208 320 208 304
WIRE 288 320 288 304
WIRE 320 320 320 304
WIRE -96 352 -96 336
WIRE 16 384 16 112
WIRE 160 384 16 384
WIRE 448 416 400 416
WIRE -96 448 -96 432
WIRE 64 448 64 208
WIRE 160 448 64 448
WIRE 272 496 272 480
WIRE 320 496 320 480
FLAG -96 224 0
FLAG 320 224 0
FLAG -96 448 0
FLAG 448 416 OUT
FLAG 272 496 0
FLAG 320 496 FIL
FLAG -96 336 +V
FLAG 208 304 +V
SYMBOL voltage -96 112 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 48
SYMBOL current 320 128 R0
WINDOW 123 24 116 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value PULSE(.9 1 100n 1u 1u .5m 1m)
SYMBOL res 176 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 0.01
SYMBOL voltage -96 336 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL LT6100 288 448 R0
SYMATTR InstName U1
TEXT 480 504 Left 2 !.tran 3m
* Z:\tmp\asc_dec_bjh7r6w2\00f12bb97103_LED_control_simulation_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
D2 N001 N002 QTLP690C
V2 N003 N007 PULSE(0 2 0 1n 1n 100u 200u)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 464 48 416 48
WIRE 768 48 464 48
WIRE 416 96 416 48
WIRE 416 96 320 96
WIRE 768 112 464 112
WIRE 320 128 320 96
WIRE 320 128 288 128
WIRE 208 144 96 144
WIRE 320 160 288 160
WIRE 96 176 96 144
WIRE 128 176 128 -96
WIRE 208 176 128 176
WIRE 416 192 288 192
WIRE 800 208 464 208
WIRE 96 288 96 256
WIRE 464 288 96 288
SYMBOL diode 448 48 R0
SYMATTR InstName D2
SYMATTR Value QTLP690C
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage 96 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 2 0 1n 1n 100u 200u)
FLAG 320 16 0
FLAG 320 160 0
* Z:\home\khalils\Downloads\files\data\raw_asc\4026bff789e5_6240.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6240.asy)
V2 V- 0 -5
V3 IN 0 PULSE(-1 1 0 1n 1n 100u 200u)
XU1 IN OUT V+ V- OUT LTC6241 ;pnba IN+)IN-)VCC)VEE)OUT
C1 OUT 0 5p
R1 OUT 0 1K
V1 V+ 0 5
.tran 1m
.lib LTC4.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 144 -96 128
WIRE 0 144 0 128
WIRE -96 256 -96 224
WIRE 0 256 0 224
WIRE 256 256 128 256
WIRE 128 320 128 256
WIRE 160 320 128 320
WIRE 256 336 256 256
WIRE 256 336 224 336
WIRE 352 336 256 336
WIRE 448 336 352 336
WIRE 160 352 -80 352
WIRE 352 352 352 336
WIRE 448 352 448 336
WIRE -80 368 -80 352
WIRE 352 448 352 432
WIRE 448 448 448 416
WIRE -80 464 -80 448
SYMBOL voltage -96 128 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL opamps\\LTC6240 192 336 R0
SYMATTR InstName U1
SYMBOL res 336 336 R0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL cap 432 352 R0
SYMATTR InstName C1
SYMATTR Value 5p
SYMBOL voltage -80 352 R0
SYMATTR InstName V3
SYMATTR Value PULSE(-1 1 0 1n 1n 100u 200u)
SYMBOL voltage 0 128 R0
SYMATTR InstName V2
SYMATTR Value -5
FLAG -96 256 0
FLAG 0 256 0
FLAG -80 464 0
FLAG -80 352 IN
FLAG 448 336 OUT
FLAG 352 448 0
FLAG 448 448 0
FLAG 192 368 V-
FLAG 0 128 V-
FLAG -96 128 V+
FLAG 192 304 V+
TEXT 544 448 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\7843ef507c42_Voltage-regulator-npn.asc
* Generated by LTspice 26.0.1 for Windows.
* Very simple current regulator with opamp controlling voltage on R1.
* Voltage regulator
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
V4 Vref 0 {VV}
V1 Vee 0 -15
V2 Vcc 0 15
XU1 Vref OUT Vcc Vee N001 LT1001 ;pnba In+)In-)V+)V-)OUT
V3 Vin 0 5
R1 OUT 0 500
Q2 Vin N001 N002 0 2N3904
Q1 Vin N002 OUT 0 2N3904
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.step param VV 1 5 0.5
.op
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1056 680
WIRE 160 112 160 80
WIRE 160 112 48 112
WIRE -16 160 -64 160
WIRE 160 192 160 112
WIRE 48 240 48 208
WIRE 96 240 48 240
WIRE -64 272 -64 160
WIRE 160 336 160 288
WIRE -48 352 -48 336
WIRE 32 352 -48 352
WIRE -80 368 -80 336
WIRE 160 368 160 336
WIRE 160 368 -80 368
WIRE 160 384 160 368
WIRE 160 480 160 464
SYMBOL voltage 336 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value {VV}
SYMBOL npn -16 112 R0
SYMATTR InstName Q2
SYMATTR Value 2N3904
SYMBOL voltage 688 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value -15
SYMBOL voltage 576 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL Opamps\\LT1001 -128 304 R270
SYMATTR InstName U1
SYMBOL voltage 464 256 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL res 144 368 R0
SYMATTR InstName R1
SYMATTR Value 500
SYMBOL npn 96 192 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
FLAG 160 80 Vin
FLAG 576 352 0
FLAG 688 352 0
FLAG 464 352 0
FLAG 576 272 Vcc
FLAG -96 304 Vcc
FLAG 688 272 Vee
FLAG -32 304 Vee
FLAG 160 480 0
FLAG 336 352 0
FLAG 32 352 Vref
FLAG 336 272 Vref
FLAG 464 272 Vin
FLAG 160 336 OUT
TEXT 408 168 Left 2 !.step param VV 1 5 0.5
TEXT 408 200 Left 2 !.op
TEXT -16 -48 Left 2 ;Very simple current regulator with opamp controlling voltage on R1.
TEXT 200 -128 Left 4 ;Voltage regulator
* Z:\home\khalils\Downloads\files\data\raw_asc\1feaac3a0cab_pmos_OR.asc
* Generated by LTspice 26.0.1 for Windows.
V3 N004 0 PULSE(-5 5 1 1n 1n 2 4 10)
M2 N006 N004 N003 N003 PMOS
V4 N005 0 5
V1 N001 0 5
M3 N007 N006 N005 N005 PMOS
V2 N002 0 PULSE(-5 5 1 1n 1n 4 8 10)
M1 N003 N002 N001 N001 PMOS
R1 N006 0 100k
R2 N007 0 100k
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 50
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 -624 -272 -624
WIRE 448 -624 176 -624
WIRE 176 -336 176 -544
WIRE 368 -320 224 -320
WIRE 448 -320 448 -624
WIRE -272 -176 -272 -624
WIRE 176 -128 176 -240
WIRE 368 -112 224 -112
WIRE 448 -112 448 -320
WIRE -272 128 -272 -96
WIRE 176 144 176 -32
WIRE 176 144 -224 144
WIRE 176 208 176 144
WIRE -272 224 -368 224
WIRE -272 320 -272 304
WIRE 176 320 176 288
WIRE 176 320 -272 320
WIRE 448 320 448 -112
WIRE 448 320 176 320
WIRE 176 368 176 320
SYMBOL pmos -224 224 R180
SYMATTR InstName M3
SYMBOL pmos 224 -240 R180
SYMATTR InstName M1
SYMBOL pmos 224 -32 R180
SYMATTR InstName M2
SYMBOL voltage 176 -528 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 160 192 R0
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL res -288 208 R0
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL voltage 352 -112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(-5 5 1 1n 1n 2 4 10)
SYMBOL voltage 352 -320 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(-5 5 1 1n 1n 4 8 10)
SYMBOL voltage -272 -80 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
FLAG 176 368 0
TEXT -146 600 Left 2 !.tran 50
* Z:\home\khalils\Downloads\files\data\raw_asc\0a495bb34fe8_npn_output_sim.asc
* Generated by LTspice 26.0.1 for Windows.
* V(out)-V(ref) = 1.25V\nV(out) = V(ref) * (1 + R2/R1) + I(adj)*R2
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp2.asy)
R1 N001 0 10
V1 5v 0 5
V2 cmd 0 PULSE(0 4.5 0 10m 0 10m 50m)
XU1 cmd N001 5v 0 N002 level2 Avol=1Meg GBW=10Meg Slew=10Meg Ilimit=25m Rail=0 Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT
Q1 5v N002 N001 0 2n3904
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 10m 0 1u
.lib UniversalOpAmp2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1124
WIRE 432 -48 64 -48
WIRE 304 144 304 96
WIRE 128 160 128 144
WIRE 64 176 64 -48
WIRE 96 176 64 176
WIRE 240 192 160 192
WIRE 64 208 0 208
WIRE 96 208 64 208
WIRE 0 224 0 208
WIRE -192 240 -192 224
WIRE 128 240 128 224
WIRE 304 272 304 240
WIRE 432 272 432 -48
WIRE 432 272 304 272
WIRE 304 288 304 272
WIRE 0 352 0 304
WIRE -192 368 -192 320
WIRE 304 400 304 368
SYMBOL voltage 0 208 R0
WINDOW 3 18 110 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 4.5 0 10m 0 10m 50m)
SYMATTR InstName V2
SYMBOL OpAmps\\UniversalOpAmp2 128 192 R0
SYMATTR InstName U1
SYMBOL npn 240 144 R0
SYMATTR InstName Q1
SYMATTR Value 2n3904
SYMBOL res 288 272 R0
SYMATTR InstName R1
SYMATTR Value 10
SYMBOL voltage -192 224 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -192 368 0
FLAG 0 352 0
FLAG 64 208 cmd
FLAG 128 144 5v
FLAG 128 240 0
FLAG 304 400 0
FLAG 304 96 5v
FLAG -192 224 5v
TEXT -32 392 Left 2 !.tran 0 10m 0 1u
TEXT 8 -16 Left 2 ;V(out)-V(ref) = 1.25V\nV(out) = V(ref) * (1 + R2/R1) + I(adj)*R2
* Z:\home\khalils\Downloads\files\data\raw_asc\2d86b6a033bc_Lab_02_Part_01_-_20101569.asc
* Generated by LTspice 26.0.1 for Windows.
V1 A 0 5
D1 B 0 D
R1 A B 1k
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 0 15 0.001
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 96 80 96
WIRE 320 96 256 96
WIRE 320 144 320 96
WIRE 80 160 80 96
WIRE 80 288 80 240
WIRE 208 288 80 288
WIRE 320 288 320 208
WIRE 320 288 208 288
WIRE 208 320 208 288
SYMBOL res 160 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 304 144 R0
SYMATTR InstName D1
SYMBOL voltage 80 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 208 320 0
FLAG 80 96 A
FLAG 320 96 B
TEXT 360 104 Left 2 !.dc V1 0 15 0.001
* Z:\home\khalils\Downloads\files\data\raw_asc\e674b93b2701_Nand_.asc
* Generated by LTspice 26.0.1 for Windows.
V2 b 0 PULSE(0 1.8 0 5n 5n 40m 80m)
Vdd N001 0 5
M3 N001 a Vout Vout PMOS
M2 N002 b 0 0 NMOS
V1 a 0 PULSE(0 1.8 0 5n 5n 20m 40m)
M1 Vout a N002 N002 NMOS
M4 N001 b Vout Vout PMOS
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 80m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 -64 256 -80
WIRE 256 -64 176 -64
WIRE 336 -64 256 -64
WIRE 176 -32 176 -64
WIRE 336 -32 336 -64
WIRE 176 80 176 64
WIRE 240 80 176 80
WIRE 336 80 336 64
WIRE 336 80 240 80
WIRE 240 144 240 80
WIRE 272 144 240 144
WIRE 240 176 240 144
WIRE 240 320 240 272
WIRE 240 432 240 416
IOPIN 272 144 Out
SYMBOL pmos 128 -32 R0
SYMATTR InstName M3
SYMBOL pmos 288 -32 R0
SYMATTR InstName M4
SYMBOL voltage 256 -64 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName Vdd
SYMATTR Value 5
SYMBOL nmos 192 320 R0
SYMATTR InstName M2
SYMBOL voltage -288 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1.8 0 5n 5n 20m 40m)
SYMBOL nmos 192 176 R0
SYMATTR InstName M1
SYMBOL voltage -288 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1.8 0 5n 5n 40m 80m)
FLAG 240 432 0
FLAG 272 144 Vout
FLAG -288 -48 a
FLAG 128 48 a
FLAG 192 256 a
FLAG -288 144 b
FLAG 288 48 b
FLAG 192 400 b
FLAG -288 32 0
FLAG -288 224 0
FLAG 256 -160 0
TEXT -320 464 Left 2 !.tran 80m
* Z:\home\khalils\Downloads\files\data\raw_asc\0fd8b3be9c5d_Diodo_1N4001__regions_.asc
* Generated by LTspice 26.0.1 for Windows.
D1 Diodo 0 DI_1N4001
V1 Diodo 0 0
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -55 10 100m
.MODEL DI_1N4001 D ( IS=76.9p RS=42.0m BV=50.0 IBV=5.00u
+ CJO=39.8p M=0.333 N=1.45 TT=4.32u )
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 80 96 80
WIRE 240 80 176 80
WIRE 96 112 96 80
WIRE 240 128 240 80
WIRE 96 224 96 192
WIRE 240 224 240 192
WIRE 240 224 96 224
WIRE 96 256 96 224
FLAG 176 80 Diodo
FLAG 96 256 0
SYMBOL diode 224 128 R0
SYMATTR InstName D1
SYMATTR Value DI_1N4001
SYMBOL voltage 96 96 R0
SYMATTR InstName V1
SYMATTR Value 0
TEXT 192 264 Left 2 !.dc V1 -55 10 100m
TEXT 80 8 Left 1 !.MODEL DI_1N4001 D  ( IS=76.9p RS=42.0m BV=50.0 IBV=5.00u\n+ CJO=39.8p  M=0.333 N=1.45 TT=4.32u )
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7171-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7171-1.8.asy)
C1 OUT 0 4.7 Rser=1.5m
XU1 IN OUT IN N001 OUT 0 ADM7171-1.8 ;pnba Vin)Sense)EN)SS)Vout)GND
V1 IN 0 2.3
C2 N001 0 1n
Rload OUT 0 3
.tran 5m startup
.lib ADM7171-1.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 3
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2.3
SYMBOL ADM7171-1.8 224 128 R0
SYMATTR InstName U1
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\5f0c01582587_Fig9_31_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
VSG 0 N001 350m
VSD 0 N002 0
M1 0 N001 N002 0 P_50n l=100n w=5u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSD 0 1 1m
.lib cmosedu_models.txt
* Plot Id(M1)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 688
WIRE 320 96 320 80
WIRE 320 192 320 176
WIRE 400 192 320 192
WIRE 448 80 320 80
WIRE 448 112 448 80
WIRE 448 304 448 208
WIRE 672 80 448 80
WIRE 672 160 448 160
WIRE 672 160 672 80
WIRE 672 192 672 160
WIRE 672 304 448 304
WIRE 672 304 672 272
WIRE 848 80 672 80
WIRE 848 112 848 80
FLAG 848 112 0
SYMBOL voltage 320 80 R0
WINDOW 0 -93 54 Left 0
WINDOW 3 -93 82 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VSG
SYMATTR Value 350m
SYMBOL voltage 672 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 38 54 Left 0
WINDOW 3 38 82 Left 0
SYMATTR InstName VSD
SYMATTR Value 0
SYMBOL pmos4 400 112 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 l=100n w=5u
SYMATTR InstName M1
SYMATTR Value P_50n
TEXT 384 336 Left 0 !.dc VSD 0 1 1m
TEXT 384 360 Left 0 !.lib cmosedu_models.txt
TEXT 432 56 Left 0 ;Plot Id(M1)
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17555B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17555B.asy)
C1 vOUT 0 10
R1 vIN N002 3.32Meg
R3 vOUT N003 100k
R2 N002 0 475k
Rload vOUT 0 100
V1 vIN 0 12
XU1 0 vIN N002 0 vOUT N001 N003 MAX17555B ;pnba GND)IN)EN/UV)HYST)FB/VO)LX)_RESET
L1 N001 vOUT 220 Rser=3.7
.tran 1.6m startup
.lib MAX17555B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 992 680
WIRE -48 -32 -64 -32
WIRE 48 -32 -48 -32
WIRE 176 -32 48 -32
WIRE 512 -32 464 -32
WIRE 624 -32 592 -32
WIRE 704 -32 624 -32
WIRE 752 -32 704 -32
WIRE 784 -32 752 -32
WIRE 48 -16 48 -32
WIRE 624 -16 624 -32
WIRE 784 -16 784 -32
WIRE -64 16 -64 -32
WIRE 624 64 624 48
WIRE 784 80 784 64
WIRE 48 96 48 64
WIRE 176 96 48 96
WIRE 48 112 48 96
WIRE -64 128 -64 96
WIRE 512 128 464 128
WIRE 704 128 704 -32
WIRE 704 128 592 128
WIRE 48 224 48 192
WIRE 176 224 48 224
WIRE 704 224 704 128
WIRE 704 224 464 224
WIRE 48 240 48 224
WIRE 320 384 320 368
SYMBOL res 32 96 R0
SYMATTR InstName R2
SYMATTR Value 475k
SYMBOL voltage -64 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 768 -32 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL ind 496 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 220
SYMATTR SpiceLine Rser=3.7
SYMBOL res 608 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 3.32Meg
SYMBOL MAX17555B 320 144 R0
SYMATTR InstName U1
SYMBOL cap 608 -16 R0
SYMATTR InstName C1
SYMATTR Value 10
FLAG -64 128 0
FLAG 320 384 0
FLAG 624 64 0
FLAG 784 80 0
FLAG -48 -32 vIN
FLAG 752 -32 vOUT
FLAG 48 240 0
TEXT 472 400 Left 2 !.tran 1.6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4830.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4830.asy)
V1 N001 0 5
XU1 N003 N004 0 N001 0 N005 N002 OUT ADA4830 ;pnba VREF)IN+)IN-)V+)V-)ENA)STB)OUT
V5 N005 0 PULSE(0 3 1u 1n 1n 10u 20u)
V3 N004 0 SINE(0 1 1Meg)
R2 OUT 0 1K
R1 N001 N002 5K
V4 N003 0 2.5
.tran 100u
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1256 680
WIRE 16 16 -128 16
WIRE 64 16 16 16
WIRE -128 32 -128 16
WIRE 64 32 64 16
WIRE 16 112 16 16
WIRE -128 128 -128 112
WIRE 64 128 64 112
WIRE -16 160 -32 160
WIRE -16 192 -336 192
WIRE 336 192 192 192
WIRE -336 208 -336 192
WIRE 336 208 336 192
WIRE -16 224 -208 224
WIRE -208 240 -208 224
WIRE 16 288 16 272
WIRE 64 288 64 272
WIRE -336 304 -336 288
WIRE 336 304 336 288
WIRE -208 336 -208 320
WIRE 64 384 64 368
SYMBOL res 48 16 R0
SYMATTR InstName R1
SYMATTR Value 5K
SYMBOL voltage -336 192 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR InstName V4
SYMATTR Value 2.5
SYMBOL voltage -208 224 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR Value SINE(0 1 1Meg)
SYMATTR InstName V3
SYMBOL res 320 192 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL ADA4830 48 192 R0
WINDOW 0 50 -38 Left 2
SYMATTR InstName U1
SYMBOL voltage 64 272 R0
WINDOW 123 24 132 Left 2
WINDOW 39 24 114 Left 2
SYMATTR Value PULSE(0 3 1u 1n 1n 10u 20u)
SYMATTR InstName V5
SYMBOL voltage -128 16 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
FLAG 16 288 0
FLAG 336 192 OUT
FLAG -336 304 0
FLAG -208 336 0
FLAG -128 128 0
FLAG 336 304 0
FLAG 64 384 0
FLAG -32 160 0
TEXT 328 416 Left 2 !.tran 100u