Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\744869a60964_Input.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 N006 N003 VCC 0 N004 LTC6244 ;pnba IN+)IN-)VCC)VEE)OUT
V1 VCC 0 10
V2 N006 0 2.5
V3 N005 0 SINE(0 1 200) AC 1
R1 N003 N005 10k
R2 N004 N003 10k
XU2 N007 N001 VCC 0 N002 LTC6244 ;pnba IN+)IN-)VCC)VEE)OUT
R3 N002 N001 10k
R4 N001 N004 10k
C1 N002 N001 8n
V4 N007 0 5
.ac dec 100 10m 20k
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6244.asy)
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 672 -48 608 -48
WIRE 784 -48 736 -48
WIRE 256 48 240 48
WIRE 432 48 336 48
WIRE 608 48 608 -48
WIRE 672 48 608 48
WIRE 784 48 784 -48
WIRE 784 48 752 48
WIRE 16 160 -80 160
WIRE 240 160 240 48
WIRE 240 160 96 160
WIRE 336 160 240 160
WIRE 432 176 432 48
WIRE 432 176 400 176
WIRE 496 176 432 176
WIRE 608 176 608 48
WIRE 608 176 576 176
WIRE 672 176 608 176
WIRE 336 192 160 192
WIRE 784 192 784 48
WIRE 784 192 736 192
WIRE 672 208 608 208
WIRE -80 224 -80 160
WIRE 160 224 160 192
WIRE 608 272 608 208
FLAG 368 208 0
FLAG -80 96 0
FLAG -80 304 0
FLAG 160 304 0
FLAG -80 16 VCC
IOPIN -80 16 Out
FLAG 368 144 VCC
IOPIN 368 144 In
FLAG 704 224 0
FLAG 704 160 VCC
IOPIN 704 160 In
FLAG 608 352 0
SYMBOL Opamps\\LTC6244 368 176 R0
SYMATTR InstName U1
SYMBOL voltage -80 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL voltage 160 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 2.5
SYMBOL voltage -80 208 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value SINE(0 1 200)
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 352 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL Opamps\\LTC6244 704 192 R0
SYMATTR InstName U2
SYMBOL res 768 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 592 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL cap 736 -64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 8n
SYMBOL voltage 608 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
TEXT -152 328 Left 2 !.ac dec 100 10m 20k
* Z:\home\khalils\Downloads\files\data\raw_asc\3becc99ed8b5_trans-1-1-2.asc
* Generated by LTspice 26.0.1 for Windows.
Vds UDS 0 -12V
V2 UGS 0
M1 UDS UGS 0 0 IRF9640
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 -2 -5V
.step temp list 25 175
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1292 680
WIRE -624 -176 -720 -176
WIRE -560 -176 -624 -176
WIRE -720 -128 -720 -176
WIRE -560 -80 -560 -176
WIRE -880 -48 -896 -48
WIRE -768 -48 -880 -48
WIRE -896 -32 -896 -48
WIRE -896 64 -896 48
WIRE -720 64 -720 -32
WIRE -560 64 -560 0
FLAG -560 64 0
FLAG -896 64 0
FLAG -720 64 0
FLAG -880 -48 UGS
FLAG -624 -176 UDS
SYMBOL voltage -560 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 36 82 Left 2
SYMATTR InstName Vds
SYMATTR Value -12V
SYMBOL voltage -896 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 53 Left 2
WINDOW 3 -97 181 Left 2
WINDOW 0 35 44 Left 2
SYMATTR Value ""
SYMATTR InstName V2
SYMBOL pmos -768 -128 R0
SYMATTR InstName M1
SYMATTR Value IRF9640
TEXT -904 96 Left 2 !.dc V2 -2 -5V
TEXT -904 112 Left 2 !.step temp list 25 175
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8410.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8410.asy)
XU1 IN IN 0 N001 OUT N002 N003 N004 LT8410 ;pnba _SHDN)Vcc)GND)SW)Vout)CAP)Vref)FBP
V1 IN 0 3.6 Rser=0.1
Rload OUT 0 20K
R2 N004 0 412K
C3 N003 0 .01 Rser=10m
L1 IN N001 100
C1 N002 0 .1
R1 N003 N004 604K
C2 OUT 0 .1
.tran 2m startup
.lib LT8410.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1572
WIRE 1648 880 1552 880
WIRE 1664 880 1648 880
WIRE 1760 880 1744 880
WIRE 2016 880 1888 880
WIRE 1552 896 1552 880
WIRE 2016 896 2016 880
WIRE 1760 944 1760 880
WIRE 1888 944 1888 880
WIRE 2016 976 2016 960
WIRE 1552 992 1552 976
WIRE 1648 1008 1648 880
WIRE 1680 1008 1648 1008
WIRE 2208 1008 1968 1008
WIRE 2304 1008 2208 1008
WIRE 2208 1024 2208 1008
WIRE 2304 1024 2304 1008
WIRE 2000 1088 1968 1088
WIRE 2112 1088 2000 1088
WIRE 2112 1104 2112 1088
WIRE 2208 1120 2208 1088
WIRE 2304 1120 2304 1104
WIRE 1648 1168 1648 1008
WIRE 1680 1168 1648 1168
WIRE 2000 1168 1968 1168
WIRE 2000 1184 2000 1168
WIRE 2112 1184 2112 1168
WIRE 1824 1248 1824 1232
WIRE 2000 1280 2000 1264
SYMBOL VOLTAGE 1552 880 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMATTR SpiceLine Rser=0.1
SYMBOL PowerProducts\\LT8410 1824 1088 R0
SYMATTR InstName U1
SYMBOL cap 2000 896 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL cap 2192 1024 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL RES 1984 1072 R0
SYMATTR InstName R1
SYMATTR Value 604K
SYMBOL RES 1984 1168 R0
SYMATTR InstName R2
SYMATTR Value 412K
SYMBOL res 2288 1008 R0
SYMATTR InstName Rload
SYMATTR Value 20K
SYMBOL cap 2096 1104 R0
SYMATTR InstName C3
SYMATTR Value .01
SYMATTR SpiceLine Rser=10m
SYMBOL ind 1648 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
FLAG 2304 1008 OUT
FLAG 1824 1248 0
FLAG 1552 992 0
FLAG 1552 880 IN
FLAG 2016 976 0
FLAG 2208 1120 0
FLAG 2304 1120 0
FLAG 2000 1280 0
FLAG 2112 1184 0
TEXT 2144 1248 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\f1825fb39228_assignment01.asc
* Generated by LTspice 26.0.1 for Windows.
* .op
* .tran 5m
* .ac dec 20 0.1 1T
M1 N002 N003 0 0 CMOSN l={l} w={w}
V2 N001 0 1.8
R1 N001 N002 {R}
V1 N003 0 SINE(0.9 50m 1k) AC 50m
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib tsmc018.lib
.dc V2 0 1.8 0.1 V1 0 0.9 0.05
.step param R 10 1k 50
.step param w 0.5u 1.5u 0.5u
.step param l 50n 180n 25n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 752 48 480 48
WIRE 480 176 480 128
WIRE 752 208 752 48
WIRE 592 224 480 224
WIRE 432 256 160 256
WIRE 160 352 160 256
WIRE 480 384 480 272
WIRE 480 384 416 384
WIRE 480 416 480 384
WIRE 592 416 592 224
WIRE 592 416 480 416
WIRE 752 416 752 288
WIRE 752 416 592 416
WIRE 416 432 416 384
WIRE 416 432 160 432
SYMBOL voltage 752 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.8
SYMBOL voltage 160 336 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0.9 50m 1k)
SYMATTR Value2 AC 50m
SYMBOL res 464 32 R0
SYMATTR InstName R1
SYMATTR Value {R}
SYMBOL nmos4 432 176 R0
SYMATTR InstName M1
SYMATTR Value CMOSN
SYMATTR Value2 l={l} w={w}
FLAG 480 416 0
TEXT -64 64 Left 2 !.lib tsmc018.lib
TEXT 192 160 Left 2 ;.op
TEXT 200 184 Left 2 ;.tran 5m
TEXT 192 208 Left 2 ;.ac dec 20 0.1 1T
TEXT 200 136 Left 2 !.dc V2 0 1.8 0.1 V1 0 0.9 0.05
TEXT -72 104 Left 2 !.step param R 10 1k 50
TEXT -184 128 Left 2 !.step param w 0.5u 1.5u 0.5u
TEXT -160 160 Left 2 !.step param l 50n 180n 25n
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3070.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3070.asy)
C3 OUT 0 20
V1 N001 0 3
C1 0 N006 .01
R2 N001 N002 50K
XU1 0 N001 0 0 N001 N006 N004 N003 IN OUT OUT N001 N005 N002 LT3070 ;pnba GND)VO0)VO1)VO2)Bias)Ref/BYP)MargTol)MargSel)IN)Sense)OUT)EN)VIOC)PWRGD
R1 OUT 0 .18
C2 0 N005 .01
V2 IN 0 1.2
.tran 2m startup
.lib LT3070.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 432 -48 96 -48
WIRE 576 -48 432 -48
WIRE 432 -32 432 -48
WIRE 576 -32 576 -48
WIRE 256 0 -112 0
WIRE -112 16 -112 0
WIRE 256 16 256 0
WIRE 96 64 96 -48
WIRE 112 64 96 64
WIRE 432 64 432 48
WIRE 432 64 400 64
WIRE 576 64 576 48
WIRE -112 112 -112 96
WIRE 96 128 96 64
WIRE 112 128 96 128
WIRE 560 128 400 128
WIRE 560 144 560 128
WIRE 96 192 96 128
WIRE 112 192 96 192
WIRE 464 192 560 128
WIRE 464 192 400 192
WIRE 464 208 464 192
WIRE 560 240 560 224
WIRE 112 256 96 256
WIRE 416 256 400 256
WIRE 464 288 464 272
WIRE 112 320 96 320
WIRE 416 320 400 320
WIRE 32 384 16 384
WIRE 112 384 96 384
WIRE 416 384 400 384
WIRE 496 384 480 384
WIRE 256 432 256 416
SYMBOL res 416 -48 R0
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL cap 32 400 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value .01
SYMBOL cap 448 208 R0
WINDOW 3 26 56 Left 2
SYMATTR Value 20
SYMATTR InstName C3
SYMBOL cap 480 368 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .01
SYMBOL voltage 576 -48 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL PowerProducts\\LT3070 256 224 R0
SYMATTR InstName U1
SYMBOL res 544 128 R0
SYMATTR InstName R1
SYMATTR Value .18
SYMBOL voltage -112 0 R0
SYMATTR InstName V2
SYMATTR Value 1.2
FLAG 496 384 0
FLAG 256 432 0
FLAG 96 320 0
FLAG 96 256 0
FLAG -112 112 0
FLAG 576 64 0
FLAG 16 384 0
FLAG 464 288 0
FLAG 560 240 0
FLAG -112 0 IN
FLAG 560 128 OUT
TEXT 512 336 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1fdc55414e1e_EDM_Powersupply_V4_freq.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N004 0 PULSE(0 5 0 20000n 20000n 2u 20u)
R4 N002 N003 10
V4 N002 0 10
L1 N003 N001 6.4 IC=0A
XM1 N001 N004 0 IPW65R070C6_L0 ;pnba D)G)S
.include C:\Users\joey2\Documents\3e jaar\BAP\Github\EDM_Powersupply\Library\IPW65R037C6_mosfet\SimulationModel_CoolMOS_C6_MOSFET_650V_Spice.lib
.tran 0 30u 0 1u
* High-side switching
* Dumped some components here: easy for copying
.model BZX84C6V2L D(Is=1.5n Rs=.5 Cjo=185p nbv=3 bv=6.2 Ibv=1m Vpk=6.2 mfg=OnSemi type=Zener)
.model MyIdealDiode D(Ron=0 Roff=1Meg Vfwd=0.7)
* V4a: Gate driver included
.MODEL 1N4007 D ( IS=76.9p RS=42.0m BV=1.00k IBV=5.00u
+ CJO=26.5p M=0.333 N=1.45 TT=4.32u )
.MODEL Dmbr745 d
+IS=1.18724e-05 RS=0.0227191 N=1.22913 EG=0.645632
+XTI=0.5 BV=45 IBV=0.0001 CJO=1e-11
+VJ=0.7 M=0.5 FC=0.5 TT=0
+KF=0 AF=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1876 680
WIRE 752 -112 656 -112
WIRE 928 -112 816 -112
WIRE 656 -32 656 -112
WIRE 656 -32 624 -32
WIRE 800 -32 736 -32
WIRE 928 -32 928 -112
WIRE 928 -32 880 -32
WIRE 976 -32 928 -32
WIRE 624 48 624 -32
WIRE 624 64 624 48
WIRE 976 64 976 -32
WIRE 544 80 480 80
WIRE 544 128 544 80
WIRE 576 128 544 128
WIRE 480 144 480 80
WIRE 480 240 480 224
WIRE 624 240 624 144
WIRE 624 240 480 240
WIRE 624 256 624 240
WIRE 976 256 976 144
WIRE 976 256 624 256
WIRE 480 272 480 240
WIRE 976 272 976 256
FLAG 480 272 0
FLAG 976 272 0
SYMBOL voltage 480 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -51 153 VLeft 2
SYMATTR Value PULSE(0 5 0 20000n 20000n 2u 20u)
SYMATTR InstName V1
SYMBOL res 896 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10
SYMBOL voltage 976 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 10
SYMBOL ind 752 -48 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value 6.4u
SYMATTR SpiceLine IC=0A
SYMBOL nmos 576 48 R0
SYMATTR InstName M1
SYMATTR Value IPW65R070C6_L0
SYMATTR Prefix X
TEXT -720 520 Left 2 !.include C:\\Users\\joey2\\Documents\\3e jaar\\BAP\\Github\\EDM_Powersupply\\Library\\IPW65R037C6_mosfet\\SimulationModel_CoolMOS_C6_MOSFET_650V_Spice.lib
TEXT -720 480 Left 2 !.tran 0 30u 0 1u
TEXT 752 -224 Left 2 ;High-side switching
TEXT 1200 -72 Left 2 ;Dumped some components here: easy for copying
TEXT 1032 -160 Left 2 !.model BZX84C6V2L D(Is=1.5n Rs=.5 Cjo=185p nbv=3 bv=6.2 Ibv=1m Vpk=6.2 mfg=OnSemi type=Zener)
TEXT 1040 -128 Left 2 !.model MyIdealDiode D(Ron=0 Roff=1Meg Vfwd=0.7)
TEXT 400 -288 Left 2 ;V4a: Gate driver included
TEXT 1040 -104 Left 2 !.MODEL 1N4007 D  ( IS=76.9p RS=42.0m BV=1.00k IBV=5.00u\n+ CJO=26.5p  M=0.333 N=1.45 TT=4.32u )
TEXT 1040 -48 Left 2 !.MODEL Dmbr745 d\n+IS=1.18724e-05 RS=0.0227191 N=1.22913 EG=0.645632\n+XTI=0.5 BV=45 IBV=0.0001 CJO=1e-11\n+VJ=0.7 M=0.5 FC=0.5 TT=0\n+KF=0 AF=1
RECTANGLE Normal 560 -256 368 -320 2
* Z:\tmp\asc_dec_bjh7r6w2\09cd3158f73b_algunos_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
C3 N006 N005 {1/3}
R1 N003 N008 {2/35}
R4 N013 N012 {3/2}
C6 N013 N012 {2/3}
L1 N005 N009 {1/2}
C10 N001 0 {9/5}
R11 N011 N015 5
C11 N002 N001 {9/25}
L2 N006 N007 1
V1 N004 N007 AC 1 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2516 836
WIRE 2208 -32 2176 -32
WIRE 2352 -32 2288 -32
WIRE 2096 32 1936 32
WIRE 2176 32 2176 -32
WIRE 2176 32 2096 32
WIRE 2352 32 2352 -32
WIRE 2432 32 2352 32
WIRE 1152 64 1088 64
WIRE 1936 80 1936 32
WIRE 2176 80 2176 32
WIRE 2224 80 2176 80
WIRE 2352 80 2352 32
WIRE 2352 80 2288 80
WIRE 2096 96 2096 32
WIRE 2432 96 2432 32
WIRE -48 112 -96 112
WIRE 64 112 16 112
WIRE 128 112 64 112
WIRE 224 112 192 112
WIRE 368 112 304 112
WIRE 880 112 736 112
WIRE 1024 112 960 112
WIRE 1088 112 1088 64
WIRE 1088 112 1024 112
WIRE 64 128 64 112
WIRE 1088 144 1088 112
WIRE 1152 144 1088 144
WIRE -96 160 -96 112
WIRE 1024 160 1024 112
WIRE 64 224 64 208
WIRE 1936 224 1936 160
WIRE 2096 224 2096 160
WIRE 2096 224 1936 224
WIRE 2432 224 2432 160
WIRE 2432 224 2096 224
WIRE 2096 240 2096 224
WIRE 1024 304 1024 224
WIRE -96 320 -96 240
WIRE 64 320 64 288
WIRE 64 320 -96 320
WIRE 176 320 64 320
WIRE 368 320 368 112
WIRE 368 320 176 320
WIRE 176 336 176 320
WIRE 1520 480 1472 480
WIRE 336 496 272 496
WIRE 480 496 416 496
WIRE 272 544 272 496
WIRE 272 544 160 544
WIRE 480 544 480 496
WIRE 512 544 480 544
WIRE 672 544 592 544
WIRE 1376 544 1248 544
WIRE 1472 544 1472 480
WIRE 1472 544 1376 544
WIRE 272 576 272 544
WIRE 336 576 272 576
WIRE 480 576 480 544
WIRE 480 576 400 576
WIRE 1376 608 1376 544
WIRE 1472 608 1472 544
WIRE 1520 608 1472 608
WIRE 1248 624 1248 544
WIRE 1248 768 1248 704
WIRE 1376 768 1376 688
WIRE 1376 768 1248 768
WIRE 1664 768 1376 768
SYMBOL cap 192 96 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value {1/3}
SYMBOL res 976 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {2/35}
SYMBOL res 432 480 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value {3/2}
SYMBOL cap 400 560 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C6
SYMATTR Value {2/3}
SYMBOL ind 48 112 R0
SYMATTR InstName L1
SYMATTR Value {1/2}
SYMBOL cap 2080 96 R0
SYMATTR InstName C10
SYMATTR Value {9/5}
SYMBOL res 1360 592 R0
SYMATTR InstName R11
SYMATTR Value 5
SYMBOL cap 2288 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C11
SYMATTR Value {9/25}
SYMBOL ind 208 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 1
SYMBOL voltage -96 144 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1 0
FLAG 2096 240 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8002.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8002.asy)
V1 IN 0 12
Rload OUT 0 10
C2 OUT 0 22
R2 N001 0 24.3K
R1 N002 0 41.2K
C1 N003 0 1n
XU1 NC_01 IN N002 IN N003 0 NC_02 OUT N001 0 LTM8002 ;pnba BIAS)RUN)RT)VIN)TR/SS)SYNC)PG)VOUT)FB)GND
.tran 1.2m startup
.lib LTM8002.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -16 -16 -48 -16
WIRE 64 -16 -16 -16
WIRE 240 -16 64 -16
WIRE 240 0 240 -16
WIRE -48 16 -48 -16
WIRE 64 64 64 -16
WIRE 96 64 64 64
WIRE 560 64 384 64
WIRE 608 64 560 64
WIRE 656 64 608 64
WIRE 560 80 560 64
WIRE 656 80 656 64
WIRE -48 112 -48 96
WIRE 96 160 64 160
WIRE 448 160 384 160
WIRE 448 176 448 160
WIRE 560 176 560 144
WIRE 656 176 656 160
WIRE 448 272 448 256
WIRE 0 352 -16 352
WIRE 96 352 80 352
WIRE 416 352 384 352
WIRE 496 352 480 352
WIRE 240 448 240 416
SYMBOL LTM8002 240 208 R0
SYMATTR InstName U1
SYMBOL res 432 160 R0
SYMATTR InstName R2
SYMATTR Value 24.3K
SYMBOL cap 416 336 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 96 336 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 41.2K
SYMBOL cap 544 80 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMBOL voltage -48 0 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 640 64 R0
SYMATTR InstName Rload
SYMATTR Value 10
FLAG -48 112 0
FLAG 240 448 0
FLAG -16 352 0
FLAG 64 160 0
FLAG 448 272 0
FLAG 496 352 0
FLAG 560 176 0
FLAG 656 176 0
FLAG 608 64 OUT
FLAG -16 -16 IN
TEXT 456 432 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3401.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3401.asy)
L1 IN N001 4.7 Rpar=5K
R1 N006 0 15K
Rload OUT 0 20
R4 N005 0 549K
R5 IN N002 5K
V1 IN 0 1.2
C2 N004 0 20p
C1 N003 0 470p
R3 OUT N005 909K
XU1 N006 0 IN N001 0 N002 OUT N005 N004 IN LTC3401 ;pnba Rt)MODE)Vin)SW)GND)Pgood)Vout)FB)Vc)_SHDN
C3 OUT 0 22 Rser=.1
R2 N004 N003 40.2K
.tran 750u startup
.lib LTC3401.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2592 2488
WIRE 1600 1920 1472 1920
WIRE 1680 1920 1600 1920
WIRE 1808 1920 1680 1920
WIRE 1856 1920 1808 1920
WIRE 1968 1920 1936 1920
WIRE 1472 1936 1472 1920
WIRE 1808 1968 1808 1920
WIRE 1968 1968 1968 1920
WIRE 1600 1984 1600 1920
WIRE 1472 2032 1472 2016
WIRE 1680 2048 1680 1920
WIRE 1712 2048 1680 2048
WIRE 2208 2048 2064 2048
WIRE 2320 2048 2208 2048
WIRE 2432 2048 2320 2048
WIRE 2208 2064 2208 2048
WIRE 2320 2064 2320 2048
WIRE 2432 2064 2432 2048
WIRE 1600 2112 1600 2064
WIRE 1712 2112 1600 2112
WIRE 2320 2160 2320 2128
WIRE 2432 2160 2432 2144
WIRE 1504 2176 1456 2176
WIRE 1600 2176 1584 2176
WIRE 1712 2176 1600 2176
WIRE 2208 2176 2208 2144
WIRE 2208 2176 2064 2176
WIRE 1456 2192 1456 2176
WIRE 2208 2192 2208 2176
WIRE 1600 2208 1600 2176
WIRE 1712 2240 1680 2240
WIRE 2096 2240 2064 2240
WIRE 2096 2256 2096 2240
WIRE 1456 2288 1456 2256
WIRE 1600 2288 1600 2272
WIRE 2208 2288 2208 2272
WIRE 1888 2336 1888 2320
WIRE 2096 2352 2096 2336
SYMBOL res 2192 2176 R0
SYMATTR InstName R4
SYMATTR Value 549K
SYMBOL res 2192 2048 R0
SYMATTR InstName R3
SYMATTR Value 909K
SYMBOL cap 1440 2192 R0
SYMATTR InstName C1
SYMATTR Value 470p
SYMBOL res 1600 2160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 40.2K
SYMBOL ind 1840 1936 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 4.7
SYMATTR SpiceLine Rpar=5K
SYMBOL res 2416 2048 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL res 1584 1968 R0
SYMATTR InstName R5
SYMATTR Value 5K
SYMBOL polcap 2304 2064 R0
SYMATTR InstName C3
SYMATTR Value 22
SYMATTR SpiceLine Rser=.1
SYMBOL VOLTAGE 1472 1920 R0
SYMATTR InstName V1
SYMATTR Value 1.2
SYMBOL RES 2080 2240 R0
SYMATTR InstName R1
SYMATTR Value 15K
SYMBOL cap 1584 2208 R0
SYMATTR InstName C2
SYMATTR Value 20p
SYMBOL POWERPRODUCTS\\LTC3401 1888 2144 R0
SYMATTR InstName U1
FLAG 2096 2352 0
FLAG 1888 2336 0
FLAG 1456 2288 0
FLAG 1600 2288 0
FLAG 2208 2288 0
FLAG 1472 2032 0
FLAG 2320 2160 0
FLAG 2432 2160 0
FLAG 2432 2048 OUT
FLAG 1680 2240 0
FLAG 1472 1920 IN
TEXT 2224 2360 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ab129dd0456a_3S_Output_Control_Driver.asc
* Generated by LTspice 26.0.1 for Windows.
* Control(Out)
* Control(In)
* 3S Ouput Control Driver
* PNP Transistor - 557B
* - 2 power input
* - 1 control input
* - 1 control output
V1 N001 N005 V
V2 N005 N006 V
V3 N006 0 V
R1 N004 N003 1k
Q2 N002 N004 N001 0 PNP
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 820
WIRE 800 -96 176 -96
WIRE 640 -32 544 -32
WIRE 176 32 176 -96
WIRE 640 32 640 -32
WIRE 448 80 384 80
WIRE 576 80 528 80
WIRE 640 176 640 128
WIRE 800 176 800 -96
WIRE 800 176 640 176
WIRE 176 288 176 112
WIRE 176 576 176 368
WIRE 176 800 176 656
SYMBOL pnp 576 32 R0
SYMATTR InstName Q2
SYMBOL voltage 176 560 R0
SYMATTR InstName V3
SYMBOL voltage 176 16 R0
SYMATTR InstName V1
SYMBOL voltage 176 272 R0
SYMATTR InstName V2
SYMBOL res 544 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 176 800 0
TEXT 536 -48 Left 2 ;Control(Out)
TEXT 304 48 Left 2 ;Control(In)
TEXT -512 32 Left 4 ;3S Ouput Control Driver
TEXT -344 312 Left 2 ;PNP Transistor - 557B
TEXT -360 424 Left 2 ;- 2 power input
TEXT -360 472 Left 2 ;- 1 control input
TEXT -360 520 Left 2 ;- 1 control output
* Z:\home\khalils\Downloads\files\data\raw_asc\109a2fdebf41_trans-1-2.asc
* Generated by LTspice 26.0.1 for Windows.
Vds N001 0 -10V
Vgs N002 0
M1 N001 N002 0 0 IRF9640
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc Vgs -2 -5V
.step temp list -55 25 175
.meas dc Uth find Vgs when Id(M1)=-250uA
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1292 680
WIRE -560 -176 -720 -176
WIRE -720 -128 -720 -176
WIRE -560 -80 -560 -176
WIRE -768 -48 -896 -48
WIRE -896 -32 -896 -48
WIRE -896 64 -896 48
WIRE -720 64 -720 -32
WIRE -560 64 -560 0
FLAG -560 64 0
FLAG -896 64 0
FLAG -720 64 0
SYMBOL voltage -560 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 37 60 Left 2
WINDOW 0 36 55 Left 2
WINDOW 3 36 82 Left 2
SYMATTR InstName Vds
SYMATTR Value -10V
SYMBOL voltage -896 -48 R0
WINDOW 123 0 0 Left 2
WINDOW 39 40 53 Left 2
WINDOW 3 -97 181 Left 2
WINDOW 0 35 44 Left 2
SYMATTR Value ""
SYMATTR InstName Vgs
SYMBOL pmos -768 -128 R0
SYMATTR InstName M1
SYMATTR Value IRF9640
TEXT -904 96 Left 2 !.dc Vgs -2 -5V
TEXT -664 96 Left 2 !.step temp list -55 25 175
TEXT -904 112 Left 2 !.meas dc Uth find Vgs when Id(M1)=-250uA