Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\302433c4271e_Something-With-Transistors.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6090.asy)
Q1 Vcc+ fb out 0 NPN
V7 Vcc- 0 -70V
R1 out fb 1k
XU1 NC_01 fb in NC_02 NC_03 fb NC_04 NC_05 LTC6090 ;pnba COM)IN-)IN+)V-)_TF)OUT)V+)_OD
Q2 Vcc- fb out 0 PNP
C1 out 0 3e-10
V5 in 0 SINE(0 6V 40k)
V6 Vcc+ 0 70V
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 1s
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1264 680
WIRE 576 64 576 32
WIRE 576 80 576 64
WIRE 512 128 416 128
WIRE 240 144 240 128
WIRE 240 176 240 144
WIRE 1056 208 1056 192
WIRE 1184 208 1184 192
WIRE 144 224 96 224
WIRE 224 224 144 224
WIRE 1056 224 1056 208
WIRE 1184 224 1184 208
WIRE 416 256 416 128
WIRE 416 256 384 256
WIRE 464 256 416 256
WIRE 576 256 576 176
WIRE 576 256 544 256
WIRE 688 256 576 256
WIRE 736 256 688 256
WIRE 752 256 736 256
WIRE 176 288 96 288
WIRE 224 288 176 288
WIRE 576 336 576 256
WIRE 688 336 688 256
WIRE 1056 336 1056 304
WIRE 1184 336 1184 304
WIRE 240 368 240 336
WIRE 96 384 96 288
WIRE 240 384 240 368
WIRE 416 384 416 256
WIRE 432 384 416 384
WIRE 512 384 432 384
WIRE 688 464 688 400
WIRE 576 480 576 432
WIRE 576 496 576 480
WIRE 96 512 96 464
SYMBOL voltage 1184 208 R0
SYMATTR InstName V7
SYMATTR Value -70V
SYMBOL Misc/signal 96 368 R0
SYMATTR InstName V5
SYMATTR Value SINE(0 6V 40k)
SYMBOL pnp 512 432 M180
SYMATTR InstName Q2
SYMBOL voltage 1056 208 R0
SYMATTR InstName V6
SYMATTR Value 70V
SYMBOL cap 672 336 R0
SYMATTR InstName C1
SYMATTR Value 3e-10
SYMBOL res 560 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL npn 512 80 R0
SYMATTR InstName Q1
SYMBOL Opamps/LTC6090 288 256 R0
SYMATTR InstName U1
FLAG 176 288 in
FLAG 96 512 0
FLAG 736 256 out
FLAG 432 384 fb
FLAG 1056 336 0
FLAG 1056 208 Vcc+
FLAG 1184 336 0
FLAG 1184 208 Vcc-
FLAG 576 64 Vcc+
FLAG 576 480 Vcc-
FLAG 240 144 Vcc+
FLAG 240 368 Vcc-
FLAG 688 464 0
FLAG 144 224 fb
TEXT 248 592 Left 2 !.tran 0 1s
* Z:\home\khalils\Downloads\files\data\raw_asc\5ced8232c42f_bjt_npn.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N001 N003 0 0 BC847B
VBE N004 0 5
VCE N002 0 5
RC N002 N001 1k
RB N003 N004 1k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc VBE 0 5 0.01 VCE 0 5 0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 256 112 224 112
WIRE 368 112 336 112
WIRE 160 160 144 160
WIRE 64 224 64 160
WIRE 224 240 224 208
WIRE 368 240 368 192
WIRE 64 336 64 304
FLAG 224 240 0
FLAG 368 240 0
FLAG 64 336 0
SYMBOL npn 160 112 R0
SYMATTR InstName Q1
SYMATTR Value BC847B
SYMBOL voltage 64 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VBE
SYMATTR Value 5
SYMBOL voltage 368 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VCE
SYMATTR Value 5
SYMBOL res 352 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RC
SYMATTR Value 1k
SYMBOL res 160 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RB
SYMATTR Value 1k
TEXT 264 312 Left 2 !.dc VBE 0 5 0.01 VCE 0 5 0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7105-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7105-1.8.asy)
C2 N002 0 2.7n
XU2 IN OUT IN N002 OUT 0 N001 ADP7105 Vref=1.8 ;pnba Vin)Sense)EN)SS)Vout)GND)PG
C1 OUT 0 2.2 Rser=1.5m
R1 OUT N001 100k
Rload OUT 0 10
V1 IN 0 3.3
.tran 6m startup
.lib ADP7105.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 368 32 352 32
WIRE 464 32 448 32
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE 384 128 352 128
WIRE 464 128 464 32
WIRE 464 128 384 128
WIRE 560 128 464 128
WIRE -32 144 -32 128
WIRE 464 144 464 128
WIRE 560 144 560 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 128
WIRE 384 224 352 224
WIRE 464 240 464 208
WIRE 560 240 560 224
WIRE 224 304 224 288
SYMBOL ADP7105-1.8 224 128 R0
SYMATTR InstName U2
SYMBOL res 544 128 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 464 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100k
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 2.7n
SYMBOL cap 448 144 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=1.5m
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 560 240 0
FLAG 464 240 0
FLAG -32 32 IN
FLAG 560 128 OUT
TEXT 432 288 Left 2 !.tran 6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\d101f020a408_AdcDivider1.asc
* Generated by LTspice 26.0.1 for Windows.
R3 VADC 0 5K1
D2 VADC N001 RB541VM-40
R2 Vbatt VADC 20K
V2 N001 0 3.3 Rser=1
C1 VADC 0 1nF
V1 Vbatt 0 PULSE(0 20 0 100ms 0 0 1)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 32 0 32
WIRE 400 32 208 32
WIRE 0 64 0 32
WIRE 208 112 208 32
WIRE 400 144 336 144
WIRE 592 144 464 144
WIRE 592 176 592 144
WIRE 0 192 0 144
WIRE 208 240 208 192
WIRE 336 240 336 144
WIRE 336 240 208 240
WIRE 416 240 336 240
WIRE 592 272 592 256
WIRE 208 304 208 240
WIRE 336 304 336 240
WIRE 208 416 208 384
WIRE 336 416 336 368
SYMBOL voltage 592 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName V2
SYMATTR Value 3.3
SYMATTR SpiceLine Rser=1
SYMBOL res 192 96 R0
SYMATTR InstName R2
SYMATTR Value 20K
SYMBOL res 192 288 R0
SYMATTR InstName R3
SYMATTR Value 5K1
SYMBOL cap 320 304 R0
SYMATTR InstName C1
SYMATTR Value 1nF
SYMBOL voltage 0 48 R0
WINDOW 3 -314 112 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 20 0 100ms 0 0 1)
SYMBOL schottky 400 160 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value RB541VM-40
SYMATTR Description Diode
SYMATTR Type diode
FLAG 208 416 0
FLAG 0 192 0
FLAG 336 416 0
FLAG 416 240 VADC
FLAG 400 32 Vbatt
FLAG 592 272 0
TEXT -82 440 Left 2 !.tran 0.1
* Z:\tmp\asc_dec_bjh7r6w2\0c1b933726ef_ltspicesym_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N003 N004 N005 0 2N3906
R1 N004 0 1k
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1300 680
WIRE 960 -512 960 -560
WIRE 1136 -512 1136 -560
WIRE 1136 -352 1136 -432
WIRE 960 -304 960 -432
WIRE 960 -304 704 -304
WIRE 1072 -304 960 -304
WIRE 960 -240 960 -304
WIRE 1136 -192 1136 -256
WIRE 960 -112 960 -160
WIRE 1136 -112 960 -112
WIRE 1136 -96 1136 -112
SYMBOL pnp 1072 -352 R0
SYMATTR InstName Q1
SYMATTR Value 2N3906
SYMBOL res 944 -256 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 1136 -96 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG811.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 1 input.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG811.asy)
XU1 +V N003 NC_01 NC_02 NC_03 N001 N002 NC_04 NC_05 NC_06 NC_07 NC_08 NC_09 0 ADG811 ;pnba VDD)IN1)IN2)IN3)IN4)S1)D1)S2)D2)S3)D3)S4)D4)GND
V2 N003 0 PULSE(0 2.4 0 10n 10n 980n 2u)
V1 +V 0 3.3
R1 N002 0 47
C1 N002 0 33p
VS N001 0 3
.tran 10u
.lib ADG811.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2844 1336
WIRE -144 -80 -144 -112
WIRE -432 -16 -464 -16
WIRE -256 -16 -352 -16
WIRE 0 -16 -32 -16
WIRE 112 -16 0 -16
WIRE 0 16 0 -16
WIRE 112 32 112 -16
WIRE -256 48 -432 48
WIRE -592 112 -592 64
WIRE -432 112 -432 48
WIRE 0 112 0 96
WIRE 112 112 112 96
WIRE -592 272 -592 192
WIRE -432 272 -432 192
WIRE -144 576 -144 560
SYMBOL ADG811 -144 32 R0
SYMATTR InstName U1
SYMBOL voltage -592 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL cap 96 32 R0
SYMATTR InstName C1
SYMATTR Value 33p
SYMBOL res -16 0 R0
SYMATTR InstName R1
SYMATTR Value 47
SYMBOL voltage -336 -16 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VS
SYMATTR Value 3
SYMBOL voltage -432 96 R0
WINDOW 3 -261 238 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 2.4 0 10n 10n 980n 2u)
SYMATTR InstName V2
FLAG -592 272 0
FLAG -592 64 +V
FLAG -464 -16 0
FLAG -144 -112 +V
FLAG -144 576 0
FLAG -432 272 0
FLAG 0 112 0
FLAG 112 112 0
TEXT 104 568 Left 2 !.tran 10u
TEXT -712 -200 Left 2 ;Note:\nSwitch shown for a logic 1 input.
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2120-ADJ.asc
* Generated by LTspice 26.0.1 for Windows.
R1 OUT N003 13.5K
L1 N002 OUT 2.2
C1 OUT 0 20
R2 N003 0 3K
R3 OUT N001 100K
V1 IN 0 5
Rload OUT 0 1.65
XU1 IN IN N002 0 0 N003 IN N001 IN IN ADP2120-ADJ ;pnba Vin)Pvin)SW)PGND)GND)FB)TRK)Pgood)Sync/Mode)EN
.tran 1m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2120-ADJ.asy)
.lib ADP2120-ADJ.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 0 48 0
WIRE 288 0 128 0
WIRE 48 16 48 0
WIRE 288 16 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 640 64 576 64
WIRE 48 112 48 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 640 144 640 64
WIRE 640 144 560 144
WIRE 768 144 640 144
WIRE 560 160 560 144
WIRE 768 160 768 144
WIRE 640 176 640 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 560 256 560 224
WIRE 768 256 768 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 640 304 640 256
WIRE 640 304 416 304
WIRE 640 320 640 304
WIRE 288 368 288 352
WIRE 640 416 640 400
FLAG 640 416 0
FLAG 560 256 0
FLAG 288 368 0
FLAG 48 112 0
FLAG 768 144 OUT
FLAG 768 256 0
FLAG 48 0 IN
SYMBOL res 624 160 R0
SYMATTR Value 13.5K
SYMATTR InstName R1
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 20
SYMBOL res 624 304 R0
SYMATTR Value 3K
SYMATTR InstName R2
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL voltage 48 0 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 752 144 R0
SYMATTR Value 1.65
SYMATTR InstName Rload
SYMBOL ADP2120-ADJ 288 272 R0
SYMATTR InstName U1
TEXT 440 384 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6005.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6005.asy)
XU1 IN OUT +V -V OUT LT6003 ;pnba IN+)IN-)VCC)VEE)OUT
V2 -V 0 -2
V1 +V 0 2
V3 IN 0 PULSE(-1 1 0 1u 1u 100m 200m)
.tran 1
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 756
WIRE 288 304 128 304
WIRE -256 368 -256 352
WIRE -160 368 -160 352
WIRE 192 368 192 352
WIRE 128 384 128 304
WIRE 160 384 128 384
WIRE 288 400 288 304
WIRE 288 400 224 400
WIRE 336 400 288 400
WIRE 160 416 -16 416
WIRE -16 432 -16 416
WIRE 192 448 192 432
WIRE -256 464 -256 448
WIRE -160 464 -160 448
WIRE -16 528 -16 512
SYMBOL voltage -16 416 R0
SYMATTR InstName V3
SYMATTR Value PULSE(-1 1 0 1u 1u 100m 200m)
SYMBOL voltage -256 352 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL LT6005 192 400 R0
SYMATTR InstName U1
SYMBOL voltage -160 352 R0
SYMATTR InstName V2
SYMATTR Value -2
FLAG -256 464 0
FLAG -160 464 0
FLAG -16 528 0
FLAG -16 416 IN
FLAG 336 400 OUT
FLAG 192 352 +V
FLAG -256 352 +V
FLAG -160 352 -V
FLAG 192 448 -V
TEXT 408 472 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1422.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1422.asy)
V4 N003 0 pulse(0 3.3 0 1u 1u 5m 10m)
V2 -V 0 -15
V1 +V 0 15
XU1 N003 N002 N001 -V 0 +V ADG1422 ;pnba IN)D)S)Vss)GND)Vdd
V3 N001 0 10
C1 N002 0 35p
R1 N002 0 300
.tran 30m
.lib ADG1422.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -112 -112 -112 -128
WIRE -464 -48 -464 -64
WIRE -336 -48 -368 -48
WIRE -208 -48 -256 -48
WIRE 48 -48 -16 -48
WIRE 144 -48 48 -48
WIRE 48 -16 48 -48
WIRE 144 0 144 -48
WIRE -208 16 -336 16
WIRE -464 48 -464 32
WIRE 48 80 48 64
WIRE 144 80 144 64
WIRE -336 96 -336 16
WIRE -464 144 -464 128
WIRE -160 144 -160 128
WIRE -64 144 -64 128
WIRE -464 240 -464 224
WIRE -336 240 -336 176
SYMBOL res 32 -32 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL cap 128 0 R0
SYMATTR InstName C1
SYMATTR Value 35p
SYMBOL voltage -336 80 R0
WINDOW 3 19 116 Left 2
SYMATTR Value pulse(0 3.3 0 1u 1u 5m 10m)
SYMATTR InstName V4
SYMBOL voltage -464 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -464 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -240 -48 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL ADG1422 -112 0 R0
SYMATTR InstName U1
FLAG -464 240 0
FLAG -464 48 0
FLAG -464 -64 +V
FLAG -464 128 -V
FLAG -368 -48 0
FLAG -160 144 -V
FLAG -112 -128 +V
FLAG -64 144 0
FLAG -336 240 0
FLAG 48 80 0
FLAG 144 80 0
TEXT 48 232 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3531.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3531.asy)
XU1 N001 IN 0 IN N003 OUT N002 0 LTC3531 ;pnba SW1)Vin)GND)_SHDN)FB)OUT)SW2)PGND
R2 N003 0 200K
L1 N001 N002 10
R1 OUT N003 340K
Rload OUT 0 40
V1 IN 0 2
C1 OUT 0 10
.tran 500u startup
.lib LTC3531.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 96 128 96
WIRE 288 96 256 96
WIRE 128 144 128 96
WIRE 288 144 288 96
WIRE 48 224 -32 224
WIRE 64 224 48 224
WIRE 384 224 352 224
WIRE 496 224 384 224
WIRE 608 224 496 224
WIRE -32 240 -32 224
WIRE 384 240 384 224
WIRE 496 240 496 224
WIRE 608 240 608 224
WIRE -32 336 -32 320
WIRE 48 336 48 224
WIRE 64 336 48 336
WIRE 384 336 384 320
WIRE 384 336 352 336
WIRE 496 336 496 304
WIRE 608 336 608 320
WIRE 384 352 384 336
WIRE 128 432 128 416
WIRE 288 432 288 416
SYMBOL ind 160 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 10
SYMBOL res 592 224 R0
SYMATTR InstName Rload
SYMATTR Value 40
SYMBOL res 368 336 R0
SYMATTR InstName R2
SYMATTR Value 200K
SYMBOL cap 480 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage -32 224 R0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL res 368 224 R0
SYMATTR InstName R1
SYMATTR Value 340K
SYMBOL LTC3531 208 272 R0
SYMATTR InstName U1
FLAG -32 336 0
FLAG 288 432 0
FLAG 384 432 0
FLAG 128 432 0
FLAG 496 336 0
FLAG 608 336 0
FLAG -32 224 IN
FLAG 608 224 OUT
TEXT 512 400 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3650-4.1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3650-4.1.asy)
R1 N002 OUT 50m
XU1 IN IN IN NC_01 NC_02 0 NC_03 NC_04 OUT N002 N003 N001 0 LT3650-4.1 ;pnba Vin)CLP)_SHDN)_CHRG)_Fault)Timer)RNG/SS)NTC)BAT)Sense)Boost)SW)GND
L1 N001 N002 6.8
V1 IN 0 12
C1 OUT 0 .2m
C2 N001 N003 1
D1 OUT N003 1N5817
D2 0 N001 MBRS340
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m startup
.lib LT3650-4.1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 400 -160 400 -176
WIRE 64 -64 -32 -64
WIRE 80 -64 64 -64
WIRE 400 -64 400 -96
WIRE 400 -64 368 -64
WIRE 432 -64 400 -64
WIRE 544 -64 512 -64
WIRE 560 -64 544 -64
WIRE 656 -64 640 -64
WIRE 720 -64 656 -64
WIRE -32 -48 -32 -64
WIRE 400 -48 400 -64
WIRE 720 -48 720 -64
WIRE 64 32 64 -64
WIRE 80 32 64 32
WIRE 400 32 400 16
WIRE 400 32 368 32
WIRE 448 32 400 32
WIRE 656 32 656 -64
WIRE 656 32 512 32
WIRE 720 32 720 16
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 80 128 64 128
WIRE 544 128 544 -64
WIRE 544 128 368 128
WIRE 656 224 656 32
WIRE 656 224 368 224
WIRE 80 416 64 416
WIRE 224 480 224 464
SYMBOL schottky 512 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 384 -48 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL res 544 -48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 50m
SYMBOL schottky 384 -160 R0
WINDOW 3 38 47 Left 2
SYMATTR Value MBRS340
SYMATTR InstName D2
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL voltage -32 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 704 -48 R0
SYMATTR InstName C1
SYMATTR Value .2m
SYMBOL PowerProducts\\LT3650-4.1 224 176 R0
SYMATTR InstName U1
SYMBOL ind 416 -48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
FLAG 224 480 0
FLAG 64 416 0
FLAG -32 48 0
FLAG 720 32 0
FLAG -32 -64 IN
FLAG 720 -64 OUT
FLAG 400 -176 0
TEXT 552 296 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX333A.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:\n\nCrosstalk = -65 dB Only
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\MAX333A.asy)
V3 vNC1 0 0
C1 vCOM1 0 36p
V4 vIN1 0 PULSE(0 3.3 0 1n 1n 100u 200u)
R1 vCOM1 0 301
XU1 0 N001 vIN1 NC_01 NC_02 NC_03 vCOM1 vNO1 vNC1 NC_04 NC_05 0 NC_06 NC_07 0 NC_08 NC_09 0 N002 MAX333A ;pnba GND)V+)IN1)IN2)IN3)IN4)COM1)NO1)NC1)COM2)NO2)NC2)COM3)NO3)NC3)COM4)NO4)NC4)V-
V2 vNO1 0 3
V1 N001 0 {Vdd}
V5 N002 0 {-Vdd}
.tran 1m
.param Vdd = 15
.lib MAX333A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2244 1360
WIRE 944 -320 896 -320
WIRE 1088 -320 1024 -320
WIRE 1088 -224 1088 -320
WIRE 784 -160 720 -160
WIRE 912 -160 864 -160
WIRE 960 -160 912 -160
WIRE 1264 -128 1216 -128
WIRE 1312 -128 1264 -128
WIRE 1408 -128 1312 -128
WIRE 608 -96 560 -96
WIRE 912 -96 688 -96
WIRE 960 -96 912 -96
WIRE 1312 -48 1312 -128
WIRE 912 -32 768 -32
WIRE 960 -32 912 -32
WIRE 1408 -32 1408 -128
WIRE 768 0 768 -32
WIRE 960 96 880 96
WIRE 768 112 768 80
WIRE 1312 112 1312 32
WIRE 1408 112 1408 32
WIRE 960 288 880 288
WIRE 960 480 880 480
WIRE 1152 752 1152 704
WIRE 1024 848 1024 704
WIRE 1088 848 1024 848
WIRE 1216 848 1168 848
RECTANGLE Normal 768 -432 16 -720 2
SYMBOL voltage 768 -16 R0
WINDOW 0 18 8 Left 2
WINDOW 3 -485 107 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 3.3 0 1n 1n 100u 200u)
SYMBOL voltage 704 -96 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 0
SYMBOL res 1296 -64 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage 1072 848 R270
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value {-Vdd}
SYMBOL MAX333A 1072 -80 R0
SYMATTR InstName U1
SYMBOL cap 1392 -32 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage 880 -160 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL voltage 1040 -320 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value {Vdd}
FLAG 896 -320 0
FLAG 1312 112 0
FLAG 1408 112 0
FLAG 1152 752 0
FLAG 768 112 0
FLAG 720 -160 0
FLAG 560 -96 0
FLAG 880 96 0
FLAG 880 288 0
FLAG 1216 848 0
FLAG 880 480 0
FLAG 912 -160 vNO1
FLAG 912 -96 vNC1
FLAG 912 -32 vIN1
FLAG 1264 -128 vCOM1
TEXT 1328 880 Left 2 !.tran 1m
TEXT 32 -696 Left 2 ;Notes:\n\nCrosstalk = -65 dB Only
TEXT 32 -392 Left 2 !.param Vdd = 15
* Z:\home\khalils\Downloads\files\data\raw_asc\f33f03c8daf1_Draft10.asc
* Generated by LTspice 26.0.1 for Windows.
* waveform/linearity can be severely distorted if R4 and R5 are unmatched.\n but maybe a range issue.\n--\nDoes changing R6 affect CMRR?\n--\nwhat about a two stage level shift. eg. follow by ina154/amp03.\nissue is that it's incredibly sensitive. \n0.2V for 10R. == 20mV / 1R.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP07.asy)
;dc V1 0 10 0.01
R1 N001 N002 200k
V4 N002 0 100
V2 VCC 0 15
R6 P001 0 75R
R5 N001 P001 5k
XU1 N004 N001 VCC VEE VOUT LT1001 ;pnba In+)In-)V+)V-)OUT
VIN N003 N002 SINE(0 1 50)
R3 N004 N003 200k
V3 0 VEE 15
R4 0 N004 5k
R2 VOUT N001 200k
.tran 0.1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1460 680
WIRE 368 -32 320 -32
WIRE -192 80 -272 80
WIRE 288 80 160 80
WIRE 368 80 368 -32
WIRE 384 80 368 80
WIRE -272 96 -272 80
WIRE -192 96 -192 80
WIRE 448 96 448 -32
WIRE 560 96 448 96
WIRE 288 112 -48 112
WIRE 384 112 368 112
WIRE -48 128 -48 112
WIRE 160 208 160 80
WIRE 160 208 -48 208
WIRE 368 224 368 112
SYMBOL res 384 96 R90
WINDOW 0 53 57 VBottom 2
WINDOW 3 51 63 VTop 2
SYMATTR InstName R3
SYMATTR Value 200k
SYMBOL res 464 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 5k
SYMBOL res 464 -48 R90
WINDOW 0 -34 85 VBottom 2
WINDOW 3 -28 79 VTop 2
SYMATTR InstName R2
SYMATTR Value 200k
SYMBOL OpAmps\\OP07 416 32 R0
WINDOW 0 40 50 Left 2
SYMATTR InstName U1
SYMBOL voltage -272 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 36 39 Left 2
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL res 384 64 R90
WINDOW 0 -23 59 VBottom 2
WINDOW 3 -25 66 VTop 2
SYMATTR InstName R1
SYMATTR Value 200k
SYMBOL res 336 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 5k
SYMBOL voltage -48 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 24 44 Left 2
SYMATTR Value SINE(0 1 50)
SYMATTR InstName VIN
SYMBOL voltage -48 192 R0
WINDOW 0 -47 117 Left 2
WINDOW 3 -50 145 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 100
SYMBOL voltage -272 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 46 156 Left 2
SYMATTR Value 15
SYMATTR InstName V2
SYMBOL res 256 -48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 75R
FLAG -192 96 0
FLAG 560 96 VOUT
FLAG -48 288 0
FLAG 448 224 0
FLAG -272 0 VCC
FLAG 416 64 VCC
FLAG -272 176 VEE
FLAG 416 128 VEE
FLAG 160 -32 0
TEXT -48 88 Left 2 !;dc V1 0 10 0.01
TEXT -24 -136 Left 2 !.tran 0.1
TEXT 600 -56 Left 2 ;waveform/linearity can be severely distorted if R4 and R5 are unmatched.\n  but maybe a range issue.\n--\nDoes changing R6 affect CMRR?\n--\nwhat about a two stage level shift.   eg. follow by ina154/amp03.\nissue is that it's incredibly sensitive. \n0.2V for 10R. == 20mV / 1R.