Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\29aa4a5afab5_Q1.asc
* Generated by LTspice 26.0.1 for Windows.
Vdd N002 0 1.8
M2 N001 N002 0 0 nch_tt l=180n w=240n
C1 N001 0 1p IC=1.8
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.tran 30ns
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 688 32 416 32
WIRE 416 112 416 32
WIRE 688 144 688 32
WIRE 368 192 160 192
WIRE 160 240 160 192
WIRE 160 448 160 320
WIRE 416 448 416 208
WIRE 416 448 160 448
WIRE 688 448 688 208
WIRE 688 448 416 448
WIRE 416 480 416 448
SYMBOL voltage 160 224 R0
SYMATTR InstName Vdd
SYMATTR Value 1.8
SYMBOL nmos 368 112 R0
SYMATTR InstName M2
SYMATTR Value nch_tt
SYMATTR Value2 l=180n w=240n
SYMBOL cap 672 144 R0
SYMATTR InstName C1
SYMATTR Value 1p
SYMATTR SpiceLine IC=1.8
FLAG 416 480 0
TEXT -136 176 Left 2 !.include TSMC180.lib
TEXT -82 216 Left 2 !.tran 30ns
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7156-3.0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7156-3.0.asy)
R1 IN N001 100K
Rload OUT 0 3
XU1 OUT MP_01 OUT N002 N001 N003 N003 N004 IN 0 ADP7156_7 Vreg=3.611 Vref=3.016 ;pnba Vout))Vout_Sense)Byp)EN)Ref_Sense)Ref)Vreg)Vin)GND
V1 IN 0 3.8
C4 N002 0 1 Rser=10m Lser=1n
C2 N003 0 1
C3 N004 0 1
C1 OUT 0 10
.tran 5m startup
.lib ADP7156_7.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -160 32
WIRE 80 32 -32 32
WIRE 416 32 400 32
WIRE 464 32 416 32
WIRE 560 32 464 32
WIRE -160 48 -160 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE 416 128 416 32
WIRE 416 128 400 128
WIRE -160 144 -160 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE 0 224 -16 224
WIRE 80 224 64 224
WIRE 416 224 400 224
WIRE 464 224 416 224
WIRE 464 240 464 224
WIRE 0 320 -16 320
WIRE 80 320 64 320
WIRE 416 320 416 224
WIRE 416 320 400 320
WIRE 464 320 464 304
WIRE 240 400 240 384
SYMBOL cap 448 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL ADP7156-3.0 240 176 R0
SYMATTR InstName U1
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMATTR Value2 Rser=10m
SYMATTR SpiceLine Lser=1n
SYMBOL cap 448 240 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 64 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL voltage -160 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.8
SYMBOL res 544 32 R0
SYMATTR InstName Rload
SYMATTR Value 3
FLAG 240 400 0
FLAG 464 320 0
FLAG 464 144 0
FLAG -16 320 0
FLAG -16 224 0
FLAG -160 144 0
FLAG 560 144 0
FLAG -160 32 IN
FLAG 560 32 OUT
TEXT 504 368 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2641-16.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC2641-16.asy)
V5 N001 0 PWL(0 3.3 0.6u 3.3 +2n 0 +0.31u 0 +2n 3.3)
V6 N006 0 PWL(0 3.3 2u 3.3 +2n 0 +30n 0 +2n 3.3)
XU1 N003 N001 N004 N005 N006 OUT N002 0 LTC2641-16 ;pnba REF)_CS)SCLK)DIN)_CLR)Vout)Vdd)GND
V1 N005 0 PULSE(0 3.3 0 0.1n 0.1n 19.8n 40n)
C1 OUT 0 10p
V2 N002 0 5
V3 N003 0 2.5
V4 N004 0 PULSE(0 3.3 0 0.1n 0.1n 9.9n 20n)
.tran 3u
.lib LTC2641-16.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2580 932
WIRE 320 16 320 -16
WIRE 448 16 448 -16
WIRE -32 48 -48 48
WIRE 192 48 48 48
WIRE 320 128 320 96
WIRE 448 128 448 96
WIRE -32 176 -48 176
WIRE 160 176 48 176
WIRE 192 176 192 48
WIRE 240 176 192 176
WIRE 160 240 160 176
WIRE 240 240 160 240
WIRE 576 272 528 272
WIRE 576 288 576 272
WIRE -32 304 -48 304
WIRE 240 304 48 304
WIRE 240 368 176 368
WIRE 576 368 576 352
WIRE 384 416 384 400
WIRE -32 448 -48 448
WIRE 176 448 176 368
WIRE 176 448 48 448
SYMBOL cap 560 288 R0
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL LTC2641-16 384 272 R0
WINDOW 0 0 -48 Center 2
WINDOW 3 0 53 Center 2
SYMATTR InstName U1
SYMBOL voltage 64 304 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -99 VRight 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 0.1n 0.1n 19.8n 40n)
SYMBOL voltage 320 112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL voltage 64 176 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -89 VRight 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 3.3 0 0.1n 0.1n 9.9n 20n)
SYMBOL voltage 64 48 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -122 VRight 2
SYMATTR InstName V5
SYMATTR Value PWL(0 3.3 0.6u 3.3 +2n 0 +0.31u 0 +2n 3.3)
SYMBOL voltage 64 448 R90
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 -49 44 VRight 2
WINDOW 3 46 -99 VRight 2
SYMATTR InstName V6
SYMATTR Value PWL(0 3.3 2u 3.3 +2n 0 +30n 0 +2n 3.3)
SYMBOL voltage 448 112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 2.5
FLAG 384 416 0
FLAG -48 304 0
FLAG 320 -16 0
FLAG 448 -16 0
FLAG -48 176 0
FLAG -48 48 0
FLAG -48 448 0
FLAG 576 272 OUT
FLAG 576 368 0
TEXT 576 440 Left 2 !.tran 3u
* Z:\home\khalils\Downloads\files\data\raw_asc\f5afbffdc573_Crystal_oscillator.asc
* Generated by LTspice 26.0.1 for Windows.
* Inverter
* Crystal
* Startup
* Crystal Oscillator
* Q=sqrt(L/R) / Rser\nfo = 1/(2*pi*sqrt(L*C))
* gain_max=2.5*10=25
R1 N001 N002 100
R4 N002 OUT 100
R2 OUT B 200
C3 A 0 15p
C2 B 0 15p
B1 N001 0 V=2.5-2.5*tanh(10*(V(A)-2.5))
C1 A B 0.1p Rser=50 Lser=10m Cpar=4p
I1 B 0 PULSE(0 10m 0 1n 1n 10n)
R3 A OUT 1e7
C4 N002 0 10p
.tran 0 2m 10n
.op
.options plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 716
WIRE -16 96 -64 96
WIRE 208 96 96 96
WIRE 464 96 288 96
WIRE 512 96 464 96
WIRE 640 96 592 96
WIRE 752 96 640 96
WIRE 96 128 96 96
WIRE 464 144 464 96
WIRE 96 256 96 208
WIRE 464 256 464 208
WIRE -64 368 -64 96
WIRE 176 368 -64 368
WIRE 640 368 640 96
WIRE 640 368 256 368
WIRE -400 528 -416 528
WIRE -64 544 -64 368
WIRE 112 544 -64 544
WIRE 336 544 176 544
WIRE 384 544 336 544
WIRE 512 544 384 544
WIRE 640 544 640 368
WIRE 640 544 592 544
WIRE -416 560 -416 528
WIRE -64 560 -64 544
WIRE 336 560 336 544
WIRE -64 656 -64 624
WIRE 336 656 336 624
WIRE -416 672 -416 640
IOPIN -16 96 Out
IOPIN 752 96 Out
RECTANGLE Normal 608 304 48 32
RECTANGLE Normal 288 640 0 480
SYMBOL res 608 528 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 200
SYMBOL cap 112 560 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
WINDOW 39 -28 32 VBottom 0
SYMATTR InstName C1
SYMATTR Value 0.1p
SYMATTR SpiceLine Rser=50 Lser=10m Cpar=4p
SYMBOL cap -80 560 R0
SYMATTR InstName C3
SYMATTR Value 15p
SYMBOL cap 448 144 R0
SYMATTR InstName C4
SYMATTR Value 10p
SYMBOL bv 96 112 R0
SYMATTR InstName B1
SYMATTR Value V=2.5-2.5*tanh(10*(V(A)-2.5))
SYMBOL res 192 112 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL cap 320 560 R0
SYMATTR InstName C2
SYMATTR Value 15p
SYMBOL res 496 112 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL current -416 560 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value PULSE(0 10m 0 1n 1n 10n)
SYMBOL res 160 384 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R3
SYMATTR Value 1e7
FLAG 96 256 0
FLAG -16 96 A
FLAG -64 656 0
FLAG 336 656 0
FLAG -416 672 0
FLAG -400 528 B
FLAG 384 544 B
FLAG 464 256 0
FLAG 752 96 OUT
TEXT -424 120 Left 0 !.tran 0 2m 10n
TEXT -424 152 Left 0 !.op
TEXT 88 56 Left 0 ;Inverter
TEXT 16 504 Left 0 ;Crystal
TEXT -424 488 Left 0 ;Startup
TEXT -416 48 Left 0 ;Crystal Oscillator
TEXT -424 88 Left 0 !.options plotwinsize=0
TEXT 32 672 Left 0 ;Q=sqrt(L/R) / Rser\nfo = 1/(2*pi*sqrt(L*C))
TEXT 144 264 Left 0 ;gain_max=2.5*10=25
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2504-4.2.asc
* Generated by LTspice 26.0.1 for Windows.
L1 N001 N002 1.5 Rser=80m
C1 OUT 0 10
V1 IN 0 3.3
Rload OUT 0 50
XU1 N001 N002 OUT IN IN 0 OUT NC_01 ADP2504-4.2 ;pnba SW1)SW2)FB)EN)PVin)GND)Vout)Sync
.tran 400u startup
* PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2504-4.2.asy)
.lib ADP2504-4.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 64 -64 64
WIRE 48 64 32 64
WIRE 336 64 304 64
WIRE -64 80 -64 64
WIRE 32 144 32 64
WIRE 48 144 32 144
WIRE 336 144 304 144
WIRE -64 176 -64 160
WIRE 320 224 304 224
WIRE 368 224 320 224
WIRE 480 224 368 224
WIRE 368 240 368 224
WIRE 480 240 480 224
WIRE 48 304 32 304
WIRE 320 304 320 224
WIRE 320 304 304 304
WIRE 368 336 368 304
WIRE 480 336 480 320
FLAG 368 336 0
FLAG 32 304 0
FLAG -64 176 0
FLAG 480 336 0
FLAG -64 64 IN
FLAG 480 224 OUT
SYMBOL ind 320 48 R0
SYMATTR InstName L1
SYMATTR Value 1.5
SYMATTR SpiceLine Rser=80m
SYMBOL cap 352 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage -64 64 R0
SYMATTR InstName V1
SYMATTR Value 3.3
SYMBOL res 464 224 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL ADP2504-4.2 176 176 R0
SYMATTR InstName U1
TEXT 344 392 Left 2 !.tran 400u startup
TEXT 168 0 Bottom 2 ;PSM and forced PWM modes are modelled\nClock Sync is not modelled
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1551LCS8-4.1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1551LCS8-4.1.asy)
C2 N001 0 .1
C1 N003 N002 .1
Rload OUT 0 1K
C3 OUT 0 10
XU1 0 IN N002 OUT N003 0 N001 OUT LTC1551LCS8-4.1 ;pnba SHDN)Vin)C+)Vout)C-)GND)CPout)REG
V1 IN 0 5
.tran 1m
.lib LTC1551LCS8-4.1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1600 908
WIRE 544 32 144 32
WIRE 240 112 224 112
WIRE 544 112 544 32
WIRE 544 112 528 112
WIRE 240 176 -80 176
WIRE 560 176 528 176
WIRE 656 176 624 176
WIRE -80 192 -80 176
WIRE 240 240 224 240
WIRE 544 240 528 240
WIRE -80 288 -80 272
WIRE 144 304 144 32
WIRE 144 304 16 304
WIRE 240 304 144 304
WIRE 544 304 528 304
WIRE 16 320 16 304
WIRE 144 336 144 304
WIRE 16 416 16 400
WIRE 144 416 144 400
WIRE 224 416 224 240
WIRE 368 416 224 416
WIRE 544 416 544 304
WIRE 544 416 432 416
SYMBOL cap 560 192 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL PowerProducts\\LTC1551LCS8-4.1 384 208 R0
SYMATTR InstName U1
SYMBOL cap 432 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage -80 176 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 128 336 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res 0 304 R0
SYMATTR InstName Rload
SYMATTR Value 1K
FLAG 656 176 0
FLAG 544 240 0
FLAG 16 416 0
FLAG 144 416 0
FLAG -80 288 0
FLAG 224 112 0
FLAG 16 304 OUT
FLAG -80 176 IN
TEXT 544 488 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX312.asc
* Generated by LTspice 26.0.1 for Windows.
* Notes:\n \nBandwidth = 139MHz.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\MAX312.asy)
V2 vNC1 0 15
R1 vCOM1 0 301
V1 vIN1 0 PULSE(0 2.4 0 10n 10n 5u 10u)
V4 v- 0 -15
C1 vCOM1 0 36p
V5 vVL 0 5
XU2 0 v+ vIN1 NC_01 NC_02 NC_03 vNC1 vCOM1 NC_04 NC_05 NC_06 NC_07 NC_08 NC_09 v- vVL MAX312 ;pnba GND)V+)IN1)IN2)IN3)IN4)NC1)COM1)NC2)COM2)NC3)COM3)NC4)COM4)V-)VL
V3 v+ 0 15
.tran 100u
.param Vdd = 15
.lib MAX312.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2244 1360
WIRE 1072 -256 1056 -256
WIRE 1072 -208 1072 -256
WIRE 912 -128 544 -128
WIRE 960 -128 912 -128
WIRE 1232 -128 1184 -128
WIRE 1280 -128 1232 -128
WIRE 1376 -128 1280 -128
WIRE 1280 -96 1280 -128
WIRE 1376 -80 1376 -128
WIRE 912 -64 704 -64
WIRE 960 -64 912 -64
WIRE 544 -16 544 -128
WIRE 704 -16 704 -64
WIRE 1280 16 1280 -16
WIRE 1376 16 1376 -16
WIRE 544 96 544 64
WIRE 704 96 704 64
WIRE 672 224 608 224
WIRE 848 224 784 224
WIRE 608 288 608 224
WIRE 784 288 784 224
WIRE 1232 320 1184 320
WIRE 1280 320 1232 320
WIRE 1280 368 1280 320
WIRE 608 416 608 368
WIRE 784 416 784 368
WIRE 1280 480 1280 448
WIRE 1120 496 1120 464
WIRE 1024 512 1024 464
WIRE 1024 512 1008 512
RECTANGLE Normal 768 -432 16 -720 2
SYMBOL cap 1360 -80 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage 1280 352 R0
WINDOW 0 18 8 Left 2
WINDOW 3 15 104 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 5
SYMBOL MAX312 1072 -80 R0
SYMATTR InstName U2
SYMBOL voltage 784 272 R0
WINDOW 0 58 35 Bottom 2
WINDOW 3 54 69 Top 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -15
SYMBOL voltage 544 -32 R0
WINDOW 0 33 8 Left 2
WINDOW 3 41 71 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage 608 272 R0
WINDOW 0 58 35 Bottom 2
WINDOW 3 54 69 Top 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL res 1264 -112 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage 704 -32 R0
WINDOW 0 18 8 Left 2
WINDOW 3 -191 178 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 2.4 0 10n 10n 5u 10u)
FLAG 1280 480 0
FLAG 1280 16 0
FLAG 1376 16 0
FLAG 1120 496 0
FLAG 608 416 0
FLAG 704 96 0
FLAG 1056 -256 v+
FLAG 1008 512 v-
FLAG 672 224 v+
FLAG 784 416 0
FLAG 848 224 v-
FLAG 544 96 0
FLAG 1232 -128 vCOM1
FLAG 1232 320 vVL
FLAG 912 -128 vNC1
FLAG 912 -64 vIN1
TEXT 1408 528 Left 2 !.tran 100u
TEXT 32 -696 Left 2 ;Notes:\n \nBandwidth = 139MHz.
TEXT 32 -392 Left 2 !.param Vdd = 15
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7102.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7102.asy)
R3 OUT N001 100k
R2 N002 0 10K
R1 OUT N002 17.4k
Rload OUT 0 16.5
XU1 IN N002 IN N001 OUT 0 ADP7102 Vref=1.22 ;pnba Vin)ADJ)EN)PG)Vout)GND
C1 OUT 0 2.2 Rser=3m
V1 IN 0 4.3
.tran 3m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 80 32 -16 32
WIRE 96 32 80 32
WIRE 400 32 352 32
WIRE 528 32 480 32
WIRE -16 48 -16 32
WIRE 400 128 352 128
WIRE 528 128 528 32
WIRE 528 128 400 128
WIRE 624 128 528 128
WIRE -16 144 -16 128
WIRE 624 144 624 128
WIRE 528 160 528 128
WIRE 80 224 80 32
WIRE 96 224 80 224
WIRE 400 224 400 208
WIRE 400 224 352 224
WIRE 400 240 400 224
WIRE 528 240 528 224
WIRE 624 240 624 224
WIRE 224 304 224 288
WIRE 400 336 400 320
SYMBOL res 384 112 R0
SYMATTR InstName R1
SYMATTR Value 17.4k
SYMBOL res 496 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100k
SYMBOL voltage -16 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.3
SYMBOL res 608 128 R0
SYMATTR InstName Rload
SYMATTR Value 16.5
SYMBOL ADP7102 224 128 R0
SYMATTR InstName U1
SYMBOL cap 512 160 R0
SYMATTR InstName C1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=3m
SYMBOL res 384 224 R0
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 224 304 0
FLAG -16 144 0
FLAG -16 32 IN
FLAG 624 240 0
FLAG 528 240 0
FLAG 624 128 OUT
FLAG 400 336 0
TEXT 512 304 Left 2 !.tran 3m startup
* Z:\tmp\asc_dec_bjh7r6w2\023c31ee5f48_CMOS-Inveneter_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
VDD N001 0 1.8
Vbias NC_01 0 0.7
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1744 680
WIRE 816 -256 672 -256
WIRE 672 -240 672 -256
WIRE 672 -240 352 -240
WIRE 816 -128 816 -176
WIRE 672 -64 672 -240
WIRE -208 192 -208 144
SYMBOL voltage 816 -272 R0
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1.8
SYMBOL voltage -208 48 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vbias
SYMATTR Value 0.7
FLAG -208 192 0
FLAG 816 -128 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADL5304.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADL5304.asy)
Rmntr 1P5V N002 50
C2 N007 0 0.1
XU1 1P5V 1P5V N005 N006 N006 1P5V 1P5V N007 N007 0 0 0 NC_01 NC_02 N004 VLOG VLOG N004 1P5V 1P5V N001 N002 N003 N003 ADL5304 ;pnba VSM1)VSM2)INUM)IDEN)IREF)VSM3)VSM4)VDEN)INDN)COMM)VNEG)ACOM)2VLT)SCL3)SCL2)SCL1)VLOG)INMS)INPS)1P5V)VPOS)IMON)INNM)VNUM
V1 N001 0 5
I1 N002 N005 {Ipd}
C1 0 N001 0.1
R1 VLOG 0 10k
.step dec param Ipd 1p 10m 10
.op
.lib ADL5304.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 -336 384 -336
WIRE 416 -320 416 -336
WIRE 384 -288 384 -336
WIRE 384 -160 384 -208
WIRE 416 -160 384 -160
WIRE 496 -160 480 -160
WIRE 64 -144 -288 -144
WIRE 192 -144 128 -144
WIRE 496 -144 496 -160
WIRE 64 -112 64 -144
WIRE 128 -112 128 -144
WIRE 192 -112 192 -144
WIRE 256 -112 256 -144
WIRE 384 -112 384 -160
WIRE -288 -16 -288 -144
WIRE -192 -16 -288 -16
WIRE -64 -16 -112 -16
WIRE -16 -16 -64 -16
WIRE 16 -16 -16 -16
WIRE 464 -16 432 -16
WIRE -288 16 -288 -16
WIRE -16 48 -16 -16
WIRE 16 48 -16 48
WIRE 496 48 432 48
WIRE -288 112 -288 96
WIRE 16 112 -288 112
WIRE 464 112 432 112
WIRE 576 112 464 112
WIRE 576 144 576 112
WIRE 16 176 -16 176
WIRE 464 176 464 112
WIRE 464 176 432 176
WIRE -16 240 -16 176
WIRE 16 240 -16 240
WIRE 496 240 496 48
WIRE 496 240 432 240
WIRE 576 256 576 224
WIRE -16 304 -48 304
WIRE 16 304 -16 304
WIRE -16 368 -16 304
WIRE 16 368 -16 368
WIRE 96 496 96 464
WIRE 160 496 160 464
WIRE 160 496 96 496
WIRE 224 496 224 464
WIRE 288 496 288 464
WIRE 288 496 224 496
WIRE 352 496 352 464
WIRE 352 496 288 496
WIRE 96 512 96 496
WIRE 288 512 288 496
WIRE 96 592 96 576
SYMBOL ADL5304 224 176 R0
SYMATTR InstName U1
SYMBOL cap 80 512 R0
SYMATTR InstName C2
SYMATTR Value 0.1u
SYMBOL current -288 16 R0
WINDOW 0 35 5 Left 2
WINDOW 3 40 39 Left 2
WINDOW 123 39 73 Left 2
SYMATTR InstName I1
SYMATTR Value {Ipd}
SYMBOL res 560 128 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res -96 -32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rmntr
SYMATTR Value 50
SYMBOL voltage 384 -192 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 480 -176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 0.1u
FLAG 416 -320 0
FLAG 496 -144 0
FLAG 464 -16 1P5V
FLAG 288 512 0
FLAG 96 592 0
FLAG -48 304 1P5V
FLAG 256 -144 1P5V
FLAG -64 -16 1P5V
FLAG 576 112 VLOG
FLAG 576 256 0
TEXT -360 144 Left 2 !.step dec param Ipd 1p 10m 10
TEXT -360 616 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\53c8469cb979_simulacionDiodo1N60Inversa.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 10
R1 N002 N001 1K
D1 0 N002 1N60
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc V1 -10 50 0.1
.lib 1n60.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1644 680
WIRE 304 80 208 80
WIRE 448 80 384 80
WIRE 448 128 448 80
WIRE 208 144 208 80
WIRE 208 224 208 208
WIRE 448 224 448 192
WIRE 448 224 208 224
WIRE 208 304 208 224
FLAG 208 304 0
SYMBOL Misc\\cell 208 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL res 400 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL diode 464 192 R180
WINDOW 0 -31 65 Left 2
WINDOW 3 -57 2 Left 2
SYMATTR InstName D1
SYMATTR Value 1N60
TEXT 240 304 Left 2 !.dc V1 -10 50 0.1
TEXT 240 328 Left 2 !.lib 1n60.lib
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1083-12.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 15) Rser=0.1
Rload OUT 0 20
C1 OUT 0 10
XU1 0 OUT IN LT1083-12 ;pnba GND)OUT)IN
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1083-12.asy)
.lib LT1083.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2800 1520
WIRE 1552 896 1344 896
WIRE 1904 896 1808 896
WIRE 2016 896 1904 896
WIRE 1344 912 1344 896
WIRE 2016 912 2016 896
WIRE 1904 928 1904 896
WIRE 1344 1008 1344 992
WIRE 1904 1008 1904 992
WIRE 2016 1008 2016 992
WIRE 1680 1024 1680 992
FLAG 2016 896 OUT
FLAG 2016 1008 0
FLAG 1344 1008 0
FLAG 1904 1008 0
FLAG 1344 896 IN
FLAG 1680 1024 0
SYMBOL VOLTAGE 1344 896 R0
WINDOW 123 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 15)
SYMATTR SpiceLine Rser=0.1
SYMBOL RES 2000 896 R0
SYMATTR InstName Rload
SYMATTR Value 20
SYMBOL cap 1888 928 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LT1083-12 1680 896 R0
SYMATTR InstName U1
TEXT 1920 1064 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3407-3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3407-3.asy)
C3 OUT2 0 10
V1 IN 0 5
Rload1 OUT1 0 3
Rload2 OUT2 0 5
C1 OUT1 0 10
L1 N002 OUT1 2.2
XU1 OUT1 IN IN N002 0 IN N001 MP_01 IN OUT2 LTC3407-3 ;pnba Vout1)Run1)Vin)SW1)GND)Mode)SW2))Run2)Vout2
L2 N001 OUT2 2.2
.tran 200u startup
.lib LTC3407-3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1252 868
WIRE 192 48 48 48
WIRE 272 48 192 48
WIRE 352 48 272 48
WIRE 432 48 352 48
WIRE 48 64 48 48
WIRE 272 64 272 48
WIRE 352 64 352 48
WIRE 432 64 432 48
WIRE 192 128 192 48
WIRE 208 128 192 128
WIRE 48 160 48 144
WIRE 0 224 -144 224
WIRE 64 224 0 224
WIRE 96 224 64 224
WIRE 208 224 176 224
WIRE 512 224 496 224
WIRE 624 224 592 224
WIRE 704 224 624 224
WIRE 800 224 704 224
WIRE -144 240 -144 224
WIRE 0 240 0 224
WIRE 704 240 704 224
WIRE 800 240 800 224
WIRE -144 336 -144 320
WIRE 0 336 0 304
WIRE 64 336 64 224
WIRE 208 336 64 336
WIRE 624 336 624 224
WIRE 624 336 496 336
WIRE 704 336 704 304
WIRE 800 336 800 320
WIRE 352 400 352 384
SYMBOL VOLTAGE 48 48 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL polcap -16 240 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL res -160 224 R0
SYMATTR InstName Rload2
SYMATTR Value 5
SYMBOL polcap 688 240 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL PowerProducts\\LTC3407-3 352 224 R0
SYMATTR InstName U1
SYMBOL res 784 224 R0
SYMATTR InstName Rload1
SYMATTR Value 3
SYMBOL ind 192 240 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 2.2
SYMBOL ind 496 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
FLAG 48 160 0
FLAG 352 400 0
FLAG 704 336 0
FLAG 800 336 0
FLAG 800 224 OUT1
FLAG 0 336 0
FLAG -144 336 0
FLAG -144 224 OUT2
FLAG 48 48 IN
TEXT 576 384 Left 2 !.tran 200u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6400-26.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6400-26.asy)
XU1 0 0 N001 N002 N006 N007 N007 N004 N005 N003 LTC6400-26 ;pnba IN-)Vocm)V+)OUT+)OUT-)V-)_EN)IN+)OUTF-)OUTF+
V3 N007 0 -1.5
V2 N001 0 1.5
V1 N004 0 SINE(0 10m 100Meg)
.tran 100n
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 192 112 -64 112
WIRE -64 128 -64 112
WIRE 192 128 192 112
WIRE 352 160 336 160
WIRE 80 208 64 208
WIRE 352 208 336 208
WIRE -64 224 -64 208
WIRE -192 272 -208 272
WIRE 80 272 -112 272
WIRE 352 272 336 272
WIRE 352 320 336 320
WIRE 144 384 144 368
WIRE 192 384 192 368
WIRE 192 384 144 384
WIRE 240 384 240 368
WIRE 192 416 192 384
WIRE 192 512 192 496
SYMBOL LTC6400-26 208 240 R0
WINDOW 3 55 144 Left 2
SYMATTR InstName U1
SYMBOL voltage -96 272 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10m 100Meg)
SYMBOL voltage -64 112 R0
SYMATTR InstName V2
SYMATTR Value 1.5
SYMBOL voltage 192 400 R0
SYMATTR InstName V3
SYMATTR Value -1.5
FLAG -64 224 0
FLAG -208 272 0
FLAG 64 208 0
FLAG 192 512 0
FLAG 240 384 0
TEXT 376 448 Left 2 !.tran 100n