Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\aa6a7061c33e_rc.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Output Input 1K
V1 Input 0 SINE(0 1 1K) AC 1
C1 Output 0 10nF
.ac oct 20 1000 200000
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -64 80 -80 80
WIRE -16 80 -64 80
WIRE 160 80 64 80
WIRE 336 80 160 80
WIRE 160 112 160 80
WIRE -64 128 -64 80
WIRE -64 240 -64 208
WIRE 160 240 160 176
WIRE 160 240 -64 240
WIRE 160 288 160 240
IOPIN -80 80 In
IOPIN 336 80 Out
SYMBOL cap 144 112 R0
SYMATTR InstName C1
SYMATTR Value 10nF
SYMBOL Misc\\signal -64 112 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL res 80 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG -80 80 Input
FLAG 336 80 Output
FLAG 160 288 0
TEXT 208 216 Left 2 !.ac oct 20 1000 200000
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1054.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1054.asy)
C1 OUT 0 100
C2 N002 N005 100
Rload OUT 0 50
V1 IN 0 10
XU1 N001 N002 0 N005 OUT N004 N003 IN LT1054 ;pnba FB)Cap+)GND)Cap-)Vout)Ref)OSC)Vin
.tran 10m startup
.lib LT1054.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3548 1764
WIRE 3008 1056 2976 1056
WIRE 3376 1056 3264 1056
WIRE 3376 1072 3376 1056
WIRE 3008 1120 2912 1120
WIRE 3296 1120 3264 1120
WIRE 2912 1152 2912 1120
WIRE 3008 1184 2976 1184
WIRE 3296 1184 3264 1184
WIRE 3376 1184 3376 1152
WIRE 2912 1248 2912 1216
WIRE 3008 1248 2912 1248
WIRE 3312 1248 3264 1248
WIRE 3440 1248 3312 1248
WIRE 3312 1264 3312 1248
WIRE 3440 1264 3440 1248
WIRE 3312 1360 3312 1328
WIRE 3440 1360 3440 1344
SYMBOL res 3424 1248 R0
SYMATTR InstName Rload
SYMATTR Value 50
SYMBOL cap 2896 1152 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMBOL cap 3296 1264 R0
SYMATTR InstName C1
SYMATTR Value 100
SYMBOL VOLTAGE 3376 1056 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL POWERPRODUCTS\\LT1054 3136 1152 R0
SYMATTR InstName U1
FLAG 3376 1184 0
FLAG 2976 1184 0
FLAG 3312 1360 0
FLAG 3440 1360 0
FLAG 3440 1248 OUT
FLAG 3376 1056 IN
TEXT 3064 1376 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6362.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6362.asy)
XU1 N002 N005 N004 N003 N007 0 NC_01 N006 LTC6362 ;pnba IN-)VOCM)V+)OUT+)OUT-)V-)SHDN)IN+
V1 N001 0 SINE(0 1 250K) AC 1
R1 N003 N002 1K
V2 N004 0 5
R4 N006 0 1K
R3 N007 N006 1K
C1 N005 0 .1
R2 N002 N001 1K
.tran 100u
.lib LTC7.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1280 680
WIRE 288 -96 144 -96
WIRE 400 -96 368 -96
WIRE 464 -96 400 -96
WIRE 656 -96 544 -96
WIRE 144 -80 144 -96
WIRE 144 16 144 0
WIRE 736 48 496 48
WIRE 496 64 496 48
WIRE 736 64 736 48
WIRE 400 112 400 -96
WIRE 464 112 400 112
WIRE 656 112 656 -96
WIRE 656 112 624 112
WIRE 320 144 288 144
WIRE 464 144 384 144
WIRE 736 160 736 144
WIRE 464 176 400 176
WIRE 656 176 624 176
WIRE 496 256 496 224
WIRE 304 336 224 336
WIRE 400 336 400 176
WIRE 400 336 384 336
WIRE 480 336 400 336
WIRE 656 336 656 176
WIRE 656 336 560 336
SYMBOL res 400 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL cap 384 128 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL voltage 736 48 R0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 576 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL LTC6362 528 144 R0
SYMATTR InstName U1
SYMBOL res 384 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 144 -96 R0
WINDOW 123 37 59 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value SINE(0 1 250K)
SYMBOL res 560 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG 144 16 0
FLAG 736 160 0
FLAG 224 336 0
FLAG 496 256 0
FLAG 288 144 0
TEXT 656 360 Left 2 !.tran 100u
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4530-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4530-1.asy)
;.options gmin=1e-15 ; Uncomment to see actual ADA4530 input impedance
R1 OUT IN 100Meg
XU2 0 IN +V -V OUT N001 ADA4530-1 ;pnba In+)In-)V+)V-)OUT)GDR
C1 OUT IN 5p
V1 +V 0 5
V2 0 -V 5
R2 OUT 0 10K
I1 IN 0 PULSE(0 10n 1m 1u 1u 1 2)
.tran 10
.lib ADI1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1424 1064
WIRE 256 -96 192 -96
WIRE 368 -96 320 -96
WIRE -96 0 -96 -16
WIRE 80 0 80 -16
WIRE 192 16 192 -96
WIRE 240 16 192 16
WIRE 368 16 368 -96
WIRE 368 16 320 16
WIRE -96 96 -96 80
WIRE 80 96 80 80
WIRE 256 144 256 128
WIRE 192 160 192 16
WIRE 192 160 -192 160
WIRE 240 160 192 160
WIRE -192 176 -192 160
WIRE 368 176 368 16
WIRE 368 176 304 176
WIRE 480 176 368 176
WIRE 240 192 208 192
WIRE 480 192 480 176
WIRE 256 224 256 208
WIRE 288 240 288 208
WIRE -192 272 -192 256
WIRE 480 288 480 272
SYMBOL ADA4530-1 272 176 R0
SYMATTR InstName U2
SYMBOL voltage -96 -16 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL current -192 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value PULSE(0 10n 1m 1u 1u 1 2)
SYMBOL voltage 80 96 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 336 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100Meg
SYMBOL cap 320 -112 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 5p
SYMBOL res 464 176 R0
SYMATTR InstName R2
SYMATTR Value 10K
FLAG -96 96 0
FLAG 80 96 0
FLAG -96 -16 +V
FLAG 80 -16 -V
FLAG 256 128 +V
FLAG 256 224 -V
FLAG 480 288 0
FLAG -192 272 0
FLAG 480 176 OUT
FLAG -192 160 IN
FLAG 208 192 0
TEXT -48 384 Left 2 !.tran 10\n;.options gmin=1e-15 ; Uncomment to see actual  ADA4530 input impedance
* Z:\home\khalils\Downloads\files\data\raw_asc\abd349e5af71_transistor_vth.asc
* Generated by LTspice 26.0.1 for Windows.
* .step param Vgate 0.0V 3V 0.2V
V2 N002 0 PULSE(0 30 0 1 0 0 1)
V1 N001 0 10mV
M19 ds gate 0 gate pmos l=access_tran_L w=access_tran_W
R2 N001 ds 100
R1 N002 gate 1k
I1 0 thresh_current {vth_current}
Rthresh_res thresh_current 0 100
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include ../DRAM_models/transistor_model.pm
.tran 1
.param access_tran_L={85nm*access_tran_L_factor}
.param access_tran_W={55nm*access_tran_W_factor}
.param access_tran_L_factor={0.95**tech_node}
.param access_tran_W_factor={0.85**tech_node}
.param tech_node=7
.param vth_current={(access_tran_W/access_tran_L)*100nA}
.OPTIONS plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4232 2520
WIRE -2240 -736 -2432 -736
WIRE -2432 -704 -2432 -736
WIRE -2240 -688 -2240 -736
WIRE -2384 -576 -2432 -576
WIRE -2704 -544 -2816 -544
WIRE -2560 -544 -2624 -544
WIRE -2512 -544 -2560 -544
WIRE -2480 -544 -2512 -544
WIRE -2816 -480 -2816 -544
WIRE -2432 -464 -2432 -528
WIRE -2512 -400 -2512 -544
WIRE -2384 -400 -2384 -576
WIRE -2384 -400 -2512 -400
WIRE -2800 -144 -2896 -144
WIRE -2800 -128 -2800 -144
WIRE -2896 -48 -2896 -144
WIRE -2800 -16 -2800 -48
WIRE -2896 16 -2896 -48
SYMBOL current -2896 96 M180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName I1
SYMATTR Value {vth_current}
SYMBOL voltage -2816 -496 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 30 0 1 0 0 1)
SYMBOL res -2816 -144 R0
SYMATTR InstName thresh_res
SYMATTR Value 100
SYMBOL res -2448 -720 R0
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL voltage -2240 -704 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 10mV
SYMBOL nmos4 -2480 -624 R0
WINDOW 0 104 24 Invisible 2
WINDOW 3 179 41 Invisible 2
SYMATTR InstName M19
SYMATTR Value pmos
SYMATTR Value2 l=access_tran_L w=access_tran_W
SYMBOL res -2720 -528 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 1k
FLAG -2240 -608 0
FLAG -2432 -464 0
FLAG -2816 -400 0
FLAG -2432 -624 ds
FLAG -2560 -544 gate
FLAG -2896 96 0
FLAG -2800 -16 0
FLAG -2896 -48 thresh_current
TEXT -2360 -264 Left 2 !.include ../DRAM_models/transistor_model.pm
TEXT -2352 -296 Left 2 !.tran 1
TEXT -2352 -224 Left 2 ;.step param Vgate 0.0V 3V 0.2V
TEXT -2352 -80 Left 2 !.param access_tran_L={85nm*access_tran_L_factor}
TEXT -2352 -48 Left 2 !.param access_tran_W={55nm*access_tran_W_factor}
TEXT -2352 8 Left 2 !.param access_tran_L_factor={0.95**tech_node}
TEXT -2352 40 Left 2 !.param access_tran_W_factor={0.85**tech_node}
TEXT -2344 -120 Left 2 !.param tech_node=7
TEXT -2352 96 Left 2 !.param vth_current={(access_tran_W/access_tran_L)*100nA}
TEXT -2352 -184 Left 2 !.OPTIONS plotwinsize=0
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7156-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 4
C1 OUT 0 10
C2 N003 0 1
C3 N004 0 1
C4 N002 0 1
R1 IN N001 100K
Rload OUT 0 3.3
XU1 OUT MP_01 OUT N002 N001 N003 N003 N004 IN 0 ADP7156_7 Vreg=3.611 Vref=3.316 ;pnba Vout))Vout_Sense)Byp)EN)Ref_Sense)Ref)Vreg)Vin)GND
.tran 5m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7156-3.3.asy)
.lib ADP7156_7.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 32 -144 32
WIRE 80 32 -32 32
WIRE 416 32 400 32
WIRE 464 32 416 32
WIRE 560 32 464 32
WIRE -144 48 -144 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE 416 128 416 32
WIRE 416 128 400 128
WIRE -144 144 -144 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE 0 224 -16 224
WIRE 80 224 64 224
WIRE 416 224 400 224
WIRE 464 224 416 224
WIRE 464 240 464 224
WIRE 0 320 -16 320
WIRE 80 320 64 320
WIRE 416 320 416 224
WIRE 416 320 400 320
WIRE 464 320 464 304
WIRE 240 400 240 384
FLAG 240 400 0
FLAG 464 320 0
FLAG 464 144 0
FLAG -16 320 0
FLAG -16 224 0
FLAG -144 144 0
FLAG 560 144 0
FLAG -144 32 IN
FLAG 560 32 OUT
SYMBOL voltage -144 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4
SYMBOL cap 448 48 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL cap 448 240 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 64 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 544 32 R0
SYMATTR InstName Rload
SYMATTR Value 3.3
SYMBOL ADP7156-3.3 240 176 R0
SYMATTR InstName U1
TEXT 472 368 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1790-1.25.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1790-1.25.asy)
Rload OUT 0 1K
XU1 IN 0 OUT LT1790-125 ;pnba IN)GND)OUT
C1 OUT 0 1
V1 IN 0 PWL(0 0 1 10)
.tran 1
.lib LT1790.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 48 -208 48
WIRE 320 48 256 48
WIRE 416 48 320 48
WIRE -208 64 -208 48
WIRE 320 64 320 48
WIRE 416 64 416 48
WIRE -208 160 -208 144
WIRE 320 160 320 128
WIRE 416 160 416 144
WIRE 128 176 128 160
SYMBOL res 400 48 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL cap 304 64 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL PowerProducts\\LT1790-1.25 128 48 R0
SYMATTR InstName U1
SYMBOL voltage -208 48 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
FLAG -208 160 0
FLAG 320 160 0
FLAG 416 160 0
FLAG 128 176 0
FLAG 416 48 OUT
FLAG -208 48 IN
TEXT 288 208 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\a72a2b34e52e_diode_or.asc
* Generated by LTspice 26.0.1 for Windows.
V1 B 0 PULSE(0 5 0 0 0 0.5 2)
D1 B OUT 1N4148
D2 SW OUT 1N4148
R1 OUT 0 10k
V2 A 0 PULSE(0 5 0 0 0 0.5 3)
Q1 SW N001 0 0 NPN
V3 Vcc 0 4.81
R2 N001 A 10k
R3 Vcc SW 100
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 5s
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -432 0 -432 -32
WIRE 16 32 16 0
WIRE 16 32 -128 32
WIRE 80 32 16 32
WIRE 192 32 144 32
WIRE -64 96 -64 -96
WIRE -432 112 -432 80
WIRE -128 128 -128 112
WIRE 192 160 192 32
WIRE 240 160 192 160
WIRE -96 208 -176 208
WIRE -64 208 -64 176
WIRE -64 208 -96 208
WIRE 80 208 -64 208
WIRE 192 208 192 160
WIRE 192 208 144 208
WIRE -96 224 -96 208
WIRE -432 256 -480 256
WIRE -352 256 -432 256
WIRE -240 256 -272 256
WIRE 192 256 192 208
WIRE -432 304 -432 256
WIRE -176 368 -176 304
WIRE 0 368 -176 368
WIRE 192 368 192 336
WIRE 192 368 0 368
WIRE 0 416 0 368
FLAG 0 416 0
FLAG 240 160 OUT
FLAG -480 256 A
FLAG 16 0 B
FLAG -432 384 0
FLAG -128 128 0
FLAG -432 112 0
FLAG -432 -32 Vcc
FLAG -64 -96 Vcc
FLAG -96 224 SW
SYMBOL voltage -128 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -45 12 Left 2
WINDOW 3 -326 132 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 0 0 0.5 2)
SYMBOL diode 80 48 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL diode 80 224 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL res 176 240 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -432 288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -44 138 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 0 0 0.5 3)
SYMBOL npn -240 208 R0
SYMATTR InstName Q1
SYMBOL voltage -432 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 4.81
SYMBOL res -256 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res -80 80 R0
SYMATTR InstName R3
SYMATTR Value 100
TEXT -200 504 Left 2 !.tran 5s
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX17640A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX17640A.asy)
V1 vIN 0 12
XU1 0 vIN vIN N002 vOUT NC_01 NC_02 N001 MAX17640A ;pnba GND)VIN)EN/UVLO)Vcc)FB/VOUT)MODE)_RESET)LX
Rload vOUT 0 8.25
L1 N001 vOUT 47 Rser=0.27
C2 vOUT 0 22
C1 N002 0 1
.tran 5m startup
.lib MAX17640A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 912 680
WIRE 32 -32 16 -32
WIRE 112 -32 32 -32
WIRE 176 -32 112 -32
WIRE 512 -32 464 -32
WIRE 624 -32 592 -32
WIRE 720 -32 624 -32
WIRE 800 -32 720 -32
WIRE 832 -32 800 -32
WIRE 624 -16 624 -32
WIRE 832 -16 832 -32
WIRE 16 16 16 -32
WIRE 624 64 624 48
WIRE 832 80 832 64
WIRE 112 96 112 -32
WIRE 176 96 112 96
WIRE 720 112 720 -32
WIRE 720 112 464 112
WIRE 16 128 16 96
WIRE 176 224 80 224
WIRE 80 240 80 224
WIRE 80 320 80 304
WIRE 320 384 320 368
SYMBOL res 816 -32 R0
SYMATTR InstName Rload
SYMATTR Value 8.25
SYMBOL MAX17640A 320 144 R0
SYMATTR InstName U1
SYMBOL ind 496 -16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 47
SYMATTR SpiceLine Rser=0.27
SYMBOL cap 64 240 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage 16 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 608 -16 R0
SYMATTR InstName C2
SYMATTR Value 22
FLAG 16 128 0
FLAG 80 320 0
FLAG 320 384 0
FLAG 624 64 0
FLAG 832 80 0
FLAG 32 -32 vIN
FLAG 800 -32 vOUT
TEXT 72 448 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8410.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8410.asy)
R2 N004 0 412K
R1 N003 N004 604K
L1 IN N001 100
C2 OUT 0 .1
Rload OUT 0 20K
V1 IN 0 3.6 Rser=0.1
C1 N002 0 .1
XU1 IN IN 0 N001 OUT N002 N003 N004 LT8410 ;pnba _SHDN)Vcc)GND)SW)Vout)CAP)Vref)FBP
C3 N003 0 .01 Rser=10m
.tran 2m startup
.lib LT8410.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1572
WIRE 1648 880 1552 880
WIRE 1664 880 1648 880
WIRE 1760 880 1744 880
WIRE 2016 880 1888 880
WIRE 1552 896 1552 880
WIRE 2016 896 2016 880
WIRE 1760 944 1760 880
WIRE 1888 944 1888 880
WIRE 2016 976 2016 960
WIRE 1552 992 1552 976
WIRE 1648 1008 1648 880
WIRE 1680 1008 1648 1008
WIRE 2208 1008 1968 1008
WIRE 2304 1008 2208 1008
WIRE 2208 1024 2208 1008
WIRE 2304 1024 2304 1008
WIRE 2000 1088 1968 1088
WIRE 2112 1088 2000 1088
WIRE 2112 1104 2112 1088
WIRE 2208 1120 2208 1088
WIRE 2304 1120 2304 1104
WIRE 1648 1168 1648 1008
WIRE 1680 1168 1648 1168
WIRE 2000 1168 1968 1168
WIRE 2000 1184 2000 1168
WIRE 2112 1184 2112 1168
WIRE 1824 1248 1824 1232
WIRE 2000 1280 2000 1264
SYMBOL VOLTAGE 1552 880 R0
SYMATTR InstName V1
SYMATTR Value 3.6
SYMATTR SpiceLine Rser=0.1
SYMBOL cap 2192 1024 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL ind 1648 896 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 100
SYMBOL PowerProducts\\LT8410 1824 1088 R0
SYMATTR InstName U1
SYMBOL RES 1984 1072 R0
SYMATTR InstName R1
SYMATTR Value 604K
SYMBOL RES 1984 1168 R0
SYMATTR InstName R2
SYMATTR Value 412K
SYMBOL res 2288 1008 R0
SYMATTR InstName Rload
SYMATTR Value 20K
SYMBOL cap 2000 896 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL cap 2096 1104 R0
SYMATTR InstName C3
SYMATTR Value .01
SYMATTR SpiceLine Rser=10m
FLAG 2304 1008 OUT
FLAG 1824 1248 0
FLAG 1552 992 0
FLAG 1552 880 IN
FLAG 2016 976 0
FLAG 2208 1120 0
FLAG 2304 1120 0
FLAG 2000 1280 0
FLAG 2112 1184 0
TEXT 2144 1248 Left 2 !.tran 2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\2a0bc97afd50_6990.asc
* Generated by LTspice 26.0.1 for Windows.
* TimerBlox\n500Hz to 2KHz Voltage Controlled Oscillator\nControl Voltage Ramps from 2V to 1V\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6990.asy)
R4 N003 N002 261K
R1 N001 N004 1Meg
V1 N001 0 5
R2 N004 0 887K
XU1 N001 0 N003 N004 N001 OUT LTC6990 ;pnba OE)GND)SET)DIV)V+)OUT
V2 N002 0 PULSE(2 1 5m 20m 20m 5m 50m)
R3 N003 0 196K
.tran 60m startup
.lib LTC6990.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
WIRE 512 32 80 32
WIRE 80 80 80 32
WIRE 112 80 80 80
WIRE 400 80 336 80
WIRE 112 160 96 160
WIRE 384 160 336 160
WIRE 512 160 512 32
WIRE 512 160 384 160
WIRE 384 176 384 160
WIRE 512 176 512 160
WIRE -336 240 -352 240
WIRE -96 240 -256 240
WIRE 48 240 -16 240
WIRE 112 240 48 240
WIRE 352 240 336 240
WIRE 48 256 48 240
WIRE 352 272 352 240
WIRE 384 272 384 256
WIRE 384 272 352 272
WIRE 512 272 512 256
WIRE 384 288 384 272
WIRE 48 352 48 336
WIRE 384 384 384 368
SYMBOL voltage 512 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 368 272 R0
SYMATTR InstName R2
SYMATTR Value 887K
SYMBOL LTC6990 224 160 R0
SYMATTR InstName U1
SYMBOL voltage -240 240 R90
WINDOW 3 32 56 VTop 0
WINDOW 123 74 56 VTop 0
WINDOW 39 53 56 VTop 0
WINDOW 0 -32 56 VBottom 0
SYMATTR Value PULSE(2 1 5m 20m 20m 5m 50m)
SYMATTR InstName V2
SYMBOL res 32 240 R0
SYMATTR InstName R3
SYMATTR Value 196K
SYMBOL res 368 160 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL res 0 224 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R4
SYMATTR Value 261K
FLAG 512 272 0
FLAG -352 240 0
FLAG 96 160 0
FLAG 400 80 OUT
FLAG 48 352 0
FLAG 384 384 0
TEXT 224 24 Bottom 0 ;TimerBlox\n500Hz to 2KHz Voltage Controlled Oscillator\nControl Voltage Ramps from 2V to 1V\nStartup Modeled
TEXT 488 368 Left 0 !.tran 60m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC660.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC660.asy)
V1 IN 0 5
XU1 NC_01 N001 0 N004 OUT N003 N002 IN LTC660 ;pnba Boost)Cap+)GND)Cap-)Vout)LV)OSC)Vin
C2 OUT 0 150
Rload OUT 0 43.7
C1 N001 N004 150
.tran 10m startup
.lib LTC660.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3516 2244
WIRE 3312 1904 3200 1904
WIRE 3312 1920 3312 1904
WIRE 2944 1968 2832 1968
WIRE 3216 1968 3200 1968
WIRE 2832 2000 2832 1968
WIRE 3312 2016 3312 2000
WIRE 2944 2032 2928 2032
WIRE 3216 2032 3200 2032
WIRE 2832 2096 2832 2064
WIRE 2944 2096 2832 2096
WIRE 3248 2096 3200 2096
WIRE 3360 2096 3248 2096
WIRE 3248 2112 3248 2096
WIRE 3360 2112 3360 2096
WIRE 3248 2208 3248 2176
WIRE 3360 2208 3360 2192
SYMBOL cap 3232 2112 R0
SYMATTR InstName C2
SYMATTR Value 150
SYMBOL cap 2816 2000 R0
SYMATTR InstName C1
SYMATTR Value 150
SYMBOL voltage 3312 1904 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LTC660 3072 2000 R0
SYMATTR InstName U1
SYMBOL res 3344 2096 R0
SYMATTR InstName Rload
SYMATTR Value 43.7
FLAG 2928 2032 0
FLAG 3312 2016 0
FLAG 3248 2208 0
FLAG 3360 2208 0
FLAG 3360 2096 OUT
FLAG 3312 1904 IN
TEXT 2952 2216 Left 2 !.tran 10m startup
* Z:\tmp\asc_dec_bjh7r6w2\1750e79b03ea_Switch-Mode_Power_Supplies_-_Basso-_Figure_1-6_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
Vin N006 N007 30V
Rlower N005 N009 100
Rload OUT N009 100
EHs N003 0 N004 0 20
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 852
WIRE -624 -64 -1072 -64
WIRE -528 -48 -560 -48
WIRE -400 -48 -448 -48
WIRE -256 -48 -400 -48
WIRE -240 -48 -256 -48
WIRE -624 -32 -736 -32
WIRE -736 -16 -736 -32
WIRE -784 0 -880 0
WIRE -400 0 -400 -48
WIRE -784 48 -800 48
WIRE -800 96 -800 48
WIRE -736 96 -736 64
WIRE -880 160 -880 0
WIRE -256 160 -256 -48
WIRE -400 176 -400 80
WIRE -400 176 -832 176
WIRE -1072 224 -1072 64
WIRE -400 256 -400 176
WIRE -1072 432 -1072 304
WIRE -880 432 -880 240
WIRE -400 432 -400 336
WIRE -400 432 -768 432
WIRE -256 432 -256 240
WIRE -256 432 -400 432
WIRE -256 464 -256 432
SYMBOL voltage -1072 208 R0
SYMATTR InstName Vin
SYMATTR Value 30V
SYMBOL res -416 240 R0
SYMATTR InstName Rlower
SYMATTR Value 100
SYMBOL res -272 144 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL e -736 -32 R0
SYMATTR InstName Hs
SYMATTR Value 20
FLAG -240 -48 OUT
FLAG -800 96 0
FLAG -736 96 0
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1013.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1013.asy)
V3 N003 0 sine(0 .5 10K)
V1 +V 0 15
V2 -V 0 -15
XU1 N003 N001 +V -V N002 LT1013 ;pnba In+)In-)V+)V-)OUT
R2 N001 0 5K
R1 N002 N001 50K
.tran 1m
.lib LT1013.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 680
WIRE 192 0 176 0
WIRE 288 0 272 0
WIRE 352 0 288 0
WIRE 448 0 432 0
WIRE -80 64 -80 48
WIRE 32 64 32 48
WIRE 336 96 336 80
WIRE 288 112 288 0
WIRE 304 112 288 112
WIRE 448 128 448 0
WIRE 448 128 368 128
WIRE 304 144 160 144
WIRE -80 160 -80 144
WIRE 32 160 32 144
WIRE 160 160 160 144
WIRE 336 176 336 160
WIRE 160 256 160 240
SYMBOL voltage -80 48 R0
WINDOW 39 24 125 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 448 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50K
SYMBOL voltage 160 144 R0
SYMATTR InstName V3
SYMATTR Value sine(0 .5 10K)
SYMBOL voltage 32 48 R0
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL opamps\\LT1013 336 64 R0
SYMATTR InstName U1
SYMBOL res 288 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5K
FLAG -80 160 0
FLAG 336 80 +V
FLAG -80 48 +V
FLAG 176 0 0
FLAG 160 256 0
FLAG 32 160 0
FLAG 32 48 -V
FLAG 336 176 -V
TEXT 384 240 Left 2 !.tran 1m