Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8029.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8029.asy)
XU1 N002 OUT IN IN 0 MP_01 MP_02 OUT N001 N003 LTM8029 ;pnba FB)OUT)Run)Vin)GND)))Bias)Pgood)Rt
Rload OUT 0 8.6
R4 IN N001 100K
R3 N003 0 158K
C2 OUT 0 22 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
V1 IN 0 10
R1 N002 0 309K
.tran 750u startup
.lib LTM8029.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 680
WIRE 48 16 -64 16
WIRE 128 16 48 16
WIRE 144 16 128 16
WIRE 432 16 400 16
WIRE -64 32 -64 16
WIRE 48 112 48 16
WIRE 128 112 128 16
WIRE 144 112 128 112
WIRE 432 112 432 16
WIRE 432 112 400 112
WIRE 560 112 432 112
WIRE 640 112 560 112
WIRE -64 128 -64 112
WIRE 560 128 560 112
WIRE 640 128 640 112
WIRE 48 208 48 192
WIRE 144 208 48 208
WIRE 480 208 400 208
WIRE 480 224 480 208
WIRE 560 224 560 192
WIRE 640 224 640 208
WIRE 48 304 32 304
WIRE 144 304 128 304
WIRE 416 304 400 304
WIRE 480 320 480 304
SYMBOL PowerProducts\\LTM8029 272 160 R0
SYMATTR InstName U1
SYMBOL cap 544 128 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL res 144 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 158K
SYMBOL res 624 112 R0
SYMATTR InstName Rload
SYMATTR Value 8.6
SYMBOL res 464 208 R0
SYMATTR InstName R1
SYMATTR Value 309K
SYMBOL res 32 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL voltage -64 16 R0
SYMATTR InstName V1
SYMATTR Value 10
FLAG 416 304 0
FLAG 32 304 0
FLAG 560 224 0
FLAG 640 224 0
FLAG -64 128 0
FLAG -64 16 IN
FLAG 640 112 OUT
FLAG 480 320 0
TEXT 600 328 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX34406F.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\MAX34406F.asy)
Rpu2 VDD SHTDN 10k
Iload IN- 0 PWL(0 1 1m 1 +1n 5 8m 5 +1n 1)
XU1 IN+ IN- VDD 0 OUT OC ENA SHTDN CDLY MAX34406F ;pnba IN+)IN-)VDD)GND)OUT)OC)ENA)SHTDN)CDLY
VENA ENA 0 PWL(0 5 9m 5 +1n 0 +250u 0 +1n 5)
VDD VDD 0 5
Rsense IN+ IN- 5m
R1 OUT 0 1Meg
Ccdly CDLY 0 10n
Vcm IN+ 0 12
Rpu1 VDD OC 10k
C1 OUT 0 100p
.tran 10m
.lib MAX34406F.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 -64 112 -64
WIRE 240 -64 208 -64
WIRE 416 -64 240 -64
WIRE 528 -64 416 -64
WIRE 112 -48 112 -64
WIRE 416 -32 416 -64
WIRE 528 -32 528 -64
WIRE 240 0 240 -64
WIRE 240 32 240 0
WIRE -336 64 -448 64
WIRE 112 64 -336 64
WIRE 144 64 112 64
WIRE -336 80 -336 64
WIRE 368 80 336 80
WIRE 416 80 416 48
WIRE 416 80 368 80
WIRE 384 128 336 128
WIRE 528 128 528 48
WIRE 528 128 384 128
WIRE -336 176 -336 160
WIRE 112 176 -336 176
WIRE 144 176 112 176
WIRE 368 176 336 176
WIRE 528 176 368 176
WIRE 640 176 528 176
WIRE -448 208 -448 64
WIRE -336 208 -336 176
WIRE 528 208 528 176
WIRE 112 224 -48 224
WIRE 144 224 112 224
WIRE 640 224 640 176
WIRE 112 272 64 272
WIRE 144 272 112 272
WIRE 528 304 528 288
WIRE 640 304 640 288
WIRE 240 320 240 304
WIRE -448 352 -448 288
WIRE -336 352 -336 288
WIRE -336 352 -448 352
WIRE 64 352 64 272
WIRE -448 368 -448 352
WIRE -48 368 -48 224
WIRE -48 448 -48 432
WIRE 64 448 64 432
SYMBOL cap -64 368 R0
SYMATTR InstName Ccdly
SYMATTR Value 10n
SYMBOL res 400 -48 R0
SYMATTR InstName Rpu1
SYMATTR Value 10k
SYMBOL cap 624 224 R0
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL voltage -448 192 R0
SYMATTR InstName Vcm
SYMATTR Value 12
SYMBOL res -352 64 R0
SYMATTR InstName Rsense
SYMATTR Value 5m
SYMBOL MAX34406F 240 176 R0
WINDOW 0 76 -155 Bottom 2
WINDOW 3 115 135 Top 2
SYMATTR InstName U1
SYMBOL res 512 192 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL voltage 224 -64 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL current -336 208 R0
WINDOW 123 24 106 Left 2
SYMATTR Value2 8m 5 +1n 1)
SYMATTR InstName Iload
SYMATTR Value PWL(0 1 1m 1 +1n 5
SYMBOL voltage 64 336 R0
SYMATTR InstName VENA
SYMATTR Value PWL(0 5 9m 5 +1n 0 +250u 0 +1n 5)
SYMBOL res 512 -48 R0
SYMATTR InstName Rpu2
SYMATTR Value 10k
FLAG 240 320 0
FLAG -48 448 0
FLAG 528 304 0
FLAG 640 304 0
FLAG 368 176 OUT
FLAG 384 128 SHTDN
FLAG 368 80 OC
FLAG 112 -48 0
FLAG 240 0 VDD
FLAG -448 368 0
FLAG 112 224 CDLY
FLAG 64 448 0
FLAG 112 64 IN+
FLAG 112 176 IN-
FLAG 112 272 ENA
TEXT -496 472 Left 2 !.tran 10m
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8666.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8666.asy)
V3 N001 0 SINE(0 5 1k) AC 1
V2 V- 0 -8
XU1 0 N002 V+ V- N003 AD8666 ;pnba In+)In-)V+)V-)OUT
RG N002 N001 2k
V1 V+ 0 8
RF N003 N002 2k
.tran 5m
.lib AD8666.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1668 868
WIRE -48 16 -144 16
WIRE 64 16 32 16
WIRE 112 16 64 16
WIRE 240 16 192 16
WIRE -144 32 -144 16
WIRE -352 48 -368 48
WIRE -240 48 -256 48
WIRE -368 80 -368 48
WIRE -256 80 -256 48
WIRE -144 128 -144 112
WIRE 144 128 144 112
WIRE 64 144 64 16
WIRE 112 144 64 144
WIRE 240 160 240 16
WIRE 240 160 176 160
WIRE -368 176 -368 160
WIRE -256 176 -256 160
WIRE 112 176 64 176
WIRE 144 208 144 192
WIRE 64 352 64 176
SYMBOL voltage -256 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -8
SYMBOL voltage -144 16 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value SINE(0 5 1k)
SYMBOL res 208 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RF
SYMATTR Value 2k
SYMBOL voltage -368 64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 8
SYMBOL AD8666 144 96 R0
SYMATTR InstName U1
SYMBOL res 48 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RG
SYMATTR Value 2k
FLAG -368 176 0
FLAG -256 176 0
FLAG -256 48 V-
FLAG -368 48 V+
FLAG 144 112 V+
FLAG 144 208 V-
FLAG 64 352 0
FLAG -144 128 0
TEXT -344 -72 Left 2 !.tran 5m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3476.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3476.asy)
XU1 N007 N008 N006 N005 N002 N001 N004 N006 N004 N004 0 LT3476 ;pnba Vc)Rt)Vadj)SW)LED)CAP)Vin)Ref)PWM)_SHDN)GND
R2 N001 N002 .1
V1 N004 0 5
D1 N002 N003 QTLP690C
R1 N008 0 21K
L1 N003 N005 10 Rpar=5K
D2 N005 N001 1N5817
C2 N001 N003 .1
V3 N001 0 33
C1 N007 0 5n Rser=4.7K
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 1m startup
.lib LT3476.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2704 2260
WIRE 2176 992 1792 992
WIRE 1792 1088 1792 992
WIRE 1792 1088 1360 1088
WIRE 1808 1088 1792 1088
WIRE 1904 1088 1888 1088
WIRE 1952 1088 1904 1088
WIRE 2064 1088 2016 1088
WIRE 2096 1088 2064 1088
WIRE 2176 1088 2176 992
WIRE 2176 1088 2160 1088
WIRE 1360 1104 1360 1088
WIRE 1568 1120 1472 1120
WIRE 1664 1120 1568 1120
WIRE 1664 1136 1664 1120
WIRE 1792 1136 1792 1088
WIRE 2064 1136 2064 1088
WIRE 1472 1152 1472 1120
WIRE 2176 1152 2176 1088
WIRE 1360 1200 1360 1184
WIRE 1568 1200 1568 1120
WIRE 1584 1200 1568 1200
WIRE 1904 1200 1904 1088
WIRE 1904 1200 1872 1200
WIRE 1472 1248 1472 1232
WIRE 1568 1280 1568 1200
WIRE 1584 1280 1568 1280
WIRE 2064 1280 2064 1216
WIRE 2064 1280 1872 1280
WIRE 2176 1280 2176 1216
WIRE 2176 1280 2064 1280
WIRE 1584 1360 1568 1360
WIRE 1936 1360 1872 1360
WIRE 1568 1440 1568 1360
WIRE 1584 1440 1568 1440
WIRE 1888 1440 1872 1440
WIRE 2000 1440 1968 1440
WIRE 1728 1504 1728 1488
SYMBOL res 1792 1104 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value .1
SYMBOL PowerProducts\\LT3476 1728 1312 R0
SYMATTR InstName U1
SYMBOL LED 1952 1104 R270
WINDOW 0 72 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value QTLP690C
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 2160 1072 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL voltage 1360 1088 R0
SYMATTR InstName V3
SYMATTR Value 33
SYMBOL VOLTAGE 1472 1136 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL schottky 2160 1216 M180
WINDOW 0 24 72 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL cap 1936 1376 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 5n Rser=4.7K
SYMBOL ind 2048 1120 R0
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rpar=5K
SYMBOL res 1872 1424 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 21K
FLAG 1728 1504 0
FLAG 1472 1248 0
FLAG 2000 1360 0
FLAG 1360 1200 0
FLAG 2000 1440 0
TEXT 1984 1504 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\01207f4d9a13_6432085221-PB1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP727.asy)
XU1 N002 N001 VCC 0 N001 OP727 ;pnba In+)In-)V+)V-)OUT
V1 N002 0 SINE(1.65 1.65 100KHz)
R1 N001 0 1k
V2 VCC 0 5v
.tran 1ms
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 48 -48 48
WIRE 48 96 48 -16
WIRE -48 112 -48 48
WIRE 16 112 -48 112
WIRE 176 128 176 48
WIRE 176 128 80 128
WIRE 16 144 -304 144
WIRE 176 160 176 128
WIRE 48 240 48 160
WIRE -304 288 -304 224
WIRE 176 288 176 240
SYMBOL voltage -304 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5v
SYMBOL voltage -304 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(1.65 1.65 100KHz)
SYMBOL Opamps\\OP727 48 64 R0
SYMATTR InstName U1
SYMBOL res 160 144 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 176 288 0
FLAG -304 288 0
FLAG 48 240 0
FLAG 48 -16 VCC
FLAG -304 -48 VCC
FLAG -304 32 0
TEXT -336 312 Left 2 !.tran 1ms
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3604.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3604.asy)
C2 OUT N004 22p
L1 N003 OUT 1
C1 N002 N003 .1
R2 N004 0 40K
Rload OUT 0 1.32
R1 OUT N004 180K
XU1 N001 NC_01 N003 MP_02 MP_03 N002 N001 OUT 0 N001 N004 N001 NC_04 IN IN MP_05 0 LTC3604 ;pnba Mode/SYNC)Pgood)SW)))Boost)IntVcc)Von)SGND)Rt)FB)Ith)Track)Run)Vin))PGND
C3 OUT 0 47
C4 N001 0 2.2
V1 IN 0 12
.tran .5m startup
.lib LTC3604.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 680
WIRE 480 -80 96 -80
WIRE 80 -64 -16 -64
WIRE 208 -64 80 -64
WIRE 608 -64 304 -64
WIRE -16 -48 -16 -64
WIRE 208 -48 208 -64
WIRE 304 -48 304 -64
WIRE 480 0 480 -80
WIRE 480 0 400 0
WIRE 496 0 480 0
WIRE 576 0 560 0
WIRE -16 48 -16 32
WIRE 80 112 80 -64
WIRE 112 112 80 112
WIRE 432 112 400 112
WIRE 432 144 432 112
WIRE 96 224 96 -80
WIRE 112 224 96 224
WIRE 432 224 432 208
WIRE 432 224 400 224
WIRE 496 224 432 224
WIRE 608 224 608 -64
WIRE 608 224 576 224
WIRE 720 224 608 224
WIRE 800 224 720 224
WIRE 880 224 800 224
WIRE 608 240 608 224
WIRE 800 240 800 224
WIRE 880 240 880 224
WIRE 720 256 720 224
WIRE 96 336 96 224
WIRE 112 336 96 336
WIRE 608 336 608 320
WIRE 608 336 400 336
WIRE 720 336 720 320
WIRE 720 336 608 336
WIRE 800 336 800 304
WIRE 880 336 880 320
WIRE 608 352 608 336
WIRE 480 448 480 0
WIRE 480 448 400 448
WIRE 608 448 608 432
WIRE 208 512 208 496
WIRE 304 512 304 496
SYMBOL cap 416 144 R0
SYMATTR InstName C1
SYMATTR Value .1
SYMBOL cap 496 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C4
SYMATTR Value 2.2
SYMBOL res 592 336 R0
SYMATTR InstName R2
SYMATTR Value 40K
SYMBOL PowerProducts\\LTC3604 256 224 R0
SYMATTR InstName U1
SYMBOL voltage -16 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 592 224 R0
SYMATTR InstName R1
SYMATTR Value 180K
SYMBOL cap 704 256 R0
SYMATTR InstName C2
SYMATTR Value 22p
SYMBOL ind 480 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMBOL cap 784 240 R0
SYMATTR InstName C3
SYMATTR Value 47
SYMBOL res 864 224 R0
SYMATTR InstName Rload
SYMATTR Value 1.32
FLAG 208 512 0
FLAG 304 512 0
FLAG 608 448 0
FLAG 880 336 0
FLAG 800 336 0
FLAG -16 48 0
FLAG -16 -64 IN
FLAG 880 224 OUT
FLAG 576 0 0
TEXT 752 432 Left 2 !.tran .5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP5301-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP5301-2.asy)
R1 OUT N001 1Meg
C1 OUT 0 10
XU1 IN IN 0 0 OUT N001 0 0 N002 ADP5301 OVO=0 OD=1 ;pnba EN)PVin)Sync/Mode)VID)FB)VoutOK)Pgnd)Agnd)SW
L1 N002 OUT 2.2 Rser=80m
Rload OUT 0 80
V1 IN 0 5
.tran .6m startup
.lib ADP5301.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 144 64 64 64
WIRE 160 64 144 64
WIRE 496 64 416 64
WIRE 608 64 576 64
WIRE 64 80 64 64
WIRE 144 144 144 64
WIRE 160 144 144 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 608 144 608 64
WIRE 608 144 560 144
WIRE 688 144 608 144
WIRE 608 160 608 144
WIRE 688 160 688 144
WIRE 64 176 64 160
WIRE 160 224 144 224
WIRE 560 224 560 144
WIRE 560 224 416 224
WIRE 608 256 608 224
WIRE 688 256 688 240
WIRE 160 304 144 304
WIRE 432 304 416 304
WIRE 288 384 288 368
SYMBOL ADP5301-2 288 192 R0
SYMATTR InstName U1
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL res 672 144 R0
SYMATTR Value 80
SYMATTR InstName Rload
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=80m
SYMBOL cap 592 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL voltage 64 64 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 608 256 0
FLAG 432 304 0
FLAG 64 176 0
FLAG 688 144 OUT
FLAG 688 256 0
FLAG 64 64 IN
FLAG 288 384 0
FLAG 144 304 0
FLAG 144 224 0
TEXT 440 384 Left 2 !.tran .6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3280a733120d_Draft3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP482.asy)
R1 N001 N002 2k
XU1 N003 N001 N002 0 output OP482 ;pnba In+)In-)V+)V-)OUT
V1 N002 0 9v
V2 N003 0 AC 1 0
R2 0 N001 1k
.ac dec 10 20 20000
.lib OP482.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE -16 0 -64 0
WIRE -16 16 -16 0
WIRE -64 48 -64 0
WIRE 96 64 -16 64
WIRE 96 144 32 144
WIRE 368 144 96 144
WIRE 32 160 32 144
WIRE -64 176 -64 128
WIRE -16 176 -16 64
WIRE -16 176 -64 176
WIRE 0 176 -16 176
WIRE 144 192 64 192
WIRE 0 208 -320 208
IOPIN 144 192 Out
SYMBOL res -80 32 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage -320 192 R0
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value ""
SYMATTR Value2 AC 1 0
SYMBOL voltage 368 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 9v
SYMBOL res 80 48 R0
SYMATTR InstName R1
SYMATTR Value 2k
SYMBOL OpAmps\\OP482 32 128 R0
SYMATTR InstName U1
FLAG -320 288 0
FLAG 32 224 0
FLAG 368 224 0
FLAG -16 16 0
FLAG 144 192 output
TEXT -264 304 Left 2 !.ac dec 10 20 20000
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7172-4.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7172-4.2.asy)
V1 IN 0 4.5
Rload OUT 0 3.5
XU1 IN OUT IN N001 OUT 0 ADM7172-4.2 ;pnba Vin)Sense)EN)SS)Vout)GND
C2 0 N001 1n
C1 OUT 0 4.7 Rser=1.5m
.tran 5m startup
.lib ADM7172-4.2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 3.5
SYMBOL ADM7172-4.2 224 128 R0
SYMATTR InstName U1
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 4.5
SYMBOL cap 16 208 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1577-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1577-3.3.asy)
I1 N004 0 PULSE(.2 5 300u 100n 100n 300u 600u) load
V2 N002 0 12
R1 N005 N006 7.5K
MQ1 N001 N003 N004 N004 IRFZ24
C1 N004 0 24
C2 N005 0 10p
C3 N006 0 1000p
V1 N001 0 5
XU1 0 N002 0 N004 N005 N003 N001 N001 LT1575-3.3 ;pnba SHDN)Vin)GND)OUT)Comp)Gate)Ineg)Ipos
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1m
.lib LT1575.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4232 1996
WIRE 2352 -32 2336 -32
WIRE 2688 -32 2640 -32
WIRE 2928 -32 2688 -32
WIRE 3056 -32 2928 -32
WIRE 3056 -16 3056 -32
WIRE 2352 64 2208 64
WIRE 2688 64 2688 -32
WIRE 2688 64 2640 64
WIRE 2208 80 2208 64
WIRE 2928 80 2928 -32
WIRE 3056 80 3056 64
WIRE 2352 160 2336 160
WIRE 2880 160 2640 160
WIRE 2208 176 2208 160
WIRE 2352 256 2336 256
WIRE 2672 256 2640 256
WIRE 2720 256 2672 256
WIRE 2832 256 2800 256
WIRE 2672 272 2672 256
WIRE 2832 272 2832 256
WIRE 2672 352 2672 336
WIRE 2832 352 2832 336
WIRE 2336 384 2336 256
WIRE 2928 384 2928 176
WIRE 2928 384 2336 384
WIRE 3056 384 2928 384
WIRE 2928 400 2928 384
WIRE 3056 400 3056 384
WIRE 2928 496 2928 464
WIRE 3056 496 3056 480
SYMBOL cap 2816 272 R0
SYMATTR InstName C3
SYMATTR Value 1000p
SYMBOL voltage 3056 -32 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL nmos 2880 80 R0
SYMATTR InstName Q1
SYMATTR Value IRFZ24
SYMBOL voltage 2208 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
SYMBOL res 2704 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 7.5K
SYMBOL current 3056 400 R0
WINDOW 123 0 0 Left 2
WINDOW 39 36 40 Left 2
SYMATTR SpiceLine load
SYMATTR InstName I1
SYMATTR Value PULSE(.2 5 300u 100n 100n 300u 600u)
SYMBOL cap 2912 400 R0
SYMATTR InstName C1
SYMATTR Value 24
SYMBOL cap 2656 272 R0
SYMATTR InstName C2
SYMATTR Value 10p
SYMBOL LT1577-3.3 2496 112 R0
SYMATTR InstName U1
FLAG 2928 496 0
FLAG 3056 496 0
FLAG 3056 80 0
FLAG 2336 -32 0
FLAG 2208 176 0
FLAG 2336 160 0
FLAG 2832 352 0
FLAG 2672 352 0
TEXT 3312 544 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1334.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 1 input\nOnly one channel modeled\nRon modeled at 15V\nCrosstalk at -90 dB at 1MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1334.asy)
V2 -V 0 -15
XU1 IN SA D SB -V 0 +V ADG1334 ;pnba IN)SA)D)SB)Vss)GND)Vdd
V1 +V 0 15
V6 SB 0 0
V4 IN 0 PULSE(0 5 0 20n 20n 10u 20u)
C1 D 0 35p
V5 SA 0 12
R1 D 0 300
.tran 120u
.lib ADG1334.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2844 1336
WIRE -800 -320 -800 -336
WIRE -1040 -256 -1056 -256
WIRE -928 -256 -960 -256
WIRE -896 -256 -928 -256
WIRE -672 -224 -704 -224
WIRE -640 -224 -672 -224
WIRE -544 -224 -640 -224
WIRE -1456 -192 -1456 -208
WIRE -1344 -192 -1344 -208
WIRE -1152 -192 -1184 -192
WIRE -928 -192 -1072 -192
WIRE -896 -192 -928 -192
WIRE -640 -192 -640 -224
WIRE -544 -192 -544 -224
WIRE -928 -128 -992 -128
WIRE -896 -128 -928 -128
WIRE -1456 -96 -1456 -112
WIRE -1344 -96 -1344 -112
WIRE -640 -96 -640 -112
WIRE -544 -96 -544 -128
WIRE -992 -80 -992 -128
WIRE -864 0 -864 -16
WIRE -736 0 -736 -16
WIRE -992 32 -992 0
SYMBOL voltage -992 -96 M0
WINDOW 123 24 138 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value PULSE(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V4
SYMBOL voltage -1344 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res -656 -208 R0
SYMATTR InstName R1
SYMATTR Value 300
SYMBOL voltage -944 -256 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 12
SYMBOL voltage -1456 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -1056 -192 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V6
SYMATTR Value 0
SYMBOL Switches\\ADG1334 -800 -176 R0
SYMATTR InstName U1
SYMBOL cap -560 -192 R0
SYMATTR InstName C1
SYMATTR Value 35p
FLAG -1456 -96 0
FLAG -1344 -96 0
FLAG -1344 -208 +V
FLAG -1456 -208 -V
FLAG -992 32 0
FLAG -1056 -256 0
FLAG -1184 -192 0
FLAG -800 -336 +V
FLAG -736 0 0
FLAG -864 0 -V
FLAG -640 -96 0
FLAG -544 -96 0
FLAG -928 -256 SA
FLAG -928 -192 SB
FLAG -928 -128 IN
FLAG -672 -224 D
TEXT -616 16 Left 2 !.tran 120u
TEXT -1448 -464 Left 2 ;Note:\nSwitch shown for a logic 1 input\nOnly one channel modeled\nRon modeled at 15V\nCrosstalk at -90 dB at 1MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6994-1.asc
* Generated by LTspice 26.0.1 for Windows.
* LTC6994-1 10ms Delay Interval Generator\nOutput Low When IN is Low\nRising Edge On IN Starts Delay to Output Rising Edge\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6994-1.asy)
R1 N003 0 121K
R4 OUT 0 100K
R3 N004 0 392K
V1 N002 0 5
XU1 N001 0 N003 N004 N002 OUT LTC6994-1 ;pnba IN)GND)SET)DIV)V+)OUT
V2 N001 0 PULSE(3.3 0 0.25m 1n 1n 0.5m 25m 3)
R2 N002 N004 1000K
.tran 100m startup
.lib LTC6994-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE -224 96 -240 96
WIRE 96 96 -144 96
WIRE 624 96 320 96
WIRE 624 112 624 96
WIRE 96 176 64 176
WIRE 400 176 320 176
WIRE 528 176 400 176
WIRE 400 192 400 176
WIRE 528 192 528 176
WIRE 624 208 624 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 352 256 320 256
WIRE 352 288 352 256
WIRE 400 288 400 272
WIRE 400 288 352 288
WIRE 528 288 528 272
WIRE 400 304 400 288
WIRE 400 400 400 384
SYMBOL voltage 528 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 384 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL SpecialFunctions\\LTC6994-1 208 176 R0
SYMATTR InstName U1
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 121K
SYMBOL res 384 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
SYMBOL res 608 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL voltage -128 96 R90
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 3 32 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(3.3 0 0.25m 1n 1n 0.5m 25m 3)
SYMATTR InstName V2
FLAG -240 96 0
FLAG 528 288 0
FLAG 624 96 OUT
FLAG 624 208 0
FLAG 400 400 0
FLAG -16 256 0
FLAG 64 176 0
TEXT 528 368 Left 2 !.tran 100m startup
TEXT 216 56 Bottom 2 ;LTC6994-1 10ms Delay Interval Generator\nOutput Low When IN is Low\nRising Edge On IN Starts Delay to Output Rising Edge\nStartup Modeled