Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC7050-1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC7050-1.asy)
V5 N010 0 1
C1 N002 0 200
R2 N009 N010 100
V2 N003 0 5
Rload2 N008 0 100m
R1 N004 N005 100
Rload1 N002 0 100m
XU1 N003 N006 N003 0 MP_01 MP_02 N011 N003 N003 IN N001 0 N004 NC_03 NC_04 N009 N007 LTC7050-1 RTon=8m RBon=1.5m OV=18 ;pnba Vcc)PWM1)Run1)SGND)))PWM2)Run2)PVcc)Vin)SW1)PGND)Isns1)Fltb1)Fltb2)Isns2)SW2
V4 N011 0 PULSE(0 5 0 1n 1n 100n 1u)
V3 N006 0 PULSE(0 5 0 1n 1n 100n 1u)
V6 N005 0 1
V1 IN 0 12
C2 N008 0 200
L1 N001 N002 0.1
L2 N007 N008 0.1
.tran 300u
.lib LTC7050-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 920 728
WIRE 192 -16 -32 -16
WIRE 560 -16 480 -16
WIRE 720 -16 640 -16
WIRE 816 -16 720 -16
WIRE -32 0 -32 -16
WIRE 720 0 720 -16
WIRE 816 0 816 -16
WIRE 160 80 48 80
WIRE 192 80 160 80
WIRE 512 80 480 80
WIRE 624 80 592 80
WIRE -32 96 -32 80
WIRE 48 96 48 80
WIRE 624 96 624 80
WIRE 720 96 720 64
WIRE 816 96 816 80
WIRE 160 176 160 80
WIRE 192 176 160 176
WIRE 48 192 48 176
WIRE 624 192 624 176
WIRE 192 272 -224 272
WIRE 560 272 480 272
WIRE 720 272 640 272
WIRE 816 272 720 272
WIRE -224 288 -224 272
WIRE 720 288 720 272
WIRE 816 288 816 272
WIRE 160 368 160 176
WIRE 192 368 160 368
WIRE 512 368 480 368
WIRE 624 368 592 368
WIRE -224 384 -224 368
WIRE 624 384 624 368
WIRE 720 384 720 352
WIRE 816 384 816 368
WIRE 192 464 -224 464
WIRE -224 480 -224 464
WIRE 624 480 624 464
WIRE 160 560 160 368
WIRE 192 560 160 560
WIRE 512 560 480 560
WIRE -224 576 -224 560
WIRE 336 640 336 608
SYMBOL ind 544 288 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L2
SYMATTR Value 0.1
SYMBOL cap 704 0 R0
WINDOW 0 33 14 Left 2
SYMATTR InstName C1
SYMATTR Value 200
SYMBOL cap 704 288 R0
WINDOW 0 33 12 Left 2
SYMATTR InstName C2
SYMATTR Value 200
SYMBOL voltage -224 272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 1n 1n 100n 1u)
SYMBOL voltage -224 464 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value PULSE(0 5 0 1n 1n 100n 1u)
SYMBOL voltage -32 -16 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 800 -16 R0
SYMATTR InstName Rload1
SYMATTR Value 100m
SYMBOL res 496 384 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL LTC7050-1 336 272 R0
SYMATTR InstName U1
SYMBOL voltage 624 80 R0
SYMATTR InstName V6
SYMATTR Value 1
SYMBOL ind 544 0 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 0.1
SYMBOL voltage 624 368 R0
SYMATTR InstName V5
SYMATTR Value 1
SYMBOL res 800 272 R0
SYMATTR InstName Rload2
SYMATTR Value 100m
SYMBOL res 496 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL voltage 48 80 R0
SYMATTR InstName V2
SYMATTR Value 5
FLAG -32 96 0
FLAG 48 192 0
FLAG -224 384 0
FLAG 624 480 0
FLAG 512 560 0
FLAG 336 640 0
FLAG 624 192 0
FLAG 720 96 0
FLAG 720 384 0
FLAG 816 96 0
FLAG 816 384 0
FLAG -224 576 0
FLAG -32 -16 IN
TEXT 704 568 Left 2 !.tran 300u
* Z:\home\khalils\Downloads\files\data\raw_asc\12a60b300000_scheme2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N002 0 SINE(0 100 {f} 0)
V2 0 N005 SINE(0 100 {f} 0)
RH 0 N004 10
VG1 N001 N003 PULSE(0 5 {delay} 0 0 {width} {T})
VG2 N006 N003 PULSE(0 5 {delay+T/2} 0 0 {width} {T})
L1 N003 N004 20m
XVS1 N002 N001 N003 EC103D2 ;pnba A)G)K
XVS2 N005 N006 N003 EC103D2 ;pnba A)G)K
.inc "C:\Users\alexe\study\electronic-devices-labs\lib\Thyristor_SCR.lib"
.param f=50 T=1/f
.param delay=alpha*T/360
.param width=50u
.param alpha=150
.tran 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1252 680
WIRE -80 -288 -224 -288
WIRE -80 -272 -80 -288
WIRE -224 -144 -224 -288
WIRE -288 -96 -432 -96
WIRE -80 -96 -80 -192
WIRE -80 -96 -224 -96
WIRE 224 -96 -80 -96
WIRE -432 80 -432 -96
WIRE -432 208 -432 160
WIRE -432 208 -512 208
WIRE -336 208 -432 208
WIRE -224 208 -256 208
WIRE -80 208 -80 -96
WIRE -80 208 -144 208
WIRE 224 208 224 -96
WIRE -432 224 -432 208
WIRE -432 320 -432 304
WIRE -176 320 -432 320
WIRE -80 320 -80 208
WIRE -80 320 -112 320
WIRE 224 368 224 288
WIRE 224 368 -112 368
SYMBOL voltage -432 64 M0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 100 {f} 0)
SYMBOL voltage 224 304 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName G2
SYMATTR Value PULSE(0 5 {delay+T/2} 0 0 {width} {T})
SYMBOL Misc\\SCR -176 336 R270
SYMATTR InstName VS2
SYMATTR Value EC103D2
SYMBOL res -352 192 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RH
SYMATTR Value 10
SYMBOL voltage -432 208 M0
SYMATTR InstName V2
SYMATTR Value SINE(0 100 {f} 0)
SYMBOL Misc\\SCR -288 -112 M90
SYMATTR InstName VS1
SYMATTR Value EC103D2
SYMBOL voltage -80 -288 R0
SYMATTR InstName G1
SYMATTR Value PULSE(0 5 {delay} 0 0 {width} {T})
SYMBOL ind -128 192 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value 20m
FLAG -512 208 0
TEXT 320 88 Left 2 !.inc "C:\\Users\\alexe\\study\\electronic-devices-labs\\lib\\Thyristor_SCR.lib"
TEXT 320 112 Left 2 !.param f=50 T=1/f
TEXT 320 136 Left 2 !.param delay=alpha*T/360
TEXT 320 160 Left 2 !.param width=50u
TEXT 320 184 Left 2 !.param alpha=150
TEXT 320 208 Left 2 !.tran 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7172.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7172.asy)
R1 OUT N002 15K
C2 0 N001 1n
V1 IN 0 3.5
Rload OUT 0 2.5
XU1 IN N002 IN N001 OUT 0 ADM7172 ;pnba Vin)Sense)EN)SS)Vout)GND
C1 OUT 0 4.7 Rser=1.5m
R2 N002 0 10K
.tran 5m startup
.lib ADM7172.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 400 32 352 32
WIRE 528 32 400 32
WIRE 624 32 528 32
WIRE -32 48 -32 32
WIRE 528 48 528 32
WIRE 624 48 624 32
WIRE 400 80 400 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 528 144 528 112
WIRE 624 144 624 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 400 224 400 160
WIRE 400 224 352 224
WIRE 400 240 400 224
WIRE 224 304 224 288
WIRE 400 336 400 320
SYMBOL cap 16 208 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL res 608 32 R0
SYMATTR InstName Rload
SYMATTR Value 2.5
SYMBOL res 384 224 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL cap 512 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 384 64 R0
SYMATTR InstName R1
SYMATTR Value 15K
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.5
SYMBOL ADM7172 224 128 R0
SYMATTR InstName U1
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 624 144 0
FLAG 528 144 0
FLAG -32 32 IN
FLAG 624 32 OUT
FLAG 400 336 0
TEXT 568 288 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4932.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4932.asy)
R1 OUT_DIFF 0 1k
XU1 NC_01 N001 N004 NC_02 N002 N005 OUT- OUT+ NC_03 N003 ADA4932 ;pnba FBN)VinP)VinN)FBP)VCC)VEE)VoN)VoP)PD)VOCM
RG2 N004 0 1k
RF1 OUT- N001 1k
Vin IN 0 PULSE(-50m 50m 20n 1n 1n 100n)
RG1 N001 IN 1k
VS- N005 0 -2.5
RL1 0 OUT- 499
RF2 OUT+ N004 1k
G1 0 OUT_DIFF OUT- OUT+ -1m
RL2 OUT+ 0 499
VS+ N002 0 2.5
Vocm N003 0 0
.tran 150n
.lib ADA4932.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 956 680
WIRE 224 -144 80 -144
WIRE 400 -144 304 -144
WIRE 160 -64 144 -64
WIRE 320 -64 240 -64
WIRE 320 -48 320 -64
WIRE 448 32 448 0
WIRE 224 48 176 48
WIRE 320 48 304 48
WIRE 320 64 320 48
WIRE 144 80 144 -64
WIRE 176 80 176 48
WIRE 720 96 624 96
WIRE -32 128 -320 128
WIRE 80 128 80 -144
WIRE 80 128 48 128
WIRE 112 128 80 128
WIRE 624 128 624 96
WIRE 720 128 720 96
WIRE -320 144 -320 128
WIRE 400 144 400 -144
WIRE 400 144 272 144
WIRE 448 144 448 112
WIRE 448 144 400 144
WIRE 528 144 448 144
WIRE 576 144 528 144
WIRE -32 192 -64 192
WIRE 80 192 48 192
WIRE 112 192 80 192
WIRE 400 208 272 208
WIRE 448 208 400 208
WIRE 528 208 448 208
WIRE 576 208 576 192
WIRE 576 208 528 208
WIRE -64 224 -64 192
WIRE 448 240 448 208
WIRE 624 240 624 208
WIRE 720 240 720 208
WIRE -320 256 -320 224
WIRE 144 352 144 272
WIRE 160 352 144 352
WIRE 304 352 240 352
WIRE 448 352 448 320
WIRE 304 368 304 352
WIRE 80 448 80 192
WIRE 224 448 80 448
WIRE 400 448 400 208
WIRE 400 448 304 448
SYMBOL res 432 16 R0
SYMATTR InstName RL1
SYMATTR Value 499
SYMBOL ADA4932 144 176 R0
SYMATTR InstName U1
SYMBOL voltage 144 -64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName VS+
SYMATTR Value 2.5
SYMBOL res 64 112 R90
WINDOW 0 -26 54 VBottom 2
WINDOW 3 -28 55 VTop 2
SYMATTR InstName RG1
SYMATTR Value 1k
SYMBOL voltage 144 352 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName VS-
SYMATTR Value -2.5
SYMBOL res 320 -160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 36 57 VTop 2
SYMATTR InstName RF1
SYMATTR Value 1k
SYMBOL res 64 176 R90
WINDOW 0 65 57 VBottom 2
WINDOW 3 65 58 VTop 2
SYMATTR InstName RG2
SYMATTR Value 1k
SYMBOL res 704 112 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL g 624 112 R0
SYMATTR InstName G1
SYMATTR Value -1m
SYMBOL res 320 432 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName RF2
SYMATTR Value 1k
SYMBOL voltage 208 48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName Vocm
SYMATTR Value 0
SYMBOL voltage -320 128 R0
WINDOW 0 76 31 Right 2
WINDOW 3 -124 -42 Left 2
WINDOW 123 90 88 Right 2
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(-50m 50m 20n 1n 1n 100n)
SYMBOL res 432 224 R0
SYMATTR InstName RL2
SYMATTR Value 499
FLAG 448 352 0
FLAG 720 96 OUT_DIFF
FLAG 320 64 0
FLAG 320 -48 0
FLAG 304 368 0
FLAG 448 0 0
FLAG -64 224 0
FLAG -320 128 IN
FLAG -320 256 0
FLAG 528 144 OUT-
FLAG 528 208 OUT+
FLAG 624 240 0
FLAG 720 240 0
TEXT 520 416 Left 2 !.tran 150n
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP162-1.2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP162-1.2.asy)
C1 OUT 0 1
V1 IN 0 5
XU1 IN 0 N001 OUT ADP16xf K=833.3u ;pnba Vin)GND)En)Vout
Rload OUT 0 120
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -64 96
WIRE 416 96 352 96
WIRE 512 96 416 96
WIRE -64 112 -64 96
WIRE 416 112 416 96
WIRE 512 112 512 96
WIRE -64 208 -64 192
WIRE 160 208 16 208
WIRE 416 208 416 176
WIRE 512 208 512 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL res 496 96 R0
SYMATTR InstName Rload
SYMATTR Value 120
SYMBOL voltage -64 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL ADP162-1.2 256 208 R0
SYMATTR InstName U1
SYMBOL cap 400 112 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG -64 208 0
FLAG 256 272 0
FLAG 416 208 0
FLAG 512 208 0
FLAG 512 96 OUT
FLAG -64 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\1169675232a1_WaveOut.asc
* Generated by LTspice 26.0.1 for Windows.
V3 B 0 SIN(0 1 455)
V2 A 0 SINE(0 .4 20 10m)
V4 C 0 PWL( Repeat for 2 Repeat for 2 0 0 10m 0 11m 1 440m 1 480m 0 700m 0 endrepeat 2.5 0 endrepeat)
B1 SYN 0 V=2.5*V(a)*V(b)*V(c)
.tran 3.7
.wave .\ring.wav 8 11025 V(syn) ; This means save node V(syn) as a .wav file, 8 bit resolution, 11025 samples per second
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2868 848
WIRE 1008 560 1008 512
WIRE 1360 560 1360 512
WIRE 1664 560 1664 512
WIRE 2144 560 2144 512
WIRE 1008 688 1008 640
WIRE 1360 688 1360 640
WIRE 1664 688 1664 640
WIRE 2144 688 2144 640
SYMBOL voltage 1664 544 R0
WINDOW 3 42 55 Left 0
WINDOW 40 43 145 Left 0
WINDOW 39 38 117 Left 0
WINDOW 123 42 87 Left 0
SYMATTR Value PWL( Repeat for 2 Repeat for 2
SYMATTR SpiceLine2 2.5 0 endrepeat)
SYMATTR SpiceLine 480m 0 700m 0 endrepeat
SYMATTR Value2 0 0 10m 0 11m 1 440m 1
SYMATTR InstName V4
SYMBOL BV 2144 544 R0
SYMATTR InstName B1
SYMATTR Value V=2.5*V(a)*V(b)*V(c)
SYMBOL voltage 1360 544 R0
SYMATTR InstName V3
SYMATTR Value SIN(0 1 455)
SYMBOL VOLTAGE 1008 544 R0
WINDOW 39 0 0 Left 0
WINDOW 123 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value SINE(0 .4 20 10m)
FLAG 1008 688 0
FLAG 1360 688 0
FLAG 1008 512 A
FLAG 1360 512 B
FLAG 2144 688 0
FLAG 1664 688 0
FLAG 1664 512 C
FLAG 2144 512 SYN
TEXT 992 744 Left 0 !.tran 3.7
TEXT 960 784 Left 0 !.wave .\\ring.wav 8 11025 V(syn) ; This means save node V(syn) as a .wav file, 8 bit resolution, 11025 samples per second
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4601HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4601HV.asy)
C2 OUT 0 100
V1 IN 0 6
Rload OUT 0 .25
R1 N004 0 40.2K
R4 IN N003 100K
R3 IN N002 100K
C1 OUT N004 100p
R2 N008 0 392K
C3 N011 0 .001
XU1 IN 0 OUT 0 N006 N006 OUT 0 N002 N004 N007 N012 N010 N009 N008 N005 N003 N011 N001 N007 LTM4601 ;pnba Vin)PGND)Vout)Vosns-)Vout_LCL)DiffVout)Vosns+)SGND)Pgood)FB)DRVcc)MARG1)MARG0)Fset)MPGM)Comp)Run)Track/SS)PLLIN)INTVcc
.tran 750u startup
.lib LTM4601.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1032 680
WIRE -160 -16 -256 -16
WIRE 128 -16 -160 -16
WIRE -256 0 -256 -16
WIRE 128 0 128 -16
WIRE 272 0 272 -16
WIRE -160 48 -160 -16
WIRE -144 48 -160 48
WIRE 16 48 -64 48
WIRE 432 48 400 48
WIRE 576 48 432 48
WIRE 656 48 576 48
WIRE 576 64 576 48
WIRE -256 96 -256 80
WIRE -160 112 -160 48
WIRE -80 112 -160 112
WIRE 16 112 0 112
WIRE 432 112 400 112
WIRE 480 112 432 112
WIRE 480 128 480 112
WIRE 576 144 576 128
WIRE 16 176 0 176
WIRE 432 176 400 176
WIRE 480 224 480 208
WIRE 16 240 0 240
WIRE 432 240 432 176
WIRE 432 240 400 240
WIRE 656 272 656 48
WIRE 656 272 576 272
WIRE 720 272 656 272
WIRE 720 288 720 272
WIRE 0 304 0 240
WIRE 16 304 0 304
WIRE 576 304 576 272
WIRE 576 304 400 304
WIRE -80 368 -96 368
WIRE 16 368 0 368
WIRE 576 368 400 368
WIRE 576 384 576 368
WIRE 720 384 720 368
WIRE 720 384 576 384
WIRE 720 400 720 384
WIRE 16 432 0 432
WIRE 416 432 400 432
WIRE -64 496 -80 496
WIRE 16 496 0 496
WIRE 416 496 400 496
WIRE 128 576 128 560
WIRE 288 576 288 560
SYMBOL res -160 64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL res 16 384 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 392K
SYMBOL cap 0 480 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value .001
SYMBOL res 464 112 R0
SYMATTR InstName R1
SYMATTR Value 40.2K
SYMBOL PowerProducts\\LTM4601HV 208 256 R0
SYMATTR InstName U1
SYMBOL res 704 272 R0
SYMATTR InstName Rload
SYMATTR Value .25
SYMBOL cap 560 64 R0
SYMATTR InstName C2
SYMATTR Value 100
SYMBOL res -96 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL cap 416 48 R0
WINDOW 0 34 18 Left 2
WINDOW 3 35 47 Left 2
SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL voltage -256 -16 R0
SYMATTR InstName V1
SYMATTR Value 6
FLAG 128 576 0
FLAG 288 576 0
FLAG 480 224 0
FLAG -96 368 0
FLAG 576 144 0
FLAG 720 400 0
FLAG -256 96 0
FLAG -80 496 0
FLAG 720 272 OUT
FLAG -256 -16 IN
TEXT 472 496 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ac6f1abfd05c_1077A.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 3
R1 OUT N001 2Meg
R2 N001 IN 1Meg
V3 IN 0 SINE(0 1 100)
R3 N002 0 1Meg
XU1 N002 N001 +V 0 OUT LT1078 ;pnba In+)In-)V+)V-)OUT
.tran .1
* Half-Wave Rectifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1077A.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -96 96 -128 96
WIRE 16 96 -16 96
WIRE 48 96 16 96
WIRE 144 96 128 96
WIRE 160 96 144 96
WIRE 256 96 240 96
WIRE 192 208 192 192
WIRE 144 224 144 96
WIRE 160 224 144 224
WIRE -96 240 -96 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 288 240 256 240
WIRE 64 256 48 256
WIRE 160 256 144 256
WIRE 192 288 192 272
WIRE -96 336 -96 320
FLAG -96 336 0
FLAG 192 192 +V
FLAG -96 224 +V
FLAG -128 96 0
FLAG 48 256 0
FLAG 192 288 0
FLAG 16 96 IN
FLAG 288 240 OUT
SYMBOL voltage -96 224 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2Meg
SYMBOL res 144 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL voltage 0 96 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
SYMBOL res 160 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL opamps\\LT1077A 192 176 R0
SYMATTR InstName U1
TEXT 296 320 Left 2 !.tran .1
TEXT 152 32 Bottom 2 ;Half-Wave Rectifier
* Z:\home\khalils\Downloads\files\data\raw_asc\9075e953e276_STW9N150_test.asc
* Generated by LTspice 26.0.1 for Windows.
* Ctrl-right-mouse-click on the transistor\nto change the Prefix to X in the full dialog.
V2 N001 0 1000
R2 N002 N003 10
R1 N001 out 10k
V1 N002 0 0
XM1 out N003 0 STW9N150 ;pnba D)G)S
.dc V1 0 10 .01
.include STW9N150.lib
.options gmin=1e-10 abstol=1e-10 reltol=0.03
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 208 -80 -16 -80
WIRE -16 -32 -16 -80
WIRE 208 -32 208 -80
WIRE -16 80 -16 48
WIRE 208 80 208 48
WIRE 304 80 208 80
WIRE 208 96 208 80
WIRE 48 176 -16 176
WIRE 160 176 128 176
WIRE -16 208 -16 176
WIRE -16 320 -16 288
WIRE 208 320 208 192
WIRE 208 320 -16 320
WIRE -16 352 -16 320
SYMBOL res 192 -48 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL voltage -16 192 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL res 32 192 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R2
SYMATTR Value 10
SYMBOL voltage -16 -48 R0
SYMATTR InstName V2
SYMATTR Value 1000
SYMBOL nmos 160 96 R0
SYMATTR InstName M1
SYMATTR Value STW9N150
SYMATTR Prefix X
FLAG -16 352 0
FLAG -16 80 0
FLAG 304 80 out
TEXT -88 -144 Left 0 ;Ctrl-right-mouse-click on the transistor\nto change the Prefix to X in the full dialog.
TEXT -96 -240 Left 0 !.dc V1 0 10 .01
TEXT -96 -272 Left 0 !.include STW9N150.lib
TEXT -96 -208 Left 0 !.options gmin=1e-10 abstol=1e-10 reltol=0.03
* Z:\home\khalils\Downloads\files\data\raw_asc\ADuM4221-1C.asc
* Generated by LTspice 26.0.1 for Windows.
* GND1 is modeled as common GND
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADuM4221-1C.asy)
V4 N004 0 15
V3 N005 0 0
V1 Vin 0 PULSE(0 5 0 2n 2n 5u 10u)
R1 N006 0 10K
R3 Gate_B N007 5.11
R2 Gate_A N001 5.11
C1 Gate_A 0 2.2n
V2 N003 0 5
C2 Gate_B 0 2.2n
V5 N002 0 15
XU1 Vin N003 0 N005 N006 0 N007 N004 0 N001 N002 ADuM4221-1C ;pnba PWM)VDD1)GND1)DISABLE)DT)GNDB)VOB)VDDB)GNDA)VOA)VDDA
.tran 50u
.lib ADuM4221-1C.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 3080 680
WIRE -1824 -432 -2208 -432
WIRE -1728 -432 -1824 -432
WIRE -1136 -432 -1424 -432
WIRE -1008 -432 -1056 -432
WIRE -880 -432 -1008 -432
WIRE -832 -432 -880 -432
WIRE -1008 -400 -1008 -432
WIRE -2208 -384 -2208 -432
WIRE -1248 -368 -1424 -368
WIRE -1728 -352 -2096 -352
WIRE -1248 -352 -1248 -368
WIRE -1008 -320 -1008 -336
WIRE -1392 -304 -1424 -304
WIRE -2096 -288 -2096 -352
WIRE -1728 -272 -1760 -272
WIRE -1248 -224 -1424 -224
WIRE -1248 -208 -1248 -224
WIRE -1728 -176 -1984 -176
WIRE -1392 -160 -1424 -160
WIRE -1728 -112 -1872 -112
WIRE -1136 -96 -1424 -96
WIRE -1008 -96 -1056 -96
WIRE -880 -96 -1008 -96
WIRE -832 -96 -880 -96
WIRE -1984 -80 -1984 -176
WIRE -1872 -64 -1872 -112
WIRE -1008 -64 -1008 -96
WIRE -1008 32 -1008 0
WIRE -2208 128 -2208 -304
WIRE -2096 128 -2096 -208
WIRE -1984 128 -1984 0
WIRE -1872 128 -1872 16
SYMBOL voltage -1248 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 34 Left 2
WINDOW 3 45 64 Left 2
SYMATTR InstName V4
SYMATTR Value 15
SYMBOL cap -1024 -64 R0
SYMATTR InstName C2
SYMATTR Value 2.2n
SYMBOL ADuM4221-1C -1568 -336 R0
SYMATTR InstName U1
SYMBOL voltage -2208 -400 R0
WINDOW 0 26 98 Left 2
WINDOW 3 33 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 2n 2n 5u 10u)
SYMBOL res -1040 -448 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 5.11
SYMBOL voltage -1248 -368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 43 29 Left 2
WINDOW 3 46 61 Left 2
SYMATTR InstName V5
SYMATTR Value 15
SYMBOL res -1040 -112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 5.11
SYMBOL voltage -2096 -304 R0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res -1888 -80 R0
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage -1984 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 0
SYMBOL cap -1024 -400 R0
SYMATTR InstName C1
SYMATTR Value 2.2n
FLAG -1984 128 0
FLAG -1392 -160 0
FLAG -2208 128 0
FLAG -2096 128 0
FLAG -1824 -432 Vin
FLAG -1392 -304 0
FLAG -1760 -272 0
FLAG -1872 128 0
FLAG -1248 -128 0
FLAG -880 -96 Gate_B
FLAG -880 -432 Gate_A
FLAG -1008 32 0
FLAG -1008 -320 0
FLAG -1248 -272 0
TEXT -1728 8 Left 2 !.tran 50u
TEXT -1728 -16 Left 1 ;GND1 is modeled as common GND
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1044A.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1044A.asy)
V1 IN 0 5
C5 OUT 0 10
C1 0 N003 100p
C6 N002 N005 10
XU1 N001 N002 0 N005 OUT N004 N003 IN LTC1044A ;pnba Boost)Cap+)GND)Cap-)Vout)LV)OSC)Vin
Rload OUT 0 1K
.tran 100m startup
.lib LTC1044A.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3548 1764
WIRE 3008 1440 2976 1440
WIRE 3488 1440 3264 1440
WIRE 3488 1456 3488 1440
WIRE 3008 1504 2912 1504
WIRE 3312 1504 3264 1504
WIRE 3392 1504 3376 1504
WIRE 2912 1536 2912 1504
WIRE 3488 1552 3488 1536
WIRE 3008 1568 2976 1568
WIRE 3296 1568 3264 1568
WIRE 2912 1632 2912 1600
WIRE 3008 1632 2912 1632
WIRE 3328 1632 3264 1632
WIRE 3440 1632 3328 1632
WIRE 3328 1648 3328 1632
WIRE 3440 1648 3440 1632
WIRE 3328 1744 3328 1712
WIRE 3440 1744 3440 1728
SYMBOL cap 2896 1536 R0
SYMATTR InstName C6
SYMATTR Value 10
SYMBOL VOLTAGE 3488 1440 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 3424 1632 R0
SYMATTR InstName Rload
SYMATTR Value 1K
SYMBOL cap 3312 1648 R0
SYMATTR InstName C5
SYMATTR Value 10
SYMBOL PowerProducts\\LTC1044A 3136 1536 R0
SYMATTR InstName U1
SYMBOL cap 3376 1488 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 100p
FLAG 3488 1552 0
FLAG 2976 1568 0
FLAG 3328 1744 0
FLAG 3392 1504 0
FLAG 3440 1744 0
FLAG 3440 1632 OUT
FLAG 3488 1440 IN
TEXT 3056 1736 Left 2 !.tran 100m startup