Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\1a0160fa8df7_A03_-_Simulacao.asc
* Generated by LTspice 26.0.1 for Windows.
C1 N001 0 20m
D3 0 N003 D
K L1 L2 1
D1 N002 N001 D
V1 N004 0 SINE(0 311 60) Rser=1u
R1 N001 0 7.6
L2 N002 N003 3m
D2 N003 N001 D
L1 N004 0 1
D4 0 N002 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 30m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 0 256 0
WIRE 512 0 384 0
WIRE 656 0 512 0
WIRE 656 64 656 0
WIRE 512 80 512 0
WIRE 256 96 256 64
WIRE 256 96 0 96
WIRE 384 96 384 64
WIRE 384 96 304 96
WIRE 256 128 256 96
WIRE 384 128 384 96
WIRE -144 208 -320 208
WIRE 256 240 256 192
WIRE 384 240 384 192
WIRE 384 240 256 240
WIRE 512 240 512 160
WIRE 512 240 384 240
WIRE 656 240 656 128
WIRE 656 240 512 240
WIRE -320 256 -320 208
WIRE -144 256 -144 208
WIRE 0 256 0 96
WIRE 512 304 512 240
WIRE -320 384 -320 336
WIRE -192 384 -320 384
WIRE -144 384 -144 336
WIRE -144 384 -192 384
WIRE 0 384 0 336
WIRE 304 384 304 96
WIRE 304 384 0 384
WIRE -192 432 -192 384
SYMBOL cap 640 64 R0
SYMATTR InstName C1
SYMATTR Value 20m
SYMBOL ind2 -160 240 R0
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR Type ind
SYMBOL diode 272 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMBOL diode 272 64 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL diode 400 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMBOL diode 400 64 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMBOL ind2 -16 240 R0
SYMATTR InstName L2
SYMATTR Value 3m
SYMATTR Type ind
SYMBOL voltage -320 240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 311 60)
SYMATTR SpiceLine Rser=1u
SYMBOL res 496 64 R0
SYMATTR InstName R1
SYMATTR Value 7.6
FLAG -192 432 0
FLAG 512 304 0
TEXT -320 416 Left 2 !K L1 L2 1
TEXT -354 436 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1077A.asc
* Generated by LTspice 26.0.1 for Windows.
* Half-Wave Rectifier
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1077A.asy)
R2 N001 IN 1Meg
V1 +V 0 3
R3 N002 0 1Meg
R1 OUT N001 2Meg
V3 IN 0 SINE(0 1 100)
XU1 N002 N001 +V 0 OUT LT1078 ;pnba In+)In-)V+)V-)OUT
.tran .1
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -96 96 -128 96
WIRE 16 96 -16 96
WIRE 48 96 16 96
WIRE 144 96 128 96
WIRE 160 96 144 96
WIRE 256 96 240 96
WIRE 192 208 192 192
WIRE 144 224 144 96
WIRE 160 224 144 224
WIRE -96 240 -96 224
WIRE 256 240 256 96
WIRE 256 240 224 240
WIRE 288 240 256 240
WIRE 64 256 48 256
WIRE 160 256 144 256
WIRE 192 288 192 272
WIRE -96 336 -96 320
SYMBOL res 144 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2Meg
SYMBOL voltage 0 96 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName V3
SYMATTR Value SINE(0 1 100)
SYMBOL res 160 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 1Meg
SYMBOL opamps\\LT1077A 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -96 224 R0
SYMATTR InstName V1
SYMATTR Value 3
FLAG -96 336 0
FLAG 192 192 +V
FLAG -96 224 +V
FLAG -128 96 0
FLAG 48 256 0
FLAG 192 288 0
FLAG 16 96 IN
FLAG 288 240 OUT
TEXT 296 320 Left 2 !.tran .1
TEXT 152 32 Bottom 2 ;Half-Wave Rectifier
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4254.asc
* Generated by LTspice 26.0.1 for Windows.
* Gain of 8 Configuration
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4254.asy)
V4 VDDH 0 28
V6 N002 0 2.5
V1 N004 0 PULSE(-.5 .5 10u 100n 100n 40u 1)
V7 N005 0 5
V5 0 VSSH 28
XU1 0 N004 VDDH VSSH AVDD 0 N002 N001 N003 N005 N005 N005 0 0 0 ADA4254 ;pnba ))VDDH)VSSH)))))))))))
V2 AVDD 0 5
E1 Out 0 N003 N001 1
.tran 80u
.lib ADA4254.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1144
WIRE -656 128 -720 128
WIRE 0 144 0 96
WIRE -720 160 -720 128
WIRE -48 240 -80 240
WIRE 400 256 288 256
WIRE 560 256 448 256
WIRE 448 272 448 256
WIRE 400 288 400 256
WIRE -48 304 -560 304
WIRE 400 352 400 336
WIRE 400 352 288 352
WIRE -48 368 -432 368
WIRE -720 384 -720 368
WIRE -560 416 -560 304
WIRE 320 416 288 416
WIRE 320 432 320 416
WIRE -720 480 -720 464
WIRE -720 480 -800 480
WIRE -800 496 -800 480
WIRE -720 496 -720 480
WIRE -560 528 -560 496
WIRE 0 576 0 528
WIRE -720 592 -720 576
WIRE 80 592 80 528
WIRE 112 592 112 528
WIRE 112 592 80 592
WIRE 144 592 144 528
WIRE 144 592 112 592
WIRE 176 592 176 528
WIRE 208 592 208 528
WIRE 208 592 176 592
WIRE 240 592 240 528
WIRE 240 592 208 592
WIRE -432 624 -432 368
WIRE 208 640 208 592
WIRE 112 656 112 592
WIRE -432 752 -432 704
WIRE 112 768 112 736
SYMBOL voltage 112 640 R0
SYMATTR InstName V7
SYMATTR Value 5
SYMBOL voltage -560 400 R0
WINDOW 3 38 87 Left 2
WINDOW 123 52 126 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value 2.5
SYMATTR InstName V6
SYMBOL ADA4254 176 240 R0
SYMATTR InstName U1
SYMBOL voltage -720 368 R0
WINDOW 3 33 87 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value 28
SYMATTR InstName V4
SYMBOL voltage -720 480 R0
WINDOW 3 35 88 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value 28
SYMATTR InstName V5
SYMBOL voltage -720 144 R0
WINDOW 3 38 87 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value 5
SYMATTR InstName V2
SYMBOL voltage -432 608 R0
WINDOW 3 38 87 Left 2
WINDOW 123 24 44 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(-.5 .5 10u 100n 100n 40u 1)
SYMATTR InstName V1
SYMBOL e2 448 256 R0
SYMATTR InstName E1
SYMATTR Value 1
FLAG -720 240 0
FLAG -656 128 AVDD
FLAG -720 368 VDDH
FLAG -720 592 VSSH
FLAG 288 192 AVDD
FLAG 0 96 VDDH
FLAG 0 576 VSSH
FLAG 320 432 0
FLAG -800 496 0
FLAG 448 352 0
FLAG -560 528 0
FLAG -432 752 0
FLAG -80 240 0
FLAG 560 256 Out
FLAG 112 768 0
FLAG 208 640 0
TEXT 408 784 Left 2 !.tran 80u
TEXT -480 152 Left 2 ;Gain of 8 Configuration
* Z:\home\khalils\Downloads\files\data\raw_asc\0da94af41498_rlc_bandpass.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N004 0 1k
C2 VOUT TANK1 47n
L2 N002 N004 10m
R1 TANK1 VIN 50
L1 N001 N003 10m
V1 VIN 0 AC 1
C1 TANK1 N001 100n
R4 VOUT 0 1k
R2 N003 0 1k
C3 VOUT N002 100n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1096 1096
WIRE 100 420 164 420
WIRE 244 420 244 292
WIRE 244 292 292 292
WIRE 100 500 100 548
WIRE 292 356 292 420
WIRE 292 500 292 548
WIRE 292 628 292 676
WIRE 292 292 420 292
WIRE 484 292 548 292
WIRE 548 356 548 420
WIRE 548 500 548 548
WIRE 548 628 548 676
WIRE 548 292 676 292
WIRE 676 292 676 420
WIRE 676 500 676 548
SYMBOL res 532 532 R0
SYMATTR InstName R3
WINDOW 0 36 76 Left 1
SYMATTR Value 1k
WINDOW 3 36 40 Left 1
SYMBOL cap 484 276 R90
SYMATTR InstName C2
WINDOW 0 36 76 Left 1
SYMATTR Value 47n
WINDOW 3 36 40 Left 1
SYMBOL ind 276 404 R0
SYMATTR InstName L1
WINDOW 0 36 76 Left 1
SYMATTR Value 10m
WINDOW 3 36 40 Left 1
SYMBOL ind 532 404 R0
SYMATTR InstName L2
WINDOW 0 36 76 Left 1
SYMATTR Value 10m
WINDOW 3 36 40 Left 1
SYMBOL res 276 532 R0
SYMATTR InstName R2
WINDOW 0 36 76 Left 1
SYMATTR Value 1k
WINDOW 3 36 40 Left 1
SYMBOL cap 532 292 R0
SYMATTR InstName C3
WINDOW 0 36 76 Left 1
SYMATTR Value 100n
WINDOW 3 36 40 Left 1
SYMBOL res 660 404 R0
SYMATTR InstName R4
WINDOW 0 36 76 Left 1
SYMATTR Value 1k
WINDOW 3 36 40 Left 1
SYMBOL voltage 100 404 R0
SYMATTR InstName V1
WINDOW 0 36 76 Left 1
SYMATTR Value AC 1
WINDOW 3 36 40 Left 1
SYMBOL res 260 404 R90
SYMATTR InstName R1
WINDOW 0 36 76 Left 1
SYMATTR Value 50
WINDOW 3 36 40 Left 1
SYMBOL cap 276 292 R0
SYMATTR InstName C1
WINDOW 0 36 76 Left 1
SYMATTR Value 100n
WINDOW 3 36 40 Left 1
FLAG 100 420 VIN
FLAG 292 292 TANK1
FLAG 548 292 TANK2
FLAG 548 292 VOUT
FLAG 100 548 0
FLAG 292 676 0
FLAG 548 676 0
FLAG 676 548 0
* Z:\tmp\asc_dec_bjh7r6w2\19c9494bdb49_RFX_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R2 N005 N007 49.9
V2 NC_01 0 0.1
L4 N010 N009 330n
R3 N005 0 10
C3 N003 N009 47p
C2 N002 N008 66p
R6 N003 N006 40.2
I6 0 N011 {I2}
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 760
WIRE 144 112 -16 112
WIRE 368 112 144 112
WIRE 400 112 368 112
WIRE 512 112 480 112
WIRE 592 112 512 112
WIRE -784 128 -944 128
WIRE -560 128 -784 128
WIRE -528 128 -560 128
WIRE -416 128 -448 128
WIRE -336 128 -416 128
WIRE 368 192 368 112
WIRE 512 192 512 112
WIRE 592 192 592 112
WIRE -560 208 -560 128
WIRE -416 208 -416 128
WIRE -336 208 -336 128
WIRE 144 224 144 192
WIRE 192 224 144 224
WIRE 288 224 272 224
WIRE -784 240 -784 208
WIRE -736 240 -784 240
WIRE -640 240 -656 240
WIRE 288 240 288 224
WIRE -640 256 -640 240
WIRE 144 256 144 224
WIRE -784 272 -784 240
WIRE 144 336 -16 336
WIRE 368 336 368 256
WIRE 368 336 144 336
WIRE 400 336 368 336
WIRE 512 336 512 256
WIRE 512 336 480 336
WIRE 592 336 592 272
WIRE 592 336 512 336
WIRE -784 352 -944 352
WIRE -560 352 -560 272
WIRE -560 352 -784 352
WIRE -528 352 -560 352
WIRE -416 352 -416 272
WIRE -416 352 -448 352
WIRE -336 352 -336 288
WIRE -336 352 -416 352
WIRE -800 560 -944 560
WIRE -800 576 -800 560
SYMBOL res 128 240 R0
SYMATTR InstName R2
SYMATTR Value 49.9
SYMBOL voltage -800 640 R0
SYMATTR InstName V2
SYMATTR Value 0.1
SYMBOL ind -432 336 R90
WINDOW 0 5 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName L4
SYMATTR Value 330n
SYMBOL res 176 240 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R3
SYMATTR Value 10
SYMBOL cap -576 208 R0
SYMATTR InstName C3
SYMATTR Value 47p
SYMBOL cap 496 192 R0
SYMATTR InstName C2
SYMATTR Value 66p
SYMBOL res -800 112 R0
SYMATTR InstName R6
SYMATTR Value 40.2
SYMBOL current -944 480 R0
SYMATTR InstName I6
SYMATTR Value {I2}
FLAG 288 240 0
FLAG -16 256 0
FLAG -640 256 0
FLAG -944 48 0
FLAG -944 272 0
FLAG -944 480 0
FLAG -800 736 0
* Z:\home\khalils\Downloads\files\data\raw_asc\ba2c0dca089b_BJT-for-simple-current-regulation.asc
* Generated by LTspice 26.0.1 for Windows.
V1 Vin 0 5
R1 Vin N001 47
R2 N003 N002 4.2k
RPotenziometro N002 0 {10k*(1-x)}
Q1 N001 N003 0 0 2N3904
RPot Vin N002 {10k*x}
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.step param x 1n 0.99 0.5
.tran 1s
* Adjusting the potentiometer, the current through R1 is (approximately)\nlinearly regulated.
* Sizing: \n \nAssume BJT works in saturation -> Vce = 0.3. On the load the voltage drop is 4.7V,\nAssume the load draws 100 mA.\n \nBase current for the polarization is Ic/hfe. Assuming a hfe of 100 the required base\ncurrent is 100ma/100 = 1mA\n \nVbe is fixed at 0.8 V (PN junction). I set R2 so as to have exactly 1 mA of base current\ni.e. R2 = 4.2/0.001 = 4.2k
* BJT for simple current regulation
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1704 680
WIRE -16 16 -16 0
WIRE 272 64 272 32
WIRE 80 80 80 48
WIRE 272 176 272 144
WIRE 80 224 80 160
WIRE 112 224 80 224
WIRE 208 224 192 224
WIRE 272 288 272 272
WIRE 80 304 80 224
FLAG 80 384 0
FLAG 272 288 0
FLAG -16 0 Vin
FLAG 272 32 Vin
FLAG -16 96 0
FLAG 80 48 Vin
SYMBOL voltage -16 0 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 256 48 R0
SYMATTR InstName R1
SYMATTR Value 47
SYMBOL res 208 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4.2k
SYMBOL res 64 288 R0
SYMATTR InstName Potenziometro
SYMATTR Value {10k*(1-x)}
SYMBOL npn 208 176 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL res 64 64 R0
SYMATTR InstName Pot
SYMATTR Value {10k*x}
TEXT 360 128 Left 2 !.step param x 1n 0.99 0.5
TEXT 360 168 Left 2 !.tran 1s
TEXT -120 -144 Left 2 ;Adjusting the potentiometer, the current through R1 is (approximately)\nlinearly regulated.
TEXT 456 240 Left 2 ;Sizing: \n \nAssume BJT works in saturation -> Vce = 0.3. On the load the voltage drop is 4.7V,\nAssume the load draws 100 mA.\n \nBase current for the polarization is Ic/hfe. Assuming a hfe of 100 the required base\ncurrent is 100ma/100 = 1mA\n \nVbe is fixed at 0.8 V (PN junction). I set R2 so as to have exactly 1 mA of base current\ni.e. R2 = 4.2/0.001 = 4.2k
TEXT 368 -264 Left 4 ;BJT for simple current regulation
* Z:\home\khalils\Downloads\files\data\raw_asc\21f097cbee0a_1445.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1445.asy)
V2 N002 0 PULSE(0 3.3 0 5m 5m 0 10m)
XU1 N003 N001 N002 N004 N004 0 N004 LTC1445 ;pnba OUT)V+)In-)In+)REF)V-)HYST
V1 N001 0 5
.tran 30m
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1144 800
WIRE 800 96 576 96
WIRE 800 112 800 96
WIRE 576 144 576 96
WIRE 224 192 208 192
WIRE 512 192 304 192
WIRE 688 208 640 208
WIRE 800 208 800 192
WIRE 512 224 496 224
WIRE 496 256 496 224
WIRE 512 256 496 256
WIRE 496 288 496 256
WIRE 512 288 496 288
WIRE 544 368 544 336
SYMBOL voltage 800 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL Comparators\\LTC1445 576 144 R0
SYMATTR InstName U1
SYMBOL voltage 320 192 R90
WINDOW 3 32 56 VTop 2
WINDOW 123 74 56 VTop 2
WINDOW 39 53 56 VTop 2
WINDOW 0 -32 56 VBottom 2
SYMATTR Value PULSE(0 3.3 0 5m 5m 0 10m)
SYMATTR InstName V2
FLAG 800 208 0
FLAG 208 192 0
FLAG 544 368 0
TEXT 640 400 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP7156-1.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP7156-1.8.asy)
C2 N003 0 1
Rload OUT 0 1.8
XU1 OUT MP_01 OUT N002 N001 N003 N003 N004 IN 0 ADP7156_7 Vreg=2.111 Vref=1.816 ;pnba Vout))Vout_Sense)Byp)EN)Ref_Sense)Ref)Vreg)Vin)GND
V1 IN 0 2.4
C4 N002 0 1
C1 OUT 0 10
C3 N004 0 1
R1 IN N001 100K
.tran 5m startup
.lib ADP7156_7.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -32 0 -160 0
WIRE 80 0 -32 0
WIRE 416 0 400 0
WIRE 464 0 416 0
WIRE 560 0 464 0
WIRE -160 16 -160 0
WIRE 464 16 464 0
WIRE 560 16 560 0
WIRE -32 96 -32 0
WIRE -16 96 -32 96
WIRE 80 96 64 96
WIRE 416 96 416 0
WIRE 416 96 400 96
WIRE -160 112 -160 96
WIRE 464 112 464 80
WIRE 560 112 560 96
WIRE 0 192 -16 192
WIRE 80 192 64 192
WIRE 416 192 400 192
WIRE 464 192 416 192
WIRE 464 208 464 192
WIRE 0 288 -16 288
WIRE 80 288 64 288
WIRE 416 288 416 192
WIRE 416 288 400 288
WIRE 464 288 464 272
WIRE 240 368 240 352
SYMBOL res -32 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL cap 448 208 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL cap 64 176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL voltage -160 0 R0
SYMATTR InstName V1
SYMATTR Value 2.4
SYMBOL cap 448 16 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 544 0 R0
SYMATTR InstName Rload
SYMATTR Value 1.8
SYMBOL ADP7156-1.8 240 176 R0
SYMATTR InstName U1
SYMBOL cap 64 272 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
FLAG 240 368 0
FLAG 464 288 0
FLAG 464 112 0
FLAG -16 288 0
FLAG -16 192 0
FLAG -160 112 0
FLAG 560 112 0
FLAG -160 0 IN
FLAG 560 0 OUT
TEXT 504 368 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD5682R.asc
* Generated by LTspice 26.0.1 for Windows.
* .dc I1 0 40m 1m
* .ac oct 100 1u 1G
* Gain parameter can be 1 or 2
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\DAC\AD5682R.asy)
Vdac vDAC 0 PWL(0 0.625 10u 0.625 +1u 1.875)
I1 0 0 1m AC 1
XU2 vDAC Vdd 0 vOUT AD5682R Gain=2 ;pnba Vdac)Vdd)GND)Vout
Vdac1 NC_02 0 1.25
CLOAD NC_01 0 10n
V1 Vdd 0 5
.tran 200u
.lib AD5682R.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -240 -208 -240 -240
WIRE -240 -80 -240 -128
WIRE -240 -32 -240 -80
WIRE -800 112 -1008 112
WIRE -528 112 -800 112
WIRE -368 112 -528 112
WIRE 192 112 0 112
WIRE 464 112 192 112
WIRE -800 144 -800 112
WIRE -1008 256 -1008 224
WIRE -800 256 -800 224
WIRE 272 256 272 224
WIRE 464 256 464 240
WIRE 464 256 272 256
WIRE 272 272 272 256
WIRE -240 288 -240 256
SYMBOL current 464 160 R0
WINDOW 123 24 108 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName I1
SYMATTR Value 1m
SYMBOL voltage -800 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac
SYMATTR Value PWL(0 0.625 10u 0.625 +1u 1.875)
SYMBOL voltage -240 -112 M180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 256 160 R0
SYMATTR InstName CLOAD
SYMATTR Value 10n
SYMBOL voltage -1008 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vdac1
SYMATTR Value 1.25
SYMBOL AD5682R -208 112 R0
SYMATTR InstName U2
FLAG 192 112 vOUT
FLAG -800 256 0
FLAG -528 112 vDAC
FLAG -240 -240 0
FLAG -240 288 0
FLAG 272 272 0
FLAG -240 -80 Vdd
FLAG -1008 256 0
FLAG 464 160 0
TEXT -160 312 Left 2 !.tran 200u
TEXT -160 360 Left 2 ;.dc I1 0 40m 1m
TEXT -160 408 Left 2 ;.ac oct 100 1u 1G
TEXT -632 368 Left 2 ;Gain parameter can be 1 or 2
* Z:\home\khalils\Downloads\files\data\raw_asc\0fada9b07c09_6994-1.asc
* Generated by LTspice 26.0.1 for Windows.
* LTC6994-1 10ms Delay Interval Generator\nOutput Low When IN is Low\nRising Edge On IN Starts Delay to Output Rising Edge\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6994-1.asy)
R4 OUT 0 100K
V2 N001 0 PULSE(3.3 0 0.25m 1n 1n 0.5m 25m 3)
XU1 N001 0 N003 N004 N002 OUT LTC6994-1 ;pnba IN)GND)SET)DIV)V+)OUT
R2 N002 N004 1000K
V1 N002 0 5
R1 N003 0 121K
R3 N004 0 392K
.tran 100m startup
.lib LTC6994-1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 968 680
WIRE -224 96 -240 96
WIRE 96 96 -144 96
WIRE 624 96 320 96
WIRE 624 112 624 96
WIRE 96 176 64 176
WIRE 400 176 320 176
WIRE 528 176 400 176
WIRE 400 192 400 176
WIRE 528 192 528 176
WIRE 624 208 624 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 352 256 320 256
WIRE 352 288 352 256
WIRE 400 288 400 272
WIRE 400 288 352 288
WIRE 528 288 528 272
WIRE 400 304 400 288
WIRE 400 400 400 384
SYMBOL SpecialFunctions\\LTC6994-1 208 176 R0
SYMATTR InstName U1
SYMBOL res 384 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 121K
SYMBOL res 608 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL voltage 528 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -128 96 R90
WINDOW 123 74 56 VTop 0
WINDOW 39 53 56 VTop 0
WINDOW 3 32 56 VTop 0
WINDOW 0 -32 56 VBottom 0
SYMATTR Value PULSE(3.3 0 0.25m 1n 1n 0.5m 25m 3)
SYMATTR InstName V2
SYMBOL res 384 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
FLAG -240 96 0
FLAG 528 288 0
FLAG 624 96 OUT
FLAG 624 208 0
FLAG 400 400 0
FLAG -16 256 0
FLAG 64 176 0
TEXT 528 368 Left 0 !.tran 100m startup
TEXT 216 64 Bottom 0 ;LTC6994-1 10ms Delay Interval Generator\nOutput Low When IN is Low\nRising Edge On IN Starts Delay to Output Rising Edge\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP1763-1.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP1763-1.3.asy)
C1 N004 0 1
XU1 N002 IN IN OUT OUT N001 0 N003 N004 N005 ADP1763 Radj=8666.67 ;pnba Vreg)Vin)EN)Vout)Sense)PG)GND)SS)RefCap)Vadj
V1 IN 0 1.6
C3 N002 0 1
C2 N003 0 10n
R1 OUT 0 .8
R2 N001 IN 50K
C4 OUT 0 10
.tran 1m startup
.lib ADP7102.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1028 680
WIRE -16 -32 -128 -32
WIRE 80 -32 -16 -32
WIRE 224 -32 80 -32
WIRE -128 -16 -128 -32
WIRE 224 -16 224 -32
WIRE 80 32 80 -32
WIRE 96 32 80 32
WIRE 384 32 352 32
WIRE 496 32 384 32
WIRE 592 32 496 32
WIRE 496 48 496 32
WIRE 592 48 592 32
WIRE -128 80 -128 64
WIRE -16 128 -16 -32
WIRE 0 128 -16 128
WIRE 96 128 80 128
WIRE 384 128 384 32
WIRE 384 128 352 128
WIRE 496 144 496 112
WIRE 592 144 592 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 368 224 352 224
WIRE 464 224 432 224
WIRE 16 320 -16 320
WIRE 96 320 80 320
WIRE 368 320 352 320
WIRE 224 384 224 368
SYMBOL cap 80 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL cap 368 240 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 576 32 R0
SYMATTR InstName R1
SYMATTR Value .8
SYMBOL ADP1763-1.3 224 176 R0
SYMATTR InstName U1
SYMBOL cap 80 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -128 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.6
SYMBOL res 96 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 50K
SYMBOL cap 480 48 R0
SYMATTR InstName C4
SYMATTR Value 10
FLAG 224 384 0
FLAG -128 80 0
FLAG -16 320 0
FLAG 0 224 0
FLAG 464 224 0
FLAG 592 144 0
FLAG 496 144 0
FLAG -128 -32 IN
FLAG 592 32 OUT
TEXT 432 384 Left 2 !.tran 1m startup
* Z:\tmp\asc_dec_bjh7r6w2\10f5a4348ca0_schmitt_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
R7 N004 VGND 120K
R6 SIG_IN N001 4.53K
Q1 SIG_OUT N003 0 0 BC847A
R4 VGND 0 1K
V1 SIG_IN 0 SINE(2.5 2.5 {freq})
R9 THRESH N004 75K
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 336 0 336 -32
WIRE 32 64 0 64
WIRE 176 96 112 96
WIRE 336 96 336 80
WIRE 336 96 256 96
WIRE 448 96 336 96
WIRE 480 96 448 96
WIRE -32 128 -192 128
WIRE 208 128 176 128
WIRE 208 144 208 128
WIRE 448 144 448 96
WIRE 176 160 176 128
WIRE 32 176 32 64
WIRE 112 176 112 96
WIRE 144 176 112 176
WIRE 224 192 208 192
WIRE 336 192 304 192
WIRE 384 192 336 192
WIRE -352 208 -448 208
WIRE -96 208 -176 208
WIRE -32 208 -96 208
WIRE 16 208 -32 208
WIRE 144 208 16 208
WIRE 336 224 336 192
WIRE -688 256 -720 256
WIRE 448 272 448 240
WIRE -720 304 -720 256
WIRE 336 336 336 304
WIRE 336 336 320 336
SYMBOL res -16 224 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R7
SYMATTR Value 120K
SYMBOL res 16 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 88 55 VBottom 2
SYMATTR InstName R6
SYMATTR Value 4.53K
SYMBOL npn 384 144 R0
SYMATTR InstName Q1
SYMATTR Value BC847A
SYMBOL res -464 192 R0
SYMATTR InstName R4
SYMATTR Value 1K
SYMBOL voltage -864 64 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 -83 137 Left 2
SYMATTR Value SINE(2.5 2.5 {freq})
SYMATTR InstName V1
SYMBOL res 32 304 R180
WINDOW 0 -32 66 Left 2
WINDOW 3 -41 24 Left 2
SYMATTR InstName R9
SYMATTR Value 75K
FLAG -1040 80 5V
FLAG -1040 160 0
FLAG -448 288 0
FLAG -448 128 5V
FLAG -352 208 VGND
FLAG -688 256 THRESH
FLAG -176 272 0
FLAG -96 288 0
FLAG 16 288 THRESH
FLAG 176 224 5V
FLAG 208 144 0
FLAG 336 -32 5V
FLAG 336 336 0
FLAG 448 272 0
FLAG 480 96 SIG_OUT
FLAG 0 64 SIG_IN
FLAG -192 128 VGND
FLAG -864 80 SIG_IN
FLAG -864 160 0
* Z:\home\khalils\Downloads\files\data\raw_asc\30a7c597b79f_quiz_q7.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 SINE(0 5 1u 1n 1n 19u 20u) AC 1 0
R1 N002 N001 {r}
C1 N002 0 {c}
R2 N002 0 10k
.ac dec 10 10k 10meg
.step param r 1k 10k 2.5k
.param c= 1e-6/r
.meas AC gmax max mag(V(n002))
.meas AC fc WHEN mag(V(n002)) =gmax/sqrt(2) FALL=1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 352 80 128 80
WIRE 608 80 432 80
WIRE 816 80 608 80
WIRE 608 96 608 80
WIRE 816 96 816 80
WIRE 128 192 128 160
WIRE 608 208 608 160
WIRE 816 208 816 176
FLAG 128 192 0
FLAG 608 208 0
FLAG 816 208 0
SYMBOL voltage 128 64 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 1u 1n 1n 19u 20u)
SYMBOL res 448 64 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value {r}
SYMBOL cap 592 96 R0
SYMATTR InstName C1
SYMATTR Value {c}
SYMBOL res 800 80 R0
SYMATTR InstName R2
SYMATTR Value 10k
TEXT 128 240 Left 2 !.ac dec 10 10k 10meg
TEXT 128 272 Left 2 !.step param r 1k 10k 2.5k
TEXT 136 304 Left 2 !.param c= 1e-6/r
TEXT 200 -144 Left 2 !.meas AC gmax max mag(V(n002))
TEXT 200 -112 Left 2 !.meas AC fc WHEN mag(V(n002)) =gmax/sqrt(2) FALL=1