* Z:\home\khalils\Downloads\files\data\raw_asc\64ea2f5893a2_LNA1.asc
* Generated by LTspice 26.0.1 for Windows.
M1 M1_drain N003 0 0 NM W=100u L=0.18u
M2 M2_drain Vdd M1_drain 0 NM W=100u L=0.18u
C1 N003 N002 1p
Cd Vdd M2_drain 2p
Ld Vdd M2_drain 2.2n
L1 N002 N003 3n
Lbias N002 N001 3n
Cin N002 N004 1p
Ca 0 Vdd 1
Cout RF_out M2_drain 5p
C3 M1_drain 0 0.1p
Vsupply Vdd 0 DC 3.3
Vin RF_in 0 SINE(1.8 10u 2.4G 1n) AC 1.8
VDC_bias N001 0 DC 1.1
Rs N004 RF_in 50
RL RF_out 0 50
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib mosfet_018.lib
;.tran 50n
;.ac lin 500 1G 5G
.noise V(RF_out) Vin lin 500 2.2G 2.6G
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1172 852
WIRE 144 80 0 80
WIRE 256 80 144 80
WIRE 368 80 256 80
WIRE 480 80 368 80
WIRE 592 80 480 80
WIRE 0 128 0 80
WIRE 144 144 144 80
WIRE 480 144 480 80
WIRE 592 144 592 80
WIRE 0 240 0 192
WIRE 480 272 480 224
WIRE 592 272 592 208
WIRE 592 272 480 272
WIRE 768 272 592 272
WIRE 992 272 832 272
WIRE 1056 272 992 272
WIRE 144 288 144 224
WIRE 80 304 -192 304
WIRE 480 320 480 272
WIRE -192 352 -192 304
WIRE 992 352 992 272
WIRE 544 368 480 368
WIRE 368 400 368 80
WIRE 432 400 368 400
WIRE 80 448 80 304
WIRE 480 448 480 416
WIRE 816 448 480 448
WIRE -192 480 -192 432
WIRE 480 480 480 448
WIRE 992 496 992 432
WIRE 240 512 160 512
WIRE 384 512 304 512
WIRE 544 528 480 528
WIRE 816 528 816 448
WIRE 384 560 384 512
WIRE 432 560 384 560
WIRE -256 576 -368 576
WIRE -80 576 -176 576
WIRE 80 576 80 528
WIRE 80 576 -16 576
WIRE 160 576 160 512
WIRE 160 576 80 576
WIRE 480 592 480 576
WIRE 544 592 544 528
WIRE 544 592 480 592
WIRE 160 656 160 576
WIRE 240 656 160 656
WIRE 384 656 384 560
WIRE 384 656 320 656
WIRE 480 672 480 592
WIRE 816 672 816 592
WIRE -368 688 -368 576
WIRE -368 832 -368 768
FLAG 0 240 0
FLAG 480 672 0
FLAG 816 672 0
FLAG 544 368 0
FLAG 1056 272 RF_out
FLAG -368 576 RF_in
FLAG -368 832 0
FLAG 144 288 0
FLAG 256 80 Vdd
FLAG 816 448 M1_drain
FLAG 592 272 M2_drain
FLAG -192 480 0
FLAG 992 496 0
SYMBOL nmos4 432 480 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 W=100u L=0.18u
SYMATTR InstName M1
SYMATTR Value NM
SYMBOL nmos4 432 320 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 W=100u L=0.18u
SYMATTR InstName M2
SYMATTR Value NM
SYMBOL cap 304 496 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 1p
SYMBOL cap 576 144 R0
SYMATTR InstName Cd
SYMATTR Value 2p
SYMBOL ind 496 128 M0
SYMATTR InstName Ld
SYMATTR Value 2.2n
SYMBOL ind 224 640 M90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value 3n
SYMBOL ind 96 544 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName Lbias
SYMATTR Value 3n
SYMBOL cap -16 560 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName Cin
SYMATTR Value 1p
SYMBOL cap 16 192 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName Ca
SYMATTR Value 1µ
SYMBOL cap 832 256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName Cout
SYMATTR Value 5p
SYMBOL cap 800 528 R0
SYMATTR InstName C3
SYMATTR Value 0.1p
SYMBOL voltage 144 128 R0
SYMATTR InstName Vsupply
SYMATTR Value DC 3.3
SYMBOL voltage -368 672 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value2 AC 1.8
SYMATTR InstName Vin
SYMATTR Value SINE(1.8 10u 2.4G 1n)
SYMBOL voltage -192 336 M0
SYMATTR InstName DC_bias
SYMATTR Value DC 1.1
SYMBOL res -160 560 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rs
SYMATTR Value 50
SYMBOL res 976 336 R0
SYMATTR InstName RL
SYMATTR Value 50
TEXT 56 0 Left 2 !.lib mosfet_018.lib
TEXT 400 8 Left 2 !;.tran 50n
TEXT 680 8 Left 2 !;.ac lin 500 1G 5G
TEXT 680 64 Left 2 !.noise V(RF_out) Vin lin 500 2.2G 2.6G