* Z:\home\khalils\Downloads\files\data\raw_asc\1aa276959985_mode-transition.asc
* Generated by LTspice 26.0.1 for Windows.
A1 0 0 0 0 0 high low 0 BUF Vhigh=10, Vlow=-5, Ref=1
A2 conf_ok high high high power_ok ~enable_ok enable_ok 0 AND Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A4 comp_lcle 0 0 0 0 N002 0 0 BUF Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A5 comp_ucle 0 0 0 0 N003 0 0 BUF Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A6 N002 N003 conf_refselect_v high high 0 N001 0 AND Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A7 N001 high high high transition_ready 0 s_mode_vc 0 AND Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A8 conf_refselect_v comp_lcle high high transition_ready 0 s_mode_lclc 0 AND Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A9 conf_refselect_v comp_ucle high high transition_ready 0 s_mode_uclc 0 AND Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A10 N001 0 0 0 0 N004 0 0 BUF Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A11 high comp_mstt high high N006 0 N005 0 AND Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A12 high comp_mgtt high high N008 0 N007 0 AND Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A13 N004 conf_refselect_i low low ~enable_ok 0 r_mode_vc 0 OR Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A14 N005 conf_refselect_i comp_ucle low ~enable_ok 0 r_mode_lclc 0 OR Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A15 N007 conf_refselect_i low comp_lcle ~enable_ok 0 r_mode_uclc 0 OR Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A16 comp_lvle 0 0 0 0 N010 0 0 BUF Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A17 comp_uvle 0 0 0 0 N011 0 0 BUF Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A18 N010 N011 conf_refselect_i high high 0 N009 0 AND Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A19 N009 high high high transition_ready 0 s_mode_cc 0 AND Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A20 conf_refselect_i comp_lvle high high transition_ready 0 s_mode_lvlc 0 AND Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A21 conf_refselect_i comp_uvle high high transition_ready 0 s_mode_uvlc 0 AND Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A22 N009 0 0 0 0 N012 0 0 BUF Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A23 high comp_mstt high high N014 0 N013 0 AND Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A24 high comp_mgtt high high N016 0 N015 0 AND Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A25 N012 conf_refselect_v low low ~enable_ok 0 r_mode_cc 0 OR Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A26 N013 conf_refselect_v comp_uvle low ~enable_ok 0 r_mode_lvlc 0 OR Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A27 N015 conf_refselect_v low comp_lvle ~enable_ok 0 r_mode_uvlc 0 OR Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A3 enable_ok high high high ~mode 0 transition_ready 0 AND Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A28 comp_lvle 0 0 0 0 N014 0 0 BUF Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A29 comp_uvle 0 0 0 0 N016 0 0 BUF Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A30 comp_lcle 0 0 0 0 N006 0 0 BUF Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
A31 comp_ucle 0 0 0 0 N008 0 0 BUF Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2020 1448
WIRE 688 144 640 144
WIRE 576 160 560 160
WIRE 1008 160 992 160
WIRE 576 176 560 176
WIRE 640 176 640 144
WIRE 656 176 640 176
WIRE 1008 176 992 176
WIRE 576 192 560 192
WIRE 1008 192 992 192
WIRE 576 208 560 208
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WIRE 576 224 560 224
WIRE 1008 224 992 224
WIRE 752 352 336 352
WIRE 176 400 48 400
WIRE 176 416 64 416
WIRE 336 416 336 352
WIRE 336 416 240 416
WIRE 480 416 336 416
WIRE 752 416 752 352
WIRE 864 416 752 416
WIRE 1296 416 928 416
WIRE 176 432 96 432
WIRE 480 432 464 432
WIRE 176 448 160 448
WIRE 480 448 464 448
WIRE 176 464 160 464
WIRE 480 464 464 464
WIRE 480 480 464 480
WIRE 1296 480 1280 480
WIRE 64 496 64 416
WIRE 64 496 48 496
WIRE 464 528 448 528
WIRE 464 544 464 528
WIRE 480 544 464 544
WIRE 960 544 944 544
WIRE 480 560 448 560
WIRE 960 560 928 560
WIRE 1296 560 1024 560
WIRE 96 576 96 432
WIRE 96 576 -16 576
WIRE 480 576 464 576
WIRE 960 576 944 576
WIRE 1296 576 1280 576
WIRE 480 592 464 592
WIRE 960 592 944 592
WIRE 1296 592 1280 592
WIRE 480 608 464 608
WIRE 960 608 944 608
WIRE 1296 608 1280 608
WIRE 1296 624 1280 624
WIRE 464 656 448 656
WIRE 464 672 464 656
WIRE 480 672 464 672
WIRE 960 672 944 672
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WIRE 960 688 928 688
WIRE 1296 688 1024 688
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WIRE 960 704 944 704
WIRE 1296 704 1280 704
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WIRE 752 832 336 832
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WIRE 480 896 336 896
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WIRE 480 912 464 912
WIRE 176 928 160 928
WIRE 480 928 464 928
WIRE 176 944 160 944
WIRE 480 944 464 944
WIRE 480 960 464 960
WIRE 1296 960 1280 960
WIRE 64 976 64 896
WIRE 64 976 48 976
WIRE 464 1008 448 1008
WIRE 464 1024 464 1008
WIRE 480 1024 464 1024
WIRE 960 1024 944 1024
WIRE 480 1040 448 1040
WIRE 960 1040 928 1040
WIRE 1296 1040 1024 1040
WIRE 96 1056 96 912
WIRE 96 1056 -16 1056
WIRE 480 1056 464 1056
WIRE 960 1056 944 1056
WIRE 1296 1056 1280 1056
WIRE 480 1072 464 1072
WIRE 960 1072 944 1072
WIRE 1296 1072 1280 1072
WIRE 480 1088 464 1088
WIRE 960 1088 944 1088
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WIRE 1296 1104 1280 1104
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WIRE 464 1152 464 1136
WIRE 480 1152 464 1152
WIRE 960 1152 944 1152
WIRE 480 1168 448 1168
WIRE 960 1168 928 1168
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WIRE 480 1184 464 1184
WIRE 960 1184 944 1184
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WIRE 960 1200 944 1200
WIRE 1296 1200 1280 1200
WIRE 480 1216 464 1216
WIRE 960 1216 944 1216
WIRE 1296 1216 1280 1216
WIRE 1296 1232 1280 1232
IOPIN -16 400 In
IOPIN -16 496 In
IOPIN -16 576 In
IOPIN 448 528 In
IOPIN 448 656 In
IOPIN 448 560 In
IOPIN 448 688 In
IOPIN 544 432 Out
IOPIN 544 560 Out
IOPIN 544 688 Out
IOPIN 928 560 In
IOPIN 928 688 In
IOPIN 1280 576 In
IOPIN 1280 704 In
IOPIN 1360 432 Out
IOPIN 1360 576 Out
IOPIN 1360 704 Out
IOPIN -16 880 In
IOPIN -16 976 In
IOPIN -16 1056 In
IOPIN 448 1008 In
IOPIN 448 1136 In
IOPIN 448 1040 In
IOPIN 448 1168 In
IOPIN 544 912 Out
IOPIN 544 1040 Out
IOPIN 544 1168 Out
IOPIN 928 1040 In
IOPIN 928 1168 In
IOPIN 1280 1056 In
IOPIN 1280 1184 In
IOPIN 1360 912 Out
IOPIN 1360 1056 Out
IOPIN 1360 1184 Out
IOPIN 560 160 In
IOPIN 560 224 In
IOPIN 992 224 In
IOPIN 688 144 Out
IOPIN 1296 432 In
IOPIN 1296 912 In
IOPIN 1280 592 In
IOPIN 1280 736 In
IOPIN 1280 1072 In
IOPIN 1280 1216 In
IOPIN 880 1088 In
IOPIN 880 1216 In
IOPIN 880 608 In
IOPIN 880 736 In
SYMBOL Digital\\and 1040 128 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A3
SYMBOL Digital\\and 992 640 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A12
SYMBOL Digital\\or 1328 1008 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A26
SYMBOL Digital\\inv 880 672 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A31
SYMBOL Digital\\or 1328 864 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A25
SYMBOL Digital\\and 512 512 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A8
SYMBOL Digital\\and 512 640 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A9
SYMBOL Digital\\inv 880 1024 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A28
SYMBOL Digital\\and 992 992 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A23
SYMBOL Digital\\and 608 128 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A2
SYMBOL Digital\\buf 240 128 R0
WINDOW 39 1 -8 Left 2
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Ref=1
SYMATTR InstName A1
SYMBOL Digital\\and 992 1120 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A24
SYMBOL Digital\\inv -16 912 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A17
SYMBOL Digital\\and 512 1120 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A21
SYMBOL Digital\\inv -16 816 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A16
SYMBOL Digital\\inv -16 336 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A4
SYMBOL Digital\\inv 880 1152 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A29
SYMBOL Digital\\inv -16 432 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A5
SYMBOL Digital\\and 208 848 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A18
SYMBOL Digital\\or 1328 1136 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A27
SYMBOL Digital\\and 512 864 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A19
SYMBOL Digital\\or 1328 656 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A15
SYMBOL Digital\\and 512 384 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A7
SYMBOL Digital\\and 208 368 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A6
SYMBOL Digital\\and 512 992 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A20
SYMBOL Digital\\inv 864 352 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A10
SYMBOL Digital\\inv 880 544 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A30
SYMBOL Digital\\and 992 512 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A11
SYMBOL Digital\\or 1328 528 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A14
SYMBOL Digital\\inv 864 832 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A22
SYMBOL Digital\\or 1328 384 R0
SYMATTR SpiceLine Vhigh=10, Vlow=-5, Trise=60n, Tfall=60n, Td=30n
SYMATTR InstName A13
FLAG 240 224 0
FLAG 240 192 0
FLAG 304 208 high
FLAG 304 176 low
FLAG -16 400 comp_lcle
FLAG -16 496 comp_ucle
FLAG -16 576 conf_refselect_v
FLAG 160 448 high
FLAG 160 464 high
FLAG 464 480 transition_ready
FLAG 464 432 high
FLAG 464 448 high
FLAG 464 464 high
FLAG 464 608 transition_ready
FLAG 464 576 high
FLAG 464 592 high
FLAG 464 736 transition_ready
FLAG 464 704 high
FLAG 464 720 high
FLAG 448 528 conf_refselect_v
FLAG 448 656 conf_refselect_v
FLAG 448 560 comp_lcle
FLAG 448 688 comp_ucle
FLAG 544 432 s_mode_vc
FLAG 544 560 s_mode_lclc
FLAG 544 688 s_mode_uclc
FLAG 928 560 comp_mstt
FLAG 928 688 comp_mgtt
FLAG 944 576 high
FLAG 944 592 high
FLAG 944 704 high
FLAG 944 720 high
FLAG 1280 480 ~enable_ok
FLAG 1280 624 ~enable_ok
FLAG 1280 752 ~enable_ok
FLAG 1296 448 low
FLAG 1296 464 low
FLAG 1280 576 conf_refselect_i
FLAG 1280 608 low
FLAG 1280 720 low
FLAG 1280 704 conf_refselect_i
FLAG 1360 432 r_mode_vc
FLAG 1360 576 r_mode_lclc
FLAG 1360 704 r_mode_uclc
FLAG -16 880 comp_lvle
FLAG -16 976 comp_uvle
FLAG -16 1056 conf_refselect_i
FLAG 160 928 high
FLAG 160 944 high
FLAG 464 960 transition_ready
FLAG 464 912 high
FLAG 464 928 high
FLAG 464 944 high
FLAG 464 1088 transition_ready
FLAG 464 1056 high
FLAG 464 1072 high
FLAG 464 1216 transition_ready
FLAG 464 1184 high
FLAG 464 1200 high
FLAG 448 1008 conf_refselect_i
FLAG 448 1136 conf_refselect_i
FLAG 448 1040 comp_lvle
FLAG 448 1168 comp_uvle
FLAG 544 912 s_mode_cc
FLAG 544 1040 s_mode_lvlc
FLAG 544 1168 s_mode_uvlc
FLAG 928 1040 comp_mstt
FLAG 928 1168 comp_mgtt
FLAG 944 1056 high
FLAG 944 1072 high
FLAG 944 1184 high
FLAG 944 1200 high
FLAG 1280 960 ~enable_ok
FLAG 1280 1104 ~enable_ok
FLAG 1280 1232 ~enable_ok
FLAG 1296 928 low
FLAG 1296 944 low
FLAG 1280 1056 conf_refselect_v
FLAG 1280 1088 low
FLAG 1280 1200 low
FLAG 1280 1184 conf_refselect_v
FLAG 1360 912 r_mode_cc
FLAG 1360 1056 r_mode_lvlc
FLAG 1360 1184 r_mode_uvlc
FLAG 560 160 conf_ok
FLAG 560 224 power_ok
FLAG 560 176 high
FLAG 560 192 high
FLAG 560 208 high
FLAG 656 176 enable_ok
FLAG 640 208 ~enable_ok
FLAG 992 160 enable_ok
FLAG 992 224 ~mode
FLAG 992 176 high
FLAG 992 192 high
FLAG 992 208 high
FLAG 1072 176 transition_ready
FLAG 688 144 enable_ok
FLAG 1296 432 conf_refselect_i
FLAG 1296 912 conf_refselect_v
FLAG 1280 592 comp_ucle
FLAG 1280 736 comp_lcle
FLAG 1280 1072 comp_uvle
FLAG 1280 1216 comp_lvle
FLAG 880 1088 comp_lvle
FLAG 880 1216 comp_uvle
FLAG 880 608 comp_lcle
FLAG 880 736 comp_ucle
FLAG 944 544 high
FLAG 944 672 high
FLAG 944 1024 high
FLAG 944 1152 high