Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1171HV.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1171HV.asy)
XU1 N003 N002 0 N001 IN LT1171 ;pnba Vc)FB)GND)SW)Vin
R3 N003 N004 1K
L1 IN N001 150 Rser=0.02 Rpar=5000
C3 N004 0 1
V1 IN 0 5
R2 N002 0 1.24K
D1 N001 OUT MBRS360
R1 OUT N002 10.7K
C1 OUT 0 500 Rser=0.05
Rload OUT 0 12
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 20m startup
.lib LT1171.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2808 1464
WIRE 1824 896 1616 896
WIRE 1888 896 1824 896
WIRE 2016 896 1968 896
WIRE 2064 896 2016 896
WIRE 2176 896 2128 896
WIRE 2304 896 2176 896
WIRE 2416 896 2304 896
WIRE 1616 912 1616 896
WIRE 2304 912 2304 896
WIRE 2416 912 2416 896
WIRE 1824 944 1824 896
WIRE 2176 944 2176 896
WIRE 1616 1008 1616 992
WIRE 2304 1008 2304 976
WIRE 2416 1008 2416 992
WIRE 2016 1024 2016 896
WIRE 2016 1024 1952 1024
WIRE 2176 1088 2176 1024
WIRE 2176 1088 1952 1088
WIRE 2176 1104 2176 1088
WIRE 1968 1152 1952 1152
WIRE 2064 1152 2048 1152
WIRE 2064 1168 2064 1152
WIRE 2176 1200 2176 1184
WIRE 1824 1248 1824 1232
WIRE 2064 1248 2064 1232
SYMBOL IND 1872 912 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150
SYMATTR SpiceLine Rser=0.02 Rpar=5000
SYMBOL VOLTAGE 1616 896 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL schottky 2064 912 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value MBRS360
SYMBOL RES 1952 1168 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL RES 2400 896 R0
SYMATTR InstName Rload
SYMATTR Value 12
SYMBOL polcap 2288 912 R0
SYMATTR InstName C1
SYMATTR Value 500
SYMATTR SpiceLine Rser=0.05
SYMBOL PowerProducts\\LT1171HV 1824 1088 R0
SYMATTR InstName U1
SYMBOL CAP 2048 1168 R0
SYMATTR InstName C3
SYMATTR Value 1
SYMBOL RES 2160 928 R0
SYMATTR InstName R1
SYMATTR Value 10.7K
SYMBOL RES 2160 1088 R0
SYMATTR InstName R2
SYMATTR Value 1.24K
FLAG 2416 896 OUT
FLAG 2176 1200 0
FLAG 2304 1008 0
FLAG 2416 1008 0
FLAG 2064 1248 0
FLAG 1824 1248 0
FLAG 1616 1008 0
FLAG 1616 896 IN
TEXT 2192 1240 Left 2 !.tran 20m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\f9d792b71722_MOSFET.asc
* Generated by LTspice 26.0.1 for Windows.
* MOSFET
M1 N001 N002 0 0 AO6408
V1 N002 0 10V
V2 N001 0 20V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc V2 0 20 0.5 v1 0 10 .5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 608 -80 352 -80
WIRE 608 -16 608 -80
WIRE 352 32 352 -80
WIRE 464 80 352 80
WIRE 304 112 32 112
WIRE 608 144 608 64
WIRE 32 160 32 112
WIRE 352 192 352 128
WIRE 464 192 464 80
WIRE 464 192 352 192
WIRE 352 240 352 192
WIRE 32 320 32 240
SYMBOL voltage 608 -32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 20V
SYMBOL voltage 32 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10V
SYMBOL nmos 304 32 R0
SYMATTR InstName M1
SYMATTR Value AO6408
FLAG 32 320 0
FLAG 352 240 0
FLAG 608 144 0
TEXT 80 360 Left 2 !.dc V2 0 20 0.5 v1 0 10 .5
TEXT 24 -80 Left 5 ;MOSFET
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4891.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4891.asy)
V1 +V 0 2.5
Vin IN 0 SINE(0 1 10K)
R2 OUT N001 10K
V2 -V 0 -2.5
XU1 IN N001 +V -V OUT ADA4891-1 ;pnba In+)In-)V+)V-)OUT
R1 N001 0 10K
Rload OUT 0 10K
.tran 1m
.lib ADA4891-1.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 432 -1216 416 -1216
WIRE 528 -1216 512 -1216
WIRE 544 -1216 528 -1216
WIRE 640 -1216 624 -1216
WIRE 144 -1136 144 -1152
WIRE 256 -1136 256 -1152
WIRE 528 -1120 528 -1216
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1216
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 432 -1072 432 -1088
WIRE 144 -1040 144 -1056
WIRE 256 -1040 256 -1056
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL voltage 256 -1152 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL voltage 144 -1152 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 528 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL ADA4891 576 -1168 R0
SYMATTR InstName U1
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL res 640 -1232 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
FLAG 144 -1152 +V
FLAG 144 -1040 0
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 256 -1152 -V
FLAG 576 -1072 -V
FLAG 416 -1216 0
FLAG 768 -992 0
FLAG 256 -1040 0
TEXT 752 -936 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6084.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6084.asy)
R1 N001 N003 1K
V3 -V 0 -2.5
V1 +V 0 2.5
XU1 0 N001 +V -V N002 NC_01 LTC6084 ;pnba IN+)IN-)VCC)VEE)OUT)SHDN
R2 N002 N001 10K
V2 N003 0 SINE(0 .2 1K)
.tran 3m
.lib LTC6.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 32 112 32
WIRE 368 32 304 32
WIRE 208 112 208 96
WIRE 0 160 -64 160
WIRE 112 160 112 32
WIRE 112 160 80 160
WIRE 176 160 112 160
WIRE -64 176 -64 160
WIRE 368 192 368 32
WIRE 368 192 320 192
WIRE -320 224 -320 208
WIRE -224 224 -224 208
WIRE 176 224 144 224
WIRE -64 272 -64 256
WIRE 208 304 208 272
WIRE -320 320 -320 304
WIRE -224 320 -224 304
SYMBOL voltage -320 208 R0
WINDOW 3 26 96 Left 2
SYMATTR Value 2.5
SYMATTR InstName V1
SYMBOL LTC6084 208 192 R0
SYMATTR InstName U1
SYMATTR Description Power Precision, CMOS Rail-to-Rail Amplifier
SYMBOL voltage -64 160 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 .2 1K)
SYMBOL res 320 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL voltage -224 208 R0
WINDOW 3 26 96 Left 2
SYMATTR Value -2.5
SYMATTR InstName V3
SYMBOL res 96 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG -320 320 0
FLAG -64 272 0
FLAG 208 96 +V
FLAG -320 208 +V
FLAG 144 224 0
FLAG -224 320 0
FLAG -224 208 -V
FLAG 208 304 -V
TEXT 312 328 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\40172697c64b_quiz2.asc
* Generated by LTspice 26.0.1 for Windows.
C2 MOS_High_Pass_Filter N001 20p
M1 MOS_High_Pass_Filter N002 0 0 NMOS l=10u w=w
R1 ref 0 10k
C1 N001 ref 20p
V1 N002 0 2
V2 N001 0 PULSE(0 0.1 1n 1n 1n 1u 2u)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.inc library.mod
.tran 5u
.param w=10u/3.6
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 32 336 32
WIRE 688 32 432 32
WIRE 704 32 688 32
WIRE 704 48 704 32
WIRE 768 64 736 64
WIRE 16 96 -48 96
WIRE 80 96 16 96
WIRE 256 96 144 96
WIRE 336 96 336 32
WIRE 336 96 256 96
WIRE 736 96 736 64
WIRE 736 96 704 96
WIRE 768 96 768 64
WIRE 256 144 256 96
WIRE 704 176 704 144
WIRE 656 208 656 128
WIRE -48 240 -48 176
WIRE 256 256 256 224
WIRE 656 320 656 288
SYMBOL cap 144 80 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 20p
SYMBOL voltage 656 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 2
SYMBOL nmos4 656 48 R0
SYMATTR InstName M1
SYMATTR Value2 l=10u w=w
SYMBOL cap 432 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 20p
SYMBOL voltage 256 128 R0
WINDOW 3 -122 166 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 0.1 1n 1n 1n 1u 2u)
SYMATTR InstName V2
SYMBOL res -64 80 R0
SYMATTR InstName R1
SYMATTR Value 10k
FLAG -48 240 0
FLAG 256 256 0
FLAG 656 320 0
FLAG 704 176 0
FLAG 768 96 0
FLAG 688 32 MOS_High_Pass_Filter
FLAG 16 96 ref
TEXT 312 -48 Left 2 !.inc library.mod
TEXT 320 -88 Left 2 !.tran 5u
TEXT 32 -32 Left 2 !.param w=10u/3.6
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3541-2.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3541-2.asy)
V1 IN 0 3.6
L1 N001 OUT1 2.2
C2 OUT2 0 2.2
C1 OUT1 0 10
XU1 IN IN OUT1 MP_01 OUT2 OUT1 0 0 IN N001 LTC3541-2 ;pnba Vin)ENBuck)Vout))LVout)LVin)GND)Mode)ENVLDO)SW
Rload1 OUT1 0 9.375
Rload2 OUT2 0 5
.tran 1m startup
.lib LTC3541-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 924 680
WIRE 96 -48 0 -48
WIRE 256 -48 96 -48
WIRE 416 -48 256 -48
WIRE 0 -32 0 -48
WIRE 256 -32 256 -48
WIRE 96 32 96 -48
WIRE 112 32 96 32
WIRE 416 32 416 -48
WIRE 416 32 400 32
WIRE 0 64 0 48
WIRE 112 144 96 144
WIRE 416 144 400 144
WIRE 512 144 496 144
WIRE 576 144 512 144
WIRE 656 144 576 144
WIRE 576 160 576 144
WIRE 656 160 656 144
WIRE 0 256 -128 256
WIRE 112 256 0 256
WIRE 512 256 512 144
WIRE 512 256 400 256
WIRE 576 256 576 224
WIRE 656 256 656 240
WIRE -128 272 -128 256
WIRE 0 272 0 256
WIRE -128 368 -128 352
WIRE 0 368 0 336
WIRE 112 368 96 368
WIRE 512 368 512 256
WIRE 512 368 400 368
SYMBOL ind 400 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL PowerProducts\\LTC3541-2 256 192 R0
SYMATTR InstName U1
SYMBOL cap 560 160 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMBOL res 640 144 R0
SYMATTR InstName Rload1
SYMATTR Value 9.375
SYMBOL res -144 256 R0
SYMATTR InstName Rload2
SYMATTR Value 5
SYMBOL cap -16 272 R0
SYMATTR InstName C2
SYMATTR Value 2.2
SYMBOL voltage 0 -48 R0
SYMATTR InstName V1
SYMATTR Value 3.6
FLAG 96 368 0
FLAG 0 64 0
FLAG 0 -48 IN
FLAG 96 144 0
FLAG 656 256 0
FLAG 576 256 0
FLAG 656 144 OUT1
FLAG -128 368 0
FLAG 0 368 0
FLAG -128 256 OUT2
TEXT 560 344 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\02f152386e26_Switch-Mode_Power_Supplies_-_Basso-_Figure_1-53.asc
* Generated by LTspice 26.0.1 for Windows.
* --- Transfer Function ---\n \nTransfer_function: 0 transfer\nv1#Input_impedance: -166.667 impedance\nV(b1#Output_impedance): 1e+020 impedance
V1 IN 0 100V
B1 IN 0 I=60/(V(IN)+1u)
.TF I(B1) V1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 1052
WIRE -1520 -832 -1888 -832
WIRE -1488 -832 -1520 -832
WIRE -1888 -752 -1888 -832
WIRE -1520 -736 -1520 -832
WIRE -1888 -576 -1888 -672
WIRE -1520 -576 -1520 -656
WIRE -1520 -576 -1888 -576
WIRE -1520 -544 -1520 -576
IOPIN -1488 -832 Out
RECTANGLE Normal -1952 -864 -1264 -368
SYMBOL bi -1520 -736 R0
SYMATTR InstName B1
SYMATTR Value I=60/(V(IN)+1u)
SYMBOL voltage -1888 -768 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 100V
FLAG -1520 -544 0
FLAG -1488 -832 IN
TEXT -1888 -384 Left 0 !.TF I(B1) V1
TEXT -1888 -544 Left 0 ;--- Transfer Function ---\n \nTransfer_function:               0               transfer\nv1#Input_impedance:              -166.667        impedance\nV(b1#Output_impedance):          1e+020          impedance
* Z:\home\khalils\Downloads\files\data\raw_asc\037613c107d3_NE55501fig.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Misc\NE555.asy)
RA N001 N002 {RA}
Vcc N001 0 {Vcc}
RB N002 N003 {RB}
XU1 0 N003 out N001 NC_01 N003 N002 N001 NE555 ;pnba GND)TRIG)OUT)RST)CV)THRS)DIS)Vcc
RL N001 out {RL}
CA N003 0 {CA}
.param Vcc=?? RA=?? RB=?? RL=?? CA=??
.tran 0.01
.lib NE555.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 -64 -16 -64
WIRE 384 -64 64 -64
WIRE 512 -64 384 -64
WIRE 688 -64 512 -64
WIRE 512 -16 512 -64
WIRE -16 32 -16 -64
WIRE 512 80 512 64
WIRE 512 80 432 80
WIRE 512 96 512 80
WIRE 128 112 96 112
WIRE 384 112 384 -64
WIRE 384 112 352 112
WIRE 688 128 688 -64
WIRE 128 176 96 176
WIRE 432 176 432 80
WIRE 432 176 352 176
WIRE 512 208 512 176
WIRE 512 208 464 208
WIRE -64 240 -80 240
WIRE -16 240 -16 112
WIRE -16 240 -64 240
WIRE 128 240 -16 240
WIRE 464 240 464 208
WIRE 464 240 352 240
WIRE 512 240 512 208
WIRE 64 304 64 -64
WIRE 128 304 64 304
WIRE 96 368 96 176
WIRE 464 368 464 240
WIRE 464 368 96 368
WIRE 512 384 512 304
WIRE 688 384 688 208
WIRE 688 384 512 384
WIRE 512 432 512 384
SYMBOL res 496 -32 R0
SYMATTR InstName RA
SYMATTR Value {RA}
SYMBOL cap 496 240 R0
SYMATTR InstName CA
SYMATTR Value {CA}
SYMBOL Misc\\NE555 240 208 R0
SYMATTR InstName U1
SYMBOL voltage 688 112 R0
WINDOW 0 29 18 Left 2
WINDOW 3 33 91 Left 2
SYMATTR InstName Vcc
SYMATTR Value {Vcc}
SYMBOL res 496 80 R0
SYMATTR InstName RB
SYMATTR Value {RB}
SYMBOL res -32 16 R0
WINDOW 0 -55 38 Left 2
WINDOW 3 -68 67 Left 2
SYMATTR InstName RL
SYMATTR Value {RL}
FLAG 96 112 0
FLAG 512 432 0
FLAG -64 240 out
TEXT -32 400 Left 2 !.param Vcc=?? RA=?? RB=?? RL=?? CA=??
TEXT -32 440 Left 2 !.tran 0.01
* Z:\home\khalils\Downloads\files\data\raw_asc\HalfSlope.asc
* Generated by LTspice 26.0.1 for Windows.
*.ac oct 20 1K 10Meg
* Time domain response of a 3db/octive rolloff
* This example schematic is supplied for informational/educational purposes only.
G2 0 B N001 0 Laplace=1/sqrt(1+1u*s)/(1+5n*s)**2
V1 N001 0 PULSE(0 1 0 1n 1n 5u 10u) AC 1
R1 B 0 1.
.tran 30u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1640 904
WIRE 1344 560 1232 560
WIRE 1488 560 1344 560
WIRE 1232 576 1232 560
WIRE 1344 576 1344 560
WIRE 1184 592 544 592
WIRE 544 608 544 592
WIRE 1184 640 1168 640
WIRE 1168 672 1168 640
WIRE 1232 672 1232 656
WIRE 1344 672 1344 656
WIRE 544 720 544 688
SYMBOL g 1232 560 R0
WINDOW 0 28 24 Left 2
WINDOW 3 -136 160 Left 2
SYMATTR InstName G2
SYMATTR Value Laplace=1/sqrt(1+1u*s)/(1+5n*s)**2
SYMBOL res 1328 560 R0
SYMATTR InstName R1
SYMATTR Value 1.
SYMBOL voltage 544 592 R0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 0 1n 1n 5u 10u) AC 1
FLAG 544 720 0
FLAG 1344 672 0
FLAG 1232 672 0
FLAG 1168 672 0
FLAG 1488 560 B
TEXT 744 800 Left 2 !*.ac oct 20 1K 10Meg
TEXT 744 760 Left 2 !.tran 30u
TEXT 1040 552 Bottom 2 ;Time domain response of a 3db/octive rolloff
TEXT 1000 848 Top 1 ;This example schematic is supplied for informational/educational purposes only.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4651.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4651.asy)
R1 N005 OUT 481K
Rload OUT 0 12
V1 IN 0 24
XU1 OUT 0 IN N004 IN 0 NC_01 NC_02 NC_03 OUT N001 N002 0 N005 N004 NC_04 N001 IN NC_05 NC_06 N003 LTM4651 ;pnba VOUT-)PGND)VIN)COMPB)RUN)GND)CLKIN)PGOOD)PGDFB)SVOUT-)VinREG)FSET)GNDSNS)ISETA)COMPA)EXTVCC)INTVCC)SVIN)SW)ISETB)VD
C3 OUT 0 22 Rser=1m
C2 N003 OUT 4.7
R2 N002 OUT 90.9K
.tran .6m startup
.lib LTM4651.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1176 756
WIRE -48 -176 -96 -176
WIRE -16 -176 -48 -176
WIRE 128 -176 -16 -176
WIRE 224 -176 128 -176
WIRE 336 -144 16 -144
WIRE -96 -112 -96 -176
WIRE 128 -112 128 -176
WIRE 224 -112 224 -176
WIRE 336 -112 336 -144
WIRE 16 -48 16 -144
WIRE 48 -48 16 -48
WIRE 544 -48 512 -48
WIRE -96 -16 -96 -32
WIRE -16 48 -16 -176
WIRE 48 48 -16 48
WIRE 544 48 512 48
WIRE -64 240 -96 240
WIRE 48 240 16 240
WIRE 560 240 512 240
WIRE 560 256 560 240
WIRE 560 336 560 320
WIRE 560 336 512 336
WIRE 656 336 560 336
WIRE 704 336 656 336
WIRE 752 336 704 336
WIRE 656 352 656 336
WIRE 752 352 752 336
WIRE 48 432 16 432
WIRE 560 432 560 336
WIRE 560 432 512 432
WIRE 656 448 656 416
WIRE 752 448 752 432
WIRE 16 528 16 432
WIRE 48 528 16 528
WIRE 288 608 288 592
WIRE 160 624 160 592
WIRE -96 704 -96 240
WIRE 288 704 288 688
WIRE 288 704 -96 704
WIRE 560 704 560 432
WIRE 560 704 288 704
SYMBOL res 32 224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 90.9K
SYMBOL cap 640 352 R0
SYMATTR InstName C3
SYMATTR Value 22
SYMATTR SpiceLine Rser=1m
SYMBOL res 736 336 R0
SYMATTR InstName Rload
SYMATTR Value 12
SYMBOL voltage -96 -128 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 272 592 R0
SYMATTR InstName R1
SYMATTR Value 481K
SYMBOL cap 544 256 R0
SYMATTR InstName C2
SYMATTR Value 4.7
SYMBOL LTM4651 288 240 R0
SYMATTR InstName U1
FLAG -96 -16 0
FLAG 160 624 0
FLAG 752 448 0
FLAG 544 -48 0
FLAG 544 48 0
FLAG -48 -176 IN
FLAG 704 336 OUT
FLAG 656 448 0
TEXT 624 696 Left 2 !.tran .6m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8003.asc
* Generated by LTspice 26.0.1 for Windows.
* 1MHz
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8003.asy)
C2 N001 0 1n
XU2 0 NC_01 NC_02 N001 N002 IN N003 IN OUT 0 LTM8003 ;pnba GND)BIAS)PG)TR/SS)RT)RUN)FB)VIN)VOUT)SYNC
C1 OUT 0 47
R2 0 N003 24.3K
R1 N002 0 41.2K
V1 IN 0 24
Rload OUT 0 3
.tran 1m startup
.lib LTM8003.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 0 -64 -144 -64
WIRE 192 -64 0 -64
WIRE -144 -48 -144 -64
WIRE 192 -32 192 -64
WIRE 0 0 0 -64
WIRE 32 0 0 0
WIRE -144 48 -144 32
WIRE 32 80 16 80
WIRE 464 80 352 80
WIRE 560 80 464 80
WIRE 464 96 464 80
WIRE 560 96 560 80
WIRE -64 160 -96 160
WIRE 32 160 0 160
WIRE 464 192 464 160
WIRE 560 192 560 176
WIRE -80 256 -96 256
WIRE 32 256 0 256
WIRE 368 256 352 256
WIRE 480 256 448 256
WIRE 192 320 192 304
SYMBOL cap 0 144 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL res 464 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 24.3K
SYMBOL res 16 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 41.2K
SYMBOL voltage -144 -64 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL res 544 80 R0
SYMATTR InstName Rload
SYMATTR Value 3
SYMBOL LTM8003 192 144 R0
SYMATTR InstName U2
SYMBOL cap 448 96 R0
SYMATTR InstName C1
SYMATTR Value 47
FLAG -144 48 0
FLAG -96 256 0
FLAG 192 320 0
FLAG 560 192 0
FLAG -144 -64 IN
FLAG 560 80 OUT
FLAG 464 192 0
FLAG 16 80 0
FLAG -96 160 0
FLAG 480 256 0
TEXT 408 344 Left 2 !.tran 1m startup
TEXT -40 304 Top 2 ;1MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\ADA4805.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4805.asy)
Vref N001 0 2.5
R2 OUT N002 1K
R1 N002 N001 1K
V1 +V 0 5
XU1 IN N002 +V 0 OUT +V ADA4805 ;pnba 100)101)102)103)104)106
V2 IN 0 SINE(2.5 0.5 250K)
.tran 50u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 400 -1232 288 -1232
WIRE 496 -1232 480 -1232
WIRE 544 -1232 496 -1232
WIRE 640 -1232 624 -1232
WIRE 288 -1216 288 -1232
WIRE 560 -1152 560 -1168
WIRE 560 -1152 528 -1152
WIRE 560 -1136 560 -1152
WIRE 288 -1120 288 -1136
WIRE 496 -1120 496 -1232
WIRE 544 -1120 496 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 704 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 208 -1072 208 -1088
WIRE 432 -1072 432 -1088
WIRE 528 -1056 528 -1152
WIRE 592 -1056 592 -1072
WIRE 592 -1056 528 -1056
WIRE 560 -1024 560 -1072
WIRE 208 -976 208 -992
WIRE 432 -976 432 -992
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(2.5 0.5 250K)
SYMBOL Opamps\\ADA4805 576 -1104 R0
SYMATTR InstName U1
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 288 -1232 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vref
SYMATTR Value 2.5
SYMBOL voltage 208 -1088 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 496 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
FLAG 208 -1088 +V
FLAG 208 -976 0
FLAG 432 -976 0
FLAG 704 -1104 OUT
FLAG 560 -1024 0
FLAG 432 -1088 IN
FLAG 560 -1168 +V
FLAG 288 -1120 0
TEXT 720 -992 Left 2 !.tran 50u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1193.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1193.asy)
V3 IN 0 SINE(0 10m 1Meg)
V2 -V 0 -5
V1 +V 0 5
R2 N001 0 1K
R1 OUT N001 1K
XU1 IN 0 +V -V OUT 0 N001 NC_01 LT1193 ;pnba In+)In-)V+)V-)OUT)REF)FB)_SHDN
.tran 10u
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -240 96 -512 96
WIRE -512 112 -512 96
WIRE -80 112 -80 96
WIRE -240 128 -240 96
WIRE -144 128 -240 128
WIRE -752 160 -752 144
WIRE -624 160 -624 144
WIRE -144 160 -240 160
WIRE 32 176 -16 176
WIRE 64 176 32 176
WIRE -144 192 -176 192
WIRE -512 208 -512 192
WIRE -240 208 -240 160
WIRE -240 208 -512 208
WIRE -144 224 -176 224
WIRE -512 240 -512 208
WIRE -752 256 -752 240
WIRE -624 256 -624 240
WIRE -80 256 -80 240
WIRE -272 336 -288 336
WIRE -176 336 -176 224
WIRE -176 336 -192 336
WIRE -112 336 -176 336
WIRE 32 336 32 176
WIRE 32 336 -32 336
SYMBOL res -16 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL opamps\\LT1193 -80 176 R0
SYMATTR InstName U1
SYMBOL voltage -624 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -752 144 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL voltage -512 96 R0
SYMATTR Value SINE(0 10m 1Meg)
SYMATTR InstName V3
SYMBOL res -176 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
FLAG -624 256 0
FLAG -80 96 +V
FLAG -624 144 +V
FLAG -80 256 -V
FLAG -752 256 0
FLAG -752 144 -V
FLAG -288 336 0
FLAG -512 240 0
FLAG -176 192 0
FLAG 64 176 OUT
FLAG -512 96 IN
TEXT 40 368 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\006c0adad7a4_CircuitoBS170.asc
* Generated by LTspice 26.0.1 for Windows.
I1 Port2 0 100m
V1 Port1 0 0 AC 1
M1 0 Port1 Port2 Port2 BS170
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model BS170 VDMOS VTO=1.824 RG=270 RS=1.572 RD=1.436 RB=.768 KP=.1233 Cgdmax=20p Cgdmin=3p CGS=28p Cjo=35p Rds=1.2E8 IS=5p Bv=60 Ibv=10u Tt=161.6n
.net V(port2) V1
.ac dec 1000 100 100Meg
.OPTIONS ALLOW_AMBIGUOUS_MODELS
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 2096 680
WIRE 384 -16 240 -16
WIRE 464 -16 384 -16
WIRE 464 16 464 -16
WIRE 240 64 240 -16
WIRE 384 64 384 -16
WIRE 80 144 64 144
WIRE 192 144 80 144
WIRE 80 176 80 144
WIRE 240 176 240 160
WIRE 384 176 384 144
WIRE 384 176 240 176
WIRE 432 176 384 176
WIRE 80 288 80 256
IOPIN 64 144 In
IOPIN 432 176 Out
SYMBOL nmos 192 64 R0
SYMATTR InstName M1
SYMATTR Value BS170
SYMBOL current 384 144 R180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 100m
SYMBOL voltage 80 160 R0
WINDOW 3 24 152 Left 2
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
FLAG 64 144 Port1
FLAG 432 176 Port2
FLAG 80 288 0
FLAG 464 16 0
TEXT -472 -200 Left 2 !.model BS170 VDMOS VTO=1.824 RG=270 RS=1.572 RD=1.436 RB=.768 KP=.1233 Cgdmax=20p Cgdmin=3p CGS=28p Cjo=35p Rds=1.2E8 IS=5p Bv=60 Ibv=10u Tt=161.6n
TEXT 616 96 Left 2 !.net V(port2) V1
TEXT -472 232 Left 2 !.ac dec 1000 100 100Meg
TEXT -464 -168 Left 2 !.OPTIONS ALLOW_AMBIGUOUS_MODELS