Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3650-4.1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 12
L1 N001 N002 6.8
R1 N002 OUT 50m
C1 OUT 0 .2m
C2 N001 N003 1
D1 OUT N003 1N5817
D2 0 N001 MBRS340
XU1 IN IN IN NC_01 NC_02 0 NC_03 NC_04 OUT N002 N003 N001 0 LT3650-4.1 ;pnba Vin)CLP)_SHDN)_CHRG)_Fault)Timer)RNG/SS)NTC)BAT)Sense)Boost)SW)GND
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3650-4.1.asy)
.lib LT3650-4.1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 400 -160 400 -176
WIRE 64 -64 -32 -64
WIRE 80 -64 64 -64
WIRE 400 -64 400 -96
WIRE 400 -64 368 -64
WIRE 432 -64 400 -64
WIRE 544 -64 512 -64
WIRE 560 -64 544 -64
WIRE 656 -64 640 -64
WIRE 720 -64 656 -64
WIRE -32 -48 -32 -64
WIRE 400 -48 400 -64
WIRE 720 -48 720 -64
WIRE 64 32 64 -64
WIRE 80 32 64 32
WIRE 400 32 400 16
WIRE 400 32 368 32
WIRE 448 32 400 32
WIRE 656 32 656 -64
WIRE 656 32 512 32
WIRE 720 32 720 16
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 80 128 64 128
WIRE 544 128 544 -64
WIRE 544 128 368 128
WIRE 656 224 656 32
WIRE 656 224 368 224
WIRE 80 416 64 416
WIRE 224 480 224 464
FLAG 224 480 0
FLAG 64 416 0
FLAG -32 48 0
FLAG 720 32 0
FLAG -32 -64 IN
FLAG 720 -64 OUT
FLAG 400 -176 0
SYMBOL voltage -32 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL ind 416 -48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMBOL res 544 -48 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 50m
SYMBOL cap 704 -48 R0
SYMATTR InstName C1
SYMATTR Value .2m
SYMBOL cap 384 -48 R0
SYMATTR InstName C2
SYMATTR Value 1
SYMBOL schottky 512 16 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL schottky 384 -160 R0
WINDOW 3 38 47 Left 2
SYMATTR Value MBRS340
SYMATTR InstName D2
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL PowerProducts\\LT3650-4.1 224 176 R0
SYMATTR InstName U1
TEXT 552 296 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4450.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4450.asy)
C2 OUT 0 47
XU1 0 IN OUT NC_01 IN 0 LTC4450 ;pnba Vcc)IN)OUT)STATUS)SHDN#)GND
R1 OUT 0 1
C1 IN 0 0.1
V1 IN 0 12
.tran 1m startup
.lib LTC4450.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 952 680
WIRE -192 96 -208 96
WIRE -96 96 -192 96
WIRE -32 96 -96 96
WIRE 16 96 -32 96
WIRE 608 96 480 96
WIRE 688 96 608 96
WIRE 720 96 688 96
WIRE -208 144 -208 96
WIRE 608 144 608 96
WIRE 720 144 720 96
WIRE -96 160 -96 96
WIRE -32 176 -32 96
WIRE 16 176 -32 176
WIRE 608 256 608 208
WIRE 720 256 720 224
WIRE -208 272 -208 224
WIRE -96 272 -96 224
WIRE 144 304 144 272
WIRE 352 304 352 272
WIRE 352 304 144 304
WIRE 352 336 352 304
SYMBOL res 704 128 R0
SYMATTR InstName R1
SYMATTR Value 1
SYMBOL cap 592 144 R0
SYMATTR InstName C2
SYMATTR Value 47
SYMBOL cap -112 160 R0
SYMATTR InstName C1
SYMATTR Value 0.1
SYMBOL LTC4450 240 160 R0
SYMATTR InstName U1
SYMBOL voltage -208 128 R0
SYMATTR InstName V1
SYMATTR Value 12
FLAG 352 336 0
FLAG -96 272 0
FLAG 608 256 0
FLAG -208 272 0
FLAG -192 96 IN
FLAG 688 96 OUT
FLAG 720 256 0
TEXT -216 360 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6228.asc
* Generated by LTspice 26.0.1 for Windows.
* Differential to Single-Ended Converter
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6228.asy)
V3 N003 N006 AC 1
R7 0 N005 101
XU1 N005 N001 N002 +V -V +V LTC6228 ;pnba IN+)IN-)OUT)VCC)VEE)SHDN_L
C1 N002 N001 18p
R6 N005 N007 150
V2 -V 0 -5
R4 N004 N003 49.9
V1 +V 0 5
C2 N004 N007 18p
R1 N002 N001 200
R5 N007 N006 49.9
R2 OUT N002 49.9
R3 N001 N004 348
.ac oct 8 100K 200Meg
.lib LTC6228.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4472 1028
WIRE -2592 -624 -2688 -624
WIRE -2464 -624 -2528 -624
WIRE -3136 -528 -3136 -544
WIRE -2976 -528 -2976 -544
WIRE -2688 -512 -2688 -624
WIRE -2608 -512 -2688 -512
WIRE -2464 -512 -2464 -624
WIRE -2464 -512 -2528 -512
WIRE -3136 -432 -3136 -448
WIRE -2976 -432 -2976 -448
WIRE -2592 -400 -2592 -416
WIRE -2960 -352 -3024 -352
WIRE -2848 -352 -2880 -352
WIRE -2816 -352 -2848 -352
WIRE -2688 -352 -2688 -512
WIRE -2688 -352 -2736 -352
WIRE -2624 -352 -2688 -352
WIRE -2464 -320 -2464 -512
WIRE -2464 -320 -2480 -320
WIRE -2448 -320 -2464 -320
WIRE -2352 -320 -2368 -320
WIRE -3024 -304 -3024 -352
WIRE -2848 -304 -2848 -352
WIRE -2624 -288 -2720 -288
WIRE -2592 -224 -2592 -240
WIRE -2544 -224 -2544 -240
WIRE -3024 -160 -3024 -224
WIRE -2960 -160 -3024 -160
WIRE -2848 -160 -2848 -240
WIRE -2848 -160 -2880 -160
WIRE -2816 -160 -2848 -160
WIRE -2720 -160 -2720 -288
WIRE -2720 -160 -2736 -160
WIRE -2688 -160 -2720 -160
WIRE -2576 -160 -2608 -160
WIRE -2576 -128 -2576 -160
SYMBOL res -2352 -336 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 49.9
SYMBOL res -2864 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 49.9
SYMBOL res -2512 -528 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 200
SYMBOL cap -2864 -304 R0
SYMATTR InstName C2
SYMATTR Value 18p
SYMBOL res -2720 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 348
SYMBOL res -2592 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 101
SYMBOL voltage -3136 -544 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res -2864 -368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 49.9
SYMBOL voltage -3024 -320 R0
WINDOW 123 19 102 Left 2
WINDOW 39 24 117 Left 2
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value ""
SYMBOL voltage -2976 -544 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL cap -2528 -640 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 18p
SYMBOL res -2720 -176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 150
SYMBOL LTC6228 -2592 -320 R0
SYMATTR InstName U1
FLAG -3136 -432 0
FLAG -2976 -432 0
FLAG -3136 -544 +V
FLAG -2976 -544 -V
FLAG -2352 -320 OUT
FLAG -2576 -128 0
FLAG -2592 -416 +V
FLAG -2544 -224 +V
FLAG -2592 -224 -V
TEXT -2424 -136 Left 2 !.ac oct 8 100K 200Meg
TEXT -2944 -624 Bottom 2 ;Differential to Single-Ended Converter
* Z:\home\khalils\Downloads\files\data\raw_asc\06c3a1ae4e78_1716.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LT1716.asy)
V2 N003 0 1
V1 +V 0 5
XU1 N003 N001 +V 0 N002 LT1716 ;pnba In+)In-)V+)V-)OUT
V3 N001 0 PULSE(0 2 0 .5m .5m 0 1m)
.tran 3m
.lib LT1716.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 800
WIRE 208 256 208 224
WIRE 176 272 -320 272
WIRE -320 288 -320 272
WIRE 336 288 240 288
WIRE -448 304 -448 288
WIRE 176 304 64 304
WIRE 64 320 64 304
WIRE 208 336 208 320
WIRE -448 400 -448 384
WIRE -320 400 -320 368
WIRE 64 416 64 400
SYMBOL voltage -320 272 R0
WINDOW 3 17 101 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 2 0 .5m .5m 0 1m)
SYMATTR InstName V3
SYMBOL voltage 64 304 R0
SYMATTR InstName V2
SYMATTR Value 1
SYMBOL Comparators\\LT1716 208 288 R0
SYMATTR InstName U1
SYMBOL voltage -448 288 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG -448 400 0
FLAG -448 288 +V
FLAG 208 224 +V
FLAG -320 400 0
FLAG 64 416 0
FLAG 208 336 0
TEXT 168 416 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\LT6020-1.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
V3 DAC_OUT 0 PULSE(0 2.5 20u 170n 170n 1m 2m)
R1 N002 N001 10K
R2 N001 REF 10K
XU1 DAC_OUT N001 +V -V OUT +V -V LT6020-1 ;pnba IN+)IN-)V+)V-)OUT)EN)DGND
XU2 N003 N002 +V -V N002 +V -V LT6020-1 ;pnba IN+)IN-)V+)V-)OUT)EN)DGND
R3 OUT N003 30K
R4 N003 0 10K
C1 OUT N001 10p
V4 REF 0 2.5
.tran 200u
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6020-1.asy)
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 928 1032
WIRE -96 304 -240 304
WIRE 0 304 -16 304
WIRE 16 304 0 304
WIRE 544 304 96 304
WIRE -240 320 -240 304
WIRE -496 400 -496 384
WIRE -384 400 -384 384
WIRE 0 400 0 304
WIRE 48 400 0 400
WIRE 176 400 112 400
WIRE -240 416 -240 400
WIRE 96 464 64 464
WIRE 96 480 96 464
WIRE -496 496 -496 480
WIRE -384 496 -384 480
WIRE 0 512 0 400
WIRE 48 512 0 512
WIRE 176 528 176 400
WIRE 176 528 160 528
WIRE 272 528 176 528
WIRE 48 544 -224 544
WIRE -224 560 -224 544
WIRE 544 560 544 304
WIRE 544 560 384 560
WIRE 96 592 96 576
WIRE 96 592 64 592
WIRE 272 592 272 528
WIRE 464 608 432 608
WIRE 464 624 464 608
WIRE -224 656 -224 640
WIRE 384 656 384 560
WIRE 416 656 384 656
WIRE 544 672 544 560
WIRE 544 672 528 672
WIRE 272 688 272 672
WIRE 416 688 272 688
WIRE 272 704 272 688
WIRE 464 736 464 720
WIRE 464 736 432 736
WIRE 272 800 272 784
FLAG -496 496 0
FLAG -384 496 0
FLAG -224 656 0
FLAG -224 544 DAC_OUT
FLAG 272 528 OUT
FLAG 96 464 +V
FLAG -496 384 +V
FLAG -384 384 -V
FLAG 96 592 -V
FLAG 464 608 +V
FLAG 464 736 -V
FLAG 272 800 0
FLAG -240 416 0
FLAG -240 304 REF
SYMBOL voltage -496 384 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -384 384 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -224 544 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value PULSE(0 2.5 20u 170n 170n 1m 2m)
SYMBOL res 112 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
SYMBOL res 0 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL LT6020-1 96 528 R0
SYMATTR InstName U1
SYMBOL LT6020-1 464 672 R0
SYMATTR InstName U2
SYMBOL res 256 576 R0
SYMATTR InstName R3
SYMATTR Value 30K
SYMBOL res 256 688 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL cap 112 384 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10p
SYMBOL voltage -240 304 R0
WINDOW 123 24 132 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value 2.5
TEXT 592 784 Left 2 !.tran 200u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1585-3.45.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 PWL(0 0 1 10)
C1 OUT 0 22
Rload OUT 0 500
XU1 0 OUT IN LT1585-3.6 ;pnba GND)OUT)IN
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1585-3.6.asy)
.lib LT1584.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 176 -160 176
WIRE 384 176 288 176
WIRE 480 176 384 176
WIRE -160 192 -160 176
WIRE 384 192 384 176
WIRE 480 192 480 176
WIRE -160 288 -160 272
WIRE 384 288 384 256
WIRE 480 288 480 272
WIRE 160 304 160 272
FLAG -160 288 0
FLAG 384 288 0
FLAG 480 288 0
FLAG 160 304 0
FLAG -160 176 IN
FLAG 480 176 OUT
SYMBOL voltage -160 176 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
SYMBOL cap 368 192 R0
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 464 176 R0
SYMATTR InstName Rload
SYMATTR Value 500
SYMBOL PowerProducts\\LT1585-3.6 160 176 R0
SYMATTR InstName U1
TEXT 272 360 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\07c7d4dba36e_Fig10_5_PMOS.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Id(M1)
VDD N001 0 5
M1 N001 N002 N003 N001 P_1u L=1u W=10u
VSG N001 N002 0
VSD N001 N003 0
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VSD 0 5 1m VSG 0 5 1
.lib cmosedu_models.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 688
WIRE 320 96 320 80
WIRE 320 192 320 176
WIRE 400 192 320 192
WIRE 448 80 320 80
WIRE 448 112 448 80
WIRE 448 304 448 208
WIRE 672 80 448 80
WIRE 672 160 448 160
WIRE 672 160 672 80
WIRE 672 192 672 160
WIRE 672 304 448 304
WIRE 672 304 672 272
WIRE 848 80 672 80
WIRE 848 160 848 80
WIRE 848 272 848 240
SYMBOL voltage 848 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 38 54 Left 0
WINDOW 3 38 82 Left 0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL pmos4 400 112 R0
WINDOW 123 56 100 Left 0
SYMATTR Value2 L=1u W=10u
SYMATTR InstName M1
SYMATTR Value P_1u
SYMBOL voltage 672 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 38 54 Left 0
WINDOW 3 24 104 Invisible 0
SYMATTR InstName VSD
SYMATTR Value 0
SYMBOL voltage 320 80 R0
WINDOW 0 -93 54 Left 0
WINDOW 3 24 104 Invisible 0
SYMATTR InstName VSG
SYMATTR Value 0
FLAG 848 272 0
TEXT 384 336 Left 0 !.dc VSD 0 5 1m VSG 0 5 1
TEXT 384 360 Left 0 !.lib cmosedu_models.txt
TEXT 488 56 Left 0 ;Plot Id(M1)
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG2412.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input\nOnly one channel included\nCrosstalk parameter not included
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG2412.asy)
V1 +V 0 15
C1 vD 0 36p
V3 vS 0 10
XU1 vIN vD vS -V 0 +V ADG2412 ;pnba IN)D)S)Vss)GND)Vdd
R1 vD 0 301
V2 -V 0 -15
V4 vIN 0 pulse(0 5 0 20n 20n 10u 20u)
.tran 75u
.lib ADG2412.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 224 80 224 48
WIRE -208 144 -208 128
WIRE -48 160 -80 160
WIRE 96 160 32 160
WIRE 128 160 96 160
WIRE 352 160 320 160
WIRE 400 160 352 160
WIRE 496 160 400 160
WIRE 400 192 400 160
WIRE 496 208 496 160
WIRE 96 224 -16 224
WIRE 128 224 96 224
WIRE -208 240 -208 224
WIRE 400 288 400 272
WIRE 496 288 496 272
WIRE -208 336 -208 320
WIRE -16 336 -16 224
WIRE 288 352 288 336
WIRE 160 368 160 336
WIRE -208 432 -208 416
WIRE -16 480 -16 416
SYMBOL res 384 176 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage -208 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL ADG2412 224 208 R0
SYMATTR InstName U1
SYMBOL voltage 48 160 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 10
SYMBOL cap 480 208 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -208 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage -16 320 R0
WINDOW 3 19 116 Left 2
SYMATTR Value pulse(0 5 0 20n 20n 10u 20u)
SYMATTR InstName V4
FLAG -208 432 0
FLAG -208 240 0
FLAG -208 128 +V
FLAG -208 320 -V
FLAG -80 160 0
FLAG -16 480 0
FLAG 400 288 0
FLAG 496 288 0
FLAG 224 48 +V
FLAG 160 368 -V
FLAG 288 352 0
FLAG 96 160 vS
FLAG 96 224 vIN
FLAG 352 160 vD
TEXT 8 464 Left 2 !.tran 75u
TEXT -224 -56 Left 2 ;Note:\nSwitch shown for a logic 0 input\nOnly one channel included\nCrosstalk parameter not included
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP160-1.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP160-1.5.asy)
C1 OUT 0 1
XU1 IN 0 N001 OUT ADP16xfd K=666.7u ;pnba Vin)GND)En)Vout
V2 N001 0 PULSE(0 5 100u 50n 50n 2.5m)
V1 IN 0 5
Rload OUT 0 150
.tran 4m
.lib ADP16x.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 96 -48 96
WIRE 400 96 352 96
WIRE 496 96 400 96
WIRE -48 112 -48 96
WIRE 400 112 400 96
WIRE 496 112 496 96
WIRE -48 208 -48 192
WIRE 160 208 16 208
WIRE 400 208 400 176
WIRE 496 208 496 192
WIRE 16 224 16 208
WIRE 256 272 256 256
WIRE 16 320 16 304
SYMBOL cap 384 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage 16 208 R0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 100u 50n 50n 2.5m)
SYMBOL ADP160-1.5 256 208 R0
SYMATTR InstName U1
SYMBOL voltage -48 96 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 480 96 R0
SYMATTR InstName Rload
SYMATTR Value 150
FLAG -48 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 496 208 0
FLAG 496 96 OUT
FLAG -48 96 IN
FLAG 16 320 0
TEXT 528 320 Left 2 !.tran 4m
* Z:\home\khalils\Downloads\files\data\raw_asc\22b7f774dcaa_Assignment_3b__ii_.asc
* Generated by LTspice 26.0.1 for Windows.
* Negative Half Wave Rectifier Circuit (Ideal)
D1 N002 N001 1N4148
R1 N002 0 1000
V1 N001 0 SINE(0 311 50) Rser=0.001
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0.05
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 192 64 80 64
WIRE 352 64 256 64
WIRE 80 112 80 64
WIRE 352 112 352 64
WIRE 80 240 80 192
WIRE 176 240 80 240
WIRE 352 240 352 192
WIRE 352 240 176 240
WIRE 176 272 176 240
SYMBOL voltage 80 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 124 Left 2
SYMATTR SpiceLine Rser=0.001
SYMATTR InstName V1
SYMATTR Value SINE(0 311 50)
SYMBOL diode 256 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res 336 96 R0
SYMATTR InstName R1
SYMATTR Value 1000
FLAG 176 272 0
TEXT 16 272 Left 2 !.tran 0.05
TEXT -8 8 Left 2 ;Negative Half Wave Rectifier Circuit (Ideal)
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8061-4.1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8061-4.1.asy)
C3 N001 0 4.7
C1 OUT 0 .2m
V1 IN 0 12
XU1 N001 N001 N001 N002 N003 0 N005 N004 OUT IN OUT MP_01 0 LTM8061-4.1 ;pnba Vin)VinC/CLP)RUN)_CHRG)_Fault)TMR)RNG/SS)NTC)BAT)VinA)Bias))GND
.tran 3m startup
.lib LTM8061-4.1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 80 -64 -32 -64
WIRE 384 -64 368 -64
WIRE 496 -64 384 -64
WIRE -32 -48 -32 -64
WIRE 496 -48 496 -64
WIRE 80 32 64 32
WIRE 384 32 384 -64
WIRE 384 32 368 32
WIRE 496 32 496 16
WIRE -32 48 -32 32
WIRE 64 128 64 32
WIRE 80 128 64 128
WIRE 384 128 368 128
WIRE -16 224 -32 224
WIRE 64 224 64 128
WIRE 64 224 48 224
WIRE 80 224 64 224
WIRE 384 224 368 224
WIRE 80 320 64 320
WIRE 384 320 368 320
WIRE 80 416 64 416
WIRE 384 416 368 416
SYMBOL voltage -32 -64 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 480 -48 R0
SYMATTR InstName C1
SYMATTR Value .2m
SYMBOL cap 48 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 4.7
SYMBOL PowerProducts\\LTM8061-4.1 224 176 R0
SYMATTR InstName U1
FLAG 64 416 0
FLAG -32 48 0
FLAG 496 32 0
FLAG -32 -64 IN
FLAG 496 -64 OUT
FLAG -32 224 0
FLAG 64 320 0
TEXT 512 416 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\744869a60964_Input.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6244.asy)
V3 N005 0 SINE(0 1 200) AC 1
R3 N002 N001 10k
XU2 N007 N001 VCC 0 N002 LTC6244 ;pnba IN+)IN-)VCC)VEE)OUT
R1 N003 N005 10k
V1 VCC 0 10
R2 N004 N003 10k
R4 N001 N004 10k
XU1 N006 N003 VCC 0 N004 LTC6244 ;pnba IN+)IN-)VCC)VEE)OUT
V4 N007 0 5
C1 N002 N001 8n
V2 N006 0 2.5
.ac dec 100 10m 20k
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 672 -48 608 -48
WIRE 784 -48 736 -48
WIRE 256 48 240 48
WIRE 432 48 336 48
WIRE 608 48 608 -48
WIRE 672 48 608 48
WIRE 784 48 784 -48
WIRE 784 48 752 48
WIRE 16 160 -80 160
WIRE 240 160 240 48
WIRE 240 160 96 160
WIRE 336 160 240 160
WIRE 432 176 432 48
WIRE 432 176 400 176
WIRE 496 176 432 176
WIRE 608 176 608 48
WIRE 608 176 576 176
WIRE 672 176 608 176
WIRE 336 192 160 192
WIRE 784 192 784 48
WIRE 784 192 736 192
WIRE 672 208 608 208
WIRE -80 224 -80 160
WIRE 160 224 160 192
WIRE 608 272 608 208
IOPIN -80 16 Out
IOPIN 368 144 In
IOPIN 704 160 In
SYMBOL Opamps\\LTC6244 704 192 R0
SYMATTR InstName U2
SYMBOL cap 736 -64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 8n
SYMBOL Opamps\\LTC6244 368 176 R0
SYMATTR InstName U1
SYMBOL voltage 160 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 2.5
SYMBOL res 112 144 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 592 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL voltage -80 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL voltage -80 208 R0
WINDOW 123 24 124 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMATTR Value SINE(0 1 200)
SYMBOL res 352 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 768 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL voltage 608 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 5
FLAG 368 208 0
FLAG -80 96 0
FLAG -80 304 0
FLAG 160 304 0
FLAG -80 16 VCC
FLAG 368 144 VCC
FLAG 704 224 0
FLAG 704 160 VCC
FLAG 608 352 0
TEXT -152 328 Left 2 !.ac dec 100 10m 20k
* Z:\home\khalils\Downloads\files\data\raw_asc\1990feb4d35e_Fig18_34.asc
* Generated by LTspice 26.0.1 for Windows.
* Plot Vout A
C2 A N002 1p
M1 VDD VDD A 0 N_50n l=50n w=500n
Vin N001 0 PULSE(1 0 0 0 0 50ns 100ns)
VDD VDD 0 1
M2 A A Vout 0 N_50n l=50n w=500n
M1i N002 N001 0 0 N_50n l=50n w=500n
M2i VDD N001 N002 VDD P_50n l=50n w=500n
Cload Vout 0 1p
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 1u
.lib cmosedu_models.txt
.ic v(vout)=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1472 680
WIRE 208 -368 208 -384
WIRE 208 -352 208 -368
WIRE 208 -240 208 -272
WIRE 208 -96 208 -176
WIRE 208 0 208 -16
WIRE 368 -176 208 -176
WIRE 368 -176 368 -224
WIRE 368 -96 368 -176
WIRE 400 -224 368 -224
WIRE 400 -96 368 -96
WIRE 448 -304 448 -352
WIRE 448 -192 448 -208
WIRE 448 -176 448 -192
WIRE 448 -32 448 -80
WIRE 624 -192 448 -192
WIRE 720 -192 688 -192
WIRE 752 -224 752 -320
WIRE 768 -224 752 -224
WIRE 816 -320 752 -320
WIRE 816 -320 816 -352
WIRE 816 -304 816 -320
WIRE 816 -192 720 -192
WIRE 816 -192 816 -208
WIRE 1008 -192 816 -192
WIRE 1008 -192 1008 -240
WIRE 1024 -192 1008 -192
WIRE 1104 -240 1008 -240
WIRE 1136 -192 1120 -192
WIRE 1168 -192 1136 -192
WIRE 1168 -80 1168 -128
SYMBOL cap 688 -208 R90
WINDOW 0 0 32 VBottom 0
WINDOW 3 32 32 VTop 0
SYMATTR InstName C2
SYMATTR Value 1p
SYMBOL voltage 208 -112 R0
WINDOW 0 -72 21 Left 0
WINDOW 3 31 116 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value PULSE(1 0 0 0 0 50ns 100ns)
SYMBOL nmos4 400 -176 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1i
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 208 -368 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL nmos4 768 -304 R0
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL cap 1152 -192 R0
WINDOW 0 40 24 Left 0
SYMATTR InstName Cload
SYMATTR Value 1p
SYMBOL pmos4 400 -304 R0
WINDOW 0 88 9 Right 0
WINDOW 3 168 20 Right 0
WINDOW 123 206 76 Right 0
SYMATTR InstName M2i
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 1024 -240 M90
WINDOW 0 104 24 Right 0
WINDOW 3 179 41 Right 0
WINDOW 123 213 74 Right 0
SYMATTR InstName M2
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
FLAG 208 0 0
FLAG 1136 -192 Vout
FLAG 448 -128 0
FLAG 208 -240 0
FLAG 208 -368 VDD
FLAG 448 -256 VDD
FLAG 448 -32 0
FLAG 448 -352 VDD
FLAG 1168 -80 0
FLAG 1072 -192 0
FLAG 816 -256 0
FLAG 816 -352 VDD
FLAG 720 -192 A
TEXT 704 -32 Left 0 !.tran 1u
TEXT 704 -8 Left 0 !.lib cmosedu_models.txt
TEXT 592 -424 Left 0 ;Plot Vout A
TEXT 808 -32 Left 0 !.ic v(vout)=0