Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\411a0340b954_sallen_key_3rd_order_butterworth.asc
* Generated by LTspice 26.0.1 for Windows.
R3 N004 N001 12k
C1 N003 0 1n
R2 N001 N003 22k
V1 Vin 0 AC 1
R1 N003 Vin 6k8
C2 N002 N001 1n
XU1 N004 N002 N002 opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
.ac dec 100 1 50k
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 932 680
WIRE 560 -16 512 -16
WIRE 832 -16 624 -16
WIRE 128 144 64 144
WIRE 192 144 128 144
WIRE 320 144 272 144
WIRE 384 144 320 144
WIRE 512 144 512 -16
WIRE 512 144 464 144
WIRE 560 144 512 144
WIRE 688 144 640 144
WIRE 320 160 320 144
WIRE 832 160 832 -16
WIRE 832 160 752 160
WIRE 864 160 832 160
WIRE 928 160 864 160
WIRE 688 176 656 176
WIRE 656 224 656 176
WIRE 864 224 864 160
WIRE 864 224 656 224
SYMBOL voltage 64 128 R0
WINDOW 0 -58 21 Left 2
WINDOW 3 -52 92 Left 2
WINDOW 123 -52 120 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL cap 304 160 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 288 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 6k8
SYMBOL OpAmps\\opamp 720 96 R0
SYMATTR InstName U1
SYMBOL res 656 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 12k
SYMBOL res 480 128 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 22k
SYMBOL cap 624 -32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1n
FLAG 320 224 0
FLAG 128 144 Vin
FLAG 64 224 0
TEXT 4 268 Left 2 !.ac dec 100 1 50k
TEXT 8 296 Left 2 !.lib opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8622S.asc
* Generated by LTspice 26.0.1 for Windows.
* 2MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8622S.asy)
R3 OUT PGFB 280k
L1 SW OUT 1 Rser=6m
R6 OUT PG 100k
Rload OUT 0 1.6
C1 SET 0 1
R4 N002 N003 500
C2 OUT 0 120 Rser=5m
R1 N001 0 47k
C3 N002 0 2n
R2 PGFB 0 49.9k
R5 SET 0 33.2k
XU1 SW N004 0 CLKout IN NC_01 IN IN N004 N004 SET N003 OUT PGFB N001 PG LT8622S ;pnba SW)Sync/Mode)GND)CLKout)PVin)BST)SVin)EN/UVLO)INTVcc)PHMode)SET)Vc)OUTS)PGFB)RT)PG
V1 IN 0 12
.tran 1.5m startup
.lib LT8622S.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1080 680
WIRE 96 -128 -64 -128
WIRE 272 -128 96 -128
WIRE -64 -112 -64 -128
WIRE 272 -112 272 -128
WIRE 96 -64 96 -128
WIRE 128 -64 96 -64
WIRE -64 -16 -64 -32
WIRE 96 32 96 -64
WIRE 128 32 96 32
WIRE 448 32 416 32
WIRE 512 32 448 32
WIRE 688 32 592 32
WIRE -32 128 -64 128
WIRE 128 128 48 128
WIRE 448 128 416 128
WIRE 512 128 448 128
WIRE 688 128 688 32
WIRE 688 128 592 128
WIRE 768 128 688 128
WIRE 880 128 768 128
WIRE 976 128 880 128
WIRE 976 144 976 128
WIRE 880 160 880 128
WIRE 768 176 768 128
WIRE -80 224 -96 224
WIRE 16 224 -16 224
WIRE 128 224 96 224
WIRE 688 224 688 128
WIRE 688 224 416 224
WIRE 880 240 880 224
WIRE 976 240 976 224
WIRE 128 320 96 320
WIRE 464 320 416 320
WIRE 768 320 768 256
WIRE 768 320 464 320
WIRE 768 336 768 320
WIRE 96 416 96 320
WIRE 128 416 96 416
WIRE 448 416 416 416
WIRE 592 416 448 416
WIRE 672 416 592 416
WIRE 672 432 672 416
WIRE 768 432 768 416
WIRE 592 448 592 416
WIRE 96 512 96 416
WIRE 128 512 96 512
WIRE 448 512 416 512
WIRE 592 528 592 512
WIRE 672 528 672 512
WIRE 272 592 272 576
SYMBOL res 656 416 R0
SYMATTR InstName R5
SYMATTR Value 33.2k
SYMBOL res 64 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 47k
SYMBOL res 0 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 500
SYMBOL res 960 128 R0
SYMATTR InstName Rload
SYMATTR Value 1.6
SYMBOL ind 496 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 1
SYMATTR SpiceLine Rser=6m
SYMBOL voltage -64 -128 R0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL res 608 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 100k
SYMBOL res 752 160 R0
SYMATTR InstName R3
SYMATTR Value 280k
SYMBOL res 752 320 R0
SYMATTR InstName R2
SYMATTR Value 49.9k
SYMBOL cap -16 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 2n
SYMBOL LT8622S 272 192 R0
SYMATTR InstName U1
SYMBOL cap 864 160 R0
SYMATTR InstName C2
SYMATTR Value 120
SYMATTR SpiceLine Rser=5m
SYMBOL cap 576 448 R0
SYMATTR InstName C1
SYMATTR Value 1
FLAG -64 -16 0
FLAG -64 128 0
FLAG 272 592 0
FLAG 768 432 0
FLAG 976 240 0
FLAG -96 224 0
FLAG 976 128 OUT
FLAG -64 -128 IN
FLAG 672 528 0
FLAG 592 528 0
FLAG 880 240 0
FLAG 448 512 CLKout
FLAG 448 32 PG
FLAG 448 128 SW
FLAG 464 320 PGFB
FLAG 448 416 SET
TEXT 728 552 Left 2 !.tran 1.5m startup
TEXT 48 104 Left 2 ;2MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\5005cd1dfa35_4x1Mux.asc
* Generated by LTspice 26.0.1 for Windows.
* differ the 10m and 20m foe each voltage source
A1 S1 0 0 0 0 N002 0 0 BUF
A2 S0 0 0 0 0 N001 0 0 BUF
A3 0 N001 N002 D0 0 N003 0 0 AND
A4 0 N001 S1 D1 0 N004 0 0 AND
A5 0 S0 N002 D2 0 N005 0 0 AND
A6 0 S0 S1 D3 0 N006 0 0 AND
A7 N003 N004 N005 N006 0 Y 0 0 OR
V1 D1 0 V
V4 D3 0 V
V6 S1 0 V
V5 S0 0 V
V2 D2 0 V
V3 D0 0 PULSE(0 5 0 2n 2n 10m 20m)
.tran 100ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 892 680
WIRE 96 -32 96 -80
WIRE 96 -32 64 -32
WIRE 208 -32 208 -80
WIRE 208 -32 176 -32
WIRE 96 0 96 -32
WIRE 208 0 208 -32
WIRE 96 96 96 64
WIRE 304 96 96 96
WIRE 208 112 208 64
WIRE 304 112 208 112
WIRE 304 128 16 128
WIRE 512 128 368 128
WIRE 96 208 96 96
WIRE 304 208 96 208
WIRE 176 224 176 -32
WIRE 304 224 176 224
WIRE 304 240 16 240
WIRE 464 240 368 240
WIRE 512 272 512 128
WIRE 576 272 512 272
WIRE 464 288 464 240
WIRE 576 288 464 288
WIRE 576 304 464 304
WIRE 64 320 64 -32
WIRE 304 320 64 320
WIRE 576 320 512 320
WIRE 720 320 640 320
WIRE 208 336 208 112
WIRE 304 336 208 336
WIRE 304 352 16 352
WIRE 464 352 464 304
WIRE 464 352 368 352
WIRE 64 432 64 320
WIRE 304 432 64 432
WIRE 176 448 176 224
WIRE 304 448 176 448
WIRE 304 464 16 464
WIRE 512 464 512 320
WIRE 512 464 368 464
WIRE 64 496 64 432
WIRE 96 496 96 208
WIRE 176 496 176 448
WIRE 208 496 208 336
IOPIN 16 128 In
IOPIN 16 240 In
IOPIN 16 352 In
IOPIN 16 464 In
IOPIN 96 -80 In
IOPIN 208 -80 In
IOPIN 720 320 Out
IOPIN -336 -64 Out
IOPIN -336 128 Out
IOPIN -336 304 Out
IOPIN 800 -48 Out
IOPIN 800 144 Out
IOPIN 816 384 Out
SYMBOL Digital\\or 608 240 R0
SYMATTR InstName A7
SYMBOL Digital\\inv 160 0 R90
SYMATTR InstName A2
SYMBOL voltage -336 112 R0
SYMATTR InstName V1
SYMBOL voltage 800 128 R0
SYMATTR InstName V5
SYMBOL voltage 816 368 R0
SYMATTR InstName V6
SYMBOL Digital\\and 336 384 R0
SYMATTR InstName A6
SYMBOL Digital\\and 336 160 R0
SYMATTR InstName A4
SYMBOL voltage -336 288 R0
SYMATTR InstName V2
SYMBOL Digital\\and 336 272 R0
SYMATTR InstName A5
SYMBOL Digital\\inv 272 0 R90
SYMATTR InstName A1
SYMBOL voltage 800 -64 R0
SYMATTR InstName V4
SYMBOL Digital\\and 336 48 R0
SYMATTR InstName A3
SYMBOL voltage -336 -80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 2n 2n 10m 20m)
FLAG 16 128 D0
FLAG 16 240 D1
FLAG 16 352 D2
FLAG 16 464 D3
FLAG 96 -80 S0
FLAG 208 -80 S1
FLAG 720 320 Y
FLAG -336 16 0
FLAG -336 208 0
FLAG -336 384 0
FLAG 800 32 0
FLAG 800 224 0
FLAG 816 464 0
FLAG -336 -64 D0
FLAG -336 128 D1
FLAG -336 304 D2
FLAG 800 -48 D3
FLAG 800 144 S0
FLAG 816 384 S1
TEXT -264 496 Left 2 !.tran 100ms
TEXT -56 576 Left 2 ;differ the 10m and 20m foe each voltage source
* Z:\home\khalils\Downloads\files\data\raw_asc\014964ce055b_Single-phase-rectifier-R-load-smoothing-capacitor.asc
* Generated by LTspice 26.0.1 for Windows.
* Single phase AC/DC converter (rectifier)
* Resistive load with smoothing capacitor
V1 N001 N002 SINE(0 5 60)
D2 0 N002 D
D1 N001 OUT D
C1 OUT 0 50m
R2 OUT 0 250
D4 0 N001 D
D3 N002 OUT D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 0 0.1s 0 0.06ms
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1252 680
WIRE 464 176 320 176
WIRE 608 176 464 176
WIRE 720 176 608 176
WIRE 320 192 320 176
WIRE 464 192 464 176
WIRE 320 288 320 256
WIRE 320 288 0 288
WIRE 0 304 0 288
WIRE 608 304 608 176
WIRE 720 304 720 176
WIRE 0 416 0 384
WIRE 464 416 464 256
WIRE 464 416 0 416
WIRE 320 432 320 288
WIRE 464 432 464 416
WIRE 320 528 320 496
WIRE 464 528 464 496
WIRE 464 528 320 528
WIRE 608 528 608 368
WIRE 608 528 464 528
WIRE 720 528 720 384
WIRE 720 528 608 528
WIRE 608 544 608 528
SYMBOL res 704 288 R0
SYMATTR InstName R2
SYMATTR Value 250
SYMBOL cap 592 304 R0
SYMATTR InstName C1
SYMATTR Value 50m
SYMBOL diode 336 496 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMBOL diode 336 256 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMBOL voltage 0 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0 5 60)
SYMBOL diode 480 496 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMBOL diode 480 256 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
FLAG 608 544 0
FLAG 720 176 OUT
TEXT 0 224 Left 2 !.tran 0 0.1s 0 0.06ms
TEXT 96 112 Left 2 ;Single phase AC/DC converter (rectifier)
TEXT 136 624 Left 2 ;Resistive load with smoothing capacitor
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1798.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 0 N001 OUT OUT LTC1798 ;pnba GND)Vin)FB)OUT
V1 N001 0 PWL(0 0 1 10)
.tran 1
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1798.asy)
.lib LTC1798.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 144 -176 144
WIRE -176 160 -176 144
WIRE 160 160 160 144
WIRE 288 208 272 208
WIRE 304 208 288 208
WIRE -176 256 -176 240
WIRE 288 304 288 208
WIRE 288 304 272 304
WIRE 160 368 160 352
FLAG -176 256 0
FLAG 160 368 0
FLAG 304 208 OUT
SYMBOL PowerProducts\\LTC1798 160 256 R0
SYMATTR InstName U1
SYMBOL voltage -176 144 R0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1 10)
TEXT 320 352 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1124.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
R1 OUT N001 364.76K
R2 N001 0 365
V3 IN 0 ac 1
XU1 N002 N001 +V -V OUT LT1124 ;pnba In+)In-)V+)V-)OUT
R3 N002 IN 365
.ac oct 100 1m 1Meg
* Gain 1000 Amplifier with 0.01% Accuracy, DC to 1Hz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1124.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -64 96 -80 96
WIRE 32 96 16 96
WIRE 48 96 32 96
WIRE 160 96 128 96
WIRE -336 160 -336 144
WIRE -208 160 -208 144
WIRE 96 208 96 192
WIRE 32 224 32 96
WIRE 64 224 32 224
WIRE 160 240 160 96
WIRE 160 240 128 240
WIRE 208 240 160 240
WIRE -336 256 -336 240
WIRE -208 256 -208 240
WIRE -48 256 -96 256
WIRE 64 256 32 256
WIRE -96 272 -96 256
WIRE 96 288 96 272
WIRE -96 368 -96 352
FLAG -208 256 0
FLAG 96 192 +V
FLAG -208 144 +V
FLAG 96 288 -V
FLAG -336 256 0
FLAG -336 144 -V
FLAG -80 96 0
FLAG -96 368 0
FLAG 208 240 OUT
FLAG -96 256 IN
SYMBOL voltage -208 144 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -336 144 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL res 144 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 364.76K
SYMBOL res 32 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 365
SYMBOL voltage -96 256 R0
WINDOW 0 25 19 Left 2
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL opamps\\LT1124 96 176 R0
SYMATTR InstName U1
SYMBOL res 48 240 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 365
TEXT 48 344 Left 2 !.ac oct 100 1m 1Meg
TEXT -96 48 Bottom 2 ;Gain 1000 Amplifier with 0.01% Accuracy, DC to 1Hz
* Z:\home\khalils\Downloads\files\data\raw_asc\44bc52c0737d_BT-CE-TRAN.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 {Uce}
Q1 N001 N002 0 0 BC547B
Ibb 0 N002 0
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc Ibb 0 200uA 10uA
.step param Uce list 5V 20V
.meas dc Ib find Ib(Q1) when Ic(Q1)=20mA
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 368 16 208 16
WIRE 208 80 208 16
WIRE 368 96 368 16
WIRE 144 128 32 128
WIRE 32 144 32 128
WIRE 32 256 32 224
WIRE 208 256 208 176
WIRE 368 256 368 176
SYMBOL npn 144 80 R0
SYMATTR InstName Q1
SYMATTR Value BC547B
SYMBOL voltage 368 80 R0
WINDOW 3 35 85 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 0 35 57 Left 2
SYMATTR Value {Uce}
SYMATTR InstName V2
SYMBOL current 32 224 R180
WINDOW 0 -63 0 Left 2
WINDOW 3 -66 28 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Ibb
SYMATTR Value 0
FLAG 208 256 0
FLAG 32 256 0
FLAG 368 256 0
TEXT 56 272 Left 2 !.dc Ibb 0 200uA 10uA
TEXT 56 288 Left 2 !.step param Uce list 5V 20V
TEXT 56 304 Left 2 !.meas dc Ib find Ib(Q1) when Ic(Q1)=20mA
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4411.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4411.asy)
RLoad N002 0 10
VBattery N001 0 3.6
C1 N002 0 4.7
Vcc N004 0 5
R2 N003 N004 470K
XU1 N001 0 0 N003 N002 LTC4411 ;pnba Vin)GND)CTL)STAT)OUT
.tran 1m startup
.lib LTC4411.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 16 144 -144 144
WIRE 320 144 272 144
WIRE 416 144 320 144
WIRE -144 160 -144 144
WIRE 320 160 320 144
WIRE 416 160 416 144
WIRE 16 224 0 224
WIRE -144 256 -144 240
WIRE 320 256 320 224
WIRE 416 256 416 240
WIRE 16 304 0 304
WIRE 320 304 272 304
WIRE 432 304 400 304
WIRE 432 320 432 304
WIRE 432 416 432 400
SYMBOL LTC4411 144 224 R0
SYMATTR InstName U1
SYMBOL res 400 144 R0
SYMATTR InstName Load
SYMATTR Value 10
SYMBOL voltage -144 144 R0
WINDOW 0 17 15 Left 2
WINDOW 3 21 97 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Battery
SYMATTR Value 3.6
SYMBOL voltage 432 304 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName Vcc
SYMATTR Value 5
SYMBOL cap 304 160 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL res 304 320 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 470K
FLAG 0 224 0
FLAG -144 256 0
FLAG 0 304 0
FLAG 320 256 0
FLAG 416 256 0
FLAG 432 416 0
TEXT 104 392 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG733.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 1.5
V2 N003 0 0
V3 N004 0 PULSE(0 3 0 20n 20n 10u 20u)
R1 N002 0 301
C1 N002 0 36p
V4 -V 0 -2.5
XU1 N004 N001 N002 N003 +V 0 0 -V ADG733 ;pnba IN)SA)D)SB)Vdd)GND)EN)Vss
V5 +V 0 2.5
.tran 100u
* Note:\nCharge Injection not included\nCrosstalk at -72dB\nOnly One channel included\nSwitch shown for a logic 0 input
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG733.asy)
.lib ADG733.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2888 1548
WIRE -1600 -336 -1600 -368
WIRE -1696 -272 -1920 -272
WIRE -1920 -256 -1920 -272
WIRE -1408 -240 -1504 -240
WIRE -1296 -240 -1408 -240
WIRE -1408 -224 -1408 -240
WIRE -1296 -224 -1296 -240
WIRE -1696 -208 -1840 -208
WIRE -1840 -192 -1840 -208
WIRE -1920 -160 -1920 -176
WIRE -1696 -144 -1760 -144
WIRE -1472 -144 -1504 -144
WIRE -1472 -128 -1472 -144
WIRE -1408 -128 -1408 -144
WIRE -1296 -128 -1296 -160
WIRE -1840 -96 -1840 -112
WIRE -1760 -64 -1760 -144
WIRE -1536 -16 -1536 -32
WIRE -1664 0 -1664 -32
WIRE -1760 48 -1760 16
FLAG -1920 -160 0
FLAG -1840 -96 0
FLAG -1760 48 0
FLAG -1600 -368 +V
FLAG -1408 -128 0
FLAG -1536 -16 0
FLAG -1296 -128 0
FLAG -2048 -64 0
FLAG -2048 -144 -V
FLAG -1472 -128 0
FLAG -2144 -64 0
FLAG -2144 -144 +V
FLAG -1664 0 -V
SYMBOL voltage -1920 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1.5
SYMBOL voltage -1840 -208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 0
SYMBOL voltage -1760 -80 R0
WINDOW 3 24 136 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value PULSE(0 3 0 20n 20n 10u 20u)
SYMATTR InstName V3
SYMBOL res -1424 -240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL cap -1312 -224 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL voltage -2048 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -2.5
SYMBOL ADG733 -1600 -192 R0
SYMATTR InstName U1
SYMBOL voltage -2144 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V5
SYMATTR Value 2.5
TEXT -1360 -40 Left 2 !.tran 100u
TEXT -2160 -472 Left 2 ;Note:\nCharge Injection not included\nCrosstalk at -72dB\nOnly One channel included\nSwitch shown for a logic 0 input
* Z:\tmp\asc_dec_bjh7r6w2\13d533ed9689_decoder_amplifaer_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 out Ep Ep PMOS l=260e-9 w=2600e-9 ad=676000e-18 as=676000e-18 pd=3640e-9 ps=3640e-9
V2 Ep 0 PWL(0 0 3.5e-8 0 3.5001e-8 1.8 4.5e-8 1.8 4.5001e-8 0)
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 64 32 48 32
WIRE 176 32 64 32
WIRE 272 32 176 32
WIRE 288 32 272 32
WIRE 128 48 112 48
WIRE 224 48 192 48
WIRE 48 80 48 32
WIRE 64 80 48 80
WIRE 288 80 288 32
WIRE 288 80 272 80
WIRE 64 144 64 128
WIRE 128 144 192 48
WIRE 128 144 64 144
WIRE 192 144 128 48
WIRE 272 144 272 128
WIRE 272 144 192 144
WIRE 64 176 64 144
WIRE 272 176 272 144
WIRE 80 224 64 224
WIRE 272 224 256 224
WIRE 16 256 -144 256
WIRE 80 272 80 224
WIRE 80 272 64 272
WIRE 160 272 80 272
WIRE 256 272 256 224
WIRE 256 272 160 272
WIRE 272 272 256 272
WIRE 160 288 160 272
WIRE 16 400 16 256
SYMBOL pmos4 112 128 R180
SYMATTR InstName M1
SYMATTR Value2 l=260e-9 w=2600e-9 ad=676000e-18 as=676000e-18 pd=3640e-9 ps=3640e-9
SYMBOL voltage -656 -128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PWL(0 0 3.5e-8 0 3.5001e-8 1.8 4.5e-8 1.8 4.5001e-8 0)
FLAG 160 288 0
FLAG 176 32 Ep
FLAG 272 176 out
FLAG -656 -32 0
FLAG -656 -112 Ep
FLAG -656 64 dec
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7150-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7150-2.8.asy)
C2 N002 0 1
C3 OUT 0 10
V1 IN 0 6.2
C1 N004 0 10 Rser=10m Lser=1n
C4 N003 0 1
XU1 N004 OUT N002 0 N003 N003 N001 IN ADM7150_1 Vreg=3.5 Vref=2.812 ;pnba Vreg)Vout)Byp)GND)Ref_Sense)Ref)EN)Vin
R5 OUT 0 18
R3 IN N001 100K
.tran 5m startup
.lib ADM7150_1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 856
WIRE -32 32 -160 32
WIRE 80 32 -32 32
WIRE 464 32 400 32
WIRE 560 32 464 32
WIRE -160 48 -160 32
WIRE 464 48 464 32
WIRE 560 48 560 32
WIRE -32 128 -32 32
WIRE -16 128 -32 128
WIRE 80 128 64 128
WIRE -160 144 -160 128
WIRE 464 144 464 112
WIRE 560 144 560 128
WIRE 0 224 -16 224
WIRE 80 224 64 224
WIRE 416 224 400 224
WIRE 464 224 416 224
WIRE 464 240 464 224
WIRE 0 320 -16 320
WIRE 80 320 64 320
WIRE 416 320 416 224
WIRE 416 320 400 320
WIRE 464 320 464 304
WIRE 240 400 240 384
SYMBOL res 544 32 R0
SYMATTR InstName R5
SYMATTR Value 18
SYMBOL cap 448 48 R0
SYMATTR InstName C3
SYMATTR Value 10
SYMBOL ADM7150-2.8 240 176 R0
SYMATTR InstName U1
SYMBOL voltage -160 32 R0
SYMATTR InstName V1
SYMATTR Value 6.2
SYMBOL cap 64 304 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR Value2 Rser=10m
SYMATTR SpiceLine Lser=1n
SYMBOL cap 448 240 R0
WINDOW 0 36 14 Left 2
WINDOW 3 36 50 Left 2
SYMATTR InstName C4
SYMATTR Value 1
SYMBOL res -32 144 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 64 208 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 1
FLAG 240 400 0
FLAG 464 320 0
FLAG 464 144 0
FLAG -16 320 0
FLAG -16 224 0
FLAG -160 144 0
FLAG 560 144 0
FLAG -160 32 IN
FLAG 560 32 OUT
TEXT 552 448 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\260c2ad652f1_passabaixa-corte1k.asc
* Generated by LTspice 26.0.1 for Windows.
V1 in N002 SINE(0 1m 1k) AC 1
V2 N002 0 SINE(0 0 0)
E1 out 0 0 N001 1000000
R2 out N001 {R2}
C1 out N001 {CAP}
R1 N001 in {R1}
.ac dec 5m 1 10MEG
.MEAS AC gain max mag(V(out))
.meas AC meas_3db trig mag(V(out))=gain/sqrt(2)
.step param run 1 500 1
.param R2=mc(100k,0.025) CAP=mc(1.59n,0.025) R1=mc(1k,0.025)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1024 680
WIRE 144 48 96 48
WIRE 240 48 208 48
WIRE 96 112 96 48
WIRE 128 112 96 112
WIRE 240 112 240 48
WIRE 240 112 208 112
WIRE -64 192 -128 192
WIRE 96 192 96 112
WIRE 96 192 16 192
WIRE -128 208 -128 192
WIRE 240 208 240 112
WIRE 240 208 192 208
WIRE 288 208 240 208
WIRE 96 224 96 192
WIRE 144 224 96 224
WIRE -128 304 -128 288
WIRE 144 304 144 272
WIRE 192 304 192 288
SYMBOL res 224 96 R90
WINDOW 0 35 57 VBottom 2
WINDOW 3 63 57 VBottom 2
SYMATTR InstName R2
SYMATTR Value {R2}
SYMBOL Misc\\signal -128 192 R0
WINDOW 3 0 48 Left 2
WINDOW 123 13 75 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value SINE(0 1m 1k)
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMBOL e2 192 192 R0
SYMATTR InstName E1
SYMATTR Value 1000000
SYMBOL cap 208 32 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value {CAP}
SYMBOL res 32 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 28 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value {R1}
SYMBOL Misc\\signal -128 288 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value SINE(0 0 0)
FLAG -128 192 in
FLAG 288 208 out
FLAG 144 304 0
FLAG 192 304 0
FLAG -128 384 0
TEXT 280 184 Left 2 !.ac dec 5m 1 10MEG
TEXT 280 88 Left 2 !.MEAS AC gain max mag(V(out))
TEXT 280 104 Left 2 !.meas AC meas_3db trig mag(V(out))=gain/sqrt(2)
TEXT 280 168 Left 2 !.step param run 1 500 1
TEXT 280 152 Left 2 !.param R2=mc(100k,0.025) CAP=mc(1.59n,0.025) R1=mc(1k,0.025)