Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1193.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 5
V2 -V 0 -5
R1 OUT N001 1K
R2 N001 0 1K
V3 IN 0 SINE(0 10m 1Meg)
XU1 IN 0 +V -V OUT 0 N001 NC_01 LT1193 ;pnba In+)In-)V+)V-)OUT)REF)FB)_SHDN
.tran 10u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1193.asy)
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -240 96 -512 96
WIRE -512 112 -512 96
WIRE -80 112 -80 96
WIRE -240 128 -240 96
WIRE -144 128 -240 128
WIRE -752 160 -752 144
WIRE -624 160 -624 144
WIRE -144 160 -240 160
WIRE 32 176 -16 176
WIRE 64 176 32 176
WIRE -144 192 -176 192
WIRE -512 208 -512 192
WIRE -240 208 -240 160
WIRE -240 208 -512 208
WIRE -144 224 -176 224
WIRE -512 240 -512 208
WIRE -752 256 -752 240
WIRE -624 256 -624 240
WIRE -80 256 -80 240
WIRE -272 336 -288 336
WIRE -176 336 -176 224
WIRE -176 336 -192 336
WIRE -112 336 -176 336
WIRE 32 336 32 176
WIRE 32 336 -32 336
FLAG -624 256 0
FLAG -80 96 +V
FLAG -624 144 +V
FLAG -80 256 -V
FLAG -752 256 0
FLAG -752 144 -V
FLAG -288 336 0
FLAG -512 240 0
FLAG -176 192 0
FLAG 64 176 OUT
FLAG -512 96 IN
SYMBOL voltage -624 144 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -752 144 R0
SYMATTR InstName V2
SYMATTR Value -5
SYMBOL res -16 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res -176 320 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage -512 96 R0
SYMATTR Value SINE(0 10m 1Meg)
SYMATTR InstName V3
SYMBOL opamps\\LT1193 -80 176 R0
SYMATTR InstName U1
TEXT 40 368 Left 2 !.tran 10u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3485-0.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3485-0.asy)
V1 N001 0 5
D1 N003 OUT D
L1 N002 N005 10 Rpar=2K Rser=.1
C1 OUT 0 .1
L2 0 N003 {10u*10.2*10.2} Rpar=1Meg
K1 L1 L2 1
R3 N004 N001 10K
V3 N007 0 PWL(30m 0 30.01m 3 30.1m 3 30.11m 0)
XU1 N001 N002 N001 N005 MP_01 N008 N007 N001 N004 N006 0 LT3485-0 ;pnba Charge)Vbat)Vin)SW))IBGTout)IBGTin)IBGTpwr)_Done)Vmont)GND
V2 N002 0 3
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 50m startup
.lib LT3485-0.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3528 1804
WIRE 1936 1152 1936 1136
WIRE 1712 1248 1520 1248
WIRE 1824 1248 1712 1248
WIRE 1936 1248 1936 1232
WIRE 2064 1248 1936 1248
WIRE 2224 1248 2112 1248
WIRE 2368 1248 2288 1248
WIRE 2064 1264 2064 1248
WIRE 2112 1264 2112 1248
WIRE 2368 1264 2368 1248
WIRE 1712 1296 1712 1248
WIRE 1824 1296 1824 1248
WIRE 1936 1296 1936 1248
WIRE 1520 1360 1520 1248
WIRE 1568 1360 1520 1360
WIRE 1664 1360 1648 1360
WIRE 2064 1360 2064 1344
WIRE 2064 1360 1984 1360
WIRE 2112 1360 2112 1344
WIRE 2368 1360 2368 1328
WIRE 1520 1440 1520 1360
WIRE 1664 1440 1520 1440
WIRE 2016 1440 1984 1440
WIRE 1520 1456 1520 1440
WIRE 1664 1520 1600 1520
WIRE 2016 1520 1984 1520
WIRE 1520 1552 1520 1536
WIRE 1600 1552 1600 1520
WIRE 1824 1600 1824 1584
WIRE 1600 1664 1600 1632
SYMBOL misc\\battery 1936 1248 M180
WINDOW 0 25 87 Left 2
WINDOW 3 24 16 Left 2
SYMATTR InstName V2
SYMATTR Value 3
SYMBOL ind2 2128 1360 R180
WINDOW 0 -3 72 Right 2
WINDOW 3 0 43 Right 2
SYMATTR InstName L2
SYMATTR Value {10u*10.2*10.2}
SYMATTR SpiceLine Rpar=1Meg
SYMBOL ind2 2048 1248 R0
WINDOW 0 -6 35 Right 2
WINDOW 3 -4 73 Right 2
SYMATTR InstName L1
SYMATTR Value 10
SYMATTR SpiceLine Rpar=2K Rser=.1
SYMBOL res 1664 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10K
SYMBOL diode 2224 1264 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL cap 2352 1264 R0
WINDOW 3 27 55 Left 2
SYMATTR Value .1
SYMATTR InstName C1
SYMBOL voltage 1600 1536 R0
WINDOW 3 12 110 Left 2
SYMATTR Value PWL(30m 0 30.01m 3 30.1m 3 30.11m 0)
SYMATTR InstName V3
SYMBOL VOLTAGE 1520 1440 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL PowerProducts\\LT3485-0 1824 1440 R0
SYMATTR InstName U1
FLAG 2368 1360 0
FLAG 1824 1600 0
FLAG 1520 1552 0
FLAG 2112 1360 0
FLAG 1936 1136 0
FLAG 1600 1664 0
FLAG 2368 1248 OUT
TEXT 2048 1560 Left 2 !.tran 50m startup
TEXT 2088 1248 Bottom 2 !K1 L1 L2 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1042.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Comparators\LTC1042.asy)
R4 N007 0 10K
R1 N001 N004 100K
R2 N003 N007 90K
V2 N005 0 PULSE(0 5 0 5m 5m 0 10m)
XU1 N002 N003 N005 0 N007 N006 N004 N001 LTC1042 ;pnba Within)Center)In)GND)Width/2)Above)OSC)Vcc
C1 N004 0 .001
V1 N001 0 5
R3 N001 N003 100K
.tran 10m
.lib LTC1042.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2748 2324
WIRE 2416 1728 2016 1728
WIRE 2464 1728 2416 1728
WIRE 2608 1728 2464 1728
WIRE 2016 1760 2016 1728
WIRE 2464 1760 2464 1728
WIRE 2608 1760 2608 1728
WIRE 2144 1792 2112 1792
WIRE 2416 1792 2416 1728
WIRE 2416 1792 2400 1792
WIRE 2016 1856 2016 1840
WIRE 2144 1856 2016 1856
WIRE 2464 1856 2464 1840
WIRE 2464 1856 2400 1856
WIRE 2608 1856 2608 1840
WIRE 2464 1872 2464 1856
WIRE 2144 1920 1632 1920
WIRE 2416 1920 2400 1920
WIRE 1632 1936 1632 1920
WIRE 2016 1952 2016 1856
WIRE 2464 1952 2464 1936
WIRE 2144 1984 2112 1984
WIRE 2416 1984 2400 1984
WIRE 1632 2032 1632 2016
WIRE 2016 2048 2016 2032
WIRE 2416 2048 2416 1984
WIRE 2416 2048 2016 2048
WIRE 2016 2064 2016 2048
WIRE 2016 2160 2016 2144
SYMBOL RES 2000 2048 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL RES 2000 1936 R0
SYMATTR InstName R2
SYMATTR Value 90K
SYMBOL cap 2448 1872 R0
SYMATTR InstName C1
SYMATTR Value .001
SYMBOL Comparators\\LTC1042 2272 1888 R0
SYMATTR InstName U1
SYMBOL RES 2448 1744 R0
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL RES 2000 1744 R0
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL VOLTAGE 2608 1744 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 1632 1920 R0
WINDOW 0 37 38 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 5m 5m 0 10m)
FLAG 2464 1952 0
FLAG 2608 1856 0
FLAG 2112 1984 0
FLAG 1632 2032 0
FLAG 2016 2160 0
TEXT 2232 2136 Left 2 !.tran  10m
* Z:\home\khalils\Downloads\files\data\raw_asc\0493a5531c6b_Bandpass1.asc
* Generated by LTspice 26.0.1 for Windows.
* View -> Spice Error Log \nL=2mH, C=.2uF
* Bandpass\n \nAny Rp will additionally rise the bandwidth (lower Q).
C1 out 0 {Cp}
R1 out 0 {Rp}
L1 out 0 {Lp} Rser={Rs}
I1 0 out AC 1
.param B=800 F0=8000 Rs=10
.param w0 = 2*pi*F0
.param Q=F0/B
.param Lp=Rs*Q/w0
.param Cp=1/(w0*w0*Lp)
.ac lin 1000 5k 15k
.measure L1 param {Lp}
.measure C1 param {Cp}
.param Rp=1G
.measure vmax max mag(V(out))
.measure fc when mag(V(out))=vmax*0.99999
.measure flow when mag(V(out))=vmax/sqrt(2)
.measure fhigh when mag(V(out))=vmax/sqrt(2) fall=1
.measure bw param fhigh-flow
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1128 680
WIRE 64 352 64 320
WIRE 64 496 64 432
WIRE 240 320 64 320
WIRE 240 368 240 320
WIRE 240 496 64 496
WIRE 240 496 240 448
WIRE 320 320 240 320
WIRE 416 320 320 320
WIRE 416 368 416 320
WIRE 416 496 240 496
WIRE 416 496 416 432
WIRE 416 528 416 496
WIRE 576 320 416 320
WIRE 576 368 576 320
WIRE 576 496 416 496
WIRE 576 496 576 448
SYMBOL ind 560 352 R0
WINDOW 39 36 108 Left 0
SYMATTR InstName L1
SYMATTR Value {Lp}
SYMATTR SpiceLine Rser={Rs}
SYMBOL cap 400 368 R0
SYMATTR InstName C1
SYMATTR Value {Cp}
SYMBOL current 240 448 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
WINDOW 123 24 -7 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMBOL res 48 336 R0
SYMATTR InstName R1
SYMATTR Value {Rp}
FLAG 416 528 0
FLAG 320 320 out
TEXT 16 0 Left 0 !.param B=800  F0=8000  Rs=10\n.param w0 = 2*pi*F0\n.param Q=F0/B\n.param Lp=Rs*Q/w0\n.param Cp=1/(w0*w0*Lp)
TEXT 16 232 Left 0 !.ac lin 1000 5k 15k
TEXT 416 0 Left 0 !.measure L1 param {Lp}\n.measure C1 param {Cp}
TEXT 416 64 Left 0 ;View -> Spice Error Log \nL=2mH, C=.2uF
TEXT 16 -120 Left 0 ;Bandpass\n \nAny Rp will additionally rise the bandwidth (lower Q).
TEXT 48 520 Left 0 !.param Rp=1G
TEXT 416 128 Left 0 !.measure vmax max mag(V(out))\n.measure fc when mag(V(out))=vmax*0.99999\n.measure flow when mag(V(out))=vmax/sqrt(2)\n.measure fhigh when mag(V(out))=vmax/sqrt(2)  fall=1\n.measure bw param fhigh-flow
* Z:\home\khalils\Downloads\files\data\raw_asc\7044aaf81f88_Demonstration_circuit_DC.asc
* Generated by LTspice 26.0.1 for Windows.
* Demonstration Circuit DC
* copyright Cordell Audio 12/03/2010
* View SPICE error log to see
* transistor operating parameters
V2 0 N006 15
R1 N001 N002 2500
Q1 N002 Vin N003 0 2N5551C
Q2 Vout 0 N004 0 2N5551C
R4 N004 N005 225
C1 N001 Vout 100pF
V3 Vin 0 AC 1
R3 N003 N005 225
I1 N005 N006 2mA
V1 N001 0 15
R2 N001 Vout 2500
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.include Cordell_Mods
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 724
WIRE 160 64 0 64
WIRE 272 64 160 64
WIRE 400 64 272 64
WIRE 0 112 0 64
WIRE 160 112 160 64
WIRE 272 112 272 64
WIRE 400 112 400 64
WIRE 160 224 160 192
WIRE 224 224 160 224
WIRE 272 224 272 176
WIRE 272 224 224 224
WIRE 0 256 0 192
WIRE 160 256 160 224
WIRE -112 304 -160 304
WIRE -64 304 -112 304
WIRE 304 304 224 304
WIRE 400 304 400 192
WIRE 400 304 304 304
WIRE 304 352 304 304
WIRE -160 368 -160 304
WIRE 0 384 0 352
WIRE 160 384 160 352
WIRE -160 496 -160 448
WIRE 0 496 0 464
WIRE 80 496 0 496
WIRE 160 496 160 464
WIRE 160 496 80 496
WIRE 400 496 400 304
WIRE 80 512 80 496
WIRE 80 624 80 592
WIRE 400 624 400 576
WIRE 400 624 80 624
SYMBOL res -16 96 R0
WINDOW 0 -42 41 Left 0
WINDOW 3 -60 74 Left 0
SYMATTR InstName R1
SYMATTR Value 2500
SYMBOL cap 256 112 R0
WINDOW 3 26 62 Left 0
WINDOW 0 40 25 Left 0
SYMATTR Value 100pF
SYMATTR InstName C1
SYMBOL npn 224 256 M0
WINDOW 3 24 55 Left 0
WINDOW 0 61 25 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q2
SYMBOL res 144 368 R0
SYMATTR InstName R4
SYMATTR Value 225
SYMBOL voltage -160 352 R0
WINDOW 3 -181 172 Left 0
WINDOW 123 -101 83 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 -77 40 Left 0
SYMATTR Value ""
SYMATTR Value2 AC 1
SYMATTR InstName V3
SYMBOL res -16 368 R0
WINDOW 0 -42 39 Left 0
WINDOW 3 -52 73 Left 0
SYMATTR InstName R3
SYMATTR Value 225
SYMBOL res 144 96 R0
WINDOW 0 -42 41 Left 0
WINDOW 3 -63 76 Left 0
SYMATTR InstName R2
SYMATTR Value 2500
SYMBOL current 80 512 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 24 Left 0
WINDOW 3 37 62 Left 0
SYMATTR InstName I1
SYMATTR Value 2mA
SYMBOL npn -64 256 R0
WINDOW 3 22 55 Left 0
WINDOW 0 59 23 Left 0
SYMATTR Value 2N5551C
SYMATTR InstName Q1
SYMBOL voltage 400 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 39 44 Left 0
WINDOW 3 41 76 Left 0
SYMATTR InstName V2
SYMATTR Value 15
SYMBOL voltage 400 96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 44 Left 0
WINDOW 3 43 76 Left 0
SYMATTR InstName V1
SYMATTR Value 15
FLAG 304 352 0
FLAG -160 496 0
FLAG -112 304 Vin
FLAG 224 224 Vout
TEXT -456 120 Left 0 !.op
TEXT -104 -8 Left 0 ;Demonstration Circuit DC
TEXT -456 72 Left 0 !.include Cordell_Mods
TEXT 56 704 Left 0 ;copyright Cordell Audio 12/03/2010
TEXT -456 576 Left 0 ;View SPICE error log to see
TEXT -456 608 Left 0 ;transistor operating parameters
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1612.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input\nPin capacitance and Qinj not included\nParameter performance modeled at 5V supply\nOny one channel is modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1612.asy)
V1 vS 0 SINE(0 5 20)
C1 vD 0 36p
R1 vD 0 301
V2 vIN 0 PULSE(0 2.5 20n 20n 20n 150m 300m)
V4 v- 0 -5
V3 v+ 0 5
XU1 vIN vS vD v- v+ 0 ADG1612 ;pnba IN)S)D)Vss)Vdd)GND
.tran 1
.lib ADG1612.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 832
WIRE 256 112 240 112
WIRE 240 144 240 112
WIRE -80 224 -112 224
WIRE 112 224 0 224
WIRE 144 224 112 224
WIRE 368 224 336 224
WIRE 416 224 368 224
WIRE 528 224 416 224
WIRE 416 256 416 224
WIRE 528 256 528 224
WIRE 112 288 48 288
WIRE 144 288 112 288
WIRE -272 304 -288 304
WIRE -176 304 -192 304
WIRE -288 336 -288 304
WIRE -192 336 -192 304
WIRE 48 336 48 288
WIRE 416 352 416 336
WIRE 528 352 528 320
WIRE 304 416 304 400
WIRE 176 432 176 400
WIRE 192 432 176 432
WIRE -288 464 -288 416
WIRE -192 464 -192 416
WIRE 48 464 48 416
SYMBOL voltage 16 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 20)
SYMBOL voltage -192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -5
SYMBOL voltage 48 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 30 177 Left 2
SYMATTR Value PULSE(0 2.5 20n 20n 20n 150m 300m)
SYMATTR InstName V2
SYMBOL cap 512 256 R0
SYMATTR InstName C1
SYMATTR Value 36p
SYMBOL res 400 240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL voltage -288 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL ADG1612 240 272 R0
SYMATTR InstName U1
FLAG -112 224 0
FLAG 48 464 0
FLAG 416 352 0
FLAG 304 416 0
FLAG 368 224 vD
FLAG 112 224 vS
FLAG 112 288 vIN
FLAG 528 352 0
FLAG -272 304 v+
FLAG 256 112 v+
FLAG -288 464 0
FLAG -192 464 0
FLAG -176 304 v-
FLAG 192 432 v-
TEXT 80 528 Left 2 !.tran 1
TEXT -360 -40 Left 2 ;Note:\nSwitch shown for a logic 0 input\nPin capacitance and Qinj not included\nParameter performance modeled at 5V supply\nOny one channel is modeled
* Z:\tmp\asc_dec_bjh7r6w2\00e50bf194bb_pc357nth_dec1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 5 N004 10G
G1 N004 5 N003 0 0.035
C4 N001 N002 0.3p
C3 N002 5 10p
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1616 872
WIRE 608 192 608 112
WIRE 608 288 608 448
WIRE 608 112 736 112
WIRE 544 240 528 240
WIRE 528 240 480 240
WIRE 368 352 368 448
WIRE 368 448 480 448
WIRE 272 272 272 240
WIRE 272 240 368 240
WIRE 272 352 272 448
WIRE 272 448 368 448
WIRE 224 336 208 336
WIRE 208 336 208 368
WIRE 224 288 160 288
WIRE 160 288 160 560
WIRE 480 192 480 240
WIRE 480 128 480 112
WIRE 480 112 608 112
WIRE 256 112 480 112
WIRE 192 112 -16 112
WIRE 112 448 272 448
WIRE 480 240 368 240
WIRE 368 240 368 272
WIRE 480 304 480 240
WIRE 480 368 480 448
WIRE 480 448 608 448
SYMBOL res 352 256 R0
SYMATTR InstName R1
SYMATTR Value 10G
SYMBOL g 272 256 R0
SYMATTR InstName G1
SYMATTR Value 0.035
SYMBOL cap 192 128 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName C4
SYMATTR Value 0.3p
SYMBOL cap 464 128 R0
SYMATTR InstName C3
SYMATTR Value 10p
FLAG 528 240 5
FLAG 208 368 0
* Z:\home\khalils\Downloads\files\data\raw_asc\1cb0a6acdb22_monte-carlo-diff-amp_1.asc
* Generated by LTspice 26.0.1 for Windows.
* Ideal OPAMP with offset
* Monte Carlo Simulation Of A Differential Amplifier
* mc(10k,tol) varies from 10k*(1-tol) to 10k*(1+tol)\n1m*(1-mc(1,1)) varies from -1m to +1m
* Hint:\nYou can easily make a histogram of the output voltage with DPLOT95.\n \n1. Export the data in the Waveform Viewer of LTspice\nFile -> Export V(out)\n \n2. Start DPLOT95\nEither drag the file into the window or use File->Open (o D multiple columns)\n \n3. From the menu in DPLOT95: Generate -> Histogram 0.005
V1 N001 0 10
V2 N004 N005 {1m*(1-mc(1,1))}
E1 OUT 0 N005 N003 1e5
R3 N002 N003 {mc(10k,tol)}
R5 N001 N002 1
R4 N003 OUT {mc(100k,tol)}
R1 N004 0 {mc(100k,tol)}
R2 N001 N004 {mc(10k,tol)}
.op
.step param x 0 10000 1
.param tol=0.001 ; 0.1%
.param offset=1m
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1364 996
WIRE 80 112 -96 112
WIRE 160 112 80 112
WIRE 320 112 240 112
WIRE 80 144 80 112
WIRE 320 144 320 112
WIRE -96 176 -96 112
WIRE 320 288 320 224
WIRE 400 288 320 288
WIRE 1184 288 480 288
WIRE -96 336 -96 256
WIRE 80 432 80 224
WIRE 560 432 80 432
WIRE 992 432 928 432
WIRE 928 464 928 432
WIRE 560 480 560 432
WIRE 720 480 560 480
WIRE 880 480 800 480
WIRE 80 496 80 432
WIRE 992 528 992 432
WIRE 1184 528 1184 288
WIRE 1184 528 992 528
WIRE 1248 528 1184 528
WIRE 320 560 320 288
WIRE 880 560 880 528
WIRE 880 560 320 560
WIRE 928 576 928 544
WIRE 80 640 80 576
IOPIN 1248 528 Out
LINE Normal 640 672 640 352
LINE Normal 960 352 640 352
LINE Normal 1088 528 960 352
LINE Normal 960 672 1088 528
LINE Normal 640 672 960 672
SYMBOL res 144 128 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R5
SYMATTR Value 1
SYMBOL res 304 128 R0
SYMATTR InstName R3
SYMATTR Value {mc(10k,tol)}
SYMBOL res 64 128 R0
SYMATTR InstName R2
SYMATTR Value {mc(10k,tol)}
SYMBOL res 64 480 R0
SYMATTR InstName R1
SYMATTR Value {mc(100k,tol)}
SYMBOL voltage -96 160 R0
SYMATTR InstName V1
SYMATTR Value 10
SYMBOL e 928 448 R0
SYMATTR InstName E1
SYMATTR Value 1e5
SYMBOL res 384 304 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R4
SYMATTR Value {mc(100k,tol)}
SYMBOL voltage 704 480 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 VBottom 0
SYMATTR InstName V2
SYMATTR Value {1m*(1-mc(1,1))}
FLAG -96 336 0
FLAG 80 640 0
FLAG 928 576 0
FLAG 1248 528 OUT
TEXT 512 72 Left 0 !.op
TEXT 512 96 Left 0 !.step param x 0 10000 1
TEXT 512 8 Left 0 !.param tol=0.001 ; 0.1%\n.param offset=1m
TEXT 680 376 Left 0 ;Ideal OPAMP with offset
TEXT -96 0 Left 0 ;Monte Carlo Simulation Of A Differential Amplifier
TEXT 512 144 Left 0 ;mc(10k,tol) varies from 10k*(1-tol) to 10k*(1+tol)\n1m*(1-mc(1,1)) varies from -1m to +1m
TEXT 208 728 Left 0 ;Hint:\nYou can easily make a histogram of the output voltage with DPLOT95.\n \n1. Export the data in the Waveform Viewer of LTspice\nFile -> Export  V(out)\n \n2. Start DPLOT95\nEither drag the file into the window or use  File->Open  (o D multiple columns)\n \n3. From the menu in DPLOT95: Generate -> Histogram  0.005
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2120-2.5.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2120-2.5.asy)
C1 OUT 0 20
Rload OUT 0 2.5
XU1 IN IN N002 0 0 OUT IN N001 IN IN ADP2120-2.5 ;pnba Vin)Pvin)SW)PGND)GND)FB)TRK)Pgood)Sync/Mode)EN
L1 N002 OUT 2.2
R1 OUT N001 100K
V1 IN 0 5
.tran 1m
.lib ADP2120-2.5.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 0 48 0
WIRE 288 0 128 0
WIRE 48 16 48 0
WIRE 288 16 288 0
WIRE 128 64 128 0
WIRE 160 64 128 64
WIRE 496 64 416 64
WIRE 640 64 576 64
WIRE 48 112 48 96
WIRE 128 144 128 64
WIRE 160 144 128 144
WIRE 448 144 416 144
WIRE 560 144 528 144
WIRE 640 144 640 64
WIRE 640 144 560 144
WIRE 704 144 640 144
WIRE 560 160 560 144
WIRE 704 160 704 144
WIRE 128 224 128 144
WIRE 160 224 128 224
WIRE 560 224 416 224
WIRE 560 256 560 224
WIRE 704 256 704 240
WIRE 128 304 128 224
WIRE 160 304 128 304
WIRE 640 304 640 144
WIRE 640 304 416 304
WIRE 288 368 288 352
SYMBOL ADP2120-2.5 288 272 R0
SYMATTR InstName U1
SYMBOL res 592 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 100K
SYMBOL res 688 144 R0
SYMATTR Value 2.5
SYMATTR InstName Rload
SYMBOL voltage 48 0 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL ind 432 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL cap 544 160 R0
WINDOW 0 21 15 Left 2
WINDOW 3 22 48 Left 2
SYMATTR InstName C1
SYMATTR Value 20
FLAG 560 256 0
FLAG 288 368 0
FLAG 48 112 0
FLAG 704 144 OUT
FLAG 704 256 0
FLAG 48 0 IN
TEXT 504 344 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\039e85e85677_6432067021-PB3.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N003 0 SINE(0.3 0.3 10KHz)
V2 VCC 0 5v
XU1 N003 N001 VCC VSS N002 OP727 ;pnba In+)In-)V+)V-)OUT
V3 0 VSS 5v
R1 N001 0 1k
R2 N002 N001 4k
R3 0 N002 10k
.tran 1ms
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\OP727.asy)
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 32 -96 32
WIRE 176 32 160 32
WIRE 48 80 48 -16
WIRE -208 96 -272 96
WIRE -96 96 -96 32
WIRE -96 96 -128 96
WIRE 16 96 -96 96
WIRE 176 112 176 32
WIRE 176 112 80 112
WIRE 256 112 176 112
WIRE 16 128 -64 128
WIRE -272 160 -272 96
WIRE 256 176 256 112
WIRE 48 256 48 144
WIRE -64 288 -64 208
WIRE 256 288 256 256
FLAG -64 288 0
FLAG 48 -16 VCC
FLAG -304 -48 VCC
FLAG -304 32 0
FLAG 48 256 VSS
FLAG -400 -48 0
FLAG -400 32 VSS
FLAG -272 160 0
FLAG 256 288 0
SYMBOL voltage -64 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 33 90 Left 2
WINDOW 3 -224 121 Left 2
SYMATTR InstName V1
SYMATTR Value SINE(0.3 0.3 10KHz)
SYMBOL voltage -304 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5v
SYMBOL OP727 48 48 R0
SYMATTR InstName U1
SYMBOL voltage -400 -64 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5v
SYMBOL Res -112 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL Res 176 16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 4k
SYMBOL Res 272 272 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 10k
TEXT -120 312 Left 2 !.tran 1ms
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8671.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8671.asy)
V2 -V 0 -15
R2 OUT N001 1K
XU1 IN N001 +V -V OUT AD8671 ;pnba In+)In-)V+)V-)OUT
Vin IN 0 SINE(0 1 100K)
V1 +V 0 15
Rload OUT 0 2K
R1 N001 0 1K
.tran 100u
.lib ADI.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1240 700
WIRE 416 -1232 400 -1232
WIRE 528 -1232 496 -1232
WIRE 544 -1232 528 -1232
WIRE 640 -1232 624 -1232
WIRE 176 -1168 176 -1184
WIRE 288 -1168 288 -1184
WIRE 528 -1120 528 -1232
WIRE 544 -1120 528 -1120
WIRE 640 -1104 640 -1232
WIRE 640 -1104 608 -1104
WIRE 768 -1104 640 -1104
WIRE 544 -1088 432 -1088
WIRE 768 -1088 768 -1104
WIRE 176 -1072 176 -1088
WIRE 288 -1072 288 -1088
WIRE 432 -1072 432 -1088
WIRE 768 -992 768 -1008
WIRE 432 -976 432 -992
SYMBOL Opamps\\AD8671 576 -1168 R0
SYMATTR InstName U1
SYMBOL voltage 176 -1184 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 640 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 432 -1088 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 100K)
SYMBOL res 512 -1248 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res 752 -1104 R0
SYMATTR InstName Rload
SYMATTR Value 2K
SYMBOL voltage 288 -1184 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -15
FLAG 432 -976 0
FLAG 768 -1104 OUT
FLAG 432 -1088 IN
FLAG 576 -1136 +V
FLAG 576 -1072 -V
FLAG 400 -1232 0
FLAG 768 -992 0
FLAG 176 -1184 +V
FLAG 176 -1072 0
FLAG 288 -1184 -V
FLAG 288 -1072 0
TEXT 680 -944 Left 2 !.tran 100u