Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3549.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3549.asy)
C2 OUT N002 22p
R3 OUT 0 6
XU1 IN 0 N001 0 IN N002 LTC3549 ;pnba Vin)GND)SW)Mode)Run)FB
C1 OUT 0 4.7
R1 OUT N002 200K
R2 N002 0 137K
V1 IN 0 2.2
L1 N001 OUT 3.3
.tran 1.2m startup
.lib LTC3549.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1972 680
WIRE -16 96 -128 96
WIRE 128 96 -16 96
WIRE -128 112 -128 96
WIRE 128 112 128 96
WIRE -16 176 -16 96
WIRE 0 176 -16 176
WIRE 272 176 256 176
WIRE 368 176 352 176
WIRE 448 176 368 176
WIRE 560 176 448 176
WIRE 656 176 560 176
WIRE 448 192 448 176
WIRE 560 192 560 176
WIRE 656 192 656 176
WIRE -128 208 -128 192
WIRE 368 208 368 176
WIRE 560 288 560 256
WIRE 656 288 656 272
WIRE 0 304 -16 304
WIRE 368 304 368 272
WIRE 368 304 256 304
WIRE 448 304 448 272
WIRE 448 304 368 304
WIRE 448 320 448 304
WIRE 128 384 128 368
WIRE 448 416 448 400
SYMBOL voltage -128 96 R0
SYMATTR InstName V1
SYMATTR Value 2.2
SYMBOL res 432 304 R0
SYMATTR InstName R2
SYMATTR Value 137K
SYMBOL res 640 176 R0
SYMATTR InstName R3
SYMATTR Value 6
SYMBOL PowerProducts\\LTC3549 128 240 R0
SYMATTR InstName U1
SYMBOL ind 256 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 3.3
SYMBOL cap 544 192 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL res 432 176 R0
SYMATTR InstName R1
SYMATTR Value 200K
SYMBOL cap 352 208 R0
SYMATTR InstName C2
SYMATTR Value 22p
FLAG 448 416 0
FLAG 128 384 0
FLAG -128 208 0
FLAG 560 288 0
FLAG 656 288 0
FLAG 656 176 OUT
FLAG -128 96 IN
FLAG -16 304 0
TEXT 400 456 Left 2 !.tran 1.2m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\AD630.asc
* Generated by LTspice 26.0.1 for Windows.
XU1 NC_01 N001 0 NC_02 N001 MOD 0 CAR OUT N001 MOD OUT STATUS +VS -VS OUT AD630 ;pnba 1)2)3)4)5)6)7)8)9)10)11)12)13)14)15)16
V1 MOD 0 SINE(0 5 10k)
V2 CAR 0 PULSE(-1 1 5u 1n 1n 5u 10u)
V3 -VS 0 -15
V4 +VS 0 15
R3 OUT 0 2k
R4 +VS STATUS 100k
.tran 300u
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD630.asy)
.lib AD630.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 3904 5180
WIRE -720 112 -736 112
WIRE -624 112 -640 112
WIRE -624 128 -624 112
WIRE -736 176 -736 112
WIRE -736 208 -736 176
WIRE -384 208 -736 208
WIRE -512 224 -1024 224
WIRE -736 240 -736 208
WIRE -384 240 -384 208
WIRE -896 272 -928 272
WIRE -928 288 -928 272
WIRE -528 288 -560 288
WIRE -896 320 -992 320
WIRE -1024 352 -1024 224
WIRE -1024 352 -1216 352
WIRE -944 352 -1024 352
WIRE -896 352 -944 352
WIRE -528 368 -528 288
WIRE -528 368 -560 368
WIRE -464 368 -528 368
WIRE -320 368 -464 368
WIRE -1216 384 -1216 352
WIRE -320 384 -320 368
WIRE -992 400 -992 320
WIRE -896 400 -992 400
WIRE -528 416 -528 368
WIRE -528 416 -560 416
WIRE -512 448 -512 224
WIRE -512 448 -560 448
WIRE -528 464 -560 464
WIRE -1216 480 -1216 464
WIRE -944 480 -1024 480
WIRE -896 480 -944 480
WIRE -448 480 -560 480
WIRE -384 480 -384 320
WIRE -384 480 -448 480
WIRE -320 480 -320 464
WIRE -896 512 -928 512
WIRE -928 528 -928 512
WIRE -992 560 -992 400
WIRE -528 560 -528 464
WIRE -528 560 -992 560
WIRE -704 592 -704 544
WIRE -1024 608 -1024 480
WIRE -704 608 -704 592
WIRE -1024 704 -1024 688
WIRE -704 704 -704 688
FLAG -944 352 MOD
FLAG -944 480 CAR
FLAG -704 704 0
FLAG -624 128 0
FLAG -928 528 0
FLAG -1024 704 0
FLAG -1216 480 0
FLAG -320 480 0
FLAG -736 176 +VS
FLAG -928 288 0
FLAG -464 368 OUT
FLAG -448 480 STATUS
FLAG -704 592 -VS
SYMBOL AD630 -800 272 R0
SYMATTR InstName U1
SYMBOL voltage -1216 368 R0
WINDOW 3 39 66 Left 2
WINDOW 0 12 11 Left 2
SYMATTR Value SINE(0 5 10k)
SYMATTR InstName V1
SYMBOL voltage -1024 592 R0
WINDOW 0 22 10 Left 2
WINDOW 3 33 74 Left 2
WINDOW 123 33 102 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(-1 1 5u
SYMATTR Value2 1n 1n 5u 10u)
SYMBOL voltage -704 592 R0
SYMATTR InstName V3
SYMATTR Value -15
SYMBOL voltage -736 112 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
SYMATTR InstName V4
SYMATTR Value 15
SYMBOL res -336 368 R0
SYMATTR InstName R3
SYMATTR Value 2k
SYMBOL res -400 224 R0
SYMATTR InstName R4
SYMATTR Value 100k
TEXT -1048 752 Left 2 !.tran 300u
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8645SA.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8645SA.asy)
R1 N001 0 41.2K
XU1 OUT NC_01 NC_02 IN IN 0 IN N002 N001 0 N003 0 NC_03 N004 0 NC_04 LT8645SA ;pnba BIAS)INTVcc)BST)VIN1)VIN2)GND1)EN/UV)SW)RT)GND2)TR/SS)SYNC/MODE)PG)FB)GND)CLKOUT
C5 OUT N004 2.2p
V1 IN 0 12
Rload OUT 0 0.625
R3 N004 0 243K
C1 N003 0 1n
L1 N002 OUT 2.2 Rser=10m
R2 OUT N004 1Meg
C4 OUT 0 100 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
.tran 1m startup
.lib LT8645SA.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1848 740
WIRE 0 -112 -32 -112
WIRE 80 -112 0 -112
WIRE 208 -112 80 -112
WIRE 432 -112 208 -112
WIRE -32 -80 -32 -112
WIRE 208 -64 208 -112
WIRE 80 0 80 -112
WIRE 112 0 80 0
WIRE 432 0 432 -112
WIRE 432 0 400 0
WIRE -32 32 -32 0
WIRE 112 96 96 96
WIRE 416 96 400 96
WIRE 544 192 400 192
WIRE 112 288 96 288
WIRE 0 384 -16 384
WIRE 112 384 80 384
WIRE 432 384 400 384
WIRE 544 384 544 192
WIRE 544 384 512 384
WIRE 656 384 544 384
WIRE 768 384 656 384
WIRE 832 384 768 384
WIRE 896 384 832 384
WIRE 544 400 544 384
WIRE 656 400 656 384
WIRE 768 400 768 384
WIRE 896 400 896 384
WIRE 16 480 -16 480
WIRE 112 480 80 480
WIRE 544 480 400 480
WIRE 656 480 656 464
WIRE 656 480 544 480
WIRE 544 496 544 480
WIRE 768 496 768 464
WIRE 896 496 896 480
WIRE 304 576 304 544
WIRE 544 592 544 576
SYMBOL res 96 368 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 41.2K
SYMBOL res 528 480 R0
SYMATTR InstName R3
SYMATTR Value 243K
SYMBOL cap 640 400 R0
SYMATTR InstName C5
SYMATTR Value 2.2p
SYMBOL res 880 384 R0
SYMATTR InstName Rload
SYMATTR Value 0.625
SYMBOL ind 416 400 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rser=10m
SYMBOL LT8645SA 256 240 R0
SYMATTR InstName U1
SYMBOL cap 752 400 R0
SYMATTR InstName C4
SYMATTR Value 100
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL voltage -32 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 80 496 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL res 528 384 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
FLAG 304 576 0
FLAG -16 384 0
FLAG -32 32 0
FLAG 768 496 0
FLAG 544 592 0
FLAG 896 496 0
FLAG 832 384 OUT
FLAG 0 -112 IN
FLAG 96 96 0
FLAG 416 96 0
FLAG -16 480 0
FLAG 96 288 0
TEXT 160 656 Left 2 !.tran 1m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\3f858c528446_Follower_RC_ADC_pulse.asc
* Generated by LTspice 26.0.1 for Windows.
* Sensor output
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4807.asy)
V1 SMPL 0 PULSE(0 1 688n 2n 2n 312n 1u 24)
R3 Ain+ INPUT 100
R1 ADC_IN OUT 50
C1 SAR_CAP 0 31p
C2 ADC_IN 0 1n
V2 INPUT 0 PULSE(0.5 1.5 1.1u 1u 1u 2u 6u 1)
V3 Vc 0 5
XU2 Ain+ OUT Vc 0 OUT NC_01 ADA4807 ;pnba 100)101)102)103)104)106
R2 SAR_CAP 0 1G
S1 SAR_CAP ADC_IN SMPL 0 SW
.tran 0 7E-6 0
.model SW SW(Ron=40 Roff=1G Vt=.5 Vh=-.4)
.lib ADA4807.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 996 680
WIRE -96 16 -240 16
WIRE -240 80 -240 16
WIRE -192 80 -240 80
WIRE -96 96 -96 16
WIRE -96 96 -128 96
WIRE -48 96 -96 96
WIRE 0 96 -48 96
WIRE 144 96 80 96
WIRE 192 96 144 96
WIRE 304 96 192 96
WIRE 480 96 384 96
WIRE 640 96 480 96
WIRE -368 112 -400 112
WIRE -256 112 -288 112
WIRE -192 112 -256 112
WIRE 144 128 144 96
WIRE 480 128 480 96
WIRE 640 128 640 96
WIRE -176 160 -176 128
WIRE 320 160 320 144
WIRE 320 160 256 160
WIRE -400 176 -400 112
WIRE 256 192 256 160
WIRE 144 224 144 192
WIRE 368 224 368 144
WIRE 480 224 480 192
WIRE 640 224 640 208
WIRE -592 288 -592 272
WIRE -400 304 -400 256
WIRE 256 320 256 272
SYMBOL sw 400 96 M270
SYMATTR InstName S1
SYMBOL res -272 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL OpAmps\\ADA4807 -160 96 R0
SYMATTR InstName U2
SYMBOL voltage -592 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL cap 128 128 R0
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL res 96 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL res 624 112 R0
SYMATTR InstName R2
SYMATTR Value 1G
SYMBOL cap 464 128 R0
SYMATTR InstName C1
SYMATTR Value 31p
SYMBOL voltage -400 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 24 124 Left 2
WINDOW 3 85 73 Left 2
SYMATTR Value PULSE(0.5 1.5 1.1u 1u 1u 2u 6u 1)
SYMATTR InstName V2
SYMBOL voltage 256 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 688n 2n 2n 312n 1u 24)
FLAG 368 224 0
FLAG 480 224 0
FLAG 256 320 0
FLAG -400 304 0
FLAG 480 96 SAR_CAP
FLAG -592 288 0
FLAG -592 192 Vc
FLAG -400 112 INPUT
FLAG 192 96 ADC_IN
FLAG 256 160 SMPL
FLAG 640 224 0
FLAG -176 160 0
FLAG -176 64 Vc
FLAG -256 112 Ain+
FLAG -48 96 OUT
FLAG 144 224 0
TEXT -208 288 Left 2 !.tran 0 7E-6 0
TEXT 96 0 Left 2 !.model SW SW(Ron=40 Roff=1G Vt=.5 Vh=-.4)
TEXT -600 40 Left 2 ;Sensor output
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3406B-2.asc
* Generated by LTspice 26.0.1 for Windows.
V1 IN 0 5
C2 OUT 0 10
L1 N001 OUT 2.2
Rload OUT 0 5
R1 OUT N002 887K
R2 N002 0 280K
XU1 IN 0 N001 IN N002 LTC3406B-2 ;pnba Run)GND)SW)Vin)FB
.tran 500u startup
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3406B-2.asy)
.lib LTC3406B-2.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 988 700
WIRE 192 64 96 64
WIRE 352 64 192 64
WIRE 96 80 96 64
WIRE 352 80 352 64
WIRE 192 144 192 64
WIRE 208 144 192 144
WIRE 512 144 496 144
WIRE 624 144 592 144
WIRE 736 144 624 144
WIRE 848 144 736 144
WIRE 736 160 736 144
WIRE 848 160 848 144
WIRE 96 176 96 160
WIRE 624 176 624 144
WIRE 736 256 736 224
WIRE 848 256 848 240
WIRE 624 304 624 256
WIRE 624 304 496 304
WIRE 624 320 624 304
WIRE 352 384 352 368
WIRE 624 416 624 400
FLAG 96 176 0
FLAG 352 384 0
FLAG 736 256 0
FLAG 848 256 0
FLAG 96 64 IN
FLAG 848 144 OUT
FLAG 624 416 0
SYMBOL VOLTAGE 96 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL polcap 720 160 R0
SYMATTR InstName C2
SYMATTR Value 10
SYMBOL ind 496 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMBOL RES 832 144 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL res 608 160 R0
SYMATTR InstName R1
SYMATTR Value 887K
SYMBOL res 608 304 R0
SYMATTR InstName R2
SYMATTR Value 280K
SYMBOL PowerProducts\\LTC3406B-2 352 224 R0
SYMATTR InstName U1
TEXT 752 376 Left 2 !.tran 500u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\15f11426ca63_circuit4b.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 AC 5
R1 N002 N001 2k
L1 N003 N002 10m
C1 N003 0 47n
.ac dec 1000 1 10Meg
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 880 680
WIRE 64 112 -16 112
WIRE 240 112 144 112
WIRE 416 112 320 112
WIRE -16 160 -16 112
WIRE 416 176 416 112
WIRE -16 304 -16 240
WIRE 0 304 -16 304
WIRE 416 304 416 240
WIRE 416 304 0 304
FLAG 0 304 0
SYMBOL voltage -16 144 R0
WINDOW 123 24 114 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value ""
SYMATTR Value2 AC 5
SYMBOL res 160 96 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 2k
SYMBOL ind 336 96 R90
WINDOW 0 5 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName L1
SYMATTR Value 10m
SYMBOL cap 400 176 R0
SYMATTR InstName C1
SYMATTR Value 47n
TEXT -112 56 Left 2 !.ac dec 1000 1 10Meg
* Z:\tmp\asc_dec_bjh7r6w2\0b3c7cb09f1d_CSAmp_DiffPair_dec0.asc
* Generated by LTspice 26.0.1 for Windows.
vgs vg 0 SINE(1.1816 10m 1meg) AC 1
vdd vdd 0 1.8
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 732
WIRE 32 256 32 176
WIRE -256 272 -256 224
WIRE -96 272 -96 224
WIRE -368 288 -368 256
WIRE -368 416 -368 368
WIRE -256 416 -256 352
WIRE -96 416 -96 352
WIRE 32 416 32 336
SYMBOL voltage -96 256 R0
WINDOW 3 -41 -81 VRight 2
WINDOW 123 28 97 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value SINE(1.1816 10m 1meg)
SYMATTR Value2 AC 1
SYMATTR InstName vgs
SYMBOL voltage -256 256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName vdd
SYMATTR Value 1.8
FLAG -96 416 0
FLAG -256 416 0
FLAG -368 416 0
FLAG -368 256 vs
FLAG -256 224 vdd
FLAG -96 224 vg
FLAG 32 416 0
FLAG 32 176 vb
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP2441.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP2441.asy)
V1 IN 0 24
R6 N006 0 182K
R2 N005 0 10K
R1 OUT N005 73.2K
C3 OUT 0 38 Rser=1m
R3 N007 N010 50K
R8 N002 0 10K
Rload OUT 0 5
C4 N009 N008 270p
C1 N007 0 1
XU1 N009 N005 N007 N003 0 0 N001 IN N002 N010 N006 N004 ADP2441 ;pnba Comp)FB)Vcc)SW)GND)PGND)BST)Vin)EN)Pgood)Freq)SS/TRK
R7 IN N002 182K
R4 N008 0 118K
L1 N003 OUT 27.3 Rser=89m
C2 N001 N003 10n
.tran 3m startup
.lib ADP2441.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1272 728
WIRE -208 -32 -320 -32
WIRE 0 -32 -208 -32
WIRE 400 -32 352 -32
WIRE -320 -16 -320 -32
WIRE -208 -16 -208 -32
WIRE 400 -16 400 -32
WIRE -320 80 -320 64
WIRE -208 80 -208 64
WIRE 0 80 -208 80
WIRE 400 80 400 48
WIRE 400 80 352 80
WIRE 464 80 400 80
WIRE 608 80 544 80
WIRE 720 80 608 80
WIRE 816 80 720 80
WIRE -208 96 -208 80
WIRE 608 96 608 80
WIRE 720 96 720 80
WIRE 816 96 816 80
WIRE -208 192 -208 176
WIRE 0 192 -16 192
WIRE 608 192 608 176
WIRE 608 192 352 192
WIRE 720 192 720 160
WIRE 816 192 816 176
WIRE 608 208 608 192
WIRE -96 304 -112 304
WIRE 0 304 -16 304
WIRE 400 304 352 304
WIRE 464 304 400 304
WIRE 544 304 528 304
WIRE 608 304 608 288
WIRE 400 320 400 304
WIRE -176 416 -192 416
WIRE -80 416 -96 416
WIRE 0 416 -16 416
WIRE 400 416 400 400
WIRE 400 416 352 416
WIRE 112 496 112 480
WIRE 240 496 240 480
SYMBOL cap 384 -16 R0
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res 592 192 R0
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res -224 -32 R0
SYMATTR InstName R7
SYMATTR Value 182K
SYMBOL ADP2441 176 192 R0
SYMATTR InstName U1
SYMBOL res 0 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R6
SYMATTR Value 182K
SYMBOL res -80 400 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 118K
SYMBOL ind 448 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 27.3
SYMATTR SpiceLine Rser=89m
SYMBOL res 384 304 R0
SYMATTR InstName R3
SYMATTR Value 50K
SYMBOL res 592 80 R0
SYMATTR InstName R1
SYMATTR Value 73.2K
SYMBOL cap -16 400 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C4
SYMATTR Value 270p
SYMBOL cap 704 96 R0
SYMATTR InstName C3
SYMATTR Value 38
SYMATTR SpiceLine Rser=1m
SYMBOL res 800 80 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL res -224 80 R0
SYMATTR InstName R8
SYMATTR Value 10K
SYMBOL voltage -320 -32 R0
SYMATTR InstName V1
SYMATTR Value 24
SYMBOL cap 464 320 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 1
FLAG 112 496 0
FLAG 608 304 0
FLAG -192 416 0
FLAG -320 80 0
FLAG 720 192 0
FLAG 816 192 0
FLAG 816 80 OUT
FLAG -320 -32 IN
FLAG 240 496 0
FLAG -112 304 0
FLAG -208 192 0
FLAG 544 304 0
TEXT 592 400 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1580.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N004 0 12
C1 N003 N006 22
R1 N003 N005 156
R2 N005 N006 254
Iload N003 N006 PULSE(400m 7 150u 100n 100n 200u 600u)
V2 N001 0 5
Rpar1 N003 N002 10m
Rpar2 N006 0 10m
XU1 N005 MP_01 N003 N002 N001 N004 LT1580 ;pnba ADJ))SENSE)OUTPUT)POWER)CONTROL
.tran 500u
* Vout
* +
* -
* Remote Load Sensing
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1580.asy)
.lib LT1584.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1492 680
WIRE 80 -96 -208 -96
WIRE -208 -80 -208 -96
WIRE 80 -48 80 -96
WIRE -208 16 -208 0
WIRE 288 16 256 16
WIRE 400 16 368 16
WIRE -96 96 -208 96
WIRE -208 112 -208 96
WIRE 288 176 256 176
WIRE 400 176 400 16
WIRE 400 176 288 176
WIRE 560 176 400 176
WIRE 288 192 288 176
WIRE -208 208 -208 192
WIRE 560 224 560 176
WIRE 400 240 400 176
WIRE 80 288 80 240
WIRE 288 288 288 272
WIRE 288 288 80 288
WIRE 288 304 288 288
WIRE 288 400 288 384
WIRE 400 400 400 304
WIRE 400 400 288 400
WIRE 560 400 560 304
WIRE 560 400 400 400
WIRE 400 416 400 400
WIRE 400 512 400 496
FLAG -208 208 0
FLAG -208 16 0
FLAG 400 512 0
SYMBOL voltage -208 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 384 240 R0
WINDOW 39 24 84 Left 2
SYMATTR InstName C1
SYMATTR Value 22
SYMBOL res 272 176 R0
SYMATTR InstName R1
SYMATTR Value 156
SYMBOL res 272 288 R0
SYMATTR InstName R2
SYMATTR Value 254
SYMBOL current 560 224 R0
WINDOW 123 0 0 Left 2
WINDOW 39 24 108 Left 2
SYMATTR InstName Iload
SYMATTR Value PULSE(400m 7 150u 100n 100n 200u 600u)
SYMBOL voltage -208 -96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL res 384 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rpar1
SYMATTR Value 10m
SYMBOL res 384 400 R0
SYMATTR InstName Rpar2
SYMATTR Value 10m
SYMBOL LT1580 80 96 R0
SYMATTR InstName U1
TEXT 688 408 Left 2 !.tran 500u
TEXT 464 264 Left 2 ;Vout
TEXT 480 216 Left 2 ;+
TEXT 488 344 Left 2 ;-
TEXT 104 -136 Bottom 2 ;Remote Load Sensing
* Z:\home\khalils\Downloads\files\data\raw_asc\18f0c6ead292_1844-2.8.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1844-2.8.asy)
XU1 IN 0 IN OUT LTC1844-2.8 ;pnba IN)GND)_SHDN)OUT
V1 IN 0 5
I1 OUT 0 {iload} load
.dc v1 5 2 10m
.measure DC vdrop WHEN V(out)=2.7
.measure DC dropout param Vdrop-2.7
.param iload=150m
.lib LTC1844-2.8.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1940 1316
WIRE 64 80 -80 80
WIRE 80 80 64 80
WIRE 432 80 368 80
WIRE -80 96 -80 80
WIRE 432 96 432 80
WIRE -80 192 -80 176
WIRE 432 192 432 176
WIRE 64 240 64 80
WIRE 80 240 64 240
WIRE 224 304 224 288
SYMBOL current 432 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 27 84 Left 2
WINDOW 3 40 43 Left 2
SYMATTR SpiceLine load
SYMATTR Value {iload}
SYMATTR InstName I1
SYMBOL LTC1844-2.8 224 160 R0
SYMATTR InstName U1
SYMBOL voltage -80 80 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 224 304 0
FLAG -80 192 0
FLAG 432 192 0
FLAG 432 80 OUT
FLAG -80 80 IN
TEXT 592 96 Left 2 !.dc v1 5 2 10m
TEXT 592 184 Left 2 !.measure DC vdrop WHEN V(out)=2.7\n.measure DC dropout param Vdrop-2.7
TEXT 592 136 Left 2 !.param iload=150m
* Z:\home\khalils\Downloads\files\data\raw_asc\988395ac13a1_Assignment_4b__ii_.asc
* Generated by LTspice 26.0.1 for Windows.
* Full Wave Rectifier (Diode Bridge) (Practical)
D3 N002 N001 1N4148
R1 N001 N003 1000
V1 0 N002 SINE(0 10 1000) Rser=0.001
D2 N003 0 1N4148
D4 N003 N002 1N4148
D1 0 N001 1N4148
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 5ms
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 448 64 144 64
WIRE 144 80 144 64
WIRE 144 80 -16 80
WIRE 304 80 144 80
WIRE 304 112 304 80
WIRE -16 128 -16 80
WIRE 448 192 448 64
WIRE -16 240 -16 192
WIRE 64 240 -16 240
WIRE 144 240 64 240
WIRE 304 240 304 176
WIRE 304 240 224 240
WIRE 64 272 64 240
WIRE 304 272 304 240
WIRE -16 288 -16 240
WIRE -16 384 -16 352
WIRE 144 384 -16 384
WIRE 304 384 304 336
WIRE 304 384 144 384
WIRE 144 400 144 384
WIRE 448 400 448 272
WIRE 448 400 144 400
SYMBOL res 432 176 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL diode 320 176 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D3
SYMATTR Value 1N4148
SYMBOL diode 320 336 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D4
SYMATTR Value 1N4148
SYMBOL voltage 128 240 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 2
WINDOW 39 -60 56 VBottom 2
SYMATTR InstName V1
SYMATTR Value SINE(0 10 1000)
SYMATTR SpiceLine Rser=0.001
SYMBOL diode 0 352 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL diode 0 192 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
FLAG 64 272 0
TEXT -16 424 Left 2 !.tran 5ms
TEXT -40 24 Left 2 ;Full Wave Rectifier (Diode Bridge) (Practical)
* Z:\home\khalils\Downloads\files\data\raw_asc\1325ff37aabf_sweep-diagram.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N003 0 0.9
V2 N002 0 1.26
V3 N001 0 1.8
M1 N003 N002 N001 N001 PMOS l=0.36u w={wp}
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
* To find Width by Sweep
.include tsmc180.txt
.param wp 1u
;.step param wp 1u 50u 1u
.op
* EDIC WINTER INTERNSHIP\nMOHAMMED AHMED MAJID\nGP5405
* Common Source Amplifier with Resistive Load
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 416 16 256 16
WIRE 416 48 416 16
WIRE 256 64 256 16
WIRE 336 64 256 64
WIRE 256 80 256 64
WIRE 208 96 64 96
WIRE 336 128 336 64
WIRE 336 128 256 128
WIRE 64 176 64 96
WIRE 416 192 416 128
WIRE 256 224 256 176
WIRE 64 304 64 256
WIRE 256 368 256 304
FLAG 64 304 0
FLAG 256 368 0
FLAG 416 192 0
SYMBOL voltage 256 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 0.9
SYMBOL voltage 64 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.26
SYMBOL voltage 416 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 1.8
SYMBOL pmos4 208 176 M180
WINDOW 123 29 114 Right 2
SYMATTR InstName M1
SYMATTR Value2 l=0.36u w={wp}
TEXT -400 -56 Left 2 ;To find Width by Sweep
TEXT -400 -16 Left 2 !.include tsmc180.txt
TEXT -400 16 Left 2 !.param wp 1u
TEXT -400 48 Left 2 !;.step param wp 1u 50u 1u
TEXT -400 72 Left 2 !.op
TEXT -408 -160 Left 2 ;EDIC WINTER INTERNSHIP\nMOHAMMED AHMED MAJID\nGP5405
TEXT 16 -64 Left 2 ;Common Source Amplifier with Resistive Load
* Z:\home\khalils\Downloads\files\data\raw_asc\f6c5ded04136_5l_a_.asc
* Generated by LTspice 26.0.1 for Windows.
M1 Vout N002 0 NC_01 CMOSN l=0.18u w=1u ad=0.45p as=0.45p pd=2.9u ps=2.9u
RL N001 Vout 1k
VDD N001 0 500m
VGS N002 0 552m
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VGS 500m 552m 0.01
.include TSMC_180nm.txt
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 480 160 336 160
WIRE 336 256 336 240
WIRE 400 256 336 256
WIRE 480 272 480 240
WIRE 288 336 64 336
WIRE 64 368 64 336
WIRE 336 432 336 352
SYMBOL res 320 144 R0
SYMATTR InstName RL
SYMATTR Value 1k
SYMBOL voltage 480 144 R0
SYMATTR InstName VDD
SYMATTR Value 500m
SYMBOL nmos4 288 256 R0
SYMATTR InstName M1
SYMATTR Value CMOSN
SYMATTR Value2 l=0.18u w=1u ad=0.45p as=0.45p pd=2.9u ps=2.9u
SYMBOL voltage 64 352 R0
WINDOW 3 24 38 Left 2
SYMATTR Value 552m
SYMATTR InstName VGS
FLAG 64 448 0
FLAG 336 432 0
FLAG 480 272 0
FLAG 400 256 Vout
TEXT 416 384 Left 2 !.dc VGS 500m 552m 0.01
TEXT 416 416 Left 2 !.include TSMC_180nm.txt