* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4260-SOAtherm-Tutorial1.asc
* Generated by LTspice 26.0.1 for Windows.
* simulate board detection
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4260.asy)
* Library below included based on ModelFile attribute of instance XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SOAtherm-NMOS.asy)
R2 N001 N007 49.9K
R3 N008 N007 1.74K
R8 0 OUT {Rload}
C3 N013 0 68n
XU1 N002 N001 MP_01 N007 N008 0 N010 MP_02 MP_03 MP_04 MP_05 N013 MP_06 N011 MP_07 MP_08 MP_09 N006 N012 N009 MP_10 MP_11 OUT N005 LTC4260 uvautoretry=1 ovautoretry=1 ocautoretry=1 ;pnba Sense)Vdd))UV)OV)GND)ON)))))Timer))_BD_PRST))))FB)INTVcc)GPIO)))Source)Gate
V1 N001 0 PWL(0 0 10u 0 100u 60 1.8 60 +0.1m 60)
R1 N001 N002 5.7m
R9 N003 N005 10
R4 N008 0 2.67K
R6 0 N006 3.57K
M1 P001 P002 P003 P003 PSMN4R8100BSE
C5 N007 0 0.1
XU3 N002 N003 OUT P001 P002 P003 Tj-FET Tc-FET PSMN4R8100BSE Tambient=85 ;pnba D)G)S)D2)G2)S2)Tj)Tc
C4 OUT 0 220
V9 N010 0 PWL(0 0 1u 3.1 1 3.1 1.0001 3.1)
C2 N012 0 .1
R5 OUT N006 43.5K
R7 OUT N009 24K
C1 N004 0 10n
V4 N011 0 PWL(0 3.1 1 3.1 1.0001 0 1.2 0 1.20001 0)
R11 N004 N005 100K
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 0 2.5 0
.param Rload=10
.step param Rload list 1 10 50 100
.lib LTC4260.sub
.lib SOAtherm-NMOS.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2204 1092
WIRE 128 -416 128 -448
WIRE 160 -416 160 -448
WIRE -368 -352 -464 -352
WIRE -80 -352 -368 -352
WIRE -64 -352 -80 -352
WIRE 32 -352 16 -352
WIRE 112 -352 32 -352
WIRE 368 -352 288 -352
WIRE 608 -352 368 -352
WIRE 720 -352 608 -352
WIRE 816 -352 720 -352
WIRE 928 -352 816 -352
WIRE -464 -336 -464 -352
WIRE 816 -336 816 -352
WIRE 928 -336 928 -352
WIRE 256 -272 256 -288
WIRE -464 -240 -464 -256
WIRE 816 -240 816 -272
WIRE 928 -240 928 -256
WIRE -368 -208 -368 -352
WIRE 608 -208 608 -352
WIRE 144 -176 112 -176
WIRE 256 -176 256 -192
WIRE 256 -176 224 -176
WIRE 112 -160 112 -176
WIRE 720 -160 720 -352
WIRE 608 -112 608 -128
WIRE 608 -112 528 -112
WIRE 608 -96 608 -112
WIRE -368 -80 -368 -128
WIRE -368 -80 -464 -80
WIRE -256 -80 -368 -80
WIRE 112 -80 112 -96
WIRE -368 -48 -368 -80
WIRE -80 -48 -80 -352
WIRE 32 -48 32 -352
WIRE 256 -48 256 -176
WIRE 368 -48 368 -352
WIRE -464 -32 -464 -80
WIRE -256 0 -256 -80
WIRE -176 0 -256 0
WIRE 528 0 528 -112
WIRE 528 0 480 0
WIRE 608 0 608 -16
WIRE -464 48 -464 32
WIRE -368 64 -368 32
WIRE -176 64 -368 64
WIRE 720 64 720 -80
WIRE 720 64 480 64
WIRE -368 96 -368 64
WIRE -176 128 -256 128
WIRE 560 128 480 128
WIRE -368 192 -368 176
WIRE 560 208 560 128
WIRE -256 224 -256 128
WIRE 160 240 160 224
WIRE 320 240 320 224
WIRE 0 256 0 224
WIRE 560 304 560 288
WIRE -256 320 -256 304
WIRE 160 320 160 304
WIRE 320 320 320 304
SYMBOL nmos 176 -304 R270
SYMATTR InstName M1
SYMATTR Value PSMN4R8100BSE
SYMBOL res 592 -224 R0
SYMATTR InstName R5
SYMATTR Value 43.5K
SYMBOL res 240 -288 R0
SYMATTR InstName R9
SYMATTR Value 10
SYMBOL cap 800 -336 R0
SYMATTR InstName C4
SYMATTR Value 220
SYMBOL PowerProducts\\LTC4260 144 80 R0
SYMATTR InstName U1
SYMATTR SpiceLine uvautoretry=1 ovautoretry=1 ocautoretry=1
SYMBOL res 592 0 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R6
SYMATTR Value 3.57K
SYMBOL voltage 560 192 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value PWL(0 3.1 1 3.1 1.0001 0 1.2 0 1.20001 0)
SYMBOL res -384 80 R0
SYMATTR InstName R4
SYMATTR Value 2.67K
SYMBOL SOAtherm-NMOS 224 -352 R270
SYMATTR InstName U3
SYMATTR SpiceModel PSMN4R8100BSE
SYMBOL cap 96 -160 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap -480 -32 R0
SYMATTR InstName C5
SYMATTR Value 0.1
SYMBOL voltage -464 -352 M0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
WINDOW 3 -352 -35 Left 2
SYMATTR Value PWL(0 0 10u 0 100u 60 1.8 60 +0.1m 60)
SYMATTR InstName V1
SYMBOL cap 304 240 R0
SYMATTR InstName C3
SYMATTR Value 68n
SYMBOL res 912 -240 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R8
SYMATTR Value {Rload}
SYMBOL voltage -256 208 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V9
SYMATTR Value PWL(0 0 1u 3.1 1 3.1 1.0001 3.1)
SYMBOL res -80 -336 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 5.7m
SYMBOL res -384 48 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R3
SYMATTR Value 1.74K
SYMBOL res 704 -176 R0
SYMATTR InstName R7
SYMATTR Value 24K
SYMBOL res -384 -224 R0
SYMATTR InstName R2
SYMATTR Value 49.9K
SYMBOL cap 144 240 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL res 128 -160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R11
SYMATTR Value 100K
FLAG -368 192 0
FLAG 0 256 0
FLAG 608 0 0
FLAG 160 320 0
FLAG 320 320 0
FLAG -256 320 0
FLAG -464 -240 0
FLAG 816 -240 0
FLAG 928 -240 0
FLAG 560 304 0
FLAG 112 -80 0
FLAG -464 48 0
FLAG 816 -352 OUT
FLAG 160 -448 Tj-FET
FLAG 128 -448 Tc-FET
TEXT 752 216 Left 2 !.tran 0 2.5 0
TEXT 608 248 Left 2 ;simulate board detection
TEXT 736 -200 Left 2 !.param Rload=10\n.step param Rload list 1 10 50 100