Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3519.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3519.asy)
R3 N003 0 243K
R4 N002 N004 2.49
L1 IN N001 68
V1 IN 0 12.4
R5 N006 0 29.4K
C1 N002 0 4.7
D1 N004 0 LXHL-BW02 N=10
R2 IN N003 1Meg
XU1 0 MP_01 N005 N003 IN N001 N001 MP_02 MP_03 N002 N002 N004 N006 N005 N005 LT3519 X=2.4u ;pnba GND))PWM)_SHDN/UVLO)Vin)SW)Anode)))Cathode)ISP)ISN)FB)CTRL)Vref
R1 N002 N006 1Meg
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 3m startup
.lib LT3519.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 912 680
WIRE -16 0 -128 0
WIRE 32 0 -16 0
WIRE 144 0 112 0
WIRE 256 0 144 0
WIRE -128 16 -128 0
WIRE 480 32 368 32
WIRE 624 32 480 32
WIRE 704 32 624 32
WIRE 144 48 144 0
WIRE 256 48 256 0
WIRE 368 48 368 32
WIRE 704 48 704 32
WIRE -128 112 -128 96
WIRE -16 112 -16 0
WIRE 80 112 -16 112
WIRE 624 112 624 32
WIRE 624 112 432 112
WIRE -16 128 -16 112
WIRE 624 128 624 112
WIRE 704 128 704 112
WIRE -16 224 -16 208
WIRE 80 224 -16 224
WIRE 624 224 624 208
WIRE 624 224 432 224
WIRE -16 240 -16 224
WIRE 480 240 480 32
WIRE 624 304 624 224
WIRE -16 336 -16 320
WIRE 80 336 64 336
WIRE 480 336 480 320
WIRE 480 336 432 336
WIRE 480 352 480 336
WIRE 624 432 624 368
WIRE 64 448 64 336
WIRE 80 448 64 448
WIRE 448 448 432 448
WIRE 480 448 480 432
WIRE 256 512 256 496
WIRE 64 544 64 448
WIRE 448 544 448 448
WIRE 448 544 64 544
SYMBOL ind 16 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 68
SYMBOL PowerProducts\\LT3519 256 272 R0
SYMATTR InstName U1
SYMBOL res 608 112 R0
SYMATTR InstName R4
SYMATTR Value 2.49
SYMBOL res 464 336 R0
SYMATTR InstName R5
SYMATTR Value 29.4K
SYMBOL res -32 112 R0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL voltage -128 0 R0
SYMATTR InstName V1
SYMATTR Value 12.4
SYMBOL res 464 224 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL res -32 224 R0
SYMATTR InstName R3
SYMATTR Value 243K
SYMBOL cap 688 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMBOL LED 608 304 R0
WINDOW 123 24 100 Left 2
SYMATTR Value2 N=10
SYMATTR InstName D1
SYMATTR Value LXHL-BW02
SYMATTR Description Diode
SYMATTR Type diode
FLAG 256 512 0
FLAG -128 112 0
FLAG -16 336 0
FLAG 624 432 0
FLAG 480 448 0
FLAG 704 128 0
FLAG -128 0 IN
TEXT 528 504 Left 2 !.tran 3m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\097045aa14b0_6993-4.asc
* Generated by LTspice 26.0.1 for Windows.
* LTC6993-4 Retriggerable 10ms One Shot\nFalling Edge Triggered, Positive Output Pulse\nStartup Modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC6993-4.asy)
R1 N003 0 121K
V2 N001 0 PULSE(0 3.3 0.1m 1n 1n 1m 8m 3)
XU1 N001 0 N003 N004 N002 OUT LTC6993-4 ;pnba TRIG)GND)SET)DIV)V+)OUT
R3 N004 0 392K
V1 N002 0 5
R2 N002 N004 1000K
R4 OUT 0 100K
.tran 50m startup
.lib LTC6993-4.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE -224 96 -240 96
WIRE 96 96 -144 96
WIRE 640 96 320 96
WIRE 640 112 640 96
WIRE 96 176 64 176
WIRE 384 176 320 176
WIRE 528 176 384 176
WIRE 384 192 384 176
WIRE 528 192 528 176
WIRE 640 208 640 192
WIRE 0 256 -16 256
WIRE 96 256 80 256
WIRE 336 256 320 256
WIRE 336 288 336 256
WIRE 384 288 384 272
WIRE 384 288 336 288
WIRE 528 288 528 272
WIRE 384 304 384 288
WIRE 384 400 384 384
SYMBOL SpecialFunctions\\LTC6993-4 208 176 R0
SYMATTR InstName U1
SYMBOL voltage 528 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 368 288 R0
SYMATTR InstName R3
SYMATTR Value 392K
SYMBOL res 96 240 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 121K
SYMBOL voltage -128 96 R90
WINDOW 123 74 56 VTop 0
WINDOW 39 53 56 VTop 0
WINDOW 3 32 56 VTop 0
WINDOW 0 -32 56 VBottom 0
SYMATTR Value PULSE(0 3.3 0.1m 1n 1n 1m 8m 3)
SYMATTR InstName V2
SYMBOL res 368 176 R0
SYMATTR InstName R2
SYMATTR Value 1000K
SYMBOL res 624 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
FLAG -240 96 0
FLAG 528 288 0
FLAG 640 96 OUT
FLAG 64 176 0
FLAG -16 256 0
FLAG 384 400 0
FLAG 640 208 0
TEXT 512 368 Left 0 !.tran 50m startup
TEXT 200 56 Bottom 0 ;LTC6993-4 Retriggerable 10ms One Shot\nFalling Edge Triggered, Positive Output Pulse\nStartup Modeled
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1010.asc
* Generated by LTspice 26.0.1 for Windows.
V1 +V 0 15
V2 -V 0 -15
V3 N001 0 SINE(0 1 1K)
XU1 N001 +V -V NC_01 N002 LT1010 ;pnba In)V+)V-)Bias)OUT
.tran 3m
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1010.asy)
.lib LT1010.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -176 208 -176 192
WIRE -48 208 -48 192
WIRE 176 208 176 192
WIRE 160 240 80 240
WIRE 368 240 224 240
WIRE 80 272 80 240
WIRE 192 288 192 272
WIRE -176 304 -176 288
WIRE -48 304 -48 288
WIRE 80 368 80 352
FLAG -48 304 0
FLAG 176 192 +V
FLAG -48 192 +V
FLAG 192 288 -V
FLAG -176 304 0
FLAG -176 192 -V
FLAG 80 368 0
SYMBOL voltage -48 192 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL voltage -176 192 R0
SYMATTR InstName V2
SYMATTR Value -15
SYMBOL voltage 80 256 R0
SYMATTR InstName V3
SYMATTR Value SINE(0 1 1K)
SYMBOL opamps\\LT1010 192 176 R0
SYMATTR InstName U1
TEXT 312 320 Left 2 !.tran 3m
* Z:\home\khalils\Downloads\files\data\raw_asc\f438f881ff9d_1151.asc
* Generated by LTspice 26.0.1 for Windows.
* High Voltage Instrumentation Amplifier
* Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC1151.asy)
XU2 IN+ N003 +V -V OUT LTC1151 ;pnba In+)In-)V+)V-)OUT
V4 -V 0 -15
XU1 IN- N001 +V -V N002 LTC1151 ;pnba In+)In-)V+)V-)OUT
R3 N003 N002 1K
R1 N002 N001 1K
V3 IN- IN+ SINE(0 1m 100)
V1 +V 0 15
R2 N001 0 1Meg
R4 OUT N003 1Meg
V2 IN+ 0 SINE(0 1 10)
.tran .3
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE 32 96 16 96
WIRE 128 96 112 96
WIRE 160 96 128 96
WIRE 272 96 240 96
WIRE 416 96 400 96
WIRE 512 96 496 96
WIRE -192 112 -192 96
WIRE -96 112 -96 96
WIRE -192 208 -192 192
WIRE -96 208 -96 192
WIRE 192 208 192 192
WIRE 128 224 128 96
WIRE 160 224 128 224
WIRE 448 224 448 208
WIRE 272 240 272 96
WIRE 272 240 224 240
WIRE 304 240 272 240
WIRE 400 240 400 96
WIRE 400 240 384 240
WIRE 416 240 400 240
WIRE 112 256 -16 256
WIRE 160 256 112 256
WIRE 512 256 512 96
WIRE 512 256 480 256
WIRE 576 256 512 256
WIRE -16 272 -16 256
WIRE 416 272 400 272
WIRE 192 288 192 272
WIRE 448 304 448 288
WIRE -16 384 -16 352
WIRE 352 384 -16 384
WIRE 400 384 400 272
WIRE 400 384 352 384
WIRE -16 400 -16 384
WIRE -16 496 -16 480
SYMBOL res 128 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 1Meg
SYMBOL opamps\\LTC1151 192 176 R0
SYMATTR InstName U1
SYMBOL voltage -16 384 R0
WINDOW 3 26 93 Left 0
SYMATTR Value SINE(0 1 10)
SYMATTR InstName V2
SYMBOL voltage -192 96 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 256 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL opamps\\LTC1151 448 192 R0
SYMATTR InstName U2
SYMBOL res 512 80 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R4
SYMATTR Value 1Meg
SYMBOL voltage -16 256 R0
WINDOW 0 24 24 Left 0
WINDOW 3 24 94 Left 0
SYMATTR InstName V3
SYMATTR Value SINE(0 1m 100)
SYMBOL res 400 224 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R3
SYMATTR Value 1K
SYMBOL voltage -96 96 R0
SYMATTR InstName V4
SYMATTR Value -15
FLAG -192 208 0
FLAG 192 192 +V
FLAG -192 96 +V
FLAG 16 96 0
FLAG -16 496 0
FLAG 448 208 +V
FLAG 576 256 OUT
FLAG 112 256 IN-
FLAG 352 384 IN+
FLAG -96 208 0
FLAG -96 96 -V
FLAG 192 288 -V
FLAG 448 304 -V
TEXT 432 416 Left 0 !.tran .3
TEXT 304 48 Bottom 0 ;High Voltage Instrumentation Amplifier
* Z:\home\khalils\Downloads\files\data\raw_asc\73718b5d97cb_lab3a.asc
* Generated by LTspice 26.0.1 for Windows.
* Bn/Bp=1
* Bn/Bp=3
* Bn/Bp=0.333
M6 Vout2 Vin 0 0 N_1u l=1u w=10u
M1 Vout Vin VDD VDD P_1u l=1u w=30u
M2 Vout1 Vin VDD VDD P_1u l=1u w=10u
VDD VDD 0 5
M3 Vout2 Vin VDD VDD P_1u l=1u w=90u
Vin Vin 0 0
M4 Vout Vin 0 0 N_1u l=1u w=10u
M5 Vout1 Vin 0 0 N_1u l=1u w=10u
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib C:\Users\Sarthak\Desktop\CMOS_PRO\pure_models.txt
.dc Vin 0 5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE -96 176 -96 112
WIRE 224 176 224 112
WIRE 528 176 528 112
WIRE -144 192 -176 192
WIRE 176 192 144 192
WIRE 480 192 448 192
WIRE 256 224 224 224
WIRE -176 320 -176 192
WIRE -176 320 -208 320
WIRE -96 320 -96 272
WIRE -48 320 -96 320
WIRE 144 320 144 192
WIRE 144 320 96 320
WIRE 224 320 224 272
WIRE 272 320 224 320
WIRE 448 320 448 192
WIRE 448 320 416 320
WIRE 528 320 528 272
WIRE 608 320 528 320
WIRE -96 384 -96 320
WIRE 224 384 224 320
WIRE 528 384 528 320
WIRE 64 432 -96 432
WIRE 400 432 224 432
WIRE 704 432 528 432
WIRE -176 464 -176 320
WIRE -144 464 -176 464
WIRE 144 464 144 320
WIRE 176 464 144 464
WIRE 448 464 448 320
WIRE 480 464 448 464
WIRE -96 512 -96 480
WIRE 64 512 64 432
WIRE 400 512 400 432
WIRE 528 512 528 480
WIRE 704 512 704 432
WIRE 224 528 224 480
IOPIN -48 320 Out
IOPIN 272 320 Out
IOPIN 608 320 Out
SYMBOL nmos4 -144 384 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=1u w=10u
SYMATTR InstName M4
SYMATTR Value N_1u
SYMBOL nmos4 480 384 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=1u w=10u
SYMATTR InstName M6
SYMATTR Value N_1u
SYMBOL pmos4 -144 272 M180
WINDOW 0 49 27 Left 2
WINDOW 3 85 66 Top 2
WINDOW 123 124 -14 Top 2
SYMATTR InstName M1
SYMATTR Value P_1u
SYMATTR Value2 l=1u w=30u
SYMBOL pmos4 480 272 M180
WINDOW 3 56 4 Left 2
WINDOW 123 56 -24 Left 2
WINDOW 0 54 27 Left 2
SYMATTR Value P_1u
SYMATTR Value2 l=1u w=90u
SYMATTR InstName M3
SYMBOL voltage -288 352 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin
SYMATTR Value 0
SYMBOL voltage -288 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 5
SYMBOL nmos4 176 384 R0
WINDOW 123 56 100 Left 2
SYMATTR Value2 l=1u w=10u
SYMATTR InstName M5
SYMATTR Value N_1u
SYMBOL pmos4 176 272 M180
WINDOW 3 109 21 Left 2
WINDOW 123 78 80 Left 2
WINDOW 0 60 24 Left 2
SYMATTR Value P_1u
SYMATTR Value2 l=1u w=10u
SYMATTR InstName M2
FLAG 224 528 0
FLAG -96 512 0
FLAG 64 512 0
FLAG 400 512 0
FLAG 528 512 0
FLAG 704 512 0
FLAG -288 256 0
FLAG -288 448 0
FLAG -288 368 Vin
FLAG -208 320 Vin
FLAG 96 320 Vin
FLAG 416 320 Vin
FLAG -96 112 VDD
FLAG 224 112 VDD
FLAG 528 112 VDD
FLAG -96 224 VDD
FLAG 528 224 VDD
FLAG 256 224 VDD
FLAG -288 176 VDD
FLAG -48 320 Vout
FLAG 272 320 Vout1
FLAG 608 320 Vout2
TEXT -128 16 Left 1 !.lib C:\\Users\\Sarthak\\Desktop\\CMOS_PRO\\pure_models.txt
TEXT -336 552 Left 2 !.dc Vin 0 5
TEXT -136 544 Left 2 ;Bn/Bp=1
TEXT 272 544 Left 2 ;Bn/Bp=3
TEXT 520 544 Left 2 ;Bn/Bp=0.333
* Z:\home\khalils\Downloads\files\data\raw_asc\0a0545ab29f0_ac_math.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N002 1k
V1 N001 0 AC 1
C1 N002 0 1n
.ac dec 100 10 10meg
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 160 0 160
WIRE 288 160 208 160
WIRE 0 208 0 160
WIRE 288 224 288 160
WIRE 0 336 0 288
WIRE 288 336 288 288
SYMBOL cap 272 224 R0
SYMATTR InstName C1
SYMATTR Value 1n
SYMBOL voltage 0 192 R0
WINDOW 123 24 132 Left 0
WINDOW 39 0 0 Left 0
SYMATTR Value2 AC 1
SYMATTR InstName V1
SYMATTR Value ""
SYMBOL res 112 176 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG 0 336 0
FLAG 288 336 0
TEXT -40 80 Left 0 !.ac dec 100 10 10meg
* Z:\home\khalils\Downloads\files\data\raw_asc\b60107a81059_AO4468_test.asc
* Generated by LTspice 26.0.1 for Windows.
* AO4468
* AO3414
* AOD456
* * http://www.aosmd.com/web/products/mosfet.jsp\n* Changes: \n* level=5 to level=3 in the AO4468 and AOD456\n* LAMBDA=1.5 to KAPPA=1.5 in the model AO4468\n* VTO from 1.4V to 2V in the model AO4468
* .dc V1 0 5 .01 V2 0 4 1
V2 N003 0 2
V1 N001 0 5
XM1 N002 N003 0 AO4468 ;pnba D)G)S
R1 N001 N002 1m
.include AO4468.txt
.dc V2 0 4 0.01
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 256 -48 -16 -48
WIRE 256 -16 256 -48
WIRE -16 80 -16 -48
WIRE 256 112 256 64
WIRE 208 192 112 192
WIRE 112 272 112 192
WIRE -16 400 -16 160
WIRE 112 400 112 352
WIRE 112 400 -16 400
WIRE 256 400 256 208
WIRE 256 400 112 400
WIRE -16 416 -16 400
SYMBOL voltage 112 256 R0
SYMATTR InstName V2
SYMATTR Value 2
SYMBOL voltage -16 64 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL res 240 -32 R0
SYMATTR InstName R1
SYMATTR Value 1m
SYMBOL nmos 208 112 R0
SYMATTR InstName M1
SYMATTR Value AO4468
SYMATTR Prefix X
FLAG -16 416 0
TEXT -16 -128 Left 0 !.include AO4468.txt
TEXT -24 -88 Left 0 !.dc V2 0 4 0.01
TEXT 376 184 Left 0 ;AO4468
TEXT 376 216 Left 0 ;AO3414
TEXT 376 248 Left 0 ;AOD456
TEXT -32 -312 Left 0 ;* http://www.aosmd.com/web/products/mosfet.jsp\n* Changes: \n* level=5 to level=3 in the AO4468 and AOD456\n* LAMBDA=1.5 to KAPPA=1.5 in the model AO4468\n* VTO from 1.4V to 2V in the model AO4468
TEXT 216 -88 Left 0 ;.dc V1 0 5 .01 V2 0 4 1
* Z:\home\khalils\Downloads\files\data\raw_asc\61d9b327f701_iNMOS.asc
* Generated by LTspice 26.0.1 for Windows.
* body diode
* snubber
* binary
* Ideal NMOS
* on resistance of NMOS/Body Diode\nseries inductance\nsnubber resistance\nsnubber capacitance
* Drain
* Source
* Gate
* 2025-7-21
* <Revision History>\n2024-12-29: Initial version\n2025-07-21: Changed body diode model from SW based to D model based to improve convergence.
L2 D N002 {esl}
R1 D N003 {rsnb}
S1 S N001 G S SW_iNMOS
C1 N003 S {csnb}
D1 S N002 myD
L1 D N001 {esl}
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.MODEL SW_iNMOS SW (VT=0.5 RON={ron} ROFF=100Meg)
.MODEL myD D(RON=10u ROFF=100Meg Vfwd=1p)
.param ron=10m
.param esl=1f
.param rsnb=1k
.param csnb=10p
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1384 680
WIRE 288 -288 288 -320
WIRE 608 -288 288 -288
WIRE 928 -288 608 -288
WIRE 288 -240 288 -288
WIRE 608 -240 608 -288
WIRE 928 -192 928 -288
WIRE 288 -112 288 -160
WIRE 240 -96 96 -96
WIRE 608 -96 608 -160
WIRE 928 -80 928 -112
WIRE 240 -48 208 -48
WIRE 208 0 208 -48
WIRE 288 0 288 -32
WIRE 288 0 208 0
WIRE 288 80 288 0
WIRE 608 80 608 -32
WIRE 608 80 288 80
WIRE 928 80 928 -16
WIRE 928 80 608 80
WIRE 288 112 288 80
IOPIN 288 -320 BiDir
IOPIN 288 112 BiDir
IOPIN 96 -96 BiDir
SYMBOL sw 288 -16 M180
SYMATTR InstName S1
SYMATTR Value SW_iNMOS
SYMBOL cap 912 -80 R0
SYMATTR InstName C1
SYMATTR Value {csnb}
SYMBOL ind 592 -256 R0
SYMATTR InstName L2
SYMATTR Value {esl}
SYMBOL ind 272 -256 R0
SYMATTR InstName L1
SYMATTR Value {esl}
SYMBOL diode 624 -32 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value myD
SYMBOL res 912 -208 R0
SYMATTR InstName R1
SYMATTR Value {rsnb}
FLAG 288 -320 D
FLAG 288 112 S
FLAG 96 -96 G
TEXT 56 -440 Left 2 !.MODEL SW_iNMOS SW (VT=0.5 RON={ron} ROFF=100Meg)\n.MODEL myD D(RON=10u ROFF=100Meg Vfwd=1p)
TEXT 56 -568 Left 2 !.param ron=10m\n.param esl=1f\n.param rsnb=1k\n.param csnb=10p
TEXT 552 -320 Left 2 ;body diode
TEXT 888 -320 Left 2 ;snubber
TEXT 56 -120 Left 1 ;binary
TEXT 40 -624 Left 4 ;Ideal NMOS
TEXT 312 -568 Left 2 ;on resistance of NMOS/Body Diode\nseries inductance\nsnubber resistance\nsnubber capacitance
TEXT 312 -344 Left 2 ;Drain
TEXT 312 136 Left 2 ;Source
TEXT 56 -64 Left 2 ;Gate
TEXT 1000 -624 Left 2 ;2025-7-21
TEXT 80 208 Left 2 ;<Revision History>\n2024-12-29: Initial version\n2025-07-21: Changed body diode model from SW based to D model based to improve convergence.
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3308B.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3308B.asy)
C3 OUT N003 6.8p
R2 N003 0 10k
XU1 IN IN N002 N003 0 0 IN N001 0 LTC3308B ;pnba Vin)EN)SW)FB)AGND)PGND)RT)Pgood)Mode/Sync
Rload OUT 0 0.85
L1 N002 OUT 150n Rser=3m
R4 OUT N001 500K
V1 IN 0 5
R1 OUT N003 56.2k
C1 OUT 0 10 Rser=2m
.tran 1.5m startup
.lib LTC3308B.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 2652 1736
WIRE 1536 1280 1440 1280
WIRE 1712 1280 1536 1280
WIRE 1440 1296 1440 1280
WIRE 1712 1296 1712 1280
WIRE 1536 1360 1536 1280
WIRE 1552 1360 1536 1360
WIRE 1920 1360 1872 1360
WIRE 2048 1360 2000 1360
WIRE 1440 1392 1440 1376
WIRE 1536 1472 1536 1360
WIRE 1552 1472 1536 1472
WIRE 1920 1472 1872 1472
WIRE 2048 1472 2048 1360
WIRE 2048 1472 2000 1472
WIRE 2144 1472 2048 1472
WIRE 2224 1472 2144 1472
WIRE 2304 1472 2224 1472
WIRE 2048 1488 2048 1472
WIRE 2144 1488 2144 1472
WIRE 2224 1488 2224 1472
WIRE 2304 1488 2304 1472
WIRE 1552 1584 1536 1584
WIRE 2048 1584 2048 1568
WIRE 2048 1584 1872 1584
WIRE 2144 1584 2144 1552
WIRE 2144 1584 2048 1584
WIRE 2224 1584 2224 1552
WIRE 2304 1584 2304 1568
WIRE 2048 1600 2048 1584
WIRE 1648 1680 1648 1664
WIRE 1776 1680 1776 1664
WIRE 2048 1696 2048 1680
SYMBOL VOLTAGE 1440 1280 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL cap 2128 1488 R0
SYMATTR InstName C3
SYMATTR Value 6.8p
SYMBOL res 2032 1584 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL LTC3308B 1712 1456 R0
SYMATTR InstName U1
SYMBOL res 2016 1344 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 500K
SYMBOL cap 2208 1488 R0
SYMATTR InstName C1
SYMATTR Value 10
SYMATTR SpiceLine Rser=2m
SYMBOL res 2288 1472 R0
SYMATTR InstName Rload
SYMATTR Value 0.85
SYMBOL ind 1904 1488 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 150n
SYMATTR SpiceLine Rser=3m
SYMBOL RES 2032 1472 R0
SYMATTR InstName R1
SYMATTR Value 56.2k
FLAG 1776 1680 0
FLAG 1648 1680 0
FLAG 1440 1392 0
FLAG 1536 1584 0
FLAG 2304 1584 0
FLAG 2048 1696 0
FLAG 2224 1584 0
FLAG 1440 1280 IN
FLAG 2304 1472 OUT
TEXT 2184 1696 Left 2 !.tran 1.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\1065aefe923a_MUXinputs.asc
* Generated by LTspice 26.0.1 for Windows.
V3 Sel 0 PULSE(0 5 0 1n 1n 5m 10m)
V1 B 0 PULSE(0 5 0 10n 10n 1.5m 4m)
V2 A 0 PULSE(0 5 0 10n 10n 0.25m 0.5m)
.backanno
.end

* LTspice schematic (.asc):
Version 4.1.1
SHEET 1 956 680
WIRE 304 -48 192 -48
WIRE 96 0 -48 0
WIRE 192 0 192 -48
WIRE -48 48 -48 0
WIRE 560 160 192 160
WIRE 192 208 192 160
IOPIN 96 0 Out
IOPIN 304 -48 Out
IOPIN 560 160 Out
SYMBOL voltage 192 -16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 5 0 10n 10n 0.25m 0.5m)
SYMBOL voltage -48 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 5 0 1n 1n 5m 10m)
SYMBOL voltage 192 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 10n 10n 1.5m 4m)
FLAG -48 128 0
FLAG 192 80 0
FLAG 192 288 0
FLAG 96 0 Sel
FLAG 304 -48 A
FLAG 560 160 B
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1201.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 1 input\nParameter performance modeled at 15V dual supply\nBandwidth modeled at 520 MHz only\nPin Capacitance not included
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1201.asy)
V2 vIN 0 PULSE(0 3 0 1u 1u 5m 10m)
V1 vS 0 SINE(0 15 1k)
V3 v+ 0 15
XU1 v+ v- vIN vS vD 0 ADG1201 ;pnba Vdd)Vss)IN)S)D)GND
R1 vD 0 301
V4 v- 0 -15
.tran 15m
.lib ADG1201.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 936 832
WIRE 240 144 240 96
WIRE -80 224 -112 224
WIRE 112 224 0 224
WIRE 144 224 112 224
WIRE 384 224 336 224
WIRE 464 224 384 224
WIRE 464 256 464 224
WIRE 112 288 48 288
WIRE 144 288 112 288
WIRE -320 336 -320 304
WIRE -192 336 -192 304
WIRE 48 336 48 288
WIRE 464 352 464 336
WIRE 304 448 304 400
WIRE -320 464 -320 416
WIRE -192 464 -192 416
WIRE 48 464 48 416
WIRE 176 464 176 400
SYMBOL voltage -192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -15
SYMBOL voltage 16 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 15 1k)
SYMBOL voltage -320 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL voltage 48 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -20 198 Left 2
SYMATTR Value PULSE(0 3 0 1u 1u 5m 10m)
SYMATTR InstName V2
SYMBOL ADG1201 240 272 R0
SYMATTR InstName U1
SYMBOL res 448 240 R0
SYMATTR InstName R1
SYMATTR Value 301
FLAG -112 224 0
FLAG 48 464 0
FLAG 464 352 0
FLAG 304 448 0
FLAG 384 224 vD
FLAG 112 224 vS
FLAG 112 288 vIN
FLAG -192 304 v-
FLAG 240 96 v+
FLAG -192 464 0
FLAG 176 464 v-
FLAG -320 304 v+
FLAG -320 464 0
TEXT 400 416 Left 2 !.tran 15m
TEXT -360 -16 Left 2 ;Note:\nSwitch shown for a logic 1 input\nParameter performance modeled at 15V dual supply\nBandwidth modeled at 520 MHz only\nPin Capacitance not included
* Z:\home\khalils\Downloads\files\data\raw_asc\31772dcbc446_Q1_iii_.asc
* Generated by LTspice 26.0.1 for Windows.
V1 N001 0 1
R N002 N001 2
L N003 N002 1
C N003 0 1
.tran 0 30s 0 0.00002s
.ic V(n003) = 0
.ic I(L) = 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1360 680
WIRE 176 -208 48 -208
WIRE 368 -208 256 -208
WIRE 528 -208 448 -208
WIRE 48 -160 48 -208
WIRE 528 -144 528 -208
WIRE 48 0 48 -80
WIRE 304 0 48 0
WIRE 528 0 528 -80
WIRE 528 0 304 0
WIRE 304 32 304 0
FLAG 304 32 0
SYMBOL voltage 48 -176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL res 272 -224 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R
SYMATTR Value 2
SYMBOL ind 464 -192 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L
SYMATTR Value 1
SYMBOL cap 512 -144 R0
SYMATTR InstName C
SYMATTR Value 1
TEXT -72 40 Left 2 !.tran 0 30s 0 0.00002s
TEXT 600 -16 Left 2 !.ic V(n003) = 0
TEXT 600 16 Left 2 !.ic I(L) = 0
* Z:\home\khalils\Downloads\files\data\raw_asc\1bb9591fbb6d_discrete_MOSFET-driver.asc
* Generated by LTspice 26.0.1 for Windows.
Q1 N002 N004 0 0 BC846B
C1 vout 0 10n
C2 N004 N003 220p
R3 N004 N003 10k
R2 vout N005 100
V1 N003 0 PULSE(0 3.3 0 1n 1n 10u 20u 10)
R1 N001 N002 1k
V2 N001 0 24
Q3 0 N002 N005 0 BC856B
Q2 N001 N002 N005 0 BC846B
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 200u
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 96 -144 -320 -144
WIRE 368 -144 96 -144
WIRE 368 -48 368 -144
WIRE 96 0 96 -64
WIRE 304 0 96 0
WIRE -320 32 -320 -144
WIRE -64 64 -112 64
WIRE 32 64 0 64
WIRE 96 128 96 0
WIRE 368 128 368 48
WIRE 464 128 368 128
WIRE 576 128 544 128
WIRE -112 176 -112 64
WIRE -112 176 -320 176
WIRE -80 176 -112 176
WIRE 32 176 32 64
WIRE 32 176 0 176
WIRE 368 192 368 128
WIRE 576 208 576 128
WIRE 304 240 304 0
WIRE -320 304 -320 256
WIRE 96 320 96 224
WIRE 368 320 368 288
WIRE 576 320 576 272
SYMBOL npn 304 -48 R0
SYMATTR InstName Q2
SYMATTR Value BC846B
SYMBOL npn 32 128 R0
SYMATTR InstName Q1
SYMATTR Value BC846B
SYMBOL cap 560 208 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res 560 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100
SYMBOL voltage -320 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 3.3 0 1n 1n 10u 20u 10)
SYMBOL res 16 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL voltage -320 16 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 24
SYMBOL cap 0 48 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 220p
SYMBOL pnp 304 288 M180
SYMATTR InstName Q3
SYMATTR Value BC856B
SYMBOL res 80 -160 R0
SYMATTR InstName R1
SYMATTR Value 1k
FLAG -320 304 0
FLAG 96 320 0
FLAG 368 320 0
FLAG 576 320 0
FLAG -320 112 0
FLAG 576 128 vout
TEXT -352 344 Left 2 !.tran 200u