Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2903-C1.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2903-C1.asy)
V1 V1 0 PULSE(0 5 0 100n 100n 250m 500m)
R1 _RST V1 10K
XU1 V1 0 V2 V3 V4 _RST LTC2903-C1 ;pnba V1)GND)V2)V3)V4)_RST
V3 V3 0 PULSE(0 1.8 0 100n 100n 250m 500m)
V4 V4 0 PULSE(0 -5.2 0 100n 100n 250m 500m)
V2 V2 0 PULSE(0 3.3 0 100n 100n 250m 500m)
.tran 1
.lib LTC2903-C1.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 888 680
WIRE 128 48 32 48
WIRE 304 48 208 48
WIRE 0 176 -400 176
WIRE 32 176 32 48
WIRE 32 176 0 176
WIRE 80 176 32 176
WIRE 304 176 304 48
WIRE 304 176 272 176
WIRE 336 176 304 176
WIRE -400 192 -400 176
WIRE 80 240 48 240
WIRE 304 240 272 240
WIRE 400 240 304 240
WIRE 400 256 400 240
WIRE -400 288 -400 272
WIRE 0 320 -224 320
WIRE 80 320 0 320
WIRE 304 320 272 320
WIRE -224 336 -224 320
WIRE 304 336 304 320
WIRE 400 352 400 336
WIRE -224 432 -224 416
WIRE 304 432 304 416
SYMBOL voltage -400 176 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 5 0 100n 100n 250m 500m)
SYMATTR InstName V1
SYMBOL LTC2903-C1 176 240 R0
SYMATTR InstName U1
SYMBOL voltage 304 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 1.8 0 100n 100n 250m 500m)
SYMATTR InstName V3
SYMBOL voltage -224 320 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PULSE(0 3.3 0 100n 100n 250m 500m)
SYMBOL voltage 400 240 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V4
SYMATTR Value PULSE(0 -5.2 0 100n 100n 250m 500m)
SYMBOL res 224 32 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG 48 240 0
FLAG -400 288 0
FLAG -224 432 0
FLAG 304 432 0
FLAG 400 352 0
FLAG 0 176 V1
FLAG 0 320 V2
FLAG 304 320 V3
FLAG 304 240 V4
FLAG 336 176 _RST
TEXT 368 480 Left 2 !.tran 1
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3808.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3808.asy)
MQ2 N005 N003 IN IN FDC638P
MQ1 N005 N008 0 0 FDS6680A
L1 N005 OUT 2.2 Rpar=1K
C2 N009 N010 220p
R4 N011 0 59K
Rload OUT 0 5
C1 OUT 0 47 Rser=50m
XU1 N004 0 N007 N001 N011 N010 N006 N002 N008 N003 IN IN N005 N005 0 LTC3808 ;pnba PLLLPF)SYNC/Mode)Track/SS)Pgood)Vfb)Ith)Run)Iprg)BG)TG)Sense+)Vin)Sense-)SW)GND
R2 IN N001 100K
V1 IN 0 5
R1 0 N009 15K
R3 OUT N011 187K
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.tran 2.5m startup
.lib LTC3808.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1224 996
WIRE 48 -80 -160 -80
WIRE 176 -80 48 -80
WIRE 400 -80 176 -80
WIRE -160 -64 -160 -80
WIRE 176 -64 176 -80
WIRE -160 32 -160 16
WIRE 48 32 48 -80
WIRE 176 32 176 16
WIRE -64 80 -80 80
WIRE 400 80 400 -80
WIRE 400 80 288 80
WIRE 400 144 400 80
WIRE -64 160 -80 160
WIRE 352 160 288 160
WIRE -64 240 -80 240
WIRE 400 240 288 240
WIRE 400 288 400 240
WIRE 448 288 400 288
WIRE 560 288 528 288
WIRE 656 288 560 288
WIRE 752 288 656 288
WIRE 656 304 656 288
WIRE 752 304 752 288
WIRE -64 320 -80 320
WIRE 400 320 400 288
WIRE 400 320 288 320
WIRE 560 384 560 288
WIRE -64 400 -80 400
WIRE 352 400 288 400
WIRE 656 400 656 368
WIRE 752 400 752 384
WIRE 400 432 400 416
WIRE -240 480 -256 480
WIRE -144 480 -160 480
WIRE -64 480 -80 480
WIRE 560 480 560 464
WIRE 560 480 288 480
WIRE 560 496 560 480
WIRE 112 544 112 528
WIRE 560 592 560 576
SYMBOL res -256 464 M90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 15K
SYMBOL ind 432 304 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 2.2
SYMATTR SpiceLine Rpar=1K
SYMBOL cap -144 464 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 220p
SYMBOL nmos 352 320 R0
SYMATTR InstName Q1
SYMATTR Value FDS6680A
SYMBOL voltage -160 -80 R0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL pmos 352 240 M180
WINDOW 0 58 64 Left 2
WINDOW 3 53 25 Left 2
SYMATTR InstName Q2
SYMATTR Value FDC638P
SYMBOL res 544 368 R0
SYMATTR InstName R3
SYMATTR Value 187K
SYMBOL res 160 -80 R0
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL res 544 480 R0
SYMATTR InstName R4
SYMATTR Value 59K
SYMBOL res 736 288 R0
SYMATTR InstName Rload
SYMATTR Value 5
SYMBOL cap 640 304 R0
SYMATTR SpiceLine Rser=50m
SYMATTR Value 47
SYMATTR InstName C1
SYMBOL PowerProducts\\LTC3808 112 272 R0
SYMATTR InstName U1
FLAG 400 432 0
FLAG 656 400 0
FLAG -256 480 0
FLAG 112 544 0
FLAG -160 32 0
FLAG 752 400 0
FLAG 560 592 0
FLAG -80 160 0
FLAG -160 -80 IN
FLAG 752 288 OUT
TEXT 648 560 Left 2 !.tran 2.5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\35d9cf725495_Prob_4b2.asc
* Generated by LTspice 26.0.1 for Windows.
* Long Channel
* l=10u w=15u
;.dc V1 0 1 1m
M1 Vds1 Vgs1 0 0 nch_tt l=10u w=15u
V1 Vgs1 0 1
V2 Vds1 0 1.8V
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.include TSMC180.lib
.dc V2 0 1.8 0.01 V1 0 1 0.2
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 948 680
WIRE 192 64 160 64
WIRE 160 80 160 64
WIRE 160 80 16 80
WIRE 16 96 16 80
WIRE 160 96 160 80
WIRE -160 176 -192 176
WIRE -32 176 -160 176
WIRE -160 192 -160 176
WIRE 16 208 16 192
WIRE 160 208 160 176
WIRE -160 288 -160 272
IOPIN -192 176 In
IOPIN 192 64 Out
SYMBOL voltage -160 176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 1
SYMBOL voltage 160 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 1.8V
SYMBOL nmos -32 96 R0
SYMATTR InstName M1
SYMATTR Value nch_tt
SYMATTR Value2 l=10u w=15u
FLAG -160 288 0
FLAG 16 208 0
FLAG 160 208 0
FLAG -192 176 Vgs1
FLAG 192 64 Vds1
TEXT 344 80 Left 2 !.include TSMC180.lib
TEXT 344 136 Left 2 !.dc V2 0 1.8 0.01 V1 0 1 0.2
TEXT 344 112 Left 2 !;.dc  V1 0 1 1m
TEXT -88 0 Left 2 ;Long Channel
TEXT -24 256 Left 2 ;l=10u w=15u
* Z:\home\khalils\Downloads\files\data\raw_asc\33c31c62c1ec_Fig9_27.asc
* Generated by LTspice 26.0.1 for Windows.
M1 N001 N002 0 0 N_50n l=100n w=500n
VGS N002 0 1.05
VDS N001 0 100m
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.dc VGS 0 1
.include cmosedu_models.txt
* Plot Id(M1) and d(Id(m1)) (to get gm)
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1136 680
WIRE 640 80 448 80
WIRE 448 112 448 80
WIRE 640 112 640 80
WIRE 496 160 448 160
WIRE 400 192 288 192
WIRE 288 208 288 192
WIRE 448 224 448 208
WIRE 640 224 640 192
WIRE 288 304 288 288
FLAG 288 304 0
FLAG 448 224 0
FLAG 640 224 0
FLAG 496 160 0
SYMBOL nmos4 400 112 R0
WINDOW 0 59 18 Left 0
WINDOW 3 64 75 Left 0
WINDOW 123 64 103 Left 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=100n w=500n
SYMBOL voltage 288 192 R0
WINDOW 0 -85 56 Left 0
WINDOW 3 -85 84 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS
SYMATTR Value 1.05
SYMBOL voltage 640 96 R0
WINDOW 0 40 56 Left 0
WINDOW 3 40 84 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDS
SYMATTR Value 100m
TEXT 392 280 Left 0 !.dc VGS 0 1 
TEXT 392 304 Left 0 !.include cmosedu_models.txt
TEXT 416 48 Left 0 ;Plot Id(M1) and d(Id(m1)) (to get gm)
* Z:\home\khalils\Downloads\files\data\raw_asc\032be66a6662_Hysteresis_dc_plot.asc
* Generated by LTspice 26.0.1 for Windows.
* Hysteresis Curve With DC-Analysis\n \nA table is used to map the linear DC-sweep of V1 to a "nonlinear" DC-sweep from -3V to +3V and back to -3V.\n \nPlot V(out) and Ic(Q1) versus V(in)\nTherefore change the x-axis to V(in) after the first simulation run.
* Schmitt trigger
* Translation Table\n-10 ... +10 -> -1 ... +1 ... -1\n \n / / \\ \n / / \\ \n / / \\
B1 in 0 V=1.0*Table(V(in0), -1, -1, 0, 1, 1, -1)
R1 N003 N004 10k
V2 N004 0 -12
R4 N002 N004 12k
V1 in0 0 0
Q1 _out in N003 0 NPN
R3 N001 out 1k
R5 _out N002 10k
V3 N001 0 12
R2 N001 _out 1k
Q2 out N002 N003 0 NPN
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.dc V1 -1 1 0.001
.options plotwinsize=0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 896 680
WIRE -432 240 -432 288
WIRE -432 160 -432 112
WIRE -256 240 -256 288
WIRE -256 160 -256 112
WIRE 400 256 480 256
WIRE 480 256 480 336
WIRE 480 256 576 256
WIRE 400 -16 400 64
WIRE 400 -96 400 -144
WIRE 400 -144 576 -144
WIRE 576 -144 576 -96
WIRE 576 -16 576 16
WIRE 688 256 688 208
WIRE 688 208 640 208
WIRE 400 64 688 64
WIRE 400 64 400 160
WIRE 688 64 688 96
WIRE 688 176 688 208
WIRE 688 336 688 448
WIRE 688 448 480 448
WIRE 480 448 480 416
WIRE 256 -112 256 -144
WIRE 256 -144 400 -144
WIRE 256 -32 256 0
WIRE 480 496 480 448
WIRE 480 608 480 576
WIRE 336 208 288 208
WIRE 576 16 784 16
WIRE 576 16 576 160
WIRE 688 64 784 64
IOPIN 288 208 In
IOPIN 784 16 Out
SYMBOL voltage 256 -128 R0
SYMATTR InstName V3
SYMATTR Value 12
SYMBOL npn 640 160 M0
SYMATTR InstName Q2
SYMBOL voltage -432 144 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL res 560 -112 R0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL res 384 -112 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 464 320 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL bv -256 144 R0
SYMATTR InstName B1
SYMATTR Value V=1.0*Table(V(in0),  -1, -1,   0, 1,   1, -1)
SYMBOL voltage 480 480 R0
SYMATTR InstName V2
SYMATTR Value -12
SYMBOL npn 336 160 R0
SYMATTR InstName Q1
SYMBOL res 672 240 R0
SYMATTR InstName R4
SYMATTR Value 12k
SYMBOL res 672 80 R0
SYMATTR InstName R5
SYMATTR Value 10k
FLAG -432 288 0
FLAG -432 112 in0
FLAG -256 288 0
FLAG -256 112 in
FLAG 256 0 0
FLAG 480 608 0
FLAG 288 208 in
FLAG 784 16 out
FLAG 784 64 _out
TEXT -440 8 Left 0 !.dc V1 -1 1 0.001
TEXT -456 -368 Left 0 ;Hysteresis Curve With DC-Analysis\n \nA table is used to map the linear DC-sweep of V1 to a "nonlinear" DC-sweep from -3V to +3V and back to -3V.\n \nPlot V(out) and Ic(Q1)  versus V(in)\nTherefore change the x-axis to V(in) after the first simulation run.
TEXT 416 -184 Left 0 ;Schmitt trigger
TEXT -160 40 Left 0 ;Translation Table\n-10 ... +10 -> -1 ... +1 ... -1\n \n         /                      / \\      \n      /                      /       \\    \n   /                      /             \\
TEXT -448 -160 Left 0 !.options plotwinsize=0
* Z:\home\khalils\Downloads\files\data\raw_asc\2ebcab68195a_6375.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6375.asy)
Rsense N001 N002 10
V3 0 -V 15
XU1 N001 MP_01 0 0 0 0 NC_02 OUT +V 0 0 0 MP_03 N002 -V LT6375 ;pnba +IN))+REFA)+REFB)+REFC)REF)_SHDN)OUT)V+)-REFC)-REFB)-REFA))-IN)V-
V2 N001 0 PWL(0 0 10m 270 30m -270)
Rload N002 0 500
V1 +V 0 15
.tran 30m
.lib LT6375.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 4832 1408
WIRE 640 464 640 448
WIRE 784 464 784 448
WIRE 640 560 640 544
WIRE 784 560 784 544
WIRE 1008 576 1008 560
WIRE 1088 576 1088 560
WIRE 1168 576 1168 560
WIRE 1360 576 1360 544
WIRE 752 672 608 672
WIRE 848 672 752 672
WIRE 976 688 912 688
WIRE 1520 704 1456 704
WIRE 912 720 848 672
WIRE 976 720 912 720
WIRE 864 752 912 688
WIRE 864 752 752 752
WIRE 752 768 752 752
WIRE 1472 768 1456 768
WIRE 608 832 608 672
WIRE 1008 848 1008 832
WIRE 1088 848 1088 832
WIRE 1168 848 1168 832
WIRE 752 864 752 848
WIRE 1360 864 1360 832
WIRE 608 928 608 912
SYMBOL voltage 640 448 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL res 736 656 R0
SYMATTR InstName Rsense
SYMATTR Value 10
SYMBOL voltage 784 560 M180
WINDOW 0 43 70 Left 2
WINDOW 3 39 33 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL LT6375 1232 704 R0
SYMATTR InstName U1
SYMBOL voltage 608 816 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value PWL(0 0 10m 270 30m -270)
SYMBOL res 736 752 R0
SYMATTR InstName Rload
SYMATTR Value 500
FLAG 640 560 0
FLAG 784 560 0
FLAG 640 448 +V
FLAG 784 448 -V
FLAG 1520 704 OUT
FLAG 1008 560 0
FLAG 1168 848 0
FLAG 1168 560 0
FLAG 1008 848 0
FLAG 1472 768 0
FLAG 1088 848 0
FLAG 1088 560 0
FLAG 752 864 0
FLAG 608 928 0
FLAG 1360 544 +V
FLAG 1360 864 -V
TEXT 1392 1000 Left 2 !.tran 30m
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8029.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8029.asy)
Rload OUT 0 8.6
C2 OUT 0 22 V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
R3 N003 0 158K
XU1 N002 OUT IN IN 0 MP_01 MP_02 OUT N001 N003 LTM8029 ;pnba FB)OUT)Run)Vin)GND)))Bias)Pgood)Rt
V1 IN 0 10
R4 IN N001 100K
R1 N002 0 309K
.tran 750u startup
.lib LTM8029.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 972 680
WIRE 48 16 -64 16
WIRE 128 16 48 16
WIRE 144 16 128 16
WIRE 432 16 400 16
WIRE -64 32 -64 16
WIRE 48 112 48 16
WIRE 128 112 128 16
WIRE 144 112 128 112
WIRE 432 112 432 16
WIRE 432 112 400 112
WIRE 560 112 432 112
WIRE 640 112 560 112
WIRE -64 128 -64 112
WIRE 560 128 560 112
WIRE 640 128 640 112
WIRE 48 208 48 192
WIRE 144 208 48 208
WIRE 480 208 400 208
WIRE 480 224 480 208
WIRE 560 224 560 192
WIRE 640 224 640 208
WIRE 48 304 32 304
WIRE 144 304 128 304
WIRE 416 304 400 304
WIRE 480 320 480 304
SYMBOL res 144 288 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 158K
SYMBOL cap 544 128 R0
SYMATTR InstName C2
SYMATTR Value 22
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.002 Lser=0 mfg="TDK" pn="C4532X5ROJ47@M" type="X5R"
SYMBOL res 464 208 R0
SYMATTR InstName R1
SYMATTR Value 309K
SYMBOL res 32 96 R0
SYMATTR InstName R4
SYMATTR Value 100K
SYMBOL PowerProducts\\LTM8029 272 160 R0
SYMATTR InstName U1
SYMBOL res 624 112 R0
SYMATTR InstName Rload
SYMATTR Value 8.6
SYMBOL voltage -64 16 R0
SYMATTR InstName V1
SYMATTR Value 10
FLAG 416 304 0
FLAG 32 304 0
FLAG 560 224 0
FLAG 640 224 0
FLAG -64 128 0
FLAG -64 16 IN
FLAG 640 112 OUT
FLAG 480 320 0
TEXT 600 328 Left 2 !.tran 750u startup
* Z:\home\khalils\Downloads\files\data\raw_asc\63af6b0a4da4_MOSFET_-_I.asc
* Generated by LTspice 26.0.1 for Windows.
V2 N001 0 2.5
M1 N002 N001 0 0 my_model l=1u w=100u
V1 N002 0 5
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.model my_model NMOS (KP=500u VT0=0.7 LAMBDA=0.01)
.dc V1 0 5 0.01 V2 0 5 0.5
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 96 16 96
WIRE 320 96 176 96
WIRE 16 112 16 96
WIRE 320 112 320 96
WIRE 192 144 176 144
WIRE 128 176 128 96
WIRE 192 192 192 144
WIRE 192 192 176 192
WIRE 16 208 16 192
WIRE 176 208 176 192
WIRE 320 208 320 192
SYMBOL voltage 320 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage 16 96 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 2.5
SYMBOL nmos4 128 96 R0
WINDOW 3 69 51 Left 2
WINDOW 123 66 65 Left 2
SYMATTR Value my_model
SYMATTR Value2 l=1u w=100u
SYMATTR InstName M1
FLAG 16 208 0
FLAG 176 208 0
FLAG 320 208 0
TEXT 8 264 Left 2 !.model my_model NMOS (KP=500u VT0=0.7 LAMBDA=0.01)
TEXT 104 240 Left 2 !.dc V1 0 5 0.01 V2 0 5 0.5
* Z:\home\khalils\Downloads\files\data\raw_asc\499833d56373_apbn.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 Vin 10k
XU1 N002 N001 Vout opamp Aol=100K GBW=10Meg ;pnba invin)noninvin)out
Vin Vin 0 0
V1 Vref 0 5
Rg N002 Vref 500k
R2 N001 0 9.615k
Rf Vout N002 10k
.dc Vin -1 1 0.01
.lib opamp.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 800
WIRE -112 64 -144 64
WIRE 0 64 -32 64
WIRE 160 64 0 64
WIRE 304 80 224 80
WIRE 400 80 304 80
WIRE 0 96 0 64
WIRE 160 96 96 96
WIRE 96 208 96 96
WIRE 160 208 96 208
WIRE 304 208 304 80
WIRE 304 208 240 208
WIRE 0 224 0 176
WIRE 96 240 96 208
WIRE 96 352 96 320
WIRE 96 352 -144 352
WIRE 64 544 64 512
WIRE 160 544 160 512
WIRE 64 656 64 624
WIRE 160 656 160 624
SYMBOL res -16 80 R0
SYMATTR InstName R2
SYMATTR Value 9.615k
SYMBOL res 80 224 R0
SYMATTR InstName Rg
SYMATTR Value 500k
SYMBOL res -16 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 256 192 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName Rf
SYMATTR Value 10k
SYMBOL Opamps\\opamp 192 144 M180
SYMATTR InstName U1
SYMBOL voltage 160 528 R0
SYMATTR InstName Vin
SYMATTR Value 0
SYMBOL voltage 64 528 R0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 64 512 Vref
FLAG 64 656 0
FLAG 160 656 0
FLAG 400 80 Vout
FLAG -144 64 Vin
FLAG 160 512 Vin
FLAG -144 352 Vref
FLAG 0 224 0
TEXT 32 784 Left 2 !.dc Vin -1 1 0.01
TEXT 32 752 Left 2 !.lib opamp.sub
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1991.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1991.asy)
XU1 N001 NC_01 NC_02 -V 0 OUT +V NC_03 NC_04 0 LT1991 ;pnba P1)P3)P9)Vee)Ref)OUT)VCC)M9)M3)M1
V2 +V 0 +5
V1 -V 0 -5
V4 N001 0 SINE(0 .1 100)
.tran .1
.lib LT1991.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1156 980
WIRE 496 400 400 400
WIRE 144 432 144 400
WIRE 320 432 320 416
WIRE 400 432 400 400
WIRE -144 528 -144 512
WIRE -16 528 -16 512
WIRE -144 624 -144 608
WIRE -16 624 -16 608
WIRE 320 704 320 688
WIRE 400 720 400 688
WIRE 144 752 144 688
WIRE 144 848 144 832
SYMBOL voltage -144 512 R0
SYMATTR InstName V1
SYMATTR Value -5
SYMBOL voltage -16 512 R0
SYMATTR InstName V2
SYMATTR Value +5
SYMBOL voltage 144 736 R0
SYMATTR InstName V4
SYMATTR Value SINE(0 .1 100)
SYMBOL LT1991 320 560 R0
SYMATTR InstName U1
FLAG -16 624 0
FLAG -144 624 0
FLAG -144 512 -V
FLAG -16 512 +V
FLAG 320 416 +V
FLAG 320 704 -V
FLAG 400 720 0
FLAG 144 400 0
FLAG 144 848 0
FLAG 496 400 OUT
TEXT 440 792 Left 2 !.tran .1
* Z:\home\khalils\Downloads\files\data\raw_asc\1a4bb4ae6601_Calculo_de_IDq.asc
* Generated by LTspice 26.0.1 for Windows.
R1 N001 N002 1k
R2 N001 N003 1k
D2 N003 0 D
V1 N001 0 5
D1 N002 0 D
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -16 0 -16
WIRE 304 -16 160 -16
WIRE 160 32 160 -16
WIRE 304 32 304 -16
WIRE 0 96 0 -16
WIRE 160 160 160 112
WIRE 304 160 304 112
WIRE 0 272 0 176
WIRE 160 272 160 224
WIRE 160 272 0 272
WIRE 304 272 304 224
WIRE 304 272 160 272
SYMBOL res 144 16 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 288 160 R0
SYMATTR InstName D2
SYMBOL diode 144 160 R0
SYMATTR InstName D1
SYMBOL res 288 16 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL voltage 0 80 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
FLAG 160 272 0
TEXT -34 296 Left 2 !.op
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8336.asc
* Generated by LTspice 26.0.1 for Windows.
* 2MHz
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT8336.asy)
Rload OUT 0 40
R1 OUT N004 1Meg
XU1 0 N006 0 N004 OUT N001 N002 N005 IN IN N003 LT8336 ;pnba SYNC/MODE)RT)GND)FB)VOUT)SW)BST)INTVcc)VIN)EN/UVLO)PG
V1 IN 0 12
R2 N004 0 43.2K
R3 N003 N005 100K
C1 N005 0 1
R4 N006 0 47.5K
C3 OUT 0 10 x2 Rser=10m
C2 N001 N002 0.1
L1 IN N001 6.8 Rser=65m
.tran 1.8m startup
.lib LT8336.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1352 740
WIRE -304 0 -336 0
WIRE -192 0 -304 0
WIRE -96 0 -192 0
WIRE -64 0 -96 0
WIRE 48 0 16 0
WIRE 192 0 48 0
WIRE -336 16 -336 0
WIRE 192 16 192 0
WIRE -96 96 -96 0
WIRE 48 96 48 0
WIRE 192 96 192 80
WIRE -336 112 -336 96
WIRE -192 176 -192 0
WIRE -160 176 -192 176
WIRE 352 176 256 176
WIRE 496 176 352 176
WIRE 576 176 496 176
WIRE 640 176 576 176
WIRE 352 192 352 176
WIRE 640 192 640 176
WIRE 496 208 496 176
WIRE -160 240 -304 240
WIRE -304 272 -304 240
WIRE 496 288 496 272
WIRE 640 288 640 272
WIRE -160 304 -176 304
WIRE 352 304 352 272
WIRE 352 304 256 304
WIRE 352 320 352 304
WIRE -304 400 -304 352
WIRE -80 400 -80 384
WIRE -80 400 -304 400
WIRE 176 400 176 384
WIRE 48 416 48 384
WIRE 352 416 352 400
WIRE -80 480 -80 464
WIRE 48 528 48 496
SYMBOL res 624 176 R0
SYMATTR InstName Rload
SYMATTR Value 40
SYMBOL res -320 256 R0
SYMATTR InstName R3
SYMATTR Value 100K
SYMBOL cap 480 208 R0
WINDOW 3 40 35 Left 2
WINDOW 123 31 60 Left 2
SYMATTR Value 10
SYMATTR Value2 x2
SYMATTR SpiceLine Rser=10m
SYMATTR InstName C3
SYMBOL LT8336 48 240 R0
SYMATTR InstName U1
SYMBOL ind -80 16 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 5 56 VBottom 2
SYMATTR InstName L1
SYMATTR Value 6.8
SYMATTR SpiceLine Rser=65m
SYMBOL res 336 176 R0
SYMATTR InstName R1
SYMATTR Value 1Meg
SYMBOL res 32 400 R0
SYMATTR InstName R4
SYMATTR Value 47.5K
SYMBOL cap -96 400 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL voltage -336 0 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL cap 176 16 R0
SYMATTR InstName C2
SYMATTR Value 0.1
SYMBOL res 336 304 R0
SYMATTR InstName R2
SYMATTR Value 43.2K
FLAG -80 480 0
FLAG 176 400 0
FLAG -336 112 0
FLAG 352 416 0
FLAG 640 288 0
FLAG 496 288 0
FLAG -304 0 IN
FLAG 576 176 OUT
FLAG 48 528 0
FLAG -176 304 0
TEXT 384 496 Left 2 !.tran 1.8m startup
TEXT 72 512 Left 2 ;2MHz
* Z:\home\khalils\Downloads\files\data\raw_asc\2f417c888775_simple_current_mirror.asc
* Generated by LTspice 26.0.1 for Windows.
;.dc I1 1m 5.2m 1m
Q2 0 N002 N003 0 2N2222
I1 N001 N002 5m
Q1 N002 N002 N003 0 2N2222
V2 0 N003 5
V1 N001 0 5
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.op
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 160 -272 -48 -272
WIRE 720 -272 576 -272
WIRE -48 -240 -48 -272
WIRE 160 -224 160 -272
WIRE 720 -224 720 -272
WIRE -48 -128 -48 -160
WIRE 160 -64 160 -144
WIRE 288 -64 160 -64
WIRE 160 -16 160 -64
WIRE 576 -16 576 -272
WIRE 288 32 288 -64
WIRE 288 32 224 32
WIRE 512 32 288 32
WIRE 160 160 160 80
WIRE 384 160 160 160
WIRE 576 160 576 80
WIRE 576 160 384 160
WIRE 384 208 384 160
WIRE 384 320 384 288
SYMBOL voltage -48 -256 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL current 160 -224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 5m
SYMBOL voltage 384 304 R180
WINDOW 0 24 96 Left 2
WINDOW 3 24 16 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 5
SYMBOL npn 224 -16 M0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL npn 512 -16 R0
SYMATTR InstName Q2
SYMATTR Value 2N2222
FLAG -48 -128 0
FLAG 384 320 0
FLAG 720 -224 0
TEXT 64 104 Left 2 !.op
TEXT -72 136 Left 2 !;.dc I1 1m 5.2m 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\0a2417ca8467_Select_Source_by_Param_2.asc
* Generated by LTspice 26.0.1 for Windows.
* Select a source V1 ... V3 by switch parameter s
;.step param s 1 3 1
V3 3 0 PULSE(0 1 0 .02 .04 .025 .2)
V2 2 0 PULSE(0 1 0 .1 .2 .1 .5)
V1 1 0 SINE(0 1 5)
B1 0 out V=V({s})
.param s=1 ;switch parameter
.tran 1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 176 176 176 128
WIRE 176 336 176 288
WIRE 176 496 176 448
WIRE 240 128 176 128
WIRE 240 288 176 288
WIRE 240 448 176 448
WIRE 416 176 416 128
WIRE 608 128 416 128
IOPIN 608 128 Out
SYMBOL voltage 176 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 1 0 .1 .2 .1 .5)
SYMBOL voltage 176 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 5)
SYMBOL bi 416 256 R180
WINDOW 0 24 88 Left 0
WINDOW 3 -83 -59 Left 0
SYMATTR InstName B1
SYMATTR Value V=V({s})
SYMBOL voltage 176 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value PULSE(0 1 0 .02 .04 .025 .2)
FLAG 416 256 0
FLAG 176 256 0
FLAG 240 128 1
FLAG 176 416 0
FLAG 240 288 2
FLAG 608 128 out
FLAG 176 576 0
FLAG 240 448 3
TEXT 384 56 Left 0 !.param s=1  ;switch parameter\n;.step param s 1 3 1
TEXT 158 66 Left 0 !.tran 1
TEXT 152 24 Left 0 ;Select a source V1 ... V3 by switch parameter s