Si7li/ltspice-spice-circuits huggingface dataset:
* Z:\tmp\asc_dec_bjh7r6w2\0c3e845da91d_circuitoRLC_dec2.asc
* Generated by LTspice 26.0.1 for Windows.
C2 N007 0 0.5
R1 N002 N001 3
V2 N008 0 SINE(0 4 0.318309886 0 0 45)
C1 N006 N008 0.3333
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1592 1044
WIRE 80 96 -32 96
WIRE 224 96 160 96
WIRE 368 96 304 96
WIRE 448 96 368 96
WIRE 368 144 368 96
WIRE 368 256 368 224
WIRE 720 304 720 224
WIRE 368 368 368 336
WIRE 720 416 720 384
WIRE 368 480 368 432
WIRE 368 608 368 560
WIRE 368 608 -32 608
WIRE 720 608 720 480
WIRE 720 608 368 608
WIRE 368 656 368 608
SYMBOL cap 704 416 R0
SYMATTR InstName C2
SYMATTR Value 0.5
SYMBOL res 176 80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 3
SYMBOL voltage 368 464 R0
WINDOW 3 -11 244 Invisible 2
WINDOW 123 5 109 Left 2
WINDOW 39 0 0 Left 0
SYMATTR Value ""
SYMATTR Value2 SINE(0 4 0.318309886 0 0 45)
SYMATTR InstName V2
SYMBOL cap 352 368 R0
SYMATTR InstName C1
SYMATTR Value 0.3333
FLAG 368 656 0
FLAG 720 608 B
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7170-3.3.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADM7170-3.3.asy)
V1 IN 0 3.8
XU1 IN OUT IN N001 OUT 0 ADM7170-3.3 ;pnba Vin)Sense)EN)SS)Vout)GND
C2 N001 0 1n
C1 OUT 0 4.7 Rser=1.5m
Rload OUT 0 10
.tran 5m startup
.lib ADM7170-3.3.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1048 680
WIRE 64 32 -32 32
WIRE 96 32 64 32
WIRE 384 32 352 32
WIRE 448 32 384 32
WIRE 544 32 448 32
WIRE -32 48 -32 32
WIRE 448 48 448 32
WIRE 544 48 544 32
WIRE 64 128 64 32
WIRE 96 128 64 128
WIRE -32 144 -32 128
WIRE 448 144 448 112
WIRE 544 144 544 128
WIRE 16 224 0 224
WIRE 96 224 80 224
WIRE 384 224 384 32
WIRE 384 224 352 224
WIRE 224 304 224 288
SYMBOL cap 80 240 M270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL cap 432 48 R0
SYMATTR InstName C1
SYMATTR Value 4.7
SYMATTR SpiceLine Rser=1.5m
SYMBOL res 528 32 R0
SYMATTR InstName Rload
SYMATTR Value 10
SYMBOL ADM7170-3.3 224 128 R0
SYMATTR InstName U1
SYMBOL voltage -32 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 3.8
FLAG 224 304 0
FLAG -32 144 0
FLAG 0 224 0
FLAG 544 144 0
FLAG 448 144 0
FLAG -32 32 IN
FLAG 544 32 OUT
TEXT 408 264 Left 2 !.tran 5m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6079.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6079.asy)
R3 N002 IN 10Meg
R5 0 N004 5Meg
C1 N004 IN 270p
V2 -V 0 -2.5
R2 N001 0 10Meg
R1 OUT N001 10Meg
C3 N002 0 540p
V1 +V 0 2.5
R4 N003 N002 10Meg
V3 IN 0 ac 1
C2 N003 N004 270p
XU1 N003 N001 +V -V OUT LTC6078 ;pnba IN+)IN-)VCC)VEE)OUT
.ac oct 1000 1 1K
.lib LTC5.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 820
WIRE 48 320 16 320
WIRE 144 320 128 320
WIRE 256 320 144 320
WIRE 368 320 336 320
WIRE -496 384 -496 368
WIRE -384 384 -384 368
WIRE 224 384 224 368
WIRE 144 400 144 320
WIRE 192 400 144 400
WIRE 368 416 368 320
WIRE 368 416 256 416
WIRE 400 416 368 416
WIRE -112 432 -128 432
WIRE 0 432 -32 432
WIRE 48 432 0 432
WIRE 144 432 128 432
WIRE 192 432 144 432
WIRE 0 448 0 432
WIRE 224 464 224 448
WIRE -496 480 -496 464
WIRE -384 480 -384 464
WIRE -128 512 -128 432
WIRE -128 512 -224 512
WIRE -224 528 -224 512
WIRE 0 528 0 512
WIRE -128 576 -128 512
WIRE -96 576 -128 576
WIRE 0 576 -32 576
WIRE 48 576 0 576
WIRE 144 576 144 432
WIRE 144 576 112 576
WIRE 0 608 0 576
WIRE -224 624 -224 608
WIRE 0 704 0 688
SYMBOL res 352 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10Meg
SYMBOL voltage -384 368 R0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res -16 704 M180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R5
SYMATTR Value 5Meg
SYMBOL voltage -496 368 R0
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL cap -16 448 R0
SYMATTR InstName C3
SYMATTR Value 540p
SYMBOL res -16 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10Meg
SYMBOL res 144 416 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 10Meg
SYMBOL res 144 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10Meg
SYMBOL cap 112 560 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value 270p
SYMBOL opamps\\LTC6079 224 416 R0
SYMATTR InstName U1
SYMBOL voltage -224 512 R0
SYMATTR InstName V3
SYMATTR Value ac 1
SYMBOL cap -32 560 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 270p
FLAG -496 480 0
FLAG -496 368 +V
FLAG -384 480 0
FLAG -384 368 -V
FLAG -224 624 0
FLAG 16 320 0
FLAG 0 704 0
FLAG 0 528 0
FLAG 400 416 OUT
FLAG -224 512 IN
FLAG 224 368 +V
FLAG 224 464 -V
TEXT 216 592 Left 2 !.ac oct  1000 1 1K
* Z:\home\khalils\Downloads\files\data\raw_asc\23502d1714bb_Draft1.asc
* Generated by LTspice 26.0.1 for Windows.
R1 Vout 0 1k
D1 Vin Vout D
Vin_1 Vin 0 5
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.dc Vin_1 -4 4 0.1
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 80 128 -64 128
WIRE 240 128 144 128
WIRE 240 208 240 128
WIRE -64 224 -64 128
WIRE -64 304 -64 256
WIRE -64 368 -64 304
WIRE 80 368 -64 368
WIRE 240 368 240 288
WIRE 240 368 80 368
FLAG 80 368 0
FLAG -64 128 Vin
FLAG 240 128 Vout
SYMBOL res 224 192 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL diode 80 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMBOL voltage -64 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin_1
SYMATTR Value 5
TEXT 64 416 Left 2 !.dc Vin_1 -4 4 0.1
* Z:\home\khalils\Downloads\files\data\raw_asc\8db5843d72a6_osc_detect.asc
* Generated by LTspice 26.0.1 for Windows.
A1 N002 0 0 0 0 N003 0 0 BUF Vhigh=3.3
C1 high 0 200p
R5 N002 N001 100k
V1 N004 0 SINE(1.65 1.65 10000000)
D1 low N005 BAS21HY
C2 low N001 200p
R6 N003 N006 10k
R3 high 0 800k
R1 N003 N005 10k
R2 N001 low 800k
D2 N006 high BAS21HY
V2 N001 0 3.3
R4 N002 N004 1
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 100u uic
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 608 -80 -208 -80
WIRE 704 -80 608 -80
WIRE 752 -80 704 -80
WIRE -32 16 -48 16
WIRE 64 16 -32 16
WIRE 512 16 432 16
WIRE 608 16 608 0
WIRE 608 16 512 16
WIRE 608 32 608 16
WIRE 432 64 432 16
WIRE 64 96 64 16
WIRE 64 96 48 96
WIRE 304 96 224 96
WIRE 608 128 608 96
WIRE 704 128 704 -80
WIRE 704 128 608 128
WIRE -32 144 -32 96
WIRE 48 160 48 96
WIRE 80 160 48 160
WIRE 160 160 144 160
WIRE 224 160 224 96
WIRE 224 160 160 160
WIRE 432 176 432 128
WIRE 432 176 304 176
WIRE 160 192 160 160
WIRE 304 192 160 192
WIRE 432 208 368 208
WIRE 432 224 432 208
WIRE 304 240 304 192
WIRE 48 272 48 160
WIRE 432 304 432 288
WIRE 512 304 432 304
WIRE 592 304 512 304
WIRE 432 336 432 304
WIRE 512 336 512 304
WIRE 48 352 48 336
WIRE 304 368 304 320
WIRE 368 368 368 208
WIRE 368 368 304 368
WIRE -208 384 -208 -80
WIRE 48 384 48 352
WIRE 48 384 -208 384
SYMBOL res 592 -96 R0
SYMATTR InstName R2
SYMATTR Value 800k
SYMBOL res -48 0 R0
SYMATTR InstName R4
SYMATTR Value 1
SYMBOL Digital\\inv 80 96 R0
SYMATTR InstName A1
SYMATTR SpiceLine Vhigh=3.3
SYMBOL cap 416 336 R0
SYMATTR InstName C1
SYMATTR Value 200p
SYMBOL voltage -32 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(1.65 1.65 10000000)
SYMBOL cap 592 32 R0
SYMATTR InstName C2
SYMATTR Value 200p
SYMBOL diode 416 224 R0
SYMATTR InstName D2
SYMATTR Value BAS21HY
SYMBOL voltage 752 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 3.3
SYMBOL res 32 256 R0
SYMATTR InstName R5
SYMATTR Value 100k
SYMBOL diode 416 64 R0
SYMATTR InstName D1
SYMATTR Value BAS21HY
SYMBOL res 288 224 R0
SYMATTR InstName R6
SYMATTR Value 10k
SYMBOL res 288 80 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 496 320 R0
SYMATTR InstName R3
SYMATTR Value 800k
FLAG -32 224 0
FLAG 80 176 0
FLAG 432 400 0
FLAG 512 416 0
FLAG 752 0 0
FLAG 512 16 low
FLAG 592 304 high
TEXT -66 248 Left 2 !.tran 100u uic
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1967.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC1967.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT6203.asy)
V1 +V 0 2.5
V2 -V 0 -2.5
C1 OUT 0 1
I1 0 IN SINE(0 {Vrms/100*sqrt(2)} 10K)
XU2 IN N002 N003 +V -V LT6202 ;pnba IN+)IN-)OUT)VCC)VEE
XU1 -V N004 N005 OUT 0 +V LTC1967 ;pnba GND)In1)In2)Vout)OutRtn)Vdd
C2 N005 0 .1
R4 N002 N001 100
C3 N001 0 1.5
R3 IN 0 100
R2 N003 N002 100K
R1 N004 N003 1K
.tran 150m
.param Vrms=100u
.lib LTC1966.lib
.lib LTC2.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1264 680
WIRE -896 -496 -896 -512
WIRE -704 -496 -704 -512
WIRE -496 -464 -528 -464
WIRE -416 -464 -432 -464
WIRE -320 -464 -336 -464
WIRE -272 -464 -320 -464
WIRE -160 -464 -192 -464
WIRE -896 -400 -896 -416
WIRE -704 -400 -704 -416
WIRE 64 -400 64 -416
WIRE -256 -368 -256 -384
WIRE -320 -352 -320 -464
WIRE -288 -352 -320 -352
WIRE -160 -336 -160 -464
WIRE -160 -336 -224 -336
WIRE -144 -336 -160 -336
WIRE -48 -336 -64 -336
WIRE 256 -336 176 -336
WIRE -384 -320 -880 -320
WIRE -288 -320 -384 -320
WIRE 256 -320 256 -336
WIRE -880 -304 -880 -320
WIRE -384 -304 -384 -320
WIRE -256 -288 -256 -304
WIRE -128 -240 -144 -240
WIRE -48 -240 -64 -240
WIRE 192 -240 176 -240
WIRE 256 -240 256 -256
WIRE -880 -208 -880 -224
WIRE -384 -208 -384 -224
WIRE 64 -160 64 -176
SYMBOL cap -64 -256 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL res -320 -480 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R4
SYMATTR Value 100
SYMBOL voltage -896 -512 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL SpecialFunctions\\LTC1967 64 -288 R0
SYMATTR InstName U1
SYMBOL res -48 -352 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1K
SYMBOL res -400 -320 R0
SYMATTR InstName R3
SYMATTR Value 100
SYMBOL Opamps\\LT6203 -256 -336 R0
SYMATTR InstName U2
SYMBOL voltage -704 -512 R0
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res -176 -480 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 100K
SYMBOL cap -432 -480 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 1.5
SYMBOL cap 240 -320 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL current -880 -224 M180
WINDOW 0 24 80 Left 2
WINDOW 3 24 0 Left 2
WINDOW 123 24 -42 Left 2
WINDOW 39 24 -21 Left 2
SYMATTR InstName I1
SYMATTR Value SINE(0 {Vrms/100*sqrt(2)} 10K)
FLAG -896 -400 0
FLAG -896 -512 +V
FLAG 64 -416 +V
FLAG 192 -240 0
FLAG 256 -336 OUT
FLAG -704 -400 0
FLAG -704 -512 -V
FLAG 256 -240 0
FLAG 64 -160 -V
FLAG -144 -240 0
FLAG -256 -288 -V
FLAG -256 -384 +V
FLAG -528 -464 0
FLAG -880 -320 IN
FLAG -384 -208 0
FLAG -880 -208 0
TEXT 136 -120 Left 2 !.tran 150m\n.param Vrms=100u
* Z:\home\khalils\Downloads\files\data\raw_asc\0f49f459876d_LTMKI.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\ADR1399H.asy)
* Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy)
R4 N003 0 10k
V1 N001 0 13.5
XU1 N005 0 N001 0 ADR1399H ;pnba 1)2)3)4
R6 N002 N005 1e-6
R2 N003 N004 1k
R3 N004 0 2k
R1 N001 N002 200k
XU2 N002 N004 N001 0 N003 LT1001 ;pnba In+)In-)V+)V-)OUT
R5 N003 N002 1k
.tran 10
.lib ADR1399H.sub
.lib LTC.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 32 -128 -208 -128
WIRE 128 -128 32 -128
WIRE 432 -128 128 -128
WIRE 32 -96 32 -128
WIRE 32 0 32 -16
WIRE 272 0 32 0
WIRE 560 0 352 0
WIRE 432 48 432 -128
WIRE 400 64 352 64
WIRE 560 80 560 0
WIRE 560 80 464 80
WIRE 736 80 560 80
WIRE 32 96 32 0
WIRE 400 96 32 96
WIRE 560 128 560 80
WIRE 432 144 432 112
WIRE -208 160 -208 -128
WIRE 32 160 32 96
WIRE 736 192 736 80
WIRE 352 224 352 64
WIRE 560 224 560 208
WIRE 560 224 352 224
WIRE 560 256 560 224
WIRE -208 288 -208 240
WIRE 32 304 32 240
WIRE 128 304 128 -128
WIRE 736 304 736 272
WIRE 560 368 560 336
WIRE 32 496 32 448
WIRE 80 496 32 496
WIRE 128 496 128 448
WIRE 128 496 80 496
WIRE 80 544 80 496
SYMBOL res 16 144 R0
SYMATTR InstName R6
SYMATTR Value 1e-6
SYMBOL voltage -208 144 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 13.5
SYMBOL res 544 112 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL References\\ADR1399H 16 368 R0
SYMATTR InstName U1
SYMBOL res 544 240 R0
SYMATTR InstName R3
SYMATTR Value 2k
SYMBOL res 16 -112 R0
SYMATTR InstName R1
SYMATTR Value 200k
SYMBOL res 368 -16 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL res 720 176 R0
SYMATTR InstName R4
SYMATTR Value 10k
SYMBOL OpAmps\\LT1001 432 16 R0
SYMATTR InstName U2
FLAG -208 288 0
FLAG 432 144 0
FLAG 560 368 0
FLAG 736 304 0
FLAG 80 544 0
TEXT -240 568 Left 2 !.tran 10
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1634-1.25.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\References\LT1634-1.25.asy)
V1 N001 0 3
XU1 N002 0 LT1634-1.25 ;pnba VCC)VEE
R1 N001 N002 150K
.dc temp -40 80 .1
.lib LTC3.lib
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 128 144 48 144
WIRE 272 144 208 144
WIRE 48 160 48 144
WIRE 272 176 272 144
WIRE 48 256 48 240
WIRE 272 256 272 240
SYMBOL res 112 160 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value 150K
SYMBOL voltage 48 144 R0
SYMATTR InstName V1
SYMATTR Value 3
SYMBOL References\\LT1634-1.25 272 208 R0
SYMATTR InstName U1
FLAG 272 256 0
FLAG 48 256 0
TEXT 72 312 Left 2 !.dc temp -40 80 .1
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP122-2.7.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP122-2.7.asy)
Rload OUT 0 100
C1 IN 0 1
XU1 OUT MP_01 0 IN MP_02 IN ADP122 K=1/5400 ;pnba Vout))GND)En))Vin
C2 OUT 0 1
V1 IN 0 5.5
.tran 10m startup
.lib ADP122.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 884 680
WIRE 80 96 0 96
WIRE 128 96 80 96
WIRE 160 96 128 96
WIRE 400 96 352 96
WIRE 480 96 400 96
WIRE 0 112 0 96
WIRE 80 112 80 96
WIRE 400 112 400 96
WIRE 480 112 480 96
WIRE 0 208 0 192
WIRE 80 208 80 176
WIRE 128 208 128 96
WIRE 160 208 128 208
WIRE 400 208 400 176
WIRE 480 208 480 192
WIRE 256 272 256 256
SYMBOL ADP122-2.7 256 208 R0
SYMATTR InstName U1
SYMBOL voltage 0 96 R0
WINDOW 123 24 130 Left 2
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5.5
SYMBOL res 464 96 R0
SYMATTR InstName Rload
SYMATTR Value 100
SYMBOL cap 64 112 R0
SYMATTR InstName C1
SYMATTR Value 1
SYMBOL cap 384 112 R0
SYMATTR InstName C2
SYMATTR Value 1
FLAG 0 208 0
FLAG 256 272 0
FLAG 400 208 0
FLAG 480 208 0
FLAG 480 96 OUT
FLAG 0 96 IN
FLAG 80 208 0
TEXT 0 272 Left 2 !.tran 10m startup
* Z:\home\khalils\Downloads\files\data\raw_asc\59237495ac0c_Draft_Diode_1N4001.asc
* Generated by LTspice 26.0.1 for Windows.
* Analyse
* Bibliothek
* Parameter
D1 IN2 0 1N4001
R1 IN1 IN2 {R1}
V1 IN1 0 PULSE(0 1 0 .5m .5m 0 1m)
.model D D
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.dio
.tran 2m
.inc elk.lib
.meas TRAN as MAX V(in1/out1) FROM 0 TO 2m
.param R1=10
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 48 80 0 80
WIRE 96 80 48 80
WIRE 240 80 176 80
WIRE 304 80 240 80
WIRE 48 96 48 80
WIRE 240 96 240 80
WIRE 48 192 48 176
WIRE 240 192 240 160
WIRE 240 192 48 192
WIRE 48 208 48 192
IOPIN 0 80 In
IOPIN 304 80 Out
SYMBOL voltage 48 80 R0
WINDOW 3 -323 96 Left 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 17 20 Left 2
SYMATTR Value PULSE(0 1 0 .5m .5m 0 1m)
SYMATTR InstName V1
SYMBOL diode 224 96 R0
WINDOW 0 38 31 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4001
SYMBOL res 80 96 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 1 56 VBottom 2
SYMATTR InstName R1
SYMATTR Value {R1}
FLAG 48 208 0
FLAG 0 80 IN1
FLAG 304 80 IN2
TEXT -96 -64 Left 2 !.tran 2m
TEXT 80 -64 Left 2 !.inc elk.lib
TEXT -96 -16 Left 2 !.meas TRAN as MAX V(in1/out1) FROM 0 TO 2m
TEXT 256 -64 Left 2 !.param R1=10
TEXT -96 -88 Left 2 ;Analyse
TEXT 80 -88 Left 2 ;Bibliothek
TEXT 256 -88 Left 2 ;Parameter
* Z:\home\khalils\Downloads\files\data\raw_asc\98d4371d11e7_Draft2N.asc
* Generated by LTspice 26.0.1 for Windows.
VGS2 VG 0 1
VUDS N001 0 0.9
M1 N001 VG 0 0 nch l=lset w=wset
.model NMOS NMOS
.model PMOS PMOS
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos
.lib cmos018.txt
.dc VGS2 0 1 1m
.param wset=table(n, 1,0.22u, 2,1u, 3,2u, 4,2u, 5,5u, 6,5u, 7,10u, 8,10u, 9,40u)
.param lset=table(n, 1,0.18u, 2,0.5u, 3,0.5u, 4,1u, 5,1u, 6,2u, 7,5u, 8,10u, 9,10u)
.step param n 1 9 1
.meas DC UTH FIND V(VG) WHEN Id(M1)=100n*wset/lset
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 1356 680
WIRE 544 176 224 176
WIRE 224 224 224 176
WIRE 544 224 544 176
WIRE 240 272 224 272
WIRE 80 304 32 304
WIRE 176 304 80 304
WIRE 32 320 32 304
WIRE 240 320 240 272
WIRE 240 320 224 320
WIRE 224 416 224 320
WIRE 544 416 544 304
SYMBOL nmos4 176 224 R0
WINDOW 0 71 23 Left 2
WINDOW 3 72 48 Left 2
WINDOW 123 71 80 Left 2
SYMATTR InstName M1
SYMATTR Value nch
SYMATTR Value2 l=lset w=wset
SYMBOL voltage 544 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName UDS
SYMATTR Value 0.9
SYMBOL voltage 32 304 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VGS2
SYMATTR Value 1
FLAG 224 416 0
FLAG 544 416 0
FLAG 80 304 VG
FLAG 32 400 0
TEXT -40 -64 Left 2 !.lib cmos018.txt
TEXT -40 96 Left 2 !.dc VGS2 0 1 1m
TEXT -40 -16 Left 2 !.param wset=table(n, 1,0.22u, 2,1u, 3,2u, 4,2u, 5,5u, 6,5u, 7,10u, 8,10u, 9,40u)\n.param lset=table(n, 1,0.18u, 2,0.5u, 3,0.5u, 4,1u, 5,1u, 6,2u, 7,5u, 8,10u, 9,10u)\n.step param n 1 9 1\n.meas DC UTH FIND V(VG) WHEN Id(M1)=100n*wset/lset
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8017.asc
* Generated by LTspice 26.0.1 for Windows.
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8017.asy)
V1 +V 0 2.5
R1 N001 0 10K
Rload OUT 0 10K
Vin IN 0 SINE(0 1 10K)
XU1 IN N001 +V -V OUT AD8017 ;pnba 1)2)61)99)50
V2 -V 0 -2.5
R2 OUT N001 10K
.tran 1m
.lib AD8017.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4.1
SHEET 1 1240 700
WIRE -16 -1056 -32 -1056
WIRE 80 -1056 64 -1056
WIRE 96 -1056 80 -1056
WIRE 192 -1056 176 -1056
WIRE -256 -944 -256 -960
WIRE -144 -944 -144 -960
WIRE 80 -944 80 -1056
WIRE 96 -944 80 -944
WIRE 192 -928 192 -1056
WIRE 192 -928 160 -928
WIRE 320 -928 192 -928
WIRE 96 -912 -16 -912
WIRE 320 -912 320 -928
WIRE -16 -896 -16 -912
WIRE -256 -848 -256 -864
WIRE -144 -848 -144 -864
WIRE 320 -816 320 -832
WIRE -16 -800 -16 -816
SYMBOL AD8017 128 -992 R0
SYMATTR InstName U1
SYMBOL voltage -16 -912 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName Vin
SYMATTR Value SINE(0 1 10K)
SYMBOL voltage -256 -960 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 2.5
SYMBOL res 192 -1072 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 10K
SYMBOL res 304 -928 R0
SYMATTR InstName Rload
SYMATTR Value 10K
SYMBOL voltage -144 -960 R0
WINDOW 123 24 146 Left 2
WINDOW 39 24 125 Left 2
SYMATTR InstName V2
SYMATTR Value -2.5
SYMBOL res 80 -1072 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10K
FLAG -256 -960 +V
FLAG -256 -848 0
FLAG -16 -800 0
FLAG 320 -928 OUT
FLAG -16 -912 IN
FLAG 128 -960 +V
FLAG -144 -960 -V
FLAG 128 -896 -V
FLAG -32 -1056 0
FLAG 320 -816 0
FLAG -144 -848 0
TEXT 336 -720 Left 2 !.tran 1m
* Z:\home\khalils\Downloads\files\data\raw_asc\f0c785433263_lab05a-Trans-switch.asc
* Generated by LTspice 26.0.1 for Windows.
* Transistor\nSwitch
V2 N001 0 9
V1 VIN 0 SINE(0 5 100)
R1 N001 VOUT 1000
R3 VOUT 0 1000000
Q1 VOUT VBE 0 0 NPN
R2 VBE VIN 2200
.model NPN NPN
.model PNP PNP
.lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt
.tran 0 .05 0
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 880 680
WIRE 384 16 240 16
WIRE 240 48 240 16
WIRE 384 48 384 16
WIRE 64 112 -16 112
WIRE 240 144 240 128
WIRE 240 160 240 144
WIRE 512 160 240 160
WIRE -16 176 -16 112
WIRE 64 208 64 112
WIRE 160 208 144 208
WIRE 176 208 160 208
WIRE -16 288 -16 256
WIRE 240 288 240 256
WIRE 512 288 512 240
SYMBOL res 496 144 R0
SYMATTR InstName R3
SYMATTR Value 1000000
SYMBOL res 160 192 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 2200
SYMBOL voltage -16 160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 100)
SYMBOL npn 176 160 R0
SYMATTR InstName Q1
SYMBOL res 224 32 R0
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL Misc\\battery 384 32 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 9
FLAG 240 288 0
FLAG -16 288 0
FLAG -16 112 VIN
FLAG 240 144 VOUT
FLAG 512 288 0
FLAG 384 128 0
FLAG 160 208 VBE
TEXT -56 312 Left 0 !.tran 0 .05 0
TEXT 480 64 Left 0 ;Transistor\nSwitch
* Z:\home\khalils\Downloads\files\data\raw_asc\ADG1611.asc
* Generated by LTspice 26.0.1 for Windows.
* Note:\nSwitch shown for a logic 0 input\nPin capacitance and Qinj not included\nParameter performance modeled at 5V supply\nOny one channel is modeled
* Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Switches\ADG1611.asy)
V4 v- 0 -5
V2 vIN 0 PULSE(0 2.5 20n 20n 20n 150m 300m)
C1 vD 0 36p
V1 vS 0 SINE(0 5 20)
V3 v+ 0 5
XU1 vIN vS vD v- v+ 0 ADG1611 ;pnba IN)S)D)Vss)Vdd)GND
R1 vD 0 301
.tran 1
.lib ADG1611.sub
.backanno
.end

* LTspice schematic (.asc):
Version 4
SHEET 1 936 832
WIRE 256 112 240 112
WIRE 240 144 240 112
WIRE -80 224 -112 224
WIRE 112 224 0 224
WIRE 144 224 112 224
WIRE 368 224 336 224
WIRE 416 224 368 224
WIRE 528 224 416 224
WIRE 416 256 416 224
WIRE 528 256 528 224
WIRE 112 288 48 288
WIRE 144 288 112 288
WIRE -272 304 -288 304
WIRE -176 304 -192 304
WIRE -288 336 -288 304
WIRE -192 336 -192 304
WIRE 48 336 48 288
WIRE 416 352 416 336
WIRE 528 352 528 320
WIRE 304 416 304 400
WIRE 176 432 176 400
WIRE 192 432 176 432
WIRE -288 464 -288 416
WIRE -192 464 -192 416
WIRE 48 464 48 416
SYMBOL ADG1611 240 272 R0
SYMATTR InstName U1
SYMBOL voltage -288 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 5
SYMBOL voltage -192 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value -5
SYMBOL voltage 48 320 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 30 177 Left 2
SYMATTR Value PULSE(0 2.5 20n 20n 20n 150m 300m)
SYMATTR InstName V2
SYMBOL voltage 16 224 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 -32 56 VBottom 2
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 5 20)
SYMBOL res 400 240 R0
SYMATTR InstName R1
SYMATTR Value 301
SYMBOL cap 512 256 R0
SYMATTR InstName C1
SYMATTR Value 36p
FLAG -112 224 0
FLAG 48 464 0
FLAG 416 352 0
FLAG 304 416 0
FLAG 368 224 vD
FLAG 112 224 vS
FLAG 112 288 vIN
FLAG 528 352 0
FLAG -272 304 v+
FLAG 256 112 v+
FLAG -288 464 0
FLAG -192 464 0
FLAG -176 304 v-
FLAG 192 432 v-
TEXT 80 528 Left 2 !.tran 1
TEXT -360 -40 Left 2 ;Note:\nSwitch shown for a logic 0 input\nPin capacitance and Qinj not included\nParameter performance modeled at 5V supply\nOny one channel is modeled