* SPICE netlist
M1 N004 N002 0 0 N_50n l=50n w=500n
VDD VDD 0 1
M2 N004 N002 VDD VDD P_50n l=50n w=1u
M5 N003 N004 0 0 N_50n l=50n w=500n
M6 N003 N004 VDD VDD P_50n l=50n w=1u
M7 D clock_b N002 0 N_50n l=50n w=500n
VD D 0 PULSE 0 1 300p 10p 10p 700p 1.9n
Vclock_b clock_b 0 PULSE 1 0 0 10p 10p 1.1n 2.2n
Vclock clock 0 PULSE 0 1 0 10p 10p 1.1n 2.2n
M3 N002 clock D VDD P_50n l=50n w=1u
M4 N002 clock N003 0 N_50n l=50n w=500n
M8 N003 clock_b N002 VDD P_50n l=50n w=1u
M9 Q N001 0 0 N_50n l=50n w=500n
M10 Q N001 VDD VDD P_50n l=50n w=1u
M11 Q_bar Q 0 0 N_50n l=50n w=500n
M12 Q_bar Q VDD VDD P_50n l=50n w=1u
M13 N004 clock N001 0 N_50n l=50n w=500n
M14 N001 clock_b N004 VDD P_50n l=50n w=1u
M15 N001 clock_b Q_bar 0 N_50n l=50n w=500n
M16 Q_bar clock N001 VDD P_50n l=50n w=1u
.tran 10n uic
.include cmosedu_models.txt

* LTspice schematic (.asc)
Version 4
SHEET 1 1728 720
WIRE 256 -280 256 -312
WIRE 256 -280 224 -280
WIRE 352 -280 352 -312
WIRE 768 -280 352 -280
WIRE 256 -248 256 -280
WIRE 352 -248 352 -280
WIRE -592 -232 -592 -264
WIRE -592 -232 -624 -232
WIRE -496 -232 -496 -264
WIRE -96 -232 -496 -232
WIRE -592 -200 -592 -232
WIRE -496 -200 -496 -232
WIRE 432 -200 400 -200
WIRE 640 -200 608 -200
WIRE -416 -152 -448 -152
WIRE -208 -152 -240 -152
WIRE 224 -88 224 -280
WIRE 400 -88 400 -200
WIRE 400 -88 224 -88
WIRE 480 -88 480 -120
WIRE 576 -88 480 -88
WIRE 608 -88 608 -200
WIRE 608 -88 576 -88
WIRE 688 -88 688 -120
WIRE 768 -88 768 -280
WIRE 768 -88 688 -88
WIRE 864 -88 768 -88
WIRE 48 -72 48 -104
WIRE 48 -72 -64 -72
WIRE -624 -40 -624 -232
WIRE -448 -40 -448 -152
WIRE -448 -40 -624 -40
WIRE -368 -40 -368 -72
WIRE -288 -40 -368 -40
WIRE -240 -40 -240 -152
WIRE -240 -40 -288 -40
WIRE -160 -40 -160 -72
WIRE -96 -40 -96 -232
WIRE -96 -40 -160 -40
WIRE 48 -40 48 -72
WIRE 144 -40 144 -104
WIRE 224 -40 224 -88
WIRE 224 -40 144 -40
WIRE 400 -8 400 -88
WIRE 432 -8 400 -8
WIRE 608 -8 608 -88
WIRE 640 -8 608 -8
WIRE -800 8 -800 -56
WIRE -800 8 -864 8
WIRE -704 8 -704 -56
WIRE -624 8 -624 -40
WIRE -624 8 -704 8
WIRE -448 40 -448 -40
WIRE -416 40 -448 40
WIRE -240 40 -240 -40
WIRE -208 40 -240 40
WIRE 480 56 480 8
WIRE 688 56 688 8
WIRE -368 104 -368 56
WIRE -160 104 -160 56
WIRE 576 104 576 -88
WIRE 864 104 576 104
WIRE -288 152 -288 -40
WIRE -64 152 -64 -72
WIRE -64 152 -288 152
WIRE -848 168 -848 152
WIRE -848 184 -848 168
WIRE -704 232 -704 216
WIRE -704 248 -704 232
WIRE -512 248 -512 216
WIRE -384 248 -384 216
WIRE -848 296 -848 264
WIRE -704 360 -704 328
WIRE -512 360 -512 328
WIRE -384 360 -384 328
FLAG -368 8 0
FLAG -848 296 0
FLAG -848 168 VDD
FLAG -368 -120 VDD
FLAG -368 104 0
FLAG -368 -168 VDD
FLAG -160 8 0
FLAG -160 -120 VDD
FLAG -160 104 0
FLAG -160 -168 VDD
FLAG -752 8 0
FLAG -864 8 D
FLAG -720 56 clock_b
FLAG -704 360 0
FLAG -704 232 D
FLAG -384 360 0
FLAG -384 216 clock_b
FLAG -512 360 0
FLAG -512 216 clock
FLAG -752 -56 VDD
FLAG -784 -104 clock
FLAG -544 -200 0
FLAG -512 -152 clock
FLAG -544 -264 VDD
FLAG -576 -312 clock_b
FLAG 480 -40 0
FLAG 480 -168 VDD
FLAG 480 56 0
FLAG 480 -216 VDD
FLAG 688 -40 0
FLAG 688 -168 VDD
FLAG 688 56 0
FLAG 688 -216 VDD
FLAG 96 -40 0
FLAG 128 8 clock
FLAG 864 -88 Q_bar
FLAG 864 104 Q
FLAG 96 -104 VDD
FLAG 64 -152 clock_b
FLAG 304 -248 0
FLAG 336 -200 clock_b
FLAG 304 -312 VDD
FLAG 272 -360 clock
SYMBOL nmos4 -416 -40 R0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage -848 168 R0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL pmos4 -416 -72 M180
SYMATTR InstName M2
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL nmos4 -208 -40 R0
SYMATTR InstName M5
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL pmos4 -208 -72 M180
SYMATTR InstName M6
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL nmos4 -800 56 R270
SYMATTR InstName M7
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage -704 232 R0
SYMATTR Value PULSE 0 1 300p 10p 10p 700p 1.9n
SYMATTR InstName VD
SYMBOL voltage -384 232 R0
SYMATTR Value PULSE 1 0 0 10p 10p 1.1n 2.2n
SYMATTR InstName Vclock_b
SYMBOL voltage -512 232 R0
SYMATTR Value PULSE 0 1 0 10p 10p 1.1n 2.2n
SYMATTR InstName Vclock
SYMBOL pmos4 -704 -104 R90
SYMATTR InstName M3
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL nmos4 -592 -152 R270
SYMATTR InstName M4
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL pmos4 -496 -312 R90
SYMATTR InstName M8
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL nmos4 432 -88 R0
SYMATTR InstName M9
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL pmos4 432 -120 M180
SYMATTR InstName M10
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL nmos4 640 -88 R0
SYMATTR InstName M11
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL pmos4 640 -120 M180
SYMATTR InstName M12
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL nmos4 48 8 R270
SYMATTR InstName M13
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL pmos4 144 -152 R90
SYMATTR InstName M14
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL nmos4 256 -200 R270
SYMATTR InstName M15
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL pmos4 352 -360 R90
SYMATTR InstName M16
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u