* SPICE netlist
XU1 N008 N004 N005 0 vsine ua741 ;pnba In+)In-)V+)V-)OUT
Vdd1 N005 P001 5
C1 vsine N004 {c}
R1 N004 vcosine {r}
V2 N008 0 2.5
R2 vsine N010 {r}
XU2 N010 N012 N007 0 vcosine ua741 ;pnba In+)In-)V+)V-)OUT
Vdd2 N007 P002 5
C2 N010 0 {c}
R3 N012 N008 {r}
C3 vcosine N012 {c}
M1 Qif N002 N003 0 CMOSN l={l} w={w} ad={2.5*w*l} as={2.5*w*l} pd={5*l+2*w} ps={5*l+2*w}
Vin1 N003 0 SINE(0 100m {fin})
Rl1 Qif 0 1k
Cc1 N002 vsine 10n
R4 N001 N002 1k
Vbias1 N001 0 2
Rlp1 Qiflp Qif 5k
Clp1 Qiflp 0 1n
M2 Vif N009 N011 0 CMOSN l={l} w={w} ad={2.5*w*l} as={2.5*w*l} pd={5*l+2*w} ps={5*l+2*w}
Vin2 N011 0 SINE(0 100m {fin} 0 0 90)
Rl2 Vif 0 1k
Cc2 N009 vcosine 10n
R5 N006 N009 1k
Vbias2 N006 0 2
Rlp2 Viflp Vif 5k
Clp2 Viflp 0 1n
V1 P001 0 0
V3 P002 0 0
.include "C:\Users\adisawi\Documents\LTspice\lib\sub\UA741.301"
.param r 5k
.param c 1.5n
.tran 0 0.5m 0.2m
.include "C:\Users\adisawi\Documents\LTspice\lib\sub\TSMC_180nm.txt"
.param w=2u
.param l=1u
.param fin 100k

* LTspice schematic (.asc)
Version 4
SHEET 1 2128 1632
WIRE 712 -800 488 -800
WIRE 824 -800 712 -800
WIRE 904 -800 824 -800
WIRE 1064 -800 984 -800
WIRE 712 -752 712 -800
WIRE 1064 -736 1064 -800
WIRE 280 -688 88 -688
WIRE 1064 -624 1064 -672
WIRE 88 -608 88 -688
WIRE 712 -592 712 -672
WIRE 280 -576 280 -688
WIRE 488 -464 488 -800
WIRE 88 -432 88 -528
WIRE 712 -416 488 -416
WIRE 280 -384 280 -496
WIRE 440 -384 280 -384
WIRE 712 -368 712 -416
WIRE 280 -320 280 -384
WIRE 488 -288 488 -368
WIRE 488 -112 488 -208
WIRE -680 -96 -856 -96
WIRE -456 -96 -616 -96
WIRE 120 -96 -456 -96
WIRE 280 -96 280 -256
WIRE 280 -96 120 -96
WIRE 712 -48 488 -48
WIRE 824 -48 712 -48
WIRE 904 -48 824 -48
WIRE 1064 -48 984 -48
WIRE 712 0 712 -48
WIRE 1064 16 1064 -48
WIRE -600 32 -744 32
WIRE 280 64 88 64
WIRE -600 96 -600 32
WIRE 1064 128 1064 80
WIRE 88 144 88 64
WIRE 712 160 712 80
WIRE 280 176 280 64
WIRE -88 208 -232 208
WIRE -88 272 -88 208
WIRE -744 288 -744 32
WIRE 488 288 488 -48
WIRE -984 304 -1064 304
WIRE -856 304 -856 -96
WIRE -856 304 -904 304
WIRE -776 304 -856 304
WIRE -456 320 -456 -96
WIRE -456 320 -712 320
WIRE 88 320 88 224
WIRE -776 336 -856 336
WIRE 712 336 488 336
WIRE -456 352 -456 320
WIRE 280 368 280 256
WIRE 440 368 280 368
WIRE 712 384 712 336
WIRE -744 400 -744 352
WIRE 280 432 280 368
WIRE -456 448 -456 432
WIRE -376 448 -456 448
WIRE -232 464 -232 208
WIRE 488 464 488 384
WIRE -456 480 -456 448
WIRE -264 480 -344 480
WIRE -88 496 -200 496
WIRE 120 496 -88 496
WIRE 280 496 120 496
WIRE -376 512 -376 448
WIRE -264 512 -376 512
WIRE -856 544 -856 336
WIRE -856 544 -952 544
WIRE -232 576 -232 528
WIRE -456 592 -456 544
WIRE -952 608 -952 544
WIRE 488 640 488 544
WIRE -856 688 -856 544
WIRE -680 688 -856 688
WIRE -344 688 -344 480
WIRE -344 688 -600 688
WIRE -264 688 -344 688
WIRE -88 688 -88 496
WIRE -88 688 -200 688
WIRE -952 720 -952 688
WIRE -1064 816 -1064 304
WIRE -88 816 -88 688
WIRE -88 816 -1064 816
FLAG -744 400 0
FLAG -232 576 0
FLAG -456 592 0
FLAG -952 720 0
FLAG 120 -96 vsine
FLAG 120 496 vcosine
FLAG 712 -368 0
FLAG 488 -112 0
FLAG 712 -592 0
FLAG 824 -800 Qif
FLAG 88 -432 0
FLAG 1064 -624 0
FLAG 1064 -800 Qiflp
FLAG 712 384 0
FLAG 488 640 0
FLAG 712 160 0
FLAG 824 -48 Vif
FLAG 88 320 0
FLAG 1064 128 0
FLAG 1064 -48 Viflp
FLAG -600 256 0
FLAG -88 432 0
SYMBOL OpAmps\\opamp2 -744 256 R0
SYMATTR InstName U1
SYMATTR Value ua741
SYMBOL voltage -600 80 R0
SYMATTR InstName Vdd1
SYMATTR Value 5
SYMBOL cap -616 -112 R90
SYMATTR InstName C1
SYMATTR Value {c}
SYMBOL res -888 288 R90
SYMATTR InstName R1
SYMATTR Value {r}
SYMBOL voltage -952 592 R0
SYMATTR InstName V2
SYMATTR Value 2.5
SYMBOL res -472 336 R0
SYMATTR InstName R2
SYMATTR Value {r}
SYMBOL OpAmps\\opamp2 -232 432 R0
SYMATTR InstName U2
SYMATTR Value ua741
SYMBOL voltage -88 256 R0
SYMATTR InstName Vdd2
SYMATTR Value 5
SYMBOL cap -472 480 R0
SYMATTR InstName C2
SYMATTR Value {c}
SYMBOL res -584 672 R90
SYMATTR InstName R3
SYMATTR Value {r}
SYMBOL cap -200 672 R90
SYMATTR InstName C3
SYMATTR Value {c}
SYMBOL nmos4 440 -464 R0
SYMATTR InstName M1
SYMATTR Value CMOSN
SYMATTR Value2 l={l} w={w} ad={2.5*w*l} as={2.5*w*l} pd={5*l+2*w} ps={5*l+2*w}
SYMBOL voltage 488 -304 R0
SYMATTR InstName Vin1
SYMATTR Value SINE(0 100m {fin})
SYMBOL res 696 -768 R0
SYMATTR InstName Rl1
SYMATTR Value 1k
SYMBOL cap 264 -320 R0
SYMATTR InstName Cc1
SYMATTR Value 10n
SYMBOL res 264 -592 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL voltage 88 -624 R0
SYMATTR InstName Vbias1
SYMATTR Value 2
SYMBOL res 1000 -816 R90
SYMATTR InstName Rlp1
SYMATTR Value 5k
SYMBOL cap 1048 -736 R0
SYMATTR InstName Clp1
SYMATTR Value 1n
SYMBOL nmos4 440 288 R0
SYMATTR InstName M2
SYMATTR Value CMOSN
SYMATTR Value2 l={l} w={w} ad={2.5*w*l} as={2.5*w*l} pd={5*l+2*w} ps={5*l+2*w}
SYMBOL voltage 488 448 R0
SYMATTR InstName Vin2
SYMATTR Value SINE(0 100m {fin} 0 0 90)
SYMBOL res 696 -16 R0
SYMATTR InstName Rl2
SYMATTR Value 1k
SYMBOL cap 264 432 R0
SYMATTR InstName Cc2
SYMATTR Value 10n
SYMBOL res 264 160 R0
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL voltage 88 128 R0
SYMATTR InstName Vbias2
SYMATTR Value 2
SYMBOL res 1000 -64 R90
SYMATTR InstName Rlp2
SYMATTR Value 5k
SYMBOL cap 1048 16 R0
SYMATTR InstName Clp2
SYMATTR Value 1n
SYMBOL voltage -600 160 R0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL voltage -88 336 R0
SYMATTR InstName V3
SYMATTR Value 0