* SPICE netlist
VDD VDD 0 3.3
M1 o1 IN 0 0 iucreate_nmos l=0.5u w=1.5u
M2 o1 IN VDD VDD iucreate_pmos l=0.5u w=3.5u
M3 o2 o1 0 0 iucreate_nmos l=0.5u w=1.5u
M4 o2 o1 VDD VDD iucreate_pmos l=0.5u w=3.5u
M5 OUT o2 0 0 iucreate_nmos l=0.5u w=1.5u
M6 OUT o2 VDD VDD iucreate_pmos l=0.5u w=3.5u
CL OUT 0 10f
ISET o2 0 EXP(0 .75m 8n 10p 8.001n 1n)
D1 0 o2 D
VG1 IN 0 3.3 AC 1
I1 NC_01 NC_02 I
.op
+ GAMMA = 0.5483559 PHI = 0.7 VTO = 0.7640855
+ DELTA = 3.0541177
+ UO = 662.6984452
+ ETA = 3.162045E-6
+ THETA = 0.1013999
+ KP = 1.259355E-4
+ VMAX = 1.442228E5
+ KAPPA = 0.3
+ RSH = 7.513418E-3
+ NFS = 1E12
+ TPG = 1
+ XJ = 3E-7
+ LD = 1E-13
+ WD = 2.334779E-7
+ CGDO = 2.15E-10
+ CGSO = 2.15E-10
+ CGBO = 1E-10
+ CJ = 4.258447E-4
+ PB = 0.9140376
+ MJ = 0.435903
+ CJSW = 3.147465E-10
+ MJSW = 0.1977689 )
+ GAMMA = 0.6243261 PHI = 0.7 VTO = -0.9444911
+ DELTA = 0.1118368
+ UO = 250
+ ETA = 0
+ THETA = 0.1633973
+ KP = 3.924644E-5
+ VMAX = 1E6
+ KAPPA = 30.1015109
+ RSH = 33.9672594
+ NFS = 1E12
+ TPG = -1
+ XJ = 2E-7
+ LD = 5E-13
+ WD = 4.11531E-7
+ CGDO = 2.34E-10
+ CGSO = 2.34E-10
+ CGBO = 1E-10
+ CJ = 7.285722E-4
+ PB = 0.96443
+ MJ = 0.5
+ CJSW = 2.955161E-10
+ MJSW = 0.3184873 )
.tran 0 20n 0.1n
.meas TRAN QCOL INTEG I(ISET)/1e-15
.meas TRAN LET INTEG I(ISET)/1e-12/0.01/5
.meas TRAN PW TRIG V(OUT) VAL=1.65 cross=1 TARG V(OUT) VAL=1.65 cross=2

* LTspice schematic (.asc)
Version 4
SHEET 1 1264 592
WIRE -360 -72 -360 -104
WIRE -344 -72 -360 -72
WIRE -232 -72 -344 -72
WIRE -8 -72 -232 -72
WIRE 8 -72 -8 -72
WIRE 376 -72 8 -72
WIRE 392 -72 376 -72
WIRE -360 -56 -360 -72
WIRE -8 -56 -8 -72
WIRE 376 -56 376 -72
WIRE -408 -40 -456 -40
WIRE -56 -40 -104 -40
WIRE 328 -40 280 -40
WIRE -344 -8 -344 -72
WIRE -344 -8 -360 -8
WIRE 8 -8 8 -72
WIRE 8 -8 -8 -8
WIRE 392 -8 392 -72
WIRE 392 -8 376 -8
WIRE -456 104 -456 -40
WIRE -456 104 -632 104
WIRE -360 104 -360 40
WIRE -104 104 -104 -40
WIRE -104 104 -360 104
WIRE -8 104 -8 40
WIRE 8 104 -8 104
WIRE 120 104 8 104
WIRE 232 104 120 104
WIRE 280 104 280 -40
WIRE 280 104 232 104
WIRE 376 104 376 40
WIRE 520 104 376 104
WIRE 632 104 520 104
WIRE -456 120 -456 104
WIRE 120 136 120 104
WIRE 632 136 632 104
WIRE 232 152 232 104
WIRE -632 168 -632 104
WIRE -360 168 -360 104
WIRE -8 168 -8 104
WIRE 376 168 376 104
WIRE -344 216 -360 216
WIRE 8 216 -8 216
WIRE 392 216 376 216
WIRE -456 248 -456 120
WIRE -408 248 -456 248
WIRE -104 248 -104 104
WIRE -56 248 -104 248
WIRE 280 248 280 104
WIRE 328 248 280 248
WIRE -344 264 -344 216
WIRE -344 264 -360 264
WIRE 8 264 8 216
WIRE 8 264 -8 264
WIRE 120 264 120 216
WIRE 120 264 8 264
WIRE 232 264 232 216
WIRE 232 264 120 264
WIRE 392 264 392 216
WIRE 392 264 376 264
WIRE 632 264 632 200
WIRE 632 264 392 264
WIRE -632 296 -632 248
WIRE -360 296 -360 264
WIRE -8 296 -8 264
WIRE 376 296 376 264
FLAG -360 -184 0
FLAG -360 296 0
FLAG -456 120 IN
FLAG -360 104 o1
FLAG -632 296 0
FLAG -8 296 0
FLAG 376 296 0
FLAG 8 104 o2
FLAG 520 104 OUT
FLAG -232 -72 VDD
SYMBOL voltage -360 -88 R180
SYMATTR InstName VDD
SYMATTR Value 3.3
SYMBOL nmos4 -408 168 R0
SYMATTR InstName M1
SYMATTR Value iucreate_nmos
SYMATTR Value2 l=0.5u w=1.5u
SYMBOL pmos4 -408 40 M180
SYMATTR InstName M2
SYMATTR Value iucreate_pmos
SYMATTR Value2 l=0.5u w=3.5u
SYMBOL nmos4 -56 168 R0
SYMATTR InstName M3
SYMATTR Value iucreate_nmos
SYMATTR Value2 l=0.5u w=1.5u
SYMBOL pmos4 -56 40 M180
SYMATTR InstName M4
SYMATTR Value iucreate_pmos
SYMATTR Value2 l=0.5u w=3.5u
SYMBOL nmos4 328 168 R0
SYMATTR InstName M5
SYMATTR Value iucreate_nmos
SYMATTR Value2 l=0.5u w=1.5u
SYMBOL pmos4 328 40 M180
SYMATTR InstName M6
SYMATTR Value iucreate_pmos
SYMATTR Value2 l=0.5u w=3.5u
SYMBOL cap 616 136 R0
SYMATTR InstName CL
SYMATTR Value 10f
SYMBOL current 120 136 R0
SYMATTR Value EXP(0 .75m 8n 10p 8.001n 1n)
SYMATTR InstName ISET
SYMBOL diode 248 216 R180
SYMATTR InstName D1
SYMBOL voltage -632 152 R0
SYMATTR Value 3.3
SYMATTR InstName VG1
SYMATTR Value2 AC 1
SYMBOL current 88 -296 R0
SYMATTR InstName I1