* SPICE netlist
M1 supplyL OUT OUTL supplyL EECMOSP l=l_min_pmos w={w_min_pmos*S_LOAD}
M2 OUTL OUT 0 0 EECMOSN l=l_min_nmos w={w_min_nmos*S_LOAD}
M3 supply N001 OUT supply EECMOSP l=l_min_pmos w={w_min_pmos*S2}
M4 OUT N001 0 0 EECMOSN l=l_min_nmos w={w_min_nmos*S2}
M5 supply OUTMIN N001 supply EECMOSP l=l_min_pmos w={w_min_pmos*S1}
M6 N001 OUTMIN 0 0 EECMOSN l=l_min_nmos w={w_min_nmos*S1}
M7 supply IN OUTMIN supply EECMOSP l=l_min_pmos w=w_min_pmos
M8 OUTMIN IN 0 0 EECMOSN l=l_min_nmos w=w_min_nmos
Vsupply supply 0 1
VsupplyL supplyL 0 1
Vin IN 0 PULSE(0 1 5n 10p 10p 5n 10n)

* LTspice schematic (.asc)
Version 4
SHEET 1 2624 384
WIRE 368 -160 368 -192
WIRE 1008 -160 1008 -192
WIRE -1104 -80 -1104 -128
WIRE -480 -80 -480 -128
WIRE 128 -80 128 -128
WIRE 768 -80 768 -128
WIRE 368 -64 368 -80
WIRE 1008 -64 1008 -80
WIRE -1024 -32 -1024 -128
WIRE -1024 -32 -1104 -32
WIRE -400 -32 -400 -128
WIRE -400 -32 -480 -32
WIRE 208 -32 208 -128
WIRE 208 -32 128 -32
WIRE 848 -32 848 -128
WIRE 848 -32 768 -32
WIRE -1152 0 -1200 0
WIRE -528 0 -576 0
WIRE 80 0 32 0
WIRE 720 0 672 0
WIRE -1248 32 -1312 32
WIRE -1200 32 -1200 0
WIRE -1200 32 -1248 32
WIRE -1104 32 -1104 16
WIRE -640 32 -1104 32
WIRE -576 32 -576 0
WIRE -576 32 -640 32
WIRE -480 32 -480 16
WIRE 32 32 32 0
WIRE 32 32 -480 32
WIRE 128 32 128 16
WIRE 624 32 128 32
WIRE 672 32 672 0
WIRE 672 32 624 32
WIRE 768 32 768 16
WIRE 1312 32 768 32
WIRE -1104 48 -1104 32
WIRE -480 48 -480 32
WIRE 128 48 128 32
WIRE 768 48 768 32
WIRE -1312 64 -1312 32
WIRE -1024 96 -1104 96
WIRE -400 96 -480 96
WIRE 208 96 128 96
WIRE 848 96 768 96
WIRE -1200 128 -1200 32
WIRE -1152 128 -1200 128
WIRE -576 128 -576 32
WIRE -528 128 -576 128
WIRE 32 128 32 32
WIRE 80 128 32 128
WIRE 672 128 672 32
WIRE 720 128 672 128
WIRE -1104 176 -1104 144
WIRE -1024 176 -1024 96
WIRE -1024 176 -1104 176
WIRE -480 176 -480 144
WIRE -400 176 -400 96
WIRE -400 176 -480 176
WIRE 128 176 128 144
WIRE 208 176 208 96
WIRE 208 176 128 176
WIRE 768 176 768 144
WIRE 848 176 848 96
WIRE 848 176 768 176
WIRE -1312 192 -1312 144
WIRE -1104 192 -1104 176
WIRE -480 192 -480 176
WIRE 128 192 128 176
WIRE 768 192 768 176
FLAG 368 -64 0
FLAG 1008 -64 0
FLAG 368 -192 supply
FLAG 624 32 OUT
FLAG -1312 192 0
FLAG -1248 32 IN
FLAG -1104 192 0
FLAG 128 192 0
FLAG -480 192 0
FLAG 768 192 0
FLAG -640 32 OUTMIN
FLAG 1008 -192 supplyL
FLAG 1312 32 OUTL
FLAG -1104 -128 supply
FLAG -1024 -128 supply
FLAG -480 -128 supply
FLAG -400 -128 supply
FLAG 128 -128 supply
FLAG 208 -128 supply
FLAG 768 -128 supplyL
FLAG 848 -128 supplyL
SYMBOL pmos4 720 -80 R0
SYMATTR Value2 l=l_min_pmos w={w_min_pmos*S_LOAD}
SYMATTR InstName M1
SYMATTR Value EECMOSP
SYMBOL nmos4 720 48 R0
SYMATTR Value2 l=l_min_nmos w={w_min_nmos*S_LOAD}
SYMATTR InstName M2
SYMATTR Value EECMOSN
SYMBOL pmos4 80 -80 R0
SYMATTR Value2 l=l_min_pmos w={w_min_pmos*S2}
SYMATTR InstName M3
SYMATTR Value EECMOSP
SYMBOL nmos4 80 48 R0
SYMATTR Value2 l=l_min_nmos w={w_min_nmos*S2}
SYMATTR InstName M4
SYMATTR Value EECMOSN
SYMBOL pmos4 -528 -80 R0
SYMATTR Value2 l=l_min_pmos w={w_min_pmos*S1}
SYMATTR InstName M5
SYMATTR Value EECMOSP
SYMBOL nmos4 -528 48 R0
SYMATTR Value2 l=l_min_nmos w={w_min_nmos*S1}
SYMATTR InstName M6
SYMATTR Value EECMOSN
SYMBOL pmos4 -1152 -80 R0
SYMATTR Value2 l=l_min_pmos w=w_min_pmos
SYMATTR InstName M7
SYMATTR Value EECMOSP
SYMBOL nmos4 -1152 48 R0
SYMATTR Value2 l=l_min_nmos w=w_min_nmos
SYMATTR InstName M8
SYMATTR Value EECMOSN
SYMBOL voltage 368 -176 R0
SYMATTR InstName Vsupply
SYMATTR Value 1
SYMBOL voltage 1008 -176 R0
SYMATTR InstName VsupplyL
SYMATTR Value 1
SYMBOL voltage -1312 48 R0
SYMATTR Value PULSE(0 1 5n 10p 10p 5n 10n)
SYMATTR InstName Vin