* SPICE netlist
Mb1 iref1 iref1 vss vss NMOS_05 W=10u L=0.5u
Mb3_sink iref3 iref3 vss vss NMOS_05 W=10u L=0.5u
M11 N001 iref1 vss vss NMOS_05 W=130u L=0.5u
M1 X inp N001 N001 NMOS_05 W=1500u L=0.5u
M2 Y inn N001 N001 NMOS_05 W=1500u L=0.5u
M3 X iref2 vdd vdd PMOS_05 W=150u L=0.5u
M4 Y iref2 vdd vdd PMOS_05 W=150u L=0.5u
M5 out vb2 Y Y PMOS_05 W=200u L=0.5u
M6 N002 vb2 X X PMOS_05 W=200u L=0.5u
M10 N004 iref3 vss vss NMOS_05 W=100u L=0.5u
M8 N003 iref3 vss vss NMOS_05 W=100u L=0.5u
M7 out vb1 N004 N004 NMOS_05 W=97u L=0.5u
M9 N002 vb1 N003 N003 NMOS_05 W=97u L=0.5u
C1 out 0 10pF
R1 out 0 250k tol=0
Mb2_src iref2 iref2 vdd vdd PMOS_05 W=15u L=0.5u
VDD vdd 0 DC 3.0
VSS vss 0 DC -3.0
Vb1 vb1 0 DC -2.05
Vb2 vb2 0 DC 1.7
IREF1 vdd iref1 100u
IREF2 iref2 vss 100u
IREF3 vdd iref3 100u
Vin_p inp 0 DC 0 AC 1 PULSE(-1 1 1u 10n 10n 5u 10u)
Vin_n inn 0 DC 0
.op

* LTspice schematic (.asc)
Version 4.1
SHEET 1 1856 1040
WIRE 112 -520 96 -520
WIRE 128 -520 112 -520
WIRE -48 -488 -80 -488
WIRE 112 -488 112 -520
WIRE 112 -488 -48 -488
WIRE 288 -488 112 -488
WIRE 656 -488 288 -488
WIRE -48 -440 -48 -488
WIRE -48 -440 -64 -440
WIRE 288 -440 288 -488
WIRE 288 -440 272 -440
WIRE 656 -440 656 -488
WIRE 672 -440 656 -440
WIRE 608 -424 592 -424
WIRE 0 -408 0 -424
WIRE 336 -408 336 -424
WIRE 336 -408 0 -408
WIRE 592 -408 592 -424
WIRE 592 -408 336 -408
WIRE -64 -392 -64 -440
WIRE -48 -392 -64 -392
WIRE 272 -392 272 -440
WIRE 288 -392 272 -392
WIRE 672 -392 672 -440
WIRE 672 -392 656 -392
WIRE -48 -312 -48 -344
WIRE -48 -312 -624 -312
WIRE 592 -312 592 -408
WIRE 656 -312 656 -344
WIRE 656 -312 592 -312
WIRE 288 -296 288 -344
WIRE 288 -296 -304 -296
WIRE 928 -280 112 -280
WIRE -48 -264 -48 -312
WIRE -48 -264 -64 -264
WIRE 288 -264 288 -296
WIRE 304 -264 288 -264
WIRE 0 -232 0 -248
WIRE 112 -232 112 -280
WIRE 112 -232 0 -232
WIRE 240 -232 240 -248
WIRE 240 -232 112 -232
WIRE -64 -216 -64 -264
WIRE -48 -216 -64 -216
WIRE -32 -216 -48 -216
WIRE 304 -216 304 -264
WIRE 304 -216 288 -216
WIRE 128 -104 96 -104
WIRE 208 -104 128 -104
WIRE 288 -104 288 -168
WIRE 288 -104 208 -104
WIRE 656 -104 656 -312
WIRE 128 -88 128 -104
WIRE 208 -88 208 -104
WIRE 128 24 128 -8
WIRE 176 24 128 24
WIRE 208 24 208 -24
WIRE 208 24 176 24
WIRE 176 40 176 24
WIRE -624 88 -624 -312
WIRE -304 88 -304 -296
WIRE -672 136 -736 136
WIRE -608 136 -624 136
WIRE -304 136 -320 136
WIRE -48 152 -48 -168
WIRE 288 152 288 -104
WIRE -672 168 -672 136
WIRE -608 184 -608 136
WIRE -608 184 -624 184
WIRE -464 184 -608 184
WIRE -320 184 -320 136
WIRE -320 184 -464 184
WIRE -304 184 -320 184
WIRE -48 200 -64 200
WIRE 304 200 288 200
WIRE 112 216 0 216
WIRE 240 216 112 216
WIRE 0 232 0 216
WIRE 240 232 240 216
WIRE -64 248 -64 200
WIRE -48 248 -64 248
WIRE 304 248 304 200
WIRE 304 248 288 248
WIRE -912 264 -912 216
WIRE -864 264 -912 264
WIRE -256 264 -256 168
WIRE -256 264 -736 264
WIRE 112 264 112 216
WIRE 928 264 112 264
WIRE 656 280 656 88
WIRE 656 280 608 280
WIRE -912 296 -912 264
WIRE -464 296 -464 184
WIRE -48 296 -48 248
WIRE 288 296 288 248
WIRE 656 296 656 280
WIRE -912 344 -928 344
WIRE -864 344 -864 264
WIRE -512 344 -864 344
WIRE -448 344 -464 344
WIRE -48 344 -64 344
WIRE 288 344 272 344
WIRE 672 344 656 344
WIRE 336 360 0 360
WIRE 608 360 608 280
WIRE 608 360 336 360
WIRE -864 376 -864 344
WIRE -512 376 -512 344
WIRE 0 376 0 360
WIRE 336 376 336 360
WIRE 608 376 608 360
WIRE -928 392 -928 344
WIRE -912 392 -928 392
WIRE -448 392 -448 344
WIRE -448 392 -464 392
WIRE -64 392 -64 344
WIRE -48 392 -64 392
WIRE 272 392 272 344
WIRE 288 392 272 392
WIRE 672 392 672 344
WIRE 672 392 656 392
WIRE -912 472 -912 392
WIRE -464 472 -464 392
WIRE -464 472 -912 472
WIRE -48 472 -48 392
WIRE -48 472 -464 472
WIRE 80 472 -48 472
WIRE 288 472 288 392
WIRE 288 472 80 472
WIRE 656 472 656 392
WIRE 656 472 288 472
WIRE 80 520 80 472
WIRE 80 520 64 520
WIRE 96 520 80 520
FLAG -912 216 iref1
FLAG 80 520 vss
FLAG 112 -520 vdd
FLAG 656 88 iref3
FLAG -736 136 inp
FLAG -736 264 inn
FLAG -48 -312 X
FLAG 288 -296 Y
FLAG 176 40 0
FLAG 96 -104 out
FLAG 656 -104 iref2
FLAG 928 264 vb1
FLAG 928 -280 vb2
SYMBOL nmos4 -864 296 M0
SYMATTR InstName Mb1
SYMATTR Value NMOS_05
SYMATTR Value2 W=10u L=0.5u
SYMBOL nmos4 608 296 R0
SYMATTR InstName Mb3_sink
SYMATTR Value NMOS_05
SYMATTR Value2 W=10u L=0.5u
SYMBOL nmos4 -512 296 R0
SYMATTR InstName M11
SYMATTR Value NMOS_05
SYMATTR Value2 W=130u L=0.5u
SYMBOL nmos4 -672 88 R0
SYMATTR InstName M1
SYMATTR Value NMOS_05
SYMATTR Value2 W=1500u L=0.5u
SYMBOL nmos4 -256 88 M0
SYMATTR InstName M2
SYMATTR Value NMOS_05
SYMATTR Value2 W=1500u L=0.5u
SYMBOL pmos4 0 -344 R180
SYMATTR InstName M3
SYMATTR Value PMOS_05
SYMATTR Value2 W=150u L=0.5u
SYMBOL pmos4 336 -344 R180
SYMATTR InstName M4
SYMATTR Value PMOS_05
SYMATTR Value2 W=150u L=0.5u
SYMBOL pmos4 240 -168 M180
SYMATTR InstName M5
SYMATTR Value PMOS_05
SYMATTR Value2 W=200u L=0.5u
SYMBOL pmos4 0 -168 R180
SYMATTR InstName M6
SYMATTR Value PMOS_05
SYMATTR Value2 W=200u L=0.5u
SYMBOL nmos4 336 296 M0
SYMATTR InstName M10
SYMATTR Value NMOS_05
SYMATTR Value2 W=100u L=0.5u
SYMBOL nmos4 0 296 M0
SYMATTR InstName M8
SYMATTR Value NMOS_05
SYMATTR Value2 W=100u L=0.5u
SYMBOL nmos4 240 152 R0
SYMATTR InstName M7
SYMATTR Value NMOS_05
SYMATTR Value2 W=97u L=0.5u
SYMBOL nmos4 0 152 M0
SYMATTR InstName M9
SYMATTR Value NMOS_05
SYMATTR Value2 W=97u L=0.5u
SYMBOL cap 192 -88 R0
SYMATTR InstName C1
SYMATTR Value 10pF
SYMBOL res 112 -104 R0
SYMATTR InstName R1
SYMATTR Value 250k
SYMATTR SpiceLine tol=0
SYMBOL pmos4 608 -344 M180
SYMATTR InstName Mb2_src
SYMATTR Value PMOS_05
SYMATTR Value2 W=15u L=0.5u