* SPICE netlist
MSU2 VDD N002 N002 VDD P_50n L=1u W=500n
MSU1 N002 Vbiasn 0 0 N_50n l=50n w=500n
MSU3 VDD N002 Vbiasn 0 N_50n L=50n W=500n
M3 VDD Vbiasp Vbiasn VDD P_50n l=50n w=1u
M4 VDD Vbiasp N003 VDD P_50n l=50n w=1u
M1 Vbiasn Vbiasn 0 0 N_50n l=50n w=500n
R1 N004 0 4k
MA4 VDD N001 Vbiasp VDD P_50n l=100n w=1u
MA3 VDD N001 N001 VDD P_50n l=100n w=1u
M5 N001 N003 0 0 N_50n l=100n w=500n
M7 VDD Vbiasp VDD VDD P_50n l=5u w=5u
M2 Vbiasp Vbiasn 0 0 N_50n l=100n w=500n
M6 N003 N003 N004 0 N_50n l=50n w=2u
VDD VDD 0 5
.DC VDD 0 1.2 1m

* LTspice schematic (.asc)
Version 4
SHEET 1 1312 608
WIRE -656 -160 -656 -256
WIRE -656 -48 -656 -64
WIRE -656 96 -656 -48
WIRE -656 192 -656 176
WIRE -656 288 -656 192
WIRE -592 -80 -608 -80
WIRE -592 -48 -656 -48
WIRE -592 -48 -592 -80
WIRE -560 -48 -592 -48
WIRE -512 -128 -512 -160
WIRE -512 -32 -512 -48
WIRE -512 176 -608 176
WIRE -512 176 -512 -32
WIRE -384 -288 -384 -304
WIRE -384 -176 -384 -208
WIRE -352 176 -512 176
WIRE -352 176 -352 -32
WIRE -192 -32 -352 -32
WIRE -192 -32 -192 -64
WIRE -192 64 -192 -32
WIRE -192 80 -192 64
WIRE -192 96 -192 80
WIRE -192 176 -192 160
WIRE -192 208 -192 176
WIRE -128 80 -192 80
WIRE -128 160 -144 160
WIRE -128 160 -128 80
WIRE 16 -96 16 -112
WIRE 16 80 16 -96
WIRE 16 96 16 80
WIRE 16 176 16 160
WIRE 16 208 16 176
WIRE 64 -96 16 -96
WIRE 64 -96 64 -128
WIRE 80 160 64 160
WIRE 80 160 80 32
WIRE 128 64 -192 64
WIRE 128 160 128 64
WIRE 144 -128 64 -128
WIRE 144 160 128 160
WIRE 192 -112 192 -128
WIRE 192 -80 -144 -80
WIRE 192 -80 192 -112
WIRE 192 80 192 -80
WIRE 192 96 192 80
WIRE 192 176 192 160
WIRE 192 208 192 176
WIRE 304 -80 192 -80
WIRE 304 -48 304 -80
WIRE 320 160 320 80
WIRE 336 -80 304 -80
WIRE 336 160 320 160
WIRE 384 -64 384 -80
WIRE 384 32 80 32
WIRE 384 32 384 -64
WIRE 384 80 320 80
WIRE 384 80 384 32
WIRE 384 176 384 160
WIRE 384 192 384 176
WIRE 384 304 384 272
WIRE 624 -48 304 -48
WIRE 624 -48 624 -112
WIRE 640 -160 624 -160
WIRE 656 -48 624 -48
WIRE 656 64 128 64
FLAG -656 -112 VDD
FLAG -512 -160 VDD
FLAG -192 -112 VDD
FLAG -192 -160 VDD
FLAG 384 -112 VDD
FLAG 384 -160 VDD
FLAG 384 304 0
FLAG 384 128 0
FLAG 192 -160 VDD
FLAG 192 -208 VDD
FLAG 16 -160 VDD
FLAG 16 -208 VDD
FLAG 192 128 0
FLAG 592 -160 VDD
FLAG 544 -160 VDD
FLAG 640 -160 VDD
FLAG -656 -256 VDD
IOPIN 544 -272 In
FLAG -656 288 GND
IOPIN 544 272 In
FLAG -512 -80 0
FLAG -656 144 0
FLAG -192 208 0
FLAG -192 128 0
FLAG 16 128 0
FLAG 16 208 0
FLAG 192 208 0
FLAG 656 -48 Vbiasp
IOPIN 1856 -64 Out
FLAG 656 64 Vbiasn
IOPIN 1856 48 Out
FLAG -384 -176 0
FLAG -384 -304 VDD
SYMBOL pmos4 -608 -160 M0
SYMATTR InstName MSU2
SYMATTR Value2 L=1u W=500n
SYMATTR Value P_50n
SYMBOL nmos4 -608 96 M0
SYMATTR Value2 l=50n w=500n
SYMATTR InstName MSU1
SYMATTR Value N_50n
SYMBOL nmos4 -560 -128 R0
SYMATTR Value2 L=50n W=500n
SYMATTR InstName MSU3
SYMATTR Value N_50n
SYMBOL pmos4 -144 -160 M0
SYMATTR InstName M3
SYMATTR Value2 l=50n w=1u
SYMATTR Value P_50n
SYMBOL pmos4 336 -160 R0
SYMATTR InstName M4
SYMATTR Value2 l=50n w=1u
SYMATTR Value P_50n
SYMBOL nmos4 -144 80 M0
SYMATTR Value2 l=50n w=500n
SYMATTR InstName M1
SYMATTR Value N_50n
SYMBOL res 368 176 R0
SYMATTR InstName R1
SYMATTR Value 4k
SYMBOL pmos4 144 -208 R0
SYMATTR InstName MA4
SYMATTR Value2 l=100n w=1u
SYMATTR Value P_50n
SYMBOL pmos4 64 -208 M0
SYMATTR InstName MA3
SYMATTR Value2 l=100n w=1u
SYMATTR Value P_50n
SYMBOL nmos4 64 80 M0
SYMATTR Value2 l=100n w=500n
SYMATTR InstName M5
SYMATTR Value N_50n
SYMBOL pmos4 544 -112 R270
SYMATTR InstName M7
SYMATTR Value2 l=5u w=5u
SYMATTR Value P_50n
SYMBOL nmos4 144 80 R0
SYMATTR Value2 l=100n w=500n
SYMATTR InstName M2
SYMATTR Value N_50n
SYMBOL nmos4 336 80 R0
SYMATTR Value2 l=50n w=2u
SYMATTR InstName M6
SYMATTR Value N_50n
SYMBOL voltage -384 -304 R0
SYMATTR InstName VDD
SYMATTR Value 5