* SPICE netlist
R1 N001 N002 5.7m
R2 N001 N007 49.9K
R3 N008 N007 1.74K
R4 N008 0 2.67K
R5 OUT N006 43.5K
R6 0 N006 3.57K
R7 OUT N009 24K
C2 N012 0 .1
C3 N013 0 68n
C4 OUT 0 220
R8 0 OUT {Rload}
R9 N003 N005 10
V4 N011 0 PWL(0 3.1 1 3.1 1.0001 0 1.2 0 1.20001 0)
R11 N004 N005 100K
C1 N004 0 10n
C5 N007 0 0.1
XU1 N002 N001 MP_01 N007 N008 0 N010 MP_02 MP_03 MP_04 MP_05 N013 MP_06 N011 MP_07 MP_08 MP_09 N006 N012 N009 MP_10 MP_11 OUT N005 LTC4260 uvautoretry=1 ovautoretry=1 ocautoretry=1 ;pnba Sense)Vdd))UV)OV)GND)ON)))))Timer))_BD_PRST))))FB)INTVcc)GPIO)))Source)Gate
V9 N010 0 PWL(0 0 1u 3.1 1 3.1 1.0001 3.1)
V1 N001 0 PWL(0 0 10u 0 100u 60 1.8 60 +0.1m 60)
M1 P001 P002 P003 P003 PSMN4R8100BSE
XU3 N002 N003 OUT P001 P002 P003 Tj-FET Tc-FET PSMN4R8100BSE Tambient=85 ;pnba D)G)S)D2)G2)S2)Tj)Tc
.tran 0 2.5 0
.param Rload=10
.step param Rload list 1 10 50 100

* LTspice schematic (.asc)
Version 4
SHEET 1 1408 768
WIRE -96 -352 -96 -384
WIRE -64 -352 -64 -384
WIRE -592 -288 -688 -288
WIRE -304 -288 -592 -288
WIRE -288 -288 -304 -288
WIRE -192 -288 -208 -288
WIRE -112 -288 -192 -288
WIRE 144 -288 64 -288
WIRE 384 -288 144 -288
WIRE 496 -288 384 -288
WIRE 592 -288 496 -288
WIRE 704 -288 592 -288
WIRE -688 -272 -688 -288
WIRE 592 -272 592 -288
WIRE 704 -272 704 -288
WIRE 32 -208 32 -224
WIRE -688 -176 -688 -192
WIRE 592 -176 592 -208
WIRE 704 -176 704 -192
WIRE -592 -144 -592 -288
WIRE 384 -144 384 -288
WIRE -80 -112 -112 -112
WIRE 32 -112 32 -128
WIRE 32 -112 0 -112
WIRE -112 -96 -112 -112
WIRE 496 -96 496 -288
WIRE 384 -48 384 -64
WIRE 384 -48 304 -48
WIRE 384 -32 384 -48
WIRE -592 -16 -592 -64
WIRE -592 -16 -688 -16
WIRE -480 -16 -592 -16
WIRE -112 -16 -112 -32
WIRE -592 16 -592 -16
WIRE -304 16 -304 -288
WIRE -192 16 -192 -288
WIRE 32 16 32 -112
WIRE 144 16 144 -288
WIRE -688 32 -688 -16
WIRE -480 64 -480 -16
WIRE -400 64 -480 64
WIRE 304 64 304 -48
WIRE 304 64 256 64
WIRE 384 64 384 48
WIRE -688 112 -688 96
WIRE -592 128 -592 96
WIRE -400 128 -592 128
WIRE 496 128 496 -16
WIRE 496 128 256 128
WIRE -592 160 -592 128
WIRE -400 192 -480 192
WIRE 336 192 256 192
WIRE -592 256 -592 240
WIRE 336 272 336 192
WIRE -480 288 -480 192
WIRE -64 304 -64 288
WIRE 96 304 96 288
WIRE -224 320 -224 288
WIRE 336 368 336 352
WIRE -480 384 -480 368
WIRE -64 384 -64 368
WIRE 96 384 96 368
FLAG -592 256 0
FLAG -224 320 0
FLAG 384 64 0
FLAG -64 384 0
FLAG 96 384 0
FLAG -480 384 0
FLAG -688 -176 0
FLAG 592 -176 0
FLAG 704 -176 0
FLAG 336 368 0
FLAG -112 -16 0
FLAG -688 112 0
FLAG 592 -288 OUT
FLAG -64 -384 Tj-FET
FLAG -96 -384 Tc-FET
SYMBOL res -304 -272 R270
SYMATTR InstName R1
SYMATTR Value 5.7m
SYMBOL res -608 -160 R0
SYMATTR InstName R2
SYMATTR Value 49.9K
SYMBOL res -608 112 M180
SYMATTR InstName R3
SYMATTR Value 1.74K
SYMBOL res -608 144 R0
SYMATTR InstName R4
SYMATTR Value 2.67K
SYMBOL res 368 -160 R0
SYMATTR InstName R5
SYMATTR Value 43.5K
SYMBOL res 368 64 M180
SYMATTR InstName R6
SYMATTR Value 3.57K
SYMBOL res 480 -112 R0
SYMATTR InstName R7
SYMATTR Value 24K
SYMBOL cap -80 304 R0
SYMATTR InstName C2
SYMATTR Value .1
SYMBOL cap 80 304 R0
SYMATTR InstName C3
SYMATTR Value 68n
SYMBOL cap 576 -272 R0
SYMATTR InstName C4
SYMATTR Value 220
SYMBOL res 688 -176 M180
SYMATTR InstName R8
SYMATTR Value {Rload}
SYMBOL res 16 -224 R0
SYMATTR InstName R9
SYMATTR Value 10
SYMBOL voltage 336 256 R0
SYMATTR InstName V4
SYMATTR Value PWL(0 3.1 1 3.1 1.0001 0 1.2 0 1.20001 0)
SYMBOL res -96 -96 R270
SYMATTR InstName R11
SYMATTR Value 100K
SYMBOL cap -128 -96 R0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL cap -704 32 R0
SYMATTR InstName C5
SYMATTR Value 0.1
SYMBOL PowerProducts\\LTC4260 -80 144 R0
SYMATTR InstName U1
SYMATTR SpiceLine uvautoretry=1 ovautoretry=1 ocautoretry=1
SYMBOL voltage -480 272 R0
SYMATTR InstName V9
SYMATTR Value PWL(0 0 1u 3.1 1 3.1 1.0001 3.1)
SYMBOL voltage -688 -288 M0
SYMATTR Value PWL(0 0 10u 0 100u 60 1.8 60 +0.1m 60)
SYMATTR InstName V1
SYMBOL nmos -48 -240 R270
SYMATTR InstName M1
SYMATTR Value PSMN4R8100BSE
SYMBOL SOAtherm-NMOS 0 -288 R270
SYMATTR InstName U3
SYMATTR InstName PSMN4R8100BSE