* SPICE netlist
L1 N002 N001 {L}
C1 N002 0 {C}
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C2 N003 0 {C}
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C3 N004 0 {C}
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C7 N008 0 {C}
L8 N009 N008 {L}
C8 N009 0 {C}
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C9 N010 0 {C}
L10 v_10 N010 {L}
C10 v_10 0 {C}
L11 N011 v_10 {L}
C11 N011 0 {C}
L12 N012 N011 {L}
C12 N012 0 {C}
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C13 N013 0 {C}
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C15 N015 0 {C}
L16 N016 N015 {L}
C16 N016 0 {C}
L17 N017 N016 {L}
C17 N017 0 {C}
L18 N018 N017 {L}
C18 N018 0 {C}
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C19 N019 0 {C}
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C20 v_20 0 {C}
L21 N020 v_20 {L}
C21 N020 0 {C}
L22 N021 N020 {L}
C22 N021 0 {C}
L23 N022 N021 {L}
C23 N022 0 {C}
L24 N023 N022 {L}
C24 N023 0 {C}
L25 N024 N023 {L}
C25 N024 0 {C}
L26 N025 N024 {L}
C26 N025 0 {C}
L27 N026 N025 {L}
C27 N026 0 {C}
L28 N027 N026 {L}
C28 N027 0 {C}
L29 N028 N027 {L}
C29 N028 0 {C}
L30 v_30 N028 {L}
C30 v_30 0 {C}
L31 N029 v_30 {L}
C31 N029 0 {C}
L32 N030 N029 {L}
C32 N030 0 {C}
L33 N031 N030 {L}
C33 N031 0 {C}
L34 N032 N031 {L}
C34 N032 0 {C}
L35 N033 N032 {L}
C35 N033 0 {C}
L36 N034 N033 {L}
C36 N034 0 {C}
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C37 N035 0 {C}
L38 N036 N035 {L}
C38 N036 0 {C}
L39 N037 N036 {L}
C39 N037 0 {C}
L40 v_40 N037 {L}
R1 N001 v_s 50
C40 v_40 0 {C}
R2 0 v_40 50
V1 v_s 0 PULSE(0 1 0 .001 .001 .2 2)
.PARAM C = .0001F
.PARAM L = .25H
.tran 0 2s 0 .001

* LTspice schematic (.asc)
Version 4
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