Package: xeda
Xeda/ˈziːdə/is a cross-platform, cross-EDA, cross-target simulation and synthesis automation platform.
It assists hardware developers in verification, evaluation, and deployment of RTL designs. Xeda supports flows from multiple commercial and open-source electronic design automation suites.Xeda is the one tool to rule 'em all!For further details, visit theXeda's documentations(Work In Progress).InstallationPython 3.8 or newer is required. To install the latest published version frompypirun:python3 -m pip install -U xedaDevelopmentgit clone --recursive https://github.com/XedaHQ/xeda.git
cd xeda
python3 -m pip install -U --editable . --config-settings editable_mode=strictUsageRunxeda --helpto see a list of available commands and options.Design DescriptionXeda design-specific descriptions and settings are organized through project files specified inTOML. Every project contains one or more HDL designs. The default name for the project file isxedaproject.toml.Sample Xeda design descriptionfile:name="sqrt"description="Iterative computation of square-root of an integer"language.vhdl.standard="2008"[rtl]sources=["sqrt.vhdl"]top="sqrt"clock_port="clk"parameters={G_IN_WIDTH=32}# parameters = { G_IN_WIDTH = 32, G_ITERATIVE = true, G_STR= "abcd", G_BITVECTOR="7'b0101001" }[tb]sources=["tb_sqrt.py"]cocotb=true# top = "tb_sqrt"  # FIXME[flows.vivado_synth]fpga.part='xc7a12tcsg325-1'clock_period=5.0FlowsAToolis an abstraction for an executable which is responsible for one or several steps in an EDA flow. AToolcan be executed as a native binary already installed on the system, in a virtualized container (e.g.docker), or on a remote system.
AFlowis a collection of steps performed by one or several tools. A XedaFlowimplements the following methods:init(optional): initializations which need to happen after  the instantiation of aFlowinstance. At this stage, the flow can specify and customize dependency flows, which will be run before execution of the flow. Seperation of this stage form Python__init__enables greater flexibility and more effective control over the execution of flows.run: main execution of the flow which includes generation of files, scripts, and tool arguments as well as execution of one or several tools. All dependencies have been already executed beforerunbegins, and the completed dependencies (and their results and artifacts) will be available.parse_results(optional): evaluate and interpret generated reports or other artifacts.Supported Tools and FlowsAMD-XilinxVivadoDesign Suitevivado_synth: FPGA synthesis and implementation.vivado_sim: functional simulation of RTL designvivado_postsynthsim: Post-implementation functional and timing simulation and power analysisvivado_power: Post-implementation power estimation based on post-implementation timing simulation with real-world target testvectorsAMD-XilinxISEDesign SuiteGHDLVHDL simulatorghdl_simIntelQuartus Prime(Lite/Pro Editions):quartus: FPGA synthesis and implementation flowLattice Diamonddiamond_synth: FPGA synthesis and implementation flowMentor (Siemens)ModelSimmodelsimRTL and netlist simulationnextpnrportable FPGA place and route toolopenFPGAloader: Open-source and multi-platform universal utility for programming FPGAs. Compatible with many boards, cables and FPGA from major manufacturers.OpenROAD: integrated chip physical design flow that takes a design from RTL sources to routed layout.Synopsys Design CompilerSynopsys VCS simulatorVerilator: the fastest (open-source) Verilog/SystemVerilog simulator.Bluespec: Compiler, simulator, and tools for the Bluespec Hardware Description Language.YosysOpen SYnthesis Suite (FPGA and ASICs synthesis)Runxeda list-flowsfor the full list of supported flows in the installed version.