Package: cocotb-test
cocotb-testcocotb-testprovides standard python unit testing capabilities forcocotballow the look and feel of Python unit testingremove the need for Makefiles (includes Makefile compatibility mode)allow easy customization of simulation flowallow to usepytest-xdistorpytest-parallelfor parallel runsUsage:Installcocotb.Install simulator (for Icarus Verilog with conda, on widows use 10.3 or develsteveicarus/iverilog#395):condainstall-cconda-forgeiverilog==10.3Install the package viapip:pipinstallcocotb-testor development versionpipinstall-vhttps://github.com/themperek/cocotb-test/archive/master.ziporgitclonehttps://github.com/themperek/cocotb-test.git
pipinstall-v-ecocotb-testCreate atest_dff.pyfile (checktest folderfor more examples):fromcocotb_test.simulatorimportrundeftest_dff():run(verilog_sources=["dff.sv"],# sourcestoplevel="dff",# top level HDLmodule="dff_cocotb"# name of cocotb test module)Runpytest(needdff.svanddff_cocotb.pyin same directory where runningpytest):SIM=icaruspytest-olog_cli=Truetest_dff.pyTo clean (remove allsim_buildfolders):cocotb-clean-rArguments forsimulator.run:toplevel: Top level module name to indicate the instance in the hierarchy to use as the DUT. Multiple top levels can be specified as a list, if the simulator supports it.module: The name of the module(s) to search for test functions (seeMODULE).python_search: List of additional directoreis to search for python/cocotb modules.verilog_sources: Verilog source files to include. Can be specified as alistor as adictoflists with the library name as key, if the simulator supports named libraries.vhdl_sources: VHDL source files to include. Can be specified as alistor as adictoflists with the library name as key, if the simulator supports named libraries.toplevel_lang: seeTOPLEVEL_LANG. (default:verilog)includes: A list of directories to search for includes.defines: A list of the defines.parameters: A dictionary of top-level parameters/generics.compile_args: Any arguments or flags to pass to the compile stage of the simulation.vhdl_compile_args: Additional arguments or flags passed only when compiling VHDL sources.verilog_compile_args: Additional arguments or flags passed only when compiling Verilog sources.sim_args: Any arguments or flags to pass to the execution of the compiled simulation.extra_args: Passed to both the compile and execute phases of simulators.plus_args: plusargs arguments passed to simulator.force_compile: Force compilation even if sources did not change. (default:False)compile_only: Only compile sources. Do not run simulation. (default:False)testcase: The name of the test function(s) to run (seeTESTCASE).sim_build: The directory used to compile the tests. (default:sim_build)work_dir: The directory used to tun the tests. (default: same assim_buildargument)seed: Seed the Python random module to recreate a previous test stimulus (seeRANDOM_SEED).extra_env: A dictionary of extra environment variables set in simulator process.waves: Enable wave dumps (not all simulators supported).timescale: Set simulator time unit/precision (default:None)gui: Starts in gui mode (not all simulators supported).make_args: Arguments passed to make phase (Verilatoronly).Environmental variables:SIM: Selects which simulator to use. (default:icarus)WAVES: Overwrite enable wave dumps argument. Example useWAVES=1 pytest test_dff.py.pytest argumentscocotbxml: Combines and saves junitxml reports from cocotb tests.  Example usepytest --cocotbxml=test-cocotb.xml.Tips and tricks:List all available test:pytest--collect-onlyRun only selected test:pytest-ktest_dff_verilog_param[3]Test parameterization (for more see:test_parameters.py)@pytest.mark.parametrize("width",[{"WIDTH_IN":"8"},{"WIDTH_IN":"16"}])deftest_dff_verilog_testcase(width):run(...parameters=width,sim_build="sim_build/"+"_".join(("{}={}".format(*i)foriinwidth.items())),)Run test in parallel (after installingpytest-xdist)pytest-nNUMCPUSRunning (some) tests and examples from cocotbFor cocotb tests/examples install cocotb in editable modegitclonehttps://github.com/potentialventures/cocotb.git
pipinstall-ecocotbSIM=icaruspytest-olog_cli=True--junitxml=test-results.xml--cocotbxml=test-cocotb.xmltestsRelated resourcespytest logging- pytest logging documentationpytest-xdist- test run parallelization (seetest_parallel)pytest-parallel- parallel and concurrent testing  (seetest_parallel)pytest-html- generates a HTML report for the test resultspytest-sugar- sugar