Repository: DynamoRIO/dynamorio (2026-05-20T22:51:41Z)

Issue:
x86 decoder: Add support for Intel FRED instructions (ERETS, ERETU, LKGS)
## Description

Intel's [**FRED (Flexible Return and Event Delivery)** specification](https://cdrdv2.intel.com/v1/dl/getContent/819481?fileName=346446-009-flexible-return-and-event-delivery.pdf) introduces new x86 system instructions designed to improve event delivery transitions. Currently these instructions are not supported by DynamoRIO's x86 decoder and either decode as `INVALID` or are decoded incorrectly as older instructions with ignored prefixes.

Specifically, the FRED specification defines three new instructions:

1. `ERETS` (Event Return to Supervisor) with opcode `F2 0F 01 CA`
2. `ERETU` (Event Return to User) with opcode `F3 0F 01 CA`
3. `LKGS` (Load into `IA32_KERNEL_GS_BASE`) with opcode `F2 0F 00 /6`

## Current Behavior

1. `ERETS` and `ERETU` are decoded incorrectly as `clac`
https://github.com/DynamoRIO/dynamorio/blob/d16eb5746a5fa087e529d870410e37f985d34a41/core/ir/x86/decode_table.c#L7200
Because this entry has the `no` prefix flag, both `ERETS` and `ERETU` decodes incorrectly as `clac`, ignoring the `F2`/`F3` prefix.

2. `LKGS` is decoded as `INVALID`
https://github.com/DynamoRIO/dynamorio/blob/d16eb5746a5fa087e529d870410e37f985d34a41/core/ir/x86/decode_table.c#L2995


Discussion:
Most likely OP_clac needs to be replaced with a PREFIX_EXT entry that jumps to a new entry in prefix_extensions that can discriminate between CLAC/ERETS/ERETU. See e.g. how SERIALIZE/XSUSLDTRK work from the first entry in "rm extension 5" for an example.



Patch:
diff --git a/core/ir/x86/decode_table.c b/core/ir/x86/decode_table.c
index 9b249d87db..e8015778b0 100644
--- a/core/ir/x86/decode_table.c
+++ b/core/ir/x86/decode_table.c
@@ -1625,7 +1625,7 @@ const instr_info_t * const op_instr[] =
     /* OP_vpopcntq, */ &evex_Wb_extensions[274][2],
 
     /* Supervisor Mode Access Prevention (SMAP) */
-    /* OP_clac */ &rm_extensions[1][2],
+    /* OP_clac */ &prefix_extensions[196][0],
     /* OP_stac */ &rm_extensions[1][3],
 
     /* Supervisor versions of save/restore processor extended
@@ -1698,6 +1698,11 @@ const instr_info_t * const op_instr[] =
     /* OP_vpshrdvw */ &evex_Wb_extensions[289][2],
     /* OP_vpshrdvd */ &evex_Wb_extensions[290][0],
     /* OP_vpshrdvq */ &evex_Wb_extensions[290][2],
+
+    /* Intel FRED instructions */
+    /* OP_erets */ &prefix_extensions[196][3],
+    /* OP_eretu */ &prefix_extensions[196][1],
+    /* OP_lkgs */ &base_extensions[13][6],
 };
 
 
@@ -2989,10 +2994,10 @@ const instr_info_t base_extensions[][8] = {
     {OP_sldt, 0x0f0030, catStore, "sldt", Ew, xx, xx, xx, xx, mrm, x, END_LIST},
     {OP_str,  0x0f0031, catUncategorized, "str", Ew, xx, xx, xx, xx, mrm, x, END_LIST},
     {OP_lldt, 0x0f0032, catUncategorized, "lldt", xx, xx, Ew, xx, xx, mrm, x, END_LIST},
-    {OP_ltr,  0x0f0033, catLoad, "ltr", xx, xx, Ew, xx, xx, mrm, x, END_LIST},
+    {OP_ltr,  0x0f0033, catState, "ltr", xx, xx, Ew, xx, xx, mrm, x, END_LIST},
     {OP_verr, 0x0f0034, catUncategorized, "verr", xx, xx, Ew, xx, xx, mrm, fWZ, END_LIST},
     {OP_verw, 0x0f0035, catUncategorized, "verw", xx, xx, Ew, xx, xx, mrm, fWZ, END_LIST},
-    {INVALID, 0x0f0036, catUncategorized, "(bad)",xx, xx, xx, xx, xx, no, x, NA},
+    {OP_lkgs, 0xf20f0036, catState, "lkgs",xx, xx, Ew, xx, xx, mrm|o64|reqp, x, END_LIST},
     {INVALID, 0x0f0037, catUncategorized, "(bad)",xx, xx, xx, xx, xx, no, x, NA},
  },
   /* group 7 (first bytes 0f 01) */
@@ -6014,6 +6019,19 @@ const instr_info_t prefix_extensions[][12] = {
     {INVALID,       0xf30fae36, catUncategorized, "(bad)"  , xx, xx, xx, xx, xx, no, x, NA},
     {INVALID,       0x660fae36, catUncategorized, "(bad)",   xx, xx, xx, xx, xx, no, x, NA},
     {INVALID,       0xf20fae36, catUncategorized, "(bad)",   xx, xx, xx, xx, xx, no, x, NA},
+  },{ /* prefix extension 196 */
+    {OP_clac,         0x01ca08, catState, "clac", xx, xx, xx, xx, xx, no, fWAC, END_LIST},
+    {OP_eretu,      0xf301ca08, catBranch, "eretu", xx, xx, xx, xx, xx, o64, x, END_LIST},
+    {INVALID,       0x6601ca08, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
+    {OP_erets,      0xf201ca08, catBranch, "erets", xx, xx, xx, xx, xx, o64, x, END_LIST},
+    {INVALID,         0x01ca08, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
+    {INVALID,       0xf301ca08, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
+    {INVALID,       0x6601ca08, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
+    {INVALID,       0xf201ca08, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
+    {INVALID,         0x01ca08, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
+    {INVALID,       0xf301ca08, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
+    {INVALID,       0x6601ca08, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
+    {INVALID,       0xf201ca08, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
   }
 };
 /****************************************************************************
@@ -7197,8 +7215,8 @@ const instr_info_t rm_extensions[][8] = {
     /* XXX i#4013: Treat address in xax as IR memref? */
     {OP_monitor, 0xc80f0171, catUncategorized, "monitor",  xx, xx, axAX, ecx, edx, mrm, x, END_LIST},
     {OP_mwait,   0xc90f0171, catUncategorized, "mwait",  xx, xx, eax, ecx, xx, mrm, x, END_LIST},
-    {OP_clac,   0xca0f0171, catUncategorized, "clac", xx, xx, xx, xx, xx, no, fWAC, NA},
-    {OP_stac,   0xcb0f0171, catUncategorized, "stac", xx, xx, xx, xx, xx, no, fWAC, NA},
+    {PREFIX_EXT, 0xca0f0171, catUncategorized, "(prefix ext 196)", xx, xx, xx, xx, xx, no, x, 196},
+    {OP_stac,   0xcb0f0171, catState, "stac", xx, xx, xx, xx, xx, no, fWAC, NA},
     {INVALID,   0x0f0131, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
     {INVALID,   0x0f0131, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
     {INVALID,   0x0f0131, catUncategorized, "(bad)", xx, xx, xx, xx, xx, no, x, NA},
diff --git a/core/ir/x86/instr_create_api.h b/core/ir/x86/instr_create_api.h
index 1d4d29391c..aa87b48baf 100644
--- a/core/ir/x86/instr_create_api.h
+++ b/core/ir/x86/instr_create_api.h
@@ -532,6 +532,8 @@
 #define INSTR_CREATE_xsusldtrk(dc) instr_create_0dst_0src((dc), OP_xsusldtrk)
 #define INSTR_CREATE_xresldtrk(dc) instr_create_0dst_0src((dc), OP_xresldtrk)
 #define INSTR_CREATE_serialize(dc) instr_create_0dst_0src((dc), OP_serialize)
+#define INSTR_CREATE_erets(dc) instr_create_0dst_0src((dc), OP_erets)
+#define INSTR_CREATE_eretu(dc) instr_create_0dst_0src((dc), OP_eretu)
 /** @} */ /* end doxygen group */
 
 /* no destination, 1 source */
@@ -603,6 +605,7 @@
  * \param dc The void * dcontext used to allocate memory for the #instr_t.
  * \param s The opnd_t explicit source operand for the instruction.
  */
+#define INSTR_CREATE_lkgs(dc, s) instr_create_0dst_1src((dc), OP_lkgs, (s))
 #define INSTR_CREATE_lldt(dc, s) instr_create_0dst_1src((dc), OP_lldt, (s))
 #define INSTR_CREATE_ltr(dc, s) instr_create_0dst_1src((dc), OP_ltr, (s))
 #define INSTR_CREATE_verr(dc, s) instr_create_0dst_1src((dc), OP_verr, (s))
diff --git a/core/ir/x86/opcode_api.h b/core/ir/x86/opcode_api.h
index 5cabbb3038..2404e5d65b 100644
--- a/core/ir/x86/opcode_api.h
+++ b/core/ir/x86/opcode_api.h
@@ -1685,6 +1685,11 @@ enum {
     /* 1476 */ OP_vpshrdvd,    /**< IA-32/AMD64 vpshrdvd opcode. */
     /* 1477 */ OP_vpshrdvq,    /**< IA-32/AMD64 vpshrdvq opcode. */
 
+    /* Intel FRED instructions */
+    /* 1478 */ OP_erets, /**< IA-32/AMD64 erets opcode. */
+    /* 1479 */ OP_eretu, /**< IA-32/AMD64 eretu opcode. */
+    /* 1480 */ OP_lkgs,  /**< IA-32/AMD64 lkgs opcode. */
+
     OP_AFTER_LAST,
     OP_FIRST = OP_add,           /**< First real opcode. */
     OP_LAST = OP_AFTER_LAST - 1, /**< Last real opcode. */


Test patch:
diff --git a/suite/tests/api/ir_x86.c b/suite/tests/api/ir_x86.c
index 7f871bb168..79d1587d3b 100644
--- a/suite/tests/api/ir_x86.c
+++ b/suite/tests/api/ir_x86.c
@@ -2927,6 +2927,68 @@ test_disasm_to_buffer(void *dc)
     ASSERT(len == expect_len - 2);
 }
 
+static void
+test_fred_instructions(void *dc)
+{
+#ifdef X64
+    /* Test Encoding of FRED instructions */
+    byte *pc;
+    byte encode_buf[16];
+    instr_t *encode_instr;
+
+    // Test ERETS encoding
+    const byte bytes_erets[] = { 0xf2, 0x0f, 0x01, 0xca };
+    encode_instr = INSTR_CREATE_erets(dc);
+    pc = instr_encode(dc, encode_instr, encode_buf);
+    ASSERT(pc != NULL);
+    ASSERT((pc - encode_buf) == sizeof(bytes_erets));
+    ASSERT(memcmp(encode_buf, bytes_erets, sizeof(bytes_erets)) == 0);
+    instr_destroy(dc, encode_instr);
+
+    // Test ERETU encoding
+    const byte bytes_eretu[] = { 0xf3, 0x0f, 0x01, 0xca };
+    encode_instr = INSTR_CREATE_eretu(dc);
+    pc = instr_encode(dc, encode_instr, encode_buf);
+    ASSERT(pc != NULL);
+    ASSERT((pc - encode_buf) == sizeof(bytes_eretu));
+    ASSERT(memcmp(encode_buf, bytes_eretu, sizeof(bytes_eretu)) == 0);
+    instr_destroy(dc, encode_instr);
+
+    // Test LKGS encoding
+    const byte bytes_lkgs[] = { 0xf2, 0x0f, 0x00, 0xf0 };
+    encode_instr = INSTR_CREATE_lkgs(dc, opnd_create_reg(DR_REG_AX));
+    pc = instr_encode(dc, encode_instr, encode_buf);
+    ASSERT(pc != NULL);
+    ASSERT((pc - encode_buf) == sizeof(bytes_lkgs));
+    ASSERT(memcmp(encode_buf, bytes_lkgs, sizeof(bytes_lkgs)) == 0);
+    instr_destroy(dc, encode_instr);
+
+    /* Test Decoding of FRED instructions */
+    instr_t decode_instr;
+    instr_init(dc, &decode_instr);
+
+    // Test ERETS decoding
+    instr_reset(dc, &decode_instr);
+    pc = decode(dc, (byte *)bytes_erets, &decode_instr);
+    ASSERT(instr_get_opcode(&decode_instr) == OP_erets);
+    ASSERT(pc == bytes_erets + sizeof(bytes_erets));
+
+    // Test ERETU decoding
+    instr_reset(dc, &decode_instr);
+    pc = decode(dc, (byte *)bytes_eretu, &decode_instr);
+    ASSERT(instr_get_opcode(&decode_instr) == OP_eretu);
+    ASSERT(pc == bytes_eretu + sizeof(bytes_eretu));
+
+    // Test LKGS decoding
+    instr_reset(dc, &decode_instr);
+    pc = decode(dc, (byte *)bytes_lkgs, &decode_instr);
+    ASSERT(instr_get_opcode(&decode_instr) == OP_lkgs);
+    ASSERT(pc == bytes_lkgs + sizeof(bytes_lkgs));
+
+    instr_free(dc, &decode_instr);
+#endif
+}
+
 int
 main(int argc, char *argv[])
 {
@@ -2988,6 +3050,8 @@ main(int argc, char *argv[])
     test_avx512_bf16_encoding(dcontext);
 
     test_x64_vmovq(dcontext);
+
+    test_fred_instructions(dcontext);
 #endif
 
     test_regs(dcontext);
diff --git a/suite/tests/api/ir_x86_0args.h b/suite/tests/api/ir_x86_0args.h
index c21d0b96cc..f9e37077b8 100644
--- a/suite/tests/api/ir_x86_0args.h
+++ b/suite/tests/api/ir_x86_0args.h
@@ -205,3 +205,6 @@ OPCODE(xsusldtrk, xsusldtrk, xsusldtrk, 0)
 OPCODE(xresldtrk, xresldtrk, xresldtrk, 0)
 
 OPCODE(serialize, serialize, serialize, 0)
+
+OPCODE(erets, erets, erets, X64_ONLY)
+OPCODE(eretu, eretu, eretu, X64_ONLY)
diff --git a/suite/tests/api/ir_x86_1args.h b/suite/tests/api/ir_x86_1args.h
index 94d3990b21..4b45f82ba9 100644
--- a/suite/tests/api/ir_x86_1args.h
+++ b/suite/tests/api/ir_x86_1args.h
@@ -125,6 +125,7 @@ OPCODE(xsavec64, xsavec64, xsavec64, X64_ONLY, MEMARG(OPSZ_xsave))
 OPCODE(clflushopt, clflushopt, clflushopt, 0, MEMARG(OPSZ_clflush))
 OPCODE(clwb, clwb, clwb, 0, MEMARG(OPSZ_clflush))
 OPCODE(cldemote, cldemote, cldemote, 0, MEMARG(OPSZ_clflush))
+OPCODE(lkgs_mem, lkgs, lkgs, X64_ONLY, MEMARG(OPSZ_2))
 
 /****************************************************************************/
 /* single immed argument */
@@ -167,6 +168,7 @@ OPCODE(rdfsbase, rdfsbase, rdfsbase, X64_ONLY, REGARG(EBX))
 OPCODE(rdgsbase, rdgsbase, rdgsbase, X64_ONLY, REGARG(EBX))
 OPCODE(wrfsbase, wrfsbase, wrfsbase, X64_ONLY, REGARG(EBX))
 OPCODE(wrgsbase, wrgsbase, wrgsbase, X64_ONLY, REGARG(EBX))
+OPCODE(lkgs_reg, lkgs, lkgs, X64_ONLY, REGARG(AX))
 
 /****************************************************************************/
 /* single pc/instr argument */
diff --git a/third_party/binutils/test_decenc/drdecode_decenc_x86_64.expect b/third_party/binutils/test_decenc/drdecode_decenc_x86_64.expect
index 9a86575e07..dec25d2628 100644
--- a/third_party/binutils/test_decenc/drdecode_decenc_x86_64.expect
+++ b/third_party/binutils/test_decenc/drdecode_decenc_x86_64.expect
@@ -32363,6 +32363,10 @@ test_x86_64_s:
  00 00 00 90
  c4 c3 e1 6d 64 0d 00 vfmsubpd %xmm11, %xmm3, 0x00(%r13,%rcx), %xmm4
  b0
+ f2 0f 01 ca          erets
+ f3 0f 01 ca          eretu
+ f2 0f 01 ca          erets
+ f3 0f 01 ca          eretu
  f3 0f ae c3          rdfsbase %ebx
  f3 48 0f ae c3       rdfsbase %rbx
  f3 41 0f ae c0       rdfsbase %r8d
@@ -32441,24 +32445,24 @@ test_x86_64_s:
  0f 01 18             lidt   (%rax)
  0f 01 00             sgdt   (%rax)
  0f 01 10             lgdt   (%rax)
- 48 8b 05 00 00 00 00 mov    <rel> 0x0000000010011eb6, %rax
+ 48 8b 05 00 00 00 00 mov    <rel> 0x0000000010011ec6, %rax
  48 c7 c0 00 00 00 00 mov    $0x00000000, %rax
  48 8b 04 25 00 00 00 mov    0x00, %rax
  00
- 48 8b 05 00 00 00 00 mov    <rel> 0x0000000010011ecc, %rax
+ 48 8b 05 00 00 00 00 mov    <rel> 0x0000000010011edc, %rax
  48 8b 81 00 00 00 00 mov    0x00000000(%rcx), %rax
- ff 15 00 00 00 00    call   <rel> 0x0000000010011ed9
+ ff 15 00 00 00 00    call   <rel> 0x0000000010011ee9
  ff 90 00 00 00 00    call   0x00000000(%rax)
- ff 25 00 00 00 00    jmp    <rel> 0x0000000010011ee5
+ ff 25 00 00 00 00    jmp    <rel> 0x0000000010011ef5
  ff a1 00 00 00 00    jmp    0x00000000(%rcx)
  48 c7 c0 00 00 00 00 mov    $0x00000000, %rax
  48 8b 04 25 00 00 00 mov    0x00, %rax
  00
- 48 8b 05 00 00 00 00 mov    <rel> 0x0000000010011f01, %rax
+ 48 8b 05 00 00 00 00 mov    <rel> 0x0000000010011f11, %rax
  48 8b 81 00 00 00 00 mov    0x00000000(%rcx), %rax
- ff 15 00 00 00 00    call   <rel> 0x0000000010011f0e
+ ff 15 00 00 00 00    call   <rel> 0x0000000010011f1e
  ff 90 00 00 00 00    call   0x00000000(%rax)
- ff 25 00 00 00 00    jmp    <rel> 0x0000000010011f1a
+ ff 25 00 00 00 00    jmp    <rel> 0x0000000010011f2a
  ff a1 00 00 00 00    jmp    0x00000000(%rcx)
  f2 f0 80 11 64       xacquire lock adcb   $0x64, (%rcx)
  f2 f0 80 11 64       xacquire lock adcb   $0x64, (%rcx)
@@ -34257,8 +34261,8 @@ test_x86_64_s:
  66 48 6d             insd
  48 6f                outsd
  66 48 6f             outsd
- eb fe                jmp    $0x000000001001425b
- e9 00 00 00 00       jmp    $0x0000000010014262
+ eb fe                jmp    $0x000000001001426b
+ e9 00 00 00 00       jmp    $0x0000000010014272
  ff 24 25 00 00 00 00 jmp    0x00
  ff e7                jmp    %rdi
  ff 27                jmp    (%rdi)
@@ -34268,8 +34272,8 @@ test_x86_64_s:
  ff 2c 25 00 00 00 00 ljmp   0x00
  66 ff 2c 25 00 00 00 data16 ljmp   0x00
  00
- e8 cb ff ff ff       call   $0x000000001001425b
- e8 00 00 00 00       call   $0x0000000010014295
+ e8 cb ff ff ff       call   $0x000000001001426b
+ e8 00 00 00 00       call   $0x00000000100142a5
  ff 14 25 00 00 00 00 call   0x00
  ff d7                call   %rdi
  ff 17                call   (%rdi)
@@ -34279,22 +34283,41 @@ test_x86_64_s:
  ff 1c 25 00 00 00 00 lcall  0x00
  66 ff 1c 25 00 00 00 data16 lcall  0x00
  00
- 67 e3 00             addr32 jecxz  $0x00000000100142c1
+ 67 e3 00             addr32 jecxz  $0x00000000100142d1
  90                   nop
- e3 00                jrcxz  $0x00000000100142c4
+ e3 00                jrcxz  $0x00000000100142d4
  90                   nop
  66 ff 13             data16 call   (%rbx)
  ff 1b                lcall  (%rbx)
  66 ff 23             data16 jmp    (%rbx)
  ff 2b                ljmp   (%rbx)
- eb 00                jmp    $0x00000000100142d1
+ eb 00                jmp    $0x00000000100142e1
  90                   nop
- 67 e3 00             addr32 jecxz  $0x00000000100142d5
+ 67 e3 00             addr32 jecxz  $0x00000000100142e5
  90                   nop
- e3 00                jrcxz  $0x00000000100142d8
+ e3 00                jrcxz  $0x00000000100142e8
  90                   nop
- eb 00                jmp    $0x00000000100142db
- 48 8b 05 00 00 00 00 mov    <rel> 0x00000000100142e2, %rax
+ eb 00                jmp    $0x00000000100142eb
+ 48 8b 05 00 00 00 00 mov    <rel> 0x00000000100142f2, %rax
+ f2 41 0f 00 f4       lkgs   %r12w
+ f2 41 0f 00 f4       lkgs   %r12w
+ f2 41 0f 00 f4       lkgs   %r12w
+ f2 42 0f 00 b4 f5 00 lkgs   0x10000000(%rbp,%r14,8)
+ 00 00 10
+ f2 41 0f 00 31       lkgs   (%r9)
+ f2 0f 00 b1 fe 00 00 lkgs   0xfe(%rcx)
+ 00
+ f2 0f 00 b2 00 ff ff lkgs   -0x00000100(%rdx)
+ ff
+ f2 41 0f 00 f4       lkgs   %r12w
+ f2 41 0f 00 f4       lkgs   %r12w
+ f2 42 0f 00 b4 f5 00 lkgs   0x10000000(%rbp,%r14,8)
+ 00 00 10
+ f2 41 0f 00 31       lkgs   (%r9)
+ f2 0f 00 b1 fe 00 00 lkgs   0xfe(%rcx)
+ 00
+ f2 0f 00 b2 00 ff ff lkgs   -0x00000100(%rdx)
+ ff
  f0 01 03             lock add    %eax, (%rbx)
  f0 83 03 64          lock addl   $0x64, (%rbx)
  f0 11 03             lock adc    %eax, (%rbx)
@@ -35060,11 +35083,11 @@ test_x86_64_s:
  48 0f c3 00          movnti %rax, (%rax)
  4d 0f c3 00          movnti %r8, (%r8)
  4c 0f c3 00          movnti %r8, (%rax)
- e2 fe                loop   $0x0000000010015172
- e2 fe                loop   $0x0000000010015174
- 67 e2 fd             addr32 loop   $0x0000000010015176
- e3 fe                jrcxz  $0x0000000010015179
- 67 e3 fd             addr32 jecxz  $0x000000001001517b
+ e2 fe                loop   $0x00000000100151d9
+ e2 fe                loop   $0x00000000100151db
+ 67 e2 fd             addr32 loop   $0x00000000100151dd
+ e3 fe                jrcxz  $0x00000000100151e0
+ 67 e3 fd             addr32 jecxz  $0x00000000100151e2
  41 f6 38             idiv   (%r8), %ax
  f6 38                idiv   (%rax), %ax
  66 41 f7 38          data16 idiv   (%r8), %dx, %ax
@@ -35738,14 +35761,14 @@ test_x86_64_s:
  0f 73 f6 02          psllq  $0x02, %mm6
  66 0f 73 f2 02       psllq  $0x02, %xmm2
  66 0f 73 fa 02       pslldq $0x02, %xmm2
- 0f 84 6b 02 00 00    jz     $0x0000000010015d78
+ 0f 84 6b 02 00 00    jz     $0x0000000010015ddf
  90                   nop
  90                   nop
  90                   nop
  90                   nop
  90                   nop
  90                   nop
- 0f 84 5f 02 00 00    jz     $0x0000000010015d78
+ 0f 84 5f 02 00 00    jz     $0x0000000010015ddf
  90                   nop
  90                   nop
  90                   nop
@@ -35880,12 +35903,12 @@ test_x86_64_s:
  90                   nop
  90                   nop
  90                   nop
- 0f 84 74 ff ff ff    jz     $0x0000000010015b19
+ 0f 84 74 ff ff ff    jz     $0x0000000010015b80
  90                   nop
  90                   nop
  90                   nop
  90                   nop
- 0f 84 6a ff ff ff    jz     $0x0000000010015b19
+ 0f 84 6a ff ff ff    jz     $0x0000000010015b80
  90                   nop
  90                   nop
  90                   nop
@@ -35894,7 +35917,7 @@ test_x86_64_s:
  90                   nop
  90                   nop
  90                   nop
- 0f 84 bb 01 00 00    jz     $0x0000000010015d78
+ 0f 84 bb 01 00 00    jz     $0x0000000010015ddf
  90                   nop
  90                   nop
  90                   nop
@@ -35905,24 +35928,24 @@ test_x86_64_s:
  90                   nop
  90                   nop
  90                   nop
- 0f 84 4c ff ff ff    jz     $0x0000000010015b19
+ 0f 84 4c ff ff ff    jz     $0x0000000010015b80
  90                   nop
  90                   nop
  90                   nop
  90                   nop
- 0f 84 42 ff ff ff    jz     $0x0000000010015b19
+ 0f 84 42 ff ff ff    jz     $0x0000000010015b80
  4c 8b b4 24 30 01 00 mov    0x00000130(%rsp), %r14
  00
  90                   nop
  90                   nop
- 0f 84 32 ff ff ff    jz     $0x0000000010015b19
- 0f 84 2c ff ff ff    jz     $0x0000000010015b19
+ 0f 84 32 ff ff ff    jz     $0x0000000010015b80
+ 0f 84 2c ff ff ff    jz     $0x0000000010015b80
  4c 8b b4 24 00 01 00 mov    0x00000100(%rsp), %r14
  00
  90                   nop
  90                   nop
  90                   nop
- 0f 84 7a 01 00 00    jz     $0x0000000010015d78
+ 0f 84 7a 01 00 00    jz     $0x0000000010015ddf
  90                   nop
  90                   nop
  90                   nop
@@ -35933,7 +35956,7 @@ test_x86_64_s:
  90                   nop
  90                   nop
  90                   nop
- 0f 84 0b ff ff ff    jz     $0x0000000010015b19
+ 0f 84 0b ff ff ff    jz     $0x0000000010015b80
  90                   nop
  90                   nop
  90                   nop
@@ -35947,18 +35970,18 @@ test_x86_64_s:
  90                   nop
  90                   nop
  90                   nop
- 0f 84 f8 fe ff ff    jz     $0x0000000010015b19
+ 0f 84 f8 fe ff ff    jz     $0x0000000010015b80
  48 8d b4 24 b0 01 00 lea    0x000001b0(%rsp), %rsi
  00
- 0f 84 ea fe ff ff    jz     $0x0000000010015b19
+ 0f 84 ea fe ff ff    jz     $0x0000000010015b80
  4c 8b b4 24 b0 00 00 mov    0xb0(%rsp), %r14
  00
- 0f 84 3b 01 00 00    jz     $0x0000000010015d78
- 0f 84 d6 fe ff ff    jz     $0x0000000010015b19
- 0f 84 d0 fe ff ff    jz     $0x0000000010015b19
+ 0f 84 3b 01 00 00    jz     $0x0000000010015ddf
+ 0f 84 d6 fe ff ff    jz     $0x0000000010015b80
+ 0f 84 d0 fe ff ff    jz     $0x0000000010015b80
  48 8d b4 24 a8 01 00 lea    0x000001a8(%rsp), %rsi
  00
- 0f 84 c2 fe ff ff    jz     $0x0000000010015b19
+ 0f 84 c2 fe ff ff    jz     $0x0000000010015b80
  90                   nop
  90                   nop
  90                   nop
@@ -35981,7 +36004,7 @@ test_x86_64_s:
  90                   nop
  90                   nop
  90                   nop
- 0f 84 a6 fe ff ff    jz     $0x0000000010015b19
+ 0f 84 a6 fe ff ff    jz     $0x0000000010015b80
  90                   nop
  90                   nop
  90                   nop
@@ -35993,10 +36016,10 @@ test_x86_64_s:
  90                   nop
  90                   nop
  90                   nop
- 0f 84 95 fe ff ff    jz     $0x0000000010015b19
+ 0f 84 95 fe ff ff    jz     $0x0000000010015b80
  48 8d b4 24 a0 01 00 lea    0x000001a0(%rsp), %rsi
  00
- 0f 84 87 fe ff ff    jz     $0x0000000010015b19
+ 0f 84 87 fe ff ff    jz     $0x0000000010015b80
  90                   nop
  90                   nop
  90                   nop
@@ -36018,7 +36041,7 @@ test_x86_64_s:
  90                   nop
  90                   nop
  90                   nop
- 0f 84 cb 00 00 00    jz     $0x0000000010015d78
+ 0f 84 cb 00 00 00    jz     $0x0000000010015ddf
  90                   nop
  90                   nop
  90                   nop
@@ -36027,7 +36050,7 @@ test_x86_64_s:
  90                   nop
  90                   nop
  90                   nop
- 0f 84 5e fe ff ff    jz     $0x0000000010015b19
+ 0f 84 5e fe ff ff    jz     $0x0000000010015b80
  90                   nop
  90                   nop
  90                   nop
@@ -36039,7 +36062,7 @@ test_x86_64_s:
  90                   nop
  90                   nop
  90                   nop
- 0f 84 4d fe ff ff    jz     $0x0000000010015b19
+ 0f 84 4d fe ff ff    jz     $0x0000000010015b80
  90                   nop
  90                   nop
  90                   nop
@@ -36047,7 +36070,7 @@ test_x86_64_s:
  90                   nop
  90                   nop
  90                   nop
- 0f 84 40 fe ff ff    jz     $0x0000000010015b19
+ 0f 84 40 fe ff ff    jz     $0x0000000010015b80
  90                   nop
  90                   nop
  90                   nop
@@ -36070,7 +36093,7 @@ test_x86_64_s:
  90                   nop
  90                   nop
  90                   nop
- 0f 84 83 00 00 00    jz     $0x0000000010015d78
+ 0f 84 83 00 00 00    jz     $0x0000000010015ddf
  90                   nop
  90                   nop
  90                   nop
@@ -36210,13 +36233,13 @@ test_x86_64_s:
  90                   nop
  90                   nop
  90                   nop
- 0f 84 24 01 00 00    jz     $0x0000000010015ebc
+ 0f 84 24 01 00 00    jz     $0x0000000010015f23
  66 66 2e 0f 1f 84 00 data16 nop    0x00000000(%rax,%rax)
  00 00 00 00
  0f 1f 40 00          nop    0x00(%rax)
  90                   nop
  90                   nop
- 0f 84 0d 01 00 00    jz     $0x0000000010015ebc
+ 0f 84 0d 01 00 00    jz     $0x0000000010015f23
  90                   nop
  90                   nop
  90                   nop
@@ -36254,7 +36277,7 @@ test_x86_64_s:
  90                   nop
  90                   nop
  90                   nop
- 0f 84 e2 00 00 00    jz     $0x0000000010015ebc
+ 0f 84 e2 00 00 00    jz     $0x0000000010015f23
  90                   nop
  90                   nop
  90                   nop
@@ -36314,7 +36337,7 @@ test_x86_64_s:
  90                   nop
  90                   nop
  90                   nop
- 0f 84 a1 00 00 00    jz     $0x0000000010015ebc
+ 0f 84 a1 00 00 00    jz     $0x0000000010015f23
  90                   nop
  90                   nop
  90                   nop
@@ -36383,7 +36406,7 @@ test_x86_64_s:
  90                   nop
  90                   nop
  90                   nop
- 74 06                jz     $0x0000000010015e67
+ 74 06                jz     $0x0000000010015ece
  66 0f 1f 44 00 00    data16 nop    0x00(%rax,%rax)
  90                   nop
  90                   nop
@@ -36535,17 +36558,17 @@ test_x86_64_s:
  67 f3 48 ab          addr32 rep stosq
  67 f3 48 a7          addr32 rep cmpsq
  67 f3 48 af          addr32 rep scasq
- 8d 05 00 00 00 00    lea    <rel> 0x0000000010015f7d, %eax
- 8d 05 11 11 11 11    lea    <rel> 0x0000000021127094, %eax
- 8d 05 01 00 00 00    lea    <rel> 0x0000000010015f8a, %eax
- 8d 05 00 00 00 00    lea    <rel> 0x0000000010015f8f, %eax
+ 8d 05 00 00 00 00    lea    <rel> 0x0000000010015fe4, %eax
+ 8d 05 11 11 11 11    lea    <rel> 0x00000000211270fb, %eax
+ 8d 05 01 00 00 00    lea    <rel> 0x0000000010015ff1, %eax
+ 8d 05 00 00 00 00    lea    <rel> 0x0000000010015ff6, %eax
  c6 f8 08             xabort $0x08
- c7 f8 fa ff ff ff    xbegin $0x0000000010015f92
- c7 f8 00 00 00 00    xbegin $0x0000000010015f9e
+ c7 f8 fa ff ff ff    xbegin $0x0000000010015ff9
+ c7 f8 00 00 00 00    xbegin $0x0000000010016005
  0f 01 d5             xend
  c6 f8 08             xabort $0x08
- c7 f8 fa ff ff ff    xbegin $0x0000000010015fa4
- c7 f8 00 00 00 00    xbegin $0x0000000010015fb0
+ c7 f8 fa ff ff ff    xbegin $0x000000001001600b
+ c7 f8 00 00 00 00    xbegin $0x0000000010016017
  0f 01 d5             xend
  0f 01 d6             xtest
  8c 18                mov    %ds, (%rax)
@@ -36641,17 +36664,17 @@ test_x86_64_s:
  41 8b 04 64          mov    (%r12), %eax
  41 8b 04 a4          mov    (%r12), %eax
  41 8b 04 e4          mov    (%r12), %eax
- f2 0f d0 0d 78 56 34 addsubps <rel> 0x000000002235b7ac, %xmm1
+ f2 0f d0 0d 78 56 34 addsubps <rel> 0x000000002235b813, %xmm1
  12
- 66 0f 2f 0d 78 56 34 comisd %xmm1, <rel> 0x000000002235b7b4
+ 66 0f 2f 0d 78 56 34 comisd %xmm1, <rel> 0x000000002235b81b
  12
- 0f 2f 0d 78 56 34 12 comiss %xmm1, <rel> 0x000000002235b7bb
- f3 0f e6 0d 78 56 34 cvtdq2pd <rel> 0x000000002235b7c3, %xmm1
+ 0f 2f 0d 78 56 34 12 comiss %xmm1, <rel> 0x000000002235b822
+ f3 0f e6 0d 78 56 34 cvtdq2pd <rel> 0x000000002235b82a, %xmm1
  12
- f2 0f e6 0d 78 56 34 cvtpd2dq <rel> 0x000000002235b7cb, %xmm1
+ f2 0f e6 0d 78 56 34 cvtpd2dq <rel> 0x000000002235b832, %xmm1
  12
- 0f 5a 0d 78 56 34 12 cvtps2pd <rel> 0x000000002235b7d2, %xmm1
- f3 0f 5b 0d 78 56 34 cvttps2dq <rel> 0x000000002235b7da, %xmm1
+ 0f 5a 0d 78 56 34 12 cvtps2pd <rel> 0x000000002235b839, %xmm1
+ f3 0f 5b 0d 78 56 34 cvttps2dq <rel> 0x000000002235b841, %xmm1
  12
  f3 0f 2a c8          cvtsi2ss %eax, %xmm1
  f2 0f 2a c8          cvtsi2sd %eax, %xmm1
@@ -36667,50 +36690,50 @@ test_x86_64_s:
  f2 0f 2a 08          cvtsi2sd (%rax), %xmm1
  f3 48 0f 2a 08       cvtsi2ss (%rax), %xmm1
  f2 48 0f 2a 08       cvtsi2sd (%rax), %xmm1
- f2 0f 7c 0d 78 56 34 haddps <rel> 0x000000002235b820, %xmm1
+ f2 0f 7c 0d 78 56 34 haddps <rel> 0x000000002235b887, %xmm1
  12
- f3 0f 7f 0d 78 56 34 movdqu %xmm1, <rel> 0x000000002235b828
+ f3 0f 7f 0d 78 56 34 movdqu %xmm1, <rel> 0x000000002235b88f
  12
- f3 0f 6f 0d 78 56 34 movdqu <rel> 0x000000002235b830, %xmm1
+ f3 0f 6f 0d 78 56 34 movdqu <rel> 0x000000002235b897, %xmm1
  12
- 66 0f 17 0d 78 56 34 movhpd %xmm1, <rel> 0x000000002235b838
+ 66 0f 17 0d 78 56 34 movhpd %xmm1, <rel> 0x000000002235b89f
  12
- 66 0f 16 0d 78 56 34 movhpd <rel> 0x000000002235b840, %xmm1
+ 66 0f 16 0d 78 56 34 movhpd <rel> 0x000000002235b8a7, %xmm1
  12
- 0f 17 0d 78 56 34 12 movhps %xmm1, <rel> 0x000000002235b847
- 0f 16 0d 78 56 34 12 movhps <rel> 0x000000002235b84e, %xmm1
- 66 0f 13 0d 78 56 34 movlpd %xmm1, <rel> 0x000000002235b856
+ 0f 17 0d 78 56 34 12 movhps %xmm1, <rel> 0x000000002235b8ae
+ 0f 16 0d 78 56 34 12 movhps <rel> 0x000000002235b8b5, %xmm1
+ 66 0f 13 0d 78 56 34 movlpd %xmm1, <rel> 0x000000002235b8bd
  12
- 66 0f 12 0d 78 56 34 movlpd <rel> 0x000000002235b85e, %xmm1
+ 66 0f 12 0d 78 56 34 movlpd <rel> 0x000000002235b8c5, %xmm1
  12
- 0f 13 0d 78 56 34 12 movlps %xmm1, <rel> 0x000000002235b865
- 0f 12 0d 78 56 34 12 movlps <rel> 0x000000002235b86c, %xmm1
- 66 0f d6 0d 78 56 34 movq   %xmm1, <rel> 0x000000002235b874
+ 0f 13 0d 78 56 34 12 movlps %xmm1, <rel> 0x000000002235b8cc
+ 0f 12 0d 78 56 34 12 movlps <rel> 0x000000002235b8d3, %xmm1
+ 66 0f d6 0d 78 56 34 movq   %xmm1, <rel> 0x000000002235b8db
  12
- f3 0f 7e 0d 78 56 34 movq   <rel> 0x000000002235b87c, %xmm1
+ f3 0f 7e 0d 78 56 34 movq   <rel> 0x000000002235b8e3, %xmm1
  12
- f3 0f 16 0d 78 56 34 movshdup <rel> 0x000000002235b884, %xmm1
+ f3 0f 16 0d 78 56 34 movshdup <rel> 0x000000002235b8eb, %xmm1
  12
- f3 0f 12 0d 78 56 34 movsldup <rel> 0x000000002235b88c, %xmm1
+ f3 0f 12 0d 78 56 34 movsldup <rel> 0x000000002235b8f3, %xmm1
  12
- f3 0f 70 0d 78 56 34 pshufhw <rel> 0x000000002235b895, $0x90, %xmm1
+ f3 0f 70 0d 78 56 34 pshufhw <rel> 0x000000002235b8fc, $0x90, %xmm1
  12 90
- f2 0f 70 0d 78 56 34 pshuflw <rel> 0x000000002235b89e, $0x90, %xmm1
+ f2 0f 70 0d 78 56 34 pshuflw <rel> 0x000000002235b905, $0x90, %xmm1
  12 90
- 0f 60 0d 78 56 34 12 punpcklbw <rel> 0x000000002235b8a5, %mm1
- 0f 62 0d 78 56 34 12 punpckldq <rel> 0x000000002235b8ac, %mm1
- 0f 61 0d 78 56 34 12 punpcklwd <rel> 0x000000002235b8b3, %mm1
- 66 0f 60 0d 78 56 34 punpcklbw <rel> 0x000000002235b8bb, %xmm1
+ 0f 60 0d 78 56 34 12 punpcklbw <rel> 0x000000002235b90c, %mm1
+ 0f 62 0d 78 56 34 12 punpckldq <rel> 0x000000002235b913, %mm1
+ 0f 61 0d 78 56 34 12 punpcklwd <rel> 0x000000002235b91a, %mm1
+ 66 0f 60 0d 78 56 34 punpcklbw <rel> 0x000000002235b922, %xmm1
  12
- 66 0f 62 0d 78 56 34 punpckldq <rel> 0x000000002235b8c3, %xmm1
+ 66 0f 62 0d 78 56 34 punpckldq <rel> 0x000000002235b92a, %xmm1
  12
- 66 0f 61 0d 78 56 34 punpcklwd <rel> 0x000000002235b8cb, %xmm1
+ 66 0f 61 0d 78 56 34 punpcklwd <rel> 0x000000002235b932, %xmm1
  12
- 66 0f 6c 0d 78 56 34 punpcklqdq <rel> 0x000000002235b8d3, %xmm1
+ 66 0f 6c 0d 78 56 34 punpcklqdq <rel> 0x000000002235b93a, %xmm1
  12
- 66 0f 2e 0d 78 56 34 ucomisd %xmm1, <rel> 0x000000002235b8db
+ 66 0f 2e 0d 78 56 34 ucomisd %xmm1, <rel> 0x000000002235b942
  12
- 0f 2e 0d 78 56 34 12 ucomiss %xmm1, <rel> 0x000000002235b8e2
+ 0f 2e 0d 78 56 34 12 ucomiss %xmm1, <rel> 0x000000002235b949
  f2 0f c2 00 00       cmpsd  (%rax), $0x00, %xmm0
  f3 0f c2 00 00       cmpss  (%rax), $0x00, %xmm0
  66 0f 2a 00          cvtpi2pd (%rax), %xmm0
@@ -36781,17 +36804,17 @@ test_x86_64_s:
  0f f4 00             pmuludq (%rax), %mm0
  66 0f f4 c1          pmuludq %xmm1, %xmm0
  66 0f f4 00          pmuludq (%rax), %xmm0
- f2 0f d0 0d 78 56 34 addsubps <rel> 0x000000002235ba14, %xmm1
+ f2 0f d0 0d 78 56 34 addsubps <rel> 0x000000002235ba7b, %xmm1
  12
- 66 0f 2f 0d 78 56 34 comisd %xmm1, <rel> 0x000000002235ba1c
+ 66 0f 2f 0d 78 56 34 comisd %xmm1, <rel> 0x000000002235ba83
  12
- 0f 2f 0d 78 56 34 12 comiss %xmm1, <rel> 0x000000002235ba23
- f3 0f e6 0d 78 56 34 cvtdq2pd <rel> 0x000000002235ba2b, %xmm1
+ 0f 2f 0d 78 56 34 12 comiss %xmm1, <rel> 0x000000002235ba8a
+ f3 0f e6 0d 78 56 34 cvtdq2pd <rel> 0x000000002235ba92, %xmm1
  12
- f2 0f e6 0d 78 56 34 cvtpd2dq <rel> 0x000000002235ba33, %xmm1
+ f2 0f e6 0d 78 56 34 cvtpd2dq <rel> 0x000000002235ba9a, %xmm1
  12
- 0f 5a 0d 78 56 34 12 cvtps2pd <rel> 0x000000002235ba3a, %xmm1
- f3 0f 5b 0d 78 56 34 cvttps2dq <rel> 0x000000002235ba42, %xmm1
+ 0f 5a 0d 78 56 34 12 cvtps2pd <rel> 0x000000002235baa1, %xmm1
+ f3 0f 5b 0d 78 56 34 cvttps2dq <rel> 0x000000002235baa9, %xmm1
  12
  f3 0f 2a c8          cvtsi2ss %eax, %xmm1
  f2 0f 2a c8          cvtsi2sd %eax, %xmm1
@@ -36809,50 +36832,50 @@ test_x86_64_s:
  f2 48 0f 2a 08       cvtsi2sd (%rax), %xmm1
  f3 48 0f 2a 08       cvtsi2ss (%rax), %xmm1
  f2 48 0f 2a 08       cvtsi2sd (%rax), %xmm1
- f2 0f 7c 0d 78 56 34 haddps <rel> 0x000000002235ba92, %xmm1
+ f2 0f 7c 0d 78 56 34 haddps <rel> 0x000000002235baf9, %xmm1
  12
- f3 0f 7f 0d 78 56 34 movdqu %xmm1, <rel> 0x000000002235ba9a
+ f3 0f 7f 0d 78 56 34 movdqu %xmm1, <rel> 0x000000002235bb01
  12
- f3 0f 6f 0d 78 56 34 movdqu <rel> 0x000000002235baa2, %xmm1
+ f3 0f 6f 0d 78 56 34 movdqu <rel> 0x000000002235bb09, %xmm1
  12
- 66 0f 17 0d 78 56 34 movhpd %xmm1, <rel> 0x000000002235baaa
+ 66 0f 17 0d 78 56 34 movhpd %xmm1, <rel> 0x000000002235bb11
  12
- 66 0f 16 0d 78 56 34 movhpd <rel> 0x000000002235bab2, %xmm1
+ 66 0f 16 0d 78 56 34 movhpd <rel> 0x000000002235bb19, %xmm1
  12
- 0f 17 0d 78 56 34 12 movhps %xmm1, <rel> 0x000000002235bab9
- 0f 16 0d 78 56 34 12 movhps <rel> 0x000000002235bac0, %xmm1
- 66 0f 13 0d 78 56 34 movlpd %xmm1, <rel> 0x000000002235bac8
+ 0f 17 0d 78 56 34 12 movhps %xmm1, <rel> 0x000000002235bb20
+ 0f 16 0d 78 56 34 12 movhps <rel> 0x000000002235bb27, %xmm1
+ 66 0f 13 0d 78 56 34 movlpd %xmm1, <rel> 0x000000002235bb2f
  12
- 66 0f 12 0d 78 56 34 movlpd <rel> 0x000000002235bad0, %xmm1
+ 66 0f 12 0d 78 56 34 movlpd <rel> 0x000000002235bb37, %xmm1
  12
- 0f 13 0d 78 56 34 12 movlps %xmm1, <rel> 0x000000002235bad7
- 0f 12 0d 78 56 34 12 movlps <rel> 0x000000002235bade, %xmm1
- 66 0f d6 0d 78 56 34 movq   %xmm1, <rel> 0x000000002235bae6
+ 0f 13 0d 78 56 34 12 movlps %xmm1, <rel> 0x000000002235bb3e
+ 0f 12 0d 78 56 34 12 movlps <rel> 0x000000002235bb45, %xmm1
+ 66 0f d6 0d 78 56 34 movq   %xmm1, <rel> 0x000000002235bb4d
  12
- f3 0f 7e 0d 78 56 34 movq   <rel> 0x000000002235baee, %xmm1
+ f3 0f 7e 0d 78 56 34 movq   <rel> 0x000000002235bb55, %xmm1
  12
- f3 0f 16 0d 78 56 34 movshdup <rel> 0x000000002235baf6, %xmm1
+ f3 0f 16 0d 78 56 34 movshdup <rel> 0x000000002235bb5d, %xmm1
  12
- f3 0f 12 0d 78 56 34 movsldup <rel> 0x000000002235bafe, %xmm1
+ f3 0f 12 0d 78 56 34 movsldup <rel> 0x000000002235bb65, %xmm1
  12
- f3 0f 70 0d 78 56 34 pshufhw <rel> 0x000000002235bb07, $0x90, %xmm1
+ f3 0f 70 0d 78 56 34 pshufhw <rel> 0x000000002235bb6e, $0x90, %xmm1
  12 90
- f2 0f 70 0d 78 56 34 pshuflw <rel> 0x000000002235bb10, $0x90, %xmm1
+ f2 0f 70 0d 78 56 34 pshuflw <rel> 0x000000002235bb77, $0x90, %xmm1
  12 90
- 0f 60 0d 78 56 34 12 punpcklbw <rel> 0x000000002235bb17, %mm1
- 0f 62 0d 78 56 34 12 punpckldq <rel> 0x000000002235bb1e, %mm1
- 0f 61 0d 78 56 34 12 punpcklwd <rel> 0x000000002235bb25, %mm1
- 66 0f 60 0d 78 56 34 punpcklbw <rel> 0x000000002235bb2d, %xmm1
+ 0f 60 0d 78 56 34 12 punpcklbw <rel> 0x000000002235bb7e, %mm1
+ 0f 62 0d 78 56 34 12 punpckldq <rel> 0x000000002235bb85, %mm1
+ 0f 61 0d 78 56 34 12 punpcklwd <rel> 0x000000002235bb8c, %mm1
+ 66 0f 60 0d 78 56 34 punpcklbw <rel> 0x000000002235bb94, %xmm1
  12
- 66 0f 62 0d 78 56 34 punpckldq <rel> 0x000000002235bb35, %xmm1
+ 66 0f 62 0d 78 56 34 punpckldq <rel> 0x000000002235bb9c, %xmm1
  12
- 66 0f 61 0d 78 56 34 punpcklwd <rel> 0x000000002235bb3d, %xmm1
+ 66 0f 61 0d 78 56 34 punpcklwd <rel> 0x000000002235bba4, %xmm1
  12
- 66 0f 6c 0d 78 56 34 punpcklqdq <rel> 0x000000002235bb45, %xmm1
+ 66 0f 6c 0d 78 56 34 punpcklqdq <rel> 0x000000002235bbac, %xmm1
  12
- 66 0f 2e 0d 78 56 34 ucomisd %xmm1, <rel> 0x000000002235bb4d
+ 66 0f 2e 0d 78 56 34 ucomisd %xmm1, <rel> 0x000000002235bbb4
  12
- 0f 2e 0d 78 56 34 12 ucomiss %xmm1, <rel> 0x000000002235bb54
+ 0f 2e 0d 78 56 34 12 ucomiss %xmm1, <rel> 0x000000002235bbbb
  f2 0f c2 00 00       cmpsd  (%rax), $0x00, %xmm0
  f3 0f c2 00 00       cmpss  (%rax), $0x00, %xmm0
  66 0f 2a 00          cvtpi2pd (%rax), %xmm0
@@ -41157,7 +41180,7 @@ test_x86_64_s:
  41 03 00             add    (%r8), %eax
  45 03 00             add    (%r8), %r8d
  49 03 00             add    (%r8), %rax
- 03 05 22 22 22 22    add    <rel> 0x000000003223dcc7, %eax
+ 03 05 22 22 22 22    add    <rel> 0x000000003223dd2e, %eax
  03 45 00             add    0x00(%rbp), %eax
  03 04 25 22 22 22 22 add    0x22222222, %eax
  41 03 45 00          add    0x00(%r13), %eax
@@ -41189,12 +41212,12 @@ test_x86_64_s:
  83 04 81 11          addl   $0x11, (%rcx,%rax,4)
  41 83 04 81 11       addl   $0x11, (%r9,%rax,4)
  42 83 04 81 11       addl   $0x11, (%rcx,%r8,4)
- 83 05 22 22 22 22 33 addl   $0x33, <rel> 0x000000003223dd42
- 48 83 05 22 22 22 22 addq   $0x33, <rel> 0x000000003223dd4a
+ 83 05 22 22 22 22 33 addl   $0x33, <rel> 0x000000003223dda9
+ 48 83 05 22 22 22 22 addq   $0x33, <rel> 0x000000003223ddb1
  33
- 81 05 22 22 22 22 33 addl   $0x33333333, <rel> 0x000000003223dd54
+ 81 05 22 22 22 22 33 addl   $0x33333333, <rel> 0x000000003223ddbb
  33 33 33
- 48 81 05 22 22 22 22 addq   $0x33333333, <rel> 0x000000003223dd5f
+ 48 81 05 22 22 22 22 addq   $0x33333333, <rel> 0x000000003223ddc6
  33 33 33 33
  83 04 c5 22 22 22 22 addl   $0x33, 0x22222222(,%rax,8)
  33
@@ -41228,7 +41251,7 @@ test_x86_64_s:
  00 00
  8b 04 25 00 00 00 00 mov    0x00, %eax
  8b 80 00 00 00 00    mov    0x00000000(%rax), %eax
- 8b 05 00 00 00 00    mov    <rel> 0x000000001001bbd5, %eax
+ 8b 05 00 00 00 00    mov    <rel> 0x000000001001bc3c, %eax
  b0 00                mov    $0x00, %al
  66 b8 00 00          data16 mov    $0x0000, %ax
  b8 00 00 00 00       mov    $0x00000000, %eax
@@ -41237,7 +41260,7 @@ test_x86_64_s:
  00 00
  8b 04 25 00 00 00 00 mov    0x00, %eax
  8b 80 00 00 00 00    mov    0x00000000(%rax), %eax
- 8b 05 00 00 00 00    mov    <rel> 0x000000001001bc03, %eax
+ 8b 05 00 00 00 00    mov    <rel> 0x000000001001bc6a, %eax
  a0 11 22 33 44 55 66 mov    0x8877665544332211, %al
  77 88
  66 a1 11 22 33 44 55 data16 mov    0x8877665544332211, %ax
@@ -41410,10 +41433,10 @@ test_x86_64_s:
  48 05 00 00 00 00    add    $0x00000000, %rax
  66 b8 00 00          data16 mov    $0x0000, %ax
  b0 00                mov    $0x00, %al
- 8b 05 00 00 00 00    mov    <rel> 0x000000001001beb5, %eax
- 67 8b 05 00 00 00 00 addr32 mov    <rel> 0x000000001001bebc, %eax
- e8 00 00 00 00       call   $0x000000001001bec1
- e3 00                jrcxz  $0x000000001001bec3
+ 8b 05 00 00 00 00    mov    <rel> 0x000000001001bf1c, %eax
+ 67 8b 05 00 00 00 00 addr32 mov    <rel> 0x000000001001bf23, %eax
+ e8 00 00 00 00       call   $0x000000001001bf28
+ e3 00                jrcxz  $0x000000001001bf2a
  48 b8 00 00 00 00 00 mov    $0x0000000000000000, %rax
  00 00 00
  48 05 00 00 00 00    add    $0x00000000, %rax
@@ -41422,22 +41445,22 @@ test_x86_64_s:
  00 00 00
  48 05 00 00 00 00    add    $0x00000000, %rax
  8b 83 00 00 00 00    mov    0x00000000(%rbx), %eax
- e8 00 00 00 00       call   $0x000000001001bef4
+ e8 00 00 00 00       call   $0x000000001001bf5b
  48 05 00 00 00 00    add    $0x00000000, %rax
- 48 8d 05 00 00 00 00 lea    <rel> 0x000000001001bf01, %rax
+ 48 8d 05 00 00 00 00 lea    <rel> 0x000000001001bf68, %rax
  48 05 00 00 00 00    add    $0x00000000, %rax
  48 05 00 00 00 00    add    $0x00000000, %rax
  8b 83 00 00 00 00    mov    0x00000000(%rbx), %eax
- e8 00 00 00 00       call   $0x000000001001bf18
+ e8 00 00 00 00       call   $0x000000001001bf7f
  48 05 00 00 00 00    add    $0x00000000, %rax
  8b 83 00 00 00 00    mov    0x00000000(%rbx), %eax
- e8 00 00 00 00       call   $0x000000001001bf29
+ e8 00 00 00 00       call   $0x000000001001bf90
  48 05 00 00 00 00    add    $0x00000000, %rax
  8b 83 00 00 00 00    mov    0x00000000(%rbx), %eax
- e8 00 00 00 00       call   $0x000000001001bf3a
+ e8 00 00 00 00       call   $0x000000001001bfa1
  48 05 00 00 00 00    add    $0x00000000, %rax
  8b 83 00 00 00 00    mov    0x00000000(%rbx), %eax
- e8 00 00 00 00       call   $0x000000001001bf4b
+ e8 00 00 00 00       call   $0x000000001001bfb2
  48 b8 00 00 00 00 00 mov    $0x0000000000000000, %rax
  00 00 00
  48 05 00 00 00 00    add    $0x00000000, %rax
@@ -104982,7 +105005,7 @@ test_x86_64_s:
  7b 00 00 00
  62 e2 7d 21 91 84 c5 vpgatherqd 0x7b(%rbp,%ymm16,8), %ymm16 {%k1} {%k1}
  7b 00 00 00
- 62 f1 7c 48 28 05 00 vmovaps <rel> 0x00000000100736f0, %zmm0 {%k0}
+ 62 f1 7c 48 28 05 00 vmovaps <rel> 0x0000000010073757, %zmm0 {%k0}
  fc ff ff
  62 f1 7c 48 28 04 05 vmovaps 0x40(,%rax), %zmm0 {%k0}
  40 00 00 00
@@ -105231,9 +105254,9 @@ test_x86_64_s:
  48 0f 38 f9 01       movdiri %rax, (%rcx)
  66 0f 38 f8 01       movdir64b (%rcx), %rax
  67 66 0f 38 f8 01    movdir64b (%ecx), %eax
- 66 0f 38 f8 0d 00 00 movdir64b <rel> 0x000000001007408b, %rcx
+ 66 0f 38 f8 0d 00 00 movdir64b <rel> 0x00000000100740f2, %rcx
  00 00
- 67 66 0f 38 f8 0d 00 movdir64b <rel> 0x0000000010074095, %ecx
+ 67 66 0f 38 f8 0d 00 movdir64b <rel> 0x00000000100740fc, %ecx
  00 00 00
  67 66 0f 38 f8 0c 25 movdir64b 0x00, %ecx
  00 00 00 00
@@ -105245,9 +105268,9 @@ test_x86_64_s:
  48 0f 38 f9 01       movdiri %rax, (%rcx)
  66 0f 38 f8 01       movdir64b (%rcx), %rax
  67 66 0f 38 f8 01    movdir64b (%ecx), %eax
- 66 0f 38 f8 0d 00 00 movdir64b <rel> 0x00000000100740d1, %rcx
+ 66 0f 38 f8 0d 00 00 movdir64b <rel> 0x0000000010074138, %rcx
  00 00
- 67 66 0f 38 f8 0d 00 movdir64b <rel> 0x00000000100740db, %ecx
+ 67 66 0f 38 f8 0d 00 movdir64b <rel> 0x0000000010074142, %ecx
  00 00 00
  67 66 0f 38 f8 0c 25 movdir64b 0x00, %ecx
  00 00 00 00
@@ -105257,13 +105280,13 @@ test_x86_64_s:
  67 f2 0f 38 f8 01    enqcmd (%ecx), %eax
  f3 0f 38 f8 01       enqcmds (%rcx), %rax
  67 f3 0f 38 f8 01    enqcmds (%ecx), %eax
- f2 0f 38 f8 0d 00 00 enqcmd <rel> 0x0000000010074110, %rcx
+ f2 0f 38 f8 0d 00 00 enqcmd <rel> 0x0000000010074177, %rcx
  00 00
- 67 f2 0f 38 f8 0d 00 enqcmd <rel> 0x000000001007411a, %ecx
+ 67 f2 0f 38 f8 0d 00 enqcmd <rel> 0x0000000010074181, %ecx
  00 00 00
- f3 0f 38 f8 0d 00 00 enqcmds <rel> 0x0000000010074123, %rcx
+ f3 0f 38 f8 0d 00 00 enqcmds <rel> 0x000000001007418a, %rcx
  00 00
- 67 f3 0f 38 f8 0d 00 enqcmds <rel> 0x000000001007412d, %ecx
+ 67 f3 0f 38 f8 0d 00 enqcmds <rel> 0x0000000010074194, %ecx
  00 00 00
  f2 0f 38 f8 0c 25 00 enqcmd 0x00, %rcx
  00 00 00
@@ -105277,13 +105300,13 @@ test_x86_64_s:
  67 f2 0f 38 f8 01    enqcmd (%ecx), %eax
  f3 0f 38 f8 01       enqcmds (%rcx), %rax
  67 f3 0f 38 f8 01    enqcmds (%ecx), %eax
- f2 0f 38 f8 0d 00 00 enqcmd <rel> 0x0000000010074176, %rcx
+ f2 0f 38 f8 0d 00 00 enqcmd <rel> 0x00000000100741dd, %rcx
  00 00
- 67 f2 0f 38 f8 0d 00 enqcmd <rel> 0x0000000010074180, %ecx
+ 67 f2 0f 38 f8 0d 00 enqcmd <rel> 0x00000000100741e7, %ecx
  00 00 00
- f3 0f 38 f8 0d 00 00 enqcmds <rel> 0x0000000010074189, %rcx
+ f3 0f 38 f8 0d 00 00 enqcmds <rel> 0x00000000100741f0, %rcx
  00 00
- 67 f3 0f 38 f8 0d 00 enqcmds <rel> 0x0000000010074193, %ecx
+ 67 f3 0f 38 f8 0d 00 enqcmds <rel> 0x00000000100741fa, %ecx
  00 00 00
  f2 0f 38 f8 0c 25 00 enqcmd 0x00, %rcx
  00 00 00
diff --git a/third_party/binutils/test_decenc/test_decenc_x86_64.asm b/third_party/binutils/test_decenc/test_decenc_x86_64.asm
index 90ef2a27d5..a82740fdd7 100644
--- a/third_party/binutils/test_decenc/test_decenc_x86_64.asm
+++ b/third_party/binutils/test_decenc/test_decenc_x86_64.asm
@@ -32647,6 +32647,13 @@ GLOBAL_LABEL(FUNCNAME:)
         RAW(c4) RAW(c3) RAW(e1) RAW(6d) RAW(64) RAW(0d) RAW(00)
         RAW(b0)
 
+        /* x86_64_fred.s */
+
+        RAW(f2) RAW(0f) RAW(01) RAW(ca)
+        RAW(f3) RAW(0f) RAW(01) RAW(ca)
+        RAW(f2) RAW(0f) RAW(01) RAW(ca)
+        RAW(f3) RAW(0f) RAW(01) RAW(ca)
+
         /* x86_64_fsgs.s */
 
         RAW(f3) RAW(0f) RAW(ae) RAW(c3)
@@ -34612,6 +34619,22 @@ GLOBAL_LABEL(FUNCNAME:)
 
         RAW(48) RAW(8b) RAW(05) RAW(00) RAW(00) RAW(00) RAW(00)
 
+        /* x86_64_lkgs.s */
+
+        RAW(f2) RAW(41) RAW(0f) RAW(00) RAW(f4)
+        RAW(f2) RAW(41) RAW(0f) RAW(00) RAW(f4)
+        RAW(f2) RAW(41) RAW(0f) RAW(00) RAW(f4)
+        RAW(f2) RAW(42) RAW(0f) RAW(00) RAW(b4) RAW(f5) RAW(00) RAW(00) RAW(00) RAW(10)
+        RAW(f2) RAW(41) RAW(0f) RAW(00) RAW(31)
+        RAW(f2) RAW(0f) RAW(00) RAW(b1) RAW(fe) RAW(00) RAW(00) RAW(00)
+        RAW(f2) RAW(0f) RAW(00) RAW(b2) RAW(00) RAW(ff) RAW(ff) RAW(ff)
+        RAW(f2) RAW(41) RAW(0f) RAW(00) RAW(f4)
+        RAW(f2) RAW(41) RAW(0f) RAW(00) RAW(f4)
+        RAW(f2) RAW(42) RAW(0f) RAW(00) RAW(b4) RAW(f5) RAW(00) RAW(00) RAW(00) RAW(10)
+        RAW(f2) RAW(41) RAW(0f) RAW(00) RAW(31)
+        RAW(f2) RAW(0f) RAW(00) RAW(b1) RAW(fe) RAW(00) RAW(00) RAW(00)
+        RAW(f2) RAW(0f) RAW(00) RAW(b2) RAW(00) RAW(ff) RAW(ff) RAW(ff)
+
         /* x86_64_lock_1.s */
 
         RAW(f0) RAW(01) RAW(03)