Verilog Tutorial | Introduction to Vivado | An End-to-End 4-bit Adder on NEXYS4 FPGA Hardware
Channel: H Logix & Solutions
Date: 2022-08-07

In this session, we will be having a complete step-by-step Vivado Tutorial on Verilog HDL-based design, synthesis, implementation, and testing of an adder example on a NEXYS4 FPGA Board. The main features of our adder circuit will be:
*Take two 4-bit numbers as inputs, A & B, using the 8 switches from NEXYS4 FPGA Board Hardware
*Calculate the sum of A and B and display its 4-bit sum on a seven-segment and 1-bit Carry on a CO blue LED. 
The Source code and Pin Assignment for this project is given below:

#Verilog Code
module core(
input clk, en, valid, [3:0] SW1, SW2, 
output reg LEDe, LEDv, CO, reg [7:0] LED, reg [7:0] AN, CA);
reg [3:0]A, B;
reg [4:0]R;
// Read Inputs
always @ (posedge clk)
    if(en)begin
        A = SW1;
        B = SW2;
    end
    else begin
        A = 0;
        B = 0;
    end
// Display Inputs
always @ (posedge clk)
    if(en)
        LED = {SW1,SW2};
    else
        LED = 0;
always @ (posedge clk)
    if(en)
        LEDe = 1;
    else
        LEDe = 0;
// Adder Circuit
always @ (posedge clk)
    if(valid) 
         R = A + B; 
    else 
         R = 0;
// Adder Result Display
always @ (posedge clk)
    if(valid) 
          LEDv = 1;  
    else 
          LEDv = 0;
always @ (posedge clk)
    if(valid)begin
        AN = 8'b11111110;
        CO = R[4];
    end
    else begin
        AN = 8'b11111111;
        CO = 0;
    end
always @ (posedge clk)
    if(valid)begin
        case (R[3:0])
            4'b0000: CA = 8'b11000000;
            4'b0001: CA = 8'b11111001;
            4'b0010: CA = 8'b10100100;
            4'b0011: CA = 8'b10110000;
            4'b0100: CA = 8'b10011001;
            4'b0101: CA = 8'b10010010;
            4'b0110: CA = 8'b10000010;
            4'b0111: CA = 8'b11011000;
            4'b1000: CA = 8'b10000000;
            4'b1001: ca  = 8'b10010000;
            4'b1010: CA = 8'b10001000;
            4'b1011: CA = 8'b10000011;
            4'b1100: CA = 8'b11000110;
            4'b1101: CA = 8'b10100001;
            4'b1110: CA = 8'b10000110;
            4'b1111: CA = 8'b10001110;
        endcase
    end
endmodule

#The Pin Assignment is Given By:
Sig          Pin   Sig          Pin   Sig        Pin   Sig        Pin   Sig         Pin
SW1[0]   U9    LED[0]    T8    CA[0]    L3    AN[0]    N6    clk          E3
SW1[1]   U8    LED[1]    V9    CA[1]    N1   AN[1]    M6    en          P4
SW1[2]   R7    LED[2]    R8    CA[2]    L5    AN[2]    M3    LEDe     P2
SW1[3]   R6    LED[3]    T6    CA[3]    L4    AN[3]    N5    valid      P3
SW2[0]   R5    LED[4]    T5    CA[4]    K3    AN[4]    N2    LEDv     R2
SW2[1]   V7    LED[5]    T4    CA[5]    M2   AN[5]    N4    CO         F6
SW2[2]   V6    LED[6]    U7    CA[6]    L6    AN[6]    L1  
SW2[3]   V5    LED[7]    U6    CA[7]    M4    AN[7]   M1