oreboot on VisionFive 2 001: First Steps
Channel: Daniel aka CyReVolt 🐢
Date: 2023-03-06

During this video series, we develop firmware in Rust, targeting application processors. Continuing from the season on the VisionFive 1 board, we now work with the VisionFive 2, featuring the StarFive JH7110 RISC-V SoC.

In this first episode, we skim through an article on programming for the VisionFive 2 in the D programming language, which helps get a basic understanding of the GPIOs and the UART. We then walk through the documentation and tools available so far, and eventually run some first code that already writes serial output. We then try to plug into the log crate in oreboot, ending up in trouble and leaving the solution for another time.

Previous series on the VisionFive 1:
https://www.youtube.com/watch?v=e9Momh944B8&list=PLenOHeTI_A9PSGshDnEc4dYK-GSnCshk6

References:
https://github.com/oreboot/oreboot/pull/686
https://zyedidia.github.io/blog/posts/2-baremetal-visionfive/
https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/system_memory_map.html
https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/gpio_oen_list.html
https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/sys_crg.html
https://github.com/starfive-tech/bootloader_recovery
https://github.com/starfive-tech/VisionFive2/releases/tag/VF2_v2.8.0
https://github.com/xypron/JH71xx-tools/tree/VisionFive2
http://www.blunk-electronic.de/train-z/pdf/xymodem.pdf
https://github.com/nycresistor/xmodem.rs/pull/1
https://github.com/awelkie/xmodem.rs/pull/6
https://github.com/starfive-tech/Tools