VEX Where next for Valgrind's dynamic instrumentation infrastructure?
Channel: FOSDEM
Date: 2018-03-12

by Julian Seward

At: FOSDEM 2017

VEX is the JIT at the core of Valgrind. It unpicks blocks of machine code,hands them off to the tool for instrumentation, recompiles the result, andlinks the instrumented version into the running image. By using a targetindependent intermediate representation, it insulates tools from thecomplexity of the underlying instruction sets.

Back in 2003, when the framework was designed, I never dreamt that it wouldend up supporting X86, ARM, POWER, MIPS, S390 and TILEGX in both 32- and64-bit variants. From that perspective VEX has been amazingly successful. Butthe framework is now showing its age. Recent instruction set features(transactional memory, LoadLinked/StoreConditional, wide vectors) have provendifficult to implement. It supports precise memory exceptions only poorly. Andperhaps worst, its simplistic compilation pipeline causes it to generate codethat is uncompetitive compared to other frameworks, particularly DynamoRIO andPIN.

In this talk I'll outline VEX's structure, then talk about these problems andwhat can be done about them. And I'd be particularly interested to hearopinions on how much effort, and for which problem areas, should be investedin upgrading it.

For the audience, some background in compiler internals and assembly codeprogramming would be helpful, but is not essential.


Room: UD2.119 (Moved from AW1.124)
Scheduled start: 2017-02-04 14:30:00