Cyrix 6x86
Channel: all the knowledge of the universe PRINCIPIA
Date: 2021-12-10

Cyrix 6x86, by Wikipedia https://en.wikipedia.org/wiki?curid=6887 / CC BY SA 3.0

#Cyrix_x86_microprocessors
#Superscalar_microprocessors
The Cyrix 6x86 （codename M1） is a sixth-generation, 32-bit x86 microprocessor designed by Cyrix and manufactured by IBM and SGS-Thomson.
It was originally released in 1996.
A simplistic block diagram of the Cyrix 6x86 microarchitecture The 6x86 is superscalar and superpipelined and performs register renaming, speculative execution, out-of-order execution, and data dependency removal.
However, it continued to use native x86 execution and ordinary microcode only, like Centaur's Winchip, unlike competitors Intel and AMD which introduced the method of dynamic translation to micro-operations with Pentium Pro and K5.
The 6x86 is socket-compatible with the Intel P54C Pentium, and was offered in six performance levels: PR 90+, PR 120+, PR 133+, PR 150+, PR 166+ and PR 200+.
These performance levels do not map to the clock speed of the chip itself （for example, a PR 133+ ran at 110 MHz, a PR 166+ ran at 133 MHz, etc.）.
With regard to internal caches, it has a 16-KB primary cache and a fully associative 256-byte instruction line cache is included alongside the primary cache, which functions as the primary instruction cache.
The 6x86 and 6x86L were not completely compatible with the Intel P5 Pentium instruction set and is not multi-processor capable.
For this reason, the chip identified itself as an 80486 and disabled the CPUID instruction by default.
CPUID support could be enabled by first enabling extended CCR registers then setting bit 7 in CCR4.
The lack of full P5 Pentium compatibility caused problems with some applications because programmers had begun to use P5 Pentium-specific instructions.
Some companies released patches for their products to make them function on the 6x86.
Compatibility with the Pentium was improved in the 6x86MX, by adding a Time Stamp Counter to support the P5 Pentium's RDTSC instruction.
Support for the Pentium ...