How to Fanout a .4 mm Pitch BGA | Sierra Circuits
Channel: Sierra Circuits
Date: 07/06/2022

In this demonstration, we will describe the steps to fan out a BGA with 0.4 mm pitch and 9.8-mil pads using Allegro PCB Designer. The stack-up of the board is shown here.

It is a 16-layer board with a finished thickness of 95 mils. The build-up has 7 signal layers and 9 power/ground layers. 

Coming to the vias on this board, through-hole via connects layer 1 to layer 16. Blind vias connect layers 1 and 2 as well as layers 15 and 16. Buried vias connect layers 2 and 3; layers 3 and 4; layers 4 and 5 and layers 4 to 13.

Before you begin with the BGA fanout procedure, it is important to know your manufacturer’s capability with respect to minimum trace width, spacing, and via size. Based on the CM’s capability you can set your design parameters. Let us now check out the steps involved in fanning out a BGA.

Step 1: Placement of BGA on the grid

To place the BGA on the grid, you need to first calculate the grid size. 
Follow these steps to compute the grid size.

Click on the scale option present here on the top of the toolbar in Allegro PCB designer.

Select the first pin, right-click and choose the option “Pin” under “Snap
pick to”. 

Similarly select the second pin and repeat the same steps.

Now, maximize the “Measure” window which is present at the left bottom corner of your screen. Various board parameters are displayed here.

To calculate the grid size, you need to divide the delta y value by 2. 15.8 over 2 is equal to 7.9.

To set the grid value, hover on the setup tab and click on design parameters. Now, click on the option setup grids to enter the grid value. Hit OK once you define the grid size.

The second step is to create a BGA region. Click on the color pallet option present on the top and select the option constraint region under the areas section and check the box with the option All. This creates a BGA region as shown here.

The minimum clearance and trace width are set to 3 mils in this BGA region. This can be viewed by clicking on constraints, and electrical under the display tab.

Now let’s begin the BGA routing. The outer row of the BGA can be routed on the top layer of the board. Most of the outer row pins are ground pins. These pins are connected to the ground plane through the via that connects layers 1 and 2. So all the ground pins are routed to this blind via.

Similarly the second and third-row pins can be fanned out using the via that connects layers 1 and 3 and the routing is done using layer 3.

Layer 4 is used as a mixed plane layer.

The second, third, fourth, and inner rows of BGA can be fanned out using the vias that connect layers 1 to 3, 1 to 5, through hole via that connects layers 1 through 16 and buried via 4 to 13. 

So the basic idea is that the signals are taken from the top layer using the vias that connect layers 1 to 5. For inner rows, we make use of vias that connect layers 4 to 13 and the through hole via that connects the layers 1 through 16 to take the signals out of the BGA.

As you can see, via that connects layers 1 to 5 is used to fan out the signals from layer 1 and layer 5 is used to take the signal outside the BGA.

The inner row pins of the BGA are taken out through layer 7 using the via which connects layers 4 to 13 and the through hole that connects layer 1 to 16.

Layers 13 and 14 are used as power planes. Layer 15 is used as a power and ground plane. This layer is used to connect ground and power signals. 

All the decoupling capacitors related to the BGA are placed on the bottom layer. It is recommended to place these capacitors near the power plane. 

To summarize, we used the top layer as a signal layer and layers 3, 5, and 7 were used to take the signals out of BGA. Vias that connect layers 1 to 3, 1 to 5, 4 to 13 and 1 to 16 were used to fan out this BGA.

In this demo, we have shown one of multiple ways of breaking out a BGA. Always consult your CM and understand their manufacturing capabilities before finalizing the layout of your BGA and decoupling capacitors. 

*******************************************

THE PCB DESIGNER'S CORNER

PCB forum SierraConnect:
https://sierraconnect.protoexpress.com/?utm_source=youtube&utm_medium=social&utm_campaign=feed%2B2024

Seminars and webinars:
https://www.protoexpress.com/events/?utm_source=youtube&utm_medium=social&utm_campaign=feed%2B2024

Design guides:
https://www.protoexpress.com/pcb-design-guides/?utm_source=youtube&utm_medium=social&utm_campaign=feed%2B2024

PCB design tools:
https://www.protoexpress.com/tools/?utm_source=youtube&utm_medium=social&utm_campaign=feed%2B2024

Sierra Circuits products and services:
https://www.protoexpress.com/products/?utm_source=youtube&utm_medium=social&utm_campaign=feed%2B2024

Follow us on LinkedIn: 
Amit Bahl, the PCB Guy: https://www.linkedin.com/in/amit-bahl-sierra-circuits
Sierra Circuits: https://www.linkedin.com/company/sierra-circuits-inc
SierraConnect: https://www.linkedin.com/showcase/sierraconnect/