4.ASSIGNMENTS IN VERILOG ----VERILOG HDL
Channel: kumar
Date: 2022-03-01

It is a verilog tutorial which tells about verilog in telugu explains verilog hdl deeply for beginners .you have to take notes and follow you can master in verilog.  
This is a series of videos explaining verilog hdl in telugu.
It is not like explaining learning together in the motto of "come let's learn together".
 Any one can suggest the topics of verilog or vlsi or different sources to  improve the content quality.
And the video will be upload once I learned it from the source and I explain in telugu.
this series covers :
1)introduction
2)datatypes in verilog hdl - numbers , arrays , vectors etc.
3)operators in verilog hdl
4)compiler and system tasks
4)assignments in verilog hdl
5)procedure in verilog hdl
6)modelling in verilog - dataflow, behavioural, gate level


Mainly 2 videos a week. not more than 8-10 weeks
prerequeste : Basics of programming like c (not mandatory only for easy understating)
analog circuits and digital circuits.
chapters:
 02:12 :-  continous asignments
08:15 :- procedural assignments
10:00 :- intial block
13:00 :- always block
13:29 :-timing control
22:31 :- event contol(level)
23:35 :- sensitivity list
27:27 :- blocking statements
32:45 :- fork-join
35:00 :- event control