Intuitive Simulation and Measurement Workflow for Hardware Engineers by Keysight | Sierra Circuits
Channel: Sierra Circuits
Date: 18/05/2023

Hardware engineers often encounter the performance verification bottleneck. The bottleneck occurs at the final step of every printed circuit board design. If there is no simulation and measurement workflow to quickly validate designs and identify signal integrity issues before the final verification, you are not maximizing your team’s productivity. This presentation demonstrates an intuitive simulation and measurement workflow to maximize your PCB design productivity. Three case studies of PCIe channel will provide fixes to common signal integrity problems. The problems addressed are related to controlled impedance, return loss and insertion loss. The presentation closes with multi-domain analysis on an example PCIe channel. Analyses such as mixed-mode S-parameters, eye diagram, time domain reflectometry (TDR) are crucial in troubleshooting SI issues.

If you are new to signal integrity, this session will give you a head start on your signal integrity journey. For experienced hardware engineers, this presentation is an excellent refresher on the fundamental SI analyses and concepts in both simulation and measurement.

Watch the full webinar here:
https://www.protoexpress.com/webinars/signal-integrity-simulation-and-measurement-workflow-by-keysight/?utm_source=youtube&utm_medium=social&utm_campaign=keysight%2Bsi%2Bsimulation%2Bwebinar%2Bvid%2Bmay%2B2023

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