Lesson learned from Retro-uC and search for ideal HDL for open source silicon
Channel: FOSDEM
Date: 14/02/2019

by Staf Verhaegen

At: FOSDEM 2019
https://video.fosdem.org/2019/AW1.125/chips4makers.webm


The Retro-uC was a crowdfunding campaign for an open source silicon project. One of the reasons the campaign did not attract enough people was a lack of enough attractive features. The feature set was kept minimal to allow a first time right chip production.
The choice of HDL is important to allow to implement more features with enough productivity and without increasing the risk of having buggy silicon. As will be presented, the venerable VHDL and Verilog RTL languages are not considered ideal for this purpose. In the quick talk an overview of pros and cons of some HDL investigated for further development will be presented. 

Room: AW1.125
Scheduled start: 2019-02-03 11:45:00+01