Lec 14: Multi-level Logic Minimization
Channel: NPTEL IIT Guwahati
Date: 25/01/2024

Digital Design with Verilog
Playlist Link:  https://onlinecourses.nptel.ac.in/noc24_cs61/preview

Prof. Chandan Karfa, 
Prof. Aryabartta Sahu

Department of Computer Science and Engineering
Indian Institute of Technology Guwahati