CMOS Inverter Layout Part2
Channel: Nehal Shah
Date: 2020-07-19

Draw layout of inverter using Electric and perform Spice simulation using LTSpice. Take W/L ratio for NMOS 10/2 and for PMOS 20/2. 
Measure rise time and fall time. 
Measure area in (µm)2 of inverter.

For Layout with horizontal transistor see CMOS Layout Part1
https://youtu.be/I6aYhUW864g



For Previous Video, 

Working with Electric and LTSpice
https://youtu.be/wLycCUUnqBA

Implementing CMOS inverter Schematic
https://youtu.be/8plVt0UZLjM

Measuring Rise time and Fall time for different (W/L) ratio
https://youtu.be/vVnFHXuaY6o