Introduction to CHIPS Alliance
Channel: British Computer Society Open Source Specialists
Date: 2020-10-09

Presented by Dr Zvonimir Z. Bandić, @zbandic

We have recently launched a CHIPS Alliance project: CHIPS (Common Hardware for Interfaces, Processors and Systems) Alliance harnesses the energy of open source collaboration to accelerate hardware development. The organization was created to host and curate high-quality, open source hardware design relevant to the design of silicon devices. By creating a neutral and collaborative environment, CHIPS Alliance intends to share resources to lower the cost of development and accelerate the creation of more efficient and innovative chip designs – covering the span from small IoT devices to large datacenter silicon solutions.

As an independent entity, companies and individuals can work together and contribute resources to help make open source chips, complex IP blocks and system-on-a-chip (SoC) design more accessible to the market.

We will describe our initial projects, which are SweRV core – high performance, 9-stage, dual issue, 32 bit superscalar RISC-V core, associated instruction set simulator, Universal Verification Methodology (UVM)-Based Stream Generator Environment for RISC-V Cores, that provides configurable, highly stressful instruction sequences that can verify architectural and micro-architectural corner-cases of designs, OmniXtend cache-coherence over ethernet interconnect protocol, FuseSOC package manager, Verilator RTL simulator, cocotb design verification and several others.

Zvonimir Z. Bandić is the Research Staff Member and Senior Director of Next Generation Platform Technologies Department in a Western Digital Corporation in San Jose, California. He received his BS in electrical engineering in 1994 from the University of Belgrade, Yugoslavia, and his MS (1995) and PhD (1999) in applied physics from Caltech, Pasadena, in the field of novel electronic devices based on wide bandgap semiconductors. He is currently focusing on emerging Non-Volatile Memories (PCM, ReRAM, MRAM) applications for data center distributed computing, including RISC-V based CPU technologies , in-memory compute, RDMA networking, and machine learning hardware acceleration. He has been awarded over 50 patents in the fields of solid state electronics, solid state disk controller technology, security architecture and storage systems and has published over 50 peer-reviewed papers. Zvonimir is Chairman of CHIPS Alliance, Chair of OpenCAPI org, and Board of Directors member of RISC-V standards organization.