HackCPU Logisim VGA Interface: Pixel Generator: Part V
Channel: Chuck's Tech Talk
Date: 2023-05-13

This is the fifth video in a sub-series on building a VGA interface for the HackCPU computer using Logisim Evolution. I build a pixel generator which fetches bits from RAM and displays them to a VGA monitor, in preparation to put the VGA interface under Hack computer control. I demonstrate a test circuit connected to ROM running on a Digilent CMOD A7.

The first VGA intro video of the series is: https://www.youtube.com/watch?v=w4vrNSY9cxY
The second VGA video of the series that describe construction of the sync pulse generator is: https://youtu.be/w4vrNSY9cxY
The third VGA video of the series describes the porch and margin generator is: https://youtu.be/Z4Ph6Jo67Y0

Resources:
https://github.com/logisim-evolution/logisim-evolution#download 
https://mitpress.mit.edu/9780262539807/the-elements-of-computing-systems/
https://tomverbeure.github.io/video_timings_calculator
https://digilent.com/shop/cmod-a7-35t-breadboardable-artix-7-fpga-module/
https://digilent.com/shop/software/digilent-adept/
https://www.amazon.com/gp/product/B08FYPTWDQ/ref=ppx_yo_dt_b_asin_title_o09_s03?ie=UTF8&psc=1

You will need the develop branch from Logisim Evolution in order to pick up the board design for the CMOD A7, as well as obtain the clock synthesis feature I added to Logisim, until such time as my changes make it into a Logisim release.

You will need the Vivado product from Xilinx to synthesize the design for the Digilent board. It's huge, but free (if you give your information). Sorry. I did not write it.
https://www.xilinx.com/support/download.html

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