Reimagining Co-design of HPC Systems for a Heterogeneous Future
Channel: Paul Wesling
Date: 08/03/2021

(38:40 + Q&A) John Shalf, NERSC CTO, Lawrence Berkeley National Laboratory 
— architectural specialization, software, algorithms, accelerators, disruptive changes …
    Presentation from the 2021 IEEE Heterogeneous Integration Roadmap Symposium. This presentation, by John Shalf, Lawrence Berkeley National Laboratory, addresses issues in architectures and co-design for heterogeneous integration over the next decade .
    The Fourth Annual Heterogeneous Integration Roadmap Symposium and Annual Meeting, held in Silicon Valley in February 2021, was sponsored by three IEEE Societies (EDS, EPS, and Photonics), as well as ASME and SEMI. The HIR is 600+ pages of details across all areas of advanced electronics packaging, covering pre-competitive information for industry, working engineers, and academia. The Roadmap is available without charge.   
    Information about the IEEE Heterogeneous Integration Roadmap is available at https://eps.ieee.org/hir.  Other HIR Symposium videos can be accessed at https://ieee-region6.org/scv-eps/?p=2416