Reviewerly/exHarmony huggingface dataset:
Topic Embedded Representation Enhanced Variational Wasserstein Autoencoder for Text Modeling

Variational Autoencoder (VAE) is now popular in text modeling and language generation tasks, which need to pay attention to the diversity of generation results. The existing models are insufficient in capturing the built-in relationships between topic representation and sequential words. At the same time, there is a massive contradiction between the commonly used simple Gaussian prior and the actual complex distribution of language texts. To address the above problems, we introduce a hybrid Wasserstein Autoencoder (WAE) with Topic Embedded Representation (TER) for text modeling. TER is obtained through an embedding-based topic model and can capture the dependencies and semantic similarities between topics and words. In this case, the learned latent variable has rich semantic knowledge with the help of TER and is easier to explain and control. Our experiments show that our method is competitive with other VAEs in text modeling.
Hybrid Optimization of Target Detection on Embedded Platforms for Real Time Applications

Target detection has been widely used in fields such as intelligent security and autonomous driving. However, existing computationally heavy target detection algorithms based on deep learning can only work on GPU and CPU platforms, restricting the applications on edge devices with limited computational power. To address this issue, this paper proposes layer fusion and 16-bit fixed-point quantization on the YOLOv2-Tiny algorithm to reduce the computational complexity of target detection algorithms. Furthermore, the data transmission efficiency is optimized by using ping-pong butter and multi-channel methods. To reduce FPGA resource consumption, the neural network is split into convolution, accumulation, pooling, and address mapping modules. The proposed system has been successfully implemented on the Xilinx Zynq-XC7Z035 platform, using only 47% of BRAM resources and 18% of DSP resources.
Improved Steganography Based on Referential Cover and Non-symmetric Embedding

Minimizing embedding impact model of steganography has good performance for steganalysis detection. By using effective distortion cost function and coding method, steganography under this model becomes the mainstream embedding framework recently. In this paper, to improve the anti-detection performance, a new steganography optimization model by constructing a reference cover is proposed. First, a reference cover is construed by performing a filtering operation on the cover image. Then, by minimizing the residual between the reference cover and the original cover, the optimization function is formulated considering the effect of different modification directions. With correcting the distortion cost of +1 and _1 modification operations, the stego image obtained by the proposed method is more consistent with the natural image. Finally, by applying the proposed framework to the cost function of the well-known HILL embedding, experimental results show that the anti-detection performance of the proposed method is better than the traditional method.
Task-based Acceleration of Bidirectional Recurrent Neural Networks on Multi-core Architectures

This paper proposes a novel parallel execution model for Bidirectional Recurrent Neural Networks (BRNNs), B-Par (Bidirectional-Parallelization), which exploits data and control dependencies for forward and reverse input computations. B-Par divides BRNN workloads across different parallel tasks by defining input and output dependencies for each RNN cell in both forward and reverse orders. B-Par does not require per-layer barriers to synchronize the parallel execution of BRNNs. We evaluate B-Par considering the TIDIGITS speech database and the Wikipedia data-set. Our experiments indicate that B-Par outperforms the state-of-the-art deep learning frameworks TensorFlow-Keras and Pytorch by achieving up to 2.34× and 9.16× speed-ups, respectively, on modern multi-core CPU architectures while preserving accuracy. Moreover, we analyze in detail aspects like task granularity, locality, or parallel efficiency to illustrate the benefits of B-Par.
Degree-Aware Kernels for Computing Jaccard Weights on GPUs

Graphs provide the ability to extract valuable met-rics from the structural properties of the underlying data they represent. One such metric is the Jaccard Weight of an edge, which is the ratio of the number of common neighbors of the edge's endpoints to the union of the endpoints' neighborhood. A naive implementation of Jaccard Weights computation has a complexity that scales with the number of edges in the graph times the square of the maximum degree. Recently, GPU-based parallel algorithms have been proposed for this problem. How-ever, these algorithms cannot overcome the structural variance within a graph, i.e., the sparsity pattern and degree imbalance, which directly translates to unbalanced work distribution across threads. In this work, we propose an optimized GPU-based algorithm with an ML-based work distribution model that mitigates the unbalanced work distribution. Our algorithm is shown to be up to 35x and on average 12x faster than the state of the art in practice while using less memory. In fact, we show that by manually tweaking the load distribution, a state-of-the-art implementation can be 5x faster. In addition, we propose a multi-core, shared-memory algorithm that applies a traditional but effective technique to improve the computation asymptotically and perform comparably to the GPU algorithms. Our code is available at https://github.com/SU-HPC/Jaccard-ML.
PokéMem: Taming Wild Memory Consumers in Apache Spark

Apache Spark is a widely used in-memory processing system due to its high performance. For fast data processing, Spark manages in-memory data such as cached or shuffling (aggregate and sorting) data in its own managed memory pools. However, despite its sophisticated memory management scheme, we found that Spark still suffers from out-of-memory (OOM) exceptions and high garbage collection (GC) overheads when wild memory consumers, who are not tracked by Spark and execute external codes, use a large amount of memory. To resolve the problems, we propose PokéMem, which is an enhanced Spark that incorporates wild memory consumers into the managed ones to prevent them from taking up memory spaces excessively in stealth. Our main idea is to open the black-box of unmanaged memory regions in external codes by providing customized data collections. PokéMem enables fine-grained controls of created objects within running tasks, by spilling and reloading the objects of custom data collections based on the memory pressure and access patterns. To further reduce memory pressures, PokéMem exploits pre-built memory estimation models to predict the external code's memory usage and proactively acquires memory before the execution of external code, and also performs JVM heap-usage monitoring to avoid critical memory pressures. With the help of these techniques, our evaluations show that PokéMem outperforms vanilla Spark with at most 3× faster execution with 3.9× smaller GC overheads, and successfully runs workloads without OOM exception that vanilla Spark has failed to run.
FlashWalker: An In-Storage Accelerator for Graph Random Walks

Graph random walk is widely used in the graph processing as it is a fundamental component in graph analysis, ranging from vertices ranking to the graph embedding. Different from traditional graph processing workload, random walk features massive processing parallelisms and poor graph data reuse, being limited by low I/O efficiency. Prior designs for random walk mitigate slow I/O operations. However, the state-of-the-art random walk processing systems are bounded by slow disk I/O bandwidth, which is confirmed by our experiments with real-world graphs. To address this issue, we propose FlashWalker, an in-storage accelerator for random walk that moves walk updating close to graph data stored in flash memory, by exploiting significant parallelisms inside SSD. Featuring a heterogeneous and parallel processing system, FlashWalker includes a board-level accelerator, channel-level accelerators, and chip-level accelerators. To address challenges posed by the tight resource constraints for processing large-scale graphs, we propose novel designs: storing a few popular subgraphs in accelerators, the pre-walking for dense walks, two optimizations to search the subgraph mapping table, and a subgraph scheduling algorithm. We implement FlashWalker in RTL, showing small circuit area overhead. Our evaluation shows FlashWalker reduces the execution time of random walk algorithms by up to 660.50×, compared with GraphWalker, which is the state-of-the-art system for random walk algorithms.
SPIDER: An Effective, Efficient and Robust Load Scheduler for Real-time Split Frame Rendering

Interactive graphics applications are generally latency-critical, while using multiple GPUs to accelerate such applications becomes possible recently with support from both hardware and software. Split frame rendering (SFR) is a popular approach for multi-GPU rendering, which splits a frame into disjoint regions and assigns the regions to different GPUs. Load scheduling of SFR is a crucial but challenging issue for achieving maximum rendering performance in real-time rendering, which is not well addressed by the existing solutions. In this paper, we propose SPIDER, a load scheduler which leverages fuzzy PID (proportional integral derivative) controller to schedule the rendering workload among GPUs. SPIDER has several distinguished properties: it is a feedback based mechanism which does not need a full knowledge of the dynamic system; it is very computationally efficient and easy to implement; it is highly robust to dynamic workload changes. Extensive experiments are conducted to evaluate SPIDER and the results show that SPIDER always achieves near-optimal performance for various workload patterns, which outperforms the state-of-the-art baselines signif-icantly.
Resource Utilization Aware Job Scheduling to Mitigate Performance Variability

Resource contention on high performance computing (HPC) platforms can lead to significant variation in application performance. When several jobs experience such large variations in run times, it can lead to less efficient use of system resources. It can also lead to users over-estimating their job's expected run time, which degrades the efficiency of the system scheduler. Mitigating performance variation on HPC platforms benefits end users and also enables more efficient use of system resources. In this paper, we present a pipeline for collecting and analyzing system and application performance data for jobs submitted over long periods of time. We use a set of machine learning (ML) models trained on this data to classify performance variation using current system counters. Additionally, we present a new resource-aware job scheduling algorithm that utilizes the ML pipeline and current system state to mitigate job variation. We evaluate our pipeline, ML models, and scheduler using various proxy applications and an actual implementation of the scheduler on an Infiniband-based fat-tree cluster.
Fast Convergence to Fairness for Reduced Long Flow Tail Latency in Datacenter Networks

Many data-intensive applications, such as distributed deep learning and data analytics, require moving vast amounts of data between compute servers in a distributed system. To meet the demands of these applications, datacenters are adopting Remote Direct Memory Access (RDMA), which has higher bandwidth and lower latency than traditional kernel-based networking. To ensure high performance of RDMA networks, congestion control manages queue depth on switches, and historically focused on moderating queue depth to ensure small flows complete quickly. Unfortunately, one side-effect of many common decisions is that large flows are starved of bandwidth. This negatively impacts the flow completion time (FCT) of large, bandwidth-bound flows, which are integral to the performance of data-intensive applications. The FCT is particularly impacted at the tail, which is increasingly critical for predictable application performance. We identify the root causes of the poor performance for long flows and measure the impact. We then design mechanisms that improve long flow FCT without compromising small flow performance. Our evaluations show that these improvements reduce 99.9% tail FCT of long flows by over 2x.
SecFortress: Securing Hypervisor using Cross-layer Isolation

Virtualization is the corner stone of cloud computing, but the hypervisor, the crucial software component that enables virtualization, is known to suffer from various attacks. It is challenging to secure the hypervisor due to at least two reasons. On one hand, commercial hypervisors are usually integrated into a privileged Operating System (OS), which brings in a larger attack surface. On the other hand, multiple Virtual Machines (VM) share a single hypervisor, thus a malicious VM could leverage the hypervisor as a bridge to launch “cross-VM” attacks. In this work, we propose SecFortress, a dependable hypervisor design that decouples the virtualization layer into a mediator, an outerOS, and multiple HypBoxes through a cross-layer isolation approach. SecFortress extends the nested kernel approach to de-privilege the outerOS from accessing the mediator's memory and creates an isolated hypervisor instance, HypBox, to confine the impacts from the untrusted VMs. We implemented SecFortress based on KVM and evaluated its effectiveness and efficiency through case studies and performance evaluation. Experimental results show that SecFortress can significantly improve the security of the hypervisor with negligible runtime overhead.
Shared-Memory Parallel Algorithms for Fully Dynamic Maintenance of 2-Connected Components

Finding the biconnected components of a graph has a large number of applications in many other graph problems including planarity testing, computing the centrality metrics, finding the (weighted) vertex cover, coloring, and the like. Recent years saw the design of efficient algorithms for this problem across sequential and parallel computational models. However, current algorithms do not work in the setting where the underlying graph changes over time in a dynamic manner via the insertion or deletion of edges. Dynamic algorithms in the sequential setting that obtain the biconnected components of a graph upon insertion or deletion of a single edge are known from over two decades ago. Parallel algorithms for this problem are not heavily studied. In this paper, we design shared-memory parallel algorithms that obtain the biconnected components of a graph subsequent to the insertion or deletion of a batch of edges. Our algorithms hence will be capable of exploiting the parallelism adduced due to a batch of updates. We implement our algorithms on an AMD EPYC 7742 CPU having 128 cores. Our experiments on a collection of 10 real-world graphs from multiple classes indicate that our algorithms outperform parallel state-of-the-art static algorithms. <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sup> <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sup> The implementation and an extended version of this paper is at [5].
STMIK PalComTech Customer Service Questionnaire Processing Application Design

Purpose: The focus of this research is to create a Consumer Service Questionnaire Dashboard application that can perform questionnaire data processing, service satisfaction analysis and reporting the results of service improvement recommendations at STMIK PalComTech.Design/methodology/approach: This study uses the Prototype method, where this method can interact with the user during user creation. This method consists of five stages, namely communication, planning quickly, modeling the design quickly, making prototypes, and submitting the system or software to the user or users to be tested using the black box testing method.Findings/result: The results of this study resulted in an application for processing customer service questionnaires from STMIK PalComTech, to simplify and shorten UPT-PM staff in preparing reports on the results of the questionnaire recap, reporting and distributing the results of the questionnaire recap of the Head of UPT-PM.Originality/value/state of the art: The system testing technique used in this study is black box testing, this testing technique focuses on the functional specifications of the software, this test is also used to find errors in the system, for example interface errors, performance errors, incorrect or missing functions.
The Development of Social Media Intelligence System for Citizen Opinion and Perception Analysis over Government Policy

In Indonesia, community involvement in development planning and public policy has generally been carried out but limitedly. Social media uploads regarding public perceptions of policy implementation in the field are valuable input for those who quickly and accurately upload existing problems.The problems that arise from this effort to use social media are 1) how to detect public conversations related to a public policy. 2) Social media data collected extensively and accelerating can be processed quickly to get real-time analysis results. 3) Making the analysis results accessible in an interactive and representative form allows government policymakers to explore appropriate data and information to formulate and formulate public policies.This research produces a social media intelligence platform that can unite public opinion regarding public perceptions of the implementation of policies issued by the government, especially local governments in Indonesia. Based on modeling the topic of Covid-19 vaccination cases, 11 topics of discussion were obtained. While the sentiment analysis results of the 11 issues resulted, topic 6 had the most negative sentiment values regarding the development of Covid-19 vaccination in Indonesia. At the same time, topics with the most positive sentiment values are topic three and topic 10. These topics discuss the vaccination process carried out by health procedures (prokes) and government policies related to COVID-19 vaccination.
An Improved Deep-learning Network for Abnormal Action Detection

Detecting actions in untrimmed videos is a challenging task. In order to improve the accuracy of abnormal action detection, an improved network combining Boundary-Matching Network (BMN) and Structured Segment Network (SSN) is proposed in this paper to achieve the temporal detection of abnormal actions from public places. BMN is used to generate the temporal proposals of abnormal actions in the video, and then SSN acts on the proposals generated by BMN to classify them into specific categories. By modifying the feature dimensions to adapt to the length of the video, and transforming the output generated by the BMN network into a proposal, the BMN and SSN networks are well combined. The experimental results prove that the proposed method achieves good results on the abnormal action dataset collected from public places.
Local Self-Expression Subspace Learning Network for Motion Capture Data

Deep subspace learning is an important branch of self-supervised learning and has been a hot research topic in recent years, but current methods do not fully consider the individualities of temporal data and related tasks. In this paper, by transforming the individualities of motion capture data and segmentation task as the supervision, we propose the local self-expression subspace learning network. Specifically, considering the temporality of motion data, we use the temporal convolution module to extract temporal features. To implement the local validity of self-expression in temporal tasks, we design the local self-expression layer which only maintains the representation relations with temporally adjacent motion frames. To simulate the interpolatability of motion data in the feature space, we impose a group sparseness constraint on the local self-expression layer to impel the representations only using selected keyframes. Besides, based on the subspace assumption, we propose the subspace projection loss, which is induced from distances of each frame projected to the fitted subspaces, to penalize the potential clustering errors. The superior performances of the proposed model on the segmentation task of synthetic data and three tasks of real motion capture data demonstrate the feature learning ability of our model.
Qualitative Analysis of Security-Related Code Reviews in NPM Packages: An Empirical Study

Security issues are a major concern in software packages, and their impact can be detrimental if exploited. Prior work has shown that code review is a widely-used practice that project maintainers adopt to improve software quality. However, in-depth analyses on code review concerning security issues are limited. This paper explores the role of code review in finding and mitigating security issues. We investigate 10 active and popular npm packages to understand what types of security issues are raised during code review, and what kind of mitigation strategies are employed by package maintainers to address them. We analyze 171 pull-requests with raised security issues. We find that such issues are discussed at length by package maintainers. Moreover, we find that code review is effective at identifying certain types of issues, e.g., Race Condition and ReDOS, as dealing with such concerns requires in-depth knowledge of the project domain. When analysing how maintainers respond to the raised security issues, we find that most of the issues (55%) are addressed and mitigated. Still, some security concerns ended up not being fixed or are ignored by maintainers. Finally, we offer some implications to support the role of reviewing code in finding and fixing security concerns.
Neural network concept

Neural networks are a popular target representation for learning. These networks are inspired by the neurons in the brain but do not actually simulate neurons. Artificial neural networks typically contain many fewer than the approximately 1011 neurons that are in the human brain, and the artificial neurons, called units, are much simpler than their biological counterparts. Interconnectivity and interoperability between these concepts, as a foundation for Artificial Intelligence (AI) going forward, are inevitable coupling. AIs of the future will be a series of smart robots that may get fed information from a central module to follow a new set of commands, controls, communications, and intelligence, known as C3I, for their actions, while they could be independent and on their own, as much as their inbuilt capability and functionality allow. Please note that with minor editing and manipulation, the materials presented in this chapter have been borrowed from the book published from Zohuri and Moghaddam with permission from both authors and publisher as well.
Teaching Physical Sciences Using Arduino Physics Lab at the Universidad Del Cauca

In this work, we proposed to evaluate the use of the Arduino Science Kit Physics Lab as a low-cost tool for conducting self-guided physics laboratory practices using a project-based learning approach for undergraduate students at the Universidad del Cauca. Our main hypothesis is that the guides permit to realize the practices with the kit as an alternative to virtual and remote learning environments. To support our claim, we performed a survey that evaluates teamwork, the solution of problems, and self-study, the results showed a high score for each one of the skills.