Lifting-Based Fractional Wavelet Filter: Energy-Efficient DWT Architecture for Low-Cost Wearable Sensors

This paper proposes and evaluates the LFrWF, a novel lifting-based architecture to compute the discrete wavelet transform (DWT) of images using the fractional wavelet filter (FrWF). In order to reduce the memory requirement of the proposed architecture, only one image line is read into a buffer at a time. Aside from an LFrWF version with multipliers, i.e., the LFr <math xmlns="http://www.w3.org/1998/Math/MathML" id="M1"> <msub> <mrow> <mtext>WF</mtext> </mrow> <mrow> <mtext>m</mtext> </mrow> </msub> </math> , we develop a multiplier-less LFrWF version, i.e., the LFr <math xmlns="http://www.w3.org/1998/Math/MathML" id="M2"> <msub> <mrow> <mtext>WF</mtext> </mrow> <mrow> <mtext>ml</mtext> </mrow> </msub> </math> , which reduces the critical path delay (CPD) to the delay <math xmlns="http://www.w3.org/1998/Math/MathML" id="M3"> <msub> <mrow> <mi>T</mi> </mrow> <mrow> <mi>a</mi> </mrow> </msub> </math> of an adder. The proposed LFr <math xmlns="http://www.w3.org/1998/Math/MathML" id="M4"> <msub> <mrow> <mtext>WF</mtext> </mrow> <mrow> <mtext>m</mtext> </mrow> </msub> </math> and LFr <math xmlns="http://www.w3.org/1998/Math/MathML" id="M5"> <msub> <mrow> <mtext>WF</mtext> </mrow> <mrow> <mtext>ml</mtext> </mrow> </msub> </math> architectures are compared in terms of the required adders, multipliers, memory, and critical path delay with state-of-the-art DWT architectures. Moreover, the proposed LFr <math xmlns="http://www.w3.org/1998/Math/MathML" id="M6"> <msub> <mrow> <mtext>WF</mtext> </mrow> <mrow> <mtext>m</mtext> </mrow> </msub> </math> and LFr <math xmlns="http://www.w3.org/1998/Math/MathML" id="M7"> <msub> <mrow> <mtext>WF</mtext> </mrow> <mrow> <mtext>ml</mtext> </mrow> </msub> </math> architectures, along with the state-of-the-art FrWF architectures (with multipliers (Fr <math xmlns="http://www.w3.org/1998/Math/MathML" id="M8"> <msub> <mrow> <mtext>WF</mtext> </mrow> <mrow> <mtext>m</mtext> </mrow> </msub> </math> ) and without multipliers (Fr <math xmlns="http://www.w3.org/1998/Math/MathML" id="M9"> <msub> <mrow> <mtext>WF</mtext> </mrow> <mrow> <mtext>ml</mtext> </mrow> </msub> </math> )) are compared through implementation on the same FPGA board. The LFr <math xmlns="http://www.w3.org/1998/Math/MathML" id="M10"> <msub> <mrow> <mtext>WF</mtext> </mrow> <mrow> <mtext>m</mtext> </mrow> </msub> </math> requires 22% less look-up tables (LUT), 34% less flip-flops (FF), and 50% less compute cycles (CC) and consumes 65% less energy than the Fr <math xmlns="http://www.w3.org/1998/Math/MathML" id="M11"> <msub> <mrow> <mtext>WF</mtext> </mrow> <mrow> <mtext>m</mtext> </mrow> </msub> </math> . Also, the proposed LFr <math xmlns="http://www.w3.org/1998/Math/MathML" id="M12"> <msub> <mrow> <mtext>WF</mtext> </mrow> <mrow> <mtext>ml</mtext> </mrow> </msub> </math> architecture requires 50% less CC and consumes 43% less energy than the Fr <math xmlns="http://www.w3.org/1998/Math/MathML" id="M13"> <msub> <mrow> <mtext>WF</mtext> </mrow> <mrow> <mtext>ml</mtext> </mrow> </msub> </math> . Thus, the proposed LFr <math xmlns="http://www.w3.org/1998/Math/MathML" id="M14"> <msub> <mrow> <mtext>WF</mtext> </mrow> <mrow> <mtext>m</mtext> </mrow> </msub> </math> and LFr <math xmlns="http://www.w3.org/1998/Math/MathML" id="M15"> <msub> <mrow> <mtext>WF</mtext> </mrow> <mrow> <mtext>ml</mtext> </mrow> </msub> </math> architectures appear suitable for computing the DWT of images on wearable sensors.